Booting from NAND Flash

Booting Linux on Arria 10 with NAND storage

Overview

This page presents complete instructions to boot the A10 from NAND, using the GSRD and SoC EDS. Binaries are also included.

The following are covered:

• GHRD - Hardware Project
• Bootloader - UBoot
• Linux Device Tree
• Linux Kernel
• Linux rootfilesystem

Prerequisites

You will need the following items:

• Arria 10 SoCDevelopment Kit, rev. C including:
  • DDR4 Memory Card
  • NAND Boot Card
• Host PC with:
  • Linux OS - required for compiling U-Boot, which is not supported on Windows
  • Minimum 16GB or RAM - required for building the hardware design
  • Serial terminal (for example minicom
  • SoC EDS - for generating and building U-Boot
  • ACDS - for compiling the hardware design

NAND Flash Layout

The following layout was chosen for the NAND:

Item	Start Address (Hex)	Size (Hex)	Size (Bytes)
4 x U-Boot Images	0x00000000	0x00100000	1,048,576
Linux Device Tree	0x00100000	0x00020000	131,072
Linux Kernel	0x00120000	0x00600000	6,291,456
Peripheral FPGA Configuration (compressed RBF)	0x00720000	0x00100000	1,048,576
Core FPGA Configuration (compressed RBF)	0x00820000	0x02800000	41,943,040
Root Filesystem (JFFS2)	0x03020000	0x04fe0000	83,755,008

Notes:

• Location of the Bootloader at offset 0x0 in NAND is required by BootROM.
• The FPGA configuration file needs to have the U-Boot (mkimage) wrapper.
• Location of RBF file, Linux kernel and Linux Device Tree are hardcoded in U-Boot source code as U-Boot environment variables (nandrbfaddr, nandbootimageaddr, nandfdtaddr). Their default values can be changed by editing the U-Boot source code file include/configs/socfpga_arria10.h.
• Location and size of root file system is defined in the Linux Device Tree.

Deliverables

The associated files are available at Release Tags.

The precompiled binaries archive contains the following:

File	Description
console-image-minimal-arria10.jffs2	JFFS2 rootfs partition image
console-image-minimal-arria10.tar.xz	Compressed root file system archive
ghrd_10as066n2.core.rbf.mkimage	FPGA Configuration RBF wrapped with mkimage header
ghrd_10as066n2.periph.rbf.mkimage	FPGA Configuration RBF wrapped with mkimage header
ghrd_10as066n2.sof	FPGA Configuration File SOF
ghrd_10as066n2.dtb	Linux Device Tree Binary
ghrd_10as066n2.dts	Linux Device Tree Source
uboot_w_dtb-mkpimage.bin	Precompiled U-Boot and U-Boot Device Tree Image
zImage	Linux kernel compressed image

The prebuilt binaries are provided for reference, and can enable user to skip some or all of the steps from the flow.

Building Arria 10 NAND GSRD

This section describes the steps to build the NAND version of the A10 GSRD. The build process is very similar with the SD card version of the GSRD.

Notes:

• Prebuilt binary files are included with this release, so the NAND GSRD can also be used without being rebuilt.
• In order to make this page shorter, the command line tools are used for the whole build process.

Building Hardware Design

1. Get the hardware design a10_soc_devkit_ghrd_nand.tar.gz from Release Tags to your home directory and extract it:

cd ~
tar xvzf a10_soc_devkit_ghrd_nand.tar.gz

2. Build hardware design from prebuilt sof file from Embedded Command Shell:

~/intelFPGA/17.0/embedded/embedded_command_shell.sh
cd ~/a10_soc_devkit_ghrd_nand/
quartus_cpf -c --hps -o bitstream_compression=on output_files/ghrd_10as066n2.sof output_files/ghrd_10as066n2.rbf
mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n "RBF" -d output_files/ghrd_10as066n2.core.rbf output_files/ghrd_10as066n2.core.rbf.mkimage
mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n "RBF" -d output_files/ghrd_10as066n2.periph.rbf output_files/ghrd_10as066n2.periph.rbf.mkimage

This will create the following files in the ~/a10_soc_devkit_ghrd_nand folder:

File	Description
output_files/ghrd_10as066n2.sof	FPGA Configuration File in SOF format
output_files/ghrd_10as066n2.core.rbf	FPGA Configuration File in RBF format
output_files/ghrd_10as066n2.periph.rbf	FPGA Configuration File in RBF format
output_files/ghrd_10as066n2.core.rbf.mkimage	FPGA Peripheral Configuration File in RBF format, with the mkimage header
output_files/ghrd_10as066n2.periph.rbf.mkimage	FPGA Core Configuration File in RBF format, with the mkimage header

Note that the hardware design can also be built from the Quartus II. The process is identical as for the SD card version: Compiling Hardware Design.

Generating and Building U-Boot and U-Boot Device Tree

Build U-Boot from Embedded Command Shell:

~/intelFPGA/17.0/embedded/embedded_command_shell.sh
cd ~/a10_soc_devkit_ghrd_nand/
mkdir -p software/bootloader
bsp-create-settings --preloader-settings-dir=hps_isw_handoff --type=uboot --settings=software/settings.bsp
bsp-update-settings --settings=software/settings.bsp --set uboot.boot_device NAND --set uboot.rbf_filename ghrd_10as066n2.periph.rbf
bsp-generate-files --settings=software/settings.bsp --bsp-dir=software/bootloader
make -C software/bootloader

This will create the following in the ~/a10_soc_devkit_ghrd_nand folder:

File	Description
software/bootloader/uboot_w_dtb-mkpimage.bin	U-Boot Binary and Device Tree, wrapped with mkpimage header

Notes

• The Bootloader Generator can also be invoked as a GUI application, not only from the command line. The flow is documented here: Generating U-boot and device tree for A10 GSRD

Building Linux Device Tree

Build Linux Device Tree from Embedded Command Shell:

~/intelFPGA/17.0/embedded/embedded_command_shell.sh
cd ~/a10_soc_devkit_ghrd_nand/
sopc2dts --input ghrd_10as066n2.sopcinfo --output ghrd_10as066n2.dts  --board hps_a10_common_board_info.xml --board hps_a10_devkit_board_info.xml --board ghrd_10as066n2_board_info.xml --bridge-removal all --clocks
dtc -I dts -O dtb -o ghrd_10as066n2.dtb ghrd_10as066n2.dts

This will create the following in the ~/a10_soc_devkit_ghrd_nand folder:

File	Description
ghrd_10as066n2.dts	Linux Device Tree Source
ghrd_10as066n2.dtb	Linux Device Tree Blob

Building Linux Kernel and Root Filesystem

The complete instructions to build the binaries required to boot Linux from NAND are:

1. Please follow the steps described in Compiling Linux to generate Kernel and Root Filesystem.

• zImage
• console-image-minimal-arria10.tar.xz

2. Get the latest mtd-utils packages.

For Ubuntu:

sudo apt-get install mtd-utils

For CentOS:

sudo yum install mtd-utils

3. Compiling the JFFS2 filesystem with no cleanmarkers for Arria10 NAND:

cd ~
pushd angstrom-build/deploy/glibc/images/arria10
rm console-image-minimal-arria10.jffs2
mkdir tmp
xz -df console-image-minimal-arria10.tar.xz
tar xf console-image-minimal-arria10.tar -C tmp
cd tmp
mkfs.jffs2 -n -p --faketime --output=../console-image-minimal-arria10.jffs2 --squash -s 2048 -e 128KiB
rm -rf tmp
popd

This will create the following in the folder ~/angstrom-socfpga-nand-boot/deploy/glibc/images/arria10/:

File	Description
zImage	Linux kernel
console-image-minimal-arria10.jffs2	Root Filesystem Image
console-image-minimal-arria10.tar.xz	Root Filesystem Archive

Padding NAND Binaries

The table below shows the required components to run GSRD

Components	Description
ghrd_10as066n2.dtb	Linux Device Tree Blob
zImage	Compressed Linux kernel image
ghrd_10as066n2.periph.rbf.mkimage	Compressed FPGA peripheral configuration file
ghrd_10as066n2.core.rbf.mkimage	Compressed FPGA core configuration file
console-image-minimal-arria10.jffs2	GSRD Root filesystem in jffs2 format
uboot_w_dtb-mkpimage.bin	Bootloader image

All components have to be padded to NAND page size which is 128KB using the following command:

arm-altera-eabi-objcopy -I binary -O binary --pad-to <filesize_in_hex> --gap-fill 0xff <input_filename> <output_filename>

For example: arm-altera-eabi-objcopy -I binary -O binary --pad-to 0x20000 --gap-fill 0xff ghrd_10as066n2.dtb ghrd_10as066n2.dtb

Programming NAND and Running GSRD

This section explains steps to program the NAND flash with pre-built binaries, and boot Linux.

Download the prebuild binaries linux-socfpga-nand-*-a10.tar.gz from Release Tags to your home directory and extract it (or you can use your own rebuilt binaries instead):

cd ~
tar xvzf linux-socfpga-nand-*-a10.tar.gz

Program flash using the utilities:

~/intelFPGA/17.0/embedded/embedded_command_shell.sh
quartus_hps -c 1 -o PV -a 0x0 uboot_w_dtb-mkpimage.bin
quartus_hps -c 1 -o PV -a 0x100000 ghrd_10as066n2.dtb
quartus_hps -c 1 -o PV -a 0x120000 zImage
quartus_hps -c 1 -o PV -a 0x720000 ghrd_10as066n2.periph.rbf.mkimage
quartus_hps -c 1 -o PV -a 0x820000 ghrd_10as066n2.core.rbf.mkimage
quartus_hps -c 1 -o BPV -a 0x3020000 console-image-minimal-arria10.jffs2

Notes:

• Always do a "nand erase clean" on the whole partition that is meant for the JFFS2 root filesystem as Linux will not write to empty blocks without the JFFS2 clean markers.

Connect to the board serial port using 115,200-8-N-1 then power cycle the board. The serial terminal will show Linux booting up. Enter 'root' as username and you will be logged in: