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Documentation
Recent Changes
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Building Bootloader for Cyclone V and Arria 10
Information abut latest bootloaders for Cortex A9 based SoC FPGA devices -
Arria 10 SoC GSRD
Arria 10 SoC Golden System Reference Design - Intel FPGA HPS Embedded Software Release Notes
-
Building Bootloader for Stratix10
Building latest bootloaders for Stratix 10 SoC Devices -
Building Bootloader for Agilex 7
Building latest bootloaders for Agilex 7 SoC Devices
Table of Contents
Boards
Documentation Page
Altera MAX10 10M50 Rev C Development Kit Linux Setup (ACDS version 15.1)
Altera MAX10 10M50 Rev C Development Kit Linux Setup (ACDS version 15.1)
FPGA2HPS
13 January 2018
| YvA
GSRD161CompilingLinuxArrowSoCKitEdition
05 June 2017
| VickyKurelovsky
HOWTO Create a Device Tree
Advice on how to create a device tree for SoC FPGA linux environments.
27 September 2022
| Rod Frazer
| A10 SoC, Agilex SoC, Arria 10 SoC, C5 SoC, CV SoC, Cyclone 5 SoC, Cyclone V SoC, S10 SoC, Stratix 10 SoC, device tree
SoC FPGA Benchmarking
A guide to configuring and running benchmarks for SoC FPGAs running Linux
19 May 2016
| Findlay Shearer
| Altera, Angstrom, Arria 10, Arria V, Benchmarking, Coremark, Coremark Pro, Cyclone V, Dhrystone, LMBench
Tasks
Compiling Linux Kernel and Root Filesystem
How to (re)build the Linux kernel for the A10 GSRD.
02 December 2015
| KeFuFang
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