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Arrow's SoCKit solution makes it easy!


Arrow is pleased to provide the easiest way to learn about and develop with Altera’s SoC solutions: our SoCKit. The Arrow SoCKit was developed to help engineers take full advantage of these new solutions and help them see how simple designing with these devices can be.

Combining the latest Cortex-A9 embedded cores with industry-leading programmable logic, Altera’s new SoC solutions give you ultimate design flexibility with unparalleled ease. Altera SoC s integrate an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces, with the FPGA fabric using a high-bandwidth interconnect backbone. That means you get the performance and power savings of hard Intellectual Property (IP) and the flexibility of programmable logic.

Purchase a kit from

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Key Features

Each SoCKit features:
  • Altera Cyclone V SoC with Dual ARM® Cortex®-A9 processors and 110K LEs
  • High Speed Mezzanine Connector (HSMC) including transceivers
  • Two banks of low-power DDR3 memory
  • MicroSD card and Ethernet 10/100/1000 interfaces
  • Adjustable clock output by Silicon Labs
  • Graphic LCD: 128 x 64 (SPI Interface)
  • VGA and Audio connections
  • USB 2.0 OTG (Full Speed) and USB to UART connections
  • 3-Axis digital accelerometer and temp sensor
  • User’s manual/start-up guide, USB and Power Cables

Block Diagram

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Attend a Workshop. Receive a FREE kit. With over 100 global locations, it’s easy to attend a workshop near you.

Register NOW at

Discover the latest design techniques, considerations, and tools to get your next SoC design started during our hands-on workshops. You’ll also learn about the new Altera SoC Embedded Design Suite (EDS) featuring the innovative ARM Development Studio 5 (DS-5) Altera Edition Toolkit. By combining the most advanced multi-core debugger for ARM architecture with the ability to adapt to the logic contained in the FPGA, the new toolkit provides embedded software developers an unprecedented level of full-chip visibility and control through the standard DS-5 user interface.

This lab-based training gives you the opportunity to:
  • Add custom FPGA peripherals to the ARM Cortex-A9 processor using the Qsys system integration tool
  • Verify peripheral HDL code using ModelSim
  • Use system console to verify to FPGA IP locally within the FPGA
  • Leverage the new ARM DS-5 Altera Edition tools and standalone code to access/debug the FPGA IP from the Cortex-A9
  • Run Embedded Linux on the Cortex-A9
  • Add a device driver for the FPGA IP and access the IP from a Linux application
With over 100 global locations, it’s easy to attend a workshop near you. And remember, $99 gets you everything you need, including a complete SoCKit.

Workshop Agenda:
  • Introduction and Workshop Objectives
  • System Architecture Overview
  • System Design Overview & Tool Flow
  • Lab 1: Add Custom FPGA peripherals to the Cortex A9 processor using Qsys
  • Lab 2: Use System Console to verify the FPGA IP within the FPGA
  • Boot Linux & Video Demo
  • Overview of powering the SoC using Linear Technology Solutions
  • Software Architecture Overview
  • Software Design Overview & Tool Flow
  • Lab 3: Generate, Build, and Run the Preloader
  • Lab 4: Validating the FPGA Peripherals from the Hard Processing Subsystem (HPS)
  • Lab 5: Cross Triggering (Optional, time permitting)
  • Android Demo
  • Resources and further Training
  • Next Steps





Reference Designs


Workshop Labs

Installation notes:
  • Create a folder c:\altera_trn on your PC.
  • Download the workshop zip file and save it to c:\altera_trn on your PC
  • Extract the zip file to this folder

SoC Labs

JESD204B Labs


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