Overview

System Console is an FPGA system debugging tool that is part of the Quartus II package.

This page demonstrates how to use the System Console to control the development board peripherals:

• Turn LEDs on and off
• Read pushbutton values
• Send characters to console through JTAG UART connection
• Read and write to the on-chip memory

Note that all the interaction happens between FPGA and System Console running on host PC. There is no software running on HPS.

Note that the examples on this page assume the Arrow SoCKit GHRD is used.

Reference Material

For more information about GHRD see GHRD Overview.

For more information about System Console, refer to

• Analyzing and Debugging Designs with the System Console.
• System Console Whitepaper

Prerequisites

1. Unzip the GHRD archive sockit_ghrd_16.0.tar.gz to the home folder and use the instructions from Compiling the Hardware Design to compile the FPGA design.

2. Program the FPGA using Quartus II Programmer as described in FPGA Programming with Quartus II Programmer.

Start System Console

1. Start Quartus II

~/altera/16.0/quartus/bin/quartus

2. In Quartus II, go to File → Open Project and select the file ~/sockit_ghrd/soc_system.qpf

3. In Quartus II, start the Qsys window by going to Tools → Qsys

4. When Qsys opens, it will ask for a .qsys file. Browse to*~/sockit_ghrd/soc_system.qsys* and click Open

5. In Qsys, go to Tools → System Console

6. Run the pwd command in system console to make sure the current folder is ~/sockit_ghrd/. If it is not, then execute cd command to change the current folder accordingly.

7. Run the GHRD script by typing source ghrd_sc_script.tcl

Controlling LEDs

The Development Kit has 4 LEDs that are connected to the FPGA. They are D14..D17 marked as LED 3..0. The LEDs are turned OFF by default.

1. Use the following command to turn all LEDs off:

led_off

2. Turn on LED D14 by typing the following command:

led_on 0x8

3. Turn on LED D15 by typing the following command:

led_on 0x4

4. Turn on LED D16 by typing the following command:

led_on 0x2

5. Turn on LED D17 by typing the following command:

led_on 0x1

6. Turn all LED on by typing the following command

led_on 0xF

Reading Push Button State

The Development Kit has two push buttons that are connected to the FPGA. The are marked as KEY0 and KEY1.

1. Type the following command to clear the parallel I/O (PIO) data register:

button_data_read_clear

2. Type the following command to enable interrupts from push button KEY1:

button_intr_enable 0x1

3. Type the following command to start the interrupt monitoring in System Console:

irq_monitor_on

System Console will read the push button interrupt status every five seconds and display it on the console. It will initially show the button as not pressed.

4. Press button KEY1 on the development board. The irq monitor will indicate that the button is pressed until a button_data_read_clear will be run to clear the status.

5. Type the following command to turn off interrupt monitoring:

irq_monitor_off

Sending Characters Using JTAG UART

The GHRD contains a JTAG UART sof IP core, that can be used to transfer data between FPGA and the host PC. On the host PC, the data is handled by the nios2-terminal application.

1. Start the nios2-terminalapplication from a NIOS II command shell:

$ ~/altera/16.0/nios2eds/nios2_command_shell.sh
$ nios2-terminal

2. In System Console, type the following commands to send characters to the host PC:

juart_data_write 0x48
juart_data_write 0x49

3. The NIOS Console will display the two characters that were sent, spelling the word "HI":

Exercising Onchip RAM

The GHRD contains an FPGA Onchip memory soft IP core. The System Console TCL script includes a simple memory test routine that writes some values to random memory locations and reads them back to verify they are correct.

In order to run the memory test for 4 locations, type the following command in the System Console:

mem_rand_test 4

Enabling FPGA to HPS and FPGA to SDRAM bridges

The following two examples require that the FPGA to HPS and FPGA to SDRAM bridges are enabled.

1. Follow the prerequisites for Booting the SoCKit : Booting Linux Using Prebuilt SD Card Image

2. Press the warm reset and press any key to halt the uboot autoboot

3. Use the following command to enable the bridges

run bridge_enable_handoff

Controlling HPS LEDs

The GHRD includes a secure JTAG master that is connected to the FPGA2HPS bridge. This allows system console access to any part of the HPS memory map.

The Development Kit has 4 LEDs that are connected to the HPS. They are D10..D13 marked as H_LED 3..0. The LEDs are turned OFF by default.

1. Use the following command to turn all LEDs off:

hps_led_off

2. Turn on LED D10 by typing the following command:

hps_led_on 0x8

3. Turn on LED D11 by typing the following command:

hps_led_on 0x4

4. Turn on LED D12 by typing the following command:

hps_led_on 0x2

5. Turn on LED D13 by typing the following command:

hps_led_on 0x1

6. Turn all LED on by typing the following command

hps_led_on 0xf

Exercising HPS SDRAM

The GHRD includes a JTAG master that is connected to the FPGA2SDRAM bridge. This allows System Console direct access to the SDRAM connected to the HPS memory controller. The System Console TCL script includes a simple memory test routine that writes some values to random memory locations and reads them back to verify they are correct.

In order to run the memory test for 4 locations, type the following command in the System Console:

mem_rand_test_f2s 4