Release Notes

GSRD

• CV SoCFPGA GSRD, AV SoCFPGA GSRD and A10 SoCFPGA GSRD have been updated to use ACDS 17.1 and SoC EDS 17.1
• Arria 10 GSRD now supports Display Port

This Linux BSP release supports the SoC Development Kit, and provides the following:

• Linux kernel v4.1.33 LTSi
• Drivers: I2C, LCD, EEPROM, RTC, Ethernet, USB (Host), Watchdog, SD/MMC, QSPI, DMA, FPGA Manager, and FPGA Bridges

  Boards	U-Boot version
  Arria 10 Devkit Rev C	U-Boot v2014.10
  Cyclone V DevKit Rev E, Arria V DevKit Rev C	U-Boot v2013.01

Preloader & U-Boot

It is highly recommended preloader and u-boot are built from the same commit.

Note: If SDRAM ECC is enabled in the Qsys design, please ensure that SDRAM ECC bit initialization is enabled in Preloader Generator

Release Contents

The GSRD sources and prebuilt binaries can be downloaded from https://releases.rocketboards.org/2017.10/gsrd.

Folder	File	Description
bin	linux-socfpga-gsrd-17.1std-av.tar.gz	Arria V Binaries Archive
^	linux-socfpga-gsrd-17.1std-cv.tar.gz	Cyclone V Binaries Archive
^	linux-socfpga-gsrd-17.1-a10.tar.gz	Arria 10 Binaries Archive, for Rev C board
ghrd	av_soc_devkit_ghrd.tar.gz	Arria V GHRD Archive
^	cv_soc_devkit_ghrd.tar.gz	Cyclone V GHRD Archive
^	a10_soc_devkit_ghrd.tar.gz	Arria 10 GHRD Archive, for Rev C board
src	boot.script	Boot script for Cyclone V and Arria V
tools	make_sdimage.py	SD Card Python Script

The following documents are also part of the release:

Document	Description
GSRD v17.1 - Arria 10 User Manual	User Manual
GSRD v17.1 - Cyclone and Arria V User Manual	^

The Arria 10 precompiled binaries archive for Rev C board linux-socfpga-gsrd-17.1-a10.tar.gz contains the following files:

File Name	Description
gsrd-console-image-arria10.tar.xz	GSRD Root filesystem as compressed tarball
gsrd-console-image-arria10.ext3	GSRD Root filesystem in ext3 format
gsrd-console-image-arria10.jffs2	GSRD Root filesystem in jffs2 format
sdimage.tar.gz	Compressed bootable SD card image
ghrd_10as066n2.dts	Device Tree Source
ghrd_10as066n2.dtb	Device Tree Blob
ghrd_10as066n2.sof	FPGA configuration file
ghrd_10as066n2.core.rbf	Compressed FPGA core configuration file
ghrd_10as066n2.periph.rbf	Compressed FPGA peripheral configuration file
uboot_w_dtb-mkpimage.bin	U-boot image
zImage	Compressed Linux kernel image

The Cyclone V and Arria V precompiled binaries archives (linux-socfpga-gsrd-17.1-cv.tar.gz and linux-socfpga-gsrd-17.1-av.tar.gz) contain the following files:

Cyclone V File Name	Arria V File Name	Description
gsrd-console-image-cyclone5.tar.xz	gsrd-console-image-arria5.tar.xz	GSRD Root filesystem as compressed tarball
gsrd-console-image-cyclone5.ext3	gsrd-console-image-arria5.tar.xz	GSRD Root filesystem in ext3 format
gsrd-console-image-cyclone5.jffs2	gsrd-console-image-arria5.tar.xz	GSRD Root filesystem in jffs2 format
sdimage.tar.gz		Compressed bootable SD card image
socfpga.dts		Device Tree Source
socfpga.dtb		Device Tree Blob
soc_system.sof	ghrd_ghrd_5astfd5k3.sof	FPGA configuration file
soc_system.rbf	ghrd_ghrd_5astfd5k3.rbf	Compressed FPGA core configuration file
preloader-mkpimage.bin		Preloader image
u-boot-cyclone5-img	u-boot-arrria5-img	U-boot image
zImage		Compressed Linux kernel image

U-boot, Linux kernel and Yocto source packages are also provided through the git trees at https://github.com/altera-opensource, as shown in the table below.

Component	Git address	Branch	Tag
Linux	linux-socfpga.git	socfpga-4.1.33-ltsi	ACDS17.1_REL_GSRD_PR
SPL/U-Boot (CV/AV)	u-boot-socfpga.git	socfpga_v2013.01.01	ACDS17.1_REL_GSRD_PR
U-Boot (A10)	u-boot-socfpga.git	socfpga_v2014.10_arria10_bringup	ACDS17.1_REL_GSRD_PR
Ref Designs	linux-refdesigns.git	master	ACDS17.1_REL_GSRD_PR