User Manual for Altera Linux Release 13.02

Introduction

This Linux BSP release supports the CycloneV SoC Development Kit, and provides the following for the CycloneV SoC:
  • Linux kernel 3.7 with support for Ethernet, UART, SD/MMC, GPIO, LCD and SDRAM
  • U-boot version 2012.10 with support of Ethernet, UART, SD/MMC and SDRAM
  • Yocto version 'Danny'
  • Preloader
  • Root File System

Release Contents

Item Description
http://download.altera.com/akdlm/software/acdsinst/13.0/156/ib_installers/linux-socfpga-13.02-RC10-src.bsx Yocto Source Package
http://download.altera.com/akdlm/software/acdsinst/13.0/156/ib_installers/linux-socfpga-13.02-RC10-bin.tar.gz Precompiled Binaries
http://git.rocketboards.org/u-boot-socfpga.git - tag rel_13.02_RC10 U-boot Git Tree
http://git.rocketboards.org/linux-socfpga.git - tag rel_13.02_RC10 Linux Kernel Git Tree
Linux 13.02 - Release Notes (this page) Release Notes
Linux 13.02 - BSP User Manual User Manual
The source package provides the source code for the Linux BSP (kernel 3.7, U-Boot 2012.10), packages for the root file system, and the tool chain (Linaro GCC 4.7 HF). The BSP sources are built with Yocto/OpenEmbedded (Denzil). A pre-built Linaro tool chain is provided. The package of pre-built images provides binaries (pre-loader, U-Boot, kernel and RFS as well as an SD card image) that are ready to be used.

Yocto Notes

The Yocto project is included in the Linux BSP. Yocto is used to build the sources of our kernel, pre-loader boot loader and the root file file system.The source code of those open source projects required to build the Linux BSP are included; that is: the kernel, the boot loader, busybox, tinylogin, sysvinit and a set of configuration files and scripts.There are many source code packages available under the Yocto project. Should the user enable a package that is not provided with our BSP, it will be downloaded (SVN, GIT, etc).

SoCFPGA Linux kernel

MAL

Location: mach-socfpga

Turning off SMP

The SoCFPGA kernel enables SMP by default. Check out the next section to turn off SMP if you need.

There are two ways to achieve this:

1. Changing the kernel command lineThe kernel reads a command line at boot time, the command line is a list of arguments that define the behavior of the kernel. This includes:
  • the speed of the UART console,
  • the NFS settings (when the root file system is mounted over the network)
  • the number of CPU's the kernel can use

The number of CPU's the kernel can use at run time is defined by the command line argument 'maxcpus'. So, to run the SoCFPGALinux kernel in Uni-Processor mode, change the kernel command line as follows:
bootargs = "console=ttyS0,57600 maxcpus=1"

The command line can be found in the device tree file, located in the kernel tree, -=arch/arm/boot/dts/socfpga_cyclone5.dts=

Once the device tree has been changed, just run the following command to rebuilt it into a device tree blob:
$ bitbake virtual/kernel

2. Changing the kernel configuration

The default SoCFPGAkernel configuration enables SMP. This can be turned off by editing the configuration (see instructions below).To modify the kernel configuration, following this procedure:
$ bitbake -c menuconfig -f virtual/kernel

This will open the configuration menu of the kernel. Turn off the option 'Symmetric Multiprocessing' (under 'Kernel Features'), save the configuration and rebuild the kernel
$ bitbake -f -c compile virtual/kernel && bitbake -f -c deploy virtual/kernel

Clock tree

Location of the clock tree driver:-

Features:-

Device tree entries:-

Drivers

UART

Location of the driver
  • linux/drivers/tty/serial/8250/8250_dw.c
Integration into the kernel:
  • TTY
Device tree bindings are documented in:
  • linux/Documentation/devicetree/bindings/i2c/i2c-designware.txt
Supported features
  • Unchanged from the community driver
Defconfig settings
  • CONFIG_SERIAL_8250=y
  • CONFIG_SERIAL_8250_CONSOLE=y
  • CONFIG_SERIAL_8250_NR_UARTS=2
  • CONFIG_SERIAL_8250_RUNTIME_UARTS=2
  • CONFIG_SERIAL_8250_DW=y

I2C

Location of the driver
  • linux/drivers/i2c/busses/i2c-designware-core.c
  • linux/drivers/i2c/busses/i2c-designware-core.h
  • linux/drivers/i2c/busses/i2c-designware-pcidrv.c
  • linux/drivers/i2c/busses/i2c-designware-platdrv.c
Integration into the kernel:
  • I2C
Device tree bindings are documented in:
  • linux/Documentation/devicetree/bindings/i2c/i2c-designware.txt
Supported features
  • Added speed setting to device tree.
  • I2C bus on DesignWare adapter.
Defconfig settings
  • CONFIG_I2C=y
  • CONFIG_I2C_DESIGNWARE_CORE=y
  • CONFIG_I2C_DESIGNWARE_PLATFORM=y
  • CONFIG_I2C_CHARDEV=y

LCD

Location of the driver
  • linux/drivers/tty/newhaven_lcd.c
Integration into the kernel:I2C
  • TTY
Device tree bindings are documented in:
  • linux/Documentation/devicetree/bindings/tty/newhaven_lcd.txt
Supported features
  • Supports the Newhaven NHD\x{2010}0216K3Z\x{2010}NSW\x{2010}BBW 2x16 LCD module as i2c slave.
  • Device will show up as /dev/ttyLCD0
  • Use 'printf' to print ('echo' messes up the required control characters).
  • Backspace is supported to the beginning of the current line.
    • i.e. printf '\b' > /dev/ttyLCD0
  • Erase whole display and reset cursor to home:
    • ESC [ 2 J
    • i.e. printf '\e[2J' > /dev/ttyLCD0
  • Erase current line and set cursor to beginning of line.
    • ESC [ 2 K
    • i.e. printf '\e[2K' > /dev/ttyLCD0
  • CR and LF are supported.
    • i.e. printf 'Hello\nlovely people' > /dev/ttyLCD0
  • Vertical scroll when cursor is on bottom line and receive end of line.
Defconfig settings
  • CONFIG_NEWHAVEN_LCD=y

I2C EEPROM

Location of the driver
  • linux/drivers/misc/eeprom/at24.c.
Integration into the kernel:
  • I2C
Device tree bindings are documented in:
  • linux/Documentation/devicetree/bindings/eeprom.txt
Supported features
  • Unchanged from the community driver
Defconfig settings
  • CONFIG_EEPROM_AT24=y

GPIO

Location of the driver
  • linux/drivers/gpio/gpio-dw.c
  • linux/drivers/gpio/gpio-altera.c
Integration into the kernel:
  • GPIO
Device tree bindings are documented in:
  • linux/Documentation/devicetree/bindings/gpio/gpio-altera.txt
Supported features
  • Support Designware gpio and Altera FPGA soft gpio
Defconfig settings
  • CONFIG_GPIOLIB=y
  • CONFIG_GPIO_SYSFS=y
  • CONFIG_GPIO_DW=m
  • CONFIG_GPIO_ALTERA=m

Ethernet

Location of the driver
  • linux/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
  • linux/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
  • linux/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
  • linux/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
  • linux/drivers/net/ethernet/stmicro/stmmac/dwmac100.h
  • linux/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
  • linux/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
  • linux/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
  • linux/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
  • linux/drivers/net/ethernet/stmicro/stmmac/mmc.h
  • linux/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
  • linux/drivers/net/ethernet/stmicro/stmmac/descs_com.h
  • linux/drivers/net/ethernet/stmicro/stmmac/stmmac.h
  • linux/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
  • linux/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
  • linux/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
  • linux/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
Integration into the kernel:
  • NET
  • ETHERNET
Device tree bindings are documented in:
  • linux/Documentation/devicetree/bindings/net/phy.txt
Supported features
  • Mainline DesignWareEthernet driver plus these fixes:
    • Issue #97997: Fix inifinit interrupt was happening for large files
    • Issue #98759: Fix added NFS to kernel to support nfs mount.
Defconfig settings
  • CONFIG_STMMAC_ETH

SD/MMC

Location of the driver
  • linux/drivers/mmc/host/dw_mmc.c
  • linux/drivers/mmc/host/dw_mmc.h
  • linux/drivers/mmc/host/dw_mmc-pltfm.c
  • linux/drivers/mmc/host/dw_mmc-pltfm.h
Integration into the kernel:
  • MMC
Device tree bindings are documented in:
  • linux/Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt
Supported features
  • Mainline DesignWareMMC driver plus these fixes:
    • Issue #91445: Fix intermittent data starvation for DMA on SD/MMC
    • Issue #90657: Fix SD/MMC driver for VT
Defconfig settings
  • CONFIG_MMC=y
  • CONFIG_MMC_DW=y
  • CONFIG_MMC_DW_IDMAC=y

Boot Loader (U-Boot)

MAL

MALThe version of bootloader (U-Boot) for this release is v2012.10.Below are the features supported for this release:
  • Support SDMMC boot include write support
  • Support QSPI boot include write and erase support
  • Ethernet TFTP support
  • FPGA programming support
  • Both instruction and data cache enabled
  • Support Virtual Platform and Dev Kit
Notes:
  • U-Boot will depend the clock information from the pll_config.h (handoff info provided by tools)
  • During the exit of Preloader, the watchdog is enabled. Bootloader need to pet or disable the watchdog upon entry.

Drivers

UART

Location of the driver
  • u-boot/drivers/serial/ns16550.c
Configuration
  • Through macros defined at include/configs/socfpga_cyclone5.h
    • CONFIG_SYS_NS16550
    • CONFIG_SYS_NS16550_SERIAL
    • CONFIG_SYS_NS16550_REG_SIZE
    • CONFIG_SYS_NS16550_CLK
    • CONFIG_CONS_INDEX 1
    • CONFIG_SYS_NS16550_COM1
    • CONFIG_SYS_BAUDRATE_TABLE
    • CONFIG_BAUDRATE
  • Through handoff info provided by tools
    • CONFIG_HPS_CLK_L4_SP_HZ (from board/altera/socfpga_cyclone5/pll_config.h)
Supported features
  • Standard RS232 communication protocol

Ethernet

Location of the driver
  • u-boot/drivers/net/designware.c
Configuration macros
  • Through macros defined at include/configs/socfpga_cyclone5.h
  • CONFIG_EMAC0_BASE
  • CONFIG_EMAC1_BASE
  • CONFIG_CMD_NET
  • CONFIG_CMD_PING
  • CONFIG_CMD_DHCP
  • CONFIG_NET_MULTI
  • CONFIG_DW_ALTDESCRIPTOR
  • CONFIG_EPHY0_PHY_ADDR
  • CONFIG_EPHY1_PHY_ADDR
  • CONFIG_DW_SEARCH_PHY
  • CONFIG_MII
  • CONFIG_CMD_MII
  • CONFIG_PHY_GIGE
  • CONFIG_DW_AUTONEG
  • CONFIG_AUTONEG_TIMEOUT
Supported features
  • RGMII support

SD/MMC

Location of the driver
  • u-boot/drivers/mmc/dw_mmc.c
Configuration macros
  • Through macros defined at include/configs/socfpga_cyclone5.h
    • CONFIG_MMC
    • CONFIG_SDMMC_BASE
    • CONFIG_SDMMC_HOST_HS
    • CONFIG_GENERIC_MMC
    • CONFIG_DW_MMC
  • Through handoff info provided by tools
    • CONFIG_HPS_CLK_SDMMC_HZ (from board/altera/socfpga_cyclone5/pll_config.h)
    • CONFIG_HPS_SDMMC_BUSWIDTH(from board/altera/socfpga_cyclone5/pinmux_config.h)
Supported features
  • Read and write support
  • Support SDHC, SD High Speed (not validated) and MMC (not validated)

QSPI

Location of the driver
  • u-boot/drivers/spi/cadence_qspi.c
  • u-boot/drivers/spi/cadence_qspi_apb.c
Configuration macros
  • Through macros defined at include/configs/socfpga_cyclone5.h
    • CONFIG_CADENCE_QSPI
    • CONFIG_CQSPI_BASE
    • CONFIG_CQSPI_AHB_BASE
    • CONFIG_SPI_FLASH
    • CONFIG_SPI_FLASH_STMICRO
    • CONFIG_SF_DEFAULT_SPEED
    • CONFIG_SF_DEFAULT_MODE
    • CONFIG_SPI_FLASH_QUAD
    • CONFIG_CQSPI_REF_CLK
    • CONFIG_CQSPI_PAGE_SIZE
    • CONFIG_CQSPI_BLOCK_SIZE
    • CONFIG_CQSPI_DECODER
    • CONFIG_CQSPI_4BYTE_ADDR
    • /* QSPI Delay timing */
    • CONFIG_CQSPI_TSHSL_NS
    • CONFIG_CQSPI_TSD2D_NS
    • CONFIG_CQSPI_TCHSH_NS
    • CONFIG_CQSPI_TSLCH_NS
    • CONFIG_CQSPI_READDATA_DELAY
  • Through handoff info provided by tools
    • CONFIG_HPS_CLK_QSPI_HZ (from board/altera/socfpga_cyclone5/pll_config.h)
Supported features
  • Read, write and erase support
  • Quad mode support
  • Support external decoder for chip select

FPGA

Configuration Support

Default configuration

Below are the U-Boot environment's default value. These environments was defined at include/configs/socfpga_cyclone5.h.
"verify=n\0" 
"loadaddr=" MK_STR(CONFIG_SYS_LOAD_ADDR) "\0" 
"fdtaddr=0x00000100\0" 
"bootimage=uImage\0" 
"bootimagesize=0x600000\0" 
"fdtimage=socfpga.dtb\0" 
"fdtimagesize=0x2000\0" 
"mmcloadcmd=fatload\0" 
"mmcloadpart=1\0" 
"mmcroot=/dev/mmcblk0p2\0" 
"qspiloadcs=0\0" 
"qspibootimageaddr=0xa0000\0" 
"qspifdtaddr=0x50000\0" 
"qspiroot=/dev/mtdblock1\0" 
"qspirootfstype=jffs2\0" 
"ramboot=setenv bootargs " CONFIG_BOOTARGS "; bootm ${loadaddr} - ${fdtaddr}\0" 
"mmcload=mmc rescan;${mmcloadcmd} mmc 0:${mmcloadpart} ${loadaddr} ${bootimage}; ${mmcloadcmd} mmc 0:${mmcloadpart} ${fdtaddr} ${fdtimage}\0" 
"mmcboot=setenv bootargs " CONFIG_BOOTARGS " root=${mmcroot} rw rootwait; bootm ${loadaddr} - ${fdtaddr}\0" 
"netboot=dhcp ${bootimage} ; tftp ${fdtaddr} ${fdtimage} ; run ramboot\0" 
"qspiload=sf probe ${qspiloadcs}; sf read ${loadaddr} ${qspibootimageaddr} ${bootimagesize}; sf read ${fdtaddr} ${qspifdtaddr} ${fdtimagesize};\0" 
"qspiboot=setenv bootargs " CONFIG_BOOTARGS " root=${qspiroot} rw rootfstype=${qspirootfstype}; bootm ${loadaddr} - ${fdtaddr}\0" 
"fpga=0\0" 
"fpgadata=0x2000000\0" 
"fpgadatasize=0x700000\0"

Configuration modifications

You can modify the U-Boot configuration during run time.To do that, you can use below commands
% env set  
% saveenv

Useful Tips

FPGA Programming

Below are some useful info to use the FPGA Programming features.1.Create the RBF image (which used for FPGA programming)
  • You need to have the SOF file.
  • At Quartus programmer, select File > Convert Programming Files
  • Select programming file type as Raw Binary File (.rbf)
  • Add the sof file at the section “Input files to convert”
  • (optional) For generating compressed image, click Properties of SOF file and select “Compression”
  • Just click “Generate” and rbf file will be created
2. Save the rbf file to FAT partition of SDMMC.

3. Do ensure you configure the MSEL correctly based on FPGA Manager FD.
  • For normal passive parallel x32 fast, MSEL=01000.
  • For compressed passive parallel x32 fast, MSEL=01010.
  • FYI, you can change the MSEL during run time without the need to power cycle the board.
4. At U-Boot console, use command fatload and fpga load to program it. Example as below.
  • SOCFPGA_CYCLONE5 # fatload mmc 0:1 $fpgadata fpga.rbf
  • SOCFPGA_CYCLONE5 # fpga load 0 $fpgadata $filesize

Pre-Built Binaries

The following pre-built binaries are provided in the file http://download.altera.com/akdlm/software/acdsinst/13.0/156/ib_installers/linux-socfpga-13.02-RC10-bin.tar.gz:

File Description
altera-image-socfpga_cyclone5.cpio Root filesystem as cpio archive
altera-image-socfpga_cyclone5.ext3 Root filesystem as ext3 image
altera-image-socfpga_cyclone5.jffs2 Root filesystem as jffs2 image
altera-image-socfpga_cyclone5.tar.gz Root filesystem as tar gzip archive
socfpga_cyclone5.dtb Device Tree Blob
u-boot-socfpga_cyclone5.bin U-boot binary file
u-boot-socfpga_cyclone5.img U-boot image file
u-boot-spl-socfpga_cyclone5.bin SPL Preloader binary file
u-boot-spl-socfpga_cyclone5.img SPL Preloader image file
uImage Linux Kernel image file
vmlinux Linux Kernel ELF file
sd_image.bin Bootable SD card image file

Instructions

Please refer to the following for instructions:

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