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- AMP Project under Cyclone V SoC with eMMC Flash
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Device Wide AMP
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Multi-Core AMP Development Tools for Altera® Cyclone® V SOC
Using Poly Platform to deploy multicore application asymmetrically (AMP) on the Altera Cyclone® V FPGA SoC ARM® cores.
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Table of Contents
| Board: | AlteraSoCDevelopmentBoard |
|---|---|
| State: | running |
| Members: | AlvinMa, QiHuang |
Introduction
This is an AMP demo bases on Sparrow which will running Linux on core0 and FreeRTOS on core1.The FreeRTOS download from https://www.freertos.org. You can running this demo on Cyclone V Development kit.System Overview
Sparrow was loaded after uboot, It's can divided memory space and release Core1. Then the linux can send interrupt to Core1,the Core 1 send response to Core0 and write status information to bm log. Core 0 can use UART to output these message.
Specification
- Implemented on PSG Cyclone V SoC Board.
- Modify layout.py to match project.(Memory Divide)
- Register IRQ in FreeRTOS
- Linux kernel use 4.1.22
Debug
You can debug sparrow and FreeRTOS on CV KIT - Debug sparrow on Core0 and execute to wakeup Core1
- Debug sparrow on Core1.
Result
use objcopy and mkimage convert axf file to bin file.- objcopy.exe -O binary core1_application.axf core1_application.raw
- mkimage.exe -A arm -T kernel -C none -O linux -a 0x30000040 -e 0x30000040 -d core1_application.raw core1_application.bin
Attachment
Attachment is the relevant file, you can copy these file to your SD card to load this demo.
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