Introduction

This is an example design to demonstrate the utility of Intel SoC FPGA devices. In this design Hash engine is implemented in FPGA fabric which communicates with ARM Cortex A9 based Hard Processor System through PIOs and LWH2F bridge. Message Transmit, Receive, Authentication and Control logic are implemented as Linux SW applications. The purpose of this example design is to serve a beginner as a starting point for HW-SW co-design and Ethernet based communication link. Hardware and Software designs are provided for user reference.

Quick Start Guide

  1. Board setup is based on Macnica Helio Board Reference Manual.
  2. You can write Preloader and U-Boot Images in QSPI Flash and boot Linux Kernel from Micro SD Card. You can also create single SD Card Image containing Preloader, U-Boot, DTB, Linux Kernal and RootFS to boot from Micro SD Card. Select BOOTSEL settings as per your boot method.
  3. Program EPCQ256 device with soc_system.jic file for Active Serial configuration. Helio board only supports Active Serial Configuration Scheme. FPGA programming from HPS feature is not supported.
  4. Boot Linux Kernel from Micro SD Card, wait until booting process is done. Login as ROOT at Kernel Terminal.
  5. For Single Board Hash Authentication Demo, download hash_authentication linux application in /home/root/working_directory from ARM DS-5 tool using Ethernet cable. Run the application and follow instructions given in application.
  6. For Two Boards Message Authentication over Ethernet Link Demo, download msg_transmit application in board 1 and msg_receive application in board 2. Connect the boards using Ethernet cable and run the applications on both boards. Set Dip Switch (SW15) status OFF-ON-ON-OFF (i.e., 0x9) on Receiver Board. This is the secret key to receive and display message coming over Ethernet link.

Hardware Requirement

  1. Macnica Helio SoC Board Rev 1.1 - 2 units
  2. Mini USB Cables - 2 units
  3. Ethernet Cable - 1 unit
  4. PC with 2 USB ports and HyperTerminal

HW/SW Architecture Overview

System Architecture

System Architecture.png.

HW Architecture

HW Architecture.png

SW Architecture

SW Architecture.png

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