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SoC

120 backlink(s) found

Building a Management Web interface to interact with the FPGA fabric

2

2.4" Touch LCD Painter Demo on Atlas-SOC

2D/3D HD Graphics System Solution on Cyclone V SoC

A

Agilex 7 SoC E-Tile Design Example For 25Gbe With IEEE1588 PTP

Agilex 7 SoC E-Tile Design Example With IEEE1588 PTP (10GE/25GE/Dynamic Reconfiguration) - Sustaining

Agilex 7 SoC HPS Remote System Update

Agilex 7 SoC With eMMC Storage On HPS

Agilex SoC Boot Linux

Agilex SoC HPS First Single QSPI Flash Boot

Agilex SoC Single QSPI Flash Boot

Agilex SoC with NAND Storage on HPS

AMP Project under Cyclone V SoC with eMMC Flash

AMP:Linux and FreeRTOS based on Sparrow

Android for DE1-SoC Board

Android ICS - Altera Cyclone 5 SoC

Arria 10 Hardware Reference Design that Demonstrates Partial Reconfiguration Demo

Arria 10 PCIe Root Port with MSI

Arria 10 SoC Hardware Reference Design (17.0) That Demonstrates Partial Reconfiguration

Arria 10 SoC Hardware Reference Design That Demonstrates Partial Reconfiguration

Arria 10 SoC Hardware Reference Design That Demonstrates Partial Reconfiguration - Sustaining

Arria 10 SoC Hardware Reference Design That Demonstrates Partial Reconfiguration for 17.1 GSRD

Arria 10, Arria V, Cyclone V PCIe Root Port with MSI

Arria 10, Arria V, Cyclone V PCIe Root Port with MSI

Arria 10, Arria V, Cyclone V PCIe Root Port with MSI

Arria 10, Arria V, Cyclone V PCIe Root Port with MSI

Arria V PCIe Root Port with MSI

Atlas-SOC_My_First_HPS

AUDIO SUPPORT WITH XILLINUX FOR CYCLONE V SOC

Audio Support with Xillinux for Cyclone V SoC

B

Baserock for Cyclone V

BootImageGenerator

C

CycleV SoC SDRAM Performance Example Design

Cyclone V RGMII Example Design

Cyclone V SOC Smart Configuration

Cyclone V SoC Triple Speed Ethernet Design Example

CycloneV HPS FIFO

CycloneV SGMII Example Design

D

Datamover Design Example

DE0-LED Example

DE1-SoC ALSA audio

DE1_SOC_My_First_HPS

Debian Jessie 8.0 De0-Nano-SoC

Demonstration of an image clarification technology on Sodia board

Development OpenCL on Sodia Board

Device Wide AMP

Digital Camera on Atlas-SoC kit

DirectFB Graphics on Helio View LCD

E

Enable FPGA SoC for AWS Greengrass

EPCQ コントローラ向けデバイスドライバの実装

F

Fog removable hardware IP “Haze Reduction” on Cyclone V SoC FPGA

G

GPU demo on Cyclone Ⅴ

H

Hands on SoC Demo

HDMI display output(Altera Video and Image Processing(VIP)) and network camera server

Helio View Linaro linux Desktop

I

Intel® Agilex® 7 I-Series Transceiver-SoC Development Kit (4x F-Tile) System Example Design With IEEE1588 PTP (25GE/10GE 2-Port)

Internet of Boat

L

Launch and Debug a Bare Metal Application on the Arrow SoCKit Board

LCD and Touch Screen on Altera SOC board

LED Blinker (use of the FPGA Bridge)

Linux and FreeRTOS based on Sparrow

Linux LXDE Desktop with Multi-Touch LCD on Atlas-SoC Kit

Low Latency Warping demo on Macnica Sodia board

Low-Footprint Human Machine Interface (HMI) System Solution for Altera FPGAs and SoCs

M

Mapping HPS Peripherals over the FPGA fabric to FPGA I/O and using Python to control them

MCAPI demo on Cyclone V with Kactus2

Message Authentication using Hash and Communication over Ethernet Link

Multi-channel PWM Design using Macnica Helio.

Multi-Core AMP Development Tools for Altera® Cyclone® V SOC

N

Networking on Chip

O

OpenCL Mandelbrot Demo on Atlas-SoC

OpenCL Mandelbrot Demo on Sodia

OpenVINO for SoC FPGA

P

PCIe Root Port with MSI

Q

Qt System Solution For Altera SoCs

R

Remote System Debug

Running Jamplay on HPS to configure external CPLD

S

Setting up and Using Bridges on Agilex 7 SoC

Simple Line Follower Robot using SOCFPGA

SoC License Plate Recognition

SoC quick start and receive data through the network Design Example

SoCKit Linaro Linux Desktop

SoCKit Video Server and Video IP (VIP) Reference Design

SoCrates HW Golden Top & SW Hello World

SoCrates Linaro Linux Desktop

Sodia ALSA audio Example Design

Sodia Debian Base Desktop Image

Sodia DVI Example Design

Sodia LVDS Panel & SDI Camera Demo

Sodia Ubuntu Nano Image

Sodia Ubuntu Nano Image

Sodia ボードを使用した OpenCL 開発

Stratix 10 HPS Remote System Update

Stratix 10 PCIe Root Port with MSI

Stratix 10 SoC - Configuring FPGA from HPS Design Example

Stratix 10 SoC - Routing SPI Peripheral to FPGA

Stratix 10 SoC Design Example for 10Gbe with IEEE1588 PTP Capability (closed)

Stratix 10 SoC Design Example for 10Gbe with IEEE1588 PTP Capability - Sustaining - User Manual

Stratix 10 SoC Design Example for 10Gbe with IEEE1588 PTP Capability v21.2 (closed)

Stratix 10 SoC FPGA First Single QSPI Flash Boot

Stratix 10 SoC HPS First Single QSPI Flash Boot

Stratix 10 Soc Partial Reconfiguration

Stratix 10 SoC with eMMC Storage on HPS

Stratix 10 SoC with NAND Storage on HPS

T

Three Gigabit Ethernet Ports with mSGDMA to the Host Processor System

Touch-screen LCD for Altera SoC

U

Using CMSIS with Custom FPGA Logic

Using SoftIP with Linux on SoCFPGA

V

Video and Image processing with Arria 10 SoC Devkit

VIP Camera With the HPS DDR3 on Atlas-SoC Kit

W

Warping Engine IP Demo on Macnica Helio

WS1– Intro to Altera SoC Devices for SW Developers - Original Version

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🤖 rsyocto: Embedded Linux developed for Intel (ALTERA) SoC-FPGAs

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