RocketBoards- Home
- Documentation
- Community
- Projects
- Boards
- Agilex 5 SoC
- Agilex 7 SoC
- Arria 10 SoC
- Nallatech 385A - Arria 10 FPGA Network Accelerator Card
- Nallatech 385A-SoC Accelerator Card with Arria 10 FPGA
- ALARIC Instant DevKit ARRIA 10 SoC FMC IDK by REFLEX CES
- Altera Arria 10 SoC Virtual Platform
- Altera Arria 10 SoC Board
- Nallatech 510T compute acceleration card with Intel Arria 10 FPGA
- REFLEX CES Achilles Arria 10 SoC SOM
- Terasic Arria10 SoC Board : HAN Pilot Platform
- Arria V SoC
- Cyclone V SoC
- Altera Cyclone V SoC Board
- Arrow SoCKit User Manual - July 2017 Edition
- Arrow SoCKit User Manual - November 2019 Edition
- Arrow SoCKit Evaluation Board
- Atlas-SoC Development Platform
- Critical Link MitySOM-5CSx Development Kit
- Cyclone V Ethernet driver problems
- DE10-Nano Development Board
- Terasic DE10-Standard Development Kit
- Devboards DBM-SoC1 module
- Devboards DBM-SoC2 module
- EBV SoCrates Evaluation Board
- Enclustra Mercury SA1 SoC Module
- Enterpoint Drigmorn 5
- Enterpoint Larg 2
- Altera Cyclone V SoC Development Platform
- Mpression Helio SoC Evaluation Kit by Macnica
- Mpression Sodia Evaluation Board by Macnica
- ARIES Embedded - MCV System on Module
- Mpression Borax SOM Module and Development Kit by Macnica
- Enterpoint Mulldonoch 3
- Networked Pro-Audio FPGA SoC Development Kit by Coveloz
- NOVPEK™CVLite
- NOVSOM®CV
- NOVSOM®CVLite
- NovTech IoT Octopus™
- NovTech NetLeap™
- Enterpoint Raggedstone 4
- Solectrix SMARC compliant System-on-Module
- Terasic DE1-SoC Development and Education Board
- Stratix 10 SoC
- Find a Board
- News
Projects
Similar topics
-
Demonstration of an image clarification technology on Sodia board
This is a sample implementation of our image clarification technology on Sodia board
- Sodia Debian Base Desktop Image
- Sodia LVDS Panel & SDI Camera Demo
- Sodia Ubuntu Desktop Image
-
OpenCL Mandelbrot Demo on Sodia
This is a design example using Sodia board by Apollo Giken(Altera DSN partner in Yokohama,Japan).
Recent Changes
-
Multiprocessor Nios V/m system: creating your first GeMRTOS application
Quick Start Guide on how to create a multiprocessor system with Nios V processor and GeMRTOS support -
Intel® Agilex® 7 I-Series Transceiver-SoC Development Kit (4x F-Tile) System Example Design With IEEE1588 PTP (25GE/10GE 2-Port)
-
Setting up and Using Bridges on Agilex 7 SoC
-
Agilex 7 SoC With eMMC Storage On HPS
-
Stratix 10 SoC with eMMC Storage on HPS
Table of Contents
| Board: | MacnicaSodiaEvaluationBoard |
|---|---|
| State: | planned |
Introduction
This pase is described how to boot Linux from QSPI Flash.Board Setup
- MSEL (J7)
You need to set MSEL is FPP mode for FPGA configuring from HPS. Please set MSEL as follows:
 |  |
- BSEL & CSEL
For SD Card Boot. You need to set BSEL & CSEL as follows:
 |  |
- USB-UART Connector (CN11)
Use as console. Please connect to host PC using usb cable. - SD Card Slot (CN13)
Please insert prepared SD card before power on. - DVI Out (CN9)
Use as display output. Please connect to display using DVI cable (720p).
Individual Components
| Item | Download | Note |
|---|---|---|
| HW Reference Design | ||
| Prebuild Angstrom Root File System for QSPI | ||
| Linux Kernel Soruce | 4.1.22-ltsi | |
| zImage | ||
| Preloader | ||
| U-Boot | ||
| DeviceTree Blob | ||
| FPGA Configuration Image data |
Steps
Related Links
© 1999-2024 RocketBoards.org by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
This website is using cookies. More info.
That's Fine