Hardware Libraries  20.1
Arria 10 SoC Hardware Manager
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alt_bridge_manager.h
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32 
37 /*
38  * $Id: //acds/rel/20.1/embedded/ip/hps/altera_hps/hwlib/include/soc_a10/alt_bridge_manager.h#1 $
39  */
40 
41 #ifndef __ALT_BRIDGE_MANAGER_H__
42 #define __ALT_BRIDGE_MANAGER_H__
43 
44 #ifdef __cplusplus
45 extern "C"
46 {
47 #endif /* __cplusplus */
48 
49 #include "hwlib.h"
50 
51 /******************************************************************************/
60 /******************************************************************************/
65 typedef enum ALT_BRIDGE_e
66 {
134 } ALT_BRIDGE_t;
135 
136 /******************************************************************************/
156 ALT_STATUS_CODE alt_bridge_fpga_is_ready(ALT_BRIDGE_t bridge);
157 
158 /******************************************************************************/
182 ALT_STATUS_CODE alt_bridge_init(ALT_BRIDGE_t bridge);
183 
184 /******************************************************************************/
203 ALT_STATUS_CODE alt_bridge_uninit(ALT_BRIDGE_t bridge);
204 
207 #ifdef __cplusplus
208 }
209 #endif /* __cplusplus */
210 #endif /* __ALT_BRIDGE_MANAGER_H__ */