35 #ifndef __ALTERA_ALT_I2C_H__
36 #define __ALTERA_ALT_I2C_H__
93 #define ALT_I2C_CON_MST_MOD_E_DIS 0x0
99 #define ALT_I2C_CON_MST_MOD_E_EN 0x1
102 #define ALT_I2C_CON_MST_MOD_LSB 0
104 #define ALT_I2C_CON_MST_MOD_MSB 0
106 #define ALT_I2C_CON_MST_MOD_WIDTH 1
108 #define ALT_I2C_CON_MST_MOD_SET_MSK 0x00000001
110 #define ALT_I2C_CON_MST_MOD_CLR_MSK 0xfffffffe
112 #define ALT_I2C_CON_MST_MOD_RESET 0x1
114 #define ALT_I2C_CON_MST_MOD_GET(value) (((value) & 0x00000001) >> 0)
116 #define ALT_I2C_CON_MST_MOD_SET(value) (((value) << 0) & 0x00000001)
141 #define ALT_I2C_CON_SPEED_E_STANDARD 0x1
147 #define ALT_I2C_CON_SPEED_E_FAST 0x2
150 #define ALT_I2C_CON_SPEED_LSB 1
152 #define ALT_I2C_CON_SPEED_MSB 2
154 #define ALT_I2C_CON_SPEED_WIDTH 2
156 #define ALT_I2C_CON_SPEED_SET_MSK 0x00000006
158 #define ALT_I2C_CON_SPEED_CLR_MSK 0xfffffff9
160 #define ALT_I2C_CON_SPEED_RESET 0x2
162 #define ALT_I2C_CON_SPEED_GET(value) (((value) & 0x00000006) >> 1)
164 #define ALT_I2C_CON_SPEED_SET(value) (((value) << 1) & 0x00000006)
189 #define ALT_I2C_CON_IC_10BITADDR_SLV_E_SLVADDR7BIT 0x0
195 #define ALT_I2C_CON_IC_10BITADDR_SLV_E_SLVADDR10BIT 0x1
198 #define ALT_I2C_CON_IC_10BITADDR_SLV_LSB 3
200 #define ALT_I2C_CON_IC_10BITADDR_SLV_MSB 3
202 #define ALT_I2C_CON_IC_10BITADDR_SLV_WIDTH 1
204 #define ALT_I2C_CON_IC_10BITADDR_SLV_SET_MSK 0x00000008
206 #define ALT_I2C_CON_IC_10BITADDR_SLV_CLR_MSK 0xfffffff7
208 #define ALT_I2C_CON_IC_10BITADDR_SLV_RESET 0x1
210 #define ALT_I2C_CON_IC_10BITADDR_SLV_GET(value) (((value) & 0x00000008) >> 3)
212 #define ALT_I2C_CON_IC_10BITADDR_SLV_SET(value) (((value) << 3) & 0x00000008)
235 #define ALT_I2C_CON_IC_10BITADDR_MST_E_MSTADDR7BIT 0x0
241 #define ALT_I2C_CON_IC_10BITADDR_MST_E_MSTADDR10BIT 0x1
244 #define ALT_I2C_CON_IC_10BITADDR_MST_LSB 4
246 #define ALT_I2C_CON_IC_10BITADDR_MST_MSB 4
248 #define ALT_I2C_CON_IC_10BITADDR_MST_WIDTH 1
250 #define ALT_I2C_CON_IC_10BITADDR_MST_SET_MSK 0x00000010
252 #define ALT_I2C_CON_IC_10BITADDR_MST_CLR_MSK 0xffffffef
254 #define ALT_I2C_CON_IC_10BITADDR_MST_RESET 0x1
256 #define ALT_I2C_CON_IC_10BITADDR_MST_GET(value) (((value) & 0x00000010) >> 4)
258 #define ALT_I2C_CON_IC_10BITADDR_MST_SET(value) (((value) << 4) & 0x00000010)
300 #define ALT_I2C_CON_IC_RESTART_EN_E_DIS 0x0
306 #define ALT_I2C_CON_IC_RESTART_EN_E_EN 0x1
309 #define ALT_I2C_CON_IC_RESTART_EN_LSB 5
311 #define ALT_I2C_CON_IC_RESTART_EN_MSB 5
313 #define ALT_I2C_CON_IC_RESTART_EN_WIDTH 1
315 #define ALT_I2C_CON_IC_RESTART_EN_SET_MSK 0x00000020
317 #define ALT_I2C_CON_IC_RESTART_EN_CLR_MSK 0xffffffdf
319 #define ALT_I2C_CON_IC_RESTART_EN_RESET 0x1
321 #define ALT_I2C_CON_IC_RESTART_EN_GET(value) (((value) & 0x00000020) >> 5)
323 #define ALT_I2C_CON_IC_RESTART_EN_SET(value) (((value) << 5) & 0x00000020)
349 #define ALT_I2C_CON_IC_SLV_DIS_E_DIS 0x1
355 #define ALT_I2C_CON_IC_SLV_DIS_E_EN 0x0
358 #define ALT_I2C_CON_IC_SLV_DIS_LSB 6
360 #define ALT_I2C_CON_IC_SLV_DIS_MSB 6
362 #define ALT_I2C_CON_IC_SLV_DIS_WIDTH 1
364 #define ALT_I2C_CON_IC_SLV_DIS_SET_MSK 0x00000040
366 #define ALT_I2C_CON_IC_SLV_DIS_CLR_MSK 0xffffffbf
368 #define ALT_I2C_CON_IC_SLV_DIS_RESET 0x1
370 #define ALT_I2C_CON_IC_SLV_DIS_GET(value) (((value) & 0x00000040) >> 6)
372 #define ALT_I2C_CON_IC_SLV_DIS_SET(value) (((value) << 6) & 0x00000040)
387 uint32_t master_mode : 1;
389 uint32_t ic_10bitaddr_slave : 1;
390 uint32_t ic_10bitaddr_master : 1;
391 uint32_t ic_restart_en : 1;
392 uint32_t ic_slave_disable : 1;
397 typedef volatile struct ALT_I2C_CON_s ALT_I2C_CON_t;
401 #define ALT_I2C_CON_OFST 0x0
403 #define ALT_I2C_CON_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CON_OFST))
443 #define ALT_I2C_TAR_IC_TAR_LSB 0
445 #define ALT_I2C_TAR_IC_TAR_MSB 9
447 #define ALT_I2C_TAR_IC_TAR_WIDTH 10
449 #define ALT_I2C_TAR_IC_TAR_SET_MSK 0x000003ff
451 #define ALT_I2C_TAR_IC_TAR_CLR_MSK 0xfffffc00
453 #define ALT_I2C_TAR_IC_TAR_RESET 0x55
455 #define ALT_I2C_TAR_IC_TAR_GET(value) (((value) & 0x000003ff) >> 0)
457 #define ALT_I2C_TAR_IC_TAR_SET(value) (((value) << 0) & 0x000003ff)
484 #define ALT_I2C_TAR_GC_OR_START_E_GENCALL 0x0
490 #define ALT_I2C_TAR_GC_OR_START_E_STARTBYTE 0x1
493 #define ALT_I2C_TAR_GC_OR_START_LSB 10
495 #define ALT_I2C_TAR_GC_OR_START_MSB 10
497 #define ALT_I2C_TAR_GC_OR_START_WIDTH 1
499 #define ALT_I2C_TAR_GC_OR_START_SET_MSK 0x00000400
501 #define ALT_I2C_TAR_GC_OR_START_CLR_MSK 0xfffffbff
503 #define ALT_I2C_TAR_GC_OR_START_RESET 0x0
505 #define ALT_I2C_TAR_GC_OR_START_GET(value) (((value) & 0x00000400) >> 10)
507 #define ALT_I2C_TAR_GC_OR_START_SET(value) (((value) << 10) & 0x00000400)
532 #define ALT_I2C_TAR_SPECIAL_E_GENCALL 0x0
538 #define ALT_I2C_TAR_SPECIAL_E_STARTBYTE 0x1
541 #define ALT_I2C_TAR_SPECIAL_LSB 11
543 #define ALT_I2C_TAR_SPECIAL_MSB 11
545 #define ALT_I2C_TAR_SPECIAL_WIDTH 1
547 #define ALT_I2C_TAR_SPECIAL_SET_MSK 0x00000800
549 #define ALT_I2C_TAR_SPECIAL_CLR_MSK 0xfffff7ff
551 #define ALT_I2C_TAR_SPECIAL_RESET 0x0
553 #define ALT_I2C_TAR_SPECIAL_GET(value) (((value) & 0x00000800) >> 11)
555 #define ALT_I2C_TAR_SPECIAL_SET(value) (((value) << 11) & 0x00000800)
578 #define ALT_I2C_TAR_IC_10BITADDR_MST_E_START7 0x0
584 #define ALT_I2C_TAR_IC_10BITADDR_MST_E_START10 0x1
587 #define ALT_I2C_TAR_IC_10BITADDR_MST_LSB 12
589 #define ALT_I2C_TAR_IC_10BITADDR_MST_MSB 12
591 #define ALT_I2C_TAR_IC_10BITADDR_MST_WIDTH 1
593 #define ALT_I2C_TAR_IC_10BITADDR_MST_SET_MSK 0x00001000
595 #define ALT_I2C_TAR_IC_10BITADDR_MST_CLR_MSK 0xffffefff
597 #define ALT_I2C_TAR_IC_10BITADDR_MST_RESET 0x1
599 #define ALT_I2C_TAR_IC_10BITADDR_MST_GET(value) (((value) & 0x00001000) >> 12)
601 #define ALT_I2C_TAR_IC_10BITADDR_MST_SET(value) (((value) << 12) & 0x00001000)
616 uint32_t ic_tar : 10;
617 uint32_t gc_or_start : 1;
618 uint32_t special : 1;
619 uint32_t ic_10bitaddr_master : 1;
624 typedef volatile struct ALT_I2C_TAR_s ALT_I2C_TAR_t;
628 #define ALT_I2C_TAR_OFST 0x4
630 #define ALT_I2C_TAR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_TAR_OFST))
665 #define ALT_I2C_SAR_IC_SAR_LSB 0
667 #define ALT_I2C_SAR_IC_SAR_MSB 9
669 #define ALT_I2C_SAR_IC_SAR_WIDTH 10
671 #define ALT_I2C_SAR_IC_SAR_SET_MSK 0x000003ff
673 #define ALT_I2C_SAR_IC_SAR_CLR_MSK 0xfffffc00
675 #define ALT_I2C_SAR_IC_SAR_RESET 0x55
677 #define ALT_I2C_SAR_IC_SAR_GET(value) (((value) & 0x000003ff) >> 0)
679 #define ALT_I2C_SAR_IC_SAR_SET(value) (((value) << 0) & 0x000003ff)
694 uint32_t ic_sar : 10;
699 typedef volatile struct ALT_I2C_SAR_s ALT_I2C_SAR_t;
703 #define ALT_I2C_SAR_OFST 0x8
705 #define ALT_I2C_SAR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_SAR_OFST))
736 #define ALT_I2C_DATA_CMD_DAT_LSB 0
738 #define ALT_I2C_DATA_CMD_DAT_MSB 7
740 #define ALT_I2C_DATA_CMD_DAT_WIDTH 8
742 #define ALT_I2C_DATA_CMD_DAT_SET_MSK 0x000000ff
744 #define ALT_I2C_DATA_CMD_DAT_CLR_MSK 0xffffff00
746 #define ALT_I2C_DATA_CMD_DAT_RESET 0x0
748 #define ALT_I2C_DATA_CMD_DAT_GET(value) (((value) & 0x000000ff) >> 0)
750 #define ALT_I2C_DATA_CMD_DAT_SET(value) (((value) << 0) & 0x000000ff)
787 #define ALT_I2C_DATA_CMD_CMD_E_RD 0x1
793 #define ALT_I2C_DATA_CMD_CMD_E_WR 0x0
796 #define ALT_I2C_DATA_CMD_CMD_LSB 8
798 #define ALT_I2C_DATA_CMD_CMD_MSB 8
800 #define ALT_I2C_DATA_CMD_CMD_WIDTH 1
802 #define ALT_I2C_DATA_CMD_CMD_SET_MSK 0x00000100
804 #define ALT_I2C_DATA_CMD_CMD_CLR_MSK 0xfffffeff
806 #define ALT_I2C_DATA_CMD_CMD_RESET 0x0
808 #define ALT_I2C_DATA_CMD_CMD_GET(value) (((value) & 0x00000100) >> 8)
810 #define ALT_I2C_DATA_CMD_CMD_SET(value) (((value) << 8) & 0x00000100)
842 #define ALT_I2C_DATA_CMD_STOP_E_STOP 0x1
848 #define ALT_I2C_DATA_CMD_STOP_E_NO_STOP 0x0
851 #define ALT_I2C_DATA_CMD_STOP_LSB 9
853 #define ALT_I2C_DATA_CMD_STOP_MSB 9
855 #define ALT_I2C_DATA_CMD_STOP_WIDTH 1
857 #define ALT_I2C_DATA_CMD_STOP_SET_MSK 0x00000200
859 #define ALT_I2C_DATA_CMD_STOP_CLR_MSK 0xfffffdff
861 #define ALT_I2C_DATA_CMD_STOP_RESET 0x0
863 #define ALT_I2C_DATA_CMD_STOP_GET(value) (((value) & 0x00000200) >> 9)
865 #define ALT_I2C_DATA_CMD_STOP_SET(value) (((value) << 9) & 0x00000200)
895 #define ALT_I2C_DATA_CMD_RESTART_E_RESTART 0x1
901 #define ALT_I2C_DATA_CMD_RESTART_E_RESTART_ON_DIR_CHANGE 0x0
904 #define ALT_I2C_DATA_CMD_RESTART_LSB 10
906 #define ALT_I2C_DATA_CMD_RESTART_MSB 10
908 #define ALT_I2C_DATA_CMD_RESTART_WIDTH 1
910 #define ALT_I2C_DATA_CMD_RESTART_SET_MSK 0x00000400
912 #define ALT_I2C_DATA_CMD_RESTART_CLR_MSK 0xfffffbff
914 #define ALT_I2C_DATA_CMD_RESTART_RESET 0x0
916 #define ALT_I2C_DATA_CMD_RESTART_GET(value) (((value) & 0x00000400) >> 10)
918 #define ALT_I2C_DATA_CMD_RESTART_SET(value) (((value) << 10) & 0x00000400)
931 struct ALT_I2C_DATA_CMD_s
936 uint32_t restart : 1;
941 typedef volatile struct ALT_I2C_DATA_CMD_s ALT_I2C_DATA_CMD_t;
945 #define ALT_I2C_DATA_CMD_OFST 0x10
947 #define ALT_I2C_DATA_CMD_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_DATA_CMD_OFST))
981 #define ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_LSB 0
983 #define ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_MSB 15
985 #define ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_WIDTH 16
987 #define ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_SET_MSK 0x0000ffff
989 #define ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_CLR_MSK 0xffff0000
991 #define ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_RESET 0x190
993 #define ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_GET(value) (((value) & 0x0000ffff) >> 0)
995 #define ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_SET(value) (((value) << 0) & 0x0000ffff)
1008 struct ALT_I2C_SS_SCL_HCNT_s
1010 uint32_t ic_ss_scl_hcnt : 16;
1015 typedef volatile struct ALT_I2C_SS_SCL_HCNT_s ALT_I2C_SS_SCL_HCNT_t;
1019 #define ALT_I2C_SS_SCL_HCNT_OFST 0x14
1021 #define ALT_I2C_SS_SCL_HCNT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_SS_SCL_HCNT_OFST))
1051 #define ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_LSB 0
1053 #define ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_MSB 15
1055 #define ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_WIDTH 16
1057 #define ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_SET_MSK 0x0000ffff
1059 #define ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_CLR_MSK 0xffff0000
1061 #define ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_RESET 0x1d6
1063 #define ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_GET(value) (((value) & 0x0000ffff) >> 0)
1065 #define ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_SET(value) (((value) << 0) & 0x0000ffff)
1067 #ifndef __ASSEMBLY__
1078 struct ALT_I2C_SS_SCL_LCNT_s
1080 uint32_t ic_ss_scl_lcnt : 16;
1085 typedef volatile struct ALT_I2C_SS_SCL_LCNT_s ALT_I2C_SS_SCL_LCNT_t;
1089 #define ALT_I2C_SS_SCL_LCNT_OFST 0x18
1091 #define ALT_I2C_SS_SCL_LCNT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_SS_SCL_LCNT_OFST))
1123 #define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_LSB 0
1125 #define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_MSB 15
1127 #define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_WIDTH 16
1129 #define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_SET_MSK 0x0000ffff
1131 #define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_CLR_MSK 0xffff0000
1133 #define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_RESET 0x3c
1135 #define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_GET(value) (((value) & 0x0000ffff) >> 0)
1137 #define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_SET(value) (((value) << 0) & 0x0000ffff)
1139 #ifndef __ASSEMBLY__
1150 struct ALT_I2C_FS_SCL_HCNT_s
1152 uint32_t ic_fs_scl_hcnt : 16;
1157 typedef volatile struct ALT_I2C_FS_SCL_HCNT_s ALT_I2C_FS_SCL_HCNT_t;
1161 #define ALT_I2C_FS_SCL_HCNT_OFST 0x1c
1163 #define ALT_I2C_FS_SCL_HCNT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_FS_SCL_HCNT_OFST))
1193 #define ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_LSB 0
1195 #define ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_MSB 15
1197 #define ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_WIDTH 16
1199 #define ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_SET_MSK 0x0000ffff
1201 #define ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_CLR_MSK 0xffff0000
1203 #define ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_RESET 0x82
1205 #define ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_GET(value) (((value) & 0x0000ffff) >> 0)
1207 #define ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_SET(value) (((value) << 0) & 0x0000ffff)
1209 #ifndef __ASSEMBLY__
1220 struct ALT_I2C_FS_SCL_LCNT_s
1222 uint32_t ic_fs_scl_lcnt : 16;
1227 typedef volatile struct ALT_I2C_FS_SCL_LCNT_s ALT_I2C_FS_SCL_LCNT_t;
1231 #define ALT_I2C_FS_SCL_LCNT_OFST 0x20
1233 #define ALT_I2C_FS_SCL_LCNT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_FS_SCL_LCNT_OFST))
1274 #define ALT_I2C_INTR_STAT_R_RX_UNDER_LSB 0
1276 #define ALT_I2C_INTR_STAT_R_RX_UNDER_MSB 0
1278 #define ALT_I2C_INTR_STAT_R_RX_UNDER_WIDTH 1
1280 #define ALT_I2C_INTR_STAT_R_RX_UNDER_SET_MSK 0x00000001
1282 #define ALT_I2C_INTR_STAT_R_RX_UNDER_CLR_MSK 0xfffffffe
1284 #define ALT_I2C_INTR_STAT_R_RX_UNDER_RESET 0x0
1286 #define ALT_I2C_INTR_STAT_R_RX_UNDER_GET(value) (((value) & 0x00000001) >> 0)
1288 #define ALT_I2C_INTR_STAT_R_RX_UNDER_SET(value) (((value) << 0) & 0x00000001)
1303 #define ALT_I2C_INTR_STAT_R_RX_OVER_LSB 1
1305 #define ALT_I2C_INTR_STAT_R_RX_OVER_MSB 1
1307 #define ALT_I2C_INTR_STAT_R_RX_OVER_WIDTH 1
1309 #define ALT_I2C_INTR_STAT_R_RX_OVER_SET_MSK 0x00000002
1311 #define ALT_I2C_INTR_STAT_R_RX_OVER_CLR_MSK 0xfffffffd
1313 #define ALT_I2C_INTR_STAT_R_RX_OVER_RESET 0x0
1315 #define ALT_I2C_INTR_STAT_R_RX_OVER_GET(value) (((value) & 0x00000002) >> 1)
1317 #define ALT_I2C_INTR_STAT_R_RX_OVER_SET(value) (((value) << 1) & 0x00000002)
1333 #define ALT_I2C_INTR_STAT_R_RX_FULL_LSB 2
1335 #define ALT_I2C_INTR_STAT_R_RX_FULL_MSB 2
1337 #define ALT_I2C_INTR_STAT_R_RX_FULL_WIDTH 1
1339 #define ALT_I2C_INTR_STAT_R_RX_FULL_SET_MSK 0x00000004
1341 #define ALT_I2C_INTR_STAT_R_RX_FULL_CLR_MSK 0xfffffffb
1343 #define ALT_I2C_INTR_STAT_R_RX_FULL_RESET 0x0
1345 #define ALT_I2C_INTR_STAT_R_RX_FULL_GET(value) (((value) & 0x00000004) >> 2)
1347 #define ALT_I2C_INTR_STAT_R_RX_FULL_SET(value) (((value) << 2) & 0x00000004)
1361 #define ALT_I2C_INTR_STAT_R_TX_OVER_LSB 3
1363 #define ALT_I2C_INTR_STAT_R_TX_OVER_MSB 3
1365 #define ALT_I2C_INTR_STAT_R_TX_OVER_WIDTH 1
1367 #define ALT_I2C_INTR_STAT_R_TX_OVER_SET_MSK 0x00000008
1369 #define ALT_I2C_INTR_STAT_R_TX_OVER_CLR_MSK 0xfffffff7
1371 #define ALT_I2C_INTR_STAT_R_TX_OVER_RESET 0x0
1373 #define ALT_I2C_INTR_STAT_R_TX_OVER_GET(value) (((value) & 0x00000008) >> 3)
1375 #define ALT_I2C_INTR_STAT_R_TX_OVER_SET(value) (((value) << 3) & 0x00000008)
1391 #define ALT_I2C_INTR_STAT_R_TX_EMPTY_LSB 4
1393 #define ALT_I2C_INTR_STAT_R_TX_EMPTY_MSB 4
1395 #define ALT_I2C_INTR_STAT_R_TX_EMPTY_WIDTH 1
1397 #define ALT_I2C_INTR_STAT_R_TX_EMPTY_SET_MSK 0x00000010
1399 #define ALT_I2C_INTR_STAT_R_TX_EMPTY_CLR_MSK 0xffffffef
1401 #define ALT_I2C_INTR_STAT_R_TX_EMPTY_RESET 0x0
1403 #define ALT_I2C_INTR_STAT_R_TX_EMPTY_GET(value) (((value) & 0x00000010) >> 4)
1405 #define ALT_I2C_INTR_STAT_R_TX_EMPTY_SET(value) (((value) << 4) & 0x00000010)
1422 #define ALT_I2C_INTR_STAT_R_RD_REQ_LSB 5
1424 #define ALT_I2C_INTR_STAT_R_RD_REQ_MSB 5
1426 #define ALT_I2C_INTR_STAT_R_RD_REQ_WIDTH 1
1428 #define ALT_I2C_INTR_STAT_R_RD_REQ_SET_MSK 0x00000020
1430 #define ALT_I2C_INTR_STAT_R_RD_REQ_CLR_MSK 0xffffffdf
1432 #define ALT_I2C_INTR_STAT_R_RD_REQ_RESET 0x0
1434 #define ALT_I2C_INTR_STAT_R_RD_REQ_GET(value) (((value) & 0x00000020) >> 5)
1436 #define ALT_I2C_INTR_STAT_R_RD_REQ_SET(value) (((value) << 5) & 0x00000020)
1456 #define ALT_I2C_INTR_STAT_R_TX_ABRT_LSB 6
1458 #define ALT_I2C_INTR_STAT_R_TX_ABRT_MSB 6
1460 #define ALT_I2C_INTR_STAT_R_TX_ABRT_WIDTH 1
1462 #define ALT_I2C_INTR_STAT_R_TX_ABRT_SET_MSK 0x00000040
1464 #define ALT_I2C_INTR_STAT_R_TX_ABRT_CLR_MSK 0xffffffbf
1466 #define ALT_I2C_INTR_STAT_R_TX_ABRT_RESET 0x0
1468 #define ALT_I2C_INTR_STAT_R_TX_ABRT_GET(value) (((value) & 0x00000040) >> 6)
1470 #define ALT_I2C_INTR_STAT_R_TX_ABRT_SET(value) (((value) << 6) & 0x00000040)
1483 #define ALT_I2C_INTR_STAT_R_RX_DONE_LSB 7
1485 #define ALT_I2C_INTR_STAT_R_RX_DONE_MSB 7
1487 #define ALT_I2C_INTR_STAT_R_RX_DONE_WIDTH 1
1489 #define ALT_I2C_INTR_STAT_R_RX_DONE_SET_MSK 0x00000080
1491 #define ALT_I2C_INTR_STAT_R_RX_DONE_CLR_MSK 0xffffff7f
1493 #define ALT_I2C_INTR_STAT_R_RX_DONE_RESET 0x0
1495 #define ALT_I2C_INTR_STAT_R_RX_DONE_GET(value) (((value) & 0x00000080) >> 7)
1497 #define ALT_I2C_INTR_STAT_R_RX_DONE_SET(value) (((value) << 7) & 0x00000080)
1521 #define ALT_I2C_INTR_STAT_R_ACTIVITY_LSB 8
1523 #define ALT_I2C_INTR_STAT_R_ACTIVITY_MSB 8
1525 #define ALT_I2C_INTR_STAT_R_ACTIVITY_WIDTH 1
1527 #define ALT_I2C_INTR_STAT_R_ACTIVITY_SET_MSK 0x00000100
1529 #define ALT_I2C_INTR_STAT_R_ACTIVITY_CLR_MSK 0xfffffeff
1531 #define ALT_I2C_INTR_STAT_R_ACTIVITY_RESET 0x0
1533 #define ALT_I2C_INTR_STAT_R_ACTIVITY_GET(value) (((value) & 0x00000100) >> 8)
1535 #define ALT_I2C_INTR_STAT_R_ACTIVITY_SET(value) (((value) << 8) & 0x00000100)
1547 #define ALT_I2C_INTR_STAT_R_STOP_DET_LSB 9
1549 #define ALT_I2C_INTR_STAT_R_STOP_DET_MSB 9
1551 #define ALT_I2C_INTR_STAT_R_STOP_DET_WIDTH 1
1553 #define ALT_I2C_INTR_STAT_R_STOP_DET_SET_MSK 0x00000200
1555 #define ALT_I2C_INTR_STAT_R_STOP_DET_CLR_MSK 0xfffffdff
1557 #define ALT_I2C_INTR_STAT_R_STOP_DET_RESET 0x0
1559 #define ALT_I2C_INTR_STAT_R_STOP_DET_GET(value) (((value) & 0x00000200) >> 9)
1561 #define ALT_I2C_INTR_STAT_R_STOP_DET_SET(value) (((value) << 9) & 0x00000200)
1573 #define ALT_I2C_INTR_STAT_R_START_DET_LSB 10
1575 #define ALT_I2C_INTR_STAT_R_START_DET_MSB 10
1577 #define ALT_I2C_INTR_STAT_R_START_DET_WIDTH 1
1579 #define ALT_I2C_INTR_STAT_R_START_DET_SET_MSK 0x00000400
1581 #define ALT_I2C_INTR_STAT_R_START_DET_CLR_MSK 0xfffffbff
1583 #define ALT_I2C_INTR_STAT_R_START_DET_RESET 0x0
1585 #define ALT_I2C_INTR_STAT_R_START_DET_GET(value) (((value) & 0x00000400) >> 10)
1587 #define ALT_I2C_INTR_STAT_R_START_DET_SET(value) (((value) << 10) & 0x00000400)
1601 #define ALT_I2C_INTR_STAT_R_GEN_CALL_LSB 11
1603 #define ALT_I2C_INTR_STAT_R_GEN_CALL_MSB 11
1605 #define ALT_I2C_INTR_STAT_R_GEN_CALL_WIDTH 1
1607 #define ALT_I2C_INTR_STAT_R_GEN_CALL_SET_MSK 0x00000800
1609 #define ALT_I2C_INTR_STAT_R_GEN_CALL_CLR_MSK 0xfffff7ff
1611 #define ALT_I2C_INTR_STAT_R_GEN_CALL_RESET 0x0
1613 #define ALT_I2C_INTR_STAT_R_GEN_CALL_GET(value) (((value) & 0x00000800) >> 11)
1615 #define ALT_I2C_INTR_STAT_R_GEN_CALL_SET(value) (((value) << 11) & 0x00000800)
1617 #ifndef __ASSEMBLY__
1628 struct ALT_I2C_INTR_STAT_s
1630 const uint32_t r_rx_under : 1;
1631 const uint32_t r_rx_over : 1;
1632 const uint32_t r_rx_full : 1;
1633 const uint32_t r_tx_over : 1;
1634 const uint32_t r_tx_empty : 1;
1635 const uint32_t r_rd_req : 1;
1636 const uint32_t r_tx_abrt : 1;
1637 const uint32_t r_rx_done : 1;
1638 const uint32_t r_activity : 1;
1639 const uint32_t r_stop_det : 1;
1640 const uint32_t r_start_det : 1;
1641 const uint32_t r_gen_call : 1;
1646 typedef volatile struct ALT_I2C_INTR_STAT_s ALT_I2C_INTR_STAT_t;
1650 #define ALT_I2C_INTR_STAT_OFST 0x2c
1652 #define ALT_I2C_INTR_STAT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_INTR_STAT_OFST))
1690 #define ALT_I2C_INTR_MSK_M_RX_UNDER_LSB 0
1692 #define ALT_I2C_INTR_MSK_M_RX_UNDER_MSB 0
1694 #define ALT_I2C_INTR_MSK_M_RX_UNDER_WIDTH 1
1696 #define ALT_I2C_INTR_MSK_M_RX_UNDER_SET_MSK 0x00000001
1698 #define ALT_I2C_INTR_MSK_M_RX_UNDER_CLR_MSK 0xfffffffe
1700 #define ALT_I2C_INTR_MSK_M_RX_UNDER_RESET 0x1
1702 #define ALT_I2C_INTR_MSK_M_RX_UNDER_GET(value) (((value) & 0x00000001) >> 0)
1704 #define ALT_I2C_INTR_MSK_M_RX_UNDER_SET(value) (((value) << 0) & 0x00000001)
1719 #define ALT_I2C_INTR_MSK_M_RX_OVER_LSB 1
1721 #define ALT_I2C_INTR_MSK_M_RX_OVER_MSB 1
1723 #define ALT_I2C_INTR_MSK_M_RX_OVER_WIDTH 1
1725 #define ALT_I2C_INTR_MSK_M_RX_OVER_SET_MSK 0x00000002
1727 #define ALT_I2C_INTR_MSK_M_RX_OVER_CLR_MSK 0xfffffffd
1729 #define ALT_I2C_INTR_MSK_M_RX_OVER_RESET 0x1
1731 #define ALT_I2C_INTR_MSK_M_RX_OVER_GET(value) (((value) & 0x00000002) >> 1)
1733 #define ALT_I2C_INTR_MSK_M_RX_OVER_SET(value) (((value) << 1) & 0x00000002)
1749 #define ALT_I2C_INTR_MSK_M_RX_FULL_LSB 2
1751 #define ALT_I2C_INTR_MSK_M_RX_FULL_MSB 2
1753 #define ALT_I2C_INTR_MSK_M_RX_FULL_WIDTH 1
1755 #define ALT_I2C_INTR_MSK_M_RX_FULL_SET_MSK 0x00000004
1757 #define ALT_I2C_INTR_MSK_M_RX_FULL_CLR_MSK 0xfffffffb
1759 #define ALT_I2C_INTR_MSK_M_RX_FULL_RESET 0x1
1761 #define ALT_I2C_INTR_MSK_M_RX_FULL_GET(value) (((value) & 0x00000004) >> 2)
1763 #define ALT_I2C_INTR_MSK_M_RX_FULL_SET(value) (((value) << 2) & 0x00000004)
1777 #define ALT_I2C_INTR_MSK_M_TX_OVER_LSB 3
1779 #define ALT_I2C_INTR_MSK_M_TX_OVER_MSB 3
1781 #define ALT_I2C_INTR_MSK_M_TX_OVER_WIDTH 1
1783 #define ALT_I2C_INTR_MSK_M_TX_OVER_SET_MSK 0x00000008
1785 #define ALT_I2C_INTR_MSK_M_TX_OVER_CLR_MSK 0xfffffff7
1787 #define ALT_I2C_INTR_MSK_M_TX_OVER_RESET 0x1
1789 #define ALT_I2C_INTR_MSK_M_TX_OVER_GET(value) (((value) & 0x00000008) >> 3)
1791 #define ALT_I2C_INTR_MSK_M_TX_OVER_SET(value) (((value) << 3) & 0x00000008)
1808 #define ALT_I2C_INTR_MSK_M_TX_EMPTY_LSB 4
1810 #define ALT_I2C_INTR_MSK_M_TX_EMPTY_MSB 4
1812 #define ALT_I2C_INTR_MSK_M_TX_EMPTY_WIDTH 1
1814 #define ALT_I2C_INTR_MSK_M_TX_EMPTY_SET_MSK 0x00000010
1816 #define ALT_I2C_INTR_MSK_M_TX_EMPTY_CLR_MSK 0xffffffef
1818 #define ALT_I2C_INTR_MSK_M_TX_EMPTY_RESET 0x1
1820 #define ALT_I2C_INTR_MSK_M_TX_EMPTY_GET(value) (((value) & 0x00000010) >> 4)
1822 #define ALT_I2C_INTR_MSK_M_TX_EMPTY_SET(value) (((value) << 4) & 0x00000010)
1839 #define ALT_I2C_INTR_MSK_M_RD_REQ_LSB 5
1841 #define ALT_I2C_INTR_MSK_M_RD_REQ_MSB 5
1843 #define ALT_I2C_INTR_MSK_M_RD_REQ_WIDTH 1
1845 #define ALT_I2C_INTR_MSK_M_RD_REQ_SET_MSK 0x00000020
1847 #define ALT_I2C_INTR_MSK_M_RD_REQ_CLR_MSK 0xffffffdf
1849 #define ALT_I2C_INTR_MSK_M_RD_REQ_RESET 0x1
1851 #define ALT_I2C_INTR_MSK_M_RD_REQ_GET(value) (((value) & 0x00000020) >> 5)
1853 #define ALT_I2C_INTR_MSK_M_RD_REQ_SET(value) (((value) << 5) & 0x00000020)
1873 #define ALT_I2C_INTR_MSK_M_TX_ABRT_LSB 6
1875 #define ALT_I2C_INTR_MSK_M_TX_ABRT_MSB 6
1877 #define ALT_I2C_INTR_MSK_M_TX_ABRT_WIDTH 1
1879 #define ALT_I2C_INTR_MSK_M_TX_ABRT_SET_MSK 0x00000040
1881 #define ALT_I2C_INTR_MSK_M_TX_ABRT_CLR_MSK 0xffffffbf
1883 #define ALT_I2C_INTR_MSK_M_TX_ABRT_RESET 0x1
1885 #define ALT_I2C_INTR_MSK_M_TX_ABRT_GET(value) (((value) & 0x00000040) >> 6)
1887 #define ALT_I2C_INTR_MSK_M_TX_ABRT_SET(value) (((value) << 6) & 0x00000040)
1900 #define ALT_I2C_INTR_MSK_M_RX_DONE_LSB 7
1902 #define ALT_I2C_INTR_MSK_M_RX_DONE_MSB 7
1904 #define ALT_I2C_INTR_MSK_M_RX_DONE_WIDTH 1
1906 #define ALT_I2C_INTR_MSK_M_RX_DONE_SET_MSK 0x00000080
1908 #define ALT_I2C_INTR_MSK_M_RX_DONE_CLR_MSK 0xffffff7f
1910 #define ALT_I2C_INTR_MSK_M_RX_DONE_RESET 0x1
1912 #define ALT_I2C_INTR_MSK_M_RX_DONE_GET(value) (((value) & 0x00000080) >> 7)
1914 #define ALT_I2C_INTR_MSK_M_RX_DONE_SET(value) (((value) << 7) & 0x00000080)
1938 #define ALT_I2C_INTR_MSK_M_ACTIVITY_LSB 8
1940 #define ALT_I2C_INTR_MSK_M_ACTIVITY_MSB 8
1942 #define ALT_I2C_INTR_MSK_M_ACTIVITY_WIDTH 1
1944 #define ALT_I2C_INTR_MSK_M_ACTIVITY_SET_MSK 0x00000100
1946 #define ALT_I2C_INTR_MSK_M_ACTIVITY_CLR_MSK 0xfffffeff
1948 #define ALT_I2C_INTR_MSK_M_ACTIVITY_RESET 0x0
1950 #define ALT_I2C_INTR_MSK_M_ACTIVITY_GET(value) (((value) & 0x00000100) >> 8)
1952 #define ALT_I2C_INTR_MSK_M_ACTIVITY_SET(value) (((value) << 8) & 0x00000100)
1964 #define ALT_I2C_INTR_MSK_M_STOP_DET_LSB 9
1966 #define ALT_I2C_INTR_MSK_M_STOP_DET_MSB 9
1968 #define ALT_I2C_INTR_MSK_M_STOP_DET_WIDTH 1
1970 #define ALT_I2C_INTR_MSK_M_STOP_DET_SET_MSK 0x00000200
1972 #define ALT_I2C_INTR_MSK_M_STOP_DET_CLR_MSK 0xfffffdff
1974 #define ALT_I2C_INTR_MSK_M_STOP_DET_RESET 0x0
1976 #define ALT_I2C_INTR_MSK_M_STOP_DET_GET(value) (((value) & 0x00000200) >> 9)
1978 #define ALT_I2C_INTR_MSK_M_STOP_DET_SET(value) (((value) << 9) & 0x00000200)
1990 #define ALT_I2C_INTR_MSK_M_START_DET_LSB 10
1992 #define ALT_I2C_INTR_MSK_M_START_DET_MSB 10
1994 #define ALT_I2C_INTR_MSK_M_START_DET_WIDTH 1
1996 #define ALT_I2C_INTR_MSK_M_START_DET_SET_MSK 0x00000400
1998 #define ALT_I2C_INTR_MSK_M_START_DET_CLR_MSK 0xfffffbff
2000 #define ALT_I2C_INTR_MSK_M_START_DET_RESET 0x0
2002 #define ALT_I2C_INTR_MSK_M_START_DET_GET(value) (((value) & 0x00000400) >> 10)
2004 #define ALT_I2C_INTR_MSK_M_START_DET_SET(value) (((value) << 10) & 0x00000400)
2018 #define ALT_I2C_INTR_MSK_M_GEN_CALL_LSB 11
2020 #define ALT_I2C_INTR_MSK_M_GEN_CALL_MSB 11
2022 #define ALT_I2C_INTR_MSK_M_GEN_CALL_WIDTH 1
2024 #define ALT_I2C_INTR_MSK_M_GEN_CALL_SET_MSK 0x00000800
2026 #define ALT_I2C_INTR_MSK_M_GEN_CALL_CLR_MSK 0xfffff7ff
2028 #define ALT_I2C_INTR_MSK_M_GEN_CALL_RESET 0x1
2030 #define ALT_I2C_INTR_MSK_M_GEN_CALL_GET(value) (((value) & 0x00000800) >> 11)
2032 #define ALT_I2C_INTR_MSK_M_GEN_CALL_SET(value) (((value) << 11) & 0x00000800)
2034 #ifndef __ASSEMBLY__
2045 struct ALT_I2C_INTR_MSK_s
2047 uint32_t m_rx_under : 1;
2048 uint32_t m_rx_over : 1;
2049 uint32_t m_rx_full : 1;
2050 uint32_t m_tx_over : 1;
2051 uint32_t m_tx_empty : 1;
2052 uint32_t m_rd_req : 1;
2053 uint32_t m_tx_abrt : 1;
2054 uint32_t m_rx_done : 1;
2055 uint32_t m_activity : 1;
2056 uint32_t m_stop_det : 1;
2057 uint32_t m_start_det : 1;
2058 uint32_t m_gen_call : 1;
2063 typedef volatile struct ALT_I2C_INTR_MSK_s ALT_I2C_INTR_MSK_t;
2067 #define ALT_I2C_INTR_MSK_OFST 0x30
2069 #define ALT_I2C_INTR_MSK_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_INTR_MSK_OFST))
2108 #define ALT_I2C_RAW_INTR_STAT_RX_UNDER_LSB 0
2110 #define ALT_I2C_RAW_INTR_STAT_RX_UNDER_MSB 0
2112 #define ALT_I2C_RAW_INTR_STAT_RX_UNDER_WIDTH 1
2114 #define ALT_I2C_RAW_INTR_STAT_RX_UNDER_SET_MSK 0x00000001
2116 #define ALT_I2C_RAW_INTR_STAT_RX_UNDER_CLR_MSK 0xfffffffe
2118 #define ALT_I2C_RAW_INTR_STAT_RX_UNDER_RESET 0x0
2120 #define ALT_I2C_RAW_INTR_STAT_RX_UNDER_GET(value) (((value) & 0x00000001) >> 0)
2122 #define ALT_I2C_RAW_INTR_STAT_RX_UNDER_SET(value) (((value) << 0) & 0x00000001)
2137 #define ALT_I2C_RAW_INTR_STAT_RX_OVER_LSB 1
2139 #define ALT_I2C_RAW_INTR_STAT_RX_OVER_MSB 1
2141 #define ALT_I2C_RAW_INTR_STAT_RX_OVER_WIDTH 1
2143 #define ALT_I2C_RAW_INTR_STAT_RX_OVER_SET_MSK 0x00000002
2145 #define ALT_I2C_RAW_INTR_STAT_RX_OVER_CLR_MSK 0xfffffffd
2147 #define ALT_I2C_RAW_INTR_STAT_RX_OVER_RESET 0x0
2149 #define ALT_I2C_RAW_INTR_STAT_RX_OVER_GET(value) (((value) & 0x00000002) >> 1)
2151 #define ALT_I2C_RAW_INTR_STAT_RX_OVER_SET(value) (((value) << 1) & 0x00000002)
2167 #define ALT_I2C_RAW_INTR_STAT_RX_FULL_LSB 2
2169 #define ALT_I2C_RAW_INTR_STAT_RX_FULL_MSB 2
2171 #define ALT_I2C_RAW_INTR_STAT_RX_FULL_WIDTH 1
2173 #define ALT_I2C_RAW_INTR_STAT_RX_FULL_SET_MSK 0x00000004
2175 #define ALT_I2C_RAW_INTR_STAT_RX_FULL_CLR_MSK 0xfffffffb
2177 #define ALT_I2C_RAW_INTR_STAT_RX_FULL_RESET 0x0
2179 #define ALT_I2C_RAW_INTR_STAT_RX_FULL_GET(value) (((value) & 0x00000004) >> 2)
2181 #define ALT_I2C_RAW_INTR_STAT_RX_FULL_SET(value) (((value) << 2) & 0x00000004)
2195 #define ALT_I2C_RAW_INTR_STAT_TX_OVER_LSB 3
2197 #define ALT_I2C_RAW_INTR_STAT_TX_OVER_MSB 3
2199 #define ALT_I2C_RAW_INTR_STAT_TX_OVER_WIDTH 1
2201 #define ALT_I2C_RAW_INTR_STAT_TX_OVER_SET_MSK 0x00000008
2203 #define ALT_I2C_RAW_INTR_STAT_TX_OVER_CLR_MSK 0xfffffff7
2205 #define ALT_I2C_RAW_INTR_STAT_TX_OVER_RESET 0x0
2207 #define ALT_I2C_RAW_INTR_STAT_TX_OVER_GET(value) (((value) & 0x00000008) >> 3)
2209 #define ALT_I2C_RAW_INTR_STAT_TX_OVER_SET(value) (((value) << 3) & 0x00000008)
2226 #define ALT_I2C_RAW_INTR_STAT_TX_EMPTY_LSB 4
2228 #define ALT_I2C_RAW_INTR_STAT_TX_EMPTY_MSB 4
2230 #define ALT_I2C_RAW_INTR_STAT_TX_EMPTY_WIDTH 1
2232 #define ALT_I2C_RAW_INTR_STAT_TX_EMPTY_SET_MSK 0x00000010
2234 #define ALT_I2C_RAW_INTR_STAT_TX_EMPTY_CLR_MSK 0xffffffef
2236 #define ALT_I2C_RAW_INTR_STAT_TX_EMPTY_RESET 0x0
2238 #define ALT_I2C_RAW_INTR_STAT_TX_EMPTY_GET(value) (((value) & 0x00000010) >> 4)
2240 #define ALT_I2C_RAW_INTR_STAT_TX_EMPTY_SET(value) (((value) << 4) & 0x00000010)
2257 #define ALT_I2C_RAW_INTR_STAT_RD_REQ_LSB 5
2259 #define ALT_I2C_RAW_INTR_STAT_RD_REQ_MSB 5
2261 #define ALT_I2C_RAW_INTR_STAT_RD_REQ_WIDTH 1
2263 #define ALT_I2C_RAW_INTR_STAT_RD_REQ_SET_MSK 0x00000020
2265 #define ALT_I2C_RAW_INTR_STAT_RD_REQ_CLR_MSK 0xffffffdf
2267 #define ALT_I2C_RAW_INTR_STAT_RD_REQ_RESET 0x0
2269 #define ALT_I2C_RAW_INTR_STAT_RD_REQ_GET(value) (((value) & 0x00000020) >> 5)
2271 #define ALT_I2C_RAW_INTR_STAT_RD_REQ_SET(value) (((value) << 5) & 0x00000020)
2291 #define ALT_I2C_RAW_INTR_STAT_TX_ABRT_LSB 6
2293 #define ALT_I2C_RAW_INTR_STAT_TX_ABRT_MSB 6
2295 #define ALT_I2C_RAW_INTR_STAT_TX_ABRT_WIDTH 1
2297 #define ALT_I2C_RAW_INTR_STAT_TX_ABRT_SET_MSK 0x00000040
2299 #define ALT_I2C_RAW_INTR_STAT_TX_ABRT_CLR_MSK 0xffffffbf
2301 #define ALT_I2C_RAW_INTR_STAT_TX_ABRT_RESET 0x0
2303 #define ALT_I2C_RAW_INTR_STAT_TX_ABRT_GET(value) (((value) & 0x00000040) >> 6)
2305 #define ALT_I2C_RAW_INTR_STAT_TX_ABRT_SET(value) (((value) << 6) & 0x00000040)
2318 #define ALT_I2C_RAW_INTR_STAT_RX_DONE_LSB 7
2320 #define ALT_I2C_RAW_INTR_STAT_RX_DONE_MSB 7
2322 #define ALT_I2C_RAW_INTR_STAT_RX_DONE_WIDTH 1
2324 #define ALT_I2C_RAW_INTR_STAT_RX_DONE_SET_MSK 0x00000080
2326 #define ALT_I2C_RAW_INTR_STAT_RX_DONE_CLR_MSK 0xffffff7f
2328 #define ALT_I2C_RAW_INTR_STAT_RX_DONE_RESET 0x0
2330 #define ALT_I2C_RAW_INTR_STAT_RX_DONE_GET(value) (((value) & 0x00000080) >> 7)
2332 #define ALT_I2C_RAW_INTR_STAT_RX_DONE_SET(value) (((value) << 7) & 0x00000080)
2356 #define ALT_I2C_RAW_INTR_STAT_ACTIVITY_LSB 8
2358 #define ALT_I2C_RAW_INTR_STAT_ACTIVITY_MSB 8
2360 #define ALT_I2C_RAW_INTR_STAT_ACTIVITY_WIDTH 1
2362 #define ALT_I2C_RAW_INTR_STAT_ACTIVITY_SET_MSK 0x00000100
2364 #define ALT_I2C_RAW_INTR_STAT_ACTIVITY_CLR_MSK 0xfffffeff
2366 #define ALT_I2C_RAW_INTR_STAT_ACTIVITY_RESET 0x0
2368 #define ALT_I2C_RAW_INTR_STAT_ACTIVITY_GET(value) (((value) & 0x00000100) >> 8)
2370 #define ALT_I2C_RAW_INTR_STAT_ACTIVITY_SET(value) (((value) << 8) & 0x00000100)
2382 #define ALT_I2C_RAW_INTR_STAT_STOP_DET_LSB 9
2384 #define ALT_I2C_RAW_INTR_STAT_STOP_DET_MSB 9
2386 #define ALT_I2C_RAW_INTR_STAT_STOP_DET_WIDTH 1
2388 #define ALT_I2C_RAW_INTR_STAT_STOP_DET_SET_MSK 0x00000200
2390 #define ALT_I2C_RAW_INTR_STAT_STOP_DET_CLR_MSK 0xfffffdff
2392 #define ALT_I2C_RAW_INTR_STAT_STOP_DET_RESET 0x0
2394 #define ALT_I2C_RAW_INTR_STAT_STOP_DET_GET(value) (((value) & 0x00000200) >> 9)
2396 #define ALT_I2C_RAW_INTR_STAT_STOP_DET_SET(value) (((value) << 9) & 0x00000200)
2408 #define ALT_I2C_RAW_INTR_STAT_START_DET_LSB 10
2410 #define ALT_I2C_RAW_INTR_STAT_START_DET_MSB 10
2412 #define ALT_I2C_RAW_INTR_STAT_START_DET_WIDTH 1
2414 #define ALT_I2C_RAW_INTR_STAT_START_DET_SET_MSK 0x00000400
2416 #define ALT_I2C_RAW_INTR_STAT_START_DET_CLR_MSK 0xfffffbff
2418 #define ALT_I2C_RAW_INTR_STAT_START_DET_RESET 0x0
2420 #define ALT_I2C_RAW_INTR_STAT_START_DET_GET(value) (((value) & 0x00000400) >> 10)
2422 #define ALT_I2C_RAW_INTR_STAT_START_DET_SET(value) (((value) << 10) & 0x00000400)
2436 #define ALT_I2C_RAW_INTR_STAT_GEN_CALL_LSB 11
2438 #define ALT_I2C_RAW_INTR_STAT_GEN_CALL_MSB 11
2440 #define ALT_I2C_RAW_INTR_STAT_GEN_CALL_WIDTH 1
2442 #define ALT_I2C_RAW_INTR_STAT_GEN_CALL_SET_MSK 0x00000800
2444 #define ALT_I2C_RAW_INTR_STAT_GEN_CALL_CLR_MSK 0xfffff7ff
2446 #define ALT_I2C_RAW_INTR_STAT_GEN_CALL_RESET 0x0
2448 #define ALT_I2C_RAW_INTR_STAT_GEN_CALL_GET(value) (((value) & 0x00000800) >> 11)
2450 #define ALT_I2C_RAW_INTR_STAT_GEN_CALL_SET(value) (((value) << 11) & 0x00000800)
2452 #ifndef __ASSEMBLY__
2463 struct ALT_I2C_RAW_INTR_STAT_s
2465 const uint32_t rx_under : 1;
2466 const uint32_t rx_over : 1;
2467 const uint32_t rx_full : 1;
2468 const uint32_t tx_over : 1;
2469 const uint32_t tx_empty : 1;
2470 const uint32_t rd_req : 1;
2471 const uint32_t tx_abrt : 1;
2472 const uint32_t rx_done : 1;
2473 const uint32_t activity : 1;
2474 const uint32_t stop_det : 1;
2475 const uint32_t start_det : 1;
2476 const uint32_t gen_call : 1;
2481 typedef volatile struct ALT_I2C_RAW_INTR_STAT_s ALT_I2C_RAW_INTR_STAT_t;
2485 #define ALT_I2C_RAW_INTR_STAT_OFST 0x34
2487 #define ALT_I2C_RAW_INTR_STAT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_RAW_INTR_STAT_OFST))
2516 #define ALT_I2C_RX_TL_RX_TL_LSB 0
2518 #define ALT_I2C_RX_TL_RX_TL_MSB 7
2520 #define ALT_I2C_RX_TL_RX_TL_WIDTH 8
2522 #define ALT_I2C_RX_TL_RX_TL_SET_MSK 0x000000ff
2524 #define ALT_I2C_RX_TL_RX_TL_CLR_MSK 0xffffff00
2526 #define ALT_I2C_RX_TL_RX_TL_RESET 0x0
2528 #define ALT_I2C_RX_TL_RX_TL_GET(value) (((value) & 0x000000ff) >> 0)
2530 #define ALT_I2C_RX_TL_RX_TL_SET(value) (((value) << 0) & 0x000000ff)
2532 #ifndef __ASSEMBLY__
2543 struct ALT_I2C_RX_TL_s
2550 typedef volatile struct ALT_I2C_RX_TL_s ALT_I2C_RX_TL_t;
2554 #define ALT_I2C_RX_TL_OFST 0x38
2556 #define ALT_I2C_RX_TL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_RX_TL_OFST))
2585 #define ALT_I2C_TX_TL_TX_TL_LSB 0
2587 #define ALT_I2C_TX_TL_TX_TL_MSB 7
2589 #define ALT_I2C_TX_TL_TX_TL_WIDTH 8
2591 #define ALT_I2C_TX_TL_TX_TL_SET_MSK 0x000000ff
2593 #define ALT_I2C_TX_TL_TX_TL_CLR_MSK 0xffffff00
2595 #define ALT_I2C_TX_TL_TX_TL_RESET 0x0
2597 #define ALT_I2C_TX_TL_TX_TL_GET(value) (((value) & 0x000000ff) >> 0)
2599 #define ALT_I2C_TX_TL_TX_TL_SET(value) (((value) << 0) & 0x000000ff)
2601 #ifndef __ASSEMBLY__
2612 struct ALT_I2C_TX_TL_s
2619 typedef volatile struct ALT_I2C_TX_TL_s ALT_I2C_TX_TL_t;
2623 #define ALT_I2C_TX_TL_OFST 0x3c
2625 #define ALT_I2C_TX_TL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_TX_TL_OFST))
2652 #define ALT_I2C_CLR_INTR_CLR_INTR_LSB 0
2654 #define ALT_I2C_CLR_INTR_CLR_INTR_MSB 0
2656 #define ALT_I2C_CLR_INTR_CLR_INTR_WIDTH 1
2658 #define ALT_I2C_CLR_INTR_CLR_INTR_SET_MSK 0x00000001
2660 #define ALT_I2C_CLR_INTR_CLR_INTR_CLR_MSK 0xfffffffe
2662 #define ALT_I2C_CLR_INTR_CLR_INTR_RESET 0x0
2664 #define ALT_I2C_CLR_INTR_CLR_INTR_GET(value) (((value) & 0x00000001) >> 0)
2666 #define ALT_I2C_CLR_INTR_CLR_INTR_SET(value) (((value) << 0) & 0x00000001)
2668 #ifndef __ASSEMBLY__
2679 struct ALT_I2C_CLR_INTR_s
2681 const uint32_t clr_intr : 1;
2686 typedef volatile struct ALT_I2C_CLR_INTR_s ALT_I2C_CLR_INTR_t;
2690 #define ALT_I2C_CLR_INTR_OFST 0x40
2692 #define ALT_I2C_CLR_INTR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_INTR_OFST))
2717 #define ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_LSB 0
2719 #define ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_MSB 0
2721 #define ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_WIDTH 1
2723 #define ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_SET_MSK 0x00000001
2725 #define ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_CLR_MSK 0xfffffffe
2727 #define ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_RESET 0x0
2729 #define ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_GET(value) (((value) & 0x00000001) >> 0)
2731 #define ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_SET(value) (((value) << 0) & 0x00000001)
2733 #ifndef __ASSEMBLY__
2744 struct ALT_I2C_CLR_RX_UNDER_s
2746 const uint32_t clr_rx_under : 1;
2751 typedef volatile struct ALT_I2C_CLR_RX_UNDER_s ALT_I2C_CLR_RX_UNDER_t;
2755 #define ALT_I2C_CLR_RX_UNDER_OFST 0x44
2757 #define ALT_I2C_CLR_RX_UNDER_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_RX_UNDER_OFST))
2782 #define ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_LSB 0
2784 #define ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_MSB 0
2786 #define ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_WIDTH 1
2788 #define ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_SET_MSK 0x00000001
2790 #define ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_CLR_MSK 0xfffffffe
2792 #define ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_RESET 0x0
2794 #define ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_GET(value) (((value) & 0x00000001) >> 0)
2796 #define ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_SET(value) (((value) << 0) & 0x00000001)
2798 #ifndef __ASSEMBLY__
2809 struct ALT_I2C_CLR_RX_OVER_s
2811 const uint32_t clr_rx_over : 1;
2816 typedef volatile struct ALT_I2C_CLR_RX_OVER_s ALT_I2C_CLR_RX_OVER_t;
2820 #define ALT_I2C_CLR_RX_OVER_OFST 0x48
2822 #define ALT_I2C_CLR_RX_OVER_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_RX_OVER_OFST))
2847 #define ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_LSB 0
2849 #define ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_MSB 0
2851 #define ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_WIDTH 1
2853 #define ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_SET_MSK 0x00000001
2855 #define ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_CLR_MSK 0xfffffffe
2857 #define ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_RESET 0x0
2859 #define ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_GET(value) (((value) & 0x00000001) >> 0)
2861 #define ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_SET(value) (((value) << 0) & 0x00000001)
2863 #ifndef __ASSEMBLY__
2874 struct ALT_I2C_CLR_TX_OVER_s
2876 const uint32_t clr_tx_over : 1;
2881 typedef volatile struct ALT_I2C_CLR_TX_OVER_s ALT_I2C_CLR_TX_OVER_t;
2885 #define ALT_I2C_CLR_TX_OVER_OFST 0x4c
2887 #define ALT_I2C_CLR_TX_OVER_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_TX_OVER_OFST))
2912 #define ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_LSB 0
2914 #define ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_MSB 0
2916 #define ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_WIDTH 1
2918 #define ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_SET_MSK 0x00000001
2920 #define ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_CLR_MSK 0xfffffffe
2922 #define ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_RESET 0x0
2924 #define ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_GET(value) (((value) & 0x00000001) >> 0)
2926 #define ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_SET(value) (((value) << 0) & 0x00000001)
2928 #ifndef __ASSEMBLY__
2939 struct ALT_I2C_CLR_RD_REQ_s
2941 const uint32_t clr_rd_req : 1;
2946 typedef volatile struct ALT_I2C_CLR_RD_REQ_s ALT_I2C_CLR_RD_REQ_t;
2950 #define ALT_I2C_CLR_RD_REQ_OFST 0x50
2952 #define ALT_I2C_CLR_RD_REQ_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_RD_REQ_OFST))
2980 #define ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_LSB 0
2982 #define ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_MSB 0
2984 #define ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_WIDTH 1
2986 #define ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_SET_MSK 0x00000001
2988 #define ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_CLR_MSK 0xfffffffe
2990 #define ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_RESET 0x0
2992 #define ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_GET(value) (((value) & 0x00000001) >> 0)
2994 #define ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_SET(value) (((value) << 0) & 0x00000001)
2996 #ifndef __ASSEMBLY__
3007 struct ALT_I2C_CLR_TX_ABRT_s
3009 const uint32_t clr_tx_abort : 1;
3014 typedef volatile struct ALT_I2C_CLR_TX_ABRT_s ALT_I2C_CLR_TX_ABRT_t;
3018 #define ALT_I2C_CLR_TX_ABRT_OFST 0x54
3020 #define ALT_I2C_CLR_TX_ABRT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_TX_ABRT_OFST))
3045 #define ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_LSB 0
3047 #define ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_MSB 0
3049 #define ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_WIDTH 1
3051 #define ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_SET_MSK 0x00000001
3053 #define ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_CLR_MSK 0xfffffffe
3055 #define ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_RESET 0x0
3057 #define ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_GET(value) (((value) & 0x00000001) >> 0)
3059 #define ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_SET(value) (((value) << 0) & 0x00000001)
3061 #ifndef __ASSEMBLY__
3072 struct ALT_I2C_CLR_RX_DONE_s
3074 const uint32_t clr_rx_done : 1;
3079 typedef volatile struct ALT_I2C_CLR_RX_DONE_s ALT_I2C_CLR_RX_DONE_t;
3083 #define ALT_I2C_CLR_RX_DONE_OFST 0x58
3085 #define ALT_I2C_CLR_RX_DONE_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_RX_DONE_OFST))
3114 #define ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_LSB 0
3116 #define ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_MSB 0
3118 #define ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_WIDTH 1
3120 #define ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_SET_MSK 0x00000001
3122 #define ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_CLR_MSK 0xfffffffe
3124 #define ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_RESET 0x0
3126 #define ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_GET(value) (((value) & 0x00000001) >> 0)
3128 #define ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_SET(value) (((value) << 0) & 0x00000001)
3130 #ifndef __ASSEMBLY__
3141 struct ALT_I2C_CLR_ACTIVITY_s
3143 const uint32_t clr_activity : 1;
3148 typedef volatile struct ALT_I2C_CLR_ACTIVITY_s ALT_I2C_CLR_ACTIVITY_t;
3152 #define ALT_I2C_CLR_ACTIVITY_OFST 0x5c
3154 #define ALT_I2C_CLR_ACTIVITY_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_ACTIVITY_OFST))
3179 #define ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_LSB 0
3181 #define ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_MSB 0
3183 #define ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_WIDTH 1
3185 #define ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_SET_MSK 0x00000001
3187 #define ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_CLR_MSK 0xfffffffe
3189 #define ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_RESET 0x0
3191 #define ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_GET(value) (((value) & 0x00000001) >> 0)
3193 #define ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_SET(value) (((value) << 0) & 0x00000001)
3195 #ifndef __ASSEMBLY__
3206 struct ALT_I2C_CLR_STOP_DET_s
3208 const uint32_t clr_stop_det : 1;
3213 typedef volatile struct ALT_I2C_CLR_STOP_DET_s ALT_I2C_CLR_STOP_DET_t;
3217 #define ALT_I2C_CLR_STOP_DET_OFST 0x60
3219 #define ALT_I2C_CLR_STOP_DET_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_STOP_DET_OFST))
3244 #define ALT_I2C_CLR_START_DET_CLR_START_DET_LSB 0
3246 #define ALT_I2C_CLR_START_DET_CLR_START_DET_MSB 0
3248 #define ALT_I2C_CLR_START_DET_CLR_START_DET_WIDTH 1
3250 #define ALT_I2C_CLR_START_DET_CLR_START_DET_SET_MSK 0x00000001
3252 #define ALT_I2C_CLR_START_DET_CLR_START_DET_CLR_MSK 0xfffffffe
3254 #define ALT_I2C_CLR_START_DET_CLR_START_DET_RESET 0x0
3256 #define ALT_I2C_CLR_START_DET_CLR_START_DET_GET(value) (((value) & 0x00000001) >> 0)
3258 #define ALT_I2C_CLR_START_DET_CLR_START_DET_SET(value) (((value) << 0) & 0x00000001)
3260 #ifndef __ASSEMBLY__
3271 struct ALT_I2C_CLR_START_DET_s
3273 const uint32_t clr_start_det : 1;
3278 typedef volatile struct ALT_I2C_CLR_START_DET_s ALT_I2C_CLR_START_DET_t;
3282 #define ALT_I2C_CLR_START_DET_OFST 0x64
3284 #define ALT_I2C_CLR_START_DET_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_START_DET_OFST))
3309 #define ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_LSB 0
3311 #define ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_MSB 0
3313 #define ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_WIDTH 1
3315 #define ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_SET_MSK 0x00000001
3317 #define ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_CLR_MSK 0xfffffffe
3319 #define ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_RESET 0x0
3321 #define ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_GET(value) (((value) & 0x00000001) >> 0)
3323 #define ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_SET(value) (((value) << 0) & 0x00000001)
3325 #ifndef __ASSEMBLY__
3336 struct ALT_I2C_CLR_GEN_CALL_s
3338 const uint32_t clr_gen_call : 1;
3343 typedef volatile struct ALT_I2C_CLR_GEN_CALL_s ALT_I2C_CLR_GEN_CALL_t;
3347 #define ALT_I2C_CLR_GEN_CALL_OFST 0x68
3349 #define ALT_I2C_CLR_GEN_CALL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_GEN_CALL_OFST))
3419 #define ALT_I2C_EN_EN_E_DIS 0x0
3425 #define ALT_I2C_EN_EN_E_EN 0x1
3428 #define ALT_I2C_EN_EN_LSB 0
3430 #define ALT_I2C_EN_EN_MSB 0
3432 #define ALT_I2C_EN_EN_WIDTH 1
3434 #define ALT_I2C_EN_EN_SET_MSK 0x00000001
3436 #define ALT_I2C_EN_EN_CLR_MSK 0xfffffffe
3438 #define ALT_I2C_EN_EN_RESET 0x0
3440 #define ALT_I2C_EN_EN_GET(value) (((value) & 0x00000001) >> 0)
3442 #define ALT_I2C_EN_EN_SET(value) (((value) << 0) & 0x00000001)
3453 #define ALT_I2C_EN_TXABT_LSB 1
3455 #define ALT_I2C_EN_TXABT_MSB 1
3457 #define ALT_I2C_EN_TXABT_WIDTH 1
3459 #define ALT_I2C_EN_TXABT_SET_MSK 0x00000002
3461 #define ALT_I2C_EN_TXABT_CLR_MSK 0xfffffffd
3463 #define ALT_I2C_EN_TXABT_RESET 0x0
3465 #define ALT_I2C_EN_TXABT_GET(value) (((value) & 0x00000002) >> 1)
3467 #define ALT_I2C_EN_TXABT_SET(value) (((value) << 1) & 0x00000002)
3469 #ifndef __ASSEMBLY__
3482 uint32_t enable : 1;
3483 uint32_t txabort : 1;
3488 typedef volatile struct ALT_I2C_EN_s ALT_I2C_EN_t;
3492 #define ALT_I2C_EN_OFST 0x6c
3494 #define ALT_I2C_EN_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_EN_OFST))
3535 #define ALT_I2C_STAT_ACTIVITY_LSB 0
3537 #define ALT_I2C_STAT_ACTIVITY_MSB 0
3539 #define ALT_I2C_STAT_ACTIVITY_WIDTH 1
3541 #define ALT_I2C_STAT_ACTIVITY_SET_MSK 0x00000001
3543 #define ALT_I2C_STAT_ACTIVITY_CLR_MSK 0xfffffffe
3545 #define ALT_I2C_STAT_ACTIVITY_RESET 0x0
3547 #define ALT_I2C_STAT_ACTIVITY_GET(value) (((value) & 0x00000001) >> 0)
3549 #define ALT_I2C_STAT_ACTIVITY_SET(value) (((value) << 0) & 0x00000001)
3571 #define ALT_I2C_STAT_TFNF_E_FULL 0x0
3577 #define ALT_I2C_STAT_TFNF_E_NOTFULL 0x1
3580 #define ALT_I2C_STAT_TFNF_LSB 1
3582 #define ALT_I2C_STAT_TFNF_MSB 1
3584 #define ALT_I2C_STAT_TFNF_WIDTH 1
3586 #define ALT_I2C_STAT_TFNF_SET_MSK 0x00000002
3588 #define ALT_I2C_STAT_TFNF_CLR_MSK 0xfffffffd
3590 #define ALT_I2C_STAT_TFNF_RESET 0x1
3592 #define ALT_I2C_STAT_TFNF_GET(value) (((value) & 0x00000002) >> 1)
3594 #define ALT_I2C_STAT_TFNF_SET(value) (((value) << 1) & 0x00000002)
3616 #define ALT_I2C_STAT_TFE_E_NOTEMPTY 0x0
3622 #define ALT_I2C_STAT_TFE_E_EMPTY 0x1
3625 #define ALT_I2C_STAT_TFE_LSB 2
3627 #define ALT_I2C_STAT_TFE_MSB 2
3629 #define ALT_I2C_STAT_TFE_WIDTH 1
3631 #define ALT_I2C_STAT_TFE_SET_MSK 0x00000004
3633 #define ALT_I2C_STAT_TFE_CLR_MSK 0xfffffffb
3635 #define ALT_I2C_STAT_TFE_RESET 0x1
3637 #define ALT_I2C_STAT_TFE_GET(value) (((value) & 0x00000004) >> 2)
3639 #define ALT_I2C_STAT_TFE_SET(value) (((value) << 2) & 0x00000004)
3661 #define ALT_I2C_STAT_RFNE_E_EMPTY 0x0
3667 #define ALT_I2C_STAT_RFNE_E_NOTEMPTY 0x1
3670 #define ALT_I2C_STAT_RFNE_LSB 3
3672 #define ALT_I2C_STAT_RFNE_MSB 3
3674 #define ALT_I2C_STAT_RFNE_WIDTH 1
3676 #define ALT_I2C_STAT_RFNE_SET_MSK 0x00000008
3678 #define ALT_I2C_STAT_RFNE_CLR_MSK 0xfffffff7
3680 #define ALT_I2C_STAT_RFNE_RESET 0x0
3682 #define ALT_I2C_STAT_RFNE_GET(value) (((value) & 0x00000008) >> 3)
3684 #define ALT_I2C_STAT_RFNE_SET(value) (((value) << 3) & 0x00000008)
3706 #define ALT_I2C_STAT_RFF_E_NOTFULL 0x0
3712 #define ALT_I2C_STAT_RFF_E_FULL 0x1
3715 #define ALT_I2C_STAT_RFF_LSB 4
3717 #define ALT_I2C_STAT_RFF_MSB 4
3719 #define ALT_I2C_STAT_RFF_WIDTH 1
3721 #define ALT_I2C_STAT_RFF_SET_MSK 0x00000010
3723 #define ALT_I2C_STAT_RFF_CLR_MSK 0xffffffef
3725 #define ALT_I2C_STAT_RFF_RESET 0x0
3727 #define ALT_I2C_STAT_RFF_GET(value) (((value) & 0x00000010) >> 4)
3729 #define ALT_I2C_STAT_RFF_SET(value) (((value) << 4) & 0x00000010)
3755 #define ALT_I2C_STAT_MST_ACTIVITY_E_IDLE 0x0
3761 #define ALT_I2C_STAT_MST_ACTIVITY_E_NOTIDLE 0x1
3764 #define ALT_I2C_STAT_MST_ACTIVITY_LSB 5
3766 #define ALT_I2C_STAT_MST_ACTIVITY_MSB 5
3768 #define ALT_I2C_STAT_MST_ACTIVITY_WIDTH 1
3770 #define ALT_I2C_STAT_MST_ACTIVITY_SET_MSK 0x00000020
3772 #define ALT_I2C_STAT_MST_ACTIVITY_CLR_MSK 0xffffffdf
3774 #define ALT_I2C_STAT_MST_ACTIVITY_RESET 0x0
3776 #define ALT_I2C_STAT_MST_ACTIVITY_GET(value) (((value) & 0x00000020) >> 5)
3778 #define ALT_I2C_STAT_MST_ACTIVITY_SET(value) (((value) << 5) & 0x00000020)
3803 #define ALT_I2C_STAT_SLV_ACTIVITY_E_IDLE 0x0
3809 #define ALT_I2C_STAT_SLV_ACTIVITY_E_NOTIDLE 0x1
3812 #define ALT_I2C_STAT_SLV_ACTIVITY_LSB 6
3814 #define ALT_I2C_STAT_SLV_ACTIVITY_MSB 6
3816 #define ALT_I2C_STAT_SLV_ACTIVITY_WIDTH 1
3818 #define ALT_I2C_STAT_SLV_ACTIVITY_SET_MSK 0x00000040
3820 #define ALT_I2C_STAT_SLV_ACTIVITY_CLR_MSK 0xffffffbf
3822 #define ALT_I2C_STAT_SLV_ACTIVITY_RESET 0x0
3824 #define ALT_I2C_STAT_SLV_ACTIVITY_GET(value) (((value) & 0x00000040) >> 6)
3826 #define ALT_I2C_STAT_SLV_ACTIVITY_SET(value) (((value) << 6) & 0x00000040)
3828 #ifndef __ASSEMBLY__
3839 struct ALT_I2C_STAT_s
3841 const uint32_t activity : 1;
3842 const uint32_t tfnf : 1;
3843 const uint32_t tfe : 1;
3844 const uint32_t rfne : 1;
3845 const uint32_t rff : 1;
3846 const uint32_t mst_activity : 1;
3847 const uint32_t slv_activity : 1;
3852 typedef volatile struct ALT_I2C_STAT_s ALT_I2C_STAT_t;
3856 #define ALT_I2C_STAT_OFST 0x70
3858 #define ALT_I2C_STAT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_STAT_OFST))
3891 #define ALT_I2C_TXFLR_TXFLR_LSB 0
3893 #define ALT_I2C_TXFLR_TXFLR_MSB 6
3895 #define ALT_I2C_TXFLR_TXFLR_WIDTH 7
3897 #define ALT_I2C_TXFLR_TXFLR_SET_MSK 0x0000007f
3899 #define ALT_I2C_TXFLR_TXFLR_CLR_MSK 0xffffff80
3901 #define ALT_I2C_TXFLR_TXFLR_RESET 0x0
3903 #define ALT_I2C_TXFLR_TXFLR_GET(value) (((value) & 0x0000007f) >> 0)
3905 #define ALT_I2C_TXFLR_TXFLR_SET(value) (((value) << 0) & 0x0000007f)
3907 #ifndef __ASSEMBLY__
3918 struct ALT_I2C_TXFLR_s
3920 const uint32_t txflr : 7;
3925 typedef volatile struct ALT_I2C_TXFLR_s ALT_I2C_TXFLR_t;
3929 #define ALT_I2C_TXFLR_OFST 0x74
3931 #define ALT_I2C_TXFLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_TXFLR_OFST))
3963 #define ALT_I2C_RXFLR_RXFLR_LSB 0
3965 #define ALT_I2C_RXFLR_RXFLR_MSB 6
3967 #define ALT_I2C_RXFLR_RXFLR_WIDTH 7
3969 #define ALT_I2C_RXFLR_RXFLR_SET_MSK 0x0000007f
3971 #define ALT_I2C_RXFLR_RXFLR_CLR_MSK 0xffffff80
3973 #define ALT_I2C_RXFLR_RXFLR_RESET 0x0
3975 #define ALT_I2C_RXFLR_RXFLR_GET(value) (((value) & 0x0000007f) >> 0)
3977 #define ALT_I2C_RXFLR_RXFLR_SET(value) (((value) << 0) & 0x0000007f)
3979 #ifndef __ASSEMBLY__
3990 struct ALT_I2C_RXFLR_s
3992 const uint32_t rxflr : 7;
3997 typedef volatile struct ALT_I2C_RXFLR_s ALT_I2C_RXFLR_t;
4001 #define ALT_I2C_RXFLR_OFST 0x78
4003 #define ALT_I2C_RXFLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_RXFLR_OFST))
4030 #define ALT_I2C_SDA_HOLD_IC_SDA_HOLD_LSB 0
4032 #define ALT_I2C_SDA_HOLD_IC_SDA_HOLD_MSB 15
4034 #define ALT_I2C_SDA_HOLD_IC_SDA_HOLD_WIDTH 16
4036 #define ALT_I2C_SDA_HOLD_IC_SDA_HOLD_SET_MSK 0x0000ffff
4038 #define ALT_I2C_SDA_HOLD_IC_SDA_HOLD_CLR_MSK 0xffff0000
4040 #define ALT_I2C_SDA_HOLD_IC_SDA_HOLD_RESET 0x1
4042 #define ALT_I2C_SDA_HOLD_IC_SDA_HOLD_GET(value) (((value) & 0x0000ffff) >> 0)
4044 #define ALT_I2C_SDA_HOLD_IC_SDA_HOLD_SET(value) (((value) << 0) & 0x0000ffff)
4046 #ifndef __ASSEMBLY__
4057 struct ALT_I2C_SDA_HOLD_s
4059 uint32_t ic_sda_hold : 16;
4064 typedef volatile struct ALT_I2C_SDA_HOLD_s ALT_I2C_SDA_HOLD_t;
4068 #define ALT_I2C_SDA_HOLD_OFST 0x7c
4070 #define ALT_I2C_SDA_HOLD_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_SDA_HOLD_OFST))
4118 #define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_LSB 0
4120 #define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_MSB 0
4122 #define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_WIDTH 1
4124 #define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_SET_MSK 0x00000001
4126 #define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_CLR_MSK 0xfffffffe
4128 #define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_RESET 0x0
4130 #define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_GET(value) (((value) & 0x00000001) >> 0)
4132 #define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_SET(value) (((value) << 0) & 0x00000001)
4144 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_LSB 1
4146 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_MSB 1
4148 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_WIDTH 1
4150 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_SET_MSK 0x00000002
4152 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_CLR_MSK 0xfffffffd
4154 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_RESET 0x0
4156 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_GET(value) (((value) & 0x00000002) >> 1)
4158 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_SET(value) (((value) << 1) & 0x00000002)
4171 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_LSB 2
4173 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_MSB 2
4175 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_WIDTH 1
4177 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_SET_MSK 0x00000004
4179 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_CLR_MSK 0xfffffffb
4181 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_RESET 0x0
4183 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_GET(value) (((value) & 0x00000004) >> 2)
4185 #define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_SET(value) (((value) << 2) & 0x00000004)
4198 #define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_LSB 3
4200 #define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_MSB 3
4202 #define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_WIDTH 1
4204 #define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_SET_MSK 0x00000008
4206 #define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_CLR_MSK 0xfffffff7
4208 #define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_RESET 0x0
4210 #define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_GET(value) (((value) & 0x00000008) >> 3)
4212 #define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_SET(value) (((value) << 3) & 0x00000008)
4224 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_LSB 4
4226 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_MSB 4
4228 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_WIDTH 1
4230 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_SET_MSK 0x00000010
4232 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_CLR_MSK 0xffffffef
4234 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_RESET 0x0
4236 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_GET(value) (((value) & 0x00000010) >> 4)
4238 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_SET(value) (((value) << 4) & 0x00000010)
4251 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_LSB 5
4253 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_MSB 5
4255 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_WIDTH 1
4257 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_SET_MSK 0x00000020
4259 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_CLR_MSK 0xffffffdf
4261 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_RESET 0x0
4263 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_GET(value) (((value) & 0x00000020) >> 5)
4265 #define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_SET(value) (((value) << 5) & 0x00000020)
4277 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_LSB 6
4279 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_MSB 6
4281 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_WIDTH 1
4283 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_SET_MSK 0x00000040
4285 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_CLR_MSK 0xffffffbf
4287 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_RESET 0x0
4289 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_GET(value) (((value) & 0x00000040) >> 6)
4291 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_SET(value) (((value) << 6) & 0x00000040)
4303 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_LSB 7
4305 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_MSB 7
4307 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_WIDTH 1
4309 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_SET_MSK 0x00000080
4311 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_CLR_MSK 0xffffff7f
4313 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_RESET 0x0
4315 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_GET(value) (((value) & 0x00000080) >> 7)
4317 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_SET(value) (((value) << 7) & 0x00000080)
4330 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_LSB 8
4332 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_MSB 8
4334 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_WIDTH 1
4336 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_SET_MSK 0x00000100
4338 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_CLR_MSK 0xfffffeff
4340 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_RESET 0x0
4342 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_GET(value) (((value) & 0x00000100) >> 8)
4344 #define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_SET(value) (((value) << 8) & 0x00000100)
4363 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_LSB 9
4365 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_MSB 9
4367 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_WIDTH 1
4369 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_SET_MSK 0x00000200
4371 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_CLR_MSK 0xfffffdff
4373 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_RESET 0x0
4375 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_GET(value) (((value) & 0x00000200) >> 9)
4377 #define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_SET(value) (((value) << 9) & 0x00000200)
4389 #define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_LSB 10
4391 #define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_MSB 10
4393 #define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_WIDTH 1
4395 #define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_SET_MSK 0x00000400
4397 #define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_CLR_MSK 0xfffffbff
4399 #define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_RESET 0x0
4401 #define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_GET(value) (((value) & 0x00000400) >> 10)
4403 #define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_SET(value) (((value) << 10) & 0x00000400)
4415 #define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_LSB 11
4417 #define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_MSB 11
4419 #define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_WIDTH 1
4421 #define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_SET_MSK 0x00000800
4423 #define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_CLR_MSK 0xfffff7ff
4425 #define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_RESET 0x0
4427 #define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_GET(value) (((value) & 0x00000800) >> 11)
4429 #define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_SET(value) (((value) << 11) & 0x00000800)
4442 #define ALT_I2C_TX_ABRT_SRC_ARB_LOST_LSB 12
4444 #define ALT_I2C_TX_ABRT_SRC_ARB_LOST_MSB 12
4446 #define ALT_I2C_TX_ABRT_SRC_ARB_LOST_WIDTH 1
4448 #define ALT_I2C_TX_ABRT_SRC_ARB_LOST_SET_MSK 0x00001000
4450 #define ALT_I2C_TX_ABRT_SRC_ARB_LOST_CLR_MSK 0xffffefff
4452 #define ALT_I2C_TX_ABRT_SRC_ARB_LOST_RESET 0x0
4454 #define ALT_I2C_TX_ABRT_SRC_ARB_LOST_GET(value) (((value) & 0x00001000) >> 12)
4456 #define ALT_I2C_TX_ABRT_SRC_ARB_LOST_SET(value) (((value) << 12) & 0x00001000)
4469 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_LSB 13
4471 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_MSB 13
4473 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_WIDTH 1
4475 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_SET_MSK 0x00002000
4477 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_CLR_MSK 0xffffdfff
4479 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_RESET 0x0
4481 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_GET(value) (((value) & 0x00002000) >> 13)
4483 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_SET(value) (((value) << 13) & 0x00002000)
4499 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_LSB 14
4501 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_MSB 14
4503 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_WIDTH 1
4505 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_SET_MSK 0x00004000
4507 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_CLR_MSK 0xffffbfff
4509 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_RESET 0x0
4511 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_GET(value) (((value) & 0x00004000) >> 14)
4513 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_SET(value) (((value) << 14) & 0x00004000)
4526 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_LSB 15
4528 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_MSB 15
4530 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_WIDTH 1
4532 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_SET_MSK 0x00008000
4534 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_CLR_MSK 0xffff7fff
4536 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_RESET 0x0
4538 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_GET(value) (((value) & 0x00008000) >> 15)
4540 #define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_SET(value) (((value) << 15) & 0x00008000)
4542 #ifndef __ASSEMBLY__
4553 struct ALT_I2C_TX_ABRT_SRC_s
4555 uint32_t abrt_7b_addr_noack : 1;
4556 uint32_t abrt_10addr1_noack : 1;
4557 uint32_t abrt_10addr2_noack : 1;
4558 uint32_t abrt_txdata_noack : 1;
4559 uint32_t abrt_gcall_noack : 1;
4560 uint32_t abrt_gcall_read : 1;
4561 uint32_t abrt_hs_ackdet : 1;
4562 uint32_t abrt_sbyte_ackdet : 1;
4563 uint32_t abrt_hs_norstrt : 1;
4564 uint32_t abrt_sbyte_norstrt : 1;
4565 uint32_t abrt_10b_rd_norstrt : 1;
4566 uint32_t abrt_master_dis : 1;
4567 uint32_t arb_lost : 1;
4568 uint32_t abrt_slvflush_txfifo : 1;
4569 uint32_t abrt_slv_arblost : 1;
4570 uint32_t abrt_slvrd_intx : 1;
4575 typedef volatile struct ALT_I2C_TX_ABRT_SRC_s ALT_I2C_TX_ABRT_SRC_t;
4579 #define ALT_I2C_TX_ABRT_SRC_OFST 0x80
4581 #define ALT_I2C_TX_ABRT_SRC_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_TX_ABRT_SRC_OFST))
4617 #define ALT_I2C_SLV_DATA_NACK_ONLY_NACK_E_AFTERDBYTE 0x1
4623 #define ALT_I2C_SLV_DATA_NACK_ONLY_NACK_E_NORM 0x0
4626 #define ALT_I2C_SLV_DATA_NACK_ONLY_NACK_LSB 0
4628 #define ALT_I2C_SLV_DATA_NACK_ONLY_NACK_MSB 0
4630 #define ALT_I2C_SLV_DATA_NACK_ONLY_NACK_WIDTH 1
4632 #define ALT_I2C_SLV_DATA_NACK_ONLY_NACK_SET_MSK 0x00000001
4634 #define ALT_I2C_SLV_DATA_NACK_ONLY_NACK_CLR_MSK 0xfffffffe
4636 #define ALT_I2C_SLV_DATA_NACK_ONLY_NACK_RESET 0x0
4638 #define ALT_I2C_SLV_DATA_NACK_ONLY_NACK_GET(value) (((value) & 0x00000001) >> 0)
4640 #define ALT_I2C_SLV_DATA_NACK_ONLY_NACK_SET(value) (((value) << 0) & 0x00000001)
4642 #ifndef __ASSEMBLY__
4653 struct ALT_I2C_SLV_DATA_NACK_ONLY_s
4660 typedef volatile struct ALT_I2C_SLV_DATA_NACK_ONLY_s ALT_I2C_SLV_DATA_NACK_ONLY_t;
4664 #define ALT_I2C_SLV_DATA_NACK_ONLY_OFST 0x84
4666 #define ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_SLV_DATA_NACK_ONLY_OFST))
4704 #define ALT_I2C_DMA_CR_RDMAE_E_DIS 0x0
4710 #define ALT_I2C_DMA_CR_RDMAE_E_EN 0x1
4713 #define ALT_I2C_DMA_CR_RDMAE_LSB 0
4715 #define ALT_I2C_DMA_CR_RDMAE_MSB 0
4717 #define ALT_I2C_DMA_CR_RDMAE_WIDTH 1
4719 #define ALT_I2C_DMA_CR_RDMAE_SET_MSK 0x00000001
4721 #define ALT_I2C_DMA_CR_RDMAE_CLR_MSK 0xfffffffe
4723 #define ALT_I2C_DMA_CR_RDMAE_RESET 0x0
4725 #define ALT_I2C_DMA_CR_RDMAE_GET(value) (((value) & 0x00000001) >> 0)
4727 #define ALT_I2C_DMA_CR_RDMAE_SET(value) (((value) << 0) & 0x00000001)
4749 #define ALT_I2C_DMA_CR_TDMAE_E_DIS 0x0
4755 #define ALT_I2C_DMA_CR_TDMAE_E_EN 0x1
4758 #define ALT_I2C_DMA_CR_TDMAE_LSB 1
4760 #define ALT_I2C_DMA_CR_TDMAE_MSB 1
4762 #define ALT_I2C_DMA_CR_TDMAE_WIDTH 1
4764 #define ALT_I2C_DMA_CR_TDMAE_SET_MSK 0x00000002
4766 #define ALT_I2C_DMA_CR_TDMAE_CLR_MSK 0xfffffffd
4768 #define ALT_I2C_DMA_CR_TDMAE_RESET 0x0
4770 #define ALT_I2C_DMA_CR_TDMAE_GET(value) (((value) & 0x00000002) >> 1)
4772 #define ALT_I2C_DMA_CR_TDMAE_SET(value) (((value) << 1) & 0x00000002)
4774 #ifndef __ASSEMBLY__
4785 struct ALT_I2C_DMA_CR_s
4793 typedef volatile struct ALT_I2C_DMA_CR_s ALT_I2C_DMA_CR_t;
4797 #define ALT_I2C_DMA_CR_OFST 0x88
4799 #define ALT_I2C_DMA_CR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_DMA_CR_OFST))
4826 #define ALT_I2C_DMA_TDLR_DMATDL_LSB 0
4828 #define ALT_I2C_DMA_TDLR_DMATDL_MSB 5
4830 #define ALT_I2C_DMA_TDLR_DMATDL_WIDTH 6
4832 #define ALT_I2C_DMA_TDLR_DMATDL_SET_MSK 0x0000003f
4834 #define ALT_I2C_DMA_TDLR_DMATDL_CLR_MSK 0xffffffc0
4836 #define ALT_I2C_DMA_TDLR_DMATDL_RESET 0x0
4838 #define ALT_I2C_DMA_TDLR_DMATDL_GET(value) (((value) & 0x0000003f) >> 0)
4840 #define ALT_I2C_DMA_TDLR_DMATDL_SET(value) (((value) << 0) & 0x0000003f)
4842 #ifndef __ASSEMBLY__
4853 struct ALT_I2C_DMA_TDLR_s
4855 uint32_t dmatdl : 6;
4860 typedef volatile struct ALT_I2C_DMA_TDLR_s ALT_I2C_DMA_TDLR_t;
4864 #define ALT_I2C_DMA_TDLR_OFST 0x8c
4866 #define ALT_I2C_DMA_TDLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_DMA_TDLR_OFST))
4895 #define ALT_I2C_DMA_RDLR_DMARDL_LSB 0
4897 #define ALT_I2C_DMA_RDLR_DMARDL_MSB 5
4899 #define ALT_I2C_DMA_RDLR_DMARDL_WIDTH 6
4901 #define ALT_I2C_DMA_RDLR_DMARDL_SET_MSK 0x0000003f
4903 #define ALT_I2C_DMA_RDLR_DMARDL_CLR_MSK 0xffffffc0
4905 #define ALT_I2C_DMA_RDLR_DMARDL_RESET 0x0
4907 #define ALT_I2C_DMA_RDLR_DMARDL_GET(value) (((value) & 0x0000003f) >> 0)
4909 #define ALT_I2C_DMA_RDLR_DMARDL_SET(value) (((value) << 0) & 0x0000003f)
4911 #ifndef __ASSEMBLY__
4922 struct ALT_I2C_DMA_RDLR_s
4924 uint32_t dmardl : 6;
4929 typedef volatile struct ALT_I2C_DMA_RDLR_s ALT_I2C_DMA_RDLR_t;
4933 #define ALT_I2C_DMA_RDLR_OFST 0x90
4935 #define ALT_I2C_DMA_RDLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_DMA_RDLR_OFST))
4970 #define ALT_I2C_SDA_SETUP_SDA_SETUP_LSB 0
4972 #define ALT_I2C_SDA_SETUP_SDA_SETUP_MSB 7
4974 #define ALT_I2C_SDA_SETUP_SDA_SETUP_WIDTH 8
4976 #define ALT_I2C_SDA_SETUP_SDA_SETUP_SET_MSK 0x000000ff
4978 #define ALT_I2C_SDA_SETUP_SDA_SETUP_CLR_MSK 0xffffff00
4980 #define ALT_I2C_SDA_SETUP_SDA_SETUP_RESET 0x64
4982 #define ALT_I2C_SDA_SETUP_SDA_SETUP_GET(value) (((value) & 0x000000ff) >> 0)
4984 #define ALT_I2C_SDA_SETUP_SDA_SETUP_SET(value) (((value) << 0) & 0x000000ff)
4986 #ifndef __ASSEMBLY__
4997 struct ALT_I2C_SDA_SETUP_s
4999 uint32_t sda_setup : 8;
5004 typedef volatile struct ALT_I2C_SDA_SETUP_s ALT_I2C_SDA_SETUP_t;
5008 #define ALT_I2C_SDA_SETUP_OFST 0x94
5010 #define ALT_I2C_SDA_SETUP_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_SDA_SETUP_OFST))
5047 #define ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_E_NACK 0x0
5053 #define ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_E_ACK 0x1
5056 #define ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_LSB 0
5058 #define ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_MSB 0
5060 #define ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_WIDTH 1
5062 #define ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_SET_MSK 0x00000001
5064 #define ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_CLR_MSK 0xfffffffe
5066 #define ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_RESET 0x1
5068 #define ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_GET(value) (((value) & 0x00000001) >> 0)
5070 #define ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_SET(value) (((value) << 0) & 0x00000001)
5072 #ifndef __ASSEMBLY__
5083 struct ALT_I2C_ACK_GENERAL_CALL_s
5085 uint32_t ack_gen_call : 1;
5090 typedef volatile struct ALT_I2C_ACK_GENERAL_CALL_s ALT_I2C_ACK_GENERAL_CALL_t;
5094 #define ALT_I2C_ACK_GENERAL_CALL_OFST 0x98
5096 #define ALT_I2C_ACK_GENERAL_CALL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_ACK_GENERAL_CALL_OFST))
5132 #define ALT_I2C_EN_STAT_IC_EN_LSB 0
5134 #define ALT_I2C_EN_STAT_IC_EN_MSB 0
5136 #define ALT_I2C_EN_STAT_IC_EN_WIDTH 1
5138 #define ALT_I2C_EN_STAT_IC_EN_SET_MSK 0x00000001
5140 #define ALT_I2C_EN_STAT_IC_EN_CLR_MSK 0xfffffffe
5142 #define ALT_I2C_EN_STAT_IC_EN_RESET 0x0
5144 #define ALT_I2C_EN_STAT_IC_EN_GET(value) (((value) & 0x00000001) >> 0)
5146 #define ALT_I2C_EN_STAT_IC_EN_SET(value) (((value) << 0) & 0x00000001)
5170 #define ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_LSB 1
5172 #define ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_MSB 1
5174 #define ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_WIDTH 1
5176 #define ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_SET_MSK 0x00000002
5178 #define ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_CLR_MSK 0xfffffffd
5180 #define ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_RESET 0x0
5182 #define ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_GET(value) (((value) & 0x00000002) >> 1)
5184 #define ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_SET(value) (((value) << 1) & 0x00000002)
5205 #define ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_LSB 2
5207 #define ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_MSB 2
5209 #define ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_WIDTH 1
5211 #define ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_SET_MSK 0x00000004
5213 #define ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_CLR_MSK 0xfffffffb
5215 #define ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_RESET 0x0
5217 #define ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_GET(value) (((value) & 0x00000004) >> 2)
5219 #define ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_SET(value) (((value) << 2) & 0x00000004)
5221 #ifndef __ASSEMBLY__
5232 struct ALT_I2C_EN_STAT_s
5234 const uint32_t ic_en : 1;
5235 const uint32_t slv_disabled_while_busy : 1;
5236 const uint32_t slv_rx_data_lost : 1;
5241 typedef volatile struct ALT_I2C_EN_STAT_s ALT_I2C_EN_STAT_t;
5245 #define ALT_I2C_EN_STAT_OFST 0x9c
5247 #define ALT_I2C_EN_STAT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_EN_STAT_OFST))
5280 #define ALT_I2C_FS_SPKLEN_SPKLEN_LSB 0
5282 #define ALT_I2C_FS_SPKLEN_SPKLEN_MSB 7
5284 #define ALT_I2C_FS_SPKLEN_SPKLEN_WIDTH 8
5286 #define ALT_I2C_FS_SPKLEN_SPKLEN_SET_MSK 0x000000ff
5288 #define ALT_I2C_FS_SPKLEN_SPKLEN_CLR_MSK 0xffffff00
5290 #define ALT_I2C_FS_SPKLEN_SPKLEN_RESET 0x2
5292 #define ALT_I2C_FS_SPKLEN_SPKLEN_GET(value) (((value) & 0x000000ff) >> 0)
5294 #define ALT_I2C_FS_SPKLEN_SPKLEN_SET(value) (((value) << 0) & 0x000000ff)
5296 #ifndef __ASSEMBLY__
5307 struct ALT_I2C_FS_SPKLEN_s
5309 uint32_t spklen : 8;
5314 typedef volatile struct ALT_I2C_FS_SPKLEN_s ALT_I2C_FS_SPKLEN_t;
5318 #define ALT_I2C_FS_SPKLEN_OFST 0xa0
5320 #define ALT_I2C_FS_SPKLEN_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_FS_SPKLEN_OFST))
5362 #define ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_E_WIDTH32BITS 0x2
5365 #define ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_LSB 0
5367 #define ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_MSB 1
5369 #define ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_WIDTH 2
5371 #define ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_SET_MSK 0x00000003
5373 #define ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_CLR_MSK 0xfffffffc
5375 #define ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_RESET 0x2
5377 #define ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_GET(value) (((value) & 0x00000003) >> 0)
5379 #define ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_SET(value) (((value) << 0) & 0x00000003)
5400 #define ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_E_FAST 0x2
5403 #define ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_LSB 2
5405 #define ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_MSB 3
5407 #define ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_WIDTH 2
5409 #define ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_SET_MSK 0x0000000c
5411 #define ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_CLR_MSK 0xfffffff3
5413 #define ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_RESET 0x2
5415 #define ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_GET(value) (((value) & 0x0000000c) >> 2)
5417 #define ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_SET(value) (((value) << 2) & 0x0000000c)
5438 #define ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_E_RDWR 0x0
5441 #define ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_LSB 4
5443 #define ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_MSB 4
5445 #define ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_WIDTH 1
5447 #define ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_SET_MSK 0x00000010
5449 #define ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_CLR_MSK 0xffffffef
5451 #define ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_RESET 0x0
5453 #define ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_GET(value) (((value) & 0x00000010) >> 4)
5455 #define ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_SET(value) (((value) << 4) & 0x00000010)
5476 #define ALT_I2C_COMP_PARAM_1_INTR_IO_E_COMBINED 0x1
5479 #define ALT_I2C_COMP_PARAM_1_INTR_IO_LSB 5
5481 #define ALT_I2C_COMP_PARAM_1_INTR_IO_MSB 5
5483 #define ALT_I2C_COMP_PARAM_1_INTR_IO_WIDTH 1
5485 #define ALT_I2C_COMP_PARAM_1_INTR_IO_SET_MSK 0x00000020
5487 #define ALT_I2C_COMP_PARAM_1_INTR_IO_CLR_MSK 0xffffffdf
5489 #define ALT_I2C_COMP_PARAM_1_INTR_IO_RESET 0x1
5491 #define ALT_I2C_COMP_PARAM_1_INTR_IO_GET(value) (((value) & 0x00000020) >> 5)
5493 #define ALT_I2C_COMP_PARAM_1_INTR_IO_SET(value) (((value) << 5) & 0x00000020)
5514 #define ALT_I2C_COMP_PARAM_1_HAS_DMA_E_PRESENT 0x1
5517 #define ALT_I2C_COMP_PARAM_1_HAS_DMA_LSB 6
5519 #define ALT_I2C_COMP_PARAM_1_HAS_DMA_MSB 6
5521 #define ALT_I2C_COMP_PARAM_1_HAS_DMA_WIDTH 1
5523 #define ALT_I2C_COMP_PARAM_1_HAS_DMA_SET_MSK 0x00000040
5525 #define ALT_I2C_COMP_PARAM_1_HAS_DMA_CLR_MSK 0xffffffbf
5527 #define ALT_I2C_COMP_PARAM_1_HAS_DMA_RESET 0x1
5529 #define ALT_I2C_COMP_PARAM_1_HAS_DMA_GET(value) (((value) & 0x00000040) >> 6)
5531 #define ALT_I2C_COMP_PARAM_1_HAS_DMA_SET(value) (((value) << 6) & 0x00000040)
5556 #define ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_E_ADDENCPARAMS 0x1
5559 #define ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_LSB 7
5561 #define ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_MSB 7
5563 #define ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_WIDTH 1
5565 #define ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_SET_MSK 0x00000080
5567 #define ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_CLR_MSK 0xffffff7f
5569 #define ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_RESET 0x1
5571 #define ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_GET(value) (((value) & 0x00000080) >> 7)
5573 #define ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_SET(value) (((value) << 7) & 0x00000080)
5594 #define ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_E_FIFO64BYTES 0x40
5597 #define ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_LSB 8
5599 #define ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_MSB 15
5601 #define ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_WIDTH 8
5603 #define ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_SET_MSK 0x0000ff00
5605 #define ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_CLR_MSK 0xffff00ff
5607 #define ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_RESET 0x3f
5609 #define ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_GET(value) (((value) & 0x0000ff00) >> 8)
5611 #define ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_SET(value) (((value) << 8) & 0x0000ff00)
5632 #define ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_E_FIFO64BYTES 0x40
5635 #define ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_LSB 16
5637 #define ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_MSB 23
5639 #define ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_WIDTH 8
5641 #define ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_SET_MSK 0x00ff0000
5643 #define ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_CLR_MSK 0xff00ffff
5645 #define ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_RESET 0x3f
5647 #define ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_GET(value) (((value) & 0x00ff0000) >> 16)
5649 #define ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_SET(value) (((value) << 16) & 0x00ff0000)
5651 #ifndef __ASSEMBLY__
5662 struct ALT_I2C_COMP_PARAM_1_s
5664 const uint32_t apb_data_width : 2;
5665 const uint32_t max_speed_mode : 2;
5666 const uint32_t hc_count_values : 1;
5667 const uint32_t intr_io : 1;
5668 const uint32_t has_dma : 1;
5669 const uint32_t add_encoded_params : 1;
5670 const uint32_t rx_buffer_depth : 8;
5671 const uint32_t tx_buffer_depth : 8;
5676 typedef volatile struct ALT_I2C_COMP_PARAM_1_s ALT_I2C_COMP_PARAM_1_t;
5680 #define ALT_I2C_COMP_PARAM_1_OFST 0xf4
5682 #define ALT_I2C_COMP_PARAM_1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_COMP_PARAM_1_OFST))
5715 #define ALT_I2C_COMP_VER_IC_COMP_VER_E_VER_1_20A 0x3132302a
5718 #define ALT_I2C_COMP_VER_IC_COMP_VER_LSB 0
5720 #define ALT_I2C_COMP_VER_IC_COMP_VER_MSB 31
5722 #define ALT_I2C_COMP_VER_IC_COMP_VER_WIDTH 32
5724 #define ALT_I2C_COMP_VER_IC_COMP_VER_SET_MSK 0xffffffff
5726 #define ALT_I2C_COMP_VER_IC_COMP_VER_CLR_MSK 0x00000000
5728 #define ALT_I2C_COMP_VER_IC_COMP_VER_RESET 0x3132302a
5730 #define ALT_I2C_COMP_VER_IC_COMP_VER_GET(value) (((value) & 0xffffffff) >> 0)
5732 #define ALT_I2C_COMP_VER_IC_COMP_VER_SET(value) (((value) << 0) & 0xffffffff)
5734 #ifndef __ASSEMBLY__
5745 struct ALT_I2C_COMP_VER_s
5747 const uint32_t ic_comp_version : 32;
5751 typedef volatile struct ALT_I2C_COMP_VER_s ALT_I2C_COMP_VER_t;
5755 #define ALT_I2C_COMP_VER_OFST 0xf8
5757 #define ALT_I2C_COMP_VER_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_COMP_VER_OFST))
5782 #define ALT_I2C_COMP_TYPE_IC_COMP_TYPE_LSB 0
5784 #define ALT_I2C_COMP_TYPE_IC_COMP_TYPE_MSB 31
5786 #define ALT_I2C_COMP_TYPE_IC_COMP_TYPE_WIDTH 32
5788 #define ALT_I2C_COMP_TYPE_IC_COMP_TYPE_SET_MSK 0xffffffff
5790 #define ALT_I2C_COMP_TYPE_IC_COMP_TYPE_CLR_MSK 0x00000000
5792 #define ALT_I2C_COMP_TYPE_IC_COMP_TYPE_RESET 0x44570140
5794 #define ALT_I2C_COMP_TYPE_IC_COMP_TYPE_GET(value) (((value) & 0xffffffff) >> 0)
5796 #define ALT_I2C_COMP_TYPE_IC_COMP_TYPE_SET(value) (((value) << 0) & 0xffffffff)
5798 #ifndef __ASSEMBLY__
5809 struct ALT_I2C_COMP_TYPE_s
5811 const uint32_t ic_comp_type : 32;
5815 typedef volatile struct ALT_I2C_COMP_TYPE_s ALT_I2C_COMP_TYPE_t;
5819 #define ALT_I2C_COMP_TYPE_OFST 0xfc
5821 #define ALT_I2C_COMP_TYPE_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_COMP_TYPE_OFST))
5823 #ifndef __ASSEMBLY__
5836 ALT_I2C_CON_t ic_con;
5837 ALT_I2C_TAR_t ic_tar;
5838 ALT_I2C_SAR_t ic_sar;
5839 volatile uint32_t _pad_0xc_0xf;
5840 ALT_I2C_DATA_CMD_t ic_data_cmd;
5841 ALT_I2C_SS_SCL_HCNT_t ic_ss_scl_hcnt;
5842 ALT_I2C_SS_SCL_LCNT_t ic_ss_scl_lcnt;
5843 ALT_I2C_FS_SCL_HCNT_t ic_fs_scl_hcnt;
5844 ALT_I2C_FS_SCL_LCNT_t ic_fs_scl_lcnt;
5845 volatile uint32_t _pad_0x24_0x2b[2];
5846 ALT_I2C_INTR_STAT_t ic_intr_stat;
5847 ALT_I2C_INTR_MSK_t ic_intr_mask;
5848 ALT_I2C_RAW_INTR_STAT_t ic_raw_intr_stat;
5849 ALT_I2C_RX_TL_t ic_rx_tl;
5850 ALT_I2C_TX_TL_t ic_tx_tl;
5851 ALT_I2C_CLR_INTR_t ic_clr_intr;
5852 ALT_I2C_CLR_RX_UNDER_t ic_clr_rx_under;
5853 ALT_I2C_CLR_RX_OVER_t ic_clr_rx_over;
5854 ALT_I2C_CLR_TX_OVER_t ic_clr_tx_over;
5855 ALT_I2C_CLR_RD_REQ_t ic_clr_rd_req;
5856 ALT_I2C_CLR_TX_ABRT_t ic_clr_tx_abrt;
5857 ALT_I2C_CLR_RX_DONE_t ic_clr_rx_done;
5858 ALT_I2C_CLR_ACTIVITY_t ic_clr_activity;
5859 ALT_I2C_CLR_STOP_DET_t ic_clr_stop_det;
5860 ALT_I2C_CLR_START_DET_t ic_clr_start_det;
5861 ALT_I2C_CLR_GEN_CALL_t ic_clr_gen_call;
5862 ALT_I2C_EN_t ic_enable;
5863 ALT_I2C_STAT_t ic_status;
5864 ALT_I2C_TXFLR_t ic_txflr;
5865 ALT_I2C_RXFLR_t ic_rxflr;
5866 ALT_I2C_SDA_HOLD_t ic_sda_hold;
5867 ALT_I2C_TX_ABRT_SRC_t ic_tx_abrt_source;
5868 ALT_I2C_SLV_DATA_NACK_ONLY_t ic_slv_data_nack_only;
5869 ALT_I2C_DMA_CR_t ic_dma_cr;
5870 ALT_I2C_DMA_TDLR_t ic_dma_tdlr;
5871 ALT_I2C_DMA_RDLR_t ic_dma_rdlr;
5872 ALT_I2C_SDA_SETUP_t ic_sda_setup;
5873 ALT_I2C_ACK_GENERAL_CALL_t ic_ack_general_call;
5874 ALT_I2C_EN_STAT_t ic_enable_status;
5875 ALT_I2C_FS_SPKLEN_t ic_fs_spklen;
5876 volatile uint32_t _pad_0xa4_0xf3[20];
5877 ALT_I2C_COMP_PARAM_1_t ic_comp_param_1;
5878 ALT_I2C_COMP_VER_t ic_comp_version;
5879 ALT_I2C_COMP_TYPE_t ic_comp_type;
5883 typedef volatile struct ALT_I2C_s ALT_I2C_t;
5885 struct ALT_I2C_raw_s
5887 volatile uint32_t ic_con;
5888 volatile uint32_t ic_tar;
5889 volatile uint32_t ic_sar;
5890 uint32_t _pad_0xc_0xf;
5891 volatile uint32_t ic_data_cmd;
5892 volatile uint32_t ic_ss_scl_hcnt;
5893 volatile uint32_t ic_ss_scl_lcnt;
5894 volatile uint32_t ic_fs_scl_hcnt;
5895 volatile uint32_t ic_fs_scl_lcnt;
5896 uint32_t _pad_0x24_0x2b[2];
5897 volatile uint32_t ic_intr_stat;
5898 volatile uint32_t ic_intr_mask;
5899 volatile uint32_t ic_raw_intr_stat;
5900 volatile uint32_t ic_rx_tl;
5901 volatile uint32_t ic_tx_tl;
5902 volatile uint32_t ic_clr_intr;
5903 volatile uint32_t ic_clr_rx_under;
5904 volatile uint32_t ic_clr_rx_over;
5905 volatile uint32_t ic_clr_tx_over;
5906 volatile uint32_t ic_clr_rd_req;
5907 volatile uint32_t ic_clr_tx_abrt;
5908 volatile uint32_t ic_clr_rx_done;
5909 volatile uint32_t ic_clr_activity;
5910 volatile uint32_t ic_clr_stop_det;
5911 volatile uint32_t ic_clr_start_det;
5912 volatile uint32_t ic_clr_gen_call;
5913 volatile uint32_t ic_enable;
5914 volatile uint32_t ic_status;
5915 volatile uint32_t ic_txflr;
5916 volatile uint32_t ic_rxflr;
5917 volatile uint32_t ic_sda_hold;
5918 volatile uint32_t ic_tx_abrt_source;
5919 volatile uint32_t ic_slv_data_nack_only;
5920 volatile uint32_t ic_dma_cr;
5921 volatile uint32_t ic_dma_tdlr;
5922 volatile uint32_t ic_dma_rdlr;
5923 volatile uint32_t ic_sda_setup;
5924 volatile uint32_t ic_ack_general_call;
5925 volatile uint32_t ic_enable_status;
5926 volatile uint32_t ic_fs_spklen;
5927 uint32_t _pad_0xa4_0xf3[20];
5928 volatile uint32_t ic_comp_param_1;
5929 volatile uint32_t ic_comp_version;
5930 volatile uint32_t ic_comp_type;
5934 typedef volatile struct ALT_I2C_raw_s ALT_I2C_raw_t;