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alt_noc_ccu_ios_prb_iom_main_prb.h
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3 * Copyright 2013-2015 Altera Corporation. All Rights Reserved. *
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32 
33 /* Altera - ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB */
34 
35 #ifndef __ALT_SOCAL_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_H__
36 #define __ALT_SOCAL_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_H__
37 
38 #ifndef __ASSEMBLY__
39 #ifdef __cplusplus
40 #include <cstdint>
41 extern "C"
42 {
43 #else /* __cplusplus */
44 #include <stdint.h>
45 #endif /* __cplusplus */
46 #endif /* __ASSEMBLY__ */
47 
48 /*
49  * Component : NOC_CCU_IOS_PRB_IOM_MAIN_PRB
50  *
51  */
52 /*
53  * Register : Probe_IOM_main_Probe_Id_CoreId
54  *
55  * Register Layout
56  *
57  * Bits | Access | Reset | Description
58  * :-------|:-------|:---------|:-----------------------------------------------------------------------------
59  * [7:0] | R | 0x6 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID
60  * [31:8] | R | 0x983464 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM
61  *
62  */
63 /*
64  * Field : CORETYPEID
65  *
66  * Field identifying the type of IP.
67  *
68  * Field Access Macros:
69  *
70  */
71 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID register field. */
72 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID_LSB 0
73 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID register field. */
74 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID_MSB 7
75 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID register field. */
76 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID_WIDTH 8
77 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID register field value. */
78 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID_SET_MSK 0x000000ff
79 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID register field value. */
80 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID_CLR_MSK 0xffffff00
81 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID register field. */
82 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID_RESET 0x6
83 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID field value from a register. */
84 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID_GET(value) (((value) & 0x000000ff) >> 0)
85 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID register field value suitable for setting the register. */
86 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID_SET(value) (((value) << 0) & 0x000000ff)
87 
88 /*
89  * Field : CORECHECKSUM
90  *
91  * Field containing a checksum of the parameters of the IP.
92  *
93  * Field Access Macros:
94  *
95  */
96 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM register field. */
97 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM_LSB 8
98 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM register field. */
99 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM_MSB 31
100 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM register field. */
101 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM_WIDTH 24
102 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM register field value. */
103 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM_SET_MSK 0xffffff00
104 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM register field value. */
105 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM_CLR_MSK 0x000000ff
106 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM register field. */
107 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM_RESET 0x983464
108 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM field value from a register. */
109 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM_GET(value) (((value) & 0xffffff00) >> 8)
110 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM register field value suitable for setting the register. */
111 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM_SET(value) (((value) << 8) & 0xffffff00)
112 
113 #ifndef __ASSEMBLY__
114 /*
115  * WARNING: The C register and register group struct declarations are provided for
116  * convenience and illustrative purposes. They should, however, be used with
117  * caution as the C language standard provides no guarantees about the alignment or
118  * atomicity of device memory accesses. The recommended practice for writing
119  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
120  * alt_write_word() functions.
121  *
122  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID.
123  */
124 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_s
125 {
126  const volatile uint32_t CORETYPEID : 8; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORETYPEID */
127  const volatile uint32_t CORECHECKSUM : 24; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_CORECHECKSUM */
128 };
129 
130 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID. */
131 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_t;
132 #endif /* __ASSEMBLY__ */
133 
134 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID register. */
135 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_RESET 0x98346406
136 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID register from the beginning of the component. */
137 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_OFST 0x0
138 
139 /*
140  * Register : Probe_IOM_main_Probe_Id_RevisionId
141  *
142  * Register Layout
143  *
144  * Bits | Access | Reset | Description
145  * :-------|:-------|:------|:------------------------------------------------------------------------------
146  * [7:0] | R | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID
147  * [31:8] | R | 0x148 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID
148  *
149  */
150 /*
151  * Field : USERID
152  *
153  * Field containing a user defined value, not used anywhere inside the IP itself.
154  *
155  * Field Access Macros:
156  *
157  */
158 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID register field. */
159 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID_LSB 0
160 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID register field. */
161 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID_MSB 7
162 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID register field. */
163 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID_WIDTH 8
164 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID register field value. */
165 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID_SET_MSK 0x000000ff
166 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID register field value. */
167 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID_CLR_MSK 0xffffff00
168 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID register field. */
169 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID_RESET 0x0
170 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID field value from a register. */
171 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID_GET(value) (((value) & 0x000000ff) >> 0)
172 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID register field value suitable for setting the register. */
173 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID_SET(value) (((value) << 0) & 0x000000ff)
174 
175 /*
176  * Field : FLEXNOCID
177  *
178  * Field containing the build revision of the software used to generate the IP HDL
179  * code.
180  *
181  * Field Access Macros:
182  *
183  */
184 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID register field. */
185 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID_LSB 8
186 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID register field. */
187 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID_MSB 31
188 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID register field. */
189 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID_WIDTH 24
190 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID register field value. */
191 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID_SET_MSK 0xffffff00
192 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID register field value. */
193 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID_CLR_MSK 0x000000ff
194 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID register field. */
195 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID_RESET 0x148
196 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID field value from a register. */
197 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID_GET(value) (((value) & 0xffffff00) >> 8)
198 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID register field value suitable for setting the register. */
199 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID_SET(value) (((value) << 8) & 0xffffff00)
200 
201 #ifndef __ASSEMBLY__
202 /*
203  * WARNING: The C register and register group struct declarations are provided for
204  * convenience and illustrative purposes. They should, however, be used with
205  * caution as the C language standard provides no guarantees about the alignment or
206  * atomicity of device memory accesses. The recommended practice for writing
207  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
208  * alt_write_word() functions.
209  *
210  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID.
211  */
212 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_s
213 {
214  const volatile uint32_t USERID : 8; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_USERID */
215  const volatile uint32_t FLEXNOCID : 24; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_FLEXNOCID */
216 };
217 
218 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID. */
219 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_t;
220 #endif /* __ASSEMBLY__ */
221 
222 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID register. */
223 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_RESET 0x00014800
224 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID register from the beginning of the component. */
225 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_OFST 0x4
226 
227 /*
228  * Register : Probe_IOM_main_Probe_MainCtl
229  *
230  * Register MainCtl contains probe global control bits. The register has seven bit
231  * fields:
232  *
233  * Register Layout
234  *
235  * Bits | Access | Reset | Description
236  * :-------|:-------|:--------|:----------------------------------------------------------------------------------------
237  * [0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN
238  * [1] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN
239  * [2] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN
240  * [3] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN
241  * [4] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN
242  * [5] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP
243  * [6] | R | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE
244  * [7] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN
245  * [31:8] | ??? | Unknown | *UNDEFINED*
246  *
247  */
248 /*
249  * Field : ERREN
250  *
251  * Register field ErrEn enables the probe to send on the ObsTx output any packet
252  * with Error status, independently of filtering mechanisms, thus constituting a
253  * simple supplementary global filter.
254  *
255  * Field Access Macros:
256  *
257  */
258 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN register field. */
259 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN_LSB 0
260 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN register field. */
261 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN_MSB 0
262 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN register field. */
263 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN_WIDTH 1
264 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN register field value. */
265 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN_SET_MSK 0x00000001
266 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN register field value. */
267 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN_CLR_MSK 0xfffffffe
268 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN register field. */
269 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN_RESET 0x0
270 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN field value from a register. */
271 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN_GET(value) (((value) & 0x00000001) >> 0)
272 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN register field value suitable for setting the register. */
273 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN_SET(value) (((value) << 0) & 0x00000001)
274 
275 /*
276  * Field : TRACEEN
277  *
278  * Register field TraceEn enables the probe to send filtered packets (Trace) on the
279  * ObsTx observation output.
280  *
281  * Field Access Macros:
282  *
283  */
284 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN register field. */
285 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN_LSB 1
286 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN register field. */
287 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN_MSB 1
288 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN register field. */
289 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN_WIDTH 1
290 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN register field value. */
291 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN_SET_MSK 0x00000002
292 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN register field value. */
293 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN_CLR_MSK 0xfffffffd
294 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN register field. */
295 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN_RESET 0x0
296 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN field value from a register. */
297 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN_GET(value) (((value) & 0x00000002) >> 1)
298 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN register field value suitable for setting the register. */
299 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN_SET(value) (((value) << 1) & 0x00000002)
300 
301 /*
302  * Field : PAYLOADEN
303  *
304  * Register field PayloadEn, when set to 1, enables traces to contain headers and
305  * payload. When set ot 0, only headers are reported.
306  *
307  * Field Access Macros:
308  *
309  */
310 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN register field. */
311 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN_LSB 2
312 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN register field. */
313 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN_MSB 2
314 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN register field. */
315 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN_WIDTH 1
316 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN register field value. */
317 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN_SET_MSK 0x00000004
318 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN register field value. */
319 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN_CLR_MSK 0xfffffffb
320 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN register field. */
321 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN_RESET 0x0
322 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN field value from a register. */
323 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN_GET(value) (((value) & 0x00000004) >> 2)
324 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN register field value suitable for setting the register. */
325 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN_SET(value) (((value) << 2) & 0x00000004)
326 
327 /*
328  * Field : STATEN
329  *
330  * When set to 1, register field StatEn enables statistics profiling. The probe
331  * sendS statistics results to the output for signal ObsTx. All statistics counters
332  * are cleared when the StatEn bit goes from 0 to 1. When set to 0, counters are
333  * disabled.
334  *
335  * Field Access Macros:
336  *
337  */
338 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN register field. */
339 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN_LSB 3
340 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN register field. */
341 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN_MSB 3
342 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN register field. */
343 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN_WIDTH 1
344 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN register field value. */
345 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN_SET_MSK 0x00000008
346 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN register field value. */
347 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN_CLR_MSK 0xfffffff7
348 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN register field. */
349 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN_RESET 0x0
350 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN field value from a register. */
351 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN_GET(value) (((value) & 0x00000008) >> 3)
352 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN register field value suitable for setting the register. */
353 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN_SET(value) (((value) << 3) & 0x00000008)
354 
355 /*
356  * Field : ALARMEN
357  *
358  * When set, register field AlarmEn enables the probe to collect alarm-related
359  * information. When the register field bit is null, both TraceAlarm and StatAlarm
360  * outputs are driven to 0.
361  *
362  * Field Access Macros:
363  *
364  */
365 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN register field. */
366 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN_LSB 4
367 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN register field. */
368 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN_MSB 4
369 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN register field. */
370 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN_WIDTH 1
371 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN register field value. */
372 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN_SET_MSK 0x00000010
373 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN register field value. */
374 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN_CLR_MSK 0xffffffef
375 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN register field. */
376 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN_RESET 0x0
377 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN field value from a register. */
378 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN_GET(value) (((value) & 0x00000010) >> 4)
379 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN register field value suitable for setting the register. */
380 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN_SET(value) (((value) << 4) & 0x00000010)
381 
382 /*
383  * Field : STATCONDDUMP
384  *
385  * When set, register field StatCondDump enables the dump of a statistics frame to
386  * the range of counter values set for registers StatAlarmMin, StatAlarmMax, and
387  * AlarmMode. This field also renders register StatAlarmStatus inoperative. When
388  * parameter statisticsCounterAlarm is set to False, the StatCondDump register bit
389  * is reserved.
390  *
391  * Field Access Macros:
392  *
393  */
394 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP register field. */
395 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP_LSB 5
396 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP register field. */
397 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP_MSB 5
398 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP register field. */
399 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP_WIDTH 1
400 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP register field value. */
401 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP_SET_MSK 0x00000020
402 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP register field value. */
403 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP_CLR_MSK 0xffffffdf
404 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP register field. */
405 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP_RESET 0x0
406 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP field value from a register. */
407 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP_GET(value) (((value) & 0x00000020) >> 5)
408 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP register field value suitable for setting the register. */
409 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP_SET(value) (((value) << 5) & 0x00000020)
410 
411 /*
412  * Field : INTRUSIVEMODE
413  *
414  * When set to 1, register field IntrusiveMode enables trace operation in Intrusive
415  * flow-control mode. When set to 0, the register enables trace operation in
416  * Overflow flow-control mode
417  *
418  * Field Access Macros:
419  *
420  */
421 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE register field. */
422 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE_LSB 6
423 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE register field. */
424 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE_MSB 6
425 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE register field. */
426 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE_WIDTH 1
427 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE register field value. */
428 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE_SET_MSK 0x00000040
429 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE register field value. */
430 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE_CLR_MSK 0xffffffbf
431 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE register field. */
432 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE_RESET 0x0
433 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE field value from a register. */
434 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE_GET(value) (((value) & 0x00000040) >> 6)
435 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE register field value suitable for setting the register. */
436 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE_SET(value) (((value) << 6) & 0x00000040)
437 
438 /*
439  * Field : FILTBYTEALWAYSCHAINABLEEN
440  *
441  * When set to 0, filters are mapped to all statistic counters when counting bytes
442  * or enabled bytes. Therefore, only filter events mapped to even counters can be
443  * counted using a pair of chained counters.When set to 1, filters are mapped only
444  * to even statistic counters when counting bytes or enabled bytes. Thus events
445  * from any filter can be counted using a pair of chained counters.
446  *
447  * Field Access Macros:
448  *
449  */
450 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field. */
451 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_LSB 7
452 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field. */
453 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_MSB 7
454 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field. */
455 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_WIDTH 1
456 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field value. */
457 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_SET_MSK 0x00000080
458 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field value. */
459 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_CLR_MSK 0xffffff7f
460 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field. */
461 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_RESET 0x0
462 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN field value from a register. */
463 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_GET(value) (((value) & 0x00000080) >> 7)
464 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field value suitable for setting the register. */
465 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_SET(value) (((value) << 7) & 0x00000080)
466 
467 #ifndef __ASSEMBLY__
468 /*
469  * WARNING: The C register and register group struct declarations are provided for
470  * convenience and illustrative purposes. They should, however, be used with
471  * caution as the C language standard provides no guarantees about the alignment or
472  * atomicity of device memory accesses. The recommended practice for writing
473  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
474  * alt_write_word() functions.
475  *
476  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL.
477  */
478 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_s
479 {
480  volatile uint32_t ERREN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ERREN */
481  volatile uint32_t TRACEEN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_TRACEEN */
482  volatile uint32_t PAYLOADEN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_PAYLOADEN */
483  volatile uint32_t STATEN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATEN */
484  volatile uint32_t ALARMEN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_ALARMEN */
485  volatile uint32_t STATCONDDUMP : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_STATCONDDUMP */
486  const volatile uint32_t INTRUSIVEMODE : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_INTRUSIVEMODE */
487  volatile uint32_t FILTBYTEALWAYSCHAINABLEEN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_FILTBYTEALWAYSCHAINABLEEN */
488  uint32_t : 24; /* *UNDEFINED* */
489 };
490 
491 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL. */
492 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_t;
493 #endif /* __ASSEMBLY__ */
494 
495 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL register. */
496 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_RESET 0x00000000
497 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL register from the beginning of the component. */
498 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_OFST 0x8
499 
500 /*
501  * Register : Probe_IOM_main_Probe_CfgCtl
502  *
503  * Register Layout
504  *
505  * Bits | Access | Reset | Description
506  * :-------|:-------|:--------|:----------------------------------------------------------------------
507  * [0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN
508  * [1] | R | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE
509  * [31:2] | ??? | Unknown | *UNDEFINED*
510  *
511  */
512 /*
513  * Field : GLOBALEN
514  *
515  * Field Access Macros:
516  *
517  */
518 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN register field. */
519 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN_LSB 0
520 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN register field. */
521 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN_MSB 0
522 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN register field. */
523 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN_WIDTH 1
524 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN register field value. */
525 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN_SET_MSK 0x00000001
526 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN register field value. */
527 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN_CLR_MSK 0xfffffffe
528 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN register field. */
529 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN_RESET 0x0
530 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN field value from a register. */
531 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN_GET(value) (((value) & 0x00000001) >> 0)
532 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN register field value suitable for setting the register. */
533 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN_SET(value) (((value) << 0) & 0x00000001)
534 
535 /*
536  * Field : ACTIVE
537  *
538  * Field Access Macros:
539  *
540  */
541 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE register field. */
542 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE_LSB 1
543 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE register field. */
544 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE_MSB 1
545 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE register field. */
546 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE_WIDTH 1
547 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE register field value. */
548 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE_SET_MSK 0x00000002
549 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE register field value. */
550 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE_CLR_MSK 0xfffffffd
551 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE register field. */
552 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE_RESET 0x0
553 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE field value from a register. */
554 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE_GET(value) (((value) & 0x00000002) >> 1)
555 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE register field value suitable for setting the register. */
556 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE_SET(value) (((value) << 1) & 0x00000002)
557 
558 #ifndef __ASSEMBLY__
559 /*
560  * WARNING: The C register and register group struct declarations are provided for
561  * convenience and illustrative purposes. They should, however, be used with
562  * caution as the C language standard provides no guarantees about the alignment or
563  * atomicity of device memory accesses. The recommended practice for writing
564  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
565  * alt_write_word() functions.
566  *
567  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL.
568  */
569 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_s
570 {
571  volatile uint32_t GLOBALEN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_GLOBALEN */
572  const volatile uint32_t ACTIVE : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_ACTIVE */
573  uint32_t : 30; /* *UNDEFINED* */
574 };
575 
576 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL. */
577 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_t;
578 #endif /* __ASSEMBLY__ */
579 
580 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL register. */
581 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_RESET 0x00000000
582 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL register from the beginning of the component. */
583 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_OFST 0xc
584 
585 /*
586  * Register : Probe_IOM_main_Probe_FilterLut
587  *
588  * Register Layout
589  *
590  * Bits | Access | Reset | Description
591  * :-------|:-------|:--------|:--------------------------------------------------------------------------
592  * [1:0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT
593  * [31:2] | ??? | Unknown | *UNDEFINED*
594  *
595  */
596 /*
597  * Field : FILTERLUT
598  *
599  * Register FilterLut contains a look-up table that is used to combine filter
600  * outputs in order to trace packets. Packet tracing is enabled when the FilterLut
601  * bit of index (FNout ... F0out) is equal to 1.The number of bits in register
602  * FilterLut is determined by the setting for parameter nFilter, calculated as
603  * 2**nFilter.When parameter nFilter is set to None, FilterLut is reserved.
604  *
605  * Field Access Macros:
606  *
607  */
608 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT register field. */
609 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT_LSB 0
610 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT register field. */
611 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT_MSB 1
612 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT register field. */
613 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT_WIDTH 2
614 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT register field value. */
615 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT_SET_MSK 0x00000003
616 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT register field value. */
617 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT_CLR_MSK 0xfffffffc
618 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT register field. */
619 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT_RESET 0x0
620 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT field value from a register. */
621 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT_GET(value) (((value) & 0x00000003) >> 0)
622 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT register field value suitable for setting the register. */
623 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT_SET(value) (((value) << 0) & 0x00000003)
624 
625 #ifndef __ASSEMBLY__
626 /*
627  * WARNING: The C register and register group struct declarations are provided for
628  * convenience and illustrative purposes. They should, however, be used with
629  * caution as the C language standard provides no guarantees about the alignment or
630  * atomicity of device memory accesses. The recommended practice for writing
631  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
632  * alt_write_word() functions.
633  *
634  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT.
635  */
636 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_s
637 {
638  volatile uint32_t FILTERLUT : 2; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_FILTERLUT */
639  uint32_t : 30; /* *UNDEFINED* */
640 };
641 
642 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT. */
643 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_t;
644 #endif /* __ASSEMBLY__ */
645 
646 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT register. */
647 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_RESET 0x00000000
648 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT register from the beginning of the component. */
649 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_OFST 0x14
650 
651 /*
652  * Register : Probe_IOM_main_Probe_TraceAlarmEn
653  *
654  * Register Layout
655  *
656  * Bits | Access | Reset | Description
657  * :-------|:-------|:--------|:--------------------------------------------------------------------------------
658  * [1:0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN
659  * [31:2] | ??? | Unknown | *UNDEFINED*
660  *
661  */
662 /*
663  * Field : TRACEALARMEN
664  *
665  * Register TraceAlarmEn controls which lookup table or filter can set the
666  * TraceAlarm signal output once the trace alarm status is set. The number of bits
667  * in register TraceAlarmEn is determined by the value set for parameter nFilter +
668  * 1.Bit nFilter controls the lookup table output, and bits nFilter:0 control the
669  * corresponding filter output. When parameter nFilter is set to None, TraceAlarmEn
670  * is reserved.
671  *
672  * Field Access Macros:
673  *
674  */
675 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN register field. */
676 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN_LSB 0
677 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN register field. */
678 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN_MSB 1
679 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN register field. */
680 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN_WIDTH 2
681 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN register field value. */
682 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN_SET_MSK 0x00000003
683 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN register field value. */
684 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN_CLR_MSK 0xfffffffc
685 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN register field. */
686 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN_RESET 0x0
687 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN field value from a register. */
688 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN_GET(value) (((value) & 0x00000003) >> 0)
689 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN register field value suitable for setting the register. */
690 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN_SET(value) (((value) << 0) & 0x00000003)
691 
692 #ifndef __ASSEMBLY__
693 /*
694  * WARNING: The C register and register group struct declarations are provided for
695  * convenience and illustrative purposes. They should, however, be used with
696  * caution as the C language standard provides no guarantees about the alignment or
697  * atomicity of device memory accesses. The recommended practice for writing
698  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
699  * alt_write_word() functions.
700  *
701  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN.
702  */
703 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_s
704 {
705  volatile uint32_t TRACEALARMEN : 2; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_TRACEALARMEN */
706  uint32_t : 30; /* *UNDEFINED* */
707 };
708 
709 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN. */
710 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_t;
711 #endif /* __ASSEMBLY__ */
712 
713 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN register. */
714 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_RESET 0x00000000
715 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN register from the beginning of the component. */
716 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_OFST 0x18
717 
718 /*
719  * Register : Probe_IOM_main_Probe_TraceAlarmStatus
720  *
721  * Register Layout
722  *
723  * Bits | Access | Reset | Description
724  * :-------|:-------|:--------|:----------------------------------------------------------------------------------------
725  * [1:0] | R | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS
726  * [31:2] | ??? | Unknown | *UNDEFINED*
727  *
728  */
729 /*
730  * Field : TRACEALARMSTATUS
731  *
732  * Register TraceAlarmStatus is a read-only register that indicates which lookup
733  * table or filter has been matched by a packet, independently of register
734  * TraceAlarmEn bit configuration. The number of bits in TraceAlarmStatus is
735  * determined by the value set for parameter nFilter + 1.When nFilter is set to
736  * None, TraceAlarmStatus is reserved.
737  *
738  * Field Access Macros:
739  *
740  */
741 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS register field. */
742 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS_LSB 0
743 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS register field. */
744 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS_MSB 1
745 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS register field. */
746 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS_WIDTH 2
747 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS register field value. */
748 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS_SET_MSK 0x00000003
749 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS register field value. */
750 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS_CLR_MSK 0xfffffffc
751 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS register field. */
752 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS_RESET 0x0
753 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS field value from a register. */
754 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS_GET(value) (((value) & 0x00000003) >> 0)
755 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS register field value suitable for setting the register. */
756 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS_SET(value) (((value) << 0) & 0x00000003)
757 
758 #ifndef __ASSEMBLY__
759 /*
760  * WARNING: The C register and register group struct declarations are provided for
761  * convenience and illustrative purposes. They should, however, be used with
762  * caution as the C language standard provides no guarantees about the alignment or
763  * atomicity of device memory accesses. The recommended practice for writing
764  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
765  * alt_write_word() functions.
766  *
767  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS.
768  */
769 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_s
770 {
771  const volatile uint32_t TRACEALARMSTATUS : 2; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_TRACEALARMSTATUS */
772  uint32_t : 30; /* *UNDEFINED* */
773 };
774 
775 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS. */
776 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_t;
777 #endif /* __ASSEMBLY__ */
778 
779 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS register. */
780 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_RESET 0x00000000
781 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS register from the beginning of the component. */
782 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_OFST 0x1c
783 
784 /*
785  * Register : Probe_IOM_main_Probe_TraceAlarmClr
786  *
787  * Register Layout
788  *
789  * Bits | Access | Reset | Description
790  * :-------|:-------|:--------|:----------------------------------------------------------------------------------
791  * [1:0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR
792  * [31:2] | ??? | Unknown | *UNDEFINED*
793  *
794  */
795 /*
796  * Field : TRACEALARMCLR
797  *
798  * Setting a bit to 1 in register TraceAlarmClr clears the corresponding bit in
799  * register TraceAlarmStatus.The number of bits in register TraceAlarmClr is equal
800  * to (nFilter + 1). When nFilter is set to 0, TraceAlarmClr is reserved.NOTE The
801  * written value is not stored in TraceAlarmClr. A read always returns 0.
802  *
803  * Field Access Macros:
804  *
805  */
806 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR register field. */
807 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR_LSB 0
808 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR register field. */
809 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR_MSB 1
810 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR register field. */
811 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR_WIDTH 2
812 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR register field value. */
813 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR_SET_MSK 0x00000003
814 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR register field value. */
815 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR_CLR_MSK 0xfffffffc
816 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR register field. */
817 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR_RESET 0x0
818 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR field value from a register. */
819 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR_GET(value) (((value) & 0x00000003) >> 0)
820 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR register field value suitable for setting the register. */
821 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR_SET(value) (((value) << 0) & 0x00000003)
822 
823 #ifndef __ASSEMBLY__
824 /*
825  * WARNING: The C register and register group struct declarations are provided for
826  * convenience and illustrative purposes. They should, however, be used with
827  * caution as the C language standard provides no guarantees about the alignment or
828  * atomicity of device memory accesses. The recommended practice for writing
829  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
830  * alt_write_word() functions.
831  *
832  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR.
833  */
834 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_s
835 {
836  volatile uint32_t TRACEALARMCLR : 2; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_TRACEALARMCLR */
837  uint32_t : 30; /* *UNDEFINED* */
838 };
839 
840 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR. */
841 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_t;
842 #endif /* __ASSEMBLY__ */
843 
844 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR register. */
845 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_RESET 0x00000000
846 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR register from the beginning of the component. */
847 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_OFST 0x20
848 
849 /*
850  * Register : Probe_IOM_main_Probe_StatGo
851  *
852  * Register Layout
853  *
854  * Bits | Access | Reset | Description
855  * :-------|:-------|:--------|:--------------------------------------------------------------------
856  * [0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO
857  * [31:1] | ??? | Unknown | *UNDEFINED*
858  *
859  */
860 /*
861  * Field : STATGO
862  *
863  * Writing a 1 to the 1-bit pulse register StatGo generates a statistics dump.The
864  * register is active when statistics collection operates in manual mode, that is,
865  * when register StatPeriod is set to 0.NOTE The written value is not stored in
866  * StatGo. A read always returns 0.
867  *
868  * Field Access Macros:
869  *
870  */
871 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO register field. */
872 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO_LSB 0
873 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO register field. */
874 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO_MSB 0
875 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO register field. */
876 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO_WIDTH 1
877 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO register field value. */
878 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO_SET_MSK 0x00000001
879 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO register field value. */
880 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO_CLR_MSK 0xfffffffe
881 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO register field. */
882 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO_RESET 0x0
883 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO field value from a register. */
884 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO_GET(value) (((value) & 0x00000001) >> 0)
885 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO register field value suitable for setting the register. */
886 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO_SET(value) (((value) << 0) & 0x00000001)
887 
888 #ifndef __ASSEMBLY__
889 /*
890  * WARNING: The C register and register group struct declarations are provided for
891  * convenience and illustrative purposes. They should, however, be used with
892  * caution as the C language standard provides no guarantees about the alignment or
893  * atomicity of device memory accesses. The recommended practice for writing
894  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
895  * alt_write_word() functions.
896  *
897  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO.
898  */
899 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_s
900 {
901  volatile uint32_t STATGO : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_STATGO */
902  uint32_t : 31; /* *UNDEFINED* */
903 };
904 
905 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO. */
906 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_t;
907 #endif /* __ASSEMBLY__ */
908 
909 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO register. */
910 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_RESET 0x00000000
911 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO register from the beginning of the component. */
912 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_OFST 0x28
913 
914 /*
915  * Register : Probe_IOM_main_Probe_Filters_0_RouteIdBase
916  *
917  * Register Layout
918  *
919  * Bits | Access | Reset | Description
920  * :--------|:-------|:--------|:--------------------------------------------------------------------------------------------------
921  * [22:0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE
922  * [31:23] | ??? | Unknown | *UNDEFINED*
923  *
924  */
925 /*
926  * Field : FILTERS_0_ROUTEIDBASE
927  *
928  * Register RouteIdBase contains the RouteId-lsbFilterRouteId bits base used to
929  * filter packets.
930  *
931  * Field Access Macros:
932  *
933  */
934 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE register field. */
935 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE_LSB 0
936 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE register field. */
937 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE_MSB 22
938 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE register field. */
939 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE_WIDTH 23
940 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE register field value. */
941 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE_SET_MSK 0x007fffff
942 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE register field value. */
943 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE_CLR_MSK 0xff800000
944 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE register field. */
945 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE_RESET 0x0
946 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE field value from a register. */
947 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE_GET(value) (((value) & 0x007fffff) >> 0)
948 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE register field value suitable for setting the register. */
949 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE_SET(value) (((value) << 0) & 0x007fffff)
950 
951 #ifndef __ASSEMBLY__
952 /*
953  * WARNING: The C register and register group struct declarations are provided for
954  * convenience and illustrative purposes. They should, however, be used with
955  * caution as the C language standard provides no guarantees about the alignment or
956  * atomicity of device memory accesses. The recommended practice for writing
957  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
958  * alt_write_word() functions.
959  *
960  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE.
961  */
962 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_s
963 {
964  volatile uint32_t FILTERS_0_ROUTEIDBASE : 23; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_FILTERS_0_ROUTEIDBASE */
965  uint32_t : 9; /* *UNDEFINED* */
966 };
967 
968 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE. */
969 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_t;
970 #endif /* __ASSEMBLY__ */
971 
972 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE register. */
973 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_RESET 0x00000000
974 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE register from the beginning of the component. */
975 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_OFST 0x44
976 
977 /*
978  * Register : Probe_IOM_main_Probe_Filters_0_RouteIdMask
979  *
980  * Register Layout
981  *
982  * Bits | Access | Reset | Description
983  * :--------|:-------|:--------|:--------------------------------------------------------------------------------------------------
984  * [22:0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK
985  * [31:23] | ??? | Unknown | *UNDEFINED*
986  *
987  */
988 /*
989  * Field : FILTERS_0_ROUTEIDMASK
990  *
991  * Register RouteIdMask contains the RouteId-lsbFilterRouteId mask used to filter
992  * packets. A packet is a candidate when packet.RouteId>>lsbFilterRouteId &
993  * RouteIdMask = RouteIdBase & RouteIdMask.
994  *
995  * Field Access Macros:
996  *
997  */
998 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK register field. */
999 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK_LSB 0
1000 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK register field. */
1001 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK_MSB 22
1002 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK register field. */
1003 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK_WIDTH 23
1004 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK register field value. */
1005 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK_SET_MSK 0x007fffff
1006 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK register field value. */
1007 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK_CLR_MSK 0xff800000
1008 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK register field. */
1009 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK_RESET 0x0
1010 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK field value from a register. */
1011 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK_GET(value) (((value) & 0x007fffff) >> 0)
1012 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK register field value suitable for setting the register. */
1013 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK_SET(value) (((value) << 0) & 0x007fffff)
1014 
1015 #ifndef __ASSEMBLY__
1016 /*
1017  * WARNING: The C register and register group struct declarations are provided for
1018  * convenience and illustrative purposes. They should, however, be used with
1019  * caution as the C language standard provides no guarantees about the alignment or
1020  * atomicity of device memory accesses. The recommended practice for writing
1021  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1022  * alt_write_word() functions.
1023  *
1024  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK.
1025  */
1026 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_s
1027 {
1028  volatile uint32_t FILTERS_0_ROUTEIDMASK : 23; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_FILTERS_0_ROUTEIDMASK */
1029  uint32_t : 9; /* *UNDEFINED* */
1030 };
1031 
1032 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK. */
1033 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_t;
1034 #endif /* __ASSEMBLY__ */
1035 
1036 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK register. */
1037 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_RESET 0x00000000
1038 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK register from the beginning of the component. */
1039 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_OFST 0x48
1040 
1041 /*
1042  * Register : Probe_IOM_main_Probe_Filters_0_AddrBase_Low
1043  *
1044  * Register Layout
1045  *
1046  * Bits | Access | Reset | Description
1047  * :-------|:-------|:------|:----------------------------------------------------------------------------------------------------
1048  * [31:0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW
1049  *
1050  */
1051 /*
1052  * Field : FILTERS_0_ADDRBASE_LOW
1053  *
1054  * Address LSB register.
1055  *
1056  * Field Access Macros:
1057  *
1058  */
1059 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW register field. */
1060 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW_LSB 0
1061 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW register field. */
1062 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW_MSB 31
1063 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW register field. */
1064 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW_WIDTH 32
1065 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW register field value. */
1066 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW_SET_MSK 0xffffffff
1067 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW register field value. */
1068 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW_CLR_MSK 0x00000000
1069 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW register field. */
1070 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW_RESET 0x0
1071 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW field value from a register. */
1072 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW_GET(value) (((value) & 0xffffffff) >> 0)
1073 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW register field value suitable for setting the register. */
1074 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW_SET(value) (((value) << 0) & 0xffffffff)
1075 
1076 #ifndef __ASSEMBLY__
1077 /*
1078  * WARNING: The C register and register group struct declarations are provided for
1079  * convenience and illustrative purposes. They should, however, be used with
1080  * caution as the C language standard provides no guarantees about the alignment or
1081  * atomicity of device memory accesses. The recommended practice for writing
1082  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1083  * alt_write_word() functions.
1084  *
1085  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW.
1086  */
1087 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_s
1088 {
1089  volatile uint32_t FILTERS_0_ADDRBASE_LOW : 32; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_FILTERS_0_ADDRBASE_LOW */
1090 };
1091 
1092 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW. */
1093 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_t;
1094 #endif /* __ASSEMBLY__ */
1095 
1096 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW register. */
1097 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_RESET 0x00000000
1098 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW register from the beginning of the component. */
1099 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_OFST 0x4c
1100 
1101 /*
1102  * Register : Probe_IOM_main_Probe_Filters_0_AddrBase_High
1103  *
1104  * Register Layout
1105  *
1106  * Bits | Access | Reset | Description
1107  * :-------|:-------|:--------|:------------------------------------------------------------------------------------------------------
1108  * [4:0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH
1109  * [31:5] | ??? | Unknown | *UNDEFINED*
1110  *
1111  */
1112 /*
1113  * Field : FILTERS_0_ADDRBASE_HIGH
1114  *
1115  * Address MSB register.
1116  *
1117  * Field Access Macros:
1118  *
1119  */
1120 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH register field. */
1121 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH_LSB 0
1122 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH register field. */
1123 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH_MSB 4
1124 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH register field. */
1125 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH_WIDTH 5
1126 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH register field value. */
1127 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH_SET_MSK 0x0000001f
1128 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH register field value. */
1129 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH_CLR_MSK 0xffffffe0
1130 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH register field. */
1131 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH_RESET 0x0
1132 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH field value from a register. */
1133 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH_GET(value) (((value) & 0x0000001f) >> 0)
1134 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH register field value suitable for setting the register. */
1135 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH_SET(value) (((value) << 0) & 0x0000001f)
1136 
1137 #ifndef __ASSEMBLY__
1138 /*
1139  * WARNING: The C register and register group struct declarations are provided for
1140  * convenience and illustrative purposes. They should, however, be used with
1141  * caution as the C language standard provides no guarantees about the alignment or
1142  * atomicity of device memory accesses. The recommended practice for writing
1143  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1144  * alt_write_word() functions.
1145  *
1146  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH.
1147  */
1148 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_s
1149 {
1150  volatile uint32_t FILTERS_0_ADDRBASE_HIGH : 5; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_FILTERS_0_ADDRBASE_HIGH */
1151  uint32_t : 27; /* *UNDEFINED* */
1152 };
1153 
1154 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH. */
1155 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_t;
1156 #endif /* __ASSEMBLY__ */
1157 
1158 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH register. */
1159 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_RESET 0x00000000
1160 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH register from the beginning of the component. */
1161 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_OFST 0x50
1162 
1163 /*
1164  * Register : Probe_IOM_main_Probe_Filters_0_WindowSize
1165  *
1166  * Register Layout
1167  *
1168  * Bits | Access | Reset | Description
1169  * :-------|:-------|:--------|:------------------------------------------------------------------------------------------------
1170  * [5:0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE
1171  * [31:6] | ??? | Unknown | *UNDEFINED*
1172  *
1173  */
1174 /*
1175  * Field : FILTERS_0_WINDOWSIZE
1176  *
1177  * Register WindowSize contains the encoded address mask used to filter packets.
1178  * The effective Mask value is equal to ~(2max(WindowSize, packet.Len) - 1). A
1179  * packet is a candidate when packet.Addr & Mask = AddrBase & Mask. This allows
1180  * filteringof packets having an intersection with the AddrBase/WindowSize burst
1181  * aligned region, even if the region is smaller than the packet.
1182  *
1183  * Field Access Macros:
1184  *
1185  */
1186 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE register field. */
1187 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE_LSB 0
1188 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE register field. */
1189 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE_MSB 5
1190 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE register field. */
1191 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE_WIDTH 6
1192 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE register field value. */
1193 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE_SET_MSK 0x0000003f
1194 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE register field value. */
1195 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE_CLR_MSK 0xffffffc0
1196 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE register field. */
1197 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE_RESET 0x0
1198 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE field value from a register. */
1199 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE_GET(value) (((value) & 0x0000003f) >> 0)
1200 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE register field value suitable for setting the register. */
1201 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE_SET(value) (((value) << 0) & 0x0000003f)
1202 
1203 #ifndef __ASSEMBLY__
1204 /*
1205  * WARNING: The C register and register group struct declarations are provided for
1206  * convenience and illustrative purposes. They should, however, be used with
1207  * caution as the C language standard provides no guarantees about the alignment or
1208  * atomicity of device memory accesses. The recommended practice for writing
1209  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1210  * alt_write_word() functions.
1211  *
1212  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE.
1213  */
1214 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_s
1215 {
1216  volatile uint32_t FILTERS_0_WINDOWSIZE : 6; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_FILTERS_0_WINDOWSIZE */
1217  uint32_t : 26; /* *UNDEFINED* */
1218 };
1219 
1220 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE. */
1221 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_t;
1222 #endif /* __ASSEMBLY__ */
1223 
1224 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE register. */
1225 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_RESET 0x00000000
1226 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE register from the beginning of the component. */
1227 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_OFST 0x54
1228 
1229 /*
1230  * Register : Probe_IOM_main_Probe_Filters_0_SecurityBase
1231  *
1232  * Register Layout
1233  *
1234  * Bits | Access | Reset | Description
1235  * :-------|:-------|:--------|:----------------------------------------------------------------------------------------------------
1236  * [1:0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE
1237  * [31:2] | ??? | Unknown | *UNDEFINED*
1238  *
1239  */
1240 /*
1241  * Field : FILTERS_0_SECURITYBASE
1242  *
1243  * Register SecurityBase contains the security base used to filter packets.
1244  *
1245  * Field Access Macros:
1246  *
1247  */
1248 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE register field. */
1249 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE_LSB 0
1250 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE register field. */
1251 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE_MSB 1
1252 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE register field. */
1253 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE_WIDTH 2
1254 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE register field value. */
1255 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE_SET_MSK 0x00000003
1256 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE register field value. */
1257 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE_CLR_MSK 0xfffffffc
1258 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE register field. */
1259 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE_RESET 0x0
1260 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE field value from a register. */
1261 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE_GET(value) (((value) & 0x00000003) >> 0)
1262 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE register field value suitable for setting the register. */
1263 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE_SET(value) (((value) << 0) & 0x00000003)
1264 
1265 #ifndef __ASSEMBLY__
1266 /*
1267  * WARNING: The C register and register group struct declarations are provided for
1268  * convenience and illustrative purposes. They should, however, be used with
1269  * caution as the C language standard provides no guarantees about the alignment or
1270  * atomicity of device memory accesses. The recommended practice for writing
1271  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1272  * alt_write_word() functions.
1273  *
1274  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE.
1275  */
1276 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_s
1277 {
1278  volatile uint32_t FILTERS_0_SECURITYBASE : 2; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_FILTERS_0_SECURITYBASE */
1279  uint32_t : 30; /* *UNDEFINED* */
1280 };
1281 
1282 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE. */
1283 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_t;
1284 #endif /* __ASSEMBLY__ */
1285 
1286 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE register. */
1287 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_RESET 0x00000000
1288 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE register from the beginning of the component. */
1289 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_OFST 0x58
1290 
1291 /*
1292  * Register : Probe_IOM_main_Probe_Filters_0_SecurityMask
1293  *
1294  * Register Layout
1295  *
1296  * Bits | Access | Reset | Description
1297  * :-------|:-------|:--------|:----------------------------------------------------------------------------------------------------
1298  * [1:0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK
1299  * [31:2] | ??? | Unknown | *UNDEFINED*
1300  *
1301  */
1302 /*
1303  * Field : FILTERS_0_SECURITYMASK
1304  *
1305  * Register SecurityMask is contains the security mask used to filter packets. A
1306  * packet is a candidate when: packet.Security & SecurityMask = SecurityBase &
1307  * SecurityMasks.
1308  *
1309  * Field Access Macros:
1310  *
1311  */
1312 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK register field. */
1313 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK_LSB 0
1314 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK register field. */
1315 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK_MSB 1
1316 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK register field. */
1317 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK_WIDTH 2
1318 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK register field value. */
1319 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK_SET_MSK 0x00000003
1320 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK register field value. */
1321 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK_CLR_MSK 0xfffffffc
1322 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK register field. */
1323 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK_RESET 0x0
1324 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK field value from a register. */
1325 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK_GET(value) (((value) & 0x00000003) >> 0)
1326 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK register field value suitable for setting the register. */
1327 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK_SET(value) (((value) << 0) & 0x00000003)
1328 
1329 #ifndef __ASSEMBLY__
1330 /*
1331  * WARNING: The C register and register group struct declarations are provided for
1332  * convenience and illustrative purposes. They should, however, be used with
1333  * caution as the C language standard provides no guarantees about the alignment or
1334  * atomicity of device memory accesses. The recommended practice for writing
1335  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1336  * alt_write_word() functions.
1337  *
1338  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK.
1339  */
1340 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_s
1341 {
1342  volatile uint32_t FILTERS_0_SECURITYMASK : 2; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_FILTERS_0_SECURITYMASK */
1343  uint32_t : 30; /* *UNDEFINED* */
1344 };
1345 
1346 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK. */
1347 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_t;
1348 #endif /* __ASSEMBLY__ */
1349 
1350 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK register. */
1351 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_RESET 0x00000000
1352 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK register from the beginning of the component. */
1353 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_OFST 0x5c
1354 
1355 /*
1356  * Register : Probe_IOM_main_Probe_Filters_0_Opcode
1357  *
1358  * Packet Probe register Opcode is a 4-bit register that selects candidate packets
1359  * based on packet opcodes (0 disables the filter):
1360  *
1361  * Register Layout
1362  *
1363  * Bits | Access | Reset | Description
1364  * :-------|:-------|:--------|:------------------------------------------------------------------------------
1365  * [0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN
1366  * [1] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN
1367  * [2] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN
1368  * [3] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN
1369  * [31:4] | ??? | Unknown | *UNDEFINED*
1370  *
1371  */
1372 /*
1373  * Field : RDEN
1374  *
1375  * Selects RD packets.
1376  *
1377  * Field Access Macros:
1378  *
1379  */
1380 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN register field. */
1381 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN_LSB 0
1382 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN register field. */
1383 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN_MSB 0
1384 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN register field. */
1385 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN_WIDTH 1
1386 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN register field value. */
1387 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN_SET_MSK 0x00000001
1388 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN register field value. */
1389 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN_CLR_MSK 0xfffffffe
1390 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN register field. */
1391 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN_RESET 0x0
1392 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN field value from a register. */
1393 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN_GET(value) (((value) & 0x00000001) >> 0)
1394 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN register field value suitable for setting the register. */
1395 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN_SET(value) (((value) << 0) & 0x00000001)
1396 
1397 /*
1398  * Field : WREN
1399  *
1400  * Selects WR packets.
1401  *
1402  * Field Access Macros:
1403  *
1404  */
1405 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN register field. */
1406 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN_LSB 1
1407 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN register field. */
1408 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN_MSB 1
1409 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN register field. */
1410 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN_WIDTH 1
1411 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN register field value. */
1412 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN_SET_MSK 0x00000002
1413 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN register field value. */
1414 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN_CLR_MSK 0xfffffffd
1415 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN register field. */
1416 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN_RESET 0x0
1417 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN field value from a register. */
1418 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN_GET(value) (((value) & 0x00000002) >> 1)
1419 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN register field value suitable for setting the register. */
1420 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN_SET(value) (((value) << 1) & 0x00000002)
1421 
1422 /*
1423  * Field : LOCKEN
1424  *
1425  * Selects RDX-WR, RDL, WRC and Linked sequence.
1426  *
1427  * Field Access Macros:
1428  *
1429  */
1430 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN register field. */
1431 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN_LSB 2
1432 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN register field. */
1433 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN_MSB 2
1434 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN register field. */
1435 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN_WIDTH 1
1436 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN register field value. */
1437 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN_SET_MSK 0x00000004
1438 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN register field value. */
1439 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN_CLR_MSK 0xfffffffb
1440 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN register field. */
1441 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN_RESET 0x0
1442 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN field value from a register. */
1443 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN_GET(value) (((value) & 0x00000004) >> 2)
1444 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN register field value suitable for setting the register. */
1445 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN_SET(value) (((value) << 2) & 0x00000004)
1446 
1447 /*
1448  * Field : URGEN
1449  *
1450  * Selects URG packets (urgency).
1451  *
1452  * Field Access Macros:
1453  *
1454  */
1455 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN register field. */
1456 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN_LSB 3
1457 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN register field. */
1458 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN_MSB 3
1459 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN register field. */
1460 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN_WIDTH 1
1461 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN register field value. */
1462 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN_SET_MSK 0x00000008
1463 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN register field value. */
1464 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN_CLR_MSK 0xfffffff7
1465 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN register field. */
1466 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN_RESET 0x0
1467 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN field value from a register. */
1468 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN_GET(value) (((value) & 0x00000008) >> 3)
1469 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN register field value suitable for setting the register. */
1470 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN_SET(value) (((value) << 3) & 0x00000008)
1471 
1472 #ifndef __ASSEMBLY__
1473 /*
1474  * WARNING: The C register and register group struct declarations are provided for
1475  * convenience and illustrative purposes. They should, however, be used with
1476  * caution as the C language standard provides no guarantees about the alignment or
1477  * atomicity of device memory accesses. The recommended practice for writing
1478  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1479  * alt_write_word() functions.
1480  *
1481  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE.
1482  */
1483 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_s
1484 {
1485  volatile uint32_t RDEN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RDEN */
1486  volatile uint32_t WREN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_WREN */
1487  volatile uint32_t LOCKEN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_LOCKEN */
1488  volatile uint32_t URGEN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_URGEN */
1489  uint32_t : 28; /* *UNDEFINED* */
1490 };
1491 
1492 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE. */
1493 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_t;
1494 #endif /* __ASSEMBLY__ */
1495 
1496 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE register. */
1497 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_RESET 0x00000000
1498 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE register from the beginning of the component. */
1499 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_OFST 0x60
1500 
1501 /*
1502  * Register : Probe_IOM_main_Probe_Filters_0_Status
1503  *
1504  * Register Status is 2-bit register that selects candidate packets based on packet
1505  * status.
1506  *
1507  * Register Layout
1508  *
1509  * Bits | Access | Reset | Description
1510  * :-------|:-------|:--------|:-----------------------------------------------------------------------------
1511  * [0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN
1512  * [1] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN
1513  * [31:2] | ??? | Unknown | *UNDEFINED*
1514  *
1515  */
1516 /*
1517  * Field : REQEN
1518  *
1519  * Selects REQ status packets.
1520  *
1521  * Field Access Macros:
1522  *
1523  */
1524 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN register field. */
1525 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN_LSB 0
1526 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN register field. */
1527 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN_MSB 0
1528 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN register field. */
1529 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN_WIDTH 1
1530 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN register field value. */
1531 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN_SET_MSK 0x00000001
1532 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN register field value. */
1533 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN_CLR_MSK 0xfffffffe
1534 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN register field. */
1535 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN_RESET 0x0
1536 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN field value from a register. */
1537 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN_GET(value) (((value) & 0x00000001) >> 0)
1538 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN register field value suitable for setting the register. */
1539 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN_SET(value) (((value) << 0) & 0x00000001)
1540 
1541 /*
1542  * Field : RSPEN
1543  *
1544  * Selects RSP and FAIL-CONT status packets.
1545  *
1546  * Field Access Macros:
1547  *
1548  */
1549 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN register field. */
1550 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN_LSB 1
1551 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN register field. */
1552 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN_MSB 1
1553 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN register field. */
1554 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN_WIDTH 1
1555 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN register field value. */
1556 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN_SET_MSK 0x00000002
1557 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN register field value. */
1558 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN_CLR_MSK 0xfffffffd
1559 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN register field. */
1560 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN_RESET 0x0
1561 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN field value from a register. */
1562 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN_GET(value) (((value) & 0x00000002) >> 1)
1563 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN register field value suitable for setting the register. */
1564 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN_SET(value) (((value) << 1) & 0x00000002)
1565 
1566 #ifndef __ASSEMBLY__
1567 /*
1568  * WARNING: The C register and register group struct declarations are provided for
1569  * convenience and illustrative purposes. They should, however, be used with
1570  * caution as the C language standard provides no guarantees about the alignment or
1571  * atomicity of device memory accesses. The recommended practice for writing
1572  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1573  * alt_write_word() functions.
1574  *
1575  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS.
1576  */
1577 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_s
1578 {
1579  volatile uint32_t REQEN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_REQEN */
1580  volatile uint32_t RSPEN : 1; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RSPEN */
1581  uint32_t : 30; /* *UNDEFINED* */
1582 };
1583 
1584 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS. */
1585 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_t;
1586 #endif /* __ASSEMBLY__ */
1587 
1588 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS register. */
1589 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_RESET 0x00000000
1590 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS register from the beginning of the component. */
1591 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_OFST 0x64
1592 
1593 /*
1594  * Register : Probe_IOM_main_Probe_Filters_0_Length
1595  *
1596  * Register Layout
1597  *
1598  * Bits | Access | Reset | Description
1599  * :-------|:-------|:--------|:----------------------------------------------------------------------------------------
1600  * [3:0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH
1601  * [31:4] | ??? | Unknown | *UNDEFINED*
1602  *
1603  */
1604 /*
1605  * Field : FILTERS_0_LENGTH
1606  *
1607  * Register Length is 4-bit register that selects candidate packets if their number
1608  * of bytes is less than or equal to 2**Length.
1609  *
1610  * Field Access Macros:
1611  *
1612  */
1613 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH register field. */
1614 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH_LSB 0
1615 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH register field. */
1616 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH_MSB 3
1617 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH register field. */
1618 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH_WIDTH 4
1619 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH register field value. */
1620 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH_SET_MSK 0x0000000f
1621 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH register field value. */
1622 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH_CLR_MSK 0xfffffff0
1623 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH register field. */
1624 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH_RESET 0x0
1625 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH field value from a register. */
1626 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH_GET(value) (((value) & 0x0000000f) >> 0)
1627 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH register field value suitable for setting the register. */
1628 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH_SET(value) (((value) << 0) & 0x0000000f)
1629 
1630 #ifndef __ASSEMBLY__
1631 /*
1632  * WARNING: The C register and register group struct declarations are provided for
1633  * convenience and illustrative purposes. They should, however, be used with
1634  * caution as the C language standard provides no guarantees about the alignment or
1635  * atomicity of device memory accesses. The recommended practice for writing
1636  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1637  * alt_write_word() functions.
1638  *
1639  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH.
1640  */
1641 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_s
1642 {
1643  volatile uint32_t FILTERS_0_LENGTH : 4; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_FILTERS_0_LENGTH */
1644  uint32_t : 28; /* *UNDEFINED* */
1645 };
1646 
1647 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH. */
1648 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_t;
1649 #endif /* __ASSEMBLY__ */
1650 
1651 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH register. */
1652 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_RESET 0x00000000
1653 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH register from the beginning of the component. */
1654 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_OFST 0x68
1655 
1656 /*
1657  * Register : Probe_IOM_main_Probe_Filters_0_Urgency
1658  *
1659  * Register Layout
1660  *
1661  * Bits | Access | Reset | Description
1662  * :-------|:-------|:--------|:------------------------------------------------------------------------------------------
1663  * [1:0] | RW | 0x0 | ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY
1664  * [31:2] | ??? | Unknown | *UNDEFINED*
1665  *
1666  */
1667 /*
1668  * Field : FILTERS_0_URGENCY
1669  *
1670  * Register Urgency contains the minimum urgency level used to filter packets. A
1671  * packet is a candidate when its socket urgency is greater than or equal to the
1672  * urgency specified in the register.
1673  *
1674  * Field Access Macros:
1675  *
1676  */
1677 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY register field. */
1678 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY_LSB 0
1679 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY register field. */
1680 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY_MSB 1
1681 /* The width in bits of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY register field. */
1682 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY_WIDTH 2
1683 /* The mask used to set the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY register field value. */
1684 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY_SET_MSK 0x00000003
1685 /* The mask used to clear the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY register field value. */
1686 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY_CLR_MSK 0xfffffffc
1687 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY register field. */
1688 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY_RESET 0x0
1689 /* Extracts the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY field value from a register. */
1690 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY_GET(value) (((value) & 0x00000003) >> 0)
1691 /* Produces a ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY register field value suitable for setting the register. */
1692 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY_SET(value) (((value) << 0) & 0x00000003)
1693 
1694 #ifndef __ASSEMBLY__
1695 /*
1696  * WARNING: The C register and register group struct declarations are provided for
1697  * convenience and illustrative purposes. They should, however, be used with
1698  * caution as the C language standard provides no guarantees about the alignment or
1699  * atomicity of device memory accesses. The recommended practice for writing
1700  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1701  * alt_write_word() functions.
1702  *
1703  * The struct declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY.
1704  */
1705 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_s
1706 {
1707  volatile uint32_t FILTERS_0_URGENCY : 2; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_FILTERS_0_URGENCY */
1708  uint32_t : 30; /* *UNDEFINED* */
1709 };
1710 
1711 /* The typedef declaration for register ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY. */
1712 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_t;
1713 #endif /* __ASSEMBLY__ */
1714 
1715 /* The reset value of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY register. */
1716 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_RESET 0x00000000
1717 /* The byte offset of the ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY register from the beginning of the component. */
1718 #define ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_OFST 0x6c
1719 
1720 #ifndef __ASSEMBLY__
1721 /*
1722  * WARNING: The C register and register group struct declarations are provided for
1723  * convenience and illustrative purposes. They should, however, be used with
1724  * caution as the C language standard provides no guarantees about the alignment or
1725  * atomicity of device memory accesses. The recommended practice for writing
1726  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1727  * alt_write_word() functions.
1728  *
1729  * The struct declaration for register group ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB.
1730  */
1731 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_s
1732 {
1733  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID_t Probe_IOM_main_Probe_Id_CoreId; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID */
1734  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID_t Probe_IOM_main_Probe_Id_RevisionId; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID */
1735  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL_t Probe_IOM_main_Probe_MainCtl; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL */
1736  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL_t Probe_IOM_main_Probe_CfgCtl; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL */
1737  volatile uint32_t _pad_0x10_0x13; /* *UNDEFINED* */
1738  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT_t Probe_IOM_main_Probe_FilterLut; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT */
1739  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN_t Probe_IOM_main_Probe_TraceAlarmEn; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN */
1740  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS_t Probe_IOM_main_Probe_TraceAlarmStatus; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS */
1741  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR_t Probe_IOM_main_Probe_TraceAlarmClr; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR */
1742  volatile uint32_t _pad_0x24_0x27; /* *UNDEFINED* */
1743  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO_t Probe_IOM_main_Probe_StatGo; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO */
1744  volatile uint32_t _pad_0x2c_0x43[6]; /* *UNDEFINED* */
1745  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_t Probe_IOM_main_Probe_Filters_0_RouteIdBase; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE */
1746  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_t Probe_IOM_main_Probe_Filters_0_RouteIdMask; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK */
1747  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_t Probe_IOM_main_Probe_Filters_0_AddrBase_Low; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW */
1748  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_t Probe_IOM_main_Probe_Filters_0_AddrBase_High; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH */
1749  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE_t Probe_IOM_main_Probe_Filters_0_WindowSize; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE */
1750  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE_t Probe_IOM_main_Probe_Filters_0_SecurityBase; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE */
1751  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK_t Probe_IOM_main_Probe_Filters_0_SecurityMask; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK */
1752  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE_t Probe_IOM_main_Probe_Filters_0_Opcode; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE */
1753  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS_t Probe_IOM_main_Probe_Filters_0_Status; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS */
1754  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH_t Probe_IOM_main_Probe_Filters_0_Length; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH */
1755  volatile ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY_t Probe_IOM_main_Probe_Filters_0_Urgency; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY */
1756  volatile uint32_t _pad_0x70_0x400[228]; /* *UNDEFINED* */
1757 };
1758 
1759 /* The typedef declaration for register group ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB. */
1760 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_t;
1761 /* The struct declaration for the raw register contents of register group ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB. */
1762 struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_raw_s
1763 {
1764  volatile uint32_t Probe_IOM_main_Probe_Id_CoreId; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_COREID */
1765  volatile uint32_t Probe_IOM_main_Probe_Id_RevisionId; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_ID_REVISIONID */
1766  volatile uint32_t Probe_IOM_main_Probe_MainCtl; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_MAINCTL */
1767  volatile uint32_t Probe_IOM_main_Probe_CfgCtl; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_CFGCTL */
1768  volatile uint32_t _pad_0x10_0x13; /* *UNDEFINED* */
1769  volatile uint32_t Probe_IOM_main_Probe_FilterLut; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERLUT */
1770  volatile uint32_t Probe_IOM_main_Probe_TraceAlarmEn; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMEN */
1771  volatile uint32_t Probe_IOM_main_Probe_TraceAlarmStatus; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMSTATUS */
1772  volatile uint32_t Probe_IOM_main_Probe_TraceAlarmClr; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_TRACEALARMCLR */
1773  volatile uint32_t _pad_0x24_0x27; /* *UNDEFINED* */
1774  volatile uint32_t Probe_IOM_main_Probe_StatGo; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_STATGO */
1775  volatile uint32_t _pad_0x2c_0x43[6]; /* *UNDEFINED* */
1776  volatile uint32_t Probe_IOM_main_Probe_Filters_0_RouteIdBase; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDBASE */
1777  volatile uint32_t Probe_IOM_main_Probe_Filters_0_RouteIdMask; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ROUTEIDMASK */
1778  volatile uint32_t Probe_IOM_main_Probe_Filters_0_AddrBase_Low; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW */
1779  volatile uint32_t Probe_IOM_main_Probe_Filters_0_AddrBase_High; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH */
1780  volatile uint32_t Probe_IOM_main_Probe_Filters_0_WindowSize; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_WINDOWSIZE */
1781  volatile uint32_t Probe_IOM_main_Probe_Filters_0_SecurityBase; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYBASE */
1782  volatile uint32_t Probe_IOM_main_Probe_Filters_0_SecurityMask; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_SECURITYMASK */
1783  volatile uint32_t Probe_IOM_main_Probe_Filters_0_Opcode; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_OPCODE */
1784  volatile uint32_t Probe_IOM_main_Probe_Filters_0_Status; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_STATUS */
1785  volatile uint32_t Probe_IOM_main_Probe_Filters_0_Length; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_LENGTH */
1786  volatile uint32_t Probe_IOM_main_Probe_Filters_0_Urgency; /* ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_PROBE_IOM_MAIN_PROBE_FILTERS_0_URGENCY */
1787  volatile uint32_t _pad_0x70_0x400[228]; /* *UNDEFINED* */
1788 };
1789 
1790 /* The typedef declaration for the raw register contents of register group ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB. */
1791 typedef struct ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_raw_s ALT_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_raw_t;
1792 #endif /* __ASSEMBLY__ */
1793 
1794 
1795 #ifdef __cplusplus
1796 }
1797 #endif /* __cplusplus */
1798 #endif /* __ALT_SOCAL_NOC_CCU_IOS_PRB_IOM_MAIN_PRB_H__ */
1799