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20.1
Stratix 10 SoC Hardware Manager
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alt_reset_manager.h
Go to the documentation of this file.
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/******************************************************************************
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*
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* Copyright 2015-2017 Altera Corporation. All Rights Reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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/*
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* $Id: //acds/main/embedded/ip/hps/armv8/hwlib/include/soc_s10/alt_reset_manager.h#1 $
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*/
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#ifndef __ALT_RESET_MANAGER_H__
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#define __ALT_RESET_MANAGER_H__
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#ifdef __cplusplus
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extern
"C"
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{
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#endif
/* __cplusplus */
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#include "hwlib.h"
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#include <stdbool.h>
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/******************************************************************************/
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/******************************************************************************/
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typedef
enum
ALT_RESET_EVENT_e
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{
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ALT_RESET_EVENT_CSDAPRST
= 0x1,
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ALT_RESET_EVENT_DEBUGRST
= 0x2,
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ALT_RESET_EVENT_L4W3DRST
= 0x4,
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ALT_RESET_EVENT_L4WD2RST
= 0x8,
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ALT_RESET_EVENT_L4WD1RST
= 0x10,
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ALT_RESET_EVENT_L4WD0RST
= 0x20,
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ALT_RESET_EVENT_MPU3RST
= 0x40,
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ALT_RESET_EVENT_MPU2RST
= 0x80,
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ALT_RESET_EVENT_MPU1RST
= 0x100,
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ALT_RESET_EVENT_MPU0RST
= 0x200,
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ALT_RESET_EVENT_SDMLASTPORRST
= 0x400,
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ALT_RESET_EVENT_SDMWARMRST
= 0x800,
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ALT_RESET_EVENT_SDMCOLDRST
= 0x1000,
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ALT_RESET_EVENT_CORE3IRQ
= 0x2000,
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ALT_RESET_EVENT_CORE2IRQ
= 0x4000,
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ALT_RESET_EVENT_CORE1IRQ
= 0x8000,
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ALT_RESET_EVENT_CORE0IRQ
= 0x10000,
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ALT_RESET_EVENT_CPUPOR3IRQ
= 0x20000,
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ALT_RESET_EVENT_CPUPOR2IRQ
= 0x40000,
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ALT_RESET_EVENT_CPUPOR1IRQ
= 0x80000,
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ALT_RESET_EVENT_CPUPOR0IRQ
= 0x100000
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}
ALT_RESET_EVENT_t
;
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/******************************************************************************/
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uint32_t
alt_reset_event_get
(
void
);
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/******************************************************************************/
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ALT_STATUS_CODE
alt_reset_event_clear
(uint32_t event_mask);
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/******************************************************************************/
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/******************************************************************************/
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ALT_STATUS_CODE
alt_cpu_core_reset
(uint32_t mask);
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ALT_STATUS_CODE
alt_cpu_por_reset
(uint32_t mask);
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#ifdef __cplusplus
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}
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#endif
/* __cplusplus */
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#endif
/* __ALT_RESET_MGR_H__ */
include
soc_s10
alt_reset_manager.h
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