Hardware Libraries  20.1
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alt_sdram.h
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32 
33 /*
34  * $Id: //acds/rel/20.1std/embedded/ip/hps/altera_hps/hwlib/include/soc_cv_av/alt_sdram.h#1 $
35  */
36 
42 #ifndef __ALT_SDRAM_H__
43 #define __ALT_SDRAM_H__
44 
45 #include "hwlib.h"
46 
47 #ifdef __cplusplus
48 extern "C"
49 {
50 #endif /* __cplusplus */
51 
52 /******************************************************************************/
65 typedef enum ALT_SDR_PORT_e
66 {
67  ALT_SDR_PORT_FPGA_AXI_R0 = 0,
68  ALT_SDR_PORT_FPGA_AXI_W1 = 1,
69  ALT_SDR_PORT_FPGA_AXI_R2 = 2,
70  ALT_SDR_PORT_FPGA_AXI_W3 = 3,
71  ALT_SDR_PORT_FPGA_AXI_R4 = 4,
72  ALT_SDR_PORT_FPGA_AXI_W5 = 5,
73  ALT_SDR_PORT_L3_AXI_R = 6,
74  ALT_SDR_PORT_MPU_AXI_R = 7,
75  ALT_SDR_PORT_L3_AXI_W = 8,
76  ALT_SDR_PORT_MPU_AXI_W = 9
78 
79 /*****************************************************************************/
88 #define ALT_SDR_NUM_PORTS 10
89 #define ALT_SDR_MAX_PRIORITY_WEIGHT 127
90 #define ALT_E_PRIORITY_WEIGHT_TOO_HIGH -32
91 #define ALT_SDR_NUM_PRIORITIES 8
92 
111 ALT_STATUS_CODE alt_sdr_priority_set(ALT_SDR_PORT_t port, uint8_t priority, uint8_t weight);
112 
130 ALT_STATUS_CODE alt_sdr_priority_get(ALT_SDR_PORT_t port, bool *enabled, uint8_t *priority, uint8_t *weight);
131 
143 ALT_STATUS_CODE alt_sdr_priority_disable(ALT_SDR_PORT_t port);
144 
145 
146 /******************************************************************************/
158 #define ALT_SDR_CTL_PROTPORT_DENY_NONE 0
159 #define ALT_SDR_CTL_PROTPORT_DENY_FPGA 0x3F
160 #define ALT_SDR_CTL_PROTPORT_DENY_CPU_READ (1<<7)
161 #define ALT_SDR_CTL_PROTPORT_DENY_CPU_WRITE (1<<9)
162 #define ALT_SDR_CTL_PROTPORT_DENY_L3_READ (1<<6)
163 #define ALT_SDR_CTL_PROTPORT_DENY_L3_WRITE (1<<8)
164 #define ALT_SDR_CTL_PROTPORT_DENY_CPU ALT_SDR_CTL_PROTPORT_DENY_CPU_READ | ALT_SDR_CTL_PROTPORT_DENY_CPU_WRITE
165 #define ALT_SDR_CTL_PROTPORT_DENY_L3 ALT_SDR_CTL_PROTPORT_DENY_L3_READ | ALT_SDR_CTL_PROTPORT_DENY_L3_WRITE
166 
172 typedef enum ALT_SDR_RULEID_e
173 {
174  ALT_SDR_CTL_RULEID_MIN = 0x000,
175  ALT_SDR_RULEID_L2M0_LO = 0x002,
176  ALT_SDR_RULEID_L2M0_HI = 0x7FA,
177  ALT_SDR_RULEID_DMA_LO = 0x001,
178  ALT_SDR_RULEID_DMA_HI = 0x079,
179  ALT_SDR_RULEID_EMAC0_LO = 0x801,
180  ALT_SDR_RULEID_EMAC0_HI = 0x879,
181  ALT_SDR_RULEID_EMAC1_LO = 0x802,
182  ALT_SDR_RULEID_EMAC1_HI = 0x87A,
183  ALT_SDR_RULEID_USB0 = 0x803,
184  ALT_SDR_RULEID_USB1 = 0x806,
185  ALT_SDR_RULEID_NAND_LO = 0x804,
186  ALT_SDR_RULEID_NAND_HI = 0xFFC,
187  ALT_SDR_RULEID_TMC = 0x800,
188  ALT_SDR_RULEID_DAP = 0x004,
189  ALT_SDR_RULEID_SDMMC = 0x805,
190  ALT_SDR_RULEID_FPGA2SOC_LO = 0x000,
191  ALT_SDR_RULEID_FPGA2SOC_HI = 0x7F8,
192  ALT_SDR_CTL_RULEID_MAX = 0xFFF
194 
204 typedef enum ALT_SDR_ACCESS_e
205 {
206  ALT_SDR_ACCESS_SECURE = 0,
207  ALT_SDR_ACCESS_NONSECURE = 1,
208  ALT_SDR_ACCESS_BOTH = 2
210 
219 {
220  ALT_SDR_PORT_MASK_FPGA_AXI_R0 = 1<<3,
221  ALT_SDR_PORT_MASK_FPGA_AXI_W1 = 1<<4,
222  ALT_SDR_PORT_MASK_FPGA_AXI_R2 = 1<<5,
223  ALT_SDR_PORT_MASK_FPGA_AXI_W3 = 1<<6,
224  ALT_SDR_PORT_MASK_FPGA_AXI_R4 = 1<<7,
225  ALT_SDR_PORT_MASK_FPGA_AXI_W5 = 1<<8,
226  ALT_SDR_PORT_MASK_FPGA = 0x01F8,
227 
228  ALT_SDR_PORT_MASK_L3_AXI_R = 1<<9,
229  ALT_SDR_PORT_MASK_L3_AXI_W = 1<<11,
230  ALT_SDR_PORT_MASK_L3 = 0x0A00,
231 
232  ALT_SDR_PORT_MASK_MPU_AXI_R = 1<<10,
233  ALT_SDR_PORT_MASK_MPU_AXI_W = 1<<12,
234  ALT_SDR_PORT_MASK_CPUS = 0x1400,
235 
236  ALT_SDR_PORT_MASK_ALL = 0x1FF8
238 
239 
241 {
250 } ALT_SDR_ACCESS_DATA_t;
251 
252 #define ALT_SDR_CTL_PROTRULERDWR_WRITE (1<<5)
253 
254 #define ALT_SDR_MAX_RULE_NUM 19
255 #define ALT_SDR_CTL_RULE_NEW 0xFFFFFFFFu
256 #define ALT_SDR_CTL_RULE_INVALID 0xFFFFFFFEu
257 
258 typedef struct ALT_SDR_RULE_s
259 {
260  uint32_t LowAddr;
261  uint32_t HighAddr;
262  ALT_SDR_RULEID_t RuleMin;
263  ALT_SDR_RULEID_t RuleMax;
264  ALT_SDR_ACCESS_t SecurityType;
265  ALT_SDR_PORT_MASK_t Ports;
266  ALT_SDR_ACCESS_DATA_t AccessPermission;
267 } __attribute__((aligned(4))) ALT_SDR_RULE_t;
268 
283 uint32_t alt_sdr_rule_set(uint32_t rulenum, ALT_SDR_RULE_t *ruleinfo);
284 
299 ALT_STATUS_CODE alt_sdr_rule_delete(uint32_t rulenum);
300 
312 ALT_STATUS_CODE alt_sdr_rule_set_default(uint32_t defaultRule);
313 
316 #ifdef __cplusplus
317 }
318 #endif /* __cplusplus */
319 
320 #endif /*__ALT_SDRAM_H__*/
321