Hardware Libraries  20.1
Arria 10 SoC Abstration Layer
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alt_noc_mpu_cs.h
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32 
33 /* Altera - ALT_NOC_MPU_CS_OBS_AT_ATBENDPT */
34 
35 #ifndef __ALT_SOCAL_NOC_MPU_CS_H__
36 #define __ALT_SOCAL_NOC_MPU_CS_H__
37 
38 #ifndef __ASSEMBLY__
39 #ifdef __cplusplus
40 #include <cstdint>
41 extern "C"
42 {
43 #else /* __cplusplus */
44 #include <stdint.h>
45 #endif /* __cplusplus */
46 #endif /* __ASSEMBLY__ */
47 
48 /*
49  * Component : ALT_NOC_MPU_CS_OBS_AT_ATBENDPT
50  *
51  */
52 /*
53  * Register : cs_obs_at_main_AtbEndPoint_Id_CoreId
54  *
55  * Register Layout
56  *
57  * Bits | Access | Reset | Description
58  * :-------|:-------|:---------|:-----------------------------------------------
59  * [7:0] | R | 0x7 | ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID
60  * [31:8] | R | 0xd46b87 | ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM
61  *
62  */
63 /*
64  * Field : CORETYPEID
65  *
66  * Field identifying the type of IP.
67  *
68  * Field Access Macros:
69  *
70  */
71 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID register field. */
72 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID_LSB 0
73 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID register field. */
74 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID_MSB 7
75 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID register field. */
76 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID_WIDTH 8
77 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID register field value. */
78 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID_SET_MSK 0x000000ff
79 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID register field value. */
80 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID_CLR_MSK 0xffffff00
81 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID register field. */
82 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID_RESET 0x7
83 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID field value from a register. */
84 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID_GET(value) (((value) & 0x000000ff) >> 0)
85 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID register field value suitable for setting the register. */
86 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID_SET(value) (((value) << 0) & 0x000000ff)
87 
88 /*
89  * Field : CORECHECKSUM
90  *
91  * Field containing a checksum of the parameters of the IP.
92  *
93  * Field Access Macros:
94  *
95  */
96 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM register field. */
97 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM_LSB 8
98 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM register field. */
99 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM_MSB 31
100 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM register field. */
101 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM_WIDTH 24
102 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM register field value. */
103 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM_SET_MSK 0xffffff00
104 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM register field value. */
105 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM_CLR_MSK 0x000000ff
106 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM register field. */
107 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM_RESET 0xd46b87
108 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM field value from a register. */
109 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM_GET(value) (((value) & 0xffffff00) >> 8)
110 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM register field value suitable for setting the register. */
111 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM_SET(value) (((value) << 8) & 0xffffff00)
112 
113 #ifndef __ASSEMBLY__
114 /*
115  * WARNING: The C register and register group struct declarations are provided for
116  * convenience and illustrative purposes. They should, however, be used with
117  * caution as the C language standard provides no guarantees about the alignment or
118  * atomicity of device memory accesses. The recommended practice for writing
119  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
120  * alt_write_word() functions.
121  *
122  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID.
123  */
124 struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_s
125 {
126  const uint32_t CORETYPEID : 8; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_TYPEID */
127  const uint32_t CORECHECKSUM : 24; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_CHECKSUM */
128 };
129 
130 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID. */
131 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_s ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_t;
132 #endif /* __ASSEMBLY__ */
133 
134 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID register. */
135 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_RESET 0xd46b8707
136 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID register from the beginning of the component. */
137 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_OFST 0x0
138 
139 /*
140  * Register : cs_obs_at_main_AtbEndPoint_Id_RevisionId
141  *
142  * Register Layout
143  *
144  * Bits | Access | Reset | Description
145  * :-------|:-------|:--------|:-----------------------------------------------
146  * [7:0] | R | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID
147  * [31:8] | R | 0x129ff | ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID
148  *
149  */
150 /*
151  * Field : USERID
152  *
153  * Field containing a user defined value, not used anywhere inside the IP itself.
154  *
155  * Field Access Macros:
156  *
157  */
158 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID register field. */
159 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID_LSB 0
160 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID register field. */
161 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID_MSB 7
162 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID register field. */
163 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID_WIDTH 8
164 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID register field value. */
165 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID_SET_MSK 0x000000ff
166 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID register field value. */
167 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID_CLR_MSK 0xffffff00
168 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID register field. */
169 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID_RESET 0x0
170 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID field value from a register. */
171 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID_GET(value) (((value) & 0x000000ff) >> 0)
172 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID register field value suitable for setting the register. */
173 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID_SET(value) (((value) << 0) & 0x000000ff)
174 
175 /*
176  * Field : FLEXNOCID
177  *
178  * Field containing the build revision of the software used to generate the IP HDL
179  * code.
180  *
181  * Field Access Macros:
182  *
183  */
184 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID register field. */
185 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID_LSB 8
186 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID register field. */
187 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID_MSB 31
188 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID register field. */
189 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID_WIDTH 24
190 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID register field value. */
191 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID_SET_MSK 0xffffff00
192 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID register field value. */
193 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID_CLR_MSK 0x000000ff
194 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID register field. */
195 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID_RESET 0x129ff
196 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID field value from a register. */
197 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID_GET(value) (((value) & 0xffffff00) >> 8)
198 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID register field value suitable for setting the register. */
199 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID_SET(value) (((value) << 8) & 0xffffff00)
200 
201 #ifndef __ASSEMBLY__
202 /*
203  * WARNING: The C register and register group struct declarations are provided for
204  * convenience and illustrative purposes. They should, however, be used with
205  * caution as the C language standard provides no guarantees about the alignment or
206  * atomicity of device memory accesses. The recommended practice for writing
207  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
208  * alt_write_word() functions.
209  *
210  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID.
211  */
212 struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_s
213 {
214  const uint32_t USERID : 8; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_UID */
215  const uint32_t FLEXNOCID : 24; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_FLEXNOCID */
216 };
217 
218 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID. */
219 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_s ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_t;
220 #endif /* __ASSEMBLY__ */
221 
222 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID register. */
223 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_RESET 0x0129ff00
224 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID register from the beginning of the component. */
225 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_OFST 0x4
226 
227 /*
228  * Register : cs_obs_at_main_AtbEndPoint_AtbId
229  *
230  *
231  * Register Layout
232  *
233  * Bits | Access | Reset | Description
234  * :-------|:-------|:--------|:-------------------------------------------
235  * [6:0] | RW | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID
236  * [31:7] | ??? | Unknown | *UNDEFINED*
237  *
238  */
239 /*
240  * Field : ATBID
241  *
242  * ATB AtId
243  *
244  * Field Access Macros:
245  *
246  */
247 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID register field. */
248 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID_LSB 0
249 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID register field. */
250 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID_MSB 6
251 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID register field. */
252 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID_WIDTH 7
253 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID register field value. */
254 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID_SET_MSK 0x0000007f
255 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID register field value. */
256 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID_CLR_MSK 0xffffff80
257 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID register field. */
258 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID_RESET 0x0
259 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID field value from a register. */
260 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID_GET(value) (((value) & 0x0000007f) >> 0)
261 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID register field value suitable for setting the register. */
262 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID_SET(value) (((value) << 0) & 0x0000007f)
263 
264 #ifndef __ASSEMBLY__
265 /*
266  * WARNING: The C register and register group struct declarations are provided for
267  * convenience and illustrative purposes. They should, however, be used with
268  * caution as the C language standard provides no guarantees about the alignment or
269  * atomicity of device memory accesses. The recommended practice for writing
270  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
271  * alt_write_word() functions.
272  *
273  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID.
274  */
275 struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_s
276 {
277  uint32_t ATBID : 7; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ATBID */
278  uint32_t : 25; /* *UNDEFINED* */
279 };
280 
281 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID. */
282 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_s ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_t;
283 #endif /* __ASSEMBLY__ */
284 
285 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID register. */
286 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_RESET 0x00000000
287 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID register from the beginning of the component. */
288 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_OFST 0x8
289 
290 /*
291  * Register : cs_obs_at_main_AtbEndPoint_AtbEn
292  *
293  *
294  * Register Layout
295  *
296  * Bits | Access | Reset | Description
297  * :-------|:-------|:--------|:-------------------------------------------
298  * [0] | RW | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN
299  * [31:1] | ??? | Unknown | *UNDEFINED*
300  *
301  */
302 /*
303  * Field : ATBEN
304  *
305  * ATB Unit Enable
306  *
307  * Field Access Macros:
308  *
309  */
310 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN register field. */
311 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN_LSB 0
312 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN register field. */
313 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN_MSB 0
314 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN register field. */
315 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN_WIDTH 1
316 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN register field value. */
317 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN_SET_MSK 0x00000001
318 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN register field value. */
319 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN_CLR_MSK 0xfffffffe
320 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN register field. */
321 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN_RESET 0x0
322 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN field value from a register. */
323 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN_GET(value) (((value) & 0x00000001) >> 0)
324 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN register field value suitable for setting the register. */
325 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN_SET(value) (((value) << 0) & 0x00000001)
326 
327 #ifndef __ASSEMBLY__
328 /*
329  * WARNING: The C register and register group struct declarations are provided for
330  * convenience and illustrative purposes. They should, however, be used with
331  * caution as the C language standard provides no guarantees about the alignment or
332  * atomicity of device memory accesses. The recommended practice for writing
333  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
334  * alt_write_word() functions.
335  *
336  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN.
337  */
338 struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_s
339 {
340  uint32_t ATBEN : 1; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ATBEN */
341  uint32_t : 31; /* *UNDEFINED* */
342 };
343 
344 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN. */
345 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_s ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_t;
346 #endif /* __ASSEMBLY__ */
347 
348 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN register. */
349 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_RESET 0x00000000
350 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN register from the beginning of the component. */
351 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_OFST 0xc
352 
353 /*
354  * Register : cs_obs_at_main_AtbEndPoint_SyncPeriod
355  *
356  *
357  * Register Layout
358  *
359  * Bits | Access | Reset | Description
360  * :-------|:-------|:--------|:-----------------------------------------------------
361  * [4:0] | RW | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD
362  * [31:5] | ??? | Unknown | *UNDEFINED*
363  *
364  */
365 /*
366  * Field : SYNCPERIOD
367  *
368  * ATB Synchro Period
369  *
370  * Field Access Macros:
371  *
372  */
373 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD register field. */
374 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD_LSB 0
375 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD register field. */
376 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD_MSB 4
377 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD register field. */
378 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD_WIDTH 5
379 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD register field value. */
380 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD_SET_MSK 0x0000001f
381 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD register field value. */
382 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD_CLR_MSK 0xffffffe0
383 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD register field. */
384 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD_RESET 0x0
385 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD field value from a register. */
386 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD_GET(value) (((value) & 0x0000001f) >> 0)
387 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD register field value suitable for setting the register. */
388 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD_SET(value) (((value) << 0) & 0x0000001f)
389 
390 #ifndef __ASSEMBLY__
391 /*
392  * WARNING: The C register and register group struct declarations are provided for
393  * convenience and illustrative purposes. They should, however, be used with
394  * caution as the C language standard provides no guarantees about the alignment or
395  * atomicity of device memory accesses. The recommended practice for writing
396  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
397  * alt_write_word() functions.
398  *
399  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD.
400  */
401 struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_s
402 {
403  uint32_t SYNCPERIOD : 5; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_SYNCPERIOD */
404  uint32_t : 27; /* *UNDEFINED* */
405 };
406 
407 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD. */
408 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_s ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_t;
409 #endif /* __ASSEMBLY__ */
410 
411 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD register. */
412 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_RESET 0x00000000
413 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD register from the beginning of the component. */
414 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_OFST 0x10
415 
416 #ifndef __ASSEMBLY__
417 /*
418  * WARNING: The C register and register group struct declarations are provided for
419  * convenience and illustrative purposes. They should, however, be used with
420  * caution as the C language standard provides no guarantees about the alignment or
421  * atomicity of device memory accesses. The recommended practice for writing
422  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
423  * alt_write_word() functions.
424  *
425  * The struct declaration for register group ALT_NOC_MPU_CS_OBS_AT_ATBENDPT.
426  */
427 struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_s
428 {
429  ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_t cs_obs_at_main_AtbEndPoint_Id_CoreId; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID */
430  ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_t cs_obs_at_main_AtbEndPoint_Id_RevisionId; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID */
431  ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_t cs_obs_at_main_AtbEndPoint_AtbId; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID */
432  ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_t cs_obs_at_main_AtbEndPoint_AtbEn; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN */
433  ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_t cs_obs_at_main_AtbEndPoint_SyncPeriod; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD */
434  volatile uint32_t _pad_0x14_0x80[27]; /* *UNDEFINED* */
435 };
436 
437 /* The typedef declaration for register group ALT_NOC_MPU_CS_OBS_AT_ATBENDPT. */
438 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_s ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_t;
439 /* The struct declaration for the raw register contents of register group ALT_NOC_MPU_CS_OBS_AT_ATBENDPT. */
440 struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_raw_s
441 {
442  volatile uint32_t cs_obs_at_main_AtbEndPoint_Id_CoreId; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID */
443  volatile uint32_t cs_obs_at_main_AtbEndPoint_Id_RevisionId; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID */
444  volatile uint32_t cs_obs_at_main_AtbEndPoint_AtbId; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID */
445  volatile uint32_t cs_obs_at_main_AtbEndPoint_AtbEn; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN */
446  volatile uint32_t cs_obs_at_main_AtbEndPoint_SyncPeriod; /* ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD */
447  uint32_t _pad_0x14_0x80[27]; /* *UNDEFINED* */
448 };
449 
450 /* The typedef declaration for the raw register contents of register group ALT_NOC_MPU_CS_OBS_AT_ATBENDPT. */
451 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_raw_s ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_raw_t;
452 #endif /* __ASSEMBLY__ */
453 
454 
455 /*
456  * Component : ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0
457  *
458  */
459 /*
460  * Register : cs_obs_at_main_ErrorLogger_0_Id_CoreId
461  *
462  * Register Layout
463  *
464  * Bits | Access | Reset | Description
465  * :-------|:-------|:---------|:-----------------------------------------------
466  * [7:0] | R | 0xd | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID
467  * [31:8] | R | 0x91311e | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM
468  *
469  */
470 /*
471  * Field : CORETYPEID
472  *
473  * Field identifying the type of IP.
474  *
475  * Field Access Macros:
476  *
477  */
478 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID register field. */
479 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID_LSB 0
480 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID register field. */
481 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID_MSB 7
482 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID register field. */
483 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID_WIDTH 8
484 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID register field value. */
485 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID_SET_MSK 0x000000ff
486 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID register field value. */
487 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID_CLR_MSK 0xffffff00
488 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID register field. */
489 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID_RESET 0xd
490 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID field value from a register. */
491 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID_GET(value) (((value) & 0x000000ff) >> 0)
492 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID register field value suitable for setting the register. */
493 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID_SET(value) (((value) << 0) & 0x000000ff)
494 
495 /*
496  * Field : CORECHECKSUM
497  *
498  * Field containing a checksum of the parameters of the IP.
499  *
500  * Field Access Macros:
501  *
502  */
503 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM register field. */
504 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM_LSB 8
505 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM register field. */
506 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM_MSB 31
507 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM register field. */
508 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM_WIDTH 24
509 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM register field value. */
510 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM_SET_MSK 0xffffff00
511 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM register field value. */
512 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM_CLR_MSK 0x000000ff
513 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM register field. */
514 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM_RESET 0x91311e
515 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM field value from a register. */
516 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM_GET(value) (((value) & 0xffffff00) >> 8)
517 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM register field value suitable for setting the register. */
518 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM_SET(value) (((value) << 8) & 0xffffff00)
519 
520 #ifndef __ASSEMBLY__
521 /*
522  * WARNING: The C register and register group struct declarations are provided for
523  * convenience and illustrative purposes. They should, however, be used with
524  * caution as the C language standard provides no guarantees about the alignment or
525  * atomicity of device memory accesses. The recommended practice for writing
526  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
527  * alt_write_word() functions.
528  *
529  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID.
530  */
531 struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_s
532 {
533  const uint32_t CORETYPEID : 8; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_TYPEID */
534  const uint32_t CORECHECKSUM : 24; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_CHECKSUM */
535 };
536 
537 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID. */
538 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_s ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_t;
539 #endif /* __ASSEMBLY__ */
540 
541 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID register. */
542 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_RESET 0x91311e0d
543 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID register from the beginning of the component. */
544 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_OFST 0x0
545 
546 /*
547  * Register : cs_obs_at_main_ErrorLogger_0_Id_RevisionId
548  *
549  * Register Layout
550  *
551  * Bits | Access | Reset | Description
552  * :-------|:-------|:--------|:-----------------------------------------------
553  * [7:0] | R | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID
554  * [31:8] | R | 0x129ff | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID
555  *
556  */
557 /*
558  * Field : USERID
559  *
560  * Field containing a user defined value, not used anywhere inside the IP itself.
561  *
562  * Field Access Macros:
563  *
564  */
565 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID register field. */
566 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID_LSB 0
567 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID register field. */
568 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID_MSB 7
569 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID register field. */
570 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID_WIDTH 8
571 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID register field value. */
572 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID_SET_MSK 0x000000ff
573 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID register field value. */
574 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID_CLR_MSK 0xffffff00
575 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID register field. */
576 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID_RESET 0x0
577 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID field value from a register. */
578 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID_GET(value) (((value) & 0x000000ff) >> 0)
579 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID register field value suitable for setting the register. */
580 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID_SET(value) (((value) << 0) & 0x000000ff)
581 
582 /*
583  * Field : FLEXNOCID
584  *
585  * Field containing the build revision of the software used to generate the IP HDL
586  * code.
587  *
588  * Field Access Macros:
589  *
590  */
591 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID register field. */
592 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID_LSB 8
593 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID register field. */
594 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID_MSB 31
595 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID register field. */
596 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID_WIDTH 24
597 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID register field value. */
598 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID_SET_MSK 0xffffff00
599 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID register field value. */
600 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID_CLR_MSK 0x000000ff
601 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID register field. */
602 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID_RESET 0x129ff
603 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID field value from a register. */
604 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID_GET(value) (((value) & 0xffffff00) >> 8)
605 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID register field value suitable for setting the register. */
606 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID_SET(value) (((value) << 8) & 0xffffff00)
607 
608 #ifndef __ASSEMBLY__
609 /*
610  * WARNING: The C register and register group struct declarations are provided for
611  * convenience and illustrative purposes. They should, however, be used with
612  * caution as the C language standard provides no guarantees about the alignment or
613  * atomicity of device memory accesses. The recommended practice for writing
614  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
615  * alt_write_word() functions.
616  *
617  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID.
618  */
619 struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_s
620 {
621  const uint32_t USERID : 8; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_UID */
622  const uint32_t FLEXNOCID : 24; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_FLEXNOCID */
623 };
624 
625 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID. */
626 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_s ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_t;
627 #endif /* __ASSEMBLY__ */
628 
629 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID register. */
630 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_RESET 0x0129ff00
631 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID register from the beginning of the component. */
632 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_OFST 0x4
633 
634 /*
635  * Register : cs_obs_at_main_ErrorLogger_0_FaultEn
636  *
637  *
638  * Register Layout
639  *
640  * Bits | Access | Reset | Description
641  * :-------|:-------|:--------|:-----------------------------------------------
642  * [0] | RW | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN
643  * [31:1] | ??? | Unknown | *UNDEFINED*
644  *
645  */
646 /*
647  * Field : FAULTEN
648  *
649  * Set to 1 to enable output signal Fault. Fault asserted when ErrVld is 1.
650  *
651  * Field Access Macros:
652  *
653  */
654 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN register field. */
655 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN_LSB 0
656 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN register field. */
657 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN_MSB 0
658 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN register field. */
659 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN_WIDTH 1
660 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN register field value. */
661 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN_SET_MSK 0x00000001
662 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN register field value. */
663 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN_CLR_MSK 0xfffffffe
664 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN register field. */
665 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN_RESET 0x0
666 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN field value from a register. */
667 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN_GET(value) (((value) & 0x00000001) >> 0)
668 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN register field value suitable for setting the register. */
669 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN_SET(value) (((value) << 0) & 0x00000001)
670 
671 #ifndef __ASSEMBLY__
672 /*
673  * WARNING: The C register and register group struct declarations are provided for
674  * convenience and illustrative purposes. They should, however, be used with
675  * caution as the C language standard provides no guarantees about the alignment or
676  * atomicity of device memory accesses. The recommended practice for writing
677  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
678  * alt_write_word() functions.
679  *
680  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN.
681  */
682 struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_s
683 {
684  uint32_t FAULTEN : 1; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_FAULTEN */
685  uint32_t : 31; /* *UNDEFINED* */
686 };
687 
688 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN. */
689 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_s ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_t;
690 #endif /* __ASSEMBLY__ */
691 
692 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN register. */
693 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_RESET 0x00000000
694 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN register from the beginning of the component. */
695 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_OFST 0x8
696 
697 /*
698  * Register : cs_obs_at_main_ErrorLogger_0_ErrVld
699  *
700  *
701  * Register Layout
702  *
703  * Bits | Access | Reset | Description
704  * :-------|:-------|:--------|:---------------------------------------------
705  * [0] | R | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD
706  * [31:1] | ??? | Unknown | *UNDEFINED*
707  *
708  */
709 /*
710  * Field : ERRVLD
711  *
712  * 1 indicates an error has been logged
713  *
714  * Field Access Macros:
715  *
716  */
717 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD register field. */
718 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD_LSB 0
719 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD register field. */
720 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD_MSB 0
721 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD register field. */
722 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD_WIDTH 1
723 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD register field value. */
724 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD_SET_MSK 0x00000001
725 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD register field value. */
726 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD_CLR_MSK 0xfffffffe
727 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD register field. */
728 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD_RESET 0x0
729 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD field value from a register. */
730 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD_GET(value) (((value) & 0x00000001) >> 0)
731 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD register field value suitable for setting the register. */
732 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD_SET(value) (((value) << 0) & 0x00000001)
733 
734 #ifndef __ASSEMBLY__
735 /*
736  * WARNING: The C register and register group struct declarations are provided for
737  * convenience and illustrative purposes. They should, however, be used with
738  * caution as the C language standard provides no guarantees about the alignment or
739  * atomicity of device memory accesses. The recommended practice for writing
740  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
741  * alt_write_word() functions.
742  *
743  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD.
744  */
745 struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_s
746 {
747  const uint32_t ERRVLD : 1; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ERRVLD */
748  uint32_t : 31; /* *UNDEFINED* */
749 };
750 
751 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD. */
752 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_s ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_t;
753 #endif /* __ASSEMBLY__ */
754 
755 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD register. */
756 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_RESET 0x00000000
757 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD register from the beginning of the component. */
758 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_OFST 0xc
759 
760 /*
761  * Register : cs_obs_at_main_ErrorLogger_0_ErrClr
762  *
763  *
764  * Register Layout
765  *
766  * Bits | Access | Reset | Description
767  * :-------|:-------|:--------|:---------------------------------------------
768  * [0] | RW | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR
769  * [31:1] | ??? | Unknown | *UNDEFINED*
770  *
771  */
772 /*
773  * Field : ERRCLR
774  *
775  * Set to 1 to clear ErrVld. NOTE The written value is not stored in ErrVld. A read
776  * always returns 0.
777  *
778  * Field Access Macros:
779  *
780  */
781 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR register field. */
782 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR_LSB 0
783 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR register field. */
784 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR_MSB 0
785 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR register field. */
786 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR_WIDTH 1
787 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR register field value. */
788 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR_SET_MSK 0x00000001
789 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR register field value. */
790 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR_CLR_MSK 0xfffffffe
791 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR register field. */
792 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR_RESET 0x0
793 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR field value from a register. */
794 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR_GET(value) (((value) & 0x00000001) >> 0)
795 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR register field value suitable for setting the register. */
796 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR_SET(value) (((value) << 0) & 0x00000001)
797 
798 #ifndef __ASSEMBLY__
799 /*
800  * WARNING: The C register and register group struct declarations are provided for
801  * convenience and illustrative purposes. They should, however, be used with
802  * caution as the C language standard provides no guarantees about the alignment or
803  * atomicity of device memory accesses. The recommended practice for writing
804  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
805  * alt_write_word() functions.
806  *
807  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR.
808  */
809 struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_s
810 {
811  uint32_t ERRCLR : 1; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ERRCLR */
812  uint32_t : 31; /* *UNDEFINED* */
813 };
814 
815 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR. */
816 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_s ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_t;
817 #endif /* __ASSEMBLY__ */
818 
819 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR register. */
820 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_RESET 0x00000000
821 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR register from the beginning of the component. */
822 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_OFST 0x10
823 
824 /*
825  * Register : cs_obs_at_main_ErrorLogger_0_ErrLog0
826  *
827  * Stores NTTP packet header fields Lock, Opc, ErrCode, Len1 and indicates version
828  * of NTTP transport protocol
829  *
830  * Register Layout
831  *
832  * Bits | Access | Reset | Description
833  * :--------|:-------|:--------|:-----------------------------------------------
834  * [0] | R | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK
835  * [4:1] | R | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC
836  * [7:5] | ??? | Unknown | *UNDEFINED*
837  * [10:8] | R | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE
838  * [15:11] | ??? | Unknown | *UNDEFINED*
839  * [23:16] | R | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1
840  * [30:24] | ??? | Unknown | *UNDEFINED*
841  * [31] | R | 0x1 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT
842  *
843  */
844 /*
845  * Field : LOCK
846  *
847  * Lock
848  *
849  * Field Access Macros:
850  *
851  */
852 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK register field. */
853 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK_LSB 0
854 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK register field. */
855 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK_MSB 0
856 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK register field. */
857 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK_WIDTH 1
858 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK register field value. */
859 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK_SET_MSK 0x00000001
860 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK register field value. */
861 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK_CLR_MSK 0xfffffffe
862 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK register field. */
863 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK_RESET 0x0
864 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK field value from a register. */
865 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK_GET(value) (((value) & 0x00000001) >> 0)
866 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK register field value suitable for setting the register. */
867 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK_SET(value) (((value) << 0) & 0x00000001)
868 
869 /*
870  * Field : OPC
871  *
872  * Opc
873  *
874  * Field Access Macros:
875  *
876  */
877 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC register field. */
878 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC_LSB 1
879 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC register field. */
880 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC_MSB 4
881 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC register field. */
882 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC_WIDTH 4
883 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC register field value. */
884 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC_SET_MSK 0x0000001e
885 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC register field value. */
886 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC_CLR_MSK 0xffffffe1
887 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC register field. */
888 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC_RESET 0x0
889 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC field value from a register. */
890 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC_GET(value) (((value) & 0x0000001e) >> 1)
891 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC register field value suitable for setting the register. */
892 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC_SET(value) (((value) << 1) & 0x0000001e)
893 
894 /*
895  * Field : ERRCODE
896  *
897  * ErrCode
898  *
899  * Field Access Macros:
900  *
901  */
902 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE register field. */
903 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE_LSB 8
904 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE register field. */
905 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE_MSB 10
906 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE register field. */
907 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE_WIDTH 3
908 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE register field value. */
909 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE_SET_MSK 0x00000700
910 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE register field value. */
911 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE_CLR_MSK 0xfffff8ff
912 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE register field. */
913 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE_RESET 0x0
914 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE field value from a register. */
915 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE_GET(value) (((value) & 0x00000700) >> 8)
916 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE register field value suitable for setting the register. */
917 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE_SET(value) (((value) << 8) & 0x00000700)
918 
919 /*
920  * Field : LEN1
921  *
922  * Len1
923  *
924  * Field Access Macros:
925  *
926  */
927 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1 register field. */
928 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1_LSB 16
929 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1 register field. */
930 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1_MSB 23
931 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1 register field. */
932 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1_WIDTH 8
933 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1 register field value. */
934 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1_SET_MSK 0x00ff0000
935 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1 register field value. */
936 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1_CLR_MSK 0xff00ffff
937 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1 register field. */
938 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1_RESET 0x0
939 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1 field value from a register. */
940 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1_GET(value) (((value) & 0x00ff0000) >> 16)
941 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1 register field value suitable for setting the register. */
942 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1_SET(value) (((value) << 16) & 0x00ff0000)
943 
944 /*
945  * Field : FORMAT
946  *
947  * NTTP transport protocol version
948  *
949  * Field Access Macros:
950  *
951  */
952 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT register field. */
953 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT_LSB 31
954 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT register field. */
955 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT_MSB 31
956 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT register field. */
957 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT_WIDTH 1
958 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT register field value. */
959 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT_SET_MSK 0x80000000
960 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT register field value. */
961 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT_CLR_MSK 0x7fffffff
962 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT register field. */
963 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT_RESET 0x1
964 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT field value from a register. */
965 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT_GET(value) (((value) & 0x80000000) >> 31)
966 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT register field value suitable for setting the register. */
967 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT_SET(value) (((value) << 31) & 0x80000000)
968 
969 #ifndef __ASSEMBLY__
970 /*
971  * WARNING: The C register and register group struct declarations are provided for
972  * convenience and illustrative purposes. They should, however, be used with
973  * caution as the C language standard provides no guarantees about the alignment or
974  * atomicity of device memory accesses. The recommended practice for writing
975  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
976  * alt_write_word() functions.
977  *
978  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0.
979  */
980 struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_s
981 {
982  const uint32_t LOCK : 1; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LOCK */
983  const uint32_t OPC : 4; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OPC */
984  uint32_t : 3; /* *UNDEFINED* */
985  const uint32_t ERRCODE : 3; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ERRCODE */
986  uint32_t : 5; /* *UNDEFINED* */
987  const uint32_t LEN1 : 8; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_LEN1 */
988  uint32_t : 7; /* *UNDEFINED* */
989  const uint32_t FORMAT : 1; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_FORMAT */
990 };
991 
992 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0. */
993 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_s ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_t;
994 #endif /* __ASSEMBLY__ */
995 
996 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0 register. */
997 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_RESET 0x80000000
998 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0 register from the beginning of the component. */
999 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OFST 0x14
1000 
1001 /*
1002  * Register : cs_obs_at_main_ErrorLogger_0_ErrLog1
1003  *
1004  *
1005  * Register Layout
1006  *
1007  * Bits | Access | Reset | Description
1008  * :--------|:-------|:--------|:-----------------------------------------------
1009  * [18:0] | R | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1
1010  * [31:19] | ??? | Unknown | *UNDEFINED*
1011  *
1012  */
1013 /*
1014  * Field : ERRLOG1
1015  *
1016  * Stores NTTP packet header field RouteId (LSBs) of the logged error
1017  *
1018  * Field Access Macros:
1019  *
1020  */
1021 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1 register field. */
1022 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1_LSB 0
1023 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1 register field. */
1024 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1_MSB 18
1025 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1 register field. */
1026 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1_WIDTH 19
1027 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1 register field value. */
1028 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1_SET_MSK 0x0007ffff
1029 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1 register field value. */
1030 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1_CLR_MSK 0xfff80000
1031 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1 register field. */
1032 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1_RESET 0x0
1033 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1 field value from a register. */
1034 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1_GET(value) (((value) & 0x0007ffff) >> 0)
1035 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1 register field value suitable for setting the register. */
1036 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1_SET(value) (((value) << 0) & 0x0007ffff)
1037 
1038 #ifndef __ASSEMBLY__
1039 /*
1040  * WARNING: The C register and register group struct declarations are provided for
1041  * convenience and illustrative purposes. They should, however, be used with
1042  * caution as the C language standard provides no guarantees about the alignment or
1043  * atomicity of device memory accesses. The recommended practice for writing
1044  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1045  * alt_write_word() functions.
1046  *
1047  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1.
1048  */
1049 struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_s
1050 {
1051  const uint32_t ERRLOG1 : 19; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ERRLOG1 */
1052  uint32_t : 13; /* *UNDEFINED* */
1053 };
1054 
1055 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1. */
1056 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_s ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_t;
1057 #endif /* __ASSEMBLY__ */
1058 
1059 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1 register. */
1060 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_RESET 0x00000000
1061 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1 register from the beginning of the component. */
1062 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_OFST 0x18
1063 
1064 /*
1065  * Register : cs_obs_at_main_ErrorLogger_0_ErrLog3
1066  *
1067  *
1068  * Register Layout
1069  *
1070  * Bits | Access | Reset | Description
1071  * :-------|:-------|:------|:-----------------------------------------------
1072  * [31:0] | R | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3
1073  *
1074  */
1075 /*
1076  * Field : ERRLOG3
1077  *
1078  * Stores NTTP packet header field Addr (LSBs) of the logged error
1079  *
1080  * Field Access Macros:
1081  *
1082  */
1083 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3 register field. */
1084 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3_LSB 0
1085 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3 register field. */
1086 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3_MSB 31
1087 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3 register field. */
1088 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3_WIDTH 32
1089 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3 register field value. */
1090 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3_SET_MSK 0xffffffff
1091 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3 register field value. */
1092 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3_CLR_MSK 0x00000000
1093 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3 register field. */
1094 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3_RESET 0x0
1095 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3 field value from a register. */
1096 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3_GET(value) (((value) & 0xffffffff) >> 0)
1097 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3 register field value suitable for setting the register. */
1098 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3_SET(value) (((value) << 0) & 0xffffffff)
1099 
1100 #ifndef __ASSEMBLY__
1101 /*
1102  * WARNING: The C register and register group struct declarations are provided for
1103  * convenience and illustrative purposes. They should, however, be used with
1104  * caution as the C language standard provides no guarantees about the alignment or
1105  * atomicity of device memory accesses. The recommended practice for writing
1106  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1107  * alt_write_word() functions.
1108  *
1109  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3.
1110  */
1111 struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_s
1112 {
1113  const uint32_t ERRLOG3 : 32; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ERRLOG3 */
1114 };
1115 
1116 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3. */
1117 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_s ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_t;
1118 #endif /* __ASSEMBLY__ */
1119 
1120 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3 register. */
1121 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_RESET 0x00000000
1122 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3 register from the beginning of the component. */
1123 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_OFST 0x20
1124 
1125 /*
1126  * Register : cs_obs_at_main_ErrorLogger_0_ErrLog5
1127  *
1128  *
1129  * Register Layout
1130  *
1131  * Bits | Access | Reset | Description
1132  * :--------|:-------|:--------|:-----------------------------------------------
1133  * [10:0] | R | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5
1134  * [31:11] | ??? | Unknown | *UNDEFINED*
1135  *
1136  */
1137 /*
1138  * Field : ERRLOG5
1139  *
1140  * Stores NTTP packet header field User (LSBs) of the logged error
1141  *
1142  * Field Access Macros:
1143  *
1144  */
1145 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5 register field. */
1146 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5_LSB 0
1147 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5 register field. */
1148 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5_MSB 10
1149 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5 register field. */
1150 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5_WIDTH 11
1151 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5 register field value. */
1152 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5_SET_MSK 0x000007ff
1153 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5 register field value. */
1154 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5_CLR_MSK 0xfffff800
1155 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5 register field. */
1156 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5_RESET 0x0
1157 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5 field value from a register. */
1158 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5_GET(value) (((value) & 0x000007ff) >> 0)
1159 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5 register field value suitable for setting the register. */
1160 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5_SET(value) (((value) << 0) & 0x000007ff)
1161 
1162 #ifndef __ASSEMBLY__
1163 /*
1164  * WARNING: The C register and register group struct declarations are provided for
1165  * convenience and illustrative purposes. They should, however, be used with
1166  * caution as the C language standard provides no guarantees about the alignment or
1167  * atomicity of device memory accesses. The recommended practice for writing
1168  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1169  * alt_write_word() functions.
1170  *
1171  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5.
1172  */
1173 struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_s
1174 {
1175  const uint32_t ERRLOG5 : 11; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ERRLOG5 */
1176  uint32_t : 21; /* *UNDEFINED* */
1177 };
1178 
1179 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5. */
1180 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_s ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_t;
1181 #endif /* __ASSEMBLY__ */
1182 
1183 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5 register. */
1184 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_RESET 0x00000000
1185 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5 register from the beginning of the component. */
1186 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_OFST 0x28
1187 
1188 /*
1189  * Register : cs_obs_at_main_ErrorLogger_0_ErrLog7
1190  *
1191  *
1192  * Register Layout
1193  *
1194  * Bits | Access | Reset | Description
1195  * :-------|:-------|:--------|:-----------------------------------------------
1196  * [2:0] | R | 0x0 | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7
1197  * [31:3] | ??? | Unknown | *UNDEFINED*
1198  *
1199  */
1200 /*
1201  * Field : ERRLOG7
1202  *
1203  * Stores NTTP packet header field Security of the logged error
1204  *
1205  * Field Access Macros:
1206  *
1207  */
1208 /* The Least Significant Bit (LSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7 register field. */
1209 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7_LSB 0
1210 /* The Most Significant Bit (MSB) position of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7 register field. */
1211 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7_MSB 2
1212 /* The width in bits of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7 register field. */
1213 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7_WIDTH 3
1214 /* The mask used to set the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7 register field value. */
1215 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7_SET_MSK 0x00000007
1216 /* The mask used to clear the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7 register field value. */
1217 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7_CLR_MSK 0xfffffff8
1218 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7 register field. */
1219 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7_RESET 0x0
1220 /* Extracts the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7 field value from a register. */
1221 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7_GET(value) (((value) & 0x00000007) >> 0)
1222 /* Produces a ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7 register field value suitable for setting the register. */
1223 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7_SET(value) (((value) << 0) & 0x00000007)
1224 
1225 #ifndef __ASSEMBLY__
1226 /*
1227  * WARNING: The C register and register group struct declarations are provided for
1228  * convenience and illustrative purposes. They should, however, be used with
1229  * caution as the C language standard provides no guarantees about the alignment or
1230  * atomicity of device memory accesses. The recommended practice for writing
1231  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1232  * alt_write_word() functions.
1233  *
1234  * The struct declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7.
1235  */
1236 struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_s
1237 {
1238  const uint32_t ERRLOG7 : 3; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ERRLOG7 */
1239  uint32_t : 29; /* *UNDEFINED* */
1240 };
1241 
1242 /* The typedef declaration for register ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7. */
1243 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_s ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_t;
1244 #endif /* __ASSEMBLY__ */
1245 
1246 /* The reset value of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7 register. */
1247 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_RESET 0x00000000
1248 /* The byte offset of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7 register from the beginning of the component. */
1249 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_OFST 0x30
1250 
1251 #ifndef __ASSEMBLY__
1252 /*
1253  * WARNING: The C register and register group struct declarations are provided for
1254  * convenience and illustrative purposes. They should, however, be used with
1255  * caution as the C language standard provides no guarantees about the alignment or
1256  * atomicity of device memory accesses. The recommended practice for writing
1257  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1258  * alt_write_word() functions.
1259  *
1260  * The struct declaration for register group ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0.
1261  */
1262 struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_s
1263 {
1264  ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_t cs_obs_at_main_ErrorLogger_0_Id_CoreId; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID */
1265  ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_t cs_obs_at_main_ErrorLogger_0_Id_RevisionId; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID */
1266  ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_t cs_obs_at_main_ErrorLogger_0_FaultEn; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN */
1267  ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_t cs_obs_at_main_ErrorLogger_0_ErrVld; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD */
1268  ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_t cs_obs_at_main_ErrorLogger_0_ErrClr; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR */
1269  ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_t cs_obs_at_main_ErrorLogger_0_ErrLog0; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0 */
1270  ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_t cs_obs_at_main_ErrorLogger_0_ErrLog1; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1 */
1271  volatile uint32_t _pad_0x1c_0x1f; /* *UNDEFINED* */
1272  ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_t cs_obs_at_main_ErrorLogger_0_ErrLog3; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3 */
1273  volatile uint32_t _pad_0x24_0x27; /* *UNDEFINED* */
1274  ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_t cs_obs_at_main_ErrorLogger_0_ErrLog5; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5 */
1275  volatile uint32_t _pad_0x2c_0x2f; /* *UNDEFINED* */
1276  ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_t cs_obs_at_main_ErrorLogger_0_ErrLog7; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7 */
1277  volatile uint32_t _pad_0x34_0x80[19]; /* *UNDEFINED* */
1278 };
1279 
1280 /* The typedef declaration for register group ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0. */
1281 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_s ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_t;
1282 /* The struct declaration for the raw register contents of register group ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0. */
1283 struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_raw_s
1284 {
1285  volatile uint32_t cs_obs_at_main_ErrorLogger_0_Id_CoreId; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID */
1286  volatile uint32_t cs_obs_at_main_ErrorLogger_0_Id_RevisionId; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID */
1287  volatile uint32_t cs_obs_at_main_ErrorLogger_0_FaultEn; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN */
1288  volatile uint32_t cs_obs_at_main_ErrorLogger_0_ErrVld; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD */
1289  volatile uint32_t cs_obs_at_main_ErrorLogger_0_ErrClr; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR */
1290  volatile uint32_t cs_obs_at_main_ErrorLogger_0_ErrLog0; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0 */
1291  volatile uint32_t cs_obs_at_main_ErrorLogger_0_ErrLog1; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1 */
1292  uint32_t _pad_0x1c_0x1f; /* *UNDEFINED* */
1293  volatile uint32_t cs_obs_at_main_ErrorLogger_0_ErrLog3; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3 */
1294  uint32_t _pad_0x24_0x27; /* *UNDEFINED* */
1295  volatile uint32_t cs_obs_at_main_ErrorLogger_0_ErrLog5; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5 */
1296  uint32_t _pad_0x2c_0x2f; /* *UNDEFINED* */
1297  volatile uint32_t cs_obs_at_main_ErrorLogger_0_ErrLog7; /* ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7 */
1298  uint32_t _pad_0x34_0x80[19]; /* *UNDEFINED* */
1299 };
1300 
1301 /* The typedef declaration for the raw register contents of register group ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0. */
1302 typedef volatile struct ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_raw_s ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_raw_t;
1303 #endif /* __ASSEMBLY__ */
1304 
1305 
1306 #ifdef __cplusplus
1307 }
1308 #endif /* __cplusplus */
1309 #endif /* __ALT_SOCAL_NOC_MPU_CS_H__ */
1310