Altera SoCAL  20.1
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
 All Groups
alt_usb.h
1 /***********************************************************************************
2 * *
3 * Copyright 2013-2015 Altera Corporation. All Rights Reserved. *
4 * *
5 * Redistribution and use in source and binary forms, with or without *
6 * modification, are permitted provided that the following conditions are met: *
7 * *
8 * 1. Redistributions of source code must retain the above copyright notice, *
9 * this list of conditions and the following disclaimer. *
10 * *
11 * 2. Redistributions in binary form must reproduce the above copyright notice, *
12 * this list of conditions and the following disclaimer in the documentation *
13 * and/or other materials provided with the distribution. *
14 * *
15 * 3. Neither the name of the copyright holder nor the names of its contributors *
16 * may be used to endorse or promote products derived from this software without *
17 * specific prior written permission. *
18 * *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" *
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE *
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE *
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE *
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF *
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS *
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN *
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) *
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE *
29 * POSSIBILITY OF SUCH DAMAGE. *
30 * *
31 ***********************************************************************************/
32 
33 /* Altera - ALT_USB */
34 
35 #ifndef __ALTERA_ALT_USB_H__
36 #define __ALTERA_ALT_USB_H__
37 
38 #ifdef __cplusplus
39 extern "C"
40 {
41 #endif /* __cplusplus */
42 
43 /*
44  * Component : USB OTG Controller Module Registers - ALT_USB
45  * USB OTG Controller Module Registers
46  *
47  * Registers in the USB OTG Controller Module.
48  *
49  * Only the Core Global, Power and Clock Gating, Data FIFO Access, and Host Port
50  * registers can be accessedin both Host and Device modes. When the USB OTG
51  * Controller is operating in one mode, either Device or Host, the application must
52  * not access registers from the other mode. If an illegal access occurs, a Mode
53  * Mismatch interrupt is generated and reflected in the Core Interrupt register
54  * (GINTSTS.ModeMis).
55  *
56  * When the core switches from one mode to another, the registers in the new mode
57  * must be reprogrammed as they would be after a power-on reset.
58  *
59  * The register address map is fixed and does not depend on the module
60  * configuration (for example, how many endpoints are implemented). Host and Device
61  * mode registers occupy different addresses.
62  *
63  */
64 /*
65  * Register Group : Global Registers - ALT_USB_GLOB
66  * Global Registers
67  *
68  * These registers are available in both Host and Device modes, and do not need to
69  * be reprogrammed when switching between these modes.
70  *
71  */
72 /*
73  * Register : OTG Control and Status Register - gotgctl
74  *
75  * The OTG Control and Status register controls the behavior and reflects the
76  * status of the OTG function.
77  *
78  * Register Layout
79  *
80  * Bits | Access | Reset | Description
81  * :--------|:-------|:------|:-------------------------------------------
82  * [0] | R | 0x0 | Session Request Success
83  * [1] | RW | 0x0 | Session Request
84  * [2] | RW | 0x0 | VBUS Valid Override Enable
85  * [3] | RW | 0x0 | VBUS Valid Override Value
86  * [4] | RW | 0x0 | A-Peripheral Session Valid Override Enable
87  * [5] | RW | 0x0 | A-Peripheral Session Valid OverrideValue
88  * [6] | RW | 0x0 | B-Peripheral Session Valid Override Enable
89  * [7] | RW | 0x0 | B-Peripheral Session Valid OverrideValue
90  * [8] | R | 0x0 | Host Negotiation Success
91  * [9] | RW | 0x0 | HNP Request
92  * [10] | RW | 0x0 | Host Set HNP Enable
93  * [11] | RW | 0x0 | Device HNP Enabled
94  * [15:12] | ??? | 0x0 | *UNDEFINED*
95  * [16] | R | 0x1 | Connector ID Status
96  * [17] | R | 0x0 | Long Short Debounce Time
97  * [18] | R | 0x0 | A-Session Valid
98  * [19] | R | 0x0 | B-Session Valid
99  * [20] | RW | 0x0 | OTG Version
100  * [31:21] | ??? | 0x0 | *UNDEFINED*
101  *
102  */
103 /*
104  * Field : Session Request Success - sesreqscs
105  *
106  * This bit is set when a session request initiation is successful. This bit is
107  * valid only For Device Only configuration when OTG_MODE == 3 or OTG_MODE == 4.
108  * Applies for device only.
109  *
110  * Field Enumeration Values:
111  *
112  * Enum | Value | Description
113  * :-----------------------------------------|:------|:------------------------
114  * ALT_USB_GLOB_GOTGCTL_SESREQSCS_E_FAIL | 0x0 | Session request failure
115  * ALT_USB_GLOB_GOTGCTL_SESREQSCS_E_SUCCESS | 0x1 | Session request success
116  *
117  * Field Access Macros:
118  *
119  */
120 /*
121  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_SESREQSCS
122  *
123  * Session request failure
124  */
125 #define ALT_USB_GLOB_GOTGCTL_SESREQSCS_E_FAIL 0x0
126 /*
127  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_SESREQSCS
128  *
129  * Session request success
130  */
131 #define ALT_USB_GLOB_GOTGCTL_SESREQSCS_E_SUCCESS 0x1
132 
133 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_SESREQSCS register field. */
134 #define ALT_USB_GLOB_GOTGCTL_SESREQSCS_LSB 0
135 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_SESREQSCS register field. */
136 #define ALT_USB_GLOB_GOTGCTL_SESREQSCS_MSB 0
137 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_SESREQSCS register field. */
138 #define ALT_USB_GLOB_GOTGCTL_SESREQSCS_WIDTH 1
139 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_SESREQSCS register field value. */
140 #define ALT_USB_GLOB_GOTGCTL_SESREQSCS_SET_MSK 0x00000001
141 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_SESREQSCS register field value. */
142 #define ALT_USB_GLOB_GOTGCTL_SESREQSCS_CLR_MSK 0xfffffffe
143 /* The reset value of the ALT_USB_GLOB_GOTGCTL_SESREQSCS register field. */
144 #define ALT_USB_GLOB_GOTGCTL_SESREQSCS_RESET 0x0
145 /* Extracts the ALT_USB_GLOB_GOTGCTL_SESREQSCS field value from a register. */
146 #define ALT_USB_GLOB_GOTGCTL_SESREQSCS_GET(value) (((value) & 0x00000001) >> 0)
147 /* Produces a ALT_USB_GLOB_GOTGCTL_SESREQSCS register field value suitable for setting the register. */
148 #define ALT_USB_GLOB_GOTGCTL_SESREQSCS_SET(value) (((value) << 0) & 0x00000001)
149 
150 /*
151  * Field : Session Request - sesreq
152  *
153  * The application sets this bit to initiate a session request on the USB. The
154  * application can clear this bit by writing a 0 when the Host Negotiation Success
155  * Status Change bit in the OTG Interrupt register (GOTGINT.HstNegSucStsChng) is
156  * SET. The core clears this bit when the HstNegSucStsChng bit is cleared. If you
157  * use the USB 1.1 Full-Speed Serial Transceiver interface to initiate the session
158  * request, the application must wait until the VBUS discharges to 0.2 V, after the
159  * B-Session Valid bit in this register (GOTGCTL.BSesVld) is cleared. This
160  * discharge time varies between different PHYs and can be obtained from the PHY
161  * vendor.
162  *
163  * Field Enumeration Values:
164  *
165  * Enum | Value | Description
166  * :----------------------------------------|:------|:-------------------
167  * ALT_USB_GLOB_GOTGCTL_SESREQ_E_NOREQUEST | 0x0 | No session request
168  * ALT_USB_GLOB_GOTGCTL_SESREQ_E_REQUEST | 0x1 | Session request
169  *
170  * Field Access Macros:
171  *
172  */
173 /*
174  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_SESREQ
175  *
176  * No session request
177  */
178 #define ALT_USB_GLOB_GOTGCTL_SESREQ_E_NOREQUEST 0x0
179 /*
180  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_SESREQ
181  *
182  * Session request
183  */
184 #define ALT_USB_GLOB_GOTGCTL_SESREQ_E_REQUEST 0x1
185 
186 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_SESREQ register field. */
187 #define ALT_USB_GLOB_GOTGCTL_SESREQ_LSB 1
188 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_SESREQ register field. */
189 #define ALT_USB_GLOB_GOTGCTL_SESREQ_MSB 1
190 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_SESREQ register field. */
191 #define ALT_USB_GLOB_GOTGCTL_SESREQ_WIDTH 1
192 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_SESREQ register field value. */
193 #define ALT_USB_GLOB_GOTGCTL_SESREQ_SET_MSK 0x00000002
194 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_SESREQ register field value. */
195 #define ALT_USB_GLOB_GOTGCTL_SESREQ_CLR_MSK 0xfffffffd
196 /* The reset value of the ALT_USB_GLOB_GOTGCTL_SESREQ register field. */
197 #define ALT_USB_GLOB_GOTGCTL_SESREQ_RESET 0x0
198 /* Extracts the ALT_USB_GLOB_GOTGCTL_SESREQ field value from a register. */
199 #define ALT_USB_GLOB_GOTGCTL_SESREQ_GET(value) (((value) & 0x00000002) >> 1)
200 /* Produces a ALT_USB_GLOB_GOTGCTL_SESREQ register field value suitable for setting the register. */
201 #define ALT_USB_GLOB_GOTGCTL_SESREQ_SET(value) (((value) << 1) & 0x00000002)
202 
203 /*
204  * Field : VBUS Valid Override Enable - vbvalidoven
205  *
206  * This bit is used to enable/disable the software to override the vbus-valid
207  * signal using the GOTGCTL.vbvalidOvVal..
208  *
209  * Field Enumeration Values:
210  *
211  * Enum | Value | Description
212  * :----------------------------------------|:------|:------------------------------------------------
213  * ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN_E_DISD | 0x0 | Override is disabled and bvalid signal from the
214  * : | | respective PHY selected is used internally by
215  * : | | the force
216  * ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN_E_END | 0x1 | The vbus-valid signal received from the PHY is
217  * : | | overridden with GOTGCTL.vbvalidOvVal
218  *
219  * Field Access Macros:
220  *
221  */
222 /*
223  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN
224  *
225  * Override is disabled and bvalid signal from the respective PHY selected is used
226  * internally by the force
227  */
228 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN_E_DISD 0x0
229 /*
230  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN
231  *
232  * The vbus-valid signal received from the PHY is overridden with
233  * GOTGCTL.vbvalidOvVal
234  */
235 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN_E_END 0x1
236 
237 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN register field. */
238 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN_LSB 2
239 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN register field. */
240 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN_MSB 2
241 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN register field. */
242 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN_WIDTH 1
243 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN register field value. */
244 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN_SET_MSK 0x00000004
245 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN register field value. */
246 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN_CLR_MSK 0xfffffffb
247 /* The reset value of the ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN register field. */
248 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN_RESET 0x0
249 /* Extracts the ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN field value from a register. */
250 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN_GET(value) (((value) & 0x00000004) >> 2)
251 /* Produces a ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN register field value suitable for setting the register. */
252 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVEN_SET(value) (((value) << 2) & 0x00000004)
253 
254 /*
255  * Field : VBUS Valid Override Value - vbvalidovval
256  *
257  * This bit is used to set Override value for vbus valid signal when
258  * GOTGCTL.VbvalidOvEn is set.
259  *
260  * Field Enumeration Values:
261  *
262  * Enum | Value | Description
263  * :-----------------------------------------|:------|:----------------------------------------------
264  * ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL_E_SET0 | 0x0 | vbusvalid value when GOTGCTL.VbvalidOvEn = 1
265  * ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL_E_SET1 | 0x1 | vbusvalid value when GOTGCTL.VbvalidOvEn is 1
266  *
267  * Field Access Macros:
268  *
269  */
270 /*
271  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL
272  *
273  * vbusvalid value when GOTGCTL.VbvalidOvEn = 1
274  */
275 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL_E_SET0 0x0
276 /*
277  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL
278  *
279  * vbusvalid value when GOTGCTL.VbvalidOvEn is 1
280  */
281 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL_E_SET1 0x1
282 
283 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL register field. */
284 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL_LSB 3
285 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL register field. */
286 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL_MSB 3
287 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL register field. */
288 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL_WIDTH 1
289 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL register field value. */
290 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL_SET_MSK 0x00000008
291 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL register field value. */
292 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL_CLR_MSK 0xfffffff7
293 /* The reset value of the ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL register field. */
294 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL_RESET 0x0
295 /* Extracts the ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL field value from a register. */
296 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL_GET(value) (((value) & 0x00000008) >> 3)
297 /* Produces a ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL register field value suitable for setting the register. */
298 #define ALT_USB_GLOB_GOTGCTL_VBVALIDOVVAL_SET(value) (((value) << 3) & 0x00000008)
299 
300 /*
301  * Field : A-Peripheral Session Valid Override Enable - avalidoven
302  *
303  * This bit is used to enable/disable the software to override the Avalid signal
304  * using the GOTGCTL.AvalidOvVal.
305  *
306  * Field Enumeration Values:
307  *
308  * Enum | Value | Description
309  * :---------------------------------------|:------|:------------------------------------------------
310  * ALT_USB_GLOB_GOTGCTL_AVALIDOVEN_E_DISD | 0x0 | Override is disabled and Avalid signal from the
311  * : | | respective PHY is used internally by the core.
312  * ALT_USB_GLOB_GOTGCTL_AVALIDOVEN_E_END | 0x1 | Internally Avalid received from the PHY is
313  * : | | overridden with GOTGCTL.AvalidOvVa
314  *
315  * Field Access Macros:
316  *
317  */
318 /*
319  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_AVALIDOVEN
320  *
321  * Override is disabled and Avalid signal from the respective PHY is used
322  * internally by the core.
323  */
324 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVEN_E_DISD 0x0
325 /*
326  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_AVALIDOVEN
327  *
328  * Internally Avalid received from the PHY is overridden with GOTGCTL.AvalidOvVa
329  */
330 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVEN_E_END 0x1
331 
332 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_AVALIDOVEN register field. */
333 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVEN_LSB 4
334 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_AVALIDOVEN register field. */
335 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVEN_MSB 4
336 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_AVALIDOVEN register field. */
337 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVEN_WIDTH 1
338 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_AVALIDOVEN register field value. */
339 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVEN_SET_MSK 0x00000010
340 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_AVALIDOVEN register field value. */
341 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVEN_CLR_MSK 0xffffffef
342 /* The reset value of the ALT_USB_GLOB_GOTGCTL_AVALIDOVEN register field. */
343 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVEN_RESET 0x0
344 /* Extracts the ALT_USB_GLOB_GOTGCTL_AVALIDOVEN field value from a register. */
345 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVEN_GET(value) (((value) & 0x00000010) >> 4)
346 /* Produces a ALT_USB_GLOB_GOTGCTL_AVALIDOVEN register field value suitable for setting the register. */
347 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVEN_SET(value) (((value) << 4) & 0x00000010)
348 
349 /*
350  * Field : A-Peripheral Session Valid OverrideValue - avalidovval
351  *
352  * This bit is used to set Override value for Avalid signal when GOTGCTL.BvalidOvEn
353  * is set.
354  *
355  * Field Enumeration Values:
356  *
357  * Enum | Value | Description
358  * :------------------------------------------|:------|:------------------------------------------------
359  * ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL_E_VALUE0 | 0x0 | Avalid value is 1'b0 when GOTGCTL.BvalidOvEn =1
360  * ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL_E_VALUE1 | 0x1 | Avalid value is 1'b1 when GOTGCTL.BvalidOvEn =1
361  *
362  * Field Access Macros:
363  *
364  */
365 /*
366  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL
367  *
368  * Avalid value is 1'b0 when GOTGCTL.BvalidOvEn =1
369  */
370 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL_E_VALUE0 0x0
371 /*
372  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL
373  *
374  * Avalid value is 1'b1 when GOTGCTL.BvalidOvEn =1
375  */
376 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL_E_VALUE1 0x1
377 
378 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL register field. */
379 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL_LSB 5
380 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL register field. */
381 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL_MSB 5
382 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL register field. */
383 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL_WIDTH 1
384 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL register field value. */
385 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL_SET_MSK 0x00000020
386 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL register field value. */
387 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL_CLR_MSK 0xffffffdf
388 /* The reset value of the ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL register field. */
389 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL_RESET 0x0
390 /* Extracts the ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL field value from a register. */
391 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL_GET(value) (((value) & 0x00000020) >> 5)
392 /* Produces a ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL register field value suitable for setting the register. */
393 #define ALT_USB_GLOB_GOTGCTL_AVALIDOVVAL_SET(value) (((value) << 5) & 0x00000020)
394 
395 /*
396  * Field : B-Peripheral Session Valid Override Enable - bvalidoven
397  *
398  * This bit is used to enable/disable the software to override the Bvalid signal
399  * using the GOTGCTL.BvalidOvVal.
400  *
401  * Field Enumeration Values:
402  *
403  * Enum | Value | Description
404  * :---------------------------------------|:------|:------------------------------------------------
405  * ALT_USB_GLOB_GOTGCTL_BVALIDOVEN_E_DISD | 0x0 | Override is disabled and bvalid signal from the
406  * : | | respective PHY selected is used internally by
407  * : | | the core
408  * ALT_USB_GLOB_GOTGCTL_BVALIDOVEN_E_END | 0x1 | Internally Bvalid received from the PHY is
409  * : | | overridden with GOTGCTL.BvalidOvVal
410  *
411  * Field Access Macros:
412  *
413  */
414 /*
415  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_BVALIDOVEN
416  *
417  * Override is disabled and bvalid signal from the respective PHY selected is used
418  * internally by the core
419  */
420 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVEN_E_DISD 0x0
421 /*
422  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_BVALIDOVEN
423  *
424  * Internally Bvalid received from the PHY is overridden with GOTGCTL.BvalidOvVal
425  */
426 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVEN_E_END 0x1
427 
428 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_BVALIDOVEN register field. */
429 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVEN_LSB 6
430 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_BVALIDOVEN register field. */
431 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVEN_MSB 6
432 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_BVALIDOVEN register field. */
433 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVEN_WIDTH 1
434 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_BVALIDOVEN register field value. */
435 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVEN_SET_MSK 0x00000040
436 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_BVALIDOVEN register field value. */
437 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVEN_CLR_MSK 0xffffffbf
438 /* The reset value of the ALT_USB_GLOB_GOTGCTL_BVALIDOVEN register field. */
439 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVEN_RESET 0x0
440 /* Extracts the ALT_USB_GLOB_GOTGCTL_BVALIDOVEN field value from a register. */
441 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVEN_GET(value) (((value) & 0x00000040) >> 6)
442 /* Produces a ALT_USB_GLOB_GOTGCTL_BVALIDOVEN register field value suitable for setting the register. */
443 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVEN_SET(value) (((value) << 6) & 0x00000040)
444 
445 /*
446  * Field : B-Peripheral Session Valid OverrideValue - bvalidovval
447  *
448  * This bit is used to set Override value for Bvalid signalwhen GOTGCTL.BvalidOvEn
449  * is set.
450  *
451  * Field Enumeration Values:
452  *
453  * Enum | Value | Description
454  * :------------------------------------------|:------|:----------------------------------------
455  * ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL_E_VALUE0 | 0x0 | Bvalid value when GOTGCTL.AvalidOvEn =1
456  * ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL_E_VALUE1 | 0x1 | Bvalid value when GOTGCTL.AvalidOvEn =1
457  *
458  * Field Access Macros:
459  *
460  */
461 /*
462  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL
463  *
464  * Bvalid value when GOTGCTL.AvalidOvEn =1
465  */
466 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL_E_VALUE0 0x0
467 /*
468  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL
469  *
470  * Bvalid value when GOTGCTL.AvalidOvEn =1
471  */
472 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL_E_VALUE1 0x1
473 
474 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL register field. */
475 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL_LSB 7
476 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL register field. */
477 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL_MSB 7
478 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL register field. */
479 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL_WIDTH 1
480 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL register field value. */
481 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL_SET_MSK 0x00000080
482 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL register field value. */
483 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL_CLR_MSK 0xffffff7f
484 /* The reset value of the ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL register field. */
485 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL_RESET 0x0
486 /* Extracts the ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL field value from a register. */
487 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL_GET(value) (((value) & 0x00000080) >> 7)
488 /* Produces a ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL register field value suitable for setting the register. */
489 #define ALT_USB_GLOB_GOTGCTL_BVALIDOVVAL_SET(value) (((value) << 7) & 0x00000080)
490 
491 /*
492  * Field : Host Negotiation Success - hstnegscs
493  *
494  * Mode: Device only. Host Negotiation Success (HstNegScs) The core sets this bit
495  * when host negotiation is successful. The core clears this bit when the HNP
496  * Request (HNPReq) bit in this register is SET.
497  *
498  * Field Enumeration Values:
499  *
500  * Enum | Value | Description
501  * :-----------------------------------------|:------|:-------------------------
502  * ALT_USB_GLOB_GOTGCTL_HSTNEGSCS_E_FAIL | 0x0 | Host negotiation failure
503  * ALT_USB_GLOB_GOTGCTL_HSTNEGSCS_E_SUCCESS | 0x1 | Host negotiation success
504  *
505  * Field Access Macros:
506  *
507  */
508 /*
509  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_HSTNEGSCS
510  *
511  * Host negotiation failure
512  */
513 #define ALT_USB_GLOB_GOTGCTL_HSTNEGSCS_E_FAIL 0x0
514 /*
515  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_HSTNEGSCS
516  *
517  * Host negotiation success
518  */
519 #define ALT_USB_GLOB_GOTGCTL_HSTNEGSCS_E_SUCCESS 0x1
520 
521 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_HSTNEGSCS register field. */
522 #define ALT_USB_GLOB_GOTGCTL_HSTNEGSCS_LSB 8
523 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_HSTNEGSCS register field. */
524 #define ALT_USB_GLOB_GOTGCTL_HSTNEGSCS_MSB 8
525 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_HSTNEGSCS register field. */
526 #define ALT_USB_GLOB_GOTGCTL_HSTNEGSCS_WIDTH 1
527 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_HSTNEGSCS register field value. */
528 #define ALT_USB_GLOB_GOTGCTL_HSTNEGSCS_SET_MSK 0x00000100
529 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_HSTNEGSCS register field value. */
530 #define ALT_USB_GLOB_GOTGCTL_HSTNEGSCS_CLR_MSK 0xfffffeff
531 /* The reset value of the ALT_USB_GLOB_GOTGCTL_HSTNEGSCS register field. */
532 #define ALT_USB_GLOB_GOTGCTL_HSTNEGSCS_RESET 0x0
533 /* Extracts the ALT_USB_GLOB_GOTGCTL_HSTNEGSCS field value from a register. */
534 #define ALT_USB_GLOB_GOTGCTL_HSTNEGSCS_GET(value) (((value) & 0x00000100) >> 8)
535 /* Produces a ALT_USB_GLOB_GOTGCTL_HSTNEGSCS register field value suitable for setting the register. */
536 #define ALT_USB_GLOB_GOTGCTL_HSTNEGSCS_SET(value) (((value) << 8) & 0x00000100)
537 
538 /*
539  * Field : HNP Request - hnpreq
540  *
541  * Mode: Device only. The application sets this bit to initiate an HNP request to
542  * the connected USB host. The application can clear this bit by writing a 0 when
543  * the Host Negotiation Success Status Change bit in the OTG Interrupt register
544  * (GOTGINT.HstNegSucStsChng) is SET.The core clears this bit when the
545  * HstNegSucStsChng bit iscleared.
546  *
547  * Field Enumeration Values:
548  *
549  * Enum | Value | Description
550  * :-----------------------------------|:------|:---------------
551  * ALT_USB_GLOB_GOTGCTL_HNPREQ_E_DISD | 0x0 | No HNP request
552  * ALT_USB_GLOB_GOTGCTL_HNPREQ_E_END | 0x1 | HNP request
553  *
554  * Field Access Macros:
555  *
556  */
557 /*
558  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_HNPREQ
559  *
560  * No HNP request
561  */
562 #define ALT_USB_GLOB_GOTGCTL_HNPREQ_E_DISD 0x0
563 /*
564  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_HNPREQ
565  *
566  * HNP request
567  */
568 #define ALT_USB_GLOB_GOTGCTL_HNPREQ_E_END 0x1
569 
570 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_HNPREQ register field. */
571 #define ALT_USB_GLOB_GOTGCTL_HNPREQ_LSB 9
572 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_HNPREQ register field. */
573 #define ALT_USB_GLOB_GOTGCTL_HNPREQ_MSB 9
574 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_HNPREQ register field. */
575 #define ALT_USB_GLOB_GOTGCTL_HNPREQ_WIDTH 1
576 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_HNPREQ register field value. */
577 #define ALT_USB_GLOB_GOTGCTL_HNPREQ_SET_MSK 0x00000200
578 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_HNPREQ register field value. */
579 #define ALT_USB_GLOB_GOTGCTL_HNPREQ_CLR_MSK 0xfffffdff
580 /* The reset value of the ALT_USB_GLOB_GOTGCTL_HNPREQ register field. */
581 #define ALT_USB_GLOB_GOTGCTL_HNPREQ_RESET 0x0
582 /* Extracts the ALT_USB_GLOB_GOTGCTL_HNPREQ field value from a register. */
583 #define ALT_USB_GLOB_GOTGCTL_HNPREQ_GET(value) (((value) & 0x00000200) >> 9)
584 /* Produces a ALT_USB_GLOB_GOTGCTL_HNPREQ register field value suitable for setting the register. */
585 #define ALT_USB_GLOB_GOTGCTL_HNPREQ_SET(value) (((value) << 9) & 0x00000200)
586 
587 /*
588  * Field : Host Set HNP Enable - hstsethnpen
589  *
590  * Mode: Host only. The application sets this bit when it has successfully enabled
591  * HNP (using the SetFeature.SetHNPEnable command) on the connected device.
592  *
593  * Field Enumeration Values:
594  *
595  * Enum | Value | Description
596  * :----------------------------------------|:------|:----------------------------
597  * ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN_E_DISD | 0x0 | Host Set HNP is not enabled
598  * ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN_E_END | 0x1 | Host Set HNP is enabled
599  *
600  * Field Access Macros:
601  *
602  */
603 /*
604  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN
605  *
606  * Host Set HNP is not enabled
607  */
608 #define ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN_E_DISD 0x0
609 /*
610  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN
611  *
612  * Host Set HNP is enabled
613  */
614 #define ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN_E_END 0x1
615 
616 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN register field. */
617 #define ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN_LSB 10
618 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN register field. */
619 #define ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN_MSB 10
620 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN register field. */
621 #define ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN_WIDTH 1
622 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN register field value. */
623 #define ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN_SET_MSK 0x00000400
624 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN register field value. */
625 #define ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN_CLR_MSK 0xfffffbff
626 /* The reset value of the ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN register field. */
627 #define ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN_RESET 0x0
628 /* Extracts the ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN field value from a register. */
629 #define ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN_GET(value) (((value) & 0x00000400) >> 10)
630 /* Produces a ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN register field value suitable for setting the register. */
631 #define ALT_USB_GLOB_GOTGCTL_HSTSETHNPEN_SET(value) (((value) << 10) & 0x00000400)
632 
633 /*
634  * Field : Device HNP Enabled - devhnpen
635  *
636  * Mode: Device only. The application sets this bit when it successfully receives a
637  * SetFeature.SetHNPEnable command from the connected USB host.
638  *
639  * Field Enumeration Values:
640  *
641  * Enum | Value | Description
642  * :-------------------------------------|:------|:--------------------------------------
643  * ALT_USB_GLOB_GOTGCTL_DEVHNPEN_E_DISD | 0x0 | HNP is not enabled in the application
644  * ALT_USB_GLOB_GOTGCTL_DEVHNPEN_E_END | 0x1 | HNP Enabled
645  *
646  * Field Access Macros:
647  *
648  */
649 /*
650  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_DEVHNPEN
651  *
652  * HNP is not enabled in the application
653  */
654 #define ALT_USB_GLOB_GOTGCTL_DEVHNPEN_E_DISD 0x0
655 /*
656  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_DEVHNPEN
657  *
658  * HNP Enabled
659  */
660 #define ALT_USB_GLOB_GOTGCTL_DEVHNPEN_E_END 0x1
661 
662 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_DEVHNPEN register field. */
663 #define ALT_USB_GLOB_GOTGCTL_DEVHNPEN_LSB 11
664 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_DEVHNPEN register field. */
665 #define ALT_USB_GLOB_GOTGCTL_DEVHNPEN_MSB 11
666 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_DEVHNPEN register field. */
667 #define ALT_USB_GLOB_GOTGCTL_DEVHNPEN_WIDTH 1
668 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_DEVHNPEN register field value. */
669 #define ALT_USB_GLOB_GOTGCTL_DEVHNPEN_SET_MSK 0x00000800
670 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_DEVHNPEN register field value. */
671 #define ALT_USB_GLOB_GOTGCTL_DEVHNPEN_CLR_MSK 0xfffff7ff
672 /* The reset value of the ALT_USB_GLOB_GOTGCTL_DEVHNPEN register field. */
673 #define ALT_USB_GLOB_GOTGCTL_DEVHNPEN_RESET 0x0
674 /* Extracts the ALT_USB_GLOB_GOTGCTL_DEVHNPEN field value from a register. */
675 #define ALT_USB_GLOB_GOTGCTL_DEVHNPEN_GET(value) (((value) & 0x00000800) >> 11)
676 /* Produces a ALT_USB_GLOB_GOTGCTL_DEVHNPEN register field value suitable for setting the register. */
677 #define ALT_USB_GLOB_GOTGCTL_DEVHNPEN_SET(value) (((value) << 11) & 0x00000800)
678 
679 /*
680  * Field : Connector ID Status - conidsts
681  *
682  * Mode: Host and Device. Indicates the connector ID status on a connect event.This
683  * bit is valid only for Host and Device mode.
684  *
685  * Field Enumeration Values:
686  *
687  * Enum | Value | Description
688  * :-------------------------------------|:------|:-------------------------------------
689  * ALT_USB_GLOB_GOTGCTL_CONIDSTS_E_MODA | 0x0 | The DWC_otg core is in A-Device mode
690  * ALT_USB_GLOB_GOTGCTL_CONIDSTS_E_MODB | 0x1 | The otg core is in B-Device mode
691  *
692  * Field Access Macros:
693  *
694  */
695 /*
696  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_CONIDSTS
697  *
698  * The DWC_otg core is in A-Device mode
699  */
700 #define ALT_USB_GLOB_GOTGCTL_CONIDSTS_E_MODA 0x0
701 /*
702  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_CONIDSTS
703  *
704  * The otg core is in B-Device mode
705  */
706 #define ALT_USB_GLOB_GOTGCTL_CONIDSTS_E_MODB 0x1
707 
708 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_CONIDSTS register field. */
709 #define ALT_USB_GLOB_GOTGCTL_CONIDSTS_LSB 16
710 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_CONIDSTS register field. */
711 #define ALT_USB_GLOB_GOTGCTL_CONIDSTS_MSB 16
712 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_CONIDSTS register field. */
713 #define ALT_USB_GLOB_GOTGCTL_CONIDSTS_WIDTH 1
714 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_CONIDSTS register field value. */
715 #define ALT_USB_GLOB_GOTGCTL_CONIDSTS_SET_MSK 0x00010000
716 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_CONIDSTS register field value. */
717 #define ALT_USB_GLOB_GOTGCTL_CONIDSTS_CLR_MSK 0xfffeffff
718 /* The reset value of the ALT_USB_GLOB_GOTGCTL_CONIDSTS register field. */
719 #define ALT_USB_GLOB_GOTGCTL_CONIDSTS_RESET 0x1
720 /* Extracts the ALT_USB_GLOB_GOTGCTL_CONIDSTS field value from a register. */
721 #define ALT_USB_GLOB_GOTGCTL_CONIDSTS_GET(value) (((value) & 0x00010000) >> 16)
722 /* Produces a ALT_USB_GLOB_GOTGCTL_CONIDSTS register field value suitable for setting the register. */
723 #define ALT_USB_GLOB_GOTGCTL_CONIDSTS_SET(value) (((value) << 16) & 0x00010000)
724 
725 /*
726  * Field : Long Short Debounce Time - dbnctime
727  *
728  * Mode: Host only. Indicates the debounce time of a detected connection.
729  *
730  * Field Enumeration Values:
731  *
732  * Enum | Value | Description
733  * :--------------------------------------|:------|:-----------------------------------------------
734  * ALT_USB_GLOB_GOTGCTL_DBNCTIME_E_LONG | 0x0 | Long debounce time, used FOR physical
735  * : | | connections (100 ms + 2.5 s)
736  * ALT_USB_GLOB_GOTGCTL_DBNCTIME_E_SHORT | 0x1 | Short debounce time, used FOR soft connections
737  * : | | (2.5 s
738  *
739  * Field Access Macros:
740  *
741  */
742 /*
743  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_DBNCTIME
744  *
745  * Long debounce time, used FOR physical connections (100 ms + 2.5 s)
746  */
747 #define ALT_USB_GLOB_GOTGCTL_DBNCTIME_E_LONG 0x0
748 /*
749  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_DBNCTIME
750  *
751  * Short debounce time, used FOR soft connections (2.5 s
752  */
753 #define ALT_USB_GLOB_GOTGCTL_DBNCTIME_E_SHORT 0x1
754 
755 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_DBNCTIME register field. */
756 #define ALT_USB_GLOB_GOTGCTL_DBNCTIME_LSB 17
757 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_DBNCTIME register field. */
758 #define ALT_USB_GLOB_GOTGCTL_DBNCTIME_MSB 17
759 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_DBNCTIME register field. */
760 #define ALT_USB_GLOB_GOTGCTL_DBNCTIME_WIDTH 1
761 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_DBNCTIME register field value. */
762 #define ALT_USB_GLOB_GOTGCTL_DBNCTIME_SET_MSK 0x00020000
763 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_DBNCTIME register field value. */
764 #define ALT_USB_GLOB_GOTGCTL_DBNCTIME_CLR_MSK 0xfffdffff
765 /* The reset value of the ALT_USB_GLOB_GOTGCTL_DBNCTIME register field. */
766 #define ALT_USB_GLOB_GOTGCTL_DBNCTIME_RESET 0x0
767 /* Extracts the ALT_USB_GLOB_GOTGCTL_DBNCTIME field value from a register. */
768 #define ALT_USB_GLOB_GOTGCTL_DBNCTIME_GET(value) (((value) & 0x00020000) >> 17)
769 /* Produces a ALT_USB_GLOB_GOTGCTL_DBNCTIME register field value suitable for setting the register. */
770 #define ALT_USB_GLOB_GOTGCTL_DBNCTIME_SET(value) (((value) << 17) & 0x00020000)
771 
772 /*
773  * Field : A-Session Valid - asesvld
774  *
775  * Mode: Host only. Indicates the Host mode transceiver status. If you do not
776  * enabled OTG features (such as SRP and HNP), the read reset value will be 1.The
777  * vbus assigns the values internally for non-SRP or non-HNP configurations.
778  *
779  * Field Enumeration Values:
780  *
781  * Enum | Value | Description
782  * :----------------------------------------|:------|:-----------------------
783  * ALT_USB_GLOB_GOTGCTL_ASESVLD_E_VALID | 0x0 | A-session is not valid
784  * ALT_USB_GLOB_GOTGCTL_ASESVLD_E_NOTVALID | 0x1 | A-session is valid
785  *
786  * Field Access Macros:
787  *
788  */
789 /*
790  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_ASESVLD
791  *
792  * A-session is not valid
793  */
794 #define ALT_USB_GLOB_GOTGCTL_ASESVLD_E_VALID 0x0
795 /*
796  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_ASESVLD
797  *
798  * A-session is valid
799  */
800 #define ALT_USB_GLOB_GOTGCTL_ASESVLD_E_NOTVALID 0x1
801 
802 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_ASESVLD register field. */
803 #define ALT_USB_GLOB_GOTGCTL_ASESVLD_LSB 18
804 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_ASESVLD register field. */
805 #define ALT_USB_GLOB_GOTGCTL_ASESVLD_MSB 18
806 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_ASESVLD register field. */
807 #define ALT_USB_GLOB_GOTGCTL_ASESVLD_WIDTH 1
808 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_ASESVLD register field value. */
809 #define ALT_USB_GLOB_GOTGCTL_ASESVLD_SET_MSK 0x00040000
810 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_ASESVLD register field value. */
811 #define ALT_USB_GLOB_GOTGCTL_ASESVLD_CLR_MSK 0xfffbffff
812 /* The reset value of the ALT_USB_GLOB_GOTGCTL_ASESVLD register field. */
813 #define ALT_USB_GLOB_GOTGCTL_ASESVLD_RESET 0x0
814 /* Extracts the ALT_USB_GLOB_GOTGCTL_ASESVLD field value from a register. */
815 #define ALT_USB_GLOB_GOTGCTL_ASESVLD_GET(value) (((value) & 0x00040000) >> 18)
816 /* Produces a ALT_USB_GLOB_GOTGCTL_ASESVLD register field value suitable for setting the register. */
817 #define ALT_USB_GLOB_GOTGCTL_ASESVLD_SET(value) (((value) << 18) & 0x00040000)
818 
819 /*
820  * Field : B-Session Valid - bsesvld
821  *
822  * Mode: Device only. Indicates the Device mode transceiver status. In OTG mode,
823  * you can use this bit to determine IF the device is connected or disconnected. If
824  * you do not enable OTG features (such as SRP and HNP), the read reset value will
825  * be 1. The vbus assigns the values internally for non-SRP or non-HNP
826  * configurations.
827  *
828  * Field Enumeration Values:
829  *
830  * Enum | Value | Description
831  * :----------------------------------------|:------|:-----------------------
832  * ALT_USB_GLOB_GOTGCTL_BSESVLD_E_NOTVALID | 0x0 | B-session is not valid
833  * ALT_USB_GLOB_GOTGCTL_BSESVLD_E_VALID | 0x1 | B-session is valid
834  *
835  * Field Access Macros:
836  *
837  */
838 /*
839  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_BSESVLD
840  *
841  * B-session is not valid
842  */
843 #define ALT_USB_GLOB_GOTGCTL_BSESVLD_E_NOTVALID 0x0
844 /*
845  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_BSESVLD
846  *
847  * B-session is valid
848  */
849 #define ALT_USB_GLOB_GOTGCTL_BSESVLD_E_VALID 0x1
850 
851 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_BSESVLD register field. */
852 #define ALT_USB_GLOB_GOTGCTL_BSESVLD_LSB 19
853 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_BSESVLD register field. */
854 #define ALT_USB_GLOB_GOTGCTL_BSESVLD_MSB 19
855 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_BSESVLD register field. */
856 #define ALT_USB_GLOB_GOTGCTL_BSESVLD_WIDTH 1
857 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_BSESVLD register field value. */
858 #define ALT_USB_GLOB_GOTGCTL_BSESVLD_SET_MSK 0x00080000
859 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_BSESVLD register field value. */
860 #define ALT_USB_GLOB_GOTGCTL_BSESVLD_CLR_MSK 0xfff7ffff
861 /* The reset value of the ALT_USB_GLOB_GOTGCTL_BSESVLD register field. */
862 #define ALT_USB_GLOB_GOTGCTL_BSESVLD_RESET 0x0
863 /* Extracts the ALT_USB_GLOB_GOTGCTL_BSESVLD field value from a register. */
864 #define ALT_USB_GLOB_GOTGCTL_BSESVLD_GET(value) (((value) & 0x00080000) >> 19)
865 /* Produces a ALT_USB_GLOB_GOTGCTL_BSESVLD register field value suitable for setting the register. */
866 #define ALT_USB_GLOB_GOTGCTL_BSESVLD_SET(value) (((value) << 19) & 0x00080000)
867 
868 /*
869  * Field : OTG Version - otgver
870  *
871  * Indicates the OTG revision. In OTG Version 1.3. the core supports Data line
872  * pulsing and VBus pulsing for SRP. In OTG Version 2.0 the core supports only Data
873  * line pulsing for SRP.
874  *
875  * Field Enumeration Values:
876  *
877  * Enum | Value | Description
878  * :------------------------------------|:------|:------------------------------------------
879  * ALT_USB_GLOB_GOTGCTL_OTGVER_E_VER13 | 0x0 | OTG Version 1.3. In this version the core
880  * : | | supports Data line
881  * ALT_USB_GLOB_GOTGCTL_OTGVER_E_VER20 | 0x1 | OTG Version 2.0. In this version the core
882  * : | | supports only Data line pulsing for SRP
883  *
884  * Field Access Macros:
885  *
886  */
887 /*
888  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_OTGVER
889  *
890  * OTG Version 1.3. In this version the core supports Data line
891  */
892 #define ALT_USB_GLOB_GOTGCTL_OTGVER_E_VER13 0x0
893 /*
894  * Enumerated value for register field ALT_USB_GLOB_GOTGCTL_OTGVER
895  *
896  * OTG Version 2.0. In this version the core supports only Data line pulsing for
897  * SRP
898  */
899 #define ALT_USB_GLOB_GOTGCTL_OTGVER_E_VER20 0x1
900 
901 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGCTL_OTGVER register field. */
902 #define ALT_USB_GLOB_GOTGCTL_OTGVER_LSB 20
903 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGCTL_OTGVER register field. */
904 #define ALT_USB_GLOB_GOTGCTL_OTGVER_MSB 20
905 /* The width in bits of the ALT_USB_GLOB_GOTGCTL_OTGVER register field. */
906 #define ALT_USB_GLOB_GOTGCTL_OTGVER_WIDTH 1
907 /* The mask used to set the ALT_USB_GLOB_GOTGCTL_OTGVER register field value. */
908 #define ALT_USB_GLOB_GOTGCTL_OTGVER_SET_MSK 0x00100000
909 /* The mask used to clear the ALT_USB_GLOB_GOTGCTL_OTGVER register field value. */
910 #define ALT_USB_GLOB_GOTGCTL_OTGVER_CLR_MSK 0xffefffff
911 /* The reset value of the ALT_USB_GLOB_GOTGCTL_OTGVER register field. */
912 #define ALT_USB_GLOB_GOTGCTL_OTGVER_RESET 0x0
913 /* Extracts the ALT_USB_GLOB_GOTGCTL_OTGVER field value from a register. */
914 #define ALT_USB_GLOB_GOTGCTL_OTGVER_GET(value) (((value) & 0x00100000) >> 20)
915 /* Produces a ALT_USB_GLOB_GOTGCTL_OTGVER register field value suitable for setting the register. */
916 #define ALT_USB_GLOB_GOTGCTL_OTGVER_SET(value) (((value) << 20) & 0x00100000)
917 
918 #ifndef __ASSEMBLY__
919 /*
920  * WARNING: The C register and register group struct declarations are provided for
921  * convenience and illustrative purposes. They should, however, be used with
922  * caution as the C language standard provides no guarantees about the alignment or
923  * atomicity of device memory accesses. The recommended practice for writing
924  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
925  * alt_write_word() functions.
926  *
927  * The struct declaration for register ALT_USB_GLOB_GOTGCTL.
928  */
929 struct ALT_USB_GLOB_GOTGCTL_s
930 {
931  const uint32_t sesreqscs : 1; /* Session Request Success */
932  uint32_t sesreq : 1; /* Session Request */
933  uint32_t vbvalidoven : 1; /* VBUS Valid Override Enable */
934  uint32_t vbvalidovval : 1; /* VBUS Valid Override Value */
935  uint32_t avalidoven : 1; /* A-Peripheral Session Valid Override Enable */
936  uint32_t avalidovval : 1; /* A-Peripheral Session Valid OverrideValue */
937  uint32_t bvalidoven : 1; /* B-Peripheral Session Valid Override Enable */
938  uint32_t bvalidovval : 1; /* B-Peripheral Session Valid OverrideValue */
939  const uint32_t hstnegscs : 1; /* Host Negotiation Success */
940  uint32_t hnpreq : 1; /* HNP Request */
941  uint32_t hstsethnpen : 1; /* Host Set HNP Enable */
942  uint32_t devhnpen : 1; /* Device HNP Enabled */
943  uint32_t : 4; /* *UNDEFINED* */
944  const uint32_t conidsts : 1; /* Connector ID Status */
945  const uint32_t dbnctime : 1; /* Long Short Debounce Time */
946  const uint32_t asesvld : 1; /* A-Session Valid */
947  const uint32_t bsesvld : 1; /* B-Session Valid */
948  uint32_t otgver : 1; /* OTG Version */
949  uint32_t : 11; /* *UNDEFINED* */
950 };
951 
952 /* The typedef declaration for register ALT_USB_GLOB_GOTGCTL. */
953 typedef volatile struct ALT_USB_GLOB_GOTGCTL_s ALT_USB_GLOB_GOTGCTL_t;
954 #endif /* __ASSEMBLY__ */
955 
956 /* The byte offset of the ALT_USB_GLOB_GOTGCTL register from the beginning of the component. */
957 #define ALT_USB_GLOB_GOTGCTL_OFST 0x0
958 /* The address of the ALT_USB_GLOB_GOTGCTL register. */
959 #define ALT_USB_GLOB_GOTGCTL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GOTGCTL_OFST))
960 
961 /*
962  * Register : OTG Interrupt Register - gotgint
963  *
964  * The application reads this register whenever there is an OTG interrupt and
965  * clears the bits in this register to clear the OTG interrupt.
966  *
967  * Register Layout
968  *
969  * Bits | Access | Reset | Description
970  * :--------|:-------|:------|:---------------------------------------
971  * [1:0] | ??? | 0x0 | *UNDEFINED*
972  * [2] | R | 0x0 | Session End Detected
973  * [7:3] | ??? | 0x0 | *UNDEFINED*
974  * [8] | R | 0x0 | Session Request Success Status Change
975  * [9] | R | 0x0 | Host Negotiation Success Status Change
976  * [16:10] | ??? | 0x0 | *UNDEFINED*
977  * [17] | R | 0x0 | Host Negotiation Detected
978  * [18] | R | 0x0 | A-Device Timeout Change
979  * [19] | R | 0x0 | Debounce Done
980  * [31:20] | ??? | 0x0 | *UNDEFINED*
981  *
982  */
983 /*
984  * Field : Session End Detected - sesenddet
985  *
986  * Mode:Host and Device.This bit can be set only by the core and the application
987  * should write 1 to clear it.
988  *
989  * Field Enumeration Values:
990  *
991  * Enum | Value | Description
992  * :---------------------------------------|:------|:---------------------------------------------
993  * ALT_USB_GLOB_GOTGINT_SESENDDET_E_INACT | 0x0 | Non Active State
994  * ALT_USB_GLOB_GOTGINT_SESENDDET_E_ACT | 0x1 | Set when utmisrp_bvalid signal is deasserted
995  *
996  * Field Access Macros:
997  *
998  */
999 /*
1000  * Enumerated value for register field ALT_USB_GLOB_GOTGINT_SESENDDET
1001  *
1002  * Non Active State
1003  */
1004 #define ALT_USB_GLOB_GOTGINT_SESENDDET_E_INACT 0x0
1005 /*
1006  * Enumerated value for register field ALT_USB_GLOB_GOTGINT_SESENDDET
1007  *
1008  * Set when utmisrp_bvalid signal is deasserted
1009  */
1010 #define ALT_USB_GLOB_GOTGINT_SESENDDET_E_ACT 0x1
1011 
1012 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGINT_SESENDDET register field. */
1013 #define ALT_USB_GLOB_GOTGINT_SESENDDET_LSB 2
1014 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGINT_SESENDDET register field. */
1015 #define ALT_USB_GLOB_GOTGINT_SESENDDET_MSB 2
1016 /* The width in bits of the ALT_USB_GLOB_GOTGINT_SESENDDET register field. */
1017 #define ALT_USB_GLOB_GOTGINT_SESENDDET_WIDTH 1
1018 /* The mask used to set the ALT_USB_GLOB_GOTGINT_SESENDDET register field value. */
1019 #define ALT_USB_GLOB_GOTGINT_SESENDDET_SET_MSK 0x00000004
1020 /* The mask used to clear the ALT_USB_GLOB_GOTGINT_SESENDDET register field value. */
1021 #define ALT_USB_GLOB_GOTGINT_SESENDDET_CLR_MSK 0xfffffffb
1022 /* The reset value of the ALT_USB_GLOB_GOTGINT_SESENDDET register field. */
1023 #define ALT_USB_GLOB_GOTGINT_SESENDDET_RESET 0x0
1024 /* Extracts the ALT_USB_GLOB_GOTGINT_SESENDDET field value from a register. */
1025 #define ALT_USB_GLOB_GOTGINT_SESENDDET_GET(value) (((value) & 0x00000004) >> 2)
1026 /* Produces a ALT_USB_GLOB_GOTGINT_SESENDDET register field value suitable for setting the register. */
1027 #define ALT_USB_GLOB_GOTGINT_SESENDDET_SET(value) (((value) << 2) & 0x00000004)
1028 
1029 /*
1030  * Field : Session Request Success Status Change - sesreqsucstschng
1031  *
1032  * Mode: Host and Device. The core sets this bit on the success or failure of a
1033  * session request. The application must read the Session Request Success bit in
1034  * the OTG Control and Status register (GOTGCTL.SesReqScs) to check for success or
1035  * failure. This bit can be set only by the core and the application should write 1
1036  * to clear it.
1037  *
1038  * Field Enumeration Values:
1039  *
1040  * Enum | Value | Description
1041  * :----------------------------------------------|:------|:-----------------------
1042  * ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG_E_INACT | 0x0 | No change
1043  * ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG_E_ACT | 0x1 | Session Request Status
1044  *
1045  * Field Access Macros:
1046  *
1047  */
1048 /*
1049  * Enumerated value for register field ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG
1050  *
1051  * No change
1052  */
1053 #define ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG_E_INACT 0x0
1054 /*
1055  * Enumerated value for register field ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG
1056  *
1057  * Session Request Status
1058  */
1059 #define ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG_E_ACT 0x1
1060 
1061 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG register field. */
1062 #define ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG_LSB 8
1063 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG register field. */
1064 #define ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG_MSB 8
1065 /* The width in bits of the ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG register field. */
1066 #define ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG_WIDTH 1
1067 /* The mask used to set the ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG register field value. */
1068 #define ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG_SET_MSK 0x00000100
1069 /* The mask used to clear the ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG register field value. */
1070 #define ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG_CLR_MSK 0xfffffeff
1071 /* The reset value of the ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG register field. */
1072 #define ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG_RESET 0x0
1073 /* Extracts the ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG field value from a register. */
1074 #define ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG_GET(value) (((value) & 0x00000100) >> 8)
1075 /* Produces a ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG register field value suitable for setting the register. */
1076 #define ALT_USB_GLOB_GOTGINT_SESREQSUCSTSCHNG_SET(value) (((value) << 8) & 0x00000100)
1077 
1078 /*
1079  * Field : Host Negotiation Success Status Change - hstnegsucstschng
1080  *
1081  * Mode: Host and Device. The core sets this bit on the success or failure of a USB
1082  * host negotiation request. The application must read the Host Negotiation Success
1083  * bit of the OTG Control and Status register (GOTGCTL.HstNegScs) to check for
1084  * success or failure. This bit can be set only by the core and the application
1085  * should write 1 to clear it.
1086  *
1087  * Field Enumeration Values:
1088  *
1089  * Enum | Value | Description
1090  * :----------------------------------------------|:------|:-------------------------------
1091  * ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG_E_INACT | 0x0 | No Change
1092  * ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG_E_ACT | 0x1 | Host Negotiation Status Change
1093  *
1094  * Field Access Macros:
1095  *
1096  */
1097 /*
1098  * Enumerated value for register field ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG
1099  *
1100  * No Change
1101  */
1102 #define ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG_E_INACT 0x0
1103 /*
1104  * Enumerated value for register field ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG
1105  *
1106  * Host Negotiation Status Change
1107  */
1108 #define ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG_E_ACT 0x1
1109 
1110 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG register field. */
1111 #define ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG_LSB 9
1112 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG register field. */
1113 #define ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG_MSB 9
1114 /* The width in bits of the ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG register field. */
1115 #define ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG_WIDTH 1
1116 /* The mask used to set the ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG register field value. */
1117 #define ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG_SET_MSK 0x00000200
1118 /* The mask used to clear the ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG register field value. */
1119 #define ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG_CLR_MSK 0xfffffdff
1120 /* The reset value of the ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG register field. */
1121 #define ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG_RESET 0x0
1122 /* Extracts the ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG field value from a register. */
1123 #define ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG_GET(value) (((value) & 0x00000200) >> 9)
1124 /* Produces a ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG register field value suitable for setting the register. */
1125 #define ALT_USB_GLOB_GOTGINT_HSTNEGSUCSTSCHNG_SET(value) (((value) << 9) & 0x00000200)
1126 
1127 /*
1128  * Field : Host Negotiation Detected - hstnegdet
1129  *
1130  * Mode:Host and Device. The core sets this bit when it detects a host negotiation
1131  * request on the USB. This bit can be set only by the core and the application
1132  * should write 1 to clear it.
1133  *
1134  * Field Enumeration Values:
1135  *
1136  * Enum | Value | Description
1137  * :---------------------------------------|:------|:--------------------------
1138  * ALT_USB_GLOB_GOTGINT_HSTNEGDET_E_INACT | 0x0 | No Change
1139  * ALT_USB_GLOB_GOTGINT_HSTNEGDET_E_ACT | 0x1 | Host Negotiation Detected
1140  *
1141  * Field Access Macros:
1142  *
1143  */
1144 /*
1145  * Enumerated value for register field ALT_USB_GLOB_GOTGINT_HSTNEGDET
1146  *
1147  * No Change
1148  */
1149 #define ALT_USB_GLOB_GOTGINT_HSTNEGDET_E_INACT 0x0
1150 /*
1151  * Enumerated value for register field ALT_USB_GLOB_GOTGINT_HSTNEGDET
1152  *
1153  * Host Negotiation Detected
1154  */
1155 #define ALT_USB_GLOB_GOTGINT_HSTNEGDET_E_ACT 0x1
1156 
1157 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGINT_HSTNEGDET register field. */
1158 #define ALT_USB_GLOB_GOTGINT_HSTNEGDET_LSB 17
1159 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGINT_HSTNEGDET register field. */
1160 #define ALT_USB_GLOB_GOTGINT_HSTNEGDET_MSB 17
1161 /* The width in bits of the ALT_USB_GLOB_GOTGINT_HSTNEGDET register field. */
1162 #define ALT_USB_GLOB_GOTGINT_HSTNEGDET_WIDTH 1
1163 /* The mask used to set the ALT_USB_GLOB_GOTGINT_HSTNEGDET register field value. */
1164 #define ALT_USB_GLOB_GOTGINT_HSTNEGDET_SET_MSK 0x00020000
1165 /* The mask used to clear the ALT_USB_GLOB_GOTGINT_HSTNEGDET register field value. */
1166 #define ALT_USB_GLOB_GOTGINT_HSTNEGDET_CLR_MSK 0xfffdffff
1167 /* The reset value of the ALT_USB_GLOB_GOTGINT_HSTNEGDET register field. */
1168 #define ALT_USB_GLOB_GOTGINT_HSTNEGDET_RESET 0x0
1169 /* Extracts the ALT_USB_GLOB_GOTGINT_HSTNEGDET field value from a register. */
1170 #define ALT_USB_GLOB_GOTGINT_HSTNEGDET_GET(value) (((value) & 0x00020000) >> 17)
1171 /* Produces a ALT_USB_GLOB_GOTGINT_HSTNEGDET register field value suitable for setting the register. */
1172 #define ALT_USB_GLOB_GOTGINT_HSTNEGDET_SET(value) (((value) << 17) & 0x00020000)
1173 
1174 /*
1175  * Field : A-Device Timeout Change - adevtoutchg
1176  *
1177  * Mode:Host and Device. The core sets this bit to indicate that the A-device has
1178  * timed out WHILE waiting FOR the B-device to connect. This bit can be set only by
1179  * the core and the application should write 1 to clear it.
1180  *
1181  * Field Enumeration Values:
1182  *
1183  * Enum | Value | Description
1184  * :-----------------------------------------|:------|:-----------------
1185  * ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG_E_INACT | 0x0 | No Change
1186  * ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG_E_ACT | 0x1 | A-Device Timeout
1187  *
1188  * Field Access Macros:
1189  *
1190  */
1191 /*
1192  * Enumerated value for register field ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG
1193  *
1194  * No Change
1195  */
1196 #define ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG_E_INACT 0x0
1197 /*
1198  * Enumerated value for register field ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG
1199  *
1200  * A-Device Timeout
1201  */
1202 #define ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG_E_ACT 0x1
1203 
1204 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG register field. */
1205 #define ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG_LSB 18
1206 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG register field. */
1207 #define ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG_MSB 18
1208 /* The width in bits of the ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG register field. */
1209 #define ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG_WIDTH 1
1210 /* The mask used to set the ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG register field value. */
1211 #define ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG_SET_MSK 0x00040000
1212 /* The mask used to clear the ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG register field value. */
1213 #define ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG_CLR_MSK 0xfffbffff
1214 /* The reset value of the ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG register field. */
1215 #define ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG_RESET 0x0
1216 /* Extracts the ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG field value from a register. */
1217 #define ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG_GET(value) (((value) & 0x00040000) >> 18)
1218 /* Produces a ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG register field value suitable for setting the register. */
1219 #define ALT_USB_GLOB_GOTGINT_ADEVTOUTCHG_SET(value) (((value) << 18) & 0x00040000)
1220 
1221 /*
1222  * Field : Debounce Done - dbncedone
1223  *
1224  * Mode: Host only. The core sets this bit when the debounce is completed after the
1225  * device connect. The application can start driving USB reset after seeing this
1226  * interrupt. This bit is only valid when the HNP Capable or SRP Capable bit is SET
1227  * in the Core USB Configuration register (GUSBCFG.HNPCap or GUSBCFG.SRPCap,
1228  * respectively). This bit can be set only by the core and the application should
1229  * write 1 to clear it.
1230  *
1231  * Field Enumeration Values:
1232  *
1233  * Enum | Value | Description
1234  * :---------------------------------------|:------|:-------------------
1235  * ALT_USB_GLOB_GOTGINT_DBNCEDONE_E_INACT | 0x0 | No Change
1236  * ALT_USB_GLOB_GOTGINT_DBNCEDONE_E_ACT | 0x1 | Debounce completed
1237  *
1238  * Field Access Macros:
1239  *
1240  */
1241 /*
1242  * Enumerated value for register field ALT_USB_GLOB_GOTGINT_DBNCEDONE
1243  *
1244  * No Change
1245  */
1246 #define ALT_USB_GLOB_GOTGINT_DBNCEDONE_E_INACT 0x0
1247 /*
1248  * Enumerated value for register field ALT_USB_GLOB_GOTGINT_DBNCEDONE
1249  *
1250  * Debounce completed
1251  */
1252 #define ALT_USB_GLOB_GOTGINT_DBNCEDONE_E_ACT 0x1
1253 
1254 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GOTGINT_DBNCEDONE register field. */
1255 #define ALT_USB_GLOB_GOTGINT_DBNCEDONE_LSB 19
1256 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GOTGINT_DBNCEDONE register field. */
1257 #define ALT_USB_GLOB_GOTGINT_DBNCEDONE_MSB 19
1258 /* The width in bits of the ALT_USB_GLOB_GOTGINT_DBNCEDONE register field. */
1259 #define ALT_USB_GLOB_GOTGINT_DBNCEDONE_WIDTH 1
1260 /* The mask used to set the ALT_USB_GLOB_GOTGINT_DBNCEDONE register field value. */
1261 #define ALT_USB_GLOB_GOTGINT_DBNCEDONE_SET_MSK 0x00080000
1262 /* The mask used to clear the ALT_USB_GLOB_GOTGINT_DBNCEDONE register field value. */
1263 #define ALT_USB_GLOB_GOTGINT_DBNCEDONE_CLR_MSK 0xfff7ffff
1264 /* The reset value of the ALT_USB_GLOB_GOTGINT_DBNCEDONE register field. */
1265 #define ALT_USB_GLOB_GOTGINT_DBNCEDONE_RESET 0x0
1266 /* Extracts the ALT_USB_GLOB_GOTGINT_DBNCEDONE field value from a register. */
1267 #define ALT_USB_GLOB_GOTGINT_DBNCEDONE_GET(value) (((value) & 0x00080000) >> 19)
1268 /* Produces a ALT_USB_GLOB_GOTGINT_DBNCEDONE register field value suitable for setting the register. */
1269 #define ALT_USB_GLOB_GOTGINT_DBNCEDONE_SET(value) (((value) << 19) & 0x00080000)
1270 
1271 #ifndef __ASSEMBLY__
1272 /*
1273  * WARNING: The C register and register group struct declarations are provided for
1274  * convenience and illustrative purposes. They should, however, be used with
1275  * caution as the C language standard provides no guarantees about the alignment or
1276  * atomicity of device memory accesses. The recommended practice for writing
1277  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1278  * alt_write_word() functions.
1279  *
1280  * The struct declaration for register ALT_USB_GLOB_GOTGINT.
1281  */
1282 struct ALT_USB_GLOB_GOTGINT_s
1283 {
1284  uint32_t : 2; /* *UNDEFINED* */
1285  const uint32_t sesenddet : 1; /* Session End Detected */
1286  uint32_t : 5; /* *UNDEFINED* */
1287  const uint32_t sesreqsucstschng : 1; /* Session Request Success Status Change */
1288  const uint32_t hstnegsucstschng : 1; /* Host Negotiation Success Status Change */
1289  uint32_t : 7; /* *UNDEFINED* */
1290  const uint32_t hstnegdet : 1; /* Host Negotiation Detected */
1291  const uint32_t adevtoutchg : 1; /* A-Device Timeout Change */
1292  const uint32_t dbncedone : 1; /* Debounce Done */
1293  uint32_t : 12; /* *UNDEFINED* */
1294 };
1295 
1296 /* The typedef declaration for register ALT_USB_GLOB_GOTGINT. */
1297 typedef volatile struct ALT_USB_GLOB_GOTGINT_s ALT_USB_GLOB_GOTGINT_t;
1298 #endif /* __ASSEMBLY__ */
1299 
1300 /* The byte offset of the ALT_USB_GLOB_GOTGINT register from the beginning of the component. */
1301 #define ALT_USB_GLOB_GOTGINT_OFST 0x4
1302 /* The address of the ALT_USB_GLOB_GOTGINT register. */
1303 #define ALT_USB_GLOB_GOTGINT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GOTGINT_OFST))
1304 
1305 /*
1306  * Register : AHB Configuration Register - gahbcfg
1307  *
1308  * This register can be used to configure the core after power-on or a change in
1309  * mode. This register mainly contains AHB system-related configuration parameters.
1310  * Do not change this register after the initial programming. The application must
1311  * program this register before starting any transactions on either the AHB or the
1312  * USB.
1313  *
1314  * Register Layout
1315  *
1316  * Bits | Access | Reset | Description
1317  * :--------|:-------|:------|:----------------------------------
1318  * [0] | RW | 0x0 | Global Interrupt Mask
1319  * [4:1] | RW | 0x0 | Burst Length Type
1320  * [5] | RW | 0x0 | DMA Enable
1321  * [6] | ??? | 0x0 | *UNDEFINED*
1322  * [7] | RW | 0x0 | Non-Periodic TxFIFO Empty Level
1323  * [8] | RW | 0x0 | Periodic TxFIFO Empty Leve
1324  * [20:9] | ??? | 0x0 | *UNDEFINED*
1325  * [21] | RW | 0x0 | Remote Memory Support
1326  * [22] | RW | 0x0 | Notify All Dma Write Transactions
1327  * [31:23] | ??? | 0x0 | *UNDEFINED*
1328  *
1329  */
1330 /*
1331  * Field : Global Interrupt Mask - glblintrmsk
1332  *
1333  * Mode: Host and device. The application uses this bit to mask or unmask the
1334  * interrupt line assertion to itself. Irrespective of this bits setting, the
1335  * interrupt status registers are updated by the core.
1336  *
1337  * Field Enumeration Values:
1338  *
1339  * Enum | Value | Description
1340  * :-----------------------------------------|:------|:------------------------------------------------
1341  * ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK_E_MSK | 0x0 | Mask the interrupt assertion to the application
1342  * ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK_E_NOMSK | 0x1 | Unmask the interrupt assertion to the
1343  * : | | application.
1344  *
1345  * Field Access Macros:
1346  *
1347  */
1348 /*
1349  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK
1350  *
1351  * Mask the interrupt assertion to the application
1352  */
1353 #define ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK_E_MSK 0x0
1354 /*
1355  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK
1356  *
1357  * Unmask the interrupt assertion to the application.
1358  */
1359 #define ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK_E_NOMSK 0x1
1360 
1361 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK register field. */
1362 #define ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK_LSB 0
1363 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK register field. */
1364 #define ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK_MSB 0
1365 /* The width in bits of the ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK register field. */
1366 #define ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK_WIDTH 1
1367 /* The mask used to set the ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK register field value. */
1368 #define ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK_SET_MSK 0x00000001
1369 /* The mask used to clear the ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK register field value. */
1370 #define ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK_CLR_MSK 0xfffffffe
1371 /* The reset value of the ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK register field. */
1372 #define ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK_RESET 0x0
1373 /* Extracts the ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK field value from a register. */
1374 #define ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK_GET(value) (((value) & 0x00000001) >> 0)
1375 /* Produces a ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK register field value suitable for setting the register. */
1376 #define ALT_USB_GLOB_GAHBCFG_GLBLINTRMSK_SET(value) (((value) << 0) & 0x00000001)
1377 
1378 /*
1379  * Field : Burst Length Type - hbstlen
1380  *
1381  * Mode:Host and device. This field is used in Internal DMA modes.
1382  *
1383  * Field Enumeration Values:
1384  *
1385  * Enum | Value | Description
1386  * :-----------------------------------------------|:------|:-------------------
1387  * ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD1ORSINGLE | 0x0 | 1 word or single
1388  * ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD4ORINCR | 0x1 | 4 word or incr
1389  * ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD8 | 0x2 | 8 word
1390  * ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD16ORINCR4 | 0x3 | 16 word or incr4
1391  * ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD32 | 0x4 | 32 word
1392  * ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD64ORINCR8 | 0x5 | 64 word or incr8
1393  * ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD128 | 0x6 | 128 word
1394  * ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD256ORINCR16 | 0x7 | 256 word or incr16
1395  * ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORDX | 0x8 | Others reserved
1396  *
1397  * Field Access Macros:
1398  *
1399  */
1400 /*
1401  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_HBSTLEN
1402  *
1403  * 1 word or single
1404  */
1405 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD1ORSINGLE 0x0
1406 /*
1407  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_HBSTLEN
1408  *
1409  * 4 word or incr
1410  */
1411 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD4ORINCR 0x1
1412 /*
1413  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_HBSTLEN
1414  *
1415  * 8 word
1416  */
1417 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD8 0x2
1418 /*
1419  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_HBSTLEN
1420  *
1421  * 16 word or incr4
1422  */
1423 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD16ORINCR4 0x3
1424 /*
1425  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_HBSTLEN
1426  *
1427  * 32 word
1428  */
1429 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD32 0x4
1430 /*
1431  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_HBSTLEN
1432  *
1433  * 64 word or incr8
1434  */
1435 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD64ORINCR8 0x5
1436 /*
1437  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_HBSTLEN
1438  *
1439  * 128 word
1440  */
1441 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD128 0x6
1442 /*
1443  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_HBSTLEN
1444  *
1445  * 256 word or incr16
1446  */
1447 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORD256ORINCR16 0x7
1448 /*
1449  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_HBSTLEN
1450  *
1451  * Others reserved
1452  */
1453 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_E_WORDX 0x8
1454 
1455 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GAHBCFG_HBSTLEN register field. */
1456 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_LSB 1
1457 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GAHBCFG_HBSTLEN register field. */
1458 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_MSB 4
1459 /* The width in bits of the ALT_USB_GLOB_GAHBCFG_HBSTLEN register field. */
1460 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_WIDTH 4
1461 /* The mask used to set the ALT_USB_GLOB_GAHBCFG_HBSTLEN register field value. */
1462 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_SET_MSK 0x0000001e
1463 /* The mask used to clear the ALT_USB_GLOB_GAHBCFG_HBSTLEN register field value. */
1464 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_CLR_MSK 0xffffffe1
1465 /* The reset value of the ALT_USB_GLOB_GAHBCFG_HBSTLEN register field. */
1466 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_RESET 0x0
1467 /* Extracts the ALT_USB_GLOB_GAHBCFG_HBSTLEN field value from a register. */
1468 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_GET(value) (((value) & 0x0000001e) >> 1)
1469 /* Produces a ALT_USB_GLOB_GAHBCFG_HBSTLEN register field value suitable for setting the register. */
1470 #define ALT_USB_GLOB_GAHBCFG_HBSTLEN_SET(value) (((value) << 1) & 0x0000001e)
1471 
1472 /*
1473  * Field : DMA Enable - dmaen
1474  *
1475  * Mode:Host and device. Enables switching from DMA mode to slave mode.
1476  *
1477  * Field Enumeration Values:
1478  *
1479  * Enum | Value | Description
1480  * :------------------------------------|:------|:----------------------------
1481  * ALT_USB_GLOB_GAHBCFG_DMAEN_E_SLVMOD | 0x0 | Core operates in Slave mode
1482  * ALT_USB_GLOB_GAHBCFG_DMAEN_E_DMAMOD | 0x1 | Core operates in a DMA mode
1483  *
1484  * Field Access Macros:
1485  *
1486  */
1487 /*
1488  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_DMAEN
1489  *
1490  * Core operates in Slave mode
1491  */
1492 #define ALT_USB_GLOB_GAHBCFG_DMAEN_E_SLVMOD 0x0
1493 /*
1494  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_DMAEN
1495  *
1496  * Core operates in a DMA mode
1497  */
1498 #define ALT_USB_GLOB_GAHBCFG_DMAEN_E_DMAMOD 0x1
1499 
1500 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GAHBCFG_DMAEN register field. */
1501 #define ALT_USB_GLOB_GAHBCFG_DMAEN_LSB 5
1502 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GAHBCFG_DMAEN register field. */
1503 #define ALT_USB_GLOB_GAHBCFG_DMAEN_MSB 5
1504 /* The width in bits of the ALT_USB_GLOB_GAHBCFG_DMAEN register field. */
1505 #define ALT_USB_GLOB_GAHBCFG_DMAEN_WIDTH 1
1506 /* The mask used to set the ALT_USB_GLOB_GAHBCFG_DMAEN register field value. */
1507 #define ALT_USB_GLOB_GAHBCFG_DMAEN_SET_MSK 0x00000020
1508 /* The mask used to clear the ALT_USB_GLOB_GAHBCFG_DMAEN register field value. */
1509 #define ALT_USB_GLOB_GAHBCFG_DMAEN_CLR_MSK 0xffffffdf
1510 /* The reset value of the ALT_USB_GLOB_GAHBCFG_DMAEN register field. */
1511 #define ALT_USB_GLOB_GAHBCFG_DMAEN_RESET 0x0
1512 /* Extracts the ALT_USB_GLOB_GAHBCFG_DMAEN field value from a register. */
1513 #define ALT_USB_GLOB_GAHBCFG_DMAEN_GET(value) (((value) & 0x00000020) >> 5)
1514 /* Produces a ALT_USB_GLOB_GAHBCFG_DMAEN register field value suitable for setting the register. */
1515 #define ALT_USB_GLOB_GAHBCFG_DMAEN_SET(value) (((value) << 5) & 0x00000020)
1516 
1517 /*
1518  * Field : Non-Periodic TxFIFO Empty Level - nptxfemplvl
1519  *
1520  * Mode:Host and device. This bit is used only in Slave mode. In host mode and with
1521  * Shared FIFO with device mode, this bit indicates when the Non-Periodic TxFIFO
1522  * Empty Interrupt bit in the Core Interrupt register (GINTSTS.NPTxFEmp) is
1523  * triggered. With dedicated FIFO in device mode, this bit indicates when IN
1524  * endpoint Transmit FIFO empty interrupt (DIEPINTn.TxFEmp) is triggered. Host mode
1525  * and with Shared FIFO with device mode:
1526  *
1527  * Field Enumeration Values:
1528  *
1529  * Enum | Value | Description
1530  * :---------------------------------------------|:------|:-------------------------------------------------
1531  * ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL_E_HALFEMPTY | 0x0 | DIEPINTn.TxFEmp interrupt indicates that the IN
1532  * : | | Endpoint TxFIFO is half empty or DIEPINTn.TxFEmp
1533  * : | | interrupt indicates that the IN Endpoint TxFIFO
1534  * : | | is half empty
1535  * ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL_E_EMPTY | 0x1 | GINTSTS.NPTxFEmp interrupt indicates that the
1536  * : | | Non-Periodic TxFIFO is completely empty or
1537  * : | | DIEPINTn.TxFEmp interrupt indicates that the IN
1538  * : | | Endpoint TxFIFO is completely empty
1539  *
1540  * Field Access Macros:
1541  *
1542  */
1543 /*
1544  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL
1545  *
1546  * DIEPINTn.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is half empty or
1547  * DIEPINTn.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is half empty
1548  */
1549 #define ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL_E_HALFEMPTY 0x0
1550 /*
1551  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL
1552  *
1553  * GINTSTS.NPTxFEmp interrupt indicates that the Non-Periodic TxFIFO is completely
1554  * empty or DIEPINTn.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is
1555  * completely empty
1556  */
1557 #define ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL_E_EMPTY 0x1
1558 
1559 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL register field. */
1560 #define ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL_LSB 7
1561 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL register field. */
1562 #define ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL_MSB 7
1563 /* The width in bits of the ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL register field. */
1564 #define ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL_WIDTH 1
1565 /* The mask used to set the ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL register field value. */
1566 #define ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL_SET_MSK 0x00000080
1567 /* The mask used to clear the ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL register field value. */
1568 #define ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL_CLR_MSK 0xffffff7f
1569 /* The reset value of the ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL register field. */
1570 #define ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL_RESET 0x0
1571 /* Extracts the ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL field value from a register. */
1572 #define ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL_GET(value) (((value) & 0x00000080) >> 7)
1573 /* Produces a ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL register field value suitable for setting the register. */
1574 #define ALT_USB_GLOB_GAHBCFG_NPTXFEMPLVL_SET(value) (((value) << 7) & 0x00000080)
1575 
1576 /*
1577  * Field : Periodic TxFIFO Empty Leve - ptxfemplvl
1578  *
1579  * Mode:Host only. Indicates when the Periodic TxFIFO Empty Interrupt bit in the
1580  * Core Interrupt register (GINTSTS.PTxFEmp) is triggered. This bit is used only in
1581  * Slave mode.
1582  *
1583  * Field Enumeration Values:
1584  *
1585  * Enum | Value | Description
1586  * :--------------------------------------------|:------|:---------------------------------------------
1587  * ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL_E_HALFEMPTY | 0x0 | GINTSTS.PTxFEmp interrupt indicates that the
1588  * : | | Periodic TxFIFO is half empty
1589  * ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL_E_EMPTY | 0x1 | GINTSTS.PTxFEmp interrupt indicates that the
1590  * : | | Periodic TxFIFO is completely empty
1591  *
1592  * Field Access Macros:
1593  *
1594  */
1595 /*
1596  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL
1597  *
1598  * GINTSTS.PTxFEmp interrupt indicates that the Periodic TxFIFO is half empty
1599  */
1600 #define ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL_E_HALFEMPTY 0x0
1601 /*
1602  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL
1603  *
1604  * GINTSTS.PTxFEmp interrupt indicates that the Periodic TxFIFO is completely empty
1605  */
1606 #define ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL_E_EMPTY 0x1
1607 
1608 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL register field. */
1609 #define ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL_LSB 8
1610 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL register field. */
1611 #define ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL_MSB 8
1612 /* The width in bits of the ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL register field. */
1613 #define ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL_WIDTH 1
1614 /* The mask used to set the ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL register field value. */
1615 #define ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL_SET_MSK 0x00000100
1616 /* The mask used to clear the ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL register field value. */
1617 #define ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL_CLR_MSK 0xfffffeff
1618 /* The reset value of the ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL register field. */
1619 #define ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL_RESET 0x0
1620 /* Extracts the ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL field value from a register. */
1621 #define ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL_GET(value) (((value) & 0x00000100) >> 8)
1622 /* Produces a ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL register field value suitable for setting the register. */
1623 #define ALT_USB_GLOB_GAHBCFG_PTXFEMPLVL_SET(value) (((value) << 8) & 0x00000100)
1624 
1625 /*
1626  * Field : Remote Memory Support - remmemsupp
1627  *
1628  * This bit is programmed to enable/disable the functionality to wait for the
1629  * system DMA Done Signal for the DMA Write Transfers.
1630  *
1631  * * The int_dma_req output signal is asserted when HSOTG DMA starts write transfer
1632  * to the external memory. When the core is done with the Transfers it asserts
1633  * int_dma_done signal to flag the completion of DMA writes from HSOTG. The core
1634  * then waits for sys_dma_done signal from the system to proceed further and
1635  * complete the Data Transfer corresponding to a particular Channel/Endpoint.
1636  *
1637  * * The int_dma_req and int_dma_done signals are not asserted and the core
1638  * proceeds with the assertion of the XferComp interrupt as soon as wait for the
1639  * system DMA Done Signal for the DMA Write Transfers the DMA write transfer is
1640  * done at the HSOTG Core Boundary and it doesn't wait for the sys_dma_done
1641  * signal to complete the DATA
1642  *
1643  * Field Enumeration Values:
1644  *
1645  * Enum | Value | Description
1646  * :---------------------------------------|:------|:-----------------------------------------------
1647  * ALT_USB_GLOB_GAHBCFG_REMMEMSUPP_E_DISD | 0x0 | Disable wait for system DMA Done Signal
1648  * ALT_USB_GLOB_GAHBCFG_REMMEMSUPP_E_END | 0x1 | Enable wait for the system DMA Done Signal for
1649  * : | | the DMA Write Transfers
1650  *
1651  * Field Access Macros:
1652  *
1653  */
1654 /*
1655  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_REMMEMSUPP
1656  *
1657  * Disable wait for system DMA Done Signal
1658  */
1659 #define ALT_USB_GLOB_GAHBCFG_REMMEMSUPP_E_DISD 0x0
1660 /*
1661  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_REMMEMSUPP
1662  *
1663  * Enable wait for the system DMA Done Signal for the DMA Write Transfers
1664  */
1665 #define ALT_USB_GLOB_GAHBCFG_REMMEMSUPP_E_END 0x1
1666 
1667 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GAHBCFG_REMMEMSUPP register field. */
1668 #define ALT_USB_GLOB_GAHBCFG_REMMEMSUPP_LSB 21
1669 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GAHBCFG_REMMEMSUPP register field. */
1670 #define ALT_USB_GLOB_GAHBCFG_REMMEMSUPP_MSB 21
1671 /* The width in bits of the ALT_USB_GLOB_GAHBCFG_REMMEMSUPP register field. */
1672 #define ALT_USB_GLOB_GAHBCFG_REMMEMSUPP_WIDTH 1
1673 /* The mask used to set the ALT_USB_GLOB_GAHBCFG_REMMEMSUPP register field value. */
1674 #define ALT_USB_GLOB_GAHBCFG_REMMEMSUPP_SET_MSK 0x00200000
1675 /* The mask used to clear the ALT_USB_GLOB_GAHBCFG_REMMEMSUPP register field value. */
1676 #define ALT_USB_GLOB_GAHBCFG_REMMEMSUPP_CLR_MSK 0xffdfffff
1677 /* The reset value of the ALT_USB_GLOB_GAHBCFG_REMMEMSUPP register field. */
1678 #define ALT_USB_GLOB_GAHBCFG_REMMEMSUPP_RESET 0x0
1679 /* Extracts the ALT_USB_GLOB_GAHBCFG_REMMEMSUPP field value from a register. */
1680 #define ALT_USB_GLOB_GAHBCFG_REMMEMSUPP_GET(value) (((value) & 0x00200000) >> 21)
1681 /* Produces a ALT_USB_GLOB_GAHBCFG_REMMEMSUPP register field value suitable for setting the register. */
1682 #define ALT_USB_GLOB_GAHBCFG_REMMEMSUPP_SET(value) (((value) << 21) & 0x00200000)
1683 
1684 /*
1685  * Field : Notify All Dma Write Transactions - notialldmawrit
1686  *
1687  * This bit is programmed to enable the System DMA Done functionality for all the
1688  * DMA write Transactions corresponding to the Channel/Endpoint. This bit is valid
1689  * only when GAHBCFG.RemMemSupp is set to 1.
1690  *
1691  * Field Enumeration Values:
1692  *
1693  * Enum | Value | Description
1694  * :------------------------------------------------|:------|:-------------------------------------------------
1695  * ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT_E_ALLTRANS | 0x1 | HSOTG core asserts int_dma_req for all the DMA
1696  * : | | write transactions on the AHB interface along
1697  * : | | with int_dma_done, chep_last_transact and
1698  * : | | chep_number signal informations. The core waits
1699  * : | | for sys_dma_done signal for all the DMA write
1700  * : | | transactions in order to complete the transfer
1701  * : | | of a particular Channel/Endpoint
1702  * ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT_E_LASTTRANS | 0x0 | HSOTG core asserts int_dma_req signal only for
1703  * : | | the last transaction of DMA write transfer
1704  * : | | corresponding to a particular Channel/Endpoint.
1705  * : | | Similarly, the core waits for sys_dma_done
1706  * : | | signal only for that transaction of DMA write to
1707  * : | | complete the transfer of a particular
1708  * : | | Channel/Endpoint
1709  *
1710  * Field Access Macros:
1711  *
1712  */
1713 /*
1714  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT
1715  *
1716  * HSOTG core asserts int_dma_req for all the DMA write transactions on the AHB
1717  * interface along with int_dma_done, chep_last_transact and chep_number signal
1718  * informations. The core waits for sys_dma_done signal for all the DMA write
1719  * transactions in order to complete the transfer of a particular Channel/Endpoint
1720  */
1721 #define ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT_E_ALLTRANS 0x1
1722 /*
1723  * Enumerated value for register field ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT
1724  *
1725  * HSOTG core asserts int_dma_req signal only for the last transaction of DMA write
1726  * transfer corresponding to a particular Channel/Endpoint. Similarly, the core
1727  * waits for sys_dma_done signal only for that transaction of DMA write to complete
1728  * the transfer of a particular Channel/Endpoint
1729  */
1730 #define ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT_E_LASTTRANS 0x0
1731 
1732 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT register field. */
1733 #define ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT_LSB 22
1734 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT register field. */
1735 #define ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT_MSB 22
1736 /* The width in bits of the ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT register field. */
1737 #define ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT_WIDTH 1
1738 /* The mask used to set the ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT register field value. */
1739 #define ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT_SET_MSK 0x00400000
1740 /* The mask used to clear the ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT register field value. */
1741 #define ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT_CLR_MSK 0xffbfffff
1742 /* The reset value of the ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT register field. */
1743 #define ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT_RESET 0x0
1744 /* Extracts the ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT field value from a register. */
1745 #define ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT_GET(value) (((value) & 0x00400000) >> 22)
1746 /* Produces a ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT register field value suitable for setting the register. */
1747 #define ALT_USB_GLOB_GAHBCFG_NOTIALLDMAWRIT_SET(value) (((value) << 22) & 0x00400000)
1748 
1749 #ifndef __ASSEMBLY__
1750 /*
1751  * WARNING: The C register and register group struct declarations are provided for
1752  * convenience and illustrative purposes. They should, however, be used with
1753  * caution as the C language standard provides no guarantees about the alignment or
1754  * atomicity of device memory accesses. The recommended practice for writing
1755  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1756  * alt_write_word() functions.
1757  *
1758  * The struct declaration for register ALT_USB_GLOB_GAHBCFG.
1759  */
1760 struct ALT_USB_GLOB_GAHBCFG_s
1761 {
1762  uint32_t glblintrmsk : 1; /* Global Interrupt Mask */
1763  uint32_t hbstlen : 4; /* Burst Length Type */
1764  uint32_t dmaen : 1; /* DMA Enable */
1765  uint32_t : 1; /* *UNDEFINED* */
1766  uint32_t nptxfemplvl : 1; /* Non-Periodic TxFIFO Empty Level */
1767  uint32_t ptxfemplvl : 1; /* Periodic TxFIFO Empty Leve */
1768  uint32_t : 12; /* *UNDEFINED* */
1769  uint32_t remmemsupp : 1; /* Remote Memory Support */
1770  uint32_t notialldmawrit : 1; /* Notify All Dma Write Transactions */
1771  uint32_t : 9; /* *UNDEFINED* */
1772 };
1773 
1774 /* The typedef declaration for register ALT_USB_GLOB_GAHBCFG. */
1775 typedef volatile struct ALT_USB_GLOB_GAHBCFG_s ALT_USB_GLOB_GAHBCFG_t;
1776 #endif /* __ASSEMBLY__ */
1777 
1778 /* The byte offset of the ALT_USB_GLOB_GAHBCFG register from the beginning of the component. */
1779 #define ALT_USB_GLOB_GAHBCFG_OFST 0x8
1780 /* The address of the ALT_USB_GLOB_GAHBCFG register. */
1781 #define ALT_USB_GLOB_GAHBCFG_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GAHBCFG_OFST))
1782 
1783 /*
1784  * Register : USB Configuration Registe - gusbcfg
1785  *
1786  * This register can be used to configure the core after power-on or a changing to
1787  * Host mode or Device mode. It contains USB and USB-PHY related configuration
1788  * parameters. The application must program this register before starting any
1789  * transactions on either the AHB or the USB. Do not make changes to this register
1790  * after the initial programming.
1791  *
1792  * Register Layout
1793  *
1794  * Bits | Access | Reset | Description
1795  * :--------|:-------|:------|:-----------------------------------
1796  * [2:0] | RW | 0x0 | HS FS Timeout Calibration
1797  * [3] | R | 0x0 | PHY Interfac
1798  * [4] | R | 0x1 | ULPI Select
1799  * [5] | R | 0x0 | Full-Speed Serial Interface Select
1800  * [6] | R | 0x0 | USB 2.0 High-Speed PHY
1801  * [7] | RW | 0x0 | ULPI DDR Select
1802  * [8] | RW | 0x0 | SRP-Capable
1803  * [9] | RW | 0x0 | HNP-Capable
1804  * [13:10] | RW | 0x5 | USB Turnaround Time
1805  * [17:14] | ??? | 0x0 | *UNDEFINED*
1806  * [18] | RW | 0x0 | ULPI Auto Resume
1807  * [19] | RW | 0x0 | ULPI Clock SuspendM
1808  * [20] | RW | 0x0 | ULPI External VBUS Drive
1809  * [21] | RW | 0x0 | ULPI External VBUS Indicato
1810  * [22] | RW | 0x0 | TermSel DLine Pulsing Selection
1811  * [23] | RW | 0x0 | Indicator Complement
1812  * [24] | RW | 0x0 | Indicator Pass Throug
1813  * [25] | RW | 0x0 | ULPI Interface Protect Disable
1814  * [27:26] | ??? | 0x0 | *UNDEFINED*
1815  * [28] | RW | 0x0 | Tx End Delay
1816  * [29] | RW | 0x0 | Force Host Mode.
1817  * [30] | RW | 0x0 | Force Device Mode
1818  * [31] | W | 0x0 | Corrupt Tx packet
1819  *
1820  */
1821 /*
1822  * Field : HS FS Timeout Calibration - toutcal
1823  *
1824  * Mode:Host and Device. The number of PHY clocks that the application programs in
1825  * this field is added to the high-speed/full-speed interpacket timeout duration in
1826  * the core to account for any additional delays introduced by the PHY. This can be
1827  * required, because the delay introduced by the PHY in generating the linestate
1828  * condition can vary from one PHY to another. The USB standard timeout value for
1829  * high-speed operation is 736 to 816 (inclusive) bit times. The USB standard
1830  * timeout value for full-speed operation is 16 to 18 (inclusive) bit times. The
1831  * application must program this field based on the speed of enumeration. The
1832  * number of bit times added per PHY clock are: High-speed operation:
1833  *
1834  * * One 30-MHz PHY clock = 16 bit times
1835  *
1836  * * One 60-MHz PHY clock = 8 bit times
1837  *
1838  * Full-speed operation:
1839  *
1840  * * One 30-MHz PHY clock = 0.4 bit times
1841  *
1842  * * One 60-MHz PHY clock = 0.2 bit times
1843  *
1844  * * One 48-MHz PHY clock = 0.25 bit times
1845  *
1846  * Field Access Macros:
1847  *
1848  */
1849 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_TOUTCAL register field. */
1850 #define ALT_USB_GLOB_GUSBCFG_TOUTCAL_LSB 0
1851 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_TOUTCAL register field. */
1852 #define ALT_USB_GLOB_GUSBCFG_TOUTCAL_MSB 2
1853 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_TOUTCAL register field. */
1854 #define ALT_USB_GLOB_GUSBCFG_TOUTCAL_WIDTH 3
1855 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_TOUTCAL register field value. */
1856 #define ALT_USB_GLOB_GUSBCFG_TOUTCAL_SET_MSK 0x00000007
1857 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_TOUTCAL register field value. */
1858 #define ALT_USB_GLOB_GUSBCFG_TOUTCAL_CLR_MSK 0xfffffff8
1859 /* The reset value of the ALT_USB_GLOB_GUSBCFG_TOUTCAL register field. */
1860 #define ALT_USB_GLOB_GUSBCFG_TOUTCAL_RESET 0x0
1861 /* Extracts the ALT_USB_GLOB_GUSBCFG_TOUTCAL field value from a register. */
1862 #define ALT_USB_GLOB_GUSBCFG_TOUTCAL_GET(value) (((value) & 0x00000007) >> 0)
1863 /* Produces a ALT_USB_GLOB_GUSBCFG_TOUTCAL register field value suitable for setting the register. */
1864 #define ALT_USB_GLOB_GUSBCFG_TOUTCAL_SET(value) (((value) << 0) & 0x00000007)
1865 
1866 /*
1867  * Field : PHY Interfac - phyif
1868  *
1869  * Mode:Host and Device. This application uses a ULPI interface only. Hence only
1870  * 8-bit setting is relevant. This setting should not matter since UTMI is not
1871  * enabled.
1872  *
1873  * Field Enumeration Values:
1874  *
1875  * Enum | Value | Description
1876  * :-----------------------------------|:------|:--------------
1877  * ALT_USB_GLOB_GUSBCFG_PHYIF_E_BITS8 | 0x0 | PHY 8bit Mode
1878  *
1879  * Field Access Macros:
1880  *
1881  */
1882 /*
1883  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_PHYIF
1884  *
1885  * PHY 8bit Mode
1886  */
1887 #define ALT_USB_GLOB_GUSBCFG_PHYIF_E_BITS8 0x0
1888 
1889 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_PHYIF register field. */
1890 #define ALT_USB_GLOB_GUSBCFG_PHYIF_LSB 3
1891 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_PHYIF register field. */
1892 #define ALT_USB_GLOB_GUSBCFG_PHYIF_MSB 3
1893 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_PHYIF register field. */
1894 #define ALT_USB_GLOB_GUSBCFG_PHYIF_WIDTH 1
1895 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_PHYIF register field value. */
1896 #define ALT_USB_GLOB_GUSBCFG_PHYIF_SET_MSK 0x00000008
1897 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_PHYIF register field value. */
1898 #define ALT_USB_GLOB_GUSBCFG_PHYIF_CLR_MSK 0xfffffff7
1899 /* The reset value of the ALT_USB_GLOB_GUSBCFG_PHYIF register field. */
1900 #define ALT_USB_GLOB_GUSBCFG_PHYIF_RESET 0x0
1901 /* Extracts the ALT_USB_GLOB_GUSBCFG_PHYIF field value from a register. */
1902 #define ALT_USB_GLOB_GUSBCFG_PHYIF_GET(value) (((value) & 0x00000008) >> 3)
1903 /* Produces a ALT_USB_GLOB_GUSBCFG_PHYIF register field value suitable for setting the register. */
1904 #define ALT_USB_GLOB_GUSBCFG_PHYIF_SET(value) (((value) << 3) & 0x00000008)
1905 
1906 /*
1907  * Field : ULPI Select - ulpi_utmi_sel
1908  *
1909  * Mode:Host and Device. The application uses ULPI Only in 8bit mode.
1910  *
1911  * Field Enumeration Values:
1912  *
1913  * Enum | Value | Description
1914  * :------------------------------------------|:------|:------------
1915  * ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL_E_ULPI | 0x0 | ULPI PHY
1916  *
1917  * Field Access Macros:
1918  *
1919  */
1920 /*
1921  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL
1922  *
1923  * ULPI PHY
1924  */
1925 #define ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL_E_ULPI 0x0
1926 
1927 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL register field. */
1928 #define ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL_LSB 4
1929 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL register field. */
1930 #define ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL_MSB 4
1931 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL register field. */
1932 #define ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL_WIDTH 1
1933 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL register field value. */
1934 #define ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL_SET_MSK 0x00000010
1935 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL register field value. */
1936 #define ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL_CLR_MSK 0xffffffef
1937 /* The reset value of the ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL register field. */
1938 #define ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL_RESET 0x1
1939 /* Extracts the ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL field value from a register. */
1940 #define ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL_GET(value) (((value) & 0x00000010) >> 4)
1941 /* Produces a ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL register field value suitable for setting the register. */
1942 #define ALT_USB_GLOB_GUSBCFG_ULPI_UTMI_SEL_SET(value) (((value) << 4) & 0x00000010)
1943 
1944 /*
1945  * Field : Full-Speed Serial Interface Select - fsintf
1946  *
1947  * Mode:Host and Device. The application can Set this bit to select between the 3-
1948  * and 6-pin interfaces, and access is Read and Write.
1949  *
1950  * Field Enumeration Values:
1951  *
1952  * Enum | Value | Description
1953  * :-------------------------------------|:------|:-------------------------------------------------
1954  * ALT_USB_GLOB_GUSBCFG_FSINTF_E_FS6PIN | 0x0 | 6-pin unidirectional full-speed serial interface
1955  * ALT_USB_GLOB_GUSBCFG_FSINTF_E_FS3PIN | 0x1 | 3-pin bidirectional full-speed serial interface
1956  *
1957  * Field Access Macros:
1958  *
1959  */
1960 /*
1961  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_FSINTF
1962  *
1963  * 6-pin unidirectional full-speed serial interface
1964  */
1965 #define ALT_USB_GLOB_GUSBCFG_FSINTF_E_FS6PIN 0x0
1966 /*
1967  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_FSINTF
1968  *
1969  * 3-pin bidirectional full-speed serial interface
1970  */
1971 #define ALT_USB_GLOB_GUSBCFG_FSINTF_E_FS3PIN 0x1
1972 
1973 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_FSINTF register field. */
1974 #define ALT_USB_GLOB_GUSBCFG_FSINTF_LSB 5
1975 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_FSINTF register field. */
1976 #define ALT_USB_GLOB_GUSBCFG_FSINTF_MSB 5
1977 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_FSINTF register field. */
1978 #define ALT_USB_GLOB_GUSBCFG_FSINTF_WIDTH 1
1979 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_FSINTF register field value. */
1980 #define ALT_USB_GLOB_GUSBCFG_FSINTF_SET_MSK 0x00000020
1981 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_FSINTF register field value. */
1982 #define ALT_USB_GLOB_GUSBCFG_FSINTF_CLR_MSK 0xffffffdf
1983 /* The reset value of the ALT_USB_GLOB_GUSBCFG_FSINTF register field. */
1984 #define ALT_USB_GLOB_GUSBCFG_FSINTF_RESET 0x0
1985 /* Extracts the ALT_USB_GLOB_GUSBCFG_FSINTF field value from a register. */
1986 #define ALT_USB_GLOB_GUSBCFG_FSINTF_GET(value) (((value) & 0x00000020) >> 5)
1987 /* Produces a ALT_USB_GLOB_GUSBCFG_FSINTF register field value suitable for setting the register. */
1988 #define ALT_USB_GLOB_GUSBCFG_FSINTF_SET(value) (((value) << 5) & 0x00000020)
1989 
1990 /*
1991  * Field : USB 2.0 High-Speed PHY - physel
1992  *
1993  * Mode:Host and Device. The application uses USB 2.0.
1994  *
1995  * Field Enumeration Values:
1996  *
1997  * Enum | Value | Description
1998  * :------------------------------------|:------|:------------------------
1999  * ALT_USB_GLOB_GUSBCFG_PHYSEL_E_USB20 | 0x0 | USB 2.0 high-speed ULPI
2000  *
2001  * Field Access Macros:
2002  *
2003  */
2004 /*
2005  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_PHYSEL
2006  *
2007  * USB 2.0 high-speed ULPI
2008  */
2009 #define ALT_USB_GLOB_GUSBCFG_PHYSEL_E_USB20 0x0
2010 
2011 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_PHYSEL register field. */
2012 #define ALT_USB_GLOB_GUSBCFG_PHYSEL_LSB 6
2013 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_PHYSEL register field. */
2014 #define ALT_USB_GLOB_GUSBCFG_PHYSEL_MSB 6
2015 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_PHYSEL register field. */
2016 #define ALT_USB_GLOB_GUSBCFG_PHYSEL_WIDTH 1
2017 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_PHYSEL register field value. */
2018 #define ALT_USB_GLOB_GUSBCFG_PHYSEL_SET_MSK 0x00000040
2019 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_PHYSEL register field value. */
2020 #define ALT_USB_GLOB_GUSBCFG_PHYSEL_CLR_MSK 0xffffffbf
2021 /* The reset value of the ALT_USB_GLOB_GUSBCFG_PHYSEL register field. */
2022 #define ALT_USB_GLOB_GUSBCFG_PHYSEL_RESET 0x0
2023 /* Extracts the ALT_USB_GLOB_GUSBCFG_PHYSEL field value from a register. */
2024 #define ALT_USB_GLOB_GUSBCFG_PHYSEL_GET(value) (((value) & 0x00000040) >> 6)
2025 /* Produces a ALT_USB_GLOB_GUSBCFG_PHYSEL register field value suitable for setting the register. */
2026 #define ALT_USB_GLOB_GUSBCFG_PHYSEL_SET(value) (((value) << 6) & 0x00000040)
2027 
2028 /*
2029  * Field : ULPI DDR Select - ddrsel
2030  *
2031  * Mode:Host and Device. The application uses this bit to select a Single Data Rate
2032  * (SDR) or Double Data Rate (DDR) or ULPI interface.
2033  *
2034  * Field Enumeration Values:
2035  *
2036  * Enum | Value | Description
2037  * :----------------------------------|:------|:-------------------------------------------------
2038  * ALT_USB_GLOB_GUSBCFG_DDRSEL_E_SDR | 0x0 | Single Data Rate ULPI Interfacewith 8-bit-wide
2039  * : | | data bus
2040  * ALT_USB_GLOB_GUSBCFG_DDRSEL_E_DDR | 0x1 | Double Data Rate ULPI Interface, with 4-bit-wide
2041  * : | | data bus
2042  *
2043  * Field Access Macros:
2044  *
2045  */
2046 /*
2047  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_DDRSEL
2048  *
2049  * Single Data Rate ULPI Interfacewith 8-bit-wide data bus
2050  */
2051 #define ALT_USB_GLOB_GUSBCFG_DDRSEL_E_SDR 0x0
2052 /*
2053  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_DDRSEL
2054  *
2055  * Double Data Rate ULPI Interface, with 4-bit-wide data bus
2056  */
2057 #define ALT_USB_GLOB_GUSBCFG_DDRSEL_E_DDR 0x1
2058 
2059 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_DDRSEL register field. */
2060 #define ALT_USB_GLOB_GUSBCFG_DDRSEL_LSB 7
2061 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_DDRSEL register field. */
2062 #define ALT_USB_GLOB_GUSBCFG_DDRSEL_MSB 7
2063 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_DDRSEL register field. */
2064 #define ALT_USB_GLOB_GUSBCFG_DDRSEL_WIDTH 1
2065 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_DDRSEL register field value. */
2066 #define ALT_USB_GLOB_GUSBCFG_DDRSEL_SET_MSK 0x00000080
2067 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_DDRSEL register field value. */
2068 #define ALT_USB_GLOB_GUSBCFG_DDRSEL_CLR_MSK 0xffffff7f
2069 /* The reset value of the ALT_USB_GLOB_GUSBCFG_DDRSEL register field. */
2070 #define ALT_USB_GLOB_GUSBCFG_DDRSEL_RESET 0x0
2071 /* Extracts the ALT_USB_GLOB_GUSBCFG_DDRSEL field value from a register. */
2072 #define ALT_USB_GLOB_GUSBCFG_DDRSEL_GET(value) (((value) & 0x00000080) >> 7)
2073 /* Produces a ALT_USB_GLOB_GUSBCFG_DDRSEL register field value suitable for setting the register. */
2074 #define ALT_USB_GLOB_GUSBCFG_DDRSEL_SET(value) (((value) << 7) & 0x00000080)
2075 
2076 /*
2077  * Field : SRP-Capable - srpcap
2078  *
2079  * Mode:Host and Device. The application uses this bit to control the otg core SRP
2080  * capabilities. If the core operates as a non-SRP-capable B-device, it cannot
2081  * request the connected A-device (host) to activate VBUS and start a session. This
2082  * bit is writable only If an SRP mode was specified for Mode of Operation in
2083  * coreConsultant (parameter OTG_MODE). Otherwise, reads Return 0.
2084  *
2085  * Field Enumeration Values:
2086  *
2087  * Enum | Value | Description
2088  * :-----------------------------------|:------|:------------------------------
2089  * ALT_USB_GLOB_GUSBCFG_SRPCAP_E_DISD | 0x0 | SRP capability is not enabled
2090  * ALT_USB_GLOB_GUSBCFG_SRPCAP_E_END | 0x1 | SRP capability is enabled
2091  *
2092  * Field Access Macros:
2093  *
2094  */
2095 /*
2096  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_SRPCAP
2097  *
2098  * SRP capability is not enabled
2099  */
2100 #define ALT_USB_GLOB_GUSBCFG_SRPCAP_E_DISD 0x0
2101 /*
2102  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_SRPCAP
2103  *
2104  * SRP capability is enabled
2105  */
2106 #define ALT_USB_GLOB_GUSBCFG_SRPCAP_E_END 0x1
2107 
2108 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_SRPCAP register field. */
2109 #define ALT_USB_GLOB_GUSBCFG_SRPCAP_LSB 8
2110 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_SRPCAP register field. */
2111 #define ALT_USB_GLOB_GUSBCFG_SRPCAP_MSB 8
2112 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_SRPCAP register field. */
2113 #define ALT_USB_GLOB_GUSBCFG_SRPCAP_WIDTH 1
2114 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_SRPCAP register field value. */
2115 #define ALT_USB_GLOB_GUSBCFG_SRPCAP_SET_MSK 0x00000100
2116 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_SRPCAP register field value. */
2117 #define ALT_USB_GLOB_GUSBCFG_SRPCAP_CLR_MSK 0xfffffeff
2118 /* The reset value of the ALT_USB_GLOB_GUSBCFG_SRPCAP register field. */
2119 #define ALT_USB_GLOB_GUSBCFG_SRPCAP_RESET 0x0
2120 /* Extracts the ALT_USB_GLOB_GUSBCFG_SRPCAP field value from a register. */
2121 #define ALT_USB_GLOB_GUSBCFG_SRPCAP_GET(value) (((value) & 0x00000100) >> 8)
2122 /* Produces a ALT_USB_GLOB_GUSBCFG_SRPCAP register field value suitable for setting the register. */
2123 #define ALT_USB_GLOB_GUSBCFG_SRPCAP_SET(value) (((value) << 8) & 0x00000100)
2124 
2125 /*
2126  * Field : HNP-Capable - hnpcap
2127  *
2128  * Mode:Host and Device. The application uses this bit to control the otg core's
2129  * HNP capabilities.
2130  *
2131  * Field Enumeration Values:
2132  *
2133  * Enum | Value | Description
2134  * :-----------------------------------|:------|:-------------------------------
2135  * ALT_USB_GLOB_GUSBCFG_HNPCAP_E_DISD | 0x0 | HNP capability is not enabled.
2136  * ALT_USB_GLOB_GUSBCFG_HNPCAP_E_END | 0x1 | HNP capability is enabled
2137  *
2138  * Field Access Macros:
2139  *
2140  */
2141 /*
2142  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_HNPCAP
2143  *
2144  * HNP capability is not enabled.
2145  */
2146 #define ALT_USB_GLOB_GUSBCFG_HNPCAP_E_DISD 0x0
2147 /*
2148  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_HNPCAP
2149  *
2150  * HNP capability is enabled
2151  */
2152 #define ALT_USB_GLOB_GUSBCFG_HNPCAP_E_END 0x1
2153 
2154 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_HNPCAP register field. */
2155 #define ALT_USB_GLOB_GUSBCFG_HNPCAP_LSB 9
2156 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_HNPCAP register field. */
2157 #define ALT_USB_GLOB_GUSBCFG_HNPCAP_MSB 9
2158 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_HNPCAP register field. */
2159 #define ALT_USB_GLOB_GUSBCFG_HNPCAP_WIDTH 1
2160 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_HNPCAP register field value. */
2161 #define ALT_USB_GLOB_GUSBCFG_HNPCAP_SET_MSK 0x00000200
2162 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_HNPCAP register field value. */
2163 #define ALT_USB_GLOB_GUSBCFG_HNPCAP_CLR_MSK 0xfffffdff
2164 /* The reset value of the ALT_USB_GLOB_GUSBCFG_HNPCAP register field. */
2165 #define ALT_USB_GLOB_GUSBCFG_HNPCAP_RESET 0x0
2166 /* Extracts the ALT_USB_GLOB_GUSBCFG_HNPCAP field value from a register. */
2167 #define ALT_USB_GLOB_GUSBCFG_HNPCAP_GET(value) (((value) & 0x00000200) >> 9)
2168 /* Produces a ALT_USB_GLOB_GUSBCFG_HNPCAP register field value suitable for setting the register. */
2169 #define ALT_USB_GLOB_GUSBCFG_HNPCAP_SET(value) (((value) << 9) & 0x00000200)
2170 
2171 /*
2172  * Field : USB Turnaround Time - usbtrdtim
2173  *
2174  * Mode: Device only. Sets the turnaround time in PHY clocks. Specifies the
2175  * response time for a MAC request to the Packet FIFO Controller (PFC) to fetch
2176  * data from the DFIFO (SPRAM).
2177  *
2178  * The value is calculated for the minimum AHB frequency of 30 MHz. USB turnaround
2179  * time is critical for certification where long cables and 5-Hubs are used, so If
2180  * you need the AHB to run at less than 30 MHz, and If USB turnaround time is not
2181  * critical, these bits can be programmed to a larger value.
2182  *
2183  * Field Enumeration Values:
2184  *
2185  * Enum | Value | Description
2186  * :------------------------------------------|:------|:------------------------------
2187  * ALT_USB_GLOB_GUSBCFG_USBTRDTIM_E_TURNTIME | 0x9 | MAC interface is 8-bit UTMI+.
2188  *
2189  * Field Access Macros:
2190  *
2191  */
2192 /*
2193  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_USBTRDTIM
2194  *
2195  * MAC interface is 8-bit UTMI+.
2196  */
2197 #define ALT_USB_GLOB_GUSBCFG_USBTRDTIM_E_TURNTIME 0x9
2198 
2199 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_USBTRDTIM register field. */
2200 #define ALT_USB_GLOB_GUSBCFG_USBTRDTIM_LSB 10
2201 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_USBTRDTIM register field. */
2202 #define ALT_USB_GLOB_GUSBCFG_USBTRDTIM_MSB 13
2203 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_USBTRDTIM register field. */
2204 #define ALT_USB_GLOB_GUSBCFG_USBTRDTIM_WIDTH 4
2205 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_USBTRDTIM register field value. */
2206 #define ALT_USB_GLOB_GUSBCFG_USBTRDTIM_SET_MSK 0x00003c00
2207 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_USBTRDTIM register field value. */
2208 #define ALT_USB_GLOB_GUSBCFG_USBTRDTIM_CLR_MSK 0xffffc3ff
2209 /* The reset value of the ALT_USB_GLOB_GUSBCFG_USBTRDTIM register field. */
2210 #define ALT_USB_GLOB_GUSBCFG_USBTRDTIM_RESET 0x5
2211 /* Extracts the ALT_USB_GLOB_GUSBCFG_USBTRDTIM field value from a register. */
2212 #define ALT_USB_GLOB_GUSBCFG_USBTRDTIM_GET(value) (((value) & 0x00003c00) >> 10)
2213 /* Produces a ALT_USB_GLOB_GUSBCFG_USBTRDTIM register field value suitable for setting the register. */
2214 #define ALT_USB_GLOB_GUSBCFG_USBTRDTIM_SET(value) (((value) << 10) & 0x00003c00)
2215 
2216 /*
2217  * Field : ULPI Auto Resume - ulpiautores
2218  *
2219  * Mode:Host and Device. This bit sets the AutoResume bit in the Interface Control
2220  * register on the ULPI PHY.
2221  *
2222  * Field Enumeration Values:
2223  *
2224  * Enum | Value | Description
2225  * :----------------------------------------|:------|:------------------------------------
2226  * ALT_USB_GLOB_GUSBCFG_ULPIAUTORES_E_DISD | 0x0 | PHY does not use AutoResume feature
2227  * ALT_USB_GLOB_GUSBCFG_ULPIAUTORES_E_END | 0x1 | PHY uses AutoResume feature
2228  *
2229  * Field Access Macros:
2230  *
2231  */
2232 /*
2233  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_ULPIAUTORES
2234  *
2235  * PHY does not use AutoResume feature
2236  */
2237 #define ALT_USB_GLOB_GUSBCFG_ULPIAUTORES_E_DISD 0x0
2238 /*
2239  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_ULPIAUTORES
2240  *
2241  * PHY uses AutoResume feature
2242  */
2243 #define ALT_USB_GLOB_GUSBCFG_ULPIAUTORES_E_END 0x1
2244 
2245 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_ULPIAUTORES register field. */
2246 #define ALT_USB_GLOB_GUSBCFG_ULPIAUTORES_LSB 18
2247 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_ULPIAUTORES register field. */
2248 #define ALT_USB_GLOB_GUSBCFG_ULPIAUTORES_MSB 18
2249 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_ULPIAUTORES register field. */
2250 #define ALT_USB_GLOB_GUSBCFG_ULPIAUTORES_WIDTH 1
2251 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_ULPIAUTORES register field value. */
2252 #define ALT_USB_GLOB_GUSBCFG_ULPIAUTORES_SET_MSK 0x00040000
2253 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_ULPIAUTORES register field value. */
2254 #define ALT_USB_GLOB_GUSBCFG_ULPIAUTORES_CLR_MSK 0xfffbffff
2255 /* The reset value of the ALT_USB_GLOB_GUSBCFG_ULPIAUTORES register field. */
2256 #define ALT_USB_GLOB_GUSBCFG_ULPIAUTORES_RESET 0x0
2257 /* Extracts the ALT_USB_GLOB_GUSBCFG_ULPIAUTORES field value from a register. */
2258 #define ALT_USB_GLOB_GUSBCFG_ULPIAUTORES_GET(value) (((value) & 0x00040000) >> 18)
2259 /* Produces a ALT_USB_GLOB_GUSBCFG_ULPIAUTORES register field value suitable for setting the register. */
2260 #define ALT_USB_GLOB_GUSBCFG_ULPIAUTORES_SET(value) (((value) << 18) & 0x00040000)
2261 
2262 /*
2263  * Field : ULPI Clock SuspendM - ulpiclksusm
2264  *
2265  * Mode:Host and Device. This bit sets the ClockSuspendM bit in the Interface
2266  * Control register on the ULPI PHY. This bit applies only in serial or carkit
2267  * modes.
2268  *
2269  * Field Enumeration Values:
2270  *
2271  * Enum | Value | Description
2272  * :---------------------------------------------|:------|:----------------------------------------------
2273  * ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM_E_PWDCLK | 0x0 | PHY powers down internal clock during suspend
2274  * ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM_E_NONPWDCLK | 0x1 | PHY does not power down internal clock
2275  *
2276  * Field Access Macros:
2277  *
2278  */
2279 /*
2280  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM
2281  *
2282  * PHY powers down internal clock during suspend
2283  */
2284 #define ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM_E_PWDCLK 0x0
2285 /*
2286  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM
2287  *
2288  * PHY does not power down internal clock
2289  */
2290 #define ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM_E_NONPWDCLK 0x1
2291 
2292 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM register field. */
2293 #define ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM_LSB 19
2294 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM register field. */
2295 #define ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM_MSB 19
2296 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM register field. */
2297 #define ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM_WIDTH 1
2298 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM register field value. */
2299 #define ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM_SET_MSK 0x00080000
2300 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM register field value. */
2301 #define ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM_CLR_MSK 0xfff7ffff
2302 /* The reset value of the ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM register field. */
2303 #define ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM_RESET 0x0
2304 /* Extracts the ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM field value from a register. */
2305 #define ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM_GET(value) (((value) & 0x00080000) >> 19)
2306 /* Produces a ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM register field value suitable for setting the register. */
2307 #define ALT_USB_GLOB_GUSBCFG_ULPICLKSUSM_SET(value) (((value) << 19) & 0x00080000)
2308 
2309 /*
2310  * Field : ULPI External VBUS Drive - ulpiextvbusdrv
2311  *
2312  * Mode:Host only. This bit selects between internal or external supply to drive 5V
2313  * on VBUS, in ULPI PHY.
2314  *
2315  * Field Enumeration Values:
2316  *
2317  * Enum | Value | Description
2318  * :---------------------------------------------|:------|:-------------------------------------------
2319  * ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV_E_INTERN | 0x0 | PHY drives VBUS using internal charge pump
2320  * ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV_E_EXTERN | 0x1 | PHY drives VBUS using external supply
2321  *
2322  * Field Access Macros:
2323  *
2324  */
2325 /*
2326  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV
2327  *
2328  * PHY drives VBUS using internal charge pump
2329  */
2330 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV_E_INTERN 0x0
2331 /*
2332  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV
2333  *
2334  * PHY drives VBUS using external supply
2335  */
2336 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV_E_EXTERN 0x1
2337 
2338 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV register field. */
2339 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV_LSB 20
2340 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV register field. */
2341 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV_MSB 20
2342 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV register field. */
2343 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV_WIDTH 1
2344 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV register field value. */
2345 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV_SET_MSK 0x00100000
2346 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV register field value. */
2347 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV_CLR_MSK 0xffefffff
2348 /* The reset value of the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV register field. */
2349 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV_RESET 0x0
2350 /* Extracts the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV field value from a register. */
2351 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV_GET(value) (((value) & 0x00100000) >> 20)
2352 /* Produces a ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV register field value suitable for setting the register. */
2353 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSDRV_SET(value) (((value) << 20) & 0x00100000)
2354 
2355 /*
2356  * Field : ULPI External VBUS Indicato - ulpiextvbusindicator
2357  *
2358  * Mode:Host only. This bit indicates to the ULPI PHY to use an external VBUS
2359  * overcurrent indicator.
2360  *
2361  * Field Enumeration Values:
2362  *
2363  * Enum | Value | Description
2364  * :---------------------------------------------------|:------|:----------------------------------------
2365  * ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR_E_INTERN | 0x0 | PHY uses internal VBUS valid comparator
2366  * ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR_E_EXTERN | 0x1 | PHY uses external VBUS valid comparator
2367  *
2368  * Field Access Macros:
2369  *
2370  */
2371 /*
2372  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR
2373  *
2374  * PHY uses internal VBUS valid comparator
2375  */
2376 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR_E_INTERN 0x0
2377 /*
2378  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR
2379  *
2380  * PHY uses external VBUS valid comparator
2381  */
2382 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR_E_EXTERN 0x1
2383 
2384 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR register field. */
2385 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR_LSB 21
2386 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR register field. */
2387 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR_MSB 21
2388 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR register field. */
2389 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR_WIDTH 1
2390 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR register field value. */
2391 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR_SET_MSK 0x00200000
2392 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR register field value. */
2393 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR_CLR_MSK 0xffdfffff
2394 /* The reset value of the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR register field. */
2395 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR_RESET 0x0
2396 /* Extracts the ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR field value from a register. */
2397 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR_GET(value) (((value) & 0x00200000) >> 21)
2398 /* Produces a ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR register field value suitable for setting the register. */
2399 #define ALT_USB_GLOB_GUSBCFG_ULPIEXTVBUSINDICATOR_SET(value) (((value) << 21) & 0x00200000)
2400 
2401 /*
2402  * Field : TermSel DLine Pulsing Selection - termseldlpulse
2403  *
2404  * Mode:Device only. This bit selects utmi_termselect to drive data line pulse
2405  * during SRP.
2406  *
2407  * Field Enumeration Values:
2408  *
2409  * Enum | Value | Description
2410  * :----------------------------------------------|:------|:-------------------------------------
2411  * ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE_E_TXVALID | 0x0 | Data line pulsing using utmi_txvalid
2412  * ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE_E_TERMSEL | 0x1 | Data line pulsing using utmi_termsel
2413  *
2414  * Field Access Macros:
2415  *
2416  */
2417 /*
2418  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE
2419  *
2420  * Data line pulsing using utmi_txvalid
2421  */
2422 #define ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE_E_TXVALID 0x0
2423 /*
2424  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE
2425  *
2426  * Data line pulsing using utmi_termsel
2427  */
2428 #define ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE_E_TERMSEL 0x1
2429 
2430 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE register field. */
2431 #define ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE_LSB 22
2432 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE register field. */
2433 #define ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE_MSB 22
2434 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE register field. */
2435 #define ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE_WIDTH 1
2436 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE register field value. */
2437 #define ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE_SET_MSK 0x00400000
2438 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE register field value. */
2439 #define ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE_CLR_MSK 0xffbfffff
2440 /* The reset value of the ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE register field. */
2441 #define ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE_RESET 0x0
2442 /* Extracts the ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE field value from a register. */
2443 #define ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE_GET(value) (((value) & 0x00400000) >> 22)
2444 /* Produces a ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE register field value suitable for setting the register. */
2445 #define ALT_USB_GLOB_GUSBCFG_TERMSELDLPULSE_SET(value) (((value) << 22) & 0x00400000)
2446 
2447 /*
2448  * Field : Indicator Complement - complement
2449  *
2450  * Mode:Host only. Controls the PHY to invert the ExternalVbusIndicator
2451  * inputsignal, generating the ComplementOutput. Please refer to the ULPI Spec for
2452  * more detail.
2453  *
2454  * Field Enumeration Values:
2455  *
2456  * Enum | Value | Description
2457  * :--------------------------------------------|:------|:-------------------------------------------------
2458  * ALT_USB_GLOB_GUSBCFG_COMPLEMENT_E_NONINVERT | 0x0 | PHY does not invert ExternalVbusIndicator signal
2459  * ALT_USB_GLOB_GUSBCFG_COMPLEMENT_E_INVERT | 0x1 | PHY does invert ExternalVbusIndicator signal
2460  *
2461  * Field Access Macros:
2462  *
2463  */
2464 /*
2465  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_COMPLEMENT
2466  *
2467  * PHY does not invert ExternalVbusIndicator signal
2468  */
2469 #define ALT_USB_GLOB_GUSBCFG_COMPLEMENT_E_NONINVERT 0x0
2470 /*
2471  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_COMPLEMENT
2472  *
2473  * PHY does invert ExternalVbusIndicator signal
2474  */
2475 #define ALT_USB_GLOB_GUSBCFG_COMPLEMENT_E_INVERT 0x1
2476 
2477 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_COMPLEMENT register field. */
2478 #define ALT_USB_GLOB_GUSBCFG_COMPLEMENT_LSB 23
2479 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_COMPLEMENT register field. */
2480 #define ALT_USB_GLOB_GUSBCFG_COMPLEMENT_MSB 23
2481 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_COMPLEMENT register field. */
2482 #define ALT_USB_GLOB_GUSBCFG_COMPLEMENT_WIDTH 1
2483 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_COMPLEMENT register field value. */
2484 #define ALT_USB_GLOB_GUSBCFG_COMPLEMENT_SET_MSK 0x00800000
2485 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_COMPLEMENT register field value. */
2486 #define ALT_USB_GLOB_GUSBCFG_COMPLEMENT_CLR_MSK 0xff7fffff
2487 /* The reset value of the ALT_USB_GLOB_GUSBCFG_COMPLEMENT register field. */
2488 #define ALT_USB_GLOB_GUSBCFG_COMPLEMENT_RESET 0x0
2489 /* Extracts the ALT_USB_GLOB_GUSBCFG_COMPLEMENT field value from a register. */
2490 #define ALT_USB_GLOB_GUSBCFG_COMPLEMENT_GET(value) (((value) & 0x00800000) >> 23)
2491 /* Produces a ALT_USB_GLOB_GUSBCFG_COMPLEMENT register field value suitable for setting the register. */
2492 #define ALT_USB_GLOB_GUSBCFG_COMPLEMENT_SET(value) (((value) << 23) & 0x00800000)
2493 
2494 /*
2495  * Field : Indicator Pass Throug - indicator
2496  *
2497  * Mode:Host only. Controls wether the Complement Output is qualified with the
2498  * Internal Vbus Valid comparator before being used in the Vbus State in the RX
2499  * CMD.
2500  *
2501  * Field Enumeration Values:
2502  *
2503  * Enum | Value | Description
2504  * :----------------------------------------------|:------|:------------------------------------------------
2505  * ALT_USB_GLOB_GUSBCFG_INDICATOR_E_QUALIFIED | 0x0 | Complement Output signal is qualified with the
2506  * : | | Internal VbusValid comparator
2507  * ALT_USB_GLOB_GUSBCFG_INDICATOR_E_NONQUALIFIED | 0x1 | Complement Output signal is not qualified with
2508  * : | | the Internal VbusValid comparator
2509  *
2510  * Field Access Macros:
2511  *
2512  */
2513 /*
2514  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_INDICATOR
2515  *
2516  * Complement Output signal is qualified with the Internal VbusValid comparator
2517  */
2518 #define ALT_USB_GLOB_GUSBCFG_INDICATOR_E_QUALIFIED 0x0
2519 /*
2520  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_INDICATOR
2521  *
2522  * Complement Output signal is not qualified with the Internal VbusValid
2523  * comparator
2524  */
2525 #define ALT_USB_GLOB_GUSBCFG_INDICATOR_E_NONQUALIFIED 0x1
2526 
2527 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_INDICATOR register field. */
2528 #define ALT_USB_GLOB_GUSBCFG_INDICATOR_LSB 24
2529 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_INDICATOR register field. */
2530 #define ALT_USB_GLOB_GUSBCFG_INDICATOR_MSB 24
2531 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_INDICATOR register field. */
2532 #define ALT_USB_GLOB_GUSBCFG_INDICATOR_WIDTH 1
2533 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_INDICATOR register field value. */
2534 #define ALT_USB_GLOB_GUSBCFG_INDICATOR_SET_MSK 0x01000000
2535 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_INDICATOR register field value. */
2536 #define ALT_USB_GLOB_GUSBCFG_INDICATOR_CLR_MSK 0xfeffffff
2537 /* The reset value of the ALT_USB_GLOB_GUSBCFG_INDICATOR register field. */
2538 #define ALT_USB_GLOB_GUSBCFG_INDICATOR_RESET 0x0
2539 /* Extracts the ALT_USB_GLOB_GUSBCFG_INDICATOR field value from a register. */
2540 #define ALT_USB_GLOB_GUSBCFG_INDICATOR_GET(value) (((value) & 0x01000000) >> 24)
2541 /* Produces a ALT_USB_GLOB_GUSBCFG_INDICATOR register field value suitable for setting the register. */
2542 #define ALT_USB_GLOB_GUSBCFG_INDICATOR_SET(value) (((value) << 24) & 0x01000000)
2543 
2544 /*
2545  * Field : ULPI Interface Protect Disable - ulpi
2546  *
2547  * Mode:Host only. Controls circuitry built into the PHY for protecting the ULPI
2548  * interface when the link tri-states STP and data. Any pull-ups or pull-downs
2549  * employed by this feature can be disabled.
2550  *
2551  * Field Enumeration Values:
2552  *
2553  * Enum | Value | Description
2554  * :---------------------------------|:------|:---------------------------------------
2555  * ALT_USB_GLOB_GUSBCFG_ULPI_E_END | 0x0 | Enables the interface protect circuit
2556  * ALT_USB_GLOB_GUSBCFG_ULPI_E_DISD | 0x1 | Disables the interface protect circuit
2557  *
2558  * Field Access Macros:
2559  *
2560  */
2561 /*
2562  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_ULPI
2563  *
2564  * Enables the interface protect circuit
2565  */
2566 #define ALT_USB_GLOB_GUSBCFG_ULPI_E_END 0x0
2567 /*
2568  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_ULPI
2569  *
2570  * Disables the interface protect circuit
2571  */
2572 #define ALT_USB_GLOB_GUSBCFG_ULPI_E_DISD 0x1
2573 
2574 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_ULPI register field. */
2575 #define ALT_USB_GLOB_GUSBCFG_ULPI_LSB 25
2576 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_ULPI register field. */
2577 #define ALT_USB_GLOB_GUSBCFG_ULPI_MSB 25
2578 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_ULPI register field. */
2579 #define ALT_USB_GLOB_GUSBCFG_ULPI_WIDTH 1
2580 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_ULPI register field value. */
2581 #define ALT_USB_GLOB_GUSBCFG_ULPI_SET_MSK 0x02000000
2582 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_ULPI register field value. */
2583 #define ALT_USB_GLOB_GUSBCFG_ULPI_CLR_MSK 0xfdffffff
2584 /* The reset value of the ALT_USB_GLOB_GUSBCFG_ULPI register field. */
2585 #define ALT_USB_GLOB_GUSBCFG_ULPI_RESET 0x0
2586 /* Extracts the ALT_USB_GLOB_GUSBCFG_ULPI field value from a register. */
2587 #define ALT_USB_GLOB_GUSBCFG_ULPI_GET(value) (((value) & 0x02000000) >> 25)
2588 /* Produces a ALT_USB_GLOB_GUSBCFG_ULPI register field value suitable for setting the register. */
2589 #define ALT_USB_GLOB_GUSBCFG_ULPI_SET(value) (((value) << 25) & 0x02000000)
2590 
2591 /*
2592  * Field : Tx End Delay - txenddelay
2593  *
2594  * Mode: Device only. Set to non UTMI+.
2595  *
2596  * Field Enumeration Values:
2597  *
2598  * Enum | Value | Description
2599  * :---------------------------------------|:------|:------------
2600  * ALT_USB_GLOB_GUSBCFG_TXENDDELAY_E_DISD | 0x0 | Normal Mode
2601  *
2602  * Field Access Macros:
2603  *
2604  */
2605 /*
2606  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_TXENDDELAY
2607  *
2608  * Normal Mode
2609  */
2610 #define ALT_USB_GLOB_GUSBCFG_TXENDDELAY_E_DISD 0x0
2611 
2612 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_TXENDDELAY register field. */
2613 #define ALT_USB_GLOB_GUSBCFG_TXENDDELAY_LSB 28
2614 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_TXENDDELAY register field. */
2615 #define ALT_USB_GLOB_GUSBCFG_TXENDDELAY_MSB 28
2616 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_TXENDDELAY register field. */
2617 #define ALT_USB_GLOB_GUSBCFG_TXENDDELAY_WIDTH 1
2618 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_TXENDDELAY register field value. */
2619 #define ALT_USB_GLOB_GUSBCFG_TXENDDELAY_SET_MSK 0x10000000
2620 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_TXENDDELAY register field value. */
2621 #define ALT_USB_GLOB_GUSBCFG_TXENDDELAY_CLR_MSK 0xefffffff
2622 /* The reset value of the ALT_USB_GLOB_GUSBCFG_TXENDDELAY register field. */
2623 #define ALT_USB_GLOB_GUSBCFG_TXENDDELAY_RESET 0x0
2624 /* Extracts the ALT_USB_GLOB_GUSBCFG_TXENDDELAY field value from a register. */
2625 #define ALT_USB_GLOB_GUSBCFG_TXENDDELAY_GET(value) (((value) & 0x10000000) >> 28)
2626 /* Produces a ALT_USB_GLOB_GUSBCFG_TXENDDELAY register field value suitable for setting the register. */
2627 #define ALT_USB_GLOB_GUSBCFG_TXENDDELAY_SET(value) (((value) << 28) & 0x10000000)
2628 
2629 /*
2630  * Field : Force Host Mode. - forcehstmode
2631  *
2632  * Mode:Host and device. Writing a 1 to this bit forces the core to host mode After
2633  * setting the force bit, the application must wait at least 25 ms before the
2634  * change to take effect. When the simulation is in scale down mode, waiting for
2635  * 500 micro-sec is sufficient.
2636  *
2637  * Field Enumeration Values:
2638  *
2639  * Enum | Value | Description
2640  * :----------------------------------------|:------|:----------------
2641  * ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD_E_DISD | 0x0 | Normal Mode
2642  * ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD_E_END | 0x1 | Force Host Mode
2643  *
2644  * Field Access Macros:
2645  *
2646  */
2647 /*
2648  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD
2649  *
2650  * Normal Mode
2651  */
2652 #define ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD_E_DISD 0x0
2653 /*
2654  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD
2655  *
2656  * Force Host Mode
2657  */
2658 #define ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD_E_END 0x1
2659 
2660 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD register field. */
2661 #define ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD_LSB 29
2662 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD register field. */
2663 #define ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD_MSB 29
2664 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD register field. */
2665 #define ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD_WIDTH 1
2666 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD register field value. */
2667 #define ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD_SET_MSK 0x20000000
2668 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD register field value. */
2669 #define ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD_CLR_MSK 0xdfffffff
2670 /* The reset value of the ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD register field. */
2671 #define ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD_RESET 0x0
2672 /* Extracts the ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD field value from a register. */
2673 #define ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD_GET(value) (((value) & 0x20000000) >> 29)
2674 /* Produces a ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD register field value suitable for setting the register. */
2675 #define ALT_USB_GLOB_GUSBCFG_FORCEHSTMOD_SET(value) (((value) << 29) & 0x20000000)
2676 
2677 /*
2678  * Field : Force Device Mode - forcedevmode
2679  *
2680  * Mode:Host and device. Writing a 1 to this bit forces the core to device mode.
2681  * After setting the force bit, the application must wait at least 25 ms before the
2682  * change to take effect. When the simulation is in scale down mode, waiting for
2683  * 500 micro-sec is sufficient.
2684  *
2685  * Field Enumeration Values:
2686  *
2687  * Enum | Value | Description
2688  * :----------------------------------------|:------|:------------------
2689  * ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD_E_DISD | 0x0 | Normal Mode
2690  * ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD_E_END | 0x1 | Force Device Mode
2691  *
2692  * Field Access Macros:
2693  *
2694  */
2695 /*
2696  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD
2697  *
2698  * Normal Mode
2699  */
2700 #define ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD_E_DISD 0x0
2701 /*
2702  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD
2703  *
2704  * Force Device Mode
2705  */
2706 #define ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD_E_END 0x1
2707 
2708 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD register field. */
2709 #define ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD_LSB 30
2710 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD register field. */
2711 #define ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD_MSB 30
2712 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD register field. */
2713 #define ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD_WIDTH 1
2714 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD register field value. */
2715 #define ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD_SET_MSK 0x40000000
2716 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD register field value. */
2717 #define ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD_CLR_MSK 0xbfffffff
2718 /* The reset value of the ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD register field. */
2719 #define ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD_RESET 0x0
2720 /* Extracts the ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD field value from a register. */
2721 #define ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD_GET(value) (((value) & 0x40000000) >> 30)
2722 /* Produces a ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD register field value suitable for setting the register. */
2723 #define ALT_USB_GLOB_GUSBCFG_FORCEDEVMOD_SET(value) (((value) << 30) & 0x40000000)
2724 
2725 /*
2726  * Field : Corrupt Tx packet - corrupttxpkt
2727  *
2728  * Mode: Host and device. This bit is for debug purposes only. Never Set this bit
2729  * to 1. The application should always write 0 to this bit.
2730  *
2731  * Field Enumeration Values:
2732  *
2733  * Enum | Value | Description
2734  * :------------------------------------------|:------|:------------
2735  * ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT_E_NODBG | 0x0 | Normal Mode
2736  * ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT_E_DBG | 0x1 | Debug Mode
2737  *
2738  * Field Access Macros:
2739  *
2740  */
2741 /*
2742  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT
2743  *
2744  * Normal Mode
2745  */
2746 #define ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT_E_NODBG 0x0
2747 /*
2748  * Enumerated value for register field ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT
2749  *
2750  * Debug Mode
2751  */
2752 #define ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT_E_DBG 0x1
2753 
2754 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT register field. */
2755 #define ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT_LSB 31
2756 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT register field. */
2757 #define ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT_MSB 31
2758 /* The width in bits of the ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT register field. */
2759 #define ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT_WIDTH 1
2760 /* The mask used to set the ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT register field value. */
2761 #define ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT_SET_MSK 0x80000000
2762 /* The mask used to clear the ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT register field value. */
2763 #define ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT_CLR_MSK 0x7fffffff
2764 /* The reset value of the ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT register field. */
2765 #define ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT_RESET 0x0
2766 /* Extracts the ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT field value from a register. */
2767 #define ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT_GET(value) (((value) & 0x80000000) >> 31)
2768 /* Produces a ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT register field value suitable for setting the register. */
2769 #define ALT_USB_GLOB_GUSBCFG_CORRUPTTXPKT_SET(value) (((value) << 31) & 0x80000000)
2770 
2771 #ifndef __ASSEMBLY__
2772 /*
2773  * WARNING: The C register and register group struct declarations are provided for
2774  * convenience and illustrative purposes. They should, however, be used with
2775  * caution as the C language standard provides no guarantees about the alignment or
2776  * atomicity of device memory accesses. The recommended practice for writing
2777  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
2778  * alt_write_word() functions.
2779  *
2780  * The struct declaration for register ALT_USB_GLOB_GUSBCFG.
2781  */
2782 struct ALT_USB_GLOB_GUSBCFG_s
2783 {
2784  uint32_t toutcal : 3; /* HS FS Timeout Calibration */
2785  const uint32_t phyif : 1; /* PHY Interfac */
2786  const uint32_t ulpi_utmi_sel : 1; /* ULPI Select */
2787  const uint32_t fsintf : 1; /* Full-Speed Serial Interface Select */
2788  const uint32_t physel : 1; /* USB 2.0 High-Speed PHY */
2789  uint32_t ddrsel : 1; /* ULPI DDR Select */
2790  uint32_t srpcap : 1; /* SRP-Capable */
2791  uint32_t hnpcap : 1; /* HNP-Capable */
2792  uint32_t usbtrdtim : 4; /* USB Turnaround Time */
2793  uint32_t : 4; /* *UNDEFINED* */
2794  uint32_t ulpiautores : 1; /* ULPI Auto Resume */
2795  uint32_t ulpiclksusm : 1; /* ULPI Clock SuspendM */
2796  uint32_t ulpiextvbusdrv : 1; /* ULPI External VBUS Drive */
2797  uint32_t ulpiextvbusindicator : 1; /* ULPI External VBUS Indicato */
2798  uint32_t termseldlpulse : 1; /* TermSel DLine Pulsing Selection */
2799  uint32_t complement : 1; /* Indicator Complement */
2800  uint32_t indicator : 1; /* Indicator Pass Throug */
2801  uint32_t ulpi : 1; /* ULPI Interface Protect Disable */
2802  uint32_t : 2; /* *UNDEFINED* */
2803  uint32_t txenddelay : 1; /* Tx End Delay */
2804  uint32_t forcehstmode : 1; /* Force Host Mode. */
2805  uint32_t forcedevmode : 1; /* Force Device Mode */
2806  uint32_t corrupttxpkt : 1; /* Corrupt Tx packet */
2807 };
2808 
2809 /* The typedef declaration for register ALT_USB_GLOB_GUSBCFG. */
2810 typedef volatile struct ALT_USB_GLOB_GUSBCFG_s ALT_USB_GLOB_GUSBCFG_t;
2811 #endif /* __ASSEMBLY__ */
2812 
2813 /* The byte offset of the ALT_USB_GLOB_GUSBCFG register from the beginning of the component. */
2814 #define ALT_USB_GLOB_GUSBCFG_OFST 0xc
2815 /* The address of the ALT_USB_GLOB_GUSBCFG register. */
2816 #define ALT_USB_GLOB_GUSBCFG_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GUSBCFG_OFST))
2817 
2818 /*
2819  * Register : Reset Register - grstctl
2820  *
2821  * The application uses this register to reset various hardware features inside the
2822  * core
2823  *
2824  * Register Layout
2825  *
2826  * Bits | Access | Reset | Description
2827  * :--------|:-------|:------|:-------------------------
2828  * [0] | R | 0x0 | Core Soft Reset
2829  * [1] | ??? | 0x0 | *UNDEFINED*
2830  * [2] | R | 0x0 | Host Frame Counter Reset
2831  * [3] | ??? | 0x0 | *UNDEFINED*
2832  * [4] | R | 0x0 | RxFIFO Flush
2833  * [5] | R | 0x0 | TxFIFO Flush
2834  * [10:6] | RW | 0x0 | TxFIFO Number
2835  * [29:11] | ??? | 0x0 | *UNDEFINED*
2836  * [30] | R | 0x0 | DMA Request Signal
2837  * [31] | R | 0x1 | AHB Master Idle
2838  *
2839  */
2840 /*
2841  * Field : Core Soft Reset - csftrst
2842  *
2843  * Mode:Host and Device. Resets the hclk and phy_clock domains as follows:Clears
2844  * the interrupts and all the CSR registers except the following register bits:
2845  *
2846  * * PCGCCTL.RstPdwnModule
2847  *
2848  * * PCGCCTL.GateHclk
2849  *
2850  * * PCGCCTL.PwrClmp
2851  *
2852  * * PCGCCTL.StopPPhyLPwrClkSelclk
2853  *
2854  * * GUSBCFG.PhyLPwrClkSel
2855  *
2856  * * GUSBCFG.DDRSel
2857  *
2858  * * GUSBCFG.PHYSel
2859  *
2860  * * GUSBCFG.FSIntf
2861  *
2862  * * GUSBCFG.ULPI_UTMI_Sel
2863  *
2864  * * GUSBCFG.PHYIf
2865  *
2866  * * HCFG.FSLSPclkSel
2867  *
2868  * * DCFG.DevSpd
2869  *
2870  * * GGPIO
2871  *
2872  * * GPWRDN
2873  *
2874  * * GADPCTL
2875  *
2876  * All module state machines (except the AHB Slave Unit) are reset to the IDLE
2877  * state, and all the transmit FIFOs and the receive FIFO are flushed. Any
2878  * transactions on the AHB Master are terminated as soonas possible, after
2879  * gracefully completing the last data phase of an AHB transfer. Any transactions
2880  * on the USB are terminated immediately. When Hibernation or ADP feature is
2881  * enabled, the PMU module is not reset by the Core Soft Reset.The application can
2882  * write to this bit any time it wants to reset the core. This is a self-clearing
2883  * bit and the core clears this bit after all the necessary logic is reset in the
2884  * core, which can take several clocks, depending on the current state of the core.
2885  * Once this bit is cleared software must wait at least 3 PHY clocks before doing
2886  * any access to the PHY domain (synchronization delay). Software must also must
2887  * check that bit 31 of this register is 1 (AHB Master is IDLE) before starting any
2888  * operation.Typically software reset is used during software development and also
2889  * when you dynamically change the PHY selection bits in the USB configuration
2890  * registers listed above. When you change the PHY, the corresponding clock for the
2891  * PHY is selected and used in the PHY domain. Once a new clock is selected, the
2892  * PHY domain has to be reset for proper operation.
2893  *
2894  * Field Enumeration Values:
2895  *
2896  * Enum | Value | Description
2897  * :--------------------------------------|:------|:----------------------------------
2898  * ALT_USB_GLOB_GRSTCTL_CSFTRST_E_NOTACT | 0x0 | No reset
2899  * ALT_USB_GLOB_GRSTCTL_CSFTRST_E_ACT | 0x1 | Resets hclk and phy_clock domains
2900  *
2901  * Field Access Macros:
2902  *
2903  */
2904 /*
2905  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_CSFTRST
2906  *
2907  * No reset
2908  */
2909 #define ALT_USB_GLOB_GRSTCTL_CSFTRST_E_NOTACT 0x0
2910 /*
2911  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_CSFTRST
2912  *
2913  * Resets hclk and phy_clock domains
2914  */
2915 #define ALT_USB_GLOB_GRSTCTL_CSFTRST_E_ACT 0x1
2916 
2917 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRSTCTL_CSFTRST register field. */
2918 #define ALT_USB_GLOB_GRSTCTL_CSFTRST_LSB 0
2919 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRSTCTL_CSFTRST register field. */
2920 #define ALT_USB_GLOB_GRSTCTL_CSFTRST_MSB 0
2921 /* The width in bits of the ALT_USB_GLOB_GRSTCTL_CSFTRST register field. */
2922 #define ALT_USB_GLOB_GRSTCTL_CSFTRST_WIDTH 1
2923 /* The mask used to set the ALT_USB_GLOB_GRSTCTL_CSFTRST register field value. */
2924 #define ALT_USB_GLOB_GRSTCTL_CSFTRST_SET_MSK 0x00000001
2925 /* The mask used to clear the ALT_USB_GLOB_GRSTCTL_CSFTRST register field value. */
2926 #define ALT_USB_GLOB_GRSTCTL_CSFTRST_CLR_MSK 0xfffffffe
2927 /* The reset value of the ALT_USB_GLOB_GRSTCTL_CSFTRST register field. */
2928 #define ALT_USB_GLOB_GRSTCTL_CSFTRST_RESET 0x0
2929 /* Extracts the ALT_USB_GLOB_GRSTCTL_CSFTRST field value from a register. */
2930 #define ALT_USB_GLOB_GRSTCTL_CSFTRST_GET(value) (((value) & 0x00000001) >> 0)
2931 /* Produces a ALT_USB_GLOB_GRSTCTL_CSFTRST register field value suitable for setting the register. */
2932 #define ALT_USB_GLOB_GRSTCTL_CSFTRST_SET(value) (((value) << 0) & 0x00000001)
2933 
2934 /*
2935  * Field : Host Frame Counter Reset - frmcntrrst
2936  *
2937  * Mode:Host only. The application writes this bit to reset the (micro)frame number
2938  * counter inside the core. When the (micro)frame counter is reset, the subsequent
2939  * SOF sent out by the core has a (micro)frame number of 0. When application writes
2940  * 1 to the bit, it might not be able to read back the value as it will get cleared
2941  * by the core in a few clock cycles.
2942  *
2943  * Field Enumeration Values:
2944  *
2945  * Enum | Value | Description
2946  * :-----------------------------------------|:------|:-------------------------
2947  * ALT_USB_GLOB_GRSTCTL_FRMCNTRRST_E_NOTACT | 0x0 | No reset
2948  * ALT_USB_GLOB_GRSTCTL_FRMCNTRRST_E_ACT | 0x1 | Host Frame Counter Reset
2949  *
2950  * Field Access Macros:
2951  *
2952  */
2953 /*
2954  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_FRMCNTRRST
2955  *
2956  * No reset
2957  */
2958 #define ALT_USB_GLOB_GRSTCTL_FRMCNTRRST_E_NOTACT 0x0
2959 /*
2960  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_FRMCNTRRST
2961  *
2962  * Host Frame Counter Reset
2963  */
2964 #define ALT_USB_GLOB_GRSTCTL_FRMCNTRRST_E_ACT 0x1
2965 
2966 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRSTCTL_FRMCNTRRST register field. */
2967 #define ALT_USB_GLOB_GRSTCTL_FRMCNTRRST_LSB 2
2968 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRSTCTL_FRMCNTRRST register field. */
2969 #define ALT_USB_GLOB_GRSTCTL_FRMCNTRRST_MSB 2
2970 /* The width in bits of the ALT_USB_GLOB_GRSTCTL_FRMCNTRRST register field. */
2971 #define ALT_USB_GLOB_GRSTCTL_FRMCNTRRST_WIDTH 1
2972 /* The mask used to set the ALT_USB_GLOB_GRSTCTL_FRMCNTRRST register field value. */
2973 #define ALT_USB_GLOB_GRSTCTL_FRMCNTRRST_SET_MSK 0x00000004
2974 /* The mask used to clear the ALT_USB_GLOB_GRSTCTL_FRMCNTRRST register field value. */
2975 #define ALT_USB_GLOB_GRSTCTL_FRMCNTRRST_CLR_MSK 0xfffffffb
2976 /* The reset value of the ALT_USB_GLOB_GRSTCTL_FRMCNTRRST register field. */
2977 #define ALT_USB_GLOB_GRSTCTL_FRMCNTRRST_RESET 0x0
2978 /* Extracts the ALT_USB_GLOB_GRSTCTL_FRMCNTRRST field value from a register. */
2979 #define ALT_USB_GLOB_GRSTCTL_FRMCNTRRST_GET(value) (((value) & 0x00000004) >> 2)
2980 /* Produces a ALT_USB_GLOB_GRSTCTL_FRMCNTRRST register field value suitable for setting the register. */
2981 #define ALT_USB_GLOB_GRSTCTL_FRMCNTRRST_SET(value) (((value) << 2) & 0x00000004)
2982 
2983 /*
2984  * Field : RxFIFO Flush - rxfflsh
2985  *
2986  * Mode:Host and Device. The application can flush the entire RxFIFO using this
2987  * bit, but must first ensure that the core is not in the middle of a transaction.
2988  * The application must only write to this bit after checking that the core is
2989  * neither reading from the RxFIFO nor writing to the RxFIFO. The application must
2990  * wait until the bit is cleared before performing any other operations. This bit
2991  * requires 8 clocks (slowest of PHY or AHB clock) to clear.
2992  *
2993  * Field Enumeration Values:
2994  *
2995  * Enum | Value | Description
2996  * :-------------------------------------|:------|:---------------------------
2997  * ALT_USB_GLOB_GRSTCTL_RXFFLSH_E_INACT | 0x0 | no flush the entire RxFIFO
2998  * ALT_USB_GLOB_GRSTCTL_RXFFLSH_E_ACT | 0x1 | flush the entire RxFIFO
2999  *
3000  * Field Access Macros:
3001  *
3002  */
3003 /*
3004  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_RXFFLSH
3005  *
3006  * no flush the entire RxFIFO
3007  */
3008 #define ALT_USB_GLOB_GRSTCTL_RXFFLSH_E_INACT 0x0
3009 /*
3010  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_RXFFLSH
3011  *
3012  * flush the entire RxFIFO
3013  */
3014 #define ALT_USB_GLOB_GRSTCTL_RXFFLSH_E_ACT 0x1
3015 
3016 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRSTCTL_RXFFLSH register field. */
3017 #define ALT_USB_GLOB_GRSTCTL_RXFFLSH_LSB 4
3018 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRSTCTL_RXFFLSH register field. */
3019 #define ALT_USB_GLOB_GRSTCTL_RXFFLSH_MSB 4
3020 /* The width in bits of the ALT_USB_GLOB_GRSTCTL_RXFFLSH register field. */
3021 #define ALT_USB_GLOB_GRSTCTL_RXFFLSH_WIDTH 1
3022 /* The mask used to set the ALT_USB_GLOB_GRSTCTL_RXFFLSH register field value. */
3023 #define ALT_USB_GLOB_GRSTCTL_RXFFLSH_SET_MSK 0x00000010
3024 /* The mask used to clear the ALT_USB_GLOB_GRSTCTL_RXFFLSH register field value. */
3025 #define ALT_USB_GLOB_GRSTCTL_RXFFLSH_CLR_MSK 0xffffffef
3026 /* The reset value of the ALT_USB_GLOB_GRSTCTL_RXFFLSH register field. */
3027 #define ALT_USB_GLOB_GRSTCTL_RXFFLSH_RESET 0x0
3028 /* Extracts the ALT_USB_GLOB_GRSTCTL_RXFFLSH field value from a register. */
3029 #define ALT_USB_GLOB_GRSTCTL_RXFFLSH_GET(value) (((value) & 0x00000010) >> 4)
3030 /* Produces a ALT_USB_GLOB_GRSTCTL_RXFFLSH register field value suitable for setting the register. */
3031 #define ALT_USB_GLOB_GRSTCTL_RXFFLSH_SET(value) (((value) << 4) & 0x00000010)
3032 
3033 /*
3034  * Field : TxFIFO Flush - txfflsh
3035  *
3036  * Mode:Host and Device. This bit selectively flushes a single or all transmit
3037  * FIFOs, but cannot do so If the core is in the midst of a transaction. The
3038  * application must write this bit only after checking that the core is neither
3039  * writing to the TxFIFO nor reading from the TxFIFO. Verify using these registers:
3040  * ReadNAK Effective Interrupt ensures the core is notreading from the FIFO
3041  * WriteGRSTCTL.AHBIdle ensures the core is not writinganything to the FIFO.
3042  * Flushing is normally recommended when FIFOs are reconfigured or when switching
3043  * between Shared FIFO and Dedicated Transmit FIFO operation. FIFO flushing is also
3044  * recommended during device endpoint disable. The application must wait until the
3045  * core clears this bit before performing any operations. This bit takes eight
3046  * clocks to clear, using the slower clock of phy_clk or hclk.
3047  *
3048  * Field Enumeration Values:
3049  *
3050  * Enum | Value | Description
3051  * :-------------------------------------|:------|:---------------------------------------------
3052  * ALT_USB_GLOB_GRSTCTL_TXFFLSH_E_INACT | 0x0 | No Flush
3053  * ALT_USB_GLOB_GRSTCTL_TXFFLSH_E_ACT | 0x1 | selectively flushes a single or all transmit
3054  * : | | FIFOs
3055  *
3056  * Field Access Macros:
3057  *
3058  */
3059 /*
3060  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_TXFFLSH
3061  *
3062  * No Flush
3063  */
3064 #define ALT_USB_GLOB_GRSTCTL_TXFFLSH_E_INACT 0x0
3065 /*
3066  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_TXFFLSH
3067  *
3068  * selectively flushes a single or all transmit FIFOs
3069  */
3070 #define ALT_USB_GLOB_GRSTCTL_TXFFLSH_E_ACT 0x1
3071 
3072 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRSTCTL_TXFFLSH register field. */
3073 #define ALT_USB_GLOB_GRSTCTL_TXFFLSH_LSB 5
3074 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRSTCTL_TXFFLSH register field. */
3075 #define ALT_USB_GLOB_GRSTCTL_TXFFLSH_MSB 5
3076 /* The width in bits of the ALT_USB_GLOB_GRSTCTL_TXFFLSH register field. */
3077 #define ALT_USB_GLOB_GRSTCTL_TXFFLSH_WIDTH 1
3078 /* The mask used to set the ALT_USB_GLOB_GRSTCTL_TXFFLSH register field value. */
3079 #define ALT_USB_GLOB_GRSTCTL_TXFFLSH_SET_MSK 0x00000020
3080 /* The mask used to clear the ALT_USB_GLOB_GRSTCTL_TXFFLSH register field value. */
3081 #define ALT_USB_GLOB_GRSTCTL_TXFFLSH_CLR_MSK 0xffffffdf
3082 /* The reset value of the ALT_USB_GLOB_GRSTCTL_TXFFLSH register field. */
3083 #define ALT_USB_GLOB_GRSTCTL_TXFFLSH_RESET 0x0
3084 /* Extracts the ALT_USB_GLOB_GRSTCTL_TXFFLSH field value from a register. */
3085 #define ALT_USB_GLOB_GRSTCTL_TXFFLSH_GET(value) (((value) & 0x00000020) >> 5)
3086 /* Produces a ALT_USB_GLOB_GRSTCTL_TXFFLSH register field value suitable for setting the register. */
3087 #define ALT_USB_GLOB_GRSTCTL_TXFFLSH_SET(value) (((value) << 5) & 0x00000020)
3088 
3089 /*
3090  * Field : TxFIFO Number - txfnum
3091  *
3092  * Mode:Host and Device. This is the FIFO number that must be flushed using the
3093  * TxFIFO Flush bit. This field must not be changed until the core clears the
3094  * TxFIFO Flush bit.
3095  *
3096  * Field Enumeration Values:
3097  *
3098  * Enum | Value | Description
3099  * :------------------------------------|:------|:-------------------------------------------------
3100  * ALT_USB_GLOB_GRSTCTL_TXFNUM_E_TXF0 | 0x0 | - Non-periodic TxFIFO flush in Host mode - Non-
3101  * : | | periodic TxFIFO flush in device mode when in
3102  * : | | shared FIFO operation
3103  * ALT_USB_GLOB_GRSTCTL_TXFNUM_E_TXF1 | 0x1 | - Periodic TxFIFO flush in Host mode - Periodic
3104  * : | | TxFIFO 1 flush in Device mode when in sharedFIFO
3105  * : | | operation
3106  * ALT_USB_GLOB_GRSTCTL_TXFNUM_E_TXF2 | 0x2 | - Periodic TxFIFO 2 flush in Device mode when in
3107  * : | | sharedFIFO operation- TXFIFO 2 flush in device
3108  * : | | mode when in dedicated FIFO mode
3109  * ALT_USB_GLOB_GRSTCTL_TXFNUM_E_TXF15 | 0xf | - Periodic TxFIFO 15 flush in Device mode when
3110  * : | | in shared FIFO operation - TXFIFO 15 flush in
3111  * : | | device mode when in dedicated FIFO mode
3112  * ALT_USB_GLOB_GRSTCTL_TXFNUM_E_TXF16 | 0x10 | Flush all the transmit FIFOs in device or host
3113  * : | | mode.
3114  *
3115  * Field Access Macros:
3116  *
3117  */
3118 /*
3119  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_TXFNUM
3120  *
3121  * * Non-periodic TxFIFO flush in Host mode
3122  *
3123  * * Non-periodic TxFIFO flush in device mode when in shared FIFO operation
3124  */
3125 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_E_TXF0 0x0
3126 /*
3127  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_TXFNUM
3128  *
3129  * * Periodic TxFIFO flush in Host mode
3130  *
3131  * * Periodic TxFIFO 1 flush in Device mode when in sharedFIFO operation
3132  */
3133 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_E_TXF1 0x1
3134 /*
3135  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_TXFNUM
3136  *
3137  * * Periodic TxFIFO 2 flush in Device mode when in sharedFIFO operation- TXFIFO 2
3138  * flush in device mode when in dedicated FIFO mode
3139  */
3140 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_E_TXF2 0x2
3141 /*
3142  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_TXFNUM
3143  *
3144  * * Periodic TxFIFO 15 flush in Device mode when in shared FIFO operation
3145  *
3146  * * TXFIFO 15 flush in device mode when in dedicated FIFO mode
3147  */
3148 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_E_TXF15 0xf
3149 /*
3150  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_TXFNUM
3151  *
3152  * Flush all the transmit FIFOs in device or host mode.
3153  */
3154 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_E_TXF16 0x10
3155 
3156 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRSTCTL_TXFNUM register field. */
3157 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_LSB 6
3158 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRSTCTL_TXFNUM register field. */
3159 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_MSB 10
3160 /* The width in bits of the ALT_USB_GLOB_GRSTCTL_TXFNUM register field. */
3161 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_WIDTH 5
3162 /* The mask used to set the ALT_USB_GLOB_GRSTCTL_TXFNUM register field value. */
3163 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_SET_MSK 0x000007c0
3164 /* The mask used to clear the ALT_USB_GLOB_GRSTCTL_TXFNUM register field value. */
3165 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_CLR_MSK 0xfffff83f
3166 /* The reset value of the ALT_USB_GLOB_GRSTCTL_TXFNUM register field. */
3167 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_RESET 0x0
3168 /* Extracts the ALT_USB_GLOB_GRSTCTL_TXFNUM field value from a register. */
3169 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_GET(value) (((value) & 0x000007c0) >> 6)
3170 /* Produces a ALT_USB_GLOB_GRSTCTL_TXFNUM register field value suitable for setting the register. */
3171 #define ALT_USB_GLOB_GRSTCTL_TXFNUM_SET(value) (((value) << 6) & 0x000007c0)
3172 
3173 /*
3174  * Field : DMA Request Signal - dmareq
3175  *
3176  * Mode:Host and Device. Indicates that the DMA request is in progress. Used for
3177  * debug.
3178  *
3179  * Field Enumeration Values:
3180  *
3181  * Enum | Value | Description
3182  * :------------------------------------|:------|:---------------------------
3183  * ALT_USB_GLOB_GRSTCTL_DMAREQ_E_INACT | 0x0 | No DMA request
3184  * ALT_USB_GLOB_GRSTCTL_DMAREQ_E_ACT | 0x1 | DMA request is in progress
3185  *
3186  * Field Access Macros:
3187  *
3188  */
3189 /*
3190  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_DMAREQ
3191  *
3192  * No DMA request
3193  */
3194 #define ALT_USB_GLOB_GRSTCTL_DMAREQ_E_INACT 0x0
3195 /*
3196  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_DMAREQ
3197  *
3198  * DMA request is in progress
3199  */
3200 #define ALT_USB_GLOB_GRSTCTL_DMAREQ_E_ACT 0x1
3201 
3202 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRSTCTL_DMAREQ register field. */
3203 #define ALT_USB_GLOB_GRSTCTL_DMAREQ_LSB 30
3204 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRSTCTL_DMAREQ register field. */
3205 #define ALT_USB_GLOB_GRSTCTL_DMAREQ_MSB 30
3206 /* The width in bits of the ALT_USB_GLOB_GRSTCTL_DMAREQ register field. */
3207 #define ALT_USB_GLOB_GRSTCTL_DMAREQ_WIDTH 1
3208 /* The mask used to set the ALT_USB_GLOB_GRSTCTL_DMAREQ register field value. */
3209 #define ALT_USB_GLOB_GRSTCTL_DMAREQ_SET_MSK 0x40000000
3210 /* The mask used to clear the ALT_USB_GLOB_GRSTCTL_DMAREQ register field value. */
3211 #define ALT_USB_GLOB_GRSTCTL_DMAREQ_CLR_MSK 0xbfffffff
3212 /* The reset value of the ALT_USB_GLOB_GRSTCTL_DMAREQ register field. */
3213 #define ALT_USB_GLOB_GRSTCTL_DMAREQ_RESET 0x0
3214 /* Extracts the ALT_USB_GLOB_GRSTCTL_DMAREQ field value from a register. */
3215 #define ALT_USB_GLOB_GRSTCTL_DMAREQ_GET(value) (((value) & 0x40000000) >> 30)
3216 /* Produces a ALT_USB_GLOB_GRSTCTL_DMAREQ register field value suitable for setting the register. */
3217 #define ALT_USB_GLOB_GRSTCTL_DMAREQ_SET(value) (((value) << 30) & 0x40000000)
3218 
3219 /*
3220  * Field : AHB Master Idle - ahbidle
3221  *
3222  * Mode:Host and Device. Indicates that the AHB Master State Machine is in the IDLE
3223  * condition.
3224  *
3225  * Field Enumeration Values:
3226  *
3227  * Enum | Value | Description
3228  * :-------------------------------------|:------|:----------------
3229  * ALT_USB_GLOB_GRSTCTL_AHBIDLE_E_INACT | 0x0 | Not Idle
3230  * ALT_USB_GLOB_GRSTCTL_AHBIDLE_E_ACT | 0x1 | AHB Master Idle
3231  *
3232  * Field Access Macros:
3233  *
3234  */
3235 /*
3236  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_AHBIDLE
3237  *
3238  * Not Idle
3239  */
3240 #define ALT_USB_GLOB_GRSTCTL_AHBIDLE_E_INACT 0x0
3241 /*
3242  * Enumerated value for register field ALT_USB_GLOB_GRSTCTL_AHBIDLE
3243  *
3244  * AHB Master Idle
3245  */
3246 #define ALT_USB_GLOB_GRSTCTL_AHBIDLE_E_ACT 0x1
3247 
3248 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRSTCTL_AHBIDLE register field. */
3249 #define ALT_USB_GLOB_GRSTCTL_AHBIDLE_LSB 31
3250 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRSTCTL_AHBIDLE register field. */
3251 #define ALT_USB_GLOB_GRSTCTL_AHBIDLE_MSB 31
3252 /* The width in bits of the ALT_USB_GLOB_GRSTCTL_AHBIDLE register field. */
3253 #define ALT_USB_GLOB_GRSTCTL_AHBIDLE_WIDTH 1
3254 /* The mask used to set the ALT_USB_GLOB_GRSTCTL_AHBIDLE register field value. */
3255 #define ALT_USB_GLOB_GRSTCTL_AHBIDLE_SET_MSK 0x80000000
3256 /* The mask used to clear the ALT_USB_GLOB_GRSTCTL_AHBIDLE register field value. */
3257 #define ALT_USB_GLOB_GRSTCTL_AHBIDLE_CLR_MSK 0x7fffffff
3258 /* The reset value of the ALT_USB_GLOB_GRSTCTL_AHBIDLE register field. */
3259 #define ALT_USB_GLOB_GRSTCTL_AHBIDLE_RESET 0x1
3260 /* Extracts the ALT_USB_GLOB_GRSTCTL_AHBIDLE field value from a register. */
3261 #define ALT_USB_GLOB_GRSTCTL_AHBIDLE_GET(value) (((value) & 0x80000000) >> 31)
3262 /* Produces a ALT_USB_GLOB_GRSTCTL_AHBIDLE register field value suitable for setting the register. */
3263 #define ALT_USB_GLOB_GRSTCTL_AHBIDLE_SET(value) (((value) << 31) & 0x80000000)
3264 
3265 #ifndef __ASSEMBLY__
3266 /*
3267  * WARNING: The C register and register group struct declarations are provided for
3268  * convenience and illustrative purposes. They should, however, be used with
3269  * caution as the C language standard provides no guarantees about the alignment or
3270  * atomicity of device memory accesses. The recommended practice for writing
3271  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
3272  * alt_write_word() functions.
3273  *
3274  * The struct declaration for register ALT_USB_GLOB_GRSTCTL.
3275  */
3276 struct ALT_USB_GLOB_GRSTCTL_s
3277 {
3278  const uint32_t csftrst : 1; /* Core Soft Reset */
3279  uint32_t : 1; /* *UNDEFINED* */
3280  const uint32_t frmcntrrst : 1; /* Host Frame Counter Reset */
3281  uint32_t : 1; /* *UNDEFINED* */
3282  const uint32_t rxfflsh : 1; /* RxFIFO Flush */
3283  const uint32_t txfflsh : 1; /* TxFIFO Flush */
3284  uint32_t txfnum : 5; /* TxFIFO Number */
3285  uint32_t : 19; /* *UNDEFINED* */
3286  const uint32_t dmareq : 1; /* DMA Request Signal */
3287  const uint32_t ahbidle : 1; /* AHB Master Idle */
3288 };
3289 
3290 /* The typedef declaration for register ALT_USB_GLOB_GRSTCTL. */
3291 typedef volatile struct ALT_USB_GLOB_GRSTCTL_s ALT_USB_GLOB_GRSTCTL_t;
3292 #endif /* __ASSEMBLY__ */
3293 
3294 /* The byte offset of the ALT_USB_GLOB_GRSTCTL register from the beginning of the component. */
3295 #define ALT_USB_GLOB_GRSTCTL_OFST 0x10
3296 /* The address of the ALT_USB_GLOB_GRSTCTL register. */
3297 #define ALT_USB_GLOB_GRSTCTL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GRSTCTL_OFST))
3298 
3299 /*
3300  * Register : Interrupt Register - gintsts
3301  *
3302  * This register interrupts the application for system-level events in the current
3303  * mode (Device mode or Host mode). Some of the bits in this register are valid
3304  * only in Host mode, while others are valid in Device mode only. This register
3305  * also indicates the current mode. To clear the interrupt status bits of type
3306  * R_SS_WC, the application must write 1 into the bit. The FIFO status interrupts
3307  * are read only; once software reads from or writes to the FIFO while servicing
3308  * these interrupts, FIFO interrupt conditions are cleared automatically. The
3309  * application must clear the GINTSTS register at initialization before unmasking
3310  * the interrupt bit to avoid any interrupts generated prior to initialization.
3311  *
3312  * Register Layout
3313  *
3314  * Bits | Access | Reset | Description
3315  * :--------|:-------|:------|:-----------------------------------------------
3316  * [0] | R | 0x0 | Current Mode of Operation
3317  * [1] | R | 0x0 | Mode Mismatch Interrupt
3318  * [2] | R | 0x0 | OTG Interrupt
3319  * [3] | R | 0x0 | Start of Frame
3320  * [4] | R | 0x0 | RxFIFO Non-Empty
3321  * [5] | ??? | 0x0 | *UNDEFINED*
3322  * [6] | R | 0x0 | Global IN Non-periodic NAK Effective
3323  * [7] | R | 0x0 | Global OUT NAK Effective
3324  * [9:8] | ??? | 0x0 | *UNDEFINED*
3325  * [10] | R | 0x0 | Early Suspend
3326  * [11] | R | 0x0 | USB Suspend
3327  * [12] | R | 0x0 | USB Reset
3328  * [13] | R | 0x0 | Enumeration Done
3329  * [14] | R | 0x0 | Isochronous OUT Packet Dropped Interrupt
3330  * [16:15] | ??? | 0x0 | *UNDEFINED*
3331  * [17] | R | 0x0 | Endpoint Mismatch Interrupt
3332  * [18] | R | 0x0 | IN Endpoints Interrupt
3333  * [19] | R | 0x0 | OUT Endpoints Interrupt
3334  * [20] | R | 0x0 | Incomplete Isochronous IN Transfer
3335  * [21] | R | 0x0 | Incomplete Periodic Transfer
3336  * [22] | R | 0x0 | Data Fetch Suspended
3337  * [23] | R | 0x0 | Reset detected Interrupt
3338  * [24] | R | 0x0 | Host Port Interrupt
3339  * [25] | R | 0x0 | Host Channels Interrupt
3340  * [26] | R | 0x1 | Periodic TxFIFO Empty
3341  * [27] | ??? | 0x0 | *UNDEFINED*
3342  * [28] | R | 0x1 | Connector ID Status Change
3343  * [29] | R | 0x0 | Disconnect Detected Interrupt
3344  * [30] | R | 0x0 | Session Request New Session Detected Interrupt
3345  * [31] | R | 0x0 | Resume Remote Wakeup Detected Interrupt
3346  *
3347  */
3348 /*
3349  * Field : Current Mode of Operation - curmod
3350  *
3351  * Mode: Host and Device. Indicates the current mode.
3352  *
3353  * Field Enumeration Values:
3354  *
3355  * Enum | Value | Description
3356  * :-------------------------------------|:------|:------------
3357  * ALT_USB_GLOB_GINTSTS_CURMOD_E_DEVICE | 0x0 | Device mode
3358  * ALT_USB_GLOB_GINTSTS_CURMOD_E_HOST | 0x1 | Host mode
3359  *
3360  * Field Access Macros:
3361  *
3362  */
3363 /*
3364  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_CURMOD
3365  *
3366  * Device mode
3367  */
3368 #define ALT_USB_GLOB_GINTSTS_CURMOD_E_DEVICE 0x0
3369 /*
3370  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_CURMOD
3371  *
3372  * Host mode
3373  */
3374 #define ALT_USB_GLOB_GINTSTS_CURMOD_E_HOST 0x1
3375 
3376 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_CURMOD register field. */
3377 #define ALT_USB_GLOB_GINTSTS_CURMOD_LSB 0
3378 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_CURMOD register field. */
3379 #define ALT_USB_GLOB_GINTSTS_CURMOD_MSB 0
3380 /* The width in bits of the ALT_USB_GLOB_GINTSTS_CURMOD register field. */
3381 #define ALT_USB_GLOB_GINTSTS_CURMOD_WIDTH 1
3382 /* The mask used to set the ALT_USB_GLOB_GINTSTS_CURMOD register field value. */
3383 #define ALT_USB_GLOB_GINTSTS_CURMOD_SET_MSK 0x00000001
3384 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_CURMOD register field value. */
3385 #define ALT_USB_GLOB_GINTSTS_CURMOD_CLR_MSK 0xfffffffe
3386 /* The reset value of the ALT_USB_GLOB_GINTSTS_CURMOD register field. */
3387 #define ALT_USB_GLOB_GINTSTS_CURMOD_RESET 0x0
3388 /* Extracts the ALT_USB_GLOB_GINTSTS_CURMOD field value from a register. */
3389 #define ALT_USB_GLOB_GINTSTS_CURMOD_GET(value) (((value) & 0x00000001) >> 0)
3390 /* Produces a ALT_USB_GLOB_GINTSTS_CURMOD register field value suitable for setting the register. */
3391 #define ALT_USB_GLOB_GINTSTS_CURMOD_SET(value) (((value) << 0) & 0x00000001)
3392 
3393 /*
3394  * Field : Mode Mismatch Interrupt - modemis
3395  *
3396  * Mode: Host and Device. The core sets this bit when the application is trying to
3397  * access:
3398  *
3399  * * A Host mode register, when the core is operating in Device mode. -A Device
3400  * mode register, when the core is operating in Host mode.
3401  *
3402  * The register access is completed on the AHB with an OKAYresponse, but is ignored
3403  * by the core internally and does not affect the operation of the core. This bit
3404  * can be set only by the core and the application should write 1 to clearit
3405  *
3406  * Field Enumeration Values:
3407  *
3408  * Enum | Value | Description
3409  * :------------------------------------|:------|:---------------------------
3410  * ALT_USB_GLOB_GINTSTS_MODMIS_E_INACT | 0x0 | No Mode Mismatch Interrupt
3411  * ALT_USB_GLOB_GINTSTS_MODMIS_E_ACT | 0x1 | Mode Mismatch Interrupt
3412  *
3413  * Field Access Macros:
3414  *
3415  */
3416 /*
3417  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_MODMIS
3418  *
3419  * No Mode Mismatch Interrupt
3420  */
3421 #define ALT_USB_GLOB_GINTSTS_MODMIS_E_INACT 0x0
3422 /*
3423  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_MODMIS
3424  *
3425  * Mode Mismatch Interrupt
3426  */
3427 #define ALT_USB_GLOB_GINTSTS_MODMIS_E_ACT 0x1
3428 
3429 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_MODMIS register field. */
3430 #define ALT_USB_GLOB_GINTSTS_MODMIS_LSB 1
3431 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_MODMIS register field. */
3432 #define ALT_USB_GLOB_GINTSTS_MODMIS_MSB 1
3433 /* The width in bits of the ALT_USB_GLOB_GINTSTS_MODMIS register field. */
3434 #define ALT_USB_GLOB_GINTSTS_MODMIS_WIDTH 1
3435 /* The mask used to set the ALT_USB_GLOB_GINTSTS_MODMIS register field value. */
3436 #define ALT_USB_GLOB_GINTSTS_MODMIS_SET_MSK 0x00000002
3437 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_MODMIS register field value. */
3438 #define ALT_USB_GLOB_GINTSTS_MODMIS_CLR_MSK 0xfffffffd
3439 /* The reset value of the ALT_USB_GLOB_GINTSTS_MODMIS register field. */
3440 #define ALT_USB_GLOB_GINTSTS_MODMIS_RESET 0x0
3441 /* Extracts the ALT_USB_GLOB_GINTSTS_MODMIS field value from a register. */
3442 #define ALT_USB_GLOB_GINTSTS_MODMIS_GET(value) (((value) & 0x00000002) >> 1)
3443 /* Produces a ALT_USB_GLOB_GINTSTS_MODMIS register field value suitable for setting the register. */
3444 #define ALT_USB_GLOB_GINTSTS_MODMIS_SET(value) (((value) << 1) & 0x00000002)
3445 
3446 /*
3447  * Field : OTG Interrupt - otgint
3448  *
3449  * Mode: Host and Device. The core sets this bit to indicate an OTG protocol event.
3450  * The application must read the OTG Interrupt Status (GOTGINT) register to
3451  * determine the exact event that caused this interrupt. The application must clear
3452  * the appropriate status bit in the GOTGINT register to clear this bit.
3453  *
3454  * Field Enumeration Values:
3455  *
3456  * Enum | Value | Description
3457  * :------------------------------------|:------|:--------------
3458  * ALT_USB_GLOB_GINTSTS_OTGINT_E_INACT | 0x0 | No Interrupt
3459  * ALT_USB_GLOB_GINTSTS_OTGINT_E_ACT | 0x1 | OTG Interrupt
3460  *
3461  * Field Access Macros:
3462  *
3463  */
3464 /*
3465  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_OTGINT
3466  *
3467  * No Interrupt
3468  */
3469 #define ALT_USB_GLOB_GINTSTS_OTGINT_E_INACT 0x0
3470 /*
3471  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_OTGINT
3472  *
3473  * OTG Interrupt
3474  */
3475 #define ALT_USB_GLOB_GINTSTS_OTGINT_E_ACT 0x1
3476 
3477 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_OTGINT register field. */
3478 #define ALT_USB_GLOB_GINTSTS_OTGINT_LSB 2
3479 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_OTGINT register field. */
3480 #define ALT_USB_GLOB_GINTSTS_OTGINT_MSB 2
3481 /* The width in bits of the ALT_USB_GLOB_GINTSTS_OTGINT register field. */
3482 #define ALT_USB_GLOB_GINTSTS_OTGINT_WIDTH 1
3483 /* The mask used to set the ALT_USB_GLOB_GINTSTS_OTGINT register field value. */
3484 #define ALT_USB_GLOB_GINTSTS_OTGINT_SET_MSK 0x00000004
3485 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_OTGINT register field value. */
3486 #define ALT_USB_GLOB_GINTSTS_OTGINT_CLR_MSK 0xfffffffb
3487 /* The reset value of the ALT_USB_GLOB_GINTSTS_OTGINT register field. */
3488 #define ALT_USB_GLOB_GINTSTS_OTGINT_RESET 0x0
3489 /* Extracts the ALT_USB_GLOB_GINTSTS_OTGINT field value from a register. */
3490 #define ALT_USB_GLOB_GINTSTS_OTGINT_GET(value) (((value) & 0x00000004) >> 2)
3491 /* Produces a ALT_USB_GLOB_GINTSTS_OTGINT register field value suitable for setting the register. */
3492 #define ALT_USB_GLOB_GINTSTS_OTGINT_SET(value) (((value) << 2) & 0x00000004)
3493 
3494 /*
3495  * Field : Start of Frame - sof
3496  *
3497  * Mode: Host and Device. In Host mode, the core sets this bit to indicate that an
3498  * SOF (FS), micro-SOF (HS), or Keep-Alive (LS) is transmitted on the USB. The
3499  * application must write a 1 to this bit to clear the interrupt. In Device mode,
3500  * the core sets this bit to indicate that an SOF token has been received on the
3501  * USB. The application can read the Device Status register to get the current
3502  * (micro)Frame number. This interrupt is seen only when the core is operating at
3503  * either HS or FS. This bit can be set only by the core and the application should
3504  * write 1 to clear it. This register may return 1 if read immediately after power
3505  * on reset. If the register bit reads 1 immediately after power on reset it does
3506  * not indicate that an SOF has been sent (in case of host mode) or SOF has been
3507  * received (in case of device mode). The read value of this interrupt is valid
3508  * only after a valid connection between host and device is established. If the bit
3509  * is set after power on reset the application can clear the bit.
3510  *
3511  * Field Enumeration Values:
3512  *
3513  * Enum | Value | Description
3514  * :----------------------------------|:------|:---------------
3515  * ALT_USB_GLOB_GINTSTS_SOF_E_INTACT | 0x0 | No sof
3516  * ALT_USB_GLOB_GINTSTS_SOF_E_ACT | 0x1 | Start of Frame
3517  *
3518  * Field Access Macros:
3519  *
3520  */
3521 /*
3522  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_SOF
3523  *
3524  * No sof
3525  */
3526 #define ALT_USB_GLOB_GINTSTS_SOF_E_INTACT 0x0
3527 /*
3528  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_SOF
3529  *
3530  * Start of Frame
3531  */
3532 #define ALT_USB_GLOB_GINTSTS_SOF_E_ACT 0x1
3533 
3534 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_SOF register field. */
3535 #define ALT_USB_GLOB_GINTSTS_SOF_LSB 3
3536 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_SOF register field. */
3537 #define ALT_USB_GLOB_GINTSTS_SOF_MSB 3
3538 /* The width in bits of the ALT_USB_GLOB_GINTSTS_SOF register field. */
3539 #define ALT_USB_GLOB_GINTSTS_SOF_WIDTH 1
3540 /* The mask used to set the ALT_USB_GLOB_GINTSTS_SOF register field value. */
3541 #define ALT_USB_GLOB_GINTSTS_SOF_SET_MSK 0x00000008
3542 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_SOF register field value. */
3543 #define ALT_USB_GLOB_GINTSTS_SOF_CLR_MSK 0xfffffff7
3544 /* The reset value of the ALT_USB_GLOB_GINTSTS_SOF register field. */
3545 #define ALT_USB_GLOB_GINTSTS_SOF_RESET 0x0
3546 /* Extracts the ALT_USB_GLOB_GINTSTS_SOF field value from a register. */
3547 #define ALT_USB_GLOB_GINTSTS_SOF_GET(value) (((value) & 0x00000008) >> 3)
3548 /* Produces a ALT_USB_GLOB_GINTSTS_SOF register field value suitable for setting the register. */
3549 #define ALT_USB_GLOB_GINTSTS_SOF_SET(value) (((value) << 3) & 0x00000008)
3550 
3551 /*
3552  * Field : RxFIFO Non-Empty - rxflvl
3553  *
3554  * Mode: Host and Device. Indicates that there is at least one packet pending to be
3555  * read from the RxFIFO.
3556  *
3557  * Field Enumeration Values:
3558  *
3559  * Enum | Value | Description
3560  * :------------------------------------|:------|:------------------
3561  * ALT_USB_GLOB_GINTSTS_RXFLVL_E_INACT | 0x0 | Not Active
3562  * ALT_USB_GLOB_GINTSTS_RXFLVL_E_ACT | 0x1 | Rx Fifo Non Empty
3563  *
3564  * Field Access Macros:
3565  *
3566  */
3567 /*
3568  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_RXFLVL
3569  *
3570  * Not Active
3571  */
3572 #define ALT_USB_GLOB_GINTSTS_RXFLVL_E_INACT 0x0
3573 /*
3574  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_RXFLVL
3575  *
3576  * Rx Fifo Non Empty
3577  */
3578 #define ALT_USB_GLOB_GINTSTS_RXFLVL_E_ACT 0x1
3579 
3580 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_RXFLVL register field. */
3581 #define ALT_USB_GLOB_GINTSTS_RXFLVL_LSB 4
3582 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_RXFLVL register field. */
3583 #define ALT_USB_GLOB_GINTSTS_RXFLVL_MSB 4
3584 /* The width in bits of the ALT_USB_GLOB_GINTSTS_RXFLVL register field. */
3585 #define ALT_USB_GLOB_GINTSTS_RXFLVL_WIDTH 1
3586 /* The mask used to set the ALT_USB_GLOB_GINTSTS_RXFLVL register field value. */
3587 #define ALT_USB_GLOB_GINTSTS_RXFLVL_SET_MSK 0x00000010
3588 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_RXFLVL register field value. */
3589 #define ALT_USB_GLOB_GINTSTS_RXFLVL_CLR_MSK 0xffffffef
3590 /* The reset value of the ALT_USB_GLOB_GINTSTS_RXFLVL register field. */
3591 #define ALT_USB_GLOB_GINTSTS_RXFLVL_RESET 0x0
3592 /* Extracts the ALT_USB_GLOB_GINTSTS_RXFLVL field value from a register. */
3593 #define ALT_USB_GLOB_GINTSTS_RXFLVL_GET(value) (((value) & 0x00000010) >> 4)
3594 /* Produces a ALT_USB_GLOB_GINTSTS_RXFLVL register field value suitable for setting the register. */
3595 #define ALT_USB_GLOB_GINTSTS_RXFLVL_SET(value) (((value) << 4) & 0x00000010)
3596 
3597 /*
3598  * Field : Global IN Non-periodic NAK Effective - ginnakeff
3599  *
3600  * Mode: Device only. Indicates that the Set Global Non-periodic IN NAK bit in the
3601  * Device Control register (DCTL.SGNPInNak), Set by the application, has taken
3602  * effect in the core. That is, the core has sampled the Global IN NAK bit Set by
3603  * the application. This bit can be cleared by clearing the Clear Global Non-
3604  * periodic IN NAK bit in the Device Control register (DCTL.CGNPInNak). This
3605  * interrupt does not necessarily mean that a NAK handshake is sent out on the USB.
3606  * The STALL bit takes precedence over the NAK bit.
3607  *
3608  * Field Enumeration Values:
3609  *
3610  * Enum | Value | Description
3611  * :---------------------------------------|:------|:----------------------------------
3612  * ALT_USB_GLOB_GINTSTS_GINNAKEFF_E_INACT | 0x0 | Not active
3613  * ALT_USB_GLOB_GINTSTS_GINNAKEFF_E_ACT | 0x1 | Set Global Non-periodic IN NAK bi
3614  *
3615  * Field Access Macros:
3616  *
3617  */
3618 /*
3619  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_GINNAKEFF
3620  *
3621  * Not active
3622  */
3623 #define ALT_USB_GLOB_GINTSTS_GINNAKEFF_E_INACT 0x0
3624 /*
3625  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_GINNAKEFF
3626  *
3627  * Set Global Non-periodic IN NAK bi
3628  */
3629 #define ALT_USB_GLOB_GINTSTS_GINNAKEFF_E_ACT 0x1
3630 
3631 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_GINNAKEFF register field. */
3632 #define ALT_USB_GLOB_GINTSTS_GINNAKEFF_LSB 6
3633 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_GINNAKEFF register field. */
3634 #define ALT_USB_GLOB_GINTSTS_GINNAKEFF_MSB 6
3635 /* The width in bits of the ALT_USB_GLOB_GINTSTS_GINNAKEFF register field. */
3636 #define ALT_USB_GLOB_GINTSTS_GINNAKEFF_WIDTH 1
3637 /* The mask used to set the ALT_USB_GLOB_GINTSTS_GINNAKEFF register field value. */
3638 #define ALT_USB_GLOB_GINTSTS_GINNAKEFF_SET_MSK 0x00000040
3639 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_GINNAKEFF register field value. */
3640 #define ALT_USB_GLOB_GINTSTS_GINNAKEFF_CLR_MSK 0xffffffbf
3641 /* The reset value of the ALT_USB_GLOB_GINTSTS_GINNAKEFF register field. */
3642 #define ALT_USB_GLOB_GINTSTS_GINNAKEFF_RESET 0x0
3643 /* Extracts the ALT_USB_GLOB_GINTSTS_GINNAKEFF field value from a register. */
3644 #define ALT_USB_GLOB_GINTSTS_GINNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
3645 /* Produces a ALT_USB_GLOB_GINTSTS_GINNAKEFF register field value suitable for setting the register. */
3646 #define ALT_USB_GLOB_GINTSTS_GINNAKEFF_SET(value) (((value) << 6) & 0x00000040)
3647 
3648 /*
3649  * Field : Global OUT NAK Effective - goutnakeff
3650  *
3651  * Mode: Device only. Indicates that the Set Global OUT NAK bit in the Device
3652  * Control register (DCTL.SGOUTNak), Set by the application, has taken effect in
3653  * the core. This bit can be cleared by writing the Clear Global OUT NAK bit in the
3654  * Device Control register (DCTL.CGOUTNak).
3655  *
3656  * Field Enumeration Values:
3657  *
3658  * Enum | Value | Description
3659  * :----------------------------------------|:------|:-------------------------
3660  * ALT_USB_GLOB_GINTSTS_GOUTNAKEFF_E_INACT | 0x0 | No Active
3661  * ALT_USB_GLOB_GINTSTS_GOUTNAKEFF_E_ACT | 0x1 | Global OUT NAK Effective
3662  *
3663  * Field Access Macros:
3664  *
3665  */
3666 /*
3667  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_GOUTNAKEFF
3668  *
3669  * No Active
3670  */
3671 #define ALT_USB_GLOB_GINTSTS_GOUTNAKEFF_E_INACT 0x0
3672 /*
3673  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_GOUTNAKEFF
3674  *
3675  * Global OUT NAK Effective
3676  */
3677 #define ALT_USB_GLOB_GINTSTS_GOUTNAKEFF_E_ACT 0x1
3678 
3679 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_GOUTNAKEFF register field. */
3680 #define ALT_USB_GLOB_GINTSTS_GOUTNAKEFF_LSB 7
3681 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_GOUTNAKEFF register field. */
3682 #define ALT_USB_GLOB_GINTSTS_GOUTNAKEFF_MSB 7
3683 /* The width in bits of the ALT_USB_GLOB_GINTSTS_GOUTNAKEFF register field. */
3684 #define ALT_USB_GLOB_GINTSTS_GOUTNAKEFF_WIDTH 1
3685 /* The mask used to set the ALT_USB_GLOB_GINTSTS_GOUTNAKEFF register field value. */
3686 #define ALT_USB_GLOB_GINTSTS_GOUTNAKEFF_SET_MSK 0x00000080
3687 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_GOUTNAKEFF register field value. */
3688 #define ALT_USB_GLOB_GINTSTS_GOUTNAKEFF_CLR_MSK 0xffffff7f
3689 /* The reset value of the ALT_USB_GLOB_GINTSTS_GOUTNAKEFF register field. */
3690 #define ALT_USB_GLOB_GINTSTS_GOUTNAKEFF_RESET 0x0
3691 /* Extracts the ALT_USB_GLOB_GINTSTS_GOUTNAKEFF field value from a register. */
3692 #define ALT_USB_GLOB_GINTSTS_GOUTNAKEFF_GET(value) (((value) & 0x00000080) >> 7)
3693 /* Produces a ALT_USB_GLOB_GINTSTS_GOUTNAKEFF register field value suitable for setting the register. */
3694 #define ALT_USB_GLOB_GINTSTS_GOUTNAKEFF_SET(value) (((value) << 7) & 0x00000080)
3695 
3696 /*
3697  * Field : Early Suspend - erlysusp
3698  *
3699  * Mode: Device only. The core sets this bit to indicate that an Idle state has
3700  * been detected on the USB for 3 ms.
3701  *
3702  * Field Enumeration Values:
3703  *
3704  * Enum | Value | Description
3705  * :--------------------------------------|:------|:--------------------
3706  * ALT_USB_GLOB_GINTSTS_ERLYSUSP_E_INACT | 0x0 | No Idle
3707  * ALT_USB_GLOB_GINTSTS_ERLYSUSP_E_ACT | 0x1 | Idle state detecetd
3708  *
3709  * Field Access Macros:
3710  *
3711  */
3712 /*
3713  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_ERLYSUSP
3714  *
3715  * No Idle
3716  */
3717 #define ALT_USB_GLOB_GINTSTS_ERLYSUSP_E_INACT 0x0
3718 /*
3719  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_ERLYSUSP
3720  *
3721  * Idle state detecetd
3722  */
3723 #define ALT_USB_GLOB_GINTSTS_ERLYSUSP_E_ACT 0x1
3724 
3725 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_ERLYSUSP register field. */
3726 #define ALT_USB_GLOB_GINTSTS_ERLYSUSP_LSB 10
3727 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_ERLYSUSP register field. */
3728 #define ALT_USB_GLOB_GINTSTS_ERLYSUSP_MSB 10
3729 /* The width in bits of the ALT_USB_GLOB_GINTSTS_ERLYSUSP register field. */
3730 #define ALT_USB_GLOB_GINTSTS_ERLYSUSP_WIDTH 1
3731 /* The mask used to set the ALT_USB_GLOB_GINTSTS_ERLYSUSP register field value. */
3732 #define ALT_USB_GLOB_GINTSTS_ERLYSUSP_SET_MSK 0x00000400
3733 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_ERLYSUSP register field value. */
3734 #define ALT_USB_GLOB_GINTSTS_ERLYSUSP_CLR_MSK 0xfffffbff
3735 /* The reset value of the ALT_USB_GLOB_GINTSTS_ERLYSUSP register field. */
3736 #define ALT_USB_GLOB_GINTSTS_ERLYSUSP_RESET 0x0
3737 /* Extracts the ALT_USB_GLOB_GINTSTS_ERLYSUSP field value from a register. */
3738 #define ALT_USB_GLOB_GINTSTS_ERLYSUSP_GET(value) (((value) & 0x00000400) >> 10)
3739 /* Produces a ALT_USB_GLOB_GINTSTS_ERLYSUSP register field value suitable for setting the register. */
3740 #define ALT_USB_GLOB_GINTSTS_ERLYSUSP_SET(value) (((value) << 10) & 0x00000400)
3741 
3742 /*
3743  * Field : USB Suspend - usbsusp
3744  *
3745  * Mode: Device only. The core sets this bit to indicate that a suspend was
3746  * detected on the USB. The core enters the Suspended state when there is no
3747  * activity on the phy_line_state_i signal for an extended period of time.
3748  *
3749  * Field Enumeration Values:
3750  *
3751  * Enum | Value | Description
3752  * :-------------------------------------|:------|:------------
3753  * ALT_USB_GLOB_GINTSTS_USBSUSP_E_INACT | 0x0 | Not Active
3754  * ALT_USB_GLOB_GINTSTS_USBSUSP_E_ACT | 0x1 | USB Suspend
3755  *
3756  * Field Access Macros:
3757  *
3758  */
3759 /*
3760  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_USBSUSP
3761  *
3762  * Not Active
3763  */
3764 #define ALT_USB_GLOB_GINTSTS_USBSUSP_E_INACT 0x0
3765 /*
3766  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_USBSUSP
3767  *
3768  * USB Suspend
3769  */
3770 #define ALT_USB_GLOB_GINTSTS_USBSUSP_E_ACT 0x1
3771 
3772 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_USBSUSP register field. */
3773 #define ALT_USB_GLOB_GINTSTS_USBSUSP_LSB 11
3774 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_USBSUSP register field. */
3775 #define ALT_USB_GLOB_GINTSTS_USBSUSP_MSB 11
3776 /* The width in bits of the ALT_USB_GLOB_GINTSTS_USBSUSP register field. */
3777 #define ALT_USB_GLOB_GINTSTS_USBSUSP_WIDTH 1
3778 /* The mask used to set the ALT_USB_GLOB_GINTSTS_USBSUSP register field value. */
3779 #define ALT_USB_GLOB_GINTSTS_USBSUSP_SET_MSK 0x00000800
3780 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_USBSUSP register field value. */
3781 #define ALT_USB_GLOB_GINTSTS_USBSUSP_CLR_MSK 0xfffff7ff
3782 /* The reset value of the ALT_USB_GLOB_GINTSTS_USBSUSP register field. */
3783 #define ALT_USB_GLOB_GINTSTS_USBSUSP_RESET 0x0
3784 /* Extracts the ALT_USB_GLOB_GINTSTS_USBSUSP field value from a register. */
3785 #define ALT_USB_GLOB_GINTSTS_USBSUSP_GET(value) (((value) & 0x00000800) >> 11)
3786 /* Produces a ALT_USB_GLOB_GINTSTS_USBSUSP register field value suitable for setting the register. */
3787 #define ALT_USB_GLOB_GINTSTS_USBSUSP_SET(value) (((value) << 11) & 0x00000800)
3788 
3789 /*
3790  * Field : USB Reset - usbrst
3791  *
3792  * Mode: Device only. The core sets this bit to indicate that a reset is detected
3793  * on the USB.
3794  *
3795  * Field Enumeration Values:
3796  *
3797  * Enum | Value | Description
3798  * :------------------------------------|:------|:------------
3799  * ALT_USB_GLOB_GINTSTS_USBRST_E_INACT | 0x0 | Not active
3800  * ALT_USB_GLOB_GINTSTS_USBRST_E_ACT | 0x1 | USB Reset
3801  *
3802  * Field Access Macros:
3803  *
3804  */
3805 /*
3806  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_USBRST
3807  *
3808  * Not active
3809  */
3810 #define ALT_USB_GLOB_GINTSTS_USBRST_E_INACT 0x0
3811 /*
3812  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_USBRST
3813  *
3814  * USB Reset
3815  */
3816 #define ALT_USB_GLOB_GINTSTS_USBRST_E_ACT 0x1
3817 
3818 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_USBRST register field. */
3819 #define ALT_USB_GLOB_GINTSTS_USBRST_LSB 12
3820 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_USBRST register field. */
3821 #define ALT_USB_GLOB_GINTSTS_USBRST_MSB 12
3822 /* The width in bits of the ALT_USB_GLOB_GINTSTS_USBRST register field. */
3823 #define ALT_USB_GLOB_GINTSTS_USBRST_WIDTH 1
3824 /* The mask used to set the ALT_USB_GLOB_GINTSTS_USBRST register field value. */
3825 #define ALT_USB_GLOB_GINTSTS_USBRST_SET_MSK 0x00001000
3826 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_USBRST register field value. */
3827 #define ALT_USB_GLOB_GINTSTS_USBRST_CLR_MSK 0xffffefff
3828 /* The reset value of the ALT_USB_GLOB_GINTSTS_USBRST register field. */
3829 #define ALT_USB_GLOB_GINTSTS_USBRST_RESET 0x0
3830 /* Extracts the ALT_USB_GLOB_GINTSTS_USBRST field value from a register. */
3831 #define ALT_USB_GLOB_GINTSTS_USBRST_GET(value) (((value) & 0x00001000) >> 12)
3832 /* Produces a ALT_USB_GLOB_GINTSTS_USBRST register field value suitable for setting the register. */
3833 #define ALT_USB_GLOB_GINTSTS_USBRST_SET(value) (((value) << 12) & 0x00001000)
3834 
3835 /*
3836  * Field : Enumeration Done - enumdone
3837  *
3838  * Mode: Device only. The core sets this bit to indicate that speed enumeration is
3839  * complete. The application must read the Device Status register to obtain the
3840  * enumerated speed.
3841  *
3842  * Field Enumeration Values:
3843  *
3844  * Enum | Value | Description
3845  * :--------------------------------------|:------|:-----------------
3846  * ALT_USB_GLOB_GINTSTS_ENUMDONE_E_INACT | 0x0 | Not active
3847  * ALT_USB_GLOB_GINTSTS_ENUMDONE_E_ACT | 0x1 | Enumeration Done
3848  *
3849  * Field Access Macros:
3850  *
3851  */
3852 /*
3853  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_ENUMDONE
3854  *
3855  * Not active
3856  */
3857 #define ALT_USB_GLOB_GINTSTS_ENUMDONE_E_INACT 0x0
3858 /*
3859  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_ENUMDONE
3860  *
3861  * Enumeration Done
3862  */
3863 #define ALT_USB_GLOB_GINTSTS_ENUMDONE_E_ACT 0x1
3864 
3865 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_ENUMDONE register field. */
3866 #define ALT_USB_GLOB_GINTSTS_ENUMDONE_LSB 13
3867 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_ENUMDONE register field. */
3868 #define ALT_USB_GLOB_GINTSTS_ENUMDONE_MSB 13
3869 /* The width in bits of the ALT_USB_GLOB_GINTSTS_ENUMDONE register field. */
3870 #define ALT_USB_GLOB_GINTSTS_ENUMDONE_WIDTH 1
3871 /* The mask used to set the ALT_USB_GLOB_GINTSTS_ENUMDONE register field value. */
3872 #define ALT_USB_GLOB_GINTSTS_ENUMDONE_SET_MSK 0x00002000
3873 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_ENUMDONE register field value. */
3874 #define ALT_USB_GLOB_GINTSTS_ENUMDONE_CLR_MSK 0xffffdfff
3875 /* The reset value of the ALT_USB_GLOB_GINTSTS_ENUMDONE register field. */
3876 #define ALT_USB_GLOB_GINTSTS_ENUMDONE_RESET 0x0
3877 /* Extracts the ALT_USB_GLOB_GINTSTS_ENUMDONE field value from a register. */
3878 #define ALT_USB_GLOB_GINTSTS_ENUMDONE_GET(value) (((value) & 0x00002000) >> 13)
3879 /* Produces a ALT_USB_GLOB_GINTSTS_ENUMDONE register field value suitable for setting the register. */
3880 #define ALT_USB_GLOB_GINTSTS_ENUMDONE_SET(value) (((value) << 13) & 0x00002000)
3881 
3882 /*
3883  * Field : Isochronous OUT Packet Dropped Interrupt - isooutdrop
3884  *
3885  * Mode: Device only. The core sets this bit when it fails to write an isochronous
3886  * OUT packet into the RxFIFO because the RxFIFO does not have enough space to
3887  * accommodate a maximum packet size packet for the isochronous OUT endpoint.
3888  *
3889  * Field Enumeration Values:
3890  *
3891  * Enum | Value | Description
3892  * :----------------------------------------|:------|:----------------------------------------
3893  * ALT_USB_GLOB_GINTSTS_ISOOUTDROP_E_INACT | 0x0 | Not active
3894  * ALT_USB_GLOB_GINTSTS_ISOOUTDROP_E_ACT | 0x1 | Isochronous OUT Packet Dropped Interrup
3895  *
3896  * Field Access Macros:
3897  *
3898  */
3899 /*
3900  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_ISOOUTDROP
3901  *
3902  * Not active
3903  */
3904 #define ALT_USB_GLOB_GINTSTS_ISOOUTDROP_E_INACT 0x0
3905 /*
3906  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_ISOOUTDROP
3907  *
3908  * Isochronous OUT Packet Dropped Interrup
3909  */
3910 #define ALT_USB_GLOB_GINTSTS_ISOOUTDROP_E_ACT 0x1
3911 
3912 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_ISOOUTDROP register field. */
3913 #define ALT_USB_GLOB_GINTSTS_ISOOUTDROP_LSB 14
3914 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_ISOOUTDROP register field. */
3915 #define ALT_USB_GLOB_GINTSTS_ISOOUTDROP_MSB 14
3916 /* The width in bits of the ALT_USB_GLOB_GINTSTS_ISOOUTDROP register field. */
3917 #define ALT_USB_GLOB_GINTSTS_ISOOUTDROP_WIDTH 1
3918 /* The mask used to set the ALT_USB_GLOB_GINTSTS_ISOOUTDROP register field value. */
3919 #define ALT_USB_GLOB_GINTSTS_ISOOUTDROP_SET_MSK 0x00004000
3920 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_ISOOUTDROP register field value. */
3921 #define ALT_USB_GLOB_GINTSTS_ISOOUTDROP_CLR_MSK 0xffffbfff
3922 /* The reset value of the ALT_USB_GLOB_GINTSTS_ISOOUTDROP register field. */
3923 #define ALT_USB_GLOB_GINTSTS_ISOOUTDROP_RESET 0x0
3924 /* Extracts the ALT_USB_GLOB_GINTSTS_ISOOUTDROP field value from a register. */
3925 #define ALT_USB_GLOB_GINTSTS_ISOOUTDROP_GET(value) (((value) & 0x00004000) >> 14)
3926 /* Produces a ALT_USB_GLOB_GINTSTS_ISOOUTDROP register field value suitable for setting the register. */
3927 #define ALT_USB_GLOB_GINTSTS_ISOOUTDROP_SET(value) (((value) << 14) & 0x00004000)
3928 
3929 /*
3930  * Field : Endpoint Mismatch Interrupt - epmis
3931  *
3932  * Mode: Device only. This interrupt is valid only in shared FIFO operation.
3933  * Indicates that an IN token has been received for a non-periodic endpoint, but
3934  * the data for another endpoint is present in the top of the Non-periodic Transmit
3935  * FIFO and the IN endpoint mismatch count programmed by the application has
3936  * expired.
3937  *
3938  * Field Enumeration Values:
3939  *
3940  * Enum | Value | Description
3941  * :-----------------------------------|:------|:---------------------------
3942  * ALT_USB_GLOB_GINTSTS_EPMIS_E_INACT | 0x0 | Not active
3943  * ALT_USB_GLOB_GINTSTS_EPMIS_E_ACT | 0x1 | Endpoint Mismatch Interrup
3944  *
3945  * Field Access Macros:
3946  *
3947  */
3948 /*
3949  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_EPMIS
3950  *
3951  * Not active
3952  */
3953 #define ALT_USB_GLOB_GINTSTS_EPMIS_E_INACT 0x0
3954 /*
3955  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_EPMIS
3956  *
3957  * Endpoint Mismatch Interrup
3958  */
3959 #define ALT_USB_GLOB_GINTSTS_EPMIS_E_ACT 0x1
3960 
3961 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_EPMIS register field. */
3962 #define ALT_USB_GLOB_GINTSTS_EPMIS_LSB 17
3963 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_EPMIS register field. */
3964 #define ALT_USB_GLOB_GINTSTS_EPMIS_MSB 17
3965 /* The width in bits of the ALT_USB_GLOB_GINTSTS_EPMIS register field. */
3966 #define ALT_USB_GLOB_GINTSTS_EPMIS_WIDTH 1
3967 /* The mask used to set the ALT_USB_GLOB_GINTSTS_EPMIS register field value. */
3968 #define ALT_USB_GLOB_GINTSTS_EPMIS_SET_MSK 0x00020000
3969 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_EPMIS register field value. */
3970 #define ALT_USB_GLOB_GINTSTS_EPMIS_CLR_MSK 0xfffdffff
3971 /* The reset value of the ALT_USB_GLOB_GINTSTS_EPMIS register field. */
3972 #define ALT_USB_GLOB_GINTSTS_EPMIS_RESET 0x0
3973 /* Extracts the ALT_USB_GLOB_GINTSTS_EPMIS field value from a register. */
3974 #define ALT_USB_GLOB_GINTSTS_EPMIS_GET(value) (((value) & 0x00020000) >> 17)
3975 /* Produces a ALT_USB_GLOB_GINTSTS_EPMIS register field value suitable for setting the register. */
3976 #define ALT_USB_GLOB_GINTSTS_EPMIS_SET(value) (((value) << 17) & 0x00020000)
3977 
3978 /*
3979  * Field : IN Endpoints Interrupt - iepint
3980  *
3981  * Mode: Device only. The core sets this bit to indicate that an interrupt is
3982  * pending on one of the IN endpoints of the core (in Device mode). The application
3983  * must read the Device All Endpoints Interrupt (DAINT) register to determine the
3984  * exact number of the IN endpoint on Device IN Endpoint-n Interrupt (DIEPINTn)
3985  * register to determine the exact cause of the interrupt. The application must
3986  * clear the appropriate status bit in the corresponding DIEPINTn register to clear
3987  * this bit.
3988  *
3989  * Field Enumeration Values:
3990  *
3991  * Enum | Value | Description
3992  * :------------------------------------|:------|:-----------------------
3993  * ALT_USB_GLOB_GINTSTS_IEPINT_E_INACT | 0x0 | Not active
3994  * ALT_USB_GLOB_GINTSTS_IEPINT_E_ACT | 0x1 | IN Endpoints Interrupt
3995  *
3996  * Field Access Macros:
3997  *
3998  */
3999 /*
4000  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_IEPINT
4001  *
4002  * Not active
4003  */
4004 #define ALT_USB_GLOB_GINTSTS_IEPINT_E_INACT 0x0
4005 /*
4006  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_IEPINT
4007  *
4008  * IN Endpoints Interrupt
4009  */
4010 #define ALT_USB_GLOB_GINTSTS_IEPINT_E_ACT 0x1
4011 
4012 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_IEPINT register field. */
4013 #define ALT_USB_GLOB_GINTSTS_IEPINT_LSB 18
4014 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_IEPINT register field. */
4015 #define ALT_USB_GLOB_GINTSTS_IEPINT_MSB 18
4016 /* The width in bits of the ALT_USB_GLOB_GINTSTS_IEPINT register field. */
4017 #define ALT_USB_GLOB_GINTSTS_IEPINT_WIDTH 1
4018 /* The mask used to set the ALT_USB_GLOB_GINTSTS_IEPINT register field value. */
4019 #define ALT_USB_GLOB_GINTSTS_IEPINT_SET_MSK 0x00040000
4020 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_IEPINT register field value. */
4021 #define ALT_USB_GLOB_GINTSTS_IEPINT_CLR_MSK 0xfffbffff
4022 /* The reset value of the ALT_USB_GLOB_GINTSTS_IEPINT register field. */
4023 #define ALT_USB_GLOB_GINTSTS_IEPINT_RESET 0x0
4024 /* Extracts the ALT_USB_GLOB_GINTSTS_IEPINT field value from a register. */
4025 #define ALT_USB_GLOB_GINTSTS_IEPINT_GET(value) (((value) & 0x00040000) >> 18)
4026 /* Produces a ALT_USB_GLOB_GINTSTS_IEPINT register field value suitable for setting the register. */
4027 #define ALT_USB_GLOB_GINTSTS_IEPINT_SET(value) (((value) << 18) & 0x00040000)
4028 
4029 /*
4030  * Field : OUT Endpoints Interrupt - oepint
4031  *
4032  * Mode: Device only. The core sets this bit to indicate that an interrupt is
4033  * pending on one of the OUT endpoints of the core (in Device mode). The
4034  * application must read the Device All Endpoints Interrupt (DAINT) register to
4035  * determine the exact number of the OUT endpoint on which the interrupt occurred,
4036  * and Then read the corresponding Device OUT Endpoint-n Interrupt (DOEPINTn)
4037  * register to determine the exact cause of the interrupt. The application must
4038  * clear the appropriate status bit in the corresponding DOEPINTn register to clear
4039  * this bit.
4040  *
4041  * Field Enumeration Values:
4042  *
4043  * Enum | Value | Description
4044  * :------------------------------------|:------|:------------------------
4045  * ALT_USB_GLOB_GINTSTS_OEPINT_E_INACT | 0x0 | Not active
4046  * ALT_USB_GLOB_GINTSTS_OEPINT_E_ACT | 0x1 | OUT Endpoints Interrupt
4047  *
4048  * Field Access Macros:
4049  *
4050  */
4051 /*
4052  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_OEPINT
4053  *
4054  * Not active
4055  */
4056 #define ALT_USB_GLOB_GINTSTS_OEPINT_E_INACT 0x0
4057 /*
4058  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_OEPINT
4059  *
4060  * OUT Endpoints Interrupt
4061  */
4062 #define ALT_USB_GLOB_GINTSTS_OEPINT_E_ACT 0x1
4063 
4064 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_OEPINT register field. */
4065 #define ALT_USB_GLOB_GINTSTS_OEPINT_LSB 19
4066 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_OEPINT register field. */
4067 #define ALT_USB_GLOB_GINTSTS_OEPINT_MSB 19
4068 /* The width in bits of the ALT_USB_GLOB_GINTSTS_OEPINT register field. */
4069 #define ALT_USB_GLOB_GINTSTS_OEPINT_WIDTH 1
4070 /* The mask used to set the ALT_USB_GLOB_GINTSTS_OEPINT register field value. */
4071 #define ALT_USB_GLOB_GINTSTS_OEPINT_SET_MSK 0x00080000
4072 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_OEPINT register field value. */
4073 #define ALT_USB_GLOB_GINTSTS_OEPINT_CLR_MSK 0xfff7ffff
4074 /* The reset value of the ALT_USB_GLOB_GINTSTS_OEPINT register field. */
4075 #define ALT_USB_GLOB_GINTSTS_OEPINT_RESET 0x0
4076 /* Extracts the ALT_USB_GLOB_GINTSTS_OEPINT field value from a register. */
4077 #define ALT_USB_GLOB_GINTSTS_OEPINT_GET(value) (((value) & 0x00080000) >> 19)
4078 /* Produces a ALT_USB_GLOB_GINTSTS_OEPINT register field value suitable for setting the register. */
4079 #define ALT_USB_GLOB_GINTSTS_OEPINT_SET(value) (((value) << 19) & 0x00080000)
4080 
4081 /*
4082  * Field : Incomplete Isochronous IN Transfer - incompisoin
4083  *
4084  * Mode: Device only. The core sets this interrupt to indicate that there is at
4085  * least isochronous IN endpoint on which the transfer is not completed in the
4086  * current microframe. This interrupt is asserted along with the End of Periodic
4087  * Frame Interrupt (EOPF) bit in this register. This interrupt is not asserted in
4088  * Scatter/Gather DMA mode.
4089  *
4090  * Field Enumeration Values:
4091  *
4092  * Enum | Value | Description
4093  * :-----------------------------------------|:------|:-----------------------------------
4094  * ALT_USB_GLOB_GINTSTS_INCOMPISOIN_E_INACT | 0x0 | Not active
4095  * ALT_USB_GLOB_GINTSTS_INCOMPISOIN_E_ACT | 0x1 | Incomplete Isochronous IN Transfer
4096  *
4097  * Field Access Macros:
4098  *
4099  */
4100 /*
4101  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_INCOMPISOIN
4102  *
4103  * Not active
4104  */
4105 #define ALT_USB_GLOB_GINTSTS_INCOMPISOIN_E_INACT 0x0
4106 /*
4107  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_INCOMPISOIN
4108  *
4109  * Incomplete Isochronous IN Transfer
4110  */
4111 #define ALT_USB_GLOB_GINTSTS_INCOMPISOIN_E_ACT 0x1
4112 
4113 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_INCOMPISOIN register field. */
4114 #define ALT_USB_GLOB_GINTSTS_INCOMPISOIN_LSB 20
4115 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_INCOMPISOIN register field. */
4116 #define ALT_USB_GLOB_GINTSTS_INCOMPISOIN_MSB 20
4117 /* The width in bits of the ALT_USB_GLOB_GINTSTS_INCOMPISOIN register field. */
4118 #define ALT_USB_GLOB_GINTSTS_INCOMPISOIN_WIDTH 1
4119 /* The mask used to set the ALT_USB_GLOB_GINTSTS_INCOMPISOIN register field value. */
4120 #define ALT_USB_GLOB_GINTSTS_INCOMPISOIN_SET_MSK 0x00100000
4121 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_INCOMPISOIN register field value. */
4122 #define ALT_USB_GLOB_GINTSTS_INCOMPISOIN_CLR_MSK 0xffefffff
4123 /* The reset value of the ALT_USB_GLOB_GINTSTS_INCOMPISOIN register field. */
4124 #define ALT_USB_GLOB_GINTSTS_INCOMPISOIN_RESET 0x0
4125 /* Extracts the ALT_USB_GLOB_GINTSTS_INCOMPISOIN field value from a register. */
4126 #define ALT_USB_GLOB_GINTSTS_INCOMPISOIN_GET(value) (((value) & 0x00100000) >> 20)
4127 /* Produces a ALT_USB_GLOB_GINTSTS_INCOMPISOIN register field value suitable for setting the register. */
4128 #define ALT_USB_GLOB_GINTSTS_INCOMPISOIN_SET(value) (((value) << 20) & 0x00100000)
4129 
4130 /*
4131  * Field : Incomplete Periodic Transfer - incomplp
4132  *
4133  * Mode: Device only. In Host mode, the core sets this interrupt bit when there are
4134  * incomplete periodic transactions still pending which arescheduled for the
4135  * current microframe. Incomplete Isochronous OUT Transfer (incompISOOUT) The
4136  * Device mode, the core sets this interrupt to indicate that there is at least one
4137  * isochronous OUT endpoint on which the transfer is not completed in the current
4138  * microframe. This interrupt is asserted along with the End of Periodic Frame
4139  * Interrupt (EOPF) bit in this register. This bit can be set only by the core and
4140  * the application should write 1 to clear it
4141  *
4142  * Field Enumeration Values:
4143  *
4144  * Enum | Value | Description
4145  * :--------------------------------------|:------|:-----------------------------
4146  * ALT_USB_GLOB_GINTSTS_INCOMPLP_E_INACT | 0x0 | Not active
4147  * ALT_USB_GLOB_GINTSTS_INCOMPLP_E_ACT | 0x1 | Incomplete Periodic Transfer
4148  *
4149  * Field Access Macros:
4150  *
4151  */
4152 /*
4153  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_INCOMPLP
4154  *
4155  * Not active
4156  */
4157 #define ALT_USB_GLOB_GINTSTS_INCOMPLP_E_INACT 0x0
4158 /*
4159  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_INCOMPLP
4160  *
4161  * Incomplete Periodic Transfer
4162  */
4163 #define ALT_USB_GLOB_GINTSTS_INCOMPLP_E_ACT 0x1
4164 
4165 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_INCOMPLP register field. */
4166 #define ALT_USB_GLOB_GINTSTS_INCOMPLP_LSB 21
4167 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_INCOMPLP register field. */
4168 #define ALT_USB_GLOB_GINTSTS_INCOMPLP_MSB 21
4169 /* The width in bits of the ALT_USB_GLOB_GINTSTS_INCOMPLP register field. */
4170 #define ALT_USB_GLOB_GINTSTS_INCOMPLP_WIDTH 1
4171 /* The mask used to set the ALT_USB_GLOB_GINTSTS_INCOMPLP register field value. */
4172 #define ALT_USB_GLOB_GINTSTS_INCOMPLP_SET_MSK 0x00200000
4173 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_INCOMPLP register field value. */
4174 #define ALT_USB_GLOB_GINTSTS_INCOMPLP_CLR_MSK 0xffdfffff
4175 /* The reset value of the ALT_USB_GLOB_GINTSTS_INCOMPLP register field. */
4176 #define ALT_USB_GLOB_GINTSTS_INCOMPLP_RESET 0x0
4177 /* Extracts the ALT_USB_GLOB_GINTSTS_INCOMPLP field value from a register. */
4178 #define ALT_USB_GLOB_GINTSTS_INCOMPLP_GET(value) (((value) & 0x00200000) >> 21)
4179 /* Produces a ALT_USB_GLOB_GINTSTS_INCOMPLP register field value suitable for setting the register. */
4180 #define ALT_USB_GLOB_GINTSTS_INCOMPLP_SET(value) (((value) << 21) & 0x00200000)
4181 
4182 /*
4183  * Field : Data Fetch Suspended - fetsusp
4184  *
4185  * Mode: Device only. This interrupt is valid only in DMA mode. This interrupt
4186  * indicates that the core has stopped fetching data for IN endpoints due to the
4187  * unavailability of TxFIFO space or Request Queue space. This interrupt is used by
4188  * the application for an endpoint mismatch algorithm. for example, after detecting
4189  * an endpoint mismatch, the application:
4190  *
4191  * * Sets a Global non-periodic IN NAK handshake
4192  *
4193  * * Disables In endpoints
4194  *
4195  * * Flushes the FIFO
4196  *
4197  * * Determines the token sequence from the IN Token Sequence
4198  *
4199  * Learning Queue
4200  *
4201  * * Re-enables the endpoints
4202  *
4203  * * Clears the Global non-periodic IN NAK handshake
4204  *
4205  * If the Global non-periodic IN NAK is cleared, the core has not yet fetched data
4206  * for the IN endpoint, and the IN token is received: the core generates an IN
4207  * token received when FIFO empty interrupt. The OTG Then sends the host a NAK
4208  * response. To avoid this scenario, the application can check the GINTSTS.FetSusp
4209  * interrupt, which ensures that the FIFO is full before clearing a Global NAK
4210  * handshake. Alternatively, the application can mask the "IN token received when
4211  * FIFO empty" interrupt when clearing a Global IN NAKhandshake.
4212  *
4213  * Field Enumeration Values:
4214  *
4215  * Enum | Value | Description
4216  * :-------------------------------------|:------|:---------------------
4217  * ALT_USB_GLOB_GINTSTS_FETSUSP_E_INACT | 0x0 | Not active
4218  * ALT_USB_GLOB_GINTSTS_FETSUSP_E_ACT | 0x1 | Data Fetch Suspended
4219  *
4220  * Field Access Macros:
4221  *
4222  */
4223 /*
4224  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_FETSUSP
4225  *
4226  * Not active
4227  */
4228 #define ALT_USB_GLOB_GINTSTS_FETSUSP_E_INACT 0x0
4229 /*
4230  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_FETSUSP
4231  *
4232  * Data Fetch Suspended
4233  */
4234 #define ALT_USB_GLOB_GINTSTS_FETSUSP_E_ACT 0x1
4235 
4236 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_FETSUSP register field. */
4237 #define ALT_USB_GLOB_GINTSTS_FETSUSP_LSB 22
4238 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_FETSUSP register field. */
4239 #define ALT_USB_GLOB_GINTSTS_FETSUSP_MSB 22
4240 /* The width in bits of the ALT_USB_GLOB_GINTSTS_FETSUSP register field. */
4241 #define ALT_USB_GLOB_GINTSTS_FETSUSP_WIDTH 1
4242 /* The mask used to set the ALT_USB_GLOB_GINTSTS_FETSUSP register field value. */
4243 #define ALT_USB_GLOB_GINTSTS_FETSUSP_SET_MSK 0x00400000
4244 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_FETSUSP register field value. */
4245 #define ALT_USB_GLOB_GINTSTS_FETSUSP_CLR_MSK 0xffbfffff
4246 /* The reset value of the ALT_USB_GLOB_GINTSTS_FETSUSP register field. */
4247 #define ALT_USB_GLOB_GINTSTS_FETSUSP_RESET 0x0
4248 /* Extracts the ALT_USB_GLOB_GINTSTS_FETSUSP field value from a register. */
4249 #define ALT_USB_GLOB_GINTSTS_FETSUSP_GET(value) (((value) & 0x00400000) >> 22)
4250 /* Produces a ALT_USB_GLOB_GINTSTS_FETSUSP register field value suitable for setting the register. */
4251 #define ALT_USB_GLOB_GINTSTS_FETSUSP_SET(value) (((value) << 22) & 0x00400000)
4252 
4253 /*
4254  * Field : Reset detected Interrupt - resetdet
4255  *
4256  * Mode: Device only. In Device mode, this interrupt is asserted when a reset is
4257  * detected on the USB in partial power-down mode when the device is in Suspend. In
4258  * Host mode, this interrupt is not asserted.
4259  *
4260  * Field Enumeration Values:
4261  *
4262  * Enum | Value | Description
4263  * :------------------------------------|:------|:------------------------
4264  * ALT_USB_GLOB_GINTSTS_RSTDET_E_INACT | 0x0 | Not active
4265  * ALT_USB_GLOB_GINTSTS_RSTDET_E_ACT | 0x1 | Reset detected Interrup
4266  *
4267  * Field Access Macros:
4268  *
4269  */
4270 /*
4271  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_RSTDET
4272  *
4273  * Not active
4274  */
4275 #define ALT_USB_GLOB_GINTSTS_RSTDET_E_INACT 0x0
4276 /*
4277  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_RSTDET
4278  *
4279  * Reset detected Interrup
4280  */
4281 #define ALT_USB_GLOB_GINTSTS_RSTDET_E_ACT 0x1
4282 
4283 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_RSTDET register field. */
4284 #define ALT_USB_GLOB_GINTSTS_RSTDET_LSB 23
4285 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_RSTDET register field. */
4286 #define ALT_USB_GLOB_GINTSTS_RSTDET_MSB 23
4287 /* The width in bits of the ALT_USB_GLOB_GINTSTS_RSTDET register field. */
4288 #define ALT_USB_GLOB_GINTSTS_RSTDET_WIDTH 1
4289 /* The mask used to set the ALT_USB_GLOB_GINTSTS_RSTDET register field value. */
4290 #define ALT_USB_GLOB_GINTSTS_RSTDET_SET_MSK 0x00800000
4291 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_RSTDET register field value. */
4292 #define ALT_USB_GLOB_GINTSTS_RSTDET_CLR_MSK 0xff7fffff
4293 /* The reset value of the ALT_USB_GLOB_GINTSTS_RSTDET register field. */
4294 #define ALT_USB_GLOB_GINTSTS_RSTDET_RESET 0x0
4295 /* Extracts the ALT_USB_GLOB_GINTSTS_RSTDET field value from a register. */
4296 #define ALT_USB_GLOB_GINTSTS_RSTDET_GET(value) (((value) & 0x00800000) >> 23)
4297 /* Produces a ALT_USB_GLOB_GINTSTS_RSTDET register field value suitable for setting the register. */
4298 #define ALT_USB_GLOB_GINTSTS_RSTDET_SET(value) (((value) << 23) & 0x00800000)
4299 
4300 /*
4301  * Field : Host Port Interrupt - prtint
4302  *
4303  * Mode:Host only. The core sets this bit to indicate a change in port status of
4304  * one of the otg core ports in Host mode. The application must read the Host Port
4305  * Control and Status (HPRT) register to determine the exact event that caused this
4306  * interrupt. The application must clear the appropriate status bit in the Host PC
4307  * Control and Status register to clear this bit.
4308  *
4309  * Field Enumeration Values:
4310  *
4311  * Enum | Value | Description
4312  * :------------------------------------|:------|:--------------------
4313  * ALT_USB_GLOB_GINTSTS_PRTINT_E_INACT | 0x0 |
4314  * ALT_USB_GLOB_GINTSTS_PRTINT_E_ACT | 0x1 | Host Port Interrupt
4315  *
4316  * Field Access Macros:
4317  *
4318  */
4319 /*
4320  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_PRTINT
4321  *
4322  */
4323 #define ALT_USB_GLOB_GINTSTS_PRTINT_E_INACT 0x0
4324 /*
4325  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_PRTINT
4326  *
4327  * Host Port Interrupt
4328  */
4329 #define ALT_USB_GLOB_GINTSTS_PRTINT_E_ACT 0x1
4330 
4331 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_PRTINT register field. */
4332 #define ALT_USB_GLOB_GINTSTS_PRTINT_LSB 24
4333 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_PRTINT register field. */
4334 #define ALT_USB_GLOB_GINTSTS_PRTINT_MSB 24
4335 /* The width in bits of the ALT_USB_GLOB_GINTSTS_PRTINT register field. */
4336 #define ALT_USB_GLOB_GINTSTS_PRTINT_WIDTH 1
4337 /* The mask used to set the ALT_USB_GLOB_GINTSTS_PRTINT register field value. */
4338 #define ALT_USB_GLOB_GINTSTS_PRTINT_SET_MSK 0x01000000
4339 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_PRTINT register field value. */
4340 #define ALT_USB_GLOB_GINTSTS_PRTINT_CLR_MSK 0xfeffffff
4341 /* The reset value of the ALT_USB_GLOB_GINTSTS_PRTINT register field. */
4342 #define ALT_USB_GLOB_GINTSTS_PRTINT_RESET 0x0
4343 /* Extracts the ALT_USB_GLOB_GINTSTS_PRTINT field value from a register. */
4344 #define ALT_USB_GLOB_GINTSTS_PRTINT_GET(value) (((value) & 0x01000000) >> 24)
4345 /* Produces a ALT_USB_GLOB_GINTSTS_PRTINT register field value suitable for setting the register. */
4346 #define ALT_USB_GLOB_GINTSTS_PRTINT_SET(value) (((value) << 24) & 0x01000000)
4347 
4348 /*
4349  * Field : Host Channels Interrupt - hchint
4350  *
4351  * Mode:Host only. The core sets this bit to indicate that an interrupt is pending
4352  * on one of the channels of the core (in Host mode). The application must read the
4353  * Host All Channels Interrupt (HAINT) register to determine the exact number of
4354  * the channel on which the interrupt occurred, and Then read the corresponding
4355  * Host Channel-n Interrupt (HCINTn) register to determine the exact cause of the
4356  * interrupt. The application must clear the appropriate status bit in the HCINTn
4357  * register to clear this bit.
4358  *
4359  * Field Enumeration Values:
4360  *
4361  * Enum | Value | Description
4362  * :------------------------------------|:------|:------------------------
4363  * ALT_USB_GLOB_GINTSTS_HCHINT_E_INACT | 0x0 | Not active
4364  * ALT_USB_GLOB_GINTSTS_HCHINT_E_ACT | 0x1 | Host Channels Interrupt
4365  *
4366  * Field Access Macros:
4367  *
4368  */
4369 /*
4370  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_HCHINT
4371  *
4372  * Not active
4373  */
4374 #define ALT_USB_GLOB_GINTSTS_HCHINT_E_INACT 0x0
4375 /*
4376  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_HCHINT
4377  *
4378  * Host Channels Interrupt
4379  */
4380 #define ALT_USB_GLOB_GINTSTS_HCHINT_E_ACT 0x1
4381 
4382 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_HCHINT register field. */
4383 #define ALT_USB_GLOB_GINTSTS_HCHINT_LSB 25
4384 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_HCHINT register field. */
4385 #define ALT_USB_GLOB_GINTSTS_HCHINT_MSB 25
4386 /* The width in bits of the ALT_USB_GLOB_GINTSTS_HCHINT register field. */
4387 #define ALT_USB_GLOB_GINTSTS_HCHINT_WIDTH 1
4388 /* The mask used to set the ALT_USB_GLOB_GINTSTS_HCHINT register field value. */
4389 #define ALT_USB_GLOB_GINTSTS_HCHINT_SET_MSK 0x02000000
4390 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_HCHINT register field value. */
4391 #define ALT_USB_GLOB_GINTSTS_HCHINT_CLR_MSK 0xfdffffff
4392 /* The reset value of the ALT_USB_GLOB_GINTSTS_HCHINT register field. */
4393 #define ALT_USB_GLOB_GINTSTS_HCHINT_RESET 0x0
4394 /* Extracts the ALT_USB_GLOB_GINTSTS_HCHINT field value from a register. */
4395 #define ALT_USB_GLOB_GINTSTS_HCHINT_GET(value) (((value) & 0x02000000) >> 25)
4396 /* Produces a ALT_USB_GLOB_GINTSTS_HCHINT register field value suitable for setting the register. */
4397 #define ALT_USB_GLOB_GINTSTS_HCHINT_SET(value) (((value) << 25) & 0x02000000)
4398 
4399 /*
4400  * Field : Periodic TxFIFO Empty - ptxfemp
4401  *
4402  * Mode:Host only. This interrupt is asserted when the Periodic Transmit FIFO is
4403  * either half or completely empty and there is space for at least one entry to be
4404  * written in the Periodic Request Queue. The half or completely empty status is
4405  * determined by the Periodic TxFIFO Empty Level bit in the Core AHB Configuration
4406  * register (GAHBCFG.PTxFEmpLvl).
4407  *
4408  * Field Enumeration Values:
4409  *
4410  * Enum | Value | Description
4411  * :-------------------------------------|:------|:----------------------
4412  * ALT_USB_GLOB_GINTSTS_PTXFEMP_E_INACT | 0x0 | Not active
4413  * ALT_USB_GLOB_GINTSTS_PTXFEMP_E_ACT | 0x1 | Periodic TxFIFO Empty
4414  *
4415  * Field Access Macros:
4416  *
4417  */
4418 /*
4419  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_PTXFEMP
4420  *
4421  * Not active
4422  */
4423 #define ALT_USB_GLOB_GINTSTS_PTXFEMP_E_INACT 0x0
4424 /*
4425  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_PTXFEMP
4426  *
4427  * Periodic TxFIFO Empty
4428  */
4429 #define ALT_USB_GLOB_GINTSTS_PTXFEMP_E_ACT 0x1
4430 
4431 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_PTXFEMP register field. */
4432 #define ALT_USB_GLOB_GINTSTS_PTXFEMP_LSB 26
4433 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_PTXFEMP register field. */
4434 #define ALT_USB_GLOB_GINTSTS_PTXFEMP_MSB 26
4435 /* The width in bits of the ALT_USB_GLOB_GINTSTS_PTXFEMP register field. */
4436 #define ALT_USB_GLOB_GINTSTS_PTXFEMP_WIDTH 1
4437 /* The mask used to set the ALT_USB_GLOB_GINTSTS_PTXFEMP register field value. */
4438 #define ALT_USB_GLOB_GINTSTS_PTXFEMP_SET_MSK 0x04000000
4439 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_PTXFEMP register field value. */
4440 #define ALT_USB_GLOB_GINTSTS_PTXFEMP_CLR_MSK 0xfbffffff
4441 /* The reset value of the ALT_USB_GLOB_GINTSTS_PTXFEMP register field. */
4442 #define ALT_USB_GLOB_GINTSTS_PTXFEMP_RESET 0x1
4443 /* Extracts the ALT_USB_GLOB_GINTSTS_PTXFEMP field value from a register. */
4444 #define ALT_USB_GLOB_GINTSTS_PTXFEMP_GET(value) (((value) & 0x04000000) >> 26)
4445 /* Produces a ALT_USB_GLOB_GINTSTS_PTXFEMP register field value suitable for setting the register. */
4446 #define ALT_USB_GLOB_GINTSTS_PTXFEMP_SET(value) (((value) << 26) & 0x04000000)
4447 
4448 /*
4449  * Field : Connector ID Status Change - ConIDStsChng
4450  *
4451  * Mode:Host and Device. The core sets this bit when there is a change in connector
4452  * ID status. This bit can be set only by the core and the application should write
4453  * 1 to clear it.
4454  *
4455  * Field Enumeration Values:
4456  *
4457  * Enum | Value | Description
4458  * :------------------------------------------|:------|:---------------------------
4459  * ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG_E_INACT | 0x0 | Not Active
4460  * ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG_E_ACT | 0x1 | Connector ID Status Change
4461  *
4462  * Field Access Macros:
4463  *
4464  */
4465 /*
4466  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG
4467  *
4468  * Not Active
4469  */
4470 #define ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG_E_INACT 0x0
4471 /*
4472  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG
4473  *
4474  * Connector ID Status Change
4475  */
4476 #define ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG_E_ACT 0x1
4477 
4478 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG register field. */
4479 #define ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG_LSB 28
4480 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG register field. */
4481 #define ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG_MSB 28
4482 /* The width in bits of the ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG register field. */
4483 #define ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG_WIDTH 1
4484 /* The mask used to set the ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG register field value. */
4485 #define ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG_SET_MSK 0x10000000
4486 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG register field value. */
4487 #define ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG_CLR_MSK 0xefffffff
4488 /* The reset value of the ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG register field. */
4489 #define ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG_RESET 0x1
4490 /* Extracts the ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG field value from a register. */
4491 #define ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG_GET(value) (((value) & 0x10000000) >> 28)
4492 /* Produces a ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG register field value suitable for setting the register. */
4493 #define ALT_USB_GLOB_GINTSTS_CONIDSTSCHNG_SET(value) (((value) << 28) & 0x10000000)
4494 
4495 /*
4496  * Field : Disconnect Detected Interrupt - disconnint
4497  *
4498  * Mode:Host only. Asserted when a device disconnect is detected. This bit can be
4499  * set only by the core and the application should write 1 to clear it.
4500  *
4501  * Field Enumeration Values:
4502  *
4503  * Enum | Value | Description
4504  * :----------------------------------------|:------|:------------------------------
4505  * ALT_USB_GLOB_GINTSTS_DISCONNINT_E_INACT | 0x0 | Not active
4506  * ALT_USB_GLOB_GINTSTS_DISCONNINT_E_ACT | 0x1 | Disconnect Detected Interrupt
4507  *
4508  * Field Access Macros:
4509  *
4510  */
4511 /*
4512  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_DISCONNINT
4513  *
4514  * Not active
4515  */
4516 #define ALT_USB_GLOB_GINTSTS_DISCONNINT_E_INACT 0x0
4517 /*
4518  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_DISCONNINT
4519  *
4520  * Disconnect Detected Interrupt
4521  */
4522 #define ALT_USB_GLOB_GINTSTS_DISCONNINT_E_ACT 0x1
4523 
4524 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_DISCONNINT register field. */
4525 #define ALT_USB_GLOB_GINTSTS_DISCONNINT_LSB 29
4526 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_DISCONNINT register field. */
4527 #define ALT_USB_GLOB_GINTSTS_DISCONNINT_MSB 29
4528 /* The width in bits of the ALT_USB_GLOB_GINTSTS_DISCONNINT register field. */
4529 #define ALT_USB_GLOB_GINTSTS_DISCONNINT_WIDTH 1
4530 /* The mask used to set the ALT_USB_GLOB_GINTSTS_DISCONNINT register field value. */
4531 #define ALT_USB_GLOB_GINTSTS_DISCONNINT_SET_MSK 0x20000000
4532 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_DISCONNINT register field value. */
4533 #define ALT_USB_GLOB_GINTSTS_DISCONNINT_CLR_MSK 0xdfffffff
4534 /* The reset value of the ALT_USB_GLOB_GINTSTS_DISCONNINT register field. */
4535 #define ALT_USB_GLOB_GINTSTS_DISCONNINT_RESET 0x0
4536 /* Extracts the ALT_USB_GLOB_GINTSTS_DISCONNINT field value from a register. */
4537 #define ALT_USB_GLOB_GINTSTS_DISCONNINT_GET(value) (((value) & 0x20000000) >> 29)
4538 /* Produces a ALT_USB_GLOB_GINTSTS_DISCONNINT register field value suitable for setting the register. */
4539 #define ALT_USB_GLOB_GINTSTS_DISCONNINT_SET(value) (((value) << 29) & 0x20000000)
4540 
4541 /*
4542  * Field : Session Request New Session Detected Interrupt - sessreqint
4543  *
4544  * Mode:Host and Device. In Host mode, this interrupt is asserted when a session
4545  * request is detected from the device. In Host mode, this interrupt is asserted
4546  * when a session request is detected from the device. In Device mode, this
4547  * interrupt is asserted when the utmisrp_bvalid signal goes high. This bit can be
4548  * set only by the core and the application should write 1 to clear.
4549  *
4550  * Field Enumeration Values:
4551  *
4552  * Enum | Value | Description
4553  * :----------------------------------------|:------|:-----------------------------------------------
4554  * ALT_USB_GLOB_GINTSTS_SESSREQINT_E_INACT | 0x0 | Not active
4555  * ALT_USB_GLOB_GINTSTS_SESSREQINT_E_ACT | 0x1 | Session Request New Session Detected Interrupt
4556  *
4557  * Field Access Macros:
4558  *
4559  */
4560 /*
4561  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_SESSREQINT
4562  *
4563  * Not active
4564  */
4565 #define ALT_USB_GLOB_GINTSTS_SESSREQINT_E_INACT 0x0
4566 /*
4567  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_SESSREQINT
4568  *
4569  * Session Request New Session Detected Interrupt
4570  */
4571 #define ALT_USB_GLOB_GINTSTS_SESSREQINT_E_ACT 0x1
4572 
4573 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_SESSREQINT register field. */
4574 #define ALT_USB_GLOB_GINTSTS_SESSREQINT_LSB 30
4575 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_SESSREQINT register field. */
4576 #define ALT_USB_GLOB_GINTSTS_SESSREQINT_MSB 30
4577 /* The width in bits of the ALT_USB_GLOB_GINTSTS_SESSREQINT register field. */
4578 #define ALT_USB_GLOB_GINTSTS_SESSREQINT_WIDTH 1
4579 /* The mask used to set the ALT_USB_GLOB_GINTSTS_SESSREQINT register field value. */
4580 #define ALT_USB_GLOB_GINTSTS_SESSREQINT_SET_MSK 0x40000000
4581 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_SESSREQINT register field value. */
4582 #define ALT_USB_GLOB_GINTSTS_SESSREQINT_CLR_MSK 0xbfffffff
4583 /* The reset value of the ALT_USB_GLOB_GINTSTS_SESSREQINT register field. */
4584 #define ALT_USB_GLOB_GINTSTS_SESSREQINT_RESET 0x0
4585 /* Extracts the ALT_USB_GLOB_GINTSTS_SESSREQINT field value from a register. */
4586 #define ALT_USB_GLOB_GINTSTS_SESSREQINT_GET(value) (((value) & 0x40000000) >> 30)
4587 /* Produces a ALT_USB_GLOB_GINTSTS_SESSREQINT register field value suitable for setting the register. */
4588 #define ALT_USB_GLOB_GINTSTS_SESSREQINT_SET(value) (((value) << 30) & 0x40000000)
4589 
4590 /*
4591  * Field : Resume Remote Wakeup Detected Interrupt - wkupint
4592  *
4593  * Mode:Host and Device. Wakeup Interrupt during Suspend(L2) or LPM(L1) state.
4594  * -During Suspend(L2):
4595  *
4596  * * Device Mode - This interrupt is asserted only when Host Initiated Resume is
4597  * detected on USB.
4598  *
4599  * * Host Mode - This interrupt is asserted only when Device Initiated Remote
4600  * Wakeup is detected on USB
4601  *
4602  * * During LPM(L1):- - Device Mode - This interrupt is asserted for either Host
4603  * Initiated Resume or Device Initiated Remote Wakeup on USB.
4604  *
4605  * * Host Mode - This interrupt is asserted for either Host Initiated Resume or
4606  * Device Initiated Remote Wakeup on USB.
4607  *
4608  * Field Enumeration Values:
4609  *
4610  * Enum | Value | Description
4611  * :-------------------------------------|:------|:----------------------------------------
4612  * ALT_USB_GLOB_GINTSTS_WKUPINT_E_INACT | 0x0 | Not active
4613  * ALT_USB_GLOB_GINTSTS_WKUPINT_E_ACT | 0x1 | Resume Remote Wakeup Detected Interrupt
4614  *
4615  * Field Access Macros:
4616  *
4617  */
4618 /*
4619  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_WKUPINT
4620  *
4621  * Not active
4622  */
4623 #define ALT_USB_GLOB_GINTSTS_WKUPINT_E_INACT 0x0
4624 /*
4625  * Enumerated value for register field ALT_USB_GLOB_GINTSTS_WKUPINT
4626  *
4627  * Resume Remote Wakeup Detected Interrupt
4628  */
4629 #define ALT_USB_GLOB_GINTSTS_WKUPINT_E_ACT 0x1
4630 
4631 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTSTS_WKUPINT register field. */
4632 #define ALT_USB_GLOB_GINTSTS_WKUPINT_LSB 31
4633 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTSTS_WKUPINT register field. */
4634 #define ALT_USB_GLOB_GINTSTS_WKUPINT_MSB 31
4635 /* The width in bits of the ALT_USB_GLOB_GINTSTS_WKUPINT register field. */
4636 #define ALT_USB_GLOB_GINTSTS_WKUPINT_WIDTH 1
4637 /* The mask used to set the ALT_USB_GLOB_GINTSTS_WKUPINT register field value. */
4638 #define ALT_USB_GLOB_GINTSTS_WKUPINT_SET_MSK 0x80000000
4639 /* The mask used to clear the ALT_USB_GLOB_GINTSTS_WKUPINT register field value. */
4640 #define ALT_USB_GLOB_GINTSTS_WKUPINT_CLR_MSK 0x7fffffff
4641 /* The reset value of the ALT_USB_GLOB_GINTSTS_WKUPINT register field. */
4642 #define ALT_USB_GLOB_GINTSTS_WKUPINT_RESET 0x0
4643 /* Extracts the ALT_USB_GLOB_GINTSTS_WKUPINT field value from a register. */
4644 #define ALT_USB_GLOB_GINTSTS_WKUPINT_GET(value) (((value) & 0x80000000) >> 31)
4645 /* Produces a ALT_USB_GLOB_GINTSTS_WKUPINT register field value suitable for setting the register. */
4646 #define ALT_USB_GLOB_GINTSTS_WKUPINT_SET(value) (((value) << 31) & 0x80000000)
4647 
4648 #ifndef __ASSEMBLY__
4649 /*
4650  * WARNING: The C register and register group struct declarations are provided for
4651  * convenience and illustrative purposes. They should, however, be used with
4652  * caution as the C language standard provides no guarantees about the alignment or
4653  * atomicity of device memory accesses. The recommended practice for writing
4654  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
4655  * alt_write_word() functions.
4656  *
4657  * The struct declaration for register ALT_USB_GLOB_GINTSTS.
4658  */
4659 struct ALT_USB_GLOB_GINTSTS_s
4660 {
4661  const uint32_t curmod : 1; /* Current Mode of Operation */
4662  const uint32_t modemis : 1; /* Mode Mismatch Interrupt */
4663  const uint32_t otgint : 1; /* OTG Interrupt */
4664  const uint32_t sof : 1; /* Start of Frame */
4665  const uint32_t rxflvl : 1; /* RxFIFO Non-Empty */
4666  uint32_t : 1; /* *UNDEFINED* */
4667  const uint32_t ginnakeff : 1; /* Global IN Non-periodic NAK Effective */
4668  const uint32_t goutnakeff : 1; /* Global OUT NAK Effective */
4669  uint32_t : 2; /* *UNDEFINED* */
4670  const uint32_t erlysusp : 1; /* Early Suspend */
4671  const uint32_t usbsusp : 1; /* USB Suspend */
4672  const uint32_t usbrst : 1; /* USB Reset */
4673  const uint32_t enumdone : 1; /* Enumeration Done */
4674  const uint32_t isooutdrop : 1; /* Isochronous OUT Packet Dropped Interrupt */
4675  uint32_t : 2; /* *UNDEFINED* */
4676  const uint32_t epmis : 1; /* Endpoint Mismatch Interrupt */
4677  const uint32_t iepint : 1; /* IN Endpoints Interrupt */
4678  const uint32_t oepint : 1; /* OUT Endpoints Interrupt */
4679  const uint32_t incompisoin : 1; /* Incomplete Isochronous IN Transfer */
4680  const uint32_t incomplp : 1; /* Incomplete Periodic Transfer */
4681  const uint32_t fetsusp : 1; /* Data Fetch Suspended */
4682  const uint32_t resetdet : 1; /* Reset detected Interrupt */
4683  const uint32_t prtint : 1; /* Host Port Interrupt */
4684  const uint32_t hchint : 1; /* Host Channels Interrupt */
4685  const uint32_t ptxfemp : 1; /* Periodic TxFIFO Empty */
4686  uint32_t : 1; /* *UNDEFINED* */
4687  const uint32_t ConIDStsChng : 1; /* Connector ID Status Change */
4688  const uint32_t disconnint : 1; /* Disconnect Detected Interrupt */
4689  const uint32_t sessreqint : 1; /* Session Request New Session Detected Interrupt */
4690  const uint32_t wkupint : 1; /* Resume Remote Wakeup Detected Interrupt */
4691 };
4692 
4693 /* The typedef declaration for register ALT_USB_GLOB_GINTSTS. */
4694 typedef volatile struct ALT_USB_GLOB_GINTSTS_s ALT_USB_GLOB_GINTSTS_t;
4695 #endif /* __ASSEMBLY__ */
4696 
4697 /* The byte offset of the ALT_USB_GLOB_GINTSTS register from the beginning of the component. */
4698 #define ALT_USB_GLOB_GINTSTS_OFST 0x14
4699 /* The address of the ALT_USB_GLOB_GINTSTS register. */
4700 #define ALT_USB_GLOB_GINTSTS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GINTSTS_OFST))
4701 
4702 /*
4703  * Register : Interrupt Mask Register - gintmsk
4704  *
4705  * This register works with the Interrupt Register (GINTSTS) to interrupt the
4706  * application. When an interrupt bit is masked, the interrupt associated with that
4707  * bit is not generated. However, the GINTSTS register bit corresponding to that
4708  * interrupt is still set.
4709  *
4710  * Register Layout
4711  *
4712  * Bits | Access | Reset | Description
4713  * :------|:-------|:------|:---------------------------------------------------
4714  * [0] | ??? | 0x0 | *UNDEFINED*
4715  * [1] | RW | 0x0 | Mode Mismatch Interrupt Mask
4716  * [2] | RW | 0x0 | OTG Interrupt Mask
4717  * [3] | RW | 0x0 | Start of (micro)Frame Mask
4718  * [4] | RW | 0x0 | Receive FIFO Non-Empty Mask
4719  * [5] | ??? | 0x0 | *UNDEFINED*
4720  * [6] | RW | 0x0 | Global Non-periodic IN NAK Effective Mask
4721  * [7] | RW | 0x0 | Global OUT NAK Effective Mask
4722  * [9:8] | ??? | 0x0 | *UNDEFINED*
4723  * [10] | RW | 0x0 | Early Suspend Mask
4724  * [11] | RW | 0x0 | USB Suspend Mask
4725  * [12] | RW | 0x0 | USB Reset Mask
4726  * [13] | RW | 0x0 | Enumeration Done Mask
4727  * [14] | RW | 0x0 | Isochronous OUT Packet Dropped Interrupt Mask
4728  * [15] | RW | 0x0 | End of Periodic Frame Interrupt Mask
4729  * [16] | ??? | 0x0 | *UNDEFINED*
4730  * [17] | RW | 0x0 | Endpoint Mismatch Interrupt Mask
4731  * [18] | RW | 0x0 | IN Endpoints Interrupt Mask
4732  * [19] | RW | 0x0 | OUT Endpoints Interrupt Mask
4733  * [20] | RW | 0x0 | Incomplete Isochronous IN Transfer Mask
4734  * [21] | RW | 0x0 | Incomplete Periodic Transfer Mask
4735  * [22] | RW | 0x0 | Data Fetch Suspended Mask
4736  * [23] | RW | 0x0 | Reset detected Interrupt Mask
4737  * [24] | RW | 0x0 | Host Port Interrupt Mask
4738  * [25] | RW | 0x0 | Host Channels Interrupt Mask
4739  * [26] | RW | 0x0 | Periodic TxFIFO Empty Mask
4740  * [27] | ??? | 0x0 | *UNDEFINED*
4741  * [28] | RW | 0x0 | Connector ID Status Change Mask
4742  * [29] | RW | 0x0 | ALT_USB_GLOB_GINTMSK_DISCONNINTMSK
4743  * [30] | RW | 0x0 | Session Request New Session Detected Interrupt Mas
4744  * [31] | RW | 0x0 | Resume Remote Wakeup Detected Interrupt Mask
4745  *
4746  */
4747 /*
4748  * Field : Mode Mismatch Interrupt Mask - modemismsk
4749  *
4750  * Mode: Host and Device.
4751  *
4752  * Field Enumeration Values:
4753  *
4754  * Enum | Value | Description
4755  * :---------------------------------------|:------|:--------------------------------
4756  * ALT_USB_GLOB_GINTMSK_MODMISMSK_E_MSK | 0x0 | Mode Mismatch Interrupt Mask
4757  * ALT_USB_GLOB_GINTMSK_MODMISMSK_E_NOMSK | 0x1 | No Mask Mode Mismatch Interrupt
4758  *
4759  * Field Access Macros:
4760  *
4761  */
4762 /*
4763  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_MODMISMSK
4764  *
4765  * Mode Mismatch Interrupt Mask
4766  */
4767 #define ALT_USB_GLOB_GINTMSK_MODMISMSK_E_MSK 0x0
4768 /*
4769  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_MODMISMSK
4770  *
4771  * No Mask Mode Mismatch Interrupt
4772  */
4773 #define ALT_USB_GLOB_GINTMSK_MODMISMSK_E_NOMSK 0x1
4774 
4775 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_MODMISMSK register field. */
4776 #define ALT_USB_GLOB_GINTMSK_MODMISMSK_LSB 1
4777 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_MODMISMSK register field. */
4778 #define ALT_USB_GLOB_GINTMSK_MODMISMSK_MSB 1
4779 /* The width in bits of the ALT_USB_GLOB_GINTMSK_MODMISMSK register field. */
4780 #define ALT_USB_GLOB_GINTMSK_MODMISMSK_WIDTH 1
4781 /* The mask used to set the ALT_USB_GLOB_GINTMSK_MODMISMSK register field value. */
4782 #define ALT_USB_GLOB_GINTMSK_MODMISMSK_SET_MSK 0x00000002
4783 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_MODMISMSK register field value. */
4784 #define ALT_USB_GLOB_GINTMSK_MODMISMSK_CLR_MSK 0xfffffffd
4785 /* The reset value of the ALT_USB_GLOB_GINTMSK_MODMISMSK register field. */
4786 #define ALT_USB_GLOB_GINTMSK_MODMISMSK_RESET 0x0
4787 /* Extracts the ALT_USB_GLOB_GINTMSK_MODMISMSK field value from a register. */
4788 #define ALT_USB_GLOB_GINTMSK_MODMISMSK_GET(value) (((value) & 0x00000002) >> 1)
4789 /* Produces a ALT_USB_GLOB_GINTMSK_MODMISMSK register field value suitable for setting the register. */
4790 #define ALT_USB_GLOB_GINTMSK_MODMISMSK_SET(value) (((value) << 1) & 0x00000002)
4791 
4792 /*
4793  * Field : OTG Interrupt Mask - otgintmsk
4794  *
4795  * Mode: Host and Device.
4796  *
4797  * Field Enumeration Values:
4798  *
4799  * Enum | Value | Description
4800  * :---------------------------------------|:------|:----------------------
4801  * ALT_USB_GLOB_GINTMSK_OTGINTMSK_E_MSK | 0x0 | OTG Interrupt Mask
4802  * ALT_USB_GLOB_GINTMSK_OTGINTMSK_E_NOMSK | 0x1 | No mask OTG Interrupt
4803  *
4804  * Field Access Macros:
4805  *
4806  */
4807 /*
4808  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_OTGINTMSK
4809  *
4810  * OTG Interrupt Mask
4811  */
4812 #define ALT_USB_GLOB_GINTMSK_OTGINTMSK_E_MSK 0x0
4813 /*
4814  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_OTGINTMSK
4815  *
4816  * No mask OTG Interrupt
4817  */
4818 #define ALT_USB_GLOB_GINTMSK_OTGINTMSK_E_NOMSK 0x1
4819 
4820 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_OTGINTMSK register field. */
4821 #define ALT_USB_GLOB_GINTMSK_OTGINTMSK_LSB 2
4822 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_OTGINTMSK register field. */
4823 #define ALT_USB_GLOB_GINTMSK_OTGINTMSK_MSB 2
4824 /* The width in bits of the ALT_USB_GLOB_GINTMSK_OTGINTMSK register field. */
4825 #define ALT_USB_GLOB_GINTMSK_OTGINTMSK_WIDTH 1
4826 /* The mask used to set the ALT_USB_GLOB_GINTMSK_OTGINTMSK register field value. */
4827 #define ALT_USB_GLOB_GINTMSK_OTGINTMSK_SET_MSK 0x00000004
4828 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_OTGINTMSK register field value. */
4829 #define ALT_USB_GLOB_GINTMSK_OTGINTMSK_CLR_MSK 0xfffffffb
4830 /* The reset value of the ALT_USB_GLOB_GINTMSK_OTGINTMSK register field. */
4831 #define ALT_USB_GLOB_GINTMSK_OTGINTMSK_RESET 0x0
4832 /* Extracts the ALT_USB_GLOB_GINTMSK_OTGINTMSK field value from a register. */
4833 #define ALT_USB_GLOB_GINTMSK_OTGINTMSK_GET(value) (((value) & 0x00000004) >> 2)
4834 /* Produces a ALT_USB_GLOB_GINTMSK_OTGINTMSK register field value suitable for setting the register. */
4835 #define ALT_USB_GLOB_GINTMSK_OTGINTMSK_SET(value) (((value) << 2) & 0x00000004)
4836 
4837 /*
4838  * Field : Start of (micro)Frame Mask - sofmsk
4839  *
4840  * Mode: Host and Device.
4841  *
4842  * Field Enumeration Values:
4843  *
4844  * Enum | Value | Description
4845  * :------------------------------------|:------|:-----------------------
4846  * ALT_USB_GLOB_GINTMSK_SOFMSK_E_MSK | 0x0 | Start of Frame Mask
4847  * ALT_USB_GLOB_GINTMSK_SOFMSK_E_NOMSK | 0x1 | No Mask Start of Frame
4848  *
4849  * Field Access Macros:
4850  *
4851  */
4852 /*
4853  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_SOFMSK
4854  *
4855  * Start of Frame Mask
4856  */
4857 #define ALT_USB_GLOB_GINTMSK_SOFMSK_E_MSK 0x0
4858 /*
4859  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_SOFMSK
4860  *
4861  * No Mask Start of Frame
4862  */
4863 #define ALT_USB_GLOB_GINTMSK_SOFMSK_E_NOMSK 0x1
4864 
4865 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_SOFMSK register field. */
4866 #define ALT_USB_GLOB_GINTMSK_SOFMSK_LSB 3
4867 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_SOFMSK register field. */
4868 #define ALT_USB_GLOB_GINTMSK_SOFMSK_MSB 3
4869 /* The width in bits of the ALT_USB_GLOB_GINTMSK_SOFMSK register field. */
4870 #define ALT_USB_GLOB_GINTMSK_SOFMSK_WIDTH 1
4871 /* The mask used to set the ALT_USB_GLOB_GINTMSK_SOFMSK register field value. */
4872 #define ALT_USB_GLOB_GINTMSK_SOFMSK_SET_MSK 0x00000008
4873 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_SOFMSK register field value. */
4874 #define ALT_USB_GLOB_GINTMSK_SOFMSK_CLR_MSK 0xfffffff7
4875 /* The reset value of the ALT_USB_GLOB_GINTMSK_SOFMSK register field. */
4876 #define ALT_USB_GLOB_GINTMSK_SOFMSK_RESET 0x0
4877 /* Extracts the ALT_USB_GLOB_GINTMSK_SOFMSK field value from a register. */
4878 #define ALT_USB_GLOB_GINTMSK_SOFMSK_GET(value) (((value) & 0x00000008) >> 3)
4879 /* Produces a ALT_USB_GLOB_GINTMSK_SOFMSK register field value suitable for setting the register. */
4880 #define ALT_USB_GLOB_GINTMSK_SOFMSK_SET(value) (((value) << 3) & 0x00000008)
4881 
4882 /*
4883  * Field : Receive FIFO Non-Empty Mask - rxflvlmsk
4884  *
4885  * Mode: Host and Device.
4886  *
4887  * Field Enumeration Values:
4888  *
4889  * Enum | Value | Description
4890  * :---------------------------------------|:------|:-------------------------------
4891  * ALT_USB_GLOB_GINTMSK_RXFLVLMSK_E_MSK | 0x0 | Receive FIFO Non-Empty Mask
4892  * ALT_USB_GLOB_GINTMSK_RXFLVLMSK_E_NOMSK | 0x1 | No maks Receive FIFO Non-Empty
4893  *
4894  * Field Access Macros:
4895  *
4896  */
4897 /*
4898  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_RXFLVLMSK
4899  *
4900  * Receive FIFO Non-Empty Mask
4901  */
4902 #define ALT_USB_GLOB_GINTMSK_RXFLVLMSK_E_MSK 0x0
4903 /*
4904  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_RXFLVLMSK
4905  *
4906  * No maks Receive FIFO Non-Empty
4907  */
4908 #define ALT_USB_GLOB_GINTMSK_RXFLVLMSK_E_NOMSK 0x1
4909 
4910 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_RXFLVLMSK register field. */
4911 #define ALT_USB_GLOB_GINTMSK_RXFLVLMSK_LSB 4
4912 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_RXFLVLMSK register field. */
4913 #define ALT_USB_GLOB_GINTMSK_RXFLVLMSK_MSB 4
4914 /* The width in bits of the ALT_USB_GLOB_GINTMSK_RXFLVLMSK register field. */
4915 #define ALT_USB_GLOB_GINTMSK_RXFLVLMSK_WIDTH 1
4916 /* The mask used to set the ALT_USB_GLOB_GINTMSK_RXFLVLMSK register field value. */
4917 #define ALT_USB_GLOB_GINTMSK_RXFLVLMSK_SET_MSK 0x00000010
4918 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_RXFLVLMSK register field value. */
4919 #define ALT_USB_GLOB_GINTMSK_RXFLVLMSK_CLR_MSK 0xffffffef
4920 /* The reset value of the ALT_USB_GLOB_GINTMSK_RXFLVLMSK register field. */
4921 #define ALT_USB_GLOB_GINTMSK_RXFLVLMSK_RESET 0x0
4922 /* Extracts the ALT_USB_GLOB_GINTMSK_RXFLVLMSK field value from a register. */
4923 #define ALT_USB_GLOB_GINTMSK_RXFLVLMSK_GET(value) (((value) & 0x00000010) >> 4)
4924 /* Produces a ALT_USB_GLOB_GINTMSK_RXFLVLMSK register field value suitable for setting the register. */
4925 #define ALT_USB_GLOB_GINTMSK_RXFLVLMSK_SET(value) (((value) << 4) & 0x00000010)
4926 
4927 /*
4928  * Field : Global Non-periodic IN NAK Effective Mask - ginnakeffmsk
4929  *
4930  * Mode: Device only.
4931  *
4932  * Field Enumeration Values:
4933  *
4934  * Enum | Value | Description
4935  * :------------------------------------------|:------|:---------------------------------------------
4936  * ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK_E_MSK | 0x0 | Global Non-periodic IN NAK Effective Mask
4937  * ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK_E_NOMSK | 0x1 | No mask Global Non-periodic IN NAK Effective
4938  *
4939  * Field Access Macros:
4940  *
4941  */
4942 /*
4943  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK
4944  *
4945  * Global Non-periodic IN NAK Effective Mask
4946  */
4947 #define ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK_E_MSK 0x0
4948 /*
4949  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK
4950  *
4951  * No mask Global Non-periodic IN NAK Effective
4952  */
4953 #define ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK_E_NOMSK 0x1
4954 
4955 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK register field. */
4956 #define ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK_LSB 6
4957 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK register field. */
4958 #define ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK_MSB 6
4959 /* The width in bits of the ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK register field. */
4960 #define ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK_WIDTH 1
4961 /* The mask used to set the ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK register field value. */
4962 #define ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK_SET_MSK 0x00000040
4963 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK register field value. */
4964 #define ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK_CLR_MSK 0xffffffbf
4965 /* The reset value of the ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK register field. */
4966 #define ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK_RESET 0x0
4967 /* Extracts the ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK field value from a register. */
4968 #define ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK_GET(value) (((value) & 0x00000040) >> 6)
4969 /* Produces a ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK register field value suitable for setting the register. */
4970 #define ALT_USB_GLOB_GINTMSK_GINNAKEFFMSK_SET(value) (((value) << 6) & 0x00000040)
4971 
4972 /*
4973  * Field : Global OUT NAK Effective Mask - goutnakeffmsk
4974  *
4975  * Mode: Device only.
4976  *
4977  * Field Enumeration Values:
4978  *
4979  * Enum | Value | Description
4980  * :--------------------------------------------|:------|:---------------------------------
4981  * ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK_E_MSK | 0x0 | Global OUT NAK Effective Mask
4982  * ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK_E_NOMAKS | 0x1 | No mask Global OUT NAK Effective
4983  *
4984  * Field Access Macros:
4985  *
4986  */
4987 /*
4988  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK
4989  *
4990  * Global OUT NAK Effective Mask
4991  */
4992 #define ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK_E_MSK 0x0
4993 /*
4994  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK
4995  *
4996  * No mask Global OUT NAK Effective
4997  */
4998 #define ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK_E_NOMAKS 0x1
4999 
5000 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK register field. */
5001 #define ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK_LSB 7
5002 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK register field. */
5003 #define ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK_MSB 7
5004 /* The width in bits of the ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK register field. */
5005 #define ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK_WIDTH 1
5006 /* The mask used to set the ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK register field value. */
5007 #define ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK_SET_MSK 0x00000080
5008 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK register field value. */
5009 #define ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK_CLR_MSK 0xffffff7f
5010 /* The reset value of the ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK register field. */
5011 #define ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK_RESET 0x0
5012 /* Extracts the ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK field value from a register. */
5013 #define ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK_GET(value) (((value) & 0x00000080) >> 7)
5014 /* Produces a ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK register field value suitable for setting the register. */
5015 #define ALT_USB_GLOB_GINTMSK_GOUTNAKEFFMSK_SET(value) (((value) << 7) & 0x00000080)
5016 
5017 /*
5018  * Field : Early Suspend Mask - erlysuspmsk
5019  *
5020  * Mode: Device only.
5021  *
5022  * Field Enumeration Values:
5023  *
5024  * Enum | Value | Description
5025  * :-----------------------------------------|:------|:---------------------------
5026  * ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK_E_MSK | 0x0 | Early Suspend Mask
5027  * ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK_E_NOMSK | 0x1 | No mask Early Suspend Mask
5028  *
5029  * Field Access Macros:
5030  *
5031  */
5032 /*
5033  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK
5034  *
5035  * Early Suspend Mask
5036  */
5037 #define ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK_E_MSK 0x0
5038 /*
5039  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK
5040  *
5041  * No mask Early Suspend Mask
5042  */
5043 #define ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK_E_NOMSK 0x1
5044 
5045 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK register field. */
5046 #define ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK_LSB 10
5047 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK register field. */
5048 #define ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK_MSB 10
5049 /* The width in bits of the ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK register field. */
5050 #define ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK_WIDTH 1
5051 /* The mask used to set the ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK register field value. */
5052 #define ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK_SET_MSK 0x00000400
5053 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK register field value. */
5054 #define ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK_CLR_MSK 0xfffffbff
5055 /* The reset value of the ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK register field. */
5056 #define ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK_RESET 0x0
5057 /* Extracts the ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK field value from a register. */
5058 #define ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK_GET(value) (((value) & 0x00000400) >> 10)
5059 /* Produces a ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK register field value suitable for setting the register. */
5060 #define ALT_USB_GLOB_GINTMSK_ERLYSUSPMSK_SET(value) (((value) << 10) & 0x00000400)
5061 
5062 /*
5063  * Field : USB Suspend Mask - usbsuspmsk
5064  *
5065  * Mode: Device only.
5066  *
5067  * Field Enumeration Values:
5068  *
5069  * Enum | Value | Description
5070  * :----------------------------------------|:------|:---------------------
5071  * ALT_USB_GLOB_GINTMSK_USBSUSPMSK_E_MSK | 0x0 | USB Suspend Mask
5072  * ALT_USB_GLOB_GINTMSK_USBSUSPMSK_E_NOMSK | 0x1 | No mask USB Suspend
5073  *
5074  * Field Access Macros:
5075  *
5076  */
5077 /*
5078  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_USBSUSPMSK
5079  *
5080  * USB Suspend Mask
5081  */
5082 #define ALT_USB_GLOB_GINTMSK_USBSUSPMSK_E_MSK 0x0
5083 /*
5084  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_USBSUSPMSK
5085  *
5086  * No mask USB Suspend
5087  */
5088 #define ALT_USB_GLOB_GINTMSK_USBSUSPMSK_E_NOMSK 0x1
5089 
5090 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_USBSUSPMSK register field. */
5091 #define ALT_USB_GLOB_GINTMSK_USBSUSPMSK_LSB 11
5092 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_USBSUSPMSK register field. */
5093 #define ALT_USB_GLOB_GINTMSK_USBSUSPMSK_MSB 11
5094 /* The width in bits of the ALT_USB_GLOB_GINTMSK_USBSUSPMSK register field. */
5095 #define ALT_USB_GLOB_GINTMSK_USBSUSPMSK_WIDTH 1
5096 /* The mask used to set the ALT_USB_GLOB_GINTMSK_USBSUSPMSK register field value. */
5097 #define ALT_USB_GLOB_GINTMSK_USBSUSPMSK_SET_MSK 0x00000800
5098 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_USBSUSPMSK register field value. */
5099 #define ALT_USB_GLOB_GINTMSK_USBSUSPMSK_CLR_MSK 0xfffff7ff
5100 /* The reset value of the ALT_USB_GLOB_GINTMSK_USBSUSPMSK register field. */
5101 #define ALT_USB_GLOB_GINTMSK_USBSUSPMSK_RESET 0x0
5102 /* Extracts the ALT_USB_GLOB_GINTMSK_USBSUSPMSK field value from a register. */
5103 #define ALT_USB_GLOB_GINTMSK_USBSUSPMSK_GET(value) (((value) & 0x00000800) >> 11)
5104 /* Produces a ALT_USB_GLOB_GINTMSK_USBSUSPMSK register field value suitable for setting the register. */
5105 #define ALT_USB_GLOB_GINTMSK_USBSUSPMSK_SET(value) (((value) << 11) & 0x00000800)
5106 
5107 /*
5108  * Field : USB Reset Mask - usbrstmsk
5109  *
5110  * Mode: Device only.
5111  *
5112  * Field Enumeration Values:
5113  *
5114  * Enum | Value | Description
5115  * :---------------------------------------|:------|:------------------
5116  * ALT_USB_GLOB_GINTMSK_USBRSTMSK_E_MSK | 0x0 | USB Reset Mask
5117  * ALT_USB_GLOB_GINTMSK_USBRSTMSK_E_NOMSK | 0x1 | No mask USB Reset
5118  *
5119  * Field Access Macros:
5120  *
5121  */
5122 /*
5123  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_USBRSTMSK
5124  *
5125  * USB Reset Mask
5126  */
5127 #define ALT_USB_GLOB_GINTMSK_USBRSTMSK_E_MSK 0x0
5128 /*
5129  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_USBRSTMSK
5130  *
5131  * No mask USB Reset
5132  */
5133 #define ALT_USB_GLOB_GINTMSK_USBRSTMSK_E_NOMSK 0x1
5134 
5135 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_USBRSTMSK register field. */
5136 #define ALT_USB_GLOB_GINTMSK_USBRSTMSK_LSB 12
5137 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_USBRSTMSK register field. */
5138 #define ALT_USB_GLOB_GINTMSK_USBRSTMSK_MSB 12
5139 /* The width in bits of the ALT_USB_GLOB_GINTMSK_USBRSTMSK register field. */
5140 #define ALT_USB_GLOB_GINTMSK_USBRSTMSK_WIDTH 1
5141 /* The mask used to set the ALT_USB_GLOB_GINTMSK_USBRSTMSK register field value. */
5142 #define ALT_USB_GLOB_GINTMSK_USBRSTMSK_SET_MSK 0x00001000
5143 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_USBRSTMSK register field value. */
5144 #define ALT_USB_GLOB_GINTMSK_USBRSTMSK_CLR_MSK 0xffffefff
5145 /* The reset value of the ALT_USB_GLOB_GINTMSK_USBRSTMSK register field. */
5146 #define ALT_USB_GLOB_GINTMSK_USBRSTMSK_RESET 0x0
5147 /* Extracts the ALT_USB_GLOB_GINTMSK_USBRSTMSK field value from a register. */
5148 #define ALT_USB_GLOB_GINTMSK_USBRSTMSK_GET(value) (((value) & 0x00001000) >> 12)
5149 /* Produces a ALT_USB_GLOB_GINTMSK_USBRSTMSK register field value suitable for setting the register. */
5150 #define ALT_USB_GLOB_GINTMSK_USBRSTMSK_SET(value) (((value) << 12) & 0x00001000)
5151 
5152 /*
5153  * Field : Enumeration Done Mask - enumdonemsk
5154  *
5155  * Mode: Device only.
5156  *
5157  * Field Enumeration Values:
5158  *
5159  * Enum | Value | Description
5160  * :-----------------------------------------|:------|:-------------------------
5161  * ALT_USB_GLOB_GINTMSK_ENUMDONEMSK_E_MSK | 0x0 | Enumeration Done Mask
5162  * ALT_USB_GLOB_GINTMSK_ENUMDONEMSK_E_NOMSK | 0x1 | No mask Enumeration Done
5163  *
5164  * Field Access Macros:
5165  *
5166  */
5167 /*
5168  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_ENUMDONEMSK
5169  *
5170  * Enumeration Done Mask
5171  */
5172 #define ALT_USB_GLOB_GINTMSK_ENUMDONEMSK_E_MSK 0x0
5173 /*
5174  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_ENUMDONEMSK
5175  *
5176  * No mask Enumeration Done
5177  */
5178 #define ALT_USB_GLOB_GINTMSK_ENUMDONEMSK_E_NOMSK 0x1
5179 
5180 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_ENUMDONEMSK register field. */
5181 #define ALT_USB_GLOB_GINTMSK_ENUMDONEMSK_LSB 13
5182 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_ENUMDONEMSK register field. */
5183 #define ALT_USB_GLOB_GINTMSK_ENUMDONEMSK_MSB 13
5184 /* The width in bits of the ALT_USB_GLOB_GINTMSK_ENUMDONEMSK register field. */
5185 #define ALT_USB_GLOB_GINTMSK_ENUMDONEMSK_WIDTH 1
5186 /* The mask used to set the ALT_USB_GLOB_GINTMSK_ENUMDONEMSK register field value. */
5187 #define ALT_USB_GLOB_GINTMSK_ENUMDONEMSK_SET_MSK 0x00002000
5188 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_ENUMDONEMSK register field value. */
5189 #define ALT_USB_GLOB_GINTMSK_ENUMDONEMSK_CLR_MSK 0xffffdfff
5190 /* The reset value of the ALT_USB_GLOB_GINTMSK_ENUMDONEMSK register field. */
5191 #define ALT_USB_GLOB_GINTMSK_ENUMDONEMSK_RESET 0x0
5192 /* Extracts the ALT_USB_GLOB_GINTMSK_ENUMDONEMSK field value from a register. */
5193 #define ALT_USB_GLOB_GINTMSK_ENUMDONEMSK_GET(value) (((value) & 0x00002000) >> 13)
5194 /* Produces a ALT_USB_GLOB_GINTMSK_ENUMDONEMSK register field value suitable for setting the register. */
5195 #define ALT_USB_GLOB_GINTMSK_ENUMDONEMSK_SET(value) (((value) << 13) & 0x00002000)
5196 
5197 /*
5198  * Field : Isochronous OUT Packet Dropped Interrupt Mask - isooutdropmsk
5199  *
5200  * Mode: Device only.
5201  *
5202  * Field Enumeration Values:
5203  *
5204  * Enum | Value | Description
5205  * :-------------------------------------------|:------|:-------------------------------------------------
5206  * ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK_E_MSK | 0x0 | Isochronous OUT Packet Dropped Interrupt Mask
5207  * ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK_E_NOMSK | 0x1 | No mask Isochronous OUT Packet Dropped Interrupt
5208  *
5209  * Field Access Macros:
5210  *
5211  */
5212 /*
5213  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK
5214  *
5215  * Isochronous OUT Packet Dropped Interrupt Mask
5216  */
5217 #define ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK_E_MSK 0x0
5218 /*
5219  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK
5220  *
5221  * No mask Isochronous OUT Packet Dropped Interrupt
5222  */
5223 #define ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK_E_NOMSK 0x1
5224 
5225 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK register field. */
5226 #define ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK_LSB 14
5227 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK register field. */
5228 #define ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK_MSB 14
5229 /* The width in bits of the ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK register field. */
5230 #define ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK_WIDTH 1
5231 /* The mask used to set the ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK register field value. */
5232 #define ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK_SET_MSK 0x00004000
5233 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK register field value. */
5234 #define ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK_CLR_MSK 0xffffbfff
5235 /* The reset value of the ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK register field. */
5236 #define ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK_RESET 0x0
5237 /* Extracts the ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK field value from a register. */
5238 #define ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK_GET(value) (((value) & 0x00004000) >> 14)
5239 /* Produces a ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK register field value suitable for setting the register. */
5240 #define ALT_USB_GLOB_GINTMSK_ISOOUTDROPMSK_SET(value) (((value) << 14) & 0x00004000)
5241 
5242 /*
5243  * Field : End of Periodic Frame Interrupt Mask - eopfmsk
5244  *
5245  * Mode: Device only. End of Periodic Frame Interrupt Mask (EOPFMsk)
5246  *
5247  * Field Enumeration Values:
5248  *
5249  * Enum | Value | Description
5250  * :-------------------------------------|:------|:----------------------------------------
5251  * ALT_USB_GLOB_GINTMSK_EOPFMSK_E_MSK | 0x0 | End of Periodic Frame Interrupt Mask
5252  * ALT_USB_GLOB_GINTMSK_EOPFMSK_E_NOMSK | 0x1 | No mask End of Periodic Frame Interrupt
5253  *
5254  * Field Access Macros:
5255  *
5256  */
5257 /*
5258  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_EOPFMSK
5259  *
5260  * End of Periodic Frame Interrupt Mask
5261  */
5262 #define ALT_USB_GLOB_GINTMSK_EOPFMSK_E_MSK 0x0
5263 /*
5264  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_EOPFMSK
5265  *
5266  * No mask End of Periodic Frame Interrupt
5267  */
5268 #define ALT_USB_GLOB_GINTMSK_EOPFMSK_E_NOMSK 0x1
5269 
5270 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_EOPFMSK register field. */
5271 #define ALT_USB_GLOB_GINTMSK_EOPFMSK_LSB 15
5272 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_EOPFMSK register field. */
5273 #define ALT_USB_GLOB_GINTMSK_EOPFMSK_MSB 15
5274 /* The width in bits of the ALT_USB_GLOB_GINTMSK_EOPFMSK register field. */
5275 #define ALT_USB_GLOB_GINTMSK_EOPFMSK_WIDTH 1
5276 /* The mask used to set the ALT_USB_GLOB_GINTMSK_EOPFMSK register field value. */
5277 #define ALT_USB_GLOB_GINTMSK_EOPFMSK_SET_MSK 0x00008000
5278 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_EOPFMSK register field value. */
5279 #define ALT_USB_GLOB_GINTMSK_EOPFMSK_CLR_MSK 0xffff7fff
5280 /* The reset value of the ALT_USB_GLOB_GINTMSK_EOPFMSK register field. */
5281 #define ALT_USB_GLOB_GINTMSK_EOPFMSK_RESET 0x0
5282 /* Extracts the ALT_USB_GLOB_GINTMSK_EOPFMSK field value from a register. */
5283 #define ALT_USB_GLOB_GINTMSK_EOPFMSK_GET(value) (((value) & 0x00008000) >> 15)
5284 /* Produces a ALT_USB_GLOB_GINTMSK_EOPFMSK register field value suitable for setting the register. */
5285 #define ALT_USB_GLOB_GINTMSK_EOPFMSK_SET(value) (((value) << 15) & 0x00008000)
5286 
5287 /*
5288  * Field : Endpoint Mismatch Interrupt Mask - epmismsk
5289  *
5290  * Mode: Device only.
5291  *
5292  * Field Enumeration Values:
5293  *
5294  * Enum | Value | Description
5295  * :--------------------------------------|:------|:------------------------------------
5296  * ALT_USB_GLOB_GINTMSK_EPMISMSK_E_MSK | 0x0 | Endpoint Mismatch Interrupt Mask
5297  * ALT_USB_GLOB_GINTMSK_EPMISMSK_E_NOMSK | 0x1 | No mask Endpoint Mismatch Interrupt
5298  *
5299  * Field Access Macros:
5300  *
5301  */
5302 /*
5303  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_EPMISMSK
5304  *
5305  * Endpoint Mismatch Interrupt Mask
5306  */
5307 #define ALT_USB_GLOB_GINTMSK_EPMISMSK_E_MSK 0x0
5308 /*
5309  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_EPMISMSK
5310  *
5311  * No mask Endpoint Mismatch Interrupt
5312  */
5313 #define ALT_USB_GLOB_GINTMSK_EPMISMSK_E_NOMSK 0x1
5314 
5315 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_EPMISMSK register field. */
5316 #define ALT_USB_GLOB_GINTMSK_EPMISMSK_LSB 17
5317 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_EPMISMSK register field. */
5318 #define ALT_USB_GLOB_GINTMSK_EPMISMSK_MSB 17
5319 /* The width in bits of the ALT_USB_GLOB_GINTMSK_EPMISMSK register field. */
5320 #define ALT_USB_GLOB_GINTMSK_EPMISMSK_WIDTH 1
5321 /* The mask used to set the ALT_USB_GLOB_GINTMSK_EPMISMSK register field value. */
5322 #define ALT_USB_GLOB_GINTMSK_EPMISMSK_SET_MSK 0x00020000
5323 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_EPMISMSK register field value. */
5324 #define ALT_USB_GLOB_GINTMSK_EPMISMSK_CLR_MSK 0xfffdffff
5325 /* The reset value of the ALT_USB_GLOB_GINTMSK_EPMISMSK register field. */
5326 #define ALT_USB_GLOB_GINTMSK_EPMISMSK_RESET 0x0
5327 /* Extracts the ALT_USB_GLOB_GINTMSK_EPMISMSK field value from a register. */
5328 #define ALT_USB_GLOB_GINTMSK_EPMISMSK_GET(value) (((value) & 0x00020000) >> 17)
5329 /* Produces a ALT_USB_GLOB_GINTMSK_EPMISMSK register field value suitable for setting the register. */
5330 #define ALT_USB_GLOB_GINTMSK_EPMISMSK_SET(value) (((value) << 17) & 0x00020000)
5331 
5332 /*
5333  * Field : IN Endpoints Interrupt Mask - iepintmsk
5334  *
5335  * Mode: Device only.
5336  *
5337  * Field Enumeration Values:
5338  *
5339  * Enum | Value | Description
5340  * :----------------------------------------|:------|:-------------------------------
5341  * ALT_USB_GLOB_GINTMSK_IEPINTMSK_E_MSK | 0x0 | IN Endpoints Interrupt Mask
5342  * ALT_USB_GLOB_GINTMSK_IEPINTMSK_E_NOMAKS | 0x1 | No mask IN Endpoints Interrupt
5343  *
5344  * Field Access Macros:
5345  *
5346  */
5347 /*
5348  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_IEPINTMSK
5349  *
5350  * IN Endpoints Interrupt Mask
5351  */
5352 #define ALT_USB_GLOB_GINTMSK_IEPINTMSK_E_MSK 0x0
5353 /*
5354  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_IEPINTMSK
5355  *
5356  * No mask IN Endpoints Interrupt
5357  */
5358 #define ALT_USB_GLOB_GINTMSK_IEPINTMSK_E_NOMAKS 0x1
5359 
5360 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_IEPINTMSK register field. */
5361 #define ALT_USB_GLOB_GINTMSK_IEPINTMSK_LSB 18
5362 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_IEPINTMSK register field. */
5363 #define ALT_USB_GLOB_GINTMSK_IEPINTMSK_MSB 18
5364 /* The width in bits of the ALT_USB_GLOB_GINTMSK_IEPINTMSK register field. */
5365 #define ALT_USB_GLOB_GINTMSK_IEPINTMSK_WIDTH 1
5366 /* The mask used to set the ALT_USB_GLOB_GINTMSK_IEPINTMSK register field value. */
5367 #define ALT_USB_GLOB_GINTMSK_IEPINTMSK_SET_MSK 0x00040000
5368 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_IEPINTMSK register field value. */
5369 #define ALT_USB_GLOB_GINTMSK_IEPINTMSK_CLR_MSK 0xfffbffff
5370 /* The reset value of the ALT_USB_GLOB_GINTMSK_IEPINTMSK register field. */
5371 #define ALT_USB_GLOB_GINTMSK_IEPINTMSK_RESET 0x0
5372 /* Extracts the ALT_USB_GLOB_GINTMSK_IEPINTMSK field value from a register. */
5373 #define ALT_USB_GLOB_GINTMSK_IEPINTMSK_GET(value) (((value) & 0x00040000) >> 18)
5374 /* Produces a ALT_USB_GLOB_GINTMSK_IEPINTMSK register field value suitable for setting the register. */
5375 #define ALT_USB_GLOB_GINTMSK_IEPINTMSK_SET(value) (((value) << 18) & 0x00040000)
5376 
5377 /*
5378  * Field : OUT Endpoints Interrupt Mask - oepintmsk
5379  *
5380  * Mode: Device only.
5381  *
5382  * Field Enumeration Values:
5383  *
5384  * Enum | Value | Description
5385  * :---------------------------------------|:------|:--------------------------------
5386  * ALT_USB_GLOB_GINTMSK_OEPINTMSK_E_MSK | 0x0 | OUT Endpoints Interrupt Mask
5387  * ALT_USB_GLOB_GINTMSK_OEPINTMSK_E_NOMSK | 0x1 | No mask OUT Endpoints Interrupt
5388  *
5389  * Field Access Macros:
5390  *
5391  */
5392 /*
5393  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_OEPINTMSK
5394  *
5395  * OUT Endpoints Interrupt Mask
5396  */
5397 #define ALT_USB_GLOB_GINTMSK_OEPINTMSK_E_MSK 0x0
5398 /*
5399  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_OEPINTMSK
5400  *
5401  * No mask OUT Endpoints Interrupt
5402  */
5403 #define ALT_USB_GLOB_GINTMSK_OEPINTMSK_E_NOMSK 0x1
5404 
5405 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_OEPINTMSK register field. */
5406 #define ALT_USB_GLOB_GINTMSK_OEPINTMSK_LSB 19
5407 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_OEPINTMSK register field. */
5408 #define ALT_USB_GLOB_GINTMSK_OEPINTMSK_MSB 19
5409 /* The width in bits of the ALT_USB_GLOB_GINTMSK_OEPINTMSK register field. */
5410 #define ALT_USB_GLOB_GINTMSK_OEPINTMSK_WIDTH 1
5411 /* The mask used to set the ALT_USB_GLOB_GINTMSK_OEPINTMSK register field value. */
5412 #define ALT_USB_GLOB_GINTMSK_OEPINTMSK_SET_MSK 0x00080000
5413 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_OEPINTMSK register field value. */
5414 #define ALT_USB_GLOB_GINTMSK_OEPINTMSK_CLR_MSK 0xfff7ffff
5415 /* The reset value of the ALT_USB_GLOB_GINTMSK_OEPINTMSK register field. */
5416 #define ALT_USB_GLOB_GINTMSK_OEPINTMSK_RESET 0x0
5417 /* Extracts the ALT_USB_GLOB_GINTMSK_OEPINTMSK field value from a register. */
5418 #define ALT_USB_GLOB_GINTMSK_OEPINTMSK_GET(value) (((value) & 0x00080000) >> 19)
5419 /* Produces a ALT_USB_GLOB_GINTMSK_OEPINTMSK register field value suitable for setting the register. */
5420 #define ALT_USB_GLOB_GINTMSK_OEPINTMSK_SET(value) (((value) << 19) & 0x00080000)
5421 
5422 /*
5423  * Field : Incomplete Isochronous IN Transfer Mask - incompisoinmsk
5424  *
5425  * Mode: Device only.
5426  *
5427  * Field Enumeration Values:
5428  *
5429  * Enum | Value | Description
5430  * :--------------------------------------------|:------|:-------------------------------------------
5431  * ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK_E_MSK | 0x0 | Incomplete Isochronous IN Transfer Mask
5432  * ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK_E_NOMSK | 0x1 | No mask Incomplete Isochronous IN Transfer
5433  *
5434  * Field Access Macros:
5435  *
5436  */
5437 /*
5438  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK
5439  *
5440  * Incomplete Isochronous IN Transfer Mask
5441  */
5442 #define ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK_E_MSK 0x0
5443 /*
5444  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK
5445  *
5446  * No mask Incomplete Isochronous IN Transfer
5447  */
5448 #define ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK_E_NOMSK 0x1
5449 
5450 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK register field. */
5451 #define ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK_LSB 20
5452 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK register field. */
5453 #define ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK_MSB 20
5454 /* The width in bits of the ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK register field. */
5455 #define ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK_WIDTH 1
5456 /* The mask used to set the ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK register field value. */
5457 #define ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK_SET_MSK 0x00100000
5458 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK register field value. */
5459 #define ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK_CLR_MSK 0xffefffff
5460 /* The reset value of the ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK register field. */
5461 #define ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK_RESET 0x0
5462 /* Extracts the ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK field value from a register. */
5463 #define ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK_GET(value) (((value) & 0x00100000) >> 20)
5464 /* Produces a ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK register field value suitable for setting the register. */
5465 #define ALT_USB_GLOB_GINTMSK_INCOMPISOINMSK_SET(value) (((value) << 20) & 0x00100000)
5466 
5467 /*
5468  * Field : Incomplete Periodic Transfer Mask - incomplpmsk
5469  *
5470  * Mode: Host only.
5471  *
5472  * Field Enumeration Values:
5473  *
5474  * Enum | Value | Description
5475  * :-----------------------------------------|:------|:-------------------------------------
5476  * ALT_USB_GLOB_GINTMSK_INCOMPLPMSK_E_MSK | 0x0 | Incomplete Periodic Transfer Mask
5477  * ALT_USB_GLOB_GINTMSK_INCOMPLPMSK_E_NOMSK | 0x1 | No mask Incomplete Periodic Transfer
5478  *
5479  * Field Access Macros:
5480  *
5481  */
5482 /*
5483  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_INCOMPLPMSK
5484  *
5485  * Incomplete Periodic Transfer Mask
5486  */
5487 #define ALT_USB_GLOB_GINTMSK_INCOMPLPMSK_E_MSK 0x0
5488 /*
5489  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_INCOMPLPMSK
5490  *
5491  * No mask Incomplete Periodic Transfer
5492  */
5493 #define ALT_USB_GLOB_GINTMSK_INCOMPLPMSK_E_NOMSK 0x1
5494 
5495 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_INCOMPLPMSK register field. */
5496 #define ALT_USB_GLOB_GINTMSK_INCOMPLPMSK_LSB 21
5497 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_INCOMPLPMSK register field. */
5498 #define ALT_USB_GLOB_GINTMSK_INCOMPLPMSK_MSB 21
5499 /* The width in bits of the ALT_USB_GLOB_GINTMSK_INCOMPLPMSK register field. */
5500 #define ALT_USB_GLOB_GINTMSK_INCOMPLPMSK_WIDTH 1
5501 /* The mask used to set the ALT_USB_GLOB_GINTMSK_INCOMPLPMSK register field value. */
5502 #define ALT_USB_GLOB_GINTMSK_INCOMPLPMSK_SET_MSK 0x00200000
5503 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_INCOMPLPMSK register field value. */
5504 #define ALT_USB_GLOB_GINTMSK_INCOMPLPMSK_CLR_MSK 0xffdfffff
5505 /* The reset value of the ALT_USB_GLOB_GINTMSK_INCOMPLPMSK register field. */
5506 #define ALT_USB_GLOB_GINTMSK_INCOMPLPMSK_RESET 0x0
5507 /* Extracts the ALT_USB_GLOB_GINTMSK_INCOMPLPMSK field value from a register. */
5508 #define ALT_USB_GLOB_GINTMSK_INCOMPLPMSK_GET(value) (((value) & 0x00200000) >> 21)
5509 /* Produces a ALT_USB_GLOB_GINTMSK_INCOMPLPMSK register field value suitable for setting the register. */
5510 #define ALT_USB_GLOB_GINTMSK_INCOMPLPMSK_SET(value) (((value) << 21) & 0x00200000)
5511 
5512 /*
5513  * Field : Data Fetch Suspended Mask - fetsuspmsk
5514  *
5515  * Mode: Device only.
5516  *
5517  * Field Enumeration Values:
5518  *
5519  * Enum | Value | Description
5520  * :----------------------------------------|:------|:-----------------------------
5521  * ALT_USB_GLOB_GINTMSK_FETSUSPMSK_E_MSK | 0x0 | Data Fetch Suspended Mask
5522  * ALT_USB_GLOB_GINTMSK_FETSUSPMSK_E_NOMSK | 0x1 | No mask Data Fetch Suspended
5523  *
5524  * Field Access Macros:
5525  *
5526  */
5527 /*
5528  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_FETSUSPMSK
5529  *
5530  * Data Fetch Suspended Mask
5531  */
5532 #define ALT_USB_GLOB_GINTMSK_FETSUSPMSK_E_MSK 0x0
5533 /*
5534  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_FETSUSPMSK
5535  *
5536  * No mask Data Fetch Suspended
5537  */
5538 #define ALT_USB_GLOB_GINTMSK_FETSUSPMSK_E_NOMSK 0x1
5539 
5540 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_FETSUSPMSK register field. */
5541 #define ALT_USB_GLOB_GINTMSK_FETSUSPMSK_LSB 22
5542 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_FETSUSPMSK register field. */
5543 #define ALT_USB_GLOB_GINTMSK_FETSUSPMSK_MSB 22
5544 /* The width in bits of the ALT_USB_GLOB_GINTMSK_FETSUSPMSK register field. */
5545 #define ALT_USB_GLOB_GINTMSK_FETSUSPMSK_WIDTH 1
5546 /* The mask used to set the ALT_USB_GLOB_GINTMSK_FETSUSPMSK register field value. */
5547 #define ALT_USB_GLOB_GINTMSK_FETSUSPMSK_SET_MSK 0x00400000
5548 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_FETSUSPMSK register field value. */
5549 #define ALT_USB_GLOB_GINTMSK_FETSUSPMSK_CLR_MSK 0xffbfffff
5550 /* The reset value of the ALT_USB_GLOB_GINTMSK_FETSUSPMSK register field. */
5551 #define ALT_USB_GLOB_GINTMSK_FETSUSPMSK_RESET 0x0
5552 /* Extracts the ALT_USB_GLOB_GINTMSK_FETSUSPMSK field value from a register. */
5553 #define ALT_USB_GLOB_GINTMSK_FETSUSPMSK_GET(value) (((value) & 0x00400000) >> 22)
5554 /* Produces a ALT_USB_GLOB_GINTMSK_FETSUSPMSK register field value suitable for setting the register. */
5555 #define ALT_USB_GLOB_GINTMSK_FETSUSPMSK_SET(value) (((value) << 22) & 0x00400000)
5556 
5557 /*
5558  * Field : Reset detected Interrupt Mask - resetdetmsk
5559  *
5560  * Mode: Device only.
5561  *
5562  * Field Enumeration Values:
5563  *
5564  * Enum | Value | Description
5565  * :---------------------------------------|:------|:---------------------------------
5566  * ALT_USB_GLOB_GINTMSK_RSTDETMSK_E_MSK | 0x0 | Reset detected Interrupt Mask
5567  * ALT_USB_GLOB_GINTMSK_RSTDETMSK_E_NOMSK | 0x1 | No mask Reset detected Interrupt
5568  *
5569  * Field Access Macros:
5570  *
5571  */
5572 /*
5573  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_RSTDETMSK
5574  *
5575  * Reset detected Interrupt Mask
5576  */
5577 #define ALT_USB_GLOB_GINTMSK_RSTDETMSK_E_MSK 0x0
5578 /*
5579  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_RSTDETMSK
5580  *
5581  * No mask Reset detected Interrupt
5582  */
5583 #define ALT_USB_GLOB_GINTMSK_RSTDETMSK_E_NOMSK 0x1
5584 
5585 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_RSTDETMSK register field. */
5586 #define ALT_USB_GLOB_GINTMSK_RSTDETMSK_LSB 23
5587 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_RSTDETMSK register field. */
5588 #define ALT_USB_GLOB_GINTMSK_RSTDETMSK_MSB 23
5589 /* The width in bits of the ALT_USB_GLOB_GINTMSK_RSTDETMSK register field. */
5590 #define ALT_USB_GLOB_GINTMSK_RSTDETMSK_WIDTH 1
5591 /* The mask used to set the ALT_USB_GLOB_GINTMSK_RSTDETMSK register field value. */
5592 #define ALT_USB_GLOB_GINTMSK_RSTDETMSK_SET_MSK 0x00800000
5593 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_RSTDETMSK register field value. */
5594 #define ALT_USB_GLOB_GINTMSK_RSTDETMSK_CLR_MSK 0xff7fffff
5595 /* The reset value of the ALT_USB_GLOB_GINTMSK_RSTDETMSK register field. */
5596 #define ALT_USB_GLOB_GINTMSK_RSTDETMSK_RESET 0x0
5597 /* Extracts the ALT_USB_GLOB_GINTMSK_RSTDETMSK field value from a register. */
5598 #define ALT_USB_GLOB_GINTMSK_RSTDETMSK_GET(value) (((value) & 0x00800000) >> 23)
5599 /* Produces a ALT_USB_GLOB_GINTMSK_RSTDETMSK register field value suitable for setting the register. */
5600 #define ALT_USB_GLOB_GINTMSK_RSTDETMSK_SET(value) (((value) << 23) & 0x00800000)
5601 
5602 /*
5603  * Field : Host Port Interrupt Mask - prtintmsk
5604  *
5605  * Mode: Host only.
5606  *
5607  * Field Enumeration Values:
5608  *
5609  * Enum | Value | Description
5610  * :---------------------------------------|:------|:----------------------------
5611  * ALT_USB_GLOB_GINTMSK_PRTINTMSK_E_MSK | 0x0 | Host Port Interrupt Mask
5612  * ALT_USB_GLOB_GINTMSK_PRTINTMSK_E_NOMSK | 0x1 | No mask Host Port Interrupt
5613  *
5614  * Field Access Macros:
5615  *
5616  */
5617 /*
5618  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_PRTINTMSK
5619  *
5620  * Host Port Interrupt Mask
5621  */
5622 #define ALT_USB_GLOB_GINTMSK_PRTINTMSK_E_MSK 0x0
5623 /*
5624  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_PRTINTMSK
5625  *
5626  * No mask Host Port Interrupt
5627  */
5628 #define ALT_USB_GLOB_GINTMSK_PRTINTMSK_E_NOMSK 0x1
5629 
5630 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_PRTINTMSK register field. */
5631 #define ALT_USB_GLOB_GINTMSK_PRTINTMSK_LSB 24
5632 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_PRTINTMSK register field. */
5633 #define ALT_USB_GLOB_GINTMSK_PRTINTMSK_MSB 24
5634 /* The width in bits of the ALT_USB_GLOB_GINTMSK_PRTINTMSK register field. */
5635 #define ALT_USB_GLOB_GINTMSK_PRTINTMSK_WIDTH 1
5636 /* The mask used to set the ALT_USB_GLOB_GINTMSK_PRTINTMSK register field value. */
5637 #define ALT_USB_GLOB_GINTMSK_PRTINTMSK_SET_MSK 0x01000000
5638 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_PRTINTMSK register field value. */
5639 #define ALT_USB_GLOB_GINTMSK_PRTINTMSK_CLR_MSK 0xfeffffff
5640 /* The reset value of the ALT_USB_GLOB_GINTMSK_PRTINTMSK register field. */
5641 #define ALT_USB_GLOB_GINTMSK_PRTINTMSK_RESET 0x0
5642 /* Extracts the ALT_USB_GLOB_GINTMSK_PRTINTMSK field value from a register. */
5643 #define ALT_USB_GLOB_GINTMSK_PRTINTMSK_GET(value) (((value) & 0x01000000) >> 24)
5644 /* Produces a ALT_USB_GLOB_GINTMSK_PRTINTMSK register field value suitable for setting the register. */
5645 #define ALT_USB_GLOB_GINTMSK_PRTINTMSK_SET(value) (((value) << 24) & 0x01000000)
5646 
5647 /*
5648  * Field : Host Channels Interrupt Mask - hchintmsk
5649  *
5650  * Mode: Host only.
5651  *
5652  * Field Enumeration Values:
5653  *
5654  * Enum | Value | Description
5655  * :---------------------------------------|:------|:--------------------------------
5656  * ALT_USB_GLOB_GINTMSK_HCHINTMSK_E_MSK | 0x0 | Host Channels Interrupt Mask
5657  * ALT_USB_GLOB_GINTMSK_HCHINTMSK_E_NOMSK | 0x1 | No mask Host Channels Interrupt
5658  *
5659  * Field Access Macros:
5660  *
5661  */
5662 /*
5663  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_HCHINTMSK
5664  *
5665  * Host Channels Interrupt Mask
5666  */
5667 #define ALT_USB_GLOB_GINTMSK_HCHINTMSK_E_MSK 0x0
5668 /*
5669  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_HCHINTMSK
5670  *
5671  * No mask Host Channels Interrupt
5672  */
5673 #define ALT_USB_GLOB_GINTMSK_HCHINTMSK_E_NOMSK 0x1
5674 
5675 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_HCHINTMSK register field. */
5676 #define ALT_USB_GLOB_GINTMSK_HCHINTMSK_LSB 25
5677 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_HCHINTMSK register field. */
5678 #define ALT_USB_GLOB_GINTMSK_HCHINTMSK_MSB 25
5679 /* The width in bits of the ALT_USB_GLOB_GINTMSK_HCHINTMSK register field. */
5680 #define ALT_USB_GLOB_GINTMSK_HCHINTMSK_WIDTH 1
5681 /* The mask used to set the ALT_USB_GLOB_GINTMSK_HCHINTMSK register field value. */
5682 #define ALT_USB_GLOB_GINTMSK_HCHINTMSK_SET_MSK 0x02000000
5683 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_HCHINTMSK register field value. */
5684 #define ALT_USB_GLOB_GINTMSK_HCHINTMSK_CLR_MSK 0xfdffffff
5685 /* The reset value of the ALT_USB_GLOB_GINTMSK_HCHINTMSK register field. */
5686 #define ALT_USB_GLOB_GINTMSK_HCHINTMSK_RESET 0x0
5687 /* Extracts the ALT_USB_GLOB_GINTMSK_HCHINTMSK field value from a register. */
5688 #define ALT_USB_GLOB_GINTMSK_HCHINTMSK_GET(value) (((value) & 0x02000000) >> 25)
5689 /* Produces a ALT_USB_GLOB_GINTMSK_HCHINTMSK register field value suitable for setting the register. */
5690 #define ALT_USB_GLOB_GINTMSK_HCHINTMSK_SET(value) (((value) << 25) & 0x02000000)
5691 
5692 /*
5693  * Field : Periodic TxFIFO Empty Mask - ptxfempmsk
5694  *
5695  * Mode: Host only.
5696  *
5697  * Field Enumeration Values:
5698  *
5699  * Enum | Value | Description
5700  * :----------------------------------------|:------|:------------------------------
5701  * ALT_USB_GLOB_GINTMSK_PTXFEMPMSK_E_MSK | 0x0 | Periodic TxFIFO Empty Mask
5702  * ALT_USB_GLOB_GINTMSK_PTXFEMPMSK_E_NOMSK | 0x1 | No mask Periodic TxFIFO Empty
5703  *
5704  * Field Access Macros:
5705  *
5706  */
5707 /*
5708  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_PTXFEMPMSK
5709  *
5710  * Periodic TxFIFO Empty Mask
5711  */
5712 #define ALT_USB_GLOB_GINTMSK_PTXFEMPMSK_E_MSK 0x0
5713 /*
5714  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_PTXFEMPMSK
5715  *
5716  * No mask Periodic TxFIFO Empty
5717  */
5718 #define ALT_USB_GLOB_GINTMSK_PTXFEMPMSK_E_NOMSK 0x1
5719 
5720 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_PTXFEMPMSK register field. */
5721 #define ALT_USB_GLOB_GINTMSK_PTXFEMPMSK_LSB 26
5722 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_PTXFEMPMSK register field. */
5723 #define ALT_USB_GLOB_GINTMSK_PTXFEMPMSK_MSB 26
5724 /* The width in bits of the ALT_USB_GLOB_GINTMSK_PTXFEMPMSK register field. */
5725 #define ALT_USB_GLOB_GINTMSK_PTXFEMPMSK_WIDTH 1
5726 /* The mask used to set the ALT_USB_GLOB_GINTMSK_PTXFEMPMSK register field value. */
5727 #define ALT_USB_GLOB_GINTMSK_PTXFEMPMSK_SET_MSK 0x04000000
5728 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_PTXFEMPMSK register field value. */
5729 #define ALT_USB_GLOB_GINTMSK_PTXFEMPMSK_CLR_MSK 0xfbffffff
5730 /* The reset value of the ALT_USB_GLOB_GINTMSK_PTXFEMPMSK register field. */
5731 #define ALT_USB_GLOB_GINTMSK_PTXFEMPMSK_RESET 0x0
5732 /* Extracts the ALT_USB_GLOB_GINTMSK_PTXFEMPMSK field value from a register. */
5733 #define ALT_USB_GLOB_GINTMSK_PTXFEMPMSK_GET(value) (((value) & 0x04000000) >> 26)
5734 /* Produces a ALT_USB_GLOB_GINTMSK_PTXFEMPMSK register field value suitable for setting the register. */
5735 #define ALT_USB_GLOB_GINTMSK_PTXFEMPMSK_SET(value) (((value) << 26) & 0x04000000)
5736 
5737 /*
5738  * Field : Connector ID Status Change Mask - conidstschngmsk
5739  *
5740  * Mode: Host and Device. This bit can be set only by the core and the application
5741  * should write 1 to clear it.
5742  *
5743  * Field Enumeration Values:
5744  *
5745  * Enum | Value | Description
5746  * :---------------------------------------------|:------|:-----------------------------------
5747  * ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK_E_MSK | 0x0 | Connector ID Status Change Mask
5748  * ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK_E_NOMSK | 0x1 | No mask Connector ID Status Change
5749  *
5750  * Field Access Macros:
5751  *
5752  */
5753 /*
5754  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK
5755  *
5756  * Connector ID Status Change Mask
5757  */
5758 #define ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK_E_MSK 0x0
5759 /*
5760  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK
5761  *
5762  * No mask Connector ID Status Change
5763  */
5764 #define ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK_E_NOMSK 0x1
5765 
5766 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK register field. */
5767 #define ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK_LSB 28
5768 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK register field. */
5769 #define ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK_MSB 28
5770 /* The width in bits of the ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK register field. */
5771 #define ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK_WIDTH 1
5772 /* The mask used to set the ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK register field value. */
5773 #define ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK_SET_MSK 0x10000000
5774 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK register field value. */
5775 #define ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK_CLR_MSK 0xefffffff
5776 /* The reset value of the ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK register field. */
5777 #define ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK_RESET 0x0
5778 /* Extracts the ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK field value from a register. */
5779 #define ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK_GET(value) (((value) & 0x10000000) >> 28)
5780 /* Produces a ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK register field value suitable for setting the register. */
5781 #define ALT_USB_GLOB_GINTMSK_CONIDSTSCHNGMSK_SET(value) (((value) << 28) & 0x10000000)
5782 
5783 /*
5784  * Field : disconnintmsk
5785  *
5786  * Mode: Host and Device.
5787  *
5788  * Field Enumeration Values:
5789  *
5790  * Enum | Value | Description
5791  * :-------------------------------------------|:------|:--------------------------------------
5792  * ALT_USB_GLOB_GINTMSK_DISCONNINTMSK_E_MSK | 0x0 | Disconnect Detected Interrupt Mask
5793  * ALT_USB_GLOB_GINTMSK_DISCONNINTMSK_E_NOMSK | 0x1 | No mask Disconnect Detected Interrupt
5794  *
5795  * Field Access Macros:
5796  *
5797  */
5798 /*
5799  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_DISCONNINTMSK
5800  *
5801  * Disconnect Detected Interrupt Mask
5802  */
5803 #define ALT_USB_GLOB_GINTMSK_DISCONNINTMSK_E_MSK 0x0
5804 /*
5805  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_DISCONNINTMSK
5806  *
5807  * No mask Disconnect Detected Interrupt
5808  */
5809 #define ALT_USB_GLOB_GINTMSK_DISCONNINTMSK_E_NOMSK 0x1
5810 
5811 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_DISCONNINTMSK register field. */
5812 #define ALT_USB_GLOB_GINTMSK_DISCONNINTMSK_LSB 29
5813 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_DISCONNINTMSK register field. */
5814 #define ALT_USB_GLOB_GINTMSK_DISCONNINTMSK_MSB 29
5815 /* The width in bits of the ALT_USB_GLOB_GINTMSK_DISCONNINTMSK register field. */
5816 #define ALT_USB_GLOB_GINTMSK_DISCONNINTMSK_WIDTH 1
5817 /* The mask used to set the ALT_USB_GLOB_GINTMSK_DISCONNINTMSK register field value. */
5818 #define ALT_USB_GLOB_GINTMSK_DISCONNINTMSK_SET_MSK 0x20000000
5819 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_DISCONNINTMSK register field value. */
5820 #define ALT_USB_GLOB_GINTMSK_DISCONNINTMSK_CLR_MSK 0xdfffffff
5821 /* The reset value of the ALT_USB_GLOB_GINTMSK_DISCONNINTMSK register field. */
5822 #define ALT_USB_GLOB_GINTMSK_DISCONNINTMSK_RESET 0x0
5823 /* Extracts the ALT_USB_GLOB_GINTMSK_DISCONNINTMSK field value from a register. */
5824 #define ALT_USB_GLOB_GINTMSK_DISCONNINTMSK_GET(value) (((value) & 0x20000000) >> 29)
5825 /* Produces a ALT_USB_GLOB_GINTMSK_DISCONNINTMSK register field value suitable for setting the register. */
5826 #define ALT_USB_GLOB_GINTMSK_DISCONNINTMSK_SET(value) (((value) << 29) & 0x20000000)
5827 
5828 /*
5829  * Field : Session Request New Session Detected Interrupt Mas - sessreqintmsk
5830  *
5831  * Mode: Host and Device.
5832  *
5833  * Field Enumeration Values:
5834  *
5835  * Enum | Value | Description
5836  * :-------------------------------------------|:------|:-----------------------------------------------
5837  * ALT_USB_GLOB_GINTMSK_SESSREQINTMSK_E_MSK | 0x0 | Session Request New Session Detected Interrupt
5838  * : | | Mask
5839  * ALT_USB_GLOB_GINTMSK_SESSREQINTMSK_E_NOMSK | 0x1 | No mask Session RequestNew Session Detected
5840  * : | | Interrupt
5841  *
5842  * Field Access Macros:
5843  *
5844  */
5845 /*
5846  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_SESSREQINTMSK
5847  *
5848  * Session Request New Session Detected Interrupt Mask
5849  */
5850 #define ALT_USB_GLOB_GINTMSK_SESSREQINTMSK_E_MSK 0x0
5851 /*
5852  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_SESSREQINTMSK
5853  *
5854  * No mask Session RequestNew Session Detected Interrupt
5855  */
5856 #define ALT_USB_GLOB_GINTMSK_SESSREQINTMSK_E_NOMSK 0x1
5857 
5858 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_SESSREQINTMSK register field. */
5859 #define ALT_USB_GLOB_GINTMSK_SESSREQINTMSK_LSB 30
5860 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_SESSREQINTMSK register field. */
5861 #define ALT_USB_GLOB_GINTMSK_SESSREQINTMSK_MSB 30
5862 /* The width in bits of the ALT_USB_GLOB_GINTMSK_SESSREQINTMSK register field. */
5863 #define ALT_USB_GLOB_GINTMSK_SESSREQINTMSK_WIDTH 1
5864 /* The mask used to set the ALT_USB_GLOB_GINTMSK_SESSREQINTMSK register field value. */
5865 #define ALT_USB_GLOB_GINTMSK_SESSREQINTMSK_SET_MSK 0x40000000
5866 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_SESSREQINTMSK register field value. */
5867 #define ALT_USB_GLOB_GINTMSK_SESSREQINTMSK_CLR_MSK 0xbfffffff
5868 /* The reset value of the ALT_USB_GLOB_GINTMSK_SESSREQINTMSK register field. */
5869 #define ALT_USB_GLOB_GINTMSK_SESSREQINTMSK_RESET 0x0
5870 /* Extracts the ALT_USB_GLOB_GINTMSK_SESSREQINTMSK field value from a register. */
5871 #define ALT_USB_GLOB_GINTMSK_SESSREQINTMSK_GET(value) (((value) & 0x40000000) >> 30)
5872 /* Produces a ALT_USB_GLOB_GINTMSK_SESSREQINTMSK register field value suitable for setting the register. */
5873 #define ALT_USB_GLOB_GINTMSK_SESSREQINTMSK_SET(value) (((value) << 30) & 0x40000000)
5874 
5875 /*
5876  * Field : Resume Remote Wakeup Detected Interrupt Mask - wkupintmsk
5877  *
5878  * Mode: Host and Device.
5879  *
5880  * Field Enumeration Values:
5881  *
5882  * Enum | Value | Description
5883  * :----------------------------------------|:------|:-----------------------------------------------
5884  * ALT_USB_GLOB_GINTMSK_WKUPINTMSK_E_MSK | 0x0 | Resume Remote Wakeup Detected Interrupt Mask
5885  * ALT_USB_GLOB_GINTMSK_WKUPINTMSK_E_NOMSK | 0x1 | No maskResume Remote Wakeup Detected Interrupt
5886  *
5887  * Field Access Macros:
5888  *
5889  */
5890 /*
5891  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_WKUPINTMSK
5892  *
5893  * Resume Remote Wakeup Detected Interrupt Mask
5894  */
5895 #define ALT_USB_GLOB_GINTMSK_WKUPINTMSK_E_MSK 0x0
5896 /*
5897  * Enumerated value for register field ALT_USB_GLOB_GINTMSK_WKUPINTMSK
5898  *
5899  * No maskResume Remote Wakeup Detected Interrupt
5900  */
5901 #define ALT_USB_GLOB_GINTMSK_WKUPINTMSK_E_NOMSK 0x1
5902 
5903 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GINTMSK_WKUPINTMSK register field. */
5904 #define ALT_USB_GLOB_GINTMSK_WKUPINTMSK_LSB 31
5905 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GINTMSK_WKUPINTMSK register field. */
5906 #define ALT_USB_GLOB_GINTMSK_WKUPINTMSK_MSB 31
5907 /* The width in bits of the ALT_USB_GLOB_GINTMSK_WKUPINTMSK register field. */
5908 #define ALT_USB_GLOB_GINTMSK_WKUPINTMSK_WIDTH 1
5909 /* The mask used to set the ALT_USB_GLOB_GINTMSK_WKUPINTMSK register field value. */
5910 #define ALT_USB_GLOB_GINTMSK_WKUPINTMSK_SET_MSK 0x80000000
5911 /* The mask used to clear the ALT_USB_GLOB_GINTMSK_WKUPINTMSK register field value. */
5912 #define ALT_USB_GLOB_GINTMSK_WKUPINTMSK_CLR_MSK 0x7fffffff
5913 /* The reset value of the ALT_USB_GLOB_GINTMSK_WKUPINTMSK register field. */
5914 #define ALT_USB_GLOB_GINTMSK_WKUPINTMSK_RESET 0x0
5915 /* Extracts the ALT_USB_GLOB_GINTMSK_WKUPINTMSK field value from a register. */
5916 #define ALT_USB_GLOB_GINTMSK_WKUPINTMSK_GET(value) (((value) & 0x80000000) >> 31)
5917 /* Produces a ALT_USB_GLOB_GINTMSK_WKUPINTMSK register field value suitable for setting the register. */
5918 #define ALT_USB_GLOB_GINTMSK_WKUPINTMSK_SET(value) (((value) << 31) & 0x80000000)
5919 
5920 #ifndef __ASSEMBLY__
5921 /*
5922  * WARNING: The C register and register group struct declarations are provided for
5923  * convenience and illustrative purposes. They should, however, be used with
5924  * caution as the C language standard provides no guarantees about the alignment or
5925  * atomicity of device memory accesses. The recommended practice for writing
5926  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
5927  * alt_write_word() functions.
5928  *
5929  * The struct declaration for register ALT_USB_GLOB_GINTMSK.
5930  */
5931 struct ALT_USB_GLOB_GINTMSK_s
5932 {
5933  uint32_t : 1; /* *UNDEFINED* */
5934  uint32_t modemismsk : 1; /* Mode Mismatch Interrupt Mask */
5935  uint32_t otgintmsk : 1; /* OTG Interrupt Mask */
5936  uint32_t sofmsk : 1; /* Start of (micro)Frame Mask */
5937  uint32_t rxflvlmsk : 1; /* Receive FIFO Non-Empty Mask */
5938  uint32_t : 1; /* *UNDEFINED* */
5939  uint32_t ginnakeffmsk : 1; /* Global Non-periodic IN NAK Effective Mask */
5940  uint32_t goutnakeffmsk : 1; /* Global OUT NAK Effective Mask */
5941  uint32_t : 2; /* *UNDEFINED* */
5942  uint32_t erlysuspmsk : 1; /* Early Suspend Mask */
5943  uint32_t usbsuspmsk : 1; /* USB Suspend Mask */
5944  uint32_t usbrstmsk : 1; /* USB Reset Mask */
5945  uint32_t enumdonemsk : 1; /* Enumeration Done Mask */
5946  uint32_t isooutdropmsk : 1; /* Isochronous OUT Packet Dropped Interrupt Mask */
5947  uint32_t eopfmsk : 1; /* End of Periodic Frame Interrupt Mask */
5948  uint32_t : 1; /* *UNDEFINED* */
5949  uint32_t epmismsk : 1; /* Endpoint Mismatch Interrupt Mask */
5950  uint32_t iepintmsk : 1; /* IN Endpoints Interrupt Mask */
5951  uint32_t oepintmsk : 1; /* OUT Endpoints Interrupt Mask */
5952  uint32_t incompisoinmsk : 1; /* Incomplete Isochronous IN Transfer Mask */
5953  uint32_t incomplpmsk : 1; /* Incomplete Periodic Transfer Mask */
5954  uint32_t fetsuspmsk : 1; /* Data Fetch Suspended Mask */
5955  uint32_t resetdetmsk : 1; /* Reset detected Interrupt Mask */
5956  uint32_t prtintmsk : 1; /* Host Port Interrupt Mask */
5957  uint32_t hchintmsk : 1; /* Host Channels Interrupt Mask */
5958  uint32_t ptxfempmsk : 1; /* Periodic TxFIFO Empty Mask */
5959  uint32_t : 1; /* *UNDEFINED* */
5960  uint32_t conidstschngmsk : 1; /* Connector ID Status Change Mask */
5961  uint32_t disconnintmsk : 1; /* ALT_USB_GLOB_GINTMSK_DISCONNINTMSK */
5962  uint32_t sessreqintmsk : 1; /* Session Request New Session Detected Interrupt Mas */
5963  uint32_t wkupintmsk : 1; /* Resume Remote Wakeup Detected Interrupt Mask */
5964 };
5965 
5966 /* The typedef declaration for register ALT_USB_GLOB_GINTMSK. */
5967 typedef volatile struct ALT_USB_GLOB_GINTMSK_s ALT_USB_GLOB_GINTMSK_t;
5968 #endif /* __ASSEMBLY__ */
5969 
5970 /* The byte offset of the ALT_USB_GLOB_GINTMSK register from the beginning of the component. */
5971 #define ALT_USB_GLOB_GINTMSK_OFST 0x18
5972 /* The address of the ALT_USB_GLOB_GINTMSK register. */
5973 #define ALT_USB_GLOB_GINTMSK_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GINTMSK_OFST))
5974 
5975 /*
5976  * Register : Receive Status Debug Read Register - grxstsr
5977  *
5978  * A read to the Receive Status Read and Pop register additionally pops the: top
5979  * data entry out of the RxFIFO. The receive status contents must be interpreted
5980  * differently in Host and Device modes. The core ignores the receive status
5981  * pop/read when the receive FIFO is empty and returns a value of 0. The
5982  * application must only pop the Receive Status FIFO when the Receive FIFO Non-
5983  * Empty bit of the Core Interrupt register (GINTSTS.RxFLvl) is asserted. Use of
5984  * these fields vary based on whether the HS OTG core is functioning as a host or a
5985  * device. Do not read this register's reset value before configuring the core
5986  * because the read value is "X" in the simulation.
5987  *
5988  * Register Layout
5989  *
5990  * Bits | Access | Reset | Description
5991  * :--------|:-------|:------|:---------------
5992  * [3:0] | R | 0x0 | Channel Number
5993  * [14:4] | R | 0x0 | Byte Count
5994  * [16:15] | R | 0x0 | Data PID
5995  * [20:17] | R | 0x0 | Packet Status
5996  * [31:21] | ??? | 0x0 | *UNDEFINED*
5997  *
5998  */
5999 /*
6000  * Field : Channel Number - chnum
6001  *
6002  * Indicates the endpoint number to which the current received packet belongs.
6003  *
6004  * Field Access Macros:
6005  *
6006  */
6007 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRXSTSR_CHNUM register field. */
6008 #define ALT_USB_GLOB_GRXSTSR_CHNUM_LSB 0
6009 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRXSTSR_CHNUM register field. */
6010 #define ALT_USB_GLOB_GRXSTSR_CHNUM_MSB 3
6011 /* The width in bits of the ALT_USB_GLOB_GRXSTSR_CHNUM register field. */
6012 #define ALT_USB_GLOB_GRXSTSR_CHNUM_WIDTH 4
6013 /* The mask used to set the ALT_USB_GLOB_GRXSTSR_CHNUM register field value. */
6014 #define ALT_USB_GLOB_GRXSTSR_CHNUM_SET_MSK 0x0000000f
6015 /* The mask used to clear the ALT_USB_GLOB_GRXSTSR_CHNUM register field value. */
6016 #define ALT_USB_GLOB_GRXSTSR_CHNUM_CLR_MSK 0xfffffff0
6017 /* The reset value of the ALT_USB_GLOB_GRXSTSR_CHNUM register field. */
6018 #define ALT_USB_GLOB_GRXSTSR_CHNUM_RESET 0x0
6019 /* Extracts the ALT_USB_GLOB_GRXSTSR_CHNUM field value from a register. */
6020 #define ALT_USB_GLOB_GRXSTSR_CHNUM_GET(value) (((value) & 0x0000000f) >> 0)
6021 /* Produces a ALT_USB_GLOB_GRXSTSR_CHNUM register field value suitable for setting the register. */
6022 #define ALT_USB_GLOB_GRXSTSR_CHNUM_SET(value) (((value) << 0) & 0x0000000f)
6023 
6024 /*
6025  * Field : Byte Count - bcnt
6026  *
6027  * Indicates the byte count of the received data packet.
6028  *
6029  * Field Access Macros:
6030  *
6031  */
6032 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRXSTSR_BCNT register field. */
6033 #define ALT_USB_GLOB_GRXSTSR_BCNT_LSB 4
6034 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRXSTSR_BCNT register field. */
6035 #define ALT_USB_GLOB_GRXSTSR_BCNT_MSB 14
6036 /* The width in bits of the ALT_USB_GLOB_GRXSTSR_BCNT register field. */
6037 #define ALT_USB_GLOB_GRXSTSR_BCNT_WIDTH 11
6038 /* The mask used to set the ALT_USB_GLOB_GRXSTSR_BCNT register field value. */
6039 #define ALT_USB_GLOB_GRXSTSR_BCNT_SET_MSK 0x00007ff0
6040 /* The mask used to clear the ALT_USB_GLOB_GRXSTSR_BCNT register field value. */
6041 #define ALT_USB_GLOB_GRXSTSR_BCNT_CLR_MSK 0xffff800f
6042 /* The reset value of the ALT_USB_GLOB_GRXSTSR_BCNT register field. */
6043 #define ALT_USB_GLOB_GRXSTSR_BCNT_RESET 0x0
6044 /* Extracts the ALT_USB_GLOB_GRXSTSR_BCNT field value from a register. */
6045 #define ALT_USB_GLOB_GRXSTSR_BCNT_GET(value) (((value) & 0x00007ff0) >> 4)
6046 /* Produces a ALT_USB_GLOB_GRXSTSR_BCNT register field value suitable for setting the register. */
6047 #define ALT_USB_GLOB_GRXSTSR_BCNT_SET(value) (((value) << 4) & 0x00007ff0)
6048 
6049 /*
6050  * Field : Data PID - dpid
6051  *
6052  * Indicates the Data PID of the received packet.
6053  *
6054  * Field Enumeration Values:
6055  *
6056  * Enum | Value | Description
6057  * :----------------------------------|:------|:------------
6058  * ALT_USB_GLOB_GRXSTSR_DPID_E_DATA0 | 0x0 | DATA0
6059  * ALT_USB_GLOB_GRXSTSR_DPID_E_DATA1 | 0x2 | DATA1
6060  * ALT_USB_GLOB_GRXSTSR_DPID_E_DATA2 | 0x1 | DATA2
6061  * ALT_USB_GLOB_GRXSTSR_DPID_E_MDATA | 0x3 | MDATA
6062  *
6063  * Field Access Macros:
6064  *
6065  */
6066 /*
6067  * Enumerated value for register field ALT_USB_GLOB_GRXSTSR_DPID
6068  *
6069  * DATA0
6070  */
6071 #define ALT_USB_GLOB_GRXSTSR_DPID_E_DATA0 0x0
6072 /*
6073  * Enumerated value for register field ALT_USB_GLOB_GRXSTSR_DPID
6074  *
6075  * DATA1
6076  */
6077 #define ALT_USB_GLOB_GRXSTSR_DPID_E_DATA1 0x2
6078 /*
6079  * Enumerated value for register field ALT_USB_GLOB_GRXSTSR_DPID
6080  *
6081  * DATA2
6082  */
6083 #define ALT_USB_GLOB_GRXSTSR_DPID_E_DATA2 0x1
6084 /*
6085  * Enumerated value for register field ALT_USB_GLOB_GRXSTSR_DPID
6086  *
6087  * MDATA
6088  */
6089 #define ALT_USB_GLOB_GRXSTSR_DPID_E_MDATA 0x3
6090 
6091 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRXSTSR_DPID register field. */
6092 #define ALT_USB_GLOB_GRXSTSR_DPID_LSB 15
6093 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRXSTSR_DPID register field. */
6094 #define ALT_USB_GLOB_GRXSTSR_DPID_MSB 16
6095 /* The width in bits of the ALT_USB_GLOB_GRXSTSR_DPID register field. */
6096 #define ALT_USB_GLOB_GRXSTSR_DPID_WIDTH 2
6097 /* The mask used to set the ALT_USB_GLOB_GRXSTSR_DPID register field value. */
6098 #define ALT_USB_GLOB_GRXSTSR_DPID_SET_MSK 0x00018000
6099 /* The mask used to clear the ALT_USB_GLOB_GRXSTSR_DPID register field value. */
6100 #define ALT_USB_GLOB_GRXSTSR_DPID_CLR_MSK 0xfffe7fff
6101 /* The reset value of the ALT_USB_GLOB_GRXSTSR_DPID register field. */
6102 #define ALT_USB_GLOB_GRXSTSR_DPID_RESET 0x0
6103 /* Extracts the ALT_USB_GLOB_GRXSTSR_DPID field value from a register. */
6104 #define ALT_USB_GLOB_GRXSTSR_DPID_GET(value) (((value) & 0x00018000) >> 15)
6105 /* Produces a ALT_USB_GLOB_GRXSTSR_DPID register field value suitable for setting the register. */
6106 #define ALT_USB_GLOB_GRXSTSR_DPID_SET(value) (((value) << 15) & 0x00018000)
6107 
6108 /*
6109  * Field : Packet Status - pktsts
6110  *
6111  * Mode: Host only. Others: Reserved. Indicates the status of the received packet
6112  *
6113  * Field Enumeration Values:
6114  *
6115  * Enum | Value | Description
6116  * :--------------------------------------|:------|:---------------------------------------------
6117  * ALT_USB_GLOB_GRXSTSR_PKTSTS_E_INDPRX | 0x2 | IN data packet received
6118  * ALT_USB_GLOB_GRXSTSR_PKTSTS_E_INTRCOM | 0x3 | IN transfer completed (triggers an interrupt
6119  * ALT_USB_GLOB_GRXSTSR_PKTSTS_E_DTTOG | 0x5 | Data toggle error (triggers an interrupt)
6120  * ALT_USB_GLOB_GRXSTSR_PKTSTS_E_CHHALT | 0x7 | Channel halted (triggers an interrupt)
6121  *
6122  * Field Access Macros:
6123  *
6124  */
6125 /*
6126  * Enumerated value for register field ALT_USB_GLOB_GRXSTSR_PKTSTS
6127  *
6128  * IN data packet received
6129  */
6130 #define ALT_USB_GLOB_GRXSTSR_PKTSTS_E_INDPRX 0x2
6131 /*
6132  * Enumerated value for register field ALT_USB_GLOB_GRXSTSR_PKTSTS
6133  *
6134  * IN transfer completed (triggers an interrupt
6135  */
6136 #define ALT_USB_GLOB_GRXSTSR_PKTSTS_E_INTRCOM 0x3
6137 /*
6138  * Enumerated value for register field ALT_USB_GLOB_GRXSTSR_PKTSTS
6139  *
6140  * Data toggle error (triggers an interrupt)
6141  */
6142 #define ALT_USB_GLOB_GRXSTSR_PKTSTS_E_DTTOG 0x5
6143 /*
6144  * Enumerated value for register field ALT_USB_GLOB_GRXSTSR_PKTSTS
6145  *
6146  * Channel halted (triggers an interrupt)
6147  */
6148 #define ALT_USB_GLOB_GRXSTSR_PKTSTS_E_CHHALT 0x7
6149 
6150 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRXSTSR_PKTSTS register field. */
6151 #define ALT_USB_GLOB_GRXSTSR_PKTSTS_LSB 17
6152 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRXSTSR_PKTSTS register field. */
6153 #define ALT_USB_GLOB_GRXSTSR_PKTSTS_MSB 20
6154 /* The width in bits of the ALT_USB_GLOB_GRXSTSR_PKTSTS register field. */
6155 #define ALT_USB_GLOB_GRXSTSR_PKTSTS_WIDTH 4
6156 /* The mask used to set the ALT_USB_GLOB_GRXSTSR_PKTSTS register field value. */
6157 #define ALT_USB_GLOB_GRXSTSR_PKTSTS_SET_MSK 0x001e0000
6158 /* The mask used to clear the ALT_USB_GLOB_GRXSTSR_PKTSTS register field value. */
6159 #define ALT_USB_GLOB_GRXSTSR_PKTSTS_CLR_MSK 0xffe1ffff
6160 /* The reset value of the ALT_USB_GLOB_GRXSTSR_PKTSTS register field. */
6161 #define ALT_USB_GLOB_GRXSTSR_PKTSTS_RESET 0x0
6162 /* Extracts the ALT_USB_GLOB_GRXSTSR_PKTSTS field value from a register. */
6163 #define ALT_USB_GLOB_GRXSTSR_PKTSTS_GET(value) (((value) & 0x001e0000) >> 17)
6164 /* Produces a ALT_USB_GLOB_GRXSTSR_PKTSTS register field value suitable for setting the register. */
6165 #define ALT_USB_GLOB_GRXSTSR_PKTSTS_SET(value) (((value) << 17) & 0x001e0000)
6166 
6167 #ifndef __ASSEMBLY__
6168 /*
6169  * WARNING: The C register and register group struct declarations are provided for
6170  * convenience and illustrative purposes. They should, however, be used with
6171  * caution as the C language standard provides no guarantees about the alignment or
6172  * atomicity of device memory accesses. The recommended practice for writing
6173  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
6174  * alt_write_word() functions.
6175  *
6176  * The struct declaration for register ALT_USB_GLOB_GRXSTSR.
6177  */
6178 struct ALT_USB_GLOB_GRXSTSR_s
6179 {
6180  const uint32_t chnum : 4; /* Channel Number */
6181  const uint32_t bcnt : 11; /* Byte Count */
6182  const uint32_t dpid : 2; /* Data PID */
6183  const uint32_t pktsts : 4; /* Packet Status */
6184  uint32_t : 11; /* *UNDEFINED* */
6185 };
6186 
6187 /* The typedef declaration for register ALT_USB_GLOB_GRXSTSR. */
6188 typedef volatile struct ALT_USB_GLOB_GRXSTSR_s ALT_USB_GLOB_GRXSTSR_t;
6189 #endif /* __ASSEMBLY__ */
6190 
6191 /* The byte offset of the ALT_USB_GLOB_GRXSTSR register from the beginning of the component. */
6192 #define ALT_USB_GLOB_GRXSTSR_OFST 0x1c
6193 /* The address of the ALT_USB_GLOB_GRXSTSR register. */
6194 #define ALT_USB_GLOB_GRXSTSR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GRXSTSR_OFST))
6195 
6196 /*
6197  * Register : Receive Status Read Pop Register - grxstsp
6198  *
6199  * A read to the Receive Status Read and Pop register additionally pops the: top
6200  * data entry out of the RxFIFO. The receive status contents must be interpreted
6201  * differently in Host and Device modes. The core ignores the receive status
6202  * pop/read when the receive FIFO is empty and returns a value of 0. The
6203  * application must only pop the Receive Status FIFO when the Receive FIFO Non-
6204  * Empty bit of the Core Interrupt register (GINTSTS.RxFLvl) is asserted. Use of
6205  * these fields vary based on whether the HS OTG core is functioning as a host or a
6206  * device. Do not read this register'ss reset value before configuring the core
6207  * because the read value is "X" in the simulation.
6208  *
6209  * Register Layout
6210  *
6211  * Bits | Access | Reset | Description
6212  * :--------|:-------|:------|:---------------
6213  * [3:0] | R | 0x0 | Channel Number
6214  * [14:4] | R | 0x0 | Byte Count
6215  * [16:15] | R | 0x0 | Data PID
6216  * [20:17] | R | 0x0 | Packet Status
6217  * [24:21] | R | 0x0 | Frame Number
6218  * [31:25] | ??? | 0x0 | *UNDEFINED*
6219  *
6220  */
6221 /*
6222  * Field : Channel Number - chnum
6223  *
6224  * Mode: Host only. Indicates the channel number to which the current received
6225  * packet belongs.
6226  *
6227  * Field Access Macros:
6228  *
6229  */
6230 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRXSTSP_CHNUM register field. */
6231 #define ALT_USB_GLOB_GRXSTSP_CHNUM_LSB 0
6232 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRXSTSP_CHNUM register field. */
6233 #define ALT_USB_GLOB_GRXSTSP_CHNUM_MSB 3
6234 /* The width in bits of the ALT_USB_GLOB_GRXSTSP_CHNUM register field. */
6235 #define ALT_USB_GLOB_GRXSTSP_CHNUM_WIDTH 4
6236 /* The mask used to set the ALT_USB_GLOB_GRXSTSP_CHNUM register field value. */
6237 #define ALT_USB_GLOB_GRXSTSP_CHNUM_SET_MSK 0x0000000f
6238 /* The mask used to clear the ALT_USB_GLOB_GRXSTSP_CHNUM register field value. */
6239 #define ALT_USB_GLOB_GRXSTSP_CHNUM_CLR_MSK 0xfffffff0
6240 /* The reset value of the ALT_USB_GLOB_GRXSTSP_CHNUM register field. */
6241 #define ALT_USB_GLOB_GRXSTSP_CHNUM_RESET 0x0
6242 /* Extracts the ALT_USB_GLOB_GRXSTSP_CHNUM field value from a register. */
6243 #define ALT_USB_GLOB_GRXSTSP_CHNUM_GET(value) (((value) & 0x0000000f) >> 0)
6244 /* Produces a ALT_USB_GLOB_GRXSTSP_CHNUM register field value suitable for setting the register. */
6245 #define ALT_USB_GLOB_GRXSTSP_CHNUM_SET(value) (((value) << 0) & 0x0000000f)
6246 
6247 /*
6248  * Field : Byte Count - bcnt
6249  *
6250  * Mode: Host only. Indicates the byte count of the received IN data packet.
6251  *
6252  * Field Access Macros:
6253  *
6254  */
6255 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRXSTSP_BCNT register field. */
6256 #define ALT_USB_GLOB_GRXSTSP_BCNT_LSB 4
6257 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRXSTSP_BCNT register field. */
6258 #define ALT_USB_GLOB_GRXSTSP_BCNT_MSB 14
6259 /* The width in bits of the ALT_USB_GLOB_GRXSTSP_BCNT register field. */
6260 #define ALT_USB_GLOB_GRXSTSP_BCNT_WIDTH 11
6261 /* The mask used to set the ALT_USB_GLOB_GRXSTSP_BCNT register field value. */
6262 #define ALT_USB_GLOB_GRXSTSP_BCNT_SET_MSK 0x00007ff0
6263 /* The mask used to clear the ALT_USB_GLOB_GRXSTSP_BCNT register field value. */
6264 #define ALT_USB_GLOB_GRXSTSP_BCNT_CLR_MSK 0xffff800f
6265 /* The reset value of the ALT_USB_GLOB_GRXSTSP_BCNT register field. */
6266 #define ALT_USB_GLOB_GRXSTSP_BCNT_RESET 0x0
6267 /* Extracts the ALT_USB_GLOB_GRXSTSP_BCNT field value from a register. */
6268 #define ALT_USB_GLOB_GRXSTSP_BCNT_GET(value) (((value) & 0x00007ff0) >> 4)
6269 /* Produces a ALT_USB_GLOB_GRXSTSP_BCNT register field value suitable for setting the register. */
6270 #define ALT_USB_GLOB_GRXSTSP_BCNT_SET(value) (((value) << 4) & 0x00007ff0)
6271 
6272 /*
6273  * Field : Data PID - dpid
6274  *
6275  * Indicates the Data PID of the received OUT data packet.
6276  *
6277  * Field Enumeration Values:
6278  *
6279  * Enum | Value | Description
6280  * :----------------------------------|:------|:------------
6281  * ALT_USB_GLOB_GRXSTSP_DPID_E_DATA0 | 0x0 | DATA0
6282  * ALT_USB_GLOB_GRXSTSP_DPID_E_DATA1 | 0x2 | DATA1
6283  * ALT_USB_GLOB_GRXSTSP_DPID_E_DATA2 | 0x1 | DATA2
6284  * ALT_USB_GLOB_GRXSTSP_DPID_E_MDATA | 0x3 | MDATA
6285  *
6286  * Field Access Macros:
6287  *
6288  */
6289 /*
6290  * Enumerated value for register field ALT_USB_GLOB_GRXSTSP_DPID
6291  *
6292  * DATA0
6293  */
6294 #define ALT_USB_GLOB_GRXSTSP_DPID_E_DATA0 0x0
6295 /*
6296  * Enumerated value for register field ALT_USB_GLOB_GRXSTSP_DPID
6297  *
6298  * DATA1
6299  */
6300 #define ALT_USB_GLOB_GRXSTSP_DPID_E_DATA1 0x2
6301 /*
6302  * Enumerated value for register field ALT_USB_GLOB_GRXSTSP_DPID
6303  *
6304  * DATA2
6305  */
6306 #define ALT_USB_GLOB_GRXSTSP_DPID_E_DATA2 0x1
6307 /*
6308  * Enumerated value for register field ALT_USB_GLOB_GRXSTSP_DPID
6309  *
6310  * MDATA
6311  */
6312 #define ALT_USB_GLOB_GRXSTSP_DPID_E_MDATA 0x3
6313 
6314 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRXSTSP_DPID register field. */
6315 #define ALT_USB_GLOB_GRXSTSP_DPID_LSB 15
6316 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRXSTSP_DPID register field. */
6317 #define ALT_USB_GLOB_GRXSTSP_DPID_MSB 16
6318 /* The width in bits of the ALT_USB_GLOB_GRXSTSP_DPID register field. */
6319 #define ALT_USB_GLOB_GRXSTSP_DPID_WIDTH 2
6320 /* The mask used to set the ALT_USB_GLOB_GRXSTSP_DPID register field value. */
6321 #define ALT_USB_GLOB_GRXSTSP_DPID_SET_MSK 0x00018000
6322 /* The mask used to clear the ALT_USB_GLOB_GRXSTSP_DPID register field value. */
6323 #define ALT_USB_GLOB_GRXSTSP_DPID_CLR_MSK 0xfffe7fff
6324 /* The reset value of the ALT_USB_GLOB_GRXSTSP_DPID register field. */
6325 #define ALT_USB_GLOB_GRXSTSP_DPID_RESET 0x0
6326 /* Extracts the ALT_USB_GLOB_GRXSTSP_DPID field value from a register. */
6327 #define ALT_USB_GLOB_GRXSTSP_DPID_GET(value) (((value) & 0x00018000) >> 15)
6328 /* Produces a ALT_USB_GLOB_GRXSTSP_DPID register field value suitable for setting the register. */
6329 #define ALT_USB_GLOB_GRXSTSP_DPID_SET(value) (((value) << 15) & 0x00018000)
6330 
6331 /*
6332  * Field : Packet Status - pktsts
6333  *
6334  * Mode: Host only. Others: Reserved. Indicates the status of the received packet
6335  *
6336  * Field Enumeration Values:
6337  *
6338  * Enum | Value | Description
6339  * :------------------------------------|:------|:------------
6340  * ALT_USB_GLOB_GRXSTSP_PKTSTS_E_DATA0 | 0x0 | DATA0
6341  * ALT_USB_GLOB_GRXSTSP_PKTSTS_E_DATA1 | 0x2 | DATA1
6342  * ALT_USB_GLOB_GRXSTSP_PKTSTS_E_DATA2 | 0x1 | DATA2
6343  * ALT_USB_GLOB_GRXSTSP_PKTSTS_E_MDATA | 0x3 | MDATA
6344  *
6345  * Field Access Macros:
6346  *
6347  */
6348 /*
6349  * Enumerated value for register field ALT_USB_GLOB_GRXSTSP_PKTSTS
6350  *
6351  * DATA0
6352  */
6353 #define ALT_USB_GLOB_GRXSTSP_PKTSTS_E_DATA0 0x0
6354 /*
6355  * Enumerated value for register field ALT_USB_GLOB_GRXSTSP_PKTSTS
6356  *
6357  * DATA1
6358  */
6359 #define ALT_USB_GLOB_GRXSTSP_PKTSTS_E_DATA1 0x2
6360 /*
6361  * Enumerated value for register field ALT_USB_GLOB_GRXSTSP_PKTSTS
6362  *
6363  * DATA2
6364  */
6365 #define ALT_USB_GLOB_GRXSTSP_PKTSTS_E_DATA2 0x1
6366 /*
6367  * Enumerated value for register field ALT_USB_GLOB_GRXSTSP_PKTSTS
6368  *
6369  * MDATA
6370  */
6371 #define ALT_USB_GLOB_GRXSTSP_PKTSTS_E_MDATA 0x3
6372 
6373 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRXSTSP_PKTSTS register field. */
6374 #define ALT_USB_GLOB_GRXSTSP_PKTSTS_LSB 17
6375 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRXSTSP_PKTSTS register field. */
6376 #define ALT_USB_GLOB_GRXSTSP_PKTSTS_MSB 20
6377 /* The width in bits of the ALT_USB_GLOB_GRXSTSP_PKTSTS register field. */
6378 #define ALT_USB_GLOB_GRXSTSP_PKTSTS_WIDTH 4
6379 /* The mask used to set the ALT_USB_GLOB_GRXSTSP_PKTSTS register field value. */
6380 #define ALT_USB_GLOB_GRXSTSP_PKTSTS_SET_MSK 0x001e0000
6381 /* The mask used to clear the ALT_USB_GLOB_GRXSTSP_PKTSTS register field value. */
6382 #define ALT_USB_GLOB_GRXSTSP_PKTSTS_CLR_MSK 0xffe1ffff
6383 /* The reset value of the ALT_USB_GLOB_GRXSTSP_PKTSTS register field. */
6384 #define ALT_USB_GLOB_GRXSTSP_PKTSTS_RESET 0x0
6385 /* Extracts the ALT_USB_GLOB_GRXSTSP_PKTSTS field value from a register. */
6386 #define ALT_USB_GLOB_GRXSTSP_PKTSTS_GET(value) (((value) & 0x001e0000) >> 17)
6387 /* Produces a ALT_USB_GLOB_GRXSTSP_PKTSTS register field value suitable for setting the register. */
6388 #define ALT_USB_GLOB_GRXSTSP_PKTSTS_SET(value) (((value) << 17) & 0x001e0000)
6389 
6390 /*
6391  * Field : Frame Number - fn
6392  *
6393  * Mode: Device only. This is the least significant 4 bits of the (micro)Frame
6394  * number in which the packet is received on the USB. This field is supported only
6395  * when isochronous OUT endpoints are supported.
6396  *
6397  * Field Access Macros:
6398  *
6399  */
6400 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRXSTSP_FN register field. */
6401 #define ALT_USB_GLOB_GRXSTSP_FN_LSB 21
6402 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRXSTSP_FN register field. */
6403 #define ALT_USB_GLOB_GRXSTSP_FN_MSB 24
6404 /* The width in bits of the ALT_USB_GLOB_GRXSTSP_FN register field. */
6405 #define ALT_USB_GLOB_GRXSTSP_FN_WIDTH 4
6406 /* The mask used to set the ALT_USB_GLOB_GRXSTSP_FN register field value. */
6407 #define ALT_USB_GLOB_GRXSTSP_FN_SET_MSK 0x01e00000
6408 /* The mask used to clear the ALT_USB_GLOB_GRXSTSP_FN register field value. */
6409 #define ALT_USB_GLOB_GRXSTSP_FN_CLR_MSK 0xfe1fffff
6410 /* The reset value of the ALT_USB_GLOB_GRXSTSP_FN register field. */
6411 #define ALT_USB_GLOB_GRXSTSP_FN_RESET 0x0
6412 /* Extracts the ALT_USB_GLOB_GRXSTSP_FN field value from a register. */
6413 #define ALT_USB_GLOB_GRXSTSP_FN_GET(value) (((value) & 0x01e00000) >> 21)
6414 /* Produces a ALT_USB_GLOB_GRXSTSP_FN register field value suitable for setting the register. */
6415 #define ALT_USB_GLOB_GRXSTSP_FN_SET(value) (((value) << 21) & 0x01e00000)
6416 
6417 #ifndef __ASSEMBLY__
6418 /*
6419  * WARNING: The C register and register group struct declarations are provided for
6420  * convenience and illustrative purposes. They should, however, be used with
6421  * caution as the C language standard provides no guarantees about the alignment or
6422  * atomicity of device memory accesses. The recommended practice for writing
6423  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
6424  * alt_write_word() functions.
6425  *
6426  * The struct declaration for register ALT_USB_GLOB_GRXSTSP.
6427  */
6428 struct ALT_USB_GLOB_GRXSTSP_s
6429 {
6430  const uint32_t chnum : 4; /* Channel Number */
6431  const uint32_t bcnt : 11; /* Byte Count */
6432  const uint32_t dpid : 2; /* Data PID */
6433  const uint32_t pktsts : 4; /* Packet Status */
6434  const uint32_t fn : 4; /* Frame Number */
6435  uint32_t : 7; /* *UNDEFINED* */
6436 };
6437 
6438 /* The typedef declaration for register ALT_USB_GLOB_GRXSTSP. */
6439 typedef volatile struct ALT_USB_GLOB_GRXSTSP_s ALT_USB_GLOB_GRXSTSP_t;
6440 #endif /* __ASSEMBLY__ */
6441 
6442 /* The byte offset of the ALT_USB_GLOB_GRXSTSP register from the beginning of the component. */
6443 #define ALT_USB_GLOB_GRXSTSP_OFST 0x20
6444 /* The address of the ALT_USB_GLOB_GRXSTSP register. */
6445 #define ALT_USB_GLOB_GRXSTSP_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GRXSTSP_OFST))
6446 
6447 /*
6448  * Register : Receive FIFO Size Register - grxfsiz
6449  *
6450  * The application can program the RAM size that must be allocated to the RxFIFO.
6451  *
6452  * Register Layout
6453  *
6454  * Bits | Access | Reset | Description
6455  * :--------|:-------|:-------|:-------------
6456  * [13:0] | RW | 0x2000 | RxFIFO Depth
6457  * [31:14] | ??? | 0x0 | *UNDEFINED*
6458  *
6459  */
6460 /*
6461  * Field : RxFIFO Depth - rxfdep
6462  *
6463  * This value is in terms of 32-bit words. Minimum value is 16 Maximum value is
6464  * 32,768 The power-on reset value of this register is specified as the Largest Rx
6465  * Data FIFO Dept 8192. Using the Dynamic FIFO Sizing, you can write a new value in
6466  * this field. Programmed values must not exceed 8192.
6467  *
6468  * Field Access Macros:
6469  *
6470  */
6471 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GRXFSIZ_RXFDEP register field. */
6472 #define ALT_USB_GLOB_GRXFSIZ_RXFDEP_LSB 0
6473 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GRXFSIZ_RXFDEP register field. */
6474 #define ALT_USB_GLOB_GRXFSIZ_RXFDEP_MSB 13
6475 /* The width in bits of the ALT_USB_GLOB_GRXFSIZ_RXFDEP register field. */
6476 #define ALT_USB_GLOB_GRXFSIZ_RXFDEP_WIDTH 14
6477 /* The mask used to set the ALT_USB_GLOB_GRXFSIZ_RXFDEP register field value. */
6478 #define ALT_USB_GLOB_GRXFSIZ_RXFDEP_SET_MSK 0x00003fff
6479 /* The mask used to clear the ALT_USB_GLOB_GRXFSIZ_RXFDEP register field value. */
6480 #define ALT_USB_GLOB_GRXFSIZ_RXFDEP_CLR_MSK 0xffffc000
6481 /* The reset value of the ALT_USB_GLOB_GRXFSIZ_RXFDEP register field. */
6482 #define ALT_USB_GLOB_GRXFSIZ_RXFDEP_RESET 0x2000
6483 /* Extracts the ALT_USB_GLOB_GRXFSIZ_RXFDEP field value from a register. */
6484 #define ALT_USB_GLOB_GRXFSIZ_RXFDEP_GET(value) (((value) & 0x00003fff) >> 0)
6485 /* Produces a ALT_USB_GLOB_GRXFSIZ_RXFDEP register field value suitable for setting the register. */
6486 #define ALT_USB_GLOB_GRXFSIZ_RXFDEP_SET(value) (((value) << 0) & 0x00003fff)
6487 
6488 #ifndef __ASSEMBLY__
6489 /*
6490  * WARNING: The C register and register group struct declarations are provided for
6491  * convenience and illustrative purposes. They should, however, be used with
6492  * caution as the C language standard provides no guarantees about the alignment or
6493  * atomicity of device memory accesses. The recommended practice for writing
6494  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
6495  * alt_write_word() functions.
6496  *
6497  * The struct declaration for register ALT_USB_GLOB_GRXFSIZ.
6498  */
6499 struct ALT_USB_GLOB_GRXFSIZ_s
6500 {
6501  uint32_t rxfdep : 14; /* RxFIFO Depth */
6502  uint32_t : 18; /* *UNDEFINED* */
6503 };
6504 
6505 /* The typedef declaration for register ALT_USB_GLOB_GRXFSIZ. */
6506 typedef volatile struct ALT_USB_GLOB_GRXFSIZ_s ALT_USB_GLOB_GRXFSIZ_t;
6507 #endif /* __ASSEMBLY__ */
6508 
6509 /* The byte offset of the ALT_USB_GLOB_GRXFSIZ register from the beginning of the component. */
6510 #define ALT_USB_GLOB_GRXFSIZ_OFST 0x24
6511 /* The address of the ALT_USB_GLOB_GRXFSIZ register. */
6512 #define ALT_USB_GLOB_GRXFSIZ_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GRXFSIZ_OFST))
6513 
6514 /*
6515  * Register : Non-periodic Transmit FIFO Size Register - gnptxfsiz
6516  *
6517  * The application can program the RAM size and the memory start address for the
6518  * Non-periodic TxFIFO. The fields of this register change, depending on host or
6519  * device mode.
6520  *
6521  * Register Layout
6522  *
6523  * Bits | Access | Reset | Description
6524  * :--------|:-------|:-------|:----------------------------------------
6525  * [13:0] | RW | 0x2000 | Non-periodic Transmit RAM Start Address
6526  * [15:14] | ??? | 0x0 | *UNDEFINED*
6527  * [29:16] | RW | 0x2000 | Non-periodic TxFIFO Depth
6528  * [31:30] | ??? | 0x0 | *UNDEFINED*
6529  *
6530  */
6531 /*
6532  * Field : Non-periodic Transmit RAM Start Address - nptxfstaddr
6533  *
6534  * Mode: Host only. for host mode, this field is always valid.This field contains
6535  * the memory start address for Non-periodic Transmit FIFO RAM. This field is set
6536  * from 16-8192 32 bit words. The application can write a new value in this field.
6537  * Programmed values must not exceed 8192.
6538  *
6539  * Field Access Macros:
6540  *
6541  */
6542 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR register field. */
6543 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR_LSB 0
6544 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR register field. */
6545 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR_MSB 13
6546 /* The width in bits of the ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR register field. */
6547 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR_WIDTH 14
6548 /* The mask used to set the ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR register field value. */
6549 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR_SET_MSK 0x00003fff
6550 /* The mask used to clear the ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR register field value. */
6551 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR_CLR_MSK 0xffffc000
6552 /* The reset value of the ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR register field. */
6553 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR_RESET 0x2000
6554 /* Extracts the ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR field value from a register. */
6555 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR_GET(value) (((value) & 0x00003fff) >> 0)
6556 /* Produces a ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR register field value suitable for setting the register. */
6557 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFSTADDR_SET(value) (((value) << 0) & 0x00003fff)
6558 
6559 /*
6560  * Field : Non-periodic TxFIFO Depth - nptxfdep
6561  *
6562  * Mode: Host only. for host mode, this field is always valid. The application can
6563  * write a new value in this field. Programmed values must not exceed 8192
6564  *
6565  * Field Access Macros:
6566  *
6567  */
6568 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP register field. */
6569 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP_LSB 16
6570 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP register field. */
6571 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP_MSB 29
6572 /* The width in bits of the ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP register field. */
6573 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP_WIDTH 14
6574 /* The mask used to set the ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP register field value. */
6575 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP_SET_MSK 0x3fff0000
6576 /* The mask used to clear the ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP register field value. */
6577 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP_CLR_MSK 0xc000ffff
6578 /* The reset value of the ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP register field. */
6579 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP_RESET 0x2000
6580 /* Extracts the ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP field value from a register. */
6581 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
6582 /* Produces a ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP register field value suitable for setting the register. */
6583 #define ALT_USB_GLOB_GNPTXFSIZ_NPTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
6584 
6585 #ifndef __ASSEMBLY__
6586 /*
6587  * WARNING: The C register and register group struct declarations are provided for
6588  * convenience and illustrative purposes. They should, however, be used with
6589  * caution as the C language standard provides no guarantees about the alignment or
6590  * atomicity of device memory accesses. The recommended practice for writing
6591  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
6592  * alt_write_word() functions.
6593  *
6594  * The struct declaration for register ALT_USB_GLOB_GNPTXFSIZ.
6595  */
6596 struct ALT_USB_GLOB_GNPTXFSIZ_s
6597 {
6598  uint32_t nptxfstaddr : 14; /* Non-periodic Transmit RAM Start Address */
6599  uint32_t : 2; /* *UNDEFINED* */
6600  uint32_t nptxfdep : 14; /* Non-periodic TxFIFO Depth */
6601  uint32_t : 2; /* *UNDEFINED* */
6602 };
6603 
6604 /* The typedef declaration for register ALT_USB_GLOB_GNPTXFSIZ. */
6605 typedef volatile struct ALT_USB_GLOB_GNPTXFSIZ_s ALT_USB_GLOB_GNPTXFSIZ_t;
6606 #endif /* __ASSEMBLY__ */
6607 
6608 /* The byte offset of the ALT_USB_GLOB_GNPTXFSIZ register from the beginning of the component. */
6609 #define ALT_USB_GLOB_GNPTXFSIZ_OFST 0x28
6610 /* The address of the ALT_USB_GLOB_GNPTXFSIZ register. */
6611 #define ALT_USB_GLOB_GNPTXFSIZ_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GNPTXFSIZ_OFST))
6612 
6613 /*
6614  * Register : Non-periodic Transmit FIFO Queue Status Register - gnptxsts
6615  *
6616  * In Device mode, this register is valid only in Shared FIFO operation. It
6617  * contains the free space information for the Non-periodic TxFIFO and the
6618  * Nonperiodic Transmit RequestQueue
6619  *
6620  * Register Layout
6621  *
6622  * Bits | Access | Reset | Description
6623  * :--------|:-------|:------|:----------------------------------------------------
6624  * [15:0] | R | 0x400 | Non-periodic TxFIFO Space Avail
6625  * [23:16] | R | 0x8 | Non-periodic Transmit Request Queue Space Available
6626  * [30:24] | R | 0x0 | Top of the Non-periodic Transmit Request Queue
6627  * [31] | ??? | 0x0 | *UNDEFINED*
6628  *
6629  */
6630 /*
6631  * Field : Non-periodic TxFIFO Space Avail - nptxfspcavail
6632  *
6633  * Indicates the amount of free space available in the Non-periodic TxFIFO.Values
6634  * are in terms of 32-bit words. 16h0: Non-periodic TxFIFO is full 16h1: 1 word
6635  * available 16h2: 2 words available 16hn: n words available (where 0 n 32,768)
6636  * 16h8000: 32,768 words available Others: Reserved
6637  *
6638  * Field Access Macros:
6639  *
6640  */
6641 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL register field. */
6642 #define ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL_LSB 0
6643 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL register field. */
6644 #define ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL_MSB 15
6645 /* The width in bits of the ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL register field. */
6646 #define ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL_WIDTH 16
6647 /* The mask used to set the ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL register field value. */
6648 #define ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL_SET_MSK 0x0000ffff
6649 /* The mask used to clear the ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL register field value. */
6650 #define ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL_CLR_MSK 0xffff0000
6651 /* The reset value of the ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL register field. */
6652 #define ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL_RESET 0x400
6653 /* Extracts the ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL field value from a register. */
6654 #define ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
6655 /* Produces a ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL register field value suitable for setting the register. */
6656 #define ALT_USB_GLOB_GNPTXSTS_NPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
6657 
6658 /*
6659  * Field : Non-periodic Transmit Request Queue Space Available - nptxqspcavail
6660  *
6661  * Indicates the amount of free space available in the Non-periodic Transmit
6662  * Request Queue. This queue holds both IN and OUT requests in Host mode. Device
6663  * mode has only IN requests. -Others: Reserved
6664  *
6665  * Field Enumeration Values:
6666  *
6667  * Enum | Value | Description
6668  * :-------------------------------------------|:------|:--------------------------------------------
6669  * ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_FULL | 0x0 | Non-periodic Transmit Request Queue is full
6670  * ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE1 | 0x1 | 1 location available
6671  * ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE2 | 0x2 | 2 locations available
6672  * ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE3 | 0x3 | 3 locations available
6673  * ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE4 | 0x4 | 4 locations available
6674  * ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE5 | 0x5 | 5 locations available
6675  * ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE6 | 0x6 | 6 locations available
6676  * ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE7 | 0x7 | 7 locations available
6677  * ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE8 | 0x8 | 8 locations available
6678  *
6679  * Field Access Macros:
6680  *
6681  */
6682 /*
6683  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL
6684  *
6685  * Non-periodic Transmit Request Queue is full
6686  */
6687 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_FULL 0x0
6688 /*
6689  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL
6690  *
6691  * 1 location available
6692  */
6693 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE1 0x1
6694 /*
6695  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL
6696  *
6697  * 2 locations available
6698  */
6699 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE2 0x2
6700 /*
6701  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL
6702  *
6703  * 3 locations available
6704  */
6705 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE3 0x3
6706 /*
6707  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL
6708  *
6709  * 4 locations available
6710  */
6711 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE4 0x4
6712 /*
6713  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL
6714  *
6715  * 5 locations available
6716  */
6717 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE5 0x5
6718 /*
6719  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL
6720  *
6721  * 6 locations available
6722  */
6723 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE6 0x6
6724 /*
6725  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL
6726  *
6727  * 7 locations available
6728  */
6729 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE7 0x7
6730 /*
6731  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL
6732  *
6733  * 8 locations available
6734  */
6735 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_E_QUE8 0x8
6736 
6737 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL register field. */
6738 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_LSB 16
6739 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL register field. */
6740 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_MSB 23
6741 /* The width in bits of the ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL register field. */
6742 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_WIDTH 8
6743 /* The mask used to set the ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL register field value. */
6744 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_SET_MSK 0x00ff0000
6745 /* The mask used to clear the ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL register field value. */
6746 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_CLR_MSK 0xff00ffff
6747 /* The reset value of the ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL register field. */
6748 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_RESET 0x8
6749 /* Extracts the ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL field value from a register. */
6750 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_GET(value) (((value) & 0x00ff0000) >> 16)
6751 /* Produces a ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL register field value suitable for setting the register. */
6752 #define ALT_USB_GLOB_GNPTXSTS_NPTXQSPCAVAIL_SET(value) (((value) << 16) & 0x00ff0000)
6753 
6754 /*
6755  * Field : Top of the Non-periodic Transmit Request Queue - nptxqtop
6756  *
6757  * Entry in the Non-periodic Tx Request Queue that is currently being processed by
6758  * the MAC.
6759  *
6760  * * Bits [30:27]: Channel/endpoint number
6761  *
6762  * * Bits [26:25]:
6763  *
6764  * * Bit [24]: Terminate (last Entry for selected channel endpoint)
6765  *
6766  * Field Enumeration Values:
6767  *
6768  * Enum | Value | Description
6769  * :--------------------------------------------|:------|:-------------------------------------------------
6770  * ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_E_INOUTTK | 0x0 | IN/OUT token
6771  * ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_E_ZEROTX | 0x1 | Zero-length transmit packet (device IN/host OUT)
6772  * ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_E_PINGCSPLIT | 0x2 | PING/CSPLIT token
6773  * ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_E_CHNHALT | 0x3 | Channel halt command
6774  *
6775  * Field Access Macros:
6776  *
6777  */
6778 /*
6779  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQTOP
6780  *
6781  * IN/OUT token
6782  */
6783 #define ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_E_INOUTTK 0x0
6784 /*
6785  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQTOP
6786  *
6787  * Zero-length transmit packet (device IN/host OUT)
6788  */
6789 #define ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_E_ZEROTX 0x1
6790 /*
6791  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQTOP
6792  *
6793  * PING/CSPLIT token
6794  */
6795 #define ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_E_PINGCSPLIT 0x2
6796 /*
6797  * Enumerated value for register field ALT_USB_GLOB_GNPTXSTS_NPTXQTOP
6798  *
6799  * Channel halt command
6800  */
6801 #define ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_E_CHNHALT 0x3
6802 
6803 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GNPTXSTS_NPTXQTOP register field. */
6804 #define ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_LSB 24
6805 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GNPTXSTS_NPTXQTOP register field. */
6806 #define ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_MSB 30
6807 /* The width in bits of the ALT_USB_GLOB_GNPTXSTS_NPTXQTOP register field. */
6808 #define ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_WIDTH 7
6809 /* The mask used to set the ALT_USB_GLOB_GNPTXSTS_NPTXQTOP register field value. */
6810 #define ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_SET_MSK 0x7f000000
6811 /* The mask used to clear the ALT_USB_GLOB_GNPTXSTS_NPTXQTOP register field value. */
6812 #define ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_CLR_MSK 0x80ffffff
6813 /* The reset value of the ALT_USB_GLOB_GNPTXSTS_NPTXQTOP register field. */
6814 #define ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_RESET 0x0
6815 /* Extracts the ALT_USB_GLOB_GNPTXSTS_NPTXQTOP field value from a register. */
6816 #define ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_GET(value) (((value) & 0x7f000000) >> 24)
6817 /* Produces a ALT_USB_GLOB_GNPTXSTS_NPTXQTOP register field value suitable for setting the register. */
6818 #define ALT_USB_GLOB_GNPTXSTS_NPTXQTOP_SET(value) (((value) << 24) & 0x7f000000)
6819 
6820 #ifndef __ASSEMBLY__
6821 /*
6822  * WARNING: The C register and register group struct declarations are provided for
6823  * convenience and illustrative purposes. They should, however, be used with
6824  * caution as the C language standard provides no guarantees about the alignment or
6825  * atomicity of device memory accesses. The recommended practice for writing
6826  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
6827  * alt_write_word() functions.
6828  *
6829  * The struct declaration for register ALT_USB_GLOB_GNPTXSTS.
6830  */
6831 struct ALT_USB_GLOB_GNPTXSTS_s
6832 {
6833  const uint32_t nptxfspcavail : 16; /* Non-periodic TxFIFO Space Avail */
6834  const uint32_t nptxqspcavail : 8; /* Non-periodic Transmit Request Queue Space Available */
6835  const uint32_t nptxqtop : 7; /* Top of the Non-periodic Transmit Request Queue */
6836  uint32_t : 1; /* *UNDEFINED* */
6837 };
6838 
6839 /* The typedef declaration for register ALT_USB_GLOB_GNPTXSTS. */
6840 typedef volatile struct ALT_USB_GLOB_GNPTXSTS_s ALT_USB_GLOB_GNPTXSTS_t;
6841 #endif /* __ASSEMBLY__ */
6842 
6843 /* The byte offset of the ALT_USB_GLOB_GNPTXSTS register from the beginning of the component. */
6844 #define ALT_USB_GLOB_GNPTXSTS_OFST 0x2c
6845 /* The address of the ALT_USB_GLOB_GNPTXSTS register. */
6846 #define ALT_USB_GLOB_GNPTXSTS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GNPTXSTS_OFST))
6847 
6848 /*
6849  * Register : PHY Vendor Control Register - gpvndctl
6850  *
6851  * The application can use this register to access PHY registers. for a ULPI PHY,
6852  * the core uses the ULPI interface for PHY register access. The application sets
6853  * Vendor Control register for PHY register access and times the PHY register
6854  * access. The application polls the VStatus Done bit in this register for the
6855  * completion of the PHY register access
6856  *
6857  * Register Layout
6858  *
6859  * Bits | Access | Reset | Description
6860  * :--------|:-------|:------|:--------------------------------------
6861  * [7:0] | RW | 0x0 | Register Data
6862  * [15:8] | RW | 0x0 | UTMI+ Vendor Control Register Address
6863  * [21:16] | RW | 0x0 | Register Address
6864  * [22] | RW | 0x0 | Register Write
6865  * [24:23] | ??? | 0x0 | *UNDEFINED*
6866  * [25] | R | 0x0 | New Register Request
6867  * [26] | R | 0x0 | VStatus Busy
6868  * [27] | R | 0x0 | VStatus Done
6869  * [30:28] | ??? | 0x0 | *UNDEFINED*
6870  * [31] | R | 0x0 | Disable ULPI Drivers
6871  *
6872  */
6873 /*
6874  * Field : Register Data - regdata
6875  *
6876  * Contains the write data for register write. Read data for register read, valid
6877  * when VStatus Done is Set.
6878  *
6879  * Field Access Macros:
6880  *
6881  */
6882 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GPVNDCTL_REGDATA register field. */
6883 #define ALT_USB_GLOB_GPVNDCTL_REGDATA_LSB 0
6884 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GPVNDCTL_REGDATA register field. */
6885 #define ALT_USB_GLOB_GPVNDCTL_REGDATA_MSB 7
6886 /* The width in bits of the ALT_USB_GLOB_GPVNDCTL_REGDATA register field. */
6887 #define ALT_USB_GLOB_GPVNDCTL_REGDATA_WIDTH 8
6888 /* The mask used to set the ALT_USB_GLOB_GPVNDCTL_REGDATA register field value. */
6889 #define ALT_USB_GLOB_GPVNDCTL_REGDATA_SET_MSK 0x000000ff
6890 /* The mask used to clear the ALT_USB_GLOB_GPVNDCTL_REGDATA register field value. */
6891 #define ALT_USB_GLOB_GPVNDCTL_REGDATA_CLR_MSK 0xffffff00
6892 /* The reset value of the ALT_USB_GLOB_GPVNDCTL_REGDATA register field. */
6893 #define ALT_USB_GLOB_GPVNDCTL_REGDATA_RESET 0x0
6894 /* Extracts the ALT_USB_GLOB_GPVNDCTL_REGDATA field value from a register. */
6895 #define ALT_USB_GLOB_GPVNDCTL_REGDATA_GET(value) (((value) & 0x000000ff) >> 0)
6896 /* Produces a ALT_USB_GLOB_GPVNDCTL_REGDATA register field value suitable for setting the register. */
6897 #define ALT_USB_GLOB_GPVNDCTL_REGDATA_SET(value) (((value) << 0) & 0x000000ff)
6898 
6899 /*
6900  * Field : UTMI+ Vendor Control Register Address - vctrl
6901  *
6902  * The 4-bit register address a vendor defined 4-bit parallel output bus. ULPI
6903  * Extended Register Address and the 6-bit PHY extended register address.
6904  *
6905  * Field Access Macros:
6906  *
6907  */
6908 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GPVNDCTL_VCTL register field. */
6909 #define ALT_USB_GLOB_GPVNDCTL_VCTL_LSB 8
6910 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GPVNDCTL_VCTL register field. */
6911 #define ALT_USB_GLOB_GPVNDCTL_VCTL_MSB 15
6912 /* The width in bits of the ALT_USB_GLOB_GPVNDCTL_VCTL register field. */
6913 #define ALT_USB_GLOB_GPVNDCTL_VCTL_WIDTH 8
6914 /* The mask used to set the ALT_USB_GLOB_GPVNDCTL_VCTL register field value. */
6915 #define ALT_USB_GLOB_GPVNDCTL_VCTL_SET_MSK 0x0000ff00
6916 /* The mask used to clear the ALT_USB_GLOB_GPVNDCTL_VCTL register field value. */
6917 #define ALT_USB_GLOB_GPVNDCTL_VCTL_CLR_MSK 0xffff00ff
6918 /* The reset value of the ALT_USB_GLOB_GPVNDCTL_VCTL register field. */
6919 #define ALT_USB_GLOB_GPVNDCTL_VCTL_RESET 0x0
6920 /* Extracts the ALT_USB_GLOB_GPVNDCTL_VCTL field value from a register. */
6921 #define ALT_USB_GLOB_GPVNDCTL_VCTL_GET(value) (((value) & 0x0000ff00) >> 8)
6922 /* Produces a ALT_USB_GLOB_GPVNDCTL_VCTL register field value suitable for setting the register. */
6923 #define ALT_USB_GLOB_GPVNDCTL_VCTL_SET(value) (((value) << 8) & 0x0000ff00)
6924 
6925 /*
6926  * Field : Register Address - regaddr
6927  *
6928  * The 6-bit PHY register address for immediate PHY Register Set access. Set to
6929  * 0x2F for Extended PHY Register Set access.
6930  *
6931  * Field Access Macros:
6932  *
6933  */
6934 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GPVNDCTL_REGADDR register field. */
6935 #define ALT_USB_GLOB_GPVNDCTL_REGADDR_LSB 16
6936 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GPVNDCTL_REGADDR register field. */
6937 #define ALT_USB_GLOB_GPVNDCTL_REGADDR_MSB 21
6938 /* The width in bits of the ALT_USB_GLOB_GPVNDCTL_REGADDR register field. */
6939 #define ALT_USB_GLOB_GPVNDCTL_REGADDR_WIDTH 6
6940 /* The mask used to set the ALT_USB_GLOB_GPVNDCTL_REGADDR register field value. */
6941 #define ALT_USB_GLOB_GPVNDCTL_REGADDR_SET_MSK 0x003f0000
6942 /* The mask used to clear the ALT_USB_GLOB_GPVNDCTL_REGADDR register field value. */
6943 #define ALT_USB_GLOB_GPVNDCTL_REGADDR_CLR_MSK 0xffc0ffff
6944 /* The reset value of the ALT_USB_GLOB_GPVNDCTL_REGADDR register field. */
6945 #define ALT_USB_GLOB_GPVNDCTL_REGADDR_RESET 0x0
6946 /* Extracts the ALT_USB_GLOB_GPVNDCTL_REGADDR field value from a register. */
6947 #define ALT_USB_GLOB_GPVNDCTL_REGADDR_GET(value) (((value) & 0x003f0000) >> 16)
6948 /* Produces a ALT_USB_GLOB_GPVNDCTL_REGADDR register field value suitable for setting the register. */
6949 #define ALT_USB_GLOB_GPVNDCTL_REGADDR_SET(value) (((value) << 16) & 0x003f0000)
6950 
6951 /*
6952  * Field : Register Write - regwr
6953  *
6954  * Set this bit for register writes, and clear it for register reads.
6955  *
6956  * Field Enumeration Values:
6957  *
6958  * Enum | Value | Description
6959  * :---------------------------------|:------|:---------------
6960  * ALT_USB_GLOB_GPVNDCTL_REGWR_E_RD | 0x0 | Register Write
6961  * ALT_USB_GLOB_GPVNDCTL_REGWR_E_WR | 0x1 | Register Write
6962  *
6963  * Field Access Macros:
6964  *
6965  */
6966 /*
6967  * Enumerated value for register field ALT_USB_GLOB_GPVNDCTL_REGWR
6968  *
6969  * Register Write
6970  */
6971 #define ALT_USB_GLOB_GPVNDCTL_REGWR_E_RD 0x0
6972 /*
6973  * Enumerated value for register field ALT_USB_GLOB_GPVNDCTL_REGWR
6974  *
6975  * Register Write
6976  */
6977 #define ALT_USB_GLOB_GPVNDCTL_REGWR_E_WR 0x1
6978 
6979 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GPVNDCTL_REGWR register field. */
6980 #define ALT_USB_GLOB_GPVNDCTL_REGWR_LSB 22
6981 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GPVNDCTL_REGWR register field. */
6982 #define ALT_USB_GLOB_GPVNDCTL_REGWR_MSB 22
6983 /* The width in bits of the ALT_USB_GLOB_GPVNDCTL_REGWR register field. */
6984 #define ALT_USB_GLOB_GPVNDCTL_REGWR_WIDTH 1
6985 /* The mask used to set the ALT_USB_GLOB_GPVNDCTL_REGWR register field value. */
6986 #define ALT_USB_GLOB_GPVNDCTL_REGWR_SET_MSK 0x00400000
6987 /* The mask used to clear the ALT_USB_GLOB_GPVNDCTL_REGWR register field value. */
6988 #define ALT_USB_GLOB_GPVNDCTL_REGWR_CLR_MSK 0xffbfffff
6989 /* The reset value of the ALT_USB_GLOB_GPVNDCTL_REGWR register field. */
6990 #define ALT_USB_GLOB_GPVNDCTL_REGWR_RESET 0x0
6991 /* Extracts the ALT_USB_GLOB_GPVNDCTL_REGWR field value from a register. */
6992 #define ALT_USB_GLOB_GPVNDCTL_REGWR_GET(value) (((value) & 0x00400000) >> 22)
6993 /* Produces a ALT_USB_GLOB_GPVNDCTL_REGWR register field value suitable for setting the register. */
6994 #define ALT_USB_GLOB_GPVNDCTL_REGWR_SET(value) (((value) << 22) & 0x00400000)
6995 
6996 /*
6997  * Field : New Register Request - newregreq
6998  *
6999  * The application sets this bit for a new vendor controlaccess.
7000  *
7001  * Field Enumeration Values:
7002  *
7003  * Enum | Value | Description
7004  * :----------------------------------------|:------|:--------------------------------
7005  * ALT_USB_GLOB_GPVNDCTL_NEWREGREQ_E_INACT | 0x0 | New Register Request not active
7006  * ALT_USB_GLOB_GPVNDCTL_NEWREGREQ_E_ACT | 0x1 | New Register Request active
7007  *
7008  * Field Access Macros:
7009  *
7010  */
7011 /*
7012  * Enumerated value for register field ALT_USB_GLOB_GPVNDCTL_NEWREGREQ
7013  *
7014  * New Register Request not active
7015  */
7016 #define ALT_USB_GLOB_GPVNDCTL_NEWREGREQ_E_INACT 0x0
7017 /*
7018  * Enumerated value for register field ALT_USB_GLOB_GPVNDCTL_NEWREGREQ
7019  *
7020  * New Register Request active
7021  */
7022 #define ALT_USB_GLOB_GPVNDCTL_NEWREGREQ_E_ACT 0x1
7023 
7024 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GPVNDCTL_NEWREGREQ register field. */
7025 #define ALT_USB_GLOB_GPVNDCTL_NEWREGREQ_LSB 25
7026 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GPVNDCTL_NEWREGREQ register field. */
7027 #define ALT_USB_GLOB_GPVNDCTL_NEWREGREQ_MSB 25
7028 /* The width in bits of the ALT_USB_GLOB_GPVNDCTL_NEWREGREQ register field. */
7029 #define ALT_USB_GLOB_GPVNDCTL_NEWREGREQ_WIDTH 1
7030 /* The mask used to set the ALT_USB_GLOB_GPVNDCTL_NEWREGREQ register field value. */
7031 #define ALT_USB_GLOB_GPVNDCTL_NEWREGREQ_SET_MSK 0x02000000
7032 /* The mask used to clear the ALT_USB_GLOB_GPVNDCTL_NEWREGREQ register field value. */
7033 #define ALT_USB_GLOB_GPVNDCTL_NEWREGREQ_CLR_MSK 0xfdffffff
7034 /* The reset value of the ALT_USB_GLOB_GPVNDCTL_NEWREGREQ register field. */
7035 #define ALT_USB_GLOB_GPVNDCTL_NEWREGREQ_RESET 0x0
7036 /* Extracts the ALT_USB_GLOB_GPVNDCTL_NEWREGREQ field value from a register. */
7037 #define ALT_USB_GLOB_GPVNDCTL_NEWREGREQ_GET(value) (((value) & 0x02000000) >> 25)
7038 /* Produces a ALT_USB_GLOB_GPVNDCTL_NEWREGREQ register field value suitable for setting the register. */
7039 #define ALT_USB_GLOB_GPVNDCTL_NEWREGREQ_SET(value) (((value) << 25) & 0x02000000)
7040 
7041 /*
7042  * Field : VStatus Busy - vstsbsy
7043  *
7044  * The core sets this bit when the vendor control access is in progress and clears
7045  * this bit when done.
7046  *
7047  * Field Enumeration Values:
7048  *
7049  * Enum | Value | Description
7050  * :--------------------------------------|:------|:----------------------
7051  * ALT_USB_GLOB_GPVNDCTL_VSTSBSY_E_INACT | 0x0 | VStatus Busy inactive
7052  * ALT_USB_GLOB_GPVNDCTL_VSTSBSY_E_ACT | 0x1 | VStatus Busy active
7053  *
7054  * Field Access Macros:
7055  *
7056  */
7057 /*
7058  * Enumerated value for register field ALT_USB_GLOB_GPVNDCTL_VSTSBSY
7059  *
7060  * VStatus Busy inactive
7061  */
7062 #define ALT_USB_GLOB_GPVNDCTL_VSTSBSY_E_INACT 0x0
7063 /*
7064  * Enumerated value for register field ALT_USB_GLOB_GPVNDCTL_VSTSBSY
7065  *
7066  * VStatus Busy active
7067  */
7068 #define ALT_USB_GLOB_GPVNDCTL_VSTSBSY_E_ACT 0x1
7069 
7070 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GPVNDCTL_VSTSBSY register field. */
7071 #define ALT_USB_GLOB_GPVNDCTL_VSTSBSY_LSB 26
7072 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GPVNDCTL_VSTSBSY register field. */
7073 #define ALT_USB_GLOB_GPVNDCTL_VSTSBSY_MSB 26
7074 /* The width in bits of the ALT_USB_GLOB_GPVNDCTL_VSTSBSY register field. */
7075 #define ALT_USB_GLOB_GPVNDCTL_VSTSBSY_WIDTH 1
7076 /* The mask used to set the ALT_USB_GLOB_GPVNDCTL_VSTSBSY register field value. */
7077 #define ALT_USB_GLOB_GPVNDCTL_VSTSBSY_SET_MSK 0x04000000
7078 /* The mask used to clear the ALT_USB_GLOB_GPVNDCTL_VSTSBSY register field value. */
7079 #define ALT_USB_GLOB_GPVNDCTL_VSTSBSY_CLR_MSK 0xfbffffff
7080 /* The reset value of the ALT_USB_GLOB_GPVNDCTL_VSTSBSY register field. */
7081 #define ALT_USB_GLOB_GPVNDCTL_VSTSBSY_RESET 0x0
7082 /* Extracts the ALT_USB_GLOB_GPVNDCTL_VSTSBSY field value from a register. */
7083 #define ALT_USB_GLOB_GPVNDCTL_VSTSBSY_GET(value) (((value) & 0x04000000) >> 26)
7084 /* Produces a ALT_USB_GLOB_GPVNDCTL_VSTSBSY register field value suitable for setting the register. */
7085 #define ALT_USB_GLOB_GPVNDCTL_VSTSBSY_SET(value) (((value) << 26) & 0x04000000)
7086 
7087 /*
7088  * Field : VStatus Done - vstsdone
7089  *
7090  * The core sets this bit when the vendor control access isdone. This bit is
7091  * cleared by the core when the application sets the New Register Request bit (bit
7092  * 25).
7093  *
7094  * Field Enumeration Values:
7095  *
7096  * Enum | Value | Description
7097  * :---------------------------------------|:------|:----------------------
7098  * ALT_USB_GLOB_GPVNDCTL_VSTSDONE_E_INACT | 0x0 | VStatus Done inactive
7099  * ALT_USB_GLOB_GPVNDCTL_VSTSDONE_E_ACT | 0x1 | VStatus Done active
7100  *
7101  * Field Access Macros:
7102  *
7103  */
7104 /*
7105  * Enumerated value for register field ALT_USB_GLOB_GPVNDCTL_VSTSDONE
7106  *
7107  * VStatus Done inactive
7108  */
7109 #define ALT_USB_GLOB_GPVNDCTL_VSTSDONE_E_INACT 0x0
7110 /*
7111  * Enumerated value for register field ALT_USB_GLOB_GPVNDCTL_VSTSDONE
7112  *
7113  * VStatus Done active
7114  */
7115 #define ALT_USB_GLOB_GPVNDCTL_VSTSDONE_E_ACT 0x1
7116 
7117 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GPVNDCTL_VSTSDONE register field. */
7118 #define ALT_USB_GLOB_GPVNDCTL_VSTSDONE_LSB 27
7119 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GPVNDCTL_VSTSDONE register field. */
7120 #define ALT_USB_GLOB_GPVNDCTL_VSTSDONE_MSB 27
7121 /* The width in bits of the ALT_USB_GLOB_GPVNDCTL_VSTSDONE register field. */
7122 #define ALT_USB_GLOB_GPVNDCTL_VSTSDONE_WIDTH 1
7123 /* The mask used to set the ALT_USB_GLOB_GPVNDCTL_VSTSDONE register field value. */
7124 #define ALT_USB_GLOB_GPVNDCTL_VSTSDONE_SET_MSK 0x08000000
7125 /* The mask used to clear the ALT_USB_GLOB_GPVNDCTL_VSTSDONE register field value. */
7126 #define ALT_USB_GLOB_GPVNDCTL_VSTSDONE_CLR_MSK 0xf7ffffff
7127 /* The reset value of the ALT_USB_GLOB_GPVNDCTL_VSTSDONE register field. */
7128 #define ALT_USB_GLOB_GPVNDCTL_VSTSDONE_RESET 0x0
7129 /* Extracts the ALT_USB_GLOB_GPVNDCTL_VSTSDONE field value from a register. */
7130 #define ALT_USB_GLOB_GPVNDCTL_VSTSDONE_GET(value) (((value) & 0x08000000) >> 27)
7131 /* Produces a ALT_USB_GLOB_GPVNDCTL_VSTSDONE register field value suitable for setting the register. */
7132 #define ALT_USB_GLOB_GPVNDCTL_VSTSDONE_SET(value) (((value) << 27) & 0x08000000)
7133 
7134 /*
7135  * Field : Disable ULPI Drivers - disulpidrvr
7136  *
7137  * The application sets this bit when it has finished processing the ULPI Carkit
7138  * Interrupt (GINTSTS.ULPICKINT). When Set, the otg core disables drivers for
7139  * output signals and masks input signal for the ULPI interface. otg clears this
7140  * bit before enabling the ULPI interface.
7141  *
7142  * Field Enumeration Values:
7143  *
7144  * Enum | Value | Description
7145  * :-----------------------------------------|:------|:---------------------------
7146  * ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR_E_END | 0x0 | ULPI ouput signals
7147  * ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR_E_DISD | 0x1 | Disable ULPI ouput signals
7148  *
7149  * Field Access Macros:
7150  *
7151  */
7152 /*
7153  * Enumerated value for register field ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR
7154  *
7155  * ULPI ouput signals
7156  */
7157 #define ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR_E_END 0x0
7158 /*
7159  * Enumerated value for register field ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR
7160  *
7161  * Disable ULPI ouput signals
7162  */
7163 #define ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR_E_DISD 0x1
7164 
7165 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR register field. */
7166 #define ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR_LSB 31
7167 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR register field. */
7168 #define ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR_MSB 31
7169 /* The width in bits of the ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR register field. */
7170 #define ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR_WIDTH 1
7171 /* The mask used to set the ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR register field value. */
7172 #define ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR_SET_MSK 0x80000000
7173 /* The mask used to clear the ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR register field value. */
7174 #define ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR_CLR_MSK 0x7fffffff
7175 /* The reset value of the ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR register field. */
7176 #define ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR_RESET 0x0
7177 /* Extracts the ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR field value from a register. */
7178 #define ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR_GET(value) (((value) & 0x80000000) >> 31)
7179 /* Produces a ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR register field value suitable for setting the register. */
7180 #define ALT_USB_GLOB_GPVNDCTL_DISULPIDRVR_SET(value) (((value) << 31) & 0x80000000)
7181 
7182 #ifndef __ASSEMBLY__
7183 /*
7184  * WARNING: The C register and register group struct declarations are provided for
7185  * convenience and illustrative purposes. They should, however, be used with
7186  * caution as the C language standard provides no guarantees about the alignment or
7187  * atomicity of device memory accesses. The recommended practice for writing
7188  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
7189  * alt_write_word() functions.
7190  *
7191  * The struct declaration for register ALT_USB_GLOB_GPVNDCTL.
7192  */
7193 struct ALT_USB_GLOB_GPVNDCTL_s
7194 {
7195  uint32_t regdata : 8; /* Register Data */
7196  uint32_t vctrl : 8; /* UTMI+ Vendor Control Register Address */
7197  uint32_t regaddr : 6; /* Register Address */
7198  uint32_t regwr : 1; /* Register Write */
7199  uint32_t : 2; /* *UNDEFINED* */
7200  const uint32_t newregreq : 1; /* New Register Request */
7201  const uint32_t vstsbsy : 1; /* VStatus Busy */
7202  const uint32_t vstsdone : 1; /* VStatus Done */
7203  uint32_t : 3; /* *UNDEFINED* */
7204  const uint32_t disulpidrvr : 1; /* Disable ULPI Drivers */
7205 };
7206 
7207 /* The typedef declaration for register ALT_USB_GLOB_GPVNDCTL. */
7208 typedef volatile struct ALT_USB_GLOB_GPVNDCTL_s ALT_USB_GLOB_GPVNDCTL_t;
7209 #endif /* __ASSEMBLY__ */
7210 
7211 /* The byte offset of the ALT_USB_GLOB_GPVNDCTL register from the beginning of the component. */
7212 #define ALT_USB_GLOB_GPVNDCTL_OFST 0x34
7213 /* The address of the ALT_USB_GLOB_GPVNDCTL register. */
7214 #define ALT_USB_GLOB_GPVNDCTL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GPVNDCTL_OFST))
7215 
7216 /*
7217  * Register : General Purpose Input Output Register - ggpio
7218  *
7219  * The application can use this register for general purpose input/output ports or
7220  * for debugging.
7221  *
7222  * Register Layout
7223  *
7224  * Bits | Access | Reset | Description
7225  * :--------|:-------|:------|:-----------------------
7226  * [15:0] | R | 0x0 | General Purpose Input
7227  * [31:16] | RW | 0x0 | General Purpose Output
7228  *
7229  */
7230 /*
7231  * Field : General Purpose Input - gpi
7232  *
7233  * This field's read value reflects the gp_i[15:0] core input value.
7234  *
7235  * Field Access Macros:
7236  *
7237  */
7238 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GGPIO_GPI register field. */
7239 #define ALT_USB_GLOB_GGPIO_GPI_LSB 0
7240 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GGPIO_GPI register field. */
7241 #define ALT_USB_GLOB_GGPIO_GPI_MSB 15
7242 /* The width in bits of the ALT_USB_GLOB_GGPIO_GPI register field. */
7243 #define ALT_USB_GLOB_GGPIO_GPI_WIDTH 16
7244 /* The mask used to set the ALT_USB_GLOB_GGPIO_GPI register field value. */
7245 #define ALT_USB_GLOB_GGPIO_GPI_SET_MSK 0x0000ffff
7246 /* The mask used to clear the ALT_USB_GLOB_GGPIO_GPI register field value. */
7247 #define ALT_USB_GLOB_GGPIO_GPI_CLR_MSK 0xffff0000
7248 /* The reset value of the ALT_USB_GLOB_GGPIO_GPI register field. */
7249 #define ALT_USB_GLOB_GGPIO_GPI_RESET 0x0
7250 /* Extracts the ALT_USB_GLOB_GGPIO_GPI field value from a register. */
7251 #define ALT_USB_GLOB_GGPIO_GPI_GET(value) (((value) & 0x0000ffff) >> 0)
7252 /* Produces a ALT_USB_GLOB_GGPIO_GPI register field value suitable for setting the register. */
7253 #define ALT_USB_GLOB_GGPIO_GPI_SET(value) (((value) << 0) & 0x0000ffff)
7254 
7255 /*
7256  * Field : General Purpose Output - gpo
7257  *
7258  * This field is driven as an output from the core, gp_o[15:0]. The application can
7259  * program this field to determine the corresponding value on the gp_o[15:0]
7260  * output.
7261  *
7262  * Field Access Macros:
7263  *
7264  */
7265 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GGPIO_GPO register field. */
7266 #define ALT_USB_GLOB_GGPIO_GPO_LSB 16
7267 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GGPIO_GPO register field. */
7268 #define ALT_USB_GLOB_GGPIO_GPO_MSB 31
7269 /* The width in bits of the ALT_USB_GLOB_GGPIO_GPO register field. */
7270 #define ALT_USB_GLOB_GGPIO_GPO_WIDTH 16
7271 /* The mask used to set the ALT_USB_GLOB_GGPIO_GPO register field value. */
7272 #define ALT_USB_GLOB_GGPIO_GPO_SET_MSK 0xffff0000
7273 /* The mask used to clear the ALT_USB_GLOB_GGPIO_GPO register field value. */
7274 #define ALT_USB_GLOB_GGPIO_GPO_CLR_MSK 0x0000ffff
7275 /* The reset value of the ALT_USB_GLOB_GGPIO_GPO register field. */
7276 #define ALT_USB_GLOB_GGPIO_GPO_RESET 0x0
7277 /* Extracts the ALT_USB_GLOB_GGPIO_GPO field value from a register. */
7278 #define ALT_USB_GLOB_GGPIO_GPO_GET(value) (((value) & 0xffff0000) >> 16)
7279 /* Produces a ALT_USB_GLOB_GGPIO_GPO register field value suitable for setting the register. */
7280 #define ALT_USB_GLOB_GGPIO_GPO_SET(value) (((value) << 16) & 0xffff0000)
7281 
7282 #ifndef __ASSEMBLY__
7283 /*
7284  * WARNING: The C register and register group struct declarations are provided for
7285  * convenience and illustrative purposes. They should, however, be used with
7286  * caution as the C language standard provides no guarantees about the alignment or
7287  * atomicity of device memory accesses. The recommended practice for writing
7288  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
7289  * alt_write_word() functions.
7290  *
7291  * The struct declaration for register ALT_USB_GLOB_GGPIO.
7292  */
7293 struct ALT_USB_GLOB_GGPIO_s
7294 {
7295  const uint32_t gpi : 16; /* General Purpose Input */
7296  uint32_t gpo : 16; /* General Purpose Output */
7297 };
7298 
7299 /* The typedef declaration for register ALT_USB_GLOB_GGPIO. */
7300 typedef volatile struct ALT_USB_GLOB_GGPIO_s ALT_USB_GLOB_GGPIO_t;
7301 #endif /* __ASSEMBLY__ */
7302 
7303 /* The byte offset of the ALT_USB_GLOB_GGPIO register from the beginning of the component. */
7304 #define ALT_USB_GLOB_GGPIO_OFST 0x38
7305 /* The address of the ALT_USB_GLOB_GGPIO register. */
7306 #define ALT_USB_GLOB_GGPIO_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GGPIO_OFST))
7307 
7308 /*
7309  * Register : User ID Register - guid
7310  *
7311  * This is a read/write register containing the User ID. This register can be used
7312  * in the following ways:
7313  *
7314  * * To store the version or revision of your system
7315  *
7316  * * To store hardware configurations that are outside the otg core
7317  *
7318  * As a scratch register
7319  *
7320  * Register Layout
7321  *
7322  * Bits | Access | Reset | Description
7323  * :-------|:-------|:-----------|:------------
7324  * [31:0] | RW | 0x12345678 | User ID
7325  *
7326  */
7327 /*
7328  * Field : User ID - guid
7329  *
7330  * Application-programmable ID field.
7331  *
7332  * Field Access Macros:
7333  *
7334  */
7335 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GUID_GUID register field. */
7336 #define ALT_USB_GLOB_GUID_GUID_LSB 0
7337 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GUID_GUID register field. */
7338 #define ALT_USB_GLOB_GUID_GUID_MSB 31
7339 /* The width in bits of the ALT_USB_GLOB_GUID_GUID register field. */
7340 #define ALT_USB_GLOB_GUID_GUID_WIDTH 32
7341 /* The mask used to set the ALT_USB_GLOB_GUID_GUID register field value. */
7342 #define ALT_USB_GLOB_GUID_GUID_SET_MSK 0xffffffff
7343 /* The mask used to clear the ALT_USB_GLOB_GUID_GUID register field value. */
7344 #define ALT_USB_GLOB_GUID_GUID_CLR_MSK 0x00000000
7345 /* The reset value of the ALT_USB_GLOB_GUID_GUID register field. */
7346 #define ALT_USB_GLOB_GUID_GUID_RESET 0x12345678
7347 /* Extracts the ALT_USB_GLOB_GUID_GUID field value from a register. */
7348 #define ALT_USB_GLOB_GUID_GUID_GET(value) (((value) & 0xffffffff) >> 0)
7349 /* Produces a ALT_USB_GLOB_GUID_GUID register field value suitable for setting the register. */
7350 #define ALT_USB_GLOB_GUID_GUID_SET(value) (((value) << 0) & 0xffffffff)
7351 
7352 #ifndef __ASSEMBLY__
7353 /*
7354  * WARNING: The C register and register group struct declarations are provided for
7355  * convenience and illustrative purposes. They should, however, be used with
7356  * caution as the C language standard provides no guarantees about the alignment or
7357  * atomicity of device memory accesses. The recommended practice for writing
7358  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
7359  * alt_write_word() functions.
7360  *
7361  * The struct declaration for register ALT_USB_GLOB_GUID.
7362  */
7363 struct ALT_USB_GLOB_GUID_s
7364 {
7365  uint32_t guid : 32; /* User ID */
7366 };
7367 
7368 /* The typedef declaration for register ALT_USB_GLOB_GUID. */
7369 typedef volatile struct ALT_USB_GLOB_GUID_s ALT_USB_GLOB_GUID_t;
7370 #endif /* __ASSEMBLY__ */
7371 
7372 /* The byte offset of the ALT_USB_GLOB_GUID register from the beginning of the component. */
7373 #define ALT_USB_GLOB_GUID_OFST 0x3c
7374 /* The address of the ALT_USB_GLOB_GUID register. */
7375 #define ALT_USB_GLOB_GUID_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GUID_OFST))
7376 
7377 /*
7378  * Register : Synopsys ID Register - gsnpsid
7379  *
7380  * This read-only register contains the release number of the core being used.
7381  *
7382  * Register Layout
7383  *
7384  * Bits | Access | Reset | Description
7385  * :-------|:-------|:-----------|:------------
7386  * [31:0] | R | 0x4f54293a | Synopsys ID
7387  *
7388  */
7389 /*
7390  * Field : Synopsys ID - gsnpsid
7391  *
7392  * Release number of the otg core being used is currently OTG 2.93a
7393  *
7394  * Field Access Macros:
7395  *
7396  */
7397 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GSNPSID_GSNPSID register field. */
7398 #define ALT_USB_GLOB_GSNPSID_GSNPSID_LSB 0
7399 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GSNPSID_GSNPSID register field. */
7400 #define ALT_USB_GLOB_GSNPSID_GSNPSID_MSB 31
7401 /* The width in bits of the ALT_USB_GLOB_GSNPSID_GSNPSID register field. */
7402 #define ALT_USB_GLOB_GSNPSID_GSNPSID_WIDTH 32
7403 /* The mask used to set the ALT_USB_GLOB_GSNPSID_GSNPSID register field value. */
7404 #define ALT_USB_GLOB_GSNPSID_GSNPSID_SET_MSK 0xffffffff
7405 /* The mask used to clear the ALT_USB_GLOB_GSNPSID_GSNPSID register field value. */
7406 #define ALT_USB_GLOB_GSNPSID_GSNPSID_CLR_MSK 0x00000000
7407 /* The reset value of the ALT_USB_GLOB_GSNPSID_GSNPSID register field. */
7408 #define ALT_USB_GLOB_GSNPSID_GSNPSID_RESET 0x4f54293a
7409 /* Extracts the ALT_USB_GLOB_GSNPSID_GSNPSID field value from a register. */
7410 #define ALT_USB_GLOB_GSNPSID_GSNPSID_GET(value) (((value) & 0xffffffff) >> 0)
7411 /* Produces a ALT_USB_GLOB_GSNPSID_GSNPSID register field value suitable for setting the register. */
7412 #define ALT_USB_GLOB_GSNPSID_GSNPSID_SET(value) (((value) << 0) & 0xffffffff)
7413 
7414 #ifndef __ASSEMBLY__
7415 /*
7416  * WARNING: The C register and register group struct declarations are provided for
7417  * convenience and illustrative purposes. They should, however, be used with
7418  * caution as the C language standard provides no guarantees about the alignment or
7419  * atomicity of device memory accesses. The recommended practice for writing
7420  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
7421  * alt_write_word() functions.
7422  *
7423  * The struct declaration for register ALT_USB_GLOB_GSNPSID.
7424  */
7425 struct ALT_USB_GLOB_GSNPSID_s
7426 {
7427  const uint32_t gsnpsid : 32; /* Synopsys ID */
7428 };
7429 
7430 /* The typedef declaration for register ALT_USB_GLOB_GSNPSID. */
7431 typedef volatile struct ALT_USB_GLOB_GSNPSID_s ALT_USB_GLOB_GSNPSID_t;
7432 #endif /* __ASSEMBLY__ */
7433 
7434 /* The byte offset of the ALT_USB_GLOB_GSNPSID register from the beginning of the component. */
7435 #define ALT_USB_GLOB_GSNPSID_OFST 0x40
7436 /* The address of the ALT_USB_GLOB_GSNPSID register. */
7437 #define ALT_USB_GLOB_GSNPSID_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GSNPSID_OFST))
7438 
7439 /*
7440  * Register : User HW Config1 Register - ghwcfg1
7441  *
7442  * This register contains the logical endpoint direction(s).
7443  *
7444  * Register Layout
7445  *
7446  * Bits | Access | Reset | Description
7447  * :-------|:-------|:------|:-------------------
7448  * [31:0] | R | 0x0 | Endpoint Direction
7449  *
7450  */
7451 /*
7452  * Field : Endpoint Direction - ghwcfg1
7453  *
7454  * This 32-bit field uses two bits per endpoint to determine the endpoint
7455  * direction.
7456  *
7457  * Endpoint
7458  *
7459  * * Bits [31:30]: Endpoint 15 direction
7460  *
7461  * * Bits [29:28]: Endpoint 14 direction
7462  *
7463  * ...
7464  *
7465  * * Bits [3:2]: Endpoint 1 direction
7466  *
7467  * * Bits[1:0]: Endpoint 0 direction (always BIDIR)
7468  *
7469  * Field Enumeration Values:
7470  *
7471  * Enum | Value | Description
7472  * :----------------------------------------|:------|:----------------------------
7473  * ALT_USB_GLOB_GHWCFG1_GHWCFG1_E_BDIR | 0x0 | BIDIR (IN and OUT) endpoint
7474  * ALT_USB_GLOB_GHWCFG1_GHWCFG1_E_INENDPT | 0x1 | IN endpoint
7475  * ALT_USB_GLOB_GHWCFG1_GHWCFG1_E_OUTENDPT | 0x2 | OUT endpoint
7476  * ALT_USB_GLOB_GHWCFG1_GHWCFG1_E_RSVD | 0x3 | Reserved
7477  *
7478  * Field Access Macros:
7479  *
7480  */
7481 /*
7482  * Enumerated value for register field ALT_USB_GLOB_GHWCFG1_GHWCFG1
7483  *
7484  * BIDIR (IN and OUT) endpoint
7485  */
7486 #define ALT_USB_GLOB_GHWCFG1_GHWCFG1_E_BDIR 0x0
7487 /*
7488  * Enumerated value for register field ALT_USB_GLOB_GHWCFG1_GHWCFG1
7489  *
7490  * IN endpoint
7491  */
7492 #define ALT_USB_GLOB_GHWCFG1_GHWCFG1_E_INENDPT 0x1
7493 /*
7494  * Enumerated value for register field ALT_USB_GLOB_GHWCFG1_GHWCFG1
7495  *
7496  * OUT endpoint
7497  */
7498 #define ALT_USB_GLOB_GHWCFG1_GHWCFG1_E_OUTENDPT 0x2
7499 /*
7500  * Enumerated value for register field ALT_USB_GLOB_GHWCFG1_GHWCFG1
7501  *
7502  * Reserved
7503  */
7504 #define ALT_USB_GLOB_GHWCFG1_GHWCFG1_E_RSVD 0x3
7505 
7506 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG1_GHWCFG1 register field. */
7507 #define ALT_USB_GLOB_GHWCFG1_GHWCFG1_LSB 0
7508 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG1_GHWCFG1 register field. */
7509 #define ALT_USB_GLOB_GHWCFG1_GHWCFG1_MSB 31
7510 /* The width in bits of the ALT_USB_GLOB_GHWCFG1_GHWCFG1 register field. */
7511 #define ALT_USB_GLOB_GHWCFG1_GHWCFG1_WIDTH 32
7512 /* The mask used to set the ALT_USB_GLOB_GHWCFG1_GHWCFG1 register field value. */
7513 #define ALT_USB_GLOB_GHWCFG1_GHWCFG1_SET_MSK 0xffffffff
7514 /* The mask used to clear the ALT_USB_GLOB_GHWCFG1_GHWCFG1 register field value. */
7515 #define ALT_USB_GLOB_GHWCFG1_GHWCFG1_CLR_MSK 0x00000000
7516 /* The reset value of the ALT_USB_GLOB_GHWCFG1_GHWCFG1 register field. */
7517 #define ALT_USB_GLOB_GHWCFG1_GHWCFG1_RESET 0x0
7518 /* Extracts the ALT_USB_GLOB_GHWCFG1_GHWCFG1 field value from a register. */
7519 #define ALT_USB_GLOB_GHWCFG1_GHWCFG1_GET(value) (((value) & 0xffffffff) >> 0)
7520 /* Produces a ALT_USB_GLOB_GHWCFG1_GHWCFG1 register field value suitable for setting the register. */
7521 #define ALT_USB_GLOB_GHWCFG1_GHWCFG1_SET(value) (((value) << 0) & 0xffffffff)
7522 
7523 #ifndef __ASSEMBLY__
7524 /*
7525  * WARNING: The C register and register group struct declarations are provided for
7526  * convenience and illustrative purposes. They should, however, be used with
7527  * caution as the C language standard provides no guarantees about the alignment or
7528  * atomicity of device memory accesses. The recommended practice for writing
7529  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
7530  * alt_write_word() functions.
7531  *
7532  * The struct declaration for register ALT_USB_GLOB_GHWCFG1.
7533  */
7534 struct ALT_USB_GLOB_GHWCFG1_s
7535 {
7536  const uint32_t ghwcfg1 : 32; /* Endpoint Direction */
7537 };
7538 
7539 /* The typedef declaration for register ALT_USB_GLOB_GHWCFG1. */
7540 typedef volatile struct ALT_USB_GLOB_GHWCFG1_s ALT_USB_GLOB_GHWCFG1_t;
7541 #endif /* __ASSEMBLY__ */
7542 
7543 /* The byte offset of the ALT_USB_GLOB_GHWCFG1 register from the beginning of the component. */
7544 #define ALT_USB_GLOB_GHWCFG1_OFST 0x44
7545 /* The address of the ALT_USB_GLOB_GHWCFG1 register. */
7546 #define ALT_USB_GLOB_GHWCFG1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GHWCFG1_OFST))
7547 
7548 /*
7549  * Register : User HW Config2 Register - ghwcfg2
7550  *
7551  * This register contains configuration options.
7552  *
7553  * Register Layout
7554  *
7555  * Bits | Access | Reset | Description
7556  * :--------|:-------|:------|:---------------------------------------------------
7557  * [2:0] | R | 0x0 | Mode of Operation
7558  * [4:3] | R | 0x2 | Architecture
7559  * [5] | R | 0x0 | Point-to-Point
7560  * [7:6] | R | 0x2 | High Speed PHY Interface Type
7561  * [9:8] | R | 0x0 | Full Speed PHY Interface Type
7562  * [13:10] | R | 0xf | Number of Device Endpoints
7563  * [17:14] | R | 0xf | Number of Host Channels
7564  * [18] | R | 0x1 | Periodic OUT Channels Supported in Host Mode
7565  * [19] | R | 0x1 | Dynamic FIFO Sizing Enabled
7566  * [20] | R | 0x0 | Multi Processor Interrupt Enabled
7567  * [21] | ??? | 0x0 | *UNDEFINED*
7568  * [23:22] | R | 0x2 | Non Periodic Request Queue Depth
7569  * [25:24] | R | 0x0 | Host Mode Periodic Request Queue Depth
7570  * [30:26] | R | 0x8 | Device Mode IN Token Sequence Learning Queue Depth
7571  * [31] | ??? | 0x0 | *UNDEFINED*
7572  *
7573  */
7574 /*
7575  * Field : Mode of Operation - otgmode
7576  *
7577  * HNP- and SRP-Capable OTG (Device and Host).
7578  *
7579  * Field Enumeration Values:
7580  *
7581  * Enum | Value | Description
7582  * :---------------------------------------|:------|:------------------------------------------------
7583  * ALT_USB_GLOB_GHWCFG2_OTGMOD_E_HNPSRP | 0x0 | HNP- and SRP-Capable OTG (Host & Device
7584  * ALT_USB_GLOB_GHWCFG2_OTGMOD_E_SRPOTG | 0x1 | SRP-Capable OTG (Host & Device)
7585  * ALT_USB_GLOB_GHWCFG2_OTGMOD_E_NHNPNSRP | 0x2 | Non-HNP and Non-SRP Capable OTG (Host & Device)
7586  * ALT_USB_GLOB_GHWCFG2_OTGMOD_E_SRPCAPD | 0x3 | SRP-Capable Device
7587  * ALT_USB_GLOB_GHWCFG2_OTGMOD_E_NONOTGD | 0x4 | Non-OTG Device
7588  * ALT_USB_GLOB_GHWCFG2_OTGMOD_E_SRPCAPH | 0x5 | SRP-Capable Host
7589  * ALT_USB_GLOB_GHWCFG2_OTGMOD_E_NONOTGH | 0x6 | Non-OTG Host
7590  *
7591  * Field Access Macros:
7592  *
7593  */
7594 /*
7595  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
7596  *
7597  * HNP- and SRP-Capable OTG (Host & Device
7598  */
7599 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_HNPSRP 0x0
7600 /*
7601  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
7602  *
7603  * SRP-Capable OTG (Host & Device)
7604  */
7605 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_SRPOTG 0x1
7606 /*
7607  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
7608  *
7609  * Non-HNP and Non-SRP Capable OTG (Host & Device)
7610  */
7611 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_NHNPNSRP 0x2
7612 /*
7613  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
7614  *
7615  * SRP-Capable Device
7616  */
7617 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_SRPCAPD 0x3
7618 /*
7619  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
7620  *
7621  * Non-OTG Device
7622  */
7623 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_NONOTGD 0x4
7624 /*
7625  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
7626  *
7627  * SRP-Capable Host
7628  */
7629 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_SRPCAPH 0x5
7630 /*
7631  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
7632  *
7633  * Non-OTG Host
7634  */
7635 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_NONOTGH 0x6
7636 
7637 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_OTGMOD register field. */
7638 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_LSB 0
7639 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_OTGMOD register field. */
7640 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_MSB 2
7641 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_OTGMOD register field. */
7642 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_WIDTH 3
7643 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_OTGMOD register field value. */
7644 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_SET_MSK 0x00000007
7645 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_OTGMOD register field value. */
7646 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_CLR_MSK 0xfffffff8
7647 /* The reset value of the ALT_USB_GLOB_GHWCFG2_OTGMOD register field. */
7648 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_RESET 0x0
7649 /* Extracts the ALT_USB_GLOB_GHWCFG2_OTGMOD field value from a register. */
7650 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_GET(value) (((value) & 0x00000007) >> 0)
7651 /* Produces a ALT_USB_GLOB_GHWCFG2_OTGMOD register field value suitable for setting the register. */
7652 #define ALT_USB_GLOB_GHWCFG2_OTGMOD_SET(value) (((value) << 0) & 0x00000007)
7653 
7654 /*
7655  * Field : Architecture - otgarch
7656  *
7657  * DMA Architecture.
7658  *
7659  * Field Enumeration Values:
7660  *
7661  * Enum | Value | Description
7662  * :--------------------------------------|:------|:-------------
7663  * ALT_USB_GLOB_GHWCFG2_OTGARCH_E_DMAMOD | 0x2 | Internal DMA
7664  *
7665  * Field Access Macros:
7666  *
7667  */
7668 /*
7669  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGARCH
7670  *
7671  * Internal DMA
7672  */
7673 #define ALT_USB_GLOB_GHWCFG2_OTGARCH_E_DMAMOD 0x2
7674 
7675 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_OTGARCH register field. */
7676 #define ALT_USB_GLOB_GHWCFG2_OTGARCH_LSB 3
7677 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_OTGARCH register field. */
7678 #define ALT_USB_GLOB_GHWCFG2_OTGARCH_MSB 4
7679 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_OTGARCH register field. */
7680 #define ALT_USB_GLOB_GHWCFG2_OTGARCH_WIDTH 2
7681 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_OTGARCH register field value. */
7682 #define ALT_USB_GLOB_GHWCFG2_OTGARCH_SET_MSK 0x00000018
7683 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_OTGARCH register field value. */
7684 #define ALT_USB_GLOB_GHWCFG2_OTGARCH_CLR_MSK 0xffffffe7
7685 /* The reset value of the ALT_USB_GLOB_GHWCFG2_OTGARCH register field. */
7686 #define ALT_USB_GLOB_GHWCFG2_OTGARCH_RESET 0x2
7687 /* Extracts the ALT_USB_GLOB_GHWCFG2_OTGARCH field value from a register. */
7688 #define ALT_USB_GLOB_GHWCFG2_OTGARCH_GET(value) (((value) & 0x00000018) >> 3)
7689 /* Produces a ALT_USB_GLOB_GHWCFG2_OTGARCH register field value suitable for setting the register. */
7690 #define ALT_USB_GLOB_GHWCFG2_OTGARCH_SET(value) (((value) << 3) & 0x00000018)
7691 
7692 /*
7693  * Field : Point-to-Point - singpnt
7694  *
7695  * Single Point Only.
7696  *
7697  * Field Enumeration Values:
7698  *
7699  * Enum | Value | Description
7700  * :-------------------------------------------|:------|:------------------------
7701  * ALT_USB_GLOB_GHWCFG2_SINGPNT_E_SINGLEPOINT | 0x1 | Single-point applicatio
7702  *
7703  * Field Access Macros:
7704  *
7705  */
7706 /*
7707  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_SINGPNT
7708  *
7709  * Single-point applicatio
7710  */
7711 #define ALT_USB_GLOB_GHWCFG2_SINGPNT_E_SINGLEPOINT 0x1
7712 
7713 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_SINGPNT register field. */
7714 #define ALT_USB_GLOB_GHWCFG2_SINGPNT_LSB 5
7715 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_SINGPNT register field. */
7716 #define ALT_USB_GLOB_GHWCFG2_SINGPNT_MSB 5
7717 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_SINGPNT register field. */
7718 #define ALT_USB_GLOB_GHWCFG2_SINGPNT_WIDTH 1
7719 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_SINGPNT register field value. */
7720 #define ALT_USB_GLOB_GHWCFG2_SINGPNT_SET_MSK 0x00000020
7721 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_SINGPNT register field value. */
7722 #define ALT_USB_GLOB_GHWCFG2_SINGPNT_CLR_MSK 0xffffffdf
7723 /* The reset value of the ALT_USB_GLOB_GHWCFG2_SINGPNT register field. */
7724 #define ALT_USB_GLOB_GHWCFG2_SINGPNT_RESET 0x0
7725 /* Extracts the ALT_USB_GLOB_GHWCFG2_SINGPNT field value from a register. */
7726 #define ALT_USB_GLOB_GHWCFG2_SINGPNT_GET(value) (((value) & 0x00000020) >> 5)
7727 /* Produces a ALT_USB_GLOB_GHWCFG2_SINGPNT register field value suitable for setting the register. */
7728 #define ALT_USB_GLOB_GHWCFG2_SINGPNT_SET(value) (((value) << 5) & 0x00000020)
7729 
7730 /*
7731  * Field : High Speed PHY Interface Type - hsphytype
7732  *
7733  * Specifies the High Speed PHY in use.
7734  *
7735  * Field Enumeration Values:
7736  *
7737  * Enum | Value | Description
7738  * :--------------------------------------|:------|:-----------------------------------
7739  * ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_E_NOHS | 0x0 | High-Speed interface not supported
7740  * ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_E_ULPI | 0x2 | ULPI
7741  *
7742  * Field Access Macros:
7743  *
7744  */
7745 /*
7746  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_HSPHYTYPE
7747  *
7748  * High-Speed interface not supported
7749  */
7750 #define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_E_NOHS 0x0
7751 /*
7752  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_HSPHYTYPE
7753  *
7754  * ULPI
7755  */
7756 #define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_E_ULPI 0x2
7757 
7758 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field. */
7759 #define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_LSB 6
7760 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field. */
7761 #define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_MSB 7
7762 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field. */
7763 #define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_WIDTH 2
7764 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field value. */
7765 #define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_SET_MSK 0x000000c0
7766 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field value. */
7767 #define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_CLR_MSK 0xffffff3f
7768 /* The reset value of the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field. */
7769 #define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_RESET 0x2
7770 /* Extracts the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE field value from a register. */
7771 #define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_GET(value) (((value) & 0x000000c0) >> 6)
7772 /* Produces a ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field value suitable for setting the register. */
7773 #define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_SET(value) (((value) << 6) & 0x000000c0)
7774 
7775 /*
7776  * Field : Full Speed PHY Interface Type - fsphytype
7777  *
7778  * Specifies the Full Speed PHY in use.
7779  *
7780  * Field Enumeration Values:
7781  *
7782  * Enum | Value | Description
7783  * :-------------------------------------------|:------|:------------
7784  * ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_E_FULLSPEED | 0x2 | ULPI Type
7785  *
7786  * Field Access Macros:
7787  *
7788  */
7789 /*
7790  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_FSPHYTYPE
7791  *
7792  * ULPI Type
7793  */
7794 #define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_E_FULLSPEED 0x2
7795 
7796 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field. */
7797 #define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_LSB 8
7798 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field. */
7799 #define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_MSB 9
7800 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field. */
7801 #define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_WIDTH 2
7802 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field value. */
7803 #define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_SET_MSK 0x00000300
7804 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field value. */
7805 #define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_CLR_MSK 0xfffffcff
7806 /* The reset value of the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field. */
7807 #define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_RESET 0x0
7808 /* Extracts the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE field value from a register. */
7809 #define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_GET(value) (((value) & 0x00000300) >> 8)
7810 /* Produces a ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field value suitable for setting the register. */
7811 #define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_SET(value) (((value) << 8) & 0x00000300)
7812 
7813 /*
7814  * Field : Number of Device Endpoints - numdeveps
7815  *
7816  * The number of endpoints is 1 to 15 in Device mode in addition to control
7817  * endpoint 0.
7818  *
7819  * Field Enumeration Values:
7820  *
7821  * Enum | Value | Description
7822  * :-----------------------------------------|:------|:--------------
7823  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT0 | 0x0 | End point 0
7824  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT1 | 0x1 | End point 1
7825  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT2 | 0x2 | End point 2
7826  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT3 | 0x3 | End point 3
7827  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT4 | 0x4 | End point 4
7828  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT5 | 0x5 | End point 5
7829  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT6 | 0x6 | End point 6
7830  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT7 | 0x7 | End point 7
7831  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT8 | 0x8 | End point 8
7832  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT9 | 0x9 | End point 9
7833  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT10 | 0xa | End point 10
7834  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT11 | 0xb | End point 11
7835  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT12 | 0xc | End point 12
7836  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT13 | 0xd | End point 13
7837  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT14 | 0xe | End point 14
7838  * ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT15 | 0xf | End point 15
7839  *
7840  * Field Access Macros:
7841  *
7842  */
7843 /*
7844  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7845  *
7846  * End point 0
7847  */
7848 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT0 0x0
7849 /*
7850  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7851  *
7852  * End point 1
7853  */
7854 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT1 0x1
7855 /*
7856  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7857  *
7858  * End point 2
7859  */
7860 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT2 0x2
7861 /*
7862  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7863  *
7864  * End point 3
7865  */
7866 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT3 0x3
7867 /*
7868  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7869  *
7870  * End point 4
7871  */
7872 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT4 0x4
7873 /*
7874  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7875  *
7876  * End point 5
7877  */
7878 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT5 0x5
7879 /*
7880  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7881  *
7882  * End point 6
7883  */
7884 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT6 0x6
7885 /*
7886  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7887  *
7888  * End point 7
7889  */
7890 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT7 0x7
7891 /*
7892  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7893  *
7894  * End point 8
7895  */
7896 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT8 0x8
7897 /*
7898  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7899  *
7900  * End point 9
7901  */
7902 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT9 0x9
7903 /*
7904  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7905  *
7906  * End point 10
7907  */
7908 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT10 0xa
7909 /*
7910  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7911  *
7912  * End point 11
7913  */
7914 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT11 0xb
7915 /*
7916  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7917  *
7918  * End point 12
7919  */
7920 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT12 0xc
7921 /*
7922  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7923  *
7924  * End point 13
7925  */
7926 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT13 0xd
7927 /*
7928  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7929  *
7930  * End point 14
7931  */
7932 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT14 0xe
7933 /*
7934  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
7935  *
7936  * End point 15
7937  */
7938 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT15 0xf
7939 
7940 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field. */
7941 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_LSB 10
7942 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field. */
7943 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_MSB 13
7944 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field. */
7945 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_WIDTH 4
7946 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field value. */
7947 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_SET_MSK 0x00003c00
7948 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field value. */
7949 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_CLR_MSK 0xffffc3ff
7950 /* The reset value of the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field. */
7951 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_RESET 0xf
7952 /* Extracts the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS field value from a register. */
7953 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_GET(value) (((value) & 0x00003c00) >> 10)
7954 /* Produces a ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field value suitable for setting the register. */
7955 #define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_SET(value) (((value) << 10) & 0x00003c00)
7956 
7957 /*
7958  * Field : Number of Host Channels - numhstchnl
7959  *
7960  * Indicates the number of host channels supported by the core in Host mode.
7961  *
7962  * Field Enumeration Values:
7963  *
7964  * Enum | Value | Description
7965  * :-------------------------------------------|:------|:----------------
7966  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH0 | 0x0 | Host Channel 1
7967  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH1 | 0x1 | Host Channel 2
7968  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH2 | 0x2 | Host Channel 3
7969  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH3 | 0x3 | Host Channel 4
7970  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH4 | 0x4 | Host Channel 5
7971  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH5 | 0x5 | Host Channel 6
7972  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH6 | 0x6 | Host Channel 7
7973  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH7 | 0x7 | Host Channel 8
7974  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH8 | 0x8 | Host Channel 9
7975  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH9 | 0x9 | Host Channel 10
7976  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH10 | 0xa | Host Channel 11
7977  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH11 | 0xb | Host Channel 12
7978  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH12 | 0xc | Host Channel 13
7979  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH13 | 0xd | Host Channel 14
7980  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH14 | 0xe | Host Channel 15
7981  * ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH15 | 0xf | Host Channel 16
7982  *
7983  * Field Access Macros:
7984  *
7985  */
7986 /*
7987  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
7988  *
7989  * Host Channel 1
7990  */
7991 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH0 0x0
7992 /*
7993  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
7994  *
7995  * Host Channel 2
7996  */
7997 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH1 0x1
7998 /*
7999  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8000  *
8001  * Host Channel 3
8002  */
8003 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH2 0x2
8004 /*
8005  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8006  *
8007  * Host Channel 4
8008  */
8009 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH3 0x3
8010 /*
8011  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8012  *
8013  * Host Channel 5
8014  */
8015 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH4 0x4
8016 /*
8017  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8018  *
8019  * Host Channel 6
8020  */
8021 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH5 0x5
8022 /*
8023  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8024  *
8025  * Host Channel 7
8026  */
8027 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH6 0x6
8028 /*
8029  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8030  *
8031  * Host Channel 8
8032  */
8033 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH7 0x7
8034 /*
8035  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8036  *
8037  * Host Channel 9
8038  */
8039 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH8 0x8
8040 /*
8041  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8042  *
8043  * Host Channel 10
8044  */
8045 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH9 0x9
8046 /*
8047  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8048  *
8049  * Host Channel 11
8050  */
8051 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH10 0xa
8052 /*
8053  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8054  *
8055  * Host Channel 12
8056  */
8057 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH11 0xb
8058 /*
8059  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8060  *
8061  * Host Channel 13
8062  */
8063 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH12 0xc
8064 /*
8065  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8066  *
8067  * Host Channel 14
8068  */
8069 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH13 0xd
8070 /*
8071  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8072  *
8073  * Host Channel 15
8074  */
8075 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH14 0xe
8076 /*
8077  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
8078  *
8079  * Host Channel 16
8080  */
8081 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH15 0xf
8082 
8083 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field. */
8084 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_LSB 14
8085 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field. */
8086 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_MSB 17
8087 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field. */
8088 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_WIDTH 4
8089 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field value. */
8090 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_SET_MSK 0x0003c000
8091 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field value. */
8092 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_CLR_MSK 0xfffc3fff
8093 /* The reset value of the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field. */
8094 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_RESET 0xf
8095 /* Extracts the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL field value from a register. */
8096 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_GET(value) (((value) & 0x0003c000) >> 14)
8097 /* Produces a ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field value suitable for setting the register. */
8098 #define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_SET(value) (((value) << 14) & 0x0003c000)
8099 
8100 /*
8101  * Field : Periodic OUT Channels Supported in Host Mode - periosupport
8102  *
8103  * Feature supported.
8104  *
8105  * Field Enumeration Values:
8106  *
8107  * Enum | Value | Description
8108  * :----------------------------------------|:------|:---------------------------------------------
8109  * ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_E_END | 0x1 | Periodic OUT Channels Supported in Host Mode
8110  * : | | Supported
8111  *
8112  * Field Access Macros:
8113  *
8114  */
8115 /*
8116  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT
8117  *
8118  * Periodic OUT Channels Supported in Host Mode Supported
8119  */
8120 #define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_E_END 0x1
8121 
8122 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field. */
8123 #define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_LSB 18
8124 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field. */
8125 #define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_MSB 18
8126 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field. */
8127 #define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_WIDTH 1
8128 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field value. */
8129 #define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_SET_MSK 0x00040000
8130 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field value. */
8131 #define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_CLR_MSK 0xfffbffff
8132 /* The reset value of the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field. */
8133 #define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_RESET 0x1
8134 /* Extracts the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT field value from a register. */
8135 #define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_GET(value) (((value) & 0x00040000) >> 18)
8136 /* Produces a ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field value suitable for setting the register. */
8137 #define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_SET(value) (((value) << 18) & 0x00040000)
8138 
8139 /*
8140  * Field : Dynamic FIFO Sizing Enabled - dynfifosizing
8141  *
8142  * Feature supported.
8143  *
8144  * Field Enumeration Values:
8145  *
8146  * Enum | Value | Description
8147  * :-----------------------------------------|:------|:----------------------------
8148  * ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_E_END | 0x1 | Dynamic FIFO Sizing Enabled
8149  *
8150  * Field Access Macros:
8151  *
8152  */
8153 /*
8154  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING
8155  *
8156  * Dynamic FIFO Sizing Enabled
8157  */
8158 #define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_E_END 0x1
8159 
8160 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field. */
8161 #define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_LSB 19
8162 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field. */
8163 #define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_MSB 19
8164 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field. */
8165 #define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_WIDTH 1
8166 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field value. */
8167 #define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_SET_MSK 0x00080000
8168 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field value. */
8169 #define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_CLR_MSK 0xfff7ffff
8170 /* The reset value of the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field. */
8171 #define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_RESET 0x1
8172 /* Extracts the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING field value from a register. */
8173 #define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_GET(value) (((value) & 0x00080000) >> 19)
8174 /* Produces a ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field value suitable for setting the register. */
8175 #define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_SET(value) (((value) << 19) & 0x00080000)
8176 
8177 /*
8178  * Field : Multi Processor Interrupt Enabled - multiprocintrpt
8179  *
8180  * Not implemented.
8181  *
8182  * Field Enumeration Values:
8183  *
8184  * Enum | Value | Description
8185  * :--------------------------------------------|:------|:-------------------------------------
8186  * ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_E_DISD | 0x0 | No Multi Processor Interrupt Enabled
8187  *
8188  * Field Access Macros:
8189  *
8190  */
8191 /*
8192  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT
8193  *
8194  * No Multi Processor Interrupt Enabled
8195  */
8196 #define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_E_DISD 0x0
8197 
8198 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field. */
8199 #define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_LSB 20
8200 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field. */
8201 #define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_MSB 20
8202 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field. */
8203 #define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_WIDTH 1
8204 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field value. */
8205 #define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_SET_MSK 0x00100000
8206 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field value. */
8207 #define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_CLR_MSK 0xffefffff
8208 /* The reset value of the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field. */
8209 #define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_RESET 0x0
8210 /* Extracts the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT field value from a register. */
8211 #define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_GET(value) (((value) & 0x00100000) >> 20)
8212 /* Produces a ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field value suitable for setting the register. */
8213 #define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_SET(value) (((value) << 20) & 0x00100000)
8214 
8215 /*
8216  * Field : Non Periodic Request Queue Depth - nptxqdepth
8217  *
8218  * Specifies the Non-periodic Request Queue depth, the maximum number of packets
8219  * that can reside in the Non-periodic TxFIFO.
8220  *
8221  * In Device mode, the queue is used only in Shared FIFO Mode (Enable Dedicated
8222  * Transmit FIFO for device IN Endpoints? =No). In this mode, there is one entry in
8223  * the Non-periodic Request Queue for each packet in the Non-periodic TxFIFO.
8224  *
8225  * In Host mode, this queue holds one entry corresponding to each IN or OUT
8226  * nonperiodic request. This queue is seven bits wide.
8227  *
8228  * Field Enumeration Values:
8229  *
8230  * Enum | Value | Description
8231  * :----------------------------------------|:------|:------------
8232  * ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_E_TWO | 0x0 | Que size 2
8233  * ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_E_FOUR | 0x1 | Que size 4
8234  * ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_E_EIGHT | 0x2 | Que size 8
8235  *
8236  * Field Access Macros:
8237  *
8238  */
8239 /*
8240  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH
8241  *
8242  * Que size 2
8243  */
8244 #define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_E_TWO 0x0
8245 /*
8246  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH
8247  *
8248  * Que size 4
8249  */
8250 #define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_E_FOUR 0x1
8251 /*
8252  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH
8253  *
8254  * Que size 8
8255  */
8256 #define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_E_EIGHT 0x2
8257 
8258 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field. */
8259 #define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_LSB 22
8260 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field. */
8261 #define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_MSB 23
8262 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field. */
8263 #define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_WIDTH 2
8264 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field value. */
8265 #define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_SET_MSK 0x00c00000
8266 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field value. */
8267 #define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_CLR_MSK 0xff3fffff
8268 /* The reset value of the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field. */
8269 #define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_RESET 0x2
8270 /* Extracts the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH field value from a register. */
8271 #define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_GET(value) (((value) & 0x00c00000) >> 22)
8272 /* Produces a ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field value suitable for setting the register. */
8273 #define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_SET(value) (((value) << 22) & 0x00c00000)
8274 
8275 /*
8276  * Field : Host Mode Periodic Request Queue Depth - ptxqdepth
8277  *
8278  * Specifies the Host mode Periodic Request Queue depth.That is, the maximum number
8279  * of packets that can reside in the Host Periodic TxFIFO. This queue holds one
8280  * entry corresponding to each IN or OUT periodic request. This queue is 9 bits
8281  * wide.
8282  *
8283  * Field Enumeration Values:
8284  *
8285  * Enum | Value | Description
8286  * :---------------------------------------|:------|:-------------
8287  * ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE2 | 0x0 | Que Depth 2
8288  * ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE4 | 0x1 | Que Depth 4
8289  * ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE8 | 0x2 | Que Depth 8
8290  * ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE16 | 0x3 | Que Depth 16
8291  *
8292  * Field Access Macros:
8293  *
8294  */
8295 /*
8296  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_PTXQDEPTH
8297  *
8298  * Que Depth 2
8299  */
8300 #define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE2 0x0
8301 /*
8302  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_PTXQDEPTH
8303  *
8304  * Que Depth 4
8305  */
8306 #define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE4 0x1
8307 /*
8308  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_PTXQDEPTH
8309  *
8310  * Que Depth 8
8311  */
8312 #define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE8 0x2
8313 /*
8314  * Enumerated value for register field ALT_USB_GLOB_GHWCFG2_PTXQDEPTH
8315  *
8316  * Que Depth 16
8317  */
8318 #define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE16 0x3
8319 
8320 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field. */
8321 #define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_LSB 24
8322 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field. */
8323 #define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_MSB 25
8324 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field. */
8325 #define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_WIDTH 2
8326 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field value. */
8327 #define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_SET_MSK 0x03000000
8328 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field value. */
8329 #define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_CLR_MSK 0xfcffffff
8330 /* The reset value of the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field. */
8331 #define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_RESET 0x0
8332 /* Extracts the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH field value from a register. */
8333 #define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_GET(value) (((value) & 0x03000000) >> 24)
8334 /* Produces a ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field value suitable for setting the register. */
8335 #define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_SET(value) (((value) << 24) & 0x03000000)
8336 
8337 /*
8338  * Field : Device Mode IN Token Sequence Learning Queue Depth - tknqdepth
8339  *
8340  * Range: 0 to 30.
8341  *
8342  * Field Access Macros:
8343  *
8344  */
8345 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field. */
8346 #define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_LSB 26
8347 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field. */
8348 #define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_MSB 30
8349 /* The width in bits of the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field. */
8350 #define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_WIDTH 5
8351 /* The mask used to set the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field value. */
8352 #define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_SET_MSK 0x7c000000
8353 /* The mask used to clear the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field value. */
8354 #define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_CLR_MSK 0x83ffffff
8355 /* The reset value of the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field. */
8356 #define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_RESET 0x8
8357 /* Extracts the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH field value from a register. */
8358 #define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_GET(value) (((value) & 0x7c000000) >> 26)
8359 /* Produces a ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field value suitable for setting the register. */
8360 #define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_SET(value) (((value) << 26) & 0x7c000000)
8361 
8362 #ifndef __ASSEMBLY__
8363 /*
8364  * WARNING: The C register and register group struct declarations are provided for
8365  * convenience and illustrative purposes. They should, however, be used with
8366  * caution as the C language standard provides no guarantees about the alignment or
8367  * atomicity of device memory accesses. The recommended practice for writing
8368  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
8369  * alt_write_word() functions.
8370  *
8371  * The struct declaration for register ALT_USB_GLOB_GHWCFG2.
8372  */
8373 struct ALT_USB_GLOB_GHWCFG2_s
8374 {
8375  const uint32_t otgmode : 3; /* Mode of Operation */
8376  const uint32_t otgarch : 2; /* Architecture */
8377  const uint32_t singpnt : 1; /* Point-to-Point */
8378  const uint32_t hsphytype : 2; /* High Speed PHY Interface Type */
8379  const uint32_t fsphytype : 2; /* Full Speed PHY Interface Type */
8380  const uint32_t numdeveps : 4; /* Number of Device Endpoints */
8381  const uint32_t numhstchnl : 4; /* Number of Host Channels */
8382  const uint32_t periosupport : 1; /* Periodic OUT Channels Supported in Host Mode */
8383  const uint32_t dynfifosizing : 1; /* Dynamic FIFO Sizing Enabled */
8384  const uint32_t multiprocintrpt : 1; /* Multi Processor Interrupt Enabled */
8385  uint32_t : 1; /* *UNDEFINED* */
8386  const uint32_t nptxqdepth : 2; /* Non Periodic Request Queue Depth */
8387  const uint32_t ptxqdepth : 2; /* Host Mode Periodic Request Queue Depth */
8388  const uint32_t tknqdepth : 5; /* Device Mode IN Token Sequence Learning Queue Depth */
8389  uint32_t : 1; /* *UNDEFINED* */
8390 };
8391 
8392 /* The typedef declaration for register ALT_USB_GLOB_GHWCFG2. */
8393 typedef volatile struct ALT_USB_GLOB_GHWCFG2_s ALT_USB_GLOB_GHWCFG2_t;
8394 #endif /* __ASSEMBLY__ */
8395 
8396 /* The byte offset of the ALT_USB_GLOB_GHWCFG2 register from the beginning of the component. */
8397 #define ALT_USB_GLOB_GHWCFG2_OFST 0x48
8398 /* The address of the ALT_USB_GLOB_GHWCFG2 register. */
8399 #define ALT_USB_GLOB_GHWCFG2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GHWCFG2_OFST))
8400 
8401 /*
8402  * Register : User HW Config3 Register - ghwcfg3
8403  *
8404  * This register contains the configuration options.
8405  *
8406  * Register Layout
8407  *
8408  * Bits | Access | Reset | Description
8409  * :--------|:-------|:-------|:---------------------------------------------
8410  * [3:0] | R | 0x8 | Width of Transfer Size Counters
8411  * [6:4] | R | 0x6 | Width of Packet Size Counters
8412  * [7] | R | 0x1 | OTG Function Enabled
8413  * [8] | R | 0x0 | I2C Selection
8414  * [9] | R | 0x1 | Vendor Control Interface Suppor
8415  * [10] | R | 0x0 | Optional Features Removed
8416  * [11] | R | 0x0 | Reset Style for Clocked always Blocks in RTL
8417  * [12] | R | 0x0 | OTG ADP Support
8418  * [13] | R | 0x0 | OTG ENABLE HSIC
8419  * [14] | R | 0x0 | OTG BC SUPPORT
8420  * [15] | R | 0x0 | OTG ENABLE LPM
8421  * [31:16] | R | 0x1f80 | DFIFO Depth
8422  *
8423  */
8424 /*
8425  * Field : Width of Transfer Size Counters - xfersizewidth
8426  *
8427  * Width variable from 11 to 19 bits.
8428  *
8429  * Field Enumeration Values:
8430  *
8431  * Enum | Value | Description
8432  * :---------------------------------------------|:------|:---------------------------------------
8433  * ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH11 | 0x0 | Width of Transfer Size Counter 11 bits
8434  * ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH12 | 0x1 | Width of Transfer Size Counter 12 bits
8435  * ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH13 | 0x2 | Width of Transfer Size Counter 13 bits
8436  * ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH14 | 0x3 | Width of Transfer Size Counter 14 bits
8437  * ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH15 | 0x4 | Width of Transfer Size Counter 15 bits
8438  * ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH16 | 0x5 | Width of Transfer Size Counter 16 bits
8439  * ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH17 | 0x6 | Width of Transfer Size Counter 17 bits
8440  * ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH18 | 0x7 | Width of Transfer Size Counter 18 bits
8441  * ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH19 | 0x8 | Width of Transfer Size Counter 19 bits
8442  *
8443  * Field Access Macros:
8444  *
8445  */
8446 /*
8447  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH
8448  *
8449  * Width of Transfer Size Counter 11 bits
8450  */
8451 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH11 0x0
8452 /*
8453  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH
8454  *
8455  * Width of Transfer Size Counter 12 bits
8456  */
8457 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH12 0x1
8458 /*
8459  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH
8460  *
8461  * Width of Transfer Size Counter 13 bits
8462  */
8463 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH13 0x2
8464 /*
8465  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH
8466  *
8467  * Width of Transfer Size Counter 14 bits
8468  */
8469 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH14 0x3
8470 /*
8471  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH
8472  *
8473  * Width of Transfer Size Counter 15 bits
8474  */
8475 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH15 0x4
8476 /*
8477  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH
8478  *
8479  * Width of Transfer Size Counter 16 bits
8480  */
8481 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH16 0x5
8482 /*
8483  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH
8484  *
8485  * Width of Transfer Size Counter 17 bits
8486  */
8487 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH17 0x6
8488 /*
8489  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH
8490  *
8491  * Width of Transfer Size Counter 18 bits
8492  */
8493 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH18 0x7
8494 /*
8495  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH
8496  *
8497  * Width of Transfer Size Counter 19 bits
8498  */
8499 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_E_WIDTH19 0x8
8500 
8501 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH register field. */
8502 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_LSB 0
8503 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH register field. */
8504 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_MSB 3
8505 /* The width in bits of the ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH register field. */
8506 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_WIDTH 4
8507 /* The mask used to set the ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH register field value. */
8508 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_SET_MSK 0x0000000f
8509 /* The mask used to clear the ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH register field value. */
8510 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_CLR_MSK 0xfffffff0
8511 /* The reset value of the ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH register field. */
8512 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_RESET 0x8
8513 /* Extracts the ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH field value from a register. */
8514 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_GET(value) (((value) & 0x0000000f) >> 0)
8515 /* Produces a ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH register field value suitable for setting the register. */
8516 #define ALT_USB_GLOB_GHWCFG3_XFERSIZEWIDTH_SET(value) (((value) << 0) & 0x0000000f)
8517 
8518 /*
8519  * Field : Width of Packet Size Counters - pktsizewidth
8520  *
8521  * Field Enumeration Values:
8522  *
8523  * Enum | Value | Description
8524  * :-------------------------------------------|:------|:--------------------------------
8525  * ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS4 | 0x0 | Width of Packet Size Counter 4
8526  * ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS5 | 0x1 | Width of Packet Size Counter 5
8527  * ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS6 | 0x2 | Width of Packet Size Counter 6
8528  * ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS7 | 0x3 | Width of Packet Size Counter 7
8529  * ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS8 | 0x4 | Width of Packet Size Counter 8
8530  * ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS9 | 0x5 | Width of Packet Size Counter 9
8531  * ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS10 | 0x6 | Width of Packet Size Counter 10
8532  *
8533  * Field Access Macros:
8534  *
8535  */
8536 /*
8537  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH
8538  *
8539  * Width of Packet Size Counter 4
8540  */
8541 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS4 0x0
8542 /*
8543  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH
8544  *
8545  * Width of Packet Size Counter 5
8546  */
8547 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS5 0x1
8548 /*
8549  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH
8550  *
8551  * Width of Packet Size Counter 6
8552  */
8553 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS6 0x2
8554 /*
8555  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH
8556  *
8557  * Width of Packet Size Counter 7
8558  */
8559 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS7 0x3
8560 /*
8561  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH
8562  *
8563  * Width of Packet Size Counter 8
8564  */
8565 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS8 0x4
8566 /*
8567  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH
8568  *
8569  * Width of Packet Size Counter 9
8570  */
8571 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS9 0x5
8572 /*
8573  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH
8574  *
8575  * Width of Packet Size Counter 10
8576  */
8577 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_E_BITS10 0x6
8578 
8579 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH register field. */
8580 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_LSB 4
8581 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH register field. */
8582 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_MSB 6
8583 /* The width in bits of the ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH register field. */
8584 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_WIDTH 3
8585 /* The mask used to set the ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH register field value. */
8586 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_SET_MSK 0x00000070
8587 /* The mask used to clear the ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH register field value. */
8588 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_CLR_MSK 0xffffff8f
8589 /* The reset value of the ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH register field. */
8590 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_RESET 0x6
8591 /* Extracts the ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH field value from a register. */
8592 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_GET(value) (((value) & 0x00000070) >> 4)
8593 /* Produces a ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH register field value suitable for setting the register. */
8594 #define ALT_USB_GLOB_GHWCFG3_PKTSIZEWIDTH_SET(value) (((value) << 4) & 0x00000070)
8595 
8596 /*
8597  * Field : OTG Function Enabled - otgen
8598  *
8599  * HNP and SRP Capable OTG (Device and Host)
8600  *
8601  * Field Enumeration Values:
8602  *
8603  * Enum | Value | Description
8604  * :---------------------------------|:------|:------------
8605  * ALT_USB_GLOB_GHWCFG3_OTGEN_E_END | 0x1 | OTG Capable
8606  *
8607  * Field Access Macros:
8608  *
8609  */
8610 /*
8611  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_OTGEN
8612  *
8613  * OTG Capable
8614  */
8615 #define ALT_USB_GLOB_GHWCFG3_OTGEN_E_END 0x1
8616 
8617 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG3_OTGEN register field. */
8618 #define ALT_USB_GLOB_GHWCFG3_OTGEN_LSB 7
8619 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG3_OTGEN register field. */
8620 #define ALT_USB_GLOB_GHWCFG3_OTGEN_MSB 7
8621 /* The width in bits of the ALT_USB_GLOB_GHWCFG3_OTGEN register field. */
8622 #define ALT_USB_GLOB_GHWCFG3_OTGEN_WIDTH 1
8623 /* The mask used to set the ALT_USB_GLOB_GHWCFG3_OTGEN register field value. */
8624 #define ALT_USB_GLOB_GHWCFG3_OTGEN_SET_MSK 0x00000080
8625 /* The mask used to clear the ALT_USB_GLOB_GHWCFG3_OTGEN register field value. */
8626 #define ALT_USB_GLOB_GHWCFG3_OTGEN_CLR_MSK 0xffffff7f
8627 /* The reset value of the ALT_USB_GLOB_GHWCFG3_OTGEN register field. */
8628 #define ALT_USB_GLOB_GHWCFG3_OTGEN_RESET 0x1
8629 /* Extracts the ALT_USB_GLOB_GHWCFG3_OTGEN field value from a register. */
8630 #define ALT_USB_GLOB_GHWCFG3_OTGEN_GET(value) (((value) & 0x00000080) >> 7)
8631 /* Produces a ALT_USB_GLOB_GHWCFG3_OTGEN register field value suitable for setting the register. */
8632 #define ALT_USB_GLOB_GHWCFG3_OTGEN_SET(value) (((value) << 7) & 0x00000080)
8633 
8634 /*
8635  * Field : I2C Selection - i2cintsel
8636  *
8637  * I2C Interface not used.
8638  *
8639  * Field Enumeration Values:
8640  *
8641  * Enum | Value | Description
8642  * :--------------------------------------|:------|:--------------
8643  * ALT_USB_GLOB_GHWCFG3_I2CINTSEL_E_DISD | 0x0 | I2C Interface
8644  *
8645  * Field Access Macros:
8646  *
8647  */
8648 /*
8649  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_I2CINTSEL
8650  *
8651  * I2C Interface
8652  */
8653 #define ALT_USB_GLOB_GHWCFG3_I2CINTSEL_E_DISD 0x0
8654 
8655 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG3_I2CINTSEL register field. */
8656 #define ALT_USB_GLOB_GHWCFG3_I2CINTSEL_LSB 8
8657 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG3_I2CINTSEL register field. */
8658 #define ALT_USB_GLOB_GHWCFG3_I2CINTSEL_MSB 8
8659 /* The width in bits of the ALT_USB_GLOB_GHWCFG3_I2CINTSEL register field. */
8660 #define ALT_USB_GLOB_GHWCFG3_I2CINTSEL_WIDTH 1
8661 /* The mask used to set the ALT_USB_GLOB_GHWCFG3_I2CINTSEL register field value. */
8662 #define ALT_USB_GLOB_GHWCFG3_I2CINTSEL_SET_MSK 0x00000100
8663 /* The mask used to clear the ALT_USB_GLOB_GHWCFG3_I2CINTSEL register field value. */
8664 #define ALT_USB_GLOB_GHWCFG3_I2CINTSEL_CLR_MSK 0xfffffeff
8665 /* The reset value of the ALT_USB_GLOB_GHWCFG3_I2CINTSEL register field. */
8666 #define ALT_USB_GLOB_GHWCFG3_I2CINTSEL_RESET 0x0
8667 /* Extracts the ALT_USB_GLOB_GHWCFG3_I2CINTSEL field value from a register. */
8668 #define ALT_USB_GLOB_GHWCFG3_I2CINTSEL_GET(value) (((value) & 0x00000100) >> 8)
8669 /* Produces a ALT_USB_GLOB_GHWCFG3_I2CINTSEL register field value suitable for setting the register. */
8670 #define ALT_USB_GLOB_GHWCFG3_I2CINTSEL_SET(value) (((value) << 8) & 0x00000100)
8671 
8672 /*
8673  * Field : Vendor Control Interface Suppor - vndctlsupt
8674  *
8675  * ULPI PHY internal registers can be accessed by software using register
8676  * reads/writes to otg
8677  *
8678  * Field Enumeration Values:
8679  *
8680  * Enum | Value | Description
8681  * :--------------------------------------|:------|:-------------------------------------------------
8682  * ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT_E_END | 0x1 | Vendor Control Interface is not available on the
8683  *
8684  * Field Access Macros:
8685  *
8686  */
8687 /*
8688  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT
8689  *
8690  * Vendor Control Interface is not available on the
8691  */
8692 #define ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT_E_END 0x1
8693 
8694 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT register field. */
8695 #define ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT_LSB 9
8696 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT register field. */
8697 #define ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT_MSB 9
8698 /* The width in bits of the ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT register field. */
8699 #define ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT_WIDTH 1
8700 /* The mask used to set the ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT register field value. */
8701 #define ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT_SET_MSK 0x00000200
8702 /* The mask used to clear the ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT register field value. */
8703 #define ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT_CLR_MSK 0xfffffdff
8704 /* The reset value of the ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT register field. */
8705 #define ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT_RESET 0x1
8706 /* Extracts the ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT field value from a register. */
8707 #define ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT_GET(value) (((value) & 0x00000200) >> 9)
8708 /* Produces a ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT register field value suitable for setting the register. */
8709 #define ALT_USB_GLOB_GHWCFG3_VNDCTLSUPT_SET(value) (((value) << 9) & 0x00000200)
8710 
8711 /*
8712  * Field : Optional Features Removed - optfeature
8713  *
8714  * User ID register, GPIO interface ports, and SOF toggle and counter ports were
8715  * removed.
8716  *
8717  * Field Enumeration Values:
8718  *
8719  * Enum | Value | Description
8720  * :---------------------------------------|:------|:---------------------
8721  * ALT_USB_GLOB_GHWCFG3_OPTFEATURE_E_DISD | 0x0 | No Optional features
8722  *
8723  * Field Access Macros:
8724  *
8725  */
8726 /*
8727  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_OPTFEATURE
8728  *
8729  * No Optional features
8730  */
8731 #define ALT_USB_GLOB_GHWCFG3_OPTFEATURE_E_DISD 0x0
8732 
8733 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG3_OPTFEATURE register field. */
8734 #define ALT_USB_GLOB_GHWCFG3_OPTFEATURE_LSB 10
8735 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG3_OPTFEATURE register field. */
8736 #define ALT_USB_GLOB_GHWCFG3_OPTFEATURE_MSB 10
8737 /* The width in bits of the ALT_USB_GLOB_GHWCFG3_OPTFEATURE register field. */
8738 #define ALT_USB_GLOB_GHWCFG3_OPTFEATURE_WIDTH 1
8739 /* The mask used to set the ALT_USB_GLOB_GHWCFG3_OPTFEATURE register field value. */
8740 #define ALT_USB_GLOB_GHWCFG3_OPTFEATURE_SET_MSK 0x00000400
8741 /* The mask used to clear the ALT_USB_GLOB_GHWCFG3_OPTFEATURE register field value. */
8742 #define ALT_USB_GLOB_GHWCFG3_OPTFEATURE_CLR_MSK 0xfffffbff
8743 /* The reset value of the ALT_USB_GLOB_GHWCFG3_OPTFEATURE register field. */
8744 #define ALT_USB_GLOB_GHWCFG3_OPTFEATURE_RESET 0x0
8745 /* Extracts the ALT_USB_GLOB_GHWCFG3_OPTFEATURE field value from a register. */
8746 #define ALT_USB_GLOB_GHWCFG3_OPTFEATURE_GET(value) (((value) & 0x00000400) >> 10)
8747 /* Produces a ALT_USB_GLOB_GHWCFG3_OPTFEATURE register field value suitable for setting the register. */
8748 #define ALT_USB_GLOB_GHWCFG3_OPTFEATURE_SET(value) (((value) << 10) & 0x00000400)
8749 
8750 /*
8751  * Field : Reset Style for Clocked always Blocks in RTL - rsttype
8752  *
8753  * Defines what reset type is used in the core.
8754  *
8755  * Field Enumeration Values:
8756  *
8757  * Enum | Value | Description
8758  * :-----------------------------------|:------|:---------------------------------------
8759  * ALT_USB_GLOB_GHWCFG3_RSTTYPE_E_END | 0x0 | Asynchronous reset is used in the core
8760  *
8761  * Field Access Macros:
8762  *
8763  */
8764 /*
8765  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_RSTTYPE
8766  *
8767  * Asynchronous reset is used in the core
8768  */
8769 #define ALT_USB_GLOB_GHWCFG3_RSTTYPE_E_END 0x0
8770 
8771 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG3_RSTTYPE register field. */
8772 #define ALT_USB_GLOB_GHWCFG3_RSTTYPE_LSB 11
8773 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG3_RSTTYPE register field. */
8774 #define ALT_USB_GLOB_GHWCFG3_RSTTYPE_MSB 11
8775 /* The width in bits of the ALT_USB_GLOB_GHWCFG3_RSTTYPE register field. */
8776 #define ALT_USB_GLOB_GHWCFG3_RSTTYPE_WIDTH 1
8777 /* The mask used to set the ALT_USB_GLOB_GHWCFG3_RSTTYPE register field value. */
8778 #define ALT_USB_GLOB_GHWCFG3_RSTTYPE_SET_MSK 0x00000800
8779 /* The mask used to clear the ALT_USB_GLOB_GHWCFG3_RSTTYPE register field value. */
8780 #define ALT_USB_GLOB_GHWCFG3_RSTTYPE_CLR_MSK 0xfffff7ff
8781 /* The reset value of the ALT_USB_GLOB_GHWCFG3_RSTTYPE register field. */
8782 #define ALT_USB_GLOB_GHWCFG3_RSTTYPE_RESET 0x0
8783 /* Extracts the ALT_USB_GLOB_GHWCFG3_RSTTYPE field value from a register. */
8784 #define ALT_USB_GLOB_GHWCFG3_RSTTYPE_GET(value) (((value) & 0x00000800) >> 11)
8785 /* Produces a ALT_USB_GLOB_GHWCFG3_RSTTYPE register field value suitable for setting the register. */
8786 #define ALT_USB_GLOB_GHWCFG3_RSTTYPE_SET(value) (((value) << 11) & 0x00000800)
8787 
8788 /*
8789  * Field : OTG ADP Support - adpsupport
8790  *
8791  * ADP logic support.
8792  *
8793  * Field Enumeration Values:
8794  *
8795  * Enum | Value | Description
8796  * :--------------------------------------|:------|:-------------------------------------------------
8797  * ALT_USB_GLOB_GHWCFG3_ADPSUPPORT_E_END | 0x1 | ADP logic is present along with HSOTG controller
8798  *
8799  * Field Access Macros:
8800  *
8801  */
8802 /*
8803  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_ADPSUPPORT
8804  *
8805  * ADP logic is present along with HSOTG controller
8806  */
8807 #define ALT_USB_GLOB_GHWCFG3_ADPSUPPORT_E_END 0x1
8808 
8809 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG3_ADPSUPPORT register field. */
8810 #define ALT_USB_GLOB_GHWCFG3_ADPSUPPORT_LSB 12
8811 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG3_ADPSUPPORT register field. */
8812 #define ALT_USB_GLOB_GHWCFG3_ADPSUPPORT_MSB 12
8813 /* The width in bits of the ALT_USB_GLOB_GHWCFG3_ADPSUPPORT register field. */
8814 #define ALT_USB_GLOB_GHWCFG3_ADPSUPPORT_WIDTH 1
8815 /* The mask used to set the ALT_USB_GLOB_GHWCFG3_ADPSUPPORT register field value. */
8816 #define ALT_USB_GLOB_GHWCFG3_ADPSUPPORT_SET_MSK 0x00001000
8817 /* The mask used to clear the ALT_USB_GLOB_GHWCFG3_ADPSUPPORT register field value. */
8818 #define ALT_USB_GLOB_GHWCFG3_ADPSUPPORT_CLR_MSK 0xffffefff
8819 /* The reset value of the ALT_USB_GLOB_GHWCFG3_ADPSUPPORT register field. */
8820 #define ALT_USB_GLOB_GHWCFG3_ADPSUPPORT_RESET 0x0
8821 /* Extracts the ALT_USB_GLOB_GHWCFG3_ADPSUPPORT field value from a register. */
8822 #define ALT_USB_GLOB_GHWCFG3_ADPSUPPORT_GET(value) (((value) & 0x00001000) >> 12)
8823 /* Produces a ALT_USB_GLOB_GHWCFG3_ADPSUPPORT register field value suitable for setting the register. */
8824 #define ALT_USB_GLOB_GHWCFG3_ADPSUPPORT_SET(value) (((value) << 12) & 0x00001000)
8825 
8826 /*
8827  * Field : OTG ENABLE HSIC - hsicmode
8828  *
8829  * Supports HSIC and Non-HSIC Modes.
8830  *
8831  * Field Enumeration Values:
8832  *
8833  * Enum | Value | Description
8834  * :------------------------------------|:------|:-----------------
8835  * ALT_USB_GLOB_GHWCFG3_HSICMOD_E_DISD | 0x0 | Non-HSIC-capable
8836  *
8837  * Field Access Macros:
8838  *
8839  */
8840 /*
8841  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_HSICMOD
8842  *
8843  * Non-HSIC-capable
8844  */
8845 #define ALT_USB_GLOB_GHWCFG3_HSICMOD_E_DISD 0x0
8846 
8847 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG3_HSICMOD register field. */
8848 #define ALT_USB_GLOB_GHWCFG3_HSICMOD_LSB 13
8849 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG3_HSICMOD register field. */
8850 #define ALT_USB_GLOB_GHWCFG3_HSICMOD_MSB 13
8851 /* The width in bits of the ALT_USB_GLOB_GHWCFG3_HSICMOD register field. */
8852 #define ALT_USB_GLOB_GHWCFG3_HSICMOD_WIDTH 1
8853 /* The mask used to set the ALT_USB_GLOB_GHWCFG3_HSICMOD register field value. */
8854 #define ALT_USB_GLOB_GHWCFG3_HSICMOD_SET_MSK 0x00002000
8855 /* The mask used to clear the ALT_USB_GLOB_GHWCFG3_HSICMOD register field value. */
8856 #define ALT_USB_GLOB_GHWCFG3_HSICMOD_CLR_MSK 0xffffdfff
8857 /* The reset value of the ALT_USB_GLOB_GHWCFG3_HSICMOD register field. */
8858 #define ALT_USB_GLOB_GHWCFG3_HSICMOD_RESET 0x0
8859 /* Extracts the ALT_USB_GLOB_GHWCFG3_HSICMOD field value from a register. */
8860 #define ALT_USB_GLOB_GHWCFG3_HSICMOD_GET(value) (((value) & 0x00002000) >> 13)
8861 /* Produces a ALT_USB_GLOB_GHWCFG3_HSICMOD register field value suitable for setting the register. */
8862 #define ALT_USB_GLOB_GHWCFG3_HSICMOD_SET(value) (((value) << 13) & 0x00002000)
8863 
8864 /*
8865  * Field : OTG BC SUPPORT - bcsupport
8866  *
8867  * Battery Charger Support.
8868  *
8869  * Field Enumeration Values:
8870  *
8871  * Enum | Value | Description
8872  * :--------------------------------------|:------|:---------------------------
8873  * ALT_USB_GLOB_GHWCFG3_BCSUPPORT_E_DISD | 0x0 | No Battery Charger Support
8874  *
8875  * Field Access Macros:
8876  *
8877  */
8878 /*
8879  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_BCSUPPORT
8880  *
8881  * No Battery Charger Support
8882  */
8883 #define ALT_USB_GLOB_GHWCFG3_BCSUPPORT_E_DISD 0x0
8884 
8885 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG3_BCSUPPORT register field. */
8886 #define ALT_USB_GLOB_GHWCFG3_BCSUPPORT_LSB 14
8887 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG3_BCSUPPORT register field. */
8888 #define ALT_USB_GLOB_GHWCFG3_BCSUPPORT_MSB 14
8889 /* The width in bits of the ALT_USB_GLOB_GHWCFG3_BCSUPPORT register field. */
8890 #define ALT_USB_GLOB_GHWCFG3_BCSUPPORT_WIDTH 1
8891 /* The mask used to set the ALT_USB_GLOB_GHWCFG3_BCSUPPORT register field value. */
8892 #define ALT_USB_GLOB_GHWCFG3_BCSUPPORT_SET_MSK 0x00004000
8893 /* The mask used to clear the ALT_USB_GLOB_GHWCFG3_BCSUPPORT register field value. */
8894 #define ALT_USB_GLOB_GHWCFG3_BCSUPPORT_CLR_MSK 0xffffbfff
8895 /* The reset value of the ALT_USB_GLOB_GHWCFG3_BCSUPPORT register field. */
8896 #define ALT_USB_GLOB_GHWCFG3_BCSUPPORT_RESET 0x0
8897 /* Extracts the ALT_USB_GLOB_GHWCFG3_BCSUPPORT field value from a register. */
8898 #define ALT_USB_GLOB_GHWCFG3_BCSUPPORT_GET(value) (((value) & 0x00004000) >> 14)
8899 /* Produces a ALT_USB_GLOB_GHWCFG3_BCSUPPORT register field value suitable for setting the register. */
8900 #define ALT_USB_GLOB_GHWCFG3_BCSUPPORT_SET(value) (((value) << 14) & 0x00004000)
8901 
8902 /*
8903  * Field : OTG ENABLE LPM - lpmmode
8904  *
8905  * LPM Mode Enabled/Disabled.
8906  *
8907  * Field Enumeration Values:
8908  *
8909  * Enum | Value | Description
8910  * :-----------------------------------|:------|:-------------
8911  * ALT_USB_GLOB_GHWCFG3_LPMMOD_E_DISD | 0x0 | LPM disabled
8912  *
8913  * Field Access Macros:
8914  *
8915  */
8916 /*
8917  * Enumerated value for register field ALT_USB_GLOB_GHWCFG3_LPMMOD
8918  *
8919  * LPM disabled
8920  */
8921 #define ALT_USB_GLOB_GHWCFG3_LPMMOD_E_DISD 0x0
8922 
8923 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG3_LPMMOD register field. */
8924 #define ALT_USB_GLOB_GHWCFG3_LPMMOD_LSB 15
8925 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG3_LPMMOD register field. */
8926 #define ALT_USB_GLOB_GHWCFG3_LPMMOD_MSB 15
8927 /* The width in bits of the ALT_USB_GLOB_GHWCFG3_LPMMOD register field. */
8928 #define ALT_USB_GLOB_GHWCFG3_LPMMOD_WIDTH 1
8929 /* The mask used to set the ALT_USB_GLOB_GHWCFG3_LPMMOD register field value. */
8930 #define ALT_USB_GLOB_GHWCFG3_LPMMOD_SET_MSK 0x00008000
8931 /* The mask used to clear the ALT_USB_GLOB_GHWCFG3_LPMMOD register field value. */
8932 #define ALT_USB_GLOB_GHWCFG3_LPMMOD_CLR_MSK 0xffff7fff
8933 /* The reset value of the ALT_USB_GLOB_GHWCFG3_LPMMOD register field. */
8934 #define ALT_USB_GLOB_GHWCFG3_LPMMOD_RESET 0x0
8935 /* Extracts the ALT_USB_GLOB_GHWCFG3_LPMMOD field value from a register. */
8936 #define ALT_USB_GLOB_GHWCFG3_LPMMOD_GET(value) (((value) & 0x00008000) >> 15)
8937 /* Produces a ALT_USB_GLOB_GHWCFG3_LPMMOD register field value suitable for setting the register. */
8938 #define ALT_USB_GLOB_GHWCFG3_LPMMOD_SET(value) (((value) << 15) & 0x00008000)
8939 
8940 /*
8941  * Field : DFIFO Depth - dfifodepth
8942  *
8943  * DFIFO Depth. This value is in terms of 35-bit words.
8944  *
8945  * Minimum value is 32
8946  *
8947  * Maximum value is 8192
8948  *
8949  * Field Access Macros:
8950  *
8951  */
8952 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG3_DFIFODEPTH register field. */
8953 #define ALT_USB_GLOB_GHWCFG3_DFIFODEPTH_LSB 16
8954 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG3_DFIFODEPTH register field. */
8955 #define ALT_USB_GLOB_GHWCFG3_DFIFODEPTH_MSB 31
8956 /* The width in bits of the ALT_USB_GLOB_GHWCFG3_DFIFODEPTH register field. */
8957 #define ALT_USB_GLOB_GHWCFG3_DFIFODEPTH_WIDTH 16
8958 /* The mask used to set the ALT_USB_GLOB_GHWCFG3_DFIFODEPTH register field value. */
8959 #define ALT_USB_GLOB_GHWCFG3_DFIFODEPTH_SET_MSK 0xffff0000
8960 /* The mask used to clear the ALT_USB_GLOB_GHWCFG3_DFIFODEPTH register field value. */
8961 #define ALT_USB_GLOB_GHWCFG3_DFIFODEPTH_CLR_MSK 0x0000ffff
8962 /* The reset value of the ALT_USB_GLOB_GHWCFG3_DFIFODEPTH register field. */
8963 #define ALT_USB_GLOB_GHWCFG3_DFIFODEPTH_RESET 0x1f80
8964 /* Extracts the ALT_USB_GLOB_GHWCFG3_DFIFODEPTH field value from a register. */
8965 #define ALT_USB_GLOB_GHWCFG3_DFIFODEPTH_GET(value) (((value) & 0xffff0000) >> 16)
8966 /* Produces a ALT_USB_GLOB_GHWCFG3_DFIFODEPTH register field value suitable for setting the register. */
8967 #define ALT_USB_GLOB_GHWCFG3_DFIFODEPTH_SET(value) (((value) << 16) & 0xffff0000)
8968 
8969 #ifndef __ASSEMBLY__
8970 /*
8971  * WARNING: The C register and register group struct declarations are provided for
8972  * convenience and illustrative purposes. They should, however, be used with
8973  * caution as the C language standard provides no guarantees about the alignment or
8974  * atomicity of device memory accesses. The recommended practice for writing
8975  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
8976  * alt_write_word() functions.
8977  *
8978  * The struct declaration for register ALT_USB_GLOB_GHWCFG3.
8979  */
8980 struct ALT_USB_GLOB_GHWCFG3_s
8981 {
8982  const uint32_t xfersizewidth : 4; /* Width of Transfer Size Counters */
8983  const uint32_t pktsizewidth : 3; /* Width of Packet Size Counters */
8984  const uint32_t otgen : 1; /* OTG Function Enabled */
8985  const uint32_t i2cintsel : 1; /* I2C Selection */
8986  const uint32_t vndctlsupt : 1; /* Vendor Control Interface Suppor */
8987  const uint32_t optfeature : 1; /* Optional Features Removed */
8988  const uint32_t rsttype : 1; /* Reset Style for Clocked always Blocks in RTL */
8989  const uint32_t adpsupport : 1; /* OTG ADP Support */
8990  const uint32_t hsicmode : 1; /* OTG ENABLE HSIC */
8991  const uint32_t bcsupport : 1; /* OTG BC SUPPORT */
8992  const uint32_t lpmmode : 1; /* OTG ENABLE LPM */
8993  const uint32_t dfifodepth : 16; /* DFIFO Depth */
8994 };
8995 
8996 /* The typedef declaration for register ALT_USB_GLOB_GHWCFG3. */
8997 typedef volatile struct ALT_USB_GLOB_GHWCFG3_s ALT_USB_GLOB_GHWCFG3_t;
8998 #endif /* __ASSEMBLY__ */
8999 
9000 /* The byte offset of the ALT_USB_GLOB_GHWCFG3 register from the beginning of the component. */
9001 #define ALT_USB_GLOB_GHWCFG3_OFST 0x4c
9002 /* The address of the ALT_USB_GLOB_GHWCFG3 register. */
9003 #define ALT_USB_GLOB_GHWCFG3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GHWCFG3_OFST))
9004 
9005 /*
9006  * Register : User HW Config4 Register - ghwcfg4
9007  *
9008  * This register contains the configuration options.
9009  *
9010  * Register Layout
9011  *
9012  * Bits | Access | Reset | Description
9013  * :--------|:-------|:------|:------------------------------------------------------------------
9014  * [3:0] | R | 0x0 | Number of Device Mode Periodic IN Endpoints
9015  * [4] | R | 0x0 | Enable Partial Power Down
9016  * [5] | R | 0x1 | Minimum AHB Frequency Less Than 60 MHz
9017  * [6] | R | 0x0 | Enable Hibernation
9018  * [13:7] | ??? | 0x0 | *UNDEFINED*
9019  * [15:14] | R | 0x0 | UTMI+ PHY/ULPI-to-Internal UTMI+ Wrapper Data Width
9020  * [19:16] | R | 0xf | Number of Device Mode Control Endpoints in Addition to Endpoint 0
9021  * [20] | R | 0x0 | Iddig Filter Enable
9022  * [21] | R | 0x0 | Vbus Valid Filter Enabled
9023  * [22] | R | 0x0 | a_valid Filter
9024  * [23] | R | 0x0 | b_valid Filter
9025  * [24] | R | 0x0 | Session End Filter
9026  * [25] | R | 0x1 | Enable Dedicated Transmit FIFO for device IN Endpoints
9027  * [29:26] | R | 0xf | Number of Device Mode IN Endpoints Including Control
9028  * [30] | R | 0x1 | Scatter Gather DMA configuration
9029  * [31] | R | 0x1 | Scatter Gather DMA
9030  *
9031  */
9032 /*
9033  * Field : Number of Device Mode Periodic IN Endpoints - numdevperioeps
9034  *
9035  * The maximum number of device IN operations is 16 active at any time including
9036  * endpoint 0, which is always present. This parameter determines the number of
9037  * device mode Tx FIFOs to be instantiated.
9038  *
9039  * Field Access Macros:
9040  *
9041  */
9042 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS register field. */
9043 #define ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS_LSB 0
9044 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS register field. */
9045 #define ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS_MSB 3
9046 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS register field. */
9047 #define ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS_WIDTH 4
9048 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS register field value. */
9049 #define ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS_SET_MSK 0x0000000f
9050 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS register field value. */
9051 #define ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS_CLR_MSK 0xfffffff0
9052 /* The reset value of the ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS register field. */
9053 #define ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS_RESET 0x0
9054 /* Extracts the ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS field value from a register. */
9055 #define ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS_GET(value) (((value) & 0x0000000f) >> 0)
9056 /* Produces a ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS register field value suitable for setting the register. */
9057 #define ALT_USB_GLOB_GHWCFG4_NUMDEVPERIOEPS_SET(value) (((value) << 0) & 0x0000000f)
9058 
9059 /*
9060  * Field : Enable Partial Power Down - partialpwrdn
9061  *
9062  * Specifies whether to enable power optimization.
9063  *
9064  * Field Enumeration Values:
9065  *
9066  * Enum | Value | Description
9067  * :-----------------------------------------|:------|:----------------------------
9068  * ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN_E_DISD | 0x0 | Partial Power Down disabled
9069  *
9070  * Field Access Macros:
9071  *
9072  */
9073 /*
9074  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN
9075  *
9076  * Partial Power Down disabled
9077  */
9078 #define ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN_E_DISD 0x0
9079 
9080 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN register field. */
9081 #define ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN_LSB 4
9082 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN register field. */
9083 #define ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN_MSB 4
9084 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN register field. */
9085 #define ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN_WIDTH 1
9086 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN register field value. */
9087 #define ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN_SET_MSK 0x00000010
9088 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN register field value. */
9089 #define ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN_CLR_MSK 0xffffffef
9090 /* The reset value of the ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN register field. */
9091 #define ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN_RESET 0x0
9092 /* Extracts the ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN field value from a register. */
9093 #define ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN_GET(value) (((value) & 0x00000010) >> 4)
9094 /* Produces a ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN register field value suitable for setting the register. */
9095 #define ALT_USB_GLOB_GHWCFG4_PARTIALPWRDN_SET(value) (((value) << 4) & 0x00000010)
9096 
9097 /*
9098  * Field : Minimum AHB Frequency Less Than 60 MHz - ahbfreq
9099  *
9100  * When the AHB frequency is less than 60 MHz, 4-deep clock-domain crossing sink
9101  * and source buffers are instantiated between the MAC and the Packet FIFO
9102  * Controller (PFC); otherwise, two-deep buffers are sufficient.
9103  *
9104  * Field Enumeration Values:
9105  *
9106  * Enum | Value | Description
9107  * :-----------------------------------|:------|:--------------------------------------
9108  * ALT_USB_GLOB_GHWCFG4_AHBFREQ_E_END | 0x1 | Minimum AHB Frequency Less Than 60 MH
9109  *
9110  * Field Access Macros:
9111  *
9112  */
9113 /*
9114  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_AHBFREQ
9115  *
9116  * Minimum AHB Frequency Less Than 60 MH
9117  */
9118 #define ALT_USB_GLOB_GHWCFG4_AHBFREQ_E_END 0x1
9119 
9120 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_AHBFREQ register field. */
9121 #define ALT_USB_GLOB_GHWCFG4_AHBFREQ_LSB 5
9122 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_AHBFREQ register field. */
9123 #define ALT_USB_GLOB_GHWCFG4_AHBFREQ_MSB 5
9124 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_AHBFREQ register field. */
9125 #define ALT_USB_GLOB_GHWCFG4_AHBFREQ_WIDTH 1
9126 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_AHBFREQ register field value. */
9127 #define ALT_USB_GLOB_GHWCFG4_AHBFREQ_SET_MSK 0x00000020
9128 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_AHBFREQ register field value. */
9129 #define ALT_USB_GLOB_GHWCFG4_AHBFREQ_CLR_MSK 0xffffffdf
9130 /* The reset value of the ALT_USB_GLOB_GHWCFG4_AHBFREQ register field. */
9131 #define ALT_USB_GLOB_GHWCFG4_AHBFREQ_RESET 0x1
9132 /* Extracts the ALT_USB_GLOB_GHWCFG4_AHBFREQ field value from a register. */
9133 #define ALT_USB_GLOB_GHWCFG4_AHBFREQ_GET(value) (((value) & 0x00000020) >> 5)
9134 /* Produces a ALT_USB_GLOB_GHWCFG4_AHBFREQ register field value suitable for setting the register. */
9135 #define ALT_USB_GLOB_GHWCFG4_AHBFREQ_SET(value) (((value) << 5) & 0x00000020)
9136 
9137 /*
9138  * Field : Enable Hibernation - hibernation
9139  *
9140  * Enables power saving mode hibernation.
9141  *
9142  * Field Enumeration Values:
9143  *
9144  * Enum | Value | Description
9145  * :----------------------------------------|:------|:-----------------------------
9146  * ALT_USB_GLOB_GHWCFG4_HIBERNATION_E_DISD | 0x0 | Hibernation feature disabled
9147  *
9148  * Field Access Macros:
9149  *
9150  */
9151 /*
9152  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_HIBERNATION
9153  *
9154  * Hibernation feature disabled
9155  */
9156 #define ALT_USB_GLOB_GHWCFG4_HIBERNATION_E_DISD 0x0
9157 
9158 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_HIBERNATION register field. */
9159 #define ALT_USB_GLOB_GHWCFG4_HIBERNATION_LSB 6
9160 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_HIBERNATION register field. */
9161 #define ALT_USB_GLOB_GHWCFG4_HIBERNATION_MSB 6
9162 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_HIBERNATION register field. */
9163 #define ALT_USB_GLOB_GHWCFG4_HIBERNATION_WIDTH 1
9164 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_HIBERNATION register field value. */
9165 #define ALT_USB_GLOB_GHWCFG4_HIBERNATION_SET_MSK 0x00000040
9166 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_HIBERNATION register field value. */
9167 #define ALT_USB_GLOB_GHWCFG4_HIBERNATION_CLR_MSK 0xffffffbf
9168 /* The reset value of the ALT_USB_GLOB_GHWCFG4_HIBERNATION register field. */
9169 #define ALT_USB_GLOB_GHWCFG4_HIBERNATION_RESET 0x0
9170 /* Extracts the ALT_USB_GLOB_GHWCFG4_HIBERNATION field value from a register. */
9171 #define ALT_USB_GLOB_GHWCFG4_HIBERNATION_GET(value) (((value) & 0x00000040) >> 6)
9172 /* Produces a ALT_USB_GLOB_GHWCFG4_HIBERNATION register field value suitable for setting the register. */
9173 #define ALT_USB_GLOB_GHWCFG4_HIBERNATION_SET(value) (((value) << 6) & 0x00000040)
9174 
9175 /*
9176  * Field : UTMI+ PHY/ULPI-to-Internal UTMI+ Wrapper Data Width - phydatawidth
9177  *
9178  * Uses a ULPI interface only. Hence only 8-bit setting is relevant. This setting
9179  * should not matter since UTMI is not enabled.
9180  *
9181  * Field Access Macros:
9182  *
9183  */
9184 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH register field. */
9185 #define ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH_LSB 14
9186 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH register field. */
9187 #define ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH_MSB 15
9188 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH register field. */
9189 #define ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH_WIDTH 2
9190 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH register field value. */
9191 #define ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH_SET_MSK 0x0000c000
9192 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH register field value. */
9193 #define ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH_CLR_MSK 0xffff3fff
9194 /* The reset value of the ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH register field. */
9195 #define ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH_RESET 0x0
9196 /* Extracts the ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH field value from a register. */
9197 #define ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH_GET(value) (((value) & 0x0000c000) >> 14)
9198 /* Produces a ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH register field value suitable for setting the register. */
9199 #define ALT_USB_GLOB_GHWCFG4_PHYDATAWIDTH_SET(value) (((value) << 14) & 0x0000c000)
9200 
9201 /*
9202  * Field : Number of Device Mode Control Endpoints in Addition to Endpoint 0 - numctleps
9203  *
9204  * Specifies the number of Device mode control endpoints in addition to control
9205  * endpoint 0, which is always present. Range: 0-15.
9206  *
9207  * Field Enumeration Values:
9208  *
9209  * Enum | Value | Description
9210  * :-----------------------------------------|:------|:--------------
9211  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT0 | 0x0 | End point 0
9212  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT1 | 0x1 | End point 1
9213  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT2 | 0x2 | End point 2
9214  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT3 | 0x3 | End point 3
9215  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT4 | 0x4 | End point 4
9216  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT5 | 0x5 | End point 5
9217  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT6 | 0x6 | End point 6
9218  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT7 | 0x7 | End point 7
9219  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT8 | 0x8 | End point 8
9220  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT9 | 0x9 | End point 9
9221  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT10 | 0xa | End point 10
9222  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT11 | 0xb | End point 11
9223  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT12 | 0xc | End point 12
9224  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT13 | 0xd | End point 13
9225  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT14 | 0xe | End point 14
9226  * ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT15 | 0xf | End point 15
9227  *
9228  * Field Access Macros:
9229  *
9230  */
9231 /*
9232  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9233  *
9234  * End point 0
9235  */
9236 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT0 0x0
9237 /*
9238  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9239  *
9240  * End point 1
9241  */
9242 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT1 0x1
9243 /*
9244  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9245  *
9246  * End point 2
9247  */
9248 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT2 0x2
9249 /*
9250  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9251  *
9252  * End point 3
9253  */
9254 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT3 0x3
9255 /*
9256  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9257  *
9258  * End point 4
9259  */
9260 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT4 0x4
9261 /*
9262  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9263  *
9264  * End point 5
9265  */
9266 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT5 0x5
9267 /*
9268  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9269  *
9270  * End point 6
9271  */
9272 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT6 0x6
9273 /*
9274  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9275  *
9276  * End point 7
9277  */
9278 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT7 0x7
9279 /*
9280  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9281  *
9282  * End point 8
9283  */
9284 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT8 0x8
9285 /*
9286  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9287  *
9288  * End point 9
9289  */
9290 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT9 0x9
9291 /*
9292  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9293  *
9294  * End point 10
9295  */
9296 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT10 0xa
9297 /*
9298  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9299  *
9300  * End point 11
9301  */
9302 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT11 0xb
9303 /*
9304  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9305  *
9306  * End point 12
9307  */
9308 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT12 0xc
9309 /*
9310  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9311  *
9312  * End point 13
9313  */
9314 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT13 0xd
9315 /*
9316  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9317  *
9318  * End point 14
9319  */
9320 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT14 0xe
9321 /*
9322  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_NUMCTLEPS
9323  *
9324  * End point 15
9325  */
9326 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_E_ENDPT15 0xf
9327 
9328 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_NUMCTLEPS register field. */
9329 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_LSB 16
9330 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_NUMCTLEPS register field. */
9331 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_MSB 19
9332 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_NUMCTLEPS register field. */
9333 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_WIDTH 4
9334 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_NUMCTLEPS register field value. */
9335 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_SET_MSK 0x000f0000
9336 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_NUMCTLEPS register field value. */
9337 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_CLR_MSK 0xfff0ffff
9338 /* The reset value of the ALT_USB_GLOB_GHWCFG4_NUMCTLEPS register field. */
9339 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_RESET 0xf
9340 /* Extracts the ALT_USB_GLOB_GHWCFG4_NUMCTLEPS field value from a register. */
9341 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_GET(value) (((value) & 0x000f0000) >> 16)
9342 /* Produces a ALT_USB_GLOB_GHWCFG4_NUMCTLEPS register field value suitable for setting the register. */
9343 #define ALT_USB_GLOB_GHWCFG4_NUMCTLEPS_SET(value) (((value) << 16) & 0x000f0000)
9344 
9345 /*
9346  * Field : Iddig Filter Enable - iddgfltr
9347  *
9348  * Specifies whether to add a filter on the iddig input from the PHY. This is not
9349  * relevant since we only support ULPI and there is no iddig pin exposed to I/O
9350  * pads.
9351  *
9352  * Field Enumeration Values:
9353  *
9354  * Enum | Value | Description
9355  * :-------------------------------------|:------|:----------------------
9356  * ALT_USB_GLOB_GHWCFG4_IDDGFLTR_E_DISD | 0x0 | Iddig Filter Disabled
9357  *
9358  * Field Access Macros:
9359  *
9360  */
9361 /*
9362  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_IDDGFLTR
9363  *
9364  * Iddig Filter Disabled
9365  */
9366 #define ALT_USB_GLOB_GHWCFG4_IDDGFLTR_E_DISD 0x0
9367 
9368 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_IDDGFLTR register field. */
9369 #define ALT_USB_GLOB_GHWCFG4_IDDGFLTR_LSB 20
9370 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_IDDGFLTR register field. */
9371 #define ALT_USB_GLOB_GHWCFG4_IDDGFLTR_MSB 20
9372 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_IDDGFLTR register field. */
9373 #define ALT_USB_GLOB_GHWCFG4_IDDGFLTR_WIDTH 1
9374 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_IDDGFLTR register field value. */
9375 #define ALT_USB_GLOB_GHWCFG4_IDDGFLTR_SET_MSK 0x00100000
9376 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_IDDGFLTR register field value. */
9377 #define ALT_USB_GLOB_GHWCFG4_IDDGFLTR_CLR_MSK 0xffefffff
9378 /* The reset value of the ALT_USB_GLOB_GHWCFG4_IDDGFLTR register field. */
9379 #define ALT_USB_GLOB_GHWCFG4_IDDGFLTR_RESET 0x0
9380 /* Extracts the ALT_USB_GLOB_GHWCFG4_IDDGFLTR field value from a register. */
9381 #define ALT_USB_GLOB_GHWCFG4_IDDGFLTR_GET(value) (((value) & 0x00100000) >> 20)
9382 /* Produces a ALT_USB_GLOB_GHWCFG4_IDDGFLTR register field value suitable for setting the register. */
9383 #define ALT_USB_GLOB_GHWCFG4_IDDGFLTR_SET(value) (((value) << 20) & 0x00100000)
9384 
9385 /*
9386  * Field : Vbus Valid Filter Enabled - vbusvalidfltr
9387  *
9388  * Vbus Valid Filter Enabled (VBusValidFltr) 0: No filter 1: Filter(coreConsultant
9389  * parameter: OTG_EN_VBUSVALID_FILTER)
9390  *
9391  * Field Enumeration Values:
9392  *
9393  * Enum | Value | Description
9394  * :------------------------------------------|:------|:---------------------------
9395  * ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR_E_DISD | 0x0 | Vbus Valid Filter Disabled
9396  *
9397  * Field Access Macros:
9398  *
9399  */
9400 /*
9401  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR
9402  *
9403  * Vbus Valid Filter Disabled
9404  */
9405 #define ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR_E_DISD 0x0
9406 
9407 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR register field. */
9408 #define ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR_LSB 21
9409 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR register field. */
9410 #define ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR_MSB 21
9411 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR register field. */
9412 #define ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR_WIDTH 1
9413 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR register field value. */
9414 #define ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR_SET_MSK 0x00200000
9415 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR register field value. */
9416 #define ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR_CLR_MSK 0xffdfffff
9417 /* The reset value of the ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR register field. */
9418 #define ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR_RESET 0x0
9419 /* Extracts the ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR field value from a register. */
9420 #define ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR_GET(value) (((value) & 0x00200000) >> 21)
9421 /* Produces a ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR register field value suitable for setting the register. */
9422 #define ALT_USB_GLOB_GHWCFG4_VBUSVALIDFLTR_SET(value) (((value) << 21) & 0x00200000)
9423 
9424 /*
9425  * Field : a_valid Filter - avalidfltr
9426  *
9427  * Specifies whether to add a filter on the b_valid input from the PHY.
9428  *
9429  * Field Enumeration Values:
9430  *
9431  * Enum | Value | Description
9432  * :---------------------------------------|:------|:------------
9433  * ALT_USB_GLOB_GHWCFG4_AVALIDFLTR_E_DISD | 0x0 | No filter
9434  *
9435  * Field Access Macros:
9436  *
9437  */
9438 /*
9439  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_AVALIDFLTR
9440  *
9441  * No filter
9442  */
9443 #define ALT_USB_GLOB_GHWCFG4_AVALIDFLTR_E_DISD 0x0
9444 
9445 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_AVALIDFLTR register field. */
9446 #define ALT_USB_GLOB_GHWCFG4_AVALIDFLTR_LSB 22
9447 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_AVALIDFLTR register field. */
9448 #define ALT_USB_GLOB_GHWCFG4_AVALIDFLTR_MSB 22
9449 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_AVALIDFLTR register field. */
9450 #define ALT_USB_GLOB_GHWCFG4_AVALIDFLTR_WIDTH 1
9451 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_AVALIDFLTR register field value. */
9452 #define ALT_USB_GLOB_GHWCFG4_AVALIDFLTR_SET_MSK 0x00400000
9453 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_AVALIDFLTR register field value. */
9454 #define ALT_USB_GLOB_GHWCFG4_AVALIDFLTR_CLR_MSK 0xffbfffff
9455 /* The reset value of the ALT_USB_GLOB_GHWCFG4_AVALIDFLTR register field. */
9456 #define ALT_USB_GLOB_GHWCFG4_AVALIDFLTR_RESET 0x0
9457 /* Extracts the ALT_USB_GLOB_GHWCFG4_AVALIDFLTR field value from a register. */
9458 #define ALT_USB_GLOB_GHWCFG4_AVALIDFLTR_GET(value) (((value) & 0x00400000) >> 22)
9459 /* Produces a ALT_USB_GLOB_GHWCFG4_AVALIDFLTR register field value suitable for setting the register. */
9460 #define ALT_USB_GLOB_GHWCFG4_AVALIDFLTR_SET(value) (((value) << 22) & 0x00400000)
9461 
9462 /*
9463  * Field : b_valid Filter - bvalidfltr
9464  *
9465  * Specifies whether to add a filter on the b_valid input from the PHY.
9466  *
9467  * Field Enumeration Values:
9468  *
9469  * Enum | Value | Description
9470  * :---------------------------------------|:------|:------------
9471  * ALT_USB_GLOB_GHWCFG4_BVALIDFLTR_E_DISD | 0x0 | No Filter
9472  *
9473  * Field Access Macros:
9474  *
9475  */
9476 /*
9477  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_BVALIDFLTR
9478  *
9479  * No Filter
9480  */
9481 #define ALT_USB_GLOB_GHWCFG4_BVALIDFLTR_E_DISD 0x0
9482 
9483 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_BVALIDFLTR register field. */
9484 #define ALT_USB_GLOB_GHWCFG4_BVALIDFLTR_LSB 23
9485 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_BVALIDFLTR register field. */
9486 #define ALT_USB_GLOB_GHWCFG4_BVALIDFLTR_MSB 23
9487 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_BVALIDFLTR register field. */
9488 #define ALT_USB_GLOB_GHWCFG4_BVALIDFLTR_WIDTH 1
9489 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_BVALIDFLTR register field value. */
9490 #define ALT_USB_GLOB_GHWCFG4_BVALIDFLTR_SET_MSK 0x00800000
9491 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_BVALIDFLTR register field value. */
9492 #define ALT_USB_GLOB_GHWCFG4_BVALIDFLTR_CLR_MSK 0xff7fffff
9493 /* The reset value of the ALT_USB_GLOB_GHWCFG4_BVALIDFLTR register field. */
9494 #define ALT_USB_GLOB_GHWCFG4_BVALIDFLTR_RESET 0x0
9495 /* Extracts the ALT_USB_GLOB_GHWCFG4_BVALIDFLTR field value from a register. */
9496 #define ALT_USB_GLOB_GHWCFG4_BVALIDFLTR_GET(value) (((value) & 0x00800000) >> 23)
9497 /* Produces a ALT_USB_GLOB_GHWCFG4_BVALIDFLTR register field value suitable for setting the register. */
9498 #define ALT_USB_GLOB_GHWCFG4_BVALIDFLTR_SET(value) (((value) << 23) & 0x00800000)
9499 
9500 /*
9501  * Field : Session End Filter - sessendfltr
9502  *
9503  * Specifies whether to add a filter on the session_end input from the PHY.
9504  *
9505  * Field Enumeration Values:
9506  *
9507  * Enum | Value | Description
9508  * :----------------------------------------|:------|:------------
9509  * ALT_USB_GLOB_GHWCFG4_SESSENDFLTR_E_DISD | 0x0 | No filter
9510  *
9511  * Field Access Macros:
9512  *
9513  */
9514 /*
9515  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_SESSENDFLTR
9516  *
9517  * No filter
9518  */
9519 #define ALT_USB_GLOB_GHWCFG4_SESSENDFLTR_E_DISD 0x0
9520 
9521 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_SESSENDFLTR register field. */
9522 #define ALT_USB_GLOB_GHWCFG4_SESSENDFLTR_LSB 24
9523 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_SESSENDFLTR register field. */
9524 #define ALT_USB_GLOB_GHWCFG4_SESSENDFLTR_MSB 24
9525 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_SESSENDFLTR register field. */
9526 #define ALT_USB_GLOB_GHWCFG4_SESSENDFLTR_WIDTH 1
9527 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_SESSENDFLTR register field value. */
9528 #define ALT_USB_GLOB_GHWCFG4_SESSENDFLTR_SET_MSK 0x01000000
9529 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_SESSENDFLTR register field value. */
9530 #define ALT_USB_GLOB_GHWCFG4_SESSENDFLTR_CLR_MSK 0xfeffffff
9531 /* The reset value of the ALT_USB_GLOB_GHWCFG4_SESSENDFLTR register field. */
9532 #define ALT_USB_GLOB_GHWCFG4_SESSENDFLTR_RESET 0x0
9533 /* Extracts the ALT_USB_GLOB_GHWCFG4_SESSENDFLTR field value from a register. */
9534 #define ALT_USB_GLOB_GHWCFG4_SESSENDFLTR_GET(value) (((value) & 0x01000000) >> 24)
9535 /* Produces a ALT_USB_GLOB_GHWCFG4_SESSENDFLTR register field value suitable for setting the register. */
9536 #define ALT_USB_GLOB_GHWCFG4_SESSENDFLTR_SET(value) (((value) << 24) & 0x01000000)
9537 
9538 /*
9539  * Field : Enable Dedicated Transmit FIFO for device IN Endpoints - dedfifomode
9540  *
9541  * Specifies whether Dedicated Transmit FIFOs should be enabled in device mode.
9542  *
9543  * Field Enumeration Values:
9544  *
9545  * Enum | Value | Description
9546  * :--------------------------------------|:------|:------------------------------------------
9547  * ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD_E_END | 0x1 | Dedicated Transmit FIFO Operation enabled
9548  *
9549  * Field Access Macros:
9550  *
9551  */
9552 /*
9553  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD
9554  *
9555  * Dedicated Transmit FIFO Operation enabled
9556  */
9557 #define ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD_E_END 0x1
9558 
9559 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD register field. */
9560 #define ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD_LSB 25
9561 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD register field. */
9562 #define ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD_MSB 25
9563 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD register field. */
9564 #define ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD_WIDTH 1
9565 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD register field value. */
9566 #define ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD_SET_MSK 0x02000000
9567 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD register field value. */
9568 #define ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD_CLR_MSK 0xfdffffff
9569 /* The reset value of the ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD register field. */
9570 #define ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD_RESET 0x1
9571 /* Extracts the ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD field value from a register. */
9572 #define ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD_GET(value) (((value) & 0x02000000) >> 25)
9573 /* Produces a ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD register field value suitable for setting the register. */
9574 #define ALT_USB_GLOB_GHWCFG4_DEDFIFOMOD_SET(value) (((value) << 25) & 0x02000000)
9575 
9576 /*
9577  * Field : Number of Device Mode IN Endpoints Including Control - ineps
9578  *
9579  * Number of Device Mode IN Endpoints Including Control.
9580  *
9581  * Field Enumeration Values:
9582  *
9583  * Enum | Value | Description
9584  * :-------------------------------------|:------|:---------------
9585  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT1 | 0x0 | In Endpoint 1
9586  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT2 | 0x1 | In Endpoint 2
9587  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT3 | 0x2 | In Endpoint 3
9588  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT4 | 0x3 | In Endpoint 4
9589  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT5 | 0x4 | In Endpoint 5
9590  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT6 | 0x5 | In Endpoint 6
9591  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT7 | 0x6 | In Endpoint 7
9592  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT8 | 0x7 | In Endpoint 8
9593  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT9 | 0x8 | In Endpoint 9
9594  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT10 | 0x9 | In Endpoint 10
9595  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT11 | 0xa | In Endpoint 11
9596  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT12 | 0xb | In Endpoint 12
9597  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT13 | 0xc | In Endpoint 13
9598  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT14 | 0xd | In Endpoint 14
9599  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT15 | 0xe | In Endpoint 15
9600  * ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT16 | 0xf | In Endpoint 16
9601  *
9602  * Field Access Macros:
9603  *
9604  */
9605 /*
9606  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9607  *
9608  * In Endpoint 1
9609  */
9610 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT1 0x0
9611 /*
9612  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9613  *
9614  * In Endpoint 2
9615  */
9616 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT2 0x1
9617 /*
9618  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9619  *
9620  * In Endpoint 3
9621  */
9622 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT3 0x2
9623 /*
9624  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9625  *
9626  * In Endpoint 4
9627  */
9628 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT4 0x3
9629 /*
9630  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9631  *
9632  * In Endpoint 5
9633  */
9634 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT5 0x4
9635 /*
9636  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9637  *
9638  * In Endpoint 6
9639  */
9640 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT6 0x5
9641 /*
9642  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9643  *
9644  * In Endpoint 7
9645  */
9646 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT7 0x6
9647 /*
9648  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9649  *
9650  * In Endpoint 8
9651  */
9652 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT8 0x7
9653 /*
9654  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9655  *
9656  * In Endpoint 9
9657  */
9658 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT9 0x8
9659 /*
9660  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9661  *
9662  * In Endpoint 10
9663  */
9664 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT10 0x9
9665 /*
9666  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9667  *
9668  * In Endpoint 11
9669  */
9670 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT11 0xa
9671 /*
9672  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9673  *
9674  * In Endpoint 12
9675  */
9676 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT12 0xb
9677 /*
9678  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9679  *
9680  * In Endpoint 13
9681  */
9682 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT13 0xc
9683 /*
9684  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9685  *
9686  * In Endpoint 14
9687  */
9688 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT14 0xd
9689 /*
9690  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9691  *
9692  * In Endpoint 15
9693  */
9694 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT15 0xe
9695 /*
9696  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_INEPS
9697  *
9698  * In Endpoint 16
9699  */
9700 #define ALT_USB_GLOB_GHWCFG4_INEPS_E_ENDPT16 0xf
9701 
9702 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_INEPS register field. */
9703 #define ALT_USB_GLOB_GHWCFG4_INEPS_LSB 26
9704 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_INEPS register field. */
9705 #define ALT_USB_GLOB_GHWCFG4_INEPS_MSB 29
9706 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_INEPS register field. */
9707 #define ALT_USB_GLOB_GHWCFG4_INEPS_WIDTH 4
9708 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_INEPS register field value. */
9709 #define ALT_USB_GLOB_GHWCFG4_INEPS_SET_MSK 0x3c000000
9710 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_INEPS register field value. */
9711 #define ALT_USB_GLOB_GHWCFG4_INEPS_CLR_MSK 0xc3ffffff
9712 /* The reset value of the ALT_USB_GLOB_GHWCFG4_INEPS register field. */
9713 #define ALT_USB_GLOB_GHWCFG4_INEPS_RESET 0xf
9714 /* Extracts the ALT_USB_GLOB_GHWCFG4_INEPS field value from a register. */
9715 #define ALT_USB_GLOB_GHWCFG4_INEPS_GET(value) (((value) & 0x3c000000) >> 26)
9716 /* Produces a ALT_USB_GLOB_GHWCFG4_INEPS register field value suitable for setting the register. */
9717 #define ALT_USB_GLOB_GHWCFG4_INEPS_SET(value) (((value) << 26) & 0x3c000000)
9718 
9719 /*
9720  * Field : Scatter Gather DMA configuration - dma_configuration
9721  *
9722  * Selects bewteen scatter and nonscatter configuration
9723  *
9724  * Field Enumeration Values:
9725  *
9726  * Enum | Value | Description
9727  * :------------------------------------------|:------|:-------------------------------------
9728  * ALT_USB_GLOB_GHWCFG4_DMA_CFG_E_NONSCATTER | 0x0 | Non-Scatter/Gather DMA configuration
9729  * ALT_USB_GLOB_GHWCFG4_DMA_CFG_E_SCATTER | 0x1 | Scatter/Gather DMA configuration
9730  *
9731  * Field Access Macros:
9732  *
9733  */
9734 /*
9735  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_DMA_CFG
9736  *
9737  * Non-Scatter/Gather DMA configuration
9738  */
9739 #define ALT_USB_GLOB_GHWCFG4_DMA_CFG_E_NONSCATTER 0x0
9740 /*
9741  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_DMA_CFG
9742  *
9743  * Scatter/Gather DMA configuration
9744  */
9745 #define ALT_USB_GLOB_GHWCFG4_DMA_CFG_E_SCATTER 0x1
9746 
9747 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_DMA_CFG register field. */
9748 #define ALT_USB_GLOB_GHWCFG4_DMA_CFG_LSB 30
9749 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_DMA_CFG register field. */
9750 #define ALT_USB_GLOB_GHWCFG4_DMA_CFG_MSB 30
9751 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_DMA_CFG register field. */
9752 #define ALT_USB_GLOB_GHWCFG4_DMA_CFG_WIDTH 1
9753 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_DMA_CFG register field value. */
9754 #define ALT_USB_GLOB_GHWCFG4_DMA_CFG_SET_MSK 0x40000000
9755 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_DMA_CFG register field value. */
9756 #define ALT_USB_GLOB_GHWCFG4_DMA_CFG_CLR_MSK 0xbfffffff
9757 /* The reset value of the ALT_USB_GLOB_GHWCFG4_DMA_CFG register field. */
9758 #define ALT_USB_GLOB_GHWCFG4_DMA_CFG_RESET 0x1
9759 /* Extracts the ALT_USB_GLOB_GHWCFG4_DMA_CFG field value from a register. */
9760 #define ALT_USB_GLOB_GHWCFG4_DMA_CFG_GET(value) (((value) & 0x40000000) >> 30)
9761 /* Produces a ALT_USB_GLOB_GHWCFG4_DMA_CFG register field value suitable for setting the register. */
9762 #define ALT_USB_GLOB_GHWCFG4_DMA_CFG_SET(value) (((value) << 30) & 0x40000000)
9763 
9764 /*
9765  * Field : Scatter Gather DMA - dma
9766  *
9767  * Enable descriptor based scatter/gather DMA. When enabled, DMA operations will
9768  * be serviced with descriptor based scatter/gather DMA
9769  *
9770  * Field Enumeration Values:
9771  *
9772  * Enum | Value | Description
9773  * :-------------------------------|:------|:----------------------
9774  * ALT_USB_GLOB_GHWCFG4_DMA_E_END | 0x1 | Dynamic configuration
9775  *
9776  * Field Access Macros:
9777  *
9778  */
9779 /*
9780  * Enumerated value for register field ALT_USB_GLOB_GHWCFG4_DMA
9781  *
9782  * Dynamic configuration
9783  */
9784 #define ALT_USB_GLOB_GHWCFG4_DMA_E_END 0x1
9785 
9786 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG4_DMA register field. */
9787 #define ALT_USB_GLOB_GHWCFG4_DMA_LSB 31
9788 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG4_DMA register field. */
9789 #define ALT_USB_GLOB_GHWCFG4_DMA_MSB 31
9790 /* The width in bits of the ALT_USB_GLOB_GHWCFG4_DMA register field. */
9791 #define ALT_USB_GLOB_GHWCFG4_DMA_WIDTH 1
9792 /* The mask used to set the ALT_USB_GLOB_GHWCFG4_DMA register field value. */
9793 #define ALT_USB_GLOB_GHWCFG4_DMA_SET_MSK 0x80000000
9794 /* The mask used to clear the ALT_USB_GLOB_GHWCFG4_DMA register field value. */
9795 #define ALT_USB_GLOB_GHWCFG4_DMA_CLR_MSK 0x7fffffff
9796 /* The reset value of the ALT_USB_GLOB_GHWCFG4_DMA register field. */
9797 #define ALT_USB_GLOB_GHWCFG4_DMA_RESET 0x1
9798 /* Extracts the ALT_USB_GLOB_GHWCFG4_DMA field value from a register. */
9799 #define ALT_USB_GLOB_GHWCFG4_DMA_GET(value) (((value) & 0x80000000) >> 31)
9800 /* Produces a ALT_USB_GLOB_GHWCFG4_DMA register field value suitable for setting the register. */
9801 #define ALT_USB_GLOB_GHWCFG4_DMA_SET(value) (((value) << 31) & 0x80000000)
9802 
9803 #ifndef __ASSEMBLY__
9804 /*
9805  * WARNING: The C register and register group struct declarations are provided for
9806  * convenience and illustrative purposes. They should, however, be used with
9807  * caution as the C language standard provides no guarantees about the alignment or
9808  * atomicity of device memory accesses. The recommended practice for writing
9809  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
9810  * alt_write_word() functions.
9811  *
9812  * The struct declaration for register ALT_USB_GLOB_GHWCFG4.
9813  */
9814 struct ALT_USB_GLOB_GHWCFG4_s
9815 {
9816  const uint32_t numdevperioeps : 4; /* Number of Device Mode Periodic IN Endpoints */
9817  const uint32_t partialpwrdn : 1; /* Enable Partial Power Down */
9818  const uint32_t ahbfreq : 1; /* Minimum AHB Frequency Less Than 60 MHz */
9819  const uint32_t hibernation : 1; /* Enable Hibernation */
9820  uint32_t : 7; /* *UNDEFINED* */
9821  const uint32_t phydatawidth : 2; /* UTMI+ PHY/ULPI-to-Internal UTMI+ Wrapper Data Width */
9822  const uint32_t numctleps : 4; /* Number of Device Mode Control Endpoints in Addition to Endpoint 0 */
9823  const uint32_t iddgfltr : 1; /* Iddig Filter Enable */
9824  const uint32_t vbusvalidfltr : 1; /* Vbus Valid Filter Enabled */
9825  const uint32_t avalidfltr : 1; /* a_valid Filter */
9826  const uint32_t bvalidfltr : 1; /* b_valid Filter */
9827  const uint32_t sessendfltr : 1; /* Session End Filter */
9828  const uint32_t dedfifomode : 1; /* Enable Dedicated Transmit FIFO for device IN Endpoints */
9829  const uint32_t ineps : 4; /* Number of Device Mode IN Endpoints Including Control */
9830  const uint32_t dma_configuration : 1; /* Scatter Gather DMA configuration */
9831  const uint32_t dma : 1; /* Scatter Gather DMA */
9832 };
9833 
9834 /* The typedef declaration for register ALT_USB_GLOB_GHWCFG4. */
9835 typedef volatile struct ALT_USB_GLOB_GHWCFG4_s ALT_USB_GLOB_GHWCFG4_t;
9836 #endif /* __ASSEMBLY__ */
9837 
9838 /* The byte offset of the ALT_USB_GLOB_GHWCFG4 register from the beginning of the component. */
9839 #define ALT_USB_GLOB_GHWCFG4_OFST 0x50
9840 /* The address of the ALT_USB_GLOB_GHWCFG4 register. */
9841 #define ALT_USB_GLOB_GHWCFG4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GHWCFG4_OFST))
9842 
9843 /*
9844  * Register : DFIFO Software Config Register - gdfifocfg
9845  *
9846  * Specifies whether Dedicated Transmit FIFOs should be enabled in device mode.
9847  *
9848  * Register Layout
9849  *
9850  * Bits | Access | Reset | Description
9851  * :--------|:-------|:-------|:-------------------------
9852  * [15:0] | RW | 0x2000 | DFIFO Software Config
9853  * [31:16] | RW | 0x1f80 | End Point Info Basr Addr
9854  *
9855  */
9856 /*
9857  * Field : DFIFO Software Config - gdfifocfg
9858  *
9859  * This field is for dynamic programming of the DFIFO Size. This value takes effect
9860  * only when the application programs a non zero value to this register. The otg
9861  * core does not have any corrective logic if the FIFO sizes are programmed
9862  * incorrectly.
9863  *
9864  * Field Access Macros:
9865  *
9866  */
9867 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG register field. */
9868 #define ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG_LSB 0
9869 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG register field. */
9870 #define ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG_MSB 15
9871 /* The width in bits of the ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG register field. */
9872 #define ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG_WIDTH 16
9873 /* The mask used to set the ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG register field value. */
9874 #define ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG_SET_MSK 0x0000ffff
9875 /* The mask used to clear the ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG register field value. */
9876 #define ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG_CLR_MSK 0xffff0000
9877 /* The reset value of the ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG register field. */
9878 #define ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG_RESET 0x2000
9879 /* Extracts the ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG field value from a register. */
9880 #define ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG_GET(value) (((value) & 0x0000ffff) >> 0)
9881 /* Produces a ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG register field value suitable for setting the register. */
9882 #define ALT_USB_GLOB_GDFIFOCFG_GDFIFOCFG_SET(value) (((value) << 0) & 0x0000ffff)
9883 
9884 /*
9885  * Field : End Point Info Basr Addr - epinfobaseaddr
9886  *
9887  * This field provides the start address of the EP info controller.
9888  *
9889  * Field Access Macros:
9890  *
9891  */
9892 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR register field. */
9893 #define ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR_LSB 16
9894 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR register field. */
9895 #define ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR_MSB 31
9896 /* The width in bits of the ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR register field. */
9897 #define ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR_WIDTH 16
9898 /* The mask used to set the ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR register field value. */
9899 #define ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR_SET_MSK 0xffff0000
9900 /* The mask used to clear the ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR register field value. */
9901 #define ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR_CLR_MSK 0x0000ffff
9902 /* The reset value of the ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR register field. */
9903 #define ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR_RESET 0x1f80
9904 /* Extracts the ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR field value from a register. */
9905 #define ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR_GET(value) (((value) & 0xffff0000) >> 16)
9906 /* Produces a ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR register field value suitable for setting the register. */
9907 #define ALT_USB_GLOB_GDFIFOCFG_EPINFOBASEADDR_SET(value) (((value) << 16) & 0xffff0000)
9908 
9909 #ifndef __ASSEMBLY__
9910 /*
9911  * WARNING: The C register and register group struct declarations are provided for
9912  * convenience and illustrative purposes. They should, however, be used with
9913  * caution as the C language standard provides no guarantees about the alignment or
9914  * atomicity of device memory accesses. The recommended practice for writing
9915  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
9916  * alt_write_word() functions.
9917  *
9918  * The struct declaration for register ALT_USB_GLOB_GDFIFOCFG.
9919  */
9920 struct ALT_USB_GLOB_GDFIFOCFG_s
9921 {
9922  uint32_t gdfifocfg : 16; /* DFIFO Software Config */
9923  uint32_t epinfobaseaddr : 16; /* End Point Info Basr Addr */
9924 };
9925 
9926 /* The typedef declaration for register ALT_USB_GLOB_GDFIFOCFG. */
9927 typedef volatile struct ALT_USB_GLOB_GDFIFOCFG_s ALT_USB_GLOB_GDFIFOCFG_t;
9928 #endif /* __ASSEMBLY__ */
9929 
9930 /* The byte offset of the ALT_USB_GLOB_GDFIFOCFG register from the beginning of the component. */
9931 #define ALT_USB_GLOB_GDFIFOCFG_OFST 0x5c
9932 /* The address of the ALT_USB_GLOB_GDFIFOCFG register. */
9933 #define ALT_USB_GLOB_GDFIFOCFG_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GDFIFOCFG_OFST))
9934 
9935 /*
9936  * Register : Host Periodic Transmit FIFO Size Register - hptxfsiz
9937  *
9938  * This register holds the size and the memory start address of the Periodic TxFIFO
9939  *
9940  * Register Layout
9941  *
9942  * Bits | Access | Reset | Description
9943  * :--------|:-------|:-------|:-----------------------------------
9944  * [14:0] | RW | 0x4000 | Host Periodic TxFIFO Start Address
9945  * [15] | ??? | 0x0 | *UNDEFINED*
9946  * [29:16] | RW | 0x2000 | Host Periodic TxFIFO Depth
9947  * [31:30] | ??? | 0x0 | *UNDEFINED*
9948  *
9949  */
9950 /*
9951  * Field : Host Periodic TxFIFO Start Address - ptxfstaddr
9952  *
9953  * The power-on reset value of this register is the sum of the Largest Rx Data FIFO
9954  * Depth and Largest Non-periodic Tx Data FIFO. Programmed values must not exceed
9955  * the power-on value
9956  *
9957  * Field Access Macros:
9958  *
9959  */
9960 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR register field. */
9961 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR_LSB 0
9962 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR register field. */
9963 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR_MSB 14
9964 /* The width in bits of the ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR register field. */
9965 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR_WIDTH 15
9966 /* The mask used to set the ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR register field value. */
9967 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR_SET_MSK 0x00007fff
9968 /* The mask used to clear the ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR register field value. */
9969 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR_CLR_MSK 0xffff8000
9970 /* The reset value of the ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR register field. */
9971 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR_RESET 0x4000
9972 /* Extracts the ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR field value from a register. */
9973 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR_GET(value) (((value) & 0x00007fff) >> 0)
9974 /* Produces a ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR register field value suitable for setting the register. */
9975 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSTADDR_SET(value) (((value) << 0) & 0x00007fff)
9976 
9977 /*
9978  * Field : Host Periodic TxFIFO Depth - ptxfsize
9979  *
9980  * This value is in terms of 32-bit words.
9981  *
9982  * Minimum value is 16
9983  *
9984  * Maximum value is 1024
9985  *
9986  * The power-on reset value of this register is specified as the 1024.
9987  *
9988  * Field Access Macros:
9989  *
9990  */
9991 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE register field. */
9992 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE_LSB 16
9993 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE register field. */
9994 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE_MSB 29
9995 /* The width in bits of the ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE register field. */
9996 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE_WIDTH 14
9997 /* The mask used to set the ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE register field value. */
9998 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE_SET_MSK 0x3fff0000
9999 /* The mask used to clear the ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE register field value. */
10000 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE_CLR_MSK 0xc000ffff
10001 /* The reset value of the ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE register field. */
10002 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE_RESET 0x2000
10003 /* Extracts the ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE field value from a register. */
10004 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE_GET(value) (((value) & 0x3fff0000) >> 16)
10005 /* Produces a ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE register field value suitable for setting the register. */
10006 #define ALT_USB_GLOB_HPTXFSIZ_PTXFSIZE_SET(value) (((value) << 16) & 0x3fff0000)
10007 
10008 #ifndef __ASSEMBLY__
10009 /*
10010  * WARNING: The C register and register group struct declarations are provided for
10011  * convenience and illustrative purposes. They should, however, be used with
10012  * caution as the C language standard provides no guarantees about the alignment or
10013  * atomicity of device memory accesses. The recommended practice for writing
10014  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
10015  * alt_write_word() functions.
10016  *
10017  * The struct declaration for register ALT_USB_GLOB_HPTXFSIZ.
10018  */
10019 struct ALT_USB_GLOB_HPTXFSIZ_s
10020 {
10021  uint32_t ptxfstaddr : 15; /* Host Periodic TxFIFO Start Address */
10022  uint32_t : 1; /* *UNDEFINED* */
10023  uint32_t ptxfsize : 14; /* Host Periodic TxFIFO Depth */
10024  uint32_t : 2; /* *UNDEFINED* */
10025 };
10026 
10027 /* The typedef declaration for register ALT_USB_GLOB_HPTXFSIZ. */
10028 typedef volatile struct ALT_USB_GLOB_HPTXFSIZ_s ALT_USB_GLOB_HPTXFSIZ_t;
10029 #endif /* __ASSEMBLY__ */
10030 
10031 /* The byte offset of the ALT_USB_GLOB_HPTXFSIZ register from the beginning of the component. */
10032 #define ALT_USB_GLOB_HPTXFSIZ_OFST 0x100
10033 /* The address of the ALT_USB_GLOB_HPTXFSIZ register. */
10034 #define ALT_USB_GLOB_HPTXFSIZ_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_HPTXFSIZ_OFST))
10035 
10036 /*
10037  * Register : Device IN Endpoint Transmit FIFO Size Register 1 - dieptxf1
10038  *
10039  * This register holds the size and memory start address of IN endpoint TxFIFOs
10040  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
10041  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
10042  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
10043  *
10044  * Register Layout
10045  *
10046  * Bits | Access | Reset | Description
10047  * :--------|:-------|:-------|:---------------------------------------------
10048  * [14:0] | RW | 0x4000 | IN Endpoint FIFOn Transmit RAM Start Address
10049  * [15] | ??? | 0x0 | *UNDEFINED*
10050  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
10051  * [31:30] | ??? | 0x0 | *UNDEFINED*
10052  *
10053  */
10054 /*
10055  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
10056  *
10057  * This field contains the memory start address for IN endpoint Transmit FIFO 1.
10058  *
10059  * Field Access Macros:
10060  *
10061  */
10062 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR register field. */
10063 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR_LSB 0
10064 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR register field. */
10065 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR_MSB 14
10066 /* The width in bits of the ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR register field. */
10067 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR_WIDTH 15
10068 /* The mask used to set the ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR register field value. */
10069 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR_SET_MSK 0x00007fff
10070 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR register field value. */
10071 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR_CLR_MSK 0xffff8000
10072 /* The reset value of the ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR register field. */
10073 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR_RESET 0x4000
10074 /* Extracts the ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR field value from a register. */
10075 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR_GET(value) (((value) & 0x00007fff) >> 0)
10076 /* Produces a ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR register field value suitable for setting the register. */
10077 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x00007fff)
10078 
10079 /*
10080  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
10081  *
10082  * This value is in terms of 32-bit words.
10083  *
10084  * Minimum value is 16
10085  *
10086  * Maximum value is 8192.
10087  *
10088  * Field Access Macros:
10089  *
10090  */
10091 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP register field. */
10092 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP_LSB 16
10093 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP register field. */
10094 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP_MSB 29
10095 /* The width in bits of the ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP register field. */
10096 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP_WIDTH 14
10097 /* The mask used to set the ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP register field value. */
10098 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP_SET_MSK 0x3fff0000
10099 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP register field value. */
10100 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP_CLR_MSK 0xc000ffff
10101 /* The reset value of the ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP register field. */
10102 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP_RESET 0x2000
10103 /* Extracts the ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP field value from a register. */
10104 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
10105 /* Produces a ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP register field value suitable for setting the register. */
10106 #define ALT_USB_GLOB_DIEPTXF1_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
10107 
10108 #ifndef __ASSEMBLY__
10109 /*
10110  * WARNING: The C register and register group struct declarations are provided for
10111  * convenience and illustrative purposes. They should, however, be used with
10112  * caution as the C language standard provides no guarantees about the alignment or
10113  * atomicity of device memory accesses. The recommended practice for writing
10114  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
10115  * alt_write_word() functions.
10116  *
10117  * The struct declaration for register ALT_USB_GLOB_DIEPTXF1.
10118  */
10119 struct ALT_USB_GLOB_DIEPTXF1_s
10120 {
10121  uint32_t inepntxfstaddr : 15; /* IN Endpoint FIFOn Transmit RAM Start Address */
10122  uint32_t : 1; /* *UNDEFINED* */
10123  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
10124  uint32_t : 2; /* *UNDEFINED* */
10125 };
10126 
10127 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF1. */
10128 typedef volatile struct ALT_USB_GLOB_DIEPTXF1_s ALT_USB_GLOB_DIEPTXF1_t;
10129 #endif /* __ASSEMBLY__ */
10130 
10131 /* The byte offset of the ALT_USB_GLOB_DIEPTXF1 register from the beginning of the component. */
10132 #define ALT_USB_GLOB_DIEPTXF1_OFST 0x104
10133 /* The address of the ALT_USB_GLOB_DIEPTXF1 register. */
10134 #define ALT_USB_GLOB_DIEPTXF1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF1_OFST))
10135 
10136 /*
10137  * Register : Device IN Endpoint Transmit FIFO Size Register 2 - dieptxf2
10138  *
10139  * This register holds the size and memory start address of IN endpoint TxFIFOs
10140  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
10141  * register is repeated for instantiated IN endpoint FIFO. For IN endpoint FIFO 0
10142  * use GNPTXFSIZ register for programming the size and memory start address.
10143  *
10144  * Register Layout
10145  *
10146  * Bits | Access | Reset | Description
10147  * :--------|:-------|:-------|:---------------------------------------------
10148  * [14:0] | RW | 0x6000 | IN Endpoint FIFOn Transmit RAM Start Address
10149  * [15] | ??? | 0x0 | *UNDEFINED*
10150  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
10151  * [31:30] | ??? | 0x0 | *UNDEFINED*
10152  *
10153  */
10154 /*
10155  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
10156  *
10157  * This field contains the memory start address for IN endpoint Transmit FIFO 2.
10158  *
10159  * Field Access Macros:
10160  *
10161  */
10162 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR register field. */
10163 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR_LSB 0
10164 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR register field. */
10165 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR_MSB 14
10166 /* The width in bits of the ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR register field. */
10167 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR_WIDTH 15
10168 /* The mask used to set the ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR register field value. */
10169 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR_SET_MSK 0x00007fff
10170 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR register field value. */
10171 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR_CLR_MSK 0xffff8000
10172 /* The reset value of the ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR register field. */
10173 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR_RESET 0x6000
10174 /* Extracts the ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR field value from a register. */
10175 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR_GET(value) (((value) & 0x00007fff) >> 0)
10176 /* Produces a ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR register field value suitable for setting the register. */
10177 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x00007fff)
10178 
10179 /*
10180  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
10181  *
10182  * This value is in terms of 32-bit words.
10183  *
10184  * Minimum value is 16
10185  *
10186  * Maximum value is 8192
10187  *
10188  * Field Access Macros:
10189  *
10190  */
10191 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP register field. */
10192 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP_LSB 16
10193 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP register field. */
10194 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP_MSB 29
10195 /* The width in bits of the ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP register field. */
10196 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP_WIDTH 14
10197 /* The mask used to set the ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP register field value. */
10198 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP_SET_MSK 0x3fff0000
10199 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP register field value. */
10200 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP_CLR_MSK 0xc000ffff
10201 /* The reset value of the ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP register field. */
10202 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP_RESET 0x2000
10203 /* Extracts the ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP field value from a register. */
10204 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
10205 /* Produces a ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP register field value suitable for setting the register. */
10206 #define ALT_USB_GLOB_DIEPTXF2_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
10207 
10208 #ifndef __ASSEMBLY__
10209 /*
10210  * WARNING: The C register and register group struct declarations are provided for
10211  * convenience and illustrative purposes. They should, however, be used with
10212  * caution as the C language standard provides no guarantees about the alignment or
10213  * atomicity of device memory accesses. The recommended practice for writing
10214  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
10215  * alt_write_word() functions.
10216  *
10217  * The struct declaration for register ALT_USB_GLOB_DIEPTXF2.
10218  */
10219 struct ALT_USB_GLOB_DIEPTXF2_s
10220 {
10221  uint32_t inepntxfstaddr : 15; /* IN Endpoint FIFOn Transmit RAM Start Address */
10222  uint32_t : 1; /* *UNDEFINED* */
10223  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
10224  uint32_t : 2; /* *UNDEFINED* */
10225 };
10226 
10227 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF2. */
10228 typedef volatile struct ALT_USB_GLOB_DIEPTXF2_s ALT_USB_GLOB_DIEPTXF2_t;
10229 #endif /* __ASSEMBLY__ */
10230 
10231 /* The byte offset of the ALT_USB_GLOB_DIEPTXF2 register from the beginning of the component. */
10232 #define ALT_USB_GLOB_DIEPTXF2_OFST 0x108
10233 /* The address of the ALT_USB_GLOB_DIEPTXF2 register. */
10234 #define ALT_USB_GLOB_DIEPTXF2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF2_OFST))
10235 
10236 /*
10237  * Register : Device IN Endpoint Transmit FIFO Size Register 3 - dieptxf3
10238  *
10239  * This register holds the size and memory start address of IN endpoint TxFIFOs
10240  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
10241  * register is repeated for instantiated IN endpoint FIFO. For IN endpoint FIFO 0
10242  * use GNPTXFSIZ register for programming the size and memory start address.
10243  *
10244  * Register Layout
10245  *
10246  * Bits | Access | Reset | Description
10247  * :--------|:-------|:-------|:---------------------------------------------
10248  * [15:0] | RW | 0x8000 | IN Endpoint FIFOn Transmit RAM Start Address
10249  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
10250  * [31:30] | ??? | 0x0 | *UNDEFINED*
10251  *
10252  */
10253 /*
10254  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
10255  *
10256  * This field contains the memory start address for IN endpoint Transmit FIFO 3.
10257  *
10258  * Field Access Macros:
10259  *
10260  */
10261 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR register field. */
10262 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR_LSB 0
10263 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR register field. */
10264 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR_MSB 15
10265 /* The width in bits of the ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR register field. */
10266 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR_WIDTH 16
10267 /* The mask used to set the ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR register field value. */
10268 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR_SET_MSK 0x0000ffff
10269 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR register field value. */
10270 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR_CLR_MSK 0xffff0000
10271 /* The reset value of the ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR register field. */
10272 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR_RESET 0x8000
10273 /* Extracts the ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR field value from a register. */
10274 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
10275 /* Produces a ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR register field value suitable for setting the register. */
10276 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
10277 
10278 /*
10279  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
10280  *
10281  * This value is in terms of 32-bit words.Minimum value is 16Maximum value is 8192
10282  *
10283  * Field Access Macros:
10284  *
10285  */
10286 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP register field. */
10287 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP_LSB 16
10288 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP register field. */
10289 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP_MSB 29
10290 /* The width in bits of the ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP register field. */
10291 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP_WIDTH 14
10292 /* The mask used to set the ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP register field value. */
10293 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP_SET_MSK 0x3fff0000
10294 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP register field value. */
10295 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP_CLR_MSK 0xc000ffff
10296 /* The reset value of the ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP register field. */
10297 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP_RESET 0x2000
10298 /* Extracts the ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP field value from a register. */
10299 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
10300 /* Produces a ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP register field value suitable for setting the register. */
10301 #define ALT_USB_GLOB_DIEPTXF3_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
10302 
10303 #ifndef __ASSEMBLY__
10304 /*
10305  * WARNING: The C register and register group struct declarations are provided for
10306  * convenience and illustrative purposes. They should, however, be used with
10307  * caution as the C language standard provides no guarantees about the alignment or
10308  * atomicity of device memory accesses. The recommended practice for writing
10309  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
10310  * alt_write_word() functions.
10311  *
10312  * The struct declaration for register ALT_USB_GLOB_DIEPTXF3.
10313  */
10314 struct ALT_USB_GLOB_DIEPTXF3_s
10315 {
10316  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Address */
10317  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
10318  uint32_t : 2; /* *UNDEFINED* */
10319 };
10320 
10321 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF3. */
10322 typedef volatile struct ALT_USB_GLOB_DIEPTXF3_s ALT_USB_GLOB_DIEPTXF3_t;
10323 #endif /* __ASSEMBLY__ */
10324 
10325 /* The byte offset of the ALT_USB_GLOB_DIEPTXF3 register from the beginning of the component. */
10326 #define ALT_USB_GLOB_DIEPTXF3_OFST 0x10c
10327 /* The address of the ALT_USB_GLOB_DIEPTXF3 register. */
10328 #define ALT_USB_GLOB_DIEPTXF3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF3_OFST))
10329 
10330 /*
10331  * Register : Device IN Endpoint Transmit FIFO Size Register 4 - dieptxf4
10332  *
10333  * This register holds the size and memory start address of IN endpoint TxFIFOs
10334  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
10335  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
10336  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
10337  *
10338  * Register Layout
10339  *
10340  * Bits | Access | Reset | Description
10341  * :--------|:-------|:-------|:---------------------------------------------
10342  * [15:0] | RW | 0xa000 | IN Endpoint FIFOn Transmit RAM Start Address
10343  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
10344  * [31:30] | ??? | 0x0 | *UNDEFINED*
10345  *
10346  */
10347 /*
10348  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
10349  *
10350  * This field contains the memory start address for IN endpoint Transmit FIFO 4.
10351  *
10352  * Field Access Macros:
10353  *
10354  */
10355 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR register field. */
10356 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR_LSB 0
10357 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR register field. */
10358 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR_MSB 15
10359 /* The width in bits of the ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR register field. */
10360 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR_WIDTH 16
10361 /* The mask used to set the ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR register field value. */
10362 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR_SET_MSK 0x0000ffff
10363 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR register field value. */
10364 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR_CLR_MSK 0xffff0000
10365 /* The reset value of the ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR register field. */
10366 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR_RESET 0xa000
10367 /* Extracts the ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR field value from a register. */
10368 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
10369 /* Produces a ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR register field value suitable for setting the register. */
10370 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
10371 
10372 /*
10373  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
10374  *
10375  * This value is in terms of 32-bit words.
10376  *
10377  * Minimum value is 16
10378  *
10379  * Maximum value is 8192.
10380  *
10381  * Field Access Macros:
10382  *
10383  */
10384 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP register field. */
10385 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP_LSB 16
10386 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP register field. */
10387 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP_MSB 29
10388 /* The width in bits of the ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP register field. */
10389 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP_WIDTH 14
10390 /* The mask used to set the ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP register field value. */
10391 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP_SET_MSK 0x3fff0000
10392 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP register field value. */
10393 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP_CLR_MSK 0xc000ffff
10394 /* The reset value of the ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP register field. */
10395 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP_RESET 0x2000
10396 /* Extracts the ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP field value from a register. */
10397 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
10398 /* Produces a ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP register field value suitable for setting the register. */
10399 #define ALT_USB_GLOB_DIEPTXF4_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
10400 
10401 #ifndef __ASSEMBLY__
10402 /*
10403  * WARNING: The C register and register group struct declarations are provided for
10404  * convenience and illustrative purposes. They should, however, be used with
10405  * caution as the C language standard provides no guarantees about the alignment or
10406  * atomicity of device memory accesses. The recommended practice for writing
10407  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
10408  * alt_write_word() functions.
10409  *
10410  * The struct declaration for register ALT_USB_GLOB_DIEPTXF4.
10411  */
10412 struct ALT_USB_GLOB_DIEPTXF4_s
10413 {
10414  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Address */
10415  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
10416  uint32_t : 2; /* *UNDEFINED* */
10417 };
10418 
10419 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF4. */
10420 typedef volatile struct ALT_USB_GLOB_DIEPTXF4_s ALT_USB_GLOB_DIEPTXF4_t;
10421 #endif /* __ASSEMBLY__ */
10422 
10423 /* The byte offset of the ALT_USB_GLOB_DIEPTXF4 register from the beginning of the component. */
10424 #define ALT_USB_GLOB_DIEPTXF4_OFST 0x110
10425 /* The address of the ALT_USB_GLOB_DIEPTXF4 register. */
10426 #define ALT_USB_GLOB_DIEPTXF4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF4_OFST))
10427 
10428 /*
10429  * Register : Device IN Endpoint Transmit FIFO Size Register 5 - dieptxf5
10430  *
10431  * This register holds the size and memory start address of IN endpoint TxFIFOs
10432  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
10433  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
10434  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
10435  *
10436  * Register Layout
10437  *
10438  * Bits | Access | Reset | Description
10439  * :--------|:-------|:-------|:---------------------------------------------
10440  * [15:0] | RW | 0xc000 | IN Endpoint FIFOn Transmit RAM Start Address
10441  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
10442  * [31:30] | ??? | 0x0 | *UNDEFINED*
10443  *
10444  */
10445 /*
10446  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
10447  *
10448  * This field contains the memory start address for IN endpoint Transmit FIFO 5.
10449  *
10450  * Field Access Macros:
10451  *
10452  */
10453 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR register field. */
10454 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR_LSB 0
10455 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR register field. */
10456 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR_MSB 15
10457 /* The width in bits of the ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR register field. */
10458 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR_WIDTH 16
10459 /* The mask used to set the ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR register field value. */
10460 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR_SET_MSK 0x0000ffff
10461 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR register field value. */
10462 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR_CLR_MSK 0xffff0000
10463 /* The reset value of the ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR register field. */
10464 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR_RESET 0xc000
10465 /* Extracts the ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR field value from a register. */
10466 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
10467 /* Produces a ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR register field value suitable for setting the register. */
10468 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
10469 
10470 /*
10471  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
10472  *
10473  * This value is in terms of 32-bit words.
10474  *
10475  * Minimum value is 16
10476  *
10477  * Maximum value is 8192.
10478  *
10479  * Field Access Macros:
10480  *
10481  */
10482 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP register field. */
10483 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP_LSB 16
10484 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP register field. */
10485 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP_MSB 29
10486 /* The width in bits of the ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP register field. */
10487 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP_WIDTH 14
10488 /* The mask used to set the ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP register field value. */
10489 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP_SET_MSK 0x3fff0000
10490 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP register field value. */
10491 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP_CLR_MSK 0xc000ffff
10492 /* The reset value of the ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP register field. */
10493 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP_RESET 0x2000
10494 /* Extracts the ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP field value from a register. */
10495 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
10496 /* Produces a ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP register field value suitable for setting the register. */
10497 #define ALT_USB_GLOB_DIEPTXF5_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
10498 
10499 #ifndef __ASSEMBLY__
10500 /*
10501  * WARNING: The C register and register group struct declarations are provided for
10502  * convenience and illustrative purposes. They should, however, be used with
10503  * caution as the C language standard provides no guarantees about the alignment or
10504  * atomicity of device memory accesses. The recommended practice for writing
10505  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
10506  * alt_write_word() functions.
10507  *
10508  * The struct declaration for register ALT_USB_GLOB_DIEPTXF5.
10509  */
10510 struct ALT_USB_GLOB_DIEPTXF5_s
10511 {
10512  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Address */
10513  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
10514  uint32_t : 2; /* *UNDEFINED* */
10515 };
10516 
10517 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF5. */
10518 typedef volatile struct ALT_USB_GLOB_DIEPTXF5_s ALT_USB_GLOB_DIEPTXF5_t;
10519 #endif /* __ASSEMBLY__ */
10520 
10521 /* The byte offset of the ALT_USB_GLOB_DIEPTXF5 register from the beginning of the component. */
10522 #define ALT_USB_GLOB_DIEPTXF5_OFST 0x114
10523 /* The address of the ALT_USB_GLOB_DIEPTXF5 register. */
10524 #define ALT_USB_GLOB_DIEPTXF5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF5_OFST))
10525 
10526 /*
10527  * Register : Device IN Endpoint Transmit FIFO Size Register 6 - dieptxf6
10528  *
10529  * This register holds the size and memory start address of IN endpoint TxFIFOs
10530  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
10531  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
10532  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
10533  *
10534  * Register Layout
10535  *
10536  * Bits | Access | Reset | Description
10537  * :--------|:-------|:-------|:---------------------------------------------
10538  * [15:0] | RW | 0xe000 | IN Endpoint FIFOn Transmit RAM Start Address
10539  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
10540  * [31:30] | ??? | 0x0 | *UNDEFINED*
10541  *
10542  */
10543 /*
10544  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
10545  *
10546  * This field contains the memory start address for IN endpoint Transmit FIFO 6.
10547  *
10548  * Field Access Macros:
10549  *
10550  */
10551 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR register field. */
10552 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR_LSB 0
10553 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR register field. */
10554 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR_MSB 15
10555 /* The width in bits of the ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR register field. */
10556 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR_WIDTH 16
10557 /* The mask used to set the ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR register field value. */
10558 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR_SET_MSK 0x0000ffff
10559 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR register field value. */
10560 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR_CLR_MSK 0xffff0000
10561 /* The reset value of the ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR register field. */
10562 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR_RESET 0xe000
10563 /* Extracts the ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR field value from a register. */
10564 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
10565 /* Produces a ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR register field value suitable for setting the register. */
10566 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
10567 
10568 /*
10569  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
10570  *
10571  * This value is in terms of 32-bit words.
10572  *
10573  * Minimum value is 16
10574  *
10575  * Maximum value is 8192.
10576  *
10577  * Field Access Macros:
10578  *
10579  */
10580 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP register field. */
10581 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP_LSB 16
10582 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP register field. */
10583 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP_MSB 29
10584 /* The width in bits of the ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP register field. */
10585 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP_WIDTH 14
10586 /* The mask used to set the ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP register field value. */
10587 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP_SET_MSK 0x3fff0000
10588 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP register field value. */
10589 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP_CLR_MSK 0xc000ffff
10590 /* The reset value of the ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP register field. */
10591 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP_RESET 0x2000
10592 /* Extracts the ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP field value from a register. */
10593 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
10594 /* Produces a ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP register field value suitable for setting the register. */
10595 #define ALT_USB_GLOB_DIEPTXF6_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
10596 
10597 #ifndef __ASSEMBLY__
10598 /*
10599  * WARNING: The C register and register group struct declarations are provided for
10600  * convenience and illustrative purposes. They should, however, be used with
10601  * caution as the C language standard provides no guarantees about the alignment or
10602  * atomicity of device memory accesses. The recommended practice for writing
10603  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
10604  * alt_write_word() functions.
10605  *
10606  * The struct declaration for register ALT_USB_GLOB_DIEPTXF6.
10607  */
10608 struct ALT_USB_GLOB_DIEPTXF6_s
10609 {
10610  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Address */
10611  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
10612  uint32_t : 2; /* *UNDEFINED* */
10613 };
10614 
10615 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF6. */
10616 typedef volatile struct ALT_USB_GLOB_DIEPTXF6_s ALT_USB_GLOB_DIEPTXF6_t;
10617 #endif /* __ASSEMBLY__ */
10618 
10619 /* The byte offset of the ALT_USB_GLOB_DIEPTXF6 register from the beginning of the component. */
10620 #define ALT_USB_GLOB_DIEPTXF6_OFST 0x118
10621 /* The address of the ALT_USB_GLOB_DIEPTXF6 register. */
10622 #define ALT_USB_GLOB_DIEPTXF6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF6_OFST))
10623 
10624 /*
10625  * Register : Device IN Endpoint Transmit FIFO Size Register 7 - dieptxf7
10626  *
10627  * This register holds the size and memory start address of IN endpoint TxFIFOs
10628  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
10629  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
10630  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
10631  *
10632  * Register Layout
10633  *
10634  * Bits | Access | Reset | Description
10635  * :--------|:-------|:-------|:---------------------------------------------
10636  * [15:0] | RW | 0x0 | IN Endpoint FIFOn Transmit RAM Start Address
10637  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
10638  * [31:30] | ??? | 0x0 | *UNDEFINED*
10639  *
10640  */
10641 /*
10642  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
10643  *
10644  * This field contains the memory start address for IN endpoint Transmit FIFO 7.
10645  *
10646  * Field Access Macros:
10647  *
10648  */
10649 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR register field. */
10650 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR_LSB 0
10651 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR register field. */
10652 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR_MSB 15
10653 /* The width in bits of the ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR register field. */
10654 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR_WIDTH 16
10655 /* The mask used to set the ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR register field value. */
10656 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR_SET_MSK 0x0000ffff
10657 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR register field value. */
10658 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR_CLR_MSK 0xffff0000
10659 /* The reset value of the ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR register field. */
10660 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR_RESET 0x0
10661 /* Extracts the ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR field value from a register. */
10662 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
10663 /* Produces a ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR register field value suitable for setting the register. */
10664 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
10665 
10666 /*
10667  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
10668  *
10669  * This value is in terms of 32-bit words.
10670  *
10671  * Minimum value is 16
10672  *
10673  * Maximum value is 8192.
10674  *
10675  * Field Access Macros:
10676  *
10677  */
10678 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP register field. */
10679 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP_LSB 16
10680 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP register field. */
10681 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP_MSB 29
10682 /* The width in bits of the ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP register field. */
10683 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP_WIDTH 14
10684 /* The mask used to set the ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP register field value. */
10685 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP_SET_MSK 0x3fff0000
10686 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP register field value. */
10687 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP_CLR_MSK 0xc000ffff
10688 /* The reset value of the ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP register field. */
10689 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP_RESET 0x2000
10690 /* Extracts the ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP field value from a register. */
10691 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
10692 /* Produces a ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP register field value suitable for setting the register. */
10693 #define ALT_USB_GLOB_DIEPTXF7_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
10694 
10695 #ifndef __ASSEMBLY__
10696 /*
10697  * WARNING: The C register and register group struct declarations are provided for
10698  * convenience and illustrative purposes. They should, however, be used with
10699  * caution as the C language standard provides no guarantees about the alignment or
10700  * atomicity of device memory accesses. The recommended practice for writing
10701  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
10702  * alt_write_word() functions.
10703  *
10704  * The struct declaration for register ALT_USB_GLOB_DIEPTXF7.
10705  */
10706 struct ALT_USB_GLOB_DIEPTXF7_s
10707 {
10708  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Address */
10709  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
10710  uint32_t : 2; /* *UNDEFINED* */
10711 };
10712 
10713 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF7. */
10714 typedef volatile struct ALT_USB_GLOB_DIEPTXF7_s ALT_USB_GLOB_DIEPTXF7_t;
10715 #endif /* __ASSEMBLY__ */
10716 
10717 /* The byte offset of the ALT_USB_GLOB_DIEPTXF7 register from the beginning of the component. */
10718 #define ALT_USB_GLOB_DIEPTXF7_OFST 0x11c
10719 /* The address of the ALT_USB_GLOB_DIEPTXF7 register. */
10720 #define ALT_USB_GLOB_DIEPTXF7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF7_OFST))
10721 
10722 /*
10723  * Register : Device IN Endpoint Transmit FIFO Size Register 8 - dieptxf8
10724  *
10725  * This register holds the size and memory start address of IN endpoint TxFIFOs
10726  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
10727  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
10728  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
10729  *
10730  * Register Layout
10731  *
10732  * Bits | Access | Reset | Description
10733  * :--------|:-------|:-------|:---------------------------------------------
10734  * [15:0] | RW | 0x2000 | IN Endpoint FIFOn Transmit RAM Start Address
10735  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
10736  * [31:30] | ??? | 0x0 | *UNDEFINED*
10737  *
10738  */
10739 /*
10740  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
10741  *
10742  * This field contains the memory start address for IN endpoint Transmit FIFO 8.
10743  *
10744  * Field Access Macros:
10745  *
10746  */
10747 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR register field. */
10748 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR_LSB 0
10749 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR register field. */
10750 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR_MSB 15
10751 /* The width in bits of the ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR register field. */
10752 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR_WIDTH 16
10753 /* The mask used to set the ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR register field value. */
10754 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR_SET_MSK 0x0000ffff
10755 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR register field value. */
10756 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR_CLR_MSK 0xffff0000
10757 /* The reset value of the ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR register field. */
10758 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR_RESET 0x2000
10759 /* Extracts the ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR field value from a register. */
10760 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
10761 /* Produces a ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR register field value suitable for setting the register. */
10762 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
10763 
10764 /*
10765  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
10766  *
10767  * This value is in terms of 32-bit words.
10768  *
10769  * Minimum value is 16
10770  *
10771  * Maximum value is 8192.
10772  *
10773  * Field Access Macros:
10774  *
10775  */
10776 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP register field. */
10777 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP_LSB 16
10778 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP register field. */
10779 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP_MSB 29
10780 /* The width in bits of the ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP register field. */
10781 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP_WIDTH 14
10782 /* The mask used to set the ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP register field value. */
10783 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP_SET_MSK 0x3fff0000
10784 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP register field value. */
10785 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP_CLR_MSK 0xc000ffff
10786 /* The reset value of the ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP register field. */
10787 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP_RESET 0x2000
10788 /* Extracts the ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP field value from a register. */
10789 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
10790 /* Produces a ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP register field value suitable for setting the register. */
10791 #define ALT_USB_GLOB_DIEPTXF8_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
10792 
10793 #ifndef __ASSEMBLY__
10794 /*
10795  * WARNING: The C register and register group struct declarations are provided for
10796  * convenience and illustrative purposes. They should, however, be used with
10797  * caution as the C language standard provides no guarantees about the alignment or
10798  * atomicity of device memory accesses. The recommended practice for writing
10799  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
10800  * alt_write_word() functions.
10801  *
10802  * The struct declaration for register ALT_USB_GLOB_DIEPTXF8.
10803  */
10804 struct ALT_USB_GLOB_DIEPTXF8_s
10805 {
10806  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Address */
10807  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
10808  uint32_t : 2; /* *UNDEFINED* */
10809 };
10810 
10811 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF8. */
10812 typedef volatile struct ALT_USB_GLOB_DIEPTXF8_s ALT_USB_GLOB_DIEPTXF8_t;
10813 #endif /* __ASSEMBLY__ */
10814 
10815 /* The byte offset of the ALT_USB_GLOB_DIEPTXF8 register from the beginning of the component. */
10816 #define ALT_USB_GLOB_DIEPTXF8_OFST 0x120
10817 /* The address of the ALT_USB_GLOB_DIEPTXF8 register. */
10818 #define ALT_USB_GLOB_DIEPTXF8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF8_OFST))
10819 
10820 /*
10821  * Register : Device IN Endpoint Transmit FIFO Size Register 9 - dieptxf9
10822  *
10823  * This register holds the size and memory start address of IN endpoint TxFIFOs
10824  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
10825  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
10826  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
10827  *
10828  * Register Layout
10829  *
10830  * Bits | Access | Reset | Description
10831  * :--------|:-------|:-------|:--------------------------------------------
10832  * [15:0] | RW | 0x4000 | IN Endpoint FIFOn Transmit RAM Start Addres
10833  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
10834  * [31:30] | ??? | 0x0 | *UNDEFINED*
10835  *
10836  */
10837 /*
10838  * Field : IN Endpoint FIFOn Transmit RAM Start Addres - inepntxfstaddr
10839  *
10840  * This field contains the memory start address for IN endpoint Transmit FIFO 9.
10841  *
10842  * Field Access Macros:
10843  *
10844  */
10845 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR register field. */
10846 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR_LSB 0
10847 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR register field. */
10848 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR_MSB 15
10849 /* The width in bits of the ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR register field. */
10850 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR_WIDTH 16
10851 /* The mask used to set the ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR register field value. */
10852 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR_SET_MSK 0x0000ffff
10853 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR register field value. */
10854 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR_CLR_MSK 0xffff0000
10855 /* The reset value of the ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR register field. */
10856 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR_RESET 0x4000
10857 /* Extracts the ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR field value from a register. */
10858 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
10859 /* Produces a ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR register field value suitable for setting the register. */
10860 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
10861 
10862 /*
10863  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
10864  *
10865  * This value is in terms of 32-bit words.
10866  *
10867  * Minimum value is 16
10868  *
10869  * Maximum value is 8192.
10870  *
10871  * Field Access Macros:
10872  *
10873  */
10874 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP register field. */
10875 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP_LSB 16
10876 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP register field. */
10877 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP_MSB 29
10878 /* The width in bits of the ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP register field. */
10879 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP_WIDTH 14
10880 /* The mask used to set the ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP register field value. */
10881 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP_SET_MSK 0x3fff0000
10882 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP register field value. */
10883 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP_CLR_MSK 0xc000ffff
10884 /* The reset value of the ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP register field. */
10885 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP_RESET 0x2000
10886 /* Extracts the ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP field value from a register. */
10887 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
10888 /* Produces a ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP register field value suitable for setting the register. */
10889 #define ALT_USB_GLOB_DIEPTXF9_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
10890 
10891 #ifndef __ASSEMBLY__
10892 /*
10893  * WARNING: The C register and register group struct declarations are provided for
10894  * convenience and illustrative purposes. They should, however, be used with
10895  * caution as the C language standard provides no guarantees about the alignment or
10896  * atomicity of device memory accesses. The recommended practice for writing
10897  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
10898  * alt_write_word() functions.
10899  *
10900  * The struct declaration for register ALT_USB_GLOB_DIEPTXF9.
10901  */
10902 struct ALT_USB_GLOB_DIEPTXF9_s
10903 {
10904  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Addres */
10905  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
10906  uint32_t : 2; /* *UNDEFINED* */
10907 };
10908 
10909 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF9. */
10910 typedef volatile struct ALT_USB_GLOB_DIEPTXF9_s ALT_USB_GLOB_DIEPTXF9_t;
10911 #endif /* __ASSEMBLY__ */
10912 
10913 /* The byte offset of the ALT_USB_GLOB_DIEPTXF9 register from the beginning of the component. */
10914 #define ALT_USB_GLOB_DIEPTXF9_OFST 0x124
10915 /* The address of the ALT_USB_GLOB_DIEPTXF9 register. */
10916 #define ALT_USB_GLOB_DIEPTXF9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF9_OFST))
10917 
10918 /*
10919  * Register : Device IN Endpoint Transmit FIFO Size Register 10 - dieptxf10
10920  *
10921  * This register holds the size and memory start address of IN endpoint TxFIFOs
10922  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
10923  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
10924  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
10925  *
10926  * Register Layout
10927  *
10928  * Bits | Access | Reset | Description
10929  * :--------|:-------|:-------|:---------------------------------------------
10930  * [15:0] | RW | 0x6000 | IN Endpoint FIFOn Transmit RAM Start Address
10931  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
10932  * [31:30] | ??? | 0x0 | *UNDEFINED*
10933  *
10934  */
10935 /*
10936  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
10937  *
10938  * This field contains the memory start address for IN endpoint Transmit FIFO 10.
10939  *
10940  * Field Access Macros:
10941  *
10942  */
10943 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR register field. */
10944 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR_LSB 0
10945 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR register field. */
10946 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR_MSB 15
10947 /* The width in bits of the ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR register field. */
10948 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR_WIDTH 16
10949 /* The mask used to set the ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR register field value. */
10950 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR_SET_MSK 0x0000ffff
10951 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR register field value. */
10952 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR_CLR_MSK 0xffff0000
10953 /* The reset value of the ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR register field. */
10954 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR_RESET 0x6000
10955 /* Extracts the ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR field value from a register. */
10956 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
10957 /* Produces a ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR register field value suitable for setting the register. */
10958 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
10959 
10960 /*
10961  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
10962  *
10963  * This value is in terms of 32-bit words.
10964  *
10965  * Minimum value is 16
10966  *
10967  * Maximum value is 8192.
10968  *
10969  * Field Access Macros:
10970  *
10971  */
10972 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP register field. */
10973 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP_LSB 16
10974 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP register field. */
10975 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP_MSB 29
10976 /* The width in bits of the ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP register field. */
10977 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP_WIDTH 14
10978 /* The mask used to set the ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP register field value. */
10979 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP_SET_MSK 0x3fff0000
10980 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP register field value. */
10981 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP_CLR_MSK 0xc000ffff
10982 /* The reset value of the ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP register field. */
10983 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP_RESET 0x2000
10984 /* Extracts the ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP field value from a register. */
10985 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
10986 /* Produces a ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP register field value suitable for setting the register. */
10987 #define ALT_USB_GLOB_DIEPTXF10_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
10988 
10989 #ifndef __ASSEMBLY__
10990 /*
10991  * WARNING: The C register and register group struct declarations are provided for
10992  * convenience and illustrative purposes. They should, however, be used with
10993  * caution as the C language standard provides no guarantees about the alignment or
10994  * atomicity of device memory accesses. The recommended practice for writing
10995  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
10996  * alt_write_word() functions.
10997  *
10998  * The struct declaration for register ALT_USB_GLOB_DIEPTXF10.
10999  */
11000 struct ALT_USB_GLOB_DIEPTXF10_s
11001 {
11002  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Address */
11003  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
11004  uint32_t : 2; /* *UNDEFINED* */
11005 };
11006 
11007 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF10. */
11008 typedef volatile struct ALT_USB_GLOB_DIEPTXF10_s ALT_USB_GLOB_DIEPTXF10_t;
11009 #endif /* __ASSEMBLY__ */
11010 
11011 /* The byte offset of the ALT_USB_GLOB_DIEPTXF10 register from the beginning of the component. */
11012 #define ALT_USB_GLOB_DIEPTXF10_OFST 0x128
11013 /* The address of the ALT_USB_GLOB_DIEPTXF10 register. */
11014 #define ALT_USB_GLOB_DIEPTXF10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF10_OFST))
11015 
11016 /*
11017  * Register : Device IN Endpoint Transmit FIFO Size Register 11 - dieptxf11
11018  *
11019  * This register holds the size and memory start address of IN endpoint TxFIFOs
11020  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
11021  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
11022  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
11023  *
11024  * Register Layout
11025  *
11026  * Bits | Access | Reset | Description
11027  * :--------|:-------|:-------|:---------------------------------------------
11028  * [15:0] | RW | 0x8000 | IN Endpoint FIFOn Transmit RAM Start Address
11029  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
11030  * [31:30] | ??? | 0x0 | *UNDEFINED*
11031  *
11032  */
11033 /*
11034  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
11035  *
11036  * This field contains the memory start address for IN endpoint Transmit FIFO 11.
11037  *
11038  * Field Access Macros:
11039  *
11040  */
11041 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR register field. */
11042 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR_LSB 0
11043 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR register field. */
11044 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR_MSB 15
11045 /* The width in bits of the ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR register field. */
11046 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR_WIDTH 16
11047 /* The mask used to set the ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR register field value. */
11048 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR_SET_MSK 0x0000ffff
11049 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR register field value. */
11050 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR_CLR_MSK 0xffff0000
11051 /* The reset value of the ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR register field. */
11052 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR_RESET 0x8000
11053 /* Extracts the ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR field value from a register. */
11054 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
11055 /* Produces a ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR register field value suitable for setting the register. */
11056 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
11057 
11058 /*
11059  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
11060  *
11061  * This value is in terms of 32-bit words.
11062  *
11063  * Minimum value is 16
11064  *
11065  * Maximum value is 8192.
11066  *
11067  * Field Access Macros:
11068  *
11069  */
11070 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP register field. */
11071 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP_LSB 16
11072 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP register field. */
11073 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP_MSB 29
11074 /* The width in bits of the ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP register field. */
11075 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP_WIDTH 14
11076 /* The mask used to set the ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP register field value. */
11077 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP_SET_MSK 0x3fff0000
11078 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP register field value. */
11079 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP_CLR_MSK 0xc000ffff
11080 /* The reset value of the ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP register field. */
11081 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP_RESET 0x2000
11082 /* Extracts the ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP field value from a register. */
11083 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
11084 /* Produces a ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP register field value suitable for setting the register. */
11085 #define ALT_USB_GLOB_DIEPTXF11_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
11086 
11087 #ifndef __ASSEMBLY__
11088 /*
11089  * WARNING: The C register and register group struct declarations are provided for
11090  * convenience and illustrative purposes. They should, however, be used with
11091  * caution as the C language standard provides no guarantees about the alignment or
11092  * atomicity of device memory accesses. The recommended practice for writing
11093  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
11094  * alt_write_word() functions.
11095  *
11096  * The struct declaration for register ALT_USB_GLOB_DIEPTXF11.
11097  */
11098 struct ALT_USB_GLOB_DIEPTXF11_s
11099 {
11100  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Address */
11101  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
11102  uint32_t : 2; /* *UNDEFINED* */
11103 };
11104 
11105 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF11. */
11106 typedef volatile struct ALT_USB_GLOB_DIEPTXF11_s ALT_USB_GLOB_DIEPTXF11_t;
11107 #endif /* __ASSEMBLY__ */
11108 
11109 /* The byte offset of the ALT_USB_GLOB_DIEPTXF11 register from the beginning of the component. */
11110 #define ALT_USB_GLOB_DIEPTXF11_OFST 0x12c
11111 /* The address of the ALT_USB_GLOB_DIEPTXF11 register. */
11112 #define ALT_USB_GLOB_DIEPTXF11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF11_OFST))
11113 
11114 /*
11115  * Register : Device IN Endpoint Transmit FIFO Size Register 12 - dieptxf12
11116  *
11117  * This register holds the size and memory start address of IN endpoint TxFIFOs
11118  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
11119  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
11120  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
11121  *
11122  * Register Layout
11123  *
11124  * Bits | Access | Reset | Description
11125  * :--------|:-------|:-------|:---------------------------------------------
11126  * [15:0] | RW | 0xa000 | IN Endpoint FIFOn Transmit RAM Start Address
11127  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
11128  * [31:30] | ??? | 0x0 | *UNDEFINED*
11129  *
11130  */
11131 /*
11132  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
11133  *
11134  * This field contains the memory start address for IN endpoint Transmit FIFO 12.
11135  *
11136  * Field Access Macros:
11137  *
11138  */
11139 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR register field. */
11140 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR_LSB 0
11141 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR register field. */
11142 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR_MSB 15
11143 /* The width in bits of the ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR register field. */
11144 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR_WIDTH 16
11145 /* The mask used to set the ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR register field value. */
11146 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR_SET_MSK 0x0000ffff
11147 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR register field value. */
11148 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR_CLR_MSK 0xffff0000
11149 /* The reset value of the ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR register field. */
11150 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR_RESET 0xa000
11151 /* Extracts the ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR field value from a register. */
11152 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
11153 /* Produces a ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR register field value suitable for setting the register. */
11154 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
11155 
11156 /*
11157  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
11158  *
11159  * This value is in terms of 32-bit words.
11160  *
11161  * Minimum value is 16
11162  *
11163  * Maximum value is 8192.
11164  *
11165  * Field Access Macros:
11166  *
11167  */
11168 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP register field. */
11169 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP_LSB 16
11170 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP register field. */
11171 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP_MSB 29
11172 /* The width in bits of the ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP register field. */
11173 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP_WIDTH 14
11174 /* The mask used to set the ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP register field value. */
11175 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP_SET_MSK 0x3fff0000
11176 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP register field value. */
11177 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP_CLR_MSK 0xc000ffff
11178 /* The reset value of the ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP register field. */
11179 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP_RESET 0x2000
11180 /* Extracts the ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP field value from a register. */
11181 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
11182 /* Produces a ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP register field value suitable for setting the register. */
11183 #define ALT_USB_GLOB_DIEPTXF12_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
11184 
11185 #ifndef __ASSEMBLY__
11186 /*
11187  * WARNING: The C register and register group struct declarations are provided for
11188  * convenience and illustrative purposes. They should, however, be used with
11189  * caution as the C language standard provides no guarantees about the alignment or
11190  * atomicity of device memory accesses. The recommended practice for writing
11191  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
11192  * alt_write_word() functions.
11193  *
11194  * The struct declaration for register ALT_USB_GLOB_DIEPTXF12.
11195  */
11196 struct ALT_USB_GLOB_DIEPTXF12_s
11197 {
11198  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Address */
11199  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
11200  uint32_t : 2; /* *UNDEFINED* */
11201 };
11202 
11203 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF12. */
11204 typedef volatile struct ALT_USB_GLOB_DIEPTXF12_s ALT_USB_GLOB_DIEPTXF12_t;
11205 #endif /* __ASSEMBLY__ */
11206 
11207 /* The byte offset of the ALT_USB_GLOB_DIEPTXF12 register from the beginning of the component. */
11208 #define ALT_USB_GLOB_DIEPTXF12_OFST 0x130
11209 /* The address of the ALT_USB_GLOB_DIEPTXF12 register. */
11210 #define ALT_USB_GLOB_DIEPTXF12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF12_OFST))
11211 
11212 /*
11213  * Register : Device IN Endpoint Transmit FIFO Size Register 13 - dieptxf13
11214  *
11215  * This register holds the size and memory start address of IN endpoint TxFIFOs
11216  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
11217  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
11218  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
11219  *
11220  * Register Layout
11221  *
11222  * Bits | Access | Reset | Description
11223  * :--------|:-------|:-------|:---------------------------------------------
11224  * [15:0] | RW | 0xc000 | IN Endpoint FIFOn Transmit RAM Start Address
11225  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
11226  * [31:30] | ??? | 0x0 | *UNDEFINED*
11227  *
11228  */
11229 /*
11230  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
11231  *
11232  * This field contains the memory start address for IN endpoint Transmit FIFO 13.
11233  *
11234  * Field Access Macros:
11235  *
11236  */
11237 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR register field. */
11238 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR_LSB 0
11239 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR register field. */
11240 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR_MSB 15
11241 /* The width in bits of the ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR register field. */
11242 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR_WIDTH 16
11243 /* The mask used to set the ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR register field value. */
11244 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR_SET_MSK 0x0000ffff
11245 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR register field value. */
11246 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR_CLR_MSK 0xffff0000
11247 /* The reset value of the ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR register field. */
11248 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR_RESET 0xc000
11249 /* Extracts the ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR field value from a register. */
11250 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
11251 /* Produces a ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR register field value suitable for setting the register. */
11252 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
11253 
11254 /*
11255  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
11256  *
11257  * This value is in terms of 32-bit words.
11258  *
11259  * Minimum value is 16
11260  *
11261  * Maximum value is 8192.
11262  *
11263  * Field Access Macros:
11264  *
11265  */
11266 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP register field. */
11267 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP_LSB 16
11268 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP register field. */
11269 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP_MSB 29
11270 /* The width in bits of the ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP register field. */
11271 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP_WIDTH 14
11272 /* The mask used to set the ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP register field value. */
11273 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP_SET_MSK 0x3fff0000
11274 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP register field value. */
11275 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP_CLR_MSK 0xc000ffff
11276 /* The reset value of the ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP register field. */
11277 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP_RESET 0x2000
11278 /* Extracts the ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP field value from a register. */
11279 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
11280 /* Produces a ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP register field value suitable for setting the register. */
11281 #define ALT_USB_GLOB_DIEPTXF13_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
11282 
11283 #ifndef __ASSEMBLY__
11284 /*
11285  * WARNING: The C register and register group struct declarations are provided for
11286  * convenience and illustrative purposes. They should, however, be used with
11287  * caution as the C language standard provides no guarantees about the alignment or
11288  * atomicity of device memory accesses. The recommended practice for writing
11289  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
11290  * alt_write_word() functions.
11291  *
11292  * The struct declaration for register ALT_USB_GLOB_DIEPTXF13.
11293  */
11294 struct ALT_USB_GLOB_DIEPTXF13_s
11295 {
11296  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Address */
11297  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
11298  uint32_t : 2; /* *UNDEFINED* */
11299 };
11300 
11301 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF13. */
11302 typedef volatile struct ALT_USB_GLOB_DIEPTXF13_s ALT_USB_GLOB_DIEPTXF13_t;
11303 #endif /* __ASSEMBLY__ */
11304 
11305 /* The byte offset of the ALT_USB_GLOB_DIEPTXF13 register from the beginning of the component. */
11306 #define ALT_USB_GLOB_DIEPTXF13_OFST 0x134
11307 /* The address of the ALT_USB_GLOB_DIEPTXF13 register. */
11308 #define ALT_USB_GLOB_DIEPTXF13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF13_OFST))
11309 
11310 /*
11311  * Register : Device IN Endpoint Transmit FIFO Size Register 14 - dieptxf14
11312  *
11313  * This register holds the size and memory start address of IN endpoint TxFIFOs
11314  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
11315  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
11316  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
11317  *
11318  * Register Layout
11319  *
11320  * Bits | Access | Reset | Description
11321  * :--------|:-------|:-------|:---------------------------------------------
11322  * [15:0] | RW | 0xe000 | IN Endpoint FIFOn Transmit RAM Start Address
11323  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
11324  * [31:30] | ??? | 0x0 | *UNDEFINED*
11325  *
11326  */
11327 /*
11328  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
11329  *
11330  * This field contains the memory start address for IN endpoint Transmit FIFO 14.
11331  *
11332  * Field Access Macros:
11333  *
11334  */
11335 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR register field. */
11336 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR_LSB 0
11337 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR register field. */
11338 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR_MSB 15
11339 /* The width in bits of the ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR register field. */
11340 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR_WIDTH 16
11341 /* The mask used to set the ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR register field value. */
11342 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR_SET_MSK 0x0000ffff
11343 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR register field value. */
11344 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR_CLR_MSK 0xffff0000
11345 /* The reset value of the ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR register field. */
11346 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR_RESET 0xe000
11347 /* Extracts the ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR field value from a register. */
11348 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
11349 /* Produces a ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR register field value suitable for setting the register. */
11350 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
11351 
11352 /*
11353  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
11354  *
11355  * This value is in terms of 32-bit words.
11356  *
11357  * Minimum value is 16
11358  *
11359  * Maximum value is 8192.
11360  *
11361  * Field Access Macros:
11362  *
11363  */
11364 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP register field. */
11365 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP_LSB 16
11366 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP register field. */
11367 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP_MSB 29
11368 /* The width in bits of the ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP register field. */
11369 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP_WIDTH 14
11370 /* The mask used to set the ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP register field value. */
11371 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP_SET_MSK 0x3fff0000
11372 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP register field value. */
11373 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP_CLR_MSK 0xc000ffff
11374 /* The reset value of the ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP register field. */
11375 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP_RESET 0x2000
11376 /* Extracts the ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP field value from a register. */
11377 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
11378 /* Produces a ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP register field value suitable for setting the register. */
11379 #define ALT_USB_GLOB_DIEPTXF14_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
11380 
11381 #ifndef __ASSEMBLY__
11382 /*
11383  * WARNING: The C register and register group struct declarations are provided for
11384  * convenience and illustrative purposes. They should, however, be used with
11385  * caution as the C language standard provides no guarantees about the alignment or
11386  * atomicity of device memory accesses. The recommended practice for writing
11387  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
11388  * alt_write_word() functions.
11389  *
11390  * The struct declaration for register ALT_USB_GLOB_DIEPTXF14.
11391  */
11392 struct ALT_USB_GLOB_DIEPTXF14_s
11393 {
11394  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Address */
11395  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
11396  uint32_t : 2; /* *UNDEFINED* */
11397 };
11398 
11399 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF14. */
11400 typedef volatile struct ALT_USB_GLOB_DIEPTXF14_s ALT_USB_GLOB_DIEPTXF14_t;
11401 #endif /* __ASSEMBLY__ */
11402 
11403 /* The byte offset of the ALT_USB_GLOB_DIEPTXF14 register from the beginning of the component. */
11404 #define ALT_USB_GLOB_DIEPTXF14_OFST 0x138
11405 /* The address of the ALT_USB_GLOB_DIEPTXF14 register. */
11406 #define ALT_USB_GLOB_DIEPTXF14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF14_OFST))
11407 
11408 /*
11409  * Register : Device IN Endpoint Transmit FIFO Size Register 15 - dieptxf15
11410  *
11411  * This register holds the size and memory start address of IN endpoint TxFIFOs
11412  * implemented in Device mode. Each FIFO holds the data for one IN endpoint. This
11413  * register is repeated for each instantiated IN endpoint FIFO. For IN endpoint
11414  * FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
11415  *
11416  * Register Layout
11417  *
11418  * Bits | Access | Reset | Description
11419  * :--------|:-------|:-------|:---------------------------------------------
11420  * [15:0] | RW | 0x0 | IN Endpoint FIFOn Transmit RAM Start Address
11421  * [29:16] | RW | 0x2000 | IN Endpoint TxFIFO Depth
11422  * [31:30] | ??? | 0x0 | *UNDEFINED*
11423  *
11424  */
11425 /*
11426  * Field : IN Endpoint FIFOn Transmit RAM Start Address - inepntxfstaddr
11427  *
11428  * This field contains the memory start address for IN endpoint Transmit FIFO 15.
11429  *
11430  * Field Access Macros:
11431  *
11432  */
11433 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR register field. */
11434 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR_LSB 0
11435 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR register field. */
11436 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR_MSB 15
11437 /* The width in bits of the ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR register field. */
11438 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR_WIDTH 16
11439 /* The mask used to set the ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR register field value. */
11440 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR_SET_MSK 0x0000ffff
11441 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR register field value. */
11442 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR_CLR_MSK 0xffff0000
11443 /* The reset value of the ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR register field. */
11444 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR_RESET 0x0
11445 /* Extracts the ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR field value from a register. */
11446 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR_GET(value) (((value) & 0x0000ffff) >> 0)
11447 /* Produces a ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR register field value suitable for setting the register. */
11448 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFSTADDR_SET(value) (((value) << 0) & 0x0000ffff)
11449 
11450 /*
11451  * Field : IN Endpoint TxFIFO Depth - inepntxfdep
11452  *
11453  * This value is in terms of 32-bit words.
11454  *
11455  * Minimum value is 16
11456  *
11457  * Maximum value is 8192.
11458  *
11459  * Field Access Macros:
11460  *
11461  */
11462 /* The Least Significant Bit (LSB) position of the ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP register field. */
11463 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP_LSB 16
11464 /* The Most Significant Bit (MSB) position of the ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP register field. */
11465 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP_MSB 29
11466 /* The width in bits of the ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP register field. */
11467 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP_WIDTH 14
11468 /* The mask used to set the ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP register field value. */
11469 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP_SET_MSK 0x3fff0000
11470 /* The mask used to clear the ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP register field value. */
11471 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP_CLR_MSK 0xc000ffff
11472 /* The reset value of the ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP register field. */
11473 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP_RESET 0x2000
11474 /* Extracts the ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP field value from a register. */
11475 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP_GET(value) (((value) & 0x3fff0000) >> 16)
11476 /* Produces a ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP register field value suitable for setting the register. */
11477 #define ALT_USB_GLOB_DIEPTXF15_INEPNTXFDEP_SET(value) (((value) << 16) & 0x3fff0000)
11478 
11479 #ifndef __ASSEMBLY__
11480 /*
11481  * WARNING: The C register and register group struct declarations are provided for
11482  * convenience and illustrative purposes. They should, however, be used with
11483  * caution as the C language standard provides no guarantees about the alignment or
11484  * atomicity of device memory accesses. The recommended practice for writing
11485  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
11486  * alt_write_word() functions.
11487  *
11488  * The struct declaration for register ALT_USB_GLOB_DIEPTXF15.
11489  */
11490 struct ALT_USB_GLOB_DIEPTXF15_s
11491 {
11492  uint32_t inepntxfstaddr : 16; /* IN Endpoint FIFOn Transmit RAM Start Address */
11493  uint32_t inepntxfdep : 14; /* IN Endpoint TxFIFO Depth */
11494  uint32_t : 2; /* *UNDEFINED* */
11495 };
11496 
11497 /* The typedef declaration for register ALT_USB_GLOB_DIEPTXF15. */
11498 typedef volatile struct ALT_USB_GLOB_DIEPTXF15_s ALT_USB_GLOB_DIEPTXF15_t;
11499 #endif /* __ASSEMBLY__ */
11500 
11501 /* The byte offset of the ALT_USB_GLOB_DIEPTXF15 register from the beginning of the component. */
11502 #define ALT_USB_GLOB_DIEPTXF15_OFST 0x13c
11503 /* The address of the ALT_USB_GLOB_DIEPTXF15 register. */
11504 #define ALT_USB_GLOB_DIEPTXF15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_DIEPTXF15_OFST))
11505 
11506 #ifndef __ASSEMBLY__
11507 /*
11508  * WARNING: The C register and register group struct declarations are provided for
11509  * convenience and illustrative purposes. They should, however, be used with
11510  * caution as the C language standard provides no guarantees about the alignment or
11511  * atomicity of device memory accesses. The recommended practice for writing
11512  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
11513  * alt_write_word() functions.
11514  *
11515  * The struct declaration for register group ALT_USB_GLOB.
11516  */
11517 struct ALT_USB_GLOB_s
11518 {
11519  ALT_USB_GLOB_GOTGCTL_t gotgctl; /* ALT_USB_GLOB_GOTGCTL */
11520  ALT_USB_GLOB_GOTGINT_t gotgint; /* ALT_USB_GLOB_GOTGINT */
11521  ALT_USB_GLOB_GAHBCFG_t gahbcfg; /* ALT_USB_GLOB_GAHBCFG */
11522  ALT_USB_GLOB_GUSBCFG_t gusbcfg; /* ALT_USB_GLOB_GUSBCFG */
11523  ALT_USB_GLOB_GRSTCTL_t grstctl; /* ALT_USB_GLOB_GRSTCTL */
11524  ALT_USB_GLOB_GINTSTS_t gintsts; /* ALT_USB_GLOB_GINTSTS */
11525  ALT_USB_GLOB_GINTMSK_t gintmsk; /* ALT_USB_GLOB_GINTMSK */
11526  ALT_USB_GLOB_GRXSTSR_t grxstsr; /* ALT_USB_GLOB_GRXSTSR */
11527  ALT_USB_GLOB_GRXSTSP_t grxstsp; /* ALT_USB_GLOB_GRXSTSP */
11528  ALT_USB_GLOB_GRXFSIZ_t grxfsiz; /* ALT_USB_GLOB_GRXFSIZ */
11529  ALT_USB_GLOB_GNPTXFSIZ_t gnptxfsiz; /* ALT_USB_GLOB_GNPTXFSIZ */
11530  ALT_USB_GLOB_GNPTXSTS_t gnptxsts; /* ALT_USB_GLOB_GNPTXSTS */
11531  volatile uint32_t _pad_0x30_0x33; /* *UNDEFINED* */
11532  ALT_USB_GLOB_GPVNDCTL_t gpvndctl; /* ALT_USB_GLOB_GPVNDCTL */
11533  ALT_USB_GLOB_GGPIO_t ggpio; /* ALT_USB_GLOB_GGPIO */
11534  ALT_USB_GLOB_GUID_t guid; /* ALT_USB_GLOB_GUID */
11535  ALT_USB_GLOB_GSNPSID_t gsnpsid; /* ALT_USB_GLOB_GSNPSID */
11536  ALT_USB_GLOB_GHWCFG1_t ghwcfg1; /* ALT_USB_GLOB_GHWCFG1 */
11537  ALT_USB_GLOB_GHWCFG2_t ghwcfg2; /* ALT_USB_GLOB_GHWCFG2 */
11538  ALT_USB_GLOB_GHWCFG3_t ghwcfg3; /* ALT_USB_GLOB_GHWCFG3 */
11539  ALT_USB_GLOB_GHWCFG4_t ghwcfg4; /* ALT_USB_GLOB_GHWCFG4 */
11540  volatile uint32_t _pad_0x54_0x5b[2]; /* *UNDEFINED* */
11541  ALT_USB_GLOB_GDFIFOCFG_t gdfifocfg; /* ALT_USB_GLOB_GDFIFOCFG */
11542  volatile uint32_t _pad_0x60_0xff[40]; /* *UNDEFINED* */
11543  ALT_USB_GLOB_HPTXFSIZ_t hptxfsiz; /* ALT_USB_GLOB_HPTXFSIZ */
11544  ALT_USB_GLOB_DIEPTXF1_t dieptxf1; /* ALT_USB_GLOB_DIEPTXF1 */
11545  ALT_USB_GLOB_DIEPTXF2_t dieptxf2; /* ALT_USB_GLOB_DIEPTXF2 */
11546  ALT_USB_GLOB_DIEPTXF3_t dieptxf3; /* ALT_USB_GLOB_DIEPTXF3 */
11547  ALT_USB_GLOB_DIEPTXF4_t dieptxf4; /* ALT_USB_GLOB_DIEPTXF4 */
11548  ALT_USB_GLOB_DIEPTXF5_t dieptxf5; /* ALT_USB_GLOB_DIEPTXF5 */
11549  ALT_USB_GLOB_DIEPTXF6_t dieptxf6; /* ALT_USB_GLOB_DIEPTXF6 */
11550  ALT_USB_GLOB_DIEPTXF7_t dieptxf7; /* ALT_USB_GLOB_DIEPTXF7 */
11551  ALT_USB_GLOB_DIEPTXF8_t dieptxf8; /* ALT_USB_GLOB_DIEPTXF8 */
11552  ALT_USB_GLOB_DIEPTXF9_t dieptxf9; /* ALT_USB_GLOB_DIEPTXF9 */
11553  ALT_USB_GLOB_DIEPTXF10_t dieptxf10; /* ALT_USB_GLOB_DIEPTXF10 */
11554  ALT_USB_GLOB_DIEPTXF11_t dieptxf11; /* ALT_USB_GLOB_DIEPTXF11 */
11555  ALT_USB_GLOB_DIEPTXF12_t dieptxf12; /* ALT_USB_GLOB_DIEPTXF12 */
11556  ALT_USB_GLOB_DIEPTXF13_t dieptxf13; /* ALT_USB_GLOB_DIEPTXF13 */
11557  ALT_USB_GLOB_DIEPTXF14_t dieptxf14; /* ALT_USB_GLOB_DIEPTXF14 */
11558  ALT_USB_GLOB_DIEPTXF15_t dieptxf15; /* ALT_USB_GLOB_DIEPTXF15 */
11559 };
11560 
11561 /* The typedef declaration for register group ALT_USB_GLOB. */
11562 typedef volatile struct ALT_USB_GLOB_s ALT_USB_GLOB_t;
11563 /* The struct declaration for the raw register contents of register group ALT_USB_GLOB. */
11564 struct ALT_USB_GLOB_raw_s
11565 {
11566  volatile uint32_t gotgctl; /* ALT_USB_GLOB_GOTGCTL */
11567  volatile uint32_t gotgint; /* ALT_USB_GLOB_GOTGINT */
11568  volatile uint32_t gahbcfg; /* ALT_USB_GLOB_GAHBCFG */
11569  volatile uint32_t gusbcfg; /* ALT_USB_GLOB_GUSBCFG */
11570  volatile uint32_t grstctl; /* ALT_USB_GLOB_GRSTCTL */
11571  volatile uint32_t gintsts; /* ALT_USB_GLOB_GINTSTS */
11572  volatile uint32_t gintmsk; /* ALT_USB_GLOB_GINTMSK */
11573  volatile uint32_t grxstsr; /* ALT_USB_GLOB_GRXSTSR */
11574  volatile uint32_t grxstsp; /* ALT_USB_GLOB_GRXSTSP */
11575  volatile uint32_t grxfsiz; /* ALT_USB_GLOB_GRXFSIZ */
11576  volatile uint32_t gnptxfsiz; /* ALT_USB_GLOB_GNPTXFSIZ */
11577  volatile uint32_t gnptxsts; /* ALT_USB_GLOB_GNPTXSTS */
11578  uint32_t _pad_0x30_0x33; /* *UNDEFINED* */
11579  volatile uint32_t gpvndctl; /* ALT_USB_GLOB_GPVNDCTL */
11580  volatile uint32_t ggpio; /* ALT_USB_GLOB_GGPIO */
11581  volatile uint32_t guid; /* ALT_USB_GLOB_GUID */
11582  volatile uint32_t gsnpsid; /* ALT_USB_GLOB_GSNPSID */
11583  volatile uint32_t ghwcfg1; /* ALT_USB_GLOB_GHWCFG1 */
11584  volatile uint32_t ghwcfg2; /* ALT_USB_GLOB_GHWCFG2 */
11585  volatile uint32_t ghwcfg3; /* ALT_USB_GLOB_GHWCFG3 */
11586  volatile uint32_t ghwcfg4; /* ALT_USB_GLOB_GHWCFG4 */
11587  uint32_t _pad_0x54_0x5b[2]; /* *UNDEFINED* */
11588  volatile uint32_t gdfifocfg; /* ALT_USB_GLOB_GDFIFOCFG */
11589  uint32_t _pad_0x60_0xff[40]; /* *UNDEFINED* */
11590  volatile uint32_t hptxfsiz; /* ALT_USB_GLOB_HPTXFSIZ */
11591  volatile uint32_t dieptxf1; /* ALT_USB_GLOB_DIEPTXF1 */
11592  volatile uint32_t dieptxf2; /* ALT_USB_GLOB_DIEPTXF2 */
11593  volatile uint32_t dieptxf3; /* ALT_USB_GLOB_DIEPTXF3 */
11594  volatile uint32_t dieptxf4; /* ALT_USB_GLOB_DIEPTXF4 */
11595  volatile uint32_t dieptxf5; /* ALT_USB_GLOB_DIEPTXF5 */
11596  volatile uint32_t dieptxf6; /* ALT_USB_GLOB_DIEPTXF6 */
11597  volatile uint32_t dieptxf7; /* ALT_USB_GLOB_DIEPTXF7 */
11598  volatile uint32_t dieptxf8; /* ALT_USB_GLOB_DIEPTXF8 */
11599  volatile uint32_t dieptxf9; /* ALT_USB_GLOB_DIEPTXF9 */
11600  volatile uint32_t dieptxf10; /* ALT_USB_GLOB_DIEPTXF10 */
11601  volatile uint32_t dieptxf11; /* ALT_USB_GLOB_DIEPTXF11 */
11602  volatile uint32_t dieptxf12; /* ALT_USB_GLOB_DIEPTXF12 */
11603  volatile uint32_t dieptxf13; /* ALT_USB_GLOB_DIEPTXF13 */
11604  volatile uint32_t dieptxf14; /* ALT_USB_GLOB_DIEPTXF14 */
11605  volatile uint32_t dieptxf15; /* ALT_USB_GLOB_DIEPTXF15 */
11606 };
11607 
11608 /* The typedef declaration for the raw register contents of register group ALT_USB_GLOB. */
11609 typedef volatile struct ALT_USB_GLOB_raw_s ALT_USB_GLOB_raw_t;
11610 #endif /* __ASSEMBLY__ */
11611 
11612 
11613 /*
11614  * Register Group : Host Mode Registers - ALT_USB_HOST
11615  * Host Mode Registers
11616  *
11617  * These registers must be programmed every time the USB OTG Controller changes to
11618  * Host mode.
11619  *
11620  */
11621 /*
11622  * Register : Host Configuration Register - hcfg
11623  *
11624  * Host Mode control. This register must be programmed every time the core changes
11625  * to Host mode
11626  *
11627  * Register Layout
11628  *
11629  * Bits | Access | Reset | Description
11630  * :--------|:-------|:------|:---------------------------------------
11631  * [1:0] | RW | 0x0 | FS LS PHY Clock Select
11632  * [2] | RW | 0x0 | FS- and LS-Only Suppor
11633  * [6:3] | ??? | 0x0 | *UNDEFINED*
11634  * [7] | RW | 0x0 | Enable 32 KHz Suspend mode
11635  * [15:8] | RW | 0x2 | Resume Validation Period
11636  * [22:16] | ??? | 0x0 | *UNDEFINED*
11637  * [23] | RW | 0x0 | Enable Scatter Gather DMA in Host mode
11638  * [25:24] | RW | 0x0 | Frame List Entries
11639  * [26] | RW | 0x0 | Enable Periodic Scheduling
11640  * [30:27] | ??? | 0x0 | *UNDEFINED*
11641  * [31] | RW | 0x0 | Mode Change Ready Timer Enable
11642  *
11643  */
11644 /*
11645  * Field : FS LS PHY Clock Select - fslspclksel
11646  *
11647  * When the core is in FS Host mode. The internal PHY clock is running at 30/60 MHZ
11648  * for ULPI PHY Interfaces. The internal PHY clock is running at 48MHZ for 1.1 FS
11649  * transceiver Interface When the core is in LS Host mode, the internal PHY clock
11650  * is running at 30/60 MHZ for ULPI PHY Interfaces. The internal PHY clock is
11651  * running at 6 MHZ and the external clock is running at 48MHZ. When you select a 6
11652  * MHz clock during LS Mode, you must do a soft reset for 1.1 FS transceiver
11653  * Interface. * When Core in FS mode, the internal and external clocks have the
11654  * same frequency.
11655  *
11656  * * When Core in LS mode,
11657  *
11658  * - If fslspclksel is 30/60 Mhz internal and external clocks have the same
11659  * frequency.
11660  *
11661  * - If fslspclksel is 6Mhz the internal clock is divided by eight of external
11662  * 48 MHz clock (utmifs_clk).
11663  *
11664  * Field Enumeration Values:
11665  *
11666  * Enum | Value | Description
11667  * :----------------------------------------|:------|:----------------------------------
11668  * ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK3060 | 0x0 | PHY clock is running at 30/60 MHz
11669  * ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK48 | 0x1 | PHY clock is running at 48 MHz
11670  * ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK6 | 0x2 | PHY clock is running at 6 MHz
11671  *
11672  * Field Access Macros:
11673  *
11674  */
11675 /*
11676  * Enumerated value for register field ALT_USB_HOST_HCFG_FSLSPCLKSEL
11677  *
11678  * PHY clock is running at 30/60 MHz
11679  */
11680 #define ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK3060 0x0
11681 /*
11682  * Enumerated value for register field ALT_USB_HOST_HCFG_FSLSPCLKSEL
11683  *
11684  * PHY clock is running at 48 MHz
11685  */
11686 #define ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK48 0x1
11687 /*
11688  * Enumerated value for register field ALT_USB_HOST_HCFG_FSLSPCLKSEL
11689  *
11690  * PHY clock is running at 6 MHz
11691  */
11692 #define ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK6 0x2
11693 
11694 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field. */
11695 #define ALT_USB_HOST_HCFG_FSLSPCLKSEL_LSB 0
11696 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field. */
11697 #define ALT_USB_HOST_HCFG_FSLSPCLKSEL_MSB 1
11698 /* The width in bits of the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field. */
11699 #define ALT_USB_HOST_HCFG_FSLSPCLKSEL_WIDTH 2
11700 /* The mask used to set the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field value. */
11701 #define ALT_USB_HOST_HCFG_FSLSPCLKSEL_SET_MSK 0x00000003
11702 /* The mask used to clear the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field value. */
11703 #define ALT_USB_HOST_HCFG_FSLSPCLKSEL_CLR_MSK 0xfffffffc
11704 /* The reset value of the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field. */
11705 #define ALT_USB_HOST_HCFG_FSLSPCLKSEL_RESET 0x0
11706 /* Extracts the ALT_USB_HOST_HCFG_FSLSPCLKSEL field value from a register. */
11707 #define ALT_USB_HOST_HCFG_FSLSPCLKSEL_GET(value) (((value) & 0x00000003) >> 0)
11708 /* Produces a ALT_USB_HOST_HCFG_FSLSPCLKSEL register field value suitable for setting the register. */
11709 #define ALT_USB_HOST_HCFG_FSLSPCLKSEL_SET(value) (((value) << 0) & 0x00000003)
11710 
11711 /*
11712  * Field : FS- and LS-Only Suppor - fslssupp
11713  *
11714  * The application uses this bit to control the core's enumeration speed. Using
11715  * this bit, the application can make the core enumerate as a FS host, even If the
11716  * connected device supports HS traffic. Do not make changes to this field after
11717  * initial programming.
11718  *
11719  * Field Enumeration Values:
11720  *
11721  * Enum | Value | Description
11722  * :------------------------------------|:------|:-----------------------------------------------
11723  * ALT_USB_HOST_HCFG_FSLSSUPP_E_HSFSLS | 0x0 | HS/FS/LS, based on the maximum speed supported
11724  * : | | by the connected device
11725  * ALT_USB_HOST_HCFG_FSLSSUPP_E_FSLS | 0x1 | FS/LS-only, even if the connected device can
11726  * : | | support HS
11727  *
11728  * Field Access Macros:
11729  *
11730  */
11731 /*
11732  * Enumerated value for register field ALT_USB_HOST_HCFG_FSLSSUPP
11733  *
11734  * HS/FS/LS, based on the maximum speed supported by the connected device
11735  */
11736 #define ALT_USB_HOST_HCFG_FSLSSUPP_E_HSFSLS 0x0
11737 /*
11738  * Enumerated value for register field ALT_USB_HOST_HCFG_FSLSSUPP
11739  *
11740  * FS/LS-only, even if the connected device can support HS
11741  */
11742 #define ALT_USB_HOST_HCFG_FSLSSUPP_E_FSLS 0x1
11743 
11744 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_FSLSSUPP register field. */
11745 #define ALT_USB_HOST_HCFG_FSLSSUPP_LSB 2
11746 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_FSLSSUPP register field. */
11747 #define ALT_USB_HOST_HCFG_FSLSSUPP_MSB 2
11748 /* The width in bits of the ALT_USB_HOST_HCFG_FSLSSUPP register field. */
11749 #define ALT_USB_HOST_HCFG_FSLSSUPP_WIDTH 1
11750 /* The mask used to set the ALT_USB_HOST_HCFG_FSLSSUPP register field value. */
11751 #define ALT_USB_HOST_HCFG_FSLSSUPP_SET_MSK 0x00000004
11752 /* The mask used to clear the ALT_USB_HOST_HCFG_FSLSSUPP register field value. */
11753 #define ALT_USB_HOST_HCFG_FSLSSUPP_CLR_MSK 0xfffffffb
11754 /* The reset value of the ALT_USB_HOST_HCFG_FSLSSUPP register field. */
11755 #define ALT_USB_HOST_HCFG_FSLSSUPP_RESET 0x0
11756 /* Extracts the ALT_USB_HOST_HCFG_FSLSSUPP field value from a register. */
11757 #define ALT_USB_HOST_HCFG_FSLSSUPP_GET(value) (((value) & 0x00000004) >> 2)
11758 /* Produces a ALT_USB_HOST_HCFG_FSLSSUPP register field value suitable for setting the register. */
11759 #define ALT_USB_HOST_HCFG_FSLSSUPP_SET(value) (((value) << 2) & 0x00000004)
11760 
11761 /*
11762  * Field : Enable 32 KHz Suspend mode - ena32khzs
11763  *
11764  * This bit can only be set if the USB 1.1 Full-Speed Serial Transceiver Interface
11765  * has been selected. If USB 1.1 Full-Speed Serial Transceiver Interface has not
11766  * been selected, this bit must be zero. When the USB 1.1 Full-Speed Serial
11767  * Transceiver Interface is chosen and this bit is set, the core expects the 48-MHz
11768  * PHY clock to be switched to 32 KHz during a suspend.
11769  *
11770  * Field Enumeration Values:
11771  *
11772  * Enum | Value | Description
11773  * :-----------------------------------|:------|:------------------------------------------------
11774  * ALT_USB_HOST_HCFG_ENA32KHZS_E_DISD | 0x0 | USB 1.1 Full-Speed Not Selected
11775  * ALT_USB_HOST_HCFG_ENA32KHZS_E_END | 0x1 | USB 1.1 Full-Speed Serial Transceiver Interface
11776  * : | | selected
11777  *
11778  * Field Access Macros:
11779  *
11780  */
11781 /*
11782  * Enumerated value for register field ALT_USB_HOST_HCFG_ENA32KHZS
11783  *
11784  * USB 1.1 Full-Speed Not Selected
11785  */
11786 #define ALT_USB_HOST_HCFG_ENA32KHZS_E_DISD 0x0
11787 /*
11788  * Enumerated value for register field ALT_USB_HOST_HCFG_ENA32KHZS
11789  *
11790  * USB 1.1 Full-Speed Serial Transceiver Interface selected
11791  */
11792 #define ALT_USB_HOST_HCFG_ENA32KHZS_E_END 0x1
11793 
11794 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_ENA32KHZS register field. */
11795 #define ALT_USB_HOST_HCFG_ENA32KHZS_LSB 7
11796 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_ENA32KHZS register field. */
11797 #define ALT_USB_HOST_HCFG_ENA32KHZS_MSB 7
11798 /* The width in bits of the ALT_USB_HOST_HCFG_ENA32KHZS register field. */
11799 #define ALT_USB_HOST_HCFG_ENA32KHZS_WIDTH 1
11800 /* The mask used to set the ALT_USB_HOST_HCFG_ENA32KHZS register field value. */
11801 #define ALT_USB_HOST_HCFG_ENA32KHZS_SET_MSK 0x00000080
11802 /* The mask used to clear the ALT_USB_HOST_HCFG_ENA32KHZS register field value. */
11803 #define ALT_USB_HOST_HCFG_ENA32KHZS_CLR_MSK 0xffffff7f
11804 /* The reset value of the ALT_USB_HOST_HCFG_ENA32KHZS register field. */
11805 #define ALT_USB_HOST_HCFG_ENA32KHZS_RESET 0x0
11806 /* Extracts the ALT_USB_HOST_HCFG_ENA32KHZS field value from a register. */
11807 #define ALT_USB_HOST_HCFG_ENA32KHZS_GET(value) (((value) & 0x00000080) >> 7)
11808 /* Produces a ALT_USB_HOST_HCFG_ENA32KHZS register field value suitable for setting the register. */
11809 #define ALT_USB_HOST_HCFG_ENA32KHZS_SET(value) (((value) << 7) & 0x00000080)
11810 
11811 /*
11812  * Field : Resume Validation Period - resvalid
11813  *
11814  * This field is effective only when HCFG.Ena32KHzS is set. It will control the
11815  * resume period when the core resumes from suspend. The core counts for ResValid
11816  * number of clock cycles to detect a valid resume when this is set.
11817  *
11818  * Field Access Macros:
11819  *
11820  */
11821 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_RESVALID register field. */
11822 #define ALT_USB_HOST_HCFG_RESVALID_LSB 8
11823 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_RESVALID register field. */
11824 #define ALT_USB_HOST_HCFG_RESVALID_MSB 15
11825 /* The width in bits of the ALT_USB_HOST_HCFG_RESVALID register field. */
11826 #define ALT_USB_HOST_HCFG_RESVALID_WIDTH 8
11827 /* The mask used to set the ALT_USB_HOST_HCFG_RESVALID register field value. */
11828 #define ALT_USB_HOST_HCFG_RESVALID_SET_MSK 0x0000ff00
11829 /* The mask used to clear the ALT_USB_HOST_HCFG_RESVALID register field value. */
11830 #define ALT_USB_HOST_HCFG_RESVALID_CLR_MSK 0xffff00ff
11831 /* The reset value of the ALT_USB_HOST_HCFG_RESVALID register field. */
11832 #define ALT_USB_HOST_HCFG_RESVALID_RESET 0x2
11833 /* Extracts the ALT_USB_HOST_HCFG_RESVALID field value from a register. */
11834 #define ALT_USB_HOST_HCFG_RESVALID_GET(value) (((value) & 0x0000ff00) >> 8)
11835 /* Produces a ALT_USB_HOST_HCFG_RESVALID register field value suitable for setting the register. */
11836 #define ALT_USB_HOST_HCFG_RESVALID_SET(value) (((value) << 8) & 0x0000ff00)
11837 
11838 /*
11839  * Field : Enable Scatter Gather DMA in Host mode - descdma
11840  *
11841  * The application can set this bit during initialization to enable the
11842  * Scatter/Gather DMA operation. This bit must be modified only once after a reset.
11843  * The following combinations are available for programming:
11844  *
11845  * GAHBCFG.DMAEn=0,HCFG.DescDMA=0 => Slave mode GAHBCFG.DMAEn=0,HCFG.DescDMA=1 =>
11846  * InvalidGAHBCFG.DMAEn=1,HCFG.DescDMA=0 => Buffered DMA mode
11847  * GAHBCFG.DMAEn=1,HCFG.DescDMA=1 => Scatter/Gather DMA mode
11848  *
11849  * Field Enumeration Values:
11850  *
11851  * Enum | Value | Description
11852  * :---------------------------------|:------|:----------------------------
11853  * ALT_USB_HOST_HCFG_DESCDMA_E_DISD | 0x0 | No Scatter/Gather DMA
11854  * ALT_USB_HOST_HCFG_DESCDMA_E_END | 0x1 | Scatter/Gather DMA selected
11855  *
11856  * Field Access Macros:
11857  *
11858  */
11859 /*
11860  * Enumerated value for register field ALT_USB_HOST_HCFG_DESCDMA
11861  *
11862  * No Scatter/Gather DMA
11863  */
11864 #define ALT_USB_HOST_HCFG_DESCDMA_E_DISD 0x0
11865 /*
11866  * Enumerated value for register field ALT_USB_HOST_HCFG_DESCDMA
11867  *
11868  * Scatter/Gather DMA selected
11869  */
11870 #define ALT_USB_HOST_HCFG_DESCDMA_E_END 0x1
11871 
11872 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_DESCDMA register field. */
11873 #define ALT_USB_HOST_HCFG_DESCDMA_LSB 23
11874 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_DESCDMA register field. */
11875 #define ALT_USB_HOST_HCFG_DESCDMA_MSB 23
11876 /* The width in bits of the ALT_USB_HOST_HCFG_DESCDMA register field. */
11877 #define ALT_USB_HOST_HCFG_DESCDMA_WIDTH 1
11878 /* The mask used to set the ALT_USB_HOST_HCFG_DESCDMA register field value. */
11879 #define ALT_USB_HOST_HCFG_DESCDMA_SET_MSK 0x00800000
11880 /* The mask used to clear the ALT_USB_HOST_HCFG_DESCDMA register field value. */
11881 #define ALT_USB_HOST_HCFG_DESCDMA_CLR_MSK 0xff7fffff
11882 /* The reset value of the ALT_USB_HOST_HCFG_DESCDMA register field. */
11883 #define ALT_USB_HOST_HCFG_DESCDMA_RESET 0x0
11884 /* Extracts the ALT_USB_HOST_HCFG_DESCDMA field value from a register. */
11885 #define ALT_USB_HOST_HCFG_DESCDMA_GET(value) (((value) & 0x00800000) >> 23)
11886 /* Produces a ALT_USB_HOST_HCFG_DESCDMA register field value suitable for setting the register. */
11887 #define ALT_USB_HOST_HCFG_DESCDMA_SET(value) (((value) << 23) & 0x00800000)
11888 
11889 /*
11890  * Field : Frame List Entries - frlisten
11891  *
11892  * The value in the register specifies the number of entries in the Frame list.
11893  * This field is valid only in Scatter/Gather DMA mode.
11894  *
11895  * Field Enumeration Values:
11896  *
11897  * Enum | Value | Description
11898  * :-------------------------------------|:------|:------------
11899  * ALT_USB_HOST_HCFG_FRLISTEN_E_RSVD | 0x0 | Reserved
11900  * ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY8 | 0x1 | 8 Entries
11901  * ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY16 | 0x2 | 16 Entries
11902  * ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY32 | 0x3 | 32 Entries
11903  *
11904  * Field Access Macros:
11905  *
11906  */
11907 /*
11908  * Enumerated value for register field ALT_USB_HOST_HCFG_FRLISTEN
11909  *
11910  * Reserved
11911  */
11912 #define ALT_USB_HOST_HCFG_FRLISTEN_E_RSVD 0x0
11913 /*
11914  * Enumerated value for register field ALT_USB_HOST_HCFG_FRLISTEN
11915  *
11916  * 8 Entries
11917  */
11918 #define ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY8 0x1
11919 /*
11920  * Enumerated value for register field ALT_USB_HOST_HCFG_FRLISTEN
11921  *
11922  * 16 Entries
11923  */
11924 #define ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY16 0x2
11925 /*
11926  * Enumerated value for register field ALT_USB_HOST_HCFG_FRLISTEN
11927  *
11928  * 32 Entries
11929  */
11930 #define ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY32 0x3
11931 
11932 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_FRLISTEN register field. */
11933 #define ALT_USB_HOST_HCFG_FRLISTEN_LSB 24
11934 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_FRLISTEN register field. */
11935 #define ALT_USB_HOST_HCFG_FRLISTEN_MSB 25
11936 /* The width in bits of the ALT_USB_HOST_HCFG_FRLISTEN register field. */
11937 #define ALT_USB_HOST_HCFG_FRLISTEN_WIDTH 2
11938 /* The mask used to set the ALT_USB_HOST_HCFG_FRLISTEN register field value. */
11939 #define ALT_USB_HOST_HCFG_FRLISTEN_SET_MSK 0x03000000
11940 /* The mask used to clear the ALT_USB_HOST_HCFG_FRLISTEN register field value. */
11941 #define ALT_USB_HOST_HCFG_FRLISTEN_CLR_MSK 0xfcffffff
11942 /* The reset value of the ALT_USB_HOST_HCFG_FRLISTEN register field. */
11943 #define ALT_USB_HOST_HCFG_FRLISTEN_RESET 0x0
11944 /* Extracts the ALT_USB_HOST_HCFG_FRLISTEN field value from a register. */
11945 #define ALT_USB_HOST_HCFG_FRLISTEN_GET(value) (((value) & 0x03000000) >> 24)
11946 /* Produces a ALT_USB_HOST_HCFG_FRLISTEN register field value suitable for setting the register. */
11947 #define ALT_USB_HOST_HCFG_FRLISTEN_SET(value) (((value) << 24) & 0x03000000)
11948 
11949 /*
11950  * Field : Enable Periodic Scheduling - perschedena
11951  *
11952  * Applicable in Scatter/Gather DMA mode only. Enables periodic scheduling within
11953  * the core. Initially, the bit is reset. The core will not process any periodic
11954  * channels. As soon as this bit is set, the core will get ready to start
11955  * scheduling periodic channels. In non Scatter/Gather DMA mode, this bit is
11956  * reserved.
11957  *
11958  * Field Enumeration Values:
11959  *
11960  * Enum | Value | Description
11961  * :-------------------------------------|:------|:---------------------------------------------
11962  * ALT_USB_HOST_HCFG_PERSCHEDENA_E_DISD | 0x0 | Disables periodic scheduling within the core
11963  * ALT_USB_HOST_HCFG_PERSCHEDENA_E_END | 0x1 | Enables periodic scheduling within the core
11964  *
11965  * Field Access Macros:
11966  *
11967  */
11968 /*
11969  * Enumerated value for register field ALT_USB_HOST_HCFG_PERSCHEDENA
11970  *
11971  * Disables periodic scheduling within the core
11972  */
11973 #define ALT_USB_HOST_HCFG_PERSCHEDENA_E_DISD 0x0
11974 /*
11975  * Enumerated value for register field ALT_USB_HOST_HCFG_PERSCHEDENA
11976  *
11977  * Enables periodic scheduling within the core
11978  */
11979 #define ALT_USB_HOST_HCFG_PERSCHEDENA_E_END 0x1
11980 
11981 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_PERSCHEDENA register field. */
11982 #define ALT_USB_HOST_HCFG_PERSCHEDENA_LSB 26
11983 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_PERSCHEDENA register field. */
11984 #define ALT_USB_HOST_HCFG_PERSCHEDENA_MSB 26
11985 /* The width in bits of the ALT_USB_HOST_HCFG_PERSCHEDENA register field. */
11986 #define ALT_USB_HOST_HCFG_PERSCHEDENA_WIDTH 1
11987 /* The mask used to set the ALT_USB_HOST_HCFG_PERSCHEDENA register field value. */
11988 #define ALT_USB_HOST_HCFG_PERSCHEDENA_SET_MSK 0x04000000
11989 /* The mask used to clear the ALT_USB_HOST_HCFG_PERSCHEDENA register field value. */
11990 #define ALT_USB_HOST_HCFG_PERSCHEDENA_CLR_MSK 0xfbffffff
11991 /* The reset value of the ALT_USB_HOST_HCFG_PERSCHEDENA register field. */
11992 #define ALT_USB_HOST_HCFG_PERSCHEDENA_RESET 0x0
11993 /* Extracts the ALT_USB_HOST_HCFG_PERSCHEDENA field value from a register. */
11994 #define ALT_USB_HOST_HCFG_PERSCHEDENA_GET(value) (((value) & 0x04000000) >> 26)
11995 /* Produces a ALT_USB_HOST_HCFG_PERSCHEDENA register field value suitable for setting the register. */
11996 #define ALT_USB_HOST_HCFG_PERSCHEDENA_SET(value) (((value) << 26) & 0x04000000)
11997 
11998 /*
11999  * Field : Mode Change Ready Timer Enable - modechtimen
12000  *
12001  * This bit is used to enable or disable the host core to wait for 200 PHY clock
12002  * cycles at the end of Resume to change the opmode signal to the PHY to 00 after
12003  * Suspend or LPM.
12004  *
12005  * Field Enumeration Values:
12006  *
12007  * Enum | Value | Description
12008  * :------------------------------------|:------|:------------------------------------------------
12009  * ALT_USB_HOST_HCFG_MODCHTIMEN_E_END | 0x0 | The Host core waits for either 200 PHY clock
12010  * : | | cycles or a linestate of SE0 at the end of
12011  * : | | resume to change the opmode from 0x2 to 0x0
12012  * ALT_USB_HOST_HCFG_MODCHTIMEN_E_DISD | 0x1 | The Host core waits only for a linestate of SE0
12013  * : | | at the end of resume to change the opmode from
12014  * : | | 0x2 to 0x0
12015  *
12016  * Field Access Macros:
12017  *
12018  */
12019 /*
12020  * Enumerated value for register field ALT_USB_HOST_HCFG_MODCHTIMEN
12021  *
12022  * The Host core waits for either 200 PHY clock cycles or a linestate of SE0 at the
12023  * end of resume to change the opmode from 0x2 to 0x0
12024  */
12025 #define ALT_USB_HOST_HCFG_MODCHTIMEN_E_END 0x0
12026 /*
12027  * Enumerated value for register field ALT_USB_HOST_HCFG_MODCHTIMEN
12028  *
12029  * The Host core waits only for a linestate of SE0 at the end of resume to change
12030  * the opmode from 0x2 to 0x0
12031  */
12032 #define ALT_USB_HOST_HCFG_MODCHTIMEN_E_DISD 0x1
12033 
12034 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_MODCHTIMEN register field. */
12035 #define ALT_USB_HOST_HCFG_MODCHTIMEN_LSB 31
12036 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_MODCHTIMEN register field. */
12037 #define ALT_USB_HOST_HCFG_MODCHTIMEN_MSB 31
12038 /* The width in bits of the ALT_USB_HOST_HCFG_MODCHTIMEN register field. */
12039 #define ALT_USB_HOST_HCFG_MODCHTIMEN_WIDTH 1
12040 /* The mask used to set the ALT_USB_HOST_HCFG_MODCHTIMEN register field value. */
12041 #define ALT_USB_HOST_HCFG_MODCHTIMEN_SET_MSK 0x80000000
12042 /* The mask used to clear the ALT_USB_HOST_HCFG_MODCHTIMEN register field value. */
12043 #define ALT_USB_HOST_HCFG_MODCHTIMEN_CLR_MSK 0x7fffffff
12044 /* The reset value of the ALT_USB_HOST_HCFG_MODCHTIMEN register field. */
12045 #define ALT_USB_HOST_HCFG_MODCHTIMEN_RESET 0x0
12046 /* Extracts the ALT_USB_HOST_HCFG_MODCHTIMEN field value from a register. */
12047 #define ALT_USB_HOST_HCFG_MODCHTIMEN_GET(value) (((value) & 0x80000000) >> 31)
12048 /* Produces a ALT_USB_HOST_HCFG_MODCHTIMEN register field value suitable for setting the register. */
12049 #define ALT_USB_HOST_HCFG_MODCHTIMEN_SET(value) (((value) << 31) & 0x80000000)
12050 
12051 #ifndef __ASSEMBLY__
12052 /*
12053  * WARNING: The C register and register group struct declarations are provided for
12054  * convenience and illustrative purposes. They should, however, be used with
12055  * caution as the C language standard provides no guarantees about the alignment or
12056  * atomicity of device memory accesses. The recommended practice for writing
12057  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
12058  * alt_write_word() functions.
12059  *
12060  * The struct declaration for register ALT_USB_HOST_HCFG.
12061  */
12062 struct ALT_USB_HOST_HCFG_s
12063 {
12064  uint32_t fslspclksel : 2; /* FS LS PHY Clock Select */
12065  uint32_t fslssupp : 1; /* FS- and LS-Only Suppor */
12066  uint32_t : 4; /* *UNDEFINED* */
12067  uint32_t ena32khzs : 1; /* Enable 32 KHz Suspend mode */
12068  uint32_t resvalid : 8; /* Resume Validation Period */
12069  uint32_t : 7; /* *UNDEFINED* */
12070  uint32_t descdma : 1; /* Enable Scatter Gather DMA in Host mode */
12071  uint32_t frlisten : 2; /* Frame List Entries */
12072  uint32_t perschedena : 1; /* Enable Periodic Scheduling */
12073  uint32_t : 4; /* *UNDEFINED* */
12074  uint32_t modechtimen : 1; /* Mode Change Ready Timer Enable */
12075 };
12076 
12077 /* The typedef declaration for register ALT_USB_HOST_HCFG. */
12078 typedef volatile struct ALT_USB_HOST_HCFG_s ALT_USB_HOST_HCFG_t;
12079 #endif /* __ASSEMBLY__ */
12080 
12081 /* The byte offset of the ALT_USB_HOST_HCFG register from the beginning of the component. */
12082 #define ALT_USB_HOST_HCFG_OFST 0x0
12083 /* The address of the ALT_USB_HOST_HCFG register. */
12084 #define ALT_USB_HOST_HCFG_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCFG_OFST))
12085 
12086 /*
12087  * Register : Host Frame Interval Register - hfir
12088  *
12089  * This register stores the frame interval information for the current speed to
12090  * which the otg core has enumerated
12091  *
12092  * Register Layout
12093  *
12094  * Bits | Access | Reset | Description
12095  * :--------|:-------|:-------|:---------------
12096  * [15:0] | RW | 0xea60 | Frame IntervaL
12097  * [16] | RW | 0x0 | Reload Control
12098  * [31:17] | ??? | 0x0 | *UNDEFINED*
12099  *
12100  */
12101 /*
12102  * Field : Frame IntervaL - frint
12103  *
12104  * The value that the application programs to this field specifies the interval
12105  * between two consecutive SOFs (FS) or micro- SOFs (HS) or Keep-Alive tokens (HS).
12106  * This field contains the number of PHY clocks that constitute the required frame
12107  * interval. The Default value Set in this field for a FS operation when the PHY
12108  * clock frequency is 60 MHz. The application can write a value to this register
12109  * only after the Port Enable bit of the Host Port Control and Status register
12110  * (HPRT.PrtEnaPort) has been Set. If no value is programmed, the core calculates
12111  * the value based on the PHY clock specified in the FS/LS PHY Clock Select field
12112  * of the Host Configuration register (HCFG.FSLSPclkSel). Do not change the value
12113  * of this field after the initial configuration.
12114  *
12115  * 125 s * (PHY clock frequency for HS)
12116  *
12117  * 1 ms * (PHY clock frequency for FS/LS)
12118  *
12119  * Field Access Macros:
12120  *
12121  */
12122 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HFIR_FRINT register field. */
12123 #define ALT_USB_HOST_HFIR_FRINT_LSB 0
12124 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HFIR_FRINT register field. */
12125 #define ALT_USB_HOST_HFIR_FRINT_MSB 15
12126 /* The width in bits of the ALT_USB_HOST_HFIR_FRINT register field. */
12127 #define ALT_USB_HOST_HFIR_FRINT_WIDTH 16
12128 /* The mask used to set the ALT_USB_HOST_HFIR_FRINT register field value. */
12129 #define ALT_USB_HOST_HFIR_FRINT_SET_MSK 0x0000ffff
12130 /* The mask used to clear the ALT_USB_HOST_HFIR_FRINT register field value. */
12131 #define ALT_USB_HOST_HFIR_FRINT_CLR_MSK 0xffff0000
12132 /* The reset value of the ALT_USB_HOST_HFIR_FRINT register field. */
12133 #define ALT_USB_HOST_HFIR_FRINT_RESET 0xea60
12134 /* Extracts the ALT_USB_HOST_HFIR_FRINT field value from a register. */
12135 #define ALT_USB_HOST_HFIR_FRINT_GET(value) (((value) & 0x0000ffff) >> 0)
12136 /* Produces a ALT_USB_HOST_HFIR_FRINT register field value suitable for setting the register. */
12137 #define ALT_USB_HOST_HFIR_FRINT_SET(value) (((value) << 0) & 0x0000ffff)
12138 
12139 /*
12140  * Field : Reload Control - hfirrldctrl
12141  *
12142  * This bit allows dynamic reloading of the HFIR register during run time. 0x0 :
12143  * The HFIR cannot be reloaded dynamically0x1: the HFIR can be dynamically reloaded
12144  * during runtime. This bit needs to be programmed during initial configuration and
12145  * its value should not be changed during runtime.
12146  *
12147  * Field Enumeration Values:
12148  *
12149  * Enum | Value | Description
12150  * :------------------------------------|:------|:--------------------------------------------
12151  * ALT_USB_HOST_HFIR_HFIRRLDCTL_E_DISD | 0x0 | The HFIR cannot be reloaded dynamically
12152  * ALT_USB_HOST_HFIR_HFIRRLDCTL_E_END | 0x1 | The HFIR can be dynamically reloaded during
12153  * : | | runtime
12154  *
12155  * Field Access Macros:
12156  *
12157  */
12158 /*
12159  * Enumerated value for register field ALT_USB_HOST_HFIR_HFIRRLDCTL
12160  *
12161  * The HFIR cannot be reloaded dynamically
12162  */
12163 #define ALT_USB_HOST_HFIR_HFIRRLDCTL_E_DISD 0x0
12164 /*
12165  * Enumerated value for register field ALT_USB_HOST_HFIR_HFIRRLDCTL
12166  *
12167  * The HFIR can be dynamically reloaded during runtime
12168  */
12169 #define ALT_USB_HOST_HFIR_HFIRRLDCTL_E_END 0x1
12170 
12171 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HFIR_HFIRRLDCTL register field. */
12172 #define ALT_USB_HOST_HFIR_HFIRRLDCTL_LSB 16
12173 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HFIR_HFIRRLDCTL register field. */
12174 #define ALT_USB_HOST_HFIR_HFIRRLDCTL_MSB 16
12175 /* The width in bits of the ALT_USB_HOST_HFIR_HFIRRLDCTL register field. */
12176 #define ALT_USB_HOST_HFIR_HFIRRLDCTL_WIDTH 1
12177 /* The mask used to set the ALT_USB_HOST_HFIR_HFIRRLDCTL register field value. */
12178 #define ALT_USB_HOST_HFIR_HFIRRLDCTL_SET_MSK 0x00010000
12179 /* The mask used to clear the ALT_USB_HOST_HFIR_HFIRRLDCTL register field value. */
12180 #define ALT_USB_HOST_HFIR_HFIRRLDCTL_CLR_MSK 0xfffeffff
12181 /* The reset value of the ALT_USB_HOST_HFIR_HFIRRLDCTL register field. */
12182 #define ALT_USB_HOST_HFIR_HFIRRLDCTL_RESET 0x0
12183 /* Extracts the ALT_USB_HOST_HFIR_HFIRRLDCTL field value from a register. */
12184 #define ALT_USB_HOST_HFIR_HFIRRLDCTL_GET(value) (((value) & 0x00010000) >> 16)
12185 /* Produces a ALT_USB_HOST_HFIR_HFIRRLDCTL register field value suitable for setting the register. */
12186 #define ALT_USB_HOST_HFIR_HFIRRLDCTL_SET(value) (((value) << 16) & 0x00010000)
12187 
12188 #ifndef __ASSEMBLY__
12189 /*
12190  * WARNING: The C register and register group struct declarations are provided for
12191  * convenience and illustrative purposes. They should, however, be used with
12192  * caution as the C language standard provides no guarantees about the alignment or
12193  * atomicity of device memory accesses. The recommended practice for writing
12194  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
12195  * alt_write_word() functions.
12196  *
12197  * The struct declaration for register ALT_USB_HOST_HFIR.
12198  */
12199 struct ALT_USB_HOST_HFIR_s
12200 {
12201  uint32_t frint : 16; /* Frame IntervaL */
12202  uint32_t hfirrldctrl : 1; /* Reload Control */
12203  uint32_t : 15; /* *UNDEFINED* */
12204 };
12205 
12206 /* The typedef declaration for register ALT_USB_HOST_HFIR. */
12207 typedef volatile struct ALT_USB_HOST_HFIR_s ALT_USB_HOST_HFIR_t;
12208 #endif /* __ASSEMBLY__ */
12209 
12210 /* The byte offset of the ALT_USB_HOST_HFIR register from the beginning of the component. */
12211 #define ALT_USB_HOST_HFIR_OFST 0x4
12212 /* The address of the ALT_USB_HOST_HFIR register. */
12213 #define ALT_USB_HOST_HFIR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HFIR_OFST))
12214 
12215 /*
12216  * Register : Host Frame Number Frame Time Remaining Register - hfnum
12217  *
12218  * This register contains the free space information for the Periodic TxFIFO and
12219  * the Periodic Transmit Request Queue
12220  *
12221  * Register Layout
12222  *
12223  * Bits | Access | Reset | Description
12224  * :--------|:-------|:-------|:---------------------
12225  * [15:0] | R | 0x3fff | Frame Number
12226  * [31:16] | R | 0x0 | Frame Time Remaining
12227  *
12228  */
12229 /*
12230  * Field : Frame Number - frnum
12231  *
12232  * This field increments when a new SOF is transmitted on the USB, and is reset to
12233  * 0 when it reaches 0x3FFF. Reads Return the Frame number value.
12234  *
12235  * Field Enumeration Values:
12236  *
12237  * Enum | Value | Description
12238  * :---------------------------------|:------|:----------------------
12239  * ALT_USB_HOST_HFNUM_FRNUM_E_INACT | 0x0 | No SOF is transmitted
12240  * ALT_USB_HOST_HFNUM_FRNUM_E_ACT | 0x1 | SOF is transmitted
12241  *
12242  * Field Access Macros:
12243  *
12244  */
12245 /*
12246  * Enumerated value for register field ALT_USB_HOST_HFNUM_FRNUM
12247  *
12248  * No SOF is transmitted
12249  */
12250 #define ALT_USB_HOST_HFNUM_FRNUM_E_INACT 0x0
12251 /*
12252  * Enumerated value for register field ALT_USB_HOST_HFNUM_FRNUM
12253  *
12254  * SOF is transmitted
12255  */
12256 #define ALT_USB_HOST_HFNUM_FRNUM_E_ACT 0x1
12257 
12258 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HFNUM_FRNUM register field. */
12259 #define ALT_USB_HOST_HFNUM_FRNUM_LSB 0
12260 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HFNUM_FRNUM register field. */
12261 #define ALT_USB_HOST_HFNUM_FRNUM_MSB 15
12262 /* The width in bits of the ALT_USB_HOST_HFNUM_FRNUM register field. */
12263 #define ALT_USB_HOST_HFNUM_FRNUM_WIDTH 16
12264 /* The mask used to set the ALT_USB_HOST_HFNUM_FRNUM register field value. */
12265 #define ALT_USB_HOST_HFNUM_FRNUM_SET_MSK 0x0000ffff
12266 /* The mask used to clear the ALT_USB_HOST_HFNUM_FRNUM register field value. */
12267 #define ALT_USB_HOST_HFNUM_FRNUM_CLR_MSK 0xffff0000
12268 /* The reset value of the ALT_USB_HOST_HFNUM_FRNUM register field. */
12269 #define ALT_USB_HOST_HFNUM_FRNUM_RESET 0x3fff
12270 /* Extracts the ALT_USB_HOST_HFNUM_FRNUM field value from a register. */
12271 #define ALT_USB_HOST_HFNUM_FRNUM_GET(value) (((value) & 0x0000ffff) >> 0)
12272 /* Produces a ALT_USB_HOST_HFNUM_FRNUM register field value suitable for setting the register. */
12273 #define ALT_USB_HOST_HFNUM_FRNUM_SET(value) (((value) << 0) & 0x0000ffff)
12274 
12275 /*
12276  * Field : Frame Time Remaining - frrem
12277  *
12278  * Indicates the amount of time remaining in the current microframe (HS) or Frame
12279  * (FS/LS), in terms of PHY clocks. This field decrements on each PHY clock. When
12280  * it reaches zero, this field is reloaded with the value in the Frame Interval
12281  * register and a new SOF is transmitted on the USB.
12282  *
12283  * Field Access Macros:
12284  *
12285  */
12286 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HFNUM_FRREM register field. */
12287 #define ALT_USB_HOST_HFNUM_FRREM_LSB 16
12288 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HFNUM_FRREM register field. */
12289 #define ALT_USB_HOST_HFNUM_FRREM_MSB 31
12290 /* The width in bits of the ALT_USB_HOST_HFNUM_FRREM register field. */
12291 #define ALT_USB_HOST_HFNUM_FRREM_WIDTH 16
12292 /* The mask used to set the ALT_USB_HOST_HFNUM_FRREM register field value. */
12293 #define ALT_USB_HOST_HFNUM_FRREM_SET_MSK 0xffff0000
12294 /* The mask used to clear the ALT_USB_HOST_HFNUM_FRREM register field value. */
12295 #define ALT_USB_HOST_HFNUM_FRREM_CLR_MSK 0x0000ffff
12296 /* The reset value of the ALT_USB_HOST_HFNUM_FRREM register field. */
12297 #define ALT_USB_HOST_HFNUM_FRREM_RESET 0x0
12298 /* Extracts the ALT_USB_HOST_HFNUM_FRREM field value from a register. */
12299 #define ALT_USB_HOST_HFNUM_FRREM_GET(value) (((value) & 0xffff0000) >> 16)
12300 /* Produces a ALT_USB_HOST_HFNUM_FRREM register field value suitable for setting the register. */
12301 #define ALT_USB_HOST_HFNUM_FRREM_SET(value) (((value) << 16) & 0xffff0000)
12302 
12303 #ifndef __ASSEMBLY__
12304 /*
12305  * WARNING: The C register and register group struct declarations are provided for
12306  * convenience and illustrative purposes. They should, however, be used with
12307  * caution as the C language standard provides no guarantees about the alignment or
12308  * atomicity of device memory accesses. The recommended practice for writing
12309  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
12310  * alt_write_word() functions.
12311  *
12312  * The struct declaration for register ALT_USB_HOST_HFNUM.
12313  */
12314 struct ALT_USB_HOST_HFNUM_s
12315 {
12316  const uint32_t frnum : 16; /* Frame Number */
12317  const uint32_t frrem : 16; /* Frame Time Remaining */
12318 };
12319 
12320 /* The typedef declaration for register ALT_USB_HOST_HFNUM. */
12321 typedef volatile struct ALT_USB_HOST_HFNUM_s ALT_USB_HOST_HFNUM_t;
12322 #endif /* __ASSEMBLY__ */
12323 
12324 /* The byte offset of the ALT_USB_HOST_HFNUM register from the beginning of the component. */
12325 #define ALT_USB_HOST_HFNUM_OFST 0x8
12326 /* The address of the ALT_USB_HOST_HFNUM register. */
12327 #define ALT_USB_HOST_HFNUM_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HFNUM_OFST))
12328 
12329 /*
12330  * Register : Host Periodic Transmit FIFO Queue Status Register - hptxsts
12331  *
12332  * This register contains the free space information for the Periodic TxFIFO and
12333  * the Periodic Transmit Request Queue.
12334  *
12335  * Register Layout
12336  *
12337  * Bits | Access | Reset | Description
12338  * :--------|:-------|:-------|:------------------------------------------------
12339  * [15:0] | R | 0x2000 | Periodic Transmit Data FIFO Space Available
12340  * [23:16] | R | 0x10 | Periodic Transmit Request Queue Space Available
12341  * [24] | R | 0x0 | Terminate
12342  * [26:25] | R | 0x0 | Type
12343  * [30:27] | R | 0x0 | Channel Endpoint Number
12344  * [31] | R | 0x0 | Odd Even Micro Frame
12345  *
12346  */
12347 /*
12348  * Field : Periodic Transmit Data FIFO Space Available - ptxfspcavail
12349  *
12350  * Indicates the number of free locations available to be written to in the
12351  * Periodic TxFIFO. Values are in terms of 32-bit words
12352  *
12353  * 16h0: Periodic TxFIFO is full
12354  *
12355  * 16h1: 1 word available
12356  *
12357  * 16h2: 2 words available
12358  *
12359  * 16hn: n words available where n is 0 to 8192
12360  *
12361  * Field Access Macros:
12362  *
12363  */
12364 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL register field. */
12365 #define ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL_LSB 0
12366 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL register field. */
12367 #define ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL_MSB 15
12368 /* The width in bits of the ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL register field. */
12369 #define ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL_WIDTH 16
12370 /* The mask used to set the ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL register field value. */
12371 #define ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL_SET_MSK 0x0000ffff
12372 /* The mask used to clear the ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL register field value. */
12373 #define ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL_CLR_MSK 0xffff0000
12374 /* The reset value of the ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL register field. */
12375 #define ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL_RESET 0x2000
12376 /* Extracts the ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL field value from a register. */
12377 #define ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
12378 /* Produces a ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL register field value suitable for setting the register. */
12379 #define ALT_USB_HOST_HPTXSTS_PTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
12380 
12381 /*
12382  * Field : Periodic Transmit Request Queue Space Available - ptxqspcavail
12383  *
12384  * Indicates the number of free locations available to be written in the Periodic
12385  * Transmit Request Queue. This queue holds both IN and OUT requests. Others:
12386  * Reserved
12387  *
12388  * Field Enumeration Values:
12389  *
12390  * Enum | Value | Description
12391  * :------------------------------------------|:------|:----------------------------------------
12392  * ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FULL | 0x0 | Periodic Transmit Request Queue is full
12393  * ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE1 | 0x1 | 1 location available
12394  * ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE2 | 0x2 | 2 location available
12395  * ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE3 | 0x3 | 3 location available
12396  * ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE4 | 0x4 | 4 location available
12397  * ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE5 | 0x5 | 5 location available
12398  * ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE6 | 0x6 | 6 location available
12399  * ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE7 | 0x7 | 7 location available
12400  * ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE8 | 0x8 | 8 location available
12401  *
12402  * Field Access Macros:
12403  *
12404  */
12405 /*
12406  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL
12407  *
12408  * Periodic Transmit Request Queue is full
12409  */
12410 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FULL 0x0
12411 /*
12412  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL
12413  *
12414  * 1 location available
12415  */
12416 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE1 0x1
12417 /*
12418  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL
12419  *
12420  * 2 location available
12421  */
12422 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE2 0x2
12423 /*
12424  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL
12425  *
12426  * 3 location available
12427  */
12428 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE3 0x3
12429 /*
12430  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL
12431  *
12432  * 4 location available
12433  */
12434 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE4 0x4
12435 /*
12436  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL
12437  *
12438  * 5 location available
12439  */
12440 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE5 0x5
12441 /*
12442  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL
12443  *
12444  * 6 location available
12445  */
12446 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE6 0x6
12447 /*
12448  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL
12449  *
12450  * 7 location available
12451  */
12452 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE7 0x7
12453 /*
12454  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL
12455  *
12456  * 8 location available
12457  */
12458 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_E_FREE8 0x8
12459 
12460 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL register field. */
12461 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_LSB 16
12462 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL register field. */
12463 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_MSB 23
12464 /* The width in bits of the ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL register field. */
12465 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_WIDTH 8
12466 /* The mask used to set the ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL register field value. */
12467 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_SET_MSK 0x00ff0000
12468 /* The mask used to clear the ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL register field value. */
12469 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_CLR_MSK 0xff00ffff
12470 /* The reset value of the ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL register field. */
12471 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_RESET 0x10
12472 /* Extracts the ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL field value from a register. */
12473 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_GET(value) (((value) & 0x00ff0000) >> 16)
12474 /* Produces a ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL register field value suitable for setting the register. */
12475 #define ALT_USB_HOST_HPTXSTS_PTXQSPCAVAIL_SET(value) (((value) << 16) & 0x00ff0000)
12476 
12477 /*
12478  * Field : Terminate - term
12479  *
12480  * Terminate last entry for selected channel/endpoint.
12481  *
12482  * Field Enumeration Values:
12483  *
12484  * Enum | Value | Description
12485  * :----------------------------------|:------|:----------------------------------
12486  * ALT_USB_HOST_HPTXSTS_TERM_E_INACT | 0x0 | No termination
12487  * ALT_USB_HOST_HPTXSTS_TERM_E_ACT | 0x1 | Terminate last entry for selected
12488  * : | | channel/endpoint
12489  *
12490  * Field Access Macros:
12491  *
12492  */
12493 /*
12494  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_TERM
12495  *
12496  * No termination
12497  */
12498 #define ALT_USB_HOST_HPTXSTS_TERM_E_INACT 0x0
12499 /*
12500  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_TERM
12501  *
12502  * Terminate last entry for selected channel/endpoint
12503  */
12504 #define ALT_USB_HOST_HPTXSTS_TERM_E_ACT 0x1
12505 
12506 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPTXSTS_TERM register field. */
12507 #define ALT_USB_HOST_HPTXSTS_TERM_LSB 24
12508 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPTXSTS_TERM register field. */
12509 #define ALT_USB_HOST_HPTXSTS_TERM_MSB 24
12510 /* The width in bits of the ALT_USB_HOST_HPTXSTS_TERM register field. */
12511 #define ALT_USB_HOST_HPTXSTS_TERM_WIDTH 1
12512 /* The mask used to set the ALT_USB_HOST_HPTXSTS_TERM register field value. */
12513 #define ALT_USB_HOST_HPTXSTS_TERM_SET_MSK 0x01000000
12514 /* The mask used to clear the ALT_USB_HOST_HPTXSTS_TERM register field value. */
12515 #define ALT_USB_HOST_HPTXSTS_TERM_CLR_MSK 0xfeffffff
12516 /* The reset value of the ALT_USB_HOST_HPTXSTS_TERM register field. */
12517 #define ALT_USB_HOST_HPTXSTS_TERM_RESET 0x0
12518 /* Extracts the ALT_USB_HOST_HPTXSTS_TERM field value from a register. */
12519 #define ALT_USB_HOST_HPTXSTS_TERM_GET(value) (((value) & 0x01000000) >> 24)
12520 /* Produces a ALT_USB_HOST_HPTXSTS_TERM register field value suitable for setting the register. */
12521 #define ALT_USB_HOST_HPTXSTS_TERM_SET(value) (((value) << 24) & 0x01000000)
12522 
12523 /*
12524  * Field : Type - type
12525  *
12526  * This indicates the Entry in the Periodic Tx Request Queue that is currently
12527  * being processes by the MAC.
12528  *
12529  * Field Enumeration Values:
12530  *
12531  * Enum | Value | Description
12532  * :--------------------------------------|:------|:------------------------
12533  * ALT_USB_HOST_HPTXSTS_TYPE_E_INOUT | 0x0 | IN/OUT type
12534  * ALT_USB_HOST_HPTXSTS_TYPE_E_ZEROLNGTH | 0x1 | Zero-length packet type
12535  * ALT_USB_HOST_HPTXSTS_TYPE_E_CSPLIT | 0x2 | CSPLIT type
12536  * ALT_USB_HOST_HPTXSTS_TYPE_E_DIS | 0x3 | Disable channel command
12537  *
12538  * Field Access Macros:
12539  *
12540  */
12541 /*
12542  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_TYPE
12543  *
12544  * IN/OUT type
12545  */
12546 #define ALT_USB_HOST_HPTXSTS_TYPE_E_INOUT 0x0
12547 /*
12548  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_TYPE
12549  *
12550  * Zero-length packet type
12551  */
12552 #define ALT_USB_HOST_HPTXSTS_TYPE_E_ZEROLNGTH 0x1
12553 /*
12554  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_TYPE
12555  *
12556  * CSPLIT type
12557  */
12558 #define ALT_USB_HOST_HPTXSTS_TYPE_E_CSPLIT 0x2
12559 /*
12560  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_TYPE
12561  *
12562  * Disable channel command
12563  */
12564 #define ALT_USB_HOST_HPTXSTS_TYPE_E_DIS 0x3
12565 
12566 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPTXSTS_TYPE register field. */
12567 #define ALT_USB_HOST_HPTXSTS_TYPE_LSB 25
12568 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPTXSTS_TYPE register field. */
12569 #define ALT_USB_HOST_HPTXSTS_TYPE_MSB 26
12570 /* The width in bits of the ALT_USB_HOST_HPTXSTS_TYPE register field. */
12571 #define ALT_USB_HOST_HPTXSTS_TYPE_WIDTH 2
12572 /* The mask used to set the ALT_USB_HOST_HPTXSTS_TYPE register field value. */
12573 #define ALT_USB_HOST_HPTXSTS_TYPE_SET_MSK 0x06000000
12574 /* The mask used to clear the ALT_USB_HOST_HPTXSTS_TYPE register field value. */
12575 #define ALT_USB_HOST_HPTXSTS_TYPE_CLR_MSK 0xf9ffffff
12576 /* The reset value of the ALT_USB_HOST_HPTXSTS_TYPE register field. */
12577 #define ALT_USB_HOST_HPTXSTS_TYPE_RESET 0x0
12578 /* Extracts the ALT_USB_HOST_HPTXSTS_TYPE field value from a register. */
12579 #define ALT_USB_HOST_HPTXSTS_TYPE_GET(value) (((value) & 0x06000000) >> 25)
12580 /* Produces a ALT_USB_HOST_HPTXSTS_TYPE register field value suitable for setting the register. */
12581 #define ALT_USB_HOST_HPTXSTS_TYPE_SET(value) (((value) << 25) & 0x06000000)
12582 
12583 /*
12584  * Field : Channel Endpoint Number - chanendpt
12585  *
12586  * This indicates the channel endpoint number that is currently being processes by
12587  * the MAC.
12588  *
12589  * Field Enumeration Values:
12590  *
12591  * Enum | Value | Description
12592  * :-----------------------------------------|:------|:--------------
12593  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT0 | 0x0 | End point 1
12594  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT1 | 0x1 | End point 2
12595  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT2 | 0x2 | End point 3
12596  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT3 | 0x3 | End point 4
12597  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT4 | 0x4 | End point 5
12598  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT5 | 0x5 | End point 6
12599  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT6 | 0x6 | End point 7
12600  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT7 | 0x7 | End point 8
12601  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT8 | 0x8 | End point 9
12602  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT9 | 0x9 | End point 10
12603  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT10 | 0xa | End point 11
12604  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT11 | 0xb | End point 12
12605  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT12 | 0xc | End point 13
12606  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT13 | 0xd | End point 14
12607  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT14 | 0xe | End point 15
12608  * ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT15 | 0xf | End point 16
12609  *
12610  * Field Access Macros:
12611  *
12612  */
12613 /*
12614  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12615  *
12616  * End point 1
12617  */
12618 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT0 0x0
12619 /*
12620  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12621  *
12622  * End point 2
12623  */
12624 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT1 0x1
12625 /*
12626  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12627  *
12628  * End point 3
12629  */
12630 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT2 0x2
12631 /*
12632  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12633  *
12634  * End point 4
12635  */
12636 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT3 0x3
12637 /*
12638  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12639  *
12640  * End point 5
12641  */
12642 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT4 0x4
12643 /*
12644  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12645  *
12646  * End point 6
12647  */
12648 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT5 0x5
12649 /*
12650  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12651  *
12652  * End point 7
12653  */
12654 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT6 0x6
12655 /*
12656  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12657  *
12658  * End point 8
12659  */
12660 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT7 0x7
12661 /*
12662  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12663  *
12664  * End point 9
12665  */
12666 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT8 0x8
12667 /*
12668  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12669  *
12670  * End point 10
12671  */
12672 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT9 0x9
12673 /*
12674  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12675  *
12676  * End point 11
12677  */
12678 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT10 0xa
12679 /*
12680  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12681  *
12682  * End point 12
12683  */
12684 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT11 0xb
12685 /*
12686  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12687  *
12688  * End point 13
12689  */
12690 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT12 0xc
12691 /*
12692  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12693  *
12694  * End point 14
12695  */
12696 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT13 0xd
12697 /*
12698  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12699  *
12700  * End point 15
12701  */
12702 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT14 0xe
12703 /*
12704  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_CHANENDPT
12705  *
12706  * End point 16
12707  */
12708 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_E_ENDPT15 0xf
12709 
12710 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPTXSTS_CHANENDPT register field. */
12711 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_LSB 27
12712 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPTXSTS_CHANENDPT register field. */
12713 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_MSB 30
12714 /* The width in bits of the ALT_USB_HOST_HPTXSTS_CHANENDPT register field. */
12715 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_WIDTH 4
12716 /* The mask used to set the ALT_USB_HOST_HPTXSTS_CHANENDPT register field value. */
12717 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_SET_MSK 0x78000000
12718 /* The mask used to clear the ALT_USB_HOST_HPTXSTS_CHANENDPT register field value. */
12719 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_CLR_MSK 0x87ffffff
12720 /* The reset value of the ALT_USB_HOST_HPTXSTS_CHANENDPT register field. */
12721 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_RESET 0x0
12722 /* Extracts the ALT_USB_HOST_HPTXSTS_CHANENDPT field value from a register. */
12723 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_GET(value) (((value) & 0x78000000) >> 27)
12724 /* Produces a ALT_USB_HOST_HPTXSTS_CHANENDPT register field value suitable for setting the register. */
12725 #define ALT_USB_HOST_HPTXSTS_CHANENDPT_SET(value) (((value) << 27) & 0x78000000)
12726 
12727 /*
12728  * Field : Odd Even Micro Frame - oddevnmframe
12729  *
12730  * This indicates the odd/even micro frame that is currently being processes by the
12731  * MAC.
12732  *
12733  * Field Enumeration Values:
12734  *
12735  * Enum | Value | Description
12736  * :---------------------------------------|:------|:--------------------------
12737  * ALT_USB_HOST_HPTXSTS_ODDEVNMFRM_E_EVEN | 0x0 | Send in even (micro)Frame
12738  * ALT_USB_HOST_HPTXSTS_ODDEVNMFRM_E_ODD | 0x1 | Send in odd (micro)Frame
12739  *
12740  * Field Access Macros:
12741  *
12742  */
12743 /*
12744  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_ODDEVNMFRM
12745  *
12746  * Send in even (micro)Frame
12747  */
12748 #define ALT_USB_HOST_HPTXSTS_ODDEVNMFRM_E_EVEN 0x0
12749 /*
12750  * Enumerated value for register field ALT_USB_HOST_HPTXSTS_ODDEVNMFRM
12751  *
12752  * Send in odd (micro)Frame
12753  */
12754 #define ALT_USB_HOST_HPTXSTS_ODDEVNMFRM_E_ODD 0x1
12755 
12756 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPTXSTS_ODDEVNMFRM register field. */
12757 #define ALT_USB_HOST_HPTXSTS_ODDEVNMFRM_LSB 31
12758 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPTXSTS_ODDEVNMFRM register field. */
12759 #define ALT_USB_HOST_HPTXSTS_ODDEVNMFRM_MSB 31
12760 /* The width in bits of the ALT_USB_HOST_HPTXSTS_ODDEVNMFRM register field. */
12761 #define ALT_USB_HOST_HPTXSTS_ODDEVNMFRM_WIDTH 1
12762 /* The mask used to set the ALT_USB_HOST_HPTXSTS_ODDEVNMFRM register field value. */
12763 #define ALT_USB_HOST_HPTXSTS_ODDEVNMFRM_SET_MSK 0x80000000
12764 /* The mask used to clear the ALT_USB_HOST_HPTXSTS_ODDEVNMFRM register field value. */
12765 #define ALT_USB_HOST_HPTXSTS_ODDEVNMFRM_CLR_MSK 0x7fffffff
12766 /* The reset value of the ALT_USB_HOST_HPTXSTS_ODDEVNMFRM register field. */
12767 #define ALT_USB_HOST_HPTXSTS_ODDEVNMFRM_RESET 0x0
12768 /* Extracts the ALT_USB_HOST_HPTXSTS_ODDEVNMFRM field value from a register. */
12769 #define ALT_USB_HOST_HPTXSTS_ODDEVNMFRM_GET(value) (((value) & 0x80000000) >> 31)
12770 /* Produces a ALT_USB_HOST_HPTXSTS_ODDEVNMFRM register field value suitable for setting the register. */
12771 #define ALT_USB_HOST_HPTXSTS_ODDEVNMFRM_SET(value) (((value) << 31) & 0x80000000)
12772 
12773 #ifndef __ASSEMBLY__
12774 /*
12775  * WARNING: The C register and register group struct declarations are provided for
12776  * convenience and illustrative purposes. They should, however, be used with
12777  * caution as the C language standard provides no guarantees about the alignment or
12778  * atomicity of device memory accesses. The recommended practice for writing
12779  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
12780  * alt_write_word() functions.
12781  *
12782  * The struct declaration for register ALT_USB_HOST_HPTXSTS.
12783  */
12784 struct ALT_USB_HOST_HPTXSTS_s
12785 {
12786  const uint32_t ptxfspcavail : 16; /* Periodic Transmit Data FIFO Space Available */
12787  const uint32_t ptxqspcavail : 8; /* Periodic Transmit Request Queue Space Available */
12788  const uint32_t term : 1; /* Terminate */
12789  const uint32_t type : 2; /* Type */
12790  const uint32_t chanendpt : 4; /* Channel Endpoint Number */
12791  const uint32_t oddevnmframe : 1; /* Odd Even Micro Frame */
12792 };
12793 
12794 /* The typedef declaration for register ALT_USB_HOST_HPTXSTS. */
12795 typedef volatile struct ALT_USB_HOST_HPTXSTS_s ALT_USB_HOST_HPTXSTS_t;
12796 #endif /* __ASSEMBLY__ */
12797 
12798 /* The byte offset of the ALT_USB_HOST_HPTXSTS register from the beginning of the component. */
12799 #define ALT_USB_HOST_HPTXSTS_OFST 0x10
12800 /* The address of the ALT_USB_HOST_HPTXSTS register. */
12801 #define ALT_USB_HOST_HPTXSTS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HPTXSTS_OFST))
12802 
12803 /*
12804  * Register : Host All Channels Interrupt Register - haint
12805  *
12806  * When a significant event occurs on a channel, the Host All Channels Interrupt
12807  * register interrupts the application using the Host Channels Interrupt bit of the
12808  * Core Interrupt register (GINTSTS.HChInt). There is one interrupt bit per
12809  * channel, up to a maximum of 16 bits. Bits in this register are set and cleared
12810  * when the application sets and clears bits in the corresponding Host Channel-n
12811  * Interrupt register.
12812  *
12813  * Register Layout
12814  *
12815  * Bits | Access | Reset | Description
12816  * :--------|:-------|:------|:-------------------
12817  * [15:0] | R | 0x0 | Channel Interrupts
12818  * [31:16] | ??? | 0x0 | *UNDEFINED*
12819  *
12820  */
12821 /*
12822  * Field : Channel Interrupts - haint
12823  *
12824  * One bit per channel: Bit 0 for Channel 0, bit 15 for Channel 15
12825  *
12826  * Field Access Macros:
12827  *
12828  */
12829 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HAINT_HAINT register field. */
12830 #define ALT_USB_HOST_HAINT_HAINT_LSB 0
12831 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HAINT_HAINT register field. */
12832 #define ALT_USB_HOST_HAINT_HAINT_MSB 15
12833 /* The width in bits of the ALT_USB_HOST_HAINT_HAINT register field. */
12834 #define ALT_USB_HOST_HAINT_HAINT_WIDTH 16
12835 /* The mask used to set the ALT_USB_HOST_HAINT_HAINT register field value. */
12836 #define ALT_USB_HOST_HAINT_HAINT_SET_MSK 0x0000ffff
12837 /* The mask used to clear the ALT_USB_HOST_HAINT_HAINT register field value. */
12838 #define ALT_USB_HOST_HAINT_HAINT_CLR_MSK 0xffff0000
12839 /* The reset value of the ALT_USB_HOST_HAINT_HAINT register field. */
12840 #define ALT_USB_HOST_HAINT_HAINT_RESET 0x0
12841 /* Extracts the ALT_USB_HOST_HAINT_HAINT field value from a register. */
12842 #define ALT_USB_HOST_HAINT_HAINT_GET(value) (((value) & 0x0000ffff) >> 0)
12843 /* Produces a ALT_USB_HOST_HAINT_HAINT register field value suitable for setting the register. */
12844 #define ALT_USB_HOST_HAINT_HAINT_SET(value) (((value) << 0) & 0x0000ffff)
12845 
12846 #ifndef __ASSEMBLY__
12847 /*
12848  * WARNING: The C register and register group struct declarations are provided for
12849  * convenience and illustrative purposes. They should, however, be used with
12850  * caution as the C language standard provides no guarantees about the alignment or
12851  * atomicity of device memory accesses. The recommended practice for writing
12852  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
12853  * alt_write_word() functions.
12854  *
12855  * The struct declaration for register ALT_USB_HOST_HAINT.
12856  */
12857 struct ALT_USB_HOST_HAINT_s
12858 {
12859  const uint32_t haint : 16; /* Channel Interrupts */
12860  uint32_t : 16; /* *UNDEFINED* */
12861 };
12862 
12863 /* The typedef declaration for register ALT_USB_HOST_HAINT. */
12864 typedef volatile struct ALT_USB_HOST_HAINT_s ALT_USB_HOST_HAINT_t;
12865 #endif /* __ASSEMBLY__ */
12866 
12867 /* The byte offset of the ALT_USB_HOST_HAINT register from the beginning of the component. */
12868 #define ALT_USB_HOST_HAINT_OFST 0x14
12869 /* The address of the ALT_USB_HOST_HAINT register. */
12870 #define ALT_USB_HOST_HAINT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HAINT_OFST))
12871 
12872 /*
12873  * Register : Host All Channels Interrupt Mask Register - haintmsk
12874  *
12875  * The Host All Channel Interrupt Mask register works with the Host All Channel
12876  * Interrupt register to interrupt the application when an event occurs on a
12877  * channel. There is one interrupt mask bit per channel, up to a maximum of 16
12878  * bits.
12879  *
12880  * Register Layout
12881  *
12882  * Bits | Access | Reset | Description
12883  * :--------|:-------|:------|:-----------------------
12884  * [15:0] | RW | 0x0 | Channel Interrupt Mask
12885  * [31:16] | ??? | 0x0 | *UNDEFINED*
12886  *
12887  */
12888 /*
12889  * Field : Channel Interrupt Mask - haintmsk
12890  *
12891  * One bit per channel: Bit 0 for channel 0, bit 15 for channel 15
12892  *
12893  * Field Enumeration Values:
12894  *
12895  * Enum | Value | Description
12896  * :---------------------------------------|:------|:-----------------
12897  * ALT_USB_HOST_HAINTMSK_HAINTMSK_E_MSK | 0x0 | Mask interrupt
12898  * ALT_USB_HOST_HAINTMSK_HAINTMSK_E_NOMSK | 0x1 | Unmask interrupt
12899  *
12900  * Field Access Macros:
12901  *
12902  */
12903 /*
12904  * Enumerated value for register field ALT_USB_HOST_HAINTMSK_HAINTMSK
12905  *
12906  * Mask interrupt
12907  */
12908 #define ALT_USB_HOST_HAINTMSK_HAINTMSK_E_MSK 0x0
12909 /*
12910  * Enumerated value for register field ALT_USB_HOST_HAINTMSK_HAINTMSK
12911  *
12912  * Unmask interrupt
12913  */
12914 #define ALT_USB_HOST_HAINTMSK_HAINTMSK_E_NOMSK 0x1
12915 
12916 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HAINTMSK_HAINTMSK register field. */
12917 #define ALT_USB_HOST_HAINTMSK_HAINTMSK_LSB 0
12918 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HAINTMSK_HAINTMSK register field. */
12919 #define ALT_USB_HOST_HAINTMSK_HAINTMSK_MSB 15
12920 /* The width in bits of the ALT_USB_HOST_HAINTMSK_HAINTMSK register field. */
12921 #define ALT_USB_HOST_HAINTMSK_HAINTMSK_WIDTH 16
12922 /* The mask used to set the ALT_USB_HOST_HAINTMSK_HAINTMSK register field value. */
12923 #define ALT_USB_HOST_HAINTMSK_HAINTMSK_SET_MSK 0x0000ffff
12924 /* The mask used to clear the ALT_USB_HOST_HAINTMSK_HAINTMSK register field value. */
12925 #define ALT_USB_HOST_HAINTMSK_HAINTMSK_CLR_MSK 0xffff0000
12926 /* The reset value of the ALT_USB_HOST_HAINTMSK_HAINTMSK register field. */
12927 #define ALT_USB_HOST_HAINTMSK_HAINTMSK_RESET 0x0
12928 /* Extracts the ALT_USB_HOST_HAINTMSK_HAINTMSK field value from a register. */
12929 #define ALT_USB_HOST_HAINTMSK_HAINTMSK_GET(value) (((value) & 0x0000ffff) >> 0)
12930 /* Produces a ALT_USB_HOST_HAINTMSK_HAINTMSK register field value suitable for setting the register. */
12931 #define ALT_USB_HOST_HAINTMSK_HAINTMSK_SET(value) (((value) << 0) & 0x0000ffff)
12932 
12933 #ifndef __ASSEMBLY__
12934 /*
12935  * WARNING: The C register and register group struct declarations are provided for
12936  * convenience and illustrative purposes. They should, however, be used with
12937  * caution as the C language standard provides no guarantees about the alignment or
12938  * atomicity of device memory accesses. The recommended practice for writing
12939  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
12940  * alt_write_word() functions.
12941  *
12942  * The struct declaration for register ALT_USB_HOST_HAINTMSK.
12943  */
12944 struct ALT_USB_HOST_HAINTMSK_s
12945 {
12946  uint32_t haintmsk : 16; /* Channel Interrupt Mask */
12947  uint32_t : 16; /* *UNDEFINED* */
12948 };
12949 
12950 /* The typedef declaration for register ALT_USB_HOST_HAINTMSK. */
12951 typedef volatile struct ALT_USB_HOST_HAINTMSK_s ALT_USB_HOST_HAINTMSK_t;
12952 #endif /* __ASSEMBLY__ */
12953 
12954 /* The byte offset of the ALT_USB_HOST_HAINTMSK register from the beginning of the component. */
12955 #define ALT_USB_HOST_HAINTMSK_OFST 0x18
12956 /* The address of the ALT_USB_HOST_HAINTMSK register. */
12957 #define ALT_USB_HOST_HAINTMSK_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HAINTMSK_OFST))
12958 
12959 /*
12960  * Register : Host Frame List Base Address Register - hflbaddr
12961  *
12962  * This Register is valid only for Host mode Scatter-Gather DMA. Starting address
12963  * of the Frame list. This register is used only for Isochronous and Interrupt
12964  * Channels.
12965  *
12966  * Register Layout
12967  *
12968  * Bits | Access | Reset | Description
12969  * :-------|:-------|:------|:-------------------------------
12970  * [31:0] | RW | 0x0 | ALT_USB_HOST_HFLBADDR_HFLBADDR
12971  *
12972  */
12973 /*
12974  * Field : hflbaddr
12975  *
12976  * This Register is valid only for Host mode Scatter-Gather DMA mode. Starting
12977  * address of the Frame list. This register is used only for Isochronous and
12978  * Interrupt Channels.
12979  *
12980  * Field Access Macros:
12981  *
12982  */
12983 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HFLBADDR_HFLBADDR register field. */
12984 #define ALT_USB_HOST_HFLBADDR_HFLBADDR_LSB 0
12985 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HFLBADDR_HFLBADDR register field. */
12986 #define ALT_USB_HOST_HFLBADDR_HFLBADDR_MSB 31
12987 /* The width in bits of the ALT_USB_HOST_HFLBADDR_HFLBADDR register field. */
12988 #define ALT_USB_HOST_HFLBADDR_HFLBADDR_WIDTH 32
12989 /* The mask used to set the ALT_USB_HOST_HFLBADDR_HFLBADDR register field value. */
12990 #define ALT_USB_HOST_HFLBADDR_HFLBADDR_SET_MSK 0xffffffff
12991 /* The mask used to clear the ALT_USB_HOST_HFLBADDR_HFLBADDR register field value. */
12992 #define ALT_USB_HOST_HFLBADDR_HFLBADDR_CLR_MSK 0x00000000
12993 /* The reset value of the ALT_USB_HOST_HFLBADDR_HFLBADDR register field. */
12994 #define ALT_USB_HOST_HFLBADDR_HFLBADDR_RESET 0x0
12995 /* Extracts the ALT_USB_HOST_HFLBADDR_HFLBADDR field value from a register. */
12996 #define ALT_USB_HOST_HFLBADDR_HFLBADDR_GET(value) (((value) & 0xffffffff) >> 0)
12997 /* Produces a ALT_USB_HOST_HFLBADDR_HFLBADDR register field value suitable for setting the register. */
12998 #define ALT_USB_HOST_HFLBADDR_HFLBADDR_SET(value) (((value) << 0) & 0xffffffff)
12999 
13000 #ifndef __ASSEMBLY__
13001 /*
13002  * WARNING: The C register and register group struct declarations are provided for
13003  * convenience and illustrative purposes. They should, however, be used with
13004  * caution as the C language standard provides no guarantees about the alignment or
13005  * atomicity of device memory accesses. The recommended practice for writing
13006  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
13007  * alt_write_word() functions.
13008  *
13009  * The struct declaration for register ALT_USB_HOST_HFLBADDR.
13010  */
13011 struct ALT_USB_HOST_HFLBADDR_s
13012 {
13013  uint32_t hflbaddr : 32; /* ALT_USB_HOST_HFLBADDR_HFLBADDR */
13014 };
13015 
13016 /* The typedef declaration for register ALT_USB_HOST_HFLBADDR. */
13017 typedef volatile struct ALT_USB_HOST_HFLBADDR_s ALT_USB_HOST_HFLBADDR_t;
13018 #endif /* __ASSEMBLY__ */
13019 
13020 /* The byte offset of the ALT_USB_HOST_HFLBADDR register from the beginning of the component. */
13021 #define ALT_USB_HOST_HFLBADDR_OFST 0x1c
13022 /* The address of the ALT_USB_HOST_HFLBADDR register. */
13023 #define ALT_USB_HOST_HFLBADDR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HFLBADDR_OFST))
13024 
13025 /*
13026  * Register : Host Port Control and Status Register - hprt
13027  *
13028  * This register is available only in Host mode. Currently, the OTG Host supports
13029  * only one port. A single register holds USB port-related information such as USB
13030  * reset, enable, suspend, resume, connect status, and test mode for each port.The
13031  * R_SS_WC bits in this register can trigger an interrupt to the application
13032  * through the Host Port Interrupt bit of the Core Interrupt register
13033  * (GINTSTS.PrtInt). On a Port Interrupt, the application must read this register
13034  * and clear the bit that caused the interrupt. for the R_SS_WC bits, the
13035  * application must write a 1 to the bit to clear the interrupt
13036  *
13037  * Register Layout
13038  *
13039  * Bits | Access | Reset | Description
13040  * :--------|:-------|:------|:---------------------------
13041  * [0] | R | 0x0 | Port Connect Status
13042  * [1] | R | 0x0 | Port Connect Detected
13043  * [2] | R | 0x0 | Port Enabl
13044  * [3] | R | 0x0 | Port Enable Disable Change
13045  * [4] | R | 0x0 | Port Overcurrent Active
13046  * [5] | R | 0x0 | Port Overcurrent Change
13047  * [6] | RW | 0x0 | Port Resume
13048  * [7] | R | 0x0 | Port Suspend
13049  * [8] | RW | 0x0 | Port Reset
13050  * [9] | ??? | 0x0 | *UNDEFINED*
13051  * [11:10] | R | 0x0 | Port Line Status
13052  * [12] | RW | 0x0 | Port Power
13053  * [16:13] | RW | 0x0 | Port Test Control
13054  * [18:17] | R | 0x0 | Port Speed
13055  * [31:19] | ??? | 0x0 | *UNDEFINED*
13056  *
13057  */
13058 /*
13059  * Field : Port Connect Status - prtconnsts
13060  *
13061  * Defines whether port is attached.
13062  *
13063  * Field Enumeration Values:
13064  *
13065  * Enum | Value | Description
13066  * :-------------------------------------------|:------|:----------------------------------
13067  * ALT_USB_HOST_HPRT_PRTCONNSTS_E_NOTATTACHED | 0x0 | No device is attached to the port
13068  * ALT_USB_HOST_HPRT_PRTCONNSTS_E_ATTACHED | 0x1 | A device is attached to the port
13069  *
13070  * Field Access Macros:
13071  *
13072  */
13073 /*
13074  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTCONNSTS
13075  *
13076  * No device is attached to the port
13077  */
13078 #define ALT_USB_HOST_HPRT_PRTCONNSTS_E_NOTATTACHED 0x0
13079 /*
13080  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTCONNSTS
13081  *
13082  * A device is attached to the port
13083  */
13084 #define ALT_USB_HOST_HPRT_PRTCONNSTS_E_ATTACHED 0x1
13085 
13086 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTCONNSTS register field. */
13087 #define ALT_USB_HOST_HPRT_PRTCONNSTS_LSB 0
13088 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTCONNSTS register field. */
13089 #define ALT_USB_HOST_HPRT_PRTCONNSTS_MSB 0
13090 /* The width in bits of the ALT_USB_HOST_HPRT_PRTCONNSTS register field. */
13091 #define ALT_USB_HOST_HPRT_PRTCONNSTS_WIDTH 1
13092 /* The mask used to set the ALT_USB_HOST_HPRT_PRTCONNSTS register field value. */
13093 #define ALT_USB_HOST_HPRT_PRTCONNSTS_SET_MSK 0x00000001
13094 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTCONNSTS register field value. */
13095 #define ALT_USB_HOST_HPRT_PRTCONNSTS_CLR_MSK 0xfffffffe
13096 /* The reset value of the ALT_USB_HOST_HPRT_PRTCONNSTS register field. */
13097 #define ALT_USB_HOST_HPRT_PRTCONNSTS_RESET 0x0
13098 /* Extracts the ALT_USB_HOST_HPRT_PRTCONNSTS field value from a register. */
13099 #define ALT_USB_HOST_HPRT_PRTCONNSTS_GET(value) (((value) & 0x00000001) >> 0)
13100 /* Produces a ALT_USB_HOST_HPRT_PRTCONNSTS register field value suitable for setting the register. */
13101 #define ALT_USB_HOST_HPRT_PRTCONNSTS_SET(value) (((value) << 0) & 0x00000001)
13102 
13103 /*
13104  * Field : Port Connect Detected - PrtConnDet
13105  *
13106  * The core sets this bit when a device connection is detected to trigger an
13107  * interrupt to the application using the Host Port Interrupt bit of the Core
13108  * Interrupt register (GINTSTS.PrtInt). This bit can be set only by the core and
13109  * the application should write 1 to clear it.The application must write a 1 to
13110  * this bit to clear the interrupt.
13111  *
13112  * Field Enumeration Values:
13113  *
13114  * Enum | Value | Description
13115  * :-------------------------------------|:------|:------------------------------
13116  * ALT_USB_HOST_HPRT_PRTCONNDET_E_ACT | 0x0 | Device connection detected
13117  * ALT_USB_HOST_HPRT_PRTCONNDET_E_INACT | 0x1 | No device connection detected
13118  *
13119  * Field Access Macros:
13120  *
13121  */
13122 /*
13123  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTCONNDET
13124  *
13125  * Device connection detected
13126  */
13127 #define ALT_USB_HOST_HPRT_PRTCONNDET_E_ACT 0x0
13128 /*
13129  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTCONNDET
13130  *
13131  * No device connection detected
13132  */
13133 #define ALT_USB_HOST_HPRT_PRTCONNDET_E_INACT 0x1
13134 
13135 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTCONNDET register field. */
13136 #define ALT_USB_HOST_HPRT_PRTCONNDET_LSB 1
13137 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTCONNDET register field. */
13138 #define ALT_USB_HOST_HPRT_PRTCONNDET_MSB 1
13139 /* The width in bits of the ALT_USB_HOST_HPRT_PRTCONNDET register field. */
13140 #define ALT_USB_HOST_HPRT_PRTCONNDET_WIDTH 1
13141 /* The mask used to set the ALT_USB_HOST_HPRT_PRTCONNDET register field value. */
13142 #define ALT_USB_HOST_HPRT_PRTCONNDET_SET_MSK 0x00000002
13143 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTCONNDET register field value. */
13144 #define ALT_USB_HOST_HPRT_PRTCONNDET_CLR_MSK 0xfffffffd
13145 /* The reset value of the ALT_USB_HOST_HPRT_PRTCONNDET register field. */
13146 #define ALT_USB_HOST_HPRT_PRTCONNDET_RESET 0x0
13147 /* Extracts the ALT_USB_HOST_HPRT_PRTCONNDET field value from a register. */
13148 #define ALT_USB_HOST_HPRT_PRTCONNDET_GET(value) (((value) & 0x00000002) >> 1)
13149 /* Produces a ALT_USB_HOST_HPRT_PRTCONNDET register field value suitable for setting the register. */
13150 #define ALT_USB_HOST_HPRT_PRTCONNDET_SET(value) (((value) << 1) & 0x00000002)
13151 
13152 /*
13153  * Field : Port Enabl - prtena
13154  *
13155  * A port is enabled only by the core after a reset sequence, and is disabled by an
13156  * overcurrent condition, a disconnect condition, or by the application clearing
13157  * this bit. The application cannot Set this bit by a register write. It can only
13158  * clear it to disable the port by writing 1. This bit does not trigger any
13159  * interrupt to the application.
13160  *
13161  * Field Enumeration Values:
13162  *
13163  * Enum | Value | Description
13164  * :--------------------------------|:------|:--------------
13165  * ALT_USB_HOST_HPRT_PRTENA_E_DISD | 0x0 | Port disabled
13166  * ALT_USB_HOST_HPRT_PRTENA_E_END | 0x1 | Port enabled
13167  *
13168  * Field Access Macros:
13169  *
13170  */
13171 /*
13172  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTENA
13173  *
13174  * Port disabled
13175  */
13176 #define ALT_USB_HOST_HPRT_PRTENA_E_DISD 0x0
13177 /*
13178  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTENA
13179  *
13180  * Port enabled
13181  */
13182 #define ALT_USB_HOST_HPRT_PRTENA_E_END 0x1
13183 
13184 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTENA register field. */
13185 #define ALT_USB_HOST_HPRT_PRTENA_LSB 2
13186 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTENA register field. */
13187 #define ALT_USB_HOST_HPRT_PRTENA_MSB 2
13188 /* The width in bits of the ALT_USB_HOST_HPRT_PRTENA register field. */
13189 #define ALT_USB_HOST_HPRT_PRTENA_WIDTH 1
13190 /* The mask used to set the ALT_USB_HOST_HPRT_PRTENA register field value. */
13191 #define ALT_USB_HOST_HPRT_PRTENA_SET_MSK 0x00000004
13192 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTENA register field value. */
13193 #define ALT_USB_HOST_HPRT_PRTENA_CLR_MSK 0xfffffffb
13194 /* The reset value of the ALT_USB_HOST_HPRT_PRTENA register field. */
13195 #define ALT_USB_HOST_HPRT_PRTENA_RESET 0x0
13196 /* Extracts the ALT_USB_HOST_HPRT_PRTENA field value from a register. */
13197 #define ALT_USB_HOST_HPRT_PRTENA_GET(value) (((value) & 0x00000004) >> 2)
13198 /* Produces a ALT_USB_HOST_HPRT_PRTENA register field value suitable for setting the register. */
13199 #define ALT_USB_HOST_HPRT_PRTENA_SET(value) (((value) << 2) & 0x00000004)
13200 
13201 /*
13202  * Field : Port Enable Disable Change - prtenchng
13203  *
13204  * The core sets this bit when the status of the Port Enable bit [2] of this
13205  * register changes. This bit can be set only by the core and the application
13206  * should write 1 to clear it.
13207  *
13208  * Field Enumeration Values:
13209  *
13210  * Enum | Value | Description
13211  * :------------------------------------|:------|:----------------------------
13212  * ALT_USB_HOST_HPRT_PRTENCHNG_E_INACT | 0x0 | Port Enable bit 2 no change
13213  * ALT_USB_HOST_HPRT_PRTENCHNG_E_ACT | 0x1 | Port Enable bit 2 changed
13214  *
13215  * Field Access Macros:
13216  *
13217  */
13218 /*
13219  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTENCHNG
13220  *
13221  * Port Enable bit 2 no change
13222  */
13223 #define ALT_USB_HOST_HPRT_PRTENCHNG_E_INACT 0x0
13224 /*
13225  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTENCHNG
13226  *
13227  * Port Enable bit 2 changed
13228  */
13229 #define ALT_USB_HOST_HPRT_PRTENCHNG_E_ACT 0x1
13230 
13231 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTENCHNG register field. */
13232 #define ALT_USB_HOST_HPRT_PRTENCHNG_LSB 3
13233 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTENCHNG register field. */
13234 #define ALT_USB_HOST_HPRT_PRTENCHNG_MSB 3
13235 /* The width in bits of the ALT_USB_HOST_HPRT_PRTENCHNG register field. */
13236 #define ALT_USB_HOST_HPRT_PRTENCHNG_WIDTH 1
13237 /* The mask used to set the ALT_USB_HOST_HPRT_PRTENCHNG register field value. */
13238 #define ALT_USB_HOST_HPRT_PRTENCHNG_SET_MSK 0x00000008
13239 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTENCHNG register field value. */
13240 #define ALT_USB_HOST_HPRT_PRTENCHNG_CLR_MSK 0xfffffff7
13241 /* The reset value of the ALT_USB_HOST_HPRT_PRTENCHNG register field. */
13242 #define ALT_USB_HOST_HPRT_PRTENCHNG_RESET 0x0
13243 /* Extracts the ALT_USB_HOST_HPRT_PRTENCHNG field value from a register. */
13244 #define ALT_USB_HOST_HPRT_PRTENCHNG_GET(value) (((value) & 0x00000008) >> 3)
13245 /* Produces a ALT_USB_HOST_HPRT_PRTENCHNG register field value suitable for setting the register. */
13246 #define ALT_USB_HOST_HPRT_PRTENCHNG_SET(value) (((value) << 3) & 0x00000008)
13247 
13248 /*
13249  * Field : Port Overcurrent Active - prtovrcurract
13250  *
13251  * Indicates the overcurrent condition of the port. 0x0: No overcurrent condition
13252  * 0x1: Overcurrent condition
13253  *
13254  * Field Enumeration Values:
13255  *
13256  * Enum | Value | Description
13257  * :----------------------------------------|:------|:-------------------------
13258  * ALT_USB_HOST_HPRT_PRTOVRCURRACT_E_INACT | 0x0 | No overcurrent condition
13259  * ALT_USB_HOST_HPRT_PRTOVRCURRACT_E_ACT | 0x1 | Overcurrent condition
13260  *
13261  * Field Access Macros:
13262  *
13263  */
13264 /*
13265  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTOVRCURRACT
13266  *
13267  * No overcurrent condition
13268  */
13269 #define ALT_USB_HOST_HPRT_PRTOVRCURRACT_E_INACT 0x0
13270 /*
13271  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTOVRCURRACT
13272  *
13273  * Overcurrent condition
13274  */
13275 #define ALT_USB_HOST_HPRT_PRTOVRCURRACT_E_ACT 0x1
13276 
13277 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTOVRCURRACT register field. */
13278 #define ALT_USB_HOST_HPRT_PRTOVRCURRACT_LSB 4
13279 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTOVRCURRACT register field. */
13280 #define ALT_USB_HOST_HPRT_PRTOVRCURRACT_MSB 4
13281 /* The width in bits of the ALT_USB_HOST_HPRT_PRTOVRCURRACT register field. */
13282 #define ALT_USB_HOST_HPRT_PRTOVRCURRACT_WIDTH 1
13283 /* The mask used to set the ALT_USB_HOST_HPRT_PRTOVRCURRACT register field value. */
13284 #define ALT_USB_HOST_HPRT_PRTOVRCURRACT_SET_MSK 0x00000010
13285 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTOVRCURRACT register field value. */
13286 #define ALT_USB_HOST_HPRT_PRTOVRCURRACT_CLR_MSK 0xffffffef
13287 /* The reset value of the ALT_USB_HOST_HPRT_PRTOVRCURRACT register field. */
13288 #define ALT_USB_HOST_HPRT_PRTOVRCURRACT_RESET 0x0
13289 /* Extracts the ALT_USB_HOST_HPRT_PRTOVRCURRACT field value from a register. */
13290 #define ALT_USB_HOST_HPRT_PRTOVRCURRACT_GET(value) (((value) & 0x00000010) >> 4)
13291 /* Produces a ALT_USB_HOST_HPRT_PRTOVRCURRACT register field value suitable for setting the register. */
13292 #define ALT_USB_HOST_HPRT_PRTOVRCURRACT_SET(value) (((value) << 4) & 0x00000010)
13293 
13294 /*
13295  * Field : Port Overcurrent Change - prtovrcurrchng
13296  *
13297  * The core sets this bit when the status of the PortOvercurrent Active bit (bit 4)
13298  * in this register changes.This bit can be set only by the core and the
13299  * application should write 1 to clear it
13300  *
13301  * Field Enumeration Values:
13302  *
13303  * Enum | Value | Description
13304  * :-----------------------------------------|:------|:-------------------------------------
13305  * ALT_USB_HOST_HPRT_PRTOVRCURRCHNG_E_INACT | 0x0 | Status of port overcurrent no change
13306  * ALT_USB_HOST_HPRT_PRTOVRCURRCHNG_E_ACT | 0x1 | Status of port overcurrent changed
13307  *
13308  * Field Access Macros:
13309  *
13310  */
13311 /*
13312  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTOVRCURRCHNG
13313  *
13314  * Status of port overcurrent no change
13315  */
13316 #define ALT_USB_HOST_HPRT_PRTOVRCURRCHNG_E_INACT 0x0
13317 /*
13318  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTOVRCURRCHNG
13319  *
13320  * Status of port overcurrent changed
13321  */
13322 #define ALT_USB_HOST_HPRT_PRTOVRCURRCHNG_E_ACT 0x1
13323 
13324 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTOVRCURRCHNG register field. */
13325 #define ALT_USB_HOST_HPRT_PRTOVRCURRCHNG_LSB 5
13326 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTOVRCURRCHNG register field. */
13327 #define ALT_USB_HOST_HPRT_PRTOVRCURRCHNG_MSB 5
13328 /* The width in bits of the ALT_USB_HOST_HPRT_PRTOVRCURRCHNG register field. */
13329 #define ALT_USB_HOST_HPRT_PRTOVRCURRCHNG_WIDTH 1
13330 /* The mask used to set the ALT_USB_HOST_HPRT_PRTOVRCURRCHNG register field value. */
13331 #define ALT_USB_HOST_HPRT_PRTOVRCURRCHNG_SET_MSK 0x00000020
13332 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTOVRCURRCHNG register field value. */
13333 #define ALT_USB_HOST_HPRT_PRTOVRCURRCHNG_CLR_MSK 0xffffffdf
13334 /* The reset value of the ALT_USB_HOST_HPRT_PRTOVRCURRCHNG register field. */
13335 #define ALT_USB_HOST_HPRT_PRTOVRCURRCHNG_RESET 0x0
13336 /* Extracts the ALT_USB_HOST_HPRT_PRTOVRCURRCHNG field value from a register. */
13337 #define ALT_USB_HOST_HPRT_PRTOVRCURRCHNG_GET(value) (((value) & 0x00000020) >> 5)
13338 /* Produces a ALT_USB_HOST_HPRT_PRTOVRCURRCHNG register field value suitable for setting the register. */
13339 #define ALT_USB_HOST_HPRT_PRTOVRCURRCHNG_SET(value) (((value) << 5) & 0x00000020)
13340 
13341 /*
13342  * Field : Port Resume - prtres
13343  *
13344  * The application sets this bit to drive resume signaling on the port. The core
13345  * continues to drive the resume signal until the application clears this bit. If
13346  * the core detects a USB remote wakeup sequence, as indicated by the Port
13347  * Resume/Remote Wakeup Detected Interrupt bit of the Core Interrupt register
13348  * (GINTSTS.WkUpInt), the core starts driving resume signaling without application
13349  * intervention and clears this bit when it detects a disconnect condition. The
13350  * read value of this bit indicates whether the core is currently drivingresume
13351  * signaling. When LPM is enabled and the core is in the L1 (Sleep) state, setting
13352  * this bit results in the following behavior:
13353  *
13354  * The core continues to drive the resume signal until a pre-determined time
13355  * specified in the GLPMCFG.HIRD_Thres[3:0] field. If the core detects a USB remote
13356  * wakeup sequence, as indicated by the Port L1 Resume/Remote L1 Wakeup Detected
13357  * Interrupt bit of the Core Interrupt register (GINTSTS.L1WkUpInt), the core
13358  * starts driving resume signaling without application intervention and clears this
13359  * bit at the end of the resume. The read value of this bit indicates whether the
13360  * core is currently driving resume signaling.
13361  *
13362  * Field Enumeration Values:
13363  *
13364  * Enum | Value | Description
13365  * :------------------------------------|:------|:-----------------
13366  * ALT_USB_HOST_HPRT_PRTRES_E_NORESUME | 0x0 | No resume driven
13367  * ALT_USB_HOST_HPRT_PRTRES_E_RESUME | 0x1 | Resume driven
13368  *
13369  * Field Access Macros:
13370  *
13371  */
13372 /*
13373  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTRES
13374  *
13375  * No resume driven
13376  */
13377 #define ALT_USB_HOST_HPRT_PRTRES_E_NORESUME 0x0
13378 /*
13379  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTRES
13380  *
13381  * Resume driven
13382  */
13383 #define ALT_USB_HOST_HPRT_PRTRES_E_RESUME 0x1
13384 
13385 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTRES register field. */
13386 #define ALT_USB_HOST_HPRT_PRTRES_LSB 6
13387 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTRES register field. */
13388 #define ALT_USB_HOST_HPRT_PRTRES_MSB 6
13389 /* The width in bits of the ALT_USB_HOST_HPRT_PRTRES register field. */
13390 #define ALT_USB_HOST_HPRT_PRTRES_WIDTH 1
13391 /* The mask used to set the ALT_USB_HOST_HPRT_PRTRES register field value. */
13392 #define ALT_USB_HOST_HPRT_PRTRES_SET_MSK 0x00000040
13393 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTRES register field value. */
13394 #define ALT_USB_HOST_HPRT_PRTRES_CLR_MSK 0xffffffbf
13395 /* The reset value of the ALT_USB_HOST_HPRT_PRTRES register field. */
13396 #define ALT_USB_HOST_HPRT_PRTRES_RESET 0x0
13397 /* Extracts the ALT_USB_HOST_HPRT_PRTRES field value from a register. */
13398 #define ALT_USB_HOST_HPRT_PRTRES_GET(value) (((value) & 0x00000040) >> 6)
13399 /* Produces a ALT_USB_HOST_HPRT_PRTRES register field value suitable for setting the register. */
13400 #define ALT_USB_HOST_HPRT_PRTRES_SET(value) (((value) << 6) & 0x00000040)
13401 
13402 /*
13403  * Field : Port Suspend - prtsusp
13404  *
13405  * The application sets this bit to put this port in Suspend mode. The core only
13406  * stops sending SOFs when this is Set. To stop the PHY clock, the application must
13407  * Set the Port Clock Stop bit, which asserts the suspend input pin of the PHY. The
13408  * read value of this bit reflects the current suspend status of the port. This bit
13409  * is cleared by the core after a remote wakeup signal is detected or the
13410  * application sets the Port Reset bit or Port Resume bit in this register or the
13411  * Resume/Remote Wakeup Detected Interrupt bit or Disconnect Detected Interrupt bit
13412  * in the Core Interrupt register (GINTSTS.WkUpInt or GINTSTS.DisconnInt,
13413  * respectively). This bit is cleared by the core even if there is no device
13414  * connected to the Host.
13415  *
13416  * Field Enumeration Values:
13417  *
13418  * Enum | Value | Description
13419  * :----------------------------------|:------|:-------------------------
13420  * ALT_USB_HOST_HPRT_PRTSUSP_E_INACT | 0x0 | Port not in Suspend mode
13421  * ALT_USB_HOST_HPRT_PRTSUSP_E_ACT | 0x1 | Port in Suspend mode
13422  *
13423  * Field Access Macros:
13424  *
13425  */
13426 /*
13427  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTSUSP
13428  *
13429  * Port not in Suspend mode
13430  */
13431 #define ALT_USB_HOST_HPRT_PRTSUSP_E_INACT 0x0
13432 /*
13433  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTSUSP
13434  *
13435  * Port in Suspend mode
13436  */
13437 #define ALT_USB_HOST_HPRT_PRTSUSP_E_ACT 0x1
13438 
13439 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTSUSP register field. */
13440 #define ALT_USB_HOST_HPRT_PRTSUSP_LSB 7
13441 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTSUSP register field. */
13442 #define ALT_USB_HOST_HPRT_PRTSUSP_MSB 7
13443 /* The width in bits of the ALT_USB_HOST_HPRT_PRTSUSP register field. */
13444 #define ALT_USB_HOST_HPRT_PRTSUSP_WIDTH 1
13445 /* The mask used to set the ALT_USB_HOST_HPRT_PRTSUSP register field value. */
13446 #define ALT_USB_HOST_HPRT_PRTSUSP_SET_MSK 0x00000080
13447 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTSUSP register field value. */
13448 #define ALT_USB_HOST_HPRT_PRTSUSP_CLR_MSK 0xffffff7f
13449 /* The reset value of the ALT_USB_HOST_HPRT_PRTSUSP register field. */
13450 #define ALT_USB_HOST_HPRT_PRTSUSP_RESET 0x0
13451 /* Extracts the ALT_USB_HOST_HPRT_PRTSUSP field value from a register. */
13452 #define ALT_USB_HOST_HPRT_PRTSUSP_GET(value) (((value) & 0x00000080) >> 7)
13453 /* Produces a ALT_USB_HOST_HPRT_PRTSUSP register field value suitable for setting the register. */
13454 #define ALT_USB_HOST_HPRT_PRTSUSP_SET(value) (((value) << 7) & 0x00000080)
13455 
13456 /*
13457  * Field : Port Reset - prtrst
13458  *
13459  * When the application sets this bit, a reset sequence is started on this port.
13460  * The application must time the reset period and clear this bit after the reset
13461  * sequence is complete. The application must leave this bit Set for at least a
13462  * minimum duration mentioned below to start a reset on the port. The application
13463  * can leave it Set for another 10 ms in addition to the required minimum duration,
13464  * before clearing the bit, even though there is no maximum limit set by theUSB
13465  * standard. This bit is cleared by the core even if there is no device connected
13466  * to the Host.
13467  *
13468  * High speed: 50 ms
13469  *
13470  * Full speed/Low speed: 10 ms
13471  *
13472  * Field Enumeration Values:
13473  *
13474  * Enum | Value | Description
13475  * :--------------------------------|:------|:------------------
13476  * ALT_USB_HOST_HPRT_PRTRST_E_DISD | 0x0 | Port not in reset
13477  * ALT_USB_HOST_HPRT_PRTRST_E_END | 0x1 | Port in reset
13478  *
13479  * Field Access Macros:
13480  *
13481  */
13482 /*
13483  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTRST
13484  *
13485  * Port not in reset
13486  */
13487 #define ALT_USB_HOST_HPRT_PRTRST_E_DISD 0x0
13488 /*
13489  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTRST
13490  *
13491  * Port in reset
13492  */
13493 #define ALT_USB_HOST_HPRT_PRTRST_E_END 0x1
13494 
13495 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTRST register field. */
13496 #define ALT_USB_HOST_HPRT_PRTRST_LSB 8
13497 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTRST register field. */
13498 #define ALT_USB_HOST_HPRT_PRTRST_MSB 8
13499 /* The width in bits of the ALT_USB_HOST_HPRT_PRTRST register field. */
13500 #define ALT_USB_HOST_HPRT_PRTRST_WIDTH 1
13501 /* The mask used to set the ALT_USB_HOST_HPRT_PRTRST register field value. */
13502 #define ALT_USB_HOST_HPRT_PRTRST_SET_MSK 0x00000100
13503 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTRST register field value. */
13504 #define ALT_USB_HOST_HPRT_PRTRST_CLR_MSK 0xfffffeff
13505 /* The reset value of the ALT_USB_HOST_HPRT_PRTRST register field. */
13506 #define ALT_USB_HOST_HPRT_PRTRST_RESET 0x0
13507 /* Extracts the ALT_USB_HOST_HPRT_PRTRST field value from a register. */
13508 #define ALT_USB_HOST_HPRT_PRTRST_GET(value) (((value) & 0x00000100) >> 8)
13509 /* Produces a ALT_USB_HOST_HPRT_PRTRST register field value suitable for setting the register. */
13510 #define ALT_USB_HOST_HPRT_PRTRST_SET(value) (((value) << 8) & 0x00000100)
13511 
13512 /*
13513  * Field : Port Line Status - prtlnsts
13514  *
13515  * Indicates the current logic level USB data lines. Bit [10]: Logic level of D+
13516  * Bit [11]: Logic level of D-
13517  *
13518  * Field Enumeration Values:
13519  *
13520  * Enum | Value | Description
13521  * :------------------------------------|:------|:------------------
13522  * ALT_USB_HOST_HPRT_PRTLNSTS_E_PLUSD | 0x1 | Logic level of D+
13523  * ALT_USB_HOST_HPRT_PRTLNSTS_E_MINUSD | 0x2 | Logic level of D-
13524  *
13525  * Field Access Macros:
13526  *
13527  */
13528 /*
13529  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTLNSTS
13530  *
13531  * Logic level of D+
13532  */
13533 #define ALT_USB_HOST_HPRT_PRTLNSTS_E_PLUSD 0x1
13534 /*
13535  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTLNSTS
13536  *
13537  * Logic level of D-
13538  */
13539 #define ALT_USB_HOST_HPRT_PRTLNSTS_E_MINUSD 0x2
13540 
13541 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTLNSTS register field. */
13542 #define ALT_USB_HOST_HPRT_PRTLNSTS_LSB 10
13543 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTLNSTS register field. */
13544 #define ALT_USB_HOST_HPRT_PRTLNSTS_MSB 11
13545 /* The width in bits of the ALT_USB_HOST_HPRT_PRTLNSTS register field. */
13546 #define ALT_USB_HOST_HPRT_PRTLNSTS_WIDTH 2
13547 /* The mask used to set the ALT_USB_HOST_HPRT_PRTLNSTS register field value. */
13548 #define ALT_USB_HOST_HPRT_PRTLNSTS_SET_MSK 0x00000c00
13549 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTLNSTS register field value. */
13550 #define ALT_USB_HOST_HPRT_PRTLNSTS_CLR_MSK 0xfffff3ff
13551 /* The reset value of the ALT_USB_HOST_HPRT_PRTLNSTS register field. */
13552 #define ALT_USB_HOST_HPRT_PRTLNSTS_RESET 0x0
13553 /* Extracts the ALT_USB_HOST_HPRT_PRTLNSTS field value from a register. */
13554 #define ALT_USB_HOST_HPRT_PRTLNSTS_GET(value) (((value) & 0x00000c00) >> 10)
13555 /* Produces a ALT_USB_HOST_HPRT_PRTLNSTS register field value suitable for setting the register. */
13556 #define ALT_USB_HOST_HPRT_PRTLNSTS_SET(value) (((value) << 10) & 0x00000c00)
13557 
13558 /*
13559  * Field : Port Power - prtpwr
13560  *
13561  * The application uses this field to control power to this port, and the core can
13562  * clear this bit on an over current condition.
13563  *
13564  * Field Enumeration Values:
13565  *
13566  * Enum | Value | Description
13567  * :-------------------------------|:------|:------------
13568  * ALT_USB_HOST_HPRT_PRTPWR_E_OFF | 0x0 | Power off
13569  * ALT_USB_HOST_HPRT_PRTPWR_E_ON | 0x1 | Power on
13570  *
13571  * Field Access Macros:
13572  *
13573  */
13574 /*
13575  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTPWR
13576  *
13577  * Power off
13578  */
13579 #define ALT_USB_HOST_HPRT_PRTPWR_E_OFF 0x0
13580 /*
13581  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTPWR
13582  *
13583  * Power on
13584  */
13585 #define ALT_USB_HOST_HPRT_PRTPWR_E_ON 0x1
13586 
13587 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTPWR register field. */
13588 #define ALT_USB_HOST_HPRT_PRTPWR_LSB 12
13589 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTPWR register field. */
13590 #define ALT_USB_HOST_HPRT_PRTPWR_MSB 12
13591 /* The width in bits of the ALT_USB_HOST_HPRT_PRTPWR register field. */
13592 #define ALT_USB_HOST_HPRT_PRTPWR_WIDTH 1
13593 /* The mask used to set the ALT_USB_HOST_HPRT_PRTPWR register field value. */
13594 #define ALT_USB_HOST_HPRT_PRTPWR_SET_MSK 0x00001000
13595 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTPWR register field value. */
13596 #define ALT_USB_HOST_HPRT_PRTPWR_CLR_MSK 0xffffefff
13597 /* The reset value of the ALT_USB_HOST_HPRT_PRTPWR register field. */
13598 #define ALT_USB_HOST_HPRT_PRTPWR_RESET 0x0
13599 /* Extracts the ALT_USB_HOST_HPRT_PRTPWR field value from a register. */
13600 #define ALT_USB_HOST_HPRT_PRTPWR_GET(value) (((value) & 0x00001000) >> 12)
13601 /* Produces a ALT_USB_HOST_HPRT_PRTPWR register field value suitable for setting the register. */
13602 #define ALT_USB_HOST_HPRT_PRTPWR_SET(value) (((value) << 12) & 0x00001000)
13603 
13604 /*
13605  * Field : Port Test Control - prttstctl
13606  *
13607  * The application writes a nonzero value to this field to put the port into a Test
13608  * mode, and the corresponding pattern is signaled on the port.
13609  *
13610  * Field Enumeration Values:
13611  *
13612  * Enum | Value | Description
13613  * :---------------------------------------|:------|:-------------------
13614  * ALT_USB_HOST_HPRT_PRTTSTCTL_E_DISD | 0x0 | Test mode disabled
13615  * ALT_USB_HOST_HPRT_PRTTSTCTL_E_TESTJ | 0x1 | Test_J mode
13616  * ALT_USB_HOST_HPRT_PRTTSTCTL_E_TESTK | 0x2 | Test_K mode
13617  * ALT_USB_HOST_HPRT_PRTTSTCTL_E_TESTSN | 0x3 | Test_SE0_NAK mode
13618  * ALT_USB_HOST_HPRT_PRTTSTCTL_E_TESTPM | 0x4 | Test_Packet mode
13619  * ALT_USB_HOST_HPRT_PRTTSTCTL_E_TESTFENB | 0x5 | Test_force_Enable
13620  *
13621  * Field Access Macros:
13622  *
13623  */
13624 /*
13625  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTTSTCTL
13626  *
13627  * Test mode disabled
13628  */
13629 #define ALT_USB_HOST_HPRT_PRTTSTCTL_E_DISD 0x0
13630 /*
13631  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTTSTCTL
13632  *
13633  * Test_J mode
13634  */
13635 #define ALT_USB_HOST_HPRT_PRTTSTCTL_E_TESTJ 0x1
13636 /*
13637  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTTSTCTL
13638  *
13639  * Test_K mode
13640  */
13641 #define ALT_USB_HOST_HPRT_PRTTSTCTL_E_TESTK 0x2
13642 /*
13643  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTTSTCTL
13644  *
13645  * Test_SE0_NAK mode
13646  */
13647 #define ALT_USB_HOST_HPRT_PRTTSTCTL_E_TESTSN 0x3
13648 /*
13649  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTTSTCTL
13650  *
13651  * Test_Packet mode
13652  */
13653 #define ALT_USB_HOST_HPRT_PRTTSTCTL_E_TESTPM 0x4
13654 /*
13655  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTTSTCTL
13656  *
13657  * Test_force_Enable
13658  */
13659 #define ALT_USB_HOST_HPRT_PRTTSTCTL_E_TESTFENB 0x5
13660 
13661 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTTSTCTL register field. */
13662 #define ALT_USB_HOST_HPRT_PRTTSTCTL_LSB 13
13663 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTTSTCTL register field. */
13664 #define ALT_USB_HOST_HPRT_PRTTSTCTL_MSB 16
13665 /* The width in bits of the ALT_USB_HOST_HPRT_PRTTSTCTL register field. */
13666 #define ALT_USB_HOST_HPRT_PRTTSTCTL_WIDTH 4
13667 /* The mask used to set the ALT_USB_HOST_HPRT_PRTTSTCTL register field value. */
13668 #define ALT_USB_HOST_HPRT_PRTTSTCTL_SET_MSK 0x0001e000
13669 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTTSTCTL register field value. */
13670 #define ALT_USB_HOST_HPRT_PRTTSTCTL_CLR_MSK 0xfffe1fff
13671 /* The reset value of the ALT_USB_HOST_HPRT_PRTTSTCTL register field. */
13672 #define ALT_USB_HOST_HPRT_PRTTSTCTL_RESET 0x0
13673 /* Extracts the ALT_USB_HOST_HPRT_PRTTSTCTL field value from a register. */
13674 #define ALT_USB_HOST_HPRT_PRTTSTCTL_GET(value) (((value) & 0x0001e000) >> 13)
13675 /* Produces a ALT_USB_HOST_HPRT_PRTTSTCTL register field value suitable for setting the register. */
13676 #define ALT_USB_HOST_HPRT_PRTTSTCTL_SET(value) (((value) << 13) & 0x0001e000)
13677 
13678 /*
13679  * Field : Port Speed - prtspd
13680  *
13681  * Indicates the speed of the device attached to this port.
13682  *
13683  * Field Enumeration Values:
13684  *
13685  * Enum | Value | Description
13686  * :-----------------------------------|:------|:------------
13687  * ALT_USB_HOST_HPRT_PRTSPD_E_HIGHSPD | 0x0 | High speed
13688  * ALT_USB_HOST_HPRT_PRTSPD_E_FULLSPD | 0x1 | Full speed
13689  * ALT_USB_HOST_HPRT_PRTSPD_E_LOWSPD | 0x2 | Low speed
13690  * ALT_USB_HOST_HPRT_PRTSPD_E_RSVD | 0x3 | Reserved
13691  *
13692  * Field Access Macros:
13693  *
13694  */
13695 /*
13696  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTSPD
13697  *
13698  * High speed
13699  */
13700 #define ALT_USB_HOST_HPRT_PRTSPD_E_HIGHSPD 0x0
13701 /*
13702  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTSPD
13703  *
13704  * Full speed
13705  */
13706 #define ALT_USB_HOST_HPRT_PRTSPD_E_FULLSPD 0x1
13707 /*
13708  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTSPD
13709  *
13710  * Low speed
13711  */
13712 #define ALT_USB_HOST_HPRT_PRTSPD_E_LOWSPD 0x2
13713 /*
13714  * Enumerated value for register field ALT_USB_HOST_HPRT_PRTSPD
13715  *
13716  * Reserved
13717  */
13718 #define ALT_USB_HOST_HPRT_PRTSPD_E_RSVD 0x3
13719 
13720 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HPRT_PRTSPD register field. */
13721 #define ALT_USB_HOST_HPRT_PRTSPD_LSB 17
13722 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HPRT_PRTSPD register field. */
13723 #define ALT_USB_HOST_HPRT_PRTSPD_MSB 18
13724 /* The width in bits of the ALT_USB_HOST_HPRT_PRTSPD register field. */
13725 #define ALT_USB_HOST_HPRT_PRTSPD_WIDTH 2
13726 /* The mask used to set the ALT_USB_HOST_HPRT_PRTSPD register field value. */
13727 #define ALT_USB_HOST_HPRT_PRTSPD_SET_MSK 0x00060000
13728 /* The mask used to clear the ALT_USB_HOST_HPRT_PRTSPD register field value. */
13729 #define ALT_USB_HOST_HPRT_PRTSPD_CLR_MSK 0xfff9ffff
13730 /* The reset value of the ALT_USB_HOST_HPRT_PRTSPD register field. */
13731 #define ALT_USB_HOST_HPRT_PRTSPD_RESET 0x0
13732 /* Extracts the ALT_USB_HOST_HPRT_PRTSPD field value from a register. */
13733 #define ALT_USB_HOST_HPRT_PRTSPD_GET(value) (((value) & 0x00060000) >> 17)
13734 /* Produces a ALT_USB_HOST_HPRT_PRTSPD register field value suitable for setting the register. */
13735 #define ALT_USB_HOST_HPRT_PRTSPD_SET(value) (((value) << 17) & 0x00060000)
13736 
13737 #ifndef __ASSEMBLY__
13738 /*
13739  * WARNING: The C register and register group struct declarations are provided for
13740  * convenience and illustrative purposes. They should, however, be used with
13741  * caution as the C language standard provides no guarantees about the alignment or
13742  * atomicity of device memory accesses. The recommended practice for writing
13743  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
13744  * alt_write_word() functions.
13745  *
13746  * The struct declaration for register ALT_USB_HOST_HPRT.
13747  */
13748 struct ALT_USB_HOST_HPRT_s
13749 {
13750  const uint32_t prtconnsts : 1; /* Port Connect Status */
13751  const uint32_t PrtConnDet : 1; /* Port Connect Detected */
13752  const uint32_t prtena : 1; /* Port Enabl */
13753  const uint32_t prtenchng : 1; /* Port Enable Disable Change */
13754  const uint32_t prtovrcurract : 1; /* Port Overcurrent Active */
13755  const uint32_t prtovrcurrchng : 1; /* Port Overcurrent Change */
13756  uint32_t prtres : 1; /* Port Resume */
13757  const uint32_t prtsusp : 1; /* Port Suspend */
13758  uint32_t prtrst : 1; /* Port Reset */
13759  uint32_t : 1; /* *UNDEFINED* */
13760  const uint32_t prtlnsts : 2; /* Port Line Status */
13761  uint32_t prtpwr : 1; /* Port Power */
13762  uint32_t prttstctl : 4; /* Port Test Control */
13763  const uint32_t prtspd : 2; /* Port Speed */
13764  uint32_t : 13; /* *UNDEFINED* */
13765 };
13766 
13767 /* The typedef declaration for register ALT_USB_HOST_HPRT. */
13768 typedef volatile struct ALT_USB_HOST_HPRT_s ALT_USB_HOST_HPRT_t;
13769 #endif /* __ASSEMBLY__ */
13770 
13771 /* The byte offset of the ALT_USB_HOST_HPRT register from the beginning of the component. */
13772 #define ALT_USB_HOST_HPRT_OFST 0x40
13773 /* The address of the ALT_USB_HOST_HPRT register. */
13774 #define ALT_USB_HOST_HPRT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HPRT_OFST))
13775 
13776 /*
13777  * Register : Host Channel 0 Characteristics Register - hcchar0
13778  *
13779  * Channel_number: 0.
13780  *
13781  * Register Layout
13782  *
13783  * Bits | Access | Reset | Description
13784  * :--------|:-------|:------|:------------------------
13785  * [10:0] | RW | 0x0 | Maximum Packet Size
13786  * [14:11] | RW | 0x0 | Endpoint Number
13787  * [15] | RW | 0x0 | Endpoint Direction
13788  * [16] | ??? | 0x0 | *UNDEFINED*
13789  * [17] | RW | 0x0 | Low-Speed Device
13790  * [19:18] | RW | 0x0 | Endpoint Type
13791  * [21:20] | RW | 0x0 | Multi Count Error Count
13792  * [28:22] | RW | 0x0 | Device Address
13793  * [29] | ??? | 0x0 | *UNDEFINED*
13794  * [30] | R | 0x0 | Channel Disable
13795  * [31] | R | 0x0 | Channel Enable
13796  *
13797  */
13798 /*
13799  * Field : Maximum Packet Size - mps
13800  *
13801  * Indicates the maximum packet size of the associated endpoint.
13802  *
13803  * Field Access Macros:
13804  *
13805  */
13806 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR0_MPS register field. */
13807 #define ALT_USB_HOST_HCCHAR0_MPS_LSB 0
13808 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR0_MPS register field. */
13809 #define ALT_USB_HOST_HCCHAR0_MPS_MSB 10
13810 /* The width in bits of the ALT_USB_HOST_HCCHAR0_MPS register field. */
13811 #define ALT_USB_HOST_HCCHAR0_MPS_WIDTH 11
13812 /* The mask used to set the ALT_USB_HOST_HCCHAR0_MPS register field value. */
13813 #define ALT_USB_HOST_HCCHAR0_MPS_SET_MSK 0x000007ff
13814 /* The mask used to clear the ALT_USB_HOST_HCCHAR0_MPS register field value. */
13815 #define ALT_USB_HOST_HCCHAR0_MPS_CLR_MSK 0xfffff800
13816 /* The reset value of the ALT_USB_HOST_HCCHAR0_MPS register field. */
13817 #define ALT_USB_HOST_HCCHAR0_MPS_RESET 0x0
13818 /* Extracts the ALT_USB_HOST_HCCHAR0_MPS field value from a register. */
13819 #define ALT_USB_HOST_HCCHAR0_MPS_GET(value) (((value) & 0x000007ff) >> 0)
13820 /* Produces a ALT_USB_HOST_HCCHAR0_MPS register field value suitable for setting the register. */
13821 #define ALT_USB_HOST_HCCHAR0_MPS_SET(value) (((value) << 0) & 0x000007ff)
13822 
13823 /*
13824  * Field : Endpoint Number - epnum
13825  *
13826  * Indicates the endpoint number on the device serving as the data source or sink.
13827  *
13828  * Field Enumeration Values:
13829  *
13830  * Enum | Value | Description
13831  * :-------------------------------------|:------|:--------------
13832  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT0 | 0x0 | End point 0
13833  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT1 | 0x1 | End point 1
13834  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT2 | 0x2 | End point 2
13835  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT3 | 0x3 | End point 3
13836  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT4 | 0x4 | End point 4
13837  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT5 | 0x5 | End point 5
13838  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT6 | 0x6 | End point 6
13839  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT7 | 0x7 | End point 7
13840  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT8 | 0x8 | End point 8
13841  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT9 | 0x9 | End point 9
13842  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT10 | 0xa | End point 10
13843  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT11 | 0xb | End point 11
13844  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT12 | 0xc | End point 12
13845  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT13 | 0xd | End point 13
13846  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT14 | 0xe | End point 14
13847  * ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT15 | 0xf | End point 15
13848  *
13849  * Field Access Macros:
13850  *
13851  */
13852 /*
13853  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13854  *
13855  * End point 0
13856  */
13857 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT0 0x0
13858 /*
13859  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13860  *
13861  * End point 1
13862  */
13863 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT1 0x1
13864 /*
13865  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13866  *
13867  * End point 2
13868  */
13869 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT2 0x2
13870 /*
13871  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13872  *
13873  * End point 3
13874  */
13875 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT3 0x3
13876 /*
13877  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13878  *
13879  * End point 4
13880  */
13881 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT4 0x4
13882 /*
13883  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13884  *
13885  * End point 5
13886  */
13887 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT5 0x5
13888 /*
13889  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13890  *
13891  * End point 6
13892  */
13893 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT6 0x6
13894 /*
13895  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13896  *
13897  * End point 7
13898  */
13899 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT7 0x7
13900 /*
13901  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13902  *
13903  * End point 8
13904  */
13905 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT8 0x8
13906 /*
13907  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13908  *
13909  * End point 9
13910  */
13911 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT9 0x9
13912 /*
13913  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13914  *
13915  * End point 10
13916  */
13917 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT10 0xa
13918 /*
13919  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13920  *
13921  * End point 11
13922  */
13923 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT11 0xb
13924 /*
13925  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13926  *
13927  * End point 12
13928  */
13929 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT12 0xc
13930 /*
13931  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13932  *
13933  * End point 13
13934  */
13935 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT13 0xd
13936 /*
13937  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13938  *
13939  * End point 14
13940  */
13941 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT14 0xe
13942 /*
13943  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPNUM
13944  *
13945  * End point 15
13946  */
13947 #define ALT_USB_HOST_HCCHAR0_EPNUM_E_ENDPT15 0xf
13948 
13949 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR0_EPNUM register field. */
13950 #define ALT_USB_HOST_HCCHAR0_EPNUM_LSB 11
13951 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR0_EPNUM register field. */
13952 #define ALT_USB_HOST_HCCHAR0_EPNUM_MSB 14
13953 /* The width in bits of the ALT_USB_HOST_HCCHAR0_EPNUM register field. */
13954 #define ALT_USB_HOST_HCCHAR0_EPNUM_WIDTH 4
13955 /* The mask used to set the ALT_USB_HOST_HCCHAR0_EPNUM register field value. */
13956 #define ALT_USB_HOST_HCCHAR0_EPNUM_SET_MSK 0x00007800
13957 /* The mask used to clear the ALT_USB_HOST_HCCHAR0_EPNUM register field value. */
13958 #define ALT_USB_HOST_HCCHAR0_EPNUM_CLR_MSK 0xffff87ff
13959 /* The reset value of the ALT_USB_HOST_HCCHAR0_EPNUM register field. */
13960 #define ALT_USB_HOST_HCCHAR0_EPNUM_RESET 0x0
13961 /* Extracts the ALT_USB_HOST_HCCHAR0_EPNUM field value from a register. */
13962 #define ALT_USB_HOST_HCCHAR0_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
13963 /* Produces a ALT_USB_HOST_HCCHAR0_EPNUM register field value suitable for setting the register. */
13964 #define ALT_USB_HOST_HCCHAR0_EPNUM_SET(value) (((value) << 11) & 0x00007800)
13965 
13966 /*
13967  * Field : Endpoint Direction - epdir
13968  *
13969  * Indicates whether the transaction is IN or OUT.
13970  *
13971  * Field Enumeration Values:
13972  *
13973  * Enum | Value | Description
13974  * :------------------------------------|:------|:------------
13975  * ALT_USB_HOST_HCCHAR0_EPDIR_E_OUTDIR | 0x0 | OUT
13976  * ALT_USB_HOST_HCCHAR0_EPDIR_E_INDIR | 0x1 | IN
13977  *
13978  * Field Access Macros:
13979  *
13980  */
13981 /*
13982  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPDIR
13983  *
13984  * OUT
13985  */
13986 #define ALT_USB_HOST_HCCHAR0_EPDIR_E_OUTDIR 0x0
13987 /*
13988  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPDIR
13989  *
13990  * IN
13991  */
13992 #define ALT_USB_HOST_HCCHAR0_EPDIR_E_INDIR 0x1
13993 
13994 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR0_EPDIR register field. */
13995 #define ALT_USB_HOST_HCCHAR0_EPDIR_LSB 15
13996 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR0_EPDIR register field. */
13997 #define ALT_USB_HOST_HCCHAR0_EPDIR_MSB 15
13998 /* The width in bits of the ALT_USB_HOST_HCCHAR0_EPDIR register field. */
13999 #define ALT_USB_HOST_HCCHAR0_EPDIR_WIDTH 1
14000 /* The mask used to set the ALT_USB_HOST_HCCHAR0_EPDIR register field value. */
14001 #define ALT_USB_HOST_HCCHAR0_EPDIR_SET_MSK 0x00008000
14002 /* The mask used to clear the ALT_USB_HOST_HCCHAR0_EPDIR register field value. */
14003 #define ALT_USB_HOST_HCCHAR0_EPDIR_CLR_MSK 0xffff7fff
14004 /* The reset value of the ALT_USB_HOST_HCCHAR0_EPDIR register field. */
14005 #define ALT_USB_HOST_HCCHAR0_EPDIR_RESET 0x0
14006 /* Extracts the ALT_USB_HOST_HCCHAR0_EPDIR field value from a register. */
14007 #define ALT_USB_HOST_HCCHAR0_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
14008 /* Produces a ALT_USB_HOST_HCCHAR0_EPDIR register field value suitable for setting the register. */
14009 #define ALT_USB_HOST_HCCHAR0_EPDIR_SET(value) (((value) << 15) & 0x00008000)
14010 
14011 /*
14012  * Field : Low-Speed Device - lspddev
14013  *
14014  * This field is Set by the application to indicate that this channel is
14015  * communicating to a low-speed device. The application must program this bit when
14016  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
14017  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
14018  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
14019  * core ignores this bit even if it is set by the application software.
14020  *
14021  * Field Enumeration Values:
14022  *
14023  * Enum | Value | Description
14024  * :-------------------------------------------|:------|:--------------------------------
14025  * ALT_USB_HOST_HCCHAR0_LSPDDEV_E_NONLOWSPEED | 0x0 | Communicating with non lowspeed
14026  * ALT_USB_HOST_HCCHAR0_LSPDDEV_E_LOWSPEED | 0x1 | Communicating with lowspeed
14027  *
14028  * Field Access Macros:
14029  *
14030  */
14031 /*
14032  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_LSPDDEV
14033  *
14034  * Communicating with non lowspeed
14035  */
14036 #define ALT_USB_HOST_HCCHAR0_LSPDDEV_E_NONLOWSPEED 0x0
14037 /*
14038  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_LSPDDEV
14039  *
14040  * Communicating with lowspeed
14041  */
14042 #define ALT_USB_HOST_HCCHAR0_LSPDDEV_E_LOWSPEED 0x1
14043 
14044 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR0_LSPDDEV register field. */
14045 #define ALT_USB_HOST_HCCHAR0_LSPDDEV_LSB 17
14046 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR0_LSPDDEV register field. */
14047 #define ALT_USB_HOST_HCCHAR0_LSPDDEV_MSB 17
14048 /* The width in bits of the ALT_USB_HOST_HCCHAR0_LSPDDEV register field. */
14049 #define ALT_USB_HOST_HCCHAR0_LSPDDEV_WIDTH 1
14050 /* The mask used to set the ALT_USB_HOST_HCCHAR0_LSPDDEV register field value. */
14051 #define ALT_USB_HOST_HCCHAR0_LSPDDEV_SET_MSK 0x00020000
14052 /* The mask used to clear the ALT_USB_HOST_HCCHAR0_LSPDDEV register field value. */
14053 #define ALT_USB_HOST_HCCHAR0_LSPDDEV_CLR_MSK 0xfffdffff
14054 /* The reset value of the ALT_USB_HOST_HCCHAR0_LSPDDEV register field. */
14055 #define ALT_USB_HOST_HCCHAR0_LSPDDEV_RESET 0x0
14056 /* Extracts the ALT_USB_HOST_HCCHAR0_LSPDDEV field value from a register. */
14057 #define ALT_USB_HOST_HCCHAR0_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
14058 /* Produces a ALT_USB_HOST_HCCHAR0_LSPDDEV register field value suitable for setting the register. */
14059 #define ALT_USB_HOST_HCCHAR0_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
14060 
14061 /*
14062  * Field : Endpoint Type - eptype
14063  *
14064  * Indicates the transfer type selected.
14065  *
14066  * Field Enumeration Values:
14067  *
14068  * Enum | Value | Description
14069  * :-------------------------------------|:------|:------------
14070  * ALT_USB_HOST_HCCHAR0_EPTYPE_E_CTL | 0x0 | Control
14071  * ALT_USB_HOST_HCCHAR0_EPTYPE_E_ISOC | 0x1 | Isochronous
14072  * ALT_USB_HOST_HCCHAR0_EPTYPE_E_BULK | 0x2 | Bulk
14073  * ALT_USB_HOST_HCCHAR0_EPTYPE_E_INTERR | 0x3 | Interrupt
14074  *
14075  * Field Access Macros:
14076  *
14077  */
14078 /*
14079  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPTYPE
14080  *
14081  * Control
14082  */
14083 #define ALT_USB_HOST_HCCHAR0_EPTYPE_E_CTL 0x0
14084 /*
14085  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPTYPE
14086  *
14087  * Isochronous
14088  */
14089 #define ALT_USB_HOST_HCCHAR0_EPTYPE_E_ISOC 0x1
14090 /*
14091  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPTYPE
14092  *
14093  * Bulk
14094  */
14095 #define ALT_USB_HOST_HCCHAR0_EPTYPE_E_BULK 0x2
14096 /*
14097  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EPTYPE
14098  *
14099  * Interrupt
14100  */
14101 #define ALT_USB_HOST_HCCHAR0_EPTYPE_E_INTERR 0x3
14102 
14103 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR0_EPTYPE register field. */
14104 #define ALT_USB_HOST_HCCHAR0_EPTYPE_LSB 18
14105 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR0_EPTYPE register field. */
14106 #define ALT_USB_HOST_HCCHAR0_EPTYPE_MSB 19
14107 /* The width in bits of the ALT_USB_HOST_HCCHAR0_EPTYPE register field. */
14108 #define ALT_USB_HOST_HCCHAR0_EPTYPE_WIDTH 2
14109 /* The mask used to set the ALT_USB_HOST_HCCHAR0_EPTYPE register field value. */
14110 #define ALT_USB_HOST_HCCHAR0_EPTYPE_SET_MSK 0x000c0000
14111 /* The mask used to clear the ALT_USB_HOST_HCCHAR0_EPTYPE register field value. */
14112 #define ALT_USB_HOST_HCCHAR0_EPTYPE_CLR_MSK 0xfff3ffff
14113 /* The reset value of the ALT_USB_HOST_HCCHAR0_EPTYPE register field. */
14114 #define ALT_USB_HOST_HCCHAR0_EPTYPE_RESET 0x0
14115 /* Extracts the ALT_USB_HOST_HCCHAR0_EPTYPE field value from a register. */
14116 #define ALT_USB_HOST_HCCHAR0_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
14117 /* Produces a ALT_USB_HOST_HCCHAR0_EPTYPE register field value suitable for setting the register. */
14118 #define ALT_USB_HOST_HCCHAR0_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
14119 
14120 /*
14121  * Field : Multi Count Error Count - ec
14122  *
14123  * When the Split Enable bit of the Host Channel-n Split Control register
14124  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
14125  * transactions that must be executed per microframe for this periodic endpoint.
14126  * for non periodic transfers, this field is used only in DMA mode, and specifies
14127  * the number packets to be fetched for this channel before the internal DMA engine
14128  * changes arbitration. When HCSPLTn.SpltEna is Set (1'b1), this field indicates
14129  * the number of immediate retries to be performed for a periodic split
14130  * transactions on transaction errors. This field must be Set to at least 2'b01.
14131  *
14132  * Field Enumeration Values:
14133  *
14134  * Enum | Value | Description
14135  * :-------------------------------------|:------|:----------------------------------------------
14136  * ALT_USB_HOST_HCCHAR0_EC_E_RSVD | 0x0 | Reserved This field yields undefined results
14137  * ALT_USB_HOST_HCCHAR0_EC_E_TRANSONE | 0x1 | 1 transaction
14138  * ALT_USB_HOST_HCCHAR0_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
14139  * : | | per microframe
14140  * ALT_USB_HOST_HCCHAR0_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
14141  * : | | per microframe
14142  *
14143  * Field Access Macros:
14144  *
14145  */
14146 /*
14147  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EC
14148  *
14149  * Reserved This field yields undefined results
14150  */
14151 #define ALT_USB_HOST_HCCHAR0_EC_E_RSVD 0x0
14152 /*
14153  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EC
14154  *
14155  * 1 transaction
14156  */
14157 #define ALT_USB_HOST_HCCHAR0_EC_E_TRANSONE 0x1
14158 /*
14159  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EC
14160  *
14161  * 2 transactions to be issued for this endpoint per microframe
14162  */
14163 #define ALT_USB_HOST_HCCHAR0_EC_E_TRANSTWO 0x2
14164 /*
14165  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_EC
14166  *
14167  * 3 transactions to be issued for this endpoint per microframe
14168  */
14169 #define ALT_USB_HOST_HCCHAR0_EC_E_TRANSTHREE 0x3
14170 
14171 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR0_EC register field. */
14172 #define ALT_USB_HOST_HCCHAR0_EC_LSB 20
14173 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR0_EC register field. */
14174 #define ALT_USB_HOST_HCCHAR0_EC_MSB 21
14175 /* The width in bits of the ALT_USB_HOST_HCCHAR0_EC register field. */
14176 #define ALT_USB_HOST_HCCHAR0_EC_WIDTH 2
14177 /* The mask used to set the ALT_USB_HOST_HCCHAR0_EC register field value. */
14178 #define ALT_USB_HOST_HCCHAR0_EC_SET_MSK 0x00300000
14179 /* The mask used to clear the ALT_USB_HOST_HCCHAR0_EC register field value. */
14180 #define ALT_USB_HOST_HCCHAR0_EC_CLR_MSK 0xffcfffff
14181 /* The reset value of the ALT_USB_HOST_HCCHAR0_EC register field. */
14182 #define ALT_USB_HOST_HCCHAR0_EC_RESET 0x0
14183 /* Extracts the ALT_USB_HOST_HCCHAR0_EC field value from a register. */
14184 #define ALT_USB_HOST_HCCHAR0_EC_GET(value) (((value) & 0x00300000) >> 20)
14185 /* Produces a ALT_USB_HOST_HCCHAR0_EC register field value suitable for setting the register. */
14186 #define ALT_USB_HOST_HCCHAR0_EC_SET(value) (((value) << 20) & 0x00300000)
14187 
14188 /*
14189  * Field : Device Address - devaddr
14190  *
14191  * This field selects the specific device serving as the data source or sink.
14192  *
14193  * Field Access Macros:
14194  *
14195  */
14196 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR0_DEVADDR register field. */
14197 #define ALT_USB_HOST_HCCHAR0_DEVADDR_LSB 22
14198 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR0_DEVADDR register field. */
14199 #define ALT_USB_HOST_HCCHAR0_DEVADDR_MSB 28
14200 /* The width in bits of the ALT_USB_HOST_HCCHAR0_DEVADDR register field. */
14201 #define ALT_USB_HOST_HCCHAR0_DEVADDR_WIDTH 7
14202 /* The mask used to set the ALT_USB_HOST_HCCHAR0_DEVADDR register field value. */
14203 #define ALT_USB_HOST_HCCHAR0_DEVADDR_SET_MSK 0x1fc00000
14204 /* The mask used to clear the ALT_USB_HOST_HCCHAR0_DEVADDR register field value. */
14205 #define ALT_USB_HOST_HCCHAR0_DEVADDR_CLR_MSK 0xe03fffff
14206 /* The reset value of the ALT_USB_HOST_HCCHAR0_DEVADDR register field. */
14207 #define ALT_USB_HOST_HCCHAR0_DEVADDR_RESET 0x0
14208 /* Extracts the ALT_USB_HOST_HCCHAR0_DEVADDR field value from a register. */
14209 #define ALT_USB_HOST_HCCHAR0_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
14210 /* Produces a ALT_USB_HOST_HCCHAR0_DEVADDR register field value suitable for setting the register. */
14211 #define ALT_USB_HOST_HCCHAR0_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
14212 
14213 /*
14214  * Field : Channel Disable - chdis
14215  *
14216  * The application sets this bit to stop transmitting/receiving data on a channel,
14217  * even before the transfer for that channel is complete. The application must wait
14218  * for the Channel Disabled interrupt before treating the channel as disabled.
14219  *
14220  * Field Enumeration Values:
14221  *
14222  * Enum | Value | Description
14223  * :-----------------------------------|:------|:---------------------------------
14224  * ALT_USB_HOST_HCCHAR0_CHDIS_E_INACT | 0x0 | No activity
14225  * ALT_USB_HOST_HCCHAR0_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving data
14226  *
14227  * Field Access Macros:
14228  *
14229  */
14230 /*
14231  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_CHDIS
14232  *
14233  * No activity
14234  */
14235 #define ALT_USB_HOST_HCCHAR0_CHDIS_E_INACT 0x0
14236 /*
14237  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_CHDIS
14238  *
14239  * Stop transmitting/receiving data
14240  */
14241 #define ALT_USB_HOST_HCCHAR0_CHDIS_E_ACT 0x1
14242 
14243 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR0_CHDIS register field. */
14244 #define ALT_USB_HOST_HCCHAR0_CHDIS_LSB 30
14245 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR0_CHDIS register field. */
14246 #define ALT_USB_HOST_HCCHAR0_CHDIS_MSB 30
14247 /* The width in bits of the ALT_USB_HOST_HCCHAR0_CHDIS register field. */
14248 #define ALT_USB_HOST_HCCHAR0_CHDIS_WIDTH 1
14249 /* The mask used to set the ALT_USB_HOST_HCCHAR0_CHDIS register field value. */
14250 #define ALT_USB_HOST_HCCHAR0_CHDIS_SET_MSK 0x40000000
14251 /* The mask used to clear the ALT_USB_HOST_HCCHAR0_CHDIS register field value. */
14252 #define ALT_USB_HOST_HCCHAR0_CHDIS_CLR_MSK 0xbfffffff
14253 /* The reset value of the ALT_USB_HOST_HCCHAR0_CHDIS register field. */
14254 #define ALT_USB_HOST_HCCHAR0_CHDIS_RESET 0x0
14255 /* Extracts the ALT_USB_HOST_HCCHAR0_CHDIS field value from a register. */
14256 #define ALT_USB_HOST_HCCHAR0_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
14257 /* Produces a ALT_USB_HOST_HCCHAR0_CHDIS register field value suitable for setting the register. */
14258 #define ALT_USB_HOST_HCCHAR0_CHDIS_SET(value) (((value) << 30) & 0x40000000)
14259 
14260 /*
14261  * Field : Channel Enable - chena
14262  *
14263  * When Scatter/Gather mode is disabled. This field is set by the application and
14264  * cleared by the OTG host.
14265  *
14266  * Field Enumeration Values:
14267  *
14268  * Enum | Value | Description
14269  * :------------------------------------|:------|:-------------------------------------------------
14270  * ALT_USB_HOST_HCCHAR0_CHENA_E_NOTRDY | 0x0 | Indicates that the descriptor structure is not
14271  * : | | yet ready
14272  * ALT_USB_HOST_HCCHAR0_CHENA_E_RDY | 0x1 | Indicates that the descriptor structure and data
14273  * : | | buffer with data is setup and this channel can
14274  * : | | access the descriptor
14275  *
14276  * Field Access Macros:
14277  *
14278  */
14279 /*
14280  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_CHENA
14281  *
14282  * Indicates that the descriptor structure is not yet ready
14283  */
14284 #define ALT_USB_HOST_HCCHAR0_CHENA_E_NOTRDY 0x0
14285 /*
14286  * Enumerated value for register field ALT_USB_HOST_HCCHAR0_CHENA
14287  *
14288  * Indicates that the descriptor structure and data buffer with data is setup and
14289  * this channel can access the descriptor
14290  */
14291 #define ALT_USB_HOST_HCCHAR0_CHENA_E_RDY 0x1
14292 
14293 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR0_CHENA register field. */
14294 #define ALT_USB_HOST_HCCHAR0_CHENA_LSB 31
14295 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR0_CHENA register field. */
14296 #define ALT_USB_HOST_HCCHAR0_CHENA_MSB 31
14297 /* The width in bits of the ALT_USB_HOST_HCCHAR0_CHENA register field. */
14298 #define ALT_USB_HOST_HCCHAR0_CHENA_WIDTH 1
14299 /* The mask used to set the ALT_USB_HOST_HCCHAR0_CHENA register field value. */
14300 #define ALT_USB_HOST_HCCHAR0_CHENA_SET_MSK 0x80000000
14301 /* The mask used to clear the ALT_USB_HOST_HCCHAR0_CHENA register field value. */
14302 #define ALT_USB_HOST_HCCHAR0_CHENA_CLR_MSK 0x7fffffff
14303 /* The reset value of the ALT_USB_HOST_HCCHAR0_CHENA register field. */
14304 #define ALT_USB_HOST_HCCHAR0_CHENA_RESET 0x0
14305 /* Extracts the ALT_USB_HOST_HCCHAR0_CHENA field value from a register. */
14306 #define ALT_USB_HOST_HCCHAR0_CHENA_GET(value) (((value) & 0x80000000) >> 31)
14307 /* Produces a ALT_USB_HOST_HCCHAR0_CHENA register field value suitable for setting the register. */
14308 #define ALT_USB_HOST_HCCHAR0_CHENA_SET(value) (((value) << 31) & 0x80000000)
14309 
14310 #ifndef __ASSEMBLY__
14311 /*
14312  * WARNING: The C register and register group struct declarations are provided for
14313  * convenience and illustrative purposes. They should, however, be used with
14314  * caution as the C language standard provides no guarantees about the alignment or
14315  * atomicity of device memory accesses. The recommended practice for writing
14316  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
14317  * alt_write_word() functions.
14318  *
14319  * The struct declaration for register ALT_USB_HOST_HCCHAR0.
14320  */
14321 struct ALT_USB_HOST_HCCHAR0_s
14322 {
14323  uint32_t mps : 11; /* Maximum Packet Size */
14324  uint32_t epnum : 4; /* Endpoint Number */
14325  uint32_t epdir : 1; /* Endpoint Direction */
14326  uint32_t : 1; /* *UNDEFINED* */
14327  uint32_t lspddev : 1; /* Low-Speed Device */
14328  uint32_t eptype : 2; /* Endpoint Type */
14329  uint32_t ec : 2; /* Multi Count Error Count */
14330  uint32_t devaddr : 7; /* Device Address */
14331  uint32_t : 1; /* *UNDEFINED* */
14332  const uint32_t chdis : 1; /* Channel Disable */
14333  const uint32_t chena : 1; /* Channel Enable */
14334 };
14335 
14336 /* The typedef declaration for register ALT_USB_HOST_HCCHAR0. */
14337 typedef volatile struct ALT_USB_HOST_HCCHAR0_s ALT_USB_HOST_HCCHAR0_t;
14338 #endif /* __ASSEMBLY__ */
14339 
14340 /* The byte offset of the ALT_USB_HOST_HCCHAR0 register from the beginning of the component. */
14341 #define ALT_USB_HOST_HCCHAR0_OFST 0x100
14342 /* The address of the ALT_USB_HOST_HCCHAR0 register. */
14343 #define ALT_USB_HOST_HCCHAR0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR0_OFST))
14344 
14345 /*
14346  * Register : Host Channel 0 Split Control Register - hcsplt0
14347  *
14348  * Channel_number 0
14349  *
14350  * Register Layout
14351  *
14352  * Bits | Access | Reset | Description
14353  * :--------|:-------|:------|:---------------------
14354  * [6:0] | RW | 0x0 | Port Address
14355  * [13:7] | RW | 0x0 | Hub Address
14356  * [15:14] | RW | 0x0 | Transaction Position
14357  * [16] | RW | 0x0 | Do Complete Split
14358  * [30:17] | ??? | 0x0 | *UNDEFINED*
14359  * [31] | RW | 0x0 | Split Enable
14360  *
14361  */
14362 /*
14363  * Field : Port Address - prtaddr
14364  *
14365  * This field is the port number of the recipient transactiontranslator.
14366  *
14367  * Field Access Macros:
14368  *
14369  */
14370 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT0_PRTADDR register field. */
14371 #define ALT_USB_HOST_HCSPLT0_PRTADDR_LSB 0
14372 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT0_PRTADDR register field. */
14373 #define ALT_USB_HOST_HCSPLT0_PRTADDR_MSB 6
14374 /* The width in bits of the ALT_USB_HOST_HCSPLT0_PRTADDR register field. */
14375 #define ALT_USB_HOST_HCSPLT0_PRTADDR_WIDTH 7
14376 /* The mask used to set the ALT_USB_HOST_HCSPLT0_PRTADDR register field value. */
14377 #define ALT_USB_HOST_HCSPLT0_PRTADDR_SET_MSK 0x0000007f
14378 /* The mask used to clear the ALT_USB_HOST_HCSPLT0_PRTADDR register field value. */
14379 #define ALT_USB_HOST_HCSPLT0_PRTADDR_CLR_MSK 0xffffff80
14380 /* The reset value of the ALT_USB_HOST_HCSPLT0_PRTADDR register field. */
14381 #define ALT_USB_HOST_HCSPLT0_PRTADDR_RESET 0x0
14382 /* Extracts the ALT_USB_HOST_HCSPLT0_PRTADDR field value from a register. */
14383 #define ALT_USB_HOST_HCSPLT0_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
14384 /* Produces a ALT_USB_HOST_HCSPLT0_PRTADDR register field value suitable for setting the register. */
14385 #define ALT_USB_HOST_HCSPLT0_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
14386 
14387 /*
14388  * Field : Hub Address - hubaddr
14389  *
14390  * This field holds the device address of the transaction translator's hub.
14391  *
14392  * Field Access Macros:
14393  *
14394  */
14395 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT0_HUBADDR register field. */
14396 #define ALT_USB_HOST_HCSPLT0_HUBADDR_LSB 7
14397 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT0_HUBADDR register field. */
14398 #define ALT_USB_HOST_HCSPLT0_HUBADDR_MSB 13
14399 /* The width in bits of the ALT_USB_HOST_HCSPLT0_HUBADDR register field. */
14400 #define ALT_USB_HOST_HCSPLT0_HUBADDR_WIDTH 7
14401 /* The mask used to set the ALT_USB_HOST_HCSPLT0_HUBADDR register field value. */
14402 #define ALT_USB_HOST_HCSPLT0_HUBADDR_SET_MSK 0x00003f80
14403 /* The mask used to clear the ALT_USB_HOST_HCSPLT0_HUBADDR register field value. */
14404 #define ALT_USB_HOST_HCSPLT0_HUBADDR_CLR_MSK 0xffffc07f
14405 /* The reset value of the ALT_USB_HOST_HCSPLT0_HUBADDR register field. */
14406 #define ALT_USB_HOST_HCSPLT0_HUBADDR_RESET 0x0
14407 /* Extracts the ALT_USB_HOST_HCSPLT0_HUBADDR field value from a register. */
14408 #define ALT_USB_HOST_HCSPLT0_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
14409 /* Produces a ALT_USB_HOST_HCSPLT0_HUBADDR register field value suitable for setting the register. */
14410 #define ALT_USB_HOST_HCSPLT0_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
14411 
14412 /*
14413  * Field : Transaction Position - xactpos
14414  *
14415  * This field is used to determine whether to send all, first, middle, or last
14416  * payloads with each OUT transaction.
14417  *
14418  * Field Enumeration Values:
14419  *
14420  * Enum | Value | Description
14421  * :--------------------------------------|:------|:------------------------------------------------
14422  * ALT_USB_HOST_HCSPLT0_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
14423  * : | | transaction (which is larger than 188 bytes)
14424  * ALT_USB_HOST_HCSPLT0_XACTPOS_E_END | 0x1 | End. This is the last payload of this
14425  * : | | transaction (which is larger than 188 bytes)
14426  * ALT_USB_HOST_HCSPLT0_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
14427  * : | | transaction (which is larger than 188 bytes)
14428  * ALT_USB_HOST_HCSPLT0_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
14429  * : | | transaction (which is less than or equal to 188
14430  * : | | bytes)
14431  *
14432  * Field Access Macros:
14433  *
14434  */
14435 /*
14436  * Enumerated value for register field ALT_USB_HOST_HCSPLT0_XACTPOS
14437  *
14438  * Mid. This is the middle payload of this transaction (which is larger than 188
14439  * bytes)
14440  */
14441 #define ALT_USB_HOST_HCSPLT0_XACTPOS_E_MIDDLE 0x0
14442 /*
14443  * Enumerated value for register field ALT_USB_HOST_HCSPLT0_XACTPOS
14444  *
14445  * End. This is the last payload of this transaction (which is larger than 188
14446  * bytes)
14447  */
14448 #define ALT_USB_HOST_HCSPLT0_XACTPOS_E_END 0x1
14449 /*
14450  * Enumerated value for register field ALT_USB_HOST_HCSPLT0_XACTPOS
14451  *
14452  * Begin. This is the first data payload of this transaction (which is larger than
14453  * 188 bytes)
14454  */
14455 #define ALT_USB_HOST_HCSPLT0_XACTPOS_E_BEGIN 0x2
14456 /*
14457  * Enumerated value for register field ALT_USB_HOST_HCSPLT0_XACTPOS
14458  *
14459  * All. This is the entire data payload is of this transaction (which is less than
14460  * or equal to 188 bytes)
14461  */
14462 #define ALT_USB_HOST_HCSPLT0_XACTPOS_E_ALL 0x3
14463 
14464 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT0_XACTPOS register field. */
14465 #define ALT_USB_HOST_HCSPLT0_XACTPOS_LSB 14
14466 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT0_XACTPOS register field. */
14467 #define ALT_USB_HOST_HCSPLT0_XACTPOS_MSB 15
14468 /* The width in bits of the ALT_USB_HOST_HCSPLT0_XACTPOS register field. */
14469 #define ALT_USB_HOST_HCSPLT0_XACTPOS_WIDTH 2
14470 /* The mask used to set the ALT_USB_HOST_HCSPLT0_XACTPOS register field value. */
14471 #define ALT_USB_HOST_HCSPLT0_XACTPOS_SET_MSK 0x0000c000
14472 /* The mask used to clear the ALT_USB_HOST_HCSPLT0_XACTPOS register field value. */
14473 #define ALT_USB_HOST_HCSPLT0_XACTPOS_CLR_MSK 0xffff3fff
14474 /* The reset value of the ALT_USB_HOST_HCSPLT0_XACTPOS register field. */
14475 #define ALT_USB_HOST_HCSPLT0_XACTPOS_RESET 0x0
14476 /* Extracts the ALT_USB_HOST_HCSPLT0_XACTPOS field value from a register. */
14477 #define ALT_USB_HOST_HCSPLT0_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
14478 /* Produces a ALT_USB_HOST_HCSPLT0_XACTPOS register field value suitable for setting the register. */
14479 #define ALT_USB_HOST_HCSPLT0_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
14480 
14481 /*
14482  * Field : Do Complete Split - compsplt
14483  *
14484  * The application sets this field to request the OTG host to perform a complete
14485  * split transaction.
14486  *
14487  * Field Enumeration Values:
14488  *
14489  * Enum | Value | Description
14490  * :----------------------------------------|:------|:---------------------
14491  * ALT_USB_HOST_HCSPLT0_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
14492  * ALT_USB_HOST_HCSPLT0_COMPSPLT_E_SPLIT | 0x1 | Split transaction
14493  *
14494  * Field Access Macros:
14495  *
14496  */
14497 /*
14498  * Enumerated value for register field ALT_USB_HOST_HCSPLT0_COMPSPLT
14499  *
14500  * No split transaction
14501  */
14502 #define ALT_USB_HOST_HCSPLT0_COMPSPLT_E_NOSPLIT 0x0
14503 /*
14504  * Enumerated value for register field ALT_USB_HOST_HCSPLT0_COMPSPLT
14505  *
14506  * Split transaction
14507  */
14508 #define ALT_USB_HOST_HCSPLT0_COMPSPLT_E_SPLIT 0x1
14509 
14510 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT0_COMPSPLT register field. */
14511 #define ALT_USB_HOST_HCSPLT0_COMPSPLT_LSB 16
14512 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT0_COMPSPLT register field. */
14513 #define ALT_USB_HOST_HCSPLT0_COMPSPLT_MSB 16
14514 /* The width in bits of the ALT_USB_HOST_HCSPLT0_COMPSPLT register field. */
14515 #define ALT_USB_HOST_HCSPLT0_COMPSPLT_WIDTH 1
14516 /* The mask used to set the ALT_USB_HOST_HCSPLT0_COMPSPLT register field value. */
14517 #define ALT_USB_HOST_HCSPLT0_COMPSPLT_SET_MSK 0x00010000
14518 /* The mask used to clear the ALT_USB_HOST_HCSPLT0_COMPSPLT register field value. */
14519 #define ALT_USB_HOST_HCSPLT0_COMPSPLT_CLR_MSK 0xfffeffff
14520 /* The reset value of the ALT_USB_HOST_HCSPLT0_COMPSPLT register field. */
14521 #define ALT_USB_HOST_HCSPLT0_COMPSPLT_RESET 0x0
14522 /* Extracts the ALT_USB_HOST_HCSPLT0_COMPSPLT field value from a register. */
14523 #define ALT_USB_HOST_HCSPLT0_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
14524 /* Produces a ALT_USB_HOST_HCSPLT0_COMPSPLT register field value suitable for setting the register. */
14525 #define ALT_USB_HOST_HCSPLT0_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
14526 
14527 /*
14528  * Field : Split Enable - spltena
14529  *
14530  * The application sets this field to indicate that this channel is enabled to
14531  * perform split transactions.
14532  *
14533  * Field Enumeration Values:
14534  *
14535  * Enum | Value | Description
14536  * :------------------------------------|:------|:------------------
14537  * ALT_USB_HOST_HCSPLT0_SPLTENA_E_DISD | 0x0 | Split not enabled
14538  * ALT_USB_HOST_HCSPLT0_SPLTENA_E_END | 0x1 | Split enabled
14539  *
14540  * Field Access Macros:
14541  *
14542  */
14543 /*
14544  * Enumerated value for register field ALT_USB_HOST_HCSPLT0_SPLTENA
14545  *
14546  * Split not enabled
14547  */
14548 #define ALT_USB_HOST_HCSPLT0_SPLTENA_E_DISD 0x0
14549 /*
14550  * Enumerated value for register field ALT_USB_HOST_HCSPLT0_SPLTENA
14551  *
14552  * Split enabled
14553  */
14554 #define ALT_USB_HOST_HCSPLT0_SPLTENA_E_END 0x1
14555 
14556 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT0_SPLTENA register field. */
14557 #define ALT_USB_HOST_HCSPLT0_SPLTENA_LSB 31
14558 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT0_SPLTENA register field. */
14559 #define ALT_USB_HOST_HCSPLT0_SPLTENA_MSB 31
14560 /* The width in bits of the ALT_USB_HOST_HCSPLT0_SPLTENA register field. */
14561 #define ALT_USB_HOST_HCSPLT0_SPLTENA_WIDTH 1
14562 /* The mask used to set the ALT_USB_HOST_HCSPLT0_SPLTENA register field value. */
14563 #define ALT_USB_HOST_HCSPLT0_SPLTENA_SET_MSK 0x80000000
14564 /* The mask used to clear the ALT_USB_HOST_HCSPLT0_SPLTENA register field value. */
14565 #define ALT_USB_HOST_HCSPLT0_SPLTENA_CLR_MSK 0x7fffffff
14566 /* The reset value of the ALT_USB_HOST_HCSPLT0_SPLTENA register field. */
14567 #define ALT_USB_HOST_HCSPLT0_SPLTENA_RESET 0x0
14568 /* Extracts the ALT_USB_HOST_HCSPLT0_SPLTENA field value from a register. */
14569 #define ALT_USB_HOST_HCSPLT0_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
14570 /* Produces a ALT_USB_HOST_HCSPLT0_SPLTENA register field value suitable for setting the register. */
14571 #define ALT_USB_HOST_HCSPLT0_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
14572 
14573 #ifndef __ASSEMBLY__
14574 /*
14575  * WARNING: The C register and register group struct declarations are provided for
14576  * convenience and illustrative purposes. They should, however, be used with
14577  * caution as the C language standard provides no guarantees about the alignment or
14578  * atomicity of device memory accesses. The recommended practice for writing
14579  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
14580  * alt_write_word() functions.
14581  *
14582  * The struct declaration for register ALT_USB_HOST_HCSPLT0.
14583  */
14584 struct ALT_USB_HOST_HCSPLT0_s
14585 {
14586  uint32_t prtaddr : 7; /* Port Address */
14587  uint32_t hubaddr : 7; /* Hub Address */
14588  uint32_t xactpos : 2; /* Transaction Position */
14589  uint32_t compsplt : 1; /* Do Complete Split */
14590  uint32_t : 14; /* *UNDEFINED* */
14591  uint32_t spltena : 1; /* Split Enable */
14592 };
14593 
14594 /* The typedef declaration for register ALT_USB_HOST_HCSPLT0. */
14595 typedef volatile struct ALT_USB_HOST_HCSPLT0_s ALT_USB_HOST_HCSPLT0_t;
14596 #endif /* __ASSEMBLY__ */
14597 
14598 /* The byte offset of the ALT_USB_HOST_HCSPLT0 register from the beginning of the component. */
14599 #define ALT_USB_HOST_HCSPLT0_OFST 0x104
14600 /* The address of the ALT_USB_HOST_HCSPLT0 register. */
14601 #define ALT_USB_HOST_HCSPLT0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT0_OFST))
14602 
14603 /*
14604  * Register : Host Channel 0 Interrupt Register - hcint0
14605  *
14606  * This register indicates the status of a channel with respect to USB- and AHB-
14607  * related events. The application must read this register when the Host Channels
14608  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
14609  * application can read this register, it must first read the Host All Channels
14610  * Interrupt (HAINT) register to get the exact channel number for the Host
14611  * Channel-n Interrupt register. The application must clear the appropriate bit in
14612  * this register to clear the corresponding bits in the HAINT and GINTSTS
14613  * registers.
14614  *
14615  * Register Layout
14616  *
14617  * Bits | Access | Reset | Description
14618  * :--------|:-------|:------|:--------------------------------------------
14619  * [0] | R | 0x0 | Transfer Completed
14620  * [1] | R | 0x0 | Channel Halted
14621  * [2] | R | 0x0 | AHB Error
14622  * [3] | R | 0x0 | STALL Response Received Interrupt
14623  * [4] | R | 0x0 | NAK Response Received Interrupt
14624  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
14625  * [6] | R | 0x0 | NYET Response Received Interrupt
14626  * [7] | R | 0x0 | Transaction Error
14627  * [8] | R | 0x0 | Babble Error
14628  * [9] | R | 0x0 | Frame Overrun
14629  * [10] | R | 0x0 | Data Toggle Error
14630  * [11] | R | 0x0 | BNA Interrupt
14631  * [12] | R | 0x0 | Excessive Transaction Error
14632  * [13] | R | 0x0 | Descriptor rollover interrupt
14633  * [31:14] | ??? | 0x0 | *UNDEFINED*
14634  *
14635  */
14636 /*
14637  * Field : Transfer Completed - xfercompl
14638  *
14639  * Transfer completed normally without any errors. This bit can be set only by the
14640  * core and the application should write 1 to clear it.
14641  *
14642  * Field Enumeration Values:
14643  *
14644  * Enum | Value | Description
14645  * :--------------------------------------|:------|:-----------------------------------------------
14646  * ALT_USB_HOST_HCINT0_XFERCOMPL_E_INACT | 0x0 | No transfer
14647  * ALT_USB_HOST_HCINT0_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
14648  *
14649  * Field Access Macros:
14650  *
14651  */
14652 /*
14653  * Enumerated value for register field ALT_USB_HOST_HCINT0_XFERCOMPL
14654  *
14655  * No transfer
14656  */
14657 #define ALT_USB_HOST_HCINT0_XFERCOMPL_E_INACT 0x0
14658 /*
14659  * Enumerated value for register field ALT_USB_HOST_HCINT0_XFERCOMPL
14660  *
14661  * Transfer completed normally without any errors
14662  */
14663 #define ALT_USB_HOST_HCINT0_XFERCOMPL_E_ACT 0x1
14664 
14665 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_XFERCOMPL register field. */
14666 #define ALT_USB_HOST_HCINT0_XFERCOMPL_LSB 0
14667 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_XFERCOMPL register field. */
14668 #define ALT_USB_HOST_HCINT0_XFERCOMPL_MSB 0
14669 /* The width in bits of the ALT_USB_HOST_HCINT0_XFERCOMPL register field. */
14670 #define ALT_USB_HOST_HCINT0_XFERCOMPL_WIDTH 1
14671 /* The mask used to set the ALT_USB_HOST_HCINT0_XFERCOMPL register field value. */
14672 #define ALT_USB_HOST_HCINT0_XFERCOMPL_SET_MSK 0x00000001
14673 /* The mask used to clear the ALT_USB_HOST_HCINT0_XFERCOMPL register field value. */
14674 #define ALT_USB_HOST_HCINT0_XFERCOMPL_CLR_MSK 0xfffffffe
14675 /* The reset value of the ALT_USB_HOST_HCINT0_XFERCOMPL register field. */
14676 #define ALT_USB_HOST_HCINT0_XFERCOMPL_RESET 0x0
14677 /* Extracts the ALT_USB_HOST_HCINT0_XFERCOMPL field value from a register. */
14678 #define ALT_USB_HOST_HCINT0_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
14679 /* Produces a ALT_USB_HOST_HCINT0_XFERCOMPL register field value suitable for setting the register. */
14680 #define ALT_USB_HOST_HCINT0_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
14681 
14682 /*
14683  * Field : Channel Halted - chhltd
14684  *
14685  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
14686  * either because of any USB transaction error or in response to disable request by
14687  * the application or because of a completed transfer. In Scatter/gather DMA mode,
14688  * this indicates that transfer completed due to any of the following
14689  *
14690  * . EOL being set in descriptor
14691  *
14692  * . AHB error
14693  *
14694  * . Excessive transaction errors
14695  *
14696  * . Babble
14697  *
14698  * . Stall
14699  *
14700  * Field Enumeration Values:
14701  *
14702  * Enum | Value | Description
14703  * :-----------------------------------|:------|:-------------------
14704  * ALT_USB_HOST_HCINT0_CHHLTD_E_INACT | 0x0 | Channel not halted
14705  * ALT_USB_HOST_HCINT0_CHHLTD_E_ACT | 0x1 | Channel Halted
14706  *
14707  * Field Access Macros:
14708  *
14709  */
14710 /*
14711  * Enumerated value for register field ALT_USB_HOST_HCINT0_CHHLTD
14712  *
14713  * Channel not halted
14714  */
14715 #define ALT_USB_HOST_HCINT0_CHHLTD_E_INACT 0x0
14716 /*
14717  * Enumerated value for register field ALT_USB_HOST_HCINT0_CHHLTD
14718  *
14719  * Channel Halted
14720  */
14721 #define ALT_USB_HOST_HCINT0_CHHLTD_E_ACT 0x1
14722 
14723 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_CHHLTD register field. */
14724 #define ALT_USB_HOST_HCINT0_CHHLTD_LSB 1
14725 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_CHHLTD register field. */
14726 #define ALT_USB_HOST_HCINT0_CHHLTD_MSB 1
14727 /* The width in bits of the ALT_USB_HOST_HCINT0_CHHLTD register field. */
14728 #define ALT_USB_HOST_HCINT0_CHHLTD_WIDTH 1
14729 /* The mask used to set the ALT_USB_HOST_HCINT0_CHHLTD register field value. */
14730 #define ALT_USB_HOST_HCINT0_CHHLTD_SET_MSK 0x00000002
14731 /* The mask used to clear the ALT_USB_HOST_HCINT0_CHHLTD register field value. */
14732 #define ALT_USB_HOST_HCINT0_CHHLTD_CLR_MSK 0xfffffffd
14733 /* The reset value of the ALT_USB_HOST_HCINT0_CHHLTD register field. */
14734 #define ALT_USB_HOST_HCINT0_CHHLTD_RESET 0x0
14735 /* Extracts the ALT_USB_HOST_HCINT0_CHHLTD field value from a register. */
14736 #define ALT_USB_HOST_HCINT0_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
14737 /* Produces a ALT_USB_HOST_HCINT0_CHHLTD register field value suitable for setting the register. */
14738 #define ALT_USB_HOST_HCINT0_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
14739 
14740 /*
14741  * Field : AHB Error - ahberr
14742  *
14743  * This is generated only in Internal DMA mode when there is an AHB error during
14744  * AHB read/write. The application can read the corresponding channel's DMA address
14745  * register to get the error address.
14746  *
14747  * Field Enumeration Values:
14748  *
14749  * Enum | Value | Description
14750  * :-----------------------------------|:------|:--------------------------------
14751  * ALT_USB_HOST_HCINT0_AHBERR_E_INACT | 0x0 | No AHB error
14752  * ALT_USB_HOST_HCINT0_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
14753  *
14754  * Field Access Macros:
14755  *
14756  */
14757 /*
14758  * Enumerated value for register field ALT_USB_HOST_HCINT0_AHBERR
14759  *
14760  * No AHB error
14761  */
14762 #define ALT_USB_HOST_HCINT0_AHBERR_E_INACT 0x0
14763 /*
14764  * Enumerated value for register field ALT_USB_HOST_HCINT0_AHBERR
14765  *
14766  * AHB error during AHB read/write
14767  */
14768 #define ALT_USB_HOST_HCINT0_AHBERR_E_ACT 0x1
14769 
14770 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_AHBERR register field. */
14771 #define ALT_USB_HOST_HCINT0_AHBERR_LSB 2
14772 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_AHBERR register field. */
14773 #define ALT_USB_HOST_HCINT0_AHBERR_MSB 2
14774 /* The width in bits of the ALT_USB_HOST_HCINT0_AHBERR register field. */
14775 #define ALT_USB_HOST_HCINT0_AHBERR_WIDTH 1
14776 /* The mask used to set the ALT_USB_HOST_HCINT0_AHBERR register field value. */
14777 #define ALT_USB_HOST_HCINT0_AHBERR_SET_MSK 0x00000004
14778 /* The mask used to clear the ALT_USB_HOST_HCINT0_AHBERR register field value. */
14779 #define ALT_USB_HOST_HCINT0_AHBERR_CLR_MSK 0xfffffffb
14780 /* The reset value of the ALT_USB_HOST_HCINT0_AHBERR register field. */
14781 #define ALT_USB_HOST_HCINT0_AHBERR_RESET 0x0
14782 /* Extracts the ALT_USB_HOST_HCINT0_AHBERR field value from a register. */
14783 #define ALT_USB_HOST_HCINT0_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
14784 /* Produces a ALT_USB_HOST_HCINT0_AHBERR register field value suitable for setting the register. */
14785 #define ALT_USB_HOST_HCINT0_AHBERR_SET(value) (((value) << 2) & 0x00000004)
14786 
14787 /*
14788  * Field : STALL Response Received Interrupt - stall
14789  *
14790  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
14791  * This bit can be set only by the core and the application should write 1 to clear
14792  * it.
14793  *
14794  * Field Enumeration Values:
14795  *
14796  * Enum | Value | Description
14797  * :----------------------------------|:------|:-------------------
14798  * ALT_USB_HOST_HCINT0_STALL_E_INACT | 0x0 | No Stall Interrupt
14799  * ALT_USB_HOST_HCINT0_STALL_E_ACT | 0x1 | Stall Interrupt
14800  *
14801  * Field Access Macros:
14802  *
14803  */
14804 /*
14805  * Enumerated value for register field ALT_USB_HOST_HCINT0_STALL
14806  *
14807  * No Stall Interrupt
14808  */
14809 #define ALT_USB_HOST_HCINT0_STALL_E_INACT 0x0
14810 /*
14811  * Enumerated value for register field ALT_USB_HOST_HCINT0_STALL
14812  *
14813  * Stall Interrupt
14814  */
14815 #define ALT_USB_HOST_HCINT0_STALL_E_ACT 0x1
14816 
14817 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_STALL register field. */
14818 #define ALT_USB_HOST_HCINT0_STALL_LSB 3
14819 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_STALL register field. */
14820 #define ALT_USB_HOST_HCINT0_STALL_MSB 3
14821 /* The width in bits of the ALT_USB_HOST_HCINT0_STALL register field. */
14822 #define ALT_USB_HOST_HCINT0_STALL_WIDTH 1
14823 /* The mask used to set the ALT_USB_HOST_HCINT0_STALL register field value. */
14824 #define ALT_USB_HOST_HCINT0_STALL_SET_MSK 0x00000008
14825 /* The mask used to clear the ALT_USB_HOST_HCINT0_STALL register field value. */
14826 #define ALT_USB_HOST_HCINT0_STALL_CLR_MSK 0xfffffff7
14827 /* The reset value of the ALT_USB_HOST_HCINT0_STALL register field. */
14828 #define ALT_USB_HOST_HCINT0_STALL_RESET 0x0
14829 /* Extracts the ALT_USB_HOST_HCINT0_STALL field value from a register. */
14830 #define ALT_USB_HOST_HCINT0_STALL_GET(value) (((value) & 0x00000008) >> 3)
14831 /* Produces a ALT_USB_HOST_HCINT0_STALL register field value suitable for setting the register. */
14832 #define ALT_USB_HOST_HCINT0_STALL_SET(value) (((value) << 3) & 0x00000008)
14833 
14834 /*
14835  * Field : NAK Response Received Interrupt - nak
14836  *
14837  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
14838  * core.This bit can be set only by the core and the application should write 1 to
14839  * clear it.
14840  *
14841  * Field Enumeration Values:
14842  *
14843  * Enum | Value | Description
14844  * :--------------------------------|:------|:-----------------------------------
14845  * ALT_USB_HOST_HCINT0_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
14846  * ALT_USB_HOST_HCINT0_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
14847  *
14848  * Field Access Macros:
14849  *
14850  */
14851 /*
14852  * Enumerated value for register field ALT_USB_HOST_HCINT0_NAK
14853  *
14854  * No NAK Response Received Interrupt
14855  */
14856 #define ALT_USB_HOST_HCINT0_NAK_E_INACT 0x0
14857 /*
14858  * Enumerated value for register field ALT_USB_HOST_HCINT0_NAK
14859  *
14860  * NAK Response Received Interrupt
14861  */
14862 #define ALT_USB_HOST_HCINT0_NAK_E_ACT 0x1
14863 
14864 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_NAK register field. */
14865 #define ALT_USB_HOST_HCINT0_NAK_LSB 4
14866 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_NAK register field. */
14867 #define ALT_USB_HOST_HCINT0_NAK_MSB 4
14868 /* The width in bits of the ALT_USB_HOST_HCINT0_NAK register field. */
14869 #define ALT_USB_HOST_HCINT0_NAK_WIDTH 1
14870 /* The mask used to set the ALT_USB_HOST_HCINT0_NAK register field value. */
14871 #define ALT_USB_HOST_HCINT0_NAK_SET_MSK 0x00000010
14872 /* The mask used to clear the ALT_USB_HOST_HCINT0_NAK register field value. */
14873 #define ALT_USB_HOST_HCINT0_NAK_CLR_MSK 0xffffffef
14874 /* The reset value of the ALT_USB_HOST_HCINT0_NAK register field. */
14875 #define ALT_USB_HOST_HCINT0_NAK_RESET 0x0
14876 /* Extracts the ALT_USB_HOST_HCINT0_NAK field value from a register. */
14877 #define ALT_USB_HOST_HCINT0_NAK_GET(value) (((value) & 0x00000010) >> 4)
14878 /* Produces a ALT_USB_HOST_HCINT0_NAK register field value suitable for setting the register. */
14879 #define ALT_USB_HOST_HCINT0_NAK_SET(value) (((value) << 4) & 0x00000010)
14880 
14881 /*
14882  * Field : ACK Response Received Transmitted Interrupt - ack
14883  *
14884  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
14885  * This bit can be set only by the core and the application should write 1 to clear
14886  * it.
14887  *
14888  * Field Enumeration Values:
14889  *
14890  * Enum | Value | Description
14891  * :--------------------------------|:------|:-----------------------------------------------
14892  * ALT_USB_HOST_HCINT0_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
14893  * ALT_USB_HOST_HCINT0_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
14894  *
14895  * Field Access Macros:
14896  *
14897  */
14898 /*
14899  * Enumerated value for register field ALT_USB_HOST_HCINT0_ACK
14900  *
14901  * No ACK Response Received Transmitted Interrupt
14902  */
14903 #define ALT_USB_HOST_HCINT0_ACK_E_INACT 0x0
14904 /*
14905  * Enumerated value for register field ALT_USB_HOST_HCINT0_ACK
14906  *
14907  * ACK Response Received Transmitted Interrup
14908  */
14909 #define ALT_USB_HOST_HCINT0_ACK_E_ACT 0x1
14910 
14911 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_ACK register field. */
14912 #define ALT_USB_HOST_HCINT0_ACK_LSB 5
14913 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_ACK register field. */
14914 #define ALT_USB_HOST_HCINT0_ACK_MSB 5
14915 /* The width in bits of the ALT_USB_HOST_HCINT0_ACK register field. */
14916 #define ALT_USB_HOST_HCINT0_ACK_WIDTH 1
14917 /* The mask used to set the ALT_USB_HOST_HCINT0_ACK register field value. */
14918 #define ALT_USB_HOST_HCINT0_ACK_SET_MSK 0x00000020
14919 /* The mask used to clear the ALT_USB_HOST_HCINT0_ACK register field value. */
14920 #define ALT_USB_HOST_HCINT0_ACK_CLR_MSK 0xffffffdf
14921 /* The reset value of the ALT_USB_HOST_HCINT0_ACK register field. */
14922 #define ALT_USB_HOST_HCINT0_ACK_RESET 0x0
14923 /* Extracts the ALT_USB_HOST_HCINT0_ACK field value from a register. */
14924 #define ALT_USB_HOST_HCINT0_ACK_GET(value) (((value) & 0x00000020) >> 5)
14925 /* Produces a ALT_USB_HOST_HCINT0_ACK register field value suitable for setting the register. */
14926 #define ALT_USB_HOST_HCINT0_ACK_SET(value) (((value) << 5) & 0x00000020)
14927 
14928 /*
14929  * Field : NYET Response Received Interrupt - nyet
14930  *
14931  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
14932  * core.This bit can be set only by the core and the application should write 1 to
14933  * clear it.
14934  *
14935  * Field Enumeration Values:
14936  *
14937  * Enum | Value | Description
14938  * :---------------------------------|:------|:------------------------------------
14939  * ALT_USB_HOST_HCINT0_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
14940  * ALT_USB_HOST_HCINT0_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
14941  *
14942  * Field Access Macros:
14943  *
14944  */
14945 /*
14946  * Enumerated value for register field ALT_USB_HOST_HCINT0_NYET
14947  *
14948  * No NYET Response Received Interrupt
14949  */
14950 #define ALT_USB_HOST_HCINT0_NYET_E_INACT 0x0
14951 /*
14952  * Enumerated value for register field ALT_USB_HOST_HCINT0_NYET
14953  *
14954  * NYET Response Received Interrupt
14955  */
14956 #define ALT_USB_HOST_HCINT0_NYET_E_ACT 0x1
14957 
14958 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_NYET register field. */
14959 #define ALT_USB_HOST_HCINT0_NYET_LSB 6
14960 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_NYET register field. */
14961 #define ALT_USB_HOST_HCINT0_NYET_MSB 6
14962 /* The width in bits of the ALT_USB_HOST_HCINT0_NYET register field. */
14963 #define ALT_USB_HOST_HCINT0_NYET_WIDTH 1
14964 /* The mask used to set the ALT_USB_HOST_HCINT0_NYET register field value. */
14965 #define ALT_USB_HOST_HCINT0_NYET_SET_MSK 0x00000040
14966 /* The mask used to clear the ALT_USB_HOST_HCINT0_NYET register field value. */
14967 #define ALT_USB_HOST_HCINT0_NYET_CLR_MSK 0xffffffbf
14968 /* The reset value of the ALT_USB_HOST_HCINT0_NYET register field. */
14969 #define ALT_USB_HOST_HCINT0_NYET_RESET 0x0
14970 /* Extracts the ALT_USB_HOST_HCINT0_NYET field value from a register. */
14971 #define ALT_USB_HOST_HCINT0_NYET_GET(value) (((value) & 0x00000040) >> 6)
14972 /* Produces a ALT_USB_HOST_HCINT0_NYET register field value suitable for setting the register. */
14973 #define ALT_USB_HOST_HCINT0_NYET_SET(value) (((value) << 6) & 0x00000040)
14974 
14975 /*
14976  * Field : Transaction Error - xacterr
14977  *
14978  * Indicates one of the following errors occurred on the USB.-CRC check failure
14979  *
14980  * * Timeout
14981  *
14982  * * Bit stuff error
14983  *
14984  * * False EOP
14985  *
14986  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
14987  * This bit can be set only by the core and the application should write 1 to clear
14988  * it.
14989  *
14990  * Field Enumeration Values:
14991  *
14992  * Enum | Value | Description
14993  * :------------------------------------|:------|:---------------------
14994  * ALT_USB_HOST_HCINT0_XACTERR_E_INACT | 0x0 | No Transaction Error
14995  * ALT_USB_HOST_HCINT0_XACTERR_E_ACT | 0x1 | Transaction Error
14996  *
14997  * Field Access Macros:
14998  *
14999  */
15000 /*
15001  * Enumerated value for register field ALT_USB_HOST_HCINT0_XACTERR
15002  *
15003  * No Transaction Error
15004  */
15005 #define ALT_USB_HOST_HCINT0_XACTERR_E_INACT 0x0
15006 /*
15007  * Enumerated value for register field ALT_USB_HOST_HCINT0_XACTERR
15008  *
15009  * Transaction Error
15010  */
15011 #define ALT_USB_HOST_HCINT0_XACTERR_E_ACT 0x1
15012 
15013 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_XACTERR register field. */
15014 #define ALT_USB_HOST_HCINT0_XACTERR_LSB 7
15015 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_XACTERR register field. */
15016 #define ALT_USB_HOST_HCINT0_XACTERR_MSB 7
15017 /* The width in bits of the ALT_USB_HOST_HCINT0_XACTERR register field. */
15018 #define ALT_USB_HOST_HCINT0_XACTERR_WIDTH 1
15019 /* The mask used to set the ALT_USB_HOST_HCINT0_XACTERR register field value. */
15020 #define ALT_USB_HOST_HCINT0_XACTERR_SET_MSK 0x00000080
15021 /* The mask used to clear the ALT_USB_HOST_HCINT0_XACTERR register field value. */
15022 #define ALT_USB_HOST_HCINT0_XACTERR_CLR_MSK 0xffffff7f
15023 /* The reset value of the ALT_USB_HOST_HCINT0_XACTERR register field. */
15024 #define ALT_USB_HOST_HCINT0_XACTERR_RESET 0x0
15025 /* Extracts the ALT_USB_HOST_HCINT0_XACTERR field value from a register. */
15026 #define ALT_USB_HOST_HCINT0_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
15027 /* Produces a ALT_USB_HOST_HCINT0_XACTERR register field value suitable for setting the register. */
15028 #define ALT_USB_HOST_HCINT0_XACTERR_SET(value) (((value) << 7) & 0x00000080)
15029 
15030 /*
15031  * Field : Babble Error - bblerr
15032  *
15033  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
15034  * core..This bit can be set only by the core and the application should write 1 to
15035  * clear it.
15036  *
15037  * Field Enumeration Values:
15038  *
15039  * Enum | Value | Description
15040  * :-----------------------------------|:------|:----------------
15041  * ALT_USB_HOST_HCINT0_BBLERR_E_INACT | 0x0 | No Babble Error
15042  * ALT_USB_HOST_HCINT0_BBLERR_E_ACT | 0x1 | Babble Error
15043  *
15044  * Field Access Macros:
15045  *
15046  */
15047 /*
15048  * Enumerated value for register field ALT_USB_HOST_HCINT0_BBLERR
15049  *
15050  * No Babble Error
15051  */
15052 #define ALT_USB_HOST_HCINT0_BBLERR_E_INACT 0x0
15053 /*
15054  * Enumerated value for register field ALT_USB_HOST_HCINT0_BBLERR
15055  *
15056  * Babble Error
15057  */
15058 #define ALT_USB_HOST_HCINT0_BBLERR_E_ACT 0x1
15059 
15060 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_BBLERR register field. */
15061 #define ALT_USB_HOST_HCINT0_BBLERR_LSB 8
15062 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_BBLERR register field. */
15063 #define ALT_USB_HOST_HCINT0_BBLERR_MSB 8
15064 /* The width in bits of the ALT_USB_HOST_HCINT0_BBLERR register field. */
15065 #define ALT_USB_HOST_HCINT0_BBLERR_WIDTH 1
15066 /* The mask used to set the ALT_USB_HOST_HCINT0_BBLERR register field value. */
15067 #define ALT_USB_HOST_HCINT0_BBLERR_SET_MSK 0x00000100
15068 /* The mask used to clear the ALT_USB_HOST_HCINT0_BBLERR register field value. */
15069 #define ALT_USB_HOST_HCINT0_BBLERR_CLR_MSK 0xfffffeff
15070 /* The reset value of the ALT_USB_HOST_HCINT0_BBLERR register field. */
15071 #define ALT_USB_HOST_HCINT0_BBLERR_RESET 0x0
15072 /* Extracts the ALT_USB_HOST_HCINT0_BBLERR field value from a register. */
15073 #define ALT_USB_HOST_HCINT0_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
15074 /* Produces a ALT_USB_HOST_HCINT0_BBLERR register field value suitable for setting the register. */
15075 #define ALT_USB_HOST_HCINT0_BBLERR_SET(value) (((value) << 8) & 0x00000100)
15076 
15077 /*
15078  * Field : Frame Overrun - frmovrun
15079  *
15080  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
15081  * This bit can be set only by the core and the application should write 1 to clear
15082  * it.
15083  *
15084  * Field Enumeration Values:
15085  *
15086  * Enum | Value | Description
15087  * :-------------------------------------|:------|:-----------------
15088  * ALT_USB_HOST_HCINT0_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
15089  * ALT_USB_HOST_HCINT0_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
15090  *
15091  * Field Access Macros:
15092  *
15093  */
15094 /*
15095  * Enumerated value for register field ALT_USB_HOST_HCINT0_FRMOVRUN
15096  *
15097  * No Frame Overrun
15098  */
15099 #define ALT_USB_HOST_HCINT0_FRMOVRUN_E_INACT 0x0
15100 /*
15101  * Enumerated value for register field ALT_USB_HOST_HCINT0_FRMOVRUN
15102  *
15103  * Frame Overrun
15104  */
15105 #define ALT_USB_HOST_HCINT0_FRMOVRUN_E_ACT 0x1
15106 
15107 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_FRMOVRUN register field. */
15108 #define ALT_USB_HOST_HCINT0_FRMOVRUN_LSB 9
15109 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_FRMOVRUN register field. */
15110 #define ALT_USB_HOST_HCINT0_FRMOVRUN_MSB 9
15111 /* The width in bits of the ALT_USB_HOST_HCINT0_FRMOVRUN register field. */
15112 #define ALT_USB_HOST_HCINT0_FRMOVRUN_WIDTH 1
15113 /* The mask used to set the ALT_USB_HOST_HCINT0_FRMOVRUN register field value. */
15114 #define ALT_USB_HOST_HCINT0_FRMOVRUN_SET_MSK 0x00000200
15115 /* The mask used to clear the ALT_USB_HOST_HCINT0_FRMOVRUN register field value. */
15116 #define ALT_USB_HOST_HCINT0_FRMOVRUN_CLR_MSK 0xfffffdff
15117 /* The reset value of the ALT_USB_HOST_HCINT0_FRMOVRUN register field. */
15118 #define ALT_USB_HOST_HCINT0_FRMOVRUN_RESET 0x0
15119 /* Extracts the ALT_USB_HOST_HCINT0_FRMOVRUN field value from a register. */
15120 #define ALT_USB_HOST_HCINT0_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
15121 /* Produces a ALT_USB_HOST_HCINT0_FRMOVRUN register field value suitable for setting the register. */
15122 #define ALT_USB_HOST_HCINT0_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
15123 
15124 /*
15125  * Field : Data Toggle Error - datatglerr
15126  *
15127  * This bit can be set only by the core and the application should write 1 to clear
15128  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
15129  * core.
15130  *
15131  * Field Enumeration Values:
15132  *
15133  * Enum | Value | Description
15134  * :---------------------------------------|:------|:---------------------
15135  * ALT_USB_HOST_HCINT0_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
15136  * ALT_USB_HOST_HCINT0_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
15137  *
15138  * Field Access Macros:
15139  *
15140  */
15141 /*
15142  * Enumerated value for register field ALT_USB_HOST_HCINT0_DATATGLERR
15143  *
15144  * No Data Toggle Error
15145  */
15146 #define ALT_USB_HOST_HCINT0_DATATGLERR_E_INACT 0x0
15147 /*
15148  * Enumerated value for register field ALT_USB_HOST_HCINT0_DATATGLERR
15149  *
15150  * Data Toggle Error
15151  */
15152 #define ALT_USB_HOST_HCINT0_DATATGLERR_E_ACT 0x1
15153 
15154 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_DATATGLERR register field. */
15155 #define ALT_USB_HOST_HCINT0_DATATGLERR_LSB 10
15156 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_DATATGLERR register field. */
15157 #define ALT_USB_HOST_HCINT0_DATATGLERR_MSB 10
15158 /* The width in bits of the ALT_USB_HOST_HCINT0_DATATGLERR register field. */
15159 #define ALT_USB_HOST_HCINT0_DATATGLERR_WIDTH 1
15160 /* The mask used to set the ALT_USB_HOST_HCINT0_DATATGLERR register field value. */
15161 #define ALT_USB_HOST_HCINT0_DATATGLERR_SET_MSK 0x00000400
15162 /* The mask used to clear the ALT_USB_HOST_HCINT0_DATATGLERR register field value. */
15163 #define ALT_USB_HOST_HCINT0_DATATGLERR_CLR_MSK 0xfffffbff
15164 /* The reset value of the ALT_USB_HOST_HCINT0_DATATGLERR register field. */
15165 #define ALT_USB_HOST_HCINT0_DATATGLERR_RESET 0x0
15166 /* Extracts the ALT_USB_HOST_HCINT0_DATATGLERR field value from a register. */
15167 #define ALT_USB_HOST_HCINT0_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
15168 /* Produces a ALT_USB_HOST_HCINT0_DATATGLERR register field value suitable for setting the register. */
15169 #define ALT_USB_HOST_HCINT0_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
15170 
15171 /*
15172  * Field : BNA Interrupt - bnaintr
15173  *
15174  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
15175  * generates this interrupt when the descriptor accessed is not ready for the Core
15176  * to process. BNA will not be generated for Isochronous channels. for non
15177  * Scatter/Gather DMA mode, this bit is reserved.
15178  *
15179  * Field Enumeration Values:
15180  *
15181  * Enum | Value | Description
15182  * :------------------------------------|:------|:-----------------
15183  * ALT_USB_HOST_HCINT0_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
15184  * ALT_USB_HOST_HCINT0_BNAINTR_E_ACT | 0x1 | BNA Interrupt
15185  *
15186  * Field Access Macros:
15187  *
15188  */
15189 /*
15190  * Enumerated value for register field ALT_USB_HOST_HCINT0_BNAINTR
15191  *
15192  * No BNA Interrupt
15193  */
15194 #define ALT_USB_HOST_HCINT0_BNAINTR_E_INACT 0x0
15195 /*
15196  * Enumerated value for register field ALT_USB_HOST_HCINT0_BNAINTR
15197  *
15198  * BNA Interrupt
15199  */
15200 #define ALT_USB_HOST_HCINT0_BNAINTR_E_ACT 0x1
15201 
15202 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_BNAINTR register field. */
15203 #define ALT_USB_HOST_HCINT0_BNAINTR_LSB 11
15204 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_BNAINTR register field. */
15205 #define ALT_USB_HOST_HCINT0_BNAINTR_MSB 11
15206 /* The width in bits of the ALT_USB_HOST_HCINT0_BNAINTR register field. */
15207 #define ALT_USB_HOST_HCINT0_BNAINTR_WIDTH 1
15208 /* The mask used to set the ALT_USB_HOST_HCINT0_BNAINTR register field value. */
15209 #define ALT_USB_HOST_HCINT0_BNAINTR_SET_MSK 0x00000800
15210 /* The mask used to clear the ALT_USB_HOST_HCINT0_BNAINTR register field value. */
15211 #define ALT_USB_HOST_HCINT0_BNAINTR_CLR_MSK 0xfffff7ff
15212 /* The reset value of the ALT_USB_HOST_HCINT0_BNAINTR register field. */
15213 #define ALT_USB_HOST_HCINT0_BNAINTR_RESET 0x0
15214 /* Extracts the ALT_USB_HOST_HCINT0_BNAINTR field value from a register. */
15215 #define ALT_USB_HOST_HCINT0_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
15216 /* Produces a ALT_USB_HOST_HCINT0_BNAINTR register field value suitable for setting the register. */
15217 #define ALT_USB_HOST_HCINT0_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
15218 
15219 /*
15220  * Field : Excessive Transaction Error - xcs_xact_err
15221  *
15222  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
15223  * this bit when 3 consecutive transaction errors occurred on the USB bus.
15224  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
15225  * Scatter/Gather DMA mode, this bit is reserved.
15226  *
15227  * Field Enumeration Values:
15228  *
15229  * Enum | Value | Description
15230  * :-------------------------------------------|:------|:-------------------------------
15231  * ALT_USB_HOST_HCINT0_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
15232  * ALT_USB_HOST_HCINT0_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
15233  *
15234  * Field Access Macros:
15235  *
15236  */
15237 /*
15238  * Enumerated value for register field ALT_USB_HOST_HCINT0_XCS_XACT_ERR
15239  *
15240  * No Excessive Transaction Error
15241  */
15242 #define ALT_USB_HOST_HCINT0_XCS_XACT_ERR_E_INACT 0x0
15243 /*
15244  * Enumerated value for register field ALT_USB_HOST_HCINT0_XCS_XACT_ERR
15245  *
15246  * Excessive Transaction Error
15247  */
15248 #define ALT_USB_HOST_HCINT0_XCS_XACT_ERR_E_ACVTIVE 0x1
15249 
15250 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_XCS_XACT_ERR register field. */
15251 #define ALT_USB_HOST_HCINT0_XCS_XACT_ERR_LSB 12
15252 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_XCS_XACT_ERR register field. */
15253 #define ALT_USB_HOST_HCINT0_XCS_XACT_ERR_MSB 12
15254 /* The width in bits of the ALT_USB_HOST_HCINT0_XCS_XACT_ERR register field. */
15255 #define ALT_USB_HOST_HCINT0_XCS_XACT_ERR_WIDTH 1
15256 /* The mask used to set the ALT_USB_HOST_HCINT0_XCS_XACT_ERR register field value. */
15257 #define ALT_USB_HOST_HCINT0_XCS_XACT_ERR_SET_MSK 0x00001000
15258 /* The mask used to clear the ALT_USB_HOST_HCINT0_XCS_XACT_ERR register field value. */
15259 #define ALT_USB_HOST_HCINT0_XCS_XACT_ERR_CLR_MSK 0xffffefff
15260 /* The reset value of the ALT_USB_HOST_HCINT0_XCS_XACT_ERR register field. */
15261 #define ALT_USB_HOST_HCINT0_XCS_XACT_ERR_RESET 0x0
15262 /* Extracts the ALT_USB_HOST_HCINT0_XCS_XACT_ERR field value from a register. */
15263 #define ALT_USB_HOST_HCINT0_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
15264 /* Produces a ALT_USB_HOST_HCINT0_XCS_XACT_ERR register field value suitable for setting the register. */
15265 #define ALT_USB_HOST_HCINT0_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
15266 
15267 /*
15268  * Field : Descriptor rollover interrupt - desc_lst_rollintr
15269  *
15270  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
15271  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
15272  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
15273  * mode, this bit is reserved.
15274  *
15275  * Field Enumeration Values:
15276  *
15277  * Enum | Value | Description
15278  * :----------------------------------------------|:------|:---------------------------------
15279  * ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
15280  * ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
15281  *
15282  * Field Access Macros:
15283  *
15284  */
15285 /*
15286  * Enumerated value for register field ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR
15287  *
15288  * No Descriptor rollover interrupt
15289  */
15290 #define ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR_E_INACT 0x0
15291 /*
15292  * Enumerated value for register field ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR
15293  *
15294  * Descriptor rollover interrupt
15295  */
15296 #define ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR_E_ACT 0x1
15297 
15298 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR register field. */
15299 #define ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR_LSB 13
15300 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR register field. */
15301 #define ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR_MSB 13
15302 /* The width in bits of the ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR register field. */
15303 #define ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR_WIDTH 1
15304 /* The mask used to set the ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR register field value. */
15305 #define ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR_SET_MSK 0x00002000
15306 /* The mask used to clear the ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR register field value. */
15307 #define ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
15308 /* The reset value of the ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR register field. */
15309 #define ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR_RESET 0x0
15310 /* Extracts the ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR field value from a register. */
15311 #define ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
15312 /* Produces a ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR register field value suitable for setting the register. */
15313 #define ALT_USB_HOST_HCINT0_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
15314 
15315 #ifndef __ASSEMBLY__
15316 /*
15317  * WARNING: The C register and register group struct declarations are provided for
15318  * convenience and illustrative purposes. They should, however, be used with
15319  * caution as the C language standard provides no guarantees about the alignment or
15320  * atomicity of device memory accesses. The recommended practice for writing
15321  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
15322  * alt_write_word() functions.
15323  *
15324  * The struct declaration for register ALT_USB_HOST_HCINT0.
15325  */
15326 struct ALT_USB_HOST_HCINT0_s
15327 {
15328  const uint32_t xfercompl : 1; /* Transfer Completed */
15329  const uint32_t chhltd : 1; /* Channel Halted */
15330  const uint32_t ahberr : 1; /* AHB Error */
15331  const uint32_t stall : 1; /* STALL Response Received Interrupt */
15332  const uint32_t nak : 1; /* NAK Response Received Interrupt */
15333  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
15334  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
15335  const uint32_t xacterr : 1; /* Transaction Error */
15336  const uint32_t bblerr : 1; /* Babble Error */
15337  const uint32_t frmovrun : 1; /* Frame Overrun */
15338  const uint32_t datatglerr : 1; /* Data Toggle Error */
15339  const uint32_t bnaintr : 1; /* BNA Interrupt */
15340  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
15341  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
15342  uint32_t : 18; /* *UNDEFINED* */
15343 };
15344 
15345 /* The typedef declaration for register ALT_USB_HOST_HCINT0. */
15346 typedef volatile struct ALT_USB_HOST_HCINT0_s ALT_USB_HOST_HCINT0_t;
15347 #endif /* __ASSEMBLY__ */
15348 
15349 /* The byte offset of the ALT_USB_HOST_HCINT0 register from the beginning of the component. */
15350 #define ALT_USB_HOST_HCINT0_OFST 0x108
15351 /* The address of the ALT_USB_HOST_HCINT0 register. */
15352 #define ALT_USB_HOST_HCINT0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT0_OFST))
15353 
15354 /*
15355  * Register : Host Channel 0 Interrupt Mask Register - hcintmsk0
15356  *
15357  * This register reflects the mask for each channel status described in the
15358  * previous section.
15359  *
15360  * Register Layout
15361  *
15362  * Bits | Access | Reset | Description
15363  * :--------|:-------|:------|:----------------------------------
15364  * [0] | RW | 0x0 | Transfer Completed Mask
15365  * [1] | RW | 0x0 | Channel Halted Mask
15366  * [2] | RW | 0x0 | AHB Error Mask
15367  * [10:3] | ??? | 0x0 | *UNDEFINED*
15368  * [11] | RW | 0x0 | BNA Interrupt mask
15369  * [12] | ??? | 0x0 | *UNDEFINED*
15370  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
15371  * [31:14] | ??? | 0x0 | *UNDEFINED*
15372  *
15373  */
15374 /*
15375  * Field : Transfer Completed Mask - xfercomplmsk
15376  *
15377  * Transfer complete.
15378  *
15379  * Field Enumeration Values:
15380  *
15381  * Enum | Value | Description
15382  * :--------------------------------------------|:------|:------------
15383  * ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK_E_MSK | 0x0 | Mask
15384  * ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
15385  *
15386  * Field Access Macros:
15387  *
15388  */
15389 /*
15390  * Enumerated value for register field ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK
15391  *
15392  * Mask
15393  */
15394 #define ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK_E_MSK 0x0
15395 /*
15396  * Enumerated value for register field ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK
15397  *
15398  * No mask
15399  */
15400 #define ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK_E_NOMSK 0x1
15401 
15402 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK register field. */
15403 #define ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK_LSB 0
15404 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK register field. */
15405 #define ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK_MSB 0
15406 /* The width in bits of the ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK register field. */
15407 #define ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK_WIDTH 1
15408 /* The mask used to set the ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK register field value. */
15409 #define ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK_SET_MSK 0x00000001
15410 /* The mask used to clear the ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK register field value. */
15411 #define ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK_CLR_MSK 0xfffffffe
15412 /* The reset value of the ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK register field. */
15413 #define ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK_RESET 0x0
15414 /* Extracts the ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK field value from a register. */
15415 #define ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
15416 /* Produces a ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK register field value suitable for setting the register. */
15417 #define ALT_USB_HOST_HCINTMSK0_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
15418 
15419 /*
15420  * Field : Channel Halted Mask - chhltdmsk
15421  *
15422  * Channel Halted.
15423  *
15424  * Field Enumeration Values:
15425  *
15426  * Enum | Value | Description
15427  * :-----------------------------------------|:------|:------------
15428  * ALT_USB_HOST_HCINTMSK0_CHHLTDMSK_E_MSK | 0x0 | Mask
15429  * ALT_USB_HOST_HCINTMSK0_CHHLTDMSK_E_NOMSK | 0x1 | No mask
15430  *
15431  * Field Access Macros:
15432  *
15433  */
15434 /*
15435  * Enumerated value for register field ALT_USB_HOST_HCINTMSK0_CHHLTDMSK
15436  *
15437  * Mask
15438  */
15439 #define ALT_USB_HOST_HCINTMSK0_CHHLTDMSK_E_MSK 0x0
15440 /*
15441  * Enumerated value for register field ALT_USB_HOST_HCINTMSK0_CHHLTDMSK
15442  *
15443  * No mask
15444  */
15445 #define ALT_USB_HOST_HCINTMSK0_CHHLTDMSK_E_NOMSK 0x1
15446 
15447 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK0_CHHLTDMSK register field. */
15448 #define ALT_USB_HOST_HCINTMSK0_CHHLTDMSK_LSB 1
15449 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK0_CHHLTDMSK register field. */
15450 #define ALT_USB_HOST_HCINTMSK0_CHHLTDMSK_MSB 1
15451 /* The width in bits of the ALT_USB_HOST_HCINTMSK0_CHHLTDMSK register field. */
15452 #define ALT_USB_HOST_HCINTMSK0_CHHLTDMSK_WIDTH 1
15453 /* The mask used to set the ALT_USB_HOST_HCINTMSK0_CHHLTDMSK register field value. */
15454 #define ALT_USB_HOST_HCINTMSK0_CHHLTDMSK_SET_MSK 0x00000002
15455 /* The mask used to clear the ALT_USB_HOST_HCINTMSK0_CHHLTDMSK register field value. */
15456 #define ALT_USB_HOST_HCINTMSK0_CHHLTDMSK_CLR_MSK 0xfffffffd
15457 /* The reset value of the ALT_USB_HOST_HCINTMSK0_CHHLTDMSK register field. */
15458 #define ALT_USB_HOST_HCINTMSK0_CHHLTDMSK_RESET 0x0
15459 /* Extracts the ALT_USB_HOST_HCINTMSK0_CHHLTDMSK field value from a register. */
15460 #define ALT_USB_HOST_HCINTMSK0_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
15461 /* Produces a ALT_USB_HOST_HCINTMSK0_CHHLTDMSK register field value suitable for setting the register. */
15462 #define ALT_USB_HOST_HCINTMSK0_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
15463 
15464 /*
15465  * Field : AHB Error Mask - ahberrmsk
15466  *
15467  * In scatter/gather DMA mode for host, interrupts will not be generated due to
15468  * the corresponding bits set in HCINTn.
15469  *
15470  * Field Enumeration Values:
15471  *
15472  * Enum | Value | Description
15473  * :-----------------------------------------|:------|:------------
15474  * ALT_USB_HOST_HCINTMSK0_AHBERRMSK_E_MSK | 0x0 | Mask
15475  * ALT_USB_HOST_HCINTMSK0_AHBERRMSK_E_NOMSK | 0x1 | No mask
15476  *
15477  * Field Access Macros:
15478  *
15479  */
15480 /*
15481  * Enumerated value for register field ALT_USB_HOST_HCINTMSK0_AHBERRMSK
15482  *
15483  * Mask
15484  */
15485 #define ALT_USB_HOST_HCINTMSK0_AHBERRMSK_E_MSK 0x0
15486 /*
15487  * Enumerated value for register field ALT_USB_HOST_HCINTMSK0_AHBERRMSK
15488  *
15489  * No mask
15490  */
15491 #define ALT_USB_HOST_HCINTMSK0_AHBERRMSK_E_NOMSK 0x1
15492 
15493 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK0_AHBERRMSK register field. */
15494 #define ALT_USB_HOST_HCINTMSK0_AHBERRMSK_LSB 2
15495 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK0_AHBERRMSK register field. */
15496 #define ALT_USB_HOST_HCINTMSK0_AHBERRMSK_MSB 2
15497 /* The width in bits of the ALT_USB_HOST_HCINTMSK0_AHBERRMSK register field. */
15498 #define ALT_USB_HOST_HCINTMSK0_AHBERRMSK_WIDTH 1
15499 /* The mask used to set the ALT_USB_HOST_HCINTMSK0_AHBERRMSK register field value. */
15500 #define ALT_USB_HOST_HCINTMSK0_AHBERRMSK_SET_MSK 0x00000004
15501 /* The mask used to clear the ALT_USB_HOST_HCINTMSK0_AHBERRMSK register field value. */
15502 #define ALT_USB_HOST_HCINTMSK0_AHBERRMSK_CLR_MSK 0xfffffffb
15503 /* The reset value of the ALT_USB_HOST_HCINTMSK0_AHBERRMSK register field. */
15504 #define ALT_USB_HOST_HCINTMSK0_AHBERRMSK_RESET 0x0
15505 /* Extracts the ALT_USB_HOST_HCINTMSK0_AHBERRMSK field value from a register. */
15506 #define ALT_USB_HOST_HCINTMSK0_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
15507 /* Produces a ALT_USB_HOST_HCINTMSK0_AHBERRMSK register field value suitable for setting the register. */
15508 #define ALT_USB_HOST_HCINTMSK0_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
15509 
15510 /*
15511  * Field : BNA Interrupt mask - bnaintrmsk
15512  *
15513  * This bit is valid only when Scatter/Gather DMA mode is enabled.
15514  *
15515  * Field Enumeration Values:
15516  *
15517  * Enum | Value | Description
15518  * :------------------------------------------|:------|:------------
15519  * ALT_USB_HOST_HCINTMSK0_BNAINTRMSK_E_MSK | 0x0 | Mask
15520  * ALT_USB_HOST_HCINTMSK0_BNAINTRMSK_E_NOMSK | 0x1 | No mask
15521  *
15522  * Field Access Macros:
15523  *
15524  */
15525 /*
15526  * Enumerated value for register field ALT_USB_HOST_HCINTMSK0_BNAINTRMSK
15527  *
15528  * Mask
15529  */
15530 #define ALT_USB_HOST_HCINTMSK0_BNAINTRMSK_E_MSK 0x0
15531 /*
15532  * Enumerated value for register field ALT_USB_HOST_HCINTMSK0_BNAINTRMSK
15533  *
15534  * No mask
15535  */
15536 #define ALT_USB_HOST_HCINTMSK0_BNAINTRMSK_E_NOMSK 0x1
15537 
15538 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK0_BNAINTRMSK register field. */
15539 #define ALT_USB_HOST_HCINTMSK0_BNAINTRMSK_LSB 11
15540 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK0_BNAINTRMSK register field. */
15541 #define ALT_USB_HOST_HCINTMSK0_BNAINTRMSK_MSB 11
15542 /* The width in bits of the ALT_USB_HOST_HCINTMSK0_BNAINTRMSK register field. */
15543 #define ALT_USB_HOST_HCINTMSK0_BNAINTRMSK_WIDTH 1
15544 /* The mask used to set the ALT_USB_HOST_HCINTMSK0_BNAINTRMSK register field value. */
15545 #define ALT_USB_HOST_HCINTMSK0_BNAINTRMSK_SET_MSK 0x00000800
15546 /* The mask used to clear the ALT_USB_HOST_HCINTMSK0_BNAINTRMSK register field value. */
15547 #define ALT_USB_HOST_HCINTMSK0_BNAINTRMSK_CLR_MSK 0xfffff7ff
15548 /* The reset value of the ALT_USB_HOST_HCINTMSK0_BNAINTRMSK register field. */
15549 #define ALT_USB_HOST_HCINTMSK0_BNAINTRMSK_RESET 0x0
15550 /* Extracts the ALT_USB_HOST_HCINTMSK0_BNAINTRMSK field value from a register. */
15551 #define ALT_USB_HOST_HCINTMSK0_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
15552 /* Produces a ALT_USB_HOST_HCINTMSK0_BNAINTRMSK register field value suitable for setting the register. */
15553 #define ALT_USB_HOST_HCINTMSK0_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
15554 
15555 /*
15556  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
15557  *
15558  * This bit is valid only when Scatter/Gather DMA mode is enabled.
15559  *
15560  * Field Enumeration Values:
15561  *
15562  * Enum | Value | Description
15563  * :---------------------------------------------------|:------|:------------
15564  * ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
15565  * ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
15566  *
15567  * Field Access Macros:
15568  *
15569  */
15570 /*
15571  * Enumerated value for register field ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK
15572  *
15573  * Mask
15574  */
15575 #define ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK_E_MSK 0x0
15576 /*
15577  * Enumerated value for register field ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK
15578  *
15579  * No mask
15580  */
15581 #define ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
15582 
15583 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK register field. */
15584 #define ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK_LSB 13
15585 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK register field. */
15586 #define ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK_MSB 13
15587 /* The width in bits of the ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK register field. */
15588 #define ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK_WIDTH 1
15589 /* The mask used to set the ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK register field value. */
15590 #define ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
15591 /* The mask used to clear the ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK register field value. */
15592 #define ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
15593 /* The reset value of the ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK register field. */
15594 #define ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK_RESET 0x0
15595 /* Extracts the ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK field value from a register. */
15596 #define ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
15597 /* Produces a ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
15598 #define ALT_USB_HOST_HCINTMSK0_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
15599 
15600 #ifndef __ASSEMBLY__
15601 /*
15602  * WARNING: The C register and register group struct declarations are provided for
15603  * convenience and illustrative purposes. They should, however, be used with
15604  * caution as the C language standard provides no guarantees about the alignment or
15605  * atomicity of device memory accesses. The recommended practice for writing
15606  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
15607  * alt_write_word() functions.
15608  *
15609  * The struct declaration for register ALT_USB_HOST_HCINTMSK0.
15610  */
15611 struct ALT_USB_HOST_HCINTMSK0_s
15612 {
15613  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
15614  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
15615  uint32_t ahberrmsk : 1; /* AHB Error Mask */
15616  uint32_t : 8; /* *UNDEFINED* */
15617  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
15618  uint32_t : 1; /* *UNDEFINED* */
15619  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
15620  uint32_t : 18; /* *UNDEFINED* */
15621 };
15622 
15623 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK0. */
15624 typedef volatile struct ALT_USB_HOST_HCINTMSK0_s ALT_USB_HOST_HCINTMSK0_t;
15625 #endif /* __ASSEMBLY__ */
15626 
15627 /* The byte offset of the ALT_USB_HOST_HCINTMSK0 register from the beginning of the component. */
15628 #define ALT_USB_HOST_HCINTMSK0_OFST 0x10c
15629 /* The address of the ALT_USB_HOST_HCINTMSK0 register. */
15630 #define ALT_USB_HOST_HCINTMSK0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK0_OFST))
15631 
15632 /*
15633  * Register : Host Channel 0 Transfer Size Register - hctsiz0
15634  *
15635  * Buffer DMA Mode
15636  *
15637  * Register Layout
15638  *
15639  * Bits | Access | Reset | Description
15640  * :--------|:-------|:------|:--------------
15641  * [18:0] | RW | 0x0 | Transfer Size
15642  * [28:19] | RW | 0x0 | Packet Count
15643  * [30:29] | RW | 0x0 | PID
15644  * [31] | RW | 0x0 | Do Ping
15645  *
15646  */
15647 /*
15648  * Field : Transfer Size - xfersize
15649  *
15650  * For an OUT, this field is the number of data bytes the host sends during the
15651  * transfer. for an IN, this field is the buffer size that the application has
15652  * Reserved for the transfer. The application is expected to program this field as
15653  * an integer multiple of the maximum packet size for IN transactions (periodic and
15654  * non-periodic).The width of this counter is specified as 19 bits.
15655  *
15656  * Field Access Macros:
15657  *
15658  */
15659 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ0_XFERSIZE register field. */
15660 #define ALT_USB_HOST_HCTSIZ0_XFERSIZE_LSB 0
15661 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ0_XFERSIZE register field. */
15662 #define ALT_USB_HOST_HCTSIZ0_XFERSIZE_MSB 18
15663 /* The width in bits of the ALT_USB_HOST_HCTSIZ0_XFERSIZE register field. */
15664 #define ALT_USB_HOST_HCTSIZ0_XFERSIZE_WIDTH 19
15665 /* The mask used to set the ALT_USB_HOST_HCTSIZ0_XFERSIZE register field value. */
15666 #define ALT_USB_HOST_HCTSIZ0_XFERSIZE_SET_MSK 0x0007ffff
15667 /* The mask used to clear the ALT_USB_HOST_HCTSIZ0_XFERSIZE register field value. */
15668 #define ALT_USB_HOST_HCTSIZ0_XFERSIZE_CLR_MSK 0xfff80000
15669 /* The reset value of the ALT_USB_HOST_HCTSIZ0_XFERSIZE register field. */
15670 #define ALT_USB_HOST_HCTSIZ0_XFERSIZE_RESET 0x0
15671 /* Extracts the ALT_USB_HOST_HCTSIZ0_XFERSIZE field value from a register. */
15672 #define ALT_USB_HOST_HCTSIZ0_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
15673 /* Produces a ALT_USB_HOST_HCTSIZ0_XFERSIZE register field value suitable for setting the register. */
15674 #define ALT_USB_HOST_HCTSIZ0_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
15675 
15676 /*
15677  * Field : Packet Count - pktcnt
15678  *
15679  * This field is programmed by the application with the expected number of packets
15680  * to be transmitted (OUT) or received (IN). The host decrements this count on
15681  * every successful transmission or reception of an OUT/IN packet. Once this count
15682  * reaches zero, the application is interrupted to indicate normal completion. The
15683  * width of this counter is specified as 10 bits.
15684  *
15685  * Field Access Macros:
15686  *
15687  */
15688 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ0_PKTCNT register field. */
15689 #define ALT_USB_HOST_HCTSIZ0_PKTCNT_LSB 19
15690 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ0_PKTCNT register field. */
15691 #define ALT_USB_HOST_HCTSIZ0_PKTCNT_MSB 28
15692 /* The width in bits of the ALT_USB_HOST_HCTSIZ0_PKTCNT register field. */
15693 #define ALT_USB_HOST_HCTSIZ0_PKTCNT_WIDTH 10
15694 /* The mask used to set the ALT_USB_HOST_HCTSIZ0_PKTCNT register field value. */
15695 #define ALT_USB_HOST_HCTSIZ0_PKTCNT_SET_MSK 0x1ff80000
15696 /* The mask used to clear the ALT_USB_HOST_HCTSIZ0_PKTCNT register field value. */
15697 #define ALT_USB_HOST_HCTSIZ0_PKTCNT_CLR_MSK 0xe007ffff
15698 /* The reset value of the ALT_USB_HOST_HCTSIZ0_PKTCNT register field. */
15699 #define ALT_USB_HOST_HCTSIZ0_PKTCNT_RESET 0x0
15700 /* Extracts the ALT_USB_HOST_HCTSIZ0_PKTCNT field value from a register. */
15701 #define ALT_USB_HOST_HCTSIZ0_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
15702 /* Produces a ALT_USB_HOST_HCTSIZ0_PKTCNT register field value suitable for setting the register. */
15703 #define ALT_USB_HOST_HCTSIZ0_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
15704 
15705 /*
15706  * Field : PID - pid
15707  *
15708  * The application programs this field with the type of PID to use forthe initial
15709  * transaction. The host maintains this field for the rest of the transfer.
15710  *
15711  * Field Enumeration Values:
15712  *
15713  * Enum | Value | Description
15714  * :---------------------------------|:------|:------------------------------------
15715  * ALT_USB_HOST_HCTSIZ0_PID_E_DATA0 | 0x0 | DATA0
15716  * ALT_USB_HOST_HCTSIZ0_PID_E_DATA2 | 0x1 | DATA2
15717  * ALT_USB_HOST_HCTSIZ0_PID_E_DATA1 | 0x2 | DATA1
15718  * ALT_USB_HOST_HCTSIZ0_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
15719  *
15720  * Field Access Macros:
15721  *
15722  */
15723 /*
15724  * Enumerated value for register field ALT_USB_HOST_HCTSIZ0_PID
15725  *
15726  * DATA0
15727  */
15728 #define ALT_USB_HOST_HCTSIZ0_PID_E_DATA0 0x0
15729 /*
15730  * Enumerated value for register field ALT_USB_HOST_HCTSIZ0_PID
15731  *
15732  * DATA2
15733  */
15734 #define ALT_USB_HOST_HCTSIZ0_PID_E_DATA2 0x1
15735 /*
15736  * Enumerated value for register field ALT_USB_HOST_HCTSIZ0_PID
15737  *
15738  * DATA1
15739  */
15740 #define ALT_USB_HOST_HCTSIZ0_PID_E_DATA1 0x2
15741 /*
15742  * Enumerated value for register field ALT_USB_HOST_HCTSIZ0_PID
15743  *
15744  * MDATA (non-control)/SETUP (control)
15745  */
15746 #define ALT_USB_HOST_HCTSIZ0_PID_E_MDATA 0x3
15747 
15748 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ0_PID register field. */
15749 #define ALT_USB_HOST_HCTSIZ0_PID_LSB 29
15750 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ0_PID register field. */
15751 #define ALT_USB_HOST_HCTSIZ0_PID_MSB 30
15752 /* The width in bits of the ALT_USB_HOST_HCTSIZ0_PID register field. */
15753 #define ALT_USB_HOST_HCTSIZ0_PID_WIDTH 2
15754 /* The mask used to set the ALT_USB_HOST_HCTSIZ0_PID register field value. */
15755 #define ALT_USB_HOST_HCTSIZ0_PID_SET_MSK 0x60000000
15756 /* The mask used to clear the ALT_USB_HOST_HCTSIZ0_PID register field value. */
15757 #define ALT_USB_HOST_HCTSIZ0_PID_CLR_MSK 0x9fffffff
15758 /* The reset value of the ALT_USB_HOST_HCTSIZ0_PID register field. */
15759 #define ALT_USB_HOST_HCTSIZ0_PID_RESET 0x0
15760 /* Extracts the ALT_USB_HOST_HCTSIZ0_PID field value from a register. */
15761 #define ALT_USB_HOST_HCTSIZ0_PID_GET(value) (((value) & 0x60000000) >> 29)
15762 /* Produces a ALT_USB_HOST_HCTSIZ0_PID register field value suitable for setting the register. */
15763 #define ALT_USB_HOST_HCTSIZ0_PID_SET(value) (((value) << 29) & 0x60000000)
15764 
15765 /*
15766  * Field : Do Ping - dopng
15767  *
15768  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
15769  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
15770  * for IN transfers it disables the channel.
15771  *
15772  * Field Enumeration Values:
15773  *
15774  * Enum | Value | Description
15775  * :------------------------------------|:------|:-----------------
15776  * ALT_USB_HOST_HCTSIZ0_DOPNG_E_NOPING | 0x0 | No ping protocol
15777  * ALT_USB_HOST_HCTSIZ0_DOPNG_E_PING | 0x1 | Ping protocol
15778  *
15779  * Field Access Macros:
15780  *
15781  */
15782 /*
15783  * Enumerated value for register field ALT_USB_HOST_HCTSIZ0_DOPNG
15784  *
15785  * No ping protocol
15786  */
15787 #define ALT_USB_HOST_HCTSIZ0_DOPNG_E_NOPING 0x0
15788 /*
15789  * Enumerated value for register field ALT_USB_HOST_HCTSIZ0_DOPNG
15790  *
15791  * Ping protocol
15792  */
15793 #define ALT_USB_HOST_HCTSIZ0_DOPNG_E_PING 0x1
15794 
15795 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ0_DOPNG register field. */
15796 #define ALT_USB_HOST_HCTSIZ0_DOPNG_LSB 31
15797 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ0_DOPNG register field. */
15798 #define ALT_USB_HOST_HCTSIZ0_DOPNG_MSB 31
15799 /* The width in bits of the ALT_USB_HOST_HCTSIZ0_DOPNG register field. */
15800 #define ALT_USB_HOST_HCTSIZ0_DOPNG_WIDTH 1
15801 /* The mask used to set the ALT_USB_HOST_HCTSIZ0_DOPNG register field value. */
15802 #define ALT_USB_HOST_HCTSIZ0_DOPNG_SET_MSK 0x80000000
15803 /* The mask used to clear the ALT_USB_HOST_HCTSIZ0_DOPNG register field value. */
15804 #define ALT_USB_HOST_HCTSIZ0_DOPNG_CLR_MSK 0x7fffffff
15805 /* The reset value of the ALT_USB_HOST_HCTSIZ0_DOPNG register field. */
15806 #define ALT_USB_HOST_HCTSIZ0_DOPNG_RESET 0x0
15807 /* Extracts the ALT_USB_HOST_HCTSIZ0_DOPNG field value from a register. */
15808 #define ALT_USB_HOST_HCTSIZ0_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
15809 /* Produces a ALT_USB_HOST_HCTSIZ0_DOPNG register field value suitable for setting the register. */
15810 #define ALT_USB_HOST_HCTSIZ0_DOPNG_SET(value) (((value) << 31) & 0x80000000)
15811 
15812 #ifndef __ASSEMBLY__
15813 /*
15814  * WARNING: The C register and register group struct declarations are provided for
15815  * convenience and illustrative purposes. They should, however, be used with
15816  * caution as the C language standard provides no guarantees about the alignment or
15817  * atomicity of device memory accesses. The recommended practice for writing
15818  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
15819  * alt_write_word() functions.
15820  *
15821  * The struct declaration for register ALT_USB_HOST_HCTSIZ0.
15822  */
15823 struct ALT_USB_HOST_HCTSIZ0_s
15824 {
15825  uint32_t xfersize : 19; /* Transfer Size */
15826  uint32_t pktcnt : 10; /* Packet Count */
15827  uint32_t pid : 2; /* PID */
15828  uint32_t dopng : 1; /* Do Ping */
15829 };
15830 
15831 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ0. */
15832 typedef volatile struct ALT_USB_HOST_HCTSIZ0_s ALT_USB_HOST_HCTSIZ0_t;
15833 #endif /* __ASSEMBLY__ */
15834 
15835 /* The byte offset of the ALT_USB_HOST_HCTSIZ0 register from the beginning of the component. */
15836 #define ALT_USB_HOST_HCTSIZ0_OFST 0x110
15837 /* The address of the ALT_USB_HOST_HCTSIZ0 register. */
15838 #define ALT_USB_HOST_HCTSIZ0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ0_OFST))
15839 
15840 /*
15841  * Register : Host Channel 0 DMA Address Register - hcdma0
15842  *
15843  * This register is used by the OTG host in the internal DMA mode to maintain the
15844  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
15845  * DWORD-aligned.
15846  *
15847  * Register Layout
15848  *
15849  * Bits | Access | Reset | Description
15850  * :-------|:-------|:------|:------------
15851  * [31:0] | RW | 0x0 | DMA Address
15852  *
15853  */
15854 /*
15855  * Field : DMA Address - hcdma0
15856  *
15857  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
15858  * first descriptor in the list should be located in this address. The first
15859  * descriptor may be or may not be ready. The core starts processing the list from
15860  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
15861  * in which the isochronous descriptors are present where N is based on nTD as per
15862  * Table below
15863  *
15864  * [31:N] Base Address [N-1:3] Offset [2:0] 000
15865  *
15866  * HS ISOC FS ISOC nTD N nTD
15867  * N
15868  *
15869  * 7 6 1 4
15870  *
15871  * 15 7 3 5
15872  *
15873  * 31 8 7 6
15874  *
15875  * 63 9 15 7
15876  *
15877  * 127 10 31 8
15878  *
15879  * 255 11 63 9
15880  *
15881  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
15882  * This value is in terms of number of descriptors. The values can be from 0 to 63.
15883  *
15884  * 0 - 1 descriptor.
15885  *
15886  * 63 - 64 descriptors.
15887  *
15888  * This field indicates the current descriptor processed in the list. This field is
15889  * updated both by application and the core. for example, if the application
15890  * enables the channel after programming CTD=5, then the core will start processing
15891  * the 6th descriptor. The address is obtained by adding a value of (8bytes*5=)
15892  * 40(decimal) to DMAAddr. Isochronous: CTD for isochronous is based on the
15893  * current frame/microframe value. Need to be set to zero by application.
15894  *
15895  * Field Access Macros:
15896  *
15897  */
15898 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA0_HCDMA0 register field. */
15899 #define ALT_USB_HOST_HCDMA0_HCDMA0_LSB 0
15900 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA0_HCDMA0 register field. */
15901 #define ALT_USB_HOST_HCDMA0_HCDMA0_MSB 31
15902 /* The width in bits of the ALT_USB_HOST_HCDMA0_HCDMA0 register field. */
15903 #define ALT_USB_HOST_HCDMA0_HCDMA0_WIDTH 32
15904 /* The mask used to set the ALT_USB_HOST_HCDMA0_HCDMA0 register field value. */
15905 #define ALT_USB_HOST_HCDMA0_HCDMA0_SET_MSK 0xffffffff
15906 /* The mask used to clear the ALT_USB_HOST_HCDMA0_HCDMA0 register field value. */
15907 #define ALT_USB_HOST_HCDMA0_HCDMA0_CLR_MSK 0x00000000
15908 /* The reset value of the ALT_USB_HOST_HCDMA0_HCDMA0 register field. */
15909 #define ALT_USB_HOST_HCDMA0_HCDMA0_RESET 0x0
15910 /* Extracts the ALT_USB_HOST_HCDMA0_HCDMA0 field value from a register. */
15911 #define ALT_USB_HOST_HCDMA0_HCDMA0_GET(value) (((value) & 0xffffffff) >> 0)
15912 /* Produces a ALT_USB_HOST_HCDMA0_HCDMA0 register field value suitable for setting the register. */
15913 #define ALT_USB_HOST_HCDMA0_HCDMA0_SET(value) (((value) << 0) & 0xffffffff)
15914 
15915 #ifndef __ASSEMBLY__
15916 /*
15917  * WARNING: The C register and register group struct declarations are provided for
15918  * convenience and illustrative purposes. They should, however, be used with
15919  * caution as the C language standard provides no guarantees about the alignment or
15920  * atomicity of device memory accesses. The recommended practice for writing
15921  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
15922  * alt_write_word() functions.
15923  *
15924  * The struct declaration for register ALT_USB_HOST_HCDMA0.
15925  */
15926 struct ALT_USB_HOST_HCDMA0_s
15927 {
15928  uint32_t hcdma0 : 32; /* DMA Address */
15929 };
15930 
15931 /* The typedef declaration for register ALT_USB_HOST_HCDMA0. */
15932 typedef volatile struct ALT_USB_HOST_HCDMA0_s ALT_USB_HOST_HCDMA0_t;
15933 #endif /* __ASSEMBLY__ */
15934 
15935 /* The byte offset of the ALT_USB_HOST_HCDMA0 register from the beginning of the component. */
15936 #define ALT_USB_HOST_HCDMA0_OFST 0x114
15937 /* The address of the ALT_USB_HOST_HCDMA0 register. */
15938 #define ALT_USB_HOST_HCDMA0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA0_OFST))
15939 
15940 /*
15941  * Register : Host Channel 0 DMA Buffer Address Register - hcdmab0
15942  *
15943  * These registers are present only in case of Scatter/Gather DMA. These
15944  * registers are implemented in RAM instead of flop-based implementation. Holds
15945  * the current buffer address. This register is updated as and when the
15946  * data transfer for the corresponding end point is in progress. This
15947  * register is present only in Scatter/Gather DMA mode. Otherwise this field
15948  * is reserved.
15949  *
15950  * Register Layout
15951  *
15952  * Bits | Access | Reset | Description
15953  * :-------|:-------|:------|:----------------------------------
15954  * [31:0] | RW | 0x0 | Host Channel 0 DMA Buffer Address
15955  *
15956  */
15957 /*
15958  * Field : Host Channel 0 DMA Buffer Address - hcdmab0
15959  *
15960  * These registers are present only in case of Scatter/Gather DMA. These
15961  * registers are implemented in RAM instead of flop-based implementation. Holds
15962  * the current buffer address. This register is updated as and when the data
15963  * transfer for the corresponding end point is in progress. This register is
15964  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
15965  *
15966  * Field Access Macros:
15967  *
15968  */
15969 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB0_HCDMAB0 register field. */
15970 #define ALT_USB_HOST_HCDMAB0_HCDMAB0_LSB 0
15971 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB0_HCDMAB0 register field. */
15972 #define ALT_USB_HOST_HCDMAB0_HCDMAB0_MSB 31
15973 /* The width in bits of the ALT_USB_HOST_HCDMAB0_HCDMAB0 register field. */
15974 #define ALT_USB_HOST_HCDMAB0_HCDMAB0_WIDTH 32
15975 /* The mask used to set the ALT_USB_HOST_HCDMAB0_HCDMAB0 register field value. */
15976 #define ALT_USB_HOST_HCDMAB0_HCDMAB0_SET_MSK 0xffffffff
15977 /* The mask used to clear the ALT_USB_HOST_HCDMAB0_HCDMAB0 register field value. */
15978 #define ALT_USB_HOST_HCDMAB0_HCDMAB0_CLR_MSK 0x00000000
15979 /* The reset value of the ALT_USB_HOST_HCDMAB0_HCDMAB0 register field. */
15980 #define ALT_USB_HOST_HCDMAB0_HCDMAB0_RESET 0x0
15981 /* Extracts the ALT_USB_HOST_HCDMAB0_HCDMAB0 field value from a register. */
15982 #define ALT_USB_HOST_HCDMAB0_HCDMAB0_GET(value) (((value) & 0xffffffff) >> 0)
15983 /* Produces a ALT_USB_HOST_HCDMAB0_HCDMAB0 register field value suitable for setting the register. */
15984 #define ALT_USB_HOST_HCDMAB0_HCDMAB0_SET(value) (((value) << 0) & 0xffffffff)
15985 
15986 #ifndef __ASSEMBLY__
15987 /*
15988  * WARNING: The C register and register group struct declarations are provided for
15989  * convenience and illustrative purposes. They should, however, be used with
15990  * caution as the C language standard provides no guarantees about the alignment or
15991  * atomicity of device memory accesses. The recommended practice for writing
15992  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
15993  * alt_write_word() functions.
15994  *
15995  * The struct declaration for register ALT_USB_HOST_HCDMAB0.
15996  */
15997 struct ALT_USB_HOST_HCDMAB0_s
15998 {
15999  uint32_t hcdmab0 : 32; /* Host Channel 0 DMA Buffer Address */
16000 };
16001 
16002 /* The typedef declaration for register ALT_USB_HOST_HCDMAB0. */
16003 typedef volatile struct ALT_USB_HOST_HCDMAB0_s ALT_USB_HOST_HCDMAB0_t;
16004 #endif /* __ASSEMBLY__ */
16005 
16006 /* The byte offset of the ALT_USB_HOST_HCDMAB0 register from the beginning of the component. */
16007 #define ALT_USB_HOST_HCDMAB0_OFST 0x118
16008 /* The address of the ALT_USB_HOST_HCDMAB0 register. */
16009 #define ALT_USB_HOST_HCDMAB0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB0_OFST))
16010 
16011 /*
16012  * Register : Host Channel 1 Characteristics Register - hcchar1
16013  *
16014  * Host Channel 1 Characteristics Register
16015  *
16016  * Register Layout
16017  *
16018  * Bits | Access | Reset | Description
16019  * :--------|:-------|:------|:--------------------
16020  * [10:0] | RW | 0x0 | Maximum Packet Size
16021  * [14:11] | RW | 0x0 | Endpoint Number
16022  * [15] | RW | 0x0 | Endpoint Direction
16023  * [16] | ??? | 0x0 | *UNDEFINED*
16024  * [17] | RW | 0x0 | Low-Speed Device
16025  * [19:18] | RW | 0x0 | Endpoint Type
16026  * [21:20] | RW | 0x0 | Multi Count
16027  * [28:22] | RW | 0x0 | Device Address
16028  * [29] | ??? | 0x0 | *UNDEFINED*
16029  * [30] | R | 0x0 | Channel Disable
16030  * [31] | R | 0x0 | Channel Enable
16031  *
16032  */
16033 /*
16034  * Field : Maximum Packet Size - mps
16035  *
16036  * Indicates the maximum packet size of the associated endpoint.
16037  *
16038  * Field Access Macros:
16039  *
16040  */
16041 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR1_MPS register field. */
16042 #define ALT_USB_HOST_HCCHAR1_MPS_LSB 0
16043 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR1_MPS register field. */
16044 #define ALT_USB_HOST_HCCHAR1_MPS_MSB 10
16045 /* The width in bits of the ALT_USB_HOST_HCCHAR1_MPS register field. */
16046 #define ALT_USB_HOST_HCCHAR1_MPS_WIDTH 11
16047 /* The mask used to set the ALT_USB_HOST_HCCHAR1_MPS register field value. */
16048 #define ALT_USB_HOST_HCCHAR1_MPS_SET_MSK 0x000007ff
16049 /* The mask used to clear the ALT_USB_HOST_HCCHAR1_MPS register field value. */
16050 #define ALT_USB_HOST_HCCHAR1_MPS_CLR_MSK 0xfffff800
16051 /* The reset value of the ALT_USB_HOST_HCCHAR1_MPS register field. */
16052 #define ALT_USB_HOST_HCCHAR1_MPS_RESET 0x0
16053 /* Extracts the ALT_USB_HOST_HCCHAR1_MPS field value from a register. */
16054 #define ALT_USB_HOST_HCCHAR1_MPS_GET(value) (((value) & 0x000007ff) >> 0)
16055 /* Produces a ALT_USB_HOST_HCCHAR1_MPS register field value suitable for setting the register. */
16056 #define ALT_USB_HOST_HCCHAR1_MPS_SET(value) (((value) << 0) & 0x000007ff)
16057 
16058 /*
16059  * Field : Endpoint Number - epnum
16060  *
16061  * Indicates the endpoint number on the device serving as the data source or sink.
16062  *
16063  * Field Enumeration Values:
16064  *
16065  * Enum | Value | Description
16066  * :-------------------------------------|:------|:--------------
16067  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT0 | 0x0 | End point 0
16068  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT1 | 0x1 | End point 1
16069  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT2 | 0x2 | End point 2
16070  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT3 | 0x3 | End point 3
16071  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT4 | 0x4 | End point 4
16072  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT5 | 0x5 | End point 5
16073  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT6 | 0x6 | End point 6
16074  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT7 | 0x7 | End point 7
16075  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT8 | 0x8 | End point 8
16076  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT9 | 0x9 | End point 9
16077  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT10 | 0xa | End point 10
16078  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT11 | 0xb | End point 11
16079  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT12 | 0xc | End point 12
16080  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT13 | 0xd | End point 13
16081  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT14 | 0xe | End point 14
16082  * ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT15 | 0xf | End point 15
16083  *
16084  * Field Access Macros:
16085  *
16086  */
16087 /*
16088  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16089  *
16090  * End point 0
16091  */
16092 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT0 0x0
16093 /*
16094  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16095  *
16096  * End point 1
16097  */
16098 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT1 0x1
16099 /*
16100  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16101  *
16102  * End point 2
16103  */
16104 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT2 0x2
16105 /*
16106  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16107  *
16108  * End point 3
16109  */
16110 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT3 0x3
16111 /*
16112  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16113  *
16114  * End point 4
16115  */
16116 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT4 0x4
16117 /*
16118  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16119  *
16120  * End point 5
16121  */
16122 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT5 0x5
16123 /*
16124  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16125  *
16126  * End point 6
16127  */
16128 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT6 0x6
16129 /*
16130  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16131  *
16132  * End point 7
16133  */
16134 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT7 0x7
16135 /*
16136  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16137  *
16138  * End point 8
16139  */
16140 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT8 0x8
16141 /*
16142  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16143  *
16144  * End point 9
16145  */
16146 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT9 0x9
16147 /*
16148  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16149  *
16150  * End point 10
16151  */
16152 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT10 0xa
16153 /*
16154  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16155  *
16156  * End point 11
16157  */
16158 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT11 0xb
16159 /*
16160  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16161  *
16162  * End point 12
16163  */
16164 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT12 0xc
16165 /*
16166  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16167  *
16168  * End point 13
16169  */
16170 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT13 0xd
16171 /*
16172  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16173  *
16174  * End point 14
16175  */
16176 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT14 0xe
16177 /*
16178  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPNUM
16179  *
16180  * End point 15
16181  */
16182 #define ALT_USB_HOST_HCCHAR1_EPNUM_E_ENDPT15 0xf
16183 
16184 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR1_EPNUM register field. */
16185 #define ALT_USB_HOST_HCCHAR1_EPNUM_LSB 11
16186 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR1_EPNUM register field. */
16187 #define ALT_USB_HOST_HCCHAR1_EPNUM_MSB 14
16188 /* The width in bits of the ALT_USB_HOST_HCCHAR1_EPNUM register field. */
16189 #define ALT_USB_HOST_HCCHAR1_EPNUM_WIDTH 4
16190 /* The mask used to set the ALT_USB_HOST_HCCHAR1_EPNUM register field value. */
16191 #define ALT_USB_HOST_HCCHAR1_EPNUM_SET_MSK 0x00007800
16192 /* The mask used to clear the ALT_USB_HOST_HCCHAR1_EPNUM register field value. */
16193 #define ALT_USB_HOST_HCCHAR1_EPNUM_CLR_MSK 0xffff87ff
16194 /* The reset value of the ALT_USB_HOST_HCCHAR1_EPNUM register field. */
16195 #define ALT_USB_HOST_HCCHAR1_EPNUM_RESET 0x0
16196 /* Extracts the ALT_USB_HOST_HCCHAR1_EPNUM field value from a register. */
16197 #define ALT_USB_HOST_HCCHAR1_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
16198 /* Produces a ALT_USB_HOST_HCCHAR1_EPNUM register field value suitable for setting the register. */
16199 #define ALT_USB_HOST_HCCHAR1_EPNUM_SET(value) (((value) << 11) & 0x00007800)
16200 
16201 /*
16202  * Field : Endpoint Direction - epdir
16203  *
16204  * Indicates whether the transaction is IN or OUT.
16205  *
16206  * Field Enumeration Values:
16207  *
16208  * Enum | Value | Description
16209  * :---------------------------------|:------|:--------------
16210  * ALT_USB_HOST_HCCHAR1_EPDIR_E_OUT | 0x0 | OUT Direction
16211  * ALT_USB_HOST_HCCHAR1_EPDIR_E_IN | 0x1 | IN Direction
16212  *
16213  * Field Access Macros:
16214  *
16215  */
16216 /*
16217  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPDIR
16218  *
16219  * OUT Direction
16220  */
16221 #define ALT_USB_HOST_HCCHAR1_EPDIR_E_OUT 0x0
16222 /*
16223  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPDIR
16224  *
16225  * IN Direction
16226  */
16227 #define ALT_USB_HOST_HCCHAR1_EPDIR_E_IN 0x1
16228 
16229 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR1_EPDIR register field. */
16230 #define ALT_USB_HOST_HCCHAR1_EPDIR_LSB 15
16231 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR1_EPDIR register field. */
16232 #define ALT_USB_HOST_HCCHAR1_EPDIR_MSB 15
16233 /* The width in bits of the ALT_USB_HOST_HCCHAR1_EPDIR register field. */
16234 #define ALT_USB_HOST_HCCHAR1_EPDIR_WIDTH 1
16235 /* The mask used to set the ALT_USB_HOST_HCCHAR1_EPDIR register field value. */
16236 #define ALT_USB_HOST_HCCHAR1_EPDIR_SET_MSK 0x00008000
16237 /* The mask used to clear the ALT_USB_HOST_HCCHAR1_EPDIR register field value. */
16238 #define ALT_USB_HOST_HCCHAR1_EPDIR_CLR_MSK 0xffff7fff
16239 /* The reset value of the ALT_USB_HOST_HCCHAR1_EPDIR register field. */
16240 #define ALT_USB_HOST_HCCHAR1_EPDIR_RESET 0x0
16241 /* Extracts the ALT_USB_HOST_HCCHAR1_EPDIR field value from a register. */
16242 #define ALT_USB_HOST_HCCHAR1_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
16243 /* Produces a ALT_USB_HOST_HCCHAR1_EPDIR register field value suitable for setting the register. */
16244 #define ALT_USB_HOST_HCCHAR1_EPDIR_SET(value) (((value) << 15) & 0x00008000)
16245 
16246 /*
16247  * Field : Low-Speed Device - lspddev
16248  *
16249  * This field is set by the application to indicate that this channel is
16250  * communicating to a low-speed device. The application must program this bit when
16251  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
16252  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
16253  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
16254  * core ignores this bit even if it is set by the application software
16255  *
16256  * Field Enumeration Values:
16257  *
16258  * Enum | Value | Description
16259  * :------------------------------------|:------|:----------------------------------------
16260  * ALT_USB_HOST_HCCHAR1_LSPDDEV_E_DISD | 0x0 | Not Communicating with low speed device
16261  * ALT_USB_HOST_HCCHAR1_LSPDDEV_E_END | 0x1 | Communicating with low speed device
16262  *
16263  * Field Access Macros:
16264  *
16265  */
16266 /*
16267  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_LSPDDEV
16268  *
16269  * Not Communicating with low speed device
16270  */
16271 #define ALT_USB_HOST_HCCHAR1_LSPDDEV_E_DISD 0x0
16272 /*
16273  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_LSPDDEV
16274  *
16275  * Communicating with low speed device
16276  */
16277 #define ALT_USB_HOST_HCCHAR1_LSPDDEV_E_END 0x1
16278 
16279 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR1_LSPDDEV register field. */
16280 #define ALT_USB_HOST_HCCHAR1_LSPDDEV_LSB 17
16281 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR1_LSPDDEV register field. */
16282 #define ALT_USB_HOST_HCCHAR1_LSPDDEV_MSB 17
16283 /* The width in bits of the ALT_USB_HOST_HCCHAR1_LSPDDEV register field. */
16284 #define ALT_USB_HOST_HCCHAR1_LSPDDEV_WIDTH 1
16285 /* The mask used to set the ALT_USB_HOST_HCCHAR1_LSPDDEV register field value. */
16286 #define ALT_USB_HOST_HCCHAR1_LSPDDEV_SET_MSK 0x00020000
16287 /* The mask used to clear the ALT_USB_HOST_HCCHAR1_LSPDDEV register field value. */
16288 #define ALT_USB_HOST_HCCHAR1_LSPDDEV_CLR_MSK 0xfffdffff
16289 /* The reset value of the ALT_USB_HOST_HCCHAR1_LSPDDEV register field. */
16290 #define ALT_USB_HOST_HCCHAR1_LSPDDEV_RESET 0x0
16291 /* Extracts the ALT_USB_HOST_HCCHAR1_LSPDDEV field value from a register. */
16292 #define ALT_USB_HOST_HCCHAR1_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
16293 /* Produces a ALT_USB_HOST_HCCHAR1_LSPDDEV register field value suitable for setting the register. */
16294 #define ALT_USB_HOST_HCCHAR1_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
16295 
16296 /*
16297  * Field : Endpoint Type - eptype
16298  *
16299  * Indicates the transfer type selected.
16300  *
16301  * Field Enumeration Values:
16302  *
16303  * Enum | Value | Description
16304  * :-------------------------------------|:------|:------------
16305  * ALT_USB_HOST_HCCHAR1_EPTYPE_E_CTL | 0x0 | Control
16306  * ALT_USB_HOST_HCCHAR1_EPTYPE_E_ISOC | 0x1 | Isochronous
16307  * ALT_USB_HOST_HCCHAR1_EPTYPE_E_BULK | 0x2 | Bulk
16308  * ALT_USB_HOST_HCCHAR1_EPTYPE_E_INTERR | 0x3 | Interrupt
16309  *
16310  * Field Access Macros:
16311  *
16312  */
16313 /*
16314  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPTYPE
16315  *
16316  * Control
16317  */
16318 #define ALT_USB_HOST_HCCHAR1_EPTYPE_E_CTL 0x0
16319 /*
16320  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPTYPE
16321  *
16322  * Isochronous
16323  */
16324 #define ALT_USB_HOST_HCCHAR1_EPTYPE_E_ISOC 0x1
16325 /*
16326  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPTYPE
16327  *
16328  * Bulk
16329  */
16330 #define ALT_USB_HOST_HCCHAR1_EPTYPE_E_BULK 0x2
16331 /*
16332  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EPTYPE
16333  *
16334  * Interrupt
16335  */
16336 #define ALT_USB_HOST_HCCHAR1_EPTYPE_E_INTERR 0x3
16337 
16338 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR1_EPTYPE register field. */
16339 #define ALT_USB_HOST_HCCHAR1_EPTYPE_LSB 18
16340 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR1_EPTYPE register field. */
16341 #define ALT_USB_HOST_HCCHAR1_EPTYPE_MSB 19
16342 /* The width in bits of the ALT_USB_HOST_HCCHAR1_EPTYPE register field. */
16343 #define ALT_USB_HOST_HCCHAR1_EPTYPE_WIDTH 2
16344 /* The mask used to set the ALT_USB_HOST_HCCHAR1_EPTYPE register field value. */
16345 #define ALT_USB_HOST_HCCHAR1_EPTYPE_SET_MSK 0x000c0000
16346 /* The mask used to clear the ALT_USB_HOST_HCCHAR1_EPTYPE register field value. */
16347 #define ALT_USB_HOST_HCCHAR1_EPTYPE_CLR_MSK 0xfff3ffff
16348 /* The reset value of the ALT_USB_HOST_HCCHAR1_EPTYPE register field. */
16349 #define ALT_USB_HOST_HCCHAR1_EPTYPE_RESET 0x0
16350 /* Extracts the ALT_USB_HOST_HCCHAR1_EPTYPE field value from a register. */
16351 #define ALT_USB_HOST_HCCHAR1_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
16352 /* Produces a ALT_USB_HOST_HCCHAR1_EPTYPE register field value suitable for setting the register. */
16353 #define ALT_USB_HOST_HCCHAR1_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
16354 
16355 /*
16356  * Field : Multi Count - ec
16357  *
16358  * When the Split Enable bit of the Host Channel-n Split Control register
16359  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
16360  * transactions that must be executed per microframe for this periodic endpoint.
16361  * for non periodic transfers, this field is used only in DMA mode, and specifies
16362  * the number packets to be fetched for this channel before the internal DMA engine
16363  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
16364  * number of immediate retries to be performed for a periodic split transactions on
16365  * transaction errors. This field must be set to at least 1.
16366  *
16367  * Field Enumeration Values:
16368  *
16369  * Enum | Value | Description
16370  * :-------------------------------------|:------|:----------------------------------------------
16371  * ALT_USB_HOST_HCCHAR1_EC_E_RSVD | 0x0 | Reserved This field yields undefined result
16372  * ALT_USB_HOST_HCCHAR1_EC_E_TRANSONE | 0x1 | 1 transaction
16373  * ALT_USB_HOST_HCCHAR1_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
16374  * : | | per microframe
16375  * ALT_USB_HOST_HCCHAR1_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
16376  * : | | per microframe
16377  *
16378  * Field Access Macros:
16379  *
16380  */
16381 /*
16382  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EC
16383  *
16384  * Reserved This field yields undefined result
16385  */
16386 #define ALT_USB_HOST_HCCHAR1_EC_E_RSVD 0x0
16387 /*
16388  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EC
16389  *
16390  * 1 transaction
16391  */
16392 #define ALT_USB_HOST_HCCHAR1_EC_E_TRANSONE 0x1
16393 /*
16394  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EC
16395  *
16396  * 2 transactions to be issued for this endpoint per microframe
16397  */
16398 #define ALT_USB_HOST_HCCHAR1_EC_E_TRANSTWO 0x2
16399 /*
16400  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_EC
16401  *
16402  * 3 transactions to be issued for this endpoint per microframe
16403  */
16404 #define ALT_USB_HOST_HCCHAR1_EC_E_TRANSTHREE 0x3
16405 
16406 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR1_EC register field. */
16407 #define ALT_USB_HOST_HCCHAR1_EC_LSB 20
16408 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR1_EC register field. */
16409 #define ALT_USB_HOST_HCCHAR1_EC_MSB 21
16410 /* The width in bits of the ALT_USB_HOST_HCCHAR1_EC register field. */
16411 #define ALT_USB_HOST_HCCHAR1_EC_WIDTH 2
16412 /* The mask used to set the ALT_USB_HOST_HCCHAR1_EC register field value. */
16413 #define ALT_USB_HOST_HCCHAR1_EC_SET_MSK 0x00300000
16414 /* The mask used to clear the ALT_USB_HOST_HCCHAR1_EC register field value. */
16415 #define ALT_USB_HOST_HCCHAR1_EC_CLR_MSK 0xffcfffff
16416 /* The reset value of the ALT_USB_HOST_HCCHAR1_EC register field. */
16417 #define ALT_USB_HOST_HCCHAR1_EC_RESET 0x0
16418 /* Extracts the ALT_USB_HOST_HCCHAR1_EC field value from a register. */
16419 #define ALT_USB_HOST_HCCHAR1_EC_GET(value) (((value) & 0x00300000) >> 20)
16420 /* Produces a ALT_USB_HOST_HCCHAR1_EC register field value suitable for setting the register. */
16421 #define ALT_USB_HOST_HCCHAR1_EC_SET(value) (((value) << 20) & 0x00300000)
16422 
16423 /*
16424  * Field : Device Address - devaddr
16425  *
16426  * This field selects the specific device serving as the data source or sink.
16427  *
16428  * Field Access Macros:
16429  *
16430  */
16431 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR1_DEVADDR register field. */
16432 #define ALT_USB_HOST_HCCHAR1_DEVADDR_LSB 22
16433 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR1_DEVADDR register field. */
16434 #define ALT_USB_HOST_HCCHAR1_DEVADDR_MSB 28
16435 /* The width in bits of the ALT_USB_HOST_HCCHAR1_DEVADDR register field. */
16436 #define ALT_USB_HOST_HCCHAR1_DEVADDR_WIDTH 7
16437 /* The mask used to set the ALT_USB_HOST_HCCHAR1_DEVADDR register field value. */
16438 #define ALT_USB_HOST_HCCHAR1_DEVADDR_SET_MSK 0x1fc00000
16439 /* The mask used to clear the ALT_USB_HOST_HCCHAR1_DEVADDR register field value. */
16440 #define ALT_USB_HOST_HCCHAR1_DEVADDR_CLR_MSK 0xe03fffff
16441 /* The reset value of the ALT_USB_HOST_HCCHAR1_DEVADDR register field. */
16442 #define ALT_USB_HOST_HCCHAR1_DEVADDR_RESET 0x0
16443 /* Extracts the ALT_USB_HOST_HCCHAR1_DEVADDR field value from a register. */
16444 #define ALT_USB_HOST_HCCHAR1_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
16445 /* Produces a ALT_USB_HOST_HCCHAR1_DEVADDR register field value suitable for setting the register. */
16446 #define ALT_USB_HOST_HCCHAR1_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
16447 
16448 /*
16449  * Field : Channel Disable - chdis
16450  *
16451  * The application sets this bit to stop transmitting/receiving data on a channel,
16452  * even before the transfer for that channel is complete. The application must wait
16453  * for the Channel Disabled interrupt before treating the channel as disabled.
16454  *
16455  * Field Enumeration Values:
16456  *
16457  * Enum | Value | Description
16458  * :-----------------------------------|:------|:----------------------------
16459  * ALT_USB_HOST_HCCHAR1_CHDIS_E_INACT | 0x0 | Transmit/Recieve normal
16460  * ALT_USB_HOST_HCCHAR1_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving
16461  *
16462  * Field Access Macros:
16463  *
16464  */
16465 /*
16466  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_CHDIS
16467  *
16468  * Transmit/Recieve normal
16469  */
16470 #define ALT_USB_HOST_HCCHAR1_CHDIS_E_INACT 0x0
16471 /*
16472  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_CHDIS
16473  *
16474  * Stop transmitting/receiving
16475  */
16476 #define ALT_USB_HOST_HCCHAR1_CHDIS_E_ACT 0x1
16477 
16478 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR1_CHDIS register field. */
16479 #define ALT_USB_HOST_HCCHAR1_CHDIS_LSB 30
16480 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR1_CHDIS register field. */
16481 #define ALT_USB_HOST_HCCHAR1_CHDIS_MSB 30
16482 /* The width in bits of the ALT_USB_HOST_HCCHAR1_CHDIS register field. */
16483 #define ALT_USB_HOST_HCCHAR1_CHDIS_WIDTH 1
16484 /* The mask used to set the ALT_USB_HOST_HCCHAR1_CHDIS register field value. */
16485 #define ALT_USB_HOST_HCCHAR1_CHDIS_SET_MSK 0x40000000
16486 /* The mask used to clear the ALT_USB_HOST_HCCHAR1_CHDIS register field value. */
16487 #define ALT_USB_HOST_HCCHAR1_CHDIS_CLR_MSK 0xbfffffff
16488 /* The reset value of the ALT_USB_HOST_HCCHAR1_CHDIS register field. */
16489 #define ALT_USB_HOST_HCCHAR1_CHDIS_RESET 0x0
16490 /* Extracts the ALT_USB_HOST_HCCHAR1_CHDIS field value from a register. */
16491 #define ALT_USB_HOST_HCCHAR1_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
16492 /* Produces a ALT_USB_HOST_HCCHAR1_CHDIS register field value suitable for setting the register. */
16493 #define ALT_USB_HOST_HCCHAR1_CHDIS_SET(value) (((value) << 30) & 0x40000000)
16494 
16495 /*
16496  * Field : Channel Enable - chena
16497  *
16498  * When Scatter/Gather mode is disabled This field is set by the application and
16499  * cleared by the OTG host.
16500  *
16501  * 0: Channel disabled
16502  *
16503  * 1: Channel enabled
16504  *
16505  * When Scatter/Gather mode is enabled.
16506  *
16507  * Field Enumeration Values:
16508  *
16509  * Enum | Value | Description
16510  * :-----------------------------------|:------|:-------------------------------------------------
16511  * ALT_USB_HOST_HCCHAR1_CHENA_E_INACT | 0x0 | Indicates that the descriptor structure is not
16512  * : | | yet ready
16513  * ALT_USB_HOST_HCCHAR1_CHENA_E_ACT | 0x1 | Indicates that the descriptor structure and
16514  * : | | data buffer with data is setup and this
16515  * : | | channel can access the descriptor
16516  *
16517  * Field Access Macros:
16518  *
16519  */
16520 /*
16521  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_CHENA
16522  *
16523  * Indicates that the descriptor structure is not yet ready
16524  */
16525 #define ALT_USB_HOST_HCCHAR1_CHENA_E_INACT 0x0
16526 /*
16527  * Enumerated value for register field ALT_USB_HOST_HCCHAR1_CHENA
16528  *
16529  * Indicates that the descriptor structure and data buffer with data is
16530  * setup and this channel can access the descriptor
16531  */
16532 #define ALT_USB_HOST_HCCHAR1_CHENA_E_ACT 0x1
16533 
16534 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR1_CHENA register field. */
16535 #define ALT_USB_HOST_HCCHAR1_CHENA_LSB 31
16536 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR1_CHENA register field. */
16537 #define ALT_USB_HOST_HCCHAR1_CHENA_MSB 31
16538 /* The width in bits of the ALT_USB_HOST_HCCHAR1_CHENA register field. */
16539 #define ALT_USB_HOST_HCCHAR1_CHENA_WIDTH 1
16540 /* The mask used to set the ALT_USB_HOST_HCCHAR1_CHENA register field value. */
16541 #define ALT_USB_HOST_HCCHAR1_CHENA_SET_MSK 0x80000000
16542 /* The mask used to clear the ALT_USB_HOST_HCCHAR1_CHENA register field value. */
16543 #define ALT_USB_HOST_HCCHAR1_CHENA_CLR_MSK 0x7fffffff
16544 /* The reset value of the ALT_USB_HOST_HCCHAR1_CHENA register field. */
16545 #define ALT_USB_HOST_HCCHAR1_CHENA_RESET 0x0
16546 /* Extracts the ALT_USB_HOST_HCCHAR1_CHENA field value from a register. */
16547 #define ALT_USB_HOST_HCCHAR1_CHENA_GET(value) (((value) & 0x80000000) >> 31)
16548 /* Produces a ALT_USB_HOST_HCCHAR1_CHENA register field value suitable for setting the register. */
16549 #define ALT_USB_HOST_HCCHAR1_CHENA_SET(value) (((value) << 31) & 0x80000000)
16550 
16551 #ifndef __ASSEMBLY__
16552 /*
16553  * WARNING: The C register and register group struct declarations are provided for
16554  * convenience and illustrative purposes. They should, however, be used with
16555  * caution as the C language standard provides no guarantees about the alignment or
16556  * atomicity of device memory accesses. The recommended practice for writing
16557  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
16558  * alt_write_word() functions.
16559  *
16560  * The struct declaration for register ALT_USB_HOST_HCCHAR1.
16561  */
16562 struct ALT_USB_HOST_HCCHAR1_s
16563 {
16564  uint32_t mps : 11; /* Maximum Packet Size */
16565  uint32_t epnum : 4; /* Endpoint Number */
16566  uint32_t epdir : 1; /* Endpoint Direction */
16567  uint32_t : 1; /* *UNDEFINED* */
16568  uint32_t lspddev : 1; /* Low-Speed Device */
16569  uint32_t eptype : 2; /* Endpoint Type */
16570  uint32_t ec : 2; /* Multi Count */
16571  uint32_t devaddr : 7; /* Device Address */
16572  uint32_t : 1; /* *UNDEFINED* */
16573  const uint32_t chdis : 1; /* Channel Disable */
16574  const uint32_t chena : 1; /* Channel Enable */
16575 };
16576 
16577 /* The typedef declaration for register ALT_USB_HOST_HCCHAR1. */
16578 typedef volatile struct ALT_USB_HOST_HCCHAR1_s ALT_USB_HOST_HCCHAR1_t;
16579 #endif /* __ASSEMBLY__ */
16580 
16581 /* The byte offset of the ALT_USB_HOST_HCCHAR1 register from the beginning of the component. */
16582 #define ALT_USB_HOST_HCCHAR1_OFST 0x120
16583 /* The address of the ALT_USB_HOST_HCCHAR1 register. */
16584 #define ALT_USB_HOST_HCCHAR1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR1_OFST))
16585 
16586 /*
16587  * Register : Host Channel 1 Split Control Register - hcsplt1
16588  *
16589  * Channel_number 1
16590  *
16591  * Register Layout
16592  *
16593  * Bits | Access | Reset | Description
16594  * :--------|:-------|:------|:---------------------
16595  * [6:0] | RW | 0x0 | Port Address
16596  * [13:7] | RW | 0x0 | Hub Address
16597  * [15:14] | RW | 0x0 | Transaction Position
16598  * [16] | RW | 0x0 | Do Complete Split
16599  * [30:17] | ??? | 0x0 | *UNDEFINED*
16600  * [31] | RW | 0x0 | Split Enable
16601  *
16602  */
16603 /*
16604  * Field : Port Address - prtaddr
16605  *
16606  * This field is the port number of the recipient transactiontranslator.
16607  *
16608  * Field Access Macros:
16609  *
16610  */
16611 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT1_PRTADDR register field. */
16612 #define ALT_USB_HOST_HCSPLT1_PRTADDR_LSB 0
16613 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT1_PRTADDR register field. */
16614 #define ALT_USB_HOST_HCSPLT1_PRTADDR_MSB 6
16615 /* The width in bits of the ALT_USB_HOST_HCSPLT1_PRTADDR register field. */
16616 #define ALT_USB_HOST_HCSPLT1_PRTADDR_WIDTH 7
16617 /* The mask used to set the ALT_USB_HOST_HCSPLT1_PRTADDR register field value. */
16618 #define ALT_USB_HOST_HCSPLT1_PRTADDR_SET_MSK 0x0000007f
16619 /* The mask used to clear the ALT_USB_HOST_HCSPLT1_PRTADDR register field value. */
16620 #define ALT_USB_HOST_HCSPLT1_PRTADDR_CLR_MSK 0xffffff80
16621 /* The reset value of the ALT_USB_HOST_HCSPLT1_PRTADDR register field. */
16622 #define ALT_USB_HOST_HCSPLT1_PRTADDR_RESET 0x0
16623 /* Extracts the ALT_USB_HOST_HCSPLT1_PRTADDR field value from a register. */
16624 #define ALT_USB_HOST_HCSPLT1_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
16625 /* Produces a ALT_USB_HOST_HCSPLT1_PRTADDR register field value suitable for setting the register. */
16626 #define ALT_USB_HOST_HCSPLT1_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
16627 
16628 /*
16629  * Field : Hub Address - hubaddr
16630  *
16631  * This field holds the device address of the transaction translator's hub.
16632  *
16633  * Field Access Macros:
16634  *
16635  */
16636 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT1_HUBADDR register field. */
16637 #define ALT_USB_HOST_HCSPLT1_HUBADDR_LSB 7
16638 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT1_HUBADDR register field. */
16639 #define ALT_USB_HOST_HCSPLT1_HUBADDR_MSB 13
16640 /* The width in bits of the ALT_USB_HOST_HCSPLT1_HUBADDR register field. */
16641 #define ALT_USB_HOST_HCSPLT1_HUBADDR_WIDTH 7
16642 /* The mask used to set the ALT_USB_HOST_HCSPLT1_HUBADDR register field value. */
16643 #define ALT_USB_HOST_HCSPLT1_HUBADDR_SET_MSK 0x00003f80
16644 /* The mask used to clear the ALT_USB_HOST_HCSPLT1_HUBADDR register field value. */
16645 #define ALT_USB_HOST_HCSPLT1_HUBADDR_CLR_MSK 0xffffc07f
16646 /* The reset value of the ALT_USB_HOST_HCSPLT1_HUBADDR register field. */
16647 #define ALT_USB_HOST_HCSPLT1_HUBADDR_RESET 0x0
16648 /* Extracts the ALT_USB_HOST_HCSPLT1_HUBADDR field value from a register. */
16649 #define ALT_USB_HOST_HCSPLT1_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
16650 /* Produces a ALT_USB_HOST_HCSPLT1_HUBADDR register field value suitable for setting the register. */
16651 #define ALT_USB_HOST_HCSPLT1_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
16652 
16653 /*
16654  * Field : Transaction Position - xactpos
16655  *
16656  * This field is used to determine whether to send all, first, middle, or last
16657  * payloads with each OUT transaction.
16658  *
16659  * Field Enumeration Values:
16660  *
16661  * Enum | Value | Description
16662  * :--------------------------------------|:------|:------------------------------------------------
16663  * ALT_USB_HOST_HCSPLT1_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
16664  * : | | transaction (which is larger than 188 bytes)
16665  * ALT_USB_HOST_HCSPLT1_XACTPOS_E_END | 0x1 | End. This is the last payload of this
16666  * : | | transaction (which is larger than 188 bytes)
16667  * ALT_USB_HOST_HCSPLT1_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
16668  * : | | transaction (which is larger than 188 bytes)
16669  * ALT_USB_HOST_HCSPLT1_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
16670  * : | | transaction (which is less than or equal to 188
16671  * : | | bytes)
16672  *
16673  * Field Access Macros:
16674  *
16675  */
16676 /*
16677  * Enumerated value for register field ALT_USB_HOST_HCSPLT1_XACTPOS
16678  *
16679  * Mid. This is the middle payload of this transaction (which is larger than 188
16680  * bytes)
16681  */
16682 #define ALT_USB_HOST_HCSPLT1_XACTPOS_E_MIDDLE 0x0
16683 /*
16684  * Enumerated value for register field ALT_USB_HOST_HCSPLT1_XACTPOS
16685  *
16686  * End. This is the last payload of this transaction (which is larger than 188
16687  * bytes)
16688  */
16689 #define ALT_USB_HOST_HCSPLT1_XACTPOS_E_END 0x1
16690 /*
16691  * Enumerated value for register field ALT_USB_HOST_HCSPLT1_XACTPOS
16692  *
16693  * Begin. This is the first data payload of this transaction (which is larger than
16694  * 188 bytes)
16695  */
16696 #define ALT_USB_HOST_HCSPLT1_XACTPOS_E_BEGIN 0x2
16697 /*
16698  * Enumerated value for register field ALT_USB_HOST_HCSPLT1_XACTPOS
16699  *
16700  * All. This is the entire data payload is of this transaction (which is less than
16701  * or equal to 188 bytes)
16702  */
16703 #define ALT_USB_HOST_HCSPLT1_XACTPOS_E_ALL 0x3
16704 
16705 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT1_XACTPOS register field. */
16706 #define ALT_USB_HOST_HCSPLT1_XACTPOS_LSB 14
16707 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT1_XACTPOS register field. */
16708 #define ALT_USB_HOST_HCSPLT1_XACTPOS_MSB 15
16709 /* The width in bits of the ALT_USB_HOST_HCSPLT1_XACTPOS register field. */
16710 #define ALT_USB_HOST_HCSPLT1_XACTPOS_WIDTH 2
16711 /* The mask used to set the ALT_USB_HOST_HCSPLT1_XACTPOS register field value. */
16712 #define ALT_USB_HOST_HCSPLT1_XACTPOS_SET_MSK 0x0000c000
16713 /* The mask used to clear the ALT_USB_HOST_HCSPLT1_XACTPOS register field value. */
16714 #define ALT_USB_HOST_HCSPLT1_XACTPOS_CLR_MSK 0xffff3fff
16715 /* The reset value of the ALT_USB_HOST_HCSPLT1_XACTPOS register field. */
16716 #define ALT_USB_HOST_HCSPLT1_XACTPOS_RESET 0x0
16717 /* Extracts the ALT_USB_HOST_HCSPLT1_XACTPOS field value from a register. */
16718 #define ALT_USB_HOST_HCSPLT1_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
16719 /* Produces a ALT_USB_HOST_HCSPLT1_XACTPOS register field value suitable for setting the register. */
16720 #define ALT_USB_HOST_HCSPLT1_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
16721 
16722 /*
16723  * Field : Do Complete Split - compsplt
16724  *
16725  * The application sets this field to request the OTG host to perform a complete
16726  * split transaction.
16727  *
16728  * Field Enumeration Values:
16729  *
16730  * Enum | Value | Description
16731  * :----------------------------------------|:------|:---------------------
16732  * ALT_USB_HOST_HCSPLT1_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
16733  * ALT_USB_HOST_HCSPLT1_COMPSPLT_E_SPLIT | 0x1 | Split transaction
16734  *
16735  * Field Access Macros:
16736  *
16737  */
16738 /*
16739  * Enumerated value for register field ALT_USB_HOST_HCSPLT1_COMPSPLT
16740  *
16741  * No split transaction
16742  */
16743 #define ALT_USB_HOST_HCSPLT1_COMPSPLT_E_NOSPLIT 0x0
16744 /*
16745  * Enumerated value for register field ALT_USB_HOST_HCSPLT1_COMPSPLT
16746  *
16747  * Split transaction
16748  */
16749 #define ALT_USB_HOST_HCSPLT1_COMPSPLT_E_SPLIT 0x1
16750 
16751 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT1_COMPSPLT register field. */
16752 #define ALT_USB_HOST_HCSPLT1_COMPSPLT_LSB 16
16753 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT1_COMPSPLT register field. */
16754 #define ALT_USB_HOST_HCSPLT1_COMPSPLT_MSB 16
16755 /* The width in bits of the ALT_USB_HOST_HCSPLT1_COMPSPLT register field. */
16756 #define ALT_USB_HOST_HCSPLT1_COMPSPLT_WIDTH 1
16757 /* The mask used to set the ALT_USB_HOST_HCSPLT1_COMPSPLT register field value. */
16758 #define ALT_USB_HOST_HCSPLT1_COMPSPLT_SET_MSK 0x00010000
16759 /* The mask used to clear the ALT_USB_HOST_HCSPLT1_COMPSPLT register field value. */
16760 #define ALT_USB_HOST_HCSPLT1_COMPSPLT_CLR_MSK 0xfffeffff
16761 /* The reset value of the ALT_USB_HOST_HCSPLT1_COMPSPLT register field. */
16762 #define ALT_USB_HOST_HCSPLT1_COMPSPLT_RESET 0x0
16763 /* Extracts the ALT_USB_HOST_HCSPLT1_COMPSPLT field value from a register. */
16764 #define ALT_USB_HOST_HCSPLT1_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
16765 /* Produces a ALT_USB_HOST_HCSPLT1_COMPSPLT register field value suitable for setting the register. */
16766 #define ALT_USB_HOST_HCSPLT1_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
16767 
16768 /*
16769  * Field : Split Enable - spltena
16770  *
16771  * The application sets this field to indicate that this channel is enabled to
16772  * perform split transactions.
16773  *
16774  * Field Enumeration Values:
16775  *
16776  * Enum | Value | Description
16777  * :------------------------------------|:------|:------------------
16778  * ALT_USB_HOST_HCSPLT1_SPLTENA_E_DISD | 0x0 | Split not enabled
16779  * ALT_USB_HOST_HCSPLT1_SPLTENA_E_END | 0x1 | Split enabled
16780  *
16781  * Field Access Macros:
16782  *
16783  */
16784 /*
16785  * Enumerated value for register field ALT_USB_HOST_HCSPLT1_SPLTENA
16786  *
16787  * Split not enabled
16788  */
16789 #define ALT_USB_HOST_HCSPLT1_SPLTENA_E_DISD 0x0
16790 /*
16791  * Enumerated value for register field ALT_USB_HOST_HCSPLT1_SPLTENA
16792  *
16793  * Split enabled
16794  */
16795 #define ALT_USB_HOST_HCSPLT1_SPLTENA_E_END 0x1
16796 
16797 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT1_SPLTENA register field. */
16798 #define ALT_USB_HOST_HCSPLT1_SPLTENA_LSB 31
16799 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT1_SPLTENA register field. */
16800 #define ALT_USB_HOST_HCSPLT1_SPLTENA_MSB 31
16801 /* The width in bits of the ALT_USB_HOST_HCSPLT1_SPLTENA register field. */
16802 #define ALT_USB_HOST_HCSPLT1_SPLTENA_WIDTH 1
16803 /* The mask used to set the ALT_USB_HOST_HCSPLT1_SPLTENA register field value. */
16804 #define ALT_USB_HOST_HCSPLT1_SPLTENA_SET_MSK 0x80000000
16805 /* The mask used to clear the ALT_USB_HOST_HCSPLT1_SPLTENA register field value. */
16806 #define ALT_USB_HOST_HCSPLT1_SPLTENA_CLR_MSK 0x7fffffff
16807 /* The reset value of the ALT_USB_HOST_HCSPLT1_SPLTENA register field. */
16808 #define ALT_USB_HOST_HCSPLT1_SPLTENA_RESET 0x0
16809 /* Extracts the ALT_USB_HOST_HCSPLT1_SPLTENA field value from a register. */
16810 #define ALT_USB_HOST_HCSPLT1_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
16811 /* Produces a ALT_USB_HOST_HCSPLT1_SPLTENA register field value suitable for setting the register. */
16812 #define ALT_USB_HOST_HCSPLT1_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
16813 
16814 #ifndef __ASSEMBLY__
16815 /*
16816  * WARNING: The C register and register group struct declarations are provided for
16817  * convenience and illustrative purposes. They should, however, be used with
16818  * caution as the C language standard provides no guarantees about the alignment or
16819  * atomicity of device memory accesses. The recommended practice for writing
16820  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
16821  * alt_write_word() functions.
16822  *
16823  * The struct declaration for register ALT_USB_HOST_HCSPLT1.
16824  */
16825 struct ALT_USB_HOST_HCSPLT1_s
16826 {
16827  uint32_t prtaddr : 7; /* Port Address */
16828  uint32_t hubaddr : 7; /* Hub Address */
16829  uint32_t xactpos : 2; /* Transaction Position */
16830  uint32_t compsplt : 1; /* Do Complete Split */
16831  uint32_t : 14; /* *UNDEFINED* */
16832  uint32_t spltena : 1; /* Split Enable */
16833 };
16834 
16835 /* The typedef declaration for register ALT_USB_HOST_HCSPLT1. */
16836 typedef volatile struct ALT_USB_HOST_HCSPLT1_s ALT_USB_HOST_HCSPLT1_t;
16837 #endif /* __ASSEMBLY__ */
16838 
16839 /* The byte offset of the ALT_USB_HOST_HCSPLT1 register from the beginning of the component. */
16840 #define ALT_USB_HOST_HCSPLT1_OFST 0x124
16841 /* The address of the ALT_USB_HOST_HCSPLT1 register. */
16842 #define ALT_USB_HOST_HCSPLT1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT1_OFST))
16843 
16844 /*
16845  * Register : Host Channel 1 Interrupt Register - hcint1
16846  *
16847  * This register indicates the status of a channel with respect to USB- and AHB-
16848  * related events. The application must read this register when the Host Channels
16849  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
16850  * application can read this register, it must first read the Host All Channels
16851  * Interrupt (HAINT) register to get the exact channel number for the Host
16852  * Channel-n Interrupt register. The application must clear the appropriate bit in
16853  * this register to clear the corresponding bits in the HAINT and GINTSTS
16854  * registers.
16855  *
16856  * Register Layout
16857  *
16858  * Bits | Access | Reset | Description
16859  * :--------|:-------|:------|:--------------------------------------------
16860  * [0] | R | 0x0 | Transfer Completed
16861  * [1] | R | 0x0 | Channel Halted
16862  * [2] | R | 0x0 | AHB Error
16863  * [3] | R | 0x0 | STALL Response Received Interrupt
16864  * [4] | R | 0x0 | NAK Response Received Interrupt
16865  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
16866  * [6] | R | 0x0 | NYET Response Received Interrupt
16867  * [7] | R | 0x0 | Transaction Error
16868  * [8] | R | 0x0 | Babble Error
16869  * [9] | R | 0x0 | Frame Overrun
16870  * [10] | R | 0x0 | Data Toggle Error
16871  * [11] | R | 0x0 | BNA Interrupt
16872  * [12] | R | 0x0 | Excessive Transaction Error
16873  * [13] | R | 0x0 | Descriptor rollover interrupt
16874  * [31:14] | ??? | 0x0 | *UNDEFINED*
16875  *
16876  */
16877 /*
16878  * Field : Transfer Completed - xfercompl
16879  *
16880  * Transfer completed normally without any errors. This bit can be set only by the
16881  * core and the application should write 1 to clear it.
16882  *
16883  * Field Enumeration Values:
16884  *
16885  * Enum | Value | Description
16886  * :--------------------------------------|:------|:-----------------------------------------------
16887  * ALT_USB_HOST_HCINT1_XFERCOMPL_E_INACT | 0x0 | No transfer
16888  * ALT_USB_HOST_HCINT1_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
16889  *
16890  * Field Access Macros:
16891  *
16892  */
16893 /*
16894  * Enumerated value for register field ALT_USB_HOST_HCINT1_XFERCOMPL
16895  *
16896  * No transfer
16897  */
16898 #define ALT_USB_HOST_HCINT1_XFERCOMPL_E_INACT 0x0
16899 /*
16900  * Enumerated value for register field ALT_USB_HOST_HCINT1_XFERCOMPL
16901  *
16902  * Transfer completed normally without any errors
16903  */
16904 #define ALT_USB_HOST_HCINT1_XFERCOMPL_E_ACT 0x1
16905 
16906 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_XFERCOMPL register field. */
16907 #define ALT_USB_HOST_HCINT1_XFERCOMPL_LSB 0
16908 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_XFERCOMPL register field. */
16909 #define ALT_USB_HOST_HCINT1_XFERCOMPL_MSB 0
16910 /* The width in bits of the ALT_USB_HOST_HCINT1_XFERCOMPL register field. */
16911 #define ALT_USB_HOST_HCINT1_XFERCOMPL_WIDTH 1
16912 /* The mask used to set the ALT_USB_HOST_HCINT1_XFERCOMPL register field value. */
16913 #define ALT_USB_HOST_HCINT1_XFERCOMPL_SET_MSK 0x00000001
16914 /* The mask used to clear the ALT_USB_HOST_HCINT1_XFERCOMPL register field value. */
16915 #define ALT_USB_HOST_HCINT1_XFERCOMPL_CLR_MSK 0xfffffffe
16916 /* The reset value of the ALT_USB_HOST_HCINT1_XFERCOMPL register field. */
16917 #define ALT_USB_HOST_HCINT1_XFERCOMPL_RESET 0x0
16918 /* Extracts the ALT_USB_HOST_HCINT1_XFERCOMPL field value from a register. */
16919 #define ALT_USB_HOST_HCINT1_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
16920 /* Produces a ALT_USB_HOST_HCINT1_XFERCOMPL register field value suitable for setting the register. */
16921 #define ALT_USB_HOST_HCINT1_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
16922 
16923 /*
16924  * Field : Channel Halted - chhltd
16925  *
16926  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
16927  * either because of any USB transaction error or in response to disable request by
16928  * the application or because of a completed transfer. In Scatter/gather DMA mode,
16929  * this indicates that transfer completed due to any of the following
16930  *
16931  * . EOL being set in descriptor
16932  *
16933  * . AHB error
16934  *
16935  * . Excessive transaction errors
16936  *
16937  * . Babble
16938  *
16939  * . Stall
16940  *
16941  * Field Enumeration Values:
16942  *
16943  * Enum | Value | Description
16944  * :-----------------------------------|:------|:-------------------
16945  * ALT_USB_HOST_HCINT1_CHHLTD_E_INACT | 0x0 | Channel not halted
16946  * ALT_USB_HOST_HCINT1_CHHLTD_E_ACT | 0x1 | Channel Halted
16947  *
16948  * Field Access Macros:
16949  *
16950  */
16951 /*
16952  * Enumerated value for register field ALT_USB_HOST_HCINT1_CHHLTD
16953  *
16954  * Channel not halted
16955  */
16956 #define ALT_USB_HOST_HCINT1_CHHLTD_E_INACT 0x0
16957 /*
16958  * Enumerated value for register field ALT_USB_HOST_HCINT1_CHHLTD
16959  *
16960  * Channel Halted
16961  */
16962 #define ALT_USB_HOST_HCINT1_CHHLTD_E_ACT 0x1
16963 
16964 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_CHHLTD register field. */
16965 #define ALT_USB_HOST_HCINT1_CHHLTD_LSB 1
16966 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_CHHLTD register field. */
16967 #define ALT_USB_HOST_HCINT1_CHHLTD_MSB 1
16968 /* The width in bits of the ALT_USB_HOST_HCINT1_CHHLTD register field. */
16969 #define ALT_USB_HOST_HCINT1_CHHLTD_WIDTH 1
16970 /* The mask used to set the ALT_USB_HOST_HCINT1_CHHLTD register field value. */
16971 #define ALT_USB_HOST_HCINT1_CHHLTD_SET_MSK 0x00000002
16972 /* The mask used to clear the ALT_USB_HOST_HCINT1_CHHLTD register field value. */
16973 #define ALT_USB_HOST_HCINT1_CHHLTD_CLR_MSK 0xfffffffd
16974 /* The reset value of the ALT_USB_HOST_HCINT1_CHHLTD register field. */
16975 #define ALT_USB_HOST_HCINT1_CHHLTD_RESET 0x0
16976 /* Extracts the ALT_USB_HOST_HCINT1_CHHLTD field value from a register. */
16977 #define ALT_USB_HOST_HCINT1_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
16978 /* Produces a ALT_USB_HOST_HCINT1_CHHLTD register field value suitable for setting the register. */
16979 #define ALT_USB_HOST_HCINT1_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
16980 
16981 /*
16982  * Field : AHB Error - ahberr
16983  *
16984  * This is generated only in Internal DMA mode when there is an AHB error during
16985  * AHB read/write. The application can read the corresponding channel's DMA address
16986  * register to get the error address.
16987  *
16988  * Field Enumeration Values:
16989  *
16990  * Enum | Value | Description
16991  * :-----------------------------------|:------|:--------------------------------
16992  * ALT_USB_HOST_HCINT1_AHBERR_E_INACT | 0x0 | No AHB error
16993  * ALT_USB_HOST_HCINT1_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
16994  *
16995  * Field Access Macros:
16996  *
16997  */
16998 /*
16999  * Enumerated value for register field ALT_USB_HOST_HCINT1_AHBERR
17000  *
17001  * No AHB error
17002  */
17003 #define ALT_USB_HOST_HCINT1_AHBERR_E_INACT 0x0
17004 /*
17005  * Enumerated value for register field ALT_USB_HOST_HCINT1_AHBERR
17006  *
17007  * AHB error during AHB read/write
17008  */
17009 #define ALT_USB_HOST_HCINT1_AHBERR_E_ACT 0x1
17010 
17011 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_AHBERR register field. */
17012 #define ALT_USB_HOST_HCINT1_AHBERR_LSB 2
17013 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_AHBERR register field. */
17014 #define ALT_USB_HOST_HCINT1_AHBERR_MSB 2
17015 /* The width in bits of the ALT_USB_HOST_HCINT1_AHBERR register field. */
17016 #define ALT_USB_HOST_HCINT1_AHBERR_WIDTH 1
17017 /* The mask used to set the ALT_USB_HOST_HCINT1_AHBERR register field value. */
17018 #define ALT_USB_HOST_HCINT1_AHBERR_SET_MSK 0x00000004
17019 /* The mask used to clear the ALT_USB_HOST_HCINT1_AHBERR register field value. */
17020 #define ALT_USB_HOST_HCINT1_AHBERR_CLR_MSK 0xfffffffb
17021 /* The reset value of the ALT_USB_HOST_HCINT1_AHBERR register field. */
17022 #define ALT_USB_HOST_HCINT1_AHBERR_RESET 0x0
17023 /* Extracts the ALT_USB_HOST_HCINT1_AHBERR field value from a register. */
17024 #define ALT_USB_HOST_HCINT1_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
17025 /* Produces a ALT_USB_HOST_HCINT1_AHBERR register field value suitable for setting the register. */
17026 #define ALT_USB_HOST_HCINT1_AHBERR_SET(value) (((value) << 2) & 0x00000004)
17027 
17028 /*
17029  * Field : STALL Response Received Interrupt - stall
17030  *
17031  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
17032  * This bit can be set only by the core and the application should write 1 to clear
17033  * it.
17034  *
17035  * Field Enumeration Values:
17036  *
17037  * Enum | Value | Description
17038  * :----------------------------------|:------|:-------------------
17039  * ALT_USB_HOST_HCINT1_STALL_E_INACT | 0x0 | No Stall Interrupt
17040  * ALT_USB_HOST_HCINT1_STALL_E_ACT | 0x1 | Stall Interrupt
17041  *
17042  * Field Access Macros:
17043  *
17044  */
17045 /*
17046  * Enumerated value for register field ALT_USB_HOST_HCINT1_STALL
17047  *
17048  * No Stall Interrupt
17049  */
17050 #define ALT_USB_HOST_HCINT1_STALL_E_INACT 0x0
17051 /*
17052  * Enumerated value for register field ALT_USB_HOST_HCINT1_STALL
17053  *
17054  * Stall Interrupt
17055  */
17056 #define ALT_USB_HOST_HCINT1_STALL_E_ACT 0x1
17057 
17058 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_STALL register field. */
17059 #define ALT_USB_HOST_HCINT1_STALL_LSB 3
17060 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_STALL register field. */
17061 #define ALT_USB_HOST_HCINT1_STALL_MSB 3
17062 /* The width in bits of the ALT_USB_HOST_HCINT1_STALL register field. */
17063 #define ALT_USB_HOST_HCINT1_STALL_WIDTH 1
17064 /* The mask used to set the ALT_USB_HOST_HCINT1_STALL register field value. */
17065 #define ALT_USB_HOST_HCINT1_STALL_SET_MSK 0x00000008
17066 /* The mask used to clear the ALT_USB_HOST_HCINT1_STALL register field value. */
17067 #define ALT_USB_HOST_HCINT1_STALL_CLR_MSK 0xfffffff7
17068 /* The reset value of the ALT_USB_HOST_HCINT1_STALL register field. */
17069 #define ALT_USB_HOST_HCINT1_STALL_RESET 0x0
17070 /* Extracts the ALT_USB_HOST_HCINT1_STALL field value from a register. */
17071 #define ALT_USB_HOST_HCINT1_STALL_GET(value) (((value) & 0x00000008) >> 3)
17072 /* Produces a ALT_USB_HOST_HCINT1_STALL register field value suitable for setting the register. */
17073 #define ALT_USB_HOST_HCINT1_STALL_SET(value) (((value) << 3) & 0x00000008)
17074 
17075 /*
17076  * Field : NAK Response Received Interrupt - nak
17077  *
17078  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
17079  * core.This bit can be set only by the core and the application should write 1 to
17080  * clear it.
17081  *
17082  * Field Enumeration Values:
17083  *
17084  * Enum | Value | Description
17085  * :--------------------------------|:------|:-----------------------------------
17086  * ALT_USB_HOST_HCINT1_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
17087  * ALT_USB_HOST_HCINT1_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
17088  *
17089  * Field Access Macros:
17090  *
17091  */
17092 /*
17093  * Enumerated value for register field ALT_USB_HOST_HCINT1_NAK
17094  *
17095  * No NAK Response Received Interrupt
17096  */
17097 #define ALT_USB_HOST_HCINT1_NAK_E_INACT 0x0
17098 /*
17099  * Enumerated value for register field ALT_USB_HOST_HCINT1_NAK
17100  *
17101  * NAK Response Received Interrupt
17102  */
17103 #define ALT_USB_HOST_HCINT1_NAK_E_ACT 0x1
17104 
17105 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_NAK register field. */
17106 #define ALT_USB_HOST_HCINT1_NAK_LSB 4
17107 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_NAK register field. */
17108 #define ALT_USB_HOST_HCINT1_NAK_MSB 4
17109 /* The width in bits of the ALT_USB_HOST_HCINT1_NAK register field. */
17110 #define ALT_USB_HOST_HCINT1_NAK_WIDTH 1
17111 /* The mask used to set the ALT_USB_HOST_HCINT1_NAK register field value. */
17112 #define ALT_USB_HOST_HCINT1_NAK_SET_MSK 0x00000010
17113 /* The mask used to clear the ALT_USB_HOST_HCINT1_NAK register field value. */
17114 #define ALT_USB_HOST_HCINT1_NAK_CLR_MSK 0xffffffef
17115 /* The reset value of the ALT_USB_HOST_HCINT1_NAK register field. */
17116 #define ALT_USB_HOST_HCINT1_NAK_RESET 0x0
17117 /* Extracts the ALT_USB_HOST_HCINT1_NAK field value from a register. */
17118 #define ALT_USB_HOST_HCINT1_NAK_GET(value) (((value) & 0x00000010) >> 4)
17119 /* Produces a ALT_USB_HOST_HCINT1_NAK register field value suitable for setting the register. */
17120 #define ALT_USB_HOST_HCINT1_NAK_SET(value) (((value) << 4) & 0x00000010)
17121 
17122 /*
17123  * Field : ACK Response Received Transmitted Interrupt - ack
17124  *
17125  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
17126  * This bit can be set only by the core and the application should write 1 to clear
17127  * it.
17128  *
17129  * Field Enumeration Values:
17130  *
17131  * Enum | Value | Description
17132  * :--------------------------------|:------|:-----------------------------------------------
17133  * ALT_USB_HOST_HCINT1_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
17134  * ALT_USB_HOST_HCINT1_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
17135  *
17136  * Field Access Macros:
17137  *
17138  */
17139 /*
17140  * Enumerated value for register field ALT_USB_HOST_HCINT1_ACK
17141  *
17142  * No ACK Response Received Transmitted Interrupt
17143  */
17144 #define ALT_USB_HOST_HCINT1_ACK_E_INACT 0x0
17145 /*
17146  * Enumerated value for register field ALT_USB_HOST_HCINT1_ACK
17147  *
17148  * ACK Response Received Transmitted Interrup
17149  */
17150 #define ALT_USB_HOST_HCINT1_ACK_E_ACT 0x1
17151 
17152 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_ACK register field. */
17153 #define ALT_USB_HOST_HCINT1_ACK_LSB 5
17154 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_ACK register field. */
17155 #define ALT_USB_HOST_HCINT1_ACK_MSB 5
17156 /* The width in bits of the ALT_USB_HOST_HCINT1_ACK register field. */
17157 #define ALT_USB_HOST_HCINT1_ACK_WIDTH 1
17158 /* The mask used to set the ALT_USB_HOST_HCINT1_ACK register field value. */
17159 #define ALT_USB_HOST_HCINT1_ACK_SET_MSK 0x00000020
17160 /* The mask used to clear the ALT_USB_HOST_HCINT1_ACK register field value. */
17161 #define ALT_USB_HOST_HCINT1_ACK_CLR_MSK 0xffffffdf
17162 /* The reset value of the ALT_USB_HOST_HCINT1_ACK register field. */
17163 #define ALT_USB_HOST_HCINT1_ACK_RESET 0x0
17164 /* Extracts the ALT_USB_HOST_HCINT1_ACK field value from a register. */
17165 #define ALT_USB_HOST_HCINT1_ACK_GET(value) (((value) & 0x00000020) >> 5)
17166 /* Produces a ALT_USB_HOST_HCINT1_ACK register field value suitable for setting the register. */
17167 #define ALT_USB_HOST_HCINT1_ACK_SET(value) (((value) << 5) & 0x00000020)
17168 
17169 /*
17170  * Field : NYET Response Received Interrupt - nyet
17171  *
17172  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
17173  * core.This bit can be set only by the core and the application should write 1 to
17174  * clear it.
17175  *
17176  * Field Enumeration Values:
17177  *
17178  * Enum | Value | Description
17179  * :---------------------------------|:------|:------------------------------------
17180  * ALT_USB_HOST_HCINT1_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
17181  * ALT_USB_HOST_HCINT1_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
17182  *
17183  * Field Access Macros:
17184  *
17185  */
17186 /*
17187  * Enumerated value for register field ALT_USB_HOST_HCINT1_NYET
17188  *
17189  * No NYET Response Received Interrupt
17190  */
17191 #define ALT_USB_HOST_HCINT1_NYET_E_INACT 0x0
17192 /*
17193  * Enumerated value for register field ALT_USB_HOST_HCINT1_NYET
17194  *
17195  * NYET Response Received Interrupt
17196  */
17197 #define ALT_USB_HOST_HCINT1_NYET_E_ACT 0x1
17198 
17199 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_NYET register field. */
17200 #define ALT_USB_HOST_HCINT1_NYET_LSB 6
17201 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_NYET register field. */
17202 #define ALT_USB_HOST_HCINT1_NYET_MSB 6
17203 /* The width in bits of the ALT_USB_HOST_HCINT1_NYET register field. */
17204 #define ALT_USB_HOST_HCINT1_NYET_WIDTH 1
17205 /* The mask used to set the ALT_USB_HOST_HCINT1_NYET register field value. */
17206 #define ALT_USB_HOST_HCINT1_NYET_SET_MSK 0x00000040
17207 /* The mask used to clear the ALT_USB_HOST_HCINT1_NYET register field value. */
17208 #define ALT_USB_HOST_HCINT1_NYET_CLR_MSK 0xffffffbf
17209 /* The reset value of the ALT_USB_HOST_HCINT1_NYET register field. */
17210 #define ALT_USB_HOST_HCINT1_NYET_RESET 0x0
17211 /* Extracts the ALT_USB_HOST_HCINT1_NYET field value from a register. */
17212 #define ALT_USB_HOST_HCINT1_NYET_GET(value) (((value) & 0x00000040) >> 6)
17213 /* Produces a ALT_USB_HOST_HCINT1_NYET register field value suitable for setting the register. */
17214 #define ALT_USB_HOST_HCINT1_NYET_SET(value) (((value) << 6) & 0x00000040)
17215 
17216 /*
17217  * Field : Transaction Error - xacterr
17218  *
17219  * Indicates one of the following errors occurred on the USB.-CRC check failure
17220  *
17221  * * Timeout
17222  *
17223  * * Bit stuff error
17224  *
17225  * * False EOP
17226  *
17227  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
17228  * This bit can be set only by the core and the application should write 1 to clear
17229  * it.
17230  *
17231  * Field Enumeration Values:
17232  *
17233  * Enum | Value | Description
17234  * :------------------------------------|:------|:---------------------
17235  * ALT_USB_HOST_HCINT1_XACTERR_E_INACT | 0x0 | No Transaction Error
17236  * ALT_USB_HOST_HCINT1_XACTERR_E_ACT | 0x1 | Transaction Error
17237  *
17238  * Field Access Macros:
17239  *
17240  */
17241 /*
17242  * Enumerated value for register field ALT_USB_HOST_HCINT1_XACTERR
17243  *
17244  * No Transaction Error
17245  */
17246 #define ALT_USB_HOST_HCINT1_XACTERR_E_INACT 0x0
17247 /*
17248  * Enumerated value for register field ALT_USB_HOST_HCINT1_XACTERR
17249  *
17250  * Transaction Error
17251  */
17252 #define ALT_USB_HOST_HCINT1_XACTERR_E_ACT 0x1
17253 
17254 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_XACTERR register field. */
17255 #define ALT_USB_HOST_HCINT1_XACTERR_LSB 7
17256 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_XACTERR register field. */
17257 #define ALT_USB_HOST_HCINT1_XACTERR_MSB 7
17258 /* The width in bits of the ALT_USB_HOST_HCINT1_XACTERR register field. */
17259 #define ALT_USB_HOST_HCINT1_XACTERR_WIDTH 1
17260 /* The mask used to set the ALT_USB_HOST_HCINT1_XACTERR register field value. */
17261 #define ALT_USB_HOST_HCINT1_XACTERR_SET_MSK 0x00000080
17262 /* The mask used to clear the ALT_USB_HOST_HCINT1_XACTERR register field value. */
17263 #define ALT_USB_HOST_HCINT1_XACTERR_CLR_MSK 0xffffff7f
17264 /* The reset value of the ALT_USB_HOST_HCINT1_XACTERR register field. */
17265 #define ALT_USB_HOST_HCINT1_XACTERR_RESET 0x0
17266 /* Extracts the ALT_USB_HOST_HCINT1_XACTERR field value from a register. */
17267 #define ALT_USB_HOST_HCINT1_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
17268 /* Produces a ALT_USB_HOST_HCINT1_XACTERR register field value suitable for setting the register. */
17269 #define ALT_USB_HOST_HCINT1_XACTERR_SET(value) (((value) << 7) & 0x00000080)
17270 
17271 /*
17272  * Field : Babble Error - bblerr
17273  *
17274  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
17275  * core..This bit can be set only by the core and the application should write 1 to
17276  * clear it.
17277  *
17278  * Field Enumeration Values:
17279  *
17280  * Enum | Value | Description
17281  * :-----------------------------------|:------|:----------------
17282  * ALT_USB_HOST_HCINT1_BBLERR_E_INACT | 0x0 | No Babble Error
17283  * ALT_USB_HOST_HCINT1_BBLERR_E_ACT | 0x1 | Babble Error
17284  *
17285  * Field Access Macros:
17286  *
17287  */
17288 /*
17289  * Enumerated value for register field ALT_USB_HOST_HCINT1_BBLERR
17290  *
17291  * No Babble Error
17292  */
17293 #define ALT_USB_HOST_HCINT1_BBLERR_E_INACT 0x0
17294 /*
17295  * Enumerated value for register field ALT_USB_HOST_HCINT1_BBLERR
17296  *
17297  * Babble Error
17298  */
17299 #define ALT_USB_HOST_HCINT1_BBLERR_E_ACT 0x1
17300 
17301 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_BBLERR register field. */
17302 #define ALT_USB_HOST_HCINT1_BBLERR_LSB 8
17303 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_BBLERR register field. */
17304 #define ALT_USB_HOST_HCINT1_BBLERR_MSB 8
17305 /* The width in bits of the ALT_USB_HOST_HCINT1_BBLERR register field. */
17306 #define ALT_USB_HOST_HCINT1_BBLERR_WIDTH 1
17307 /* The mask used to set the ALT_USB_HOST_HCINT1_BBLERR register field value. */
17308 #define ALT_USB_HOST_HCINT1_BBLERR_SET_MSK 0x00000100
17309 /* The mask used to clear the ALT_USB_HOST_HCINT1_BBLERR register field value. */
17310 #define ALT_USB_HOST_HCINT1_BBLERR_CLR_MSK 0xfffffeff
17311 /* The reset value of the ALT_USB_HOST_HCINT1_BBLERR register field. */
17312 #define ALT_USB_HOST_HCINT1_BBLERR_RESET 0x0
17313 /* Extracts the ALT_USB_HOST_HCINT1_BBLERR field value from a register. */
17314 #define ALT_USB_HOST_HCINT1_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
17315 /* Produces a ALT_USB_HOST_HCINT1_BBLERR register field value suitable for setting the register. */
17316 #define ALT_USB_HOST_HCINT1_BBLERR_SET(value) (((value) << 8) & 0x00000100)
17317 
17318 /*
17319  * Field : Frame Overrun - frmovrun
17320  *
17321  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
17322  * This bit can be set only by the core and the application should write 1 to clear
17323  * it.
17324  *
17325  * Field Enumeration Values:
17326  *
17327  * Enum | Value | Description
17328  * :-------------------------------------|:------|:-----------------
17329  * ALT_USB_HOST_HCINT1_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
17330  * ALT_USB_HOST_HCINT1_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
17331  *
17332  * Field Access Macros:
17333  *
17334  */
17335 /*
17336  * Enumerated value for register field ALT_USB_HOST_HCINT1_FRMOVRUN
17337  *
17338  * No Frame Overrun
17339  */
17340 #define ALT_USB_HOST_HCINT1_FRMOVRUN_E_INACT 0x0
17341 /*
17342  * Enumerated value for register field ALT_USB_HOST_HCINT1_FRMOVRUN
17343  *
17344  * Frame Overrun
17345  */
17346 #define ALT_USB_HOST_HCINT1_FRMOVRUN_E_ACT 0x1
17347 
17348 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_FRMOVRUN register field. */
17349 #define ALT_USB_HOST_HCINT1_FRMOVRUN_LSB 9
17350 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_FRMOVRUN register field. */
17351 #define ALT_USB_HOST_HCINT1_FRMOVRUN_MSB 9
17352 /* The width in bits of the ALT_USB_HOST_HCINT1_FRMOVRUN register field. */
17353 #define ALT_USB_HOST_HCINT1_FRMOVRUN_WIDTH 1
17354 /* The mask used to set the ALT_USB_HOST_HCINT1_FRMOVRUN register field value. */
17355 #define ALT_USB_HOST_HCINT1_FRMOVRUN_SET_MSK 0x00000200
17356 /* The mask used to clear the ALT_USB_HOST_HCINT1_FRMOVRUN register field value. */
17357 #define ALT_USB_HOST_HCINT1_FRMOVRUN_CLR_MSK 0xfffffdff
17358 /* The reset value of the ALT_USB_HOST_HCINT1_FRMOVRUN register field. */
17359 #define ALT_USB_HOST_HCINT1_FRMOVRUN_RESET 0x0
17360 /* Extracts the ALT_USB_HOST_HCINT1_FRMOVRUN field value from a register. */
17361 #define ALT_USB_HOST_HCINT1_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
17362 /* Produces a ALT_USB_HOST_HCINT1_FRMOVRUN register field value suitable for setting the register. */
17363 #define ALT_USB_HOST_HCINT1_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
17364 
17365 /*
17366  * Field : Data Toggle Error - datatglerr
17367  *
17368  * This bit can be set only by the core and the application should write 1 to clear
17369  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
17370  * core.
17371  *
17372  * Field Enumeration Values:
17373  *
17374  * Enum | Value | Description
17375  * :---------------------------------------|:------|:---------------------
17376  * ALT_USB_HOST_HCINT1_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
17377  * ALT_USB_HOST_HCINT1_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
17378  *
17379  * Field Access Macros:
17380  *
17381  */
17382 /*
17383  * Enumerated value for register field ALT_USB_HOST_HCINT1_DATATGLERR
17384  *
17385  * No Data Toggle Error
17386  */
17387 #define ALT_USB_HOST_HCINT1_DATATGLERR_E_INACT 0x0
17388 /*
17389  * Enumerated value for register field ALT_USB_HOST_HCINT1_DATATGLERR
17390  *
17391  * Data Toggle Error
17392  */
17393 #define ALT_USB_HOST_HCINT1_DATATGLERR_E_ACT 0x1
17394 
17395 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_DATATGLERR register field. */
17396 #define ALT_USB_HOST_HCINT1_DATATGLERR_LSB 10
17397 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_DATATGLERR register field. */
17398 #define ALT_USB_HOST_HCINT1_DATATGLERR_MSB 10
17399 /* The width in bits of the ALT_USB_HOST_HCINT1_DATATGLERR register field. */
17400 #define ALT_USB_HOST_HCINT1_DATATGLERR_WIDTH 1
17401 /* The mask used to set the ALT_USB_HOST_HCINT1_DATATGLERR register field value. */
17402 #define ALT_USB_HOST_HCINT1_DATATGLERR_SET_MSK 0x00000400
17403 /* The mask used to clear the ALT_USB_HOST_HCINT1_DATATGLERR register field value. */
17404 #define ALT_USB_HOST_HCINT1_DATATGLERR_CLR_MSK 0xfffffbff
17405 /* The reset value of the ALT_USB_HOST_HCINT1_DATATGLERR register field. */
17406 #define ALT_USB_HOST_HCINT1_DATATGLERR_RESET 0x0
17407 /* Extracts the ALT_USB_HOST_HCINT1_DATATGLERR field value from a register. */
17408 #define ALT_USB_HOST_HCINT1_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
17409 /* Produces a ALT_USB_HOST_HCINT1_DATATGLERR register field value suitable for setting the register. */
17410 #define ALT_USB_HOST_HCINT1_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
17411 
17412 /*
17413  * Field : BNA Interrupt - bnaintr
17414  *
17415  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
17416  * generates this interrupt when the descriptor accessed is not ready for the Core
17417  * to process. BNA will not be generated for Isochronous channels. for non
17418  * Scatter/Gather DMA mode, this bit is reserved.
17419  *
17420  * Field Enumeration Values:
17421  *
17422  * Enum | Value | Description
17423  * :------------------------------------|:------|:-----------------
17424  * ALT_USB_HOST_HCINT1_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
17425  * ALT_USB_HOST_HCINT1_BNAINTR_E_ACT | 0x1 | BNA Interrupt
17426  *
17427  * Field Access Macros:
17428  *
17429  */
17430 /*
17431  * Enumerated value for register field ALT_USB_HOST_HCINT1_BNAINTR
17432  *
17433  * No BNA Interrupt
17434  */
17435 #define ALT_USB_HOST_HCINT1_BNAINTR_E_INACT 0x0
17436 /*
17437  * Enumerated value for register field ALT_USB_HOST_HCINT1_BNAINTR
17438  *
17439  * BNA Interrupt
17440  */
17441 #define ALT_USB_HOST_HCINT1_BNAINTR_E_ACT 0x1
17442 
17443 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_BNAINTR register field. */
17444 #define ALT_USB_HOST_HCINT1_BNAINTR_LSB 11
17445 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_BNAINTR register field. */
17446 #define ALT_USB_HOST_HCINT1_BNAINTR_MSB 11
17447 /* The width in bits of the ALT_USB_HOST_HCINT1_BNAINTR register field. */
17448 #define ALT_USB_HOST_HCINT1_BNAINTR_WIDTH 1
17449 /* The mask used to set the ALT_USB_HOST_HCINT1_BNAINTR register field value. */
17450 #define ALT_USB_HOST_HCINT1_BNAINTR_SET_MSK 0x00000800
17451 /* The mask used to clear the ALT_USB_HOST_HCINT1_BNAINTR register field value. */
17452 #define ALT_USB_HOST_HCINT1_BNAINTR_CLR_MSK 0xfffff7ff
17453 /* The reset value of the ALT_USB_HOST_HCINT1_BNAINTR register field. */
17454 #define ALT_USB_HOST_HCINT1_BNAINTR_RESET 0x0
17455 /* Extracts the ALT_USB_HOST_HCINT1_BNAINTR field value from a register. */
17456 #define ALT_USB_HOST_HCINT1_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
17457 /* Produces a ALT_USB_HOST_HCINT1_BNAINTR register field value suitable for setting the register. */
17458 #define ALT_USB_HOST_HCINT1_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
17459 
17460 /*
17461  * Field : Excessive Transaction Error - xcs_xact_err
17462  *
17463  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
17464  * this bit when 3 consecutive transaction errors occurred on the USB bus.
17465  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
17466  * Scatter/Gather DMA mode, this bit is reserved.
17467  *
17468  * Field Enumeration Values:
17469  *
17470  * Enum | Value | Description
17471  * :-------------------------------------------|:------|:-------------------------------
17472  * ALT_USB_HOST_HCINT1_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
17473  * ALT_USB_HOST_HCINT1_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
17474  *
17475  * Field Access Macros:
17476  *
17477  */
17478 /*
17479  * Enumerated value for register field ALT_USB_HOST_HCINT1_XCS_XACT_ERR
17480  *
17481  * No Excessive Transaction Error
17482  */
17483 #define ALT_USB_HOST_HCINT1_XCS_XACT_ERR_E_INACT 0x0
17484 /*
17485  * Enumerated value for register field ALT_USB_HOST_HCINT1_XCS_XACT_ERR
17486  *
17487  * Excessive Transaction Error
17488  */
17489 #define ALT_USB_HOST_HCINT1_XCS_XACT_ERR_E_ACVTIVE 0x1
17490 
17491 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_XCS_XACT_ERR register field. */
17492 #define ALT_USB_HOST_HCINT1_XCS_XACT_ERR_LSB 12
17493 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_XCS_XACT_ERR register field. */
17494 #define ALT_USB_HOST_HCINT1_XCS_XACT_ERR_MSB 12
17495 /* The width in bits of the ALT_USB_HOST_HCINT1_XCS_XACT_ERR register field. */
17496 #define ALT_USB_HOST_HCINT1_XCS_XACT_ERR_WIDTH 1
17497 /* The mask used to set the ALT_USB_HOST_HCINT1_XCS_XACT_ERR register field value. */
17498 #define ALT_USB_HOST_HCINT1_XCS_XACT_ERR_SET_MSK 0x00001000
17499 /* The mask used to clear the ALT_USB_HOST_HCINT1_XCS_XACT_ERR register field value. */
17500 #define ALT_USB_HOST_HCINT1_XCS_XACT_ERR_CLR_MSK 0xffffefff
17501 /* The reset value of the ALT_USB_HOST_HCINT1_XCS_XACT_ERR register field. */
17502 #define ALT_USB_HOST_HCINT1_XCS_XACT_ERR_RESET 0x0
17503 /* Extracts the ALT_USB_HOST_HCINT1_XCS_XACT_ERR field value from a register. */
17504 #define ALT_USB_HOST_HCINT1_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
17505 /* Produces a ALT_USB_HOST_HCINT1_XCS_XACT_ERR register field value suitable for setting the register. */
17506 #define ALT_USB_HOST_HCINT1_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
17507 
17508 /*
17509  * Field : Descriptor rollover interrupt - desc_lst_rollintr
17510  *
17511  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
17512  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
17513  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
17514  * mode, this bit is reserved.
17515  *
17516  * Field Enumeration Values:
17517  *
17518  * Enum | Value | Description
17519  * :----------------------------------------------|:------|:---------------------------------
17520  * ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
17521  * ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
17522  *
17523  * Field Access Macros:
17524  *
17525  */
17526 /*
17527  * Enumerated value for register field ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR
17528  *
17529  * No Descriptor rollover interrupt
17530  */
17531 #define ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR_E_INACT 0x0
17532 /*
17533  * Enumerated value for register field ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR
17534  *
17535  * Descriptor rollover interrupt
17536  */
17537 #define ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR_E_ACT 0x1
17538 
17539 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR register field. */
17540 #define ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR_LSB 13
17541 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR register field. */
17542 #define ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR_MSB 13
17543 /* The width in bits of the ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR register field. */
17544 #define ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR_WIDTH 1
17545 /* The mask used to set the ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR register field value. */
17546 #define ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR_SET_MSK 0x00002000
17547 /* The mask used to clear the ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR register field value. */
17548 #define ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
17549 /* The reset value of the ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR register field. */
17550 #define ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR_RESET 0x0
17551 /* Extracts the ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR field value from a register. */
17552 #define ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
17553 /* Produces a ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR register field value suitable for setting the register. */
17554 #define ALT_USB_HOST_HCINT1_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
17555 
17556 #ifndef __ASSEMBLY__
17557 /*
17558  * WARNING: The C register and register group struct declarations are provided for
17559  * convenience and illustrative purposes. They should, however, be used with
17560  * caution as the C language standard provides no guarantees about the alignment or
17561  * atomicity of device memory accesses. The recommended practice for writing
17562  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
17563  * alt_write_word() functions.
17564  *
17565  * The struct declaration for register ALT_USB_HOST_HCINT1.
17566  */
17567 struct ALT_USB_HOST_HCINT1_s
17568 {
17569  const uint32_t xfercompl : 1; /* Transfer Completed */
17570  const uint32_t chhltd : 1; /* Channel Halted */
17571  const uint32_t ahberr : 1; /* AHB Error */
17572  const uint32_t stall : 1; /* STALL Response Received Interrupt */
17573  const uint32_t nak : 1; /* NAK Response Received Interrupt */
17574  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
17575  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
17576  const uint32_t xacterr : 1; /* Transaction Error */
17577  const uint32_t bblerr : 1; /* Babble Error */
17578  const uint32_t frmovrun : 1; /* Frame Overrun */
17579  const uint32_t datatglerr : 1; /* Data Toggle Error */
17580  const uint32_t bnaintr : 1; /* BNA Interrupt */
17581  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
17582  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
17583  uint32_t : 18; /* *UNDEFINED* */
17584 };
17585 
17586 /* The typedef declaration for register ALT_USB_HOST_HCINT1. */
17587 typedef volatile struct ALT_USB_HOST_HCINT1_s ALT_USB_HOST_HCINT1_t;
17588 #endif /* __ASSEMBLY__ */
17589 
17590 /* The byte offset of the ALT_USB_HOST_HCINT1 register from the beginning of the component. */
17591 #define ALT_USB_HOST_HCINT1_OFST 0x128
17592 /* The address of the ALT_USB_HOST_HCINT1 register. */
17593 #define ALT_USB_HOST_HCINT1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT1_OFST))
17594 
17595 /*
17596  * Register : Host Channel 1 Interrupt Mask Register - hcintmsk1
17597  *
17598  * This register reflects the mask for each channel status described in the
17599  * previous section.
17600  *
17601  * Register Layout
17602  *
17603  * Bits | Access | Reset | Description
17604  * :--------|:-------|:------|:----------------------------------
17605  * [0] | RW | 0x0 | Transfer Completed Mask
17606  * [1] | RW | 0x0 | Channel Halted Mask
17607  * [2] | RW | 0x0 | AHB Error Mask
17608  * [10:3] | ??? | 0x0 | *UNDEFINED*
17609  * [11] | RW | 0x0 | BNA Interrupt mask
17610  * [12] | ??? | 0x0 | *UNDEFINED*
17611  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
17612  * [31:14] | ??? | 0x0 | *UNDEFINED*
17613  *
17614  */
17615 /*
17616  * Field : Transfer Completed Mask - xfercomplmsk
17617  *
17618  * Transfer complete.
17619  *
17620  * Field Enumeration Values:
17621  *
17622  * Enum | Value | Description
17623  * :--------------------------------------------|:------|:------------
17624  * ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK_E_MSK | 0x0 | Mask
17625  * ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
17626  *
17627  * Field Access Macros:
17628  *
17629  */
17630 /*
17631  * Enumerated value for register field ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK
17632  *
17633  * Mask
17634  */
17635 #define ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK_E_MSK 0x0
17636 /*
17637  * Enumerated value for register field ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK
17638  *
17639  * No mask
17640  */
17641 #define ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK_E_NOMSK 0x1
17642 
17643 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK register field. */
17644 #define ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK_LSB 0
17645 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK register field. */
17646 #define ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK_MSB 0
17647 /* The width in bits of the ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK register field. */
17648 #define ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK_WIDTH 1
17649 /* The mask used to set the ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK register field value. */
17650 #define ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK_SET_MSK 0x00000001
17651 /* The mask used to clear the ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK register field value. */
17652 #define ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK_CLR_MSK 0xfffffffe
17653 /* The reset value of the ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK register field. */
17654 #define ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK_RESET 0x0
17655 /* Extracts the ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK field value from a register. */
17656 #define ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
17657 /* Produces a ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK register field value suitable for setting the register. */
17658 #define ALT_USB_HOST_HCINTMSK1_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
17659 
17660 /*
17661  * Field : Channel Halted Mask - chhltdmsk
17662  *
17663  * Channel Halted.
17664  *
17665  * Field Enumeration Values:
17666  *
17667  * Enum | Value | Description
17668  * :-----------------------------------------|:------|:------------
17669  * ALT_USB_HOST_HCINTMSK1_CHHLTDMSK_E_MSK | 0x0 | Mask
17670  * ALT_USB_HOST_HCINTMSK1_CHHLTDMSK_E_NOMSK | 0x1 | No mask
17671  *
17672  * Field Access Macros:
17673  *
17674  */
17675 /*
17676  * Enumerated value for register field ALT_USB_HOST_HCINTMSK1_CHHLTDMSK
17677  *
17678  * Mask
17679  */
17680 #define ALT_USB_HOST_HCINTMSK1_CHHLTDMSK_E_MSK 0x0
17681 /*
17682  * Enumerated value for register field ALT_USB_HOST_HCINTMSK1_CHHLTDMSK
17683  *
17684  * No mask
17685  */
17686 #define ALT_USB_HOST_HCINTMSK1_CHHLTDMSK_E_NOMSK 0x1
17687 
17688 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK1_CHHLTDMSK register field. */
17689 #define ALT_USB_HOST_HCINTMSK1_CHHLTDMSK_LSB 1
17690 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK1_CHHLTDMSK register field. */
17691 #define ALT_USB_HOST_HCINTMSK1_CHHLTDMSK_MSB 1
17692 /* The width in bits of the ALT_USB_HOST_HCINTMSK1_CHHLTDMSK register field. */
17693 #define ALT_USB_HOST_HCINTMSK1_CHHLTDMSK_WIDTH 1
17694 /* The mask used to set the ALT_USB_HOST_HCINTMSK1_CHHLTDMSK register field value. */
17695 #define ALT_USB_HOST_HCINTMSK1_CHHLTDMSK_SET_MSK 0x00000002
17696 /* The mask used to clear the ALT_USB_HOST_HCINTMSK1_CHHLTDMSK register field value. */
17697 #define ALT_USB_HOST_HCINTMSK1_CHHLTDMSK_CLR_MSK 0xfffffffd
17698 /* The reset value of the ALT_USB_HOST_HCINTMSK1_CHHLTDMSK register field. */
17699 #define ALT_USB_HOST_HCINTMSK1_CHHLTDMSK_RESET 0x0
17700 /* Extracts the ALT_USB_HOST_HCINTMSK1_CHHLTDMSK field value from a register. */
17701 #define ALT_USB_HOST_HCINTMSK1_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
17702 /* Produces a ALT_USB_HOST_HCINTMSK1_CHHLTDMSK register field value suitable for setting the register. */
17703 #define ALT_USB_HOST_HCINTMSK1_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
17704 
17705 /*
17706  * Field : AHB Error Mask - ahberrmsk
17707  *
17708  * In scatter/gather DMA mode for host, interrupts will not be generated due to
17709  * the corresponding bits set in HCINTn.
17710  *
17711  * Field Enumeration Values:
17712  *
17713  * Enum | Value | Description
17714  * :-----------------------------------------|:------|:------------
17715  * ALT_USB_HOST_HCINTMSK1_AHBERRMSK_E_MSK | 0x0 | Mask
17716  * ALT_USB_HOST_HCINTMSK1_AHBERRMSK_E_NOMSK | 0x1 | No mask
17717  *
17718  * Field Access Macros:
17719  *
17720  */
17721 /*
17722  * Enumerated value for register field ALT_USB_HOST_HCINTMSK1_AHBERRMSK
17723  *
17724  * Mask
17725  */
17726 #define ALT_USB_HOST_HCINTMSK1_AHBERRMSK_E_MSK 0x0
17727 /*
17728  * Enumerated value for register field ALT_USB_HOST_HCINTMSK1_AHBERRMSK
17729  *
17730  * No mask
17731  */
17732 #define ALT_USB_HOST_HCINTMSK1_AHBERRMSK_E_NOMSK 0x1
17733 
17734 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK1_AHBERRMSK register field. */
17735 #define ALT_USB_HOST_HCINTMSK1_AHBERRMSK_LSB 2
17736 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK1_AHBERRMSK register field. */
17737 #define ALT_USB_HOST_HCINTMSK1_AHBERRMSK_MSB 2
17738 /* The width in bits of the ALT_USB_HOST_HCINTMSK1_AHBERRMSK register field. */
17739 #define ALT_USB_HOST_HCINTMSK1_AHBERRMSK_WIDTH 1
17740 /* The mask used to set the ALT_USB_HOST_HCINTMSK1_AHBERRMSK register field value. */
17741 #define ALT_USB_HOST_HCINTMSK1_AHBERRMSK_SET_MSK 0x00000004
17742 /* The mask used to clear the ALT_USB_HOST_HCINTMSK1_AHBERRMSK register field value. */
17743 #define ALT_USB_HOST_HCINTMSK1_AHBERRMSK_CLR_MSK 0xfffffffb
17744 /* The reset value of the ALT_USB_HOST_HCINTMSK1_AHBERRMSK register field. */
17745 #define ALT_USB_HOST_HCINTMSK1_AHBERRMSK_RESET 0x0
17746 /* Extracts the ALT_USB_HOST_HCINTMSK1_AHBERRMSK field value from a register. */
17747 #define ALT_USB_HOST_HCINTMSK1_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
17748 /* Produces a ALT_USB_HOST_HCINTMSK1_AHBERRMSK register field value suitable for setting the register. */
17749 #define ALT_USB_HOST_HCINTMSK1_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
17750 
17751 /*
17752  * Field : BNA Interrupt mask - bnaintrmsk
17753  *
17754  * This bit is valid only when Scatter/Gather DMA mode is enabled.
17755  *
17756  * Field Enumeration Values:
17757  *
17758  * Enum | Value | Description
17759  * :------------------------------------------|:------|:------------
17760  * ALT_USB_HOST_HCINTMSK1_BNAINTRMSK_E_MSK | 0x0 | Mask
17761  * ALT_USB_HOST_HCINTMSK1_BNAINTRMSK_E_NOMSK | 0x1 | No mask
17762  *
17763  * Field Access Macros:
17764  *
17765  */
17766 /*
17767  * Enumerated value for register field ALT_USB_HOST_HCINTMSK1_BNAINTRMSK
17768  *
17769  * Mask
17770  */
17771 #define ALT_USB_HOST_HCINTMSK1_BNAINTRMSK_E_MSK 0x0
17772 /*
17773  * Enumerated value for register field ALT_USB_HOST_HCINTMSK1_BNAINTRMSK
17774  *
17775  * No mask
17776  */
17777 #define ALT_USB_HOST_HCINTMSK1_BNAINTRMSK_E_NOMSK 0x1
17778 
17779 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK1_BNAINTRMSK register field. */
17780 #define ALT_USB_HOST_HCINTMSK1_BNAINTRMSK_LSB 11
17781 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK1_BNAINTRMSK register field. */
17782 #define ALT_USB_HOST_HCINTMSK1_BNAINTRMSK_MSB 11
17783 /* The width in bits of the ALT_USB_HOST_HCINTMSK1_BNAINTRMSK register field. */
17784 #define ALT_USB_HOST_HCINTMSK1_BNAINTRMSK_WIDTH 1
17785 /* The mask used to set the ALT_USB_HOST_HCINTMSK1_BNAINTRMSK register field value. */
17786 #define ALT_USB_HOST_HCINTMSK1_BNAINTRMSK_SET_MSK 0x00000800
17787 /* The mask used to clear the ALT_USB_HOST_HCINTMSK1_BNAINTRMSK register field value. */
17788 #define ALT_USB_HOST_HCINTMSK1_BNAINTRMSK_CLR_MSK 0xfffff7ff
17789 /* The reset value of the ALT_USB_HOST_HCINTMSK1_BNAINTRMSK register field. */
17790 #define ALT_USB_HOST_HCINTMSK1_BNAINTRMSK_RESET 0x0
17791 /* Extracts the ALT_USB_HOST_HCINTMSK1_BNAINTRMSK field value from a register. */
17792 #define ALT_USB_HOST_HCINTMSK1_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
17793 /* Produces a ALT_USB_HOST_HCINTMSK1_BNAINTRMSK register field value suitable for setting the register. */
17794 #define ALT_USB_HOST_HCINTMSK1_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
17795 
17796 /*
17797  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
17798  *
17799  * This bit is valid only when Scatter/Gather DMA mode is enabled.
17800  *
17801  * Field Enumeration Values:
17802  *
17803  * Enum | Value | Description
17804  * :---------------------------------------------------|:------|:------------
17805  * ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
17806  * ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
17807  *
17808  * Field Access Macros:
17809  *
17810  */
17811 /*
17812  * Enumerated value for register field ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK
17813  *
17814  * Mask
17815  */
17816 #define ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK_E_MSK 0x0
17817 /*
17818  * Enumerated value for register field ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK
17819  *
17820  * No mask
17821  */
17822 #define ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
17823 
17824 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK register field. */
17825 #define ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK_LSB 13
17826 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK register field. */
17827 #define ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK_MSB 13
17828 /* The width in bits of the ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK register field. */
17829 #define ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK_WIDTH 1
17830 /* The mask used to set the ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK register field value. */
17831 #define ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
17832 /* The mask used to clear the ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK register field value. */
17833 #define ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
17834 /* The reset value of the ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK register field. */
17835 #define ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK_RESET 0x0
17836 /* Extracts the ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK field value from a register. */
17837 #define ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
17838 /* Produces a ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
17839 #define ALT_USB_HOST_HCINTMSK1_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
17840 
17841 #ifndef __ASSEMBLY__
17842 /*
17843  * WARNING: The C register and register group struct declarations are provided for
17844  * convenience and illustrative purposes. They should, however, be used with
17845  * caution as the C language standard provides no guarantees about the alignment or
17846  * atomicity of device memory accesses. The recommended practice for writing
17847  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
17848  * alt_write_word() functions.
17849  *
17850  * The struct declaration for register ALT_USB_HOST_HCINTMSK1.
17851  */
17852 struct ALT_USB_HOST_HCINTMSK1_s
17853 {
17854  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
17855  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
17856  uint32_t ahberrmsk : 1; /* AHB Error Mask */
17857  uint32_t : 8; /* *UNDEFINED* */
17858  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
17859  uint32_t : 1; /* *UNDEFINED* */
17860  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
17861  uint32_t : 18; /* *UNDEFINED* */
17862 };
17863 
17864 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK1. */
17865 typedef volatile struct ALT_USB_HOST_HCINTMSK1_s ALT_USB_HOST_HCINTMSK1_t;
17866 #endif /* __ASSEMBLY__ */
17867 
17868 /* The byte offset of the ALT_USB_HOST_HCINTMSK1 register from the beginning of the component. */
17869 #define ALT_USB_HOST_HCINTMSK1_OFST 0x12c
17870 /* The address of the ALT_USB_HOST_HCINTMSK1 register. */
17871 #define ALT_USB_HOST_HCINTMSK1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK1_OFST))
17872 
17873 /*
17874  * Register : Host Channel 1 Transfer Size Register - hctsiz1
17875  *
17876  * Buffer DMA Mode
17877  *
17878  * Register Layout
17879  *
17880  * Bits | Access | Reset | Description
17881  * :--------|:-------|:------|:--------------
17882  * [18:0] | RW | 0x0 | Transfer Size
17883  * [28:19] | RW | 0x0 | Packet Count
17884  * [30:29] | RW | 0x0 | PID
17885  * [31] | RW | 0x0 | Do Ping
17886  *
17887  */
17888 /*
17889  * Field : Transfer Size - xfersize
17890  *
17891  * for an OUT, this field is the number of data bytes the host sends during the
17892  * transfer. for an IN, this field is the buffer size that the application has
17893  * Reserved for the transfer. The application is expected to program this field as
17894  * an integer multiple of the maximum packet size for IN transactions (periodic and
17895  * non-periodic).The width of this counter is specified as 19 bits.
17896  *
17897  * Field Access Macros:
17898  *
17899  */
17900 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ1_XFERSIZE register field. */
17901 #define ALT_USB_HOST_HCTSIZ1_XFERSIZE_LSB 0
17902 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ1_XFERSIZE register field. */
17903 #define ALT_USB_HOST_HCTSIZ1_XFERSIZE_MSB 18
17904 /* The width in bits of the ALT_USB_HOST_HCTSIZ1_XFERSIZE register field. */
17905 #define ALT_USB_HOST_HCTSIZ1_XFERSIZE_WIDTH 19
17906 /* The mask used to set the ALT_USB_HOST_HCTSIZ1_XFERSIZE register field value. */
17907 #define ALT_USB_HOST_HCTSIZ1_XFERSIZE_SET_MSK 0x0007ffff
17908 /* The mask used to clear the ALT_USB_HOST_HCTSIZ1_XFERSIZE register field value. */
17909 #define ALT_USB_HOST_HCTSIZ1_XFERSIZE_CLR_MSK 0xfff80000
17910 /* The reset value of the ALT_USB_HOST_HCTSIZ1_XFERSIZE register field. */
17911 #define ALT_USB_HOST_HCTSIZ1_XFERSIZE_RESET 0x0
17912 /* Extracts the ALT_USB_HOST_HCTSIZ1_XFERSIZE field value from a register. */
17913 #define ALT_USB_HOST_HCTSIZ1_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
17914 /* Produces a ALT_USB_HOST_HCTSIZ1_XFERSIZE register field value suitable for setting the register. */
17915 #define ALT_USB_HOST_HCTSIZ1_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
17916 
17917 /*
17918  * Field : Packet Count - pktcnt
17919  *
17920  * This field is programmed by the application with the expected number of packets
17921  * to be transmitted (OUT) or received (IN). The host decrements this count on
17922  * every successful transmission or reception of an OUT/IN packet. Once this count
17923  * reaches zero, the application is interrupted to indicate normal completion. The
17924  * width of this counter is specified as 10 bits.
17925  *
17926  * Field Access Macros:
17927  *
17928  */
17929 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ1_PKTCNT register field. */
17930 #define ALT_USB_HOST_HCTSIZ1_PKTCNT_LSB 19
17931 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ1_PKTCNT register field. */
17932 #define ALT_USB_HOST_HCTSIZ1_PKTCNT_MSB 28
17933 /* The width in bits of the ALT_USB_HOST_HCTSIZ1_PKTCNT register field. */
17934 #define ALT_USB_HOST_HCTSIZ1_PKTCNT_WIDTH 10
17935 /* The mask used to set the ALT_USB_HOST_HCTSIZ1_PKTCNT register field value. */
17936 #define ALT_USB_HOST_HCTSIZ1_PKTCNT_SET_MSK 0x1ff80000
17937 /* The mask used to clear the ALT_USB_HOST_HCTSIZ1_PKTCNT register field value. */
17938 #define ALT_USB_HOST_HCTSIZ1_PKTCNT_CLR_MSK 0xe007ffff
17939 /* The reset value of the ALT_USB_HOST_HCTSIZ1_PKTCNT register field. */
17940 #define ALT_USB_HOST_HCTSIZ1_PKTCNT_RESET 0x0
17941 /* Extracts the ALT_USB_HOST_HCTSIZ1_PKTCNT field value from a register. */
17942 #define ALT_USB_HOST_HCTSIZ1_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
17943 /* Produces a ALT_USB_HOST_HCTSIZ1_PKTCNT register field value suitable for setting the register. */
17944 #define ALT_USB_HOST_HCTSIZ1_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
17945 
17946 /*
17947  * Field : PID - pid
17948  *
17949  * The application programs this field with the type of PID to use forthe initial
17950  * transaction. The host maintains this field for the rest of the transfer.
17951  *
17952  * Field Enumeration Values:
17953  *
17954  * Enum | Value | Description
17955  * :---------------------------------|:------|:------------------------------------
17956  * ALT_USB_HOST_HCTSIZ1_PID_E_DATA0 | 0x0 | DATA0
17957  * ALT_USB_HOST_HCTSIZ1_PID_E_DATA2 | 0x1 | DATA2
17958  * ALT_USB_HOST_HCTSIZ1_PID_E_DATA1 | 0x2 | DATA1
17959  * ALT_USB_HOST_HCTSIZ1_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
17960  *
17961  * Field Access Macros:
17962  *
17963  */
17964 /*
17965  * Enumerated value for register field ALT_USB_HOST_HCTSIZ1_PID
17966  *
17967  * DATA0
17968  */
17969 #define ALT_USB_HOST_HCTSIZ1_PID_E_DATA0 0x0
17970 /*
17971  * Enumerated value for register field ALT_USB_HOST_HCTSIZ1_PID
17972  *
17973  * DATA2
17974  */
17975 #define ALT_USB_HOST_HCTSIZ1_PID_E_DATA2 0x1
17976 /*
17977  * Enumerated value for register field ALT_USB_HOST_HCTSIZ1_PID
17978  *
17979  * DATA1
17980  */
17981 #define ALT_USB_HOST_HCTSIZ1_PID_E_DATA1 0x2
17982 /*
17983  * Enumerated value for register field ALT_USB_HOST_HCTSIZ1_PID
17984  *
17985  * MDATA (non-control)/SETUP (control)
17986  */
17987 #define ALT_USB_HOST_HCTSIZ1_PID_E_MDATA 0x3
17988 
17989 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ1_PID register field. */
17990 #define ALT_USB_HOST_HCTSIZ1_PID_LSB 29
17991 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ1_PID register field. */
17992 #define ALT_USB_HOST_HCTSIZ1_PID_MSB 30
17993 /* The width in bits of the ALT_USB_HOST_HCTSIZ1_PID register field. */
17994 #define ALT_USB_HOST_HCTSIZ1_PID_WIDTH 2
17995 /* The mask used to set the ALT_USB_HOST_HCTSIZ1_PID register field value. */
17996 #define ALT_USB_HOST_HCTSIZ1_PID_SET_MSK 0x60000000
17997 /* The mask used to clear the ALT_USB_HOST_HCTSIZ1_PID register field value. */
17998 #define ALT_USB_HOST_HCTSIZ1_PID_CLR_MSK 0x9fffffff
17999 /* The reset value of the ALT_USB_HOST_HCTSIZ1_PID register field. */
18000 #define ALT_USB_HOST_HCTSIZ1_PID_RESET 0x0
18001 /* Extracts the ALT_USB_HOST_HCTSIZ1_PID field value from a register. */
18002 #define ALT_USB_HOST_HCTSIZ1_PID_GET(value) (((value) & 0x60000000) >> 29)
18003 /* Produces a ALT_USB_HOST_HCTSIZ1_PID register field value suitable for setting the register. */
18004 #define ALT_USB_HOST_HCTSIZ1_PID_SET(value) (((value) << 29) & 0x60000000)
18005 
18006 /*
18007  * Field : Do Ping - dopng
18008  *
18009  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
18010  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
18011  * for IN transfers it disables the channel.
18012  *
18013  * Field Enumeration Values:
18014  *
18015  * Enum | Value | Description
18016  * :------------------------------------|:------|:-----------------
18017  * ALT_USB_HOST_HCTSIZ1_DOPNG_E_NOPING | 0x0 | No ping protocol
18018  * ALT_USB_HOST_HCTSIZ1_DOPNG_E_PING | 0x1 | Ping protocol
18019  *
18020  * Field Access Macros:
18021  *
18022  */
18023 /*
18024  * Enumerated value for register field ALT_USB_HOST_HCTSIZ1_DOPNG
18025  *
18026  * No ping protocol
18027  */
18028 #define ALT_USB_HOST_HCTSIZ1_DOPNG_E_NOPING 0x0
18029 /*
18030  * Enumerated value for register field ALT_USB_HOST_HCTSIZ1_DOPNG
18031  *
18032  * Ping protocol
18033  */
18034 #define ALT_USB_HOST_HCTSIZ1_DOPNG_E_PING 0x1
18035 
18036 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ1_DOPNG register field. */
18037 #define ALT_USB_HOST_HCTSIZ1_DOPNG_LSB 31
18038 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ1_DOPNG register field. */
18039 #define ALT_USB_HOST_HCTSIZ1_DOPNG_MSB 31
18040 /* The width in bits of the ALT_USB_HOST_HCTSIZ1_DOPNG register field. */
18041 #define ALT_USB_HOST_HCTSIZ1_DOPNG_WIDTH 1
18042 /* The mask used to set the ALT_USB_HOST_HCTSIZ1_DOPNG register field value. */
18043 #define ALT_USB_HOST_HCTSIZ1_DOPNG_SET_MSK 0x80000000
18044 /* The mask used to clear the ALT_USB_HOST_HCTSIZ1_DOPNG register field value. */
18045 #define ALT_USB_HOST_HCTSIZ1_DOPNG_CLR_MSK 0x7fffffff
18046 /* The reset value of the ALT_USB_HOST_HCTSIZ1_DOPNG register field. */
18047 #define ALT_USB_HOST_HCTSIZ1_DOPNG_RESET 0x0
18048 /* Extracts the ALT_USB_HOST_HCTSIZ1_DOPNG field value from a register. */
18049 #define ALT_USB_HOST_HCTSIZ1_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
18050 /* Produces a ALT_USB_HOST_HCTSIZ1_DOPNG register field value suitable for setting the register. */
18051 #define ALT_USB_HOST_HCTSIZ1_DOPNG_SET(value) (((value) << 31) & 0x80000000)
18052 
18053 #ifndef __ASSEMBLY__
18054 /*
18055  * WARNING: The C register and register group struct declarations are provided for
18056  * convenience and illustrative purposes. They should, however, be used with
18057  * caution as the C language standard provides no guarantees about the alignment or
18058  * atomicity of device memory accesses. The recommended practice for writing
18059  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
18060  * alt_write_word() functions.
18061  *
18062  * The struct declaration for register ALT_USB_HOST_HCTSIZ1.
18063  */
18064 struct ALT_USB_HOST_HCTSIZ1_s
18065 {
18066  uint32_t xfersize : 19; /* Transfer Size */
18067  uint32_t pktcnt : 10; /* Packet Count */
18068  uint32_t pid : 2; /* PID */
18069  uint32_t dopng : 1; /* Do Ping */
18070 };
18071 
18072 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ1. */
18073 typedef volatile struct ALT_USB_HOST_HCTSIZ1_s ALT_USB_HOST_HCTSIZ1_t;
18074 #endif /* __ASSEMBLY__ */
18075 
18076 /* The byte offset of the ALT_USB_HOST_HCTSIZ1 register from the beginning of the component. */
18077 #define ALT_USB_HOST_HCTSIZ1_OFST 0x130
18078 /* The address of the ALT_USB_HOST_HCTSIZ1 register. */
18079 #define ALT_USB_HOST_HCTSIZ1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ1_OFST))
18080 
18081 /*
18082  * Register : Host Channel 1 DMA Address Register - hcdma1
18083  *
18084  * This register is used by the OTG host in the internal DMA mode to maintain the
18085  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
18086  * DWORD-aligned.
18087  *
18088  * Register Layout
18089  *
18090  * Bits | Access | Reset | Description
18091  * :-------|:-------|:------|:------------
18092  * [31:0] | RW | 0x0 | DMA Address
18093  *
18094  */
18095 /*
18096  * Field : DMA Address - hcdma1
18097  *
18098  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
18099  * first descriptor in the list should be located in this address. The first
18100  * descriptor may be or may not be ready. The core starts processing the list from
18101  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
18102  * in which the isochronous descriptors are present where N is based on nTD as per
18103  * Table below
18104  *
18105  * [31:N] Base Address [N-1:3] Offset [2:0] 000
18106  *
18107  * HS ISOC FS ISOC
18108  *
18109  * nTD N nTD N
18110  *
18111  * 7 6 1 4
18112  *
18113  * 15 7 3 5
18114  *
18115  * 31 8 7 6
18116  *
18117  * 63 9 15 7
18118  *
18119  * 127 10 31 8
18120  *
18121  * 255 11 63 9
18122  *
18123  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
18124  * This value is in terms of number of descriptors. The values can be from 0 to 63.
18125  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
18126  * descriptor processed in the list. This field is updated both by application and
18127  * the core. for example, if the application enables the channel after programming
18128  * CTD=5, then the core will start processing the 6th descriptor. The address is
18129  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
18130  * CTD for isochronous is based on the current frame/microframe value. Need to be
18131  * set to zero by application.
18132  *
18133  * Field Access Macros:
18134  *
18135  */
18136 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA1_HCDMA1 register field. */
18137 #define ALT_USB_HOST_HCDMA1_HCDMA1_LSB 0
18138 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA1_HCDMA1 register field. */
18139 #define ALT_USB_HOST_HCDMA1_HCDMA1_MSB 31
18140 /* The width in bits of the ALT_USB_HOST_HCDMA1_HCDMA1 register field. */
18141 #define ALT_USB_HOST_HCDMA1_HCDMA1_WIDTH 32
18142 /* The mask used to set the ALT_USB_HOST_HCDMA1_HCDMA1 register field value. */
18143 #define ALT_USB_HOST_HCDMA1_HCDMA1_SET_MSK 0xffffffff
18144 /* The mask used to clear the ALT_USB_HOST_HCDMA1_HCDMA1 register field value. */
18145 #define ALT_USB_HOST_HCDMA1_HCDMA1_CLR_MSK 0x00000000
18146 /* The reset value of the ALT_USB_HOST_HCDMA1_HCDMA1 register field. */
18147 #define ALT_USB_HOST_HCDMA1_HCDMA1_RESET 0x0
18148 /* Extracts the ALT_USB_HOST_HCDMA1_HCDMA1 field value from a register. */
18149 #define ALT_USB_HOST_HCDMA1_HCDMA1_GET(value) (((value) & 0xffffffff) >> 0)
18150 /* Produces a ALT_USB_HOST_HCDMA1_HCDMA1 register field value suitable for setting the register. */
18151 #define ALT_USB_HOST_HCDMA1_HCDMA1_SET(value) (((value) << 0) & 0xffffffff)
18152 
18153 #ifndef __ASSEMBLY__
18154 /*
18155  * WARNING: The C register and register group struct declarations are provided for
18156  * convenience and illustrative purposes. They should, however, be used with
18157  * caution as the C language standard provides no guarantees about the alignment or
18158  * atomicity of device memory accesses. The recommended practice for writing
18159  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
18160  * alt_write_word() functions.
18161  *
18162  * The struct declaration for register ALT_USB_HOST_HCDMA1.
18163  */
18164 struct ALT_USB_HOST_HCDMA1_s
18165 {
18166  uint32_t hcdma1 : 32; /* DMA Address */
18167 };
18168 
18169 /* The typedef declaration for register ALT_USB_HOST_HCDMA1. */
18170 typedef volatile struct ALT_USB_HOST_HCDMA1_s ALT_USB_HOST_HCDMA1_t;
18171 #endif /* __ASSEMBLY__ */
18172 
18173 /* The byte offset of the ALT_USB_HOST_HCDMA1 register from the beginning of the component. */
18174 #define ALT_USB_HOST_HCDMA1_OFST 0x134
18175 /* The address of the ALT_USB_HOST_HCDMA1 register. */
18176 #define ALT_USB_HOST_HCDMA1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA1_OFST))
18177 
18178 /*
18179  * Register : Host Channel 1 DMA Buffer Address Register - hcdmab1
18180  *
18181  * These registers are present only in case of Scatter/Gather DMA. These
18182  * registers are implemented in RAM instead of flop-based implementation. Holds
18183  * the current buffer address. This register is updated as and when the
18184  * data transfer for the corresponding end point is in progress. This
18185  * register is present only in Scatter/Gather DMA mode. Otherwise this field
18186  * is reserved.
18187  *
18188  * Register Layout
18189  *
18190  * Bits | Access | Reset | Description
18191  * :-------|:-------|:------|:----------------------------------
18192  * [31:0] | RW | 0x0 | Host Channel 1 DMA Buffer Address
18193  *
18194  */
18195 /*
18196  * Field : Host Channel 1 DMA Buffer Address - hcdmab1
18197  *
18198  * These registers are present only in case of Scatter/Gather DMA. These
18199  * registers are implemented in RAM instead of flop-based implementation. Holds
18200  * the current buffer address. This register is updated as and when the data
18201  * transfer for the corresponding end point is in progress. This register is
18202  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
18203  *
18204  * Field Access Macros:
18205  *
18206  */
18207 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB1_HCDMAB1 register field. */
18208 #define ALT_USB_HOST_HCDMAB1_HCDMAB1_LSB 0
18209 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB1_HCDMAB1 register field. */
18210 #define ALT_USB_HOST_HCDMAB1_HCDMAB1_MSB 31
18211 /* The width in bits of the ALT_USB_HOST_HCDMAB1_HCDMAB1 register field. */
18212 #define ALT_USB_HOST_HCDMAB1_HCDMAB1_WIDTH 32
18213 /* The mask used to set the ALT_USB_HOST_HCDMAB1_HCDMAB1 register field value. */
18214 #define ALT_USB_HOST_HCDMAB1_HCDMAB1_SET_MSK 0xffffffff
18215 /* The mask used to clear the ALT_USB_HOST_HCDMAB1_HCDMAB1 register field value. */
18216 #define ALT_USB_HOST_HCDMAB1_HCDMAB1_CLR_MSK 0x00000000
18217 /* The reset value of the ALT_USB_HOST_HCDMAB1_HCDMAB1 register field. */
18218 #define ALT_USB_HOST_HCDMAB1_HCDMAB1_RESET 0x0
18219 /* Extracts the ALT_USB_HOST_HCDMAB1_HCDMAB1 field value from a register. */
18220 #define ALT_USB_HOST_HCDMAB1_HCDMAB1_GET(value) (((value) & 0xffffffff) >> 0)
18221 /* Produces a ALT_USB_HOST_HCDMAB1_HCDMAB1 register field value suitable for setting the register. */
18222 #define ALT_USB_HOST_HCDMAB1_HCDMAB1_SET(value) (((value) << 0) & 0xffffffff)
18223 
18224 #ifndef __ASSEMBLY__
18225 /*
18226  * WARNING: The C register and register group struct declarations are provided for
18227  * convenience and illustrative purposes. They should, however, be used with
18228  * caution as the C language standard provides no guarantees about the alignment or
18229  * atomicity of device memory accesses. The recommended practice for writing
18230  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
18231  * alt_write_word() functions.
18232  *
18233  * The struct declaration for register ALT_USB_HOST_HCDMAB1.
18234  */
18235 struct ALT_USB_HOST_HCDMAB1_s
18236 {
18237  uint32_t hcdmab1 : 32; /* Host Channel 1 DMA Buffer Address */
18238 };
18239 
18240 /* The typedef declaration for register ALT_USB_HOST_HCDMAB1. */
18241 typedef volatile struct ALT_USB_HOST_HCDMAB1_s ALT_USB_HOST_HCDMAB1_t;
18242 #endif /* __ASSEMBLY__ */
18243 
18244 /* The byte offset of the ALT_USB_HOST_HCDMAB1 register from the beginning of the component. */
18245 #define ALT_USB_HOST_HCDMAB1_OFST 0x138
18246 /* The address of the ALT_USB_HOST_HCDMAB1 register. */
18247 #define ALT_USB_HOST_HCDMAB1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB1_OFST))
18248 
18249 /*
18250  * Register : Host Channel 2 Characteristics Register - hcchar2
18251  *
18252  * Host Channel 2 Characteristics Register
18253  *
18254  * Register Layout
18255  *
18256  * Bits | Access | Reset | Description
18257  * :--------|:-------|:------|:--------------------
18258  * [10:0] | RW | 0x0 | Maximum Packet Size
18259  * [14:11] | RW | 0x0 | Endpoint Number
18260  * [15] | RW | 0x0 | Endpoint Direction
18261  * [16] | ??? | 0x0 | *UNDEFINED*
18262  * [17] | RW | 0x0 | Low-Speed Device
18263  * [19:18] | RW | 0x0 | Endpoint Type
18264  * [21:20] | RW | 0x0 | Multi Count
18265  * [28:22] | RW | 0x0 | Device Address
18266  * [29] | ??? | 0x0 | *UNDEFINED*
18267  * [30] | R | 0x0 | Channel Disable
18268  * [31] | R | 0x0 | Channel Enable
18269  *
18270  */
18271 /*
18272  * Field : Maximum Packet Size - mps
18273  *
18274  * Indicates the maximum packet size of the associated endpoint.
18275  *
18276  * Field Access Macros:
18277  *
18278  */
18279 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR2_MPS register field. */
18280 #define ALT_USB_HOST_HCCHAR2_MPS_LSB 0
18281 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR2_MPS register field. */
18282 #define ALT_USB_HOST_HCCHAR2_MPS_MSB 10
18283 /* The width in bits of the ALT_USB_HOST_HCCHAR2_MPS register field. */
18284 #define ALT_USB_HOST_HCCHAR2_MPS_WIDTH 11
18285 /* The mask used to set the ALT_USB_HOST_HCCHAR2_MPS register field value. */
18286 #define ALT_USB_HOST_HCCHAR2_MPS_SET_MSK 0x000007ff
18287 /* The mask used to clear the ALT_USB_HOST_HCCHAR2_MPS register field value. */
18288 #define ALT_USB_HOST_HCCHAR2_MPS_CLR_MSK 0xfffff800
18289 /* The reset value of the ALT_USB_HOST_HCCHAR2_MPS register field. */
18290 #define ALT_USB_HOST_HCCHAR2_MPS_RESET 0x0
18291 /* Extracts the ALT_USB_HOST_HCCHAR2_MPS field value from a register. */
18292 #define ALT_USB_HOST_HCCHAR2_MPS_GET(value) (((value) & 0x000007ff) >> 0)
18293 /* Produces a ALT_USB_HOST_HCCHAR2_MPS register field value suitable for setting the register. */
18294 #define ALT_USB_HOST_HCCHAR2_MPS_SET(value) (((value) << 0) & 0x000007ff)
18295 
18296 /*
18297  * Field : Endpoint Number - epnum
18298  *
18299  * Indicates the endpoint number on the device serving as the data source or sink.
18300  *
18301  * Field Enumeration Values:
18302  *
18303  * Enum | Value | Description
18304  * :-------------------------------------|:------|:--------------
18305  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT0 | 0x0 | End point 0
18306  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT1 | 0x1 | End point 1
18307  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT2 | 0x2 | End point 2
18308  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT3 | 0x3 | End point 3
18309  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT4 | 0x4 | End point 4
18310  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT5 | 0x5 | End point 5
18311  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT6 | 0x6 | End point 6
18312  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT7 | 0x7 | End point 7
18313  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT8 | 0x8 | End point 8
18314  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT9 | 0x9 | End point 9
18315  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT10 | 0xa | End point 10
18316  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT11 | 0xb | End point 11
18317  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT12 | 0xc | End point 12
18318  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT13 | 0xd | End point 13
18319  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT14 | 0xe | End point 14
18320  * ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT15 | 0xf | End point 15
18321  *
18322  * Field Access Macros:
18323  *
18324  */
18325 /*
18326  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18327  *
18328  * End point 0
18329  */
18330 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT0 0x0
18331 /*
18332  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18333  *
18334  * End point 1
18335  */
18336 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT1 0x1
18337 /*
18338  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18339  *
18340  * End point 2
18341  */
18342 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT2 0x2
18343 /*
18344  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18345  *
18346  * End point 3
18347  */
18348 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT3 0x3
18349 /*
18350  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18351  *
18352  * End point 4
18353  */
18354 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT4 0x4
18355 /*
18356  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18357  *
18358  * End point 5
18359  */
18360 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT5 0x5
18361 /*
18362  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18363  *
18364  * End point 6
18365  */
18366 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT6 0x6
18367 /*
18368  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18369  *
18370  * End point 7
18371  */
18372 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT7 0x7
18373 /*
18374  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18375  *
18376  * End point 8
18377  */
18378 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT8 0x8
18379 /*
18380  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18381  *
18382  * End point 9
18383  */
18384 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT9 0x9
18385 /*
18386  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18387  *
18388  * End point 10
18389  */
18390 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT10 0xa
18391 /*
18392  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18393  *
18394  * End point 11
18395  */
18396 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT11 0xb
18397 /*
18398  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18399  *
18400  * End point 12
18401  */
18402 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT12 0xc
18403 /*
18404  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18405  *
18406  * End point 13
18407  */
18408 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT13 0xd
18409 /*
18410  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18411  *
18412  * End point 14
18413  */
18414 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT14 0xe
18415 /*
18416  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPNUM
18417  *
18418  * End point 15
18419  */
18420 #define ALT_USB_HOST_HCCHAR2_EPNUM_E_ENDPT15 0xf
18421 
18422 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR2_EPNUM register field. */
18423 #define ALT_USB_HOST_HCCHAR2_EPNUM_LSB 11
18424 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR2_EPNUM register field. */
18425 #define ALT_USB_HOST_HCCHAR2_EPNUM_MSB 14
18426 /* The width in bits of the ALT_USB_HOST_HCCHAR2_EPNUM register field. */
18427 #define ALT_USB_HOST_HCCHAR2_EPNUM_WIDTH 4
18428 /* The mask used to set the ALT_USB_HOST_HCCHAR2_EPNUM register field value. */
18429 #define ALT_USB_HOST_HCCHAR2_EPNUM_SET_MSK 0x00007800
18430 /* The mask used to clear the ALT_USB_HOST_HCCHAR2_EPNUM register field value. */
18431 #define ALT_USB_HOST_HCCHAR2_EPNUM_CLR_MSK 0xffff87ff
18432 /* The reset value of the ALT_USB_HOST_HCCHAR2_EPNUM register field. */
18433 #define ALT_USB_HOST_HCCHAR2_EPNUM_RESET 0x0
18434 /* Extracts the ALT_USB_HOST_HCCHAR2_EPNUM field value from a register. */
18435 #define ALT_USB_HOST_HCCHAR2_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
18436 /* Produces a ALT_USB_HOST_HCCHAR2_EPNUM register field value suitable for setting the register. */
18437 #define ALT_USB_HOST_HCCHAR2_EPNUM_SET(value) (((value) << 11) & 0x00007800)
18438 
18439 /*
18440  * Field : Endpoint Direction - epdir
18441  *
18442  * Indicates whether the transaction is IN or OUT.
18443  *
18444  * Field Enumeration Values:
18445  *
18446  * Enum | Value | Description
18447  * :---------------------------------|:------|:--------------
18448  * ALT_USB_HOST_HCCHAR2_EPDIR_E_OUT | 0x0 | OUT Direction
18449  * ALT_USB_HOST_HCCHAR2_EPDIR_E_IN | 0x1 | IN Direction
18450  *
18451  * Field Access Macros:
18452  *
18453  */
18454 /*
18455  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPDIR
18456  *
18457  * OUT Direction
18458  */
18459 #define ALT_USB_HOST_HCCHAR2_EPDIR_E_OUT 0x0
18460 /*
18461  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPDIR
18462  *
18463  * IN Direction
18464  */
18465 #define ALT_USB_HOST_HCCHAR2_EPDIR_E_IN 0x1
18466 
18467 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR2_EPDIR register field. */
18468 #define ALT_USB_HOST_HCCHAR2_EPDIR_LSB 15
18469 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR2_EPDIR register field. */
18470 #define ALT_USB_HOST_HCCHAR2_EPDIR_MSB 15
18471 /* The width in bits of the ALT_USB_HOST_HCCHAR2_EPDIR register field. */
18472 #define ALT_USB_HOST_HCCHAR2_EPDIR_WIDTH 1
18473 /* The mask used to set the ALT_USB_HOST_HCCHAR2_EPDIR register field value. */
18474 #define ALT_USB_HOST_HCCHAR2_EPDIR_SET_MSK 0x00008000
18475 /* The mask used to clear the ALT_USB_HOST_HCCHAR2_EPDIR register field value. */
18476 #define ALT_USB_HOST_HCCHAR2_EPDIR_CLR_MSK 0xffff7fff
18477 /* The reset value of the ALT_USB_HOST_HCCHAR2_EPDIR register field. */
18478 #define ALT_USB_HOST_HCCHAR2_EPDIR_RESET 0x0
18479 /* Extracts the ALT_USB_HOST_HCCHAR2_EPDIR field value from a register. */
18480 #define ALT_USB_HOST_HCCHAR2_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
18481 /* Produces a ALT_USB_HOST_HCCHAR2_EPDIR register field value suitable for setting the register. */
18482 #define ALT_USB_HOST_HCCHAR2_EPDIR_SET(value) (((value) << 15) & 0x00008000)
18483 
18484 /*
18485  * Field : Low-Speed Device - lspddev
18486  *
18487  * This field is set by the application to indicate that this channel is
18488  * communicating to a low-speed device. The application must program this bit when
18489  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
18490  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
18491  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
18492  * core ignores this bit even if it is set by the application software
18493  *
18494  * Field Enumeration Values:
18495  *
18496  * Enum | Value | Description
18497  * :------------------------------------|:------|:----------------------------------------
18498  * ALT_USB_HOST_HCCHAR2_LSPDDEV_E_DISD | 0x0 | Not Communicating with low speed device
18499  * ALT_USB_HOST_HCCHAR2_LSPDDEV_E_END | 0x1 | Communicating with low speed device
18500  *
18501  * Field Access Macros:
18502  *
18503  */
18504 /*
18505  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_LSPDDEV
18506  *
18507  * Not Communicating with low speed device
18508  */
18509 #define ALT_USB_HOST_HCCHAR2_LSPDDEV_E_DISD 0x0
18510 /*
18511  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_LSPDDEV
18512  *
18513  * Communicating with low speed device
18514  */
18515 #define ALT_USB_HOST_HCCHAR2_LSPDDEV_E_END 0x1
18516 
18517 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR2_LSPDDEV register field. */
18518 #define ALT_USB_HOST_HCCHAR2_LSPDDEV_LSB 17
18519 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR2_LSPDDEV register field. */
18520 #define ALT_USB_HOST_HCCHAR2_LSPDDEV_MSB 17
18521 /* The width in bits of the ALT_USB_HOST_HCCHAR2_LSPDDEV register field. */
18522 #define ALT_USB_HOST_HCCHAR2_LSPDDEV_WIDTH 1
18523 /* The mask used to set the ALT_USB_HOST_HCCHAR2_LSPDDEV register field value. */
18524 #define ALT_USB_HOST_HCCHAR2_LSPDDEV_SET_MSK 0x00020000
18525 /* The mask used to clear the ALT_USB_HOST_HCCHAR2_LSPDDEV register field value. */
18526 #define ALT_USB_HOST_HCCHAR2_LSPDDEV_CLR_MSK 0xfffdffff
18527 /* The reset value of the ALT_USB_HOST_HCCHAR2_LSPDDEV register field. */
18528 #define ALT_USB_HOST_HCCHAR2_LSPDDEV_RESET 0x0
18529 /* Extracts the ALT_USB_HOST_HCCHAR2_LSPDDEV field value from a register. */
18530 #define ALT_USB_HOST_HCCHAR2_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
18531 /* Produces a ALT_USB_HOST_HCCHAR2_LSPDDEV register field value suitable for setting the register. */
18532 #define ALT_USB_HOST_HCCHAR2_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
18533 
18534 /*
18535  * Field : Endpoint Type - eptype
18536  *
18537  * Indicates the transfer type selected.
18538  *
18539  * Field Enumeration Values:
18540  *
18541  * Enum | Value | Description
18542  * :-------------------------------------|:------|:------------
18543  * ALT_USB_HOST_HCCHAR2_EPTYPE_E_CTL | 0x0 | Control
18544  * ALT_USB_HOST_HCCHAR2_EPTYPE_E_ISOC | 0x1 | Isochronous
18545  * ALT_USB_HOST_HCCHAR2_EPTYPE_E_BULK | 0x2 | Bulk
18546  * ALT_USB_HOST_HCCHAR2_EPTYPE_E_INTERR | 0x3 | Interrupt
18547  *
18548  * Field Access Macros:
18549  *
18550  */
18551 /*
18552  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPTYPE
18553  *
18554  * Control
18555  */
18556 #define ALT_USB_HOST_HCCHAR2_EPTYPE_E_CTL 0x0
18557 /*
18558  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPTYPE
18559  *
18560  * Isochronous
18561  */
18562 #define ALT_USB_HOST_HCCHAR2_EPTYPE_E_ISOC 0x1
18563 /*
18564  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPTYPE
18565  *
18566  * Bulk
18567  */
18568 #define ALT_USB_HOST_HCCHAR2_EPTYPE_E_BULK 0x2
18569 /*
18570  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EPTYPE
18571  *
18572  * Interrupt
18573  */
18574 #define ALT_USB_HOST_HCCHAR2_EPTYPE_E_INTERR 0x3
18575 
18576 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR2_EPTYPE register field. */
18577 #define ALT_USB_HOST_HCCHAR2_EPTYPE_LSB 18
18578 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR2_EPTYPE register field. */
18579 #define ALT_USB_HOST_HCCHAR2_EPTYPE_MSB 19
18580 /* The width in bits of the ALT_USB_HOST_HCCHAR2_EPTYPE register field. */
18581 #define ALT_USB_HOST_HCCHAR2_EPTYPE_WIDTH 2
18582 /* The mask used to set the ALT_USB_HOST_HCCHAR2_EPTYPE register field value. */
18583 #define ALT_USB_HOST_HCCHAR2_EPTYPE_SET_MSK 0x000c0000
18584 /* The mask used to clear the ALT_USB_HOST_HCCHAR2_EPTYPE register field value. */
18585 #define ALT_USB_HOST_HCCHAR2_EPTYPE_CLR_MSK 0xfff3ffff
18586 /* The reset value of the ALT_USB_HOST_HCCHAR2_EPTYPE register field. */
18587 #define ALT_USB_HOST_HCCHAR2_EPTYPE_RESET 0x0
18588 /* Extracts the ALT_USB_HOST_HCCHAR2_EPTYPE field value from a register. */
18589 #define ALT_USB_HOST_HCCHAR2_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
18590 /* Produces a ALT_USB_HOST_HCCHAR2_EPTYPE register field value suitable for setting the register. */
18591 #define ALT_USB_HOST_HCCHAR2_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
18592 
18593 /*
18594  * Field : Multi Count - ec
18595  *
18596  * When the Split Enable bit of the Host Channel-n Split Control register
18597  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
18598  * transactions that must be executed per microframe for this periodic endpoint.
18599  * for non periodic transfers, this field is used only in DMA mode, and specifies
18600  * the number packets to be fetched for this channel before the internal DMA engine
18601  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
18602  * number of immediate retries to be performed for a periodic split transactions on
18603  * transaction errors. This field must be set to at least 1.
18604  *
18605  * Field Enumeration Values:
18606  *
18607  * Enum | Value | Description
18608  * :-------------------------------------|:------|:----------------------------------------------
18609  * ALT_USB_HOST_HCCHAR2_EC_E_RSVD | 0x0 | Reserved This field yields undefined result
18610  * ALT_USB_HOST_HCCHAR2_EC_E_TRANSONE | 0x1 | 1 transaction
18611  * ALT_USB_HOST_HCCHAR2_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
18612  * : | | per microframe
18613  * ALT_USB_HOST_HCCHAR2_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
18614  * : | | per microframe
18615  *
18616  * Field Access Macros:
18617  *
18618  */
18619 /*
18620  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EC
18621  *
18622  * Reserved This field yields undefined result
18623  */
18624 #define ALT_USB_HOST_HCCHAR2_EC_E_RSVD 0x0
18625 /*
18626  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EC
18627  *
18628  * 1 transaction
18629  */
18630 #define ALT_USB_HOST_HCCHAR2_EC_E_TRANSONE 0x1
18631 /*
18632  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EC
18633  *
18634  * 2 transactions to be issued for this endpoint per microframe
18635  */
18636 #define ALT_USB_HOST_HCCHAR2_EC_E_TRANSTWO 0x2
18637 /*
18638  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_EC
18639  *
18640  * 3 transactions to be issued for this endpoint per microframe
18641  */
18642 #define ALT_USB_HOST_HCCHAR2_EC_E_TRANSTHREE 0x3
18643 
18644 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR2_EC register field. */
18645 #define ALT_USB_HOST_HCCHAR2_EC_LSB 20
18646 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR2_EC register field. */
18647 #define ALT_USB_HOST_HCCHAR2_EC_MSB 21
18648 /* The width in bits of the ALT_USB_HOST_HCCHAR2_EC register field. */
18649 #define ALT_USB_HOST_HCCHAR2_EC_WIDTH 2
18650 /* The mask used to set the ALT_USB_HOST_HCCHAR2_EC register field value. */
18651 #define ALT_USB_HOST_HCCHAR2_EC_SET_MSK 0x00300000
18652 /* The mask used to clear the ALT_USB_HOST_HCCHAR2_EC register field value. */
18653 #define ALT_USB_HOST_HCCHAR2_EC_CLR_MSK 0xffcfffff
18654 /* The reset value of the ALT_USB_HOST_HCCHAR2_EC register field. */
18655 #define ALT_USB_HOST_HCCHAR2_EC_RESET 0x0
18656 /* Extracts the ALT_USB_HOST_HCCHAR2_EC field value from a register. */
18657 #define ALT_USB_HOST_HCCHAR2_EC_GET(value) (((value) & 0x00300000) >> 20)
18658 /* Produces a ALT_USB_HOST_HCCHAR2_EC register field value suitable for setting the register. */
18659 #define ALT_USB_HOST_HCCHAR2_EC_SET(value) (((value) << 20) & 0x00300000)
18660 
18661 /*
18662  * Field : Device Address - devaddr
18663  *
18664  * This field selects the specific device serving as the data source or sink.
18665  *
18666  * Field Access Macros:
18667  *
18668  */
18669 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR2_DEVADDR register field. */
18670 #define ALT_USB_HOST_HCCHAR2_DEVADDR_LSB 22
18671 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR2_DEVADDR register field. */
18672 #define ALT_USB_HOST_HCCHAR2_DEVADDR_MSB 28
18673 /* The width in bits of the ALT_USB_HOST_HCCHAR2_DEVADDR register field. */
18674 #define ALT_USB_HOST_HCCHAR2_DEVADDR_WIDTH 7
18675 /* The mask used to set the ALT_USB_HOST_HCCHAR2_DEVADDR register field value. */
18676 #define ALT_USB_HOST_HCCHAR2_DEVADDR_SET_MSK 0x1fc00000
18677 /* The mask used to clear the ALT_USB_HOST_HCCHAR2_DEVADDR register field value. */
18678 #define ALT_USB_HOST_HCCHAR2_DEVADDR_CLR_MSK 0xe03fffff
18679 /* The reset value of the ALT_USB_HOST_HCCHAR2_DEVADDR register field. */
18680 #define ALT_USB_HOST_HCCHAR2_DEVADDR_RESET 0x0
18681 /* Extracts the ALT_USB_HOST_HCCHAR2_DEVADDR field value from a register. */
18682 #define ALT_USB_HOST_HCCHAR2_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
18683 /* Produces a ALT_USB_HOST_HCCHAR2_DEVADDR register field value suitable for setting the register. */
18684 #define ALT_USB_HOST_HCCHAR2_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
18685 
18686 /*
18687  * Field : Channel Disable - chdis
18688  *
18689  * The application sets this bit to stop transmitting/receiving data on a channel,
18690  * even before the transfer for that channel is complete. The application must wait
18691  * for the Channel Disabled interrupt before treating the channel as disabled.
18692  *
18693  * Field Enumeration Values:
18694  *
18695  * Enum | Value | Description
18696  * :-----------------------------------|:------|:----------------------------
18697  * ALT_USB_HOST_HCCHAR2_CHDIS_E_INACT | 0x0 | Transmit/Recieve normal
18698  * ALT_USB_HOST_HCCHAR2_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving
18699  *
18700  * Field Access Macros:
18701  *
18702  */
18703 /*
18704  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_CHDIS
18705  *
18706  * Transmit/Recieve normal
18707  */
18708 #define ALT_USB_HOST_HCCHAR2_CHDIS_E_INACT 0x0
18709 /*
18710  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_CHDIS
18711  *
18712  * Stop transmitting/receiving
18713  */
18714 #define ALT_USB_HOST_HCCHAR2_CHDIS_E_ACT 0x1
18715 
18716 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR2_CHDIS register field. */
18717 #define ALT_USB_HOST_HCCHAR2_CHDIS_LSB 30
18718 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR2_CHDIS register field. */
18719 #define ALT_USB_HOST_HCCHAR2_CHDIS_MSB 30
18720 /* The width in bits of the ALT_USB_HOST_HCCHAR2_CHDIS register field. */
18721 #define ALT_USB_HOST_HCCHAR2_CHDIS_WIDTH 1
18722 /* The mask used to set the ALT_USB_HOST_HCCHAR2_CHDIS register field value. */
18723 #define ALT_USB_HOST_HCCHAR2_CHDIS_SET_MSK 0x40000000
18724 /* The mask used to clear the ALT_USB_HOST_HCCHAR2_CHDIS register field value. */
18725 #define ALT_USB_HOST_HCCHAR2_CHDIS_CLR_MSK 0xbfffffff
18726 /* The reset value of the ALT_USB_HOST_HCCHAR2_CHDIS register field. */
18727 #define ALT_USB_HOST_HCCHAR2_CHDIS_RESET 0x0
18728 /* Extracts the ALT_USB_HOST_HCCHAR2_CHDIS field value from a register. */
18729 #define ALT_USB_HOST_HCCHAR2_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
18730 /* Produces a ALT_USB_HOST_HCCHAR2_CHDIS register field value suitable for setting the register. */
18731 #define ALT_USB_HOST_HCCHAR2_CHDIS_SET(value) (((value) << 30) & 0x40000000)
18732 
18733 /*
18734  * Field : Channel Enable - chena
18735  *
18736  * When Scatter/Gather mode is disabled This field is set by the application and
18737  * cleared by the OTG host.
18738  *
18739  * 0: Channel disabled
18740  *
18741  * 1: Channel enabled
18742  *
18743  * When Scatter/Gather mode is enabled.
18744  *
18745  * Field Enumeration Values:
18746  *
18747  * Enum | Value | Description
18748  * :-----------------------------------|:------|:-------------------------------------------------
18749  * ALT_USB_HOST_HCCHAR2_CHENA_E_INACT | 0x0 | Indicates that the descriptor structure is not
18750  * : | | yet ready
18751  * ALT_USB_HOST_HCCHAR2_CHENA_E_ACT | 0x1 | Indicates that the descriptor structure and
18752  * : | | data buffer with data is setup and this
18753  * : | | channel can access the descriptor
18754  *
18755  * Field Access Macros:
18756  *
18757  */
18758 /*
18759  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_CHENA
18760  *
18761  * Indicates that the descriptor structure is not yet ready
18762  */
18763 #define ALT_USB_HOST_HCCHAR2_CHENA_E_INACT 0x0
18764 /*
18765  * Enumerated value for register field ALT_USB_HOST_HCCHAR2_CHENA
18766  *
18767  * Indicates that the descriptor structure and data buffer with data is
18768  * setup and this channel can access the descriptor
18769  */
18770 #define ALT_USB_HOST_HCCHAR2_CHENA_E_ACT 0x1
18771 
18772 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR2_CHENA register field. */
18773 #define ALT_USB_HOST_HCCHAR2_CHENA_LSB 31
18774 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR2_CHENA register field. */
18775 #define ALT_USB_HOST_HCCHAR2_CHENA_MSB 31
18776 /* The width in bits of the ALT_USB_HOST_HCCHAR2_CHENA register field. */
18777 #define ALT_USB_HOST_HCCHAR2_CHENA_WIDTH 1
18778 /* The mask used to set the ALT_USB_HOST_HCCHAR2_CHENA register field value. */
18779 #define ALT_USB_HOST_HCCHAR2_CHENA_SET_MSK 0x80000000
18780 /* The mask used to clear the ALT_USB_HOST_HCCHAR2_CHENA register field value. */
18781 #define ALT_USB_HOST_HCCHAR2_CHENA_CLR_MSK 0x7fffffff
18782 /* The reset value of the ALT_USB_HOST_HCCHAR2_CHENA register field. */
18783 #define ALT_USB_HOST_HCCHAR2_CHENA_RESET 0x0
18784 /* Extracts the ALT_USB_HOST_HCCHAR2_CHENA field value from a register. */
18785 #define ALT_USB_HOST_HCCHAR2_CHENA_GET(value) (((value) & 0x80000000) >> 31)
18786 /* Produces a ALT_USB_HOST_HCCHAR2_CHENA register field value suitable for setting the register. */
18787 #define ALT_USB_HOST_HCCHAR2_CHENA_SET(value) (((value) << 31) & 0x80000000)
18788 
18789 #ifndef __ASSEMBLY__
18790 /*
18791  * WARNING: The C register and register group struct declarations are provided for
18792  * convenience and illustrative purposes. They should, however, be used with
18793  * caution as the C language standard provides no guarantees about the alignment or
18794  * atomicity of device memory accesses. The recommended practice for writing
18795  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
18796  * alt_write_word() functions.
18797  *
18798  * The struct declaration for register ALT_USB_HOST_HCCHAR2.
18799  */
18800 struct ALT_USB_HOST_HCCHAR2_s
18801 {
18802  uint32_t mps : 11; /* Maximum Packet Size */
18803  uint32_t epnum : 4; /* Endpoint Number */
18804  uint32_t epdir : 1; /* Endpoint Direction */
18805  uint32_t : 1; /* *UNDEFINED* */
18806  uint32_t lspddev : 1; /* Low-Speed Device */
18807  uint32_t eptype : 2; /* Endpoint Type */
18808  uint32_t ec : 2; /* Multi Count */
18809  uint32_t devaddr : 7; /* Device Address */
18810  uint32_t : 1; /* *UNDEFINED* */
18811  const uint32_t chdis : 1; /* Channel Disable */
18812  const uint32_t chena : 1; /* Channel Enable */
18813 };
18814 
18815 /* The typedef declaration for register ALT_USB_HOST_HCCHAR2. */
18816 typedef volatile struct ALT_USB_HOST_HCCHAR2_s ALT_USB_HOST_HCCHAR2_t;
18817 #endif /* __ASSEMBLY__ */
18818 
18819 /* The byte offset of the ALT_USB_HOST_HCCHAR2 register from the beginning of the component. */
18820 #define ALT_USB_HOST_HCCHAR2_OFST 0x140
18821 /* The address of the ALT_USB_HOST_HCCHAR2 register. */
18822 #define ALT_USB_HOST_HCCHAR2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR2_OFST))
18823 
18824 /*
18825  * Register : Host Channel 2 Split Control Register - hcsplt2
18826  *
18827  * Channel_number 2
18828  *
18829  * Register Layout
18830  *
18831  * Bits | Access | Reset | Description
18832  * :--------|:-------|:------|:---------------------
18833  * [6:0] | RW | 0x0 | Port Address
18834  * [13:7] | RW | 0x0 | Hub Address
18835  * [15:14] | RW | 0x0 | Transaction Position
18836  * [16] | RW | 0x0 | Do Complete Split
18837  * [30:17] | ??? | 0x0 | *UNDEFINED*
18838  * [31] | RW | 0x0 | Split Enable
18839  *
18840  */
18841 /*
18842  * Field : Port Address - prtaddr
18843  *
18844  * This field is the port number of the recipient transactiontranslator.
18845  *
18846  * Field Access Macros:
18847  *
18848  */
18849 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT2_PRTADDR register field. */
18850 #define ALT_USB_HOST_HCSPLT2_PRTADDR_LSB 0
18851 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT2_PRTADDR register field. */
18852 #define ALT_USB_HOST_HCSPLT2_PRTADDR_MSB 6
18853 /* The width in bits of the ALT_USB_HOST_HCSPLT2_PRTADDR register field. */
18854 #define ALT_USB_HOST_HCSPLT2_PRTADDR_WIDTH 7
18855 /* The mask used to set the ALT_USB_HOST_HCSPLT2_PRTADDR register field value. */
18856 #define ALT_USB_HOST_HCSPLT2_PRTADDR_SET_MSK 0x0000007f
18857 /* The mask used to clear the ALT_USB_HOST_HCSPLT2_PRTADDR register field value. */
18858 #define ALT_USB_HOST_HCSPLT2_PRTADDR_CLR_MSK 0xffffff80
18859 /* The reset value of the ALT_USB_HOST_HCSPLT2_PRTADDR register field. */
18860 #define ALT_USB_HOST_HCSPLT2_PRTADDR_RESET 0x0
18861 /* Extracts the ALT_USB_HOST_HCSPLT2_PRTADDR field value from a register. */
18862 #define ALT_USB_HOST_HCSPLT2_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
18863 /* Produces a ALT_USB_HOST_HCSPLT2_PRTADDR register field value suitable for setting the register. */
18864 #define ALT_USB_HOST_HCSPLT2_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
18865 
18866 /*
18867  * Field : Hub Address - hubaddr
18868  *
18869  * This field holds the device address of the transaction translator's hub.
18870  *
18871  * Field Access Macros:
18872  *
18873  */
18874 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT2_HUBADDR register field. */
18875 #define ALT_USB_HOST_HCSPLT2_HUBADDR_LSB 7
18876 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT2_HUBADDR register field. */
18877 #define ALT_USB_HOST_HCSPLT2_HUBADDR_MSB 13
18878 /* The width in bits of the ALT_USB_HOST_HCSPLT2_HUBADDR register field. */
18879 #define ALT_USB_HOST_HCSPLT2_HUBADDR_WIDTH 7
18880 /* The mask used to set the ALT_USB_HOST_HCSPLT2_HUBADDR register field value. */
18881 #define ALT_USB_HOST_HCSPLT2_HUBADDR_SET_MSK 0x00003f80
18882 /* The mask used to clear the ALT_USB_HOST_HCSPLT2_HUBADDR register field value. */
18883 #define ALT_USB_HOST_HCSPLT2_HUBADDR_CLR_MSK 0xffffc07f
18884 /* The reset value of the ALT_USB_HOST_HCSPLT2_HUBADDR register field. */
18885 #define ALT_USB_HOST_HCSPLT2_HUBADDR_RESET 0x0
18886 /* Extracts the ALT_USB_HOST_HCSPLT2_HUBADDR field value from a register. */
18887 #define ALT_USB_HOST_HCSPLT2_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
18888 /* Produces a ALT_USB_HOST_HCSPLT2_HUBADDR register field value suitable for setting the register. */
18889 #define ALT_USB_HOST_HCSPLT2_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
18890 
18891 /*
18892  * Field : Transaction Position - xactpos
18893  *
18894  * This field is used to determine whether to send all, first, middle, or last
18895  * payloads with each OUT transaction.
18896  *
18897  * Field Enumeration Values:
18898  *
18899  * Enum | Value | Description
18900  * :--------------------------------------|:------|:------------------------------------------------
18901  * ALT_USB_HOST_HCSPLT2_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
18902  * : | | transaction (which is larger than 188 bytes)
18903  * ALT_USB_HOST_HCSPLT2_XACTPOS_E_END | 0x1 | End. This is the last payload of this
18904  * : | | transaction (which is larger than 188 bytes)
18905  * ALT_USB_HOST_HCSPLT2_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
18906  * : | | transaction (which is larger than 188 bytes)
18907  * ALT_USB_HOST_HCSPLT2_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
18908  * : | | transaction (which is less than or equal to 188
18909  * : | | bytes)
18910  *
18911  * Field Access Macros:
18912  *
18913  */
18914 /*
18915  * Enumerated value for register field ALT_USB_HOST_HCSPLT2_XACTPOS
18916  *
18917  * Mid. This is the middle payload of this transaction (which is larger than 188
18918  * bytes)
18919  */
18920 #define ALT_USB_HOST_HCSPLT2_XACTPOS_E_MIDDLE 0x0
18921 /*
18922  * Enumerated value for register field ALT_USB_HOST_HCSPLT2_XACTPOS
18923  *
18924  * End. This is the last payload of this transaction (which is larger than 188
18925  * bytes)
18926  */
18927 #define ALT_USB_HOST_HCSPLT2_XACTPOS_E_END 0x1
18928 /*
18929  * Enumerated value for register field ALT_USB_HOST_HCSPLT2_XACTPOS
18930  *
18931  * Begin. This is the first data payload of this transaction (which is larger than
18932  * 188 bytes)
18933  */
18934 #define ALT_USB_HOST_HCSPLT2_XACTPOS_E_BEGIN 0x2
18935 /*
18936  * Enumerated value for register field ALT_USB_HOST_HCSPLT2_XACTPOS
18937  *
18938  * All. This is the entire data payload is of this transaction (which is less than
18939  * or equal to 188 bytes)
18940  */
18941 #define ALT_USB_HOST_HCSPLT2_XACTPOS_E_ALL 0x3
18942 
18943 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT2_XACTPOS register field. */
18944 #define ALT_USB_HOST_HCSPLT2_XACTPOS_LSB 14
18945 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT2_XACTPOS register field. */
18946 #define ALT_USB_HOST_HCSPLT2_XACTPOS_MSB 15
18947 /* The width in bits of the ALT_USB_HOST_HCSPLT2_XACTPOS register field. */
18948 #define ALT_USB_HOST_HCSPLT2_XACTPOS_WIDTH 2
18949 /* The mask used to set the ALT_USB_HOST_HCSPLT2_XACTPOS register field value. */
18950 #define ALT_USB_HOST_HCSPLT2_XACTPOS_SET_MSK 0x0000c000
18951 /* The mask used to clear the ALT_USB_HOST_HCSPLT2_XACTPOS register field value. */
18952 #define ALT_USB_HOST_HCSPLT2_XACTPOS_CLR_MSK 0xffff3fff
18953 /* The reset value of the ALT_USB_HOST_HCSPLT2_XACTPOS register field. */
18954 #define ALT_USB_HOST_HCSPLT2_XACTPOS_RESET 0x0
18955 /* Extracts the ALT_USB_HOST_HCSPLT2_XACTPOS field value from a register. */
18956 #define ALT_USB_HOST_HCSPLT2_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
18957 /* Produces a ALT_USB_HOST_HCSPLT2_XACTPOS register field value suitable for setting the register. */
18958 #define ALT_USB_HOST_HCSPLT2_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
18959 
18960 /*
18961  * Field : Do Complete Split - compsplt
18962  *
18963  * The application sets this field to request the OTG host to perform a complete
18964  * split transaction.
18965  *
18966  * Field Enumeration Values:
18967  *
18968  * Enum | Value | Description
18969  * :----------------------------------------|:------|:---------------------
18970  * ALT_USB_HOST_HCSPLT2_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
18971  * ALT_USB_HOST_HCSPLT2_COMPSPLT_E_SPLIT | 0x1 | Split transaction
18972  *
18973  * Field Access Macros:
18974  *
18975  */
18976 /*
18977  * Enumerated value for register field ALT_USB_HOST_HCSPLT2_COMPSPLT
18978  *
18979  * No split transaction
18980  */
18981 #define ALT_USB_HOST_HCSPLT2_COMPSPLT_E_NOSPLIT 0x0
18982 /*
18983  * Enumerated value for register field ALT_USB_HOST_HCSPLT2_COMPSPLT
18984  *
18985  * Split transaction
18986  */
18987 #define ALT_USB_HOST_HCSPLT2_COMPSPLT_E_SPLIT 0x1
18988 
18989 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT2_COMPSPLT register field. */
18990 #define ALT_USB_HOST_HCSPLT2_COMPSPLT_LSB 16
18991 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT2_COMPSPLT register field. */
18992 #define ALT_USB_HOST_HCSPLT2_COMPSPLT_MSB 16
18993 /* The width in bits of the ALT_USB_HOST_HCSPLT2_COMPSPLT register field. */
18994 #define ALT_USB_HOST_HCSPLT2_COMPSPLT_WIDTH 1
18995 /* The mask used to set the ALT_USB_HOST_HCSPLT2_COMPSPLT register field value. */
18996 #define ALT_USB_HOST_HCSPLT2_COMPSPLT_SET_MSK 0x00010000
18997 /* The mask used to clear the ALT_USB_HOST_HCSPLT2_COMPSPLT register field value. */
18998 #define ALT_USB_HOST_HCSPLT2_COMPSPLT_CLR_MSK 0xfffeffff
18999 /* The reset value of the ALT_USB_HOST_HCSPLT2_COMPSPLT register field. */
19000 #define ALT_USB_HOST_HCSPLT2_COMPSPLT_RESET 0x0
19001 /* Extracts the ALT_USB_HOST_HCSPLT2_COMPSPLT field value from a register. */
19002 #define ALT_USB_HOST_HCSPLT2_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
19003 /* Produces a ALT_USB_HOST_HCSPLT2_COMPSPLT register field value suitable for setting the register. */
19004 #define ALT_USB_HOST_HCSPLT2_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
19005 
19006 /*
19007  * Field : Split Enable - spltena
19008  *
19009  * The application sets this field to indicate that this channel is enabled to
19010  * perform split transactions.
19011  *
19012  * Field Enumeration Values:
19013  *
19014  * Enum | Value | Description
19015  * :------------------------------------|:------|:------------------
19016  * ALT_USB_HOST_HCSPLT2_SPLTENA_E_DISD | 0x0 | Split not enabled
19017  * ALT_USB_HOST_HCSPLT2_SPLTENA_E_END | 0x1 | Split enabled
19018  *
19019  * Field Access Macros:
19020  *
19021  */
19022 /*
19023  * Enumerated value for register field ALT_USB_HOST_HCSPLT2_SPLTENA
19024  *
19025  * Split not enabled
19026  */
19027 #define ALT_USB_HOST_HCSPLT2_SPLTENA_E_DISD 0x0
19028 /*
19029  * Enumerated value for register field ALT_USB_HOST_HCSPLT2_SPLTENA
19030  *
19031  * Split enabled
19032  */
19033 #define ALT_USB_HOST_HCSPLT2_SPLTENA_E_END 0x1
19034 
19035 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT2_SPLTENA register field. */
19036 #define ALT_USB_HOST_HCSPLT2_SPLTENA_LSB 31
19037 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT2_SPLTENA register field. */
19038 #define ALT_USB_HOST_HCSPLT2_SPLTENA_MSB 31
19039 /* The width in bits of the ALT_USB_HOST_HCSPLT2_SPLTENA register field. */
19040 #define ALT_USB_HOST_HCSPLT2_SPLTENA_WIDTH 1
19041 /* The mask used to set the ALT_USB_HOST_HCSPLT2_SPLTENA register field value. */
19042 #define ALT_USB_HOST_HCSPLT2_SPLTENA_SET_MSK 0x80000000
19043 /* The mask used to clear the ALT_USB_HOST_HCSPLT2_SPLTENA register field value. */
19044 #define ALT_USB_HOST_HCSPLT2_SPLTENA_CLR_MSK 0x7fffffff
19045 /* The reset value of the ALT_USB_HOST_HCSPLT2_SPLTENA register field. */
19046 #define ALT_USB_HOST_HCSPLT2_SPLTENA_RESET 0x0
19047 /* Extracts the ALT_USB_HOST_HCSPLT2_SPLTENA field value from a register. */
19048 #define ALT_USB_HOST_HCSPLT2_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
19049 /* Produces a ALT_USB_HOST_HCSPLT2_SPLTENA register field value suitable for setting the register. */
19050 #define ALT_USB_HOST_HCSPLT2_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
19051 
19052 #ifndef __ASSEMBLY__
19053 /*
19054  * WARNING: The C register and register group struct declarations are provided for
19055  * convenience and illustrative purposes. They should, however, be used with
19056  * caution as the C language standard provides no guarantees about the alignment or
19057  * atomicity of device memory accesses. The recommended practice for writing
19058  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
19059  * alt_write_word() functions.
19060  *
19061  * The struct declaration for register ALT_USB_HOST_HCSPLT2.
19062  */
19063 struct ALT_USB_HOST_HCSPLT2_s
19064 {
19065  uint32_t prtaddr : 7; /* Port Address */
19066  uint32_t hubaddr : 7; /* Hub Address */
19067  uint32_t xactpos : 2; /* Transaction Position */
19068  uint32_t compsplt : 1; /* Do Complete Split */
19069  uint32_t : 14; /* *UNDEFINED* */
19070  uint32_t spltena : 1; /* Split Enable */
19071 };
19072 
19073 /* The typedef declaration for register ALT_USB_HOST_HCSPLT2. */
19074 typedef volatile struct ALT_USB_HOST_HCSPLT2_s ALT_USB_HOST_HCSPLT2_t;
19075 #endif /* __ASSEMBLY__ */
19076 
19077 /* The byte offset of the ALT_USB_HOST_HCSPLT2 register from the beginning of the component. */
19078 #define ALT_USB_HOST_HCSPLT2_OFST 0x144
19079 /* The address of the ALT_USB_HOST_HCSPLT2 register. */
19080 #define ALT_USB_HOST_HCSPLT2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT2_OFST))
19081 
19082 /*
19083  * Register : Host Channel 2 Interrupt Register - hcint2
19084  *
19085  * This register indicates the status of a channel with respect to USB- and AHB-
19086  * related events. The application must read this register when the Host Channels
19087  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
19088  * application can read this register, it must first read the Host All Channels
19089  * Interrupt (HAINT) register to get the exact channel number for the Host
19090  * Channel-n Interrupt register. The application must clear the appropriate bit in
19091  * this register to clear the corresponding bits in the HAINT and GINTSTS
19092  * registers.
19093  *
19094  * Register Layout
19095  *
19096  * Bits | Access | Reset | Description
19097  * :--------|:-------|:------|:--------------------------------------------
19098  * [0] | R | 0x0 | Transfer Completed
19099  * [1] | R | 0x0 | Channel Halted
19100  * [2] | R | 0x0 | AHB Error
19101  * [3] | R | 0x0 | STALL Response Received Interrupt
19102  * [4] | R | 0x0 | NAK Response Received Interrupt
19103  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
19104  * [6] | R | 0x0 | NYET Response Received Interrupt
19105  * [7] | R | 0x0 | Transaction Error
19106  * [8] | R | 0x0 | Babble Error
19107  * [9] | R | 0x0 | Frame Overrun
19108  * [10] | R | 0x0 | Data Toggle Error
19109  * [11] | R | 0x0 | BNA Interrupt
19110  * [12] | R | 0x0 | Excessive Transaction Error
19111  * [13] | R | 0x0 | Descriptor rollover interrupt
19112  * [31:14] | ??? | 0x0 | *UNDEFINED*
19113  *
19114  */
19115 /*
19116  * Field : Transfer Completed - xfercompl
19117  *
19118  * Transfer completed normally without any errors. This bit can be set only by the
19119  * core and the application should write 1 to clear it.
19120  *
19121  * Field Enumeration Values:
19122  *
19123  * Enum | Value | Description
19124  * :--------------------------------------|:------|:-----------------------------------------------
19125  * ALT_USB_HOST_HCINT2_XFERCOMPL_E_INACT | 0x0 | No transfer
19126  * ALT_USB_HOST_HCINT2_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
19127  *
19128  * Field Access Macros:
19129  *
19130  */
19131 /*
19132  * Enumerated value for register field ALT_USB_HOST_HCINT2_XFERCOMPL
19133  *
19134  * No transfer
19135  */
19136 #define ALT_USB_HOST_HCINT2_XFERCOMPL_E_INACT 0x0
19137 /*
19138  * Enumerated value for register field ALT_USB_HOST_HCINT2_XFERCOMPL
19139  *
19140  * Transfer completed normally without any errors
19141  */
19142 #define ALT_USB_HOST_HCINT2_XFERCOMPL_E_ACT 0x1
19143 
19144 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_XFERCOMPL register field. */
19145 #define ALT_USB_HOST_HCINT2_XFERCOMPL_LSB 0
19146 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_XFERCOMPL register field. */
19147 #define ALT_USB_HOST_HCINT2_XFERCOMPL_MSB 0
19148 /* The width in bits of the ALT_USB_HOST_HCINT2_XFERCOMPL register field. */
19149 #define ALT_USB_HOST_HCINT2_XFERCOMPL_WIDTH 1
19150 /* The mask used to set the ALT_USB_HOST_HCINT2_XFERCOMPL register field value. */
19151 #define ALT_USB_HOST_HCINT2_XFERCOMPL_SET_MSK 0x00000001
19152 /* The mask used to clear the ALT_USB_HOST_HCINT2_XFERCOMPL register field value. */
19153 #define ALT_USB_HOST_HCINT2_XFERCOMPL_CLR_MSK 0xfffffffe
19154 /* The reset value of the ALT_USB_HOST_HCINT2_XFERCOMPL register field. */
19155 #define ALT_USB_HOST_HCINT2_XFERCOMPL_RESET 0x0
19156 /* Extracts the ALT_USB_HOST_HCINT2_XFERCOMPL field value from a register. */
19157 #define ALT_USB_HOST_HCINT2_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
19158 /* Produces a ALT_USB_HOST_HCINT2_XFERCOMPL register field value suitable for setting the register. */
19159 #define ALT_USB_HOST_HCINT2_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
19160 
19161 /*
19162  * Field : Channel Halted - chhltd
19163  *
19164  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
19165  * either because of any USB transaction error or in response to disable request by
19166  * the application or because of a completed transfer. In Scatter/gather DMA mode,
19167  * this indicates that transfer completed due to any of the following
19168  *
19169  * . EOL being set in descriptor
19170  *
19171  * . AHB error
19172  *
19173  * . Excessive transaction errors
19174  *
19175  * . Babble
19176  *
19177  * . Stall
19178  *
19179  * Field Enumeration Values:
19180  *
19181  * Enum | Value | Description
19182  * :-----------------------------------|:------|:-------------------
19183  * ALT_USB_HOST_HCINT2_CHHLTD_E_INACT | 0x0 | Channel not halted
19184  * ALT_USB_HOST_HCINT2_CHHLTD_E_ACT | 0x1 | Channel Halted
19185  *
19186  * Field Access Macros:
19187  *
19188  */
19189 /*
19190  * Enumerated value for register field ALT_USB_HOST_HCINT2_CHHLTD
19191  *
19192  * Channel not halted
19193  */
19194 #define ALT_USB_HOST_HCINT2_CHHLTD_E_INACT 0x0
19195 /*
19196  * Enumerated value for register field ALT_USB_HOST_HCINT2_CHHLTD
19197  *
19198  * Channel Halted
19199  */
19200 #define ALT_USB_HOST_HCINT2_CHHLTD_E_ACT 0x1
19201 
19202 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_CHHLTD register field. */
19203 #define ALT_USB_HOST_HCINT2_CHHLTD_LSB 1
19204 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_CHHLTD register field. */
19205 #define ALT_USB_HOST_HCINT2_CHHLTD_MSB 1
19206 /* The width in bits of the ALT_USB_HOST_HCINT2_CHHLTD register field. */
19207 #define ALT_USB_HOST_HCINT2_CHHLTD_WIDTH 1
19208 /* The mask used to set the ALT_USB_HOST_HCINT2_CHHLTD register field value. */
19209 #define ALT_USB_HOST_HCINT2_CHHLTD_SET_MSK 0x00000002
19210 /* The mask used to clear the ALT_USB_HOST_HCINT2_CHHLTD register field value. */
19211 #define ALT_USB_HOST_HCINT2_CHHLTD_CLR_MSK 0xfffffffd
19212 /* The reset value of the ALT_USB_HOST_HCINT2_CHHLTD register field. */
19213 #define ALT_USB_HOST_HCINT2_CHHLTD_RESET 0x0
19214 /* Extracts the ALT_USB_HOST_HCINT2_CHHLTD field value from a register. */
19215 #define ALT_USB_HOST_HCINT2_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
19216 /* Produces a ALT_USB_HOST_HCINT2_CHHLTD register field value suitable for setting the register. */
19217 #define ALT_USB_HOST_HCINT2_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
19218 
19219 /*
19220  * Field : AHB Error - ahberr
19221  *
19222  * This is generated only in Internal DMA mode when there is an AHB error during
19223  * AHB read/write. The application can read the corresponding channel's address
19224  * register to get the error address.
19225  *
19226  * Field Enumeration Values:
19227  *
19228  * Enum | Value | Description
19229  * :-----------------------------------|:------|:--------------------------------
19230  * ALT_USB_HOST_HCINT2_AHBERR_E_INACT | 0x0 | No AHB error
19231  * ALT_USB_HOST_HCINT2_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
19232  *
19233  * Field Access Macros:
19234  *
19235  */
19236 /*
19237  * Enumerated value for register field ALT_USB_HOST_HCINT2_AHBERR
19238  *
19239  * No AHB error
19240  */
19241 #define ALT_USB_HOST_HCINT2_AHBERR_E_INACT 0x0
19242 /*
19243  * Enumerated value for register field ALT_USB_HOST_HCINT2_AHBERR
19244  *
19245  * AHB error during AHB read/write
19246  */
19247 #define ALT_USB_HOST_HCINT2_AHBERR_E_ACT 0x1
19248 
19249 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_AHBERR register field. */
19250 #define ALT_USB_HOST_HCINT2_AHBERR_LSB 2
19251 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_AHBERR register field. */
19252 #define ALT_USB_HOST_HCINT2_AHBERR_MSB 2
19253 /* The width in bits of the ALT_USB_HOST_HCINT2_AHBERR register field. */
19254 #define ALT_USB_HOST_HCINT2_AHBERR_WIDTH 1
19255 /* The mask used to set the ALT_USB_HOST_HCINT2_AHBERR register field value. */
19256 #define ALT_USB_HOST_HCINT2_AHBERR_SET_MSK 0x00000004
19257 /* The mask used to clear the ALT_USB_HOST_HCINT2_AHBERR register field value. */
19258 #define ALT_USB_HOST_HCINT2_AHBERR_CLR_MSK 0xfffffffb
19259 /* The reset value of the ALT_USB_HOST_HCINT2_AHBERR register field. */
19260 #define ALT_USB_HOST_HCINT2_AHBERR_RESET 0x0
19261 /* Extracts the ALT_USB_HOST_HCINT2_AHBERR field value from a register. */
19262 #define ALT_USB_HOST_HCINT2_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
19263 /* Produces a ALT_USB_HOST_HCINT2_AHBERR register field value suitable for setting the register. */
19264 #define ALT_USB_HOST_HCINT2_AHBERR_SET(value) (((value) << 2) & 0x00000004)
19265 
19266 /*
19267  * Field : STALL Response Received Interrupt - stall
19268  *
19269  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
19270  * This bit can be set only by the core and the application should write 1 to clear
19271  * it.
19272  *
19273  * Field Enumeration Values:
19274  *
19275  * Enum | Value | Description
19276  * :----------------------------------|:------|:-------------------
19277  * ALT_USB_HOST_HCINT2_STALL_E_INACT | 0x0 | No Stall Interrupt
19278  * ALT_USB_HOST_HCINT2_STALL_E_ACT | 0x1 | Stall Interrupt
19279  *
19280  * Field Access Macros:
19281  *
19282  */
19283 /*
19284  * Enumerated value for register field ALT_USB_HOST_HCINT2_STALL
19285  *
19286  * No Stall Interrupt
19287  */
19288 #define ALT_USB_HOST_HCINT2_STALL_E_INACT 0x0
19289 /*
19290  * Enumerated value for register field ALT_USB_HOST_HCINT2_STALL
19291  *
19292  * Stall Interrupt
19293  */
19294 #define ALT_USB_HOST_HCINT2_STALL_E_ACT 0x1
19295 
19296 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_STALL register field. */
19297 #define ALT_USB_HOST_HCINT2_STALL_LSB 3
19298 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_STALL register field. */
19299 #define ALT_USB_HOST_HCINT2_STALL_MSB 3
19300 /* The width in bits of the ALT_USB_HOST_HCINT2_STALL register field. */
19301 #define ALT_USB_HOST_HCINT2_STALL_WIDTH 1
19302 /* The mask used to set the ALT_USB_HOST_HCINT2_STALL register field value. */
19303 #define ALT_USB_HOST_HCINT2_STALL_SET_MSK 0x00000008
19304 /* The mask used to clear the ALT_USB_HOST_HCINT2_STALL register field value. */
19305 #define ALT_USB_HOST_HCINT2_STALL_CLR_MSK 0xfffffff7
19306 /* The reset value of the ALT_USB_HOST_HCINT2_STALL register field. */
19307 #define ALT_USB_HOST_HCINT2_STALL_RESET 0x0
19308 /* Extracts the ALT_USB_HOST_HCINT2_STALL field value from a register. */
19309 #define ALT_USB_HOST_HCINT2_STALL_GET(value) (((value) & 0x00000008) >> 3)
19310 /* Produces a ALT_USB_HOST_HCINT2_STALL register field value suitable for setting the register. */
19311 #define ALT_USB_HOST_HCINT2_STALL_SET(value) (((value) << 3) & 0x00000008)
19312 
19313 /*
19314  * Field : NAK Response Received Interrupt - nak
19315  *
19316  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
19317  * core.This bit can be set only by the core and the application should write 1 to
19318  * clear it.
19319  *
19320  * Field Enumeration Values:
19321  *
19322  * Enum | Value | Description
19323  * :--------------------------------|:------|:-----------------------------------
19324  * ALT_USB_HOST_HCINT2_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
19325  * ALT_USB_HOST_HCINT2_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
19326  *
19327  * Field Access Macros:
19328  *
19329  */
19330 /*
19331  * Enumerated value for register field ALT_USB_HOST_HCINT2_NAK
19332  *
19333  * No NAK Response Received Interrupt
19334  */
19335 #define ALT_USB_HOST_HCINT2_NAK_E_INACT 0x0
19336 /*
19337  * Enumerated value for register field ALT_USB_HOST_HCINT2_NAK
19338  *
19339  * NAK Response Received Interrupt
19340  */
19341 #define ALT_USB_HOST_HCINT2_NAK_E_ACT 0x1
19342 
19343 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_NAK register field. */
19344 #define ALT_USB_HOST_HCINT2_NAK_LSB 4
19345 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_NAK register field. */
19346 #define ALT_USB_HOST_HCINT2_NAK_MSB 4
19347 /* The width in bits of the ALT_USB_HOST_HCINT2_NAK register field. */
19348 #define ALT_USB_HOST_HCINT2_NAK_WIDTH 1
19349 /* The mask used to set the ALT_USB_HOST_HCINT2_NAK register field value. */
19350 #define ALT_USB_HOST_HCINT2_NAK_SET_MSK 0x00000010
19351 /* The mask used to clear the ALT_USB_HOST_HCINT2_NAK register field value. */
19352 #define ALT_USB_HOST_HCINT2_NAK_CLR_MSK 0xffffffef
19353 /* The reset value of the ALT_USB_HOST_HCINT2_NAK register field. */
19354 #define ALT_USB_HOST_HCINT2_NAK_RESET 0x0
19355 /* Extracts the ALT_USB_HOST_HCINT2_NAK field value from a register. */
19356 #define ALT_USB_HOST_HCINT2_NAK_GET(value) (((value) & 0x00000010) >> 4)
19357 /* Produces a ALT_USB_HOST_HCINT2_NAK register field value suitable for setting the register. */
19358 #define ALT_USB_HOST_HCINT2_NAK_SET(value) (((value) << 4) & 0x00000010)
19359 
19360 /*
19361  * Field : ACK Response Received Transmitted Interrupt - ack
19362  *
19363  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
19364  * This bit can be set only by the core and the application should write 1 to clear
19365  * it.
19366  *
19367  * Field Enumeration Values:
19368  *
19369  * Enum | Value | Description
19370  * :--------------------------------|:------|:-----------------------------------------------
19371  * ALT_USB_HOST_HCINT2_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
19372  * ALT_USB_HOST_HCINT2_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
19373  *
19374  * Field Access Macros:
19375  *
19376  */
19377 /*
19378  * Enumerated value for register field ALT_USB_HOST_HCINT2_ACK
19379  *
19380  * No ACK Response Received Transmitted Interrupt
19381  */
19382 #define ALT_USB_HOST_HCINT2_ACK_E_INACT 0x0
19383 /*
19384  * Enumerated value for register field ALT_USB_HOST_HCINT2_ACK
19385  *
19386  * ACK Response Received Transmitted Interrup
19387  */
19388 #define ALT_USB_HOST_HCINT2_ACK_E_ACT 0x1
19389 
19390 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_ACK register field. */
19391 #define ALT_USB_HOST_HCINT2_ACK_LSB 5
19392 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_ACK register field. */
19393 #define ALT_USB_HOST_HCINT2_ACK_MSB 5
19394 /* The width in bits of the ALT_USB_HOST_HCINT2_ACK register field. */
19395 #define ALT_USB_HOST_HCINT2_ACK_WIDTH 1
19396 /* The mask used to set the ALT_USB_HOST_HCINT2_ACK register field value. */
19397 #define ALT_USB_HOST_HCINT2_ACK_SET_MSK 0x00000020
19398 /* The mask used to clear the ALT_USB_HOST_HCINT2_ACK register field value. */
19399 #define ALT_USB_HOST_HCINT2_ACK_CLR_MSK 0xffffffdf
19400 /* The reset value of the ALT_USB_HOST_HCINT2_ACK register field. */
19401 #define ALT_USB_HOST_HCINT2_ACK_RESET 0x0
19402 /* Extracts the ALT_USB_HOST_HCINT2_ACK field value from a register. */
19403 #define ALT_USB_HOST_HCINT2_ACK_GET(value) (((value) & 0x00000020) >> 5)
19404 /* Produces a ALT_USB_HOST_HCINT2_ACK register field value suitable for setting the register. */
19405 #define ALT_USB_HOST_HCINT2_ACK_SET(value) (((value) << 5) & 0x00000020)
19406 
19407 /*
19408  * Field : NYET Response Received Interrupt - nyet
19409  *
19410  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
19411  * core.This bit can be set only by the core and the application should write 1 to
19412  * clear it.
19413  *
19414  * Field Enumeration Values:
19415  *
19416  * Enum | Value | Description
19417  * :---------------------------------|:------|:------------------------------------
19418  * ALT_USB_HOST_HCINT2_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
19419  * ALT_USB_HOST_HCINT2_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
19420  *
19421  * Field Access Macros:
19422  *
19423  */
19424 /*
19425  * Enumerated value for register field ALT_USB_HOST_HCINT2_NYET
19426  *
19427  * No NYET Response Received Interrupt
19428  */
19429 #define ALT_USB_HOST_HCINT2_NYET_E_INACT 0x0
19430 /*
19431  * Enumerated value for register field ALT_USB_HOST_HCINT2_NYET
19432  *
19433  * NYET Response Received Interrupt
19434  */
19435 #define ALT_USB_HOST_HCINT2_NYET_E_ACT 0x1
19436 
19437 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_NYET register field. */
19438 #define ALT_USB_HOST_HCINT2_NYET_LSB 6
19439 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_NYET register field. */
19440 #define ALT_USB_HOST_HCINT2_NYET_MSB 6
19441 /* The width in bits of the ALT_USB_HOST_HCINT2_NYET register field. */
19442 #define ALT_USB_HOST_HCINT2_NYET_WIDTH 1
19443 /* The mask used to set the ALT_USB_HOST_HCINT2_NYET register field value. */
19444 #define ALT_USB_HOST_HCINT2_NYET_SET_MSK 0x00000040
19445 /* The mask used to clear the ALT_USB_HOST_HCINT2_NYET register field value. */
19446 #define ALT_USB_HOST_HCINT2_NYET_CLR_MSK 0xffffffbf
19447 /* The reset value of the ALT_USB_HOST_HCINT2_NYET register field. */
19448 #define ALT_USB_HOST_HCINT2_NYET_RESET 0x0
19449 /* Extracts the ALT_USB_HOST_HCINT2_NYET field value from a register. */
19450 #define ALT_USB_HOST_HCINT2_NYET_GET(value) (((value) & 0x00000040) >> 6)
19451 /* Produces a ALT_USB_HOST_HCINT2_NYET register field value suitable for setting the register. */
19452 #define ALT_USB_HOST_HCINT2_NYET_SET(value) (((value) << 6) & 0x00000040)
19453 
19454 /*
19455  * Field : Transaction Error - xacterr
19456  *
19457  * Indicates one of the following errors occurred on the USB.-CRC check failure
19458  *
19459  * * Timeout
19460  *
19461  * * Bit stuff error
19462  *
19463  * * False EOP
19464  *
19465  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
19466  * This bit can be set only by the core and the application should write 1 to clear
19467  * it.
19468  *
19469  * Field Enumeration Values:
19470  *
19471  * Enum | Value | Description
19472  * :------------------------------------|:------|:---------------------
19473  * ALT_USB_HOST_HCINT2_XACTERR_E_INACT | 0x0 | No Transaction Error
19474  * ALT_USB_HOST_HCINT2_XACTERR_E_ACT | 0x1 | Transaction Error
19475  *
19476  * Field Access Macros:
19477  *
19478  */
19479 /*
19480  * Enumerated value for register field ALT_USB_HOST_HCINT2_XACTERR
19481  *
19482  * No Transaction Error
19483  */
19484 #define ALT_USB_HOST_HCINT2_XACTERR_E_INACT 0x0
19485 /*
19486  * Enumerated value for register field ALT_USB_HOST_HCINT2_XACTERR
19487  *
19488  * Transaction Error
19489  */
19490 #define ALT_USB_HOST_HCINT2_XACTERR_E_ACT 0x1
19491 
19492 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_XACTERR register field. */
19493 #define ALT_USB_HOST_HCINT2_XACTERR_LSB 7
19494 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_XACTERR register field. */
19495 #define ALT_USB_HOST_HCINT2_XACTERR_MSB 7
19496 /* The width in bits of the ALT_USB_HOST_HCINT2_XACTERR register field. */
19497 #define ALT_USB_HOST_HCINT2_XACTERR_WIDTH 1
19498 /* The mask used to set the ALT_USB_HOST_HCINT2_XACTERR register field value. */
19499 #define ALT_USB_HOST_HCINT2_XACTERR_SET_MSK 0x00000080
19500 /* The mask used to clear the ALT_USB_HOST_HCINT2_XACTERR register field value. */
19501 #define ALT_USB_HOST_HCINT2_XACTERR_CLR_MSK 0xffffff7f
19502 /* The reset value of the ALT_USB_HOST_HCINT2_XACTERR register field. */
19503 #define ALT_USB_HOST_HCINT2_XACTERR_RESET 0x0
19504 /* Extracts the ALT_USB_HOST_HCINT2_XACTERR field value from a register. */
19505 #define ALT_USB_HOST_HCINT2_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
19506 /* Produces a ALT_USB_HOST_HCINT2_XACTERR register field value suitable for setting the register. */
19507 #define ALT_USB_HOST_HCINT2_XACTERR_SET(value) (((value) << 7) & 0x00000080)
19508 
19509 /*
19510  * Field : Babble Error - bblerr
19511  *
19512  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
19513  * core..This bit can be set only by the core and the application should write 1 to
19514  * clear it.
19515  *
19516  * Field Enumeration Values:
19517  *
19518  * Enum | Value | Description
19519  * :-----------------------------------|:------|:----------------
19520  * ALT_USB_HOST_HCINT2_BBLERR_E_INACT | 0x0 | No Babble Error
19521  * ALT_USB_HOST_HCINT2_BBLERR_E_ACT | 0x1 | Babble Error
19522  *
19523  * Field Access Macros:
19524  *
19525  */
19526 /*
19527  * Enumerated value for register field ALT_USB_HOST_HCINT2_BBLERR
19528  *
19529  * No Babble Error
19530  */
19531 #define ALT_USB_HOST_HCINT2_BBLERR_E_INACT 0x0
19532 /*
19533  * Enumerated value for register field ALT_USB_HOST_HCINT2_BBLERR
19534  *
19535  * Babble Error
19536  */
19537 #define ALT_USB_HOST_HCINT2_BBLERR_E_ACT 0x1
19538 
19539 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_BBLERR register field. */
19540 #define ALT_USB_HOST_HCINT2_BBLERR_LSB 8
19541 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_BBLERR register field. */
19542 #define ALT_USB_HOST_HCINT2_BBLERR_MSB 8
19543 /* The width in bits of the ALT_USB_HOST_HCINT2_BBLERR register field. */
19544 #define ALT_USB_HOST_HCINT2_BBLERR_WIDTH 1
19545 /* The mask used to set the ALT_USB_HOST_HCINT2_BBLERR register field value. */
19546 #define ALT_USB_HOST_HCINT2_BBLERR_SET_MSK 0x00000100
19547 /* The mask used to clear the ALT_USB_HOST_HCINT2_BBLERR register field value. */
19548 #define ALT_USB_HOST_HCINT2_BBLERR_CLR_MSK 0xfffffeff
19549 /* The reset value of the ALT_USB_HOST_HCINT2_BBLERR register field. */
19550 #define ALT_USB_HOST_HCINT2_BBLERR_RESET 0x0
19551 /* Extracts the ALT_USB_HOST_HCINT2_BBLERR field value from a register. */
19552 #define ALT_USB_HOST_HCINT2_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
19553 /* Produces a ALT_USB_HOST_HCINT2_BBLERR register field value suitable for setting the register. */
19554 #define ALT_USB_HOST_HCINT2_BBLERR_SET(value) (((value) << 8) & 0x00000100)
19555 
19556 /*
19557  * Field : Frame Overrun - frmovrun
19558  *
19559  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
19560  * This bit can be set only by the core and the application should write 1 to clear
19561  * it.
19562  *
19563  * Field Enumeration Values:
19564  *
19565  * Enum | Value | Description
19566  * :-------------------------------------|:------|:-----------------
19567  * ALT_USB_HOST_HCINT2_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
19568  * ALT_USB_HOST_HCINT2_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
19569  *
19570  * Field Access Macros:
19571  *
19572  */
19573 /*
19574  * Enumerated value for register field ALT_USB_HOST_HCINT2_FRMOVRUN
19575  *
19576  * No Frame Overrun
19577  */
19578 #define ALT_USB_HOST_HCINT2_FRMOVRUN_E_INACT 0x0
19579 /*
19580  * Enumerated value for register field ALT_USB_HOST_HCINT2_FRMOVRUN
19581  *
19582  * Frame Overrun
19583  */
19584 #define ALT_USB_HOST_HCINT2_FRMOVRUN_E_ACT 0x1
19585 
19586 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_FRMOVRUN register field. */
19587 #define ALT_USB_HOST_HCINT2_FRMOVRUN_LSB 9
19588 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_FRMOVRUN register field. */
19589 #define ALT_USB_HOST_HCINT2_FRMOVRUN_MSB 9
19590 /* The width in bits of the ALT_USB_HOST_HCINT2_FRMOVRUN register field. */
19591 #define ALT_USB_HOST_HCINT2_FRMOVRUN_WIDTH 1
19592 /* The mask used to set the ALT_USB_HOST_HCINT2_FRMOVRUN register field value. */
19593 #define ALT_USB_HOST_HCINT2_FRMOVRUN_SET_MSK 0x00000200
19594 /* The mask used to clear the ALT_USB_HOST_HCINT2_FRMOVRUN register field value. */
19595 #define ALT_USB_HOST_HCINT2_FRMOVRUN_CLR_MSK 0xfffffdff
19596 /* The reset value of the ALT_USB_HOST_HCINT2_FRMOVRUN register field. */
19597 #define ALT_USB_HOST_HCINT2_FRMOVRUN_RESET 0x0
19598 /* Extracts the ALT_USB_HOST_HCINT2_FRMOVRUN field value from a register. */
19599 #define ALT_USB_HOST_HCINT2_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
19600 /* Produces a ALT_USB_HOST_HCINT2_FRMOVRUN register field value suitable for setting the register. */
19601 #define ALT_USB_HOST_HCINT2_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
19602 
19603 /*
19604  * Field : Data Toggle Error - datatglerr
19605  *
19606  * This bit can be set only by the core and the application should write 1 to clear
19607  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
19608  * core.
19609  *
19610  * Field Enumeration Values:
19611  *
19612  * Enum | Value | Description
19613  * :---------------------------------------|:------|:---------------------
19614  * ALT_USB_HOST_HCINT2_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
19615  * ALT_USB_HOST_HCINT2_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
19616  *
19617  * Field Access Macros:
19618  *
19619  */
19620 /*
19621  * Enumerated value for register field ALT_USB_HOST_HCINT2_DATATGLERR
19622  *
19623  * No Data Toggle Error
19624  */
19625 #define ALT_USB_HOST_HCINT2_DATATGLERR_E_INACT 0x0
19626 /*
19627  * Enumerated value for register field ALT_USB_HOST_HCINT2_DATATGLERR
19628  *
19629  * Data Toggle Error
19630  */
19631 #define ALT_USB_HOST_HCINT2_DATATGLERR_E_ACT 0x1
19632 
19633 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_DATATGLERR register field. */
19634 #define ALT_USB_HOST_HCINT2_DATATGLERR_LSB 10
19635 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_DATATGLERR register field. */
19636 #define ALT_USB_HOST_HCINT2_DATATGLERR_MSB 10
19637 /* The width in bits of the ALT_USB_HOST_HCINT2_DATATGLERR register field. */
19638 #define ALT_USB_HOST_HCINT2_DATATGLERR_WIDTH 1
19639 /* The mask used to set the ALT_USB_HOST_HCINT2_DATATGLERR register field value. */
19640 #define ALT_USB_HOST_HCINT2_DATATGLERR_SET_MSK 0x00000400
19641 /* The mask used to clear the ALT_USB_HOST_HCINT2_DATATGLERR register field value. */
19642 #define ALT_USB_HOST_HCINT2_DATATGLERR_CLR_MSK 0xfffffbff
19643 /* The reset value of the ALT_USB_HOST_HCINT2_DATATGLERR register field. */
19644 #define ALT_USB_HOST_HCINT2_DATATGLERR_RESET 0x0
19645 /* Extracts the ALT_USB_HOST_HCINT2_DATATGLERR field value from a register. */
19646 #define ALT_USB_HOST_HCINT2_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
19647 /* Produces a ALT_USB_HOST_HCINT2_DATATGLERR register field value suitable for setting the register. */
19648 #define ALT_USB_HOST_HCINT2_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
19649 
19650 /*
19651  * Field : BNA Interrupt - bnaintr
19652  *
19653  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
19654  * generates this interrupt when the descriptor accessed is not ready for the Core
19655  * to process. BNA will not be generated for Isochronous channels. for non
19656  * Scatter/Gather DMA mode, this bit is reserved.
19657  *
19658  * Field Enumeration Values:
19659  *
19660  * Enum | Value | Description
19661  * :------------------------------------|:------|:-----------------
19662  * ALT_USB_HOST_HCINT2_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
19663  * ALT_USB_HOST_HCINT2_BNAINTR_E_ACT | 0x1 | BNA Interrupt
19664  *
19665  * Field Access Macros:
19666  *
19667  */
19668 /*
19669  * Enumerated value for register field ALT_USB_HOST_HCINT2_BNAINTR
19670  *
19671  * No BNA Interrupt
19672  */
19673 #define ALT_USB_HOST_HCINT2_BNAINTR_E_INACT 0x0
19674 /*
19675  * Enumerated value for register field ALT_USB_HOST_HCINT2_BNAINTR
19676  *
19677  * BNA Interrupt
19678  */
19679 #define ALT_USB_HOST_HCINT2_BNAINTR_E_ACT 0x1
19680 
19681 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_BNAINTR register field. */
19682 #define ALT_USB_HOST_HCINT2_BNAINTR_LSB 11
19683 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_BNAINTR register field. */
19684 #define ALT_USB_HOST_HCINT2_BNAINTR_MSB 11
19685 /* The width in bits of the ALT_USB_HOST_HCINT2_BNAINTR register field. */
19686 #define ALT_USB_HOST_HCINT2_BNAINTR_WIDTH 1
19687 /* The mask used to set the ALT_USB_HOST_HCINT2_BNAINTR register field value. */
19688 #define ALT_USB_HOST_HCINT2_BNAINTR_SET_MSK 0x00000800
19689 /* The mask used to clear the ALT_USB_HOST_HCINT2_BNAINTR register field value. */
19690 #define ALT_USB_HOST_HCINT2_BNAINTR_CLR_MSK 0xfffff7ff
19691 /* The reset value of the ALT_USB_HOST_HCINT2_BNAINTR register field. */
19692 #define ALT_USB_HOST_HCINT2_BNAINTR_RESET 0x0
19693 /* Extracts the ALT_USB_HOST_HCINT2_BNAINTR field value from a register. */
19694 #define ALT_USB_HOST_HCINT2_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
19695 /* Produces a ALT_USB_HOST_HCINT2_BNAINTR register field value suitable for setting the register. */
19696 #define ALT_USB_HOST_HCINT2_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
19697 
19698 /*
19699  * Field : Excessive Transaction Error - xcs_xact_err
19700  *
19701  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
19702  * this bit when 3 consecutive transaction errors occurred on the USB bus.
19703  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
19704  * Scatter/Gather DMA mode, this bit is reserved.
19705  *
19706  * Field Enumeration Values:
19707  *
19708  * Enum | Value | Description
19709  * :-------------------------------------------|:------|:-------------------------------
19710  * ALT_USB_HOST_HCINT2_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
19711  * ALT_USB_HOST_HCINT2_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
19712  *
19713  * Field Access Macros:
19714  *
19715  */
19716 /*
19717  * Enumerated value for register field ALT_USB_HOST_HCINT2_XCS_XACT_ERR
19718  *
19719  * No Excessive Transaction Error
19720  */
19721 #define ALT_USB_HOST_HCINT2_XCS_XACT_ERR_E_INACT 0x0
19722 /*
19723  * Enumerated value for register field ALT_USB_HOST_HCINT2_XCS_XACT_ERR
19724  *
19725  * Excessive Transaction Error
19726  */
19727 #define ALT_USB_HOST_HCINT2_XCS_XACT_ERR_E_ACVTIVE 0x1
19728 
19729 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_XCS_XACT_ERR register field. */
19730 #define ALT_USB_HOST_HCINT2_XCS_XACT_ERR_LSB 12
19731 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_XCS_XACT_ERR register field. */
19732 #define ALT_USB_HOST_HCINT2_XCS_XACT_ERR_MSB 12
19733 /* The width in bits of the ALT_USB_HOST_HCINT2_XCS_XACT_ERR register field. */
19734 #define ALT_USB_HOST_HCINT2_XCS_XACT_ERR_WIDTH 1
19735 /* The mask used to set the ALT_USB_HOST_HCINT2_XCS_XACT_ERR register field value. */
19736 #define ALT_USB_HOST_HCINT2_XCS_XACT_ERR_SET_MSK 0x00001000
19737 /* The mask used to clear the ALT_USB_HOST_HCINT2_XCS_XACT_ERR register field value. */
19738 #define ALT_USB_HOST_HCINT2_XCS_XACT_ERR_CLR_MSK 0xffffefff
19739 /* The reset value of the ALT_USB_HOST_HCINT2_XCS_XACT_ERR register field. */
19740 #define ALT_USB_HOST_HCINT2_XCS_XACT_ERR_RESET 0x0
19741 /* Extracts the ALT_USB_HOST_HCINT2_XCS_XACT_ERR field value from a register. */
19742 #define ALT_USB_HOST_HCINT2_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
19743 /* Produces a ALT_USB_HOST_HCINT2_XCS_XACT_ERR register field value suitable for setting the register. */
19744 #define ALT_USB_HOST_HCINT2_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
19745 
19746 /*
19747  * Field : Descriptor rollover interrupt - desc_lst_rollintr
19748  *
19749  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
19750  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
19751  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
19752  * mode, this bit is reserved.
19753  *
19754  * Field Enumeration Values:
19755  *
19756  * Enum | Value | Description
19757  * :----------------------------------------------|:------|:---------------------------------
19758  * ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
19759  * ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
19760  *
19761  * Field Access Macros:
19762  *
19763  */
19764 /*
19765  * Enumerated value for register field ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR
19766  *
19767  * No Descriptor rollover interrupt
19768  */
19769 #define ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR_E_INACT 0x0
19770 /*
19771  * Enumerated value for register field ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR
19772  *
19773  * Descriptor rollover interrupt
19774  */
19775 #define ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR_E_ACT 0x1
19776 
19777 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR register field. */
19778 #define ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR_LSB 13
19779 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR register field. */
19780 #define ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR_MSB 13
19781 /* The width in bits of the ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR register field. */
19782 #define ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR_WIDTH 1
19783 /* The mask used to set the ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR register field value. */
19784 #define ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR_SET_MSK 0x00002000
19785 /* The mask used to clear the ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR register field value. */
19786 #define ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
19787 /* The reset value of the ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR register field. */
19788 #define ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR_RESET 0x0
19789 /* Extracts the ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR field value from a register. */
19790 #define ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
19791 /* Produces a ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR register field value suitable for setting the register. */
19792 #define ALT_USB_HOST_HCINT2_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
19793 
19794 #ifndef __ASSEMBLY__
19795 /*
19796  * WARNING: The C register and register group struct declarations are provided for
19797  * convenience and illustrative purposes. They should, however, be used with
19798  * caution as the C language standard provides no guarantees about the alignment or
19799  * atomicity of device memory accesses. The recommended practice for writing
19800  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
19801  * alt_write_word() functions.
19802  *
19803  * The struct declaration for register ALT_USB_HOST_HCINT2.
19804  */
19805 struct ALT_USB_HOST_HCINT2_s
19806 {
19807  const uint32_t xfercompl : 1; /* Transfer Completed */
19808  const uint32_t chhltd : 1; /* Channel Halted */
19809  const uint32_t ahberr : 1; /* AHB Error */
19810  const uint32_t stall : 1; /* STALL Response Received Interrupt */
19811  const uint32_t nak : 1; /* NAK Response Received Interrupt */
19812  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
19813  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
19814  const uint32_t xacterr : 1; /* Transaction Error */
19815  const uint32_t bblerr : 1; /* Babble Error */
19816  const uint32_t frmovrun : 1; /* Frame Overrun */
19817  const uint32_t datatglerr : 1; /* Data Toggle Error */
19818  const uint32_t bnaintr : 1; /* BNA Interrupt */
19819  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
19820  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
19821  uint32_t : 18; /* *UNDEFINED* */
19822 };
19823 
19824 /* The typedef declaration for register ALT_USB_HOST_HCINT2. */
19825 typedef volatile struct ALT_USB_HOST_HCINT2_s ALT_USB_HOST_HCINT2_t;
19826 #endif /* __ASSEMBLY__ */
19827 
19828 /* The byte offset of the ALT_USB_HOST_HCINT2 register from the beginning of the component. */
19829 #define ALT_USB_HOST_HCINT2_OFST 0x148
19830 /* The address of the ALT_USB_HOST_HCINT2 register. */
19831 #define ALT_USB_HOST_HCINT2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT2_OFST))
19832 
19833 /*
19834  * Register : Host Channel 2 Interrupt Mask Register - hcintmsk2
19835  *
19836  * This register reflects the mask for each channel status described in the
19837  * previous section.
19838  *
19839  * Register Layout
19840  *
19841  * Bits | Access | Reset | Description
19842  * :--------|:-------|:------|:----------------------------------
19843  * [0] | RW | 0x0 | Transfer Completed Mask
19844  * [1] | RW | 0x0 | Channel Halted Mask
19845  * [2] | RW | 0x0 | AHB Error Mask
19846  * [10:3] | ??? | 0x0 | *UNDEFINED*
19847  * [11] | RW | 0x0 | BNA Interrupt mask
19848  * [12] | ??? | 0x0 | *UNDEFINED*
19849  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
19850  * [31:14] | ??? | 0x0 | *UNDEFINED*
19851  *
19852  */
19853 /*
19854  * Field : Transfer Completed Mask - xfercomplmsk
19855  *
19856  * Transfer complete.
19857  *
19858  * Field Enumeration Values:
19859  *
19860  * Enum | Value | Description
19861  * :--------------------------------------------|:------|:------------
19862  * ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK_E_MSK | 0x0 | Mask
19863  * ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
19864  *
19865  * Field Access Macros:
19866  *
19867  */
19868 /*
19869  * Enumerated value for register field ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK
19870  *
19871  * Mask
19872  */
19873 #define ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK_E_MSK 0x0
19874 /*
19875  * Enumerated value for register field ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK
19876  *
19877  * No mask
19878  */
19879 #define ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK_E_NOMSK 0x1
19880 
19881 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK register field. */
19882 #define ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK_LSB 0
19883 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK register field. */
19884 #define ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK_MSB 0
19885 /* The width in bits of the ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK register field. */
19886 #define ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK_WIDTH 1
19887 /* The mask used to set the ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK register field value. */
19888 #define ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK_SET_MSK 0x00000001
19889 /* The mask used to clear the ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK register field value. */
19890 #define ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK_CLR_MSK 0xfffffffe
19891 /* The reset value of the ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK register field. */
19892 #define ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK_RESET 0x0
19893 /* Extracts the ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK field value from a register. */
19894 #define ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
19895 /* Produces a ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK register field value suitable for setting the register. */
19896 #define ALT_USB_HOST_HCINTMSK2_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
19897 
19898 /*
19899  * Field : Channel Halted Mask - chhltdmsk
19900  *
19901  * Channel Halted.
19902  *
19903  * Field Enumeration Values:
19904  *
19905  * Enum | Value | Description
19906  * :-----------------------------------------|:------|:------------
19907  * ALT_USB_HOST_HCINTMSK2_CHHLTDMSK_E_MSK | 0x0 | Mask
19908  * ALT_USB_HOST_HCINTMSK2_CHHLTDMSK_E_NOMSK | 0x1 | No mask
19909  *
19910  * Field Access Macros:
19911  *
19912  */
19913 /*
19914  * Enumerated value for register field ALT_USB_HOST_HCINTMSK2_CHHLTDMSK
19915  *
19916  * Mask
19917  */
19918 #define ALT_USB_HOST_HCINTMSK2_CHHLTDMSK_E_MSK 0x0
19919 /*
19920  * Enumerated value for register field ALT_USB_HOST_HCINTMSK2_CHHLTDMSK
19921  *
19922  * No mask
19923  */
19924 #define ALT_USB_HOST_HCINTMSK2_CHHLTDMSK_E_NOMSK 0x1
19925 
19926 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK2_CHHLTDMSK register field. */
19927 #define ALT_USB_HOST_HCINTMSK2_CHHLTDMSK_LSB 1
19928 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK2_CHHLTDMSK register field. */
19929 #define ALT_USB_HOST_HCINTMSK2_CHHLTDMSK_MSB 1
19930 /* The width in bits of the ALT_USB_HOST_HCINTMSK2_CHHLTDMSK register field. */
19931 #define ALT_USB_HOST_HCINTMSK2_CHHLTDMSK_WIDTH 1
19932 /* The mask used to set the ALT_USB_HOST_HCINTMSK2_CHHLTDMSK register field value. */
19933 #define ALT_USB_HOST_HCINTMSK2_CHHLTDMSK_SET_MSK 0x00000002
19934 /* The mask used to clear the ALT_USB_HOST_HCINTMSK2_CHHLTDMSK register field value. */
19935 #define ALT_USB_HOST_HCINTMSK2_CHHLTDMSK_CLR_MSK 0xfffffffd
19936 /* The reset value of the ALT_USB_HOST_HCINTMSK2_CHHLTDMSK register field. */
19937 #define ALT_USB_HOST_HCINTMSK2_CHHLTDMSK_RESET 0x0
19938 /* Extracts the ALT_USB_HOST_HCINTMSK2_CHHLTDMSK field value from a register. */
19939 #define ALT_USB_HOST_HCINTMSK2_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
19940 /* Produces a ALT_USB_HOST_HCINTMSK2_CHHLTDMSK register field value suitable for setting the register. */
19941 #define ALT_USB_HOST_HCINTMSK2_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
19942 
19943 /*
19944  * Field : AHB Error Mask - ahberrmsk
19945  *
19946  * In scatter/gather DMA mode for host, interrupts will not be generated due to
19947  * the corresponding bits set in HCINTn.
19948  *
19949  * Field Enumeration Values:
19950  *
19951  * Enum | Value | Description
19952  * :-----------------------------------------|:------|:------------
19953  * ALT_USB_HOST_HCINTMSK2_AHBERRMSK_E_MSK | 0x0 | Mask
19954  * ALT_USB_HOST_HCINTMSK2_AHBERRMSK_E_NOMSK | 0x1 | No mask
19955  *
19956  * Field Access Macros:
19957  *
19958  */
19959 /*
19960  * Enumerated value for register field ALT_USB_HOST_HCINTMSK2_AHBERRMSK
19961  *
19962  * Mask
19963  */
19964 #define ALT_USB_HOST_HCINTMSK2_AHBERRMSK_E_MSK 0x0
19965 /*
19966  * Enumerated value for register field ALT_USB_HOST_HCINTMSK2_AHBERRMSK
19967  *
19968  * No mask
19969  */
19970 #define ALT_USB_HOST_HCINTMSK2_AHBERRMSK_E_NOMSK 0x1
19971 
19972 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK2_AHBERRMSK register field. */
19973 #define ALT_USB_HOST_HCINTMSK2_AHBERRMSK_LSB 2
19974 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK2_AHBERRMSK register field. */
19975 #define ALT_USB_HOST_HCINTMSK2_AHBERRMSK_MSB 2
19976 /* The width in bits of the ALT_USB_HOST_HCINTMSK2_AHBERRMSK register field. */
19977 #define ALT_USB_HOST_HCINTMSK2_AHBERRMSK_WIDTH 1
19978 /* The mask used to set the ALT_USB_HOST_HCINTMSK2_AHBERRMSK register field value. */
19979 #define ALT_USB_HOST_HCINTMSK2_AHBERRMSK_SET_MSK 0x00000004
19980 /* The mask used to clear the ALT_USB_HOST_HCINTMSK2_AHBERRMSK register field value. */
19981 #define ALT_USB_HOST_HCINTMSK2_AHBERRMSK_CLR_MSK 0xfffffffb
19982 /* The reset value of the ALT_USB_HOST_HCINTMSK2_AHBERRMSK register field. */
19983 #define ALT_USB_HOST_HCINTMSK2_AHBERRMSK_RESET 0x0
19984 /* Extracts the ALT_USB_HOST_HCINTMSK2_AHBERRMSK field value from a register. */
19985 #define ALT_USB_HOST_HCINTMSK2_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
19986 /* Produces a ALT_USB_HOST_HCINTMSK2_AHBERRMSK register field value suitable for setting the register. */
19987 #define ALT_USB_HOST_HCINTMSK2_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
19988 
19989 /*
19990  * Field : BNA Interrupt mask - bnaintrmsk
19991  *
19992  * This bit is valid only when Scatter/Gather DMA mode is enabled.
19993  *
19994  * Field Enumeration Values:
19995  *
19996  * Enum | Value | Description
19997  * :------------------------------------------|:------|:------------
19998  * ALT_USB_HOST_HCINTMSK2_BNAINTRMSK_E_MSK | 0x0 | Mask
19999  * ALT_USB_HOST_HCINTMSK2_BNAINTRMSK_E_NOMSK | 0x1 | No mask
20000  *
20001  * Field Access Macros:
20002  *
20003  */
20004 /*
20005  * Enumerated value for register field ALT_USB_HOST_HCINTMSK2_BNAINTRMSK
20006  *
20007  * Mask
20008  */
20009 #define ALT_USB_HOST_HCINTMSK2_BNAINTRMSK_E_MSK 0x0
20010 /*
20011  * Enumerated value for register field ALT_USB_HOST_HCINTMSK2_BNAINTRMSK
20012  *
20013  * No mask
20014  */
20015 #define ALT_USB_HOST_HCINTMSK2_BNAINTRMSK_E_NOMSK 0x1
20016 
20017 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK2_BNAINTRMSK register field. */
20018 #define ALT_USB_HOST_HCINTMSK2_BNAINTRMSK_LSB 11
20019 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK2_BNAINTRMSK register field. */
20020 #define ALT_USB_HOST_HCINTMSK2_BNAINTRMSK_MSB 11
20021 /* The width in bits of the ALT_USB_HOST_HCINTMSK2_BNAINTRMSK register field. */
20022 #define ALT_USB_HOST_HCINTMSK2_BNAINTRMSK_WIDTH 1
20023 /* The mask used to set the ALT_USB_HOST_HCINTMSK2_BNAINTRMSK register field value. */
20024 #define ALT_USB_HOST_HCINTMSK2_BNAINTRMSK_SET_MSK 0x00000800
20025 /* The mask used to clear the ALT_USB_HOST_HCINTMSK2_BNAINTRMSK register field value. */
20026 #define ALT_USB_HOST_HCINTMSK2_BNAINTRMSK_CLR_MSK 0xfffff7ff
20027 /* The reset value of the ALT_USB_HOST_HCINTMSK2_BNAINTRMSK register field. */
20028 #define ALT_USB_HOST_HCINTMSK2_BNAINTRMSK_RESET 0x0
20029 /* Extracts the ALT_USB_HOST_HCINTMSK2_BNAINTRMSK field value from a register. */
20030 #define ALT_USB_HOST_HCINTMSK2_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
20031 /* Produces a ALT_USB_HOST_HCINTMSK2_BNAINTRMSK register field value suitable for setting the register. */
20032 #define ALT_USB_HOST_HCINTMSK2_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
20033 
20034 /*
20035  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
20036  *
20037  * This bit is valid only when Scatter/Gather DMA mode is enabled.
20038  *
20039  * Field Enumeration Values:
20040  *
20041  * Enum | Value | Description
20042  * :---------------------------------------------------|:------|:------------
20043  * ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
20044  * ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
20045  *
20046  * Field Access Macros:
20047  *
20048  */
20049 /*
20050  * Enumerated value for register field ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK
20051  *
20052  * Mask
20053  */
20054 #define ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK_E_MSK 0x0
20055 /*
20056  * Enumerated value for register field ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK
20057  *
20058  * No mask
20059  */
20060 #define ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
20061 
20062 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK register field. */
20063 #define ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK_LSB 13
20064 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK register field. */
20065 #define ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK_MSB 13
20066 /* The width in bits of the ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK register field. */
20067 #define ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK_WIDTH 1
20068 /* The mask used to set the ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK register field value. */
20069 #define ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
20070 /* The mask used to clear the ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK register field value. */
20071 #define ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
20072 /* The reset value of the ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK register field. */
20073 #define ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK_RESET 0x0
20074 /* Extracts the ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK field value from a register. */
20075 #define ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
20076 /* Produces a ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
20077 #define ALT_USB_HOST_HCINTMSK2_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
20078 
20079 #ifndef __ASSEMBLY__
20080 /*
20081  * WARNING: The C register and register group struct declarations are provided for
20082  * convenience and illustrative purposes. They should, however, be used with
20083  * caution as the C language standard provides no guarantees about the alignment or
20084  * atomicity of device memory accesses. The recommended practice for writing
20085  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
20086  * alt_write_word() functions.
20087  *
20088  * The struct declaration for register ALT_USB_HOST_HCINTMSK2.
20089  */
20090 struct ALT_USB_HOST_HCINTMSK2_s
20091 {
20092  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
20093  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
20094  uint32_t ahberrmsk : 1; /* AHB Error Mask */
20095  uint32_t : 8; /* *UNDEFINED* */
20096  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
20097  uint32_t : 1; /* *UNDEFINED* */
20098  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
20099  uint32_t : 18; /* *UNDEFINED* */
20100 };
20101 
20102 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK2. */
20103 typedef volatile struct ALT_USB_HOST_HCINTMSK2_s ALT_USB_HOST_HCINTMSK2_t;
20104 #endif /* __ASSEMBLY__ */
20105 
20106 /* The byte offset of the ALT_USB_HOST_HCINTMSK2 register from the beginning of the component. */
20107 #define ALT_USB_HOST_HCINTMSK2_OFST 0x14c
20108 /* The address of the ALT_USB_HOST_HCINTMSK2 register. */
20109 #define ALT_USB_HOST_HCINTMSK2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK2_OFST))
20110 
20111 /*
20112  * Register : Host Channel 2 Transfer Size Register - hctsiz2
20113  *
20114  * Buffer DMA Mode.
20115  *
20116  * Register Layout
20117  *
20118  * Bits | Access | Reset | Description
20119  * :--------|:-------|:------|:--------------
20120  * [18:0] | RW | 0x0 | Transfer Size
20121  * [28:19] | RW | 0x0 | Packet Count
20122  * [30:29] | RW | 0x0 | PID
20123  * [31] | RW | 0x0 | Do Ping
20124  *
20125  */
20126 /*
20127  * Field : Transfer Size - xfersize
20128  *
20129  * for an OUT, this field is the number of data bytes the host sends during the
20130  * transfer. for an IN, this field is the buffer size that the application has
20131  * Reserved for the transfer. The application is expected to program this field as
20132  * an integer multiple of the maximum packet size for IN transactions (periodic and
20133  * non-periodic).The width of this counter is specified as 19 bits.
20134  *
20135  * Field Access Macros:
20136  *
20137  */
20138 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ2_XFERSIZE register field. */
20139 #define ALT_USB_HOST_HCTSIZ2_XFERSIZE_LSB 0
20140 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ2_XFERSIZE register field. */
20141 #define ALT_USB_HOST_HCTSIZ2_XFERSIZE_MSB 18
20142 /* The width in bits of the ALT_USB_HOST_HCTSIZ2_XFERSIZE register field. */
20143 #define ALT_USB_HOST_HCTSIZ2_XFERSIZE_WIDTH 19
20144 /* The mask used to set the ALT_USB_HOST_HCTSIZ2_XFERSIZE register field value. */
20145 #define ALT_USB_HOST_HCTSIZ2_XFERSIZE_SET_MSK 0x0007ffff
20146 /* The mask used to clear the ALT_USB_HOST_HCTSIZ2_XFERSIZE register field value. */
20147 #define ALT_USB_HOST_HCTSIZ2_XFERSIZE_CLR_MSK 0xfff80000
20148 /* The reset value of the ALT_USB_HOST_HCTSIZ2_XFERSIZE register field. */
20149 #define ALT_USB_HOST_HCTSIZ2_XFERSIZE_RESET 0x0
20150 /* Extracts the ALT_USB_HOST_HCTSIZ2_XFERSIZE field value from a register. */
20151 #define ALT_USB_HOST_HCTSIZ2_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
20152 /* Produces a ALT_USB_HOST_HCTSIZ2_XFERSIZE register field value suitable for setting the register. */
20153 #define ALT_USB_HOST_HCTSIZ2_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
20154 
20155 /*
20156  * Field : Packet Count - pktcnt
20157  *
20158  * This field is programmed by the application with the expected number of packets
20159  * to be transmitted (OUT) or received (IN). The host decrements this count on
20160  * every successful transmission or reception of an OUT/IN packet. Once this count
20161  * reaches zero, the application is interrupted to indicate normal completion. The
20162  * width of this counter is specified as 10 bits.
20163  *
20164  * Field Access Macros:
20165  *
20166  */
20167 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ2_PKTCNT register field. */
20168 #define ALT_USB_HOST_HCTSIZ2_PKTCNT_LSB 19
20169 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ2_PKTCNT register field. */
20170 #define ALT_USB_HOST_HCTSIZ2_PKTCNT_MSB 28
20171 /* The width in bits of the ALT_USB_HOST_HCTSIZ2_PKTCNT register field. */
20172 #define ALT_USB_HOST_HCTSIZ2_PKTCNT_WIDTH 10
20173 /* The mask used to set the ALT_USB_HOST_HCTSIZ2_PKTCNT register field value. */
20174 #define ALT_USB_HOST_HCTSIZ2_PKTCNT_SET_MSK 0x1ff80000
20175 /* The mask used to clear the ALT_USB_HOST_HCTSIZ2_PKTCNT register field value. */
20176 #define ALT_USB_HOST_HCTSIZ2_PKTCNT_CLR_MSK 0xe007ffff
20177 /* The reset value of the ALT_USB_HOST_HCTSIZ2_PKTCNT register field. */
20178 #define ALT_USB_HOST_HCTSIZ2_PKTCNT_RESET 0x0
20179 /* Extracts the ALT_USB_HOST_HCTSIZ2_PKTCNT field value from a register. */
20180 #define ALT_USB_HOST_HCTSIZ2_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
20181 /* Produces a ALT_USB_HOST_HCTSIZ2_PKTCNT register field value suitable for setting the register. */
20182 #define ALT_USB_HOST_HCTSIZ2_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
20183 
20184 /*
20185  * Field : PID - pid
20186  *
20187  * The application programs this field with the type of PID to use forthe initial
20188  * transaction. The host maintains this field for the rest of the transfer.
20189  *
20190  * Field Enumeration Values:
20191  *
20192  * Enum | Value | Description
20193  * :---------------------------------|:------|:------------------------------------
20194  * ALT_USB_HOST_HCTSIZ2_PID_E_DATA0 | 0x0 | DATA0
20195  * ALT_USB_HOST_HCTSIZ2_PID_E_DATA2 | 0x1 | DATA2
20196  * ALT_USB_HOST_HCTSIZ2_PID_E_DATA1 | 0x2 | DATA1
20197  * ALT_USB_HOST_HCTSIZ2_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
20198  *
20199  * Field Access Macros:
20200  *
20201  */
20202 /*
20203  * Enumerated value for register field ALT_USB_HOST_HCTSIZ2_PID
20204  *
20205  * DATA0
20206  */
20207 #define ALT_USB_HOST_HCTSIZ2_PID_E_DATA0 0x0
20208 /*
20209  * Enumerated value for register field ALT_USB_HOST_HCTSIZ2_PID
20210  *
20211  * DATA2
20212  */
20213 #define ALT_USB_HOST_HCTSIZ2_PID_E_DATA2 0x1
20214 /*
20215  * Enumerated value for register field ALT_USB_HOST_HCTSIZ2_PID
20216  *
20217  * DATA1
20218  */
20219 #define ALT_USB_HOST_HCTSIZ2_PID_E_DATA1 0x2
20220 /*
20221  * Enumerated value for register field ALT_USB_HOST_HCTSIZ2_PID
20222  *
20223  * MDATA (non-control)/SETUP (control)
20224  */
20225 #define ALT_USB_HOST_HCTSIZ2_PID_E_MDATA 0x3
20226 
20227 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ2_PID register field. */
20228 #define ALT_USB_HOST_HCTSIZ2_PID_LSB 29
20229 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ2_PID register field. */
20230 #define ALT_USB_HOST_HCTSIZ2_PID_MSB 30
20231 /* The width in bits of the ALT_USB_HOST_HCTSIZ2_PID register field. */
20232 #define ALT_USB_HOST_HCTSIZ2_PID_WIDTH 2
20233 /* The mask used to set the ALT_USB_HOST_HCTSIZ2_PID register field value. */
20234 #define ALT_USB_HOST_HCTSIZ2_PID_SET_MSK 0x60000000
20235 /* The mask used to clear the ALT_USB_HOST_HCTSIZ2_PID register field value. */
20236 #define ALT_USB_HOST_HCTSIZ2_PID_CLR_MSK 0x9fffffff
20237 /* The reset value of the ALT_USB_HOST_HCTSIZ2_PID register field. */
20238 #define ALT_USB_HOST_HCTSIZ2_PID_RESET 0x0
20239 /* Extracts the ALT_USB_HOST_HCTSIZ2_PID field value from a register. */
20240 #define ALT_USB_HOST_HCTSIZ2_PID_GET(value) (((value) & 0x60000000) >> 29)
20241 /* Produces a ALT_USB_HOST_HCTSIZ2_PID register field value suitable for setting the register. */
20242 #define ALT_USB_HOST_HCTSIZ2_PID_SET(value) (((value) << 29) & 0x60000000)
20243 
20244 /*
20245  * Field : Do Ping - dopng
20246  *
20247  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
20248  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
20249  * for IN transfers it disables the channel.
20250  *
20251  * Field Enumeration Values:
20252  *
20253  * Enum | Value | Description
20254  * :------------------------------------|:------|:-----------------
20255  * ALT_USB_HOST_HCTSIZ2_DOPNG_E_NOPING | 0x0 | No ping protocol
20256  * ALT_USB_HOST_HCTSIZ2_DOPNG_E_PING | 0x1 | Ping protocol
20257  *
20258  * Field Access Macros:
20259  *
20260  */
20261 /*
20262  * Enumerated value for register field ALT_USB_HOST_HCTSIZ2_DOPNG
20263  *
20264  * No ping protocol
20265  */
20266 #define ALT_USB_HOST_HCTSIZ2_DOPNG_E_NOPING 0x0
20267 /*
20268  * Enumerated value for register field ALT_USB_HOST_HCTSIZ2_DOPNG
20269  *
20270  * Ping protocol
20271  */
20272 #define ALT_USB_HOST_HCTSIZ2_DOPNG_E_PING 0x1
20273 
20274 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ2_DOPNG register field. */
20275 #define ALT_USB_HOST_HCTSIZ2_DOPNG_LSB 31
20276 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ2_DOPNG register field. */
20277 #define ALT_USB_HOST_HCTSIZ2_DOPNG_MSB 31
20278 /* The width in bits of the ALT_USB_HOST_HCTSIZ2_DOPNG register field. */
20279 #define ALT_USB_HOST_HCTSIZ2_DOPNG_WIDTH 1
20280 /* The mask used to set the ALT_USB_HOST_HCTSIZ2_DOPNG register field value. */
20281 #define ALT_USB_HOST_HCTSIZ2_DOPNG_SET_MSK 0x80000000
20282 /* The mask used to clear the ALT_USB_HOST_HCTSIZ2_DOPNG register field value. */
20283 #define ALT_USB_HOST_HCTSIZ2_DOPNG_CLR_MSK 0x7fffffff
20284 /* The reset value of the ALT_USB_HOST_HCTSIZ2_DOPNG register field. */
20285 #define ALT_USB_HOST_HCTSIZ2_DOPNG_RESET 0x0
20286 /* Extracts the ALT_USB_HOST_HCTSIZ2_DOPNG field value from a register. */
20287 #define ALT_USB_HOST_HCTSIZ2_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
20288 /* Produces a ALT_USB_HOST_HCTSIZ2_DOPNG register field value suitable for setting the register. */
20289 #define ALT_USB_HOST_HCTSIZ2_DOPNG_SET(value) (((value) << 31) & 0x80000000)
20290 
20291 #ifndef __ASSEMBLY__
20292 /*
20293  * WARNING: The C register and register group struct declarations are provided for
20294  * convenience and illustrative purposes. They should, however, be used with
20295  * caution as the C language standard provides no guarantees about the alignment or
20296  * atomicity of device memory accesses. The recommended practice for writing
20297  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
20298  * alt_write_word() functions.
20299  *
20300  * The struct declaration for register ALT_USB_HOST_HCTSIZ2.
20301  */
20302 struct ALT_USB_HOST_HCTSIZ2_s
20303 {
20304  uint32_t xfersize : 19; /* Transfer Size */
20305  uint32_t pktcnt : 10; /* Packet Count */
20306  uint32_t pid : 2; /* PID */
20307  uint32_t dopng : 1; /* Do Ping */
20308 };
20309 
20310 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ2. */
20311 typedef volatile struct ALT_USB_HOST_HCTSIZ2_s ALT_USB_HOST_HCTSIZ2_t;
20312 #endif /* __ASSEMBLY__ */
20313 
20314 /* The byte offset of the ALT_USB_HOST_HCTSIZ2 register from the beginning of the component. */
20315 #define ALT_USB_HOST_HCTSIZ2_OFST 0x150
20316 /* The address of the ALT_USB_HOST_HCTSIZ2 register. */
20317 #define ALT_USB_HOST_HCTSIZ2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ2_OFST))
20318 
20319 /*
20320  * Register : Host Channel 2 DMA Address Register - hcdma2
20321  *
20322  * This register is used by the OTG host in the internal DMA mode to maintain the
20323  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
20324  * DWORD-aligned.
20325  *
20326  * Register Layout
20327  *
20328  * Bits | Access | Reset | Description
20329  * :-------|:-------|:------|:------------
20330  * [31:0] | RW | 0x0 | DMA Address
20331  *
20332  */
20333 /*
20334  * Field : DMA Address - hcdma2
20335  *
20336  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
20337  * first descriptor in the list should be located in this address. The first
20338  * descriptor may be or may not be ready. The core starts processing the list from
20339  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
20340  * in which the isochronous descriptors are present where N is based on nTD as per
20341  * Table below
20342  *
20343  * [31:N] Base Address [N-1:3] Offset [2:0] 000
20344  *
20345  * HS ISOC FS ISOC
20346  *
20347  * nTD N nTD N
20348  *
20349  * 7 6 1 4
20350  *
20351  * 15 7 3 5
20352  *
20353  * 31 8 7 6
20354  *
20355  * 63 9 15 7
20356  *
20357  * 127 10 31 8
20358  *
20359  * 255 11 63 9
20360  *
20361  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
20362  * This value is in terms of number of descriptors. The values can be from 0 to 63.
20363  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
20364  * descriptor processed in the list. This field is updated both by application and
20365  * the core. for example, if the application enables the channel after programming
20366  * CTD=5, then the core will start processing the 6th descriptor. The address is
20367  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
20368  * CTD for isochronous is based on the current frame/microframe value. Need to be
20369  * set to zero by application.
20370  *
20371  * Field Access Macros:
20372  *
20373  */
20374 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA2_HCDMA2 register field. */
20375 #define ALT_USB_HOST_HCDMA2_HCDMA2_LSB 0
20376 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA2_HCDMA2 register field. */
20377 #define ALT_USB_HOST_HCDMA2_HCDMA2_MSB 31
20378 /* The width in bits of the ALT_USB_HOST_HCDMA2_HCDMA2 register field. */
20379 #define ALT_USB_HOST_HCDMA2_HCDMA2_WIDTH 32
20380 /* The mask used to set the ALT_USB_HOST_HCDMA2_HCDMA2 register field value. */
20381 #define ALT_USB_HOST_HCDMA2_HCDMA2_SET_MSK 0xffffffff
20382 /* The mask used to clear the ALT_USB_HOST_HCDMA2_HCDMA2 register field value. */
20383 #define ALT_USB_HOST_HCDMA2_HCDMA2_CLR_MSK 0x00000000
20384 /* The reset value of the ALT_USB_HOST_HCDMA2_HCDMA2 register field. */
20385 #define ALT_USB_HOST_HCDMA2_HCDMA2_RESET 0x0
20386 /* Extracts the ALT_USB_HOST_HCDMA2_HCDMA2 field value from a register. */
20387 #define ALT_USB_HOST_HCDMA2_HCDMA2_GET(value) (((value) & 0xffffffff) >> 0)
20388 /* Produces a ALT_USB_HOST_HCDMA2_HCDMA2 register field value suitable for setting the register. */
20389 #define ALT_USB_HOST_HCDMA2_HCDMA2_SET(value) (((value) << 0) & 0xffffffff)
20390 
20391 #ifndef __ASSEMBLY__
20392 /*
20393  * WARNING: The C register and register group struct declarations are provided for
20394  * convenience and illustrative purposes. They should, however, be used with
20395  * caution as the C language standard provides no guarantees about the alignment or
20396  * atomicity of device memory accesses. The recommended practice for writing
20397  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
20398  * alt_write_word() functions.
20399  *
20400  * The struct declaration for register ALT_USB_HOST_HCDMA2.
20401  */
20402 struct ALT_USB_HOST_HCDMA2_s
20403 {
20404  uint32_t hcdma2 : 32; /* DMA Address */
20405 };
20406 
20407 /* The typedef declaration for register ALT_USB_HOST_HCDMA2. */
20408 typedef volatile struct ALT_USB_HOST_HCDMA2_s ALT_USB_HOST_HCDMA2_t;
20409 #endif /* __ASSEMBLY__ */
20410 
20411 /* The byte offset of the ALT_USB_HOST_HCDMA2 register from the beginning of the component. */
20412 #define ALT_USB_HOST_HCDMA2_OFST 0x154
20413 /* The address of the ALT_USB_HOST_HCDMA2 register. */
20414 #define ALT_USB_HOST_HCDMA2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA2_OFST))
20415 
20416 /*
20417  * Register : Host Channel 2 DMA Buffer Address Register - hcdmab2
20418  *
20419  * These registers are present only in case of Scatter/Gather DMA. These
20420  * registers are implemented in RAM instead of flop-based implementation. Holds
20421  * the current buffer address. This register is updated as and when the
20422  * data transfer for the corresponding end point is in progress. This
20423  * register is present only in Scatter/Gather DMA mode. Otherwise this field
20424  * is reserved.
20425  *
20426  * Register Layout
20427  *
20428  * Bits | Access | Reset | Description
20429  * :-------|:-------|:------|:----------------------------------
20430  * [31:0] | RW | 0x0 | Host Channel 2 DMA Buffer Address
20431  *
20432  */
20433 /*
20434  * Field : Host Channel 2 DMA Buffer Address - hcdmab2
20435  *
20436  * These registers are present only in case of Scatter/Gather DMA. These
20437  * registers are implemented in RAM instead of flop-based implementation. Holds
20438  * the current buffer address. This register is updated as and when the data
20439  * transfer for the corresponding end point is in progress. This register is
20440  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
20441  *
20442  * Field Access Macros:
20443  *
20444  */
20445 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB2_HCDMAB2 register field. */
20446 #define ALT_USB_HOST_HCDMAB2_HCDMAB2_LSB 0
20447 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB2_HCDMAB2 register field. */
20448 #define ALT_USB_HOST_HCDMAB2_HCDMAB2_MSB 31
20449 /* The width in bits of the ALT_USB_HOST_HCDMAB2_HCDMAB2 register field. */
20450 #define ALT_USB_HOST_HCDMAB2_HCDMAB2_WIDTH 32
20451 /* The mask used to set the ALT_USB_HOST_HCDMAB2_HCDMAB2 register field value. */
20452 #define ALT_USB_HOST_HCDMAB2_HCDMAB2_SET_MSK 0xffffffff
20453 /* The mask used to clear the ALT_USB_HOST_HCDMAB2_HCDMAB2 register field value. */
20454 #define ALT_USB_HOST_HCDMAB2_HCDMAB2_CLR_MSK 0x00000000
20455 /* The reset value of the ALT_USB_HOST_HCDMAB2_HCDMAB2 register field. */
20456 #define ALT_USB_HOST_HCDMAB2_HCDMAB2_RESET 0x0
20457 /* Extracts the ALT_USB_HOST_HCDMAB2_HCDMAB2 field value from a register. */
20458 #define ALT_USB_HOST_HCDMAB2_HCDMAB2_GET(value) (((value) & 0xffffffff) >> 0)
20459 /* Produces a ALT_USB_HOST_HCDMAB2_HCDMAB2 register field value suitable for setting the register. */
20460 #define ALT_USB_HOST_HCDMAB2_HCDMAB2_SET(value) (((value) << 0) & 0xffffffff)
20461 
20462 #ifndef __ASSEMBLY__
20463 /*
20464  * WARNING: The C register and register group struct declarations are provided for
20465  * convenience and illustrative purposes. They should, however, be used with
20466  * caution as the C language standard provides no guarantees about the alignment or
20467  * atomicity of device memory accesses. The recommended practice for writing
20468  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
20469  * alt_write_word() functions.
20470  *
20471  * The struct declaration for register ALT_USB_HOST_HCDMAB2.
20472  */
20473 struct ALT_USB_HOST_HCDMAB2_s
20474 {
20475  uint32_t hcdmab2 : 32; /* Host Channel 2 DMA Buffer Address */
20476 };
20477 
20478 /* The typedef declaration for register ALT_USB_HOST_HCDMAB2. */
20479 typedef volatile struct ALT_USB_HOST_HCDMAB2_s ALT_USB_HOST_HCDMAB2_t;
20480 #endif /* __ASSEMBLY__ */
20481 
20482 /* The byte offset of the ALT_USB_HOST_HCDMAB2 register from the beginning of the component. */
20483 #define ALT_USB_HOST_HCDMAB2_OFST 0x158
20484 /* The address of the ALT_USB_HOST_HCDMAB2 register. */
20485 #define ALT_USB_HOST_HCDMAB2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB2_OFST))
20486 
20487 /*
20488  * Register : Host Channel 3 Characteristics Register - hcchar3
20489  *
20490  * Channel_number: 3.
20491  *
20492  * Register Layout
20493  *
20494  * Bits | Access | Reset | Description
20495  * :--------|:-------|:------|:------------------------
20496  * [10:0] | RW | 0x0 | Maximum Packet Size
20497  * [14:11] | RW | 0x0 | Endpoint Number
20498  * [15] | RW | 0x0 | Endpoint Direction
20499  * [16] | ??? | 0x0 | *UNDEFINED*
20500  * [17] | RW | 0x0 | Low-Speed Device
20501  * [19:18] | RW | 0x0 | Endpoint Type
20502  * [21:20] | RW | 0x0 | Multi Count Error Count
20503  * [28:22] | RW | 0x0 | Device Address
20504  * [29] | ??? | 0x0 | *UNDEFINED*
20505  * [30] | R | 0x0 | Channel Disable
20506  * [31] | R | 0x0 | Channel Enable
20507  *
20508  */
20509 /*
20510  * Field : Maximum Packet Size - mps
20511  *
20512  * Indicates the maximum packet size of the associated endpoint.
20513  *
20514  * Field Access Macros:
20515  *
20516  */
20517 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_MPS register field. */
20518 #define ALT_USB_HOST_HCCHAR3_MPS_LSB 0
20519 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_MPS register field. */
20520 #define ALT_USB_HOST_HCCHAR3_MPS_MSB 10
20521 /* The width in bits of the ALT_USB_HOST_HCCHAR3_MPS register field. */
20522 #define ALT_USB_HOST_HCCHAR3_MPS_WIDTH 11
20523 /* The mask used to set the ALT_USB_HOST_HCCHAR3_MPS register field value. */
20524 #define ALT_USB_HOST_HCCHAR3_MPS_SET_MSK 0x000007ff
20525 /* The mask used to clear the ALT_USB_HOST_HCCHAR3_MPS register field value. */
20526 #define ALT_USB_HOST_HCCHAR3_MPS_CLR_MSK 0xfffff800
20527 /* The reset value of the ALT_USB_HOST_HCCHAR3_MPS register field. */
20528 #define ALT_USB_HOST_HCCHAR3_MPS_RESET 0x0
20529 /* Extracts the ALT_USB_HOST_HCCHAR3_MPS field value from a register. */
20530 #define ALT_USB_HOST_HCCHAR3_MPS_GET(value) (((value) & 0x000007ff) >> 0)
20531 /* Produces a ALT_USB_HOST_HCCHAR3_MPS register field value suitable for setting the register. */
20532 #define ALT_USB_HOST_HCCHAR3_MPS_SET(value) (((value) << 0) & 0x000007ff)
20533 
20534 /*
20535  * Field : Endpoint Number - epnum
20536  *
20537  * Indicates the endpoint number on the device serving as the data source or sink.
20538  *
20539  * Field Enumeration Values:
20540  *
20541  * Enum | Value | Description
20542  * :-------------------------------------|:------|:--------------
20543  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT0 | 0x0 | End point 0
20544  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT1 | 0x1 | End point 1
20545  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT2 | 0x2 | End point 2
20546  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT3 | 0x3 | End point 3
20547  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT4 | 0x4 | End point 4
20548  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT5 | 0x5 | End point 5
20549  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT6 | 0x6 | End point 6
20550  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT7 | 0x7 | End point 7
20551  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT8 | 0x8 | End point 8
20552  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT9 | 0x9 | End point 9
20553  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT10 | 0xa | End point 10
20554  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT11 | 0xb | End point 11
20555  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT12 | 0xc | End point 12
20556  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT13 | 0xd | End point 13
20557  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT14 | 0xe | End point 14
20558  * ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT15 | 0xf | End point 15
20559  *
20560  * Field Access Macros:
20561  *
20562  */
20563 /*
20564  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20565  *
20566  * End point 0
20567  */
20568 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT0 0x0
20569 /*
20570  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20571  *
20572  * End point 1
20573  */
20574 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT1 0x1
20575 /*
20576  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20577  *
20578  * End point 2
20579  */
20580 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT2 0x2
20581 /*
20582  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20583  *
20584  * End point 3
20585  */
20586 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT3 0x3
20587 /*
20588  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20589  *
20590  * End point 4
20591  */
20592 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT4 0x4
20593 /*
20594  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20595  *
20596  * End point 5
20597  */
20598 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT5 0x5
20599 /*
20600  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20601  *
20602  * End point 6
20603  */
20604 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT6 0x6
20605 /*
20606  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20607  *
20608  * End point 7
20609  */
20610 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT7 0x7
20611 /*
20612  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20613  *
20614  * End point 8
20615  */
20616 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT8 0x8
20617 /*
20618  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20619  *
20620  * End point 9
20621  */
20622 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT9 0x9
20623 /*
20624  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20625  *
20626  * End point 10
20627  */
20628 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT10 0xa
20629 /*
20630  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20631  *
20632  * End point 11
20633  */
20634 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT11 0xb
20635 /*
20636  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20637  *
20638  * End point 12
20639  */
20640 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT12 0xc
20641 /*
20642  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20643  *
20644  * End point 13
20645  */
20646 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT13 0xd
20647 /*
20648  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20649  *
20650  * End point 14
20651  */
20652 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT14 0xe
20653 /*
20654  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
20655  *
20656  * End point 15
20657  */
20658 #define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT15 0xf
20659 
20660 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_EPNUM register field. */
20661 #define ALT_USB_HOST_HCCHAR3_EPNUM_LSB 11
20662 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_EPNUM register field. */
20663 #define ALT_USB_HOST_HCCHAR3_EPNUM_MSB 14
20664 /* The width in bits of the ALT_USB_HOST_HCCHAR3_EPNUM register field. */
20665 #define ALT_USB_HOST_HCCHAR3_EPNUM_WIDTH 4
20666 /* The mask used to set the ALT_USB_HOST_HCCHAR3_EPNUM register field value. */
20667 #define ALT_USB_HOST_HCCHAR3_EPNUM_SET_MSK 0x00007800
20668 /* The mask used to clear the ALT_USB_HOST_HCCHAR3_EPNUM register field value. */
20669 #define ALT_USB_HOST_HCCHAR3_EPNUM_CLR_MSK 0xffff87ff
20670 /* The reset value of the ALT_USB_HOST_HCCHAR3_EPNUM register field. */
20671 #define ALT_USB_HOST_HCCHAR3_EPNUM_RESET 0x0
20672 /* Extracts the ALT_USB_HOST_HCCHAR3_EPNUM field value from a register. */
20673 #define ALT_USB_HOST_HCCHAR3_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
20674 /* Produces a ALT_USB_HOST_HCCHAR3_EPNUM register field value suitable for setting the register. */
20675 #define ALT_USB_HOST_HCCHAR3_EPNUM_SET(value) (((value) << 11) & 0x00007800)
20676 
20677 /*
20678  * Field : Endpoint Direction - epdir
20679  *
20680  * Indicates whether the transaction is IN or OUT.
20681  *
20682  * Field Enumeration Values:
20683  *
20684  * Enum | Value | Description
20685  * :------------------------------------|:------|:------------
20686  * ALT_USB_HOST_HCCHAR3_EPDIR_E_OUTDIR | 0x0 | OUT
20687  * ALT_USB_HOST_HCCHAR3_EPDIR_E_INDIR | 0x1 | IN
20688  *
20689  * Field Access Macros:
20690  *
20691  */
20692 /*
20693  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPDIR
20694  *
20695  * OUT
20696  */
20697 #define ALT_USB_HOST_HCCHAR3_EPDIR_E_OUTDIR 0x0
20698 /*
20699  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPDIR
20700  *
20701  * IN
20702  */
20703 #define ALT_USB_HOST_HCCHAR3_EPDIR_E_INDIR 0x1
20704 
20705 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_EPDIR register field. */
20706 #define ALT_USB_HOST_HCCHAR3_EPDIR_LSB 15
20707 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_EPDIR register field. */
20708 #define ALT_USB_HOST_HCCHAR3_EPDIR_MSB 15
20709 /* The width in bits of the ALT_USB_HOST_HCCHAR3_EPDIR register field. */
20710 #define ALT_USB_HOST_HCCHAR3_EPDIR_WIDTH 1
20711 /* The mask used to set the ALT_USB_HOST_HCCHAR3_EPDIR register field value. */
20712 #define ALT_USB_HOST_HCCHAR3_EPDIR_SET_MSK 0x00008000
20713 /* The mask used to clear the ALT_USB_HOST_HCCHAR3_EPDIR register field value. */
20714 #define ALT_USB_HOST_HCCHAR3_EPDIR_CLR_MSK 0xffff7fff
20715 /* The reset value of the ALT_USB_HOST_HCCHAR3_EPDIR register field. */
20716 #define ALT_USB_HOST_HCCHAR3_EPDIR_RESET 0x0
20717 /* Extracts the ALT_USB_HOST_HCCHAR3_EPDIR field value from a register. */
20718 #define ALT_USB_HOST_HCCHAR3_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
20719 /* Produces a ALT_USB_HOST_HCCHAR3_EPDIR register field value suitable for setting the register. */
20720 #define ALT_USB_HOST_HCCHAR3_EPDIR_SET(value) (((value) << 15) & 0x00008000)
20721 
20722 /*
20723  * Field : Low-Speed Device - lspddev
20724  *
20725  * This field is Set by the application to indicate that this channel is
20726  * communicating to a low-speed device. The application must program this bit when
20727  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
20728  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
20729  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
20730  * core ignores this bit even if it is set by the application software.
20731  *
20732  * Field Enumeration Values:
20733  *
20734  * Enum | Value | Description
20735  * :-------------------------------------------|:------|:--------------------------------
20736  * ALT_USB_HOST_HCCHAR3_LSPDDEV_E_NONLOWSPEED | 0x0 | Communicating with non lowspeed
20737  * ALT_USB_HOST_HCCHAR3_LSPDDEV_E_LOWSPEED | 0x1 | Communicating with lowspeed
20738  *
20739  * Field Access Macros:
20740  *
20741  */
20742 /*
20743  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_LSPDDEV
20744  *
20745  * Communicating with non lowspeed
20746  */
20747 #define ALT_USB_HOST_HCCHAR3_LSPDDEV_E_NONLOWSPEED 0x0
20748 /*
20749  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_LSPDDEV
20750  *
20751  * Communicating with lowspeed
20752  */
20753 #define ALT_USB_HOST_HCCHAR3_LSPDDEV_E_LOWSPEED 0x1
20754 
20755 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_LSPDDEV register field. */
20756 #define ALT_USB_HOST_HCCHAR3_LSPDDEV_LSB 17
20757 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_LSPDDEV register field. */
20758 #define ALT_USB_HOST_HCCHAR3_LSPDDEV_MSB 17
20759 /* The width in bits of the ALT_USB_HOST_HCCHAR3_LSPDDEV register field. */
20760 #define ALT_USB_HOST_HCCHAR3_LSPDDEV_WIDTH 1
20761 /* The mask used to set the ALT_USB_HOST_HCCHAR3_LSPDDEV register field value. */
20762 #define ALT_USB_HOST_HCCHAR3_LSPDDEV_SET_MSK 0x00020000
20763 /* The mask used to clear the ALT_USB_HOST_HCCHAR3_LSPDDEV register field value. */
20764 #define ALT_USB_HOST_HCCHAR3_LSPDDEV_CLR_MSK 0xfffdffff
20765 /* The reset value of the ALT_USB_HOST_HCCHAR3_LSPDDEV register field. */
20766 #define ALT_USB_HOST_HCCHAR3_LSPDDEV_RESET 0x0
20767 /* Extracts the ALT_USB_HOST_HCCHAR3_LSPDDEV field value from a register. */
20768 #define ALT_USB_HOST_HCCHAR3_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
20769 /* Produces a ALT_USB_HOST_HCCHAR3_LSPDDEV register field value suitable for setting the register. */
20770 #define ALT_USB_HOST_HCCHAR3_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
20771 
20772 /*
20773  * Field : Endpoint Type - eptype
20774  *
20775  * Indicates the transfer type selected.
20776  *
20777  * Field Enumeration Values:
20778  *
20779  * Enum | Value | Description
20780  * :-------------------------------------|:------|:------------
20781  * ALT_USB_HOST_HCCHAR3_EPTYPE_E_CTL | 0x0 | Control
20782  * ALT_USB_HOST_HCCHAR3_EPTYPE_E_ISOC | 0x1 | Isochronous
20783  * ALT_USB_HOST_HCCHAR3_EPTYPE_E_BULK | 0x2 | Bulk
20784  * ALT_USB_HOST_HCCHAR3_EPTYPE_E_INTERR | 0x3 | Interrupt
20785  *
20786  * Field Access Macros:
20787  *
20788  */
20789 /*
20790  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPTYPE
20791  *
20792  * Control
20793  */
20794 #define ALT_USB_HOST_HCCHAR3_EPTYPE_E_CTL 0x0
20795 /*
20796  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPTYPE
20797  *
20798  * Isochronous
20799  */
20800 #define ALT_USB_HOST_HCCHAR3_EPTYPE_E_ISOC 0x1
20801 /*
20802  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPTYPE
20803  *
20804  * Bulk
20805  */
20806 #define ALT_USB_HOST_HCCHAR3_EPTYPE_E_BULK 0x2
20807 /*
20808  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPTYPE
20809  *
20810  * Interrupt
20811  */
20812 #define ALT_USB_HOST_HCCHAR3_EPTYPE_E_INTERR 0x3
20813 
20814 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_EPTYPE register field. */
20815 #define ALT_USB_HOST_HCCHAR3_EPTYPE_LSB 18
20816 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_EPTYPE register field. */
20817 #define ALT_USB_HOST_HCCHAR3_EPTYPE_MSB 19
20818 /* The width in bits of the ALT_USB_HOST_HCCHAR3_EPTYPE register field. */
20819 #define ALT_USB_HOST_HCCHAR3_EPTYPE_WIDTH 2
20820 /* The mask used to set the ALT_USB_HOST_HCCHAR3_EPTYPE register field value. */
20821 #define ALT_USB_HOST_HCCHAR3_EPTYPE_SET_MSK 0x000c0000
20822 /* The mask used to clear the ALT_USB_HOST_HCCHAR3_EPTYPE register field value. */
20823 #define ALT_USB_HOST_HCCHAR3_EPTYPE_CLR_MSK 0xfff3ffff
20824 /* The reset value of the ALT_USB_HOST_HCCHAR3_EPTYPE register field. */
20825 #define ALT_USB_HOST_HCCHAR3_EPTYPE_RESET 0x0
20826 /* Extracts the ALT_USB_HOST_HCCHAR3_EPTYPE field value from a register. */
20827 #define ALT_USB_HOST_HCCHAR3_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
20828 /* Produces a ALT_USB_HOST_HCCHAR3_EPTYPE register field value suitable for setting the register. */
20829 #define ALT_USB_HOST_HCCHAR3_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
20830 
20831 /*
20832  * Field : Multi Count Error Count - ec
20833  *
20834  * When the Split Enable bit of the Host Channel-n Split Control register
20835  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
20836  * transactions that must be executed per microframe for this periodic endpoint.
20837  * for non periodic transfers, this field is used only in DMA mode, and specifies
20838  * the number packets to be fetched for this channel before the internal DMA engine
20839  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
20840  * number of immediate retries to be performed for a periodic split transactions on
20841  * transaction errors. This field must be Set to at least 1.
20842  *
20843  * Field Enumeration Values:
20844  *
20845  * Enum | Value | Description
20846  * :-------------------------------------|:------|:----------------------------------------------
20847  * ALT_USB_HOST_HCCHAR3_EC_E_RSVD | 0x0 | Reserved This field yields undefined results
20848  * ALT_USB_HOST_HCCHAR3_EC_E_TRANSONE | 0x1 | 1 transaction
20849  * ALT_USB_HOST_HCCHAR3_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
20850  * : | | per microframe
20851  * ALT_USB_HOST_HCCHAR3_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
20852  * : | | per microframe
20853  *
20854  * Field Access Macros:
20855  *
20856  */
20857 /*
20858  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EC
20859  *
20860  * Reserved This field yields undefined results
20861  */
20862 #define ALT_USB_HOST_HCCHAR3_EC_E_RSVD 0x0
20863 /*
20864  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EC
20865  *
20866  * 1 transaction
20867  */
20868 #define ALT_USB_HOST_HCCHAR3_EC_E_TRANSONE 0x1
20869 /*
20870  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EC
20871  *
20872  * 2 transactions to be issued for this endpoint per microframe
20873  */
20874 #define ALT_USB_HOST_HCCHAR3_EC_E_TRANSTWO 0x2
20875 /*
20876  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_EC
20877  *
20878  * 3 transactions to be issued for this endpoint per microframe
20879  */
20880 #define ALT_USB_HOST_HCCHAR3_EC_E_TRANSTHREE 0x3
20881 
20882 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_EC register field. */
20883 #define ALT_USB_HOST_HCCHAR3_EC_LSB 20
20884 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_EC register field. */
20885 #define ALT_USB_HOST_HCCHAR3_EC_MSB 21
20886 /* The width in bits of the ALT_USB_HOST_HCCHAR3_EC register field. */
20887 #define ALT_USB_HOST_HCCHAR3_EC_WIDTH 2
20888 /* The mask used to set the ALT_USB_HOST_HCCHAR3_EC register field value. */
20889 #define ALT_USB_HOST_HCCHAR3_EC_SET_MSK 0x00300000
20890 /* The mask used to clear the ALT_USB_HOST_HCCHAR3_EC register field value. */
20891 #define ALT_USB_HOST_HCCHAR3_EC_CLR_MSK 0xffcfffff
20892 /* The reset value of the ALT_USB_HOST_HCCHAR3_EC register field. */
20893 #define ALT_USB_HOST_HCCHAR3_EC_RESET 0x0
20894 /* Extracts the ALT_USB_HOST_HCCHAR3_EC field value from a register. */
20895 #define ALT_USB_HOST_HCCHAR3_EC_GET(value) (((value) & 0x00300000) >> 20)
20896 /* Produces a ALT_USB_HOST_HCCHAR3_EC register field value suitable for setting the register. */
20897 #define ALT_USB_HOST_HCCHAR3_EC_SET(value) (((value) << 20) & 0x00300000)
20898 
20899 /*
20900  * Field : Device Address - devaddr
20901  *
20902  * This field selects the specific device serving as the data source or sink.
20903  *
20904  * Field Access Macros:
20905  *
20906  */
20907 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_DEVADDR register field. */
20908 #define ALT_USB_HOST_HCCHAR3_DEVADDR_LSB 22
20909 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_DEVADDR register field. */
20910 #define ALT_USB_HOST_HCCHAR3_DEVADDR_MSB 28
20911 /* The width in bits of the ALT_USB_HOST_HCCHAR3_DEVADDR register field. */
20912 #define ALT_USB_HOST_HCCHAR3_DEVADDR_WIDTH 7
20913 /* The mask used to set the ALT_USB_HOST_HCCHAR3_DEVADDR register field value. */
20914 #define ALT_USB_HOST_HCCHAR3_DEVADDR_SET_MSK 0x1fc00000
20915 /* The mask used to clear the ALT_USB_HOST_HCCHAR3_DEVADDR register field value. */
20916 #define ALT_USB_HOST_HCCHAR3_DEVADDR_CLR_MSK 0xe03fffff
20917 /* The reset value of the ALT_USB_HOST_HCCHAR3_DEVADDR register field. */
20918 #define ALT_USB_HOST_HCCHAR3_DEVADDR_RESET 0x0
20919 /* Extracts the ALT_USB_HOST_HCCHAR3_DEVADDR field value from a register. */
20920 #define ALT_USB_HOST_HCCHAR3_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
20921 /* Produces a ALT_USB_HOST_HCCHAR3_DEVADDR register field value suitable for setting the register. */
20922 #define ALT_USB_HOST_HCCHAR3_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
20923 
20924 /*
20925  * Field : Channel Disable - chdis
20926  *
20927  * The application sets this bit to stop transmitting/receiving data on a channel,
20928  * even before the transfer for that channel is complete. The application must wait
20929  * for the Channel Disabled interrupt before treating the channel as disabled.
20930  *
20931  * Field Enumeration Values:
20932  *
20933  * Enum | Value | Description
20934  * :-----------------------------------|:------|:---------------------------------
20935  * ALT_USB_HOST_HCCHAR3_CHDIS_E_INACT | 0x0 | No activity
20936  * ALT_USB_HOST_HCCHAR3_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving data
20937  *
20938  * Field Access Macros:
20939  *
20940  */
20941 /*
20942  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_CHDIS
20943  *
20944  * No activity
20945  */
20946 #define ALT_USB_HOST_HCCHAR3_CHDIS_E_INACT 0x0
20947 /*
20948  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_CHDIS
20949  *
20950  * Stop transmitting/receiving data
20951  */
20952 #define ALT_USB_HOST_HCCHAR3_CHDIS_E_ACT 0x1
20953 
20954 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_CHDIS register field. */
20955 #define ALT_USB_HOST_HCCHAR3_CHDIS_LSB 30
20956 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_CHDIS register field. */
20957 #define ALT_USB_HOST_HCCHAR3_CHDIS_MSB 30
20958 /* The width in bits of the ALT_USB_HOST_HCCHAR3_CHDIS register field. */
20959 #define ALT_USB_HOST_HCCHAR3_CHDIS_WIDTH 1
20960 /* The mask used to set the ALT_USB_HOST_HCCHAR3_CHDIS register field value. */
20961 #define ALT_USB_HOST_HCCHAR3_CHDIS_SET_MSK 0x40000000
20962 /* The mask used to clear the ALT_USB_HOST_HCCHAR3_CHDIS register field value. */
20963 #define ALT_USB_HOST_HCCHAR3_CHDIS_CLR_MSK 0xbfffffff
20964 /* The reset value of the ALT_USB_HOST_HCCHAR3_CHDIS register field. */
20965 #define ALT_USB_HOST_HCCHAR3_CHDIS_RESET 0x0
20966 /* Extracts the ALT_USB_HOST_HCCHAR3_CHDIS field value from a register. */
20967 #define ALT_USB_HOST_HCCHAR3_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
20968 /* Produces a ALT_USB_HOST_HCCHAR3_CHDIS register field value suitable for setting the register. */
20969 #define ALT_USB_HOST_HCCHAR3_CHDIS_SET(value) (((value) << 30) & 0x40000000)
20970 
20971 /*
20972  * Field : Channel Enable - chena
20973  *
20974  * When Scatter/Gather mode is disabled. This field is set by the application and
20975  * cleared by the OTG host.
20976  *
20977  * Field Enumeration Values:
20978  *
20979  * Enum | Value | Description
20980  * :------------------------------------|:------|:-------------------------------------------------
20981  * ALT_USB_HOST_HCCHAR3_CHENA_E_NOTRDY | 0x0 | Indicates that the descriptor structure is not
20982  * : | | yet ready
20983  * ALT_USB_HOST_HCCHAR3_CHENA_E_RDY | 0x1 | Indicates that the descriptor structure and data
20984  * : | | buffer with data is setup and this channel can
20985  * : | | access the descriptor
20986  *
20987  * Field Access Macros:
20988  *
20989  */
20990 /*
20991  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_CHENA
20992  *
20993  * Indicates that the descriptor structure is not yet ready
20994  */
20995 #define ALT_USB_HOST_HCCHAR3_CHENA_E_NOTRDY 0x0
20996 /*
20997  * Enumerated value for register field ALT_USB_HOST_HCCHAR3_CHENA
20998  *
20999  * Indicates that the descriptor structure and data buffer with data is setup and
21000  * this channel can access the descriptor
21001  */
21002 #define ALT_USB_HOST_HCCHAR3_CHENA_E_RDY 0x1
21003 
21004 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_CHENA register field. */
21005 #define ALT_USB_HOST_HCCHAR3_CHENA_LSB 31
21006 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_CHENA register field. */
21007 #define ALT_USB_HOST_HCCHAR3_CHENA_MSB 31
21008 /* The width in bits of the ALT_USB_HOST_HCCHAR3_CHENA register field. */
21009 #define ALT_USB_HOST_HCCHAR3_CHENA_WIDTH 1
21010 /* The mask used to set the ALT_USB_HOST_HCCHAR3_CHENA register field value. */
21011 #define ALT_USB_HOST_HCCHAR3_CHENA_SET_MSK 0x80000000
21012 /* The mask used to clear the ALT_USB_HOST_HCCHAR3_CHENA register field value. */
21013 #define ALT_USB_HOST_HCCHAR3_CHENA_CLR_MSK 0x7fffffff
21014 /* The reset value of the ALT_USB_HOST_HCCHAR3_CHENA register field. */
21015 #define ALT_USB_HOST_HCCHAR3_CHENA_RESET 0x0
21016 /* Extracts the ALT_USB_HOST_HCCHAR3_CHENA field value from a register. */
21017 #define ALT_USB_HOST_HCCHAR3_CHENA_GET(value) (((value) & 0x80000000) >> 31)
21018 /* Produces a ALT_USB_HOST_HCCHAR3_CHENA register field value suitable for setting the register. */
21019 #define ALT_USB_HOST_HCCHAR3_CHENA_SET(value) (((value) << 31) & 0x80000000)
21020 
21021 #ifndef __ASSEMBLY__
21022 /*
21023  * WARNING: The C register and register group struct declarations are provided for
21024  * convenience and illustrative purposes. They should, however, be used with
21025  * caution as the C language standard provides no guarantees about the alignment or
21026  * atomicity of device memory accesses. The recommended practice for writing
21027  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
21028  * alt_write_word() functions.
21029  *
21030  * The struct declaration for register ALT_USB_HOST_HCCHAR3.
21031  */
21032 struct ALT_USB_HOST_HCCHAR3_s
21033 {
21034  uint32_t mps : 11; /* Maximum Packet Size */
21035  uint32_t epnum : 4; /* Endpoint Number */
21036  uint32_t epdir : 1; /* Endpoint Direction */
21037  uint32_t : 1; /* *UNDEFINED* */
21038  uint32_t lspddev : 1; /* Low-Speed Device */
21039  uint32_t eptype : 2; /* Endpoint Type */
21040  uint32_t ec : 2; /* Multi Count Error Count */
21041  uint32_t devaddr : 7; /* Device Address */
21042  uint32_t : 1; /* *UNDEFINED* */
21043  const uint32_t chdis : 1; /* Channel Disable */
21044  const uint32_t chena : 1; /* Channel Enable */
21045 };
21046 
21047 /* The typedef declaration for register ALT_USB_HOST_HCCHAR3. */
21048 typedef volatile struct ALT_USB_HOST_HCCHAR3_s ALT_USB_HOST_HCCHAR3_t;
21049 #endif /* __ASSEMBLY__ */
21050 
21051 /* The byte offset of the ALT_USB_HOST_HCCHAR3 register from the beginning of the component. */
21052 #define ALT_USB_HOST_HCCHAR3_OFST 0x160
21053 /* The address of the ALT_USB_HOST_HCCHAR3 register. */
21054 #define ALT_USB_HOST_HCCHAR3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR3_OFST))
21055 
21056 /*
21057  * Register : Host Channel 3 Split Control Register - hcsplt3
21058  *
21059  * Channel_number 3
21060  *
21061  * Register Layout
21062  *
21063  * Bits | Access | Reset | Description
21064  * :--------|:-------|:------|:---------------------
21065  * [6:0] | RW | 0x0 | Port Address
21066  * [13:7] | RW | 0x0 | Hub Address
21067  * [15:14] | RW | 0x0 | Transaction Position
21068  * [16] | RW | 0x0 | Do Complete Split
21069  * [30:17] | ??? | 0x0 | *UNDEFINED*
21070  * [31] | RW | 0x0 | Split Enable
21071  *
21072  */
21073 /*
21074  * Field : Port Address - prtaddr
21075  *
21076  * This field is the port number of the recipient transactiontranslator.
21077  *
21078  * Field Access Macros:
21079  *
21080  */
21081 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT3_PRTADDR register field. */
21082 #define ALT_USB_HOST_HCSPLT3_PRTADDR_LSB 0
21083 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT3_PRTADDR register field. */
21084 #define ALT_USB_HOST_HCSPLT3_PRTADDR_MSB 6
21085 /* The width in bits of the ALT_USB_HOST_HCSPLT3_PRTADDR register field. */
21086 #define ALT_USB_HOST_HCSPLT3_PRTADDR_WIDTH 7
21087 /* The mask used to set the ALT_USB_HOST_HCSPLT3_PRTADDR register field value. */
21088 #define ALT_USB_HOST_HCSPLT3_PRTADDR_SET_MSK 0x0000007f
21089 /* The mask used to clear the ALT_USB_HOST_HCSPLT3_PRTADDR register field value. */
21090 #define ALT_USB_HOST_HCSPLT3_PRTADDR_CLR_MSK 0xffffff80
21091 /* The reset value of the ALT_USB_HOST_HCSPLT3_PRTADDR register field. */
21092 #define ALT_USB_HOST_HCSPLT3_PRTADDR_RESET 0x0
21093 /* Extracts the ALT_USB_HOST_HCSPLT3_PRTADDR field value from a register. */
21094 #define ALT_USB_HOST_HCSPLT3_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
21095 /* Produces a ALT_USB_HOST_HCSPLT3_PRTADDR register field value suitable for setting the register. */
21096 #define ALT_USB_HOST_HCSPLT3_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
21097 
21098 /*
21099  * Field : Hub Address - hubaddr
21100  *
21101  * This field holds the device address of the transaction translator's hub.
21102  *
21103  * Field Access Macros:
21104  *
21105  */
21106 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT3_HUBADDR register field. */
21107 #define ALT_USB_HOST_HCSPLT3_HUBADDR_LSB 7
21108 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT3_HUBADDR register field. */
21109 #define ALT_USB_HOST_HCSPLT3_HUBADDR_MSB 13
21110 /* The width in bits of the ALT_USB_HOST_HCSPLT3_HUBADDR register field. */
21111 #define ALT_USB_HOST_HCSPLT3_HUBADDR_WIDTH 7
21112 /* The mask used to set the ALT_USB_HOST_HCSPLT3_HUBADDR register field value. */
21113 #define ALT_USB_HOST_HCSPLT3_HUBADDR_SET_MSK 0x00003f80
21114 /* The mask used to clear the ALT_USB_HOST_HCSPLT3_HUBADDR register field value. */
21115 #define ALT_USB_HOST_HCSPLT3_HUBADDR_CLR_MSK 0xffffc07f
21116 /* The reset value of the ALT_USB_HOST_HCSPLT3_HUBADDR register field. */
21117 #define ALT_USB_HOST_HCSPLT3_HUBADDR_RESET 0x0
21118 /* Extracts the ALT_USB_HOST_HCSPLT3_HUBADDR field value from a register. */
21119 #define ALT_USB_HOST_HCSPLT3_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
21120 /* Produces a ALT_USB_HOST_HCSPLT3_HUBADDR register field value suitable for setting the register. */
21121 #define ALT_USB_HOST_HCSPLT3_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
21122 
21123 /*
21124  * Field : Transaction Position - xactpos
21125  *
21126  * This field is used to determine whether to send all, first, middle, or last
21127  * payloads with each OUT transaction.
21128  *
21129  * Field Enumeration Values:
21130  *
21131  * Enum | Value | Description
21132  * :--------------------------------------|:------|:------------------------------------------------
21133  * ALT_USB_HOST_HCSPLT3_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
21134  * : | | transaction (which is larger than 188 bytes)
21135  * ALT_USB_HOST_HCSPLT3_XACTPOS_E_END | 0x1 | End. This is the last payload of this
21136  * : | | transaction (which is larger than 188 bytes)
21137  * ALT_USB_HOST_HCSPLT3_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
21138  * : | | transaction (which is larger than 188 bytes)
21139  * ALT_USB_HOST_HCSPLT3_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
21140  * : | | transaction (which is less than or equal to 188
21141  * : | | bytes)
21142  *
21143  * Field Access Macros:
21144  *
21145  */
21146 /*
21147  * Enumerated value for register field ALT_USB_HOST_HCSPLT3_XACTPOS
21148  *
21149  * Mid. This is the middle payload of this transaction (which is larger than 188
21150  * bytes)
21151  */
21152 #define ALT_USB_HOST_HCSPLT3_XACTPOS_E_MIDDLE 0x0
21153 /*
21154  * Enumerated value for register field ALT_USB_HOST_HCSPLT3_XACTPOS
21155  *
21156  * End. This is the last payload of this transaction (which is larger than 188
21157  * bytes)
21158  */
21159 #define ALT_USB_HOST_HCSPLT3_XACTPOS_E_END 0x1
21160 /*
21161  * Enumerated value for register field ALT_USB_HOST_HCSPLT3_XACTPOS
21162  *
21163  * Begin. This is the first data payload of this transaction (which is larger than
21164  * 188 bytes)
21165  */
21166 #define ALT_USB_HOST_HCSPLT3_XACTPOS_E_BEGIN 0x2
21167 /*
21168  * Enumerated value for register field ALT_USB_HOST_HCSPLT3_XACTPOS
21169  *
21170  * All. This is the entire data payload is of this transaction (which is less than
21171  * or equal to 188 bytes)
21172  */
21173 #define ALT_USB_HOST_HCSPLT3_XACTPOS_E_ALL 0x3
21174 
21175 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT3_XACTPOS register field. */
21176 #define ALT_USB_HOST_HCSPLT3_XACTPOS_LSB 14
21177 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT3_XACTPOS register field. */
21178 #define ALT_USB_HOST_HCSPLT3_XACTPOS_MSB 15
21179 /* The width in bits of the ALT_USB_HOST_HCSPLT3_XACTPOS register field. */
21180 #define ALT_USB_HOST_HCSPLT3_XACTPOS_WIDTH 2
21181 /* The mask used to set the ALT_USB_HOST_HCSPLT3_XACTPOS register field value. */
21182 #define ALT_USB_HOST_HCSPLT3_XACTPOS_SET_MSK 0x0000c000
21183 /* The mask used to clear the ALT_USB_HOST_HCSPLT3_XACTPOS register field value. */
21184 #define ALT_USB_HOST_HCSPLT3_XACTPOS_CLR_MSK 0xffff3fff
21185 /* The reset value of the ALT_USB_HOST_HCSPLT3_XACTPOS register field. */
21186 #define ALT_USB_HOST_HCSPLT3_XACTPOS_RESET 0x0
21187 /* Extracts the ALT_USB_HOST_HCSPLT3_XACTPOS field value from a register. */
21188 #define ALT_USB_HOST_HCSPLT3_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
21189 /* Produces a ALT_USB_HOST_HCSPLT3_XACTPOS register field value suitable for setting the register. */
21190 #define ALT_USB_HOST_HCSPLT3_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
21191 
21192 /*
21193  * Field : Do Complete Split - compsplt
21194  *
21195  * The application sets this field to request the OTG host to perform a complete
21196  * split transaction.
21197  *
21198  * Field Enumeration Values:
21199  *
21200  * Enum | Value | Description
21201  * :----------------------------------------|:------|:---------------------
21202  * ALT_USB_HOST_HCSPLT3_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
21203  * ALT_USB_HOST_HCSPLT3_COMPSPLT_E_SPLIT | 0x1 | Split transaction
21204  *
21205  * Field Access Macros:
21206  *
21207  */
21208 /*
21209  * Enumerated value for register field ALT_USB_HOST_HCSPLT3_COMPSPLT
21210  *
21211  * No split transaction
21212  */
21213 #define ALT_USB_HOST_HCSPLT3_COMPSPLT_E_NOSPLIT 0x0
21214 /*
21215  * Enumerated value for register field ALT_USB_HOST_HCSPLT3_COMPSPLT
21216  *
21217  * Split transaction
21218  */
21219 #define ALT_USB_HOST_HCSPLT3_COMPSPLT_E_SPLIT 0x1
21220 
21221 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT3_COMPSPLT register field. */
21222 #define ALT_USB_HOST_HCSPLT3_COMPSPLT_LSB 16
21223 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT3_COMPSPLT register field. */
21224 #define ALT_USB_HOST_HCSPLT3_COMPSPLT_MSB 16
21225 /* The width in bits of the ALT_USB_HOST_HCSPLT3_COMPSPLT register field. */
21226 #define ALT_USB_HOST_HCSPLT3_COMPSPLT_WIDTH 1
21227 /* The mask used to set the ALT_USB_HOST_HCSPLT3_COMPSPLT register field value. */
21228 #define ALT_USB_HOST_HCSPLT3_COMPSPLT_SET_MSK 0x00010000
21229 /* The mask used to clear the ALT_USB_HOST_HCSPLT3_COMPSPLT register field value. */
21230 #define ALT_USB_HOST_HCSPLT3_COMPSPLT_CLR_MSK 0xfffeffff
21231 /* The reset value of the ALT_USB_HOST_HCSPLT3_COMPSPLT register field. */
21232 #define ALT_USB_HOST_HCSPLT3_COMPSPLT_RESET 0x0
21233 /* Extracts the ALT_USB_HOST_HCSPLT3_COMPSPLT field value from a register. */
21234 #define ALT_USB_HOST_HCSPLT3_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
21235 /* Produces a ALT_USB_HOST_HCSPLT3_COMPSPLT register field value suitable for setting the register. */
21236 #define ALT_USB_HOST_HCSPLT3_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
21237 
21238 /*
21239  * Field : Split Enable - spltena
21240  *
21241  * The application sets this field to indicate that this channel is enabled to
21242  * perform split transactions.
21243  *
21244  * Field Enumeration Values:
21245  *
21246  * Enum | Value | Description
21247  * :------------------------------------|:------|:------------------
21248  * ALT_USB_HOST_HCSPLT3_SPLTENA_E_DISD | 0x0 | Split not enabled
21249  * ALT_USB_HOST_HCSPLT3_SPLTENA_E_END | 0x1 | Split enabled
21250  *
21251  * Field Access Macros:
21252  *
21253  */
21254 /*
21255  * Enumerated value for register field ALT_USB_HOST_HCSPLT3_SPLTENA
21256  *
21257  * Split not enabled
21258  */
21259 #define ALT_USB_HOST_HCSPLT3_SPLTENA_E_DISD 0x0
21260 /*
21261  * Enumerated value for register field ALT_USB_HOST_HCSPLT3_SPLTENA
21262  *
21263  * Split enabled
21264  */
21265 #define ALT_USB_HOST_HCSPLT3_SPLTENA_E_END 0x1
21266 
21267 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT3_SPLTENA register field. */
21268 #define ALT_USB_HOST_HCSPLT3_SPLTENA_LSB 31
21269 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT3_SPLTENA register field. */
21270 #define ALT_USB_HOST_HCSPLT3_SPLTENA_MSB 31
21271 /* The width in bits of the ALT_USB_HOST_HCSPLT3_SPLTENA register field. */
21272 #define ALT_USB_HOST_HCSPLT3_SPLTENA_WIDTH 1
21273 /* The mask used to set the ALT_USB_HOST_HCSPLT3_SPLTENA register field value. */
21274 #define ALT_USB_HOST_HCSPLT3_SPLTENA_SET_MSK 0x80000000
21275 /* The mask used to clear the ALT_USB_HOST_HCSPLT3_SPLTENA register field value. */
21276 #define ALT_USB_HOST_HCSPLT3_SPLTENA_CLR_MSK 0x7fffffff
21277 /* The reset value of the ALT_USB_HOST_HCSPLT3_SPLTENA register field. */
21278 #define ALT_USB_HOST_HCSPLT3_SPLTENA_RESET 0x0
21279 /* Extracts the ALT_USB_HOST_HCSPLT3_SPLTENA field value from a register. */
21280 #define ALT_USB_HOST_HCSPLT3_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
21281 /* Produces a ALT_USB_HOST_HCSPLT3_SPLTENA register field value suitable for setting the register. */
21282 #define ALT_USB_HOST_HCSPLT3_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
21283 
21284 #ifndef __ASSEMBLY__
21285 /*
21286  * WARNING: The C register and register group struct declarations are provided for
21287  * convenience and illustrative purposes. They should, however, be used with
21288  * caution as the C language standard provides no guarantees about the alignment or
21289  * atomicity of device memory accesses. The recommended practice for writing
21290  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
21291  * alt_write_word() functions.
21292  *
21293  * The struct declaration for register ALT_USB_HOST_HCSPLT3.
21294  */
21295 struct ALT_USB_HOST_HCSPLT3_s
21296 {
21297  uint32_t prtaddr : 7; /* Port Address */
21298  uint32_t hubaddr : 7; /* Hub Address */
21299  uint32_t xactpos : 2; /* Transaction Position */
21300  uint32_t compsplt : 1; /* Do Complete Split */
21301  uint32_t : 14; /* *UNDEFINED* */
21302  uint32_t spltena : 1; /* Split Enable */
21303 };
21304 
21305 /* The typedef declaration for register ALT_USB_HOST_HCSPLT3. */
21306 typedef volatile struct ALT_USB_HOST_HCSPLT3_s ALT_USB_HOST_HCSPLT3_t;
21307 #endif /* __ASSEMBLY__ */
21308 
21309 /* The byte offset of the ALT_USB_HOST_HCSPLT3 register from the beginning of the component. */
21310 #define ALT_USB_HOST_HCSPLT3_OFST 0x164
21311 /* The address of the ALT_USB_HOST_HCSPLT3 register. */
21312 #define ALT_USB_HOST_HCSPLT3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT3_OFST))
21313 
21314 /*
21315  * Register : Host Channel 3 Interrupt Register - hcint3
21316  *
21317  * This register indicates the status of a channel with respect to USB- and AHB-
21318  * related events. The application must read this register when the Host Channels
21319  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
21320  * application can read this register, it must first read the Host All Channels
21321  * Interrupt (HAINT) register to get the exact channel number for the Host
21322  * Channel-n Interrupt register. The application must clear the appropriate bit in
21323  * this register to clear the corresponding bits in the HAINT and GINTSTS
21324  * registers.
21325  *
21326  * Register Layout
21327  *
21328  * Bits | Access | Reset | Description
21329  * :--------|:-------|:------|:--------------------------------------------
21330  * [0] | R | 0x0 | Transfer Completed
21331  * [1] | R | 0x0 | Channel Halted
21332  * [2] | R | 0x0 | AHB Error
21333  * [3] | R | 0x0 | STALL Response Received Interrupt
21334  * [4] | R | 0x0 | NAK Response Received Interrupt
21335  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
21336  * [6] | R | 0x0 | NYET Response Received Interrupt
21337  * [7] | R | 0x0 | Transaction Error
21338  * [8] | R | 0x0 | Babble Error
21339  * [9] | R | 0x0 | Frame Overrun
21340  * [10] | R | 0x0 | Data Toggle Error
21341  * [11] | R | 0x0 | BNA Interrupt
21342  * [12] | R | 0x0 | Excessive Transaction Error
21343  * [13] | R | 0x0 | Descriptor rollover interrupt
21344  * [31:14] | ??? | 0x0 | *UNDEFINED*
21345  *
21346  */
21347 /*
21348  * Field : Transfer Completed - xfercompl
21349  *
21350  * Transfer completed normally without any errors. This bit can be set only by the
21351  * core and the application should write 1 to clear it.
21352  *
21353  * Field Enumeration Values:
21354  *
21355  * Enum | Value | Description
21356  * :--------------------------------------|:------|:-----------------------------------------------
21357  * ALT_USB_HOST_HCINT3_XFERCOMPL_E_INACT | 0x0 | No transfer
21358  * ALT_USB_HOST_HCINT3_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
21359  *
21360  * Field Access Macros:
21361  *
21362  */
21363 /*
21364  * Enumerated value for register field ALT_USB_HOST_HCINT3_XFERCOMPL
21365  *
21366  * No transfer
21367  */
21368 #define ALT_USB_HOST_HCINT3_XFERCOMPL_E_INACT 0x0
21369 /*
21370  * Enumerated value for register field ALT_USB_HOST_HCINT3_XFERCOMPL
21371  *
21372  * Transfer completed normally without any errors
21373  */
21374 #define ALT_USB_HOST_HCINT3_XFERCOMPL_E_ACT 0x1
21375 
21376 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_XFERCOMPL register field. */
21377 #define ALT_USB_HOST_HCINT3_XFERCOMPL_LSB 0
21378 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_XFERCOMPL register field. */
21379 #define ALT_USB_HOST_HCINT3_XFERCOMPL_MSB 0
21380 /* The width in bits of the ALT_USB_HOST_HCINT3_XFERCOMPL register field. */
21381 #define ALT_USB_HOST_HCINT3_XFERCOMPL_WIDTH 1
21382 /* The mask used to set the ALT_USB_HOST_HCINT3_XFERCOMPL register field value. */
21383 #define ALT_USB_HOST_HCINT3_XFERCOMPL_SET_MSK 0x00000001
21384 /* The mask used to clear the ALT_USB_HOST_HCINT3_XFERCOMPL register field value. */
21385 #define ALT_USB_HOST_HCINT3_XFERCOMPL_CLR_MSK 0xfffffffe
21386 /* The reset value of the ALT_USB_HOST_HCINT3_XFERCOMPL register field. */
21387 #define ALT_USB_HOST_HCINT3_XFERCOMPL_RESET 0x0
21388 /* Extracts the ALT_USB_HOST_HCINT3_XFERCOMPL field value from a register. */
21389 #define ALT_USB_HOST_HCINT3_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
21390 /* Produces a ALT_USB_HOST_HCINT3_XFERCOMPL register field value suitable for setting the register. */
21391 #define ALT_USB_HOST_HCINT3_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
21392 
21393 /*
21394  * Field : Channel Halted - chhltd
21395  *
21396  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
21397  * either because of any USB transaction error or in response to disable request by
21398  * the application or because of a completed transfer. In Scatter/gather DMA mode,
21399  * this indicates that transfer completed due to any of the following
21400  *
21401  * . EOL being set in descriptor
21402  *
21403  * . AHB error
21404  *
21405  * . Excessive transaction errors
21406  *
21407  * . Babble
21408  *
21409  * . Stall
21410  *
21411  * Field Enumeration Values:
21412  *
21413  * Enum | Value | Description
21414  * :-----------------------------------|:------|:-------------------
21415  * ALT_USB_HOST_HCINT3_CHHLTD_E_INACT | 0x0 | Channel not halted
21416  * ALT_USB_HOST_HCINT3_CHHLTD_E_ACT | 0x1 | Channel Halted
21417  *
21418  * Field Access Macros:
21419  *
21420  */
21421 /*
21422  * Enumerated value for register field ALT_USB_HOST_HCINT3_CHHLTD
21423  *
21424  * Channel not halted
21425  */
21426 #define ALT_USB_HOST_HCINT3_CHHLTD_E_INACT 0x0
21427 /*
21428  * Enumerated value for register field ALT_USB_HOST_HCINT3_CHHLTD
21429  *
21430  * Channel Halted
21431  */
21432 #define ALT_USB_HOST_HCINT3_CHHLTD_E_ACT 0x1
21433 
21434 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_CHHLTD register field. */
21435 #define ALT_USB_HOST_HCINT3_CHHLTD_LSB 1
21436 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_CHHLTD register field. */
21437 #define ALT_USB_HOST_HCINT3_CHHLTD_MSB 1
21438 /* The width in bits of the ALT_USB_HOST_HCINT3_CHHLTD register field. */
21439 #define ALT_USB_HOST_HCINT3_CHHLTD_WIDTH 1
21440 /* The mask used to set the ALT_USB_HOST_HCINT3_CHHLTD register field value. */
21441 #define ALT_USB_HOST_HCINT3_CHHLTD_SET_MSK 0x00000002
21442 /* The mask used to clear the ALT_USB_HOST_HCINT3_CHHLTD register field value. */
21443 #define ALT_USB_HOST_HCINT3_CHHLTD_CLR_MSK 0xfffffffd
21444 /* The reset value of the ALT_USB_HOST_HCINT3_CHHLTD register field. */
21445 #define ALT_USB_HOST_HCINT3_CHHLTD_RESET 0x0
21446 /* Extracts the ALT_USB_HOST_HCINT3_CHHLTD field value from a register. */
21447 #define ALT_USB_HOST_HCINT3_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
21448 /* Produces a ALT_USB_HOST_HCINT3_CHHLTD register field value suitable for setting the register. */
21449 #define ALT_USB_HOST_HCINT3_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
21450 
21451 /*
21452  * Field : AHB Error - ahberr
21453  *
21454  * This is generated only in Internal DMA mode when there is an AHB error during
21455  * AHB read/write. The application can read the corresponding channel's DMA address
21456  * register to get the error address.
21457  *
21458  * Field Enumeration Values:
21459  *
21460  * Enum | Value | Description
21461  * :-----------------------------------|:------|:--------------------------------
21462  * ALT_USB_HOST_HCINT3_AHBERR_E_INACT | 0x0 | No AHB error
21463  * ALT_USB_HOST_HCINT3_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
21464  *
21465  * Field Access Macros:
21466  *
21467  */
21468 /*
21469  * Enumerated value for register field ALT_USB_HOST_HCINT3_AHBERR
21470  *
21471  * No AHB error
21472  */
21473 #define ALT_USB_HOST_HCINT3_AHBERR_E_INACT 0x0
21474 /*
21475  * Enumerated value for register field ALT_USB_HOST_HCINT3_AHBERR
21476  *
21477  * AHB error during AHB read/write
21478  */
21479 #define ALT_USB_HOST_HCINT3_AHBERR_E_ACT 0x1
21480 
21481 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_AHBERR register field. */
21482 #define ALT_USB_HOST_HCINT3_AHBERR_LSB 2
21483 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_AHBERR register field. */
21484 #define ALT_USB_HOST_HCINT3_AHBERR_MSB 2
21485 /* The width in bits of the ALT_USB_HOST_HCINT3_AHBERR register field. */
21486 #define ALT_USB_HOST_HCINT3_AHBERR_WIDTH 1
21487 /* The mask used to set the ALT_USB_HOST_HCINT3_AHBERR register field value. */
21488 #define ALT_USB_HOST_HCINT3_AHBERR_SET_MSK 0x00000004
21489 /* The mask used to clear the ALT_USB_HOST_HCINT3_AHBERR register field value. */
21490 #define ALT_USB_HOST_HCINT3_AHBERR_CLR_MSK 0xfffffffb
21491 /* The reset value of the ALT_USB_HOST_HCINT3_AHBERR register field. */
21492 #define ALT_USB_HOST_HCINT3_AHBERR_RESET 0x0
21493 /* Extracts the ALT_USB_HOST_HCINT3_AHBERR field value from a register. */
21494 #define ALT_USB_HOST_HCINT3_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
21495 /* Produces a ALT_USB_HOST_HCINT3_AHBERR register field value suitable for setting the register. */
21496 #define ALT_USB_HOST_HCINT3_AHBERR_SET(value) (((value) << 2) & 0x00000004)
21497 
21498 /*
21499  * Field : STALL Response Received Interrupt - stall
21500  *
21501  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
21502  * This bit can be set only by the core and the application should write 1 to clear
21503  * it.
21504  *
21505  * Field Enumeration Values:
21506  *
21507  * Enum | Value | Description
21508  * :----------------------------------|:------|:-------------------
21509  * ALT_USB_HOST_HCINT3_STALL_E_INACT | 0x0 | No Stall Interrupt
21510  * ALT_USB_HOST_HCINT3_STALL_E_ACT | 0x1 | Stall Interrupt
21511  *
21512  * Field Access Macros:
21513  *
21514  */
21515 /*
21516  * Enumerated value for register field ALT_USB_HOST_HCINT3_STALL
21517  *
21518  * No Stall Interrupt
21519  */
21520 #define ALT_USB_HOST_HCINT3_STALL_E_INACT 0x0
21521 /*
21522  * Enumerated value for register field ALT_USB_HOST_HCINT3_STALL
21523  *
21524  * Stall Interrupt
21525  */
21526 #define ALT_USB_HOST_HCINT3_STALL_E_ACT 0x1
21527 
21528 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_STALL register field. */
21529 #define ALT_USB_HOST_HCINT3_STALL_LSB 3
21530 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_STALL register field. */
21531 #define ALT_USB_HOST_HCINT3_STALL_MSB 3
21532 /* The width in bits of the ALT_USB_HOST_HCINT3_STALL register field. */
21533 #define ALT_USB_HOST_HCINT3_STALL_WIDTH 1
21534 /* The mask used to set the ALT_USB_HOST_HCINT3_STALL register field value. */
21535 #define ALT_USB_HOST_HCINT3_STALL_SET_MSK 0x00000008
21536 /* The mask used to clear the ALT_USB_HOST_HCINT3_STALL register field value. */
21537 #define ALT_USB_HOST_HCINT3_STALL_CLR_MSK 0xfffffff7
21538 /* The reset value of the ALT_USB_HOST_HCINT3_STALL register field. */
21539 #define ALT_USB_HOST_HCINT3_STALL_RESET 0x0
21540 /* Extracts the ALT_USB_HOST_HCINT3_STALL field value from a register. */
21541 #define ALT_USB_HOST_HCINT3_STALL_GET(value) (((value) & 0x00000008) >> 3)
21542 /* Produces a ALT_USB_HOST_HCINT3_STALL register field value suitable for setting the register. */
21543 #define ALT_USB_HOST_HCINT3_STALL_SET(value) (((value) << 3) & 0x00000008)
21544 
21545 /*
21546  * Field : NAK Response Received Interrupt - nak
21547  *
21548  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
21549  * core.This bit can be set only by the core and the application should write 1 to
21550  * clear it.
21551  *
21552  * Field Enumeration Values:
21553  *
21554  * Enum | Value | Description
21555  * :--------------------------------|:------|:-----------------------------------
21556  * ALT_USB_HOST_HCINT3_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
21557  * ALT_USB_HOST_HCINT3_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
21558  *
21559  * Field Access Macros:
21560  *
21561  */
21562 /*
21563  * Enumerated value for register field ALT_USB_HOST_HCINT3_NAK
21564  *
21565  * No NAK Response Received Interrupt
21566  */
21567 #define ALT_USB_HOST_HCINT3_NAK_E_INACT 0x0
21568 /*
21569  * Enumerated value for register field ALT_USB_HOST_HCINT3_NAK
21570  *
21571  * NAK Response Received Interrupt
21572  */
21573 #define ALT_USB_HOST_HCINT3_NAK_E_ACT 0x1
21574 
21575 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_NAK register field. */
21576 #define ALT_USB_HOST_HCINT3_NAK_LSB 4
21577 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_NAK register field. */
21578 #define ALT_USB_HOST_HCINT3_NAK_MSB 4
21579 /* The width in bits of the ALT_USB_HOST_HCINT3_NAK register field. */
21580 #define ALT_USB_HOST_HCINT3_NAK_WIDTH 1
21581 /* The mask used to set the ALT_USB_HOST_HCINT3_NAK register field value. */
21582 #define ALT_USB_HOST_HCINT3_NAK_SET_MSK 0x00000010
21583 /* The mask used to clear the ALT_USB_HOST_HCINT3_NAK register field value. */
21584 #define ALT_USB_HOST_HCINT3_NAK_CLR_MSK 0xffffffef
21585 /* The reset value of the ALT_USB_HOST_HCINT3_NAK register field. */
21586 #define ALT_USB_HOST_HCINT3_NAK_RESET 0x0
21587 /* Extracts the ALT_USB_HOST_HCINT3_NAK field value from a register. */
21588 #define ALT_USB_HOST_HCINT3_NAK_GET(value) (((value) & 0x00000010) >> 4)
21589 /* Produces a ALT_USB_HOST_HCINT3_NAK register field value suitable for setting the register. */
21590 #define ALT_USB_HOST_HCINT3_NAK_SET(value) (((value) << 4) & 0x00000010)
21591 
21592 /*
21593  * Field : ACK Response Received Transmitted Interrupt - ack
21594  *
21595  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
21596  * This bit can be set only by the core and the application should write 1 to clear
21597  * it.
21598  *
21599  * Field Enumeration Values:
21600  *
21601  * Enum | Value | Description
21602  * :--------------------------------|:------|:-----------------------------------------------
21603  * ALT_USB_HOST_HCINT3_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
21604  * ALT_USB_HOST_HCINT3_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
21605  *
21606  * Field Access Macros:
21607  *
21608  */
21609 /*
21610  * Enumerated value for register field ALT_USB_HOST_HCINT3_ACK
21611  *
21612  * No ACK Response Received Transmitted Interrupt
21613  */
21614 #define ALT_USB_HOST_HCINT3_ACK_E_INACT 0x0
21615 /*
21616  * Enumerated value for register field ALT_USB_HOST_HCINT3_ACK
21617  *
21618  * ACK Response Received Transmitted Interrup
21619  */
21620 #define ALT_USB_HOST_HCINT3_ACK_E_ACT 0x1
21621 
21622 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_ACK register field. */
21623 #define ALT_USB_HOST_HCINT3_ACK_LSB 5
21624 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_ACK register field. */
21625 #define ALT_USB_HOST_HCINT3_ACK_MSB 5
21626 /* The width in bits of the ALT_USB_HOST_HCINT3_ACK register field. */
21627 #define ALT_USB_HOST_HCINT3_ACK_WIDTH 1
21628 /* The mask used to set the ALT_USB_HOST_HCINT3_ACK register field value. */
21629 #define ALT_USB_HOST_HCINT3_ACK_SET_MSK 0x00000020
21630 /* The mask used to clear the ALT_USB_HOST_HCINT3_ACK register field value. */
21631 #define ALT_USB_HOST_HCINT3_ACK_CLR_MSK 0xffffffdf
21632 /* The reset value of the ALT_USB_HOST_HCINT3_ACK register field. */
21633 #define ALT_USB_HOST_HCINT3_ACK_RESET 0x0
21634 /* Extracts the ALT_USB_HOST_HCINT3_ACK field value from a register. */
21635 #define ALT_USB_HOST_HCINT3_ACK_GET(value) (((value) & 0x00000020) >> 5)
21636 /* Produces a ALT_USB_HOST_HCINT3_ACK register field value suitable for setting the register. */
21637 #define ALT_USB_HOST_HCINT3_ACK_SET(value) (((value) << 5) & 0x00000020)
21638 
21639 /*
21640  * Field : NYET Response Received Interrupt - nyet
21641  *
21642  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
21643  * core.This bit can be set only by the core and the application should write 1 to
21644  * clear it.
21645  *
21646  * Field Enumeration Values:
21647  *
21648  * Enum | Value | Description
21649  * :---------------------------------|:------|:------------------------------------
21650  * ALT_USB_HOST_HCINT3_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
21651  * ALT_USB_HOST_HCINT3_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
21652  *
21653  * Field Access Macros:
21654  *
21655  */
21656 /*
21657  * Enumerated value for register field ALT_USB_HOST_HCINT3_NYET
21658  *
21659  * No NYET Response Received Interrupt
21660  */
21661 #define ALT_USB_HOST_HCINT3_NYET_E_INACT 0x0
21662 /*
21663  * Enumerated value for register field ALT_USB_HOST_HCINT3_NYET
21664  *
21665  * NYET Response Received Interrupt
21666  */
21667 #define ALT_USB_HOST_HCINT3_NYET_E_ACT 0x1
21668 
21669 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_NYET register field. */
21670 #define ALT_USB_HOST_HCINT3_NYET_LSB 6
21671 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_NYET register field. */
21672 #define ALT_USB_HOST_HCINT3_NYET_MSB 6
21673 /* The width in bits of the ALT_USB_HOST_HCINT3_NYET register field. */
21674 #define ALT_USB_HOST_HCINT3_NYET_WIDTH 1
21675 /* The mask used to set the ALT_USB_HOST_HCINT3_NYET register field value. */
21676 #define ALT_USB_HOST_HCINT3_NYET_SET_MSK 0x00000040
21677 /* The mask used to clear the ALT_USB_HOST_HCINT3_NYET register field value. */
21678 #define ALT_USB_HOST_HCINT3_NYET_CLR_MSK 0xffffffbf
21679 /* The reset value of the ALT_USB_HOST_HCINT3_NYET register field. */
21680 #define ALT_USB_HOST_HCINT3_NYET_RESET 0x0
21681 /* Extracts the ALT_USB_HOST_HCINT3_NYET field value from a register. */
21682 #define ALT_USB_HOST_HCINT3_NYET_GET(value) (((value) & 0x00000040) >> 6)
21683 /* Produces a ALT_USB_HOST_HCINT3_NYET register field value suitable for setting the register. */
21684 #define ALT_USB_HOST_HCINT3_NYET_SET(value) (((value) << 6) & 0x00000040)
21685 
21686 /*
21687  * Field : Transaction Error - xacterr
21688  *
21689  * Indicates one of the following errors occurred on the USB.-CRC check failure
21690  *
21691  * * Timeout
21692  *
21693  * * Bit stuff error
21694  *
21695  * * False EOP
21696  *
21697  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
21698  * This bit can be set only by the core and the application should write 1 to clear
21699  * it.
21700  *
21701  * Field Enumeration Values:
21702  *
21703  * Enum | Value | Description
21704  * :------------------------------------|:------|:---------------------
21705  * ALT_USB_HOST_HCINT3_XACTERR_E_INACT | 0x0 | No Transaction Error
21706  * ALT_USB_HOST_HCINT3_XACTERR_E_ACT | 0x1 | Transaction Error
21707  *
21708  * Field Access Macros:
21709  *
21710  */
21711 /*
21712  * Enumerated value for register field ALT_USB_HOST_HCINT3_XACTERR
21713  *
21714  * No Transaction Error
21715  */
21716 #define ALT_USB_HOST_HCINT3_XACTERR_E_INACT 0x0
21717 /*
21718  * Enumerated value for register field ALT_USB_HOST_HCINT3_XACTERR
21719  *
21720  * Transaction Error
21721  */
21722 #define ALT_USB_HOST_HCINT3_XACTERR_E_ACT 0x1
21723 
21724 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_XACTERR register field. */
21725 #define ALT_USB_HOST_HCINT3_XACTERR_LSB 7
21726 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_XACTERR register field. */
21727 #define ALT_USB_HOST_HCINT3_XACTERR_MSB 7
21728 /* The width in bits of the ALT_USB_HOST_HCINT3_XACTERR register field. */
21729 #define ALT_USB_HOST_HCINT3_XACTERR_WIDTH 1
21730 /* The mask used to set the ALT_USB_HOST_HCINT3_XACTERR register field value. */
21731 #define ALT_USB_HOST_HCINT3_XACTERR_SET_MSK 0x00000080
21732 /* The mask used to clear the ALT_USB_HOST_HCINT3_XACTERR register field value. */
21733 #define ALT_USB_HOST_HCINT3_XACTERR_CLR_MSK 0xffffff7f
21734 /* The reset value of the ALT_USB_HOST_HCINT3_XACTERR register field. */
21735 #define ALT_USB_HOST_HCINT3_XACTERR_RESET 0x0
21736 /* Extracts the ALT_USB_HOST_HCINT3_XACTERR field value from a register. */
21737 #define ALT_USB_HOST_HCINT3_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
21738 /* Produces a ALT_USB_HOST_HCINT3_XACTERR register field value suitable for setting the register. */
21739 #define ALT_USB_HOST_HCINT3_XACTERR_SET(value) (((value) << 7) & 0x00000080)
21740 
21741 /*
21742  * Field : Babble Error - bblerr
21743  *
21744  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
21745  * core..This bit can be set only by the core and the application should write 1 to
21746  * clear it.
21747  *
21748  * Field Enumeration Values:
21749  *
21750  * Enum | Value | Description
21751  * :-----------------------------------|:------|:----------------
21752  * ALT_USB_HOST_HCINT3_BBLERR_E_INACT | 0x0 | No Babble Error
21753  * ALT_USB_HOST_HCINT3_BBLERR_E_ACT | 0x1 | Babble Error
21754  *
21755  * Field Access Macros:
21756  *
21757  */
21758 /*
21759  * Enumerated value for register field ALT_USB_HOST_HCINT3_BBLERR
21760  *
21761  * No Babble Error
21762  */
21763 #define ALT_USB_HOST_HCINT3_BBLERR_E_INACT 0x0
21764 /*
21765  * Enumerated value for register field ALT_USB_HOST_HCINT3_BBLERR
21766  *
21767  * Babble Error
21768  */
21769 #define ALT_USB_HOST_HCINT3_BBLERR_E_ACT 0x1
21770 
21771 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_BBLERR register field. */
21772 #define ALT_USB_HOST_HCINT3_BBLERR_LSB 8
21773 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_BBLERR register field. */
21774 #define ALT_USB_HOST_HCINT3_BBLERR_MSB 8
21775 /* The width in bits of the ALT_USB_HOST_HCINT3_BBLERR register field. */
21776 #define ALT_USB_HOST_HCINT3_BBLERR_WIDTH 1
21777 /* The mask used to set the ALT_USB_HOST_HCINT3_BBLERR register field value. */
21778 #define ALT_USB_HOST_HCINT3_BBLERR_SET_MSK 0x00000100
21779 /* The mask used to clear the ALT_USB_HOST_HCINT3_BBLERR register field value. */
21780 #define ALT_USB_HOST_HCINT3_BBLERR_CLR_MSK 0xfffffeff
21781 /* The reset value of the ALT_USB_HOST_HCINT3_BBLERR register field. */
21782 #define ALT_USB_HOST_HCINT3_BBLERR_RESET 0x0
21783 /* Extracts the ALT_USB_HOST_HCINT3_BBLERR field value from a register. */
21784 #define ALT_USB_HOST_HCINT3_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
21785 /* Produces a ALT_USB_HOST_HCINT3_BBLERR register field value suitable for setting the register. */
21786 #define ALT_USB_HOST_HCINT3_BBLERR_SET(value) (((value) << 8) & 0x00000100)
21787 
21788 /*
21789  * Field : Frame Overrun - frmovrun
21790  *
21791  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
21792  * This bit can be set only by the core and the application should write 1 to clear
21793  * it.
21794  *
21795  * Field Enumeration Values:
21796  *
21797  * Enum | Value | Description
21798  * :-------------------------------------|:------|:-----------------
21799  * ALT_USB_HOST_HCINT3_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
21800  * ALT_USB_HOST_HCINT3_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
21801  *
21802  * Field Access Macros:
21803  *
21804  */
21805 /*
21806  * Enumerated value for register field ALT_USB_HOST_HCINT3_FRMOVRUN
21807  *
21808  * No Frame Overrun
21809  */
21810 #define ALT_USB_HOST_HCINT3_FRMOVRUN_E_INACT 0x0
21811 /*
21812  * Enumerated value for register field ALT_USB_HOST_HCINT3_FRMOVRUN
21813  *
21814  * Frame Overrun
21815  */
21816 #define ALT_USB_HOST_HCINT3_FRMOVRUN_E_ACT 0x1
21817 
21818 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_FRMOVRUN register field. */
21819 #define ALT_USB_HOST_HCINT3_FRMOVRUN_LSB 9
21820 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_FRMOVRUN register field. */
21821 #define ALT_USB_HOST_HCINT3_FRMOVRUN_MSB 9
21822 /* The width in bits of the ALT_USB_HOST_HCINT3_FRMOVRUN register field. */
21823 #define ALT_USB_HOST_HCINT3_FRMOVRUN_WIDTH 1
21824 /* The mask used to set the ALT_USB_HOST_HCINT3_FRMOVRUN register field value. */
21825 #define ALT_USB_HOST_HCINT3_FRMOVRUN_SET_MSK 0x00000200
21826 /* The mask used to clear the ALT_USB_HOST_HCINT3_FRMOVRUN register field value. */
21827 #define ALT_USB_HOST_HCINT3_FRMOVRUN_CLR_MSK 0xfffffdff
21828 /* The reset value of the ALT_USB_HOST_HCINT3_FRMOVRUN register field. */
21829 #define ALT_USB_HOST_HCINT3_FRMOVRUN_RESET 0x0
21830 /* Extracts the ALT_USB_HOST_HCINT3_FRMOVRUN field value from a register. */
21831 #define ALT_USB_HOST_HCINT3_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
21832 /* Produces a ALT_USB_HOST_HCINT3_FRMOVRUN register field value suitable for setting the register. */
21833 #define ALT_USB_HOST_HCINT3_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
21834 
21835 /*
21836  * Field : Data Toggle Error - datatglerr
21837  *
21838  * This bit can be set only by the core and the application should write 1 to clear
21839  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
21840  * core.
21841  *
21842  * Field Enumeration Values:
21843  *
21844  * Enum | Value | Description
21845  * :---------------------------------------|:------|:---------------------
21846  * ALT_USB_HOST_HCINT3_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
21847  * ALT_USB_HOST_HCINT3_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
21848  *
21849  * Field Access Macros:
21850  *
21851  */
21852 /*
21853  * Enumerated value for register field ALT_USB_HOST_HCINT3_DATATGLERR
21854  *
21855  * No Data Toggle Error
21856  */
21857 #define ALT_USB_HOST_HCINT3_DATATGLERR_E_INACT 0x0
21858 /*
21859  * Enumerated value for register field ALT_USB_HOST_HCINT3_DATATGLERR
21860  *
21861  * Data Toggle Error
21862  */
21863 #define ALT_USB_HOST_HCINT3_DATATGLERR_E_ACT 0x1
21864 
21865 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_DATATGLERR register field. */
21866 #define ALT_USB_HOST_HCINT3_DATATGLERR_LSB 10
21867 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_DATATGLERR register field. */
21868 #define ALT_USB_HOST_HCINT3_DATATGLERR_MSB 10
21869 /* The width in bits of the ALT_USB_HOST_HCINT3_DATATGLERR register field. */
21870 #define ALT_USB_HOST_HCINT3_DATATGLERR_WIDTH 1
21871 /* The mask used to set the ALT_USB_HOST_HCINT3_DATATGLERR register field value. */
21872 #define ALT_USB_HOST_HCINT3_DATATGLERR_SET_MSK 0x00000400
21873 /* The mask used to clear the ALT_USB_HOST_HCINT3_DATATGLERR register field value. */
21874 #define ALT_USB_HOST_HCINT3_DATATGLERR_CLR_MSK 0xfffffbff
21875 /* The reset value of the ALT_USB_HOST_HCINT3_DATATGLERR register field. */
21876 #define ALT_USB_HOST_HCINT3_DATATGLERR_RESET 0x0
21877 /* Extracts the ALT_USB_HOST_HCINT3_DATATGLERR field value from a register. */
21878 #define ALT_USB_HOST_HCINT3_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
21879 /* Produces a ALT_USB_HOST_HCINT3_DATATGLERR register field value suitable for setting the register. */
21880 #define ALT_USB_HOST_HCINT3_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
21881 
21882 /*
21883  * Field : BNA Interrupt - bnaintr
21884  *
21885  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
21886  * generates this interrupt when the descriptor accessed is not ready for the Core
21887  * to process. BNA will not be generated for Isochronous channels. for non
21888  * Scatter/Gather DMA mode, this bit is reserved.
21889  *
21890  * Field Enumeration Values:
21891  *
21892  * Enum | Value | Description
21893  * :------------------------------------|:------|:-----------------
21894  * ALT_USB_HOST_HCINT3_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
21895  * ALT_USB_HOST_HCINT3_BNAINTR_E_ACT | 0x1 | BNA Interrupt
21896  *
21897  * Field Access Macros:
21898  *
21899  */
21900 /*
21901  * Enumerated value for register field ALT_USB_HOST_HCINT3_BNAINTR
21902  *
21903  * No BNA Interrupt
21904  */
21905 #define ALT_USB_HOST_HCINT3_BNAINTR_E_INACT 0x0
21906 /*
21907  * Enumerated value for register field ALT_USB_HOST_HCINT3_BNAINTR
21908  *
21909  * BNA Interrupt
21910  */
21911 #define ALT_USB_HOST_HCINT3_BNAINTR_E_ACT 0x1
21912 
21913 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_BNAINTR register field. */
21914 #define ALT_USB_HOST_HCINT3_BNAINTR_LSB 11
21915 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_BNAINTR register field. */
21916 #define ALT_USB_HOST_HCINT3_BNAINTR_MSB 11
21917 /* The width in bits of the ALT_USB_HOST_HCINT3_BNAINTR register field. */
21918 #define ALT_USB_HOST_HCINT3_BNAINTR_WIDTH 1
21919 /* The mask used to set the ALT_USB_HOST_HCINT3_BNAINTR register field value. */
21920 #define ALT_USB_HOST_HCINT3_BNAINTR_SET_MSK 0x00000800
21921 /* The mask used to clear the ALT_USB_HOST_HCINT3_BNAINTR register field value. */
21922 #define ALT_USB_HOST_HCINT3_BNAINTR_CLR_MSK 0xfffff7ff
21923 /* The reset value of the ALT_USB_HOST_HCINT3_BNAINTR register field. */
21924 #define ALT_USB_HOST_HCINT3_BNAINTR_RESET 0x0
21925 /* Extracts the ALT_USB_HOST_HCINT3_BNAINTR field value from a register. */
21926 #define ALT_USB_HOST_HCINT3_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
21927 /* Produces a ALT_USB_HOST_HCINT3_BNAINTR register field value suitable for setting the register. */
21928 #define ALT_USB_HOST_HCINT3_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
21929 
21930 /*
21931  * Field : Excessive Transaction Error - xcs_xact_err
21932  *
21933  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
21934  * this bit when 3 consecutive transaction errors occurred on the USB bus.
21935  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
21936  * Scatter/Gather DMA mode, this bit is reserved.
21937  *
21938  * Field Enumeration Values:
21939  *
21940  * Enum | Value | Description
21941  * :-------------------------------------------|:------|:-------------------------------
21942  * ALT_USB_HOST_HCINT3_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
21943  * ALT_USB_HOST_HCINT3_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
21944  *
21945  * Field Access Macros:
21946  *
21947  */
21948 /*
21949  * Enumerated value for register field ALT_USB_HOST_HCINT3_XCS_XACT_ERR
21950  *
21951  * No Excessive Transaction Error
21952  */
21953 #define ALT_USB_HOST_HCINT3_XCS_XACT_ERR_E_INACT 0x0
21954 /*
21955  * Enumerated value for register field ALT_USB_HOST_HCINT3_XCS_XACT_ERR
21956  *
21957  * Excessive Transaction Error
21958  */
21959 #define ALT_USB_HOST_HCINT3_XCS_XACT_ERR_E_ACVTIVE 0x1
21960 
21961 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_XCS_XACT_ERR register field. */
21962 #define ALT_USB_HOST_HCINT3_XCS_XACT_ERR_LSB 12
21963 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_XCS_XACT_ERR register field. */
21964 #define ALT_USB_HOST_HCINT3_XCS_XACT_ERR_MSB 12
21965 /* The width in bits of the ALT_USB_HOST_HCINT3_XCS_XACT_ERR register field. */
21966 #define ALT_USB_HOST_HCINT3_XCS_XACT_ERR_WIDTH 1
21967 /* The mask used to set the ALT_USB_HOST_HCINT3_XCS_XACT_ERR register field value. */
21968 #define ALT_USB_HOST_HCINT3_XCS_XACT_ERR_SET_MSK 0x00001000
21969 /* The mask used to clear the ALT_USB_HOST_HCINT3_XCS_XACT_ERR register field value. */
21970 #define ALT_USB_HOST_HCINT3_XCS_XACT_ERR_CLR_MSK 0xffffefff
21971 /* The reset value of the ALT_USB_HOST_HCINT3_XCS_XACT_ERR register field. */
21972 #define ALT_USB_HOST_HCINT3_XCS_XACT_ERR_RESET 0x0
21973 /* Extracts the ALT_USB_HOST_HCINT3_XCS_XACT_ERR field value from a register. */
21974 #define ALT_USB_HOST_HCINT3_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
21975 /* Produces a ALT_USB_HOST_HCINT3_XCS_XACT_ERR register field value suitable for setting the register. */
21976 #define ALT_USB_HOST_HCINT3_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
21977 
21978 /*
21979  * Field : Descriptor rollover interrupt - desc_lst_rollintr
21980  *
21981  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
21982  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
21983  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
21984  * mode, this bit is reserved.
21985  *
21986  * Field Enumeration Values:
21987  *
21988  * Enum | Value | Description
21989  * :----------------------------------------------|:------|:---------------------------------
21990  * ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
21991  * ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
21992  *
21993  * Field Access Macros:
21994  *
21995  */
21996 /*
21997  * Enumerated value for register field ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR
21998  *
21999  * No Descriptor rollover interrupt
22000  */
22001 #define ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR_E_INACT 0x0
22002 /*
22003  * Enumerated value for register field ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR
22004  *
22005  * Descriptor rollover interrupt
22006  */
22007 #define ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR_E_ACT 0x1
22008 
22009 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR register field. */
22010 #define ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR_LSB 13
22011 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR register field. */
22012 #define ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR_MSB 13
22013 /* The width in bits of the ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR register field. */
22014 #define ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR_WIDTH 1
22015 /* The mask used to set the ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR register field value. */
22016 #define ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR_SET_MSK 0x00002000
22017 /* The mask used to clear the ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR register field value. */
22018 #define ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
22019 /* The reset value of the ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR register field. */
22020 #define ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR_RESET 0x0
22021 /* Extracts the ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR field value from a register. */
22022 #define ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
22023 /* Produces a ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR register field value suitable for setting the register. */
22024 #define ALT_USB_HOST_HCINT3_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
22025 
22026 #ifndef __ASSEMBLY__
22027 /*
22028  * WARNING: The C register and register group struct declarations are provided for
22029  * convenience and illustrative purposes. They should, however, be used with
22030  * caution as the C language standard provides no guarantees about the alignment or
22031  * atomicity of device memory accesses. The recommended practice for writing
22032  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
22033  * alt_write_word() functions.
22034  *
22035  * The struct declaration for register ALT_USB_HOST_HCINT3.
22036  */
22037 struct ALT_USB_HOST_HCINT3_s
22038 {
22039  const uint32_t xfercompl : 1; /* Transfer Completed */
22040  const uint32_t chhltd : 1; /* Channel Halted */
22041  const uint32_t ahberr : 1; /* AHB Error */
22042  const uint32_t stall : 1; /* STALL Response Received Interrupt */
22043  const uint32_t nak : 1; /* NAK Response Received Interrupt */
22044  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
22045  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
22046  const uint32_t xacterr : 1; /* Transaction Error */
22047  const uint32_t bblerr : 1; /* Babble Error */
22048  const uint32_t frmovrun : 1; /* Frame Overrun */
22049  const uint32_t datatglerr : 1; /* Data Toggle Error */
22050  const uint32_t bnaintr : 1; /* BNA Interrupt */
22051  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
22052  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
22053  uint32_t : 18; /* *UNDEFINED* */
22054 };
22055 
22056 /* The typedef declaration for register ALT_USB_HOST_HCINT3. */
22057 typedef volatile struct ALT_USB_HOST_HCINT3_s ALT_USB_HOST_HCINT3_t;
22058 #endif /* __ASSEMBLY__ */
22059 
22060 /* The byte offset of the ALT_USB_HOST_HCINT3 register from the beginning of the component. */
22061 #define ALT_USB_HOST_HCINT3_OFST 0x168
22062 /* The address of the ALT_USB_HOST_HCINT3 register. */
22063 #define ALT_USB_HOST_HCINT3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT3_OFST))
22064 
22065 /*
22066  * Register : Host Channel 3 Interrupt Mask Registe - hcintmsk3
22067  *
22068  * This register reflects the mask for each channel status described in the
22069  * previous section.
22070  *
22071  * Register Layout
22072  *
22073  * Bits | Access | Reset | Description
22074  * :--------|:-------|:------|:----------------------------------
22075  * [0] | RW | 0x0 | Transfer Completed Mask
22076  * [1] | RW | 0x0 | Channel Halted Mask
22077  * [2] | RW | 0x0 | AHB Error Mask
22078  * [10:3] | ??? | 0x0 | *UNDEFINED*
22079  * [11] | RW | 0x0 | BNA Interrupt mask
22080  * [12] | ??? | 0x0 | *UNDEFINED*
22081  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
22082  * [31:14] | ??? | 0x0 | *UNDEFINED*
22083  *
22084  */
22085 /*
22086  * Field : Transfer Completed Mask - xfercomplmsk
22087  *
22088  * Transfer complete.
22089  *
22090  * Field Enumeration Values:
22091  *
22092  * Enum | Value | Description
22093  * :--------------------------------------------|:------|:------------
22094  * ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK_E_MSK | 0x0 | Mask
22095  * ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
22096  *
22097  * Field Access Macros:
22098  *
22099  */
22100 /*
22101  * Enumerated value for register field ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK
22102  *
22103  * Mask
22104  */
22105 #define ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK_E_MSK 0x0
22106 /*
22107  * Enumerated value for register field ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK
22108  *
22109  * No mask
22110  */
22111 #define ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK_E_NOMSK 0x1
22112 
22113 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK register field. */
22114 #define ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK_LSB 0
22115 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK register field. */
22116 #define ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK_MSB 0
22117 /* The width in bits of the ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK register field. */
22118 #define ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK_WIDTH 1
22119 /* The mask used to set the ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK register field value. */
22120 #define ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK_SET_MSK 0x00000001
22121 /* The mask used to clear the ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK register field value. */
22122 #define ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK_CLR_MSK 0xfffffffe
22123 /* The reset value of the ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK register field. */
22124 #define ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK_RESET 0x0
22125 /* Extracts the ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK field value from a register. */
22126 #define ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
22127 /* Produces a ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK register field value suitable for setting the register. */
22128 #define ALT_USB_HOST_HCINTMSK3_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
22129 
22130 /*
22131  * Field : Channel Halted Mask - chhltdmsk
22132  *
22133  * Channel Halted.
22134  *
22135  * Field Enumeration Values:
22136  *
22137  * Enum | Value | Description
22138  * :-----------------------------------------|:------|:------------
22139  * ALT_USB_HOST_HCINTMSK3_CHHLTDMSK_E_MSK | 0x0 | Mask
22140  * ALT_USB_HOST_HCINTMSK3_CHHLTDMSK_E_NOMSK | 0x1 | No mask
22141  *
22142  * Field Access Macros:
22143  *
22144  */
22145 /*
22146  * Enumerated value for register field ALT_USB_HOST_HCINTMSK3_CHHLTDMSK
22147  *
22148  * Mask
22149  */
22150 #define ALT_USB_HOST_HCINTMSK3_CHHLTDMSK_E_MSK 0x0
22151 /*
22152  * Enumerated value for register field ALT_USB_HOST_HCINTMSK3_CHHLTDMSK
22153  *
22154  * No mask
22155  */
22156 #define ALT_USB_HOST_HCINTMSK3_CHHLTDMSK_E_NOMSK 0x1
22157 
22158 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK3_CHHLTDMSK register field. */
22159 #define ALT_USB_HOST_HCINTMSK3_CHHLTDMSK_LSB 1
22160 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK3_CHHLTDMSK register field. */
22161 #define ALT_USB_HOST_HCINTMSK3_CHHLTDMSK_MSB 1
22162 /* The width in bits of the ALT_USB_HOST_HCINTMSK3_CHHLTDMSK register field. */
22163 #define ALT_USB_HOST_HCINTMSK3_CHHLTDMSK_WIDTH 1
22164 /* The mask used to set the ALT_USB_HOST_HCINTMSK3_CHHLTDMSK register field value. */
22165 #define ALT_USB_HOST_HCINTMSK3_CHHLTDMSK_SET_MSK 0x00000002
22166 /* The mask used to clear the ALT_USB_HOST_HCINTMSK3_CHHLTDMSK register field value. */
22167 #define ALT_USB_HOST_HCINTMSK3_CHHLTDMSK_CLR_MSK 0xfffffffd
22168 /* The reset value of the ALT_USB_HOST_HCINTMSK3_CHHLTDMSK register field. */
22169 #define ALT_USB_HOST_HCINTMSK3_CHHLTDMSK_RESET 0x0
22170 /* Extracts the ALT_USB_HOST_HCINTMSK3_CHHLTDMSK field value from a register. */
22171 #define ALT_USB_HOST_HCINTMSK3_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
22172 /* Produces a ALT_USB_HOST_HCINTMSK3_CHHLTDMSK register field value suitable for setting the register. */
22173 #define ALT_USB_HOST_HCINTMSK3_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
22174 
22175 /*
22176  * Field : AHB Error Mask - ahberrmsk
22177  *
22178  * In scatter/gather DMA mode for host, interrupts will not be generated due to
22179  * the corresponding bits set in HCINTn.
22180  *
22181  * Field Enumeration Values:
22182  *
22183  * Enum | Value | Description
22184  * :-----------------------------------------|:------|:------------
22185  * ALT_USB_HOST_HCINTMSK3_AHBERRMSK_E_MSK | 0x0 | Mask
22186  * ALT_USB_HOST_HCINTMSK3_AHBERRMSK_E_NOMSK | 0x1 | No mask
22187  *
22188  * Field Access Macros:
22189  *
22190  */
22191 /*
22192  * Enumerated value for register field ALT_USB_HOST_HCINTMSK3_AHBERRMSK
22193  *
22194  * Mask
22195  */
22196 #define ALT_USB_HOST_HCINTMSK3_AHBERRMSK_E_MSK 0x0
22197 /*
22198  * Enumerated value for register field ALT_USB_HOST_HCINTMSK3_AHBERRMSK
22199  *
22200  * No mask
22201  */
22202 #define ALT_USB_HOST_HCINTMSK3_AHBERRMSK_E_NOMSK 0x1
22203 
22204 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK3_AHBERRMSK register field. */
22205 #define ALT_USB_HOST_HCINTMSK3_AHBERRMSK_LSB 2
22206 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK3_AHBERRMSK register field. */
22207 #define ALT_USB_HOST_HCINTMSK3_AHBERRMSK_MSB 2
22208 /* The width in bits of the ALT_USB_HOST_HCINTMSK3_AHBERRMSK register field. */
22209 #define ALT_USB_HOST_HCINTMSK3_AHBERRMSK_WIDTH 1
22210 /* The mask used to set the ALT_USB_HOST_HCINTMSK3_AHBERRMSK register field value. */
22211 #define ALT_USB_HOST_HCINTMSK3_AHBERRMSK_SET_MSK 0x00000004
22212 /* The mask used to clear the ALT_USB_HOST_HCINTMSK3_AHBERRMSK register field value. */
22213 #define ALT_USB_HOST_HCINTMSK3_AHBERRMSK_CLR_MSK 0xfffffffb
22214 /* The reset value of the ALT_USB_HOST_HCINTMSK3_AHBERRMSK register field. */
22215 #define ALT_USB_HOST_HCINTMSK3_AHBERRMSK_RESET 0x0
22216 /* Extracts the ALT_USB_HOST_HCINTMSK3_AHBERRMSK field value from a register. */
22217 #define ALT_USB_HOST_HCINTMSK3_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
22218 /* Produces a ALT_USB_HOST_HCINTMSK3_AHBERRMSK register field value suitable for setting the register. */
22219 #define ALT_USB_HOST_HCINTMSK3_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
22220 
22221 /*
22222  * Field : BNA Interrupt mask - bnaintrmsk
22223  *
22224  * This bit is valid only when Scatter/Gather DMA mode is enabled.
22225  *
22226  * Field Enumeration Values:
22227  *
22228  * Enum | Value | Description
22229  * :------------------------------------------|:------|:------------
22230  * ALT_USB_HOST_HCINTMSK3_BNAINTRMSK_E_MSK | 0x0 | Mask
22231  * ALT_USB_HOST_HCINTMSK3_BNAINTRMSK_E_NOMSK | 0x1 | No mask
22232  *
22233  * Field Access Macros:
22234  *
22235  */
22236 /*
22237  * Enumerated value for register field ALT_USB_HOST_HCINTMSK3_BNAINTRMSK
22238  *
22239  * Mask
22240  */
22241 #define ALT_USB_HOST_HCINTMSK3_BNAINTRMSK_E_MSK 0x0
22242 /*
22243  * Enumerated value for register field ALT_USB_HOST_HCINTMSK3_BNAINTRMSK
22244  *
22245  * No mask
22246  */
22247 #define ALT_USB_HOST_HCINTMSK3_BNAINTRMSK_E_NOMSK 0x1
22248 
22249 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK3_BNAINTRMSK register field. */
22250 #define ALT_USB_HOST_HCINTMSK3_BNAINTRMSK_LSB 11
22251 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK3_BNAINTRMSK register field. */
22252 #define ALT_USB_HOST_HCINTMSK3_BNAINTRMSK_MSB 11
22253 /* The width in bits of the ALT_USB_HOST_HCINTMSK3_BNAINTRMSK register field. */
22254 #define ALT_USB_HOST_HCINTMSK3_BNAINTRMSK_WIDTH 1
22255 /* The mask used to set the ALT_USB_HOST_HCINTMSK3_BNAINTRMSK register field value. */
22256 #define ALT_USB_HOST_HCINTMSK3_BNAINTRMSK_SET_MSK 0x00000800
22257 /* The mask used to clear the ALT_USB_HOST_HCINTMSK3_BNAINTRMSK register field value. */
22258 #define ALT_USB_HOST_HCINTMSK3_BNAINTRMSK_CLR_MSK 0xfffff7ff
22259 /* The reset value of the ALT_USB_HOST_HCINTMSK3_BNAINTRMSK register field. */
22260 #define ALT_USB_HOST_HCINTMSK3_BNAINTRMSK_RESET 0x0
22261 /* Extracts the ALT_USB_HOST_HCINTMSK3_BNAINTRMSK field value from a register. */
22262 #define ALT_USB_HOST_HCINTMSK3_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
22263 /* Produces a ALT_USB_HOST_HCINTMSK3_BNAINTRMSK register field value suitable for setting the register. */
22264 #define ALT_USB_HOST_HCINTMSK3_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
22265 
22266 /*
22267  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
22268  *
22269  * This bit is valid only when Scatter/Gather DMA mode is enabled.
22270  *
22271  * Field Enumeration Values:
22272  *
22273  * Enum | Value | Description
22274  * :---------------------------------------------------|:------|:------------
22275  * ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
22276  * ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
22277  *
22278  * Field Access Macros:
22279  *
22280  */
22281 /*
22282  * Enumerated value for register field ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK
22283  *
22284  * Mask
22285  */
22286 #define ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK_E_MSK 0x0
22287 /*
22288  * Enumerated value for register field ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK
22289  *
22290  * No mask
22291  */
22292 #define ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
22293 
22294 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK register field. */
22295 #define ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK_LSB 13
22296 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK register field. */
22297 #define ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK_MSB 13
22298 /* The width in bits of the ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK register field. */
22299 #define ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK_WIDTH 1
22300 /* The mask used to set the ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK register field value. */
22301 #define ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
22302 /* The mask used to clear the ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK register field value. */
22303 #define ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
22304 /* The reset value of the ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK register field. */
22305 #define ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK_RESET 0x0
22306 /* Extracts the ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK field value from a register. */
22307 #define ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
22308 /* Produces a ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
22309 #define ALT_USB_HOST_HCINTMSK3_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
22310 
22311 #ifndef __ASSEMBLY__
22312 /*
22313  * WARNING: The C register and register group struct declarations are provided for
22314  * convenience and illustrative purposes. They should, however, be used with
22315  * caution as the C language standard provides no guarantees about the alignment or
22316  * atomicity of device memory accesses. The recommended practice for writing
22317  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
22318  * alt_write_word() functions.
22319  *
22320  * The struct declaration for register ALT_USB_HOST_HCINTMSK3.
22321  */
22322 struct ALT_USB_HOST_HCINTMSK3_s
22323 {
22324  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
22325  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
22326  uint32_t ahberrmsk : 1; /* AHB Error Mask */
22327  uint32_t : 8; /* *UNDEFINED* */
22328  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
22329  uint32_t : 1; /* *UNDEFINED* */
22330  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
22331  uint32_t : 18; /* *UNDEFINED* */
22332 };
22333 
22334 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK3. */
22335 typedef volatile struct ALT_USB_HOST_HCINTMSK3_s ALT_USB_HOST_HCINTMSK3_t;
22336 #endif /* __ASSEMBLY__ */
22337 
22338 /* The byte offset of the ALT_USB_HOST_HCINTMSK3 register from the beginning of the component. */
22339 #define ALT_USB_HOST_HCINTMSK3_OFST 0x16c
22340 /* The address of the ALT_USB_HOST_HCINTMSK3 register. */
22341 #define ALT_USB_HOST_HCINTMSK3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK3_OFST))
22342 
22343 /*
22344  * Register : Host Channel 3 Transfer Size Registe - hctsiz3
22345  *
22346  * Buffer DMA Mode
22347  *
22348  * Register Layout
22349  *
22350  * Bits | Access | Reset | Description
22351  * :--------|:-------|:------|:--------------
22352  * [18:0] | RW | 0x0 | Transfer Size
22353  * [28:19] | RW | 0x0 | Packet Count
22354  * [30:29] | RW | 0x0 | PID
22355  * [31] | RW | 0x0 | Do Ping
22356  *
22357  */
22358 /*
22359  * Field : Transfer Size - xfersize
22360  *
22361  * for an OUT, this field is the number of data bytes the host sends during the
22362  * transfer. for an IN, this field is the buffer size that the application has
22363  * Reserved for the transfer. The application is expected to program this field as
22364  * an integer multiple of the maximum packet size for IN transactions (periodic and
22365  * non-periodic).The width of this counter is specified as 19 bits.
22366  *
22367  * Field Access Macros:
22368  *
22369  */
22370 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ3_XFERSIZE register field. */
22371 #define ALT_USB_HOST_HCTSIZ3_XFERSIZE_LSB 0
22372 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ3_XFERSIZE register field. */
22373 #define ALT_USB_HOST_HCTSIZ3_XFERSIZE_MSB 18
22374 /* The width in bits of the ALT_USB_HOST_HCTSIZ3_XFERSIZE register field. */
22375 #define ALT_USB_HOST_HCTSIZ3_XFERSIZE_WIDTH 19
22376 /* The mask used to set the ALT_USB_HOST_HCTSIZ3_XFERSIZE register field value. */
22377 #define ALT_USB_HOST_HCTSIZ3_XFERSIZE_SET_MSK 0x0007ffff
22378 /* The mask used to clear the ALT_USB_HOST_HCTSIZ3_XFERSIZE register field value. */
22379 #define ALT_USB_HOST_HCTSIZ3_XFERSIZE_CLR_MSK 0xfff80000
22380 /* The reset value of the ALT_USB_HOST_HCTSIZ3_XFERSIZE register field. */
22381 #define ALT_USB_HOST_HCTSIZ3_XFERSIZE_RESET 0x0
22382 /* Extracts the ALT_USB_HOST_HCTSIZ3_XFERSIZE field value from a register. */
22383 #define ALT_USB_HOST_HCTSIZ3_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
22384 /* Produces a ALT_USB_HOST_HCTSIZ3_XFERSIZE register field value suitable for setting the register. */
22385 #define ALT_USB_HOST_HCTSIZ3_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
22386 
22387 /*
22388  * Field : Packet Count - pktcnt
22389  *
22390  * This field is programmed by the application with the expected number of packets
22391  * to be transmitted (OUT) or received (IN). The host decrements this count on
22392  * every successful transmission or reception of an OUT/IN packet. Once this count
22393  * reaches zero, the application is interrupted to indicate normal completion. The
22394  * width of this counter is specified as 10 bits.
22395  *
22396  * Field Access Macros:
22397  *
22398  */
22399 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ3_PKTCNT register field. */
22400 #define ALT_USB_HOST_HCTSIZ3_PKTCNT_LSB 19
22401 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ3_PKTCNT register field. */
22402 #define ALT_USB_HOST_HCTSIZ3_PKTCNT_MSB 28
22403 /* The width in bits of the ALT_USB_HOST_HCTSIZ3_PKTCNT register field. */
22404 #define ALT_USB_HOST_HCTSIZ3_PKTCNT_WIDTH 10
22405 /* The mask used to set the ALT_USB_HOST_HCTSIZ3_PKTCNT register field value. */
22406 #define ALT_USB_HOST_HCTSIZ3_PKTCNT_SET_MSK 0x1ff80000
22407 /* The mask used to clear the ALT_USB_HOST_HCTSIZ3_PKTCNT register field value. */
22408 #define ALT_USB_HOST_HCTSIZ3_PKTCNT_CLR_MSK 0xe007ffff
22409 /* The reset value of the ALT_USB_HOST_HCTSIZ3_PKTCNT register field. */
22410 #define ALT_USB_HOST_HCTSIZ3_PKTCNT_RESET 0x0
22411 /* Extracts the ALT_USB_HOST_HCTSIZ3_PKTCNT field value from a register. */
22412 #define ALT_USB_HOST_HCTSIZ3_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
22413 /* Produces a ALT_USB_HOST_HCTSIZ3_PKTCNT register field value suitable for setting the register. */
22414 #define ALT_USB_HOST_HCTSIZ3_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
22415 
22416 /*
22417  * Field : PID - pid
22418  *
22419  * The application programs this field with the type of PID to use forthe initial
22420  * transaction. The host maintains this field for the rest of the transfer.
22421  *
22422  * Field Enumeration Values:
22423  *
22424  * Enum | Value | Description
22425  * :---------------------------------|:------|:------------------------------------
22426  * ALT_USB_HOST_HCTSIZ3_PID_E_DATA0 | 0x0 | DATA0
22427  * ALT_USB_HOST_HCTSIZ3_PID_E_DATA2 | 0x1 | DATA2
22428  * ALT_USB_HOST_HCTSIZ3_PID_E_DATA1 | 0x2 | DATA1
22429  * ALT_USB_HOST_HCTSIZ3_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
22430  *
22431  * Field Access Macros:
22432  *
22433  */
22434 /*
22435  * Enumerated value for register field ALT_USB_HOST_HCTSIZ3_PID
22436  *
22437  * DATA0
22438  */
22439 #define ALT_USB_HOST_HCTSIZ3_PID_E_DATA0 0x0
22440 /*
22441  * Enumerated value for register field ALT_USB_HOST_HCTSIZ3_PID
22442  *
22443  * DATA2
22444  */
22445 #define ALT_USB_HOST_HCTSIZ3_PID_E_DATA2 0x1
22446 /*
22447  * Enumerated value for register field ALT_USB_HOST_HCTSIZ3_PID
22448  *
22449  * DATA1
22450  */
22451 #define ALT_USB_HOST_HCTSIZ3_PID_E_DATA1 0x2
22452 /*
22453  * Enumerated value for register field ALT_USB_HOST_HCTSIZ3_PID
22454  *
22455  * MDATA (non-control)/SETUP (control)
22456  */
22457 #define ALT_USB_HOST_HCTSIZ3_PID_E_MDATA 0x3
22458 
22459 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ3_PID register field. */
22460 #define ALT_USB_HOST_HCTSIZ3_PID_LSB 29
22461 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ3_PID register field. */
22462 #define ALT_USB_HOST_HCTSIZ3_PID_MSB 30
22463 /* The width in bits of the ALT_USB_HOST_HCTSIZ3_PID register field. */
22464 #define ALT_USB_HOST_HCTSIZ3_PID_WIDTH 2
22465 /* The mask used to set the ALT_USB_HOST_HCTSIZ3_PID register field value. */
22466 #define ALT_USB_HOST_HCTSIZ3_PID_SET_MSK 0x60000000
22467 /* The mask used to clear the ALT_USB_HOST_HCTSIZ3_PID register field value. */
22468 #define ALT_USB_HOST_HCTSIZ3_PID_CLR_MSK 0x9fffffff
22469 /* The reset value of the ALT_USB_HOST_HCTSIZ3_PID register field. */
22470 #define ALT_USB_HOST_HCTSIZ3_PID_RESET 0x0
22471 /* Extracts the ALT_USB_HOST_HCTSIZ3_PID field value from a register. */
22472 #define ALT_USB_HOST_HCTSIZ3_PID_GET(value) (((value) & 0x60000000) >> 29)
22473 /* Produces a ALT_USB_HOST_HCTSIZ3_PID register field value suitable for setting the register. */
22474 #define ALT_USB_HOST_HCTSIZ3_PID_SET(value) (((value) << 29) & 0x60000000)
22475 
22476 /*
22477  * Field : Do Ping - dopng
22478  *
22479  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
22480  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
22481  * for IN transfers it disables the channel.
22482  *
22483  * Field Enumeration Values:
22484  *
22485  * Enum | Value | Description
22486  * :------------------------------------|:------|:-----------------
22487  * ALT_USB_HOST_HCTSIZ3_DOPNG_E_NOPING | 0x0 | No ping protocol
22488  * ALT_USB_HOST_HCTSIZ3_DOPNG_E_PING | 0x1 | Ping protocol
22489  *
22490  * Field Access Macros:
22491  *
22492  */
22493 /*
22494  * Enumerated value for register field ALT_USB_HOST_HCTSIZ3_DOPNG
22495  *
22496  * No ping protocol
22497  */
22498 #define ALT_USB_HOST_HCTSIZ3_DOPNG_E_NOPING 0x0
22499 /*
22500  * Enumerated value for register field ALT_USB_HOST_HCTSIZ3_DOPNG
22501  *
22502  * Ping protocol
22503  */
22504 #define ALT_USB_HOST_HCTSIZ3_DOPNG_E_PING 0x1
22505 
22506 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ3_DOPNG register field. */
22507 #define ALT_USB_HOST_HCTSIZ3_DOPNG_LSB 31
22508 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ3_DOPNG register field. */
22509 #define ALT_USB_HOST_HCTSIZ3_DOPNG_MSB 31
22510 /* The width in bits of the ALT_USB_HOST_HCTSIZ3_DOPNG register field. */
22511 #define ALT_USB_HOST_HCTSIZ3_DOPNG_WIDTH 1
22512 /* The mask used to set the ALT_USB_HOST_HCTSIZ3_DOPNG register field value. */
22513 #define ALT_USB_HOST_HCTSIZ3_DOPNG_SET_MSK 0x80000000
22514 /* The mask used to clear the ALT_USB_HOST_HCTSIZ3_DOPNG register field value. */
22515 #define ALT_USB_HOST_HCTSIZ3_DOPNG_CLR_MSK 0x7fffffff
22516 /* The reset value of the ALT_USB_HOST_HCTSIZ3_DOPNG register field. */
22517 #define ALT_USB_HOST_HCTSIZ3_DOPNG_RESET 0x0
22518 /* Extracts the ALT_USB_HOST_HCTSIZ3_DOPNG field value from a register. */
22519 #define ALT_USB_HOST_HCTSIZ3_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
22520 /* Produces a ALT_USB_HOST_HCTSIZ3_DOPNG register field value suitable for setting the register. */
22521 #define ALT_USB_HOST_HCTSIZ3_DOPNG_SET(value) (((value) << 31) & 0x80000000)
22522 
22523 #ifndef __ASSEMBLY__
22524 /*
22525  * WARNING: The C register and register group struct declarations are provided for
22526  * convenience and illustrative purposes. They should, however, be used with
22527  * caution as the C language standard provides no guarantees about the alignment or
22528  * atomicity of device memory accesses. The recommended practice for writing
22529  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
22530  * alt_write_word() functions.
22531  *
22532  * The struct declaration for register ALT_USB_HOST_HCTSIZ3.
22533  */
22534 struct ALT_USB_HOST_HCTSIZ3_s
22535 {
22536  uint32_t xfersize : 19; /* Transfer Size */
22537  uint32_t pktcnt : 10; /* Packet Count */
22538  uint32_t pid : 2; /* PID */
22539  uint32_t dopng : 1; /* Do Ping */
22540 };
22541 
22542 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ3. */
22543 typedef volatile struct ALT_USB_HOST_HCTSIZ3_s ALT_USB_HOST_HCTSIZ3_t;
22544 #endif /* __ASSEMBLY__ */
22545 
22546 /* The byte offset of the ALT_USB_HOST_HCTSIZ3 register from the beginning of the component. */
22547 #define ALT_USB_HOST_HCTSIZ3_OFST 0x170
22548 /* The address of the ALT_USB_HOST_HCTSIZ3 register. */
22549 #define ALT_USB_HOST_HCTSIZ3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ3_OFST))
22550 
22551 /*
22552  * Register : Host Channel 3 DMA Address Register - hcdma3
22553  *
22554  * This register is used by the OTG host in the internal DMA mode to maintain the
22555  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
22556  * DWORD-aligned.
22557  *
22558  * Register Layout
22559  *
22560  * Bits | Access | Reset | Description
22561  * :-------|:-------|:------|:------------
22562  * [31:0] | RW | 0x0 | DMA Address
22563  *
22564  */
22565 /*
22566  * Field : DMA Address - hcdma3
22567  *
22568  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
22569  * first descriptor in the list should be located in this address. The first
22570  * descriptor may be or may not be ready. The core starts processing the list from
22571  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
22572  * in which the isochronous descriptors are present where N is based on nTD as per
22573  * Table below
22574  *
22575  * [31:N] Base Address [N-1:3] Offset [2:0] 000
22576  *
22577  * HS ISOC FS ISOC
22578  *
22579  * nTD N nTD N
22580  *
22581  * 7 6 1 4
22582  *
22583  * 15 7 3 5
22584  *
22585  * 31 8 7 6
22586  *
22587  * 63 9 15 7
22588  *
22589  * 127 10 31 8
22590  *
22591  * 255 11 63 9
22592  *
22593  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
22594  * This value is in terms of number of descriptors. The values can be from 0 to 63.
22595  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
22596  * descriptor processed in the list. This field is updated both by application and
22597  * the core. for example, if the application enables the channel after programming
22598  * CTD=5, then the core will start processing the 6th descriptor. The address is
22599  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
22600  * CTD for isochronous is based on the current frame/microframe value. Need to be
22601  * set to zero by application.
22602  *
22603  * Field Access Macros:
22604  *
22605  */
22606 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA3_HCDMA3 register field. */
22607 #define ALT_USB_HOST_HCDMA3_HCDMA3_LSB 0
22608 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA3_HCDMA3 register field. */
22609 #define ALT_USB_HOST_HCDMA3_HCDMA3_MSB 31
22610 /* The width in bits of the ALT_USB_HOST_HCDMA3_HCDMA3 register field. */
22611 #define ALT_USB_HOST_HCDMA3_HCDMA3_WIDTH 32
22612 /* The mask used to set the ALT_USB_HOST_HCDMA3_HCDMA3 register field value. */
22613 #define ALT_USB_HOST_HCDMA3_HCDMA3_SET_MSK 0xffffffff
22614 /* The mask used to clear the ALT_USB_HOST_HCDMA3_HCDMA3 register field value. */
22615 #define ALT_USB_HOST_HCDMA3_HCDMA3_CLR_MSK 0x00000000
22616 /* The reset value of the ALT_USB_HOST_HCDMA3_HCDMA3 register field. */
22617 #define ALT_USB_HOST_HCDMA3_HCDMA3_RESET 0x0
22618 /* Extracts the ALT_USB_HOST_HCDMA3_HCDMA3 field value from a register. */
22619 #define ALT_USB_HOST_HCDMA3_HCDMA3_GET(value) (((value) & 0xffffffff) >> 0)
22620 /* Produces a ALT_USB_HOST_HCDMA3_HCDMA3 register field value suitable for setting the register. */
22621 #define ALT_USB_HOST_HCDMA3_HCDMA3_SET(value) (((value) << 0) & 0xffffffff)
22622 
22623 #ifndef __ASSEMBLY__
22624 /*
22625  * WARNING: The C register and register group struct declarations are provided for
22626  * convenience and illustrative purposes. They should, however, be used with
22627  * caution as the C language standard provides no guarantees about the alignment or
22628  * atomicity of device memory accesses. The recommended practice for writing
22629  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
22630  * alt_write_word() functions.
22631  *
22632  * The struct declaration for register ALT_USB_HOST_HCDMA3.
22633  */
22634 struct ALT_USB_HOST_HCDMA3_s
22635 {
22636  uint32_t hcdma3 : 32; /* DMA Address */
22637 };
22638 
22639 /* The typedef declaration for register ALT_USB_HOST_HCDMA3. */
22640 typedef volatile struct ALT_USB_HOST_HCDMA3_s ALT_USB_HOST_HCDMA3_t;
22641 #endif /* __ASSEMBLY__ */
22642 
22643 /* The byte offset of the ALT_USB_HOST_HCDMA3 register from the beginning of the component. */
22644 #define ALT_USB_HOST_HCDMA3_OFST 0x174
22645 /* The address of the ALT_USB_HOST_HCDMA3 register. */
22646 #define ALT_USB_HOST_HCDMA3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA3_OFST))
22647 
22648 /*
22649  * Register : Host Channel 3 DMA Buffer Address Register - hcdmab3
22650  *
22651  * These registers are present only in case of Scatter/Gather DMA. These
22652  * registers are implemented in RAM instead of flop-based implementation. Holds
22653  * the current buffer address. This register is updated as and when the
22654  * data transfer for the corresponding end point is in progress. This
22655  * register is present only in Scatter/Gather DMA mode. Otherwise this field
22656  * is reserved.
22657  *
22658  * Register Layout
22659  *
22660  * Bits | Access | Reset | Description
22661  * :-------|:-------|:------|:----------------------------------
22662  * [31:0] | RW | 0x0 | Host Channel 3 DMA Buffer Address
22663  *
22664  */
22665 /*
22666  * Field : Host Channel 3 DMA Buffer Address - hcdmab3
22667  *
22668  * These registers are present only in case of Scatter/Gather DMA. These
22669  * registers are implemented in RAM instead of flop-based implementation. Holds
22670  * the current buffer address. This register is updated as and when the data
22671  * transfer for the corresponding end point is in progress. This register is
22672  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
22673  *
22674  * Field Access Macros:
22675  *
22676  */
22677 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB3_HCDMAB3 register field. */
22678 #define ALT_USB_HOST_HCDMAB3_HCDMAB3_LSB 0
22679 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB3_HCDMAB3 register field. */
22680 #define ALT_USB_HOST_HCDMAB3_HCDMAB3_MSB 31
22681 /* The width in bits of the ALT_USB_HOST_HCDMAB3_HCDMAB3 register field. */
22682 #define ALT_USB_HOST_HCDMAB3_HCDMAB3_WIDTH 32
22683 /* The mask used to set the ALT_USB_HOST_HCDMAB3_HCDMAB3 register field value. */
22684 #define ALT_USB_HOST_HCDMAB3_HCDMAB3_SET_MSK 0xffffffff
22685 /* The mask used to clear the ALT_USB_HOST_HCDMAB3_HCDMAB3 register field value. */
22686 #define ALT_USB_HOST_HCDMAB3_HCDMAB3_CLR_MSK 0x00000000
22687 /* The reset value of the ALT_USB_HOST_HCDMAB3_HCDMAB3 register field. */
22688 #define ALT_USB_HOST_HCDMAB3_HCDMAB3_RESET 0x0
22689 /* Extracts the ALT_USB_HOST_HCDMAB3_HCDMAB3 field value from a register. */
22690 #define ALT_USB_HOST_HCDMAB3_HCDMAB3_GET(value) (((value) & 0xffffffff) >> 0)
22691 /* Produces a ALT_USB_HOST_HCDMAB3_HCDMAB3 register field value suitable for setting the register. */
22692 #define ALT_USB_HOST_HCDMAB3_HCDMAB3_SET(value) (((value) << 0) & 0xffffffff)
22693 
22694 #ifndef __ASSEMBLY__
22695 /*
22696  * WARNING: The C register and register group struct declarations are provided for
22697  * convenience and illustrative purposes. They should, however, be used with
22698  * caution as the C language standard provides no guarantees about the alignment or
22699  * atomicity of device memory accesses. The recommended practice for writing
22700  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
22701  * alt_write_word() functions.
22702  *
22703  * The struct declaration for register ALT_USB_HOST_HCDMAB3.
22704  */
22705 struct ALT_USB_HOST_HCDMAB3_s
22706 {
22707  uint32_t hcdmab3 : 32; /* Host Channel 3 DMA Buffer Address */
22708 };
22709 
22710 /* The typedef declaration for register ALT_USB_HOST_HCDMAB3. */
22711 typedef volatile struct ALT_USB_HOST_HCDMAB3_s ALT_USB_HOST_HCDMAB3_t;
22712 #endif /* __ASSEMBLY__ */
22713 
22714 /* The byte offset of the ALT_USB_HOST_HCDMAB3 register from the beginning of the component. */
22715 #define ALT_USB_HOST_HCDMAB3_OFST 0x178
22716 /* The address of the ALT_USB_HOST_HCDMAB3 register. */
22717 #define ALT_USB_HOST_HCDMAB3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB3_OFST))
22718 
22719 /*
22720  * Register : Host Channel 4 Characteristics Register - hcchar4
22721  *
22722  * These registers are present only in case of Scatter/Gather DMA. These
22723  * registers are implemented in RAM instead of flop-based implementation. Holds
22724  * the current buffer address. This register is updated as and when the
22725  * data transfer for the corresponding end point is in progress. This
22726  * register is present only in Scatter/Gather DMA mode. Otherwise this field
22727  * is reserved.
22728  *
22729  * Register Layout
22730  *
22731  * Bits | Access | Reset | Description
22732  * :-------|:-------|:------|:----------------------------------
22733  * [31:0] | RW | 0x0 | Host Channel 0 DMA Buffer Address
22734  *
22735  */
22736 /*
22737  * Field : Host Channel 0 DMA Buffer Address - hcdmab4
22738  *
22739  * These registers are present only in case of Scatter/Gather DMA. These
22740  * registers are implemented in RAM instead of flop-based implementation. Holds
22741  * the current buffer address. This register is updated as and when the data
22742  * transfer for the corresponding end point is in progress. This register is
22743  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
22744  *
22745  * Field Access Macros:
22746  *
22747  */
22748 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR4_HCDMAB4 register field. */
22749 #define ALT_USB_HOST_HCCHAR4_HCDMAB4_LSB 0
22750 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR4_HCDMAB4 register field. */
22751 #define ALT_USB_HOST_HCCHAR4_HCDMAB4_MSB 31
22752 /* The width in bits of the ALT_USB_HOST_HCCHAR4_HCDMAB4 register field. */
22753 #define ALT_USB_HOST_HCCHAR4_HCDMAB4_WIDTH 32
22754 /* The mask used to set the ALT_USB_HOST_HCCHAR4_HCDMAB4 register field value. */
22755 #define ALT_USB_HOST_HCCHAR4_HCDMAB4_SET_MSK 0xffffffff
22756 /* The mask used to clear the ALT_USB_HOST_HCCHAR4_HCDMAB4 register field value. */
22757 #define ALT_USB_HOST_HCCHAR4_HCDMAB4_CLR_MSK 0x00000000
22758 /* The reset value of the ALT_USB_HOST_HCCHAR4_HCDMAB4 register field. */
22759 #define ALT_USB_HOST_HCCHAR4_HCDMAB4_RESET 0x0
22760 /* Extracts the ALT_USB_HOST_HCCHAR4_HCDMAB4 field value from a register. */
22761 #define ALT_USB_HOST_HCCHAR4_HCDMAB4_GET(value) (((value) & 0xffffffff) >> 0)
22762 /* Produces a ALT_USB_HOST_HCCHAR4_HCDMAB4 register field value suitable for setting the register. */
22763 #define ALT_USB_HOST_HCCHAR4_HCDMAB4_SET(value) (((value) << 0) & 0xffffffff)
22764 
22765 #ifndef __ASSEMBLY__
22766 /*
22767  * WARNING: The C register and register group struct declarations are provided for
22768  * convenience and illustrative purposes. They should, however, be used with
22769  * caution as the C language standard provides no guarantees about the alignment or
22770  * atomicity of device memory accesses. The recommended practice for writing
22771  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
22772  * alt_write_word() functions.
22773  *
22774  * The struct declaration for register ALT_USB_HOST_HCCHAR4.
22775  */
22776 struct ALT_USB_HOST_HCCHAR4_s
22777 {
22778  uint32_t hcdmab4 : 32; /* Host Channel 0 DMA Buffer Address */
22779 };
22780 
22781 /* The typedef declaration for register ALT_USB_HOST_HCCHAR4. */
22782 typedef volatile struct ALT_USB_HOST_HCCHAR4_s ALT_USB_HOST_HCCHAR4_t;
22783 #endif /* __ASSEMBLY__ */
22784 
22785 /* The byte offset of the ALT_USB_HOST_HCCHAR4 register from the beginning of the component. */
22786 #define ALT_USB_HOST_HCCHAR4_OFST 0x180
22787 /* The address of the ALT_USB_HOST_HCCHAR4 register. */
22788 #define ALT_USB_HOST_HCCHAR4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR4_OFST))
22789 
22790 /*
22791  * Register : Host Channel 4 Split Control Register - hcsplt4
22792  *
22793  * Channel_number 4
22794  *
22795  * Register Layout
22796  *
22797  * Bits | Access | Reset | Description
22798  * :--------|:-------|:------|:---------------------
22799  * [6:0] | RW | 0x0 | Port Address
22800  * [13:7] | RW | 0x0 | Hub Address
22801  * [15:14] | RW | 0x0 | Transaction Position
22802  * [16] | RW | 0x0 | Do Complete Split
22803  * [30:17] | ??? | 0x0 | *UNDEFINED*
22804  * [31] | RW | 0x0 | Split Enable
22805  *
22806  */
22807 /*
22808  * Field : Port Address - prtaddr
22809  *
22810  * This field is the port number of the recipient transactiontranslator.
22811  *
22812  * Field Access Macros:
22813  *
22814  */
22815 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT4_PRTADDR register field. */
22816 #define ALT_USB_HOST_HCSPLT4_PRTADDR_LSB 0
22817 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT4_PRTADDR register field. */
22818 #define ALT_USB_HOST_HCSPLT4_PRTADDR_MSB 6
22819 /* The width in bits of the ALT_USB_HOST_HCSPLT4_PRTADDR register field. */
22820 #define ALT_USB_HOST_HCSPLT4_PRTADDR_WIDTH 7
22821 /* The mask used to set the ALT_USB_HOST_HCSPLT4_PRTADDR register field value. */
22822 #define ALT_USB_HOST_HCSPLT4_PRTADDR_SET_MSK 0x0000007f
22823 /* The mask used to clear the ALT_USB_HOST_HCSPLT4_PRTADDR register field value. */
22824 #define ALT_USB_HOST_HCSPLT4_PRTADDR_CLR_MSK 0xffffff80
22825 /* The reset value of the ALT_USB_HOST_HCSPLT4_PRTADDR register field. */
22826 #define ALT_USB_HOST_HCSPLT4_PRTADDR_RESET 0x0
22827 /* Extracts the ALT_USB_HOST_HCSPLT4_PRTADDR field value from a register. */
22828 #define ALT_USB_HOST_HCSPLT4_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
22829 /* Produces a ALT_USB_HOST_HCSPLT4_PRTADDR register field value suitable for setting the register. */
22830 #define ALT_USB_HOST_HCSPLT4_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
22831 
22832 /*
22833  * Field : Hub Address - hubaddr
22834  *
22835  * This field holds the device address of the transaction translator's hub.
22836  *
22837  * Field Access Macros:
22838  *
22839  */
22840 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT4_HUBADDR register field. */
22841 #define ALT_USB_HOST_HCSPLT4_HUBADDR_LSB 7
22842 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT4_HUBADDR register field. */
22843 #define ALT_USB_HOST_HCSPLT4_HUBADDR_MSB 13
22844 /* The width in bits of the ALT_USB_HOST_HCSPLT4_HUBADDR register field. */
22845 #define ALT_USB_HOST_HCSPLT4_HUBADDR_WIDTH 7
22846 /* The mask used to set the ALT_USB_HOST_HCSPLT4_HUBADDR register field value. */
22847 #define ALT_USB_HOST_HCSPLT4_HUBADDR_SET_MSK 0x00003f80
22848 /* The mask used to clear the ALT_USB_HOST_HCSPLT4_HUBADDR register field value. */
22849 #define ALT_USB_HOST_HCSPLT4_HUBADDR_CLR_MSK 0xffffc07f
22850 /* The reset value of the ALT_USB_HOST_HCSPLT4_HUBADDR register field. */
22851 #define ALT_USB_HOST_HCSPLT4_HUBADDR_RESET 0x0
22852 /* Extracts the ALT_USB_HOST_HCSPLT4_HUBADDR field value from a register. */
22853 #define ALT_USB_HOST_HCSPLT4_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
22854 /* Produces a ALT_USB_HOST_HCSPLT4_HUBADDR register field value suitable for setting the register. */
22855 #define ALT_USB_HOST_HCSPLT4_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
22856 
22857 /*
22858  * Field : Transaction Position - xactpos
22859  *
22860  * This field is used to determine whether to send all, first, middle, or last
22861  * payloads with each OUT transaction.
22862  *
22863  * Field Enumeration Values:
22864  *
22865  * Enum | Value | Description
22866  * :--------------------------------------|:------|:------------------------------------------------
22867  * ALT_USB_HOST_HCSPLT4_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
22868  * : | | transaction (which is larger than 188 bytes)
22869  * ALT_USB_HOST_HCSPLT4_XACTPOS_E_END | 0x1 | End. This is the last payload of this
22870  * : | | transaction (which is larger than 188 bytes)
22871  * ALT_USB_HOST_HCSPLT4_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
22872  * : | | transaction (which is larger than 188 bytes)
22873  * ALT_USB_HOST_HCSPLT4_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
22874  * : | | transaction (which is less than or equal to 188
22875  * : | | bytes)
22876  *
22877  * Field Access Macros:
22878  *
22879  */
22880 /*
22881  * Enumerated value for register field ALT_USB_HOST_HCSPLT4_XACTPOS
22882  *
22883  * Mid. This is the middle payload of this transaction (which is larger than 188
22884  * bytes)
22885  */
22886 #define ALT_USB_HOST_HCSPLT4_XACTPOS_E_MIDDLE 0x0
22887 /*
22888  * Enumerated value for register field ALT_USB_HOST_HCSPLT4_XACTPOS
22889  *
22890  * End. This is the last payload of this transaction (which is larger than 188
22891  * bytes)
22892  */
22893 #define ALT_USB_HOST_HCSPLT4_XACTPOS_E_END 0x1
22894 /*
22895  * Enumerated value for register field ALT_USB_HOST_HCSPLT4_XACTPOS
22896  *
22897  * Begin. This is the first data payload of this transaction (which is larger than
22898  * 188 bytes)
22899  */
22900 #define ALT_USB_HOST_HCSPLT4_XACTPOS_E_BEGIN 0x2
22901 /*
22902  * Enumerated value for register field ALT_USB_HOST_HCSPLT4_XACTPOS
22903  *
22904  * All. This is the entire data payload is of this transaction (which is less than
22905  * or equal to 188 bytes)
22906  */
22907 #define ALT_USB_HOST_HCSPLT4_XACTPOS_E_ALL 0x3
22908 
22909 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT4_XACTPOS register field. */
22910 #define ALT_USB_HOST_HCSPLT4_XACTPOS_LSB 14
22911 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT4_XACTPOS register field. */
22912 #define ALT_USB_HOST_HCSPLT4_XACTPOS_MSB 15
22913 /* The width in bits of the ALT_USB_HOST_HCSPLT4_XACTPOS register field. */
22914 #define ALT_USB_HOST_HCSPLT4_XACTPOS_WIDTH 2
22915 /* The mask used to set the ALT_USB_HOST_HCSPLT4_XACTPOS register field value. */
22916 #define ALT_USB_HOST_HCSPLT4_XACTPOS_SET_MSK 0x0000c000
22917 /* The mask used to clear the ALT_USB_HOST_HCSPLT4_XACTPOS register field value. */
22918 #define ALT_USB_HOST_HCSPLT4_XACTPOS_CLR_MSK 0xffff3fff
22919 /* The reset value of the ALT_USB_HOST_HCSPLT4_XACTPOS register field. */
22920 #define ALT_USB_HOST_HCSPLT4_XACTPOS_RESET 0x0
22921 /* Extracts the ALT_USB_HOST_HCSPLT4_XACTPOS field value from a register. */
22922 #define ALT_USB_HOST_HCSPLT4_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
22923 /* Produces a ALT_USB_HOST_HCSPLT4_XACTPOS register field value suitable for setting the register. */
22924 #define ALT_USB_HOST_HCSPLT4_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
22925 
22926 /*
22927  * Field : Do Complete Split - compsplt
22928  *
22929  * The application sets this field to request the OTG host to perform a complete
22930  * split transaction.
22931  *
22932  * Field Enumeration Values:
22933  *
22934  * Enum | Value | Description
22935  * :----------------------------------------|:------|:---------------------
22936  * ALT_USB_HOST_HCSPLT4_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
22937  * ALT_USB_HOST_HCSPLT4_COMPSPLT_E_SPLIT | 0x1 | Split transaction
22938  *
22939  * Field Access Macros:
22940  *
22941  */
22942 /*
22943  * Enumerated value for register field ALT_USB_HOST_HCSPLT4_COMPSPLT
22944  *
22945  * No split transaction
22946  */
22947 #define ALT_USB_HOST_HCSPLT4_COMPSPLT_E_NOSPLIT 0x0
22948 /*
22949  * Enumerated value for register field ALT_USB_HOST_HCSPLT4_COMPSPLT
22950  *
22951  * Split transaction
22952  */
22953 #define ALT_USB_HOST_HCSPLT4_COMPSPLT_E_SPLIT 0x1
22954 
22955 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT4_COMPSPLT register field. */
22956 #define ALT_USB_HOST_HCSPLT4_COMPSPLT_LSB 16
22957 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT4_COMPSPLT register field. */
22958 #define ALT_USB_HOST_HCSPLT4_COMPSPLT_MSB 16
22959 /* The width in bits of the ALT_USB_HOST_HCSPLT4_COMPSPLT register field. */
22960 #define ALT_USB_HOST_HCSPLT4_COMPSPLT_WIDTH 1
22961 /* The mask used to set the ALT_USB_HOST_HCSPLT4_COMPSPLT register field value. */
22962 #define ALT_USB_HOST_HCSPLT4_COMPSPLT_SET_MSK 0x00010000
22963 /* The mask used to clear the ALT_USB_HOST_HCSPLT4_COMPSPLT register field value. */
22964 #define ALT_USB_HOST_HCSPLT4_COMPSPLT_CLR_MSK 0xfffeffff
22965 /* The reset value of the ALT_USB_HOST_HCSPLT4_COMPSPLT register field. */
22966 #define ALT_USB_HOST_HCSPLT4_COMPSPLT_RESET 0x0
22967 /* Extracts the ALT_USB_HOST_HCSPLT4_COMPSPLT field value from a register. */
22968 #define ALT_USB_HOST_HCSPLT4_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
22969 /* Produces a ALT_USB_HOST_HCSPLT4_COMPSPLT register field value suitable for setting the register. */
22970 #define ALT_USB_HOST_HCSPLT4_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
22971 
22972 /*
22973  * Field : Split Enable - spltena
22974  *
22975  * The application sets this field to indicate that this channel is enabled to
22976  * perform split transactions.
22977  *
22978  * Field Enumeration Values:
22979  *
22980  * Enum | Value | Description
22981  * :------------------------------------|:------|:------------------
22982  * ALT_USB_HOST_HCSPLT4_SPLTENA_E_DISD | 0x0 | Split not enabled
22983  * ALT_USB_HOST_HCSPLT4_SPLTENA_E_END | 0x1 | Split enabled
22984  *
22985  * Field Access Macros:
22986  *
22987  */
22988 /*
22989  * Enumerated value for register field ALT_USB_HOST_HCSPLT4_SPLTENA
22990  *
22991  * Split not enabled
22992  */
22993 #define ALT_USB_HOST_HCSPLT4_SPLTENA_E_DISD 0x0
22994 /*
22995  * Enumerated value for register field ALT_USB_HOST_HCSPLT4_SPLTENA
22996  *
22997  * Split enabled
22998  */
22999 #define ALT_USB_HOST_HCSPLT4_SPLTENA_E_END 0x1
23000 
23001 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT4_SPLTENA register field. */
23002 #define ALT_USB_HOST_HCSPLT4_SPLTENA_LSB 31
23003 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT4_SPLTENA register field. */
23004 #define ALT_USB_HOST_HCSPLT4_SPLTENA_MSB 31
23005 /* The width in bits of the ALT_USB_HOST_HCSPLT4_SPLTENA register field. */
23006 #define ALT_USB_HOST_HCSPLT4_SPLTENA_WIDTH 1
23007 /* The mask used to set the ALT_USB_HOST_HCSPLT4_SPLTENA register field value. */
23008 #define ALT_USB_HOST_HCSPLT4_SPLTENA_SET_MSK 0x80000000
23009 /* The mask used to clear the ALT_USB_HOST_HCSPLT4_SPLTENA register field value. */
23010 #define ALT_USB_HOST_HCSPLT4_SPLTENA_CLR_MSK 0x7fffffff
23011 /* The reset value of the ALT_USB_HOST_HCSPLT4_SPLTENA register field. */
23012 #define ALT_USB_HOST_HCSPLT4_SPLTENA_RESET 0x0
23013 /* Extracts the ALT_USB_HOST_HCSPLT4_SPLTENA field value from a register. */
23014 #define ALT_USB_HOST_HCSPLT4_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
23015 /* Produces a ALT_USB_HOST_HCSPLT4_SPLTENA register field value suitable for setting the register. */
23016 #define ALT_USB_HOST_HCSPLT4_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
23017 
23018 #ifndef __ASSEMBLY__
23019 /*
23020  * WARNING: The C register and register group struct declarations are provided for
23021  * convenience and illustrative purposes. They should, however, be used with
23022  * caution as the C language standard provides no guarantees about the alignment or
23023  * atomicity of device memory accesses. The recommended practice for writing
23024  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
23025  * alt_write_word() functions.
23026  *
23027  * The struct declaration for register ALT_USB_HOST_HCSPLT4.
23028  */
23029 struct ALT_USB_HOST_HCSPLT4_s
23030 {
23031  uint32_t prtaddr : 7; /* Port Address */
23032  uint32_t hubaddr : 7; /* Hub Address */
23033  uint32_t xactpos : 2; /* Transaction Position */
23034  uint32_t compsplt : 1; /* Do Complete Split */
23035  uint32_t : 14; /* *UNDEFINED* */
23036  uint32_t spltena : 1; /* Split Enable */
23037 };
23038 
23039 /* The typedef declaration for register ALT_USB_HOST_HCSPLT4. */
23040 typedef volatile struct ALT_USB_HOST_HCSPLT4_s ALT_USB_HOST_HCSPLT4_t;
23041 #endif /* __ASSEMBLY__ */
23042 
23043 /* The byte offset of the ALT_USB_HOST_HCSPLT4 register from the beginning of the component. */
23044 #define ALT_USB_HOST_HCSPLT4_OFST 0x184
23045 /* The address of the ALT_USB_HOST_HCSPLT4 register. */
23046 #define ALT_USB_HOST_HCSPLT4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT4_OFST))
23047 
23048 /*
23049  * Register : Host Channel 4 Interrupt Register - hcint4
23050  *
23051  * This register indicates the status of a channel with respect to USB- and AHB-
23052  * related events. The application must read this register when the Host Channels
23053  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
23054  * application can read this register, it must first read the Host All Channels
23055  * Interrupt (HAINT) register to get the exact channel number for the Host
23056  * Channel-n Interrupt register. The application must clear the appropriate bit in
23057  * this register to clear the corresponding bits in the HAINT and GINTSTS
23058  * registers.
23059  *
23060  * Register Layout
23061  *
23062  * Bits | Access | Reset | Description
23063  * :--------|:-------|:------|:--------------------------------------------
23064  * [0] | R | 0x0 | Transfer Completed
23065  * [1] | R | 0x0 | Channel Halted
23066  * [2] | R | 0x0 | AHB Error
23067  * [3] | R | 0x0 | STALL Response Received Interrupt
23068  * [4] | R | 0x0 | NAK Response Received Interrupt
23069  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
23070  * [6] | R | 0x0 | NYET Response Received Interrupt
23071  * [7] | R | 0x0 | Transaction Error
23072  * [8] | R | 0x0 | Babble Error
23073  * [9] | R | 0x0 | Frame Overrun
23074  * [10] | R | 0x0 | Data Toggle Error
23075  * [11] | R | 0x0 | BNA Interrupt
23076  * [12] | R | 0x0 | Excessive Transaction Error
23077  * [13] | R | 0x0 | Descriptor rollover interrupt
23078  * [31:14] | ??? | 0x0 | *UNDEFINED*
23079  *
23080  */
23081 /*
23082  * Field : Transfer Completed - xfercompl
23083  *
23084  * Transfer completed normally without any errors. This bit can be set only by the
23085  * core and the application should write 1 to clear it.
23086  *
23087  * Field Enumeration Values:
23088  *
23089  * Enum | Value | Description
23090  * :--------------------------------------|:------|:-----------------------------------------------
23091  * ALT_USB_HOST_HCINT4_XFERCOMPL_E_INACT | 0x0 | No transfer
23092  * ALT_USB_HOST_HCINT4_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
23093  *
23094  * Field Access Macros:
23095  *
23096  */
23097 /*
23098  * Enumerated value for register field ALT_USB_HOST_HCINT4_XFERCOMPL
23099  *
23100  * No transfer
23101  */
23102 #define ALT_USB_HOST_HCINT4_XFERCOMPL_E_INACT 0x0
23103 /*
23104  * Enumerated value for register field ALT_USB_HOST_HCINT4_XFERCOMPL
23105  *
23106  * Transfer completed normally without any errors
23107  */
23108 #define ALT_USB_HOST_HCINT4_XFERCOMPL_E_ACT 0x1
23109 
23110 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_XFERCOMPL register field. */
23111 #define ALT_USB_HOST_HCINT4_XFERCOMPL_LSB 0
23112 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_XFERCOMPL register field. */
23113 #define ALT_USB_HOST_HCINT4_XFERCOMPL_MSB 0
23114 /* The width in bits of the ALT_USB_HOST_HCINT4_XFERCOMPL register field. */
23115 #define ALT_USB_HOST_HCINT4_XFERCOMPL_WIDTH 1
23116 /* The mask used to set the ALT_USB_HOST_HCINT4_XFERCOMPL register field value. */
23117 #define ALT_USB_HOST_HCINT4_XFERCOMPL_SET_MSK 0x00000001
23118 /* The mask used to clear the ALT_USB_HOST_HCINT4_XFERCOMPL register field value. */
23119 #define ALT_USB_HOST_HCINT4_XFERCOMPL_CLR_MSK 0xfffffffe
23120 /* The reset value of the ALT_USB_HOST_HCINT4_XFERCOMPL register field. */
23121 #define ALT_USB_HOST_HCINT4_XFERCOMPL_RESET 0x0
23122 /* Extracts the ALT_USB_HOST_HCINT4_XFERCOMPL field value from a register. */
23123 #define ALT_USB_HOST_HCINT4_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
23124 /* Produces a ALT_USB_HOST_HCINT4_XFERCOMPL register field value suitable for setting the register. */
23125 #define ALT_USB_HOST_HCINT4_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
23126 
23127 /*
23128  * Field : Channel Halted - chhltd
23129  *
23130  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
23131  * either because of any USB transaction error or in response to disable request by
23132  * the application or because of a completed transfer. In Scatter/gather DMA mode,
23133  * this indicates that transfer completed due to any of the following
23134  *
23135  * . EOL being set in descriptor
23136  *
23137  * . AHB error
23138  *
23139  * . Excessive transaction errors
23140  *
23141  * . Babble
23142  *
23143  * . Stall
23144  *
23145  * Field Enumeration Values:
23146  *
23147  * Enum | Value | Description
23148  * :-----------------------------------|:------|:-------------------
23149  * ALT_USB_HOST_HCINT4_CHHLTD_E_INACT | 0x0 | Channel not halted
23150  * ALT_USB_HOST_HCINT4_CHHLTD_E_ACT | 0x1 | Channel Halted
23151  *
23152  * Field Access Macros:
23153  *
23154  */
23155 /*
23156  * Enumerated value for register field ALT_USB_HOST_HCINT4_CHHLTD
23157  *
23158  * Channel not halted
23159  */
23160 #define ALT_USB_HOST_HCINT4_CHHLTD_E_INACT 0x0
23161 /*
23162  * Enumerated value for register field ALT_USB_HOST_HCINT4_CHHLTD
23163  *
23164  * Channel Halted
23165  */
23166 #define ALT_USB_HOST_HCINT4_CHHLTD_E_ACT 0x1
23167 
23168 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_CHHLTD register field. */
23169 #define ALT_USB_HOST_HCINT4_CHHLTD_LSB 1
23170 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_CHHLTD register field. */
23171 #define ALT_USB_HOST_HCINT4_CHHLTD_MSB 1
23172 /* The width in bits of the ALT_USB_HOST_HCINT4_CHHLTD register field. */
23173 #define ALT_USB_HOST_HCINT4_CHHLTD_WIDTH 1
23174 /* The mask used to set the ALT_USB_HOST_HCINT4_CHHLTD register field value. */
23175 #define ALT_USB_HOST_HCINT4_CHHLTD_SET_MSK 0x00000002
23176 /* The mask used to clear the ALT_USB_HOST_HCINT4_CHHLTD register field value. */
23177 #define ALT_USB_HOST_HCINT4_CHHLTD_CLR_MSK 0xfffffffd
23178 /* The reset value of the ALT_USB_HOST_HCINT4_CHHLTD register field. */
23179 #define ALT_USB_HOST_HCINT4_CHHLTD_RESET 0x0
23180 /* Extracts the ALT_USB_HOST_HCINT4_CHHLTD field value from a register. */
23181 #define ALT_USB_HOST_HCINT4_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
23182 /* Produces a ALT_USB_HOST_HCINT4_CHHLTD register field value suitable for setting the register. */
23183 #define ALT_USB_HOST_HCINT4_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
23184 
23185 /*
23186  * Field : AHB Error - ahberr
23187  *
23188  * This is generated only in Internal DMA mode when there is an AHB error during
23189  * AHB read/write. The application can read the corresponding channel's DMA address
23190  * register to get the error address.
23191  *
23192  * Field Enumeration Values:
23193  *
23194  * Enum | Value | Description
23195  * :-----------------------------------|:------|:--------------------------------
23196  * ALT_USB_HOST_HCINT4_AHBERR_E_INACT | 0x0 | No AHB error
23197  * ALT_USB_HOST_HCINT4_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
23198  *
23199  * Field Access Macros:
23200  *
23201  */
23202 /*
23203  * Enumerated value for register field ALT_USB_HOST_HCINT4_AHBERR
23204  *
23205  * No AHB error
23206  */
23207 #define ALT_USB_HOST_HCINT4_AHBERR_E_INACT 0x0
23208 /*
23209  * Enumerated value for register field ALT_USB_HOST_HCINT4_AHBERR
23210  *
23211  * AHB error during AHB read/write
23212  */
23213 #define ALT_USB_HOST_HCINT4_AHBERR_E_ACT 0x1
23214 
23215 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_AHBERR register field. */
23216 #define ALT_USB_HOST_HCINT4_AHBERR_LSB 2
23217 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_AHBERR register field. */
23218 #define ALT_USB_HOST_HCINT4_AHBERR_MSB 2
23219 /* The width in bits of the ALT_USB_HOST_HCINT4_AHBERR register field. */
23220 #define ALT_USB_HOST_HCINT4_AHBERR_WIDTH 1
23221 /* The mask used to set the ALT_USB_HOST_HCINT4_AHBERR register field value. */
23222 #define ALT_USB_HOST_HCINT4_AHBERR_SET_MSK 0x00000004
23223 /* The mask used to clear the ALT_USB_HOST_HCINT4_AHBERR register field value. */
23224 #define ALT_USB_HOST_HCINT4_AHBERR_CLR_MSK 0xfffffffb
23225 /* The reset value of the ALT_USB_HOST_HCINT4_AHBERR register field. */
23226 #define ALT_USB_HOST_HCINT4_AHBERR_RESET 0x0
23227 /* Extracts the ALT_USB_HOST_HCINT4_AHBERR field value from a register. */
23228 #define ALT_USB_HOST_HCINT4_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
23229 /* Produces a ALT_USB_HOST_HCINT4_AHBERR register field value suitable for setting the register. */
23230 #define ALT_USB_HOST_HCINT4_AHBERR_SET(value) (((value) << 2) & 0x00000004)
23231 
23232 /*
23233  * Field : STALL Response Received Interrupt - stall
23234  *
23235  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
23236  * This bit can be set only by the core and the application should write 1 to clear
23237  * it.
23238  *
23239  * Field Enumeration Values:
23240  *
23241  * Enum | Value | Description
23242  * :----------------------------------|:------|:-------------------
23243  * ALT_USB_HOST_HCINT4_STALL_E_INACT | 0x0 | No Stall Interrupt
23244  * ALT_USB_HOST_HCINT4_STALL_E_ACT | 0x1 | Stall Interrupt
23245  *
23246  * Field Access Macros:
23247  *
23248  */
23249 /*
23250  * Enumerated value for register field ALT_USB_HOST_HCINT4_STALL
23251  *
23252  * No Stall Interrupt
23253  */
23254 #define ALT_USB_HOST_HCINT4_STALL_E_INACT 0x0
23255 /*
23256  * Enumerated value for register field ALT_USB_HOST_HCINT4_STALL
23257  *
23258  * Stall Interrupt
23259  */
23260 #define ALT_USB_HOST_HCINT4_STALL_E_ACT 0x1
23261 
23262 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_STALL register field. */
23263 #define ALT_USB_HOST_HCINT4_STALL_LSB 3
23264 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_STALL register field. */
23265 #define ALT_USB_HOST_HCINT4_STALL_MSB 3
23266 /* The width in bits of the ALT_USB_HOST_HCINT4_STALL register field. */
23267 #define ALT_USB_HOST_HCINT4_STALL_WIDTH 1
23268 /* The mask used to set the ALT_USB_HOST_HCINT4_STALL register field value. */
23269 #define ALT_USB_HOST_HCINT4_STALL_SET_MSK 0x00000008
23270 /* The mask used to clear the ALT_USB_HOST_HCINT4_STALL register field value. */
23271 #define ALT_USB_HOST_HCINT4_STALL_CLR_MSK 0xfffffff7
23272 /* The reset value of the ALT_USB_HOST_HCINT4_STALL register field. */
23273 #define ALT_USB_HOST_HCINT4_STALL_RESET 0x0
23274 /* Extracts the ALT_USB_HOST_HCINT4_STALL field value from a register. */
23275 #define ALT_USB_HOST_HCINT4_STALL_GET(value) (((value) & 0x00000008) >> 3)
23276 /* Produces a ALT_USB_HOST_HCINT4_STALL register field value suitable for setting the register. */
23277 #define ALT_USB_HOST_HCINT4_STALL_SET(value) (((value) << 3) & 0x00000008)
23278 
23279 /*
23280  * Field : NAK Response Received Interrupt - nak
23281  *
23282  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
23283  * core.This bit can be set only by the core and the application should write 1 to
23284  * clear it.
23285  *
23286  * Field Enumeration Values:
23287  *
23288  * Enum | Value | Description
23289  * :--------------------------------|:------|:-----------------------------------
23290  * ALT_USB_HOST_HCINT4_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
23291  * ALT_USB_HOST_HCINT4_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
23292  *
23293  * Field Access Macros:
23294  *
23295  */
23296 /*
23297  * Enumerated value for register field ALT_USB_HOST_HCINT4_NAK
23298  *
23299  * No NAK Response Received Interrupt
23300  */
23301 #define ALT_USB_HOST_HCINT4_NAK_E_INACT 0x0
23302 /*
23303  * Enumerated value for register field ALT_USB_HOST_HCINT4_NAK
23304  *
23305  * NAK Response Received Interrupt
23306  */
23307 #define ALT_USB_HOST_HCINT4_NAK_E_ACT 0x1
23308 
23309 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_NAK register field. */
23310 #define ALT_USB_HOST_HCINT4_NAK_LSB 4
23311 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_NAK register field. */
23312 #define ALT_USB_HOST_HCINT4_NAK_MSB 4
23313 /* The width in bits of the ALT_USB_HOST_HCINT4_NAK register field. */
23314 #define ALT_USB_HOST_HCINT4_NAK_WIDTH 1
23315 /* The mask used to set the ALT_USB_HOST_HCINT4_NAK register field value. */
23316 #define ALT_USB_HOST_HCINT4_NAK_SET_MSK 0x00000010
23317 /* The mask used to clear the ALT_USB_HOST_HCINT4_NAK register field value. */
23318 #define ALT_USB_HOST_HCINT4_NAK_CLR_MSK 0xffffffef
23319 /* The reset value of the ALT_USB_HOST_HCINT4_NAK register field. */
23320 #define ALT_USB_HOST_HCINT4_NAK_RESET 0x0
23321 /* Extracts the ALT_USB_HOST_HCINT4_NAK field value from a register. */
23322 #define ALT_USB_HOST_HCINT4_NAK_GET(value) (((value) & 0x00000010) >> 4)
23323 /* Produces a ALT_USB_HOST_HCINT4_NAK register field value suitable for setting the register. */
23324 #define ALT_USB_HOST_HCINT4_NAK_SET(value) (((value) << 4) & 0x00000010)
23325 
23326 /*
23327  * Field : ACK Response Received Transmitted Interrupt - ack
23328  *
23329  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
23330  * This bit can be set only by the core and the application should write 1 to clear
23331  * it.
23332  *
23333  * Field Enumeration Values:
23334  *
23335  * Enum | Value | Description
23336  * :--------------------------------|:------|:-----------------------------------------------
23337  * ALT_USB_HOST_HCINT4_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
23338  * ALT_USB_HOST_HCINT4_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
23339  *
23340  * Field Access Macros:
23341  *
23342  */
23343 /*
23344  * Enumerated value for register field ALT_USB_HOST_HCINT4_ACK
23345  *
23346  * No ACK Response Received Transmitted Interrupt
23347  */
23348 #define ALT_USB_HOST_HCINT4_ACK_E_INACT 0x0
23349 /*
23350  * Enumerated value for register field ALT_USB_HOST_HCINT4_ACK
23351  *
23352  * ACK Response Received Transmitted Interrup
23353  */
23354 #define ALT_USB_HOST_HCINT4_ACK_E_ACT 0x1
23355 
23356 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_ACK register field. */
23357 #define ALT_USB_HOST_HCINT4_ACK_LSB 5
23358 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_ACK register field. */
23359 #define ALT_USB_HOST_HCINT4_ACK_MSB 5
23360 /* The width in bits of the ALT_USB_HOST_HCINT4_ACK register field. */
23361 #define ALT_USB_HOST_HCINT4_ACK_WIDTH 1
23362 /* The mask used to set the ALT_USB_HOST_HCINT4_ACK register field value. */
23363 #define ALT_USB_HOST_HCINT4_ACK_SET_MSK 0x00000020
23364 /* The mask used to clear the ALT_USB_HOST_HCINT4_ACK register field value. */
23365 #define ALT_USB_HOST_HCINT4_ACK_CLR_MSK 0xffffffdf
23366 /* The reset value of the ALT_USB_HOST_HCINT4_ACK register field. */
23367 #define ALT_USB_HOST_HCINT4_ACK_RESET 0x0
23368 /* Extracts the ALT_USB_HOST_HCINT4_ACK field value from a register. */
23369 #define ALT_USB_HOST_HCINT4_ACK_GET(value) (((value) & 0x00000020) >> 5)
23370 /* Produces a ALT_USB_HOST_HCINT4_ACK register field value suitable for setting the register. */
23371 #define ALT_USB_HOST_HCINT4_ACK_SET(value) (((value) << 5) & 0x00000020)
23372 
23373 /*
23374  * Field : NYET Response Received Interrupt - nyet
23375  *
23376  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
23377  * core.This bit can be set only by the core and the application should write 1 to
23378  * clear it.
23379  *
23380  * Field Enumeration Values:
23381  *
23382  * Enum | Value | Description
23383  * :---------------------------------|:------|:------------------------------------
23384  * ALT_USB_HOST_HCINT4_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
23385  * ALT_USB_HOST_HCINT4_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
23386  *
23387  * Field Access Macros:
23388  *
23389  */
23390 /*
23391  * Enumerated value for register field ALT_USB_HOST_HCINT4_NYET
23392  *
23393  * No NYET Response Received Interrupt
23394  */
23395 #define ALT_USB_HOST_HCINT4_NYET_E_INACT 0x0
23396 /*
23397  * Enumerated value for register field ALT_USB_HOST_HCINT4_NYET
23398  *
23399  * NYET Response Received Interrupt
23400  */
23401 #define ALT_USB_HOST_HCINT4_NYET_E_ACT 0x1
23402 
23403 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_NYET register field. */
23404 #define ALT_USB_HOST_HCINT4_NYET_LSB 6
23405 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_NYET register field. */
23406 #define ALT_USB_HOST_HCINT4_NYET_MSB 6
23407 /* The width in bits of the ALT_USB_HOST_HCINT4_NYET register field. */
23408 #define ALT_USB_HOST_HCINT4_NYET_WIDTH 1
23409 /* The mask used to set the ALT_USB_HOST_HCINT4_NYET register field value. */
23410 #define ALT_USB_HOST_HCINT4_NYET_SET_MSK 0x00000040
23411 /* The mask used to clear the ALT_USB_HOST_HCINT4_NYET register field value. */
23412 #define ALT_USB_HOST_HCINT4_NYET_CLR_MSK 0xffffffbf
23413 /* The reset value of the ALT_USB_HOST_HCINT4_NYET register field. */
23414 #define ALT_USB_HOST_HCINT4_NYET_RESET 0x0
23415 /* Extracts the ALT_USB_HOST_HCINT4_NYET field value from a register. */
23416 #define ALT_USB_HOST_HCINT4_NYET_GET(value) (((value) & 0x00000040) >> 6)
23417 /* Produces a ALT_USB_HOST_HCINT4_NYET register field value suitable for setting the register. */
23418 #define ALT_USB_HOST_HCINT4_NYET_SET(value) (((value) << 6) & 0x00000040)
23419 
23420 /*
23421  * Field : Transaction Error - xacterr
23422  *
23423  * Indicates one of the following errors occurred on the USB.-CRC check failure
23424  *
23425  * * Timeout
23426  *
23427  * * Bit stuff error
23428  *
23429  * * False EOP
23430  *
23431  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
23432  * This bit can be set only by the core and the application should write 1 to clear
23433  * it.
23434  *
23435  * Field Enumeration Values:
23436  *
23437  * Enum | Value | Description
23438  * :------------------------------------|:------|:---------------------
23439  * ALT_USB_HOST_HCINT4_XACTERR_E_INACT | 0x0 | No Transaction Error
23440  * ALT_USB_HOST_HCINT4_XACTERR_E_ACT | 0x1 | Transaction Error
23441  *
23442  * Field Access Macros:
23443  *
23444  */
23445 /*
23446  * Enumerated value for register field ALT_USB_HOST_HCINT4_XACTERR
23447  *
23448  * No Transaction Error
23449  */
23450 #define ALT_USB_HOST_HCINT4_XACTERR_E_INACT 0x0
23451 /*
23452  * Enumerated value for register field ALT_USB_HOST_HCINT4_XACTERR
23453  *
23454  * Transaction Error
23455  */
23456 #define ALT_USB_HOST_HCINT4_XACTERR_E_ACT 0x1
23457 
23458 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_XACTERR register field. */
23459 #define ALT_USB_HOST_HCINT4_XACTERR_LSB 7
23460 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_XACTERR register field. */
23461 #define ALT_USB_HOST_HCINT4_XACTERR_MSB 7
23462 /* The width in bits of the ALT_USB_HOST_HCINT4_XACTERR register field. */
23463 #define ALT_USB_HOST_HCINT4_XACTERR_WIDTH 1
23464 /* The mask used to set the ALT_USB_HOST_HCINT4_XACTERR register field value. */
23465 #define ALT_USB_HOST_HCINT4_XACTERR_SET_MSK 0x00000080
23466 /* The mask used to clear the ALT_USB_HOST_HCINT4_XACTERR register field value. */
23467 #define ALT_USB_HOST_HCINT4_XACTERR_CLR_MSK 0xffffff7f
23468 /* The reset value of the ALT_USB_HOST_HCINT4_XACTERR register field. */
23469 #define ALT_USB_HOST_HCINT4_XACTERR_RESET 0x0
23470 /* Extracts the ALT_USB_HOST_HCINT4_XACTERR field value from a register. */
23471 #define ALT_USB_HOST_HCINT4_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
23472 /* Produces a ALT_USB_HOST_HCINT4_XACTERR register field value suitable for setting the register. */
23473 #define ALT_USB_HOST_HCINT4_XACTERR_SET(value) (((value) << 7) & 0x00000080)
23474 
23475 /*
23476  * Field : Babble Error - bblerr
23477  *
23478  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
23479  * core..This bit can be set only by the core and the application should write 1 to
23480  * clear it.
23481  *
23482  * Field Enumeration Values:
23483  *
23484  * Enum | Value | Description
23485  * :-----------------------------------|:------|:----------------
23486  * ALT_USB_HOST_HCINT4_BBLERR_E_INACT | 0x0 | No Babble Error
23487  * ALT_USB_HOST_HCINT4_BBLERR_E_ACT | 0x1 | Babble Error
23488  *
23489  * Field Access Macros:
23490  *
23491  */
23492 /*
23493  * Enumerated value for register field ALT_USB_HOST_HCINT4_BBLERR
23494  *
23495  * No Babble Error
23496  */
23497 #define ALT_USB_HOST_HCINT4_BBLERR_E_INACT 0x0
23498 /*
23499  * Enumerated value for register field ALT_USB_HOST_HCINT4_BBLERR
23500  *
23501  * Babble Error
23502  */
23503 #define ALT_USB_HOST_HCINT4_BBLERR_E_ACT 0x1
23504 
23505 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_BBLERR register field. */
23506 #define ALT_USB_HOST_HCINT4_BBLERR_LSB 8
23507 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_BBLERR register field. */
23508 #define ALT_USB_HOST_HCINT4_BBLERR_MSB 8
23509 /* The width in bits of the ALT_USB_HOST_HCINT4_BBLERR register field. */
23510 #define ALT_USB_HOST_HCINT4_BBLERR_WIDTH 1
23511 /* The mask used to set the ALT_USB_HOST_HCINT4_BBLERR register field value. */
23512 #define ALT_USB_HOST_HCINT4_BBLERR_SET_MSK 0x00000100
23513 /* The mask used to clear the ALT_USB_HOST_HCINT4_BBLERR register field value. */
23514 #define ALT_USB_HOST_HCINT4_BBLERR_CLR_MSK 0xfffffeff
23515 /* The reset value of the ALT_USB_HOST_HCINT4_BBLERR register field. */
23516 #define ALT_USB_HOST_HCINT4_BBLERR_RESET 0x0
23517 /* Extracts the ALT_USB_HOST_HCINT4_BBLERR field value from a register. */
23518 #define ALT_USB_HOST_HCINT4_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
23519 /* Produces a ALT_USB_HOST_HCINT4_BBLERR register field value suitable for setting the register. */
23520 #define ALT_USB_HOST_HCINT4_BBLERR_SET(value) (((value) << 8) & 0x00000100)
23521 
23522 /*
23523  * Field : Frame Overrun - frmovrun
23524  *
23525  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
23526  * This bit can be set only by the core and the application should write 1 to clear
23527  * it.
23528  *
23529  * Field Enumeration Values:
23530  *
23531  * Enum | Value | Description
23532  * :-------------------------------------|:------|:-----------------
23533  * ALT_USB_HOST_HCINT4_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
23534  * ALT_USB_HOST_HCINT4_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
23535  *
23536  * Field Access Macros:
23537  *
23538  */
23539 /*
23540  * Enumerated value for register field ALT_USB_HOST_HCINT4_FRMOVRUN
23541  *
23542  * No Frame Overrun
23543  */
23544 #define ALT_USB_HOST_HCINT4_FRMOVRUN_E_INACT 0x0
23545 /*
23546  * Enumerated value for register field ALT_USB_HOST_HCINT4_FRMOVRUN
23547  *
23548  * Frame Overrun
23549  */
23550 #define ALT_USB_HOST_HCINT4_FRMOVRUN_E_ACT 0x1
23551 
23552 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_FRMOVRUN register field. */
23553 #define ALT_USB_HOST_HCINT4_FRMOVRUN_LSB 9
23554 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_FRMOVRUN register field. */
23555 #define ALT_USB_HOST_HCINT4_FRMOVRUN_MSB 9
23556 /* The width in bits of the ALT_USB_HOST_HCINT4_FRMOVRUN register field. */
23557 #define ALT_USB_HOST_HCINT4_FRMOVRUN_WIDTH 1
23558 /* The mask used to set the ALT_USB_HOST_HCINT4_FRMOVRUN register field value. */
23559 #define ALT_USB_HOST_HCINT4_FRMOVRUN_SET_MSK 0x00000200
23560 /* The mask used to clear the ALT_USB_HOST_HCINT4_FRMOVRUN register field value. */
23561 #define ALT_USB_HOST_HCINT4_FRMOVRUN_CLR_MSK 0xfffffdff
23562 /* The reset value of the ALT_USB_HOST_HCINT4_FRMOVRUN register field. */
23563 #define ALT_USB_HOST_HCINT4_FRMOVRUN_RESET 0x0
23564 /* Extracts the ALT_USB_HOST_HCINT4_FRMOVRUN field value from a register. */
23565 #define ALT_USB_HOST_HCINT4_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
23566 /* Produces a ALT_USB_HOST_HCINT4_FRMOVRUN register field value suitable for setting the register. */
23567 #define ALT_USB_HOST_HCINT4_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
23568 
23569 /*
23570  * Field : Data Toggle Error - datatglerr
23571  *
23572  * This bit can be set only by the core and the application should write 1 to clear
23573  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
23574  * core.
23575  *
23576  * Field Enumeration Values:
23577  *
23578  * Enum | Value | Description
23579  * :---------------------------------------|:------|:---------------------
23580  * ALT_USB_HOST_HCINT4_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
23581  * ALT_USB_HOST_HCINT4_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
23582  *
23583  * Field Access Macros:
23584  *
23585  */
23586 /*
23587  * Enumerated value for register field ALT_USB_HOST_HCINT4_DATATGLERR
23588  *
23589  * No Data Toggle Error
23590  */
23591 #define ALT_USB_HOST_HCINT4_DATATGLERR_E_INACT 0x0
23592 /*
23593  * Enumerated value for register field ALT_USB_HOST_HCINT4_DATATGLERR
23594  *
23595  * Data Toggle Error
23596  */
23597 #define ALT_USB_HOST_HCINT4_DATATGLERR_E_ACT 0x1
23598 
23599 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_DATATGLERR register field. */
23600 #define ALT_USB_HOST_HCINT4_DATATGLERR_LSB 10
23601 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_DATATGLERR register field. */
23602 #define ALT_USB_HOST_HCINT4_DATATGLERR_MSB 10
23603 /* The width in bits of the ALT_USB_HOST_HCINT4_DATATGLERR register field. */
23604 #define ALT_USB_HOST_HCINT4_DATATGLERR_WIDTH 1
23605 /* The mask used to set the ALT_USB_HOST_HCINT4_DATATGLERR register field value. */
23606 #define ALT_USB_HOST_HCINT4_DATATGLERR_SET_MSK 0x00000400
23607 /* The mask used to clear the ALT_USB_HOST_HCINT4_DATATGLERR register field value. */
23608 #define ALT_USB_HOST_HCINT4_DATATGLERR_CLR_MSK 0xfffffbff
23609 /* The reset value of the ALT_USB_HOST_HCINT4_DATATGLERR register field. */
23610 #define ALT_USB_HOST_HCINT4_DATATGLERR_RESET 0x0
23611 /* Extracts the ALT_USB_HOST_HCINT4_DATATGLERR field value from a register. */
23612 #define ALT_USB_HOST_HCINT4_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
23613 /* Produces a ALT_USB_HOST_HCINT4_DATATGLERR register field value suitable for setting the register. */
23614 #define ALT_USB_HOST_HCINT4_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
23615 
23616 /*
23617  * Field : BNA Interrupt - bnaintr
23618  *
23619  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
23620  * generates this interrupt when the descriptor accessed is not ready for the Core
23621  * to process. BNA will not be generated for Isochronous channels. for non
23622  * Scatter/Gather DMA mode, this bit is reserved.
23623  *
23624  * Field Enumeration Values:
23625  *
23626  * Enum | Value | Description
23627  * :------------------------------------|:------|:-----------------
23628  * ALT_USB_HOST_HCINT4_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
23629  * ALT_USB_HOST_HCINT4_BNAINTR_E_ACT | 0x1 | BNA Interrupt
23630  *
23631  * Field Access Macros:
23632  *
23633  */
23634 /*
23635  * Enumerated value for register field ALT_USB_HOST_HCINT4_BNAINTR
23636  *
23637  * No BNA Interrupt
23638  */
23639 #define ALT_USB_HOST_HCINT4_BNAINTR_E_INACT 0x0
23640 /*
23641  * Enumerated value for register field ALT_USB_HOST_HCINT4_BNAINTR
23642  *
23643  * BNA Interrupt
23644  */
23645 #define ALT_USB_HOST_HCINT4_BNAINTR_E_ACT 0x1
23646 
23647 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_BNAINTR register field. */
23648 #define ALT_USB_HOST_HCINT4_BNAINTR_LSB 11
23649 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_BNAINTR register field. */
23650 #define ALT_USB_HOST_HCINT4_BNAINTR_MSB 11
23651 /* The width in bits of the ALT_USB_HOST_HCINT4_BNAINTR register field. */
23652 #define ALT_USB_HOST_HCINT4_BNAINTR_WIDTH 1
23653 /* The mask used to set the ALT_USB_HOST_HCINT4_BNAINTR register field value. */
23654 #define ALT_USB_HOST_HCINT4_BNAINTR_SET_MSK 0x00000800
23655 /* The mask used to clear the ALT_USB_HOST_HCINT4_BNAINTR register field value. */
23656 #define ALT_USB_HOST_HCINT4_BNAINTR_CLR_MSK 0xfffff7ff
23657 /* The reset value of the ALT_USB_HOST_HCINT4_BNAINTR register field. */
23658 #define ALT_USB_HOST_HCINT4_BNAINTR_RESET 0x0
23659 /* Extracts the ALT_USB_HOST_HCINT4_BNAINTR field value from a register. */
23660 #define ALT_USB_HOST_HCINT4_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
23661 /* Produces a ALT_USB_HOST_HCINT4_BNAINTR register field value suitable for setting the register. */
23662 #define ALT_USB_HOST_HCINT4_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
23663 
23664 /*
23665  * Field : Excessive Transaction Error - xcs_xact_err
23666  *
23667  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
23668  * this bit when 3 consecutive transaction errors occurred on the USB bus.
23669  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
23670  * Scatter/Gather DMA mode, this bit is reserved.
23671  *
23672  * Field Enumeration Values:
23673  *
23674  * Enum | Value | Description
23675  * :-------------------------------------------|:------|:-------------------------------
23676  * ALT_USB_HOST_HCINT4_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
23677  * ALT_USB_HOST_HCINT4_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
23678  *
23679  * Field Access Macros:
23680  *
23681  */
23682 /*
23683  * Enumerated value for register field ALT_USB_HOST_HCINT4_XCS_XACT_ERR
23684  *
23685  * No Excessive Transaction Error
23686  */
23687 #define ALT_USB_HOST_HCINT4_XCS_XACT_ERR_E_INACT 0x0
23688 /*
23689  * Enumerated value for register field ALT_USB_HOST_HCINT4_XCS_XACT_ERR
23690  *
23691  * Excessive Transaction Error
23692  */
23693 #define ALT_USB_HOST_HCINT4_XCS_XACT_ERR_E_ACVTIVE 0x1
23694 
23695 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_XCS_XACT_ERR register field. */
23696 #define ALT_USB_HOST_HCINT4_XCS_XACT_ERR_LSB 12
23697 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_XCS_XACT_ERR register field. */
23698 #define ALT_USB_HOST_HCINT4_XCS_XACT_ERR_MSB 12
23699 /* The width in bits of the ALT_USB_HOST_HCINT4_XCS_XACT_ERR register field. */
23700 #define ALT_USB_HOST_HCINT4_XCS_XACT_ERR_WIDTH 1
23701 /* The mask used to set the ALT_USB_HOST_HCINT4_XCS_XACT_ERR register field value. */
23702 #define ALT_USB_HOST_HCINT4_XCS_XACT_ERR_SET_MSK 0x00001000
23703 /* The mask used to clear the ALT_USB_HOST_HCINT4_XCS_XACT_ERR register field value. */
23704 #define ALT_USB_HOST_HCINT4_XCS_XACT_ERR_CLR_MSK 0xffffefff
23705 /* The reset value of the ALT_USB_HOST_HCINT4_XCS_XACT_ERR register field. */
23706 #define ALT_USB_HOST_HCINT4_XCS_XACT_ERR_RESET 0x0
23707 /* Extracts the ALT_USB_HOST_HCINT4_XCS_XACT_ERR field value from a register. */
23708 #define ALT_USB_HOST_HCINT4_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
23709 /* Produces a ALT_USB_HOST_HCINT4_XCS_XACT_ERR register field value suitable for setting the register. */
23710 #define ALT_USB_HOST_HCINT4_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
23711 
23712 /*
23713  * Field : Descriptor rollover interrupt - desc_lst_rollintr
23714  *
23715  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
23716  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
23717  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
23718  * mode, this bit is reserved.
23719  *
23720  * Field Enumeration Values:
23721  *
23722  * Enum | Value | Description
23723  * :----------------------------------------------|:------|:---------------------------------
23724  * ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
23725  * ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
23726  *
23727  * Field Access Macros:
23728  *
23729  */
23730 /*
23731  * Enumerated value for register field ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR
23732  *
23733  * No Descriptor rollover interrupt
23734  */
23735 #define ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR_E_INACT 0x0
23736 /*
23737  * Enumerated value for register field ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR
23738  *
23739  * Descriptor rollover interrupt
23740  */
23741 #define ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR_E_ACT 0x1
23742 
23743 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR register field. */
23744 #define ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR_LSB 13
23745 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR register field. */
23746 #define ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR_MSB 13
23747 /* The width in bits of the ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR register field. */
23748 #define ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR_WIDTH 1
23749 /* The mask used to set the ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR register field value. */
23750 #define ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR_SET_MSK 0x00002000
23751 /* The mask used to clear the ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR register field value. */
23752 #define ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
23753 /* The reset value of the ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR register field. */
23754 #define ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR_RESET 0x0
23755 /* Extracts the ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR field value from a register. */
23756 #define ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
23757 /* Produces a ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR register field value suitable for setting the register. */
23758 #define ALT_USB_HOST_HCINT4_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
23759 
23760 #ifndef __ASSEMBLY__
23761 /*
23762  * WARNING: The C register and register group struct declarations are provided for
23763  * convenience and illustrative purposes. They should, however, be used with
23764  * caution as the C language standard provides no guarantees about the alignment or
23765  * atomicity of device memory accesses. The recommended practice for writing
23766  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
23767  * alt_write_word() functions.
23768  *
23769  * The struct declaration for register ALT_USB_HOST_HCINT4.
23770  */
23771 struct ALT_USB_HOST_HCINT4_s
23772 {
23773  const uint32_t xfercompl : 1; /* Transfer Completed */
23774  const uint32_t chhltd : 1; /* Channel Halted */
23775  const uint32_t ahberr : 1; /* AHB Error */
23776  const uint32_t stall : 1; /* STALL Response Received Interrupt */
23777  const uint32_t nak : 1; /* NAK Response Received Interrupt */
23778  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
23779  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
23780  const uint32_t xacterr : 1; /* Transaction Error */
23781  const uint32_t bblerr : 1; /* Babble Error */
23782  const uint32_t frmovrun : 1; /* Frame Overrun */
23783  const uint32_t datatglerr : 1; /* Data Toggle Error */
23784  const uint32_t bnaintr : 1; /* BNA Interrupt */
23785  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
23786  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
23787  uint32_t : 18; /* *UNDEFINED* */
23788 };
23789 
23790 /* The typedef declaration for register ALT_USB_HOST_HCINT4. */
23791 typedef volatile struct ALT_USB_HOST_HCINT4_s ALT_USB_HOST_HCINT4_t;
23792 #endif /* __ASSEMBLY__ */
23793 
23794 /* The byte offset of the ALT_USB_HOST_HCINT4 register from the beginning of the component. */
23795 #define ALT_USB_HOST_HCINT4_OFST 0x188
23796 /* The address of the ALT_USB_HOST_HCINT4 register. */
23797 #define ALT_USB_HOST_HCINT4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT4_OFST))
23798 
23799 /*
23800  * Register : Host Channel 4 Interrupt Mask Register - hcintmsk4
23801  *
23802  * This register reflects the mask for Channel 4 interrupt status bits.
23803  *
23804  * Register Layout
23805  *
23806  * Bits | Access | Reset | Description
23807  * :--------|:-------|:------|:----------------------------------
23808  * [0] | RW | 0x0 | Transfer Completed Mask
23809  * [1] | RW | 0x0 | Channel Halted Mask
23810  * [2] | RW | 0x0 | AHB Error Mask
23811  * [10:3] | ??? | 0x0 | *UNDEFINED*
23812  * [11] | RW | 0x0 | BNA Interrupt mask
23813  * [12] | ??? | 0x0 | *UNDEFINED*
23814  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
23815  * [31:14] | ??? | 0x0 | *UNDEFINED*
23816  *
23817  */
23818 /*
23819  * Field : Transfer Completed Mask - xfercomplmsk
23820  *
23821  * Transfer complete.
23822  *
23823  * Field Enumeration Values:
23824  *
23825  * Enum | Value | Description
23826  * :--------------------------------------------|:------|:------------
23827  * ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK_E_MSK | 0x0 | Mask
23828  * ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
23829  *
23830  * Field Access Macros:
23831  *
23832  */
23833 /*
23834  * Enumerated value for register field ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK
23835  *
23836  * Mask
23837  */
23838 #define ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK_E_MSK 0x0
23839 /*
23840  * Enumerated value for register field ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK
23841  *
23842  * No mask
23843  */
23844 #define ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK_E_NOMSK 0x1
23845 
23846 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK register field. */
23847 #define ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK_LSB 0
23848 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK register field. */
23849 #define ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK_MSB 0
23850 /* The width in bits of the ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK register field. */
23851 #define ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK_WIDTH 1
23852 /* The mask used to set the ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK register field value. */
23853 #define ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK_SET_MSK 0x00000001
23854 /* The mask used to clear the ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK register field value. */
23855 #define ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK_CLR_MSK 0xfffffffe
23856 /* The reset value of the ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK register field. */
23857 #define ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK_RESET 0x0
23858 /* Extracts the ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK field value from a register. */
23859 #define ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
23860 /* Produces a ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK register field value suitable for setting the register. */
23861 #define ALT_USB_HOST_HCINTMSK4_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
23862 
23863 /*
23864  * Field : Channel Halted Mask - chhltdmsk
23865  *
23866  * Channel Halted.
23867  *
23868  * Field Enumeration Values:
23869  *
23870  * Enum | Value | Description
23871  * :-----------------------------------------|:------|:------------
23872  * ALT_USB_HOST_HCINTMSK4_CHHLTDMSK_E_MSK | 0x0 | Mask
23873  * ALT_USB_HOST_HCINTMSK4_CHHLTDMSK_E_NOMSK | 0x1 | No mask
23874  *
23875  * Field Access Macros:
23876  *
23877  */
23878 /*
23879  * Enumerated value for register field ALT_USB_HOST_HCINTMSK4_CHHLTDMSK
23880  *
23881  * Mask
23882  */
23883 #define ALT_USB_HOST_HCINTMSK4_CHHLTDMSK_E_MSK 0x0
23884 /*
23885  * Enumerated value for register field ALT_USB_HOST_HCINTMSK4_CHHLTDMSK
23886  *
23887  * No mask
23888  */
23889 #define ALT_USB_HOST_HCINTMSK4_CHHLTDMSK_E_NOMSK 0x1
23890 
23891 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK4_CHHLTDMSK register field. */
23892 #define ALT_USB_HOST_HCINTMSK4_CHHLTDMSK_LSB 1
23893 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK4_CHHLTDMSK register field. */
23894 #define ALT_USB_HOST_HCINTMSK4_CHHLTDMSK_MSB 1
23895 /* The width in bits of the ALT_USB_HOST_HCINTMSK4_CHHLTDMSK register field. */
23896 #define ALT_USB_HOST_HCINTMSK4_CHHLTDMSK_WIDTH 1
23897 /* The mask used to set the ALT_USB_HOST_HCINTMSK4_CHHLTDMSK register field value. */
23898 #define ALT_USB_HOST_HCINTMSK4_CHHLTDMSK_SET_MSK 0x00000002
23899 /* The mask used to clear the ALT_USB_HOST_HCINTMSK4_CHHLTDMSK register field value. */
23900 #define ALT_USB_HOST_HCINTMSK4_CHHLTDMSK_CLR_MSK 0xfffffffd
23901 /* The reset value of the ALT_USB_HOST_HCINTMSK4_CHHLTDMSK register field. */
23902 #define ALT_USB_HOST_HCINTMSK4_CHHLTDMSK_RESET 0x0
23903 /* Extracts the ALT_USB_HOST_HCINTMSK4_CHHLTDMSK field value from a register. */
23904 #define ALT_USB_HOST_HCINTMSK4_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
23905 /* Produces a ALT_USB_HOST_HCINTMSK4_CHHLTDMSK register field value suitable for setting the register. */
23906 #define ALT_USB_HOST_HCINTMSK4_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
23907 
23908 /*
23909  * Field : AHB Error Mask - ahberrmsk
23910  *
23911  * In scatter/gather DMA mode for host, interrupts will not be generated due to
23912  * the corresponding bits set in HCINTn.
23913  *
23914  * Field Enumeration Values:
23915  *
23916  * Enum | Value | Description
23917  * :-----------------------------------------|:------|:------------
23918  * ALT_USB_HOST_HCINTMSK4_AHBERRMSK_E_MSK | 0x0 | Mask
23919  * ALT_USB_HOST_HCINTMSK4_AHBERRMSK_E_NOMSK | 0x1 | No mask
23920  *
23921  * Field Access Macros:
23922  *
23923  */
23924 /*
23925  * Enumerated value for register field ALT_USB_HOST_HCINTMSK4_AHBERRMSK
23926  *
23927  * Mask
23928  */
23929 #define ALT_USB_HOST_HCINTMSK4_AHBERRMSK_E_MSK 0x0
23930 /*
23931  * Enumerated value for register field ALT_USB_HOST_HCINTMSK4_AHBERRMSK
23932  *
23933  * No mask
23934  */
23935 #define ALT_USB_HOST_HCINTMSK4_AHBERRMSK_E_NOMSK 0x1
23936 
23937 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK4_AHBERRMSK register field. */
23938 #define ALT_USB_HOST_HCINTMSK4_AHBERRMSK_LSB 2
23939 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK4_AHBERRMSK register field. */
23940 #define ALT_USB_HOST_HCINTMSK4_AHBERRMSK_MSB 2
23941 /* The width in bits of the ALT_USB_HOST_HCINTMSK4_AHBERRMSK register field. */
23942 #define ALT_USB_HOST_HCINTMSK4_AHBERRMSK_WIDTH 1
23943 /* The mask used to set the ALT_USB_HOST_HCINTMSK4_AHBERRMSK register field value. */
23944 #define ALT_USB_HOST_HCINTMSK4_AHBERRMSK_SET_MSK 0x00000004
23945 /* The mask used to clear the ALT_USB_HOST_HCINTMSK4_AHBERRMSK register field value. */
23946 #define ALT_USB_HOST_HCINTMSK4_AHBERRMSK_CLR_MSK 0xfffffffb
23947 /* The reset value of the ALT_USB_HOST_HCINTMSK4_AHBERRMSK register field. */
23948 #define ALT_USB_HOST_HCINTMSK4_AHBERRMSK_RESET 0x0
23949 /* Extracts the ALT_USB_HOST_HCINTMSK4_AHBERRMSK field value from a register. */
23950 #define ALT_USB_HOST_HCINTMSK4_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
23951 /* Produces a ALT_USB_HOST_HCINTMSK4_AHBERRMSK register field value suitable for setting the register. */
23952 #define ALT_USB_HOST_HCINTMSK4_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
23953 
23954 /*
23955  * Field : BNA Interrupt mask - bnaintrmsk
23956  *
23957  * This bit is valid only when Scatter/Gather DMA mode is enabled.
23958  *
23959  * Field Enumeration Values:
23960  *
23961  * Enum | Value | Description
23962  * :------------------------------------------|:------|:------------
23963  * ALT_USB_HOST_HCINTMSK4_BNAINTRMSK_E_MSK | 0x0 | Mask
23964  * ALT_USB_HOST_HCINTMSK4_BNAINTRMSK_E_NOMSK | 0x1 | No mask
23965  *
23966  * Field Access Macros:
23967  *
23968  */
23969 /*
23970  * Enumerated value for register field ALT_USB_HOST_HCINTMSK4_BNAINTRMSK
23971  *
23972  * Mask
23973  */
23974 #define ALT_USB_HOST_HCINTMSK4_BNAINTRMSK_E_MSK 0x0
23975 /*
23976  * Enumerated value for register field ALT_USB_HOST_HCINTMSK4_BNAINTRMSK
23977  *
23978  * No mask
23979  */
23980 #define ALT_USB_HOST_HCINTMSK4_BNAINTRMSK_E_NOMSK 0x1
23981 
23982 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK4_BNAINTRMSK register field. */
23983 #define ALT_USB_HOST_HCINTMSK4_BNAINTRMSK_LSB 11
23984 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK4_BNAINTRMSK register field. */
23985 #define ALT_USB_HOST_HCINTMSK4_BNAINTRMSK_MSB 11
23986 /* The width in bits of the ALT_USB_HOST_HCINTMSK4_BNAINTRMSK register field. */
23987 #define ALT_USB_HOST_HCINTMSK4_BNAINTRMSK_WIDTH 1
23988 /* The mask used to set the ALT_USB_HOST_HCINTMSK4_BNAINTRMSK register field value. */
23989 #define ALT_USB_HOST_HCINTMSK4_BNAINTRMSK_SET_MSK 0x00000800
23990 /* The mask used to clear the ALT_USB_HOST_HCINTMSK4_BNAINTRMSK register field value. */
23991 #define ALT_USB_HOST_HCINTMSK4_BNAINTRMSK_CLR_MSK 0xfffff7ff
23992 /* The reset value of the ALT_USB_HOST_HCINTMSK4_BNAINTRMSK register field. */
23993 #define ALT_USB_HOST_HCINTMSK4_BNAINTRMSK_RESET 0x0
23994 /* Extracts the ALT_USB_HOST_HCINTMSK4_BNAINTRMSK field value from a register. */
23995 #define ALT_USB_HOST_HCINTMSK4_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
23996 /* Produces a ALT_USB_HOST_HCINTMSK4_BNAINTRMSK register field value suitable for setting the register. */
23997 #define ALT_USB_HOST_HCINTMSK4_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
23998 
23999 /*
24000  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
24001  *
24002  * This bit is valid only when Scatter/Gather DMA mode is enabled.
24003  *
24004  * Field Enumeration Values:
24005  *
24006  * Enum | Value | Description
24007  * :---------------------------------------------------|:------|:------------
24008  * ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
24009  * ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
24010  *
24011  * Field Access Macros:
24012  *
24013  */
24014 /*
24015  * Enumerated value for register field ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK
24016  *
24017  * Mask
24018  */
24019 #define ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK_E_MSK 0x0
24020 /*
24021  * Enumerated value for register field ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK
24022  *
24023  * No mask
24024  */
24025 #define ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
24026 
24027 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK register field. */
24028 #define ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK_LSB 13
24029 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK register field. */
24030 #define ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK_MSB 13
24031 /* The width in bits of the ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK register field. */
24032 #define ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK_WIDTH 1
24033 /* The mask used to set the ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK register field value. */
24034 #define ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
24035 /* The mask used to clear the ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK register field value. */
24036 #define ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
24037 /* The reset value of the ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK register field. */
24038 #define ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK_RESET 0x0
24039 /* Extracts the ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK field value from a register. */
24040 #define ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
24041 /* Produces a ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
24042 #define ALT_USB_HOST_HCINTMSK4_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
24043 
24044 #ifndef __ASSEMBLY__
24045 /*
24046  * WARNING: The C register and register group struct declarations are provided for
24047  * convenience and illustrative purposes. They should, however, be used with
24048  * caution as the C language standard provides no guarantees about the alignment or
24049  * atomicity of device memory accesses. The recommended practice for writing
24050  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
24051  * alt_write_word() functions.
24052  *
24053  * The struct declaration for register ALT_USB_HOST_HCINTMSK4.
24054  */
24055 struct ALT_USB_HOST_HCINTMSK4_s
24056 {
24057  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
24058  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
24059  uint32_t ahberrmsk : 1; /* AHB Error Mask */
24060  uint32_t : 8; /* *UNDEFINED* */
24061  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
24062  uint32_t : 1; /* *UNDEFINED* */
24063  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
24064  uint32_t : 18; /* *UNDEFINED* */
24065 };
24066 
24067 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK4. */
24068 typedef volatile struct ALT_USB_HOST_HCINTMSK4_s ALT_USB_HOST_HCINTMSK4_t;
24069 #endif /* __ASSEMBLY__ */
24070 
24071 /* The byte offset of the ALT_USB_HOST_HCINTMSK4 register from the beginning of the component. */
24072 #define ALT_USB_HOST_HCINTMSK4_OFST 0x18c
24073 /* The address of the ALT_USB_HOST_HCINTMSK4 register. */
24074 #define ALT_USB_HOST_HCINTMSK4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK4_OFST))
24075 
24076 /*
24077  * Register : Host Channel 4 Transfer Size Register - hctsiz4
24078  *
24079  * Buffer DMA Mode Channel 4
24080  *
24081  * Register Layout
24082  *
24083  * Bits | Access | Reset | Description
24084  * :--------|:-------|:------|:--------------
24085  * [18:0] | RW | 0x0 | Transfer Size
24086  * [28:19] | RW | 0x0 | Packet Count
24087  * [30:29] | RW | 0x0 | PID
24088  * [31] | RW | 0x0 | Do Ping
24089  *
24090  */
24091 /*
24092  * Field : Transfer Size - xfersize
24093  *
24094  * for an OUT, this field is the number of data bytes the host sends during the
24095  * transfer. for an IN, this field is the buffer size that the application has
24096  * Reserved for the transfer. The application is expected to program this field as
24097  * an integer multiple of the maximum packet size for IN transactions (periodic and
24098  * non-periodic).The width of this counter is specified as 19 bits.
24099  *
24100  * Field Access Macros:
24101  *
24102  */
24103 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ4_XFERSIZE register field. */
24104 #define ALT_USB_HOST_HCTSIZ4_XFERSIZE_LSB 0
24105 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ4_XFERSIZE register field. */
24106 #define ALT_USB_HOST_HCTSIZ4_XFERSIZE_MSB 18
24107 /* The width in bits of the ALT_USB_HOST_HCTSIZ4_XFERSIZE register field. */
24108 #define ALT_USB_HOST_HCTSIZ4_XFERSIZE_WIDTH 19
24109 /* The mask used to set the ALT_USB_HOST_HCTSIZ4_XFERSIZE register field value. */
24110 #define ALT_USB_HOST_HCTSIZ4_XFERSIZE_SET_MSK 0x0007ffff
24111 /* The mask used to clear the ALT_USB_HOST_HCTSIZ4_XFERSIZE register field value. */
24112 #define ALT_USB_HOST_HCTSIZ4_XFERSIZE_CLR_MSK 0xfff80000
24113 /* The reset value of the ALT_USB_HOST_HCTSIZ4_XFERSIZE register field. */
24114 #define ALT_USB_HOST_HCTSIZ4_XFERSIZE_RESET 0x0
24115 /* Extracts the ALT_USB_HOST_HCTSIZ4_XFERSIZE field value from a register. */
24116 #define ALT_USB_HOST_HCTSIZ4_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
24117 /* Produces a ALT_USB_HOST_HCTSIZ4_XFERSIZE register field value suitable for setting the register. */
24118 #define ALT_USB_HOST_HCTSIZ4_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
24119 
24120 /*
24121  * Field : Packet Count - pktcnt
24122  *
24123  * This field is programmed by the application with the expected number of packets
24124  * to be transmitted (OUT) or received (IN). The host decrements this count on
24125  * every successful transmission or reception of an OUT/IN packet. Once this count
24126  * reaches zero, the application is interrupted to indicate normal completion. The
24127  * width of this counter is specified as 10 bits.
24128  *
24129  * Field Access Macros:
24130  *
24131  */
24132 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ4_PKTCNT register field. */
24133 #define ALT_USB_HOST_HCTSIZ4_PKTCNT_LSB 19
24134 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ4_PKTCNT register field. */
24135 #define ALT_USB_HOST_HCTSIZ4_PKTCNT_MSB 28
24136 /* The width in bits of the ALT_USB_HOST_HCTSIZ4_PKTCNT register field. */
24137 #define ALT_USB_HOST_HCTSIZ4_PKTCNT_WIDTH 10
24138 /* The mask used to set the ALT_USB_HOST_HCTSIZ4_PKTCNT register field value. */
24139 #define ALT_USB_HOST_HCTSIZ4_PKTCNT_SET_MSK 0x1ff80000
24140 /* The mask used to clear the ALT_USB_HOST_HCTSIZ4_PKTCNT register field value. */
24141 #define ALT_USB_HOST_HCTSIZ4_PKTCNT_CLR_MSK 0xe007ffff
24142 /* The reset value of the ALT_USB_HOST_HCTSIZ4_PKTCNT register field. */
24143 #define ALT_USB_HOST_HCTSIZ4_PKTCNT_RESET 0x0
24144 /* Extracts the ALT_USB_HOST_HCTSIZ4_PKTCNT field value from a register. */
24145 #define ALT_USB_HOST_HCTSIZ4_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
24146 /* Produces a ALT_USB_HOST_HCTSIZ4_PKTCNT register field value suitable for setting the register. */
24147 #define ALT_USB_HOST_HCTSIZ4_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
24148 
24149 /*
24150  * Field : PID - pid
24151  *
24152  * The application programs this field with the type of PID to use forthe initial
24153  * transaction. The host maintains this field for the rest of the transfer.
24154  *
24155  * Field Enumeration Values:
24156  *
24157  * Enum | Value | Description
24158  * :---------------------------------|:------|:------------------------------------
24159  * ALT_USB_HOST_HCTSIZ4_PID_E_DATA0 | 0x0 | DATA0
24160  * ALT_USB_HOST_HCTSIZ4_PID_E_DATA2 | 0x1 | DATA2
24161  * ALT_USB_HOST_HCTSIZ4_PID_E_DATA1 | 0x2 | DATA1
24162  * ALT_USB_HOST_HCTSIZ4_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
24163  *
24164  * Field Access Macros:
24165  *
24166  */
24167 /*
24168  * Enumerated value for register field ALT_USB_HOST_HCTSIZ4_PID
24169  *
24170  * DATA0
24171  */
24172 #define ALT_USB_HOST_HCTSIZ4_PID_E_DATA0 0x0
24173 /*
24174  * Enumerated value for register field ALT_USB_HOST_HCTSIZ4_PID
24175  *
24176  * DATA2
24177  */
24178 #define ALT_USB_HOST_HCTSIZ4_PID_E_DATA2 0x1
24179 /*
24180  * Enumerated value for register field ALT_USB_HOST_HCTSIZ4_PID
24181  *
24182  * DATA1
24183  */
24184 #define ALT_USB_HOST_HCTSIZ4_PID_E_DATA1 0x2
24185 /*
24186  * Enumerated value for register field ALT_USB_HOST_HCTSIZ4_PID
24187  *
24188  * MDATA (non-control)/SETUP (control)
24189  */
24190 #define ALT_USB_HOST_HCTSIZ4_PID_E_MDATA 0x3
24191 
24192 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ4_PID register field. */
24193 #define ALT_USB_HOST_HCTSIZ4_PID_LSB 29
24194 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ4_PID register field. */
24195 #define ALT_USB_HOST_HCTSIZ4_PID_MSB 30
24196 /* The width in bits of the ALT_USB_HOST_HCTSIZ4_PID register field. */
24197 #define ALT_USB_HOST_HCTSIZ4_PID_WIDTH 2
24198 /* The mask used to set the ALT_USB_HOST_HCTSIZ4_PID register field value. */
24199 #define ALT_USB_HOST_HCTSIZ4_PID_SET_MSK 0x60000000
24200 /* The mask used to clear the ALT_USB_HOST_HCTSIZ4_PID register field value. */
24201 #define ALT_USB_HOST_HCTSIZ4_PID_CLR_MSK 0x9fffffff
24202 /* The reset value of the ALT_USB_HOST_HCTSIZ4_PID register field. */
24203 #define ALT_USB_HOST_HCTSIZ4_PID_RESET 0x0
24204 /* Extracts the ALT_USB_HOST_HCTSIZ4_PID field value from a register. */
24205 #define ALT_USB_HOST_HCTSIZ4_PID_GET(value) (((value) & 0x60000000) >> 29)
24206 /* Produces a ALT_USB_HOST_HCTSIZ4_PID register field value suitable for setting the register. */
24207 #define ALT_USB_HOST_HCTSIZ4_PID_SET(value) (((value) << 29) & 0x60000000)
24208 
24209 /*
24210  * Field : Do Ping - dopng
24211  *
24212  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
24213  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
24214  * for IN transfers it disables the channel.
24215  *
24216  * Field Enumeration Values:
24217  *
24218  * Enum | Value | Description
24219  * :------------------------------------|:------|:-----------------
24220  * ALT_USB_HOST_HCTSIZ4_DOPNG_E_NOPING | 0x0 | No ping protocol
24221  * ALT_USB_HOST_HCTSIZ4_DOPNG_E_PING | 0x1 | Ping protocol
24222  *
24223  * Field Access Macros:
24224  *
24225  */
24226 /*
24227  * Enumerated value for register field ALT_USB_HOST_HCTSIZ4_DOPNG
24228  *
24229  * No ping protocol
24230  */
24231 #define ALT_USB_HOST_HCTSIZ4_DOPNG_E_NOPING 0x0
24232 /*
24233  * Enumerated value for register field ALT_USB_HOST_HCTSIZ4_DOPNG
24234  *
24235  * Ping protocol
24236  */
24237 #define ALT_USB_HOST_HCTSIZ4_DOPNG_E_PING 0x1
24238 
24239 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ4_DOPNG register field. */
24240 #define ALT_USB_HOST_HCTSIZ4_DOPNG_LSB 31
24241 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ4_DOPNG register field. */
24242 #define ALT_USB_HOST_HCTSIZ4_DOPNG_MSB 31
24243 /* The width in bits of the ALT_USB_HOST_HCTSIZ4_DOPNG register field. */
24244 #define ALT_USB_HOST_HCTSIZ4_DOPNG_WIDTH 1
24245 /* The mask used to set the ALT_USB_HOST_HCTSIZ4_DOPNG register field value. */
24246 #define ALT_USB_HOST_HCTSIZ4_DOPNG_SET_MSK 0x80000000
24247 /* The mask used to clear the ALT_USB_HOST_HCTSIZ4_DOPNG register field value. */
24248 #define ALT_USB_HOST_HCTSIZ4_DOPNG_CLR_MSK 0x7fffffff
24249 /* The reset value of the ALT_USB_HOST_HCTSIZ4_DOPNG register field. */
24250 #define ALT_USB_HOST_HCTSIZ4_DOPNG_RESET 0x0
24251 /* Extracts the ALT_USB_HOST_HCTSIZ4_DOPNG field value from a register. */
24252 #define ALT_USB_HOST_HCTSIZ4_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
24253 /* Produces a ALT_USB_HOST_HCTSIZ4_DOPNG register field value suitable for setting the register. */
24254 #define ALT_USB_HOST_HCTSIZ4_DOPNG_SET(value) (((value) << 31) & 0x80000000)
24255 
24256 #ifndef __ASSEMBLY__
24257 /*
24258  * WARNING: The C register and register group struct declarations are provided for
24259  * convenience and illustrative purposes. They should, however, be used with
24260  * caution as the C language standard provides no guarantees about the alignment or
24261  * atomicity of device memory accesses. The recommended practice for writing
24262  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
24263  * alt_write_word() functions.
24264  *
24265  * The struct declaration for register ALT_USB_HOST_HCTSIZ4.
24266  */
24267 struct ALT_USB_HOST_HCTSIZ4_s
24268 {
24269  uint32_t xfersize : 19; /* Transfer Size */
24270  uint32_t pktcnt : 10; /* Packet Count */
24271  uint32_t pid : 2; /* PID */
24272  uint32_t dopng : 1; /* Do Ping */
24273 };
24274 
24275 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ4. */
24276 typedef volatile struct ALT_USB_HOST_HCTSIZ4_s ALT_USB_HOST_HCTSIZ4_t;
24277 #endif /* __ASSEMBLY__ */
24278 
24279 /* The byte offset of the ALT_USB_HOST_HCTSIZ4 register from the beginning of the component. */
24280 #define ALT_USB_HOST_HCTSIZ4_OFST 0x190
24281 /* The address of the ALT_USB_HOST_HCTSIZ4 register. */
24282 #define ALT_USB_HOST_HCTSIZ4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ4_OFST))
24283 
24284 /*
24285  * Register : Host Channel 4 DMA Address Register - hcdma4
24286  *
24287  * This register is used by the OTG host in the internal DMA mode to maintain the
24288  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
24289  * DWORD-aligned.
24290  *
24291  * Register Layout
24292  *
24293  * Bits | Access | Reset | Description
24294  * :-------|:-------|:------|:------------
24295  * [31:0] | RW | 0x0 | DMA Address
24296  *
24297  */
24298 /*
24299  * Field : DMA Address - hcdma4
24300  *
24301  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
24302  * first descriptor in the list should be located in this address. The first
24303  * descriptor may be or may not be ready. The core starts processing the list from
24304  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
24305  * in which the isochronous descriptors are present where N is based on nTD as per
24306  * Table below
24307  *
24308  * [31:N] Base Address [N-1:3] Offset [2:0] 000
24309  *
24310  * HS ISOC FS ISOC
24311  *
24312  * nTD N nTD N
24313  *
24314  * 7 6 1 4
24315  *
24316  * 15 7 3 5
24317  *
24318  * 31 8 7 6
24319  *
24320  * 63 9 15 7
24321  *
24322  * 127 10 31 8
24323  *
24324  * 255 11 63 9
24325  *
24326  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
24327  * This value is in terms of number of descriptors. The values can be from 0 to 63.
24328  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
24329  * descriptor processed in the list. This field is updated both by application and
24330  * the core. for example, if the application enables the channel after programming
24331  * CTD=5, then the core will start processing the 6th descriptor. The address is
24332  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
24333  * CTD for isochronous is based on the current frame/microframe value. Need to be
24334  * set to zero by application.
24335  *
24336  * Field Access Macros:
24337  *
24338  */
24339 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA4_HCDMA4 register field. */
24340 #define ALT_USB_HOST_HCDMA4_HCDMA4_LSB 0
24341 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA4_HCDMA4 register field. */
24342 #define ALT_USB_HOST_HCDMA4_HCDMA4_MSB 31
24343 /* The width in bits of the ALT_USB_HOST_HCDMA4_HCDMA4 register field. */
24344 #define ALT_USB_HOST_HCDMA4_HCDMA4_WIDTH 32
24345 /* The mask used to set the ALT_USB_HOST_HCDMA4_HCDMA4 register field value. */
24346 #define ALT_USB_HOST_HCDMA4_HCDMA4_SET_MSK 0xffffffff
24347 /* The mask used to clear the ALT_USB_HOST_HCDMA4_HCDMA4 register field value. */
24348 #define ALT_USB_HOST_HCDMA4_HCDMA4_CLR_MSK 0x00000000
24349 /* The reset value of the ALT_USB_HOST_HCDMA4_HCDMA4 register field. */
24350 #define ALT_USB_HOST_HCDMA4_HCDMA4_RESET 0x0
24351 /* Extracts the ALT_USB_HOST_HCDMA4_HCDMA4 field value from a register. */
24352 #define ALT_USB_HOST_HCDMA4_HCDMA4_GET(value) (((value) & 0xffffffff) >> 0)
24353 /* Produces a ALT_USB_HOST_HCDMA4_HCDMA4 register field value suitable for setting the register. */
24354 #define ALT_USB_HOST_HCDMA4_HCDMA4_SET(value) (((value) << 0) & 0xffffffff)
24355 
24356 #ifndef __ASSEMBLY__
24357 /*
24358  * WARNING: The C register and register group struct declarations are provided for
24359  * convenience and illustrative purposes. They should, however, be used with
24360  * caution as the C language standard provides no guarantees about the alignment or
24361  * atomicity of device memory accesses. The recommended practice for writing
24362  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
24363  * alt_write_word() functions.
24364  *
24365  * The struct declaration for register ALT_USB_HOST_HCDMA4.
24366  */
24367 struct ALT_USB_HOST_HCDMA4_s
24368 {
24369  uint32_t hcdma4 : 32; /* DMA Address */
24370 };
24371 
24372 /* The typedef declaration for register ALT_USB_HOST_HCDMA4. */
24373 typedef volatile struct ALT_USB_HOST_HCDMA4_s ALT_USB_HOST_HCDMA4_t;
24374 #endif /* __ASSEMBLY__ */
24375 
24376 /* The byte offset of the ALT_USB_HOST_HCDMA4 register from the beginning of the component. */
24377 #define ALT_USB_HOST_HCDMA4_OFST 0x194
24378 /* The address of the ALT_USB_HOST_HCDMA4 register. */
24379 #define ALT_USB_HOST_HCDMA4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA4_OFST))
24380 
24381 /*
24382  * Register : Host Channel 4 DMA Buffer Address Register - hcdmab4
24383  *
24384  * These registers are present only in case of Scatter/Gather DMA. These
24385  * registers are implemented in RAM instead of flop-based implementation. Holds
24386  * the current buffer address. This register is updated as and when the
24387  * data transfer for the corresponding end point is in progress. This
24388  * register is present only in Scatter/Gather DMA mode. Otherwise this field is
24389  * reserved.
24390  *
24391  * Register Layout
24392  *
24393  * Bits | Access | Reset | Description
24394  * :-------|:-------|:------|:----------------------------------
24395  * [31:0] | RW | 0x0 | Host Channel 0 DMA Buffer Address
24396  *
24397  */
24398 /*
24399  * Field : Host Channel 0 DMA Buffer Address - hcdmab4
24400  *
24401  * These registers are present only in case of Scatter/Gather DMA. These
24402  * registers are implemented in RAM instead of flop-based implementation. Holds
24403  * the current buffer address. This register is updated as and when the data
24404  * transfer for the corresponding end point is in progress. This register is
24405  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
24406  *
24407  * Field Access Macros:
24408  *
24409  */
24410 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB4_HCDMAB4 register field. */
24411 #define ALT_USB_HOST_HCDMAB4_HCDMAB4_LSB 0
24412 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB4_HCDMAB4 register field. */
24413 #define ALT_USB_HOST_HCDMAB4_HCDMAB4_MSB 31
24414 /* The width in bits of the ALT_USB_HOST_HCDMAB4_HCDMAB4 register field. */
24415 #define ALT_USB_HOST_HCDMAB4_HCDMAB4_WIDTH 32
24416 /* The mask used to set the ALT_USB_HOST_HCDMAB4_HCDMAB4 register field value. */
24417 #define ALT_USB_HOST_HCDMAB4_HCDMAB4_SET_MSK 0xffffffff
24418 /* The mask used to clear the ALT_USB_HOST_HCDMAB4_HCDMAB4 register field value. */
24419 #define ALT_USB_HOST_HCDMAB4_HCDMAB4_CLR_MSK 0x00000000
24420 /* The reset value of the ALT_USB_HOST_HCDMAB4_HCDMAB4 register field. */
24421 #define ALT_USB_HOST_HCDMAB4_HCDMAB4_RESET 0x0
24422 /* Extracts the ALT_USB_HOST_HCDMAB4_HCDMAB4 field value from a register. */
24423 #define ALT_USB_HOST_HCDMAB4_HCDMAB4_GET(value) (((value) & 0xffffffff) >> 0)
24424 /* Produces a ALT_USB_HOST_HCDMAB4_HCDMAB4 register field value suitable for setting the register. */
24425 #define ALT_USB_HOST_HCDMAB4_HCDMAB4_SET(value) (((value) << 0) & 0xffffffff)
24426 
24427 #ifndef __ASSEMBLY__
24428 /*
24429  * WARNING: The C register and register group struct declarations are provided for
24430  * convenience and illustrative purposes. They should, however, be used with
24431  * caution as the C language standard provides no guarantees about the alignment or
24432  * atomicity of device memory accesses. The recommended practice for writing
24433  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
24434  * alt_write_word() functions.
24435  *
24436  * The struct declaration for register ALT_USB_HOST_HCDMAB4.
24437  */
24438 struct ALT_USB_HOST_HCDMAB4_s
24439 {
24440  uint32_t hcdmab4 : 32; /* Host Channel 0 DMA Buffer Address */
24441 };
24442 
24443 /* The typedef declaration for register ALT_USB_HOST_HCDMAB4. */
24444 typedef volatile struct ALT_USB_HOST_HCDMAB4_s ALT_USB_HOST_HCDMAB4_t;
24445 #endif /* __ASSEMBLY__ */
24446 
24447 /* The byte offset of the ALT_USB_HOST_HCDMAB4 register from the beginning of the component. */
24448 #define ALT_USB_HOST_HCDMAB4_OFST 0x198
24449 /* The address of the ALT_USB_HOST_HCDMAB4 register. */
24450 #define ALT_USB_HOST_HCDMAB4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB4_OFST))
24451 
24452 /*
24453  * Register : Host Channel 5 Characteristics Register - hcchar5
24454  *
24455  * Channel_number: 5.
24456  *
24457  * Register Layout
24458  *
24459  * Bits | Access | Reset | Description
24460  * :--------|:-------|:------|:------------------------
24461  * [10:0] | RW | 0x0 | Maximum Packet Size
24462  * [14:11] | RW | 0x0 | Endpoint Number
24463  * [15] | RW | 0x0 | Endpoint Direction
24464  * [16] | ??? | 0x0 | *UNDEFINED*
24465  * [17] | RW | 0x0 | Low-Speed Device
24466  * [19:18] | RW | 0x0 | Endpoint Type
24467  * [21:20] | RW | 0x0 | Multi Count Error Count
24468  * [28:22] | RW | 0x0 | Device Address
24469  * [29] | ??? | 0x0 | *UNDEFINED*
24470  * [30] | R | 0x0 | Channel Disable
24471  * [31] | R | 0x0 | Channel Enable
24472  *
24473  */
24474 /*
24475  * Field : Maximum Packet Size - mps
24476  *
24477  * Indicates the maximum packet size of the associated endpoint.
24478  *
24479  * Field Access Macros:
24480  *
24481  */
24482 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR5_MPS register field. */
24483 #define ALT_USB_HOST_HCCHAR5_MPS_LSB 0
24484 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR5_MPS register field. */
24485 #define ALT_USB_HOST_HCCHAR5_MPS_MSB 10
24486 /* The width in bits of the ALT_USB_HOST_HCCHAR5_MPS register field. */
24487 #define ALT_USB_HOST_HCCHAR5_MPS_WIDTH 11
24488 /* The mask used to set the ALT_USB_HOST_HCCHAR5_MPS register field value. */
24489 #define ALT_USB_HOST_HCCHAR5_MPS_SET_MSK 0x000007ff
24490 /* The mask used to clear the ALT_USB_HOST_HCCHAR5_MPS register field value. */
24491 #define ALT_USB_HOST_HCCHAR5_MPS_CLR_MSK 0xfffff800
24492 /* The reset value of the ALT_USB_HOST_HCCHAR5_MPS register field. */
24493 #define ALT_USB_HOST_HCCHAR5_MPS_RESET 0x0
24494 /* Extracts the ALT_USB_HOST_HCCHAR5_MPS field value from a register. */
24495 #define ALT_USB_HOST_HCCHAR5_MPS_GET(value) (((value) & 0x000007ff) >> 0)
24496 /* Produces a ALT_USB_HOST_HCCHAR5_MPS register field value suitable for setting the register. */
24497 #define ALT_USB_HOST_HCCHAR5_MPS_SET(value) (((value) << 0) & 0x000007ff)
24498 
24499 /*
24500  * Field : Endpoint Number - epnum
24501  *
24502  * Indicates the endpoint number on the device serving as the data source or sink.
24503  *
24504  * Field Enumeration Values:
24505  *
24506  * Enum | Value | Description
24507  * :-------------------------------------|:------|:--------------
24508  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT0 | 0x0 | End point 0
24509  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT1 | 0x1 | End point 1
24510  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT2 | 0x2 | End point 2
24511  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT3 | 0x3 | End point 3
24512  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT4 | 0x4 | End point 4
24513  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT5 | 0x5 | End point 5
24514  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT6 | 0x6 | End point 6
24515  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT7 | 0x7 | End point 7
24516  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT8 | 0x8 | End point 8
24517  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT9 | 0x9 | End point 9
24518  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT10 | 0xa | End point 10
24519  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT11 | 0xb | End point 11
24520  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT12 | 0xc | End point 12
24521  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT13 | 0xd | End point 13
24522  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT14 | 0xe | End point 14
24523  * ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT15 | 0xf | End point 15
24524  *
24525  * Field Access Macros:
24526  *
24527  */
24528 /*
24529  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24530  *
24531  * End point 0
24532  */
24533 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT0 0x0
24534 /*
24535  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24536  *
24537  * End point 1
24538  */
24539 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT1 0x1
24540 /*
24541  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24542  *
24543  * End point 2
24544  */
24545 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT2 0x2
24546 /*
24547  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24548  *
24549  * End point 3
24550  */
24551 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT3 0x3
24552 /*
24553  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24554  *
24555  * End point 4
24556  */
24557 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT4 0x4
24558 /*
24559  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24560  *
24561  * End point 5
24562  */
24563 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT5 0x5
24564 /*
24565  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24566  *
24567  * End point 6
24568  */
24569 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT6 0x6
24570 /*
24571  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24572  *
24573  * End point 7
24574  */
24575 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT7 0x7
24576 /*
24577  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24578  *
24579  * End point 8
24580  */
24581 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT8 0x8
24582 /*
24583  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24584  *
24585  * End point 9
24586  */
24587 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT9 0x9
24588 /*
24589  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24590  *
24591  * End point 10
24592  */
24593 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT10 0xa
24594 /*
24595  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24596  *
24597  * End point 11
24598  */
24599 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT11 0xb
24600 /*
24601  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24602  *
24603  * End point 12
24604  */
24605 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT12 0xc
24606 /*
24607  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24608  *
24609  * End point 13
24610  */
24611 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT13 0xd
24612 /*
24613  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24614  *
24615  * End point 14
24616  */
24617 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT14 0xe
24618 /*
24619  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPNUM
24620  *
24621  * End point 15
24622  */
24623 #define ALT_USB_HOST_HCCHAR5_EPNUM_E_ENDPT15 0xf
24624 
24625 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR5_EPNUM register field. */
24626 #define ALT_USB_HOST_HCCHAR5_EPNUM_LSB 11
24627 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR5_EPNUM register field. */
24628 #define ALT_USB_HOST_HCCHAR5_EPNUM_MSB 14
24629 /* The width in bits of the ALT_USB_HOST_HCCHAR5_EPNUM register field. */
24630 #define ALT_USB_HOST_HCCHAR5_EPNUM_WIDTH 4
24631 /* The mask used to set the ALT_USB_HOST_HCCHAR5_EPNUM register field value. */
24632 #define ALT_USB_HOST_HCCHAR5_EPNUM_SET_MSK 0x00007800
24633 /* The mask used to clear the ALT_USB_HOST_HCCHAR5_EPNUM register field value. */
24634 #define ALT_USB_HOST_HCCHAR5_EPNUM_CLR_MSK 0xffff87ff
24635 /* The reset value of the ALT_USB_HOST_HCCHAR5_EPNUM register field. */
24636 #define ALT_USB_HOST_HCCHAR5_EPNUM_RESET 0x0
24637 /* Extracts the ALT_USB_HOST_HCCHAR5_EPNUM field value from a register. */
24638 #define ALT_USB_HOST_HCCHAR5_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
24639 /* Produces a ALT_USB_HOST_HCCHAR5_EPNUM register field value suitable for setting the register. */
24640 #define ALT_USB_HOST_HCCHAR5_EPNUM_SET(value) (((value) << 11) & 0x00007800)
24641 
24642 /*
24643  * Field : Endpoint Direction - epdir
24644  *
24645  * Indicates whether the transaction is IN or OUT.
24646  *
24647  * Field Enumeration Values:
24648  *
24649  * Enum | Value | Description
24650  * :------------------------------------|:------|:------------
24651  * ALT_USB_HOST_HCCHAR5_EPDIR_E_OUTDIR | 0x0 | OUT
24652  * ALT_USB_HOST_HCCHAR5_EPDIR_E_INDIR | 0x1 | IN
24653  *
24654  * Field Access Macros:
24655  *
24656  */
24657 /*
24658  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPDIR
24659  *
24660  * OUT
24661  */
24662 #define ALT_USB_HOST_HCCHAR5_EPDIR_E_OUTDIR 0x0
24663 /*
24664  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPDIR
24665  *
24666  * IN
24667  */
24668 #define ALT_USB_HOST_HCCHAR5_EPDIR_E_INDIR 0x1
24669 
24670 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR5_EPDIR register field. */
24671 #define ALT_USB_HOST_HCCHAR5_EPDIR_LSB 15
24672 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR5_EPDIR register field. */
24673 #define ALT_USB_HOST_HCCHAR5_EPDIR_MSB 15
24674 /* The width in bits of the ALT_USB_HOST_HCCHAR5_EPDIR register field. */
24675 #define ALT_USB_HOST_HCCHAR5_EPDIR_WIDTH 1
24676 /* The mask used to set the ALT_USB_HOST_HCCHAR5_EPDIR register field value. */
24677 #define ALT_USB_HOST_HCCHAR5_EPDIR_SET_MSK 0x00008000
24678 /* The mask used to clear the ALT_USB_HOST_HCCHAR5_EPDIR register field value. */
24679 #define ALT_USB_HOST_HCCHAR5_EPDIR_CLR_MSK 0xffff7fff
24680 /* The reset value of the ALT_USB_HOST_HCCHAR5_EPDIR register field. */
24681 #define ALT_USB_HOST_HCCHAR5_EPDIR_RESET 0x0
24682 /* Extracts the ALT_USB_HOST_HCCHAR5_EPDIR field value from a register. */
24683 #define ALT_USB_HOST_HCCHAR5_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
24684 /* Produces a ALT_USB_HOST_HCCHAR5_EPDIR register field value suitable for setting the register. */
24685 #define ALT_USB_HOST_HCCHAR5_EPDIR_SET(value) (((value) << 15) & 0x00008000)
24686 
24687 /*
24688  * Field : Low-Speed Device - lspddev
24689  *
24690  * This field is Set by the application to indicate that this channel is
24691  * communicating to a low-speed device. The application must program this bit when
24692  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
24693  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
24694  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
24695  * core ignores this bit even if it is set by the application software.
24696  *
24697  * Field Enumeration Values:
24698  *
24699  * Enum | Value | Description
24700  * :-------------------------------------------|:------|:--------------------------------
24701  * ALT_USB_HOST_HCCHAR5_LSPDDEV_E_NONLOWSPEED | 0x0 | Communicating with non lowspeed
24702  * ALT_USB_HOST_HCCHAR5_LSPDDEV_E_LOWSPEED | 0x1 | Communicating with lowspeed
24703  *
24704  * Field Access Macros:
24705  *
24706  */
24707 /*
24708  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_LSPDDEV
24709  *
24710  * Communicating with non lowspeed
24711  */
24712 #define ALT_USB_HOST_HCCHAR5_LSPDDEV_E_NONLOWSPEED 0x0
24713 /*
24714  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_LSPDDEV
24715  *
24716  * Communicating with lowspeed
24717  */
24718 #define ALT_USB_HOST_HCCHAR5_LSPDDEV_E_LOWSPEED 0x1
24719 
24720 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR5_LSPDDEV register field. */
24721 #define ALT_USB_HOST_HCCHAR5_LSPDDEV_LSB 17
24722 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR5_LSPDDEV register field. */
24723 #define ALT_USB_HOST_HCCHAR5_LSPDDEV_MSB 17
24724 /* The width in bits of the ALT_USB_HOST_HCCHAR5_LSPDDEV register field. */
24725 #define ALT_USB_HOST_HCCHAR5_LSPDDEV_WIDTH 1
24726 /* The mask used to set the ALT_USB_HOST_HCCHAR5_LSPDDEV register field value. */
24727 #define ALT_USB_HOST_HCCHAR5_LSPDDEV_SET_MSK 0x00020000
24728 /* The mask used to clear the ALT_USB_HOST_HCCHAR5_LSPDDEV register field value. */
24729 #define ALT_USB_HOST_HCCHAR5_LSPDDEV_CLR_MSK 0xfffdffff
24730 /* The reset value of the ALT_USB_HOST_HCCHAR5_LSPDDEV register field. */
24731 #define ALT_USB_HOST_HCCHAR5_LSPDDEV_RESET 0x0
24732 /* Extracts the ALT_USB_HOST_HCCHAR5_LSPDDEV field value from a register. */
24733 #define ALT_USB_HOST_HCCHAR5_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
24734 /* Produces a ALT_USB_HOST_HCCHAR5_LSPDDEV register field value suitable for setting the register. */
24735 #define ALT_USB_HOST_HCCHAR5_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
24736 
24737 /*
24738  * Field : Endpoint Type - eptype
24739  *
24740  * Indicates the transfer type selected.
24741  *
24742  * Field Enumeration Values:
24743  *
24744  * Enum | Value | Description
24745  * :-------------------------------------|:------|:------------
24746  * ALT_USB_HOST_HCCHAR5_EPTYPE_E_CTL | 0x0 | Control
24747  * ALT_USB_HOST_HCCHAR5_EPTYPE_E_ISOC | 0x1 | Isochronous
24748  * ALT_USB_HOST_HCCHAR5_EPTYPE_E_BULK | 0x2 | Bulk
24749  * ALT_USB_HOST_HCCHAR5_EPTYPE_E_INTERR | 0x3 | Interrupt
24750  *
24751  * Field Access Macros:
24752  *
24753  */
24754 /*
24755  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPTYPE
24756  *
24757  * Control
24758  */
24759 #define ALT_USB_HOST_HCCHAR5_EPTYPE_E_CTL 0x0
24760 /*
24761  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPTYPE
24762  *
24763  * Isochronous
24764  */
24765 #define ALT_USB_HOST_HCCHAR5_EPTYPE_E_ISOC 0x1
24766 /*
24767  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPTYPE
24768  *
24769  * Bulk
24770  */
24771 #define ALT_USB_HOST_HCCHAR5_EPTYPE_E_BULK 0x2
24772 /*
24773  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EPTYPE
24774  *
24775  * Interrupt
24776  */
24777 #define ALT_USB_HOST_HCCHAR5_EPTYPE_E_INTERR 0x3
24778 
24779 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR5_EPTYPE register field. */
24780 #define ALT_USB_HOST_HCCHAR5_EPTYPE_LSB 18
24781 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR5_EPTYPE register field. */
24782 #define ALT_USB_HOST_HCCHAR5_EPTYPE_MSB 19
24783 /* The width in bits of the ALT_USB_HOST_HCCHAR5_EPTYPE register field. */
24784 #define ALT_USB_HOST_HCCHAR5_EPTYPE_WIDTH 2
24785 /* The mask used to set the ALT_USB_HOST_HCCHAR5_EPTYPE register field value. */
24786 #define ALT_USB_HOST_HCCHAR5_EPTYPE_SET_MSK 0x000c0000
24787 /* The mask used to clear the ALT_USB_HOST_HCCHAR5_EPTYPE register field value. */
24788 #define ALT_USB_HOST_HCCHAR5_EPTYPE_CLR_MSK 0xfff3ffff
24789 /* The reset value of the ALT_USB_HOST_HCCHAR5_EPTYPE register field. */
24790 #define ALT_USB_HOST_HCCHAR5_EPTYPE_RESET 0x0
24791 /* Extracts the ALT_USB_HOST_HCCHAR5_EPTYPE field value from a register. */
24792 #define ALT_USB_HOST_HCCHAR5_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
24793 /* Produces a ALT_USB_HOST_HCCHAR5_EPTYPE register field value suitable for setting the register. */
24794 #define ALT_USB_HOST_HCCHAR5_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
24795 
24796 /*
24797  * Field : Multi Count Error Count - ec
24798  *
24799  * When the Split Enable bit of the Host Channel-n Split Control register
24800  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
24801  * transactions that must be executed per microframe for this periodic endpoint.
24802  * for non periodic transfers, this field is used only in DMA mode, and specifies
24803  * the number packets to be fetched for this channel before the internal DMA engine
24804  * changes arbitration. 0x0: Reserved This field yields undefined results. 0x1:
24805  * transaction 0x2: 2 transactions to be issued for this endpoint permicroframe
24806  * 0x3: 3 transactions to be issued for this endpoint permicroframeWhen
24807  * HCSPLTn.SpltEna is Set (1), this field indicates thenumber of immediate retries
24808  * to be performed for a periodic splittransactions on transaction errors. This
24809  * field must be Set to atleast 1.
24810  *
24811  * Field Enumeration Values:
24812  *
24813  * Enum | Value | Description
24814  * :-------------------------------------|:------|:----------------------------------------------
24815  * ALT_USB_HOST_HCCHAR5_EC_E_RSVD | 0x0 | Reserved This field yields undefined results
24816  * ALT_USB_HOST_HCCHAR5_EC_E_TRANSONE | 0x1 | 1 transaction
24817  * ALT_USB_HOST_HCCHAR5_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
24818  * : | | per microframe
24819  * ALT_USB_HOST_HCCHAR5_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
24820  * : | | per microframe
24821  *
24822  * Field Access Macros:
24823  *
24824  */
24825 /*
24826  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EC
24827  *
24828  * Reserved This field yields undefined results
24829  */
24830 #define ALT_USB_HOST_HCCHAR5_EC_E_RSVD 0x0
24831 /*
24832  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EC
24833  *
24834  * 1 transaction
24835  */
24836 #define ALT_USB_HOST_HCCHAR5_EC_E_TRANSONE 0x1
24837 /*
24838  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EC
24839  *
24840  * 2 transactions to be issued for this endpoint per microframe
24841  */
24842 #define ALT_USB_HOST_HCCHAR5_EC_E_TRANSTWO 0x2
24843 /*
24844  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_EC
24845  *
24846  * 3 transactions to be issued for this endpoint per microframe
24847  */
24848 #define ALT_USB_HOST_HCCHAR5_EC_E_TRANSTHREE 0x3
24849 
24850 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR5_EC register field. */
24851 #define ALT_USB_HOST_HCCHAR5_EC_LSB 20
24852 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR5_EC register field. */
24853 #define ALT_USB_HOST_HCCHAR5_EC_MSB 21
24854 /* The width in bits of the ALT_USB_HOST_HCCHAR5_EC register field. */
24855 #define ALT_USB_HOST_HCCHAR5_EC_WIDTH 2
24856 /* The mask used to set the ALT_USB_HOST_HCCHAR5_EC register field value. */
24857 #define ALT_USB_HOST_HCCHAR5_EC_SET_MSK 0x00300000
24858 /* The mask used to clear the ALT_USB_HOST_HCCHAR5_EC register field value. */
24859 #define ALT_USB_HOST_HCCHAR5_EC_CLR_MSK 0xffcfffff
24860 /* The reset value of the ALT_USB_HOST_HCCHAR5_EC register field. */
24861 #define ALT_USB_HOST_HCCHAR5_EC_RESET 0x0
24862 /* Extracts the ALT_USB_HOST_HCCHAR5_EC field value from a register. */
24863 #define ALT_USB_HOST_HCCHAR5_EC_GET(value) (((value) & 0x00300000) >> 20)
24864 /* Produces a ALT_USB_HOST_HCCHAR5_EC register field value suitable for setting the register. */
24865 #define ALT_USB_HOST_HCCHAR5_EC_SET(value) (((value) << 20) & 0x00300000)
24866 
24867 /*
24868  * Field : Device Address - devaddr
24869  *
24870  * This field selects the specific device serving as the data source or sink.
24871  *
24872  * Field Access Macros:
24873  *
24874  */
24875 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR5_DEVADDR register field. */
24876 #define ALT_USB_HOST_HCCHAR5_DEVADDR_LSB 22
24877 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR5_DEVADDR register field. */
24878 #define ALT_USB_HOST_HCCHAR5_DEVADDR_MSB 28
24879 /* The width in bits of the ALT_USB_HOST_HCCHAR5_DEVADDR register field. */
24880 #define ALT_USB_HOST_HCCHAR5_DEVADDR_WIDTH 7
24881 /* The mask used to set the ALT_USB_HOST_HCCHAR5_DEVADDR register field value. */
24882 #define ALT_USB_HOST_HCCHAR5_DEVADDR_SET_MSK 0x1fc00000
24883 /* The mask used to clear the ALT_USB_HOST_HCCHAR5_DEVADDR register field value. */
24884 #define ALT_USB_HOST_HCCHAR5_DEVADDR_CLR_MSK 0xe03fffff
24885 /* The reset value of the ALT_USB_HOST_HCCHAR5_DEVADDR register field. */
24886 #define ALT_USB_HOST_HCCHAR5_DEVADDR_RESET 0x0
24887 /* Extracts the ALT_USB_HOST_HCCHAR5_DEVADDR field value from a register. */
24888 #define ALT_USB_HOST_HCCHAR5_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
24889 /* Produces a ALT_USB_HOST_HCCHAR5_DEVADDR register field value suitable for setting the register. */
24890 #define ALT_USB_HOST_HCCHAR5_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
24891 
24892 /*
24893  * Field : Channel Disable - chdis
24894  *
24895  * The application sets this bit to stop transmitting/receiving data on a channel,
24896  * even before the transfer for that channel is complete. The application must wait
24897  * for the Channel Disabled interrupt before treating the channel as disabled.
24898  *
24899  * Field Enumeration Values:
24900  *
24901  * Enum | Value | Description
24902  * :-----------------------------------|:------|:---------------------------------
24903  * ALT_USB_HOST_HCCHAR5_CHDIS_E_INACT | 0x0 | No activity
24904  * ALT_USB_HOST_HCCHAR5_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving data
24905  *
24906  * Field Access Macros:
24907  *
24908  */
24909 /*
24910  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_CHDIS
24911  *
24912  * No activity
24913  */
24914 #define ALT_USB_HOST_HCCHAR5_CHDIS_E_INACT 0x0
24915 /*
24916  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_CHDIS
24917  *
24918  * Stop transmitting/receiving data
24919  */
24920 #define ALT_USB_HOST_HCCHAR5_CHDIS_E_ACT 0x1
24921 
24922 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR5_CHDIS register field. */
24923 #define ALT_USB_HOST_HCCHAR5_CHDIS_LSB 30
24924 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR5_CHDIS register field. */
24925 #define ALT_USB_HOST_HCCHAR5_CHDIS_MSB 30
24926 /* The width in bits of the ALT_USB_HOST_HCCHAR5_CHDIS register field. */
24927 #define ALT_USB_HOST_HCCHAR5_CHDIS_WIDTH 1
24928 /* The mask used to set the ALT_USB_HOST_HCCHAR5_CHDIS register field value. */
24929 #define ALT_USB_HOST_HCCHAR5_CHDIS_SET_MSK 0x40000000
24930 /* The mask used to clear the ALT_USB_HOST_HCCHAR5_CHDIS register field value. */
24931 #define ALT_USB_HOST_HCCHAR5_CHDIS_CLR_MSK 0xbfffffff
24932 /* The reset value of the ALT_USB_HOST_HCCHAR5_CHDIS register field. */
24933 #define ALT_USB_HOST_HCCHAR5_CHDIS_RESET 0x0
24934 /* Extracts the ALT_USB_HOST_HCCHAR5_CHDIS field value from a register. */
24935 #define ALT_USB_HOST_HCCHAR5_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
24936 /* Produces a ALT_USB_HOST_HCCHAR5_CHDIS register field value suitable for setting the register. */
24937 #define ALT_USB_HOST_HCCHAR5_CHDIS_SET(value) (((value) << 30) & 0x40000000)
24938 
24939 /*
24940  * Field : Channel Enable - chena
24941  *
24942  * When Scatter/Gather mode is disabled. This field is set by the application and
24943  * cleared by the OTG host.
24944  *
24945  * Field Enumeration Values:
24946  *
24947  * Enum | Value | Description
24948  * :------------------------------------|:------|:-------------------------------------------------
24949  * ALT_USB_HOST_HCCHAR5_CHENA_E_NOTRDY | 0x0 | Indicates that the descriptor structure is not
24950  * : | | yet ready
24951  * ALT_USB_HOST_HCCHAR5_CHENA_E_RDY | 0x1 | Indicates that the descriptor structure and data
24952  * : | | buffer with data is setup and this channel can
24953  * : | | access the descriptor
24954  *
24955  * Field Access Macros:
24956  *
24957  */
24958 /*
24959  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_CHENA
24960  *
24961  * Indicates that the descriptor structure is not yet ready
24962  */
24963 #define ALT_USB_HOST_HCCHAR5_CHENA_E_NOTRDY 0x0
24964 /*
24965  * Enumerated value for register field ALT_USB_HOST_HCCHAR5_CHENA
24966  *
24967  * Indicates that the descriptor structure and data buffer with data is setup and
24968  * this channel can access the descriptor
24969  */
24970 #define ALT_USB_HOST_HCCHAR5_CHENA_E_RDY 0x1
24971 
24972 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR5_CHENA register field. */
24973 #define ALT_USB_HOST_HCCHAR5_CHENA_LSB 31
24974 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR5_CHENA register field. */
24975 #define ALT_USB_HOST_HCCHAR5_CHENA_MSB 31
24976 /* The width in bits of the ALT_USB_HOST_HCCHAR5_CHENA register field. */
24977 #define ALT_USB_HOST_HCCHAR5_CHENA_WIDTH 1
24978 /* The mask used to set the ALT_USB_HOST_HCCHAR5_CHENA register field value. */
24979 #define ALT_USB_HOST_HCCHAR5_CHENA_SET_MSK 0x80000000
24980 /* The mask used to clear the ALT_USB_HOST_HCCHAR5_CHENA register field value. */
24981 #define ALT_USB_HOST_HCCHAR5_CHENA_CLR_MSK 0x7fffffff
24982 /* The reset value of the ALT_USB_HOST_HCCHAR5_CHENA register field. */
24983 #define ALT_USB_HOST_HCCHAR5_CHENA_RESET 0x0
24984 /* Extracts the ALT_USB_HOST_HCCHAR5_CHENA field value from a register. */
24985 #define ALT_USB_HOST_HCCHAR5_CHENA_GET(value) (((value) & 0x80000000) >> 31)
24986 /* Produces a ALT_USB_HOST_HCCHAR5_CHENA register field value suitable for setting the register. */
24987 #define ALT_USB_HOST_HCCHAR5_CHENA_SET(value) (((value) << 31) & 0x80000000)
24988 
24989 #ifndef __ASSEMBLY__
24990 /*
24991  * WARNING: The C register and register group struct declarations are provided for
24992  * convenience and illustrative purposes. They should, however, be used with
24993  * caution as the C language standard provides no guarantees about the alignment or
24994  * atomicity of device memory accesses. The recommended practice for writing
24995  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
24996  * alt_write_word() functions.
24997  *
24998  * The struct declaration for register ALT_USB_HOST_HCCHAR5.
24999  */
25000 struct ALT_USB_HOST_HCCHAR5_s
25001 {
25002  uint32_t mps : 11; /* Maximum Packet Size */
25003  uint32_t epnum : 4; /* Endpoint Number */
25004  uint32_t epdir : 1; /* Endpoint Direction */
25005  uint32_t : 1; /* *UNDEFINED* */
25006  uint32_t lspddev : 1; /* Low-Speed Device */
25007  uint32_t eptype : 2; /* Endpoint Type */
25008  uint32_t ec : 2; /* Multi Count Error Count */
25009  uint32_t devaddr : 7; /* Device Address */
25010  uint32_t : 1; /* *UNDEFINED* */
25011  const uint32_t chdis : 1; /* Channel Disable */
25012  const uint32_t chena : 1; /* Channel Enable */
25013 };
25014 
25015 /* The typedef declaration for register ALT_USB_HOST_HCCHAR5. */
25016 typedef volatile struct ALT_USB_HOST_HCCHAR5_s ALT_USB_HOST_HCCHAR5_t;
25017 #endif /* __ASSEMBLY__ */
25018 
25019 /* The byte offset of the ALT_USB_HOST_HCCHAR5 register from the beginning of the component. */
25020 #define ALT_USB_HOST_HCCHAR5_OFST 0x1a0
25021 /* The address of the ALT_USB_HOST_HCCHAR5 register. */
25022 #define ALT_USB_HOST_HCCHAR5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR5_OFST))
25023 
25024 /*
25025  * Register : Host Channel 5 Split Control Register - hcsplt5
25026  *
25027  * Channel_number 5
25028  *
25029  * Register Layout
25030  *
25031  * Bits | Access | Reset | Description
25032  * :--------|:-------|:------|:---------------------
25033  * [6:0] | RW | 0x0 | Port Address
25034  * [13:7] | RW | 0x0 | Hub Address
25035  * [15:14] | RW | 0x0 | Transaction Position
25036  * [16] | RW | 0x0 | Do Complete Split
25037  * [30:17] | ??? | 0x0 | *UNDEFINED*
25038  * [31] | RW | 0x0 | Split Enable
25039  *
25040  */
25041 /*
25042  * Field : Port Address - prtaddr
25043  *
25044  * This field is the port number of the recipient transactiontranslator.
25045  *
25046  * Field Access Macros:
25047  *
25048  */
25049 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT5_PRTADDR register field. */
25050 #define ALT_USB_HOST_HCSPLT5_PRTADDR_LSB 0
25051 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT5_PRTADDR register field. */
25052 #define ALT_USB_HOST_HCSPLT5_PRTADDR_MSB 6
25053 /* The width in bits of the ALT_USB_HOST_HCSPLT5_PRTADDR register field. */
25054 #define ALT_USB_HOST_HCSPLT5_PRTADDR_WIDTH 7
25055 /* The mask used to set the ALT_USB_HOST_HCSPLT5_PRTADDR register field value. */
25056 #define ALT_USB_HOST_HCSPLT5_PRTADDR_SET_MSK 0x0000007f
25057 /* The mask used to clear the ALT_USB_HOST_HCSPLT5_PRTADDR register field value. */
25058 #define ALT_USB_HOST_HCSPLT5_PRTADDR_CLR_MSK 0xffffff80
25059 /* The reset value of the ALT_USB_HOST_HCSPLT5_PRTADDR register field. */
25060 #define ALT_USB_HOST_HCSPLT5_PRTADDR_RESET 0x0
25061 /* Extracts the ALT_USB_HOST_HCSPLT5_PRTADDR field value from a register. */
25062 #define ALT_USB_HOST_HCSPLT5_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
25063 /* Produces a ALT_USB_HOST_HCSPLT5_PRTADDR register field value suitable for setting the register. */
25064 #define ALT_USB_HOST_HCSPLT5_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
25065 
25066 /*
25067  * Field : Hub Address - hubaddr
25068  *
25069  * This field holds the device address of the transaction translator's hub.
25070  *
25071  * Field Access Macros:
25072  *
25073  */
25074 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT5_HUBADDR register field. */
25075 #define ALT_USB_HOST_HCSPLT5_HUBADDR_LSB 7
25076 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT5_HUBADDR register field. */
25077 #define ALT_USB_HOST_HCSPLT5_HUBADDR_MSB 13
25078 /* The width in bits of the ALT_USB_HOST_HCSPLT5_HUBADDR register field. */
25079 #define ALT_USB_HOST_HCSPLT5_HUBADDR_WIDTH 7
25080 /* The mask used to set the ALT_USB_HOST_HCSPLT5_HUBADDR register field value. */
25081 #define ALT_USB_HOST_HCSPLT5_HUBADDR_SET_MSK 0x00003f80
25082 /* The mask used to clear the ALT_USB_HOST_HCSPLT5_HUBADDR register field value. */
25083 #define ALT_USB_HOST_HCSPLT5_HUBADDR_CLR_MSK 0xffffc07f
25084 /* The reset value of the ALT_USB_HOST_HCSPLT5_HUBADDR register field. */
25085 #define ALT_USB_HOST_HCSPLT5_HUBADDR_RESET 0x0
25086 /* Extracts the ALT_USB_HOST_HCSPLT5_HUBADDR field value from a register. */
25087 #define ALT_USB_HOST_HCSPLT5_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
25088 /* Produces a ALT_USB_HOST_HCSPLT5_HUBADDR register field value suitable for setting the register. */
25089 #define ALT_USB_HOST_HCSPLT5_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
25090 
25091 /*
25092  * Field : Transaction Position - xactpos
25093  *
25094  * This field is used to determine whether to send all, first, middle, or last
25095  * payloads with each OUT transaction.
25096  *
25097  * Field Enumeration Values:
25098  *
25099  * Enum | Value | Description
25100  * :--------------------------------------|:------|:------------------------------------------------
25101  * ALT_USB_HOST_HCSPLT5_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
25102  * : | | transaction (which is larger than 188 bytes)
25103  * ALT_USB_HOST_HCSPLT5_XACTPOS_E_END | 0x1 | End. This is the last payload of this
25104  * : | | transaction (which is larger than 188 bytes)
25105  * ALT_USB_HOST_HCSPLT5_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
25106  * : | | transaction (which is larger than 188 bytes)
25107  * ALT_USB_HOST_HCSPLT5_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
25108  * : | | transaction (which is less than or equal to 188
25109  * : | | bytes)
25110  *
25111  * Field Access Macros:
25112  *
25113  */
25114 /*
25115  * Enumerated value for register field ALT_USB_HOST_HCSPLT5_XACTPOS
25116  *
25117  * Mid. This is the middle payload of this transaction (which is larger than 188
25118  * bytes)
25119  */
25120 #define ALT_USB_HOST_HCSPLT5_XACTPOS_E_MIDDLE 0x0
25121 /*
25122  * Enumerated value for register field ALT_USB_HOST_HCSPLT5_XACTPOS
25123  *
25124  * End. This is the last payload of this transaction (which is larger than 188
25125  * bytes)
25126  */
25127 #define ALT_USB_HOST_HCSPLT5_XACTPOS_E_END 0x1
25128 /*
25129  * Enumerated value for register field ALT_USB_HOST_HCSPLT5_XACTPOS
25130  *
25131  * Begin. This is the first data payload of this transaction (which is larger than
25132  * 188 bytes)
25133  */
25134 #define ALT_USB_HOST_HCSPLT5_XACTPOS_E_BEGIN 0x2
25135 /*
25136  * Enumerated value for register field ALT_USB_HOST_HCSPLT5_XACTPOS
25137  *
25138  * All. This is the entire data payload is of this transaction (which is less than
25139  * or equal to 188 bytes)
25140  */
25141 #define ALT_USB_HOST_HCSPLT5_XACTPOS_E_ALL 0x3
25142 
25143 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT5_XACTPOS register field. */
25144 #define ALT_USB_HOST_HCSPLT5_XACTPOS_LSB 14
25145 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT5_XACTPOS register field. */
25146 #define ALT_USB_HOST_HCSPLT5_XACTPOS_MSB 15
25147 /* The width in bits of the ALT_USB_HOST_HCSPLT5_XACTPOS register field. */
25148 #define ALT_USB_HOST_HCSPLT5_XACTPOS_WIDTH 2
25149 /* The mask used to set the ALT_USB_HOST_HCSPLT5_XACTPOS register field value. */
25150 #define ALT_USB_HOST_HCSPLT5_XACTPOS_SET_MSK 0x0000c000
25151 /* The mask used to clear the ALT_USB_HOST_HCSPLT5_XACTPOS register field value. */
25152 #define ALT_USB_HOST_HCSPLT5_XACTPOS_CLR_MSK 0xffff3fff
25153 /* The reset value of the ALT_USB_HOST_HCSPLT5_XACTPOS register field. */
25154 #define ALT_USB_HOST_HCSPLT5_XACTPOS_RESET 0x0
25155 /* Extracts the ALT_USB_HOST_HCSPLT5_XACTPOS field value from a register. */
25156 #define ALT_USB_HOST_HCSPLT5_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
25157 /* Produces a ALT_USB_HOST_HCSPLT5_XACTPOS register field value suitable for setting the register. */
25158 #define ALT_USB_HOST_HCSPLT5_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
25159 
25160 /*
25161  * Field : Do Complete Split - compsplt
25162  *
25163  * The application sets this field to request the OTG host to perform a complete
25164  * split transaction.
25165  *
25166  * Field Enumeration Values:
25167  *
25168  * Enum | Value | Description
25169  * :----------------------------------------|:------|:---------------------
25170  * ALT_USB_HOST_HCSPLT5_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
25171  * ALT_USB_HOST_HCSPLT5_COMPSPLT_E_SPLIT | 0x1 | Split transaction
25172  *
25173  * Field Access Macros:
25174  *
25175  */
25176 /*
25177  * Enumerated value for register field ALT_USB_HOST_HCSPLT5_COMPSPLT
25178  *
25179  * No split transaction
25180  */
25181 #define ALT_USB_HOST_HCSPLT5_COMPSPLT_E_NOSPLIT 0x0
25182 /*
25183  * Enumerated value for register field ALT_USB_HOST_HCSPLT5_COMPSPLT
25184  *
25185  * Split transaction
25186  */
25187 #define ALT_USB_HOST_HCSPLT5_COMPSPLT_E_SPLIT 0x1
25188 
25189 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT5_COMPSPLT register field. */
25190 #define ALT_USB_HOST_HCSPLT5_COMPSPLT_LSB 16
25191 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT5_COMPSPLT register field. */
25192 #define ALT_USB_HOST_HCSPLT5_COMPSPLT_MSB 16
25193 /* The width in bits of the ALT_USB_HOST_HCSPLT5_COMPSPLT register field. */
25194 #define ALT_USB_HOST_HCSPLT5_COMPSPLT_WIDTH 1
25195 /* The mask used to set the ALT_USB_HOST_HCSPLT5_COMPSPLT register field value. */
25196 #define ALT_USB_HOST_HCSPLT5_COMPSPLT_SET_MSK 0x00010000
25197 /* The mask used to clear the ALT_USB_HOST_HCSPLT5_COMPSPLT register field value. */
25198 #define ALT_USB_HOST_HCSPLT5_COMPSPLT_CLR_MSK 0xfffeffff
25199 /* The reset value of the ALT_USB_HOST_HCSPLT5_COMPSPLT register field. */
25200 #define ALT_USB_HOST_HCSPLT5_COMPSPLT_RESET 0x0
25201 /* Extracts the ALT_USB_HOST_HCSPLT5_COMPSPLT field value from a register. */
25202 #define ALT_USB_HOST_HCSPLT5_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
25203 /* Produces a ALT_USB_HOST_HCSPLT5_COMPSPLT register field value suitable for setting the register. */
25204 #define ALT_USB_HOST_HCSPLT5_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
25205 
25206 /*
25207  * Field : Split Enable - spltena
25208  *
25209  * The application sets this field to indicate that this channel is enabled to
25210  * perform split transactions.
25211  *
25212  * Field Enumeration Values:
25213  *
25214  * Enum | Value | Description
25215  * :------------------------------------|:------|:------------------
25216  * ALT_USB_HOST_HCSPLT5_SPLTENA_E_DISD | 0x0 | Split not enabled
25217  * ALT_USB_HOST_HCSPLT5_SPLTENA_E_END | 0x1 | Split enabled
25218  *
25219  * Field Access Macros:
25220  *
25221  */
25222 /*
25223  * Enumerated value for register field ALT_USB_HOST_HCSPLT5_SPLTENA
25224  *
25225  * Split not enabled
25226  */
25227 #define ALT_USB_HOST_HCSPLT5_SPLTENA_E_DISD 0x0
25228 /*
25229  * Enumerated value for register field ALT_USB_HOST_HCSPLT5_SPLTENA
25230  *
25231  * Split enabled
25232  */
25233 #define ALT_USB_HOST_HCSPLT5_SPLTENA_E_END 0x1
25234 
25235 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT5_SPLTENA register field. */
25236 #define ALT_USB_HOST_HCSPLT5_SPLTENA_LSB 31
25237 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT5_SPLTENA register field. */
25238 #define ALT_USB_HOST_HCSPLT5_SPLTENA_MSB 31
25239 /* The width in bits of the ALT_USB_HOST_HCSPLT5_SPLTENA register field. */
25240 #define ALT_USB_HOST_HCSPLT5_SPLTENA_WIDTH 1
25241 /* The mask used to set the ALT_USB_HOST_HCSPLT5_SPLTENA register field value. */
25242 #define ALT_USB_HOST_HCSPLT5_SPLTENA_SET_MSK 0x80000000
25243 /* The mask used to clear the ALT_USB_HOST_HCSPLT5_SPLTENA register field value. */
25244 #define ALT_USB_HOST_HCSPLT5_SPLTENA_CLR_MSK 0x7fffffff
25245 /* The reset value of the ALT_USB_HOST_HCSPLT5_SPLTENA register field. */
25246 #define ALT_USB_HOST_HCSPLT5_SPLTENA_RESET 0x0
25247 /* Extracts the ALT_USB_HOST_HCSPLT5_SPLTENA field value from a register. */
25248 #define ALT_USB_HOST_HCSPLT5_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
25249 /* Produces a ALT_USB_HOST_HCSPLT5_SPLTENA register field value suitable for setting the register. */
25250 #define ALT_USB_HOST_HCSPLT5_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
25251 
25252 #ifndef __ASSEMBLY__
25253 /*
25254  * WARNING: The C register and register group struct declarations are provided for
25255  * convenience and illustrative purposes. They should, however, be used with
25256  * caution as the C language standard provides no guarantees about the alignment or
25257  * atomicity of device memory accesses. The recommended practice for writing
25258  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
25259  * alt_write_word() functions.
25260  *
25261  * The struct declaration for register ALT_USB_HOST_HCSPLT5.
25262  */
25263 struct ALT_USB_HOST_HCSPLT5_s
25264 {
25265  uint32_t prtaddr : 7; /* Port Address */
25266  uint32_t hubaddr : 7; /* Hub Address */
25267  uint32_t xactpos : 2; /* Transaction Position */
25268  uint32_t compsplt : 1; /* Do Complete Split */
25269  uint32_t : 14; /* *UNDEFINED* */
25270  uint32_t spltena : 1; /* Split Enable */
25271 };
25272 
25273 /* The typedef declaration for register ALT_USB_HOST_HCSPLT5. */
25274 typedef volatile struct ALT_USB_HOST_HCSPLT5_s ALT_USB_HOST_HCSPLT5_t;
25275 #endif /* __ASSEMBLY__ */
25276 
25277 /* The byte offset of the ALT_USB_HOST_HCSPLT5 register from the beginning of the component. */
25278 #define ALT_USB_HOST_HCSPLT5_OFST 0x1a4
25279 /* The address of the ALT_USB_HOST_HCSPLT5 register. */
25280 #define ALT_USB_HOST_HCSPLT5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT5_OFST))
25281 
25282 /*
25283  * Register : Host Channel 5 Interrupt Register - hcint5
25284  *
25285  * This register indicates the status of a channel with respect to USB- and AHB-
25286  * related events. The application must read this register when the Host Channels
25287  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
25288  * application can read this register, it must first read the Host All Channels
25289  * Interrupt (HAINT) register to get the exact channel number for the Host
25290  * Channel-n Interrupt register. The application must clear the appropriate bit in
25291  * this register to clear the corresponding bits in the HAINT and GINTSTS
25292  * registers.
25293  *
25294  * Register Layout
25295  *
25296  * Bits | Access | Reset | Description
25297  * :--------|:-------|:------|:--------------------------------------------
25298  * [0] | R | 0x0 | Transfer Completed
25299  * [1] | R | 0x0 | Channel Halted
25300  * [2] | R | 0x0 | AHB Error
25301  * [3] | R | 0x0 | STALL Response Received Interrupt
25302  * [4] | R | 0x0 | NAK Response Received Interrupt
25303  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
25304  * [6] | R | 0x0 | NYET Response Received Interrupt
25305  * [7] | R | 0x0 | Transaction Error
25306  * [8] | R | 0x0 | Babble Error
25307  * [9] | R | 0x0 | Frame Overrun
25308  * [10] | R | 0x0 | Data Toggle Error
25309  * [11] | R | 0x0 | BNA Interrupt
25310  * [12] | R | 0x0 | Excessive Transaction Error
25311  * [13] | R | 0x0 | Descriptor rollover interrupt
25312  * [31:14] | ??? | 0x0 | *UNDEFINED*
25313  *
25314  */
25315 /*
25316  * Field : Transfer Completed - xfercompl
25317  *
25318  * Transfer completed normally without any errors. This bit can be set only by the
25319  * core and the application should write 1 to clear it.
25320  *
25321  * Field Enumeration Values:
25322  *
25323  * Enum | Value | Description
25324  * :--------------------------------------|:------|:-----------------------------------------------
25325  * ALT_USB_HOST_HCINT5_XFERCOMPL_E_INACT | 0x0 | No transfer
25326  * ALT_USB_HOST_HCINT5_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
25327  *
25328  * Field Access Macros:
25329  *
25330  */
25331 /*
25332  * Enumerated value for register field ALT_USB_HOST_HCINT5_XFERCOMPL
25333  *
25334  * No transfer
25335  */
25336 #define ALT_USB_HOST_HCINT5_XFERCOMPL_E_INACT 0x0
25337 /*
25338  * Enumerated value for register field ALT_USB_HOST_HCINT5_XFERCOMPL
25339  *
25340  * Transfer completed normally without any errors
25341  */
25342 #define ALT_USB_HOST_HCINT5_XFERCOMPL_E_ACT 0x1
25343 
25344 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_XFERCOMPL register field. */
25345 #define ALT_USB_HOST_HCINT5_XFERCOMPL_LSB 0
25346 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_XFERCOMPL register field. */
25347 #define ALT_USB_HOST_HCINT5_XFERCOMPL_MSB 0
25348 /* The width in bits of the ALT_USB_HOST_HCINT5_XFERCOMPL register field. */
25349 #define ALT_USB_HOST_HCINT5_XFERCOMPL_WIDTH 1
25350 /* The mask used to set the ALT_USB_HOST_HCINT5_XFERCOMPL register field value. */
25351 #define ALT_USB_HOST_HCINT5_XFERCOMPL_SET_MSK 0x00000001
25352 /* The mask used to clear the ALT_USB_HOST_HCINT5_XFERCOMPL register field value. */
25353 #define ALT_USB_HOST_HCINT5_XFERCOMPL_CLR_MSK 0xfffffffe
25354 /* The reset value of the ALT_USB_HOST_HCINT5_XFERCOMPL register field. */
25355 #define ALT_USB_HOST_HCINT5_XFERCOMPL_RESET 0x0
25356 /* Extracts the ALT_USB_HOST_HCINT5_XFERCOMPL field value from a register. */
25357 #define ALT_USB_HOST_HCINT5_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
25358 /* Produces a ALT_USB_HOST_HCINT5_XFERCOMPL register field value suitable for setting the register. */
25359 #define ALT_USB_HOST_HCINT5_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
25360 
25361 /*
25362  * Field : Channel Halted - chhltd
25363  *
25364  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
25365  * either because of any USB transaction error or in response to disable request by
25366  * the application or because of a completed transfer. In Scatter/gather DMA mode,
25367  * this indicates that transfer completed due to any of the following
25368  *
25369  * . EOL being set in descriptor
25370  *
25371  * . AHB error
25372  *
25373  * . Excessive transaction errors
25374  *
25375  * . Babble
25376  *
25377  * . Stall
25378  *
25379  * Field Enumeration Values:
25380  *
25381  * Enum | Value | Description
25382  * :-----------------------------------|:------|:-------------------
25383  * ALT_USB_HOST_HCINT5_CHHLTD_E_INACT | 0x0 | Channel not halted
25384  * ALT_USB_HOST_HCINT5_CHHLTD_E_ACT | 0x1 | Channel Halted
25385  *
25386  * Field Access Macros:
25387  *
25388  */
25389 /*
25390  * Enumerated value for register field ALT_USB_HOST_HCINT5_CHHLTD
25391  *
25392  * Channel not halted
25393  */
25394 #define ALT_USB_HOST_HCINT5_CHHLTD_E_INACT 0x0
25395 /*
25396  * Enumerated value for register field ALT_USB_HOST_HCINT5_CHHLTD
25397  *
25398  * Channel Halted
25399  */
25400 #define ALT_USB_HOST_HCINT5_CHHLTD_E_ACT 0x1
25401 
25402 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_CHHLTD register field. */
25403 #define ALT_USB_HOST_HCINT5_CHHLTD_LSB 1
25404 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_CHHLTD register field. */
25405 #define ALT_USB_HOST_HCINT5_CHHLTD_MSB 1
25406 /* The width in bits of the ALT_USB_HOST_HCINT5_CHHLTD register field. */
25407 #define ALT_USB_HOST_HCINT5_CHHLTD_WIDTH 1
25408 /* The mask used to set the ALT_USB_HOST_HCINT5_CHHLTD register field value. */
25409 #define ALT_USB_HOST_HCINT5_CHHLTD_SET_MSK 0x00000002
25410 /* The mask used to clear the ALT_USB_HOST_HCINT5_CHHLTD register field value. */
25411 #define ALT_USB_HOST_HCINT5_CHHLTD_CLR_MSK 0xfffffffd
25412 /* The reset value of the ALT_USB_HOST_HCINT5_CHHLTD register field. */
25413 #define ALT_USB_HOST_HCINT5_CHHLTD_RESET 0x0
25414 /* Extracts the ALT_USB_HOST_HCINT5_CHHLTD field value from a register. */
25415 #define ALT_USB_HOST_HCINT5_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
25416 /* Produces a ALT_USB_HOST_HCINT5_CHHLTD register field value suitable for setting the register. */
25417 #define ALT_USB_HOST_HCINT5_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
25418 
25419 /*
25420  * Field : AHB Error - ahberr
25421  *
25422  * This is generated only in Internal DMA mode when there is an AHB error during
25423  * AHB read/write. The application can read the corresponding channel's DMA address
25424  * register to get the error address.
25425  *
25426  * Field Enumeration Values:
25427  *
25428  * Enum | Value | Description
25429  * :-----------------------------------|:------|:--------------------------------
25430  * ALT_USB_HOST_HCINT5_AHBERR_E_INACT | 0x0 | No AHB error
25431  * ALT_USB_HOST_HCINT5_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
25432  *
25433  * Field Access Macros:
25434  *
25435  */
25436 /*
25437  * Enumerated value for register field ALT_USB_HOST_HCINT5_AHBERR
25438  *
25439  * No AHB error
25440  */
25441 #define ALT_USB_HOST_HCINT5_AHBERR_E_INACT 0x0
25442 /*
25443  * Enumerated value for register field ALT_USB_HOST_HCINT5_AHBERR
25444  *
25445  * AHB error during AHB read/write
25446  */
25447 #define ALT_USB_HOST_HCINT5_AHBERR_E_ACT 0x1
25448 
25449 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_AHBERR register field. */
25450 #define ALT_USB_HOST_HCINT5_AHBERR_LSB 2
25451 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_AHBERR register field. */
25452 #define ALT_USB_HOST_HCINT5_AHBERR_MSB 2
25453 /* The width in bits of the ALT_USB_HOST_HCINT5_AHBERR register field. */
25454 #define ALT_USB_HOST_HCINT5_AHBERR_WIDTH 1
25455 /* The mask used to set the ALT_USB_HOST_HCINT5_AHBERR register field value. */
25456 #define ALT_USB_HOST_HCINT5_AHBERR_SET_MSK 0x00000004
25457 /* The mask used to clear the ALT_USB_HOST_HCINT5_AHBERR register field value. */
25458 #define ALT_USB_HOST_HCINT5_AHBERR_CLR_MSK 0xfffffffb
25459 /* The reset value of the ALT_USB_HOST_HCINT5_AHBERR register field. */
25460 #define ALT_USB_HOST_HCINT5_AHBERR_RESET 0x0
25461 /* Extracts the ALT_USB_HOST_HCINT5_AHBERR field value from a register. */
25462 #define ALT_USB_HOST_HCINT5_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
25463 /* Produces a ALT_USB_HOST_HCINT5_AHBERR register field value suitable for setting the register. */
25464 #define ALT_USB_HOST_HCINT5_AHBERR_SET(value) (((value) << 2) & 0x00000004)
25465 
25466 /*
25467  * Field : STALL Response Received Interrupt - stall
25468  *
25469  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
25470  * This bit can be set only by the core and the application should write 1 to clear
25471  * it.
25472  *
25473  * Field Enumeration Values:
25474  *
25475  * Enum | Value | Description
25476  * :----------------------------------|:------|:-------------------
25477  * ALT_USB_HOST_HCINT5_STALL_E_INACT | 0x0 | No Stall Interrupt
25478  * ALT_USB_HOST_HCINT5_STALL_E_ACT | 0x1 | Stall Interrupt
25479  *
25480  * Field Access Macros:
25481  *
25482  */
25483 /*
25484  * Enumerated value for register field ALT_USB_HOST_HCINT5_STALL
25485  *
25486  * No Stall Interrupt
25487  */
25488 #define ALT_USB_HOST_HCINT5_STALL_E_INACT 0x0
25489 /*
25490  * Enumerated value for register field ALT_USB_HOST_HCINT5_STALL
25491  *
25492  * Stall Interrupt
25493  */
25494 #define ALT_USB_HOST_HCINT5_STALL_E_ACT 0x1
25495 
25496 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_STALL register field. */
25497 #define ALT_USB_HOST_HCINT5_STALL_LSB 3
25498 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_STALL register field. */
25499 #define ALT_USB_HOST_HCINT5_STALL_MSB 3
25500 /* The width in bits of the ALT_USB_HOST_HCINT5_STALL register field. */
25501 #define ALT_USB_HOST_HCINT5_STALL_WIDTH 1
25502 /* The mask used to set the ALT_USB_HOST_HCINT5_STALL register field value. */
25503 #define ALT_USB_HOST_HCINT5_STALL_SET_MSK 0x00000008
25504 /* The mask used to clear the ALT_USB_HOST_HCINT5_STALL register field value. */
25505 #define ALT_USB_HOST_HCINT5_STALL_CLR_MSK 0xfffffff7
25506 /* The reset value of the ALT_USB_HOST_HCINT5_STALL register field. */
25507 #define ALT_USB_HOST_HCINT5_STALL_RESET 0x0
25508 /* Extracts the ALT_USB_HOST_HCINT5_STALL field value from a register. */
25509 #define ALT_USB_HOST_HCINT5_STALL_GET(value) (((value) & 0x00000008) >> 3)
25510 /* Produces a ALT_USB_HOST_HCINT5_STALL register field value suitable for setting the register. */
25511 #define ALT_USB_HOST_HCINT5_STALL_SET(value) (((value) << 3) & 0x00000008)
25512 
25513 /*
25514  * Field : NAK Response Received Interrupt - nak
25515  *
25516  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
25517  * core.This bit can be set only by the core and the application should write 1 to
25518  * clear it.
25519  *
25520  * Field Enumeration Values:
25521  *
25522  * Enum | Value | Description
25523  * :--------------------------------|:------|:-----------------------------------
25524  * ALT_USB_HOST_HCINT5_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
25525  * ALT_USB_HOST_HCINT5_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
25526  *
25527  * Field Access Macros:
25528  *
25529  */
25530 /*
25531  * Enumerated value for register field ALT_USB_HOST_HCINT5_NAK
25532  *
25533  * No NAK Response Received Interrupt
25534  */
25535 #define ALT_USB_HOST_HCINT5_NAK_E_INACT 0x0
25536 /*
25537  * Enumerated value for register field ALT_USB_HOST_HCINT5_NAK
25538  *
25539  * NAK Response Received Interrupt
25540  */
25541 #define ALT_USB_HOST_HCINT5_NAK_E_ACT 0x1
25542 
25543 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_NAK register field. */
25544 #define ALT_USB_HOST_HCINT5_NAK_LSB 4
25545 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_NAK register field. */
25546 #define ALT_USB_HOST_HCINT5_NAK_MSB 4
25547 /* The width in bits of the ALT_USB_HOST_HCINT5_NAK register field. */
25548 #define ALT_USB_HOST_HCINT5_NAK_WIDTH 1
25549 /* The mask used to set the ALT_USB_HOST_HCINT5_NAK register field value. */
25550 #define ALT_USB_HOST_HCINT5_NAK_SET_MSK 0x00000010
25551 /* The mask used to clear the ALT_USB_HOST_HCINT5_NAK register field value. */
25552 #define ALT_USB_HOST_HCINT5_NAK_CLR_MSK 0xffffffef
25553 /* The reset value of the ALT_USB_HOST_HCINT5_NAK register field. */
25554 #define ALT_USB_HOST_HCINT5_NAK_RESET 0x0
25555 /* Extracts the ALT_USB_HOST_HCINT5_NAK field value from a register. */
25556 #define ALT_USB_HOST_HCINT5_NAK_GET(value) (((value) & 0x00000010) >> 4)
25557 /* Produces a ALT_USB_HOST_HCINT5_NAK register field value suitable for setting the register. */
25558 #define ALT_USB_HOST_HCINT5_NAK_SET(value) (((value) << 4) & 0x00000010)
25559 
25560 /*
25561  * Field : ACK Response Received Transmitted Interrupt - ack
25562  *
25563  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
25564  * This bit can be set only by the core and the application should write 1 to clear
25565  * it.
25566  *
25567  * Field Enumeration Values:
25568  *
25569  * Enum | Value | Description
25570  * :--------------------------------|:------|:-----------------------------------------------
25571  * ALT_USB_HOST_HCINT5_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
25572  * ALT_USB_HOST_HCINT5_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
25573  *
25574  * Field Access Macros:
25575  *
25576  */
25577 /*
25578  * Enumerated value for register field ALT_USB_HOST_HCINT5_ACK
25579  *
25580  * No ACK Response Received Transmitted Interrupt
25581  */
25582 #define ALT_USB_HOST_HCINT5_ACK_E_INACT 0x0
25583 /*
25584  * Enumerated value for register field ALT_USB_HOST_HCINT5_ACK
25585  *
25586  * ACK Response Received Transmitted Interrup
25587  */
25588 #define ALT_USB_HOST_HCINT5_ACK_E_ACT 0x1
25589 
25590 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_ACK register field. */
25591 #define ALT_USB_HOST_HCINT5_ACK_LSB 5
25592 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_ACK register field. */
25593 #define ALT_USB_HOST_HCINT5_ACK_MSB 5
25594 /* The width in bits of the ALT_USB_HOST_HCINT5_ACK register field. */
25595 #define ALT_USB_HOST_HCINT5_ACK_WIDTH 1
25596 /* The mask used to set the ALT_USB_HOST_HCINT5_ACK register field value. */
25597 #define ALT_USB_HOST_HCINT5_ACK_SET_MSK 0x00000020
25598 /* The mask used to clear the ALT_USB_HOST_HCINT5_ACK register field value. */
25599 #define ALT_USB_HOST_HCINT5_ACK_CLR_MSK 0xffffffdf
25600 /* The reset value of the ALT_USB_HOST_HCINT5_ACK register field. */
25601 #define ALT_USB_HOST_HCINT5_ACK_RESET 0x0
25602 /* Extracts the ALT_USB_HOST_HCINT5_ACK field value from a register. */
25603 #define ALT_USB_HOST_HCINT5_ACK_GET(value) (((value) & 0x00000020) >> 5)
25604 /* Produces a ALT_USB_HOST_HCINT5_ACK register field value suitable for setting the register. */
25605 #define ALT_USB_HOST_HCINT5_ACK_SET(value) (((value) << 5) & 0x00000020)
25606 
25607 /*
25608  * Field : NYET Response Received Interrupt - nyet
25609  *
25610  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
25611  * core.This bit can be set only by the core and the application should write 1 to
25612  * clear it.
25613  *
25614  * Field Enumeration Values:
25615  *
25616  * Enum | Value | Description
25617  * :---------------------------------|:------|:------------------------------------
25618  * ALT_USB_HOST_HCINT5_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
25619  * ALT_USB_HOST_HCINT5_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
25620  *
25621  * Field Access Macros:
25622  *
25623  */
25624 /*
25625  * Enumerated value for register field ALT_USB_HOST_HCINT5_NYET
25626  *
25627  * No NYET Response Received Interrupt
25628  */
25629 #define ALT_USB_HOST_HCINT5_NYET_E_INACT 0x0
25630 /*
25631  * Enumerated value for register field ALT_USB_HOST_HCINT5_NYET
25632  *
25633  * NYET Response Received Interrupt
25634  */
25635 #define ALT_USB_HOST_HCINT5_NYET_E_ACT 0x1
25636 
25637 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_NYET register field. */
25638 #define ALT_USB_HOST_HCINT5_NYET_LSB 6
25639 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_NYET register field. */
25640 #define ALT_USB_HOST_HCINT5_NYET_MSB 6
25641 /* The width in bits of the ALT_USB_HOST_HCINT5_NYET register field. */
25642 #define ALT_USB_HOST_HCINT5_NYET_WIDTH 1
25643 /* The mask used to set the ALT_USB_HOST_HCINT5_NYET register field value. */
25644 #define ALT_USB_HOST_HCINT5_NYET_SET_MSK 0x00000040
25645 /* The mask used to clear the ALT_USB_HOST_HCINT5_NYET register field value. */
25646 #define ALT_USB_HOST_HCINT5_NYET_CLR_MSK 0xffffffbf
25647 /* The reset value of the ALT_USB_HOST_HCINT5_NYET register field. */
25648 #define ALT_USB_HOST_HCINT5_NYET_RESET 0x0
25649 /* Extracts the ALT_USB_HOST_HCINT5_NYET field value from a register. */
25650 #define ALT_USB_HOST_HCINT5_NYET_GET(value) (((value) & 0x00000040) >> 6)
25651 /* Produces a ALT_USB_HOST_HCINT5_NYET register field value suitable for setting the register. */
25652 #define ALT_USB_HOST_HCINT5_NYET_SET(value) (((value) << 6) & 0x00000040)
25653 
25654 /*
25655  * Field : Transaction Error - xacterr
25656  *
25657  * Indicates one of the following errors occurred on the USB.-CRC check failure
25658  *
25659  * * Timeout
25660  *
25661  * * Bit stuff error
25662  *
25663  * * False EOP
25664  *
25665  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
25666  * This bit can be set only by the core and the application should write 1 to clear
25667  * it.
25668  *
25669  * Field Enumeration Values:
25670  *
25671  * Enum | Value | Description
25672  * :------------------------------------|:------|:---------------------
25673  * ALT_USB_HOST_HCINT5_XACTERR_E_INACT | 0x0 | No Transaction Error
25674  * ALT_USB_HOST_HCINT5_XACTERR_E_ACT | 0x1 | Transaction Error
25675  *
25676  * Field Access Macros:
25677  *
25678  */
25679 /*
25680  * Enumerated value for register field ALT_USB_HOST_HCINT5_XACTERR
25681  *
25682  * No Transaction Error
25683  */
25684 #define ALT_USB_HOST_HCINT5_XACTERR_E_INACT 0x0
25685 /*
25686  * Enumerated value for register field ALT_USB_HOST_HCINT5_XACTERR
25687  *
25688  * Transaction Error
25689  */
25690 #define ALT_USB_HOST_HCINT5_XACTERR_E_ACT 0x1
25691 
25692 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_XACTERR register field. */
25693 #define ALT_USB_HOST_HCINT5_XACTERR_LSB 7
25694 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_XACTERR register field. */
25695 #define ALT_USB_HOST_HCINT5_XACTERR_MSB 7
25696 /* The width in bits of the ALT_USB_HOST_HCINT5_XACTERR register field. */
25697 #define ALT_USB_HOST_HCINT5_XACTERR_WIDTH 1
25698 /* The mask used to set the ALT_USB_HOST_HCINT5_XACTERR register field value. */
25699 #define ALT_USB_HOST_HCINT5_XACTERR_SET_MSK 0x00000080
25700 /* The mask used to clear the ALT_USB_HOST_HCINT5_XACTERR register field value. */
25701 #define ALT_USB_HOST_HCINT5_XACTERR_CLR_MSK 0xffffff7f
25702 /* The reset value of the ALT_USB_HOST_HCINT5_XACTERR register field. */
25703 #define ALT_USB_HOST_HCINT5_XACTERR_RESET 0x0
25704 /* Extracts the ALT_USB_HOST_HCINT5_XACTERR field value from a register. */
25705 #define ALT_USB_HOST_HCINT5_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
25706 /* Produces a ALT_USB_HOST_HCINT5_XACTERR register field value suitable for setting the register. */
25707 #define ALT_USB_HOST_HCINT5_XACTERR_SET(value) (((value) << 7) & 0x00000080)
25708 
25709 /*
25710  * Field : Babble Error - bblerr
25711  *
25712  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
25713  * core..This bit can be set only by the core and the application should write 1 to
25714  * clear it.
25715  *
25716  * Field Enumeration Values:
25717  *
25718  * Enum | Value | Description
25719  * :-----------------------------------|:------|:----------------
25720  * ALT_USB_HOST_HCINT5_BBLERR_E_INACT | 0x0 | No Babble Error
25721  * ALT_USB_HOST_HCINT5_BBLERR_E_ACT | 0x1 | Babble Error
25722  *
25723  * Field Access Macros:
25724  *
25725  */
25726 /*
25727  * Enumerated value for register field ALT_USB_HOST_HCINT5_BBLERR
25728  *
25729  * No Babble Error
25730  */
25731 #define ALT_USB_HOST_HCINT5_BBLERR_E_INACT 0x0
25732 /*
25733  * Enumerated value for register field ALT_USB_HOST_HCINT5_BBLERR
25734  *
25735  * Babble Error
25736  */
25737 #define ALT_USB_HOST_HCINT5_BBLERR_E_ACT 0x1
25738 
25739 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_BBLERR register field. */
25740 #define ALT_USB_HOST_HCINT5_BBLERR_LSB 8
25741 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_BBLERR register field. */
25742 #define ALT_USB_HOST_HCINT5_BBLERR_MSB 8
25743 /* The width in bits of the ALT_USB_HOST_HCINT5_BBLERR register field. */
25744 #define ALT_USB_HOST_HCINT5_BBLERR_WIDTH 1
25745 /* The mask used to set the ALT_USB_HOST_HCINT5_BBLERR register field value. */
25746 #define ALT_USB_HOST_HCINT5_BBLERR_SET_MSK 0x00000100
25747 /* The mask used to clear the ALT_USB_HOST_HCINT5_BBLERR register field value. */
25748 #define ALT_USB_HOST_HCINT5_BBLERR_CLR_MSK 0xfffffeff
25749 /* The reset value of the ALT_USB_HOST_HCINT5_BBLERR register field. */
25750 #define ALT_USB_HOST_HCINT5_BBLERR_RESET 0x0
25751 /* Extracts the ALT_USB_HOST_HCINT5_BBLERR field value from a register. */
25752 #define ALT_USB_HOST_HCINT5_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
25753 /* Produces a ALT_USB_HOST_HCINT5_BBLERR register field value suitable for setting the register. */
25754 #define ALT_USB_HOST_HCINT5_BBLERR_SET(value) (((value) << 8) & 0x00000100)
25755 
25756 /*
25757  * Field : Frame Overrun - frmovrun
25758  *
25759  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
25760  * This bit can be set only by the core and the application should write 1 to clear
25761  * it.
25762  *
25763  * Field Enumeration Values:
25764  *
25765  * Enum | Value | Description
25766  * :-------------------------------------|:------|:-----------------
25767  * ALT_USB_HOST_HCINT5_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
25768  * ALT_USB_HOST_HCINT5_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
25769  *
25770  * Field Access Macros:
25771  *
25772  */
25773 /*
25774  * Enumerated value for register field ALT_USB_HOST_HCINT5_FRMOVRUN
25775  *
25776  * No Frame Overrun
25777  */
25778 #define ALT_USB_HOST_HCINT5_FRMOVRUN_E_INACT 0x0
25779 /*
25780  * Enumerated value for register field ALT_USB_HOST_HCINT5_FRMOVRUN
25781  *
25782  * Frame Overrun
25783  */
25784 #define ALT_USB_HOST_HCINT5_FRMOVRUN_E_ACT 0x1
25785 
25786 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_FRMOVRUN register field. */
25787 #define ALT_USB_HOST_HCINT5_FRMOVRUN_LSB 9
25788 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_FRMOVRUN register field. */
25789 #define ALT_USB_HOST_HCINT5_FRMOVRUN_MSB 9
25790 /* The width in bits of the ALT_USB_HOST_HCINT5_FRMOVRUN register field. */
25791 #define ALT_USB_HOST_HCINT5_FRMOVRUN_WIDTH 1
25792 /* The mask used to set the ALT_USB_HOST_HCINT5_FRMOVRUN register field value. */
25793 #define ALT_USB_HOST_HCINT5_FRMOVRUN_SET_MSK 0x00000200
25794 /* The mask used to clear the ALT_USB_HOST_HCINT5_FRMOVRUN register field value. */
25795 #define ALT_USB_HOST_HCINT5_FRMOVRUN_CLR_MSK 0xfffffdff
25796 /* The reset value of the ALT_USB_HOST_HCINT5_FRMOVRUN register field. */
25797 #define ALT_USB_HOST_HCINT5_FRMOVRUN_RESET 0x0
25798 /* Extracts the ALT_USB_HOST_HCINT5_FRMOVRUN field value from a register. */
25799 #define ALT_USB_HOST_HCINT5_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
25800 /* Produces a ALT_USB_HOST_HCINT5_FRMOVRUN register field value suitable for setting the register. */
25801 #define ALT_USB_HOST_HCINT5_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
25802 
25803 /*
25804  * Field : Data Toggle Error - datatglerr
25805  *
25806  * This bit can be set only by the core and the application should write 1 to clear
25807  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
25808  * core.
25809  *
25810  * Field Enumeration Values:
25811  *
25812  * Enum | Value | Description
25813  * :---------------------------------------|:------|:---------------------
25814  * ALT_USB_HOST_HCINT5_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
25815  * ALT_USB_HOST_HCINT5_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
25816  *
25817  * Field Access Macros:
25818  *
25819  */
25820 /*
25821  * Enumerated value for register field ALT_USB_HOST_HCINT5_DATATGLERR
25822  *
25823  * No Data Toggle Error
25824  */
25825 #define ALT_USB_HOST_HCINT5_DATATGLERR_E_INACT 0x0
25826 /*
25827  * Enumerated value for register field ALT_USB_HOST_HCINT5_DATATGLERR
25828  *
25829  * Data Toggle Error
25830  */
25831 #define ALT_USB_HOST_HCINT5_DATATGLERR_E_ACT 0x1
25832 
25833 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_DATATGLERR register field. */
25834 #define ALT_USB_HOST_HCINT5_DATATGLERR_LSB 10
25835 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_DATATGLERR register field. */
25836 #define ALT_USB_HOST_HCINT5_DATATGLERR_MSB 10
25837 /* The width in bits of the ALT_USB_HOST_HCINT5_DATATGLERR register field. */
25838 #define ALT_USB_HOST_HCINT5_DATATGLERR_WIDTH 1
25839 /* The mask used to set the ALT_USB_HOST_HCINT5_DATATGLERR register field value. */
25840 #define ALT_USB_HOST_HCINT5_DATATGLERR_SET_MSK 0x00000400
25841 /* The mask used to clear the ALT_USB_HOST_HCINT5_DATATGLERR register field value. */
25842 #define ALT_USB_HOST_HCINT5_DATATGLERR_CLR_MSK 0xfffffbff
25843 /* The reset value of the ALT_USB_HOST_HCINT5_DATATGLERR register field. */
25844 #define ALT_USB_HOST_HCINT5_DATATGLERR_RESET 0x0
25845 /* Extracts the ALT_USB_HOST_HCINT5_DATATGLERR field value from a register. */
25846 #define ALT_USB_HOST_HCINT5_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
25847 /* Produces a ALT_USB_HOST_HCINT5_DATATGLERR register field value suitable for setting the register. */
25848 #define ALT_USB_HOST_HCINT5_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
25849 
25850 /*
25851  * Field : BNA Interrupt - bnaintr
25852  *
25853  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
25854  * generates this interrupt when the descriptor accessed is not ready for the Core
25855  * to process. BNA will not be generated for Isochronous channels. for non
25856  * Scatter/Gather DMA mode, this bit is reserved.
25857  *
25858  * Field Enumeration Values:
25859  *
25860  * Enum | Value | Description
25861  * :------------------------------------|:------|:-----------------
25862  * ALT_USB_HOST_HCINT5_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
25863  * ALT_USB_HOST_HCINT5_BNAINTR_E_ACT | 0x1 | BNA Interrupt
25864  *
25865  * Field Access Macros:
25866  *
25867  */
25868 /*
25869  * Enumerated value for register field ALT_USB_HOST_HCINT5_BNAINTR
25870  *
25871  * No BNA Interrupt
25872  */
25873 #define ALT_USB_HOST_HCINT5_BNAINTR_E_INACT 0x0
25874 /*
25875  * Enumerated value for register field ALT_USB_HOST_HCINT5_BNAINTR
25876  *
25877  * BNA Interrupt
25878  */
25879 #define ALT_USB_HOST_HCINT5_BNAINTR_E_ACT 0x1
25880 
25881 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_BNAINTR register field. */
25882 #define ALT_USB_HOST_HCINT5_BNAINTR_LSB 11
25883 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_BNAINTR register field. */
25884 #define ALT_USB_HOST_HCINT5_BNAINTR_MSB 11
25885 /* The width in bits of the ALT_USB_HOST_HCINT5_BNAINTR register field. */
25886 #define ALT_USB_HOST_HCINT5_BNAINTR_WIDTH 1
25887 /* The mask used to set the ALT_USB_HOST_HCINT5_BNAINTR register field value. */
25888 #define ALT_USB_HOST_HCINT5_BNAINTR_SET_MSK 0x00000800
25889 /* The mask used to clear the ALT_USB_HOST_HCINT5_BNAINTR register field value. */
25890 #define ALT_USB_HOST_HCINT5_BNAINTR_CLR_MSK 0xfffff7ff
25891 /* The reset value of the ALT_USB_HOST_HCINT5_BNAINTR register field. */
25892 #define ALT_USB_HOST_HCINT5_BNAINTR_RESET 0x0
25893 /* Extracts the ALT_USB_HOST_HCINT5_BNAINTR field value from a register. */
25894 #define ALT_USB_HOST_HCINT5_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
25895 /* Produces a ALT_USB_HOST_HCINT5_BNAINTR register field value suitable for setting the register. */
25896 #define ALT_USB_HOST_HCINT5_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
25897 
25898 /*
25899  * Field : Excessive Transaction Error - xcs_xact_err
25900  *
25901  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
25902  * this bit when 3 consecutive transaction errors occurred on the USB bus.
25903  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
25904  * Scatter/Gather DMA mode, this bit is reserved.
25905  *
25906  * Field Enumeration Values:
25907  *
25908  * Enum | Value | Description
25909  * :-------------------------------------------|:------|:-------------------------------
25910  * ALT_USB_HOST_HCINT5_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
25911  * ALT_USB_HOST_HCINT5_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
25912  *
25913  * Field Access Macros:
25914  *
25915  */
25916 /*
25917  * Enumerated value for register field ALT_USB_HOST_HCINT5_XCS_XACT_ERR
25918  *
25919  * No Excessive Transaction Error
25920  */
25921 #define ALT_USB_HOST_HCINT5_XCS_XACT_ERR_E_INACT 0x0
25922 /*
25923  * Enumerated value for register field ALT_USB_HOST_HCINT5_XCS_XACT_ERR
25924  *
25925  * Excessive Transaction Error
25926  */
25927 #define ALT_USB_HOST_HCINT5_XCS_XACT_ERR_E_ACVTIVE 0x1
25928 
25929 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_XCS_XACT_ERR register field. */
25930 #define ALT_USB_HOST_HCINT5_XCS_XACT_ERR_LSB 12
25931 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_XCS_XACT_ERR register field. */
25932 #define ALT_USB_HOST_HCINT5_XCS_XACT_ERR_MSB 12
25933 /* The width in bits of the ALT_USB_HOST_HCINT5_XCS_XACT_ERR register field. */
25934 #define ALT_USB_HOST_HCINT5_XCS_XACT_ERR_WIDTH 1
25935 /* The mask used to set the ALT_USB_HOST_HCINT5_XCS_XACT_ERR register field value. */
25936 #define ALT_USB_HOST_HCINT5_XCS_XACT_ERR_SET_MSK 0x00001000
25937 /* The mask used to clear the ALT_USB_HOST_HCINT5_XCS_XACT_ERR register field value. */
25938 #define ALT_USB_HOST_HCINT5_XCS_XACT_ERR_CLR_MSK 0xffffefff
25939 /* The reset value of the ALT_USB_HOST_HCINT5_XCS_XACT_ERR register field. */
25940 #define ALT_USB_HOST_HCINT5_XCS_XACT_ERR_RESET 0x0
25941 /* Extracts the ALT_USB_HOST_HCINT5_XCS_XACT_ERR field value from a register. */
25942 #define ALT_USB_HOST_HCINT5_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
25943 /* Produces a ALT_USB_HOST_HCINT5_XCS_XACT_ERR register field value suitable for setting the register. */
25944 #define ALT_USB_HOST_HCINT5_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
25945 
25946 /*
25947  * Field : Descriptor rollover interrupt - desc_lst_rollintr
25948  *
25949  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
25950  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
25951  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
25952  * mode, this bit is reserved.
25953  *
25954  * Field Enumeration Values:
25955  *
25956  * Enum | Value | Description
25957  * :----------------------------------------------|:------|:---------------------------------
25958  * ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
25959  * ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
25960  *
25961  * Field Access Macros:
25962  *
25963  */
25964 /*
25965  * Enumerated value for register field ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR
25966  *
25967  * No Descriptor rollover interrupt
25968  */
25969 #define ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR_E_INACT 0x0
25970 /*
25971  * Enumerated value for register field ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR
25972  *
25973  * Descriptor rollover interrupt
25974  */
25975 #define ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR_E_ACT 0x1
25976 
25977 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR register field. */
25978 #define ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR_LSB 13
25979 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR register field. */
25980 #define ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR_MSB 13
25981 /* The width in bits of the ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR register field. */
25982 #define ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR_WIDTH 1
25983 /* The mask used to set the ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR register field value. */
25984 #define ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR_SET_MSK 0x00002000
25985 /* The mask used to clear the ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR register field value. */
25986 #define ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
25987 /* The reset value of the ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR register field. */
25988 #define ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR_RESET 0x0
25989 /* Extracts the ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR field value from a register. */
25990 #define ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
25991 /* Produces a ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR register field value suitable for setting the register. */
25992 #define ALT_USB_HOST_HCINT5_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
25993 
25994 #ifndef __ASSEMBLY__
25995 /*
25996  * WARNING: The C register and register group struct declarations are provided for
25997  * convenience and illustrative purposes. They should, however, be used with
25998  * caution as the C language standard provides no guarantees about the alignment or
25999  * atomicity of device memory accesses. The recommended practice for writing
26000  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
26001  * alt_write_word() functions.
26002  *
26003  * The struct declaration for register ALT_USB_HOST_HCINT5.
26004  */
26005 struct ALT_USB_HOST_HCINT5_s
26006 {
26007  const uint32_t xfercompl : 1; /* Transfer Completed */
26008  const uint32_t chhltd : 1; /* Channel Halted */
26009  const uint32_t ahberr : 1; /* AHB Error */
26010  const uint32_t stall : 1; /* STALL Response Received Interrupt */
26011  const uint32_t nak : 1; /* NAK Response Received Interrupt */
26012  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
26013  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
26014  const uint32_t xacterr : 1; /* Transaction Error */
26015  const uint32_t bblerr : 1; /* Babble Error */
26016  const uint32_t frmovrun : 1; /* Frame Overrun */
26017  const uint32_t datatglerr : 1; /* Data Toggle Error */
26018  const uint32_t bnaintr : 1; /* BNA Interrupt */
26019  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
26020  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
26021  uint32_t : 18; /* *UNDEFINED* */
26022 };
26023 
26024 /* The typedef declaration for register ALT_USB_HOST_HCINT5. */
26025 typedef volatile struct ALT_USB_HOST_HCINT5_s ALT_USB_HOST_HCINT5_t;
26026 #endif /* __ASSEMBLY__ */
26027 
26028 /* The byte offset of the ALT_USB_HOST_HCINT5 register from the beginning of the component. */
26029 #define ALT_USB_HOST_HCINT5_OFST 0x1a8
26030 /* The address of the ALT_USB_HOST_HCINT5 register. */
26031 #define ALT_USB_HOST_HCINT5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT5_OFST))
26032 
26033 /*
26034  * Register : Host Channel 5 Interrupt Mask Register - hcintmsk5
26035  *
26036  * This register reflects the mask for each channel status described in the
26037  * previous section.
26038  *
26039  * Register Layout
26040  *
26041  * Bits | Access | Reset | Description
26042  * :--------|:-------|:------|:----------------------------------
26043  * [0] | RW | 0x0 | Transfer Completed Mask
26044  * [1] | RW | 0x0 | Channel Halted Mask
26045  * [2] | RW | 0x0 | AHB Error Mask
26046  * [10:3] | ??? | 0x0 | *UNDEFINED*
26047  * [11] | RW | 0x0 | BNA Interrupt mask
26048  * [12] | ??? | 0x0 | *UNDEFINED*
26049  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
26050  * [31:14] | ??? | 0x0 | *UNDEFINED*
26051  *
26052  */
26053 /*
26054  * Field : Transfer Completed Mask - xfercomplmsk
26055  *
26056  * Transfer complete.
26057  *
26058  * Field Enumeration Values:
26059  *
26060  * Enum | Value | Description
26061  * :--------------------------------------------|:------|:------------
26062  * ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK_E_MSK | 0x0 | Mask
26063  * ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
26064  *
26065  * Field Access Macros:
26066  *
26067  */
26068 /*
26069  * Enumerated value for register field ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK
26070  *
26071  * Mask
26072  */
26073 #define ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK_E_MSK 0x0
26074 /*
26075  * Enumerated value for register field ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK
26076  *
26077  * No mask
26078  */
26079 #define ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK_E_NOMSK 0x1
26080 
26081 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK register field. */
26082 #define ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK_LSB 0
26083 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK register field. */
26084 #define ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK_MSB 0
26085 /* The width in bits of the ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK register field. */
26086 #define ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK_WIDTH 1
26087 /* The mask used to set the ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK register field value. */
26088 #define ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK_SET_MSK 0x00000001
26089 /* The mask used to clear the ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK register field value. */
26090 #define ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK_CLR_MSK 0xfffffffe
26091 /* The reset value of the ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK register field. */
26092 #define ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK_RESET 0x0
26093 /* Extracts the ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK field value from a register. */
26094 #define ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
26095 /* Produces a ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK register field value suitable for setting the register. */
26096 #define ALT_USB_HOST_HCINTMSK5_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
26097 
26098 /*
26099  * Field : Channel Halted Mask - chhltdmsk
26100  *
26101  * Channel Halted.
26102  *
26103  * Field Enumeration Values:
26104  *
26105  * Enum | Value | Description
26106  * :-----------------------------------------|:------|:------------
26107  * ALT_USB_HOST_HCINTMSK5_CHHLTDMSK_E_MSK | 0x0 | Mask
26108  * ALT_USB_HOST_HCINTMSK5_CHHLTDMSK_E_NOMSK | 0x1 | No mask
26109  *
26110  * Field Access Macros:
26111  *
26112  */
26113 /*
26114  * Enumerated value for register field ALT_USB_HOST_HCINTMSK5_CHHLTDMSK
26115  *
26116  * Mask
26117  */
26118 #define ALT_USB_HOST_HCINTMSK5_CHHLTDMSK_E_MSK 0x0
26119 /*
26120  * Enumerated value for register field ALT_USB_HOST_HCINTMSK5_CHHLTDMSK
26121  *
26122  * No mask
26123  */
26124 #define ALT_USB_HOST_HCINTMSK5_CHHLTDMSK_E_NOMSK 0x1
26125 
26126 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK5_CHHLTDMSK register field. */
26127 #define ALT_USB_HOST_HCINTMSK5_CHHLTDMSK_LSB 1
26128 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK5_CHHLTDMSK register field. */
26129 #define ALT_USB_HOST_HCINTMSK5_CHHLTDMSK_MSB 1
26130 /* The width in bits of the ALT_USB_HOST_HCINTMSK5_CHHLTDMSK register field. */
26131 #define ALT_USB_HOST_HCINTMSK5_CHHLTDMSK_WIDTH 1
26132 /* The mask used to set the ALT_USB_HOST_HCINTMSK5_CHHLTDMSK register field value. */
26133 #define ALT_USB_HOST_HCINTMSK5_CHHLTDMSK_SET_MSK 0x00000002
26134 /* The mask used to clear the ALT_USB_HOST_HCINTMSK5_CHHLTDMSK register field value. */
26135 #define ALT_USB_HOST_HCINTMSK5_CHHLTDMSK_CLR_MSK 0xfffffffd
26136 /* The reset value of the ALT_USB_HOST_HCINTMSK5_CHHLTDMSK register field. */
26137 #define ALT_USB_HOST_HCINTMSK5_CHHLTDMSK_RESET 0x0
26138 /* Extracts the ALT_USB_HOST_HCINTMSK5_CHHLTDMSK field value from a register. */
26139 #define ALT_USB_HOST_HCINTMSK5_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
26140 /* Produces a ALT_USB_HOST_HCINTMSK5_CHHLTDMSK register field value suitable for setting the register. */
26141 #define ALT_USB_HOST_HCINTMSK5_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
26142 
26143 /*
26144  * Field : AHB Error Mask - ahberrmsk
26145  *
26146  * In scatter/gather DMA mode for host, interrupts will not be generated due to
26147  * the corresponding bits set in HCINTn.
26148  *
26149  * Field Enumeration Values:
26150  *
26151  * Enum | Value | Description
26152  * :-----------------------------------------|:------|:------------
26153  * ALT_USB_HOST_HCINTMSK5_AHBERRMSK_E_MSK | 0x0 | Mask
26154  * ALT_USB_HOST_HCINTMSK5_AHBERRMSK_E_NOMSK | 0x1 | No mask
26155  *
26156  * Field Access Macros:
26157  *
26158  */
26159 /*
26160  * Enumerated value for register field ALT_USB_HOST_HCINTMSK5_AHBERRMSK
26161  *
26162  * Mask
26163  */
26164 #define ALT_USB_HOST_HCINTMSK5_AHBERRMSK_E_MSK 0x0
26165 /*
26166  * Enumerated value for register field ALT_USB_HOST_HCINTMSK5_AHBERRMSK
26167  *
26168  * No mask
26169  */
26170 #define ALT_USB_HOST_HCINTMSK5_AHBERRMSK_E_NOMSK 0x1
26171 
26172 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK5_AHBERRMSK register field. */
26173 #define ALT_USB_HOST_HCINTMSK5_AHBERRMSK_LSB 2
26174 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK5_AHBERRMSK register field. */
26175 #define ALT_USB_HOST_HCINTMSK5_AHBERRMSK_MSB 2
26176 /* The width in bits of the ALT_USB_HOST_HCINTMSK5_AHBERRMSK register field. */
26177 #define ALT_USB_HOST_HCINTMSK5_AHBERRMSK_WIDTH 1
26178 /* The mask used to set the ALT_USB_HOST_HCINTMSK5_AHBERRMSK register field value. */
26179 #define ALT_USB_HOST_HCINTMSK5_AHBERRMSK_SET_MSK 0x00000004
26180 /* The mask used to clear the ALT_USB_HOST_HCINTMSK5_AHBERRMSK register field value. */
26181 #define ALT_USB_HOST_HCINTMSK5_AHBERRMSK_CLR_MSK 0xfffffffb
26182 /* The reset value of the ALT_USB_HOST_HCINTMSK5_AHBERRMSK register field. */
26183 #define ALT_USB_HOST_HCINTMSK5_AHBERRMSK_RESET 0x0
26184 /* Extracts the ALT_USB_HOST_HCINTMSK5_AHBERRMSK field value from a register. */
26185 #define ALT_USB_HOST_HCINTMSK5_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
26186 /* Produces a ALT_USB_HOST_HCINTMSK5_AHBERRMSK register field value suitable for setting the register. */
26187 #define ALT_USB_HOST_HCINTMSK5_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
26188 
26189 /*
26190  * Field : BNA Interrupt mask - bnaintrmsk
26191  *
26192  * This bit is valid only when Scatter/Gather DMA mode is enabled.
26193  *
26194  * Field Enumeration Values:
26195  *
26196  * Enum | Value | Description
26197  * :------------------------------------------|:------|:------------
26198  * ALT_USB_HOST_HCINTMSK5_BNAINTRMSK_E_MSK | 0x0 | Mask
26199  * ALT_USB_HOST_HCINTMSK5_BNAINTRMSK_E_NOMSK | 0x1 | No mask
26200  *
26201  * Field Access Macros:
26202  *
26203  */
26204 /*
26205  * Enumerated value for register field ALT_USB_HOST_HCINTMSK5_BNAINTRMSK
26206  *
26207  * Mask
26208  */
26209 #define ALT_USB_HOST_HCINTMSK5_BNAINTRMSK_E_MSK 0x0
26210 /*
26211  * Enumerated value for register field ALT_USB_HOST_HCINTMSK5_BNAINTRMSK
26212  *
26213  * No mask
26214  */
26215 #define ALT_USB_HOST_HCINTMSK5_BNAINTRMSK_E_NOMSK 0x1
26216 
26217 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK5_BNAINTRMSK register field. */
26218 #define ALT_USB_HOST_HCINTMSK5_BNAINTRMSK_LSB 11
26219 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK5_BNAINTRMSK register field. */
26220 #define ALT_USB_HOST_HCINTMSK5_BNAINTRMSK_MSB 11
26221 /* The width in bits of the ALT_USB_HOST_HCINTMSK5_BNAINTRMSK register field. */
26222 #define ALT_USB_HOST_HCINTMSK5_BNAINTRMSK_WIDTH 1
26223 /* The mask used to set the ALT_USB_HOST_HCINTMSK5_BNAINTRMSK register field value. */
26224 #define ALT_USB_HOST_HCINTMSK5_BNAINTRMSK_SET_MSK 0x00000800
26225 /* The mask used to clear the ALT_USB_HOST_HCINTMSK5_BNAINTRMSK register field value. */
26226 #define ALT_USB_HOST_HCINTMSK5_BNAINTRMSK_CLR_MSK 0xfffff7ff
26227 /* The reset value of the ALT_USB_HOST_HCINTMSK5_BNAINTRMSK register field. */
26228 #define ALT_USB_HOST_HCINTMSK5_BNAINTRMSK_RESET 0x0
26229 /* Extracts the ALT_USB_HOST_HCINTMSK5_BNAINTRMSK field value from a register. */
26230 #define ALT_USB_HOST_HCINTMSK5_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
26231 /* Produces a ALT_USB_HOST_HCINTMSK5_BNAINTRMSK register field value suitable for setting the register. */
26232 #define ALT_USB_HOST_HCINTMSK5_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
26233 
26234 /*
26235  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
26236  *
26237  * This bit is valid only when Scatter/Gather DMA mode is enabled.
26238  *
26239  * Field Enumeration Values:
26240  *
26241  * Enum | Value | Description
26242  * :---------------------------------------------------|:------|:------------
26243  * ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
26244  * ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
26245  *
26246  * Field Access Macros:
26247  *
26248  */
26249 /*
26250  * Enumerated value for register field ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK
26251  *
26252  * Mask
26253  */
26254 #define ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK_E_MSK 0x0
26255 /*
26256  * Enumerated value for register field ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK
26257  *
26258  * No mask
26259  */
26260 #define ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
26261 
26262 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK register field. */
26263 #define ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK_LSB 13
26264 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK register field. */
26265 #define ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK_MSB 13
26266 /* The width in bits of the ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK register field. */
26267 #define ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK_WIDTH 1
26268 /* The mask used to set the ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK register field value. */
26269 #define ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
26270 /* The mask used to clear the ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK register field value. */
26271 #define ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
26272 /* The reset value of the ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK register field. */
26273 #define ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK_RESET 0x0
26274 /* Extracts the ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK field value from a register. */
26275 #define ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
26276 /* Produces a ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
26277 #define ALT_USB_HOST_HCINTMSK5_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
26278 
26279 #ifndef __ASSEMBLY__
26280 /*
26281  * WARNING: The C register and register group struct declarations are provided for
26282  * convenience and illustrative purposes. They should, however, be used with
26283  * caution as the C language standard provides no guarantees about the alignment or
26284  * atomicity of device memory accesses. The recommended practice for writing
26285  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
26286  * alt_write_word() functions.
26287  *
26288  * The struct declaration for register ALT_USB_HOST_HCINTMSK5.
26289  */
26290 struct ALT_USB_HOST_HCINTMSK5_s
26291 {
26292  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
26293  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
26294  uint32_t ahberrmsk : 1; /* AHB Error Mask */
26295  uint32_t : 8; /* *UNDEFINED* */
26296  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
26297  uint32_t : 1; /* *UNDEFINED* */
26298  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
26299  uint32_t : 18; /* *UNDEFINED* */
26300 };
26301 
26302 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK5. */
26303 typedef volatile struct ALT_USB_HOST_HCINTMSK5_s ALT_USB_HOST_HCINTMSK5_t;
26304 #endif /* __ASSEMBLY__ */
26305 
26306 /* The byte offset of the ALT_USB_HOST_HCINTMSK5 register from the beginning of the component. */
26307 #define ALT_USB_HOST_HCINTMSK5_OFST 0x1ac
26308 /* The address of the ALT_USB_HOST_HCINTMSK5 register. */
26309 #define ALT_USB_HOST_HCINTMSK5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK5_OFST))
26310 
26311 /*
26312  * Register : Host Channel 5 Transfer Size Register - hctsiz5
26313  *
26314  * Buffer DMA Mode
26315  *
26316  * Register Layout
26317  *
26318  * Bits | Access | Reset | Description
26319  * :--------|:-------|:------|:--------------
26320  * [18:0] | RW | 0x0 | Transfer Size
26321  * [28:19] | RW | 0x0 | Packet Count
26322  * [30:29] | RW | 0x0 | PID
26323  * [31] | RW | 0x0 | Do Ping
26324  *
26325  */
26326 /*
26327  * Field : Transfer Size - xfersize
26328  *
26329  * for an OUT, this field is the number of data bytes the host sends during the
26330  * transfer. for an IN, this field is the buffer size that the application has
26331  * Reserved for the transfer. The application is expected to program this field as
26332  * an integer multiple of the maximum packet size for IN transactions (periodic and
26333  * non-periodic).The width of this counter is specified as 19 bits.
26334  *
26335  * Field Access Macros:
26336  *
26337  */
26338 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ5_XFERSIZE register field. */
26339 #define ALT_USB_HOST_HCTSIZ5_XFERSIZE_LSB 0
26340 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ5_XFERSIZE register field. */
26341 #define ALT_USB_HOST_HCTSIZ5_XFERSIZE_MSB 18
26342 /* The width in bits of the ALT_USB_HOST_HCTSIZ5_XFERSIZE register field. */
26343 #define ALT_USB_HOST_HCTSIZ5_XFERSIZE_WIDTH 19
26344 /* The mask used to set the ALT_USB_HOST_HCTSIZ5_XFERSIZE register field value. */
26345 #define ALT_USB_HOST_HCTSIZ5_XFERSIZE_SET_MSK 0x0007ffff
26346 /* The mask used to clear the ALT_USB_HOST_HCTSIZ5_XFERSIZE register field value. */
26347 #define ALT_USB_HOST_HCTSIZ5_XFERSIZE_CLR_MSK 0xfff80000
26348 /* The reset value of the ALT_USB_HOST_HCTSIZ5_XFERSIZE register field. */
26349 #define ALT_USB_HOST_HCTSIZ5_XFERSIZE_RESET 0x0
26350 /* Extracts the ALT_USB_HOST_HCTSIZ5_XFERSIZE field value from a register. */
26351 #define ALT_USB_HOST_HCTSIZ5_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
26352 /* Produces a ALT_USB_HOST_HCTSIZ5_XFERSIZE register field value suitable for setting the register. */
26353 #define ALT_USB_HOST_HCTSIZ5_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
26354 
26355 /*
26356  * Field : Packet Count - pktcnt
26357  *
26358  * This field is programmed by the application with the expected number of packets
26359  * to be transmitted (OUT) or received (IN). The host decrements this count on
26360  * every successful transmission or reception of an OUT/IN packet. Once this count
26361  * reaches zero, the application is interrupted to indicate normal completion. The
26362  * width of this counter is specified as 10 bits.
26363  *
26364  * Field Access Macros:
26365  *
26366  */
26367 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ5_PKTCNT register field. */
26368 #define ALT_USB_HOST_HCTSIZ5_PKTCNT_LSB 19
26369 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ5_PKTCNT register field. */
26370 #define ALT_USB_HOST_HCTSIZ5_PKTCNT_MSB 28
26371 /* The width in bits of the ALT_USB_HOST_HCTSIZ5_PKTCNT register field. */
26372 #define ALT_USB_HOST_HCTSIZ5_PKTCNT_WIDTH 10
26373 /* The mask used to set the ALT_USB_HOST_HCTSIZ5_PKTCNT register field value. */
26374 #define ALT_USB_HOST_HCTSIZ5_PKTCNT_SET_MSK 0x1ff80000
26375 /* The mask used to clear the ALT_USB_HOST_HCTSIZ5_PKTCNT register field value. */
26376 #define ALT_USB_HOST_HCTSIZ5_PKTCNT_CLR_MSK 0xe007ffff
26377 /* The reset value of the ALT_USB_HOST_HCTSIZ5_PKTCNT register field. */
26378 #define ALT_USB_HOST_HCTSIZ5_PKTCNT_RESET 0x0
26379 /* Extracts the ALT_USB_HOST_HCTSIZ5_PKTCNT field value from a register. */
26380 #define ALT_USB_HOST_HCTSIZ5_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
26381 /* Produces a ALT_USB_HOST_HCTSIZ5_PKTCNT register field value suitable for setting the register. */
26382 #define ALT_USB_HOST_HCTSIZ5_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
26383 
26384 /*
26385  * Field : PID - pid
26386  *
26387  * The application programs this field with the type of PID to use forthe initial
26388  * transaction. The host maintains this field for the rest of the transfer.
26389  *
26390  * Field Enumeration Values:
26391  *
26392  * Enum | Value | Description
26393  * :---------------------------------|:------|:------------------------------------
26394  * ALT_USB_HOST_HCTSIZ5_PID_E_DATA0 | 0x0 | DATA0
26395  * ALT_USB_HOST_HCTSIZ5_PID_E_DATA2 | 0x1 | DATA2
26396  * ALT_USB_HOST_HCTSIZ5_PID_E_DATA1 | 0x2 | DATA1
26397  * ALT_USB_HOST_HCTSIZ5_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
26398  *
26399  * Field Access Macros:
26400  *
26401  */
26402 /*
26403  * Enumerated value for register field ALT_USB_HOST_HCTSIZ5_PID
26404  *
26405  * DATA0
26406  */
26407 #define ALT_USB_HOST_HCTSIZ5_PID_E_DATA0 0x0
26408 /*
26409  * Enumerated value for register field ALT_USB_HOST_HCTSIZ5_PID
26410  *
26411  * DATA2
26412  */
26413 #define ALT_USB_HOST_HCTSIZ5_PID_E_DATA2 0x1
26414 /*
26415  * Enumerated value for register field ALT_USB_HOST_HCTSIZ5_PID
26416  *
26417  * DATA1
26418  */
26419 #define ALT_USB_HOST_HCTSIZ5_PID_E_DATA1 0x2
26420 /*
26421  * Enumerated value for register field ALT_USB_HOST_HCTSIZ5_PID
26422  *
26423  * MDATA (non-control)/SETUP (control)
26424  */
26425 #define ALT_USB_HOST_HCTSIZ5_PID_E_MDATA 0x3
26426 
26427 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ5_PID register field. */
26428 #define ALT_USB_HOST_HCTSIZ5_PID_LSB 29
26429 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ5_PID register field. */
26430 #define ALT_USB_HOST_HCTSIZ5_PID_MSB 30
26431 /* The width in bits of the ALT_USB_HOST_HCTSIZ5_PID register field. */
26432 #define ALT_USB_HOST_HCTSIZ5_PID_WIDTH 2
26433 /* The mask used to set the ALT_USB_HOST_HCTSIZ5_PID register field value. */
26434 #define ALT_USB_HOST_HCTSIZ5_PID_SET_MSK 0x60000000
26435 /* The mask used to clear the ALT_USB_HOST_HCTSIZ5_PID register field value. */
26436 #define ALT_USB_HOST_HCTSIZ5_PID_CLR_MSK 0x9fffffff
26437 /* The reset value of the ALT_USB_HOST_HCTSIZ5_PID register field. */
26438 #define ALT_USB_HOST_HCTSIZ5_PID_RESET 0x0
26439 /* Extracts the ALT_USB_HOST_HCTSIZ5_PID field value from a register. */
26440 #define ALT_USB_HOST_HCTSIZ5_PID_GET(value) (((value) & 0x60000000) >> 29)
26441 /* Produces a ALT_USB_HOST_HCTSIZ5_PID register field value suitable for setting the register. */
26442 #define ALT_USB_HOST_HCTSIZ5_PID_SET(value) (((value) << 29) & 0x60000000)
26443 
26444 /*
26445  * Field : Do Ping - dopng
26446  *
26447  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
26448  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
26449  * for IN transfers it disables the channel.
26450  *
26451  * Field Enumeration Values:
26452  *
26453  * Enum | Value | Description
26454  * :------------------------------------|:------|:-----------------
26455  * ALT_USB_HOST_HCTSIZ5_DOPNG_E_NOPING | 0x0 | No ping protocol
26456  * ALT_USB_HOST_HCTSIZ5_DOPNG_E_PING | 0x1 | Ping protocol
26457  *
26458  * Field Access Macros:
26459  *
26460  */
26461 /*
26462  * Enumerated value for register field ALT_USB_HOST_HCTSIZ5_DOPNG
26463  *
26464  * No ping protocol
26465  */
26466 #define ALT_USB_HOST_HCTSIZ5_DOPNG_E_NOPING 0x0
26467 /*
26468  * Enumerated value for register field ALT_USB_HOST_HCTSIZ5_DOPNG
26469  *
26470  * Ping protocol
26471  */
26472 #define ALT_USB_HOST_HCTSIZ5_DOPNG_E_PING 0x1
26473 
26474 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ5_DOPNG register field. */
26475 #define ALT_USB_HOST_HCTSIZ5_DOPNG_LSB 31
26476 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ5_DOPNG register field. */
26477 #define ALT_USB_HOST_HCTSIZ5_DOPNG_MSB 31
26478 /* The width in bits of the ALT_USB_HOST_HCTSIZ5_DOPNG register field. */
26479 #define ALT_USB_HOST_HCTSIZ5_DOPNG_WIDTH 1
26480 /* The mask used to set the ALT_USB_HOST_HCTSIZ5_DOPNG register field value. */
26481 #define ALT_USB_HOST_HCTSIZ5_DOPNG_SET_MSK 0x80000000
26482 /* The mask used to clear the ALT_USB_HOST_HCTSIZ5_DOPNG register field value. */
26483 #define ALT_USB_HOST_HCTSIZ5_DOPNG_CLR_MSK 0x7fffffff
26484 /* The reset value of the ALT_USB_HOST_HCTSIZ5_DOPNG register field. */
26485 #define ALT_USB_HOST_HCTSIZ5_DOPNG_RESET 0x0
26486 /* Extracts the ALT_USB_HOST_HCTSIZ5_DOPNG field value from a register. */
26487 #define ALT_USB_HOST_HCTSIZ5_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
26488 /* Produces a ALT_USB_HOST_HCTSIZ5_DOPNG register field value suitable for setting the register. */
26489 #define ALT_USB_HOST_HCTSIZ5_DOPNG_SET(value) (((value) << 31) & 0x80000000)
26490 
26491 #ifndef __ASSEMBLY__
26492 /*
26493  * WARNING: The C register and register group struct declarations are provided for
26494  * convenience and illustrative purposes. They should, however, be used with
26495  * caution as the C language standard provides no guarantees about the alignment or
26496  * atomicity of device memory accesses. The recommended practice for writing
26497  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
26498  * alt_write_word() functions.
26499  *
26500  * The struct declaration for register ALT_USB_HOST_HCTSIZ5.
26501  */
26502 struct ALT_USB_HOST_HCTSIZ5_s
26503 {
26504  uint32_t xfersize : 19; /* Transfer Size */
26505  uint32_t pktcnt : 10; /* Packet Count */
26506  uint32_t pid : 2; /* PID */
26507  uint32_t dopng : 1; /* Do Ping */
26508 };
26509 
26510 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ5. */
26511 typedef volatile struct ALT_USB_HOST_HCTSIZ5_s ALT_USB_HOST_HCTSIZ5_t;
26512 #endif /* __ASSEMBLY__ */
26513 
26514 /* The byte offset of the ALT_USB_HOST_HCTSIZ5 register from the beginning of the component. */
26515 #define ALT_USB_HOST_HCTSIZ5_OFST 0x1b0
26516 /* The address of the ALT_USB_HOST_HCTSIZ5 register. */
26517 #define ALT_USB_HOST_HCTSIZ5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ5_OFST))
26518 
26519 /*
26520  * Register : Host Channel 5 DMA Address Register - hcdma5
26521  *
26522  * This register is used by the OTG host in the internal DMA mode to maintain the
26523  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
26524  * DWORD-aligned.
26525  *
26526  * Register Layout
26527  *
26528  * Bits | Access | Reset | Description
26529  * :-------|:-------|:------|:------------
26530  * [31:0] | RW | 0x0 | DMA Address
26531  *
26532  */
26533 /*
26534  * Field : DMA Address - hcdma5
26535  *
26536  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
26537  * first descriptor in the list should be located in this address. The first
26538  * descriptor may be or may not be ready. The core starts processing the list from
26539  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
26540  * in which the isochronous descriptors are present where N is based on nTD as per
26541  * Table below
26542  *
26543  * [31:N] Base Address [N-1:3] Offset [2:0] 000
26544  *
26545  * HS ISOC FS ISOC
26546  *
26547  * nTD N nTD N
26548  *
26549  * 7 6 1 4
26550  *
26551  * 15 7 3 5
26552  *
26553  * 31 8 7 6
26554  *
26555  * 63 9 15 7
26556  *
26557  * 127 10 31 8
26558  *
26559  * 255 11 63 9
26560  *
26561  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
26562  * This value is in terms of number of descriptors. The values can be from 0 to 63.
26563  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
26564  * descriptor processed in the list. This field is updated both by application and
26565  * the core. for example, if the application enables the channel after programming
26566  * CTD=5, then the core will start processing the 6th descriptor. The address is
26567  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
26568  * CTD for isochronous is based on the current frame/microframe value. Need to be
26569  * set to zero by application.
26570  *
26571  * Field Access Macros:
26572  *
26573  */
26574 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA5_HCDMA5 register field. */
26575 #define ALT_USB_HOST_HCDMA5_HCDMA5_LSB 0
26576 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA5_HCDMA5 register field. */
26577 #define ALT_USB_HOST_HCDMA5_HCDMA5_MSB 31
26578 /* The width in bits of the ALT_USB_HOST_HCDMA5_HCDMA5 register field. */
26579 #define ALT_USB_HOST_HCDMA5_HCDMA5_WIDTH 32
26580 /* The mask used to set the ALT_USB_HOST_HCDMA5_HCDMA5 register field value. */
26581 #define ALT_USB_HOST_HCDMA5_HCDMA5_SET_MSK 0xffffffff
26582 /* The mask used to clear the ALT_USB_HOST_HCDMA5_HCDMA5 register field value. */
26583 #define ALT_USB_HOST_HCDMA5_HCDMA5_CLR_MSK 0x00000000
26584 /* The reset value of the ALT_USB_HOST_HCDMA5_HCDMA5 register field. */
26585 #define ALT_USB_HOST_HCDMA5_HCDMA5_RESET 0x0
26586 /* Extracts the ALT_USB_HOST_HCDMA5_HCDMA5 field value from a register. */
26587 #define ALT_USB_HOST_HCDMA5_HCDMA5_GET(value) (((value) & 0xffffffff) >> 0)
26588 /* Produces a ALT_USB_HOST_HCDMA5_HCDMA5 register field value suitable for setting the register. */
26589 #define ALT_USB_HOST_HCDMA5_HCDMA5_SET(value) (((value) << 0) & 0xffffffff)
26590 
26591 #ifndef __ASSEMBLY__
26592 /*
26593  * WARNING: The C register and register group struct declarations are provided for
26594  * convenience and illustrative purposes. They should, however, be used with
26595  * caution as the C language standard provides no guarantees about the alignment or
26596  * atomicity of device memory accesses. The recommended practice for writing
26597  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
26598  * alt_write_word() functions.
26599  *
26600  * The struct declaration for register ALT_USB_HOST_HCDMA5.
26601  */
26602 struct ALT_USB_HOST_HCDMA5_s
26603 {
26604  uint32_t hcdma5 : 32; /* DMA Address */
26605 };
26606 
26607 /* The typedef declaration for register ALT_USB_HOST_HCDMA5. */
26608 typedef volatile struct ALT_USB_HOST_HCDMA5_s ALT_USB_HOST_HCDMA5_t;
26609 #endif /* __ASSEMBLY__ */
26610 
26611 /* The byte offset of the ALT_USB_HOST_HCDMA5 register from the beginning of the component. */
26612 #define ALT_USB_HOST_HCDMA5_OFST 0x1b4
26613 /* The address of the ALT_USB_HOST_HCDMA5 register. */
26614 #define ALT_USB_HOST_HCDMA5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA5_OFST))
26615 
26616 /*
26617  * Register : Host Channel 5 DMA Buffer Address Register - hcdmab5
26618  *
26619  * These registers are present only in case of Scatter/Gather DMA. These
26620  * registers are implemented in RAM instead of flop-based implementation. Holds
26621  * the current buffer address. This register is updated as and when the
26622  * data transfer for the corresponding end point is in progress. This
26623  * register is present only in Scatter/Gather DMA mode. Otherwise this field
26624  * is reserved.
26625  *
26626  * Register Layout
26627  *
26628  * Bits | Access | Reset | Description
26629  * :-------|:-------|:------|:----------------------------------
26630  * [31:0] | RW | 0x0 | Host Channel 5 DMA Buffer Address
26631  *
26632  */
26633 /*
26634  * Field : Host Channel 5 DMA Buffer Address - hcdmab5
26635  *
26636  * These registers are present only in case of Scatter/Gather DMA. These
26637  * registers are implemented in RAM instead of flop-based implementation. Holds
26638  * the current buffer address. This register is updated as and when the data
26639  * transfer for the corresponding end point is in progress. This register is
26640  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
26641  *
26642  * Field Access Macros:
26643  *
26644  */
26645 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB5_HCDMAB5 register field. */
26646 #define ALT_USB_HOST_HCDMAB5_HCDMAB5_LSB 0
26647 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB5_HCDMAB5 register field. */
26648 #define ALT_USB_HOST_HCDMAB5_HCDMAB5_MSB 31
26649 /* The width in bits of the ALT_USB_HOST_HCDMAB5_HCDMAB5 register field. */
26650 #define ALT_USB_HOST_HCDMAB5_HCDMAB5_WIDTH 32
26651 /* The mask used to set the ALT_USB_HOST_HCDMAB5_HCDMAB5 register field value. */
26652 #define ALT_USB_HOST_HCDMAB5_HCDMAB5_SET_MSK 0xffffffff
26653 /* The mask used to clear the ALT_USB_HOST_HCDMAB5_HCDMAB5 register field value. */
26654 #define ALT_USB_HOST_HCDMAB5_HCDMAB5_CLR_MSK 0x00000000
26655 /* The reset value of the ALT_USB_HOST_HCDMAB5_HCDMAB5 register field. */
26656 #define ALT_USB_HOST_HCDMAB5_HCDMAB5_RESET 0x0
26657 /* Extracts the ALT_USB_HOST_HCDMAB5_HCDMAB5 field value from a register. */
26658 #define ALT_USB_HOST_HCDMAB5_HCDMAB5_GET(value) (((value) & 0xffffffff) >> 0)
26659 /* Produces a ALT_USB_HOST_HCDMAB5_HCDMAB5 register field value suitable for setting the register. */
26660 #define ALT_USB_HOST_HCDMAB5_HCDMAB5_SET(value) (((value) << 0) & 0xffffffff)
26661 
26662 #ifndef __ASSEMBLY__
26663 /*
26664  * WARNING: The C register and register group struct declarations are provided for
26665  * convenience and illustrative purposes. They should, however, be used with
26666  * caution as the C language standard provides no guarantees about the alignment or
26667  * atomicity of device memory accesses. The recommended practice for writing
26668  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
26669  * alt_write_word() functions.
26670  *
26671  * The struct declaration for register ALT_USB_HOST_HCDMAB5.
26672  */
26673 struct ALT_USB_HOST_HCDMAB5_s
26674 {
26675  uint32_t hcdmab5 : 32; /* Host Channel 5 DMA Buffer Address */
26676 };
26677 
26678 /* The typedef declaration for register ALT_USB_HOST_HCDMAB5. */
26679 typedef volatile struct ALT_USB_HOST_HCDMAB5_s ALT_USB_HOST_HCDMAB5_t;
26680 #endif /* __ASSEMBLY__ */
26681 
26682 /* The byte offset of the ALT_USB_HOST_HCDMAB5 register from the beginning of the component. */
26683 #define ALT_USB_HOST_HCDMAB5_OFST 0x1b8
26684 /* The address of the ALT_USB_HOST_HCDMAB5 register. */
26685 #define ALT_USB_HOST_HCDMAB5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB5_OFST))
26686 
26687 /*
26688  * Register : Host Channel 6 Characteristics Register - hcchar6
26689  *
26690  * Host Channel 6 Characteristics Register
26691  *
26692  * Register Layout
26693  *
26694  * Bits | Access | Reset | Description
26695  * :--------|:-------|:------|:--------------------
26696  * [10:0] | RW | 0x0 | Maximum Packet Size
26697  * [14:11] | RW | 0x0 | Endpoint Number
26698  * [15] | RW | 0x0 | Endpoint Direction
26699  * [16] | ??? | 0x0 | *UNDEFINED*
26700  * [17] | RW | 0x0 | Low-Speed Device
26701  * [19:18] | RW | 0x0 | Endpoint Type
26702  * [21:20] | RW | 0x0 | Multi Count
26703  * [28:22] | RW | 0x0 | Device Address
26704  * [29] | ??? | 0x0 | *UNDEFINED*
26705  * [30] | R | 0x0 | Channel Disable
26706  * [31] | R | 0x0 | Channel Enable
26707  *
26708  */
26709 /*
26710  * Field : Maximum Packet Size - mps
26711  *
26712  * Indicates the maximum packet size of the associated endpoint.
26713  *
26714  * Field Access Macros:
26715  *
26716  */
26717 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR6_MPS register field. */
26718 #define ALT_USB_HOST_HCCHAR6_MPS_LSB 0
26719 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR6_MPS register field. */
26720 #define ALT_USB_HOST_HCCHAR6_MPS_MSB 10
26721 /* The width in bits of the ALT_USB_HOST_HCCHAR6_MPS register field. */
26722 #define ALT_USB_HOST_HCCHAR6_MPS_WIDTH 11
26723 /* The mask used to set the ALT_USB_HOST_HCCHAR6_MPS register field value. */
26724 #define ALT_USB_HOST_HCCHAR6_MPS_SET_MSK 0x000007ff
26725 /* The mask used to clear the ALT_USB_HOST_HCCHAR6_MPS register field value. */
26726 #define ALT_USB_HOST_HCCHAR6_MPS_CLR_MSK 0xfffff800
26727 /* The reset value of the ALT_USB_HOST_HCCHAR6_MPS register field. */
26728 #define ALT_USB_HOST_HCCHAR6_MPS_RESET 0x0
26729 /* Extracts the ALT_USB_HOST_HCCHAR6_MPS field value from a register. */
26730 #define ALT_USB_HOST_HCCHAR6_MPS_GET(value) (((value) & 0x000007ff) >> 0)
26731 /* Produces a ALT_USB_HOST_HCCHAR6_MPS register field value suitable for setting the register. */
26732 #define ALT_USB_HOST_HCCHAR6_MPS_SET(value) (((value) << 0) & 0x000007ff)
26733 
26734 /*
26735  * Field : Endpoint Number - epnum
26736  *
26737  * Indicates the endpoint number on the device serving as the data source or sink.
26738  *
26739  * Field Enumeration Values:
26740  *
26741  * Enum | Value | Description
26742  * :-------------------------------------|:------|:--------------
26743  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT0 | 0x0 | End point 0
26744  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT1 | 0x1 | End point 1
26745  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT2 | 0x2 | End point 2
26746  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT3 | 0x3 | End point 3
26747  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT4 | 0x4 | End point 4
26748  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT5 | 0x5 | End point 5
26749  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT6 | 0x6 | End point 6
26750  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT7 | 0x7 | End point 7
26751  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT8 | 0x8 | End point 8
26752  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT9 | 0x9 | End point 9
26753  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT10 | 0xa | End point 10
26754  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT11 | 0xb | End point 11
26755  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT12 | 0xc | End point 12
26756  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT13 | 0xd | End point 13
26757  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT14 | 0xe | End point 14
26758  * ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT15 | 0xf | End point 15
26759  *
26760  * Field Access Macros:
26761  *
26762  */
26763 /*
26764  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26765  *
26766  * End point 0
26767  */
26768 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT0 0x0
26769 /*
26770  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26771  *
26772  * End point 1
26773  */
26774 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT1 0x1
26775 /*
26776  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26777  *
26778  * End point 2
26779  */
26780 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT2 0x2
26781 /*
26782  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26783  *
26784  * End point 3
26785  */
26786 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT3 0x3
26787 /*
26788  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26789  *
26790  * End point 4
26791  */
26792 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT4 0x4
26793 /*
26794  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26795  *
26796  * End point 5
26797  */
26798 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT5 0x5
26799 /*
26800  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26801  *
26802  * End point 6
26803  */
26804 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT6 0x6
26805 /*
26806  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26807  *
26808  * End point 7
26809  */
26810 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT7 0x7
26811 /*
26812  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26813  *
26814  * End point 8
26815  */
26816 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT8 0x8
26817 /*
26818  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26819  *
26820  * End point 9
26821  */
26822 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT9 0x9
26823 /*
26824  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26825  *
26826  * End point 10
26827  */
26828 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT10 0xa
26829 /*
26830  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26831  *
26832  * End point 11
26833  */
26834 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT11 0xb
26835 /*
26836  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26837  *
26838  * End point 12
26839  */
26840 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT12 0xc
26841 /*
26842  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26843  *
26844  * End point 13
26845  */
26846 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT13 0xd
26847 /*
26848  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26849  *
26850  * End point 14
26851  */
26852 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT14 0xe
26853 /*
26854  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPNUM
26855  *
26856  * End point 15
26857  */
26858 #define ALT_USB_HOST_HCCHAR6_EPNUM_E_ENDPT15 0xf
26859 
26860 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR6_EPNUM register field. */
26861 #define ALT_USB_HOST_HCCHAR6_EPNUM_LSB 11
26862 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR6_EPNUM register field. */
26863 #define ALT_USB_HOST_HCCHAR6_EPNUM_MSB 14
26864 /* The width in bits of the ALT_USB_HOST_HCCHAR6_EPNUM register field. */
26865 #define ALT_USB_HOST_HCCHAR6_EPNUM_WIDTH 4
26866 /* The mask used to set the ALT_USB_HOST_HCCHAR6_EPNUM register field value. */
26867 #define ALT_USB_HOST_HCCHAR6_EPNUM_SET_MSK 0x00007800
26868 /* The mask used to clear the ALT_USB_HOST_HCCHAR6_EPNUM register field value. */
26869 #define ALT_USB_HOST_HCCHAR6_EPNUM_CLR_MSK 0xffff87ff
26870 /* The reset value of the ALT_USB_HOST_HCCHAR6_EPNUM register field. */
26871 #define ALT_USB_HOST_HCCHAR6_EPNUM_RESET 0x0
26872 /* Extracts the ALT_USB_HOST_HCCHAR6_EPNUM field value from a register. */
26873 #define ALT_USB_HOST_HCCHAR6_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
26874 /* Produces a ALT_USB_HOST_HCCHAR6_EPNUM register field value suitable for setting the register. */
26875 #define ALT_USB_HOST_HCCHAR6_EPNUM_SET(value) (((value) << 11) & 0x00007800)
26876 
26877 /*
26878  * Field : Endpoint Direction - epdir
26879  *
26880  * Indicates whether the transaction is IN or OUT.
26881  *
26882  * Field Enumeration Values:
26883  *
26884  * Enum | Value | Description
26885  * :---------------------------------|:------|:--------------
26886  * ALT_USB_HOST_HCCHAR6_EPDIR_E_OUT | 0x0 | OUT Direction
26887  * ALT_USB_HOST_HCCHAR6_EPDIR_E_IN | 0x1 | IN Direction
26888  *
26889  * Field Access Macros:
26890  *
26891  */
26892 /*
26893  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPDIR
26894  *
26895  * OUT Direction
26896  */
26897 #define ALT_USB_HOST_HCCHAR6_EPDIR_E_OUT 0x0
26898 /*
26899  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPDIR
26900  *
26901  * IN Direction
26902  */
26903 #define ALT_USB_HOST_HCCHAR6_EPDIR_E_IN 0x1
26904 
26905 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR6_EPDIR register field. */
26906 #define ALT_USB_HOST_HCCHAR6_EPDIR_LSB 15
26907 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR6_EPDIR register field. */
26908 #define ALT_USB_HOST_HCCHAR6_EPDIR_MSB 15
26909 /* The width in bits of the ALT_USB_HOST_HCCHAR6_EPDIR register field. */
26910 #define ALT_USB_HOST_HCCHAR6_EPDIR_WIDTH 1
26911 /* The mask used to set the ALT_USB_HOST_HCCHAR6_EPDIR register field value. */
26912 #define ALT_USB_HOST_HCCHAR6_EPDIR_SET_MSK 0x00008000
26913 /* The mask used to clear the ALT_USB_HOST_HCCHAR6_EPDIR register field value. */
26914 #define ALT_USB_HOST_HCCHAR6_EPDIR_CLR_MSK 0xffff7fff
26915 /* The reset value of the ALT_USB_HOST_HCCHAR6_EPDIR register field. */
26916 #define ALT_USB_HOST_HCCHAR6_EPDIR_RESET 0x0
26917 /* Extracts the ALT_USB_HOST_HCCHAR6_EPDIR field value from a register. */
26918 #define ALT_USB_HOST_HCCHAR6_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
26919 /* Produces a ALT_USB_HOST_HCCHAR6_EPDIR register field value suitable for setting the register. */
26920 #define ALT_USB_HOST_HCCHAR6_EPDIR_SET(value) (((value) << 15) & 0x00008000)
26921 
26922 /*
26923  * Field : Low-Speed Device - lspddev
26924  *
26925  * This field is set by the application to indicate that this channel is
26926  * communicating to a low-speed device. The application must program this bit when
26927  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
26928  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
26929  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
26930  * core ignores this bit even if it is set by the application software
26931  *
26932  * Field Enumeration Values:
26933  *
26934  * Enum | Value | Description
26935  * :------------------------------------|:------|:----------------------------------------
26936  * ALT_USB_HOST_HCCHAR6_LSPDDEV_E_DISD | 0x0 | Not Communicating with low speed device
26937  * ALT_USB_HOST_HCCHAR6_LSPDDEV_E_END | 0x1 | Communicating with low speed device
26938  *
26939  * Field Access Macros:
26940  *
26941  */
26942 /*
26943  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_LSPDDEV
26944  *
26945  * Not Communicating with low speed device
26946  */
26947 #define ALT_USB_HOST_HCCHAR6_LSPDDEV_E_DISD 0x0
26948 /*
26949  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_LSPDDEV
26950  *
26951  * Communicating with low speed device
26952  */
26953 #define ALT_USB_HOST_HCCHAR6_LSPDDEV_E_END 0x1
26954 
26955 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR6_LSPDDEV register field. */
26956 #define ALT_USB_HOST_HCCHAR6_LSPDDEV_LSB 17
26957 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR6_LSPDDEV register field. */
26958 #define ALT_USB_HOST_HCCHAR6_LSPDDEV_MSB 17
26959 /* The width in bits of the ALT_USB_HOST_HCCHAR6_LSPDDEV register field. */
26960 #define ALT_USB_HOST_HCCHAR6_LSPDDEV_WIDTH 1
26961 /* The mask used to set the ALT_USB_HOST_HCCHAR6_LSPDDEV register field value. */
26962 #define ALT_USB_HOST_HCCHAR6_LSPDDEV_SET_MSK 0x00020000
26963 /* The mask used to clear the ALT_USB_HOST_HCCHAR6_LSPDDEV register field value. */
26964 #define ALT_USB_HOST_HCCHAR6_LSPDDEV_CLR_MSK 0xfffdffff
26965 /* The reset value of the ALT_USB_HOST_HCCHAR6_LSPDDEV register field. */
26966 #define ALT_USB_HOST_HCCHAR6_LSPDDEV_RESET 0x0
26967 /* Extracts the ALT_USB_HOST_HCCHAR6_LSPDDEV field value from a register. */
26968 #define ALT_USB_HOST_HCCHAR6_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
26969 /* Produces a ALT_USB_HOST_HCCHAR6_LSPDDEV register field value suitable for setting the register. */
26970 #define ALT_USB_HOST_HCCHAR6_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
26971 
26972 /*
26973  * Field : Endpoint Type - eptype
26974  *
26975  * Indicates the transfer type selected.
26976  *
26977  * Field Enumeration Values:
26978  *
26979  * Enum | Value | Description
26980  * :-------------------------------------|:------|:------------
26981  * ALT_USB_HOST_HCCHAR6_EPTYPE_E_CTL | 0x0 | Control
26982  * ALT_USB_HOST_HCCHAR6_EPTYPE_E_ISOC | 0x1 | Isochronous
26983  * ALT_USB_HOST_HCCHAR6_EPTYPE_E_BULK | 0x2 | Bulk
26984  * ALT_USB_HOST_HCCHAR6_EPTYPE_E_INTERR | 0x3 | Interrupt
26985  *
26986  * Field Access Macros:
26987  *
26988  */
26989 /*
26990  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPTYPE
26991  *
26992  * Control
26993  */
26994 #define ALT_USB_HOST_HCCHAR6_EPTYPE_E_CTL 0x0
26995 /*
26996  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPTYPE
26997  *
26998  * Isochronous
26999  */
27000 #define ALT_USB_HOST_HCCHAR6_EPTYPE_E_ISOC 0x1
27001 /*
27002  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPTYPE
27003  *
27004  * Bulk
27005  */
27006 #define ALT_USB_HOST_HCCHAR6_EPTYPE_E_BULK 0x2
27007 /*
27008  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EPTYPE
27009  *
27010  * Interrupt
27011  */
27012 #define ALT_USB_HOST_HCCHAR6_EPTYPE_E_INTERR 0x3
27013 
27014 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR6_EPTYPE register field. */
27015 #define ALT_USB_HOST_HCCHAR6_EPTYPE_LSB 18
27016 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR6_EPTYPE register field. */
27017 #define ALT_USB_HOST_HCCHAR6_EPTYPE_MSB 19
27018 /* The width in bits of the ALT_USB_HOST_HCCHAR6_EPTYPE register field. */
27019 #define ALT_USB_HOST_HCCHAR6_EPTYPE_WIDTH 2
27020 /* The mask used to set the ALT_USB_HOST_HCCHAR6_EPTYPE register field value. */
27021 #define ALT_USB_HOST_HCCHAR6_EPTYPE_SET_MSK 0x000c0000
27022 /* The mask used to clear the ALT_USB_HOST_HCCHAR6_EPTYPE register field value. */
27023 #define ALT_USB_HOST_HCCHAR6_EPTYPE_CLR_MSK 0xfff3ffff
27024 /* The reset value of the ALT_USB_HOST_HCCHAR6_EPTYPE register field. */
27025 #define ALT_USB_HOST_HCCHAR6_EPTYPE_RESET 0x0
27026 /* Extracts the ALT_USB_HOST_HCCHAR6_EPTYPE field value from a register. */
27027 #define ALT_USB_HOST_HCCHAR6_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
27028 /* Produces a ALT_USB_HOST_HCCHAR6_EPTYPE register field value suitable for setting the register. */
27029 #define ALT_USB_HOST_HCCHAR6_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
27030 
27031 /*
27032  * Field : Multi Count - ec
27033  *
27034  * When the Split Enable bit of the Host Channel-n Split Control register
27035  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
27036  * transactions that must be executed per microframe for this periodic endpoint.
27037  * for non periodic transfers, this field is used only in DMA mode, and specifies
27038  * the number packets to be fetched for this channel before the internal DMA engine
27039  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
27040  * number of immediate retries to be performed for a periodic split transactions on
27041  * transaction errors. This field must be set to at least 1.
27042  *
27043  * Field Enumeration Values:
27044  *
27045  * Enum | Value | Description
27046  * :-------------------------------------|:------|:----------------------------------------------
27047  * ALT_USB_HOST_HCCHAR6_EC_E_RSVD | 0x0 | Reserved This field yields undefined result
27048  * ALT_USB_HOST_HCCHAR6_EC_E_TRANSONE | 0x1 | 1 transaction
27049  * ALT_USB_HOST_HCCHAR6_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
27050  * : | | per microframe
27051  * ALT_USB_HOST_HCCHAR6_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
27052  * : | | per microframe
27053  *
27054  * Field Access Macros:
27055  *
27056  */
27057 /*
27058  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EC
27059  *
27060  * Reserved This field yields undefined result
27061  */
27062 #define ALT_USB_HOST_HCCHAR6_EC_E_RSVD 0x0
27063 /*
27064  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EC
27065  *
27066  * 1 transaction
27067  */
27068 #define ALT_USB_HOST_HCCHAR6_EC_E_TRANSONE 0x1
27069 /*
27070  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EC
27071  *
27072  * 2 transactions to be issued for this endpoint per microframe
27073  */
27074 #define ALT_USB_HOST_HCCHAR6_EC_E_TRANSTWO 0x2
27075 /*
27076  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_EC
27077  *
27078  * 3 transactions to be issued for this endpoint per microframe
27079  */
27080 #define ALT_USB_HOST_HCCHAR6_EC_E_TRANSTHREE 0x3
27081 
27082 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR6_EC register field. */
27083 #define ALT_USB_HOST_HCCHAR6_EC_LSB 20
27084 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR6_EC register field. */
27085 #define ALT_USB_HOST_HCCHAR6_EC_MSB 21
27086 /* The width in bits of the ALT_USB_HOST_HCCHAR6_EC register field. */
27087 #define ALT_USB_HOST_HCCHAR6_EC_WIDTH 2
27088 /* The mask used to set the ALT_USB_HOST_HCCHAR6_EC register field value. */
27089 #define ALT_USB_HOST_HCCHAR6_EC_SET_MSK 0x00300000
27090 /* The mask used to clear the ALT_USB_HOST_HCCHAR6_EC register field value. */
27091 #define ALT_USB_HOST_HCCHAR6_EC_CLR_MSK 0xffcfffff
27092 /* The reset value of the ALT_USB_HOST_HCCHAR6_EC register field. */
27093 #define ALT_USB_HOST_HCCHAR6_EC_RESET 0x0
27094 /* Extracts the ALT_USB_HOST_HCCHAR6_EC field value from a register. */
27095 #define ALT_USB_HOST_HCCHAR6_EC_GET(value) (((value) & 0x00300000) >> 20)
27096 /* Produces a ALT_USB_HOST_HCCHAR6_EC register field value suitable for setting the register. */
27097 #define ALT_USB_HOST_HCCHAR6_EC_SET(value) (((value) << 20) & 0x00300000)
27098 
27099 /*
27100  * Field : Device Address - devaddr
27101  *
27102  * This field selects the specific device serving as the data source or sink.
27103  *
27104  * Field Access Macros:
27105  *
27106  */
27107 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR6_DEVADDR register field. */
27108 #define ALT_USB_HOST_HCCHAR6_DEVADDR_LSB 22
27109 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR6_DEVADDR register field. */
27110 #define ALT_USB_HOST_HCCHAR6_DEVADDR_MSB 28
27111 /* The width in bits of the ALT_USB_HOST_HCCHAR6_DEVADDR register field. */
27112 #define ALT_USB_HOST_HCCHAR6_DEVADDR_WIDTH 7
27113 /* The mask used to set the ALT_USB_HOST_HCCHAR6_DEVADDR register field value. */
27114 #define ALT_USB_HOST_HCCHAR6_DEVADDR_SET_MSK 0x1fc00000
27115 /* The mask used to clear the ALT_USB_HOST_HCCHAR6_DEVADDR register field value. */
27116 #define ALT_USB_HOST_HCCHAR6_DEVADDR_CLR_MSK 0xe03fffff
27117 /* The reset value of the ALT_USB_HOST_HCCHAR6_DEVADDR register field. */
27118 #define ALT_USB_HOST_HCCHAR6_DEVADDR_RESET 0x0
27119 /* Extracts the ALT_USB_HOST_HCCHAR6_DEVADDR field value from a register. */
27120 #define ALT_USB_HOST_HCCHAR6_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
27121 /* Produces a ALT_USB_HOST_HCCHAR6_DEVADDR register field value suitable for setting the register. */
27122 #define ALT_USB_HOST_HCCHAR6_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
27123 
27124 /*
27125  * Field : Channel Disable - chdis
27126  *
27127  * The application sets this bit to stop transmitting/receiving data on a channel,
27128  * even before the transfer for that channel is complete. The application must wait
27129  * for the Channel Disabled interrupt before treating the channel as disabled.
27130  *
27131  * Field Enumeration Values:
27132  *
27133  * Enum | Value | Description
27134  * :-----------------------------------|:------|:----------------------------
27135  * ALT_USB_HOST_HCCHAR6_CHDIS_E_INACT | 0x0 | Transmit/Recieve normal
27136  * ALT_USB_HOST_HCCHAR6_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving
27137  *
27138  * Field Access Macros:
27139  *
27140  */
27141 /*
27142  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_CHDIS
27143  *
27144  * Transmit/Recieve normal
27145  */
27146 #define ALT_USB_HOST_HCCHAR6_CHDIS_E_INACT 0x0
27147 /*
27148  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_CHDIS
27149  *
27150  * Stop transmitting/receiving
27151  */
27152 #define ALT_USB_HOST_HCCHAR6_CHDIS_E_ACT 0x1
27153 
27154 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR6_CHDIS register field. */
27155 #define ALT_USB_HOST_HCCHAR6_CHDIS_LSB 30
27156 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR6_CHDIS register field. */
27157 #define ALT_USB_HOST_HCCHAR6_CHDIS_MSB 30
27158 /* The width in bits of the ALT_USB_HOST_HCCHAR6_CHDIS register field. */
27159 #define ALT_USB_HOST_HCCHAR6_CHDIS_WIDTH 1
27160 /* The mask used to set the ALT_USB_HOST_HCCHAR6_CHDIS register field value. */
27161 #define ALT_USB_HOST_HCCHAR6_CHDIS_SET_MSK 0x40000000
27162 /* The mask used to clear the ALT_USB_HOST_HCCHAR6_CHDIS register field value. */
27163 #define ALT_USB_HOST_HCCHAR6_CHDIS_CLR_MSK 0xbfffffff
27164 /* The reset value of the ALT_USB_HOST_HCCHAR6_CHDIS register field. */
27165 #define ALT_USB_HOST_HCCHAR6_CHDIS_RESET 0x0
27166 /* Extracts the ALT_USB_HOST_HCCHAR6_CHDIS field value from a register. */
27167 #define ALT_USB_HOST_HCCHAR6_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
27168 /* Produces a ALT_USB_HOST_HCCHAR6_CHDIS register field value suitable for setting the register. */
27169 #define ALT_USB_HOST_HCCHAR6_CHDIS_SET(value) (((value) << 30) & 0x40000000)
27170 
27171 /*
27172  * Field : Channel Enable - chena
27173  *
27174  * When Scatter/Gather mode is disabled This field is set by the application and
27175  * cleared by the OTG host.
27176  *
27177  * 0: Channel disabled
27178  *
27179  * 1: Channel enabled
27180  *
27181  * When Scatter/Gather mode is enabled.
27182  *
27183  * Field Enumeration Values:
27184  *
27185  * Enum | Value | Description
27186  * :-----------------------------------|:------|:-------------------------------------------------
27187  * ALT_USB_HOST_HCCHAR6_CHENA_E_INACT | 0x0 | Indicates that the descriptor structure is not
27188  * : | | yet ready
27189  * ALT_USB_HOST_HCCHAR6_CHENA_E_ACT | 0x1 | Indicates that the descriptor structure and
27190  * : | | data buffer with data is setup and this
27191  * : | | channel can access the descriptor
27192  *
27193  * Field Access Macros:
27194  *
27195  */
27196 /*
27197  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_CHENA
27198  *
27199  * Indicates that the descriptor structure is not yet ready
27200  */
27201 #define ALT_USB_HOST_HCCHAR6_CHENA_E_INACT 0x0
27202 /*
27203  * Enumerated value for register field ALT_USB_HOST_HCCHAR6_CHENA
27204  *
27205  * Indicates that the descriptor structure and data buffer with data is
27206  * setup and this channel can access the descriptor
27207  */
27208 #define ALT_USB_HOST_HCCHAR6_CHENA_E_ACT 0x1
27209 
27210 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR6_CHENA register field. */
27211 #define ALT_USB_HOST_HCCHAR6_CHENA_LSB 31
27212 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR6_CHENA register field. */
27213 #define ALT_USB_HOST_HCCHAR6_CHENA_MSB 31
27214 /* The width in bits of the ALT_USB_HOST_HCCHAR6_CHENA register field. */
27215 #define ALT_USB_HOST_HCCHAR6_CHENA_WIDTH 1
27216 /* The mask used to set the ALT_USB_HOST_HCCHAR6_CHENA register field value. */
27217 #define ALT_USB_HOST_HCCHAR6_CHENA_SET_MSK 0x80000000
27218 /* The mask used to clear the ALT_USB_HOST_HCCHAR6_CHENA register field value. */
27219 #define ALT_USB_HOST_HCCHAR6_CHENA_CLR_MSK 0x7fffffff
27220 /* The reset value of the ALT_USB_HOST_HCCHAR6_CHENA register field. */
27221 #define ALT_USB_HOST_HCCHAR6_CHENA_RESET 0x0
27222 /* Extracts the ALT_USB_HOST_HCCHAR6_CHENA field value from a register. */
27223 #define ALT_USB_HOST_HCCHAR6_CHENA_GET(value) (((value) & 0x80000000) >> 31)
27224 /* Produces a ALT_USB_HOST_HCCHAR6_CHENA register field value suitable for setting the register. */
27225 #define ALT_USB_HOST_HCCHAR6_CHENA_SET(value) (((value) << 31) & 0x80000000)
27226 
27227 #ifndef __ASSEMBLY__
27228 /*
27229  * WARNING: The C register and register group struct declarations are provided for
27230  * convenience and illustrative purposes. They should, however, be used with
27231  * caution as the C language standard provides no guarantees about the alignment or
27232  * atomicity of device memory accesses. The recommended practice for writing
27233  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
27234  * alt_write_word() functions.
27235  *
27236  * The struct declaration for register ALT_USB_HOST_HCCHAR6.
27237  */
27238 struct ALT_USB_HOST_HCCHAR6_s
27239 {
27240  uint32_t mps : 11; /* Maximum Packet Size */
27241  uint32_t epnum : 4; /* Endpoint Number */
27242  uint32_t epdir : 1; /* Endpoint Direction */
27243  uint32_t : 1; /* *UNDEFINED* */
27244  uint32_t lspddev : 1; /* Low-Speed Device */
27245  uint32_t eptype : 2; /* Endpoint Type */
27246  uint32_t ec : 2; /* Multi Count */
27247  uint32_t devaddr : 7; /* Device Address */
27248  uint32_t : 1; /* *UNDEFINED* */
27249  const uint32_t chdis : 1; /* Channel Disable */
27250  const uint32_t chena : 1; /* Channel Enable */
27251 };
27252 
27253 /* The typedef declaration for register ALT_USB_HOST_HCCHAR6. */
27254 typedef volatile struct ALT_USB_HOST_HCCHAR6_s ALT_USB_HOST_HCCHAR6_t;
27255 #endif /* __ASSEMBLY__ */
27256 
27257 /* The byte offset of the ALT_USB_HOST_HCCHAR6 register from the beginning of the component. */
27258 #define ALT_USB_HOST_HCCHAR6_OFST 0x1c0
27259 /* The address of the ALT_USB_HOST_HCCHAR6 register. */
27260 #define ALT_USB_HOST_HCCHAR6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR6_OFST))
27261 
27262 /*
27263  * Register : Host Channel 6 Split Control Register - hcsplt6
27264  *
27265  * Channel_number 6
27266  *
27267  * Register Layout
27268  *
27269  * Bits | Access | Reset | Description
27270  * :--------|:-------|:------|:---------------------
27271  * [6:0] | RW | 0x0 | Port Address
27272  * [13:7] | RW | 0x0 | Hub Address
27273  * [15:14] | RW | 0x0 | Transaction Position
27274  * [16] | RW | 0x0 | Do Complete Split
27275  * [30:17] | ??? | 0x0 | *UNDEFINED*
27276  * [31] | RW | 0x0 | Split Enable
27277  *
27278  */
27279 /*
27280  * Field : Port Address - prtaddr
27281  *
27282  * This field is the port number of the recipient transactiontranslator.
27283  *
27284  * Field Access Macros:
27285  *
27286  */
27287 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT6_PRTADDR register field. */
27288 #define ALT_USB_HOST_HCSPLT6_PRTADDR_LSB 0
27289 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT6_PRTADDR register field. */
27290 #define ALT_USB_HOST_HCSPLT6_PRTADDR_MSB 6
27291 /* The width in bits of the ALT_USB_HOST_HCSPLT6_PRTADDR register field. */
27292 #define ALT_USB_HOST_HCSPLT6_PRTADDR_WIDTH 7
27293 /* The mask used to set the ALT_USB_HOST_HCSPLT6_PRTADDR register field value. */
27294 #define ALT_USB_HOST_HCSPLT6_PRTADDR_SET_MSK 0x0000007f
27295 /* The mask used to clear the ALT_USB_HOST_HCSPLT6_PRTADDR register field value. */
27296 #define ALT_USB_HOST_HCSPLT6_PRTADDR_CLR_MSK 0xffffff80
27297 /* The reset value of the ALT_USB_HOST_HCSPLT6_PRTADDR register field. */
27298 #define ALT_USB_HOST_HCSPLT6_PRTADDR_RESET 0x0
27299 /* Extracts the ALT_USB_HOST_HCSPLT6_PRTADDR field value from a register. */
27300 #define ALT_USB_HOST_HCSPLT6_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
27301 /* Produces a ALT_USB_HOST_HCSPLT6_PRTADDR register field value suitable for setting the register. */
27302 #define ALT_USB_HOST_HCSPLT6_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
27303 
27304 /*
27305  * Field : Hub Address - hubaddr
27306  *
27307  * This field holds the device address of the transaction translator's hub.
27308  *
27309  * Field Access Macros:
27310  *
27311  */
27312 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT6_HUBADDR register field. */
27313 #define ALT_USB_HOST_HCSPLT6_HUBADDR_LSB 7
27314 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT6_HUBADDR register field. */
27315 #define ALT_USB_HOST_HCSPLT6_HUBADDR_MSB 13
27316 /* The width in bits of the ALT_USB_HOST_HCSPLT6_HUBADDR register field. */
27317 #define ALT_USB_HOST_HCSPLT6_HUBADDR_WIDTH 7
27318 /* The mask used to set the ALT_USB_HOST_HCSPLT6_HUBADDR register field value. */
27319 #define ALT_USB_HOST_HCSPLT6_HUBADDR_SET_MSK 0x00003f80
27320 /* The mask used to clear the ALT_USB_HOST_HCSPLT6_HUBADDR register field value. */
27321 #define ALT_USB_HOST_HCSPLT6_HUBADDR_CLR_MSK 0xffffc07f
27322 /* The reset value of the ALT_USB_HOST_HCSPLT6_HUBADDR register field. */
27323 #define ALT_USB_HOST_HCSPLT6_HUBADDR_RESET 0x0
27324 /* Extracts the ALT_USB_HOST_HCSPLT6_HUBADDR field value from a register. */
27325 #define ALT_USB_HOST_HCSPLT6_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
27326 /* Produces a ALT_USB_HOST_HCSPLT6_HUBADDR register field value suitable for setting the register. */
27327 #define ALT_USB_HOST_HCSPLT6_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
27328 
27329 /*
27330  * Field : Transaction Position - xactpos
27331  *
27332  * This field is used to determine whether to send all, first, middle, or last
27333  * payloads with each OUT transaction.
27334  *
27335  * Field Enumeration Values:
27336  *
27337  * Enum | Value | Description
27338  * :--------------------------------------|:------|:------------------------------------------------
27339  * ALT_USB_HOST_HCSPLT6_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
27340  * : | | transaction (which is larger than 188 bytes)
27341  * ALT_USB_HOST_HCSPLT6_XACTPOS_E_END | 0x1 | End. This is the last payload of this
27342  * : | | transaction (which is larger than 188 bytes)
27343  * ALT_USB_HOST_HCSPLT6_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
27344  * : | | transaction (which is larger than 188 bytes)
27345  * ALT_USB_HOST_HCSPLT6_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
27346  * : | | transaction (which is less than or equal to 188
27347  * : | | bytes)
27348  *
27349  * Field Access Macros:
27350  *
27351  */
27352 /*
27353  * Enumerated value for register field ALT_USB_HOST_HCSPLT6_XACTPOS
27354  *
27355  * Mid. This is the middle payload of this transaction (which is larger than 188
27356  * bytes)
27357  */
27358 #define ALT_USB_HOST_HCSPLT6_XACTPOS_E_MIDDLE 0x0
27359 /*
27360  * Enumerated value for register field ALT_USB_HOST_HCSPLT6_XACTPOS
27361  *
27362  * End. This is the last payload of this transaction (which is larger than 188
27363  * bytes)
27364  */
27365 #define ALT_USB_HOST_HCSPLT6_XACTPOS_E_END 0x1
27366 /*
27367  * Enumerated value for register field ALT_USB_HOST_HCSPLT6_XACTPOS
27368  *
27369  * Begin. This is the first data payload of this transaction (which is larger than
27370  * 188 bytes)
27371  */
27372 #define ALT_USB_HOST_HCSPLT6_XACTPOS_E_BEGIN 0x2
27373 /*
27374  * Enumerated value for register field ALT_USB_HOST_HCSPLT6_XACTPOS
27375  *
27376  * All. This is the entire data payload is of this transaction (which is less than
27377  * or equal to 188 bytes)
27378  */
27379 #define ALT_USB_HOST_HCSPLT6_XACTPOS_E_ALL 0x3
27380 
27381 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT6_XACTPOS register field. */
27382 #define ALT_USB_HOST_HCSPLT6_XACTPOS_LSB 14
27383 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT6_XACTPOS register field. */
27384 #define ALT_USB_HOST_HCSPLT6_XACTPOS_MSB 15
27385 /* The width in bits of the ALT_USB_HOST_HCSPLT6_XACTPOS register field. */
27386 #define ALT_USB_HOST_HCSPLT6_XACTPOS_WIDTH 2
27387 /* The mask used to set the ALT_USB_HOST_HCSPLT6_XACTPOS register field value. */
27388 #define ALT_USB_HOST_HCSPLT6_XACTPOS_SET_MSK 0x0000c000
27389 /* The mask used to clear the ALT_USB_HOST_HCSPLT6_XACTPOS register field value. */
27390 #define ALT_USB_HOST_HCSPLT6_XACTPOS_CLR_MSK 0xffff3fff
27391 /* The reset value of the ALT_USB_HOST_HCSPLT6_XACTPOS register field. */
27392 #define ALT_USB_HOST_HCSPLT6_XACTPOS_RESET 0x0
27393 /* Extracts the ALT_USB_HOST_HCSPLT6_XACTPOS field value from a register. */
27394 #define ALT_USB_HOST_HCSPLT6_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
27395 /* Produces a ALT_USB_HOST_HCSPLT6_XACTPOS register field value suitable for setting the register. */
27396 #define ALT_USB_HOST_HCSPLT6_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
27397 
27398 /*
27399  * Field : Do Complete Split - compsplt
27400  *
27401  * The application sets this field to request the OTG host to perform a complete
27402  * split transaction.
27403  *
27404  * Field Enumeration Values:
27405  *
27406  * Enum | Value | Description
27407  * :----------------------------------------|:------|:---------------------
27408  * ALT_USB_HOST_HCSPLT6_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
27409  * ALT_USB_HOST_HCSPLT6_COMPSPLT_E_SPLIT | 0x1 | Split transaction
27410  *
27411  * Field Access Macros:
27412  *
27413  */
27414 /*
27415  * Enumerated value for register field ALT_USB_HOST_HCSPLT6_COMPSPLT
27416  *
27417  * No split transaction
27418  */
27419 #define ALT_USB_HOST_HCSPLT6_COMPSPLT_E_NOSPLIT 0x0
27420 /*
27421  * Enumerated value for register field ALT_USB_HOST_HCSPLT6_COMPSPLT
27422  *
27423  * Split transaction
27424  */
27425 #define ALT_USB_HOST_HCSPLT6_COMPSPLT_E_SPLIT 0x1
27426 
27427 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT6_COMPSPLT register field. */
27428 #define ALT_USB_HOST_HCSPLT6_COMPSPLT_LSB 16
27429 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT6_COMPSPLT register field. */
27430 #define ALT_USB_HOST_HCSPLT6_COMPSPLT_MSB 16
27431 /* The width in bits of the ALT_USB_HOST_HCSPLT6_COMPSPLT register field. */
27432 #define ALT_USB_HOST_HCSPLT6_COMPSPLT_WIDTH 1
27433 /* The mask used to set the ALT_USB_HOST_HCSPLT6_COMPSPLT register field value. */
27434 #define ALT_USB_HOST_HCSPLT6_COMPSPLT_SET_MSK 0x00010000
27435 /* The mask used to clear the ALT_USB_HOST_HCSPLT6_COMPSPLT register field value. */
27436 #define ALT_USB_HOST_HCSPLT6_COMPSPLT_CLR_MSK 0xfffeffff
27437 /* The reset value of the ALT_USB_HOST_HCSPLT6_COMPSPLT register field. */
27438 #define ALT_USB_HOST_HCSPLT6_COMPSPLT_RESET 0x0
27439 /* Extracts the ALT_USB_HOST_HCSPLT6_COMPSPLT field value from a register. */
27440 #define ALT_USB_HOST_HCSPLT6_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
27441 /* Produces a ALT_USB_HOST_HCSPLT6_COMPSPLT register field value suitable for setting the register. */
27442 #define ALT_USB_HOST_HCSPLT6_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
27443 
27444 /*
27445  * Field : Split Enable - spltena
27446  *
27447  * The application sets this field to indicate that this channel is enabled to
27448  * perform split transactions.
27449  *
27450  * Field Enumeration Values:
27451  *
27452  * Enum | Value | Description
27453  * :------------------------------------|:------|:------------------
27454  * ALT_USB_HOST_HCSPLT6_SPLTENA_E_DISD | 0x0 | Split not enabled
27455  * ALT_USB_HOST_HCSPLT6_SPLTENA_E_END | 0x1 | Split enabled
27456  *
27457  * Field Access Macros:
27458  *
27459  */
27460 /*
27461  * Enumerated value for register field ALT_USB_HOST_HCSPLT6_SPLTENA
27462  *
27463  * Split not enabled
27464  */
27465 #define ALT_USB_HOST_HCSPLT6_SPLTENA_E_DISD 0x0
27466 /*
27467  * Enumerated value for register field ALT_USB_HOST_HCSPLT6_SPLTENA
27468  *
27469  * Split enabled
27470  */
27471 #define ALT_USB_HOST_HCSPLT6_SPLTENA_E_END 0x1
27472 
27473 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT6_SPLTENA register field. */
27474 #define ALT_USB_HOST_HCSPLT6_SPLTENA_LSB 31
27475 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT6_SPLTENA register field. */
27476 #define ALT_USB_HOST_HCSPLT6_SPLTENA_MSB 31
27477 /* The width in bits of the ALT_USB_HOST_HCSPLT6_SPLTENA register field. */
27478 #define ALT_USB_HOST_HCSPLT6_SPLTENA_WIDTH 1
27479 /* The mask used to set the ALT_USB_HOST_HCSPLT6_SPLTENA register field value. */
27480 #define ALT_USB_HOST_HCSPLT6_SPLTENA_SET_MSK 0x80000000
27481 /* The mask used to clear the ALT_USB_HOST_HCSPLT6_SPLTENA register field value. */
27482 #define ALT_USB_HOST_HCSPLT6_SPLTENA_CLR_MSK 0x7fffffff
27483 /* The reset value of the ALT_USB_HOST_HCSPLT6_SPLTENA register field. */
27484 #define ALT_USB_HOST_HCSPLT6_SPLTENA_RESET 0x0
27485 /* Extracts the ALT_USB_HOST_HCSPLT6_SPLTENA field value from a register. */
27486 #define ALT_USB_HOST_HCSPLT6_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
27487 /* Produces a ALT_USB_HOST_HCSPLT6_SPLTENA register field value suitable for setting the register. */
27488 #define ALT_USB_HOST_HCSPLT6_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
27489 
27490 #ifndef __ASSEMBLY__
27491 /*
27492  * WARNING: The C register and register group struct declarations are provided for
27493  * convenience and illustrative purposes. They should, however, be used with
27494  * caution as the C language standard provides no guarantees about the alignment or
27495  * atomicity of device memory accesses. The recommended practice for writing
27496  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
27497  * alt_write_word() functions.
27498  *
27499  * The struct declaration for register ALT_USB_HOST_HCSPLT6.
27500  */
27501 struct ALT_USB_HOST_HCSPLT6_s
27502 {
27503  uint32_t prtaddr : 7; /* Port Address */
27504  uint32_t hubaddr : 7; /* Hub Address */
27505  uint32_t xactpos : 2; /* Transaction Position */
27506  uint32_t compsplt : 1; /* Do Complete Split */
27507  uint32_t : 14; /* *UNDEFINED* */
27508  uint32_t spltena : 1; /* Split Enable */
27509 };
27510 
27511 /* The typedef declaration for register ALT_USB_HOST_HCSPLT6. */
27512 typedef volatile struct ALT_USB_HOST_HCSPLT6_s ALT_USB_HOST_HCSPLT6_t;
27513 #endif /* __ASSEMBLY__ */
27514 
27515 /* The byte offset of the ALT_USB_HOST_HCSPLT6 register from the beginning of the component. */
27516 #define ALT_USB_HOST_HCSPLT6_OFST 0x1c4
27517 /* The address of the ALT_USB_HOST_HCSPLT6 register. */
27518 #define ALT_USB_HOST_HCSPLT6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT6_OFST))
27519 
27520 /*
27521  * Register : Host Channel 6 Interrupt Register - hcint6
27522  *
27523  * This register indicates the status of a channel with respect to USB- and AHB-
27524  * related events. The application must read this register when the Host Channels
27525  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
27526  * application can read this register, it must first read the Host All Channels
27527  * Interrupt (HAINT) register to get the exact channel number for the Host
27528  * Channel-n Interrupt register. The application must clear the appropriate bit in
27529  * this register to clear the corresponding bits in the HAINT and GINTSTS
27530  * registers.
27531  *
27532  * Register Layout
27533  *
27534  * Bits | Access | Reset | Description
27535  * :--------|:-------|:------|:--------------------------------------------
27536  * [0] | R | 0x0 | Transfer Completed
27537  * [1] | R | 0x0 | Channel Halted
27538  * [2] | R | 0x0 | AHB Error
27539  * [3] | R | 0x0 | STALL Response Received Interrupt
27540  * [4] | R | 0x0 | NAK Response Received Interrupt
27541  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
27542  * [6] | R | 0x0 | NYET Response Received Interrupt
27543  * [7] | R | 0x0 | Transaction Error
27544  * [8] | R | 0x0 | Babble Error
27545  * [9] | R | 0x0 | Frame Overrun
27546  * [10] | R | 0x0 | Data Toggle Error
27547  * [11] | R | 0x0 | BNA Interrupt
27548  * [12] | R | 0x0 | Excessive Transaction Error
27549  * [13] | R | 0x0 | Descriptor rollover interrupt
27550  * [31:14] | ??? | 0x0 | *UNDEFINED*
27551  *
27552  */
27553 /*
27554  * Field : Transfer Completed - xfercompl
27555  *
27556  * Transfer completed normally without any errors. This bit can be set only by the
27557  * core and the application should write 1 to clear it.
27558  *
27559  * Field Enumeration Values:
27560  *
27561  * Enum | Value | Description
27562  * :--------------------------------------|:------|:-----------------------------------------------
27563  * ALT_USB_HOST_HCINT6_XFERCOMPL_E_INACT | 0x0 | No transfer
27564  * ALT_USB_HOST_HCINT6_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
27565  *
27566  * Field Access Macros:
27567  *
27568  */
27569 /*
27570  * Enumerated value for register field ALT_USB_HOST_HCINT6_XFERCOMPL
27571  *
27572  * No transfer
27573  */
27574 #define ALT_USB_HOST_HCINT6_XFERCOMPL_E_INACT 0x0
27575 /*
27576  * Enumerated value for register field ALT_USB_HOST_HCINT6_XFERCOMPL
27577  *
27578  * Transfer completed normally without any errors
27579  */
27580 #define ALT_USB_HOST_HCINT6_XFERCOMPL_E_ACT 0x1
27581 
27582 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_XFERCOMPL register field. */
27583 #define ALT_USB_HOST_HCINT6_XFERCOMPL_LSB 0
27584 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_XFERCOMPL register field. */
27585 #define ALT_USB_HOST_HCINT6_XFERCOMPL_MSB 0
27586 /* The width in bits of the ALT_USB_HOST_HCINT6_XFERCOMPL register field. */
27587 #define ALT_USB_HOST_HCINT6_XFERCOMPL_WIDTH 1
27588 /* The mask used to set the ALT_USB_HOST_HCINT6_XFERCOMPL register field value. */
27589 #define ALT_USB_HOST_HCINT6_XFERCOMPL_SET_MSK 0x00000001
27590 /* The mask used to clear the ALT_USB_HOST_HCINT6_XFERCOMPL register field value. */
27591 #define ALT_USB_HOST_HCINT6_XFERCOMPL_CLR_MSK 0xfffffffe
27592 /* The reset value of the ALT_USB_HOST_HCINT6_XFERCOMPL register field. */
27593 #define ALT_USB_HOST_HCINT6_XFERCOMPL_RESET 0x0
27594 /* Extracts the ALT_USB_HOST_HCINT6_XFERCOMPL field value from a register. */
27595 #define ALT_USB_HOST_HCINT6_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
27596 /* Produces a ALT_USB_HOST_HCINT6_XFERCOMPL register field value suitable for setting the register. */
27597 #define ALT_USB_HOST_HCINT6_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
27598 
27599 /*
27600  * Field : Channel Halted - chhltd
27601  *
27602  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
27603  * either because of any USB transaction error or in response to disable request by
27604  * the application or because of a completed transfer. In Scatter/gather DMA mode,
27605  * this indicates that transfer completed due to any of the following
27606  *
27607  * . EOL being set in descriptor
27608  *
27609  * . AHB error
27610  *
27611  * . Excessive transaction errors
27612  *
27613  * . Babble
27614  *
27615  * . Stall
27616  *
27617  * Field Enumeration Values:
27618  *
27619  * Enum | Value | Description
27620  * :-----------------------------------|:------|:-------------------
27621  * ALT_USB_HOST_HCINT6_CHHLTD_E_INACT | 0x0 | Channel not halted
27622  * ALT_USB_HOST_HCINT6_CHHLTD_E_ACT | 0x1 | Channel Halted
27623  *
27624  * Field Access Macros:
27625  *
27626  */
27627 /*
27628  * Enumerated value for register field ALT_USB_HOST_HCINT6_CHHLTD
27629  *
27630  * Channel not halted
27631  */
27632 #define ALT_USB_HOST_HCINT6_CHHLTD_E_INACT 0x0
27633 /*
27634  * Enumerated value for register field ALT_USB_HOST_HCINT6_CHHLTD
27635  *
27636  * Channel Halted
27637  */
27638 #define ALT_USB_HOST_HCINT6_CHHLTD_E_ACT 0x1
27639 
27640 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_CHHLTD register field. */
27641 #define ALT_USB_HOST_HCINT6_CHHLTD_LSB 1
27642 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_CHHLTD register field. */
27643 #define ALT_USB_HOST_HCINT6_CHHLTD_MSB 1
27644 /* The width in bits of the ALT_USB_HOST_HCINT6_CHHLTD register field. */
27645 #define ALT_USB_HOST_HCINT6_CHHLTD_WIDTH 1
27646 /* The mask used to set the ALT_USB_HOST_HCINT6_CHHLTD register field value. */
27647 #define ALT_USB_HOST_HCINT6_CHHLTD_SET_MSK 0x00000002
27648 /* The mask used to clear the ALT_USB_HOST_HCINT6_CHHLTD register field value. */
27649 #define ALT_USB_HOST_HCINT6_CHHLTD_CLR_MSK 0xfffffffd
27650 /* The reset value of the ALT_USB_HOST_HCINT6_CHHLTD register field. */
27651 #define ALT_USB_HOST_HCINT6_CHHLTD_RESET 0x0
27652 /* Extracts the ALT_USB_HOST_HCINT6_CHHLTD field value from a register. */
27653 #define ALT_USB_HOST_HCINT6_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
27654 /* Produces a ALT_USB_HOST_HCINT6_CHHLTD register field value suitable for setting the register. */
27655 #define ALT_USB_HOST_HCINT6_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
27656 
27657 /*
27658  * Field : AHB Error - ahberr
27659  *
27660  * This is generated only in Internal DMA mode when there is an AHB error during
27661  * AHB read/write. The application can read the corresponding channel's DMA address
27662  * register to get the error address.
27663  *
27664  * Field Enumeration Values:
27665  *
27666  * Enum | Value | Description
27667  * :-----------------------------------|:------|:--------------------------------
27668  * ALT_USB_HOST_HCINT6_AHBERR_E_INACT | 0x0 | No AHB error
27669  * ALT_USB_HOST_HCINT6_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
27670  *
27671  * Field Access Macros:
27672  *
27673  */
27674 /*
27675  * Enumerated value for register field ALT_USB_HOST_HCINT6_AHBERR
27676  *
27677  * No AHB error
27678  */
27679 #define ALT_USB_HOST_HCINT6_AHBERR_E_INACT 0x0
27680 /*
27681  * Enumerated value for register field ALT_USB_HOST_HCINT6_AHBERR
27682  *
27683  * AHB error during AHB read/write
27684  */
27685 #define ALT_USB_HOST_HCINT6_AHBERR_E_ACT 0x1
27686 
27687 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_AHBERR register field. */
27688 #define ALT_USB_HOST_HCINT6_AHBERR_LSB 2
27689 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_AHBERR register field. */
27690 #define ALT_USB_HOST_HCINT6_AHBERR_MSB 2
27691 /* The width in bits of the ALT_USB_HOST_HCINT6_AHBERR register field. */
27692 #define ALT_USB_HOST_HCINT6_AHBERR_WIDTH 1
27693 /* The mask used to set the ALT_USB_HOST_HCINT6_AHBERR register field value. */
27694 #define ALT_USB_HOST_HCINT6_AHBERR_SET_MSK 0x00000004
27695 /* The mask used to clear the ALT_USB_HOST_HCINT6_AHBERR register field value. */
27696 #define ALT_USB_HOST_HCINT6_AHBERR_CLR_MSK 0xfffffffb
27697 /* The reset value of the ALT_USB_HOST_HCINT6_AHBERR register field. */
27698 #define ALT_USB_HOST_HCINT6_AHBERR_RESET 0x0
27699 /* Extracts the ALT_USB_HOST_HCINT6_AHBERR field value from a register. */
27700 #define ALT_USB_HOST_HCINT6_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
27701 /* Produces a ALT_USB_HOST_HCINT6_AHBERR register field value suitable for setting the register. */
27702 #define ALT_USB_HOST_HCINT6_AHBERR_SET(value) (((value) << 2) & 0x00000004)
27703 
27704 /*
27705  * Field : STALL Response Received Interrupt - stall
27706  *
27707  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
27708  * This bit can be set only by the core and the application should write 1 to clear
27709  * it.
27710  *
27711  * Field Enumeration Values:
27712  *
27713  * Enum | Value | Description
27714  * :----------------------------------|:------|:-------------------
27715  * ALT_USB_HOST_HCINT6_STALL_E_INACT | 0x0 | No Stall Interrupt
27716  * ALT_USB_HOST_HCINT6_STALL_E_ACT | 0x1 | Stall Interrupt
27717  *
27718  * Field Access Macros:
27719  *
27720  */
27721 /*
27722  * Enumerated value for register field ALT_USB_HOST_HCINT6_STALL
27723  *
27724  * No Stall Interrupt
27725  */
27726 #define ALT_USB_HOST_HCINT6_STALL_E_INACT 0x0
27727 /*
27728  * Enumerated value for register field ALT_USB_HOST_HCINT6_STALL
27729  *
27730  * Stall Interrupt
27731  */
27732 #define ALT_USB_HOST_HCINT6_STALL_E_ACT 0x1
27733 
27734 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_STALL register field. */
27735 #define ALT_USB_HOST_HCINT6_STALL_LSB 3
27736 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_STALL register field. */
27737 #define ALT_USB_HOST_HCINT6_STALL_MSB 3
27738 /* The width in bits of the ALT_USB_HOST_HCINT6_STALL register field. */
27739 #define ALT_USB_HOST_HCINT6_STALL_WIDTH 1
27740 /* The mask used to set the ALT_USB_HOST_HCINT6_STALL register field value. */
27741 #define ALT_USB_HOST_HCINT6_STALL_SET_MSK 0x00000008
27742 /* The mask used to clear the ALT_USB_HOST_HCINT6_STALL register field value. */
27743 #define ALT_USB_HOST_HCINT6_STALL_CLR_MSK 0xfffffff7
27744 /* The reset value of the ALT_USB_HOST_HCINT6_STALL register field. */
27745 #define ALT_USB_HOST_HCINT6_STALL_RESET 0x0
27746 /* Extracts the ALT_USB_HOST_HCINT6_STALL field value from a register. */
27747 #define ALT_USB_HOST_HCINT6_STALL_GET(value) (((value) & 0x00000008) >> 3)
27748 /* Produces a ALT_USB_HOST_HCINT6_STALL register field value suitable for setting the register. */
27749 #define ALT_USB_HOST_HCINT6_STALL_SET(value) (((value) << 3) & 0x00000008)
27750 
27751 /*
27752  * Field : NAK Response Received Interrupt - nak
27753  *
27754  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
27755  * core.This bit can be set only by the core and the application should write 1 to
27756  * clear it.
27757  *
27758  * Field Enumeration Values:
27759  *
27760  * Enum | Value | Description
27761  * :--------------------------------|:------|:-----------------------------------
27762  * ALT_USB_HOST_HCINT6_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
27763  * ALT_USB_HOST_HCINT6_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
27764  *
27765  * Field Access Macros:
27766  *
27767  */
27768 /*
27769  * Enumerated value for register field ALT_USB_HOST_HCINT6_NAK
27770  *
27771  * No NAK Response Received Interrupt
27772  */
27773 #define ALT_USB_HOST_HCINT6_NAK_E_INACT 0x0
27774 /*
27775  * Enumerated value for register field ALT_USB_HOST_HCINT6_NAK
27776  *
27777  * NAK Response Received Interrupt
27778  */
27779 #define ALT_USB_HOST_HCINT6_NAK_E_ACT 0x1
27780 
27781 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_NAK register field. */
27782 #define ALT_USB_HOST_HCINT6_NAK_LSB 4
27783 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_NAK register field. */
27784 #define ALT_USB_HOST_HCINT6_NAK_MSB 4
27785 /* The width in bits of the ALT_USB_HOST_HCINT6_NAK register field. */
27786 #define ALT_USB_HOST_HCINT6_NAK_WIDTH 1
27787 /* The mask used to set the ALT_USB_HOST_HCINT6_NAK register field value. */
27788 #define ALT_USB_HOST_HCINT6_NAK_SET_MSK 0x00000010
27789 /* The mask used to clear the ALT_USB_HOST_HCINT6_NAK register field value. */
27790 #define ALT_USB_HOST_HCINT6_NAK_CLR_MSK 0xffffffef
27791 /* The reset value of the ALT_USB_HOST_HCINT6_NAK register field. */
27792 #define ALT_USB_HOST_HCINT6_NAK_RESET 0x0
27793 /* Extracts the ALT_USB_HOST_HCINT6_NAK field value from a register. */
27794 #define ALT_USB_HOST_HCINT6_NAK_GET(value) (((value) & 0x00000010) >> 4)
27795 /* Produces a ALT_USB_HOST_HCINT6_NAK register field value suitable for setting the register. */
27796 #define ALT_USB_HOST_HCINT6_NAK_SET(value) (((value) << 4) & 0x00000010)
27797 
27798 /*
27799  * Field : ACK Response Received Transmitted Interrupt - ack
27800  *
27801  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
27802  * This bit can be set only by the core and the application should write 1 to clear
27803  * it.
27804  *
27805  * Field Enumeration Values:
27806  *
27807  * Enum | Value | Description
27808  * :--------------------------------|:------|:-----------------------------------------------
27809  * ALT_USB_HOST_HCINT6_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
27810  * ALT_USB_HOST_HCINT6_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
27811  *
27812  * Field Access Macros:
27813  *
27814  */
27815 /*
27816  * Enumerated value for register field ALT_USB_HOST_HCINT6_ACK
27817  *
27818  * No ACK Response Received Transmitted Interrupt
27819  */
27820 #define ALT_USB_HOST_HCINT6_ACK_E_INACT 0x0
27821 /*
27822  * Enumerated value for register field ALT_USB_HOST_HCINT6_ACK
27823  *
27824  * ACK Response Received Transmitted Interrup
27825  */
27826 #define ALT_USB_HOST_HCINT6_ACK_E_ACT 0x1
27827 
27828 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_ACK register field. */
27829 #define ALT_USB_HOST_HCINT6_ACK_LSB 5
27830 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_ACK register field. */
27831 #define ALT_USB_HOST_HCINT6_ACK_MSB 5
27832 /* The width in bits of the ALT_USB_HOST_HCINT6_ACK register field. */
27833 #define ALT_USB_HOST_HCINT6_ACK_WIDTH 1
27834 /* The mask used to set the ALT_USB_HOST_HCINT6_ACK register field value. */
27835 #define ALT_USB_HOST_HCINT6_ACK_SET_MSK 0x00000020
27836 /* The mask used to clear the ALT_USB_HOST_HCINT6_ACK register field value. */
27837 #define ALT_USB_HOST_HCINT6_ACK_CLR_MSK 0xffffffdf
27838 /* The reset value of the ALT_USB_HOST_HCINT6_ACK register field. */
27839 #define ALT_USB_HOST_HCINT6_ACK_RESET 0x0
27840 /* Extracts the ALT_USB_HOST_HCINT6_ACK field value from a register. */
27841 #define ALT_USB_HOST_HCINT6_ACK_GET(value) (((value) & 0x00000020) >> 5)
27842 /* Produces a ALT_USB_HOST_HCINT6_ACK register field value suitable for setting the register. */
27843 #define ALT_USB_HOST_HCINT6_ACK_SET(value) (((value) << 5) & 0x00000020)
27844 
27845 /*
27846  * Field : NYET Response Received Interrupt - nyet
27847  *
27848  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
27849  * core.This bit can be set only by the core and the application should write 1 to
27850  * clear it.
27851  *
27852  * Field Enumeration Values:
27853  *
27854  * Enum | Value | Description
27855  * :---------------------------------|:------|:------------------------------------
27856  * ALT_USB_HOST_HCINT6_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
27857  * ALT_USB_HOST_HCINT6_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
27858  *
27859  * Field Access Macros:
27860  *
27861  */
27862 /*
27863  * Enumerated value for register field ALT_USB_HOST_HCINT6_NYET
27864  *
27865  * No NYET Response Received Interrupt
27866  */
27867 #define ALT_USB_HOST_HCINT6_NYET_E_INACT 0x0
27868 /*
27869  * Enumerated value for register field ALT_USB_HOST_HCINT6_NYET
27870  *
27871  * NYET Response Received Interrupt
27872  */
27873 #define ALT_USB_HOST_HCINT6_NYET_E_ACT 0x1
27874 
27875 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_NYET register field. */
27876 #define ALT_USB_HOST_HCINT6_NYET_LSB 6
27877 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_NYET register field. */
27878 #define ALT_USB_HOST_HCINT6_NYET_MSB 6
27879 /* The width in bits of the ALT_USB_HOST_HCINT6_NYET register field. */
27880 #define ALT_USB_HOST_HCINT6_NYET_WIDTH 1
27881 /* The mask used to set the ALT_USB_HOST_HCINT6_NYET register field value. */
27882 #define ALT_USB_HOST_HCINT6_NYET_SET_MSK 0x00000040
27883 /* The mask used to clear the ALT_USB_HOST_HCINT6_NYET register field value. */
27884 #define ALT_USB_HOST_HCINT6_NYET_CLR_MSK 0xffffffbf
27885 /* The reset value of the ALT_USB_HOST_HCINT6_NYET register field. */
27886 #define ALT_USB_HOST_HCINT6_NYET_RESET 0x0
27887 /* Extracts the ALT_USB_HOST_HCINT6_NYET field value from a register. */
27888 #define ALT_USB_HOST_HCINT6_NYET_GET(value) (((value) & 0x00000040) >> 6)
27889 /* Produces a ALT_USB_HOST_HCINT6_NYET register field value suitable for setting the register. */
27890 #define ALT_USB_HOST_HCINT6_NYET_SET(value) (((value) << 6) & 0x00000040)
27891 
27892 /*
27893  * Field : Transaction Error - xacterr
27894  *
27895  * Indicates one of the following errors occurred on the USB.-CRC check failure
27896  *
27897  * * Timeout
27898  *
27899  * * Bit stuff error
27900  *
27901  * * False EOP
27902  *
27903  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
27904  * This bit can be set only by the core and the application should write 1 to clear
27905  * it.
27906  *
27907  * Field Enumeration Values:
27908  *
27909  * Enum | Value | Description
27910  * :------------------------------------|:------|:---------------------
27911  * ALT_USB_HOST_HCINT6_XACTERR_E_INACT | 0x0 | No Transaction Error
27912  * ALT_USB_HOST_HCINT6_XACTERR_E_ACT | 0x1 | Transaction Error
27913  *
27914  * Field Access Macros:
27915  *
27916  */
27917 /*
27918  * Enumerated value for register field ALT_USB_HOST_HCINT6_XACTERR
27919  *
27920  * No Transaction Error
27921  */
27922 #define ALT_USB_HOST_HCINT6_XACTERR_E_INACT 0x0
27923 /*
27924  * Enumerated value for register field ALT_USB_HOST_HCINT6_XACTERR
27925  *
27926  * Transaction Error
27927  */
27928 #define ALT_USB_HOST_HCINT6_XACTERR_E_ACT 0x1
27929 
27930 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_XACTERR register field. */
27931 #define ALT_USB_HOST_HCINT6_XACTERR_LSB 7
27932 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_XACTERR register field. */
27933 #define ALT_USB_HOST_HCINT6_XACTERR_MSB 7
27934 /* The width in bits of the ALT_USB_HOST_HCINT6_XACTERR register field. */
27935 #define ALT_USB_HOST_HCINT6_XACTERR_WIDTH 1
27936 /* The mask used to set the ALT_USB_HOST_HCINT6_XACTERR register field value. */
27937 #define ALT_USB_HOST_HCINT6_XACTERR_SET_MSK 0x00000080
27938 /* The mask used to clear the ALT_USB_HOST_HCINT6_XACTERR register field value. */
27939 #define ALT_USB_HOST_HCINT6_XACTERR_CLR_MSK 0xffffff7f
27940 /* The reset value of the ALT_USB_HOST_HCINT6_XACTERR register field. */
27941 #define ALT_USB_HOST_HCINT6_XACTERR_RESET 0x0
27942 /* Extracts the ALT_USB_HOST_HCINT6_XACTERR field value from a register. */
27943 #define ALT_USB_HOST_HCINT6_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
27944 /* Produces a ALT_USB_HOST_HCINT6_XACTERR register field value suitable for setting the register. */
27945 #define ALT_USB_HOST_HCINT6_XACTERR_SET(value) (((value) << 7) & 0x00000080)
27946 
27947 /*
27948  * Field : Babble Error - bblerr
27949  *
27950  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
27951  * core..This bit can be set only by the core and the application should write 1 to
27952  * clear it.
27953  *
27954  * Field Enumeration Values:
27955  *
27956  * Enum | Value | Description
27957  * :-----------------------------------|:------|:----------------
27958  * ALT_USB_HOST_HCINT6_BBLERR_E_INACT | 0x0 | No Babble Error
27959  * ALT_USB_HOST_HCINT6_BBLERR_E_ACT | 0x1 | Babble Error
27960  *
27961  * Field Access Macros:
27962  *
27963  */
27964 /*
27965  * Enumerated value for register field ALT_USB_HOST_HCINT6_BBLERR
27966  *
27967  * No Babble Error
27968  */
27969 #define ALT_USB_HOST_HCINT6_BBLERR_E_INACT 0x0
27970 /*
27971  * Enumerated value for register field ALT_USB_HOST_HCINT6_BBLERR
27972  *
27973  * Babble Error
27974  */
27975 #define ALT_USB_HOST_HCINT6_BBLERR_E_ACT 0x1
27976 
27977 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_BBLERR register field. */
27978 #define ALT_USB_HOST_HCINT6_BBLERR_LSB 8
27979 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_BBLERR register field. */
27980 #define ALT_USB_HOST_HCINT6_BBLERR_MSB 8
27981 /* The width in bits of the ALT_USB_HOST_HCINT6_BBLERR register field. */
27982 #define ALT_USB_HOST_HCINT6_BBLERR_WIDTH 1
27983 /* The mask used to set the ALT_USB_HOST_HCINT6_BBLERR register field value. */
27984 #define ALT_USB_HOST_HCINT6_BBLERR_SET_MSK 0x00000100
27985 /* The mask used to clear the ALT_USB_HOST_HCINT6_BBLERR register field value. */
27986 #define ALT_USB_HOST_HCINT6_BBLERR_CLR_MSK 0xfffffeff
27987 /* The reset value of the ALT_USB_HOST_HCINT6_BBLERR register field. */
27988 #define ALT_USB_HOST_HCINT6_BBLERR_RESET 0x0
27989 /* Extracts the ALT_USB_HOST_HCINT6_BBLERR field value from a register. */
27990 #define ALT_USB_HOST_HCINT6_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
27991 /* Produces a ALT_USB_HOST_HCINT6_BBLERR register field value suitable for setting the register. */
27992 #define ALT_USB_HOST_HCINT6_BBLERR_SET(value) (((value) << 8) & 0x00000100)
27993 
27994 /*
27995  * Field : Frame Overrun - frmovrun
27996  *
27997  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
27998  * This bit can be set only by the core and the application should write 1 to clear
27999  * it.
28000  *
28001  * Field Enumeration Values:
28002  *
28003  * Enum | Value | Description
28004  * :-------------------------------------|:------|:-----------------
28005  * ALT_USB_HOST_HCINT6_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
28006  * ALT_USB_HOST_HCINT6_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
28007  *
28008  * Field Access Macros:
28009  *
28010  */
28011 /*
28012  * Enumerated value for register field ALT_USB_HOST_HCINT6_FRMOVRUN
28013  *
28014  * No Frame Overrun
28015  */
28016 #define ALT_USB_HOST_HCINT6_FRMOVRUN_E_INACT 0x0
28017 /*
28018  * Enumerated value for register field ALT_USB_HOST_HCINT6_FRMOVRUN
28019  *
28020  * Frame Overrun
28021  */
28022 #define ALT_USB_HOST_HCINT6_FRMOVRUN_E_ACT 0x1
28023 
28024 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_FRMOVRUN register field. */
28025 #define ALT_USB_HOST_HCINT6_FRMOVRUN_LSB 9
28026 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_FRMOVRUN register field. */
28027 #define ALT_USB_HOST_HCINT6_FRMOVRUN_MSB 9
28028 /* The width in bits of the ALT_USB_HOST_HCINT6_FRMOVRUN register field. */
28029 #define ALT_USB_HOST_HCINT6_FRMOVRUN_WIDTH 1
28030 /* The mask used to set the ALT_USB_HOST_HCINT6_FRMOVRUN register field value. */
28031 #define ALT_USB_HOST_HCINT6_FRMOVRUN_SET_MSK 0x00000200
28032 /* The mask used to clear the ALT_USB_HOST_HCINT6_FRMOVRUN register field value. */
28033 #define ALT_USB_HOST_HCINT6_FRMOVRUN_CLR_MSK 0xfffffdff
28034 /* The reset value of the ALT_USB_HOST_HCINT6_FRMOVRUN register field. */
28035 #define ALT_USB_HOST_HCINT6_FRMOVRUN_RESET 0x0
28036 /* Extracts the ALT_USB_HOST_HCINT6_FRMOVRUN field value from a register. */
28037 #define ALT_USB_HOST_HCINT6_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
28038 /* Produces a ALT_USB_HOST_HCINT6_FRMOVRUN register field value suitable for setting the register. */
28039 #define ALT_USB_HOST_HCINT6_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
28040 
28041 /*
28042  * Field : Data Toggle Error - datatglerr
28043  *
28044  * This bit can be set only by the core and the application should write 1 to clear
28045  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
28046  * core.
28047  *
28048  * Field Enumeration Values:
28049  *
28050  * Enum | Value | Description
28051  * :---------------------------------------|:------|:---------------------
28052  * ALT_USB_HOST_HCINT6_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
28053  * ALT_USB_HOST_HCINT6_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
28054  *
28055  * Field Access Macros:
28056  *
28057  */
28058 /*
28059  * Enumerated value for register field ALT_USB_HOST_HCINT6_DATATGLERR
28060  *
28061  * No Data Toggle Error
28062  */
28063 #define ALT_USB_HOST_HCINT6_DATATGLERR_E_INACT 0x0
28064 /*
28065  * Enumerated value for register field ALT_USB_HOST_HCINT6_DATATGLERR
28066  *
28067  * Data Toggle Error
28068  */
28069 #define ALT_USB_HOST_HCINT6_DATATGLERR_E_ACT 0x1
28070 
28071 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_DATATGLERR register field. */
28072 #define ALT_USB_HOST_HCINT6_DATATGLERR_LSB 10
28073 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_DATATGLERR register field. */
28074 #define ALT_USB_HOST_HCINT6_DATATGLERR_MSB 10
28075 /* The width in bits of the ALT_USB_HOST_HCINT6_DATATGLERR register field. */
28076 #define ALT_USB_HOST_HCINT6_DATATGLERR_WIDTH 1
28077 /* The mask used to set the ALT_USB_HOST_HCINT6_DATATGLERR register field value. */
28078 #define ALT_USB_HOST_HCINT6_DATATGLERR_SET_MSK 0x00000400
28079 /* The mask used to clear the ALT_USB_HOST_HCINT6_DATATGLERR register field value. */
28080 #define ALT_USB_HOST_HCINT6_DATATGLERR_CLR_MSK 0xfffffbff
28081 /* The reset value of the ALT_USB_HOST_HCINT6_DATATGLERR register field. */
28082 #define ALT_USB_HOST_HCINT6_DATATGLERR_RESET 0x0
28083 /* Extracts the ALT_USB_HOST_HCINT6_DATATGLERR field value from a register. */
28084 #define ALT_USB_HOST_HCINT6_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
28085 /* Produces a ALT_USB_HOST_HCINT6_DATATGLERR register field value suitable for setting the register. */
28086 #define ALT_USB_HOST_HCINT6_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
28087 
28088 /*
28089  * Field : BNA Interrupt - bnaintr
28090  *
28091  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
28092  * generates this interrupt when the descriptor accessed is not ready for the Core
28093  * to process. BNA will not be generated for Isochronous channels. for non
28094  * Scatter/Gather DMA mode, this bit is reserved.
28095  *
28096  * Field Enumeration Values:
28097  *
28098  * Enum | Value | Description
28099  * :------------------------------------|:------|:-----------------
28100  * ALT_USB_HOST_HCINT6_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
28101  * ALT_USB_HOST_HCINT6_BNAINTR_E_ACT | 0x1 | BNA Interrupt
28102  *
28103  * Field Access Macros:
28104  *
28105  */
28106 /*
28107  * Enumerated value for register field ALT_USB_HOST_HCINT6_BNAINTR
28108  *
28109  * No BNA Interrupt
28110  */
28111 #define ALT_USB_HOST_HCINT6_BNAINTR_E_INACT 0x0
28112 /*
28113  * Enumerated value for register field ALT_USB_HOST_HCINT6_BNAINTR
28114  *
28115  * BNA Interrupt
28116  */
28117 #define ALT_USB_HOST_HCINT6_BNAINTR_E_ACT 0x1
28118 
28119 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_BNAINTR register field. */
28120 #define ALT_USB_HOST_HCINT6_BNAINTR_LSB 11
28121 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_BNAINTR register field. */
28122 #define ALT_USB_HOST_HCINT6_BNAINTR_MSB 11
28123 /* The width in bits of the ALT_USB_HOST_HCINT6_BNAINTR register field. */
28124 #define ALT_USB_HOST_HCINT6_BNAINTR_WIDTH 1
28125 /* The mask used to set the ALT_USB_HOST_HCINT6_BNAINTR register field value. */
28126 #define ALT_USB_HOST_HCINT6_BNAINTR_SET_MSK 0x00000800
28127 /* The mask used to clear the ALT_USB_HOST_HCINT6_BNAINTR register field value. */
28128 #define ALT_USB_HOST_HCINT6_BNAINTR_CLR_MSK 0xfffff7ff
28129 /* The reset value of the ALT_USB_HOST_HCINT6_BNAINTR register field. */
28130 #define ALT_USB_HOST_HCINT6_BNAINTR_RESET 0x0
28131 /* Extracts the ALT_USB_HOST_HCINT6_BNAINTR field value from a register. */
28132 #define ALT_USB_HOST_HCINT6_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
28133 /* Produces a ALT_USB_HOST_HCINT6_BNAINTR register field value suitable for setting the register. */
28134 #define ALT_USB_HOST_HCINT6_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
28135 
28136 /*
28137  * Field : Excessive Transaction Error - xcs_xact_err
28138  *
28139  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
28140  * this bit when 3 consecutive transaction errors occurred on the USB bus.
28141  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
28142  * Scatter/Gather DMA mode, this bit is reserved.
28143  *
28144  * Field Enumeration Values:
28145  *
28146  * Enum | Value | Description
28147  * :-------------------------------------------|:------|:-------------------------------
28148  * ALT_USB_HOST_HCINT6_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
28149  * ALT_USB_HOST_HCINT6_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
28150  *
28151  * Field Access Macros:
28152  *
28153  */
28154 /*
28155  * Enumerated value for register field ALT_USB_HOST_HCINT6_XCS_XACT_ERR
28156  *
28157  * No Excessive Transaction Error
28158  */
28159 #define ALT_USB_HOST_HCINT6_XCS_XACT_ERR_E_INACT 0x0
28160 /*
28161  * Enumerated value for register field ALT_USB_HOST_HCINT6_XCS_XACT_ERR
28162  *
28163  * Excessive Transaction Error
28164  */
28165 #define ALT_USB_HOST_HCINT6_XCS_XACT_ERR_E_ACVTIVE 0x1
28166 
28167 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_XCS_XACT_ERR register field. */
28168 #define ALT_USB_HOST_HCINT6_XCS_XACT_ERR_LSB 12
28169 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_XCS_XACT_ERR register field. */
28170 #define ALT_USB_HOST_HCINT6_XCS_XACT_ERR_MSB 12
28171 /* The width in bits of the ALT_USB_HOST_HCINT6_XCS_XACT_ERR register field. */
28172 #define ALT_USB_HOST_HCINT6_XCS_XACT_ERR_WIDTH 1
28173 /* The mask used to set the ALT_USB_HOST_HCINT6_XCS_XACT_ERR register field value. */
28174 #define ALT_USB_HOST_HCINT6_XCS_XACT_ERR_SET_MSK 0x00001000
28175 /* The mask used to clear the ALT_USB_HOST_HCINT6_XCS_XACT_ERR register field value. */
28176 #define ALT_USB_HOST_HCINT6_XCS_XACT_ERR_CLR_MSK 0xffffefff
28177 /* The reset value of the ALT_USB_HOST_HCINT6_XCS_XACT_ERR register field. */
28178 #define ALT_USB_HOST_HCINT6_XCS_XACT_ERR_RESET 0x0
28179 /* Extracts the ALT_USB_HOST_HCINT6_XCS_XACT_ERR field value from a register. */
28180 #define ALT_USB_HOST_HCINT6_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
28181 /* Produces a ALT_USB_HOST_HCINT6_XCS_XACT_ERR register field value suitable for setting the register. */
28182 #define ALT_USB_HOST_HCINT6_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
28183 
28184 /*
28185  * Field : Descriptor rollover interrupt - desc_lst_rollintr
28186  *
28187  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
28188  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
28189  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
28190  * mode, this bit is reserved.
28191  *
28192  * Field Enumeration Values:
28193  *
28194  * Enum | Value | Description
28195  * :----------------------------------------------|:------|:---------------------------------
28196  * ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
28197  * ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
28198  *
28199  * Field Access Macros:
28200  *
28201  */
28202 /*
28203  * Enumerated value for register field ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR
28204  *
28205  * No Descriptor rollover interrupt
28206  */
28207 #define ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR_E_INACT 0x0
28208 /*
28209  * Enumerated value for register field ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR
28210  *
28211  * Descriptor rollover interrupt
28212  */
28213 #define ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR_E_ACT 0x1
28214 
28215 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR register field. */
28216 #define ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR_LSB 13
28217 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR register field. */
28218 #define ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR_MSB 13
28219 /* The width in bits of the ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR register field. */
28220 #define ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR_WIDTH 1
28221 /* The mask used to set the ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR register field value. */
28222 #define ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR_SET_MSK 0x00002000
28223 /* The mask used to clear the ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR register field value. */
28224 #define ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
28225 /* The reset value of the ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR register field. */
28226 #define ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR_RESET 0x0
28227 /* Extracts the ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR field value from a register. */
28228 #define ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
28229 /* Produces a ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR register field value suitable for setting the register. */
28230 #define ALT_USB_HOST_HCINT6_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
28231 
28232 #ifndef __ASSEMBLY__
28233 /*
28234  * WARNING: The C register and register group struct declarations are provided for
28235  * convenience and illustrative purposes. They should, however, be used with
28236  * caution as the C language standard provides no guarantees about the alignment or
28237  * atomicity of device memory accesses. The recommended practice for writing
28238  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
28239  * alt_write_word() functions.
28240  *
28241  * The struct declaration for register ALT_USB_HOST_HCINT6.
28242  */
28243 struct ALT_USB_HOST_HCINT6_s
28244 {
28245  const uint32_t xfercompl : 1; /* Transfer Completed */
28246  const uint32_t chhltd : 1; /* Channel Halted */
28247  const uint32_t ahberr : 1; /* AHB Error */
28248  const uint32_t stall : 1; /* STALL Response Received Interrupt */
28249  const uint32_t nak : 1; /* NAK Response Received Interrupt */
28250  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
28251  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
28252  const uint32_t xacterr : 1; /* Transaction Error */
28253  const uint32_t bblerr : 1; /* Babble Error */
28254  const uint32_t frmovrun : 1; /* Frame Overrun */
28255  const uint32_t datatglerr : 1; /* Data Toggle Error */
28256  const uint32_t bnaintr : 1; /* BNA Interrupt */
28257  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
28258  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
28259  uint32_t : 18; /* *UNDEFINED* */
28260 };
28261 
28262 /* The typedef declaration for register ALT_USB_HOST_HCINT6. */
28263 typedef volatile struct ALT_USB_HOST_HCINT6_s ALT_USB_HOST_HCINT6_t;
28264 #endif /* __ASSEMBLY__ */
28265 
28266 /* The byte offset of the ALT_USB_HOST_HCINT6 register from the beginning of the component. */
28267 #define ALT_USB_HOST_HCINT6_OFST 0x1c8
28268 /* The address of the ALT_USB_HOST_HCINT6 register. */
28269 #define ALT_USB_HOST_HCINT6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT6_OFST))
28270 
28271 /*
28272  * Register : Host Channel 6 Interrupt Mask Register - hcintmsk6
28273  *
28274  * This register reflects the mask for each channel status described in the
28275  * previous section.
28276  *
28277  * Register Layout
28278  *
28279  * Bits | Access | Reset | Description
28280  * :--------|:-------|:------|:----------------------------------
28281  * [0] | RW | 0x0 | Transfer Completed Mask
28282  * [1] | RW | 0x0 | Channel Halted Mask
28283  * [2] | RW | 0x0 | AHB Error Mask
28284  * [10:3] | ??? | 0x0 | *UNDEFINED*
28285  * [11] | RW | 0x0 | BNA Interrupt mask
28286  * [12] | ??? | 0x0 | *UNDEFINED*
28287  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
28288  * [31:14] | ??? | 0x0 | *UNDEFINED*
28289  *
28290  */
28291 /*
28292  * Field : Transfer Completed Mask - xfercomplmsk
28293  *
28294  * Transfer complete.
28295  *
28296  * Field Enumeration Values:
28297  *
28298  * Enum | Value | Description
28299  * :--------------------------------------------|:------|:------------
28300  * ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK_E_MSK | 0x0 | Mask
28301  * ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
28302  *
28303  * Field Access Macros:
28304  *
28305  */
28306 /*
28307  * Enumerated value for register field ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK
28308  *
28309  * Mask
28310  */
28311 #define ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK_E_MSK 0x0
28312 /*
28313  * Enumerated value for register field ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK
28314  *
28315  * No mask
28316  */
28317 #define ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK_E_NOMSK 0x1
28318 
28319 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK register field. */
28320 #define ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK_LSB 0
28321 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK register field. */
28322 #define ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK_MSB 0
28323 /* The width in bits of the ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK register field. */
28324 #define ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK_WIDTH 1
28325 /* The mask used to set the ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK register field value. */
28326 #define ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK_SET_MSK 0x00000001
28327 /* The mask used to clear the ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK register field value. */
28328 #define ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK_CLR_MSK 0xfffffffe
28329 /* The reset value of the ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK register field. */
28330 #define ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK_RESET 0x0
28331 /* Extracts the ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK field value from a register. */
28332 #define ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
28333 /* Produces a ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK register field value suitable for setting the register. */
28334 #define ALT_USB_HOST_HCINTMSK6_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
28335 
28336 /*
28337  * Field : Channel Halted Mask - chhltdmsk
28338  *
28339  * Channel Halted.
28340  *
28341  * Field Enumeration Values:
28342  *
28343  * Enum | Value | Description
28344  * :-----------------------------------------|:------|:------------
28345  * ALT_USB_HOST_HCINTMSK6_CHHLTDMSK_E_MSK | 0x0 | Mask
28346  * ALT_USB_HOST_HCINTMSK6_CHHLTDMSK_E_NOMSK | 0x1 | No mask
28347  *
28348  * Field Access Macros:
28349  *
28350  */
28351 /*
28352  * Enumerated value for register field ALT_USB_HOST_HCINTMSK6_CHHLTDMSK
28353  *
28354  * Mask
28355  */
28356 #define ALT_USB_HOST_HCINTMSK6_CHHLTDMSK_E_MSK 0x0
28357 /*
28358  * Enumerated value for register field ALT_USB_HOST_HCINTMSK6_CHHLTDMSK
28359  *
28360  * No mask
28361  */
28362 #define ALT_USB_HOST_HCINTMSK6_CHHLTDMSK_E_NOMSK 0x1
28363 
28364 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK6_CHHLTDMSK register field. */
28365 #define ALT_USB_HOST_HCINTMSK6_CHHLTDMSK_LSB 1
28366 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK6_CHHLTDMSK register field. */
28367 #define ALT_USB_HOST_HCINTMSK6_CHHLTDMSK_MSB 1
28368 /* The width in bits of the ALT_USB_HOST_HCINTMSK6_CHHLTDMSK register field. */
28369 #define ALT_USB_HOST_HCINTMSK6_CHHLTDMSK_WIDTH 1
28370 /* The mask used to set the ALT_USB_HOST_HCINTMSK6_CHHLTDMSK register field value. */
28371 #define ALT_USB_HOST_HCINTMSK6_CHHLTDMSK_SET_MSK 0x00000002
28372 /* The mask used to clear the ALT_USB_HOST_HCINTMSK6_CHHLTDMSK register field value. */
28373 #define ALT_USB_HOST_HCINTMSK6_CHHLTDMSK_CLR_MSK 0xfffffffd
28374 /* The reset value of the ALT_USB_HOST_HCINTMSK6_CHHLTDMSK register field. */
28375 #define ALT_USB_HOST_HCINTMSK6_CHHLTDMSK_RESET 0x0
28376 /* Extracts the ALT_USB_HOST_HCINTMSK6_CHHLTDMSK field value from a register. */
28377 #define ALT_USB_HOST_HCINTMSK6_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
28378 /* Produces a ALT_USB_HOST_HCINTMSK6_CHHLTDMSK register field value suitable for setting the register. */
28379 #define ALT_USB_HOST_HCINTMSK6_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
28380 
28381 /*
28382  * Field : AHB Error Mask - ahberrmsk
28383  *
28384  * In scatter/gather DMA mode for host, interrupts will not be generated due to
28385  * the corresponding bits set in HCINTn.
28386  *
28387  * Field Enumeration Values:
28388  *
28389  * Enum | Value | Description
28390  * :-----------------------------------------|:------|:------------
28391  * ALT_USB_HOST_HCINTMSK6_AHBERRMSK_E_MSK | 0x0 | Mask
28392  * ALT_USB_HOST_HCINTMSK6_AHBERRMSK_E_NOMSK | 0x1 | No mask
28393  *
28394  * Field Access Macros:
28395  *
28396  */
28397 /*
28398  * Enumerated value for register field ALT_USB_HOST_HCINTMSK6_AHBERRMSK
28399  *
28400  * Mask
28401  */
28402 #define ALT_USB_HOST_HCINTMSK6_AHBERRMSK_E_MSK 0x0
28403 /*
28404  * Enumerated value for register field ALT_USB_HOST_HCINTMSK6_AHBERRMSK
28405  *
28406  * No mask
28407  */
28408 #define ALT_USB_HOST_HCINTMSK6_AHBERRMSK_E_NOMSK 0x1
28409 
28410 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK6_AHBERRMSK register field. */
28411 #define ALT_USB_HOST_HCINTMSK6_AHBERRMSK_LSB 2
28412 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK6_AHBERRMSK register field. */
28413 #define ALT_USB_HOST_HCINTMSK6_AHBERRMSK_MSB 2
28414 /* The width in bits of the ALT_USB_HOST_HCINTMSK6_AHBERRMSK register field. */
28415 #define ALT_USB_HOST_HCINTMSK6_AHBERRMSK_WIDTH 1
28416 /* The mask used to set the ALT_USB_HOST_HCINTMSK6_AHBERRMSK register field value. */
28417 #define ALT_USB_HOST_HCINTMSK6_AHBERRMSK_SET_MSK 0x00000004
28418 /* The mask used to clear the ALT_USB_HOST_HCINTMSK6_AHBERRMSK register field value. */
28419 #define ALT_USB_HOST_HCINTMSK6_AHBERRMSK_CLR_MSK 0xfffffffb
28420 /* The reset value of the ALT_USB_HOST_HCINTMSK6_AHBERRMSK register field. */
28421 #define ALT_USB_HOST_HCINTMSK6_AHBERRMSK_RESET 0x0
28422 /* Extracts the ALT_USB_HOST_HCINTMSK6_AHBERRMSK field value from a register. */
28423 #define ALT_USB_HOST_HCINTMSK6_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
28424 /* Produces a ALT_USB_HOST_HCINTMSK6_AHBERRMSK register field value suitable for setting the register. */
28425 #define ALT_USB_HOST_HCINTMSK6_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
28426 
28427 /*
28428  * Field : BNA Interrupt mask - bnaintrmsk
28429  *
28430  * This bit is valid only when Scatter/Gather DMA mode is enabled.
28431  *
28432  * Field Enumeration Values:
28433  *
28434  * Enum | Value | Description
28435  * :------------------------------------------|:------|:------------
28436  * ALT_USB_HOST_HCINTMSK6_BNAINTRMSK_E_MSK | 0x0 | Mask
28437  * ALT_USB_HOST_HCINTMSK6_BNAINTRMSK_E_NOMSK | 0x1 | No mask
28438  *
28439  * Field Access Macros:
28440  *
28441  */
28442 /*
28443  * Enumerated value for register field ALT_USB_HOST_HCINTMSK6_BNAINTRMSK
28444  *
28445  * Mask
28446  */
28447 #define ALT_USB_HOST_HCINTMSK6_BNAINTRMSK_E_MSK 0x0
28448 /*
28449  * Enumerated value for register field ALT_USB_HOST_HCINTMSK6_BNAINTRMSK
28450  *
28451  * No mask
28452  */
28453 #define ALT_USB_HOST_HCINTMSK6_BNAINTRMSK_E_NOMSK 0x1
28454 
28455 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK6_BNAINTRMSK register field. */
28456 #define ALT_USB_HOST_HCINTMSK6_BNAINTRMSK_LSB 11
28457 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK6_BNAINTRMSK register field. */
28458 #define ALT_USB_HOST_HCINTMSK6_BNAINTRMSK_MSB 11
28459 /* The width in bits of the ALT_USB_HOST_HCINTMSK6_BNAINTRMSK register field. */
28460 #define ALT_USB_HOST_HCINTMSK6_BNAINTRMSK_WIDTH 1
28461 /* The mask used to set the ALT_USB_HOST_HCINTMSK6_BNAINTRMSK register field value. */
28462 #define ALT_USB_HOST_HCINTMSK6_BNAINTRMSK_SET_MSK 0x00000800
28463 /* The mask used to clear the ALT_USB_HOST_HCINTMSK6_BNAINTRMSK register field value. */
28464 #define ALT_USB_HOST_HCINTMSK6_BNAINTRMSK_CLR_MSK 0xfffff7ff
28465 /* The reset value of the ALT_USB_HOST_HCINTMSK6_BNAINTRMSK register field. */
28466 #define ALT_USB_HOST_HCINTMSK6_BNAINTRMSK_RESET 0x0
28467 /* Extracts the ALT_USB_HOST_HCINTMSK6_BNAINTRMSK field value from a register. */
28468 #define ALT_USB_HOST_HCINTMSK6_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
28469 /* Produces a ALT_USB_HOST_HCINTMSK6_BNAINTRMSK register field value suitable for setting the register. */
28470 #define ALT_USB_HOST_HCINTMSK6_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
28471 
28472 /*
28473  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
28474  *
28475  * This bit is valid only when Scatter/Gather DMA mode is enabled.
28476  *
28477  * Field Enumeration Values:
28478  *
28479  * Enum | Value | Description
28480  * :---------------------------------------------------|:------|:------------
28481  * ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
28482  * ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
28483  *
28484  * Field Access Macros:
28485  *
28486  */
28487 /*
28488  * Enumerated value for register field ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK
28489  *
28490  * Mask
28491  */
28492 #define ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK_E_MSK 0x0
28493 /*
28494  * Enumerated value for register field ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK
28495  *
28496  * No mask
28497  */
28498 #define ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
28499 
28500 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK register field. */
28501 #define ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK_LSB 13
28502 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK register field. */
28503 #define ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK_MSB 13
28504 /* The width in bits of the ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK register field. */
28505 #define ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK_WIDTH 1
28506 /* The mask used to set the ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK register field value. */
28507 #define ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
28508 /* The mask used to clear the ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK register field value. */
28509 #define ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
28510 /* The reset value of the ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK register field. */
28511 #define ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK_RESET 0x0
28512 /* Extracts the ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK field value from a register. */
28513 #define ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
28514 /* Produces a ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
28515 #define ALT_USB_HOST_HCINTMSK6_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
28516 
28517 #ifndef __ASSEMBLY__
28518 /*
28519  * WARNING: The C register and register group struct declarations are provided for
28520  * convenience and illustrative purposes. They should, however, be used with
28521  * caution as the C language standard provides no guarantees about the alignment or
28522  * atomicity of device memory accesses. The recommended practice for writing
28523  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
28524  * alt_write_word() functions.
28525  *
28526  * The struct declaration for register ALT_USB_HOST_HCINTMSK6.
28527  */
28528 struct ALT_USB_HOST_HCINTMSK6_s
28529 {
28530  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
28531  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
28532  uint32_t ahberrmsk : 1; /* AHB Error Mask */
28533  uint32_t : 8; /* *UNDEFINED* */
28534  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
28535  uint32_t : 1; /* *UNDEFINED* */
28536  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
28537  uint32_t : 18; /* *UNDEFINED* */
28538 };
28539 
28540 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK6. */
28541 typedef volatile struct ALT_USB_HOST_HCINTMSK6_s ALT_USB_HOST_HCINTMSK6_t;
28542 #endif /* __ASSEMBLY__ */
28543 
28544 /* The byte offset of the ALT_USB_HOST_HCINTMSK6 register from the beginning of the component. */
28545 #define ALT_USB_HOST_HCINTMSK6_OFST 0x1cc
28546 /* The address of the ALT_USB_HOST_HCINTMSK6 register. */
28547 #define ALT_USB_HOST_HCINTMSK6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK6_OFST))
28548 
28549 /*
28550  * Register : Host Channel 6 Transfer Size Register - hctsiz6
28551  *
28552  * Buffer DMA Mode
28553  *
28554  * Register Layout
28555  *
28556  * Bits | Access | Reset | Description
28557  * :--------|:-------|:------|:--------------
28558  * [18:0] | RW | 0x0 | Transfer Size
28559  * [28:19] | RW | 0x0 | Packet Count
28560  * [30:29] | RW | 0x0 | PID
28561  * [31] | RW | 0x0 | Do Ping
28562  *
28563  */
28564 /*
28565  * Field : Transfer Size - xfersize
28566  *
28567  * for an OUT, this field is the number of data bytes the host sends during the
28568  * transfer. for an IN, this field is the buffer size that the application has
28569  * Reserved for the transfer. The application is expected to program this field as
28570  * an integer multiple of the maximum packet size for IN transactions (periodic and
28571  * non-periodic).The width of this counter is specified as 19 bits.
28572  *
28573  * Field Access Macros:
28574  *
28575  */
28576 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ6_XFERSIZE register field. */
28577 #define ALT_USB_HOST_HCTSIZ6_XFERSIZE_LSB 0
28578 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ6_XFERSIZE register field. */
28579 #define ALT_USB_HOST_HCTSIZ6_XFERSIZE_MSB 18
28580 /* The width in bits of the ALT_USB_HOST_HCTSIZ6_XFERSIZE register field. */
28581 #define ALT_USB_HOST_HCTSIZ6_XFERSIZE_WIDTH 19
28582 /* The mask used to set the ALT_USB_HOST_HCTSIZ6_XFERSIZE register field value. */
28583 #define ALT_USB_HOST_HCTSIZ6_XFERSIZE_SET_MSK 0x0007ffff
28584 /* The mask used to clear the ALT_USB_HOST_HCTSIZ6_XFERSIZE register field value. */
28585 #define ALT_USB_HOST_HCTSIZ6_XFERSIZE_CLR_MSK 0xfff80000
28586 /* The reset value of the ALT_USB_HOST_HCTSIZ6_XFERSIZE register field. */
28587 #define ALT_USB_HOST_HCTSIZ6_XFERSIZE_RESET 0x0
28588 /* Extracts the ALT_USB_HOST_HCTSIZ6_XFERSIZE field value from a register. */
28589 #define ALT_USB_HOST_HCTSIZ6_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
28590 /* Produces a ALT_USB_HOST_HCTSIZ6_XFERSIZE register field value suitable for setting the register. */
28591 #define ALT_USB_HOST_HCTSIZ6_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
28592 
28593 /*
28594  * Field : Packet Count - pktcnt
28595  *
28596  * This field is programmed by the application with the expected number of packets
28597  * to be transmitted (OUT) or received (IN). The host decrements this count on
28598  * every successful transmission or reception of an OUT/IN packet. Once this count
28599  * reaches zero, the application is interrupted to indicate normal completion. The
28600  * width of this counter is specified as 10 bits.
28601  *
28602  * Field Access Macros:
28603  *
28604  */
28605 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ6_PKTCNT register field. */
28606 #define ALT_USB_HOST_HCTSIZ6_PKTCNT_LSB 19
28607 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ6_PKTCNT register field. */
28608 #define ALT_USB_HOST_HCTSIZ6_PKTCNT_MSB 28
28609 /* The width in bits of the ALT_USB_HOST_HCTSIZ6_PKTCNT register field. */
28610 #define ALT_USB_HOST_HCTSIZ6_PKTCNT_WIDTH 10
28611 /* The mask used to set the ALT_USB_HOST_HCTSIZ6_PKTCNT register field value. */
28612 #define ALT_USB_HOST_HCTSIZ6_PKTCNT_SET_MSK 0x1ff80000
28613 /* The mask used to clear the ALT_USB_HOST_HCTSIZ6_PKTCNT register field value. */
28614 #define ALT_USB_HOST_HCTSIZ6_PKTCNT_CLR_MSK 0xe007ffff
28615 /* The reset value of the ALT_USB_HOST_HCTSIZ6_PKTCNT register field. */
28616 #define ALT_USB_HOST_HCTSIZ6_PKTCNT_RESET 0x0
28617 /* Extracts the ALT_USB_HOST_HCTSIZ6_PKTCNT field value from a register. */
28618 #define ALT_USB_HOST_HCTSIZ6_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
28619 /* Produces a ALT_USB_HOST_HCTSIZ6_PKTCNT register field value suitable for setting the register. */
28620 #define ALT_USB_HOST_HCTSIZ6_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
28621 
28622 /*
28623  * Field : PID - pid
28624  *
28625  * The application programs this field with the type of PID to use forthe initial
28626  * transaction. The host maintains this field for the rest of the transfer.
28627  *
28628  * Field Enumeration Values:
28629  *
28630  * Enum | Value | Description
28631  * :---------------------------------|:------|:------------------------------------
28632  * ALT_USB_HOST_HCTSIZ6_PID_E_DATA0 | 0x0 | DATA0
28633  * ALT_USB_HOST_HCTSIZ6_PID_E_DATA2 | 0x1 | DATA2
28634  * ALT_USB_HOST_HCTSIZ6_PID_E_DATA1 | 0x2 | DATA1
28635  * ALT_USB_HOST_HCTSIZ6_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
28636  *
28637  * Field Access Macros:
28638  *
28639  */
28640 /*
28641  * Enumerated value for register field ALT_USB_HOST_HCTSIZ6_PID
28642  *
28643  * DATA0
28644  */
28645 #define ALT_USB_HOST_HCTSIZ6_PID_E_DATA0 0x0
28646 /*
28647  * Enumerated value for register field ALT_USB_HOST_HCTSIZ6_PID
28648  *
28649  * DATA2
28650  */
28651 #define ALT_USB_HOST_HCTSIZ6_PID_E_DATA2 0x1
28652 /*
28653  * Enumerated value for register field ALT_USB_HOST_HCTSIZ6_PID
28654  *
28655  * DATA1
28656  */
28657 #define ALT_USB_HOST_HCTSIZ6_PID_E_DATA1 0x2
28658 /*
28659  * Enumerated value for register field ALT_USB_HOST_HCTSIZ6_PID
28660  *
28661  * MDATA (non-control)/SETUP (control)
28662  */
28663 #define ALT_USB_HOST_HCTSIZ6_PID_E_MDATA 0x3
28664 
28665 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ6_PID register field. */
28666 #define ALT_USB_HOST_HCTSIZ6_PID_LSB 29
28667 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ6_PID register field. */
28668 #define ALT_USB_HOST_HCTSIZ6_PID_MSB 30
28669 /* The width in bits of the ALT_USB_HOST_HCTSIZ6_PID register field. */
28670 #define ALT_USB_HOST_HCTSIZ6_PID_WIDTH 2
28671 /* The mask used to set the ALT_USB_HOST_HCTSIZ6_PID register field value. */
28672 #define ALT_USB_HOST_HCTSIZ6_PID_SET_MSK 0x60000000
28673 /* The mask used to clear the ALT_USB_HOST_HCTSIZ6_PID register field value. */
28674 #define ALT_USB_HOST_HCTSIZ6_PID_CLR_MSK 0x9fffffff
28675 /* The reset value of the ALT_USB_HOST_HCTSIZ6_PID register field. */
28676 #define ALT_USB_HOST_HCTSIZ6_PID_RESET 0x0
28677 /* Extracts the ALT_USB_HOST_HCTSIZ6_PID field value from a register. */
28678 #define ALT_USB_HOST_HCTSIZ6_PID_GET(value) (((value) & 0x60000000) >> 29)
28679 /* Produces a ALT_USB_HOST_HCTSIZ6_PID register field value suitable for setting the register. */
28680 #define ALT_USB_HOST_HCTSIZ6_PID_SET(value) (((value) << 29) & 0x60000000)
28681 
28682 /*
28683  * Field : Do Ping - dopng
28684  *
28685  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
28686  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
28687  * for IN transfers it disables the channel.
28688  *
28689  * Field Enumeration Values:
28690  *
28691  * Enum | Value | Description
28692  * :------------------------------------|:------|:-----------------
28693  * ALT_USB_HOST_HCTSIZ6_DOPNG_E_NOPING | 0x0 | No ping protocol
28694  * ALT_USB_HOST_HCTSIZ6_DOPNG_E_PING | 0x1 | Ping protocol
28695  *
28696  * Field Access Macros:
28697  *
28698  */
28699 /*
28700  * Enumerated value for register field ALT_USB_HOST_HCTSIZ6_DOPNG
28701  *
28702  * No ping protocol
28703  */
28704 #define ALT_USB_HOST_HCTSIZ6_DOPNG_E_NOPING 0x0
28705 /*
28706  * Enumerated value for register field ALT_USB_HOST_HCTSIZ6_DOPNG
28707  *
28708  * Ping protocol
28709  */
28710 #define ALT_USB_HOST_HCTSIZ6_DOPNG_E_PING 0x1
28711 
28712 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ6_DOPNG register field. */
28713 #define ALT_USB_HOST_HCTSIZ6_DOPNG_LSB 31
28714 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ6_DOPNG register field. */
28715 #define ALT_USB_HOST_HCTSIZ6_DOPNG_MSB 31
28716 /* The width in bits of the ALT_USB_HOST_HCTSIZ6_DOPNG register field. */
28717 #define ALT_USB_HOST_HCTSIZ6_DOPNG_WIDTH 1
28718 /* The mask used to set the ALT_USB_HOST_HCTSIZ6_DOPNG register field value. */
28719 #define ALT_USB_HOST_HCTSIZ6_DOPNG_SET_MSK 0x80000000
28720 /* The mask used to clear the ALT_USB_HOST_HCTSIZ6_DOPNG register field value. */
28721 #define ALT_USB_HOST_HCTSIZ6_DOPNG_CLR_MSK 0x7fffffff
28722 /* The reset value of the ALT_USB_HOST_HCTSIZ6_DOPNG register field. */
28723 #define ALT_USB_HOST_HCTSIZ6_DOPNG_RESET 0x0
28724 /* Extracts the ALT_USB_HOST_HCTSIZ6_DOPNG field value from a register. */
28725 #define ALT_USB_HOST_HCTSIZ6_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
28726 /* Produces a ALT_USB_HOST_HCTSIZ6_DOPNG register field value suitable for setting the register. */
28727 #define ALT_USB_HOST_HCTSIZ6_DOPNG_SET(value) (((value) << 31) & 0x80000000)
28728 
28729 #ifndef __ASSEMBLY__
28730 /*
28731  * WARNING: The C register and register group struct declarations are provided for
28732  * convenience and illustrative purposes. They should, however, be used with
28733  * caution as the C language standard provides no guarantees about the alignment or
28734  * atomicity of device memory accesses. The recommended practice for writing
28735  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
28736  * alt_write_word() functions.
28737  *
28738  * The struct declaration for register ALT_USB_HOST_HCTSIZ6.
28739  */
28740 struct ALT_USB_HOST_HCTSIZ6_s
28741 {
28742  uint32_t xfersize : 19; /* Transfer Size */
28743  uint32_t pktcnt : 10; /* Packet Count */
28744  uint32_t pid : 2; /* PID */
28745  uint32_t dopng : 1; /* Do Ping */
28746 };
28747 
28748 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ6. */
28749 typedef volatile struct ALT_USB_HOST_HCTSIZ6_s ALT_USB_HOST_HCTSIZ6_t;
28750 #endif /* __ASSEMBLY__ */
28751 
28752 /* The byte offset of the ALT_USB_HOST_HCTSIZ6 register from the beginning of the component. */
28753 #define ALT_USB_HOST_HCTSIZ6_OFST 0x1d0
28754 /* The address of the ALT_USB_HOST_HCTSIZ6 register. */
28755 #define ALT_USB_HOST_HCTSIZ6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ6_OFST))
28756 
28757 /*
28758  * Register : Host Channel DMA Address Registe - hcdma6
28759  *
28760  * This register is used by the OTG host in the internal DMA mode to maintain the
28761  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
28762  * DWORD-aligned.
28763  *
28764  * Register Layout
28765  *
28766  * Bits | Access | Reset | Description
28767  * :-------|:-------|:------|:------------
28768  * [31:0] | RW | 0x0 | DMA Address
28769  *
28770  */
28771 /*
28772  * Field : DMA Address - hcdma6
28773  *
28774  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
28775  * first descriptor in the list should be located in this address. The first
28776  * descriptor may be or may not be ready. The core starts processing the list from
28777  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
28778  * in which the isochronous descriptors are present where N is based on nTD as per
28779  * Table below
28780  *
28781  * [31:N] Base Address [N-1:3] Offset [2:0] 000
28782  *
28783  * HS ISOC FS ISOC
28784  *
28785  * nTD N nTD N
28786  *
28787  * 7 6 1 4
28788  *
28789  * 15 7 3 5
28790  *
28791  * 31 8 7 6
28792  *
28793  * 63 9 15 7
28794  *
28795  * 127 10 31 8
28796  *
28797  * 255 11 63 9
28798  *
28799  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
28800  * This value is in terms of number of descriptors. The values can be from 0 to 63.
28801  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
28802  * descriptor processed in the list. This field is updated both by application and
28803  * the core. for example, if the application enables the channel after programming
28804  * CTD=5, then the core will start processing the 6th descriptor. The address is
28805  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
28806  * CTD for isochronous is based on the current frame/microframe value. Need to be
28807  * set to zero by application.
28808  *
28809  * Field Access Macros:
28810  *
28811  */
28812 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA6_HCDMA6 register field. */
28813 #define ALT_USB_HOST_HCDMA6_HCDMA6_LSB 0
28814 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA6_HCDMA6 register field. */
28815 #define ALT_USB_HOST_HCDMA6_HCDMA6_MSB 31
28816 /* The width in bits of the ALT_USB_HOST_HCDMA6_HCDMA6 register field. */
28817 #define ALT_USB_HOST_HCDMA6_HCDMA6_WIDTH 32
28818 /* The mask used to set the ALT_USB_HOST_HCDMA6_HCDMA6 register field value. */
28819 #define ALT_USB_HOST_HCDMA6_HCDMA6_SET_MSK 0xffffffff
28820 /* The mask used to clear the ALT_USB_HOST_HCDMA6_HCDMA6 register field value. */
28821 #define ALT_USB_HOST_HCDMA6_HCDMA6_CLR_MSK 0x00000000
28822 /* The reset value of the ALT_USB_HOST_HCDMA6_HCDMA6 register field. */
28823 #define ALT_USB_HOST_HCDMA6_HCDMA6_RESET 0x0
28824 /* Extracts the ALT_USB_HOST_HCDMA6_HCDMA6 field value from a register. */
28825 #define ALT_USB_HOST_HCDMA6_HCDMA6_GET(value) (((value) & 0xffffffff) >> 0)
28826 /* Produces a ALT_USB_HOST_HCDMA6_HCDMA6 register field value suitable for setting the register. */
28827 #define ALT_USB_HOST_HCDMA6_HCDMA6_SET(value) (((value) << 0) & 0xffffffff)
28828 
28829 #ifndef __ASSEMBLY__
28830 /*
28831  * WARNING: The C register and register group struct declarations are provided for
28832  * convenience and illustrative purposes. They should, however, be used with
28833  * caution as the C language standard provides no guarantees about the alignment or
28834  * atomicity of device memory accesses. The recommended practice for writing
28835  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
28836  * alt_write_word() functions.
28837  *
28838  * The struct declaration for register ALT_USB_HOST_HCDMA6.
28839  */
28840 struct ALT_USB_HOST_HCDMA6_s
28841 {
28842  uint32_t hcdma6 : 32; /* DMA Address */
28843 };
28844 
28845 /* The typedef declaration for register ALT_USB_HOST_HCDMA6. */
28846 typedef volatile struct ALT_USB_HOST_HCDMA6_s ALT_USB_HOST_HCDMA6_t;
28847 #endif /* __ASSEMBLY__ */
28848 
28849 /* The byte offset of the ALT_USB_HOST_HCDMA6 register from the beginning of the component. */
28850 #define ALT_USB_HOST_HCDMA6_OFST 0x1d4
28851 /* The address of the ALT_USB_HOST_HCDMA6 register. */
28852 #define ALT_USB_HOST_HCDMA6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA6_OFST))
28853 
28854 /*
28855  * Register : Host Channel 6 DMA Buffer Address Register - hcdmab6
28856  *
28857  * These registers are present only in case of Scatter/Gather DMA. These
28858  * registers are implemented in RAM instead of flop-based implementation. Holds
28859  * the current buffer address. This register is updated as and when the
28860  * data transfer for the corresponding end point is in progress. This
28861  * register is present only in Scatter/Gather DMA mode. Otherwise this field
28862  * is reserved.
28863  *
28864  * Register Layout
28865  *
28866  * Bits | Access | Reset | Description
28867  * :-------|:-------|:------|:----------------------------------
28868  * [31:0] | RW | 0x0 | Host Channel 6 DMA Buffer Address
28869  *
28870  */
28871 /*
28872  * Field : Host Channel 6 DMA Buffer Address - hcdmab6
28873  *
28874  * These registers are present only in case of Scatter/Gather DMA. These
28875  * registers are implemented in RAM instead of flop-based implementation. Holds
28876  * the current buffer address. This register is updated as and when the data
28877  * transfer for the corresponding end point is in progress. This register is
28878  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
28879  *
28880  * Field Access Macros:
28881  *
28882  */
28883 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB6_HCDMAB6 register field. */
28884 #define ALT_USB_HOST_HCDMAB6_HCDMAB6_LSB 0
28885 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB6_HCDMAB6 register field. */
28886 #define ALT_USB_HOST_HCDMAB6_HCDMAB6_MSB 31
28887 /* The width in bits of the ALT_USB_HOST_HCDMAB6_HCDMAB6 register field. */
28888 #define ALT_USB_HOST_HCDMAB6_HCDMAB6_WIDTH 32
28889 /* The mask used to set the ALT_USB_HOST_HCDMAB6_HCDMAB6 register field value. */
28890 #define ALT_USB_HOST_HCDMAB6_HCDMAB6_SET_MSK 0xffffffff
28891 /* The mask used to clear the ALT_USB_HOST_HCDMAB6_HCDMAB6 register field value. */
28892 #define ALT_USB_HOST_HCDMAB6_HCDMAB6_CLR_MSK 0x00000000
28893 /* The reset value of the ALT_USB_HOST_HCDMAB6_HCDMAB6 register field. */
28894 #define ALT_USB_HOST_HCDMAB6_HCDMAB6_RESET 0x0
28895 /* Extracts the ALT_USB_HOST_HCDMAB6_HCDMAB6 field value from a register. */
28896 #define ALT_USB_HOST_HCDMAB6_HCDMAB6_GET(value) (((value) & 0xffffffff) >> 0)
28897 /* Produces a ALT_USB_HOST_HCDMAB6_HCDMAB6 register field value suitable for setting the register. */
28898 #define ALT_USB_HOST_HCDMAB6_HCDMAB6_SET(value) (((value) << 0) & 0xffffffff)
28899 
28900 #ifndef __ASSEMBLY__
28901 /*
28902  * WARNING: The C register and register group struct declarations are provided for
28903  * convenience and illustrative purposes. They should, however, be used with
28904  * caution as the C language standard provides no guarantees about the alignment or
28905  * atomicity of device memory accesses. The recommended practice for writing
28906  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
28907  * alt_write_word() functions.
28908  *
28909  * The struct declaration for register ALT_USB_HOST_HCDMAB6.
28910  */
28911 struct ALT_USB_HOST_HCDMAB6_s
28912 {
28913  uint32_t hcdmab6 : 32; /* Host Channel 6 DMA Buffer Address */
28914 };
28915 
28916 /* The typedef declaration for register ALT_USB_HOST_HCDMAB6. */
28917 typedef volatile struct ALT_USB_HOST_HCDMAB6_s ALT_USB_HOST_HCDMAB6_t;
28918 #endif /* __ASSEMBLY__ */
28919 
28920 /* The byte offset of the ALT_USB_HOST_HCDMAB6 register from the beginning of the component. */
28921 #define ALT_USB_HOST_HCDMAB6_OFST 0x1d8
28922 /* The address of the ALT_USB_HOST_HCDMAB6 register. */
28923 #define ALT_USB_HOST_HCDMAB6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB6_OFST))
28924 
28925 /*
28926  * Register : Host Channel 7 Characteristics Register - hcchar7
28927  *
28928  * Host Channel 7 Characteristics Register
28929  *
28930  * Register Layout
28931  *
28932  * Bits | Access | Reset | Description
28933  * :--------|:-------|:------|:--------------------
28934  * [10:0] | RW | 0x0 | Maximum Packet Size
28935  * [14:11] | RW | 0x0 | Endpoint Number
28936  * [15] | RW | 0x0 | Endpoint Direction
28937  * [16] | ??? | 0x0 | *UNDEFINED*
28938  * [17] | RW | 0x0 | Low-Speed Device
28939  * [19:18] | RW | 0x0 | Endpoint Type
28940  * [21:20] | RW | 0x0 | Multi Count
28941  * [28:22] | RW | 0x0 | Device Address
28942  * [29] | ??? | 0x0 | *UNDEFINED*
28943  * [30] | R | 0x0 | Channel Disable
28944  * [31] | R | 0x0 | Channel Enable
28945  *
28946  */
28947 /*
28948  * Field : Maximum Packet Size - mps
28949  *
28950  * Indicates the maximum packet size of the associated endpoint.
28951  *
28952  * Field Access Macros:
28953  *
28954  */
28955 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR7_MPS register field. */
28956 #define ALT_USB_HOST_HCCHAR7_MPS_LSB 0
28957 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR7_MPS register field. */
28958 #define ALT_USB_HOST_HCCHAR7_MPS_MSB 10
28959 /* The width in bits of the ALT_USB_HOST_HCCHAR7_MPS register field. */
28960 #define ALT_USB_HOST_HCCHAR7_MPS_WIDTH 11
28961 /* The mask used to set the ALT_USB_HOST_HCCHAR7_MPS register field value. */
28962 #define ALT_USB_HOST_HCCHAR7_MPS_SET_MSK 0x000007ff
28963 /* The mask used to clear the ALT_USB_HOST_HCCHAR7_MPS register field value. */
28964 #define ALT_USB_HOST_HCCHAR7_MPS_CLR_MSK 0xfffff800
28965 /* The reset value of the ALT_USB_HOST_HCCHAR7_MPS register field. */
28966 #define ALT_USB_HOST_HCCHAR7_MPS_RESET 0x0
28967 /* Extracts the ALT_USB_HOST_HCCHAR7_MPS field value from a register. */
28968 #define ALT_USB_HOST_HCCHAR7_MPS_GET(value) (((value) & 0x000007ff) >> 0)
28969 /* Produces a ALT_USB_HOST_HCCHAR7_MPS register field value suitable for setting the register. */
28970 #define ALT_USB_HOST_HCCHAR7_MPS_SET(value) (((value) << 0) & 0x000007ff)
28971 
28972 /*
28973  * Field : Endpoint Number - epnum
28974  *
28975  * Indicates the endpoint number on the device serving as the data source or sink.
28976  *
28977  * Field Enumeration Values:
28978  *
28979  * Enum | Value | Description
28980  * :-------------------------------------|:------|:--------------
28981  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT0 | 0x0 | End point 0
28982  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT1 | 0x1 | End point 1
28983  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT2 | 0x2 | End point 2
28984  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT3 | 0x3 | End point 3
28985  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT4 | 0x4 | End point 4
28986  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT5 | 0x5 | End point 5
28987  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT6 | 0x6 | End point 6
28988  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT7 | 0x7 | End point 7
28989  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT8 | 0x8 | End point 8
28990  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT9 | 0x9 | End point 9
28991  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT10 | 0xa | End point 10
28992  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT11 | 0xb | End point 11
28993  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT12 | 0xc | End point 12
28994  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT13 | 0xd | End point 13
28995  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT14 | 0xe | End point 14
28996  * ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT15 | 0xf | End point 15
28997  *
28998  * Field Access Macros:
28999  *
29000  */
29001 /*
29002  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29003  *
29004  * End point 0
29005  */
29006 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT0 0x0
29007 /*
29008  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29009  *
29010  * End point 1
29011  */
29012 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT1 0x1
29013 /*
29014  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29015  *
29016  * End point 2
29017  */
29018 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT2 0x2
29019 /*
29020  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29021  *
29022  * End point 3
29023  */
29024 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT3 0x3
29025 /*
29026  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29027  *
29028  * End point 4
29029  */
29030 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT4 0x4
29031 /*
29032  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29033  *
29034  * End point 5
29035  */
29036 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT5 0x5
29037 /*
29038  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29039  *
29040  * End point 6
29041  */
29042 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT6 0x6
29043 /*
29044  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29045  *
29046  * End point 7
29047  */
29048 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT7 0x7
29049 /*
29050  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29051  *
29052  * End point 8
29053  */
29054 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT8 0x8
29055 /*
29056  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29057  *
29058  * End point 9
29059  */
29060 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT9 0x9
29061 /*
29062  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29063  *
29064  * End point 10
29065  */
29066 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT10 0xa
29067 /*
29068  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29069  *
29070  * End point 11
29071  */
29072 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT11 0xb
29073 /*
29074  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29075  *
29076  * End point 12
29077  */
29078 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT12 0xc
29079 /*
29080  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29081  *
29082  * End point 13
29083  */
29084 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT13 0xd
29085 /*
29086  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29087  *
29088  * End point 14
29089  */
29090 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT14 0xe
29091 /*
29092  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPNUM
29093  *
29094  * End point 15
29095  */
29096 #define ALT_USB_HOST_HCCHAR7_EPNUM_E_ENDPT15 0xf
29097 
29098 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR7_EPNUM register field. */
29099 #define ALT_USB_HOST_HCCHAR7_EPNUM_LSB 11
29100 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR7_EPNUM register field. */
29101 #define ALT_USB_HOST_HCCHAR7_EPNUM_MSB 14
29102 /* The width in bits of the ALT_USB_HOST_HCCHAR7_EPNUM register field. */
29103 #define ALT_USB_HOST_HCCHAR7_EPNUM_WIDTH 4
29104 /* The mask used to set the ALT_USB_HOST_HCCHAR7_EPNUM register field value. */
29105 #define ALT_USB_HOST_HCCHAR7_EPNUM_SET_MSK 0x00007800
29106 /* The mask used to clear the ALT_USB_HOST_HCCHAR7_EPNUM register field value. */
29107 #define ALT_USB_HOST_HCCHAR7_EPNUM_CLR_MSK 0xffff87ff
29108 /* The reset value of the ALT_USB_HOST_HCCHAR7_EPNUM register field. */
29109 #define ALT_USB_HOST_HCCHAR7_EPNUM_RESET 0x0
29110 /* Extracts the ALT_USB_HOST_HCCHAR7_EPNUM field value from a register. */
29111 #define ALT_USB_HOST_HCCHAR7_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
29112 /* Produces a ALT_USB_HOST_HCCHAR7_EPNUM register field value suitable for setting the register. */
29113 #define ALT_USB_HOST_HCCHAR7_EPNUM_SET(value) (((value) << 11) & 0x00007800)
29114 
29115 /*
29116  * Field : Endpoint Direction - epdir
29117  *
29118  * Indicates whether the transaction is IN or OUT.
29119  *
29120  * Field Enumeration Values:
29121  *
29122  * Enum | Value | Description
29123  * :---------------------------------|:------|:--------------
29124  * ALT_USB_HOST_HCCHAR7_EPDIR_E_OUT | 0x0 | OUT Direction
29125  * ALT_USB_HOST_HCCHAR7_EPDIR_E_IN | 0x1 | IN Direction
29126  *
29127  * Field Access Macros:
29128  *
29129  */
29130 /*
29131  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPDIR
29132  *
29133  * OUT Direction
29134  */
29135 #define ALT_USB_HOST_HCCHAR7_EPDIR_E_OUT 0x0
29136 /*
29137  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPDIR
29138  *
29139  * IN Direction
29140  */
29141 #define ALT_USB_HOST_HCCHAR7_EPDIR_E_IN 0x1
29142 
29143 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR7_EPDIR register field. */
29144 #define ALT_USB_HOST_HCCHAR7_EPDIR_LSB 15
29145 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR7_EPDIR register field. */
29146 #define ALT_USB_HOST_HCCHAR7_EPDIR_MSB 15
29147 /* The width in bits of the ALT_USB_HOST_HCCHAR7_EPDIR register field. */
29148 #define ALT_USB_HOST_HCCHAR7_EPDIR_WIDTH 1
29149 /* The mask used to set the ALT_USB_HOST_HCCHAR7_EPDIR register field value. */
29150 #define ALT_USB_HOST_HCCHAR7_EPDIR_SET_MSK 0x00008000
29151 /* The mask used to clear the ALT_USB_HOST_HCCHAR7_EPDIR register field value. */
29152 #define ALT_USB_HOST_HCCHAR7_EPDIR_CLR_MSK 0xffff7fff
29153 /* The reset value of the ALT_USB_HOST_HCCHAR7_EPDIR register field. */
29154 #define ALT_USB_HOST_HCCHAR7_EPDIR_RESET 0x0
29155 /* Extracts the ALT_USB_HOST_HCCHAR7_EPDIR field value from a register. */
29156 #define ALT_USB_HOST_HCCHAR7_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
29157 /* Produces a ALT_USB_HOST_HCCHAR7_EPDIR register field value suitable for setting the register. */
29158 #define ALT_USB_HOST_HCCHAR7_EPDIR_SET(value) (((value) << 15) & 0x00008000)
29159 
29160 /*
29161  * Field : Low-Speed Device - lspddev
29162  *
29163  * This field is set by the application to indicate that this channel is
29164  * communicating to a low-speed device. The application must program this bit when
29165  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
29166  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
29167  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
29168  * core ignores this bit even if it is set by the application software
29169  *
29170  * Field Enumeration Values:
29171  *
29172  * Enum | Value | Description
29173  * :------------------------------------|:------|:----------------------------------------
29174  * ALT_USB_HOST_HCCHAR7_LSPDDEV_E_DISD | 0x0 | Not Communicating with low speed device
29175  * ALT_USB_HOST_HCCHAR7_LSPDDEV_E_END | 0x1 | Communicating with low speed device
29176  *
29177  * Field Access Macros:
29178  *
29179  */
29180 /*
29181  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_LSPDDEV
29182  *
29183  * Not Communicating with low speed device
29184  */
29185 #define ALT_USB_HOST_HCCHAR7_LSPDDEV_E_DISD 0x0
29186 /*
29187  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_LSPDDEV
29188  *
29189  * Communicating with low speed device
29190  */
29191 #define ALT_USB_HOST_HCCHAR7_LSPDDEV_E_END 0x1
29192 
29193 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR7_LSPDDEV register field. */
29194 #define ALT_USB_HOST_HCCHAR7_LSPDDEV_LSB 17
29195 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR7_LSPDDEV register field. */
29196 #define ALT_USB_HOST_HCCHAR7_LSPDDEV_MSB 17
29197 /* The width in bits of the ALT_USB_HOST_HCCHAR7_LSPDDEV register field. */
29198 #define ALT_USB_HOST_HCCHAR7_LSPDDEV_WIDTH 1
29199 /* The mask used to set the ALT_USB_HOST_HCCHAR7_LSPDDEV register field value. */
29200 #define ALT_USB_HOST_HCCHAR7_LSPDDEV_SET_MSK 0x00020000
29201 /* The mask used to clear the ALT_USB_HOST_HCCHAR7_LSPDDEV register field value. */
29202 #define ALT_USB_HOST_HCCHAR7_LSPDDEV_CLR_MSK 0xfffdffff
29203 /* The reset value of the ALT_USB_HOST_HCCHAR7_LSPDDEV register field. */
29204 #define ALT_USB_HOST_HCCHAR7_LSPDDEV_RESET 0x0
29205 /* Extracts the ALT_USB_HOST_HCCHAR7_LSPDDEV field value from a register. */
29206 #define ALT_USB_HOST_HCCHAR7_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
29207 /* Produces a ALT_USB_HOST_HCCHAR7_LSPDDEV register field value suitable for setting the register. */
29208 #define ALT_USB_HOST_HCCHAR7_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
29209 
29210 /*
29211  * Field : Endpoint Type - eptype
29212  *
29213  * Indicates the transfer type selected.
29214  *
29215  * Field Enumeration Values:
29216  *
29217  * Enum | Value | Description
29218  * :-------------------------------------|:------|:------------
29219  * ALT_USB_HOST_HCCHAR7_EPTYPE_E_CTL | 0x0 | Control
29220  * ALT_USB_HOST_HCCHAR7_EPTYPE_E_ISOC | 0x1 | Isochronous
29221  * ALT_USB_HOST_HCCHAR7_EPTYPE_E_BULK | 0x2 | Bulk
29222  * ALT_USB_HOST_HCCHAR7_EPTYPE_E_INTERR | 0x3 | Interrupt
29223  *
29224  * Field Access Macros:
29225  *
29226  */
29227 /*
29228  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPTYPE
29229  *
29230  * Control
29231  */
29232 #define ALT_USB_HOST_HCCHAR7_EPTYPE_E_CTL 0x0
29233 /*
29234  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPTYPE
29235  *
29236  * Isochronous
29237  */
29238 #define ALT_USB_HOST_HCCHAR7_EPTYPE_E_ISOC 0x1
29239 /*
29240  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPTYPE
29241  *
29242  * Bulk
29243  */
29244 #define ALT_USB_HOST_HCCHAR7_EPTYPE_E_BULK 0x2
29245 /*
29246  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EPTYPE
29247  *
29248  * Interrupt
29249  */
29250 #define ALT_USB_HOST_HCCHAR7_EPTYPE_E_INTERR 0x3
29251 
29252 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR7_EPTYPE register field. */
29253 #define ALT_USB_HOST_HCCHAR7_EPTYPE_LSB 18
29254 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR7_EPTYPE register field. */
29255 #define ALT_USB_HOST_HCCHAR7_EPTYPE_MSB 19
29256 /* The width in bits of the ALT_USB_HOST_HCCHAR7_EPTYPE register field. */
29257 #define ALT_USB_HOST_HCCHAR7_EPTYPE_WIDTH 2
29258 /* The mask used to set the ALT_USB_HOST_HCCHAR7_EPTYPE register field value. */
29259 #define ALT_USB_HOST_HCCHAR7_EPTYPE_SET_MSK 0x000c0000
29260 /* The mask used to clear the ALT_USB_HOST_HCCHAR7_EPTYPE register field value. */
29261 #define ALT_USB_HOST_HCCHAR7_EPTYPE_CLR_MSK 0xfff3ffff
29262 /* The reset value of the ALT_USB_HOST_HCCHAR7_EPTYPE register field. */
29263 #define ALT_USB_HOST_HCCHAR7_EPTYPE_RESET 0x0
29264 /* Extracts the ALT_USB_HOST_HCCHAR7_EPTYPE field value from a register. */
29265 #define ALT_USB_HOST_HCCHAR7_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
29266 /* Produces a ALT_USB_HOST_HCCHAR7_EPTYPE register field value suitable for setting the register. */
29267 #define ALT_USB_HOST_HCCHAR7_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
29268 
29269 /*
29270  * Field : Multi Count - ec
29271  *
29272  * When the Split Enable bit of the Host Channel-n Split Control register
29273  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
29274  * transactions that must be executed per microframe for this periodic endpoint.
29275  * for non periodic transfers, this field is used only in DMA mode, and specifies
29276  * the number packets to be fetched for this channel before the internal DMA engine
29277  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
29278  * number of immediate retries to be performed for a periodic split transactions on
29279  * transaction errors. This field must be set to at least 1.
29280  *
29281  * Field Enumeration Values:
29282  *
29283  * Enum | Value | Description
29284  * :-------------------------------------|:------|:----------------------------------------------
29285  * ALT_USB_HOST_HCCHAR7_EC_E_RSVD | 0x0 | Reserved This field yields undefined result
29286  * ALT_USB_HOST_HCCHAR7_EC_E_TRANSONE | 0x1 | 1 transaction
29287  * ALT_USB_HOST_HCCHAR7_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
29288  * : | | per microframe
29289  * ALT_USB_HOST_HCCHAR7_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
29290  * : | | per microframe
29291  *
29292  * Field Access Macros:
29293  *
29294  */
29295 /*
29296  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EC
29297  *
29298  * Reserved This field yields undefined result
29299  */
29300 #define ALT_USB_HOST_HCCHAR7_EC_E_RSVD 0x0
29301 /*
29302  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EC
29303  *
29304  * 1 transaction
29305  */
29306 #define ALT_USB_HOST_HCCHAR7_EC_E_TRANSONE 0x1
29307 /*
29308  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EC
29309  *
29310  * 2 transactions to be issued for this endpoint per microframe
29311  */
29312 #define ALT_USB_HOST_HCCHAR7_EC_E_TRANSTWO 0x2
29313 /*
29314  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_EC
29315  *
29316  * 3 transactions to be issued for this endpoint per microframe
29317  */
29318 #define ALT_USB_HOST_HCCHAR7_EC_E_TRANSTHREE 0x3
29319 
29320 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR7_EC register field. */
29321 #define ALT_USB_HOST_HCCHAR7_EC_LSB 20
29322 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR7_EC register field. */
29323 #define ALT_USB_HOST_HCCHAR7_EC_MSB 21
29324 /* The width in bits of the ALT_USB_HOST_HCCHAR7_EC register field. */
29325 #define ALT_USB_HOST_HCCHAR7_EC_WIDTH 2
29326 /* The mask used to set the ALT_USB_HOST_HCCHAR7_EC register field value. */
29327 #define ALT_USB_HOST_HCCHAR7_EC_SET_MSK 0x00300000
29328 /* The mask used to clear the ALT_USB_HOST_HCCHAR7_EC register field value. */
29329 #define ALT_USB_HOST_HCCHAR7_EC_CLR_MSK 0xffcfffff
29330 /* The reset value of the ALT_USB_HOST_HCCHAR7_EC register field. */
29331 #define ALT_USB_HOST_HCCHAR7_EC_RESET 0x0
29332 /* Extracts the ALT_USB_HOST_HCCHAR7_EC field value from a register. */
29333 #define ALT_USB_HOST_HCCHAR7_EC_GET(value) (((value) & 0x00300000) >> 20)
29334 /* Produces a ALT_USB_HOST_HCCHAR7_EC register field value suitable for setting the register. */
29335 #define ALT_USB_HOST_HCCHAR7_EC_SET(value) (((value) << 20) & 0x00300000)
29336 
29337 /*
29338  * Field : Device Address - devaddr
29339  *
29340  * This field selects the specific device serving as the data source or sink.
29341  *
29342  * Field Access Macros:
29343  *
29344  */
29345 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR7_DEVADDR register field. */
29346 #define ALT_USB_HOST_HCCHAR7_DEVADDR_LSB 22
29347 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR7_DEVADDR register field. */
29348 #define ALT_USB_HOST_HCCHAR7_DEVADDR_MSB 28
29349 /* The width in bits of the ALT_USB_HOST_HCCHAR7_DEVADDR register field. */
29350 #define ALT_USB_HOST_HCCHAR7_DEVADDR_WIDTH 7
29351 /* The mask used to set the ALT_USB_HOST_HCCHAR7_DEVADDR register field value. */
29352 #define ALT_USB_HOST_HCCHAR7_DEVADDR_SET_MSK 0x1fc00000
29353 /* The mask used to clear the ALT_USB_HOST_HCCHAR7_DEVADDR register field value. */
29354 #define ALT_USB_HOST_HCCHAR7_DEVADDR_CLR_MSK 0xe03fffff
29355 /* The reset value of the ALT_USB_HOST_HCCHAR7_DEVADDR register field. */
29356 #define ALT_USB_HOST_HCCHAR7_DEVADDR_RESET 0x0
29357 /* Extracts the ALT_USB_HOST_HCCHAR7_DEVADDR field value from a register. */
29358 #define ALT_USB_HOST_HCCHAR7_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
29359 /* Produces a ALT_USB_HOST_HCCHAR7_DEVADDR register field value suitable for setting the register. */
29360 #define ALT_USB_HOST_HCCHAR7_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
29361 
29362 /*
29363  * Field : Channel Disable - chdis
29364  *
29365  * The application sets this bit to stop transmitting/receiving data on a channel,
29366  * even before the transfer for that channel is complete. The application must wait
29367  * for the Channel Disabled interrupt before treating the channel as disabled.
29368  *
29369  * Field Enumeration Values:
29370  *
29371  * Enum | Value | Description
29372  * :-----------------------------------|:------|:----------------------------
29373  * ALT_USB_HOST_HCCHAR7_CHDIS_E_INACT | 0x0 | Transmit/Recieve normal
29374  * ALT_USB_HOST_HCCHAR7_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving
29375  *
29376  * Field Access Macros:
29377  *
29378  */
29379 /*
29380  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_CHDIS
29381  *
29382  * Transmit/Recieve normal
29383  */
29384 #define ALT_USB_HOST_HCCHAR7_CHDIS_E_INACT 0x0
29385 /*
29386  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_CHDIS
29387  *
29388  * Stop transmitting/receiving
29389  */
29390 #define ALT_USB_HOST_HCCHAR7_CHDIS_E_ACT 0x1
29391 
29392 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR7_CHDIS register field. */
29393 #define ALT_USB_HOST_HCCHAR7_CHDIS_LSB 30
29394 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR7_CHDIS register field. */
29395 #define ALT_USB_HOST_HCCHAR7_CHDIS_MSB 30
29396 /* The width in bits of the ALT_USB_HOST_HCCHAR7_CHDIS register field. */
29397 #define ALT_USB_HOST_HCCHAR7_CHDIS_WIDTH 1
29398 /* The mask used to set the ALT_USB_HOST_HCCHAR7_CHDIS register field value. */
29399 #define ALT_USB_HOST_HCCHAR7_CHDIS_SET_MSK 0x40000000
29400 /* The mask used to clear the ALT_USB_HOST_HCCHAR7_CHDIS register field value. */
29401 #define ALT_USB_HOST_HCCHAR7_CHDIS_CLR_MSK 0xbfffffff
29402 /* The reset value of the ALT_USB_HOST_HCCHAR7_CHDIS register field. */
29403 #define ALT_USB_HOST_HCCHAR7_CHDIS_RESET 0x0
29404 /* Extracts the ALT_USB_HOST_HCCHAR7_CHDIS field value from a register. */
29405 #define ALT_USB_HOST_HCCHAR7_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
29406 /* Produces a ALT_USB_HOST_HCCHAR7_CHDIS register field value suitable for setting the register. */
29407 #define ALT_USB_HOST_HCCHAR7_CHDIS_SET(value) (((value) << 30) & 0x40000000)
29408 
29409 /*
29410  * Field : Channel Enable - chena
29411  *
29412  * When Scatter/Gather mode is disabled This field is set by the application and
29413  * cleared by the OTG host.
29414  *
29415  * 0: Channel disabled
29416  *
29417  * 1: Channel enabled
29418  *
29419  * When Scatter/Gather mode is enabled.
29420  *
29421  * Field Enumeration Values:
29422  *
29423  * Enum | Value | Description
29424  * :-----------------------------------|:------|:-------------------------------------------------
29425  * ALT_USB_HOST_HCCHAR7_CHENA_E_INACT | 0x0 | Indicates that the descriptor structure is not
29426  * : | | yet ready
29427  * ALT_USB_HOST_HCCHAR7_CHENA_E_ACT | 0x1 | Indicates that the descriptor structure and
29428  * : | | data buffer with data is setup and this
29429  * : | | channel can access the descriptor
29430  *
29431  * Field Access Macros:
29432  *
29433  */
29434 /*
29435  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_CHENA
29436  *
29437  * Indicates that the descriptor structure is not yet ready
29438  */
29439 #define ALT_USB_HOST_HCCHAR7_CHENA_E_INACT 0x0
29440 /*
29441  * Enumerated value for register field ALT_USB_HOST_HCCHAR7_CHENA
29442  *
29443  * Indicates that the descriptor structure and data buffer with data is
29444  * setup and this channel can access the descriptor
29445  */
29446 #define ALT_USB_HOST_HCCHAR7_CHENA_E_ACT 0x1
29447 
29448 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR7_CHENA register field. */
29449 #define ALT_USB_HOST_HCCHAR7_CHENA_LSB 31
29450 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR7_CHENA register field. */
29451 #define ALT_USB_HOST_HCCHAR7_CHENA_MSB 31
29452 /* The width in bits of the ALT_USB_HOST_HCCHAR7_CHENA register field. */
29453 #define ALT_USB_HOST_HCCHAR7_CHENA_WIDTH 1
29454 /* The mask used to set the ALT_USB_HOST_HCCHAR7_CHENA register field value. */
29455 #define ALT_USB_HOST_HCCHAR7_CHENA_SET_MSK 0x80000000
29456 /* The mask used to clear the ALT_USB_HOST_HCCHAR7_CHENA register field value. */
29457 #define ALT_USB_HOST_HCCHAR7_CHENA_CLR_MSK 0x7fffffff
29458 /* The reset value of the ALT_USB_HOST_HCCHAR7_CHENA register field. */
29459 #define ALT_USB_HOST_HCCHAR7_CHENA_RESET 0x0
29460 /* Extracts the ALT_USB_HOST_HCCHAR7_CHENA field value from a register. */
29461 #define ALT_USB_HOST_HCCHAR7_CHENA_GET(value) (((value) & 0x80000000) >> 31)
29462 /* Produces a ALT_USB_HOST_HCCHAR7_CHENA register field value suitable for setting the register. */
29463 #define ALT_USB_HOST_HCCHAR7_CHENA_SET(value) (((value) << 31) & 0x80000000)
29464 
29465 #ifndef __ASSEMBLY__
29466 /*
29467  * WARNING: The C register and register group struct declarations are provided for
29468  * convenience and illustrative purposes. They should, however, be used with
29469  * caution as the C language standard provides no guarantees about the alignment or
29470  * atomicity of device memory accesses. The recommended practice for writing
29471  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
29472  * alt_write_word() functions.
29473  *
29474  * The struct declaration for register ALT_USB_HOST_HCCHAR7.
29475  */
29476 struct ALT_USB_HOST_HCCHAR7_s
29477 {
29478  uint32_t mps : 11; /* Maximum Packet Size */
29479  uint32_t epnum : 4; /* Endpoint Number */
29480  uint32_t epdir : 1; /* Endpoint Direction */
29481  uint32_t : 1; /* *UNDEFINED* */
29482  uint32_t lspddev : 1; /* Low-Speed Device */
29483  uint32_t eptype : 2; /* Endpoint Type */
29484  uint32_t ec : 2; /* Multi Count */
29485  uint32_t devaddr : 7; /* Device Address */
29486  uint32_t : 1; /* *UNDEFINED* */
29487  const uint32_t chdis : 1; /* Channel Disable */
29488  const uint32_t chena : 1; /* Channel Enable */
29489 };
29490 
29491 /* The typedef declaration for register ALT_USB_HOST_HCCHAR7. */
29492 typedef volatile struct ALT_USB_HOST_HCCHAR7_s ALT_USB_HOST_HCCHAR7_t;
29493 #endif /* __ASSEMBLY__ */
29494 
29495 /* The byte offset of the ALT_USB_HOST_HCCHAR7 register from the beginning of the component. */
29496 #define ALT_USB_HOST_HCCHAR7_OFST 0x1e0
29497 /* The address of the ALT_USB_HOST_HCCHAR7 register. */
29498 #define ALT_USB_HOST_HCCHAR7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR7_OFST))
29499 
29500 /*
29501  * Register : Host Channel 7 Split Control Register - hcsplt7
29502  *
29503  * Channel_number 7
29504  *
29505  * Register Layout
29506  *
29507  * Bits | Access | Reset | Description
29508  * :--------|:-------|:------|:---------------------
29509  * [6:0] | RW | 0x0 | Port Address
29510  * [13:7] | RW | 0x0 | Hub Address
29511  * [15:14] | RW | 0x0 | Transaction Position
29512  * [16] | RW | 0x0 | Do Complete Split
29513  * [30:17] | ??? | 0x0 | *UNDEFINED*
29514  * [31] | RW | 0x0 | Split Enable
29515  *
29516  */
29517 /*
29518  * Field : Port Address - prtaddr
29519  *
29520  * This field is the port number of the recipient transactiontranslator.
29521  *
29522  * Field Access Macros:
29523  *
29524  */
29525 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT7_PRTADDR register field. */
29526 #define ALT_USB_HOST_HCSPLT7_PRTADDR_LSB 0
29527 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT7_PRTADDR register field. */
29528 #define ALT_USB_HOST_HCSPLT7_PRTADDR_MSB 6
29529 /* The width in bits of the ALT_USB_HOST_HCSPLT7_PRTADDR register field. */
29530 #define ALT_USB_HOST_HCSPLT7_PRTADDR_WIDTH 7
29531 /* The mask used to set the ALT_USB_HOST_HCSPLT7_PRTADDR register field value. */
29532 #define ALT_USB_HOST_HCSPLT7_PRTADDR_SET_MSK 0x0000007f
29533 /* The mask used to clear the ALT_USB_HOST_HCSPLT7_PRTADDR register field value. */
29534 #define ALT_USB_HOST_HCSPLT7_PRTADDR_CLR_MSK 0xffffff80
29535 /* The reset value of the ALT_USB_HOST_HCSPLT7_PRTADDR register field. */
29536 #define ALT_USB_HOST_HCSPLT7_PRTADDR_RESET 0x0
29537 /* Extracts the ALT_USB_HOST_HCSPLT7_PRTADDR field value from a register. */
29538 #define ALT_USB_HOST_HCSPLT7_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
29539 /* Produces a ALT_USB_HOST_HCSPLT7_PRTADDR register field value suitable for setting the register. */
29540 #define ALT_USB_HOST_HCSPLT7_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
29541 
29542 /*
29543  * Field : Hub Address - hubaddr
29544  *
29545  * This field holds the device address of the transaction translator's hub.
29546  *
29547  * Field Access Macros:
29548  *
29549  */
29550 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT7_HUBADDR register field. */
29551 #define ALT_USB_HOST_HCSPLT7_HUBADDR_LSB 7
29552 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT7_HUBADDR register field. */
29553 #define ALT_USB_HOST_HCSPLT7_HUBADDR_MSB 13
29554 /* The width in bits of the ALT_USB_HOST_HCSPLT7_HUBADDR register field. */
29555 #define ALT_USB_HOST_HCSPLT7_HUBADDR_WIDTH 7
29556 /* The mask used to set the ALT_USB_HOST_HCSPLT7_HUBADDR register field value. */
29557 #define ALT_USB_HOST_HCSPLT7_HUBADDR_SET_MSK 0x00003f80
29558 /* The mask used to clear the ALT_USB_HOST_HCSPLT7_HUBADDR register field value. */
29559 #define ALT_USB_HOST_HCSPLT7_HUBADDR_CLR_MSK 0xffffc07f
29560 /* The reset value of the ALT_USB_HOST_HCSPLT7_HUBADDR register field. */
29561 #define ALT_USB_HOST_HCSPLT7_HUBADDR_RESET 0x0
29562 /* Extracts the ALT_USB_HOST_HCSPLT7_HUBADDR field value from a register. */
29563 #define ALT_USB_HOST_HCSPLT7_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
29564 /* Produces a ALT_USB_HOST_HCSPLT7_HUBADDR register field value suitable for setting the register. */
29565 #define ALT_USB_HOST_HCSPLT7_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
29566 
29567 /*
29568  * Field : Transaction Position - xactpos
29569  *
29570  * This field is used to determine whether to send all, first, middle, or last
29571  * payloads with each OUT transaction.
29572  *
29573  * Field Enumeration Values:
29574  *
29575  * Enum | Value | Description
29576  * :--------------------------------------|:------|:------------------------------------------------
29577  * ALT_USB_HOST_HCSPLT7_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
29578  * : | | transaction (which is larger than 188 bytes)
29579  * ALT_USB_HOST_HCSPLT7_XACTPOS_E_END | 0x1 | End. This is the last payload of this
29580  * : | | transaction (which is larger than 188 bytes)
29581  * ALT_USB_HOST_HCSPLT7_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
29582  * : | | transaction (which is larger than 188 bytes)
29583  * ALT_USB_HOST_HCSPLT7_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
29584  * : | | transaction (which is less than or equal to 188
29585  * : | | bytes)
29586  *
29587  * Field Access Macros:
29588  *
29589  */
29590 /*
29591  * Enumerated value for register field ALT_USB_HOST_HCSPLT7_XACTPOS
29592  *
29593  * Mid. This is the middle payload of this transaction (which is larger than 188
29594  * bytes)
29595  */
29596 #define ALT_USB_HOST_HCSPLT7_XACTPOS_E_MIDDLE 0x0
29597 /*
29598  * Enumerated value for register field ALT_USB_HOST_HCSPLT7_XACTPOS
29599  *
29600  * End. This is the last payload of this transaction (which is larger than 188
29601  * bytes)
29602  */
29603 #define ALT_USB_HOST_HCSPLT7_XACTPOS_E_END 0x1
29604 /*
29605  * Enumerated value for register field ALT_USB_HOST_HCSPLT7_XACTPOS
29606  *
29607  * Begin. This is the first data payload of this transaction (which is larger than
29608  * 188 bytes)
29609  */
29610 #define ALT_USB_HOST_HCSPLT7_XACTPOS_E_BEGIN 0x2
29611 /*
29612  * Enumerated value for register field ALT_USB_HOST_HCSPLT7_XACTPOS
29613  *
29614  * All. This is the entire data payload is of this transaction (which is less than
29615  * or equal to 188 bytes)
29616  */
29617 #define ALT_USB_HOST_HCSPLT7_XACTPOS_E_ALL 0x3
29618 
29619 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT7_XACTPOS register field. */
29620 #define ALT_USB_HOST_HCSPLT7_XACTPOS_LSB 14
29621 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT7_XACTPOS register field. */
29622 #define ALT_USB_HOST_HCSPLT7_XACTPOS_MSB 15
29623 /* The width in bits of the ALT_USB_HOST_HCSPLT7_XACTPOS register field. */
29624 #define ALT_USB_HOST_HCSPLT7_XACTPOS_WIDTH 2
29625 /* The mask used to set the ALT_USB_HOST_HCSPLT7_XACTPOS register field value. */
29626 #define ALT_USB_HOST_HCSPLT7_XACTPOS_SET_MSK 0x0000c000
29627 /* The mask used to clear the ALT_USB_HOST_HCSPLT7_XACTPOS register field value. */
29628 #define ALT_USB_HOST_HCSPLT7_XACTPOS_CLR_MSK 0xffff3fff
29629 /* The reset value of the ALT_USB_HOST_HCSPLT7_XACTPOS register field. */
29630 #define ALT_USB_HOST_HCSPLT7_XACTPOS_RESET 0x0
29631 /* Extracts the ALT_USB_HOST_HCSPLT7_XACTPOS field value from a register. */
29632 #define ALT_USB_HOST_HCSPLT7_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
29633 /* Produces a ALT_USB_HOST_HCSPLT7_XACTPOS register field value suitable for setting the register. */
29634 #define ALT_USB_HOST_HCSPLT7_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
29635 
29636 /*
29637  * Field : Do Complete Split - compsplt
29638  *
29639  * The application sets this field to request the OTG host to perform a complete
29640  * split transaction.
29641  *
29642  * Field Enumeration Values:
29643  *
29644  * Enum | Value | Description
29645  * :----------------------------------------|:------|:---------------------
29646  * ALT_USB_HOST_HCSPLT7_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
29647  * ALT_USB_HOST_HCSPLT7_COMPSPLT_E_SPLIT | 0x1 | Split transaction
29648  *
29649  * Field Access Macros:
29650  *
29651  */
29652 /*
29653  * Enumerated value for register field ALT_USB_HOST_HCSPLT7_COMPSPLT
29654  *
29655  * No split transaction
29656  */
29657 #define ALT_USB_HOST_HCSPLT7_COMPSPLT_E_NOSPLIT 0x0
29658 /*
29659  * Enumerated value for register field ALT_USB_HOST_HCSPLT7_COMPSPLT
29660  *
29661  * Split transaction
29662  */
29663 #define ALT_USB_HOST_HCSPLT7_COMPSPLT_E_SPLIT 0x1
29664 
29665 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT7_COMPSPLT register field. */
29666 #define ALT_USB_HOST_HCSPLT7_COMPSPLT_LSB 16
29667 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT7_COMPSPLT register field. */
29668 #define ALT_USB_HOST_HCSPLT7_COMPSPLT_MSB 16
29669 /* The width in bits of the ALT_USB_HOST_HCSPLT7_COMPSPLT register field. */
29670 #define ALT_USB_HOST_HCSPLT7_COMPSPLT_WIDTH 1
29671 /* The mask used to set the ALT_USB_HOST_HCSPLT7_COMPSPLT register field value. */
29672 #define ALT_USB_HOST_HCSPLT7_COMPSPLT_SET_MSK 0x00010000
29673 /* The mask used to clear the ALT_USB_HOST_HCSPLT7_COMPSPLT register field value. */
29674 #define ALT_USB_HOST_HCSPLT7_COMPSPLT_CLR_MSK 0xfffeffff
29675 /* The reset value of the ALT_USB_HOST_HCSPLT7_COMPSPLT register field. */
29676 #define ALT_USB_HOST_HCSPLT7_COMPSPLT_RESET 0x0
29677 /* Extracts the ALT_USB_HOST_HCSPLT7_COMPSPLT field value from a register. */
29678 #define ALT_USB_HOST_HCSPLT7_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
29679 /* Produces a ALT_USB_HOST_HCSPLT7_COMPSPLT register field value suitable for setting the register. */
29680 #define ALT_USB_HOST_HCSPLT7_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
29681 
29682 /*
29683  * Field : Split Enable - spltena
29684  *
29685  * The application sets this field to indicate that this channel is enabled to
29686  * perform split transactions.
29687  *
29688  * Field Enumeration Values:
29689  *
29690  * Enum | Value | Description
29691  * :------------------------------------|:------|:------------------
29692  * ALT_USB_HOST_HCSPLT7_SPLTENA_E_DISD | 0x0 | Split not enabled
29693  * ALT_USB_HOST_HCSPLT7_SPLTENA_E_END | 0x1 | Split enabled
29694  *
29695  * Field Access Macros:
29696  *
29697  */
29698 /*
29699  * Enumerated value for register field ALT_USB_HOST_HCSPLT7_SPLTENA
29700  *
29701  * Split not enabled
29702  */
29703 #define ALT_USB_HOST_HCSPLT7_SPLTENA_E_DISD 0x0
29704 /*
29705  * Enumerated value for register field ALT_USB_HOST_HCSPLT7_SPLTENA
29706  *
29707  * Split enabled
29708  */
29709 #define ALT_USB_HOST_HCSPLT7_SPLTENA_E_END 0x1
29710 
29711 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT7_SPLTENA register field. */
29712 #define ALT_USB_HOST_HCSPLT7_SPLTENA_LSB 31
29713 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT7_SPLTENA register field. */
29714 #define ALT_USB_HOST_HCSPLT7_SPLTENA_MSB 31
29715 /* The width in bits of the ALT_USB_HOST_HCSPLT7_SPLTENA register field. */
29716 #define ALT_USB_HOST_HCSPLT7_SPLTENA_WIDTH 1
29717 /* The mask used to set the ALT_USB_HOST_HCSPLT7_SPLTENA register field value. */
29718 #define ALT_USB_HOST_HCSPLT7_SPLTENA_SET_MSK 0x80000000
29719 /* The mask used to clear the ALT_USB_HOST_HCSPLT7_SPLTENA register field value. */
29720 #define ALT_USB_HOST_HCSPLT7_SPLTENA_CLR_MSK 0x7fffffff
29721 /* The reset value of the ALT_USB_HOST_HCSPLT7_SPLTENA register field. */
29722 #define ALT_USB_HOST_HCSPLT7_SPLTENA_RESET 0x0
29723 /* Extracts the ALT_USB_HOST_HCSPLT7_SPLTENA field value from a register. */
29724 #define ALT_USB_HOST_HCSPLT7_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
29725 /* Produces a ALT_USB_HOST_HCSPLT7_SPLTENA register field value suitable for setting the register. */
29726 #define ALT_USB_HOST_HCSPLT7_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
29727 
29728 #ifndef __ASSEMBLY__
29729 /*
29730  * WARNING: The C register and register group struct declarations are provided for
29731  * convenience and illustrative purposes. They should, however, be used with
29732  * caution as the C language standard provides no guarantees about the alignment or
29733  * atomicity of device memory accesses. The recommended practice for writing
29734  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
29735  * alt_write_word() functions.
29736  *
29737  * The struct declaration for register ALT_USB_HOST_HCSPLT7.
29738  */
29739 struct ALT_USB_HOST_HCSPLT7_s
29740 {
29741  uint32_t prtaddr : 7; /* Port Address */
29742  uint32_t hubaddr : 7; /* Hub Address */
29743  uint32_t xactpos : 2; /* Transaction Position */
29744  uint32_t compsplt : 1; /* Do Complete Split */
29745  uint32_t : 14; /* *UNDEFINED* */
29746  uint32_t spltena : 1; /* Split Enable */
29747 };
29748 
29749 /* The typedef declaration for register ALT_USB_HOST_HCSPLT7. */
29750 typedef volatile struct ALT_USB_HOST_HCSPLT7_s ALT_USB_HOST_HCSPLT7_t;
29751 #endif /* __ASSEMBLY__ */
29752 
29753 /* The byte offset of the ALT_USB_HOST_HCSPLT7 register from the beginning of the component. */
29754 #define ALT_USB_HOST_HCSPLT7_OFST 0x1e4
29755 /* The address of the ALT_USB_HOST_HCSPLT7 register. */
29756 #define ALT_USB_HOST_HCSPLT7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT7_OFST))
29757 
29758 /*
29759  * Register : Host Channel 7 Interrupt Register - hcint7
29760  *
29761  * This register indicates the status of a channel with respect to USB- and AHB-
29762  * related events. The application must read this register when the Host Channels
29763  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
29764  * application can read this register, it must first read the Host All Channels
29765  * Interrupt (HAINT) register to get the exact channel number for the Host
29766  * Channel-n Interrupt register. The application must clear the appropriate bit in
29767  * this register to clear the corresponding bits in the HAINT and GINTSTS
29768  * registers.
29769  *
29770  * Register Layout
29771  *
29772  * Bits | Access | Reset | Description
29773  * :--------|:-------|:------|:--------------------------------------------
29774  * [0] | R | 0x0 | Transfer Completed
29775  * [1] | R | 0x0 | Channel Halted
29776  * [2] | R | 0x0 | AHB Error
29777  * [3] | R | 0x0 | STALL Response Received Interrupt
29778  * [4] | R | 0x0 | NAK Response Received Interrupt
29779  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
29780  * [6] | R | 0x0 | NYET Response Received Interrupt
29781  * [7] | R | 0x0 | Transaction Error
29782  * [8] | R | 0x0 | Babble Error
29783  * [9] | R | 0x0 | Frame Overrun
29784  * [10] | R | 0x0 | Data Toggle Error
29785  * [11] | R | 0x0 | BNA Interrupt
29786  * [12] | R | 0x0 | Excessive Transaction Error
29787  * [13] | R | 0x0 | Descriptor rollover interrupt
29788  * [31:14] | ??? | 0x0 | *UNDEFINED*
29789  *
29790  */
29791 /*
29792  * Field : Transfer Completed - xfercompl
29793  *
29794  * Transfer completed normally without any errors. This bit can be set only by the
29795  * core and the application should write 1 to clear it.
29796  *
29797  * Field Enumeration Values:
29798  *
29799  * Enum | Value | Description
29800  * :--------------------------------------|:------|:-----------------------------------------------
29801  * ALT_USB_HOST_HCINT7_XFERCOMPL_E_INACT | 0x0 | No transfer
29802  * ALT_USB_HOST_HCINT7_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
29803  *
29804  * Field Access Macros:
29805  *
29806  */
29807 /*
29808  * Enumerated value for register field ALT_USB_HOST_HCINT7_XFERCOMPL
29809  *
29810  * No transfer
29811  */
29812 #define ALT_USB_HOST_HCINT7_XFERCOMPL_E_INACT 0x0
29813 /*
29814  * Enumerated value for register field ALT_USB_HOST_HCINT7_XFERCOMPL
29815  *
29816  * Transfer completed normally without any errors
29817  */
29818 #define ALT_USB_HOST_HCINT7_XFERCOMPL_E_ACT 0x1
29819 
29820 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_XFERCOMPL register field. */
29821 #define ALT_USB_HOST_HCINT7_XFERCOMPL_LSB 0
29822 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_XFERCOMPL register field. */
29823 #define ALT_USB_HOST_HCINT7_XFERCOMPL_MSB 0
29824 /* The width in bits of the ALT_USB_HOST_HCINT7_XFERCOMPL register field. */
29825 #define ALT_USB_HOST_HCINT7_XFERCOMPL_WIDTH 1
29826 /* The mask used to set the ALT_USB_HOST_HCINT7_XFERCOMPL register field value. */
29827 #define ALT_USB_HOST_HCINT7_XFERCOMPL_SET_MSK 0x00000001
29828 /* The mask used to clear the ALT_USB_HOST_HCINT7_XFERCOMPL register field value. */
29829 #define ALT_USB_HOST_HCINT7_XFERCOMPL_CLR_MSK 0xfffffffe
29830 /* The reset value of the ALT_USB_HOST_HCINT7_XFERCOMPL register field. */
29831 #define ALT_USB_HOST_HCINT7_XFERCOMPL_RESET 0x0
29832 /* Extracts the ALT_USB_HOST_HCINT7_XFERCOMPL field value from a register. */
29833 #define ALT_USB_HOST_HCINT7_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
29834 /* Produces a ALT_USB_HOST_HCINT7_XFERCOMPL register field value suitable for setting the register. */
29835 #define ALT_USB_HOST_HCINT7_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
29836 
29837 /*
29838  * Field : Channel Halted - chhltd
29839  *
29840  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
29841  * either because of any USB transaction error or in response to disable request by
29842  * the application or because of a completed transfer. In Scatter/gather DMA mode,
29843  * this indicates that transfer completed due to any of the following
29844  *
29845  * . EOL being set in descriptor
29846  *
29847  * . AHB error
29848  *
29849  * . Excessive transaction errors
29850  *
29851  * . Babble
29852  *
29853  * . Stall
29854  *
29855  * Field Enumeration Values:
29856  *
29857  * Enum | Value | Description
29858  * :-----------------------------------|:------|:-------------------
29859  * ALT_USB_HOST_HCINT7_CHHLTD_E_INACT | 0x0 | Channel not halted
29860  * ALT_USB_HOST_HCINT7_CHHLTD_E_ACT | 0x1 | Channel Halted
29861  *
29862  * Field Access Macros:
29863  *
29864  */
29865 /*
29866  * Enumerated value for register field ALT_USB_HOST_HCINT7_CHHLTD
29867  *
29868  * Channel not halted
29869  */
29870 #define ALT_USB_HOST_HCINT7_CHHLTD_E_INACT 0x0
29871 /*
29872  * Enumerated value for register field ALT_USB_HOST_HCINT7_CHHLTD
29873  *
29874  * Channel Halted
29875  */
29876 #define ALT_USB_HOST_HCINT7_CHHLTD_E_ACT 0x1
29877 
29878 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_CHHLTD register field. */
29879 #define ALT_USB_HOST_HCINT7_CHHLTD_LSB 1
29880 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_CHHLTD register field. */
29881 #define ALT_USB_HOST_HCINT7_CHHLTD_MSB 1
29882 /* The width in bits of the ALT_USB_HOST_HCINT7_CHHLTD register field. */
29883 #define ALT_USB_HOST_HCINT7_CHHLTD_WIDTH 1
29884 /* The mask used to set the ALT_USB_HOST_HCINT7_CHHLTD register field value. */
29885 #define ALT_USB_HOST_HCINT7_CHHLTD_SET_MSK 0x00000002
29886 /* The mask used to clear the ALT_USB_HOST_HCINT7_CHHLTD register field value. */
29887 #define ALT_USB_HOST_HCINT7_CHHLTD_CLR_MSK 0xfffffffd
29888 /* The reset value of the ALT_USB_HOST_HCINT7_CHHLTD register field. */
29889 #define ALT_USB_HOST_HCINT7_CHHLTD_RESET 0x0
29890 /* Extracts the ALT_USB_HOST_HCINT7_CHHLTD field value from a register. */
29891 #define ALT_USB_HOST_HCINT7_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
29892 /* Produces a ALT_USB_HOST_HCINT7_CHHLTD register field value suitable for setting the register. */
29893 #define ALT_USB_HOST_HCINT7_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
29894 
29895 /*
29896  * Field : AHB Error - ahberr
29897  *
29898  * This is generated only in Internal DMA mode when there is an AHB error during
29899  * AHB read/write. The application can read the corresponding channel's DMA address
29900  * register to get the error address.
29901  *
29902  * Field Enumeration Values:
29903  *
29904  * Enum | Value | Description
29905  * :-----------------------------------|:------|:--------------------------------
29906  * ALT_USB_HOST_HCINT7_AHBERR_E_INACT | 0x0 | No AHB error
29907  * ALT_USB_HOST_HCINT7_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
29908  *
29909  * Field Access Macros:
29910  *
29911  */
29912 /*
29913  * Enumerated value for register field ALT_USB_HOST_HCINT7_AHBERR
29914  *
29915  * No AHB error
29916  */
29917 #define ALT_USB_HOST_HCINT7_AHBERR_E_INACT 0x0
29918 /*
29919  * Enumerated value for register field ALT_USB_HOST_HCINT7_AHBERR
29920  *
29921  * AHB error during AHB read/write
29922  */
29923 #define ALT_USB_HOST_HCINT7_AHBERR_E_ACT 0x1
29924 
29925 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_AHBERR register field. */
29926 #define ALT_USB_HOST_HCINT7_AHBERR_LSB 2
29927 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_AHBERR register field. */
29928 #define ALT_USB_HOST_HCINT7_AHBERR_MSB 2
29929 /* The width in bits of the ALT_USB_HOST_HCINT7_AHBERR register field. */
29930 #define ALT_USB_HOST_HCINT7_AHBERR_WIDTH 1
29931 /* The mask used to set the ALT_USB_HOST_HCINT7_AHBERR register field value. */
29932 #define ALT_USB_HOST_HCINT7_AHBERR_SET_MSK 0x00000004
29933 /* The mask used to clear the ALT_USB_HOST_HCINT7_AHBERR register field value. */
29934 #define ALT_USB_HOST_HCINT7_AHBERR_CLR_MSK 0xfffffffb
29935 /* The reset value of the ALT_USB_HOST_HCINT7_AHBERR register field. */
29936 #define ALT_USB_HOST_HCINT7_AHBERR_RESET 0x0
29937 /* Extracts the ALT_USB_HOST_HCINT7_AHBERR field value from a register. */
29938 #define ALT_USB_HOST_HCINT7_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
29939 /* Produces a ALT_USB_HOST_HCINT7_AHBERR register field value suitable for setting the register. */
29940 #define ALT_USB_HOST_HCINT7_AHBERR_SET(value) (((value) << 2) & 0x00000004)
29941 
29942 /*
29943  * Field : STALL Response Received Interrupt - stall
29944  *
29945  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
29946  * This bit can be set only by the core and the application should write 1 to clear
29947  * it.
29948  *
29949  * Field Enumeration Values:
29950  *
29951  * Enum | Value | Description
29952  * :----------------------------------|:------|:-------------------
29953  * ALT_USB_HOST_HCINT7_STALL_E_INACT | 0x0 | No Stall Interrupt
29954  * ALT_USB_HOST_HCINT7_STALL_E_ACT | 0x1 | Stall Interrupt
29955  *
29956  * Field Access Macros:
29957  *
29958  */
29959 /*
29960  * Enumerated value for register field ALT_USB_HOST_HCINT7_STALL
29961  *
29962  * No Stall Interrupt
29963  */
29964 #define ALT_USB_HOST_HCINT7_STALL_E_INACT 0x0
29965 /*
29966  * Enumerated value for register field ALT_USB_HOST_HCINT7_STALL
29967  *
29968  * Stall Interrupt
29969  */
29970 #define ALT_USB_HOST_HCINT7_STALL_E_ACT 0x1
29971 
29972 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_STALL register field. */
29973 #define ALT_USB_HOST_HCINT7_STALL_LSB 3
29974 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_STALL register field. */
29975 #define ALT_USB_HOST_HCINT7_STALL_MSB 3
29976 /* The width in bits of the ALT_USB_HOST_HCINT7_STALL register field. */
29977 #define ALT_USB_HOST_HCINT7_STALL_WIDTH 1
29978 /* The mask used to set the ALT_USB_HOST_HCINT7_STALL register field value. */
29979 #define ALT_USB_HOST_HCINT7_STALL_SET_MSK 0x00000008
29980 /* The mask used to clear the ALT_USB_HOST_HCINT7_STALL register field value. */
29981 #define ALT_USB_HOST_HCINT7_STALL_CLR_MSK 0xfffffff7
29982 /* The reset value of the ALT_USB_HOST_HCINT7_STALL register field. */
29983 #define ALT_USB_HOST_HCINT7_STALL_RESET 0x0
29984 /* Extracts the ALT_USB_HOST_HCINT7_STALL field value from a register. */
29985 #define ALT_USB_HOST_HCINT7_STALL_GET(value) (((value) & 0x00000008) >> 3)
29986 /* Produces a ALT_USB_HOST_HCINT7_STALL register field value suitable for setting the register. */
29987 #define ALT_USB_HOST_HCINT7_STALL_SET(value) (((value) << 3) & 0x00000008)
29988 
29989 /*
29990  * Field : NAK Response Received Interrupt - nak
29991  *
29992  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
29993  * core.This bit can be set only by the core and the application should write 1 to
29994  * clear it.
29995  *
29996  * Field Enumeration Values:
29997  *
29998  * Enum | Value | Description
29999  * :--------------------------------|:------|:-----------------------------------
30000  * ALT_USB_HOST_HCINT7_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
30001  * ALT_USB_HOST_HCINT7_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
30002  *
30003  * Field Access Macros:
30004  *
30005  */
30006 /*
30007  * Enumerated value for register field ALT_USB_HOST_HCINT7_NAK
30008  *
30009  * No NAK Response Received Interrupt
30010  */
30011 #define ALT_USB_HOST_HCINT7_NAK_E_INACT 0x0
30012 /*
30013  * Enumerated value for register field ALT_USB_HOST_HCINT7_NAK
30014  *
30015  * NAK Response Received Interrupt
30016  */
30017 #define ALT_USB_HOST_HCINT7_NAK_E_ACT 0x1
30018 
30019 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_NAK register field. */
30020 #define ALT_USB_HOST_HCINT7_NAK_LSB 4
30021 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_NAK register field. */
30022 #define ALT_USB_HOST_HCINT7_NAK_MSB 4
30023 /* The width in bits of the ALT_USB_HOST_HCINT7_NAK register field. */
30024 #define ALT_USB_HOST_HCINT7_NAK_WIDTH 1
30025 /* The mask used to set the ALT_USB_HOST_HCINT7_NAK register field value. */
30026 #define ALT_USB_HOST_HCINT7_NAK_SET_MSK 0x00000010
30027 /* The mask used to clear the ALT_USB_HOST_HCINT7_NAK register field value. */
30028 #define ALT_USB_HOST_HCINT7_NAK_CLR_MSK 0xffffffef
30029 /* The reset value of the ALT_USB_HOST_HCINT7_NAK register field. */
30030 #define ALT_USB_HOST_HCINT7_NAK_RESET 0x0
30031 /* Extracts the ALT_USB_HOST_HCINT7_NAK field value from a register. */
30032 #define ALT_USB_HOST_HCINT7_NAK_GET(value) (((value) & 0x00000010) >> 4)
30033 /* Produces a ALT_USB_HOST_HCINT7_NAK register field value suitable for setting the register. */
30034 #define ALT_USB_HOST_HCINT7_NAK_SET(value) (((value) << 4) & 0x00000010)
30035 
30036 /*
30037  * Field : ACK Response Received Transmitted Interrupt - ack
30038  *
30039  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
30040  * This bit can be set only by the core and the application should write 1 to clear
30041  * it.
30042  *
30043  * Field Enumeration Values:
30044  *
30045  * Enum | Value | Description
30046  * :--------------------------------|:------|:-----------------------------------------------
30047  * ALT_USB_HOST_HCINT7_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
30048  * ALT_USB_HOST_HCINT7_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
30049  *
30050  * Field Access Macros:
30051  *
30052  */
30053 /*
30054  * Enumerated value for register field ALT_USB_HOST_HCINT7_ACK
30055  *
30056  * No ACK Response Received Transmitted Interrupt
30057  */
30058 #define ALT_USB_HOST_HCINT7_ACK_E_INACT 0x0
30059 /*
30060  * Enumerated value for register field ALT_USB_HOST_HCINT7_ACK
30061  *
30062  * ACK Response Received Transmitted Interrup
30063  */
30064 #define ALT_USB_HOST_HCINT7_ACK_E_ACT 0x1
30065 
30066 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_ACK register field. */
30067 #define ALT_USB_HOST_HCINT7_ACK_LSB 5
30068 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_ACK register field. */
30069 #define ALT_USB_HOST_HCINT7_ACK_MSB 5
30070 /* The width in bits of the ALT_USB_HOST_HCINT7_ACK register field. */
30071 #define ALT_USB_HOST_HCINT7_ACK_WIDTH 1
30072 /* The mask used to set the ALT_USB_HOST_HCINT7_ACK register field value. */
30073 #define ALT_USB_HOST_HCINT7_ACK_SET_MSK 0x00000020
30074 /* The mask used to clear the ALT_USB_HOST_HCINT7_ACK register field value. */
30075 #define ALT_USB_HOST_HCINT7_ACK_CLR_MSK 0xffffffdf
30076 /* The reset value of the ALT_USB_HOST_HCINT7_ACK register field. */
30077 #define ALT_USB_HOST_HCINT7_ACK_RESET 0x0
30078 /* Extracts the ALT_USB_HOST_HCINT7_ACK field value from a register. */
30079 #define ALT_USB_HOST_HCINT7_ACK_GET(value) (((value) & 0x00000020) >> 5)
30080 /* Produces a ALT_USB_HOST_HCINT7_ACK register field value suitable for setting the register. */
30081 #define ALT_USB_HOST_HCINT7_ACK_SET(value) (((value) << 5) & 0x00000020)
30082 
30083 /*
30084  * Field : NYET Response Received Interrupt - nyet
30085  *
30086  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
30087  * core.This bit can be set only by the core and the application should write 1 to
30088  * clear it.
30089  *
30090  * Field Enumeration Values:
30091  *
30092  * Enum | Value | Description
30093  * :---------------------------------|:------|:------------------------------------
30094  * ALT_USB_HOST_HCINT7_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
30095  * ALT_USB_HOST_HCINT7_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
30096  *
30097  * Field Access Macros:
30098  *
30099  */
30100 /*
30101  * Enumerated value for register field ALT_USB_HOST_HCINT7_NYET
30102  *
30103  * No NYET Response Received Interrupt
30104  */
30105 #define ALT_USB_HOST_HCINT7_NYET_E_INACT 0x0
30106 /*
30107  * Enumerated value for register field ALT_USB_HOST_HCINT7_NYET
30108  *
30109  * NYET Response Received Interrupt
30110  */
30111 #define ALT_USB_HOST_HCINT7_NYET_E_ACT 0x1
30112 
30113 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_NYET register field. */
30114 #define ALT_USB_HOST_HCINT7_NYET_LSB 6
30115 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_NYET register field. */
30116 #define ALT_USB_HOST_HCINT7_NYET_MSB 6
30117 /* The width in bits of the ALT_USB_HOST_HCINT7_NYET register field. */
30118 #define ALT_USB_HOST_HCINT7_NYET_WIDTH 1
30119 /* The mask used to set the ALT_USB_HOST_HCINT7_NYET register field value. */
30120 #define ALT_USB_HOST_HCINT7_NYET_SET_MSK 0x00000040
30121 /* The mask used to clear the ALT_USB_HOST_HCINT7_NYET register field value. */
30122 #define ALT_USB_HOST_HCINT7_NYET_CLR_MSK 0xffffffbf
30123 /* The reset value of the ALT_USB_HOST_HCINT7_NYET register field. */
30124 #define ALT_USB_HOST_HCINT7_NYET_RESET 0x0
30125 /* Extracts the ALT_USB_HOST_HCINT7_NYET field value from a register. */
30126 #define ALT_USB_HOST_HCINT7_NYET_GET(value) (((value) & 0x00000040) >> 6)
30127 /* Produces a ALT_USB_HOST_HCINT7_NYET register field value suitable for setting the register. */
30128 #define ALT_USB_HOST_HCINT7_NYET_SET(value) (((value) << 6) & 0x00000040)
30129 
30130 /*
30131  * Field : Transaction Error - xacterr
30132  *
30133  * Indicates one of the following errors occurred on the USB.-CRC check failure
30134  *
30135  * * Timeout
30136  *
30137  * * Bit stuff error
30138  *
30139  * * False EOP
30140  *
30141  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
30142  * This bit can be set only by the core and the application should write 1 to clear
30143  * it.
30144  *
30145  * Field Enumeration Values:
30146  *
30147  * Enum | Value | Description
30148  * :------------------------------------|:------|:---------------------
30149  * ALT_USB_HOST_HCINT7_XACTERR_E_INACT | 0x0 | No Transaction Error
30150  * ALT_USB_HOST_HCINT7_XACTERR_E_ACT | 0x1 | Transaction Error
30151  *
30152  * Field Access Macros:
30153  *
30154  */
30155 /*
30156  * Enumerated value for register field ALT_USB_HOST_HCINT7_XACTERR
30157  *
30158  * No Transaction Error
30159  */
30160 #define ALT_USB_HOST_HCINT7_XACTERR_E_INACT 0x0
30161 /*
30162  * Enumerated value for register field ALT_USB_HOST_HCINT7_XACTERR
30163  *
30164  * Transaction Error
30165  */
30166 #define ALT_USB_HOST_HCINT7_XACTERR_E_ACT 0x1
30167 
30168 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_XACTERR register field. */
30169 #define ALT_USB_HOST_HCINT7_XACTERR_LSB 7
30170 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_XACTERR register field. */
30171 #define ALT_USB_HOST_HCINT7_XACTERR_MSB 7
30172 /* The width in bits of the ALT_USB_HOST_HCINT7_XACTERR register field. */
30173 #define ALT_USB_HOST_HCINT7_XACTERR_WIDTH 1
30174 /* The mask used to set the ALT_USB_HOST_HCINT7_XACTERR register field value. */
30175 #define ALT_USB_HOST_HCINT7_XACTERR_SET_MSK 0x00000080
30176 /* The mask used to clear the ALT_USB_HOST_HCINT7_XACTERR register field value. */
30177 #define ALT_USB_HOST_HCINT7_XACTERR_CLR_MSK 0xffffff7f
30178 /* The reset value of the ALT_USB_HOST_HCINT7_XACTERR register field. */
30179 #define ALT_USB_HOST_HCINT7_XACTERR_RESET 0x0
30180 /* Extracts the ALT_USB_HOST_HCINT7_XACTERR field value from a register. */
30181 #define ALT_USB_HOST_HCINT7_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
30182 /* Produces a ALT_USB_HOST_HCINT7_XACTERR register field value suitable for setting the register. */
30183 #define ALT_USB_HOST_HCINT7_XACTERR_SET(value) (((value) << 7) & 0x00000080)
30184 
30185 /*
30186  * Field : Babble Error - bblerr
30187  *
30188  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
30189  * core..This bit can be set only by the core and the application should write 1 to
30190  * clear it.
30191  *
30192  * Field Enumeration Values:
30193  *
30194  * Enum | Value | Description
30195  * :-----------------------------------|:------|:----------------
30196  * ALT_USB_HOST_HCINT7_BBLERR_E_INACT | 0x0 | No Babble Error
30197  * ALT_USB_HOST_HCINT7_BBLERR_E_ACT | 0x1 | Babble Error
30198  *
30199  * Field Access Macros:
30200  *
30201  */
30202 /*
30203  * Enumerated value for register field ALT_USB_HOST_HCINT7_BBLERR
30204  *
30205  * No Babble Error
30206  */
30207 #define ALT_USB_HOST_HCINT7_BBLERR_E_INACT 0x0
30208 /*
30209  * Enumerated value for register field ALT_USB_HOST_HCINT7_BBLERR
30210  *
30211  * Babble Error
30212  */
30213 #define ALT_USB_HOST_HCINT7_BBLERR_E_ACT 0x1
30214 
30215 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_BBLERR register field. */
30216 #define ALT_USB_HOST_HCINT7_BBLERR_LSB 8
30217 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_BBLERR register field. */
30218 #define ALT_USB_HOST_HCINT7_BBLERR_MSB 8
30219 /* The width in bits of the ALT_USB_HOST_HCINT7_BBLERR register field. */
30220 #define ALT_USB_HOST_HCINT7_BBLERR_WIDTH 1
30221 /* The mask used to set the ALT_USB_HOST_HCINT7_BBLERR register field value. */
30222 #define ALT_USB_HOST_HCINT7_BBLERR_SET_MSK 0x00000100
30223 /* The mask used to clear the ALT_USB_HOST_HCINT7_BBLERR register field value. */
30224 #define ALT_USB_HOST_HCINT7_BBLERR_CLR_MSK 0xfffffeff
30225 /* The reset value of the ALT_USB_HOST_HCINT7_BBLERR register field. */
30226 #define ALT_USB_HOST_HCINT7_BBLERR_RESET 0x0
30227 /* Extracts the ALT_USB_HOST_HCINT7_BBLERR field value from a register. */
30228 #define ALT_USB_HOST_HCINT7_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
30229 /* Produces a ALT_USB_HOST_HCINT7_BBLERR register field value suitable for setting the register. */
30230 #define ALT_USB_HOST_HCINT7_BBLERR_SET(value) (((value) << 8) & 0x00000100)
30231 
30232 /*
30233  * Field : Frame Overrun - frmovrun
30234  *
30235  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
30236  * This bit can be set only by the core and the application should write 1 to clear
30237  * it.
30238  *
30239  * Field Enumeration Values:
30240  *
30241  * Enum | Value | Description
30242  * :-------------------------------------|:------|:-----------------
30243  * ALT_USB_HOST_HCINT7_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
30244  * ALT_USB_HOST_HCINT7_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
30245  *
30246  * Field Access Macros:
30247  *
30248  */
30249 /*
30250  * Enumerated value for register field ALT_USB_HOST_HCINT7_FRMOVRUN
30251  *
30252  * No Frame Overrun
30253  */
30254 #define ALT_USB_HOST_HCINT7_FRMOVRUN_E_INACT 0x0
30255 /*
30256  * Enumerated value for register field ALT_USB_HOST_HCINT7_FRMOVRUN
30257  *
30258  * Frame Overrun
30259  */
30260 #define ALT_USB_HOST_HCINT7_FRMOVRUN_E_ACT 0x1
30261 
30262 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_FRMOVRUN register field. */
30263 #define ALT_USB_HOST_HCINT7_FRMOVRUN_LSB 9
30264 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_FRMOVRUN register field. */
30265 #define ALT_USB_HOST_HCINT7_FRMOVRUN_MSB 9
30266 /* The width in bits of the ALT_USB_HOST_HCINT7_FRMOVRUN register field. */
30267 #define ALT_USB_HOST_HCINT7_FRMOVRUN_WIDTH 1
30268 /* The mask used to set the ALT_USB_HOST_HCINT7_FRMOVRUN register field value. */
30269 #define ALT_USB_HOST_HCINT7_FRMOVRUN_SET_MSK 0x00000200
30270 /* The mask used to clear the ALT_USB_HOST_HCINT7_FRMOVRUN register field value. */
30271 #define ALT_USB_HOST_HCINT7_FRMOVRUN_CLR_MSK 0xfffffdff
30272 /* The reset value of the ALT_USB_HOST_HCINT7_FRMOVRUN register field. */
30273 #define ALT_USB_HOST_HCINT7_FRMOVRUN_RESET 0x0
30274 /* Extracts the ALT_USB_HOST_HCINT7_FRMOVRUN field value from a register. */
30275 #define ALT_USB_HOST_HCINT7_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
30276 /* Produces a ALT_USB_HOST_HCINT7_FRMOVRUN register field value suitable for setting the register. */
30277 #define ALT_USB_HOST_HCINT7_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
30278 
30279 /*
30280  * Field : Data Toggle Error - datatglerr
30281  *
30282  * This bit can be set only by the core and the application should write 1 to clear
30283  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
30284  * core.
30285  *
30286  * Field Enumeration Values:
30287  *
30288  * Enum | Value | Description
30289  * :---------------------------------------|:------|:---------------------
30290  * ALT_USB_HOST_HCINT7_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
30291  * ALT_USB_HOST_HCINT7_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
30292  *
30293  * Field Access Macros:
30294  *
30295  */
30296 /*
30297  * Enumerated value for register field ALT_USB_HOST_HCINT7_DATATGLERR
30298  *
30299  * No Data Toggle Error
30300  */
30301 #define ALT_USB_HOST_HCINT7_DATATGLERR_E_INACT 0x0
30302 /*
30303  * Enumerated value for register field ALT_USB_HOST_HCINT7_DATATGLERR
30304  *
30305  * Data Toggle Error
30306  */
30307 #define ALT_USB_HOST_HCINT7_DATATGLERR_E_ACT 0x1
30308 
30309 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_DATATGLERR register field. */
30310 #define ALT_USB_HOST_HCINT7_DATATGLERR_LSB 10
30311 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_DATATGLERR register field. */
30312 #define ALT_USB_HOST_HCINT7_DATATGLERR_MSB 10
30313 /* The width in bits of the ALT_USB_HOST_HCINT7_DATATGLERR register field. */
30314 #define ALT_USB_HOST_HCINT7_DATATGLERR_WIDTH 1
30315 /* The mask used to set the ALT_USB_HOST_HCINT7_DATATGLERR register field value. */
30316 #define ALT_USB_HOST_HCINT7_DATATGLERR_SET_MSK 0x00000400
30317 /* The mask used to clear the ALT_USB_HOST_HCINT7_DATATGLERR register field value. */
30318 #define ALT_USB_HOST_HCINT7_DATATGLERR_CLR_MSK 0xfffffbff
30319 /* The reset value of the ALT_USB_HOST_HCINT7_DATATGLERR register field. */
30320 #define ALT_USB_HOST_HCINT7_DATATGLERR_RESET 0x0
30321 /* Extracts the ALT_USB_HOST_HCINT7_DATATGLERR field value from a register. */
30322 #define ALT_USB_HOST_HCINT7_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
30323 /* Produces a ALT_USB_HOST_HCINT7_DATATGLERR register field value suitable for setting the register. */
30324 #define ALT_USB_HOST_HCINT7_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
30325 
30326 /*
30327  * Field : BNA Interrupt - bnaintr
30328  *
30329  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
30330  * generates this interrupt when the descriptor accessed is not ready for the Core
30331  * to process. BNA will not be generated for Isochronous channels. for non
30332  * Scatter/Gather DMA mode, this bit is reserved.
30333  *
30334  * Field Enumeration Values:
30335  *
30336  * Enum | Value | Description
30337  * :------------------------------------|:------|:-----------------
30338  * ALT_USB_HOST_HCINT7_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
30339  * ALT_USB_HOST_HCINT7_BNAINTR_E_ACT | 0x1 | BNA Interrupt
30340  *
30341  * Field Access Macros:
30342  *
30343  */
30344 /*
30345  * Enumerated value for register field ALT_USB_HOST_HCINT7_BNAINTR
30346  *
30347  * No BNA Interrupt
30348  */
30349 #define ALT_USB_HOST_HCINT7_BNAINTR_E_INACT 0x0
30350 /*
30351  * Enumerated value for register field ALT_USB_HOST_HCINT7_BNAINTR
30352  *
30353  * BNA Interrupt
30354  */
30355 #define ALT_USB_HOST_HCINT7_BNAINTR_E_ACT 0x1
30356 
30357 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_BNAINTR register field. */
30358 #define ALT_USB_HOST_HCINT7_BNAINTR_LSB 11
30359 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_BNAINTR register field. */
30360 #define ALT_USB_HOST_HCINT7_BNAINTR_MSB 11
30361 /* The width in bits of the ALT_USB_HOST_HCINT7_BNAINTR register field. */
30362 #define ALT_USB_HOST_HCINT7_BNAINTR_WIDTH 1
30363 /* The mask used to set the ALT_USB_HOST_HCINT7_BNAINTR register field value. */
30364 #define ALT_USB_HOST_HCINT7_BNAINTR_SET_MSK 0x00000800
30365 /* The mask used to clear the ALT_USB_HOST_HCINT7_BNAINTR register field value. */
30366 #define ALT_USB_HOST_HCINT7_BNAINTR_CLR_MSK 0xfffff7ff
30367 /* The reset value of the ALT_USB_HOST_HCINT7_BNAINTR register field. */
30368 #define ALT_USB_HOST_HCINT7_BNAINTR_RESET 0x0
30369 /* Extracts the ALT_USB_HOST_HCINT7_BNAINTR field value from a register. */
30370 #define ALT_USB_HOST_HCINT7_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
30371 /* Produces a ALT_USB_HOST_HCINT7_BNAINTR register field value suitable for setting the register. */
30372 #define ALT_USB_HOST_HCINT7_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
30373 
30374 /*
30375  * Field : Excessive Transaction Error - xcs_xact_err
30376  *
30377  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
30378  * this bit when 3 consecutive transaction errors occurred on the USB bus.
30379  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
30380  * Scatter/Gather DMA mode, this bit is reserved.
30381  *
30382  * Field Enumeration Values:
30383  *
30384  * Enum | Value | Description
30385  * :-------------------------------------------|:------|:-------------------------------
30386  * ALT_USB_HOST_HCINT7_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
30387  * ALT_USB_HOST_HCINT7_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
30388  *
30389  * Field Access Macros:
30390  *
30391  */
30392 /*
30393  * Enumerated value for register field ALT_USB_HOST_HCINT7_XCS_XACT_ERR
30394  *
30395  * No Excessive Transaction Error
30396  */
30397 #define ALT_USB_HOST_HCINT7_XCS_XACT_ERR_E_INACT 0x0
30398 /*
30399  * Enumerated value for register field ALT_USB_HOST_HCINT7_XCS_XACT_ERR
30400  *
30401  * Excessive Transaction Error
30402  */
30403 #define ALT_USB_HOST_HCINT7_XCS_XACT_ERR_E_ACVTIVE 0x1
30404 
30405 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_XCS_XACT_ERR register field. */
30406 #define ALT_USB_HOST_HCINT7_XCS_XACT_ERR_LSB 12
30407 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_XCS_XACT_ERR register field. */
30408 #define ALT_USB_HOST_HCINT7_XCS_XACT_ERR_MSB 12
30409 /* The width in bits of the ALT_USB_HOST_HCINT7_XCS_XACT_ERR register field. */
30410 #define ALT_USB_HOST_HCINT7_XCS_XACT_ERR_WIDTH 1
30411 /* The mask used to set the ALT_USB_HOST_HCINT7_XCS_XACT_ERR register field value. */
30412 #define ALT_USB_HOST_HCINT7_XCS_XACT_ERR_SET_MSK 0x00001000
30413 /* The mask used to clear the ALT_USB_HOST_HCINT7_XCS_XACT_ERR register field value. */
30414 #define ALT_USB_HOST_HCINT7_XCS_XACT_ERR_CLR_MSK 0xffffefff
30415 /* The reset value of the ALT_USB_HOST_HCINT7_XCS_XACT_ERR register field. */
30416 #define ALT_USB_HOST_HCINT7_XCS_XACT_ERR_RESET 0x0
30417 /* Extracts the ALT_USB_HOST_HCINT7_XCS_XACT_ERR field value from a register. */
30418 #define ALT_USB_HOST_HCINT7_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
30419 /* Produces a ALT_USB_HOST_HCINT7_XCS_XACT_ERR register field value suitable for setting the register. */
30420 #define ALT_USB_HOST_HCINT7_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
30421 
30422 /*
30423  * Field : Descriptor rollover interrupt - desc_lst_rollintr
30424  *
30425  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
30426  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
30427  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
30428  * mode, this bit is reserved.
30429  *
30430  * Field Enumeration Values:
30431  *
30432  * Enum | Value | Description
30433  * :----------------------------------------------|:------|:---------------------------------
30434  * ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
30435  * ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
30436  *
30437  * Field Access Macros:
30438  *
30439  */
30440 /*
30441  * Enumerated value for register field ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR
30442  *
30443  * No Descriptor rollover interrupt
30444  */
30445 #define ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR_E_INACT 0x0
30446 /*
30447  * Enumerated value for register field ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR
30448  *
30449  * Descriptor rollover interrupt
30450  */
30451 #define ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR_E_ACT 0x1
30452 
30453 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR register field. */
30454 #define ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR_LSB 13
30455 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR register field. */
30456 #define ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR_MSB 13
30457 /* The width in bits of the ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR register field. */
30458 #define ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR_WIDTH 1
30459 /* The mask used to set the ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR register field value. */
30460 #define ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR_SET_MSK 0x00002000
30461 /* The mask used to clear the ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR register field value. */
30462 #define ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
30463 /* The reset value of the ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR register field. */
30464 #define ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR_RESET 0x0
30465 /* Extracts the ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR field value from a register. */
30466 #define ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
30467 /* Produces a ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR register field value suitable for setting the register. */
30468 #define ALT_USB_HOST_HCINT7_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
30469 
30470 #ifndef __ASSEMBLY__
30471 /*
30472  * WARNING: The C register and register group struct declarations are provided for
30473  * convenience and illustrative purposes. They should, however, be used with
30474  * caution as the C language standard provides no guarantees about the alignment or
30475  * atomicity of device memory accesses. The recommended practice for writing
30476  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
30477  * alt_write_word() functions.
30478  *
30479  * The struct declaration for register ALT_USB_HOST_HCINT7.
30480  */
30481 struct ALT_USB_HOST_HCINT7_s
30482 {
30483  const uint32_t xfercompl : 1; /* Transfer Completed */
30484  const uint32_t chhltd : 1; /* Channel Halted */
30485  const uint32_t ahberr : 1; /* AHB Error */
30486  const uint32_t stall : 1; /* STALL Response Received Interrupt */
30487  const uint32_t nak : 1; /* NAK Response Received Interrupt */
30488  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
30489  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
30490  const uint32_t xacterr : 1; /* Transaction Error */
30491  const uint32_t bblerr : 1; /* Babble Error */
30492  const uint32_t frmovrun : 1; /* Frame Overrun */
30493  const uint32_t datatglerr : 1; /* Data Toggle Error */
30494  const uint32_t bnaintr : 1; /* BNA Interrupt */
30495  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
30496  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
30497  uint32_t : 18; /* *UNDEFINED* */
30498 };
30499 
30500 /* The typedef declaration for register ALT_USB_HOST_HCINT7. */
30501 typedef volatile struct ALT_USB_HOST_HCINT7_s ALT_USB_HOST_HCINT7_t;
30502 #endif /* __ASSEMBLY__ */
30503 
30504 /* The byte offset of the ALT_USB_HOST_HCINT7 register from the beginning of the component. */
30505 #define ALT_USB_HOST_HCINT7_OFST 0x1e8
30506 /* The address of the ALT_USB_HOST_HCINT7 register. */
30507 #define ALT_USB_HOST_HCINT7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT7_OFST))
30508 
30509 /*
30510  * Register : Host Channel 7 Interrupt Mask Register - hcintmsk7
30511  *
30512  * This register reflects the mask for each channel status described in the
30513  * previous section.
30514  *
30515  * Register Layout
30516  *
30517  * Bits | Access | Reset | Description
30518  * :--------|:-------|:------|:----------------------------------
30519  * [0] | RW | 0x0 | Transfer Completed Mask
30520  * [1] | RW | 0x0 | Channel Halted Mask
30521  * [2] | RW | 0x0 | AHB Error Mask
30522  * [10:3] | ??? | 0x0 | *UNDEFINED*
30523  * [11] | RW | 0x0 | BNA Interrupt mask
30524  * [12] | ??? | 0x0 | *UNDEFINED*
30525  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
30526  * [31:14] | ??? | 0x0 | *UNDEFINED*
30527  *
30528  */
30529 /*
30530  * Field : Transfer Completed Mask - xfercomplmsk
30531  *
30532  * Transfer complete.
30533  *
30534  * Field Enumeration Values:
30535  *
30536  * Enum | Value | Description
30537  * :--------------------------------------------|:------|:------------
30538  * ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK_E_MSK | 0x0 | Mask
30539  * ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
30540  *
30541  * Field Access Macros:
30542  *
30543  */
30544 /*
30545  * Enumerated value for register field ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK
30546  *
30547  * Mask
30548  */
30549 #define ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK_E_MSK 0x0
30550 /*
30551  * Enumerated value for register field ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK
30552  *
30553  * No mask
30554  */
30555 #define ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK_E_NOMSK 0x1
30556 
30557 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK register field. */
30558 #define ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK_LSB 0
30559 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK register field. */
30560 #define ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK_MSB 0
30561 /* The width in bits of the ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK register field. */
30562 #define ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK_WIDTH 1
30563 /* The mask used to set the ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK register field value. */
30564 #define ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK_SET_MSK 0x00000001
30565 /* The mask used to clear the ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK register field value. */
30566 #define ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK_CLR_MSK 0xfffffffe
30567 /* The reset value of the ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK register field. */
30568 #define ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK_RESET 0x0
30569 /* Extracts the ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK field value from a register. */
30570 #define ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
30571 /* Produces a ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK register field value suitable for setting the register. */
30572 #define ALT_USB_HOST_HCINTMSK7_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
30573 
30574 /*
30575  * Field : Channel Halted Mask - chhltdmsk
30576  *
30577  * Channel Halted.
30578  *
30579  * Field Enumeration Values:
30580  *
30581  * Enum | Value | Description
30582  * :-----------------------------------------|:------|:------------
30583  * ALT_USB_HOST_HCINTMSK7_CHHLTDMSK_E_MSK | 0x0 | Mask
30584  * ALT_USB_HOST_HCINTMSK7_CHHLTDMSK_E_NOMSK | 0x1 | No mask
30585  *
30586  * Field Access Macros:
30587  *
30588  */
30589 /*
30590  * Enumerated value for register field ALT_USB_HOST_HCINTMSK7_CHHLTDMSK
30591  *
30592  * Mask
30593  */
30594 #define ALT_USB_HOST_HCINTMSK7_CHHLTDMSK_E_MSK 0x0
30595 /*
30596  * Enumerated value for register field ALT_USB_HOST_HCINTMSK7_CHHLTDMSK
30597  *
30598  * No mask
30599  */
30600 #define ALT_USB_HOST_HCINTMSK7_CHHLTDMSK_E_NOMSK 0x1
30601 
30602 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK7_CHHLTDMSK register field. */
30603 #define ALT_USB_HOST_HCINTMSK7_CHHLTDMSK_LSB 1
30604 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK7_CHHLTDMSK register field. */
30605 #define ALT_USB_HOST_HCINTMSK7_CHHLTDMSK_MSB 1
30606 /* The width in bits of the ALT_USB_HOST_HCINTMSK7_CHHLTDMSK register field. */
30607 #define ALT_USB_HOST_HCINTMSK7_CHHLTDMSK_WIDTH 1
30608 /* The mask used to set the ALT_USB_HOST_HCINTMSK7_CHHLTDMSK register field value. */
30609 #define ALT_USB_HOST_HCINTMSK7_CHHLTDMSK_SET_MSK 0x00000002
30610 /* The mask used to clear the ALT_USB_HOST_HCINTMSK7_CHHLTDMSK register field value. */
30611 #define ALT_USB_HOST_HCINTMSK7_CHHLTDMSK_CLR_MSK 0xfffffffd
30612 /* The reset value of the ALT_USB_HOST_HCINTMSK7_CHHLTDMSK register field. */
30613 #define ALT_USB_HOST_HCINTMSK7_CHHLTDMSK_RESET 0x0
30614 /* Extracts the ALT_USB_HOST_HCINTMSK7_CHHLTDMSK field value from a register. */
30615 #define ALT_USB_HOST_HCINTMSK7_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
30616 /* Produces a ALT_USB_HOST_HCINTMSK7_CHHLTDMSK register field value suitable for setting the register. */
30617 #define ALT_USB_HOST_HCINTMSK7_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
30618 
30619 /*
30620  * Field : AHB Error Mask - ahberrmsk
30621  *
30622  * In scatter/gather DMA mode for host, interrupts will not be generated due to
30623  * the corresponding bits set in HCINTn.
30624  *
30625  * Field Enumeration Values:
30626  *
30627  * Enum | Value | Description
30628  * :-----------------------------------------|:------|:------------
30629  * ALT_USB_HOST_HCINTMSK7_AHBERRMSK_E_MSK | 0x0 | Mask
30630  * ALT_USB_HOST_HCINTMSK7_AHBERRMSK_E_NOMSK | 0x1 | No mask
30631  *
30632  * Field Access Macros:
30633  *
30634  */
30635 /*
30636  * Enumerated value for register field ALT_USB_HOST_HCINTMSK7_AHBERRMSK
30637  *
30638  * Mask
30639  */
30640 #define ALT_USB_HOST_HCINTMSK7_AHBERRMSK_E_MSK 0x0
30641 /*
30642  * Enumerated value for register field ALT_USB_HOST_HCINTMSK7_AHBERRMSK
30643  *
30644  * No mask
30645  */
30646 #define ALT_USB_HOST_HCINTMSK7_AHBERRMSK_E_NOMSK 0x1
30647 
30648 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK7_AHBERRMSK register field. */
30649 #define ALT_USB_HOST_HCINTMSK7_AHBERRMSK_LSB 2
30650 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK7_AHBERRMSK register field. */
30651 #define ALT_USB_HOST_HCINTMSK7_AHBERRMSK_MSB 2
30652 /* The width in bits of the ALT_USB_HOST_HCINTMSK7_AHBERRMSK register field. */
30653 #define ALT_USB_HOST_HCINTMSK7_AHBERRMSK_WIDTH 1
30654 /* The mask used to set the ALT_USB_HOST_HCINTMSK7_AHBERRMSK register field value. */
30655 #define ALT_USB_HOST_HCINTMSK7_AHBERRMSK_SET_MSK 0x00000004
30656 /* The mask used to clear the ALT_USB_HOST_HCINTMSK7_AHBERRMSK register field value. */
30657 #define ALT_USB_HOST_HCINTMSK7_AHBERRMSK_CLR_MSK 0xfffffffb
30658 /* The reset value of the ALT_USB_HOST_HCINTMSK7_AHBERRMSK register field. */
30659 #define ALT_USB_HOST_HCINTMSK7_AHBERRMSK_RESET 0x0
30660 /* Extracts the ALT_USB_HOST_HCINTMSK7_AHBERRMSK field value from a register. */
30661 #define ALT_USB_HOST_HCINTMSK7_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
30662 /* Produces a ALT_USB_HOST_HCINTMSK7_AHBERRMSK register field value suitable for setting the register. */
30663 #define ALT_USB_HOST_HCINTMSK7_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
30664 
30665 /*
30666  * Field : BNA Interrupt mask - bnaintrmsk
30667  *
30668  * This bit is valid only when Scatter/Gather DMA mode is enabled.
30669  *
30670  * Field Enumeration Values:
30671  *
30672  * Enum | Value | Description
30673  * :------------------------------------------|:------|:------------
30674  * ALT_USB_HOST_HCINTMSK7_BNAINTRMSK_E_MSK | 0x0 | Mask
30675  * ALT_USB_HOST_HCINTMSK7_BNAINTRMSK_E_NOMSK | 0x1 | No mask
30676  *
30677  * Field Access Macros:
30678  *
30679  */
30680 /*
30681  * Enumerated value for register field ALT_USB_HOST_HCINTMSK7_BNAINTRMSK
30682  *
30683  * Mask
30684  */
30685 #define ALT_USB_HOST_HCINTMSK7_BNAINTRMSK_E_MSK 0x0
30686 /*
30687  * Enumerated value for register field ALT_USB_HOST_HCINTMSK7_BNAINTRMSK
30688  *
30689  * No mask
30690  */
30691 #define ALT_USB_HOST_HCINTMSK7_BNAINTRMSK_E_NOMSK 0x1
30692 
30693 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK7_BNAINTRMSK register field. */
30694 #define ALT_USB_HOST_HCINTMSK7_BNAINTRMSK_LSB 11
30695 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK7_BNAINTRMSK register field. */
30696 #define ALT_USB_HOST_HCINTMSK7_BNAINTRMSK_MSB 11
30697 /* The width in bits of the ALT_USB_HOST_HCINTMSK7_BNAINTRMSK register field. */
30698 #define ALT_USB_HOST_HCINTMSK7_BNAINTRMSK_WIDTH 1
30699 /* The mask used to set the ALT_USB_HOST_HCINTMSK7_BNAINTRMSK register field value. */
30700 #define ALT_USB_HOST_HCINTMSK7_BNAINTRMSK_SET_MSK 0x00000800
30701 /* The mask used to clear the ALT_USB_HOST_HCINTMSK7_BNAINTRMSK register field value. */
30702 #define ALT_USB_HOST_HCINTMSK7_BNAINTRMSK_CLR_MSK 0xfffff7ff
30703 /* The reset value of the ALT_USB_HOST_HCINTMSK7_BNAINTRMSK register field. */
30704 #define ALT_USB_HOST_HCINTMSK7_BNAINTRMSK_RESET 0x0
30705 /* Extracts the ALT_USB_HOST_HCINTMSK7_BNAINTRMSK field value from a register. */
30706 #define ALT_USB_HOST_HCINTMSK7_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
30707 /* Produces a ALT_USB_HOST_HCINTMSK7_BNAINTRMSK register field value suitable for setting the register. */
30708 #define ALT_USB_HOST_HCINTMSK7_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
30709 
30710 /*
30711  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
30712  *
30713  * This bit is valid only when Scatter/Gather DMA mode is enabled.
30714  *
30715  * Field Enumeration Values:
30716  *
30717  * Enum | Value | Description
30718  * :---------------------------------------------------|:------|:------------
30719  * ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
30720  * ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
30721  *
30722  * Field Access Macros:
30723  *
30724  */
30725 /*
30726  * Enumerated value for register field ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK
30727  *
30728  * Mask
30729  */
30730 #define ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK_E_MSK 0x0
30731 /*
30732  * Enumerated value for register field ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK
30733  *
30734  * No mask
30735  */
30736 #define ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
30737 
30738 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK register field. */
30739 #define ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK_LSB 13
30740 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK register field. */
30741 #define ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK_MSB 13
30742 /* The width in bits of the ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK register field. */
30743 #define ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK_WIDTH 1
30744 /* The mask used to set the ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK register field value. */
30745 #define ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
30746 /* The mask used to clear the ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK register field value. */
30747 #define ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
30748 /* The reset value of the ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK register field. */
30749 #define ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK_RESET 0x0
30750 /* Extracts the ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK field value from a register. */
30751 #define ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
30752 /* Produces a ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
30753 #define ALT_USB_HOST_HCINTMSK7_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
30754 
30755 #ifndef __ASSEMBLY__
30756 /*
30757  * WARNING: The C register and register group struct declarations are provided for
30758  * convenience and illustrative purposes. They should, however, be used with
30759  * caution as the C language standard provides no guarantees about the alignment or
30760  * atomicity of device memory accesses. The recommended practice for writing
30761  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
30762  * alt_write_word() functions.
30763  *
30764  * The struct declaration for register ALT_USB_HOST_HCINTMSK7.
30765  */
30766 struct ALT_USB_HOST_HCINTMSK7_s
30767 {
30768  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
30769  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
30770  uint32_t ahberrmsk : 1; /* AHB Error Mask */
30771  uint32_t : 8; /* *UNDEFINED* */
30772  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
30773  uint32_t : 1; /* *UNDEFINED* */
30774  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
30775  uint32_t : 18; /* *UNDEFINED* */
30776 };
30777 
30778 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK7. */
30779 typedef volatile struct ALT_USB_HOST_HCINTMSK7_s ALT_USB_HOST_HCINTMSK7_t;
30780 #endif /* __ASSEMBLY__ */
30781 
30782 /* The byte offset of the ALT_USB_HOST_HCINTMSK7 register from the beginning of the component. */
30783 #define ALT_USB_HOST_HCINTMSK7_OFST 0x1ec
30784 /* The address of the ALT_USB_HOST_HCINTMSK7 register. */
30785 #define ALT_USB_HOST_HCINTMSK7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK7_OFST))
30786 
30787 /*
30788  * Register : Host Channel 7 Transfer Size Register - hctsiz7
30789  *
30790  * Buffer DMA Mode
30791  *
30792  * Register Layout
30793  *
30794  * Bits | Access | Reset | Description
30795  * :--------|:-------|:------|:--------------
30796  * [18:0] | RW | 0x0 | Transfer Size
30797  * [28:19] | RW | 0x0 | Packet Count
30798  * [30:29] | RW | 0x0 | PID
30799  * [31] | RW | 0x0 | Do Ping
30800  *
30801  */
30802 /*
30803  * Field : Transfer Size - xfersize
30804  *
30805  * for an OUT, this field is the number of data bytes the host sends during the
30806  * transfer. for an IN, this field is the buffer size that the application has
30807  * Reserved for the transfer. The application is expected to program this field as
30808  * an integer multiple of the maximum packet size for IN transactions (periodic and
30809  * non-periodic).The width of this counter is specified as 19 bits.
30810  *
30811  * Field Access Macros:
30812  *
30813  */
30814 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ7_XFERSIZE register field. */
30815 #define ALT_USB_HOST_HCTSIZ7_XFERSIZE_LSB 0
30816 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ7_XFERSIZE register field. */
30817 #define ALT_USB_HOST_HCTSIZ7_XFERSIZE_MSB 18
30818 /* The width in bits of the ALT_USB_HOST_HCTSIZ7_XFERSIZE register field. */
30819 #define ALT_USB_HOST_HCTSIZ7_XFERSIZE_WIDTH 19
30820 /* The mask used to set the ALT_USB_HOST_HCTSIZ7_XFERSIZE register field value. */
30821 #define ALT_USB_HOST_HCTSIZ7_XFERSIZE_SET_MSK 0x0007ffff
30822 /* The mask used to clear the ALT_USB_HOST_HCTSIZ7_XFERSIZE register field value. */
30823 #define ALT_USB_HOST_HCTSIZ7_XFERSIZE_CLR_MSK 0xfff80000
30824 /* The reset value of the ALT_USB_HOST_HCTSIZ7_XFERSIZE register field. */
30825 #define ALT_USB_HOST_HCTSIZ7_XFERSIZE_RESET 0x0
30826 /* Extracts the ALT_USB_HOST_HCTSIZ7_XFERSIZE field value from a register. */
30827 #define ALT_USB_HOST_HCTSIZ7_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
30828 /* Produces a ALT_USB_HOST_HCTSIZ7_XFERSIZE register field value suitable for setting the register. */
30829 #define ALT_USB_HOST_HCTSIZ7_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
30830 
30831 /*
30832  * Field : Packet Count - pktcnt
30833  *
30834  * This field is programmed by the application with the expected number of packets
30835  * to be transmitted (OUT) or received (IN). The host decrements this count on
30836  * every successful transmission or reception of an OUT/IN packet. Once this count
30837  * reaches zero, the application is interrupted to indicate normal completion. The
30838  * width of this counter is specified as 10 bits.
30839  *
30840  * Field Access Macros:
30841  *
30842  */
30843 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ7_PKTCNT register field. */
30844 #define ALT_USB_HOST_HCTSIZ7_PKTCNT_LSB 19
30845 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ7_PKTCNT register field. */
30846 #define ALT_USB_HOST_HCTSIZ7_PKTCNT_MSB 28
30847 /* The width in bits of the ALT_USB_HOST_HCTSIZ7_PKTCNT register field. */
30848 #define ALT_USB_HOST_HCTSIZ7_PKTCNT_WIDTH 10
30849 /* The mask used to set the ALT_USB_HOST_HCTSIZ7_PKTCNT register field value. */
30850 #define ALT_USB_HOST_HCTSIZ7_PKTCNT_SET_MSK 0x1ff80000
30851 /* The mask used to clear the ALT_USB_HOST_HCTSIZ7_PKTCNT register field value. */
30852 #define ALT_USB_HOST_HCTSIZ7_PKTCNT_CLR_MSK 0xe007ffff
30853 /* The reset value of the ALT_USB_HOST_HCTSIZ7_PKTCNT register field. */
30854 #define ALT_USB_HOST_HCTSIZ7_PKTCNT_RESET 0x0
30855 /* Extracts the ALT_USB_HOST_HCTSIZ7_PKTCNT field value from a register. */
30856 #define ALT_USB_HOST_HCTSIZ7_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
30857 /* Produces a ALT_USB_HOST_HCTSIZ7_PKTCNT register field value suitable for setting the register. */
30858 #define ALT_USB_HOST_HCTSIZ7_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
30859 
30860 /*
30861  * Field : PID - pid
30862  *
30863  * The application programs this field with the type of PID to use forthe initial
30864  * transaction. The host maintains this field for the rest of the transfer.
30865  *
30866  * Field Enumeration Values:
30867  *
30868  * Enum | Value | Description
30869  * :---------------------------------|:------|:------------------------------------
30870  * ALT_USB_HOST_HCTSIZ7_PID_E_DATA0 | 0x0 | DATA0
30871  * ALT_USB_HOST_HCTSIZ7_PID_E_DATA2 | 0x1 | DATA2
30872  * ALT_USB_HOST_HCTSIZ7_PID_E_DATA1 | 0x2 | DATA1
30873  * ALT_USB_HOST_HCTSIZ7_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
30874  *
30875  * Field Access Macros:
30876  *
30877  */
30878 /*
30879  * Enumerated value for register field ALT_USB_HOST_HCTSIZ7_PID
30880  *
30881  * DATA0
30882  */
30883 #define ALT_USB_HOST_HCTSIZ7_PID_E_DATA0 0x0
30884 /*
30885  * Enumerated value for register field ALT_USB_HOST_HCTSIZ7_PID
30886  *
30887  * DATA2
30888  */
30889 #define ALT_USB_HOST_HCTSIZ7_PID_E_DATA2 0x1
30890 /*
30891  * Enumerated value for register field ALT_USB_HOST_HCTSIZ7_PID
30892  *
30893  * DATA1
30894  */
30895 #define ALT_USB_HOST_HCTSIZ7_PID_E_DATA1 0x2
30896 /*
30897  * Enumerated value for register field ALT_USB_HOST_HCTSIZ7_PID
30898  *
30899  * MDATA (non-control)/SETUP (control)
30900  */
30901 #define ALT_USB_HOST_HCTSIZ7_PID_E_MDATA 0x3
30902 
30903 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ7_PID register field. */
30904 #define ALT_USB_HOST_HCTSIZ7_PID_LSB 29
30905 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ7_PID register field. */
30906 #define ALT_USB_HOST_HCTSIZ7_PID_MSB 30
30907 /* The width in bits of the ALT_USB_HOST_HCTSIZ7_PID register field. */
30908 #define ALT_USB_HOST_HCTSIZ7_PID_WIDTH 2
30909 /* The mask used to set the ALT_USB_HOST_HCTSIZ7_PID register field value. */
30910 #define ALT_USB_HOST_HCTSIZ7_PID_SET_MSK 0x60000000
30911 /* The mask used to clear the ALT_USB_HOST_HCTSIZ7_PID register field value. */
30912 #define ALT_USB_HOST_HCTSIZ7_PID_CLR_MSK 0x9fffffff
30913 /* The reset value of the ALT_USB_HOST_HCTSIZ7_PID register field. */
30914 #define ALT_USB_HOST_HCTSIZ7_PID_RESET 0x0
30915 /* Extracts the ALT_USB_HOST_HCTSIZ7_PID field value from a register. */
30916 #define ALT_USB_HOST_HCTSIZ7_PID_GET(value) (((value) & 0x60000000) >> 29)
30917 /* Produces a ALT_USB_HOST_HCTSIZ7_PID register field value suitable for setting the register. */
30918 #define ALT_USB_HOST_HCTSIZ7_PID_SET(value) (((value) << 29) & 0x60000000)
30919 
30920 /*
30921  * Field : Do Ping - dopng
30922  *
30923  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
30924  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
30925  * for IN transfers it disables the channel.
30926  *
30927  * Field Enumeration Values:
30928  *
30929  * Enum | Value | Description
30930  * :------------------------------------|:------|:-----------------
30931  * ALT_USB_HOST_HCTSIZ7_DOPNG_E_NOPING | 0x0 | No ping protocol
30932  * ALT_USB_HOST_HCTSIZ7_DOPNG_E_PING | 0x1 | Ping protocol
30933  *
30934  * Field Access Macros:
30935  *
30936  */
30937 /*
30938  * Enumerated value for register field ALT_USB_HOST_HCTSIZ7_DOPNG
30939  *
30940  * No ping protocol
30941  */
30942 #define ALT_USB_HOST_HCTSIZ7_DOPNG_E_NOPING 0x0
30943 /*
30944  * Enumerated value for register field ALT_USB_HOST_HCTSIZ7_DOPNG
30945  *
30946  * Ping protocol
30947  */
30948 #define ALT_USB_HOST_HCTSIZ7_DOPNG_E_PING 0x1
30949 
30950 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ7_DOPNG register field. */
30951 #define ALT_USB_HOST_HCTSIZ7_DOPNG_LSB 31
30952 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ7_DOPNG register field. */
30953 #define ALT_USB_HOST_HCTSIZ7_DOPNG_MSB 31
30954 /* The width in bits of the ALT_USB_HOST_HCTSIZ7_DOPNG register field. */
30955 #define ALT_USB_HOST_HCTSIZ7_DOPNG_WIDTH 1
30956 /* The mask used to set the ALT_USB_HOST_HCTSIZ7_DOPNG register field value. */
30957 #define ALT_USB_HOST_HCTSIZ7_DOPNG_SET_MSK 0x80000000
30958 /* The mask used to clear the ALT_USB_HOST_HCTSIZ7_DOPNG register field value. */
30959 #define ALT_USB_HOST_HCTSIZ7_DOPNG_CLR_MSK 0x7fffffff
30960 /* The reset value of the ALT_USB_HOST_HCTSIZ7_DOPNG register field. */
30961 #define ALT_USB_HOST_HCTSIZ7_DOPNG_RESET 0x0
30962 /* Extracts the ALT_USB_HOST_HCTSIZ7_DOPNG field value from a register. */
30963 #define ALT_USB_HOST_HCTSIZ7_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
30964 /* Produces a ALT_USB_HOST_HCTSIZ7_DOPNG register field value suitable for setting the register. */
30965 #define ALT_USB_HOST_HCTSIZ7_DOPNG_SET(value) (((value) << 31) & 0x80000000)
30966 
30967 #ifndef __ASSEMBLY__
30968 /*
30969  * WARNING: The C register and register group struct declarations are provided for
30970  * convenience and illustrative purposes. They should, however, be used with
30971  * caution as the C language standard provides no guarantees about the alignment or
30972  * atomicity of device memory accesses. The recommended practice for writing
30973  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
30974  * alt_write_word() functions.
30975  *
30976  * The struct declaration for register ALT_USB_HOST_HCTSIZ7.
30977  */
30978 struct ALT_USB_HOST_HCTSIZ7_s
30979 {
30980  uint32_t xfersize : 19; /* Transfer Size */
30981  uint32_t pktcnt : 10; /* Packet Count */
30982  uint32_t pid : 2; /* PID */
30983  uint32_t dopng : 1; /* Do Ping */
30984 };
30985 
30986 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ7. */
30987 typedef volatile struct ALT_USB_HOST_HCTSIZ7_s ALT_USB_HOST_HCTSIZ7_t;
30988 #endif /* __ASSEMBLY__ */
30989 
30990 /* The byte offset of the ALT_USB_HOST_HCTSIZ7 register from the beginning of the component. */
30991 #define ALT_USB_HOST_HCTSIZ7_OFST 0x1f0
30992 /* The address of the ALT_USB_HOST_HCTSIZ7 register. */
30993 #define ALT_USB_HOST_HCTSIZ7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ7_OFST))
30994 
30995 /*
30996  * Register : Host Channel 7 DMA Address Register - hcdma7
30997  *
30998  * This register is used by the OTG host in the internal DMA mode to maintain the
30999  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
31000  * DWORD-aligned.
31001  *
31002  * Register Layout
31003  *
31004  * Bits | Access | Reset | Description
31005  * :-------|:-------|:------|:------------
31006  * [31:0] | RW | 0x0 | DMA Address
31007  *
31008  */
31009 /*
31010  * Field : DMA Address - hcdma7
31011  *
31012  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
31013  * first descriptor in the list should be located in this address. The first
31014  * descriptor may be or may not be ready. The core starts processing the list from
31015  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
31016  * in which the isochronous descriptors are present where N is based on nTD as per
31017  * Table below
31018  *
31019  * [31:N] Base Address [N-1:3] Offset [2:0] 000
31020  *
31021  * HS ISOC FS ISOC
31022  *
31023  * nTD N nTD N
31024  *
31025  * 7 6 1 4
31026  *
31027  * 15 7 3 5
31028  *
31029  * 31 8 7 6
31030  *
31031  * 63 9 15 7
31032  *
31033  * 127 10 31 8
31034  *
31035  * 255 11 63 9
31036  *
31037  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
31038  * This value is in terms of number of descriptors. The values can be from 0 to 63.
31039  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
31040  * descriptor processed in the list. This field is updated both by application and
31041  * the core. for example, if the application enables the channel after programming
31042  * CTD=5, then the core will start processing the 6th descriptor. The address is
31043  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
31044  * CTD for isochronous is based on the current frame/microframe value. Need to be
31045  * set to zero by application.
31046  *
31047  * Field Access Macros:
31048  *
31049  */
31050 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA7_HCDMA7 register field. */
31051 #define ALT_USB_HOST_HCDMA7_HCDMA7_LSB 0
31052 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA7_HCDMA7 register field. */
31053 #define ALT_USB_HOST_HCDMA7_HCDMA7_MSB 31
31054 /* The width in bits of the ALT_USB_HOST_HCDMA7_HCDMA7 register field. */
31055 #define ALT_USB_HOST_HCDMA7_HCDMA7_WIDTH 32
31056 /* The mask used to set the ALT_USB_HOST_HCDMA7_HCDMA7 register field value. */
31057 #define ALT_USB_HOST_HCDMA7_HCDMA7_SET_MSK 0xffffffff
31058 /* The mask used to clear the ALT_USB_HOST_HCDMA7_HCDMA7 register field value. */
31059 #define ALT_USB_HOST_HCDMA7_HCDMA7_CLR_MSK 0x00000000
31060 /* The reset value of the ALT_USB_HOST_HCDMA7_HCDMA7 register field. */
31061 #define ALT_USB_HOST_HCDMA7_HCDMA7_RESET 0x0
31062 /* Extracts the ALT_USB_HOST_HCDMA7_HCDMA7 field value from a register. */
31063 #define ALT_USB_HOST_HCDMA7_HCDMA7_GET(value) (((value) & 0xffffffff) >> 0)
31064 /* Produces a ALT_USB_HOST_HCDMA7_HCDMA7 register field value suitable for setting the register. */
31065 #define ALT_USB_HOST_HCDMA7_HCDMA7_SET(value) (((value) << 0) & 0xffffffff)
31066 
31067 #ifndef __ASSEMBLY__
31068 /*
31069  * WARNING: The C register and register group struct declarations are provided for
31070  * convenience and illustrative purposes. They should, however, be used with
31071  * caution as the C language standard provides no guarantees about the alignment or
31072  * atomicity of device memory accesses. The recommended practice for writing
31073  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
31074  * alt_write_word() functions.
31075  *
31076  * The struct declaration for register ALT_USB_HOST_HCDMA7.
31077  */
31078 struct ALT_USB_HOST_HCDMA7_s
31079 {
31080  uint32_t hcdma7 : 32; /* DMA Address */
31081 };
31082 
31083 /* The typedef declaration for register ALT_USB_HOST_HCDMA7. */
31084 typedef volatile struct ALT_USB_HOST_HCDMA7_s ALT_USB_HOST_HCDMA7_t;
31085 #endif /* __ASSEMBLY__ */
31086 
31087 /* The byte offset of the ALT_USB_HOST_HCDMA7 register from the beginning of the component. */
31088 #define ALT_USB_HOST_HCDMA7_OFST 0x1f4
31089 /* The address of the ALT_USB_HOST_HCDMA7 register. */
31090 #define ALT_USB_HOST_HCDMA7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA7_OFST))
31091 
31092 /*
31093  * Register : Host Channel 7 DMA Buffer Address Register - hcdmab7
31094  *
31095  * These registers are present only in case of Scatter/Gather DMA. These
31096  * registers are implemented in RAM instead of flop-based implementation. Holds
31097  * the current buffer address. This register is updated as and when the
31098  * data transfer for the corresponding end point is in progress. This
31099  * register is present only in Scatter/Gather DMA mode. Otherwise this field
31100  * is reserved.
31101  *
31102  * Register Layout
31103  *
31104  * Bits | Access | Reset | Description
31105  * :-------|:-------|:------|:----------------------------------
31106  * [31:0] | RW | 0x0 | Host Channel 7 DMA Buffer Address
31107  *
31108  */
31109 /*
31110  * Field : Host Channel 7 DMA Buffer Address - hcdmab7
31111  *
31112  * These registers are present only in case of Scatter/Gather DMA. These
31113  * registers are implemented in RAM instead of flop-based implementation. Holds
31114  * the current buffer address. This register is updated as and when the data
31115  * transfer for the corresponding end point is in progress. This register is
31116  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
31117  *
31118  * Field Access Macros:
31119  *
31120  */
31121 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB7_HCDMAB7 register field. */
31122 #define ALT_USB_HOST_HCDMAB7_HCDMAB7_LSB 0
31123 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB7_HCDMAB7 register field. */
31124 #define ALT_USB_HOST_HCDMAB7_HCDMAB7_MSB 31
31125 /* The width in bits of the ALT_USB_HOST_HCDMAB7_HCDMAB7 register field. */
31126 #define ALT_USB_HOST_HCDMAB7_HCDMAB7_WIDTH 32
31127 /* The mask used to set the ALT_USB_HOST_HCDMAB7_HCDMAB7 register field value. */
31128 #define ALT_USB_HOST_HCDMAB7_HCDMAB7_SET_MSK 0xffffffff
31129 /* The mask used to clear the ALT_USB_HOST_HCDMAB7_HCDMAB7 register field value. */
31130 #define ALT_USB_HOST_HCDMAB7_HCDMAB7_CLR_MSK 0x00000000
31131 /* The reset value of the ALT_USB_HOST_HCDMAB7_HCDMAB7 register field. */
31132 #define ALT_USB_HOST_HCDMAB7_HCDMAB7_RESET 0x0
31133 /* Extracts the ALT_USB_HOST_HCDMAB7_HCDMAB7 field value from a register. */
31134 #define ALT_USB_HOST_HCDMAB7_HCDMAB7_GET(value) (((value) & 0xffffffff) >> 0)
31135 /* Produces a ALT_USB_HOST_HCDMAB7_HCDMAB7 register field value suitable for setting the register. */
31136 #define ALT_USB_HOST_HCDMAB7_HCDMAB7_SET(value) (((value) << 0) & 0xffffffff)
31137 
31138 #ifndef __ASSEMBLY__
31139 /*
31140  * WARNING: The C register and register group struct declarations are provided for
31141  * convenience and illustrative purposes. They should, however, be used with
31142  * caution as the C language standard provides no guarantees about the alignment or
31143  * atomicity of device memory accesses. The recommended practice for writing
31144  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
31145  * alt_write_word() functions.
31146  *
31147  * The struct declaration for register ALT_USB_HOST_HCDMAB7.
31148  */
31149 struct ALT_USB_HOST_HCDMAB7_s
31150 {
31151  uint32_t hcdmab7 : 32; /* Host Channel 7 DMA Buffer Address */
31152 };
31153 
31154 /* The typedef declaration for register ALT_USB_HOST_HCDMAB7. */
31155 typedef volatile struct ALT_USB_HOST_HCDMAB7_s ALT_USB_HOST_HCDMAB7_t;
31156 #endif /* __ASSEMBLY__ */
31157 
31158 /* The byte offset of the ALT_USB_HOST_HCDMAB7 register from the beginning of the component. */
31159 #define ALT_USB_HOST_HCDMAB7_OFST 0x1f8
31160 /* The address of the ALT_USB_HOST_HCDMAB7 register. */
31161 #define ALT_USB_HOST_HCDMAB7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB7_OFST))
31162 
31163 /*
31164  * Register : Host Channel 8 Characteristics Register - hcchar8
31165  *
31166  * Host Channel 8 Characteristics Register
31167  *
31168  * Register Layout
31169  *
31170  * Bits | Access | Reset | Description
31171  * :--------|:-------|:------|:--------------------
31172  * [10:0] | RW | 0x0 | Maximum Packet Size
31173  * [14:11] | RW | 0x0 | Endpoint Number
31174  * [15] | RW | 0x0 | Endpoint Direction
31175  * [16] | ??? | 0x0 | *UNDEFINED*
31176  * [17] | RW | 0x0 | Low-Speed Device
31177  * [19:18] | RW | 0x0 | Endpoint Type
31178  * [21:20] | RW | 0x0 | Multi Count
31179  * [28:22] | RW | 0x0 | Device Address
31180  * [29] | ??? | 0x0 | *UNDEFINED*
31181  * [30] | R | 0x0 | Channel Disable
31182  * [31] | R | 0x0 | Channel Enable
31183  *
31184  */
31185 /*
31186  * Field : Maximum Packet Size - mps
31187  *
31188  * Indicates the maximum packet size of the associated endpoint.
31189  *
31190  * Field Access Macros:
31191  *
31192  */
31193 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR8_MPS register field. */
31194 #define ALT_USB_HOST_HCCHAR8_MPS_LSB 0
31195 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR8_MPS register field. */
31196 #define ALT_USB_HOST_HCCHAR8_MPS_MSB 10
31197 /* The width in bits of the ALT_USB_HOST_HCCHAR8_MPS register field. */
31198 #define ALT_USB_HOST_HCCHAR8_MPS_WIDTH 11
31199 /* The mask used to set the ALT_USB_HOST_HCCHAR8_MPS register field value. */
31200 #define ALT_USB_HOST_HCCHAR8_MPS_SET_MSK 0x000007ff
31201 /* The mask used to clear the ALT_USB_HOST_HCCHAR8_MPS register field value. */
31202 #define ALT_USB_HOST_HCCHAR8_MPS_CLR_MSK 0xfffff800
31203 /* The reset value of the ALT_USB_HOST_HCCHAR8_MPS register field. */
31204 #define ALT_USB_HOST_HCCHAR8_MPS_RESET 0x0
31205 /* Extracts the ALT_USB_HOST_HCCHAR8_MPS field value from a register. */
31206 #define ALT_USB_HOST_HCCHAR8_MPS_GET(value) (((value) & 0x000007ff) >> 0)
31207 /* Produces a ALT_USB_HOST_HCCHAR8_MPS register field value suitable for setting the register. */
31208 #define ALT_USB_HOST_HCCHAR8_MPS_SET(value) (((value) << 0) & 0x000007ff)
31209 
31210 /*
31211  * Field : Endpoint Number - epnum
31212  *
31213  * Indicates the endpoint number on the device serving as the data source or sink.
31214  *
31215  * Field Enumeration Values:
31216  *
31217  * Enum | Value | Description
31218  * :-------------------------------------|:------|:--------------
31219  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT0 | 0x0 | End point 0
31220  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT1 | 0x1 | End point 1
31221  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT2 | 0x2 | End point 2
31222  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT3 | 0x3 | End point 3
31223  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT4 | 0x4 | End point 4
31224  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT5 | 0x5 | End point 5
31225  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT6 | 0x6 | End point 6
31226  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT7 | 0x7 | End point 7
31227  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT8 | 0x8 | End point 8
31228  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT9 | 0x9 | End point 9
31229  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT10 | 0xa | End point 10
31230  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT11 | 0xb | End point 11
31231  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT12 | 0xc | End point 12
31232  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT13 | 0xd | End point 13
31233  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT14 | 0xe | End point 14
31234  * ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT15 | 0xf | End point 15
31235  *
31236  * Field Access Macros:
31237  *
31238  */
31239 /*
31240  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31241  *
31242  * End point 0
31243  */
31244 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT0 0x0
31245 /*
31246  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31247  *
31248  * End point 1
31249  */
31250 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT1 0x1
31251 /*
31252  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31253  *
31254  * End point 2
31255  */
31256 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT2 0x2
31257 /*
31258  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31259  *
31260  * End point 3
31261  */
31262 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT3 0x3
31263 /*
31264  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31265  *
31266  * End point 4
31267  */
31268 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT4 0x4
31269 /*
31270  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31271  *
31272  * End point 5
31273  */
31274 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT5 0x5
31275 /*
31276  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31277  *
31278  * End point 6
31279  */
31280 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT6 0x6
31281 /*
31282  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31283  *
31284  * End point 7
31285  */
31286 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT7 0x7
31287 /*
31288  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31289  *
31290  * End point 8
31291  */
31292 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT8 0x8
31293 /*
31294  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31295  *
31296  * End point 9
31297  */
31298 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT9 0x9
31299 /*
31300  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31301  *
31302  * End point 10
31303  */
31304 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT10 0xa
31305 /*
31306  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31307  *
31308  * End point 11
31309  */
31310 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT11 0xb
31311 /*
31312  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31313  *
31314  * End point 12
31315  */
31316 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT12 0xc
31317 /*
31318  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31319  *
31320  * End point 13
31321  */
31322 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT13 0xd
31323 /*
31324  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31325  *
31326  * End point 14
31327  */
31328 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT14 0xe
31329 /*
31330  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPNUM
31331  *
31332  * End point 15
31333  */
31334 #define ALT_USB_HOST_HCCHAR8_EPNUM_E_ENDPT15 0xf
31335 
31336 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR8_EPNUM register field. */
31337 #define ALT_USB_HOST_HCCHAR8_EPNUM_LSB 11
31338 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR8_EPNUM register field. */
31339 #define ALT_USB_HOST_HCCHAR8_EPNUM_MSB 14
31340 /* The width in bits of the ALT_USB_HOST_HCCHAR8_EPNUM register field. */
31341 #define ALT_USB_HOST_HCCHAR8_EPNUM_WIDTH 4
31342 /* The mask used to set the ALT_USB_HOST_HCCHAR8_EPNUM register field value. */
31343 #define ALT_USB_HOST_HCCHAR8_EPNUM_SET_MSK 0x00007800
31344 /* The mask used to clear the ALT_USB_HOST_HCCHAR8_EPNUM register field value. */
31345 #define ALT_USB_HOST_HCCHAR8_EPNUM_CLR_MSK 0xffff87ff
31346 /* The reset value of the ALT_USB_HOST_HCCHAR8_EPNUM register field. */
31347 #define ALT_USB_HOST_HCCHAR8_EPNUM_RESET 0x0
31348 /* Extracts the ALT_USB_HOST_HCCHAR8_EPNUM field value from a register. */
31349 #define ALT_USB_HOST_HCCHAR8_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
31350 /* Produces a ALT_USB_HOST_HCCHAR8_EPNUM register field value suitable for setting the register. */
31351 #define ALT_USB_HOST_HCCHAR8_EPNUM_SET(value) (((value) << 11) & 0x00007800)
31352 
31353 /*
31354  * Field : Endpoint Direction - epdir
31355  *
31356  * Indicates whether the transaction is IN or OUT.
31357  *
31358  * Field Enumeration Values:
31359  *
31360  * Enum | Value | Description
31361  * :---------------------------------|:------|:--------------
31362  * ALT_USB_HOST_HCCHAR8_EPDIR_E_OUT | 0x0 | OUT Direction
31363  * ALT_USB_HOST_HCCHAR8_EPDIR_E_IN | 0x1 | IN Direction
31364  *
31365  * Field Access Macros:
31366  *
31367  */
31368 /*
31369  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPDIR
31370  *
31371  * OUT Direction
31372  */
31373 #define ALT_USB_HOST_HCCHAR8_EPDIR_E_OUT 0x0
31374 /*
31375  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPDIR
31376  *
31377  * IN Direction
31378  */
31379 #define ALT_USB_HOST_HCCHAR8_EPDIR_E_IN 0x1
31380 
31381 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR8_EPDIR register field. */
31382 #define ALT_USB_HOST_HCCHAR8_EPDIR_LSB 15
31383 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR8_EPDIR register field. */
31384 #define ALT_USB_HOST_HCCHAR8_EPDIR_MSB 15
31385 /* The width in bits of the ALT_USB_HOST_HCCHAR8_EPDIR register field. */
31386 #define ALT_USB_HOST_HCCHAR8_EPDIR_WIDTH 1
31387 /* The mask used to set the ALT_USB_HOST_HCCHAR8_EPDIR register field value. */
31388 #define ALT_USB_HOST_HCCHAR8_EPDIR_SET_MSK 0x00008000
31389 /* The mask used to clear the ALT_USB_HOST_HCCHAR8_EPDIR register field value. */
31390 #define ALT_USB_HOST_HCCHAR8_EPDIR_CLR_MSK 0xffff7fff
31391 /* The reset value of the ALT_USB_HOST_HCCHAR8_EPDIR register field. */
31392 #define ALT_USB_HOST_HCCHAR8_EPDIR_RESET 0x0
31393 /* Extracts the ALT_USB_HOST_HCCHAR8_EPDIR field value from a register. */
31394 #define ALT_USB_HOST_HCCHAR8_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
31395 /* Produces a ALT_USB_HOST_HCCHAR8_EPDIR register field value suitable for setting the register. */
31396 #define ALT_USB_HOST_HCCHAR8_EPDIR_SET(value) (((value) << 15) & 0x00008000)
31397 
31398 /*
31399  * Field : Low-Speed Device - lspddev
31400  *
31401  * This field is set by the application to indicate that this channel is
31402  * communicating to a low-speed device. The application must program this bit when
31403  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
31404  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
31405  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
31406  * core ignores this bit even if it is set by the application software
31407  *
31408  * Field Enumeration Values:
31409  *
31410  * Enum | Value | Description
31411  * :------------------------------------|:------|:----------------------------------------
31412  * ALT_USB_HOST_HCCHAR8_LSPDDEV_E_DISD | 0x0 | Not Communicating with low speed device
31413  * ALT_USB_HOST_HCCHAR8_LSPDDEV_E_END | 0x1 | Communicating with low speed device
31414  *
31415  * Field Access Macros:
31416  *
31417  */
31418 /*
31419  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_LSPDDEV
31420  *
31421  * Not Communicating with low speed device
31422  */
31423 #define ALT_USB_HOST_HCCHAR8_LSPDDEV_E_DISD 0x0
31424 /*
31425  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_LSPDDEV
31426  *
31427  * Communicating with low speed device
31428  */
31429 #define ALT_USB_HOST_HCCHAR8_LSPDDEV_E_END 0x1
31430 
31431 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR8_LSPDDEV register field. */
31432 #define ALT_USB_HOST_HCCHAR8_LSPDDEV_LSB 17
31433 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR8_LSPDDEV register field. */
31434 #define ALT_USB_HOST_HCCHAR8_LSPDDEV_MSB 17
31435 /* The width in bits of the ALT_USB_HOST_HCCHAR8_LSPDDEV register field. */
31436 #define ALT_USB_HOST_HCCHAR8_LSPDDEV_WIDTH 1
31437 /* The mask used to set the ALT_USB_HOST_HCCHAR8_LSPDDEV register field value. */
31438 #define ALT_USB_HOST_HCCHAR8_LSPDDEV_SET_MSK 0x00020000
31439 /* The mask used to clear the ALT_USB_HOST_HCCHAR8_LSPDDEV register field value. */
31440 #define ALT_USB_HOST_HCCHAR8_LSPDDEV_CLR_MSK 0xfffdffff
31441 /* The reset value of the ALT_USB_HOST_HCCHAR8_LSPDDEV register field. */
31442 #define ALT_USB_HOST_HCCHAR8_LSPDDEV_RESET 0x0
31443 /* Extracts the ALT_USB_HOST_HCCHAR8_LSPDDEV field value from a register. */
31444 #define ALT_USB_HOST_HCCHAR8_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
31445 /* Produces a ALT_USB_HOST_HCCHAR8_LSPDDEV register field value suitable for setting the register. */
31446 #define ALT_USB_HOST_HCCHAR8_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
31447 
31448 /*
31449  * Field : Endpoint Type - eptype
31450  *
31451  * Indicates the transfer type selected.
31452  *
31453  * Field Enumeration Values:
31454  *
31455  * Enum | Value | Description
31456  * :-------------------------------------|:------|:------------
31457  * ALT_USB_HOST_HCCHAR8_EPTYPE_E_CTL | 0x0 | Control
31458  * ALT_USB_HOST_HCCHAR8_EPTYPE_E_ISOC | 0x1 | Isochronous
31459  * ALT_USB_HOST_HCCHAR8_EPTYPE_E_BULK | 0x2 | Bulk
31460  * ALT_USB_HOST_HCCHAR8_EPTYPE_E_INTERR | 0x3 | Interrupt
31461  *
31462  * Field Access Macros:
31463  *
31464  */
31465 /*
31466  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPTYPE
31467  *
31468  * Control
31469  */
31470 #define ALT_USB_HOST_HCCHAR8_EPTYPE_E_CTL 0x0
31471 /*
31472  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPTYPE
31473  *
31474  * Isochronous
31475  */
31476 #define ALT_USB_HOST_HCCHAR8_EPTYPE_E_ISOC 0x1
31477 /*
31478  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPTYPE
31479  *
31480  * Bulk
31481  */
31482 #define ALT_USB_HOST_HCCHAR8_EPTYPE_E_BULK 0x2
31483 /*
31484  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EPTYPE
31485  *
31486  * Interrupt
31487  */
31488 #define ALT_USB_HOST_HCCHAR8_EPTYPE_E_INTERR 0x3
31489 
31490 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR8_EPTYPE register field. */
31491 #define ALT_USB_HOST_HCCHAR8_EPTYPE_LSB 18
31492 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR8_EPTYPE register field. */
31493 #define ALT_USB_HOST_HCCHAR8_EPTYPE_MSB 19
31494 /* The width in bits of the ALT_USB_HOST_HCCHAR8_EPTYPE register field. */
31495 #define ALT_USB_HOST_HCCHAR8_EPTYPE_WIDTH 2
31496 /* The mask used to set the ALT_USB_HOST_HCCHAR8_EPTYPE register field value. */
31497 #define ALT_USB_HOST_HCCHAR8_EPTYPE_SET_MSK 0x000c0000
31498 /* The mask used to clear the ALT_USB_HOST_HCCHAR8_EPTYPE register field value. */
31499 #define ALT_USB_HOST_HCCHAR8_EPTYPE_CLR_MSK 0xfff3ffff
31500 /* The reset value of the ALT_USB_HOST_HCCHAR8_EPTYPE register field. */
31501 #define ALT_USB_HOST_HCCHAR8_EPTYPE_RESET 0x0
31502 /* Extracts the ALT_USB_HOST_HCCHAR8_EPTYPE field value from a register. */
31503 #define ALT_USB_HOST_HCCHAR8_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
31504 /* Produces a ALT_USB_HOST_HCCHAR8_EPTYPE register field value suitable for setting the register. */
31505 #define ALT_USB_HOST_HCCHAR8_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
31506 
31507 /*
31508  * Field : Multi Count - ec
31509  *
31510  * When the Split Enable bit of the Host Channel-n Split Control register
31511  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
31512  * transactions that must be executed per microframe for this periodic endpoint.
31513  * for non periodic transfers, this field is used only in DMA mode, and specifies
31514  * the number packets to be fetched for this channel before the internal DMA engine
31515  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
31516  * number of immediate retries to be performed for a periodic split transactions on
31517  * transaction errors. This field must be set to at least 1.
31518  *
31519  * Field Enumeration Values:
31520  *
31521  * Enum | Value | Description
31522  * :-------------------------------------|:------|:----------------------------------------------
31523  * ALT_USB_HOST_HCCHAR8_EC_E_RSVD | 0x0 | Reserved This field yields undefined result
31524  * ALT_USB_HOST_HCCHAR8_EC_E_TRANSONE | 0x1 | 1 transaction
31525  * ALT_USB_HOST_HCCHAR8_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
31526  * : | | per microframe
31527  * ALT_USB_HOST_HCCHAR8_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
31528  * : | | per microframe
31529  *
31530  * Field Access Macros:
31531  *
31532  */
31533 /*
31534  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EC
31535  *
31536  * Reserved This field yields undefined result
31537  */
31538 #define ALT_USB_HOST_HCCHAR8_EC_E_RSVD 0x0
31539 /*
31540  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EC
31541  *
31542  * 1 transaction
31543  */
31544 #define ALT_USB_HOST_HCCHAR8_EC_E_TRANSONE 0x1
31545 /*
31546  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EC
31547  *
31548  * 2 transactions to be issued for this endpoint per microframe
31549  */
31550 #define ALT_USB_HOST_HCCHAR8_EC_E_TRANSTWO 0x2
31551 /*
31552  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_EC
31553  *
31554  * 3 transactions to be issued for this endpoint per microframe
31555  */
31556 #define ALT_USB_HOST_HCCHAR8_EC_E_TRANSTHREE 0x3
31557 
31558 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR8_EC register field. */
31559 #define ALT_USB_HOST_HCCHAR8_EC_LSB 20
31560 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR8_EC register field. */
31561 #define ALT_USB_HOST_HCCHAR8_EC_MSB 21
31562 /* The width in bits of the ALT_USB_HOST_HCCHAR8_EC register field. */
31563 #define ALT_USB_HOST_HCCHAR8_EC_WIDTH 2
31564 /* The mask used to set the ALT_USB_HOST_HCCHAR8_EC register field value. */
31565 #define ALT_USB_HOST_HCCHAR8_EC_SET_MSK 0x00300000
31566 /* The mask used to clear the ALT_USB_HOST_HCCHAR8_EC register field value. */
31567 #define ALT_USB_HOST_HCCHAR8_EC_CLR_MSK 0xffcfffff
31568 /* The reset value of the ALT_USB_HOST_HCCHAR8_EC register field. */
31569 #define ALT_USB_HOST_HCCHAR8_EC_RESET 0x0
31570 /* Extracts the ALT_USB_HOST_HCCHAR8_EC field value from a register. */
31571 #define ALT_USB_HOST_HCCHAR8_EC_GET(value) (((value) & 0x00300000) >> 20)
31572 /* Produces a ALT_USB_HOST_HCCHAR8_EC register field value suitable for setting the register. */
31573 #define ALT_USB_HOST_HCCHAR8_EC_SET(value) (((value) << 20) & 0x00300000)
31574 
31575 /*
31576  * Field : Device Address - devaddr
31577  *
31578  * This field selects the specific device serving as the data source or sink.
31579  *
31580  * Field Access Macros:
31581  *
31582  */
31583 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR8_DEVADDR register field. */
31584 #define ALT_USB_HOST_HCCHAR8_DEVADDR_LSB 22
31585 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR8_DEVADDR register field. */
31586 #define ALT_USB_HOST_HCCHAR8_DEVADDR_MSB 28
31587 /* The width in bits of the ALT_USB_HOST_HCCHAR8_DEVADDR register field. */
31588 #define ALT_USB_HOST_HCCHAR8_DEVADDR_WIDTH 7
31589 /* The mask used to set the ALT_USB_HOST_HCCHAR8_DEVADDR register field value. */
31590 #define ALT_USB_HOST_HCCHAR8_DEVADDR_SET_MSK 0x1fc00000
31591 /* The mask used to clear the ALT_USB_HOST_HCCHAR8_DEVADDR register field value. */
31592 #define ALT_USB_HOST_HCCHAR8_DEVADDR_CLR_MSK 0xe03fffff
31593 /* The reset value of the ALT_USB_HOST_HCCHAR8_DEVADDR register field. */
31594 #define ALT_USB_HOST_HCCHAR8_DEVADDR_RESET 0x0
31595 /* Extracts the ALT_USB_HOST_HCCHAR8_DEVADDR field value from a register. */
31596 #define ALT_USB_HOST_HCCHAR8_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
31597 /* Produces a ALT_USB_HOST_HCCHAR8_DEVADDR register field value suitable for setting the register. */
31598 #define ALT_USB_HOST_HCCHAR8_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
31599 
31600 /*
31601  * Field : Channel Disable - chdis
31602  *
31603  * The application sets this bit to stop transmitting/receiving data on a channel,
31604  * even before the transfer for that channel is complete. The application must wait
31605  * for the Channel Disabled interrupt before treating the channel as disabled.
31606  *
31607  * Field Enumeration Values:
31608  *
31609  * Enum | Value | Description
31610  * :-----------------------------------|:------|:----------------------------
31611  * ALT_USB_HOST_HCCHAR8_CHDIS_E_INACT | 0x0 | Transmit/Recieve normal
31612  * ALT_USB_HOST_HCCHAR8_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving
31613  *
31614  * Field Access Macros:
31615  *
31616  */
31617 /*
31618  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_CHDIS
31619  *
31620  * Transmit/Recieve normal
31621  */
31622 #define ALT_USB_HOST_HCCHAR8_CHDIS_E_INACT 0x0
31623 /*
31624  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_CHDIS
31625  *
31626  * Stop transmitting/receiving
31627  */
31628 #define ALT_USB_HOST_HCCHAR8_CHDIS_E_ACT 0x1
31629 
31630 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR8_CHDIS register field. */
31631 #define ALT_USB_HOST_HCCHAR8_CHDIS_LSB 30
31632 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR8_CHDIS register field. */
31633 #define ALT_USB_HOST_HCCHAR8_CHDIS_MSB 30
31634 /* The width in bits of the ALT_USB_HOST_HCCHAR8_CHDIS register field. */
31635 #define ALT_USB_HOST_HCCHAR8_CHDIS_WIDTH 1
31636 /* The mask used to set the ALT_USB_HOST_HCCHAR8_CHDIS register field value. */
31637 #define ALT_USB_HOST_HCCHAR8_CHDIS_SET_MSK 0x40000000
31638 /* The mask used to clear the ALT_USB_HOST_HCCHAR8_CHDIS register field value. */
31639 #define ALT_USB_HOST_HCCHAR8_CHDIS_CLR_MSK 0xbfffffff
31640 /* The reset value of the ALT_USB_HOST_HCCHAR8_CHDIS register field. */
31641 #define ALT_USB_HOST_HCCHAR8_CHDIS_RESET 0x0
31642 /* Extracts the ALT_USB_HOST_HCCHAR8_CHDIS field value from a register. */
31643 #define ALT_USB_HOST_HCCHAR8_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
31644 /* Produces a ALT_USB_HOST_HCCHAR8_CHDIS register field value suitable for setting the register. */
31645 #define ALT_USB_HOST_HCCHAR8_CHDIS_SET(value) (((value) << 30) & 0x40000000)
31646 
31647 /*
31648  * Field : Channel Enable - chena
31649  *
31650  * When Scatter/Gather mode is disabled This field is set by the application and
31651  * cleared by the OTG host.
31652  *
31653  * 0: Channel disabled
31654  *
31655  * 1: Channel enabled
31656  *
31657  * When Scatter/Gather mode is enabled.
31658  *
31659  * Field Enumeration Values:
31660  *
31661  * Enum | Value | Description
31662  * :-----------------------------------|:------|:-------------------------------------------------
31663  * ALT_USB_HOST_HCCHAR8_CHENA_E_INACT | 0x0 | Indicates that the descriptor structure is not
31664  * : | | yet ready
31665  * ALT_USB_HOST_HCCHAR8_CHENA_E_ACT | 0x1 | Indicates that the descriptor structure and
31666  * : | | data buffer with data is setup and this
31667  * : | | channel can access the descriptor
31668  *
31669  * Field Access Macros:
31670  *
31671  */
31672 /*
31673  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_CHENA
31674  *
31675  * Indicates that the descriptor structure is not yet ready
31676  */
31677 #define ALT_USB_HOST_HCCHAR8_CHENA_E_INACT 0x0
31678 /*
31679  * Enumerated value for register field ALT_USB_HOST_HCCHAR8_CHENA
31680  *
31681  * Indicates that the descriptor structure and data buffer with data is
31682  * setup and this channel can access the descriptor
31683  */
31684 #define ALT_USB_HOST_HCCHAR8_CHENA_E_ACT 0x1
31685 
31686 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR8_CHENA register field. */
31687 #define ALT_USB_HOST_HCCHAR8_CHENA_LSB 31
31688 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR8_CHENA register field. */
31689 #define ALT_USB_HOST_HCCHAR8_CHENA_MSB 31
31690 /* The width in bits of the ALT_USB_HOST_HCCHAR8_CHENA register field. */
31691 #define ALT_USB_HOST_HCCHAR8_CHENA_WIDTH 1
31692 /* The mask used to set the ALT_USB_HOST_HCCHAR8_CHENA register field value. */
31693 #define ALT_USB_HOST_HCCHAR8_CHENA_SET_MSK 0x80000000
31694 /* The mask used to clear the ALT_USB_HOST_HCCHAR8_CHENA register field value. */
31695 #define ALT_USB_HOST_HCCHAR8_CHENA_CLR_MSK 0x7fffffff
31696 /* The reset value of the ALT_USB_HOST_HCCHAR8_CHENA register field. */
31697 #define ALT_USB_HOST_HCCHAR8_CHENA_RESET 0x0
31698 /* Extracts the ALT_USB_HOST_HCCHAR8_CHENA field value from a register. */
31699 #define ALT_USB_HOST_HCCHAR8_CHENA_GET(value) (((value) & 0x80000000) >> 31)
31700 /* Produces a ALT_USB_HOST_HCCHAR8_CHENA register field value suitable for setting the register. */
31701 #define ALT_USB_HOST_HCCHAR8_CHENA_SET(value) (((value) << 31) & 0x80000000)
31702 
31703 #ifndef __ASSEMBLY__
31704 /*
31705  * WARNING: The C register and register group struct declarations are provided for
31706  * convenience and illustrative purposes. They should, however, be used with
31707  * caution as the C language standard provides no guarantees about the alignment or
31708  * atomicity of device memory accesses. The recommended practice for writing
31709  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
31710  * alt_write_word() functions.
31711  *
31712  * The struct declaration for register ALT_USB_HOST_HCCHAR8.
31713  */
31714 struct ALT_USB_HOST_HCCHAR8_s
31715 {
31716  uint32_t mps : 11; /* Maximum Packet Size */
31717  uint32_t epnum : 4; /* Endpoint Number */
31718  uint32_t epdir : 1; /* Endpoint Direction */
31719  uint32_t : 1; /* *UNDEFINED* */
31720  uint32_t lspddev : 1; /* Low-Speed Device */
31721  uint32_t eptype : 2; /* Endpoint Type */
31722  uint32_t ec : 2; /* Multi Count */
31723  uint32_t devaddr : 7; /* Device Address */
31724  uint32_t : 1; /* *UNDEFINED* */
31725  const uint32_t chdis : 1; /* Channel Disable */
31726  const uint32_t chena : 1; /* Channel Enable */
31727 };
31728 
31729 /* The typedef declaration for register ALT_USB_HOST_HCCHAR8. */
31730 typedef volatile struct ALT_USB_HOST_HCCHAR8_s ALT_USB_HOST_HCCHAR8_t;
31731 #endif /* __ASSEMBLY__ */
31732 
31733 /* The byte offset of the ALT_USB_HOST_HCCHAR8 register from the beginning of the component. */
31734 #define ALT_USB_HOST_HCCHAR8_OFST 0x200
31735 /* The address of the ALT_USB_HOST_HCCHAR8 register. */
31736 #define ALT_USB_HOST_HCCHAR8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR8_OFST))
31737 
31738 /*
31739  * Register : Host Channel 8 Split Control Register - hcsplt8
31740  *
31741  * Channel_number 8
31742  *
31743  * Register Layout
31744  *
31745  * Bits | Access | Reset | Description
31746  * :--------|:-------|:------|:---------------------
31747  * [6:0] | RW | 0x0 | Port Address
31748  * [13:7] | RW | 0x0 | Hub Address
31749  * [15:14] | RW | 0x0 | Transaction Position
31750  * [16] | RW | 0x0 | Do Complete Split
31751  * [30:17] | ??? | 0x0 | *UNDEFINED*
31752  * [31] | RW | 0x0 | Split Enable
31753  *
31754  */
31755 /*
31756  * Field : Port Address - prtaddr
31757  *
31758  * This field is the port number of the recipient transactiontranslator.
31759  *
31760  * Field Access Macros:
31761  *
31762  */
31763 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT8_PRTADDR register field. */
31764 #define ALT_USB_HOST_HCSPLT8_PRTADDR_LSB 0
31765 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT8_PRTADDR register field. */
31766 #define ALT_USB_HOST_HCSPLT8_PRTADDR_MSB 6
31767 /* The width in bits of the ALT_USB_HOST_HCSPLT8_PRTADDR register field. */
31768 #define ALT_USB_HOST_HCSPLT8_PRTADDR_WIDTH 7
31769 /* The mask used to set the ALT_USB_HOST_HCSPLT8_PRTADDR register field value. */
31770 #define ALT_USB_HOST_HCSPLT8_PRTADDR_SET_MSK 0x0000007f
31771 /* The mask used to clear the ALT_USB_HOST_HCSPLT8_PRTADDR register field value. */
31772 #define ALT_USB_HOST_HCSPLT8_PRTADDR_CLR_MSK 0xffffff80
31773 /* The reset value of the ALT_USB_HOST_HCSPLT8_PRTADDR register field. */
31774 #define ALT_USB_HOST_HCSPLT8_PRTADDR_RESET 0x0
31775 /* Extracts the ALT_USB_HOST_HCSPLT8_PRTADDR field value from a register. */
31776 #define ALT_USB_HOST_HCSPLT8_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
31777 /* Produces a ALT_USB_HOST_HCSPLT8_PRTADDR register field value suitable for setting the register. */
31778 #define ALT_USB_HOST_HCSPLT8_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
31779 
31780 /*
31781  * Field : Hub Address - hubaddr
31782  *
31783  * This field holds the device address of the transaction translator's hub.
31784  *
31785  * Field Access Macros:
31786  *
31787  */
31788 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT8_HUBADDR register field. */
31789 #define ALT_USB_HOST_HCSPLT8_HUBADDR_LSB 7
31790 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT8_HUBADDR register field. */
31791 #define ALT_USB_HOST_HCSPLT8_HUBADDR_MSB 13
31792 /* The width in bits of the ALT_USB_HOST_HCSPLT8_HUBADDR register field. */
31793 #define ALT_USB_HOST_HCSPLT8_HUBADDR_WIDTH 7
31794 /* The mask used to set the ALT_USB_HOST_HCSPLT8_HUBADDR register field value. */
31795 #define ALT_USB_HOST_HCSPLT8_HUBADDR_SET_MSK 0x00003f80
31796 /* The mask used to clear the ALT_USB_HOST_HCSPLT8_HUBADDR register field value. */
31797 #define ALT_USB_HOST_HCSPLT8_HUBADDR_CLR_MSK 0xffffc07f
31798 /* The reset value of the ALT_USB_HOST_HCSPLT8_HUBADDR register field. */
31799 #define ALT_USB_HOST_HCSPLT8_HUBADDR_RESET 0x0
31800 /* Extracts the ALT_USB_HOST_HCSPLT8_HUBADDR field value from a register. */
31801 #define ALT_USB_HOST_HCSPLT8_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
31802 /* Produces a ALT_USB_HOST_HCSPLT8_HUBADDR register field value suitable for setting the register. */
31803 #define ALT_USB_HOST_HCSPLT8_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
31804 
31805 /*
31806  * Field : Transaction Position - xactpos
31807  *
31808  * This field is used to determine whether to send all, first, middle, or last
31809  * payloads with each OUT transaction.
31810  *
31811  * Field Enumeration Values:
31812  *
31813  * Enum | Value | Description
31814  * :--------------------------------------|:------|:------------------------------------------------
31815  * ALT_USB_HOST_HCSPLT8_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
31816  * : | | transaction (which is larger than 188 bytes)
31817  * ALT_USB_HOST_HCSPLT8_XACTPOS_E_END | 0x1 | End. This is the last payload of this
31818  * : | | transaction (which is larger than 188 bytes)
31819  * ALT_USB_HOST_HCSPLT8_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
31820  * : | | transaction (which is larger than 188 bytes)
31821  * ALT_USB_HOST_HCSPLT8_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
31822  * : | | transaction (which is less than or equal to 188
31823  * : | | bytes)
31824  *
31825  * Field Access Macros:
31826  *
31827  */
31828 /*
31829  * Enumerated value for register field ALT_USB_HOST_HCSPLT8_XACTPOS
31830  *
31831  * Mid. This is the middle payload of this transaction (which is larger than 188
31832  * bytes)
31833  */
31834 #define ALT_USB_HOST_HCSPLT8_XACTPOS_E_MIDDLE 0x0
31835 /*
31836  * Enumerated value for register field ALT_USB_HOST_HCSPLT8_XACTPOS
31837  *
31838  * End. This is the last payload of this transaction (which is larger than 188
31839  * bytes)
31840  */
31841 #define ALT_USB_HOST_HCSPLT8_XACTPOS_E_END 0x1
31842 /*
31843  * Enumerated value for register field ALT_USB_HOST_HCSPLT8_XACTPOS
31844  *
31845  * Begin. This is the first data payload of this transaction (which is larger than
31846  * 188 bytes)
31847  */
31848 #define ALT_USB_HOST_HCSPLT8_XACTPOS_E_BEGIN 0x2
31849 /*
31850  * Enumerated value for register field ALT_USB_HOST_HCSPLT8_XACTPOS
31851  *
31852  * All. This is the entire data payload is of this transaction (which is less than
31853  * or equal to 188 bytes)
31854  */
31855 #define ALT_USB_HOST_HCSPLT8_XACTPOS_E_ALL 0x3
31856 
31857 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT8_XACTPOS register field. */
31858 #define ALT_USB_HOST_HCSPLT8_XACTPOS_LSB 14
31859 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT8_XACTPOS register field. */
31860 #define ALT_USB_HOST_HCSPLT8_XACTPOS_MSB 15
31861 /* The width in bits of the ALT_USB_HOST_HCSPLT8_XACTPOS register field. */
31862 #define ALT_USB_HOST_HCSPLT8_XACTPOS_WIDTH 2
31863 /* The mask used to set the ALT_USB_HOST_HCSPLT8_XACTPOS register field value. */
31864 #define ALT_USB_HOST_HCSPLT8_XACTPOS_SET_MSK 0x0000c000
31865 /* The mask used to clear the ALT_USB_HOST_HCSPLT8_XACTPOS register field value. */
31866 #define ALT_USB_HOST_HCSPLT8_XACTPOS_CLR_MSK 0xffff3fff
31867 /* The reset value of the ALT_USB_HOST_HCSPLT8_XACTPOS register field. */
31868 #define ALT_USB_HOST_HCSPLT8_XACTPOS_RESET 0x0
31869 /* Extracts the ALT_USB_HOST_HCSPLT8_XACTPOS field value from a register. */
31870 #define ALT_USB_HOST_HCSPLT8_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
31871 /* Produces a ALT_USB_HOST_HCSPLT8_XACTPOS register field value suitable for setting the register. */
31872 #define ALT_USB_HOST_HCSPLT8_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
31873 
31874 /*
31875  * Field : Do Complete Split - compsplt
31876  *
31877  * The application sets this field to request the OTG host to perform a complete
31878  * split transaction.
31879  *
31880  * Field Enumeration Values:
31881  *
31882  * Enum | Value | Description
31883  * :----------------------------------------|:------|:---------------------
31884  * ALT_USB_HOST_HCSPLT8_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
31885  * ALT_USB_HOST_HCSPLT8_COMPSPLT_E_SPLIT | 0x1 | Split transaction
31886  *
31887  * Field Access Macros:
31888  *
31889  */
31890 /*
31891  * Enumerated value for register field ALT_USB_HOST_HCSPLT8_COMPSPLT
31892  *
31893  * No split transaction
31894  */
31895 #define ALT_USB_HOST_HCSPLT8_COMPSPLT_E_NOSPLIT 0x0
31896 /*
31897  * Enumerated value for register field ALT_USB_HOST_HCSPLT8_COMPSPLT
31898  *
31899  * Split transaction
31900  */
31901 #define ALT_USB_HOST_HCSPLT8_COMPSPLT_E_SPLIT 0x1
31902 
31903 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT8_COMPSPLT register field. */
31904 #define ALT_USB_HOST_HCSPLT8_COMPSPLT_LSB 16
31905 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT8_COMPSPLT register field. */
31906 #define ALT_USB_HOST_HCSPLT8_COMPSPLT_MSB 16
31907 /* The width in bits of the ALT_USB_HOST_HCSPLT8_COMPSPLT register field. */
31908 #define ALT_USB_HOST_HCSPLT8_COMPSPLT_WIDTH 1
31909 /* The mask used to set the ALT_USB_HOST_HCSPLT8_COMPSPLT register field value. */
31910 #define ALT_USB_HOST_HCSPLT8_COMPSPLT_SET_MSK 0x00010000
31911 /* The mask used to clear the ALT_USB_HOST_HCSPLT8_COMPSPLT register field value. */
31912 #define ALT_USB_HOST_HCSPLT8_COMPSPLT_CLR_MSK 0xfffeffff
31913 /* The reset value of the ALT_USB_HOST_HCSPLT8_COMPSPLT register field. */
31914 #define ALT_USB_HOST_HCSPLT8_COMPSPLT_RESET 0x0
31915 /* Extracts the ALT_USB_HOST_HCSPLT8_COMPSPLT field value from a register. */
31916 #define ALT_USB_HOST_HCSPLT8_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
31917 /* Produces a ALT_USB_HOST_HCSPLT8_COMPSPLT register field value suitable for setting the register. */
31918 #define ALT_USB_HOST_HCSPLT8_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
31919 
31920 /*
31921  * Field : Split Enable - spltena
31922  *
31923  * The application sets this field to indicate that this channel is enabled to
31924  * perform split transactions.
31925  *
31926  * Field Enumeration Values:
31927  *
31928  * Enum | Value | Description
31929  * :------------------------------------|:------|:------------------
31930  * ALT_USB_HOST_HCSPLT8_SPLTENA_E_DISD | 0x0 | Split not enabled
31931  * ALT_USB_HOST_HCSPLT8_SPLTENA_E_END | 0x1 | Split enabled
31932  *
31933  * Field Access Macros:
31934  *
31935  */
31936 /*
31937  * Enumerated value for register field ALT_USB_HOST_HCSPLT8_SPLTENA
31938  *
31939  * Split not enabled
31940  */
31941 #define ALT_USB_HOST_HCSPLT8_SPLTENA_E_DISD 0x0
31942 /*
31943  * Enumerated value for register field ALT_USB_HOST_HCSPLT8_SPLTENA
31944  *
31945  * Split enabled
31946  */
31947 #define ALT_USB_HOST_HCSPLT8_SPLTENA_E_END 0x1
31948 
31949 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT8_SPLTENA register field. */
31950 #define ALT_USB_HOST_HCSPLT8_SPLTENA_LSB 31
31951 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT8_SPLTENA register field. */
31952 #define ALT_USB_HOST_HCSPLT8_SPLTENA_MSB 31
31953 /* The width in bits of the ALT_USB_HOST_HCSPLT8_SPLTENA register field. */
31954 #define ALT_USB_HOST_HCSPLT8_SPLTENA_WIDTH 1
31955 /* The mask used to set the ALT_USB_HOST_HCSPLT8_SPLTENA register field value. */
31956 #define ALT_USB_HOST_HCSPLT8_SPLTENA_SET_MSK 0x80000000
31957 /* The mask used to clear the ALT_USB_HOST_HCSPLT8_SPLTENA register field value. */
31958 #define ALT_USB_HOST_HCSPLT8_SPLTENA_CLR_MSK 0x7fffffff
31959 /* The reset value of the ALT_USB_HOST_HCSPLT8_SPLTENA register field. */
31960 #define ALT_USB_HOST_HCSPLT8_SPLTENA_RESET 0x0
31961 /* Extracts the ALT_USB_HOST_HCSPLT8_SPLTENA field value from a register. */
31962 #define ALT_USB_HOST_HCSPLT8_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
31963 /* Produces a ALT_USB_HOST_HCSPLT8_SPLTENA register field value suitable for setting the register. */
31964 #define ALT_USB_HOST_HCSPLT8_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
31965 
31966 #ifndef __ASSEMBLY__
31967 /*
31968  * WARNING: The C register and register group struct declarations are provided for
31969  * convenience and illustrative purposes. They should, however, be used with
31970  * caution as the C language standard provides no guarantees about the alignment or
31971  * atomicity of device memory accesses. The recommended practice for writing
31972  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
31973  * alt_write_word() functions.
31974  *
31975  * The struct declaration for register ALT_USB_HOST_HCSPLT8.
31976  */
31977 struct ALT_USB_HOST_HCSPLT8_s
31978 {
31979  uint32_t prtaddr : 7; /* Port Address */
31980  uint32_t hubaddr : 7; /* Hub Address */
31981  uint32_t xactpos : 2; /* Transaction Position */
31982  uint32_t compsplt : 1; /* Do Complete Split */
31983  uint32_t : 14; /* *UNDEFINED* */
31984  uint32_t spltena : 1; /* Split Enable */
31985 };
31986 
31987 /* The typedef declaration for register ALT_USB_HOST_HCSPLT8. */
31988 typedef volatile struct ALT_USB_HOST_HCSPLT8_s ALT_USB_HOST_HCSPLT8_t;
31989 #endif /* __ASSEMBLY__ */
31990 
31991 /* The byte offset of the ALT_USB_HOST_HCSPLT8 register from the beginning of the component. */
31992 #define ALT_USB_HOST_HCSPLT8_OFST 0x204
31993 /* The address of the ALT_USB_HOST_HCSPLT8 register. */
31994 #define ALT_USB_HOST_HCSPLT8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT8_OFST))
31995 
31996 /*
31997  * Register : Host Channel 8 Interrupt Register - hcint8
31998  *
31999  * This register indicates the status of a channel with respect to USB- and AHB-
32000  * related events. The application must read this register when the Host Channels
32001  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
32002  * application can read this register, it must first read the Host All Channels
32003  * Interrupt (HAINT) register to get the exact channel number for the Host
32004  * Channel-n Interrupt register. The application must clear the appropriate bit in
32005  * this register to clear the corresponding bits in the HAINT and GINTSTS
32006  * registers.
32007  *
32008  * Register Layout
32009  *
32010  * Bits | Access | Reset | Description
32011  * :--------|:-------|:------|:--------------------------------------------
32012  * [0] | R | 0x0 | Transfer Completed
32013  * [1] | R | 0x0 | Channel Halted
32014  * [2] | R | 0x0 | AHB Error
32015  * [3] | R | 0x0 | STALL Response Received Interrupt
32016  * [4] | R | 0x0 | NAK Response Received Interrupt
32017  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
32018  * [6] | R | 0x0 | NYET Response Received Interrupt
32019  * [7] | R | 0x0 | Transaction Error
32020  * [8] | R | 0x0 | Babble Error
32021  * [9] | R | 0x0 | Frame Overrun
32022  * [10] | R | 0x0 | Data Toggle Error
32023  * [11] | R | 0x0 | BNA Interrupt
32024  * [12] | R | 0x0 | Excessive Transaction Error
32025  * [13] | R | 0x0 | Descriptor rollover interrupt
32026  * [31:14] | ??? | 0x0 | *UNDEFINED*
32027  *
32028  */
32029 /*
32030  * Field : Transfer Completed - xfercompl
32031  *
32032  * Transfer completed normally without any errors. This bit can be set only by the
32033  * core and the application should write 1 to clear it.
32034  *
32035  * Field Enumeration Values:
32036  *
32037  * Enum | Value | Description
32038  * :--------------------------------------|:------|:-----------------------------------------------
32039  * ALT_USB_HOST_HCINT8_XFERCOMPL_E_INACT | 0x0 | No transfer
32040  * ALT_USB_HOST_HCINT8_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
32041  *
32042  * Field Access Macros:
32043  *
32044  */
32045 /*
32046  * Enumerated value for register field ALT_USB_HOST_HCINT8_XFERCOMPL
32047  *
32048  * No transfer
32049  */
32050 #define ALT_USB_HOST_HCINT8_XFERCOMPL_E_INACT 0x0
32051 /*
32052  * Enumerated value for register field ALT_USB_HOST_HCINT8_XFERCOMPL
32053  *
32054  * Transfer completed normally without any errors
32055  */
32056 #define ALT_USB_HOST_HCINT8_XFERCOMPL_E_ACT 0x1
32057 
32058 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_XFERCOMPL register field. */
32059 #define ALT_USB_HOST_HCINT8_XFERCOMPL_LSB 0
32060 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_XFERCOMPL register field. */
32061 #define ALT_USB_HOST_HCINT8_XFERCOMPL_MSB 0
32062 /* The width in bits of the ALT_USB_HOST_HCINT8_XFERCOMPL register field. */
32063 #define ALT_USB_HOST_HCINT8_XFERCOMPL_WIDTH 1
32064 /* The mask used to set the ALT_USB_HOST_HCINT8_XFERCOMPL register field value. */
32065 #define ALT_USB_HOST_HCINT8_XFERCOMPL_SET_MSK 0x00000001
32066 /* The mask used to clear the ALT_USB_HOST_HCINT8_XFERCOMPL register field value. */
32067 #define ALT_USB_HOST_HCINT8_XFERCOMPL_CLR_MSK 0xfffffffe
32068 /* The reset value of the ALT_USB_HOST_HCINT8_XFERCOMPL register field. */
32069 #define ALT_USB_HOST_HCINT8_XFERCOMPL_RESET 0x0
32070 /* Extracts the ALT_USB_HOST_HCINT8_XFERCOMPL field value from a register. */
32071 #define ALT_USB_HOST_HCINT8_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
32072 /* Produces a ALT_USB_HOST_HCINT8_XFERCOMPL register field value suitable for setting the register. */
32073 #define ALT_USB_HOST_HCINT8_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
32074 
32075 /*
32076  * Field : Channel Halted - chhltd
32077  *
32078  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
32079  * either because of any USB transaction error or in response to disable request by
32080  * the application or because of a completed transfer. In Scatter/gather DMA mode,
32081  * this indicates that transfer completed due to any of the following
32082  *
32083  * . EOL being set in descriptor
32084  *
32085  * . AHB error
32086  *
32087  * . Excessive transaction errors
32088  *
32089  * . Babble
32090  *
32091  * . Stall
32092  *
32093  * Field Enumeration Values:
32094  *
32095  * Enum | Value | Description
32096  * :-----------------------------------|:------|:-------------------
32097  * ALT_USB_HOST_HCINT8_CHHLTD_E_INACT | 0x0 | Channel not halted
32098  * ALT_USB_HOST_HCINT8_CHHLTD_E_ACT | 0x1 | Channel Halted
32099  *
32100  * Field Access Macros:
32101  *
32102  */
32103 /*
32104  * Enumerated value for register field ALT_USB_HOST_HCINT8_CHHLTD
32105  *
32106  * Channel not halted
32107  */
32108 #define ALT_USB_HOST_HCINT8_CHHLTD_E_INACT 0x0
32109 /*
32110  * Enumerated value for register field ALT_USB_HOST_HCINT8_CHHLTD
32111  *
32112  * Channel Halted
32113  */
32114 #define ALT_USB_HOST_HCINT8_CHHLTD_E_ACT 0x1
32115 
32116 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_CHHLTD register field. */
32117 #define ALT_USB_HOST_HCINT8_CHHLTD_LSB 1
32118 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_CHHLTD register field. */
32119 #define ALT_USB_HOST_HCINT8_CHHLTD_MSB 1
32120 /* The width in bits of the ALT_USB_HOST_HCINT8_CHHLTD register field. */
32121 #define ALT_USB_HOST_HCINT8_CHHLTD_WIDTH 1
32122 /* The mask used to set the ALT_USB_HOST_HCINT8_CHHLTD register field value. */
32123 #define ALT_USB_HOST_HCINT8_CHHLTD_SET_MSK 0x00000002
32124 /* The mask used to clear the ALT_USB_HOST_HCINT8_CHHLTD register field value. */
32125 #define ALT_USB_HOST_HCINT8_CHHLTD_CLR_MSK 0xfffffffd
32126 /* The reset value of the ALT_USB_HOST_HCINT8_CHHLTD register field. */
32127 #define ALT_USB_HOST_HCINT8_CHHLTD_RESET 0x0
32128 /* Extracts the ALT_USB_HOST_HCINT8_CHHLTD field value from a register. */
32129 #define ALT_USB_HOST_HCINT8_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
32130 /* Produces a ALT_USB_HOST_HCINT8_CHHLTD register field value suitable for setting the register. */
32131 #define ALT_USB_HOST_HCINT8_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
32132 
32133 /*
32134  * Field : AHB Error - ahberr
32135  *
32136  * This is generated only in Internal DMA mode when there is an AHB error during
32137  * AHB read/write. The application can read the corresponding channel's DMA address
32138  * register to get the error address.
32139  *
32140  * Field Enumeration Values:
32141  *
32142  * Enum | Value | Description
32143  * :-----------------------------------|:------|:--------------------------------
32144  * ALT_USB_HOST_HCINT8_AHBERR_E_INACT | 0x0 | No AHB error
32145  * ALT_USB_HOST_HCINT8_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
32146  *
32147  * Field Access Macros:
32148  *
32149  */
32150 /*
32151  * Enumerated value for register field ALT_USB_HOST_HCINT8_AHBERR
32152  *
32153  * No AHB error
32154  */
32155 #define ALT_USB_HOST_HCINT8_AHBERR_E_INACT 0x0
32156 /*
32157  * Enumerated value for register field ALT_USB_HOST_HCINT8_AHBERR
32158  *
32159  * AHB error during AHB read/write
32160  */
32161 #define ALT_USB_HOST_HCINT8_AHBERR_E_ACT 0x1
32162 
32163 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_AHBERR register field. */
32164 #define ALT_USB_HOST_HCINT8_AHBERR_LSB 2
32165 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_AHBERR register field. */
32166 #define ALT_USB_HOST_HCINT8_AHBERR_MSB 2
32167 /* The width in bits of the ALT_USB_HOST_HCINT8_AHBERR register field. */
32168 #define ALT_USB_HOST_HCINT8_AHBERR_WIDTH 1
32169 /* The mask used to set the ALT_USB_HOST_HCINT8_AHBERR register field value. */
32170 #define ALT_USB_HOST_HCINT8_AHBERR_SET_MSK 0x00000004
32171 /* The mask used to clear the ALT_USB_HOST_HCINT8_AHBERR register field value. */
32172 #define ALT_USB_HOST_HCINT8_AHBERR_CLR_MSK 0xfffffffb
32173 /* The reset value of the ALT_USB_HOST_HCINT8_AHBERR register field. */
32174 #define ALT_USB_HOST_HCINT8_AHBERR_RESET 0x0
32175 /* Extracts the ALT_USB_HOST_HCINT8_AHBERR field value from a register. */
32176 #define ALT_USB_HOST_HCINT8_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
32177 /* Produces a ALT_USB_HOST_HCINT8_AHBERR register field value suitable for setting the register. */
32178 #define ALT_USB_HOST_HCINT8_AHBERR_SET(value) (((value) << 2) & 0x00000004)
32179 
32180 /*
32181  * Field : STALL Response Received Interrupt - stall
32182  *
32183  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
32184  * This bit can be set only by the core and the application should write 1 to clear
32185  * it.
32186  *
32187  * Field Enumeration Values:
32188  *
32189  * Enum | Value | Description
32190  * :----------------------------------|:------|:-------------------
32191  * ALT_USB_HOST_HCINT8_STALL_E_INACT | 0x0 | No Stall Interrupt
32192  * ALT_USB_HOST_HCINT8_STALL_E_ACT | 0x1 | Stall Interrupt
32193  *
32194  * Field Access Macros:
32195  *
32196  */
32197 /*
32198  * Enumerated value for register field ALT_USB_HOST_HCINT8_STALL
32199  *
32200  * No Stall Interrupt
32201  */
32202 #define ALT_USB_HOST_HCINT8_STALL_E_INACT 0x0
32203 /*
32204  * Enumerated value for register field ALT_USB_HOST_HCINT8_STALL
32205  *
32206  * Stall Interrupt
32207  */
32208 #define ALT_USB_HOST_HCINT8_STALL_E_ACT 0x1
32209 
32210 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_STALL register field. */
32211 #define ALT_USB_HOST_HCINT8_STALL_LSB 3
32212 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_STALL register field. */
32213 #define ALT_USB_HOST_HCINT8_STALL_MSB 3
32214 /* The width in bits of the ALT_USB_HOST_HCINT8_STALL register field. */
32215 #define ALT_USB_HOST_HCINT8_STALL_WIDTH 1
32216 /* The mask used to set the ALT_USB_HOST_HCINT8_STALL register field value. */
32217 #define ALT_USB_HOST_HCINT8_STALL_SET_MSK 0x00000008
32218 /* The mask used to clear the ALT_USB_HOST_HCINT8_STALL register field value. */
32219 #define ALT_USB_HOST_HCINT8_STALL_CLR_MSK 0xfffffff7
32220 /* The reset value of the ALT_USB_HOST_HCINT8_STALL register field. */
32221 #define ALT_USB_HOST_HCINT8_STALL_RESET 0x0
32222 /* Extracts the ALT_USB_HOST_HCINT8_STALL field value from a register. */
32223 #define ALT_USB_HOST_HCINT8_STALL_GET(value) (((value) & 0x00000008) >> 3)
32224 /* Produces a ALT_USB_HOST_HCINT8_STALL register field value suitable for setting the register. */
32225 #define ALT_USB_HOST_HCINT8_STALL_SET(value) (((value) << 3) & 0x00000008)
32226 
32227 /*
32228  * Field : NAK Response Received Interrupt - nak
32229  *
32230  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
32231  * core.This bit can be set only by the core and the application should write 1 to
32232  * clear it.
32233  *
32234  * Field Enumeration Values:
32235  *
32236  * Enum | Value | Description
32237  * :--------------------------------|:------|:-----------------------------------
32238  * ALT_USB_HOST_HCINT8_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
32239  * ALT_USB_HOST_HCINT8_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
32240  *
32241  * Field Access Macros:
32242  *
32243  */
32244 /*
32245  * Enumerated value for register field ALT_USB_HOST_HCINT8_NAK
32246  *
32247  * No NAK Response Received Interrupt
32248  */
32249 #define ALT_USB_HOST_HCINT8_NAK_E_INACT 0x0
32250 /*
32251  * Enumerated value for register field ALT_USB_HOST_HCINT8_NAK
32252  *
32253  * NAK Response Received Interrupt
32254  */
32255 #define ALT_USB_HOST_HCINT8_NAK_E_ACT 0x1
32256 
32257 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_NAK register field. */
32258 #define ALT_USB_HOST_HCINT8_NAK_LSB 4
32259 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_NAK register field. */
32260 #define ALT_USB_HOST_HCINT8_NAK_MSB 4
32261 /* The width in bits of the ALT_USB_HOST_HCINT8_NAK register field. */
32262 #define ALT_USB_HOST_HCINT8_NAK_WIDTH 1
32263 /* The mask used to set the ALT_USB_HOST_HCINT8_NAK register field value. */
32264 #define ALT_USB_HOST_HCINT8_NAK_SET_MSK 0x00000010
32265 /* The mask used to clear the ALT_USB_HOST_HCINT8_NAK register field value. */
32266 #define ALT_USB_HOST_HCINT8_NAK_CLR_MSK 0xffffffef
32267 /* The reset value of the ALT_USB_HOST_HCINT8_NAK register field. */
32268 #define ALT_USB_HOST_HCINT8_NAK_RESET 0x0
32269 /* Extracts the ALT_USB_HOST_HCINT8_NAK field value from a register. */
32270 #define ALT_USB_HOST_HCINT8_NAK_GET(value) (((value) & 0x00000010) >> 4)
32271 /* Produces a ALT_USB_HOST_HCINT8_NAK register field value suitable for setting the register. */
32272 #define ALT_USB_HOST_HCINT8_NAK_SET(value) (((value) << 4) & 0x00000010)
32273 
32274 /*
32275  * Field : ACK Response Received Transmitted Interrupt - ack
32276  *
32277  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
32278  * This bit can be set only by the core and the application should write 1 to clear
32279  * it.
32280  *
32281  * Field Enumeration Values:
32282  *
32283  * Enum | Value | Description
32284  * :--------------------------------|:------|:-----------------------------------------------
32285  * ALT_USB_HOST_HCINT8_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
32286  * ALT_USB_HOST_HCINT8_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
32287  *
32288  * Field Access Macros:
32289  *
32290  */
32291 /*
32292  * Enumerated value for register field ALT_USB_HOST_HCINT8_ACK
32293  *
32294  * No ACK Response Received Transmitted Interrupt
32295  */
32296 #define ALT_USB_HOST_HCINT8_ACK_E_INACT 0x0
32297 /*
32298  * Enumerated value for register field ALT_USB_HOST_HCINT8_ACK
32299  *
32300  * ACK Response Received Transmitted Interrup
32301  */
32302 #define ALT_USB_HOST_HCINT8_ACK_E_ACT 0x1
32303 
32304 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_ACK register field. */
32305 #define ALT_USB_HOST_HCINT8_ACK_LSB 5
32306 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_ACK register field. */
32307 #define ALT_USB_HOST_HCINT8_ACK_MSB 5
32308 /* The width in bits of the ALT_USB_HOST_HCINT8_ACK register field. */
32309 #define ALT_USB_HOST_HCINT8_ACK_WIDTH 1
32310 /* The mask used to set the ALT_USB_HOST_HCINT8_ACK register field value. */
32311 #define ALT_USB_HOST_HCINT8_ACK_SET_MSK 0x00000020
32312 /* The mask used to clear the ALT_USB_HOST_HCINT8_ACK register field value. */
32313 #define ALT_USB_HOST_HCINT8_ACK_CLR_MSK 0xffffffdf
32314 /* The reset value of the ALT_USB_HOST_HCINT8_ACK register field. */
32315 #define ALT_USB_HOST_HCINT8_ACK_RESET 0x0
32316 /* Extracts the ALT_USB_HOST_HCINT8_ACK field value from a register. */
32317 #define ALT_USB_HOST_HCINT8_ACK_GET(value) (((value) & 0x00000020) >> 5)
32318 /* Produces a ALT_USB_HOST_HCINT8_ACK register field value suitable for setting the register. */
32319 #define ALT_USB_HOST_HCINT8_ACK_SET(value) (((value) << 5) & 0x00000020)
32320 
32321 /*
32322  * Field : NYET Response Received Interrupt - nyet
32323  *
32324  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
32325  * core.This bit can be set only by the core and the application should write 1 to
32326  * clear it.
32327  *
32328  * Field Enumeration Values:
32329  *
32330  * Enum | Value | Description
32331  * :---------------------------------|:------|:------------------------------------
32332  * ALT_USB_HOST_HCINT8_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
32333  * ALT_USB_HOST_HCINT8_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
32334  *
32335  * Field Access Macros:
32336  *
32337  */
32338 /*
32339  * Enumerated value for register field ALT_USB_HOST_HCINT8_NYET
32340  *
32341  * No NYET Response Received Interrupt
32342  */
32343 #define ALT_USB_HOST_HCINT8_NYET_E_INACT 0x0
32344 /*
32345  * Enumerated value for register field ALT_USB_HOST_HCINT8_NYET
32346  *
32347  * NYET Response Received Interrupt
32348  */
32349 #define ALT_USB_HOST_HCINT8_NYET_E_ACT 0x1
32350 
32351 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_NYET register field. */
32352 #define ALT_USB_HOST_HCINT8_NYET_LSB 6
32353 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_NYET register field. */
32354 #define ALT_USB_HOST_HCINT8_NYET_MSB 6
32355 /* The width in bits of the ALT_USB_HOST_HCINT8_NYET register field. */
32356 #define ALT_USB_HOST_HCINT8_NYET_WIDTH 1
32357 /* The mask used to set the ALT_USB_HOST_HCINT8_NYET register field value. */
32358 #define ALT_USB_HOST_HCINT8_NYET_SET_MSK 0x00000040
32359 /* The mask used to clear the ALT_USB_HOST_HCINT8_NYET register field value. */
32360 #define ALT_USB_HOST_HCINT8_NYET_CLR_MSK 0xffffffbf
32361 /* The reset value of the ALT_USB_HOST_HCINT8_NYET register field. */
32362 #define ALT_USB_HOST_HCINT8_NYET_RESET 0x0
32363 /* Extracts the ALT_USB_HOST_HCINT8_NYET field value from a register. */
32364 #define ALT_USB_HOST_HCINT8_NYET_GET(value) (((value) & 0x00000040) >> 6)
32365 /* Produces a ALT_USB_HOST_HCINT8_NYET register field value suitable for setting the register. */
32366 #define ALT_USB_HOST_HCINT8_NYET_SET(value) (((value) << 6) & 0x00000040)
32367 
32368 /*
32369  * Field : Transaction Error - xacterr
32370  *
32371  * Indicates one of the following errors occurred on the USB.-CRC check failure
32372  *
32373  * * Timeout
32374  *
32375  * * Bit stuff error
32376  *
32377  * * False EOP
32378  *
32379  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
32380  * This bit can be set only by the core and the application should write 1 to clear
32381  * it.
32382  *
32383  * Field Enumeration Values:
32384  *
32385  * Enum | Value | Description
32386  * :------------------------------------|:------|:---------------------
32387  * ALT_USB_HOST_HCINT8_XACTERR_E_INACT | 0x0 | No Transaction Error
32388  * ALT_USB_HOST_HCINT8_XACTERR_E_ACT | 0x1 | Transaction Error
32389  *
32390  * Field Access Macros:
32391  *
32392  */
32393 /*
32394  * Enumerated value for register field ALT_USB_HOST_HCINT8_XACTERR
32395  *
32396  * No Transaction Error
32397  */
32398 #define ALT_USB_HOST_HCINT8_XACTERR_E_INACT 0x0
32399 /*
32400  * Enumerated value for register field ALT_USB_HOST_HCINT8_XACTERR
32401  *
32402  * Transaction Error
32403  */
32404 #define ALT_USB_HOST_HCINT8_XACTERR_E_ACT 0x1
32405 
32406 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_XACTERR register field. */
32407 #define ALT_USB_HOST_HCINT8_XACTERR_LSB 7
32408 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_XACTERR register field. */
32409 #define ALT_USB_HOST_HCINT8_XACTERR_MSB 7
32410 /* The width in bits of the ALT_USB_HOST_HCINT8_XACTERR register field. */
32411 #define ALT_USB_HOST_HCINT8_XACTERR_WIDTH 1
32412 /* The mask used to set the ALT_USB_HOST_HCINT8_XACTERR register field value. */
32413 #define ALT_USB_HOST_HCINT8_XACTERR_SET_MSK 0x00000080
32414 /* The mask used to clear the ALT_USB_HOST_HCINT8_XACTERR register field value. */
32415 #define ALT_USB_HOST_HCINT8_XACTERR_CLR_MSK 0xffffff7f
32416 /* The reset value of the ALT_USB_HOST_HCINT8_XACTERR register field. */
32417 #define ALT_USB_HOST_HCINT8_XACTERR_RESET 0x0
32418 /* Extracts the ALT_USB_HOST_HCINT8_XACTERR field value from a register. */
32419 #define ALT_USB_HOST_HCINT8_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
32420 /* Produces a ALT_USB_HOST_HCINT8_XACTERR register field value suitable for setting the register. */
32421 #define ALT_USB_HOST_HCINT8_XACTERR_SET(value) (((value) << 7) & 0x00000080)
32422 
32423 /*
32424  * Field : Babble Error - bblerr
32425  *
32426  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
32427  * core..This bit can be set only by the core and the application should write 1 to
32428  * clear it.
32429  *
32430  * Field Enumeration Values:
32431  *
32432  * Enum | Value | Description
32433  * :-----------------------------------|:------|:----------------
32434  * ALT_USB_HOST_HCINT8_BBLERR_E_INACT | 0x0 | No Babble Error
32435  * ALT_USB_HOST_HCINT8_BBLERR_E_ACT | 0x1 | Babble Error
32436  *
32437  * Field Access Macros:
32438  *
32439  */
32440 /*
32441  * Enumerated value for register field ALT_USB_HOST_HCINT8_BBLERR
32442  *
32443  * No Babble Error
32444  */
32445 #define ALT_USB_HOST_HCINT8_BBLERR_E_INACT 0x0
32446 /*
32447  * Enumerated value for register field ALT_USB_HOST_HCINT8_BBLERR
32448  *
32449  * Babble Error
32450  */
32451 #define ALT_USB_HOST_HCINT8_BBLERR_E_ACT 0x1
32452 
32453 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_BBLERR register field. */
32454 #define ALT_USB_HOST_HCINT8_BBLERR_LSB 8
32455 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_BBLERR register field. */
32456 #define ALT_USB_HOST_HCINT8_BBLERR_MSB 8
32457 /* The width in bits of the ALT_USB_HOST_HCINT8_BBLERR register field. */
32458 #define ALT_USB_HOST_HCINT8_BBLERR_WIDTH 1
32459 /* The mask used to set the ALT_USB_HOST_HCINT8_BBLERR register field value. */
32460 #define ALT_USB_HOST_HCINT8_BBLERR_SET_MSK 0x00000100
32461 /* The mask used to clear the ALT_USB_HOST_HCINT8_BBLERR register field value. */
32462 #define ALT_USB_HOST_HCINT8_BBLERR_CLR_MSK 0xfffffeff
32463 /* The reset value of the ALT_USB_HOST_HCINT8_BBLERR register field. */
32464 #define ALT_USB_HOST_HCINT8_BBLERR_RESET 0x0
32465 /* Extracts the ALT_USB_HOST_HCINT8_BBLERR field value from a register. */
32466 #define ALT_USB_HOST_HCINT8_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
32467 /* Produces a ALT_USB_HOST_HCINT8_BBLERR register field value suitable for setting the register. */
32468 #define ALT_USB_HOST_HCINT8_BBLERR_SET(value) (((value) << 8) & 0x00000100)
32469 
32470 /*
32471  * Field : Frame Overrun - frmovrun
32472  *
32473  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
32474  * This bit can be set only by the core and the application should write 1 to clear
32475  * it.
32476  *
32477  * Field Enumeration Values:
32478  *
32479  * Enum | Value | Description
32480  * :-------------------------------------|:------|:-----------------
32481  * ALT_USB_HOST_HCINT8_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
32482  * ALT_USB_HOST_HCINT8_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
32483  *
32484  * Field Access Macros:
32485  *
32486  */
32487 /*
32488  * Enumerated value for register field ALT_USB_HOST_HCINT8_FRMOVRUN
32489  *
32490  * No Frame Overrun
32491  */
32492 #define ALT_USB_HOST_HCINT8_FRMOVRUN_E_INACT 0x0
32493 /*
32494  * Enumerated value for register field ALT_USB_HOST_HCINT8_FRMOVRUN
32495  *
32496  * Frame Overrun
32497  */
32498 #define ALT_USB_HOST_HCINT8_FRMOVRUN_E_ACT 0x1
32499 
32500 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_FRMOVRUN register field. */
32501 #define ALT_USB_HOST_HCINT8_FRMOVRUN_LSB 9
32502 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_FRMOVRUN register field. */
32503 #define ALT_USB_HOST_HCINT8_FRMOVRUN_MSB 9
32504 /* The width in bits of the ALT_USB_HOST_HCINT8_FRMOVRUN register field. */
32505 #define ALT_USB_HOST_HCINT8_FRMOVRUN_WIDTH 1
32506 /* The mask used to set the ALT_USB_HOST_HCINT8_FRMOVRUN register field value. */
32507 #define ALT_USB_HOST_HCINT8_FRMOVRUN_SET_MSK 0x00000200
32508 /* The mask used to clear the ALT_USB_HOST_HCINT8_FRMOVRUN register field value. */
32509 #define ALT_USB_HOST_HCINT8_FRMOVRUN_CLR_MSK 0xfffffdff
32510 /* The reset value of the ALT_USB_HOST_HCINT8_FRMOVRUN register field. */
32511 #define ALT_USB_HOST_HCINT8_FRMOVRUN_RESET 0x0
32512 /* Extracts the ALT_USB_HOST_HCINT8_FRMOVRUN field value from a register. */
32513 #define ALT_USB_HOST_HCINT8_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
32514 /* Produces a ALT_USB_HOST_HCINT8_FRMOVRUN register field value suitable for setting the register. */
32515 #define ALT_USB_HOST_HCINT8_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
32516 
32517 /*
32518  * Field : Data Toggle Error - datatglerr
32519  *
32520  * This bit can be set only by the core and the application should write 1 to clear
32521  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
32522  * core.
32523  *
32524  * Field Enumeration Values:
32525  *
32526  * Enum | Value | Description
32527  * :---------------------------------------|:------|:---------------------
32528  * ALT_USB_HOST_HCINT8_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
32529  * ALT_USB_HOST_HCINT8_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
32530  *
32531  * Field Access Macros:
32532  *
32533  */
32534 /*
32535  * Enumerated value for register field ALT_USB_HOST_HCINT8_DATATGLERR
32536  *
32537  * No Data Toggle Error
32538  */
32539 #define ALT_USB_HOST_HCINT8_DATATGLERR_E_INACT 0x0
32540 /*
32541  * Enumerated value for register field ALT_USB_HOST_HCINT8_DATATGLERR
32542  *
32543  * Data Toggle Error
32544  */
32545 #define ALT_USB_HOST_HCINT8_DATATGLERR_E_ACT 0x1
32546 
32547 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_DATATGLERR register field. */
32548 #define ALT_USB_HOST_HCINT8_DATATGLERR_LSB 10
32549 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_DATATGLERR register field. */
32550 #define ALT_USB_HOST_HCINT8_DATATGLERR_MSB 10
32551 /* The width in bits of the ALT_USB_HOST_HCINT8_DATATGLERR register field. */
32552 #define ALT_USB_HOST_HCINT8_DATATGLERR_WIDTH 1
32553 /* The mask used to set the ALT_USB_HOST_HCINT8_DATATGLERR register field value. */
32554 #define ALT_USB_HOST_HCINT8_DATATGLERR_SET_MSK 0x00000400
32555 /* The mask used to clear the ALT_USB_HOST_HCINT8_DATATGLERR register field value. */
32556 #define ALT_USB_HOST_HCINT8_DATATGLERR_CLR_MSK 0xfffffbff
32557 /* The reset value of the ALT_USB_HOST_HCINT8_DATATGLERR register field. */
32558 #define ALT_USB_HOST_HCINT8_DATATGLERR_RESET 0x0
32559 /* Extracts the ALT_USB_HOST_HCINT8_DATATGLERR field value from a register. */
32560 #define ALT_USB_HOST_HCINT8_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
32561 /* Produces a ALT_USB_HOST_HCINT8_DATATGLERR register field value suitable for setting the register. */
32562 #define ALT_USB_HOST_HCINT8_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
32563 
32564 /*
32565  * Field : BNA Interrupt - bnaintr
32566  *
32567  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
32568  * generates this interrupt when the descriptor accessed is not ready for the Core
32569  * to process. BNA will not be generated for Isochronous channels. for non
32570  * Scatter/Gather DMA mode, this bit is reserved.
32571  *
32572  * Field Enumeration Values:
32573  *
32574  * Enum | Value | Description
32575  * :------------------------------------|:------|:-----------------
32576  * ALT_USB_HOST_HCINT8_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
32577  * ALT_USB_HOST_HCINT8_BNAINTR_E_ACT | 0x1 | BNA Interrupt
32578  *
32579  * Field Access Macros:
32580  *
32581  */
32582 /*
32583  * Enumerated value for register field ALT_USB_HOST_HCINT8_BNAINTR
32584  *
32585  * No BNA Interrupt
32586  */
32587 #define ALT_USB_HOST_HCINT8_BNAINTR_E_INACT 0x0
32588 /*
32589  * Enumerated value for register field ALT_USB_HOST_HCINT8_BNAINTR
32590  *
32591  * BNA Interrupt
32592  */
32593 #define ALT_USB_HOST_HCINT8_BNAINTR_E_ACT 0x1
32594 
32595 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_BNAINTR register field. */
32596 #define ALT_USB_HOST_HCINT8_BNAINTR_LSB 11
32597 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_BNAINTR register field. */
32598 #define ALT_USB_HOST_HCINT8_BNAINTR_MSB 11
32599 /* The width in bits of the ALT_USB_HOST_HCINT8_BNAINTR register field. */
32600 #define ALT_USB_HOST_HCINT8_BNAINTR_WIDTH 1
32601 /* The mask used to set the ALT_USB_HOST_HCINT8_BNAINTR register field value. */
32602 #define ALT_USB_HOST_HCINT8_BNAINTR_SET_MSK 0x00000800
32603 /* The mask used to clear the ALT_USB_HOST_HCINT8_BNAINTR register field value. */
32604 #define ALT_USB_HOST_HCINT8_BNAINTR_CLR_MSK 0xfffff7ff
32605 /* The reset value of the ALT_USB_HOST_HCINT8_BNAINTR register field. */
32606 #define ALT_USB_HOST_HCINT8_BNAINTR_RESET 0x0
32607 /* Extracts the ALT_USB_HOST_HCINT8_BNAINTR field value from a register. */
32608 #define ALT_USB_HOST_HCINT8_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
32609 /* Produces a ALT_USB_HOST_HCINT8_BNAINTR register field value suitable for setting the register. */
32610 #define ALT_USB_HOST_HCINT8_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
32611 
32612 /*
32613  * Field : Excessive Transaction Error - xcs_xact_err
32614  *
32615  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
32616  * this bit when 3 consecutive transaction errors occurred on the USB bus.
32617  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
32618  * Scatter/Gather DMA mode, this bit is reserved.
32619  *
32620  * Field Enumeration Values:
32621  *
32622  * Enum | Value | Description
32623  * :-------------------------------------------|:------|:-------------------------------
32624  * ALT_USB_HOST_HCINT8_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
32625  * ALT_USB_HOST_HCINT8_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
32626  *
32627  * Field Access Macros:
32628  *
32629  */
32630 /*
32631  * Enumerated value for register field ALT_USB_HOST_HCINT8_XCS_XACT_ERR
32632  *
32633  * No Excessive Transaction Error
32634  */
32635 #define ALT_USB_HOST_HCINT8_XCS_XACT_ERR_E_INACT 0x0
32636 /*
32637  * Enumerated value for register field ALT_USB_HOST_HCINT8_XCS_XACT_ERR
32638  *
32639  * Excessive Transaction Error
32640  */
32641 #define ALT_USB_HOST_HCINT8_XCS_XACT_ERR_E_ACVTIVE 0x1
32642 
32643 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_XCS_XACT_ERR register field. */
32644 #define ALT_USB_HOST_HCINT8_XCS_XACT_ERR_LSB 12
32645 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_XCS_XACT_ERR register field. */
32646 #define ALT_USB_HOST_HCINT8_XCS_XACT_ERR_MSB 12
32647 /* The width in bits of the ALT_USB_HOST_HCINT8_XCS_XACT_ERR register field. */
32648 #define ALT_USB_HOST_HCINT8_XCS_XACT_ERR_WIDTH 1
32649 /* The mask used to set the ALT_USB_HOST_HCINT8_XCS_XACT_ERR register field value. */
32650 #define ALT_USB_HOST_HCINT8_XCS_XACT_ERR_SET_MSK 0x00001000
32651 /* The mask used to clear the ALT_USB_HOST_HCINT8_XCS_XACT_ERR register field value. */
32652 #define ALT_USB_HOST_HCINT8_XCS_XACT_ERR_CLR_MSK 0xffffefff
32653 /* The reset value of the ALT_USB_HOST_HCINT8_XCS_XACT_ERR register field. */
32654 #define ALT_USB_HOST_HCINT8_XCS_XACT_ERR_RESET 0x0
32655 /* Extracts the ALT_USB_HOST_HCINT8_XCS_XACT_ERR field value from a register. */
32656 #define ALT_USB_HOST_HCINT8_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
32657 /* Produces a ALT_USB_HOST_HCINT8_XCS_XACT_ERR register field value suitable for setting the register. */
32658 #define ALT_USB_HOST_HCINT8_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
32659 
32660 /*
32661  * Field : Descriptor rollover interrupt - desc_lst_rollintr
32662  *
32663  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
32664  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
32665  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
32666  * mode, this bit is reserved.
32667  *
32668  * Field Enumeration Values:
32669  *
32670  * Enum | Value | Description
32671  * :----------------------------------------------|:------|:---------------------------------
32672  * ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
32673  * ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
32674  *
32675  * Field Access Macros:
32676  *
32677  */
32678 /*
32679  * Enumerated value for register field ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR
32680  *
32681  * No Descriptor rollover interrupt
32682  */
32683 #define ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR_E_INACT 0x0
32684 /*
32685  * Enumerated value for register field ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR
32686  *
32687  * Descriptor rollover interrupt
32688  */
32689 #define ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR_E_ACT 0x1
32690 
32691 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR register field. */
32692 #define ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR_LSB 13
32693 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR register field. */
32694 #define ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR_MSB 13
32695 /* The width in bits of the ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR register field. */
32696 #define ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR_WIDTH 1
32697 /* The mask used to set the ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR register field value. */
32698 #define ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR_SET_MSK 0x00002000
32699 /* The mask used to clear the ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR register field value. */
32700 #define ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
32701 /* The reset value of the ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR register field. */
32702 #define ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR_RESET 0x0
32703 /* Extracts the ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR field value from a register. */
32704 #define ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
32705 /* Produces a ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR register field value suitable for setting the register. */
32706 #define ALT_USB_HOST_HCINT8_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
32707 
32708 #ifndef __ASSEMBLY__
32709 /*
32710  * WARNING: The C register and register group struct declarations are provided for
32711  * convenience and illustrative purposes. They should, however, be used with
32712  * caution as the C language standard provides no guarantees about the alignment or
32713  * atomicity of device memory accesses. The recommended practice for writing
32714  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
32715  * alt_write_word() functions.
32716  *
32717  * The struct declaration for register ALT_USB_HOST_HCINT8.
32718  */
32719 struct ALT_USB_HOST_HCINT8_s
32720 {
32721  const uint32_t xfercompl : 1; /* Transfer Completed */
32722  const uint32_t chhltd : 1; /* Channel Halted */
32723  const uint32_t ahberr : 1; /* AHB Error */
32724  const uint32_t stall : 1; /* STALL Response Received Interrupt */
32725  const uint32_t nak : 1; /* NAK Response Received Interrupt */
32726  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
32727  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
32728  const uint32_t xacterr : 1; /* Transaction Error */
32729  const uint32_t bblerr : 1; /* Babble Error */
32730  const uint32_t frmovrun : 1; /* Frame Overrun */
32731  const uint32_t datatglerr : 1; /* Data Toggle Error */
32732  const uint32_t bnaintr : 1; /* BNA Interrupt */
32733  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
32734  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
32735  uint32_t : 18; /* *UNDEFINED* */
32736 };
32737 
32738 /* The typedef declaration for register ALT_USB_HOST_HCINT8. */
32739 typedef volatile struct ALT_USB_HOST_HCINT8_s ALT_USB_HOST_HCINT8_t;
32740 #endif /* __ASSEMBLY__ */
32741 
32742 /* The byte offset of the ALT_USB_HOST_HCINT8 register from the beginning of the component. */
32743 #define ALT_USB_HOST_HCINT8_OFST 0x208
32744 /* The address of the ALT_USB_HOST_HCINT8 register. */
32745 #define ALT_USB_HOST_HCINT8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT8_OFST))
32746 
32747 /*
32748  * Register : Host Channel 8 Interrupt Mask Register - hcintmsk8
32749  *
32750  * This register reflects the mask for each channel status described in the
32751  * previous section.
32752  *
32753  * Register Layout
32754  *
32755  * Bits | Access | Reset | Description
32756  * :--------|:-------|:------|:----------------------------------
32757  * [0] | RW | 0x0 | Transfer Completed Mask
32758  * [1] | RW | 0x0 | Channel Halted Mask
32759  * [2] | RW | 0x0 | AHB Error Mask
32760  * [10:3] | ??? | 0x0 | *UNDEFINED*
32761  * [11] | RW | 0x0 | BNA Interrupt mask
32762  * [12] | ??? | 0x0 | *UNDEFINED*
32763  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
32764  * [31:14] | ??? | 0x0 | *UNDEFINED*
32765  *
32766  */
32767 /*
32768  * Field : Transfer Completed Mask - xfercomplmsk
32769  *
32770  * Transfer complete.
32771  *
32772  * Field Enumeration Values:
32773  *
32774  * Enum | Value | Description
32775  * :--------------------------------------------|:------|:------------
32776  * ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK_E_MSK | 0x0 | Mask
32777  * ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
32778  *
32779  * Field Access Macros:
32780  *
32781  */
32782 /*
32783  * Enumerated value for register field ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK
32784  *
32785  * Mask
32786  */
32787 #define ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK_E_MSK 0x0
32788 /*
32789  * Enumerated value for register field ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK
32790  *
32791  * No mask
32792  */
32793 #define ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK_E_NOMSK 0x1
32794 
32795 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK register field. */
32796 #define ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK_LSB 0
32797 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK register field. */
32798 #define ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK_MSB 0
32799 /* The width in bits of the ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK register field. */
32800 #define ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK_WIDTH 1
32801 /* The mask used to set the ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK register field value. */
32802 #define ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK_SET_MSK 0x00000001
32803 /* The mask used to clear the ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK register field value. */
32804 #define ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK_CLR_MSK 0xfffffffe
32805 /* The reset value of the ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK register field. */
32806 #define ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK_RESET 0x0
32807 /* Extracts the ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK field value from a register. */
32808 #define ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
32809 /* Produces a ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK register field value suitable for setting the register. */
32810 #define ALT_USB_HOST_HCINTMSK8_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
32811 
32812 /*
32813  * Field : Channel Halted Mask - chhltdmsk
32814  *
32815  * Channel Halted.
32816  *
32817  * Field Enumeration Values:
32818  *
32819  * Enum | Value | Description
32820  * :-----------------------------------------|:------|:------------
32821  * ALT_USB_HOST_HCINTMSK8_CHHLTDMSK_E_MSK | 0x0 | Mask
32822  * ALT_USB_HOST_HCINTMSK8_CHHLTDMSK_E_NOMSK | 0x1 | No mask
32823  *
32824  * Field Access Macros:
32825  *
32826  */
32827 /*
32828  * Enumerated value for register field ALT_USB_HOST_HCINTMSK8_CHHLTDMSK
32829  *
32830  * Mask
32831  */
32832 #define ALT_USB_HOST_HCINTMSK8_CHHLTDMSK_E_MSK 0x0
32833 /*
32834  * Enumerated value for register field ALT_USB_HOST_HCINTMSK8_CHHLTDMSK
32835  *
32836  * No mask
32837  */
32838 #define ALT_USB_HOST_HCINTMSK8_CHHLTDMSK_E_NOMSK 0x1
32839 
32840 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK8_CHHLTDMSK register field. */
32841 #define ALT_USB_HOST_HCINTMSK8_CHHLTDMSK_LSB 1
32842 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK8_CHHLTDMSK register field. */
32843 #define ALT_USB_HOST_HCINTMSK8_CHHLTDMSK_MSB 1
32844 /* The width in bits of the ALT_USB_HOST_HCINTMSK8_CHHLTDMSK register field. */
32845 #define ALT_USB_HOST_HCINTMSK8_CHHLTDMSK_WIDTH 1
32846 /* The mask used to set the ALT_USB_HOST_HCINTMSK8_CHHLTDMSK register field value. */
32847 #define ALT_USB_HOST_HCINTMSK8_CHHLTDMSK_SET_MSK 0x00000002
32848 /* The mask used to clear the ALT_USB_HOST_HCINTMSK8_CHHLTDMSK register field value. */
32849 #define ALT_USB_HOST_HCINTMSK8_CHHLTDMSK_CLR_MSK 0xfffffffd
32850 /* The reset value of the ALT_USB_HOST_HCINTMSK8_CHHLTDMSK register field. */
32851 #define ALT_USB_HOST_HCINTMSK8_CHHLTDMSK_RESET 0x0
32852 /* Extracts the ALT_USB_HOST_HCINTMSK8_CHHLTDMSK field value from a register. */
32853 #define ALT_USB_HOST_HCINTMSK8_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
32854 /* Produces a ALT_USB_HOST_HCINTMSK8_CHHLTDMSK register field value suitable for setting the register. */
32855 #define ALT_USB_HOST_HCINTMSK8_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
32856 
32857 /*
32858  * Field : AHB Error Mask - ahberrmsk
32859  *
32860  * In scatter/gather DMA mode for host, interrupts will not be generated due to
32861  * the corresponding bits set in HCINTn.
32862  *
32863  * Field Enumeration Values:
32864  *
32865  * Enum | Value | Description
32866  * :-----------------------------------------|:------|:------------
32867  * ALT_USB_HOST_HCINTMSK8_AHBERRMSK_E_MSK | 0x0 | Mask
32868  * ALT_USB_HOST_HCINTMSK8_AHBERRMSK_E_NOMSK | 0x1 | No mask
32869  *
32870  * Field Access Macros:
32871  *
32872  */
32873 /*
32874  * Enumerated value for register field ALT_USB_HOST_HCINTMSK8_AHBERRMSK
32875  *
32876  * Mask
32877  */
32878 #define ALT_USB_HOST_HCINTMSK8_AHBERRMSK_E_MSK 0x0
32879 /*
32880  * Enumerated value for register field ALT_USB_HOST_HCINTMSK8_AHBERRMSK
32881  *
32882  * No mask
32883  */
32884 #define ALT_USB_HOST_HCINTMSK8_AHBERRMSK_E_NOMSK 0x1
32885 
32886 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK8_AHBERRMSK register field. */
32887 #define ALT_USB_HOST_HCINTMSK8_AHBERRMSK_LSB 2
32888 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK8_AHBERRMSK register field. */
32889 #define ALT_USB_HOST_HCINTMSK8_AHBERRMSK_MSB 2
32890 /* The width in bits of the ALT_USB_HOST_HCINTMSK8_AHBERRMSK register field. */
32891 #define ALT_USB_HOST_HCINTMSK8_AHBERRMSK_WIDTH 1
32892 /* The mask used to set the ALT_USB_HOST_HCINTMSK8_AHBERRMSK register field value. */
32893 #define ALT_USB_HOST_HCINTMSK8_AHBERRMSK_SET_MSK 0x00000004
32894 /* The mask used to clear the ALT_USB_HOST_HCINTMSK8_AHBERRMSK register field value. */
32895 #define ALT_USB_HOST_HCINTMSK8_AHBERRMSK_CLR_MSK 0xfffffffb
32896 /* The reset value of the ALT_USB_HOST_HCINTMSK8_AHBERRMSK register field. */
32897 #define ALT_USB_HOST_HCINTMSK8_AHBERRMSK_RESET 0x0
32898 /* Extracts the ALT_USB_HOST_HCINTMSK8_AHBERRMSK field value from a register. */
32899 #define ALT_USB_HOST_HCINTMSK8_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
32900 /* Produces a ALT_USB_HOST_HCINTMSK8_AHBERRMSK register field value suitable for setting the register. */
32901 #define ALT_USB_HOST_HCINTMSK8_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
32902 
32903 /*
32904  * Field : BNA Interrupt mask - bnaintrmsk
32905  *
32906  * This bit is valid only when Scatter/Gather DMA mode is enabled.
32907  *
32908  * Field Enumeration Values:
32909  *
32910  * Enum | Value | Description
32911  * :------------------------------------------|:------|:------------
32912  * ALT_USB_HOST_HCINTMSK8_BNAINTRMSK_E_MSK | 0x0 | Mask
32913  * ALT_USB_HOST_HCINTMSK8_BNAINTRMSK_E_NOMSK | 0x1 | No mask
32914  *
32915  * Field Access Macros:
32916  *
32917  */
32918 /*
32919  * Enumerated value for register field ALT_USB_HOST_HCINTMSK8_BNAINTRMSK
32920  *
32921  * Mask
32922  */
32923 #define ALT_USB_HOST_HCINTMSK8_BNAINTRMSK_E_MSK 0x0
32924 /*
32925  * Enumerated value for register field ALT_USB_HOST_HCINTMSK8_BNAINTRMSK
32926  *
32927  * No mask
32928  */
32929 #define ALT_USB_HOST_HCINTMSK8_BNAINTRMSK_E_NOMSK 0x1
32930 
32931 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK8_BNAINTRMSK register field. */
32932 #define ALT_USB_HOST_HCINTMSK8_BNAINTRMSK_LSB 11
32933 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK8_BNAINTRMSK register field. */
32934 #define ALT_USB_HOST_HCINTMSK8_BNAINTRMSK_MSB 11
32935 /* The width in bits of the ALT_USB_HOST_HCINTMSK8_BNAINTRMSK register field. */
32936 #define ALT_USB_HOST_HCINTMSK8_BNAINTRMSK_WIDTH 1
32937 /* The mask used to set the ALT_USB_HOST_HCINTMSK8_BNAINTRMSK register field value. */
32938 #define ALT_USB_HOST_HCINTMSK8_BNAINTRMSK_SET_MSK 0x00000800
32939 /* The mask used to clear the ALT_USB_HOST_HCINTMSK8_BNAINTRMSK register field value. */
32940 #define ALT_USB_HOST_HCINTMSK8_BNAINTRMSK_CLR_MSK 0xfffff7ff
32941 /* The reset value of the ALT_USB_HOST_HCINTMSK8_BNAINTRMSK register field. */
32942 #define ALT_USB_HOST_HCINTMSK8_BNAINTRMSK_RESET 0x0
32943 /* Extracts the ALT_USB_HOST_HCINTMSK8_BNAINTRMSK field value from a register. */
32944 #define ALT_USB_HOST_HCINTMSK8_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
32945 /* Produces a ALT_USB_HOST_HCINTMSK8_BNAINTRMSK register field value suitable for setting the register. */
32946 #define ALT_USB_HOST_HCINTMSK8_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
32947 
32948 /*
32949  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
32950  *
32951  * This bit is valid only when Scatter/Gather DMA mode is enabled.
32952  *
32953  * Field Enumeration Values:
32954  *
32955  * Enum | Value | Description
32956  * :---------------------------------------------------|:------|:------------
32957  * ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
32958  * ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
32959  *
32960  * Field Access Macros:
32961  *
32962  */
32963 /*
32964  * Enumerated value for register field ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK
32965  *
32966  * Mask
32967  */
32968 #define ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK_E_MSK 0x0
32969 /*
32970  * Enumerated value for register field ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK
32971  *
32972  * No mask
32973  */
32974 #define ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
32975 
32976 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK register field. */
32977 #define ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK_LSB 13
32978 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK register field. */
32979 #define ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK_MSB 13
32980 /* The width in bits of the ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK register field. */
32981 #define ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK_WIDTH 1
32982 /* The mask used to set the ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK register field value. */
32983 #define ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
32984 /* The mask used to clear the ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK register field value. */
32985 #define ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
32986 /* The reset value of the ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK register field. */
32987 #define ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK_RESET 0x0
32988 /* Extracts the ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK field value from a register. */
32989 #define ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
32990 /* Produces a ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
32991 #define ALT_USB_HOST_HCINTMSK8_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
32992 
32993 #ifndef __ASSEMBLY__
32994 /*
32995  * WARNING: The C register and register group struct declarations are provided for
32996  * convenience and illustrative purposes. They should, however, be used with
32997  * caution as the C language standard provides no guarantees about the alignment or
32998  * atomicity of device memory accesses. The recommended practice for writing
32999  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
33000  * alt_write_word() functions.
33001  *
33002  * The struct declaration for register ALT_USB_HOST_HCINTMSK8.
33003  */
33004 struct ALT_USB_HOST_HCINTMSK8_s
33005 {
33006  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
33007  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
33008  uint32_t ahberrmsk : 1; /* AHB Error Mask */
33009  uint32_t : 8; /* *UNDEFINED* */
33010  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
33011  uint32_t : 1; /* *UNDEFINED* */
33012  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
33013  uint32_t : 18; /* *UNDEFINED* */
33014 };
33015 
33016 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK8. */
33017 typedef volatile struct ALT_USB_HOST_HCINTMSK8_s ALT_USB_HOST_HCINTMSK8_t;
33018 #endif /* __ASSEMBLY__ */
33019 
33020 /* The byte offset of the ALT_USB_HOST_HCINTMSK8 register from the beginning of the component. */
33021 #define ALT_USB_HOST_HCINTMSK8_OFST 0x20c
33022 /* The address of the ALT_USB_HOST_HCINTMSK8 register. */
33023 #define ALT_USB_HOST_HCINTMSK8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK8_OFST))
33024 
33025 /*
33026  * Register : Host Channel 8 Transfer Size Register - hctsiz8
33027  *
33028  * Buffer DMA Mode
33029  *
33030  * Register Layout
33031  *
33032  * Bits | Access | Reset | Description
33033  * :--------|:-------|:------|:--------------
33034  * [18:0] | RW | 0x0 | Transfer Size
33035  * [28:19] | RW | 0x0 | Packet Count
33036  * [30:29] | RW | 0x0 | PID
33037  * [31] | RW | 0x0 | Do Ping
33038  *
33039  */
33040 /*
33041  * Field : Transfer Size - xfersize
33042  *
33043  * for an OUT, this field is the number of data bytes the host sends during the
33044  * transfer. for an IN, this field is the buffer size that the application has
33045  * Reserved for the transfer. The application is expected to program this field as
33046  * an integer multiple of the maximum packet size for IN transactions (periodic and
33047  * non-periodic).The width of this counter is specified as 19 bits.
33048  *
33049  * Field Access Macros:
33050  *
33051  */
33052 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ8_XFERSIZE register field. */
33053 #define ALT_USB_HOST_HCTSIZ8_XFERSIZE_LSB 0
33054 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ8_XFERSIZE register field. */
33055 #define ALT_USB_HOST_HCTSIZ8_XFERSIZE_MSB 18
33056 /* The width in bits of the ALT_USB_HOST_HCTSIZ8_XFERSIZE register field. */
33057 #define ALT_USB_HOST_HCTSIZ8_XFERSIZE_WIDTH 19
33058 /* The mask used to set the ALT_USB_HOST_HCTSIZ8_XFERSIZE register field value. */
33059 #define ALT_USB_HOST_HCTSIZ8_XFERSIZE_SET_MSK 0x0007ffff
33060 /* The mask used to clear the ALT_USB_HOST_HCTSIZ8_XFERSIZE register field value. */
33061 #define ALT_USB_HOST_HCTSIZ8_XFERSIZE_CLR_MSK 0xfff80000
33062 /* The reset value of the ALT_USB_HOST_HCTSIZ8_XFERSIZE register field. */
33063 #define ALT_USB_HOST_HCTSIZ8_XFERSIZE_RESET 0x0
33064 /* Extracts the ALT_USB_HOST_HCTSIZ8_XFERSIZE field value from a register. */
33065 #define ALT_USB_HOST_HCTSIZ8_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
33066 /* Produces a ALT_USB_HOST_HCTSIZ8_XFERSIZE register field value suitable for setting the register. */
33067 #define ALT_USB_HOST_HCTSIZ8_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
33068 
33069 /*
33070  * Field : Packet Count - pktcnt
33071  *
33072  * This field is programmed by the application with the expected number of packets
33073  * to be transmitted (OUT) or received (IN). The host decrements this count on
33074  * every successful transmission or reception of an OUT/IN packet. Once this count
33075  * reaches zero, the application is interrupted to indicate normal completion. The
33076  * width of this counter is specified as 10 bits.
33077  *
33078  * Field Access Macros:
33079  *
33080  */
33081 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ8_PKTCNT register field. */
33082 #define ALT_USB_HOST_HCTSIZ8_PKTCNT_LSB 19
33083 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ8_PKTCNT register field. */
33084 #define ALT_USB_HOST_HCTSIZ8_PKTCNT_MSB 28
33085 /* The width in bits of the ALT_USB_HOST_HCTSIZ8_PKTCNT register field. */
33086 #define ALT_USB_HOST_HCTSIZ8_PKTCNT_WIDTH 10
33087 /* The mask used to set the ALT_USB_HOST_HCTSIZ8_PKTCNT register field value. */
33088 #define ALT_USB_HOST_HCTSIZ8_PKTCNT_SET_MSK 0x1ff80000
33089 /* The mask used to clear the ALT_USB_HOST_HCTSIZ8_PKTCNT register field value. */
33090 #define ALT_USB_HOST_HCTSIZ8_PKTCNT_CLR_MSK 0xe007ffff
33091 /* The reset value of the ALT_USB_HOST_HCTSIZ8_PKTCNT register field. */
33092 #define ALT_USB_HOST_HCTSIZ8_PKTCNT_RESET 0x0
33093 /* Extracts the ALT_USB_HOST_HCTSIZ8_PKTCNT field value from a register. */
33094 #define ALT_USB_HOST_HCTSIZ8_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
33095 /* Produces a ALT_USB_HOST_HCTSIZ8_PKTCNT register field value suitable for setting the register. */
33096 #define ALT_USB_HOST_HCTSIZ8_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
33097 
33098 /*
33099  * Field : PID - pid
33100  *
33101  * The application programs this field with the type of PID to use forthe initial
33102  * transaction. The host maintains this field for the rest of the transfer.
33103  *
33104  * Field Enumeration Values:
33105  *
33106  * Enum | Value | Description
33107  * :---------------------------------|:------|:------------------------------------
33108  * ALT_USB_HOST_HCTSIZ8_PID_E_DATA0 | 0x0 | DATA0
33109  * ALT_USB_HOST_HCTSIZ8_PID_E_DATA2 | 0x1 | DATA2
33110  * ALT_USB_HOST_HCTSIZ8_PID_E_DATA1 | 0x2 | DATA1
33111  * ALT_USB_HOST_HCTSIZ8_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
33112  *
33113  * Field Access Macros:
33114  *
33115  */
33116 /*
33117  * Enumerated value for register field ALT_USB_HOST_HCTSIZ8_PID
33118  *
33119  * DATA0
33120  */
33121 #define ALT_USB_HOST_HCTSIZ8_PID_E_DATA0 0x0
33122 /*
33123  * Enumerated value for register field ALT_USB_HOST_HCTSIZ8_PID
33124  *
33125  * DATA2
33126  */
33127 #define ALT_USB_HOST_HCTSIZ8_PID_E_DATA2 0x1
33128 /*
33129  * Enumerated value for register field ALT_USB_HOST_HCTSIZ8_PID
33130  *
33131  * DATA1
33132  */
33133 #define ALT_USB_HOST_HCTSIZ8_PID_E_DATA1 0x2
33134 /*
33135  * Enumerated value for register field ALT_USB_HOST_HCTSIZ8_PID
33136  *
33137  * MDATA (non-control)/SETUP (control)
33138  */
33139 #define ALT_USB_HOST_HCTSIZ8_PID_E_MDATA 0x3
33140 
33141 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ8_PID register field. */
33142 #define ALT_USB_HOST_HCTSIZ8_PID_LSB 29
33143 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ8_PID register field. */
33144 #define ALT_USB_HOST_HCTSIZ8_PID_MSB 30
33145 /* The width in bits of the ALT_USB_HOST_HCTSIZ8_PID register field. */
33146 #define ALT_USB_HOST_HCTSIZ8_PID_WIDTH 2
33147 /* The mask used to set the ALT_USB_HOST_HCTSIZ8_PID register field value. */
33148 #define ALT_USB_HOST_HCTSIZ8_PID_SET_MSK 0x60000000
33149 /* The mask used to clear the ALT_USB_HOST_HCTSIZ8_PID register field value. */
33150 #define ALT_USB_HOST_HCTSIZ8_PID_CLR_MSK 0x9fffffff
33151 /* The reset value of the ALT_USB_HOST_HCTSIZ8_PID register field. */
33152 #define ALT_USB_HOST_HCTSIZ8_PID_RESET 0x0
33153 /* Extracts the ALT_USB_HOST_HCTSIZ8_PID field value from a register. */
33154 #define ALT_USB_HOST_HCTSIZ8_PID_GET(value) (((value) & 0x60000000) >> 29)
33155 /* Produces a ALT_USB_HOST_HCTSIZ8_PID register field value suitable for setting the register. */
33156 #define ALT_USB_HOST_HCTSIZ8_PID_SET(value) (((value) << 29) & 0x60000000)
33157 
33158 /*
33159  * Field : Do Ping - dopng
33160  *
33161  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
33162  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
33163  * for IN transfers it disables the channel.
33164  *
33165  * Field Enumeration Values:
33166  *
33167  * Enum | Value | Description
33168  * :------------------------------------|:------|:-----------------
33169  * ALT_USB_HOST_HCTSIZ8_DOPNG_E_NOPING | 0x0 | No ping protocol
33170  * ALT_USB_HOST_HCTSIZ8_DOPNG_E_PING | 0x1 | Ping protocol
33171  *
33172  * Field Access Macros:
33173  *
33174  */
33175 /*
33176  * Enumerated value for register field ALT_USB_HOST_HCTSIZ8_DOPNG
33177  *
33178  * No ping protocol
33179  */
33180 #define ALT_USB_HOST_HCTSIZ8_DOPNG_E_NOPING 0x0
33181 /*
33182  * Enumerated value for register field ALT_USB_HOST_HCTSIZ8_DOPNG
33183  *
33184  * Ping protocol
33185  */
33186 #define ALT_USB_HOST_HCTSIZ8_DOPNG_E_PING 0x1
33187 
33188 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ8_DOPNG register field. */
33189 #define ALT_USB_HOST_HCTSIZ8_DOPNG_LSB 31
33190 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ8_DOPNG register field. */
33191 #define ALT_USB_HOST_HCTSIZ8_DOPNG_MSB 31
33192 /* The width in bits of the ALT_USB_HOST_HCTSIZ8_DOPNG register field. */
33193 #define ALT_USB_HOST_HCTSIZ8_DOPNG_WIDTH 1
33194 /* The mask used to set the ALT_USB_HOST_HCTSIZ8_DOPNG register field value. */
33195 #define ALT_USB_HOST_HCTSIZ8_DOPNG_SET_MSK 0x80000000
33196 /* The mask used to clear the ALT_USB_HOST_HCTSIZ8_DOPNG register field value. */
33197 #define ALT_USB_HOST_HCTSIZ8_DOPNG_CLR_MSK 0x7fffffff
33198 /* The reset value of the ALT_USB_HOST_HCTSIZ8_DOPNG register field. */
33199 #define ALT_USB_HOST_HCTSIZ8_DOPNG_RESET 0x0
33200 /* Extracts the ALT_USB_HOST_HCTSIZ8_DOPNG field value from a register. */
33201 #define ALT_USB_HOST_HCTSIZ8_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
33202 /* Produces a ALT_USB_HOST_HCTSIZ8_DOPNG register field value suitable for setting the register. */
33203 #define ALT_USB_HOST_HCTSIZ8_DOPNG_SET(value) (((value) << 31) & 0x80000000)
33204 
33205 #ifndef __ASSEMBLY__
33206 /*
33207  * WARNING: The C register and register group struct declarations are provided for
33208  * convenience and illustrative purposes. They should, however, be used with
33209  * caution as the C language standard provides no guarantees about the alignment or
33210  * atomicity of device memory accesses. The recommended practice for writing
33211  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
33212  * alt_write_word() functions.
33213  *
33214  * The struct declaration for register ALT_USB_HOST_HCTSIZ8.
33215  */
33216 struct ALT_USB_HOST_HCTSIZ8_s
33217 {
33218  uint32_t xfersize : 19; /* Transfer Size */
33219  uint32_t pktcnt : 10; /* Packet Count */
33220  uint32_t pid : 2; /* PID */
33221  uint32_t dopng : 1; /* Do Ping */
33222 };
33223 
33224 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ8. */
33225 typedef volatile struct ALT_USB_HOST_HCTSIZ8_s ALT_USB_HOST_HCTSIZ8_t;
33226 #endif /* __ASSEMBLY__ */
33227 
33228 /* The byte offset of the ALT_USB_HOST_HCTSIZ8 register from the beginning of the component. */
33229 #define ALT_USB_HOST_HCTSIZ8_OFST 0x210
33230 /* The address of the ALT_USB_HOST_HCTSIZ8 register. */
33231 #define ALT_USB_HOST_HCTSIZ8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ8_OFST))
33232 
33233 /*
33234  * Register : Host Channel 8 DMA Address Register - hcdma8
33235  *
33236  * This register is used by the OTG host in the internal DMA mode to maintain the
33237  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
33238  * DWORD-aligned.
33239  *
33240  * Register Layout
33241  *
33242  * Bits | Access | Reset | Description
33243  * :-------|:-------|:------|:------------
33244  * [31:0] | RW | 0x0 | DMA Address
33245  *
33246  */
33247 /*
33248  * Field : DMA Address - hcdma8
33249  *
33250  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
33251  * first descriptor in the list should be located in this address. The first
33252  * descriptor may be or may not be ready. The core starts processing the list from
33253  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
33254  * in which the isochronous descriptors are present where N is based on nTD as per
33255  * Table below
33256  *
33257  * [31:N] Base Address [N-1:3] Offset [2:0] 000
33258  *
33259  * HS ISOC FS ISOC
33260  *
33261  * nTD N nTD N
33262  *
33263  * 7 6 1 4
33264  *
33265  * 15 7 3 5
33266  *
33267  * 31 8 7 6
33268  *
33269  * 63 9 15 7
33270  *
33271  * 127 10 31 8
33272  *
33273  * 255 11 63 9
33274  *
33275  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
33276  * This value is in terms of number of descriptors. The values can be from 0 to 63.
33277  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
33278  * descriptor processed in the list. This field is updated both by application and
33279  * the core. for example, if the application enables the channel after programming
33280  * CTD=5, then the core will start processing the 6th descriptor. The address is
33281  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
33282  * CTD for isochronous is based on the current frame/microframe value. Need to be
33283  * set to zero by application.
33284  *
33285  * Field Access Macros:
33286  *
33287  */
33288 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA8_HCDMA8 register field. */
33289 #define ALT_USB_HOST_HCDMA8_HCDMA8_LSB 0
33290 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA8_HCDMA8 register field. */
33291 #define ALT_USB_HOST_HCDMA8_HCDMA8_MSB 31
33292 /* The width in bits of the ALT_USB_HOST_HCDMA8_HCDMA8 register field. */
33293 #define ALT_USB_HOST_HCDMA8_HCDMA8_WIDTH 32
33294 /* The mask used to set the ALT_USB_HOST_HCDMA8_HCDMA8 register field value. */
33295 #define ALT_USB_HOST_HCDMA8_HCDMA8_SET_MSK 0xffffffff
33296 /* The mask used to clear the ALT_USB_HOST_HCDMA8_HCDMA8 register field value. */
33297 #define ALT_USB_HOST_HCDMA8_HCDMA8_CLR_MSK 0x00000000
33298 /* The reset value of the ALT_USB_HOST_HCDMA8_HCDMA8 register field. */
33299 #define ALT_USB_HOST_HCDMA8_HCDMA8_RESET 0x0
33300 /* Extracts the ALT_USB_HOST_HCDMA8_HCDMA8 field value from a register. */
33301 #define ALT_USB_HOST_HCDMA8_HCDMA8_GET(value) (((value) & 0xffffffff) >> 0)
33302 /* Produces a ALT_USB_HOST_HCDMA8_HCDMA8 register field value suitable for setting the register. */
33303 #define ALT_USB_HOST_HCDMA8_HCDMA8_SET(value) (((value) << 0) & 0xffffffff)
33304 
33305 #ifndef __ASSEMBLY__
33306 /*
33307  * WARNING: The C register and register group struct declarations are provided for
33308  * convenience and illustrative purposes. They should, however, be used with
33309  * caution as the C language standard provides no guarantees about the alignment or
33310  * atomicity of device memory accesses. The recommended practice for writing
33311  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
33312  * alt_write_word() functions.
33313  *
33314  * The struct declaration for register ALT_USB_HOST_HCDMA8.
33315  */
33316 struct ALT_USB_HOST_HCDMA8_s
33317 {
33318  uint32_t hcdma8 : 32; /* DMA Address */
33319 };
33320 
33321 /* The typedef declaration for register ALT_USB_HOST_HCDMA8. */
33322 typedef volatile struct ALT_USB_HOST_HCDMA8_s ALT_USB_HOST_HCDMA8_t;
33323 #endif /* __ASSEMBLY__ */
33324 
33325 /* The byte offset of the ALT_USB_HOST_HCDMA8 register from the beginning of the component. */
33326 #define ALT_USB_HOST_HCDMA8_OFST 0x214
33327 /* The address of the ALT_USB_HOST_HCDMA8 register. */
33328 #define ALT_USB_HOST_HCDMA8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA8_OFST))
33329 
33330 /*
33331  * Register : Host Channel 8 DMA Buffer Address Register - hcdmab8
33332  *
33333  * These registers are present only in case of Scatter/Gather DMA. These
33334  * registers are implemented in RAM instead of flop-based implementation. Holds
33335  * the current buffer address. This register is updated as and when the
33336  * data transfer for the corresponding end point is in progress. This
33337  * register is present only in Scatter/Gather DMA mode. Otherwise this field
33338  * is reserved.
33339  *
33340  * Register Layout
33341  *
33342  * Bits | Access | Reset | Description
33343  * :-------|:-------|:------|:----------------------------------
33344  * [31:0] | RW | 0x0 | Host Channel 8 DMA Buffer Address
33345  *
33346  */
33347 /*
33348  * Field : Host Channel 8 DMA Buffer Address - hcdmab8
33349  *
33350  * These registers are present only in case of Scatter/Gather DMA. These
33351  * registers are implemented in RAM instead of flop-based implementation. Holds
33352  * the current buffer address. This register is updated as and when the data
33353  * transfer for the corresponding end point is in progress. This register is
33354  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
33355  *
33356  * Field Access Macros:
33357  *
33358  */
33359 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB8_HCDMAB8 register field. */
33360 #define ALT_USB_HOST_HCDMAB8_HCDMAB8_LSB 0
33361 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB8_HCDMAB8 register field. */
33362 #define ALT_USB_HOST_HCDMAB8_HCDMAB8_MSB 31
33363 /* The width in bits of the ALT_USB_HOST_HCDMAB8_HCDMAB8 register field. */
33364 #define ALT_USB_HOST_HCDMAB8_HCDMAB8_WIDTH 32
33365 /* The mask used to set the ALT_USB_HOST_HCDMAB8_HCDMAB8 register field value. */
33366 #define ALT_USB_HOST_HCDMAB8_HCDMAB8_SET_MSK 0xffffffff
33367 /* The mask used to clear the ALT_USB_HOST_HCDMAB8_HCDMAB8 register field value. */
33368 #define ALT_USB_HOST_HCDMAB8_HCDMAB8_CLR_MSK 0x00000000
33369 /* The reset value of the ALT_USB_HOST_HCDMAB8_HCDMAB8 register field. */
33370 #define ALT_USB_HOST_HCDMAB8_HCDMAB8_RESET 0x0
33371 /* Extracts the ALT_USB_HOST_HCDMAB8_HCDMAB8 field value from a register. */
33372 #define ALT_USB_HOST_HCDMAB8_HCDMAB8_GET(value) (((value) & 0xffffffff) >> 0)
33373 /* Produces a ALT_USB_HOST_HCDMAB8_HCDMAB8 register field value suitable for setting the register. */
33374 #define ALT_USB_HOST_HCDMAB8_HCDMAB8_SET(value) (((value) << 0) & 0xffffffff)
33375 
33376 #ifndef __ASSEMBLY__
33377 /*
33378  * WARNING: The C register and register group struct declarations are provided for
33379  * convenience and illustrative purposes. They should, however, be used with
33380  * caution as the C language standard provides no guarantees about the alignment or
33381  * atomicity of device memory accesses. The recommended practice for writing
33382  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
33383  * alt_write_word() functions.
33384  *
33385  * The struct declaration for register ALT_USB_HOST_HCDMAB8.
33386  */
33387 struct ALT_USB_HOST_HCDMAB8_s
33388 {
33389  uint32_t hcdmab8 : 32; /* Host Channel 8 DMA Buffer Address */
33390 };
33391 
33392 /* The typedef declaration for register ALT_USB_HOST_HCDMAB8. */
33393 typedef volatile struct ALT_USB_HOST_HCDMAB8_s ALT_USB_HOST_HCDMAB8_t;
33394 #endif /* __ASSEMBLY__ */
33395 
33396 /* The byte offset of the ALT_USB_HOST_HCDMAB8 register from the beginning of the component. */
33397 #define ALT_USB_HOST_HCDMAB8_OFST 0x218
33398 /* The address of the ALT_USB_HOST_HCDMAB8 register. */
33399 #define ALT_USB_HOST_HCDMAB8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB8_OFST))
33400 
33401 /*
33402  * Register : Host Channel 9 Characteristics Register - hcchar9
33403  *
33404  * Host Channel 9 Characteristics Register
33405  *
33406  * Register Layout
33407  *
33408  * Bits | Access | Reset | Description
33409  * :--------|:-------|:------|:--------------------
33410  * [10:0] | RW | 0x0 | Maximum Packet Size
33411  * [14:11] | RW | 0x0 | Endpoint Number
33412  * [15] | RW | 0x0 | Endpoint Direction
33413  * [16] | ??? | 0x0 | *UNDEFINED*
33414  * [17] | RW | 0x0 | Low-Speed Device
33415  * [19:18] | RW | 0x0 | Endpoint Type
33416  * [21:20] | RW | 0x0 | Multi Count
33417  * [28:22] | RW | 0x0 | Device Address
33418  * [29] | ??? | 0x0 | *UNDEFINED*
33419  * [30] | R | 0x0 | Channel Disable
33420  * [31] | R | 0x0 | Channel Enable
33421  *
33422  */
33423 /*
33424  * Field : Maximum Packet Size - mps
33425  *
33426  * Indicates the maximum packet size of the associated endpoint.
33427  *
33428  * Field Access Macros:
33429  *
33430  */
33431 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR9_MPS register field. */
33432 #define ALT_USB_HOST_HCCHAR9_MPS_LSB 0
33433 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR9_MPS register field. */
33434 #define ALT_USB_HOST_HCCHAR9_MPS_MSB 10
33435 /* The width in bits of the ALT_USB_HOST_HCCHAR9_MPS register field. */
33436 #define ALT_USB_HOST_HCCHAR9_MPS_WIDTH 11
33437 /* The mask used to set the ALT_USB_HOST_HCCHAR9_MPS register field value. */
33438 #define ALT_USB_HOST_HCCHAR9_MPS_SET_MSK 0x000007ff
33439 /* The mask used to clear the ALT_USB_HOST_HCCHAR9_MPS register field value. */
33440 #define ALT_USB_HOST_HCCHAR9_MPS_CLR_MSK 0xfffff800
33441 /* The reset value of the ALT_USB_HOST_HCCHAR9_MPS register field. */
33442 #define ALT_USB_HOST_HCCHAR9_MPS_RESET 0x0
33443 /* Extracts the ALT_USB_HOST_HCCHAR9_MPS field value from a register. */
33444 #define ALT_USB_HOST_HCCHAR9_MPS_GET(value) (((value) & 0x000007ff) >> 0)
33445 /* Produces a ALT_USB_HOST_HCCHAR9_MPS register field value suitable for setting the register. */
33446 #define ALT_USB_HOST_HCCHAR9_MPS_SET(value) (((value) << 0) & 0x000007ff)
33447 
33448 /*
33449  * Field : Endpoint Number - epnum
33450  *
33451  * Indicates the endpoint number on the device serving as the data source or sink.
33452  *
33453  * Field Enumeration Values:
33454  *
33455  * Enum | Value | Description
33456  * :-------------------------------------|:------|:--------------
33457  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT0 | 0x0 | End point 0
33458  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT1 | 0x1 | End point 1
33459  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT2 | 0x2 | End point 2
33460  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT3 | 0x3 | End point 3
33461  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT4 | 0x4 | End point 4
33462  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT5 | 0x5 | End point 5
33463  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT6 | 0x6 | End point 6
33464  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT7 | 0x7 | End point 7
33465  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT8 | 0x8 | End point 8
33466  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT9 | 0x9 | End point 9
33467  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT10 | 0xa | End point 10
33468  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT11 | 0xb | End point 11
33469  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT12 | 0xc | End point 12
33470  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT13 | 0xd | End point 13
33471  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT14 | 0xe | End point 14
33472  * ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT15 | 0xf | End point 15
33473  *
33474  * Field Access Macros:
33475  *
33476  */
33477 /*
33478  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33479  *
33480  * End point 0
33481  */
33482 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT0 0x0
33483 /*
33484  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33485  *
33486  * End point 1
33487  */
33488 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT1 0x1
33489 /*
33490  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33491  *
33492  * End point 2
33493  */
33494 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT2 0x2
33495 /*
33496  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33497  *
33498  * End point 3
33499  */
33500 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT3 0x3
33501 /*
33502  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33503  *
33504  * End point 4
33505  */
33506 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT4 0x4
33507 /*
33508  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33509  *
33510  * End point 5
33511  */
33512 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT5 0x5
33513 /*
33514  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33515  *
33516  * End point 6
33517  */
33518 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT6 0x6
33519 /*
33520  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33521  *
33522  * End point 7
33523  */
33524 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT7 0x7
33525 /*
33526  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33527  *
33528  * End point 8
33529  */
33530 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT8 0x8
33531 /*
33532  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33533  *
33534  * End point 9
33535  */
33536 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT9 0x9
33537 /*
33538  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33539  *
33540  * End point 10
33541  */
33542 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT10 0xa
33543 /*
33544  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33545  *
33546  * End point 11
33547  */
33548 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT11 0xb
33549 /*
33550  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33551  *
33552  * End point 12
33553  */
33554 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT12 0xc
33555 /*
33556  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33557  *
33558  * End point 13
33559  */
33560 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT13 0xd
33561 /*
33562  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33563  *
33564  * End point 14
33565  */
33566 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT14 0xe
33567 /*
33568  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPNUM
33569  *
33570  * End point 15
33571  */
33572 #define ALT_USB_HOST_HCCHAR9_EPNUM_E_ENDPT15 0xf
33573 
33574 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR9_EPNUM register field. */
33575 #define ALT_USB_HOST_HCCHAR9_EPNUM_LSB 11
33576 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR9_EPNUM register field. */
33577 #define ALT_USB_HOST_HCCHAR9_EPNUM_MSB 14
33578 /* The width in bits of the ALT_USB_HOST_HCCHAR9_EPNUM register field. */
33579 #define ALT_USB_HOST_HCCHAR9_EPNUM_WIDTH 4
33580 /* The mask used to set the ALT_USB_HOST_HCCHAR9_EPNUM register field value. */
33581 #define ALT_USB_HOST_HCCHAR9_EPNUM_SET_MSK 0x00007800
33582 /* The mask used to clear the ALT_USB_HOST_HCCHAR9_EPNUM register field value. */
33583 #define ALT_USB_HOST_HCCHAR9_EPNUM_CLR_MSK 0xffff87ff
33584 /* The reset value of the ALT_USB_HOST_HCCHAR9_EPNUM register field. */
33585 #define ALT_USB_HOST_HCCHAR9_EPNUM_RESET 0x0
33586 /* Extracts the ALT_USB_HOST_HCCHAR9_EPNUM field value from a register. */
33587 #define ALT_USB_HOST_HCCHAR9_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
33588 /* Produces a ALT_USB_HOST_HCCHAR9_EPNUM register field value suitable for setting the register. */
33589 #define ALT_USB_HOST_HCCHAR9_EPNUM_SET(value) (((value) << 11) & 0x00007800)
33590 
33591 /*
33592  * Field : Endpoint Direction - epdir
33593  *
33594  * Indicates whether the transaction is IN or OUT.
33595  *
33596  * Field Enumeration Values:
33597  *
33598  * Enum | Value | Description
33599  * :---------------------------------|:------|:--------------
33600  * ALT_USB_HOST_HCCHAR9_EPDIR_E_OUT | 0x0 | OUT Direction
33601  * ALT_USB_HOST_HCCHAR9_EPDIR_E_IN | 0x1 | IN Direction
33602  *
33603  * Field Access Macros:
33604  *
33605  */
33606 /*
33607  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPDIR
33608  *
33609  * OUT Direction
33610  */
33611 #define ALT_USB_HOST_HCCHAR9_EPDIR_E_OUT 0x0
33612 /*
33613  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPDIR
33614  *
33615  * IN Direction
33616  */
33617 #define ALT_USB_HOST_HCCHAR9_EPDIR_E_IN 0x1
33618 
33619 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR9_EPDIR register field. */
33620 #define ALT_USB_HOST_HCCHAR9_EPDIR_LSB 15
33621 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR9_EPDIR register field. */
33622 #define ALT_USB_HOST_HCCHAR9_EPDIR_MSB 15
33623 /* The width in bits of the ALT_USB_HOST_HCCHAR9_EPDIR register field. */
33624 #define ALT_USB_HOST_HCCHAR9_EPDIR_WIDTH 1
33625 /* The mask used to set the ALT_USB_HOST_HCCHAR9_EPDIR register field value. */
33626 #define ALT_USB_HOST_HCCHAR9_EPDIR_SET_MSK 0x00008000
33627 /* The mask used to clear the ALT_USB_HOST_HCCHAR9_EPDIR register field value. */
33628 #define ALT_USB_HOST_HCCHAR9_EPDIR_CLR_MSK 0xffff7fff
33629 /* The reset value of the ALT_USB_HOST_HCCHAR9_EPDIR register field. */
33630 #define ALT_USB_HOST_HCCHAR9_EPDIR_RESET 0x0
33631 /* Extracts the ALT_USB_HOST_HCCHAR9_EPDIR field value from a register. */
33632 #define ALT_USB_HOST_HCCHAR9_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
33633 /* Produces a ALT_USB_HOST_HCCHAR9_EPDIR register field value suitable for setting the register. */
33634 #define ALT_USB_HOST_HCCHAR9_EPDIR_SET(value) (((value) << 15) & 0x00008000)
33635 
33636 /*
33637  * Field : Low-Speed Device - lspddev
33638  *
33639  * This field is set by the application to indicate that this channel is
33640  * communicating to a low-speed device. The application must program this bit when
33641  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
33642  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
33643  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
33644  * core ignores this bit even if it is set by the application software
33645  *
33646  * Field Enumeration Values:
33647  *
33648  * Enum | Value | Description
33649  * :------------------------------------|:------|:----------------------------------------
33650  * ALT_USB_HOST_HCCHAR9_LSPDDEV_E_DISD | 0x0 | Not Communicating with low speed device
33651  * ALT_USB_HOST_HCCHAR9_LSPDDEV_E_END | 0x1 | Communicating with low speed device
33652  *
33653  * Field Access Macros:
33654  *
33655  */
33656 /*
33657  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_LSPDDEV
33658  *
33659  * Not Communicating with low speed device
33660  */
33661 #define ALT_USB_HOST_HCCHAR9_LSPDDEV_E_DISD 0x0
33662 /*
33663  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_LSPDDEV
33664  *
33665  * Communicating with low speed device
33666  */
33667 #define ALT_USB_HOST_HCCHAR9_LSPDDEV_E_END 0x1
33668 
33669 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR9_LSPDDEV register field. */
33670 #define ALT_USB_HOST_HCCHAR9_LSPDDEV_LSB 17
33671 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR9_LSPDDEV register field. */
33672 #define ALT_USB_HOST_HCCHAR9_LSPDDEV_MSB 17
33673 /* The width in bits of the ALT_USB_HOST_HCCHAR9_LSPDDEV register field. */
33674 #define ALT_USB_HOST_HCCHAR9_LSPDDEV_WIDTH 1
33675 /* The mask used to set the ALT_USB_HOST_HCCHAR9_LSPDDEV register field value. */
33676 #define ALT_USB_HOST_HCCHAR9_LSPDDEV_SET_MSK 0x00020000
33677 /* The mask used to clear the ALT_USB_HOST_HCCHAR9_LSPDDEV register field value. */
33678 #define ALT_USB_HOST_HCCHAR9_LSPDDEV_CLR_MSK 0xfffdffff
33679 /* The reset value of the ALT_USB_HOST_HCCHAR9_LSPDDEV register field. */
33680 #define ALT_USB_HOST_HCCHAR9_LSPDDEV_RESET 0x0
33681 /* Extracts the ALT_USB_HOST_HCCHAR9_LSPDDEV field value from a register. */
33682 #define ALT_USB_HOST_HCCHAR9_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
33683 /* Produces a ALT_USB_HOST_HCCHAR9_LSPDDEV register field value suitable for setting the register. */
33684 #define ALT_USB_HOST_HCCHAR9_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
33685 
33686 /*
33687  * Field : Endpoint Type - eptype
33688  *
33689  * Indicates the transfer type selected.
33690  *
33691  * Field Enumeration Values:
33692  *
33693  * Enum | Value | Description
33694  * :-------------------------------------|:------|:------------
33695  * ALT_USB_HOST_HCCHAR9_EPTYPE_E_CTL | 0x0 | Control
33696  * ALT_USB_HOST_HCCHAR9_EPTYPE_E_ISOC | 0x1 | Isochronous
33697  * ALT_USB_HOST_HCCHAR9_EPTYPE_E_BULK | 0x2 | Bulk
33698  * ALT_USB_HOST_HCCHAR9_EPTYPE_E_INTERR | 0x3 | Interrupt
33699  *
33700  * Field Access Macros:
33701  *
33702  */
33703 /*
33704  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPTYPE
33705  *
33706  * Control
33707  */
33708 #define ALT_USB_HOST_HCCHAR9_EPTYPE_E_CTL 0x0
33709 /*
33710  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPTYPE
33711  *
33712  * Isochronous
33713  */
33714 #define ALT_USB_HOST_HCCHAR9_EPTYPE_E_ISOC 0x1
33715 /*
33716  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPTYPE
33717  *
33718  * Bulk
33719  */
33720 #define ALT_USB_HOST_HCCHAR9_EPTYPE_E_BULK 0x2
33721 /*
33722  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EPTYPE
33723  *
33724  * Interrupt
33725  */
33726 #define ALT_USB_HOST_HCCHAR9_EPTYPE_E_INTERR 0x3
33727 
33728 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR9_EPTYPE register field. */
33729 #define ALT_USB_HOST_HCCHAR9_EPTYPE_LSB 18
33730 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR9_EPTYPE register field. */
33731 #define ALT_USB_HOST_HCCHAR9_EPTYPE_MSB 19
33732 /* The width in bits of the ALT_USB_HOST_HCCHAR9_EPTYPE register field. */
33733 #define ALT_USB_HOST_HCCHAR9_EPTYPE_WIDTH 2
33734 /* The mask used to set the ALT_USB_HOST_HCCHAR9_EPTYPE register field value. */
33735 #define ALT_USB_HOST_HCCHAR9_EPTYPE_SET_MSK 0x000c0000
33736 /* The mask used to clear the ALT_USB_HOST_HCCHAR9_EPTYPE register field value. */
33737 #define ALT_USB_HOST_HCCHAR9_EPTYPE_CLR_MSK 0xfff3ffff
33738 /* The reset value of the ALT_USB_HOST_HCCHAR9_EPTYPE register field. */
33739 #define ALT_USB_HOST_HCCHAR9_EPTYPE_RESET 0x0
33740 /* Extracts the ALT_USB_HOST_HCCHAR9_EPTYPE field value from a register. */
33741 #define ALT_USB_HOST_HCCHAR9_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
33742 /* Produces a ALT_USB_HOST_HCCHAR9_EPTYPE register field value suitable for setting the register. */
33743 #define ALT_USB_HOST_HCCHAR9_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
33744 
33745 /*
33746  * Field : Multi Count - ec
33747  *
33748  * When the Split Enable bit of the Host Channel-n Split Control register
33749  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
33750  * transactions that must be executed per microframe for this periodic endpoint.
33751  * for non periodic transfers, this field is used only in DMA mode, and specifies
33752  * the number packets to be fetched for this channel before the internal DMA engine
33753  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
33754  * number of immediate retries to be performed for a periodic split transactions on
33755  * transaction errors. This field must be set to at least 1.
33756  *
33757  * Field Enumeration Values:
33758  *
33759  * Enum | Value | Description
33760  * :-------------------------------------|:------|:----------------------------------------------
33761  * ALT_USB_HOST_HCCHAR9_EC_E_RSVD | 0x0 | Reserved This field yields undefined result
33762  * ALT_USB_HOST_HCCHAR9_EC_E_TRANSONE | 0x1 | 1 transaction
33763  * ALT_USB_HOST_HCCHAR9_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
33764  * : | | per microframe
33765  * ALT_USB_HOST_HCCHAR9_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
33766  * : | | per microframe
33767  *
33768  * Field Access Macros:
33769  *
33770  */
33771 /*
33772  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EC
33773  *
33774  * Reserved This field yields undefined result
33775  */
33776 #define ALT_USB_HOST_HCCHAR9_EC_E_RSVD 0x0
33777 /*
33778  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EC
33779  *
33780  * 1 transaction
33781  */
33782 #define ALT_USB_HOST_HCCHAR9_EC_E_TRANSONE 0x1
33783 /*
33784  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EC
33785  *
33786  * 2 transactions to be issued for this endpoint per microframe
33787  */
33788 #define ALT_USB_HOST_HCCHAR9_EC_E_TRANSTWO 0x2
33789 /*
33790  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_EC
33791  *
33792  * 3 transactions to be issued for this endpoint per microframe
33793  */
33794 #define ALT_USB_HOST_HCCHAR9_EC_E_TRANSTHREE 0x3
33795 
33796 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR9_EC register field. */
33797 #define ALT_USB_HOST_HCCHAR9_EC_LSB 20
33798 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR9_EC register field. */
33799 #define ALT_USB_HOST_HCCHAR9_EC_MSB 21
33800 /* The width in bits of the ALT_USB_HOST_HCCHAR9_EC register field. */
33801 #define ALT_USB_HOST_HCCHAR9_EC_WIDTH 2
33802 /* The mask used to set the ALT_USB_HOST_HCCHAR9_EC register field value. */
33803 #define ALT_USB_HOST_HCCHAR9_EC_SET_MSK 0x00300000
33804 /* The mask used to clear the ALT_USB_HOST_HCCHAR9_EC register field value. */
33805 #define ALT_USB_HOST_HCCHAR9_EC_CLR_MSK 0xffcfffff
33806 /* The reset value of the ALT_USB_HOST_HCCHAR9_EC register field. */
33807 #define ALT_USB_HOST_HCCHAR9_EC_RESET 0x0
33808 /* Extracts the ALT_USB_HOST_HCCHAR9_EC field value from a register. */
33809 #define ALT_USB_HOST_HCCHAR9_EC_GET(value) (((value) & 0x00300000) >> 20)
33810 /* Produces a ALT_USB_HOST_HCCHAR9_EC register field value suitable for setting the register. */
33811 #define ALT_USB_HOST_HCCHAR9_EC_SET(value) (((value) << 20) & 0x00300000)
33812 
33813 /*
33814  * Field : Device Address - devaddr
33815  *
33816  * This field selects the specific device serving as the data source or sink.
33817  *
33818  * Field Access Macros:
33819  *
33820  */
33821 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR9_DEVADDR register field. */
33822 #define ALT_USB_HOST_HCCHAR9_DEVADDR_LSB 22
33823 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR9_DEVADDR register field. */
33824 #define ALT_USB_HOST_HCCHAR9_DEVADDR_MSB 28
33825 /* The width in bits of the ALT_USB_HOST_HCCHAR9_DEVADDR register field. */
33826 #define ALT_USB_HOST_HCCHAR9_DEVADDR_WIDTH 7
33827 /* The mask used to set the ALT_USB_HOST_HCCHAR9_DEVADDR register field value. */
33828 #define ALT_USB_HOST_HCCHAR9_DEVADDR_SET_MSK 0x1fc00000
33829 /* The mask used to clear the ALT_USB_HOST_HCCHAR9_DEVADDR register field value. */
33830 #define ALT_USB_HOST_HCCHAR9_DEVADDR_CLR_MSK 0xe03fffff
33831 /* The reset value of the ALT_USB_HOST_HCCHAR9_DEVADDR register field. */
33832 #define ALT_USB_HOST_HCCHAR9_DEVADDR_RESET 0x0
33833 /* Extracts the ALT_USB_HOST_HCCHAR9_DEVADDR field value from a register. */
33834 #define ALT_USB_HOST_HCCHAR9_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
33835 /* Produces a ALT_USB_HOST_HCCHAR9_DEVADDR register field value suitable for setting the register. */
33836 #define ALT_USB_HOST_HCCHAR9_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
33837 
33838 /*
33839  * Field : Channel Disable - chdis
33840  *
33841  * The application sets this bit to stop transmitting/receiving data on a channel,
33842  * even before the transfer for that channel is complete. The application must wait
33843  * for the Channel Disabled interrupt before treating the channel as disabled.
33844  *
33845  * Field Enumeration Values:
33846  *
33847  * Enum | Value | Description
33848  * :-----------------------------------|:------|:----------------------------
33849  * ALT_USB_HOST_HCCHAR9_CHDIS_E_INACT | 0x0 | Transmit/Recieve normal
33850  * ALT_USB_HOST_HCCHAR9_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving
33851  *
33852  * Field Access Macros:
33853  *
33854  */
33855 /*
33856  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_CHDIS
33857  *
33858  * Transmit/Recieve normal
33859  */
33860 #define ALT_USB_HOST_HCCHAR9_CHDIS_E_INACT 0x0
33861 /*
33862  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_CHDIS
33863  *
33864  * Stop transmitting/receiving
33865  */
33866 #define ALT_USB_HOST_HCCHAR9_CHDIS_E_ACT 0x1
33867 
33868 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR9_CHDIS register field. */
33869 #define ALT_USB_HOST_HCCHAR9_CHDIS_LSB 30
33870 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR9_CHDIS register field. */
33871 #define ALT_USB_HOST_HCCHAR9_CHDIS_MSB 30
33872 /* The width in bits of the ALT_USB_HOST_HCCHAR9_CHDIS register field. */
33873 #define ALT_USB_HOST_HCCHAR9_CHDIS_WIDTH 1
33874 /* The mask used to set the ALT_USB_HOST_HCCHAR9_CHDIS register field value. */
33875 #define ALT_USB_HOST_HCCHAR9_CHDIS_SET_MSK 0x40000000
33876 /* The mask used to clear the ALT_USB_HOST_HCCHAR9_CHDIS register field value. */
33877 #define ALT_USB_HOST_HCCHAR9_CHDIS_CLR_MSK 0xbfffffff
33878 /* The reset value of the ALT_USB_HOST_HCCHAR9_CHDIS register field. */
33879 #define ALT_USB_HOST_HCCHAR9_CHDIS_RESET 0x0
33880 /* Extracts the ALT_USB_HOST_HCCHAR9_CHDIS field value from a register. */
33881 #define ALT_USB_HOST_HCCHAR9_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
33882 /* Produces a ALT_USB_HOST_HCCHAR9_CHDIS register field value suitable for setting the register. */
33883 #define ALT_USB_HOST_HCCHAR9_CHDIS_SET(value) (((value) << 30) & 0x40000000)
33884 
33885 /*
33886  * Field : Channel Enable - chena
33887  *
33888  * When Scatter/Gather mode is disabled This field is set by the application and
33889  * cleared by the OTG host.
33890  *
33891  * 0: Channel disabled
33892  *
33893  * 1: Channel enabled
33894  *
33895  * When Scatter/Gather mode is enabled.
33896  *
33897  * Field Enumeration Values:
33898  *
33899  * Enum | Value | Description
33900  * :-----------------------------------|:------|:-------------------------------------------------
33901  * ALT_USB_HOST_HCCHAR9_CHENA_E_INACT | 0x0 | Indicates that the descriptor structure is not
33902  * : | | yet ready
33903  * ALT_USB_HOST_HCCHAR9_CHENA_E_ACT | 0x1 | Indicates that the descriptor structure and
33904  * : | | data buffer with data is setup and this
33905  * : | | channel can access the descriptor
33906  *
33907  * Field Access Macros:
33908  *
33909  */
33910 /*
33911  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_CHENA
33912  *
33913  * Indicates that the descriptor structure is not yet ready
33914  */
33915 #define ALT_USB_HOST_HCCHAR9_CHENA_E_INACT 0x0
33916 /*
33917  * Enumerated value for register field ALT_USB_HOST_HCCHAR9_CHENA
33918  *
33919  * Indicates that the descriptor structure and data buffer with data is
33920  * setup and this channel can access the descriptor
33921  */
33922 #define ALT_USB_HOST_HCCHAR9_CHENA_E_ACT 0x1
33923 
33924 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR9_CHENA register field. */
33925 #define ALT_USB_HOST_HCCHAR9_CHENA_LSB 31
33926 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR9_CHENA register field. */
33927 #define ALT_USB_HOST_HCCHAR9_CHENA_MSB 31
33928 /* The width in bits of the ALT_USB_HOST_HCCHAR9_CHENA register field. */
33929 #define ALT_USB_HOST_HCCHAR9_CHENA_WIDTH 1
33930 /* The mask used to set the ALT_USB_HOST_HCCHAR9_CHENA register field value. */
33931 #define ALT_USB_HOST_HCCHAR9_CHENA_SET_MSK 0x80000000
33932 /* The mask used to clear the ALT_USB_HOST_HCCHAR9_CHENA register field value. */
33933 #define ALT_USB_HOST_HCCHAR9_CHENA_CLR_MSK 0x7fffffff
33934 /* The reset value of the ALT_USB_HOST_HCCHAR9_CHENA register field. */
33935 #define ALT_USB_HOST_HCCHAR9_CHENA_RESET 0x0
33936 /* Extracts the ALT_USB_HOST_HCCHAR9_CHENA field value from a register. */
33937 #define ALT_USB_HOST_HCCHAR9_CHENA_GET(value) (((value) & 0x80000000) >> 31)
33938 /* Produces a ALT_USB_HOST_HCCHAR9_CHENA register field value suitable for setting the register. */
33939 #define ALT_USB_HOST_HCCHAR9_CHENA_SET(value) (((value) << 31) & 0x80000000)
33940 
33941 #ifndef __ASSEMBLY__
33942 /*
33943  * WARNING: The C register and register group struct declarations are provided for
33944  * convenience and illustrative purposes. They should, however, be used with
33945  * caution as the C language standard provides no guarantees about the alignment or
33946  * atomicity of device memory accesses. The recommended practice for writing
33947  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
33948  * alt_write_word() functions.
33949  *
33950  * The struct declaration for register ALT_USB_HOST_HCCHAR9.
33951  */
33952 struct ALT_USB_HOST_HCCHAR9_s
33953 {
33954  uint32_t mps : 11; /* Maximum Packet Size */
33955  uint32_t epnum : 4; /* Endpoint Number */
33956  uint32_t epdir : 1; /* Endpoint Direction */
33957  uint32_t : 1; /* *UNDEFINED* */
33958  uint32_t lspddev : 1; /* Low-Speed Device */
33959  uint32_t eptype : 2; /* Endpoint Type */
33960  uint32_t ec : 2; /* Multi Count */
33961  uint32_t devaddr : 7; /* Device Address */
33962  uint32_t : 1; /* *UNDEFINED* */
33963  const uint32_t chdis : 1; /* Channel Disable */
33964  const uint32_t chena : 1; /* Channel Enable */
33965 };
33966 
33967 /* The typedef declaration for register ALT_USB_HOST_HCCHAR9. */
33968 typedef volatile struct ALT_USB_HOST_HCCHAR9_s ALT_USB_HOST_HCCHAR9_t;
33969 #endif /* __ASSEMBLY__ */
33970 
33971 /* The byte offset of the ALT_USB_HOST_HCCHAR9 register from the beginning of the component. */
33972 #define ALT_USB_HOST_HCCHAR9_OFST 0x220
33973 /* The address of the ALT_USB_HOST_HCCHAR9 register. */
33974 #define ALT_USB_HOST_HCCHAR9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR9_OFST))
33975 
33976 /*
33977  * Register : Host Channel 9 Split Control Register - hcsplt9
33978  *
33979  * Channel_number 9
33980  *
33981  * Register Layout
33982  *
33983  * Bits | Access | Reset | Description
33984  * :--------|:-------|:------|:---------------------
33985  * [6:0] | RW | 0x0 | Port Address
33986  * [13:7] | RW | 0x0 | Hub Address
33987  * [15:14] | RW | 0x0 | Transaction Position
33988  * [16] | RW | 0x0 | Do Complete Split
33989  * [30:17] | ??? | 0x0 | *UNDEFINED*
33990  * [31] | RW | 0x0 | Split Enable
33991  *
33992  */
33993 /*
33994  * Field : Port Address - prtaddr
33995  *
33996  * This field is the port number of the recipient transactiontranslator.
33997  *
33998  * Field Access Macros:
33999  *
34000  */
34001 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT9_PRTADDR register field. */
34002 #define ALT_USB_HOST_HCSPLT9_PRTADDR_LSB 0
34003 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT9_PRTADDR register field. */
34004 #define ALT_USB_HOST_HCSPLT9_PRTADDR_MSB 6
34005 /* The width in bits of the ALT_USB_HOST_HCSPLT9_PRTADDR register field. */
34006 #define ALT_USB_HOST_HCSPLT9_PRTADDR_WIDTH 7
34007 /* The mask used to set the ALT_USB_HOST_HCSPLT9_PRTADDR register field value. */
34008 #define ALT_USB_HOST_HCSPLT9_PRTADDR_SET_MSK 0x0000007f
34009 /* The mask used to clear the ALT_USB_HOST_HCSPLT9_PRTADDR register field value. */
34010 #define ALT_USB_HOST_HCSPLT9_PRTADDR_CLR_MSK 0xffffff80
34011 /* The reset value of the ALT_USB_HOST_HCSPLT9_PRTADDR register field. */
34012 #define ALT_USB_HOST_HCSPLT9_PRTADDR_RESET 0x0
34013 /* Extracts the ALT_USB_HOST_HCSPLT9_PRTADDR field value from a register. */
34014 #define ALT_USB_HOST_HCSPLT9_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
34015 /* Produces a ALT_USB_HOST_HCSPLT9_PRTADDR register field value suitable for setting the register. */
34016 #define ALT_USB_HOST_HCSPLT9_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
34017 
34018 /*
34019  * Field : Hub Address - hubaddr
34020  *
34021  * This field holds the device address of the transaction translator's hub.
34022  *
34023  * Field Access Macros:
34024  *
34025  */
34026 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT9_HUBADDR register field. */
34027 #define ALT_USB_HOST_HCSPLT9_HUBADDR_LSB 7
34028 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT9_HUBADDR register field. */
34029 #define ALT_USB_HOST_HCSPLT9_HUBADDR_MSB 13
34030 /* The width in bits of the ALT_USB_HOST_HCSPLT9_HUBADDR register field. */
34031 #define ALT_USB_HOST_HCSPLT9_HUBADDR_WIDTH 7
34032 /* The mask used to set the ALT_USB_HOST_HCSPLT9_HUBADDR register field value. */
34033 #define ALT_USB_HOST_HCSPLT9_HUBADDR_SET_MSK 0x00003f80
34034 /* The mask used to clear the ALT_USB_HOST_HCSPLT9_HUBADDR register field value. */
34035 #define ALT_USB_HOST_HCSPLT9_HUBADDR_CLR_MSK 0xffffc07f
34036 /* The reset value of the ALT_USB_HOST_HCSPLT9_HUBADDR register field. */
34037 #define ALT_USB_HOST_HCSPLT9_HUBADDR_RESET 0x0
34038 /* Extracts the ALT_USB_HOST_HCSPLT9_HUBADDR field value from a register. */
34039 #define ALT_USB_HOST_HCSPLT9_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
34040 /* Produces a ALT_USB_HOST_HCSPLT9_HUBADDR register field value suitable for setting the register. */
34041 #define ALT_USB_HOST_HCSPLT9_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
34042 
34043 /*
34044  * Field : Transaction Position - xactpos
34045  *
34046  * This field is used to determine whether to send all, first, middle, or last
34047  * payloads with each OUT transaction.
34048  *
34049  * Field Enumeration Values:
34050  *
34051  * Enum | Value | Description
34052  * :--------------------------------------|:------|:------------------------------------------------
34053  * ALT_USB_HOST_HCSPLT9_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
34054  * : | | transaction (which is larger than 188 bytes)
34055  * ALT_USB_HOST_HCSPLT9_XACTPOS_E_END | 0x1 | End. This is the last payload of this
34056  * : | | transaction (which is larger than 188 bytes)
34057  * ALT_USB_HOST_HCSPLT9_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
34058  * : | | transaction (which is larger than 188 bytes)
34059  * ALT_USB_HOST_HCSPLT9_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
34060  * : | | transaction (which is less than or equal to 188
34061  * : | | bytes)
34062  *
34063  * Field Access Macros:
34064  *
34065  */
34066 /*
34067  * Enumerated value for register field ALT_USB_HOST_HCSPLT9_XACTPOS
34068  *
34069  * Mid. This is the middle payload of this transaction (which is larger than 188
34070  * bytes)
34071  */
34072 #define ALT_USB_HOST_HCSPLT9_XACTPOS_E_MIDDLE 0x0
34073 /*
34074  * Enumerated value for register field ALT_USB_HOST_HCSPLT9_XACTPOS
34075  *
34076  * End. This is the last payload of this transaction (which is larger than 188
34077  * bytes)
34078  */
34079 #define ALT_USB_HOST_HCSPLT9_XACTPOS_E_END 0x1
34080 /*
34081  * Enumerated value for register field ALT_USB_HOST_HCSPLT9_XACTPOS
34082  *
34083  * Begin. This is the first data payload of this transaction (which is larger than
34084  * 188 bytes)
34085  */
34086 #define ALT_USB_HOST_HCSPLT9_XACTPOS_E_BEGIN 0x2
34087 /*
34088  * Enumerated value for register field ALT_USB_HOST_HCSPLT9_XACTPOS
34089  *
34090  * All. This is the entire data payload is of this transaction (which is less than
34091  * or equal to 188 bytes)
34092  */
34093 #define ALT_USB_HOST_HCSPLT9_XACTPOS_E_ALL 0x3
34094 
34095 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT9_XACTPOS register field. */
34096 #define ALT_USB_HOST_HCSPLT9_XACTPOS_LSB 14
34097 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT9_XACTPOS register field. */
34098 #define ALT_USB_HOST_HCSPLT9_XACTPOS_MSB 15
34099 /* The width in bits of the ALT_USB_HOST_HCSPLT9_XACTPOS register field. */
34100 #define ALT_USB_HOST_HCSPLT9_XACTPOS_WIDTH 2
34101 /* The mask used to set the ALT_USB_HOST_HCSPLT9_XACTPOS register field value. */
34102 #define ALT_USB_HOST_HCSPLT9_XACTPOS_SET_MSK 0x0000c000
34103 /* The mask used to clear the ALT_USB_HOST_HCSPLT9_XACTPOS register field value. */
34104 #define ALT_USB_HOST_HCSPLT9_XACTPOS_CLR_MSK 0xffff3fff
34105 /* The reset value of the ALT_USB_HOST_HCSPLT9_XACTPOS register field. */
34106 #define ALT_USB_HOST_HCSPLT9_XACTPOS_RESET 0x0
34107 /* Extracts the ALT_USB_HOST_HCSPLT9_XACTPOS field value from a register. */
34108 #define ALT_USB_HOST_HCSPLT9_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
34109 /* Produces a ALT_USB_HOST_HCSPLT9_XACTPOS register field value suitable for setting the register. */
34110 #define ALT_USB_HOST_HCSPLT9_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
34111 
34112 /*
34113  * Field : Do Complete Split - compsplt
34114  *
34115  * The application sets this field to request the OTG host to perform a complete
34116  * split transaction.
34117  *
34118  * Field Enumeration Values:
34119  *
34120  * Enum | Value | Description
34121  * :----------------------------------------|:------|:---------------------
34122  * ALT_USB_HOST_HCSPLT9_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
34123  * ALT_USB_HOST_HCSPLT9_COMPSPLT_E_SPLIT | 0x1 | Split transaction
34124  *
34125  * Field Access Macros:
34126  *
34127  */
34128 /*
34129  * Enumerated value for register field ALT_USB_HOST_HCSPLT9_COMPSPLT
34130  *
34131  * No split transaction
34132  */
34133 #define ALT_USB_HOST_HCSPLT9_COMPSPLT_E_NOSPLIT 0x0
34134 /*
34135  * Enumerated value for register field ALT_USB_HOST_HCSPLT9_COMPSPLT
34136  *
34137  * Split transaction
34138  */
34139 #define ALT_USB_HOST_HCSPLT9_COMPSPLT_E_SPLIT 0x1
34140 
34141 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT9_COMPSPLT register field. */
34142 #define ALT_USB_HOST_HCSPLT9_COMPSPLT_LSB 16
34143 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT9_COMPSPLT register field. */
34144 #define ALT_USB_HOST_HCSPLT9_COMPSPLT_MSB 16
34145 /* The width in bits of the ALT_USB_HOST_HCSPLT9_COMPSPLT register field. */
34146 #define ALT_USB_HOST_HCSPLT9_COMPSPLT_WIDTH 1
34147 /* The mask used to set the ALT_USB_HOST_HCSPLT9_COMPSPLT register field value. */
34148 #define ALT_USB_HOST_HCSPLT9_COMPSPLT_SET_MSK 0x00010000
34149 /* The mask used to clear the ALT_USB_HOST_HCSPLT9_COMPSPLT register field value. */
34150 #define ALT_USB_HOST_HCSPLT9_COMPSPLT_CLR_MSK 0xfffeffff
34151 /* The reset value of the ALT_USB_HOST_HCSPLT9_COMPSPLT register field. */
34152 #define ALT_USB_HOST_HCSPLT9_COMPSPLT_RESET 0x0
34153 /* Extracts the ALT_USB_HOST_HCSPLT9_COMPSPLT field value from a register. */
34154 #define ALT_USB_HOST_HCSPLT9_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
34155 /* Produces a ALT_USB_HOST_HCSPLT9_COMPSPLT register field value suitable for setting the register. */
34156 #define ALT_USB_HOST_HCSPLT9_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
34157 
34158 /*
34159  * Field : Split Enable - spltena
34160  *
34161  * The application sets this field to indicate that this channel is enabled to
34162  * perform split transactions.
34163  *
34164  * Field Enumeration Values:
34165  *
34166  * Enum | Value | Description
34167  * :------------------------------------|:------|:------------------
34168  * ALT_USB_HOST_HCSPLT9_SPLTENA_E_DISD | 0x0 | Split not enabled
34169  * ALT_USB_HOST_HCSPLT9_SPLTENA_E_END | 0x1 | Split enabled
34170  *
34171  * Field Access Macros:
34172  *
34173  */
34174 /*
34175  * Enumerated value for register field ALT_USB_HOST_HCSPLT9_SPLTENA
34176  *
34177  * Split not enabled
34178  */
34179 #define ALT_USB_HOST_HCSPLT9_SPLTENA_E_DISD 0x0
34180 /*
34181  * Enumerated value for register field ALT_USB_HOST_HCSPLT9_SPLTENA
34182  *
34183  * Split enabled
34184  */
34185 #define ALT_USB_HOST_HCSPLT9_SPLTENA_E_END 0x1
34186 
34187 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT9_SPLTENA register field. */
34188 #define ALT_USB_HOST_HCSPLT9_SPLTENA_LSB 31
34189 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT9_SPLTENA register field. */
34190 #define ALT_USB_HOST_HCSPLT9_SPLTENA_MSB 31
34191 /* The width in bits of the ALT_USB_HOST_HCSPLT9_SPLTENA register field. */
34192 #define ALT_USB_HOST_HCSPLT9_SPLTENA_WIDTH 1
34193 /* The mask used to set the ALT_USB_HOST_HCSPLT9_SPLTENA register field value. */
34194 #define ALT_USB_HOST_HCSPLT9_SPLTENA_SET_MSK 0x80000000
34195 /* The mask used to clear the ALT_USB_HOST_HCSPLT9_SPLTENA register field value. */
34196 #define ALT_USB_HOST_HCSPLT9_SPLTENA_CLR_MSK 0x7fffffff
34197 /* The reset value of the ALT_USB_HOST_HCSPLT9_SPLTENA register field. */
34198 #define ALT_USB_HOST_HCSPLT9_SPLTENA_RESET 0x0
34199 /* Extracts the ALT_USB_HOST_HCSPLT9_SPLTENA field value from a register. */
34200 #define ALT_USB_HOST_HCSPLT9_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
34201 /* Produces a ALT_USB_HOST_HCSPLT9_SPLTENA register field value suitable for setting the register. */
34202 #define ALT_USB_HOST_HCSPLT9_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
34203 
34204 #ifndef __ASSEMBLY__
34205 /*
34206  * WARNING: The C register and register group struct declarations are provided for
34207  * convenience and illustrative purposes. They should, however, be used with
34208  * caution as the C language standard provides no guarantees about the alignment or
34209  * atomicity of device memory accesses. The recommended practice for writing
34210  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
34211  * alt_write_word() functions.
34212  *
34213  * The struct declaration for register ALT_USB_HOST_HCSPLT9.
34214  */
34215 struct ALT_USB_HOST_HCSPLT9_s
34216 {
34217  uint32_t prtaddr : 7; /* Port Address */
34218  uint32_t hubaddr : 7; /* Hub Address */
34219  uint32_t xactpos : 2; /* Transaction Position */
34220  uint32_t compsplt : 1; /* Do Complete Split */
34221  uint32_t : 14; /* *UNDEFINED* */
34222  uint32_t spltena : 1; /* Split Enable */
34223 };
34224 
34225 /* The typedef declaration for register ALT_USB_HOST_HCSPLT9. */
34226 typedef volatile struct ALT_USB_HOST_HCSPLT9_s ALT_USB_HOST_HCSPLT9_t;
34227 #endif /* __ASSEMBLY__ */
34228 
34229 /* The byte offset of the ALT_USB_HOST_HCSPLT9 register from the beginning of the component. */
34230 #define ALT_USB_HOST_HCSPLT9_OFST 0x224
34231 /* The address of the ALT_USB_HOST_HCSPLT9 register. */
34232 #define ALT_USB_HOST_HCSPLT9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT9_OFST))
34233 
34234 /*
34235  * Register : Host Channel 9 Interrupt Register - hcint9
34236  *
34237  * This register indicates the status of a channel with respect to USB- and AHB-
34238  * related events. The application must read this register when the Host Channels
34239  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
34240  * application can read this register, it must first read the Host All Channels
34241  * Interrupt (HAINT) register to get the exact channel number for the Host
34242  * Channel-n Interrupt register. The application must clear the appropriate bit in
34243  * this register to clear the corresponding bits in the HAINT and GINTSTS
34244  * registers.
34245  *
34246  * Register Layout
34247  *
34248  * Bits | Access | Reset | Description
34249  * :--------|:-------|:------|:--------------------------------------------
34250  * [0] | R | 0x0 | Transfer Completed
34251  * [1] | R | 0x0 | Channel Halted
34252  * [2] | R | 0x0 | AHB Error
34253  * [3] | R | 0x0 | STALL Response Received Interrupt
34254  * [4] | R | 0x0 | NAK Response Received Interrupt
34255  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
34256  * [6] | R | 0x0 | NYET Response Received Interrupt
34257  * [7] | R | 0x0 | Transaction Error
34258  * [8] | R | 0x0 | Babble Error
34259  * [9] | R | 0x0 | Frame Overrun
34260  * [10] | R | 0x0 | Data Toggle Error
34261  * [11] | R | 0x0 | BNA Interrupt
34262  * [12] | R | 0x0 | Excessive Transaction Error
34263  * [13] | R | 0x0 | Descriptor rollover interrupt
34264  * [31:14] | ??? | 0x0 | *UNDEFINED*
34265  *
34266  */
34267 /*
34268  * Field : Transfer Completed - xfercompl
34269  *
34270  * Transfer completed normally without any errors. This bit can be set only by the
34271  * core and the application should write 1 to clear it.
34272  *
34273  * Field Enumeration Values:
34274  *
34275  * Enum | Value | Description
34276  * :--------------------------------------|:------|:-----------------------------------------------
34277  * ALT_USB_HOST_HCINT9_XFERCOMPL_E_INACT | 0x0 | No transfer
34278  * ALT_USB_HOST_HCINT9_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
34279  *
34280  * Field Access Macros:
34281  *
34282  */
34283 /*
34284  * Enumerated value for register field ALT_USB_HOST_HCINT9_XFERCOMPL
34285  *
34286  * No transfer
34287  */
34288 #define ALT_USB_HOST_HCINT9_XFERCOMPL_E_INACT 0x0
34289 /*
34290  * Enumerated value for register field ALT_USB_HOST_HCINT9_XFERCOMPL
34291  *
34292  * Transfer completed normally without any errors
34293  */
34294 #define ALT_USB_HOST_HCINT9_XFERCOMPL_E_ACT 0x1
34295 
34296 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_XFERCOMPL register field. */
34297 #define ALT_USB_HOST_HCINT9_XFERCOMPL_LSB 0
34298 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_XFERCOMPL register field. */
34299 #define ALT_USB_HOST_HCINT9_XFERCOMPL_MSB 0
34300 /* The width in bits of the ALT_USB_HOST_HCINT9_XFERCOMPL register field. */
34301 #define ALT_USB_HOST_HCINT9_XFERCOMPL_WIDTH 1
34302 /* The mask used to set the ALT_USB_HOST_HCINT9_XFERCOMPL register field value. */
34303 #define ALT_USB_HOST_HCINT9_XFERCOMPL_SET_MSK 0x00000001
34304 /* The mask used to clear the ALT_USB_HOST_HCINT9_XFERCOMPL register field value. */
34305 #define ALT_USB_HOST_HCINT9_XFERCOMPL_CLR_MSK 0xfffffffe
34306 /* The reset value of the ALT_USB_HOST_HCINT9_XFERCOMPL register field. */
34307 #define ALT_USB_HOST_HCINT9_XFERCOMPL_RESET 0x0
34308 /* Extracts the ALT_USB_HOST_HCINT9_XFERCOMPL field value from a register. */
34309 #define ALT_USB_HOST_HCINT9_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
34310 /* Produces a ALT_USB_HOST_HCINT9_XFERCOMPL register field value suitable for setting the register. */
34311 #define ALT_USB_HOST_HCINT9_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
34312 
34313 /*
34314  * Field : Channel Halted - chhltd
34315  *
34316  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
34317  * either because of any USB transaction error or in response to disable request by
34318  * the application or because of a completed transfer. In Scatter/gather DMA mode,
34319  * this indicates that transfer completed due to any of the following
34320  *
34321  * . EOL being set in descriptor
34322  *
34323  * . AHB error
34324  *
34325  * . Excessive transaction errors
34326  *
34327  * . Babble
34328  *
34329  * . Stall
34330  *
34331  * Field Enumeration Values:
34332  *
34333  * Enum | Value | Description
34334  * :-----------------------------------|:------|:-------------------
34335  * ALT_USB_HOST_HCINT9_CHHLTD_E_INACT | 0x0 | Channel not halted
34336  * ALT_USB_HOST_HCINT9_CHHLTD_E_ACT | 0x1 | Channel Halted
34337  *
34338  * Field Access Macros:
34339  *
34340  */
34341 /*
34342  * Enumerated value for register field ALT_USB_HOST_HCINT9_CHHLTD
34343  *
34344  * Channel not halted
34345  */
34346 #define ALT_USB_HOST_HCINT9_CHHLTD_E_INACT 0x0
34347 /*
34348  * Enumerated value for register field ALT_USB_HOST_HCINT9_CHHLTD
34349  *
34350  * Channel Halted
34351  */
34352 #define ALT_USB_HOST_HCINT9_CHHLTD_E_ACT 0x1
34353 
34354 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_CHHLTD register field. */
34355 #define ALT_USB_HOST_HCINT9_CHHLTD_LSB 1
34356 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_CHHLTD register field. */
34357 #define ALT_USB_HOST_HCINT9_CHHLTD_MSB 1
34358 /* The width in bits of the ALT_USB_HOST_HCINT9_CHHLTD register field. */
34359 #define ALT_USB_HOST_HCINT9_CHHLTD_WIDTH 1
34360 /* The mask used to set the ALT_USB_HOST_HCINT9_CHHLTD register field value. */
34361 #define ALT_USB_HOST_HCINT9_CHHLTD_SET_MSK 0x00000002
34362 /* The mask used to clear the ALT_USB_HOST_HCINT9_CHHLTD register field value. */
34363 #define ALT_USB_HOST_HCINT9_CHHLTD_CLR_MSK 0xfffffffd
34364 /* The reset value of the ALT_USB_HOST_HCINT9_CHHLTD register field. */
34365 #define ALT_USB_HOST_HCINT9_CHHLTD_RESET 0x0
34366 /* Extracts the ALT_USB_HOST_HCINT9_CHHLTD field value from a register. */
34367 #define ALT_USB_HOST_HCINT9_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
34368 /* Produces a ALT_USB_HOST_HCINT9_CHHLTD register field value suitable for setting the register. */
34369 #define ALT_USB_HOST_HCINT9_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
34370 
34371 /*
34372  * Field : AHB Error - ahberr
34373  *
34374  * This is generated only in Internal DMA mode when there is an AHB error during
34375  * AHB read/write. The application can read the corresponding channel's DMA address
34376  * register to get the error address.
34377  *
34378  * Field Enumeration Values:
34379  *
34380  * Enum | Value | Description
34381  * :-----------------------------------|:------|:--------------------------------
34382  * ALT_USB_HOST_HCINT9_AHBERR_E_INACT | 0x0 | No AHB error
34383  * ALT_USB_HOST_HCINT9_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
34384  *
34385  * Field Access Macros:
34386  *
34387  */
34388 /*
34389  * Enumerated value for register field ALT_USB_HOST_HCINT9_AHBERR
34390  *
34391  * No AHB error
34392  */
34393 #define ALT_USB_HOST_HCINT9_AHBERR_E_INACT 0x0
34394 /*
34395  * Enumerated value for register field ALT_USB_HOST_HCINT9_AHBERR
34396  *
34397  * AHB error during AHB read/write
34398  */
34399 #define ALT_USB_HOST_HCINT9_AHBERR_E_ACT 0x1
34400 
34401 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_AHBERR register field. */
34402 #define ALT_USB_HOST_HCINT9_AHBERR_LSB 2
34403 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_AHBERR register field. */
34404 #define ALT_USB_HOST_HCINT9_AHBERR_MSB 2
34405 /* The width in bits of the ALT_USB_HOST_HCINT9_AHBERR register field. */
34406 #define ALT_USB_HOST_HCINT9_AHBERR_WIDTH 1
34407 /* The mask used to set the ALT_USB_HOST_HCINT9_AHBERR register field value. */
34408 #define ALT_USB_HOST_HCINT9_AHBERR_SET_MSK 0x00000004
34409 /* The mask used to clear the ALT_USB_HOST_HCINT9_AHBERR register field value. */
34410 #define ALT_USB_HOST_HCINT9_AHBERR_CLR_MSK 0xfffffffb
34411 /* The reset value of the ALT_USB_HOST_HCINT9_AHBERR register field. */
34412 #define ALT_USB_HOST_HCINT9_AHBERR_RESET 0x0
34413 /* Extracts the ALT_USB_HOST_HCINT9_AHBERR field value from a register. */
34414 #define ALT_USB_HOST_HCINT9_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
34415 /* Produces a ALT_USB_HOST_HCINT9_AHBERR register field value suitable for setting the register. */
34416 #define ALT_USB_HOST_HCINT9_AHBERR_SET(value) (((value) << 2) & 0x00000004)
34417 
34418 /*
34419  * Field : STALL Response Received Interrupt - stall
34420  *
34421  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
34422  * This bit can be set only by the core and the application should write 1 to clear
34423  * it.
34424  *
34425  * Field Enumeration Values:
34426  *
34427  * Enum | Value | Description
34428  * :----------------------------------|:------|:-------------------
34429  * ALT_USB_HOST_HCINT9_STALL_E_INACT | 0x0 | No Stall Interrupt
34430  * ALT_USB_HOST_HCINT9_STALL_E_ACT | 0x1 | Stall Interrupt
34431  *
34432  * Field Access Macros:
34433  *
34434  */
34435 /*
34436  * Enumerated value for register field ALT_USB_HOST_HCINT9_STALL
34437  *
34438  * No Stall Interrupt
34439  */
34440 #define ALT_USB_HOST_HCINT9_STALL_E_INACT 0x0
34441 /*
34442  * Enumerated value for register field ALT_USB_HOST_HCINT9_STALL
34443  *
34444  * Stall Interrupt
34445  */
34446 #define ALT_USB_HOST_HCINT9_STALL_E_ACT 0x1
34447 
34448 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_STALL register field. */
34449 #define ALT_USB_HOST_HCINT9_STALL_LSB 3
34450 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_STALL register field. */
34451 #define ALT_USB_HOST_HCINT9_STALL_MSB 3
34452 /* The width in bits of the ALT_USB_HOST_HCINT9_STALL register field. */
34453 #define ALT_USB_HOST_HCINT9_STALL_WIDTH 1
34454 /* The mask used to set the ALT_USB_HOST_HCINT9_STALL register field value. */
34455 #define ALT_USB_HOST_HCINT9_STALL_SET_MSK 0x00000008
34456 /* The mask used to clear the ALT_USB_HOST_HCINT9_STALL register field value. */
34457 #define ALT_USB_HOST_HCINT9_STALL_CLR_MSK 0xfffffff7
34458 /* The reset value of the ALT_USB_HOST_HCINT9_STALL register field. */
34459 #define ALT_USB_HOST_HCINT9_STALL_RESET 0x0
34460 /* Extracts the ALT_USB_HOST_HCINT9_STALL field value from a register. */
34461 #define ALT_USB_HOST_HCINT9_STALL_GET(value) (((value) & 0x00000008) >> 3)
34462 /* Produces a ALT_USB_HOST_HCINT9_STALL register field value suitable for setting the register. */
34463 #define ALT_USB_HOST_HCINT9_STALL_SET(value) (((value) << 3) & 0x00000008)
34464 
34465 /*
34466  * Field : NAK Response Received Interrupt - nak
34467  *
34468  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
34469  * core.This bit can be set only by the core and the application should write 1 to
34470  * clear it.
34471  *
34472  * Field Enumeration Values:
34473  *
34474  * Enum | Value | Description
34475  * :--------------------------------|:------|:-----------------------------------
34476  * ALT_USB_HOST_HCINT9_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
34477  * ALT_USB_HOST_HCINT9_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
34478  *
34479  * Field Access Macros:
34480  *
34481  */
34482 /*
34483  * Enumerated value for register field ALT_USB_HOST_HCINT9_NAK
34484  *
34485  * No NAK Response Received Interrupt
34486  */
34487 #define ALT_USB_HOST_HCINT9_NAK_E_INACT 0x0
34488 /*
34489  * Enumerated value for register field ALT_USB_HOST_HCINT9_NAK
34490  *
34491  * NAK Response Received Interrupt
34492  */
34493 #define ALT_USB_HOST_HCINT9_NAK_E_ACT 0x1
34494 
34495 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_NAK register field. */
34496 #define ALT_USB_HOST_HCINT9_NAK_LSB 4
34497 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_NAK register field. */
34498 #define ALT_USB_HOST_HCINT9_NAK_MSB 4
34499 /* The width in bits of the ALT_USB_HOST_HCINT9_NAK register field. */
34500 #define ALT_USB_HOST_HCINT9_NAK_WIDTH 1
34501 /* The mask used to set the ALT_USB_HOST_HCINT9_NAK register field value. */
34502 #define ALT_USB_HOST_HCINT9_NAK_SET_MSK 0x00000010
34503 /* The mask used to clear the ALT_USB_HOST_HCINT9_NAK register field value. */
34504 #define ALT_USB_HOST_HCINT9_NAK_CLR_MSK 0xffffffef
34505 /* The reset value of the ALT_USB_HOST_HCINT9_NAK register field. */
34506 #define ALT_USB_HOST_HCINT9_NAK_RESET 0x0
34507 /* Extracts the ALT_USB_HOST_HCINT9_NAK field value from a register. */
34508 #define ALT_USB_HOST_HCINT9_NAK_GET(value) (((value) & 0x00000010) >> 4)
34509 /* Produces a ALT_USB_HOST_HCINT9_NAK register field value suitable for setting the register. */
34510 #define ALT_USB_HOST_HCINT9_NAK_SET(value) (((value) << 4) & 0x00000010)
34511 
34512 /*
34513  * Field : ACK Response Received Transmitted Interrupt - ack
34514  *
34515  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
34516  * This bit can be set only by the core and the application should write 1 to clear
34517  * it.
34518  *
34519  * Field Enumeration Values:
34520  *
34521  * Enum | Value | Description
34522  * :--------------------------------|:------|:-----------------------------------------------
34523  * ALT_USB_HOST_HCINT9_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
34524  * ALT_USB_HOST_HCINT9_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
34525  *
34526  * Field Access Macros:
34527  *
34528  */
34529 /*
34530  * Enumerated value for register field ALT_USB_HOST_HCINT9_ACK
34531  *
34532  * No ACK Response Received Transmitted Interrupt
34533  */
34534 #define ALT_USB_HOST_HCINT9_ACK_E_INACT 0x0
34535 /*
34536  * Enumerated value for register field ALT_USB_HOST_HCINT9_ACK
34537  *
34538  * ACK Response Received Transmitted Interrup
34539  */
34540 #define ALT_USB_HOST_HCINT9_ACK_E_ACT 0x1
34541 
34542 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_ACK register field. */
34543 #define ALT_USB_HOST_HCINT9_ACK_LSB 5
34544 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_ACK register field. */
34545 #define ALT_USB_HOST_HCINT9_ACK_MSB 5
34546 /* The width in bits of the ALT_USB_HOST_HCINT9_ACK register field. */
34547 #define ALT_USB_HOST_HCINT9_ACK_WIDTH 1
34548 /* The mask used to set the ALT_USB_HOST_HCINT9_ACK register field value. */
34549 #define ALT_USB_HOST_HCINT9_ACK_SET_MSK 0x00000020
34550 /* The mask used to clear the ALT_USB_HOST_HCINT9_ACK register field value. */
34551 #define ALT_USB_HOST_HCINT9_ACK_CLR_MSK 0xffffffdf
34552 /* The reset value of the ALT_USB_HOST_HCINT9_ACK register field. */
34553 #define ALT_USB_HOST_HCINT9_ACK_RESET 0x0
34554 /* Extracts the ALT_USB_HOST_HCINT9_ACK field value from a register. */
34555 #define ALT_USB_HOST_HCINT9_ACK_GET(value) (((value) & 0x00000020) >> 5)
34556 /* Produces a ALT_USB_HOST_HCINT9_ACK register field value suitable for setting the register. */
34557 #define ALT_USB_HOST_HCINT9_ACK_SET(value) (((value) << 5) & 0x00000020)
34558 
34559 /*
34560  * Field : NYET Response Received Interrupt - nyet
34561  *
34562  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
34563  * core.This bit can be set only by the core and the application should write 1 to
34564  * clear it.
34565  *
34566  * Field Enumeration Values:
34567  *
34568  * Enum | Value | Description
34569  * :---------------------------------|:------|:------------------------------------
34570  * ALT_USB_HOST_HCINT9_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
34571  * ALT_USB_HOST_HCINT9_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
34572  *
34573  * Field Access Macros:
34574  *
34575  */
34576 /*
34577  * Enumerated value for register field ALT_USB_HOST_HCINT9_NYET
34578  *
34579  * No NYET Response Received Interrupt
34580  */
34581 #define ALT_USB_HOST_HCINT9_NYET_E_INACT 0x0
34582 /*
34583  * Enumerated value for register field ALT_USB_HOST_HCINT9_NYET
34584  *
34585  * NYET Response Received Interrupt
34586  */
34587 #define ALT_USB_HOST_HCINT9_NYET_E_ACT 0x1
34588 
34589 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_NYET register field. */
34590 #define ALT_USB_HOST_HCINT9_NYET_LSB 6
34591 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_NYET register field. */
34592 #define ALT_USB_HOST_HCINT9_NYET_MSB 6
34593 /* The width in bits of the ALT_USB_HOST_HCINT9_NYET register field. */
34594 #define ALT_USB_HOST_HCINT9_NYET_WIDTH 1
34595 /* The mask used to set the ALT_USB_HOST_HCINT9_NYET register field value. */
34596 #define ALT_USB_HOST_HCINT9_NYET_SET_MSK 0x00000040
34597 /* The mask used to clear the ALT_USB_HOST_HCINT9_NYET register field value. */
34598 #define ALT_USB_HOST_HCINT9_NYET_CLR_MSK 0xffffffbf
34599 /* The reset value of the ALT_USB_HOST_HCINT9_NYET register field. */
34600 #define ALT_USB_HOST_HCINT9_NYET_RESET 0x0
34601 /* Extracts the ALT_USB_HOST_HCINT9_NYET field value from a register. */
34602 #define ALT_USB_HOST_HCINT9_NYET_GET(value) (((value) & 0x00000040) >> 6)
34603 /* Produces a ALT_USB_HOST_HCINT9_NYET register field value suitable for setting the register. */
34604 #define ALT_USB_HOST_HCINT9_NYET_SET(value) (((value) << 6) & 0x00000040)
34605 
34606 /*
34607  * Field : Transaction Error - xacterr
34608  *
34609  * Indicates one of the following errors occurred on the USB.-CRC check failure
34610  *
34611  * * Timeout
34612  *
34613  * * Bit stuff error
34614  *
34615  * * False EOP
34616  *
34617  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
34618  * This bit can be set only by the core and the application should write 1 to clear
34619  * it.
34620  *
34621  * Field Enumeration Values:
34622  *
34623  * Enum | Value | Description
34624  * :------------------------------------|:------|:---------------------
34625  * ALT_USB_HOST_HCINT9_XACTERR_E_INACT | 0x0 | No Transaction Error
34626  * ALT_USB_HOST_HCINT9_XACTERR_E_ACT | 0x1 | Transaction Error
34627  *
34628  * Field Access Macros:
34629  *
34630  */
34631 /*
34632  * Enumerated value for register field ALT_USB_HOST_HCINT9_XACTERR
34633  *
34634  * No Transaction Error
34635  */
34636 #define ALT_USB_HOST_HCINT9_XACTERR_E_INACT 0x0
34637 /*
34638  * Enumerated value for register field ALT_USB_HOST_HCINT9_XACTERR
34639  *
34640  * Transaction Error
34641  */
34642 #define ALT_USB_HOST_HCINT9_XACTERR_E_ACT 0x1
34643 
34644 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_XACTERR register field. */
34645 #define ALT_USB_HOST_HCINT9_XACTERR_LSB 7
34646 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_XACTERR register field. */
34647 #define ALT_USB_HOST_HCINT9_XACTERR_MSB 7
34648 /* The width in bits of the ALT_USB_HOST_HCINT9_XACTERR register field. */
34649 #define ALT_USB_HOST_HCINT9_XACTERR_WIDTH 1
34650 /* The mask used to set the ALT_USB_HOST_HCINT9_XACTERR register field value. */
34651 #define ALT_USB_HOST_HCINT9_XACTERR_SET_MSK 0x00000080
34652 /* The mask used to clear the ALT_USB_HOST_HCINT9_XACTERR register field value. */
34653 #define ALT_USB_HOST_HCINT9_XACTERR_CLR_MSK 0xffffff7f
34654 /* The reset value of the ALT_USB_HOST_HCINT9_XACTERR register field. */
34655 #define ALT_USB_HOST_HCINT9_XACTERR_RESET 0x0
34656 /* Extracts the ALT_USB_HOST_HCINT9_XACTERR field value from a register. */
34657 #define ALT_USB_HOST_HCINT9_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
34658 /* Produces a ALT_USB_HOST_HCINT9_XACTERR register field value suitable for setting the register. */
34659 #define ALT_USB_HOST_HCINT9_XACTERR_SET(value) (((value) << 7) & 0x00000080)
34660 
34661 /*
34662  * Field : Babble Error - bblerr
34663  *
34664  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
34665  * core..This bit can be set only by the core and the application should write 1 to
34666  * clear it.
34667  *
34668  * Field Enumeration Values:
34669  *
34670  * Enum | Value | Description
34671  * :-----------------------------------|:------|:----------------
34672  * ALT_USB_HOST_HCINT9_BBLERR_E_INACT | 0x0 | No Babble Error
34673  * ALT_USB_HOST_HCINT9_BBLERR_E_ACT | 0x1 | Babble Error
34674  *
34675  * Field Access Macros:
34676  *
34677  */
34678 /*
34679  * Enumerated value for register field ALT_USB_HOST_HCINT9_BBLERR
34680  *
34681  * No Babble Error
34682  */
34683 #define ALT_USB_HOST_HCINT9_BBLERR_E_INACT 0x0
34684 /*
34685  * Enumerated value for register field ALT_USB_HOST_HCINT9_BBLERR
34686  *
34687  * Babble Error
34688  */
34689 #define ALT_USB_HOST_HCINT9_BBLERR_E_ACT 0x1
34690 
34691 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_BBLERR register field. */
34692 #define ALT_USB_HOST_HCINT9_BBLERR_LSB 8
34693 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_BBLERR register field. */
34694 #define ALT_USB_HOST_HCINT9_BBLERR_MSB 8
34695 /* The width in bits of the ALT_USB_HOST_HCINT9_BBLERR register field. */
34696 #define ALT_USB_HOST_HCINT9_BBLERR_WIDTH 1
34697 /* The mask used to set the ALT_USB_HOST_HCINT9_BBLERR register field value. */
34698 #define ALT_USB_HOST_HCINT9_BBLERR_SET_MSK 0x00000100
34699 /* The mask used to clear the ALT_USB_HOST_HCINT9_BBLERR register field value. */
34700 #define ALT_USB_HOST_HCINT9_BBLERR_CLR_MSK 0xfffffeff
34701 /* The reset value of the ALT_USB_HOST_HCINT9_BBLERR register field. */
34702 #define ALT_USB_HOST_HCINT9_BBLERR_RESET 0x0
34703 /* Extracts the ALT_USB_HOST_HCINT9_BBLERR field value from a register. */
34704 #define ALT_USB_HOST_HCINT9_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
34705 /* Produces a ALT_USB_HOST_HCINT9_BBLERR register field value suitable for setting the register. */
34706 #define ALT_USB_HOST_HCINT9_BBLERR_SET(value) (((value) << 8) & 0x00000100)
34707 
34708 /*
34709  * Field : Frame Overrun - frmovrun
34710  *
34711  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
34712  * This bit can be set only by the core and the application should write 1 to clear
34713  * it.
34714  *
34715  * Field Enumeration Values:
34716  *
34717  * Enum | Value | Description
34718  * :-------------------------------------|:------|:-----------------
34719  * ALT_USB_HOST_HCINT9_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
34720  * ALT_USB_HOST_HCINT9_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
34721  *
34722  * Field Access Macros:
34723  *
34724  */
34725 /*
34726  * Enumerated value for register field ALT_USB_HOST_HCINT9_FRMOVRUN
34727  *
34728  * No Frame Overrun
34729  */
34730 #define ALT_USB_HOST_HCINT9_FRMOVRUN_E_INACT 0x0
34731 /*
34732  * Enumerated value for register field ALT_USB_HOST_HCINT9_FRMOVRUN
34733  *
34734  * Frame Overrun
34735  */
34736 #define ALT_USB_HOST_HCINT9_FRMOVRUN_E_ACT 0x1
34737 
34738 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_FRMOVRUN register field. */
34739 #define ALT_USB_HOST_HCINT9_FRMOVRUN_LSB 9
34740 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_FRMOVRUN register field. */
34741 #define ALT_USB_HOST_HCINT9_FRMOVRUN_MSB 9
34742 /* The width in bits of the ALT_USB_HOST_HCINT9_FRMOVRUN register field. */
34743 #define ALT_USB_HOST_HCINT9_FRMOVRUN_WIDTH 1
34744 /* The mask used to set the ALT_USB_HOST_HCINT9_FRMOVRUN register field value. */
34745 #define ALT_USB_HOST_HCINT9_FRMOVRUN_SET_MSK 0x00000200
34746 /* The mask used to clear the ALT_USB_HOST_HCINT9_FRMOVRUN register field value. */
34747 #define ALT_USB_HOST_HCINT9_FRMOVRUN_CLR_MSK 0xfffffdff
34748 /* The reset value of the ALT_USB_HOST_HCINT9_FRMOVRUN register field. */
34749 #define ALT_USB_HOST_HCINT9_FRMOVRUN_RESET 0x0
34750 /* Extracts the ALT_USB_HOST_HCINT9_FRMOVRUN field value from a register. */
34751 #define ALT_USB_HOST_HCINT9_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
34752 /* Produces a ALT_USB_HOST_HCINT9_FRMOVRUN register field value suitable for setting the register. */
34753 #define ALT_USB_HOST_HCINT9_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
34754 
34755 /*
34756  * Field : Data Toggle Error - datatglerr
34757  *
34758  * This bit can be set only by the core and the application should write 1 to clear
34759  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
34760  * core.
34761  *
34762  * Field Enumeration Values:
34763  *
34764  * Enum | Value | Description
34765  * :---------------------------------------|:------|:---------------------
34766  * ALT_USB_HOST_HCINT9_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
34767  * ALT_USB_HOST_HCINT9_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
34768  *
34769  * Field Access Macros:
34770  *
34771  */
34772 /*
34773  * Enumerated value for register field ALT_USB_HOST_HCINT9_DATATGLERR
34774  *
34775  * No Data Toggle Error
34776  */
34777 #define ALT_USB_HOST_HCINT9_DATATGLERR_E_INACT 0x0
34778 /*
34779  * Enumerated value for register field ALT_USB_HOST_HCINT9_DATATGLERR
34780  *
34781  * Data Toggle Error
34782  */
34783 #define ALT_USB_HOST_HCINT9_DATATGLERR_E_ACT 0x1
34784 
34785 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_DATATGLERR register field. */
34786 #define ALT_USB_HOST_HCINT9_DATATGLERR_LSB 10
34787 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_DATATGLERR register field. */
34788 #define ALT_USB_HOST_HCINT9_DATATGLERR_MSB 10
34789 /* The width in bits of the ALT_USB_HOST_HCINT9_DATATGLERR register field. */
34790 #define ALT_USB_HOST_HCINT9_DATATGLERR_WIDTH 1
34791 /* The mask used to set the ALT_USB_HOST_HCINT9_DATATGLERR register field value. */
34792 #define ALT_USB_HOST_HCINT9_DATATGLERR_SET_MSK 0x00000400
34793 /* The mask used to clear the ALT_USB_HOST_HCINT9_DATATGLERR register field value. */
34794 #define ALT_USB_HOST_HCINT9_DATATGLERR_CLR_MSK 0xfffffbff
34795 /* The reset value of the ALT_USB_HOST_HCINT9_DATATGLERR register field. */
34796 #define ALT_USB_HOST_HCINT9_DATATGLERR_RESET 0x0
34797 /* Extracts the ALT_USB_HOST_HCINT9_DATATGLERR field value from a register. */
34798 #define ALT_USB_HOST_HCINT9_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
34799 /* Produces a ALT_USB_HOST_HCINT9_DATATGLERR register field value suitable for setting the register. */
34800 #define ALT_USB_HOST_HCINT9_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
34801 
34802 /*
34803  * Field : BNA Interrupt - bnaintr
34804  *
34805  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
34806  * generates this interrupt when the descriptor accessed is not ready for the Core
34807  * to process. BNA will not be generated for Isochronous channels. for non
34808  * Scatter/Gather DMA mode, this bit is reserved.
34809  *
34810  * Field Enumeration Values:
34811  *
34812  * Enum | Value | Description
34813  * :------------------------------------|:------|:-----------------
34814  * ALT_USB_HOST_HCINT9_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
34815  * ALT_USB_HOST_HCINT9_BNAINTR_E_ACT | 0x1 | BNA Interrupt
34816  *
34817  * Field Access Macros:
34818  *
34819  */
34820 /*
34821  * Enumerated value for register field ALT_USB_HOST_HCINT9_BNAINTR
34822  *
34823  * No BNA Interrupt
34824  */
34825 #define ALT_USB_HOST_HCINT9_BNAINTR_E_INACT 0x0
34826 /*
34827  * Enumerated value for register field ALT_USB_HOST_HCINT9_BNAINTR
34828  *
34829  * BNA Interrupt
34830  */
34831 #define ALT_USB_HOST_HCINT9_BNAINTR_E_ACT 0x1
34832 
34833 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_BNAINTR register field. */
34834 #define ALT_USB_HOST_HCINT9_BNAINTR_LSB 11
34835 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_BNAINTR register field. */
34836 #define ALT_USB_HOST_HCINT9_BNAINTR_MSB 11
34837 /* The width in bits of the ALT_USB_HOST_HCINT9_BNAINTR register field. */
34838 #define ALT_USB_HOST_HCINT9_BNAINTR_WIDTH 1
34839 /* The mask used to set the ALT_USB_HOST_HCINT9_BNAINTR register field value. */
34840 #define ALT_USB_HOST_HCINT9_BNAINTR_SET_MSK 0x00000800
34841 /* The mask used to clear the ALT_USB_HOST_HCINT9_BNAINTR register field value. */
34842 #define ALT_USB_HOST_HCINT9_BNAINTR_CLR_MSK 0xfffff7ff
34843 /* The reset value of the ALT_USB_HOST_HCINT9_BNAINTR register field. */
34844 #define ALT_USB_HOST_HCINT9_BNAINTR_RESET 0x0
34845 /* Extracts the ALT_USB_HOST_HCINT9_BNAINTR field value from a register. */
34846 #define ALT_USB_HOST_HCINT9_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
34847 /* Produces a ALT_USB_HOST_HCINT9_BNAINTR register field value suitable for setting the register. */
34848 #define ALT_USB_HOST_HCINT9_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
34849 
34850 /*
34851  * Field : Excessive Transaction Error - xcs_xact_err
34852  *
34853  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
34854  * this bit when 3 consecutive transaction errors occurred on the USB bus.
34855  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
34856  * Scatter/Gather DMA mode, this bit is reserved.
34857  *
34858  * Field Enumeration Values:
34859  *
34860  * Enum | Value | Description
34861  * :-------------------------------------------|:------|:-------------------------------
34862  * ALT_USB_HOST_HCINT9_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
34863  * ALT_USB_HOST_HCINT9_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
34864  *
34865  * Field Access Macros:
34866  *
34867  */
34868 /*
34869  * Enumerated value for register field ALT_USB_HOST_HCINT9_XCS_XACT_ERR
34870  *
34871  * No Excessive Transaction Error
34872  */
34873 #define ALT_USB_HOST_HCINT9_XCS_XACT_ERR_E_INACT 0x0
34874 /*
34875  * Enumerated value for register field ALT_USB_HOST_HCINT9_XCS_XACT_ERR
34876  *
34877  * Excessive Transaction Error
34878  */
34879 #define ALT_USB_HOST_HCINT9_XCS_XACT_ERR_E_ACVTIVE 0x1
34880 
34881 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_XCS_XACT_ERR register field. */
34882 #define ALT_USB_HOST_HCINT9_XCS_XACT_ERR_LSB 12
34883 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_XCS_XACT_ERR register field. */
34884 #define ALT_USB_HOST_HCINT9_XCS_XACT_ERR_MSB 12
34885 /* The width in bits of the ALT_USB_HOST_HCINT9_XCS_XACT_ERR register field. */
34886 #define ALT_USB_HOST_HCINT9_XCS_XACT_ERR_WIDTH 1
34887 /* The mask used to set the ALT_USB_HOST_HCINT9_XCS_XACT_ERR register field value. */
34888 #define ALT_USB_HOST_HCINT9_XCS_XACT_ERR_SET_MSK 0x00001000
34889 /* The mask used to clear the ALT_USB_HOST_HCINT9_XCS_XACT_ERR register field value. */
34890 #define ALT_USB_HOST_HCINT9_XCS_XACT_ERR_CLR_MSK 0xffffefff
34891 /* The reset value of the ALT_USB_HOST_HCINT9_XCS_XACT_ERR register field. */
34892 #define ALT_USB_HOST_HCINT9_XCS_XACT_ERR_RESET 0x0
34893 /* Extracts the ALT_USB_HOST_HCINT9_XCS_XACT_ERR field value from a register. */
34894 #define ALT_USB_HOST_HCINT9_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
34895 /* Produces a ALT_USB_HOST_HCINT9_XCS_XACT_ERR register field value suitable for setting the register. */
34896 #define ALT_USB_HOST_HCINT9_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
34897 
34898 /*
34899  * Field : Descriptor rollover interrupt - desc_lst_rollintr
34900  *
34901  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
34902  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
34903  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
34904  * mode, this bit is reserved.
34905  *
34906  * Field Enumeration Values:
34907  *
34908  * Enum | Value | Description
34909  * :----------------------------------------------|:------|:---------------------------------
34910  * ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
34911  * ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
34912  *
34913  * Field Access Macros:
34914  *
34915  */
34916 /*
34917  * Enumerated value for register field ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR
34918  *
34919  * No Descriptor rollover interrupt
34920  */
34921 #define ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR_E_INACT 0x0
34922 /*
34923  * Enumerated value for register field ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR
34924  *
34925  * Descriptor rollover interrupt
34926  */
34927 #define ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR_E_ACT 0x1
34928 
34929 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR register field. */
34930 #define ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR_LSB 13
34931 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR register field. */
34932 #define ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR_MSB 13
34933 /* The width in bits of the ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR register field. */
34934 #define ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR_WIDTH 1
34935 /* The mask used to set the ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR register field value. */
34936 #define ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR_SET_MSK 0x00002000
34937 /* The mask used to clear the ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR register field value. */
34938 #define ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
34939 /* The reset value of the ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR register field. */
34940 #define ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR_RESET 0x0
34941 /* Extracts the ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR field value from a register. */
34942 #define ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
34943 /* Produces a ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR register field value suitable for setting the register. */
34944 #define ALT_USB_HOST_HCINT9_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
34945 
34946 #ifndef __ASSEMBLY__
34947 /*
34948  * WARNING: The C register and register group struct declarations are provided for
34949  * convenience and illustrative purposes. They should, however, be used with
34950  * caution as the C language standard provides no guarantees about the alignment or
34951  * atomicity of device memory accesses. The recommended practice for writing
34952  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
34953  * alt_write_word() functions.
34954  *
34955  * The struct declaration for register ALT_USB_HOST_HCINT9.
34956  */
34957 struct ALT_USB_HOST_HCINT9_s
34958 {
34959  const uint32_t xfercompl : 1; /* Transfer Completed */
34960  const uint32_t chhltd : 1; /* Channel Halted */
34961  const uint32_t ahberr : 1; /* AHB Error */
34962  const uint32_t stall : 1; /* STALL Response Received Interrupt */
34963  const uint32_t nak : 1; /* NAK Response Received Interrupt */
34964  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
34965  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
34966  const uint32_t xacterr : 1; /* Transaction Error */
34967  const uint32_t bblerr : 1; /* Babble Error */
34968  const uint32_t frmovrun : 1; /* Frame Overrun */
34969  const uint32_t datatglerr : 1; /* Data Toggle Error */
34970  const uint32_t bnaintr : 1; /* BNA Interrupt */
34971  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
34972  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
34973  uint32_t : 18; /* *UNDEFINED* */
34974 };
34975 
34976 /* The typedef declaration for register ALT_USB_HOST_HCINT9. */
34977 typedef volatile struct ALT_USB_HOST_HCINT9_s ALT_USB_HOST_HCINT9_t;
34978 #endif /* __ASSEMBLY__ */
34979 
34980 /* The byte offset of the ALT_USB_HOST_HCINT9 register from the beginning of the component. */
34981 #define ALT_USB_HOST_HCINT9_OFST 0x228
34982 /* The address of the ALT_USB_HOST_HCINT9 register. */
34983 #define ALT_USB_HOST_HCINT9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT9_OFST))
34984 
34985 /*
34986  * Register : Host Channel 9 Interrupt Mask Register - hcintmsk9
34987  *
34988  * This register reflects the mask for each channel status described in the
34989  * previous section.
34990  *
34991  * Register Layout
34992  *
34993  * Bits | Access | Reset | Description
34994  * :--------|:-------|:------|:----------------------------------
34995  * [0] | RW | 0x0 | Transfer Completed Mask
34996  * [1] | RW | 0x0 | Channel Halted Mask
34997  * [2] | RW | 0x0 | AHB Error Mask
34998  * [10:3] | ??? | 0x0 | *UNDEFINED*
34999  * [11] | RW | 0x0 | BNA Interrupt mask
35000  * [12] | ??? | 0x0 | *UNDEFINED*
35001  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
35002  * [31:14] | ??? | 0x0 | *UNDEFINED*
35003  *
35004  */
35005 /*
35006  * Field : Transfer Completed Mask - xfercomplmsk
35007  *
35008  * Transfer complete.
35009  *
35010  * Field Enumeration Values:
35011  *
35012  * Enum | Value | Description
35013  * :--------------------------------------------|:------|:------------
35014  * ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK_E_MSK | 0x0 | Mask
35015  * ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
35016  *
35017  * Field Access Macros:
35018  *
35019  */
35020 /*
35021  * Enumerated value for register field ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK
35022  *
35023  * Mask
35024  */
35025 #define ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK_E_MSK 0x0
35026 /*
35027  * Enumerated value for register field ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK
35028  *
35029  * No mask
35030  */
35031 #define ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK_E_NOMSK 0x1
35032 
35033 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK register field. */
35034 #define ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK_LSB 0
35035 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK register field. */
35036 #define ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK_MSB 0
35037 /* The width in bits of the ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK register field. */
35038 #define ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK_WIDTH 1
35039 /* The mask used to set the ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK register field value. */
35040 #define ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK_SET_MSK 0x00000001
35041 /* The mask used to clear the ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK register field value. */
35042 #define ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK_CLR_MSK 0xfffffffe
35043 /* The reset value of the ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK register field. */
35044 #define ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK_RESET 0x0
35045 /* Extracts the ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK field value from a register. */
35046 #define ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
35047 /* Produces a ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK register field value suitable for setting the register. */
35048 #define ALT_USB_HOST_HCINTMSK9_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
35049 
35050 /*
35051  * Field : Channel Halted Mask - chhltdmsk
35052  *
35053  * Channel Halted.
35054  *
35055  * Field Enumeration Values:
35056  *
35057  * Enum | Value | Description
35058  * :-----------------------------------------|:------|:------------
35059  * ALT_USB_HOST_HCINTMSK9_CHHLTDMSK_E_MSK | 0x0 | Mask
35060  * ALT_USB_HOST_HCINTMSK9_CHHLTDMSK_E_NOMSK | 0x1 | No mask
35061  *
35062  * Field Access Macros:
35063  *
35064  */
35065 /*
35066  * Enumerated value for register field ALT_USB_HOST_HCINTMSK9_CHHLTDMSK
35067  *
35068  * Mask
35069  */
35070 #define ALT_USB_HOST_HCINTMSK9_CHHLTDMSK_E_MSK 0x0
35071 /*
35072  * Enumerated value for register field ALT_USB_HOST_HCINTMSK9_CHHLTDMSK
35073  *
35074  * No mask
35075  */
35076 #define ALT_USB_HOST_HCINTMSK9_CHHLTDMSK_E_NOMSK 0x1
35077 
35078 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK9_CHHLTDMSK register field. */
35079 #define ALT_USB_HOST_HCINTMSK9_CHHLTDMSK_LSB 1
35080 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK9_CHHLTDMSK register field. */
35081 #define ALT_USB_HOST_HCINTMSK9_CHHLTDMSK_MSB 1
35082 /* The width in bits of the ALT_USB_HOST_HCINTMSK9_CHHLTDMSK register field. */
35083 #define ALT_USB_HOST_HCINTMSK9_CHHLTDMSK_WIDTH 1
35084 /* The mask used to set the ALT_USB_HOST_HCINTMSK9_CHHLTDMSK register field value. */
35085 #define ALT_USB_HOST_HCINTMSK9_CHHLTDMSK_SET_MSK 0x00000002
35086 /* The mask used to clear the ALT_USB_HOST_HCINTMSK9_CHHLTDMSK register field value. */
35087 #define ALT_USB_HOST_HCINTMSK9_CHHLTDMSK_CLR_MSK 0xfffffffd
35088 /* The reset value of the ALT_USB_HOST_HCINTMSK9_CHHLTDMSK register field. */
35089 #define ALT_USB_HOST_HCINTMSK9_CHHLTDMSK_RESET 0x0
35090 /* Extracts the ALT_USB_HOST_HCINTMSK9_CHHLTDMSK field value from a register. */
35091 #define ALT_USB_HOST_HCINTMSK9_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
35092 /* Produces a ALT_USB_HOST_HCINTMSK9_CHHLTDMSK register field value suitable for setting the register. */
35093 #define ALT_USB_HOST_HCINTMSK9_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
35094 
35095 /*
35096  * Field : AHB Error Mask - ahberrmsk
35097  *
35098  * In scatter/gather DMA mode for host, interrupts will not be generated due to
35099  * the corresponding bits set in HCINTn.
35100  *
35101  * Field Enumeration Values:
35102  *
35103  * Enum | Value | Description
35104  * :-----------------------------------------|:------|:------------
35105  * ALT_USB_HOST_HCINTMSK9_AHBERRMSK_E_MSK | 0x0 | Mask
35106  * ALT_USB_HOST_HCINTMSK9_AHBERRMSK_E_NOMSK | 0x1 | No mask
35107  *
35108  * Field Access Macros:
35109  *
35110  */
35111 /*
35112  * Enumerated value for register field ALT_USB_HOST_HCINTMSK9_AHBERRMSK
35113  *
35114  * Mask
35115  */
35116 #define ALT_USB_HOST_HCINTMSK9_AHBERRMSK_E_MSK 0x0
35117 /*
35118  * Enumerated value for register field ALT_USB_HOST_HCINTMSK9_AHBERRMSK
35119  *
35120  * No mask
35121  */
35122 #define ALT_USB_HOST_HCINTMSK9_AHBERRMSK_E_NOMSK 0x1
35123 
35124 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK9_AHBERRMSK register field. */
35125 #define ALT_USB_HOST_HCINTMSK9_AHBERRMSK_LSB 2
35126 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK9_AHBERRMSK register field. */
35127 #define ALT_USB_HOST_HCINTMSK9_AHBERRMSK_MSB 2
35128 /* The width in bits of the ALT_USB_HOST_HCINTMSK9_AHBERRMSK register field. */
35129 #define ALT_USB_HOST_HCINTMSK9_AHBERRMSK_WIDTH 1
35130 /* The mask used to set the ALT_USB_HOST_HCINTMSK9_AHBERRMSK register field value. */
35131 #define ALT_USB_HOST_HCINTMSK9_AHBERRMSK_SET_MSK 0x00000004
35132 /* The mask used to clear the ALT_USB_HOST_HCINTMSK9_AHBERRMSK register field value. */
35133 #define ALT_USB_HOST_HCINTMSK9_AHBERRMSK_CLR_MSK 0xfffffffb
35134 /* The reset value of the ALT_USB_HOST_HCINTMSK9_AHBERRMSK register field. */
35135 #define ALT_USB_HOST_HCINTMSK9_AHBERRMSK_RESET 0x0
35136 /* Extracts the ALT_USB_HOST_HCINTMSK9_AHBERRMSK field value from a register. */
35137 #define ALT_USB_HOST_HCINTMSK9_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
35138 /* Produces a ALT_USB_HOST_HCINTMSK9_AHBERRMSK register field value suitable for setting the register. */
35139 #define ALT_USB_HOST_HCINTMSK9_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
35140 
35141 /*
35142  * Field : BNA Interrupt mask - bnaintrmsk
35143  *
35144  * This bit is valid only when Scatter/Gather DMA mode is enabled.
35145  *
35146  * Field Enumeration Values:
35147  *
35148  * Enum | Value | Description
35149  * :------------------------------------------|:------|:------------
35150  * ALT_USB_HOST_HCINTMSK9_BNAINTRMSK_E_MSK | 0x0 | Mask
35151  * ALT_USB_HOST_HCINTMSK9_BNAINTRMSK_E_NOMSK | 0x1 | No mask
35152  *
35153  * Field Access Macros:
35154  *
35155  */
35156 /*
35157  * Enumerated value for register field ALT_USB_HOST_HCINTMSK9_BNAINTRMSK
35158  *
35159  * Mask
35160  */
35161 #define ALT_USB_HOST_HCINTMSK9_BNAINTRMSK_E_MSK 0x0
35162 /*
35163  * Enumerated value for register field ALT_USB_HOST_HCINTMSK9_BNAINTRMSK
35164  *
35165  * No mask
35166  */
35167 #define ALT_USB_HOST_HCINTMSK9_BNAINTRMSK_E_NOMSK 0x1
35168 
35169 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK9_BNAINTRMSK register field. */
35170 #define ALT_USB_HOST_HCINTMSK9_BNAINTRMSK_LSB 11
35171 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK9_BNAINTRMSK register field. */
35172 #define ALT_USB_HOST_HCINTMSK9_BNAINTRMSK_MSB 11
35173 /* The width in bits of the ALT_USB_HOST_HCINTMSK9_BNAINTRMSK register field. */
35174 #define ALT_USB_HOST_HCINTMSK9_BNAINTRMSK_WIDTH 1
35175 /* The mask used to set the ALT_USB_HOST_HCINTMSK9_BNAINTRMSK register field value. */
35176 #define ALT_USB_HOST_HCINTMSK9_BNAINTRMSK_SET_MSK 0x00000800
35177 /* The mask used to clear the ALT_USB_HOST_HCINTMSK9_BNAINTRMSK register field value. */
35178 #define ALT_USB_HOST_HCINTMSK9_BNAINTRMSK_CLR_MSK 0xfffff7ff
35179 /* The reset value of the ALT_USB_HOST_HCINTMSK9_BNAINTRMSK register field. */
35180 #define ALT_USB_HOST_HCINTMSK9_BNAINTRMSK_RESET 0x0
35181 /* Extracts the ALT_USB_HOST_HCINTMSK9_BNAINTRMSK field value from a register. */
35182 #define ALT_USB_HOST_HCINTMSK9_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
35183 /* Produces a ALT_USB_HOST_HCINTMSK9_BNAINTRMSK register field value suitable for setting the register. */
35184 #define ALT_USB_HOST_HCINTMSK9_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
35185 
35186 /*
35187  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
35188  *
35189  * This bit is valid only when Scatter/Gather DMA mode is enabled.
35190  *
35191  * Field Enumeration Values:
35192  *
35193  * Enum | Value | Description
35194  * :---------------------------------------------------|:------|:------------
35195  * ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
35196  * ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
35197  *
35198  * Field Access Macros:
35199  *
35200  */
35201 /*
35202  * Enumerated value for register field ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK
35203  *
35204  * Mask
35205  */
35206 #define ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK_E_MSK 0x0
35207 /*
35208  * Enumerated value for register field ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK
35209  *
35210  * No mask
35211  */
35212 #define ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
35213 
35214 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK register field. */
35215 #define ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK_LSB 13
35216 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK register field. */
35217 #define ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK_MSB 13
35218 /* The width in bits of the ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK register field. */
35219 #define ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK_WIDTH 1
35220 /* The mask used to set the ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK register field value. */
35221 #define ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
35222 /* The mask used to clear the ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK register field value. */
35223 #define ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
35224 /* The reset value of the ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK register field. */
35225 #define ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK_RESET 0x0
35226 /* Extracts the ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK field value from a register. */
35227 #define ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
35228 /* Produces a ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
35229 #define ALT_USB_HOST_HCINTMSK9_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
35230 
35231 #ifndef __ASSEMBLY__
35232 /*
35233  * WARNING: The C register and register group struct declarations are provided for
35234  * convenience and illustrative purposes. They should, however, be used with
35235  * caution as the C language standard provides no guarantees about the alignment or
35236  * atomicity of device memory accesses. The recommended practice for writing
35237  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
35238  * alt_write_word() functions.
35239  *
35240  * The struct declaration for register ALT_USB_HOST_HCINTMSK9.
35241  */
35242 struct ALT_USB_HOST_HCINTMSK9_s
35243 {
35244  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
35245  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
35246  uint32_t ahberrmsk : 1; /* AHB Error Mask */
35247  uint32_t : 8; /* *UNDEFINED* */
35248  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
35249  uint32_t : 1; /* *UNDEFINED* */
35250  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
35251  uint32_t : 18; /* *UNDEFINED* */
35252 };
35253 
35254 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK9. */
35255 typedef volatile struct ALT_USB_HOST_HCINTMSK9_s ALT_USB_HOST_HCINTMSK9_t;
35256 #endif /* __ASSEMBLY__ */
35257 
35258 /* The byte offset of the ALT_USB_HOST_HCINTMSK9 register from the beginning of the component. */
35259 #define ALT_USB_HOST_HCINTMSK9_OFST 0x22c
35260 /* The address of the ALT_USB_HOST_HCINTMSK9 register. */
35261 #define ALT_USB_HOST_HCINTMSK9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK9_OFST))
35262 
35263 /*
35264  * Register : Host Channel 9 Transfer Size Register - hctsiz9
35265  *
35266  * Buffer DMA Mode
35267  *
35268  * Register Layout
35269  *
35270  * Bits | Access | Reset | Description
35271  * :--------|:-------|:------|:--------------
35272  * [18:0] | RW | 0x0 | Transfer Size
35273  * [28:19] | RW | 0x0 | Packet Count
35274  * [30:29] | RW | 0x0 | PID
35275  * [31] | RW | 0x0 | Do Ping
35276  *
35277  */
35278 /*
35279  * Field : Transfer Size - xfersize
35280  *
35281  * for an OUT, this field is the number of data bytes the host sends during the
35282  * transfer. for an IN, this field is the buffer size that the application has
35283  * Reserved for the transfer. The application is expected to program this field as
35284  * an integer multiple of the maximum packet size for IN transactions (periodic and
35285  * non-periodic).The width of this counter is specified as 19 bits.
35286  *
35287  * Field Access Macros:
35288  *
35289  */
35290 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ9_XFERSIZE register field. */
35291 #define ALT_USB_HOST_HCTSIZ9_XFERSIZE_LSB 0
35292 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ9_XFERSIZE register field. */
35293 #define ALT_USB_HOST_HCTSIZ9_XFERSIZE_MSB 18
35294 /* The width in bits of the ALT_USB_HOST_HCTSIZ9_XFERSIZE register field. */
35295 #define ALT_USB_HOST_HCTSIZ9_XFERSIZE_WIDTH 19
35296 /* The mask used to set the ALT_USB_HOST_HCTSIZ9_XFERSIZE register field value. */
35297 #define ALT_USB_HOST_HCTSIZ9_XFERSIZE_SET_MSK 0x0007ffff
35298 /* The mask used to clear the ALT_USB_HOST_HCTSIZ9_XFERSIZE register field value. */
35299 #define ALT_USB_HOST_HCTSIZ9_XFERSIZE_CLR_MSK 0xfff80000
35300 /* The reset value of the ALT_USB_HOST_HCTSIZ9_XFERSIZE register field. */
35301 #define ALT_USB_HOST_HCTSIZ9_XFERSIZE_RESET 0x0
35302 /* Extracts the ALT_USB_HOST_HCTSIZ9_XFERSIZE field value from a register. */
35303 #define ALT_USB_HOST_HCTSIZ9_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
35304 /* Produces a ALT_USB_HOST_HCTSIZ9_XFERSIZE register field value suitable for setting the register. */
35305 #define ALT_USB_HOST_HCTSIZ9_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
35306 
35307 /*
35308  * Field : Packet Count - pktcnt
35309  *
35310  * This field is programmed by the application with the expected number of packets
35311  * to be transmitted (OUT) or received (IN). The host decrements this count on
35312  * every successful transmission or reception of an OUT/IN packet. Once this count
35313  * reaches zero, the application is interrupted to indicate normal completion. The
35314  * width of this counter is specified as 10 bits.
35315  *
35316  * Field Access Macros:
35317  *
35318  */
35319 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ9_PKTCNT register field. */
35320 #define ALT_USB_HOST_HCTSIZ9_PKTCNT_LSB 19
35321 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ9_PKTCNT register field. */
35322 #define ALT_USB_HOST_HCTSIZ9_PKTCNT_MSB 28
35323 /* The width in bits of the ALT_USB_HOST_HCTSIZ9_PKTCNT register field. */
35324 #define ALT_USB_HOST_HCTSIZ9_PKTCNT_WIDTH 10
35325 /* The mask used to set the ALT_USB_HOST_HCTSIZ9_PKTCNT register field value. */
35326 #define ALT_USB_HOST_HCTSIZ9_PKTCNT_SET_MSK 0x1ff80000
35327 /* The mask used to clear the ALT_USB_HOST_HCTSIZ9_PKTCNT register field value. */
35328 #define ALT_USB_HOST_HCTSIZ9_PKTCNT_CLR_MSK 0xe007ffff
35329 /* The reset value of the ALT_USB_HOST_HCTSIZ9_PKTCNT register field. */
35330 #define ALT_USB_HOST_HCTSIZ9_PKTCNT_RESET 0x0
35331 /* Extracts the ALT_USB_HOST_HCTSIZ9_PKTCNT field value from a register. */
35332 #define ALT_USB_HOST_HCTSIZ9_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
35333 /* Produces a ALT_USB_HOST_HCTSIZ9_PKTCNT register field value suitable for setting the register. */
35334 #define ALT_USB_HOST_HCTSIZ9_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
35335 
35336 /*
35337  * Field : PID - pid
35338  *
35339  * The application programs this field with the type of PID to use forthe initial
35340  * transaction. The host maintains this field for the rest of the transfer.
35341  *
35342  * Field Enumeration Values:
35343  *
35344  * Enum | Value | Description
35345  * :---------------------------------|:------|:------------------------------------
35346  * ALT_USB_HOST_HCTSIZ9_PID_E_DATA0 | 0x0 | DATA0
35347  * ALT_USB_HOST_HCTSIZ9_PID_E_DATA2 | 0x1 | DATA2
35348  * ALT_USB_HOST_HCTSIZ9_PID_E_DATA1 | 0x2 | DATA1
35349  * ALT_USB_HOST_HCTSIZ9_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
35350  *
35351  * Field Access Macros:
35352  *
35353  */
35354 /*
35355  * Enumerated value for register field ALT_USB_HOST_HCTSIZ9_PID
35356  *
35357  * DATA0
35358  */
35359 #define ALT_USB_HOST_HCTSIZ9_PID_E_DATA0 0x0
35360 /*
35361  * Enumerated value for register field ALT_USB_HOST_HCTSIZ9_PID
35362  *
35363  * DATA2
35364  */
35365 #define ALT_USB_HOST_HCTSIZ9_PID_E_DATA2 0x1
35366 /*
35367  * Enumerated value for register field ALT_USB_HOST_HCTSIZ9_PID
35368  *
35369  * DATA1
35370  */
35371 #define ALT_USB_HOST_HCTSIZ9_PID_E_DATA1 0x2
35372 /*
35373  * Enumerated value for register field ALT_USB_HOST_HCTSIZ9_PID
35374  *
35375  * MDATA (non-control)/SETUP (control)
35376  */
35377 #define ALT_USB_HOST_HCTSIZ9_PID_E_MDATA 0x3
35378 
35379 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ9_PID register field. */
35380 #define ALT_USB_HOST_HCTSIZ9_PID_LSB 29
35381 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ9_PID register field. */
35382 #define ALT_USB_HOST_HCTSIZ9_PID_MSB 30
35383 /* The width in bits of the ALT_USB_HOST_HCTSIZ9_PID register field. */
35384 #define ALT_USB_HOST_HCTSIZ9_PID_WIDTH 2
35385 /* The mask used to set the ALT_USB_HOST_HCTSIZ9_PID register field value. */
35386 #define ALT_USB_HOST_HCTSIZ9_PID_SET_MSK 0x60000000
35387 /* The mask used to clear the ALT_USB_HOST_HCTSIZ9_PID register field value. */
35388 #define ALT_USB_HOST_HCTSIZ9_PID_CLR_MSK 0x9fffffff
35389 /* The reset value of the ALT_USB_HOST_HCTSIZ9_PID register field. */
35390 #define ALT_USB_HOST_HCTSIZ9_PID_RESET 0x0
35391 /* Extracts the ALT_USB_HOST_HCTSIZ9_PID field value from a register. */
35392 #define ALT_USB_HOST_HCTSIZ9_PID_GET(value) (((value) & 0x60000000) >> 29)
35393 /* Produces a ALT_USB_HOST_HCTSIZ9_PID register field value suitable for setting the register. */
35394 #define ALT_USB_HOST_HCTSIZ9_PID_SET(value) (((value) << 29) & 0x60000000)
35395 
35396 /*
35397  * Field : Do Ping - dopng
35398  *
35399  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
35400  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
35401  * for IN transfers it disables the channel.
35402  *
35403  * Field Enumeration Values:
35404  *
35405  * Enum | Value | Description
35406  * :------------------------------------|:------|:-----------------
35407  * ALT_USB_HOST_HCTSIZ9_DOPNG_E_NOPING | 0x0 | No ping protocol
35408  * ALT_USB_HOST_HCTSIZ9_DOPNG_E_PING | 0x1 | Ping protocol
35409  *
35410  * Field Access Macros:
35411  *
35412  */
35413 /*
35414  * Enumerated value for register field ALT_USB_HOST_HCTSIZ9_DOPNG
35415  *
35416  * No ping protocol
35417  */
35418 #define ALT_USB_HOST_HCTSIZ9_DOPNG_E_NOPING 0x0
35419 /*
35420  * Enumerated value for register field ALT_USB_HOST_HCTSIZ9_DOPNG
35421  *
35422  * Ping protocol
35423  */
35424 #define ALT_USB_HOST_HCTSIZ9_DOPNG_E_PING 0x1
35425 
35426 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ9_DOPNG register field. */
35427 #define ALT_USB_HOST_HCTSIZ9_DOPNG_LSB 31
35428 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ9_DOPNG register field. */
35429 #define ALT_USB_HOST_HCTSIZ9_DOPNG_MSB 31
35430 /* The width in bits of the ALT_USB_HOST_HCTSIZ9_DOPNG register field. */
35431 #define ALT_USB_HOST_HCTSIZ9_DOPNG_WIDTH 1
35432 /* The mask used to set the ALT_USB_HOST_HCTSIZ9_DOPNG register field value. */
35433 #define ALT_USB_HOST_HCTSIZ9_DOPNG_SET_MSK 0x80000000
35434 /* The mask used to clear the ALT_USB_HOST_HCTSIZ9_DOPNG register field value. */
35435 #define ALT_USB_HOST_HCTSIZ9_DOPNG_CLR_MSK 0x7fffffff
35436 /* The reset value of the ALT_USB_HOST_HCTSIZ9_DOPNG register field. */
35437 #define ALT_USB_HOST_HCTSIZ9_DOPNG_RESET 0x0
35438 /* Extracts the ALT_USB_HOST_HCTSIZ9_DOPNG field value from a register. */
35439 #define ALT_USB_HOST_HCTSIZ9_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
35440 /* Produces a ALT_USB_HOST_HCTSIZ9_DOPNG register field value suitable for setting the register. */
35441 #define ALT_USB_HOST_HCTSIZ9_DOPNG_SET(value) (((value) << 31) & 0x80000000)
35442 
35443 #ifndef __ASSEMBLY__
35444 /*
35445  * WARNING: The C register and register group struct declarations are provided for
35446  * convenience and illustrative purposes. They should, however, be used with
35447  * caution as the C language standard provides no guarantees about the alignment or
35448  * atomicity of device memory accesses. The recommended practice for writing
35449  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
35450  * alt_write_word() functions.
35451  *
35452  * The struct declaration for register ALT_USB_HOST_HCTSIZ9.
35453  */
35454 struct ALT_USB_HOST_HCTSIZ9_s
35455 {
35456  uint32_t xfersize : 19; /* Transfer Size */
35457  uint32_t pktcnt : 10; /* Packet Count */
35458  uint32_t pid : 2; /* PID */
35459  uint32_t dopng : 1; /* Do Ping */
35460 };
35461 
35462 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ9. */
35463 typedef volatile struct ALT_USB_HOST_HCTSIZ9_s ALT_USB_HOST_HCTSIZ9_t;
35464 #endif /* __ASSEMBLY__ */
35465 
35466 /* The byte offset of the ALT_USB_HOST_HCTSIZ9 register from the beginning of the component. */
35467 #define ALT_USB_HOST_HCTSIZ9_OFST 0x230
35468 /* The address of the ALT_USB_HOST_HCTSIZ9 register. */
35469 #define ALT_USB_HOST_HCTSIZ9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ9_OFST))
35470 
35471 /*
35472  * Register : Host Channel DMA Address Register - hcdma9
35473  *
35474  * This register is used by the OTG host in the internal DMA mode to maintain the
35475  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
35476  * DWORD-aligned.
35477  *
35478  * Register Layout
35479  *
35480  * Bits | Access | Reset | Description
35481  * :-------|:-------|:------|:------------
35482  * [31:0] | RW | 0x0 | DMA Address
35483  *
35484  */
35485 /*
35486  * Field : DMA Address - hcdma9
35487  *
35488  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
35489  * first descriptor in the list should be located in this address. The first
35490  * descriptor may be or may not be ready. The core starts processing the list from
35491  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
35492  * in which the isochronous descriptors are present where N is based on nTD as per
35493  * Table below
35494  *
35495  * [31:N] Base Address [N-1:3] Offset [2:0] 000
35496  *
35497  * HS ISOC FS ISOC
35498  *
35499  * nTD N nTD N
35500  *
35501  * 7 6 1 4
35502  *
35503  * 15 7 3 5
35504  *
35505  * 31 8 7 6
35506  *
35507  * 63 9 15 7
35508  *
35509  * 127 10 31 8
35510  *
35511  * 255 11 63 9
35512  *
35513  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
35514  * This value is in terms of number of descriptors. The values can be from 0 to 63.
35515  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
35516  * descriptor processed in the list. This field is updated both by application and
35517  * the core. for example, if the application enables the channel after programming
35518  * CTD=5, then the core will start processing the 6th descriptor. The address is
35519  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
35520  * CTD for isochronous is based on the current frame/microframe value. Need to be
35521  * set to zero by application.
35522  *
35523  * Field Access Macros:
35524  *
35525  */
35526 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA9_HCDMA9 register field. */
35527 #define ALT_USB_HOST_HCDMA9_HCDMA9_LSB 0
35528 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA9_HCDMA9 register field. */
35529 #define ALT_USB_HOST_HCDMA9_HCDMA9_MSB 31
35530 /* The width in bits of the ALT_USB_HOST_HCDMA9_HCDMA9 register field. */
35531 #define ALT_USB_HOST_HCDMA9_HCDMA9_WIDTH 32
35532 /* The mask used to set the ALT_USB_HOST_HCDMA9_HCDMA9 register field value. */
35533 #define ALT_USB_HOST_HCDMA9_HCDMA9_SET_MSK 0xffffffff
35534 /* The mask used to clear the ALT_USB_HOST_HCDMA9_HCDMA9 register field value. */
35535 #define ALT_USB_HOST_HCDMA9_HCDMA9_CLR_MSK 0x00000000
35536 /* The reset value of the ALT_USB_HOST_HCDMA9_HCDMA9 register field. */
35537 #define ALT_USB_HOST_HCDMA9_HCDMA9_RESET 0x0
35538 /* Extracts the ALT_USB_HOST_HCDMA9_HCDMA9 field value from a register. */
35539 #define ALT_USB_HOST_HCDMA9_HCDMA9_GET(value) (((value) & 0xffffffff) >> 0)
35540 /* Produces a ALT_USB_HOST_HCDMA9_HCDMA9 register field value suitable for setting the register. */
35541 #define ALT_USB_HOST_HCDMA9_HCDMA9_SET(value) (((value) << 0) & 0xffffffff)
35542 
35543 #ifndef __ASSEMBLY__
35544 /*
35545  * WARNING: The C register and register group struct declarations are provided for
35546  * convenience and illustrative purposes. They should, however, be used with
35547  * caution as the C language standard provides no guarantees about the alignment or
35548  * atomicity of device memory accesses. The recommended practice for writing
35549  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
35550  * alt_write_word() functions.
35551  *
35552  * The struct declaration for register ALT_USB_HOST_HCDMA9.
35553  */
35554 struct ALT_USB_HOST_HCDMA9_s
35555 {
35556  uint32_t hcdma9 : 32; /* DMA Address */
35557 };
35558 
35559 /* The typedef declaration for register ALT_USB_HOST_HCDMA9. */
35560 typedef volatile struct ALT_USB_HOST_HCDMA9_s ALT_USB_HOST_HCDMA9_t;
35561 #endif /* __ASSEMBLY__ */
35562 
35563 /* The byte offset of the ALT_USB_HOST_HCDMA9 register from the beginning of the component. */
35564 #define ALT_USB_HOST_HCDMA9_OFST 0x234
35565 /* The address of the ALT_USB_HOST_HCDMA9 register. */
35566 #define ALT_USB_HOST_HCDMA9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA9_OFST))
35567 
35568 /*
35569  * Register : Host Channel 9 DMA Buffer Address Register - hcdmab9
35570  *
35571  * These registers are present only in case of Scatter/Gather DMA. These
35572  * registers are implemented in RAM instead of flop-based implementation. Holds
35573  * the current buffer address. This register is updated as and when the
35574  * data transfer for the corresponding end point is in progress. This
35575  * register is present only in Scatter/Gather DMA mode. Otherwise this field
35576  * is reserved.
35577  *
35578  * Register Layout
35579  *
35580  * Bits | Access | Reset | Description
35581  * :-------|:-------|:------|:----------------------------------
35582  * [31:0] | RW | 0x0 | Host Channel 0 DMA Buffer Address
35583  *
35584  */
35585 /*
35586  * Field : Host Channel 0 DMA Buffer Address - hcdmab9
35587  *
35588  * These registers are present only in case of Scatter/Gather DMA. These
35589  * registers are implemented in RAM instead of flop-based implementation. Holds
35590  * the current buffer address. This register is updated as and when the data
35591  * transfer for the corresponding end point is in progress. This register is
35592  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
35593  *
35594  * Field Access Macros:
35595  *
35596  */
35597 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB9_HCDMAB9 register field. */
35598 #define ALT_USB_HOST_HCDMAB9_HCDMAB9_LSB 0
35599 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB9_HCDMAB9 register field. */
35600 #define ALT_USB_HOST_HCDMAB9_HCDMAB9_MSB 31
35601 /* The width in bits of the ALT_USB_HOST_HCDMAB9_HCDMAB9 register field. */
35602 #define ALT_USB_HOST_HCDMAB9_HCDMAB9_WIDTH 32
35603 /* The mask used to set the ALT_USB_HOST_HCDMAB9_HCDMAB9 register field value. */
35604 #define ALT_USB_HOST_HCDMAB9_HCDMAB9_SET_MSK 0xffffffff
35605 /* The mask used to clear the ALT_USB_HOST_HCDMAB9_HCDMAB9 register field value. */
35606 #define ALT_USB_HOST_HCDMAB9_HCDMAB9_CLR_MSK 0x00000000
35607 /* The reset value of the ALT_USB_HOST_HCDMAB9_HCDMAB9 register field. */
35608 #define ALT_USB_HOST_HCDMAB9_HCDMAB9_RESET 0x0
35609 /* Extracts the ALT_USB_HOST_HCDMAB9_HCDMAB9 field value from a register. */
35610 #define ALT_USB_HOST_HCDMAB9_HCDMAB9_GET(value) (((value) & 0xffffffff) >> 0)
35611 /* Produces a ALT_USB_HOST_HCDMAB9_HCDMAB9 register field value suitable for setting the register. */
35612 #define ALT_USB_HOST_HCDMAB9_HCDMAB9_SET(value) (((value) << 0) & 0xffffffff)
35613 
35614 #ifndef __ASSEMBLY__
35615 /*
35616  * WARNING: The C register and register group struct declarations are provided for
35617  * convenience and illustrative purposes. They should, however, be used with
35618  * caution as the C language standard provides no guarantees about the alignment or
35619  * atomicity of device memory accesses. The recommended practice for writing
35620  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
35621  * alt_write_word() functions.
35622  *
35623  * The struct declaration for register ALT_USB_HOST_HCDMAB9.
35624  */
35625 struct ALT_USB_HOST_HCDMAB9_s
35626 {
35627  uint32_t hcdmab9 : 32; /* Host Channel 0 DMA Buffer Address */
35628 };
35629 
35630 /* The typedef declaration for register ALT_USB_HOST_HCDMAB9. */
35631 typedef volatile struct ALT_USB_HOST_HCDMAB9_s ALT_USB_HOST_HCDMAB9_t;
35632 #endif /* __ASSEMBLY__ */
35633 
35634 /* The byte offset of the ALT_USB_HOST_HCDMAB9 register from the beginning of the component. */
35635 #define ALT_USB_HOST_HCDMAB9_OFST 0x238
35636 /* The address of the ALT_USB_HOST_HCDMAB9 register. */
35637 #define ALT_USB_HOST_HCDMAB9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB9_OFST))
35638 
35639 /*
35640  * Register : Host Channel 10 Characteristics Register - hcchar10
35641  *
35642  * Host Channel 1 Characteristics Register
35643  *
35644  * Register Layout
35645  *
35646  * Bits | Access | Reset | Description
35647  * :--------|:-------|:------|:--------------------
35648  * [10:0] | RW | 0x0 | Maximum Packet Size
35649  * [14:11] | RW | 0x0 | Endpoint Number
35650  * [15] | RW | 0x0 | Endpoint Direction
35651  * [16] | ??? | 0x0 | *UNDEFINED*
35652  * [17] | RW | 0x0 | Low-Speed Device
35653  * [19:18] | RW | 0x0 | Endpoint Type
35654  * [21:20] | RW | 0x0 | Multi Count
35655  * [28:22] | RW | 0x0 | Device Address
35656  * [29] | ??? | 0x0 | *UNDEFINED*
35657  * [30] | R | 0x0 | Channel Disable
35658  * [31] | R | 0x0 | Channel Enable
35659  *
35660  */
35661 /*
35662  * Field : Maximum Packet Size - mps
35663  *
35664  * Indicates the maximum packet size of the associated endpoint.
35665  *
35666  * Field Access Macros:
35667  *
35668  */
35669 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR10_MPS register field. */
35670 #define ALT_USB_HOST_HCCHAR10_MPS_LSB 0
35671 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR10_MPS register field. */
35672 #define ALT_USB_HOST_HCCHAR10_MPS_MSB 10
35673 /* The width in bits of the ALT_USB_HOST_HCCHAR10_MPS register field. */
35674 #define ALT_USB_HOST_HCCHAR10_MPS_WIDTH 11
35675 /* The mask used to set the ALT_USB_HOST_HCCHAR10_MPS register field value. */
35676 #define ALT_USB_HOST_HCCHAR10_MPS_SET_MSK 0x000007ff
35677 /* The mask used to clear the ALT_USB_HOST_HCCHAR10_MPS register field value. */
35678 #define ALT_USB_HOST_HCCHAR10_MPS_CLR_MSK 0xfffff800
35679 /* The reset value of the ALT_USB_HOST_HCCHAR10_MPS register field. */
35680 #define ALT_USB_HOST_HCCHAR10_MPS_RESET 0x0
35681 /* Extracts the ALT_USB_HOST_HCCHAR10_MPS field value from a register. */
35682 #define ALT_USB_HOST_HCCHAR10_MPS_GET(value) (((value) & 0x000007ff) >> 0)
35683 /* Produces a ALT_USB_HOST_HCCHAR10_MPS register field value suitable for setting the register. */
35684 #define ALT_USB_HOST_HCCHAR10_MPS_SET(value) (((value) << 0) & 0x000007ff)
35685 
35686 /*
35687  * Field : Endpoint Number - epnum
35688  *
35689  * Indicates the endpoint number on the device serving as the data source or sink.
35690  *
35691  * Field Enumeration Values:
35692  *
35693  * Enum | Value | Description
35694  * :--------------------------------------|:------|:--------------
35695  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT0 | 0x0 | End point 0
35696  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT1 | 0x1 | End point 1
35697  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT2 | 0x2 | End point 2
35698  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT3 | 0x3 | End point 3
35699  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT4 | 0x4 | End point 4
35700  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT5 | 0x5 | End point 5
35701  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT6 | 0x6 | End point 6
35702  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT7 | 0x7 | End point 7
35703  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT8 | 0x8 | End point 8
35704  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT9 | 0x9 | End point 9
35705  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT10 | 0xa | End point 10
35706  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT11 | 0xb | End point 11
35707  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT12 | 0xc | End point 12
35708  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT13 | 0xd | End point 13
35709  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT14 | 0xe | End point 14
35710  * ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT15 | 0xf | End point 15
35711  *
35712  * Field Access Macros:
35713  *
35714  */
35715 /*
35716  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35717  *
35718  * End point 0
35719  */
35720 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT0 0x0
35721 /*
35722  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35723  *
35724  * End point 1
35725  */
35726 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT1 0x1
35727 /*
35728  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35729  *
35730  * End point 2
35731  */
35732 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT2 0x2
35733 /*
35734  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35735  *
35736  * End point 3
35737  */
35738 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT3 0x3
35739 /*
35740  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35741  *
35742  * End point 4
35743  */
35744 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT4 0x4
35745 /*
35746  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35747  *
35748  * End point 5
35749  */
35750 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT5 0x5
35751 /*
35752  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35753  *
35754  * End point 6
35755  */
35756 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT6 0x6
35757 /*
35758  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35759  *
35760  * End point 7
35761  */
35762 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT7 0x7
35763 /*
35764  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35765  *
35766  * End point 8
35767  */
35768 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT8 0x8
35769 /*
35770  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35771  *
35772  * End point 9
35773  */
35774 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT9 0x9
35775 /*
35776  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35777  *
35778  * End point 10
35779  */
35780 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT10 0xa
35781 /*
35782  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35783  *
35784  * End point 11
35785  */
35786 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT11 0xb
35787 /*
35788  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35789  *
35790  * End point 12
35791  */
35792 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT12 0xc
35793 /*
35794  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35795  *
35796  * End point 13
35797  */
35798 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT13 0xd
35799 /*
35800  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35801  *
35802  * End point 14
35803  */
35804 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT14 0xe
35805 /*
35806  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPNUM
35807  *
35808  * End point 15
35809  */
35810 #define ALT_USB_HOST_HCCHAR10_EPNUM_E_ENDPT15 0xf
35811 
35812 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR10_EPNUM register field. */
35813 #define ALT_USB_HOST_HCCHAR10_EPNUM_LSB 11
35814 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR10_EPNUM register field. */
35815 #define ALT_USB_HOST_HCCHAR10_EPNUM_MSB 14
35816 /* The width in bits of the ALT_USB_HOST_HCCHAR10_EPNUM register field. */
35817 #define ALT_USB_HOST_HCCHAR10_EPNUM_WIDTH 4
35818 /* The mask used to set the ALT_USB_HOST_HCCHAR10_EPNUM register field value. */
35819 #define ALT_USB_HOST_HCCHAR10_EPNUM_SET_MSK 0x00007800
35820 /* The mask used to clear the ALT_USB_HOST_HCCHAR10_EPNUM register field value. */
35821 #define ALT_USB_HOST_HCCHAR10_EPNUM_CLR_MSK 0xffff87ff
35822 /* The reset value of the ALT_USB_HOST_HCCHAR10_EPNUM register field. */
35823 #define ALT_USB_HOST_HCCHAR10_EPNUM_RESET 0x0
35824 /* Extracts the ALT_USB_HOST_HCCHAR10_EPNUM field value from a register. */
35825 #define ALT_USB_HOST_HCCHAR10_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
35826 /* Produces a ALT_USB_HOST_HCCHAR10_EPNUM register field value suitable for setting the register. */
35827 #define ALT_USB_HOST_HCCHAR10_EPNUM_SET(value) (((value) << 11) & 0x00007800)
35828 
35829 /*
35830  * Field : Endpoint Direction - epdir
35831  *
35832  * Indicates whether the transaction is IN or OUT.
35833  *
35834  * Field Enumeration Values:
35835  *
35836  * Enum | Value | Description
35837  * :----------------------------------|:------|:--------------
35838  * ALT_USB_HOST_HCCHAR10_EPDIR_E_OUT | 0x0 | OUT Direction
35839  * ALT_USB_HOST_HCCHAR10_EPDIR_E_IN | 0x1 | IN Direction
35840  *
35841  * Field Access Macros:
35842  *
35843  */
35844 /*
35845  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPDIR
35846  *
35847  * OUT Direction
35848  */
35849 #define ALT_USB_HOST_HCCHAR10_EPDIR_E_OUT 0x0
35850 /*
35851  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPDIR
35852  *
35853  * IN Direction
35854  */
35855 #define ALT_USB_HOST_HCCHAR10_EPDIR_E_IN 0x1
35856 
35857 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR10_EPDIR register field. */
35858 #define ALT_USB_HOST_HCCHAR10_EPDIR_LSB 15
35859 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR10_EPDIR register field. */
35860 #define ALT_USB_HOST_HCCHAR10_EPDIR_MSB 15
35861 /* The width in bits of the ALT_USB_HOST_HCCHAR10_EPDIR register field. */
35862 #define ALT_USB_HOST_HCCHAR10_EPDIR_WIDTH 1
35863 /* The mask used to set the ALT_USB_HOST_HCCHAR10_EPDIR register field value. */
35864 #define ALT_USB_HOST_HCCHAR10_EPDIR_SET_MSK 0x00008000
35865 /* The mask used to clear the ALT_USB_HOST_HCCHAR10_EPDIR register field value. */
35866 #define ALT_USB_HOST_HCCHAR10_EPDIR_CLR_MSK 0xffff7fff
35867 /* The reset value of the ALT_USB_HOST_HCCHAR10_EPDIR register field. */
35868 #define ALT_USB_HOST_HCCHAR10_EPDIR_RESET 0x0
35869 /* Extracts the ALT_USB_HOST_HCCHAR10_EPDIR field value from a register. */
35870 #define ALT_USB_HOST_HCCHAR10_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
35871 /* Produces a ALT_USB_HOST_HCCHAR10_EPDIR register field value suitable for setting the register. */
35872 #define ALT_USB_HOST_HCCHAR10_EPDIR_SET(value) (((value) << 15) & 0x00008000)
35873 
35874 /*
35875  * Field : Low-Speed Device - lspddev
35876  *
35877  * This field is set by the application to indicate that this channel is
35878  * communicating to a low-speed device. The application must program this bit when
35879  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
35880  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
35881  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
35882  * core ignores this bit even if it is set by the application software
35883  *
35884  * Field Enumeration Values:
35885  *
35886  * Enum | Value | Description
35887  * :-------------------------------------|:------|:----------------------------------------
35888  * ALT_USB_HOST_HCCHAR10_LSPDDEV_E_DISD | 0x0 | Not Communicating with low speed device
35889  * ALT_USB_HOST_HCCHAR10_LSPDDEV_E_END | 0x1 | Communicating with low speed device
35890  *
35891  * Field Access Macros:
35892  *
35893  */
35894 /*
35895  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_LSPDDEV
35896  *
35897  * Not Communicating with low speed device
35898  */
35899 #define ALT_USB_HOST_HCCHAR10_LSPDDEV_E_DISD 0x0
35900 /*
35901  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_LSPDDEV
35902  *
35903  * Communicating with low speed device
35904  */
35905 #define ALT_USB_HOST_HCCHAR10_LSPDDEV_E_END 0x1
35906 
35907 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR10_LSPDDEV register field. */
35908 #define ALT_USB_HOST_HCCHAR10_LSPDDEV_LSB 17
35909 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR10_LSPDDEV register field. */
35910 #define ALT_USB_HOST_HCCHAR10_LSPDDEV_MSB 17
35911 /* The width in bits of the ALT_USB_HOST_HCCHAR10_LSPDDEV register field. */
35912 #define ALT_USB_HOST_HCCHAR10_LSPDDEV_WIDTH 1
35913 /* The mask used to set the ALT_USB_HOST_HCCHAR10_LSPDDEV register field value. */
35914 #define ALT_USB_HOST_HCCHAR10_LSPDDEV_SET_MSK 0x00020000
35915 /* The mask used to clear the ALT_USB_HOST_HCCHAR10_LSPDDEV register field value. */
35916 #define ALT_USB_HOST_HCCHAR10_LSPDDEV_CLR_MSK 0xfffdffff
35917 /* The reset value of the ALT_USB_HOST_HCCHAR10_LSPDDEV register field. */
35918 #define ALT_USB_HOST_HCCHAR10_LSPDDEV_RESET 0x0
35919 /* Extracts the ALT_USB_HOST_HCCHAR10_LSPDDEV field value from a register. */
35920 #define ALT_USB_HOST_HCCHAR10_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
35921 /* Produces a ALT_USB_HOST_HCCHAR10_LSPDDEV register field value suitable for setting the register. */
35922 #define ALT_USB_HOST_HCCHAR10_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
35923 
35924 /*
35925  * Field : Endpoint Type - eptype
35926  *
35927  * Indicates the transfer type selected.
35928  *
35929  * Field Enumeration Values:
35930  *
35931  * Enum | Value | Description
35932  * :--------------------------------------|:------|:------------
35933  * ALT_USB_HOST_HCCHAR10_EPTYPE_E_CTL | 0x0 | Control
35934  * ALT_USB_HOST_HCCHAR10_EPTYPE_E_ISOC | 0x1 | Isochronous
35935  * ALT_USB_HOST_HCCHAR10_EPTYPE_E_BULK | 0x2 | Bulk
35936  * ALT_USB_HOST_HCCHAR10_EPTYPE_E_INTERR | 0x3 | Interrupt
35937  *
35938  * Field Access Macros:
35939  *
35940  */
35941 /*
35942  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPTYPE
35943  *
35944  * Control
35945  */
35946 #define ALT_USB_HOST_HCCHAR10_EPTYPE_E_CTL 0x0
35947 /*
35948  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPTYPE
35949  *
35950  * Isochronous
35951  */
35952 #define ALT_USB_HOST_HCCHAR10_EPTYPE_E_ISOC 0x1
35953 /*
35954  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPTYPE
35955  *
35956  * Bulk
35957  */
35958 #define ALT_USB_HOST_HCCHAR10_EPTYPE_E_BULK 0x2
35959 /*
35960  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EPTYPE
35961  *
35962  * Interrupt
35963  */
35964 #define ALT_USB_HOST_HCCHAR10_EPTYPE_E_INTERR 0x3
35965 
35966 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR10_EPTYPE register field. */
35967 #define ALT_USB_HOST_HCCHAR10_EPTYPE_LSB 18
35968 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR10_EPTYPE register field. */
35969 #define ALT_USB_HOST_HCCHAR10_EPTYPE_MSB 19
35970 /* The width in bits of the ALT_USB_HOST_HCCHAR10_EPTYPE register field. */
35971 #define ALT_USB_HOST_HCCHAR10_EPTYPE_WIDTH 2
35972 /* The mask used to set the ALT_USB_HOST_HCCHAR10_EPTYPE register field value. */
35973 #define ALT_USB_HOST_HCCHAR10_EPTYPE_SET_MSK 0x000c0000
35974 /* The mask used to clear the ALT_USB_HOST_HCCHAR10_EPTYPE register field value. */
35975 #define ALT_USB_HOST_HCCHAR10_EPTYPE_CLR_MSK 0xfff3ffff
35976 /* The reset value of the ALT_USB_HOST_HCCHAR10_EPTYPE register field. */
35977 #define ALT_USB_HOST_HCCHAR10_EPTYPE_RESET 0x0
35978 /* Extracts the ALT_USB_HOST_HCCHAR10_EPTYPE field value from a register. */
35979 #define ALT_USB_HOST_HCCHAR10_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
35980 /* Produces a ALT_USB_HOST_HCCHAR10_EPTYPE register field value suitable for setting the register. */
35981 #define ALT_USB_HOST_HCCHAR10_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
35982 
35983 /*
35984  * Field : Multi Count - ec
35985  *
35986  * When the Split Enable bit of the Host Channel-n Split Control register
35987  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
35988  * transactions that must be executed per microframe for this periodic endpoint.
35989  * for non periodic transfers, this field is used only in DMA mode, and specifies
35990  * the number packets to be fetched for this channel before the internal DMA engine
35991  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
35992  * number of immediate retries to be performed for a periodic split transactions on
35993  * transaction errors. This field must be set to at least 1.
35994  *
35995  * Field Enumeration Values:
35996  *
35997  * Enum | Value | Description
35998  * :--------------------------------------|:------|:----------------------------------------------
35999  * ALT_USB_HOST_HCCHAR10_EC_E_RSVD | 0x0 | Reserved This field yields undefined result
36000  * ALT_USB_HOST_HCCHAR10_EC_E_TRANSONE | 0x1 | 1 transaction
36001  * ALT_USB_HOST_HCCHAR10_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
36002  * : | | per microframe
36003  * ALT_USB_HOST_HCCHAR10_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
36004  * : | | per microframe
36005  *
36006  * Field Access Macros:
36007  *
36008  */
36009 /*
36010  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EC
36011  *
36012  * Reserved This field yields undefined result
36013  */
36014 #define ALT_USB_HOST_HCCHAR10_EC_E_RSVD 0x0
36015 /*
36016  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EC
36017  *
36018  * 1 transaction
36019  */
36020 #define ALT_USB_HOST_HCCHAR10_EC_E_TRANSONE 0x1
36021 /*
36022  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EC
36023  *
36024  * 2 transactions to be issued for this endpoint per microframe
36025  */
36026 #define ALT_USB_HOST_HCCHAR10_EC_E_TRANSTWO 0x2
36027 /*
36028  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_EC
36029  *
36030  * 3 transactions to be issued for this endpoint per microframe
36031  */
36032 #define ALT_USB_HOST_HCCHAR10_EC_E_TRANSTHREE 0x3
36033 
36034 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR10_EC register field. */
36035 #define ALT_USB_HOST_HCCHAR10_EC_LSB 20
36036 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR10_EC register field. */
36037 #define ALT_USB_HOST_HCCHAR10_EC_MSB 21
36038 /* The width in bits of the ALT_USB_HOST_HCCHAR10_EC register field. */
36039 #define ALT_USB_HOST_HCCHAR10_EC_WIDTH 2
36040 /* The mask used to set the ALT_USB_HOST_HCCHAR10_EC register field value. */
36041 #define ALT_USB_HOST_HCCHAR10_EC_SET_MSK 0x00300000
36042 /* The mask used to clear the ALT_USB_HOST_HCCHAR10_EC register field value. */
36043 #define ALT_USB_HOST_HCCHAR10_EC_CLR_MSK 0xffcfffff
36044 /* The reset value of the ALT_USB_HOST_HCCHAR10_EC register field. */
36045 #define ALT_USB_HOST_HCCHAR10_EC_RESET 0x0
36046 /* Extracts the ALT_USB_HOST_HCCHAR10_EC field value from a register. */
36047 #define ALT_USB_HOST_HCCHAR10_EC_GET(value) (((value) & 0x00300000) >> 20)
36048 /* Produces a ALT_USB_HOST_HCCHAR10_EC register field value suitable for setting the register. */
36049 #define ALT_USB_HOST_HCCHAR10_EC_SET(value) (((value) << 20) & 0x00300000)
36050 
36051 /*
36052  * Field : Device Address - devaddr
36053  *
36054  * This field selects the specific device serving as the data source or sink.
36055  *
36056  * Field Access Macros:
36057  *
36058  */
36059 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR10_DEVADDR register field. */
36060 #define ALT_USB_HOST_HCCHAR10_DEVADDR_LSB 22
36061 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR10_DEVADDR register field. */
36062 #define ALT_USB_HOST_HCCHAR10_DEVADDR_MSB 28
36063 /* The width in bits of the ALT_USB_HOST_HCCHAR10_DEVADDR register field. */
36064 #define ALT_USB_HOST_HCCHAR10_DEVADDR_WIDTH 7
36065 /* The mask used to set the ALT_USB_HOST_HCCHAR10_DEVADDR register field value. */
36066 #define ALT_USB_HOST_HCCHAR10_DEVADDR_SET_MSK 0x1fc00000
36067 /* The mask used to clear the ALT_USB_HOST_HCCHAR10_DEVADDR register field value. */
36068 #define ALT_USB_HOST_HCCHAR10_DEVADDR_CLR_MSK 0xe03fffff
36069 /* The reset value of the ALT_USB_HOST_HCCHAR10_DEVADDR register field. */
36070 #define ALT_USB_HOST_HCCHAR10_DEVADDR_RESET 0x0
36071 /* Extracts the ALT_USB_HOST_HCCHAR10_DEVADDR field value from a register. */
36072 #define ALT_USB_HOST_HCCHAR10_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
36073 /* Produces a ALT_USB_HOST_HCCHAR10_DEVADDR register field value suitable for setting the register. */
36074 #define ALT_USB_HOST_HCCHAR10_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
36075 
36076 /*
36077  * Field : Channel Disable - chdis
36078  *
36079  * The application sets this bit to stop transmitting/receiving data on a channel,
36080  * even before the transfer for that channel is complete. The application must wait
36081  * for the Channel Disabled interrupt before treating the channel as disabled.
36082  *
36083  * Field Enumeration Values:
36084  *
36085  * Enum | Value | Description
36086  * :------------------------------------|:------|:----------------------------
36087  * ALT_USB_HOST_HCCHAR10_CHDIS_E_INACT | 0x0 | Transmit/Recieve normal
36088  * ALT_USB_HOST_HCCHAR10_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving
36089  *
36090  * Field Access Macros:
36091  *
36092  */
36093 /*
36094  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_CHDIS
36095  *
36096  * Transmit/Recieve normal
36097  */
36098 #define ALT_USB_HOST_HCCHAR10_CHDIS_E_INACT 0x0
36099 /*
36100  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_CHDIS
36101  *
36102  * Stop transmitting/receiving
36103  */
36104 #define ALT_USB_HOST_HCCHAR10_CHDIS_E_ACT 0x1
36105 
36106 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR10_CHDIS register field. */
36107 #define ALT_USB_HOST_HCCHAR10_CHDIS_LSB 30
36108 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR10_CHDIS register field. */
36109 #define ALT_USB_HOST_HCCHAR10_CHDIS_MSB 30
36110 /* The width in bits of the ALT_USB_HOST_HCCHAR10_CHDIS register field. */
36111 #define ALT_USB_HOST_HCCHAR10_CHDIS_WIDTH 1
36112 /* The mask used to set the ALT_USB_HOST_HCCHAR10_CHDIS register field value. */
36113 #define ALT_USB_HOST_HCCHAR10_CHDIS_SET_MSK 0x40000000
36114 /* The mask used to clear the ALT_USB_HOST_HCCHAR10_CHDIS register field value. */
36115 #define ALT_USB_HOST_HCCHAR10_CHDIS_CLR_MSK 0xbfffffff
36116 /* The reset value of the ALT_USB_HOST_HCCHAR10_CHDIS register field. */
36117 #define ALT_USB_HOST_HCCHAR10_CHDIS_RESET 0x0
36118 /* Extracts the ALT_USB_HOST_HCCHAR10_CHDIS field value from a register. */
36119 #define ALT_USB_HOST_HCCHAR10_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
36120 /* Produces a ALT_USB_HOST_HCCHAR10_CHDIS register field value suitable for setting the register. */
36121 #define ALT_USB_HOST_HCCHAR10_CHDIS_SET(value) (((value) << 30) & 0x40000000)
36122 
36123 /*
36124  * Field : Channel Enable - chena
36125  *
36126  * When Scatter/Gather mode is disabled This field is set by the application and
36127  * cleared by the OTG host.
36128  *
36129  * 0: Channel disabled
36130  *
36131  * 1: Channel enabled
36132  *
36133  * When Scatter/Gather mode is enabled.
36134  *
36135  * Field Enumeration Values:
36136  *
36137  * Enum | Value | Description
36138  * :------------------------------------|:------|:-------------------------------------------------
36139  * ALT_USB_HOST_HCCHAR10_CHENA_E_INACT | 0x0 | Indicates that the descriptor structure is not
36140  * : | | yet ready
36141  * ALT_USB_HOST_HCCHAR10_CHENA_E_ACT | 0x1 | Indicates that the descriptor structure and
36142  * : | | data buffer with data is setup and this
36143  * : | | channel can access the descriptor
36144  *
36145  * Field Access Macros:
36146  *
36147  */
36148 /*
36149  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_CHENA
36150  *
36151  * Indicates that the descriptor structure is not yet ready
36152  */
36153 #define ALT_USB_HOST_HCCHAR10_CHENA_E_INACT 0x0
36154 /*
36155  * Enumerated value for register field ALT_USB_HOST_HCCHAR10_CHENA
36156  *
36157  * Indicates that the descriptor structure and data buffer with data is
36158  * setup and this channel can access the descriptor
36159  */
36160 #define ALT_USB_HOST_HCCHAR10_CHENA_E_ACT 0x1
36161 
36162 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR10_CHENA register field. */
36163 #define ALT_USB_HOST_HCCHAR10_CHENA_LSB 31
36164 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR10_CHENA register field. */
36165 #define ALT_USB_HOST_HCCHAR10_CHENA_MSB 31
36166 /* The width in bits of the ALT_USB_HOST_HCCHAR10_CHENA register field. */
36167 #define ALT_USB_HOST_HCCHAR10_CHENA_WIDTH 1
36168 /* The mask used to set the ALT_USB_HOST_HCCHAR10_CHENA register field value. */
36169 #define ALT_USB_HOST_HCCHAR10_CHENA_SET_MSK 0x80000000
36170 /* The mask used to clear the ALT_USB_HOST_HCCHAR10_CHENA register field value. */
36171 #define ALT_USB_HOST_HCCHAR10_CHENA_CLR_MSK 0x7fffffff
36172 /* The reset value of the ALT_USB_HOST_HCCHAR10_CHENA register field. */
36173 #define ALT_USB_HOST_HCCHAR10_CHENA_RESET 0x0
36174 /* Extracts the ALT_USB_HOST_HCCHAR10_CHENA field value from a register. */
36175 #define ALT_USB_HOST_HCCHAR10_CHENA_GET(value) (((value) & 0x80000000) >> 31)
36176 /* Produces a ALT_USB_HOST_HCCHAR10_CHENA register field value suitable for setting the register. */
36177 #define ALT_USB_HOST_HCCHAR10_CHENA_SET(value) (((value) << 31) & 0x80000000)
36178 
36179 #ifndef __ASSEMBLY__
36180 /*
36181  * WARNING: The C register and register group struct declarations are provided for
36182  * convenience and illustrative purposes. They should, however, be used with
36183  * caution as the C language standard provides no guarantees about the alignment or
36184  * atomicity of device memory accesses. The recommended practice for writing
36185  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
36186  * alt_write_word() functions.
36187  *
36188  * The struct declaration for register ALT_USB_HOST_HCCHAR10.
36189  */
36190 struct ALT_USB_HOST_HCCHAR10_s
36191 {
36192  uint32_t mps : 11; /* Maximum Packet Size */
36193  uint32_t epnum : 4; /* Endpoint Number */
36194  uint32_t epdir : 1; /* Endpoint Direction */
36195  uint32_t : 1; /* *UNDEFINED* */
36196  uint32_t lspddev : 1; /* Low-Speed Device */
36197  uint32_t eptype : 2; /* Endpoint Type */
36198  uint32_t ec : 2; /* Multi Count */
36199  uint32_t devaddr : 7; /* Device Address */
36200  uint32_t : 1; /* *UNDEFINED* */
36201  const uint32_t chdis : 1; /* Channel Disable */
36202  const uint32_t chena : 1; /* Channel Enable */
36203 };
36204 
36205 /* The typedef declaration for register ALT_USB_HOST_HCCHAR10. */
36206 typedef volatile struct ALT_USB_HOST_HCCHAR10_s ALT_USB_HOST_HCCHAR10_t;
36207 #endif /* __ASSEMBLY__ */
36208 
36209 /* The byte offset of the ALT_USB_HOST_HCCHAR10 register from the beginning of the component. */
36210 #define ALT_USB_HOST_HCCHAR10_OFST 0x240
36211 /* The address of the ALT_USB_HOST_HCCHAR10 register. */
36212 #define ALT_USB_HOST_HCCHAR10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR10_OFST))
36213 
36214 /*
36215  * Register : Host Channel 10 Split Control Register - hcsplt10
36216  *
36217  * Channel_number 1
36218  *
36219  * Register Layout
36220  *
36221  * Bits | Access | Reset | Description
36222  * :--------|:-------|:------|:---------------------
36223  * [6:0] | RW | 0x0 | Port Address
36224  * [13:7] | RW | 0x0 | Hub Address
36225  * [15:14] | RW | 0x0 | Transaction Position
36226  * [16] | RW | 0x0 | Do Complete Split
36227  * [30:17] | ??? | 0x0 | *UNDEFINED*
36228  * [31] | RW | 0x0 | Split Enable
36229  *
36230  */
36231 /*
36232  * Field : Port Address - prtaddr
36233  *
36234  * This field is the port number of the recipient transactiontranslator.
36235  *
36236  * Field Access Macros:
36237  *
36238  */
36239 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT10_PRTADDR register field. */
36240 #define ALT_USB_HOST_HCSPLT10_PRTADDR_LSB 0
36241 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT10_PRTADDR register field. */
36242 #define ALT_USB_HOST_HCSPLT10_PRTADDR_MSB 6
36243 /* The width in bits of the ALT_USB_HOST_HCSPLT10_PRTADDR register field. */
36244 #define ALT_USB_HOST_HCSPLT10_PRTADDR_WIDTH 7
36245 /* The mask used to set the ALT_USB_HOST_HCSPLT10_PRTADDR register field value. */
36246 #define ALT_USB_HOST_HCSPLT10_PRTADDR_SET_MSK 0x0000007f
36247 /* The mask used to clear the ALT_USB_HOST_HCSPLT10_PRTADDR register field value. */
36248 #define ALT_USB_HOST_HCSPLT10_PRTADDR_CLR_MSK 0xffffff80
36249 /* The reset value of the ALT_USB_HOST_HCSPLT10_PRTADDR register field. */
36250 #define ALT_USB_HOST_HCSPLT10_PRTADDR_RESET 0x0
36251 /* Extracts the ALT_USB_HOST_HCSPLT10_PRTADDR field value from a register. */
36252 #define ALT_USB_HOST_HCSPLT10_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
36253 /* Produces a ALT_USB_HOST_HCSPLT10_PRTADDR register field value suitable for setting the register. */
36254 #define ALT_USB_HOST_HCSPLT10_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
36255 
36256 /*
36257  * Field : Hub Address - hubaddr
36258  *
36259  * This field holds the device address of the transaction translator's hub.
36260  *
36261  * Field Access Macros:
36262  *
36263  */
36264 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT10_HUBADDR register field. */
36265 #define ALT_USB_HOST_HCSPLT10_HUBADDR_LSB 7
36266 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT10_HUBADDR register field. */
36267 #define ALT_USB_HOST_HCSPLT10_HUBADDR_MSB 13
36268 /* The width in bits of the ALT_USB_HOST_HCSPLT10_HUBADDR register field. */
36269 #define ALT_USB_HOST_HCSPLT10_HUBADDR_WIDTH 7
36270 /* The mask used to set the ALT_USB_HOST_HCSPLT10_HUBADDR register field value. */
36271 #define ALT_USB_HOST_HCSPLT10_HUBADDR_SET_MSK 0x00003f80
36272 /* The mask used to clear the ALT_USB_HOST_HCSPLT10_HUBADDR register field value. */
36273 #define ALT_USB_HOST_HCSPLT10_HUBADDR_CLR_MSK 0xffffc07f
36274 /* The reset value of the ALT_USB_HOST_HCSPLT10_HUBADDR register field. */
36275 #define ALT_USB_HOST_HCSPLT10_HUBADDR_RESET 0x0
36276 /* Extracts the ALT_USB_HOST_HCSPLT10_HUBADDR field value from a register. */
36277 #define ALT_USB_HOST_HCSPLT10_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
36278 /* Produces a ALT_USB_HOST_HCSPLT10_HUBADDR register field value suitable for setting the register. */
36279 #define ALT_USB_HOST_HCSPLT10_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
36280 
36281 /*
36282  * Field : Transaction Position - xactpos
36283  *
36284  * This field is used to determine whether to send all, first, middle, or last
36285  * payloads with each OUT transaction.
36286  *
36287  * Field Enumeration Values:
36288  *
36289  * Enum | Value | Description
36290  * :---------------------------------------|:------|:------------------------------------------------
36291  * ALT_USB_HOST_HCSPLT10_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
36292  * : | | transaction (which is larger than 188 bytes)
36293  * ALT_USB_HOST_HCSPLT10_XACTPOS_E_END | 0x1 | End. This is the last payload of this
36294  * : | | transaction (which is larger than 188 bytes)
36295  * ALT_USB_HOST_HCSPLT10_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
36296  * : | | transaction (which is larger than 188 bytes)
36297  * ALT_USB_HOST_HCSPLT10_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
36298  * : | | transaction (which is less than or equal to 188
36299  * : | | bytes)
36300  *
36301  * Field Access Macros:
36302  *
36303  */
36304 /*
36305  * Enumerated value for register field ALT_USB_HOST_HCSPLT10_XACTPOS
36306  *
36307  * Mid. This is the middle payload of this transaction (which is larger than 188
36308  * bytes)
36309  */
36310 #define ALT_USB_HOST_HCSPLT10_XACTPOS_E_MIDDLE 0x0
36311 /*
36312  * Enumerated value for register field ALT_USB_HOST_HCSPLT10_XACTPOS
36313  *
36314  * End. This is the last payload of this transaction (which is larger than 188
36315  * bytes)
36316  */
36317 #define ALT_USB_HOST_HCSPLT10_XACTPOS_E_END 0x1
36318 /*
36319  * Enumerated value for register field ALT_USB_HOST_HCSPLT10_XACTPOS
36320  *
36321  * Begin. This is the first data payload of this transaction (which is larger than
36322  * 188 bytes)
36323  */
36324 #define ALT_USB_HOST_HCSPLT10_XACTPOS_E_BEGIN 0x2
36325 /*
36326  * Enumerated value for register field ALT_USB_HOST_HCSPLT10_XACTPOS
36327  *
36328  * All. This is the entire data payload is of this transaction (which is less than
36329  * or equal to 188 bytes)
36330  */
36331 #define ALT_USB_HOST_HCSPLT10_XACTPOS_E_ALL 0x3
36332 
36333 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT10_XACTPOS register field. */
36334 #define ALT_USB_HOST_HCSPLT10_XACTPOS_LSB 14
36335 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT10_XACTPOS register field. */
36336 #define ALT_USB_HOST_HCSPLT10_XACTPOS_MSB 15
36337 /* The width in bits of the ALT_USB_HOST_HCSPLT10_XACTPOS register field. */
36338 #define ALT_USB_HOST_HCSPLT10_XACTPOS_WIDTH 2
36339 /* The mask used to set the ALT_USB_HOST_HCSPLT10_XACTPOS register field value. */
36340 #define ALT_USB_HOST_HCSPLT10_XACTPOS_SET_MSK 0x0000c000
36341 /* The mask used to clear the ALT_USB_HOST_HCSPLT10_XACTPOS register field value. */
36342 #define ALT_USB_HOST_HCSPLT10_XACTPOS_CLR_MSK 0xffff3fff
36343 /* The reset value of the ALT_USB_HOST_HCSPLT10_XACTPOS register field. */
36344 #define ALT_USB_HOST_HCSPLT10_XACTPOS_RESET 0x0
36345 /* Extracts the ALT_USB_HOST_HCSPLT10_XACTPOS field value from a register. */
36346 #define ALT_USB_HOST_HCSPLT10_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
36347 /* Produces a ALT_USB_HOST_HCSPLT10_XACTPOS register field value suitable for setting the register. */
36348 #define ALT_USB_HOST_HCSPLT10_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
36349 
36350 /*
36351  * Field : Do Complete Split - compsplt
36352  *
36353  * The application sets this field to request the OTG host to perform a complete
36354  * split transaction.
36355  *
36356  * Field Enumeration Values:
36357  *
36358  * Enum | Value | Description
36359  * :-----------------------------------------|:------|:---------------------
36360  * ALT_USB_HOST_HCSPLT10_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
36361  * ALT_USB_HOST_HCSPLT10_COMPSPLT_E_SPLIT | 0x1 | Split transaction
36362  *
36363  * Field Access Macros:
36364  *
36365  */
36366 /*
36367  * Enumerated value for register field ALT_USB_HOST_HCSPLT10_COMPSPLT
36368  *
36369  * No split transaction
36370  */
36371 #define ALT_USB_HOST_HCSPLT10_COMPSPLT_E_NOSPLIT 0x0
36372 /*
36373  * Enumerated value for register field ALT_USB_HOST_HCSPLT10_COMPSPLT
36374  *
36375  * Split transaction
36376  */
36377 #define ALT_USB_HOST_HCSPLT10_COMPSPLT_E_SPLIT 0x1
36378 
36379 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT10_COMPSPLT register field. */
36380 #define ALT_USB_HOST_HCSPLT10_COMPSPLT_LSB 16
36381 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT10_COMPSPLT register field. */
36382 #define ALT_USB_HOST_HCSPLT10_COMPSPLT_MSB 16
36383 /* The width in bits of the ALT_USB_HOST_HCSPLT10_COMPSPLT register field. */
36384 #define ALT_USB_HOST_HCSPLT10_COMPSPLT_WIDTH 1
36385 /* The mask used to set the ALT_USB_HOST_HCSPLT10_COMPSPLT register field value. */
36386 #define ALT_USB_HOST_HCSPLT10_COMPSPLT_SET_MSK 0x00010000
36387 /* The mask used to clear the ALT_USB_HOST_HCSPLT10_COMPSPLT register field value. */
36388 #define ALT_USB_HOST_HCSPLT10_COMPSPLT_CLR_MSK 0xfffeffff
36389 /* The reset value of the ALT_USB_HOST_HCSPLT10_COMPSPLT register field. */
36390 #define ALT_USB_HOST_HCSPLT10_COMPSPLT_RESET 0x0
36391 /* Extracts the ALT_USB_HOST_HCSPLT10_COMPSPLT field value from a register. */
36392 #define ALT_USB_HOST_HCSPLT10_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
36393 /* Produces a ALT_USB_HOST_HCSPLT10_COMPSPLT register field value suitable for setting the register. */
36394 #define ALT_USB_HOST_HCSPLT10_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
36395 
36396 /*
36397  * Field : Split Enable - spltena
36398  *
36399  * The application sets this field to indicate that this channel is enabled to
36400  * perform split transactions.
36401  *
36402  * Field Enumeration Values:
36403  *
36404  * Enum | Value | Description
36405  * :-------------------------------------|:------|:------------------
36406  * ALT_USB_HOST_HCSPLT10_SPLTENA_E_DISD | 0x0 | Split not enabled
36407  * ALT_USB_HOST_HCSPLT10_SPLTENA_E_END | 0x1 | Split enabled
36408  *
36409  * Field Access Macros:
36410  *
36411  */
36412 /*
36413  * Enumerated value for register field ALT_USB_HOST_HCSPLT10_SPLTENA
36414  *
36415  * Split not enabled
36416  */
36417 #define ALT_USB_HOST_HCSPLT10_SPLTENA_E_DISD 0x0
36418 /*
36419  * Enumerated value for register field ALT_USB_HOST_HCSPLT10_SPLTENA
36420  *
36421  * Split enabled
36422  */
36423 #define ALT_USB_HOST_HCSPLT10_SPLTENA_E_END 0x1
36424 
36425 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT10_SPLTENA register field. */
36426 #define ALT_USB_HOST_HCSPLT10_SPLTENA_LSB 31
36427 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT10_SPLTENA register field. */
36428 #define ALT_USB_HOST_HCSPLT10_SPLTENA_MSB 31
36429 /* The width in bits of the ALT_USB_HOST_HCSPLT10_SPLTENA register field. */
36430 #define ALT_USB_HOST_HCSPLT10_SPLTENA_WIDTH 1
36431 /* The mask used to set the ALT_USB_HOST_HCSPLT10_SPLTENA register field value. */
36432 #define ALT_USB_HOST_HCSPLT10_SPLTENA_SET_MSK 0x80000000
36433 /* The mask used to clear the ALT_USB_HOST_HCSPLT10_SPLTENA register field value. */
36434 #define ALT_USB_HOST_HCSPLT10_SPLTENA_CLR_MSK 0x7fffffff
36435 /* The reset value of the ALT_USB_HOST_HCSPLT10_SPLTENA register field. */
36436 #define ALT_USB_HOST_HCSPLT10_SPLTENA_RESET 0x0
36437 /* Extracts the ALT_USB_HOST_HCSPLT10_SPLTENA field value from a register. */
36438 #define ALT_USB_HOST_HCSPLT10_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
36439 /* Produces a ALT_USB_HOST_HCSPLT10_SPLTENA register field value suitable for setting the register. */
36440 #define ALT_USB_HOST_HCSPLT10_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
36441 
36442 #ifndef __ASSEMBLY__
36443 /*
36444  * WARNING: The C register and register group struct declarations are provided for
36445  * convenience and illustrative purposes. They should, however, be used with
36446  * caution as the C language standard provides no guarantees about the alignment or
36447  * atomicity of device memory accesses. The recommended practice for writing
36448  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
36449  * alt_write_word() functions.
36450  *
36451  * The struct declaration for register ALT_USB_HOST_HCSPLT10.
36452  */
36453 struct ALT_USB_HOST_HCSPLT10_s
36454 {
36455  uint32_t prtaddr : 7; /* Port Address */
36456  uint32_t hubaddr : 7; /* Hub Address */
36457  uint32_t xactpos : 2; /* Transaction Position */
36458  uint32_t compsplt : 1; /* Do Complete Split */
36459  uint32_t : 14; /* *UNDEFINED* */
36460  uint32_t spltena : 1; /* Split Enable */
36461 };
36462 
36463 /* The typedef declaration for register ALT_USB_HOST_HCSPLT10. */
36464 typedef volatile struct ALT_USB_HOST_HCSPLT10_s ALT_USB_HOST_HCSPLT10_t;
36465 #endif /* __ASSEMBLY__ */
36466 
36467 /* The byte offset of the ALT_USB_HOST_HCSPLT10 register from the beginning of the component. */
36468 #define ALT_USB_HOST_HCSPLT10_OFST 0x244
36469 /* The address of the ALT_USB_HOST_HCSPLT10 register. */
36470 #define ALT_USB_HOST_HCSPLT10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT10_OFST))
36471 
36472 /*
36473  * Register : Host Channel 10 Interrupt Register - hcint10
36474  *
36475  * This register indicates the status of a channel with respect to USB- and AHB-
36476  * related events. The application must read this register when the Host Channels
36477  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
36478  * application can read this register, it must first read the Host All Channels
36479  * Interrupt (HAINT) register to get the exact channel number for the Host
36480  * Channel-n Interrupt register. The application must clear the appropriate bit in
36481  * this register to clear the corresponding bits in the HAINT and GINTSTS
36482  * registers.
36483  *
36484  * Register Layout
36485  *
36486  * Bits | Access | Reset | Description
36487  * :--------|:-------|:------|:--------------------------------------------
36488  * [0] | R | 0x0 | Transfer Completed
36489  * [1] | R | 0x0 | Channel Halted
36490  * [2] | R | 0x0 | AHB Error
36491  * [3] | R | 0x0 | STALL Response Received Interrupt
36492  * [4] | R | 0x0 | NAK Response Received Interrupt
36493  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
36494  * [6] | R | 0x0 | NYET Response Received Interrupt
36495  * [7] | R | 0x0 | Transaction Error
36496  * [8] | R | 0x0 | Babble Error
36497  * [9] | R | 0x0 | Frame Overrun
36498  * [10] | R | 0x0 | Data Toggle Error
36499  * [11] | R | 0x0 | BNA Interrupt
36500  * [12] | R | 0x0 | Excessive Transaction Error
36501  * [13] | R | 0x0 | Descriptor rollover interrupt
36502  * [31:14] | ??? | 0x0 | *UNDEFINED*
36503  *
36504  */
36505 /*
36506  * Field : Transfer Completed - xfercompl
36507  *
36508  * Transfer completed normally without any errors. This bit can be set only by the
36509  * core and the application should write 1 to clear it.
36510  *
36511  * Field Enumeration Values:
36512  *
36513  * Enum | Value | Description
36514  * :---------------------------------------|:------|:-----------------------------------------------
36515  * ALT_USB_HOST_HCINT10_XFERCOMPL_E_INACT | 0x0 | No transfer
36516  * ALT_USB_HOST_HCINT10_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
36517  *
36518  * Field Access Macros:
36519  *
36520  */
36521 /*
36522  * Enumerated value for register field ALT_USB_HOST_HCINT10_XFERCOMPL
36523  *
36524  * No transfer
36525  */
36526 #define ALT_USB_HOST_HCINT10_XFERCOMPL_E_INACT 0x0
36527 /*
36528  * Enumerated value for register field ALT_USB_HOST_HCINT10_XFERCOMPL
36529  *
36530  * Transfer completed normally without any errors
36531  */
36532 #define ALT_USB_HOST_HCINT10_XFERCOMPL_E_ACT 0x1
36533 
36534 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_XFERCOMPL register field. */
36535 #define ALT_USB_HOST_HCINT10_XFERCOMPL_LSB 0
36536 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_XFERCOMPL register field. */
36537 #define ALT_USB_HOST_HCINT10_XFERCOMPL_MSB 0
36538 /* The width in bits of the ALT_USB_HOST_HCINT10_XFERCOMPL register field. */
36539 #define ALT_USB_HOST_HCINT10_XFERCOMPL_WIDTH 1
36540 /* The mask used to set the ALT_USB_HOST_HCINT10_XFERCOMPL register field value. */
36541 #define ALT_USB_HOST_HCINT10_XFERCOMPL_SET_MSK 0x00000001
36542 /* The mask used to clear the ALT_USB_HOST_HCINT10_XFERCOMPL register field value. */
36543 #define ALT_USB_HOST_HCINT10_XFERCOMPL_CLR_MSK 0xfffffffe
36544 /* The reset value of the ALT_USB_HOST_HCINT10_XFERCOMPL register field. */
36545 #define ALT_USB_HOST_HCINT10_XFERCOMPL_RESET 0x0
36546 /* Extracts the ALT_USB_HOST_HCINT10_XFERCOMPL field value from a register. */
36547 #define ALT_USB_HOST_HCINT10_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
36548 /* Produces a ALT_USB_HOST_HCINT10_XFERCOMPL register field value suitable for setting the register. */
36549 #define ALT_USB_HOST_HCINT10_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
36550 
36551 /*
36552  * Field : Channel Halted - chhltd
36553  *
36554  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
36555  * either because of any USB transaction error or in response to disable request by
36556  * the application or because of a completed transfer. In Scatter/gather DMA mode,
36557  * this indicates that transfer completed due to any of the following
36558  *
36559  * . EOL being set in descriptor
36560  *
36561  * . AHB error
36562  *
36563  * . Excessive transaction errors
36564  *
36565  * . Babble
36566  *
36567  * . Stall
36568  *
36569  * Field Enumeration Values:
36570  *
36571  * Enum | Value | Description
36572  * :------------------------------------|:------|:-------------------
36573  * ALT_USB_HOST_HCINT10_CHHLTD_E_INACT | 0x0 | Channel not halted
36574  * ALT_USB_HOST_HCINT10_CHHLTD_E_ACT | 0x1 | Channel Halted
36575  *
36576  * Field Access Macros:
36577  *
36578  */
36579 /*
36580  * Enumerated value for register field ALT_USB_HOST_HCINT10_CHHLTD
36581  *
36582  * Channel not halted
36583  */
36584 #define ALT_USB_HOST_HCINT10_CHHLTD_E_INACT 0x0
36585 /*
36586  * Enumerated value for register field ALT_USB_HOST_HCINT10_CHHLTD
36587  *
36588  * Channel Halted
36589  */
36590 #define ALT_USB_HOST_HCINT10_CHHLTD_E_ACT 0x1
36591 
36592 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_CHHLTD register field. */
36593 #define ALT_USB_HOST_HCINT10_CHHLTD_LSB 1
36594 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_CHHLTD register field. */
36595 #define ALT_USB_HOST_HCINT10_CHHLTD_MSB 1
36596 /* The width in bits of the ALT_USB_HOST_HCINT10_CHHLTD register field. */
36597 #define ALT_USB_HOST_HCINT10_CHHLTD_WIDTH 1
36598 /* The mask used to set the ALT_USB_HOST_HCINT10_CHHLTD register field value. */
36599 #define ALT_USB_HOST_HCINT10_CHHLTD_SET_MSK 0x00000002
36600 /* The mask used to clear the ALT_USB_HOST_HCINT10_CHHLTD register field value. */
36601 #define ALT_USB_HOST_HCINT10_CHHLTD_CLR_MSK 0xfffffffd
36602 /* The reset value of the ALT_USB_HOST_HCINT10_CHHLTD register field. */
36603 #define ALT_USB_HOST_HCINT10_CHHLTD_RESET 0x0
36604 /* Extracts the ALT_USB_HOST_HCINT10_CHHLTD field value from a register. */
36605 #define ALT_USB_HOST_HCINT10_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
36606 /* Produces a ALT_USB_HOST_HCINT10_CHHLTD register field value suitable for setting the register. */
36607 #define ALT_USB_HOST_HCINT10_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
36608 
36609 /*
36610  * Field : AHB Error - ahberr
36611  *
36612  * This is generated only in Internal DMA mode when there is an AHB error during
36613  * AHB read/write. The application can read the corresponding channel's DMA address
36614  * register to get the error address.
36615  *
36616  * Field Enumeration Values:
36617  *
36618  * Enum | Value | Description
36619  * :------------------------------------|:------|:--------------------------------
36620  * ALT_USB_HOST_HCINT10_AHBERR_E_INACT | 0x0 | No AHB error
36621  * ALT_USB_HOST_HCINT10_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
36622  *
36623  * Field Access Macros:
36624  *
36625  */
36626 /*
36627  * Enumerated value for register field ALT_USB_HOST_HCINT10_AHBERR
36628  *
36629  * No AHB error
36630  */
36631 #define ALT_USB_HOST_HCINT10_AHBERR_E_INACT 0x0
36632 /*
36633  * Enumerated value for register field ALT_USB_HOST_HCINT10_AHBERR
36634  *
36635  * AHB error during AHB read/write
36636  */
36637 #define ALT_USB_HOST_HCINT10_AHBERR_E_ACT 0x1
36638 
36639 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_AHBERR register field. */
36640 #define ALT_USB_HOST_HCINT10_AHBERR_LSB 2
36641 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_AHBERR register field. */
36642 #define ALT_USB_HOST_HCINT10_AHBERR_MSB 2
36643 /* The width in bits of the ALT_USB_HOST_HCINT10_AHBERR register field. */
36644 #define ALT_USB_HOST_HCINT10_AHBERR_WIDTH 1
36645 /* The mask used to set the ALT_USB_HOST_HCINT10_AHBERR register field value. */
36646 #define ALT_USB_HOST_HCINT10_AHBERR_SET_MSK 0x00000004
36647 /* The mask used to clear the ALT_USB_HOST_HCINT10_AHBERR register field value. */
36648 #define ALT_USB_HOST_HCINT10_AHBERR_CLR_MSK 0xfffffffb
36649 /* The reset value of the ALT_USB_HOST_HCINT10_AHBERR register field. */
36650 #define ALT_USB_HOST_HCINT10_AHBERR_RESET 0x0
36651 /* Extracts the ALT_USB_HOST_HCINT10_AHBERR field value from a register. */
36652 #define ALT_USB_HOST_HCINT10_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
36653 /* Produces a ALT_USB_HOST_HCINT10_AHBERR register field value suitable for setting the register. */
36654 #define ALT_USB_HOST_HCINT10_AHBERR_SET(value) (((value) << 2) & 0x00000004)
36655 
36656 /*
36657  * Field : STALL Response Received Interrupt - stall
36658  *
36659  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
36660  * This bit can be set only by the core and the application should write 1 to clear
36661  * it.
36662  *
36663  * Field Enumeration Values:
36664  *
36665  * Enum | Value | Description
36666  * :-----------------------------------|:------|:-------------------
36667  * ALT_USB_HOST_HCINT10_STALL_E_INACT | 0x0 | No Stall Interrupt
36668  * ALT_USB_HOST_HCINT10_STALL_E_ACT | 0x1 | Stall Interrupt
36669  *
36670  * Field Access Macros:
36671  *
36672  */
36673 /*
36674  * Enumerated value for register field ALT_USB_HOST_HCINT10_STALL
36675  *
36676  * No Stall Interrupt
36677  */
36678 #define ALT_USB_HOST_HCINT10_STALL_E_INACT 0x0
36679 /*
36680  * Enumerated value for register field ALT_USB_HOST_HCINT10_STALL
36681  *
36682  * Stall Interrupt
36683  */
36684 #define ALT_USB_HOST_HCINT10_STALL_E_ACT 0x1
36685 
36686 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_STALL register field. */
36687 #define ALT_USB_HOST_HCINT10_STALL_LSB 3
36688 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_STALL register field. */
36689 #define ALT_USB_HOST_HCINT10_STALL_MSB 3
36690 /* The width in bits of the ALT_USB_HOST_HCINT10_STALL register field. */
36691 #define ALT_USB_HOST_HCINT10_STALL_WIDTH 1
36692 /* The mask used to set the ALT_USB_HOST_HCINT10_STALL register field value. */
36693 #define ALT_USB_HOST_HCINT10_STALL_SET_MSK 0x00000008
36694 /* The mask used to clear the ALT_USB_HOST_HCINT10_STALL register field value. */
36695 #define ALT_USB_HOST_HCINT10_STALL_CLR_MSK 0xfffffff7
36696 /* The reset value of the ALT_USB_HOST_HCINT10_STALL register field. */
36697 #define ALT_USB_HOST_HCINT10_STALL_RESET 0x0
36698 /* Extracts the ALT_USB_HOST_HCINT10_STALL field value from a register. */
36699 #define ALT_USB_HOST_HCINT10_STALL_GET(value) (((value) & 0x00000008) >> 3)
36700 /* Produces a ALT_USB_HOST_HCINT10_STALL register field value suitable for setting the register. */
36701 #define ALT_USB_HOST_HCINT10_STALL_SET(value) (((value) << 3) & 0x00000008)
36702 
36703 /*
36704  * Field : NAK Response Received Interrupt - nak
36705  *
36706  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
36707  * core.This bit can be set only by the core and the application should write 1 to
36708  * clear it.
36709  *
36710  * Field Enumeration Values:
36711  *
36712  * Enum | Value | Description
36713  * :---------------------------------|:------|:-----------------------------------
36714  * ALT_USB_HOST_HCINT10_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
36715  * ALT_USB_HOST_HCINT10_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
36716  *
36717  * Field Access Macros:
36718  *
36719  */
36720 /*
36721  * Enumerated value for register field ALT_USB_HOST_HCINT10_NAK
36722  *
36723  * No NAK Response Received Interrupt
36724  */
36725 #define ALT_USB_HOST_HCINT10_NAK_E_INACT 0x0
36726 /*
36727  * Enumerated value for register field ALT_USB_HOST_HCINT10_NAK
36728  *
36729  * NAK Response Received Interrupt
36730  */
36731 #define ALT_USB_HOST_HCINT10_NAK_E_ACT 0x1
36732 
36733 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_NAK register field. */
36734 #define ALT_USB_HOST_HCINT10_NAK_LSB 4
36735 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_NAK register field. */
36736 #define ALT_USB_HOST_HCINT10_NAK_MSB 4
36737 /* The width in bits of the ALT_USB_HOST_HCINT10_NAK register field. */
36738 #define ALT_USB_HOST_HCINT10_NAK_WIDTH 1
36739 /* The mask used to set the ALT_USB_HOST_HCINT10_NAK register field value. */
36740 #define ALT_USB_HOST_HCINT10_NAK_SET_MSK 0x00000010
36741 /* The mask used to clear the ALT_USB_HOST_HCINT10_NAK register field value. */
36742 #define ALT_USB_HOST_HCINT10_NAK_CLR_MSK 0xffffffef
36743 /* The reset value of the ALT_USB_HOST_HCINT10_NAK register field. */
36744 #define ALT_USB_HOST_HCINT10_NAK_RESET 0x0
36745 /* Extracts the ALT_USB_HOST_HCINT10_NAK field value from a register. */
36746 #define ALT_USB_HOST_HCINT10_NAK_GET(value) (((value) & 0x00000010) >> 4)
36747 /* Produces a ALT_USB_HOST_HCINT10_NAK register field value suitable for setting the register. */
36748 #define ALT_USB_HOST_HCINT10_NAK_SET(value) (((value) << 4) & 0x00000010)
36749 
36750 /*
36751  * Field : ACK Response Received Transmitted Interrupt - ack
36752  *
36753  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
36754  * This bit can be set only by the core and the application should write 1 to clear
36755  * it.
36756  *
36757  * Field Enumeration Values:
36758  *
36759  * Enum | Value | Description
36760  * :---------------------------------|:------|:-----------------------------------------------
36761  * ALT_USB_HOST_HCINT10_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
36762  * ALT_USB_HOST_HCINT10_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
36763  *
36764  * Field Access Macros:
36765  *
36766  */
36767 /*
36768  * Enumerated value for register field ALT_USB_HOST_HCINT10_ACK
36769  *
36770  * No ACK Response Received Transmitted Interrupt
36771  */
36772 #define ALT_USB_HOST_HCINT10_ACK_E_INACT 0x0
36773 /*
36774  * Enumerated value for register field ALT_USB_HOST_HCINT10_ACK
36775  *
36776  * ACK Response Received Transmitted Interrup
36777  */
36778 #define ALT_USB_HOST_HCINT10_ACK_E_ACT 0x1
36779 
36780 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_ACK register field. */
36781 #define ALT_USB_HOST_HCINT10_ACK_LSB 5
36782 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_ACK register field. */
36783 #define ALT_USB_HOST_HCINT10_ACK_MSB 5
36784 /* The width in bits of the ALT_USB_HOST_HCINT10_ACK register field. */
36785 #define ALT_USB_HOST_HCINT10_ACK_WIDTH 1
36786 /* The mask used to set the ALT_USB_HOST_HCINT10_ACK register field value. */
36787 #define ALT_USB_HOST_HCINT10_ACK_SET_MSK 0x00000020
36788 /* The mask used to clear the ALT_USB_HOST_HCINT10_ACK register field value. */
36789 #define ALT_USB_HOST_HCINT10_ACK_CLR_MSK 0xffffffdf
36790 /* The reset value of the ALT_USB_HOST_HCINT10_ACK register field. */
36791 #define ALT_USB_HOST_HCINT10_ACK_RESET 0x0
36792 /* Extracts the ALT_USB_HOST_HCINT10_ACK field value from a register. */
36793 #define ALT_USB_HOST_HCINT10_ACK_GET(value) (((value) & 0x00000020) >> 5)
36794 /* Produces a ALT_USB_HOST_HCINT10_ACK register field value suitable for setting the register. */
36795 #define ALT_USB_HOST_HCINT10_ACK_SET(value) (((value) << 5) & 0x00000020)
36796 
36797 /*
36798  * Field : NYET Response Received Interrupt - nyet
36799  *
36800  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
36801  * core.This bit can be set only by the core and the application should write 1 to
36802  * clear it.
36803  *
36804  * Field Enumeration Values:
36805  *
36806  * Enum | Value | Description
36807  * :----------------------------------|:------|:------------------------------------
36808  * ALT_USB_HOST_HCINT10_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
36809  * ALT_USB_HOST_HCINT10_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
36810  *
36811  * Field Access Macros:
36812  *
36813  */
36814 /*
36815  * Enumerated value for register field ALT_USB_HOST_HCINT10_NYET
36816  *
36817  * No NYET Response Received Interrupt
36818  */
36819 #define ALT_USB_HOST_HCINT10_NYET_E_INACT 0x0
36820 /*
36821  * Enumerated value for register field ALT_USB_HOST_HCINT10_NYET
36822  *
36823  * NYET Response Received Interrupt
36824  */
36825 #define ALT_USB_HOST_HCINT10_NYET_E_ACT 0x1
36826 
36827 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_NYET register field. */
36828 #define ALT_USB_HOST_HCINT10_NYET_LSB 6
36829 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_NYET register field. */
36830 #define ALT_USB_HOST_HCINT10_NYET_MSB 6
36831 /* The width in bits of the ALT_USB_HOST_HCINT10_NYET register field. */
36832 #define ALT_USB_HOST_HCINT10_NYET_WIDTH 1
36833 /* The mask used to set the ALT_USB_HOST_HCINT10_NYET register field value. */
36834 #define ALT_USB_HOST_HCINT10_NYET_SET_MSK 0x00000040
36835 /* The mask used to clear the ALT_USB_HOST_HCINT10_NYET register field value. */
36836 #define ALT_USB_HOST_HCINT10_NYET_CLR_MSK 0xffffffbf
36837 /* The reset value of the ALT_USB_HOST_HCINT10_NYET register field. */
36838 #define ALT_USB_HOST_HCINT10_NYET_RESET 0x0
36839 /* Extracts the ALT_USB_HOST_HCINT10_NYET field value from a register. */
36840 #define ALT_USB_HOST_HCINT10_NYET_GET(value) (((value) & 0x00000040) >> 6)
36841 /* Produces a ALT_USB_HOST_HCINT10_NYET register field value suitable for setting the register. */
36842 #define ALT_USB_HOST_HCINT10_NYET_SET(value) (((value) << 6) & 0x00000040)
36843 
36844 /*
36845  * Field : Transaction Error - xacterr
36846  *
36847  * Indicates one of the following errors occurred on the USB.-CRC check failure
36848  *
36849  * * Timeout
36850  *
36851  * * Bit stuff error
36852  *
36853  * * False EOP
36854  *
36855  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
36856  * This bit can be set only by the core and the application should write 1 to clear
36857  * it.
36858  *
36859  * Field Enumeration Values:
36860  *
36861  * Enum | Value | Description
36862  * :-------------------------------------|:------|:---------------------
36863  * ALT_USB_HOST_HCINT10_XACTERR_E_INACT | 0x0 | No Transaction Error
36864  * ALT_USB_HOST_HCINT10_XACTERR_E_ACT | 0x1 | Transaction Error
36865  *
36866  * Field Access Macros:
36867  *
36868  */
36869 /*
36870  * Enumerated value for register field ALT_USB_HOST_HCINT10_XACTERR
36871  *
36872  * No Transaction Error
36873  */
36874 #define ALT_USB_HOST_HCINT10_XACTERR_E_INACT 0x0
36875 /*
36876  * Enumerated value for register field ALT_USB_HOST_HCINT10_XACTERR
36877  *
36878  * Transaction Error
36879  */
36880 #define ALT_USB_HOST_HCINT10_XACTERR_E_ACT 0x1
36881 
36882 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_XACTERR register field. */
36883 #define ALT_USB_HOST_HCINT10_XACTERR_LSB 7
36884 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_XACTERR register field. */
36885 #define ALT_USB_HOST_HCINT10_XACTERR_MSB 7
36886 /* The width in bits of the ALT_USB_HOST_HCINT10_XACTERR register field. */
36887 #define ALT_USB_HOST_HCINT10_XACTERR_WIDTH 1
36888 /* The mask used to set the ALT_USB_HOST_HCINT10_XACTERR register field value. */
36889 #define ALT_USB_HOST_HCINT10_XACTERR_SET_MSK 0x00000080
36890 /* The mask used to clear the ALT_USB_HOST_HCINT10_XACTERR register field value. */
36891 #define ALT_USB_HOST_HCINT10_XACTERR_CLR_MSK 0xffffff7f
36892 /* The reset value of the ALT_USB_HOST_HCINT10_XACTERR register field. */
36893 #define ALT_USB_HOST_HCINT10_XACTERR_RESET 0x0
36894 /* Extracts the ALT_USB_HOST_HCINT10_XACTERR field value from a register. */
36895 #define ALT_USB_HOST_HCINT10_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
36896 /* Produces a ALT_USB_HOST_HCINT10_XACTERR register field value suitable for setting the register. */
36897 #define ALT_USB_HOST_HCINT10_XACTERR_SET(value) (((value) << 7) & 0x00000080)
36898 
36899 /*
36900  * Field : Babble Error - bblerr
36901  *
36902  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
36903  * core..This bit can be set only by the core and the application should write 1 to
36904  * clear it.
36905  *
36906  * Field Enumeration Values:
36907  *
36908  * Enum | Value | Description
36909  * :------------------------------------|:------|:----------------
36910  * ALT_USB_HOST_HCINT10_BBLERR_E_INACT | 0x0 | No Babble Error
36911  * ALT_USB_HOST_HCINT10_BBLERR_E_ACT | 0x1 | Babble Error
36912  *
36913  * Field Access Macros:
36914  *
36915  */
36916 /*
36917  * Enumerated value for register field ALT_USB_HOST_HCINT10_BBLERR
36918  *
36919  * No Babble Error
36920  */
36921 #define ALT_USB_HOST_HCINT10_BBLERR_E_INACT 0x0
36922 /*
36923  * Enumerated value for register field ALT_USB_HOST_HCINT10_BBLERR
36924  *
36925  * Babble Error
36926  */
36927 #define ALT_USB_HOST_HCINT10_BBLERR_E_ACT 0x1
36928 
36929 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_BBLERR register field. */
36930 #define ALT_USB_HOST_HCINT10_BBLERR_LSB 8
36931 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_BBLERR register field. */
36932 #define ALT_USB_HOST_HCINT10_BBLERR_MSB 8
36933 /* The width in bits of the ALT_USB_HOST_HCINT10_BBLERR register field. */
36934 #define ALT_USB_HOST_HCINT10_BBLERR_WIDTH 1
36935 /* The mask used to set the ALT_USB_HOST_HCINT10_BBLERR register field value. */
36936 #define ALT_USB_HOST_HCINT10_BBLERR_SET_MSK 0x00000100
36937 /* The mask used to clear the ALT_USB_HOST_HCINT10_BBLERR register field value. */
36938 #define ALT_USB_HOST_HCINT10_BBLERR_CLR_MSK 0xfffffeff
36939 /* The reset value of the ALT_USB_HOST_HCINT10_BBLERR register field. */
36940 #define ALT_USB_HOST_HCINT10_BBLERR_RESET 0x0
36941 /* Extracts the ALT_USB_HOST_HCINT10_BBLERR field value from a register. */
36942 #define ALT_USB_HOST_HCINT10_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
36943 /* Produces a ALT_USB_HOST_HCINT10_BBLERR register field value suitable for setting the register. */
36944 #define ALT_USB_HOST_HCINT10_BBLERR_SET(value) (((value) << 8) & 0x00000100)
36945 
36946 /*
36947  * Field : Frame Overrun - frmovrun
36948  *
36949  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
36950  * This bit can be set only by the core and the application should write 1 to clear
36951  * it.
36952  *
36953  * Field Enumeration Values:
36954  *
36955  * Enum | Value | Description
36956  * :--------------------------------------|:------|:-----------------
36957  * ALT_USB_HOST_HCINT10_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
36958  * ALT_USB_HOST_HCINT10_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
36959  *
36960  * Field Access Macros:
36961  *
36962  */
36963 /*
36964  * Enumerated value for register field ALT_USB_HOST_HCINT10_FRMOVRUN
36965  *
36966  * No Frame Overrun
36967  */
36968 #define ALT_USB_HOST_HCINT10_FRMOVRUN_E_INACT 0x0
36969 /*
36970  * Enumerated value for register field ALT_USB_HOST_HCINT10_FRMOVRUN
36971  *
36972  * Frame Overrun
36973  */
36974 #define ALT_USB_HOST_HCINT10_FRMOVRUN_E_ACT 0x1
36975 
36976 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_FRMOVRUN register field. */
36977 #define ALT_USB_HOST_HCINT10_FRMOVRUN_LSB 9
36978 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_FRMOVRUN register field. */
36979 #define ALT_USB_HOST_HCINT10_FRMOVRUN_MSB 9
36980 /* The width in bits of the ALT_USB_HOST_HCINT10_FRMOVRUN register field. */
36981 #define ALT_USB_HOST_HCINT10_FRMOVRUN_WIDTH 1
36982 /* The mask used to set the ALT_USB_HOST_HCINT10_FRMOVRUN register field value. */
36983 #define ALT_USB_HOST_HCINT10_FRMOVRUN_SET_MSK 0x00000200
36984 /* The mask used to clear the ALT_USB_HOST_HCINT10_FRMOVRUN register field value. */
36985 #define ALT_USB_HOST_HCINT10_FRMOVRUN_CLR_MSK 0xfffffdff
36986 /* The reset value of the ALT_USB_HOST_HCINT10_FRMOVRUN register field. */
36987 #define ALT_USB_HOST_HCINT10_FRMOVRUN_RESET 0x0
36988 /* Extracts the ALT_USB_HOST_HCINT10_FRMOVRUN field value from a register. */
36989 #define ALT_USB_HOST_HCINT10_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
36990 /* Produces a ALT_USB_HOST_HCINT10_FRMOVRUN register field value suitable for setting the register. */
36991 #define ALT_USB_HOST_HCINT10_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
36992 
36993 /*
36994  * Field : Data Toggle Error - datatglerr
36995  *
36996  * This bit can be set only by the core and the application should write 1 to clear
36997  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
36998  * core.
36999  *
37000  * Field Enumeration Values:
37001  *
37002  * Enum | Value | Description
37003  * :----------------------------------------|:------|:---------------------
37004  * ALT_USB_HOST_HCINT10_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
37005  * ALT_USB_HOST_HCINT10_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
37006  *
37007  * Field Access Macros:
37008  *
37009  */
37010 /*
37011  * Enumerated value for register field ALT_USB_HOST_HCINT10_DATATGLERR
37012  *
37013  * No Data Toggle Error
37014  */
37015 #define ALT_USB_HOST_HCINT10_DATATGLERR_E_INACT 0x0
37016 /*
37017  * Enumerated value for register field ALT_USB_HOST_HCINT10_DATATGLERR
37018  *
37019  * Data Toggle Error
37020  */
37021 #define ALT_USB_HOST_HCINT10_DATATGLERR_E_ACT 0x1
37022 
37023 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_DATATGLERR register field. */
37024 #define ALT_USB_HOST_HCINT10_DATATGLERR_LSB 10
37025 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_DATATGLERR register field. */
37026 #define ALT_USB_HOST_HCINT10_DATATGLERR_MSB 10
37027 /* The width in bits of the ALT_USB_HOST_HCINT10_DATATGLERR register field. */
37028 #define ALT_USB_HOST_HCINT10_DATATGLERR_WIDTH 1
37029 /* The mask used to set the ALT_USB_HOST_HCINT10_DATATGLERR register field value. */
37030 #define ALT_USB_HOST_HCINT10_DATATGLERR_SET_MSK 0x00000400
37031 /* The mask used to clear the ALT_USB_HOST_HCINT10_DATATGLERR register field value. */
37032 #define ALT_USB_HOST_HCINT10_DATATGLERR_CLR_MSK 0xfffffbff
37033 /* The reset value of the ALT_USB_HOST_HCINT10_DATATGLERR register field. */
37034 #define ALT_USB_HOST_HCINT10_DATATGLERR_RESET 0x0
37035 /* Extracts the ALT_USB_HOST_HCINT10_DATATGLERR field value from a register. */
37036 #define ALT_USB_HOST_HCINT10_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
37037 /* Produces a ALT_USB_HOST_HCINT10_DATATGLERR register field value suitable for setting the register. */
37038 #define ALT_USB_HOST_HCINT10_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
37039 
37040 /*
37041  * Field : BNA Interrupt - bnaintr
37042  *
37043  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
37044  * generates this interrupt when the descriptor accessed is not ready for the Core
37045  * to process. BNA will not be generated for Isochronous channels. for non
37046  * Scatter/Gather DMA mode, this bit is reserved.
37047  *
37048  * Field Enumeration Values:
37049  *
37050  * Enum | Value | Description
37051  * :-------------------------------------|:------|:-----------------
37052  * ALT_USB_HOST_HCINT10_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
37053  * ALT_USB_HOST_HCINT10_BNAINTR_E_ACT | 0x1 | BNA Interrupt
37054  *
37055  * Field Access Macros:
37056  *
37057  */
37058 /*
37059  * Enumerated value for register field ALT_USB_HOST_HCINT10_BNAINTR
37060  *
37061  * No BNA Interrupt
37062  */
37063 #define ALT_USB_HOST_HCINT10_BNAINTR_E_INACT 0x0
37064 /*
37065  * Enumerated value for register field ALT_USB_HOST_HCINT10_BNAINTR
37066  *
37067  * BNA Interrupt
37068  */
37069 #define ALT_USB_HOST_HCINT10_BNAINTR_E_ACT 0x1
37070 
37071 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_BNAINTR register field. */
37072 #define ALT_USB_HOST_HCINT10_BNAINTR_LSB 11
37073 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_BNAINTR register field. */
37074 #define ALT_USB_HOST_HCINT10_BNAINTR_MSB 11
37075 /* The width in bits of the ALT_USB_HOST_HCINT10_BNAINTR register field. */
37076 #define ALT_USB_HOST_HCINT10_BNAINTR_WIDTH 1
37077 /* The mask used to set the ALT_USB_HOST_HCINT10_BNAINTR register field value. */
37078 #define ALT_USB_HOST_HCINT10_BNAINTR_SET_MSK 0x00000800
37079 /* The mask used to clear the ALT_USB_HOST_HCINT10_BNAINTR register field value. */
37080 #define ALT_USB_HOST_HCINT10_BNAINTR_CLR_MSK 0xfffff7ff
37081 /* The reset value of the ALT_USB_HOST_HCINT10_BNAINTR register field. */
37082 #define ALT_USB_HOST_HCINT10_BNAINTR_RESET 0x0
37083 /* Extracts the ALT_USB_HOST_HCINT10_BNAINTR field value from a register. */
37084 #define ALT_USB_HOST_HCINT10_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
37085 /* Produces a ALT_USB_HOST_HCINT10_BNAINTR register field value suitable for setting the register. */
37086 #define ALT_USB_HOST_HCINT10_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
37087 
37088 /*
37089  * Field : Excessive Transaction Error - xcs_xact_err
37090  *
37091  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
37092  * this bit when 3 consecutive transaction errors occurred on the USB bus.
37093  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
37094  * Scatter/Gather DMA mode, this bit is reserved.
37095  *
37096  * Field Enumeration Values:
37097  *
37098  * Enum | Value | Description
37099  * :--------------------------------------------|:------|:-------------------------------
37100  * ALT_USB_HOST_HCINT10_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
37101  * ALT_USB_HOST_HCINT10_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
37102  *
37103  * Field Access Macros:
37104  *
37105  */
37106 /*
37107  * Enumerated value for register field ALT_USB_HOST_HCINT10_XCS_XACT_ERR
37108  *
37109  * No Excessive Transaction Error
37110  */
37111 #define ALT_USB_HOST_HCINT10_XCS_XACT_ERR_E_INACT 0x0
37112 /*
37113  * Enumerated value for register field ALT_USB_HOST_HCINT10_XCS_XACT_ERR
37114  *
37115  * Excessive Transaction Error
37116  */
37117 #define ALT_USB_HOST_HCINT10_XCS_XACT_ERR_E_ACVTIVE 0x1
37118 
37119 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_XCS_XACT_ERR register field. */
37120 #define ALT_USB_HOST_HCINT10_XCS_XACT_ERR_LSB 12
37121 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_XCS_XACT_ERR register field. */
37122 #define ALT_USB_HOST_HCINT10_XCS_XACT_ERR_MSB 12
37123 /* The width in bits of the ALT_USB_HOST_HCINT10_XCS_XACT_ERR register field. */
37124 #define ALT_USB_HOST_HCINT10_XCS_XACT_ERR_WIDTH 1
37125 /* The mask used to set the ALT_USB_HOST_HCINT10_XCS_XACT_ERR register field value. */
37126 #define ALT_USB_HOST_HCINT10_XCS_XACT_ERR_SET_MSK 0x00001000
37127 /* The mask used to clear the ALT_USB_HOST_HCINT10_XCS_XACT_ERR register field value. */
37128 #define ALT_USB_HOST_HCINT10_XCS_XACT_ERR_CLR_MSK 0xffffefff
37129 /* The reset value of the ALT_USB_HOST_HCINT10_XCS_XACT_ERR register field. */
37130 #define ALT_USB_HOST_HCINT10_XCS_XACT_ERR_RESET 0x0
37131 /* Extracts the ALT_USB_HOST_HCINT10_XCS_XACT_ERR field value from a register. */
37132 #define ALT_USB_HOST_HCINT10_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
37133 /* Produces a ALT_USB_HOST_HCINT10_XCS_XACT_ERR register field value suitable for setting the register. */
37134 #define ALT_USB_HOST_HCINT10_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
37135 
37136 /*
37137  * Field : Descriptor rollover interrupt - desc_lst_rollintr
37138  *
37139  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
37140  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
37141  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
37142  * mode, this bit is reserved.
37143  *
37144  * Field Enumeration Values:
37145  *
37146  * Enum | Value | Description
37147  * :-----------------------------------------------|:------|:---------------------------------
37148  * ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
37149  * ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
37150  *
37151  * Field Access Macros:
37152  *
37153  */
37154 /*
37155  * Enumerated value for register field ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR
37156  *
37157  * No Descriptor rollover interrupt
37158  */
37159 #define ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR_E_INACT 0x0
37160 /*
37161  * Enumerated value for register field ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR
37162  *
37163  * Descriptor rollover interrupt
37164  */
37165 #define ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR_E_ACT 0x1
37166 
37167 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR register field. */
37168 #define ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR_LSB 13
37169 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR register field. */
37170 #define ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR_MSB 13
37171 /* The width in bits of the ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR register field. */
37172 #define ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR_WIDTH 1
37173 /* The mask used to set the ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR register field value. */
37174 #define ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR_SET_MSK 0x00002000
37175 /* The mask used to clear the ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR register field value. */
37176 #define ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
37177 /* The reset value of the ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR register field. */
37178 #define ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR_RESET 0x0
37179 /* Extracts the ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR field value from a register. */
37180 #define ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
37181 /* Produces a ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR register field value suitable for setting the register. */
37182 #define ALT_USB_HOST_HCINT10_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
37183 
37184 #ifndef __ASSEMBLY__
37185 /*
37186  * WARNING: The C register and register group struct declarations are provided for
37187  * convenience and illustrative purposes. They should, however, be used with
37188  * caution as the C language standard provides no guarantees about the alignment or
37189  * atomicity of device memory accesses. The recommended practice for writing
37190  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
37191  * alt_write_word() functions.
37192  *
37193  * The struct declaration for register ALT_USB_HOST_HCINT10.
37194  */
37195 struct ALT_USB_HOST_HCINT10_s
37196 {
37197  const uint32_t xfercompl : 1; /* Transfer Completed */
37198  const uint32_t chhltd : 1; /* Channel Halted */
37199  const uint32_t ahberr : 1; /* AHB Error */
37200  const uint32_t stall : 1; /* STALL Response Received Interrupt */
37201  const uint32_t nak : 1; /* NAK Response Received Interrupt */
37202  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
37203  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
37204  const uint32_t xacterr : 1; /* Transaction Error */
37205  const uint32_t bblerr : 1; /* Babble Error */
37206  const uint32_t frmovrun : 1; /* Frame Overrun */
37207  const uint32_t datatglerr : 1; /* Data Toggle Error */
37208  const uint32_t bnaintr : 1; /* BNA Interrupt */
37209  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
37210  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
37211  uint32_t : 18; /* *UNDEFINED* */
37212 };
37213 
37214 /* The typedef declaration for register ALT_USB_HOST_HCINT10. */
37215 typedef volatile struct ALT_USB_HOST_HCINT10_s ALT_USB_HOST_HCINT10_t;
37216 #endif /* __ASSEMBLY__ */
37217 
37218 /* The byte offset of the ALT_USB_HOST_HCINT10 register from the beginning of the component. */
37219 #define ALT_USB_HOST_HCINT10_OFST 0x248
37220 /* The address of the ALT_USB_HOST_HCINT10 register. */
37221 #define ALT_USB_HOST_HCINT10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT10_OFST))
37222 
37223 /*
37224  * Register : Host Channel 10 Interrupt Mask Register - hcintmsk10
37225  *
37226  * This register reflects the mask for each channel status described in the
37227  * previous section.
37228  *
37229  * Register Layout
37230  *
37231  * Bits | Access | Reset | Description
37232  * :--------|:-------|:------|:----------------------------------
37233  * [0] | RW | 0x0 | Transfer Completed Mask
37234  * [1] | RW | 0x0 | Channel Halted Mask
37235  * [2] | RW | 0x0 | AHB Error Mask
37236  * [10:3] | ??? | 0x0 | *UNDEFINED*
37237  * [11] | RW | 0x0 | BNA Interrupt mask
37238  * [12] | ??? | 0x0 | *UNDEFINED*
37239  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
37240  * [31:14] | ??? | 0x0 | *UNDEFINED*
37241  *
37242  */
37243 /*
37244  * Field : Transfer Completed Mask - xfercomplmsk
37245  *
37246  * Transfer complete.
37247  *
37248  * Field Enumeration Values:
37249  *
37250  * Enum | Value | Description
37251  * :---------------------------------------------|:------|:------------
37252  * ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK_E_MSK | 0x0 | Mask
37253  * ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
37254  *
37255  * Field Access Macros:
37256  *
37257  */
37258 /*
37259  * Enumerated value for register field ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK
37260  *
37261  * Mask
37262  */
37263 #define ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK_E_MSK 0x0
37264 /*
37265  * Enumerated value for register field ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK
37266  *
37267  * No mask
37268  */
37269 #define ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK_E_NOMSK 0x1
37270 
37271 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK register field. */
37272 #define ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK_LSB 0
37273 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK register field. */
37274 #define ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK_MSB 0
37275 /* The width in bits of the ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK register field. */
37276 #define ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK_WIDTH 1
37277 /* The mask used to set the ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK register field value. */
37278 #define ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK_SET_MSK 0x00000001
37279 /* The mask used to clear the ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK register field value. */
37280 #define ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK_CLR_MSK 0xfffffffe
37281 /* The reset value of the ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK register field. */
37282 #define ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK_RESET 0x0
37283 /* Extracts the ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK field value from a register. */
37284 #define ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
37285 /* Produces a ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK register field value suitable for setting the register. */
37286 #define ALT_USB_HOST_HCINTMSK10_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
37287 
37288 /*
37289  * Field : Channel Halted Mask - chhltdmsk
37290  *
37291  * Channel Halted.
37292  *
37293  * Field Enumeration Values:
37294  *
37295  * Enum | Value | Description
37296  * :------------------------------------------|:------|:------------
37297  * ALT_USB_HOST_HCINTMSK10_CHHLTDMSK_E_MSK | 0x0 | Mask
37298  * ALT_USB_HOST_HCINTMSK10_CHHLTDMSK_E_NOMSK | 0x1 | No mask
37299  *
37300  * Field Access Macros:
37301  *
37302  */
37303 /*
37304  * Enumerated value for register field ALT_USB_HOST_HCINTMSK10_CHHLTDMSK
37305  *
37306  * Mask
37307  */
37308 #define ALT_USB_HOST_HCINTMSK10_CHHLTDMSK_E_MSK 0x0
37309 /*
37310  * Enumerated value for register field ALT_USB_HOST_HCINTMSK10_CHHLTDMSK
37311  *
37312  * No mask
37313  */
37314 #define ALT_USB_HOST_HCINTMSK10_CHHLTDMSK_E_NOMSK 0x1
37315 
37316 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK10_CHHLTDMSK register field. */
37317 #define ALT_USB_HOST_HCINTMSK10_CHHLTDMSK_LSB 1
37318 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK10_CHHLTDMSK register field. */
37319 #define ALT_USB_HOST_HCINTMSK10_CHHLTDMSK_MSB 1
37320 /* The width in bits of the ALT_USB_HOST_HCINTMSK10_CHHLTDMSK register field. */
37321 #define ALT_USB_HOST_HCINTMSK10_CHHLTDMSK_WIDTH 1
37322 /* The mask used to set the ALT_USB_HOST_HCINTMSK10_CHHLTDMSK register field value. */
37323 #define ALT_USB_HOST_HCINTMSK10_CHHLTDMSK_SET_MSK 0x00000002
37324 /* The mask used to clear the ALT_USB_HOST_HCINTMSK10_CHHLTDMSK register field value. */
37325 #define ALT_USB_HOST_HCINTMSK10_CHHLTDMSK_CLR_MSK 0xfffffffd
37326 /* The reset value of the ALT_USB_HOST_HCINTMSK10_CHHLTDMSK register field. */
37327 #define ALT_USB_HOST_HCINTMSK10_CHHLTDMSK_RESET 0x0
37328 /* Extracts the ALT_USB_HOST_HCINTMSK10_CHHLTDMSK field value from a register. */
37329 #define ALT_USB_HOST_HCINTMSK10_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
37330 /* Produces a ALT_USB_HOST_HCINTMSK10_CHHLTDMSK register field value suitable for setting the register. */
37331 #define ALT_USB_HOST_HCINTMSK10_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
37332 
37333 /*
37334  * Field : AHB Error Mask - ahberrmsk
37335  *
37336  * In scatter/gather DMA mode for host, interrupts will not be generated due to
37337  * the corresponding bits set in HCINTn.
37338  *
37339  * Field Enumeration Values:
37340  *
37341  * Enum | Value | Description
37342  * :------------------------------------------|:------|:------------
37343  * ALT_USB_HOST_HCINTMSK10_AHBERRMSK_E_MSK | 0x0 | Mask
37344  * ALT_USB_HOST_HCINTMSK10_AHBERRMSK_E_NOMSK | 0x1 | No mask
37345  *
37346  * Field Access Macros:
37347  *
37348  */
37349 /*
37350  * Enumerated value for register field ALT_USB_HOST_HCINTMSK10_AHBERRMSK
37351  *
37352  * Mask
37353  */
37354 #define ALT_USB_HOST_HCINTMSK10_AHBERRMSK_E_MSK 0x0
37355 /*
37356  * Enumerated value for register field ALT_USB_HOST_HCINTMSK10_AHBERRMSK
37357  *
37358  * No mask
37359  */
37360 #define ALT_USB_HOST_HCINTMSK10_AHBERRMSK_E_NOMSK 0x1
37361 
37362 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK10_AHBERRMSK register field. */
37363 #define ALT_USB_HOST_HCINTMSK10_AHBERRMSK_LSB 2
37364 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK10_AHBERRMSK register field. */
37365 #define ALT_USB_HOST_HCINTMSK10_AHBERRMSK_MSB 2
37366 /* The width in bits of the ALT_USB_HOST_HCINTMSK10_AHBERRMSK register field. */
37367 #define ALT_USB_HOST_HCINTMSK10_AHBERRMSK_WIDTH 1
37368 /* The mask used to set the ALT_USB_HOST_HCINTMSK10_AHBERRMSK register field value. */
37369 #define ALT_USB_HOST_HCINTMSK10_AHBERRMSK_SET_MSK 0x00000004
37370 /* The mask used to clear the ALT_USB_HOST_HCINTMSK10_AHBERRMSK register field value. */
37371 #define ALT_USB_HOST_HCINTMSK10_AHBERRMSK_CLR_MSK 0xfffffffb
37372 /* The reset value of the ALT_USB_HOST_HCINTMSK10_AHBERRMSK register field. */
37373 #define ALT_USB_HOST_HCINTMSK10_AHBERRMSK_RESET 0x0
37374 /* Extracts the ALT_USB_HOST_HCINTMSK10_AHBERRMSK field value from a register. */
37375 #define ALT_USB_HOST_HCINTMSK10_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
37376 /* Produces a ALT_USB_HOST_HCINTMSK10_AHBERRMSK register field value suitable for setting the register. */
37377 #define ALT_USB_HOST_HCINTMSK10_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
37378 
37379 /*
37380  * Field : BNA Interrupt mask - bnaintrmsk
37381  *
37382  * This bit is valid only when Scatter/Gather DMA mode is enabled.
37383  *
37384  * Field Enumeration Values:
37385  *
37386  * Enum | Value | Description
37387  * :-------------------------------------------|:------|:------------
37388  * ALT_USB_HOST_HCINTMSK10_BNAINTRMSK_E_MSK | 0x0 | Mask
37389  * ALT_USB_HOST_HCINTMSK10_BNAINTRMSK_E_NOMSK | 0x1 | No mask
37390  *
37391  * Field Access Macros:
37392  *
37393  */
37394 /*
37395  * Enumerated value for register field ALT_USB_HOST_HCINTMSK10_BNAINTRMSK
37396  *
37397  * Mask
37398  */
37399 #define ALT_USB_HOST_HCINTMSK10_BNAINTRMSK_E_MSK 0x0
37400 /*
37401  * Enumerated value for register field ALT_USB_HOST_HCINTMSK10_BNAINTRMSK
37402  *
37403  * No mask
37404  */
37405 #define ALT_USB_HOST_HCINTMSK10_BNAINTRMSK_E_NOMSK 0x1
37406 
37407 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK10_BNAINTRMSK register field. */
37408 #define ALT_USB_HOST_HCINTMSK10_BNAINTRMSK_LSB 11
37409 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK10_BNAINTRMSK register field. */
37410 #define ALT_USB_HOST_HCINTMSK10_BNAINTRMSK_MSB 11
37411 /* The width in bits of the ALT_USB_HOST_HCINTMSK10_BNAINTRMSK register field. */
37412 #define ALT_USB_HOST_HCINTMSK10_BNAINTRMSK_WIDTH 1
37413 /* The mask used to set the ALT_USB_HOST_HCINTMSK10_BNAINTRMSK register field value. */
37414 #define ALT_USB_HOST_HCINTMSK10_BNAINTRMSK_SET_MSK 0x00000800
37415 /* The mask used to clear the ALT_USB_HOST_HCINTMSK10_BNAINTRMSK register field value. */
37416 #define ALT_USB_HOST_HCINTMSK10_BNAINTRMSK_CLR_MSK 0xfffff7ff
37417 /* The reset value of the ALT_USB_HOST_HCINTMSK10_BNAINTRMSK register field. */
37418 #define ALT_USB_HOST_HCINTMSK10_BNAINTRMSK_RESET 0x0
37419 /* Extracts the ALT_USB_HOST_HCINTMSK10_BNAINTRMSK field value from a register. */
37420 #define ALT_USB_HOST_HCINTMSK10_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
37421 /* Produces a ALT_USB_HOST_HCINTMSK10_BNAINTRMSK register field value suitable for setting the register. */
37422 #define ALT_USB_HOST_HCINTMSK10_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
37423 
37424 /*
37425  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
37426  *
37427  * This bit is valid only when Scatter/Gather DMA mode is enabled.
37428  *
37429  * Field Enumeration Values:
37430  *
37431  * Enum | Value | Description
37432  * :----------------------------------------------------|:------|:------------
37433  * ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
37434  * ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
37435  *
37436  * Field Access Macros:
37437  *
37438  */
37439 /*
37440  * Enumerated value for register field ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK
37441  *
37442  * Mask
37443  */
37444 #define ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK_E_MSK 0x0
37445 /*
37446  * Enumerated value for register field ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK
37447  *
37448  * No mask
37449  */
37450 #define ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
37451 
37452 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK register field. */
37453 #define ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK_LSB 13
37454 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK register field. */
37455 #define ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK_MSB 13
37456 /* The width in bits of the ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK register field. */
37457 #define ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK_WIDTH 1
37458 /* The mask used to set the ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK register field value. */
37459 #define ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
37460 /* The mask used to clear the ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK register field value. */
37461 #define ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
37462 /* The reset value of the ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK register field. */
37463 #define ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK_RESET 0x0
37464 /* Extracts the ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK field value from a register. */
37465 #define ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
37466 /* Produces a ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
37467 #define ALT_USB_HOST_HCINTMSK10_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
37468 
37469 #ifndef __ASSEMBLY__
37470 /*
37471  * WARNING: The C register and register group struct declarations are provided for
37472  * convenience and illustrative purposes. They should, however, be used with
37473  * caution as the C language standard provides no guarantees about the alignment or
37474  * atomicity of device memory accesses. The recommended practice for writing
37475  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
37476  * alt_write_word() functions.
37477  *
37478  * The struct declaration for register ALT_USB_HOST_HCINTMSK10.
37479  */
37480 struct ALT_USB_HOST_HCINTMSK10_s
37481 {
37482  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
37483  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
37484  uint32_t ahberrmsk : 1; /* AHB Error Mask */
37485  uint32_t : 8; /* *UNDEFINED* */
37486  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
37487  uint32_t : 1; /* *UNDEFINED* */
37488  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
37489  uint32_t : 18; /* *UNDEFINED* */
37490 };
37491 
37492 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK10. */
37493 typedef volatile struct ALT_USB_HOST_HCINTMSK10_s ALT_USB_HOST_HCINTMSK10_t;
37494 #endif /* __ASSEMBLY__ */
37495 
37496 /* The byte offset of the ALT_USB_HOST_HCINTMSK10 register from the beginning of the component. */
37497 #define ALT_USB_HOST_HCINTMSK10_OFST 0x24c
37498 /* The address of the ALT_USB_HOST_HCINTMSK10 register. */
37499 #define ALT_USB_HOST_HCINTMSK10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK10_OFST))
37500 
37501 /*
37502  * Register : Host Channel 10 Transfer Size Register - hctsiz10
37503  *
37504  * Buffer DMA Mode
37505  *
37506  * Register Layout
37507  *
37508  * Bits | Access | Reset | Description
37509  * :--------|:-------|:------|:--------------
37510  * [18:0] | RW | 0x0 | Transfer Size
37511  * [28:19] | RW | 0x0 | Packet Count
37512  * [30:29] | RW | 0x0 | PID
37513  * [31] | RW | 0x0 | Do Ping
37514  *
37515  */
37516 /*
37517  * Field : Transfer Size - xfersize
37518  *
37519  * for an OUT, this field is the number of data bytes the host sends during the
37520  * transfer. for an IN, this field is the buffer size that the application has
37521  * Reserved for the transfer. The application is expected to program this field as
37522  * an integer multiple of the maximum packet size for IN transactions (periodic and
37523  * non-periodic).The width of this counter is specified as 19 bits.
37524  *
37525  * Field Access Macros:
37526  *
37527  */
37528 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ10_XFERSIZE register field. */
37529 #define ALT_USB_HOST_HCTSIZ10_XFERSIZE_LSB 0
37530 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ10_XFERSIZE register field. */
37531 #define ALT_USB_HOST_HCTSIZ10_XFERSIZE_MSB 18
37532 /* The width in bits of the ALT_USB_HOST_HCTSIZ10_XFERSIZE register field. */
37533 #define ALT_USB_HOST_HCTSIZ10_XFERSIZE_WIDTH 19
37534 /* The mask used to set the ALT_USB_HOST_HCTSIZ10_XFERSIZE register field value. */
37535 #define ALT_USB_HOST_HCTSIZ10_XFERSIZE_SET_MSK 0x0007ffff
37536 /* The mask used to clear the ALT_USB_HOST_HCTSIZ10_XFERSIZE register field value. */
37537 #define ALT_USB_HOST_HCTSIZ10_XFERSIZE_CLR_MSK 0xfff80000
37538 /* The reset value of the ALT_USB_HOST_HCTSIZ10_XFERSIZE register field. */
37539 #define ALT_USB_HOST_HCTSIZ10_XFERSIZE_RESET 0x0
37540 /* Extracts the ALT_USB_HOST_HCTSIZ10_XFERSIZE field value from a register. */
37541 #define ALT_USB_HOST_HCTSIZ10_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
37542 /* Produces a ALT_USB_HOST_HCTSIZ10_XFERSIZE register field value suitable for setting the register. */
37543 #define ALT_USB_HOST_HCTSIZ10_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
37544 
37545 /*
37546  * Field : Packet Count - pktcnt
37547  *
37548  * This field is programmed by the application with the expected number of packets
37549  * to be transmitted (OUT) or received (IN). The host decrements this count on
37550  * every successful transmission or reception of an OUT/IN packet. Once this count
37551  * reaches zero, the application is interrupted to indicate normal completion. The
37552  * width of this counter is specified as 10 bits.
37553  *
37554  * Field Access Macros:
37555  *
37556  */
37557 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ10_PKTCNT register field. */
37558 #define ALT_USB_HOST_HCTSIZ10_PKTCNT_LSB 19
37559 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ10_PKTCNT register field. */
37560 #define ALT_USB_HOST_HCTSIZ10_PKTCNT_MSB 28
37561 /* The width in bits of the ALT_USB_HOST_HCTSIZ10_PKTCNT register field. */
37562 #define ALT_USB_HOST_HCTSIZ10_PKTCNT_WIDTH 10
37563 /* The mask used to set the ALT_USB_HOST_HCTSIZ10_PKTCNT register field value. */
37564 #define ALT_USB_HOST_HCTSIZ10_PKTCNT_SET_MSK 0x1ff80000
37565 /* The mask used to clear the ALT_USB_HOST_HCTSIZ10_PKTCNT register field value. */
37566 #define ALT_USB_HOST_HCTSIZ10_PKTCNT_CLR_MSK 0xe007ffff
37567 /* The reset value of the ALT_USB_HOST_HCTSIZ10_PKTCNT register field. */
37568 #define ALT_USB_HOST_HCTSIZ10_PKTCNT_RESET 0x0
37569 /* Extracts the ALT_USB_HOST_HCTSIZ10_PKTCNT field value from a register. */
37570 #define ALT_USB_HOST_HCTSIZ10_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
37571 /* Produces a ALT_USB_HOST_HCTSIZ10_PKTCNT register field value suitable for setting the register. */
37572 #define ALT_USB_HOST_HCTSIZ10_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
37573 
37574 /*
37575  * Field : PID - pid
37576  *
37577  * The application programs this field with the type of PID to use forthe initial
37578  * transaction. The host maintains this field for the rest of the transfer.
37579  *
37580  * Field Enumeration Values:
37581  *
37582  * Enum | Value | Description
37583  * :----------------------------------|:------|:------------------------------------
37584  * ALT_USB_HOST_HCTSIZ10_PID_E_DATA0 | 0x0 | DATA0
37585  * ALT_USB_HOST_HCTSIZ10_PID_E_DATA2 | 0x1 | DATA2
37586  * ALT_USB_HOST_HCTSIZ10_PID_E_DATA1 | 0x2 | DATA1
37587  * ALT_USB_HOST_HCTSIZ10_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
37588  *
37589  * Field Access Macros:
37590  *
37591  */
37592 /*
37593  * Enumerated value for register field ALT_USB_HOST_HCTSIZ10_PID
37594  *
37595  * DATA0
37596  */
37597 #define ALT_USB_HOST_HCTSIZ10_PID_E_DATA0 0x0
37598 /*
37599  * Enumerated value for register field ALT_USB_HOST_HCTSIZ10_PID
37600  *
37601  * DATA2
37602  */
37603 #define ALT_USB_HOST_HCTSIZ10_PID_E_DATA2 0x1
37604 /*
37605  * Enumerated value for register field ALT_USB_HOST_HCTSIZ10_PID
37606  *
37607  * DATA1
37608  */
37609 #define ALT_USB_HOST_HCTSIZ10_PID_E_DATA1 0x2
37610 /*
37611  * Enumerated value for register field ALT_USB_HOST_HCTSIZ10_PID
37612  *
37613  * MDATA (non-control)/SETUP (control)
37614  */
37615 #define ALT_USB_HOST_HCTSIZ10_PID_E_MDATA 0x3
37616 
37617 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ10_PID register field. */
37618 #define ALT_USB_HOST_HCTSIZ10_PID_LSB 29
37619 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ10_PID register field. */
37620 #define ALT_USB_HOST_HCTSIZ10_PID_MSB 30
37621 /* The width in bits of the ALT_USB_HOST_HCTSIZ10_PID register field. */
37622 #define ALT_USB_HOST_HCTSIZ10_PID_WIDTH 2
37623 /* The mask used to set the ALT_USB_HOST_HCTSIZ10_PID register field value. */
37624 #define ALT_USB_HOST_HCTSIZ10_PID_SET_MSK 0x60000000
37625 /* The mask used to clear the ALT_USB_HOST_HCTSIZ10_PID register field value. */
37626 #define ALT_USB_HOST_HCTSIZ10_PID_CLR_MSK 0x9fffffff
37627 /* The reset value of the ALT_USB_HOST_HCTSIZ10_PID register field. */
37628 #define ALT_USB_HOST_HCTSIZ10_PID_RESET 0x0
37629 /* Extracts the ALT_USB_HOST_HCTSIZ10_PID field value from a register. */
37630 #define ALT_USB_HOST_HCTSIZ10_PID_GET(value) (((value) & 0x60000000) >> 29)
37631 /* Produces a ALT_USB_HOST_HCTSIZ10_PID register field value suitable for setting the register. */
37632 #define ALT_USB_HOST_HCTSIZ10_PID_SET(value) (((value) << 29) & 0x60000000)
37633 
37634 /*
37635  * Field : Do Ping - dopng
37636  *
37637  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
37638  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
37639  * for IN transfers it disables the channel.
37640  *
37641  * Field Enumeration Values:
37642  *
37643  * Enum | Value | Description
37644  * :-------------------------------------|:------|:-----------------
37645  * ALT_USB_HOST_HCTSIZ10_DOPNG_E_NOPING | 0x0 | No ping protocol
37646  * ALT_USB_HOST_HCTSIZ10_DOPNG_E_PING | 0x1 | Ping protocol
37647  *
37648  * Field Access Macros:
37649  *
37650  */
37651 /*
37652  * Enumerated value for register field ALT_USB_HOST_HCTSIZ10_DOPNG
37653  *
37654  * No ping protocol
37655  */
37656 #define ALT_USB_HOST_HCTSIZ10_DOPNG_E_NOPING 0x0
37657 /*
37658  * Enumerated value for register field ALT_USB_HOST_HCTSIZ10_DOPNG
37659  *
37660  * Ping protocol
37661  */
37662 #define ALT_USB_HOST_HCTSIZ10_DOPNG_E_PING 0x1
37663 
37664 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ10_DOPNG register field. */
37665 #define ALT_USB_HOST_HCTSIZ10_DOPNG_LSB 31
37666 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ10_DOPNG register field. */
37667 #define ALT_USB_HOST_HCTSIZ10_DOPNG_MSB 31
37668 /* The width in bits of the ALT_USB_HOST_HCTSIZ10_DOPNG register field. */
37669 #define ALT_USB_HOST_HCTSIZ10_DOPNG_WIDTH 1
37670 /* The mask used to set the ALT_USB_HOST_HCTSIZ10_DOPNG register field value. */
37671 #define ALT_USB_HOST_HCTSIZ10_DOPNG_SET_MSK 0x80000000
37672 /* The mask used to clear the ALT_USB_HOST_HCTSIZ10_DOPNG register field value. */
37673 #define ALT_USB_HOST_HCTSIZ10_DOPNG_CLR_MSK 0x7fffffff
37674 /* The reset value of the ALT_USB_HOST_HCTSIZ10_DOPNG register field. */
37675 #define ALT_USB_HOST_HCTSIZ10_DOPNG_RESET 0x0
37676 /* Extracts the ALT_USB_HOST_HCTSIZ10_DOPNG field value from a register. */
37677 #define ALT_USB_HOST_HCTSIZ10_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
37678 /* Produces a ALT_USB_HOST_HCTSIZ10_DOPNG register field value suitable for setting the register. */
37679 #define ALT_USB_HOST_HCTSIZ10_DOPNG_SET(value) (((value) << 31) & 0x80000000)
37680 
37681 #ifndef __ASSEMBLY__
37682 /*
37683  * WARNING: The C register and register group struct declarations are provided for
37684  * convenience and illustrative purposes. They should, however, be used with
37685  * caution as the C language standard provides no guarantees about the alignment or
37686  * atomicity of device memory accesses. The recommended practice for writing
37687  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
37688  * alt_write_word() functions.
37689  *
37690  * The struct declaration for register ALT_USB_HOST_HCTSIZ10.
37691  */
37692 struct ALT_USB_HOST_HCTSIZ10_s
37693 {
37694  uint32_t xfersize : 19; /* Transfer Size */
37695  uint32_t pktcnt : 10; /* Packet Count */
37696  uint32_t pid : 2; /* PID */
37697  uint32_t dopng : 1; /* Do Ping */
37698 };
37699 
37700 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ10. */
37701 typedef volatile struct ALT_USB_HOST_HCTSIZ10_s ALT_USB_HOST_HCTSIZ10_t;
37702 #endif /* __ASSEMBLY__ */
37703 
37704 /* The byte offset of the ALT_USB_HOST_HCTSIZ10 register from the beginning of the component. */
37705 #define ALT_USB_HOST_HCTSIZ10_OFST 0x250
37706 /* The address of the ALT_USB_HOST_HCTSIZ10 register. */
37707 #define ALT_USB_HOST_HCTSIZ10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ10_OFST))
37708 
37709 /*
37710  * Register : Host Channel 10 DMA Address Register - hcdma10
37711  *
37712  * This register is used by the OTG host in the internal DMA mode to maintain the
37713  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
37714  * DWORD-aligned.
37715  *
37716  * Register Layout
37717  *
37718  * Bits | Access | Reset | Description
37719  * :-------|:-------|:------|:------------
37720  * [31:0] | RW | 0x0 | DMA Address
37721  *
37722  */
37723 /*
37724  * Field : DMA Address - hcdma10
37725  *
37726  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
37727  * first descriptor in the list should be located in this address. The first
37728  * descriptor may be or may not be ready. The core starts processing the list from
37729  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
37730  * in which the isochronous descriptors are present where N is based on nTD as per
37731  * Table below
37732  *
37733  * [31:N] Base Address [N-1:3] Offset [2:0] 000
37734  *
37735  * HS ISOC FS ISOC
37736  *
37737  * nTD N nTD N
37738  *
37739  * 7 6 1 4
37740  *
37741  * 15 7 3 5
37742  *
37743  * 31 8 7 6
37744  *
37745  * 63 9 15 7
37746  *
37747  * 127 10 31 8
37748  *
37749  * 255 11 63 9
37750  *
37751  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
37752  * This value is in terms of number of descriptors. The values can be from 0 to 63.
37753  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
37754  * descriptor processed in the list. This field is updated both by application and
37755  * the core. for example, if the application enables the channel after programming
37756  * CTD=5, then the core will start processing the 6th descriptor. The address is
37757  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
37758  * CTD for isochronous is based on the current frame/microframe value. Need to be
37759  * set to zero by application.
37760  *
37761  * Field Access Macros:
37762  *
37763  */
37764 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA10_HCDMA10 register field. */
37765 #define ALT_USB_HOST_HCDMA10_HCDMA10_LSB 0
37766 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA10_HCDMA10 register field. */
37767 #define ALT_USB_HOST_HCDMA10_HCDMA10_MSB 31
37768 /* The width in bits of the ALT_USB_HOST_HCDMA10_HCDMA10 register field. */
37769 #define ALT_USB_HOST_HCDMA10_HCDMA10_WIDTH 32
37770 /* The mask used to set the ALT_USB_HOST_HCDMA10_HCDMA10 register field value. */
37771 #define ALT_USB_HOST_HCDMA10_HCDMA10_SET_MSK 0xffffffff
37772 /* The mask used to clear the ALT_USB_HOST_HCDMA10_HCDMA10 register field value. */
37773 #define ALT_USB_HOST_HCDMA10_HCDMA10_CLR_MSK 0x00000000
37774 /* The reset value of the ALT_USB_HOST_HCDMA10_HCDMA10 register field. */
37775 #define ALT_USB_HOST_HCDMA10_HCDMA10_RESET 0x0
37776 /* Extracts the ALT_USB_HOST_HCDMA10_HCDMA10 field value from a register. */
37777 #define ALT_USB_HOST_HCDMA10_HCDMA10_GET(value) (((value) & 0xffffffff) >> 0)
37778 /* Produces a ALT_USB_HOST_HCDMA10_HCDMA10 register field value suitable for setting the register. */
37779 #define ALT_USB_HOST_HCDMA10_HCDMA10_SET(value) (((value) << 0) & 0xffffffff)
37780 
37781 #ifndef __ASSEMBLY__
37782 /*
37783  * WARNING: The C register and register group struct declarations are provided for
37784  * convenience and illustrative purposes. They should, however, be used with
37785  * caution as the C language standard provides no guarantees about the alignment or
37786  * atomicity of device memory accesses. The recommended practice for writing
37787  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
37788  * alt_write_word() functions.
37789  *
37790  * The struct declaration for register ALT_USB_HOST_HCDMA10.
37791  */
37792 struct ALT_USB_HOST_HCDMA10_s
37793 {
37794  uint32_t hcdma10 : 32; /* DMA Address */
37795 };
37796 
37797 /* The typedef declaration for register ALT_USB_HOST_HCDMA10. */
37798 typedef volatile struct ALT_USB_HOST_HCDMA10_s ALT_USB_HOST_HCDMA10_t;
37799 #endif /* __ASSEMBLY__ */
37800 
37801 /* The byte offset of the ALT_USB_HOST_HCDMA10 register from the beginning of the component. */
37802 #define ALT_USB_HOST_HCDMA10_OFST 0x254
37803 /* The address of the ALT_USB_HOST_HCDMA10 register. */
37804 #define ALT_USB_HOST_HCDMA10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA10_OFST))
37805 
37806 /*
37807  * Register : Host Channel 10 DMA Buffer Address Register - hcdmab10
37808  *
37809  * These registers are present only in case of Scatter/Gather DMA. These
37810  * registers are implemented in RAM instead of flop-based implementation. Holds
37811  * the current buffer address. This register is updated as and when the
37812  * data transfer for the corresponding end point is in progress. This
37813  * register is present only in Scatter/Gather DMA mode. Otherwise this field
37814  * is reserved.
37815  *
37816  * Register Layout
37817  *
37818  * Bits | Access | Reset | Description
37819  * :-------|:-------|:------|:-----------------------------------
37820  * [31:0] | RW | 0x0 | Host Channel 10 DMA Buffer Address
37821  *
37822  */
37823 /*
37824  * Field : Host Channel 10 DMA Buffer Address - hcdmab10
37825  *
37826  * These registers are present only in case of Scatter/Gather DMA. These
37827  * registers are implemented in RAM instead of flop-based implementation. Holds
37828  * the current buffer address. This register is updated as and when the data
37829  * transfer for the corresponding end point is in progress. This register is
37830  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
37831  *
37832  * Field Access Macros:
37833  *
37834  */
37835 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB10_HCDMAB10 register field. */
37836 #define ALT_USB_HOST_HCDMAB10_HCDMAB10_LSB 0
37837 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB10_HCDMAB10 register field. */
37838 #define ALT_USB_HOST_HCDMAB10_HCDMAB10_MSB 31
37839 /* The width in bits of the ALT_USB_HOST_HCDMAB10_HCDMAB10 register field. */
37840 #define ALT_USB_HOST_HCDMAB10_HCDMAB10_WIDTH 32
37841 /* The mask used to set the ALT_USB_HOST_HCDMAB10_HCDMAB10 register field value. */
37842 #define ALT_USB_HOST_HCDMAB10_HCDMAB10_SET_MSK 0xffffffff
37843 /* The mask used to clear the ALT_USB_HOST_HCDMAB10_HCDMAB10 register field value. */
37844 #define ALT_USB_HOST_HCDMAB10_HCDMAB10_CLR_MSK 0x00000000
37845 /* The reset value of the ALT_USB_HOST_HCDMAB10_HCDMAB10 register field. */
37846 #define ALT_USB_HOST_HCDMAB10_HCDMAB10_RESET 0x0
37847 /* Extracts the ALT_USB_HOST_HCDMAB10_HCDMAB10 field value from a register. */
37848 #define ALT_USB_HOST_HCDMAB10_HCDMAB10_GET(value) (((value) & 0xffffffff) >> 0)
37849 /* Produces a ALT_USB_HOST_HCDMAB10_HCDMAB10 register field value suitable for setting the register. */
37850 #define ALT_USB_HOST_HCDMAB10_HCDMAB10_SET(value) (((value) << 0) & 0xffffffff)
37851 
37852 #ifndef __ASSEMBLY__
37853 /*
37854  * WARNING: The C register and register group struct declarations are provided for
37855  * convenience and illustrative purposes. They should, however, be used with
37856  * caution as the C language standard provides no guarantees about the alignment or
37857  * atomicity of device memory accesses. The recommended practice for writing
37858  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
37859  * alt_write_word() functions.
37860  *
37861  * The struct declaration for register ALT_USB_HOST_HCDMAB10.
37862  */
37863 struct ALT_USB_HOST_HCDMAB10_s
37864 {
37865  uint32_t hcdmab10 : 32; /* Host Channel 10 DMA Buffer Address */
37866 };
37867 
37868 /* The typedef declaration for register ALT_USB_HOST_HCDMAB10. */
37869 typedef volatile struct ALT_USB_HOST_HCDMAB10_s ALT_USB_HOST_HCDMAB10_t;
37870 #endif /* __ASSEMBLY__ */
37871 
37872 /* The byte offset of the ALT_USB_HOST_HCDMAB10 register from the beginning of the component. */
37873 #define ALT_USB_HOST_HCDMAB10_OFST 0x258
37874 /* The address of the ALT_USB_HOST_HCDMAB10 register. */
37875 #define ALT_USB_HOST_HCDMAB10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB10_OFST))
37876 
37877 /*
37878  * Register : Host Channel 11 Characteristics Register - hcchar11
37879  *
37880  * Host Channel 11 Characteristics Register
37881  *
37882  * Register Layout
37883  *
37884  * Bits | Access | Reset | Description
37885  * :--------|:-------|:------|:--------------------
37886  * [10:0] | RW | 0x0 | Maximum Packet Size
37887  * [14:11] | RW | 0x0 | Endpoint Number
37888  * [15] | RW | 0x0 | Endpoint Direction
37889  * [16] | ??? | 0x0 | *UNDEFINED*
37890  * [17] | RW | 0x0 | Low-Speed Device
37891  * [19:18] | RW | 0x0 | Endpoint Type
37892  * [21:20] | RW | 0x0 | Multi Count
37893  * [28:22] | RW | 0x0 | Device Address
37894  * [29] | ??? | 0x0 | *UNDEFINED*
37895  * [30] | R | 0x0 | Channel Disable
37896  * [31] | R | 0x0 | Channel Enable
37897  *
37898  */
37899 /*
37900  * Field : Maximum Packet Size - mps
37901  *
37902  * Indicates the maximum packet size of the associated endpoint.
37903  *
37904  * Field Access Macros:
37905  *
37906  */
37907 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR11_MPS register field. */
37908 #define ALT_USB_HOST_HCCHAR11_MPS_LSB 0
37909 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR11_MPS register field. */
37910 #define ALT_USB_HOST_HCCHAR11_MPS_MSB 10
37911 /* The width in bits of the ALT_USB_HOST_HCCHAR11_MPS register field. */
37912 #define ALT_USB_HOST_HCCHAR11_MPS_WIDTH 11
37913 /* The mask used to set the ALT_USB_HOST_HCCHAR11_MPS register field value. */
37914 #define ALT_USB_HOST_HCCHAR11_MPS_SET_MSK 0x000007ff
37915 /* The mask used to clear the ALT_USB_HOST_HCCHAR11_MPS register field value. */
37916 #define ALT_USB_HOST_HCCHAR11_MPS_CLR_MSK 0xfffff800
37917 /* The reset value of the ALT_USB_HOST_HCCHAR11_MPS register field. */
37918 #define ALT_USB_HOST_HCCHAR11_MPS_RESET 0x0
37919 /* Extracts the ALT_USB_HOST_HCCHAR11_MPS field value from a register. */
37920 #define ALT_USB_HOST_HCCHAR11_MPS_GET(value) (((value) & 0x000007ff) >> 0)
37921 /* Produces a ALT_USB_HOST_HCCHAR11_MPS register field value suitable for setting the register. */
37922 #define ALT_USB_HOST_HCCHAR11_MPS_SET(value) (((value) << 0) & 0x000007ff)
37923 
37924 /*
37925  * Field : Endpoint Number - epnum
37926  *
37927  * Indicates the endpoint number on the device serving as the data source or sink.
37928  *
37929  * Field Enumeration Values:
37930  *
37931  * Enum | Value | Description
37932  * :--------------------------------------|:------|:--------------
37933  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT0 | 0x0 | End point 0
37934  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT1 | 0x1 | End point 1
37935  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT2 | 0x2 | End point 2
37936  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT3 | 0x3 | End point 3
37937  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT4 | 0x4 | End point 4
37938  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT5 | 0x5 | End point 5
37939  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT6 | 0x6 | End point 6
37940  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT7 | 0x7 | End point 7
37941  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT8 | 0x8 | End point 8
37942  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT9 | 0x9 | End point 9
37943  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT10 | 0xa | End point 10
37944  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT11 | 0xb | End point 11
37945  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT12 | 0xc | End point 12
37946  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT13 | 0xd | End point 13
37947  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT14 | 0xe | End point 14
37948  * ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT15 | 0xf | End point 15
37949  *
37950  * Field Access Macros:
37951  *
37952  */
37953 /*
37954  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
37955  *
37956  * End point 0
37957  */
37958 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT0 0x0
37959 /*
37960  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
37961  *
37962  * End point 1
37963  */
37964 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT1 0x1
37965 /*
37966  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
37967  *
37968  * End point 2
37969  */
37970 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT2 0x2
37971 /*
37972  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
37973  *
37974  * End point 3
37975  */
37976 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT3 0x3
37977 /*
37978  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
37979  *
37980  * End point 4
37981  */
37982 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT4 0x4
37983 /*
37984  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
37985  *
37986  * End point 5
37987  */
37988 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT5 0x5
37989 /*
37990  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
37991  *
37992  * End point 6
37993  */
37994 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT6 0x6
37995 /*
37996  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
37997  *
37998  * End point 7
37999  */
38000 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT7 0x7
38001 /*
38002  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
38003  *
38004  * End point 8
38005  */
38006 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT8 0x8
38007 /*
38008  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
38009  *
38010  * End point 9
38011  */
38012 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT9 0x9
38013 /*
38014  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
38015  *
38016  * End point 10
38017  */
38018 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT10 0xa
38019 /*
38020  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
38021  *
38022  * End point 11
38023  */
38024 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT11 0xb
38025 /*
38026  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
38027  *
38028  * End point 12
38029  */
38030 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT12 0xc
38031 /*
38032  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
38033  *
38034  * End point 13
38035  */
38036 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT13 0xd
38037 /*
38038  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
38039  *
38040  * End point 14
38041  */
38042 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT14 0xe
38043 /*
38044  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPNUM
38045  *
38046  * End point 15
38047  */
38048 #define ALT_USB_HOST_HCCHAR11_EPNUM_E_ENDPT15 0xf
38049 
38050 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR11_EPNUM register field. */
38051 #define ALT_USB_HOST_HCCHAR11_EPNUM_LSB 11
38052 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR11_EPNUM register field. */
38053 #define ALT_USB_HOST_HCCHAR11_EPNUM_MSB 14
38054 /* The width in bits of the ALT_USB_HOST_HCCHAR11_EPNUM register field. */
38055 #define ALT_USB_HOST_HCCHAR11_EPNUM_WIDTH 4
38056 /* The mask used to set the ALT_USB_HOST_HCCHAR11_EPNUM register field value. */
38057 #define ALT_USB_HOST_HCCHAR11_EPNUM_SET_MSK 0x00007800
38058 /* The mask used to clear the ALT_USB_HOST_HCCHAR11_EPNUM register field value. */
38059 #define ALT_USB_HOST_HCCHAR11_EPNUM_CLR_MSK 0xffff87ff
38060 /* The reset value of the ALT_USB_HOST_HCCHAR11_EPNUM register field. */
38061 #define ALT_USB_HOST_HCCHAR11_EPNUM_RESET 0x0
38062 /* Extracts the ALT_USB_HOST_HCCHAR11_EPNUM field value from a register. */
38063 #define ALT_USB_HOST_HCCHAR11_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
38064 /* Produces a ALT_USB_HOST_HCCHAR11_EPNUM register field value suitable for setting the register. */
38065 #define ALT_USB_HOST_HCCHAR11_EPNUM_SET(value) (((value) << 11) & 0x00007800)
38066 
38067 /*
38068  * Field : Endpoint Direction - epdir
38069  *
38070  * Indicates whether the transaction is IN or OUT.
38071  *
38072  * Field Enumeration Values:
38073  *
38074  * Enum | Value | Description
38075  * :----------------------------------|:------|:--------------
38076  * ALT_USB_HOST_HCCHAR11_EPDIR_E_OUT | 0x0 | OUT Direction
38077  * ALT_USB_HOST_HCCHAR11_EPDIR_E_IN | 0x1 | IN Direction
38078  *
38079  * Field Access Macros:
38080  *
38081  */
38082 /*
38083  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPDIR
38084  *
38085  * OUT Direction
38086  */
38087 #define ALT_USB_HOST_HCCHAR11_EPDIR_E_OUT 0x0
38088 /*
38089  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPDIR
38090  *
38091  * IN Direction
38092  */
38093 #define ALT_USB_HOST_HCCHAR11_EPDIR_E_IN 0x1
38094 
38095 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR11_EPDIR register field. */
38096 #define ALT_USB_HOST_HCCHAR11_EPDIR_LSB 15
38097 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR11_EPDIR register field. */
38098 #define ALT_USB_HOST_HCCHAR11_EPDIR_MSB 15
38099 /* The width in bits of the ALT_USB_HOST_HCCHAR11_EPDIR register field. */
38100 #define ALT_USB_HOST_HCCHAR11_EPDIR_WIDTH 1
38101 /* The mask used to set the ALT_USB_HOST_HCCHAR11_EPDIR register field value. */
38102 #define ALT_USB_HOST_HCCHAR11_EPDIR_SET_MSK 0x00008000
38103 /* The mask used to clear the ALT_USB_HOST_HCCHAR11_EPDIR register field value. */
38104 #define ALT_USB_HOST_HCCHAR11_EPDIR_CLR_MSK 0xffff7fff
38105 /* The reset value of the ALT_USB_HOST_HCCHAR11_EPDIR register field. */
38106 #define ALT_USB_HOST_HCCHAR11_EPDIR_RESET 0x0
38107 /* Extracts the ALT_USB_HOST_HCCHAR11_EPDIR field value from a register. */
38108 #define ALT_USB_HOST_HCCHAR11_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
38109 /* Produces a ALT_USB_HOST_HCCHAR11_EPDIR register field value suitable for setting the register. */
38110 #define ALT_USB_HOST_HCCHAR11_EPDIR_SET(value) (((value) << 15) & 0x00008000)
38111 
38112 /*
38113  * Field : Low-Speed Device - lspddev
38114  *
38115  * This field is set by the application to indicate that this channel is
38116  * communicating to a low-speed device. The application must program this bit when
38117  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
38118  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
38119  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
38120  * core ignores this bit even if it is set by the application software
38121  *
38122  * Field Enumeration Values:
38123  *
38124  * Enum | Value | Description
38125  * :-------------------------------------|:------|:----------------------------------------
38126  * ALT_USB_HOST_HCCHAR11_LSPDDEV_E_DISD | 0x0 | Not Communicating with low speed device
38127  * ALT_USB_HOST_HCCHAR11_LSPDDEV_E_END | 0x1 | Communicating with low speed device
38128  *
38129  * Field Access Macros:
38130  *
38131  */
38132 /*
38133  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_LSPDDEV
38134  *
38135  * Not Communicating with low speed device
38136  */
38137 #define ALT_USB_HOST_HCCHAR11_LSPDDEV_E_DISD 0x0
38138 /*
38139  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_LSPDDEV
38140  *
38141  * Communicating with low speed device
38142  */
38143 #define ALT_USB_HOST_HCCHAR11_LSPDDEV_E_END 0x1
38144 
38145 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR11_LSPDDEV register field. */
38146 #define ALT_USB_HOST_HCCHAR11_LSPDDEV_LSB 17
38147 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR11_LSPDDEV register field. */
38148 #define ALT_USB_HOST_HCCHAR11_LSPDDEV_MSB 17
38149 /* The width in bits of the ALT_USB_HOST_HCCHAR11_LSPDDEV register field. */
38150 #define ALT_USB_HOST_HCCHAR11_LSPDDEV_WIDTH 1
38151 /* The mask used to set the ALT_USB_HOST_HCCHAR11_LSPDDEV register field value. */
38152 #define ALT_USB_HOST_HCCHAR11_LSPDDEV_SET_MSK 0x00020000
38153 /* The mask used to clear the ALT_USB_HOST_HCCHAR11_LSPDDEV register field value. */
38154 #define ALT_USB_HOST_HCCHAR11_LSPDDEV_CLR_MSK 0xfffdffff
38155 /* The reset value of the ALT_USB_HOST_HCCHAR11_LSPDDEV register field. */
38156 #define ALT_USB_HOST_HCCHAR11_LSPDDEV_RESET 0x0
38157 /* Extracts the ALT_USB_HOST_HCCHAR11_LSPDDEV field value from a register. */
38158 #define ALT_USB_HOST_HCCHAR11_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
38159 /* Produces a ALT_USB_HOST_HCCHAR11_LSPDDEV register field value suitable for setting the register. */
38160 #define ALT_USB_HOST_HCCHAR11_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
38161 
38162 /*
38163  * Field : Endpoint Type - eptype
38164  *
38165  * Indicates the transfer type selected.
38166  *
38167  * Field Enumeration Values:
38168  *
38169  * Enum | Value | Description
38170  * :--------------------------------------|:------|:------------
38171  * ALT_USB_HOST_HCCHAR11_EPTYPE_E_CTL | 0x0 | Control
38172  * ALT_USB_HOST_HCCHAR11_EPTYPE_E_ISOC | 0x1 | Isochronous
38173  * ALT_USB_HOST_HCCHAR11_EPTYPE_E_BULK | 0x2 | Bulk
38174  * ALT_USB_HOST_HCCHAR11_EPTYPE_E_INTERR | 0x3 | Interrupt
38175  *
38176  * Field Access Macros:
38177  *
38178  */
38179 /*
38180  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPTYPE
38181  *
38182  * Control
38183  */
38184 #define ALT_USB_HOST_HCCHAR11_EPTYPE_E_CTL 0x0
38185 /*
38186  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPTYPE
38187  *
38188  * Isochronous
38189  */
38190 #define ALT_USB_HOST_HCCHAR11_EPTYPE_E_ISOC 0x1
38191 /*
38192  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPTYPE
38193  *
38194  * Bulk
38195  */
38196 #define ALT_USB_HOST_HCCHAR11_EPTYPE_E_BULK 0x2
38197 /*
38198  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EPTYPE
38199  *
38200  * Interrupt
38201  */
38202 #define ALT_USB_HOST_HCCHAR11_EPTYPE_E_INTERR 0x3
38203 
38204 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR11_EPTYPE register field. */
38205 #define ALT_USB_HOST_HCCHAR11_EPTYPE_LSB 18
38206 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR11_EPTYPE register field. */
38207 #define ALT_USB_HOST_HCCHAR11_EPTYPE_MSB 19
38208 /* The width in bits of the ALT_USB_HOST_HCCHAR11_EPTYPE register field. */
38209 #define ALT_USB_HOST_HCCHAR11_EPTYPE_WIDTH 2
38210 /* The mask used to set the ALT_USB_HOST_HCCHAR11_EPTYPE register field value. */
38211 #define ALT_USB_HOST_HCCHAR11_EPTYPE_SET_MSK 0x000c0000
38212 /* The mask used to clear the ALT_USB_HOST_HCCHAR11_EPTYPE register field value. */
38213 #define ALT_USB_HOST_HCCHAR11_EPTYPE_CLR_MSK 0xfff3ffff
38214 /* The reset value of the ALT_USB_HOST_HCCHAR11_EPTYPE register field. */
38215 #define ALT_USB_HOST_HCCHAR11_EPTYPE_RESET 0x0
38216 /* Extracts the ALT_USB_HOST_HCCHAR11_EPTYPE field value from a register. */
38217 #define ALT_USB_HOST_HCCHAR11_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
38218 /* Produces a ALT_USB_HOST_HCCHAR11_EPTYPE register field value suitable for setting the register. */
38219 #define ALT_USB_HOST_HCCHAR11_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
38220 
38221 /*
38222  * Field : Multi Count - ec
38223  *
38224  * When the Split Enable bit of the Host Channel-n Split Control register
38225  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
38226  * transactions that must be executed per microframe for this periodic endpoint.
38227  * for non periodic transfers, this field is used only in DMA mode, and specifies
38228  * the number packets to be fetched for this channel before the internal DMA engine
38229  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
38230  * number of immediate retries to be performed for a periodic split transactions on
38231  * transaction errors. This field must be set to at least 1.
38232  *
38233  * Field Enumeration Values:
38234  *
38235  * Enum | Value | Description
38236  * :--------------------------------------|:------|:----------------------------------------------
38237  * ALT_USB_HOST_HCCHAR11_EC_E_RSVD | 0x0 | Reserved This field yields undefined result
38238  * ALT_USB_HOST_HCCHAR11_EC_E_TRANSONE | 0x1 | 1 transaction
38239  * ALT_USB_HOST_HCCHAR11_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
38240  * : | | per microframe
38241  * ALT_USB_HOST_HCCHAR11_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
38242  * : | | per microframe
38243  *
38244  * Field Access Macros:
38245  *
38246  */
38247 /*
38248  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EC
38249  *
38250  * Reserved This field yields undefined result
38251  */
38252 #define ALT_USB_HOST_HCCHAR11_EC_E_RSVD 0x0
38253 /*
38254  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EC
38255  *
38256  * 1 transaction
38257  */
38258 #define ALT_USB_HOST_HCCHAR11_EC_E_TRANSONE 0x1
38259 /*
38260  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EC
38261  *
38262  * 2 transactions to be issued for this endpoint per microframe
38263  */
38264 #define ALT_USB_HOST_HCCHAR11_EC_E_TRANSTWO 0x2
38265 /*
38266  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_EC
38267  *
38268  * 3 transactions to be issued for this endpoint per microframe
38269  */
38270 #define ALT_USB_HOST_HCCHAR11_EC_E_TRANSTHREE 0x3
38271 
38272 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR11_EC register field. */
38273 #define ALT_USB_HOST_HCCHAR11_EC_LSB 20
38274 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR11_EC register field. */
38275 #define ALT_USB_HOST_HCCHAR11_EC_MSB 21
38276 /* The width in bits of the ALT_USB_HOST_HCCHAR11_EC register field. */
38277 #define ALT_USB_HOST_HCCHAR11_EC_WIDTH 2
38278 /* The mask used to set the ALT_USB_HOST_HCCHAR11_EC register field value. */
38279 #define ALT_USB_HOST_HCCHAR11_EC_SET_MSK 0x00300000
38280 /* The mask used to clear the ALT_USB_HOST_HCCHAR11_EC register field value. */
38281 #define ALT_USB_HOST_HCCHAR11_EC_CLR_MSK 0xffcfffff
38282 /* The reset value of the ALT_USB_HOST_HCCHAR11_EC register field. */
38283 #define ALT_USB_HOST_HCCHAR11_EC_RESET 0x0
38284 /* Extracts the ALT_USB_HOST_HCCHAR11_EC field value from a register. */
38285 #define ALT_USB_HOST_HCCHAR11_EC_GET(value) (((value) & 0x00300000) >> 20)
38286 /* Produces a ALT_USB_HOST_HCCHAR11_EC register field value suitable for setting the register. */
38287 #define ALT_USB_HOST_HCCHAR11_EC_SET(value) (((value) << 20) & 0x00300000)
38288 
38289 /*
38290  * Field : Device Address - devaddr
38291  *
38292  * This field selects the specific device serving as the data source or sink.
38293  *
38294  * Field Access Macros:
38295  *
38296  */
38297 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR11_DEVADDR register field. */
38298 #define ALT_USB_HOST_HCCHAR11_DEVADDR_LSB 22
38299 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR11_DEVADDR register field. */
38300 #define ALT_USB_HOST_HCCHAR11_DEVADDR_MSB 28
38301 /* The width in bits of the ALT_USB_HOST_HCCHAR11_DEVADDR register field. */
38302 #define ALT_USB_HOST_HCCHAR11_DEVADDR_WIDTH 7
38303 /* The mask used to set the ALT_USB_HOST_HCCHAR11_DEVADDR register field value. */
38304 #define ALT_USB_HOST_HCCHAR11_DEVADDR_SET_MSK 0x1fc00000
38305 /* The mask used to clear the ALT_USB_HOST_HCCHAR11_DEVADDR register field value. */
38306 #define ALT_USB_HOST_HCCHAR11_DEVADDR_CLR_MSK 0xe03fffff
38307 /* The reset value of the ALT_USB_HOST_HCCHAR11_DEVADDR register field. */
38308 #define ALT_USB_HOST_HCCHAR11_DEVADDR_RESET 0x0
38309 /* Extracts the ALT_USB_HOST_HCCHAR11_DEVADDR field value from a register. */
38310 #define ALT_USB_HOST_HCCHAR11_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
38311 /* Produces a ALT_USB_HOST_HCCHAR11_DEVADDR register field value suitable for setting the register. */
38312 #define ALT_USB_HOST_HCCHAR11_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
38313 
38314 /*
38315  * Field : Channel Disable - chdis
38316  *
38317  * The application sets this bit to stop transmitting/receiving data on a channel,
38318  * even before the transfer for that channel is complete. The application must wait
38319  * for the Channel Disabled interrupt before treating the channel as disabled.
38320  *
38321  * Field Enumeration Values:
38322  *
38323  * Enum | Value | Description
38324  * :------------------------------------|:------|:----------------------------
38325  * ALT_USB_HOST_HCCHAR11_CHDIS_E_INACT | 0x0 | Transmit/Recieve normal
38326  * ALT_USB_HOST_HCCHAR11_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving
38327  *
38328  * Field Access Macros:
38329  *
38330  */
38331 /*
38332  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_CHDIS
38333  *
38334  * Transmit/Recieve normal
38335  */
38336 #define ALT_USB_HOST_HCCHAR11_CHDIS_E_INACT 0x0
38337 /*
38338  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_CHDIS
38339  *
38340  * Stop transmitting/receiving
38341  */
38342 #define ALT_USB_HOST_HCCHAR11_CHDIS_E_ACT 0x1
38343 
38344 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR11_CHDIS register field. */
38345 #define ALT_USB_HOST_HCCHAR11_CHDIS_LSB 30
38346 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR11_CHDIS register field. */
38347 #define ALT_USB_HOST_HCCHAR11_CHDIS_MSB 30
38348 /* The width in bits of the ALT_USB_HOST_HCCHAR11_CHDIS register field. */
38349 #define ALT_USB_HOST_HCCHAR11_CHDIS_WIDTH 1
38350 /* The mask used to set the ALT_USB_HOST_HCCHAR11_CHDIS register field value. */
38351 #define ALT_USB_HOST_HCCHAR11_CHDIS_SET_MSK 0x40000000
38352 /* The mask used to clear the ALT_USB_HOST_HCCHAR11_CHDIS register field value. */
38353 #define ALT_USB_HOST_HCCHAR11_CHDIS_CLR_MSK 0xbfffffff
38354 /* The reset value of the ALT_USB_HOST_HCCHAR11_CHDIS register field. */
38355 #define ALT_USB_HOST_HCCHAR11_CHDIS_RESET 0x0
38356 /* Extracts the ALT_USB_HOST_HCCHAR11_CHDIS field value from a register. */
38357 #define ALT_USB_HOST_HCCHAR11_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
38358 /* Produces a ALT_USB_HOST_HCCHAR11_CHDIS register field value suitable for setting the register. */
38359 #define ALT_USB_HOST_HCCHAR11_CHDIS_SET(value) (((value) << 30) & 0x40000000)
38360 
38361 /*
38362  * Field : Channel Enable - chena
38363  *
38364  * When Scatter/Gather mode is disabled This field is set by the application and
38365  * cleared by the OTG host.
38366  *
38367  * 0: Channel disabled
38368  *
38369  * 1: Channel enabled
38370  *
38371  * When Scatter/Gather mode is enabled.
38372  *
38373  * Field Enumeration Values:
38374  *
38375  * Enum | Value | Description
38376  * :------------------------------------|:------|:-------------------------------------------------
38377  * ALT_USB_HOST_HCCHAR11_CHENA_E_INACT | 0x0 | Indicates that the descriptor structure is not
38378  * : | | yet ready
38379  * ALT_USB_HOST_HCCHAR11_CHENA_E_ACT | 0x1 | Indicates that the descriptor structure and
38380  * : | | data buffer with data is setup and this
38381  * : | | channel can access the descriptor
38382  *
38383  * Field Access Macros:
38384  *
38385  */
38386 /*
38387  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_CHENA
38388  *
38389  * Indicates that the descriptor structure is not yet ready
38390  */
38391 #define ALT_USB_HOST_HCCHAR11_CHENA_E_INACT 0x0
38392 /*
38393  * Enumerated value for register field ALT_USB_HOST_HCCHAR11_CHENA
38394  *
38395  * Indicates that the descriptor structure and data buffer with data is
38396  * setup and this channel can access the descriptor
38397  */
38398 #define ALT_USB_HOST_HCCHAR11_CHENA_E_ACT 0x1
38399 
38400 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR11_CHENA register field. */
38401 #define ALT_USB_HOST_HCCHAR11_CHENA_LSB 31
38402 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR11_CHENA register field. */
38403 #define ALT_USB_HOST_HCCHAR11_CHENA_MSB 31
38404 /* The width in bits of the ALT_USB_HOST_HCCHAR11_CHENA register field. */
38405 #define ALT_USB_HOST_HCCHAR11_CHENA_WIDTH 1
38406 /* The mask used to set the ALT_USB_HOST_HCCHAR11_CHENA register field value. */
38407 #define ALT_USB_HOST_HCCHAR11_CHENA_SET_MSK 0x80000000
38408 /* The mask used to clear the ALT_USB_HOST_HCCHAR11_CHENA register field value. */
38409 #define ALT_USB_HOST_HCCHAR11_CHENA_CLR_MSK 0x7fffffff
38410 /* The reset value of the ALT_USB_HOST_HCCHAR11_CHENA register field. */
38411 #define ALT_USB_HOST_HCCHAR11_CHENA_RESET 0x0
38412 /* Extracts the ALT_USB_HOST_HCCHAR11_CHENA field value from a register. */
38413 #define ALT_USB_HOST_HCCHAR11_CHENA_GET(value) (((value) & 0x80000000) >> 31)
38414 /* Produces a ALT_USB_HOST_HCCHAR11_CHENA register field value suitable for setting the register. */
38415 #define ALT_USB_HOST_HCCHAR11_CHENA_SET(value) (((value) << 31) & 0x80000000)
38416 
38417 #ifndef __ASSEMBLY__
38418 /*
38419  * WARNING: The C register and register group struct declarations are provided for
38420  * convenience and illustrative purposes. They should, however, be used with
38421  * caution as the C language standard provides no guarantees about the alignment or
38422  * atomicity of device memory accesses. The recommended practice for writing
38423  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
38424  * alt_write_word() functions.
38425  *
38426  * The struct declaration for register ALT_USB_HOST_HCCHAR11.
38427  */
38428 struct ALT_USB_HOST_HCCHAR11_s
38429 {
38430  uint32_t mps : 11; /* Maximum Packet Size */
38431  uint32_t epnum : 4; /* Endpoint Number */
38432  uint32_t epdir : 1; /* Endpoint Direction */
38433  uint32_t : 1; /* *UNDEFINED* */
38434  uint32_t lspddev : 1; /* Low-Speed Device */
38435  uint32_t eptype : 2; /* Endpoint Type */
38436  uint32_t ec : 2; /* Multi Count */
38437  uint32_t devaddr : 7; /* Device Address */
38438  uint32_t : 1; /* *UNDEFINED* */
38439  const uint32_t chdis : 1; /* Channel Disable */
38440  const uint32_t chena : 1; /* Channel Enable */
38441 };
38442 
38443 /* The typedef declaration for register ALT_USB_HOST_HCCHAR11. */
38444 typedef volatile struct ALT_USB_HOST_HCCHAR11_s ALT_USB_HOST_HCCHAR11_t;
38445 #endif /* __ASSEMBLY__ */
38446 
38447 /* The byte offset of the ALT_USB_HOST_HCCHAR11 register from the beginning of the component. */
38448 #define ALT_USB_HOST_HCCHAR11_OFST 0x260
38449 /* The address of the ALT_USB_HOST_HCCHAR11 register. */
38450 #define ALT_USB_HOST_HCCHAR11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR11_OFST))
38451 
38452 /*
38453  * Register : Host Channel 11 Split Control Register - HCSPLT11
38454  *
38455  * Channel number 11.
38456  *
38457  * Register Layout
38458  *
38459  * Bits | Access | Reset | Description
38460  * :--------|:-------|:------|:---------------------
38461  * [6:0] | RW | 0x0 | Port Address
38462  * [13:7] | RW | 0x0 | Hub Address
38463  * [15:14] | RW | 0x0 | Transaction Position
38464  * [16] | RW | 0x0 | Do Complete Split
38465  * [30:17] | ??? | 0x0 | *UNDEFINED*
38466  * [31] | RW | 0x0 | Split Enable
38467  *
38468  */
38469 /*
38470  * Field : Port Address - prtaddr
38471  *
38472  * This field is the port number of the recipient transactiontranslator.
38473  *
38474  * Field Access Macros:
38475  *
38476  */
38477 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT11_PRTADDR register field. */
38478 #define ALT_USB_HOST_HCSPLT11_PRTADDR_LSB 0
38479 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT11_PRTADDR register field. */
38480 #define ALT_USB_HOST_HCSPLT11_PRTADDR_MSB 6
38481 /* The width in bits of the ALT_USB_HOST_HCSPLT11_PRTADDR register field. */
38482 #define ALT_USB_HOST_HCSPLT11_PRTADDR_WIDTH 7
38483 /* The mask used to set the ALT_USB_HOST_HCSPLT11_PRTADDR register field value. */
38484 #define ALT_USB_HOST_HCSPLT11_PRTADDR_SET_MSK 0x0000007f
38485 /* The mask used to clear the ALT_USB_HOST_HCSPLT11_PRTADDR register field value. */
38486 #define ALT_USB_HOST_HCSPLT11_PRTADDR_CLR_MSK 0xffffff80
38487 /* The reset value of the ALT_USB_HOST_HCSPLT11_PRTADDR register field. */
38488 #define ALT_USB_HOST_HCSPLT11_PRTADDR_RESET 0x0
38489 /* Extracts the ALT_USB_HOST_HCSPLT11_PRTADDR field value from a register. */
38490 #define ALT_USB_HOST_HCSPLT11_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
38491 /* Produces a ALT_USB_HOST_HCSPLT11_PRTADDR register field value suitable for setting the register. */
38492 #define ALT_USB_HOST_HCSPLT11_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
38493 
38494 /*
38495  * Field : Hub Address - hubaddr
38496  *
38497  * This field holds the device address of the transaction translator's hub.
38498  *
38499  * Field Access Macros:
38500  *
38501  */
38502 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT11_HUBADDR register field. */
38503 #define ALT_USB_HOST_HCSPLT11_HUBADDR_LSB 7
38504 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT11_HUBADDR register field. */
38505 #define ALT_USB_HOST_HCSPLT11_HUBADDR_MSB 13
38506 /* The width in bits of the ALT_USB_HOST_HCSPLT11_HUBADDR register field. */
38507 #define ALT_USB_HOST_HCSPLT11_HUBADDR_WIDTH 7
38508 /* The mask used to set the ALT_USB_HOST_HCSPLT11_HUBADDR register field value. */
38509 #define ALT_USB_HOST_HCSPLT11_HUBADDR_SET_MSK 0x00003f80
38510 /* The mask used to clear the ALT_USB_HOST_HCSPLT11_HUBADDR register field value. */
38511 #define ALT_USB_HOST_HCSPLT11_HUBADDR_CLR_MSK 0xffffc07f
38512 /* The reset value of the ALT_USB_HOST_HCSPLT11_HUBADDR register field. */
38513 #define ALT_USB_HOST_HCSPLT11_HUBADDR_RESET 0x0
38514 /* Extracts the ALT_USB_HOST_HCSPLT11_HUBADDR field value from a register. */
38515 #define ALT_USB_HOST_HCSPLT11_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
38516 /* Produces a ALT_USB_HOST_HCSPLT11_HUBADDR register field value suitable for setting the register. */
38517 #define ALT_USB_HOST_HCSPLT11_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
38518 
38519 /*
38520  * Field : Transaction Position - xactpos
38521  *
38522  * This field is used to determine whether to send all, first, middle, or last
38523  * payloads with each OUT transaction.
38524  *
38525  * Field Enumeration Values:
38526  *
38527  * Enum | Value | Description
38528  * :---------------------------------------|:------|:------------------------------------------------
38529  * ALT_USB_HOST_HCSPLT11_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
38530  * : | | transaction (which is larger than 188 bytes)
38531  * ALT_USB_HOST_HCSPLT11_XACTPOS_E_END | 0x1 | End. This is the last payload of this
38532  * : | | transaction (which is larger than 188 bytes)
38533  * ALT_USB_HOST_HCSPLT11_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
38534  * : | | transaction (which is larger than 188 bytes)
38535  * ALT_USB_HOST_HCSPLT11_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
38536  * : | | transaction (which is less than or equal to 188
38537  * : | | bytes)
38538  *
38539  * Field Access Macros:
38540  *
38541  */
38542 /*
38543  * Enumerated value for register field ALT_USB_HOST_HCSPLT11_XACTPOS
38544  *
38545  * Mid. This is the middle payload of this transaction (which is larger than 188
38546  * bytes)
38547  */
38548 #define ALT_USB_HOST_HCSPLT11_XACTPOS_E_MIDDLE 0x0
38549 /*
38550  * Enumerated value for register field ALT_USB_HOST_HCSPLT11_XACTPOS
38551  *
38552  * End. This is the last payload of this transaction (which is larger than 188
38553  * bytes)
38554  */
38555 #define ALT_USB_HOST_HCSPLT11_XACTPOS_E_END 0x1
38556 /*
38557  * Enumerated value for register field ALT_USB_HOST_HCSPLT11_XACTPOS
38558  *
38559  * Begin. This is the first data payload of this transaction (which is larger than
38560  * 188 bytes)
38561  */
38562 #define ALT_USB_HOST_HCSPLT11_XACTPOS_E_BEGIN 0x2
38563 /*
38564  * Enumerated value for register field ALT_USB_HOST_HCSPLT11_XACTPOS
38565  *
38566  * All. This is the entire data payload is of this transaction (which is less than
38567  * or equal to 188 bytes)
38568  */
38569 #define ALT_USB_HOST_HCSPLT11_XACTPOS_E_ALL 0x3
38570 
38571 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT11_XACTPOS register field. */
38572 #define ALT_USB_HOST_HCSPLT11_XACTPOS_LSB 14
38573 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT11_XACTPOS register field. */
38574 #define ALT_USB_HOST_HCSPLT11_XACTPOS_MSB 15
38575 /* The width in bits of the ALT_USB_HOST_HCSPLT11_XACTPOS register field. */
38576 #define ALT_USB_HOST_HCSPLT11_XACTPOS_WIDTH 2
38577 /* The mask used to set the ALT_USB_HOST_HCSPLT11_XACTPOS register field value. */
38578 #define ALT_USB_HOST_HCSPLT11_XACTPOS_SET_MSK 0x0000c000
38579 /* The mask used to clear the ALT_USB_HOST_HCSPLT11_XACTPOS register field value. */
38580 #define ALT_USB_HOST_HCSPLT11_XACTPOS_CLR_MSK 0xffff3fff
38581 /* The reset value of the ALT_USB_HOST_HCSPLT11_XACTPOS register field. */
38582 #define ALT_USB_HOST_HCSPLT11_XACTPOS_RESET 0x0
38583 /* Extracts the ALT_USB_HOST_HCSPLT11_XACTPOS field value from a register. */
38584 #define ALT_USB_HOST_HCSPLT11_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
38585 /* Produces a ALT_USB_HOST_HCSPLT11_XACTPOS register field value suitable for setting the register. */
38586 #define ALT_USB_HOST_HCSPLT11_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
38587 
38588 /*
38589  * Field : Do Complete Split - compsplt
38590  *
38591  * The application sets this field to request the OTG host to perform a complete
38592  * split transaction.
38593  *
38594  * Field Enumeration Values:
38595  *
38596  * Enum | Value | Description
38597  * :-----------------------------------------|:------|:---------------------
38598  * ALT_USB_HOST_HCSPLT11_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
38599  * ALT_USB_HOST_HCSPLT11_COMPSPLT_E_SPLIT | 0x1 | Split transaction
38600  *
38601  * Field Access Macros:
38602  *
38603  */
38604 /*
38605  * Enumerated value for register field ALT_USB_HOST_HCSPLT11_COMPSPLT
38606  *
38607  * No split transaction
38608  */
38609 #define ALT_USB_HOST_HCSPLT11_COMPSPLT_E_NOSPLIT 0x0
38610 /*
38611  * Enumerated value for register field ALT_USB_HOST_HCSPLT11_COMPSPLT
38612  *
38613  * Split transaction
38614  */
38615 #define ALT_USB_HOST_HCSPLT11_COMPSPLT_E_SPLIT 0x1
38616 
38617 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT11_COMPSPLT register field. */
38618 #define ALT_USB_HOST_HCSPLT11_COMPSPLT_LSB 16
38619 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT11_COMPSPLT register field. */
38620 #define ALT_USB_HOST_HCSPLT11_COMPSPLT_MSB 16
38621 /* The width in bits of the ALT_USB_HOST_HCSPLT11_COMPSPLT register field. */
38622 #define ALT_USB_HOST_HCSPLT11_COMPSPLT_WIDTH 1
38623 /* The mask used to set the ALT_USB_HOST_HCSPLT11_COMPSPLT register field value. */
38624 #define ALT_USB_HOST_HCSPLT11_COMPSPLT_SET_MSK 0x00010000
38625 /* The mask used to clear the ALT_USB_HOST_HCSPLT11_COMPSPLT register field value. */
38626 #define ALT_USB_HOST_HCSPLT11_COMPSPLT_CLR_MSK 0xfffeffff
38627 /* The reset value of the ALT_USB_HOST_HCSPLT11_COMPSPLT register field. */
38628 #define ALT_USB_HOST_HCSPLT11_COMPSPLT_RESET 0x0
38629 /* Extracts the ALT_USB_HOST_HCSPLT11_COMPSPLT field value from a register. */
38630 #define ALT_USB_HOST_HCSPLT11_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
38631 /* Produces a ALT_USB_HOST_HCSPLT11_COMPSPLT register field value suitable for setting the register. */
38632 #define ALT_USB_HOST_HCSPLT11_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
38633 
38634 /*
38635  * Field : Split Enable - spltena
38636  *
38637  * The application sets this field to indicate that this channel is enabled to
38638  * perform split transactions.
38639  *
38640  * Field Enumeration Values:
38641  *
38642  * Enum | Value | Description
38643  * :-------------------------------------|:------|:------------------
38644  * ALT_USB_HOST_HCSPLT11_SPLTENA_E_DISD | 0x0 | Split not enabled
38645  * ALT_USB_HOST_HCSPLT11_SPLTENA_E_END | 0x1 | Split enabled
38646  *
38647  * Field Access Macros:
38648  *
38649  */
38650 /*
38651  * Enumerated value for register field ALT_USB_HOST_HCSPLT11_SPLTENA
38652  *
38653  * Split not enabled
38654  */
38655 #define ALT_USB_HOST_HCSPLT11_SPLTENA_E_DISD 0x0
38656 /*
38657  * Enumerated value for register field ALT_USB_HOST_HCSPLT11_SPLTENA
38658  *
38659  * Split enabled
38660  */
38661 #define ALT_USB_HOST_HCSPLT11_SPLTENA_E_END 0x1
38662 
38663 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT11_SPLTENA register field. */
38664 #define ALT_USB_HOST_HCSPLT11_SPLTENA_LSB 31
38665 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT11_SPLTENA register field. */
38666 #define ALT_USB_HOST_HCSPLT11_SPLTENA_MSB 31
38667 /* The width in bits of the ALT_USB_HOST_HCSPLT11_SPLTENA register field. */
38668 #define ALT_USB_HOST_HCSPLT11_SPLTENA_WIDTH 1
38669 /* The mask used to set the ALT_USB_HOST_HCSPLT11_SPLTENA register field value. */
38670 #define ALT_USB_HOST_HCSPLT11_SPLTENA_SET_MSK 0x80000000
38671 /* The mask used to clear the ALT_USB_HOST_HCSPLT11_SPLTENA register field value. */
38672 #define ALT_USB_HOST_HCSPLT11_SPLTENA_CLR_MSK 0x7fffffff
38673 /* The reset value of the ALT_USB_HOST_HCSPLT11_SPLTENA register field. */
38674 #define ALT_USB_HOST_HCSPLT11_SPLTENA_RESET 0x0
38675 /* Extracts the ALT_USB_HOST_HCSPLT11_SPLTENA field value from a register. */
38676 #define ALT_USB_HOST_HCSPLT11_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
38677 /* Produces a ALT_USB_HOST_HCSPLT11_SPLTENA register field value suitable for setting the register. */
38678 #define ALT_USB_HOST_HCSPLT11_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
38679 
38680 #ifndef __ASSEMBLY__
38681 /*
38682  * WARNING: The C register and register group struct declarations are provided for
38683  * convenience and illustrative purposes. They should, however, be used with
38684  * caution as the C language standard provides no guarantees about the alignment or
38685  * atomicity of device memory accesses. The recommended practice for writing
38686  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
38687  * alt_write_word() functions.
38688  *
38689  * The struct declaration for register ALT_USB_HOST_HCSPLT11.
38690  */
38691 struct ALT_USB_HOST_HCSPLT11_s
38692 {
38693  uint32_t prtaddr : 7; /* Port Address */
38694  uint32_t hubaddr : 7; /* Hub Address */
38695  uint32_t xactpos : 2; /* Transaction Position */
38696  uint32_t compsplt : 1; /* Do Complete Split */
38697  uint32_t : 14; /* *UNDEFINED* */
38698  uint32_t spltena : 1; /* Split Enable */
38699 };
38700 
38701 /* The typedef declaration for register ALT_USB_HOST_HCSPLT11. */
38702 typedef volatile struct ALT_USB_HOST_HCSPLT11_s ALT_USB_HOST_HCSPLT11_t;
38703 #endif /* __ASSEMBLY__ */
38704 
38705 /* The byte offset of the ALT_USB_HOST_HCSPLT11 register from the beginning of the component. */
38706 #define ALT_USB_HOST_HCSPLT11_OFST 0x264
38707 /* The address of the ALT_USB_HOST_HCSPLT11 register. */
38708 #define ALT_USB_HOST_HCSPLT11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT11_OFST))
38709 
38710 /*
38711  * Register : Host Channel 11 Interrupt Register - hcint11
38712  *
38713  * This register indicates the status of a channel with respect to USB- and AHB-
38714  * related events. The application must read this register when the Host Channels
38715  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
38716  * application can read this register, it must first read the Host All Channels
38717  * Interrupt (HAINT) register to get the exact channel number for the Host
38718  * Channel-n Interrupt register. The application must clear the appropriate bit in
38719  * this register to clear the corresponding bits in the HAINT and GINTSTS
38720  * registers.
38721  *
38722  * Register Layout
38723  *
38724  * Bits | Access | Reset | Description
38725  * :--------|:-------|:------|:--------------------------------------------
38726  * [0] | R | 0x0 | Transfer Completed
38727  * [1] | R | 0x0 | Channel Halted
38728  * [2] | R | 0x0 | AHB Error
38729  * [3] | R | 0x0 | STALL Response Received Interrupt
38730  * [4] | R | 0x0 | NAK Response Received Interrupt
38731  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
38732  * [6] | R | 0x0 | NYET Response Received Interrupt
38733  * [7] | R | 0x0 | Transaction Error
38734  * [8] | R | 0x0 | Babble Error
38735  * [9] | R | 0x0 | Frame Overrun
38736  * [10] | R | 0x0 | Data Toggle Error
38737  * [11] | R | 0x0 | BNA Interrupt
38738  * [12] | R | 0x0 | Excessive Transaction Error
38739  * [13] | R | 0x0 | Descriptor rollover interrupt
38740  * [31:14] | ??? | 0x0 | *UNDEFINED*
38741  *
38742  */
38743 /*
38744  * Field : Transfer Completed - xfercompl
38745  *
38746  * Transfer completed normally without any errors. This bit can be set only by the
38747  * core and the application should write 1 to clear it.
38748  *
38749  * Field Enumeration Values:
38750  *
38751  * Enum | Value | Description
38752  * :---------------------------------------|:------|:-----------------------------------------------
38753  * ALT_USB_HOST_HCINT11_XFERCOMPL_E_INACT | 0x0 | No transfer
38754  * ALT_USB_HOST_HCINT11_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
38755  *
38756  * Field Access Macros:
38757  *
38758  */
38759 /*
38760  * Enumerated value for register field ALT_USB_HOST_HCINT11_XFERCOMPL
38761  *
38762  * No transfer
38763  */
38764 #define ALT_USB_HOST_HCINT11_XFERCOMPL_E_INACT 0x0
38765 /*
38766  * Enumerated value for register field ALT_USB_HOST_HCINT11_XFERCOMPL
38767  *
38768  * Transfer completed normally without any errors
38769  */
38770 #define ALT_USB_HOST_HCINT11_XFERCOMPL_E_ACT 0x1
38771 
38772 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_XFERCOMPL register field. */
38773 #define ALT_USB_HOST_HCINT11_XFERCOMPL_LSB 0
38774 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_XFERCOMPL register field. */
38775 #define ALT_USB_HOST_HCINT11_XFERCOMPL_MSB 0
38776 /* The width in bits of the ALT_USB_HOST_HCINT11_XFERCOMPL register field. */
38777 #define ALT_USB_HOST_HCINT11_XFERCOMPL_WIDTH 1
38778 /* The mask used to set the ALT_USB_HOST_HCINT11_XFERCOMPL register field value. */
38779 #define ALT_USB_HOST_HCINT11_XFERCOMPL_SET_MSK 0x00000001
38780 /* The mask used to clear the ALT_USB_HOST_HCINT11_XFERCOMPL register field value. */
38781 #define ALT_USB_HOST_HCINT11_XFERCOMPL_CLR_MSK 0xfffffffe
38782 /* The reset value of the ALT_USB_HOST_HCINT11_XFERCOMPL register field. */
38783 #define ALT_USB_HOST_HCINT11_XFERCOMPL_RESET 0x0
38784 /* Extracts the ALT_USB_HOST_HCINT11_XFERCOMPL field value from a register. */
38785 #define ALT_USB_HOST_HCINT11_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
38786 /* Produces a ALT_USB_HOST_HCINT11_XFERCOMPL register field value suitable for setting the register. */
38787 #define ALT_USB_HOST_HCINT11_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
38788 
38789 /*
38790  * Field : Channel Halted - chhltd
38791  *
38792  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
38793  * either because of any USB transaction error or in response to disable request by
38794  * the application or because of a completed transfer. In Scatter/gather DMA mode,
38795  * this indicates that transfer completed due to any of the following
38796  *
38797  * . EOL being set in descriptor
38798  *
38799  * . AHB error
38800  *
38801  * . Excessive transaction errors
38802  *
38803  * . Babble
38804  *
38805  * . Stall
38806  *
38807  * Field Enumeration Values:
38808  *
38809  * Enum | Value | Description
38810  * :------------------------------------|:------|:-------------------
38811  * ALT_USB_HOST_HCINT11_CHHLTD_E_INACT | 0x0 | Channel not halted
38812  * ALT_USB_HOST_HCINT11_CHHLTD_E_ACT | 0x1 | Channel Halted
38813  *
38814  * Field Access Macros:
38815  *
38816  */
38817 /*
38818  * Enumerated value for register field ALT_USB_HOST_HCINT11_CHHLTD
38819  *
38820  * Channel not halted
38821  */
38822 #define ALT_USB_HOST_HCINT11_CHHLTD_E_INACT 0x0
38823 /*
38824  * Enumerated value for register field ALT_USB_HOST_HCINT11_CHHLTD
38825  *
38826  * Channel Halted
38827  */
38828 #define ALT_USB_HOST_HCINT11_CHHLTD_E_ACT 0x1
38829 
38830 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_CHHLTD register field. */
38831 #define ALT_USB_HOST_HCINT11_CHHLTD_LSB 1
38832 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_CHHLTD register field. */
38833 #define ALT_USB_HOST_HCINT11_CHHLTD_MSB 1
38834 /* The width in bits of the ALT_USB_HOST_HCINT11_CHHLTD register field. */
38835 #define ALT_USB_HOST_HCINT11_CHHLTD_WIDTH 1
38836 /* The mask used to set the ALT_USB_HOST_HCINT11_CHHLTD register field value. */
38837 #define ALT_USB_HOST_HCINT11_CHHLTD_SET_MSK 0x00000002
38838 /* The mask used to clear the ALT_USB_HOST_HCINT11_CHHLTD register field value. */
38839 #define ALT_USB_HOST_HCINT11_CHHLTD_CLR_MSK 0xfffffffd
38840 /* The reset value of the ALT_USB_HOST_HCINT11_CHHLTD register field. */
38841 #define ALT_USB_HOST_HCINT11_CHHLTD_RESET 0x0
38842 /* Extracts the ALT_USB_HOST_HCINT11_CHHLTD field value from a register. */
38843 #define ALT_USB_HOST_HCINT11_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
38844 /* Produces a ALT_USB_HOST_HCINT11_CHHLTD register field value suitable for setting the register. */
38845 #define ALT_USB_HOST_HCINT11_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
38846 
38847 /*
38848  * Field : AHB Error - ahberr
38849  *
38850  * This is generated only in Internal DMA mode when there is an AHB error during
38851  * AHB read/write. The application can read the corresponding channel's DMA address
38852  * register to get the error address.
38853  *
38854  * Field Enumeration Values:
38855  *
38856  * Enum | Value | Description
38857  * :------------------------------------|:------|:--------------------------------
38858  * ALT_USB_HOST_HCINT11_AHBERR_E_INACT | 0x0 | No AHB error
38859  * ALT_USB_HOST_HCINT11_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
38860  *
38861  * Field Access Macros:
38862  *
38863  */
38864 /*
38865  * Enumerated value for register field ALT_USB_HOST_HCINT11_AHBERR
38866  *
38867  * No AHB error
38868  */
38869 #define ALT_USB_HOST_HCINT11_AHBERR_E_INACT 0x0
38870 /*
38871  * Enumerated value for register field ALT_USB_HOST_HCINT11_AHBERR
38872  *
38873  * AHB error during AHB read/write
38874  */
38875 #define ALT_USB_HOST_HCINT11_AHBERR_E_ACT 0x1
38876 
38877 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_AHBERR register field. */
38878 #define ALT_USB_HOST_HCINT11_AHBERR_LSB 2
38879 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_AHBERR register field. */
38880 #define ALT_USB_HOST_HCINT11_AHBERR_MSB 2
38881 /* The width in bits of the ALT_USB_HOST_HCINT11_AHBERR register field. */
38882 #define ALT_USB_HOST_HCINT11_AHBERR_WIDTH 1
38883 /* The mask used to set the ALT_USB_HOST_HCINT11_AHBERR register field value. */
38884 #define ALT_USB_HOST_HCINT11_AHBERR_SET_MSK 0x00000004
38885 /* The mask used to clear the ALT_USB_HOST_HCINT11_AHBERR register field value. */
38886 #define ALT_USB_HOST_HCINT11_AHBERR_CLR_MSK 0xfffffffb
38887 /* The reset value of the ALT_USB_HOST_HCINT11_AHBERR register field. */
38888 #define ALT_USB_HOST_HCINT11_AHBERR_RESET 0x0
38889 /* Extracts the ALT_USB_HOST_HCINT11_AHBERR field value from a register. */
38890 #define ALT_USB_HOST_HCINT11_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
38891 /* Produces a ALT_USB_HOST_HCINT11_AHBERR register field value suitable for setting the register. */
38892 #define ALT_USB_HOST_HCINT11_AHBERR_SET(value) (((value) << 2) & 0x00000004)
38893 
38894 /*
38895  * Field : STALL Response Received Interrupt - stall
38896  *
38897  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
38898  * This bit can be set only by the core and the application should write 1 to clear
38899  * it.
38900  *
38901  * Field Enumeration Values:
38902  *
38903  * Enum | Value | Description
38904  * :-----------------------------------|:------|:-------------------
38905  * ALT_USB_HOST_HCINT11_STALL_E_INACT | 0x0 | No Stall Interrupt
38906  * ALT_USB_HOST_HCINT11_STALL_E_ACT | 0x1 | Stall Interrupt
38907  *
38908  * Field Access Macros:
38909  *
38910  */
38911 /*
38912  * Enumerated value for register field ALT_USB_HOST_HCINT11_STALL
38913  *
38914  * No Stall Interrupt
38915  */
38916 #define ALT_USB_HOST_HCINT11_STALL_E_INACT 0x0
38917 /*
38918  * Enumerated value for register field ALT_USB_HOST_HCINT11_STALL
38919  *
38920  * Stall Interrupt
38921  */
38922 #define ALT_USB_HOST_HCINT11_STALL_E_ACT 0x1
38923 
38924 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_STALL register field. */
38925 #define ALT_USB_HOST_HCINT11_STALL_LSB 3
38926 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_STALL register field. */
38927 #define ALT_USB_HOST_HCINT11_STALL_MSB 3
38928 /* The width in bits of the ALT_USB_HOST_HCINT11_STALL register field. */
38929 #define ALT_USB_HOST_HCINT11_STALL_WIDTH 1
38930 /* The mask used to set the ALT_USB_HOST_HCINT11_STALL register field value. */
38931 #define ALT_USB_HOST_HCINT11_STALL_SET_MSK 0x00000008
38932 /* The mask used to clear the ALT_USB_HOST_HCINT11_STALL register field value. */
38933 #define ALT_USB_HOST_HCINT11_STALL_CLR_MSK 0xfffffff7
38934 /* The reset value of the ALT_USB_HOST_HCINT11_STALL register field. */
38935 #define ALT_USB_HOST_HCINT11_STALL_RESET 0x0
38936 /* Extracts the ALT_USB_HOST_HCINT11_STALL field value from a register. */
38937 #define ALT_USB_HOST_HCINT11_STALL_GET(value) (((value) & 0x00000008) >> 3)
38938 /* Produces a ALT_USB_HOST_HCINT11_STALL register field value suitable for setting the register. */
38939 #define ALT_USB_HOST_HCINT11_STALL_SET(value) (((value) << 3) & 0x00000008)
38940 
38941 /*
38942  * Field : NAK Response Received Interrupt - nak
38943  *
38944  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
38945  * core.This bit can be set only by the core and the application should write 1 to
38946  * clear it.
38947  *
38948  * Field Enumeration Values:
38949  *
38950  * Enum | Value | Description
38951  * :---------------------------------|:------|:-----------------------------------
38952  * ALT_USB_HOST_HCINT11_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
38953  * ALT_USB_HOST_HCINT11_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
38954  *
38955  * Field Access Macros:
38956  *
38957  */
38958 /*
38959  * Enumerated value for register field ALT_USB_HOST_HCINT11_NAK
38960  *
38961  * No NAK Response Received Interrupt
38962  */
38963 #define ALT_USB_HOST_HCINT11_NAK_E_INACT 0x0
38964 /*
38965  * Enumerated value for register field ALT_USB_HOST_HCINT11_NAK
38966  *
38967  * NAK Response Received Interrupt
38968  */
38969 #define ALT_USB_HOST_HCINT11_NAK_E_ACT 0x1
38970 
38971 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_NAK register field. */
38972 #define ALT_USB_HOST_HCINT11_NAK_LSB 4
38973 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_NAK register field. */
38974 #define ALT_USB_HOST_HCINT11_NAK_MSB 4
38975 /* The width in bits of the ALT_USB_HOST_HCINT11_NAK register field. */
38976 #define ALT_USB_HOST_HCINT11_NAK_WIDTH 1
38977 /* The mask used to set the ALT_USB_HOST_HCINT11_NAK register field value. */
38978 #define ALT_USB_HOST_HCINT11_NAK_SET_MSK 0x00000010
38979 /* The mask used to clear the ALT_USB_HOST_HCINT11_NAK register field value. */
38980 #define ALT_USB_HOST_HCINT11_NAK_CLR_MSK 0xffffffef
38981 /* The reset value of the ALT_USB_HOST_HCINT11_NAK register field. */
38982 #define ALT_USB_HOST_HCINT11_NAK_RESET 0x0
38983 /* Extracts the ALT_USB_HOST_HCINT11_NAK field value from a register. */
38984 #define ALT_USB_HOST_HCINT11_NAK_GET(value) (((value) & 0x00000010) >> 4)
38985 /* Produces a ALT_USB_HOST_HCINT11_NAK register field value suitable for setting the register. */
38986 #define ALT_USB_HOST_HCINT11_NAK_SET(value) (((value) << 4) & 0x00000010)
38987 
38988 /*
38989  * Field : ACK Response Received Transmitted Interrupt - ack
38990  *
38991  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
38992  * This bit can be set only by the core and the application should write 1 to clear
38993  * it.
38994  *
38995  * Field Enumeration Values:
38996  *
38997  * Enum | Value | Description
38998  * :---------------------------------|:------|:-----------------------------------------------
38999  * ALT_USB_HOST_HCINT11_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
39000  * ALT_USB_HOST_HCINT11_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
39001  *
39002  * Field Access Macros:
39003  *
39004  */
39005 /*
39006  * Enumerated value for register field ALT_USB_HOST_HCINT11_ACK
39007  *
39008  * No ACK Response Received Transmitted Interrupt
39009  */
39010 #define ALT_USB_HOST_HCINT11_ACK_E_INACT 0x0
39011 /*
39012  * Enumerated value for register field ALT_USB_HOST_HCINT11_ACK
39013  *
39014  * ACK Response Received Transmitted Interrup
39015  */
39016 #define ALT_USB_HOST_HCINT11_ACK_E_ACT 0x1
39017 
39018 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_ACK register field. */
39019 #define ALT_USB_HOST_HCINT11_ACK_LSB 5
39020 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_ACK register field. */
39021 #define ALT_USB_HOST_HCINT11_ACK_MSB 5
39022 /* The width in bits of the ALT_USB_HOST_HCINT11_ACK register field. */
39023 #define ALT_USB_HOST_HCINT11_ACK_WIDTH 1
39024 /* The mask used to set the ALT_USB_HOST_HCINT11_ACK register field value. */
39025 #define ALT_USB_HOST_HCINT11_ACK_SET_MSK 0x00000020
39026 /* The mask used to clear the ALT_USB_HOST_HCINT11_ACK register field value. */
39027 #define ALT_USB_HOST_HCINT11_ACK_CLR_MSK 0xffffffdf
39028 /* The reset value of the ALT_USB_HOST_HCINT11_ACK register field. */
39029 #define ALT_USB_HOST_HCINT11_ACK_RESET 0x0
39030 /* Extracts the ALT_USB_HOST_HCINT11_ACK field value from a register. */
39031 #define ALT_USB_HOST_HCINT11_ACK_GET(value) (((value) & 0x00000020) >> 5)
39032 /* Produces a ALT_USB_HOST_HCINT11_ACK register field value suitable for setting the register. */
39033 #define ALT_USB_HOST_HCINT11_ACK_SET(value) (((value) << 5) & 0x00000020)
39034 
39035 /*
39036  * Field : NYET Response Received Interrupt - nyet
39037  *
39038  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
39039  * core.This bit can be set only by the core and the application should write 1 to
39040  * clear it.
39041  *
39042  * Field Enumeration Values:
39043  *
39044  * Enum | Value | Description
39045  * :----------------------------------|:------|:------------------------------------
39046  * ALT_USB_HOST_HCINT11_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
39047  * ALT_USB_HOST_HCINT11_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
39048  *
39049  * Field Access Macros:
39050  *
39051  */
39052 /*
39053  * Enumerated value for register field ALT_USB_HOST_HCINT11_NYET
39054  *
39055  * No NYET Response Received Interrupt
39056  */
39057 #define ALT_USB_HOST_HCINT11_NYET_E_INACT 0x0
39058 /*
39059  * Enumerated value for register field ALT_USB_HOST_HCINT11_NYET
39060  *
39061  * NYET Response Received Interrupt
39062  */
39063 #define ALT_USB_HOST_HCINT11_NYET_E_ACT 0x1
39064 
39065 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_NYET register field. */
39066 #define ALT_USB_HOST_HCINT11_NYET_LSB 6
39067 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_NYET register field. */
39068 #define ALT_USB_HOST_HCINT11_NYET_MSB 6
39069 /* The width in bits of the ALT_USB_HOST_HCINT11_NYET register field. */
39070 #define ALT_USB_HOST_HCINT11_NYET_WIDTH 1
39071 /* The mask used to set the ALT_USB_HOST_HCINT11_NYET register field value. */
39072 #define ALT_USB_HOST_HCINT11_NYET_SET_MSK 0x00000040
39073 /* The mask used to clear the ALT_USB_HOST_HCINT11_NYET register field value. */
39074 #define ALT_USB_HOST_HCINT11_NYET_CLR_MSK 0xffffffbf
39075 /* The reset value of the ALT_USB_HOST_HCINT11_NYET register field. */
39076 #define ALT_USB_HOST_HCINT11_NYET_RESET 0x0
39077 /* Extracts the ALT_USB_HOST_HCINT11_NYET field value from a register. */
39078 #define ALT_USB_HOST_HCINT11_NYET_GET(value) (((value) & 0x00000040) >> 6)
39079 /* Produces a ALT_USB_HOST_HCINT11_NYET register field value suitable for setting the register. */
39080 #define ALT_USB_HOST_HCINT11_NYET_SET(value) (((value) << 6) & 0x00000040)
39081 
39082 /*
39083  * Field : Transaction Error - xacterr
39084  *
39085  * Indicates one of the following errors occurred on the USB.-CRC check failure
39086  *
39087  * * Timeout
39088  *
39089  * * Bit stuff error
39090  *
39091  * * False EOP
39092  *
39093  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
39094  * This bit can be set only by the core and the application should write 1 to clear
39095  * it.
39096  *
39097  * Field Enumeration Values:
39098  *
39099  * Enum | Value | Description
39100  * :-------------------------------------|:------|:---------------------
39101  * ALT_USB_HOST_HCINT11_XACTERR_E_INACT | 0x0 | No Transaction Error
39102  * ALT_USB_HOST_HCINT11_XACTERR_E_ACT | 0x1 | Transaction Error
39103  *
39104  * Field Access Macros:
39105  *
39106  */
39107 /*
39108  * Enumerated value for register field ALT_USB_HOST_HCINT11_XACTERR
39109  *
39110  * No Transaction Error
39111  */
39112 #define ALT_USB_HOST_HCINT11_XACTERR_E_INACT 0x0
39113 /*
39114  * Enumerated value for register field ALT_USB_HOST_HCINT11_XACTERR
39115  *
39116  * Transaction Error
39117  */
39118 #define ALT_USB_HOST_HCINT11_XACTERR_E_ACT 0x1
39119 
39120 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_XACTERR register field. */
39121 #define ALT_USB_HOST_HCINT11_XACTERR_LSB 7
39122 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_XACTERR register field. */
39123 #define ALT_USB_HOST_HCINT11_XACTERR_MSB 7
39124 /* The width in bits of the ALT_USB_HOST_HCINT11_XACTERR register field. */
39125 #define ALT_USB_HOST_HCINT11_XACTERR_WIDTH 1
39126 /* The mask used to set the ALT_USB_HOST_HCINT11_XACTERR register field value. */
39127 #define ALT_USB_HOST_HCINT11_XACTERR_SET_MSK 0x00000080
39128 /* The mask used to clear the ALT_USB_HOST_HCINT11_XACTERR register field value. */
39129 #define ALT_USB_HOST_HCINT11_XACTERR_CLR_MSK 0xffffff7f
39130 /* The reset value of the ALT_USB_HOST_HCINT11_XACTERR register field. */
39131 #define ALT_USB_HOST_HCINT11_XACTERR_RESET 0x0
39132 /* Extracts the ALT_USB_HOST_HCINT11_XACTERR field value from a register. */
39133 #define ALT_USB_HOST_HCINT11_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
39134 /* Produces a ALT_USB_HOST_HCINT11_XACTERR register field value suitable for setting the register. */
39135 #define ALT_USB_HOST_HCINT11_XACTERR_SET(value) (((value) << 7) & 0x00000080)
39136 
39137 /*
39138  * Field : Babble Error - bblerr
39139  *
39140  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
39141  * core..This bit can be set only by the core and the application should write 1 to
39142  * clear it.
39143  *
39144  * Field Enumeration Values:
39145  *
39146  * Enum | Value | Description
39147  * :------------------------------------|:------|:----------------
39148  * ALT_USB_HOST_HCINT11_BBLERR_E_INACT | 0x0 | No Babble Error
39149  * ALT_USB_HOST_HCINT11_BBLERR_E_ACT | 0x1 | Babble Error
39150  *
39151  * Field Access Macros:
39152  *
39153  */
39154 /*
39155  * Enumerated value for register field ALT_USB_HOST_HCINT11_BBLERR
39156  *
39157  * No Babble Error
39158  */
39159 #define ALT_USB_HOST_HCINT11_BBLERR_E_INACT 0x0
39160 /*
39161  * Enumerated value for register field ALT_USB_HOST_HCINT11_BBLERR
39162  *
39163  * Babble Error
39164  */
39165 #define ALT_USB_HOST_HCINT11_BBLERR_E_ACT 0x1
39166 
39167 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_BBLERR register field. */
39168 #define ALT_USB_HOST_HCINT11_BBLERR_LSB 8
39169 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_BBLERR register field. */
39170 #define ALT_USB_HOST_HCINT11_BBLERR_MSB 8
39171 /* The width in bits of the ALT_USB_HOST_HCINT11_BBLERR register field. */
39172 #define ALT_USB_HOST_HCINT11_BBLERR_WIDTH 1
39173 /* The mask used to set the ALT_USB_HOST_HCINT11_BBLERR register field value. */
39174 #define ALT_USB_HOST_HCINT11_BBLERR_SET_MSK 0x00000100
39175 /* The mask used to clear the ALT_USB_HOST_HCINT11_BBLERR register field value. */
39176 #define ALT_USB_HOST_HCINT11_BBLERR_CLR_MSK 0xfffffeff
39177 /* The reset value of the ALT_USB_HOST_HCINT11_BBLERR register field. */
39178 #define ALT_USB_HOST_HCINT11_BBLERR_RESET 0x0
39179 /* Extracts the ALT_USB_HOST_HCINT11_BBLERR field value from a register. */
39180 #define ALT_USB_HOST_HCINT11_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
39181 /* Produces a ALT_USB_HOST_HCINT11_BBLERR register field value suitable for setting the register. */
39182 #define ALT_USB_HOST_HCINT11_BBLERR_SET(value) (((value) << 8) & 0x00000100)
39183 
39184 /*
39185  * Field : Frame Overrun - frmovrun
39186  *
39187  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
39188  * This bit can be set only by the core and the application should write 1 to clear
39189  * it.
39190  *
39191  * Field Enumeration Values:
39192  *
39193  * Enum | Value | Description
39194  * :--------------------------------------|:------|:-----------------
39195  * ALT_USB_HOST_HCINT11_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
39196  * ALT_USB_HOST_HCINT11_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
39197  *
39198  * Field Access Macros:
39199  *
39200  */
39201 /*
39202  * Enumerated value for register field ALT_USB_HOST_HCINT11_FRMOVRUN
39203  *
39204  * No Frame Overrun
39205  */
39206 #define ALT_USB_HOST_HCINT11_FRMOVRUN_E_INACT 0x0
39207 /*
39208  * Enumerated value for register field ALT_USB_HOST_HCINT11_FRMOVRUN
39209  *
39210  * Frame Overrun
39211  */
39212 #define ALT_USB_HOST_HCINT11_FRMOVRUN_E_ACT 0x1
39213 
39214 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_FRMOVRUN register field. */
39215 #define ALT_USB_HOST_HCINT11_FRMOVRUN_LSB 9
39216 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_FRMOVRUN register field. */
39217 #define ALT_USB_HOST_HCINT11_FRMOVRUN_MSB 9
39218 /* The width in bits of the ALT_USB_HOST_HCINT11_FRMOVRUN register field. */
39219 #define ALT_USB_HOST_HCINT11_FRMOVRUN_WIDTH 1
39220 /* The mask used to set the ALT_USB_HOST_HCINT11_FRMOVRUN register field value. */
39221 #define ALT_USB_HOST_HCINT11_FRMOVRUN_SET_MSK 0x00000200
39222 /* The mask used to clear the ALT_USB_HOST_HCINT11_FRMOVRUN register field value. */
39223 #define ALT_USB_HOST_HCINT11_FRMOVRUN_CLR_MSK 0xfffffdff
39224 /* The reset value of the ALT_USB_HOST_HCINT11_FRMOVRUN register field. */
39225 #define ALT_USB_HOST_HCINT11_FRMOVRUN_RESET 0x0
39226 /* Extracts the ALT_USB_HOST_HCINT11_FRMOVRUN field value from a register. */
39227 #define ALT_USB_HOST_HCINT11_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
39228 /* Produces a ALT_USB_HOST_HCINT11_FRMOVRUN register field value suitable for setting the register. */
39229 #define ALT_USB_HOST_HCINT11_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
39230 
39231 /*
39232  * Field : Data Toggle Error - datatglerr
39233  *
39234  * This bit can be set only by the core and the application should write 1 to clear
39235  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
39236  * core.
39237  *
39238  * Field Enumeration Values:
39239  *
39240  * Enum | Value | Description
39241  * :----------------------------------------|:------|:---------------------
39242  * ALT_USB_HOST_HCINT11_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
39243  * ALT_USB_HOST_HCINT11_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
39244  *
39245  * Field Access Macros:
39246  *
39247  */
39248 /*
39249  * Enumerated value for register field ALT_USB_HOST_HCINT11_DATATGLERR
39250  *
39251  * No Data Toggle Error
39252  */
39253 #define ALT_USB_HOST_HCINT11_DATATGLERR_E_INACT 0x0
39254 /*
39255  * Enumerated value for register field ALT_USB_HOST_HCINT11_DATATGLERR
39256  *
39257  * Data Toggle Error
39258  */
39259 #define ALT_USB_HOST_HCINT11_DATATGLERR_E_ACT 0x1
39260 
39261 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_DATATGLERR register field. */
39262 #define ALT_USB_HOST_HCINT11_DATATGLERR_LSB 10
39263 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_DATATGLERR register field. */
39264 #define ALT_USB_HOST_HCINT11_DATATGLERR_MSB 10
39265 /* The width in bits of the ALT_USB_HOST_HCINT11_DATATGLERR register field. */
39266 #define ALT_USB_HOST_HCINT11_DATATGLERR_WIDTH 1
39267 /* The mask used to set the ALT_USB_HOST_HCINT11_DATATGLERR register field value. */
39268 #define ALT_USB_HOST_HCINT11_DATATGLERR_SET_MSK 0x00000400
39269 /* The mask used to clear the ALT_USB_HOST_HCINT11_DATATGLERR register field value. */
39270 #define ALT_USB_HOST_HCINT11_DATATGLERR_CLR_MSK 0xfffffbff
39271 /* The reset value of the ALT_USB_HOST_HCINT11_DATATGLERR register field. */
39272 #define ALT_USB_HOST_HCINT11_DATATGLERR_RESET 0x0
39273 /* Extracts the ALT_USB_HOST_HCINT11_DATATGLERR field value from a register. */
39274 #define ALT_USB_HOST_HCINT11_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
39275 /* Produces a ALT_USB_HOST_HCINT11_DATATGLERR register field value suitable for setting the register. */
39276 #define ALT_USB_HOST_HCINT11_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
39277 
39278 /*
39279  * Field : BNA Interrupt - bnaintr
39280  *
39281  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
39282  * generates this interrupt when the descriptor accessed is not ready for the Core
39283  * to process. BNA will not be generated for Isochronous channels. for non
39284  * Scatter/Gather DMA mode, this bit is reserved.
39285  *
39286  * Field Enumeration Values:
39287  *
39288  * Enum | Value | Description
39289  * :-------------------------------------|:------|:-----------------
39290  * ALT_USB_HOST_HCINT11_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
39291  * ALT_USB_HOST_HCINT11_BNAINTR_E_ACT | 0x1 | BNA Interrupt
39292  *
39293  * Field Access Macros:
39294  *
39295  */
39296 /*
39297  * Enumerated value for register field ALT_USB_HOST_HCINT11_BNAINTR
39298  *
39299  * No BNA Interrupt
39300  */
39301 #define ALT_USB_HOST_HCINT11_BNAINTR_E_INACT 0x0
39302 /*
39303  * Enumerated value for register field ALT_USB_HOST_HCINT11_BNAINTR
39304  *
39305  * BNA Interrupt
39306  */
39307 #define ALT_USB_HOST_HCINT11_BNAINTR_E_ACT 0x1
39308 
39309 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_BNAINTR register field. */
39310 #define ALT_USB_HOST_HCINT11_BNAINTR_LSB 11
39311 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_BNAINTR register field. */
39312 #define ALT_USB_HOST_HCINT11_BNAINTR_MSB 11
39313 /* The width in bits of the ALT_USB_HOST_HCINT11_BNAINTR register field. */
39314 #define ALT_USB_HOST_HCINT11_BNAINTR_WIDTH 1
39315 /* The mask used to set the ALT_USB_HOST_HCINT11_BNAINTR register field value. */
39316 #define ALT_USB_HOST_HCINT11_BNAINTR_SET_MSK 0x00000800
39317 /* The mask used to clear the ALT_USB_HOST_HCINT11_BNAINTR register field value. */
39318 #define ALT_USB_HOST_HCINT11_BNAINTR_CLR_MSK 0xfffff7ff
39319 /* The reset value of the ALT_USB_HOST_HCINT11_BNAINTR register field. */
39320 #define ALT_USB_HOST_HCINT11_BNAINTR_RESET 0x0
39321 /* Extracts the ALT_USB_HOST_HCINT11_BNAINTR field value from a register. */
39322 #define ALT_USB_HOST_HCINT11_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
39323 /* Produces a ALT_USB_HOST_HCINT11_BNAINTR register field value suitable for setting the register. */
39324 #define ALT_USB_HOST_HCINT11_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
39325 
39326 /*
39327  * Field : Excessive Transaction Error - xcs_xact_err
39328  *
39329  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
39330  * this bit when 3 consecutive transaction errors occurred on the USB bus.
39331  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
39332  * Scatter/Gather DMA mode, this bit is reserved.
39333  *
39334  * Field Enumeration Values:
39335  *
39336  * Enum | Value | Description
39337  * :--------------------------------------------|:------|:-------------------------------
39338  * ALT_USB_HOST_HCINT11_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
39339  * ALT_USB_HOST_HCINT11_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
39340  *
39341  * Field Access Macros:
39342  *
39343  */
39344 /*
39345  * Enumerated value for register field ALT_USB_HOST_HCINT11_XCS_XACT_ERR
39346  *
39347  * No Excessive Transaction Error
39348  */
39349 #define ALT_USB_HOST_HCINT11_XCS_XACT_ERR_E_INACT 0x0
39350 /*
39351  * Enumerated value for register field ALT_USB_HOST_HCINT11_XCS_XACT_ERR
39352  *
39353  * Excessive Transaction Error
39354  */
39355 #define ALT_USB_HOST_HCINT11_XCS_XACT_ERR_E_ACVTIVE 0x1
39356 
39357 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_XCS_XACT_ERR register field. */
39358 #define ALT_USB_HOST_HCINT11_XCS_XACT_ERR_LSB 12
39359 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_XCS_XACT_ERR register field. */
39360 #define ALT_USB_HOST_HCINT11_XCS_XACT_ERR_MSB 12
39361 /* The width in bits of the ALT_USB_HOST_HCINT11_XCS_XACT_ERR register field. */
39362 #define ALT_USB_HOST_HCINT11_XCS_XACT_ERR_WIDTH 1
39363 /* The mask used to set the ALT_USB_HOST_HCINT11_XCS_XACT_ERR register field value. */
39364 #define ALT_USB_HOST_HCINT11_XCS_XACT_ERR_SET_MSK 0x00001000
39365 /* The mask used to clear the ALT_USB_HOST_HCINT11_XCS_XACT_ERR register field value. */
39366 #define ALT_USB_HOST_HCINT11_XCS_XACT_ERR_CLR_MSK 0xffffefff
39367 /* The reset value of the ALT_USB_HOST_HCINT11_XCS_XACT_ERR register field. */
39368 #define ALT_USB_HOST_HCINT11_XCS_XACT_ERR_RESET 0x0
39369 /* Extracts the ALT_USB_HOST_HCINT11_XCS_XACT_ERR field value from a register. */
39370 #define ALT_USB_HOST_HCINT11_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
39371 /* Produces a ALT_USB_HOST_HCINT11_XCS_XACT_ERR register field value suitable for setting the register. */
39372 #define ALT_USB_HOST_HCINT11_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
39373 
39374 /*
39375  * Field : Descriptor rollover interrupt - desc_lst_rollintr
39376  *
39377  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
39378  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
39379  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
39380  * mode, this bit is reserved.
39381  *
39382  * Field Enumeration Values:
39383  *
39384  * Enum | Value | Description
39385  * :-----------------------------------------------|:------|:---------------------------------
39386  * ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
39387  * ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
39388  *
39389  * Field Access Macros:
39390  *
39391  */
39392 /*
39393  * Enumerated value for register field ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR
39394  *
39395  * No Descriptor rollover interrupt
39396  */
39397 #define ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR_E_INACT 0x0
39398 /*
39399  * Enumerated value for register field ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR
39400  *
39401  * Descriptor rollover interrupt
39402  */
39403 #define ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR_E_ACT 0x1
39404 
39405 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR register field. */
39406 #define ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR_LSB 13
39407 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR register field. */
39408 #define ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR_MSB 13
39409 /* The width in bits of the ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR register field. */
39410 #define ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR_WIDTH 1
39411 /* The mask used to set the ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR register field value. */
39412 #define ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR_SET_MSK 0x00002000
39413 /* The mask used to clear the ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR register field value. */
39414 #define ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
39415 /* The reset value of the ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR register field. */
39416 #define ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR_RESET 0x0
39417 /* Extracts the ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR field value from a register. */
39418 #define ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
39419 /* Produces a ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR register field value suitable for setting the register. */
39420 #define ALT_USB_HOST_HCINT11_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
39421 
39422 #ifndef __ASSEMBLY__
39423 /*
39424  * WARNING: The C register and register group struct declarations are provided for
39425  * convenience and illustrative purposes. They should, however, be used with
39426  * caution as the C language standard provides no guarantees about the alignment or
39427  * atomicity of device memory accesses. The recommended practice for writing
39428  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
39429  * alt_write_word() functions.
39430  *
39431  * The struct declaration for register ALT_USB_HOST_HCINT11.
39432  */
39433 struct ALT_USB_HOST_HCINT11_s
39434 {
39435  const uint32_t xfercompl : 1; /* Transfer Completed */
39436  const uint32_t chhltd : 1; /* Channel Halted */
39437  const uint32_t ahberr : 1; /* AHB Error */
39438  const uint32_t stall : 1; /* STALL Response Received Interrupt */
39439  const uint32_t nak : 1; /* NAK Response Received Interrupt */
39440  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
39441  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
39442  const uint32_t xacterr : 1; /* Transaction Error */
39443  const uint32_t bblerr : 1; /* Babble Error */
39444  const uint32_t frmovrun : 1; /* Frame Overrun */
39445  const uint32_t datatglerr : 1; /* Data Toggle Error */
39446  const uint32_t bnaintr : 1; /* BNA Interrupt */
39447  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
39448  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
39449  uint32_t : 18; /* *UNDEFINED* */
39450 };
39451 
39452 /* The typedef declaration for register ALT_USB_HOST_HCINT11. */
39453 typedef volatile struct ALT_USB_HOST_HCINT11_s ALT_USB_HOST_HCINT11_t;
39454 #endif /* __ASSEMBLY__ */
39455 
39456 /* The byte offset of the ALT_USB_HOST_HCINT11 register from the beginning of the component. */
39457 #define ALT_USB_HOST_HCINT11_OFST 0x268
39458 /* The address of the ALT_USB_HOST_HCINT11 register. */
39459 #define ALT_USB_HOST_HCINT11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT11_OFST))
39460 
39461 /*
39462  * Register : Channel 11 Interrupt Mask Register - hcintmsk11
39463  *
39464  * This register reflects the mask for each channel status described in the
39465  * previous section.
39466  *
39467  * Register Layout
39468  *
39469  * Bits | Access | Reset | Description
39470  * :--------|:-------|:------|:----------------------------------
39471  * [0] | RW | 0x0 | Transfer Completed Mask
39472  * [1] | RW | 0x0 | Channel Halted Mask
39473  * [2] | RW | 0x0 | AHB Error Mask
39474  * [10:3] | ??? | 0x0 | *UNDEFINED*
39475  * [11] | RW | 0x0 | BNA Interrupt mask
39476  * [12] | ??? | 0x0 | *UNDEFINED*
39477  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
39478  * [31:14] | ??? | 0x0 | *UNDEFINED*
39479  *
39480  */
39481 /*
39482  * Field : Transfer Completed Mask - xfercomplmsk
39483  *
39484  * Transfer complete.
39485  *
39486  * Field Enumeration Values:
39487  *
39488  * Enum | Value | Description
39489  * :---------------------------------------------|:------|:------------
39490  * ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK_E_MSK | 0x0 | Mask
39491  * ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
39492  *
39493  * Field Access Macros:
39494  *
39495  */
39496 /*
39497  * Enumerated value for register field ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK
39498  *
39499  * Mask
39500  */
39501 #define ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK_E_MSK 0x0
39502 /*
39503  * Enumerated value for register field ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK
39504  *
39505  * No mask
39506  */
39507 #define ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK_E_NOMSK 0x1
39508 
39509 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK register field. */
39510 #define ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK_LSB 0
39511 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK register field. */
39512 #define ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK_MSB 0
39513 /* The width in bits of the ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK register field. */
39514 #define ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK_WIDTH 1
39515 /* The mask used to set the ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK register field value. */
39516 #define ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK_SET_MSK 0x00000001
39517 /* The mask used to clear the ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK register field value. */
39518 #define ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK_CLR_MSK 0xfffffffe
39519 /* The reset value of the ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK register field. */
39520 #define ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK_RESET 0x0
39521 /* Extracts the ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK field value from a register. */
39522 #define ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
39523 /* Produces a ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK register field value suitable for setting the register. */
39524 #define ALT_USB_HOST_HCINTMSK11_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
39525 
39526 /*
39527  * Field : Channel Halted Mask - chhltdmsk
39528  *
39529  * Channel Halted.
39530  *
39531  * Field Enumeration Values:
39532  *
39533  * Enum | Value | Description
39534  * :------------------------------------------|:------|:------------
39535  * ALT_USB_HOST_HCINTMSK11_CHHLTDMSK_E_MSK | 0x0 | Mask
39536  * ALT_USB_HOST_HCINTMSK11_CHHLTDMSK_E_NOMSK | 0x1 | No mask
39537  *
39538  * Field Access Macros:
39539  *
39540  */
39541 /*
39542  * Enumerated value for register field ALT_USB_HOST_HCINTMSK11_CHHLTDMSK
39543  *
39544  * Mask
39545  */
39546 #define ALT_USB_HOST_HCINTMSK11_CHHLTDMSK_E_MSK 0x0
39547 /*
39548  * Enumerated value for register field ALT_USB_HOST_HCINTMSK11_CHHLTDMSK
39549  *
39550  * No mask
39551  */
39552 #define ALT_USB_HOST_HCINTMSK11_CHHLTDMSK_E_NOMSK 0x1
39553 
39554 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK11_CHHLTDMSK register field. */
39555 #define ALT_USB_HOST_HCINTMSK11_CHHLTDMSK_LSB 1
39556 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK11_CHHLTDMSK register field. */
39557 #define ALT_USB_HOST_HCINTMSK11_CHHLTDMSK_MSB 1
39558 /* The width in bits of the ALT_USB_HOST_HCINTMSK11_CHHLTDMSK register field. */
39559 #define ALT_USB_HOST_HCINTMSK11_CHHLTDMSK_WIDTH 1
39560 /* The mask used to set the ALT_USB_HOST_HCINTMSK11_CHHLTDMSK register field value. */
39561 #define ALT_USB_HOST_HCINTMSK11_CHHLTDMSK_SET_MSK 0x00000002
39562 /* The mask used to clear the ALT_USB_HOST_HCINTMSK11_CHHLTDMSK register field value. */
39563 #define ALT_USB_HOST_HCINTMSK11_CHHLTDMSK_CLR_MSK 0xfffffffd
39564 /* The reset value of the ALT_USB_HOST_HCINTMSK11_CHHLTDMSK register field. */
39565 #define ALT_USB_HOST_HCINTMSK11_CHHLTDMSK_RESET 0x0
39566 /* Extracts the ALT_USB_HOST_HCINTMSK11_CHHLTDMSK field value from a register. */
39567 #define ALT_USB_HOST_HCINTMSK11_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
39568 /* Produces a ALT_USB_HOST_HCINTMSK11_CHHLTDMSK register field value suitable for setting the register. */
39569 #define ALT_USB_HOST_HCINTMSK11_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
39570 
39571 /*
39572  * Field : AHB Error Mask - ahberrmsk
39573  *
39574  * In scatter/gather DMA mode for host, interrupts will not be generated due to
39575  * the corresponding bits set in HCINTn.
39576  *
39577  * Field Enumeration Values:
39578  *
39579  * Enum | Value | Description
39580  * :------------------------------------------|:------|:------------
39581  * ALT_USB_HOST_HCINTMSK11_AHBERRMSK_E_MSK | 0x0 | Mask
39582  * ALT_USB_HOST_HCINTMSK11_AHBERRMSK_E_NOMSK | 0x1 | No mask
39583  *
39584  * Field Access Macros:
39585  *
39586  */
39587 /*
39588  * Enumerated value for register field ALT_USB_HOST_HCINTMSK11_AHBERRMSK
39589  *
39590  * Mask
39591  */
39592 #define ALT_USB_HOST_HCINTMSK11_AHBERRMSK_E_MSK 0x0
39593 /*
39594  * Enumerated value for register field ALT_USB_HOST_HCINTMSK11_AHBERRMSK
39595  *
39596  * No mask
39597  */
39598 #define ALT_USB_HOST_HCINTMSK11_AHBERRMSK_E_NOMSK 0x1
39599 
39600 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK11_AHBERRMSK register field. */
39601 #define ALT_USB_HOST_HCINTMSK11_AHBERRMSK_LSB 2
39602 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK11_AHBERRMSK register field. */
39603 #define ALT_USB_HOST_HCINTMSK11_AHBERRMSK_MSB 2
39604 /* The width in bits of the ALT_USB_HOST_HCINTMSK11_AHBERRMSK register field. */
39605 #define ALT_USB_HOST_HCINTMSK11_AHBERRMSK_WIDTH 1
39606 /* The mask used to set the ALT_USB_HOST_HCINTMSK11_AHBERRMSK register field value. */
39607 #define ALT_USB_HOST_HCINTMSK11_AHBERRMSK_SET_MSK 0x00000004
39608 /* The mask used to clear the ALT_USB_HOST_HCINTMSK11_AHBERRMSK register field value. */
39609 #define ALT_USB_HOST_HCINTMSK11_AHBERRMSK_CLR_MSK 0xfffffffb
39610 /* The reset value of the ALT_USB_HOST_HCINTMSK11_AHBERRMSK register field. */
39611 #define ALT_USB_HOST_HCINTMSK11_AHBERRMSK_RESET 0x0
39612 /* Extracts the ALT_USB_HOST_HCINTMSK11_AHBERRMSK field value from a register. */
39613 #define ALT_USB_HOST_HCINTMSK11_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
39614 /* Produces a ALT_USB_HOST_HCINTMSK11_AHBERRMSK register field value suitable for setting the register. */
39615 #define ALT_USB_HOST_HCINTMSK11_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
39616 
39617 /*
39618  * Field : BNA Interrupt mask - bnaintrmsk
39619  *
39620  * This bit is valid only when Scatter/Gather DMA mode is enabled.
39621  *
39622  * Field Enumeration Values:
39623  *
39624  * Enum | Value | Description
39625  * :-------------------------------------------|:------|:------------
39626  * ALT_USB_HOST_HCINTMSK11_BNAINTRMSK_E_MSK | 0x0 | Mask
39627  * ALT_USB_HOST_HCINTMSK11_BNAINTRMSK_E_NOMSK | 0x1 | No mask
39628  *
39629  * Field Access Macros:
39630  *
39631  */
39632 /*
39633  * Enumerated value for register field ALT_USB_HOST_HCINTMSK11_BNAINTRMSK
39634  *
39635  * Mask
39636  */
39637 #define ALT_USB_HOST_HCINTMSK11_BNAINTRMSK_E_MSK 0x0
39638 /*
39639  * Enumerated value for register field ALT_USB_HOST_HCINTMSK11_BNAINTRMSK
39640  *
39641  * No mask
39642  */
39643 #define ALT_USB_HOST_HCINTMSK11_BNAINTRMSK_E_NOMSK 0x1
39644 
39645 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK11_BNAINTRMSK register field. */
39646 #define ALT_USB_HOST_HCINTMSK11_BNAINTRMSK_LSB 11
39647 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK11_BNAINTRMSK register field. */
39648 #define ALT_USB_HOST_HCINTMSK11_BNAINTRMSK_MSB 11
39649 /* The width in bits of the ALT_USB_HOST_HCINTMSK11_BNAINTRMSK register field. */
39650 #define ALT_USB_HOST_HCINTMSK11_BNAINTRMSK_WIDTH 1
39651 /* The mask used to set the ALT_USB_HOST_HCINTMSK11_BNAINTRMSK register field value. */
39652 #define ALT_USB_HOST_HCINTMSK11_BNAINTRMSK_SET_MSK 0x00000800
39653 /* The mask used to clear the ALT_USB_HOST_HCINTMSK11_BNAINTRMSK register field value. */
39654 #define ALT_USB_HOST_HCINTMSK11_BNAINTRMSK_CLR_MSK 0xfffff7ff
39655 /* The reset value of the ALT_USB_HOST_HCINTMSK11_BNAINTRMSK register field. */
39656 #define ALT_USB_HOST_HCINTMSK11_BNAINTRMSK_RESET 0x0
39657 /* Extracts the ALT_USB_HOST_HCINTMSK11_BNAINTRMSK field value from a register. */
39658 #define ALT_USB_HOST_HCINTMSK11_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
39659 /* Produces a ALT_USB_HOST_HCINTMSK11_BNAINTRMSK register field value suitable for setting the register. */
39660 #define ALT_USB_HOST_HCINTMSK11_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
39661 
39662 /*
39663  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
39664  *
39665  * This bit is valid only when Scatter/Gather DMA mode is enabled.
39666  *
39667  * Field Enumeration Values:
39668  *
39669  * Enum | Value | Description
39670  * :----------------------------------------------------|:------|:------------
39671  * ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
39672  * ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
39673  *
39674  * Field Access Macros:
39675  *
39676  */
39677 /*
39678  * Enumerated value for register field ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK
39679  *
39680  * Mask
39681  */
39682 #define ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK_E_MSK 0x0
39683 /*
39684  * Enumerated value for register field ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK
39685  *
39686  * No mask
39687  */
39688 #define ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
39689 
39690 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK register field. */
39691 #define ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK_LSB 13
39692 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK register field. */
39693 #define ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK_MSB 13
39694 /* The width in bits of the ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK register field. */
39695 #define ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK_WIDTH 1
39696 /* The mask used to set the ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK register field value. */
39697 #define ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
39698 /* The mask used to clear the ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK register field value. */
39699 #define ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
39700 /* The reset value of the ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK register field. */
39701 #define ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK_RESET 0x0
39702 /* Extracts the ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK field value from a register. */
39703 #define ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
39704 /* Produces a ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
39705 #define ALT_USB_HOST_HCINTMSK11_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
39706 
39707 #ifndef __ASSEMBLY__
39708 /*
39709  * WARNING: The C register and register group struct declarations are provided for
39710  * convenience and illustrative purposes. They should, however, be used with
39711  * caution as the C language standard provides no guarantees about the alignment or
39712  * atomicity of device memory accesses. The recommended practice for writing
39713  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
39714  * alt_write_word() functions.
39715  *
39716  * The struct declaration for register ALT_USB_HOST_HCINTMSK11.
39717  */
39718 struct ALT_USB_HOST_HCINTMSK11_s
39719 {
39720  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
39721  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
39722  uint32_t ahberrmsk : 1; /* AHB Error Mask */
39723  uint32_t : 8; /* *UNDEFINED* */
39724  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
39725  uint32_t : 1; /* *UNDEFINED* */
39726  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
39727  uint32_t : 18; /* *UNDEFINED* */
39728 };
39729 
39730 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK11. */
39731 typedef volatile struct ALT_USB_HOST_HCINTMSK11_s ALT_USB_HOST_HCINTMSK11_t;
39732 #endif /* __ASSEMBLY__ */
39733 
39734 /* The byte offset of the ALT_USB_HOST_HCINTMSK11 register from the beginning of the component. */
39735 #define ALT_USB_HOST_HCINTMSK11_OFST 0x26c
39736 /* The address of the ALT_USB_HOST_HCINTMSK11 register. */
39737 #define ALT_USB_HOST_HCINTMSK11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK11_OFST))
39738 
39739 /*
39740  * Register : Host Channel 11 Transfer Size Register - hctsiz11
39741  *
39742  * Buffer DMA Mode
39743  *
39744  * Register Layout
39745  *
39746  * Bits | Access | Reset | Description
39747  * :--------|:-------|:------|:--------------
39748  * [18:0] | RW | 0x0 | Transfer Size
39749  * [28:19] | RW | 0x0 | Packet Count
39750  * [30:29] | RW | 0x0 | PID
39751  * [31] | RW | 0x0 | Do Ping
39752  *
39753  */
39754 /*
39755  * Field : Transfer Size - xfersize
39756  *
39757  * for an OUT, this field is the number of data bytes the host sends during the
39758  * transfer. for an IN, this field is the buffer size that the application has
39759  * Reserved for the transfer. The application is expected to program this field as
39760  * an integer multiple of the maximum packet size for IN transactions (periodic and
39761  * non-periodic).The width of this counter is specified as 19 bits.
39762  *
39763  * Field Access Macros:
39764  *
39765  */
39766 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ11_XFERSIZE register field. */
39767 #define ALT_USB_HOST_HCTSIZ11_XFERSIZE_LSB 0
39768 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ11_XFERSIZE register field. */
39769 #define ALT_USB_HOST_HCTSIZ11_XFERSIZE_MSB 18
39770 /* The width in bits of the ALT_USB_HOST_HCTSIZ11_XFERSIZE register field. */
39771 #define ALT_USB_HOST_HCTSIZ11_XFERSIZE_WIDTH 19
39772 /* The mask used to set the ALT_USB_HOST_HCTSIZ11_XFERSIZE register field value. */
39773 #define ALT_USB_HOST_HCTSIZ11_XFERSIZE_SET_MSK 0x0007ffff
39774 /* The mask used to clear the ALT_USB_HOST_HCTSIZ11_XFERSIZE register field value. */
39775 #define ALT_USB_HOST_HCTSIZ11_XFERSIZE_CLR_MSK 0xfff80000
39776 /* The reset value of the ALT_USB_HOST_HCTSIZ11_XFERSIZE register field. */
39777 #define ALT_USB_HOST_HCTSIZ11_XFERSIZE_RESET 0x0
39778 /* Extracts the ALT_USB_HOST_HCTSIZ11_XFERSIZE field value from a register. */
39779 #define ALT_USB_HOST_HCTSIZ11_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
39780 /* Produces a ALT_USB_HOST_HCTSIZ11_XFERSIZE register field value suitable for setting the register. */
39781 #define ALT_USB_HOST_HCTSIZ11_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
39782 
39783 /*
39784  * Field : Packet Count - pktcnt
39785  *
39786  * This field is programmed by the application with the expected number of packets
39787  * to be transmitted (OUT) or received (IN). The host decrements this count on
39788  * every successful transmission or reception of an OUT/IN packet. Once this count
39789  * reaches zero, the application is interrupted to indicate normal completion. The
39790  * width of this counter is specified as 10 bits.
39791  *
39792  * Field Access Macros:
39793  *
39794  */
39795 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ11_PKTCNT register field. */
39796 #define ALT_USB_HOST_HCTSIZ11_PKTCNT_LSB 19
39797 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ11_PKTCNT register field. */
39798 #define ALT_USB_HOST_HCTSIZ11_PKTCNT_MSB 28
39799 /* The width in bits of the ALT_USB_HOST_HCTSIZ11_PKTCNT register field. */
39800 #define ALT_USB_HOST_HCTSIZ11_PKTCNT_WIDTH 10
39801 /* The mask used to set the ALT_USB_HOST_HCTSIZ11_PKTCNT register field value. */
39802 #define ALT_USB_HOST_HCTSIZ11_PKTCNT_SET_MSK 0x1ff80000
39803 /* The mask used to clear the ALT_USB_HOST_HCTSIZ11_PKTCNT register field value. */
39804 #define ALT_USB_HOST_HCTSIZ11_PKTCNT_CLR_MSK 0xe007ffff
39805 /* The reset value of the ALT_USB_HOST_HCTSIZ11_PKTCNT register field. */
39806 #define ALT_USB_HOST_HCTSIZ11_PKTCNT_RESET 0x0
39807 /* Extracts the ALT_USB_HOST_HCTSIZ11_PKTCNT field value from a register. */
39808 #define ALT_USB_HOST_HCTSIZ11_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
39809 /* Produces a ALT_USB_HOST_HCTSIZ11_PKTCNT register field value suitable for setting the register. */
39810 #define ALT_USB_HOST_HCTSIZ11_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
39811 
39812 /*
39813  * Field : PID - pid
39814  *
39815  * The application programs this field with the type of PID to use forthe initial
39816  * transaction. The host maintains this field for the rest of the transfer.
39817  *
39818  * Field Enumeration Values:
39819  *
39820  * Enum | Value | Description
39821  * :----------------------------------|:------|:------------------------------------
39822  * ALT_USB_HOST_HCTSIZ11_PID_E_DATA0 | 0x0 | DATA0
39823  * ALT_USB_HOST_HCTSIZ11_PID_E_DATA2 | 0x1 | DATA2
39824  * ALT_USB_HOST_HCTSIZ11_PID_E_DATA1 | 0x2 | DATA1
39825  * ALT_USB_HOST_HCTSIZ11_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
39826  *
39827  * Field Access Macros:
39828  *
39829  */
39830 /*
39831  * Enumerated value for register field ALT_USB_HOST_HCTSIZ11_PID
39832  *
39833  * DATA0
39834  */
39835 #define ALT_USB_HOST_HCTSIZ11_PID_E_DATA0 0x0
39836 /*
39837  * Enumerated value for register field ALT_USB_HOST_HCTSIZ11_PID
39838  *
39839  * DATA2
39840  */
39841 #define ALT_USB_HOST_HCTSIZ11_PID_E_DATA2 0x1
39842 /*
39843  * Enumerated value for register field ALT_USB_HOST_HCTSIZ11_PID
39844  *
39845  * DATA1
39846  */
39847 #define ALT_USB_HOST_HCTSIZ11_PID_E_DATA1 0x2
39848 /*
39849  * Enumerated value for register field ALT_USB_HOST_HCTSIZ11_PID
39850  *
39851  * MDATA (non-control)/SETUP (control)
39852  */
39853 #define ALT_USB_HOST_HCTSIZ11_PID_E_MDATA 0x3
39854 
39855 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ11_PID register field. */
39856 #define ALT_USB_HOST_HCTSIZ11_PID_LSB 29
39857 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ11_PID register field. */
39858 #define ALT_USB_HOST_HCTSIZ11_PID_MSB 30
39859 /* The width in bits of the ALT_USB_HOST_HCTSIZ11_PID register field. */
39860 #define ALT_USB_HOST_HCTSIZ11_PID_WIDTH 2
39861 /* The mask used to set the ALT_USB_HOST_HCTSIZ11_PID register field value. */
39862 #define ALT_USB_HOST_HCTSIZ11_PID_SET_MSK 0x60000000
39863 /* The mask used to clear the ALT_USB_HOST_HCTSIZ11_PID register field value. */
39864 #define ALT_USB_HOST_HCTSIZ11_PID_CLR_MSK 0x9fffffff
39865 /* The reset value of the ALT_USB_HOST_HCTSIZ11_PID register field. */
39866 #define ALT_USB_HOST_HCTSIZ11_PID_RESET 0x0
39867 /* Extracts the ALT_USB_HOST_HCTSIZ11_PID field value from a register. */
39868 #define ALT_USB_HOST_HCTSIZ11_PID_GET(value) (((value) & 0x60000000) >> 29)
39869 /* Produces a ALT_USB_HOST_HCTSIZ11_PID register field value suitable for setting the register. */
39870 #define ALT_USB_HOST_HCTSIZ11_PID_SET(value) (((value) << 29) & 0x60000000)
39871 
39872 /*
39873  * Field : Do Ping - dopng
39874  *
39875  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
39876  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
39877  * for IN transfers it disables the channel.
39878  *
39879  * Field Enumeration Values:
39880  *
39881  * Enum | Value | Description
39882  * :-------------------------------------|:------|:-----------------
39883  * ALT_USB_HOST_HCTSIZ11_DOPNG_E_NOPING | 0x0 | No ping protocol
39884  * ALT_USB_HOST_HCTSIZ11_DOPNG_E_PING | 0x1 | Ping protocol
39885  *
39886  * Field Access Macros:
39887  *
39888  */
39889 /*
39890  * Enumerated value for register field ALT_USB_HOST_HCTSIZ11_DOPNG
39891  *
39892  * No ping protocol
39893  */
39894 #define ALT_USB_HOST_HCTSIZ11_DOPNG_E_NOPING 0x0
39895 /*
39896  * Enumerated value for register field ALT_USB_HOST_HCTSIZ11_DOPNG
39897  *
39898  * Ping protocol
39899  */
39900 #define ALT_USB_HOST_HCTSIZ11_DOPNG_E_PING 0x1
39901 
39902 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ11_DOPNG register field. */
39903 #define ALT_USB_HOST_HCTSIZ11_DOPNG_LSB 31
39904 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ11_DOPNG register field. */
39905 #define ALT_USB_HOST_HCTSIZ11_DOPNG_MSB 31
39906 /* The width in bits of the ALT_USB_HOST_HCTSIZ11_DOPNG register field. */
39907 #define ALT_USB_HOST_HCTSIZ11_DOPNG_WIDTH 1
39908 /* The mask used to set the ALT_USB_HOST_HCTSIZ11_DOPNG register field value. */
39909 #define ALT_USB_HOST_HCTSIZ11_DOPNG_SET_MSK 0x80000000
39910 /* The mask used to clear the ALT_USB_HOST_HCTSIZ11_DOPNG register field value. */
39911 #define ALT_USB_HOST_HCTSIZ11_DOPNG_CLR_MSK 0x7fffffff
39912 /* The reset value of the ALT_USB_HOST_HCTSIZ11_DOPNG register field. */
39913 #define ALT_USB_HOST_HCTSIZ11_DOPNG_RESET 0x0
39914 /* Extracts the ALT_USB_HOST_HCTSIZ11_DOPNG field value from a register. */
39915 #define ALT_USB_HOST_HCTSIZ11_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
39916 /* Produces a ALT_USB_HOST_HCTSIZ11_DOPNG register field value suitable for setting the register. */
39917 #define ALT_USB_HOST_HCTSIZ11_DOPNG_SET(value) (((value) << 31) & 0x80000000)
39918 
39919 #ifndef __ASSEMBLY__
39920 /*
39921  * WARNING: The C register and register group struct declarations are provided for
39922  * convenience and illustrative purposes. They should, however, be used with
39923  * caution as the C language standard provides no guarantees about the alignment or
39924  * atomicity of device memory accesses. The recommended practice for writing
39925  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
39926  * alt_write_word() functions.
39927  *
39928  * The struct declaration for register ALT_USB_HOST_HCTSIZ11.
39929  */
39930 struct ALT_USB_HOST_HCTSIZ11_s
39931 {
39932  uint32_t xfersize : 19; /* Transfer Size */
39933  uint32_t pktcnt : 10; /* Packet Count */
39934  uint32_t pid : 2; /* PID */
39935  uint32_t dopng : 1; /* Do Ping */
39936 };
39937 
39938 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ11. */
39939 typedef volatile struct ALT_USB_HOST_HCTSIZ11_s ALT_USB_HOST_HCTSIZ11_t;
39940 #endif /* __ASSEMBLY__ */
39941 
39942 /* The byte offset of the ALT_USB_HOST_HCTSIZ11 register from the beginning of the component. */
39943 #define ALT_USB_HOST_HCTSIZ11_OFST 0x270
39944 /* The address of the ALT_USB_HOST_HCTSIZ11 register. */
39945 #define ALT_USB_HOST_HCTSIZ11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ11_OFST))
39946 
39947 /*
39948  * Register : Host Channel 11 DMA Address Register - hcdma11
39949  *
39950  * This register is used by the OTG host in the internal DMA mode to maintain the
39951  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
39952  * DWORD-aligned.
39953  *
39954  * Register Layout
39955  *
39956  * Bits | Access | Reset | Description
39957  * :-------|:-------|:------|:------------
39958  * [31:0] | RW | 0x0 | DMA Address
39959  *
39960  */
39961 /*
39962  * Field : DMA Address - hcdma11
39963  *
39964  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
39965  * first descriptor in the list should be located in this address. The first
39966  * descriptor may be or may not be ready. The core starts processing the list from
39967  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
39968  * in which the isochronous descriptors are present where N is based on nTD as per
39969  * Table below
39970  *
39971  * [31:N] Base Address [N-1:3] Offset [2:0] 000
39972  *
39973  * HS ISOC FS ISOC
39974  *
39975  * nTD N nTD N
39976  *
39977  * 7 6 1 4
39978  *
39979  * 15 7 3 5
39980  *
39981  * 31 8 7 6
39982  *
39983  * 63 9 15 7
39984  *
39985  * 127 10 31 8
39986  *
39987  * 255 11 63 9
39988  *
39989  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
39990  * This value is in terms of number of descriptors. The values can be from 0 to 63.
39991  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
39992  * descriptor processed in the list. This field is updated both by application and
39993  * the core. for example, if the application enables the channel after programming
39994  * CTD=5, then the core will start processing the 6th descriptor. The address is
39995  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
39996  * CTD for isochronous is based on the current frame/microframe value. Need to be
39997  * set to zero by application.
39998  *
39999  * Field Access Macros:
40000  *
40001  */
40002 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA11_HCDMA11 register field. */
40003 #define ALT_USB_HOST_HCDMA11_HCDMA11_LSB 0
40004 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA11_HCDMA11 register field. */
40005 #define ALT_USB_HOST_HCDMA11_HCDMA11_MSB 31
40006 /* The width in bits of the ALT_USB_HOST_HCDMA11_HCDMA11 register field. */
40007 #define ALT_USB_HOST_HCDMA11_HCDMA11_WIDTH 32
40008 /* The mask used to set the ALT_USB_HOST_HCDMA11_HCDMA11 register field value. */
40009 #define ALT_USB_HOST_HCDMA11_HCDMA11_SET_MSK 0xffffffff
40010 /* The mask used to clear the ALT_USB_HOST_HCDMA11_HCDMA11 register field value. */
40011 #define ALT_USB_HOST_HCDMA11_HCDMA11_CLR_MSK 0x00000000
40012 /* The reset value of the ALT_USB_HOST_HCDMA11_HCDMA11 register field. */
40013 #define ALT_USB_HOST_HCDMA11_HCDMA11_RESET 0x0
40014 /* Extracts the ALT_USB_HOST_HCDMA11_HCDMA11 field value from a register. */
40015 #define ALT_USB_HOST_HCDMA11_HCDMA11_GET(value) (((value) & 0xffffffff) >> 0)
40016 /* Produces a ALT_USB_HOST_HCDMA11_HCDMA11 register field value suitable for setting the register. */
40017 #define ALT_USB_HOST_HCDMA11_HCDMA11_SET(value) (((value) << 0) & 0xffffffff)
40018 
40019 #ifndef __ASSEMBLY__
40020 /*
40021  * WARNING: The C register and register group struct declarations are provided for
40022  * convenience and illustrative purposes. They should, however, be used with
40023  * caution as the C language standard provides no guarantees about the alignment or
40024  * atomicity of device memory accesses. The recommended practice for writing
40025  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
40026  * alt_write_word() functions.
40027  *
40028  * The struct declaration for register ALT_USB_HOST_HCDMA11.
40029  */
40030 struct ALT_USB_HOST_HCDMA11_s
40031 {
40032  uint32_t hcdma11 : 32; /* DMA Address */
40033 };
40034 
40035 /* The typedef declaration for register ALT_USB_HOST_HCDMA11. */
40036 typedef volatile struct ALT_USB_HOST_HCDMA11_s ALT_USB_HOST_HCDMA11_t;
40037 #endif /* __ASSEMBLY__ */
40038 
40039 /* The byte offset of the ALT_USB_HOST_HCDMA11 register from the beginning of the component. */
40040 #define ALT_USB_HOST_HCDMA11_OFST 0x274
40041 /* The address of the ALT_USB_HOST_HCDMA11 register. */
40042 #define ALT_USB_HOST_HCDMA11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA11_OFST))
40043 
40044 /*
40045  * Register : Host Channel 11 DMA Buffer Address Register - hcdmab11
40046  *
40047  * These registers are present only in case of Scatter/Gather DMA. These
40048  * registers are implemented in RAM instead of flop-based implementation. Holds
40049  * the current buffer address. This register is updated as and when the
40050  * data transfer for the corresponding end point is in progress. This
40051  * register is present only in Scatter/Gather DMA mode. Otherwise this field
40052  * is reserved.
40053  *
40054  * Register Layout
40055  *
40056  * Bits | Access | Reset | Description
40057  * :-------|:-------|:------|:-----------------------------------
40058  * [31:0] | RW | 0x0 | Host Channel 11 DMA Buffer Address
40059  *
40060  */
40061 /*
40062  * Field : Host Channel 11 DMA Buffer Address - hcdmab11
40063  *
40064  * These registers are present only in case of Scatter/Gather DMA. These
40065  * registers are implemented in RAM instead of flop-based implementation. Holds
40066  * the current buffer address. This register is updated as and when the data
40067  * transfer for the corresponding end point is in progress. This register is
40068  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
40069  *
40070  * Field Access Macros:
40071  *
40072  */
40073 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB11_HCDMAB11 register field. */
40074 #define ALT_USB_HOST_HCDMAB11_HCDMAB11_LSB 0
40075 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB11_HCDMAB11 register field. */
40076 #define ALT_USB_HOST_HCDMAB11_HCDMAB11_MSB 31
40077 /* The width in bits of the ALT_USB_HOST_HCDMAB11_HCDMAB11 register field. */
40078 #define ALT_USB_HOST_HCDMAB11_HCDMAB11_WIDTH 32
40079 /* The mask used to set the ALT_USB_HOST_HCDMAB11_HCDMAB11 register field value. */
40080 #define ALT_USB_HOST_HCDMAB11_HCDMAB11_SET_MSK 0xffffffff
40081 /* The mask used to clear the ALT_USB_HOST_HCDMAB11_HCDMAB11 register field value. */
40082 #define ALT_USB_HOST_HCDMAB11_HCDMAB11_CLR_MSK 0x00000000
40083 /* The reset value of the ALT_USB_HOST_HCDMAB11_HCDMAB11 register field. */
40084 #define ALT_USB_HOST_HCDMAB11_HCDMAB11_RESET 0x0
40085 /* Extracts the ALT_USB_HOST_HCDMAB11_HCDMAB11 field value from a register. */
40086 #define ALT_USB_HOST_HCDMAB11_HCDMAB11_GET(value) (((value) & 0xffffffff) >> 0)
40087 /* Produces a ALT_USB_HOST_HCDMAB11_HCDMAB11 register field value suitable for setting the register. */
40088 #define ALT_USB_HOST_HCDMAB11_HCDMAB11_SET(value) (((value) << 0) & 0xffffffff)
40089 
40090 #ifndef __ASSEMBLY__
40091 /*
40092  * WARNING: The C register and register group struct declarations are provided for
40093  * convenience and illustrative purposes. They should, however, be used with
40094  * caution as the C language standard provides no guarantees about the alignment or
40095  * atomicity of device memory accesses. The recommended practice for writing
40096  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
40097  * alt_write_word() functions.
40098  *
40099  * The struct declaration for register ALT_USB_HOST_HCDMAB11.
40100  */
40101 struct ALT_USB_HOST_HCDMAB11_s
40102 {
40103  uint32_t hcdmab11 : 32; /* Host Channel 11 DMA Buffer Address */
40104 };
40105 
40106 /* The typedef declaration for register ALT_USB_HOST_HCDMAB11. */
40107 typedef volatile struct ALT_USB_HOST_HCDMAB11_s ALT_USB_HOST_HCDMAB11_t;
40108 #endif /* __ASSEMBLY__ */
40109 
40110 /* The byte offset of the ALT_USB_HOST_HCDMAB11 register from the beginning of the component. */
40111 #define ALT_USB_HOST_HCDMAB11_OFST 0x278
40112 /* The address of the ALT_USB_HOST_HCDMAB11 register. */
40113 #define ALT_USB_HOST_HCDMAB11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB11_OFST))
40114 
40115 /*
40116  * Register : Host Channel 12 Characteristics Register - hcchar12
40117  *
40118  * Host Channel 1 Characteristics Register
40119  *
40120  * Register Layout
40121  *
40122  * Bits | Access | Reset | Description
40123  * :--------|:-------|:------|:--------------------
40124  * [10:0] | RW | 0x0 | Maximum Packet Size
40125  * [14:11] | RW | 0x0 | Endpoint Number
40126  * [15] | RW | 0x0 | Endpoint Direction
40127  * [16] | ??? | 0x0 | *UNDEFINED*
40128  * [17] | RW | 0x0 | Low-Speed Device
40129  * [19:18] | RW | 0x0 | Endpoint Type
40130  * [21:20] | RW | 0x0 | Multi Count
40131  * [28:22] | RW | 0x0 | Device Address
40132  * [29] | ??? | 0x0 | *UNDEFINED*
40133  * [30] | R | 0x0 | Channel Disable
40134  * [31] | R | 0x0 | Channel Enable
40135  *
40136  */
40137 /*
40138  * Field : Maximum Packet Size - mps
40139  *
40140  * Indicates the maximum packet size of the associated endpoint.
40141  *
40142  * Field Access Macros:
40143  *
40144  */
40145 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR12_MPS register field. */
40146 #define ALT_USB_HOST_HCCHAR12_MPS_LSB 0
40147 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR12_MPS register field. */
40148 #define ALT_USB_HOST_HCCHAR12_MPS_MSB 10
40149 /* The width in bits of the ALT_USB_HOST_HCCHAR12_MPS register field. */
40150 #define ALT_USB_HOST_HCCHAR12_MPS_WIDTH 11
40151 /* The mask used to set the ALT_USB_HOST_HCCHAR12_MPS register field value. */
40152 #define ALT_USB_HOST_HCCHAR12_MPS_SET_MSK 0x000007ff
40153 /* The mask used to clear the ALT_USB_HOST_HCCHAR12_MPS register field value. */
40154 #define ALT_USB_HOST_HCCHAR12_MPS_CLR_MSK 0xfffff800
40155 /* The reset value of the ALT_USB_HOST_HCCHAR12_MPS register field. */
40156 #define ALT_USB_HOST_HCCHAR12_MPS_RESET 0x0
40157 /* Extracts the ALT_USB_HOST_HCCHAR12_MPS field value from a register. */
40158 #define ALT_USB_HOST_HCCHAR12_MPS_GET(value) (((value) & 0x000007ff) >> 0)
40159 /* Produces a ALT_USB_HOST_HCCHAR12_MPS register field value suitable for setting the register. */
40160 #define ALT_USB_HOST_HCCHAR12_MPS_SET(value) (((value) << 0) & 0x000007ff)
40161 
40162 /*
40163  * Field : Endpoint Number - epnum
40164  *
40165  * Indicates the endpoint number on the device serving as the data source or sink.
40166  *
40167  * Field Enumeration Values:
40168  *
40169  * Enum | Value | Description
40170  * :--------------------------------------|:------|:--------------
40171  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT0 | 0x0 | End point 0
40172  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT1 | 0x1 | End point 1
40173  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT2 | 0x2 | End point 2
40174  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT3 | 0x3 | End point 3
40175  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT4 | 0x4 | End point 4
40176  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT5 | 0x5 | End point 5
40177  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT6 | 0x6 | End point 6
40178  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT7 | 0x7 | End point 7
40179  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT8 | 0x8 | End point 8
40180  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT9 | 0x9 | End point 9
40181  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT10 | 0xa | End point 10
40182  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT11 | 0xb | End point 11
40183  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT12 | 0xc | End point 12
40184  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT13 | 0xd | End point 13
40185  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT14 | 0xe | End point 14
40186  * ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT15 | 0xf | End point 15
40187  *
40188  * Field Access Macros:
40189  *
40190  */
40191 /*
40192  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40193  *
40194  * End point 0
40195  */
40196 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT0 0x0
40197 /*
40198  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40199  *
40200  * End point 1
40201  */
40202 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT1 0x1
40203 /*
40204  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40205  *
40206  * End point 2
40207  */
40208 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT2 0x2
40209 /*
40210  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40211  *
40212  * End point 3
40213  */
40214 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT3 0x3
40215 /*
40216  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40217  *
40218  * End point 4
40219  */
40220 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT4 0x4
40221 /*
40222  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40223  *
40224  * End point 5
40225  */
40226 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT5 0x5
40227 /*
40228  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40229  *
40230  * End point 6
40231  */
40232 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT6 0x6
40233 /*
40234  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40235  *
40236  * End point 7
40237  */
40238 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT7 0x7
40239 /*
40240  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40241  *
40242  * End point 8
40243  */
40244 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT8 0x8
40245 /*
40246  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40247  *
40248  * End point 9
40249  */
40250 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT9 0x9
40251 /*
40252  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40253  *
40254  * End point 10
40255  */
40256 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT10 0xa
40257 /*
40258  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40259  *
40260  * End point 11
40261  */
40262 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT11 0xb
40263 /*
40264  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40265  *
40266  * End point 12
40267  */
40268 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT12 0xc
40269 /*
40270  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40271  *
40272  * End point 13
40273  */
40274 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT13 0xd
40275 /*
40276  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40277  *
40278  * End point 14
40279  */
40280 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT14 0xe
40281 /*
40282  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPNUM
40283  *
40284  * End point 15
40285  */
40286 #define ALT_USB_HOST_HCCHAR12_EPNUM_E_ENDPT15 0xf
40287 
40288 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR12_EPNUM register field. */
40289 #define ALT_USB_HOST_HCCHAR12_EPNUM_LSB 11
40290 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR12_EPNUM register field. */
40291 #define ALT_USB_HOST_HCCHAR12_EPNUM_MSB 14
40292 /* The width in bits of the ALT_USB_HOST_HCCHAR12_EPNUM register field. */
40293 #define ALT_USB_HOST_HCCHAR12_EPNUM_WIDTH 4
40294 /* The mask used to set the ALT_USB_HOST_HCCHAR12_EPNUM register field value. */
40295 #define ALT_USB_HOST_HCCHAR12_EPNUM_SET_MSK 0x00007800
40296 /* The mask used to clear the ALT_USB_HOST_HCCHAR12_EPNUM register field value. */
40297 #define ALT_USB_HOST_HCCHAR12_EPNUM_CLR_MSK 0xffff87ff
40298 /* The reset value of the ALT_USB_HOST_HCCHAR12_EPNUM register field. */
40299 #define ALT_USB_HOST_HCCHAR12_EPNUM_RESET 0x0
40300 /* Extracts the ALT_USB_HOST_HCCHAR12_EPNUM field value from a register. */
40301 #define ALT_USB_HOST_HCCHAR12_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
40302 /* Produces a ALT_USB_HOST_HCCHAR12_EPNUM register field value suitable for setting the register. */
40303 #define ALT_USB_HOST_HCCHAR12_EPNUM_SET(value) (((value) << 11) & 0x00007800)
40304 
40305 /*
40306  * Field : Endpoint Direction - epdir
40307  *
40308  * Indicates whether the transaction is IN or OUT.
40309  *
40310  * Field Enumeration Values:
40311  *
40312  * Enum | Value | Description
40313  * :----------------------------------|:------|:--------------
40314  * ALT_USB_HOST_HCCHAR12_EPDIR_E_OUT | 0x0 | OUT Direction
40315  * ALT_USB_HOST_HCCHAR12_EPDIR_E_IN | 0x1 | IN Direction
40316  *
40317  * Field Access Macros:
40318  *
40319  */
40320 /*
40321  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPDIR
40322  *
40323  * OUT Direction
40324  */
40325 #define ALT_USB_HOST_HCCHAR12_EPDIR_E_OUT 0x0
40326 /*
40327  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPDIR
40328  *
40329  * IN Direction
40330  */
40331 #define ALT_USB_HOST_HCCHAR12_EPDIR_E_IN 0x1
40332 
40333 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR12_EPDIR register field. */
40334 #define ALT_USB_HOST_HCCHAR12_EPDIR_LSB 15
40335 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR12_EPDIR register field. */
40336 #define ALT_USB_HOST_HCCHAR12_EPDIR_MSB 15
40337 /* The width in bits of the ALT_USB_HOST_HCCHAR12_EPDIR register field. */
40338 #define ALT_USB_HOST_HCCHAR12_EPDIR_WIDTH 1
40339 /* The mask used to set the ALT_USB_HOST_HCCHAR12_EPDIR register field value. */
40340 #define ALT_USB_HOST_HCCHAR12_EPDIR_SET_MSK 0x00008000
40341 /* The mask used to clear the ALT_USB_HOST_HCCHAR12_EPDIR register field value. */
40342 #define ALT_USB_HOST_HCCHAR12_EPDIR_CLR_MSK 0xffff7fff
40343 /* The reset value of the ALT_USB_HOST_HCCHAR12_EPDIR register field. */
40344 #define ALT_USB_HOST_HCCHAR12_EPDIR_RESET 0x0
40345 /* Extracts the ALT_USB_HOST_HCCHAR12_EPDIR field value from a register. */
40346 #define ALT_USB_HOST_HCCHAR12_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
40347 /* Produces a ALT_USB_HOST_HCCHAR12_EPDIR register field value suitable for setting the register. */
40348 #define ALT_USB_HOST_HCCHAR12_EPDIR_SET(value) (((value) << 15) & 0x00008000)
40349 
40350 /*
40351  * Field : Low-Speed Device - lspddev
40352  *
40353  * This field is set by the application to indicate that this channel is
40354  * communicating to a low-speed device. The application must program this bit when
40355  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
40356  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
40357  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
40358  * core ignores this bit even if it is set by the application software
40359  *
40360  * Field Enumeration Values:
40361  *
40362  * Enum | Value | Description
40363  * :-------------------------------------|:------|:----------------------------------------
40364  * ALT_USB_HOST_HCCHAR12_LSPDDEV_E_DISD | 0x0 | Not Communicating with low speed device
40365  * ALT_USB_HOST_HCCHAR12_LSPDDEV_E_END | 0x1 | Communicating with low speed device
40366  *
40367  * Field Access Macros:
40368  *
40369  */
40370 /*
40371  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_LSPDDEV
40372  *
40373  * Not Communicating with low speed device
40374  */
40375 #define ALT_USB_HOST_HCCHAR12_LSPDDEV_E_DISD 0x0
40376 /*
40377  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_LSPDDEV
40378  *
40379  * Communicating with low speed device
40380  */
40381 #define ALT_USB_HOST_HCCHAR12_LSPDDEV_E_END 0x1
40382 
40383 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR12_LSPDDEV register field. */
40384 #define ALT_USB_HOST_HCCHAR12_LSPDDEV_LSB 17
40385 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR12_LSPDDEV register field. */
40386 #define ALT_USB_HOST_HCCHAR12_LSPDDEV_MSB 17
40387 /* The width in bits of the ALT_USB_HOST_HCCHAR12_LSPDDEV register field. */
40388 #define ALT_USB_HOST_HCCHAR12_LSPDDEV_WIDTH 1
40389 /* The mask used to set the ALT_USB_HOST_HCCHAR12_LSPDDEV register field value. */
40390 #define ALT_USB_HOST_HCCHAR12_LSPDDEV_SET_MSK 0x00020000
40391 /* The mask used to clear the ALT_USB_HOST_HCCHAR12_LSPDDEV register field value. */
40392 #define ALT_USB_HOST_HCCHAR12_LSPDDEV_CLR_MSK 0xfffdffff
40393 /* The reset value of the ALT_USB_HOST_HCCHAR12_LSPDDEV register field. */
40394 #define ALT_USB_HOST_HCCHAR12_LSPDDEV_RESET 0x0
40395 /* Extracts the ALT_USB_HOST_HCCHAR12_LSPDDEV field value from a register. */
40396 #define ALT_USB_HOST_HCCHAR12_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
40397 /* Produces a ALT_USB_HOST_HCCHAR12_LSPDDEV register field value suitable for setting the register. */
40398 #define ALT_USB_HOST_HCCHAR12_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
40399 
40400 /*
40401  * Field : Endpoint Type - eptype
40402  *
40403  * Indicates the transfer type selected.
40404  *
40405  * Field Enumeration Values:
40406  *
40407  * Enum | Value | Description
40408  * :--------------------------------------|:------|:------------
40409  * ALT_USB_HOST_HCCHAR12_EPTYPE_E_CTL | 0x0 | Control
40410  * ALT_USB_HOST_HCCHAR12_EPTYPE_E_ISOC | 0x1 | Isochronous
40411  * ALT_USB_HOST_HCCHAR12_EPTYPE_E_BULK | 0x2 | Bulk
40412  * ALT_USB_HOST_HCCHAR12_EPTYPE_E_INTERR | 0x3 | Interrupt
40413  *
40414  * Field Access Macros:
40415  *
40416  */
40417 /*
40418  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPTYPE
40419  *
40420  * Control
40421  */
40422 #define ALT_USB_HOST_HCCHAR12_EPTYPE_E_CTL 0x0
40423 /*
40424  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPTYPE
40425  *
40426  * Isochronous
40427  */
40428 #define ALT_USB_HOST_HCCHAR12_EPTYPE_E_ISOC 0x1
40429 /*
40430  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPTYPE
40431  *
40432  * Bulk
40433  */
40434 #define ALT_USB_HOST_HCCHAR12_EPTYPE_E_BULK 0x2
40435 /*
40436  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EPTYPE
40437  *
40438  * Interrupt
40439  */
40440 #define ALT_USB_HOST_HCCHAR12_EPTYPE_E_INTERR 0x3
40441 
40442 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR12_EPTYPE register field. */
40443 #define ALT_USB_HOST_HCCHAR12_EPTYPE_LSB 18
40444 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR12_EPTYPE register field. */
40445 #define ALT_USB_HOST_HCCHAR12_EPTYPE_MSB 19
40446 /* The width in bits of the ALT_USB_HOST_HCCHAR12_EPTYPE register field. */
40447 #define ALT_USB_HOST_HCCHAR12_EPTYPE_WIDTH 2
40448 /* The mask used to set the ALT_USB_HOST_HCCHAR12_EPTYPE register field value. */
40449 #define ALT_USB_HOST_HCCHAR12_EPTYPE_SET_MSK 0x000c0000
40450 /* The mask used to clear the ALT_USB_HOST_HCCHAR12_EPTYPE register field value. */
40451 #define ALT_USB_HOST_HCCHAR12_EPTYPE_CLR_MSK 0xfff3ffff
40452 /* The reset value of the ALT_USB_HOST_HCCHAR12_EPTYPE register field. */
40453 #define ALT_USB_HOST_HCCHAR12_EPTYPE_RESET 0x0
40454 /* Extracts the ALT_USB_HOST_HCCHAR12_EPTYPE field value from a register. */
40455 #define ALT_USB_HOST_HCCHAR12_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
40456 /* Produces a ALT_USB_HOST_HCCHAR12_EPTYPE register field value suitable for setting the register. */
40457 #define ALT_USB_HOST_HCCHAR12_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
40458 
40459 /*
40460  * Field : Multi Count - ec
40461  *
40462  * When the Split Enable bit of the Host Channel-n Split Control register
40463  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
40464  * transactions that must be executed per microframe for this periodic endpoint.
40465  * for non periodic transfers, this field is used only in DMA mode, and specifies
40466  * the number packets to be fetched for this channel before the internal DMA engine
40467  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
40468  * number of immediate retries to be performed for a periodic split transactions on
40469  * transaction errors. This field must be set to at least 1.
40470  *
40471  * Field Enumeration Values:
40472  *
40473  * Enum | Value | Description
40474  * :--------------------------------------|:------|:----------------------------------------------
40475  * ALT_USB_HOST_HCCHAR12_EC_E_RSVD | 0x0 | Reserved This field yields undefined result
40476  * ALT_USB_HOST_HCCHAR12_EC_E_TRANSONE | 0x1 | 1 transaction
40477  * ALT_USB_HOST_HCCHAR12_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
40478  * : | | per microframe
40479  * ALT_USB_HOST_HCCHAR12_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
40480  * : | | per microframe
40481  *
40482  * Field Access Macros:
40483  *
40484  */
40485 /*
40486  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EC
40487  *
40488  * Reserved This field yields undefined result
40489  */
40490 #define ALT_USB_HOST_HCCHAR12_EC_E_RSVD 0x0
40491 /*
40492  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EC
40493  *
40494  * 1 transaction
40495  */
40496 #define ALT_USB_HOST_HCCHAR12_EC_E_TRANSONE 0x1
40497 /*
40498  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EC
40499  *
40500  * 2 transactions to be issued for this endpoint per microframe
40501  */
40502 #define ALT_USB_HOST_HCCHAR12_EC_E_TRANSTWO 0x2
40503 /*
40504  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_EC
40505  *
40506  * 3 transactions to be issued for this endpoint per microframe
40507  */
40508 #define ALT_USB_HOST_HCCHAR12_EC_E_TRANSTHREE 0x3
40509 
40510 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR12_EC register field. */
40511 #define ALT_USB_HOST_HCCHAR12_EC_LSB 20
40512 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR12_EC register field. */
40513 #define ALT_USB_HOST_HCCHAR12_EC_MSB 21
40514 /* The width in bits of the ALT_USB_HOST_HCCHAR12_EC register field. */
40515 #define ALT_USB_HOST_HCCHAR12_EC_WIDTH 2
40516 /* The mask used to set the ALT_USB_HOST_HCCHAR12_EC register field value. */
40517 #define ALT_USB_HOST_HCCHAR12_EC_SET_MSK 0x00300000
40518 /* The mask used to clear the ALT_USB_HOST_HCCHAR12_EC register field value. */
40519 #define ALT_USB_HOST_HCCHAR12_EC_CLR_MSK 0xffcfffff
40520 /* The reset value of the ALT_USB_HOST_HCCHAR12_EC register field. */
40521 #define ALT_USB_HOST_HCCHAR12_EC_RESET 0x0
40522 /* Extracts the ALT_USB_HOST_HCCHAR12_EC field value from a register. */
40523 #define ALT_USB_HOST_HCCHAR12_EC_GET(value) (((value) & 0x00300000) >> 20)
40524 /* Produces a ALT_USB_HOST_HCCHAR12_EC register field value suitable for setting the register. */
40525 #define ALT_USB_HOST_HCCHAR12_EC_SET(value) (((value) << 20) & 0x00300000)
40526 
40527 /*
40528  * Field : Device Address - devaddr
40529  *
40530  * This field selects the specific device serving as the data source or sink.
40531  *
40532  * Field Access Macros:
40533  *
40534  */
40535 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR12_DEVADDR register field. */
40536 #define ALT_USB_HOST_HCCHAR12_DEVADDR_LSB 22
40537 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR12_DEVADDR register field. */
40538 #define ALT_USB_HOST_HCCHAR12_DEVADDR_MSB 28
40539 /* The width in bits of the ALT_USB_HOST_HCCHAR12_DEVADDR register field. */
40540 #define ALT_USB_HOST_HCCHAR12_DEVADDR_WIDTH 7
40541 /* The mask used to set the ALT_USB_HOST_HCCHAR12_DEVADDR register field value. */
40542 #define ALT_USB_HOST_HCCHAR12_DEVADDR_SET_MSK 0x1fc00000
40543 /* The mask used to clear the ALT_USB_HOST_HCCHAR12_DEVADDR register field value. */
40544 #define ALT_USB_HOST_HCCHAR12_DEVADDR_CLR_MSK 0xe03fffff
40545 /* The reset value of the ALT_USB_HOST_HCCHAR12_DEVADDR register field. */
40546 #define ALT_USB_HOST_HCCHAR12_DEVADDR_RESET 0x0
40547 /* Extracts the ALT_USB_HOST_HCCHAR12_DEVADDR field value from a register. */
40548 #define ALT_USB_HOST_HCCHAR12_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
40549 /* Produces a ALT_USB_HOST_HCCHAR12_DEVADDR register field value suitable for setting the register. */
40550 #define ALT_USB_HOST_HCCHAR12_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
40551 
40552 /*
40553  * Field : Channel Disable - chdis
40554  *
40555  * The application sets this bit to stop transmitting/receiving data on a channel,
40556  * even before the transfer for that channel is complete. The application must wait
40557  * for the Channel Disabled interrupt before treating the channel as disabled.
40558  *
40559  * Field Enumeration Values:
40560  *
40561  * Enum | Value | Description
40562  * :------------------------------------|:------|:----------------------------
40563  * ALT_USB_HOST_HCCHAR12_CHDIS_E_INACT | 0x0 | Transmit/Recieve normal
40564  * ALT_USB_HOST_HCCHAR12_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving
40565  *
40566  * Field Access Macros:
40567  *
40568  */
40569 /*
40570  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_CHDIS
40571  *
40572  * Transmit/Recieve normal
40573  */
40574 #define ALT_USB_HOST_HCCHAR12_CHDIS_E_INACT 0x0
40575 /*
40576  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_CHDIS
40577  *
40578  * Stop transmitting/receiving
40579  */
40580 #define ALT_USB_HOST_HCCHAR12_CHDIS_E_ACT 0x1
40581 
40582 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR12_CHDIS register field. */
40583 #define ALT_USB_HOST_HCCHAR12_CHDIS_LSB 30
40584 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR12_CHDIS register field. */
40585 #define ALT_USB_HOST_HCCHAR12_CHDIS_MSB 30
40586 /* The width in bits of the ALT_USB_HOST_HCCHAR12_CHDIS register field. */
40587 #define ALT_USB_HOST_HCCHAR12_CHDIS_WIDTH 1
40588 /* The mask used to set the ALT_USB_HOST_HCCHAR12_CHDIS register field value. */
40589 #define ALT_USB_HOST_HCCHAR12_CHDIS_SET_MSK 0x40000000
40590 /* The mask used to clear the ALT_USB_HOST_HCCHAR12_CHDIS register field value. */
40591 #define ALT_USB_HOST_HCCHAR12_CHDIS_CLR_MSK 0xbfffffff
40592 /* The reset value of the ALT_USB_HOST_HCCHAR12_CHDIS register field. */
40593 #define ALT_USB_HOST_HCCHAR12_CHDIS_RESET 0x0
40594 /* Extracts the ALT_USB_HOST_HCCHAR12_CHDIS field value from a register. */
40595 #define ALT_USB_HOST_HCCHAR12_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
40596 /* Produces a ALT_USB_HOST_HCCHAR12_CHDIS register field value suitable for setting the register. */
40597 #define ALT_USB_HOST_HCCHAR12_CHDIS_SET(value) (((value) << 30) & 0x40000000)
40598 
40599 /*
40600  * Field : Channel Enable - chena
40601  *
40602  * When Scatter/Gather mode is disabled This field is set by the application and
40603  * cleared by the OTG host.
40604  *
40605  * 0: Channel disabled
40606  *
40607  * 1: Channel enabled
40608  *
40609  * When Scatter/Gather mode is enabled.
40610  *
40611  * Field Enumeration Values:
40612  *
40613  * Enum | Value | Description
40614  * :------------------------------------|:------|:-------------------------------------------------
40615  * ALT_USB_HOST_HCCHAR12_CHENA_E_INACT | 0x0 | Indicates that the descriptor structure is not
40616  * : | | yet ready
40617  * ALT_USB_HOST_HCCHAR12_CHENA_E_ACT | 0x1 | Indicates that the descriptor structure and
40618  * : | | data buffer with data is setup and this
40619  * : | | channel can access the descriptor
40620  *
40621  * Field Access Macros:
40622  *
40623  */
40624 /*
40625  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_CHENA
40626  *
40627  * Indicates that the descriptor structure is not yet ready
40628  */
40629 #define ALT_USB_HOST_HCCHAR12_CHENA_E_INACT 0x0
40630 /*
40631  * Enumerated value for register field ALT_USB_HOST_HCCHAR12_CHENA
40632  *
40633  * Indicates that the descriptor structure and data buffer with data is
40634  * setup and this channel can access the descriptor
40635  */
40636 #define ALT_USB_HOST_HCCHAR12_CHENA_E_ACT 0x1
40637 
40638 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR12_CHENA register field. */
40639 #define ALT_USB_HOST_HCCHAR12_CHENA_LSB 31
40640 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR12_CHENA register field. */
40641 #define ALT_USB_HOST_HCCHAR12_CHENA_MSB 31
40642 /* The width in bits of the ALT_USB_HOST_HCCHAR12_CHENA register field. */
40643 #define ALT_USB_HOST_HCCHAR12_CHENA_WIDTH 1
40644 /* The mask used to set the ALT_USB_HOST_HCCHAR12_CHENA register field value. */
40645 #define ALT_USB_HOST_HCCHAR12_CHENA_SET_MSK 0x80000000
40646 /* The mask used to clear the ALT_USB_HOST_HCCHAR12_CHENA register field value. */
40647 #define ALT_USB_HOST_HCCHAR12_CHENA_CLR_MSK 0x7fffffff
40648 /* The reset value of the ALT_USB_HOST_HCCHAR12_CHENA register field. */
40649 #define ALT_USB_HOST_HCCHAR12_CHENA_RESET 0x0
40650 /* Extracts the ALT_USB_HOST_HCCHAR12_CHENA field value from a register. */
40651 #define ALT_USB_HOST_HCCHAR12_CHENA_GET(value) (((value) & 0x80000000) >> 31)
40652 /* Produces a ALT_USB_HOST_HCCHAR12_CHENA register field value suitable for setting the register. */
40653 #define ALT_USB_HOST_HCCHAR12_CHENA_SET(value) (((value) << 31) & 0x80000000)
40654 
40655 #ifndef __ASSEMBLY__
40656 /*
40657  * WARNING: The C register and register group struct declarations are provided for
40658  * convenience and illustrative purposes. They should, however, be used with
40659  * caution as the C language standard provides no guarantees about the alignment or
40660  * atomicity of device memory accesses. The recommended practice for writing
40661  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
40662  * alt_write_word() functions.
40663  *
40664  * The struct declaration for register ALT_USB_HOST_HCCHAR12.
40665  */
40666 struct ALT_USB_HOST_HCCHAR12_s
40667 {
40668  uint32_t mps : 11; /* Maximum Packet Size */
40669  uint32_t epnum : 4; /* Endpoint Number */
40670  uint32_t epdir : 1; /* Endpoint Direction */
40671  uint32_t : 1; /* *UNDEFINED* */
40672  uint32_t lspddev : 1; /* Low-Speed Device */
40673  uint32_t eptype : 2; /* Endpoint Type */
40674  uint32_t ec : 2; /* Multi Count */
40675  uint32_t devaddr : 7; /* Device Address */
40676  uint32_t : 1; /* *UNDEFINED* */
40677  const uint32_t chdis : 1; /* Channel Disable */
40678  const uint32_t chena : 1; /* Channel Enable */
40679 };
40680 
40681 /* The typedef declaration for register ALT_USB_HOST_HCCHAR12. */
40682 typedef volatile struct ALT_USB_HOST_HCCHAR12_s ALT_USB_HOST_HCCHAR12_t;
40683 #endif /* __ASSEMBLY__ */
40684 
40685 /* The byte offset of the ALT_USB_HOST_HCCHAR12 register from the beginning of the component. */
40686 #define ALT_USB_HOST_HCCHAR12_OFST 0x280
40687 /* The address of the ALT_USB_HOST_HCCHAR12 register. */
40688 #define ALT_USB_HOST_HCCHAR12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR12_OFST))
40689 
40690 /*
40691  * Register : Host Channel 12 Split Control Register - hcsplt12
40692  *
40693  * Channel_number 1
40694  *
40695  * Register Layout
40696  *
40697  * Bits | Access | Reset | Description
40698  * :--------|:-------|:------|:---------------------
40699  * [6:0] | RW | 0x0 | Port Address
40700  * [13:7] | RW | 0x0 | Hub Address
40701  * [15:14] | RW | 0x0 | Transaction Position
40702  * [16] | RW | 0x0 | Do Complete Split
40703  * [30:17] | ??? | 0x0 | *UNDEFINED*
40704  * [31] | RW | 0x0 | Split Enable
40705  *
40706  */
40707 /*
40708  * Field : Port Address - prtaddr
40709  *
40710  * This field is the port number of the recipient transactiontranslator.
40711  *
40712  * Field Access Macros:
40713  *
40714  */
40715 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT12_PRTADDR register field. */
40716 #define ALT_USB_HOST_HCSPLT12_PRTADDR_LSB 0
40717 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT12_PRTADDR register field. */
40718 #define ALT_USB_HOST_HCSPLT12_PRTADDR_MSB 6
40719 /* The width in bits of the ALT_USB_HOST_HCSPLT12_PRTADDR register field. */
40720 #define ALT_USB_HOST_HCSPLT12_PRTADDR_WIDTH 7
40721 /* The mask used to set the ALT_USB_HOST_HCSPLT12_PRTADDR register field value. */
40722 #define ALT_USB_HOST_HCSPLT12_PRTADDR_SET_MSK 0x0000007f
40723 /* The mask used to clear the ALT_USB_HOST_HCSPLT12_PRTADDR register field value. */
40724 #define ALT_USB_HOST_HCSPLT12_PRTADDR_CLR_MSK 0xffffff80
40725 /* The reset value of the ALT_USB_HOST_HCSPLT12_PRTADDR register field. */
40726 #define ALT_USB_HOST_HCSPLT12_PRTADDR_RESET 0x0
40727 /* Extracts the ALT_USB_HOST_HCSPLT12_PRTADDR field value from a register. */
40728 #define ALT_USB_HOST_HCSPLT12_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
40729 /* Produces a ALT_USB_HOST_HCSPLT12_PRTADDR register field value suitable for setting the register. */
40730 #define ALT_USB_HOST_HCSPLT12_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
40731 
40732 /*
40733  * Field : Hub Address - hubaddr
40734  *
40735  * This field holds the device address of the transaction translator's hub.
40736  *
40737  * Field Access Macros:
40738  *
40739  */
40740 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT12_HUBADDR register field. */
40741 #define ALT_USB_HOST_HCSPLT12_HUBADDR_LSB 7
40742 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT12_HUBADDR register field. */
40743 #define ALT_USB_HOST_HCSPLT12_HUBADDR_MSB 13
40744 /* The width in bits of the ALT_USB_HOST_HCSPLT12_HUBADDR register field. */
40745 #define ALT_USB_HOST_HCSPLT12_HUBADDR_WIDTH 7
40746 /* The mask used to set the ALT_USB_HOST_HCSPLT12_HUBADDR register field value. */
40747 #define ALT_USB_HOST_HCSPLT12_HUBADDR_SET_MSK 0x00003f80
40748 /* The mask used to clear the ALT_USB_HOST_HCSPLT12_HUBADDR register field value. */
40749 #define ALT_USB_HOST_HCSPLT12_HUBADDR_CLR_MSK 0xffffc07f
40750 /* The reset value of the ALT_USB_HOST_HCSPLT12_HUBADDR register field. */
40751 #define ALT_USB_HOST_HCSPLT12_HUBADDR_RESET 0x0
40752 /* Extracts the ALT_USB_HOST_HCSPLT12_HUBADDR field value from a register. */
40753 #define ALT_USB_HOST_HCSPLT12_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
40754 /* Produces a ALT_USB_HOST_HCSPLT12_HUBADDR register field value suitable for setting the register. */
40755 #define ALT_USB_HOST_HCSPLT12_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
40756 
40757 /*
40758  * Field : Transaction Position - xactpos
40759  *
40760  * This field is used to determine whether to send all, first, middle, or last
40761  * payloads with each OUT transaction.
40762  *
40763  * Field Enumeration Values:
40764  *
40765  * Enum | Value | Description
40766  * :---------------------------------------|:------|:------------------------------------------------
40767  * ALT_USB_HOST_HCSPLT12_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
40768  * : | | transaction (which is larger than 188 bytes)
40769  * ALT_USB_HOST_HCSPLT12_XACTPOS_E_END | 0x1 | End. This is the last payload of this
40770  * : | | transaction (which is larger than 188 bytes)
40771  * ALT_USB_HOST_HCSPLT12_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
40772  * : | | transaction (which is larger than 188 bytes)
40773  * ALT_USB_HOST_HCSPLT12_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
40774  * : | | transaction (which is less than or equal to 188
40775  * : | | bytes)
40776  *
40777  * Field Access Macros:
40778  *
40779  */
40780 /*
40781  * Enumerated value for register field ALT_USB_HOST_HCSPLT12_XACTPOS
40782  *
40783  * Mid. This is the middle payload of this transaction (which is larger than 188
40784  * bytes)
40785  */
40786 #define ALT_USB_HOST_HCSPLT12_XACTPOS_E_MIDDLE 0x0
40787 /*
40788  * Enumerated value for register field ALT_USB_HOST_HCSPLT12_XACTPOS
40789  *
40790  * End. This is the last payload of this transaction (which is larger than 188
40791  * bytes)
40792  */
40793 #define ALT_USB_HOST_HCSPLT12_XACTPOS_E_END 0x1
40794 /*
40795  * Enumerated value for register field ALT_USB_HOST_HCSPLT12_XACTPOS
40796  *
40797  * Begin. This is the first data payload of this transaction (which is larger than
40798  * 188 bytes)
40799  */
40800 #define ALT_USB_HOST_HCSPLT12_XACTPOS_E_BEGIN 0x2
40801 /*
40802  * Enumerated value for register field ALT_USB_HOST_HCSPLT12_XACTPOS
40803  *
40804  * All. This is the entire data payload is of this transaction (which is less than
40805  * or equal to 188 bytes)
40806  */
40807 #define ALT_USB_HOST_HCSPLT12_XACTPOS_E_ALL 0x3
40808 
40809 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT12_XACTPOS register field. */
40810 #define ALT_USB_HOST_HCSPLT12_XACTPOS_LSB 14
40811 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT12_XACTPOS register field. */
40812 #define ALT_USB_HOST_HCSPLT12_XACTPOS_MSB 15
40813 /* The width in bits of the ALT_USB_HOST_HCSPLT12_XACTPOS register field. */
40814 #define ALT_USB_HOST_HCSPLT12_XACTPOS_WIDTH 2
40815 /* The mask used to set the ALT_USB_HOST_HCSPLT12_XACTPOS register field value. */
40816 #define ALT_USB_HOST_HCSPLT12_XACTPOS_SET_MSK 0x0000c000
40817 /* The mask used to clear the ALT_USB_HOST_HCSPLT12_XACTPOS register field value. */
40818 #define ALT_USB_HOST_HCSPLT12_XACTPOS_CLR_MSK 0xffff3fff
40819 /* The reset value of the ALT_USB_HOST_HCSPLT12_XACTPOS register field. */
40820 #define ALT_USB_HOST_HCSPLT12_XACTPOS_RESET 0x0
40821 /* Extracts the ALT_USB_HOST_HCSPLT12_XACTPOS field value from a register. */
40822 #define ALT_USB_HOST_HCSPLT12_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
40823 /* Produces a ALT_USB_HOST_HCSPLT12_XACTPOS register field value suitable for setting the register. */
40824 #define ALT_USB_HOST_HCSPLT12_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
40825 
40826 /*
40827  * Field : Do Complete Split - compsplt
40828  *
40829  * The application sets this field to request the OTG host to perform a complete
40830  * split transaction.
40831  *
40832  * Field Enumeration Values:
40833  *
40834  * Enum | Value | Description
40835  * :-----------------------------------------|:------|:---------------------
40836  * ALT_USB_HOST_HCSPLT12_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
40837  * ALT_USB_HOST_HCSPLT12_COMPSPLT_E_SPLIT | 0x1 | Split transaction
40838  *
40839  * Field Access Macros:
40840  *
40841  */
40842 /*
40843  * Enumerated value for register field ALT_USB_HOST_HCSPLT12_COMPSPLT
40844  *
40845  * No split transaction
40846  */
40847 #define ALT_USB_HOST_HCSPLT12_COMPSPLT_E_NOSPLIT 0x0
40848 /*
40849  * Enumerated value for register field ALT_USB_HOST_HCSPLT12_COMPSPLT
40850  *
40851  * Split transaction
40852  */
40853 #define ALT_USB_HOST_HCSPLT12_COMPSPLT_E_SPLIT 0x1
40854 
40855 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT12_COMPSPLT register field. */
40856 #define ALT_USB_HOST_HCSPLT12_COMPSPLT_LSB 16
40857 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT12_COMPSPLT register field. */
40858 #define ALT_USB_HOST_HCSPLT12_COMPSPLT_MSB 16
40859 /* The width in bits of the ALT_USB_HOST_HCSPLT12_COMPSPLT register field. */
40860 #define ALT_USB_HOST_HCSPLT12_COMPSPLT_WIDTH 1
40861 /* The mask used to set the ALT_USB_HOST_HCSPLT12_COMPSPLT register field value. */
40862 #define ALT_USB_HOST_HCSPLT12_COMPSPLT_SET_MSK 0x00010000
40863 /* The mask used to clear the ALT_USB_HOST_HCSPLT12_COMPSPLT register field value. */
40864 #define ALT_USB_HOST_HCSPLT12_COMPSPLT_CLR_MSK 0xfffeffff
40865 /* The reset value of the ALT_USB_HOST_HCSPLT12_COMPSPLT register field. */
40866 #define ALT_USB_HOST_HCSPLT12_COMPSPLT_RESET 0x0
40867 /* Extracts the ALT_USB_HOST_HCSPLT12_COMPSPLT field value from a register. */
40868 #define ALT_USB_HOST_HCSPLT12_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
40869 /* Produces a ALT_USB_HOST_HCSPLT12_COMPSPLT register field value suitable for setting the register. */
40870 #define ALT_USB_HOST_HCSPLT12_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
40871 
40872 /*
40873  * Field : Split Enable - spltena
40874  *
40875  * The application sets this field to indicate that this channel is enabled to
40876  * perform split transactions.
40877  *
40878  * Field Enumeration Values:
40879  *
40880  * Enum | Value | Description
40881  * :-------------------------------------|:------|:------------------
40882  * ALT_USB_HOST_HCSPLT12_SPLTENA_E_DISD | 0x0 | Split not enabled
40883  * ALT_USB_HOST_HCSPLT12_SPLTENA_E_END | 0x1 | Split enabled
40884  *
40885  * Field Access Macros:
40886  *
40887  */
40888 /*
40889  * Enumerated value for register field ALT_USB_HOST_HCSPLT12_SPLTENA
40890  *
40891  * Split not enabled
40892  */
40893 #define ALT_USB_HOST_HCSPLT12_SPLTENA_E_DISD 0x0
40894 /*
40895  * Enumerated value for register field ALT_USB_HOST_HCSPLT12_SPLTENA
40896  *
40897  * Split enabled
40898  */
40899 #define ALT_USB_HOST_HCSPLT12_SPLTENA_E_END 0x1
40900 
40901 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT12_SPLTENA register field. */
40902 #define ALT_USB_HOST_HCSPLT12_SPLTENA_LSB 31
40903 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT12_SPLTENA register field. */
40904 #define ALT_USB_HOST_HCSPLT12_SPLTENA_MSB 31
40905 /* The width in bits of the ALT_USB_HOST_HCSPLT12_SPLTENA register field. */
40906 #define ALT_USB_HOST_HCSPLT12_SPLTENA_WIDTH 1
40907 /* The mask used to set the ALT_USB_HOST_HCSPLT12_SPLTENA register field value. */
40908 #define ALT_USB_HOST_HCSPLT12_SPLTENA_SET_MSK 0x80000000
40909 /* The mask used to clear the ALT_USB_HOST_HCSPLT12_SPLTENA register field value. */
40910 #define ALT_USB_HOST_HCSPLT12_SPLTENA_CLR_MSK 0x7fffffff
40911 /* The reset value of the ALT_USB_HOST_HCSPLT12_SPLTENA register field. */
40912 #define ALT_USB_HOST_HCSPLT12_SPLTENA_RESET 0x0
40913 /* Extracts the ALT_USB_HOST_HCSPLT12_SPLTENA field value from a register. */
40914 #define ALT_USB_HOST_HCSPLT12_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
40915 /* Produces a ALT_USB_HOST_HCSPLT12_SPLTENA register field value suitable for setting the register. */
40916 #define ALT_USB_HOST_HCSPLT12_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
40917 
40918 #ifndef __ASSEMBLY__
40919 /*
40920  * WARNING: The C register and register group struct declarations are provided for
40921  * convenience and illustrative purposes. They should, however, be used with
40922  * caution as the C language standard provides no guarantees about the alignment or
40923  * atomicity of device memory accesses. The recommended practice for writing
40924  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
40925  * alt_write_word() functions.
40926  *
40927  * The struct declaration for register ALT_USB_HOST_HCSPLT12.
40928  */
40929 struct ALT_USB_HOST_HCSPLT12_s
40930 {
40931  uint32_t prtaddr : 7; /* Port Address */
40932  uint32_t hubaddr : 7; /* Hub Address */
40933  uint32_t xactpos : 2; /* Transaction Position */
40934  uint32_t compsplt : 1; /* Do Complete Split */
40935  uint32_t : 14; /* *UNDEFINED* */
40936  uint32_t spltena : 1; /* Split Enable */
40937 };
40938 
40939 /* The typedef declaration for register ALT_USB_HOST_HCSPLT12. */
40940 typedef volatile struct ALT_USB_HOST_HCSPLT12_s ALT_USB_HOST_HCSPLT12_t;
40941 #endif /* __ASSEMBLY__ */
40942 
40943 /* The byte offset of the ALT_USB_HOST_HCSPLT12 register from the beginning of the component. */
40944 #define ALT_USB_HOST_HCSPLT12_OFST 0x284
40945 /* The address of the ALT_USB_HOST_HCSPLT12 register. */
40946 #define ALT_USB_HOST_HCSPLT12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT12_OFST))
40947 
40948 /*
40949  * Register : Host Channel 12 Interrupt Register - hcint12
40950  *
40951  * This register indicates the status of a channel with respect to USB- and AHB-
40952  * related events. The application must read this register when the Host Channels
40953  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
40954  * application can read this register, it must first read the Host All Channels
40955  * Interrupt (HAINT) register to get the exact channel number for the Host
40956  * Channel-n Interrupt register. The application must clear the appropriate bit in
40957  * this register to clear the corresponding bits in the HAINT and GINTSTS
40958  * registers.
40959  *
40960  * Register Layout
40961  *
40962  * Bits | Access | Reset | Description
40963  * :--------|:-------|:------|:--------------------------------------------
40964  * [0] | R | 0x0 | Transfer Completed
40965  * [1] | R | 0x0 | Channel Halted
40966  * [2] | R | 0x0 | AHB Error
40967  * [3] | R | 0x0 | STALL Response Received Interrupt
40968  * [4] | R | 0x0 | NAK Response Received Interrupt
40969  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
40970  * [6] | R | 0x0 | NYET Response Received Interrupt
40971  * [7] | R | 0x0 | Transaction Error
40972  * [8] | R | 0x0 | Babble Error
40973  * [9] | R | 0x0 | Frame Overrun
40974  * [10] | R | 0x0 | Data Toggle Error
40975  * [11] | R | 0x0 | BNA Interrupt
40976  * [12] | R | 0x0 | Excessive Transaction Error
40977  * [13] | R | 0x0 | Descriptor rollover interrupt
40978  * [31:14] | ??? | 0x0 | *UNDEFINED*
40979  *
40980  */
40981 /*
40982  * Field : Transfer Completed - xfercompl
40983  *
40984  * Transfer completed normally without any errors. This bit can be set only by the
40985  * core and the application should write 1 to clear it.
40986  *
40987  * Field Enumeration Values:
40988  *
40989  * Enum | Value | Description
40990  * :---------------------------------------|:------|:-----------------------------------------------
40991  * ALT_USB_HOST_HCINT12_XFERCOMPL_E_INACT | 0x0 | No transfer
40992  * ALT_USB_HOST_HCINT12_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
40993  *
40994  * Field Access Macros:
40995  *
40996  */
40997 /*
40998  * Enumerated value for register field ALT_USB_HOST_HCINT12_XFERCOMPL
40999  *
41000  * No transfer
41001  */
41002 #define ALT_USB_HOST_HCINT12_XFERCOMPL_E_INACT 0x0
41003 /*
41004  * Enumerated value for register field ALT_USB_HOST_HCINT12_XFERCOMPL
41005  *
41006  * Transfer completed normally without any errors
41007  */
41008 #define ALT_USB_HOST_HCINT12_XFERCOMPL_E_ACT 0x1
41009 
41010 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_XFERCOMPL register field. */
41011 #define ALT_USB_HOST_HCINT12_XFERCOMPL_LSB 0
41012 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_XFERCOMPL register field. */
41013 #define ALT_USB_HOST_HCINT12_XFERCOMPL_MSB 0
41014 /* The width in bits of the ALT_USB_HOST_HCINT12_XFERCOMPL register field. */
41015 #define ALT_USB_HOST_HCINT12_XFERCOMPL_WIDTH 1
41016 /* The mask used to set the ALT_USB_HOST_HCINT12_XFERCOMPL register field value. */
41017 #define ALT_USB_HOST_HCINT12_XFERCOMPL_SET_MSK 0x00000001
41018 /* The mask used to clear the ALT_USB_HOST_HCINT12_XFERCOMPL register field value. */
41019 #define ALT_USB_HOST_HCINT12_XFERCOMPL_CLR_MSK 0xfffffffe
41020 /* The reset value of the ALT_USB_HOST_HCINT12_XFERCOMPL register field. */
41021 #define ALT_USB_HOST_HCINT12_XFERCOMPL_RESET 0x0
41022 /* Extracts the ALT_USB_HOST_HCINT12_XFERCOMPL field value from a register. */
41023 #define ALT_USB_HOST_HCINT12_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
41024 /* Produces a ALT_USB_HOST_HCINT12_XFERCOMPL register field value suitable for setting the register. */
41025 #define ALT_USB_HOST_HCINT12_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
41026 
41027 /*
41028  * Field : Channel Halted - chhltd
41029  *
41030  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
41031  * either because of any USB transaction error or in response to disable request by
41032  * the application or because of a completed transfer. In Scatter/gather DMA mode,
41033  * this indicates that transfer completed due to any of the following
41034  *
41035  * . EOL being set in descriptor
41036  *
41037  * . AHB error
41038  *
41039  * . Excessive transaction errors
41040  *
41041  * . Babble
41042  *
41043  * . Stall
41044  *
41045  * Field Enumeration Values:
41046  *
41047  * Enum | Value | Description
41048  * :------------------------------------|:------|:-------------------
41049  * ALT_USB_HOST_HCINT12_CHHLTD_E_INACT | 0x0 | Channel not halted
41050  * ALT_USB_HOST_HCINT12_CHHLTD_E_ACT | 0x1 | Channel Halted
41051  *
41052  * Field Access Macros:
41053  *
41054  */
41055 /*
41056  * Enumerated value for register field ALT_USB_HOST_HCINT12_CHHLTD
41057  *
41058  * Channel not halted
41059  */
41060 #define ALT_USB_HOST_HCINT12_CHHLTD_E_INACT 0x0
41061 /*
41062  * Enumerated value for register field ALT_USB_HOST_HCINT12_CHHLTD
41063  *
41064  * Channel Halted
41065  */
41066 #define ALT_USB_HOST_HCINT12_CHHLTD_E_ACT 0x1
41067 
41068 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_CHHLTD register field. */
41069 #define ALT_USB_HOST_HCINT12_CHHLTD_LSB 1
41070 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_CHHLTD register field. */
41071 #define ALT_USB_HOST_HCINT12_CHHLTD_MSB 1
41072 /* The width in bits of the ALT_USB_HOST_HCINT12_CHHLTD register field. */
41073 #define ALT_USB_HOST_HCINT12_CHHLTD_WIDTH 1
41074 /* The mask used to set the ALT_USB_HOST_HCINT12_CHHLTD register field value. */
41075 #define ALT_USB_HOST_HCINT12_CHHLTD_SET_MSK 0x00000002
41076 /* The mask used to clear the ALT_USB_HOST_HCINT12_CHHLTD register field value. */
41077 #define ALT_USB_HOST_HCINT12_CHHLTD_CLR_MSK 0xfffffffd
41078 /* The reset value of the ALT_USB_HOST_HCINT12_CHHLTD register field. */
41079 #define ALT_USB_HOST_HCINT12_CHHLTD_RESET 0x0
41080 /* Extracts the ALT_USB_HOST_HCINT12_CHHLTD field value from a register. */
41081 #define ALT_USB_HOST_HCINT12_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
41082 /* Produces a ALT_USB_HOST_HCINT12_CHHLTD register field value suitable for setting the register. */
41083 #define ALT_USB_HOST_HCINT12_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
41084 
41085 /*
41086  * Field : AHB Error - ahberr
41087  *
41088  * This is generated only in Internal DMA mode when there is an AHB error during
41089  * AHB read/write. The application can read the corresponding channel's DMA address
41090  * register to get the error address.
41091  *
41092  * Field Enumeration Values:
41093  *
41094  * Enum | Value | Description
41095  * :------------------------------------|:------|:--------------------------------
41096  * ALT_USB_HOST_HCINT12_AHBERR_E_INACT | 0x0 | No AHB error
41097  * ALT_USB_HOST_HCINT12_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
41098  *
41099  * Field Access Macros:
41100  *
41101  */
41102 /*
41103  * Enumerated value for register field ALT_USB_HOST_HCINT12_AHBERR
41104  *
41105  * No AHB error
41106  */
41107 #define ALT_USB_HOST_HCINT12_AHBERR_E_INACT 0x0
41108 /*
41109  * Enumerated value for register field ALT_USB_HOST_HCINT12_AHBERR
41110  *
41111  * AHB error during AHB read/write
41112  */
41113 #define ALT_USB_HOST_HCINT12_AHBERR_E_ACT 0x1
41114 
41115 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_AHBERR register field. */
41116 #define ALT_USB_HOST_HCINT12_AHBERR_LSB 2
41117 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_AHBERR register field. */
41118 #define ALT_USB_HOST_HCINT12_AHBERR_MSB 2
41119 /* The width in bits of the ALT_USB_HOST_HCINT12_AHBERR register field. */
41120 #define ALT_USB_HOST_HCINT12_AHBERR_WIDTH 1
41121 /* The mask used to set the ALT_USB_HOST_HCINT12_AHBERR register field value. */
41122 #define ALT_USB_HOST_HCINT12_AHBERR_SET_MSK 0x00000004
41123 /* The mask used to clear the ALT_USB_HOST_HCINT12_AHBERR register field value. */
41124 #define ALT_USB_HOST_HCINT12_AHBERR_CLR_MSK 0xfffffffb
41125 /* The reset value of the ALT_USB_HOST_HCINT12_AHBERR register field. */
41126 #define ALT_USB_HOST_HCINT12_AHBERR_RESET 0x0
41127 /* Extracts the ALT_USB_HOST_HCINT12_AHBERR field value from a register. */
41128 #define ALT_USB_HOST_HCINT12_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
41129 /* Produces a ALT_USB_HOST_HCINT12_AHBERR register field value suitable for setting the register. */
41130 #define ALT_USB_HOST_HCINT12_AHBERR_SET(value) (((value) << 2) & 0x00000004)
41131 
41132 /*
41133  * Field : STALL Response Received Interrupt - stall
41134  *
41135  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
41136  * This bit can be set only by the core and the application should write 1 to clear
41137  * it.
41138  *
41139  * Field Enumeration Values:
41140  *
41141  * Enum | Value | Description
41142  * :-----------------------------------|:------|:-------------------
41143  * ALT_USB_HOST_HCINT12_STALL_E_INACT | 0x0 | No Stall Interrupt
41144  * ALT_USB_HOST_HCINT12_STALL_E_ACT | 0x1 | Stall Interrupt
41145  *
41146  * Field Access Macros:
41147  *
41148  */
41149 /*
41150  * Enumerated value for register field ALT_USB_HOST_HCINT12_STALL
41151  *
41152  * No Stall Interrupt
41153  */
41154 #define ALT_USB_HOST_HCINT12_STALL_E_INACT 0x0
41155 /*
41156  * Enumerated value for register field ALT_USB_HOST_HCINT12_STALL
41157  *
41158  * Stall Interrupt
41159  */
41160 #define ALT_USB_HOST_HCINT12_STALL_E_ACT 0x1
41161 
41162 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_STALL register field. */
41163 #define ALT_USB_HOST_HCINT12_STALL_LSB 3
41164 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_STALL register field. */
41165 #define ALT_USB_HOST_HCINT12_STALL_MSB 3
41166 /* The width in bits of the ALT_USB_HOST_HCINT12_STALL register field. */
41167 #define ALT_USB_HOST_HCINT12_STALL_WIDTH 1
41168 /* The mask used to set the ALT_USB_HOST_HCINT12_STALL register field value. */
41169 #define ALT_USB_HOST_HCINT12_STALL_SET_MSK 0x00000008
41170 /* The mask used to clear the ALT_USB_HOST_HCINT12_STALL register field value. */
41171 #define ALT_USB_HOST_HCINT12_STALL_CLR_MSK 0xfffffff7
41172 /* The reset value of the ALT_USB_HOST_HCINT12_STALL register field. */
41173 #define ALT_USB_HOST_HCINT12_STALL_RESET 0x0
41174 /* Extracts the ALT_USB_HOST_HCINT12_STALL field value from a register. */
41175 #define ALT_USB_HOST_HCINT12_STALL_GET(value) (((value) & 0x00000008) >> 3)
41176 /* Produces a ALT_USB_HOST_HCINT12_STALL register field value suitable for setting the register. */
41177 #define ALT_USB_HOST_HCINT12_STALL_SET(value) (((value) << 3) & 0x00000008)
41178 
41179 /*
41180  * Field : NAK Response Received Interrupt - nak
41181  *
41182  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
41183  * core.This bit can be set only by the core and the application should write 1 to
41184  * clear it.
41185  *
41186  * Field Enumeration Values:
41187  *
41188  * Enum | Value | Description
41189  * :---------------------------------|:------|:-----------------------------------
41190  * ALT_USB_HOST_HCINT12_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
41191  * ALT_USB_HOST_HCINT12_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
41192  *
41193  * Field Access Macros:
41194  *
41195  */
41196 /*
41197  * Enumerated value for register field ALT_USB_HOST_HCINT12_NAK
41198  *
41199  * No NAK Response Received Interrupt
41200  */
41201 #define ALT_USB_HOST_HCINT12_NAK_E_INACT 0x0
41202 /*
41203  * Enumerated value for register field ALT_USB_HOST_HCINT12_NAK
41204  *
41205  * NAK Response Received Interrupt
41206  */
41207 #define ALT_USB_HOST_HCINT12_NAK_E_ACT 0x1
41208 
41209 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_NAK register field. */
41210 #define ALT_USB_HOST_HCINT12_NAK_LSB 4
41211 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_NAK register field. */
41212 #define ALT_USB_HOST_HCINT12_NAK_MSB 4
41213 /* The width in bits of the ALT_USB_HOST_HCINT12_NAK register field. */
41214 #define ALT_USB_HOST_HCINT12_NAK_WIDTH 1
41215 /* The mask used to set the ALT_USB_HOST_HCINT12_NAK register field value. */
41216 #define ALT_USB_HOST_HCINT12_NAK_SET_MSK 0x00000010
41217 /* The mask used to clear the ALT_USB_HOST_HCINT12_NAK register field value. */
41218 #define ALT_USB_HOST_HCINT12_NAK_CLR_MSK 0xffffffef
41219 /* The reset value of the ALT_USB_HOST_HCINT12_NAK register field. */
41220 #define ALT_USB_HOST_HCINT12_NAK_RESET 0x0
41221 /* Extracts the ALT_USB_HOST_HCINT12_NAK field value from a register. */
41222 #define ALT_USB_HOST_HCINT12_NAK_GET(value) (((value) & 0x00000010) >> 4)
41223 /* Produces a ALT_USB_HOST_HCINT12_NAK register field value suitable for setting the register. */
41224 #define ALT_USB_HOST_HCINT12_NAK_SET(value) (((value) << 4) & 0x00000010)
41225 
41226 /*
41227  * Field : ACK Response Received Transmitted Interrupt - ack
41228  *
41229  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
41230  * This bit can be set only by the core and the application should write 1 to clear
41231  * it.
41232  *
41233  * Field Enumeration Values:
41234  *
41235  * Enum | Value | Description
41236  * :---------------------------------|:------|:-----------------------------------------------
41237  * ALT_USB_HOST_HCINT12_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
41238  * ALT_USB_HOST_HCINT12_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
41239  *
41240  * Field Access Macros:
41241  *
41242  */
41243 /*
41244  * Enumerated value for register field ALT_USB_HOST_HCINT12_ACK
41245  *
41246  * No ACK Response Received Transmitted Interrupt
41247  */
41248 #define ALT_USB_HOST_HCINT12_ACK_E_INACT 0x0
41249 /*
41250  * Enumerated value for register field ALT_USB_HOST_HCINT12_ACK
41251  *
41252  * ACK Response Received Transmitted Interrup
41253  */
41254 #define ALT_USB_HOST_HCINT12_ACK_E_ACT 0x1
41255 
41256 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_ACK register field. */
41257 #define ALT_USB_HOST_HCINT12_ACK_LSB 5
41258 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_ACK register field. */
41259 #define ALT_USB_HOST_HCINT12_ACK_MSB 5
41260 /* The width in bits of the ALT_USB_HOST_HCINT12_ACK register field. */
41261 #define ALT_USB_HOST_HCINT12_ACK_WIDTH 1
41262 /* The mask used to set the ALT_USB_HOST_HCINT12_ACK register field value. */
41263 #define ALT_USB_HOST_HCINT12_ACK_SET_MSK 0x00000020
41264 /* The mask used to clear the ALT_USB_HOST_HCINT12_ACK register field value. */
41265 #define ALT_USB_HOST_HCINT12_ACK_CLR_MSK 0xffffffdf
41266 /* The reset value of the ALT_USB_HOST_HCINT12_ACK register field. */
41267 #define ALT_USB_HOST_HCINT12_ACK_RESET 0x0
41268 /* Extracts the ALT_USB_HOST_HCINT12_ACK field value from a register. */
41269 #define ALT_USB_HOST_HCINT12_ACK_GET(value) (((value) & 0x00000020) >> 5)
41270 /* Produces a ALT_USB_HOST_HCINT12_ACK register field value suitable for setting the register. */
41271 #define ALT_USB_HOST_HCINT12_ACK_SET(value) (((value) << 5) & 0x00000020)
41272 
41273 /*
41274  * Field : NYET Response Received Interrupt - nyet
41275  *
41276  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
41277  * core.This bit can be set only by the core and the application should write 1 to
41278  * clear it.
41279  *
41280  * Field Enumeration Values:
41281  *
41282  * Enum | Value | Description
41283  * :----------------------------------|:------|:------------------------------------
41284  * ALT_USB_HOST_HCINT12_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
41285  * ALT_USB_HOST_HCINT12_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
41286  *
41287  * Field Access Macros:
41288  *
41289  */
41290 /*
41291  * Enumerated value for register field ALT_USB_HOST_HCINT12_NYET
41292  *
41293  * No NYET Response Received Interrupt
41294  */
41295 #define ALT_USB_HOST_HCINT12_NYET_E_INACT 0x0
41296 /*
41297  * Enumerated value for register field ALT_USB_HOST_HCINT12_NYET
41298  *
41299  * NYET Response Received Interrupt
41300  */
41301 #define ALT_USB_HOST_HCINT12_NYET_E_ACT 0x1
41302 
41303 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_NYET register field. */
41304 #define ALT_USB_HOST_HCINT12_NYET_LSB 6
41305 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_NYET register field. */
41306 #define ALT_USB_HOST_HCINT12_NYET_MSB 6
41307 /* The width in bits of the ALT_USB_HOST_HCINT12_NYET register field. */
41308 #define ALT_USB_HOST_HCINT12_NYET_WIDTH 1
41309 /* The mask used to set the ALT_USB_HOST_HCINT12_NYET register field value. */
41310 #define ALT_USB_HOST_HCINT12_NYET_SET_MSK 0x00000040
41311 /* The mask used to clear the ALT_USB_HOST_HCINT12_NYET register field value. */
41312 #define ALT_USB_HOST_HCINT12_NYET_CLR_MSK 0xffffffbf
41313 /* The reset value of the ALT_USB_HOST_HCINT12_NYET register field. */
41314 #define ALT_USB_HOST_HCINT12_NYET_RESET 0x0
41315 /* Extracts the ALT_USB_HOST_HCINT12_NYET field value from a register. */
41316 #define ALT_USB_HOST_HCINT12_NYET_GET(value) (((value) & 0x00000040) >> 6)
41317 /* Produces a ALT_USB_HOST_HCINT12_NYET register field value suitable for setting the register. */
41318 #define ALT_USB_HOST_HCINT12_NYET_SET(value) (((value) << 6) & 0x00000040)
41319 
41320 /*
41321  * Field : Transaction Error - xacterr
41322  *
41323  * Indicates one of the following errors occurred on the USB.-CRC check failure
41324  *
41325  * * Timeout
41326  *
41327  * * Bit stuff error
41328  *
41329  * * False EOP
41330  *
41331  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
41332  * This bit can be set only by the core and the application should write 1 to clear
41333  * it.
41334  *
41335  * Field Enumeration Values:
41336  *
41337  * Enum | Value | Description
41338  * :-------------------------------------|:------|:---------------------
41339  * ALT_USB_HOST_HCINT12_XACTERR_E_INACT | 0x0 | No Transaction Error
41340  * ALT_USB_HOST_HCINT12_XACTERR_E_ACT | 0x1 | Transaction Error
41341  *
41342  * Field Access Macros:
41343  *
41344  */
41345 /*
41346  * Enumerated value for register field ALT_USB_HOST_HCINT12_XACTERR
41347  *
41348  * No Transaction Error
41349  */
41350 #define ALT_USB_HOST_HCINT12_XACTERR_E_INACT 0x0
41351 /*
41352  * Enumerated value for register field ALT_USB_HOST_HCINT12_XACTERR
41353  *
41354  * Transaction Error
41355  */
41356 #define ALT_USB_HOST_HCINT12_XACTERR_E_ACT 0x1
41357 
41358 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_XACTERR register field. */
41359 #define ALT_USB_HOST_HCINT12_XACTERR_LSB 7
41360 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_XACTERR register field. */
41361 #define ALT_USB_HOST_HCINT12_XACTERR_MSB 7
41362 /* The width in bits of the ALT_USB_HOST_HCINT12_XACTERR register field. */
41363 #define ALT_USB_HOST_HCINT12_XACTERR_WIDTH 1
41364 /* The mask used to set the ALT_USB_HOST_HCINT12_XACTERR register field value. */
41365 #define ALT_USB_HOST_HCINT12_XACTERR_SET_MSK 0x00000080
41366 /* The mask used to clear the ALT_USB_HOST_HCINT12_XACTERR register field value. */
41367 #define ALT_USB_HOST_HCINT12_XACTERR_CLR_MSK 0xffffff7f
41368 /* The reset value of the ALT_USB_HOST_HCINT12_XACTERR register field. */
41369 #define ALT_USB_HOST_HCINT12_XACTERR_RESET 0x0
41370 /* Extracts the ALT_USB_HOST_HCINT12_XACTERR field value from a register. */
41371 #define ALT_USB_HOST_HCINT12_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
41372 /* Produces a ALT_USB_HOST_HCINT12_XACTERR register field value suitable for setting the register. */
41373 #define ALT_USB_HOST_HCINT12_XACTERR_SET(value) (((value) << 7) & 0x00000080)
41374 
41375 /*
41376  * Field : Babble Error - bblerr
41377  *
41378  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
41379  * core..This bit can be set only by the core and the application should write 1 to
41380  * clear it.
41381  *
41382  * Field Enumeration Values:
41383  *
41384  * Enum | Value | Description
41385  * :------------------------------------|:------|:----------------
41386  * ALT_USB_HOST_HCINT12_BBLERR_E_INACT | 0x0 | No Babble Error
41387  * ALT_USB_HOST_HCINT12_BBLERR_E_ACT | 0x1 | Babble Error
41388  *
41389  * Field Access Macros:
41390  *
41391  */
41392 /*
41393  * Enumerated value for register field ALT_USB_HOST_HCINT12_BBLERR
41394  *
41395  * No Babble Error
41396  */
41397 #define ALT_USB_HOST_HCINT12_BBLERR_E_INACT 0x0
41398 /*
41399  * Enumerated value for register field ALT_USB_HOST_HCINT12_BBLERR
41400  *
41401  * Babble Error
41402  */
41403 #define ALT_USB_HOST_HCINT12_BBLERR_E_ACT 0x1
41404 
41405 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_BBLERR register field. */
41406 #define ALT_USB_HOST_HCINT12_BBLERR_LSB 8
41407 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_BBLERR register field. */
41408 #define ALT_USB_HOST_HCINT12_BBLERR_MSB 8
41409 /* The width in bits of the ALT_USB_HOST_HCINT12_BBLERR register field. */
41410 #define ALT_USB_HOST_HCINT12_BBLERR_WIDTH 1
41411 /* The mask used to set the ALT_USB_HOST_HCINT12_BBLERR register field value. */
41412 #define ALT_USB_HOST_HCINT12_BBLERR_SET_MSK 0x00000100
41413 /* The mask used to clear the ALT_USB_HOST_HCINT12_BBLERR register field value. */
41414 #define ALT_USB_HOST_HCINT12_BBLERR_CLR_MSK 0xfffffeff
41415 /* The reset value of the ALT_USB_HOST_HCINT12_BBLERR register field. */
41416 #define ALT_USB_HOST_HCINT12_BBLERR_RESET 0x0
41417 /* Extracts the ALT_USB_HOST_HCINT12_BBLERR field value from a register. */
41418 #define ALT_USB_HOST_HCINT12_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
41419 /* Produces a ALT_USB_HOST_HCINT12_BBLERR register field value suitable for setting the register. */
41420 #define ALT_USB_HOST_HCINT12_BBLERR_SET(value) (((value) << 8) & 0x00000100)
41421 
41422 /*
41423  * Field : Frame Overrun - frmovrun
41424  *
41425  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
41426  * This bit can be set only by the core and the application should write 1 to clear
41427  * it.
41428  *
41429  * Field Enumeration Values:
41430  *
41431  * Enum | Value | Description
41432  * :--------------------------------------|:------|:-----------------
41433  * ALT_USB_HOST_HCINT12_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
41434  * ALT_USB_HOST_HCINT12_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
41435  *
41436  * Field Access Macros:
41437  *
41438  */
41439 /*
41440  * Enumerated value for register field ALT_USB_HOST_HCINT12_FRMOVRUN
41441  *
41442  * No Frame Overrun
41443  */
41444 #define ALT_USB_HOST_HCINT12_FRMOVRUN_E_INACT 0x0
41445 /*
41446  * Enumerated value for register field ALT_USB_HOST_HCINT12_FRMOVRUN
41447  *
41448  * Frame Overrun
41449  */
41450 #define ALT_USB_HOST_HCINT12_FRMOVRUN_E_ACT 0x1
41451 
41452 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_FRMOVRUN register field. */
41453 #define ALT_USB_HOST_HCINT12_FRMOVRUN_LSB 9
41454 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_FRMOVRUN register field. */
41455 #define ALT_USB_HOST_HCINT12_FRMOVRUN_MSB 9
41456 /* The width in bits of the ALT_USB_HOST_HCINT12_FRMOVRUN register field. */
41457 #define ALT_USB_HOST_HCINT12_FRMOVRUN_WIDTH 1
41458 /* The mask used to set the ALT_USB_HOST_HCINT12_FRMOVRUN register field value. */
41459 #define ALT_USB_HOST_HCINT12_FRMOVRUN_SET_MSK 0x00000200
41460 /* The mask used to clear the ALT_USB_HOST_HCINT12_FRMOVRUN register field value. */
41461 #define ALT_USB_HOST_HCINT12_FRMOVRUN_CLR_MSK 0xfffffdff
41462 /* The reset value of the ALT_USB_HOST_HCINT12_FRMOVRUN register field. */
41463 #define ALT_USB_HOST_HCINT12_FRMOVRUN_RESET 0x0
41464 /* Extracts the ALT_USB_HOST_HCINT12_FRMOVRUN field value from a register. */
41465 #define ALT_USB_HOST_HCINT12_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
41466 /* Produces a ALT_USB_HOST_HCINT12_FRMOVRUN register field value suitable for setting the register. */
41467 #define ALT_USB_HOST_HCINT12_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
41468 
41469 /*
41470  * Field : Data Toggle Error - datatglerr
41471  *
41472  * This bit can be set only by the core and the application should write 1 to clear
41473  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
41474  * core.
41475  *
41476  * Field Enumeration Values:
41477  *
41478  * Enum | Value | Description
41479  * :----------------------------------------|:------|:---------------------
41480  * ALT_USB_HOST_HCINT12_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
41481  * ALT_USB_HOST_HCINT12_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
41482  *
41483  * Field Access Macros:
41484  *
41485  */
41486 /*
41487  * Enumerated value for register field ALT_USB_HOST_HCINT12_DATATGLERR
41488  *
41489  * No Data Toggle Error
41490  */
41491 #define ALT_USB_HOST_HCINT12_DATATGLERR_E_INACT 0x0
41492 /*
41493  * Enumerated value for register field ALT_USB_HOST_HCINT12_DATATGLERR
41494  *
41495  * Data Toggle Error
41496  */
41497 #define ALT_USB_HOST_HCINT12_DATATGLERR_E_ACT 0x1
41498 
41499 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_DATATGLERR register field. */
41500 #define ALT_USB_HOST_HCINT12_DATATGLERR_LSB 10
41501 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_DATATGLERR register field. */
41502 #define ALT_USB_HOST_HCINT12_DATATGLERR_MSB 10
41503 /* The width in bits of the ALT_USB_HOST_HCINT12_DATATGLERR register field. */
41504 #define ALT_USB_HOST_HCINT12_DATATGLERR_WIDTH 1
41505 /* The mask used to set the ALT_USB_HOST_HCINT12_DATATGLERR register field value. */
41506 #define ALT_USB_HOST_HCINT12_DATATGLERR_SET_MSK 0x00000400
41507 /* The mask used to clear the ALT_USB_HOST_HCINT12_DATATGLERR register field value. */
41508 #define ALT_USB_HOST_HCINT12_DATATGLERR_CLR_MSK 0xfffffbff
41509 /* The reset value of the ALT_USB_HOST_HCINT12_DATATGLERR register field. */
41510 #define ALT_USB_HOST_HCINT12_DATATGLERR_RESET 0x0
41511 /* Extracts the ALT_USB_HOST_HCINT12_DATATGLERR field value from a register. */
41512 #define ALT_USB_HOST_HCINT12_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
41513 /* Produces a ALT_USB_HOST_HCINT12_DATATGLERR register field value suitable for setting the register. */
41514 #define ALT_USB_HOST_HCINT12_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
41515 
41516 /*
41517  * Field : BNA Interrupt - bnaintr
41518  *
41519  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
41520  * generates this interrupt when the descriptor accessed is not ready for the Core
41521  * to process. BNA will not be generated for Isochronous channels. for non
41522  * Scatter/Gather DMA mode, this bit is reserved.
41523  *
41524  * Field Enumeration Values:
41525  *
41526  * Enum | Value | Description
41527  * :-------------------------------------|:------|:-----------------
41528  * ALT_USB_HOST_HCINT12_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
41529  * ALT_USB_HOST_HCINT12_BNAINTR_E_ACT | 0x1 | BNA Interrupt
41530  *
41531  * Field Access Macros:
41532  *
41533  */
41534 /*
41535  * Enumerated value for register field ALT_USB_HOST_HCINT12_BNAINTR
41536  *
41537  * No BNA Interrupt
41538  */
41539 #define ALT_USB_HOST_HCINT12_BNAINTR_E_INACT 0x0
41540 /*
41541  * Enumerated value for register field ALT_USB_HOST_HCINT12_BNAINTR
41542  *
41543  * BNA Interrupt
41544  */
41545 #define ALT_USB_HOST_HCINT12_BNAINTR_E_ACT 0x1
41546 
41547 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_BNAINTR register field. */
41548 #define ALT_USB_HOST_HCINT12_BNAINTR_LSB 11
41549 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_BNAINTR register field. */
41550 #define ALT_USB_HOST_HCINT12_BNAINTR_MSB 11
41551 /* The width in bits of the ALT_USB_HOST_HCINT12_BNAINTR register field. */
41552 #define ALT_USB_HOST_HCINT12_BNAINTR_WIDTH 1
41553 /* The mask used to set the ALT_USB_HOST_HCINT12_BNAINTR register field value. */
41554 #define ALT_USB_HOST_HCINT12_BNAINTR_SET_MSK 0x00000800
41555 /* The mask used to clear the ALT_USB_HOST_HCINT12_BNAINTR register field value. */
41556 #define ALT_USB_HOST_HCINT12_BNAINTR_CLR_MSK 0xfffff7ff
41557 /* The reset value of the ALT_USB_HOST_HCINT12_BNAINTR register field. */
41558 #define ALT_USB_HOST_HCINT12_BNAINTR_RESET 0x0
41559 /* Extracts the ALT_USB_HOST_HCINT12_BNAINTR field value from a register. */
41560 #define ALT_USB_HOST_HCINT12_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
41561 /* Produces a ALT_USB_HOST_HCINT12_BNAINTR register field value suitable for setting the register. */
41562 #define ALT_USB_HOST_HCINT12_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
41563 
41564 /*
41565  * Field : Excessive Transaction Error - xcs_xact_err
41566  *
41567  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
41568  * this bit when 3 consecutive transaction errors occurred on the USB bus.
41569  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
41570  * Scatter/Gather DMA mode, this bit is reserved.
41571  *
41572  * Field Enumeration Values:
41573  *
41574  * Enum | Value | Description
41575  * :--------------------------------------------|:------|:-------------------------------
41576  * ALT_USB_HOST_HCINT12_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
41577  * ALT_USB_HOST_HCINT12_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
41578  *
41579  * Field Access Macros:
41580  *
41581  */
41582 /*
41583  * Enumerated value for register field ALT_USB_HOST_HCINT12_XCS_XACT_ERR
41584  *
41585  * No Excessive Transaction Error
41586  */
41587 #define ALT_USB_HOST_HCINT12_XCS_XACT_ERR_E_INACT 0x0
41588 /*
41589  * Enumerated value for register field ALT_USB_HOST_HCINT12_XCS_XACT_ERR
41590  *
41591  * Excessive Transaction Error
41592  */
41593 #define ALT_USB_HOST_HCINT12_XCS_XACT_ERR_E_ACVTIVE 0x1
41594 
41595 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_XCS_XACT_ERR register field. */
41596 #define ALT_USB_HOST_HCINT12_XCS_XACT_ERR_LSB 12
41597 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_XCS_XACT_ERR register field. */
41598 #define ALT_USB_HOST_HCINT12_XCS_XACT_ERR_MSB 12
41599 /* The width in bits of the ALT_USB_HOST_HCINT12_XCS_XACT_ERR register field. */
41600 #define ALT_USB_HOST_HCINT12_XCS_XACT_ERR_WIDTH 1
41601 /* The mask used to set the ALT_USB_HOST_HCINT12_XCS_XACT_ERR register field value. */
41602 #define ALT_USB_HOST_HCINT12_XCS_XACT_ERR_SET_MSK 0x00001000
41603 /* The mask used to clear the ALT_USB_HOST_HCINT12_XCS_XACT_ERR register field value. */
41604 #define ALT_USB_HOST_HCINT12_XCS_XACT_ERR_CLR_MSK 0xffffefff
41605 /* The reset value of the ALT_USB_HOST_HCINT12_XCS_XACT_ERR register field. */
41606 #define ALT_USB_HOST_HCINT12_XCS_XACT_ERR_RESET 0x0
41607 /* Extracts the ALT_USB_HOST_HCINT12_XCS_XACT_ERR field value from a register. */
41608 #define ALT_USB_HOST_HCINT12_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
41609 /* Produces a ALT_USB_HOST_HCINT12_XCS_XACT_ERR register field value suitable for setting the register. */
41610 #define ALT_USB_HOST_HCINT12_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
41611 
41612 /*
41613  * Field : Descriptor rollover interrupt - desc_lst_rollintr
41614  *
41615  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
41616  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
41617  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
41618  * mode, this bit is reserved.
41619  *
41620  * Field Enumeration Values:
41621  *
41622  * Enum | Value | Description
41623  * :-----------------------------------------------|:------|:---------------------------------
41624  * ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
41625  * ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
41626  *
41627  * Field Access Macros:
41628  *
41629  */
41630 /*
41631  * Enumerated value for register field ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR
41632  *
41633  * No Descriptor rollover interrupt
41634  */
41635 #define ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR_E_INACT 0x0
41636 /*
41637  * Enumerated value for register field ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR
41638  *
41639  * Descriptor rollover interrupt
41640  */
41641 #define ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR_E_ACT 0x1
41642 
41643 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR register field. */
41644 #define ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR_LSB 13
41645 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR register field. */
41646 #define ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR_MSB 13
41647 /* The width in bits of the ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR register field. */
41648 #define ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR_WIDTH 1
41649 /* The mask used to set the ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR register field value. */
41650 #define ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR_SET_MSK 0x00002000
41651 /* The mask used to clear the ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR register field value. */
41652 #define ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
41653 /* The reset value of the ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR register field. */
41654 #define ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR_RESET 0x0
41655 /* Extracts the ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR field value from a register. */
41656 #define ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
41657 /* Produces a ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR register field value suitable for setting the register. */
41658 #define ALT_USB_HOST_HCINT12_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
41659 
41660 #ifndef __ASSEMBLY__
41661 /*
41662  * WARNING: The C register and register group struct declarations are provided for
41663  * convenience and illustrative purposes. They should, however, be used with
41664  * caution as the C language standard provides no guarantees about the alignment or
41665  * atomicity of device memory accesses. The recommended practice for writing
41666  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
41667  * alt_write_word() functions.
41668  *
41669  * The struct declaration for register ALT_USB_HOST_HCINT12.
41670  */
41671 struct ALT_USB_HOST_HCINT12_s
41672 {
41673  const uint32_t xfercompl : 1; /* Transfer Completed */
41674  const uint32_t chhltd : 1; /* Channel Halted */
41675  const uint32_t ahberr : 1; /* AHB Error */
41676  const uint32_t stall : 1; /* STALL Response Received Interrupt */
41677  const uint32_t nak : 1; /* NAK Response Received Interrupt */
41678  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
41679  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
41680  const uint32_t xacterr : 1; /* Transaction Error */
41681  const uint32_t bblerr : 1; /* Babble Error */
41682  const uint32_t frmovrun : 1; /* Frame Overrun */
41683  const uint32_t datatglerr : 1; /* Data Toggle Error */
41684  const uint32_t bnaintr : 1; /* BNA Interrupt */
41685  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
41686  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
41687  uint32_t : 18; /* *UNDEFINED* */
41688 };
41689 
41690 /* The typedef declaration for register ALT_USB_HOST_HCINT12. */
41691 typedef volatile struct ALT_USB_HOST_HCINT12_s ALT_USB_HOST_HCINT12_t;
41692 #endif /* __ASSEMBLY__ */
41693 
41694 /* The byte offset of the ALT_USB_HOST_HCINT12 register from the beginning of the component. */
41695 #define ALT_USB_HOST_HCINT12_OFST 0x288
41696 /* The address of the ALT_USB_HOST_HCINT12 register. */
41697 #define ALT_USB_HOST_HCINT12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT12_OFST))
41698 
41699 /*
41700  * Register : Host Channel 12 Interrupt Mask Register - hcintmsk12
41701  *
41702  * This register reflects the mask for each channel status described in the
41703  * previous section.
41704  *
41705  * Register Layout
41706  *
41707  * Bits | Access | Reset | Description
41708  * :--------|:-------|:------|:----------------------------------
41709  * [0] | RW | 0x0 | Transfer Completed Mask
41710  * [1] | RW | 0x0 | Channel Halted Mask
41711  * [2] | RW | 0x0 | AHB Error Mask
41712  * [10:3] | ??? | 0x0 | *UNDEFINED*
41713  * [11] | RW | 0x0 | BNA Interrupt mask
41714  * [12] | ??? | 0x0 | *UNDEFINED*
41715  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
41716  * [31:14] | ??? | 0x0 | *UNDEFINED*
41717  *
41718  */
41719 /*
41720  * Field : Transfer Completed Mask - xfercomplmsk
41721  *
41722  * Transfer complete.
41723  *
41724  * Field Enumeration Values:
41725  *
41726  * Enum | Value | Description
41727  * :---------------------------------------------|:------|:------------
41728  * ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK_E_MSK | 0x0 | Mask
41729  * ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
41730  *
41731  * Field Access Macros:
41732  *
41733  */
41734 /*
41735  * Enumerated value for register field ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK
41736  *
41737  * Mask
41738  */
41739 #define ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK_E_MSK 0x0
41740 /*
41741  * Enumerated value for register field ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK
41742  *
41743  * No mask
41744  */
41745 #define ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK_E_NOMSK 0x1
41746 
41747 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK register field. */
41748 #define ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK_LSB 0
41749 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK register field. */
41750 #define ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK_MSB 0
41751 /* The width in bits of the ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK register field. */
41752 #define ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK_WIDTH 1
41753 /* The mask used to set the ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK register field value. */
41754 #define ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK_SET_MSK 0x00000001
41755 /* The mask used to clear the ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK register field value. */
41756 #define ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK_CLR_MSK 0xfffffffe
41757 /* The reset value of the ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK register field. */
41758 #define ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK_RESET 0x0
41759 /* Extracts the ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK field value from a register. */
41760 #define ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
41761 /* Produces a ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK register field value suitable for setting the register. */
41762 #define ALT_USB_HOST_HCINTMSK12_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
41763 
41764 /*
41765  * Field : Channel Halted Mask - chhltdmsk
41766  *
41767  * Channel Halted.
41768  *
41769  * Field Enumeration Values:
41770  *
41771  * Enum | Value | Description
41772  * :------------------------------------------|:------|:------------
41773  * ALT_USB_HOST_HCINTMSK12_CHHLTDMSK_E_MSK | 0x0 | Mask
41774  * ALT_USB_HOST_HCINTMSK12_CHHLTDMSK_E_NOMSK | 0x1 | No mask
41775  *
41776  * Field Access Macros:
41777  *
41778  */
41779 /*
41780  * Enumerated value for register field ALT_USB_HOST_HCINTMSK12_CHHLTDMSK
41781  *
41782  * Mask
41783  */
41784 #define ALT_USB_HOST_HCINTMSK12_CHHLTDMSK_E_MSK 0x0
41785 /*
41786  * Enumerated value for register field ALT_USB_HOST_HCINTMSK12_CHHLTDMSK
41787  *
41788  * No mask
41789  */
41790 #define ALT_USB_HOST_HCINTMSK12_CHHLTDMSK_E_NOMSK 0x1
41791 
41792 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK12_CHHLTDMSK register field. */
41793 #define ALT_USB_HOST_HCINTMSK12_CHHLTDMSK_LSB 1
41794 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK12_CHHLTDMSK register field. */
41795 #define ALT_USB_HOST_HCINTMSK12_CHHLTDMSK_MSB 1
41796 /* The width in bits of the ALT_USB_HOST_HCINTMSK12_CHHLTDMSK register field. */
41797 #define ALT_USB_HOST_HCINTMSK12_CHHLTDMSK_WIDTH 1
41798 /* The mask used to set the ALT_USB_HOST_HCINTMSK12_CHHLTDMSK register field value. */
41799 #define ALT_USB_HOST_HCINTMSK12_CHHLTDMSK_SET_MSK 0x00000002
41800 /* The mask used to clear the ALT_USB_HOST_HCINTMSK12_CHHLTDMSK register field value. */
41801 #define ALT_USB_HOST_HCINTMSK12_CHHLTDMSK_CLR_MSK 0xfffffffd
41802 /* The reset value of the ALT_USB_HOST_HCINTMSK12_CHHLTDMSK register field. */
41803 #define ALT_USB_HOST_HCINTMSK12_CHHLTDMSK_RESET 0x0
41804 /* Extracts the ALT_USB_HOST_HCINTMSK12_CHHLTDMSK field value from a register. */
41805 #define ALT_USB_HOST_HCINTMSK12_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
41806 /* Produces a ALT_USB_HOST_HCINTMSK12_CHHLTDMSK register field value suitable for setting the register. */
41807 #define ALT_USB_HOST_HCINTMSK12_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
41808 
41809 /*
41810  * Field : AHB Error Mask - ahberrmsk
41811  *
41812  * In scatter/gather DMA mode for host, interrupts will not be generated due to
41813  * the corresponding bits set in HCINTn.
41814  *
41815  * Field Enumeration Values:
41816  *
41817  * Enum | Value | Description
41818  * :------------------------------------------|:------|:------------
41819  * ALT_USB_HOST_HCINTMSK12_AHBERRMSK_E_MSK | 0x0 | Mask
41820  * ALT_USB_HOST_HCINTMSK12_AHBERRMSK_E_NOMSK | 0x1 | No mask
41821  *
41822  * Field Access Macros:
41823  *
41824  */
41825 /*
41826  * Enumerated value for register field ALT_USB_HOST_HCINTMSK12_AHBERRMSK
41827  *
41828  * Mask
41829  */
41830 #define ALT_USB_HOST_HCINTMSK12_AHBERRMSK_E_MSK 0x0
41831 /*
41832  * Enumerated value for register field ALT_USB_HOST_HCINTMSK12_AHBERRMSK
41833  *
41834  * No mask
41835  */
41836 #define ALT_USB_HOST_HCINTMSK12_AHBERRMSK_E_NOMSK 0x1
41837 
41838 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK12_AHBERRMSK register field. */
41839 #define ALT_USB_HOST_HCINTMSK12_AHBERRMSK_LSB 2
41840 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK12_AHBERRMSK register field. */
41841 #define ALT_USB_HOST_HCINTMSK12_AHBERRMSK_MSB 2
41842 /* The width in bits of the ALT_USB_HOST_HCINTMSK12_AHBERRMSK register field. */
41843 #define ALT_USB_HOST_HCINTMSK12_AHBERRMSK_WIDTH 1
41844 /* The mask used to set the ALT_USB_HOST_HCINTMSK12_AHBERRMSK register field value. */
41845 #define ALT_USB_HOST_HCINTMSK12_AHBERRMSK_SET_MSK 0x00000004
41846 /* The mask used to clear the ALT_USB_HOST_HCINTMSK12_AHBERRMSK register field value. */
41847 #define ALT_USB_HOST_HCINTMSK12_AHBERRMSK_CLR_MSK 0xfffffffb
41848 /* The reset value of the ALT_USB_HOST_HCINTMSK12_AHBERRMSK register field. */
41849 #define ALT_USB_HOST_HCINTMSK12_AHBERRMSK_RESET 0x0
41850 /* Extracts the ALT_USB_HOST_HCINTMSK12_AHBERRMSK field value from a register. */
41851 #define ALT_USB_HOST_HCINTMSK12_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
41852 /* Produces a ALT_USB_HOST_HCINTMSK12_AHBERRMSK register field value suitable for setting the register. */
41853 #define ALT_USB_HOST_HCINTMSK12_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
41854 
41855 /*
41856  * Field : BNA Interrupt mask - bnaintrmsk
41857  *
41858  * This bit is valid only when Scatter/Gather DMA mode is enabled.
41859  *
41860  * Field Enumeration Values:
41861  *
41862  * Enum | Value | Description
41863  * :-------------------------------------------|:------|:------------
41864  * ALT_USB_HOST_HCINTMSK12_BNAINTRMSK_E_MSK | 0x0 | Mask
41865  * ALT_USB_HOST_HCINTMSK12_BNAINTRMSK_E_NOMSK | 0x1 | No mask
41866  *
41867  * Field Access Macros:
41868  *
41869  */
41870 /*
41871  * Enumerated value for register field ALT_USB_HOST_HCINTMSK12_BNAINTRMSK
41872  *
41873  * Mask
41874  */
41875 #define ALT_USB_HOST_HCINTMSK12_BNAINTRMSK_E_MSK 0x0
41876 /*
41877  * Enumerated value for register field ALT_USB_HOST_HCINTMSK12_BNAINTRMSK
41878  *
41879  * No mask
41880  */
41881 #define ALT_USB_HOST_HCINTMSK12_BNAINTRMSK_E_NOMSK 0x1
41882 
41883 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK12_BNAINTRMSK register field. */
41884 #define ALT_USB_HOST_HCINTMSK12_BNAINTRMSK_LSB 11
41885 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK12_BNAINTRMSK register field. */
41886 #define ALT_USB_HOST_HCINTMSK12_BNAINTRMSK_MSB 11
41887 /* The width in bits of the ALT_USB_HOST_HCINTMSK12_BNAINTRMSK register field. */
41888 #define ALT_USB_HOST_HCINTMSK12_BNAINTRMSK_WIDTH 1
41889 /* The mask used to set the ALT_USB_HOST_HCINTMSK12_BNAINTRMSK register field value. */
41890 #define ALT_USB_HOST_HCINTMSK12_BNAINTRMSK_SET_MSK 0x00000800
41891 /* The mask used to clear the ALT_USB_HOST_HCINTMSK12_BNAINTRMSK register field value. */
41892 #define ALT_USB_HOST_HCINTMSK12_BNAINTRMSK_CLR_MSK 0xfffff7ff
41893 /* The reset value of the ALT_USB_HOST_HCINTMSK12_BNAINTRMSK register field. */
41894 #define ALT_USB_HOST_HCINTMSK12_BNAINTRMSK_RESET 0x0
41895 /* Extracts the ALT_USB_HOST_HCINTMSK12_BNAINTRMSK field value from a register. */
41896 #define ALT_USB_HOST_HCINTMSK12_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
41897 /* Produces a ALT_USB_HOST_HCINTMSK12_BNAINTRMSK register field value suitable for setting the register. */
41898 #define ALT_USB_HOST_HCINTMSK12_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
41899 
41900 /*
41901  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
41902  *
41903  * This bit is valid only when Scatter/Gather DMA mode is enabled.
41904  *
41905  * Field Enumeration Values:
41906  *
41907  * Enum | Value | Description
41908  * :----------------------------------------------------|:------|:------------
41909  * ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
41910  * ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
41911  *
41912  * Field Access Macros:
41913  *
41914  */
41915 /*
41916  * Enumerated value for register field ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK
41917  *
41918  * Mask
41919  */
41920 #define ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK_E_MSK 0x0
41921 /*
41922  * Enumerated value for register field ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK
41923  *
41924  * No mask
41925  */
41926 #define ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
41927 
41928 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK register field. */
41929 #define ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK_LSB 13
41930 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK register field. */
41931 #define ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK_MSB 13
41932 /* The width in bits of the ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK register field. */
41933 #define ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK_WIDTH 1
41934 /* The mask used to set the ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK register field value. */
41935 #define ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
41936 /* The mask used to clear the ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK register field value. */
41937 #define ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
41938 /* The reset value of the ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK register field. */
41939 #define ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK_RESET 0x0
41940 /* Extracts the ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK field value from a register. */
41941 #define ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
41942 /* Produces a ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
41943 #define ALT_USB_HOST_HCINTMSK12_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
41944 
41945 #ifndef __ASSEMBLY__
41946 /*
41947  * WARNING: The C register and register group struct declarations are provided for
41948  * convenience and illustrative purposes. They should, however, be used with
41949  * caution as the C language standard provides no guarantees about the alignment or
41950  * atomicity of device memory accesses. The recommended practice for writing
41951  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
41952  * alt_write_word() functions.
41953  *
41954  * The struct declaration for register ALT_USB_HOST_HCINTMSK12.
41955  */
41956 struct ALT_USB_HOST_HCINTMSK12_s
41957 {
41958  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
41959  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
41960  uint32_t ahberrmsk : 1; /* AHB Error Mask */
41961  uint32_t : 8; /* *UNDEFINED* */
41962  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
41963  uint32_t : 1; /* *UNDEFINED* */
41964  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
41965  uint32_t : 18; /* *UNDEFINED* */
41966 };
41967 
41968 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK12. */
41969 typedef volatile struct ALT_USB_HOST_HCINTMSK12_s ALT_USB_HOST_HCINTMSK12_t;
41970 #endif /* __ASSEMBLY__ */
41971 
41972 /* The byte offset of the ALT_USB_HOST_HCINTMSK12 register from the beginning of the component. */
41973 #define ALT_USB_HOST_HCINTMSK12_OFST 0x28c
41974 /* The address of the ALT_USB_HOST_HCINTMSK12 register. */
41975 #define ALT_USB_HOST_HCINTMSK12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK12_OFST))
41976 
41977 /*
41978  * Register : Host Channel 12 Transfer Size Register - hctsiz12
41979  *
41980  * Buffer DMA Mode
41981  *
41982  * Register Layout
41983  *
41984  * Bits | Access | Reset | Description
41985  * :--------|:-------|:------|:--------------
41986  * [18:0] | RW | 0x0 | Transfer Size
41987  * [28:19] | RW | 0x0 | Packet Count
41988  * [30:29] | RW | 0x0 | PID
41989  * [31] | RW | 0x0 | Do Ping
41990  *
41991  */
41992 /*
41993  * Field : Transfer Size - xfersize
41994  *
41995  * for an OUT, this field is the number of data bytes the host sends during the
41996  * transfer. for an IN, this field is the buffer size that the application has
41997  * Reserved for the transfer. The application is expected to program this field as
41998  * an integer multiple of the maximum packet size for IN transactions (periodic and
41999  * non-periodic).The width of this counter is specified as 19 bits.
42000  *
42001  * Field Access Macros:
42002  *
42003  */
42004 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ12_XFERSIZE register field. */
42005 #define ALT_USB_HOST_HCTSIZ12_XFERSIZE_LSB 0
42006 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ12_XFERSIZE register field. */
42007 #define ALT_USB_HOST_HCTSIZ12_XFERSIZE_MSB 18
42008 /* The width in bits of the ALT_USB_HOST_HCTSIZ12_XFERSIZE register field. */
42009 #define ALT_USB_HOST_HCTSIZ12_XFERSIZE_WIDTH 19
42010 /* The mask used to set the ALT_USB_HOST_HCTSIZ12_XFERSIZE register field value. */
42011 #define ALT_USB_HOST_HCTSIZ12_XFERSIZE_SET_MSK 0x0007ffff
42012 /* The mask used to clear the ALT_USB_HOST_HCTSIZ12_XFERSIZE register field value. */
42013 #define ALT_USB_HOST_HCTSIZ12_XFERSIZE_CLR_MSK 0xfff80000
42014 /* The reset value of the ALT_USB_HOST_HCTSIZ12_XFERSIZE register field. */
42015 #define ALT_USB_HOST_HCTSIZ12_XFERSIZE_RESET 0x0
42016 /* Extracts the ALT_USB_HOST_HCTSIZ12_XFERSIZE field value from a register. */
42017 #define ALT_USB_HOST_HCTSIZ12_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
42018 /* Produces a ALT_USB_HOST_HCTSIZ12_XFERSIZE register field value suitable for setting the register. */
42019 #define ALT_USB_HOST_HCTSIZ12_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
42020 
42021 /*
42022  * Field : Packet Count - pktcnt
42023  *
42024  * This field is programmed by the application with the expected number of packets
42025  * to be transmitted (OUT) or received (IN). The host decrements this count on
42026  * every successful transmission or reception of an OUT/IN packet. Once this count
42027  * reaches zero, the application is interrupted to indicate normal completion. The
42028  * width of this counter is specified as 10 bits.
42029  *
42030  * Field Access Macros:
42031  *
42032  */
42033 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ12_PKTCNT register field. */
42034 #define ALT_USB_HOST_HCTSIZ12_PKTCNT_LSB 19
42035 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ12_PKTCNT register field. */
42036 #define ALT_USB_HOST_HCTSIZ12_PKTCNT_MSB 28
42037 /* The width in bits of the ALT_USB_HOST_HCTSIZ12_PKTCNT register field. */
42038 #define ALT_USB_HOST_HCTSIZ12_PKTCNT_WIDTH 10
42039 /* The mask used to set the ALT_USB_HOST_HCTSIZ12_PKTCNT register field value. */
42040 #define ALT_USB_HOST_HCTSIZ12_PKTCNT_SET_MSK 0x1ff80000
42041 /* The mask used to clear the ALT_USB_HOST_HCTSIZ12_PKTCNT register field value. */
42042 #define ALT_USB_HOST_HCTSIZ12_PKTCNT_CLR_MSK 0xe007ffff
42043 /* The reset value of the ALT_USB_HOST_HCTSIZ12_PKTCNT register field. */
42044 #define ALT_USB_HOST_HCTSIZ12_PKTCNT_RESET 0x0
42045 /* Extracts the ALT_USB_HOST_HCTSIZ12_PKTCNT field value from a register. */
42046 #define ALT_USB_HOST_HCTSIZ12_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
42047 /* Produces a ALT_USB_HOST_HCTSIZ12_PKTCNT register field value suitable for setting the register. */
42048 #define ALT_USB_HOST_HCTSIZ12_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
42049 
42050 /*
42051  * Field : PID - pid
42052  *
42053  * The application programs this field with the type of PID to use forthe initial
42054  * transaction. The host maintains this field for the rest of the transfer.
42055  *
42056  * Field Enumeration Values:
42057  *
42058  * Enum | Value | Description
42059  * :----------------------------------|:------|:------------------------------------
42060  * ALT_USB_HOST_HCTSIZ12_PID_E_DATA0 | 0x0 | DATA0
42061  * ALT_USB_HOST_HCTSIZ12_PID_E_DATA2 | 0x1 | DATA2
42062  * ALT_USB_HOST_HCTSIZ12_PID_E_DATA1 | 0x2 | DATA1
42063  * ALT_USB_HOST_HCTSIZ12_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
42064  *
42065  * Field Access Macros:
42066  *
42067  */
42068 /*
42069  * Enumerated value for register field ALT_USB_HOST_HCTSIZ12_PID
42070  *
42071  * DATA0
42072  */
42073 #define ALT_USB_HOST_HCTSIZ12_PID_E_DATA0 0x0
42074 /*
42075  * Enumerated value for register field ALT_USB_HOST_HCTSIZ12_PID
42076  *
42077  * DATA2
42078  */
42079 #define ALT_USB_HOST_HCTSIZ12_PID_E_DATA2 0x1
42080 /*
42081  * Enumerated value for register field ALT_USB_HOST_HCTSIZ12_PID
42082  *
42083  * DATA1
42084  */
42085 #define ALT_USB_HOST_HCTSIZ12_PID_E_DATA1 0x2
42086 /*
42087  * Enumerated value for register field ALT_USB_HOST_HCTSIZ12_PID
42088  *
42089  * MDATA (non-control)/SETUP (control)
42090  */
42091 #define ALT_USB_HOST_HCTSIZ12_PID_E_MDATA 0x3
42092 
42093 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ12_PID register field. */
42094 #define ALT_USB_HOST_HCTSIZ12_PID_LSB 29
42095 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ12_PID register field. */
42096 #define ALT_USB_HOST_HCTSIZ12_PID_MSB 30
42097 /* The width in bits of the ALT_USB_HOST_HCTSIZ12_PID register field. */
42098 #define ALT_USB_HOST_HCTSIZ12_PID_WIDTH 2
42099 /* The mask used to set the ALT_USB_HOST_HCTSIZ12_PID register field value. */
42100 #define ALT_USB_HOST_HCTSIZ12_PID_SET_MSK 0x60000000
42101 /* The mask used to clear the ALT_USB_HOST_HCTSIZ12_PID register field value. */
42102 #define ALT_USB_HOST_HCTSIZ12_PID_CLR_MSK 0x9fffffff
42103 /* The reset value of the ALT_USB_HOST_HCTSIZ12_PID register field. */
42104 #define ALT_USB_HOST_HCTSIZ12_PID_RESET 0x0
42105 /* Extracts the ALT_USB_HOST_HCTSIZ12_PID field value from a register. */
42106 #define ALT_USB_HOST_HCTSIZ12_PID_GET(value) (((value) & 0x60000000) >> 29)
42107 /* Produces a ALT_USB_HOST_HCTSIZ12_PID register field value suitable for setting the register. */
42108 #define ALT_USB_HOST_HCTSIZ12_PID_SET(value) (((value) << 29) & 0x60000000)
42109 
42110 /*
42111  * Field : Do Ping - dopng
42112  *
42113  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
42114  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
42115  * for IN transfers it disables the channel.
42116  *
42117  * Field Enumeration Values:
42118  *
42119  * Enum | Value | Description
42120  * :-------------------------------------|:------|:-----------------
42121  * ALT_USB_HOST_HCTSIZ12_DOPNG_E_NOPING | 0x0 | No ping protocol
42122  * ALT_USB_HOST_HCTSIZ12_DOPNG_E_PING | 0x1 | Ping protocol
42123  *
42124  * Field Access Macros:
42125  *
42126  */
42127 /*
42128  * Enumerated value for register field ALT_USB_HOST_HCTSIZ12_DOPNG
42129  *
42130  * No ping protocol
42131  */
42132 #define ALT_USB_HOST_HCTSIZ12_DOPNG_E_NOPING 0x0
42133 /*
42134  * Enumerated value for register field ALT_USB_HOST_HCTSIZ12_DOPNG
42135  *
42136  * Ping protocol
42137  */
42138 #define ALT_USB_HOST_HCTSIZ12_DOPNG_E_PING 0x1
42139 
42140 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ12_DOPNG register field. */
42141 #define ALT_USB_HOST_HCTSIZ12_DOPNG_LSB 31
42142 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ12_DOPNG register field. */
42143 #define ALT_USB_HOST_HCTSIZ12_DOPNG_MSB 31
42144 /* The width in bits of the ALT_USB_HOST_HCTSIZ12_DOPNG register field. */
42145 #define ALT_USB_HOST_HCTSIZ12_DOPNG_WIDTH 1
42146 /* The mask used to set the ALT_USB_HOST_HCTSIZ12_DOPNG register field value. */
42147 #define ALT_USB_HOST_HCTSIZ12_DOPNG_SET_MSK 0x80000000
42148 /* The mask used to clear the ALT_USB_HOST_HCTSIZ12_DOPNG register field value. */
42149 #define ALT_USB_HOST_HCTSIZ12_DOPNG_CLR_MSK 0x7fffffff
42150 /* The reset value of the ALT_USB_HOST_HCTSIZ12_DOPNG register field. */
42151 #define ALT_USB_HOST_HCTSIZ12_DOPNG_RESET 0x0
42152 /* Extracts the ALT_USB_HOST_HCTSIZ12_DOPNG field value from a register. */
42153 #define ALT_USB_HOST_HCTSIZ12_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
42154 /* Produces a ALT_USB_HOST_HCTSIZ12_DOPNG register field value suitable for setting the register. */
42155 #define ALT_USB_HOST_HCTSIZ12_DOPNG_SET(value) (((value) << 31) & 0x80000000)
42156 
42157 #ifndef __ASSEMBLY__
42158 /*
42159  * WARNING: The C register and register group struct declarations are provided for
42160  * convenience and illustrative purposes. They should, however, be used with
42161  * caution as the C language standard provides no guarantees about the alignment or
42162  * atomicity of device memory accesses. The recommended practice for writing
42163  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
42164  * alt_write_word() functions.
42165  *
42166  * The struct declaration for register ALT_USB_HOST_HCTSIZ12.
42167  */
42168 struct ALT_USB_HOST_HCTSIZ12_s
42169 {
42170  uint32_t xfersize : 19; /* Transfer Size */
42171  uint32_t pktcnt : 10; /* Packet Count */
42172  uint32_t pid : 2; /* PID */
42173  uint32_t dopng : 1; /* Do Ping */
42174 };
42175 
42176 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ12. */
42177 typedef volatile struct ALT_USB_HOST_HCTSIZ12_s ALT_USB_HOST_HCTSIZ12_t;
42178 #endif /* __ASSEMBLY__ */
42179 
42180 /* The byte offset of the ALT_USB_HOST_HCTSIZ12 register from the beginning of the component. */
42181 #define ALT_USB_HOST_HCTSIZ12_OFST 0x290
42182 /* The address of the ALT_USB_HOST_HCTSIZ12 register. */
42183 #define ALT_USB_HOST_HCTSIZ12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ12_OFST))
42184 
42185 /*
42186  * Register : Host Channel 12 DMA Address Register - hcdma12
42187  *
42188  * This register is used by the OTG host in the internal DMA mode to maintain the
42189  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
42190  * DWORD-aligned.
42191  *
42192  * Register Layout
42193  *
42194  * Bits | Access | Reset | Description
42195  * :-------|:-------|:------|:------------
42196  * [31:0] | RW | 0x0 | DMA Address
42197  *
42198  */
42199 /*
42200  * Field : DMA Address - hcdma12
42201  *
42202  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
42203  * first descriptor in the list should be located in this address. The first
42204  * descriptor may be or may not be ready. The core starts processing the list from
42205  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
42206  * in which the isochronous descriptors are present where N is based on nTD as per
42207  * Table below
42208  *
42209  * [31:N] Base Address [N-1:3] Offset [2:0] 000
42210  *
42211  * HS ISOC FS ISOC
42212  *
42213  * nTD N nTD N
42214  *
42215  * 7 6 1 4
42216  *
42217  * 15 7 3 5
42218  *
42219  * 31 8 7 6
42220  *
42221  * 63 9 15 7
42222  *
42223  * 127 10 31 8
42224  *
42225  * 255 11 63 9
42226  *
42227  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
42228  * This value is in terms of number of descriptors. The values can be from 0 to 63.
42229  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
42230  * descriptor processed in the list. This field is updated both by application and
42231  * the core. for example, if the application enables the channel after programming
42232  * CTD=5, then the core will start processing the 6th descriptor. The address is
42233  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
42234  * CTD for isochronous is based on the current frame/microframe value. Need to be
42235  * set to zero by application.
42236  *
42237  * Field Access Macros:
42238  *
42239  */
42240 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA12_HCDMA12 register field. */
42241 #define ALT_USB_HOST_HCDMA12_HCDMA12_LSB 0
42242 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA12_HCDMA12 register field. */
42243 #define ALT_USB_HOST_HCDMA12_HCDMA12_MSB 31
42244 /* The width in bits of the ALT_USB_HOST_HCDMA12_HCDMA12 register field. */
42245 #define ALT_USB_HOST_HCDMA12_HCDMA12_WIDTH 32
42246 /* The mask used to set the ALT_USB_HOST_HCDMA12_HCDMA12 register field value. */
42247 #define ALT_USB_HOST_HCDMA12_HCDMA12_SET_MSK 0xffffffff
42248 /* The mask used to clear the ALT_USB_HOST_HCDMA12_HCDMA12 register field value. */
42249 #define ALT_USB_HOST_HCDMA12_HCDMA12_CLR_MSK 0x00000000
42250 /* The reset value of the ALT_USB_HOST_HCDMA12_HCDMA12 register field. */
42251 #define ALT_USB_HOST_HCDMA12_HCDMA12_RESET 0x0
42252 /* Extracts the ALT_USB_HOST_HCDMA12_HCDMA12 field value from a register. */
42253 #define ALT_USB_HOST_HCDMA12_HCDMA12_GET(value) (((value) & 0xffffffff) >> 0)
42254 /* Produces a ALT_USB_HOST_HCDMA12_HCDMA12 register field value suitable for setting the register. */
42255 #define ALT_USB_HOST_HCDMA12_HCDMA12_SET(value) (((value) << 0) & 0xffffffff)
42256 
42257 #ifndef __ASSEMBLY__
42258 /*
42259  * WARNING: The C register and register group struct declarations are provided for
42260  * convenience and illustrative purposes. They should, however, be used with
42261  * caution as the C language standard provides no guarantees about the alignment or
42262  * atomicity of device memory accesses. The recommended practice for writing
42263  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
42264  * alt_write_word() functions.
42265  *
42266  * The struct declaration for register ALT_USB_HOST_HCDMA12.
42267  */
42268 struct ALT_USB_HOST_HCDMA12_s
42269 {
42270  uint32_t hcdma12 : 32; /* DMA Address */
42271 };
42272 
42273 /* The typedef declaration for register ALT_USB_HOST_HCDMA12. */
42274 typedef volatile struct ALT_USB_HOST_HCDMA12_s ALT_USB_HOST_HCDMA12_t;
42275 #endif /* __ASSEMBLY__ */
42276 
42277 /* The byte offset of the ALT_USB_HOST_HCDMA12 register from the beginning of the component. */
42278 #define ALT_USB_HOST_HCDMA12_OFST 0x294
42279 /* The address of the ALT_USB_HOST_HCDMA12 register. */
42280 #define ALT_USB_HOST_HCDMA12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA12_OFST))
42281 
42282 /*
42283  * Register : Host Channel 12 DMA Buffer Address Register - hcdmab12
42284  *
42285  * These registers are present only in case of Scatter/Gather DMA. These
42286  * registers are implemented in RAM instead of flop-based implementation. Holds
42287  * the current buffer address. This register is updated as and when the
42288  * data transfer for the corresponding end point is in progress. This register
42289  * is present only in Scatter/Gather DMA mode. Otherwise this field is
42290  * reserved.
42291  *
42292  * Register Layout
42293  *
42294  * Bits | Access | Reset | Description
42295  * :-------|:-------|:------|:----------------------------------
42296  * [31:0] | RW | 0x0 | Host Channel 0 DMA Buffer Address
42297  *
42298  */
42299 /*
42300  * Field : Host Channel 0 DMA Buffer Address - hcdmab12
42301  *
42302  * These registers are present only in case of Scatter/Gather DMA. These
42303  * registers are implemented in RAM instead of flop-based implementation. Holds
42304  * the current buffer address. This register is updated as and when the data
42305  * transfer for the corresponding end point is in progress. This register is
42306  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
42307  *
42308  * Field Access Macros:
42309  *
42310  */
42311 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB12_HCDMAB12 register field. */
42312 #define ALT_USB_HOST_HCDMAB12_HCDMAB12_LSB 0
42313 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB12_HCDMAB12 register field. */
42314 #define ALT_USB_HOST_HCDMAB12_HCDMAB12_MSB 31
42315 /* The width in bits of the ALT_USB_HOST_HCDMAB12_HCDMAB12 register field. */
42316 #define ALT_USB_HOST_HCDMAB12_HCDMAB12_WIDTH 32
42317 /* The mask used to set the ALT_USB_HOST_HCDMAB12_HCDMAB12 register field value. */
42318 #define ALT_USB_HOST_HCDMAB12_HCDMAB12_SET_MSK 0xffffffff
42319 /* The mask used to clear the ALT_USB_HOST_HCDMAB12_HCDMAB12 register field value. */
42320 #define ALT_USB_HOST_HCDMAB12_HCDMAB12_CLR_MSK 0x00000000
42321 /* The reset value of the ALT_USB_HOST_HCDMAB12_HCDMAB12 register field. */
42322 #define ALT_USB_HOST_HCDMAB12_HCDMAB12_RESET 0x0
42323 /* Extracts the ALT_USB_HOST_HCDMAB12_HCDMAB12 field value from a register. */
42324 #define ALT_USB_HOST_HCDMAB12_HCDMAB12_GET(value) (((value) & 0xffffffff) >> 0)
42325 /* Produces a ALT_USB_HOST_HCDMAB12_HCDMAB12 register field value suitable for setting the register. */
42326 #define ALT_USB_HOST_HCDMAB12_HCDMAB12_SET(value) (((value) << 0) & 0xffffffff)
42327 
42328 #ifndef __ASSEMBLY__
42329 /*
42330  * WARNING: The C register and register group struct declarations are provided for
42331  * convenience and illustrative purposes. They should, however, be used with
42332  * caution as the C language standard provides no guarantees about the alignment or
42333  * atomicity of device memory accesses. The recommended practice for writing
42334  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
42335  * alt_write_word() functions.
42336  *
42337  * The struct declaration for register ALT_USB_HOST_HCDMAB12.
42338  */
42339 struct ALT_USB_HOST_HCDMAB12_s
42340 {
42341  uint32_t hcdmab12 : 32; /* Host Channel 0 DMA Buffer Address */
42342 };
42343 
42344 /* The typedef declaration for register ALT_USB_HOST_HCDMAB12. */
42345 typedef volatile struct ALT_USB_HOST_HCDMAB12_s ALT_USB_HOST_HCDMAB12_t;
42346 #endif /* __ASSEMBLY__ */
42347 
42348 /* The byte offset of the ALT_USB_HOST_HCDMAB12 register from the beginning of the component. */
42349 #define ALT_USB_HOST_HCDMAB12_OFST 0x298
42350 /* The address of the ALT_USB_HOST_HCDMAB12 register. */
42351 #define ALT_USB_HOST_HCDMAB12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB12_OFST))
42352 
42353 /*
42354  * Register : Host Channel 13 Characteristics Register - hcchar13
42355  *
42356  * Host Channel 13 Characteristics Register
42357  *
42358  * Register Layout
42359  *
42360  * Bits | Access | Reset | Description
42361  * :--------|:-------|:------|:--------------------
42362  * [10:0] | RW | 0x0 | Maximum Packet Size
42363  * [14:11] | RW | 0x0 | Endpoint Number
42364  * [15] | RW | 0x0 | Endpoint Direction
42365  * [16] | ??? | 0x0 | *UNDEFINED*
42366  * [17] | RW | 0x0 | Low-Speed Device
42367  * [19:18] | RW | 0x0 | Endpoint Type
42368  * [21:20] | RW | 0x0 | Multi Count
42369  * [28:22] | RW | 0x0 | Device Address
42370  * [29] | ??? | 0x0 | *UNDEFINED*
42371  * [30] | R | 0x0 | Channel Disable
42372  * [31] | R | 0x0 | Channel Enable
42373  *
42374  */
42375 /*
42376  * Field : Maximum Packet Size - mps
42377  *
42378  * Indicates the maximum packet size of the associated endpoint.
42379  *
42380  * Field Access Macros:
42381  *
42382  */
42383 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR13_MPS register field. */
42384 #define ALT_USB_HOST_HCCHAR13_MPS_LSB 0
42385 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR13_MPS register field. */
42386 #define ALT_USB_HOST_HCCHAR13_MPS_MSB 10
42387 /* The width in bits of the ALT_USB_HOST_HCCHAR13_MPS register field. */
42388 #define ALT_USB_HOST_HCCHAR13_MPS_WIDTH 11
42389 /* The mask used to set the ALT_USB_HOST_HCCHAR13_MPS register field value. */
42390 #define ALT_USB_HOST_HCCHAR13_MPS_SET_MSK 0x000007ff
42391 /* The mask used to clear the ALT_USB_HOST_HCCHAR13_MPS register field value. */
42392 #define ALT_USB_HOST_HCCHAR13_MPS_CLR_MSK 0xfffff800
42393 /* The reset value of the ALT_USB_HOST_HCCHAR13_MPS register field. */
42394 #define ALT_USB_HOST_HCCHAR13_MPS_RESET 0x0
42395 /* Extracts the ALT_USB_HOST_HCCHAR13_MPS field value from a register. */
42396 #define ALT_USB_HOST_HCCHAR13_MPS_GET(value) (((value) & 0x000007ff) >> 0)
42397 /* Produces a ALT_USB_HOST_HCCHAR13_MPS register field value suitable for setting the register. */
42398 #define ALT_USB_HOST_HCCHAR13_MPS_SET(value) (((value) << 0) & 0x000007ff)
42399 
42400 /*
42401  * Field : Endpoint Number - epnum
42402  *
42403  * Indicates the endpoint number on the device serving as the data source or sink.
42404  *
42405  * Field Enumeration Values:
42406  *
42407  * Enum | Value | Description
42408  * :--------------------------------------|:------|:--------------
42409  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT0 | 0x0 | End point 0
42410  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT1 | 0x1 | End point 1
42411  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT2 | 0x2 | End point 2
42412  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT3 | 0x3 | End point 3
42413  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT4 | 0x4 | End point 4
42414  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT5 | 0x5 | End point 5
42415  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT6 | 0x6 | End point 6
42416  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT7 | 0x7 | End point 7
42417  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT8 | 0x8 | End point 8
42418  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT9 | 0x9 | End point 9
42419  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT10 | 0xa | End point 10
42420  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT11 | 0xb | End point 11
42421  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT12 | 0xc | End point 12
42422  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT13 | 0xd | End point 13
42423  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT14 | 0xe | End point 14
42424  * ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT15 | 0xf | End point 15
42425  *
42426  * Field Access Macros:
42427  *
42428  */
42429 /*
42430  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42431  *
42432  * End point 0
42433  */
42434 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT0 0x0
42435 /*
42436  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42437  *
42438  * End point 1
42439  */
42440 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT1 0x1
42441 /*
42442  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42443  *
42444  * End point 2
42445  */
42446 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT2 0x2
42447 /*
42448  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42449  *
42450  * End point 3
42451  */
42452 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT3 0x3
42453 /*
42454  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42455  *
42456  * End point 4
42457  */
42458 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT4 0x4
42459 /*
42460  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42461  *
42462  * End point 5
42463  */
42464 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT5 0x5
42465 /*
42466  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42467  *
42468  * End point 6
42469  */
42470 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT6 0x6
42471 /*
42472  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42473  *
42474  * End point 7
42475  */
42476 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT7 0x7
42477 /*
42478  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42479  *
42480  * End point 8
42481  */
42482 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT8 0x8
42483 /*
42484  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42485  *
42486  * End point 9
42487  */
42488 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT9 0x9
42489 /*
42490  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42491  *
42492  * End point 10
42493  */
42494 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT10 0xa
42495 /*
42496  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42497  *
42498  * End point 11
42499  */
42500 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT11 0xb
42501 /*
42502  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42503  *
42504  * End point 12
42505  */
42506 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT12 0xc
42507 /*
42508  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42509  *
42510  * End point 13
42511  */
42512 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT13 0xd
42513 /*
42514  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42515  *
42516  * End point 14
42517  */
42518 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT14 0xe
42519 /*
42520  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPNUM
42521  *
42522  * End point 15
42523  */
42524 #define ALT_USB_HOST_HCCHAR13_EPNUM_E_ENDPT15 0xf
42525 
42526 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR13_EPNUM register field. */
42527 #define ALT_USB_HOST_HCCHAR13_EPNUM_LSB 11
42528 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR13_EPNUM register field. */
42529 #define ALT_USB_HOST_HCCHAR13_EPNUM_MSB 14
42530 /* The width in bits of the ALT_USB_HOST_HCCHAR13_EPNUM register field. */
42531 #define ALT_USB_HOST_HCCHAR13_EPNUM_WIDTH 4
42532 /* The mask used to set the ALT_USB_HOST_HCCHAR13_EPNUM register field value. */
42533 #define ALT_USB_HOST_HCCHAR13_EPNUM_SET_MSK 0x00007800
42534 /* The mask used to clear the ALT_USB_HOST_HCCHAR13_EPNUM register field value. */
42535 #define ALT_USB_HOST_HCCHAR13_EPNUM_CLR_MSK 0xffff87ff
42536 /* The reset value of the ALT_USB_HOST_HCCHAR13_EPNUM register field. */
42537 #define ALT_USB_HOST_HCCHAR13_EPNUM_RESET 0x0
42538 /* Extracts the ALT_USB_HOST_HCCHAR13_EPNUM field value from a register. */
42539 #define ALT_USB_HOST_HCCHAR13_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
42540 /* Produces a ALT_USB_HOST_HCCHAR13_EPNUM register field value suitable for setting the register. */
42541 #define ALT_USB_HOST_HCCHAR13_EPNUM_SET(value) (((value) << 11) & 0x00007800)
42542 
42543 /*
42544  * Field : Endpoint Direction - epdir
42545  *
42546  * Indicates whether the transaction is IN or OUT.
42547  *
42548  * Field Enumeration Values:
42549  *
42550  * Enum | Value | Description
42551  * :----------------------------------|:------|:--------------
42552  * ALT_USB_HOST_HCCHAR13_EPDIR_E_OUT | 0x0 | OUT Direction
42553  * ALT_USB_HOST_HCCHAR13_EPDIR_E_IN | 0x1 | IN Direction
42554  *
42555  * Field Access Macros:
42556  *
42557  */
42558 /*
42559  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPDIR
42560  *
42561  * OUT Direction
42562  */
42563 #define ALT_USB_HOST_HCCHAR13_EPDIR_E_OUT 0x0
42564 /*
42565  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPDIR
42566  *
42567  * IN Direction
42568  */
42569 #define ALT_USB_HOST_HCCHAR13_EPDIR_E_IN 0x1
42570 
42571 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR13_EPDIR register field. */
42572 #define ALT_USB_HOST_HCCHAR13_EPDIR_LSB 15
42573 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR13_EPDIR register field. */
42574 #define ALT_USB_HOST_HCCHAR13_EPDIR_MSB 15
42575 /* The width in bits of the ALT_USB_HOST_HCCHAR13_EPDIR register field. */
42576 #define ALT_USB_HOST_HCCHAR13_EPDIR_WIDTH 1
42577 /* The mask used to set the ALT_USB_HOST_HCCHAR13_EPDIR register field value. */
42578 #define ALT_USB_HOST_HCCHAR13_EPDIR_SET_MSK 0x00008000
42579 /* The mask used to clear the ALT_USB_HOST_HCCHAR13_EPDIR register field value. */
42580 #define ALT_USB_HOST_HCCHAR13_EPDIR_CLR_MSK 0xffff7fff
42581 /* The reset value of the ALT_USB_HOST_HCCHAR13_EPDIR register field. */
42582 #define ALT_USB_HOST_HCCHAR13_EPDIR_RESET 0x0
42583 /* Extracts the ALT_USB_HOST_HCCHAR13_EPDIR field value from a register. */
42584 #define ALT_USB_HOST_HCCHAR13_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
42585 /* Produces a ALT_USB_HOST_HCCHAR13_EPDIR register field value suitable for setting the register. */
42586 #define ALT_USB_HOST_HCCHAR13_EPDIR_SET(value) (((value) << 15) & 0x00008000)
42587 
42588 /*
42589  * Field : Low-Speed Device - lspddev
42590  *
42591  * This field is set by the application to indicate that this channel is
42592  * communicating to a low-speed device. The application must program this bit when
42593  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
42594  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
42595  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
42596  * core ignores this bit even if it is set by the application software
42597  *
42598  * Field Enumeration Values:
42599  *
42600  * Enum | Value | Description
42601  * :-------------------------------------|:------|:----------------------------------------
42602  * ALT_USB_HOST_HCCHAR13_LSPDDEV_E_DISD | 0x0 | Not Communicating with low speed device
42603  * ALT_USB_HOST_HCCHAR13_LSPDDEV_E_END | 0x1 | Communicating with low speed device
42604  *
42605  * Field Access Macros:
42606  *
42607  */
42608 /*
42609  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_LSPDDEV
42610  *
42611  * Not Communicating with low speed device
42612  */
42613 #define ALT_USB_HOST_HCCHAR13_LSPDDEV_E_DISD 0x0
42614 /*
42615  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_LSPDDEV
42616  *
42617  * Communicating with low speed device
42618  */
42619 #define ALT_USB_HOST_HCCHAR13_LSPDDEV_E_END 0x1
42620 
42621 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR13_LSPDDEV register field. */
42622 #define ALT_USB_HOST_HCCHAR13_LSPDDEV_LSB 17
42623 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR13_LSPDDEV register field. */
42624 #define ALT_USB_HOST_HCCHAR13_LSPDDEV_MSB 17
42625 /* The width in bits of the ALT_USB_HOST_HCCHAR13_LSPDDEV register field. */
42626 #define ALT_USB_HOST_HCCHAR13_LSPDDEV_WIDTH 1
42627 /* The mask used to set the ALT_USB_HOST_HCCHAR13_LSPDDEV register field value. */
42628 #define ALT_USB_HOST_HCCHAR13_LSPDDEV_SET_MSK 0x00020000
42629 /* The mask used to clear the ALT_USB_HOST_HCCHAR13_LSPDDEV register field value. */
42630 #define ALT_USB_HOST_HCCHAR13_LSPDDEV_CLR_MSK 0xfffdffff
42631 /* The reset value of the ALT_USB_HOST_HCCHAR13_LSPDDEV register field. */
42632 #define ALT_USB_HOST_HCCHAR13_LSPDDEV_RESET 0x0
42633 /* Extracts the ALT_USB_HOST_HCCHAR13_LSPDDEV field value from a register. */
42634 #define ALT_USB_HOST_HCCHAR13_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
42635 /* Produces a ALT_USB_HOST_HCCHAR13_LSPDDEV register field value suitable for setting the register. */
42636 #define ALT_USB_HOST_HCCHAR13_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
42637 
42638 /*
42639  * Field : Endpoint Type - eptype
42640  *
42641  * Indicates the transfer type selected.
42642  *
42643  * Field Enumeration Values:
42644  *
42645  * Enum | Value | Description
42646  * :--------------------------------------|:------|:------------
42647  * ALT_USB_HOST_HCCHAR13_EPTYPE_E_CTL | 0x0 | Control
42648  * ALT_USB_HOST_HCCHAR13_EPTYPE_E_ISOC | 0x1 | Isochronous
42649  * ALT_USB_HOST_HCCHAR13_EPTYPE_E_BULK | 0x2 | Bulk
42650  * ALT_USB_HOST_HCCHAR13_EPTYPE_E_INTERR | 0x3 | Interrupt
42651  *
42652  * Field Access Macros:
42653  *
42654  */
42655 /*
42656  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPTYPE
42657  *
42658  * Control
42659  */
42660 #define ALT_USB_HOST_HCCHAR13_EPTYPE_E_CTL 0x0
42661 /*
42662  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPTYPE
42663  *
42664  * Isochronous
42665  */
42666 #define ALT_USB_HOST_HCCHAR13_EPTYPE_E_ISOC 0x1
42667 /*
42668  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPTYPE
42669  *
42670  * Bulk
42671  */
42672 #define ALT_USB_HOST_HCCHAR13_EPTYPE_E_BULK 0x2
42673 /*
42674  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EPTYPE
42675  *
42676  * Interrupt
42677  */
42678 #define ALT_USB_HOST_HCCHAR13_EPTYPE_E_INTERR 0x3
42679 
42680 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR13_EPTYPE register field. */
42681 #define ALT_USB_HOST_HCCHAR13_EPTYPE_LSB 18
42682 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR13_EPTYPE register field. */
42683 #define ALT_USB_HOST_HCCHAR13_EPTYPE_MSB 19
42684 /* The width in bits of the ALT_USB_HOST_HCCHAR13_EPTYPE register field. */
42685 #define ALT_USB_HOST_HCCHAR13_EPTYPE_WIDTH 2
42686 /* The mask used to set the ALT_USB_HOST_HCCHAR13_EPTYPE register field value. */
42687 #define ALT_USB_HOST_HCCHAR13_EPTYPE_SET_MSK 0x000c0000
42688 /* The mask used to clear the ALT_USB_HOST_HCCHAR13_EPTYPE register field value. */
42689 #define ALT_USB_HOST_HCCHAR13_EPTYPE_CLR_MSK 0xfff3ffff
42690 /* The reset value of the ALT_USB_HOST_HCCHAR13_EPTYPE register field. */
42691 #define ALT_USB_HOST_HCCHAR13_EPTYPE_RESET 0x0
42692 /* Extracts the ALT_USB_HOST_HCCHAR13_EPTYPE field value from a register. */
42693 #define ALT_USB_HOST_HCCHAR13_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
42694 /* Produces a ALT_USB_HOST_HCCHAR13_EPTYPE register field value suitable for setting the register. */
42695 #define ALT_USB_HOST_HCCHAR13_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
42696 
42697 /*
42698  * Field : Multi Count - ec
42699  *
42700  * When the Split Enable bit of the Host Channel-n Split Control register
42701  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
42702  * transactions that must be executed per microframe for this periodic endpoint.
42703  * for non periodic transfers, this field is used only in DMA mode, and specifies
42704  * the number packets to be fetched for this channel before the internal DMA engine
42705  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
42706  * number of immediate retries to be performed for a periodic split transactions on
42707  * transaction errors. This field must be set to at least 1.
42708  *
42709  * Field Enumeration Values:
42710  *
42711  * Enum | Value | Description
42712  * :--------------------------------------|:------|:----------------------------------------------
42713  * ALT_USB_HOST_HCCHAR13_EC_E_RSVD | 0x0 | Reserved This field yields undefined result
42714  * ALT_USB_HOST_HCCHAR13_EC_E_TRANSONE | 0x1 | 1 transaction
42715  * ALT_USB_HOST_HCCHAR13_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
42716  * : | | per microframe
42717  * ALT_USB_HOST_HCCHAR13_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
42718  * : | | per microframe
42719  *
42720  * Field Access Macros:
42721  *
42722  */
42723 /*
42724  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EC
42725  *
42726  * Reserved This field yields undefined result
42727  */
42728 #define ALT_USB_HOST_HCCHAR13_EC_E_RSVD 0x0
42729 /*
42730  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EC
42731  *
42732  * 1 transaction
42733  */
42734 #define ALT_USB_HOST_HCCHAR13_EC_E_TRANSONE 0x1
42735 /*
42736  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EC
42737  *
42738  * 2 transactions to be issued for this endpoint per microframe
42739  */
42740 #define ALT_USB_HOST_HCCHAR13_EC_E_TRANSTWO 0x2
42741 /*
42742  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_EC
42743  *
42744  * 3 transactions to be issued for this endpoint per microframe
42745  */
42746 #define ALT_USB_HOST_HCCHAR13_EC_E_TRANSTHREE 0x3
42747 
42748 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR13_EC register field. */
42749 #define ALT_USB_HOST_HCCHAR13_EC_LSB 20
42750 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR13_EC register field. */
42751 #define ALT_USB_HOST_HCCHAR13_EC_MSB 21
42752 /* The width in bits of the ALT_USB_HOST_HCCHAR13_EC register field. */
42753 #define ALT_USB_HOST_HCCHAR13_EC_WIDTH 2
42754 /* The mask used to set the ALT_USB_HOST_HCCHAR13_EC register field value. */
42755 #define ALT_USB_HOST_HCCHAR13_EC_SET_MSK 0x00300000
42756 /* The mask used to clear the ALT_USB_HOST_HCCHAR13_EC register field value. */
42757 #define ALT_USB_HOST_HCCHAR13_EC_CLR_MSK 0xffcfffff
42758 /* The reset value of the ALT_USB_HOST_HCCHAR13_EC register field. */
42759 #define ALT_USB_HOST_HCCHAR13_EC_RESET 0x0
42760 /* Extracts the ALT_USB_HOST_HCCHAR13_EC field value from a register. */
42761 #define ALT_USB_HOST_HCCHAR13_EC_GET(value) (((value) & 0x00300000) >> 20)
42762 /* Produces a ALT_USB_HOST_HCCHAR13_EC register field value suitable for setting the register. */
42763 #define ALT_USB_HOST_HCCHAR13_EC_SET(value) (((value) << 20) & 0x00300000)
42764 
42765 /*
42766  * Field : Device Address - devaddr
42767  *
42768  * This field selects the specific device serving as the data source or sink.
42769  *
42770  * Field Access Macros:
42771  *
42772  */
42773 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR13_DEVADDR register field. */
42774 #define ALT_USB_HOST_HCCHAR13_DEVADDR_LSB 22
42775 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR13_DEVADDR register field. */
42776 #define ALT_USB_HOST_HCCHAR13_DEVADDR_MSB 28
42777 /* The width in bits of the ALT_USB_HOST_HCCHAR13_DEVADDR register field. */
42778 #define ALT_USB_HOST_HCCHAR13_DEVADDR_WIDTH 7
42779 /* The mask used to set the ALT_USB_HOST_HCCHAR13_DEVADDR register field value. */
42780 #define ALT_USB_HOST_HCCHAR13_DEVADDR_SET_MSK 0x1fc00000
42781 /* The mask used to clear the ALT_USB_HOST_HCCHAR13_DEVADDR register field value. */
42782 #define ALT_USB_HOST_HCCHAR13_DEVADDR_CLR_MSK 0xe03fffff
42783 /* The reset value of the ALT_USB_HOST_HCCHAR13_DEVADDR register field. */
42784 #define ALT_USB_HOST_HCCHAR13_DEVADDR_RESET 0x0
42785 /* Extracts the ALT_USB_HOST_HCCHAR13_DEVADDR field value from a register. */
42786 #define ALT_USB_HOST_HCCHAR13_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
42787 /* Produces a ALT_USB_HOST_HCCHAR13_DEVADDR register field value suitable for setting the register. */
42788 #define ALT_USB_HOST_HCCHAR13_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
42789 
42790 /*
42791  * Field : Channel Disable - chdis
42792  *
42793  * The application sets this bit to stop transmitting/receiving data on a channel,
42794  * even before the transfer for that channel is complete. The application must wait
42795  * for the Channel Disabled interrupt before treating the channel as disabled.
42796  *
42797  * Field Enumeration Values:
42798  *
42799  * Enum | Value | Description
42800  * :------------------------------------|:------|:----------------------------
42801  * ALT_USB_HOST_HCCHAR13_CHDIS_E_INACT | 0x0 | Transmit/Recieve normal
42802  * ALT_USB_HOST_HCCHAR13_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving
42803  *
42804  * Field Access Macros:
42805  *
42806  */
42807 /*
42808  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_CHDIS
42809  *
42810  * Transmit/Recieve normal
42811  */
42812 #define ALT_USB_HOST_HCCHAR13_CHDIS_E_INACT 0x0
42813 /*
42814  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_CHDIS
42815  *
42816  * Stop transmitting/receiving
42817  */
42818 #define ALT_USB_HOST_HCCHAR13_CHDIS_E_ACT 0x1
42819 
42820 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR13_CHDIS register field. */
42821 #define ALT_USB_HOST_HCCHAR13_CHDIS_LSB 30
42822 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR13_CHDIS register field. */
42823 #define ALT_USB_HOST_HCCHAR13_CHDIS_MSB 30
42824 /* The width in bits of the ALT_USB_HOST_HCCHAR13_CHDIS register field. */
42825 #define ALT_USB_HOST_HCCHAR13_CHDIS_WIDTH 1
42826 /* The mask used to set the ALT_USB_HOST_HCCHAR13_CHDIS register field value. */
42827 #define ALT_USB_HOST_HCCHAR13_CHDIS_SET_MSK 0x40000000
42828 /* The mask used to clear the ALT_USB_HOST_HCCHAR13_CHDIS register field value. */
42829 #define ALT_USB_HOST_HCCHAR13_CHDIS_CLR_MSK 0xbfffffff
42830 /* The reset value of the ALT_USB_HOST_HCCHAR13_CHDIS register field. */
42831 #define ALT_USB_HOST_HCCHAR13_CHDIS_RESET 0x0
42832 /* Extracts the ALT_USB_HOST_HCCHAR13_CHDIS field value from a register. */
42833 #define ALT_USB_HOST_HCCHAR13_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
42834 /* Produces a ALT_USB_HOST_HCCHAR13_CHDIS register field value suitable for setting the register. */
42835 #define ALT_USB_HOST_HCCHAR13_CHDIS_SET(value) (((value) << 30) & 0x40000000)
42836 
42837 /*
42838  * Field : Channel Enable - chena
42839  *
42840  * When Scatter/Gather mode is disabled This field is set by the application and
42841  * cleared by the OTG host.
42842  *
42843  * 0: Channel disabled
42844  *
42845  * 1: Channel enabled
42846  *
42847  * When Scatter/Gather mode is enabled.
42848  *
42849  * Field Enumeration Values:
42850  *
42851  * Enum | Value | Description
42852  * :------------------------------------|:------|:-------------------------------------------------
42853  * ALT_USB_HOST_HCCHAR13_CHENA_E_INACT | 0x0 | Indicates that the descriptor structure is not
42854  * : | | yet ready
42855  * ALT_USB_HOST_HCCHAR13_CHENA_E_ACT | 0x1 | Indicates that the descriptor structure and
42856  * : | | data buffer with data is setup and this
42857  * : | | channel can access the descriptor
42858  *
42859  * Field Access Macros:
42860  *
42861  */
42862 /*
42863  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_CHENA
42864  *
42865  * Indicates that the descriptor structure is not yet ready
42866  */
42867 #define ALT_USB_HOST_HCCHAR13_CHENA_E_INACT 0x0
42868 /*
42869  * Enumerated value for register field ALT_USB_HOST_HCCHAR13_CHENA
42870  *
42871  * Indicates that the descriptor structure and data buffer with data is
42872  * setup and this channel can access the descriptor
42873  */
42874 #define ALT_USB_HOST_HCCHAR13_CHENA_E_ACT 0x1
42875 
42876 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR13_CHENA register field. */
42877 #define ALT_USB_HOST_HCCHAR13_CHENA_LSB 31
42878 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR13_CHENA register field. */
42879 #define ALT_USB_HOST_HCCHAR13_CHENA_MSB 31
42880 /* The width in bits of the ALT_USB_HOST_HCCHAR13_CHENA register field. */
42881 #define ALT_USB_HOST_HCCHAR13_CHENA_WIDTH 1
42882 /* The mask used to set the ALT_USB_HOST_HCCHAR13_CHENA register field value. */
42883 #define ALT_USB_HOST_HCCHAR13_CHENA_SET_MSK 0x80000000
42884 /* The mask used to clear the ALT_USB_HOST_HCCHAR13_CHENA register field value. */
42885 #define ALT_USB_HOST_HCCHAR13_CHENA_CLR_MSK 0x7fffffff
42886 /* The reset value of the ALT_USB_HOST_HCCHAR13_CHENA register field. */
42887 #define ALT_USB_HOST_HCCHAR13_CHENA_RESET 0x0
42888 /* Extracts the ALT_USB_HOST_HCCHAR13_CHENA field value from a register. */
42889 #define ALT_USB_HOST_HCCHAR13_CHENA_GET(value) (((value) & 0x80000000) >> 31)
42890 /* Produces a ALT_USB_HOST_HCCHAR13_CHENA register field value suitable for setting the register. */
42891 #define ALT_USB_HOST_HCCHAR13_CHENA_SET(value) (((value) << 31) & 0x80000000)
42892 
42893 #ifndef __ASSEMBLY__
42894 /*
42895  * WARNING: The C register and register group struct declarations are provided for
42896  * convenience and illustrative purposes. They should, however, be used with
42897  * caution as the C language standard provides no guarantees about the alignment or
42898  * atomicity of device memory accesses. The recommended practice for writing
42899  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
42900  * alt_write_word() functions.
42901  *
42902  * The struct declaration for register ALT_USB_HOST_HCCHAR13.
42903  */
42904 struct ALT_USB_HOST_HCCHAR13_s
42905 {
42906  uint32_t mps : 11; /* Maximum Packet Size */
42907  uint32_t epnum : 4; /* Endpoint Number */
42908  uint32_t epdir : 1; /* Endpoint Direction */
42909  uint32_t : 1; /* *UNDEFINED* */
42910  uint32_t lspddev : 1; /* Low-Speed Device */
42911  uint32_t eptype : 2; /* Endpoint Type */
42912  uint32_t ec : 2; /* Multi Count */
42913  uint32_t devaddr : 7; /* Device Address */
42914  uint32_t : 1; /* *UNDEFINED* */
42915  const uint32_t chdis : 1; /* Channel Disable */
42916  const uint32_t chena : 1; /* Channel Enable */
42917 };
42918 
42919 /* The typedef declaration for register ALT_USB_HOST_HCCHAR13. */
42920 typedef volatile struct ALT_USB_HOST_HCCHAR13_s ALT_USB_HOST_HCCHAR13_t;
42921 #endif /* __ASSEMBLY__ */
42922 
42923 /* The byte offset of the ALT_USB_HOST_HCCHAR13 register from the beginning of the component. */
42924 #define ALT_USB_HOST_HCCHAR13_OFST 0x2a0
42925 /* The address of the ALT_USB_HOST_HCCHAR13 register. */
42926 #define ALT_USB_HOST_HCCHAR13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR13_OFST))
42927 
42928 /*
42929  * Register : Host Channel 13 Split Control Register - hcsplt13
42930  *
42931  * Channel_number 13.
42932  *
42933  * Register Layout
42934  *
42935  * Bits | Access | Reset | Description
42936  * :--------|:-------|:------|:---------------------
42937  * [6:0] | RW | 0x0 | Port Address
42938  * [13:7] | RW | 0x0 | Hub Address
42939  * [15:14] | RW | 0x0 | Transaction Position
42940  * [16] | RW | 0x0 | Do Complete Split
42941  * [30:17] | ??? | 0x0 | *UNDEFINED*
42942  * [31] | RW | 0x0 | Split Enable
42943  *
42944  */
42945 /*
42946  * Field : Port Address - prtaddr
42947  *
42948  * This field is the port number of the recipient transactiontranslator.
42949  *
42950  * Field Access Macros:
42951  *
42952  */
42953 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT13_PRTADDR register field. */
42954 #define ALT_USB_HOST_HCSPLT13_PRTADDR_LSB 0
42955 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT13_PRTADDR register field. */
42956 #define ALT_USB_HOST_HCSPLT13_PRTADDR_MSB 6
42957 /* The width in bits of the ALT_USB_HOST_HCSPLT13_PRTADDR register field. */
42958 #define ALT_USB_HOST_HCSPLT13_PRTADDR_WIDTH 7
42959 /* The mask used to set the ALT_USB_HOST_HCSPLT13_PRTADDR register field value. */
42960 #define ALT_USB_HOST_HCSPLT13_PRTADDR_SET_MSK 0x0000007f
42961 /* The mask used to clear the ALT_USB_HOST_HCSPLT13_PRTADDR register field value. */
42962 #define ALT_USB_HOST_HCSPLT13_PRTADDR_CLR_MSK 0xffffff80
42963 /* The reset value of the ALT_USB_HOST_HCSPLT13_PRTADDR register field. */
42964 #define ALT_USB_HOST_HCSPLT13_PRTADDR_RESET 0x0
42965 /* Extracts the ALT_USB_HOST_HCSPLT13_PRTADDR field value from a register. */
42966 #define ALT_USB_HOST_HCSPLT13_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
42967 /* Produces a ALT_USB_HOST_HCSPLT13_PRTADDR register field value suitable for setting the register. */
42968 #define ALT_USB_HOST_HCSPLT13_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
42969 
42970 /*
42971  * Field : Hub Address - hubaddr
42972  *
42973  * This field holds the device address of the transaction translator's hub.
42974  *
42975  * Field Access Macros:
42976  *
42977  */
42978 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT13_HUBADDR register field. */
42979 #define ALT_USB_HOST_HCSPLT13_HUBADDR_LSB 7
42980 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT13_HUBADDR register field. */
42981 #define ALT_USB_HOST_HCSPLT13_HUBADDR_MSB 13
42982 /* The width in bits of the ALT_USB_HOST_HCSPLT13_HUBADDR register field. */
42983 #define ALT_USB_HOST_HCSPLT13_HUBADDR_WIDTH 7
42984 /* The mask used to set the ALT_USB_HOST_HCSPLT13_HUBADDR register field value. */
42985 #define ALT_USB_HOST_HCSPLT13_HUBADDR_SET_MSK 0x00003f80
42986 /* The mask used to clear the ALT_USB_HOST_HCSPLT13_HUBADDR register field value. */
42987 #define ALT_USB_HOST_HCSPLT13_HUBADDR_CLR_MSK 0xffffc07f
42988 /* The reset value of the ALT_USB_HOST_HCSPLT13_HUBADDR register field. */
42989 #define ALT_USB_HOST_HCSPLT13_HUBADDR_RESET 0x0
42990 /* Extracts the ALT_USB_HOST_HCSPLT13_HUBADDR field value from a register. */
42991 #define ALT_USB_HOST_HCSPLT13_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
42992 /* Produces a ALT_USB_HOST_HCSPLT13_HUBADDR register field value suitable for setting the register. */
42993 #define ALT_USB_HOST_HCSPLT13_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
42994 
42995 /*
42996  * Field : Transaction Position - xactpos
42997  *
42998  * This field is used to determine whether to send all, first, middle, or last
42999  * payloads with each OUT transaction.
43000  *
43001  * Field Enumeration Values:
43002  *
43003  * Enum | Value | Description
43004  * :---------------------------------------|:------|:------------------------------------------------
43005  * ALT_USB_HOST_HCSPLT13_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
43006  * : | | transaction (which is larger than 188 bytes)
43007  * ALT_USB_HOST_HCSPLT13_XACTPOS_E_END | 0x1 | End. This is the last payload of this
43008  * : | | transaction (which is larger than 188 bytes)
43009  * ALT_USB_HOST_HCSPLT13_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
43010  * : | | transaction (which is larger than 188 bytes)
43011  * ALT_USB_HOST_HCSPLT13_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
43012  * : | | transaction (which is less than or equal to 188
43013  * : | | bytes)
43014  *
43015  * Field Access Macros:
43016  *
43017  */
43018 /*
43019  * Enumerated value for register field ALT_USB_HOST_HCSPLT13_XACTPOS
43020  *
43021  * Mid. This is the middle payload of this transaction (which is larger than 188
43022  * bytes)
43023  */
43024 #define ALT_USB_HOST_HCSPLT13_XACTPOS_E_MIDDLE 0x0
43025 /*
43026  * Enumerated value for register field ALT_USB_HOST_HCSPLT13_XACTPOS
43027  *
43028  * End. This is the last payload of this transaction (which is larger than 188
43029  * bytes)
43030  */
43031 #define ALT_USB_HOST_HCSPLT13_XACTPOS_E_END 0x1
43032 /*
43033  * Enumerated value for register field ALT_USB_HOST_HCSPLT13_XACTPOS
43034  *
43035  * Begin. This is the first data payload of this transaction (which is larger than
43036  * 188 bytes)
43037  */
43038 #define ALT_USB_HOST_HCSPLT13_XACTPOS_E_BEGIN 0x2
43039 /*
43040  * Enumerated value for register field ALT_USB_HOST_HCSPLT13_XACTPOS
43041  *
43042  * All. This is the entire data payload is of this transaction (which is less than
43043  * or equal to 188 bytes)
43044  */
43045 #define ALT_USB_HOST_HCSPLT13_XACTPOS_E_ALL 0x3
43046 
43047 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT13_XACTPOS register field. */
43048 #define ALT_USB_HOST_HCSPLT13_XACTPOS_LSB 14
43049 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT13_XACTPOS register field. */
43050 #define ALT_USB_HOST_HCSPLT13_XACTPOS_MSB 15
43051 /* The width in bits of the ALT_USB_HOST_HCSPLT13_XACTPOS register field. */
43052 #define ALT_USB_HOST_HCSPLT13_XACTPOS_WIDTH 2
43053 /* The mask used to set the ALT_USB_HOST_HCSPLT13_XACTPOS register field value. */
43054 #define ALT_USB_HOST_HCSPLT13_XACTPOS_SET_MSK 0x0000c000
43055 /* The mask used to clear the ALT_USB_HOST_HCSPLT13_XACTPOS register field value. */
43056 #define ALT_USB_HOST_HCSPLT13_XACTPOS_CLR_MSK 0xffff3fff
43057 /* The reset value of the ALT_USB_HOST_HCSPLT13_XACTPOS register field. */
43058 #define ALT_USB_HOST_HCSPLT13_XACTPOS_RESET 0x0
43059 /* Extracts the ALT_USB_HOST_HCSPLT13_XACTPOS field value from a register. */
43060 #define ALT_USB_HOST_HCSPLT13_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
43061 /* Produces a ALT_USB_HOST_HCSPLT13_XACTPOS register field value suitable for setting the register. */
43062 #define ALT_USB_HOST_HCSPLT13_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
43063 
43064 /*
43065  * Field : Do Complete Split - compsplt
43066  *
43067  * The application sets this field to request the OTG host to perform a complete
43068  * split transaction.
43069  *
43070  * Field Enumeration Values:
43071  *
43072  * Enum | Value | Description
43073  * :-----------------------------------------|:------|:---------------------
43074  * ALT_USB_HOST_HCSPLT13_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
43075  * ALT_USB_HOST_HCSPLT13_COMPSPLT_E_SPLIT | 0x1 | Split transaction
43076  *
43077  * Field Access Macros:
43078  *
43079  */
43080 /*
43081  * Enumerated value for register field ALT_USB_HOST_HCSPLT13_COMPSPLT
43082  *
43083  * No split transaction
43084  */
43085 #define ALT_USB_HOST_HCSPLT13_COMPSPLT_E_NOSPLIT 0x0
43086 /*
43087  * Enumerated value for register field ALT_USB_HOST_HCSPLT13_COMPSPLT
43088  *
43089  * Split transaction
43090  */
43091 #define ALT_USB_HOST_HCSPLT13_COMPSPLT_E_SPLIT 0x1
43092 
43093 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT13_COMPSPLT register field. */
43094 #define ALT_USB_HOST_HCSPLT13_COMPSPLT_LSB 16
43095 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT13_COMPSPLT register field. */
43096 #define ALT_USB_HOST_HCSPLT13_COMPSPLT_MSB 16
43097 /* The width in bits of the ALT_USB_HOST_HCSPLT13_COMPSPLT register field. */
43098 #define ALT_USB_HOST_HCSPLT13_COMPSPLT_WIDTH 1
43099 /* The mask used to set the ALT_USB_HOST_HCSPLT13_COMPSPLT register field value. */
43100 #define ALT_USB_HOST_HCSPLT13_COMPSPLT_SET_MSK 0x00010000
43101 /* The mask used to clear the ALT_USB_HOST_HCSPLT13_COMPSPLT register field value. */
43102 #define ALT_USB_HOST_HCSPLT13_COMPSPLT_CLR_MSK 0xfffeffff
43103 /* The reset value of the ALT_USB_HOST_HCSPLT13_COMPSPLT register field. */
43104 #define ALT_USB_HOST_HCSPLT13_COMPSPLT_RESET 0x0
43105 /* Extracts the ALT_USB_HOST_HCSPLT13_COMPSPLT field value from a register. */
43106 #define ALT_USB_HOST_HCSPLT13_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
43107 /* Produces a ALT_USB_HOST_HCSPLT13_COMPSPLT register field value suitable for setting the register. */
43108 #define ALT_USB_HOST_HCSPLT13_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
43109 
43110 /*
43111  * Field : Split Enable - spltena
43112  *
43113  * The application sets this field to indicate that this channel is enabled to
43114  * perform split transactions.
43115  *
43116  * Field Enumeration Values:
43117  *
43118  * Enum | Value | Description
43119  * :-------------------------------------|:------|:------------------
43120  * ALT_USB_HOST_HCSPLT13_SPLTENA_E_DISD | 0x0 | Split not enabled
43121  * ALT_USB_HOST_HCSPLT13_SPLTENA_E_END | 0x1 | Split enabled
43122  *
43123  * Field Access Macros:
43124  *
43125  */
43126 /*
43127  * Enumerated value for register field ALT_USB_HOST_HCSPLT13_SPLTENA
43128  *
43129  * Split not enabled
43130  */
43131 #define ALT_USB_HOST_HCSPLT13_SPLTENA_E_DISD 0x0
43132 /*
43133  * Enumerated value for register field ALT_USB_HOST_HCSPLT13_SPLTENA
43134  *
43135  * Split enabled
43136  */
43137 #define ALT_USB_HOST_HCSPLT13_SPLTENA_E_END 0x1
43138 
43139 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT13_SPLTENA register field. */
43140 #define ALT_USB_HOST_HCSPLT13_SPLTENA_LSB 31
43141 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT13_SPLTENA register field. */
43142 #define ALT_USB_HOST_HCSPLT13_SPLTENA_MSB 31
43143 /* The width in bits of the ALT_USB_HOST_HCSPLT13_SPLTENA register field. */
43144 #define ALT_USB_HOST_HCSPLT13_SPLTENA_WIDTH 1
43145 /* The mask used to set the ALT_USB_HOST_HCSPLT13_SPLTENA register field value. */
43146 #define ALT_USB_HOST_HCSPLT13_SPLTENA_SET_MSK 0x80000000
43147 /* The mask used to clear the ALT_USB_HOST_HCSPLT13_SPLTENA register field value. */
43148 #define ALT_USB_HOST_HCSPLT13_SPLTENA_CLR_MSK 0x7fffffff
43149 /* The reset value of the ALT_USB_HOST_HCSPLT13_SPLTENA register field. */
43150 #define ALT_USB_HOST_HCSPLT13_SPLTENA_RESET 0x0
43151 /* Extracts the ALT_USB_HOST_HCSPLT13_SPLTENA field value from a register. */
43152 #define ALT_USB_HOST_HCSPLT13_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
43153 /* Produces a ALT_USB_HOST_HCSPLT13_SPLTENA register field value suitable for setting the register. */
43154 #define ALT_USB_HOST_HCSPLT13_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
43155 
43156 #ifndef __ASSEMBLY__
43157 /*
43158  * WARNING: The C register and register group struct declarations are provided for
43159  * convenience and illustrative purposes. They should, however, be used with
43160  * caution as the C language standard provides no guarantees about the alignment or
43161  * atomicity of device memory accesses. The recommended practice for writing
43162  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
43163  * alt_write_word() functions.
43164  *
43165  * The struct declaration for register ALT_USB_HOST_HCSPLT13.
43166  */
43167 struct ALT_USB_HOST_HCSPLT13_s
43168 {
43169  uint32_t prtaddr : 7; /* Port Address */
43170  uint32_t hubaddr : 7; /* Hub Address */
43171  uint32_t xactpos : 2; /* Transaction Position */
43172  uint32_t compsplt : 1; /* Do Complete Split */
43173  uint32_t : 14; /* *UNDEFINED* */
43174  uint32_t spltena : 1; /* Split Enable */
43175 };
43176 
43177 /* The typedef declaration for register ALT_USB_HOST_HCSPLT13. */
43178 typedef volatile struct ALT_USB_HOST_HCSPLT13_s ALT_USB_HOST_HCSPLT13_t;
43179 #endif /* __ASSEMBLY__ */
43180 
43181 /* The byte offset of the ALT_USB_HOST_HCSPLT13 register from the beginning of the component. */
43182 #define ALT_USB_HOST_HCSPLT13_OFST 0x2a4
43183 /* The address of the ALT_USB_HOST_HCSPLT13 register. */
43184 #define ALT_USB_HOST_HCSPLT13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT13_OFST))
43185 
43186 /*
43187  * Register : Host Channel 13 Interrupt Register - hcint13
43188  *
43189  * This register indicates the status of a channel with respect to USB- and AHB-
43190  * related events. The application must read this register when the Host Channels
43191  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
43192  * application can read this register, it must first read the Host All Channels
43193  * Interrupt (HAINT) register to get the exact channel number for the Host
43194  * Channel-n Interrupt register. The application must clear the appropriate bit in
43195  * this register to clear the corresponding bits in the HAINT and GINTSTS
43196  * registers.
43197  *
43198  * Register Layout
43199  *
43200  * Bits | Access | Reset | Description
43201  * :--------|:-------|:------|:--------------------------------------------
43202  * [0] | R | 0x0 | Transfer Completed
43203  * [1] | R | 0x0 | Channel Halted
43204  * [2] | R | 0x0 | AHB Error
43205  * [3] | R | 0x0 | STALL Response Received Interrupt
43206  * [4] | R | 0x0 | NAK Response Received Interrupt
43207  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
43208  * [6] | R | 0x0 | NYET Response Received Interrupt
43209  * [7] | R | 0x0 | Transaction Error
43210  * [8] | R | 0x0 | Babble Error
43211  * [9] | R | 0x0 | Frame Overrun
43212  * [10] | R | 0x0 | Data Toggle Error
43213  * [11] | R | 0x0 | BNA Interrupt
43214  * [12] | R | 0x0 | Excessive Transaction Error
43215  * [13] | R | 0x0 | Descriptor rollover interrupt
43216  * [31:14] | ??? | 0x0 | *UNDEFINED*
43217  *
43218  */
43219 /*
43220  * Field : Transfer Completed - xfercompl
43221  *
43222  * Transfer completed normally without any errors. This bit can be set only by the
43223  * core and the application should write 1 to clear it.
43224  *
43225  * Field Enumeration Values:
43226  *
43227  * Enum | Value | Description
43228  * :---------------------------------------|:------|:-----------------------------------------------
43229  * ALT_USB_HOST_HCINT13_XFERCOMPL_E_INACT | 0x0 | No transfer
43230  * ALT_USB_HOST_HCINT13_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
43231  *
43232  * Field Access Macros:
43233  *
43234  */
43235 /*
43236  * Enumerated value for register field ALT_USB_HOST_HCINT13_XFERCOMPL
43237  *
43238  * No transfer
43239  */
43240 #define ALT_USB_HOST_HCINT13_XFERCOMPL_E_INACT 0x0
43241 /*
43242  * Enumerated value for register field ALT_USB_HOST_HCINT13_XFERCOMPL
43243  *
43244  * Transfer completed normally without any errors
43245  */
43246 #define ALT_USB_HOST_HCINT13_XFERCOMPL_E_ACT 0x1
43247 
43248 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_XFERCOMPL register field. */
43249 #define ALT_USB_HOST_HCINT13_XFERCOMPL_LSB 0
43250 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_XFERCOMPL register field. */
43251 #define ALT_USB_HOST_HCINT13_XFERCOMPL_MSB 0
43252 /* The width in bits of the ALT_USB_HOST_HCINT13_XFERCOMPL register field. */
43253 #define ALT_USB_HOST_HCINT13_XFERCOMPL_WIDTH 1
43254 /* The mask used to set the ALT_USB_HOST_HCINT13_XFERCOMPL register field value. */
43255 #define ALT_USB_HOST_HCINT13_XFERCOMPL_SET_MSK 0x00000001
43256 /* The mask used to clear the ALT_USB_HOST_HCINT13_XFERCOMPL register field value. */
43257 #define ALT_USB_HOST_HCINT13_XFERCOMPL_CLR_MSK 0xfffffffe
43258 /* The reset value of the ALT_USB_HOST_HCINT13_XFERCOMPL register field. */
43259 #define ALT_USB_HOST_HCINT13_XFERCOMPL_RESET 0x0
43260 /* Extracts the ALT_USB_HOST_HCINT13_XFERCOMPL field value from a register. */
43261 #define ALT_USB_HOST_HCINT13_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
43262 /* Produces a ALT_USB_HOST_HCINT13_XFERCOMPL register field value suitable for setting the register. */
43263 #define ALT_USB_HOST_HCINT13_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
43264 
43265 /*
43266  * Field : Channel Halted - chhltd
43267  *
43268  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
43269  * either because of any USB transaction error or in response to disable request by
43270  * the application or because of a completed transfer. In Scatter/gather DMA mode,
43271  * this indicates that transfer completed due to any of the following
43272  *
43273  * . EOL being set in descriptor
43274  *
43275  * . AHB error
43276  *
43277  * . Excessive transaction errors
43278  *
43279  * . Babble
43280  *
43281  * . Stall
43282  *
43283  * Field Enumeration Values:
43284  *
43285  * Enum | Value | Description
43286  * :------------------------------------|:------|:-------------------
43287  * ALT_USB_HOST_HCINT13_CHHLTD_E_INACT | 0x0 | Channel not halted
43288  * ALT_USB_HOST_HCINT13_CHHLTD_E_ACT | 0x1 | Channel Halted
43289  *
43290  * Field Access Macros:
43291  *
43292  */
43293 /*
43294  * Enumerated value for register field ALT_USB_HOST_HCINT13_CHHLTD
43295  *
43296  * Channel not halted
43297  */
43298 #define ALT_USB_HOST_HCINT13_CHHLTD_E_INACT 0x0
43299 /*
43300  * Enumerated value for register field ALT_USB_HOST_HCINT13_CHHLTD
43301  *
43302  * Channel Halted
43303  */
43304 #define ALT_USB_HOST_HCINT13_CHHLTD_E_ACT 0x1
43305 
43306 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_CHHLTD register field. */
43307 #define ALT_USB_HOST_HCINT13_CHHLTD_LSB 1
43308 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_CHHLTD register field. */
43309 #define ALT_USB_HOST_HCINT13_CHHLTD_MSB 1
43310 /* The width in bits of the ALT_USB_HOST_HCINT13_CHHLTD register field. */
43311 #define ALT_USB_HOST_HCINT13_CHHLTD_WIDTH 1
43312 /* The mask used to set the ALT_USB_HOST_HCINT13_CHHLTD register field value. */
43313 #define ALT_USB_HOST_HCINT13_CHHLTD_SET_MSK 0x00000002
43314 /* The mask used to clear the ALT_USB_HOST_HCINT13_CHHLTD register field value. */
43315 #define ALT_USB_HOST_HCINT13_CHHLTD_CLR_MSK 0xfffffffd
43316 /* The reset value of the ALT_USB_HOST_HCINT13_CHHLTD register field. */
43317 #define ALT_USB_HOST_HCINT13_CHHLTD_RESET 0x0
43318 /* Extracts the ALT_USB_HOST_HCINT13_CHHLTD field value from a register. */
43319 #define ALT_USB_HOST_HCINT13_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
43320 /* Produces a ALT_USB_HOST_HCINT13_CHHLTD register field value suitable for setting the register. */
43321 #define ALT_USB_HOST_HCINT13_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
43322 
43323 /*
43324  * Field : AHB Error - ahberr
43325  *
43326  * This is generated only in Internal DMA mode when there is an AHB error during
43327  * AHB read/write. The application can read the corresponding channel's DMA address
43328  * register to get the error address.
43329  *
43330  * Field Enumeration Values:
43331  *
43332  * Enum | Value | Description
43333  * :------------------------------------|:------|:--------------------------------
43334  * ALT_USB_HOST_HCINT13_AHBERR_E_INACT | 0x0 | No AHB error
43335  * ALT_USB_HOST_HCINT13_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
43336  *
43337  * Field Access Macros:
43338  *
43339  */
43340 /*
43341  * Enumerated value for register field ALT_USB_HOST_HCINT13_AHBERR
43342  *
43343  * No AHB error
43344  */
43345 #define ALT_USB_HOST_HCINT13_AHBERR_E_INACT 0x0
43346 /*
43347  * Enumerated value for register field ALT_USB_HOST_HCINT13_AHBERR
43348  *
43349  * AHB error during AHB read/write
43350  */
43351 #define ALT_USB_HOST_HCINT13_AHBERR_E_ACT 0x1
43352 
43353 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_AHBERR register field. */
43354 #define ALT_USB_HOST_HCINT13_AHBERR_LSB 2
43355 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_AHBERR register field. */
43356 #define ALT_USB_HOST_HCINT13_AHBERR_MSB 2
43357 /* The width in bits of the ALT_USB_HOST_HCINT13_AHBERR register field. */
43358 #define ALT_USB_HOST_HCINT13_AHBERR_WIDTH 1
43359 /* The mask used to set the ALT_USB_HOST_HCINT13_AHBERR register field value. */
43360 #define ALT_USB_HOST_HCINT13_AHBERR_SET_MSK 0x00000004
43361 /* The mask used to clear the ALT_USB_HOST_HCINT13_AHBERR register field value. */
43362 #define ALT_USB_HOST_HCINT13_AHBERR_CLR_MSK 0xfffffffb
43363 /* The reset value of the ALT_USB_HOST_HCINT13_AHBERR register field. */
43364 #define ALT_USB_HOST_HCINT13_AHBERR_RESET 0x0
43365 /* Extracts the ALT_USB_HOST_HCINT13_AHBERR field value from a register. */
43366 #define ALT_USB_HOST_HCINT13_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
43367 /* Produces a ALT_USB_HOST_HCINT13_AHBERR register field value suitable for setting the register. */
43368 #define ALT_USB_HOST_HCINT13_AHBERR_SET(value) (((value) << 2) & 0x00000004)
43369 
43370 /*
43371  * Field : STALL Response Received Interrupt - stall
43372  *
43373  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
43374  * This bit can be set only by the core and the application should write 1 to clear
43375  * it.
43376  *
43377  * Field Enumeration Values:
43378  *
43379  * Enum | Value | Description
43380  * :-----------------------------------|:------|:-------------------
43381  * ALT_USB_HOST_HCINT13_STALL_E_INACT | 0x0 | No Stall Interrupt
43382  * ALT_USB_HOST_HCINT13_STALL_E_ACT | 0x1 | Stall Interrupt
43383  *
43384  * Field Access Macros:
43385  *
43386  */
43387 /*
43388  * Enumerated value for register field ALT_USB_HOST_HCINT13_STALL
43389  *
43390  * No Stall Interrupt
43391  */
43392 #define ALT_USB_HOST_HCINT13_STALL_E_INACT 0x0
43393 /*
43394  * Enumerated value for register field ALT_USB_HOST_HCINT13_STALL
43395  *
43396  * Stall Interrupt
43397  */
43398 #define ALT_USB_HOST_HCINT13_STALL_E_ACT 0x1
43399 
43400 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_STALL register field. */
43401 #define ALT_USB_HOST_HCINT13_STALL_LSB 3
43402 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_STALL register field. */
43403 #define ALT_USB_HOST_HCINT13_STALL_MSB 3
43404 /* The width in bits of the ALT_USB_HOST_HCINT13_STALL register field. */
43405 #define ALT_USB_HOST_HCINT13_STALL_WIDTH 1
43406 /* The mask used to set the ALT_USB_HOST_HCINT13_STALL register field value. */
43407 #define ALT_USB_HOST_HCINT13_STALL_SET_MSK 0x00000008
43408 /* The mask used to clear the ALT_USB_HOST_HCINT13_STALL register field value. */
43409 #define ALT_USB_HOST_HCINT13_STALL_CLR_MSK 0xfffffff7
43410 /* The reset value of the ALT_USB_HOST_HCINT13_STALL register field. */
43411 #define ALT_USB_HOST_HCINT13_STALL_RESET 0x0
43412 /* Extracts the ALT_USB_HOST_HCINT13_STALL field value from a register. */
43413 #define ALT_USB_HOST_HCINT13_STALL_GET(value) (((value) & 0x00000008) >> 3)
43414 /* Produces a ALT_USB_HOST_HCINT13_STALL register field value suitable for setting the register. */
43415 #define ALT_USB_HOST_HCINT13_STALL_SET(value) (((value) << 3) & 0x00000008)
43416 
43417 /*
43418  * Field : NAK Response Received Interrupt - nak
43419  *
43420  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
43421  * core.This bit can be set only by the core and the application should write 1 to
43422  * clear it.
43423  *
43424  * Field Enumeration Values:
43425  *
43426  * Enum | Value | Description
43427  * :---------------------------------|:------|:-----------------------------------
43428  * ALT_USB_HOST_HCINT13_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
43429  * ALT_USB_HOST_HCINT13_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
43430  *
43431  * Field Access Macros:
43432  *
43433  */
43434 /*
43435  * Enumerated value for register field ALT_USB_HOST_HCINT13_NAK
43436  *
43437  * No NAK Response Received Interrupt
43438  */
43439 #define ALT_USB_HOST_HCINT13_NAK_E_INACT 0x0
43440 /*
43441  * Enumerated value for register field ALT_USB_HOST_HCINT13_NAK
43442  *
43443  * NAK Response Received Interrupt
43444  */
43445 #define ALT_USB_HOST_HCINT13_NAK_E_ACT 0x1
43446 
43447 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_NAK register field. */
43448 #define ALT_USB_HOST_HCINT13_NAK_LSB 4
43449 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_NAK register field. */
43450 #define ALT_USB_HOST_HCINT13_NAK_MSB 4
43451 /* The width in bits of the ALT_USB_HOST_HCINT13_NAK register field. */
43452 #define ALT_USB_HOST_HCINT13_NAK_WIDTH 1
43453 /* The mask used to set the ALT_USB_HOST_HCINT13_NAK register field value. */
43454 #define ALT_USB_HOST_HCINT13_NAK_SET_MSK 0x00000010
43455 /* The mask used to clear the ALT_USB_HOST_HCINT13_NAK register field value. */
43456 #define ALT_USB_HOST_HCINT13_NAK_CLR_MSK 0xffffffef
43457 /* The reset value of the ALT_USB_HOST_HCINT13_NAK register field. */
43458 #define ALT_USB_HOST_HCINT13_NAK_RESET 0x0
43459 /* Extracts the ALT_USB_HOST_HCINT13_NAK field value from a register. */
43460 #define ALT_USB_HOST_HCINT13_NAK_GET(value) (((value) & 0x00000010) >> 4)
43461 /* Produces a ALT_USB_HOST_HCINT13_NAK register field value suitable for setting the register. */
43462 #define ALT_USB_HOST_HCINT13_NAK_SET(value) (((value) << 4) & 0x00000010)
43463 
43464 /*
43465  * Field : ACK Response Received Transmitted Interrupt - ack
43466  *
43467  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
43468  * This bit can be set only by the core and the application should write 1 to clear
43469  * it.
43470  *
43471  * Field Enumeration Values:
43472  *
43473  * Enum | Value | Description
43474  * :---------------------------------|:------|:-----------------------------------------------
43475  * ALT_USB_HOST_HCINT13_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
43476  * ALT_USB_HOST_HCINT13_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
43477  *
43478  * Field Access Macros:
43479  *
43480  */
43481 /*
43482  * Enumerated value for register field ALT_USB_HOST_HCINT13_ACK
43483  *
43484  * No ACK Response Received Transmitted Interrupt
43485  */
43486 #define ALT_USB_HOST_HCINT13_ACK_E_INACT 0x0
43487 /*
43488  * Enumerated value for register field ALT_USB_HOST_HCINT13_ACK
43489  *
43490  * ACK Response Received Transmitted Interrup
43491  */
43492 #define ALT_USB_HOST_HCINT13_ACK_E_ACT 0x1
43493 
43494 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_ACK register field. */
43495 #define ALT_USB_HOST_HCINT13_ACK_LSB 5
43496 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_ACK register field. */
43497 #define ALT_USB_HOST_HCINT13_ACK_MSB 5
43498 /* The width in bits of the ALT_USB_HOST_HCINT13_ACK register field. */
43499 #define ALT_USB_HOST_HCINT13_ACK_WIDTH 1
43500 /* The mask used to set the ALT_USB_HOST_HCINT13_ACK register field value. */
43501 #define ALT_USB_HOST_HCINT13_ACK_SET_MSK 0x00000020
43502 /* The mask used to clear the ALT_USB_HOST_HCINT13_ACK register field value. */
43503 #define ALT_USB_HOST_HCINT13_ACK_CLR_MSK 0xffffffdf
43504 /* The reset value of the ALT_USB_HOST_HCINT13_ACK register field. */
43505 #define ALT_USB_HOST_HCINT13_ACK_RESET 0x0
43506 /* Extracts the ALT_USB_HOST_HCINT13_ACK field value from a register. */
43507 #define ALT_USB_HOST_HCINT13_ACK_GET(value) (((value) & 0x00000020) >> 5)
43508 /* Produces a ALT_USB_HOST_HCINT13_ACK register field value suitable for setting the register. */
43509 #define ALT_USB_HOST_HCINT13_ACK_SET(value) (((value) << 5) & 0x00000020)
43510 
43511 /*
43512  * Field : NYET Response Received Interrupt - nyet
43513  *
43514  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
43515  * core.This bit can be set only by the core and the application should write 1 to
43516  * clear it.
43517  *
43518  * Field Enumeration Values:
43519  *
43520  * Enum | Value | Description
43521  * :----------------------------------|:------|:------------------------------------
43522  * ALT_USB_HOST_HCINT13_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
43523  * ALT_USB_HOST_HCINT13_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
43524  *
43525  * Field Access Macros:
43526  *
43527  */
43528 /*
43529  * Enumerated value for register field ALT_USB_HOST_HCINT13_NYET
43530  *
43531  * No NYET Response Received Interrupt
43532  */
43533 #define ALT_USB_HOST_HCINT13_NYET_E_INACT 0x0
43534 /*
43535  * Enumerated value for register field ALT_USB_HOST_HCINT13_NYET
43536  *
43537  * NYET Response Received Interrupt
43538  */
43539 #define ALT_USB_HOST_HCINT13_NYET_E_ACT 0x1
43540 
43541 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_NYET register field. */
43542 #define ALT_USB_HOST_HCINT13_NYET_LSB 6
43543 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_NYET register field. */
43544 #define ALT_USB_HOST_HCINT13_NYET_MSB 6
43545 /* The width in bits of the ALT_USB_HOST_HCINT13_NYET register field. */
43546 #define ALT_USB_HOST_HCINT13_NYET_WIDTH 1
43547 /* The mask used to set the ALT_USB_HOST_HCINT13_NYET register field value. */
43548 #define ALT_USB_HOST_HCINT13_NYET_SET_MSK 0x00000040
43549 /* The mask used to clear the ALT_USB_HOST_HCINT13_NYET register field value. */
43550 #define ALT_USB_HOST_HCINT13_NYET_CLR_MSK 0xffffffbf
43551 /* The reset value of the ALT_USB_HOST_HCINT13_NYET register field. */
43552 #define ALT_USB_HOST_HCINT13_NYET_RESET 0x0
43553 /* Extracts the ALT_USB_HOST_HCINT13_NYET field value from a register. */
43554 #define ALT_USB_HOST_HCINT13_NYET_GET(value) (((value) & 0x00000040) >> 6)
43555 /* Produces a ALT_USB_HOST_HCINT13_NYET register field value suitable for setting the register. */
43556 #define ALT_USB_HOST_HCINT13_NYET_SET(value) (((value) << 6) & 0x00000040)
43557 
43558 /*
43559  * Field : Transaction Error - xacterr
43560  *
43561  * Indicates one of the following errors occurred on the USB.-CRC check failure
43562  *
43563  * * Timeout
43564  *
43565  * * Bit stuff error
43566  *
43567  * * False EOP
43568  *
43569  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
43570  * This bit can be set only by the core and the application should write 1 to clear
43571  * it.
43572  *
43573  * Field Enumeration Values:
43574  *
43575  * Enum | Value | Description
43576  * :-------------------------------------|:------|:---------------------
43577  * ALT_USB_HOST_HCINT13_XACTERR_E_INACT | 0x0 | No Transaction Error
43578  * ALT_USB_HOST_HCINT13_XACTERR_E_ACT | 0x1 | Transaction Error
43579  *
43580  * Field Access Macros:
43581  *
43582  */
43583 /*
43584  * Enumerated value for register field ALT_USB_HOST_HCINT13_XACTERR
43585  *
43586  * No Transaction Error
43587  */
43588 #define ALT_USB_HOST_HCINT13_XACTERR_E_INACT 0x0
43589 /*
43590  * Enumerated value for register field ALT_USB_HOST_HCINT13_XACTERR
43591  *
43592  * Transaction Error
43593  */
43594 #define ALT_USB_HOST_HCINT13_XACTERR_E_ACT 0x1
43595 
43596 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_XACTERR register field. */
43597 #define ALT_USB_HOST_HCINT13_XACTERR_LSB 7
43598 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_XACTERR register field. */
43599 #define ALT_USB_HOST_HCINT13_XACTERR_MSB 7
43600 /* The width in bits of the ALT_USB_HOST_HCINT13_XACTERR register field. */
43601 #define ALT_USB_HOST_HCINT13_XACTERR_WIDTH 1
43602 /* The mask used to set the ALT_USB_HOST_HCINT13_XACTERR register field value. */
43603 #define ALT_USB_HOST_HCINT13_XACTERR_SET_MSK 0x00000080
43604 /* The mask used to clear the ALT_USB_HOST_HCINT13_XACTERR register field value. */
43605 #define ALT_USB_HOST_HCINT13_XACTERR_CLR_MSK 0xffffff7f
43606 /* The reset value of the ALT_USB_HOST_HCINT13_XACTERR register field. */
43607 #define ALT_USB_HOST_HCINT13_XACTERR_RESET 0x0
43608 /* Extracts the ALT_USB_HOST_HCINT13_XACTERR field value from a register. */
43609 #define ALT_USB_HOST_HCINT13_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
43610 /* Produces a ALT_USB_HOST_HCINT13_XACTERR register field value suitable for setting the register. */
43611 #define ALT_USB_HOST_HCINT13_XACTERR_SET(value) (((value) << 7) & 0x00000080)
43612 
43613 /*
43614  * Field : Babble Error - bblerr
43615  *
43616  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
43617  * core..This bit can be set only by the core and the application should write 1 to
43618  * clear it.
43619  *
43620  * Field Enumeration Values:
43621  *
43622  * Enum | Value | Description
43623  * :------------------------------------|:------|:----------------
43624  * ALT_USB_HOST_HCINT13_BBLERR_E_INACT | 0x0 | No Babble Error
43625  * ALT_USB_HOST_HCINT13_BBLERR_E_ACT | 0x1 | Babble Error
43626  *
43627  * Field Access Macros:
43628  *
43629  */
43630 /*
43631  * Enumerated value for register field ALT_USB_HOST_HCINT13_BBLERR
43632  *
43633  * No Babble Error
43634  */
43635 #define ALT_USB_HOST_HCINT13_BBLERR_E_INACT 0x0
43636 /*
43637  * Enumerated value for register field ALT_USB_HOST_HCINT13_BBLERR
43638  *
43639  * Babble Error
43640  */
43641 #define ALT_USB_HOST_HCINT13_BBLERR_E_ACT 0x1
43642 
43643 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_BBLERR register field. */
43644 #define ALT_USB_HOST_HCINT13_BBLERR_LSB 8
43645 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_BBLERR register field. */
43646 #define ALT_USB_HOST_HCINT13_BBLERR_MSB 8
43647 /* The width in bits of the ALT_USB_HOST_HCINT13_BBLERR register field. */
43648 #define ALT_USB_HOST_HCINT13_BBLERR_WIDTH 1
43649 /* The mask used to set the ALT_USB_HOST_HCINT13_BBLERR register field value. */
43650 #define ALT_USB_HOST_HCINT13_BBLERR_SET_MSK 0x00000100
43651 /* The mask used to clear the ALT_USB_HOST_HCINT13_BBLERR register field value. */
43652 #define ALT_USB_HOST_HCINT13_BBLERR_CLR_MSK 0xfffffeff
43653 /* The reset value of the ALT_USB_HOST_HCINT13_BBLERR register field. */
43654 #define ALT_USB_HOST_HCINT13_BBLERR_RESET 0x0
43655 /* Extracts the ALT_USB_HOST_HCINT13_BBLERR field value from a register. */
43656 #define ALT_USB_HOST_HCINT13_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
43657 /* Produces a ALT_USB_HOST_HCINT13_BBLERR register field value suitable for setting the register. */
43658 #define ALT_USB_HOST_HCINT13_BBLERR_SET(value) (((value) << 8) & 0x00000100)
43659 
43660 /*
43661  * Field : Frame Overrun - frmovrun
43662  *
43663  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
43664  * This bit can be set only by the core and the application should write 1 to clear
43665  * it.
43666  *
43667  * Field Enumeration Values:
43668  *
43669  * Enum | Value | Description
43670  * :--------------------------------------|:------|:-----------------
43671  * ALT_USB_HOST_HCINT13_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
43672  * ALT_USB_HOST_HCINT13_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
43673  *
43674  * Field Access Macros:
43675  *
43676  */
43677 /*
43678  * Enumerated value for register field ALT_USB_HOST_HCINT13_FRMOVRUN
43679  *
43680  * No Frame Overrun
43681  */
43682 #define ALT_USB_HOST_HCINT13_FRMOVRUN_E_INACT 0x0
43683 /*
43684  * Enumerated value for register field ALT_USB_HOST_HCINT13_FRMOVRUN
43685  *
43686  * Frame Overrun
43687  */
43688 #define ALT_USB_HOST_HCINT13_FRMOVRUN_E_ACT 0x1
43689 
43690 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_FRMOVRUN register field. */
43691 #define ALT_USB_HOST_HCINT13_FRMOVRUN_LSB 9
43692 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_FRMOVRUN register field. */
43693 #define ALT_USB_HOST_HCINT13_FRMOVRUN_MSB 9
43694 /* The width in bits of the ALT_USB_HOST_HCINT13_FRMOVRUN register field. */
43695 #define ALT_USB_HOST_HCINT13_FRMOVRUN_WIDTH 1
43696 /* The mask used to set the ALT_USB_HOST_HCINT13_FRMOVRUN register field value. */
43697 #define ALT_USB_HOST_HCINT13_FRMOVRUN_SET_MSK 0x00000200
43698 /* The mask used to clear the ALT_USB_HOST_HCINT13_FRMOVRUN register field value. */
43699 #define ALT_USB_HOST_HCINT13_FRMOVRUN_CLR_MSK 0xfffffdff
43700 /* The reset value of the ALT_USB_HOST_HCINT13_FRMOVRUN register field. */
43701 #define ALT_USB_HOST_HCINT13_FRMOVRUN_RESET 0x0
43702 /* Extracts the ALT_USB_HOST_HCINT13_FRMOVRUN field value from a register. */
43703 #define ALT_USB_HOST_HCINT13_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
43704 /* Produces a ALT_USB_HOST_HCINT13_FRMOVRUN register field value suitable for setting the register. */
43705 #define ALT_USB_HOST_HCINT13_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
43706 
43707 /*
43708  * Field : Data Toggle Error - datatglerr
43709  *
43710  * This bit can be set only by the core and the application should write 1 to clear
43711  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
43712  * core.
43713  *
43714  * Field Enumeration Values:
43715  *
43716  * Enum | Value | Description
43717  * :----------------------------------------|:------|:---------------------
43718  * ALT_USB_HOST_HCINT13_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
43719  * ALT_USB_HOST_HCINT13_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
43720  *
43721  * Field Access Macros:
43722  *
43723  */
43724 /*
43725  * Enumerated value for register field ALT_USB_HOST_HCINT13_DATATGLERR
43726  *
43727  * No Data Toggle Error
43728  */
43729 #define ALT_USB_HOST_HCINT13_DATATGLERR_E_INACT 0x0
43730 /*
43731  * Enumerated value for register field ALT_USB_HOST_HCINT13_DATATGLERR
43732  *
43733  * Data Toggle Error
43734  */
43735 #define ALT_USB_HOST_HCINT13_DATATGLERR_E_ACT 0x1
43736 
43737 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_DATATGLERR register field. */
43738 #define ALT_USB_HOST_HCINT13_DATATGLERR_LSB 10
43739 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_DATATGLERR register field. */
43740 #define ALT_USB_HOST_HCINT13_DATATGLERR_MSB 10
43741 /* The width in bits of the ALT_USB_HOST_HCINT13_DATATGLERR register field. */
43742 #define ALT_USB_HOST_HCINT13_DATATGLERR_WIDTH 1
43743 /* The mask used to set the ALT_USB_HOST_HCINT13_DATATGLERR register field value. */
43744 #define ALT_USB_HOST_HCINT13_DATATGLERR_SET_MSK 0x00000400
43745 /* The mask used to clear the ALT_USB_HOST_HCINT13_DATATGLERR register field value. */
43746 #define ALT_USB_HOST_HCINT13_DATATGLERR_CLR_MSK 0xfffffbff
43747 /* The reset value of the ALT_USB_HOST_HCINT13_DATATGLERR register field. */
43748 #define ALT_USB_HOST_HCINT13_DATATGLERR_RESET 0x0
43749 /* Extracts the ALT_USB_HOST_HCINT13_DATATGLERR field value from a register. */
43750 #define ALT_USB_HOST_HCINT13_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
43751 /* Produces a ALT_USB_HOST_HCINT13_DATATGLERR register field value suitable for setting the register. */
43752 #define ALT_USB_HOST_HCINT13_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
43753 
43754 /*
43755  * Field : BNA Interrupt - bnaintr
43756  *
43757  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
43758  * generates this interrupt when the descriptor accessed is not ready for the Core
43759  * to process. BNA will not be generated for Isochronous channels. for non
43760  * Scatter/Gather DMA mode, this bit is reserved.
43761  *
43762  * Field Enumeration Values:
43763  *
43764  * Enum | Value | Description
43765  * :-------------------------------------|:------|:-----------------
43766  * ALT_USB_HOST_HCINT13_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
43767  * ALT_USB_HOST_HCINT13_BNAINTR_E_ACT | 0x1 | BNA Interrupt
43768  *
43769  * Field Access Macros:
43770  *
43771  */
43772 /*
43773  * Enumerated value for register field ALT_USB_HOST_HCINT13_BNAINTR
43774  *
43775  * No BNA Interrupt
43776  */
43777 #define ALT_USB_HOST_HCINT13_BNAINTR_E_INACT 0x0
43778 /*
43779  * Enumerated value for register field ALT_USB_HOST_HCINT13_BNAINTR
43780  *
43781  * BNA Interrupt
43782  */
43783 #define ALT_USB_HOST_HCINT13_BNAINTR_E_ACT 0x1
43784 
43785 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_BNAINTR register field. */
43786 #define ALT_USB_HOST_HCINT13_BNAINTR_LSB 11
43787 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_BNAINTR register field. */
43788 #define ALT_USB_HOST_HCINT13_BNAINTR_MSB 11
43789 /* The width in bits of the ALT_USB_HOST_HCINT13_BNAINTR register field. */
43790 #define ALT_USB_HOST_HCINT13_BNAINTR_WIDTH 1
43791 /* The mask used to set the ALT_USB_HOST_HCINT13_BNAINTR register field value. */
43792 #define ALT_USB_HOST_HCINT13_BNAINTR_SET_MSK 0x00000800
43793 /* The mask used to clear the ALT_USB_HOST_HCINT13_BNAINTR register field value. */
43794 #define ALT_USB_HOST_HCINT13_BNAINTR_CLR_MSK 0xfffff7ff
43795 /* The reset value of the ALT_USB_HOST_HCINT13_BNAINTR register field. */
43796 #define ALT_USB_HOST_HCINT13_BNAINTR_RESET 0x0
43797 /* Extracts the ALT_USB_HOST_HCINT13_BNAINTR field value from a register. */
43798 #define ALT_USB_HOST_HCINT13_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
43799 /* Produces a ALT_USB_HOST_HCINT13_BNAINTR register field value suitable for setting the register. */
43800 #define ALT_USB_HOST_HCINT13_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
43801 
43802 /*
43803  * Field : Excessive Transaction Error - xcs_xact_err
43804  *
43805  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
43806  * this bit when 3 consecutive transaction errors occurred on the USB bus.
43807  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
43808  * Scatter/Gather DMA mode, this bit is reserved.
43809  *
43810  * Field Enumeration Values:
43811  *
43812  * Enum | Value | Description
43813  * :--------------------------------------------|:------|:-------------------------------
43814  * ALT_USB_HOST_HCINT13_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
43815  * ALT_USB_HOST_HCINT13_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
43816  *
43817  * Field Access Macros:
43818  *
43819  */
43820 /*
43821  * Enumerated value for register field ALT_USB_HOST_HCINT13_XCS_XACT_ERR
43822  *
43823  * No Excessive Transaction Error
43824  */
43825 #define ALT_USB_HOST_HCINT13_XCS_XACT_ERR_E_INACT 0x0
43826 /*
43827  * Enumerated value for register field ALT_USB_HOST_HCINT13_XCS_XACT_ERR
43828  *
43829  * Excessive Transaction Error
43830  */
43831 #define ALT_USB_HOST_HCINT13_XCS_XACT_ERR_E_ACVTIVE 0x1
43832 
43833 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_XCS_XACT_ERR register field. */
43834 #define ALT_USB_HOST_HCINT13_XCS_XACT_ERR_LSB 12
43835 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_XCS_XACT_ERR register field. */
43836 #define ALT_USB_HOST_HCINT13_XCS_XACT_ERR_MSB 12
43837 /* The width in bits of the ALT_USB_HOST_HCINT13_XCS_XACT_ERR register field. */
43838 #define ALT_USB_HOST_HCINT13_XCS_XACT_ERR_WIDTH 1
43839 /* The mask used to set the ALT_USB_HOST_HCINT13_XCS_XACT_ERR register field value. */
43840 #define ALT_USB_HOST_HCINT13_XCS_XACT_ERR_SET_MSK 0x00001000
43841 /* The mask used to clear the ALT_USB_HOST_HCINT13_XCS_XACT_ERR register field value. */
43842 #define ALT_USB_HOST_HCINT13_XCS_XACT_ERR_CLR_MSK 0xffffefff
43843 /* The reset value of the ALT_USB_HOST_HCINT13_XCS_XACT_ERR register field. */
43844 #define ALT_USB_HOST_HCINT13_XCS_XACT_ERR_RESET 0x0
43845 /* Extracts the ALT_USB_HOST_HCINT13_XCS_XACT_ERR field value from a register. */
43846 #define ALT_USB_HOST_HCINT13_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
43847 /* Produces a ALT_USB_HOST_HCINT13_XCS_XACT_ERR register field value suitable for setting the register. */
43848 #define ALT_USB_HOST_HCINT13_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
43849 
43850 /*
43851  * Field : Descriptor rollover interrupt - desc_lst_rollintr
43852  *
43853  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
43854  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
43855  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
43856  * mode, this bit is reserved.
43857  *
43858  * Field Enumeration Values:
43859  *
43860  * Enum | Value | Description
43861  * :-----------------------------------------------|:------|:---------------------------------
43862  * ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
43863  * ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
43864  *
43865  * Field Access Macros:
43866  *
43867  */
43868 /*
43869  * Enumerated value for register field ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR
43870  *
43871  * No Descriptor rollover interrupt
43872  */
43873 #define ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR_E_INACT 0x0
43874 /*
43875  * Enumerated value for register field ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR
43876  *
43877  * Descriptor rollover interrupt
43878  */
43879 #define ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR_E_ACT 0x1
43880 
43881 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR register field. */
43882 #define ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR_LSB 13
43883 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR register field. */
43884 #define ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR_MSB 13
43885 /* The width in bits of the ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR register field. */
43886 #define ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR_WIDTH 1
43887 /* The mask used to set the ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR register field value. */
43888 #define ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR_SET_MSK 0x00002000
43889 /* The mask used to clear the ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR register field value. */
43890 #define ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
43891 /* The reset value of the ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR register field. */
43892 #define ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR_RESET 0x0
43893 /* Extracts the ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR field value from a register. */
43894 #define ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
43895 /* Produces a ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR register field value suitable for setting the register. */
43896 #define ALT_USB_HOST_HCINT13_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
43897 
43898 #ifndef __ASSEMBLY__
43899 /*
43900  * WARNING: The C register and register group struct declarations are provided for
43901  * convenience and illustrative purposes. They should, however, be used with
43902  * caution as the C language standard provides no guarantees about the alignment or
43903  * atomicity of device memory accesses. The recommended practice for writing
43904  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
43905  * alt_write_word() functions.
43906  *
43907  * The struct declaration for register ALT_USB_HOST_HCINT13.
43908  */
43909 struct ALT_USB_HOST_HCINT13_s
43910 {
43911  const uint32_t xfercompl : 1; /* Transfer Completed */
43912  const uint32_t chhltd : 1; /* Channel Halted */
43913  const uint32_t ahberr : 1; /* AHB Error */
43914  const uint32_t stall : 1; /* STALL Response Received Interrupt */
43915  const uint32_t nak : 1; /* NAK Response Received Interrupt */
43916  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
43917  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
43918  const uint32_t xacterr : 1; /* Transaction Error */
43919  const uint32_t bblerr : 1; /* Babble Error */
43920  const uint32_t frmovrun : 1; /* Frame Overrun */
43921  const uint32_t datatglerr : 1; /* Data Toggle Error */
43922  const uint32_t bnaintr : 1; /* BNA Interrupt */
43923  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
43924  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
43925  uint32_t : 18; /* *UNDEFINED* */
43926 };
43927 
43928 /* The typedef declaration for register ALT_USB_HOST_HCINT13. */
43929 typedef volatile struct ALT_USB_HOST_HCINT13_s ALT_USB_HOST_HCINT13_t;
43930 #endif /* __ASSEMBLY__ */
43931 
43932 /* The byte offset of the ALT_USB_HOST_HCINT13 register from the beginning of the component. */
43933 #define ALT_USB_HOST_HCINT13_OFST 0x2a8
43934 /* The address of the ALT_USB_HOST_HCINT13 register. */
43935 #define ALT_USB_HOST_HCINT13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT13_OFST))
43936 
43937 /*
43938  * Register : Host Channel 13 Interrupt Mask Registe - hcintmsk13
43939  *
43940  * This register reflects the mask for each channel status described in the
43941  * previous section.
43942  *
43943  * Register Layout
43944  *
43945  * Bits | Access | Reset | Description
43946  * :--------|:-------|:------|:----------------------------------
43947  * [0] | RW | 0x0 | Transfer Completed Mask
43948  * [1] | RW | 0x0 | Channel Halted Mask
43949  * [2] | RW | 0x0 | AHB Error Mask
43950  * [10:3] | ??? | 0x0 | *UNDEFINED*
43951  * [11] | RW | 0x0 | BNA Interrupt mask
43952  * [12] | ??? | 0x0 | *UNDEFINED*
43953  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
43954  * [31:14] | ??? | 0x0 | *UNDEFINED*
43955  *
43956  */
43957 /*
43958  * Field : Transfer Completed Mask - xfercomplmsk
43959  *
43960  * Transfer complete.
43961  *
43962  * Field Enumeration Values:
43963  *
43964  * Enum | Value | Description
43965  * :---------------------------------------------|:------|:------------
43966  * ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK_E_MSK | 0x0 | Mask
43967  * ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
43968  *
43969  * Field Access Macros:
43970  *
43971  */
43972 /*
43973  * Enumerated value for register field ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK
43974  *
43975  * Mask
43976  */
43977 #define ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK_E_MSK 0x0
43978 /*
43979  * Enumerated value for register field ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK
43980  *
43981  * No mask
43982  */
43983 #define ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK_E_NOMSK 0x1
43984 
43985 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK register field. */
43986 #define ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK_LSB 0
43987 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK register field. */
43988 #define ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK_MSB 0
43989 /* The width in bits of the ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK register field. */
43990 #define ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK_WIDTH 1
43991 /* The mask used to set the ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK register field value. */
43992 #define ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK_SET_MSK 0x00000001
43993 /* The mask used to clear the ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK register field value. */
43994 #define ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK_CLR_MSK 0xfffffffe
43995 /* The reset value of the ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK register field. */
43996 #define ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK_RESET 0x0
43997 /* Extracts the ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK field value from a register. */
43998 #define ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
43999 /* Produces a ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK register field value suitable for setting the register. */
44000 #define ALT_USB_HOST_HCINTMSK13_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
44001 
44002 /*
44003  * Field : Channel Halted Mask - chhltdmsk
44004  *
44005  * Channel Halted.
44006  *
44007  * Field Enumeration Values:
44008  *
44009  * Enum | Value | Description
44010  * :------------------------------------------|:------|:------------
44011  * ALT_USB_HOST_HCINTMSK13_CHHLTDMSK_E_MSK | 0x0 | Mask
44012  * ALT_USB_HOST_HCINTMSK13_CHHLTDMSK_E_NOMSK | 0x1 | No mask
44013  *
44014  * Field Access Macros:
44015  *
44016  */
44017 /*
44018  * Enumerated value for register field ALT_USB_HOST_HCINTMSK13_CHHLTDMSK
44019  *
44020  * Mask
44021  */
44022 #define ALT_USB_HOST_HCINTMSK13_CHHLTDMSK_E_MSK 0x0
44023 /*
44024  * Enumerated value for register field ALT_USB_HOST_HCINTMSK13_CHHLTDMSK
44025  *
44026  * No mask
44027  */
44028 #define ALT_USB_HOST_HCINTMSK13_CHHLTDMSK_E_NOMSK 0x1
44029 
44030 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK13_CHHLTDMSK register field. */
44031 #define ALT_USB_HOST_HCINTMSK13_CHHLTDMSK_LSB 1
44032 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK13_CHHLTDMSK register field. */
44033 #define ALT_USB_HOST_HCINTMSK13_CHHLTDMSK_MSB 1
44034 /* The width in bits of the ALT_USB_HOST_HCINTMSK13_CHHLTDMSK register field. */
44035 #define ALT_USB_HOST_HCINTMSK13_CHHLTDMSK_WIDTH 1
44036 /* The mask used to set the ALT_USB_HOST_HCINTMSK13_CHHLTDMSK register field value. */
44037 #define ALT_USB_HOST_HCINTMSK13_CHHLTDMSK_SET_MSK 0x00000002
44038 /* The mask used to clear the ALT_USB_HOST_HCINTMSK13_CHHLTDMSK register field value. */
44039 #define ALT_USB_HOST_HCINTMSK13_CHHLTDMSK_CLR_MSK 0xfffffffd
44040 /* The reset value of the ALT_USB_HOST_HCINTMSK13_CHHLTDMSK register field. */
44041 #define ALT_USB_HOST_HCINTMSK13_CHHLTDMSK_RESET 0x0
44042 /* Extracts the ALT_USB_HOST_HCINTMSK13_CHHLTDMSK field value from a register. */
44043 #define ALT_USB_HOST_HCINTMSK13_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
44044 /* Produces a ALT_USB_HOST_HCINTMSK13_CHHLTDMSK register field value suitable for setting the register. */
44045 #define ALT_USB_HOST_HCINTMSK13_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
44046 
44047 /*
44048  * Field : AHB Error Mask - ahberrmsk
44049  *
44050  * In scatter/gather DMA mode for host, interrupts will not be generated due to
44051  * the corresponding bits set in HCINTn.
44052  *
44053  * Field Enumeration Values:
44054  *
44055  * Enum | Value | Description
44056  * :------------------------------------------|:------|:------------
44057  * ALT_USB_HOST_HCINTMSK13_AHBERRMSK_E_MSK | 0x0 | Mask
44058  * ALT_USB_HOST_HCINTMSK13_AHBERRMSK_E_NOMSK | 0x1 | No mask
44059  *
44060  * Field Access Macros:
44061  *
44062  */
44063 /*
44064  * Enumerated value for register field ALT_USB_HOST_HCINTMSK13_AHBERRMSK
44065  *
44066  * Mask
44067  */
44068 #define ALT_USB_HOST_HCINTMSK13_AHBERRMSK_E_MSK 0x0
44069 /*
44070  * Enumerated value for register field ALT_USB_HOST_HCINTMSK13_AHBERRMSK
44071  *
44072  * No mask
44073  */
44074 #define ALT_USB_HOST_HCINTMSK13_AHBERRMSK_E_NOMSK 0x1
44075 
44076 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK13_AHBERRMSK register field. */
44077 #define ALT_USB_HOST_HCINTMSK13_AHBERRMSK_LSB 2
44078 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK13_AHBERRMSK register field. */
44079 #define ALT_USB_HOST_HCINTMSK13_AHBERRMSK_MSB 2
44080 /* The width in bits of the ALT_USB_HOST_HCINTMSK13_AHBERRMSK register field. */
44081 #define ALT_USB_HOST_HCINTMSK13_AHBERRMSK_WIDTH 1
44082 /* The mask used to set the ALT_USB_HOST_HCINTMSK13_AHBERRMSK register field value. */
44083 #define ALT_USB_HOST_HCINTMSK13_AHBERRMSK_SET_MSK 0x00000004
44084 /* The mask used to clear the ALT_USB_HOST_HCINTMSK13_AHBERRMSK register field value. */
44085 #define ALT_USB_HOST_HCINTMSK13_AHBERRMSK_CLR_MSK 0xfffffffb
44086 /* The reset value of the ALT_USB_HOST_HCINTMSK13_AHBERRMSK register field. */
44087 #define ALT_USB_HOST_HCINTMSK13_AHBERRMSK_RESET 0x0
44088 /* Extracts the ALT_USB_HOST_HCINTMSK13_AHBERRMSK field value from a register. */
44089 #define ALT_USB_HOST_HCINTMSK13_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
44090 /* Produces a ALT_USB_HOST_HCINTMSK13_AHBERRMSK register field value suitable for setting the register. */
44091 #define ALT_USB_HOST_HCINTMSK13_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
44092 
44093 /*
44094  * Field : BNA Interrupt mask - bnaintrmsk
44095  *
44096  * This bit is valid only when Scatter/Gather DMA mode is enabled.
44097  *
44098  * Field Enumeration Values:
44099  *
44100  * Enum | Value | Description
44101  * :-------------------------------------------|:------|:------------
44102  * ALT_USB_HOST_HCINTMSK13_BNAINTRMSK_E_MSK | 0x0 | Mask
44103  * ALT_USB_HOST_HCINTMSK13_BNAINTRMSK_E_NOMSK | 0x1 | No mask
44104  *
44105  * Field Access Macros:
44106  *
44107  */
44108 /*
44109  * Enumerated value for register field ALT_USB_HOST_HCINTMSK13_BNAINTRMSK
44110  *
44111  * Mask
44112  */
44113 #define ALT_USB_HOST_HCINTMSK13_BNAINTRMSK_E_MSK 0x0
44114 /*
44115  * Enumerated value for register field ALT_USB_HOST_HCINTMSK13_BNAINTRMSK
44116  *
44117  * No mask
44118  */
44119 #define ALT_USB_HOST_HCINTMSK13_BNAINTRMSK_E_NOMSK 0x1
44120 
44121 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK13_BNAINTRMSK register field. */
44122 #define ALT_USB_HOST_HCINTMSK13_BNAINTRMSK_LSB 11
44123 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK13_BNAINTRMSK register field. */
44124 #define ALT_USB_HOST_HCINTMSK13_BNAINTRMSK_MSB 11
44125 /* The width in bits of the ALT_USB_HOST_HCINTMSK13_BNAINTRMSK register field. */
44126 #define ALT_USB_HOST_HCINTMSK13_BNAINTRMSK_WIDTH 1
44127 /* The mask used to set the ALT_USB_HOST_HCINTMSK13_BNAINTRMSK register field value. */
44128 #define ALT_USB_HOST_HCINTMSK13_BNAINTRMSK_SET_MSK 0x00000800
44129 /* The mask used to clear the ALT_USB_HOST_HCINTMSK13_BNAINTRMSK register field value. */
44130 #define ALT_USB_HOST_HCINTMSK13_BNAINTRMSK_CLR_MSK 0xfffff7ff
44131 /* The reset value of the ALT_USB_HOST_HCINTMSK13_BNAINTRMSK register field. */
44132 #define ALT_USB_HOST_HCINTMSK13_BNAINTRMSK_RESET 0x0
44133 /* Extracts the ALT_USB_HOST_HCINTMSK13_BNAINTRMSK field value from a register. */
44134 #define ALT_USB_HOST_HCINTMSK13_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
44135 /* Produces a ALT_USB_HOST_HCINTMSK13_BNAINTRMSK register field value suitable for setting the register. */
44136 #define ALT_USB_HOST_HCINTMSK13_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
44137 
44138 /*
44139  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
44140  *
44141  * This bit is valid only when Scatter/Gather DMA mode is enabled.
44142  *
44143  * Field Enumeration Values:
44144  *
44145  * Enum | Value | Description
44146  * :----------------------------------------------------|:------|:------------
44147  * ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
44148  * ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
44149  *
44150  * Field Access Macros:
44151  *
44152  */
44153 /*
44154  * Enumerated value for register field ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK
44155  *
44156  * Mask
44157  */
44158 #define ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK_E_MSK 0x0
44159 /*
44160  * Enumerated value for register field ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK
44161  *
44162  * No mask
44163  */
44164 #define ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
44165 
44166 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK register field. */
44167 #define ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK_LSB 13
44168 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK register field. */
44169 #define ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK_MSB 13
44170 /* The width in bits of the ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK register field. */
44171 #define ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK_WIDTH 1
44172 /* The mask used to set the ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK register field value. */
44173 #define ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
44174 /* The mask used to clear the ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK register field value. */
44175 #define ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
44176 /* The reset value of the ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK register field. */
44177 #define ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK_RESET 0x0
44178 /* Extracts the ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK field value from a register. */
44179 #define ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
44180 /* Produces a ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
44181 #define ALT_USB_HOST_HCINTMSK13_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
44182 
44183 #ifndef __ASSEMBLY__
44184 /*
44185  * WARNING: The C register and register group struct declarations are provided for
44186  * convenience and illustrative purposes. They should, however, be used with
44187  * caution as the C language standard provides no guarantees about the alignment or
44188  * atomicity of device memory accesses. The recommended practice for writing
44189  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
44190  * alt_write_word() functions.
44191  *
44192  * The struct declaration for register ALT_USB_HOST_HCINTMSK13.
44193  */
44194 struct ALT_USB_HOST_HCINTMSK13_s
44195 {
44196  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
44197  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
44198  uint32_t ahberrmsk : 1; /* AHB Error Mask */
44199  uint32_t : 8; /* *UNDEFINED* */
44200  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
44201  uint32_t : 1; /* *UNDEFINED* */
44202  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
44203  uint32_t : 18; /* *UNDEFINED* */
44204 };
44205 
44206 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK13. */
44207 typedef volatile struct ALT_USB_HOST_HCINTMSK13_s ALT_USB_HOST_HCINTMSK13_t;
44208 #endif /* __ASSEMBLY__ */
44209 
44210 /* The byte offset of the ALT_USB_HOST_HCINTMSK13 register from the beginning of the component. */
44211 #define ALT_USB_HOST_HCINTMSK13_OFST 0x2ac
44212 /* The address of the ALT_USB_HOST_HCINTMSK13 register. */
44213 #define ALT_USB_HOST_HCINTMSK13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK13_OFST))
44214 
44215 /*
44216  * Register : Host Channel 13 Transfer Size Register - hctsiz13
44217  *
44218  * Buffer DMA Mode
44219  *
44220  * Register Layout
44221  *
44222  * Bits | Access | Reset | Description
44223  * :--------|:-------|:------|:--------------
44224  * [18:0] | RW | 0x0 | Transfer Size
44225  * [28:19] | RW | 0x0 | Packet Count
44226  * [30:29] | RW | 0x0 | PID
44227  * [31] | RW | 0x0 | Do Ping
44228  *
44229  */
44230 /*
44231  * Field : Transfer Size - xfersize
44232  *
44233  * for an OUT, this field is the number of data bytes the host sends during the
44234  * transfer. for an IN, this field is the buffer size that the application has
44235  * Reserved for the transfer. The application is expected to program this field as
44236  * an integer multiple of the maximum packet size for IN transactions (periodic and
44237  * non-periodic).The width of this counter is specified as 19 bits.
44238  *
44239  * Field Access Macros:
44240  *
44241  */
44242 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ13_XFERSIZE register field. */
44243 #define ALT_USB_HOST_HCTSIZ13_XFERSIZE_LSB 0
44244 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ13_XFERSIZE register field. */
44245 #define ALT_USB_HOST_HCTSIZ13_XFERSIZE_MSB 18
44246 /* The width in bits of the ALT_USB_HOST_HCTSIZ13_XFERSIZE register field. */
44247 #define ALT_USB_HOST_HCTSIZ13_XFERSIZE_WIDTH 19
44248 /* The mask used to set the ALT_USB_HOST_HCTSIZ13_XFERSIZE register field value. */
44249 #define ALT_USB_HOST_HCTSIZ13_XFERSIZE_SET_MSK 0x0007ffff
44250 /* The mask used to clear the ALT_USB_HOST_HCTSIZ13_XFERSIZE register field value. */
44251 #define ALT_USB_HOST_HCTSIZ13_XFERSIZE_CLR_MSK 0xfff80000
44252 /* The reset value of the ALT_USB_HOST_HCTSIZ13_XFERSIZE register field. */
44253 #define ALT_USB_HOST_HCTSIZ13_XFERSIZE_RESET 0x0
44254 /* Extracts the ALT_USB_HOST_HCTSIZ13_XFERSIZE field value from a register. */
44255 #define ALT_USB_HOST_HCTSIZ13_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
44256 /* Produces a ALT_USB_HOST_HCTSIZ13_XFERSIZE register field value suitable for setting the register. */
44257 #define ALT_USB_HOST_HCTSIZ13_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
44258 
44259 /*
44260  * Field : Packet Count - pktcnt
44261  *
44262  * This field is programmed by the application with the expected number of packets
44263  * to be transmitted (OUT) or received (IN). The host decrements this count on
44264  * every successful transmission or reception of an OUT/IN packet. Once this count
44265  * reaches zero, the application is interrupted to indicate normal completion. The
44266  * width of this counter is specified as 10 bits.
44267  *
44268  * Field Access Macros:
44269  *
44270  */
44271 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ13_PKTCNT register field. */
44272 #define ALT_USB_HOST_HCTSIZ13_PKTCNT_LSB 19
44273 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ13_PKTCNT register field. */
44274 #define ALT_USB_HOST_HCTSIZ13_PKTCNT_MSB 28
44275 /* The width in bits of the ALT_USB_HOST_HCTSIZ13_PKTCNT register field. */
44276 #define ALT_USB_HOST_HCTSIZ13_PKTCNT_WIDTH 10
44277 /* The mask used to set the ALT_USB_HOST_HCTSIZ13_PKTCNT register field value. */
44278 #define ALT_USB_HOST_HCTSIZ13_PKTCNT_SET_MSK 0x1ff80000
44279 /* The mask used to clear the ALT_USB_HOST_HCTSIZ13_PKTCNT register field value. */
44280 #define ALT_USB_HOST_HCTSIZ13_PKTCNT_CLR_MSK 0xe007ffff
44281 /* The reset value of the ALT_USB_HOST_HCTSIZ13_PKTCNT register field. */
44282 #define ALT_USB_HOST_HCTSIZ13_PKTCNT_RESET 0x0
44283 /* Extracts the ALT_USB_HOST_HCTSIZ13_PKTCNT field value from a register. */
44284 #define ALT_USB_HOST_HCTSIZ13_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
44285 /* Produces a ALT_USB_HOST_HCTSIZ13_PKTCNT register field value suitable for setting the register. */
44286 #define ALT_USB_HOST_HCTSIZ13_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
44287 
44288 /*
44289  * Field : PID - pid
44290  *
44291  * The application programs this field with the type of PID to use forthe initial
44292  * transaction. The host maintains this field for the rest of the transfer.
44293  *
44294  * Field Enumeration Values:
44295  *
44296  * Enum | Value | Description
44297  * :----------------------------------|:------|:------------------------------------
44298  * ALT_USB_HOST_HCTSIZ13_PID_E_DATA0 | 0x0 | DATA0
44299  * ALT_USB_HOST_HCTSIZ13_PID_E_DATA2 | 0x1 | DATA2
44300  * ALT_USB_HOST_HCTSIZ13_PID_E_DATA1 | 0x2 | DATA1
44301  * ALT_USB_HOST_HCTSIZ13_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
44302  *
44303  * Field Access Macros:
44304  *
44305  */
44306 /*
44307  * Enumerated value for register field ALT_USB_HOST_HCTSIZ13_PID
44308  *
44309  * DATA0
44310  */
44311 #define ALT_USB_HOST_HCTSIZ13_PID_E_DATA0 0x0
44312 /*
44313  * Enumerated value for register field ALT_USB_HOST_HCTSIZ13_PID
44314  *
44315  * DATA2
44316  */
44317 #define ALT_USB_HOST_HCTSIZ13_PID_E_DATA2 0x1
44318 /*
44319  * Enumerated value for register field ALT_USB_HOST_HCTSIZ13_PID
44320  *
44321  * DATA1
44322  */
44323 #define ALT_USB_HOST_HCTSIZ13_PID_E_DATA1 0x2
44324 /*
44325  * Enumerated value for register field ALT_USB_HOST_HCTSIZ13_PID
44326  *
44327  * MDATA (non-control)/SETUP (control)
44328  */
44329 #define ALT_USB_HOST_HCTSIZ13_PID_E_MDATA 0x3
44330 
44331 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ13_PID register field. */
44332 #define ALT_USB_HOST_HCTSIZ13_PID_LSB 29
44333 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ13_PID register field. */
44334 #define ALT_USB_HOST_HCTSIZ13_PID_MSB 30
44335 /* The width in bits of the ALT_USB_HOST_HCTSIZ13_PID register field. */
44336 #define ALT_USB_HOST_HCTSIZ13_PID_WIDTH 2
44337 /* The mask used to set the ALT_USB_HOST_HCTSIZ13_PID register field value. */
44338 #define ALT_USB_HOST_HCTSIZ13_PID_SET_MSK 0x60000000
44339 /* The mask used to clear the ALT_USB_HOST_HCTSIZ13_PID register field value. */
44340 #define ALT_USB_HOST_HCTSIZ13_PID_CLR_MSK 0x9fffffff
44341 /* The reset value of the ALT_USB_HOST_HCTSIZ13_PID register field. */
44342 #define ALT_USB_HOST_HCTSIZ13_PID_RESET 0x0
44343 /* Extracts the ALT_USB_HOST_HCTSIZ13_PID field value from a register. */
44344 #define ALT_USB_HOST_HCTSIZ13_PID_GET(value) (((value) & 0x60000000) >> 29)
44345 /* Produces a ALT_USB_HOST_HCTSIZ13_PID register field value suitable for setting the register. */
44346 #define ALT_USB_HOST_HCTSIZ13_PID_SET(value) (((value) << 29) & 0x60000000)
44347 
44348 /*
44349  * Field : Do Ping - dopng
44350  *
44351  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
44352  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
44353  * for IN transfers it disables the channel.
44354  *
44355  * Field Enumeration Values:
44356  *
44357  * Enum | Value | Description
44358  * :-------------------------------------|:------|:-----------------
44359  * ALT_USB_HOST_HCTSIZ13_DOPNG_E_NOPING | 0x0 | No ping protocol
44360  * ALT_USB_HOST_HCTSIZ13_DOPNG_E_PING | 0x1 | Ping protocol
44361  *
44362  * Field Access Macros:
44363  *
44364  */
44365 /*
44366  * Enumerated value for register field ALT_USB_HOST_HCTSIZ13_DOPNG
44367  *
44368  * No ping protocol
44369  */
44370 #define ALT_USB_HOST_HCTSIZ13_DOPNG_E_NOPING 0x0
44371 /*
44372  * Enumerated value for register field ALT_USB_HOST_HCTSIZ13_DOPNG
44373  *
44374  * Ping protocol
44375  */
44376 #define ALT_USB_HOST_HCTSIZ13_DOPNG_E_PING 0x1
44377 
44378 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ13_DOPNG register field. */
44379 #define ALT_USB_HOST_HCTSIZ13_DOPNG_LSB 31
44380 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ13_DOPNG register field. */
44381 #define ALT_USB_HOST_HCTSIZ13_DOPNG_MSB 31
44382 /* The width in bits of the ALT_USB_HOST_HCTSIZ13_DOPNG register field. */
44383 #define ALT_USB_HOST_HCTSIZ13_DOPNG_WIDTH 1
44384 /* The mask used to set the ALT_USB_HOST_HCTSIZ13_DOPNG register field value. */
44385 #define ALT_USB_HOST_HCTSIZ13_DOPNG_SET_MSK 0x80000000
44386 /* The mask used to clear the ALT_USB_HOST_HCTSIZ13_DOPNG register field value. */
44387 #define ALT_USB_HOST_HCTSIZ13_DOPNG_CLR_MSK 0x7fffffff
44388 /* The reset value of the ALT_USB_HOST_HCTSIZ13_DOPNG register field. */
44389 #define ALT_USB_HOST_HCTSIZ13_DOPNG_RESET 0x0
44390 /* Extracts the ALT_USB_HOST_HCTSIZ13_DOPNG field value from a register. */
44391 #define ALT_USB_HOST_HCTSIZ13_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
44392 /* Produces a ALT_USB_HOST_HCTSIZ13_DOPNG register field value suitable for setting the register. */
44393 #define ALT_USB_HOST_HCTSIZ13_DOPNG_SET(value) (((value) << 31) & 0x80000000)
44394 
44395 #ifndef __ASSEMBLY__
44396 /*
44397  * WARNING: The C register and register group struct declarations are provided for
44398  * convenience and illustrative purposes. They should, however, be used with
44399  * caution as the C language standard provides no guarantees about the alignment or
44400  * atomicity of device memory accesses. The recommended practice for writing
44401  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
44402  * alt_write_word() functions.
44403  *
44404  * The struct declaration for register ALT_USB_HOST_HCTSIZ13.
44405  */
44406 struct ALT_USB_HOST_HCTSIZ13_s
44407 {
44408  uint32_t xfersize : 19; /* Transfer Size */
44409  uint32_t pktcnt : 10; /* Packet Count */
44410  uint32_t pid : 2; /* PID */
44411  uint32_t dopng : 1; /* Do Ping */
44412 };
44413 
44414 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ13. */
44415 typedef volatile struct ALT_USB_HOST_HCTSIZ13_s ALT_USB_HOST_HCTSIZ13_t;
44416 #endif /* __ASSEMBLY__ */
44417 
44418 /* The byte offset of the ALT_USB_HOST_HCTSIZ13 register from the beginning of the component. */
44419 #define ALT_USB_HOST_HCTSIZ13_OFST 0x2b0
44420 /* The address of the ALT_USB_HOST_HCTSIZ13 register. */
44421 #define ALT_USB_HOST_HCTSIZ13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ13_OFST))
44422 
44423 /*
44424  * Register : Host Channel 13 DMA Address Register - hcdma13
44425  *
44426  * This register is used by the OTG host in the internal DMA mode to maintain the
44427  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
44428  * DWORD-aligned.
44429  *
44430  * Register Layout
44431  *
44432  * Bits | Access | Reset | Description
44433  * :-------|:-------|:------|:------------
44434  * [31:0] | RW | 0x0 | DMA Address
44435  *
44436  */
44437 /*
44438  * Field : DMA Address - hcdma13
44439  *
44440  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
44441  * first descriptor in the list should be located in this address. The first
44442  * descriptor may be or may not be ready. The core starts processing the list from
44443  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
44444  * in which the isochronous descriptors are present where N is based on nTD as per
44445  * Table below
44446  *
44447  * [31:N] Base Address [N-1:3] Offset [2:0] 000
44448  *
44449  * HS ISOC FS ISOC
44450  *
44451  * nTD N nTD N
44452  *
44453  * 7 6 1 4
44454  *
44455  * 15 7 3 5
44456  *
44457  * 31 8 7 6
44458  *
44459  * 63 9 15 7
44460  *
44461  * 127 10 31 8
44462  *
44463  * 255 11 63 9
44464  *
44465  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
44466  * This value is in terms of number of descriptors. The values can be from 0 to 63.
44467  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
44468  * descriptor processed in the list. This field is updated both by application and
44469  * the core. for example, if the application enables the channel after programming
44470  * CTD=5, then the core will start processing the 6th descriptor. The address is
44471  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
44472  * CTD for isochronous is based on the current frame/microframe value. Need to be
44473  * set to zero by application.
44474  *
44475  * Field Access Macros:
44476  *
44477  */
44478 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA13_HCDMA13 register field. */
44479 #define ALT_USB_HOST_HCDMA13_HCDMA13_LSB 0
44480 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA13_HCDMA13 register field. */
44481 #define ALT_USB_HOST_HCDMA13_HCDMA13_MSB 31
44482 /* The width in bits of the ALT_USB_HOST_HCDMA13_HCDMA13 register field. */
44483 #define ALT_USB_HOST_HCDMA13_HCDMA13_WIDTH 32
44484 /* The mask used to set the ALT_USB_HOST_HCDMA13_HCDMA13 register field value. */
44485 #define ALT_USB_HOST_HCDMA13_HCDMA13_SET_MSK 0xffffffff
44486 /* The mask used to clear the ALT_USB_HOST_HCDMA13_HCDMA13 register field value. */
44487 #define ALT_USB_HOST_HCDMA13_HCDMA13_CLR_MSK 0x00000000
44488 /* The reset value of the ALT_USB_HOST_HCDMA13_HCDMA13 register field. */
44489 #define ALT_USB_HOST_HCDMA13_HCDMA13_RESET 0x0
44490 /* Extracts the ALT_USB_HOST_HCDMA13_HCDMA13 field value from a register. */
44491 #define ALT_USB_HOST_HCDMA13_HCDMA13_GET(value) (((value) & 0xffffffff) >> 0)
44492 /* Produces a ALT_USB_HOST_HCDMA13_HCDMA13 register field value suitable for setting the register. */
44493 #define ALT_USB_HOST_HCDMA13_HCDMA13_SET(value) (((value) << 0) & 0xffffffff)
44494 
44495 #ifndef __ASSEMBLY__
44496 /*
44497  * WARNING: The C register and register group struct declarations are provided for
44498  * convenience and illustrative purposes. They should, however, be used with
44499  * caution as the C language standard provides no guarantees about the alignment or
44500  * atomicity of device memory accesses. The recommended practice for writing
44501  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
44502  * alt_write_word() functions.
44503  *
44504  * The struct declaration for register ALT_USB_HOST_HCDMA13.
44505  */
44506 struct ALT_USB_HOST_HCDMA13_s
44507 {
44508  uint32_t hcdma13 : 32; /* DMA Address */
44509 };
44510 
44511 /* The typedef declaration for register ALT_USB_HOST_HCDMA13. */
44512 typedef volatile struct ALT_USB_HOST_HCDMA13_s ALT_USB_HOST_HCDMA13_t;
44513 #endif /* __ASSEMBLY__ */
44514 
44515 /* The byte offset of the ALT_USB_HOST_HCDMA13 register from the beginning of the component. */
44516 #define ALT_USB_HOST_HCDMA13_OFST 0x2b4
44517 /* The address of the ALT_USB_HOST_HCDMA13 register. */
44518 #define ALT_USB_HOST_HCDMA13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA13_OFST))
44519 
44520 /*
44521  * Register : Host Channel 13 DMA Buffer Address Register - hcdmab13
44522  *
44523  * These registers are present only in case of Scatter/Gather DMA. These
44524  * registers are implemented in RAM instead of flop-based implementation. Holds
44525  * the current buffer address. This register is updated as and when the
44526  * data transfer for the corresponding end point is in progress. This
44527  * register is present only in Scatter/Gather DMA mode. Otherwise this field
44528  * is reserved.
44529  *
44530  * Register Layout
44531  *
44532  * Bits | Access | Reset | Description
44533  * :-------|:-------|:------|:-----------------------------------
44534  * [31:0] | RW | 0x0 | Host Channel 13 DMA Buffer Address
44535  *
44536  */
44537 /*
44538  * Field : Host Channel 13 DMA Buffer Address - hcdmab13
44539  *
44540  * These registers are present only in case of Scatter/Gather DMA. These
44541  * registers are implemented in RAM instead of flop-based implementation. Holds
44542  * the current buffer address. This register is updated as and when the data
44543  * transfer for the corresponding end point is in progress. This register is
44544  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
44545  *
44546  * Field Access Macros:
44547  *
44548  */
44549 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB13_HCDMAB13 register field. */
44550 #define ALT_USB_HOST_HCDMAB13_HCDMAB13_LSB 0
44551 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB13_HCDMAB13 register field. */
44552 #define ALT_USB_HOST_HCDMAB13_HCDMAB13_MSB 31
44553 /* The width in bits of the ALT_USB_HOST_HCDMAB13_HCDMAB13 register field. */
44554 #define ALT_USB_HOST_HCDMAB13_HCDMAB13_WIDTH 32
44555 /* The mask used to set the ALT_USB_HOST_HCDMAB13_HCDMAB13 register field value. */
44556 #define ALT_USB_HOST_HCDMAB13_HCDMAB13_SET_MSK 0xffffffff
44557 /* The mask used to clear the ALT_USB_HOST_HCDMAB13_HCDMAB13 register field value. */
44558 #define ALT_USB_HOST_HCDMAB13_HCDMAB13_CLR_MSK 0x00000000
44559 /* The reset value of the ALT_USB_HOST_HCDMAB13_HCDMAB13 register field. */
44560 #define ALT_USB_HOST_HCDMAB13_HCDMAB13_RESET 0x0
44561 /* Extracts the ALT_USB_HOST_HCDMAB13_HCDMAB13 field value from a register. */
44562 #define ALT_USB_HOST_HCDMAB13_HCDMAB13_GET(value) (((value) & 0xffffffff) >> 0)
44563 /* Produces a ALT_USB_HOST_HCDMAB13_HCDMAB13 register field value suitable for setting the register. */
44564 #define ALT_USB_HOST_HCDMAB13_HCDMAB13_SET(value) (((value) << 0) & 0xffffffff)
44565 
44566 #ifndef __ASSEMBLY__
44567 /*
44568  * WARNING: The C register and register group struct declarations are provided for
44569  * convenience and illustrative purposes. They should, however, be used with
44570  * caution as the C language standard provides no guarantees about the alignment or
44571  * atomicity of device memory accesses. The recommended practice for writing
44572  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
44573  * alt_write_word() functions.
44574  *
44575  * The struct declaration for register ALT_USB_HOST_HCDMAB13.
44576  */
44577 struct ALT_USB_HOST_HCDMAB13_s
44578 {
44579  uint32_t hcdmab13 : 32; /* Host Channel 13 DMA Buffer Address */
44580 };
44581 
44582 /* The typedef declaration for register ALT_USB_HOST_HCDMAB13. */
44583 typedef volatile struct ALT_USB_HOST_HCDMAB13_s ALT_USB_HOST_HCDMAB13_t;
44584 #endif /* __ASSEMBLY__ */
44585 
44586 /* The byte offset of the ALT_USB_HOST_HCDMAB13 register from the beginning of the component. */
44587 #define ALT_USB_HOST_HCDMAB13_OFST 0x2b8
44588 /* The address of the ALT_USB_HOST_HCDMAB13 register. */
44589 #define ALT_USB_HOST_HCDMAB13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB13_OFST))
44590 
44591 /*
44592  * Register : Host Channel 14 Characteristics Register - hcchar14
44593  *
44594  * Host Channel 1 Characteristics Register
44595  *
44596  * Register Layout
44597  *
44598  * Bits | Access | Reset | Description
44599  * :--------|:-------|:------|:--------------------
44600  * [10:0] | RW | 0x0 | Maximum Packet Size
44601  * [14:11] | RW | 0x0 | Endpoint Number
44602  * [15] | RW | 0x0 | Endpoint Direction
44603  * [16] | ??? | 0x0 | *UNDEFINED*
44604  * [17] | RW | 0x0 | Low-Speed Device
44605  * [19:18] | RW | 0x0 | Endpoint Type
44606  * [21:20] | RW | 0x0 | Multi Count
44607  * [28:22] | RW | 0x0 | Device Address
44608  * [29] | ??? | 0x0 | *UNDEFINED*
44609  * [30] | R | 0x0 | Channel Disable
44610  * [31] | R | 0x0 | Channel Enable
44611  *
44612  */
44613 /*
44614  * Field : Maximum Packet Size - mps
44615  *
44616  * Indicates the maximum packet size of the associated endpoint.
44617  *
44618  * Field Access Macros:
44619  *
44620  */
44621 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR14_MPS register field. */
44622 #define ALT_USB_HOST_HCCHAR14_MPS_LSB 0
44623 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR14_MPS register field. */
44624 #define ALT_USB_HOST_HCCHAR14_MPS_MSB 10
44625 /* The width in bits of the ALT_USB_HOST_HCCHAR14_MPS register field. */
44626 #define ALT_USB_HOST_HCCHAR14_MPS_WIDTH 11
44627 /* The mask used to set the ALT_USB_HOST_HCCHAR14_MPS register field value. */
44628 #define ALT_USB_HOST_HCCHAR14_MPS_SET_MSK 0x000007ff
44629 /* The mask used to clear the ALT_USB_HOST_HCCHAR14_MPS register field value. */
44630 #define ALT_USB_HOST_HCCHAR14_MPS_CLR_MSK 0xfffff800
44631 /* The reset value of the ALT_USB_HOST_HCCHAR14_MPS register field. */
44632 #define ALT_USB_HOST_HCCHAR14_MPS_RESET 0x0
44633 /* Extracts the ALT_USB_HOST_HCCHAR14_MPS field value from a register. */
44634 #define ALT_USB_HOST_HCCHAR14_MPS_GET(value) (((value) & 0x000007ff) >> 0)
44635 /* Produces a ALT_USB_HOST_HCCHAR14_MPS register field value suitable for setting the register. */
44636 #define ALT_USB_HOST_HCCHAR14_MPS_SET(value) (((value) << 0) & 0x000007ff)
44637 
44638 /*
44639  * Field : Endpoint Number - epnum
44640  *
44641  * Indicates the endpoint number on the device serving as the data source or sink.
44642  *
44643  * Field Enumeration Values:
44644  *
44645  * Enum | Value | Description
44646  * :--------------------------------------|:------|:--------------
44647  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT0 | 0x0 | End point 0
44648  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT1 | 0x1 | End point 1
44649  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT2 | 0x2 | End point 2
44650  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT3 | 0x3 | End point 3
44651  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT4 | 0x4 | End point 4
44652  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT5 | 0x5 | End point 5
44653  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT6 | 0x6 | End point 6
44654  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT7 | 0x7 | End point 7
44655  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT8 | 0x8 | End point 8
44656  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT9 | 0x9 | End point 9
44657  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT10 | 0xa | End point 10
44658  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT11 | 0xb | End point 11
44659  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT12 | 0xc | End point 12
44660  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT13 | 0xd | End point 13
44661  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT14 | 0xe | End point 14
44662  * ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT15 | 0xf | End point 15
44663  *
44664  * Field Access Macros:
44665  *
44666  */
44667 /*
44668  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44669  *
44670  * End point 0
44671  */
44672 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT0 0x0
44673 /*
44674  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44675  *
44676  * End point 1
44677  */
44678 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT1 0x1
44679 /*
44680  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44681  *
44682  * End point 2
44683  */
44684 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT2 0x2
44685 /*
44686  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44687  *
44688  * End point 3
44689  */
44690 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT3 0x3
44691 /*
44692  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44693  *
44694  * End point 4
44695  */
44696 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT4 0x4
44697 /*
44698  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44699  *
44700  * End point 5
44701  */
44702 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT5 0x5
44703 /*
44704  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44705  *
44706  * End point 6
44707  */
44708 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT6 0x6
44709 /*
44710  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44711  *
44712  * End point 7
44713  */
44714 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT7 0x7
44715 /*
44716  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44717  *
44718  * End point 8
44719  */
44720 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT8 0x8
44721 /*
44722  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44723  *
44724  * End point 9
44725  */
44726 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT9 0x9
44727 /*
44728  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44729  *
44730  * End point 10
44731  */
44732 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT10 0xa
44733 /*
44734  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44735  *
44736  * End point 11
44737  */
44738 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT11 0xb
44739 /*
44740  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44741  *
44742  * End point 12
44743  */
44744 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT12 0xc
44745 /*
44746  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44747  *
44748  * End point 13
44749  */
44750 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT13 0xd
44751 /*
44752  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44753  *
44754  * End point 14
44755  */
44756 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT14 0xe
44757 /*
44758  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPNUM
44759  *
44760  * End point 15
44761  */
44762 #define ALT_USB_HOST_HCCHAR14_EPNUM_E_ENDPT15 0xf
44763 
44764 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR14_EPNUM register field. */
44765 #define ALT_USB_HOST_HCCHAR14_EPNUM_LSB 11
44766 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR14_EPNUM register field. */
44767 #define ALT_USB_HOST_HCCHAR14_EPNUM_MSB 14
44768 /* The width in bits of the ALT_USB_HOST_HCCHAR14_EPNUM register field. */
44769 #define ALT_USB_HOST_HCCHAR14_EPNUM_WIDTH 4
44770 /* The mask used to set the ALT_USB_HOST_HCCHAR14_EPNUM register field value. */
44771 #define ALT_USB_HOST_HCCHAR14_EPNUM_SET_MSK 0x00007800
44772 /* The mask used to clear the ALT_USB_HOST_HCCHAR14_EPNUM register field value. */
44773 #define ALT_USB_HOST_HCCHAR14_EPNUM_CLR_MSK 0xffff87ff
44774 /* The reset value of the ALT_USB_HOST_HCCHAR14_EPNUM register field. */
44775 #define ALT_USB_HOST_HCCHAR14_EPNUM_RESET 0x0
44776 /* Extracts the ALT_USB_HOST_HCCHAR14_EPNUM field value from a register. */
44777 #define ALT_USB_HOST_HCCHAR14_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
44778 /* Produces a ALT_USB_HOST_HCCHAR14_EPNUM register field value suitable for setting the register. */
44779 #define ALT_USB_HOST_HCCHAR14_EPNUM_SET(value) (((value) << 11) & 0x00007800)
44780 
44781 /*
44782  * Field : Endpoint Direction - epdir
44783  *
44784  * Indicates whether the transaction is IN or OUT.
44785  *
44786  * Field Enumeration Values:
44787  *
44788  * Enum | Value | Description
44789  * :----------------------------------|:------|:--------------
44790  * ALT_USB_HOST_HCCHAR14_EPDIR_E_OUT | 0x0 | OUT Direction
44791  * ALT_USB_HOST_HCCHAR14_EPDIR_E_IN | 0x1 | IN Direction
44792  *
44793  * Field Access Macros:
44794  *
44795  */
44796 /*
44797  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPDIR
44798  *
44799  * OUT Direction
44800  */
44801 #define ALT_USB_HOST_HCCHAR14_EPDIR_E_OUT 0x0
44802 /*
44803  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPDIR
44804  *
44805  * IN Direction
44806  */
44807 #define ALT_USB_HOST_HCCHAR14_EPDIR_E_IN 0x1
44808 
44809 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR14_EPDIR register field. */
44810 #define ALT_USB_HOST_HCCHAR14_EPDIR_LSB 15
44811 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR14_EPDIR register field. */
44812 #define ALT_USB_HOST_HCCHAR14_EPDIR_MSB 15
44813 /* The width in bits of the ALT_USB_HOST_HCCHAR14_EPDIR register field. */
44814 #define ALT_USB_HOST_HCCHAR14_EPDIR_WIDTH 1
44815 /* The mask used to set the ALT_USB_HOST_HCCHAR14_EPDIR register field value. */
44816 #define ALT_USB_HOST_HCCHAR14_EPDIR_SET_MSK 0x00008000
44817 /* The mask used to clear the ALT_USB_HOST_HCCHAR14_EPDIR register field value. */
44818 #define ALT_USB_HOST_HCCHAR14_EPDIR_CLR_MSK 0xffff7fff
44819 /* The reset value of the ALT_USB_HOST_HCCHAR14_EPDIR register field. */
44820 #define ALT_USB_HOST_HCCHAR14_EPDIR_RESET 0x0
44821 /* Extracts the ALT_USB_HOST_HCCHAR14_EPDIR field value from a register. */
44822 #define ALT_USB_HOST_HCCHAR14_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
44823 /* Produces a ALT_USB_HOST_HCCHAR14_EPDIR register field value suitable for setting the register. */
44824 #define ALT_USB_HOST_HCCHAR14_EPDIR_SET(value) (((value) << 15) & 0x00008000)
44825 
44826 /*
44827  * Field : Low-Speed Device - lspddev
44828  *
44829  * This field is set by the application to indicate that this channel is
44830  * communicating to a low-speed device. The application must program this bit when
44831  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
44832  * core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating
44833  * to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host
44834  * core ignores this bit even if it is set by the application software
44835  *
44836  * Field Enumeration Values:
44837  *
44838  * Enum | Value | Description
44839  * :-------------------------------------|:------|:----------------------------------------
44840  * ALT_USB_HOST_HCCHAR14_LSPDDEV_E_DISD | 0x0 | Not Communicating with low speed device
44841  * ALT_USB_HOST_HCCHAR14_LSPDDEV_E_END | 0x1 | Communicating with low speed device
44842  *
44843  * Field Access Macros:
44844  *
44845  */
44846 /*
44847  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_LSPDDEV
44848  *
44849  * Not Communicating with low speed device
44850  */
44851 #define ALT_USB_HOST_HCCHAR14_LSPDDEV_E_DISD 0x0
44852 /*
44853  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_LSPDDEV
44854  *
44855  * Communicating with low speed device
44856  */
44857 #define ALT_USB_HOST_HCCHAR14_LSPDDEV_E_END 0x1
44858 
44859 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR14_LSPDDEV register field. */
44860 #define ALT_USB_HOST_HCCHAR14_LSPDDEV_LSB 17
44861 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR14_LSPDDEV register field. */
44862 #define ALT_USB_HOST_HCCHAR14_LSPDDEV_MSB 17
44863 /* The width in bits of the ALT_USB_HOST_HCCHAR14_LSPDDEV register field. */
44864 #define ALT_USB_HOST_HCCHAR14_LSPDDEV_WIDTH 1
44865 /* The mask used to set the ALT_USB_HOST_HCCHAR14_LSPDDEV register field value. */
44866 #define ALT_USB_HOST_HCCHAR14_LSPDDEV_SET_MSK 0x00020000
44867 /* The mask used to clear the ALT_USB_HOST_HCCHAR14_LSPDDEV register field value. */
44868 #define ALT_USB_HOST_HCCHAR14_LSPDDEV_CLR_MSK 0xfffdffff
44869 /* The reset value of the ALT_USB_HOST_HCCHAR14_LSPDDEV register field. */
44870 #define ALT_USB_HOST_HCCHAR14_LSPDDEV_RESET 0x0
44871 /* Extracts the ALT_USB_HOST_HCCHAR14_LSPDDEV field value from a register. */
44872 #define ALT_USB_HOST_HCCHAR14_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
44873 /* Produces a ALT_USB_HOST_HCCHAR14_LSPDDEV register field value suitable for setting the register. */
44874 #define ALT_USB_HOST_HCCHAR14_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
44875 
44876 /*
44877  * Field : Endpoint Type - eptype
44878  *
44879  * Indicates the transfer type selected.
44880  *
44881  * Field Enumeration Values:
44882  *
44883  * Enum | Value | Description
44884  * :--------------------------------------|:------|:------------
44885  * ALT_USB_HOST_HCCHAR14_EPTYPE_E_CTL | 0x0 | Control
44886  * ALT_USB_HOST_HCCHAR14_EPTYPE_E_ISOC | 0x1 | Isochronous
44887  * ALT_USB_HOST_HCCHAR14_EPTYPE_E_BULK | 0x2 | Bulk
44888  * ALT_USB_HOST_HCCHAR14_EPTYPE_E_INTERR | 0x3 | Interrupt
44889  *
44890  * Field Access Macros:
44891  *
44892  */
44893 /*
44894  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPTYPE
44895  *
44896  * Control
44897  */
44898 #define ALT_USB_HOST_HCCHAR14_EPTYPE_E_CTL 0x0
44899 /*
44900  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPTYPE
44901  *
44902  * Isochronous
44903  */
44904 #define ALT_USB_HOST_HCCHAR14_EPTYPE_E_ISOC 0x1
44905 /*
44906  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPTYPE
44907  *
44908  * Bulk
44909  */
44910 #define ALT_USB_HOST_HCCHAR14_EPTYPE_E_BULK 0x2
44911 /*
44912  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EPTYPE
44913  *
44914  * Interrupt
44915  */
44916 #define ALT_USB_HOST_HCCHAR14_EPTYPE_E_INTERR 0x3
44917 
44918 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR14_EPTYPE register field. */
44919 #define ALT_USB_HOST_HCCHAR14_EPTYPE_LSB 18
44920 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR14_EPTYPE register field. */
44921 #define ALT_USB_HOST_HCCHAR14_EPTYPE_MSB 19
44922 /* The width in bits of the ALT_USB_HOST_HCCHAR14_EPTYPE register field. */
44923 #define ALT_USB_HOST_HCCHAR14_EPTYPE_WIDTH 2
44924 /* The mask used to set the ALT_USB_HOST_HCCHAR14_EPTYPE register field value. */
44925 #define ALT_USB_HOST_HCCHAR14_EPTYPE_SET_MSK 0x000c0000
44926 /* The mask used to clear the ALT_USB_HOST_HCCHAR14_EPTYPE register field value. */
44927 #define ALT_USB_HOST_HCCHAR14_EPTYPE_CLR_MSK 0xfff3ffff
44928 /* The reset value of the ALT_USB_HOST_HCCHAR14_EPTYPE register field. */
44929 #define ALT_USB_HOST_HCCHAR14_EPTYPE_RESET 0x0
44930 /* Extracts the ALT_USB_HOST_HCCHAR14_EPTYPE field value from a register. */
44931 #define ALT_USB_HOST_HCCHAR14_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
44932 /* Produces a ALT_USB_HOST_HCCHAR14_EPTYPE register field value suitable for setting the register. */
44933 #define ALT_USB_HOST_HCCHAR14_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
44934 
44935 /*
44936  * Field : Multi Count - ec
44937  *
44938  * When the Split Enable bit of the Host Channel-n Split Control register
44939  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
44940  * transactions that must be executed per microframe for this periodic endpoint.
44941  * for non periodic transfers, this field is used only in DMA mode, and specifies
44942  * the number packets to be fetched for this channel before the internal DMA engine
44943  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
44944  * number of immediate retries to be performed for a periodic split transactions on
44945  * transaction errors. This field must be set to at least 1.
44946  *
44947  * Field Enumeration Values:
44948  *
44949  * Enum | Value | Description
44950  * :--------------------------------------|:------|:----------------------------------------------
44951  * ALT_USB_HOST_HCCHAR14_EC_E_RSVD | 0x0 | Reserved This field yields undefined result
44952  * ALT_USB_HOST_HCCHAR14_EC_E_TRANSONE | 0x1 | 1 transaction
44953  * ALT_USB_HOST_HCCHAR14_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
44954  * : | | per microframe
44955  * ALT_USB_HOST_HCCHAR14_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
44956  * : | | per microframe
44957  *
44958  * Field Access Macros:
44959  *
44960  */
44961 /*
44962  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EC
44963  *
44964  * Reserved This field yields undefined result
44965  */
44966 #define ALT_USB_HOST_HCCHAR14_EC_E_RSVD 0x0
44967 /*
44968  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EC
44969  *
44970  * 1 transaction
44971  */
44972 #define ALT_USB_HOST_HCCHAR14_EC_E_TRANSONE 0x1
44973 /*
44974  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EC
44975  *
44976  * 2 transactions to be issued for this endpoint per microframe
44977  */
44978 #define ALT_USB_HOST_HCCHAR14_EC_E_TRANSTWO 0x2
44979 /*
44980  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_EC
44981  *
44982  * 3 transactions to be issued for this endpoint per microframe
44983  */
44984 #define ALT_USB_HOST_HCCHAR14_EC_E_TRANSTHREE 0x3
44985 
44986 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR14_EC register field. */
44987 #define ALT_USB_HOST_HCCHAR14_EC_LSB 20
44988 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR14_EC register field. */
44989 #define ALT_USB_HOST_HCCHAR14_EC_MSB 21
44990 /* The width in bits of the ALT_USB_HOST_HCCHAR14_EC register field. */
44991 #define ALT_USB_HOST_HCCHAR14_EC_WIDTH 2
44992 /* The mask used to set the ALT_USB_HOST_HCCHAR14_EC register field value. */
44993 #define ALT_USB_HOST_HCCHAR14_EC_SET_MSK 0x00300000
44994 /* The mask used to clear the ALT_USB_HOST_HCCHAR14_EC register field value. */
44995 #define ALT_USB_HOST_HCCHAR14_EC_CLR_MSK 0xffcfffff
44996 /* The reset value of the ALT_USB_HOST_HCCHAR14_EC register field. */
44997 #define ALT_USB_HOST_HCCHAR14_EC_RESET 0x0
44998 /* Extracts the ALT_USB_HOST_HCCHAR14_EC field value from a register. */
44999 #define ALT_USB_HOST_HCCHAR14_EC_GET(value) (((value) & 0x00300000) >> 20)
45000 /* Produces a ALT_USB_HOST_HCCHAR14_EC register field value suitable for setting the register. */
45001 #define ALT_USB_HOST_HCCHAR14_EC_SET(value) (((value) << 20) & 0x00300000)
45002 
45003 /*
45004  * Field : Device Address - devaddr
45005  *
45006  * This field selects the specific device serving as the data source or sink.
45007  *
45008  * Field Access Macros:
45009  *
45010  */
45011 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR14_DEVADDR register field. */
45012 #define ALT_USB_HOST_HCCHAR14_DEVADDR_LSB 22
45013 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR14_DEVADDR register field. */
45014 #define ALT_USB_HOST_HCCHAR14_DEVADDR_MSB 28
45015 /* The width in bits of the ALT_USB_HOST_HCCHAR14_DEVADDR register field. */
45016 #define ALT_USB_HOST_HCCHAR14_DEVADDR_WIDTH 7
45017 /* The mask used to set the ALT_USB_HOST_HCCHAR14_DEVADDR register field value. */
45018 #define ALT_USB_HOST_HCCHAR14_DEVADDR_SET_MSK 0x1fc00000
45019 /* The mask used to clear the ALT_USB_HOST_HCCHAR14_DEVADDR register field value. */
45020 #define ALT_USB_HOST_HCCHAR14_DEVADDR_CLR_MSK 0xe03fffff
45021 /* The reset value of the ALT_USB_HOST_HCCHAR14_DEVADDR register field. */
45022 #define ALT_USB_HOST_HCCHAR14_DEVADDR_RESET 0x0
45023 /* Extracts the ALT_USB_HOST_HCCHAR14_DEVADDR field value from a register. */
45024 #define ALT_USB_HOST_HCCHAR14_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
45025 /* Produces a ALT_USB_HOST_HCCHAR14_DEVADDR register field value suitable for setting the register. */
45026 #define ALT_USB_HOST_HCCHAR14_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
45027 
45028 /*
45029  * Field : Channel Disable - chdis
45030  *
45031  * The application sets this bit to stop transmitting/receiving data on a channel,
45032  * even before the transfer for that channel is complete. The application must wait
45033  * for the Channel Disabled interrupt before treating the channel as disabled.
45034  *
45035  * Field Enumeration Values:
45036  *
45037  * Enum | Value | Description
45038  * :------------------------------------|:------|:----------------------------
45039  * ALT_USB_HOST_HCCHAR14_CHDIS_E_INACT | 0x0 | Transmit/Recieve normal
45040  * ALT_USB_HOST_HCCHAR14_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving
45041  *
45042  * Field Access Macros:
45043  *
45044  */
45045 /*
45046  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_CHDIS
45047  *
45048  * Transmit/Recieve normal
45049  */
45050 #define ALT_USB_HOST_HCCHAR14_CHDIS_E_INACT 0x0
45051 /*
45052  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_CHDIS
45053  *
45054  * Stop transmitting/receiving
45055  */
45056 #define ALT_USB_HOST_HCCHAR14_CHDIS_E_ACT 0x1
45057 
45058 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR14_CHDIS register field. */
45059 #define ALT_USB_HOST_HCCHAR14_CHDIS_LSB 30
45060 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR14_CHDIS register field. */
45061 #define ALT_USB_HOST_HCCHAR14_CHDIS_MSB 30
45062 /* The width in bits of the ALT_USB_HOST_HCCHAR14_CHDIS register field. */
45063 #define ALT_USB_HOST_HCCHAR14_CHDIS_WIDTH 1
45064 /* The mask used to set the ALT_USB_HOST_HCCHAR14_CHDIS register field value. */
45065 #define ALT_USB_HOST_HCCHAR14_CHDIS_SET_MSK 0x40000000
45066 /* The mask used to clear the ALT_USB_HOST_HCCHAR14_CHDIS register field value. */
45067 #define ALT_USB_HOST_HCCHAR14_CHDIS_CLR_MSK 0xbfffffff
45068 /* The reset value of the ALT_USB_HOST_HCCHAR14_CHDIS register field. */
45069 #define ALT_USB_HOST_HCCHAR14_CHDIS_RESET 0x0
45070 /* Extracts the ALT_USB_HOST_HCCHAR14_CHDIS field value from a register. */
45071 #define ALT_USB_HOST_HCCHAR14_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
45072 /* Produces a ALT_USB_HOST_HCCHAR14_CHDIS register field value suitable for setting the register. */
45073 #define ALT_USB_HOST_HCCHAR14_CHDIS_SET(value) (((value) << 30) & 0x40000000)
45074 
45075 /*
45076  * Field : Channel Enable - chena
45077  *
45078  * When Scatter/Gather mode is disabled This field is set by the application and
45079  * cleared by the OTG host.
45080  *
45081  * 0: Channel disabled
45082  *
45083  * 1: Channel enabled
45084  *
45085  * When Scatter/Gather mode is enabled.
45086  *
45087  * Field Enumeration Values:
45088  *
45089  * Enum | Value | Description
45090  * :------------------------------------|:------|:-------------------------------------------------
45091  * ALT_USB_HOST_HCCHAR14_CHENA_E_INACT | 0x0 | Indicates that the descriptor structure is not
45092  * : | | yet ready
45093  * ALT_USB_HOST_HCCHAR14_CHENA_E_ACT | 0x1 | Indicates that the descriptor structure and
45094  * : | | data buffer with data is setup and this
45095  * : | | channel can access the descriptor
45096  *
45097  * Field Access Macros:
45098  *
45099  */
45100 /*
45101  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_CHENA
45102  *
45103  * Indicates that the descriptor structure is not yet ready
45104  */
45105 #define ALT_USB_HOST_HCCHAR14_CHENA_E_INACT 0x0
45106 /*
45107  * Enumerated value for register field ALT_USB_HOST_HCCHAR14_CHENA
45108  *
45109  * Indicates that the descriptor structure and data buffer with data is
45110  * setup and this channel can access the descriptor
45111  */
45112 #define ALT_USB_HOST_HCCHAR14_CHENA_E_ACT 0x1
45113 
45114 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR14_CHENA register field. */
45115 #define ALT_USB_HOST_HCCHAR14_CHENA_LSB 31
45116 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR14_CHENA register field. */
45117 #define ALT_USB_HOST_HCCHAR14_CHENA_MSB 31
45118 /* The width in bits of the ALT_USB_HOST_HCCHAR14_CHENA register field. */
45119 #define ALT_USB_HOST_HCCHAR14_CHENA_WIDTH 1
45120 /* The mask used to set the ALT_USB_HOST_HCCHAR14_CHENA register field value. */
45121 #define ALT_USB_HOST_HCCHAR14_CHENA_SET_MSK 0x80000000
45122 /* The mask used to clear the ALT_USB_HOST_HCCHAR14_CHENA register field value. */
45123 #define ALT_USB_HOST_HCCHAR14_CHENA_CLR_MSK 0x7fffffff
45124 /* The reset value of the ALT_USB_HOST_HCCHAR14_CHENA register field. */
45125 #define ALT_USB_HOST_HCCHAR14_CHENA_RESET 0x0
45126 /* Extracts the ALT_USB_HOST_HCCHAR14_CHENA field value from a register. */
45127 #define ALT_USB_HOST_HCCHAR14_CHENA_GET(value) (((value) & 0x80000000) >> 31)
45128 /* Produces a ALT_USB_HOST_HCCHAR14_CHENA register field value suitable for setting the register. */
45129 #define ALT_USB_HOST_HCCHAR14_CHENA_SET(value) (((value) << 31) & 0x80000000)
45130 
45131 #ifndef __ASSEMBLY__
45132 /*
45133  * WARNING: The C register and register group struct declarations are provided for
45134  * convenience and illustrative purposes. They should, however, be used with
45135  * caution as the C language standard provides no guarantees about the alignment or
45136  * atomicity of device memory accesses. The recommended practice for writing
45137  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
45138  * alt_write_word() functions.
45139  *
45140  * The struct declaration for register ALT_USB_HOST_HCCHAR14.
45141  */
45142 struct ALT_USB_HOST_HCCHAR14_s
45143 {
45144  uint32_t mps : 11; /* Maximum Packet Size */
45145  uint32_t epnum : 4; /* Endpoint Number */
45146  uint32_t epdir : 1; /* Endpoint Direction */
45147  uint32_t : 1; /* *UNDEFINED* */
45148  uint32_t lspddev : 1; /* Low-Speed Device */
45149  uint32_t eptype : 2; /* Endpoint Type */
45150  uint32_t ec : 2; /* Multi Count */
45151  uint32_t devaddr : 7; /* Device Address */
45152  uint32_t : 1; /* *UNDEFINED* */
45153  const uint32_t chdis : 1; /* Channel Disable */
45154  const uint32_t chena : 1; /* Channel Enable */
45155 };
45156 
45157 /* The typedef declaration for register ALT_USB_HOST_HCCHAR14. */
45158 typedef volatile struct ALT_USB_HOST_HCCHAR14_s ALT_USB_HOST_HCCHAR14_t;
45159 #endif /* __ASSEMBLY__ */
45160 
45161 /* The byte offset of the ALT_USB_HOST_HCCHAR14 register from the beginning of the component. */
45162 #define ALT_USB_HOST_HCCHAR14_OFST 0x2c0
45163 /* The address of the ALT_USB_HOST_HCCHAR14 register. */
45164 #define ALT_USB_HOST_HCCHAR14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR14_OFST))
45165 
45166 /*
45167  * Register : Host Channel 14 Split Control Register - hcsplt14
45168  *
45169  * Channel_number 14
45170  *
45171  * Register Layout
45172  *
45173  * Bits | Access | Reset | Description
45174  * :--------|:-------|:------|:---------------------
45175  * [6:0] | RW | 0x0 | Port Address
45176  * [13:7] | RW | 0x0 | Hub Address
45177  * [15:14] | RW | 0x0 | Transaction Position
45178  * [16] | RW | 0x0 | Do Complete Split
45179  * [30:17] | ??? | 0x0 | *UNDEFINED*
45180  * [31] | RW | 0x0 | Split Enable
45181  *
45182  */
45183 /*
45184  * Field : Port Address - prtaddr
45185  *
45186  * This field is the port number of the recipient transactiontranslator.
45187  *
45188  * Field Access Macros:
45189  *
45190  */
45191 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT14_PRTADDR register field. */
45192 #define ALT_USB_HOST_HCSPLT14_PRTADDR_LSB 0
45193 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT14_PRTADDR register field. */
45194 #define ALT_USB_HOST_HCSPLT14_PRTADDR_MSB 6
45195 /* The width in bits of the ALT_USB_HOST_HCSPLT14_PRTADDR register field. */
45196 #define ALT_USB_HOST_HCSPLT14_PRTADDR_WIDTH 7
45197 /* The mask used to set the ALT_USB_HOST_HCSPLT14_PRTADDR register field value. */
45198 #define ALT_USB_HOST_HCSPLT14_PRTADDR_SET_MSK 0x0000007f
45199 /* The mask used to clear the ALT_USB_HOST_HCSPLT14_PRTADDR register field value. */
45200 #define ALT_USB_HOST_HCSPLT14_PRTADDR_CLR_MSK 0xffffff80
45201 /* The reset value of the ALT_USB_HOST_HCSPLT14_PRTADDR register field. */
45202 #define ALT_USB_HOST_HCSPLT14_PRTADDR_RESET 0x0
45203 /* Extracts the ALT_USB_HOST_HCSPLT14_PRTADDR field value from a register. */
45204 #define ALT_USB_HOST_HCSPLT14_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
45205 /* Produces a ALT_USB_HOST_HCSPLT14_PRTADDR register field value suitable for setting the register. */
45206 #define ALT_USB_HOST_HCSPLT14_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
45207 
45208 /*
45209  * Field : Hub Address - hubaddr
45210  *
45211  * This field holds the device address of the transaction translator's hub.
45212  *
45213  * Field Access Macros:
45214  *
45215  */
45216 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT14_HUBADDR register field. */
45217 #define ALT_USB_HOST_HCSPLT14_HUBADDR_LSB 7
45218 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT14_HUBADDR register field. */
45219 #define ALT_USB_HOST_HCSPLT14_HUBADDR_MSB 13
45220 /* The width in bits of the ALT_USB_HOST_HCSPLT14_HUBADDR register field. */
45221 #define ALT_USB_HOST_HCSPLT14_HUBADDR_WIDTH 7
45222 /* The mask used to set the ALT_USB_HOST_HCSPLT14_HUBADDR register field value. */
45223 #define ALT_USB_HOST_HCSPLT14_HUBADDR_SET_MSK 0x00003f80
45224 /* The mask used to clear the ALT_USB_HOST_HCSPLT14_HUBADDR register field value. */
45225 #define ALT_USB_HOST_HCSPLT14_HUBADDR_CLR_MSK 0xffffc07f
45226 /* The reset value of the ALT_USB_HOST_HCSPLT14_HUBADDR register field. */
45227 #define ALT_USB_HOST_HCSPLT14_HUBADDR_RESET 0x0
45228 /* Extracts the ALT_USB_HOST_HCSPLT14_HUBADDR field value from a register. */
45229 #define ALT_USB_HOST_HCSPLT14_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
45230 /* Produces a ALT_USB_HOST_HCSPLT14_HUBADDR register field value suitable for setting the register. */
45231 #define ALT_USB_HOST_HCSPLT14_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
45232 
45233 /*
45234  * Field : Transaction Position - xactpos
45235  *
45236  * This field is used to determine whether to send all, first, middle, or last
45237  * payloads with each OUT transaction.
45238  *
45239  * Field Enumeration Values:
45240  *
45241  * Enum | Value | Description
45242  * :---------------------------------------|:------|:------------------------------------------------
45243  * ALT_USB_HOST_HCSPLT14_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
45244  * : | | transaction (which is larger than 188 bytes)
45245  * ALT_USB_HOST_HCSPLT14_XACTPOS_E_END | 0x1 | End. This is the last payload of this
45246  * : | | transaction (which is larger than 188 bytes)
45247  * ALT_USB_HOST_HCSPLT14_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
45248  * : | | transaction (which is larger than 188 bytes)
45249  * ALT_USB_HOST_HCSPLT14_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
45250  * : | | transaction (which is less than or equal to 188
45251  * : | | bytes)
45252  *
45253  * Field Access Macros:
45254  *
45255  */
45256 /*
45257  * Enumerated value for register field ALT_USB_HOST_HCSPLT14_XACTPOS
45258  *
45259  * Mid. This is the middle payload of this transaction (which is larger than 188
45260  * bytes)
45261  */
45262 #define ALT_USB_HOST_HCSPLT14_XACTPOS_E_MIDDLE 0x0
45263 /*
45264  * Enumerated value for register field ALT_USB_HOST_HCSPLT14_XACTPOS
45265  *
45266  * End. This is the last payload of this transaction (which is larger than 188
45267  * bytes)
45268  */
45269 #define ALT_USB_HOST_HCSPLT14_XACTPOS_E_END 0x1
45270 /*
45271  * Enumerated value for register field ALT_USB_HOST_HCSPLT14_XACTPOS
45272  *
45273  * Begin. This is the first data payload of this transaction (which is larger than
45274  * 188 bytes)
45275  */
45276 #define ALT_USB_HOST_HCSPLT14_XACTPOS_E_BEGIN 0x2
45277 /*
45278  * Enumerated value for register field ALT_USB_HOST_HCSPLT14_XACTPOS
45279  *
45280  * All. This is the entire data payload is of this transaction (which is less than
45281  * or equal to 188 bytes)
45282  */
45283 #define ALT_USB_HOST_HCSPLT14_XACTPOS_E_ALL 0x3
45284 
45285 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT14_XACTPOS register field. */
45286 #define ALT_USB_HOST_HCSPLT14_XACTPOS_LSB 14
45287 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT14_XACTPOS register field. */
45288 #define ALT_USB_HOST_HCSPLT14_XACTPOS_MSB 15
45289 /* The width in bits of the ALT_USB_HOST_HCSPLT14_XACTPOS register field. */
45290 #define ALT_USB_HOST_HCSPLT14_XACTPOS_WIDTH 2
45291 /* The mask used to set the ALT_USB_HOST_HCSPLT14_XACTPOS register field value. */
45292 #define ALT_USB_HOST_HCSPLT14_XACTPOS_SET_MSK 0x0000c000
45293 /* The mask used to clear the ALT_USB_HOST_HCSPLT14_XACTPOS register field value. */
45294 #define ALT_USB_HOST_HCSPLT14_XACTPOS_CLR_MSK 0xffff3fff
45295 /* The reset value of the ALT_USB_HOST_HCSPLT14_XACTPOS register field. */
45296 #define ALT_USB_HOST_HCSPLT14_XACTPOS_RESET 0x0
45297 /* Extracts the ALT_USB_HOST_HCSPLT14_XACTPOS field value from a register. */
45298 #define ALT_USB_HOST_HCSPLT14_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
45299 /* Produces a ALT_USB_HOST_HCSPLT14_XACTPOS register field value suitable for setting the register. */
45300 #define ALT_USB_HOST_HCSPLT14_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
45301 
45302 /*
45303  * Field : Do Complete Split - compsplt
45304  *
45305  * The application sets this field to request the OTG host to perform a complete
45306  * split transaction.
45307  *
45308  * Field Enumeration Values:
45309  *
45310  * Enum | Value | Description
45311  * :-----------------------------------------|:------|:---------------------
45312  * ALT_USB_HOST_HCSPLT14_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
45313  * ALT_USB_HOST_HCSPLT14_COMPSPLT_E_SPLIT | 0x1 | Split transaction
45314  *
45315  * Field Access Macros:
45316  *
45317  */
45318 /*
45319  * Enumerated value for register field ALT_USB_HOST_HCSPLT14_COMPSPLT
45320  *
45321  * No split transaction
45322  */
45323 #define ALT_USB_HOST_HCSPLT14_COMPSPLT_E_NOSPLIT 0x0
45324 /*
45325  * Enumerated value for register field ALT_USB_HOST_HCSPLT14_COMPSPLT
45326  *
45327  * Split transaction
45328  */
45329 #define ALT_USB_HOST_HCSPLT14_COMPSPLT_E_SPLIT 0x1
45330 
45331 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT14_COMPSPLT register field. */
45332 #define ALT_USB_HOST_HCSPLT14_COMPSPLT_LSB 16
45333 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT14_COMPSPLT register field. */
45334 #define ALT_USB_HOST_HCSPLT14_COMPSPLT_MSB 16
45335 /* The width in bits of the ALT_USB_HOST_HCSPLT14_COMPSPLT register field. */
45336 #define ALT_USB_HOST_HCSPLT14_COMPSPLT_WIDTH 1
45337 /* The mask used to set the ALT_USB_HOST_HCSPLT14_COMPSPLT register field value. */
45338 #define ALT_USB_HOST_HCSPLT14_COMPSPLT_SET_MSK 0x00010000
45339 /* The mask used to clear the ALT_USB_HOST_HCSPLT14_COMPSPLT register field value. */
45340 #define ALT_USB_HOST_HCSPLT14_COMPSPLT_CLR_MSK 0xfffeffff
45341 /* The reset value of the ALT_USB_HOST_HCSPLT14_COMPSPLT register field. */
45342 #define ALT_USB_HOST_HCSPLT14_COMPSPLT_RESET 0x0
45343 /* Extracts the ALT_USB_HOST_HCSPLT14_COMPSPLT field value from a register. */
45344 #define ALT_USB_HOST_HCSPLT14_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
45345 /* Produces a ALT_USB_HOST_HCSPLT14_COMPSPLT register field value suitable for setting the register. */
45346 #define ALT_USB_HOST_HCSPLT14_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
45347 
45348 /*
45349  * Field : Split Enable - spltena
45350  *
45351  * The application sets this field to indicate that this channel is enabled to
45352  * perform split transactions.
45353  *
45354  * Field Enumeration Values:
45355  *
45356  * Enum | Value | Description
45357  * :-------------------------------------|:------|:------------------
45358  * ALT_USB_HOST_HCSPLT14_SPLTENA_E_DISD | 0x0 | Split not enabled
45359  * ALT_USB_HOST_HCSPLT14_SPLTENA_E_END | 0x1 | Split enabled
45360  *
45361  * Field Access Macros:
45362  *
45363  */
45364 /*
45365  * Enumerated value for register field ALT_USB_HOST_HCSPLT14_SPLTENA
45366  *
45367  * Split not enabled
45368  */
45369 #define ALT_USB_HOST_HCSPLT14_SPLTENA_E_DISD 0x0
45370 /*
45371  * Enumerated value for register field ALT_USB_HOST_HCSPLT14_SPLTENA
45372  *
45373  * Split enabled
45374  */
45375 #define ALT_USB_HOST_HCSPLT14_SPLTENA_E_END 0x1
45376 
45377 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT14_SPLTENA register field. */
45378 #define ALT_USB_HOST_HCSPLT14_SPLTENA_LSB 31
45379 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT14_SPLTENA register field. */
45380 #define ALT_USB_HOST_HCSPLT14_SPLTENA_MSB 31
45381 /* The width in bits of the ALT_USB_HOST_HCSPLT14_SPLTENA register field. */
45382 #define ALT_USB_HOST_HCSPLT14_SPLTENA_WIDTH 1
45383 /* The mask used to set the ALT_USB_HOST_HCSPLT14_SPLTENA register field value. */
45384 #define ALT_USB_HOST_HCSPLT14_SPLTENA_SET_MSK 0x80000000
45385 /* The mask used to clear the ALT_USB_HOST_HCSPLT14_SPLTENA register field value. */
45386 #define ALT_USB_HOST_HCSPLT14_SPLTENA_CLR_MSK 0x7fffffff
45387 /* The reset value of the ALT_USB_HOST_HCSPLT14_SPLTENA register field. */
45388 #define ALT_USB_HOST_HCSPLT14_SPLTENA_RESET 0x0
45389 /* Extracts the ALT_USB_HOST_HCSPLT14_SPLTENA field value from a register. */
45390 #define ALT_USB_HOST_HCSPLT14_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
45391 /* Produces a ALT_USB_HOST_HCSPLT14_SPLTENA register field value suitable for setting the register. */
45392 #define ALT_USB_HOST_HCSPLT14_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
45393 
45394 #ifndef __ASSEMBLY__
45395 /*
45396  * WARNING: The C register and register group struct declarations are provided for
45397  * convenience and illustrative purposes. They should, however, be used with
45398  * caution as the C language standard provides no guarantees about the alignment or
45399  * atomicity of device memory accesses. The recommended practice for writing
45400  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
45401  * alt_write_word() functions.
45402  *
45403  * The struct declaration for register ALT_USB_HOST_HCSPLT14.
45404  */
45405 struct ALT_USB_HOST_HCSPLT14_s
45406 {
45407  uint32_t prtaddr : 7; /* Port Address */
45408  uint32_t hubaddr : 7; /* Hub Address */
45409  uint32_t xactpos : 2; /* Transaction Position */
45410  uint32_t compsplt : 1; /* Do Complete Split */
45411  uint32_t : 14; /* *UNDEFINED* */
45412  uint32_t spltena : 1; /* Split Enable */
45413 };
45414 
45415 /* The typedef declaration for register ALT_USB_HOST_HCSPLT14. */
45416 typedef volatile struct ALT_USB_HOST_HCSPLT14_s ALT_USB_HOST_HCSPLT14_t;
45417 #endif /* __ASSEMBLY__ */
45418 
45419 /* The byte offset of the ALT_USB_HOST_HCSPLT14 register from the beginning of the component. */
45420 #define ALT_USB_HOST_HCSPLT14_OFST 0x2c4
45421 /* The address of the ALT_USB_HOST_HCSPLT14 register. */
45422 #define ALT_USB_HOST_HCSPLT14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT14_OFST))
45423 
45424 /*
45425  * Register : Host Channel 14 Interrupt Register - hcint14
45426  *
45427  * This register indicates the status of a channel with respect to USB- and AHB-
45428  * related events. The application must read this register when the Host Channels
45429  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
45430  * application can read this register, it must first read the Host All Channels
45431  * Interrupt (HAINT) register to get the exact channel number for the Host
45432  * Channel-n Interrupt register. The application must clear the appropriate bit in
45433  * this register to clear the corresponding bits in the HAINT and GINTSTS
45434  * registers.
45435  *
45436  * Register Layout
45437  *
45438  * Bits | Access | Reset | Description
45439  * :--------|:-------|:------|:--------------------------------------------
45440  * [0] | R | 0x0 | Transfer Completed
45441  * [1] | R | 0x0 | Channel Halted
45442  * [2] | R | 0x0 | AHB Error
45443  * [3] | R | 0x0 | STALL Response Received Interrupt
45444  * [4] | R | 0x0 | NAK Response Received Interrupt
45445  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
45446  * [6] | R | 0x0 | NYET Response Received Interrupt
45447  * [7] | R | 0x0 | Transaction Error
45448  * [8] | R | 0x0 | Babble Error
45449  * [9] | R | 0x0 | Frame Overrun
45450  * [10] | R | 0x0 | Data Toggle Error
45451  * [11] | R | 0x0 | BNA Interrupt
45452  * [12] | R | 0x0 | Excessive Transaction Error
45453  * [13] | R | 0x0 | Descriptor rollover interrupt
45454  * [31:14] | ??? | 0x0 | *UNDEFINED*
45455  *
45456  */
45457 /*
45458  * Field : Transfer Completed - xfercompl
45459  *
45460  * Transfer completed normally without any errors. This bit can be set only by the
45461  * core and the application should write 1 to clear it.
45462  *
45463  * Field Enumeration Values:
45464  *
45465  * Enum | Value | Description
45466  * :---------------------------------------|:------|:-----------------------------------------------
45467  * ALT_USB_HOST_HCINT14_XFERCOMPL_E_INACT | 0x0 | No transfer
45468  * ALT_USB_HOST_HCINT14_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
45469  *
45470  * Field Access Macros:
45471  *
45472  */
45473 /*
45474  * Enumerated value for register field ALT_USB_HOST_HCINT14_XFERCOMPL
45475  *
45476  * No transfer
45477  */
45478 #define ALT_USB_HOST_HCINT14_XFERCOMPL_E_INACT 0x0
45479 /*
45480  * Enumerated value for register field ALT_USB_HOST_HCINT14_XFERCOMPL
45481  *
45482  * Transfer completed normally without any errors
45483  */
45484 #define ALT_USB_HOST_HCINT14_XFERCOMPL_E_ACT 0x1
45485 
45486 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_XFERCOMPL register field. */
45487 #define ALT_USB_HOST_HCINT14_XFERCOMPL_LSB 0
45488 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_XFERCOMPL register field. */
45489 #define ALT_USB_HOST_HCINT14_XFERCOMPL_MSB 0
45490 /* The width in bits of the ALT_USB_HOST_HCINT14_XFERCOMPL register field. */
45491 #define ALT_USB_HOST_HCINT14_XFERCOMPL_WIDTH 1
45492 /* The mask used to set the ALT_USB_HOST_HCINT14_XFERCOMPL register field value. */
45493 #define ALT_USB_HOST_HCINT14_XFERCOMPL_SET_MSK 0x00000001
45494 /* The mask used to clear the ALT_USB_HOST_HCINT14_XFERCOMPL register field value. */
45495 #define ALT_USB_HOST_HCINT14_XFERCOMPL_CLR_MSK 0xfffffffe
45496 /* The reset value of the ALT_USB_HOST_HCINT14_XFERCOMPL register field. */
45497 #define ALT_USB_HOST_HCINT14_XFERCOMPL_RESET 0x0
45498 /* Extracts the ALT_USB_HOST_HCINT14_XFERCOMPL field value from a register. */
45499 #define ALT_USB_HOST_HCINT14_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
45500 /* Produces a ALT_USB_HOST_HCINT14_XFERCOMPL register field value suitable for setting the register. */
45501 #define ALT_USB_HOST_HCINT14_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
45502 
45503 /*
45504  * Field : Channel Halted - chhltd
45505  *
45506  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
45507  * either because of any USB transaction error or in response to disable request by
45508  * the application or because of a completed transfer. In Scatter/gather DMA mode,
45509  * this indicates that transfer completed due to any of the following
45510  *
45511  * . EOL being set in descriptor
45512  *
45513  * . AHB error
45514  *
45515  * . Excessive transaction errors
45516  *
45517  * . Babble
45518  *
45519  * . Stall
45520  *
45521  * Field Enumeration Values:
45522  *
45523  * Enum | Value | Description
45524  * :------------------------------------|:------|:-------------------
45525  * ALT_USB_HOST_HCINT14_CHHLTD_E_INACT | 0x0 | Channel not halted
45526  * ALT_USB_HOST_HCINT14_CHHLTD_E_ACT | 0x1 | Channel Halted
45527  *
45528  * Field Access Macros:
45529  *
45530  */
45531 /*
45532  * Enumerated value for register field ALT_USB_HOST_HCINT14_CHHLTD
45533  *
45534  * Channel not halted
45535  */
45536 #define ALT_USB_HOST_HCINT14_CHHLTD_E_INACT 0x0
45537 /*
45538  * Enumerated value for register field ALT_USB_HOST_HCINT14_CHHLTD
45539  *
45540  * Channel Halted
45541  */
45542 #define ALT_USB_HOST_HCINT14_CHHLTD_E_ACT 0x1
45543 
45544 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_CHHLTD register field. */
45545 #define ALT_USB_HOST_HCINT14_CHHLTD_LSB 1
45546 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_CHHLTD register field. */
45547 #define ALT_USB_HOST_HCINT14_CHHLTD_MSB 1
45548 /* The width in bits of the ALT_USB_HOST_HCINT14_CHHLTD register field. */
45549 #define ALT_USB_HOST_HCINT14_CHHLTD_WIDTH 1
45550 /* The mask used to set the ALT_USB_HOST_HCINT14_CHHLTD register field value. */
45551 #define ALT_USB_HOST_HCINT14_CHHLTD_SET_MSK 0x00000002
45552 /* The mask used to clear the ALT_USB_HOST_HCINT14_CHHLTD register field value. */
45553 #define ALT_USB_HOST_HCINT14_CHHLTD_CLR_MSK 0xfffffffd
45554 /* The reset value of the ALT_USB_HOST_HCINT14_CHHLTD register field. */
45555 #define ALT_USB_HOST_HCINT14_CHHLTD_RESET 0x0
45556 /* Extracts the ALT_USB_HOST_HCINT14_CHHLTD field value from a register. */
45557 #define ALT_USB_HOST_HCINT14_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
45558 /* Produces a ALT_USB_HOST_HCINT14_CHHLTD register field value suitable for setting the register. */
45559 #define ALT_USB_HOST_HCINT14_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
45560 
45561 /*
45562  * Field : AHB Error - ahberr
45563  *
45564  * This is generated only in Internal DMA mode when there is an AHB error during
45565  * AHB read/write. The application can read the corresponding channel's DMA address
45566  * register to get the error address.
45567  *
45568  * Field Enumeration Values:
45569  *
45570  * Enum | Value | Description
45571  * :------------------------------------|:------|:--------------------------------
45572  * ALT_USB_HOST_HCINT14_AHBERR_E_INACT | 0x0 | No AHB error
45573  * ALT_USB_HOST_HCINT14_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
45574  *
45575  * Field Access Macros:
45576  *
45577  */
45578 /*
45579  * Enumerated value for register field ALT_USB_HOST_HCINT14_AHBERR
45580  *
45581  * No AHB error
45582  */
45583 #define ALT_USB_HOST_HCINT14_AHBERR_E_INACT 0x0
45584 /*
45585  * Enumerated value for register field ALT_USB_HOST_HCINT14_AHBERR
45586  *
45587  * AHB error during AHB read/write
45588  */
45589 #define ALT_USB_HOST_HCINT14_AHBERR_E_ACT 0x1
45590 
45591 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_AHBERR register field. */
45592 #define ALT_USB_HOST_HCINT14_AHBERR_LSB 2
45593 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_AHBERR register field. */
45594 #define ALT_USB_HOST_HCINT14_AHBERR_MSB 2
45595 /* The width in bits of the ALT_USB_HOST_HCINT14_AHBERR register field. */
45596 #define ALT_USB_HOST_HCINT14_AHBERR_WIDTH 1
45597 /* The mask used to set the ALT_USB_HOST_HCINT14_AHBERR register field value. */
45598 #define ALT_USB_HOST_HCINT14_AHBERR_SET_MSK 0x00000004
45599 /* The mask used to clear the ALT_USB_HOST_HCINT14_AHBERR register field value. */
45600 #define ALT_USB_HOST_HCINT14_AHBERR_CLR_MSK 0xfffffffb
45601 /* The reset value of the ALT_USB_HOST_HCINT14_AHBERR register field. */
45602 #define ALT_USB_HOST_HCINT14_AHBERR_RESET 0x0
45603 /* Extracts the ALT_USB_HOST_HCINT14_AHBERR field value from a register. */
45604 #define ALT_USB_HOST_HCINT14_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
45605 /* Produces a ALT_USB_HOST_HCINT14_AHBERR register field value suitable for setting the register. */
45606 #define ALT_USB_HOST_HCINT14_AHBERR_SET(value) (((value) << 2) & 0x00000004)
45607 
45608 /*
45609  * Field : STALL Response Received Interrupt - stall
45610  *
45611  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
45612  * This bit can be set only by the core and the application should write 1 to clear
45613  * it.
45614  *
45615  * Field Enumeration Values:
45616  *
45617  * Enum | Value | Description
45618  * :-----------------------------------|:------|:-------------------
45619  * ALT_USB_HOST_HCINT14_STALL_E_INACT | 0x0 | No Stall Interrupt
45620  * ALT_USB_HOST_HCINT14_STALL_E_ACT | 0x1 | Stall Interrupt
45621  *
45622  * Field Access Macros:
45623  *
45624  */
45625 /*
45626  * Enumerated value for register field ALT_USB_HOST_HCINT14_STALL
45627  *
45628  * No Stall Interrupt
45629  */
45630 #define ALT_USB_HOST_HCINT14_STALL_E_INACT 0x0
45631 /*
45632  * Enumerated value for register field ALT_USB_HOST_HCINT14_STALL
45633  *
45634  * Stall Interrupt
45635  */
45636 #define ALT_USB_HOST_HCINT14_STALL_E_ACT 0x1
45637 
45638 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_STALL register field. */
45639 #define ALT_USB_HOST_HCINT14_STALL_LSB 3
45640 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_STALL register field. */
45641 #define ALT_USB_HOST_HCINT14_STALL_MSB 3
45642 /* The width in bits of the ALT_USB_HOST_HCINT14_STALL register field. */
45643 #define ALT_USB_HOST_HCINT14_STALL_WIDTH 1
45644 /* The mask used to set the ALT_USB_HOST_HCINT14_STALL register field value. */
45645 #define ALT_USB_HOST_HCINT14_STALL_SET_MSK 0x00000008
45646 /* The mask used to clear the ALT_USB_HOST_HCINT14_STALL register field value. */
45647 #define ALT_USB_HOST_HCINT14_STALL_CLR_MSK 0xfffffff7
45648 /* The reset value of the ALT_USB_HOST_HCINT14_STALL register field. */
45649 #define ALT_USB_HOST_HCINT14_STALL_RESET 0x0
45650 /* Extracts the ALT_USB_HOST_HCINT14_STALL field value from a register. */
45651 #define ALT_USB_HOST_HCINT14_STALL_GET(value) (((value) & 0x00000008) >> 3)
45652 /* Produces a ALT_USB_HOST_HCINT14_STALL register field value suitable for setting the register. */
45653 #define ALT_USB_HOST_HCINT14_STALL_SET(value) (((value) << 3) & 0x00000008)
45654 
45655 /*
45656  * Field : NAK Response Received Interrupt - nak
45657  *
45658  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
45659  * core.This bit can be set only by the core and the application should write 1 to
45660  * clear it.
45661  *
45662  * Field Enumeration Values:
45663  *
45664  * Enum | Value | Description
45665  * :---------------------------------|:------|:-----------------------------------
45666  * ALT_USB_HOST_HCINT14_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
45667  * ALT_USB_HOST_HCINT14_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
45668  *
45669  * Field Access Macros:
45670  *
45671  */
45672 /*
45673  * Enumerated value for register field ALT_USB_HOST_HCINT14_NAK
45674  *
45675  * No NAK Response Received Interrupt
45676  */
45677 #define ALT_USB_HOST_HCINT14_NAK_E_INACT 0x0
45678 /*
45679  * Enumerated value for register field ALT_USB_HOST_HCINT14_NAK
45680  *
45681  * NAK Response Received Interrupt
45682  */
45683 #define ALT_USB_HOST_HCINT14_NAK_E_ACT 0x1
45684 
45685 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_NAK register field. */
45686 #define ALT_USB_HOST_HCINT14_NAK_LSB 4
45687 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_NAK register field. */
45688 #define ALT_USB_HOST_HCINT14_NAK_MSB 4
45689 /* The width in bits of the ALT_USB_HOST_HCINT14_NAK register field. */
45690 #define ALT_USB_HOST_HCINT14_NAK_WIDTH 1
45691 /* The mask used to set the ALT_USB_HOST_HCINT14_NAK register field value. */
45692 #define ALT_USB_HOST_HCINT14_NAK_SET_MSK 0x00000010
45693 /* The mask used to clear the ALT_USB_HOST_HCINT14_NAK register field value. */
45694 #define ALT_USB_HOST_HCINT14_NAK_CLR_MSK 0xffffffef
45695 /* The reset value of the ALT_USB_HOST_HCINT14_NAK register field. */
45696 #define ALT_USB_HOST_HCINT14_NAK_RESET 0x0
45697 /* Extracts the ALT_USB_HOST_HCINT14_NAK field value from a register. */
45698 #define ALT_USB_HOST_HCINT14_NAK_GET(value) (((value) & 0x00000010) >> 4)
45699 /* Produces a ALT_USB_HOST_HCINT14_NAK register field value suitable for setting the register. */
45700 #define ALT_USB_HOST_HCINT14_NAK_SET(value) (((value) << 4) & 0x00000010)
45701 
45702 /*
45703  * Field : ACK Response Received Transmitted Interrupt - ack
45704  *
45705  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
45706  * This bit can be set only by the core and the application should write 1 to clear
45707  * it.
45708  *
45709  * Field Enumeration Values:
45710  *
45711  * Enum | Value | Description
45712  * :---------------------------------|:------|:-----------------------------------------------
45713  * ALT_USB_HOST_HCINT14_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
45714  * ALT_USB_HOST_HCINT14_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
45715  *
45716  * Field Access Macros:
45717  *
45718  */
45719 /*
45720  * Enumerated value for register field ALT_USB_HOST_HCINT14_ACK
45721  *
45722  * No ACK Response Received Transmitted Interrupt
45723  */
45724 #define ALT_USB_HOST_HCINT14_ACK_E_INACT 0x0
45725 /*
45726  * Enumerated value for register field ALT_USB_HOST_HCINT14_ACK
45727  *
45728  * ACK Response Received Transmitted Interrup
45729  */
45730 #define ALT_USB_HOST_HCINT14_ACK_E_ACT 0x1
45731 
45732 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_ACK register field. */
45733 #define ALT_USB_HOST_HCINT14_ACK_LSB 5
45734 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_ACK register field. */
45735 #define ALT_USB_HOST_HCINT14_ACK_MSB 5
45736 /* The width in bits of the ALT_USB_HOST_HCINT14_ACK register field. */
45737 #define ALT_USB_HOST_HCINT14_ACK_WIDTH 1
45738 /* The mask used to set the ALT_USB_HOST_HCINT14_ACK register field value. */
45739 #define ALT_USB_HOST_HCINT14_ACK_SET_MSK 0x00000020
45740 /* The mask used to clear the ALT_USB_HOST_HCINT14_ACK register field value. */
45741 #define ALT_USB_HOST_HCINT14_ACK_CLR_MSK 0xffffffdf
45742 /* The reset value of the ALT_USB_HOST_HCINT14_ACK register field. */
45743 #define ALT_USB_HOST_HCINT14_ACK_RESET 0x0
45744 /* Extracts the ALT_USB_HOST_HCINT14_ACK field value from a register. */
45745 #define ALT_USB_HOST_HCINT14_ACK_GET(value) (((value) & 0x00000020) >> 5)
45746 /* Produces a ALT_USB_HOST_HCINT14_ACK register field value suitable for setting the register. */
45747 #define ALT_USB_HOST_HCINT14_ACK_SET(value) (((value) << 5) & 0x00000020)
45748 
45749 /*
45750  * Field : NYET Response Received Interrupt - nyet
45751  *
45752  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
45753  * core.This bit can be set only by the core and the application should write 1 to
45754  * clear it.
45755  *
45756  * Field Enumeration Values:
45757  *
45758  * Enum | Value | Description
45759  * :----------------------------------|:------|:------------------------------------
45760  * ALT_USB_HOST_HCINT14_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
45761  * ALT_USB_HOST_HCINT14_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
45762  *
45763  * Field Access Macros:
45764  *
45765  */
45766 /*
45767  * Enumerated value for register field ALT_USB_HOST_HCINT14_NYET
45768  *
45769  * No NYET Response Received Interrupt
45770  */
45771 #define ALT_USB_HOST_HCINT14_NYET_E_INACT 0x0
45772 /*
45773  * Enumerated value for register field ALT_USB_HOST_HCINT14_NYET
45774  *
45775  * NYET Response Received Interrupt
45776  */
45777 #define ALT_USB_HOST_HCINT14_NYET_E_ACT 0x1
45778 
45779 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_NYET register field. */
45780 #define ALT_USB_HOST_HCINT14_NYET_LSB 6
45781 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_NYET register field. */
45782 #define ALT_USB_HOST_HCINT14_NYET_MSB 6
45783 /* The width in bits of the ALT_USB_HOST_HCINT14_NYET register field. */
45784 #define ALT_USB_HOST_HCINT14_NYET_WIDTH 1
45785 /* The mask used to set the ALT_USB_HOST_HCINT14_NYET register field value. */
45786 #define ALT_USB_HOST_HCINT14_NYET_SET_MSK 0x00000040
45787 /* The mask used to clear the ALT_USB_HOST_HCINT14_NYET register field value. */
45788 #define ALT_USB_HOST_HCINT14_NYET_CLR_MSK 0xffffffbf
45789 /* The reset value of the ALT_USB_HOST_HCINT14_NYET register field. */
45790 #define ALT_USB_HOST_HCINT14_NYET_RESET 0x0
45791 /* Extracts the ALT_USB_HOST_HCINT14_NYET field value from a register. */
45792 #define ALT_USB_HOST_HCINT14_NYET_GET(value) (((value) & 0x00000040) >> 6)
45793 /* Produces a ALT_USB_HOST_HCINT14_NYET register field value suitable for setting the register. */
45794 #define ALT_USB_HOST_HCINT14_NYET_SET(value) (((value) << 6) & 0x00000040)
45795 
45796 /*
45797  * Field : Transaction Error - xacterr
45798  *
45799  * Indicates one of the following errors occurred on the USB.-CRC check failure
45800  *
45801  * * Timeout
45802  *
45803  * * Bit stuff error
45804  *
45805  * * False EOP
45806  *
45807  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
45808  * This bit can be set only by the core and the application should write 1 to clear
45809  * it.
45810  *
45811  * Field Enumeration Values:
45812  *
45813  * Enum | Value | Description
45814  * :-------------------------------------|:------|:---------------------
45815  * ALT_USB_HOST_HCINT14_XACTERR_E_INACT | 0x0 | No Transaction Error
45816  * ALT_USB_HOST_HCINT14_XACTERR_E_ACT | 0x1 | Transaction Error
45817  *
45818  * Field Access Macros:
45819  *
45820  */
45821 /*
45822  * Enumerated value for register field ALT_USB_HOST_HCINT14_XACTERR
45823  *
45824  * No Transaction Error
45825  */
45826 #define ALT_USB_HOST_HCINT14_XACTERR_E_INACT 0x0
45827 /*
45828  * Enumerated value for register field ALT_USB_HOST_HCINT14_XACTERR
45829  *
45830  * Transaction Error
45831  */
45832 #define ALT_USB_HOST_HCINT14_XACTERR_E_ACT 0x1
45833 
45834 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_XACTERR register field. */
45835 #define ALT_USB_HOST_HCINT14_XACTERR_LSB 7
45836 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_XACTERR register field. */
45837 #define ALT_USB_HOST_HCINT14_XACTERR_MSB 7
45838 /* The width in bits of the ALT_USB_HOST_HCINT14_XACTERR register field. */
45839 #define ALT_USB_HOST_HCINT14_XACTERR_WIDTH 1
45840 /* The mask used to set the ALT_USB_HOST_HCINT14_XACTERR register field value. */
45841 #define ALT_USB_HOST_HCINT14_XACTERR_SET_MSK 0x00000080
45842 /* The mask used to clear the ALT_USB_HOST_HCINT14_XACTERR register field value. */
45843 #define ALT_USB_HOST_HCINT14_XACTERR_CLR_MSK 0xffffff7f
45844 /* The reset value of the ALT_USB_HOST_HCINT14_XACTERR register field. */
45845 #define ALT_USB_HOST_HCINT14_XACTERR_RESET 0x0
45846 /* Extracts the ALT_USB_HOST_HCINT14_XACTERR field value from a register. */
45847 #define ALT_USB_HOST_HCINT14_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
45848 /* Produces a ALT_USB_HOST_HCINT14_XACTERR register field value suitable for setting the register. */
45849 #define ALT_USB_HOST_HCINT14_XACTERR_SET(value) (((value) << 7) & 0x00000080)
45850 
45851 /*
45852  * Field : Babble Error - bblerr
45853  *
45854  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
45855  * core..This bit can be set only by the core and the application should write 1 to
45856  * clear it.
45857  *
45858  * Field Enumeration Values:
45859  *
45860  * Enum | Value | Description
45861  * :------------------------------------|:------|:----------------
45862  * ALT_USB_HOST_HCINT14_BBLERR_E_INACT | 0x0 | No Babble Error
45863  * ALT_USB_HOST_HCINT14_BBLERR_E_ACT | 0x1 | Babble Error
45864  *
45865  * Field Access Macros:
45866  *
45867  */
45868 /*
45869  * Enumerated value for register field ALT_USB_HOST_HCINT14_BBLERR
45870  *
45871  * No Babble Error
45872  */
45873 #define ALT_USB_HOST_HCINT14_BBLERR_E_INACT 0x0
45874 /*
45875  * Enumerated value for register field ALT_USB_HOST_HCINT14_BBLERR
45876  *
45877  * Babble Error
45878  */
45879 #define ALT_USB_HOST_HCINT14_BBLERR_E_ACT 0x1
45880 
45881 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_BBLERR register field. */
45882 #define ALT_USB_HOST_HCINT14_BBLERR_LSB 8
45883 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_BBLERR register field. */
45884 #define ALT_USB_HOST_HCINT14_BBLERR_MSB 8
45885 /* The width in bits of the ALT_USB_HOST_HCINT14_BBLERR register field. */
45886 #define ALT_USB_HOST_HCINT14_BBLERR_WIDTH 1
45887 /* The mask used to set the ALT_USB_HOST_HCINT14_BBLERR register field value. */
45888 #define ALT_USB_HOST_HCINT14_BBLERR_SET_MSK 0x00000100
45889 /* The mask used to clear the ALT_USB_HOST_HCINT14_BBLERR register field value. */
45890 #define ALT_USB_HOST_HCINT14_BBLERR_CLR_MSK 0xfffffeff
45891 /* The reset value of the ALT_USB_HOST_HCINT14_BBLERR register field. */
45892 #define ALT_USB_HOST_HCINT14_BBLERR_RESET 0x0
45893 /* Extracts the ALT_USB_HOST_HCINT14_BBLERR field value from a register. */
45894 #define ALT_USB_HOST_HCINT14_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
45895 /* Produces a ALT_USB_HOST_HCINT14_BBLERR register field value suitable for setting the register. */
45896 #define ALT_USB_HOST_HCINT14_BBLERR_SET(value) (((value) << 8) & 0x00000100)
45897 
45898 /*
45899  * Field : Frame Overrun - frmovrun
45900  *
45901  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
45902  * This bit can be set only by the core and the application should write 1 to clear
45903  * it.
45904  *
45905  * Field Enumeration Values:
45906  *
45907  * Enum | Value | Description
45908  * :--------------------------------------|:------|:-----------------
45909  * ALT_USB_HOST_HCINT14_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
45910  * ALT_USB_HOST_HCINT14_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
45911  *
45912  * Field Access Macros:
45913  *
45914  */
45915 /*
45916  * Enumerated value for register field ALT_USB_HOST_HCINT14_FRMOVRUN
45917  *
45918  * No Frame Overrun
45919  */
45920 #define ALT_USB_HOST_HCINT14_FRMOVRUN_E_INACT 0x0
45921 /*
45922  * Enumerated value for register field ALT_USB_HOST_HCINT14_FRMOVRUN
45923  *
45924  * Frame Overrun
45925  */
45926 #define ALT_USB_HOST_HCINT14_FRMOVRUN_E_ACT 0x1
45927 
45928 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_FRMOVRUN register field. */
45929 #define ALT_USB_HOST_HCINT14_FRMOVRUN_LSB 9
45930 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_FRMOVRUN register field. */
45931 #define ALT_USB_HOST_HCINT14_FRMOVRUN_MSB 9
45932 /* The width in bits of the ALT_USB_HOST_HCINT14_FRMOVRUN register field. */
45933 #define ALT_USB_HOST_HCINT14_FRMOVRUN_WIDTH 1
45934 /* The mask used to set the ALT_USB_HOST_HCINT14_FRMOVRUN register field value. */
45935 #define ALT_USB_HOST_HCINT14_FRMOVRUN_SET_MSK 0x00000200
45936 /* The mask used to clear the ALT_USB_HOST_HCINT14_FRMOVRUN register field value. */
45937 #define ALT_USB_HOST_HCINT14_FRMOVRUN_CLR_MSK 0xfffffdff
45938 /* The reset value of the ALT_USB_HOST_HCINT14_FRMOVRUN register field. */
45939 #define ALT_USB_HOST_HCINT14_FRMOVRUN_RESET 0x0
45940 /* Extracts the ALT_USB_HOST_HCINT14_FRMOVRUN field value from a register. */
45941 #define ALT_USB_HOST_HCINT14_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
45942 /* Produces a ALT_USB_HOST_HCINT14_FRMOVRUN register field value suitable for setting the register. */
45943 #define ALT_USB_HOST_HCINT14_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
45944 
45945 /*
45946  * Field : Data Toggle Error - datatglerr
45947  *
45948  * This bit can be set only by the core and the application should write 1 to clear
45949  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
45950  * core.
45951  *
45952  * Field Enumeration Values:
45953  *
45954  * Enum | Value | Description
45955  * :----------------------------------------|:------|:---------------------
45956  * ALT_USB_HOST_HCINT14_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
45957  * ALT_USB_HOST_HCINT14_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
45958  *
45959  * Field Access Macros:
45960  *
45961  */
45962 /*
45963  * Enumerated value for register field ALT_USB_HOST_HCINT14_DATATGLERR
45964  *
45965  * No Data Toggle Error
45966  */
45967 #define ALT_USB_HOST_HCINT14_DATATGLERR_E_INACT 0x0
45968 /*
45969  * Enumerated value for register field ALT_USB_HOST_HCINT14_DATATGLERR
45970  *
45971  * Data Toggle Error
45972  */
45973 #define ALT_USB_HOST_HCINT14_DATATGLERR_E_ACT 0x1
45974 
45975 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_DATATGLERR register field. */
45976 #define ALT_USB_HOST_HCINT14_DATATGLERR_LSB 10
45977 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_DATATGLERR register field. */
45978 #define ALT_USB_HOST_HCINT14_DATATGLERR_MSB 10
45979 /* The width in bits of the ALT_USB_HOST_HCINT14_DATATGLERR register field. */
45980 #define ALT_USB_HOST_HCINT14_DATATGLERR_WIDTH 1
45981 /* The mask used to set the ALT_USB_HOST_HCINT14_DATATGLERR register field value. */
45982 #define ALT_USB_HOST_HCINT14_DATATGLERR_SET_MSK 0x00000400
45983 /* The mask used to clear the ALT_USB_HOST_HCINT14_DATATGLERR register field value. */
45984 #define ALT_USB_HOST_HCINT14_DATATGLERR_CLR_MSK 0xfffffbff
45985 /* The reset value of the ALT_USB_HOST_HCINT14_DATATGLERR register field. */
45986 #define ALT_USB_HOST_HCINT14_DATATGLERR_RESET 0x0
45987 /* Extracts the ALT_USB_HOST_HCINT14_DATATGLERR field value from a register. */
45988 #define ALT_USB_HOST_HCINT14_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
45989 /* Produces a ALT_USB_HOST_HCINT14_DATATGLERR register field value suitable for setting the register. */
45990 #define ALT_USB_HOST_HCINT14_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
45991 
45992 /*
45993  * Field : BNA Interrupt - bnaintr
45994  *
45995  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
45996  * generates this interrupt when the descriptor accessed is not ready for the Core
45997  * to process. BNA will not be generated for Isochronous channels. for non
45998  * Scatter/Gather DMA mode, this bit is reserved.
45999  *
46000  * Field Enumeration Values:
46001  *
46002  * Enum | Value | Description
46003  * :-------------------------------------|:------|:-----------------
46004  * ALT_USB_HOST_HCINT14_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
46005  * ALT_USB_HOST_HCINT14_BNAINTR_E_ACT | 0x1 | BNA Interrupt
46006  *
46007  * Field Access Macros:
46008  *
46009  */
46010 /*
46011  * Enumerated value for register field ALT_USB_HOST_HCINT14_BNAINTR
46012  *
46013  * No BNA Interrupt
46014  */
46015 #define ALT_USB_HOST_HCINT14_BNAINTR_E_INACT 0x0
46016 /*
46017  * Enumerated value for register field ALT_USB_HOST_HCINT14_BNAINTR
46018  *
46019  * BNA Interrupt
46020  */
46021 #define ALT_USB_HOST_HCINT14_BNAINTR_E_ACT 0x1
46022 
46023 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_BNAINTR register field. */
46024 #define ALT_USB_HOST_HCINT14_BNAINTR_LSB 11
46025 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_BNAINTR register field. */
46026 #define ALT_USB_HOST_HCINT14_BNAINTR_MSB 11
46027 /* The width in bits of the ALT_USB_HOST_HCINT14_BNAINTR register field. */
46028 #define ALT_USB_HOST_HCINT14_BNAINTR_WIDTH 1
46029 /* The mask used to set the ALT_USB_HOST_HCINT14_BNAINTR register field value. */
46030 #define ALT_USB_HOST_HCINT14_BNAINTR_SET_MSK 0x00000800
46031 /* The mask used to clear the ALT_USB_HOST_HCINT14_BNAINTR register field value. */
46032 #define ALT_USB_HOST_HCINT14_BNAINTR_CLR_MSK 0xfffff7ff
46033 /* The reset value of the ALT_USB_HOST_HCINT14_BNAINTR register field. */
46034 #define ALT_USB_HOST_HCINT14_BNAINTR_RESET 0x0
46035 /* Extracts the ALT_USB_HOST_HCINT14_BNAINTR field value from a register. */
46036 #define ALT_USB_HOST_HCINT14_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
46037 /* Produces a ALT_USB_HOST_HCINT14_BNAINTR register field value suitable for setting the register. */
46038 #define ALT_USB_HOST_HCINT14_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
46039 
46040 /*
46041  * Field : Excessive Transaction Error - xcs_xact_err
46042  *
46043  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
46044  * this bit when 3 consecutive transaction errors occurred on the USB bus.
46045  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
46046  * Scatter/Gather DMA mode, this bit is reserved.
46047  *
46048  * Field Enumeration Values:
46049  *
46050  * Enum | Value | Description
46051  * :--------------------------------------------|:------|:-------------------------------
46052  * ALT_USB_HOST_HCINT14_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
46053  * ALT_USB_HOST_HCINT14_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
46054  *
46055  * Field Access Macros:
46056  *
46057  */
46058 /*
46059  * Enumerated value for register field ALT_USB_HOST_HCINT14_XCS_XACT_ERR
46060  *
46061  * No Excessive Transaction Error
46062  */
46063 #define ALT_USB_HOST_HCINT14_XCS_XACT_ERR_E_INACT 0x0
46064 /*
46065  * Enumerated value for register field ALT_USB_HOST_HCINT14_XCS_XACT_ERR
46066  *
46067  * Excessive Transaction Error
46068  */
46069 #define ALT_USB_HOST_HCINT14_XCS_XACT_ERR_E_ACVTIVE 0x1
46070 
46071 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_XCS_XACT_ERR register field. */
46072 #define ALT_USB_HOST_HCINT14_XCS_XACT_ERR_LSB 12
46073 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_XCS_XACT_ERR register field. */
46074 #define ALT_USB_HOST_HCINT14_XCS_XACT_ERR_MSB 12
46075 /* The width in bits of the ALT_USB_HOST_HCINT14_XCS_XACT_ERR register field. */
46076 #define ALT_USB_HOST_HCINT14_XCS_XACT_ERR_WIDTH 1
46077 /* The mask used to set the ALT_USB_HOST_HCINT14_XCS_XACT_ERR register field value. */
46078 #define ALT_USB_HOST_HCINT14_XCS_XACT_ERR_SET_MSK 0x00001000
46079 /* The mask used to clear the ALT_USB_HOST_HCINT14_XCS_XACT_ERR register field value. */
46080 #define ALT_USB_HOST_HCINT14_XCS_XACT_ERR_CLR_MSK 0xffffefff
46081 /* The reset value of the ALT_USB_HOST_HCINT14_XCS_XACT_ERR register field. */
46082 #define ALT_USB_HOST_HCINT14_XCS_XACT_ERR_RESET 0x0
46083 /* Extracts the ALT_USB_HOST_HCINT14_XCS_XACT_ERR field value from a register. */
46084 #define ALT_USB_HOST_HCINT14_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
46085 /* Produces a ALT_USB_HOST_HCINT14_XCS_XACT_ERR register field value suitable for setting the register. */
46086 #define ALT_USB_HOST_HCINT14_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
46087 
46088 /*
46089  * Field : Descriptor rollover interrupt - desc_lst_rollintr
46090  *
46091  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
46092  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
46093  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
46094  * mode, this bit is reserved.
46095  *
46096  * Field Enumeration Values:
46097  *
46098  * Enum | Value | Description
46099  * :-----------------------------------------------|:------|:---------------------------------
46100  * ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
46101  * ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
46102  *
46103  * Field Access Macros:
46104  *
46105  */
46106 /*
46107  * Enumerated value for register field ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR
46108  *
46109  * No Descriptor rollover interrupt
46110  */
46111 #define ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR_E_INACT 0x0
46112 /*
46113  * Enumerated value for register field ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR
46114  *
46115  * Descriptor rollover interrupt
46116  */
46117 #define ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR_E_ACT 0x1
46118 
46119 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR register field. */
46120 #define ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR_LSB 13
46121 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR register field. */
46122 #define ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR_MSB 13
46123 /* The width in bits of the ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR register field. */
46124 #define ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR_WIDTH 1
46125 /* The mask used to set the ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR register field value. */
46126 #define ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR_SET_MSK 0x00002000
46127 /* The mask used to clear the ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR register field value. */
46128 #define ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
46129 /* The reset value of the ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR register field. */
46130 #define ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR_RESET 0x0
46131 /* Extracts the ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR field value from a register. */
46132 #define ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
46133 /* Produces a ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR register field value suitable for setting the register. */
46134 #define ALT_USB_HOST_HCINT14_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
46135 
46136 #ifndef __ASSEMBLY__
46137 /*
46138  * WARNING: The C register and register group struct declarations are provided for
46139  * convenience and illustrative purposes. They should, however, be used with
46140  * caution as the C language standard provides no guarantees about the alignment or
46141  * atomicity of device memory accesses. The recommended practice for writing
46142  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
46143  * alt_write_word() functions.
46144  *
46145  * The struct declaration for register ALT_USB_HOST_HCINT14.
46146  */
46147 struct ALT_USB_HOST_HCINT14_s
46148 {
46149  const uint32_t xfercompl : 1; /* Transfer Completed */
46150  const uint32_t chhltd : 1; /* Channel Halted */
46151  const uint32_t ahberr : 1; /* AHB Error */
46152  const uint32_t stall : 1; /* STALL Response Received Interrupt */
46153  const uint32_t nak : 1; /* NAK Response Received Interrupt */
46154  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
46155  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
46156  const uint32_t xacterr : 1; /* Transaction Error */
46157  const uint32_t bblerr : 1; /* Babble Error */
46158  const uint32_t frmovrun : 1; /* Frame Overrun */
46159  const uint32_t datatglerr : 1; /* Data Toggle Error */
46160  const uint32_t bnaintr : 1; /* BNA Interrupt */
46161  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
46162  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
46163  uint32_t : 18; /* *UNDEFINED* */
46164 };
46165 
46166 /* The typedef declaration for register ALT_USB_HOST_HCINT14. */
46167 typedef volatile struct ALT_USB_HOST_HCINT14_s ALT_USB_HOST_HCINT14_t;
46168 #endif /* __ASSEMBLY__ */
46169 
46170 /* The byte offset of the ALT_USB_HOST_HCINT14 register from the beginning of the component. */
46171 #define ALT_USB_HOST_HCINT14_OFST 0x2c8
46172 /* The address of the ALT_USB_HOST_HCINT14 register. */
46173 #define ALT_USB_HOST_HCINT14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT14_OFST))
46174 
46175 /*
46176  * Register : Host Channel 14 Interrupt Mask Register - hcintmsk14
46177  *
46178  * This register reflects the mask for each channel status described in the
46179  * previous section.
46180  *
46181  * Register Layout
46182  *
46183  * Bits | Access | Reset | Description
46184  * :--------|:-------|:------|:----------------------------------
46185  * [0] | RW | 0x0 | Transfer Completed Mask
46186  * [1] | RW | 0x0 | Channel Halted Mask
46187  * [2] | RW | 0x0 | AHB Error Mask
46188  * [10:3] | ??? | 0x0 | *UNDEFINED*
46189  * [11] | RW | 0x0 | BNA Interrupt mask
46190  * [12] | ??? | 0x0 | *UNDEFINED*
46191  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
46192  * [31:14] | ??? | 0x0 | *UNDEFINED*
46193  *
46194  */
46195 /*
46196  * Field : Transfer Completed Mask - xfercomplmsk
46197  *
46198  * Transfer complete.
46199  *
46200  * Field Enumeration Values:
46201  *
46202  * Enum | Value | Description
46203  * :---------------------------------------------|:------|:------------
46204  * ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK_E_MSK | 0x0 | Mask
46205  * ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
46206  *
46207  * Field Access Macros:
46208  *
46209  */
46210 /*
46211  * Enumerated value for register field ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK
46212  *
46213  * Mask
46214  */
46215 #define ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK_E_MSK 0x0
46216 /*
46217  * Enumerated value for register field ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK
46218  *
46219  * No mask
46220  */
46221 #define ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK_E_NOMSK 0x1
46222 
46223 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK register field. */
46224 #define ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK_LSB 0
46225 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK register field. */
46226 #define ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK_MSB 0
46227 /* The width in bits of the ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK register field. */
46228 #define ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK_WIDTH 1
46229 /* The mask used to set the ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK register field value. */
46230 #define ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK_SET_MSK 0x00000001
46231 /* The mask used to clear the ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK register field value. */
46232 #define ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK_CLR_MSK 0xfffffffe
46233 /* The reset value of the ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK register field. */
46234 #define ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK_RESET 0x0
46235 /* Extracts the ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK field value from a register. */
46236 #define ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
46237 /* Produces a ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK register field value suitable for setting the register. */
46238 #define ALT_USB_HOST_HCINTMSK14_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
46239 
46240 /*
46241  * Field : Channel Halted Mask - chhltdmsk
46242  *
46243  * Channel Halted.
46244  *
46245  * Field Enumeration Values:
46246  *
46247  * Enum | Value | Description
46248  * :------------------------------------------|:------|:------------
46249  * ALT_USB_HOST_HCINTMSK14_CHHLTDMSK_E_MSK | 0x0 | Mask
46250  * ALT_USB_HOST_HCINTMSK14_CHHLTDMSK_E_NOMSK | 0x1 | No mask
46251  *
46252  * Field Access Macros:
46253  *
46254  */
46255 /*
46256  * Enumerated value for register field ALT_USB_HOST_HCINTMSK14_CHHLTDMSK
46257  *
46258  * Mask
46259  */
46260 #define ALT_USB_HOST_HCINTMSK14_CHHLTDMSK_E_MSK 0x0
46261 /*
46262  * Enumerated value for register field ALT_USB_HOST_HCINTMSK14_CHHLTDMSK
46263  *
46264  * No mask
46265  */
46266 #define ALT_USB_HOST_HCINTMSK14_CHHLTDMSK_E_NOMSK 0x1
46267 
46268 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK14_CHHLTDMSK register field. */
46269 #define ALT_USB_HOST_HCINTMSK14_CHHLTDMSK_LSB 1
46270 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK14_CHHLTDMSK register field. */
46271 #define ALT_USB_HOST_HCINTMSK14_CHHLTDMSK_MSB 1
46272 /* The width in bits of the ALT_USB_HOST_HCINTMSK14_CHHLTDMSK register field. */
46273 #define ALT_USB_HOST_HCINTMSK14_CHHLTDMSK_WIDTH 1
46274 /* The mask used to set the ALT_USB_HOST_HCINTMSK14_CHHLTDMSK register field value. */
46275 #define ALT_USB_HOST_HCINTMSK14_CHHLTDMSK_SET_MSK 0x00000002
46276 /* The mask used to clear the ALT_USB_HOST_HCINTMSK14_CHHLTDMSK register field value. */
46277 #define ALT_USB_HOST_HCINTMSK14_CHHLTDMSK_CLR_MSK 0xfffffffd
46278 /* The reset value of the ALT_USB_HOST_HCINTMSK14_CHHLTDMSK register field. */
46279 #define ALT_USB_HOST_HCINTMSK14_CHHLTDMSK_RESET 0x0
46280 /* Extracts the ALT_USB_HOST_HCINTMSK14_CHHLTDMSK field value from a register. */
46281 #define ALT_USB_HOST_HCINTMSK14_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
46282 /* Produces a ALT_USB_HOST_HCINTMSK14_CHHLTDMSK register field value suitable for setting the register. */
46283 #define ALT_USB_HOST_HCINTMSK14_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
46284 
46285 /*
46286  * Field : AHB Error Mask - ahberrmsk
46287  *
46288  * In scatter/gather DMA mode for host, interrupts will not be generated due to
46289  * the corresponding bits set in HCINTn.
46290  *
46291  * Field Enumeration Values:
46292  *
46293  * Enum | Value | Description
46294  * :------------------------------------------|:------|:------------
46295  * ALT_USB_HOST_HCINTMSK14_AHBERRMSK_E_MSK | 0x0 | Mask
46296  * ALT_USB_HOST_HCINTMSK14_AHBERRMSK_E_NOMSK | 0x1 | No mask
46297  *
46298  * Field Access Macros:
46299  *
46300  */
46301 /*
46302  * Enumerated value for register field ALT_USB_HOST_HCINTMSK14_AHBERRMSK
46303  *
46304  * Mask
46305  */
46306 #define ALT_USB_HOST_HCINTMSK14_AHBERRMSK_E_MSK 0x0
46307 /*
46308  * Enumerated value for register field ALT_USB_HOST_HCINTMSK14_AHBERRMSK
46309  *
46310  * No mask
46311  */
46312 #define ALT_USB_HOST_HCINTMSK14_AHBERRMSK_E_NOMSK 0x1
46313 
46314 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK14_AHBERRMSK register field. */
46315 #define ALT_USB_HOST_HCINTMSK14_AHBERRMSK_LSB 2
46316 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK14_AHBERRMSK register field. */
46317 #define ALT_USB_HOST_HCINTMSK14_AHBERRMSK_MSB 2
46318 /* The width in bits of the ALT_USB_HOST_HCINTMSK14_AHBERRMSK register field. */
46319 #define ALT_USB_HOST_HCINTMSK14_AHBERRMSK_WIDTH 1
46320 /* The mask used to set the ALT_USB_HOST_HCINTMSK14_AHBERRMSK register field value. */
46321 #define ALT_USB_HOST_HCINTMSK14_AHBERRMSK_SET_MSK 0x00000004
46322 /* The mask used to clear the ALT_USB_HOST_HCINTMSK14_AHBERRMSK register field value. */
46323 #define ALT_USB_HOST_HCINTMSK14_AHBERRMSK_CLR_MSK 0xfffffffb
46324 /* The reset value of the ALT_USB_HOST_HCINTMSK14_AHBERRMSK register field. */
46325 #define ALT_USB_HOST_HCINTMSK14_AHBERRMSK_RESET 0x0
46326 /* Extracts the ALT_USB_HOST_HCINTMSK14_AHBERRMSK field value from a register. */
46327 #define ALT_USB_HOST_HCINTMSK14_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
46328 /* Produces a ALT_USB_HOST_HCINTMSK14_AHBERRMSK register field value suitable for setting the register. */
46329 #define ALT_USB_HOST_HCINTMSK14_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
46330 
46331 /*
46332  * Field : BNA Interrupt mask - bnaintrmsk
46333  *
46334  * This bit is valid only when Scatter/Gather DMA mode is enabled.
46335  *
46336  * Field Enumeration Values:
46337  *
46338  * Enum | Value | Description
46339  * :-------------------------------------------|:------|:------------
46340  * ALT_USB_HOST_HCINTMSK14_BNAINTRMSK_E_MSK | 0x0 | Mask
46341  * ALT_USB_HOST_HCINTMSK14_BNAINTRMSK_E_NOMSK | 0x1 | No mask
46342  *
46343  * Field Access Macros:
46344  *
46345  */
46346 /*
46347  * Enumerated value for register field ALT_USB_HOST_HCINTMSK14_BNAINTRMSK
46348  *
46349  * Mask
46350  */
46351 #define ALT_USB_HOST_HCINTMSK14_BNAINTRMSK_E_MSK 0x0
46352 /*
46353  * Enumerated value for register field ALT_USB_HOST_HCINTMSK14_BNAINTRMSK
46354  *
46355  * No mask
46356  */
46357 #define ALT_USB_HOST_HCINTMSK14_BNAINTRMSK_E_NOMSK 0x1
46358 
46359 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK14_BNAINTRMSK register field. */
46360 #define ALT_USB_HOST_HCINTMSK14_BNAINTRMSK_LSB 11
46361 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK14_BNAINTRMSK register field. */
46362 #define ALT_USB_HOST_HCINTMSK14_BNAINTRMSK_MSB 11
46363 /* The width in bits of the ALT_USB_HOST_HCINTMSK14_BNAINTRMSK register field. */
46364 #define ALT_USB_HOST_HCINTMSK14_BNAINTRMSK_WIDTH 1
46365 /* The mask used to set the ALT_USB_HOST_HCINTMSK14_BNAINTRMSK register field value. */
46366 #define ALT_USB_HOST_HCINTMSK14_BNAINTRMSK_SET_MSK 0x00000800
46367 /* The mask used to clear the ALT_USB_HOST_HCINTMSK14_BNAINTRMSK register field value. */
46368 #define ALT_USB_HOST_HCINTMSK14_BNAINTRMSK_CLR_MSK 0xfffff7ff
46369 /* The reset value of the ALT_USB_HOST_HCINTMSK14_BNAINTRMSK register field. */
46370 #define ALT_USB_HOST_HCINTMSK14_BNAINTRMSK_RESET 0x0
46371 /* Extracts the ALT_USB_HOST_HCINTMSK14_BNAINTRMSK field value from a register. */
46372 #define ALT_USB_HOST_HCINTMSK14_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
46373 /* Produces a ALT_USB_HOST_HCINTMSK14_BNAINTRMSK register field value suitable for setting the register. */
46374 #define ALT_USB_HOST_HCINTMSK14_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
46375 
46376 /*
46377  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
46378  *
46379  * This bit is valid only when Scatter/Gather DMA mode is enabled.
46380  *
46381  * Field Enumeration Values:
46382  *
46383  * Enum | Value | Description
46384  * :----------------------------------------------------|:------|:------------
46385  * ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
46386  * ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
46387  *
46388  * Field Access Macros:
46389  *
46390  */
46391 /*
46392  * Enumerated value for register field ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK
46393  *
46394  * Mask
46395  */
46396 #define ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK_E_MSK 0x0
46397 /*
46398  * Enumerated value for register field ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK
46399  *
46400  * No mask
46401  */
46402 #define ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
46403 
46404 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK register field. */
46405 #define ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK_LSB 13
46406 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK register field. */
46407 #define ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK_MSB 13
46408 /* The width in bits of the ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK register field. */
46409 #define ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK_WIDTH 1
46410 /* The mask used to set the ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK register field value. */
46411 #define ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
46412 /* The mask used to clear the ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK register field value. */
46413 #define ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
46414 /* The reset value of the ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK register field. */
46415 #define ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK_RESET 0x0
46416 /* Extracts the ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK field value from a register. */
46417 #define ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
46418 /* Produces a ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
46419 #define ALT_USB_HOST_HCINTMSK14_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
46420 
46421 #ifndef __ASSEMBLY__
46422 /*
46423  * WARNING: The C register and register group struct declarations are provided for
46424  * convenience and illustrative purposes. They should, however, be used with
46425  * caution as the C language standard provides no guarantees about the alignment or
46426  * atomicity of device memory accesses. The recommended practice for writing
46427  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
46428  * alt_write_word() functions.
46429  *
46430  * The struct declaration for register ALT_USB_HOST_HCINTMSK14.
46431  */
46432 struct ALT_USB_HOST_HCINTMSK14_s
46433 {
46434  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
46435  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
46436  uint32_t ahberrmsk : 1; /* AHB Error Mask */
46437  uint32_t : 8; /* *UNDEFINED* */
46438  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
46439  uint32_t : 1; /* *UNDEFINED* */
46440  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
46441  uint32_t : 18; /* *UNDEFINED* */
46442 };
46443 
46444 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK14. */
46445 typedef volatile struct ALT_USB_HOST_HCINTMSK14_s ALT_USB_HOST_HCINTMSK14_t;
46446 #endif /* __ASSEMBLY__ */
46447 
46448 /* The byte offset of the ALT_USB_HOST_HCINTMSK14 register from the beginning of the component. */
46449 #define ALT_USB_HOST_HCINTMSK14_OFST 0x2cc
46450 /* The address of the ALT_USB_HOST_HCINTMSK14 register. */
46451 #define ALT_USB_HOST_HCINTMSK14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK14_OFST))
46452 
46453 /*
46454  * Register : Host Channel 14 Transfer Size Register - hctsiz14
46455  *
46456  * Register Layout
46457  *
46458  * Bits | Access | Reset | Description
46459  * :--------|:-------|:------|:--------------
46460  * [18:0] | RW | 0x0 | Transfer Size
46461  * [28:19] | RW | 0x0 | Packet Count
46462  * [30:29] | RW | 0x0 | PID
46463  * [31] | RW | 0x0 | Do Ping
46464  *
46465  */
46466 /*
46467  * Field : Transfer Size - xfersize
46468  *
46469  * for an OUT, this field is the number of data bytes the host sends during the
46470  * transfer. for an IN, this field is the buffer size that the application has
46471  * Reserved for the transfer. The application is expected to program this field as
46472  * an integer multiple of the maximum packet size for IN transactions (periodic and
46473  * non-periodic). The width of this counter is specified as 19 bits.
46474  *
46475  * Field Access Macros:
46476  *
46477  */
46478 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ14_XFERSIZE register field. */
46479 #define ALT_USB_HOST_HCTSIZ14_XFERSIZE_LSB 0
46480 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ14_XFERSIZE register field. */
46481 #define ALT_USB_HOST_HCTSIZ14_XFERSIZE_MSB 18
46482 /* The width in bits of the ALT_USB_HOST_HCTSIZ14_XFERSIZE register field. */
46483 #define ALT_USB_HOST_HCTSIZ14_XFERSIZE_WIDTH 19
46484 /* The mask used to set the ALT_USB_HOST_HCTSIZ14_XFERSIZE register field value. */
46485 #define ALT_USB_HOST_HCTSIZ14_XFERSIZE_SET_MSK 0x0007ffff
46486 /* The mask used to clear the ALT_USB_HOST_HCTSIZ14_XFERSIZE register field value. */
46487 #define ALT_USB_HOST_HCTSIZ14_XFERSIZE_CLR_MSK 0xfff80000
46488 /* The reset value of the ALT_USB_HOST_HCTSIZ14_XFERSIZE register field. */
46489 #define ALT_USB_HOST_HCTSIZ14_XFERSIZE_RESET 0x0
46490 /* Extracts the ALT_USB_HOST_HCTSIZ14_XFERSIZE field value from a register. */
46491 #define ALT_USB_HOST_HCTSIZ14_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
46492 /* Produces a ALT_USB_HOST_HCTSIZ14_XFERSIZE register field value suitable for setting the register. */
46493 #define ALT_USB_HOST_HCTSIZ14_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
46494 
46495 /*
46496  * Field : Packet Count - pktcnt
46497  *
46498  * This field is programmed by the application with the expected number of packets
46499  * to be transmitted (OUT) or received (IN). The host decrements this count on
46500  * every successful transmission or reception of an OUT/IN packet. Once this count
46501  * reaches zero, the application is interrupted to indicate normal completion. The
46502  * width of this counter is specified as 10 bits.
46503  *
46504  * Field Access Macros:
46505  *
46506  */
46507 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ14_PKTCNT register field. */
46508 #define ALT_USB_HOST_HCTSIZ14_PKTCNT_LSB 19
46509 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ14_PKTCNT register field. */
46510 #define ALT_USB_HOST_HCTSIZ14_PKTCNT_MSB 28
46511 /* The width in bits of the ALT_USB_HOST_HCTSIZ14_PKTCNT register field. */
46512 #define ALT_USB_HOST_HCTSIZ14_PKTCNT_WIDTH 10
46513 /* The mask used to set the ALT_USB_HOST_HCTSIZ14_PKTCNT register field value. */
46514 #define ALT_USB_HOST_HCTSIZ14_PKTCNT_SET_MSK 0x1ff80000
46515 /* The mask used to clear the ALT_USB_HOST_HCTSIZ14_PKTCNT register field value. */
46516 #define ALT_USB_HOST_HCTSIZ14_PKTCNT_CLR_MSK 0xe007ffff
46517 /* The reset value of the ALT_USB_HOST_HCTSIZ14_PKTCNT register field. */
46518 #define ALT_USB_HOST_HCTSIZ14_PKTCNT_RESET 0x0
46519 /* Extracts the ALT_USB_HOST_HCTSIZ14_PKTCNT field value from a register. */
46520 #define ALT_USB_HOST_HCTSIZ14_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
46521 /* Produces a ALT_USB_HOST_HCTSIZ14_PKTCNT register field value suitable for setting the register. */
46522 #define ALT_USB_HOST_HCTSIZ14_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
46523 
46524 /*
46525  * Field : PID - pid
46526  *
46527  * The application programs this field with the type of PID to use forthe initial
46528  * transaction. The host maintains this field for the rest of the transfer.
46529  *
46530  * Field Enumeration Values:
46531  *
46532  * Enum | Value | Description
46533  * :----------------------------------|:------|:------------------------------------
46534  * ALT_USB_HOST_HCTSIZ14_PID_E_DATA0 | 0x0 | DATA0
46535  * ALT_USB_HOST_HCTSIZ14_PID_E_DATA2 | 0x1 | DATA2
46536  * ALT_USB_HOST_HCTSIZ14_PID_E_DATA1 | 0x2 | DATA1
46537  * ALT_USB_HOST_HCTSIZ14_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
46538  *
46539  * Field Access Macros:
46540  *
46541  */
46542 /*
46543  * Enumerated value for register field ALT_USB_HOST_HCTSIZ14_PID
46544  *
46545  * DATA0
46546  */
46547 #define ALT_USB_HOST_HCTSIZ14_PID_E_DATA0 0x0
46548 /*
46549  * Enumerated value for register field ALT_USB_HOST_HCTSIZ14_PID
46550  *
46551  * DATA2
46552  */
46553 #define ALT_USB_HOST_HCTSIZ14_PID_E_DATA2 0x1
46554 /*
46555  * Enumerated value for register field ALT_USB_HOST_HCTSIZ14_PID
46556  *
46557  * DATA1
46558  */
46559 #define ALT_USB_HOST_HCTSIZ14_PID_E_DATA1 0x2
46560 /*
46561  * Enumerated value for register field ALT_USB_HOST_HCTSIZ14_PID
46562  *
46563  * MDATA (non-control)/SETUP (control)
46564  */
46565 #define ALT_USB_HOST_HCTSIZ14_PID_E_MDATA 0x3
46566 
46567 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ14_PID register field. */
46568 #define ALT_USB_HOST_HCTSIZ14_PID_LSB 29
46569 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ14_PID register field. */
46570 #define ALT_USB_HOST_HCTSIZ14_PID_MSB 30
46571 /* The width in bits of the ALT_USB_HOST_HCTSIZ14_PID register field. */
46572 #define ALT_USB_HOST_HCTSIZ14_PID_WIDTH 2
46573 /* The mask used to set the ALT_USB_HOST_HCTSIZ14_PID register field value. */
46574 #define ALT_USB_HOST_HCTSIZ14_PID_SET_MSK 0x60000000
46575 /* The mask used to clear the ALT_USB_HOST_HCTSIZ14_PID register field value. */
46576 #define ALT_USB_HOST_HCTSIZ14_PID_CLR_MSK 0x9fffffff
46577 /* The reset value of the ALT_USB_HOST_HCTSIZ14_PID register field. */
46578 #define ALT_USB_HOST_HCTSIZ14_PID_RESET 0x0
46579 /* Extracts the ALT_USB_HOST_HCTSIZ14_PID field value from a register. */
46580 #define ALT_USB_HOST_HCTSIZ14_PID_GET(value) (((value) & 0x60000000) >> 29)
46581 /* Produces a ALT_USB_HOST_HCTSIZ14_PID register field value suitable for setting the register. */
46582 #define ALT_USB_HOST_HCTSIZ14_PID_SET(value) (((value) << 29) & 0x60000000)
46583 
46584 /*
46585  * Field : Do Ping - dopng
46586  *
46587  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
46588  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
46589  * for IN transfers it disables the channel.
46590  *
46591  * Field Enumeration Values:
46592  *
46593  * Enum | Value | Description
46594  * :-------------------------------------|:------|:-----------------
46595  * ALT_USB_HOST_HCTSIZ14_DOPNG_E_NOPING | 0x0 | No ping protocol
46596  * ALT_USB_HOST_HCTSIZ14_DOPNG_E_PING | 0x1 | Ping protocol
46597  *
46598  * Field Access Macros:
46599  *
46600  */
46601 /*
46602  * Enumerated value for register field ALT_USB_HOST_HCTSIZ14_DOPNG
46603  *
46604  * No ping protocol
46605  */
46606 #define ALT_USB_HOST_HCTSIZ14_DOPNG_E_NOPING 0x0
46607 /*
46608  * Enumerated value for register field ALT_USB_HOST_HCTSIZ14_DOPNG
46609  *
46610  * Ping protocol
46611  */
46612 #define ALT_USB_HOST_HCTSIZ14_DOPNG_E_PING 0x1
46613 
46614 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ14_DOPNG register field. */
46615 #define ALT_USB_HOST_HCTSIZ14_DOPNG_LSB 31
46616 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ14_DOPNG register field. */
46617 #define ALT_USB_HOST_HCTSIZ14_DOPNG_MSB 31
46618 /* The width in bits of the ALT_USB_HOST_HCTSIZ14_DOPNG register field. */
46619 #define ALT_USB_HOST_HCTSIZ14_DOPNG_WIDTH 1
46620 /* The mask used to set the ALT_USB_HOST_HCTSIZ14_DOPNG register field value. */
46621 #define ALT_USB_HOST_HCTSIZ14_DOPNG_SET_MSK 0x80000000
46622 /* The mask used to clear the ALT_USB_HOST_HCTSIZ14_DOPNG register field value. */
46623 #define ALT_USB_HOST_HCTSIZ14_DOPNG_CLR_MSK 0x7fffffff
46624 /* The reset value of the ALT_USB_HOST_HCTSIZ14_DOPNG register field. */
46625 #define ALT_USB_HOST_HCTSIZ14_DOPNG_RESET 0x0
46626 /* Extracts the ALT_USB_HOST_HCTSIZ14_DOPNG field value from a register. */
46627 #define ALT_USB_HOST_HCTSIZ14_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
46628 /* Produces a ALT_USB_HOST_HCTSIZ14_DOPNG register field value suitable for setting the register. */
46629 #define ALT_USB_HOST_HCTSIZ14_DOPNG_SET(value) (((value) << 31) & 0x80000000)
46630 
46631 #ifndef __ASSEMBLY__
46632 /*
46633  * WARNING: The C register and register group struct declarations are provided for
46634  * convenience and illustrative purposes. They should, however, be used with
46635  * caution as the C language standard provides no guarantees about the alignment or
46636  * atomicity of device memory accesses. The recommended practice for writing
46637  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
46638  * alt_write_word() functions.
46639  *
46640  * The struct declaration for register ALT_USB_HOST_HCTSIZ14.
46641  */
46642 struct ALT_USB_HOST_HCTSIZ14_s
46643 {
46644  uint32_t xfersize : 19; /* Transfer Size */
46645  uint32_t pktcnt : 10; /* Packet Count */
46646  uint32_t pid : 2; /* PID */
46647  uint32_t dopng : 1; /* Do Ping */
46648 };
46649 
46650 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ14. */
46651 typedef volatile struct ALT_USB_HOST_HCTSIZ14_s ALT_USB_HOST_HCTSIZ14_t;
46652 #endif /* __ASSEMBLY__ */
46653 
46654 /* The byte offset of the ALT_USB_HOST_HCTSIZ14 register from the beginning of the component. */
46655 #define ALT_USB_HOST_HCTSIZ14_OFST 0x2d0
46656 /* The address of the ALT_USB_HOST_HCTSIZ14 register. */
46657 #define ALT_USB_HOST_HCTSIZ14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ14_OFST))
46658 
46659 /*
46660  * Register : Host Channel 14 DMA Address Register - hcdma14
46661  *
46662  * This register is used by the OTG host in the internal DMA mode to maintain the
46663  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
46664  * DWORD-aligned.
46665  *
46666  * Register Layout
46667  *
46668  * Bits | Access | Reset | Description
46669  * :-------|:-------|:------|:------------
46670  * [31:0] | RW | 0x0 | DMA Address
46671  *
46672  */
46673 /*
46674  * Field : DMA Address - hcdma14
46675  *
46676  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
46677  * first descriptor in the list should be located in this address. The first
46678  * descriptor may be or may not be ready. The core starts processing the list from
46679  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
46680  * in which the isochronous descriptors are present where N is based on nTD as per
46681  * Table below
46682  *
46683  * [31:N] Base Address [N-1:3] Offset [2:0] 000
46684  *
46685  * HS ISOC FS ISOC
46686  *
46687  * nTD N nTD N
46688  *
46689  * 7 6 1 4
46690  *
46691  * 15 7 3 5
46692  *
46693  * 31 8 7 6
46694  *
46695  * 63 9 15 7
46696  *
46697  * 127 10 31 8
46698  *
46699  * 255 11 63 9
46700  *
46701  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
46702  * This value is in terms of number of descriptors. The values can be from 0 to 63.
46703  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
46704  * descriptor processed in the list. This field is updated both by application and
46705  * the core. for example, if the application enables the channel after programming
46706  * CTD=5, then the core will start processing the 6th descriptor. The address is
46707  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
46708  * CTD for isochronous is based on the current frame/microframe value. Need to be
46709  * set to zero by application.
46710  *
46711  * Field Access Macros:
46712  *
46713  */
46714 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA14_HCDMA14 register field. */
46715 #define ALT_USB_HOST_HCDMA14_HCDMA14_LSB 0
46716 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA14_HCDMA14 register field. */
46717 #define ALT_USB_HOST_HCDMA14_HCDMA14_MSB 31
46718 /* The width in bits of the ALT_USB_HOST_HCDMA14_HCDMA14 register field. */
46719 #define ALT_USB_HOST_HCDMA14_HCDMA14_WIDTH 32
46720 /* The mask used to set the ALT_USB_HOST_HCDMA14_HCDMA14 register field value. */
46721 #define ALT_USB_HOST_HCDMA14_HCDMA14_SET_MSK 0xffffffff
46722 /* The mask used to clear the ALT_USB_HOST_HCDMA14_HCDMA14 register field value. */
46723 #define ALT_USB_HOST_HCDMA14_HCDMA14_CLR_MSK 0x00000000
46724 /* The reset value of the ALT_USB_HOST_HCDMA14_HCDMA14 register field. */
46725 #define ALT_USB_HOST_HCDMA14_HCDMA14_RESET 0x0
46726 /* Extracts the ALT_USB_HOST_HCDMA14_HCDMA14 field value from a register. */
46727 #define ALT_USB_HOST_HCDMA14_HCDMA14_GET(value) (((value) & 0xffffffff) >> 0)
46728 /* Produces a ALT_USB_HOST_HCDMA14_HCDMA14 register field value suitable for setting the register. */
46729 #define ALT_USB_HOST_HCDMA14_HCDMA14_SET(value) (((value) << 0) & 0xffffffff)
46730 
46731 #ifndef __ASSEMBLY__
46732 /*
46733  * WARNING: The C register and register group struct declarations are provided for
46734  * convenience and illustrative purposes. They should, however, be used with
46735  * caution as the C language standard provides no guarantees about the alignment or
46736  * atomicity of device memory accesses. The recommended practice for writing
46737  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
46738  * alt_write_word() functions.
46739  *
46740  * The struct declaration for register ALT_USB_HOST_HCDMA14.
46741  */
46742 struct ALT_USB_HOST_HCDMA14_s
46743 {
46744  uint32_t hcdma14 : 32; /* DMA Address */
46745 };
46746 
46747 /* The typedef declaration for register ALT_USB_HOST_HCDMA14. */
46748 typedef volatile struct ALT_USB_HOST_HCDMA14_s ALT_USB_HOST_HCDMA14_t;
46749 #endif /* __ASSEMBLY__ */
46750 
46751 /* The byte offset of the ALT_USB_HOST_HCDMA14 register from the beginning of the component. */
46752 #define ALT_USB_HOST_HCDMA14_OFST 0x2d4
46753 /* The address of the ALT_USB_HOST_HCDMA14 register. */
46754 #define ALT_USB_HOST_HCDMA14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA14_OFST))
46755 
46756 /*
46757  * Register : Host Channel 14 DMA Buffer Address Register - hcdmab14
46758  *
46759  * These registers are present only in case of Scatter/Gather DMA. These
46760  * registers are implemented in RAM instead of flop-based implementation. Holds
46761  * the current buffer address. This register is updated as and when the
46762  * data transfer for the corresponding end point is in progress. This
46763  * register is present only in Scatter/Gather DMA mode. Otherwise this field
46764  * is reserved.
46765  *
46766  * Register Layout
46767  *
46768  * Bits | Access | Reset | Description
46769  * :-------|:-------|:------|:----------------------------------
46770  * [31:0] | RW | 0x0 | Host Channel 0 DMA Buffer Address
46771  *
46772  */
46773 /*
46774  * Field : Host Channel 0 DMA Buffer Address - hcdmab14
46775  *
46776  * These registers are present only in case of Scatter/Gather DMA. These
46777  * registers are implemented in RAM instead of flop-based implementation. Holds
46778  * the current buffer address. This register is updated as and when the data
46779  * transfer for the corresponding end point is in progress. This register is
46780  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
46781  *
46782  * Field Access Macros:
46783  *
46784  */
46785 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB14_HCDMAB14 register field. */
46786 #define ALT_USB_HOST_HCDMAB14_HCDMAB14_LSB 0
46787 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB14_HCDMAB14 register field. */
46788 #define ALT_USB_HOST_HCDMAB14_HCDMAB14_MSB 31
46789 /* The width in bits of the ALT_USB_HOST_HCDMAB14_HCDMAB14 register field. */
46790 #define ALT_USB_HOST_HCDMAB14_HCDMAB14_WIDTH 32
46791 /* The mask used to set the ALT_USB_HOST_HCDMAB14_HCDMAB14 register field value. */
46792 #define ALT_USB_HOST_HCDMAB14_HCDMAB14_SET_MSK 0xffffffff
46793 /* The mask used to clear the ALT_USB_HOST_HCDMAB14_HCDMAB14 register field value. */
46794 #define ALT_USB_HOST_HCDMAB14_HCDMAB14_CLR_MSK 0x00000000
46795 /* The reset value of the ALT_USB_HOST_HCDMAB14_HCDMAB14 register field. */
46796 #define ALT_USB_HOST_HCDMAB14_HCDMAB14_RESET 0x0
46797 /* Extracts the ALT_USB_HOST_HCDMAB14_HCDMAB14 field value from a register. */
46798 #define ALT_USB_HOST_HCDMAB14_HCDMAB14_GET(value) (((value) & 0xffffffff) >> 0)
46799 /* Produces a ALT_USB_HOST_HCDMAB14_HCDMAB14 register field value suitable for setting the register. */
46800 #define ALT_USB_HOST_HCDMAB14_HCDMAB14_SET(value) (((value) << 0) & 0xffffffff)
46801 
46802 #ifndef __ASSEMBLY__
46803 /*
46804  * WARNING: The C register and register group struct declarations are provided for
46805  * convenience and illustrative purposes. They should, however, be used with
46806  * caution as the C language standard provides no guarantees about the alignment or
46807  * atomicity of device memory accesses. The recommended practice for writing
46808  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
46809  * alt_write_word() functions.
46810  *
46811  * The struct declaration for register ALT_USB_HOST_HCDMAB14.
46812  */
46813 struct ALT_USB_HOST_HCDMAB14_s
46814 {
46815  uint32_t hcdmab14 : 32; /* Host Channel 0 DMA Buffer Address */
46816 };
46817 
46818 /* The typedef declaration for register ALT_USB_HOST_HCDMAB14. */
46819 typedef volatile struct ALT_USB_HOST_HCDMAB14_s ALT_USB_HOST_HCDMAB14_t;
46820 #endif /* __ASSEMBLY__ */
46821 
46822 /* The byte offset of the ALT_USB_HOST_HCDMAB14 register from the beginning of the component. */
46823 #define ALT_USB_HOST_HCDMAB14_OFST 0x2d8
46824 /* The address of the ALT_USB_HOST_HCDMAB14 register. */
46825 #define ALT_USB_HOST_HCDMAB14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB14_OFST))
46826 
46827 /*
46828  * Register : Host Channel 15 Characteristics Register - hcchar15
46829  *
46830  * Host Channel 15 Characteristics Register
46831  *
46832  * Register Layout
46833  *
46834  * Bits | Access | Reset | Description
46835  * :--------|:-------|:------|:--------------------
46836  * [10:0] | RW | 0x0 | Maximum Packet Size
46837  * [14:11] | RW | 0x0 | Endpoint Number
46838  * [15] | RW | 0x0 | Endpoint Direction
46839  * [16] | ??? | 0x0 | *UNDEFINED*
46840  * [17] | RW | 0x0 | Low-Speed Device
46841  * [19:18] | RW | 0x0 | Endpoint Type
46842  * [21:20] | RW | 0x0 | Multi Count
46843  * [28:22] | RW | 0x0 | Device Address
46844  * [29] | ??? | 0x0 | *UNDEFINED*
46845  * [30] | R | 0x0 | Channel Disable
46846  * [31] | R | 0x0 | Channel Enable
46847  *
46848  */
46849 /*
46850  * Field : Maximum Packet Size - mps
46851  *
46852  * Indicates the maximum packet size of the associated endpoint.
46853  *
46854  * Field Access Macros:
46855  *
46856  */
46857 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR15_MPS register field. */
46858 #define ALT_USB_HOST_HCCHAR15_MPS_LSB 0
46859 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR15_MPS register field. */
46860 #define ALT_USB_HOST_HCCHAR15_MPS_MSB 10
46861 /* The width in bits of the ALT_USB_HOST_HCCHAR15_MPS register field. */
46862 #define ALT_USB_HOST_HCCHAR15_MPS_WIDTH 11
46863 /* The mask used to set the ALT_USB_HOST_HCCHAR15_MPS register field value. */
46864 #define ALT_USB_HOST_HCCHAR15_MPS_SET_MSK 0x000007ff
46865 /* The mask used to clear the ALT_USB_HOST_HCCHAR15_MPS register field value. */
46866 #define ALT_USB_HOST_HCCHAR15_MPS_CLR_MSK 0xfffff800
46867 /* The reset value of the ALT_USB_HOST_HCCHAR15_MPS register field. */
46868 #define ALT_USB_HOST_HCCHAR15_MPS_RESET 0x0
46869 /* Extracts the ALT_USB_HOST_HCCHAR15_MPS field value from a register. */
46870 #define ALT_USB_HOST_HCCHAR15_MPS_GET(value) (((value) & 0x000007ff) >> 0)
46871 /* Produces a ALT_USB_HOST_HCCHAR15_MPS register field value suitable for setting the register. */
46872 #define ALT_USB_HOST_HCCHAR15_MPS_SET(value) (((value) << 0) & 0x000007ff)
46873 
46874 /*
46875  * Field : Endpoint Number - epnum
46876  *
46877  * Indicates the endpoint number on the device serving as the data source or sink.
46878  *
46879  * Field Enumeration Values:
46880  *
46881  * Enum | Value | Description
46882  * :--------------------------------------|:------|:--------------
46883  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT0 | 0x0 | End point 0
46884  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT1 | 0x1 | End point 1
46885  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT2 | 0x2 | End point 2
46886  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT3 | 0x3 | End point 3
46887  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT4 | 0x4 | End point 4
46888  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT5 | 0x5 | End point 5
46889  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT6 | 0x6 | End point 6
46890  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT7 | 0x7 | End point 7
46891  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT8 | 0x8 | End point 8
46892  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT9 | 0x9 | End point 9
46893  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT10 | 0xa | End point 10
46894  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT11 | 0xb | End point 11
46895  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT12 | 0xc | End point 12
46896  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT13 | 0xd | End point 13
46897  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT14 | 0xe | End point 14
46898  * ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT15 | 0xf | End point 15
46899  *
46900  * Field Access Macros:
46901  *
46902  */
46903 /*
46904  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46905  *
46906  * End point 0
46907  */
46908 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT0 0x0
46909 /*
46910  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46911  *
46912  * End point 1
46913  */
46914 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT1 0x1
46915 /*
46916  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46917  *
46918  * End point 2
46919  */
46920 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT2 0x2
46921 /*
46922  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46923  *
46924  * End point 3
46925  */
46926 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT3 0x3
46927 /*
46928  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46929  *
46930  * End point 4
46931  */
46932 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT4 0x4
46933 /*
46934  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46935  *
46936  * End point 5
46937  */
46938 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT5 0x5
46939 /*
46940  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46941  *
46942  * End point 6
46943  */
46944 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT6 0x6
46945 /*
46946  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46947  *
46948  * End point 7
46949  */
46950 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT7 0x7
46951 /*
46952  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46953  *
46954  * End point 8
46955  */
46956 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT8 0x8
46957 /*
46958  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46959  *
46960  * End point 9
46961  */
46962 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT9 0x9
46963 /*
46964  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46965  *
46966  * End point 10
46967  */
46968 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT10 0xa
46969 /*
46970  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46971  *
46972  * End point 11
46973  */
46974 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT11 0xb
46975 /*
46976  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46977  *
46978  * End point 12
46979  */
46980 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT12 0xc
46981 /*
46982  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46983  *
46984  * End point 13
46985  */
46986 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT13 0xd
46987 /*
46988  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46989  *
46990  * End point 14
46991  */
46992 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT14 0xe
46993 /*
46994  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPNUM
46995  *
46996  * End point 15
46997  */
46998 #define ALT_USB_HOST_HCCHAR15_EPNUM_E_ENDPT15 0xf
46999 
47000 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR15_EPNUM register field. */
47001 #define ALT_USB_HOST_HCCHAR15_EPNUM_LSB 11
47002 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR15_EPNUM register field. */
47003 #define ALT_USB_HOST_HCCHAR15_EPNUM_MSB 14
47004 /* The width in bits of the ALT_USB_HOST_HCCHAR15_EPNUM register field. */
47005 #define ALT_USB_HOST_HCCHAR15_EPNUM_WIDTH 4
47006 /* The mask used to set the ALT_USB_HOST_HCCHAR15_EPNUM register field value. */
47007 #define ALT_USB_HOST_HCCHAR15_EPNUM_SET_MSK 0x00007800
47008 /* The mask used to clear the ALT_USB_HOST_HCCHAR15_EPNUM register field value. */
47009 #define ALT_USB_HOST_HCCHAR15_EPNUM_CLR_MSK 0xffff87ff
47010 /* The reset value of the ALT_USB_HOST_HCCHAR15_EPNUM register field. */
47011 #define ALT_USB_HOST_HCCHAR15_EPNUM_RESET 0x0
47012 /* Extracts the ALT_USB_HOST_HCCHAR15_EPNUM field value from a register. */
47013 #define ALT_USB_HOST_HCCHAR15_EPNUM_GET(value) (((value) & 0x00007800) >> 11)
47014 /* Produces a ALT_USB_HOST_HCCHAR15_EPNUM register field value suitable for setting the register. */
47015 #define ALT_USB_HOST_HCCHAR15_EPNUM_SET(value) (((value) << 11) & 0x00007800)
47016 
47017 /*
47018  * Field : Endpoint Direction - epdir
47019  *
47020  * Indicates whether the transaction is IN or OUT.
47021  *
47022  * Field Enumeration Values:
47023  *
47024  * Enum | Value | Description
47025  * :----------------------------------|:------|:--------------
47026  * ALT_USB_HOST_HCCHAR15_EPDIR_E_OUT | 0x0 | OUT Direction
47027  * ALT_USB_HOST_HCCHAR15_EPDIR_E_IN | 0x1 | IN Direction
47028  *
47029  * Field Access Macros:
47030  *
47031  */
47032 /*
47033  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPDIR
47034  *
47035  * OUT Direction
47036  */
47037 #define ALT_USB_HOST_HCCHAR15_EPDIR_E_OUT 0x0
47038 /*
47039  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPDIR
47040  *
47041  * IN Direction
47042  */
47043 #define ALT_USB_HOST_HCCHAR15_EPDIR_E_IN 0x1
47044 
47045 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR15_EPDIR register field. */
47046 #define ALT_USB_HOST_HCCHAR15_EPDIR_LSB 15
47047 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR15_EPDIR register field. */
47048 #define ALT_USB_HOST_HCCHAR15_EPDIR_MSB 15
47049 /* The width in bits of the ALT_USB_HOST_HCCHAR15_EPDIR register field. */
47050 #define ALT_USB_HOST_HCCHAR15_EPDIR_WIDTH 1
47051 /* The mask used to set the ALT_USB_HOST_HCCHAR15_EPDIR register field value. */
47052 #define ALT_USB_HOST_HCCHAR15_EPDIR_SET_MSK 0x00008000
47053 /* The mask used to clear the ALT_USB_HOST_HCCHAR15_EPDIR register field value. */
47054 #define ALT_USB_HOST_HCCHAR15_EPDIR_CLR_MSK 0xffff7fff
47055 /* The reset value of the ALT_USB_HOST_HCCHAR15_EPDIR register field. */
47056 #define ALT_USB_HOST_HCCHAR15_EPDIR_RESET 0x0
47057 /* Extracts the ALT_USB_HOST_HCCHAR15_EPDIR field value from a register. */
47058 #define ALT_USB_HOST_HCCHAR15_EPDIR_GET(value) (((value) & 0x00008000) >> 15)
47059 /* Produces a ALT_USB_HOST_HCCHAR15_EPDIR register field value suitable for setting the register. */
47060 #define ALT_USB_HOST_HCCHAR15_EPDIR_SET(value) (((value) << 15) & 0x00008000)
47061 
47062 /*
47063  * Field : Low-Speed Device - lspddev
47064  *
47065  * This field is set by the application to indicate that this channel is
47066  * communicating to a low-speed device. The application must program this bit when
47067  * a low speed device is connected to the host through an FS HUB. The HS OTG Host
47068  * core uses this field to drive the XCVR_SELECT signal to 2'b11 while
47069  * communicating to the LS Device through the FS hub. In a peer to peer setup, the
47070  * HS OTG Host core ignores this bit even if it is set by the application software
47071  *
47072  * Field Enumeration Values:
47073  *
47074  * Enum | Value | Description
47075  * :-------------------------------------|:------|:----------------------------------------
47076  * ALT_USB_HOST_HCCHAR15_LSPDDEV_E_DISD | 0x0 | Not Communicating with low speed device
47077  * ALT_USB_HOST_HCCHAR15_LSPDDEV_E_END | 0x1 | Communicating with low speed device
47078  *
47079  * Field Access Macros:
47080  *
47081  */
47082 /*
47083  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_LSPDDEV
47084  *
47085  * Not Communicating with low speed device
47086  */
47087 #define ALT_USB_HOST_HCCHAR15_LSPDDEV_E_DISD 0x0
47088 /*
47089  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_LSPDDEV
47090  *
47091  * Communicating with low speed device
47092  */
47093 #define ALT_USB_HOST_HCCHAR15_LSPDDEV_E_END 0x1
47094 
47095 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR15_LSPDDEV register field. */
47096 #define ALT_USB_HOST_HCCHAR15_LSPDDEV_LSB 17
47097 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR15_LSPDDEV register field. */
47098 #define ALT_USB_HOST_HCCHAR15_LSPDDEV_MSB 17
47099 /* The width in bits of the ALT_USB_HOST_HCCHAR15_LSPDDEV register field. */
47100 #define ALT_USB_HOST_HCCHAR15_LSPDDEV_WIDTH 1
47101 /* The mask used to set the ALT_USB_HOST_HCCHAR15_LSPDDEV register field value. */
47102 #define ALT_USB_HOST_HCCHAR15_LSPDDEV_SET_MSK 0x00020000
47103 /* The mask used to clear the ALT_USB_HOST_HCCHAR15_LSPDDEV register field value. */
47104 #define ALT_USB_HOST_HCCHAR15_LSPDDEV_CLR_MSK 0xfffdffff
47105 /* The reset value of the ALT_USB_HOST_HCCHAR15_LSPDDEV register field. */
47106 #define ALT_USB_HOST_HCCHAR15_LSPDDEV_RESET 0x0
47107 /* Extracts the ALT_USB_HOST_HCCHAR15_LSPDDEV field value from a register. */
47108 #define ALT_USB_HOST_HCCHAR15_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17)
47109 /* Produces a ALT_USB_HOST_HCCHAR15_LSPDDEV register field value suitable for setting the register. */
47110 #define ALT_USB_HOST_HCCHAR15_LSPDDEV_SET(value) (((value) << 17) & 0x00020000)
47111 
47112 /*
47113  * Field : Endpoint Type - eptype
47114  *
47115  * Indicates the transfer type selected.
47116  *
47117  * Field Enumeration Values:
47118  *
47119  * Enum | Value | Description
47120  * :--------------------------------------|:------|:------------
47121  * ALT_USB_HOST_HCCHAR15_EPTYPE_E_CTL | 0x0 | Control
47122  * ALT_USB_HOST_HCCHAR15_EPTYPE_E_ISOC | 0x1 | Isochronous
47123  * ALT_USB_HOST_HCCHAR15_EPTYPE_E_BULK | 0x2 | Bulk
47124  * ALT_USB_HOST_HCCHAR15_EPTYPE_E_INTERR | 0x3 | Interrupt
47125  *
47126  * Field Access Macros:
47127  *
47128  */
47129 /*
47130  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPTYPE
47131  *
47132  * Control
47133  */
47134 #define ALT_USB_HOST_HCCHAR15_EPTYPE_E_CTL 0x0
47135 /*
47136  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPTYPE
47137  *
47138  * Isochronous
47139  */
47140 #define ALT_USB_HOST_HCCHAR15_EPTYPE_E_ISOC 0x1
47141 /*
47142  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPTYPE
47143  *
47144  * Bulk
47145  */
47146 #define ALT_USB_HOST_HCCHAR15_EPTYPE_E_BULK 0x2
47147 /*
47148  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EPTYPE
47149  *
47150  * Interrupt
47151  */
47152 #define ALT_USB_HOST_HCCHAR15_EPTYPE_E_INTERR 0x3
47153 
47154 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR15_EPTYPE register field. */
47155 #define ALT_USB_HOST_HCCHAR15_EPTYPE_LSB 18
47156 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR15_EPTYPE register field. */
47157 #define ALT_USB_HOST_HCCHAR15_EPTYPE_MSB 19
47158 /* The width in bits of the ALT_USB_HOST_HCCHAR15_EPTYPE register field. */
47159 #define ALT_USB_HOST_HCCHAR15_EPTYPE_WIDTH 2
47160 /* The mask used to set the ALT_USB_HOST_HCCHAR15_EPTYPE register field value. */
47161 #define ALT_USB_HOST_HCCHAR15_EPTYPE_SET_MSK 0x000c0000
47162 /* The mask used to clear the ALT_USB_HOST_HCCHAR15_EPTYPE register field value. */
47163 #define ALT_USB_HOST_HCCHAR15_EPTYPE_CLR_MSK 0xfff3ffff
47164 /* The reset value of the ALT_USB_HOST_HCCHAR15_EPTYPE register field. */
47165 #define ALT_USB_HOST_HCCHAR15_EPTYPE_RESET 0x0
47166 /* Extracts the ALT_USB_HOST_HCCHAR15_EPTYPE field value from a register. */
47167 #define ALT_USB_HOST_HCCHAR15_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
47168 /* Produces a ALT_USB_HOST_HCCHAR15_EPTYPE register field value suitable for setting the register. */
47169 #define ALT_USB_HOST_HCCHAR15_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
47170 
47171 /*
47172  * Field : Multi Count - ec
47173  *
47174  * When the Split Enable bit of the Host Channel-n Split Control register
47175  * (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of
47176  * transactions that must be executed per microframe for this periodic endpoint.
47177  * for non periodic transfers, this field is used only in DMA mode, and specifies
47178  * the number packets to be fetched for this channel before the internal DMA engine
47179  * changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the
47180  * number of immediate retries to be performed for a periodic split transactions on
47181  * transaction errors. This field must be set to at least 1.
47182  *
47183  * Field Enumeration Values:
47184  *
47185  * Enum | Value | Description
47186  * :--------------------------------------|:------|:----------------------------------------------
47187  * ALT_USB_HOST_HCCHAR15_EC_E_RSVD | 0x0 | Reserved This field yields undefined result
47188  * ALT_USB_HOST_HCCHAR15_EC_E_TRANSONE | 0x1 | 1 transaction
47189  * ALT_USB_HOST_HCCHAR15_EC_E_TRANSTWO | 0x2 | 2 transactions to be issued for this endpoint
47190  * : | | per microframe
47191  * ALT_USB_HOST_HCCHAR15_EC_E_TRANSTHREE | 0x3 | 3 transactions to be issued for this endpoint
47192  * : | | per microframe
47193  *
47194  * Field Access Macros:
47195  *
47196  */
47197 /*
47198  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EC
47199  *
47200  * Reserved This field yields undefined result
47201  */
47202 #define ALT_USB_HOST_HCCHAR15_EC_E_RSVD 0x0
47203 /*
47204  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EC
47205  *
47206  * 1 transaction
47207  */
47208 #define ALT_USB_HOST_HCCHAR15_EC_E_TRANSONE 0x1
47209 /*
47210  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EC
47211  *
47212  * 2 transactions to be issued for this endpoint per microframe
47213  */
47214 #define ALT_USB_HOST_HCCHAR15_EC_E_TRANSTWO 0x2
47215 /*
47216  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_EC
47217  *
47218  * 3 transactions to be issued for this endpoint per microframe
47219  */
47220 #define ALT_USB_HOST_HCCHAR15_EC_E_TRANSTHREE 0x3
47221 
47222 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR15_EC register field. */
47223 #define ALT_USB_HOST_HCCHAR15_EC_LSB 20
47224 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR15_EC register field. */
47225 #define ALT_USB_HOST_HCCHAR15_EC_MSB 21
47226 /* The width in bits of the ALT_USB_HOST_HCCHAR15_EC register field. */
47227 #define ALT_USB_HOST_HCCHAR15_EC_WIDTH 2
47228 /* The mask used to set the ALT_USB_HOST_HCCHAR15_EC register field value. */
47229 #define ALT_USB_HOST_HCCHAR15_EC_SET_MSK 0x00300000
47230 /* The mask used to clear the ALT_USB_HOST_HCCHAR15_EC register field value. */
47231 #define ALT_USB_HOST_HCCHAR15_EC_CLR_MSK 0xffcfffff
47232 /* The reset value of the ALT_USB_HOST_HCCHAR15_EC register field. */
47233 #define ALT_USB_HOST_HCCHAR15_EC_RESET 0x0
47234 /* Extracts the ALT_USB_HOST_HCCHAR15_EC field value from a register. */
47235 #define ALT_USB_HOST_HCCHAR15_EC_GET(value) (((value) & 0x00300000) >> 20)
47236 /* Produces a ALT_USB_HOST_HCCHAR15_EC register field value suitable for setting the register. */
47237 #define ALT_USB_HOST_HCCHAR15_EC_SET(value) (((value) << 20) & 0x00300000)
47238 
47239 /*
47240  * Field : Device Address - devaddr
47241  *
47242  * This field selects the specific device serving as the data source or sink.
47243  *
47244  * Field Access Macros:
47245  *
47246  */
47247 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR15_DEVADDR register field. */
47248 #define ALT_USB_HOST_HCCHAR15_DEVADDR_LSB 22
47249 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR15_DEVADDR register field. */
47250 #define ALT_USB_HOST_HCCHAR15_DEVADDR_MSB 28
47251 /* The width in bits of the ALT_USB_HOST_HCCHAR15_DEVADDR register field. */
47252 #define ALT_USB_HOST_HCCHAR15_DEVADDR_WIDTH 7
47253 /* The mask used to set the ALT_USB_HOST_HCCHAR15_DEVADDR register field value. */
47254 #define ALT_USB_HOST_HCCHAR15_DEVADDR_SET_MSK 0x1fc00000
47255 /* The mask used to clear the ALT_USB_HOST_HCCHAR15_DEVADDR register field value. */
47256 #define ALT_USB_HOST_HCCHAR15_DEVADDR_CLR_MSK 0xe03fffff
47257 /* The reset value of the ALT_USB_HOST_HCCHAR15_DEVADDR register field. */
47258 #define ALT_USB_HOST_HCCHAR15_DEVADDR_RESET 0x0
47259 /* Extracts the ALT_USB_HOST_HCCHAR15_DEVADDR field value from a register. */
47260 #define ALT_USB_HOST_HCCHAR15_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22)
47261 /* Produces a ALT_USB_HOST_HCCHAR15_DEVADDR register field value suitable for setting the register. */
47262 #define ALT_USB_HOST_HCCHAR15_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000)
47263 
47264 /*
47265  * Field : Channel Disable - chdis
47266  *
47267  * The application sets this bit to stop transmitting/receiving data on a channel,
47268  * even before the transfer for that channel is complete. The application must wait
47269  * for the Channel Disabled interrupt before treating the channel as disabled.
47270  *
47271  * Field Enumeration Values:
47272  *
47273  * Enum | Value | Description
47274  * :------------------------------------|:------|:----------------------------
47275  * ALT_USB_HOST_HCCHAR15_CHDIS_E_INACT | 0x0 | Transmit/Recieve normal
47276  * ALT_USB_HOST_HCCHAR15_CHDIS_E_ACT | 0x1 | Stop transmitting/receiving
47277  *
47278  * Field Access Macros:
47279  *
47280  */
47281 /*
47282  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_CHDIS
47283  *
47284  * Transmit/Recieve normal
47285  */
47286 #define ALT_USB_HOST_HCCHAR15_CHDIS_E_INACT 0x0
47287 /*
47288  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_CHDIS
47289  *
47290  * Stop transmitting/receiving
47291  */
47292 #define ALT_USB_HOST_HCCHAR15_CHDIS_E_ACT 0x1
47293 
47294 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR15_CHDIS register field. */
47295 #define ALT_USB_HOST_HCCHAR15_CHDIS_LSB 30
47296 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR15_CHDIS register field. */
47297 #define ALT_USB_HOST_HCCHAR15_CHDIS_MSB 30
47298 /* The width in bits of the ALT_USB_HOST_HCCHAR15_CHDIS register field. */
47299 #define ALT_USB_HOST_HCCHAR15_CHDIS_WIDTH 1
47300 /* The mask used to set the ALT_USB_HOST_HCCHAR15_CHDIS register field value. */
47301 #define ALT_USB_HOST_HCCHAR15_CHDIS_SET_MSK 0x40000000
47302 /* The mask used to clear the ALT_USB_HOST_HCCHAR15_CHDIS register field value. */
47303 #define ALT_USB_HOST_HCCHAR15_CHDIS_CLR_MSK 0xbfffffff
47304 /* The reset value of the ALT_USB_HOST_HCCHAR15_CHDIS register field. */
47305 #define ALT_USB_HOST_HCCHAR15_CHDIS_RESET 0x0
47306 /* Extracts the ALT_USB_HOST_HCCHAR15_CHDIS field value from a register. */
47307 #define ALT_USB_HOST_HCCHAR15_CHDIS_GET(value) (((value) & 0x40000000) >> 30)
47308 /* Produces a ALT_USB_HOST_HCCHAR15_CHDIS register field value suitable for setting the register. */
47309 #define ALT_USB_HOST_HCCHAR15_CHDIS_SET(value) (((value) << 30) & 0x40000000)
47310 
47311 /*
47312  * Field : Channel Enable - chena
47313  *
47314  * When Scatter/Gather mode is disabled This field is set by the application and
47315  * cleared by the OTG host.
47316  *
47317  * 0: Channel disabled
47318  *
47319  * 1: Channel enabled
47320  *
47321  * When Scatter/Gather mode is enabled.
47322  *
47323  * Field Enumeration Values:
47324  *
47325  * Enum | Value | Description
47326  * :------------------------------------|:------|:-------------------------------------------------
47327  * ALT_USB_HOST_HCCHAR15_CHENA_E_INACT | 0x0 | Indicates that the descriptor structure is not
47328  * : | | yet ready
47329  * ALT_USB_HOST_HCCHAR15_CHENA_E_ACT | 0x1 | Indicates that the descriptor structure and
47330  * : | | data buffer with data is setup and this
47331  * : | | channel can access the descriptor
47332  *
47333  * Field Access Macros:
47334  *
47335  */
47336 /*
47337  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_CHENA
47338  *
47339  * Indicates that the descriptor structure is not yet ready
47340  */
47341 #define ALT_USB_HOST_HCCHAR15_CHENA_E_INACT 0x0
47342 /*
47343  * Enumerated value for register field ALT_USB_HOST_HCCHAR15_CHENA
47344  *
47345  * Indicates that the descriptor structure and data buffer with data is
47346  * setup and this channel can access the descriptor
47347  */
47348 #define ALT_USB_HOST_HCCHAR15_CHENA_E_ACT 0x1
47349 
47350 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR15_CHENA register field. */
47351 #define ALT_USB_HOST_HCCHAR15_CHENA_LSB 31
47352 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR15_CHENA register field. */
47353 #define ALT_USB_HOST_HCCHAR15_CHENA_MSB 31
47354 /* The width in bits of the ALT_USB_HOST_HCCHAR15_CHENA register field. */
47355 #define ALT_USB_HOST_HCCHAR15_CHENA_WIDTH 1
47356 /* The mask used to set the ALT_USB_HOST_HCCHAR15_CHENA register field value. */
47357 #define ALT_USB_HOST_HCCHAR15_CHENA_SET_MSK 0x80000000
47358 /* The mask used to clear the ALT_USB_HOST_HCCHAR15_CHENA register field value. */
47359 #define ALT_USB_HOST_HCCHAR15_CHENA_CLR_MSK 0x7fffffff
47360 /* The reset value of the ALT_USB_HOST_HCCHAR15_CHENA register field. */
47361 #define ALT_USB_HOST_HCCHAR15_CHENA_RESET 0x0
47362 /* Extracts the ALT_USB_HOST_HCCHAR15_CHENA field value from a register. */
47363 #define ALT_USB_HOST_HCCHAR15_CHENA_GET(value) (((value) & 0x80000000) >> 31)
47364 /* Produces a ALT_USB_HOST_HCCHAR15_CHENA register field value suitable for setting the register. */
47365 #define ALT_USB_HOST_HCCHAR15_CHENA_SET(value) (((value) << 31) & 0x80000000)
47366 
47367 #ifndef __ASSEMBLY__
47368 /*
47369  * WARNING: The C register and register group struct declarations are provided for
47370  * convenience and illustrative purposes. They should, however, be used with
47371  * caution as the C language standard provides no guarantees about the alignment or
47372  * atomicity of device memory accesses. The recommended practice for writing
47373  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
47374  * alt_write_word() functions.
47375  *
47376  * The struct declaration for register ALT_USB_HOST_HCCHAR15.
47377  */
47378 struct ALT_USB_HOST_HCCHAR15_s
47379 {
47380  uint32_t mps : 11; /* Maximum Packet Size */
47381  uint32_t epnum : 4; /* Endpoint Number */
47382  uint32_t epdir : 1; /* Endpoint Direction */
47383  uint32_t : 1; /* *UNDEFINED* */
47384  uint32_t lspddev : 1; /* Low-Speed Device */
47385  uint32_t eptype : 2; /* Endpoint Type */
47386  uint32_t ec : 2; /* Multi Count */
47387  uint32_t devaddr : 7; /* Device Address */
47388  uint32_t : 1; /* *UNDEFINED* */
47389  const uint32_t chdis : 1; /* Channel Disable */
47390  const uint32_t chena : 1; /* Channel Enable */
47391 };
47392 
47393 /* The typedef declaration for register ALT_USB_HOST_HCCHAR15. */
47394 typedef volatile struct ALT_USB_HOST_HCCHAR15_s ALT_USB_HOST_HCCHAR15_t;
47395 #endif /* __ASSEMBLY__ */
47396 
47397 /* The byte offset of the ALT_USB_HOST_HCCHAR15 register from the beginning of the component. */
47398 #define ALT_USB_HOST_HCCHAR15_OFST 0x2e0
47399 /* The address of the ALT_USB_HOST_HCCHAR15 register. */
47400 #define ALT_USB_HOST_HCCHAR15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR15_OFST))
47401 
47402 /*
47403  * Register : Host Channel 15 Split Control Register - hcsplt15
47404  *
47405  * Channel_number 15.
47406  *
47407  * Register Layout
47408  *
47409  * Bits | Access | Reset | Description
47410  * :--------|:-------|:------|:---------------------
47411  * [6:0] | RW | 0x0 | Port Address
47412  * [13:7] | RW | 0x0 | Hub Address
47413  * [15:14] | RW | 0x0 | Transaction Position
47414  * [16] | RW | 0x0 | Do Complete Split
47415  * [30:17] | ??? | 0x0 | *UNDEFINED*
47416  * [31] | RW | 0x0 | Split Enable
47417  *
47418  */
47419 /*
47420  * Field : Port Address - prtaddr
47421  *
47422  * This field is the port number of the recipient transactiontranslator.
47423  *
47424  * Field Access Macros:
47425  *
47426  */
47427 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT15_PRTADDR register field. */
47428 #define ALT_USB_HOST_HCSPLT15_PRTADDR_LSB 0
47429 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT15_PRTADDR register field. */
47430 #define ALT_USB_HOST_HCSPLT15_PRTADDR_MSB 6
47431 /* The width in bits of the ALT_USB_HOST_HCSPLT15_PRTADDR register field. */
47432 #define ALT_USB_HOST_HCSPLT15_PRTADDR_WIDTH 7
47433 /* The mask used to set the ALT_USB_HOST_HCSPLT15_PRTADDR register field value. */
47434 #define ALT_USB_HOST_HCSPLT15_PRTADDR_SET_MSK 0x0000007f
47435 /* The mask used to clear the ALT_USB_HOST_HCSPLT15_PRTADDR register field value. */
47436 #define ALT_USB_HOST_HCSPLT15_PRTADDR_CLR_MSK 0xffffff80
47437 /* The reset value of the ALT_USB_HOST_HCSPLT15_PRTADDR register field. */
47438 #define ALT_USB_HOST_HCSPLT15_PRTADDR_RESET 0x0
47439 /* Extracts the ALT_USB_HOST_HCSPLT15_PRTADDR field value from a register. */
47440 #define ALT_USB_HOST_HCSPLT15_PRTADDR_GET(value) (((value) & 0x0000007f) >> 0)
47441 /* Produces a ALT_USB_HOST_HCSPLT15_PRTADDR register field value suitable for setting the register. */
47442 #define ALT_USB_HOST_HCSPLT15_PRTADDR_SET(value) (((value) << 0) & 0x0000007f)
47443 
47444 /*
47445  * Field : Hub Address - hubaddr
47446  *
47447  * This field holds the device address of the transaction translator's hub.
47448  *
47449  * Field Access Macros:
47450  *
47451  */
47452 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT15_HUBADDR register field. */
47453 #define ALT_USB_HOST_HCSPLT15_HUBADDR_LSB 7
47454 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT15_HUBADDR register field. */
47455 #define ALT_USB_HOST_HCSPLT15_HUBADDR_MSB 13
47456 /* The width in bits of the ALT_USB_HOST_HCSPLT15_HUBADDR register field. */
47457 #define ALT_USB_HOST_HCSPLT15_HUBADDR_WIDTH 7
47458 /* The mask used to set the ALT_USB_HOST_HCSPLT15_HUBADDR register field value. */
47459 #define ALT_USB_HOST_HCSPLT15_HUBADDR_SET_MSK 0x00003f80
47460 /* The mask used to clear the ALT_USB_HOST_HCSPLT15_HUBADDR register field value. */
47461 #define ALT_USB_HOST_HCSPLT15_HUBADDR_CLR_MSK 0xffffc07f
47462 /* The reset value of the ALT_USB_HOST_HCSPLT15_HUBADDR register field. */
47463 #define ALT_USB_HOST_HCSPLT15_HUBADDR_RESET 0x0
47464 /* Extracts the ALT_USB_HOST_HCSPLT15_HUBADDR field value from a register. */
47465 #define ALT_USB_HOST_HCSPLT15_HUBADDR_GET(value) (((value) & 0x00003f80) >> 7)
47466 /* Produces a ALT_USB_HOST_HCSPLT15_HUBADDR register field value suitable for setting the register. */
47467 #define ALT_USB_HOST_HCSPLT15_HUBADDR_SET(value) (((value) << 7) & 0x00003f80)
47468 
47469 /*
47470  * Field : Transaction Position - xactpos
47471  *
47472  * This field is used to determine whether to send all, first, middle, or last
47473  * payloads with each OUT transaction.
47474  *
47475  * Field Enumeration Values:
47476  *
47477  * Enum | Value | Description
47478  * :---------------------------------------|:------|:------------------------------------------------
47479  * ALT_USB_HOST_HCSPLT15_XACTPOS_E_MIDDLE | 0x0 | Mid. This is the middle payload of this
47480  * : | | transaction (which is larger than 188 bytes)
47481  * ALT_USB_HOST_HCSPLT15_XACTPOS_E_END | 0x1 | End. This is the last payload of this
47482  * : | | transaction (which is larger than 188 bytes)
47483  * ALT_USB_HOST_HCSPLT15_XACTPOS_E_BEGIN | 0x2 | Begin. This is the first data payload of this
47484  * : | | transaction (which is larger than 188 bytes)
47485  * ALT_USB_HOST_HCSPLT15_XACTPOS_E_ALL | 0x3 | All. This is the entire data payload is of this
47486  * : | | transaction (which is less than or equal to 188
47487  * : | | bytes)
47488  *
47489  * Field Access Macros:
47490  *
47491  */
47492 /*
47493  * Enumerated value for register field ALT_USB_HOST_HCSPLT15_XACTPOS
47494  *
47495  * Mid. This is the middle payload of this transaction (which is larger than 188
47496  * bytes)
47497  */
47498 #define ALT_USB_HOST_HCSPLT15_XACTPOS_E_MIDDLE 0x0
47499 /*
47500  * Enumerated value for register field ALT_USB_HOST_HCSPLT15_XACTPOS
47501  *
47502  * End. This is the last payload of this transaction (which is larger than 188
47503  * bytes)
47504  */
47505 #define ALT_USB_HOST_HCSPLT15_XACTPOS_E_END 0x1
47506 /*
47507  * Enumerated value for register field ALT_USB_HOST_HCSPLT15_XACTPOS
47508  *
47509  * Begin. This is the first data payload of this transaction (which is larger than
47510  * 188 bytes)
47511  */
47512 #define ALT_USB_HOST_HCSPLT15_XACTPOS_E_BEGIN 0x2
47513 /*
47514  * Enumerated value for register field ALT_USB_HOST_HCSPLT15_XACTPOS
47515  *
47516  * All. This is the entire data payload is of this transaction (which is less than
47517  * or equal to 188 bytes)
47518  */
47519 #define ALT_USB_HOST_HCSPLT15_XACTPOS_E_ALL 0x3
47520 
47521 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT15_XACTPOS register field. */
47522 #define ALT_USB_HOST_HCSPLT15_XACTPOS_LSB 14
47523 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT15_XACTPOS register field. */
47524 #define ALT_USB_HOST_HCSPLT15_XACTPOS_MSB 15
47525 /* The width in bits of the ALT_USB_HOST_HCSPLT15_XACTPOS register field. */
47526 #define ALT_USB_HOST_HCSPLT15_XACTPOS_WIDTH 2
47527 /* The mask used to set the ALT_USB_HOST_HCSPLT15_XACTPOS register field value. */
47528 #define ALT_USB_HOST_HCSPLT15_XACTPOS_SET_MSK 0x0000c000
47529 /* The mask used to clear the ALT_USB_HOST_HCSPLT15_XACTPOS register field value. */
47530 #define ALT_USB_HOST_HCSPLT15_XACTPOS_CLR_MSK 0xffff3fff
47531 /* The reset value of the ALT_USB_HOST_HCSPLT15_XACTPOS register field. */
47532 #define ALT_USB_HOST_HCSPLT15_XACTPOS_RESET 0x0
47533 /* Extracts the ALT_USB_HOST_HCSPLT15_XACTPOS field value from a register. */
47534 #define ALT_USB_HOST_HCSPLT15_XACTPOS_GET(value) (((value) & 0x0000c000) >> 14)
47535 /* Produces a ALT_USB_HOST_HCSPLT15_XACTPOS register field value suitable for setting the register. */
47536 #define ALT_USB_HOST_HCSPLT15_XACTPOS_SET(value) (((value) << 14) & 0x0000c000)
47537 
47538 /*
47539  * Field : Do Complete Split - compsplt
47540  *
47541  * The application sets this field to request the OTG host to perform a complete
47542  * split transaction.
47543  *
47544  * Field Enumeration Values:
47545  *
47546  * Enum | Value | Description
47547  * :-----------------------------------------|:------|:---------------------
47548  * ALT_USB_HOST_HCSPLT15_COMPSPLT_E_NOSPLIT | 0x0 | No split transaction
47549  * ALT_USB_HOST_HCSPLT15_COMPSPLT_E_SPLIT | 0x1 | Split transaction
47550  *
47551  * Field Access Macros:
47552  *
47553  */
47554 /*
47555  * Enumerated value for register field ALT_USB_HOST_HCSPLT15_COMPSPLT
47556  *
47557  * No split transaction
47558  */
47559 #define ALT_USB_HOST_HCSPLT15_COMPSPLT_E_NOSPLIT 0x0
47560 /*
47561  * Enumerated value for register field ALT_USB_HOST_HCSPLT15_COMPSPLT
47562  *
47563  * Split transaction
47564  */
47565 #define ALT_USB_HOST_HCSPLT15_COMPSPLT_E_SPLIT 0x1
47566 
47567 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT15_COMPSPLT register field. */
47568 #define ALT_USB_HOST_HCSPLT15_COMPSPLT_LSB 16
47569 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT15_COMPSPLT register field. */
47570 #define ALT_USB_HOST_HCSPLT15_COMPSPLT_MSB 16
47571 /* The width in bits of the ALT_USB_HOST_HCSPLT15_COMPSPLT register field. */
47572 #define ALT_USB_HOST_HCSPLT15_COMPSPLT_WIDTH 1
47573 /* The mask used to set the ALT_USB_HOST_HCSPLT15_COMPSPLT register field value. */
47574 #define ALT_USB_HOST_HCSPLT15_COMPSPLT_SET_MSK 0x00010000
47575 /* The mask used to clear the ALT_USB_HOST_HCSPLT15_COMPSPLT register field value. */
47576 #define ALT_USB_HOST_HCSPLT15_COMPSPLT_CLR_MSK 0xfffeffff
47577 /* The reset value of the ALT_USB_HOST_HCSPLT15_COMPSPLT register field. */
47578 #define ALT_USB_HOST_HCSPLT15_COMPSPLT_RESET 0x0
47579 /* Extracts the ALT_USB_HOST_HCSPLT15_COMPSPLT field value from a register. */
47580 #define ALT_USB_HOST_HCSPLT15_COMPSPLT_GET(value) (((value) & 0x00010000) >> 16)
47581 /* Produces a ALT_USB_HOST_HCSPLT15_COMPSPLT register field value suitable for setting the register. */
47582 #define ALT_USB_HOST_HCSPLT15_COMPSPLT_SET(value) (((value) << 16) & 0x00010000)
47583 
47584 /*
47585  * Field : Split Enable - spltena
47586  *
47587  * The application sets this field to indicate that this channel is enabled to
47588  * perform split transactions.
47589  *
47590  * Field Enumeration Values:
47591  *
47592  * Enum | Value | Description
47593  * :-------------------------------------|:------|:------------------
47594  * ALT_USB_HOST_HCSPLT15_SPLTENA_E_DISD | 0x0 | Split not enabled
47595  * ALT_USB_HOST_HCSPLT15_SPLTENA_E_END | 0x1 | Split enabled
47596  *
47597  * Field Access Macros:
47598  *
47599  */
47600 /*
47601  * Enumerated value for register field ALT_USB_HOST_HCSPLT15_SPLTENA
47602  *
47603  * Split not enabled
47604  */
47605 #define ALT_USB_HOST_HCSPLT15_SPLTENA_E_DISD 0x0
47606 /*
47607  * Enumerated value for register field ALT_USB_HOST_HCSPLT15_SPLTENA
47608  *
47609  * Split enabled
47610  */
47611 #define ALT_USB_HOST_HCSPLT15_SPLTENA_E_END 0x1
47612 
47613 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCSPLT15_SPLTENA register field. */
47614 #define ALT_USB_HOST_HCSPLT15_SPLTENA_LSB 31
47615 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCSPLT15_SPLTENA register field. */
47616 #define ALT_USB_HOST_HCSPLT15_SPLTENA_MSB 31
47617 /* The width in bits of the ALT_USB_HOST_HCSPLT15_SPLTENA register field. */
47618 #define ALT_USB_HOST_HCSPLT15_SPLTENA_WIDTH 1
47619 /* The mask used to set the ALT_USB_HOST_HCSPLT15_SPLTENA register field value. */
47620 #define ALT_USB_HOST_HCSPLT15_SPLTENA_SET_MSK 0x80000000
47621 /* The mask used to clear the ALT_USB_HOST_HCSPLT15_SPLTENA register field value. */
47622 #define ALT_USB_HOST_HCSPLT15_SPLTENA_CLR_MSK 0x7fffffff
47623 /* The reset value of the ALT_USB_HOST_HCSPLT15_SPLTENA register field. */
47624 #define ALT_USB_HOST_HCSPLT15_SPLTENA_RESET 0x0
47625 /* Extracts the ALT_USB_HOST_HCSPLT15_SPLTENA field value from a register. */
47626 #define ALT_USB_HOST_HCSPLT15_SPLTENA_GET(value) (((value) & 0x80000000) >> 31)
47627 /* Produces a ALT_USB_HOST_HCSPLT15_SPLTENA register field value suitable for setting the register. */
47628 #define ALT_USB_HOST_HCSPLT15_SPLTENA_SET(value) (((value) << 31) & 0x80000000)
47629 
47630 #ifndef __ASSEMBLY__
47631 /*
47632  * WARNING: The C register and register group struct declarations are provided for
47633  * convenience and illustrative purposes. They should, however, be used with
47634  * caution as the C language standard provides no guarantees about the alignment or
47635  * atomicity of device memory accesses. The recommended practice for writing
47636  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
47637  * alt_write_word() functions.
47638  *
47639  * The struct declaration for register ALT_USB_HOST_HCSPLT15.
47640  */
47641 struct ALT_USB_HOST_HCSPLT15_s
47642 {
47643  uint32_t prtaddr : 7; /* Port Address */
47644  uint32_t hubaddr : 7; /* Hub Address */
47645  uint32_t xactpos : 2; /* Transaction Position */
47646  uint32_t compsplt : 1; /* Do Complete Split */
47647  uint32_t : 14; /* *UNDEFINED* */
47648  uint32_t spltena : 1; /* Split Enable */
47649 };
47650 
47651 /* The typedef declaration for register ALT_USB_HOST_HCSPLT15. */
47652 typedef volatile struct ALT_USB_HOST_HCSPLT15_s ALT_USB_HOST_HCSPLT15_t;
47653 #endif /* __ASSEMBLY__ */
47654 
47655 /* The byte offset of the ALT_USB_HOST_HCSPLT15 register from the beginning of the component. */
47656 #define ALT_USB_HOST_HCSPLT15_OFST 0x2e4
47657 /* The address of the ALT_USB_HOST_HCSPLT15 register. */
47658 #define ALT_USB_HOST_HCSPLT15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCSPLT15_OFST))
47659 
47660 /*
47661  * Register : Host Channel 15 Interrupt Register - hcint15
47662  *
47663  * This register indicates the status of a channel with respect to USB- and AHB-
47664  * related events. The application must read this register when the Host Channels
47665  * Interrupt bit of the Core Interrupt register (GINTSTS.HChInt) is set. Before the
47666  * application can read this register, it must first read the Host All Channels
47667  * Interrupt (HAINT) register to get the exact channel number for the Host
47668  * Channel-n Interrupt register. The application must clear the appropriate bit in
47669  * this register to clear the corresponding bits in the HAINT and GINTSTS
47670  * registers.
47671  *
47672  * Register Layout
47673  *
47674  * Bits | Access | Reset | Description
47675  * :--------|:-------|:------|:--------------------------------------------
47676  * [0] | R | 0x0 | Transfer Completed
47677  * [1] | R | 0x0 | Channel Halted
47678  * [2] | R | 0x0 | AHB Error
47679  * [3] | R | 0x0 | STALL Response Received Interrupt
47680  * [4] | R | 0x0 | NAK Response Received Interrupt
47681  * [5] | R | 0x0 | ACK Response Received Transmitted Interrupt
47682  * [6] | R | 0x0 | NYET Response Received Interrupt
47683  * [7] | R | 0x0 | Transaction Error
47684  * [8] | R | 0x0 | Babble Error
47685  * [9] | R | 0x0 | Frame Overrun
47686  * [10] | R | 0x0 | Data Toggle Error
47687  * [11] | R | 0x0 | BNA Interrupt
47688  * [12] | R | 0x0 | Excessive Transaction Error
47689  * [13] | R | 0x0 | Descriptor rollover interrupt
47690  * [31:14] | ??? | 0x0 | *UNDEFINED*
47691  *
47692  */
47693 /*
47694  * Field : Transfer Completed - xfercompl
47695  *
47696  * Transfer completed normally without any errors. This bit can be set only by the
47697  * core and the application should write 1 to clear it.
47698  *
47699  * Field Enumeration Values:
47700  *
47701  * Enum | Value | Description
47702  * :---------------------------------------|:------|:-----------------------------------------------
47703  * ALT_USB_HOST_HCINT15_XFERCOMPL_E_INACT | 0x0 | No transfer
47704  * ALT_USB_HOST_HCINT15_XFERCOMPL_E_ACT | 0x1 | Transfer completed normally without any errors
47705  *
47706  * Field Access Macros:
47707  *
47708  */
47709 /*
47710  * Enumerated value for register field ALT_USB_HOST_HCINT15_XFERCOMPL
47711  *
47712  * No transfer
47713  */
47714 #define ALT_USB_HOST_HCINT15_XFERCOMPL_E_INACT 0x0
47715 /*
47716  * Enumerated value for register field ALT_USB_HOST_HCINT15_XFERCOMPL
47717  *
47718  * Transfer completed normally without any errors
47719  */
47720 #define ALT_USB_HOST_HCINT15_XFERCOMPL_E_ACT 0x1
47721 
47722 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_XFERCOMPL register field. */
47723 #define ALT_USB_HOST_HCINT15_XFERCOMPL_LSB 0
47724 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_XFERCOMPL register field. */
47725 #define ALT_USB_HOST_HCINT15_XFERCOMPL_MSB 0
47726 /* The width in bits of the ALT_USB_HOST_HCINT15_XFERCOMPL register field. */
47727 #define ALT_USB_HOST_HCINT15_XFERCOMPL_WIDTH 1
47728 /* The mask used to set the ALT_USB_HOST_HCINT15_XFERCOMPL register field value. */
47729 #define ALT_USB_HOST_HCINT15_XFERCOMPL_SET_MSK 0x00000001
47730 /* The mask used to clear the ALT_USB_HOST_HCINT15_XFERCOMPL register field value. */
47731 #define ALT_USB_HOST_HCINT15_XFERCOMPL_CLR_MSK 0xfffffffe
47732 /* The reset value of the ALT_USB_HOST_HCINT15_XFERCOMPL register field. */
47733 #define ALT_USB_HOST_HCINT15_XFERCOMPL_RESET 0x0
47734 /* Extracts the ALT_USB_HOST_HCINT15_XFERCOMPL field value from a register. */
47735 #define ALT_USB_HOST_HCINT15_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
47736 /* Produces a ALT_USB_HOST_HCINT15_XFERCOMPL register field value suitable for setting the register. */
47737 #define ALT_USB_HOST_HCINT15_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
47738 
47739 /*
47740  * Field : Channel Halted - chhltd
47741  *
47742  * In non Scatter/Gather DMA mode, it indicates the transfer completed abnormally
47743  * either because of any USB transaction error or in response to disable request by
47744  * the application or because of a completed transfer. In Scatter/gather DMA mode,
47745  * this indicates that transfer completed due to any of the following
47746  *
47747  * . EOL being set in descriptor
47748  *
47749  * . AHB error
47750  *
47751  * . Excessive transaction errors
47752  *
47753  * . Babble
47754  *
47755  * . Stall
47756  *
47757  * Field Enumeration Values:
47758  *
47759  * Enum | Value | Description
47760  * :------------------------------------|:------|:-------------------
47761  * ALT_USB_HOST_HCINT15_CHHLTD_E_INACT | 0x0 | Channel not halted
47762  * ALT_USB_HOST_HCINT15_CHHLTD_E_ACT | 0x1 | Channel Halted
47763  *
47764  * Field Access Macros:
47765  *
47766  */
47767 /*
47768  * Enumerated value for register field ALT_USB_HOST_HCINT15_CHHLTD
47769  *
47770  * Channel not halted
47771  */
47772 #define ALT_USB_HOST_HCINT15_CHHLTD_E_INACT 0x0
47773 /*
47774  * Enumerated value for register field ALT_USB_HOST_HCINT15_CHHLTD
47775  *
47776  * Channel Halted
47777  */
47778 #define ALT_USB_HOST_HCINT15_CHHLTD_E_ACT 0x1
47779 
47780 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_CHHLTD register field. */
47781 #define ALT_USB_HOST_HCINT15_CHHLTD_LSB 1
47782 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_CHHLTD register field. */
47783 #define ALT_USB_HOST_HCINT15_CHHLTD_MSB 1
47784 /* The width in bits of the ALT_USB_HOST_HCINT15_CHHLTD register field. */
47785 #define ALT_USB_HOST_HCINT15_CHHLTD_WIDTH 1
47786 /* The mask used to set the ALT_USB_HOST_HCINT15_CHHLTD register field value. */
47787 #define ALT_USB_HOST_HCINT15_CHHLTD_SET_MSK 0x00000002
47788 /* The mask used to clear the ALT_USB_HOST_HCINT15_CHHLTD register field value. */
47789 #define ALT_USB_HOST_HCINT15_CHHLTD_CLR_MSK 0xfffffffd
47790 /* The reset value of the ALT_USB_HOST_HCINT15_CHHLTD register field. */
47791 #define ALT_USB_HOST_HCINT15_CHHLTD_RESET 0x0
47792 /* Extracts the ALT_USB_HOST_HCINT15_CHHLTD field value from a register. */
47793 #define ALT_USB_HOST_HCINT15_CHHLTD_GET(value) (((value) & 0x00000002) >> 1)
47794 /* Produces a ALT_USB_HOST_HCINT15_CHHLTD register field value suitable for setting the register. */
47795 #define ALT_USB_HOST_HCINT15_CHHLTD_SET(value) (((value) << 1) & 0x00000002)
47796 
47797 /*
47798  * Field : AHB Error - ahberr
47799  *
47800  * This is generated only in Internal DMA mode when there is an AHB error during
47801  * AHB read/write. The application can read the corresponding channel's DMA address
47802  * register to get the error address.
47803  *
47804  * Field Enumeration Values:
47805  *
47806  * Enum | Value | Description
47807  * :------------------------------------|:------|:--------------------------------
47808  * ALT_USB_HOST_HCINT15_AHBERR_E_INACT | 0x0 | No AHB error
47809  * ALT_USB_HOST_HCINT15_AHBERR_E_ACT | 0x1 | AHB error during AHB read/write
47810  *
47811  * Field Access Macros:
47812  *
47813  */
47814 /*
47815  * Enumerated value for register field ALT_USB_HOST_HCINT15_AHBERR
47816  *
47817  * No AHB error
47818  */
47819 #define ALT_USB_HOST_HCINT15_AHBERR_E_INACT 0x0
47820 /*
47821  * Enumerated value for register field ALT_USB_HOST_HCINT15_AHBERR
47822  *
47823  * AHB error during AHB read/write
47824  */
47825 #define ALT_USB_HOST_HCINT15_AHBERR_E_ACT 0x1
47826 
47827 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_AHBERR register field. */
47828 #define ALT_USB_HOST_HCINT15_AHBERR_LSB 2
47829 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_AHBERR register field. */
47830 #define ALT_USB_HOST_HCINT15_AHBERR_MSB 2
47831 /* The width in bits of the ALT_USB_HOST_HCINT15_AHBERR register field. */
47832 #define ALT_USB_HOST_HCINT15_AHBERR_WIDTH 1
47833 /* The mask used to set the ALT_USB_HOST_HCINT15_AHBERR register field value. */
47834 #define ALT_USB_HOST_HCINT15_AHBERR_SET_MSK 0x00000004
47835 /* The mask used to clear the ALT_USB_HOST_HCINT15_AHBERR register field value. */
47836 #define ALT_USB_HOST_HCINT15_AHBERR_CLR_MSK 0xfffffffb
47837 /* The reset value of the ALT_USB_HOST_HCINT15_AHBERR register field. */
47838 #define ALT_USB_HOST_HCINT15_AHBERR_RESET 0x0
47839 /* Extracts the ALT_USB_HOST_HCINT15_AHBERR field value from a register. */
47840 #define ALT_USB_HOST_HCINT15_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
47841 /* Produces a ALT_USB_HOST_HCINT15_AHBERR register field value suitable for setting the register. */
47842 #define ALT_USB_HOST_HCINT15_AHBERR_SET(value) (((value) << 2) & 0x00000004)
47843 
47844 /*
47845  * Field : STALL Response Received Interrupt - stall
47846  *
47847  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
47848  * This bit can be set only by the core and the application should write 1 to clear
47849  * it.
47850  *
47851  * Field Enumeration Values:
47852  *
47853  * Enum | Value | Description
47854  * :-----------------------------------|:------|:-------------------
47855  * ALT_USB_HOST_HCINT15_STALL_E_INACT | 0x0 | No Stall Interrupt
47856  * ALT_USB_HOST_HCINT15_STALL_E_ACT | 0x1 | Stall Interrupt
47857  *
47858  * Field Access Macros:
47859  *
47860  */
47861 /*
47862  * Enumerated value for register field ALT_USB_HOST_HCINT15_STALL
47863  *
47864  * No Stall Interrupt
47865  */
47866 #define ALT_USB_HOST_HCINT15_STALL_E_INACT 0x0
47867 /*
47868  * Enumerated value for register field ALT_USB_HOST_HCINT15_STALL
47869  *
47870  * Stall Interrupt
47871  */
47872 #define ALT_USB_HOST_HCINT15_STALL_E_ACT 0x1
47873 
47874 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_STALL register field. */
47875 #define ALT_USB_HOST_HCINT15_STALL_LSB 3
47876 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_STALL register field. */
47877 #define ALT_USB_HOST_HCINT15_STALL_MSB 3
47878 /* The width in bits of the ALT_USB_HOST_HCINT15_STALL register field. */
47879 #define ALT_USB_HOST_HCINT15_STALL_WIDTH 1
47880 /* The mask used to set the ALT_USB_HOST_HCINT15_STALL register field value. */
47881 #define ALT_USB_HOST_HCINT15_STALL_SET_MSK 0x00000008
47882 /* The mask used to clear the ALT_USB_HOST_HCINT15_STALL register field value. */
47883 #define ALT_USB_HOST_HCINT15_STALL_CLR_MSK 0xfffffff7
47884 /* The reset value of the ALT_USB_HOST_HCINT15_STALL register field. */
47885 #define ALT_USB_HOST_HCINT15_STALL_RESET 0x0
47886 /* Extracts the ALT_USB_HOST_HCINT15_STALL field value from a register. */
47887 #define ALT_USB_HOST_HCINT15_STALL_GET(value) (((value) & 0x00000008) >> 3)
47888 /* Produces a ALT_USB_HOST_HCINT15_STALL register field value suitable for setting the register. */
47889 #define ALT_USB_HOST_HCINT15_STALL_SET(value) (((value) << 3) & 0x00000008)
47890 
47891 /*
47892  * Field : NAK Response Received Interrupt - nak
47893  *
47894  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
47895  * core.This bit can be set only by the core and the application should write 1 to
47896  * clear it.
47897  *
47898  * Field Enumeration Values:
47899  *
47900  * Enum | Value | Description
47901  * :---------------------------------|:------|:-----------------------------------
47902  * ALT_USB_HOST_HCINT15_NAK_E_INACT | 0x0 | No NAK Response Received Interrupt
47903  * ALT_USB_HOST_HCINT15_NAK_E_ACT | 0x1 | NAK Response Received Interrupt
47904  *
47905  * Field Access Macros:
47906  *
47907  */
47908 /*
47909  * Enumerated value for register field ALT_USB_HOST_HCINT15_NAK
47910  *
47911  * No NAK Response Received Interrupt
47912  */
47913 #define ALT_USB_HOST_HCINT15_NAK_E_INACT 0x0
47914 /*
47915  * Enumerated value for register field ALT_USB_HOST_HCINT15_NAK
47916  *
47917  * NAK Response Received Interrupt
47918  */
47919 #define ALT_USB_HOST_HCINT15_NAK_E_ACT 0x1
47920 
47921 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_NAK register field. */
47922 #define ALT_USB_HOST_HCINT15_NAK_LSB 4
47923 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_NAK register field. */
47924 #define ALT_USB_HOST_HCINT15_NAK_MSB 4
47925 /* The width in bits of the ALT_USB_HOST_HCINT15_NAK register field. */
47926 #define ALT_USB_HOST_HCINT15_NAK_WIDTH 1
47927 /* The mask used to set the ALT_USB_HOST_HCINT15_NAK register field value. */
47928 #define ALT_USB_HOST_HCINT15_NAK_SET_MSK 0x00000010
47929 /* The mask used to clear the ALT_USB_HOST_HCINT15_NAK register field value. */
47930 #define ALT_USB_HOST_HCINT15_NAK_CLR_MSK 0xffffffef
47931 /* The reset value of the ALT_USB_HOST_HCINT15_NAK register field. */
47932 #define ALT_USB_HOST_HCINT15_NAK_RESET 0x0
47933 /* Extracts the ALT_USB_HOST_HCINT15_NAK field value from a register. */
47934 #define ALT_USB_HOST_HCINT15_NAK_GET(value) (((value) & 0x00000010) >> 4)
47935 /* Produces a ALT_USB_HOST_HCINT15_NAK register field value suitable for setting the register. */
47936 #define ALT_USB_HOST_HCINT15_NAK_SET(value) (((value) << 4) & 0x00000010)
47937 
47938 /*
47939  * Field : ACK Response Received Transmitted Interrupt - ack
47940  *
47941  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
47942  * This bit can be set only by the core and the application should write 1 to clear
47943  * it.
47944  *
47945  * Field Enumeration Values:
47946  *
47947  * Enum | Value | Description
47948  * :---------------------------------|:------|:-----------------------------------------------
47949  * ALT_USB_HOST_HCINT15_ACK_E_INACT | 0x0 | No ACK Response Received Transmitted Interrupt
47950  * ALT_USB_HOST_HCINT15_ACK_E_ACT | 0x1 | ACK Response Received Transmitted Interrup
47951  *
47952  * Field Access Macros:
47953  *
47954  */
47955 /*
47956  * Enumerated value for register field ALT_USB_HOST_HCINT15_ACK
47957  *
47958  * No ACK Response Received Transmitted Interrupt
47959  */
47960 #define ALT_USB_HOST_HCINT15_ACK_E_INACT 0x0
47961 /*
47962  * Enumerated value for register field ALT_USB_HOST_HCINT15_ACK
47963  *
47964  * ACK Response Received Transmitted Interrup
47965  */
47966 #define ALT_USB_HOST_HCINT15_ACK_E_ACT 0x1
47967 
47968 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_ACK register field. */
47969 #define ALT_USB_HOST_HCINT15_ACK_LSB 5
47970 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_ACK register field. */
47971 #define ALT_USB_HOST_HCINT15_ACK_MSB 5
47972 /* The width in bits of the ALT_USB_HOST_HCINT15_ACK register field. */
47973 #define ALT_USB_HOST_HCINT15_ACK_WIDTH 1
47974 /* The mask used to set the ALT_USB_HOST_HCINT15_ACK register field value. */
47975 #define ALT_USB_HOST_HCINT15_ACK_SET_MSK 0x00000020
47976 /* The mask used to clear the ALT_USB_HOST_HCINT15_ACK register field value. */
47977 #define ALT_USB_HOST_HCINT15_ACK_CLR_MSK 0xffffffdf
47978 /* The reset value of the ALT_USB_HOST_HCINT15_ACK register field. */
47979 #define ALT_USB_HOST_HCINT15_ACK_RESET 0x0
47980 /* Extracts the ALT_USB_HOST_HCINT15_ACK field value from a register. */
47981 #define ALT_USB_HOST_HCINT15_ACK_GET(value) (((value) & 0x00000020) >> 5)
47982 /* Produces a ALT_USB_HOST_HCINT15_ACK register field value suitable for setting the register. */
47983 #define ALT_USB_HOST_HCINT15_ACK_SET(value) (((value) << 5) & 0x00000020)
47984 
47985 /*
47986  * Field : NYET Response Received Interrupt - nyet
47987  *
47988  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
47989  * core.This bit can be set only by the core and the application should write 1 to
47990  * clear it.
47991  *
47992  * Field Enumeration Values:
47993  *
47994  * Enum | Value | Description
47995  * :----------------------------------|:------|:------------------------------------
47996  * ALT_USB_HOST_HCINT15_NYET_E_INACT | 0x0 | No NYET Response Received Interrupt
47997  * ALT_USB_HOST_HCINT15_NYET_E_ACT | 0x1 | NYET Response Received Interrupt
47998  *
47999  * Field Access Macros:
48000  *
48001  */
48002 /*
48003  * Enumerated value for register field ALT_USB_HOST_HCINT15_NYET
48004  *
48005  * No NYET Response Received Interrupt
48006  */
48007 #define ALT_USB_HOST_HCINT15_NYET_E_INACT 0x0
48008 /*
48009  * Enumerated value for register field ALT_USB_HOST_HCINT15_NYET
48010  *
48011  * NYET Response Received Interrupt
48012  */
48013 #define ALT_USB_HOST_HCINT15_NYET_E_ACT 0x1
48014 
48015 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_NYET register field. */
48016 #define ALT_USB_HOST_HCINT15_NYET_LSB 6
48017 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_NYET register field. */
48018 #define ALT_USB_HOST_HCINT15_NYET_MSB 6
48019 /* The width in bits of the ALT_USB_HOST_HCINT15_NYET register field. */
48020 #define ALT_USB_HOST_HCINT15_NYET_WIDTH 1
48021 /* The mask used to set the ALT_USB_HOST_HCINT15_NYET register field value. */
48022 #define ALT_USB_HOST_HCINT15_NYET_SET_MSK 0x00000040
48023 /* The mask used to clear the ALT_USB_HOST_HCINT15_NYET register field value. */
48024 #define ALT_USB_HOST_HCINT15_NYET_CLR_MSK 0xffffffbf
48025 /* The reset value of the ALT_USB_HOST_HCINT15_NYET register field. */
48026 #define ALT_USB_HOST_HCINT15_NYET_RESET 0x0
48027 /* Extracts the ALT_USB_HOST_HCINT15_NYET field value from a register. */
48028 #define ALT_USB_HOST_HCINT15_NYET_GET(value) (((value) & 0x00000040) >> 6)
48029 /* Produces a ALT_USB_HOST_HCINT15_NYET register field value suitable for setting the register. */
48030 #define ALT_USB_HOST_HCINT15_NYET_SET(value) (((value) << 6) & 0x00000040)
48031 
48032 /*
48033  * Field : Transaction Error - xacterr
48034  *
48035  * Indicates one of the following errors occurred on the USB.-CRC check failure
48036  *
48037  * * Timeout
48038  *
48039  * * Bit stuff error
48040  *
48041  * * False EOP
48042  *
48043  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
48044  * This bit can be set only by the core and the application should write 1 to clear
48045  * it.
48046  *
48047  * Field Enumeration Values:
48048  *
48049  * Enum | Value | Description
48050  * :-------------------------------------|:------|:---------------------
48051  * ALT_USB_HOST_HCINT15_XACTERR_E_INACT | 0x0 | No Transaction Error
48052  * ALT_USB_HOST_HCINT15_XACTERR_E_ACT | 0x1 | Transaction Error
48053  *
48054  * Field Access Macros:
48055  *
48056  */
48057 /*
48058  * Enumerated value for register field ALT_USB_HOST_HCINT15_XACTERR
48059  *
48060  * No Transaction Error
48061  */
48062 #define ALT_USB_HOST_HCINT15_XACTERR_E_INACT 0x0
48063 /*
48064  * Enumerated value for register field ALT_USB_HOST_HCINT15_XACTERR
48065  *
48066  * Transaction Error
48067  */
48068 #define ALT_USB_HOST_HCINT15_XACTERR_E_ACT 0x1
48069 
48070 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_XACTERR register field. */
48071 #define ALT_USB_HOST_HCINT15_XACTERR_LSB 7
48072 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_XACTERR register field. */
48073 #define ALT_USB_HOST_HCINT15_XACTERR_MSB 7
48074 /* The width in bits of the ALT_USB_HOST_HCINT15_XACTERR register field. */
48075 #define ALT_USB_HOST_HCINT15_XACTERR_WIDTH 1
48076 /* The mask used to set the ALT_USB_HOST_HCINT15_XACTERR register field value. */
48077 #define ALT_USB_HOST_HCINT15_XACTERR_SET_MSK 0x00000080
48078 /* The mask used to clear the ALT_USB_HOST_HCINT15_XACTERR register field value. */
48079 #define ALT_USB_HOST_HCINT15_XACTERR_CLR_MSK 0xffffff7f
48080 /* The reset value of the ALT_USB_HOST_HCINT15_XACTERR register field. */
48081 #define ALT_USB_HOST_HCINT15_XACTERR_RESET 0x0
48082 /* Extracts the ALT_USB_HOST_HCINT15_XACTERR field value from a register. */
48083 #define ALT_USB_HOST_HCINT15_XACTERR_GET(value) (((value) & 0x00000080) >> 7)
48084 /* Produces a ALT_USB_HOST_HCINT15_XACTERR register field value suitable for setting the register. */
48085 #define ALT_USB_HOST_HCINT15_XACTERR_SET(value) (((value) << 7) & 0x00000080)
48086 
48087 /*
48088  * Field : Babble Error - bblerr
48089  *
48090  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
48091  * core..This bit can be set only by the core and the application should write 1 to
48092  * clear it.
48093  *
48094  * Field Enumeration Values:
48095  *
48096  * Enum | Value | Description
48097  * :------------------------------------|:------|:----------------
48098  * ALT_USB_HOST_HCINT15_BBLERR_E_INACT | 0x0 | No Babble Error
48099  * ALT_USB_HOST_HCINT15_BBLERR_E_ACT | 0x1 | Babble Error
48100  *
48101  * Field Access Macros:
48102  *
48103  */
48104 /*
48105  * Enumerated value for register field ALT_USB_HOST_HCINT15_BBLERR
48106  *
48107  * No Babble Error
48108  */
48109 #define ALT_USB_HOST_HCINT15_BBLERR_E_INACT 0x0
48110 /*
48111  * Enumerated value for register field ALT_USB_HOST_HCINT15_BBLERR
48112  *
48113  * Babble Error
48114  */
48115 #define ALT_USB_HOST_HCINT15_BBLERR_E_ACT 0x1
48116 
48117 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_BBLERR register field. */
48118 #define ALT_USB_HOST_HCINT15_BBLERR_LSB 8
48119 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_BBLERR register field. */
48120 #define ALT_USB_HOST_HCINT15_BBLERR_MSB 8
48121 /* The width in bits of the ALT_USB_HOST_HCINT15_BBLERR register field. */
48122 #define ALT_USB_HOST_HCINT15_BBLERR_WIDTH 1
48123 /* The mask used to set the ALT_USB_HOST_HCINT15_BBLERR register field value. */
48124 #define ALT_USB_HOST_HCINT15_BBLERR_SET_MSK 0x00000100
48125 /* The mask used to clear the ALT_USB_HOST_HCINT15_BBLERR register field value. */
48126 #define ALT_USB_HOST_HCINT15_BBLERR_CLR_MSK 0xfffffeff
48127 /* The reset value of the ALT_USB_HOST_HCINT15_BBLERR register field. */
48128 #define ALT_USB_HOST_HCINT15_BBLERR_RESET 0x0
48129 /* Extracts the ALT_USB_HOST_HCINT15_BBLERR field value from a register. */
48130 #define ALT_USB_HOST_HCINT15_BBLERR_GET(value) (((value) & 0x00000100) >> 8)
48131 /* Produces a ALT_USB_HOST_HCINT15_BBLERR register field value suitable for setting the register. */
48132 #define ALT_USB_HOST_HCINT15_BBLERR_SET(value) (((value) << 8) & 0x00000100)
48133 
48134 /*
48135  * Field : Frame Overrun - frmovrun
48136  *
48137  * In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the core.
48138  * This bit can be set only by the core and the application should write 1 to clear
48139  * it.
48140  *
48141  * Field Enumeration Values:
48142  *
48143  * Enum | Value | Description
48144  * :--------------------------------------|:------|:-----------------
48145  * ALT_USB_HOST_HCINT15_FRMOVRUN_E_INACT | 0x0 | No Frame Overrun
48146  * ALT_USB_HOST_HCINT15_FRMOVRUN_E_ACT | 0x1 | Frame Overrun
48147  *
48148  * Field Access Macros:
48149  *
48150  */
48151 /*
48152  * Enumerated value for register field ALT_USB_HOST_HCINT15_FRMOVRUN
48153  *
48154  * No Frame Overrun
48155  */
48156 #define ALT_USB_HOST_HCINT15_FRMOVRUN_E_INACT 0x0
48157 /*
48158  * Enumerated value for register field ALT_USB_HOST_HCINT15_FRMOVRUN
48159  *
48160  * Frame Overrun
48161  */
48162 #define ALT_USB_HOST_HCINT15_FRMOVRUN_E_ACT 0x1
48163 
48164 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_FRMOVRUN register field. */
48165 #define ALT_USB_HOST_HCINT15_FRMOVRUN_LSB 9
48166 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_FRMOVRUN register field. */
48167 #define ALT_USB_HOST_HCINT15_FRMOVRUN_MSB 9
48168 /* The width in bits of the ALT_USB_HOST_HCINT15_FRMOVRUN register field. */
48169 #define ALT_USB_HOST_HCINT15_FRMOVRUN_WIDTH 1
48170 /* The mask used to set the ALT_USB_HOST_HCINT15_FRMOVRUN register field value. */
48171 #define ALT_USB_HOST_HCINT15_FRMOVRUN_SET_MSK 0x00000200
48172 /* The mask used to clear the ALT_USB_HOST_HCINT15_FRMOVRUN register field value. */
48173 #define ALT_USB_HOST_HCINT15_FRMOVRUN_CLR_MSK 0xfffffdff
48174 /* The reset value of the ALT_USB_HOST_HCINT15_FRMOVRUN register field. */
48175 #define ALT_USB_HOST_HCINT15_FRMOVRUN_RESET 0x0
48176 /* Extracts the ALT_USB_HOST_HCINT15_FRMOVRUN field value from a register. */
48177 #define ALT_USB_HOST_HCINT15_FRMOVRUN_GET(value) (((value) & 0x00000200) >> 9)
48178 /* Produces a ALT_USB_HOST_HCINT15_FRMOVRUN register field value suitable for setting the register. */
48179 #define ALT_USB_HOST_HCINT15_FRMOVRUN_SET(value) (((value) << 9) & 0x00000200)
48180 
48181 /*
48182  * Field : Data Toggle Error - datatglerr
48183  *
48184  * This bit can be set only by the core and the application should write 1 to clear
48185  * it. In Scatter/Gather DMA mode, the interrupt due to this bit is masked in the
48186  * core.
48187  *
48188  * Field Enumeration Values:
48189  *
48190  * Enum | Value | Description
48191  * :----------------------------------------|:------|:---------------------
48192  * ALT_USB_HOST_HCINT15_DATATGLERR_E_INACT | 0x0 | No Data Toggle Error
48193  * ALT_USB_HOST_HCINT15_DATATGLERR_E_ACT | 0x1 | Data Toggle Error
48194  *
48195  * Field Access Macros:
48196  *
48197  */
48198 /*
48199  * Enumerated value for register field ALT_USB_HOST_HCINT15_DATATGLERR
48200  *
48201  * No Data Toggle Error
48202  */
48203 #define ALT_USB_HOST_HCINT15_DATATGLERR_E_INACT 0x0
48204 /*
48205  * Enumerated value for register field ALT_USB_HOST_HCINT15_DATATGLERR
48206  *
48207  * Data Toggle Error
48208  */
48209 #define ALT_USB_HOST_HCINT15_DATATGLERR_E_ACT 0x1
48210 
48211 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_DATATGLERR register field. */
48212 #define ALT_USB_HOST_HCINT15_DATATGLERR_LSB 10
48213 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_DATATGLERR register field. */
48214 #define ALT_USB_HOST_HCINT15_DATATGLERR_MSB 10
48215 /* The width in bits of the ALT_USB_HOST_HCINT15_DATATGLERR register field. */
48216 #define ALT_USB_HOST_HCINT15_DATATGLERR_WIDTH 1
48217 /* The mask used to set the ALT_USB_HOST_HCINT15_DATATGLERR register field value. */
48218 #define ALT_USB_HOST_HCINT15_DATATGLERR_SET_MSK 0x00000400
48219 /* The mask used to clear the ALT_USB_HOST_HCINT15_DATATGLERR register field value. */
48220 #define ALT_USB_HOST_HCINT15_DATATGLERR_CLR_MSK 0xfffffbff
48221 /* The reset value of the ALT_USB_HOST_HCINT15_DATATGLERR register field. */
48222 #define ALT_USB_HOST_HCINT15_DATATGLERR_RESET 0x0
48223 /* Extracts the ALT_USB_HOST_HCINT15_DATATGLERR field value from a register. */
48224 #define ALT_USB_HOST_HCINT15_DATATGLERR_GET(value) (((value) & 0x00000400) >> 10)
48225 /* Produces a ALT_USB_HOST_HCINT15_DATATGLERR register field value suitable for setting the register. */
48226 #define ALT_USB_HOST_HCINT15_DATATGLERR_SET(value) (((value) << 10) & 0x00000400)
48227 
48228 /*
48229  * Field : BNA Interrupt - bnaintr
48230  *
48231  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
48232  * generates this interrupt when the descriptor accessed is not ready for the Core
48233  * to process. BNA will not be generated for Isochronous channels. for non
48234  * Scatter/Gather DMA mode, this bit is reserved.
48235  *
48236  * Field Enumeration Values:
48237  *
48238  * Enum | Value | Description
48239  * :-------------------------------------|:------|:-----------------
48240  * ALT_USB_HOST_HCINT15_BNAINTR_E_INACT | 0x0 | No BNA Interrupt
48241  * ALT_USB_HOST_HCINT15_BNAINTR_E_ACT | 0x1 | BNA Interrupt
48242  *
48243  * Field Access Macros:
48244  *
48245  */
48246 /*
48247  * Enumerated value for register field ALT_USB_HOST_HCINT15_BNAINTR
48248  *
48249  * No BNA Interrupt
48250  */
48251 #define ALT_USB_HOST_HCINT15_BNAINTR_E_INACT 0x0
48252 /*
48253  * Enumerated value for register field ALT_USB_HOST_HCINT15_BNAINTR
48254  *
48255  * BNA Interrupt
48256  */
48257 #define ALT_USB_HOST_HCINT15_BNAINTR_E_ACT 0x1
48258 
48259 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_BNAINTR register field. */
48260 #define ALT_USB_HOST_HCINT15_BNAINTR_LSB 11
48261 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_BNAINTR register field. */
48262 #define ALT_USB_HOST_HCINT15_BNAINTR_MSB 11
48263 /* The width in bits of the ALT_USB_HOST_HCINT15_BNAINTR register field. */
48264 #define ALT_USB_HOST_HCINT15_BNAINTR_WIDTH 1
48265 /* The mask used to set the ALT_USB_HOST_HCINT15_BNAINTR register field value. */
48266 #define ALT_USB_HOST_HCINT15_BNAINTR_SET_MSK 0x00000800
48267 /* The mask used to clear the ALT_USB_HOST_HCINT15_BNAINTR register field value. */
48268 #define ALT_USB_HOST_HCINT15_BNAINTR_CLR_MSK 0xfffff7ff
48269 /* The reset value of the ALT_USB_HOST_HCINT15_BNAINTR register field. */
48270 #define ALT_USB_HOST_HCINT15_BNAINTR_RESET 0x0
48271 /* Extracts the ALT_USB_HOST_HCINT15_BNAINTR field value from a register. */
48272 #define ALT_USB_HOST_HCINT15_BNAINTR_GET(value) (((value) & 0x00000800) >> 11)
48273 /* Produces a ALT_USB_HOST_HCINT15_BNAINTR register field value suitable for setting the register. */
48274 #define ALT_USB_HOST_HCINT15_BNAINTR_SET(value) (((value) << 11) & 0x00000800)
48275 
48276 /*
48277  * Field : Excessive Transaction Error - xcs_xact_err
48278  *
48279  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core sets
48280  * this bit when 3 consecutive transaction errors occurred on the USB bus.
48281  * XCS_XACT_ERR will not be generated for Isochronous channels.for non
48282  * Scatter/Gather DMA mode, this bit is reserved.
48283  *
48284  * Field Enumeration Values:
48285  *
48286  * Enum | Value | Description
48287  * :--------------------------------------------|:------|:-------------------------------
48288  * ALT_USB_HOST_HCINT15_XCS_XACT_ERR_E_INACT | 0x0 | No Excessive Transaction Error
48289  * ALT_USB_HOST_HCINT15_XCS_XACT_ERR_E_ACVTIVE | 0x1 | Excessive Transaction Error
48290  *
48291  * Field Access Macros:
48292  *
48293  */
48294 /*
48295  * Enumerated value for register field ALT_USB_HOST_HCINT15_XCS_XACT_ERR
48296  *
48297  * No Excessive Transaction Error
48298  */
48299 #define ALT_USB_HOST_HCINT15_XCS_XACT_ERR_E_INACT 0x0
48300 /*
48301  * Enumerated value for register field ALT_USB_HOST_HCINT15_XCS_XACT_ERR
48302  *
48303  * Excessive Transaction Error
48304  */
48305 #define ALT_USB_HOST_HCINT15_XCS_XACT_ERR_E_ACVTIVE 0x1
48306 
48307 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_XCS_XACT_ERR register field. */
48308 #define ALT_USB_HOST_HCINT15_XCS_XACT_ERR_LSB 12
48309 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_XCS_XACT_ERR register field. */
48310 #define ALT_USB_HOST_HCINT15_XCS_XACT_ERR_MSB 12
48311 /* The width in bits of the ALT_USB_HOST_HCINT15_XCS_XACT_ERR register field. */
48312 #define ALT_USB_HOST_HCINT15_XCS_XACT_ERR_WIDTH 1
48313 /* The mask used to set the ALT_USB_HOST_HCINT15_XCS_XACT_ERR register field value. */
48314 #define ALT_USB_HOST_HCINT15_XCS_XACT_ERR_SET_MSK 0x00001000
48315 /* The mask used to clear the ALT_USB_HOST_HCINT15_XCS_XACT_ERR register field value. */
48316 #define ALT_USB_HOST_HCINT15_XCS_XACT_ERR_CLR_MSK 0xffffefff
48317 /* The reset value of the ALT_USB_HOST_HCINT15_XCS_XACT_ERR register field. */
48318 #define ALT_USB_HOST_HCINT15_XCS_XACT_ERR_RESET 0x0
48319 /* Extracts the ALT_USB_HOST_HCINT15_XCS_XACT_ERR field value from a register. */
48320 #define ALT_USB_HOST_HCINT15_XCS_XACT_ERR_GET(value) (((value) & 0x00001000) >> 12)
48321 /* Produces a ALT_USB_HOST_HCINT15_XCS_XACT_ERR register field value suitable for setting the register. */
48322 #define ALT_USB_HOST_HCINT15_XCS_XACT_ERR_SET(value) (((value) << 12) & 0x00001000)
48323 
48324 /*
48325  * Field : Descriptor rollover interrupt - desc_lst_rollintr
48326  *
48327  * Descriptor rollover interrupt (DESC_LST_ROLLIntr)This bit is valid only when
48328  * Scatter/Gather DMA mode is enabled. The core sets this bit when the
48329  * corresponding channel's descriptor list rolls over. for non Scatter/Gather DMA
48330  * mode, this bit is reserved.
48331  *
48332  * Field Enumeration Values:
48333  *
48334  * Enum | Value | Description
48335  * :-----------------------------------------------|:------|:---------------------------------
48336  * ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR_E_INACT | 0x0 | No Descriptor rollover interrupt
48337  * ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR_E_ACT | 0x1 | Descriptor rollover interrupt
48338  *
48339  * Field Access Macros:
48340  *
48341  */
48342 /*
48343  * Enumerated value for register field ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR
48344  *
48345  * No Descriptor rollover interrupt
48346  */
48347 #define ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR_E_INACT 0x0
48348 /*
48349  * Enumerated value for register field ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR
48350  *
48351  * Descriptor rollover interrupt
48352  */
48353 #define ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR_E_ACT 0x1
48354 
48355 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR register field. */
48356 #define ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR_LSB 13
48357 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR register field. */
48358 #define ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR_MSB 13
48359 /* The width in bits of the ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR register field. */
48360 #define ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR_WIDTH 1
48361 /* The mask used to set the ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR register field value. */
48362 #define ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR_SET_MSK 0x00002000
48363 /* The mask used to clear the ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR register field value. */
48364 #define ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR_CLR_MSK 0xffffdfff
48365 /* The reset value of the ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR register field. */
48366 #define ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR_RESET 0x0
48367 /* Extracts the ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR field value from a register. */
48368 #define ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR_GET(value) (((value) & 0x00002000) >> 13)
48369 /* Produces a ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR register field value suitable for setting the register. */
48370 #define ALT_USB_HOST_HCINT15_DESC_LST_ROLLINTR_SET(value) (((value) << 13) & 0x00002000)
48371 
48372 #ifndef __ASSEMBLY__
48373 /*
48374  * WARNING: The C register and register group struct declarations are provided for
48375  * convenience and illustrative purposes. They should, however, be used with
48376  * caution as the C language standard provides no guarantees about the alignment or
48377  * atomicity of device memory accesses. The recommended practice for writing
48378  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
48379  * alt_write_word() functions.
48380  *
48381  * The struct declaration for register ALT_USB_HOST_HCINT15.
48382  */
48383 struct ALT_USB_HOST_HCINT15_s
48384 {
48385  const uint32_t xfercompl : 1; /* Transfer Completed */
48386  const uint32_t chhltd : 1; /* Channel Halted */
48387  const uint32_t ahberr : 1; /* AHB Error */
48388  const uint32_t stall : 1; /* STALL Response Received Interrupt */
48389  const uint32_t nak : 1; /* NAK Response Received Interrupt */
48390  const uint32_t ack : 1; /* ACK Response Received Transmitted Interrupt */
48391  const uint32_t nyet : 1; /* NYET Response Received Interrupt */
48392  const uint32_t xacterr : 1; /* Transaction Error */
48393  const uint32_t bblerr : 1; /* Babble Error */
48394  const uint32_t frmovrun : 1; /* Frame Overrun */
48395  const uint32_t datatglerr : 1; /* Data Toggle Error */
48396  const uint32_t bnaintr : 1; /* BNA Interrupt */
48397  const uint32_t xcs_xact_err : 1; /* Excessive Transaction Error */
48398  const uint32_t desc_lst_rollintr : 1; /* Descriptor rollover interrupt */
48399  uint32_t : 18; /* *UNDEFINED* */
48400 };
48401 
48402 /* The typedef declaration for register ALT_USB_HOST_HCINT15. */
48403 typedef volatile struct ALT_USB_HOST_HCINT15_s ALT_USB_HOST_HCINT15_t;
48404 #endif /* __ASSEMBLY__ */
48405 
48406 /* The byte offset of the ALT_USB_HOST_HCINT15 register from the beginning of the component. */
48407 #define ALT_USB_HOST_HCINT15_OFST 0x2e8
48408 /* The address of the ALT_USB_HOST_HCINT15 register. */
48409 #define ALT_USB_HOST_HCINT15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINT15_OFST))
48410 
48411 /*
48412  * Register : Host Channel 15 Interrupt Mask Register - hcintmsk15
48413  *
48414  * This register reflects the mask for each channel status described in the
48415  * previous section.
48416  *
48417  * Register Layout
48418  *
48419  * Bits | Access | Reset | Description
48420  * :--------|:-------|:------|:----------------------------------
48421  * [0] | RW | 0x0 | Transfer Completed Mask
48422  * [1] | RW | 0x0 | Channel Halted Mask
48423  * [2] | RW | 0x0 | AHB Error Mask
48424  * [10:3] | ??? | 0x0 | *UNDEFINED*
48425  * [11] | RW | 0x0 | BNA Interrupt mask
48426  * [12] | ??? | 0x0 | *UNDEFINED*
48427  * [13] | RW | 0x0 | Framelist Rollover Interrupt Mask
48428  * [31:14] | ??? | 0x0 | *UNDEFINED*
48429  *
48430  */
48431 /*
48432  * Field : Transfer Completed Mask - xfercomplmsk
48433  *
48434  * Transfer complete.
48435  *
48436  * Field Enumeration Values:
48437  *
48438  * Enum | Value | Description
48439  * :---------------------------------------------|:------|:------------
48440  * ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK_E_MSK | 0x0 | Mask
48441  * ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK_E_NOMSK | 0x1 | No mask
48442  *
48443  * Field Access Macros:
48444  *
48445  */
48446 /*
48447  * Enumerated value for register field ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK
48448  *
48449  * Mask
48450  */
48451 #define ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK_E_MSK 0x0
48452 /*
48453  * Enumerated value for register field ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK
48454  *
48455  * No mask
48456  */
48457 #define ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK_E_NOMSK 0x1
48458 
48459 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK register field. */
48460 #define ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK_LSB 0
48461 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK register field. */
48462 #define ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK_MSB 0
48463 /* The width in bits of the ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK register field. */
48464 #define ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK_WIDTH 1
48465 /* The mask used to set the ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK register field value. */
48466 #define ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK_SET_MSK 0x00000001
48467 /* The mask used to clear the ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK register field value. */
48468 #define ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK_CLR_MSK 0xfffffffe
48469 /* The reset value of the ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK register field. */
48470 #define ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK_RESET 0x0
48471 /* Extracts the ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK field value from a register. */
48472 #define ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
48473 /* Produces a ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK register field value suitable for setting the register. */
48474 #define ALT_USB_HOST_HCINTMSK15_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
48475 
48476 /*
48477  * Field : Channel Halted Mask - chhltdmsk
48478  *
48479  * Channel Halted.
48480  *
48481  * Field Enumeration Values:
48482  *
48483  * Enum | Value | Description
48484  * :------------------------------------------|:------|:------------
48485  * ALT_USB_HOST_HCINTMSK15_CHHLTDMSK_E_MSK | 0x0 | Mask
48486  * ALT_USB_HOST_HCINTMSK15_CHHLTDMSK_E_NOMSK | 0x1 | No mask
48487  *
48488  * Field Access Macros:
48489  *
48490  */
48491 /*
48492  * Enumerated value for register field ALT_USB_HOST_HCINTMSK15_CHHLTDMSK
48493  *
48494  * Mask
48495  */
48496 #define ALT_USB_HOST_HCINTMSK15_CHHLTDMSK_E_MSK 0x0
48497 /*
48498  * Enumerated value for register field ALT_USB_HOST_HCINTMSK15_CHHLTDMSK
48499  *
48500  * No mask
48501  */
48502 #define ALT_USB_HOST_HCINTMSK15_CHHLTDMSK_E_NOMSK 0x1
48503 
48504 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK15_CHHLTDMSK register field. */
48505 #define ALT_USB_HOST_HCINTMSK15_CHHLTDMSK_LSB 1
48506 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK15_CHHLTDMSK register field. */
48507 #define ALT_USB_HOST_HCINTMSK15_CHHLTDMSK_MSB 1
48508 /* The width in bits of the ALT_USB_HOST_HCINTMSK15_CHHLTDMSK register field. */
48509 #define ALT_USB_HOST_HCINTMSK15_CHHLTDMSK_WIDTH 1
48510 /* The mask used to set the ALT_USB_HOST_HCINTMSK15_CHHLTDMSK register field value. */
48511 #define ALT_USB_HOST_HCINTMSK15_CHHLTDMSK_SET_MSK 0x00000002
48512 /* The mask used to clear the ALT_USB_HOST_HCINTMSK15_CHHLTDMSK register field value. */
48513 #define ALT_USB_HOST_HCINTMSK15_CHHLTDMSK_CLR_MSK 0xfffffffd
48514 /* The reset value of the ALT_USB_HOST_HCINTMSK15_CHHLTDMSK register field. */
48515 #define ALT_USB_HOST_HCINTMSK15_CHHLTDMSK_RESET 0x0
48516 /* Extracts the ALT_USB_HOST_HCINTMSK15_CHHLTDMSK field value from a register. */
48517 #define ALT_USB_HOST_HCINTMSK15_CHHLTDMSK_GET(value) (((value) & 0x00000002) >> 1)
48518 /* Produces a ALT_USB_HOST_HCINTMSK15_CHHLTDMSK register field value suitable for setting the register. */
48519 #define ALT_USB_HOST_HCINTMSK15_CHHLTDMSK_SET(value) (((value) << 1) & 0x00000002)
48520 
48521 /*
48522  * Field : AHB Error Mask - ahberrmsk
48523  *
48524  * In scatter/gather DMA mode for host, interrupts will not be generated due to
48525  * the corresponding bits set in HCINTn.
48526  *
48527  * Field Enumeration Values:
48528  *
48529  * Enum | Value | Description
48530  * :------------------------------------------|:------|:------------
48531  * ALT_USB_HOST_HCINTMSK15_AHBERRMSK_E_MSK | 0x0 | Mask
48532  * ALT_USB_HOST_HCINTMSK15_AHBERRMSK_E_NOMSK | 0x1 | No mask
48533  *
48534  * Field Access Macros:
48535  *
48536  */
48537 /*
48538  * Enumerated value for register field ALT_USB_HOST_HCINTMSK15_AHBERRMSK
48539  *
48540  * Mask
48541  */
48542 #define ALT_USB_HOST_HCINTMSK15_AHBERRMSK_E_MSK 0x0
48543 /*
48544  * Enumerated value for register field ALT_USB_HOST_HCINTMSK15_AHBERRMSK
48545  *
48546  * No mask
48547  */
48548 #define ALT_USB_HOST_HCINTMSK15_AHBERRMSK_E_NOMSK 0x1
48549 
48550 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK15_AHBERRMSK register field. */
48551 #define ALT_USB_HOST_HCINTMSK15_AHBERRMSK_LSB 2
48552 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK15_AHBERRMSK register field. */
48553 #define ALT_USB_HOST_HCINTMSK15_AHBERRMSK_MSB 2
48554 /* The width in bits of the ALT_USB_HOST_HCINTMSK15_AHBERRMSK register field. */
48555 #define ALT_USB_HOST_HCINTMSK15_AHBERRMSK_WIDTH 1
48556 /* The mask used to set the ALT_USB_HOST_HCINTMSK15_AHBERRMSK register field value. */
48557 #define ALT_USB_HOST_HCINTMSK15_AHBERRMSK_SET_MSK 0x00000004
48558 /* The mask used to clear the ALT_USB_HOST_HCINTMSK15_AHBERRMSK register field value. */
48559 #define ALT_USB_HOST_HCINTMSK15_AHBERRMSK_CLR_MSK 0xfffffffb
48560 /* The reset value of the ALT_USB_HOST_HCINTMSK15_AHBERRMSK register field. */
48561 #define ALT_USB_HOST_HCINTMSK15_AHBERRMSK_RESET 0x0
48562 /* Extracts the ALT_USB_HOST_HCINTMSK15_AHBERRMSK field value from a register. */
48563 #define ALT_USB_HOST_HCINTMSK15_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
48564 /* Produces a ALT_USB_HOST_HCINTMSK15_AHBERRMSK register field value suitable for setting the register. */
48565 #define ALT_USB_HOST_HCINTMSK15_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
48566 
48567 /*
48568  * Field : BNA Interrupt mask - bnaintrmsk
48569  *
48570  * This bit is valid only when Scatter/Gather DMA mode is enabled.
48571  *
48572  * Field Enumeration Values:
48573  *
48574  * Enum | Value | Description
48575  * :-------------------------------------------|:------|:------------
48576  * ALT_USB_HOST_HCINTMSK15_BNAINTRMSK_E_MSK | 0x0 | Mask
48577  * ALT_USB_HOST_HCINTMSK15_BNAINTRMSK_E_NOMSK | 0x1 | No mask
48578  *
48579  * Field Access Macros:
48580  *
48581  */
48582 /*
48583  * Enumerated value for register field ALT_USB_HOST_HCINTMSK15_BNAINTRMSK
48584  *
48585  * Mask
48586  */
48587 #define ALT_USB_HOST_HCINTMSK15_BNAINTRMSK_E_MSK 0x0
48588 /*
48589  * Enumerated value for register field ALT_USB_HOST_HCINTMSK15_BNAINTRMSK
48590  *
48591  * No mask
48592  */
48593 #define ALT_USB_HOST_HCINTMSK15_BNAINTRMSK_E_NOMSK 0x1
48594 
48595 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK15_BNAINTRMSK register field. */
48596 #define ALT_USB_HOST_HCINTMSK15_BNAINTRMSK_LSB 11
48597 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK15_BNAINTRMSK register field. */
48598 #define ALT_USB_HOST_HCINTMSK15_BNAINTRMSK_MSB 11
48599 /* The width in bits of the ALT_USB_HOST_HCINTMSK15_BNAINTRMSK register field. */
48600 #define ALT_USB_HOST_HCINTMSK15_BNAINTRMSK_WIDTH 1
48601 /* The mask used to set the ALT_USB_HOST_HCINTMSK15_BNAINTRMSK register field value. */
48602 #define ALT_USB_HOST_HCINTMSK15_BNAINTRMSK_SET_MSK 0x00000800
48603 /* The mask used to clear the ALT_USB_HOST_HCINTMSK15_BNAINTRMSK register field value. */
48604 #define ALT_USB_HOST_HCINTMSK15_BNAINTRMSK_CLR_MSK 0xfffff7ff
48605 /* The reset value of the ALT_USB_HOST_HCINTMSK15_BNAINTRMSK register field. */
48606 #define ALT_USB_HOST_HCINTMSK15_BNAINTRMSK_RESET 0x0
48607 /* Extracts the ALT_USB_HOST_HCINTMSK15_BNAINTRMSK field value from a register. */
48608 #define ALT_USB_HOST_HCINTMSK15_BNAINTRMSK_GET(value) (((value) & 0x00000800) >> 11)
48609 /* Produces a ALT_USB_HOST_HCINTMSK15_BNAINTRMSK register field value suitable for setting the register. */
48610 #define ALT_USB_HOST_HCINTMSK15_BNAINTRMSK_SET(value) (((value) << 11) & 0x00000800)
48611 
48612 /*
48613  * Field : Framelist Rollover Interrupt Mask - frm_lst_rollintrmsk
48614  *
48615  * This bit is valid only when Scatter/Gather DMA mode is enabled.
48616  *
48617  * Field Enumeration Values:
48618  *
48619  * Enum | Value | Description
48620  * :----------------------------------------------------|:------|:------------
48621  * ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK_E_MSK | 0x0 | Mask
48622  * ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK_E_NOMSK | 0x1 | No mask
48623  *
48624  * Field Access Macros:
48625  *
48626  */
48627 /*
48628  * Enumerated value for register field ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK
48629  *
48630  * Mask
48631  */
48632 #define ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK_E_MSK 0x0
48633 /*
48634  * Enumerated value for register field ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK
48635  *
48636  * No mask
48637  */
48638 #define ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK_E_NOMSK 0x1
48639 
48640 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK register field. */
48641 #define ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK_LSB 13
48642 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK register field. */
48643 #define ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK_MSB 13
48644 /* The width in bits of the ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK register field. */
48645 #define ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK_WIDTH 1
48646 /* The mask used to set the ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK register field value. */
48647 #define ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK_SET_MSK 0x00002000
48648 /* The mask used to clear the ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK register field value. */
48649 #define ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK_CLR_MSK 0xffffdfff
48650 /* The reset value of the ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK register field. */
48651 #define ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK_RESET 0x0
48652 /* Extracts the ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK field value from a register. */
48653 #define ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK_GET(value) (((value) & 0x00002000) >> 13)
48654 /* Produces a ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK register field value suitable for setting the register. */
48655 #define ALT_USB_HOST_HCINTMSK15_FRM_LST_ROLLINTRMSK_SET(value) (((value) << 13) & 0x00002000)
48656 
48657 #ifndef __ASSEMBLY__
48658 /*
48659  * WARNING: The C register and register group struct declarations are provided for
48660  * convenience and illustrative purposes. They should, however, be used with
48661  * caution as the C language standard provides no guarantees about the alignment or
48662  * atomicity of device memory accesses. The recommended practice for writing
48663  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
48664  * alt_write_word() functions.
48665  *
48666  * The struct declaration for register ALT_USB_HOST_HCINTMSK15.
48667  */
48668 struct ALT_USB_HOST_HCINTMSK15_s
48669 {
48670  uint32_t xfercomplmsk : 1; /* Transfer Completed Mask */
48671  uint32_t chhltdmsk : 1; /* Channel Halted Mask */
48672  uint32_t ahberrmsk : 1; /* AHB Error Mask */
48673  uint32_t : 8; /* *UNDEFINED* */
48674  uint32_t bnaintrmsk : 1; /* BNA Interrupt mask */
48675  uint32_t : 1; /* *UNDEFINED* */
48676  uint32_t frm_lst_rollintrmsk : 1; /* Framelist Rollover Interrupt Mask */
48677  uint32_t : 18; /* *UNDEFINED* */
48678 };
48679 
48680 /* The typedef declaration for register ALT_USB_HOST_HCINTMSK15. */
48681 typedef volatile struct ALT_USB_HOST_HCINTMSK15_s ALT_USB_HOST_HCINTMSK15_t;
48682 #endif /* __ASSEMBLY__ */
48683 
48684 /* The byte offset of the ALT_USB_HOST_HCINTMSK15 register from the beginning of the component. */
48685 #define ALT_USB_HOST_HCINTMSK15_OFST 0x2ec
48686 /* The address of the ALT_USB_HOST_HCINTMSK15 register. */
48687 #define ALT_USB_HOST_HCINTMSK15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCINTMSK15_OFST))
48688 
48689 /*
48690  * Register : Host Channel 15 Transfer Size Register - hctsiz15
48691  *
48692  * Register Layout
48693  *
48694  * Bits | Access | Reset | Description
48695  * :--------|:-------|:------|:--------------
48696  * [18:0] | RW | 0x0 | Transfer Size
48697  * [28:19] | RW | 0x0 | Packet Count
48698  * [30:29] | RW | 0x0 | PID
48699  * [31] | RW | 0x0 | Do Ping
48700  *
48701  */
48702 /*
48703  * Field : Transfer Size - xfersize
48704  *
48705  * for an OUT, this field is the number of data bytes the host sends during the
48706  * transfer. for an IN, this field is the buffer size that the application has
48707  * Reserved for the transfer. The application is expected to program this field as
48708  * an integer multiple of the maximum packet size for IN transactions (periodic and
48709  * non-periodic).The width of this counter is specified as 19 bits.
48710  *
48711  * Field Access Macros:
48712  *
48713  */
48714 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ15_XFERSIZE register field. */
48715 #define ALT_USB_HOST_HCTSIZ15_XFERSIZE_LSB 0
48716 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ15_XFERSIZE register field. */
48717 #define ALT_USB_HOST_HCTSIZ15_XFERSIZE_MSB 18
48718 /* The width in bits of the ALT_USB_HOST_HCTSIZ15_XFERSIZE register field. */
48719 #define ALT_USB_HOST_HCTSIZ15_XFERSIZE_WIDTH 19
48720 /* The mask used to set the ALT_USB_HOST_HCTSIZ15_XFERSIZE register field value. */
48721 #define ALT_USB_HOST_HCTSIZ15_XFERSIZE_SET_MSK 0x0007ffff
48722 /* The mask used to clear the ALT_USB_HOST_HCTSIZ15_XFERSIZE register field value. */
48723 #define ALT_USB_HOST_HCTSIZ15_XFERSIZE_CLR_MSK 0xfff80000
48724 /* The reset value of the ALT_USB_HOST_HCTSIZ15_XFERSIZE register field. */
48725 #define ALT_USB_HOST_HCTSIZ15_XFERSIZE_RESET 0x0
48726 /* Extracts the ALT_USB_HOST_HCTSIZ15_XFERSIZE field value from a register. */
48727 #define ALT_USB_HOST_HCTSIZ15_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
48728 /* Produces a ALT_USB_HOST_HCTSIZ15_XFERSIZE register field value suitable for setting the register. */
48729 #define ALT_USB_HOST_HCTSIZ15_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
48730 
48731 /*
48732  * Field : Packet Count - pktcnt
48733  *
48734  * This field is programmed by the application with the expected number of packets
48735  * to be transmitted (OUT) or received (IN). The host decrements this count on
48736  * every successful transmission or reception of an OUT/IN packet. Once this count
48737  * reaches zero, the application is interrupted to indicate normal completion. The
48738  * width of this counter is specified as 10 bits.
48739  *
48740  * Field Access Macros:
48741  *
48742  */
48743 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ15_PKTCNT register field. */
48744 #define ALT_USB_HOST_HCTSIZ15_PKTCNT_LSB 19
48745 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ15_PKTCNT register field. */
48746 #define ALT_USB_HOST_HCTSIZ15_PKTCNT_MSB 28
48747 /* The width in bits of the ALT_USB_HOST_HCTSIZ15_PKTCNT register field. */
48748 #define ALT_USB_HOST_HCTSIZ15_PKTCNT_WIDTH 10
48749 /* The mask used to set the ALT_USB_HOST_HCTSIZ15_PKTCNT register field value. */
48750 #define ALT_USB_HOST_HCTSIZ15_PKTCNT_SET_MSK 0x1ff80000
48751 /* The mask used to clear the ALT_USB_HOST_HCTSIZ15_PKTCNT register field value. */
48752 #define ALT_USB_HOST_HCTSIZ15_PKTCNT_CLR_MSK 0xe007ffff
48753 /* The reset value of the ALT_USB_HOST_HCTSIZ15_PKTCNT register field. */
48754 #define ALT_USB_HOST_HCTSIZ15_PKTCNT_RESET 0x0
48755 /* Extracts the ALT_USB_HOST_HCTSIZ15_PKTCNT field value from a register. */
48756 #define ALT_USB_HOST_HCTSIZ15_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
48757 /* Produces a ALT_USB_HOST_HCTSIZ15_PKTCNT register field value suitable for setting the register. */
48758 #define ALT_USB_HOST_HCTSIZ15_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
48759 
48760 /*
48761  * Field : PID - pid
48762  *
48763  * The application programs this field with the type of PID to use forthe initial
48764  * transaction. The host maintains this field for the rest of the transfer.
48765  *
48766  * Field Enumeration Values:
48767  *
48768  * Enum | Value | Description
48769  * :----------------------------------|:------|:------------------------------------
48770  * ALT_USB_HOST_HCTSIZ15_PID_E_DATA0 | 0x0 | DATA0
48771  * ALT_USB_HOST_HCTSIZ15_PID_E_DATA2 | 0x1 | DATA2
48772  * ALT_USB_HOST_HCTSIZ15_PID_E_DATA1 | 0x2 | DATA1
48773  * ALT_USB_HOST_HCTSIZ15_PID_E_MDATA | 0x3 | MDATA (non-control)/SETUP (control)
48774  *
48775  * Field Access Macros:
48776  *
48777  */
48778 /*
48779  * Enumerated value for register field ALT_USB_HOST_HCTSIZ15_PID
48780  *
48781  * DATA0
48782  */
48783 #define ALT_USB_HOST_HCTSIZ15_PID_E_DATA0 0x0
48784 /*
48785  * Enumerated value for register field ALT_USB_HOST_HCTSIZ15_PID
48786  *
48787  * DATA2
48788  */
48789 #define ALT_USB_HOST_HCTSIZ15_PID_E_DATA2 0x1
48790 /*
48791  * Enumerated value for register field ALT_USB_HOST_HCTSIZ15_PID
48792  *
48793  * DATA1
48794  */
48795 #define ALT_USB_HOST_HCTSIZ15_PID_E_DATA1 0x2
48796 /*
48797  * Enumerated value for register field ALT_USB_HOST_HCTSIZ15_PID
48798  *
48799  * MDATA (non-control)/SETUP (control)
48800  */
48801 #define ALT_USB_HOST_HCTSIZ15_PID_E_MDATA 0x3
48802 
48803 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ15_PID register field. */
48804 #define ALT_USB_HOST_HCTSIZ15_PID_LSB 29
48805 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ15_PID register field. */
48806 #define ALT_USB_HOST_HCTSIZ15_PID_MSB 30
48807 /* The width in bits of the ALT_USB_HOST_HCTSIZ15_PID register field. */
48808 #define ALT_USB_HOST_HCTSIZ15_PID_WIDTH 2
48809 /* The mask used to set the ALT_USB_HOST_HCTSIZ15_PID register field value. */
48810 #define ALT_USB_HOST_HCTSIZ15_PID_SET_MSK 0x60000000
48811 /* The mask used to clear the ALT_USB_HOST_HCTSIZ15_PID register field value. */
48812 #define ALT_USB_HOST_HCTSIZ15_PID_CLR_MSK 0x9fffffff
48813 /* The reset value of the ALT_USB_HOST_HCTSIZ15_PID register field. */
48814 #define ALT_USB_HOST_HCTSIZ15_PID_RESET 0x0
48815 /* Extracts the ALT_USB_HOST_HCTSIZ15_PID field value from a register. */
48816 #define ALT_USB_HOST_HCTSIZ15_PID_GET(value) (((value) & 0x60000000) >> 29)
48817 /* Produces a ALT_USB_HOST_HCTSIZ15_PID register field value suitable for setting the register. */
48818 #define ALT_USB_HOST_HCTSIZ15_PID_SET(value) (((value) << 29) & 0x60000000)
48819 
48820 /*
48821  * Field : Do Ping - dopng
48822  *
48823  * This bit is used only for OUT transfers.Setting this field to 1 directs the host
48824  * to do PING protocol. Do not Set this bit for IN transfers. If this bit is set
48825  * for IN transfers it disables the channel.
48826  *
48827  * Field Enumeration Values:
48828  *
48829  * Enum | Value | Description
48830  * :-------------------------------------|:------|:-----------------
48831  * ALT_USB_HOST_HCTSIZ15_DOPNG_E_NOPING | 0x0 | No ping protocol
48832  * ALT_USB_HOST_HCTSIZ15_DOPNG_E_PING | 0x1 | Ping protocol
48833  *
48834  * Field Access Macros:
48835  *
48836  */
48837 /*
48838  * Enumerated value for register field ALT_USB_HOST_HCTSIZ15_DOPNG
48839  *
48840  * No ping protocol
48841  */
48842 #define ALT_USB_HOST_HCTSIZ15_DOPNG_E_NOPING 0x0
48843 /*
48844  * Enumerated value for register field ALT_USB_HOST_HCTSIZ15_DOPNG
48845  *
48846  * Ping protocol
48847  */
48848 #define ALT_USB_HOST_HCTSIZ15_DOPNG_E_PING 0x1
48849 
48850 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCTSIZ15_DOPNG register field. */
48851 #define ALT_USB_HOST_HCTSIZ15_DOPNG_LSB 31
48852 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCTSIZ15_DOPNG register field. */
48853 #define ALT_USB_HOST_HCTSIZ15_DOPNG_MSB 31
48854 /* The width in bits of the ALT_USB_HOST_HCTSIZ15_DOPNG register field. */
48855 #define ALT_USB_HOST_HCTSIZ15_DOPNG_WIDTH 1
48856 /* The mask used to set the ALT_USB_HOST_HCTSIZ15_DOPNG register field value. */
48857 #define ALT_USB_HOST_HCTSIZ15_DOPNG_SET_MSK 0x80000000
48858 /* The mask used to clear the ALT_USB_HOST_HCTSIZ15_DOPNG register field value. */
48859 #define ALT_USB_HOST_HCTSIZ15_DOPNG_CLR_MSK 0x7fffffff
48860 /* The reset value of the ALT_USB_HOST_HCTSIZ15_DOPNG register field. */
48861 #define ALT_USB_HOST_HCTSIZ15_DOPNG_RESET 0x0
48862 /* Extracts the ALT_USB_HOST_HCTSIZ15_DOPNG field value from a register. */
48863 #define ALT_USB_HOST_HCTSIZ15_DOPNG_GET(value) (((value) & 0x80000000) >> 31)
48864 /* Produces a ALT_USB_HOST_HCTSIZ15_DOPNG register field value suitable for setting the register. */
48865 #define ALT_USB_HOST_HCTSIZ15_DOPNG_SET(value) (((value) << 31) & 0x80000000)
48866 
48867 #ifndef __ASSEMBLY__
48868 /*
48869  * WARNING: The C register and register group struct declarations are provided for
48870  * convenience and illustrative purposes. They should, however, be used with
48871  * caution as the C language standard provides no guarantees about the alignment or
48872  * atomicity of device memory accesses. The recommended practice for writing
48873  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
48874  * alt_write_word() functions.
48875  *
48876  * The struct declaration for register ALT_USB_HOST_HCTSIZ15.
48877  */
48878 struct ALT_USB_HOST_HCTSIZ15_s
48879 {
48880  uint32_t xfersize : 19; /* Transfer Size */
48881  uint32_t pktcnt : 10; /* Packet Count */
48882  uint32_t pid : 2; /* PID */
48883  uint32_t dopng : 1; /* Do Ping */
48884 };
48885 
48886 /* The typedef declaration for register ALT_USB_HOST_HCTSIZ15. */
48887 typedef volatile struct ALT_USB_HOST_HCTSIZ15_s ALT_USB_HOST_HCTSIZ15_t;
48888 #endif /* __ASSEMBLY__ */
48889 
48890 /* The byte offset of the ALT_USB_HOST_HCTSIZ15 register from the beginning of the component. */
48891 #define ALT_USB_HOST_HCTSIZ15_OFST 0x2f0
48892 /* The address of the ALT_USB_HOST_HCTSIZ15 register. */
48893 #define ALT_USB_HOST_HCTSIZ15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCTSIZ15_OFST))
48894 
48895 /*
48896  * Register : Host Channel 15 DMA Address Register - hcdma15
48897  *
48898  * This register is used by the OTG host in the internal DMA mode to maintain the
48899  * current buffer pointer for IN/OUT transactions. The starting DMA address must be
48900  * DWORD-aligned.
48901  *
48902  * Register Layout
48903  *
48904  * Bits | Access | Reset | Description
48905  * :-------|:-------|:------|:------------
48906  * [31:0] | RW | 0x0 | DMA Address
48907  *
48908  */
48909 /*
48910  * Field : DMA Address - hcdma15
48911  *
48912  * Non-Isochronous: This field holds the start address of the 512 bytes page. The
48913  * first descriptor in the list should be located in this address. The first
48914  * descriptor may be or may not be ready. The core starts processing the list from
48915  * the CTD value. This field holds the address of the 2*(nTD+1) bytes of locations
48916  * in which the isochronous descriptors are present where N is based on nTD as per
48917  * Table below
48918  *
48919  * [31:N] Base Address [N-1:3] Offset [2:0] 000
48920  *
48921  * HS ISOC FS ISOC
48922  *
48923  * nTD N nTD N
48924  *
48925  * 7 6 1 4
48926  *
48927  * 15 7 3 5
48928  *
48929  * 31 8 7 6
48930  *
48931  * 63 9 15 7
48932  *
48933  * 127 10 31 8
48934  *
48935  * 255 11 63 9
48936  *
48937  * [N-1:3] (Isoc):[8:3] (Non Isoc): Current Transfer Desc(CTD): Non Isochronous:
48938  * This value is in terms of number of descriptors. The values can be from 0 to 63.
48939  * 0 - 1 descriptor. 63 - 64 descriptors. This field indicates the current
48940  * descriptor processed in the list. This field is updated both by application and
48941  * the core. for example, if the application enables the channel after programming
48942  * CTD=5, then the core will start processing the 6th descriptor. The address is
48943  * obtained by adding a value of (8bytes*5=) 40(decimal) to DMAAddr. Isochronous:
48944  * CTD for isochronous is based on the current frame/microframe value. Need to be
48945  * set to zero by application.
48946  *
48947  * Field Access Macros:
48948  *
48949  */
48950 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMA15_HCDMA15 register field. */
48951 #define ALT_USB_HOST_HCDMA15_HCDMA15_LSB 0
48952 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMA15_HCDMA15 register field. */
48953 #define ALT_USB_HOST_HCDMA15_HCDMA15_MSB 31
48954 /* The width in bits of the ALT_USB_HOST_HCDMA15_HCDMA15 register field. */
48955 #define ALT_USB_HOST_HCDMA15_HCDMA15_WIDTH 32
48956 /* The mask used to set the ALT_USB_HOST_HCDMA15_HCDMA15 register field value. */
48957 #define ALT_USB_HOST_HCDMA15_HCDMA15_SET_MSK 0xffffffff
48958 /* The mask used to clear the ALT_USB_HOST_HCDMA15_HCDMA15 register field value. */
48959 #define ALT_USB_HOST_HCDMA15_HCDMA15_CLR_MSK 0x00000000
48960 /* The reset value of the ALT_USB_HOST_HCDMA15_HCDMA15 register field. */
48961 #define ALT_USB_HOST_HCDMA15_HCDMA15_RESET 0x0
48962 /* Extracts the ALT_USB_HOST_HCDMA15_HCDMA15 field value from a register. */
48963 #define ALT_USB_HOST_HCDMA15_HCDMA15_GET(value) (((value) & 0xffffffff) >> 0)
48964 /* Produces a ALT_USB_HOST_HCDMA15_HCDMA15 register field value suitable for setting the register. */
48965 #define ALT_USB_HOST_HCDMA15_HCDMA15_SET(value) (((value) << 0) & 0xffffffff)
48966 
48967 #ifndef __ASSEMBLY__
48968 /*
48969  * WARNING: The C register and register group struct declarations are provided for
48970  * convenience and illustrative purposes. They should, however, be used with
48971  * caution as the C language standard provides no guarantees about the alignment or
48972  * atomicity of device memory accesses. The recommended practice for writing
48973  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
48974  * alt_write_word() functions.
48975  *
48976  * The struct declaration for register ALT_USB_HOST_HCDMA15.
48977  */
48978 struct ALT_USB_HOST_HCDMA15_s
48979 {
48980  uint32_t hcdma15 : 32; /* DMA Address */
48981 };
48982 
48983 /* The typedef declaration for register ALT_USB_HOST_HCDMA15. */
48984 typedef volatile struct ALT_USB_HOST_HCDMA15_s ALT_USB_HOST_HCDMA15_t;
48985 #endif /* __ASSEMBLY__ */
48986 
48987 /* The byte offset of the ALT_USB_HOST_HCDMA15 register from the beginning of the component. */
48988 #define ALT_USB_HOST_HCDMA15_OFST 0x2f4
48989 /* The address of the ALT_USB_HOST_HCDMA15 register. */
48990 #define ALT_USB_HOST_HCDMA15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMA15_OFST))
48991 
48992 /*
48993  * Register : Host Channel 15 DMA Buffer Address Register - hcdmab15
48994  *
48995  * These registers are present only in case of Scatter/Gather DMA. These
48996  * registers are implemented in RAM instead of flop-based implementation. Holds
48997  * the current buffer address. This register is updated as and when the
48998  * data transfer for the corresponding end point is in progress. This
48999  * register is present only in Scatter/Gather DMA mode. Otherwise this field
49000  * is reserved.
49001  *
49002  * Register Layout
49003  *
49004  * Bits | Access | Reset | Description
49005  * :-------|:-------|:------|:-----------------------------------
49006  * [31:0] | RW | 0x0 | Host Channel 15 DMA Buffer Address
49007  *
49008  */
49009 /*
49010  * Field : Host Channel 15 DMA Buffer Address - hcdmab15
49011  *
49012  * These registers are present only in case of Scatter/Gather DMA. These
49013  * registers are implemented in RAM instead of flop-based implementation. Holds
49014  * the current buffer address. This register is updated as and when the data
49015  * transfer for the corresponding end point is in progress. This register is
49016  * present only in Scatter/Gather DMA mode. Otherwise this field is reserved.
49017  *
49018  * Field Access Macros:
49019  *
49020  */
49021 /* The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCDMAB15_HCDMAB15 register field. */
49022 #define ALT_USB_HOST_HCDMAB15_HCDMAB15_LSB 0
49023 /* The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCDMAB15_HCDMAB15 register field. */
49024 #define ALT_USB_HOST_HCDMAB15_HCDMAB15_MSB 31
49025 /* The width in bits of the ALT_USB_HOST_HCDMAB15_HCDMAB15 register field. */
49026 #define ALT_USB_HOST_HCDMAB15_HCDMAB15_WIDTH 32
49027 /* The mask used to set the ALT_USB_HOST_HCDMAB15_HCDMAB15 register field value. */
49028 #define ALT_USB_HOST_HCDMAB15_HCDMAB15_SET_MSK 0xffffffff
49029 /* The mask used to clear the ALT_USB_HOST_HCDMAB15_HCDMAB15 register field value. */
49030 #define ALT_USB_HOST_HCDMAB15_HCDMAB15_CLR_MSK 0x00000000
49031 /* The reset value of the ALT_USB_HOST_HCDMAB15_HCDMAB15 register field. */
49032 #define ALT_USB_HOST_HCDMAB15_HCDMAB15_RESET 0x0
49033 /* Extracts the ALT_USB_HOST_HCDMAB15_HCDMAB15 field value from a register. */
49034 #define ALT_USB_HOST_HCDMAB15_HCDMAB15_GET(value) (((value) & 0xffffffff) >> 0)
49035 /* Produces a ALT_USB_HOST_HCDMAB15_HCDMAB15 register field value suitable for setting the register. */
49036 #define ALT_USB_HOST_HCDMAB15_HCDMAB15_SET(value) (((value) << 0) & 0xffffffff)
49037 
49038 #ifndef __ASSEMBLY__
49039 /*
49040  * WARNING: The C register and register group struct declarations are provided for
49041  * convenience and illustrative purposes. They should, however, be used with
49042  * caution as the C language standard provides no guarantees about the alignment or
49043  * atomicity of device memory accesses. The recommended practice for writing
49044  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
49045  * alt_write_word() functions.
49046  *
49047  * The struct declaration for register ALT_USB_HOST_HCDMAB15.
49048  */
49049 struct ALT_USB_HOST_HCDMAB15_s
49050 {
49051  uint32_t hcdmab15 : 32; /* Host Channel 15 DMA Buffer Address */
49052 };
49053 
49054 /* The typedef declaration for register ALT_USB_HOST_HCDMAB15. */
49055 typedef volatile struct ALT_USB_HOST_HCDMAB15_s ALT_USB_HOST_HCDMAB15_t;
49056 #endif /* __ASSEMBLY__ */
49057 
49058 /* The byte offset of the ALT_USB_HOST_HCDMAB15 register from the beginning of the component. */
49059 #define ALT_USB_HOST_HCDMAB15_OFST 0x2f8
49060 /* The address of the ALT_USB_HOST_HCDMAB15 register. */
49061 #define ALT_USB_HOST_HCDMAB15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCDMAB15_OFST))
49062 
49063 #ifndef __ASSEMBLY__
49064 /*
49065  * WARNING: The C register and register group struct declarations are provided for
49066  * convenience and illustrative purposes. They should, however, be used with
49067  * caution as the C language standard provides no guarantees about the alignment or
49068  * atomicity of device memory accesses. The recommended practice for writing
49069  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
49070  * alt_write_word() functions.
49071  *
49072  * The struct declaration for register group ALT_USB_HOST.
49073  */
49074 struct ALT_USB_HOST_s
49075 {
49076  ALT_USB_HOST_HCFG_t hcfg; /* ALT_USB_HOST_HCFG */
49077  ALT_USB_HOST_HFIR_t hfir; /* ALT_USB_HOST_HFIR */
49078  ALT_USB_HOST_HFNUM_t hfnum; /* ALT_USB_HOST_HFNUM */
49079  volatile uint32_t _pad_0xc_0xf; /* *UNDEFINED* */
49080  ALT_USB_HOST_HPTXSTS_t hptxsts; /* ALT_USB_HOST_HPTXSTS */
49081  ALT_USB_HOST_HAINT_t haint; /* ALT_USB_HOST_HAINT */
49082  ALT_USB_HOST_HAINTMSK_t haintmsk; /* ALT_USB_HOST_HAINTMSK */
49083  ALT_USB_HOST_HFLBADDR_t hflbaddr; /* ALT_USB_HOST_HFLBADDR */
49084  volatile uint32_t _pad_0x20_0x3f[8]; /* *UNDEFINED* */
49085  ALT_USB_HOST_HPRT_t hprt; /* ALT_USB_HOST_HPRT */
49086  volatile uint32_t _pad_0x44_0xff[47]; /* *UNDEFINED* */
49087  ALT_USB_HOST_HCCHAR0_t hcchar0; /* ALT_USB_HOST_HCCHAR0 */
49088  ALT_USB_HOST_HCSPLT0_t hcsplt0; /* ALT_USB_HOST_HCSPLT0 */
49089  ALT_USB_HOST_HCINT0_t hcint0; /* ALT_USB_HOST_HCINT0 */
49090  ALT_USB_HOST_HCINTMSK0_t hcintmsk0; /* ALT_USB_HOST_HCINTMSK0 */
49091  ALT_USB_HOST_HCTSIZ0_t hctsiz0; /* ALT_USB_HOST_HCTSIZ0 */
49092  ALT_USB_HOST_HCDMA0_t hcdma0; /* ALT_USB_HOST_HCDMA0 */
49093  ALT_USB_HOST_HCDMAB0_t hcdmab0; /* ALT_USB_HOST_HCDMAB0 */
49094  volatile uint32_t _pad_0x11c_0x11f; /* *UNDEFINED* */
49095  ALT_USB_HOST_HCCHAR1_t hcchar1; /* ALT_USB_HOST_HCCHAR1 */
49096  ALT_USB_HOST_HCSPLT1_t hcsplt1; /* ALT_USB_HOST_HCSPLT1 */
49097  ALT_USB_HOST_HCINT1_t hcint1; /* ALT_USB_HOST_HCINT1 */
49098  ALT_USB_HOST_HCINTMSK1_t hcintmsk1; /* ALT_USB_HOST_HCINTMSK1 */
49099  ALT_USB_HOST_HCTSIZ1_t hctsiz1; /* ALT_USB_HOST_HCTSIZ1 */
49100  ALT_USB_HOST_HCDMA1_t hcdma1; /* ALT_USB_HOST_HCDMA1 */
49101  ALT_USB_HOST_HCDMAB1_t hcdmab1; /* ALT_USB_HOST_HCDMAB1 */
49102  volatile uint32_t _pad_0x13c_0x13f; /* *UNDEFINED* */
49103  ALT_USB_HOST_HCCHAR2_t hcchar2; /* ALT_USB_HOST_HCCHAR2 */
49104  ALT_USB_HOST_HCSPLT2_t hcsplt2; /* ALT_USB_HOST_HCSPLT2 */
49105  ALT_USB_HOST_HCINT2_t hcint2; /* ALT_USB_HOST_HCINT2 */
49106  ALT_USB_HOST_HCINTMSK2_t hcintmsk2; /* ALT_USB_HOST_HCINTMSK2 */
49107  ALT_USB_HOST_HCTSIZ2_t hctsiz2; /* ALT_USB_HOST_HCTSIZ2 */
49108  ALT_USB_HOST_HCDMA2_t hcdma2; /* ALT_USB_HOST_HCDMA2 */
49109  ALT_USB_HOST_HCDMAB2_t hcdmab2; /* ALT_USB_HOST_HCDMAB2 */
49110  volatile uint32_t _pad_0x15c_0x15f; /* *UNDEFINED* */
49111  ALT_USB_HOST_HCCHAR3_t hcchar3; /* ALT_USB_HOST_HCCHAR3 */
49112  ALT_USB_HOST_HCSPLT3_t hcsplt3; /* ALT_USB_HOST_HCSPLT3 */
49113  ALT_USB_HOST_HCINT3_t hcint3; /* ALT_USB_HOST_HCINT3 */
49114  ALT_USB_HOST_HCINTMSK3_t hcintmsk3; /* ALT_USB_HOST_HCINTMSK3 */
49115  ALT_USB_HOST_HCTSIZ3_t hctsiz3; /* ALT_USB_HOST_HCTSIZ3 */
49116  ALT_USB_HOST_HCDMA3_t hcdma3; /* ALT_USB_HOST_HCDMA3 */
49117  ALT_USB_HOST_HCDMAB3_t hcdmab3; /* ALT_USB_HOST_HCDMAB3 */
49118  volatile uint32_t _pad_0x17c_0x17f; /* *UNDEFINED* */
49119  ALT_USB_HOST_HCCHAR4_t hcchar4; /* ALT_USB_HOST_HCCHAR4 */
49120  ALT_USB_HOST_HCSPLT4_t hcsplt4; /* ALT_USB_HOST_HCSPLT4 */
49121  ALT_USB_HOST_HCINT4_t hcint4; /* ALT_USB_HOST_HCINT4 */
49122  ALT_USB_HOST_HCINTMSK4_t hcintmsk4; /* ALT_USB_HOST_HCINTMSK4 */
49123  ALT_USB_HOST_HCTSIZ4_t hctsiz4; /* ALT_USB_HOST_HCTSIZ4 */
49124  ALT_USB_HOST_HCDMA4_t hcdma4; /* ALT_USB_HOST_HCDMA4 */
49125  ALT_USB_HOST_HCDMAB4_t hcdmab4; /* ALT_USB_HOST_HCDMAB4 */
49126  volatile uint32_t _pad_0x19c_0x19f; /* *UNDEFINED* */
49127  ALT_USB_HOST_HCCHAR5_t hcchar5; /* ALT_USB_HOST_HCCHAR5 */
49128  ALT_USB_HOST_HCSPLT5_t hcsplt5; /* ALT_USB_HOST_HCSPLT5 */
49129  ALT_USB_HOST_HCINT5_t hcint5; /* ALT_USB_HOST_HCINT5 */
49130  ALT_USB_HOST_HCINTMSK5_t hcintmsk5; /* ALT_USB_HOST_HCINTMSK5 */
49131  ALT_USB_HOST_HCTSIZ5_t hctsiz5; /* ALT_USB_HOST_HCTSIZ5 */
49132  ALT_USB_HOST_HCDMA5_t hcdma5; /* ALT_USB_HOST_HCDMA5 */
49133  ALT_USB_HOST_HCDMAB5_t hcdmab5; /* ALT_USB_HOST_HCDMAB5 */
49134  volatile uint32_t _pad_0x1bc_0x1bf; /* *UNDEFINED* */
49135  ALT_USB_HOST_HCCHAR6_t hcchar6; /* ALT_USB_HOST_HCCHAR6 */
49136  ALT_USB_HOST_HCSPLT6_t hcsplt6; /* ALT_USB_HOST_HCSPLT6 */
49137  ALT_USB_HOST_HCINT6_t hcint6; /* ALT_USB_HOST_HCINT6 */
49138  ALT_USB_HOST_HCINTMSK6_t hcintmsk6; /* ALT_USB_HOST_HCINTMSK6 */
49139  ALT_USB_HOST_HCTSIZ6_t hctsiz6; /* ALT_USB_HOST_HCTSIZ6 */
49140  ALT_USB_HOST_HCDMA6_t hcdma6; /* ALT_USB_HOST_HCDMA6 */
49141  ALT_USB_HOST_HCDMAB6_t hcdmab6; /* ALT_USB_HOST_HCDMAB6 */
49142  volatile uint32_t _pad_0x1dc_0x1df; /* *UNDEFINED* */
49143  ALT_USB_HOST_HCCHAR7_t hcchar7; /* ALT_USB_HOST_HCCHAR7 */
49144  ALT_USB_HOST_HCSPLT7_t hcsplt7; /* ALT_USB_HOST_HCSPLT7 */
49145  ALT_USB_HOST_HCINT7_t hcint7; /* ALT_USB_HOST_HCINT7 */
49146  ALT_USB_HOST_HCINTMSK7_t hcintmsk7; /* ALT_USB_HOST_HCINTMSK7 */
49147  ALT_USB_HOST_HCTSIZ7_t hctsiz7; /* ALT_USB_HOST_HCTSIZ7 */
49148  ALT_USB_HOST_HCDMA7_t hcdma7; /* ALT_USB_HOST_HCDMA7 */
49149  ALT_USB_HOST_HCDMAB7_t hcdmab7; /* ALT_USB_HOST_HCDMAB7 */
49150  volatile uint32_t _pad_0x1fc_0x1ff; /* *UNDEFINED* */
49151  ALT_USB_HOST_HCCHAR8_t hcchar8; /* ALT_USB_HOST_HCCHAR8 */
49152  ALT_USB_HOST_HCSPLT8_t hcsplt8; /* ALT_USB_HOST_HCSPLT8 */
49153  ALT_USB_HOST_HCINT8_t hcint8; /* ALT_USB_HOST_HCINT8 */
49154  ALT_USB_HOST_HCINTMSK8_t hcintmsk8; /* ALT_USB_HOST_HCINTMSK8 */
49155  ALT_USB_HOST_HCTSIZ8_t hctsiz8; /* ALT_USB_HOST_HCTSIZ8 */
49156  ALT_USB_HOST_HCDMA8_t hcdma8; /* ALT_USB_HOST_HCDMA8 */
49157  ALT_USB_HOST_HCDMAB8_t hcdmab8; /* ALT_USB_HOST_HCDMAB8 */
49158  volatile uint32_t _pad_0x21c_0x21f; /* *UNDEFINED* */
49159  ALT_USB_HOST_HCCHAR9_t hcchar9; /* ALT_USB_HOST_HCCHAR9 */
49160  ALT_USB_HOST_HCSPLT9_t hcsplt9; /* ALT_USB_HOST_HCSPLT9 */
49161  ALT_USB_HOST_HCINT9_t hcint9; /* ALT_USB_HOST_HCINT9 */
49162  ALT_USB_HOST_HCINTMSK9_t hcintmsk9; /* ALT_USB_HOST_HCINTMSK9 */
49163  ALT_USB_HOST_HCTSIZ9_t hctsiz9; /* ALT_USB_HOST_HCTSIZ9 */
49164  ALT_USB_HOST_HCDMA9_t hcdma9; /* ALT_USB_HOST_HCDMA9 */
49165  ALT_USB_HOST_HCDMAB9_t hcdmab9; /* ALT_USB_HOST_HCDMAB9 */
49166  volatile uint32_t _pad_0x23c_0x23f; /* *UNDEFINED* */
49167  ALT_USB_HOST_HCCHAR10_t hcchar10; /* ALT_USB_HOST_HCCHAR10 */
49168  ALT_USB_HOST_HCSPLT10_t hcsplt10; /* ALT_USB_HOST_HCSPLT10 */
49169  ALT_USB_HOST_HCINT10_t hcint10; /* ALT_USB_HOST_HCINT10 */
49170  ALT_USB_HOST_HCINTMSK10_t hcintmsk10; /* ALT_USB_HOST_HCINTMSK10 */
49171  ALT_USB_HOST_HCTSIZ10_t hctsiz10; /* ALT_USB_HOST_HCTSIZ10 */
49172  ALT_USB_HOST_HCDMA10_t hcdma10; /* ALT_USB_HOST_HCDMA10 */
49173  ALT_USB_HOST_HCDMAB10_t hcdmab10; /* ALT_USB_HOST_HCDMAB10 */
49174  volatile uint32_t _pad_0x25c_0x25f; /* *UNDEFINED* */
49175  ALT_USB_HOST_HCCHAR11_t hcchar11; /* ALT_USB_HOST_HCCHAR11 */
49176  ALT_USB_HOST_HCSPLT11_t HCSPLT11; /* ALT_USB_HOST_HCSPLT11 */
49177  ALT_USB_HOST_HCINT11_t hcint11; /* ALT_USB_HOST_HCINT11 */
49178  ALT_USB_HOST_HCINTMSK11_t hcintmsk11; /* ALT_USB_HOST_HCINTMSK11 */
49179  ALT_USB_HOST_HCTSIZ11_t hctsiz11; /* ALT_USB_HOST_HCTSIZ11 */
49180  ALT_USB_HOST_HCDMA11_t hcdma11; /* ALT_USB_HOST_HCDMA11 */
49181  ALT_USB_HOST_HCDMAB11_t hcdmab11; /* ALT_USB_HOST_HCDMAB11 */
49182  volatile uint32_t _pad_0x27c_0x27f; /* *UNDEFINED* */
49183  ALT_USB_HOST_HCCHAR12_t hcchar12; /* ALT_USB_HOST_HCCHAR12 */
49184  ALT_USB_HOST_HCSPLT12_t hcsplt12; /* ALT_USB_HOST_HCSPLT12 */
49185  ALT_USB_HOST_HCINT12_t hcint12; /* ALT_USB_HOST_HCINT12 */
49186  ALT_USB_HOST_HCINTMSK12_t hcintmsk12; /* ALT_USB_HOST_HCINTMSK12 */
49187  ALT_USB_HOST_HCTSIZ12_t hctsiz12; /* ALT_USB_HOST_HCTSIZ12 */
49188  ALT_USB_HOST_HCDMA12_t hcdma12; /* ALT_USB_HOST_HCDMA12 */
49189  ALT_USB_HOST_HCDMAB12_t hcdmab12; /* ALT_USB_HOST_HCDMAB12 */
49190  volatile uint32_t _pad_0x29c_0x29f; /* *UNDEFINED* */
49191  ALT_USB_HOST_HCCHAR13_t hcchar13; /* ALT_USB_HOST_HCCHAR13 */
49192  ALT_USB_HOST_HCSPLT13_t hcsplt13; /* ALT_USB_HOST_HCSPLT13 */
49193  ALT_USB_HOST_HCINT13_t hcint13; /* ALT_USB_HOST_HCINT13 */
49194  ALT_USB_HOST_HCINTMSK13_t hcintmsk13; /* ALT_USB_HOST_HCINTMSK13 */
49195  ALT_USB_HOST_HCTSIZ13_t hctsiz13; /* ALT_USB_HOST_HCTSIZ13 */
49196  ALT_USB_HOST_HCDMA13_t hcdma13; /* ALT_USB_HOST_HCDMA13 */
49197  ALT_USB_HOST_HCDMAB13_t hcdmab13; /* ALT_USB_HOST_HCDMAB13 */
49198  volatile uint32_t _pad_0x2bc_0x2bf; /* *UNDEFINED* */
49199  ALT_USB_HOST_HCCHAR14_t hcchar14; /* ALT_USB_HOST_HCCHAR14 */
49200  ALT_USB_HOST_HCSPLT14_t hcsplt14; /* ALT_USB_HOST_HCSPLT14 */
49201  ALT_USB_HOST_HCINT14_t hcint14; /* ALT_USB_HOST_HCINT14 */
49202  ALT_USB_HOST_HCINTMSK14_t hcintmsk14; /* ALT_USB_HOST_HCINTMSK14 */
49203  ALT_USB_HOST_HCTSIZ14_t hctsiz14; /* ALT_USB_HOST_HCTSIZ14 */
49204  ALT_USB_HOST_HCDMA14_t hcdma14; /* ALT_USB_HOST_HCDMA14 */
49205  ALT_USB_HOST_HCDMAB14_t hcdmab14; /* ALT_USB_HOST_HCDMAB14 */
49206  volatile uint32_t _pad_0x2dc_0x2df; /* *UNDEFINED* */
49207  ALT_USB_HOST_HCCHAR15_t hcchar15; /* ALT_USB_HOST_HCCHAR15 */
49208  ALT_USB_HOST_HCSPLT15_t hcsplt15; /* ALT_USB_HOST_HCSPLT15 */
49209  ALT_USB_HOST_HCINT15_t hcint15; /* ALT_USB_HOST_HCINT15 */
49210  ALT_USB_HOST_HCINTMSK15_t hcintmsk15; /* ALT_USB_HOST_HCINTMSK15 */
49211  ALT_USB_HOST_HCTSIZ15_t hctsiz15; /* ALT_USB_HOST_HCTSIZ15 */
49212  ALT_USB_HOST_HCDMA15_t hcdma15; /* ALT_USB_HOST_HCDMA15 */
49213  ALT_USB_HOST_HCDMAB15_t hcdmab15; /* ALT_USB_HOST_HCDMAB15 */
49214 };
49215 
49216 /* The typedef declaration for register group ALT_USB_HOST. */
49217 typedef volatile struct ALT_USB_HOST_s ALT_USB_HOST_t;
49218 /* The struct declaration for the raw register contents of register group ALT_USB_HOST. */
49219 struct ALT_USB_HOST_raw_s
49220 {
49221  volatile uint32_t hcfg; /* ALT_USB_HOST_HCFG */
49222  volatile uint32_t hfir; /* ALT_USB_HOST_HFIR */
49223  volatile uint32_t hfnum; /* ALT_USB_HOST_HFNUM */
49224  uint32_t _pad_0xc_0xf; /* *UNDEFINED* */
49225  volatile uint32_t hptxsts; /* ALT_USB_HOST_HPTXSTS */
49226  volatile uint32_t haint; /* ALT_USB_HOST_HAINT */
49227  volatile uint32_t haintmsk; /* ALT_USB_HOST_HAINTMSK */
49228  volatile uint32_t hflbaddr; /* ALT_USB_HOST_HFLBADDR */
49229  uint32_t _pad_0x20_0x3f[8]; /* *UNDEFINED* */
49230  volatile uint32_t hprt; /* ALT_USB_HOST_HPRT */
49231  uint32_t _pad_0x44_0xff[47]; /* *UNDEFINED* */
49232  volatile uint32_t hcchar0; /* ALT_USB_HOST_HCCHAR0 */
49233  volatile uint32_t hcsplt0; /* ALT_USB_HOST_HCSPLT0 */
49234  volatile uint32_t hcint0; /* ALT_USB_HOST_HCINT0 */
49235  volatile uint32_t hcintmsk0; /* ALT_USB_HOST_HCINTMSK0 */
49236  volatile uint32_t hctsiz0; /* ALT_USB_HOST_HCTSIZ0 */
49237  volatile uint32_t hcdma0; /* ALT_USB_HOST_HCDMA0 */
49238  volatile uint32_t hcdmab0; /* ALT_USB_HOST_HCDMAB0 */
49239  uint32_t _pad_0x11c_0x11f; /* *UNDEFINED* */
49240  volatile uint32_t hcchar1; /* ALT_USB_HOST_HCCHAR1 */
49241  volatile uint32_t hcsplt1; /* ALT_USB_HOST_HCSPLT1 */
49242  volatile uint32_t hcint1; /* ALT_USB_HOST_HCINT1 */
49243  volatile uint32_t hcintmsk1; /* ALT_USB_HOST_HCINTMSK1 */
49244  volatile uint32_t hctsiz1; /* ALT_USB_HOST_HCTSIZ1 */
49245  volatile uint32_t hcdma1; /* ALT_USB_HOST_HCDMA1 */
49246  volatile uint32_t hcdmab1; /* ALT_USB_HOST_HCDMAB1 */
49247  uint32_t _pad_0x13c_0x13f; /* *UNDEFINED* */
49248  volatile uint32_t hcchar2; /* ALT_USB_HOST_HCCHAR2 */
49249  volatile uint32_t hcsplt2; /* ALT_USB_HOST_HCSPLT2 */
49250  volatile uint32_t hcint2; /* ALT_USB_HOST_HCINT2 */
49251  volatile uint32_t hcintmsk2; /* ALT_USB_HOST_HCINTMSK2 */
49252  volatile uint32_t hctsiz2; /* ALT_USB_HOST_HCTSIZ2 */
49253  volatile uint32_t hcdma2; /* ALT_USB_HOST_HCDMA2 */
49254  volatile uint32_t hcdmab2; /* ALT_USB_HOST_HCDMAB2 */
49255  uint32_t _pad_0x15c_0x15f; /* *UNDEFINED* */
49256  volatile uint32_t hcchar3; /* ALT_USB_HOST_HCCHAR3 */
49257  volatile uint32_t hcsplt3; /* ALT_USB_HOST_HCSPLT3 */
49258  volatile uint32_t hcint3; /* ALT_USB_HOST_HCINT3 */
49259  volatile uint32_t hcintmsk3; /* ALT_USB_HOST_HCINTMSK3 */
49260  volatile uint32_t hctsiz3; /* ALT_USB_HOST_HCTSIZ3 */
49261  volatile uint32_t hcdma3; /* ALT_USB_HOST_HCDMA3 */
49262  volatile uint32_t hcdmab3; /* ALT_USB_HOST_HCDMAB3 */
49263  uint32_t _pad_0x17c_0x17f; /* *UNDEFINED* */
49264  volatile uint32_t hcchar4; /* ALT_USB_HOST_HCCHAR4 */
49265  volatile uint32_t hcsplt4; /* ALT_USB_HOST_HCSPLT4 */
49266  volatile uint32_t hcint4; /* ALT_USB_HOST_HCINT4 */
49267  volatile uint32_t hcintmsk4; /* ALT_USB_HOST_HCINTMSK4 */
49268  volatile uint32_t hctsiz4; /* ALT_USB_HOST_HCTSIZ4 */
49269  volatile uint32_t hcdma4; /* ALT_USB_HOST_HCDMA4 */
49270  volatile uint32_t hcdmab4; /* ALT_USB_HOST_HCDMAB4 */
49271  uint32_t _pad_0x19c_0x19f; /* *UNDEFINED* */
49272  volatile uint32_t hcchar5; /* ALT_USB_HOST_HCCHAR5 */
49273  volatile uint32_t hcsplt5; /* ALT_USB_HOST_HCSPLT5 */
49274  volatile uint32_t hcint5; /* ALT_USB_HOST_HCINT5 */
49275  volatile uint32_t hcintmsk5; /* ALT_USB_HOST_HCINTMSK5 */
49276  volatile uint32_t hctsiz5; /* ALT_USB_HOST_HCTSIZ5 */
49277  volatile uint32_t hcdma5; /* ALT_USB_HOST_HCDMA5 */
49278  volatile uint32_t hcdmab5; /* ALT_USB_HOST_HCDMAB5 */
49279  uint32_t _pad_0x1bc_0x1bf; /* *UNDEFINED* */
49280  volatile uint32_t hcchar6; /* ALT_USB_HOST_HCCHAR6 */
49281  volatile uint32_t hcsplt6; /* ALT_USB_HOST_HCSPLT6 */
49282  volatile uint32_t hcint6; /* ALT_USB_HOST_HCINT6 */
49283  volatile uint32_t hcintmsk6; /* ALT_USB_HOST_HCINTMSK6 */
49284  volatile uint32_t hctsiz6; /* ALT_USB_HOST_HCTSIZ6 */
49285  volatile uint32_t hcdma6; /* ALT_USB_HOST_HCDMA6 */
49286  volatile uint32_t hcdmab6; /* ALT_USB_HOST_HCDMAB6 */
49287  uint32_t _pad_0x1dc_0x1df; /* *UNDEFINED* */
49288  volatile uint32_t hcchar7; /* ALT_USB_HOST_HCCHAR7 */
49289  volatile uint32_t hcsplt7; /* ALT_USB_HOST_HCSPLT7 */
49290  volatile uint32_t hcint7; /* ALT_USB_HOST_HCINT7 */
49291  volatile uint32_t hcintmsk7; /* ALT_USB_HOST_HCINTMSK7 */
49292  volatile uint32_t hctsiz7; /* ALT_USB_HOST_HCTSIZ7 */
49293  volatile uint32_t hcdma7; /* ALT_USB_HOST_HCDMA7 */
49294  volatile uint32_t hcdmab7; /* ALT_USB_HOST_HCDMAB7 */
49295  uint32_t _pad_0x1fc_0x1ff; /* *UNDEFINED* */
49296  volatile uint32_t hcchar8; /* ALT_USB_HOST_HCCHAR8 */
49297  volatile uint32_t hcsplt8; /* ALT_USB_HOST_HCSPLT8 */
49298  volatile uint32_t hcint8; /* ALT_USB_HOST_HCINT8 */
49299  volatile uint32_t hcintmsk8; /* ALT_USB_HOST_HCINTMSK8 */
49300  volatile uint32_t hctsiz8; /* ALT_USB_HOST_HCTSIZ8 */
49301  volatile uint32_t hcdma8; /* ALT_USB_HOST_HCDMA8 */
49302  volatile uint32_t hcdmab8; /* ALT_USB_HOST_HCDMAB8 */
49303  uint32_t _pad_0x21c_0x21f; /* *UNDEFINED* */
49304  volatile uint32_t hcchar9; /* ALT_USB_HOST_HCCHAR9 */
49305  volatile uint32_t hcsplt9; /* ALT_USB_HOST_HCSPLT9 */
49306  volatile uint32_t hcint9; /* ALT_USB_HOST_HCINT9 */
49307  volatile uint32_t hcintmsk9; /* ALT_USB_HOST_HCINTMSK9 */
49308  volatile uint32_t hctsiz9; /* ALT_USB_HOST_HCTSIZ9 */
49309  volatile uint32_t hcdma9; /* ALT_USB_HOST_HCDMA9 */
49310  volatile uint32_t hcdmab9; /* ALT_USB_HOST_HCDMAB9 */
49311  uint32_t _pad_0x23c_0x23f; /* *UNDEFINED* */
49312  volatile uint32_t hcchar10; /* ALT_USB_HOST_HCCHAR10 */
49313  volatile uint32_t hcsplt10; /* ALT_USB_HOST_HCSPLT10 */
49314  volatile uint32_t hcint10; /* ALT_USB_HOST_HCINT10 */
49315  volatile uint32_t hcintmsk10; /* ALT_USB_HOST_HCINTMSK10 */
49316  volatile uint32_t hctsiz10; /* ALT_USB_HOST_HCTSIZ10 */
49317  volatile uint32_t hcdma10; /* ALT_USB_HOST_HCDMA10 */
49318  volatile uint32_t hcdmab10; /* ALT_USB_HOST_HCDMAB10 */
49319  uint32_t _pad_0x25c_0x25f; /* *UNDEFINED* */
49320  volatile uint32_t hcchar11; /* ALT_USB_HOST_HCCHAR11 */
49321  volatile uint32_t HCSPLT11; /* ALT_USB_HOST_HCSPLT11 */
49322  volatile uint32_t hcint11; /* ALT_USB_HOST_HCINT11 */
49323  volatile uint32_t hcintmsk11; /* ALT_USB_HOST_HCINTMSK11 */
49324  volatile uint32_t hctsiz11; /* ALT_USB_HOST_HCTSIZ11 */
49325  volatile uint32_t hcdma11; /* ALT_USB_HOST_HCDMA11 */
49326  volatile uint32_t hcdmab11; /* ALT_USB_HOST_HCDMAB11 */
49327  uint32_t _pad_0x27c_0x27f; /* *UNDEFINED* */
49328  volatile uint32_t hcchar12; /* ALT_USB_HOST_HCCHAR12 */
49329  volatile uint32_t hcsplt12; /* ALT_USB_HOST_HCSPLT12 */
49330  volatile uint32_t hcint12; /* ALT_USB_HOST_HCINT12 */
49331  volatile uint32_t hcintmsk12; /* ALT_USB_HOST_HCINTMSK12 */
49332  volatile uint32_t hctsiz12; /* ALT_USB_HOST_HCTSIZ12 */
49333  volatile uint32_t hcdma12; /* ALT_USB_HOST_HCDMA12 */
49334  volatile uint32_t hcdmab12; /* ALT_USB_HOST_HCDMAB12 */
49335  uint32_t _pad_0x29c_0x29f; /* *UNDEFINED* */
49336  volatile uint32_t hcchar13; /* ALT_USB_HOST_HCCHAR13 */
49337  volatile uint32_t hcsplt13; /* ALT_USB_HOST_HCSPLT13 */
49338  volatile uint32_t hcint13; /* ALT_USB_HOST_HCINT13 */
49339  volatile uint32_t hcintmsk13; /* ALT_USB_HOST_HCINTMSK13 */
49340  volatile uint32_t hctsiz13; /* ALT_USB_HOST_HCTSIZ13 */
49341  volatile uint32_t hcdma13; /* ALT_USB_HOST_HCDMA13 */
49342  volatile uint32_t hcdmab13; /* ALT_USB_HOST_HCDMAB13 */
49343  uint32_t _pad_0x2bc_0x2bf; /* *UNDEFINED* */
49344  volatile uint32_t hcchar14; /* ALT_USB_HOST_HCCHAR14 */
49345  volatile uint32_t hcsplt14; /* ALT_USB_HOST_HCSPLT14 */
49346  volatile uint32_t hcint14; /* ALT_USB_HOST_HCINT14 */
49347  volatile uint32_t hcintmsk14; /* ALT_USB_HOST_HCINTMSK14 */
49348  volatile uint32_t hctsiz14; /* ALT_USB_HOST_HCTSIZ14 */
49349  volatile uint32_t hcdma14; /* ALT_USB_HOST_HCDMA14 */
49350  volatile uint32_t hcdmab14; /* ALT_USB_HOST_HCDMAB14 */
49351  uint32_t _pad_0x2dc_0x2df; /* *UNDEFINED* */
49352  volatile uint32_t hcchar15; /* ALT_USB_HOST_HCCHAR15 */
49353  volatile uint32_t hcsplt15; /* ALT_USB_HOST_HCSPLT15 */
49354  volatile uint32_t hcint15; /* ALT_USB_HOST_HCINT15 */
49355  volatile uint32_t hcintmsk15; /* ALT_USB_HOST_HCINTMSK15 */
49356  volatile uint32_t hctsiz15; /* ALT_USB_HOST_HCTSIZ15 */
49357  volatile uint32_t hcdma15; /* ALT_USB_HOST_HCDMA15 */
49358  volatile uint32_t hcdmab15; /* ALT_USB_HOST_HCDMAB15 */
49359 };
49360 
49361 /* The typedef declaration for the raw register contents of register group ALT_USB_HOST. */
49362 typedef volatile struct ALT_USB_HOST_raw_s ALT_USB_HOST_raw_t;
49363 #endif /* __ASSEMBLY__ */
49364 
49365 
49366 /*
49367  * Register Group : Device Mode Registers - ALT_USB_DEV
49368  * Device Mode Registers
49369  *
49370  * These registers must be programmed every time the USB OTG Controller changes to
49371  * Device mode.
49372  *
49373  */
49374 /*
49375  * Register : Device Configuration Register - dcfg
49376  *
49377  * This register configures the core in Device mode after power-on or after certain
49378  * control commands or enumeration. Do not make changes to this register after
49379  * initial programming.
49380  *
49381  * Register Layout
49382  *
49383  * Bits | Access | Reset | Description
49384  * :--------|:-------|:------|:-----------------------------------------
49385  * [1:0] | RW | 0x0 | Device Speed
49386  * [2] | RW | 0x0 | Non-Zero-Length Status OUT Handshak
49387  * [3] | RW | 0x0 | Enable 32 KHz Suspend mode
49388  * [10:4] | RW | 0x0 | Device Address
49389  * [12:11] | RW | 0x0 | Periodic Frame Interval
49390  * [13] | RW | 0x0 | Enable Device OUT NA
49391  * [22:14] | ??? | 0x0 | *UNDEFINED*
49392  * [23] | RW | 0x0 | Enable Scatter gather DMA in device mode
49393  * [25:24] | RW | 0x0 | Periodic Scheduling Interva
49394  * [31:26] | RW | 0x2 | Resume Validation Period
49395  *
49396  */
49397 /*
49398  * Field : Device Speed - devspd
49399  *
49400  * Indicates the speed at which the application requires the core to enumerate, or
49401  * the maximum speed the application can support. However, the actual bus speed is
49402  * determined only after the chirp sequence is completed, and is based on the speed
49403  * of the USB host to which the core is connected.
49404  *
49405  * Field Enumeration Values:
49406  *
49407  * Enum | Value | Description
49408  * :------------------------------------|:------|:-------------------------------------------------
49409  * ALT_USB_DEV_DCFG_DEVSPD_E_USBHS20 | 0x0 | High speed USB 2.0 PHY clock is 30 MHz or 60 MHz
49410  * ALT_USB_DEV_DCFG_DEVSPD_E_USBFS20 | 0x1 | Full speed USB 2.0 PHY clock is 30 MHz or 60 MHz
49411  * ALT_USB_DEV_DCFG_DEVSPD_E_USBLS116 | 0x2 | Low speed USB 1.1 transceiver clock is 6 MHz
49412  * ALT_USB_DEV_DCFG_DEVSPD_E_USBLS1148 | 0x3 | Full speed USB 1.1 transceiver clock is 48 MHz
49413  *
49414  * Field Access Macros:
49415  *
49416  */
49417 /*
49418  * Enumerated value for register field ALT_USB_DEV_DCFG_DEVSPD
49419  *
49420  * High speed USB 2.0 PHY clock is 30 MHz or 60 MHz
49421  */
49422 #define ALT_USB_DEV_DCFG_DEVSPD_E_USBHS20 0x0
49423 /*
49424  * Enumerated value for register field ALT_USB_DEV_DCFG_DEVSPD
49425  *
49426  * Full speed USB 2.0 PHY clock is 30 MHz or 60 MHz
49427  */
49428 #define ALT_USB_DEV_DCFG_DEVSPD_E_USBFS20 0x1
49429 /*
49430  * Enumerated value for register field ALT_USB_DEV_DCFG_DEVSPD
49431  *
49432  * Low speed USB 1.1 transceiver clock is 6 MHz
49433  */
49434 #define ALT_USB_DEV_DCFG_DEVSPD_E_USBLS116 0x2
49435 /*
49436  * Enumerated value for register field ALT_USB_DEV_DCFG_DEVSPD
49437  *
49438  * Full speed USB 1.1 transceiver clock is 48 MHz
49439  */
49440 #define ALT_USB_DEV_DCFG_DEVSPD_E_USBLS1148 0x3
49441 
49442 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_DEVSPD register field. */
49443 #define ALT_USB_DEV_DCFG_DEVSPD_LSB 0
49444 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_DEVSPD register field. */
49445 #define ALT_USB_DEV_DCFG_DEVSPD_MSB 1
49446 /* The width in bits of the ALT_USB_DEV_DCFG_DEVSPD register field. */
49447 #define ALT_USB_DEV_DCFG_DEVSPD_WIDTH 2
49448 /* The mask used to set the ALT_USB_DEV_DCFG_DEVSPD register field value. */
49449 #define ALT_USB_DEV_DCFG_DEVSPD_SET_MSK 0x00000003
49450 /* The mask used to clear the ALT_USB_DEV_DCFG_DEVSPD register field value. */
49451 #define ALT_USB_DEV_DCFG_DEVSPD_CLR_MSK 0xfffffffc
49452 /* The reset value of the ALT_USB_DEV_DCFG_DEVSPD register field. */
49453 #define ALT_USB_DEV_DCFG_DEVSPD_RESET 0x0
49454 /* Extracts the ALT_USB_DEV_DCFG_DEVSPD field value from a register. */
49455 #define ALT_USB_DEV_DCFG_DEVSPD_GET(value) (((value) & 0x00000003) >> 0)
49456 /* Produces a ALT_USB_DEV_DCFG_DEVSPD register field value suitable for setting the register. */
49457 #define ALT_USB_DEV_DCFG_DEVSPD_SET(value) (((value) << 0) & 0x00000003)
49458 
49459 /*
49460  * Field : Non-Zero-Length Status OUT Handshak - nzstsouthshk
49461  *
49462  * The application can use this field to select the handshake the core sends on
49463  * receiving a nonzero-length data packet during the OUT transaction of a control
49464  * transfer's Status stage. 1: Send a STALL handshake on a nonzero-length statusOUT
49465  * transaction and do not send the received OUT packet tothe application. 0: Send
49466  * the received OUT packet to the application (zerolengthor nonzero-length) and
49467  * send a handshake based onthe NAK and STALL bits for the endpoint in the
49468  * DeviceEndpoint Control register.
49469  *
49470  * Field Enumeration Values:
49471  *
49472  * Enum | Value | Description
49473  * :------------------------------------------|:------|:------------------------------------------------
49474  * ALT_USB_DEV_DCFG_NZSTSOUTHSHK_E_SENDOUT | 0x0 | Send the received OUT packet to the application
49475  * : | | zerolength
49476  * ALT_USB_DEV_DCFG_NZSTSOUTHSHK_E_SENDSTALL | 0x1 | Send a STALL handshake on a nonzero-length
49477  * : | | status OUT transaction and do not send the
49478  * : | | received OUT packet to the application
49479  *
49480  * Field Access Macros:
49481  *
49482  */
49483 /*
49484  * Enumerated value for register field ALT_USB_DEV_DCFG_NZSTSOUTHSHK
49485  *
49486  * Send the received OUT packet to the application zerolength
49487  */
49488 #define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_E_SENDOUT 0x0
49489 /*
49490  * Enumerated value for register field ALT_USB_DEV_DCFG_NZSTSOUTHSHK
49491  *
49492  * Send a STALL handshake on a nonzero-length status OUT transaction and do not
49493  * send the received OUT packet to the application
49494  */
49495 #define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_E_SENDSTALL 0x1
49496 
49497 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field. */
49498 #define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_LSB 2
49499 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field. */
49500 #define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_MSB 2
49501 /* The width in bits of the ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field. */
49502 #define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_WIDTH 1
49503 /* The mask used to set the ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field value. */
49504 #define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_SET_MSK 0x00000004
49505 /* The mask used to clear the ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field value. */
49506 #define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_CLR_MSK 0xfffffffb
49507 /* The reset value of the ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field. */
49508 #define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_RESET 0x0
49509 /* Extracts the ALT_USB_DEV_DCFG_NZSTSOUTHSHK field value from a register. */
49510 #define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_GET(value) (((value) & 0x00000004) >> 2)
49511 /* Produces a ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field value suitable for setting the register. */
49512 #define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_SET(value) (((value) << 2) & 0x00000004)
49513 
49514 /*
49515  * Field : Enable 32 KHz Suspend mode - ena32khzsusp
49516  *
49517  * When the USB 1.1 Full-Speed Serial Transceiver Interface is chosen and this bit
49518  * is set, the core expects the 48-MHz PHY clock to be switched to 32 KHz during a
49519  * suspend. This bit can only be set if USB 1.1 Full-Speed Serial Transceiver
49520  * Interface has been selected. If USB 1.1 Full-Speed Serial Transceiver Interface
49521  * has not been selected, this bit must be zero.
49522  *
49523  * Field Enumeration Values:
49524  *
49525  * Enum | Value | Description
49526  * :-------------------------------------|:------|:------------------------------------------------
49527  * ALT_USB_DEV_DCFG_ENA32KHZSUSP_E_DISD | 0x0 | USB 1.1 Full-Speed Serial Transceiver not
49528  * : | | selected
49529  * ALT_USB_DEV_DCFG_ENA32KHZSUSP_E_END | 0x1 | USB 1.1 Full-Speed Serial Transceiver Interface
49530  * : | | selected
49531  *
49532  * Field Access Macros:
49533  *
49534  */
49535 /*
49536  * Enumerated value for register field ALT_USB_DEV_DCFG_ENA32KHZSUSP
49537  *
49538  * USB 1.1 Full-Speed Serial Transceiver not selected
49539  */
49540 #define ALT_USB_DEV_DCFG_ENA32KHZSUSP_E_DISD 0x0
49541 /*
49542  * Enumerated value for register field ALT_USB_DEV_DCFG_ENA32KHZSUSP
49543  *
49544  * USB 1.1 Full-Speed Serial Transceiver Interface selected
49545  */
49546 #define ALT_USB_DEV_DCFG_ENA32KHZSUSP_E_END 0x1
49547 
49548 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_ENA32KHZSUSP register field. */
49549 #define ALT_USB_DEV_DCFG_ENA32KHZSUSP_LSB 3
49550 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_ENA32KHZSUSP register field. */
49551 #define ALT_USB_DEV_DCFG_ENA32KHZSUSP_MSB 3
49552 /* The width in bits of the ALT_USB_DEV_DCFG_ENA32KHZSUSP register field. */
49553 #define ALT_USB_DEV_DCFG_ENA32KHZSUSP_WIDTH 1
49554 /* The mask used to set the ALT_USB_DEV_DCFG_ENA32KHZSUSP register field value. */
49555 #define ALT_USB_DEV_DCFG_ENA32KHZSUSP_SET_MSK 0x00000008
49556 /* The mask used to clear the ALT_USB_DEV_DCFG_ENA32KHZSUSP register field value. */
49557 #define ALT_USB_DEV_DCFG_ENA32KHZSUSP_CLR_MSK 0xfffffff7
49558 /* The reset value of the ALT_USB_DEV_DCFG_ENA32KHZSUSP register field. */
49559 #define ALT_USB_DEV_DCFG_ENA32KHZSUSP_RESET 0x0
49560 /* Extracts the ALT_USB_DEV_DCFG_ENA32KHZSUSP field value from a register. */
49561 #define ALT_USB_DEV_DCFG_ENA32KHZSUSP_GET(value) (((value) & 0x00000008) >> 3)
49562 /* Produces a ALT_USB_DEV_DCFG_ENA32KHZSUSP register field value suitable for setting the register. */
49563 #define ALT_USB_DEV_DCFG_ENA32KHZSUSP_SET(value) (((value) << 3) & 0x00000008)
49564 
49565 /*
49566  * Field : Device Address - devaddr
49567  *
49568  * The application must program this field after every SetAddress control command.
49569  *
49570  * Field Access Macros:
49571  *
49572  */
49573 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_DEVADDR register field. */
49574 #define ALT_USB_DEV_DCFG_DEVADDR_LSB 4
49575 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_DEVADDR register field. */
49576 #define ALT_USB_DEV_DCFG_DEVADDR_MSB 10
49577 /* The width in bits of the ALT_USB_DEV_DCFG_DEVADDR register field. */
49578 #define ALT_USB_DEV_DCFG_DEVADDR_WIDTH 7
49579 /* The mask used to set the ALT_USB_DEV_DCFG_DEVADDR register field value. */
49580 #define ALT_USB_DEV_DCFG_DEVADDR_SET_MSK 0x000007f0
49581 /* The mask used to clear the ALT_USB_DEV_DCFG_DEVADDR register field value. */
49582 #define ALT_USB_DEV_DCFG_DEVADDR_CLR_MSK 0xfffff80f
49583 /* The reset value of the ALT_USB_DEV_DCFG_DEVADDR register field. */
49584 #define ALT_USB_DEV_DCFG_DEVADDR_RESET 0x0
49585 /* Extracts the ALT_USB_DEV_DCFG_DEVADDR field value from a register. */
49586 #define ALT_USB_DEV_DCFG_DEVADDR_GET(value) (((value) & 0x000007f0) >> 4)
49587 /* Produces a ALT_USB_DEV_DCFG_DEVADDR register field value suitable for setting the register. */
49588 #define ALT_USB_DEV_DCFG_DEVADDR_SET(value) (((value) << 4) & 0x000007f0)
49589 
49590 /*
49591  * Field : Periodic Frame Interval - perfrint
49592  *
49593  * Indicates the time within a (micro)frame at which the application must be
49594  * notified using the End Of Periodic Frame Interrupt. This can be used to
49595  * determine If all the isochronous traffic for that (micro)frame is complete. 0x0:
49596  * 80% of the (micro)frame interval 0x1: 85% 0x2: 90% 0x3: 95%
49597  *
49598  * Field Enumeration Values:
49599  *
49600  * Enum | Value | Description
49601  * :-----------------------------------|:------|:---------------------------------
49602  * ALT_USB_DEV_DCFG_PERFRINT_E_EOPF80 | 0x0 | 80% of the (micro)frame interval
49603  * ALT_USB_DEV_DCFG_PERFRINT_E_EOPF85 | 0x1 | 85% of the (micro)frame interval
49604  * ALT_USB_DEV_DCFG_PERFRINT_E_EOPF90 | 0x2 | 90% of the (micro)frame interval
49605  * ALT_USB_DEV_DCFG_PERFRINT_E_EOPF95 | 0x3 | 95% of the (micro)frame interval
49606  *
49607  * Field Access Macros:
49608  *
49609  */
49610 /*
49611  * Enumerated value for register field ALT_USB_DEV_DCFG_PERFRINT
49612  *
49613  * 80% of the (micro)frame interval
49614  */
49615 #define ALT_USB_DEV_DCFG_PERFRINT_E_EOPF80 0x0
49616 /*
49617  * Enumerated value for register field ALT_USB_DEV_DCFG_PERFRINT
49618  *
49619  * 85% of the (micro)frame interval
49620  */
49621 #define ALT_USB_DEV_DCFG_PERFRINT_E_EOPF85 0x1
49622 /*
49623  * Enumerated value for register field ALT_USB_DEV_DCFG_PERFRINT
49624  *
49625  * 90% of the (micro)frame interval
49626  */
49627 #define ALT_USB_DEV_DCFG_PERFRINT_E_EOPF90 0x2
49628 /*
49629  * Enumerated value for register field ALT_USB_DEV_DCFG_PERFRINT
49630  *
49631  * 95% of the (micro)frame interval
49632  */
49633 #define ALT_USB_DEV_DCFG_PERFRINT_E_EOPF95 0x3
49634 
49635 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_PERFRINT register field. */
49636 #define ALT_USB_DEV_DCFG_PERFRINT_LSB 11
49637 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_PERFRINT register field. */
49638 #define ALT_USB_DEV_DCFG_PERFRINT_MSB 12
49639 /* The width in bits of the ALT_USB_DEV_DCFG_PERFRINT register field. */
49640 #define ALT_USB_DEV_DCFG_PERFRINT_WIDTH 2
49641 /* The mask used to set the ALT_USB_DEV_DCFG_PERFRINT register field value. */
49642 #define ALT_USB_DEV_DCFG_PERFRINT_SET_MSK 0x00001800
49643 /* The mask used to clear the ALT_USB_DEV_DCFG_PERFRINT register field value. */
49644 #define ALT_USB_DEV_DCFG_PERFRINT_CLR_MSK 0xffffe7ff
49645 /* The reset value of the ALT_USB_DEV_DCFG_PERFRINT register field. */
49646 #define ALT_USB_DEV_DCFG_PERFRINT_RESET 0x0
49647 /* Extracts the ALT_USB_DEV_DCFG_PERFRINT field value from a register. */
49648 #define ALT_USB_DEV_DCFG_PERFRINT_GET(value) (((value) & 0x00001800) >> 11)
49649 /* Produces a ALT_USB_DEV_DCFG_PERFRINT register field value suitable for setting the register. */
49650 #define ALT_USB_DEV_DCFG_PERFRINT_SET(value) (((value) << 11) & 0x00001800)
49651 
49652 /*
49653  * Field : Enable Device OUT NA - endevoutnak
49654  *
49655  * This bit enables setting NAK for Bulk OUT endpoints after the transfer is
49656  * completed for Device mode Descriptor DMA It is one time programmable after reset
49657  * like any other DCFG register bits.
49658  *
49659  * Field Enumeration Values:
49660  *
49661  * Enum | Value | Description
49662  * :------------------------------------|:------|:------------------------------------------
49663  * ALT_USB_DEV_DCFG_ENDEVOUTNAK_E_DISD | 0x0 | The core does not set NAK after Bulk OUT
49664  * : | | transfer complete
49665  * ALT_USB_DEV_DCFG_ENDEVOUTNAK_E_END | 0x1 | The core sets NAK after Bulk OUT transfer
49666  * : | | complete
49667  *
49668  * Field Access Macros:
49669  *
49670  */
49671 /*
49672  * Enumerated value for register field ALT_USB_DEV_DCFG_ENDEVOUTNAK
49673  *
49674  * The core does not set NAK after Bulk OUT transfer complete
49675  */
49676 #define ALT_USB_DEV_DCFG_ENDEVOUTNAK_E_DISD 0x0
49677 /*
49678  * Enumerated value for register field ALT_USB_DEV_DCFG_ENDEVOUTNAK
49679  *
49680  * The core sets NAK after Bulk OUT transfer complete
49681  */
49682 #define ALT_USB_DEV_DCFG_ENDEVOUTNAK_E_END 0x1
49683 
49684 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_ENDEVOUTNAK register field. */
49685 #define ALT_USB_DEV_DCFG_ENDEVOUTNAK_LSB 13
49686 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_ENDEVOUTNAK register field. */
49687 #define ALT_USB_DEV_DCFG_ENDEVOUTNAK_MSB 13
49688 /* The width in bits of the ALT_USB_DEV_DCFG_ENDEVOUTNAK register field. */
49689 #define ALT_USB_DEV_DCFG_ENDEVOUTNAK_WIDTH 1
49690 /* The mask used to set the ALT_USB_DEV_DCFG_ENDEVOUTNAK register field value. */
49691 #define ALT_USB_DEV_DCFG_ENDEVOUTNAK_SET_MSK 0x00002000
49692 /* The mask used to clear the ALT_USB_DEV_DCFG_ENDEVOUTNAK register field value. */
49693 #define ALT_USB_DEV_DCFG_ENDEVOUTNAK_CLR_MSK 0xffffdfff
49694 /* The reset value of the ALT_USB_DEV_DCFG_ENDEVOUTNAK register field. */
49695 #define ALT_USB_DEV_DCFG_ENDEVOUTNAK_RESET 0x0
49696 /* Extracts the ALT_USB_DEV_DCFG_ENDEVOUTNAK field value from a register. */
49697 #define ALT_USB_DEV_DCFG_ENDEVOUTNAK_GET(value) (((value) & 0x00002000) >> 13)
49698 /* Produces a ALT_USB_DEV_DCFG_ENDEVOUTNAK register field value suitable for setting the register. */
49699 #define ALT_USB_DEV_DCFG_ENDEVOUTNAK_SET(value) (((value) << 13) & 0x00002000)
49700 
49701 /*
49702  * Field : Enable Scatter gather DMA in device mode - descdma
49703  *
49704  * When the Scatter/Gather DMA option selected during configuration of the RTL, the
49705  * application can Set this bit during initialization to enable the Scatter/Gather
49706  * DMA operation. This bit must be modified only once after a reset.The following
49707  * combinations are available for programming:
49708  *
49709  * GAHBCFG.DMAEn=0,DCFG.DescDMA=0 => Slave mode
49710  *
49711  * GAHBCFG.DMAEn=0,DCFG.DescDMA=1 => Invalid
49712  *
49713  * GAHBCFG.DMAEn=1,DCFG.DescDMA=0 => Buffered DMA
49714  *
49715  * mode GAHBCFG.DMAEn=1,DCFG.DescDMA=1 => Scatter/Gather DMA mode
49716  *
49717  * Field Enumeration Values:
49718  *
49719  * Enum | Value | Description
49720  * :--------------------------------|:------|:---------------------------
49721  * ALT_USB_DEV_DCFG_DESCDMA_E_DISD | 0x0 | Disable Scatter gather DMA
49722  * ALT_USB_DEV_DCFG_DESCDMA_E_END | 0x1 | Enable Scatter gather DMA
49723  *
49724  * Field Access Macros:
49725  *
49726  */
49727 /*
49728  * Enumerated value for register field ALT_USB_DEV_DCFG_DESCDMA
49729  *
49730  * Disable Scatter gather DMA
49731  */
49732 #define ALT_USB_DEV_DCFG_DESCDMA_E_DISD 0x0
49733 /*
49734  * Enumerated value for register field ALT_USB_DEV_DCFG_DESCDMA
49735  *
49736  * Enable Scatter gather DMA
49737  */
49738 #define ALT_USB_DEV_DCFG_DESCDMA_E_END 0x1
49739 
49740 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_DESCDMA register field. */
49741 #define ALT_USB_DEV_DCFG_DESCDMA_LSB 23
49742 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_DESCDMA register field. */
49743 #define ALT_USB_DEV_DCFG_DESCDMA_MSB 23
49744 /* The width in bits of the ALT_USB_DEV_DCFG_DESCDMA register field. */
49745 #define ALT_USB_DEV_DCFG_DESCDMA_WIDTH 1
49746 /* The mask used to set the ALT_USB_DEV_DCFG_DESCDMA register field value. */
49747 #define ALT_USB_DEV_DCFG_DESCDMA_SET_MSK 0x00800000
49748 /* The mask used to clear the ALT_USB_DEV_DCFG_DESCDMA register field value. */
49749 #define ALT_USB_DEV_DCFG_DESCDMA_CLR_MSK 0xff7fffff
49750 /* The reset value of the ALT_USB_DEV_DCFG_DESCDMA register field. */
49751 #define ALT_USB_DEV_DCFG_DESCDMA_RESET 0x0
49752 /* Extracts the ALT_USB_DEV_DCFG_DESCDMA field value from a register. */
49753 #define ALT_USB_DEV_DCFG_DESCDMA_GET(value) (((value) & 0x00800000) >> 23)
49754 /* Produces a ALT_USB_DEV_DCFG_DESCDMA register field value suitable for setting the register. */
49755 #define ALT_USB_DEV_DCFG_DESCDMA_SET(value) (((value) << 23) & 0x00800000)
49756 
49757 /*
49758  * Field : Periodic Scheduling Interva - perschintvl
49759  *
49760  * PerSchIntvl must be programmed only for Scatter/Gather DMAmode. Description:
49761  * This field specifies the amount of time the Internal DMA engine must allocate
49762  * for fetching periodic IN endpoint data. Based on the number of periodic
49763  * endpoints, this value must be specified as 25,50 or 75% of (micro)frame. When
49764  * any periodic endpoints are active, the internal DMA engine allocates the
49765  * specified amount of time in fetching periodic IN endpoint data . When no
49766  * periodic endpoints are active, Then the internal DMA engine services non-
49767  * periodic endpoints, ignoring this field. After the specified time within a
49768  * (micro)frame, the DMA switches to fetching for non-periodic endpoints. 2'b00:
49769  * 25% of (micro)frame. 2'b01: 50% of (micro)frame. 2'b10: 75% of (micro)frame.
49770  * 2'b11: Reserved.Reset: 2'b00Access: read-write
49771  *
49772  * Field Enumeration Values:
49773  *
49774  * Enum | Value | Description
49775  * :------------------------------------|:------|:--------------------
49776  * ALT_USB_DEV_DCFG_PERSCHINTVL_E_MF25 | 0x0 | 25% of (micro)frame
49777  * ALT_USB_DEV_DCFG_PERSCHINTVL_E_MF50 | 0x1 | 50% of (micro)frame
49778  * ALT_USB_DEV_DCFG_PERSCHINTVL_E_MF75 | 0x2 | 75% of (micro)frame
49779  * ALT_USB_DEV_DCFG_PERSCHINTVL_E_RSVD | 0x3 | Reserved
49780  *
49781  * Field Access Macros:
49782  *
49783  */
49784 /*
49785  * Enumerated value for register field ALT_USB_DEV_DCFG_PERSCHINTVL
49786  *
49787  * 25% of (micro)frame
49788  */
49789 #define ALT_USB_DEV_DCFG_PERSCHINTVL_E_MF25 0x0
49790 /*
49791  * Enumerated value for register field ALT_USB_DEV_DCFG_PERSCHINTVL
49792  *
49793  * 50% of (micro)frame
49794  */
49795 #define ALT_USB_DEV_DCFG_PERSCHINTVL_E_MF50 0x1
49796 /*
49797  * Enumerated value for register field ALT_USB_DEV_DCFG_PERSCHINTVL
49798  *
49799  * 75% of (micro)frame
49800  */
49801 #define ALT_USB_DEV_DCFG_PERSCHINTVL_E_MF75 0x2
49802 /*
49803  * Enumerated value for register field ALT_USB_DEV_DCFG_PERSCHINTVL
49804  *
49805  * Reserved
49806  */
49807 #define ALT_USB_DEV_DCFG_PERSCHINTVL_E_RSVD 0x3
49808 
49809 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_PERSCHINTVL register field. */
49810 #define ALT_USB_DEV_DCFG_PERSCHINTVL_LSB 24
49811 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_PERSCHINTVL register field. */
49812 #define ALT_USB_DEV_DCFG_PERSCHINTVL_MSB 25
49813 /* The width in bits of the ALT_USB_DEV_DCFG_PERSCHINTVL register field. */
49814 #define ALT_USB_DEV_DCFG_PERSCHINTVL_WIDTH 2
49815 /* The mask used to set the ALT_USB_DEV_DCFG_PERSCHINTVL register field value. */
49816 #define ALT_USB_DEV_DCFG_PERSCHINTVL_SET_MSK 0x03000000
49817 /* The mask used to clear the ALT_USB_DEV_DCFG_PERSCHINTVL register field value. */
49818 #define ALT_USB_DEV_DCFG_PERSCHINTVL_CLR_MSK 0xfcffffff
49819 /* The reset value of the ALT_USB_DEV_DCFG_PERSCHINTVL register field. */
49820 #define ALT_USB_DEV_DCFG_PERSCHINTVL_RESET 0x0
49821 /* Extracts the ALT_USB_DEV_DCFG_PERSCHINTVL field value from a register. */
49822 #define ALT_USB_DEV_DCFG_PERSCHINTVL_GET(value) (((value) & 0x03000000) >> 24)
49823 /* Produces a ALT_USB_DEV_DCFG_PERSCHINTVL register field value suitable for setting the register. */
49824 #define ALT_USB_DEV_DCFG_PERSCHINTVL_SET(value) (((value) << 24) & 0x03000000)
49825 
49826 /*
49827  * Field : Resume Validation Period - resvalid
49828  *
49829  * This field is effective only when DCFG.Ena32KHzSusp is set. It will control the
49830  * resume period when the core resumes from suspend. The core counts for ResValid
49831  * number of clock cycles to detect a valid resume when this is set
49832  *
49833  * Field Access Macros:
49834  *
49835  */
49836 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_RESVALID register field. */
49837 #define ALT_USB_DEV_DCFG_RESVALID_LSB 26
49838 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_RESVALID register field. */
49839 #define ALT_USB_DEV_DCFG_RESVALID_MSB 31
49840 /* The width in bits of the ALT_USB_DEV_DCFG_RESVALID register field. */
49841 #define ALT_USB_DEV_DCFG_RESVALID_WIDTH 6
49842 /* The mask used to set the ALT_USB_DEV_DCFG_RESVALID register field value. */
49843 #define ALT_USB_DEV_DCFG_RESVALID_SET_MSK 0xfc000000
49844 /* The mask used to clear the ALT_USB_DEV_DCFG_RESVALID register field value. */
49845 #define ALT_USB_DEV_DCFG_RESVALID_CLR_MSK 0x03ffffff
49846 /* The reset value of the ALT_USB_DEV_DCFG_RESVALID register field. */
49847 #define ALT_USB_DEV_DCFG_RESVALID_RESET 0x2
49848 /* Extracts the ALT_USB_DEV_DCFG_RESVALID field value from a register. */
49849 #define ALT_USB_DEV_DCFG_RESVALID_GET(value) (((value) & 0xfc000000) >> 26)
49850 /* Produces a ALT_USB_DEV_DCFG_RESVALID register field value suitable for setting the register. */
49851 #define ALT_USB_DEV_DCFG_RESVALID_SET(value) (((value) << 26) & 0xfc000000)
49852 
49853 #ifndef __ASSEMBLY__
49854 /*
49855  * WARNING: The C register and register group struct declarations are provided for
49856  * convenience and illustrative purposes. They should, however, be used with
49857  * caution as the C language standard provides no guarantees about the alignment or
49858  * atomicity of device memory accesses. The recommended practice for writing
49859  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
49860  * alt_write_word() functions.
49861  *
49862  * The struct declaration for register ALT_USB_DEV_DCFG.
49863  */
49864 struct ALT_USB_DEV_DCFG_s
49865 {
49866  uint32_t devspd : 2; /* Device Speed */
49867  uint32_t nzstsouthshk : 1; /* Non-Zero-Length Status OUT Handshak */
49868  uint32_t ena32khzsusp : 1; /* Enable 32 KHz Suspend mode */
49869  uint32_t devaddr : 7; /* Device Address */
49870  uint32_t perfrint : 2; /* Periodic Frame Interval */
49871  uint32_t endevoutnak : 1; /* Enable Device OUT NA */
49872  uint32_t : 9; /* *UNDEFINED* */
49873  uint32_t descdma : 1; /* Enable Scatter gather DMA in device mode */
49874  uint32_t perschintvl : 2; /* Periodic Scheduling Interva */
49875  uint32_t resvalid : 6; /* Resume Validation Period */
49876 };
49877 
49878 /* The typedef declaration for register ALT_USB_DEV_DCFG. */
49879 typedef volatile struct ALT_USB_DEV_DCFG_s ALT_USB_DEV_DCFG_t;
49880 #endif /* __ASSEMBLY__ */
49881 
49882 /* The byte offset of the ALT_USB_DEV_DCFG register from the beginning of the component. */
49883 #define ALT_USB_DEV_DCFG_OFST 0x0
49884 /* The address of the ALT_USB_DEV_DCFG register. */
49885 #define ALT_USB_DEV_DCFG_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DCFG_OFST))
49886 
49887 /*
49888  * Register : Device Control Register - dctl
49889  *
49890  * Register Layout
49891  *
49892  * Bits | Access | Reset | Description
49893  * :--------|:-------|:------|:----------------------------------------------
49894  * [0] | RW | 0x0 | Remote Wakeup Signaling
49895  * [1] | RW | 0x0 | Soft Disconnect
49896  * [2] | R | 0x0 | Global Non-periodic IN NAK Status
49897  * [3] | R | 0x0 | Global OUT NAK Status
49898  * [6:4] | RW | 0x0 | Test Control
49899  * [7] | W | 0x0 | Set Global Non-periodic IN NAK
49900  * [8] | W | 0x0 | Clear Global Non-periodic IN NAK
49901  * [9] | W | 0x0 | Set Global OUT NAK
49902  * [10] | W | 0x0 | Clear Global OUT NAK
49903  * [11] | RW | 0x0 | Power-On Programming Done
49904  * [12] | ??? | 0x0 | *UNDEFINED*
49905  * [14:13] | RW | 0x0 | Global Multi Count
49906  * [15] | RW | 0x0 | Ignore Frame number for Isochronous Endpoints
49907  * [16] | RW | 0x0 | NAK on Babble Error
49908  * [31:17] | ??? | 0x0 | *UNDEFINED*
49909  *
49910  */
49911 /*
49912  * Field : Remote Wakeup Signaling - rmtwkupsig
49913  *
49914  * When the application sets this bit, the core initiates remote signaling to wake
49915  * up the USB host. The application must Set this bit to instruct the core to exit
49916  * the Suspend state. As specified in the USB 2.0 specification, the application
49917  * must clear this bit 115 ms after setting it. Remote Wakeup Signaling
49918  * (RmtWkUpSig) When LPM is enabled, In L1 state the behavior of this bit is as
49919  * follows: When the application sets this bit, the core initiates L1 remote
49920  * signaling to wake up the USB host. The application must set this bit to instruct
49921  * the core to exit the Sleep state. As specified in the LPM specification, the
49922  * hardware will automatically clear this bit after a time of 50us
49923  * (TL1DevDrvResume) after set by application. Application should not set this bit
49924  * when GLPMCFG bRemoteWake from the previous LPM transaction was zero.
49925  *
49926  * Field Enumeration Values:
49927  *
49928  * Enum | Value | Description
49929  * :-------------------------------------|:------|:----------------------
49930  * ALT_USB_DEV_DCTL_RMTWKUPSIG_E_NOEXIT | 0x0 | No exit suspend state
49931  * ALT_USB_DEV_DCTL_RMTWKUPSIG_E_EXIT | 0x1 | Exit Suspend State
49932  *
49933  * Field Access Macros:
49934  *
49935  */
49936 /*
49937  * Enumerated value for register field ALT_USB_DEV_DCTL_RMTWKUPSIG
49938  *
49939  * No exit suspend state
49940  */
49941 #define ALT_USB_DEV_DCTL_RMTWKUPSIG_E_NOEXIT 0x0
49942 /*
49943  * Enumerated value for register field ALT_USB_DEV_DCTL_RMTWKUPSIG
49944  *
49945  * Exit Suspend State
49946  */
49947 #define ALT_USB_DEV_DCTL_RMTWKUPSIG_E_EXIT 0x1
49948 
49949 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_RMTWKUPSIG register field. */
49950 #define ALT_USB_DEV_DCTL_RMTWKUPSIG_LSB 0
49951 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_RMTWKUPSIG register field. */
49952 #define ALT_USB_DEV_DCTL_RMTWKUPSIG_MSB 0
49953 /* The width in bits of the ALT_USB_DEV_DCTL_RMTWKUPSIG register field. */
49954 #define ALT_USB_DEV_DCTL_RMTWKUPSIG_WIDTH 1
49955 /* The mask used to set the ALT_USB_DEV_DCTL_RMTWKUPSIG register field value. */
49956 #define ALT_USB_DEV_DCTL_RMTWKUPSIG_SET_MSK 0x00000001
49957 /* The mask used to clear the ALT_USB_DEV_DCTL_RMTWKUPSIG register field value. */
49958 #define ALT_USB_DEV_DCTL_RMTWKUPSIG_CLR_MSK 0xfffffffe
49959 /* The reset value of the ALT_USB_DEV_DCTL_RMTWKUPSIG register field. */
49960 #define ALT_USB_DEV_DCTL_RMTWKUPSIG_RESET 0x0
49961 /* Extracts the ALT_USB_DEV_DCTL_RMTWKUPSIG field value from a register. */
49962 #define ALT_USB_DEV_DCTL_RMTWKUPSIG_GET(value) (((value) & 0x00000001) >> 0)
49963 /* Produces a ALT_USB_DEV_DCTL_RMTWKUPSIG register field value suitable for setting the register. */
49964 #define ALT_USB_DEV_DCTL_RMTWKUPSIG_SET(value) (((value) << 0) & 0x00000001)
49965 
49966 /*
49967  * Field : Soft Disconnect - sftdiscon
49968  *
49969  * The application uses this bit to signal the otg core to do a soft disconnect. As
49970  * long as this bit is Set, the host does not see that the device is connected, and
49971  * the device does not receive signals on the USB. The core stays in the
49972  * disconnected state until the application clears this bit. There is a minimum
49973  * duration for which the core must keep this bit set. When this bit is cleared
49974  * after a soft disconnect, the core drives the phy_opmode_o signal on the ULPI,
49975  * which generates a device connect event to the USB host. When the device is
49976  * reconnected, the USB host restarts device enumeration.;
49977  *
49978  * Field Enumeration Values:
49979  *
49980  * Enum | Value | Description
49981  * :------------------------------------------|:------|:-----------------------------------------------
49982  * ALT_USB_DEV_DCTL_SFTDISCON_E_NODISCONNECT | 0x0 | Normal operation
49983  * ALT_USB_DEV_DCTL_SFTDISCON_E_DISCONNECT | 0x1 | The core drives the phy_opmode_o signal on the
49984  * : | | ULPI
49985  *
49986  * Field Access Macros:
49987  *
49988  */
49989 /*
49990  * Enumerated value for register field ALT_USB_DEV_DCTL_SFTDISCON
49991  *
49992  * Normal operation
49993  */
49994 #define ALT_USB_DEV_DCTL_SFTDISCON_E_NODISCONNECT 0x0
49995 /*
49996  * Enumerated value for register field ALT_USB_DEV_DCTL_SFTDISCON
49997  *
49998  * The core drives the phy_opmode_o signal on the ULPI
49999  */
50000 #define ALT_USB_DEV_DCTL_SFTDISCON_E_DISCONNECT 0x1
50001 
50002 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_SFTDISCON register field. */
50003 #define ALT_USB_DEV_DCTL_SFTDISCON_LSB 1
50004 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_SFTDISCON register field. */
50005 #define ALT_USB_DEV_DCTL_SFTDISCON_MSB 1
50006 /* The width in bits of the ALT_USB_DEV_DCTL_SFTDISCON register field. */
50007 #define ALT_USB_DEV_DCTL_SFTDISCON_WIDTH 1
50008 /* The mask used to set the ALT_USB_DEV_DCTL_SFTDISCON register field value. */
50009 #define ALT_USB_DEV_DCTL_SFTDISCON_SET_MSK 0x00000002
50010 /* The mask used to clear the ALT_USB_DEV_DCTL_SFTDISCON register field value. */
50011 #define ALT_USB_DEV_DCTL_SFTDISCON_CLR_MSK 0xfffffffd
50012 /* The reset value of the ALT_USB_DEV_DCTL_SFTDISCON register field. */
50013 #define ALT_USB_DEV_DCTL_SFTDISCON_RESET 0x0
50014 /* Extracts the ALT_USB_DEV_DCTL_SFTDISCON field value from a register. */
50015 #define ALT_USB_DEV_DCTL_SFTDISCON_GET(value) (((value) & 0x00000002) >> 1)
50016 /* Produces a ALT_USB_DEV_DCTL_SFTDISCON register field value suitable for setting the register. */
50017 #define ALT_USB_DEV_DCTL_SFTDISCON_SET(value) (((value) << 1) & 0x00000002)
50018 
50019 /*
50020  * Field : Global Non-periodic IN NAK Status - gnpinnaksts
50021  *
50022  * Defines IN NAK conditions.
50023  *
50024  * Field Enumeration Values:
50025  *
50026  * Enum | Value | Description
50027  * :-------------------------------------|:------|:------------------------------------------------
50028  * ALT_USB_DEV_DCTL_GNPINNAKSTS_E_INACT | 0x0 | A handshake is sent out based on the data
50029  * : | | availability in the transmit FIFO
50030  * ALT_USB_DEV_DCTL_GNPINNAKSTS_E_ACT | 0x1 | A NAK handshake is sent out on all non-periodic
50031  * : | | IN endpoints, irrespective of the data
50032  * : | | availability in the transmit FIFO.
50033  *
50034  * Field Access Macros:
50035  *
50036  */
50037 /*
50038  * Enumerated value for register field ALT_USB_DEV_DCTL_GNPINNAKSTS
50039  *
50040  * A handshake is sent out based on the data availability in the transmit FIFO
50041  */
50042 #define ALT_USB_DEV_DCTL_GNPINNAKSTS_E_INACT 0x0
50043 /*
50044  * Enumerated value for register field ALT_USB_DEV_DCTL_GNPINNAKSTS
50045  *
50046  * A NAK handshake is sent out on all non-periodic IN endpoints, irrespective of
50047  * the data availability in the transmit FIFO.
50048  */
50049 #define ALT_USB_DEV_DCTL_GNPINNAKSTS_E_ACT 0x1
50050 
50051 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_GNPINNAKSTS register field. */
50052 #define ALT_USB_DEV_DCTL_GNPINNAKSTS_LSB 2
50053 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_GNPINNAKSTS register field. */
50054 #define ALT_USB_DEV_DCTL_GNPINNAKSTS_MSB 2
50055 /* The width in bits of the ALT_USB_DEV_DCTL_GNPINNAKSTS register field. */
50056 #define ALT_USB_DEV_DCTL_GNPINNAKSTS_WIDTH 1
50057 /* The mask used to set the ALT_USB_DEV_DCTL_GNPINNAKSTS register field value. */
50058 #define ALT_USB_DEV_DCTL_GNPINNAKSTS_SET_MSK 0x00000004
50059 /* The mask used to clear the ALT_USB_DEV_DCTL_GNPINNAKSTS register field value. */
50060 #define ALT_USB_DEV_DCTL_GNPINNAKSTS_CLR_MSK 0xfffffffb
50061 /* The reset value of the ALT_USB_DEV_DCTL_GNPINNAKSTS register field. */
50062 #define ALT_USB_DEV_DCTL_GNPINNAKSTS_RESET 0x0
50063 /* Extracts the ALT_USB_DEV_DCTL_GNPINNAKSTS field value from a register. */
50064 #define ALT_USB_DEV_DCTL_GNPINNAKSTS_GET(value) (((value) & 0x00000004) >> 2)
50065 /* Produces a ALT_USB_DEV_DCTL_GNPINNAKSTS register field value suitable for setting the register. */
50066 #define ALT_USB_DEV_DCTL_GNPINNAKSTS_SET(value) (((value) << 2) & 0x00000004)
50067 
50068 /*
50069  * Field : Global OUT NAK Status - goutnaksts
50070  *
50071  * Reports NAK status. All isochronous OUT packets aredropped.
50072  *
50073  * Field Enumeration Values:
50074  *
50075  * Enum | Value | Description
50076  * :------------------------------------|:------|:-------------------------------------------------
50077  * ALT_USB_DEV_DCTL_GOUTNAKSTS_E_INACT | 0x0 | A handshake is sent based on the FIFO Status and
50078  * : | | the NAK and STALL bit settings.
50079  * ALT_USB_DEV_DCTL_GOUTNAKSTS_E_ACT | 0x1 | No data is written to the RxFIFO, irrespective
50080  * : | | of space availability. Sends a NAK handshake on
50081  * : | | all packets, except on SETUP transactions. All
50082  * : | | isochronous OUT packets are dropped.
50083  *
50084  * Field Access Macros:
50085  *
50086  */
50087 /*
50088  * Enumerated value for register field ALT_USB_DEV_DCTL_GOUTNAKSTS
50089  *
50090  * A handshake is sent based on the FIFO Status and the NAK and STALL bit settings.
50091  */
50092 #define ALT_USB_DEV_DCTL_GOUTNAKSTS_E_INACT 0x0
50093 /*
50094  * Enumerated value for register field ALT_USB_DEV_DCTL_GOUTNAKSTS
50095  *
50096  * No data is written to the RxFIFO, irrespective of space availability. Sends a
50097  * NAK handshake on all packets, except on SETUP transactions. All isochronous OUT
50098  * packets are dropped.
50099  */
50100 #define ALT_USB_DEV_DCTL_GOUTNAKSTS_E_ACT 0x1
50101 
50102 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_GOUTNAKSTS register field. */
50103 #define ALT_USB_DEV_DCTL_GOUTNAKSTS_LSB 3
50104 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_GOUTNAKSTS register field. */
50105 #define ALT_USB_DEV_DCTL_GOUTNAKSTS_MSB 3
50106 /* The width in bits of the ALT_USB_DEV_DCTL_GOUTNAKSTS register field. */
50107 #define ALT_USB_DEV_DCTL_GOUTNAKSTS_WIDTH 1
50108 /* The mask used to set the ALT_USB_DEV_DCTL_GOUTNAKSTS register field value. */
50109 #define ALT_USB_DEV_DCTL_GOUTNAKSTS_SET_MSK 0x00000008
50110 /* The mask used to clear the ALT_USB_DEV_DCTL_GOUTNAKSTS register field value. */
50111 #define ALT_USB_DEV_DCTL_GOUTNAKSTS_CLR_MSK 0xfffffff7
50112 /* The reset value of the ALT_USB_DEV_DCTL_GOUTNAKSTS register field. */
50113 #define ALT_USB_DEV_DCTL_GOUTNAKSTS_RESET 0x0
50114 /* Extracts the ALT_USB_DEV_DCTL_GOUTNAKSTS field value from a register. */
50115 #define ALT_USB_DEV_DCTL_GOUTNAKSTS_GET(value) (((value) & 0x00000008) >> 3)
50116 /* Produces a ALT_USB_DEV_DCTL_GOUTNAKSTS register field value suitable for setting the register. */
50117 #define ALT_USB_DEV_DCTL_GOUTNAKSTS_SET(value) (((value) << 3) & 0x00000008)
50118 
50119 /*
50120  * Field : Test Control - tstctl
50121  *
50122  * Others: Reserved.
50123  *
50124  * Field Enumeration Values:
50125  *
50126  * Enum | Value | Description
50127  * :---------------------------------|:------|:-------------------
50128  * ALT_USB_DEV_DCTL_TSTCTL_E_DISD | 0x0 | Test mode disabled
50129  * ALT_USB_DEV_DCTL_TSTCTL_E_TESTJ | 0x1 | Test_J mode
50130  * ALT_USB_DEV_DCTL_TSTCTL_E_TESTK | 0x2 | Test_K mode
50131  * ALT_USB_DEV_DCTL_TSTCTL_E_TESTSN | 0x3 | Test_SE0_NAK mode
50132  * ALT_USB_DEV_DCTL_TSTCTL_E_TESTPM | 0x4 | Test_Packet mode
50133  * ALT_USB_DEV_DCTL_TSTCTL_E_TESTFE | 0x5 | Test_force_Enable
50134  *
50135  * Field Access Macros:
50136  *
50137  */
50138 /*
50139  * Enumerated value for register field ALT_USB_DEV_DCTL_TSTCTL
50140  *
50141  * Test mode disabled
50142  */
50143 #define ALT_USB_DEV_DCTL_TSTCTL_E_DISD 0x0
50144 /*
50145  * Enumerated value for register field ALT_USB_DEV_DCTL_TSTCTL
50146  *
50147  * Test_J mode
50148  */
50149 #define ALT_USB_DEV_DCTL_TSTCTL_E_TESTJ 0x1
50150 /*
50151  * Enumerated value for register field ALT_USB_DEV_DCTL_TSTCTL
50152  *
50153  * Test_K mode
50154  */
50155 #define ALT_USB_DEV_DCTL_TSTCTL_E_TESTK 0x2
50156 /*
50157  * Enumerated value for register field ALT_USB_DEV_DCTL_TSTCTL
50158  *
50159  * Test_SE0_NAK mode
50160  */
50161 #define ALT_USB_DEV_DCTL_TSTCTL_E_TESTSN 0x3
50162 /*
50163  * Enumerated value for register field ALT_USB_DEV_DCTL_TSTCTL
50164  *
50165  * Test_Packet mode
50166  */
50167 #define ALT_USB_DEV_DCTL_TSTCTL_E_TESTPM 0x4
50168 /*
50169  * Enumerated value for register field ALT_USB_DEV_DCTL_TSTCTL
50170  *
50171  * Test_force_Enable
50172  */
50173 #define ALT_USB_DEV_DCTL_TSTCTL_E_TESTFE 0x5
50174 
50175 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_TSTCTL register field. */
50176 #define ALT_USB_DEV_DCTL_TSTCTL_LSB 4
50177 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_TSTCTL register field. */
50178 #define ALT_USB_DEV_DCTL_TSTCTL_MSB 6
50179 /* The width in bits of the ALT_USB_DEV_DCTL_TSTCTL register field. */
50180 #define ALT_USB_DEV_DCTL_TSTCTL_WIDTH 3
50181 /* The mask used to set the ALT_USB_DEV_DCTL_TSTCTL register field value. */
50182 #define ALT_USB_DEV_DCTL_TSTCTL_SET_MSK 0x00000070
50183 /* The mask used to clear the ALT_USB_DEV_DCTL_TSTCTL register field value. */
50184 #define ALT_USB_DEV_DCTL_TSTCTL_CLR_MSK 0xffffff8f
50185 /* The reset value of the ALT_USB_DEV_DCTL_TSTCTL register field. */
50186 #define ALT_USB_DEV_DCTL_TSTCTL_RESET 0x0
50187 /* Extracts the ALT_USB_DEV_DCTL_TSTCTL field value from a register. */
50188 #define ALT_USB_DEV_DCTL_TSTCTL_GET(value) (((value) & 0x00000070) >> 4)
50189 /* Produces a ALT_USB_DEV_DCTL_TSTCTL register field value suitable for setting the register. */
50190 #define ALT_USB_DEV_DCTL_TSTCTL_SET(value) (((value) << 4) & 0x00000070)
50191 
50192 /*
50193  * Field : Set Global Non-periodic IN NAK - sgnpinnak
50194  *
50195  * A write to this field sets the Global Non-periodic IN NAK. The application uses
50196  * this bit to send a NAK handshake on all nonperiodic IN endpoints. The core can
50197  * also Set this bit when a timeout condition is detected on a non-periodic
50198  * endpoint in shared FIFO operation. The application must Set this bit only after
50199  * making sure that the Global IN NAK Effective bit in the Core Interrupt Register
50200  * (GINTSTS.GINNakEff) is cleared
50201  *
50202  * Field Enumeration Values:
50203  *
50204  * Enum | Value | Description
50205  * :----------------------------------|:------|:-----------------------------------
50206  * ALT_USB_DEV_DCTL_SGNPINNAK_E_DISD | 0x0 | Disable Global Non-periodic IN NAK
50207  * ALT_USB_DEV_DCTL_SGNPINNAK_E_END | 0x1 | Global Non-periodic IN NAK
50208  *
50209  * Field Access Macros:
50210  *
50211  */
50212 /*
50213  * Enumerated value for register field ALT_USB_DEV_DCTL_SGNPINNAK
50214  *
50215  * Disable Global Non-periodic IN NAK
50216  */
50217 #define ALT_USB_DEV_DCTL_SGNPINNAK_E_DISD 0x0
50218 /*
50219  * Enumerated value for register field ALT_USB_DEV_DCTL_SGNPINNAK
50220  *
50221  * Global Non-periodic IN NAK
50222  */
50223 #define ALT_USB_DEV_DCTL_SGNPINNAK_E_END 0x1
50224 
50225 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_SGNPINNAK register field. */
50226 #define ALT_USB_DEV_DCTL_SGNPINNAK_LSB 7
50227 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_SGNPINNAK register field. */
50228 #define ALT_USB_DEV_DCTL_SGNPINNAK_MSB 7
50229 /* The width in bits of the ALT_USB_DEV_DCTL_SGNPINNAK register field. */
50230 #define ALT_USB_DEV_DCTL_SGNPINNAK_WIDTH 1
50231 /* The mask used to set the ALT_USB_DEV_DCTL_SGNPINNAK register field value. */
50232 #define ALT_USB_DEV_DCTL_SGNPINNAK_SET_MSK 0x00000080
50233 /* The mask used to clear the ALT_USB_DEV_DCTL_SGNPINNAK register field value. */
50234 #define ALT_USB_DEV_DCTL_SGNPINNAK_CLR_MSK 0xffffff7f
50235 /* The reset value of the ALT_USB_DEV_DCTL_SGNPINNAK register field. */
50236 #define ALT_USB_DEV_DCTL_SGNPINNAK_RESET 0x0
50237 /* Extracts the ALT_USB_DEV_DCTL_SGNPINNAK field value from a register. */
50238 #define ALT_USB_DEV_DCTL_SGNPINNAK_GET(value) (((value) & 0x00000080) >> 7)
50239 /* Produces a ALT_USB_DEV_DCTL_SGNPINNAK register field value suitable for setting the register. */
50240 #define ALT_USB_DEV_DCTL_SGNPINNAK_SET(value) (((value) << 7) & 0x00000080)
50241 
50242 /*
50243  * Field : Clear Global Non-periodic IN NAK - CGNPInNak
50244  *
50245  * A write to this field clears the Global Non-periodic IN NAK.
50246  *
50247  * Field Enumeration Values:
50248  *
50249  * Enum | Value | Description
50250  * :---------------------------------|:------|:-----------------------------------
50251  * ALT_USB_DEV_DCTL_CGNPINNAK_E_DIS | 0x0 | Disable Global Non-periodic IN NAK
50252  * ALT_USB_DEV_DCTL_CGNPINNAK_E_EN | 0x1 | Clear Global Non-periodic IN NAK
50253  *
50254  * Field Access Macros:
50255  *
50256  */
50257 /*
50258  * Enumerated value for register field ALT_USB_DEV_DCTL_CGNPINNAK
50259  *
50260  * Disable Global Non-periodic IN NAK
50261  */
50262 #define ALT_USB_DEV_DCTL_CGNPINNAK_E_DIS 0x0
50263 /*
50264  * Enumerated value for register field ALT_USB_DEV_DCTL_CGNPINNAK
50265  *
50266  * Clear Global Non-periodic IN NAK
50267  */
50268 #define ALT_USB_DEV_DCTL_CGNPINNAK_E_EN 0x1
50269 
50270 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_CGNPINNAK register field. */
50271 #define ALT_USB_DEV_DCTL_CGNPINNAK_LSB 8
50272 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_CGNPINNAK register field. */
50273 #define ALT_USB_DEV_DCTL_CGNPINNAK_MSB 8
50274 /* The width in bits of the ALT_USB_DEV_DCTL_CGNPINNAK register field. */
50275 #define ALT_USB_DEV_DCTL_CGNPINNAK_WIDTH 1
50276 /* The mask used to set the ALT_USB_DEV_DCTL_CGNPINNAK register field value. */
50277 #define ALT_USB_DEV_DCTL_CGNPINNAK_SET_MSK 0x00000100
50278 /* The mask used to clear the ALT_USB_DEV_DCTL_CGNPINNAK register field value. */
50279 #define ALT_USB_DEV_DCTL_CGNPINNAK_CLR_MSK 0xfffffeff
50280 /* The reset value of the ALT_USB_DEV_DCTL_CGNPINNAK register field. */
50281 #define ALT_USB_DEV_DCTL_CGNPINNAK_RESET 0x0
50282 /* Extracts the ALT_USB_DEV_DCTL_CGNPINNAK field value from a register. */
50283 #define ALT_USB_DEV_DCTL_CGNPINNAK_GET(value) (((value) & 0x00000100) >> 8)
50284 /* Produces a ALT_USB_DEV_DCTL_CGNPINNAK register field value suitable for setting the register. */
50285 #define ALT_USB_DEV_DCTL_CGNPINNAK_SET(value) (((value) << 8) & 0x00000100)
50286 
50287 /*
50288  * Field : Set Global OUT NAK - sgoutnak
50289  *
50290  * A write to this field sets the Global OUT NAK.The application uses this bit to
50291  * send a NAK handshake on all OUT endpoints. The application must Set the this bit
50292  * only after making sure that the Global OUT NAK Effective bit in the Core
50293  * Interrupt Register GINTSTS.GOUTNakEff) is cleared.
50294  *
50295  * Field Enumeration Values:
50296  *
50297  * Enum | Value | Description
50298  * :---------------------------------|:------|:-----------------------
50299  * ALT_USB_DEV_DCTL_SGOUTNAK_E_DISD | 0x0 | Disable Global OUT NAK
50300  * ALT_USB_DEV_DCTL_SGOUTNAK_E_END | 0x1 | Global OUT NAK
50301  *
50302  * Field Access Macros:
50303  *
50304  */
50305 /*
50306  * Enumerated value for register field ALT_USB_DEV_DCTL_SGOUTNAK
50307  *
50308  * Disable Global OUT NAK
50309  */
50310 #define ALT_USB_DEV_DCTL_SGOUTNAK_E_DISD 0x0
50311 /*
50312  * Enumerated value for register field ALT_USB_DEV_DCTL_SGOUTNAK
50313  *
50314  * Global OUT NAK
50315  */
50316 #define ALT_USB_DEV_DCTL_SGOUTNAK_E_END 0x1
50317 
50318 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_SGOUTNAK register field. */
50319 #define ALT_USB_DEV_DCTL_SGOUTNAK_LSB 9
50320 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_SGOUTNAK register field. */
50321 #define ALT_USB_DEV_DCTL_SGOUTNAK_MSB 9
50322 /* The width in bits of the ALT_USB_DEV_DCTL_SGOUTNAK register field. */
50323 #define ALT_USB_DEV_DCTL_SGOUTNAK_WIDTH 1
50324 /* The mask used to set the ALT_USB_DEV_DCTL_SGOUTNAK register field value. */
50325 #define ALT_USB_DEV_DCTL_SGOUTNAK_SET_MSK 0x00000200
50326 /* The mask used to clear the ALT_USB_DEV_DCTL_SGOUTNAK register field value. */
50327 #define ALT_USB_DEV_DCTL_SGOUTNAK_CLR_MSK 0xfffffdff
50328 /* The reset value of the ALT_USB_DEV_DCTL_SGOUTNAK register field. */
50329 #define ALT_USB_DEV_DCTL_SGOUTNAK_RESET 0x0
50330 /* Extracts the ALT_USB_DEV_DCTL_SGOUTNAK field value from a register. */
50331 #define ALT_USB_DEV_DCTL_SGOUTNAK_GET(value) (((value) & 0x00000200) >> 9)
50332 /* Produces a ALT_USB_DEV_DCTL_SGOUTNAK register field value suitable for setting the register. */
50333 #define ALT_USB_DEV_DCTL_SGOUTNAK_SET(value) (((value) << 9) & 0x00000200)
50334 
50335 /*
50336  * Field : Clear Global OUT NAK - cgoutnak
50337  *
50338  * A write to this field clears the Global OUT NAK.
50339  *
50340  * Field Enumeration Values:
50341  *
50342  * Enum | Value | Description
50343  * :---------------------------------|:------|:-----------------------------
50344  * ALT_USB_DEV_DCTL_CGOUTNAK_E_DISD | 0x0 | Disable Clear Global OUT NAK
50345  * ALT_USB_DEV_DCTL_CGOUTNAK_E_END | 0x1 | Clear Global OUT NAK
50346  *
50347  * Field Access Macros:
50348  *
50349  */
50350 /*
50351  * Enumerated value for register field ALT_USB_DEV_DCTL_CGOUTNAK
50352  *
50353  * Disable Clear Global OUT NAK
50354  */
50355 #define ALT_USB_DEV_DCTL_CGOUTNAK_E_DISD 0x0
50356 /*
50357  * Enumerated value for register field ALT_USB_DEV_DCTL_CGOUTNAK
50358  *
50359  * Clear Global OUT NAK
50360  */
50361 #define ALT_USB_DEV_DCTL_CGOUTNAK_E_END 0x1
50362 
50363 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_CGOUTNAK register field. */
50364 #define ALT_USB_DEV_DCTL_CGOUTNAK_LSB 10
50365 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_CGOUTNAK register field. */
50366 #define ALT_USB_DEV_DCTL_CGOUTNAK_MSB 10
50367 /* The width in bits of the ALT_USB_DEV_DCTL_CGOUTNAK register field. */
50368 #define ALT_USB_DEV_DCTL_CGOUTNAK_WIDTH 1
50369 /* The mask used to set the ALT_USB_DEV_DCTL_CGOUTNAK register field value. */
50370 #define ALT_USB_DEV_DCTL_CGOUTNAK_SET_MSK 0x00000400
50371 /* The mask used to clear the ALT_USB_DEV_DCTL_CGOUTNAK register field value. */
50372 #define ALT_USB_DEV_DCTL_CGOUTNAK_CLR_MSK 0xfffffbff
50373 /* The reset value of the ALT_USB_DEV_DCTL_CGOUTNAK register field. */
50374 #define ALT_USB_DEV_DCTL_CGOUTNAK_RESET 0x0
50375 /* Extracts the ALT_USB_DEV_DCTL_CGOUTNAK field value from a register. */
50376 #define ALT_USB_DEV_DCTL_CGOUTNAK_GET(value) (((value) & 0x00000400) >> 10)
50377 /* Produces a ALT_USB_DEV_DCTL_CGOUTNAK register field value suitable for setting the register. */
50378 #define ALT_USB_DEV_DCTL_CGOUTNAK_SET(value) (((value) << 10) & 0x00000400)
50379 
50380 /*
50381  * Field : Power-On Programming Done - pwronprgdone
50382  *
50383  * The application uses this bit to indicate that registerprogramming is completed
50384  * after a wake-up from Power Downmode.
50385  *
50386  * Field Enumeration Values:
50387  *
50388  * Enum | Value | Description
50389  * :----------------------------------------|:------|:------------------------------
50390  * ALT_USB_DEV_DCTL_PWRONPRGDONE_E_NOTDONE | 0x0 | Power-On Programming not done
50391  * ALT_USB_DEV_DCTL_PWRONPRGDONE_E_DONE | 0x1 | Power-On Programming Done
50392  *
50393  * Field Access Macros:
50394  *
50395  */
50396 /*
50397  * Enumerated value for register field ALT_USB_DEV_DCTL_PWRONPRGDONE
50398  *
50399  * Power-On Programming not done
50400  */
50401 #define ALT_USB_DEV_DCTL_PWRONPRGDONE_E_NOTDONE 0x0
50402 /*
50403  * Enumerated value for register field ALT_USB_DEV_DCTL_PWRONPRGDONE
50404  *
50405  * Power-On Programming Done
50406  */
50407 #define ALT_USB_DEV_DCTL_PWRONPRGDONE_E_DONE 0x1
50408 
50409 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_PWRONPRGDONE register field. */
50410 #define ALT_USB_DEV_DCTL_PWRONPRGDONE_LSB 11
50411 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_PWRONPRGDONE register field. */
50412 #define ALT_USB_DEV_DCTL_PWRONPRGDONE_MSB 11
50413 /* The width in bits of the ALT_USB_DEV_DCTL_PWRONPRGDONE register field. */
50414 #define ALT_USB_DEV_DCTL_PWRONPRGDONE_WIDTH 1
50415 /* The mask used to set the ALT_USB_DEV_DCTL_PWRONPRGDONE register field value. */
50416 #define ALT_USB_DEV_DCTL_PWRONPRGDONE_SET_MSK 0x00000800
50417 /* The mask used to clear the ALT_USB_DEV_DCTL_PWRONPRGDONE register field value. */
50418 #define ALT_USB_DEV_DCTL_PWRONPRGDONE_CLR_MSK 0xfffff7ff
50419 /* The reset value of the ALT_USB_DEV_DCTL_PWRONPRGDONE register field. */
50420 #define ALT_USB_DEV_DCTL_PWRONPRGDONE_RESET 0x0
50421 /* Extracts the ALT_USB_DEV_DCTL_PWRONPRGDONE field value from a register. */
50422 #define ALT_USB_DEV_DCTL_PWRONPRGDONE_GET(value) (((value) & 0x00000800) >> 11)
50423 /* Produces a ALT_USB_DEV_DCTL_PWRONPRGDONE register field value suitable for setting the register. */
50424 #define ALT_USB_DEV_DCTL_PWRONPRGDONE_SET(value) (((value) << 11) & 0x00000800)
50425 
50426 /*
50427  * Field : Global Multi Count - gmc
50428  *
50429  * GMC must be programmed only once after initialization.Applicable only for
50430  * Scatter/Gather DMA mode. This indicates the number of packets to be serviced for
50431  * that end point before moving to the next end point. It is only for non-periodic
50432  * end points. When Scatter/Gather DMA mode is disabled, this field isreserved. and
50433  * reads 0.
50434  *
50435  * Field Enumeration Values:
50436  *
50437  * Enum | Value | Description
50438  * :--------------------------------|:------|:------------
50439  * ALT_USB_DEV_DCTL_GMC_E_NOTVALID | 0x0 | Invalid
50440  * ALT_USB_DEV_DCTL_GMC_E_ONEPKT | 0x1 | 1 packet
50441  * ALT_USB_DEV_DCTL_GMC_E_TWOPKT | 0x2 | 2 packets
50442  * ALT_USB_DEV_DCTL_GMC_E_THREEPKT | 0x3 | 3 packets
50443  *
50444  * Field Access Macros:
50445  *
50446  */
50447 /*
50448  * Enumerated value for register field ALT_USB_DEV_DCTL_GMC
50449  *
50450  * Invalid
50451  */
50452 #define ALT_USB_DEV_DCTL_GMC_E_NOTVALID 0x0
50453 /*
50454  * Enumerated value for register field ALT_USB_DEV_DCTL_GMC
50455  *
50456  * 1 packet
50457  */
50458 #define ALT_USB_DEV_DCTL_GMC_E_ONEPKT 0x1
50459 /*
50460  * Enumerated value for register field ALT_USB_DEV_DCTL_GMC
50461  *
50462  * 2 packets
50463  */
50464 #define ALT_USB_DEV_DCTL_GMC_E_TWOPKT 0x2
50465 /*
50466  * Enumerated value for register field ALT_USB_DEV_DCTL_GMC
50467  *
50468  * 3 packets
50469  */
50470 #define ALT_USB_DEV_DCTL_GMC_E_THREEPKT 0x3
50471 
50472 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_GMC register field. */
50473 #define ALT_USB_DEV_DCTL_GMC_LSB 13
50474 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_GMC register field. */
50475 #define ALT_USB_DEV_DCTL_GMC_MSB 14
50476 /* The width in bits of the ALT_USB_DEV_DCTL_GMC register field. */
50477 #define ALT_USB_DEV_DCTL_GMC_WIDTH 2
50478 /* The mask used to set the ALT_USB_DEV_DCTL_GMC register field value. */
50479 #define ALT_USB_DEV_DCTL_GMC_SET_MSK 0x00006000
50480 /* The mask used to clear the ALT_USB_DEV_DCTL_GMC register field value. */
50481 #define ALT_USB_DEV_DCTL_GMC_CLR_MSK 0xffff9fff
50482 /* The reset value of the ALT_USB_DEV_DCTL_GMC register field. */
50483 #define ALT_USB_DEV_DCTL_GMC_RESET 0x0
50484 /* Extracts the ALT_USB_DEV_DCTL_GMC field value from a register. */
50485 #define ALT_USB_DEV_DCTL_GMC_GET(value) (((value) & 0x00006000) >> 13)
50486 /* Produces a ALT_USB_DEV_DCTL_GMC register field value suitable for setting the register. */
50487 #define ALT_USB_DEV_DCTL_GMC_SET(value) (((value) << 13) & 0x00006000)
50488 
50489 /*
50490  * Field : Ignore Frame number for Isochronous Endpoints - ignrfrmnum
50491  *
50492  * Do NOT program IgnrFrmNum bit to 1'b1 when the core is operating in threshold
50493  * mode. When Scatter/Gather DMA mode is enabled this feature is not applicable to
50494  * High Speed, High bandwidth transfers. When this bit is enabled, there must be
50495  * only one packet per descriptor. In Scatter/Gather DMA mode, if this bit is
50496  * enabled, the packets are not flushed when a ISOC IN token is received for an
50497  * elapsed frame. When Scatter/Gather DMA mode is disabled, this field is used by
50498  * the application to enable periodic transfer interrupt. The application can
50499  * program periodic endpoint transfers for multiple (micro)frames. 0: periodic
50500  * transfer interrupt feature is disabled, application needs to program transfers
50501  * for periodic endpoints every (micro)frame 1: periodic transfer interrupt
50502  * feature is enabled, application can program transfers for multiple (micro)frames
50503  * for periodic endpoints. In non Scatter/Gather DMA mode the application will
50504  * receive transfer complete interrupt after transfers for multiple (micro)frames
50505  * are completed.
50506  *
50507  * Field Enumeration Values:
50508  *
50509  * Enum | Value | Description
50510  * :-----------------------------------|:------|:-------------------------------------------------
50511  * ALT_USB_DEV_DCTL_IGNRFRMNUM_E_DISD | 0x0 | The core transmits the packets only in the frame
50512  * : | | number in which they are intended to be
50513  * : | | transmitted
50514  * ALT_USB_DEV_DCTL_IGNRFRMNUM_E_END | 0x1 | The core ignores the frame number, sending
50515  * : | | packets immediately as the packets are ready
50516  *
50517  * Field Access Macros:
50518  *
50519  */
50520 /*
50521  * Enumerated value for register field ALT_USB_DEV_DCTL_IGNRFRMNUM
50522  *
50523  * The core transmits the packets only in the frame number in which they are
50524  * intended to be transmitted
50525  */
50526 #define ALT_USB_DEV_DCTL_IGNRFRMNUM_E_DISD 0x0
50527 /*
50528  * Enumerated value for register field ALT_USB_DEV_DCTL_IGNRFRMNUM
50529  *
50530  * The core ignores the frame number, sending packets immediately as the packets
50531  * are ready
50532  */
50533 #define ALT_USB_DEV_DCTL_IGNRFRMNUM_E_END 0x1
50534 
50535 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_IGNRFRMNUM register field. */
50536 #define ALT_USB_DEV_DCTL_IGNRFRMNUM_LSB 15
50537 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_IGNRFRMNUM register field. */
50538 #define ALT_USB_DEV_DCTL_IGNRFRMNUM_MSB 15
50539 /* The width in bits of the ALT_USB_DEV_DCTL_IGNRFRMNUM register field. */
50540 #define ALT_USB_DEV_DCTL_IGNRFRMNUM_WIDTH 1
50541 /* The mask used to set the ALT_USB_DEV_DCTL_IGNRFRMNUM register field value. */
50542 #define ALT_USB_DEV_DCTL_IGNRFRMNUM_SET_MSK 0x00008000
50543 /* The mask used to clear the ALT_USB_DEV_DCTL_IGNRFRMNUM register field value. */
50544 #define ALT_USB_DEV_DCTL_IGNRFRMNUM_CLR_MSK 0xffff7fff
50545 /* The reset value of the ALT_USB_DEV_DCTL_IGNRFRMNUM register field. */
50546 #define ALT_USB_DEV_DCTL_IGNRFRMNUM_RESET 0x0
50547 /* Extracts the ALT_USB_DEV_DCTL_IGNRFRMNUM field value from a register. */
50548 #define ALT_USB_DEV_DCTL_IGNRFRMNUM_GET(value) (((value) & 0x00008000) >> 15)
50549 /* Produces a ALT_USB_DEV_DCTL_IGNRFRMNUM register field value suitable for setting the register. */
50550 #define ALT_USB_DEV_DCTL_IGNRFRMNUM_SET(value) (((value) << 15) & 0x00008000)
50551 
50552 /*
50553  * Field : NAK on Babble Error - nakonbble
50554  *
50555  * Set NAK automatically on babble (NakOnBble). The core sets NAK automatically for
50556  * the endpoint on which babble is received.
50557  *
50558  * Field Enumeration Values:
50559  *
50560  * Enum | Value | Description
50561  * :----------------------------------|:------|:----------------------------
50562  * ALT_USB_DEV_DCTL_NAKONBBLE_E_DISD | 0x0 | Disable NAK on Babble Error
50563  * ALT_USB_DEV_DCTL_NAKONBBLE_E_END | 0x1 | NAK on Babble Error
50564  *
50565  * Field Access Macros:
50566  *
50567  */
50568 /*
50569  * Enumerated value for register field ALT_USB_DEV_DCTL_NAKONBBLE
50570  *
50571  * Disable NAK on Babble Error
50572  */
50573 #define ALT_USB_DEV_DCTL_NAKONBBLE_E_DISD 0x0
50574 /*
50575  * Enumerated value for register field ALT_USB_DEV_DCTL_NAKONBBLE
50576  *
50577  * NAK on Babble Error
50578  */
50579 #define ALT_USB_DEV_DCTL_NAKONBBLE_E_END 0x1
50580 
50581 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_NAKONBBLE register field. */
50582 #define ALT_USB_DEV_DCTL_NAKONBBLE_LSB 16
50583 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_NAKONBBLE register field. */
50584 #define ALT_USB_DEV_DCTL_NAKONBBLE_MSB 16
50585 /* The width in bits of the ALT_USB_DEV_DCTL_NAKONBBLE register field. */
50586 #define ALT_USB_DEV_DCTL_NAKONBBLE_WIDTH 1
50587 /* The mask used to set the ALT_USB_DEV_DCTL_NAKONBBLE register field value. */
50588 #define ALT_USB_DEV_DCTL_NAKONBBLE_SET_MSK 0x00010000
50589 /* The mask used to clear the ALT_USB_DEV_DCTL_NAKONBBLE register field value. */
50590 #define ALT_USB_DEV_DCTL_NAKONBBLE_CLR_MSK 0xfffeffff
50591 /* The reset value of the ALT_USB_DEV_DCTL_NAKONBBLE register field. */
50592 #define ALT_USB_DEV_DCTL_NAKONBBLE_RESET 0x0
50593 /* Extracts the ALT_USB_DEV_DCTL_NAKONBBLE field value from a register. */
50594 #define ALT_USB_DEV_DCTL_NAKONBBLE_GET(value) (((value) & 0x00010000) >> 16)
50595 /* Produces a ALT_USB_DEV_DCTL_NAKONBBLE register field value suitable for setting the register. */
50596 #define ALT_USB_DEV_DCTL_NAKONBBLE_SET(value) (((value) << 16) & 0x00010000)
50597 
50598 #ifndef __ASSEMBLY__
50599 /*
50600  * WARNING: The C register and register group struct declarations are provided for
50601  * convenience and illustrative purposes. They should, however, be used with
50602  * caution as the C language standard provides no guarantees about the alignment or
50603  * atomicity of device memory accesses. The recommended practice for writing
50604  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
50605  * alt_write_word() functions.
50606  *
50607  * The struct declaration for register ALT_USB_DEV_DCTL.
50608  */
50609 struct ALT_USB_DEV_DCTL_s
50610 {
50611  uint32_t rmtwkupsig : 1; /* Remote Wakeup Signaling */
50612  uint32_t sftdiscon : 1; /* Soft Disconnect */
50613  const uint32_t gnpinnaksts : 1; /* Global Non-periodic IN NAK Status */
50614  const uint32_t goutnaksts : 1; /* Global OUT NAK Status */
50615  uint32_t tstctl : 3; /* Test Control */
50616  uint32_t sgnpinnak : 1; /* Set Global Non-periodic IN NAK */
50617  uint32_t CGNPInNak : 1; /* Clear Global Non-periodic IN NAK */
50618  uint32_t sgoutnak : 1; /* Set Global OUT NAK */
50619  uint32_t cgoutnak : 1; /* Clear Global OUT NAK */
50620  uint32_t pwronprgdone : 1; /* Power-On Programming Done */
50621  uint32_t : 1; /* *UNDEFINED* */
50622  uint32_t gmc : 2; /* Global Multi Count */
50623  uint32_t ignrfrmnum : 1; /* Ignore Frame number for Isochronous Endpoints */
50624  uint32_t nakonbble : 1; /* NAK on Babble Error */
50625  uint32_t : 15; /* *UNDEFINED* */
50626 };
50627 
50628 /* The typedef declaration for register ALT_USB_DEV_DCTL. */
50629 typedef volatile struct ALT_USB_DEV_DCTL_s ALT_USB_DEV_DCTL_t;
50630 #endif /* __ASSEMBLY__ */
50631 
50632 /* The byte offset of the ALT_USB_DEV_DCTL register from the beginning of the component. */
50633 #define ALT_USB_DEV_DCTL_OFST 0x4
50634 /* The address of the ALT_USB_DEV_DCTL register. */
50635 #define ALT_USB_DEV_DCTL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DCTL_OFST))
50636 
50637 /*
50638  * Register : Device Status Register - dsts
50639  *
50640  * This register indicates the status of the core with respect to USB-related
50641  * events. It must be read on interrupts from Device All Interrupts (DAINT)
50642  * register.
50643  *
50644  * Register Layout
50645  *
50646  * Bits | Access | Reset | Description
50647  * :--------|:-------|:------|:-----------------------------------------------
50648  * [0] | R | 0x0 | Suspend Status
50649  * [2:1] | R | 0x1 | Enumerated Speed
50650  * [3] | R | 0x0 | Erratic Error
50651  * [7:4] | ??? | 0x0 | *UNDEFINED*
50652  * [21:8] | R | 0x0 | Frame or Microframe Number of the Received SOF
50653  * [31:22] | ??? | 0x0 | *UNDEFINED*
50654  *
50655  */
50656 /*
50657  * Field : Suspend Status - suspsts
50658  *
50659  * In Device mode, this bit is Set as long as a Suspend condition is detected on
50660  * the USB. The core enters the Suspended state when there is no activity on the
50661  * phy_line_state_i signal for an extended period of time. The core comes out of
50662  * the suspend:
50663  *
50664  * * When there is any activity on the phy_line_state_i signal
50665  *
50666  * * When the application writes to the Remote Wakeup Signaling bit in the Device
50667  * Control register (DCTL.RmtWkUpSig).
50668  *
50669  * Field Enumeration Values:
50670  *
50671  * Enum | Value | Description
50672  * :---------------------------------|:------|:-----------------
50673  * ALT_USB_DEV_DSTS_SUSPSTS_E_INACT | 0x0 | No suspend state
50674  * ALT_USB_DEV_DSTS_SUSPSTS_E_ACT | 0x1 | Suspend state
50675  *
50676  * Field Access Macros:
50677  *
50678  */
50679 /*
50680  * Enumerated value for register field ALT_USB_DEV_DSTS_SUSPSTS
50681  *
50682  * No suspend state
50683  */
50684 #define ALT_USB_DEV_DSTS_SUSPSTS_E_INACT 0x0
50685 /*
50686  * Enumerated value for register field ALT_USB_DEV_DSTS_SUSPSTS
50687  *
50688  * Suspend state
50689  */
50690 #define ALT_USB_DEV_DSTS_SUSPSTS_E_ACT 0x1
50691 
50692 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DSTS_SUSPSTS register field. */
50693 #define ALT_USB_DEV_DSTS_SUSPSTS_LSB 0
50694 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DSTS_SUSPSTS register field. */
50695 #define ALT_USB_DEV_DSTS_SUSPSTS_MSB 0
50696 /* The width in bits of the ALT_USB_DEV_DSTS_SUSPSTS register field. */
50697 #define ALT_USB_DEV_DSTS_SUSPSTS_WIDTH 1
50698 /* The mask used to set the ALT_USB_DEV_DSTS_SUSPSTS register field value. */
50699 #define ALT_USB_DEV_DSTS_SUSPSTS_SET_MSK 0x00000001
50700 /* The mask used to clear the ALT_USB_DEV_DSTS_SUSPSTS register field value. */
50701 #define ALT_USB_DEV_DSTS_SUSPSTS_CLR_MSK 0xfffffffe
50702 /* The reset value of the ALT_USB_DEV_DSTS_SUSPSTS register field. */
50703 #define ALT_USB_DEV_DSTS_SUSPSTS_RESET 0x0
50704 /* Extracts the ALT_USB_DEV_DSTS_SUSPSTS field value from a register. */
50705 #define ALT_USB_DEV_DSTS_SUSPSTS_GET(value) (((value) & 0x00000001) >> 0)
50706 /* Produces a ALT_USB_DEV_DSTS_SUSPSTS register field value suitable for setting the register. */
50707 #define ALT_USB_DEV_DSTS_SUSPSTS_SET(value) (((value) << 0) & 0x00000001)
50708 
50709 /*
50710  * Field : Enumerated Speed - enumspd
50711  *
50712  * Indicates the speed at which the otg core has come up after speed detection
50713  * through a chirp sequence.
50714  *
50715  * Field Enumeration Values:
50716  *
50717  * Enum | Value | Description
50718  * :----------------------------------|:------|:---------------------------------------------
50719  * ALT_USB_DEV_DSTS_ENUMSPD_E_HS3060 | 0x0 | High speed (PHY clock is running at 30 or 60
50720  * : | | MHz)
50721  * ALT_USB_DEV_DSTS_ENUMSPD_E_FS3060 | 0x1 | Full speed (PHY clock is running at 30 or 60
50722  * : | | MHz)
50723  * ALT_USB_DEV_DSTS_ENUMSPD_E_LS6 | 0x2 | Low speed (PHY clock is running at 6 MHz)
50724  * ALT_USB_DEV_DSTS_ENUMSPD_E_FS48 | 0x3 | Full speed (PHY clock is running at 48 MHz)
50725  *
50726  * Field Access Macros:
50727  *
50728  */
50729 /*
50730  * Enumerated value for register field ALT_USB_DEV_DSTS_ENUMSPD
50731  *
50732  * High speed (PHY clock is running at 30 or 60 MHz)
50733  */
50734 #define ALT_USB_DEV_DSTS_ENUMSPD_E_HS3060 0x0
50735 /*
50736  * Enumerated value for register field ALT_USB_DEV_DSTS_ENUMSPD
50737  *
50738  * Full speed (PHY clock is running at 30 or 60 MHz)
50739  */
50740 #define ALT_USB_DEV_DSTS_ENUMSPD_E_FS3060 0x1
50741 /*
50742  * Enumerated value for register field ALT_USB_DEV_DSTS_ENUMSPD
50743  *
50744  * Low speed (PHY clock is running at 6 MHz)
50745  */
50746 #define ALT_USB_DEV_DSTS_ENUMSPD_E_LS6 0x2
50747 /*
50748  * Enumerated value for register field ALT_USB_DEV_DSTS_ENUMSPD
50749  *
50750  * Full speed (PHY clock is running at 48 MHz)
50751  */
50752 #define ALT_USB_DEV_DSTS_ENUMSPD_E_FS48 0x3
50753 
50754 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DSTS_ENUMSPD register field. */
50755 #define ALT_USB_DEV_DSTS_ENUMSPD_LSB 1
50756 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DSTS_ENUMSPD register field. */
50757 #define ALT_USB_DEV_DSTS_ENUMSPD_MSB 2
50758 /* The width in bits of the ALT_USB_DEV_DSTS_ENUMSPD register field. */
50759 #define ALT_USB_DEV_DSTS_ENUMSPD_WIDTH 2
50760 /* The mask used to set the ALT_USB_DEV_DSTS_ENUMSPD register field value. */
50761 #define ALT_USB_DEV_DSTS_ENUMSPD_SET_MSK 0x00000006
50762 /* The mask used to clear the ALT_USB_DEV_DSTS_ENUMSPD register field value. */
50763 #define ALT_USB_DEV_DSTS_ENUMSPD_CLR_MSK 0xfffffff9
50764 /* The reset value of the ALT_USB_DEV_DSTS_ENUMSPD register field. */
50765 #define ALT_USB_DEV_DSTS_ENUMSPD_RESET 0x1
50766 /* Extracts the ALT_USB_DEV_DSTS_ENUMSPD field value from a register. */
50767 #define ALT_USB_DEV_DSTS_ENUMSPD_GET(value) (((value) & 0x00000006) >> 1)
50768 /* Produces a ALT_USB_DEV_DSTS_ENUMSPD register field value suitable for setting the register. */
50769 #define ALT_USB_DEV_DSTS_ENUMSPD_SET(value) (((value) << 1) & 0x00000006)
50770 
50771 /*
50772  * Field : Erratic Error - errticerr
50773  *
50774  * The core sets this bit to report any erratic errors (phy_rxvalid_i/phy_rxvldh_i
50775  * or phy_rxactive_i is asserted for at least 2 ms, due to PHY error) seen on the
50776  * UTMI+ . Due to erratic errors, the otg core goes into Suspended state and an
50777  * interrupt is generated to the application with Early Suspend bit of the Core
50778  * Interrupt register (GINTSTS.ErlySusp). If the early suspend is asserted due to
50779  * an erratic error, the application can only perform a soft disconnect recover.
50780  *
50781  * Field Enumeration Values:
50782  *
50783  * Enum | Value | Description
50784  * :-----------------------------------|:------|:-----------------
50785  * ALT_USB_DEV_DSTS_ERRTICERR_E_INACT | 0x0 | No Erratic Error
50786  * ALT_USB_DEV_DSTS_ERRTICERR_E_ACT | 0x1 | Erratic Error
50787  *
50788  * Field Access Macros:
50789  *
50790  */
50791 /*
50792  * Enumerated value for register field ALT_USB_DEV_DSTS_ERRTICERR
50793  *
50794  * No Erratic Error
50795  */
50796 #define ALT_USB_DEV_DSTS_ERRTICERR_E_INACT 0x0
50797 /*
50798  * Enumerated value for register field ALT_USB_DEV_DSTS_ERRTICERR
50799  *
50800  * Erratic Error
50801  */
50802 #define ALT_USB_DEV_DSTS_ERRTICERR_E_ACT 0x1
50803 
50804 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DSTS_ERRTICERR register field. */
50805 #define ALT_USB_DEV_DSTS_ERRTICERR_LSB 3
50806 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DSTS_ERRTICERR register field. */
50807 #define ALT_USB_DEV_DSTS_ERRTICERR_MSB 3
50808 /* The width in bits of the ALT_USB_DEV_DSTS_ERRTICERR register field. */
50809 #define ALT_USB_DEV_DSTS_ERRTICERR_WIDTH 1
50810 /* The mask used to set the ALT_USB_DEV_DSTS_ERRTICERR register field value. */
50811 #define ALT_USB_DEV_DSTS_ERRTICERR_SET_MSK 0x00000008
50812 /* The mask used to clear the ALT_USB_DEV_DSTS_ERRTICERR register field value. */
50813 #define ALT_USB_DEV_DSTS_ERRTICERR_CLR_MSK 0xfffffff7
50814 /* The reset value of the ALT_USB_DEV_DSTS_ERRTICERR register field. */
50815 #define ALT_USB_DEV_DSTS_ERRTICERR_RESET 0x0
50816 /* Extracts the ALT_USB_DEV_DSTS_ERRTICERR field value from a register. */
50817 #define ALT_USB_DEV_DSTS_ERRTICERR_GET(value) (((value) & 0x00000008) >> 3)
50818 /* Produces a ALT_USB_DEV_DSTS_ERRTICERR register field value suitable for setting the register. */
50819 #define ALT_USB_DEV_DSTS_ERRTICERR_SET(value) (((value) << 3) & 0x00000008)
50820 
50821 /*
50822  * Field : Frame or Microframe Number of the Received SOF - soffn
50823  *
50824  * When the core is operating at high speed, this field contains a microframe
50825  * number. When the core is operating at full or low speed, this field contains a
50826  * Frame number.
50827  *
50828  * Field Access Macros:
50829  *
50830  */
50831 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DSTS_SOFFN register field. */
50832 #define ALT_USB_DEV_DSTS_SOFFN_LSB 8
50833 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DSTS_SOFFN register field. */
50834 #define ALT_USB_DEV_DSTS_SOFFN_MSB 21
50835 /* The width in bits of the ALT_USB_DEV_DSTS_SOFFN register field. */
50836 #define ALT_USB_DEV_DSTS_SOFFN_WIDTH 14
50837 /* The mask used to set the ALT_USB_DEV_DSTS_SOFFN register field value. */
50838 #define ALT_USB_DEV_DSTS_SOFFN_SET_MSK 0x003fff00
50839 /* The mask used to clear the ALT_USB_DEV_DSTS_SOFFN register field value. */
50840 #define ALT_USB_DEV_DSTS_SOFFN_CLR_MSK 0xffc000ff
50841 /* The reset value of the ALT_USB_DEV_DSTS_SOFFN register field. */
50842 #define ALT_USB_DEV_DSTS_SOFFN_RESET 0x0
50843 /* Extracts the ALT_USB_DEV_DSTS_SOFFN field value from a register. */
50844 #define ALT_USB_DEV_DSTS_SOFFN_GET(value) (((value) & 0x003fff00) >> 8)
50845 /* Produces a ALT_USB_DEV_DSTS_SOFFN register field value suitable for setting the register. */
50846 #define ALT_USB_DEV_DSTS_SOFFN_SET(value) (((value) << 8) & 0x003fff00)
50847 
50848 #ifndef __ASSEMBLY__
50849 /*
50850  * WARNING: The C register and register group struct declarations are provided for
50851  * convenience and illustrative purposes. They should, however, be used with
50852  * caution as the C language standard provides no guarantees about the alignment or
50853  * atomicity of device memory accesses. The recommended practice for writing
50854  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
50855  * alt_write_word() functions.
50856  *
50857  * The struct declaration for register ALT_USB_DEV_DSTS.
50858  */
50859 struct ALT_USB_DEV_DSTS_s
50860 {
50861  const uint32_t suspsts : 1; /* Suspend Status */
50862  const uint32_t enumspd : 2; /* Enumerated Speed */
50863  const uint32_t errticerr : 1; /* Erratic Error */
50864  uint32_t : 4; /* *UNDEFINED* */
50865  const uint32_t soffn : 14; /* Frame or Microframe Number of the Received SOF */
50866  uint32_t : 10; /* *UNDEFINED* */
50867 };
50868 
50869 /* The typedef declaration for register ALT_USB_DEV_DSTS. */
50870 typedef volatile struct ALT_USB_DEV_DSTS_s ALT_USB_DEV_DSTS_t;
50871 #endif /* __ASSEMBLY__ */
50872 
50873 /* The byte offset of the ALT_USB_DEV_DSTS register from the beginning of the component. */
50874 #define ALT_USB_DEV_DSTS_OFST 0x8
50875 /* The address of the ALT_USB_DEV_DSTS register. */
50876 #define ALT_USB_DEV_DSTS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DSTS_OFST))
50877 
50878 /*
50879  * Register : Device IN Endpoint Common Interrupt Mask Register - diepmsk
50880  *
50881  * This register works with each of the Device IN Endpoint Interrupt (DIEPINTn)
50882  * registers for all endpoints to generate an interrupt per IN endpoint. The IN
50883  * endpoint interrupt for a specific status in the DIEPINTn register can be masked
50884  * by writing to the corresponding bit in this register. Status bits are masked by
50885  * default.
50886  *
50887  * Register Layout
50888  *
50889  * Bits | Access | Reset | Description
50890  * :--------|:-------|:------|:-----------------------------------------
50891  * [0] | RW | 0x0 | Transfer Completed Interrupt Mask
50892  * [1] | RW | 0x0 | Endpoint Disabled Interrupt Mask
50893  * [2] | RW | 0x0 | AHB Error Mask
50894  * [3] | RW | 0x0 | Timeout Condition Mask
50895  * [4] | RW | 0x0 | IN Token Received When TxFIFO Empty Mask
50896  * [5] | RW | 0x0 | IN Token received with EP Mismatch Mask
50897  * [6] | RW | 0x0 | IN Endpoint NAK Effective Mask
50898  * [7] | ??? | 0x0 | *UNDEFINED*
50899  * [8] | RW | 0x0 | Fifo Underrun Mask
50900  * [9] | RW | 0x0 | BNA interrupt Mask
50901  * [12:10] | ??? | 0x0 | *UNDEFINED*
50902  * [13] | RW | 0x0 | NAK interrupt Mask
50903  * [31:14] | ??? | 0x0 | *UNDEFINED*
50904  *
50905  */
50906 /*
50907  * Field : Transfer Completed Interrupt Mask - xfercomplmsk
50908  *
50909  * Field Enumeration Values:
50910  *
50911  * Enum | Value | Description
50912  * :-----------------------------------------|:------|:-------------------------------------
50913  * ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK_E_MSK | 0x0 | Mask Transfer Completed Interrupt
50914  * ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK_E_NOMSK | 0x1 | No Mask Transfer Completed Interrupt
50915  *
50916  * Field Access Macros:
50917  *
50918  */
50919 /*
50920  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK
50921  *
50922  * Mask Transfer Completed Interrupt
50923  */
50924 #define ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK_E_MSK 0x0
50925 /*
50926  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK
50927  *
50928  * No Mask Transfer Completed Interrupt
50929  */
50930 #define ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK_E_NOMSK 0x1
50931 
50932 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK register field. */
50933 #define ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK_LSB 0
50934 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK register field. */
50935 #define ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK_MSB 0
50936 /* The width in bits of the ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK register field. */
50937 #define ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK_WIDTH 1
50938 /* The mask used to set the ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK register field value. */
50939 #define ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK_SET_MSK 0x00000001
50940 /* The mask used to clear the ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK register field value. */
50941 #define ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK_CLR_MSK 0xfffffffe
50942 /* The reset value of the ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK register field. */
50943 #define ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK_RESET 0x0
50944 /* Extracts the ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK field value from a register. */
50945 #define ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
50946 /* Produces a ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK register field value suitable for setting the register. */
50947 #define ALT_USB_DEV_DIEPMSK_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
50948 
50949 /*
50950  * Field : Endpoint Disabled Interrupt Mask - epdisbldmsk
50951  *
50952  * Field Enumeration Values:
50953  *
50954  * Enum | Value | Description
50955  * :----------------------------------------|:------|:------------------------------------
50956  * ALT_USB_DEV_DIEPMSK_EPDISBLDMSK_E_MSK | 0x0 | Mask Endpoint Disabled Interrupt
50957  * ALT_USB_DEV_DIEPMSK_EPDISBLDMSK_E_NOMSK | 0x1 | No Mask Endpoint Disabled Interrupt
50958  *
50959  * Field Access Macros:
50960  *
50961  */
50962 /*
50963  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_EPDISBLDMSK
50964  *
50965  * Mask Endpoint Disabled Interrupt
50966  */
50967 #define ALT_USB_DEV_DIEPMSK_EPDISBLDMSK_E_MSK 0x0
50968 /*
50969  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_EPDISBLDMSK
50970  *
50971  * No Mask Endpoint Disabled Interrupt
50972  */
50973 #define ALT_USB_DEV_DIEPMSK_EPDISBLDMSK_E_NOMSK 0x1
50974 
50975 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPMSK_EPDISBLDMSK register field. */
50976 #define ALT_USB_DEV_DIEPMSK_EPDISBLDMSK_LSB 1
50977 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPMSK_EPDISBLDMSK register field. */
50978 #define ALT_USB_DEV_DIEPMSK_EPDISBLDMSK_MSB 1
50979 /* The width in bits of the ALT_USB_DEV_DIEPMSK_EPDISBLDMSK register field. */
50980 #define ALT_USB_DEV_DIEPMSK_EPDISBLDMSK_WIDTH 1
50981 /* The mask used to set the ALT_USB_DEV_DIEPMSK_EPDISBLDMSK register field value. */
50982 #define ALT_USB_DEV_DIEPMSK_EPDISBLDMSK_SET_MSK 0x00000002
50983 /* The mask used to clear the ALT_USB_DEV_DIEPMSK_EPDISBLDMSK register field value. */
50984 #define ALT_USB_DEV_DIEPMSK_EPDISBLDMSK_CLR_MSK 0xfffffffd
50985 /* The reset value of the ALT_USB_DEV_DIEPMSK_EPDISBLDMSK register field. */
50986 #define ALT_USB_DEV_DIEPMSK_EPDISBLDMSK_RESET 0x0
50987 /* Extracts the ALT_USB_DEV_DIEPMSK_EPDISBLDMSK field value from a register. */
50988 #define ALT_USB_DEV_DIEPMSK_EPDISBLDMSK_GET(value) (((value) & 0x00000002) >> 1)
50989 /* Produces a ALT_USB_DEV_DIEPMSK_EPDISBLDMSK register field value suitable for setting the register. */
50990 #define ALT_USB_DEV_DIEPMSK_EPDISBLDMSK_SET(value) (((value) << 1) & 0x00000002)
50991 
50992 /*
50993  * Field : AHB Error Mask - ahberrmsk
50994  *
50995  * Field Enumeration Values:
50996  *
50997  * Enum | Value | Description
50998  * :--------------------------------------|:------|:-----------------------------
50999  * ALT_USB_DEV_DIEPMSK_AHBERRMSK_E_MSK | 0x0 | Mask AHB Error Interrupt
51000  * ALT_USB_DEV_DIEPMSK_AHBERRMSK_E_NOMSK | 0x1 | No Mask AHB Error Interrupt
51001  *
51002  * Field Access Macros:
51003  *
51004  */
51005 /*
51006  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_AHBERRMSK
51007  *
51008  * Mask AHB Error Interrupt
51009  */
51010 #define ALT_USB_DEV_DIEPMSK_AHBERRMSK_E_MSK 0x0
51011 /*
51012  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_AHBERRMSK
51013  *
51014  * No Mask AHB Error Interrupt
51015  */
51016 #define ALT_USB_DEV_DIEPMSK_AHBERRMSK_E_NOMSK 0x1
51017 
51018 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPMSK_AHBERRMSK register field. */
51019 #define ALT_USB_DEV_DIEPMSK_AHBERRMSK_LSB 2
51020 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPMSK_AHBERRMSK register field. */
51021 #define ALT_USB_DEV_DIEPMSK_AHBERRMSK_MSB 2
51022 /* The width in bits of the ALT_USB_DEV_DIEPMSK_AHBERRMSK register field. */
51023 #define ALT_USB_DEV_DIEPMSK_AHBERRMSK_WIDTH 1
51024 /* The mask used to set the ALT_USB_DEV_DIEPMSK_AHBERRMSK register field value. */
51025 #define ALT_USB_DEV_DIEPMSK_AHBERRMSK_SET_MSK 0x00000004
51026 /* The mask used to clear the ALT_USB_DEV_DIEPMSK_AHBERRMSK register field value. */
51027 #define ALT_USB_DEV_DIEPMSK_AHBERRMSK_CLR_MSK 0xfffffffb
51028 /* The reset value of the ALT_USB_DEV_DIEPMSK_AHBERRMSK register field. */
51029 #define ALT_USB_DEV_DIEPMSK_AHBERRMSK_RESET 0x0
51030 /* Extracts the ALT_USB_DEV_DIEPMSK_AHBERRMSK field value from a register. */
51031 #define ALT_USB_DEV_DIEPMSK_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
51032 /* Produces a ALT_USB_DEV_DIEPMSK_AHBERRMSK register field value suitable for setting the register. */
51033 #define ALT_USB_DEV_DIEPMSK_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
51034 
51035 /*
51036  * Field : Timeout Condition Mask - timeoutmsk
51037  *
51038  * Non-isochronous endpoints
51039  *
51040  * Field Enumeration Values:
51041  *
51042  * Enum | Value | Description
51043  * :-----------------------------------|:------|:------------------------------------
51044  * ALT_USB_DEV_DIEPMSK_TMOMSK_E_MSK | 0x0 | Mask Timeout Condition Interrupt
51045  * ALT_USB_DEV_DIEPMSK_TMOMSK_E_NOMSK | 0x1 | No Mask Timeout Condition Interrupt
51046  *
51047  * Field Access Macros:
51048  *
51049  */
51050 /*
51051  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_TMOMSK
51052  *
51053  * Mask Timeout Condition Interrupt
51054  */
51055 #define ALT_USB_DEV_DIEPMSK_TMOMSK_E_MSK 0x0
51056 /*
51057  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_TMOMSK
51058  *
51059  * No Mask Timeout Condition Interrupt
51060  */
51061 #define ALT_USB_DEV_DIEPMSK_TMOMSK_E_NOMSK 0x1
51062 
51063 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPMSK_TMOMSK register field. */
51064 #define ALT_USB_DEV_DIEPMSK_TMOMSK_LSB 3
51065 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPMSK_TMOMSK register field. */
51066 #define ALT_USB_DEV_DIEPMSK_TMOMSK_MSB 3
51067 /* The width in bits of the ALT_USB_DEV_DIEPMSK_TMOMSK register field. */
51068 #define ALT_USB_DEV_DIEPMSK_TMOMSK_WIDTH 1
51069 /* The mask used to set the ALT_USB_DEV_DIEPMSK_TMOMSK register field value. */
51070 #define ALT_USB_DEV_DIEPMSK_TMOMSK_SET_MSK 0x00000008
51071 /* The mask used to clear the ALT_USB_DEV_DIEPMSK_TMOMSK register field value. */
51072 #define ALT_USB_DEV_DIEPMSK_TMOMSK_CLR_MSK 0xfffffff7
51073 /* The reset value of the ALT_USB_DEV_DIEPMSK_TMOMSK register field. */
51074 #define ALT_USB_DEV_DIEPMSK_TMOMSK_RESET 0x0
51075 /* Extracts the ALT_USB_DEV_DIEPMSK_TMOMSK field value from a register. */
51076 #define ALT_USB_DEV_DIEPMSK_TMOMSK_GET(value) (((value) & 0x00000008) >> 3)
51077 /* Produces a ALT_USB_DEV_DIEPMSK_TMOMSK register field value suitable for setting the register. */
51078 #define ALT_USB_DEV_DIEPMSK_TMOMSK_SET(value) (((value) << 3) & 0x00000008)
51079 
51080 /*
51081  * Field : IN Token Received When TxFIFO Empty Mask - intkntxfempmsk
51082  *
51083  * Field Enumeration Values:
51084  *
51085  * Enum | Value | Description
51086  * :-------------------------------------------|:------|:--------------------------------------------
51087  * ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK_E_MSK | 0x0 | Mask IN Token Received When TxFIFO Empty
51088  * : | | Interrupt
51089  * ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK_E_NOMSK | 0x1 | No Mask IN Token Received When TxFIFO Empty
51090  * : | | Interrupt
51091  *
51092  * Field Access Macros:
51093  *
51094  */
51095 /*
51096  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK
51097  *
51098  * Mask IN Token Received When TxFIFO Empty Interrupt
51099  */
51100 #define ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK_E_MSK 0x0
51101 /*
51102  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK
51103  *
51104  * No Mask IN Token Received When TxFIFO Empty Interrupt
51105  */
51106 #define ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK_E_NOMSK 0x1
51107 
51108 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK register field. */
51109 #define ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK_LSB 4
51110 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK register field. */
51111 #define ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK_MSB 4
51112 /* The width in bits of the ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK register field. */
51113 #define ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK_WIDTH 1
51114 /* The mask used to set the ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK register field value. */
51115 #define ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK_SET_MSK 0x00000010
51116 /* The mask used to clear the ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK register field value. */
51117 #define ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK_CLR_MSK 0xffffffef
51118 /* The reset value of the ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK register field. */
51119 #define ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK_RESET 0x0
51120 /* Extracts the ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK field value from a register. */
51121 #define ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK_GET(value) (((value) & 0x00000010) >> 4)
51122 /* Produces a ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK register field value suitable for setting the register. */
51123 #define ALT_USB_DEV_DIEPMSK_INTKNTXFEMPMSK_SET(value) (((value) << 4) & 0x00000010)
51124 
51125 /*
51126  * Field : IN Token received with EP Mismatch Mask - intknepmismsk
51127  *
51128  * Field Enumeration Values:
51129  *
51130  * Enum | Value | Description
51131  * :------------------------------------------|:------|:-------------------------------------------
51132  * ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK_E_MSK | 0x0 | Mask IN Token received with EP Mismatch
51133  * : | | Interrupt
51134  * ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK_E_NOMSK | 0x1 | No Mask IN Token received with EP Mismatch
51135  * : | | Interrupt
51136  *
51137  * Field Access Macros:
51138  *
51139  */
51140 /*
51141  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK
51142  *
51143  * Mask IN Token received with EP Mismatch Interrupt
51144  */
51145 #define ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK_E_MSK 0x0
51146 /*
51147  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK
51148  *
51149  * No Mask IN Token received with EP Mismatch Interrupt
51150  */
51151 #define ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK_E_NOMSK 0x1
51152 
51153 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK register field. */
51154 #define ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK_LSB 5
51155 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK register field. */
51156 #define ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK_MSB 5
51157 /* The width in bits of the ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK register field. */
51158 #define ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK_WIDTH 1
51159 /* The mask used to set the ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK register field value. */
51160 #define ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK_SET_MSK 0x00000020
51161 /* The mask used to clear the ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK register field value. */
51162 #define ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK_CLR_MSK 0xffffffdf
51163 /* The reset value of the ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK register field. */
51164 #define ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK_RESET 0x0
51165 /* Extracts the ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK field value from a register. */
51166 #define ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK_GET(value) (((value) & 0x00000020) >> 5)
51167 /* Produces a ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK register field value suitable for setting the register. */
51168 #define ALT_USB_DEV_DIEPMSK_INTKNEPMISMSK_SET(value) (((value) << 5) & 0x00000020)
51169 
51170 /*
51171  * Field : IN Endpoint NAK Effective Mask - inepnakeffmsk
51172  *
51173  * Field Enumeration Values:
51174  *
51175  * Enum | Value | Description
51176  * :------------------------------------------|:------|:--------------------------------------------
51177  * ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK_E_MSK | 0x0 | Mask IN Endpoint NAK Effective Interrupt
51178  * ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK_E_NOMSK | 0x1 | No Mask IN Endpoint NAK Effective Interrupt
51179  *
51180  * Field Access Macros:
51181  *
51182  */
51183 /*
51184  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK
51185  *
51186  * Mask IN Endpoint NAK Effective Interrupt
51187  */
51188 #define ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK_E_MSK 0x0
51189 /*
51190  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK
51191  *
51192  * No Mask IN Endpoint NAK Effective Interrupt
51193  */
51194 #define ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK_E_NOMSK 0x1
51195 
51196 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK register field. */
51197 #define ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK_LSB 6
51198 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK register field. */
51199 #define ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK_MSB 6
51200 /* The width in bits of the ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK register field. */
51201 #define ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK_WIDTH 1
51202 /* The mask used to set the ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK register field value. */
51203 #define ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK_SET_MSK 0x00000040
51204 /* The mask used to clear the ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK register field value. */
51205 #define ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK_CLR_MSK 0xffffffbf
51206 /* The reset value of the ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK register field. */
51207 #define ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK_RESET 0x0
51208 /* Extracts the ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK field value from a register. */
51209 #define ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK_GET(value) (((value) & 0x00000040) >> 6)
51210 /* Produces a ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK register field value suitable for setting the register. */
51211 #define ALT_USB_DEV_DIEPMSK_INEPNAKEFFMSK_SET(value) (((value) << 6) & 0x00000040)
51212 
51213 /*
51214  * Field : Fifo Underrun Mask - txfifoundrnmsk
51215  *
51216  * Field Enumeration Values:
51217  *
51218  * Enum | Value | Description
51219  * :-------------------------------------------|:------|:--------------------------------
51220  * ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK_E_MSK | 0x0 | Mask Fifo Underrun Interrupt
51221  * ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK_E_NOMSK | 0x1 | No Mask Fifo Underrun Interrupt
51222  *
51223  * Field Access Macros:
51224  *
51225  */
51226 /*
51227  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK
51228  *
51229  * Mask Fifo Underrun Interrupt
51230  */
51231 #define ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK_E_MSK 0x0
51232 /*
51233  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK
51234  *
51235  * No Mask Fifo Underrun Interrupt
51236  */
51237 #define ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK_E_NOMSK 0x1
51238 
51239 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK register field. */
51240 #define ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK_LSB 8
51241 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK register field. */
51242 #define ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK_MSB 8
51243 /* The width in bits of the ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK register field. */
51244 #define ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK_WIDTH 1
51245 /* The mask used to set the ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK register field value. */
51246 #define ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK_SET_MSK 0x00000100
51247 /* The mask used to clear the ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK register field value. */
51248 #define ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK_CLR_MSK 0xfffffeff
51249 /* The reset value of the ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK register field. */
51250 #define ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK_RESET 0x0
51251 /* Extracts the ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK field value from a register. */
51252 #define ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK_GET(value) (((value) & 0x00000100) >> 8)
51253 /* Produces a ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK register field value suitable for setting the register. */
51254 #define ALT_USB_DEV_DIEPMSK_TXFIFOUNDRNMSK_SET(value) (((value) << 8) & 0x00000100)
51255 
51256 /*
51257  * Field : BNA interrupt Mask - bnainintrmsk
51258  *
51259  * Field Enumeration Values:
51260  *
51261  * Enum | Value | Description
51262  * :-----------------------------------------|:------|:----------------------
51263  * ALT_USB_DEV_DIEPMSK_BNAININTRMSK_E_MSK | 0x0 | Mask BNA Interrupt
51264  * ALT_USB_DEV_DIEPMSK_BNAININTRMSK_E_NOMSK | 0x1 | No Mask BNA Interrupt
51265  *
51266  * Field Access Macros:
51267  *
51268  */
51269 /*
51270  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_BNAININTRMSK
51271  *
51272  * Mask BNA Interrupt
51273  */
51274 #define ALT_USB_DEV_DIEPMSK_BNAININTRMSK_E_MSK 0x0
51275 /*
51276  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_BNAININTRMSK
51277  *
51278  * No Mask BNA Interrupt
51279  */
51280 #define ALT_USB_DEV_DIEPMSK_BNAININTRMSK_E_NOMSK 0x1
51281 
51282 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPMSK_BNAININTRMSK register field. */
51283 #define ALT_USB_DEV_DIEPMSK_BNAININTRMSK_LSB 9
51284 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPMSK_BNAININTRMSK register field. */
51285 #define ALT_USB_DEV_DIEPMSK_BNAININTRMSK_MSB 9
51286 /* The width in bits of the ALT_USB_DEV_DIEPMSK_BNAININTRMSK register field. */
51287 #define ALT_USB_DEV_DIEPMSK_BNAININTRMSK_WIDTH 1
51288 /* The mask used to set the ALT_USB_DEV_DIEPMSK_BNAININTRMSK register field value. */
51289 #define ALT_USB_DEV_DIEPMSK_BNAININTRMSK_SET_MSK 0x00000200
51290 /* The mask used to clear the ALT_USB_DEV_DIEPMSK_BNAININTRMSK register field value. */
51291 #define ALT_USB_DEV_DIEPMSK_BNAININTRMSK_CLR_MSK 0xfffffdff
51292 /* The reset value of the ALT_USB_DEV_DIEPMSK_BNAININTRMSK register field. */
51293 #define ALT_USB_DEV_DIEPMSK_BNAININTRMSK_RESET 0x0
51294 /* Extracts the ALT_USB_DEV_DIEPMSK_BNAININTRMSK field value from a register. */
51295 #define ALT_USB_DEV_DIEPMSK_BNAININTRMSK_GET(value) (((value) & 0x00000200) >> 9)
51296 /* Produces a ALT_USB_DEV_DIEPMSK_BNAININTRMSK register field value suitable for setting the register. */
51297 #define ALT_USB_DEV_DIEPMSK_BNAININTRMSK_SET(value) (((value) << 9) & 0x00000200)
51298 
51299 /*
51300  * Field : NAK interrupt Mask - nakmsk
51301  *
51302  * Field Enumeration Values:
51303  *
51304  * Enum | Value | Description
51305  * :-----------------------------------|:------|:----------------------
51306  * ALT_USB_DEV_DIEPMSK_NAKMSK_E_MSK | 0x0 | Mask NAK Interrupt
51307  * ALT_USB_DEV_DIEPMSK_NAKMSK_E_NOMSK | 0x1 | No Mask NAK Interrupt
51308  *
51309  * Field Access Macros:
51310  *
51311  */
51312 /*
51313  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_NAKMSK
51314  *
51315  * Mask NAK Interrupt
51316  */
51317 #define ALT_USB_DEV_DIEPMSK_NAKMSK_E_MSK 0x0
51318 /*
51319  * Enumerated value for register field ALT_USB_DEV_DIEPMSK_NAKMSK
51320  *
51321  * No Mask NAK Interrupt
51322  */
51323 #define ALT_USB_DEV_DIEPMSK_NAKMSK_E_NOMSK 0x1
51324 
51325 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPMSK_NAKMSK register field. */
51326 #define ALT_USB_DEV_DIEPMSK_NAKMSK_LSB 13
51327 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPMSK_NAKMSK register field. */
51328 #define ALT_USB_DEV_DIEPMSK_NAKMSK_MSB 13
51329 /* The width in bits of the ALT_USB_DEV_DIEPMSK_NAKMSK register field. */
51330 #define ALT_USB_DEV_DIEPMSK_NAKMSK_WIDTH 1
51331 /* The mask used to set the ALT_USB_DEV_DIEPMSK_NAKMSK register field value. */
51332 #define ALT_USB_DEV_DIEPMSK_NAKMSK_SET_MSK 0x00002000
51333 /* The mask used to clear the ALT_USB_DEV_DIEPMSK_NAKMSK register field value. */
51334 #define ALT_USB_DEV_DIEPMSK_NAKMSK_CLR_MSK 0xffffdfff
51335 /* The reset value of the ALT_USB_DEV_DIEPMSK_NAKMSK register field. */
51336 #define ALT_USB_DEV_DIEPMSK_NAKMSK_RESET 0x0
51337 /* Extracts the ALT_USB_DEV_DIEPMSK_NAKMSK field value from a register. */
51338 #define ALT_USB_DEV_DIEPMSK_NAKMSK_GET(value) (((value) & 0x00002000) >> 13)
51339 /* Produces a ALT_USB_DEV_DIEPMSK_NAKMSK register field value suitable for setting the register. */
51340 #define ALT_USB_DEV_DIEPMSK_NAKMSK_SET(value) (((value) << 13) & 0x00002000)
51341 
51342 #ifndef __ASSEMBLY__
51343 /*
51344  * WARNING: The C register and register group struct declarations are provided for
51345  * convenience and illustrative purposes. They should, however, be used with
51346  * caution as the C language standard provides no guarantees about the alignment or
51347  * atomicity of device memory accesses. The recommended practice for writing
51348  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
51349  * alt_write_word() functions.
51350  *
51351  * The struct declaration for register ALT_USB_DEV_DIEPMSK.
51352  */
51353 struct ALT_USB_DEV_DIEPMSK_s
51354 {
51355  uint32_t xfercomplmsk : 1; /* Transfer Completed Interrupt Mask */
51356  uint32_t epdisbldmsk : 1; /* Endpoint Disabled Interrupt Mask */
51357  uint32_t ahberrmsk : 1; /* AHB Error Mask */
51358  uint32_t timeoutmsk : 1; /* Timeout Condition Mask */
51359  uint32_t intkntxfempmsk : 1; /* IN Token Received When TxFIFO Empty Mask */
51360  uint32_t intknepmismsk : 1; /* IN Token received with EP Mismatch Mask */
51361  uint32_t inepnakeffmsk : 1; /* IN Endpoint NAK Effective Mask */
51362  uint32_t : 1; /* *UNDEFINED* */
51363  uint32_t txfifoundrnmsk : 1; /* Fifo Underrun Mask */
51364  uint32_t bnainintrmsk : 1; /* BNA interrupt Mask */
51365  uint32_t : 3; /* *UNDEFINED* */
51366  uint32_t nakmsk : 1; /* NAK interrupt Mask */
51367  uint32_t : 18; /* *UNDEFINED* */
51368 };
51369 
51370 /* The typedef declaration for register ALT_USB_DEV_DIEPMSK. */
51371 typedef volatile struct ALT_USB_DEV_DIEPMSK_s ALT_USB_DEV_DIEPMSK_t;
51372 #endif /* __ASSEMBLY__ */
51373 
51374 /* The byte offset of the ALT_USB_DEV_DIEPMSK register from the beginning of the component. */
51375 #define ALT_USB_DEV_DIEPMSK_OFST 0x10
51376 /* The address of the ALT_USB_DEV_DIEPMSK register. */
51377 #define ALT_USB_DEV_DIEPMSK_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPMSK_OFST))
51378 
51379 /*
51380  * Register : Device OUT Endpoint Common Interrupt Mask Register - doepmsk
51381  *
51382  * This register works with each of the Device OUT Endpoint Interrupt (DOEPINTn)
51383  * registers for all endpoints to generate an interrupt per OUT endpoint. The OUT
51384  * endpoint interrupt for a specific status in the DOEPINTn register can be masked
51385  * by writing into the corresponding bit in this register. Status bits are masked
51386  * by default
51387  *
51388  * Register Layout
51389  *
51390  * Bits | Access | Reset | Description
51391  * :--------|:-------|:------|:-----------------------------------------------
51392  * [0] | RW | 0x0 | Transfer Completed Interrupt Mask
51393  * [1] | RW | 0x0 | Endpoint Disabled Interrupt Mask
51394  * [2] | RW | 0x0 | AHB Error Mask
51395  * [3] | RW | 0x0 | SETUP Phase Done Mask
51396  * [4] | RW | 0x0 | OUT Token Received when Endpoint Disabled Mask
51397  * [5] | ??? | 0x0 | *UNDEFINED*
51398  * [6] | RW | 0x0 | Back-to-Back SETUP Packets Received Mask
51399  * [7] | ??? | 0x0 | *UNDEFINED*
51400  * [8] | RW | 0x0 | OUT Packet Error Mask
51401  * [9] | RW | 0x0 | BNA interrupt Mask
51402  * [11:10] | ??? | 0x0 | *UNDEFINED*
51403  * [12] | RW | 0x0 | Babble Error interrupt Mask
51404  * [13] | RW | 0x0 | NAK interrupt Mask
51405  * [14] | RW | 0x0 | NYET interrupt Mask
51406  * [31:15] | ??? | 0x0 | *UNDEFINED*
51407  *
51408  */
51409 /*
51410  * Field : Transfer Completed Interrupt Mask - xfercomplmsk
51411  *
51412  * Field Enumeration Values:
51413  *
51414  * Enum | Value | Description
51415  * :-----------------------------------------|:------|:-------------------------------------
51416  * ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK_E_MSK | 0x0 | Mask Transfer Completed Interrupt
51417  * ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK_E_NOMSK | 0x1 | No Mask Transfer Completed Interrupt
51418  *
51419  * Field Access Macros:
51420  *
51421  */
51422 /*
51423  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK
51424  *
51425  * Mask Transfer Completed Interrupt
51426  */
51427 #define ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK_E_MSK 0x0
51428 /*
51429  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK
51430  *
51431  * No Mask Transfer Completed Interrupt
51432  */
51433 #define ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK_E_NOMSK 0x1
51434 
51435 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK register field. */
51436 #define ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK_LSB 0
51437 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK register field. */
51438 #define ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK_MSB 0
51439 /* The width in bits of the ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK register field. */
51440 #define ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK_WIDTH 1
51441 /* The mask used to set the ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK register field value. */
51442 #define ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK_SET_MSK 0x00000001
51443 /* The mask used to clear the ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK register field value. */
51444 #define ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK_CLR_MSK 0xfffffffe
51445 /* The reset value of the ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK register field. */
51446 #define ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK_RESET 0x0
51447 /* Extracts the ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK field value from a register. */
51448 #define ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK_GET(value) (((value) & 0x00000001) >> 0)
51449 /* Produces a ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK register field value suitable for setting the register. */
51450 #define ALT_USB_DEV_DOEPMSK_XFERCOMPLMSK_SET(value) (((value) << 0) & 0x00000001)
51451 
51452 /*
51453  * Field : Endpoint Disabled Interrupt Mask - epdisbldmsk
51454  *
51455  * Field Enumeration Values:
51456  *
51457  * Enum | Value | Description
51458  * :----------------------------------------|:------|:------------------------------------
51459  * ALT_USB_DEV_DOEPMSK_EPDISBLDMSK_E_MSK | 0x0 | Mask Endpoint Disabled Interrupt
51460  * ALT_USB_DEV_DOEPMSK_EPDISBLDMSK_E_NOMSK | 0x1 | No Mask Endpoint Disabled Interrupt
51461  *
51462  * Field Access Macros:
51463  *
51464  */
51465 /*
51466  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_EPDISBLDMSK
51467  *
51468  * Mask Endpoint Disabled Interrupt
51469  */
51470 #define ALT_USB_DEV_DOEPMSK_EPDISBLDMSK_E_MSK 0x0
51471 /*
51472  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_EPDISBLDMSK
51473  *
51474  * No Mask Endpoint Disabled Interrupt
51475  */
51476 #define ALT_USB_DEV_DOEPMSK_EPDISBLDMSK_E_NOMSK 0x1
51477 
51478 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPMSK_EPDISBLDMSK register field. */
51479 #define ALT_USB_DEV_DOEPMSK_EPDISBLDMSK_LSB 1
51480 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPMSK_EPDISBLDMSK register field. */
51481 #define ALT_USB_DEV_DOEPMSK_EPDISBLDMSK_MSB 1
51482 /* The width in bits of the ALT_USB_DEV_DOEPMSK_EPDISBLDMSK register field. */
51483 #define ALT_USB_DEV_DOEPMSK_EPDISBLDMSK_WIDTH 1
51484 /* The mask used to set the ALT_USB_DEV_DOEPMSK_EPDISBLDMSK register field value. */
51485 #define ALT_USB_DEV_DOEPMSK_EPDISBLDMSK_SET_MSK 0x00000002
51486 /* The mask used to clear the ALT_USB_DEV_DOEPMSK_EPDISBLDMSK register field value. */
51487 #define ALT_USB_DEV_DOEPMSK_EPDISBLDMSK_CLR_MSK 0xfffffffd
51488 /* The reset value of the ALT_USB_DEV_DOEPMSK_EPDISBLDMSK register field. */
51489 #define ALT_USB_DEV_DOEPMSK_EPDISBLDMSK_RESET 0x0
51490 /* Extracts the ALT_USB_DEV_DOEPMSK_EPDISBLDMSK field value from a register. */
51491 #define ALT_USB_DEV_DOEPMSK_EPDISBLDMSK_GET(value) (((value) & 0x00000002) >> 1)
51492 /* Produces a ALT_USB_DEV_DOEPMSK_EPDISBLDMSK register field value suitable for setting the register. */
51493 #define ALT_USB_DEV_DOEPMSK_EPDISBLDMSK_SET(value) (((value) << 1) & 0x00000002)
51494 
51495 /*
51496  * Field : AHB Error Mask - ahberrmsk
51497  *
51498  * Field Enumeration Values:
51499  *
51500  * Enum | Value | Description
51501  * :--------------------------------------|:------|:-----------------------------
51502  * ALT_USB_DEV_DOEPMSK_AHBERRMSK_E_MSK | 0x0 | Mask AHB Error Interrupt
51503  * ALT_USB_DEV_DOEPMSK_AHBERRMSK_E_NOMSK | 0x1 | No Mask AHB Error Interrupt
51504  *
51505  * Field Access Macros:
51506  *
51507  */
51508 /*
51509  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_AHBERRMSK
51510  *
51511  * Mask AHB Error Interrupt
51512  */
51513 #define ALT_USB_DEV_DOEPMSK_AHBERRMSK_E_MSK 0x0
51514 /*
51515  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_AHBERRMSK
51516  *
51517  * No Mask AHB Error Interrupt
51518  */
51519 #define ALT_USB_DEV_DOEPMSK_AHBERRMSK_E_NOMSK 0x1
51520 
51521 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPMSK_AHBERRMSK register field. */
51522 #define ALT_USB_DEV_DOEPMSK_AHBERRMSK_LSB 2
51523 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPMSK_AHBERRMSK register field. */
51524 #define ALT_USB_DEV_DOEPMSK_AHBERRMSK_MSB 2
51525 /* The width in bits of the ALT_USB_DEV_DOEPMSK_AHBERRMSK register field. */
51526 #define ALT_USB_DEV_DOEPMSK_AHBERRMSK_WIDTH 1
51527 /* The mask used to set the ALT_USB_DEV_DOEPMSK_AHBERRMSK register field value. */
51528 #define ALT_USB_DEV_DOEPMSK_AHBERRMSK_SET_MSK 0x00000004
51529 /* The mask used to clear the ALT_USB_DEV_DOEPMSK_AHBERRMSK register field value. */
51530 #define ALT_USB_DEV_DOEPMSK_AHBERRMSK_CLR_MSK 0xfffffffb
51531 /* The reset value of the ALT_USB_DEV_DOEPMSK_AHBERRMSK register field. */
51532 #define ALT_USB_DEV_DOEPMSK_AHBERRMSK_RESET 0x0
51533 /* Extracts the ALT_USB_DEV_DOEPMSK_AHBERRMSK field value from a register. */
51534 #define ALT_USB_DEV_DOEPMSK_AHBERRMSK_GET(value) (((value) & 0x00000004) >> 2)
51535 /* Produces a ALT_USB_DEV_DOEPMSK_AHBERRMSK register field value suitable for setting the register. */
51536 #define ALT_USB_DEV_DOEPMSK_AHBERRMSK_SET(value) (((value) << 2) & 0x00000004)
51537 
51538 /*
51539  * Field : SETUP Phase Done Mask - setupmsk
51540  *
51541  * Applies to control endpoints only.
51542  *
51543  * Field Enumeration Values:
51544  *
51545  * Enum | Value | Description
51546  * :-------------------------------------|:------|:-----------------------------------
51547  * ALT_USB_DEV_DOEPMSK_SETUPMSK_E_MSK | 0x0 | Mask SETUP Phase Done Interrupt
51548  * ALT_USB_DEV_DOEPMSK_SETUPMSK_E_NOMSK | 0x1 | No Mask SETUP Phase Done Interrupt
51549  *
51550  * Field Access Macros:
51551  *
51552  */
51553 /*
51554  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_SETUPMSK
51555  *
51556  * Mask SETUP Phase Done Interrupt
51557  */
51558 #define ALT_USB_DEV_DOEPMSK_SETUPMSK_E_MSK 0x0
51559 /*
51560  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_SETUPMSK
51561  *
51562  * No Mask SETUP Phase Done Interrupt
51563  */
51564 #define ALT_USB_DEV_DOEPMSK_SETUPMSK_E_NOMSK 0x1
51565 
51566 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPMSK_SETUPMSK register field. */
51567 #define ALT_USB_DEV_DOEPMSK_SETUPMSK_LSB 3
51568 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPMSK_SETUPMSK register field. */
51569 #define ALT_USB_DEV_DOEPMSK_SETUPMSK_MSB 3
51570 /* The width in bits of the ALT_USB_DEV_DOEPMSK_SETUPMSK register field. */
51571 #define ALT_USB_DEV_DOEPMSK_SETUPMSK_WIDTH 1
51572 /* The mask used to set the ALT_USB_DEV_DOEPMSK_SETUPMSK register field value. */
51573 #define ALT_USB_DEV_DOEPMSK_SETUPMSK_SET_MSK 0x00000008
51574 /* The mask used to clear the ALT_USB_DEV_DOEPMSK_SETUPMSK register field value. */
51575 #define ALT_USB_DEV_DOEPMSK_SETUPMSK_CLR_MSK 0xfffffff7
51576 /* The reset value of the ALT_USB_DEV_DOEPMSK_SETUPMSK register field. */
51577 #define ALT_USB_DEV_DOEPMSK_SETUPMSK_RESET 0x0
51578 /* Extracts the ALT_USB_DEV_DOEPMSK_SETUPMSK field value from a register. */
51579 #define ALT_USB_DEV_DOEPMSK_SETUPMSK_GET(value) (((value) & 0x00000008) >> 3)
51580 /* Produces a ALT_USB_DEV_DOEPMSK_SETUPMSK register field value suitable for setting the register. */
51581 #define ALT_USB_DEV_DOEPMSK_SETUPMSK_SET(value) (((value) << 3) & 0x00000008)
51582 
51583 /*
51584  * Field : OUT Token Received when Endpoint Disabled Mask - outtknepdismsk
51585  *
51586  * Applies to control OUT endpoints only.
51587  *
51588  * Field Enumeration Values:
51589  *
51590  * Enum | Value | Description
51591  * :-------------------------------------------|:------|:-----------------------------------------------
51592  * ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK_E_MSK | 0x0 | Mask OUT Token Received when Endpoint Disabled
51593  * : | | Interrupt
51594  * ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK_E_NOMSK | 0x1 | No Mask OUT Token Received when Endpoint
51595  * : | | Disabled Interrupt
51596  *
51597  * Field Access Macros:
51598  *
51599  */
51600 /*
51601  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK
51602  *
51603  * Mask OUT Token Received when Endpoint Disabled Interrupt
51604  */
51605 #define ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK_E_MSK 0x0
51606 /*
51607  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK
51608  *
51609  * No Mask OUT Token Received when Endpoint Disabled Interrupt
51610  */
51611 #define ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK_E_NOMSK 0x1
51612 
51613 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK register field. */
51614 #define ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK_LSB 4
51615 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK register field. */
51616 #define ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK_MSB 4
51617 /* The width in bits of the ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK register field. */
51618 #define ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK_WIDTH 1
51619 /* The mask used to set the ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK register field value. */
51620 #define ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK_SET_MSK 0x00000010
51621 /* The mask used to clear the ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK register field value. */
51622 #define ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK_CLR_MSK 0xffffffef
51623 /* The reset value of the ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK register field. */
51624 #define ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK_RESET 0x0
51625 /* Extracts the ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK field value from a register. */
51626 #define ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK_GET(value) (((value) & 0x00000010) >> 4)
51627 /* Produces a ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK register field value suitable for setting the register. */
51628 #define ALT_USB_DEV_DOEPMSK_OUTTKNEPDISMSK_SET(value) (((value) << 4) & 0x00000010)
51629 
51630 /*
51631  * Field : Back-to-Back SETUP Packets Received Mask - back2backsetup
51632  *
51633  * Applies to control OUT endpoints only.
51634  *
51635  * Field Enumeration Values:
51636  *
51637  * Enum | Value | Description
51638  * :-------------------------------------------|:------|:--------------------------------------------
51639  * ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP_E_MSK | 0x0 | Mask Back-to-Back SETUP Packets Received
51640  * : | | Interrupt
51641  * ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP_E_NOMSK | 0x1 | No Mask Back-to-Back SETUP Packets Received
51642  * : | | Interrupt
51643  *
51644  * Field Access Macros:
51645  *
51646  */
51647 /*
51648  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP
51649  *
51650  * Mask Back-to-Back SETUP Packets Received Interrupt
51651  */
51652 #define ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP_E_MSK 0x0
51653 /*
51654  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP
51655  *
51656  * No Mask Back-to-Back SETUP Packets Received Interrupt
51657  */
51658 #define ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP_E_NOMSK 0x1
51659 
51660 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP register field. */
51661 #define ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP_LSB 6
51662 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP register field. */
51663 #define ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP_MSB 6
51664 /* The width in bits of the ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP register field. */
51665 #define ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP_WIDTH 1
51666 /* The mask used to set the ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP register field value. */
51667 #define ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP_SET_MSK 0x00000040
51668 /* The mask used to clear the ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP register field value. */
51669 #define ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP_CLR_MSK 0xffffffbf
51670 /* The reset value of the ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP register field. */
51671 #define ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP_RESET 0x0
51672 /* Extracts the ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP field value from a register. */
51673 #define ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
51674 /* Produces a ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP register field value suitable for setting the register. */
51675 #define ALT_USB_DEV_DOEPMSK_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
51676 
51677 /*
51678  * Field : OUT Packet Error Mask - outpkterrmsk
51679  *
51680  * Field Enumeration Values:
51681  *
51682  * Enum | Value | Description
51683  * :-----------------------------------------|:------|:-----------------------------------
51684  * ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK_E_MSK | 0x0 | Mask OUT Packet Error Interrupt
51685  * ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK_E_NOMSK | 0x1 | No Mask OUT Packet Error Interrupt
51686  *
51687  * Field Access Macros:
51688  *
51689  */
51690 /*
51691  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK
51692  *
51693  * Mask OUT Packet Error Interrupt
51694  */
51695 #define ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK_E_MSK 0x0
51696 /*
51697  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK
51698  *
51699  * No Mask OUT Packet Error Interrupt
51700  */
51701 #define ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK_E_NOMSK 0x1
51702 
51703 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK register field. */
51704 #define ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK_LSB 8
51705 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK register field. */
51706 #define ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK_MSB 8
51707 /* The width in bits of the ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK register field. */
51708 #define ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK_WIDTH 1
51709 /* The mask used to set the ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK register field value. */
51710 #define ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK_SET_MSK 0x00000100
51711 /* The mask used to clear the ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK register field value. */
51712 #define ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK_CLR_MSK 0xfffffeff
51713 /* The reset value of the ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK register field. */
51714 #define ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK_RESET 0x0
51715 /* Extracts the ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK field value from a register. */
51716 #define ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK_GET(value) (((value) & 0x00000100) >> 8)
51717 /* Produces a ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK register field value suitable for setting the register. */
51718 #define ALT_USB_DEV_DOEPMSK_OUTPKTERRMSK_SET(value) (((value) << 8) & 0x00000100)
51719 
51720 /*
51721  * Field : BNA interrupt Mask - bnaoutintrmsk
51722  *
51723  * Field Enumeration Values:
51724  *
51725  * Enum | Value | Description
51726  * :------------------------------------------|:------|:----------------------
51727  * ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK_E_MSK | 0x0 | Mask BNA Interrupt
51728  * ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK_E_NOMSK | 0x1 | No Mask BNA Interrupt
51729  *
51730  * Field Access Macros:
51731  *
51732  */
51733 /*
51734  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK
51735  *
51736  * Mask BNA Interrupt
51737  */
51738 #define ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK_E_MSK 0x0
51739 /*
51740  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK
51741  *
51742  * No Mask BNA Interrupt
51743  */
51744 #define ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK_E_NOMSK 0x1
51745 
51746 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK register field. */
51747 #define ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK_LSB 9
51748 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK register field. */
51749 #define ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK_MSB 9
51750 /* The width in bits of the ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK register field. */
51751 #define ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK_WIDTH 1
51752 /* The mask used to set the ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK register field value. */
51753 #define ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK_SET_MSK 0x00000200
51754 /* The mask used to clear the ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK register field value. */
51755 #define ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK_CLR_MSK 0xfffffdff
51756 /* The reset value of the ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK register field. */
51757 #define ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK_RESET 0x0
51758 /* Extracts the ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK field value from a register. */
51759 #define ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK_GET(value) (((value) & 0x00000200) >> 9)
51760 /* Produces a ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK register field value suitable for setting the register. */
51761 #define ALT_USB_DEV_DOEPMSK_BNAOUTINTRMSK_SET(value) (((value) << 9) & 0x00000200)
51762 
51763 /*
51764  * Field : Babble Error interrupt Mask - bbleerrmsk
51765  *
51766  * Field Enumeration Values:
51767  *
51768  * Enum | Value | Description
51769  * :---------------------------------------|:------|:-------------------------------
51770  * ALT_USB_DEV_DOEPMSK_BBLEERRMSK_E_MSK | 0x0 | Mask Babble Error Interrupt
51771  * ALT_USB_DEV_DOEPMSK_BBLEERRMSK_E_NOMSK | 0x1 | No Mask Babble Error Interrupt
51772  *
51773  * Field Access Macros:
51774  *
51775  */
51776 /*
51777  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_BBLEERRMSK
51778  *
51779  * Mask Babble Error Interrupt
51780  */
51781 #define ALT_USB_DEV_DOEPMSK_BBLEERRMSK_E_MSK 0x0
51782 /*
51783  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_BBLEERRMSK
51784  *
51785  * No Mask Babble Error Interrupt
51786  */
51787 #define ALT_USB_DEV_DOEPMSK_BBLEERRMSK_E_NOMSK 0x1
51788 
51789 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPMSK_BBLEERRMSK register field. */
51790 #define ALT_USB_DEV_DOEPMSK_BBLEERRMSK_LSB 12
51791 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPMSK_BBLEERRMSK register field. */
51792 #define ALT_USB_DEV_DOEPMSK_BBLEERRMSK_MSB 12
51793 /* The width in bits of the ALT_USB_DEV_DOEPMSK_BBLEERRMSK register field. */
51794 #define ALT_USB_DEV_DOEPMSK_BBLEERRMSK_WIDTH 1
51795 /* The mask used to set the ALT_USB_DEV_DOEPMSK_BBLEERRMSK register field value. */
51796 #define ALT_USB_DEV_DOEPMSK_BBLEERRMSK_SET_MSK 0x00001000
51797 /* The mask used to clear the ALT_USB_DEV_DOEPMSK_BBLEERRMSK register field value. */
51798 #define ALT_USB_DEV_DOEPMSK_BBLEERRMSK_CLR_MSK 0xffffefff
51799 /* The reset value of the ALT_USB_DEV_DOEPMSK_BBLEERRMSK register field. */
51800 #define ALT_USB_DEV_DOEPMSK_BBLEERRMSK_RESET 0x0
51801 /* Extracts the ALT_USB_DEV_DOEPMSK_BBLEERRMSK field value from a register. */
51802 #define ALT_USB_DEV_DOEPMSK_BBLEERRMSK_GET(value) (((value) & 0x00001000) >> 12)
51803 /* Produces a ALT_USB_DEV_DOEPMSK_BBLEERRMSK register field value suitable for setting the register. */
51804 #define ALT_USB_DEV_DOEPMSK_BBLEERRMSK_SET(value) (((value) << 12) & 0x00001000)
51805 
51806 /*
51807  * Field : NAK interrupt Mask - nakmsk
51808  *
51809  * Field Enumeration Values:
51810  *
51811  * Enum | Value | Description
51812  * :-----------------------------------|:------|:----------------------
51813  * ALT_USB_DEV_DOEPMSK_NAKMSK_E_MSK | 0x0 | Mask NAK Interrupt
51814  * ALT_USB_DEV_DOEPMSK_NAKMSK_E_NOMSK | 0x1 | No Mask NAK Interrupt
51815  *
51816  * Field Access Macros:
51817  *
51818  */
51819 /*
51820  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_NAKMSK
51821  *
51822  * Mask NAK Interrupt
51823  */
51824 #define ALT_USB_DEV_DOEPMSK_NAKMSK_E_MSK 0x0
51825 /*
51826  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_NAKMSK
51827  *
51828  * No Mask NAK Interrupt
51829  */
51830 #define ALT_USB_DEV_DOEPMSK_NAKMSK_E_NOMSK 0x1
51831 
51832 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPMSK_NAKMSK register field. */
51833 #define ALT_USB_DEV_DOEPMSK_NAKMSK_LSB 13
51834 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPMSK_NAKMSK register field. */
51835 #define ALT_USB_DEV_DOEPMSK_NAKMSK_MSB 13
51836 /* The width in bits of the ALT_USB_DEV_DOEPMSK_NAKMSK register field. */
51837 #define ALT_USB_DEV_DOEPMSK_NAKMSK_WIDTH 1
51838 /* The mask used to set the ALT_USB_DEV_DOEPMSK_NAKMSK register field value. */
51839 #define ALT_USB_DEV_DOEPMSK_NAKMSK_SET_MSK 0x00002000
51840 /* The mask used to clear the ALT_USB_DEV_DOEPMSK_NAKMSK register field value. */
51841 #define ALT_USB_DEV_DOEPMSK_NAKMSK_CLR_MSK 0xffffdfff
51842 /* The reset value of the ALT_USB_DEV_DOEPMSK_NAKMSK register field. */
51843 #define ALT_USB_DEV_DOEPMSK_NAKMSK_RESET 0x0
51844 /* Extracts the ALT_USB_DEV_DOEPMSK_NAKMSK field value from a register. */
51845 #define ALT_USB_DEV_DOEPMSK_NAKMSK_GET(value) (((value) & 0x00002000) >> 13)
51846 /* Produces a ALT_USB_DEV_DOEPMSK_NAKMSK register field value suitable for setting the register. */
51847 #define ALT_USB_DEV_DOEPMSK_NAKMSK_SET(value) (((value) << 13) & 0x00002000)
51848 
51849 /*
51850  * Field : NYET interrupt Mask - nyetmsk
51851  *
51852  * Field Enumeration Values:
51853  *
51854  * Enum | Value | Description
51855  * :------------------------------------|:------|:-----------------------
51856  * ALT_USB_DEV_DOEPMSK_NYETMSK_E_MSK | 0x0 | Mask NYET Interrupt
51857  * ALT_USB_DEV_DOEPMSK_NYETMSK_E_NOMSK | 0x1 | No Mask NYET Interrupt
51858  *
51859  * Field Access Macros:
51860  *
51861  */
51862 /*
51863  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_NYETMSK
51864  *
51865  * Mask NYET Interrupt
51866  */
51867 #define ALT_USB_DEV_DOEPMSK_NYETMSK_E_MSK 0x0
51868 /*
51869  * Enumerated value for register field ALT_USB_DEV_DOEPMSK_NYETMSK
51870  *
51871  * No Mask NYET Interrupt
51872  */
51873 #define ALT_USB_DEV_DOEPMSK_NYETMSK_E_NOMSK 0x1
51874 
51875 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPMSK_NYETMSK register field. */
51876 #define ALT_USB_DEV_DOEPMSK_NYETMSK_LSB 14
51877 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPMSK_NYETMSK register field. */
51878 #define ALT_USB_DEV_DOEPMSK_NYETMSK_MSB 14
51879 /* The width in bits of the ALT_USB_DEV_DOEPMSK_NYETMSK register field. */
51880 #define ALT_USB_DEV_DOEPMSK_NYETMSK_WIDTH 1
51881 /* The mask used to set the ALT_USB_DEV_DOEPMSK_NYETMSK register field value. */
51882 #define ALT_USB_DEV_DOEPMSK_NYETMSK_SET_MSK 0x00004000
51883 /* The mask used to clear the ALT_USB_DEV_DOEPMSK_NYETMSK register field value. */
51884 #define ALT_USB_DEV_DOEPMSK_NYETMSK_CLR_MSK 0xffffbfff
51885 /* The reset value of the ALT_USB_DEV_DOEPMSK_NYETMSK register field. */
51886 #define ALT_USB_DEV_DOEPMSK_NYETMSK_RESET 0x0
51887 /* Extracts the ALT_USB_DEV_DOEPMSK_NYETMSK field value from a register. */
51888 #define ALT_USB_DEV_DOEPMSK_NYETMSK_GET(value) (((value) & 0x00004000) >> 14)
51889 /* Produces a ALT_USB_DEV_DOEPMSK_NYETMSK register field value suitable for setting the register. */
51890 #define ALT_USB_DEV_DOEPMSK_NYETMSK_SET(value) (((value) << 14) & 0x00004000)
51891 
51892 #ifndef __ASSEMBLY__
51893 /*
51894  * WARNING: The C register and register group struct declarations are provided for
51895  * convenience and illustrative purposes. They should, however, be used with
51896  * caution as the C language standard provides no guarantees about the alignment or
51897  * atomicity of device memory accesses. The recommended practice for writing
51898  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
51899  * alt_write_word() functions.
51900  *
51901  * The struct declaration for register ALT_USB_DEV_DOEPMSK.
51902  */
51903 struct ALT_USB_DEV_DOEPMSK_s
51904 {
51905  uint32_t xfercomplmsk : 1; /* Transfer Completed Interrupt Mask */
51906  uint32_t epdisbldmsk : 1; /* Endpoint Disabled Interrupt Mask */
51907  uint32_t ahberrmsk : 1; /* AHB Error Mask */
51908  uint32_t setupmsk : 1; /* SETUP Phase Done Mask */
51909  uint32_t outtknepdismsk : 1; /* OUT Token Received when Endpoint Disabled Mask */
51910  uint32_t : 1; /* *UNDEFINED* */
51911  uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received Mask */
51912  uint32_t : 1; /* *UNDEFINED* */
51913  uint32_t outpkterrmsk : 1; /* OUT Packet Error Mask */
51914  uint32_t bnaoutintrmsk : 1; /* BNA interrupt Mask */
51915  uint32_t : 2; /* *UNDEFINED* */
51916  uint32_t bbleerrmsk : 1; /* Babble Error interrupt Mask */
51917  uint32_t nakmsk : 1; /* NAK interrupt Mask */
51918  uint32_t nyetmsk : 1; /* NYET interrupt Mask */
51919  uint32_t : 17; /* *UNDEFINED* */
51920 };
51921 
51922 /* The typedef declaration for register ALT_USB_DEV_DOEPMSK. */
51923 typedef volatile struct ALT_USB_DEV_DOEPMSK_s ALT_USB_DEV_DOEPMSK_t;
51924 #endif /* __ASSEMBLY__ */
51925 
51926 /* The byte offset of the ALT_USB_DEV_DOEPMSK register from the beginning of the component. */
51927 #define ALT_USB_DEV_DOEPMSK_OFST 0x14
51928 /* The address of the ALT_USB_DEV_DOEPMSK register. */
51929 #define ALT_USB_DEV_DOEPMSK_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPMSK_OFST))
51930 
51931 /*
51932  * Register : Device All Endpoints Interrupt Register - daint
51933  *
51934  * When a significant event occurs on an endpoint, a Device All Endpoints Interrupt
51935  * register interrupts the application using the Device OUT Endpoints Interrupt bit
51936  * or Device IN Endpoints Interrupt bit of the Core Interrupt register
51937  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively). This is shown in Figure 5-2.
51938  * There is one interrupt bit per endpoint, up to a maximum of 16 bits for OUT
51939  * endpoints and 16 bits for IN endpoints. for a bidirectional endpoint, the
51940  * corresponding IN and OUT interrupt bits are used. Bits in this register are set
51941  * and cleared when the application sets and clears bits in the corresponding
51942  * Device Endpoint-n Interrupt register (DIEPINTn/DOEPINTn).
51943  *
51944  * Register Layout
51945  *
51946  * Bits | Access | Reset | Description
51947  * :-----|:-------|:------|:------------------------------
51948  * [0] | R | 0x0 | IN Endpoint 0 Interrupt Bit
51949  * [1] | R | 0x0 | IN Endpoint 1 Interrupt Bit
51950  * [2] | R | 0x0 | IN Endpoint 2 Interrupt Bit
51951  * [3] | R | 0x0 | IN Endpoint 3 Interrupt Bit
51952  * [4] | R | 0x0 | IN Endpoint 4 Interrupt Bit
51953  * [5] | R | 0x0 | IN Endpoint 5 Interrupt Bit
51954  * [6] | R | 0x0 | IN Endpoint 6 Interrupt Bit
51955  * [7] | R | 0x0 | IN Endpoint 7 Interrupt Bit
51956  * [8] | R | 0x0 | IN Endpoint 8 Interrupt Bit
51957  * [9] | R | 0x0 | IN Endpoint 9 Interrupt Bit
51958  * [10] | R | 0x0 | IN Endpoint 10 Interrupt Bit
51959  * [11] | R | 0x0 | IN Endpoint 11 Interrupt Bit
51960  * [12] | R | 0x0 | IN Endpoint 12 Interrupt Bit
51961  * [13] | R | 0x0 | IN Endpoint 13 Interrupt Bit
51962  * [14] | R | 0x0 | IN Endpoint 14 Interrupt Bit
51963  * [15] | R | 0x0 | IN Endpoint 15 Interrupt Bit
51964  * [16] | R | 0x0 | OUT Endpoint 0 Interrupt Bit
51965  * [17] | R | 0x0 | OUT Endpoint 1 Interrupt Bi
51966  * [18] | R | 0x0 | OUT Endpoint 2 Interrupt Bit
51967  * [19] | R | 0x0 | OUT Endpoint 3 Interrupt Bit
51968  * [20] | R | 0x0 | OUT Endpoint 4 Interrupt Bit
51969  * [21] | R | 0x0 | OUT Endpoint 5 Interrupt Bit
51970  * [22] | R | 0x0 | OUT Endpoint 6 Interrupt Bi
51971  * [23] | R | 0x0 | OUT Endpoint 7 Interrupt Bit
51972  * [24] | R | 0x0 | OUT Endpoint 8 Interrupt Bit
51973  * [25] | R | 0x0 | OUT Endpoint 9 Interrupt Bit
51974  * [26] | R | 0x0 | OUT Endpoint 10 Interrupt Bit
51975  * [27] | R | 0x0 | OUT Endpoint 11 Interrupt Bit
51976  * [28] | R | 0x0 | OUT Endpoint 12 Interrupt Bit
51977  * [29] | R | 0x0 | OUT Endpoint 13 Interrupt Bit
51978  * [30] | R | 0x0 | OUT Endpoint 14 Interrupt Bi
51979  * [31] | R | 0x0 | OUT Endpoint 15 Interrupt Bit
51980  *
51981  */
51982 /*
51983  * Field : IN Endpoint 0 Interrupt Bit - inepint0
51984  *
51985  * Field Enumeration Values:
51986  *
51987  * Enum | Value | Description
51988  * :-----------------------------------|:------|:------------------------
51989  * ALT_USB_DEV_DAINT_INEPINT0_E_INACT | 0x0 | No Interrupt
51990  * ALT_USB_DEV_DAINT_INEPINT0_E_ACT | 0x1 | IN Endpoint 0 Interrupt
51991  *
51992  * Field Access Macros:
51993  *
51994  */
51995 /*
51996  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT0
51997  *
51998  * No Interrupt
51999  */
52000 #define ALT_USB_DEV_DAINT_INEPINT0_E_INACT 0x0
52001 /*
52002  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT0
52003  *
52004  * IN Endpoint 0 Interrupt
52005  */
52006 #define ALT_USB_DEV_DAINT_INEPINT0_E_ACT 0x1
52007 
52008 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT0 register field. */
52009 #define ALT_USB_DEV_DAINT_INEPINT0_LSB 0
52010 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT0 register field. */
52011 #define ALT_USB_DEV_DAINT_INEPINT0_MSB 0
52012 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT0 register field. */
52013 #define ALT_USB_DEV_DAINT_INEPINT0_WIDTH 1
52014 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT0 register field value. */
52015 #define ALT_USB_DEV_DAINT_INEPINT0_SET_MSK 0x00000001
52016 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT0 register field value. */
52017 #define ALT_USB_DEV_DAINT_INEPINT0_CLR_MSK 0xfffffffe
52018 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT0 register field. */
52019 #define ALT_USB_DEV_DAINT_INEPINT0_RESET 0x0
52020 /* Extracts the ALT_USB_DEV_DAINT_INEPINT0 field value from a register. */
52021 #define ALT_USB_DEV_DAINT_INEPINT0_GET(value) (((value) & 0x00000001) >> 0)
52022 /* Produces a ALT_USB_DEV_DAINT_INEPINT0 register field value suitable for setting the register. */
52023 #define ALT_USB_DEV_DAINT_INEPINT0_SET(value) (((value) << 0) & 0x00000001)
52024 
52025 /*
52026  * Field : IN Endpoint 1 Interrupt Bit - inepint1
52027  *
52028  * Field Enumeration Values:
52029  *
52030  * Enum | Value | Description
52031  * :-----------------------------------|:------|:------------------------
52032  * ALT_USB_DEV_DAINT_INEPINT1_E_INACT | 0x0 | No Interrupt
52033  * ALT_USB_DEV_DAINT_INEPINT1_E_ACT | 0x1 | IN Endpoint 1 Interrupt
52034  *
52035  * Field Access Macros:
52036  *
52037  */
52038 /*
52039  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT1
52040  *
52041  * No Interrupt
52042  */
52043 #define ALT_USB_DEV_DAINT_INEPINT1_E_INACT 0x0
52044 /*
52045  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT1
52046  *
52047  * IN Endpoint 1 Interrupt
52048  */
52049 #define ALT_USB_DEV_DAINT_INEPINT1_E_ACT 0x1
52050 
52051 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT1 register field. */
52052 #define ALT_USB_DEV_DAINT_INEPINT1_LSB 1
52053 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT1 register field. */
52054 #define ALT_USB_DEV_DAINT_INEPINT1_MSB 1
52055 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT1 register field. */
52056 #define ALT_USB_DEV_DAINT_INEPINT1_WIDTH 1
52057 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT1 register field value. */
52058 #define ALT_USB_DEV_DAINT_INEPINT1_SET_MSK 0x00000002
52059 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT1 register field value. */
52060 #define ALT_USB_DEV_DAINT_INEPINT1_CLR_MSK 0xfffffffd
52061 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT1 register field. */
52062 #define ALT_USB_DEV_DAINT_INEPINT1_RESET 0x0
52063 /* Extracts the ALT_USB_DEV_DAINT_INEPINT1 field value from a register. */
52064 #define ALT_USB_DEV_DAINT_INEPINT1_GET(value) (((value) & 0x00000002) >> 1)
52065 /* Produces a ALT_USB_DEV_DAINT_INEPINT1 register field value suitable for setting the register. */
52066 #define ALT_USB_DEV_DAINT_INEPINT1_SET(value) (((value) << 1) & 0x00000002)
52067 
52068 /*
52069  * Field : IN Endpoint 2 Interrupt Bit - inepint2
52070  *
52071  * Field Enumeration Values:
52072  *
52073  * Enum | Value | Description
52074  * :-----------------------------------|:------|:------------------------
52075  * ALT_USB_DEV_DAINT_INEPINT2_E_INACT | 0x0 | No Interrupt
52076  * ALT_USB_DEV_DAINT_INEPINT2_E_ACT | 0x1 | IN Endpoint 2 Interrupt
52077  *
52078  * Field Access Macros:
52079  *
52080  */
52081 /*
52082  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT2
52083  *
52084  * No Interrupt
52085  */
52086 #define ALT_USB_DEV_DAINT_INEPINT2_E_INACT 0x0
52087 /*
52088  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT2
52089  *
52090  * IN Endpoint 2 Interrupt
52091  */
52092 #define ALT_USB_DEV_DAINT_INEPINT2_E_ACT 0x1
52093 
52094 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT2 register field. */
52095 #define ALT_USB_DEV_DAINT_INEPINT2_LSB 2
52096 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT2 register field. */
52097 #define ALT_USB_DEV_DAINT_INEPINT2_MSB 2
52098 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT2 register field. */
52099 #define ALT_USB_DEV_DAINT_INEPINT2_WIDTH 1
52100 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT2 register field value. */
52101 #define ALT_USB_DEV_DAINT_INEPINT2_SET_MSK 0x00000004
52102 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT2 register field value. */
52103 #define ALT_USB_DEV_DAINT_INEPINT2_CLR_MSK 0xfffffffb
52104 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT2 register field. */
52105 #define ALT_USB_DEV_DAINT_INEPINT2_RESET 0x0
52106 /* Extracts the ALT_USB_DEV_DAINT_INEPINT2 field value from a register. */
52107 #define ALT_USB_DEV_DAINT_INEPINT2_GET(value) (((value) & 0x00000004) >> 2)
52108 /* Produces a ALT_USB_DEV_DAINT_INEPINT2 register field value suitable for setting the register. */
52109 #define ALT_USB_DEV_DAINT_INEPINT2_SET(value) (((value) << 2) & 0x00000004)
52110 
52111 /*
52112  * Field : IN Endpoint 3 Interrupt Bit - inepint3
52113  *
52114  * Field Enumeration Values:
52115  *
52116  * Enum | Value | Description
52117  * :-----------------------------------|:------|:------------------------
52118  * ALT_USB_DEV_DAINT_INEPINT3_E_INACT | 0x0 | No Interrupt
52119  * ALT_USB_DEV_DAINT_INEPINT3_E_ACT | 0x1 | IN Endpoint 3 Interrupt
52120  *
52121  * Field Access Macros:
52122  *
52123  */
52124 /*
52125  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT3
52126  *
52127  * No Interrupt
52128  */
52129 #define ALT_USB_DEV_DAINT_INEPINT3_E_INACT 0x0
52130 /*
52131  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT3
52132  *
52133  * IN Endpoint 3 Interrupt
52134  */
52135 #define ALT_USB_DEV_DAINT_INEPINT3_E_ACT 0x1
52136 
52137 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT3 register field. */
52138 #define ALT_USB_DEV_DAINT_INEPINT3_LSB 3
52139 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT3 register field. */
52140 #define ALT_USB_DEV_DAINT_INEPINT3_MSB 3
52141 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT3 register field. */
52142 #define ALT_USB_DEV_DAINT_INEPINT3_WIDTH 1
52143 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT3 register field value. */
52144 #define ALT_USB_DEV_DAINT_INEPINT3_SET_MSK 0x00000008
52145 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT3 register field value. */
52146 #define ALT_USB_DEV_DAINT_INEPINT3_CLR_MSK 0xfffffff7
52147 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT3 register field. */
52148 #define ALT_USB_DEV_DAINT_INEPINT3_RESET 0x0
52149 /* Extracts the ALT_USB_DEV_DAINT_INEPINT3 field value from a register. */
52150 #define ALT_USB_DEV_DAINT_INEPINT3_GET(value) (((value) & 0x00000008) >> 3)
52151 /* Produces a ALT_USB_DEV_DAINT_INEPINT3 register field value suitable for setting the register. */
52152 #define ALT_USB_DEV_DAINT_INEPINT3_SET(value) (((value) << 3) & 0x00000008)
52153 
52154 /*
52155  * Field : IN Endpoint 4 Interrupt Bit - inepint4
52156  *
52157  * Field Enumeration Values:
52158  *
52159  * Enum | Value | Description
52160  * :-----------------------------------|:------|:------------------------
52161  * ALT_USB_DEV_DAINT_INEPINT4_E_INACT | 0x0 | No Interrupt
52162  * ALT_USB_DEV_DAINT_INEPINT4_E_ACT | 0x1 | IN Endpoint 4 Interrupt
52163  *
52164  * Field Access Macros:
52165  *
52166  */
52167 /*
52168  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT4
52169  *
52170  * No Interrupt
52171  */
52172 #define ALT_USB_DEV_DAINT_INEPINT4_E_INACT 0x0
52173 /*
52174  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT4
52175  *
52176  * IN Endpoint 4 Interrupt
52177  */
52178 #define ALT_USB_DEV_DAINT_INEPINT4_E_ACT 0x1
52179 
52180 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT4 register field. */
52181 #define ALT_USB_DEV_DAINT_INEPINT4_LSB 4
52182 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT4 register field. */
52183 #define ALT_USB_DEV_DAINT_INEPINT4_MSB 4
52184 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT4 register field. */
52185 #define ALT_USB_DEV_DAINT_INEPINT4_WIDTH 1
52186 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT4 register field value. */
52187 #define ALT_USB_DEV_DAINT_INEPINT4_SET_MSK 0x00000010
52188 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT4 register field value. */
52189 #define ALT_USB_DEV_DAINT_INEPINT4_CLR_MSK 0xffffffef
52190 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT4 register field. */
52191 #define ALT_USB_DEV_DAINT_INEPINT4_RESET 0x0
52192 /* Extracts the ALT_USB_DEV_DAINT_INEPINT4 field value from a register. */
52193 #define ALT_USB_DEV_DAINT_INEPINT4_GET(value) (((value) & 0x00000010) >> 4)
52194 /* Produces a ALT_USB_DEV_DAINT_INEPINT4 register field value suitable for setting the register. */
52195 #define ALT_USB_DEV_DAINT_INEPINT4_SET(value) (((value) << 4) & 0x00000010)
52196 
52197 /*
52198  * Field : IN Endpoint 5 Interrupt Bit - inepint5
52199  *
52200  * Field Enumeration Values:
52201  *
52202  * Enum | Value | Description
52203  * :-----------------------------------|:------|:------------------------
52204  * ALT_USB_DEV_DAINT_INEPINT5_E_INACT | 0x0 | No Interrupt
52205  * ALT_USB_DEV_DAINT_INEPINT5_E_ACT | 0x1 | IN Endpoint 5 Interrupt
52206  *
52207  * Field Access Macros:
52208  *
52209  */
52210 /*
52211  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT5
52212  *
52213  * No Interrupt
52214  */
52215 #define ALT_USB_DEV_DAINT_INEPINT5_E_INACT 0x0
52216 /*
52217  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT5
52218  *
52219  * IN Endpoint 5 Interrupt
52220  */
52221 #define ALT_USB_DEV_DAINT_INEPINT5_E_ACT 0x1
52222 
52223 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT5 register field. */
52224 #define ALT_USB_DEV_DAINT_INEPINT5_LSB 5
52225 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT5 register field. */
52226 #define ALT_USB_DEV_DAINT_INEPINT5_MSB 5
52227 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT5 register field. */
52228 #define ALT_USB_DEV_DAINT_INEPINT5_WIDTH 1
52229 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT5 register field value. */
52230 #define ALT_USB_DEV_DAINT_INEPINT5_SET_MSK 0x00000020
52231 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT5 register field value. */
52232 #define ALT_USB_DEV_DAINT_INEPINT5_CLR_MSK 0xffffffdf
52233 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT5 register field. */
52234 #define ALT_USB_DEV_DAINT_INEPINT5_RESET 0x0
52235 /* Extracts the ALT_USB_DEV_DAINT_INEPINT5 field value from a register. */
52236 #define ALT_USB_DEV_DAINT_INEPINT5_GET(value) (((value) & 0x00000020) >> 5)
52237 /* Produces a ALT_USB_DEV_DAINT_INEPINT5 register field value suitable for setting the register. */
52238 #define ALT_USB_DEV_DAINT_INEPINT5_SET(value) (((value) << 5) & 0x00000020)
52239 
52240 /*
52241  * Field : IN Endpoint 6 Interrupt Bit - inepint6
52242  *
52243  * Field Enumeration Values:
52244  *
52245  * Enum | Value | Description
52246  * :-----------------------------------|:------|:------------------------
52247  * ALT_USB_DEV_DAINT_INEPINT6_E_INACT | 0x0 | No Interrupt
52248  * ALT_USB_DEV_DAINT_INEPINT6_E_ACT | 0x1 | IN Endpoint 6 Interrupt
52249  *
52250  * Field Access Macros:
52251  *
52252  */
52253 /*
52254  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT6
52255  *
52256  * No Interrupt
52257  */
52258 #define ALT_USB_DEV_DAINT_INEPINT6_E_INACT 0x0
52259 /*
52260  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT6
52261  *
52262  * IN Endpoint 6 Interrupt
52263  */
52264 #define ALT_USB_DEV_DAINT_INEPINT6_E_ACT 0x1
52265 
52266 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT6 register field. */
52267 #define ALT_USB_DEV_DAINT_INEPINT6_LSB 6
52268 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT6 register field. */
52269 #define ALT_USB_DEV_DAINT_INEPINT6_MSB 6
52270 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT6 register field. */
52271 #define ALT_USB_DEV_DAINT_INEPINT6_WIDTH 1
52272 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT6 register field value. */
52273 #define ALT_USB_DEV_DAINT_INEPINT6_SET_MSK 0x00000040
52274 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT6 register field value. */
52275 #define ALT_USB_DEV_DAINT_INEPINT6_CLR_MSK 0xffffffbf
52276 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT6 register field. */
52277 #define ALT_USB_DEV_DAINT_INEPINT6_RESET 0x0
52278 /* Extracts the ALT_USB_DEV_DAINT_INEPINT6 field value from a register. */
52279 #define ALT_USB_DEV_DAINT_INEPINT6_GET(value) (((value) & 0x00000040) >> 6)
52280 /* Produces a ALT_USB_DEV_DAINT_INEPINT6 register field value suitable for setting the register. */
52281 #define ALT_USB_DEV_DAINT_INEPINT6_SET(value) (((value) << 6) & 0x00000040)
52282 
52283 /*
52284  * Field : IN Endpoint 7 Interrupt Bit - inepint7
52285  *
52286  * Field Enumeration Values:
52287  *
52288  * Enum | Value | Description
52289  * :-----------------------------------|:------|:------------------------
52290  * ALT_USB_DEV_DAINT_INEPINT7_E_INACT | 0x0 | No Interrupt
52291  * ALT_USB_DEV_DAINT_INEPINT7_E_ACT | 0x1 | IN Endpoint 7 Interrupt
52292  *
52293  * Field Access Macros:
52294  *
52295  */
52296 /*
52297  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT7
52298  *
52299  * No Interrupt
52300  */
52301 #define ALT_USB_DEV_DAINT_INEPINT7_E_INACT 0x0
52302 /*
52303  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT7
52304  *
52305  * IN Endpoint 7 Interrupt
52306  */
52307 #define ALT_USB_DEV_DAINT_INEPINT7_E_ACT 0x1
52308 
52309 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT7 register field. */
52310 #define ALT_USB_DEV_DAINT_INEPINT7_LSB 7
52311 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT7 register field. */
52312 #define ALT_USB_DEV_DAINT_INEPINT7_MSB 7
52313 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT7 register field. */
52314 #define ALT_USB_DEV_DAINT_INEPINT7_WIDTH 1
52315 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT7 register field value. */
52316 #define ALT_USB_DEV_DAINT_INEPINT7_SET_MSK 0x00000080
52317 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT7 register field value. */
52318 #define ALT_USB_DEV_DAINT_INEPINT7_CLR_MSK 0xffffff7f
52319 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT7 register field. */
52320 #define ALT_USB_DEV_DAINT_INEPINT7_RESET 0x0
52321 /* Extracts the ALT_USB_DEV_DAINT_INEPINT7 field value from a register. */
52322 #define ALT_USB_DEV_DAINT_INEPINT7_GET(value) (((value) & 0x00000080) >> 7)
52323 /* Produces a ALT_USB_DEV_DAINT_INEPINT7 register field value suitable for setting the register. */
52324 #define ALT_USB_DEV_DAINT_INEPINT7_SET(value) (((value) << 7) & 0x00000080)
52325 
52326 /*
52327  * Field : IN Endpoint 8 Interrupt Bit - inepint8
52328  *
52329  * Field Enumeration Values:
52330  *
52331  * Enum | Value | Description
52332  * :-----------------------------------|:------|:------------------------
52333  * ALT_USB_DEV_DAINT_INEPINT8_E_INACT | 0x0 | No Interrupt
52334  * ALT_USB_DEV_DAINT_INEPINT8_E_ACT | 0x1 | IN Endpoint 8 Interrupt
52335  *
52336  * Field Access Macros:
52337  *
52338  */
52339 /*
52340  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT8
52341  *
52342  * No Interrupt
52343  */
52344 #define ALT_USB_DEV_DAINT_INEPINT8_E_INACT 0x0
52345 /*
52346  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT8
52347  *
52348  * IN Endpoint 8 Interrupt
52349  */
52350 #define ALT_USB_DEV_DAINT_INEPINT8_E_ACT 0x1
52351 
52352 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT8 register field. */
52353 #define ALT_USB_DEV_DAINT_INEPINT8_LSB 8
52354 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT8 register field. */
52355 #define ALT_USB_DEV_DAINT_INEPINT8_MSB 8
52356 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT8 register field. */
52357 #define ALT_USB_DEV_DAINT_INEPINT8_WIDTH 1
52358 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT8 register field value. */
52359 #define ALT_USB_DEV_DAINT_INEPINT8_SET_MSK 0x00000100
52360 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT8 register field value. */
52361 #define ALT_USB_DEV_DAINT_INEPINT8_CLR_MSK 0xfffffeff
52362 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT8 register field. */
52363 #define ALT_USB_DEV_DAINT_INEPINT8_RESET 0x0
52364 /* Extracts the ALT_USB_DEV_DAINT_INEPINT8 field value from a register. */
52365 #define ALT_USB_DEV_DAINT_INEPINT8_GET(value) (((value) & 0x00000100) >> 8)
52366 /* Produces a ALT_USB_DEV_DAINT_INEPINT8 register field value suitable for setting the register. */
52367 #define ALT_USB_DEV_DAINT_INEPINT8_SET(value) (((value) << 8) & 0x00000100)
52368 
52369 /*
52370  * Field : IN Endpoint 9 Interrupt Bit - inepint9
52371  *
52372  * Field Enumeration Values:
52373  *
52374  * Enum | Value | Description
52375  * :-----------------------------------|:------|:------------------------
52376  * ALT_USB_DEV_DAINT_INEPINT9_E_INACT | 0x0 | No Interrupt
52377  * ALT_USB_DEV_DAINT_INEPINT9_E_ACT | 0x1 | IN Endpoint 9 Interrupt
52378  *
52379  * Field Access Macros:
52380  *
52381  */
52382 /*
52383  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT9
52384  *
52385  * No Interrupt
52386  */
52387 #define ALT_USB_DEV_DAINT_INEPINT9_E_INACT 0x0
52388 /*
52389  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT9
52390  *
52391  * IN Endpoint 9 Interrupt
52392  */
52393 #define ALT_USB_DEV_DAINT_INEPINT9_E_ACT 0x1
52394 
52395 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT9 register field. */
52396 #define ALT_USB_DEV_DAINT_INEPINT9_LSB 9
52397 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT9 register field. */
52398 #define ALT_USB_DEV_DAINT_INEPINT9_MSB 9
52399 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT9 register field. */
52400 #define ALT_USB_DEV_DAINT_INEPINT9_WIDTH 1
52401 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT9 register field value. */
52402 #define ALT_USB_DEV_DAINT_INEPINT9_SET_MSK 0x00000200
52403 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT9 register field value. */
52404 #define ALT_USB_DEV_DAINT_INEPINT9_CLR_MSK 0xfffffdff
52405 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT9 register field. */
52406 #define ALT_USB_DEV_DAINT_INEPINT9_RESET 0x0
52407 /* Extracts the ALT_USB_DEV_DAINT_INEPINT9 field value from a register. */
52408 #define ALT_USB_DEV_DAINT_INEPINT9_GET(value) (((value) & 0x00000200) >> 9)
52409 /* Produces a ALT_USB_DEV_DAINT_INEPINT9 register field value suitable for setting the register. */
52410 #define ALT_USB_DEV_DAINT_INEPINT9_SET(value) (((value) << 9) & 0x00000200)
52411 
52412 /*
52413  * Field : IN Endpoint 10 Interrupt Bit - inepint10
52414  *
52415  * Field Enumeration Values:
52416  *
52417  * Enum | Value | Description
52418  * :------------------------------------|:------|:-------------------------
52419  * ALT_USB_DEV_DAINT_INEPINT10_E_INACT | 0x0 | No Interrupt
52420  * ALT_USB_DEV_DAINT_INEPINT10_E_ACT | 0x1 | IN Endpoint 10 Interrupt
52421  *
52422  * Field Access Macros:
52423  *
52424  */
52425 /*
52426  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT10
52427  *
52428  * No Interrupt
52429  */
52430 #define ALT_USB_DEV_DAINT_INEPINT10_E_INACT 0x0
52431 /*
52432  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT10
52433  *
52434  * IN Endpoint 10 Interrupt
52435  */
52436 #define ALT_USB_DEV_DAINT_INEPINT10_E_ACT 0x1
52437 
52438 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT10 register field. */
52439 #define ALT_USB_DEV_DAINT_INEPINT10_LSB 10
52440 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT10 register field. */
52441 #define ALT_USB_DEV_DAINT_INEPINT10_MSB 10
52442 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT10 register field. */
52443 #define ALT_USB_DEV_DAINT_INEPINT10_WIDTH 1
52444 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT10 register field value. */
52445 #define ALT_USB_DEV_DAINT_INEPINT10_SET_MSK 0x00000400
52446 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT10 register field value. */
52447 #define ALT_USB_DEV_DAINT_INEPINT10_CLR_MSK 0xfffffbff
52448 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT10 register field. */
52449 #define ALT_USB_DEV_DAINT_INEPINT10_RESET 0x0
52450 /* Extracts the ALT_USB_DEV_DAINT_INEPINT10 field value from a register. */
52451 #define ALT_USB_DEV_DAINT_INEPINT10_GET(value) (((value) & 0x00000400) >> 10)
52452 /* Produces a ALT_USB_DEV_DAINT_INEPINT10 register field value suitable for setting the register. */
52453 #define ALT_USB_DEV_DAINT_INEPINT10_SET(value) (((value) << 10) & 0x00000400)
52454 
52455 /*
52456  * Field : IN Endpoint 11 Interrupt Bit - inepint11
52457  *
52458  * Field Enumeration Values:
52459  *
52460  * Enum | Value | Description
52461  * :------------------------------------|:------|:-------------------------
52462  * ALT_USB_DEV_DAINT_INEPINT11_E_INACT | 0x0 | No Interrupt
52463  * ALT_USB_DEV_DAINT_INEPINT11_E_ACT | 0x1 | IN Endpoint 11 Interrupt
52464  *
52465  * Field Access Macros:
52466  *
52467  */
52468 /*
52469  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT11
52470  *
52471  * No Interrupt
52472  */
52473 #define ALT_USB_DEV_DAINT_INEPINT11_E_INACT 0x0
52474 /*
52475  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT11
52476  *
52477  * IN Endpoint 11 Interrupt
52478  */
52479 #define ALT_USB_DEV_DAINT_INEPINT11_E_ACT 0x1
52480 
52481 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT11 register field. */
52482 #define ALT_USB_DEV_DAINT_INEPINT11_LSB 11
52483 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT11 register field. */
52484 #define ALT_USB_DEV_DAINT_INEPINT11_MSB 11
52485 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT11 register field. */
52486 #define ALT_USB_DEV_DAINT_INEPINT11_WIDTH 1
52487 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT11 register field value. */
52488 #define ALT_USB_DEV_DAINT_INEPINT11_SET_MSK 0x00000800
52489 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT11 register field value. */
52490 #define ALT_USB_DEV_DAINT_INEPINT11_CLR_MSK 0xfffff7ff
52491 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT11 register field. */
52492 #define ALT_USB_DEV_DAINT_INEPINT11_RESET 0x0
52493 /* Extracts the ALT_USB_DEV_DAINT_INEPINT11 field value from a register. */
52494 #define ALT_USB_DEV_DAINT_INEPINT11_GET(value) (((value) & 0x00000800) >> 11)
52495 /* Produces a ALT_USB_DEV_DAINT_INEPINT11 register field value suitable for setting the register. */
52496 #define ALT_USB_DEV_DAINT_INEPINT11_SET(value) (((value) << 11) & 0x00000800)
52497 
52498 /*
52499  * Field : IN Endpoint 12 Interrupt Bit - inepint12
52500  *
52501  * Field Enumeration Values:
52502  *
52503  * Enum | Value | Description
52504  * :------------------------------------|:------|:-------------------------
52505  * ALT_USB_DEV_DAINT_INEPINT12_E_INACT | 0x0 | No Interrupt
52506  * ALT_USB_DEV_DAINT_INEPINT12_E_ACT | 0x1 | IN Endpoint 12 Interrupt
52507  *
52508  * Field Access Macros:
52509  *
52510  */
52511 /*
52512  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT12
52513  *
52514  * No Interrupt
52515  */
52516 #define ALT_USB_DEV_DAINT_INEPINT12_E_INACT 0x0
52517 /*
52518  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT12
52519  *
52520  * IN Endpoint 12 Interrupt
52521  */
52522 #define ALT_USB_DEV_DAINT_INEPINT12_E_ACT 0x1
52523 
52524 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT12 register field. */
52525 #define ALT_USB_DEV_DAINT_INEPINT12_LSB 12
52526 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT12 register field. */
52527 #define ALT_USB_DEV_DAINT_INEPINT12_MSB 12
52528 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT12 register field. */
52529 #define ALT_USB_DEV_DAINT_INEPINT12_WIDTH 1
52530 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT12 register field value. */
52531 #define ALT_USB_DEV_DAINT_INEPINT12_SET_MSK 0x00001000
52532 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT12 register field value. */
52533 #define ALT_USB_DEV_DAINT_INEPINT12_CLR_MSK 0xffffefff
52534 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT12 register field. */
52535 #define ALT_USB_DEV_DAINT_INEPINT12_RESET 0x0
52536 /* Extracts the ALT_USB_DEV_DAINT_INEPINT12 field value from a register. */
52537 #define ALT_USB_DEV_DAINT_INEPINT12_GET(value) (((value) & 0x00001000) >> 12)
52538 /* Produces a ALT_USB_DEV_DAINT_INEPINT12 register field value suitable for setting the register. */
52539 #define ALT_USB_DEV_DAINT_INEPINT12_SET(value) (((value) << 12) & 0x00001000)
52540 
52541 /*
52542  * Field : IN Endpoint 13 Interrupt Bit - inepint13
52543  *
52544  * Field Enumeration Values:
52545  *
52546  * Enum | Value | Description
52547  * :------------------------------------|:------|:-------------------------
52548  * ALT_USB_DEV_DAINT_INEPINT13_E_INACT | 0x0 | No Interrupt
52549  * ALT_USB_DEV_DAINT_INEPINT13_E_ACT | 0x1 | IN Endpoint 13 Interrupt
52550  *
52551  * Field Access Macros:
52552  *
52553  */
52554 /*
52555  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT13
52556  *
52557  * No Interrupt
52558  */
52559 #define ALT_USB_DEV_DAINT_INEPINT13_E_INACT 0x0
52560 /*
52561  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT13
52562  *
52563  * IN Endpoint 13 Interrupt
52564  */
52565 #define ALT_USB_DEV_DAINT_INEPINT13_E_ACT 0x1
52566 
52567 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT13 register field. */
52568 #define ALT_USB_DEV_DAINT_INEPINT13_LSB 13
52569 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT13 register field. */
52570 #define ALT_USB_DEV_DAINT_INEPINT13_MSB 13
52571 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT13 register field. */
52572 #define ALT_USB_DEV_DAINT_INEPINT13_WIDTH 1
52573 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT13 register field value. */
52574 #define ALT_USB_DEV_DAINT_INEPINT13_SET_MSK 0x00002000
52575 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT13 register field value. */
52576 #define ALT_USB_DEV_DAINT_INEPINT13_CLR_MSK 0xffffdfff
52577 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT13 register field. */
52578 #define ALT_USB_DEV_DAINT_INEPINT13_RESET 0x0
52579 /* Extracts the ALT_USB_DEV_DAINT_INEPINT13 field value from a register. */
52580 #define ALT_USB_DEV_DAINT_INEPINT13_GET(value) (((value) & 0x00002000) >> 13)
52581 /* Produces a ALT_USB_DEV_DAINT_INEPINT13 register field value suitable for setting the register. */
52582 #define ALT_USB_DEV_DAINT_INEPINT13_SET(value) (((value) << 13) & 0x00002000)
52583 
52584 /*
52585  * Field : IN Endpoint 14 Interrupt Bit - inepint14
52586  *
52587  * Field Enumeration Values:
52588  *
52589  * Enum | Value | Description
52590  * :------------------------------------|:------|:-------------------------
52591  * ALT_USB_DEV_DAINT_INEPINT14_E_INACT | 0x0 | No Interrupt
52592  * ALT_USB_DEV_DAINT_INEPINT14_E_ACT | 0x1 | IN Endpoint 14 Interrupt
52593  *
52594  * Field Access Macros:
52595  *
52596  */
52597 /*
52598  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT14
52599  *
52600  * No Interrupt
52601  */
52602 #define ALT_USB_DEV_DAINT_INEPINT14_E_INACT 0x0
52603 /*
52604  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT14
52605  *
52606  * IN Endpoint 14 Interrupt
52607  */
52608 #define ALT_USB_DEV_DAINT_INEPINT14_E_ACT 0x1
52609 
52610 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT14 register field. */
52611 #define ALT_USB_DEV_DAINT_INEPINT14_LSB 14
52612 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT14 register field. */
52613 #define ALT_USB_DEV_DAINT_INEPINT14_MSB 14
52614 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT14 register field. */
52615 #define ALT_USB_DEV_DAINT_INEPINT14_WIDTH 1
52616 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT14 register field value. */
52617 #define ALT_USB_DEV_DAINT_INEPINT14_SET_MSK 0x00004000
52618 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT14 register field value. */
52619 #define ALT_USB_DEV_DAINT_INEPINT14_CLR_MSK 0xffffbfff
52620 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT14 register field. */
52621 #define ALT_USB_DEV_DAINT_INEPINT14_RESET 0x0
52622 /* Extracts the ALT_USB_DEV_DAINT_INEPINT14 field value from a register. */
52623 #define ALT_USB_DEV_DAINT_INEPINT14_GET(value) (((value) & 0x00004000) >> 14)
52624 /* Produces a ALT_USB_DEV_DAINT_INEPINT14 register field value suitable for setting the register. */
52625 #define ALT_USB_DEV_DAINT_INEPINT14_SET(value) (((value) << 14) & 0x00004000)
52626 
52627 /*
52628  * Field : IN Endpoint 15 Interrupt Bit - inepint15
52629  *
52630  * Field Enumeration Values:
52631  *
52632  * Enum | Value | Description
52633  * :------------------------------------|:------|:-------------------------
52634  * ALT_USB_DEV_DAINT_INEPINT15_E_INACT | 0x0 | No Interrupt
52635  * ALT_USB_DEV_DAINT_INEPINT15_E_ACT | 0x1 | IN Endpoint 15 Interrupt
52636  *
52637  * Field Access Macros:
52638  *
52639  */
52640 /*
52641  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT15
52642  *
52643  * No Interrupt
52644  */
52645 #define ALT_USB_DEV_DAINT_INEPINT15_E_INACT 0x0
52646 /*
52647  * Enumerated value for register field ALT_USB_DEV_DAINT_INEPINT15
52648  *
52649  * IN Endpoint 15 Interrupt
52650  */
52651 #define ALT_USB_DEV_DAINT_INEPINT15_E_ACT 0x1
52652 
52653 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_INEPINT15 register field. */
52654 #define ALT_USB_DEV_DAINT_INEPINT15_LSB 15
52655 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_INEPINT15 register field. */
52656 #define ALT_USB_DEV_DAINT_INEPINT15_MSB 15
52657 /* The width in bits of the ALT_USB_DEV_DAINT_INEPINT15 register field. */
52658 #define ALT_USB_DEV_DAINT_INEPINT15_WIDTH 1
52659 /* The mask used to set the ALT_USB_DEV_DAINT_INEPINT15 register field value. */
52660 #define ALT_USB_DEV_DAINT_INEPINT15_SET_MSK 0x00008000
52661 /* The mask used to clear the ALT_USB_DEV_DAINT_INEPINT15 register field value. */
52662 #define ALT_USB_DEV_DAINT_INEPINT15_CLR_MSK 0xffff7fff
52663 /* The reset value of the ALT_USB_DEV_DAINT_INEPINT15 register field. */
52664 #define ALT_USB_DEV_DAINT_INEPINT15_RESET 0x0
52665 /* Extracts the ALT_USB_DEV_DAINT_INEPINT15 field value from a register. */
52666 #define ALT_USB_DEV_DAINT_INEPINT15_GET(value) (((value) & 0x00008000) >> 15)
52667 /* Produces a ALT_USB_DEV_DAINT_INEPINT15 register field value suitable for setting the register. */
52668 #define ALT_USB_DEV_DAINT_INEPINT15_SET(value) (((value) << 15) & 0x00008000)
52669 
52670 /*
52671  * Field : OUT Endpoint 0 Interrupt Bit - outepint0
52672  *
52673  * Field Enumeration Values:
52674  *
52675  * Enum | Value | Description
52676  * :------------------------------------|:------|:-------------------------
52677  * ALT_USB_DEV_DAINT_OUTEPINT0_E_INACT | 0x0 | No Interrupt
52678  * ALT_USB_DEV_DAINT_OUTEPINT0_E_ACT | 0x1 | OUT Endpoint 0 Interrupt
52679  *
52680  * Field Access Macros:
52681  *
52682  */
52683 /*
52684  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT0
52685  *
52686  * No Interrupt
52687  */
52688 #define ALT_USB_DEV_DAINT_OUTEPINT0_E_INACT 0x0
52689 /*
52690  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT0
52691  *
52692  * OUT Endpoint 0 Interrupt
52693  */
52694 #define ALT_USB_DEV_DAINT_OUTEPINT0_E_ACT 0x1
52695 
52696 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT0 register field. */
52697 #define ALT_USB_DEV_DAINT_OUTEPINT0_LSB 16
52698 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT0 register field. */
52699 #define ALT_USB_DEV_DAINT_OUTEPINT0_MSB 16
52700 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT0 register field. */
52701 #define ALT_USB_DEV_DAINT_OUTEPINT0_WIDTH 1
52702 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT0 register field value. */
52703 #define ALT_USB_DEV_DAINT_OUTEPINT0_SET_MSK 0x00010000
52704 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT0 register field value. */
52705 #define ALT_USB_DEV_DAINT_OUTEPINT0_CLR_MSK 0xfffeffff
52706 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT0 register field. */
52707 #define ALT_USB_DEV_DAINT_OUTEPINT0_RESET 0x0
52708 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT0 field value from a register. */
52709 #define ALT_USB_DEV_DAINT_OUTEPINT0_GET(value) (((value) & 0x00010000) >> 16)
52710 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT0 register field value suitable for setting the register. */
52711 #define ALT_USB_DEV_DAINT_OUTEPINT0_SET(value) (((value) << 16) & 0x00010000)
52712 
52713 /*
52714  * Field : OUT Endpoint 1 Interrupt Bi - outepint1
52715  *
52716  * Field Enumeration Values:
52717  *
52718  * Enum | Value | Description
52719  * :------------------------------------|:------|:-------------------------
52720  * ALT_USB_DEV_DAINT_OUTEPINT1_E_INACT | 0x0 | No Interrupt
52721  * ALT_USB_DEV_DAINT_OUTEPINT1_E_ACT | 0x1 | OUT Endpoint 1 Interrupt
52722  *
52723  * Field Access Macros:
52724  *
52725  */
52726 /*
52727  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT1
52728  *
52729  * No Interrupt
52730  */
52731 #define ALT_USB_DEV_DAINT_OUTEPINT1_E_INACT 0x0
52732 /*
52733  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT1
52734  *
52735  * OUT Endpoint 1 Interrupt
52736  */
52737 #define ALT_USB_DEV_DAINT_OUTEPINT1_E_ACT 0x1
52738 
52739 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT1 register field. */
52740 #define ALT_USB_DEV_DAINT_OUTEPINT1_LSB 17
52741 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT1 register field. */
52742 #define ALT_USB_DEV_DAINT_OUTEPINT1_MSB 17
52743 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT1 register field. */
52744 #define ALT_USB_DEV_DAINT_OUTEPINT1_WIDTH 1
52745 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT1 register field value. */
52746 #define ALT_USB_DEV_DAINT_OUTEPINT1_SET_MSK 0x00020000
52747 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT1 register field value. */
52748 #define ALT_USB_DEV_DAINT_OUTEPINT1_CLR_MSK 0xfffdffff
52749 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT1 register field. */
52750 #define ALT_USB_DEV_DAINT_OUTEPINT1_RESET 0x0
52751 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT1 field value from a register. */
52752 #define ALT_USB_DEV_DAINT_OUTEPINT1_GET(value) (((value) & 0x00020000) >> 17)
52753 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT1 register field value suitable for setting the register. */
52754 #define ALT_USB_DEV_DAINT_OUTEPINT1_SET(value) (((value) << 17) & 0x00020000)
52755 
52756 /*
52757  * Field : OUT Endpoint 2 Interrupt Bit - outepint2
52758  *
52759  * Field Enumeration Values:
52760  *
52761  * Enum | Value | Description
52762  * :------------------------------------|:------|:-------------------------
52763  * ALT_USB_DEV_DAINT_OUTEPINT2_E_INACT | 0x0 | No Interrupt
52764  * ALT_USB_DEV_DAINT_OUTEPINT2_E_ACT | 0x1 | OUT Endpoint 2 Interrupt
52765  *
52766  * Field Access Macros:
52767  *
52768  */
52769 /*
52770  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT2
52771  *
52772  * No Interrupt
52773  */
52774 #define ALT_USB_DEV_DAINT_OUTEPINT2_E_INACT 0x0
52775 /*
52776  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT2
52777  *
52778  * OUT Endpoint 2 Interrupt
52779  */
52780 #define ALT_USB_DEV_DAINT_OUTEPINT2_E_ACT 0x1
52781 
52782 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT2 register field. */
52783 #define ALT_USB_DEV_DAINT_OUTEPINT2_LSB 18
52784 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT2 register field. */
52785 #define ALT_USB_DEV_DAINT_OUTEPINT2_MSB 18
52786 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT2 register field. */
52787 #define ALT_USB_DEV_DAINT_OUTEPINT2_WIDTH 1
52788 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT2 register field value. */
52789 #define ALT_USB_DEV_DAINT_OUTEPINT2_SET_MSK 0x00040000
52790 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT2 register field value. */
52791 #define ALT_USB_DEV_DAINT_OUTEPINT2_CLR_MSK 0xfffbffff
52792 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT2 register field. */
52793 #define ALT_USB_DEV_DAINT_OUTEPINT2_RESET 0x0
52794 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT2 field value from a register. */
52795 #define ALT_USB_DEV_DAINT_OUTEPINT2_GET(value) (((value) & 0x00040000) >> 18)
52796 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT2 register field value suitable for setting the register. */
52797 #define ALT_USB_DEV_DAINT_OUTEPINT2_SET(value) (((value) << 18) & 0x00040000)
52798 
52799 /*
52800  * Field : OUT Endpoint 3 Interrupt Bit - outepint3
52801  *
52802  * Field Enumeration Values:
52803  *
52804  * Enum | Value | Description
52805  * :------------------------------------|:------|:-------------------------
52806  * ALT_USB_DEV_DAINT_OUTEPINT3_E_INACT | 0x0 | No Interrupt
52807  * ALT_USB_DEV_DAINT_OUTEPINT3_E_ACT | 0x1 | OUT Endpoint 3 Interrupt
52808  *
52809  * Field Access Macros:
52810  *
52811  */
52812 /*
52813  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT3
52814  *
52815  * No Interrupt
52816  */
52817 #define ALT_USB_DEV_DAINT_OUTEPINT3_E_INACT 0x0
52818 /*
52819  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT3
52820  *
52821  * OUT Endpoint 3 Interrupt
52822  */
52823 #define ALT_USB_DEV_DAINT_OUTEPINT3_E_ACT 0x1
52824 
52825 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT3 register field. */
52826 #define ALT_USB_DEV_DAINT_OUTEPINT3_LSB 19
52827 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT3 register field. */
52828 #define ALT_USB_DEV_DAINT_OUTEPINT3_MSB 19
52829 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT3 register field. */
52830 #define ALT_USB_DEV_DAINT_OUTEPINT3_WIDTH 1
52831 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT3 register field value. */
52832 #define ALT_USB_DEV_DAINT_OUTEPINT3_SET_MSK 0x00080000
52833 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT3 register field value. */
52834 #define ALT_USB_DEV_DAINT_OUTEPINT3_CLR_MSK 0xfff7ffff
52835 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT3 register field. */
52836 #define ALT_USB_DEV_DAINT_OUTEPINT3_RESET 0x0
52837 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT3 field value from a register. */
52838 #define ALT_USB_DEV_DAINT_OUTEPINT3_GET(value) (((value) & 0x00080000) >> 19)
52839 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT3 register field value suitable for setting the register. */
52840 #define ALT_USB_DEV_DAINT_OUTEPINT3_SET(value) (((value) << 19) & 0x00080000)
52841 
52842 /*
52843  * Field : OUT Endpoint 4 Interrupt Bit - outepint4
52844  *
52845  * Field Enumeration Values:
52846  *
52847  * Enum | Value | Description
52848  * :------------------------------------|:------|:-------------------------
52849  * ALT_USB_DEV_DAINT_OUTEPINT4_E_INACT | 0x0 | No Interrupt
52850  * ALT_USB_DEV_DAINT_OUTEPINT4_E_ACT | 0x1 | OUT Endpoint 4 Interrupt
52851  *
52852  * Field Access Macros:
52853  *
52854  */
52855 /*
52856  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT4
52857  *
52858  * No Interrupt
52859  */
52860 #define ALT_USB_DEV_DAINT_OUTEPINT4_E_INACT 0x0
52861 /*
52862  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT4
52863  *
52864  * OUT Endpoint 4 Interrupt
52865  */
52866 #define ALT_USB_DEV_DAINT_OUTEPINT4_E_ACT 0x1
52867 
52868 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT4 register field. */
52869 #define ALT_USB_DEV_DAINT_OUTEPINT4_LSB 20
52870 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT4 register field. */
52871 #define ALT_USB_DEV_DAINT_OUTEPINT4_MSB 20
52872 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT4 register field. */
52873 #define ALT_USB_DEV_DAINT_OUTEPINT4_WIDTH 1
52874 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT4 register field value. */
52875 #define ALT_USB_DEV_DAINT_OUTEPINT4_SET_MSK 0x00100000
52876 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT4 register field value. */
52877 #define ALT_USB_DEV_DAINT_OUTEPINT4_CLR_MSK 0xffefffff
52878 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT4 register field. */
52879 #define ALT_USB_DEV_DAINT_OUTEPINT4_RESET 0x0
52880 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT4 field value from a register. */
52881 #define ALT_USB_DEV_DAINT_OUTEPINT4_GET(value) (((value) & 0x00100000) >> 20)
52882 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT4 register field value suitable for setting the register. */
52883 #define ALT_USB_DEV_DAINT_OUTEPINT4_SET(value) (((value) << 20) & 0x00100000)
52884 
52885 /*
52886  * Field : OUT Endpoint 5 Interrupt Bit - outepint5
52887  *
52888  * Field Enumeration Values:
52889  *
52890  * Enum | Value | Description
52891  * :------------------------------------|:------|:-------------------------
52892  * ALT_USB_DEV_DAINT_OUTEPINT5_E_INACT | 0x0 | No Interrupt
52893  * ALT_USB_DEV_DAINT_OUTEPINT5_E_ACT | 0x1 | OUT Endpoint 5 Interrupt
52894  *
52895  * Field Access Macros:
52896  *
52897  */
52898 /*
52899  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT5
52900  *
52901  * No Interrupt
52902  */
52903 #define ALT_USB_DEV_DAINT_OUTEPINT5_E_INACT 0x0
52904 /*
52905  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT5
52906  *
52907  * OUT Endpoint 5 Interrupt
52908  */
52909 #define ALT_USB_DEV_DAINT_OUTEPINT5_E_ACT 0x1
52910 
52911 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT5 register field. */
52912 #define ALT_USB_DEV_DAINT_OUTEPINT5_LSB 21
52913 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT5 register field. */
52914 #define ALT_USB_DEV_DAINT_OUTEPINT5_MSB 21
52915 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT5 register field. */
52916 #define ALT_USB_DEV_DAINT_OUTEPINT5_WIDTH 1
52917 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT5 register field value. */
52918 #define ALT_USB_DEV_DAINT_OUTEPINT5_SET_MSK 0x00200000
52919 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT5 register field value. */
52920 #define ALT_USB_DEV_DAINT_OUTEPINT5_CLR_MSK 0xffdfffff
52921 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT5 register field. */
52922 #define ALT_USB_DEV_DAINT_OUTEPINT5_RESET 0x0
52923 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT5 field value from a register. */
52924 #define ALT_USB_DEV_DAINT_OUTEPINT5_GET(value) (((value) & 0x00200000) >> 21)
52925 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT5 register field value suitable for setting the register. */
52926 #define ALT_USB_DEV_DAINT_OUTEPINT5_SET(value) (((value) << 21) & 0x00200000)
52927 
52928 /*
52929  * Field : OUT Endpoint 6 Interrupt Bi - outepint6
52930  *
52931  * Field Enumeration Values:
52932  *
52933  * Enum | Value | Description
52934  * :------------------------------------|:------|:-------------------------
52935  * ALT_USB_DEV_DAINT_OUTEPINT6_E_INACT | 0x0 | No Interrupt
52936  * ALT_USB_DEV_DAINT_OUTEPINT6_E_ACT | 0x1 | OUT Endpoint 6 Interrupt
52937  *
52938  * Field Access Macros:
52939  *
52940  */
52941 /*
52942  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT6
52943  *
52944  * No Interrupt
52945  */
52946 #define ALT_USB_DEV_DAINT_OUTEPINT6_E_INACT 0x0
52947 /*
52948  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT6
52949  *
52950  * OUT Endpoint 6 Interrupt
52951  */
52952 #define ALT_USB_DEV_DAINT_OUTEPINT6_E_ACT 0x1
52953 
52954 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT6 register field. */
52955 #define ALT_USB_DEV_DAINT_OUTEPINT6_LSB 22
52956 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT6 register field. */
52957 #define ALT_USB_DEV_DAINT_OUTEPINT6_MSB 22
52958 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT6 register field. */
52959 #define ALT_USB_DEV_DAINT_OUTEPINT6_WIDTH 1
52960 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT6 register field value. */
52961 #define ALT_USB_DEV_DAINT_OUTEPINT6_SET_MSK 0x00400000
52962 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT6 register field value. */
52963 #define ALT_USB_DEV_DAINT_OUTEPINT6_CLR_MSK 0xffbfffff
52964 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT6 register field. */
52965 #define ALT_USB_DEV_DAINT_OUTEPINT6_RESET 0x0
52966 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT6 field value from a register. */
52967 #define ALT_USB_DEV_DAINT_OUTEPINT6_GET(value) (((value) & 0x00400000) >> 22)
52968 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT6 register field value suitable for setting the register. */
52969 #define ALT_USB_DEV_DAINT_OUTEPINT6_SET(value) (((value) << 22) & 0x00400000)
52970 
52971 /*
52972  * Field : OUT Endpoint 7 Interrupt Bit - outepint7
52973  *
52974  * Field Enumeration Values:
52975  *
52976  * Enum | Value | Description
52977  * :------------------------------------|:------|:-------------------------
52978  * ALT_USB_DEV_DAINT_OUTEPINT7_E_INACT | 0x0 | No Interrupt
52979  * ALT_USB_DEV_DAINT_OUTEPINT7_E_ACT | 0x1 | OUT Endpoint 7 Interrupt
52980  *
52981  * Field Access Macros:
52982  *
52983  */
52984 /*
52985  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT7
52986  *
52987  * No Interrupt
52988  */
52989 #define ALT_USB_DEV_DAINT_OUTEPINT7_E_INACT 0x0
52990 /*
52991  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT7
52992  *
52993  * OUT Endpoint 7 Interrupt
52994  */
52995 #define ALT_USB_DEV_DAINT_OUTEPINT7_E_ACT 0x1
52996 
52997 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT7 register field. */
52998 #define ALT_USB_DEV_DAINT_OUTEPINT7_LSB 23
52999 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT7 register field. */
53000 #define ALT_USB_DEV_DAINT_OUTEPINT7_MSB 23
53001 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT7 register field. */
53002 #define ALT_USB_DEV_DAINT_OUTEPINT7_WIDTH 1
53003 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT7 register field value. */
53004 #define ALT_USB_DEV_DAINT_OUTEPINT7_SET_MSK 0x00800000
53005 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT7 register field value. */
53006 #define ALT_USB_DEV_DAINT_OUTEPINT7_CLR_MSK 0xff7fffff
53007 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT7 register field. */
53008 #define ALT_USB_DEV_DAINT_OUTEPINT7_RESET 0x0
53009 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT7 field value from a register. */
53010 #define ALT_USB_DEV_DAINT_OUTEPINT7_GET(value) (((value) & 0x00800000) >> 23)
53011 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT7 register field value suitable for setting the register. */
53012 #define ALT_USB_DEV_DAINT_OUTEPINT7_SET(value) (((value) << 23) & 0x00800000)
53013 
53014 /*
53015  * Field : OUT Endpoint 8 Interrupt Bit - outepint8
53016  *
53017  * Field Enumeration Values:
53018  *
53019  * Enum | Value | Description
53020  * :------------------------------------|:------|:-------------------------
53021  * ALT_USB_DEV_DAINT_OUTEPINT8_E_INACT | 0x0 | No Interrupt
53022  * ALT_USB_DEV_DAINT_OUTEPINT8_E_ACT | 0x1 | OUT Endpoint 8 Interrupt
53023  *
53024  * Field Access Macros:
53025  *
53026  */
53027 /*
53028  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT8
53029  *
53030  * No Interrupt
53031  */
53032 #define ALT_USB_DEV_DAINT_OUTEPINT8_E_INACT 0x0
53033 /*
53034  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT8
53035  *
53036  * OUT Endpoint 8 Interrupt
53037  */
53038 #define ALT_USB_DEV_DAINT_OUTEPINT8_E_ACT 0x1
53039 
53040 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT8 register field. */
53041 #define ALT_USB_DEV_DAINT_OUTEPINT8_LSB 24
53042 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT8 register field. */
53043 #define ALT_USB_DEV_DAINT_OUTEPINT8_MSB 24
53044 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT8 register field. */
53045 #define ALT_USB_DEV_DAINT_OUTEPINT8_WIDTH 1
53046 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT8 register field value. */
53047 #define ALT_USB_DEV_DAINT_OUTEPINT8_SET_MSK 0x01000000
53048 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT8 register field value. */
53049 #define ALT_USB_DEV_DAINT_OUTEPINT8_CLR_MSK 0xfeffffff
53050 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT8 register field. */
53051 #define ALT_USB_DEV_DAINT_OUTEPINT8_RESET 0x0
53052 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT8 field value from a register. */
53053 #define ALT_USB_DEV_DAINT_OUTEPINT8_GET(value) (((value) & 0x01000000) >> 24)
53054 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT8 register field value suitable for setting the register. */
53055 #define ALT_USB_DEV_DAINT_OUTEPINT8_SET(value) (((value) << 24) & 0x01000000)
53056 
53057 /*
53058  * Field : OUT Endpoint 9 Interrupt Bit - outepint9
53059  *
53060  * Field Enumeration Values:
53061  *
53062  * Enum | Value | Description
53063  * :------------------------------------|:------|:-------------------------
53064  * ALT_USB_DEV_DAINT_OUTEPINT9_E_INACT | 0x0 | No Interrupt
53065  * ALT_USB_DEV_DAINT_OUTEPINT9_E_ACT | 0x1 | OUT Endpoint 9 Interrupt
53066  *
53067  * Field Access Macros:
53068  *
53069  */
53070 /*
53071  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT9
53072  *
53073  * No Interrupt
53074  */
53075 #define ALT_USB_DEV_DAINT_OUTEPINT9_E_INACT 0x0
53076 /*
53077  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT9
53078  *
53079  * OUT Endpoint 9 Interrupt
53080  */
53081 #define ALT_USB_DEV_DAINT_OUTEPINT9_E_ACT 0x1
53082 
53083 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT9 register field. */
53084 #define ALT_USB_DEV_DAINT_OUTEPINT9_LSB 25
53085 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT9 register field. */
53086 #define ALT_USB_DEV_DAINT_OUTEPINT9_MSB 25
53087 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT9 register field. */
53088 #define ALT_USB_DEV_DAINT_OUTEPINT9_WIDTH 1
53089 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT9 register field value. */
53090 #define ALT_USB_DEV_DAINT_OUTEPINT9_SET_MSK 0x02000000
53091 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT9 register field value. */
53092 #define ALT_USB_DEV_DAINT_OUTEPINT9_CLR_MSK 0xfdffffff
53093 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT9 register field. */
53094 #define ALT_USB_DEV_DAINT_OUTEPINT9_RESET 0x0
53095 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT9 field value from a register. */
53096 #define ALT_USB_DEV_DAINT_OUTEPINT9_GET(value) (((value) & 0x02000000) >> 25)
53097 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT9 register field value suitable for setting the register. */
53098 #define ALT_USB_DEV_DAINT_OUTEPINT9_SET(value) (((value) << 25) & 0x02000000)
53099 
53100 /*
53101  * Field : OUT Endpoint 10 Interrupt Bit - outepint10
53102  *
53103  * Field Enumeration Values:
53104  *
53105  * Enum | Value | Description
53106  * :-------------------------------------|:------|:--------------------------
53107  * ALT_USB_DEV_DAINT_OUTEPINT10_E_INACT | 0x0 | No Interrupt
53108  * ALT_USB_DEV_DAINT_OUTEPINT10_E_ACT | 0x1 | OUT Endpoint 10 Interrupt
53109  *
53110  * Field Access Macros:
53111  *
53112  */
53113 /*
53114  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT10
53115  *
53116  * No Interrupt
53117  */
53118 #define ALT_USB_DEV_DAINT_OUTEPINT10_E_INACT 0x0
53119 /*
53120  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT10
53121  *
53122  * OUT Endpoint 10 Interrupt
53123  */
53124 #define ALT_USB_DEV_DAINT_OUTEPINT10_E_ACT 0x1
53125 
53126 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT10 register field. */
53127 #define ALT_USB_DEV_DAINT_OUTEPINT10_LSB 26
53128 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT10 register field. */
53129 #define ALT_USB_DEV_DAINT_OUTEPINT10_MSB 26
53130 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT10 register field. */
53131 #define ALT_USB_DEV_DAINT_OUTEPINT10_WIDTH 1
53132 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT10 register field value. */
53133 #define ALT_USB_DEV_DAINT_OUTEPINT10_SET_MSK 0x04000000
53134 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT10 register field value. */
53135 #define ALT_USB_DEV_DAINT_OUTEPINT10_CLR_MSK 0xfbffffff
53136 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT10 register field. */
53137 #define ALT_USB_DEV_DAINT_OUTEPINT10_RESET 0x0
53138 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT10 field value from a register. */
53139 #define ALT_USB_DEV_DAINT_OUTEPINT10_GET(value) (((value) & 0x04000000) >> 26)
53140 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT10 register field value suitable for setting the register. */
53141 #define ALT_USB_DEV_DAINT_OUTEPINT10_SET(value) (((value) << 26) & 0x04000000)
53142 
53143 /*
53144  * Field : OUT Endpoint 11 Interrupt Bit - outepint11
53145  *
53146  * Field Enumeration Values:
53147  *
53148  * Enum | Value | Description
53149  * :-------------------------------------|:------|:--------------------------
53150  * ALT_USB_DEV_DAINT_OUTEPINT11_E_INACT | 0x0 | No Interrupt
53151  * ALT_USB_DEV_DAINT_OUTEPINT11_E_ACT | 0x1 | OUT Endpoint 11 Interrupt
53152  *
53153  * Field Access Macros:
53154  *
53155  */
53156 /*
53157  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT11
53158  *
53159  * No Interrupt
53160  */
53161 #define ALT_USB_DEV_DAINT_OUTEPINT11_E_INACT 0x0
53162 /*
53163  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT11
53164  *
53165  * OUT Endpoint 11 Interrupt
53166  */
53167 #define ALT_USB_DEV_DAINT_OUTEPINT11_E_ACT 0x1
53168 
53169 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT11 register field. */
53170 #define ALT_USB_DEV_DAINT_OUTEPINT11_LSB 27
53171 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT11 register field. */
53172 #define ALT_USB_DEV_DAINT_OUTEPINT11_MSB 27
53173 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT11 register field. */
53174 #define ALT_USB_DEV_DAINT_OUTEPINT11_WIDTH 1
53175 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT11 register field value. */
53176 #define ALT_USB_DEV_DAINT_OUTEPINT11_SET_MSK 0x08000000
53177 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT11 register field value. */
53178 #define ALT_USB_DEV_DAINT_OUTEPINT11_CLR_MSK 0xf7ffffff
53179 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT11 register field. */
53180 #define ALT_USB_DEV_DAINT_OUTEPINT11_RESET 0x0
53181 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT11 field value from a register. */
53182 #define ALT_USB_DEV_DAINT_OUTEPINT11_GET(value) (((value) & 0x08000000) >> 27)
53183 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT11 register field value suitable for setting the register. */
53184 #define ALT_USB_DEV_DAINT_OUTEPINT11_SET(value) (((value) << 27) & 0x08000000)
53185 
53186 /*
53187  * Field : OUT Endpoint 12 Interrupt Bit - outepint12
53188  *
53189  * Field Enumeration Values:
53190  *
53191  * Enum | Value | Description
53192  * :-------------------------------------|:------|:--------------------------
53193  * ALT_USB_DEV_DAINT_OUTEPINT12_E_INACT | 0x0 | No Interrupt
53194  * ALT_USB_DEV_DAINT_OUTEPINT12_E_ACT | 0x1 | OUT Endpoint 12 Interrupt
53195  *
53196  * Field Access Macros:
53197  *
53198  */
53199 /*
53200  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT12
53201  *
53202  * No Interrupt
53203  */
53204 #define ALT_USB_DEV_DAINT_OUTEPINT12_E_INACT 0x0
53205 /*
53206  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT12
53207  *
53208  * OUT Endpoint 12 Interrupt
53209  */
53210 #define ALT_USB_DEV_DAINT_OUTEPINT12_E_ACT 0x1
53211 
53212 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT12 register field. */
53213 #define ALT_USB_DEV_DAINT_OUTEPINT12_LSB 28
53214 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT12 register field. */
53215 #define ALT_USB_DEV_DAINT_OUTEPINT12_MSB 28
53216 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT12 register field. */
53217 #define ALT_USB_DEV_DAINT_OUTEPINT12_WIDTH 1
53218 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT12 register field value. */
53219 #define ALT_USB_DEV_DAINT_OUTEPINT12_SET_MSK 0x10000000
53220 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT12 register field value. */
53221 #define ALT_USB_DEV_DAINT_OUTEPINT12_CLR_MSK 0xefffffff
53222 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT12 register field. */
53223 #define ALT_USB_DEV_DAINT_OUTEPINT12_RESET 0x0
53224 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT12 field value from a register. */
53225 #define ALT_USB_DEV_DAINT_OUTEPINT12_GET(value) (((value) & 0x10000000) >> 28)
53226 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT12 register field value suitable for setting the register. */
53227 #define ALT_USB_DEV_DAINT_OUTEPINT12_SET(value) (((value) << 28) & 0x10000000)
53228 
53229 /*
53230  * Field : OUT Endpoint 13 Interrupt Bit - outepint13
53231  *
53232  * Field Enumeration Values:
53233  *
53234  * Enum | Value | Description
53235  * :-------------------------------------|:------|:--------------------------
53236  * ALT_USB_DEV_DAINT_OUTEPINT13_E_INACT | 0x0 | No Interrupt
53237  * ALT_USB_DEV_DAINT_OUTEPINT13_E_ACT | 0x1 | OUT Endpoint 13 Interrupt
53238  *
53239  * Field Access Macros:
53240  *
53241  */
53242 /*
53243  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT13
53244  *
53245  * No Interrupt
53246  */
53247 #define ALT_USB_DEV_DAINT_OUTEPINT13_E_INACT 0x0
53248 /*
53249  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT13
53250  *
53251  * OUT Endpoint 13 Interrupt
53252  */
53253 #define ALT_USB_DEV_DAINT_OUTEPINT13_E_ACT 0x1
53254 
53255 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT13 register field. */
53256 #define ALT_USB_DEV_DAINT_OUTEPINT13_LSB 29
53257 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT13 register field. */
53258 #define ALT_USB_DEV_DAINT_OUTEPINT13_MSB 29
53259 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT13 register field. */
53260 #define ALT_USB_DEV_DAINT_OUTEPINT13_WIDTH 1
53261 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT13 register field value. */
53262 #define ALT_USB_DEV_DAINT_OUTEPINT13_SET_MSK 0x20000000
53263 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT13 register field value. */
53264 #define ALT_USB_DEV_DAINT_OUTEPINT13_CLR_MSK 0xdfffffff
53265 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT13 register field. */
53266 #define ALT_USB_DEV_DAINT_OUTEPINT13_RESET 0x0
53267 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT13 field value from a register. */
53268 #define ALT_USB_DEV_DAINT_OUTEPINT13_GET(value) (((value) & 0x20000000) >> 29)
53269 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT13 register field value suitable for setting the register. */
53270 #define ALT_USB_DEV_DAINT_OUTEPINT13_SET(value) (((value) << 29) & 0x20000000)
53271 
53272 /*
53273  * Field : OUT Endpoint 14 Interrupt Bi - outepint14
53274  *
53275  * Field Enumeration Values:
53276  *
53277  * Enum | Value | Description
53278  * :-------------------------------------|:------|:--------------------------
53279  * ALT_USB_DEV_DAINT_OUTEPINT14_E_INACT | 0x0 | No Interrupt
53280  * ALT_USB_DEV_DAINT_OUTEPINT14_E_ACT | 0x1 | OUT Endpoint 14 Interrupt
53281  *
53282  * Field Access Macros:
53283  *
53284  */
53285 /*
53286  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT14
53287  *
53288  * No Interrupt
53289  */
53290 #define ALT_USB_DEV_DAINT_OUTEPINT14_E_INACT 0x0
53291 /*
53292  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT14
53293  *
53294  * OUT Endpoint 14 Interrupt
53295  */
53296 #define ALT_USB_DEV_DAINT_OUTEPINT14_E_ACT 0x1
53297 
53298 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT14 register field. */
53299 #define ALT_USB_DEV_DAINT_OUTEPINT14_LSB 30
53300 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT14 register field. */
53301 #define ALT_USB_DEV_DAINT_OUTEPINT14_MSB 30
53302 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT14 register field. */
53303 #define ALT_USB_DEV_DAINT_OUTEPINT14_WIDTH 1
53304 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT14 register field value. */
53305 #define ALT_USB_DEV_DAINT_OUTEPINT14_SET_MSK 0x40000000
53306 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT14 register field value. */
53307 #define ALT_USB_DEV_DAINT_OUTEPINT14_CLR_MSK 0xbfffffff
53308 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT14 register field. */
53309 #define ALT_USB_DEV_DAINT_OUTEPINT14_RESET 0x0
53310 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT14 field value from a register. */
53311 #define ALT_USB_DEV_DAINT_OUTEPINT14_GET(value) (((value) & 0x40000000) >> 30)
53312 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT14 register field value suitable for setting the register. */
53313 #define ALT_USB_DEV_DAINT_OUTEPINT14_SET(value) (((value) << 30) & 0x40000000)
53314 
53315 /*
53316  * Field : OUT Endpoint 15 Interrupt Bit - outepint15
53317  *
53318  * Field Enumeration Values:
53319  *
53320  * Enum | Value | Description
53321  * :-------------------------------------|:------|:--------------------------
53322  * ALT_USB_DEV_DAINT_OUTEPINT15_E_INACT | 0x0 | No Interrupt
53323  * ALT_USB_DEV_DAINT_OUTEPINT15_E_ACT | 0x1 | OUT Endpoint 15 Interrupt
53324  *
53325  * Field Access Macros:
53326  *
53327  */
53328 /*
53329  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT15
53330  *
53331  * No Interrupt
53332  */
53333 #define ALT_USB_DEV_DAINT_OUTEPINT15_E_INACT 0x0
53334 /*
53335  * Enumerated value for register field ALT_USB_DEV_DAINT_OUTEPINT15
53336  *
53337  * OUT Endpoint 15 Interrupt
53338  */
53339 #define ALT_USB_DEV_DAINT_OUTEPINT15_E_ACT 0x1
53340 
53341 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINT_OUTEPINT15 register field. */
53342 #define ALT_USB_DEV_DAINT_OUTEPINT15_LSB 31
53343 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINT_OUTEPINT15 register field. */
53344 #define ALT_USB_DEV_DAINT_OUTEPINT15_MSB 31
53345 /* The width in bits of the ALT_USB_DEV_DAINT_OUTEPINT15 register field. */
53346 #define ALT_USB_DEV_DAINT_OUTEPINT15_WIDTH 1
53347 /* The mask used to set the ALT_USB_DEV_DAINT_OUTEPINT15 register field value. */
53348 #define ALT_USB_DEV_DAINT_OUTEPINT15_SET_MSK 0x80000000
53349 /* The mask used to clear the ALT_USB_DEV_DAINT_OUTEPINT15 register field value. */
53350 #define ALT_USB_DEV_DAINT_OUTEPINT15_CLR_MSK 0x7fffffff
53351 /* The reset value of the ALT_USB_DEV_DAINT_OUTEPINT15 register field. */
53352 #define ALT_USB_DEV_DAINT_OUTEPINT15_RESET 0x0
53353 /* Extracts the ALT_USB_DEV_DAINT_OUTEPINT15 field value from a register. */
53354 #define ALT_USB_DEV_DAINT_OUTEPINT15_GET(value) (((value) & 0x80000000) >> 31)
53355 /* Produces a ALT_USB_DEV_DAINT_OUTEPINT15 register field value suitable for setting the register. */
53356 #define ALT_USB_DEV_DAINT_OUTEPINT15_SET(value) (((value) << 31) & 0x80000000)
53357 
53358 #ifndef __ASSEMBLY__
53359 /*
53360  * WARNING: The C register and register group struct declarations are provided for
53361  * convenience and illustrative purposes. They should, however, be used with
53362  * caution as the C language standard provides no guarantees about the alignment or
53363  * atomicity of device memory accesses. The recommended practice for writing
53364  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
53365  * alt_write_word() functions.
53366  *
53367  * The struct declaration for register ALT_USB_DEV_DAINT.
53368  */
53369 struct ALT_USB_DEV_DAINT_s
53370 {
53371  const uint32_t inepint0 : 1; /* IN Endpoint 0 Interrupt Bit */
53372  const uint32_t inepint1 : 1; /* IN Endpoint 1 Interrupt Bit */
53373  const uint32_t inepint2 : 1; /* IN Endpoint 2 Interrupt Bit */
53374  const uint32_t inepint3 : 1; /* IN Endpoint 3 Interrupt Bit */
53375  const uint32_t inepint4 : 1; /* IN Endpoint 4 Interrupt Bit */
53376  const uint32_t inepint5 : 1; /* IN Endpoint 5 Interrupt Bit */
53377  const uint32_t inepint6 : 1; /* IN Endpoint 6 Interrupt Bit */
53378  const uint32_t inepint7 : 1; /* IN Endpoint 7 Interrupt Bit */
53379  const uint32_t inepint8 : 1; /* IN Endpoint 8 Interrupt Bit */
53380  const uint32_t inepint9 : 1; /* IN Endpoint 9 Interrupt Bit */
53381  const uint32_t inepint10 : 1; /* IN Endpoint 10 Interrupt Bit */
53382  const uint32_t inepint11 : 1; /* IN Endpoint 11 Interrupt Bit */
53383  const uint32_t inepint12 : 1; /* IN Endpoint 12 Interrupt Bit */
53384  const uint32_t inepint13 : 1; /* IN Endpoint 13 Interrupt Bit */
53385  const uint32_t inepint14 : 1; /* IN Endpoint 14 Interrupt Bit */
53386  const uint32_t inepint15 : 1; /* IN Endpoint 15 Interrupt Bit */
53387  const uint32_t outepint0 : 1; /* OUT Endpoint 0 Interrupt Bit */
53388  const uint32_t outepint1 : 1; /* OUT Endpoint 1 Interrupt Bi */
53389  const uint32_t outepint2 : 1; /* OUT Endpoint 2 Interrupt Bit */
53390  const uint32_t outepint3 : 1; /* OUT Endpoint 3 Interrupt Bit */
53391  const uint32_t outepint4 : 1; /* OUT Endpoint 4 Interrupt Bit */
53392  const uint32_t outepint5 : 1; /* OUT Endpoint 5 Interrupt Bit */
53393  const uint32_t outepint6 : 1; /* OUT Endpoint 6 Interrupt Bi */
53394  const uint32_t outepint7 : 1; /* OUT Endpoint 7 Interrupt Bit */
53395  const uint32_t outepint8 : 1; /* OUT Endpoint 8 Interrupt Bit */
53396  const uint32_t outepint9 : 1; /* OUT Endpoint 9 Interrupt Bit */
53397  const uint32_t outepint10 : 1; /* OUT Endpoint 10 Interrupt Bit */
53398  const uint32_t outepint11 : 1; /* OUT Endpoint 11 Interrupt Bit */
53399  const uint32_t outepint12 : 1; /* OUT Endpoint 12 Interrupt Bit */
53400  const uint32_t outepint13 : 1; /* OUT Endpoint 13 Interrupt Bit */
53401  const uint32_t outepint14 : 1; /* OUT Endpoint 14 Interrupt Bi */
53402  const uint32_t outepint15 : 1; /* OUT Endpoint 15 Interrupt Bit */
53403 };
53404 
53405 /* The typedef declaration for register ALT_USB_DEV_DAINT. */
53406 typedef volatile struct ALT_USB_DEV_DAINT_s ALT_USB_DEV_DAINT_t;
53407 #endif /* __ASSEMBLY__ */
53408 
53409 /* The byte offset of the ALT_USB_DEV_DAINT register from the beginning of the component. */
53410 #define ALT_USB_DEV_DAINT_OFST 0x18
53411 /* The address of the ALT_USB_DEV_DAINT register. */
53412 #define ALT_USB_DEV_DAINT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DAINT_OFST))
53413 
53414 /*
53415  * Register : Device All Endpoints Interrupt Mask Register - daintmsk
53416  *
53417  * The Device Endpoint Interrupt Mask register works with the Device Endpoint
53418  * Interrupt register to interrupt the application when an event occurs on a device
53419  * endpoint. However, the Device All Endpoints Interrupt (DAINT) register bit
53420  * corresponding to that interrupt is still set.
53421  *
53422  * Register Layout
53423  *
53424  * Bits | Access | Reset | Description
53425  * :-----|:-------|:------|:-----------------------------------
53426  * [0] | RW | 0x0 | IN Endpoint 0 Interrupt mask Bit
53427  * [1] | RW | 0x0 | IN Endpoint 1 Interrupt mask Bit
53428  * [2] | RW | 0x0 | N Endpoint 2 Interrupt mask Bit
53429  * [3] | RW | 0x0 | ALT_USB_DEV_DAINTMSK_INEPMSK3
53430  * [4] | RW | 0x0 | IN Endpoint 4 Interrupt mask Bit
53431  * [5] | RW | 0x0 | IN Endpoint 5 Interrupt mask Bit
53432  * [6] | RW | 0x0 | IN Endpoint 6 Interrupt mask Bit
53433  * [7] | RW | 0x0 | IN Endpoint 7 Interrupt mask Bit
53434  * [8] | RW | 0x0 | IN Endpoint 8 Interrupt mask Bit
53435  * [9] | RW | 0x0 | IN Endpoint 9 Interrupt mask Bit
53436  * [10] | RW | 0x0 | IN Endpoint 10 Interrupt mask Bit
53437  * [11] | RW | 0x0 | IN Endpoint 11 Interrupt mask Bit
53438  * [12] | RW | 0x0 | IN Endpoint 12 Interrupt mask Bit
53439  * [13] | RW | 0x0 | IN Endpoint 13 Interrupt mask Bit
53440  * [14] | RW | 0x0 | IN Endpoint 14 Interrupt mask Bit
53441  * [15] | RW | 0x0 | ALT_USB_DEV_DAINTMSK_INEPMSK15
53442  * [16] | RW | 0x0 | OUT Endpoint 0 Interrupt mask Bit
53443  * [17] | RW | 0x0 | OUT Endpoint 1 Interrupt mask Bit
53444  * [18] | RW | 0x0 | OUT Endpoint 2 Interrupt mask Bi
53445  * [19] | RW | 0x0 | OUT Endpoint 3 Interrupt mask Bi
53446  * [20] | RW | 0x0 | OUT Endpoint 4 Interrupt mask Bit
53447  * [21] | RW | 0x0 | OUT Endpoint 5 Interrupt mask Bit
53448  * [22] | RW | 0x0 | OUT Endpoint 6 Interrupt mask Bit
53449  * [23] | RW | 0x0 | OUT Endpoint 7 Interrupt mask Bit
53450  * [24] | RW | 0x0 | ALT_USB_DEV_DAINTMSK_OUTEPMSK8
53451  * [25] | RW | 0x0 | OUT Endpoint 9 Interrupt mask Bit
53452  * [26] | RW | 0x0 | OUT Endpoint 10 Interrupt mask Bi
53453  * [27] | RW | 0x0 | OUT Endpoint 11 Interrupt mask Bit
53454  * [28] | RW | 0x0 | OUT Endpoint 12 Interrupt mask Bit
53455  * [29] | RW | 0x0 | OUT Endpoint 13 Interrupt mask Bit
53456  * [30] | RW | 0x0 | OUT Endpoint 14 Interrupt mask Bit
53457  * [31] | RW | 0x0 | OUT Endpoint 15 Interrupt mask Bit
53458  *
53459  */
53460 /*
53461  * Field : IN Endpoint 0 Interrupt mask Bit - inepmsk0
53462  *
53463  * Field Enumeration Values:
53464  *
53465  * Enum | Value | Description
53466  * :--------------------------------------|:------|:-----------------------------
53467  * ALT_USB_DEV_DAINTMSK_INEPMSK0_E_NOMSK | 0x1 | No Interrupt mask
53468  * ALT_USB_DEV_DAINTMSK_INEPMSK0_E_MSK | 0x0 | IN Endpoint 0 Interrupt mask
53469  *
53470  * Field Access Macros:
53471  *
53472  */
53473 /*
53474  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK0
53475  *
53476  * No Interrupt mask
53477  */
53478 #define ALT_USB_DEV_DAINTMSK_INEPMSK0_E_NOMSK 0x1
53479 /*
53480  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK0
53481  *
53482  * IN Endpoint 0 Interrupt mask
53483  */
53484 #define ALT_USB_DEV_DAINTMSK_INEPMSK0_E_MSK 0x0
53485 
53486 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK0 register field. */
53487 #define ALT_USB_DEV_DAINTMSK_INEPMSK0_LSB 0
53488 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK0 register field. */
53489 #define ALT_USB_DEV_DAINTMSK_INEPMSK0_MSB 0
53490 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK0 register field. */
53491 #define ALT_USB_DEV_DAINTMSK_INEPMSK0_WIDTH 1
53492 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK0 register field value. */
53493 #define ALT_USB_DEV_DAINTMSK_INEPMSK0_SET_MSK 0x00000001
53494 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK0 register field value. */
53495 #define ALT_USB_DEV_DAINTMSK_INEPMSK0_CLR_MSK 0xfffffffe
53496 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK0 register field. */
53497 #define ALT_USB_DEV_DAINTMSK_INEPMSK0_RESET 0x0
53498 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK0 field value from a register. */
53499 #define ALT_USB_DEV_DAINTMSK_INEPMSK0_GET(value) (((value) & 0x00000001) >> 0)
53500 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK0 register field value suitable for setting the register. */
53501 #define ALT_USB_DEV_DAINTMSK_INEPMSK0_SET(value) (((value) << 0) & 0x00000001)
53502 
53503 /*
53504  * Field : IN Endpoint 1 Interrupt mask Bit - inepmsk1
53505  *
53506  * Field Enumeration Values:
53507  *
53508  * Enum | Value | Description
53509  * :--------------------------------------|:------|:-----------------------------
53510  * ALT_USB_DEV_DAINTMSK_INEPMSK1_E_NOMSK | 0x1 | No Interrupt mask
53511  * ALT_USB_DEV_DAINTMSK_INEPMSK1_E_MSK | 0x0 | IN Endpoint 1 Interrupt mask
53512  *
53513  * Field Access Macros:
53514  *
53515  */
53516 /*
53517  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK1
53518  *
53519  * No Interrupt mask
53520  */
53521 #define ALT_USB_DEV_DAINTMSK_INEPMSK1_E_NOMSK 0x1
53522 /*
53523  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK1
53524  *
53525  * IN Endpoint 1 Interrupt mask
53526  */
53527 #define ALT_USB_DEV_DAINTMSK_INEPMSK1_E_MSK 0x0
53528 
53529 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK1 register field. */
53530 #define ALT_USB_DEV_DAINTMSK_INEPMSK1_LSB 1
53531 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK1 register field. */
53532 #define ALT_USB_DEV_DAINTMSK_INEPMSK1_MSB 1
53533 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK1 register field. */
53534 #define ALT_USB_DEV_DAINTMSK_INEPMSK1_WIDTH 1
53535 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK1 register field value. */
53536 #define ALT_USB_DEV_DAINTMSK_INEPMSK1_SET_MSK 0x00000002
53537 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK1 register field value. */
53538 #define ALT_USB_DEV_DAINTMSK_INEPMSK1_CLR_MSK 0xfffffffd
53539 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK1 register field. */
53540 #define ALT_USB_DEV_DAINTMSK_INEPMSK1_RESET 0x0
53541 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK1 field value from a register. */
53542 #define ALT_USB_DEV_DAINTMSK_INEPMSK1_GET(value) (((value) & 0x00000002) >> 1)
53543 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK1 register field value suitable for setting the register. */
53544 #define ALT_USB_DEV_DAINTMSK_INEPMSK1_SET(value) (((value) << 1) & 0x00000002)
53545 
53546 /*
53547  * Field : N Endpoint 2 Interrupt mask Bit - inepmsk2
53548  *
53549  * Field Enumeration Values:
53550  *
53551  * Enum | Value | Description
53552  * :--------------------------------------|:------|:-----------------------------
53553  * ALT_USB_DEV_DAINTMSK_INEPMSK2_E_NOMSK | 0x1 | No Interrupt mask
53554  * ALT_USB_DEV_DAINTMSK_INEPMSK2_E_MSK | 0x0 | IN Endpoint 2 Interrupt mask
53555  *
53556  * Field Access Macros:
53557  *
53558  */
53559 /*
53560  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK2
53561  *
53562  * No Interrupt mask
53563  */
53564 #define ALT_USB_DEV_DAINTMSK_INEPMSK2_E_NOMSK 0x1
53565 /*
53566  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK2
53567  *
53568  * IN Endpoint 2 Interrupt mask
53569  */
53570 #define ALT_USB_DEV_DAINTMSK_INEPMSK2_E_MSK 0x0
53571 
53572 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK2 register field. */
53573 #define ALT_USB_DEV_DAINTMSK_INEPMSK2_LSB 2
53574 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK2 register field. */
53575 #define ALT_USB_DEV_DAINTMSK_INEPMSK2_MSB 2
53576 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK2 register field. */
53577 #define ALT_USB_DEV_DAINTMSK_INEPMSK2_WIDTH 1
53578 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK2 register field value. */
53579 #define ALT_USB_DEV_DAINTMSK_INEPMSK2_SET_MSK 0x00000004
53580 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK2 register field value. */
53581 #define ALT_USB_DEV_DAINTMSK_INEPMSK2_CLR_MSK 0xfffffffb
53582 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK2 register field. */
53583 #define ALT_USB_DEV_DAINTMSK_INEPMSK2_RESET 0x0
53584 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK2 field value from a register. */
53585 #define ALT_USB_DEV_DAINTMSK_INEPMSK2_GET(value) (((value) & 0x00000004) >> 2)
53586 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK2 register field value suitable for setting the register. */
53587 #define ALT_USB_DEV_DAINTMSK_INEPMSK2_SET(value) (((value) << 2) & 0x00000004)
53588 
53589 /*
53590  * Field : inepmsk3
53591  *
53592  * Field Enumeration Values:
53593  *
53594  * Enum | Value | Description
53595  * :--------------------------------------|:------|:-----------------------------
53596  * ALT_USB_DEV_DAINTMSK_INEPMSK3_E_NOMSK | 0x1 | No Interrupt mask
53597  * ALT_USB_DEV_DAINTMSK_INEPMSK3_E_MSK | 0x0 | IN Endpoint 3 Interrupt mask
53598  *
53599  * Field Access Macros:
53600  *
53601  */
53602 /*
53603  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK3
53604  *
53605  * No Interrupt mask
53606  */
53607 #define ALT_USB_DEV_DAINTMSK_INEPMSK3_E_NOMSK 0x1
53608 /*
53609  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK3
53610  *
53611  * IN Endpoint 3 Interrupt mask
53612  */
53613 #define ALT_USB_DEV_DAINTMSK_INEPMSK3_E_MSK 0x0
53614 
53615 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK3 register field. */
53616 #define ALT_USB_DEV_DAINTMSK_INEPMSK3_LSB 3
53617 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK3 register field. */
53618 #define ALT_USB_DEV_DAINTMSK_INEPMSK3_MSB 3
53619 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK3 register field. */
53620 #define ALT_USB_DEV_DAINTMSK_INEPMSK3_WIDTH 1
53621 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK3 register field value. */
53622 #define ALT_USB_DEV_DAINTMSK_INEPMSK3_SET_MSK 0x00000008
53623 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK3 register field value. */
53624 #define ALT_USB_DEV_DAINTMSK_INEPMSK3_CLR_MSK 0xfffffff7
53625 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK3 register field. */
53626 #define ALT_USB_DEV_DAINTMSK_INEPMSK3_RESET 0x0
53627 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK3 field value from a register. */
53628 #define ALT_USB_DEV_DAINTMSK_INEPMSK3_GET(value) (((value) & 0x00000008) >> 3)
53629 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK3 register field value suitable for setting the register. */
53630 #define ALT_USB_DEV_DAINTMSK_INEPMSK3_SET(value) (((value) << 3) & 0x00000008)
53631 
53632 /*
53633  * Field : IN Endpoint 4 Interrupt mask Bit - inepmsk4
53634  *
53635  * Field Enumeration Values:
53636  *
53637  * Enum | Value | Description
53638  * :--------------------------------------|:------|:-----------------------------
53639  * ALT_USB_DEV_DAINTMSK_INEPMSK4_E_NOMSK | 0x1 | No Interrupt mask
53640  * ALT_USB_DEV_DAINTMSK_INEPMSK4_E_MSK | 0x0 | IN Endpoint 4 Interrupt mask
53641  *
53642  * Field Access Macros:
53643  *
53644  */
53645 /*
53646  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK4
53647  *
53648  * No Interrupt mask
53649  */
53650 #define ALT_USB_DEV_DAINTMSK_INEPMSK4_E_NOMSK 0x1
53651 /*
53652  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK4
53653  *
53654  * IN Endpoint 4 Interrupt mask
53655  */
53656 #define ALT_USB_DEV_DAINTMSK_INEPMSK4_E_MSK 0x0
53657 
53658 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK4 register field. */
53659 #define ALT_USB_DEV_DAINTMSK_INEPMSK4_LSB 4
53660 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK4 register field. */
53661 #define ALT_USB_DEV_DAINTMSK_INEPMSK4_MSB 4
53662 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK4 register field. */
53663 #define ALT_USB_DEV_DAINTMSK_INEPMSK4_WIDTH 1
53664 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK4 register field value. */
53665 #define ALT_USB_DEV_DAINTMSK_INEPMSK4_SET_MSK 0x00000010
53666 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK4 register field value. */
53667 #define ALT_USB_DEV_DAINTMSK_INEPMSK4_CLR_MSK 0xffffffef
53668 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK4 register field. */
53669 #define ALT_USB_DEV_DAINTMSK_INEPMSK4_RESET 0x0
53670 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK4 field value from a register. */
53671 #define ALT_USB_DEV_DAINTMSK_INEPMSK4_GET(value) (((value) & 0x00000010) >> 4)
53672 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK4 register field value suitable for setting the register. */
53673 #define ALT_USB_DEV_DAINTMSK_INEPMSK4_SET(value) (((value) << 4) & 0x00000010)
53674 
53675 /*
53676  * Field : IN Endpoint 5 Interrupt mask Bit - inepmsk5
53677  *
53678  * Field Enumeration Values:
53679  *
53680  * Enum | Value | Description
53681  * :--------------------------------------|:------|:-----------------------------
53682  * ALT_USB_DEV_DAINTMSK_INEPMSK5_E_NOMSK | 0x1 | No Interrupt mask
53683  * ALT_USB_DEV_DAINTMSK_INEPMSK5_E_MSK | 0x0 | IN Endpoint 5 Interrupt mask
53684  *
53685  * Field Access Macros:
53686  *
53687  */
53688 /*
53689  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK5
53690  *
53691  * No Interrupt mask
53692  */
53693 #define ALT_USB_DEV_DAINTMSK_INEPMSK5_E_NOMSK 0x1
53694 /*
53695  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK5
53696  *
53697  * IN Endpoint 5 Interrupt mask
53698  */
53699 #define ALT_USB_DEV_DAINTMSK_INEPMSK5_E_MSK 0x0
53700 
53701 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK5 register field. */
53702 #define ALT_USB_DEV_DAINTMSK_INEPMSK5_LSB 5
53703 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK5 register field. */
53704 #define ALT_USB_DEV_DAINTMSK_INEPMSK5_MSB 5
53705 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK5 register field. */
53706 #define ALT_USB_DEV_DAINTMSK_INEPMSK5_WIDTH 1
53707 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK5 register field value. */
53708 #define ALT_USB_DEV_DAINTMSK_INEPMSK5_SET_MSK 0x00000020
53709 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK5 register field value. */
53710 #define ALT_USB_DEV_DAINTMSK_INEPMSK5_CLR_MSK 0xffffffdf
53711 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK5 register field. */
53712 #define ALT_USB_DEV_DAINTMSK_INEPMSK5_RESET 0x0
53713 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK5 field value from a register. */
53714 #define ALT_USB_DEV_DAINTMSK_INEPMSK5_GET(value) (((value) & 0x00000020) >> 5)
53715 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK5 register field value suitable for setting the register. */
53716 #define ALT_USB_DEV_DAINTMSK_INEPMSK5_SET(value) (((value) << 5) & 0x00000020)
53717 
53718 /*
53719  * Field : IN Endpoint 6 Interrupt mask Bit - inepmsk6
53720  *
53721  * Field Enumeration Values:
53722  *
53723  * Enum | Value | Description
53724  * :--------------------------------------|:------|:-----------------------------
53725  * ALT_USB_DEV_DAINTMSK_INEPMSK6_E_NOMSK | 0x1 | No Interrupt mask
53726  * ALT_USB_DEV_DAINTMSK_INEPMSK6_E_MSK | 0x0 | IN Endpoint 6 Interrupt mask
53727  *
53728  * Field Access Macros:
53729  *
53730  */
53731 /*
53732  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK6
53733  *
53734  * No Interrupt mask
53735  */
53736 #define ALT_USB_DEV_DAINTMSK_INEPMSK6_E_NOMSK 0x1
53737 /*
53738  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK6
53739  *
53740  * IN Endpoint 6 Interrupt mask
53741  */
53742 #define ALT_USB_DEV_DAINTMSK_INEPMSK6_E_MSK 0x0
53743 
53744 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK6 register field. */
53745 #define ALT_USB_DEV_DAINTMSK_INEPMSK6_LSB 6
53746 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK6 register field. */
53747 #define ALT_USB_DEV_DAINTMSK_INEPMSK6_MSB 6
53748 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK6 register field. */
53749 #define ALT_USB_DEV_DAINTMSK_INEPMSK6_WIDTH 1
53750 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK6 register field value. */
53751 #define ALT_USB_DEV_DAINTMSK_INEPMSK6_SET_MSK 0x00000040
53752 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK6 register field value. */
53753 #define ALT_USB_DEV_DAINTMSK_INEPMSK6_CLR_MSK 0xffffffbf
53754 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK6 register field. */
53755 #define ALT_USB_DEV_DAINTMSK_INEPMSK6_RESET 0x0
53756 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK6 field value from a register. */
53757 #define ALT_USB_DEV_DAINTMSK_INEPMSK6_GET(value) (((value) & 0x00000040) >> 6)
53758 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK6 register field value suitable for setting the register. */
53759 #define ALT_USB_DEV_DAINTMSK_INEPMSK6_SET(value) (((value) << 6) & 0x00000040)
53760 
53761 /*
53762  * Field : IN Endpoint 7 Interrupt mask Bit - inepmsk7
53763  *
53764  * Field Enumeration Values:
53765  *
53766  * Enum | Value | Description
53767  * :--------------------------------------|:------|:-----------------------------
53768  * ALT_USB_DEV_DAINTMSK_INEPMSK7_E_NOMSK | 0x1 | No Interrupt mask
53769  * ALT_USB_DEV_DAINTMSK_INEPMSK7_E_MSK | 0x0 | IN Endpoint 7 Interrupt mask
53770  *
53771  * Field Access Macros:
53772  *
53773  */
53774 /*
53775  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK7
53776  *
53777  * No Interrupt mask
53778  */
53779 #define ALT_USB_DEV_DAINTMSK_INEPMSK7_E_NOMSK 0x1
53780 /*
53781  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK7
53782  *
53783  * IN Endpoint 7 Interrupt mask
53784  */
53785 #define ALT_USB_DEV_DAINTMSK_INEPMSK7_E_MSK 0x0
53786 
53787 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK7 register field. */
53788 #define ALT_USB_DEV_DAINTMSK_INEPMSK7_LSB 7
53789 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK7 register field. */
53790 #define ALT_USB_DEV_DAINTMSK_INEPMSK7_MSB 7
53791 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK7 register field. */
53792 #define ALT_USB_DEV_DAINTMSK_INEPMSK7_WIDTH 1
53793 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK7 register field value. */
53794 #define ALT_USB_DEV_DAINTMSK_INEPMSK7_SET_MSK 0x00000080
53795 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK7 register field value. */
53796 #define ALT_USB_DEV_DAINTMSK_INEPMSK7_CLR_MSK 0xffffff7f
53797 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK7 register field. */
53798 #define ALT_USB_DEV_DAINTMSK_INEPMSK7_RESET 0x0
53799 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK7 field value from a register. */
53800 #define ALT_USB_DEV_DAINTMSK_INEPMSK7_GET(value) (((value) & 0x00000080) >> 7)
53801 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK7 register field value suitable for setting the register. */
53802 #define ALT_USB_DEV_DAINTMSK_INEPMSK7_SET(value) (((value) << 7) & 0x00000080)
53803 
53804 /*
53805  * Field : IN Endpoint 8 Interrupt mask Bit - inepmsk8
53806  *
53807  * Field Enumeration Values:
53808  *
53809  * Enum | Value | Description
53810  * :--------------------------------------|:------|:-----------------------------
53811  * ALT_USB_DEV_DAINTMSK_INEPMSK8_E_NOMSK | 0x1 | No Interrupt mask
53812  * ALT_USB_DEV_DAINTMSK_INEPMSK8_E_MSK | 0x0 | IN Endpoint 8 Interrupt mask
53813  *
53814  * Field Access Macros:
53815  *
53816  */
53817 /*
53818  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK8
53819  *
53820  * No Interrupt mask
53821  */
53822 #define ALT_USB_DEV_DAINTMSK_INEPMSK8_E_NOMSK 0x1
53823 /*
53824  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK8
53825  *
53826  * IN Endpoint 8 Interrupt mask
53827  */
53828 #define ALT_USB_DEV_DAINTMSK_INEPMSK8_E_MSK 0x0
53829 
53830 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK8 register field. */
53831 #define ALT_USB_DEV_DAINTMSK_INEPMSK8_LSB 8
53832 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK8 register field. */
53833 #define ALT_USB_DEV_DAINTMSK_INEPMSK8_MSB 8
53834 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK8 register field. */
53835 #define ALT_USB_DEV_DAINTMSK_INEPMSK8_WIDTH 1
53836 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK8 register field value. */
53837 #define ALT_USB_DEV_DAINTMSK_INEPMSK8_SET_MSK 0x00000100
53838 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK8 register field value. */
53839 #define ALT_USB_DEV_DAINTMSK_INEPMSK8_CLR_MSK 0xfffffeff
53840 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK8 register field. */
53841 #define ALT_USB_DEV_DAINTMSK_INEPMSK8_RESET 0x0
53842 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK8 field value from a register. */
53843 #define ALT_USB_DEV_DAINTMSK_INEPMSK8_GET(value) (((value) & 0x00000100) >> 8)
53844 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK8 register field value suitable for setting the register. */
53845 #define ALT_USB_DEV_DAINTMSK_INEPMSK8_SET(value) (((value) << 8) & 0x00000100)
53846 
53847 /*
53848  * Field : IN Endpoint 9 Interrupt mask Bit - inepmsk9
53849  *
53850  * Field Enumeration Values:
53851  *
53852  * Enum | Value | Description
53853  * :--------------------------------------|:------|:-----------------------------
53854  * ALT_USB_DEV_DAINTMSK_INEPMSK9_E_NOMSK | 0x1 | No Interrupt mask
53855  * ALT_USB_DEV_DAINTMSK_INEPMSK9_E_MSK | 0x0 | IN Endpoint 0 Interrupt mask
53856  *
53857  * Field Access Macros:
53858  *
53859  */
53860 /*
53861  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK9
53862  *
53863  * No Interrupt mask
53864  */
53865 #define ALT_USB_DEV_DAINTMSK_INEPMSK9_E_NOMSK 0x1
53866 /*
53867  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK9
53868  *
53869  * IN Endpoint 0 Interrupt mask
53870  */
53871 #define ALT_USB_DEV_DAINTMSK_INEPMSK9_E_MSK 0x0
53872 
53873 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK9 register field. */
53874 #define ALT_USB_DEV_DAINTMSK_INEPMSK9_LSB 9
53875 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK9 register field. */
53876 #define ALT_USB_DEV_DAINTMSK_INEPMSK9_MSB 9
53877 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK9 register field. */
53878 #define ALT_USB_DEV_DAINTMSK_INEPMSK9_WIDTH 1
53879 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK9 register field value. */
53880 #define ALT_USB_DEV_DAINTMSK_INEPMSK9_SET_MSK 0x00000200
53881 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK9 register field value. */
53882 #define ALT_USB_DEV_DAINTMSK_INEPMSK9_CLR_MSK 0xfffffdff
53883 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK9 register field. */
53884 #define ALT_USB_DEV_DAINTMSK_INEPMSK9_RESET 0x0
53885 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK9 field value from a register. */
53886 #define ALT_USB_DEV_DAINTMSK_INEPMSK9_GET(value) (((value) & 0x00000200) >> 9)
53887 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK9 register field value suitable for setting the register. */
53888 #define ALT_USB_DEV_DAINTMSK_INEPMSK9_SET(value) (((value) << 9) & 0x00000200)
53889 
53890 /*
53891  * Field : IN Endpoint 10 Interrupt mask Bit - inepmsk10
53892  *
53893  * Field Enumeration Values:
53894  *
53895  * Enum | Value | Description
53896  * :---------------------------------------|:------|:------------------------------
53897  * ALT_USB_DEV_DAINTMSK_INEPMSK10_E_NOMSK | 0x1 | No Interrupt mask
53898  * ALT_USB_DEV_DAINTMSK_INEPMSK10_E_MSK | 0x0 | IN Endpoint 10 Interrupt mask
53899  *
53900  * Field Access Macros:
53901  *
53902  */
53903 /*
53904  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK10
53905  *
53906  * No Interrupt mask
53907  */
53908 #define ALT_USB_DEV_DAINTMSK_INEPMSK10_E_NOMSK 0x1
53909 /*
53910  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK10
53911  *
53912  * IN Endpoint 10 Interrupt mask
53913  */
53914 #define ALT_USB_DEV_DAINTMSK_INEPMSK10_E_MSK 0x0
53915 
53916 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK10 register field. */
53917 #define ALT_USB_DEV_DAINTMSK_INEPMSK10_LSB 10
53918 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK10 register field. */
53919 #define ALT_USB_DEV_DAINTMSK_INEPMSK10_MSB 10
53920 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK10 register field. */
53921 #define ALT_USB_DEV_DAINTMSK_INEPMSK10_WIDTH 1
53922 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK10 register field value. */
53923 #define ALT_USB_DEV_DAINTMSK_INEPMSK10_SET_MSK 0x00000400
53924 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK10 register field value. */
53925 #define ALT_USB_DEV_DAINTMSK_INEPMSK10_CLR_MSK 0xfffffbff
53926 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK10 register field. */
53927 #define ALT_USB_DEV_DAINTMSK_INEPMSK10_RESET 0x0
53928 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK10 field value from a register. */
53929 #define ALT_USB_DEV_DAINTMSK_INEPMSK10_GET(value) (((value) & 0x00000400) >> 10)
53930 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK10 register field value suitable for setting the register. */
53931 #define ALT_USB_DEV_DAINTMSK_INEPMSK10_SET(value) (((value) << 10) & 0x00000400)
53932 
53933 /*
53934  * Field : IN Endpoint 11 Interrupt mask Bit - inepmsk11
53935  *
53936  * Field Enumeration Values:
53937  *
53938  * Enum | Value | Description
53939  * :---------------------------------------|:------|:------------------------------
53940  * ALT_USB_DEV_DAINTMSK_INEPMSK11_E_NOMSK | 0x1 | No Interrupt mask
53941  * ALT_USB_DEV_DAINTMSK_INEPMSK11_E_MSK | 0x0 | IN Endpoint 11 Interrupt mask
53942  *
53943  * Field Access Macros:
53944  *
53945  */
53946 /*
53947  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK11
53948  *
53949  * No Interrupt mask
53950  */
53951 #define ALT_USB_DEV_DAINTMSK_INEPMSK11_E_NOMSK 0x1
53952 /*
53953  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK11
53954  *
53955  * IN Endpoint 11 Interrupt mask
53956  */
53957 #define ALT_USB_DEV_DAINTMSK_INEPMSK11_E_MSK 0x0
53958 
53959 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK11 register field. */
53960 #define ALT_USB_DEV_DAINTMSK_INEPMSK11_LSB 11
53961 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK11 register field. */
53962 #define ALT_USB_DEV_DAINTMSK_INEPMSK11_MSB 11
53963 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK11 register field. */
53964 #define ALT_USB_DEV_DAINTMSK_INEPMSK11_WIDTH 1
53965 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK11 register field value. */
53966 #define ALT_USB_DEV_DAINTMSK_INEPMSK11_SET_MSK 0x00000800
53967 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK11 register field value. */
53968 #define ALT_USB_DEV_DAINTMSK_INEPMSK11_CLR_MSK 0xfffff7ff
53969 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK11 register field. */
53970 #define ALT_USB_DEV_DAINTMSK_INEPMSK11_RESET 0x0
53971 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK11 field value from a register. */
53972 #define ALT_USB_DEV_DAINTMSK_INEPMSK11_GET(value) (((value) & 0x00000800) >> 11)
53973 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK11 register field value suitable for setting the register. */
53974 #define ALT_USB_DEV_DAINTMSK_INEPMSK11_SET(value) (((value) << 11) & 0x00000800)
53975 
53976 /*
53977  * Field : IN Endpoint 12 Interrupt mask Bit - inepmsk12
53978  *
53979  * Field Enumeration Values:
53980  *
53981  * Enum | Value | Description
53982  * :---------------------------------------|:------|:------------------------------
53983  * ALT_USB_DEV_DAINTMSK_INEPMSK12_E_NOMSK | 0x1 | No Interrupt mask
53984  * ALT_USB_DEV_DAINTMSK_INEPMSK12_E_MSK | 0x0 | IN Endpoint 12 Interrupt mask
53985  *
53986  * Field Access Macros:
53987  *
53988  */
53989 /*
53990  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK12
53991  *
53992  * No Interrupt mask
53993  */
53994 #define ALT_USB_DEV_DAINTMSK_INEPMSK12_E_NOMSK 0x1
53995 /*
53996  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK12
53997  *
53998  * IN Endpoint 12 Interrupt mask
53999  */
54000 #define ALT_USB_DEV_DAINTMSK_INEPMSK12_E_MSK 0x0
54001 
54002 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK12 register field. */
54003 #define ALT_USB_DEV_DAINTMSK_INEPMSK12_LSB 12
54004 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK12 register field. */
54005 #define ALT_USB_DEV_DAINTMSK_INEPMSK12_MSB 12
54006 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK12 register field. */
54007 #define ALT_USB_DEV_DAINTMSK_INEPMSK12_WIDTH 1
54008 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK12 register field value. */
54009 #define ALT_USB_DEV_DAINTMSK_INEPMSK12_SET_MSK 0x00001000
54010 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK12 register field value. */
54011 #define ALT_USB_DEV_DAINTMSK_INEPMSK12_CLR_MSK 0xffffefff
54012 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK12 register field. */
54013 #define ALT_USB_DEV_DAINTMSK_INEPMSK12_RESET 0x0
54014 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK12 field value from a register. */
54015 #define ALT_USB_DEV_DAINTMSK_INEPMSK12_GET(value) (((value) & 0x00001000) >> 12)
54016 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK12 register field value suitable for setting the register. */
54017 #define ALT_USB_DEV_DAINTMSK_INEPMSK12_SET(value) (((value) << 12) & 0x00001000)
54018 
54019 /*
54020  * Field : IN Endpoint 13 Interrupt mask Bit - InEpMsk13
54021  *
54022  * Field Enumeration Values:
54023  *
54024  * Enum | Value | Description
54025  * :---------------------------------------|:------|:------------------------------
54026  * ALT_USB_DEV_DAINTMSK_INEPMSK13_E_NOMSK | 0x1 | No Interrupt mask
54027  * ALT_USB_DEV_DAINTMSK_INEPMSK13_E_MSK | 0x0 | IN Endpoint 13 Interrupt mask
54028  *
54029  * Field Access Macros:
54030  *
54031  */
54032 /*
54033  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK13
54034  *
54035  * No Interrupt mask
54036  */
54037 #define ALT_USB_DEV_DAINTMSK_INEPMSK13_E_NOMSK 0x1
54038 /*
54039  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK13
54040  *
54041  * IN Endpoint 13 Interrupt mask
54042  */
54043 #define ALT_USB_DEV_DAINTMSK_INEPMSK13_E_MSK 0x0
54044 
54045 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK13 register field. */
54046 #define ALT_USB_DEV_DAINTMSK_INEPMSK13_LSB 13
54047 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK13 register field. */
54048 #define ALT_USB_DEV_DAINTMSK_INEPMSK13_MSB 13
54049 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK13 register field. */
54050 #define ALT_USB_DEV_DAINTMSK_INEPMSK13_WIDTH 1
54051 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK13 register field value. */
54052 #define ALT_USB_DEV_DAINTMSK_INEPMSK13_SET_MSK 0x00002000
54053 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK13 register field value. */
54054 #define ALT_USB_DEV_DAINTMSK_INEPMSK13_CLR_MSK 0xffffdfff
54055 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK13 register field. */
54056 #define ALT_USB_DEV_DAINTMSK_INEPMSK13_RESET 0x0
54057 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK13 field value from a register. */
54058 #define ALT_USB_DEV_DAINTMSK_INEPMSK13_GET(value) (((value) & 0x00002000) >> 13)
54059 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK13 register field value suitable for setting the register. */
54060 #define ALT_USB_DEV_DAINTMSK_INEPMSK13_SET(value) (((value) << 13) & 0x00002000)
54061 
54062 /*
54063  * Field : IN Endpoint 14 Interrupt mask Bit - inepmsk14
54064  *
54065  * Field Enumeration Values:
54066  *
54067  * Enum | Value | Description
54068  * :---------------------------------------|:------|:------------------------------
54069  * ALT_USB_DEV_DAINTMSK_INEPMSK14_E_NOMSK | 0x1 | No Interrupt mask
54070  * ALT_USB_DEV_DAINTMSK_INEPMSK14_E_MSK | 0x0 | IN Endpoint 14 Interrupt mask
54071  *
54072  * Field Access Macros:
54073  *
54074  */
54075 /*
54076  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK14
54077  *
54078  * No Interrupt mask
54079  */
54080 #define ALT_USB_DEV_DAINTMSK_INEPMSK14_E_NOMSK 0x1
54081 /*
54082  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK14
54083  *
54084  * IN Endpoint 14 Interrupt mask
54085  */
54086 #define ALT_USB_DEV_DAINTMSK_INEPMSK14_E_MSK 0x0
54087 
54088 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK14 register field. */
54089 #define ALT_USB_DEV_DAINTMSK_INEPMSK14_LSB 14
54090 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK14 register field. */
54091 #define ALT_USB_DEV_DAINTMSK_INEPMSK14_MSB 14
54092 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK14 register field. */
54093 #define ALT_USB_DEV_DAINTMSK_INEPMSK14_WIDTH 1
54094 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK14 register field value. */
54095 #define ALT_USB_DEV_DAINTMSK_INEPMSK14_SET_MSK 0x00004000
54096 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK14 register field value. */
54097 #define ALT_USB_DEV_DAINTMSK_INEPMSK14_CLR_MSK 0xffffbfff
54098 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK14 register field. */
54099 #define ALT_USB_DEV_DAINTMSK_INEPMSK14_RESET 0x0
54100 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK14 field value from a register. */
54101 #define ALT_USB_DEV_DAINTMSK_INEPMSK14_GET(value) (((value) & 0x00004000) >> 14)
54102 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK14 register field value suitable for setting the register. */
54103 #define ALT_USB_DEV_DAINTMSK_INEPMSK14_SET(value) (((value) << 14) & 0x00004000)
54104 
54105 /*
54106  * Field : InEpMsk15
54107  *
54108  * IN Endpoint 15 Interrupt mask Bit
54109  *
54110  * Field Enumeration Values:
54111  *
54112  * Enum | Value | Description
54113  * :---------------------------------------|:------|:-----------------------------
54114  * ALT_USB_DEV_DAINTMSK_INEPMSK15_E_INACT | 0x0 | No Interrupt mask
54115  * ALT_USB_DEV_DAINTMSK_INEPMSK15_E_ACT | 0x1 | IN Endpoint 0 Interrupt mask
54116  *
54117  * Field Access Macros:
54118  *
54119  */
54120 /*
54121  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK15
54122  *
54123  * No Interrupt mask
54124  */
54125 #define ALT_USB_DEV_DAINTMSK_INEPMSK15_E_INACT 0x0
54126 /*
54127  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_INEPMSK15
54128  *
54129  * IN Endpoint 0 Interrupt mask
54130  */
54131 #define ALT_USB_DEV_DAINTMSK_INEPMSK15_E_ACT 0x1
54132 
54133 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK15 register field. */
54134 #define ALT_USB_DEV_DAINTMSK_INEPMSK15_LSB 15
54135 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_INEPMSK15 register field. */
54136 #define ALT_USB_DEV_DAINTMSK_INEPMSK15_MSB 15
54137 /* The width in bits of the ALT_USB_DEV_DAINTMSK_INEPMSK15 register field. */
54138 #define ALT_USB_DEV_DAINTMSK_INEPMSK15_WIDTH 1
54139 /* The mask used to set the ALT_USB_DEV_DAINTMSK_INEPMSK15 register field value. */
54140 #define ALT_USB_DEV_DAINTMSK_INEPMSK15_SET_MSK 0x00008000
54141 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_INEPMSK15 register field value. */
54142 #define ALT_USB_DEV_DAINTMSK_INEPMSK15_CLR_MSK 0xffff7fff
54143 /* The reset value of the ALT_USB_DEV_DAINTMSK_INEPMSK15 register field. */
54144 #define ALT_USB_DEV_DAINTMSK_INEPMSK15_RESET 0x0
54145 /* Extracts the ALT_USB_DEV_DAINTMSK_INEPMSK15 field value from a register. */
54146 #define ALT_USB_DEV_DAINTMSK_INEPMSK15_GET(value) (((value) & 0x00008000) >> 15)
54147 /* Produces a ALT_USB_DEV_DAINTMSK_INEPMSK15 register field value suitable for setting the register. */
54148 #define ALT_USB_DEV_DAINTMSK_INEPMSK15_SET(value) (((value) << 15) & 0x00008000)
54149 
54150 /*
54151  * Field : OUT Endpoint 0 Interrupt mask Bit - outepmsk0
54152  *
54153  * Field Enumeration Values:
54154  *
54155  * Enum | Value | Description
54156  * :---------------------------------------|:------|:------------------------------
54157  * ALT_USB_DEV_DAINTMSK_OUTEPMSK0_E_NOMSK | 0x1 | No Interrupt mask
54158  * ALT_USB_DEV_DAINTMSK_OUTEPMSK0_E_MSK | 0x0 | OUT Endpoint 0 Interrupt mask
54159  *
54160  * Field Access Macros:
54161  *
54162  */
54163 /*
54164  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK0
54165  *
54166  * No Interrupt mask
54167  */
54168 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK0_E_NOMSK 0x1
54169 /*
54170  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK0
54171  *
54172  * OUT Endpoint 0 Interrupt mask
54173  */
54174 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK0_E_MSK 0x0
54175 
54176 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK0 register field. */
54177 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK0_LSB 16
54178 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK0 register field. */
54179 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK0_MSB 16
54180 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK0 register field. */
54181 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK0_WIDTH 1
54182 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK0 register field value. */
54183 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK0_SET_MSK 0x00010000
54184 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK0 register field value. */
54185 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK0_CLR_MSK 0xfffeffff
54186 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK0 register field. */
54187 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK0_RESET 0x0
54188 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK0 field value from a register. */
54189 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK0_GET(value) (((value) & 0x00010000) >> 16)
54190 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK0 register field value suitable for setting the register. */
54191 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK0_SET(value) (((value) << 16) & 0x00010000)
54192 
54193 /*
54194  * Field : OUT Endpoint 1 Interrupt mask Bit - outepmsk1
54195  *
54196  * Field Enumeration Values:
54197  *
54198  * Enum | Value | Description
54199  * :---------------------------------------|:------|:------------------------------
54200  * ALT_USB_DEV_DAINTMSK_OUTEPMSK1_E_NOMSK | 0x1 | No Interrupt mask
54201  * ALT_USB_DEV_DAINTMSK_OUTEPMSK1_E_MSK | 0x0 | OUT Endpoint 1 Interrupt mask
54202  *
54203  * Field Access Macros:
54204  *
54205  */
54206 /*
54207  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK1
54208  *
54209  * No Interrupt mask
54210  */
54211 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK1_E_NOMSK 0x1
54212 /*
54213  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK1
54214  *
54215  * OUT Endpoint 1 Interrupt mask
54216  */
54217 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK1_E_MSK 0x0
54218 
54219 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK1 register field. */
54220 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK1_LSB 17
54221 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK1 register field. */
54222 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK1_MSB 17
54223 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK1 register field. */
54224 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK1_WIDTH 1
54225 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK1 register field value. */
54226 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK1_SET_MSK 0x00020000
54227 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK1 register field value. */
54228 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK1_CLR_MSK 0xfffdffff
54229 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK1 register field. */
54230 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK1_RESET 0x0
54231 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK1 field value from a register. */
54232 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK1_GET(value) (((value) & 0x00020000) >> 17)
54233 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK1 register field value suitable for setting the register. */
54234 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK1_SET(value) (((value) << 17) & 0x00020000)
54235 
54236 /*
54237  * Field : OUT Endpoint 2 Interrupt mask Bi - outepmsk2
54238  *
54239  * Field Enumeration Values:
54240  *
54241  * Enum | Value | Description
54242  * :---------------------------------------|:------|:------------------------------
54243  * ALT_USB_DEV_DAINTMSK_OUTEPMSK2_E_NOMSK | 0x1 | No Interrupt mask
54244  * ALT_USB_DEV_DAINTMSK_OUTEPMSK2_E_MSK | 0x0 | OUT Endpoint 2 Interrupt mask
54245  *
54246  * Field Access Macros:
54247  *
54248  */
54249 /*
54250  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK2
54251  *
54252  * No Interrupt mask
54253  */
54254 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK2_E_NOMSK 0x1
54255 /*
54256  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK2
54257  *
54258  * OUT Endpoint 2 Interrupt mask
54259  */
54260 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK2_E_MSK 0x0
54261 
54262 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK2 register field. */
54263 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK2_LSB 18
54264 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK2 register field. */
54265 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK2_MSB 18
54266 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK2 register field. */
54267 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK2_WIDTH 1
54268 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK2 register field value. */
54269 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK2_SET_MSK 0x00040000
54270 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK2 register field value. */
54271 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK2_CLR_MSK 0xfffbffff
54272 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK2 register field. */
54273 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK2_RESET 0x0
54274 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK2 field value from a register. */
54275 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK2_GET(value) (((value) & 0x00040000) >> 18)
54276 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK2 register field value suitable for setting the register. */
54277 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK2_SET(value) (((value) << 18) & 0x00040000)
54278 
54279 /*
54280  * Field : OUT Endpoint 3 Interrupt mask Bi - OutEPMsk3
54281  *
54282  * Field Enumeration Values:
54283  *
54284  * Enum | Value | Description
54285  * :---------------------------------------|:------|:------------------------------
54286  * ALT_USB_DEV_DAINTMSK_OUTEPMSK3_E_NOMSK | 0x1 | No Interrupt mask
54287  * ALT_USB_DEV_DAINTMSK_OUTEPMSK3_E_MSK | 0x0 | OUT Endpoint 3 Interrupt mask
54288  *
54289  * Field Access Macros:
54290  *
54291  */
54292 /*
54293  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK3
54294  *
54295  * No Interrupt mask
54296  */
54297 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK3_E_NOMSK 0x1
54298 /*
54299  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK3
54300  *
54301  * OUT Endpoint 3 Interrupt mask
54302  */
54303 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK3_E_MSK 0x0
54304 
54305 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK3 register field. */
54306 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK3_LSB 19
54307 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK3 register field. */
54308 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK3_MSB 19
54309 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK3 register field. */
54310 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK3_WIDTH 1
54311 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK3 register field value. */
54312 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK3_SET_MSK 0x00080000
54313 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK3 register field value. */
54314 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK3_CLR_MSK 0xfff7ffff
54315 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK3 register field. */
54316 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK3_RESET 0x0
54317 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK3 field value from a register. */
54318 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK3_GET(value) (((value) & 0x00080000) >> 19)
54319 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK3 register field value suitable for setting the register. */
54320 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK3_SET(value) (((value) << 19) & 0x00080000)
54321 
54322 /*
54323  * Field : OUT Endpoint 4 Interrupt mask Bit - outepmsk4
54324  *
54325  * Field Enumeration Values:
54326  *
54327  * Enum | Value | Description
54328  * :---------------------------------------|:------|:------------------------------
54329  * ALT_USB_DEV_DAINTMSK_OUTEPMSK4_E_NOMSK | 0x1 | No Interrupt mask
54330  * ALT_USB_DEV_DAINTMSK_OUTEPMSK4_E_MSK | 0x0 | OUT Endpoint 4 Interrupt mask
54331  *
54332  * Field Access Macros:
54333  *
54334  */
54335 /*
54336  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK4
54337  *
54338  * No Interrupt mask
54339  */
54340 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK4_E_NOMSK 0x1
54341 /*
54342  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK4
54343  *
54344  * OUT Endpoint 4 Interrupt mask
54345  */
54346 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK4_E_MSK 0x0
54347 
54348 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK4 register field. */
54349 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK4_LSB 20
54350 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK4 register field. */
54351 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK4_MSB 20
54352 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK4 register field. */
54353 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK4_WIDTH 1
54354 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK4 register field value. */
54355 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK4_SET_MSK 0x00100000
54356 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK4 register field value. */
54357 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK4_CLR_MSK 0xffefffff
54358 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK4 register field. */
54359 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK4_RESET 0x0
54360 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK4 field value from a register. */
54361 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK4_GET(value) (((value) & 0x00100000) >> 20)
54362 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK4 register field value suitable for setting the register. */
54363 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK4_SET(value) (((value) << 20) & 0x00100000)
54364 
54365 /*
54366  * Field : OUT Endpoint 5 Interrupt mask Bit - outepmsk5
54367  *
54368  * Field Enumeration Values:
54369  *
54370  * Enum | Value | Description
54371  * :---------------------------------------|:------|:------------------------------
54372  * ALT_USB_DEV_DAINTMSK_OUTEPMSK5_E_NOMSK | 0x1 | No Interrupt mask
54373  * ALT_USB_DEV_DAINTMSK_OUTEPMSK5_E_MSK | 0x0 | OUT Endpoint 5 Interrupt mask
54374  *
54375  * Field Access Macros:
54376  *
54377  */
54378 /*
54379  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK5
54380  *
54381  * No Interrupt mask
54382  */
54383 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK5_E_NOMSK 0x1
54384 /*
54385  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK5
54386  *
54387  * OUT Endpoint 5 Interrupt mask
54388  */
54389 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK5_E_MSK 0x0
54390 
54391 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK5 register field. */
54392 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK5_LSB 21
54393 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK5 register field. */
54394 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK5_MSB 21
54395 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK5 register field. */
54396 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK5_WIDTH 1
54397 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK5 register field value. */
54398 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK5_SET_MSK 0x00200000
54399 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK5 register field value. */
54400 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK5_CLR_MSK 0xffdfffff
54401 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK5 register field. */
54402 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK5_RESET 0x0
54403 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK5 field value from a register. */
54404 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK5_GET(value) (((value) & 0x00200000) >> 21)
54405 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK5 register field value suitable for setting the register. */
54406 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK5_SET(value) (((value) << 21) & 0x00200000)
54407 
54408 /*
54409  * Field : OUT Endpoint 6 Interrupt mask Bit - outepmsk6
54410  *
54411  * Field Enumeration Values:
54412  *
54413  * Enum | Value | Description
54414  * :---------------------------------------|:------|:------------------------------
54415  * ALT_USB_DEV_DAINTMSK_OUTEPMSK6_E_NOMSK | 0x1 | No Interrupt mask
54416  * ALT_USB_DEV_DAINTMSK_OUTEPMSK6_E_MSK | 0x0 | OUT Endpoint 6 Interrupt mask
54417  *
54418  * Field Access Macros:
54419  *
54420  */
54421 /*
54422  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK6
54423  *
54424  * No Interrupt mask
54425  */
54426 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK6_E_NOMSK 0x1
54427 /*
54428  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK6
54429  *
54430  * OUT Endpoint 6 Interrupt mask
54431  */
54432 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK6_E_MSK 0x0
54433 
54434 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK6 register field. */
54435 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK6_LSB 22
54436 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK6 register field. */
54437 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK6_MSB 22
54438 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK6 register field. */
54439 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK6_WIDTH 1
54440 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK6 register field value. */
54441 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK6_SET_MSK 0x00400000
54442 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK6 register field value. */
54443 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK6_CLR_MSK 0xffbfffff
54444 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK6 register field. */
54445 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK6_RESET 0x0
54446 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK6 field value from a register. */
54447 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK6_GET(value) (((value) & 0x00400000) >> 22)
54448 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK6 register field value suitable for setting the register. */
54449 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK6_SET(value) (((value) << 22) & 0x00400000)
54450 
54451 /*
54452  * Field : OUT Endpoint 7 Interrupt mask Bit - outepmsk7
54453  *
54454  * Field Enumeration Values:
54455  *
54456  * Enum | Value | Description
54457  * :---------------------------------------|:------|:------------------------------
54458  * ALT_USB_DEV_DAINTMSK_OUTEPMSK7_E_NOMSK | 0x1 | No Interrupt mask
54459  * ALT_USB_DEV_DAINTMSK_OUTEPMSK7_E_MSK | 0x0 | OUT Endpoint 7 Interrupt mask
54460  *
54461  * Field Access Macros:
54462  *
54463  */
54464 /*
54465  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK7
54466  *
54467  * No Interrupt mask
54468  */
54469 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK7_E_NOMSK 0x1
54470 /*
54471  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK7
54472  *
54473  * OUT Endpoint 7 Interrupt mask
54474  */
54475 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK7_E_MSK 0x0
54476 
54477 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK7 register field. */
54478 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK7_LSB 23
54479 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK7 register field. */
54480 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK7_MSB 23
54481 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK7 register field. */
54482 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK7_WIDTH 1
54483 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK7 register field value. */
54484 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK7_SET_MSK 0x00800000
54485 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK7 register field value. */
54486 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK7_CLR_MSK 0xff7fffff
54487 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK7 register field. */
54488 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK7_RESET 0x0
54489 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK7 field value from a register. */
54490 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK7_GET(value) (((value) & 0x00800000) >> 23)
54491 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK7 register field value suitable for setting the register. */
54492 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK7_SET(value) (((value) << 23) & 0x00800000)
54493 
54494 /*
54495  * Field : outepmsk8
54496  *
54497  * OUT Endpoint 8 Interrupt mask Bit
54498  *
54499  * Field Enumeration Values:
54500  *
54501  * Enum | Value | Description
54502  * :---------------------------------------|:------|:------------------------------
54503  * ALT_USB_DEV_DAINTMSK_OUTEPMSK8_E_NOMSK | 0x1 | No Interrupt mask
54504  * ALT_USB_DEV_DAINTMSK_OUTEPMSK8_E_MSK | 0x0 | OUT Endpoint 8 Interrupt mask
54505  *
54506  * Field Access Macros:
54507  *
54508  */
54509 /*
54510  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK8
54511  *
54512  * No Interrupt mask
54513  */
54514 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK8_E_NOMSK 0x1
54515 /*
54516  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK8
54517  *
54518  * OUT Endpoint 8 Interrupt mask
54519  */
54520 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK8_E_MSK 0x0
54521 
54522 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK8 register field. */
54523 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK8_LSB 24
54524 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK8 register field. */
54525 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK8_MSB 24
54526 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK8 register field. */
54527 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK8_WIDTH 1
54528 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK8 register field value. */
54529 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK8_SET_MSK 0x01000000
54530 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK8 register field value. */
54531 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK8_CLR_MSK 0xfeffffff
54532 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK8 register field. */
54533 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK8_RESET 0x0
54534 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK8 field value from a register. */
54535 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK8_GET(value) (((value) & 0x01000000) >> 24)
54536 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK8 register field value suitable for setting the register. */
54537 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK8_SET(value) (((value) << 24) & 0x01000000)
54538 
54539 /*
54540  * Field : OUT Endpoint 9 Interrupt mask Bit - outepmsk9
54541  *
54542  * Field Enumeration Values:
54543  *
54544  * Enum | Value | Description
54545  * :---------------------------------------|:------|:------------------------------
54546  * ALT_USB_DEV_DAINTMSK_OUTEPMSK9_E_NOMSK | 0x1 | No Interrupt mask
54547  * ALT_USB_DEV_DAINTMSK_OUTEPMSK9_E_MSK | 0x0 | OUT Endpoint 9 Interrupt mask
54548  *
54549  * Field Access Macros:
54550  *
54551  */
54552 /*
54553  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK9
54554  *
54555  * No Interrupt mask
54556  */
54557 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK9_E_NOMSK 0x1
54558 /*
54559  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK9
54560  *
54561  * OUT Endpoint 9 Interrupt mask
54562  */
54563 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK9_E_MSK 0x0
54564 
54565 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK9 register field. */
54566 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK9_LSB 25
54567 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK9 register field. */
54568 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK9_MSB 25
54569 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK9 register field. */
54570 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK9_WIDTH 1
54571 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK9 register field value. */
54572 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK9_SET_MSK 0x02000000
54573 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK9 register field value. */
54574 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK9_CLR_MSK 0xfdffffff
54575 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK9 register field. */
54576 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK9_RESET 0x0
54577 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK9 field value from a register. */
54578 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK9_GET(value) (((value) & 0x02000000) >> 25)
54579 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK9 register field value suitable for setting the register. */
54580 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK9_SET(value) (((value) << 25) & 0x02000000)
54581 
54582 /*
54583  * Field : OUT Endpoint 10 Interrupt mask Bi - outepmsk10
54584  *
54585  * Field Enumeration Values:
54586  *
54587  * Enum | Value | Description
54588  * :----------------------------------------|:------|:-------------------------------
54589  * ALT_USB_DEV_DAINTMSK_OUTEPMSK10_E_NOMSK | 0x1 | No Interrupt mask
54590  * ALT_USB_DEV_DAINTMSK_OUTEPMSK10_E_MSK | 0x0 | OUT Endpoint 10 Interrupt mask
54591  *
54592  * Field Access Macros:
54593  *
54594  */
54595 /*
54596  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK10
54597  *
54598  * No Interrupt mask
54599  */
54600 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK10_E_NOMSK 0x1
54601 /*
54602  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK10
54603  *
54604  * OUT Endpoint 10 Interrupt mask
54605  */
54606 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK10_E_MSK 0x0
54607 
54608 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK10 register field. */
54609 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK10_LSB 26
54610 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK10 register field. */
54611 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK10_MSB 26
54612 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK10 register field. */
54613 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK10_WIDTH 1
54614 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK10 register field value. */
54615 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK10_SET_MSK 0x04000000
54616 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK10 register field value. */
54617 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK10_CLR_MSK 0xfbffffff
54618 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK10 register field. */
54619 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK10_RESET 0x0
54620 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK10 field value from a register. */
54621 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK10_GET(value) (((value) & 0x04000000) >> 26)
54622 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK10 register field value suitable for setting the register. */
54623 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK10_SET(value) (((value) << 26) & 0x04000000)
54624 
54625 /*
54626  * Field : OUT Endpoint 11 Interrupt mask Bit - outepmsk11
54627  *
54628  * Field Enumeration Values:
54629  *
54630  * Enum | Value | Description
54631  * :----------------------------------------|:------|:-------------------------------
54632  * ALT_USB_DEV_DAINTMSK_OUTEPMSK11_E_NOMSK | 0x1 | No Interrupt mask
54633  * ALT_USB_DEV_DAINTMSK_OUTEPMSK11_E_MSK | 0x0 | OUT Endpoint 11 Interrupt mask
54634  *
54635  * Field Access Macros:
54636  *
54637  */
54638 /*
54639  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK11
54640  *
54641  * No Interrupt mask
54642  */
54643 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK11_E_NOMSK 0x1
54644 /*
54645  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK11
54646  *
54647  * OUT Endpoint 11 Interrupt mask
54648  */
54649 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK11_E_MSK 0x0
54650 
54651 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK11 register field. */
54652 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK11_LSB 27
54653 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK11 register field. */
54654 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK11_MSB 27
54655 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK11 register field. */
54656 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK11_WIDTH 1
54657 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK11 register field value. */
54658 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK11_SET_MSK 0x08000000
54659 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK11 register field value. */
54660 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK11_CLR_MSK 0xf7ffffff
54661 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK11 register field. */
54662 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK11_RESET 0x0
54663 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK11 field value from a register. */
54664 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK11_GET(value) (((value) & 0x08000000) >> 27)
54665 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK11 register field value suitable for setting the register. */
54666 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK11_SET(value) (((value) << 27) & 0x08000000)
54667 
54668 /*
54669  * Field : OUT Endpoint 12 Interrupt mask Bit - outepmsk12
54670  *
54671  * Field Enumeration Values:
54672  *
54673  * Enum | Value | Description
54674  * :----------------------------------------|:------|:-------------------------------
54675  * ALT_USB_DEV_DAINTMSK_OUTEPMSK12_E_NOMSK | 0x1 | No Interrupt mask
54676  * ALT_USB_DEV_DAINTMSK_OUTEPMSK12_E_MSK | 0x0 | OUT Endpoint 12 Interrupt mask
54677  *
54678  * Field Access Macros:
54679  *
54680  */
54681 /*
54682  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK12
54683  *
54684  * No Interrupt mask
54685  */
54686 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK12_E_NOMSK 0x1
54687 /*
54688  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK12
54689  *
54690  * OUT Endpoint 12 Interrupt mask
54691  */
54692 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK12_E_MSK 0x0
54693 
54694 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK12 register field. */
54695 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK12_LSB 28
54696 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK12 register field. */
54697 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK12_MSB 28
54698 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK12 register field. */
54699 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK12_WIDTH 1
54700 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK12 register field value. */
54701 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK12_SET_MSK 0x10000000
54702 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK12 register field value. */
54703 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK12_CLR_MSK 0xefffffff
54704 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK12 register field. */
54705 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK12_RESET 0x0
54706 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK12 field value from a register. */
54707 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK12_GET(value) (((value) & 0x10000000) >> 28)
54708 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK12 register field value suitable for setting the register. */
54709 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK12_SET(value) (((value) << 28) & 0x10000000)
54710 
54711 /*
54712  * Field : OUT Endpoint 13 Interrupt mask Bit - outepmsk13
54713  *
54714  * Field Enumeration Values:
54715  *
54716  * Enum | Value | Description
54717  * :----------------------------------------|:------|:-------------------------------
54718  * ALT_USB_DEV_DAINTMSK_OUTEPMSK13_E_NOMSK | 0x1 | No Interrupt mask
54719  * ALT_USB_DEV_DAINTMSK_OUTEPMSK13_E_MSK | 0x0 | OUT Endpoint 13 Interrupt mask
54720  *
54721  * Field Access Macros:
54722  *
54723  */
54724 /*
54725  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK13
54726  *
54727  * No Interrupt mask
54728  */
54729 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK13_E_NOMSK 0x1
54730 /*
54731  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK13
54732  *
54733  * OUT Endpoint 13 Interrupt mask
54734  */
54735 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK13_E_MSK 0x0
54736 
54737 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK13 register field. */
54738 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK13_LSB 29
54739 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK13 register field. */
54740 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK13_MSB 29
54741 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK13 register field. */
54742 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK13_WIDTH 1
54743 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK13 register field value. */
54744 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK13_SET_MSK 0x20000000
54745 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK13 register field value. */
54746 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK13_CLR_MSK 0xdfffffff
54747 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK13 register field. */
54748 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK13_RESET 0x0
54749 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK13 field value from a register. */
54750 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK13_GET(value) (((value) & 0x20000000) >> 29)
54751 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK13 register field value suitable for setting the register. */
54752 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK13_SET(value) (((value) << 29) & 0x20000000)
54753 
54754 /*
54755  * Field : OUT Endpoint 14 Interrupt mask Bit - OutEPMsk14
54756  *
54757  * Field Enumeration Values:
54758  *
54759  * Enum | Value | Description
54760  * :----------------------------------------|:------|:-------------------------------
54761  * ALT_USB_DEV_DAINTMSK_OUTEPMSK14_E_NOMSK | 0x1 | No Interrupt mask
54762  * ALT_USB_DEV_DAINTMSK_OUTEPMSK14_E_MSK | 0x0 | OUT Endpoint 14 Interrupt mask
54763  *
54764  * Field Access Macros:
54765  *
54766  */
54767 /*
54768  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK14
54769  *
54770  * No Interrupt mask
54771  */
54772 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK14_E_NOMSK 0x1
54773 /*
54774  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK14
54775  *
54776  * OUT Endpoint 14 Interrupt mask
54777  */
54778 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK14_E_MSK 0x0
54779 
54780 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK14 register field. */
54781 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK14_LSB 30
54782 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK14 register field. */
54783 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK14_MSB 30
54784 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK14 register field. */
54785 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK14_WIDTH 1
54786 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK14 register field value. */
54787 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK14_SET_MSK 0x40000000
54788 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK14 register field value. */
54789 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK14_CLR_MSK 0xbfffffff
54790 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK14 register field. */
54791 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK14_RESET 0x0
54792 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK14 field value from a register. */
54793 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK14_GET(value) (((value) & 0x40000000) >> 30)
54794 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK14 register field value suitable for setting the register. */
54795 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK14_SET(value) (((value) << 30) & 0x40000000)
54796 
54797 /*
54798  * Field : OUT Endpoint 15 Interrupt mask Bit - outepmsk15
54799  *
54800  * Field Enumeration Values:
54801  *
54802  * Enum | Value | Description
54803  * :----------------------------------------|:------|:-------------------------------
54804  * ALT_USB_DEV_DAINTMSK_OUTEPMSK15_E_NOMSK | 0x1 | No Interrupt mask
54805  * ALT_USB_DEV_DAINTMSK_OUTEPMSK15_E_MSK | 0x0 | OUT Endpoint 15 Interrupt mask
54806  *
54807  * Field Access Macros:
54808  *
54809  */
54810 /*
54811  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK15
54812  *
54813  * No Interrupt mask
54814  */
54815 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK15_E_NOMSK 0x1
54816 /*
54817  * Enumerated value for register field ALT_USB_DEV_DAINTMSK_OUTEPMSK15
54818  *
54819  * OUT Endpoint 15 Interrupt mask
54820  */
54821 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK15_E_MSK 0x0
54822 
54823 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK15 register field. */
54824 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK15_LSB 31
54825 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DAINTMSK_OUTEPMSK15 register field. */
54826 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK15_MSB 31
54827 /* The width in bits of the ALT_USB_DEV_DAINTMSK_OUTEPMSK15 register field. */
54828 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK15_WIDTH 1
54829 /* The mask used to set the ALT_USB_DEV_DAINTMSK_OUTEPMSK15 register field value. */
54830 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK15_SET_MSK 0x80000000
54831 /* The mask used to clear the ALT_USB_DEV_DAINTMSK_OUTEPMSK15 register field value. */
54832 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK15_CLR_MSK 0x7fffffff
54833 /* The reset value of the ALT_USB_DEV_DAINTMSK_OUTEPMSK15 register field. */
54834 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK15_RESET 0x0
54835 /* Extracts the ALT_USB_DEV_DAINTMSK_OUTEPMSK15 field value from a register. */
54836 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK15_GET(value) (((value) & 0x80000000) >> 31)
54837 /* Produces a ALT_USB_DEV_DAINTMSK_OUTEPMSK15 register field value suitable for setting the register. */
54838 #define ALT_USB_DEV_DAINTMSK_OUTEPMSK15_SET(value) (((value) << 31) & 0x80000000)
54839 
54840 #ifndef __ASSEMBLY__
54841 /*
54842  * WARNING: The C register and register group struct declarations are provided for
54843  * convenience and illustrative purposes. They should, however, be used with
54844  * caution as the C language standard provides no guarantees about the alignment or
54845  * atomicity of device memory accesses. The recommended practice for writing
54846  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
54847  * alt_write_word() functions.
54848  *
54849  * The struct declaration for register ALT_USB_DEV_DAINTMSK.
54850  */
54851 struct ALT_USB_DEV_DAINTMSK_s
54852 {
54853  uint32_t inepmsk0 : 1; /* IN Endpoint 0 Interrupt mask Bit */
54854  uint32_t inepmsk1 : 1; /* IN Endpoint 1 Interrupt mask Bit */
54855  uint32_t inepmsk2 : 1; /* N Endpoint 2 Interrupt mask Bit */
54856  uint32_t inepmsk3 : 1; /* ALT_USB_DEV_DAINTMSK_INEPMSK3 */
54857  uint32_t inepmsk4 : 1; /* IN Endpoint 4 Interrupt mask Bit */
54858  uint32_t inepmsk5 : 1; /* IN Endpoint 5 Interrupt mask Bit */
54859  uint32_t inepmsk6 : 1; /* IN Endpoint 6 Interrupt mask Bit */
54860  uint32_t inepmsk7 : 1; /* IN Endpoint 7 Interrupt mask Bit */
54861  uint32_t inepmsk8 : 1; /* IN Endpoint 8 Interrupt mask Bit */
54862  uint32_t inepmsk9 : 1; /* IN Endpoint 9 Interrupt mask Bit */
54863  uint32_t inepmsk10 : 1; /* IN Endpoint 10 Interrupt mask Bit */
54864  uint32_t inepmsk11 : 1; /* IN Endpoint 11 Interrupt mask Bit */
54865  uint32_t inepmsk12 : 1; /* IN Endpoint 12 Interrupt mask Bit */
54866  uint32_t InEpMsk13 : 1; /* IN Endpoint 13 Interrupt mask Bit */
54867  uint32_t inepmsk14 : 1; /* IN Endpoint 14 Interrupt mask Bit */
54868  uint32_t InEpMsk15 : 1; /* ALT_USB_DEV_DAINTMSK_INEPMSK15 */
54869  uint32_t outepmsk0 : 1; /* OUT Endpoint 0 Interrupt mask Bit */
54870  uint32_t outepmsk1 : 1; /* OUT Endpoint 1 Interrupt mask Bit */
54871  uint32_t outepmsk2 : 1; /* OUT Endpoint 2 Interrupt mask Bi */
54872  uint32_t OutEPMsk3 : 1; /* OUT Endpoint 3 Interrupt mask Bi */
54873  uint32_t outepmsk4 : 1; /* OUT Endpoint 4 Interrupt mask Bit */
54874  uint32_t outepmsk5 : 1; /* OUT Endpoint 5 Interrupt mask Bit */
54875  uint32_t outepmsk6 : 1; /* OUT Endpoint 6 Interrupt mask Bit */
54876  uint32_t outepmsk7 : 1; /* OUT Endpoint 7 Interrupt mask Bit */
54877  uint32_t outepmsk8 : 1; /* ALT_USB_DEV_DAINTMSK_OUTEPMSK8 */
54878  uint32_t outepmsk9 : 1; /* OUT Endpoint 9 Interrupt mask Bit */
54879  uint32_t outepmsk10 : 1; /* OUT Endpoint 10 Interrupt mask Bi */
54880  uint32_t outepmsk11 : 1; /* OUT Endpoint 11 Interrupt mask Bit */
54881  uint32_t outepmsk12 : 1; /* OUT Endpoint 12 Interrupt mask Bit */
54882  uint32_t outepmsk13 : 1; /* OUT Endpoint 13 Interrupt mask Bit */
54883  uint32_t OutEPMsk14 : 1; /* OUT Endpoint 14 Interrupt mask Bit */
54884  uint32_t outepmsk15 : 1; /* OUT Endpoint 15 Interrupt mask Bit */
54885 };
54886 
54887 /* The typedef declaration for register ALT_USB_DEV_DAINTMSK. */
54888 typedef volatile struct ALT_USB_DEV_DAINTMSK_s ALT_USB_DEV_DAINTMSK_t;
54889 #endif /* __ASSEMBLY__ */
54890 
54891 /* The byte offset of the ALT_USB_DEV_DAINTMSK register from the beginning of the component. */
54892 #define ALT_USB_DEV_DAINTMSK_OFST 0x1c
54893 /* The address of the ALT_USB_DEV_DAINTMSK register. */
54894 #define ALT_USB_DEV_DAINTMSK_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DAINTMSK_OFST))
54895 
54896 /*
54897  * Register : Device VBUS Discharge Time Register - dvbusdis
54898  *
54899  * This register specifies the VBUS discharge time after VBUS pulsing during SRP.
54900  *
54901  * Register Layout
54902  *
54903  * Bits | Access | Reset | Description
54904  * :--------|:-------|:-------|:---------------------------
54905  * [15:0] | RW | 0x17d7 | Device VBUS Discharge Time
54906  * [31:16] | ??? | 0x0 | *UNDEFINED*
54907  *
54908  */
54909 /*
54910  * Field : Device VBUS Discharge Time - dvbusdis
54911  *
54912  * This value equals:
54913  *
54914  * VBUS discharge time in PHY clocks/1,024 The value you use depends whether the
54915  * PHY is operating at 30 MHz (16-bit data width) or 60 MHz (8-bit data width).
54916  * Depending on your VBUS load, this value can need adjustment.
54917  *
54918  * Field Access Macros:
54919  *
54920  */
54921 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DVBUSDIS_DVBUSDIS register field. */
54922 #define ALT_USB_DEV_DVBUSDIS_DVBUSDIS_LSB 0
54923 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DVBUSDIS_DVBUSDIS register field. */
54924 #define ALT_USB_DEV_DVBUSDIS_DVBUSDIS_MSB 15
54925 /* The width in bits of the ALT_USB_DEV_DVBUSDIS_DVBUSDIS register field. */
54926 #define ALT_USB_DEV_DVBUSDIS_DVBUSDIS_WIDTH 16
54927 /* The mask used to set the ALT_USB_DEV_DVBUSDIS_DVBUSDIS register field value. */
54928 #define ALT_USB_DEV_DVBUSDIS_DVBUSDIS_SET_MSK 0x0000ffff
54929 /* The mask used to clear the ALT_USB_DEV_DVBUSDIS_DVBUSDIS register field value. */
54930 #define ALT_USB_DEV_DVBUSDIS_DVBUSDIS_CLR_MSK 0xffff0000
54931 /* The reset value of the ALT_USB_DEV_DVBUSDIS_DVBUSDIS register field. */
54932 #define ALT_USB_DEV_DVBUSDIS_DVBUSDIS_RESET 0x17d7
54933 /* Extracts the ALT_USB_DEV_DVBUSDIS_DVBUSDIS field value from a register. */
54934 #define ALT_USB_DEV_DVBUSDIS_DVBUSDIS_GET(value) (((value) & 0x0000ffff) >> 0)
54935 /* Produces a ALT_USB_DEV_DVBUSDIS_DVBUSDIS register field value suitable for setting the register. */
54936 #define ALT_USB_DEV_DVBUSDIS_DVBUSDIS_SET(value) (((value) << 0) & 0x0000ffff)
54937 
54938 #ifndef __ASSEMBLY__
54939 /*
54940  * WARNING: The C register and register group struct declarations are provided for
54941  * convenience and illustrative purposes. They should, however, be used with
54942  * caution as the C language standard provides no guarantees about the alignment or
54943  * atomicity of device memory accesses. The recommended practice for writing
54944  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
54945  * alt_write_word() functions.
54946  *
54947  * The struct declaration for register ALT_USB_DEV_DVBUSDIS.
54948  */
54949 struct ALT_USB_DEV_DVBUSDIS_s
54950 {
54951  uint32_t dvbusdis : 16; /* Device VBUS Discharge Time */
54952  uint32_t : 16; /* *UNDEFINED* */
54953 };
54954 
54955 /* The typedef declaration for register ALT_USB_DEV_DVBUSDIS. */
54956 typedef volatile struct ALT_USB_DEV_DVBUSDIS_s ALT_USB_DEV_DVBUSDIS_t;
54957 #endif /* __ASSEMBLY__ */
54958 
54959 /* The byte offset of the ALT_USB_DEV_DVBUSDIS register from the beginning of the component. */
54960 #define ALT_USB_DEV_DVBUSDIS_OFST 0x28
54961 /* The address of the ALT_USB_DEV_DVBUSDIS register. */
54962 #define ALT_USB_DEV_DVBUSDIS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DVBUSDIS_OFST))
54963 
54964 /*
54965  * Register : Device VBUS Pulsing Time Register - dvbuspulse
54966  *
54967  * This register specifies the VBUS pulsing time during SRP.
54968  *
54969  * Register Layout
54970  *
54971  * Bits | Access | Reset | Description
54972  * :--------|:-------|:------|:-------------------------
54973  * [11:0] | RW | 0x5b8 | Device VBUS Pulsing Time
54974  * [31:12] | ??? | 0x0 | *UNDEFINED*
54975  *
54976  */
54977 /*
54978  * Field : Device VBUS Pulsing Time - dvbuspulse
54979  *
54980  * Specifies the VBUS pulsing time during SRP. This value equals:
54981  *
54982  * VBUS pulsing time in PHY clocks/1,024
54983  *
54984  * The value you use depends whether the PHY is operating at 30MHz (16-bit data
54985  * width) or 60 MHz (8-bit data width).
54986  *
54987  * Field Access Macros:
54988  *
54989  */
54990 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE register field. */
54991 #define ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE_LSB 0
54992 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE register field. */
54993 #define ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE_MSB 11
54994 /* The width in bits of the ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE register field. */
54995 #define ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE_WIDTH 12
54996 /* The mask used to set the ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE register field value. */
54997 #define ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE_SET_MSK 0x00000fff
54998 /* The mask used to clear the ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE register field value. */
54999 #define ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE_CLR_MSK 0xfffff000
55000 /* The reset value of the ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE register field. */
55001 #define ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE_RESET 0x5b8
55002 /* Extracts the ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE field value from a register. */
55003 #define ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE_GET(value) (((value) & 0x00000fff) >> 0)
55004 /* Produces a ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE register field value suitable for setting the register. */
55005 #define ALT_USB_DEV_DVBUSPULSE_DVBUSPULSE_SET(value) (((value) << 0) & 0x00000fff)
55006 
55007 #ifndef __ASSEMBLY__
55008 /*
55009  * WARNING: The C register and register group struct declarations are provided for
55010  * convenience and illustrative purposes. They should, however, be used with
55011  * caution as the C language standard provides no guarantees about the alignment or
55012  * atomicity of device memory accesses. The recommended practice for writing
55013  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
55014  * alt_write_word() functions.
55015  *
55016  * The struct declaration for register ALT_USB_DEV_DVBUSPULSE.
55017  */
55018 struct ALT_USB_DEV_DVBUSPULSE_s
55019 {
55020  uint32_t dvbuspulse : 12; /* Device VBUS Pulsing Time */
55021  uint32_t : 20; /* *UNDEFINED* */
55022 };
55023 
55024 /* The typedef declaration for register ALT_USB_DEV_DVBUSPULSE. */
55025 typedef volatile struct ALT_USB_DEV_DVBUSPULSE_s ALT_USB_DEV_DVBUSPULSE_t;
55026 #endif /* __ASSEMBLY__ */
55027 
55028 /* The byte offset of the ALT_USB_DEV_DVBUSPULSE register from the beginning of the component. */
55029 #define ALT_USB_DEV_DVBUSPULSE_OFST 0x2c
55030 /* The address of the ALT_USB_DEV_DVBUSPULSE register. */
55031 #define ALT_USB_DEV_DVBUSPULSE_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DVBUSPULSE_OFST))
55032 
55033 /*
55034  * Register : Device Threshold Control Register - dthrctl
55035  *
55036  * Thresholding is not supported in Slave mode and so this register must not be
55037  * programmed in Slave mode. for threshold support, the AHB must be run at 60 MHz
55038  * or higher.
55039  *
55040  * Register Layout
55041  *
55042  * Bits | Access | Reset | Description
55043  * :--------|:-------|:------|:--------------------------------------
55044  * [0] | RW | 0x0 | Non-ISO IN Endpoints Threshold Enable
55045  * [1] | RW | 0x0 | ISO IN Endpoints Threshold Enable
55046  * [10:2] | RW | 0x8 | Transmit Threshold
55047  * [12:11] | RW | 0x0 | AHB Threshold Ratio
55048  * [15:13] | ??? | 0x0 | *UNDEFINED*
55049  * [16] | RW | 0x0 | Receive Threshold Enable
55050  * [25:17] | RW | 0x8 | Receive Threshold Length
55051  * [26] | ??? | 0x0 | *UNDEFINED*
55052  * [27] | RW | 0x1 | Arbiter Parking Enable
55053  * [31:28] | ??? | 0x0 | *UNDEFINED*
55054  *
55055  */
55056 /*
55057  * Field : Non-ISO IN Endpoints Threshold Enable - nonisothren
55058  *
55059  * When this bit is Set, the core enables thresholding for Non Isochronous IN
55060  * endpoints.
55061  *
55062  * Field Enumeration Values:
55063  *
55064  * Enum | Value | Description
55065  * :---------------------------------------|:------|:--------------------
55066  * ALT_USB_DEV_DTHRCTL_NONISOTHREN_E_DISD | 0x0 | No thresholding
55067  * ALT_USB_DEV_DTHRCTL_NONISOTHREN_E_END | 0x1 | Enable thresholding
55068  *
55069  * Field Access Macros:
55070  *
55071  */
55072 /*
55073  * Enumerated value for register field ALT_USB_DEV_DTHRCTL_NONISOTHREN
55074  *
55075  * No thresholding
55076  */
55077 #define ALT_USB_DEV_DTHRCTL_NONISOTHREN_E_DISD 0x0
55078 /*
55079  * Enumerated value for register field ALT_USB_DEV_DTHRCTL_NONISOTHREN
55080  *
55081  * Enable thresholding
55082  */
55083 #define ALT_USB_DEV_DTHRCTL_NONISOTHREN_E_END 0x1
55084 
55085 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTHRCTL_NONISOTHREN register field. */
55086 #define ALT_USB_DEV_DTHRCTL_NONISOTHREN_LSB 0
55087 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTHRCTL_NONISOTHREN register field. */
55088 #define ALT_USB_DEV_DTHRCTL_NONISOTHREN_MSB 0
55089 /* The width in bits of the ALT_USB_DEV_DTHRCTL_NONISOTHREN register field. */
55090 #define ALT_USB_DEV_DTHRCTL_NONISOTHREN_WIDTH 1
55091 /* The mask used to set the ALT_USB_DEV_DTHRCTL_NONISOTHREN register field value. */
55092 #define ALT_USB_DEV_DTHRCTL_NONISOTHREN_SET_MSK 0x00000001
55093 /* The mask used to clear the ALT_USB_DEV_DTHRCTL_NONISOTHREN register field value. */
55094 #define ALT_USB_DEV_DTHRCTL_NONISOTHREN_CLR_MSK 0xfffffffe
55095 /* The reset value of the ALT_USB_DEV_DTHRCTL_NONISOTHREN register field. */
55096 #define ALT_USB_DEV_DTHRCTL_NONISOTHREN_RESET 0x0
55097 /* Extracts the ALT_USB_DEV_DTHRCTL_NONISOTHREN field value from a register. */
55098 #define ALT_USB_DEV_DTHRCTL_NONISOTHREN_GET(value) (((value) & 0x00000001) >> 0)
55099 /* Produces a ALT_USB_DEV_DTHRCTL_NONISOTHREN register field value suitable for setting the register. */
55100 #define ALT_USB_DEV_DTHRCTL_NONISOTHREN_SET(value) (((value) << 0) & 0x00000001)
55101 
55102 /*
55103  * Field : ISO IN Endpoints Threshold Enable - isothren
55104  *
55105  * When this bit is Set, the core enables thresholding for isochronous IN
55106  * endpoints.
55107  *
55108  * Field Enumeration Values:
55109  *
55110  * Enum | Value | Description
55111  * :------------------------------------|:------|:---------------------
55112  * ALT_USB_DEV_DTHRCTL_ISOTHREN_E_DISD | 0x0 | No thresholding
55113  * ALT_USB_DEV_DTHRCTL_ISOTHREN_E_END | 0x1 | Enables thresholding
55114  *
55115  * Field Access Macros:
55116  *
55117  */
55118 /*
55119  * Enumerated value for register field ALT_USB_DEV_DTHRCTL_ISOTHREN
55120  *
55121  * No thresholding
55122  */
55123 #define ALT_USB_DEV_DTHRCTL_ISOTHREN_E_DISD 0x0
55124 /*
55125  * Enumerated value for register field ALT_USB_DEV_DTHRCTL_ISOTHREN
55126  *
55127  * Enables thresholding
55128  */
55129 #define ALT_USB_DEV_DTHRCTL_ISOTHREN_E_END 0x1
55130 
55131 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTHRCTL_ISOTHREN register field. */
55132 #define ALT_USB_DEV_DTHRCTL_ISOTHREN_LSB 1
55133 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTHRCTL_ISOTHREN register field. */
55134 #define ALT_USB_DEV_DTHRCTL_ISOTHREN_MSB 1
55135 /* The width in bits of the ALT_USB_DEV_DTHRCTL_ISOTHREN register field. */
55136 #define ALT_USB_DEV_DTHRCTL_ISOTHREN_WIDTH 1
55137 /* The mask used to set the ALT_USB_DEV_DTHRCTL_ISOTHREN register field value. */
55138 #define ALT_USB_DEV_DTHRCTL_ISOTHREN_SET_MSK 0x00000002
55139 /* The mask used to clear the ALT_USB_DEV_DTHRCTL_ISOTHREN register field value. */
55140 #define ALT_USB_DEV_DTHRCTL_ISOTHREN_CLR_MSK 0xfffffffd
55141 /* The reset value of the ALT_USB_DEV_DTHRCTL_ISOTHREN register field. */
55142 #define ALT_USB_DEV_DTHRCTL_ISOTHREN_RESET 0x0
55143 /* Extracts the ALT_USB_DEV_DTHRCTL_ISOTHREN field value from a register. */
55144 #define ALT_USB_DEV_DTHRCTL_ISOTHREN_GET(value) (((value) & 0x00000002) >> 1)
55145 /* Produces a ALT_USB_DEV_DTHRCTL_ISOTHREN register field value suitable for setting the register. */
55146 #define ALT_USB_DEV_DTHRCTL_ISOTHREN_SET(value) (((value) << 1) & 0x00000002)
55147 
55148 /*
55149  * Field : Transmit Threshold - txthrlen
55150  *
55151  * This field specifies Transmit thresholding size in DWORDS. This also forms the
55152  * MAC threshold and specifies the amount of data in bytes to be in the
55153  * corresponding endpoint transmit FIFO, before the core can start transmit on the
55154  * USB. The threshold length has to be at least eight DWORDS when the value of
55155  * AHBThrRatio is 0. In case the AHBThrRatio is non zero the application needs to
55156  * ensure that the AHB Threshold value does not go below the recommended eight
55157  * DWORD. This field controls both isochronous and non-isochronous IN endpoint
55158  * thresholds. The recommended value for ThrLen is to be the same as the programmed
55159  * AHB Burst Length (GAHBCFG.HBstLen).
55160  *
55161  * Field Access Macros:
55162  *
55163  */
55164 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTHRCTL_TXTHRLEN register field. */
55165 #define ALT_USB_DEV_DTHRCTL_TXTHRLEN_LSB 2
55166 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTHRCTL_TXTHRLEN register field. */
55167 #define ALT_USB_DEV_DTHRCTL_TXTHRLEN_MSB 10
55168 /* The width in bits of the ALT_USB_DEV_DTHRCTL_TXTHRLEN register field. */
55169 #define ALT_USB_DEV_DTHRCTL_TXTHRLEN_WIDTH 9
55170 /* The mask used to set the ALT_USB_DEV_DTHRCTL_TXTHRLEN register field value. */
55171 #define ALT_USB_DEV_DTHRCTL_TXTHRLEN_SET_MSK 0x000007fc
55172 /* The mask used to clear the ALT_USB_DEV_DTHRCTL_TXTHRLEN register field value. */
55173 #define ALT_USB_DEV_DTHRCTL_TXTHRLEN_CLR_MSK 0xfffff803
55174 /* The reset value of the ALT_USB_DEV_DTHRCTL_TXTHRLEN register field. */
55175 #define ALT_USB_DEV_DTHRCTL_TXTHRLEN_RESET 0x8
55176 /* Extracts the ALT_USB_DEV_DTHRCTL_TXTHRLEN field value from a register. */
55177 #define ALT_USB_DEV_DTHRCTL_TXTHRLEN_GET(value) (((value) & 0x000007fc) >> 2)
55178 /* Produces a ALT_USB_DEV_DTHRCTL_TXTHRLEN register field value suitable for setting the register. */
55179 #define ALT_USB_DEV_DTHRCTL_TXTHRLEN_SET(value) (((value) << 2) & 0x000007fc)
55180 
55181 /*
55182  * Field : AHB Threshold Ratio - ahbthrratio
55183  *
55184  * These bits define the ratio between the AHB threshold and the MAC threshold for
55185  * the transmit path only. The AHB threshold always remains less than or equal to
55186  * the USB threshold, because this does not increase overhead. Both the AHB and the
55187  * MAC threshold must be DWORD-aligned. The application needs to program TxThrLen
55188  * and the AHBThrRatio to make the AHB Threshold value DWORD aligned. If the AHB
55189  * threshold value is not DWORD aligned, the core might not behave correctly. When
55190  * programming the TxThrLen and AHBThrRatio, the application must ensure that the
55191  * minimum AHB threshold value does not go below 8 DWORDS to meet the USB
55192  * turnaround time requirements.
55193  *
55194  * Field Enumeration Values:
55195  *
55196  * Enum | Value | Description
55197  * :---------------------------------------------|:------|:---------------------------------
55198  * ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_E_THRESZERO | 0x0 | AHB threshold = MAC threshold
55199  * ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_E_THRESONE | 0x1 | AHB threshold = MAC threshold /2
55200  * ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_E_THRESTWO | 0x2 | AHB threshold = MAC threshold /4
55201  * ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_E_THRESTHREE | 0x3 | AHB threshold = MAC threshold /
55202  *
55203  * Field Access Macros:
55204  *
55205  */
55206 /*
55207  * Enumerated value for register field ALT_USB_DEV_DTHRCTL_AHBTHRRATIO
55208  *
55209  * AHB threshold = MAC threshold
55210  */
55211 #define ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_E_THRESZERO 0x0
55212 /*
55213  * Enumerated value for register field ALT_USB_DEV_DTHRCTL_AHBTHRRATIO
55214  *
55215  * AHB threshold = MAC threshold /2
55216  */
55217 #define ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_E_THRESONE 0x1
55218 /*
55219  * Enumerated value for register field ALT_USB_DEV_DTHRCTL_AHBTHRRATIO
55220  *
55221  * AHB threshold = MAC threshold /4
55222  */
55223 #define ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_E_THRESTWO 0x2
55224 /*
55225  * Enumerated value for register field ALT_USB_DEV_DTHRCTL_AHBTHRRATIO
55226  *
55227  * AHB threshold = MAC threshold /
55228  */
55229 #define ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_E_THRESTHREE 0x3
55230 
55231 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTHRCTL_AHBTHRRATIO register field. */
55232 #define ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_LSB 11
55233 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTHRCTL_AHBTHRRATIO register field. */
55234 #define ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_MSB 12
55235 /* The width in bits of the ALT_USB_DEV_DTHRCTL_AHBTHRRATIO register field. */
55236 #define ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_WIDTH 2
55237 /* The mask used to set the ALT_USB_DEV_DTHRCTL_AHBTHRRATIO register field value. */
55238 #define ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_SET_MSK 0x00001800
55239 /* The mask used to clear the ALT_USB_DEV_DTHRCTL_AHBTHRRATIO register field value. */
55240 #define ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_CLR_MSK 0xffffe7ff
55241 /* The reset value of the ALT_USB_DEV_DTHRCTL_AHBTHRRATIO register field. */
55242 #define ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_RESET 0x0
55243 /* Extracts the ALT_USB_DEV_DTHRCTL_AHBTHRRATIO field value from a register. */
55244 #define ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_GET(value) (((value) & 0x00001800) >> 11)
55245 /* Produces a ALT_USB_DEV_DTHRCTL_AHBTHRRATIO register field value suitable for setting the register. */
55246 #define ALT_USB_DEV_DTHRCTL_AHBTHRRATIO_SET(value) (((value) << 11) & 0x00001800)
55247 
55248 /*
55249  * Field : Receive Threshold Enable - rxthren
55250  *
55251  * When this bit is Set, the core enables thresholding in the receive direction.
55252  *
55253  * Field Enumeration Values:
55254  *
55255  * Enum | Value | Description
55256  * :-----------------------------------|:------|:---------------------------------------------
55257  * ALT_USB_DEV_DTHRCTL_RXTHREN_E_DISD | 0x0 | Disable thresholding
55258  * ALT_USB_DEV_DTHRCTL_RXTHREN_E_END | 0x1 | Enable thresholding in the receive direction
55259  *
55260  * Field Access Macros:
55261  *
55262  */
55263 /*
55264  * Enumerated value for register field ALT_USB_DEV_DTHRCTL_RXTHREN
55265  *
55266  * Disable thresholding
55267  */
55268 #define ALT_USB_DEV_DTHRCTL_RXTHREN_E_DISD 0x0
55269 /*
55270  * Enumerated value for register field ALT_USB_DEV_DTHRCTL_RXTHREN
55271  *
55272  * Enable thresholding in the receive direction
55273  */
55274 #define ALT_USB_DEV_DTHRCTL_RXTHREN_E_END 0x1
55275 
55276 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTHRCTL_RXTHREN register field. */
55277 #define ALT_USB_DEV_DTHRCTL_RXTHREN_LSB 16
55278 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTHRCTL_RXTHREN register field. */
55279 #define ALT_USB_DEV_DTHRCTL_RXTHREN_MSB 16
55280 /* The width in bits of the ALT_USB_DEV_DTHRCTL_RXTHREN register field. */
55281 #define ALT_USB_DEV_DTHRCTL_RXTHREN_WIDTH 1
55282 /* The mask used to set the ALT_USB_DEV_DTHRCTL_RXTHREN register field value. */
55283 #define ALT_USB_DEV_DTHRCTL_RXTHREN_SET_MSK 0x00010000
55284 /* The mask used to clear the ALT_USB_DEV_DTHRCTL_RXTHREN register field value. */
55285 #define ALT_USB_DEV_DTHRCTL_RXTHREN_CLR_MSK 0xfffeffff
55286 /* The reset value of the ALT_USB_DEV_DTHRCTL_RXTHREN register field. */
55287 #define ALT_USB_DEV_DTHRCTL_RXTHREN_RESET 0x0
55288 /* Extracts the ALT_USB_DEV_DTHRCTL_RXTHREN field value from a register. */
55289 #define ALT_USB_DEV_DTHRCTL_RXTHREN_GET(value) (((value) & 0x00010000) >> 16)
55290 /* Produces a ALT_USB_DEV_DTHRCTL_RXTHREN register field value suitable for setting the register. */
55291 #define ALT_USB_DEV_DTHRCTL_RXTHREN_SET(value) (((value) << 16) & 0x00010000)
55292 
55293 /*
55294  * Field : Receive Threshold Length - rxthrlen
55295  *
55296  * This field specifies Receive thresholding size in DWORDS.This field also
55297  * specifies the amount of data received on the USB before the core can start
55298  * transmitting on the AHB. The threshold length has to be at least eight DWORDS.
55299  * The recommended value for ThrLen is to be the same as the programmed AHB Burst
55300  * Length (GAHBCFG.HBstLen).
55301  *
55302  * Field Access Macros:
55303  *
55304  */
55305 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTHRCTL_RXTHRLEN register field. */
55306 #define ALT_USB_DEV_DTHRCTL_RXTHRLEN_LSB 17
55307 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTHRCTL_RXTHRLEN register field. */
55308 #define ALT_USB_DEV_DTHRCTL_RXTHRLEN_MSB 25
55309 /* The width in bits of the ALT_USB_DEV_DTHRCTL_RXTHRLEN register field. */
55310 #define ALT_USB_DEV_DTHRCTL_RXTHRLEN_WIDTH 9
55311 /* The mask used to set the ALT_USB_DEV_DTHRCTL_RXTHRLEN register field value. */
55312 #define ALT_USB_DEV_DTHRCTL_RXTHRLEN_SET_MSK 0x03fe0000
55313 /* The mask used to clear the ALT_USB_DEV_DTHRCTL_RXTHRLEN register field value. */
55314 #define ALT_USB_DEV_DTHRCTL_RXTHRLEN_CLR_MSK 0xfc01ffff
55315 /* The reset value of the ALT_USB_DEV_DTHRCTL_RXTHRLEN register field. */
55316 #define ALT_USB_DEV_DTHRCTL_RXTHRLEN_RESET 0x8
55317 /* Extracts the ALT_USB_DEV_DTHRCTL_RXTHRLEN field value from a register. */
55318 #define ALT_USB_DEV_DTHRCTL_RXTHRLEN_GET(value) (((value) & 0x03fe0000) >> 17)
55319 /* Produces a ALT_USB_DEV_DTHRCTL_RXTHRLEN register field value suitable for setting the register. */
55320 #define ALT_USB_DEV_DTHRCTL_RXTHRLEN_SET(value) (((value) << 17) & 0x03fe0000)
55321 
55322 /*
55323  * Field : Arbiter Parking Enable - arbprken
55324  *
55325  * This bit controls internal DMA arbiter parking for IN endpoints. When
55326  * thresholding is enabled and this bit is Set to one, Then the arbiter parks on
55327  * the IN endpoint for which there is a token received on the USB. This is done to
55328  * avoid getting into underrun conditions. By Default the parking is enabled.
55329  *
55330  * Field Enumeration Values:
55331  *
55332  * Enum | Value | Description
55333  * :------------------------------------|:------|:--------------------------------------------
55334  * ALT_USB_DEV_DTHRCTL_ARBPRKEN_E_DISD | 0x0 | Disable DMA arbiter parking
55335  * ALT_USB_DEV_DTHRCTL_ARBPRKEN_E_END | 0x1 | Enable DMA arbiter parking for IN endpoints
55336  *
55337  * Field Access Macros:
55338  *
55339  */
55340 /*
55341  * Enumerated value for register field ALT_USB_DEV_DTHRCTL_ARBPRKEN
55342  *
55343  * Disable DMA arbiter parking
55344  */
55345 #define ALT_USB_DEV_DTHRCTL_ARBPRKEN_E_DISD 0x0
55346 /*
55347  * Enumerated value for register field ALT_USB_DEV_DTHRCTL_ARBPRKEN
55348  *
55349  * Enable DMA arbiter parking for IN endpoints
55350  */
55351 #define ALT_USB_DEV_DTHRCTL_ARBPRKEN_E_END 0x1
55352 
55353 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTHRCTL_ARBPRKEN register field. */
55354 #define ALT_USB_DEV_DTHRCTL_ARBPRKEN_LSB 27
55355 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTHRCTL_ARBPRKEN register field. */
55356 #define ALT_USB_DEV_DTHRCTL_ARBPRKEN_MSB 27
55357 /* The width in bits of the ALT_USB_DEV_DTHRCTL_ARBPRKEN register field. */
55358 #define ALT_USB_DEV_DTHRCTL_ARBPRKEN_WIDTH 1
55359 /* The mask used to set the ALT_USB_DEV_DTHRCTL_ARBPRKEN register field value. */
55360 #define ALT_USB_DEV_DTHRCTL_ARBPRKEN_SET_MSK 0x08000000
55361 /* The mask used to clear the ALT_USB_DEV_DTHRCTL_ARBPRKEN register field value. */
55362 #define ALT_USB_DEV_DTHRCTL_ARBPRKEN_CLR_MSK 0xf7ffffff
55363 /* The reset value of the ALT_USB_DEV_DTHRCTL_ARBPRKEN register field. */
55364 #define ALT_USB_DEV_DTHRCTL_ARBPRKEN_RESET 0x1
55365 /* Extracts the ALT_USB_DEV_DTHRCTL_ARBPRKEN field value from a register. */
55366 #define ALT_USB_DEV_DTHRCTL_ARBPRKEN_GET(value) (((value) & 0x08000000) >> 27)
55367 /* Produces a ALT_USB_DEV_DTHRCTL_ARBPRKEN register field value suitable for setting the register. */
55368 #define ALT_USB_DEV_DTHRCTL_ARBPRKEN_SET(value) (((value) << 27) & 0x08000000)
55369 
55370 #ifndef __ASSEMBLY__
55371 /*
55372  * WARNING: The C register and register group struct declarations are provided for
55373  * convenience and illustrative purposes. They should, however, be used with
55374  * caution as the C language standard provides no guarantees about the alignment or
55375  * atomicity of device memory accesses. The recommended practice for writing
55376  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
55377  * alt_write_word() functions.
55378  *
55379  * The struct declaration for register ALT_USB_DEV_DTHRCTL.
55380  */
55381 struct ALT_USB_DEV_DTHRCTL_s
55382 {
55383  uint32_t nonisothren : 1; /* Non-ISO IN Endpoints Threshold Enable */
55384  uint32_t isothren : 1; /* ISO IN Endpoints Threshold Enable */
55385  uint32_t txthrlen : 9; /* Transmit Threshold */
55386  uint32_t ahbthrratio : 2; /* AHB Threshold Ratio */
55387  uint32_t : 3; /* *UNDEFINED* */
55388  uint32_t rxthren : 1; /* Receive Threshold Enable */
55389  uint32_t rxthrlen : 9; /* Receive Threshold Length */
55390  uint32_t : 1; /* *UNDEFINED* */
55391  uint32_t arbprken : 1; /* Arbiter Parking Enable */
55392  uint32_t : 4; /* *UNDEFINED* */
55393 };
55394 
55395 /* The typedef declaration for register ALT_USB_DEV_DTHRCTL. */
55396 typedef volatile struct ALT_USB_DEV_DTHRCTL_s ALT_USB_DEV_DTHRCTL_t;
55397 #endif /* __ASSEMBLY__ */
55398 
55399 /* The byte offset of the ALT_USB_DEV_DTHRCTL register from the beginning of the component. */
55400 #define ALT_USB_DEV_DTHRCTL_OFST 0x30
55401 /* The address of the ALT_USB_DEV_DTHRCTL register. */
55402 #define ALT_USB_DEV_DTHRCTL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTHRCTL_OFST))
55403 
55404 /*
55405  * Register : Device IN Endpoint FIFO Empty Interrupt Mask Register - diepempmsk
55406  *
55407  * This register is used to control the IN endpoint FIFO empty interrupt generation
55408  * (DIEPINTn.TxfEmp).
55409  *
55410  * Register Layout
55411  *
55412  * Bits | Access | Reset | Description
55413  * :--------|:-------|:------|:-------------------------------------------
55414  * [0] | RW | 0x0 | IN EP 0 Tx FIFO Empty Interrupt Mask Bits
55415  * [1] | RW | 0x0 | IN EP 1 Tx FIFO Empty Interrupt Mask Bits
55416  * [2] | RW | 0x0 | IN EP 2 Tx FIFO Empty Interrupt Mask Bits
55417  * [3] | RW | 0x0 | IN EP 3 Tx FIFO Empty Interrupt Mask Bits
55418  * [4] | RW | 0x0 | IN EP 4 Tx FIFO Empty Interrupt Mask Bits
55419  * [5] | RW | 0x0 | IN EP 5 Tx FIFO Empty Interrupt Mask Bits
55420  * [6] | RW | 0x0 | IN EP 6 Tx FIFO Empty Interrupt Mask Bits
55421  * [7] | RW | 0x0 | IN EP 7 Tx FIFO Empty Interrupt Mask Bits
55422  * [8] | RW | 0x0 | IN EP 8 Tx FIFO Empty Interrupt Mask Bits
55423  * [9] | RW | 0x0 | IN EP 9 Tx FIFO Empty Interrupt Mask Bits
55424  * [10] | RW | 0x0 | IN EP 10 Tx FIFO Empty Interrupt Mask Bits
55425  * [11] | RW | 0x0 | IN EP 11 Tx FIFO Empty Interrupt Mask Bits
55426  * [12] | RW | 0x0 | IN EP 12 Tx FIFO Empty Interrupt Mask Bits
55427  * [13] | RW | 0x0 | IN EP 13 Tx FIFO Empty Interrupt Mask Bits
55428  * [14] | RW | 0x0 | IN EP 14 Tx FIFO Empty Interrupt Mask Bits
55429  * [15] | RW | 0x0 | IN EP 15 Tx FIFO Empty Interrupt Mask Bits
55430  * [31:16] | ??? | 0x0 | *UNDEFINED*
55431  *
55432  */
55433 /*
55434  * Field : IN EP 0 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk0
55435  *
55436  * This bit acts as mask bits for DIEPINT0.
55437  *
55438  * Field Enumeration Values:
55439  *
55440  * Enum | Value | Description
55441  * :----------------------------------------------|:------|:---------------------------
55442  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0_E_MSK | 0x0 | Mask End point 0 interrupt
55443  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0_E_NOMSK | 0x1 | No mask
55444  *
55445  * Field Access Macros:
55446  *
55447  */
55448 /*
55449  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0
55450  *
55451  * Mask End point 0 interrupt
55452  */
55453 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0_E_MSK 0x0
55454 /*
55455  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0
55456  *
55457  * No mask
55458  */
55459 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0_E_NOMSK 0x1
55460 
55461 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0 register field. */
55462 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0_LSB 0
55463 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0 register field. */
55464 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0_MSB 0
55465 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0 register field. */
55466 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0_WIDTH 1
55467 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0 register field value. */
55468 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0_SET_MSK 0x00000001
55469 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0 register field value. */
55470 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0_CLR_MSK 0xfffffffe
55471 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0 register field. */
55472 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0_RESET 0x0
55473 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0 field value from a register. */
55474 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0_GET(value) (((value) & 0x00000001) >> 0)
55475 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0 register field value suitable for setting the register. */
55476 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK0_SET(value) (((value) << 0) & 0x00000001)
55477 
55478 /*
55479  * Field : IN EP 1 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk1
55480  *
55481  * This bit acts as mask bits for DIEPINT1.
55482  *
55483  * Field Enumeration Values:
55484  *
55485  * Enum | Value | Description
55486  * :----------------------------------------------|:------|:---------------------------
55487  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1_E_MSK | 0x0 | Mask End point 1 interrupt
55488  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1_E_NOMSK | 0x1 | No mask
55489  *
55490  * Field Access Macros:
55491  *
55492  */
55493 /*
55494  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1
55495  *
55496  * Mask End point 1 interrupt
55497  */
55498 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1_E_MSK 0x0
55499 /*
55500  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1
55501  *
55502  * No mask
55503  */
55504 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1_E_NOMSK 0x1
55505 
55506 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1 register field. */
55507 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1_LSB 1
55508 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1 register field. */
55509 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1_MSB 1
55510 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1 register field. */
55511 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1_WIDTH 1
55512 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1 register field value. */
55513 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1_SET_MSK 0x00000002
55514 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1 register field value. */
55515 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1_CLR_MSK 0xfffffffd
55516 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1 register field. */
55517 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1_RESET 0x0
55518 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1 field value from a register. */
55519 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1_GET(value) (((value) & 0x00000002) >> 1)
55520 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1 register field value suitable for setting the register. */
55521 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK1_SET(value) (((value) << 1) & 0x00000002)
55522 
55523 /*
55524  * Field : IN EP 2 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk2
55525  *
55526  * This bit acts as mask bits for DIEPINT2.
55527  *
55528  * Field Enumeration Values:
55529  *
55530  * Enum | Value | Description
55531  * :----------------------------------------------|:------|:---------------------------
55532  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2_E_MSK | 0x0 | Mask End point 2 interrupt
55533  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2_E_NOMSK | 0x1 | No mask
55534  *
55535  * Field Access Macros:
55536  *
55537  */
55538 /*
55539  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2
55540  *
55541  * Mask End point 2 interrupt
55542  */
55543 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2_E_MSK 0x0
55544 /*
55545  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2
55546  *
55547  * No mask
55548  */
55549 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2_E_NOMSK 0x1
55550 
55551 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2 register field. */
55552 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2_LSB 2
55553 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2 register field. */
55554 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2_MSB 2
55555 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2 register field. */
55556 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2_WIDTH 1
55557 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2 register field value. */
55558 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2_SET_MSK 0x00000004
55559 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2 register field value. */
55560 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2_CLR_MSK 0xfffffffb
55561 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2 register field. */
55562 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2_RESET 0x0
55563 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2 field value from a register. */
55564 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2_GET(value) (((value) & 0x00000004) >> 2)
55565 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2 register field value suitable for setting the register. */
55566 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK2_SET(value) (((value) << 2) & 0x00000004)
55567 
55568 /*
55569  * Field : IN EP 3 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk3
55570  *
55571  * This bit acts as mask bits for DIEPINT3.
55572  *
55573  * Field Enumeration Values:
55574  *
55575  * Enum | Value | Description
55576  * :----------------------------------------------|:------|:---------------------------
55577  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3_E_MSK | 0x0 | Mask End point 3 interrupt
55578  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3_E_NOMSK | 0x1 | No mask
55579  *
55580  * Field Access Macros:
55581  *
55582  */
55583 /*
55584  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3
55585  *
55586  * Mask End point 3 interrupt
55587  */
55588 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3_E_MSK 0x0
55589 /*
55590  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3
55591  *
55592  * No mask
55593  */
55594 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3_E_NOMSK 0x1
55595 
55596 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3 register field. */
55597 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3_LSB 3
55598 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3 register field. */
55599 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3_MSB 3
55600 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3 register field. */
55601 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3_WIDTH 1
55602 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3 register field value. */
55603 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3_SET_MSK 0x00000008
55604 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3 register field value. */
55605 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3_CLR_MSK 0xfffffff7
55606 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3 register field. */
55607 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3_RESET 0x0
55608 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3 field value from a register. */
55609 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3_GET(value) (((value) & 0x00000008) >> 3)
55610 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3 register field value suitable for setting the register. */
55611 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK3_SET(value) (((value) << 3) & 0x00000008)
55612 
55613 /*
55614  * Field : IN EP 4 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk4
55615  *
55616  * This bit acts as mask bits for DIEPINT4.
55617  *
55618  * Field Enumeration Values:
55619  *
55620  * Enum | Value | Description
55621  * :----------------------------------------------|:------|:---------------------------
55622  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4_E_MSK | 0x0 | Mask End point 4 interrupt
55623  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4_E_NOMSK | 0x1 | No mask
55624  *
55625  * Field Access Macros:
55626  *
55627  */
55628 /*
55629  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4
55630  *
55631  * Mask End point 4 interrupt
55632  */
55633 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4_E_MSK 0x0
55634 /*
55635  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4
55636  *
55637  * No mask
55638  */
55639 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4_E_NOMSK 0x1
55640 
55641 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4 register field. */
55642 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4_LSB 4
55643 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4 register field. */
55644 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4_MSB 4
55645 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4 register field. */
55646 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4_WIDTH 1
55647 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4 register field value. */
55648 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4_SET_MSK 0x00000010
55649 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4 register field value. */
55650 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4_CLR_MSK 0xffffffef
55651 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4 register field. */
55652 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4_RESET 0x0
55653 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4 field value from a register. */
55654 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4_GET(value) (((value) & 0x00000010) >> 4)
55655 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4 register field value suitable for setting the register. */
55656 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK4_SET(value) (((value) << 4) & 0x00000010)
55657 
55658 /*
55659  * Field : IN EP 5 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk5
55660  *
55661  * This bit acts as mask bits for DIEPINT5.
55662  *
55663  * Field Enumeration Values:
55664  *
55665  * Enum | Value | Description
55666  * :----------------------------------------------|:------|:---------------------------
55667  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5_E_MSK | 0x0 | Mask End point 5 interrupt
55668  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5_E_NOMSK | 0x1 | No mask
55669  *
55670  * Field Access Macros:
55671  *
55672  */
55673 /*
55674  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5
55675  *
55676  * Mask End point 5 interrupt
55677  */
55678 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5_E_MSK 0x0
55679 /*
55680  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5
55681  *
55682  * No mask
55683  */
55684 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5_E_NOMSK 0x1
55685 
55686 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5 register field. */
55687 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5_LSB 5
55688 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5 register field. */
55689 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5_MSB 5
55690 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5 register field. */
55691 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5_WIDTH 1
55692 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5 register field value. */
55693 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5_SET_MSK 0x00000020
55694 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5 register field value. */
55695 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5_CLR_MSK 0xffffffdf
55696 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5 register field. */
55697 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5_RESET 0x0
55698 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5 field value from a register. */
55699 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5_GET(value) (((value) & 0x00000020) >> 5)
55700 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5 register field value suitable for setting the register. */
55701 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK5_SET(value) (((value) << 5) & 0x00000020)
55702 
55703 /*
55704  * Field : IN EP 6 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk6
55705  *
55706  * This bit acts as mask bits for DIEPINT6.
55707  *
55708  * Field Enumeration Values:
55709  *
55710  * Enum | Value | Description
55711  * :----------------------------------------------|:------|:---------------------------
55712  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6_E_MSK | 0x0 | Mask End point 6 interrupt
55713  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6_E_NOMSK | 0x1 | No mask
55714  *
55715  * Field Access Macros:
55716  *
55717  */
55718 /*
55719  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6
55720  *
55721  * Mask End point 6 interrupt
55722  */
55723 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6_E_MSK 0x0
55724 /*
55725  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6
55726  *
55727  * No mask
55728  */
55729 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6_E_NOMSK 0x1
55730 
55731 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6 register field. */
55732 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6_LSB 6
55733 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6 register field. */
55734 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6_MSB 6
55735 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6 register field. */
55736 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6_WIDTH 1
55737 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6 register field value. */
55738 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6_SET_MSK 0x00000040
55739 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6 register field value. */
55740 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6_CLR_MSK 0xffffffbf
55741 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6 register field. */
55742 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6_RESET 0x0
55743 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6 field value from a register. */
55744 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6_GET(value) (((value) & 0x00000040) >> 6)
55745 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6 register field value suitable for setting the register. */
55746 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK6_SET(value) (((value) << 6) & 0x00000040)
55747 
55748 /*
55749  * Field : IN EP 7 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk7
55750  *
55751  * This bit acts as mask bits for DIEPINT7.
55752  *
55753  * Field Enumeration Values:
55754  *
55755  * Enum | Value | Description
55756  * :----------------------------------------------|:------|:---------------------------
55757  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7_E_MSK | 0x0 | Mask End point 7 interrupt
55758  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7_E_NOMSK | 0x1 | No mask
55759  *
55760  * Field Access Macros:
55761  *
55762  */
55763 /*
55764  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7
55765  *
55766  * Mask End point 7 interrupt
55767  */
55768 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7_E_MSK 0x0
55769 /*
55770  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7
55771  *
55772  * No mask
55773  */
55774 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7_E_NOMSK 0x1
55775 
55776 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7 register field. */
55777 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7_LSB 7
55778 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7 register field. */
55779 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7_MSB 7
55780 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7 register field. */
55781 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7_WIDTH 1
55782 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7 register field value. */
55783 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7_SET_MSK 0x00000080
55784 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7 register field value. */
55785 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7_CLR_MSK 0xffffff7f
55786 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7 register field. */
55787 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7_RESET 0x0
55788 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7 field value from a register. */
55789 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7_GET(value) (((value) & 0x00000080) >> 7)
55790 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7 register field value suitable for setting the register. */
55791 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK7_SET(value) (((value) << 7) & 0x00000080)
55792 
55793 /*
55794  * Field : IN EP 8 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk8
55795  *
55796  * This bit acts as mask bits for DIEPINT8.
55797  *
55798  * Field Enumeration Values:
55799  *
55800  * Enum | Value | Description
55801  * :----------------------------------------------|:------|:---------------------------
55802  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8_E_MSK | 0x0 | Mask End point 8 interrupt
55803  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8_E_NOMSK | 0x1 | No mask
55804  *
55805  * Field Access Macros:
55806  *
55807  */
55808 /*
55809  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8
55810  *
55811  * Mask End point 8 interrupt
55812  */
55813 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8_E_MSK 0x0
55814 /*
55815  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8
55816  *
55817  * No mask
55818  */
55819 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8_E_NOMSK 0x1
55820 
55821 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8 register field. */
55822 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8_LSB 8
55823 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8 register field. */
55824 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8_MSB 8
55825 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8 register field. */
55826 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8_WIDTH 1
55827 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8 register field value. */
55828 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8_SET_MSK 0x00000100
55829 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8 register field value. */
55830 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8_CLR_MSK 0xfffffeff
55831 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8 register field. */
55832 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8_RESET 0x0
55833 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8 field value from a register. */
55834 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8_GET(value) (((value) & 0x00000100) >> 8)
55835 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8 register field value suitable for setting the register. */
55836 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK8_SET(value) (((value) << 8) & 0x00000100)
55837 
55838 /*
55839  * Field : IN EP 9 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk9
55840  *
55841  * This bit acts as mask bits for DIEPINT9.
55842  *
55843  * Field Enumeration Values:
55844  *
55845  * Enum | Value | Description
55846  * :----------------------------------------------|:------|:---------------------------
55847  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9_E_MSK | 0x0 | Mask End point 9 interrupt
55848  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9_E_NOMSK | 0x1 | No mask
55849  *
55850  * Field Access Macros:
55851  *
55852  */
55853 /*
55854  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9
55855  *
55856  * Mask End point 9 interrupt
55857  */
55858 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9_E_MSK 0x0
55859 /*
55860  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9
55861  *
55862  * No mask
55863  */
55864 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9_E_NOMSK 0x1
55865 
55866 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9 register field. */
55867 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9_LSB 9
55868 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9 register field. */
55869 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9_MSB 9
55870 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9 register field. */
55871 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9_WIDTH 1
55872 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9 register field value. */
55873 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9_SET_MSK 0x00000200
55874 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9 register field value. */
55875 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9_CLR_MSK 0xfffffdff
55876 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9 register field. */
55877 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9_RESET 0x0
55878 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9 field value from a register. */
55879 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9_GET(value) (((value) & 0x00000200) >> 9)
55880 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9 register field value suitable for setting the register. */
55881 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK9_SET(value) (((value) << 9) & 0x00000200)
55882 
55883 /*
55884  * Field : IN EP 10 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk10
55885  *
55886  * This bit acts as mask bits for DIEPINT10.
55887  *
55888  * Field Enumeration Values:
55889  *
55890  * Enum | Value | Description
55891  * :-----------------------------------------------|:------|:----------------------------
55892  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10_E_MSK | 0x0 | Mask End point 10 interrupt
55893  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10_E_NOMSK | 0x1 | No mask
55894  *
55895  * Field Access Macros:
55896  *
55897  */
55898 /*
55899  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10
55900  *
55901  * Mask End point 10 interrupt
55902  */
55903 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10_E_MSK 0x0
55904 /*
55905  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10
55906  *
55907  * No mask
55908  */
55909 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10_E_NOMSK 0x1
55910 
55911 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10 register field. */
55912 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10_LSB 10
55913 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10 register field. */
55914 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10_MSB 10
55915 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10 register field. */
55916 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10_WIDTH 1
55917 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10 register field value. */
55918 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10_SET_MSK 0x00000400
55919 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10 register field value. */
55920 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10_CLR_MSK 0xfffffbff
55921 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10 register field. */
55922 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10_RESET 0x0
55923 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10 field value from a register. */
55924 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10_GET(value) (((value) & 0x00000400) >> 10)
55925 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10 register field value suitable for setting the register. */
55926 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK10_SET(value) (((value) << 10) & 0x00000400)
55927 
55928 /*
55929  * Field : IN EP 11 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk11
55930  *
55931  * This bit acts as mask bits for DIEPINT11.
55932  *
55933  * Field Enumeration Values:
55934  *
55935  * Enum | Value | Description
55936  * :-----------------------------------------------|:------|:----------------------------
55937  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11_E_MSK | 0x0 | Mask End point 11 interrupt
55938  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11_E_NOMSK | 0x1 | No mask
55939  *
55940  * Field Access Macros:
55941  *
55942  */
55943 /*
55944  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11
55945  *
55946  * Mask End point 11 interrupt
55947  */
55948 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11_E_MSK 0x0
55949 /*
55950  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11
55951  *
55952  * No mask
55953  */
55954 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11_E_NOMSK 0x1
55955 
55956 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11 register field. */
55957 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11_LSB 11
55958 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11 register field. */
55959 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11_MSB 11
55960 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11 register field. */
55961 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11_WIDTH 1
55962 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11 register field value. */
55963 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11_SET_MSK 0x00000800
55964 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11 register field value. */
55965 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11_CLR_MSK 0xfffff7ff
55966 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11 register field. */
55967 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11_RESET 0x0
55968 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11 field value from a register. */
55969 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11_GET(value) (((value) & 0x00000800) >> 11)
55970 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11 register field value suitable for setting the register. */
55971 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK11_SET(value) (((value) << 11) & 0x00000800)
55972 
55973 /*
55974  * Field : IN EP 12 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk12
55975  *
55976  * This bit acts as mask bits for DIEPINT12.
55977  *
55978  * Field Enumeration Values:
55979  *
55980  * Enum | Value | Description
55981  * :-----------------------------------------------|:------|:----------------------------
55982  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12_E_MSK | 0x0 | Mask End point 12 interrupt
55983  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12_E_NOMSK | 0x1 | No mask
55984  *
55985  * Field Access Macros:
55986  *
55987  */
55988 /*
55989  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12
55990  *
55991  * Mask End point 12 interrupt
55992  */
55993 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12_E_MSK 0x0
55994 /*
55995  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12
55996  *
55997  * No mask
55998  */
55999 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12_E_NOMSK 0x1
56000 
56001 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12 register field. */
56002 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12_LSB 12
56003 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12 register field. */
56004 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12_MSB 12
56005 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12 register field. */
56006 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12_WIDTH 1
56007 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12 register field value. */
56008 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12_SET_MSK 0x00001000
56009 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12 register field value. */
56010 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12_CLR_MSK 0xffffefff
56011 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12 register field. */
56012 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12_RESET 0x0
56013 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12 field value from a register. */
56014 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12_GET(value) (((value) & 0x00001000) >> 12)
56015 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12 register field value suitable for setting the register. */
56016 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK12_SET(value) (((value) << 12) & 0x00001000)
56017 
56018 /*
56019  * Field : IN EP 13 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk13
56020  *
56021  * This bit acts as mask bits for DIEPINT13.
56022  *
56023  * Field Enumeration Values:
56024  *
56025  * Enum | Value | Description
56026  * :-----------------------------------------------|:------|:----------------------------
56027  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13_E_MSK | 0x0 | Mask End point 12 interrupt
56028  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13_E_NOMSK | 0x1 | No mask
56029  *
56030  * Field Access Macros:
56031  *
56032  */
56033 /*
56034  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13
56035  *
56036  * Mask End point 12 interrupt
56037  */
56038 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13_E_MSK 0x0
56039 /*
56040  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13
56041  *
56042  * No mask
56043  */
56044 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13_E_NOMSK 0x1
56045 
56046 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13 register field. */
56047 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13_LSB 13
56048 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13 register field. */
56049 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13_MSB 13
56050 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13 register field. */
56051 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13_WIDTH 1
56052 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13 register field value. */
56053 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13_SET_MSK 0x00002000
56054 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13 register field value. */
56055 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13_CLR_MSK 0xffffdfff
56056 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13 register field. */
56057 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13_RESET 0x0
56058 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13 field value from a register. */
56059 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13_GET(value) (((value) & 0x00002000) >> 13)
56060 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13 register field value suitable for setting the register. */
56061 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK13_SET(value) (((value) << 13) & 0x00002000)
56062 
56063 /*
56064  * Field : IN EP 14 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk14
56065  *
56066  * This bit acts as mask bits for DIEPINT14.
56067  *
56068  * Field Enumeration Values:
56069  *
56070  * Enum | Value | Description
56071  * :-----------------------------------------------|:------|:----------------------------
56072  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14_E_MSK | 0x0 | Mask End point 14 interrupt
56073  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14_E_NOMSK | 0x1 | No mask
56074  *
56075  * Field Access Macros:
56076  *
56077  */
56078 /*
56079  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14
56080  *
56081  * Mask End point 14 interrupt
56082  */
56083 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14_E_MSK 0x0
56084 /*
56085  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14
56086  *
56087  * No mask
56088  */
56089 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14_E_NOMSK 0x1
56090 
56091 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14 register field. */
56092 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14_LSB 14
56093 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14 register field. */
56094 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14_MSB 14
56095 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14 register field. */
56096 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14_WIDTH 1
56097 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14 register field value. */
56098 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14_SET_MSK 0x00004000
56099 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14 register field value. */
56100 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14_CLR_MSK 0xffffbfff
56101 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14 register field. */
56102 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14_RESET 0x0
56103 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14 field value from a register. */
56104 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14_GET(value) (((value) & 0x00004000) >> 14)
56105 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14 register field value suitable for setting the register. */
56106 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK14_SET(value) (((value) << 14) & 0x00004000)
56107 
56108 /*
56109  * Field : IN EP 15 Tx FIFO Empty Interrupt Mask Bits - ineptxfempmsk15
56110  *
56111  * This bit acts as mask bits for DIEPINT15.
56112  *
56113  * Field Enumeration Values:
56114  *
56115  * Enum | Value | Description
56116  * :-----------------------------------------------|:------|:----------------------------
56117  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15_E_MSK | 0x0 | Mask End point 15 interrupt
56118  * ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15_E_NOMSK | 0x1 | No mask
56119  *
56120  * Field Access Macros:
56121  *
56122  */
56123 /*
56124  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15
56125  *
56126  * Mask End point 15 interrupt
56127  */
56128 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15_E_MSK 0x0
56129 /*
56130  * Enumerated value for register field ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15
56131  *
56132  * No mask
56133  */
56134 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15_E_NOMSK 0x1
56135 
56136 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15 register field. */
56137 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15_LSB 15
56138 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15 register field. */
56139 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15_MSB 15
56140 /* The width in bits of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15 register field. */
56141 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15_WIDTH 1
56142 /* The mask used to set the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15 register field value. */
56143 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15_SET_MSK 0x00008000
56144 /* The mask used to clear the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15 register field value. */
56145 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15_CLR_MSK 0xffff7fff
56146 /* The reset value of the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15 register field. */
56147 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15_RESET 0x0
56148 /* Extracts the ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15 field value from a register. */
56149 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15_GET(value) (((value) & 0x00008000) >> 15)
56150 /* Produces a ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15 register field value suitable for setting the register. */
56151 #define ALT_USB_DEV_DIEPEMPMSK_INEPTXFEMPMSK15_SET(value) (((value) << 15) & 0x00008000)
56152 
56153 #ifndef __ASSEMBLY__
56154 /*
56155  * WARNING: The C register and register group struct declarations are provided for
56156  * convenience and illustrative purposes. They should, however, be used with
56157  * caution as the C language standard provides no guarantees about the alignment or
56158  * atomicity of device memory accesses. The recommended practice for writing
56159  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
56160  * alt_write_word() functions.
56161  *
56162  * The struct declaration for register ALT_USB_DEV_DIEPEMPMSK.
56163  */
56164 struct ALT_USB_DEV_DIEPEMPMSK_s
56165 {
56166  uint32_t ineptxfempmsk0 : 1; /* IN EP 0 Tx FIFO Empty Interrupt Mask Bits */
56167  uint32_t ineptxfempmsk1 : 1; /* IN EP 1 Tx FIFO Empty Interrupt Mask Bits */
56168  uint32_t ineptxfempmsk2 : 1; /* IN EP 2 Tx FIFO Empty Interrupt Mask Bits */
56169  uint32_t ineptxfempmsk3 : 1; /* IN EP 3 Tx FIFO Empty Interrupt Mask Bits */
56170  uint32_t ineptxfempmsk4 : 1; /* IN EP 4 Tx FIFO Empty Interrupt Mask Bits */
56171  uint32_t ineptxfempmsk5 : 1; /* IN EP 5 Tx FIFO Empty Interrupt Mask Bits */
56172  uint32_t ineptxfempmsk6 : 1; /* IN EP 6 Tx FIFO Empty Interrupt Mask Bits */
56173  uint32_t ineptxfempmsk7 : 1; /* IN EP 7 Tx FIFO Empty Interrupt Mask Bits */
56174  uint32_t ineptxfempmsk8 : 1; /* IN EP 8 Tx FIFO Empty Interrupt Mask Bits */
56175  uint32_t ineptxfempmsk9 : 1; /* IN EP 9 Tx FIFO Empty Interrupt Mask Bits */
56176  uint32_t ineptxfempmsk10 : 1; /* IN EP 10 Tx FIFO Empty Interrupt Mask Bits */
56177  uint32_t ineptxfempmsk11 : 1; /* IN EP 11 Tx FIFO Empty Interrupt Mask Bits */
56178  uint32_t ineptxfempmsk12 : 1; /* IN EP 12 Tx FIFO Empty Interrupt Mask Bits */
56179  uint32_t ineptxfempmsk13 : 1; /* IN EP 13 Tx FIFO Empty Interrupt Mask Bits */
56180  uint32_t ineptxfempmsk14 : 1; /* IN EP 14 Tx FIFO Empty Interrupt Mask Bits */
56181  uint32_t ineptxfempmsk15 : 1; /* IN EP 15 Tx FIFO Empty Interrupt Mask Bits */
56182  uint32_t : 16; /* *UNDEFINED* */
56183 };
56184 
56185 /* The typedef declaration for register ALT_USB_DEV_DIEPEMPMSK. */
56186 typedef volatile struct ALT_USB_DEV_DIEPEMPMSK_s ALT_USB_DEV_DIEPEMPMSK_t;
56187 #endif /* __ASSEMBLY__ */
56188 
56189 /* The byte offset of the ALT_USB_DEV_DIEPEMPMSK register from the beginning of the component. */
56190 #define ALT_USB_DEV_DIEPEMPMSK_OFST 0x34
56191 /* The address of the ALT_USB_DEV_DIEPEMPMSK register. */
56192 #define ALT_USB_DEV_DIEPEMPMSK_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPEMPMSK_OFST))
56193 
56194 /*
56195  * Register : Device Control IN Endpoint 0 Control Register - diepctl0
56196  *
56197  * This register covers Device Control IN Endpoint 0.
56198  *
56199  * Register Layout
56200  *
56201  * Bits | Access | Reset | Description
56202  * :--------|:-------|:------|:--------------------
56203  * [1:0] | RW | 0x0 | Maximum Packet Size
56204  * [14:2] | ??? | 0x0 | *UNDEFINED*
56205  * [15] | R | 0x1 | USB Active Endpoint
56206  * [16] | ??? | 0x0 | *UNDEFINED*
56207  * [17] | R | 0x0 | NAK Status
56208  * [19:18] | R | 0x0 | Endpoint Type
56209  * [20] | ??? | 0x0 | *UNDEFINED*
56210  * [21] | R | 0x0 | STALL Handshake
56211  * [25:22] | RW | 0x0 | TxFIFO Number
56212  * [26] | W | 0x0 | Clear NAK
56213  * [27] | W | 0x0 | Set NAK
56214  * [29:28] | ??? | 0x0 | *UNDEFINED*
56215  * [30] | R | 0x0 | Endpoint Disable
56216  * [31] | R | 0x0 | Endpoint Enable
56217  *
56218  */
56219 /*
56220  * Field : Maximum Packet Size - mps
56221  *
56222  * Applies to IN and OUT endpoints.The application must program this field with the
56223  * maximum packet size for the current logical endpoint.
56224  *
56225  * Field Enumeration Values:
56226  *
56227  * Enum | Value | Description
56228  * :-----------------------------------|:------|:------------
56229  * ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES64 | 0x0 | 64 bytes
56230  * ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES32 | 0x1 | 32 bytes
56231  * ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES16 | 0x2 | 16 bytes
56232  * ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES8 | 0x3 | 8 bytes
56233  *
56234  * Field Access Macros:
56235  *
56236  */
56237 /*
56238  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_MPS
56239  *
56240  * 64 bytes
56241  */
56242 #define ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES64 0x0
56243 /*
56244  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_MPS
56245  *
56246  * 32 bytes
56247  */
56248 #define ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES32 0x1
56249 /*
56250  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_MPS
56251  *
56252  * 16 bytes
56253  */
56254 #define ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES16 0x2
56255 /*
56256  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_MPS
56257  *
56258  * 8 bytes
56259  */
56260 #define ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES8 0x3
56261 
56262 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_MPS register field. */
56263 #define ALT_USB_DEV_DIEPCTL0_MPS_LSB 0
56264 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_MPS register field. */
56265 #define ALT_USB_DEV_DIEPCTL0_MPS_MSB 1
56266 /* The width in bits of the ALT_USB_DEV_DIEPCTL0_MPS register field. */
56267 #define ALT_USB_DEV_DIEPCTL0_MPS_WIDTH 2
56268 /* The mask used to set the ALT_USB_DEV_DIEPCTL0_MPS register field value. */
56269 #define ALT_USB_DEV_DIEPCTL0_MPS_SET_MSK 0x00000003
56270 /* The mask used to clear the ALT_USB_DEV_DIEPCTL0_MPS register field value. */
56271 #define ALT_USB_DEV_DIEPCTL0_MPS_CLR_MSK 0xfffffffc
56272 /* The reset value of the ALT_USB_DEV_DIEPCTL0_MPS register field. */
56273 #define ALT_USB_DEV_DIEPCTL0_MPS_RESET 0x0
56274 /* Extracts the ALT_USB_DEV_DIEPCTL0_MPS field value from a register. */
56275 #define ALT_USB_DEV_DIEPCTL0_MPS_GET(value) (((value) & 0x00000003) >> 0)
56276 /* Produces a ALT_USB_DEV_DIEPCTL0_MPS register field value suitable for setting the register. */
56277 #define ALT_USB_DEV_DIEPCTL0_MPS_SET(value) (((value) << 0) & 0x00000003)
56278 
56279 /*
56280  * Field : USB Active Endpoint - usbactep
56281  *
56282  * This bit is always SET to 1, indicating that control endpoint 0 is always active
56283  * in all configurations and interfaces.
56284  *
56285  * Field Enumeration Values:
56286  *
56287  * Enum | Value | Description
56288  * :-------------------------------------|:------|:----------------------------------
56289  * ALT_USB_DEV_DIEPCTL0_USBACTEP_E_ACT0 | 0x1 | Control endpoint is always active
56290  *
56291  * Field Access Macros:
56292  *
56293  */
56294 /*
56295  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_USBACTEP
56296  *
56297  * Control endpoint is always active
56298  */
56299 #define ALT_USB_DEV_DIEPCTL0_USBACTEP_E_ACT0 0x1
56300 
56301 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_USBACTEP register field. */
56302 #define ALT_USB_DEV_DIEPCTL0_USBACTEP_LSB 15
56303 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_USBACTEP register field. */
56304 #define ALT_USB_DEV_DIEPCTL0_USBACTEP_MSB 15
56305 /* The width in bits of the ALT_USB_DEV_DIEPCTL0_USBACTEP register field. */
56306 #define ALT_USB_DEV_DIEPCTL0_USBACTEP_WIDTH 1
56307 /* The mask used to set the ALT_USB_DEV_DIEPCTL0_USBACTEP register field value. */
56308 #define ALT_USB_DEV_DIEPCTL0_USBACTEP_SET_MSK 0x00008000
56309 /* The mask used to clear the ALT_USB_DEV_DIEPCTL0_USBACTEP register field value. */
56310 #define ALT_USB_DEV_DIEPCTL0_USBACTEP_CLR_MSK 0xffff7fff
56311 /* The reset value of the ALT_USB_DEV_DIEPCTL0_USBACTEP register field. */
56312 #define ALT_USB_DEV_DIEPCTL0_USBACTEP_RESET 0x1
56313 /* Extracts the ALT_USB_DEV_DIEPCTL0_USBACTEP field value from a register. */
56314 #define ALT_USB_DEV_DIEPCTL0_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
56315 /* Produces a ALT_USB_DEV_DIEPCTL0_USBACTEP register field value suitable for setting the register. */
56316 #define ALT_USB_DEV_DIEPCTL0_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
56317 
56318 /*
56319  * Field : NAK Status - naksts
56320  *
56321  * When this bit is Set, either by the application or core, the core stops
56322  * transmitting data, even If there is data available in the TxFIFO. Irrespective
56323  * of this bit's setting, the core always responds to SETUP data packets with an
56324  * ACK handshake.
56325  *
56326  * Field Enumeration Values:
56327  *
56328  * Enum | Value | Description
56329  * :------------------------------------|:------|:------------------------------------------------
56330  * ALT_USB_DEV_DIEPCTL0_NAKSTS_E_INACT | 0x0 | The core is transmitting non-NAK handshakes
56331  * : | | based on the FIFO status
56332  * ALT_USB_DEV_DIEPCTL0_NAKSTS_E_ACT | 0x1 | The core is transmitting NAK handshakes on this
56333  * : | | endpoint
56334  *
56335  * Field Access Macros:
56336  *
56337  */
56338 /*
56339  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_NAKSTS
56340  *
56341  * The core is transmitting non-NAK handshakes based on the FIFO status
56342  */
56343 #define ALT_USB_DEV_DIEPCTL0_NAKSTS_E_INACT 0x0
56344 /*
56345  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_NAKSTS
56346  *
56347  * The core is transmitting NAK handshakes on this endpoint
56348  */
56349 #define ALT_USB_DEV_DIEPCTL0_NAKSTS_E_ACT 0x1
56350 
56351 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_NAKSTS register field. */
56352 #define ALT_USB_DEV_DIEPCTL0_NAKSTS_LSB 17
56353 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_NAKSTS register field. */
56354 #define ALT_USB_DEV_DIEPCTL0_NAKSTS_MSB 17
56355 /* The width in bits of the ALT_USB_DEV_DIEPCTL0_NAKSTS register field. */
56356 #define ALT_USB_DEV_DIEPCTL0_NAKSTS_WIDTH 1
56357 /* The mask used to set the ALT_USB_DEV_DIEPCTL0_NAKSTS register field value. */
56358 #define ALT_USB_DEV_DIEPCTL0_NAKSTS_SET_MSK 0x00020000
56359 /* The mask used to clear the ALT_USB_DEV_DIEPCTL0_NAKSTS register field value. */
56360 #define ALT_USB_DEV_DIEPCTL0_NAKSTS_CLR_MSK 0xfffdffff
56361 /* The reset value of the ALT_USB_DEV_DIEPCTL0_NAKSTS register field. */
56362 #define ALT_USB_DEV_DIEPCTL0_NAKSTS_RESET 0x0
56363 /* Extracts the ALT_USB_DEV_DIEPCTL0_NAKSTS field value from a register. */
56364 #define ALT_USB_DEV_DIEPCTL0_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
56365 /* Produces a ALT_USB_DEV_DIEPCTL0_NAKSTS register field value suitable for setting the register. */
56366 #define ALT_USB_DEV_DIEPCTL0_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
56367 
56368 /*
56369  * Field : Endpoint Type - eptype
56370  *
56371  * Hardcoded to 00 for control.
56372  *
56373  * Field Enumeration Values:
56374  *
56375  * Enum | Value | Description
56376  * :----------------------------------|:------|:-------------------
56377  * ALT_USB_DEV_DIEPCTL0_EPTYPE_E_ACT | 0x0 | Endpoint Control 0
56378  *
56379  * Field Access Macros:
56380  *
56381  */
56382 /*
56383  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_EPTYPE
56384  *
56385  * Endpoint Control 0
56386  */
56387 #define ALT_USB_DEV_DIEPCTL0_EPTYPE_E_ACT 0x0
56388 
56389 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_EPTYPE register field. */
56390 #define ALT_USB_DEV_DIEPCTL0_EPTYPE_LSB 18
56391 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_EPTYPE register field. */
56392 #define ALT_USB_DEV_DIEPCTL0_EPTYPE_MSB 19
56393 /* The width in bits of the ALT_USB_DEV_DIEPCTL0_EPTYPE register field. */
56394 #define ALT_USB_DEV_DIEPCTL0_EPTYPE_WIDTH 2
56395 /* The mask used to set the ALT_USB_DEV_DIEPCTL0_EPTYPE register field value. */
56396 #define ALT_USB_DEV_DIEPCTL0_EPTYPE_SET_MSK 0x000c0000
56397 /* The mask used to clear the ALT_USB_DEV_DIEPCTL0_EPTYPE register field value. */
56398 #define ALT_USB_DEV_DIEPCTL0_EPTYPE_CLR_MSK 0xfff3ffff
56399 /* The reset value of the ALT_USB_DEV_DIEPCTL0_EPTYPE register field. */
56400 #define ALT_USB_DEV_DIEPCTL0_EPTYPE_RESET 0x0
56401 /* Extracts the ALT_USB_DEV_DIEPCTL0_EPTYPE field value from a register. */
56402 #define ALT_USB_DEV_DIEPCTL0_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
56403 /* Produces a ALT_USB_DEV_DIEPCTL0_EPTYPE register field value suitable for setting the register. */
56404 #define ALT_USB_DEV_DIEPCTL0_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
56405 
56406 /*
56407  * Field : STALL Handshake - stall
56408  *
56409  * The application can only Set this bit, and the core clears it, when a SETUP
56410  * token is received for this endpoint. If a NAK bit, Global Nonperiodic IN NAK, or
56411  * Global OUT NAK is Set along with this bit, the STALL bit takes priority.
56412  *
56413  * Field Enumeration Values:
56414  *
56415  * Enum | Value | Description
56416  * :-----------------------------------|:------|:----------------
56417  * ALT_USB_DEV_DIEPCTL0_STALL_E_INACT | 0x0 | No Stall
56418  * ALT_USB_DEV_DIEPCTL0_STALL_E_ACT | 0x1 | Stall Handshake
56419  *
56420  * Field Access Macros:
56421  *
56422  */
56423 /*
56424  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_STALL
56425  *
56426  * No Stall
56427  */
56428 #define ALT_USB_DEV_DIEPCTL0_STALL_E_INACT 0x0
56429 /*
56430  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_STALL
56431  *
56432  * Stall Handshake
56433  */
56434 #define ALT_USB_DEV_DIEPCTL0_STALL_E_ACT 0x1
56435 
56436 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_STALL register field. */
56437 #define ALT_USB_DEV_DIEPCTL0_STALL_LSB 21
56438 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_STALL register field. */
56439 #define ALT_USB_DEV_DIEPCTL0_STALL_MSB 21
56440 /* The width in bits of the ALT_USB_DEV_DIEPCTL0_STALL register field. */
56441 #define ALT_USB_DEV_DIEPCTL0_STALL_WIDTH 1
56442 /* The mask used to set the ALT_USB_DEV_DIEPCTL0_STALL register field value. */
56443 #define ALT_USB_DEV_DIEPCTL0_STALL_SET_MSK 0x00200000
56444 /* The mask used to clear the ALT_USB_DEV_DIEPCTL0_STALL register field value. */
56445 #define ALT_USB_DEV_DIEPCTL0_STALL_CLR_MSK 0xffdfffff
56446 /* The reset value of the ALT_USB_DEV_DIEPCTL0_STALL register field. */
56447 #define ALT_USB_DEV_DIEPCTL0_STALL_RESET 0x0
56448 /* Extracts the ALT_USB_DEV_DIEPCTL0_STALL field value from a register. */
56449 #define ALT_USB_DEV_DIEPCTL0_STALL_GET(value) (((value) & 0x00200000) >> 21)
56450 /* Produces a ALT_USB_DEV_DIEPCTL0_STALL register field value suitable for setting the register. */
56451 #define ALT_USB_DEV_DIEPCTL0_STALL_SET(value) (((value) << 21) & 0x00200000)
56452 
56453 /*
56454  * Field : TxFIFO Number - txfnum
56455  *
56456  * for Shared FIFO operation, this value is always Set to 0, indicating that
56457  * control IN endpoint 0 data is always written in the Non-Periodic Transmit FIFO.
56458  * for Dedicated FIFO operation, this value is Set to the FIFO number that is
56459  * assigned to IN Endpoint 0.
56460  *
56461  * Field Access Macros:
56462  *
56463  */
56464 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_TXFNUM register field. */
56465 #define ALT_USB_DEV_DIEPCTL0_TXFNUM_LSB 22
56466 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_TXFNUM register field. */
56467 #define ALT_USB_DEV_DIEPCTL0_TXFNUM_MSB 25
56468 /* The width in bits of the ALT_USB_DEV_DIEPCTL0_TXFNUM register field. */
56469 #define ALT_USB_DEV_DIEPCTL0_TXFNUM_WIDTH 4
56470 /* The mask used to set the ALT_USB_DEV_DIEPCTL0_TXFNUM register field value. */
56471 #define ALT_USB_DEV_DIEPCTL0_TXFNUM_SET_MSK 0x03c00000
56472 /* The mask used to clear the ALT_USB_DEV_DIEPCTL0_TXFNUM register field value. */
56473 #define ALT_USB_DEV_DIEPCTL0_TXFNUM_CLR_MSK 0xfc3fffff
56474 /* The reset value of the ALT_USB_DEV_DIEPCTL0_TXFNUM register field. */
56475 #define ALT_USB_DEV_DIEPCTL0_TXFNUM_RESET 0x0
56476 /* Extracts the ALT_USB_DEV_DIEPCTL0_TXFNUM field value from a register. */
56477 #define ALT_USB_DEV_DIEPCTL0_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
56478 /* Produces a ALT_USB_DEV_DIEPCTL0_TXFNUM register field value suitable for setting the register. */
56479 #define ALT_USB_DEV_DIEPCTL0_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
56480 
56481 /*
56482  * Field : Clear NAK - cnak
56483  *
56484  * A write to this bit clears the NAK bit for the endpoint.
56485  *
56486  * Field Enumeration Values:
56487  *
56488  * Enum | Value | Description
56489  * :----------------------------------|:------|:------------
56490  * ALT_USB_DEV_DIEPCTL0_CNAK_E_NOCLR | 0x0 | No action
56491  * ALT_USB_DEV_DIEPCTL0_CNAK_E_CLR | 0x1 | Clear NAK
56492  *
56493  * Field Access Macros:
56494  *
56495  */
56496 /*
56497  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_CNAK
56498  *
56499  * No action
56500  */
56501 #define ALT_USB_DEV_DIEPCTL0_CNAK_E_NOCLR 0x0
56502 /*
56503  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_CNAK
56504  *
56505  * Clear NAK
56506  */
56507 #define ALT_USB_DEV_DIEPCTL0_CNAK_E_CLR 0x1
56508 
56509 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_CNAK register field. */
56510 #define ALT_USB_DEV_DIEPCTL0_CNAK_LSB 26
56511 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_CNAK register field. */
56512 #define ALT_USB_DEV_DIEPCTL0_CNAK_MSB 26
56513 /* The width in bits of the ALT_USB_DEV_DIEPCTL0_CNAK register field. */
56514 #define ALT_USB_DEV_DIEPCTL0_CNAK_WIDTH 1
56515 /* The mask used to set the ALT_USB_DEV_DIEPCTL0_CNAK register field value. */
56516 #define ALT_USB_DEV_DIEPCTL0_CNAK_SET_MSK 0x04000000
56517 /* The mask used to clear the ALT_USB_DEV_DIEPCTL0_CNAK register field value. */
56518 #define ALT_USB_DEV_DIEPCTL0_CNAK_CLR_MSK 0xfbffffff
56519 /* The reset value of the ALT_USB_DEV_DIEPCTL0_CNAK register field. */
56520 #define ALT_USB_DEV_DIEPCTL0_CNAK_RESET 0x0
56521 /* Extracts the ALT_USB_DEV_DIEPCTL0_CNAK field value from a register. */
56522 #define ALT_USB_DEV_DIEPCTL0_CNAK_GET(value) (((value) & 0x04000000) >> 26)
56523 /* Produces a ALT_USB_DEV_DIEPCTL0_CNAK register field value suitable for setting the register. */
56524 #define ALT_USB_DEV_DIEPCTL0_CNAK_SET(value) (((value) << 26) & 0x04000000)
56525 
56526 /*
56527  * Field : Set NAK - snak
56528  *
56529  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
56530  * application can control the transmission of NAK handshakes on an endpoint. The
56531  * core can also Set this bit for an endpoint after a SETUP packet is received on
56532  * that endpoint.
56533  *
56534  * Field Enumeration Values:
56535  *
56536  * Enum | Value | Description
56537  * :----------------------------------|:------|:------------
56538  * ALT_USB_DEV_DIEPCTL0_SNAK_E_NOSET | 0x0 | No action
56539  * ALT_USB_DEV_DIEPCTL0_SNAK_E_SET | 0x1 | Set NAK
56540  *
56541  * Field Access Macros:
56542  *
56543  */
56544 /*
56545  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_SNAK
56546  *
56547  * No action
56548  */
56549 #define ALT_USB_DEV_DIEPCTL0_SNAK_E_NOSET 0x0
56550 /*
56551  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_SNAK
56552  *
56553  * Set NAK
56554  */
56555 #define ALT_USB_DEV_DIEPCTL0_SNAK_E_SET 0x1
56556 
56557 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_SNAK register field. */
56558 #define ALT_USB_DEV_DIEPCTL0_SNAK_LSB 27
56559 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_SNAK register field. */
56560 #define ALT_USB_DEV_DIEPCTL0_SNAK_MSB 27
56561 /* The width in bits of the ALT_USB_DEV_DIEPCTL0_SNAK register field. */
56562 #define ALT_USB_DEV_DIEPCTL0_SNAK_WIDTH 1
56563 /* The mask used to set the ALT_USB_DEV_DIEPCTL0_SNAK register field value. */
56564 #define ALT_USB_DEV_DIEPCTL0_SNAK_SET_MSK 0x08000000
56565 /* The mask used to clear the ALT_USB_DEV_DIEPCTL0_SNAK register field value. */
56566 #define ALT_USB_DEV_DIEPCTL0_SNAK_CLR_MSK 0xf7ffffff
56567 /* The reset value of the ALT_USB_DEV_DIEPCTL0_SNAK register field. */
56568 #define ALT_USB_DEV_DIEPCTL0_SNAK_RESET 0x0
56569 /* Extracts the ALT_USB_DEV_DIEPCTL0_SNAK field value from a register. */
56570 #define ALT_USB_DEV_DIEPCTL0_SNAK_GET(value) (((value) & 0x08000000) >> 27)
56571 /* Produces a ALT_USB_DEV_DIEPCTL0_SNAK register field value suitable for setting the register. */
56572 #define ALT_USB_DEV_DIEPCTL0_SNAK_SET(value) (((value) << 27) & 0x08000000)
56573 
56574 /*
56575  * Field : Endpoint Disable - epdis
56576  *
56577  * The application sets this bit to stop transmitting data on an endpoint, even
56578  * before the transfer for that endpoint is complete. The application must wait for
56579  * the Endpoint Disabled interrupt before treating the endpoint as disabled. The
56580  * core clears this bit before setting the Endpoint Disabled Interrupt. The
56581  * application must Set this bit only If Endpoint Enable is already Set for this
56582  * endpoint.
56583  *
56584  * Field Enumeration Values:
56585  *
56586  * Enum | Value | Description
56587  * :-----------------------------------|:------|:-----------------------------------
56588  * ALT_USB_DEV_DIEPCTL0_EPDIS_E_INACT | 0x0 | No action
56589  * ALT_USB_DEV_DIEPCTL0_EPDIS_E_ACT | 0x1 | Stop transmitting data on endpoint
56590  *
56591  * Field Access Macros:
56592  *
56593  */
56594 /*
56595  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_EPDIS
56596  *
56597  * No action
56598  */
56599 #define ALT_USB_DEV_DIEPCTL0_EPDIS_E_INACT 0x0
56600 /*
56601  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_EPDIS
56602  *
56603  * Stop transmitting data on endpoint
56604  */
56605 #define ALT_USB_DEV_DIEPCTL0_EPDIS_E_ACT 0x1
56606 
56607 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_EPDIS register field. */
56608 #define ALT_USB_DEV_DIEPCTL0_EPDIS_LSB 30
56609 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_EPDIS register field. */
56610 #define ALT_USB_DEV_DIEPCTL0_EPDIS_MSB 30
56611 /* The width in bits of the ALT_USB_DEV_DIEPCTL0_EPDIS register field. */
56612 #define ALT_USB_DEV_DIEPCTL0_EPDIS_WIDTH 1
56613 /* The mask used to set the ALT_USB_DEV_DIEPCTL0_EPDIS register field value. */
56614 #define ALT_USB_DEV_DIEPCTL0_EPDIS_SET_MSK 0x40000000
56615 /* The mask used to clear the ALT_USB_DEV_DIEPCTL0_EPDIS register field value. */
56616 #define ALT_USB_DEV_DIEPCTL0_EPDIS_CLR_MSK 0xbfffffff
56617 /* The reset value of the ALT_USB_DEV_DIEPCTL0_EPDIS register field. */
56618 #define ALT_USB_DEV_DIEPCTL0_EPDIS_RESET 0x0
56619 /* Extracts the ALT_USB_DEV_DIEPCTL0_EPDIS field value from a register. */
56620 #define ALT_USB_DEV_DIEPCTL0_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
56621 /* Produces a ALT_USB_DEV_DIEPCTL0_EPDIS register field value suitable for setting the register. */
56622 #define ALT_USB_DEV_DIEPCTL0_EPDIS_SET(value) (((value) << 30) & 0x40000000)
56623 
56624 /*
56625  * Field : Endpoint Enable - epena
56626  *
56627  * When Scatter/Gather DMA mode is enabled, for IN endpoints this bit indicates
56628  * that the descriptor structure and data buffer with data ready to transmit is
56629  * setup. When Scatter/Gather DMA mode is disabled such as in bufferpointer based
56630  * DMA mode this bit indicates that data is ready to be transmitted on the
56631  * endpoint. The core clears this bit before setting the following interrupts on
56632  * this endpoint:
56633  *
56634  * * Endpoint Disabled
56635  *
56636  * * Transfer Completed
56637  *
56638  * Field Enumeration Values:
56639  *
56640  * Enum | Value | Description
56641  * :-----------------------------------|:------|:-----------------
56642  * ALT_USB_DEV_DIEPCTL0_EPENA_E_INACT | 0x0 | No action
56643  * ALT_USB_DEV_DIEPCTL0_EPENA_E_ACT | 0x1 | Endpoint Enabled
56644  *
56645  * Field Access Macros:
56646  *
56647  */
56648 /*
56649  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_EPENA
56650  *
56651  * No action
56652  */
56653 #define ALT_USB_DEV_DIEPCTL0_EPENA_E_INACT 0x0
56654 /*
56655  * Enumerated value for register field ALT_USB_DEV_DIEPCTL0_EPENA
56656  *
56657  * Endpoint Enabled
56658  */
56659 #define ALT_USB_DEV_DIEPCTL0_EPENA_E_ACT 0x1
56660 
56661 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_EPENA register field. */
56662 #define ALT_USB_DEV_DIEPCTL0_EPENA_LSB 31
56663 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_EPENA register field. */
56664 #define ALT_USB_DEV_DIEPCTL0_EPENA_MSB 31
56665 /* The width in bits of the ALT_USB_DEV_DIEPCTL0_EPENA register field. */
56666 #define ALT_USB_DEV_DIEPCTL0_EPENA_WIDTH 1
56667 /* The mask used to set the ALT_USB_DEV_DIEPCTL0_EPENA register field value. */
56668 #define ALT_USB_DEV_DIEPCTL0_EPENA_SET_MSK 0x80000000
56669 /* The mask used to clear the ALT_USB_DEV_DIEPCTL0_EPENA register field value. */
56670 #define ALT_USB_DEV_DIEPCTL0_EPENA_CLR_MSK 0x7fffffff
56671 /* The reset value of the ALT_USB_DEV_DIEPCTL0_EPENA register field. */
56672 #define ALT_USB_DEV_DIEPCTL0_EPENA_RESET 0x0
56673 /* Extracts the ALT_USB_DEV_DIEPCTL0_EPENA field value from a register. */
56674 #define ALT_USB_DEV_DIEPCTL0_EPENA_GET(value) (((value) & 0x80000000) >> 31)
56675 /* Produces a ALT_USB_DEV_DIEPCTL0_EPENA register field value suitable for setting the register. */
56676 #define ALT_USB_DEV_DIEPCTL0_EPENA_SET(value) (((value) << 31) & 0x80000000)
56677 
56678 #ifndef __ASSEMBLY__
56679 /*
56680  * WARNING: The C register and register group struct declarations are provided for
56681  * convenience and illustrative purposes. They should, however, be used with
56682  * caution as the C language standard provides no guarantees about the alignment or
56683  * atomicity of device memory accesses. The recommended practice for writing
56684  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
56685  * alt_write_word() functions.
56686  *
56687  * The struct declaration for register ALT_USB_DEV_DIEPCTL0.
56688  */
56689 struct ALT_USB_DEV_DIEPCTL0_s
56690 {
56691  uint32_t mps : 2; /* Maximum Packet Size */
56692  uint32_t : 13; /* *UNDEFINED* */
56693  const uint32_t usbactep : 1; /* USB Active Endpoint */
56694  uint32_t : 1; /* *UNDEFINED* */
56695  const uint32_t naksts : 1; /* NAK Status */
56696  const uint32_t eptype : 2; /* Endpoint Type */
56697  uint32_t : 1; /* *UNDEFINED* */
56698  const uint32_t stall : 1; /* STALL Handshake */
56699  uint32_t txfnum : 4; /* TxFIFO Number */
56700  uint32_t cnak : 1; /* Clear NAK */
56701  uint32_t snak : 1; /* Set NAK */
56702  uint32_t : 2; /* *UNDEFINED* */
56703  const uint32_t epdis : 1; /* Endpoint Disable */
56704  const uint32_t epena : 1; /* Endpoint Enable */
56705 };
56706 
56707 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL0. */
56708 typedef volatile struct ALT_USB_DEV_DIEPCTL0_s ALT_USB_DEV_DIEPCTL0_t;
56709 #endif /* __ASSEMBLY__ */
56710 
56711 /* The byte offset of the ALT_USB_DEV_DIEPCTL0 register from the beginning of the component. */
56712 #define ALT_USB_DEV_DIEPCTL0_OFST 0x100
56713 /* The address of the ALT_USB_DEV_DIEPCTL0 register. */
56714 #define ALT_USB_DEV_DIEPCTL0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL0_OFST))
56715 
56716 /*
56717  * Register : Device IN Endpoint 0 Interrupt Register - diepint0
56718  *
56719  * This register indicates the status of an endpoint with respect to USB- and AHB-
56720  * related events. The application must read this register when the OUT Endpoints
56721  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
56722  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
56723  * can read this register, it must first read the Device All Endpoints Interrupt
56724  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
56725  * Interrupt register. The application must clear the appropriate bit in this
56726  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
56727  *
56728  * Register Layout
56729  *
56730  * Bits | Access | Reset | Description
56731  * :--------|:-------|:------|:---------------------------------------
56732  * [0] | R | 0x0 | Transfer Completed Interrupt
56733  * [1] | R | 0x0 | Endpoint Disabled Interrupt
56734  * [2] | R | 0x0 | AHB Error
56735  * [3] | R | 0x0 | Timeout Condition
56736  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
56737  * [5] | R | 0x0 | IN Token Received with EP Mismatch
56738  * [6] | R | 0x0 | IN Endpoint NAK Effective
56739  * [7] | R | 0x1 | Transmit FIFO Empty
56740  * [8] | R | 0x0 | Fifo Underrun
56741  * [9] | R | 0x0 | BNA Interrupt
56742  * [10] | ??? | 0x0 | *UNDEFINED*
56743  * [11] | R | 0x0 | Packet Drop Status
56744  * [12] | R | 0x0 | BbleErr Interrupt
56745  * [13] | R | 0x0 | NAK Interrupt
56746  * [14] | R | 0x0 | NYET Interrupt
56747  * [31:15] | ??? | 0x0 | *UNDEFINED*
56748  *
56749  */
56750 /*
56751  * Field : Transfer Completed Interrupt - xfercompl
56752  *
56753  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
56754  *
56755  * * for IN endpoint this field indicates that the requested data from the
56756  * descriptor is moved from external system memory to internal FIFO.
56757  *
56758  * * for OUT endpoint this field indicates that the requested data from the
56759  * internal FIFO is moved to external system memory. This interrupt is generated
56760  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
56761  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
56762  * this field indicates that the programmed transfer is complete on the AHB as
56763  * well as on the USB, for this endpoint.
56764  *
56765  * Field Enumeration Values:
56766  *
56767  * Enum | Value | Description
56768  * :---------------------------------------|:------|:-----------------------------
56769  * ALT_USB_DEV_DIEPINT0_XFERCOMPL_E_INACT | 0x0 | No Interrupt
56770  * ALT_USB_DEV_DIEPINT0_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
56771  *
56772  * Field Access Macros:
56773  *
56774  */
56775 /*
56776  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_XFERCOMPL
56777  *
56778  * No Interrupt
56779  */
56780 #define ALT_USB_DEV_DIEPINT0_XFERCOMPL_E_INACT 0x0
56781 /*
56782  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_XFERCOMPL
56783  *
56784  * Transfer Completed Interrupt
56785  */
56786 #define ALT_USB_DEV_DIEPINT0_XFERCOMPL_E_ACT 0x1
56787 
56788 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_XFERCOMPL register field. */
56789 #define ALT_USB_DEV_DIEPINT0_XFERCOMPL_LSB 0
56790 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_XFERCOMPL register field. */
56791 #define ALT_USB_DEV_DIEPINT0_XFERCOMPL_MSB 0
56792 /* The width in bits of the ALT_USB_DEV_DIEPINT0_XFERCOMPL register field. */
56793 #define ALT_USB_DEV_DIEPINT0_XFERCOMPL_WIDTH 1
56794 /* The mask used to set the ALT_USB_DEV_DIEPINT0_XFERCOMPL register field value. */
56795 #define ALT_USB_DEV_DIEPINT0_XFERCOMPL_SET_MSK 0x00000001
56796 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_XFERCOMPL register field value. */
56797 #define ALT_USB_DEV_DIEPINT0_XFERCOMPL_CLR_MSK 0xfffffffe
56798 /* The reset value of the ALT_USB_DEV_DIEPINT0_XFERCOMPL register field. */
56799 #define ALT_USB_DEV_DIEPINT0_XFERCOMPL_RESET 0x0
56800 /* Extracts the ALT_USB_DEV_DIEPINT0_XFERCOMPL field value from a register. */
56801 #define ALT_USB_DEV_DIEPINT0_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
56802 /* Produces a ALT_USB_DEV_DIEPINT0_XFERCOMPL register field value suitable for setting the register. */
56803 #define ALT_USB_DEV_DIEPINT0_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
56804 
56805 /*
56806  * Field : Endpoint Disabled Interrupt - epdisbld
56807  *
56808  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
56809  * disabled per the application's request.
56810  *
56811  * Field Enumeration Values:
56812  *
56813  * Enum | Value | Description
56814  * :--------------------------------------|:------|:----------------------------
56815  * ALT_USB_DEV_DIEPINT0_EPDISBLD_E_INACT | 0x0 | No Interrupt
56816  * ALT_USB_DEV_DIEPINT0_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
56817  *
56818  * Field Access Macros:
56819  *
56820  */
56821 /*
56822  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_EPDISBLD
56823  *
56824  * No Interrupt
56825  */
56826 #define ALT_USB_DEV_DIEPINT0_EPDISBLD_E_INACT 0x0
56827 /*
56828  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_EPDISBLD
56829  *
56830  * Endpoint Disabled Interrupt
56831  */
56832 #define ALT_USB_DEV_DIEPINT0_EPDISBLD_E_ACT 0x1
56833 
56834 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_EPDISBLD register field. */
56835 #define ALT_USB_DEV_DIEPINT0_EPDISBLD_LSB 1
56836 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_EPDISBLD register field. */
56837 #define ALT_USB_DEV_DIEPINT0_EPDISBLD_MSB 1
56838 /* The width in bits of the ALT_USB_DEV_DIEPINT0_EPDISBLD register field. */
56839 #define ALT_USB_DEV_DIEPINT0_EPDISBLD_WIDTH 1
56840 /* The mask used to set the ALT_USB_DEV_DIEPINT0_EPDISBLD register field value. */
56841 #define ALT_USB_DEV_DIEPINT0_EPDISBLD_SET_MSK 0x00000002
56842 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_EPDISBLD register field value. */
56843 #define ALT_USB_DEV_DIEPINT0_EPDISBLD_CLR_MSK 0xfffffffd
56844 /* The reset value of the ALT_USB_DEV_DIEPINT0_EPDISBLD register field. */
56845 #define ALT_USB_DEV_DIEPINT0_EPDISBLD_RESET 0x0
56846 /* Extracts the ALT_USB_DEV_DIEPINT0_EPDISBLD field value from a register. */
56847 #define ALT_USB_DEV_DIEPINT0_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
56848 /* Produces a ALT_USB_DEV_DIEPINT0_EPDISBLD register field value suitable for setting the register. */
56849 #define ALT_USB_DEV_DIEPINT0_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
56850 
56851 /*
56852  * Field : AHB Error - ahberr
56853  *
56854  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
56855  * there is an AHB error during an AHB read/write. The application can read the
56856  * corresponding endpoint DMA address register to get the error address.
56857  *
56858  * Field Enumeration Values:
56859  *
56860  * Enum | Value | Description
56861  * :------------------------------------|:------|:--------------------
56862  * ALT_USB_DEV_DIEPINT0_AHBERR_E_INACT | 0x0 | No Interrupt
56863  * ALT_USB_DEV_DIEPINT0_AHBERR_E_ACT | 0x1 | AHB Error interrupt
56864  *
56865  * Field Access Macros:
56866  *
56867  */
56868 /*
56869  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_AHBERR
56870  *
56871  * No Interrupt
56872  */
56873 #define ALT_USB_DEV_DIEPINT0_AHBERR_E_INACT 0x0
56874 /*
56875  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_AHBERR
56876  *
56877  * AHB Error interrupt
56878  */
56879 #define ALT_USB_DEV_DIEPINT0_AHBERR_E_ACT 0x1
56880 
56881 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_AHBERR register field. */
56882 #define ALT_USB_DEV_DIEPINT0_AHBERR_LSB 2
56883 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_AHBERR register field. */
56884 #define ALT_USB_DEV_DIEPINT0_AHBERR_MSB 2
56885 /* The width in bits of the ALT_USB_DEV_DIEPINT0_AHBERR register field. */
56886 #define ALT_USB_DEV_DIEPINT0_AHBERR_WIDTH 1
56887 /* The mask used to set the ALT_USB_DEV_DIEPINT0_AHBERR register field value. */
56888 #define ALT_USB_DEV_DIEPINT0_AHBERR_SET_MSK 0x00000004
56889 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_AHBERR register field value. */
56890 #define ALT_USB_DEV_DIEPINT0_AHBERR_CLR_MSK 0xfffffffb
56891 /* The reset value of the ALT_USB_DEV_DIEPINT0_AHBERR register field. */
56892 #define ALT_USB_DEV_DIEPINT0_AHBERR_RESET 0x0
56893 /* Extracts the ALT_USB_DEV_DIEPINT0_AHBERR field value from a register. */
56894 #define ALT_USB_DEV_DIEPINT0_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
56895 /* Produces a ALT_USB_DEV_DIEPINT0_AHBERR register field value suitable for setting the register. */
56896 #define ALT_USB_DEV_DIEPINT0_AHBERR_SET(value) (((value) << 2) & 0x00000004)
56897 
56898 /*
56899  * Field : Timeout Condition - timeout
56900  *
56901  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
56902  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
56903  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
56904  * detected a timeout condition on the USB for the last IN token on this endpoint.
56905  *
56906  * Field Enumeration Values:
56907  *
56908  * Enum | Value | Description
56909  * :---------------------------------|:------|:------------------
56910  * ALT_USB_DEV_DIEPINT0_TMO_E_INACT | 0x0 | No interrupt
56911  * ALT_USB_DEV_DIEPINT0_TMO_E_ACT | 0x1 | Timeout interrupy
56912  *
56913  * Field Access Macros:
56914  *
56915  */
56916 /*
56917  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_TMO
56918  *
56919  * No interrupt
56920  */
56921 #define ALT_USB_DEV_DIEPINT0_TMO_E_INACT 0x0
56922 /*
56923  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_TMO
56924  *
56925  * Timeout interrupy
56926  */
56927 #define ALT_USB_DEV_DIEPINT0_TMO_E_ACT 0x1
56928 
56929 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_TMO register field. */
56930 #define ALT_USB_DEV_DIEPINT0_TMO_LSB 3
56931 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_TMO register field. */
56932 #define ALT_USB_DEV_DIEPINT0_TMO_MSB 3
56933 /* The width in bits of the ALT_USB_DEV_DIEPINT0_TMO register field. */
56934 #define ALT_USB_DEV_DIEPINT0_TMO_WIDTH 1
56935 /* The mask used to set the ALT_USB_DEV_DIEPINT0_TMO register field value. */
56936 #define ALT_USB_DEV_DIEPINT0_TMO_SET_MSK 0x00000008
56937 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_TMO register field value. */
56938 #define ALT_USB_DEV_DIEPINT0_TMO_CLR_MSK 0xfffffff7
56939 /* The reset value of the ALT_USB_DEV_DIEPINT0_TMO register field. */
56940 #define ALT_USB_DEV_DIEPINT0_TMO_RESET 0x0
56941 /* Extracts the ALT_USB_DEV_DIEPINT0_TMO field value from a register. */
56942 #define ALT_USB_DEV_DIEPINT0_TMO_GET(value) (((value) & 0x00000008) >> 3)
56943 /* Produces a ALT_USB_DEV_DIEPINT0_TMO register field value suitable for setting the register. */
56944 #define ALT_USB_DEV_DIEPINT0_TMO_SET(value) (((value) << 3) & 0x00000008)
56945 
56946 /*
56947  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
56948  *
56949  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
56950  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
56951  * interrupt is asserted on the endpoint for which the IN token was received.
56952  *
56953  * Field Enumeration Values:
56954  *
56955  * Enum | Value | Description
56956  * :-----------------------------------------|:------|:----------------------------
56957  * ALT_USB_DEV_DIEPINT0_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
56958  * ALT_USB_DEV_DIEPINT0_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
56959  *
56960  * Field Access Macros:
56961  *
56962  */
56963 /*
56964  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_INTKNTXFEMP
56965  *
56966  * No interrupt
56967  */
56968 #define ALT_USB_DEV_DIEPINT0_INTKNTXFEMP_E_INACT 0x0
56969 /*
56970  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_INTKNTXFEMP
56971  *
56972  * IN Token Received Interrupt
56973  */
56974 #define ALT_USB_DEV_DIEPINT0_INTKNTXFEMP_E_ACT 0x1
56975 
56976 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_INTKNTXFEMP register field. */
56977 #define ALT_USB_DEV_DIEPINT0_INTKNTXFEMP_LSB 4
56978 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_INTKNTXFEMP register field. */
56979 #define ALT_USB_DEV_DIEPINT0_INTKNTXFEMP_MSB 4
56980 /* The width in bits of the ALT_USB_DEV_DIEPINT0_INTKNTXFEMP register field. */
56981 #define ALT_USB_DEV_DIEPINT0_INTKNTXFEMP_WIDTH 1
56982 /* The mask used to set the ALT_USB_DEV_DIEPINT0_INTKNTXFEMP register field value. */
56983 #define ALT_USB_DEV_DIEPINT0_INTKNTXFEMP_SET_MSK 0x00000010
56984 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_INTKNTXFEMP register field value. */
56985 #define ALT_USB_DEV_DIEPINT0_INTKNTXFEMP_CLR_MSK 0xffffffef
56986 /* The reset value of the ALT_USB_DEV_DIEPINT0_INTKNTXFEMP register field. */
56987 #define ALT_USB_DEV_DIEPINT0_INTKNTXFEMP_RESET 0x0
56988 /* Extracts the ALT_USB_DEV_DIEPINT0_INTKNTXFEMP field value from a register. */
56989 #define ALT_USB_DEV_DIEPINT0_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
56990 /* Produces a ALT_USB_DEV_DIEPINT0_INTKNTXFEMP register field value suitable for setting the register. */
56991 #define ALT_USB_DEV_DIEPINT0_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
56992 
56993 /*
56994  * Field : IN Token Received with EP Mismatch - intknepmis
56995  *
56996  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
56997  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
56998  * IN token was received. This interrupt is asserted on the endpoint for which the
56999  * IN token was received.
57000  *
57001  * Field Enumeration Values:
57002  *
57003  * Enum | Value | Description
57004  * :----------------------------------------|:------|:---------------------------------------------
57005  * ALT_USB_DEV_DIEPINT0_INTKNEPMIS_E_INACT | 0x0 | No interrupt
57006  * ALT_USB_DEV_DIEPINT0_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
57007  *
57008  * Field Access Macros:
57009  *
57010  */
57011 /*
57012  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_INTKNEPMIS
57013  *
57014  * No interrupt
57015  */
57016 #define ALT_USB_DEV_DIEPINT0_INTKNEPMIS_E_INACT 0x0
57017 /*
57018  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_INTKNEPMIS
57019  *
57020  * IN Token Received with EP Mismatch interrupt
57021  */
57022 #define ALT_USB_DEV_DIEPINT0_INTKNEPMIS_E_ACT 0x1
57023 
57024 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_INTKNEPMIS register field. */
57025 #define ALT_USB_DEV_DIEPINT0_INTKNEPMIS_LSB 5
57026 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_INTKNEPMIS register field. */
57027 #define ALT_USB_DEV_DIEPINT0_INTKNEPMIS_MSB 5
57028 /* The width in bits of the ALT_USB_DEV_DIEPINT0_INTKNEPMIS register field. */
57029 #define ALT_USB_DEV_DIEPINT0_INTKNEPMIS_WIDTH 1
57030 /* The mask used to set the ALT_USB_DEV_DIEPINT0_INTKNEPMIS register field value. */
57031 #define ALT_USB_DEV_DIEPINT0_INTKNEPMIS_SET_MSK 0x00000020
57032 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_INTKNEPMIS register field value. */
57033 #define ALT_USB_DEV_DIEPINT0_INTKNEPMIS_CLR_MSK 0xffffffdf
57034 /* The reset value of the ALT_USB_DEV_DIEPINT0_INTKNEPMIS register field. */
57035 #define ALT_USB_DEV_DIEPINT0_INTKNEPMIS_RESET 0x0
57036 /* Extracts the ALT_USB_DEV_DIEPINT0_INTKNEPMIS field value from a register. */
57037 #define ALT_USB_DEV_DIEPINT0_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
57038 /* Produces a ALT_USB_DEV_DIEPINT0_INTKNEPMIS register field value suitable for setting the register. */
57039 #define ALT_USB_DEV_DIEPINT0_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
57040 
57041 /*
57042  * Field : IN Endpoint NAK Effective - inepnakeff
57043  *
57044  * Applies to periodic IN endpoints only. This bit can be cleared when the
57045  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
57046  * interrupt indicates that the core has sampled the NAK bit Set (either by the
57047  * application or by the core). The interrupt indicates that the IN endpoint NAK
57048  * bit Set by the application has taken effect in the core.This interrupt does not
57049  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
57050  * over a NAK bit.
57051  *
57052  * Field Enumeration Values:
57053  *
57054  * Enum | Value | Description
57055  * :----------------------------------------|:------|:------------------------------------
57056  * ALT_USB_DEV_DIEPINT0_INEPNAKEFF_E_INACT | 0x0 | No interrupt
57057  * ALT_USB_DEV_DIEPINT0_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
57058  *
57059  * Field Access Macros:
57060  *
57061  */
57062 /*
57063  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_INEPNAKEFF
57064  *
57065  * No interrupt
57066  */
57067 #define ALT_USB_DEV_DIEPINT0_INEPNAKEFF_E_INACT 0x0
57068 /*
57069  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_INEPNAKEFF
57070  *
57071  * IN Endpoint NAK Effective interrupt
57072  */
57073 #define ALT_USB_DEV_DIEPINT0_INEPNAKEFF_E_ACT 0x1
57074 
57075 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_INEPNAKEFF register field. */
57076 #define ALT_USB_DEV_DIEPINT0_INEPNAKEFF_LSB 6
57077 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_INEPNAKEFF register field. */
57078 #define ALT_USB_DEV_DIEPINT0_INEPNAKEFF_MSB 6
57079 /* The width in bits of the ALT_USB_DEV_DIEPINT0_INEPNAKEFF register field. */
57080 #define ALT_USB_DEV_DIEPINT0_INEPNAKEFF_WIDTH 1
57081 /* The mask used to set the ALT_USB_DEV_DIEPINT0_INEPNAKEFF register field value. */
57082 #define ALT_USB_DEV_DIEPINT0_INEPNAKEFF_SET_MSK 0x00000040
57083 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_INEPNAKEFF register field value. */
57084 #define ALT_USB_DEV_DIEPINT0_INEPNAKEFF_CLR_MSK 0xffffffbf
57085 /* The reset value of the ALT_USB_DEV_DIEPINT0_INEPNAKEFF register field. */
57086 #define ALT_USB_DEV_DIEPINT0_INEPNAKEFF_RESET 0x0
57087 /* Extracts the ALT_USB_DEV_DIEPINT0_INEPNAKEFF field value from a register. */
57088 #define ALT_USB_DEV_DIEPINT0_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
57089 /* Produces a ALT_USB_DEV_DIEPINT0_INEPNAKEFF register field value suitable for setting the register. */
57090 #define ALT_USB_DEV_DIEPINT0_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
57091 
57092 /*
57093  * Field : Transmit FIFO Empty - txfemp
57094  *
57095  * This bit is valid only for IN Endpoints This interrupt is asserted when the
57096  * TxFIFO for this endpoint is either half or completely empty. The half or
57097  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
57098  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
57099  *
57100  * Field Enumeration Values:
57101  *
57102  * Enum | Value | Description
57103  * :------------------------------------|:------|:------------------------------
57104  * ALT_USB_DEV_DIEPINT0_TXFEMP_E_INACT | 0x0 | No interrupt
57105  * ALT_USB_DEV_DIEPINT0_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
57106  *
57107  * Field Access Macros:
57108  *
57109  */
57110 /*
57111  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_TXFEMP
57112  *
57113  * No interrupt
57114  */
57115 #define ALT_USB_DEV_DIEPINT0_TXFEMP_E_INACT 0x0
57116 /*
57117  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_TXFEMP
57118  *
57119  * Transmit FIFO Empty interrupt
57120  */
57121 #define ALT_USB_DEV_DIEPINT0_TXFEMP_E_ACT 0x1
57122 
57123 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_TXFEMP register field. */
57124 #define ALT_USB_DEV_DIEPINT0_TXFEMP_LSB 7
57125 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_TXFEMP register field. */
57126 #define ALT_USB_DEV_DIEPINT0_TXFEMP_MSB 7
57127 /* The width in bits of the ALT_USB_DEV_DIEPINT0_TXFEMP register field. */
57128 #define ALT_USB_DEV_DIEPINT0_TXFEMP_WIDTH 1
57129 /* The mask used to set the ALT_USB_DEV_DIEPINT0_TXFEMP register field value. */
57130 #define ALT_USB_DEV_DIEPINT0_TXFEMP_SET_MSK 0x00000080
57131 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_TXFEMP register field value. */
57132 #define ALT_USB_DEV_DIEPINT0_TXFEMP_CLR_MSK 0xffffff7f
57133 /* The reset value of the ALT_USB_DEV_DIEPINT0_TXFEMP register field. */
57134 #define ALT_USB_DEV_DIEPINT0_TXFEMP_RESET 0x1
57135 /* Extracts the ALT_USB_DEV_DIEPINT0_TXFEMP field value from a register. */
57136 #define ALT_USB_DEV_DIEPINT0_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
57137 /* Produces a ALT_USB_DEV_DIEPINT0_TXFEMP register field value suitable for setting the register. */
57138 #define ALT_USB_DEV_DIEPINT0_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
57139 
57140 /*
57141  * Field : Fifo Underrun - txfifoundrn
57142  *
57143  * Applies to IN endpoints Only. The core generates this interrupt when it detects
57144  * a transmit FIFO underrun condition for this endpoint.
57145  *
57146  * Field Enumeration Values:
57147  *
57148  * Enum | Value | Description
57149  * :-----------------------------------------|:------|:------------------------
57150  * ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
57151  * ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
57152  *
57153  * Field Access Macros:
57154  *
57155  */
57156 /*
57157  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN
57158  *
57159  * No interrupt
57160  */
57161 #define ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN_E_INACT 0x0
57162 /*
57163  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN
57164  *
57165  * Fifo Underrun interrupt
57166  */
57167 #define ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN_E_ACT 0x1
57168 
57169 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN register field. */
57170 #define ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN_LSB 8
57171 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN register field. */
57172 #define ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN_MSB 8
57173 /* The width in bits of the ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN register field. */
57174 #define ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN_WIDTH 1
57175 /* The mask used to set the ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN register field value. */
57176 #define ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN_SET_MSK 0x00000100
57177 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN register field value. */
57178 #define ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN_CLR_MSK 0xfffffeff
57179 /* The reset value of the ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN register field. */
57180 #define ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN_RESET 0x0
57181 /* Extracts the ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN field value from a register. */
57182 #define ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
57183 /* Produces a ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN register field value suitable for setting the register. */
57184 #define ALT_USB_DEV_DIEPINT0_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
57185 
57186 /*
57187  * Field : BNA Interrupt - bnaintr
57188  *
57189  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
57190  * generates this interrupt when the descriptor accessed is not ready for the Core
57191  * to process, such as Host busy or DMA done
57192  *
57193  * Field Enumeration Values:
57194  *
57195  * Enum | Value | Description
57196  * :-------------------------------------|:------|:--------------
57197  * ALT_USB_DEV_DIEPINT0_BNAINTR_E_INACT | 0x0 | No interrupt
57198  * ALT_USB_DEV_DIEPINT0_BNAINTR_E_ACT | 0x1 | BNA interrupt
57199  *
57200  * Field Access Macros:
57201  *
57202  */
57203 /*
57204  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_BNAINTR
57205  *
57206  * No interrupt
57207  */
57208 #define ALT_USB_DEV_DIEPINT0_BNAINTR_E_INACT 0x0
57209 /*
57210  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_BNAINTR
57211  *
57212  * BNA interrupt
57213  */
57214 #define ALT_USB_DEV_DIEPINT0_BNAINTR_E_ACT 0x1
57215 
57216 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_BNAINTR register field. */
57217 #define ALT_USB_DEV_DIEPINT0_BNAINTR_LSB 9
57218 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_BNAINTR register field. */
57219 #define ALT_USB_DEV_DIEPINT0_BNAINTR_MSB 9
57220 /* The width in bits of the ALT_USB_DEV_DIEPINT0_BNAINTR register field. */
57221 #define ALT_USB_DEV_DIEPINT0_BNAINTR_WIDTH 1
57222 /* The mask used to set the ALT_USB_DEV_DIEPINT0_BNAINTR register field value. */
57223 #define ALT_USB_DEV_DIEPINT0_BNAINTR_SET_MSK 0x00000200
57224 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_BNAINTR register field value. */
57225 #define ALT_USB_DEV_DIEPINT0_BNAINTR_CLR_MSK 0xfffffdff
57226 /* The reset value of the ALT_USB_DEV_DIEPINT0_BNAINTR register field. */
57227 #define ALT_USB_DEV_DIEPINT0_BNAINTR_RESET 0x0
57228 /* Extracts the ALT_USB_DEV_DIEPINT0_BNAINTR field value from a register. */
57229 #define ALT_USB_DEV_DIEPINT0_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
57230 /* Produces a ALT_USB_DEV_DIEPINT0_BNAINTR register field value suitable for setting the register. */
57231 #define ALT_USB_DEV_DIEPINT0_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
57232 
57233 /*
57234  * Field : Packet Drop Status - pktdrpsts
57235  *
57236  * This bit indicates to the application that an ISOC OUT packet has been dropped.
57237  * This bit does not have an associated mask bit and does not generate an
57238  * interrupt.
57239  *
57240  * Field Enumeration Values:
57241  *
57242  * Enum | Value | Description
57243  * :---------------------------------------|:------|:-----------------------------
57244  * ALT_USB_DEV_DIEPINT0_PKTDRPSTS_E_INACT | 0x0 | No interrupt
57245  * ALT_USB_DEV_DIEPINT0_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
57246  *
57247  * Field Access Macros:
57248  *
57249  */
57250 /*
57251  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_PKTDRPSTS
57252  *
57253  * No interrupt
57254  */
57255 #define ALT_USB_DEV_DIEPINT0_PKTDRPSTS_E_INACT 0x0
57256 /*
57257  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_PKTDRPSTS
57258  *
57259  * Packet Drop Status interrupt
57260  */
57261 #define ALT_USB_DEV_DIEPINT0_PKTDRPSTS_E_ACT 0x1
57262 
57263 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_PKTDRPSTS register field. */
57264 #define ALT_USB_DEV_DIEPINT0_PKTDRPSTS_LSB 11
57265 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_PKTDRPSTS register field. */
57266 #define ALT_USB_DEV_DIEPINT0_PKTDRPSTS_MSB 11
57267 /* The width in bits of the ALT_USB_DEV_DIEPINT0_PKTDRPSTS register field. */
57268 #define ALT_USB_DEV_DIEPINT0_PKTDRPSTS_WIDTH 1
57269 /* The mask used to set the ALT_USB_DEV_DIEPINT0_PKTDRPSTS register field value. */
57270 #define ALT_USB_DEV_DIEPINT0_PKTDRPSTS_SET_MSK 0x00000800
57271 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_PKTDRPSTS register field value. */
57272 #define ALT_USB_DEV_DIEPINT0_PKTDRPSTS_CLR_MSK 0xfffff7ff
57273 /* The reset value of the ALT_USB_DEV_DIEPINT0_PKTDRPSTS register field. */
57274 #define ALT_USB_DEV_DIEPINT0_PKTDRPSTS_RESET 0x0
57275 /* Extracts the ALT_USB_DEV_DIEPINT0_PKTDRPSTS field value from a register. */
57276 #define ALT_USB_DEV_DIEPINT0_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
57277 /* Produces a ALT_USB_DEV_DIEPINT0_PKTDRPSTS register field value suitable for setting the register. */
57278 #define ALT_USB_DEV_DIEPINT0_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
57279 
57280 /*
57281  * Field : BbleErr Interrupt - bbleerr
57282  *
57283  * The core generates this interrupt when babble is received for the endpoint.
57284  *
57285  * Field Enumeration Values:
57286  *
57287  * Enum | Value | Description
57288  * :-------------------------------------|:------|:------------------
57289  * ALT_USB_DEV_DIEPINT0_BBLEERR_E_INACT | 0x0 | No interrupt
57290  * ALT_USB_DEV_DIEPINT0_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
57291  *
57292  * Field Access Macros:
57293  *
57294  */
57295 /*
57296  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_BBLEERR
57297  *
57298  * No interrupt
57299  */
57300 #define ALT_USB_DEV_DIEPINT0_BBLEERR_E_INACT 0x0
57301 /*
57302  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_BBLEERR
57303  *
57304  * BbleErr interrupt
57305  */
57306 #define ALT_USB_DEV_DIEPINT0_BBLEERR_E_ACT 0x1
57307 
57308 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_BBLEERR register field. */
57309 #define ALT_USB_DEV_DIEPINT0_BBLEERR_LSB 12
57310 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_BBLEERR register field. */
57311 #define ALT_USB_DEV_DIEPINT0_BBLEERR_MSB 12
57312 /* The width in bits of the ALT_USB_DEV_DIEPINT0_BBLEERR register field. */
57313 #define ALT_USB_DEV_DIEPINT0_BBLEERR_WIDTH 1
57314 /* The mask used to set the ALT_USB_DEV_DIEPINT0_BBLEERR register field value. */
57315 #define ALT_USB_DEV_DIEPINT0_BBLEERR_SET_MSK 0x00001000
57316 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_BBLEERR register field value. */
57317 #define ALT_USB_DEV_DIEPINT0_BBLEERR_CLR_MSK 0xffffefff
57318 /* The reset value of the ALT_USB_DEV_DIEPINT0_BBLEERR register field. */
57319 #define ALT_USB_DEV_DIEPINT0_BBLEERR_RESET 0x0
57320 /* Extracts the ALT_USB_DEV_DIEPINT0_BBLEERR field value from a register. */
57321 #define ALT_USB_DEV_DIEPINT0_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
57322 /* Produces a ALT_USB_DEV_DIEPINT0_BBLEERR register field value suitable for setting the register. */
57323 #define ALT_USB_DEV_DIEPINT0_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
57324 
57325 /*
57326  * Field : NAK Interrupt - nakintrpt
57327  *
57328  * The core generates this interrupt when a NAK is transmitted or received by the
57329  * device. In case of isochronous IN endpoints the interrupt gets generated when a
57330  * zero length packet is transmitted due to un-availability of data in the TXFifo.
57331  *
57332  * Field Enumeration Values:
57333  *
57334  * Enum | Value | Description
57335  * :---------------------------------------|:------|:--------------
57336  * ALT_USB_DEV_DIEPINT0_NAKINTRPT_E_INACT | 0x0 | No interrupt
57337  * ALT_USB_DEV_DIEPINT0_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
57338  *
57339  * Field Access Macros:
57340  *
57341  */
57342 /*
57343  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_NAKINTRPT
57344  *
57345  * No interrupt
57346  */
57347 #define ALT_USB_DEV_DIEPINT0_NAKINTRPT_E_INACT 0x0
57348 /*
57349  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_NAKINTRPT
57350  *
57351  * NAK Interrupt
57352  */
57353 #define ALT_USB_DEV_DIEPINT0_NAKINTRPT_E_ACT 0x1
57354 
57355 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_NAKINTRPT register field. */
57356 #define ALT_USB_DEV_DIEPINT0_NAKINTRPT_LSB 13
57357 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_NAKINTRPT register field. */
57358 #define ALT_USB_DEV_DIEPINT0_NAKINTRPT_MSB 13
57359 /* The width in bits of the ALT_USB_DEV_DIEPINT0_NAKINTRPT register field. */
57360 #define ALT_USB_DEV_DIEPINT0_NAKINTRPT_WIDTH 1
57361 /* The mask used to set the ALT_USB_DEV_DIEPINT0_NAKINTRPT register field value. */
57362 #define ALT_USB_DEV_DIEPINT0_NAKINTRPT_SET_MSK 0x00002000
57363 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_NAKINTRPT register field value. */
57364 #define ALT_USB_DEV_DIEPINT0_NAKINTRPT_CLR_MSK 0xffffdfff
57365 /* The reset value of the ALT_USB_DEV_DIEPINT0_NAKINTRPT register field. */
57366 #define ALT_USB_DEV_DIEPINT0_NAKINTRPT_RESET 0x0
57367 /* Extracts the ALT_USB_DEV_DIEPINT0_NAKINTRPT field value from a register. */
57368 #define ALT_USB_DEV_DIEPINT0_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
57369 /* Produces a ALT_USB_DEV_DIEPINT0_NAKINTRPT register field value suitable for setting the register. */
57370 #define ALT_USB_DEV_DIEPINT0_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
57371 
57372 /*
57373  * Field : NYET Interrupt - nyetintrpt
57374  *
57375  * The core generates this interrupt when a NYET response is transmitted for a non
57376  * isochronous OUT endpoint.
57377  *
57378  * Field Enumeration Values:
57379  *
57380  * Enum | Value | Description
57381  * :----------------------------------------|:------|:---------------
57382  * ALT_USB_DEV_DIEPINT0_NYETINTRPT_E_INACT | 0x0 | No interrupt
57383  * ALT_USB_DEV_DIEPINT0_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
57384  *
57385  * Field Access Macros:
57386  *
57387  */
57388 /*
57389  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_NYETINTRPT
57390  *
57391  * No interrupt
57392  */
57393 #define ALT_USB_DEV_DIEPINT0_NYETINTRPT_E_INACT 0x0
57394 /*
57395  * Enumerated value for register field ALT_USB_DEV_DIEPINT0_NYETINTRPT
57396  *
57397  * NYET Interrupt
57398  */
57399 #define ALT_USB_DEV_DIEPINT0_NYETINTRPT_E_ACT 0x1
57400 
57401 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT0_NYETINTRPT register field. */
57402 #define ALT_USB_DEV_DIEPINT0_NYETINTRPT_LSB 14
57403 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT0_NYETINTRPT register field. */
57404 #define ALT_USB_DEV_DIEPINT0_NYETINTRPT_MSB 14
57405 /* The width in bits of the ALT_USB_DEV_DIEPINT0_NYETINTRPT register field. */
57406 #define ALT_USB_DEV_DIEPINT0_NYETINTRPT_WIDTH 1
57407 /* The mask used to set the ALT_USB_DEV_DIEPINT0_NYETINTRPT register field value. */
57408 #define ALT_USB_DEV_DIEPINT0_NYETINTRPT_SET_MSK 0x00004000
57409 /* The mask used to clear the ALT_USB_DEV_DIEPINT0_NYETINTRPT register field value. */
57410 #define ALT_USB_DEV_DIEPINT0_NYETINTRPT_CLR_MSK 0xffffbfff
57411 /* The reset value of the ALT_USB_DEV_DIEPINT0_NYETINTRPT register field. */
57412 #define ALT_USB_DEV_DIEPINT0_NYETINTRPT_RESET 0x0
57413 /* Extracts the ALT_USB_DEV_DIEPINT0_NYETINTRPT field value from a register. */
57414 #define ALT_USB_DEV_DIEPINT0_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
57415 /* Produces a ALT_USB_DEV_DIEPINT0_NYETINTRPT register field value suitable for setting the register. */
57416 #define ALT_USB_DEV_DIEPINT0_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
57417 
57418 #ifndef __ASSEMBLY__
57419 /*
57420  * WARNING: The C register and register group struct declarations are provided for
57421  * convenience and illustrative purposes. They should, however, be used with
57422  * caution as the C language standard provides no guarantees about the alignment or
57423  * atomicity of device memory accesses. The recommended practice for writing
57424  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
57425  * alt_write_word() functions.
57426  *
57427  * The struct declaration for register ALT_USB_DEV_DIEPINT0.
57428  */
57429 struct ALT_USB_DEV_DIEPINT0_s
57430 {
57431  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
57432  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
57433  const uint32_t ahberr : 1; /* AHB Error */
57434  const uint32_t timeout : 1; /* Timeout Condition */
57435  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
57436  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
57437  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
57438  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
57439  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
57440  const uint32_t bnaintr : 1; /* BNA Interrupt */
57441  uint32_t : 1; /* *UNDEFINED* */
57442  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
57443  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
57444  const uint32_t nakintrpt : 1; /* NAK Interrupt */
57445  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
57446  uint32_t : 17; /* *UNDEFINED* */
57447 };
57448 
57449 /* The typedef declaration for register ALT_USB_DEV_DIEPINT0. */
57450 typedef volatile struct ALT_USB_DEV_DIEPINT0_s ALT_USB_DEV_DIEPINT0_t;
57451 #endif /* __ASSEMBLY__ */
57452 
57453 /* The byte offset of the ALT_USB_DEV_DIEPINT0 register from the beginning of the component. */
57454 #define ALT_USB_DEV_DIEPINT0_OFST 0x108
57455 /* The address of the ALT_USB_DEV_DIEPINT0 register. */
57456 #define ALT_USB_DEV_DIEPINT0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT0_OFST))
57457 
57458 /*
57459  * Register : Device IN Endpoint 0 Transfer Size Register - dieptsiz0
57460  *
57461  * The application must modify this register before enabling endpoint 0. Once
57462  * endpoint 0 is enabled using Endpoint Enable bit of the Device Control Endpoint 0
57463  * Control registers (DIEPCTL0.EPEna/DOEPCTL0.EPEna), the core modifies this
57464  * register. The application can only read this register once the core has cleared
57465  * the Endpoint Enable bit. Nonzero endpoints use the registers for endpoints 1 to
57466  * 15. When Scatter/Gather DMA mode is enabled, this register must not be
57467  * programmed by the application. If the application reads this register when
57468  * Scatter/Gather DMA mode is enabled, the core returns all zeros.
57469  *
57470  * Register Layout
57471  *
57472  * Bits | Access | Reset | Description
57473  * :--------|:-------|:------|:--------------
57474  * [6:0] | RW | 0x0 | Transfer Size
57475  * [18:7] | ??? | 0x0 | *UNDEFINED*
57476  * [20:19] | RW | 0x0 | Packet Count
57477  * [31:21] | ??? | 0x0 | *UNDEFINED*
57478  *
57479  */
57480 /*
57481  * Field : Transfer Size - xfersize
57482  *
57483  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
57484  * application only after it has exhausted the transfer size amount of data. The
57485  * transfer size can be Set to the maximum packet size of the endpoint, to be
57486  * interrupted at the end of each packet. The core decrements this field every time
57487  * a packet from the external memory is written to the TxFIFO.
57488  *
57489  * Field Access Macros:
57490  *
57491  */
57492 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ0_XFERSIZE register field. */
57493 #define ALT_USB_DEV_DIEPTSIZ0_XFERSIZE_LSB 0
57494 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ0_XFERSIZE register field. */
57495 #define ALT_USB_DEV_DIEPTSIZ0_XFERSIZE_MSB 6
57496 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ0_XFERSIZE register field. */
57497 #define ALT_USB_DEV_DIEPTSIZ0_XFERSIZE_WIDTH 7
57498 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ0_XFERSIZE register field value. */
57499 #define ALT_USB_DEV_DIEPTSIZ0_XFERSIZE_SET_MSK 0x0000007f
57500 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ0_XFERSIZE register field value. */
57501 #define ALT_USB_DEV_DIEPTSIZ0_XFERSIZE_CLR_MSK 0xffffff80
57502 /* The reset value of the ALT_USB_DEV_DIEPTSIZ0_XFERSIZE register field. */
57503 #define ALT_USB_DEV_DIEPTSIZ0_XFERSIZE_RESET 0x0
57504 /* Extracts the ALT_USB_DEV_DIEPTSIZ0_XFERSIZE field value from a register. */
57505 #define ALT_USB_DEV_DIEPTSIZ0_XFERSIZE_GET(value) (((value) & 0x0000007f) >> 0)
57506 /* Produces a ALT_USB_DEV_DIEPTSIZ0_XFERSIZE register field value suitable for setting the register. */
57507 #define ALT_USB_DEV_DIEPTSIZ0_XFERSIZE_SET(value) (((value) << 0) & 0x0000007f)
57508 
57509 /*
57510  * Field : Packet Count - pktcnt
57511  *
57512  * Indicates the total number of USB packets that constitute the Transfer Size
57513  * amount of data for endpoint 0. This field is decremented every time a packet
57514  * (maximum size or short packet) is read from the TxFIFO.
57515  *
57516  * Field Access Macros:
57517  *
57518  */
57519 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ0_PKTCNT register field. */
57520 #define ALT_USB_DEV_DIEPTSIZ0_PKTCNT_LSB 19
57521 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ0_PKTCNT register field. */
57522 #define ALT_USB_DEV_DIEPTSIZ0_PKTCNT_MSB 20
57523 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ0_PKTCNT register field. */
57524 #define ALT_USB_DEV_DIEPTSIZ0_PKTCNT_WIDTH 2
57525 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ0_PKTCNT register field value. */
57526 #define ALT_USB_DEV_DIEPTSIZ0_PKTCNT_SET_MSK 0x00180000
57527 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ0_PKTCNT register field value. */
57528 #define ALT_USB_DEV_DIEPTSIZ0_PKTCNT_CLR_MSK 0xffe7ffff
57529 /* The reset value of the ALT_USB_DEV_DIEPTSIZ0_PKTCNT register field. */
57530 #define ALT_USB_DEV_DIEPTSIZ0_PKTCNT_RESET 0x0
57531 /* Extracts the ALT_USB_DEV_DIEPTSIZ0_PKTCNT field value from a register. */
57532 #define ALT_USB_DEV_DIEPTSIZ0_PKTCNT_GET(value) (((value) & 0x00180000) >> 19)
57533 /* Produces a ALT_USB_DEV_DIEPTSIZ0_PKTCNT register field value suitable for setting the register. */
57534 #define ALT_USB_DEV_DIEPTSIZ0_PKTCNT_SET(value) (((value) << 19) & 0x00180000)
57535 
57536 #ifndef __ASSEMBLY__
57537 /*
57538  * WARNING: The C register and register group struct declarations are provided for
57539  * convenience and illustrative purposes. They should, however, be used with
57540  * caution as the C language standard provides no guarantees about the alignment or
57541  * atomicity of device memory accesses. The recommended practice for writing
57542  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
57543  * alt_write_word() functions.
57544  *
57545  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ0.
57546  */
57547 struct ALT_USB_DEV_DIEPTSIZ0_s
57548 {
57549  uint32_t xfersize : 7; /* Transfer Size */
57550  uint32_t : 12; /* *UNDEFINED* */
57551  uint32_t pktcnt : 2; /* Packet Count */
57552  uint32_t : 11; /* *UNDEFINED* */
57553 };
57554 
57555 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ0. */
57556 typedef volatile struct ALT_USB_DEV_DIEPTSIZ0_s ALT_USB_DEV_DIEPTSIZ0_t;
57557 #endif /* __ASSEMBLY__ */
57558 
57559 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ0 register from the beginning of the component. */
57560 #define ALT_USB_DEV_DIEPTSIZ0_OFST 0x110
57561 /* The address of the ALT_USB_DEV_DIEPTSIZ0 register. */
57562 #define ALT_USB_DEV_DIEPTSIZ0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ0_OFST))
57563 
57564 /*
57565  * Register : Device IN Endpoint 0 DMA Address Register - diepdma0
57566  *
57567  * DMA Addressing.
57568  *
57569  * Register Layout
57570  *
57571  * Bits | Access | Reset | Description
57572  * :-------|:-------|:--------|:------------
57573  * [31:0] | RW | Unknown | DMA Address
57574  *
57575  */
57576 /*
57577  * Field : DMA Address - diepdma0
57578  *
57579  * Holds the start address of the external memory for storing or fetching endpoint
57580  * data. for control endpoints, this field stores control OUT data packets as well
57581  * as SETUP transaction data packets. When more than three SETUP packets are
57582  * received back-to-back, the SETUP data packet in the memory is overwritten. This
57583  * register is incremented on every AHB transaction. The application can give only
57584  * a DWORD-aligned address.
57585  *
57586  * When Scatter/Gather DMA mode is not enabled, the application programs the start
57587  * address value in this field.
57588  *
57589  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
57590  * for the descriptor list.
57591  *
57592  * Field Access Macros:
57593  *
57594  */
57595 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA0_DIEPDMA0 register field. */
57596 #define ALT_USB_DEV_DIEPDMA0_DIEPDMA0_LSB 0
57597 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA0_DIEPDMA0 register field. */
57598 #define ALT_USB_DEV_DIEPDMA0_DIEPDMA0_MSB 31
57599 /* The width in bits of the ALT_USB_DEV_DIEPDMA0_DIEPDMA0 register field. */
57600 #define ALT_USB_DEV_DIEPDMA0_DIEPDMA0_WIDTH 32
57601 /* The mask used to set the ALT_USB_DEV_DIEPDMA0_DIEPDMA0 register field value. */
57602 #define ALT_USB_DEV_DIEPDMA0_DIEPDMA0_SET_MSK 0xffffffff
57603 /* The mask used to clear the ALT_USB_DEV_DIEPDMA0_DIEPDMA0 register field value. */
57604 #define ALT_USB_DEV_DIEPDMA0_DIEPDMA0_CLR_MSK 0x00000000
57605 /* The reset value of the ALT_USB_DEV_DIEPDMA0_DIEPDMA0 register field is UNKNOWN. */
57606 #define ALT_USB_DEV_DIEPDMA0_DIEPDMA0_RESET 0x0
57607 /* Extracts the ALT_USB_DEV_DIEPDMA0_DIEPDMA0 field value from a register. */
57608 #define ALT_USB_DEV_DIEPDMA0_DIEPDMA0_GET(value) (((value) & 0xffffffff) >> 0)
57609 /* Produces a ALT_USB_DEV_DIEPDMA0_DIEPDMA0 register field value suitable for setting the register. */
57610 #define ALT_USB_DEV_DIEPDMA0_DIEPDMA0_SET(value) (((value) << 0) & 0xffffffff)
57611 
57612 #ifndef __ASSEMBLY__
57613 /*
57614  * WARNING: The C register and register group struct declarations are provided for
57615  * convenience and illustrative purposes. They should, however, be used with
57616  * caution as the C language standard provides no guarantees about the alignment or
57617  * atomicity of device memory accesses. The recommended practice for writing
57618  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
57619  * alt_write_word() functions.
57620  *
57621  * The struct declaration for register ALT_USB_DEV_DIEPDMA0.
57622  */
57623 struct ALT_USB_DEV_DIEPDMA0_s
57624 {
57625  uint32_t diepdma0 : 32; /* DMA Address */
57626 };
57627 
57628 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA0. */
57629 typedef volatile struct ALT_USB_DEV_DIEPDMA0_s ALT_USB_DEV_DIEPDMA0_t;
57630 #endif /* __ASSEMBLY__ */
57631 
57632 /* The byte offset of the ALT_USB_DEV_DIEPDMA0 register from the beginning of the component. */
57633 #define ALT_USB_DEV_DIEPDMA0_OFST 0x114
57634 /* The address of the ALT_USB_DEV_DIEPDMA0 register. */
57635 #define ALT_USB_DEV_DIEPDMA0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA0_OFST))
57636 
57637 /*
57638  * Register : Device IN Endpoint Transmit FIFO Status Register 0 - dtxfsts0
57639  *
57640  * This register contains the free space information for the Device IN endpoint
57641  * TxFIFO.
57642  *
57643  * Register Layout
57644  *
57645  * Bits | Access | Reset | Description
57646  * :--------|:-------|:-------|:-------------------------------
57647  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
57648  * [31:16] | ??? | 0x0 | *UNDEFINED*
57649  *
57650  */
57651 /*
57652  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
57653  *
57654  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
57655  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
57656  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
57657  * 32,768 words available Others: Reserved
57658  *
57659  * Field Access Macros:
57660  *
57661  */
57662 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL register field. */
57663 #define ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL_LSB 0
57664 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL register field. */
57665 #define ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL_MSB 15
57666 /* The width in bits of the ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL register field. */
57667 #define ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL_WIDTH 16
57668 /* The mask used to set the ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL register field value. */
57669 #define ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
57670 /* The mask used to clear the ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL register field value. */
57671 #define ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
57672 /* The reset value of the ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL register field. */
57673 #define ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL_RESET 0x2000
57674 /* Extracts the ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL field value from a register. */
57675 #define ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
57676 /* Produces a ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL register field value suitable for setting the register. */
57677 #define ALT_USB_DEV_DTXFSTS0_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
57678 
57679 #ifndef __ASSEMBLY__
57680 /*
57681  * WARNING: The C register and register group struct declarations are provided for
57682  * convenience and illustrative purposes. They should, however, be used with
57683  * caution as the C language standard provides no guarantees about the alignment or
57684  * atomicity of device memory accesses. The recommended practice for writing
57685  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
57686  * alt_write_word() functions.
57687  *
57688  * The struct declaration for register ALT_USB_DEV_DTXFSTS0.
57689  */
57690 struct ALT_USB_DEV_DTXFSTS0_s
57691 {
57692  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
57693  uint32_t : 16; /* *UNDEFINED* */
57694 };
57695 
57696 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS0. */
57697 typedef volatile struct ALT_USB_DEV_DTXFSTS0_s ALT_USB_DEV_DTXFSTS0_t;
57698 #endif /* __ASSEMBLY__ */
57699 
57700 /* The byte offset of the ALT_USB_DEV_DTXFSTS0 register from the beginning of the component. */
57701 #define ALT_USB_DEV_DTXFSTS0_OFST 0x118
57702 /* The address of the ALT_USB_DEV_DTXFSTS0 register. */
57703 #define ALT_USB_DEV_DTXFSTS0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS0_OFST))
57704 
57705 /*
57706  * Register : Device IN Endpoint 0 DMA Buffer Address Register - diepdmab0
57707  *
57708  * Endpoint 16.
57709  *
57710  * Register Layout
57711  *
57712  * Bits | Access | Reset | Description
57713  * :-------|:-------|:--------|:-------------------
57714  * [31:0] | R | Unknown | DMA Buffer Address
57715  *
57716  */
57717 /*
57718  * Field : DMA Buffer Address - diepdmab0
57719  *
57720  * Used with Scatter/Gather DMA.
57721  *
57722  * Field Access Macros:
57723  *
57724  */
57725 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0 register field. */
57726 #define ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0_LSB 0
57727 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0 register field. */
57728 #define ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0_MSB 31
57729 /* The width in bits of the ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0 register field. */
57730 #define ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0_WIDTH 32
57731 /* The mask used to set the ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0 register field value. */
57732 #define ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0_SET_MSK 0xffffffff
57733 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0 register field value. */
57734 #define ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0_CLR_MSK 0x00000000
57735 /* The reset value of the ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0 register field is UNKNOWN. */
57736 #define ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0_RESET 0x0
57737 /* Extracts the ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0 field value from a register. */
57738 #define ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0_GET(value) (((value) & 0xffffffff) >> 0)
57739 /* Produces a ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0 register field value suitable for setting the register. */
57740 #define ALT_USB_DEV_DIEPDMAB0_DIEPDMAB0_SET(value) (((value) << 0) & 0xffffffff)
57741 
57742 #ifndef __ASSEMBLY__
57743 /*
57744  * WARNING: The C register and register group struct declarations are provided for
57745  * convenience and illustrative purposes. They should, however, be used with
57746  * caution as the C language standard provides no guarantees about the alignment or
57747  * atomicity of device memory accesses. The recommended practice for writing
57748  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
57749  * alt_write_word() functions.
57750  *
57751  * The struct declaration for register ALT_USB_DEV_DIEPDMAB0.
57752  */
57753 struct ALT_USB_DEV_DIEPDMAB0_s
57754 {
57755  const uint32_t diepdmab0 : 32; /* DMA Buffer Address */
57756 };
57757 
57758 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB0. */
57759 typedef volatile struct ALT_USB_DEV_DIEPDMAB0_s ALT_USB_DEV_DIEPDMAB0_t;
57760 #endif /* __ASSEMBLY__ */
57761 
57762 /* The byte offset of the ALT_USB_DEV_DIEPDMAB0 register from the beginning of the component. */
57763 #define ALT_USB_DEV_DIEPDMAB0_OFST 0x11c
57764 /* The address of the ALT_USB_DEV_DIEPDMAB0 register. */
57765 #define ALT_USB_DEV_DIEPDMAB0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB0_OFST))
57766 
57767 /*
57768  * Register : Device Control IN Endpoint 1 Control Register - diepctl1
57769  *
57770  * Endpoint_number: 1
57771  *
57772  * Register Layout
57773  *
57774  * Bits | Access | Reset | Description
57775  * :--------|:-------|:------|:--------------------
57776  * [10:0] | RW | 0x0 | Maximum Packet Size
57777  * [14:11] | ??? | 0x0 | *UNDEFINED*
57778  * [15] | RW | 0x0 | USB Active Endpoint
57779  * [16] | R | 0x0 | Endpoint Data PID
57780  * [17] | R | 0x0 | NAK Status
57781  * [19:18] | RW | 0x0 | Endpoint Type
57782  * [20] | ??? | 0x0 | *UNDEFINED*
57783  * [21] | R | 0x0 | STALL Handshake
57784  * [25:22] | RW | 0x0 | TxFIFO Number
57785  * [26] | W | 0x0 | Clear NAK
57786  * [27] | W | 0x0 | Set NAK
57787  * [28] | W | 0x0 | Set DATA0 PID
57788  * [29] | W | 0x0 | Set DATA1 PID
57789  * [30] | R | 0x0 | Endpoint Disable
57790  * [31] | R | 0x0 | Endpoint Enable
57791  *
57792  */
57793 /*
57794  * Field : Maximum Packet Size - mps
57795  *
57796  * Applies to IN and OUT endpoints. The application must program this field with
57797  * the maximum packet size for the current logical endpoint. This value is in
57798  * bytes.
57799  *
57800  * Field Access Macros:
57801  *
57802  */
57803 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_MPS register field. */
57804 #define ALT_USB_DEV_DIEPCTL1_MPS_LSB 0
57805 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_MPS register field. */
57806 #define ALT_USB_DEV_DIEPCTL1_MPS_MSB 10
57807 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_MPS register field. */
57808 #define ALT_USB_DEV_DIEPCTL1_MPS_WIDTH 11
57809 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_MPS register field value. */
57810 #define ALT_USB_DEV_DIEPCTL1_MPS_SET_MSK 0x000007ff
57811 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_MPS register field value. */
57812 #define ALT_USB_DEV_DIEPCTL1_MPS_CLR_MSK 0xfffff800
57813 /* The reset value of the ALT_USB_DEV_DIEPCTL1_MPS register field. */
57814 #define ALT_USB_DEV_DIEPCTL1_MPS_RESET 0x0
57815 /* Extracts the ALT_USB_DEV_DIEPCTL1_MPS field value from a register. */
57816 #define ALT_USB_DEV_DIEPCTL1_MPS_GET(value) (((value) & 0x000007ff) >> 0)
57817 /* Produces a ALT_USB_DEV_DIEPCTL1_MPS register field value suitable for setting the register. */
57818 #define ALT_USB_DEV_DIEPCTL1_MPS_SET(value) (((value) << 0) & 0x000007ff)
57819 
57820 /*
57821  * Field : USB Active Endpoint - usbactep
57822  *
57823  * Indicates whether this endpoint is active in the current configuration and
57824  * interface. The core clears this bit for all endpoints (other than EP 0) after
57825  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
57826  * commands, the application must program endpoint registers accordingly and set
57827  * this bit.
57828  *
57829  * Field Enumeration Values:
57830  *
57831  * Enum | Value | Description
57832  * :-------------------------------------|:------|:--------------------
57833  * ALT_USB_DEV_DIEPCTL1_USBACTEP_E_DISD | 0x0 | Not Active
57834  * ALT_USB_DEV_DIEPCTL1_USBACTEP_E_END | 0x1 | USB Active Endpoint
57835  *
57836  * Field Access Macros:
57837  *
57838  */
57839 /*
57840  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_USBACTEP
57841  *
57842  * Not Active
57843  */
57844 #define ALT_USB_DEV_DIEPCTL1_USBACTEP_E_DISD 0x0
57845 /*
57846  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_USBACTEP
57847  *
57848  * USB Active Endpoint
57849  */
57850 #define ALT_USB_DEV_DIEPCTL1_USBACTEP_E_END 0x1
57851 
57852 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_USBACTEP register field. */
57853 #define ALT_USB_DEV_DIEPCTL1_USBACTEP_LSB 15
57854 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_USBACTEP register field. */
57855 #define ALT_USB_DEV_DIEPCTL1_USBACTEP_MSB 15
57856 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_USBACTEP register field. */
57857 #define ALT_USB_DEV_DIEPCTL1_USBACTEP_WIDTH 1
57858 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_USBACTEP register field value. */
57859 #define ALT_USB_DEV_DIEPCTL1_USBACTEP_SET_MSK 0x00008000
57860 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_USBACTEP register field value. */
57861 #define ALT_USB_DEV_DIEPCTL1_USBACTEP_CLR_MSK 0xffff7fff
57862 /* The reset value of the ALT_USB_DEV_DIEPCTL1_USBACTEP register field. */
57863 #define ALT_USB_DEV_DIEPCTL1_USBACTEP_RESET 0x0
57864 /* Extracts the ALT_USB_DEV_DIEPCTL1_USBACTEP field value from a register. */
57865 #define ALT_USB_DEV_DIEPCTL1_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
57866 /* Produces a ALT_USB_DEV_DIEPCTL1_USBACTEP register field value suitable for setting the register. */
57867 #define ALT_USB_DEV_DIEPCTL1_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
57868 
57869 /*
57870  * Field : Endpoint Data PID - dpid
57871  *
57872  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
57873  * packet to be received or transmitted on this endpoint. The application must
57874  * program the PID of the first packet to be received or transmitted on this
57875  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
57876  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
57877  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
57878  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
57879  * DMA mode:
57880  *
57881  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
57882  * number in which the core transmits/receives isochronous data for this endpoint.
57883  * The application must program the even/odd (micro) frame number in which it
57884  * intends to transmit/receive isochronous data for this endpoint using the
57885  * SetEvnFr and SetOddFr fields in this register.
57886  *
57887  * 0: Even (micro)frame
57888  *
57889  * 1: Odd (micro)frame
57890  *
57891  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
57892  * number in which to send data is provided in the transmit descriptor structure.
57893  * The frame in which data is received is updated in receive descriptor structure.
57894  *
57895  * Field Enumeration Values:
57896  *
57897  * Enum | Value | Description
57898  * :----------------------------------|:------|:-----------------------------
57899  * ALT_USB_DEV_DIEPCTL1_DPID_E_INACT | 0x0 | Endpoint Data PID not active
57900  * ALT_USB_DEV_DIEPCTL1_DPID_E_ACT | 0x1 | Endpoint Data PID active
57901  *
57902  * Field Access Macros:
57903  *
57904  */
57905 /*
57906  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_DPID
57907  *
57908  * Endpoint Data PID not active
57909  */
57910 #define ALT_USB_DEV_DIEPCTL1_DPID_E_INACT 0x0
57911 /*
57912  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_DPID
57913  *
57914  * Endpoint Data PID active
57915  */
57916 #define ALT_USB_DEV_DIEPCTL1_DPID_E_ACT 0x1
57917 
57918 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_DPID register field. */
57919 #define ALT_USB_DEV_DIEPCTL1_DPID_LSB 16
57920 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_DPID register field. */
57921 #define ALT_USB_DEV_DIEPCTL1_DPID_MSB 16
57922 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_DPID register field. */
57923 #define ALT_USB_DEV_DIEPCTL1_DPID_WIDTH 1
57924 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_DPID register field value. */
57925 #define ALT_USB_DEV_DIEPCTL1_DPID_SET_MSK 0x00010000
57926 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_DPID register field value. */
57927 #define ALT_USB_DEV_DIEPCTL1_DPID_CLR_MSK 0xfffeffff
57928 /* The reset value of the ALT_USB_DEV_DIEPCTL1_DPID register field. */
57929 #define ALT_USB_DEV_DIEPCTL1_DPID_RESET 0x0
57930 /* Extracts the ALT_USB_DEV_DIEPCTL1_DPID field value from a register. */
57931 #define ALT_USB_DEV_DIEPCTL1_DPID_GET(value) (((value) & 0x00010000) >> 16)
57932 /* Produces a ALT_USB_DEV_DIEPCTL1_DPID register field value suitable for setting the register. */
57933 #define ALT_USB_DEV_DIEPCTL1_DPID_SET(value) (((value) << 16) & 0x00010000)
57934 
57935 /*
57936  * Field : NAK Status - naksts
57937  *
57938  * When either the application or the core sets this bit:
57939  *
57940  * * The core stops receiving any data on an OUT endpoint, even if there is space
57941  * in the RxFIFO to accommodate the incoming packet.
57942  *
57943  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
57944  * IN endpoint, even if there data is available in the TxFIFO.
57945  *
57946  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
57947  * even if there data is available in the TxFIFO.
57948  *
57949  * Irrespective of this bit's setting, the core always responds to SETUP data
57950  * packets with an ACK handshake.
57951  *
57952  * Field Enumeration Values:
57953  *
57954  * Enum | Value | Description
57955  * :-------------------------------------|:------|:------------------------------------------------
57956  * ALT_USB_DEV_DIEPCTL1_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
57957  * : | | based on the FIFO status
57958  * ALT_USB_DEV_DIEPCTL1_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
57959  * : | | endpoint
57960  *
57961  * Field Access Macros:
57962  *
57963  */
57964 /*
57965  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_NAKSTS
57966  *
57967  * The core is transmitting non-NAK handshakes based on the FIFO status
57968  */
57969 #define ALT_USB_DEV_DIEPCTL1_NAKSTS_E_NONNAK 0x0
57970 /*
57971  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_NAKSTS
57972  *
57973  * The core is transmitting NAK handshakes on this endpoint
57974  */
57975 #define ALT_USB_DEV_DIEPCTL1_NAKSTS_E_NAK 0x1
57976 
57977 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_NAKSTS register field. */
57978 #define ALT_USB_DEV_DIEPCTL1_NAKSTS_LSB 17
57979 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_NAKSTS register field. */
57980 #define ALT_USB_DEV_DIEPCTL1_NAKSTS_MSB 17
57981 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_NAKSTS register field. */
57982 #define ALT_USB_DEV_DIEPCTL1_NAKSTS_WIDTH 1
57983 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_NAKSTS register field value. */
57984 #define ALT_USB_DEV_DIEPCTL1_NAKSTS_SET_MSK 0x00020000
57985 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_NAKSTS register field value. */
57986 #define ALT_USB_DEV_DIEPCTL1_NAKSTS_CLR_MSK 0xfffdffff
57987 /* The reset value of the ALT_USB_DEV_DIEPCTL1_NAKSTS register field. */
57988 #define ALT_USB_DEV_DIEPCTL1_NAKSTS_RESET 0x0
57989 /* Extracts the ALT_USB_DEV_DIEPCTL1_NAKSTS field value from a register. */
57990 #define ALT_USB_DEV_DIEPCTL1_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
57991 /* Produces a ALT_USB_DEV_DIEPCTL1_NAKSTS register field value suitable for setting the register. */
57992 #define ALT_USB_DEV_DIEPCTL1_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
57993 
57994 /*
57995  * Field : Endpoint Type - eptype
57996  *
57997  * This is the transfer type supported by this logical endpoint.
57998  *
57999  * Field Enumeration Values:
58000  *
58001  * Enum | Value | Description
58002  * :------------------------------------------|:------|:------------
58003  * ALT_USB_DEV_DIEPCTL1_EPTYPE_E_CTL | 0x0 | Control
58004  * ALT_USB_DEV_DIEPCTL1_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
58005  * ALT_USB_DEV_DIEPCTL1_EPTYPE_E_BULK | 0x2 | Bulk
58006  * ALT_USB_DEV_DIEPCTL1_EPTYPE_E_INTERRUP | 0x3 | Interrupt
58007  *
58008  * Field Access Macros:
58009  *
58010  */
58011 /*
58012  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_EPTYPE
58013  *
58014  * Control
58015  */
58016 #define ALT_USB_DEV_DIEPCTL1_EPTYPE_E_CTL 0x0
58017 /*
58018  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_EPTYPE
58019  *
58020  * Isochronous
58021  */
58022 #define ALT_USB_DEV_DIEPCTL1_EPTYPE_E_ISOCHRONOUS 0x1
58023 /*
58024  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_EPTYPE
58025  *
58026  * Bulk
58027  */
58028 #define ALT_USB_DEV_DIEPCTL1_EPTYPE_E_BULK 0x2
58029 /*
58030  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_EPTYPE
58031  *
58032  * Interrupt
58033  */
58034 #define ALT_USB_DEV_DIEPCTL1_EPTYPE_E_INTERRUP 0x3
58035 
58036 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_EPTYPE register field. */
58037 #define ALT_USB_DEV_DIEPCTL1_EPTYPE_LSB 18
58038 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_EPTYPE register field. */
58039 #define ALT_USB_DEV_DIEPCTL1_EPTYPE_MSB 19
58040 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_EPTYPE register field. */
58041 #define ALT_USB_DEV_DIEPCTL1_EPTYPE_WIDTH 2
58042 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_EPTYPE register field value. */
58043 #define ALT_USB_DEV_DIEPCTL1_EPTYPE_SET_MSK 0x000c0000
58044 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_EPTYPE register field value. */
58045 #define ALT_USB_DEV_DIEPCTL1_EPTYPE_CLR_MSK 0xfff3ffff
58046 /* The reset value of the ALT_USB_DEV_DIEPCTL1_EPTYPE register field. */
58047 #define ALT_USB_DEV_DIEPCTL1_EPTYPE_RESET 0x0
58048 /* Extracts the ALT_USB_DEV_DIEPCTL1_EPTYPE field value from a register. */
58049 #define ALT_USB_DEV_DIEPCTL1_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
58050 /* Produces a ALT_USB_DEV_DIEPCTL1_EPTYPE register field value suitable for setting the register. */
58051 #define ALT_USB_DEV_DIEPCTL1_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
58052 
58053 /*
58054  * Field : STALL Handshake - stall
58055  *
58056  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
58057  * application sets this bit to stall all tokens from the USB host to this
58058  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
58059  * along with this bit, the STALL bit takes priority. Only the application can
58060  * clear this bit, never the core. Applies to control endpoints only. The
58061  * application can only set this bit, and the core clears it, when a SETUP token is
58062  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
58063  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
58064  * of this bit's setting, the core always responds to SETUP data packets with an
58065  * ACK handshake.
58066  *
58067  * Field Enumeration Values:
58068  *
58069  * Enum | Value | Description
58070  * :-----------------------------------|:------|:----------------------------
58071  * ALT_USB_DEV_DIEPCTL1_STALL_E_INACT | 0x0 | STALL All Tokens not active
58072  * ALT_USB_DEV_DIEPCTL1_STALL_E_ACT | 0x1 | STALL All Tokens active
58073  *
58074  * Field Access Macros:
58075  *
58076  */
58077 /*
58078  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_STALL
58079  *
58080  * STALL All Tokens not active
58081  */
58082 #define ALT_USB_DEV_DIEPCTL1_STALL_E_INACT 0x0
58083 /*
58084  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_STALL
58085  *
58086  * STALL All Tokens active
58087  */
58088 #define ALT_USB_DEV_DIEPCTL1_STALL_E_ACT 0x1
58089 
58090 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_STALL register field. */
58091 #define ALT_USB_DEV_DIEPCTL1_STALL_LSB 21
58092 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_STALL register field. */
58093 #define ALT_USB_DEV_DIEPCTL1_STALL_MSB 21
58094 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_STALL register field. */
58095 #define ALT_USB_DEV_DIEPCTL1_STALL_WIDTH 1
58096 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_STALL register field value. */
58097 #define ALT_USB_DEV_DIEPCTL1_STALL_SET_MSK 0x00200000
58098 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_STALL register field value. */
58099 #define ALT_USB_DEV_DIEPCTL1_STALL_CLR_MSK 0xffdfffff
58100 /* The reset value of the ALT_USB_DEV_DIEPCTL1_STALL register field. */
58101 #define ALT_USB_DEV_DIEPCTL1_STALL_RESET 0x0
58102 /* Extracts the ALT_USB_DEV_DIEPCTL1_STALL field value from a register. */
58103 #define ALT_USB_DEV_DIEPCTL1_STALL_GET(value) (((value) & 0x00200000) >> 21)
58104 /* Produces a ALT_USB_DEV_DIEPCTL1_STALL register field value suitable for setting the register. */
58105 #define ALT_USB_DEV_DIEPCTL1_STALL_SET(value) (((value) << 21) & 0x00200000)
58106 
58107 /*
58108  * Field : TxFIFO Number - txfnum
58109  *
58110  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
58111  * endpoints must map this to the corresponding Periodic TxFIFO number.
58112  *
58113  * 4'h0: Non-Periodic TxFIFO
58114  *
58115  * Others: Specified Periodic TxFIFO.number
58116  *
58117  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
58118  * applications such as mass storage. The core treats an IN endpoint as a non-
58119  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
58120  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
58121  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
58122  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
58123  * This field is valid only for IN endpoints.
58124  *
58125  * Field Access Macros:
58126  *
58127  */
58128 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_TXFNUM register field. */
58129 #define ALT_USB_DEV_DIEPCTL1_TXFNUM_LSB 22
58130 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_TXFNUM register field. */
58131 #define ALT_USB_DEV_DIEPCTL1_TXFNUM_MSB 25
58132 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_TXFNUM register field. */
58133 #define ALT_USB_DEV_DIEPCTL1_TXFNUM_WIDTH 4
58134 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_TXFNUM register field value. */
58135 #define ALT_USB_DEV_DIEPCTL1_TXFNUM_SET_MSK 0x03c00000
58136 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_TXFNUM register field value. */
58137 #define ALT_USB_DEV_DIEPCTL1_TXFNUM_CLR_MSK 0xfc3fffff
58138 /* The reset value of the ALT_USB_DEV_DIEPCTL1_TXFNUM register field. */
58139 #define ALT_USB_DEV_DIEPCTL1_TXFNUM_RESET 0x0
58140 /* Extracts the ALT_USB_DEV_DIEPCTL1_TXFNUM field value from a register. */
58141 #define ALT_USB_DEV_DIEPCTL1_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
58142 /* Produces a ALT_USB_DEV_DIEPCTL1_TXFNUM register field value suitable for setting the register. */
58143 #define ALT_USB_DEV_DIEPCTL1_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
58144 
58145 /*
58146  * Field : Clear NAK - cnak
58147  *
58148  * A write to this bit clears the NAK bit for the endpoint.
58149  *
58150  * Field Enumeration Values:
58151  *
58152  * Enum | Value | Description
58153  * :----------------------------------|:------|:-------------
58154  * ALT_USB_DEV_DIEPCTL1_CNAK_E_INACT | 0x0 | No Clear NAK
58155  * ALT_USB_DEV_DIEPCTL1_CNAK_E_ACT | 0x1 | Clear NAK
58156  *
58157  * Field Access Macros:
58158  *
58159  */
58160 /*
58161  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_CNAK
58162  *
58163  * No Clear NAK
58164  */
58165 #define ALT_USB_DEV_DIEPCTL1_CNAK_E_INACT 0x0
58166 /*
58167  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_CNAK
58168  *
58169  * Clear NAK
58170  */
58171 #define ALT_USB_DEV_DIEPCTL1_CNAK_E_ACT 0x1
58172 
58173 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_CNAK register field. */
58174 #define ALT_USB_DEV_DIEPCTL1_CNAK_LSB 26
58175 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_CNAK register field. */
58176 #define ALT_USB_DEV_DIEPCTL1_CNAK_MSB 26
58177 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_CNAK register field. */
58178 #define ALT_USB_DEV_DIEPCTL1_CNAK_WIDTH 1
58179 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_CNAK register field value. */
58180 #define ALT_USB_DEV_DIEPCTL1_CNAK_SET_MSK 0x04000000
58181 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_CNAK register field value. */
58182 #define ALT_USB_DEV_DIEPCTL1_CNAK_CLR_MSK 0xfbffffff
58183 /* The reset value of the ALT_USB_DEV_DIEPCTL1_CNAK register field. */
58184 #define ALT_USB_DEV_DIEPCTL1_CNAK_RESET 0x0
58185 /* Extracts the ALT_USB_DEV_DIEPCTL1_CNAK field value from a register. */
58186 #define ALT_USB_DEV_DIEPCTL1_CNAK_GET(value) (((value) & 0x04000000) >> 26)
58187 /* Produces a ALT_USB_DEV_DIEPCTL1_CNAK register field value suitable for setting the register. */
58188 #define ALT_USB_DEV_DIEPCTL1_CNAK_SET(value) (((value) << 26) & 0x04000000)
58189 
58190 /*
58191  * Field : Set NAK - snak
58192  *
58193  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
58194  * application can control the transmission of NAK handshakes on an endpoint. The
58195  * core can also Set this bit for an endpoint after a SETUP packet is received on
58196  * that endpoint.
58197  *
58198  * Field Enumeration Values:
58199  *
58200  * Enum | Value | Description
58201  * :----------------------------------|:------|:------------
58202  * ALT_USB_DEV_DIEPCTL1_SNAK_E_INACT | 0x0 | No Set NAK
58203  * ALT_USB_DEV_DIEPCTL1_SNAK_E_ACT | 0x1 | Set NAK
58204  *
58205  * Field Access Macros:
58206  *
58207  */
58208 /*
58209  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_SNAK
58210  *
58211  * No Set NAK
58212  */
58213 #define ALT_USB_DEV_DIEPCTL1_SNAK_E_INACT 0x0
58214 /*
58215  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_SNAK
58216  *
58217  * Set NAK
58218  */
58219 #define ALT_USB_DEV_DIEPCTL1_SNAK_E_ACT 0x1
58220 
58221 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_SNAK register field. */
58222 #define ALT_USB_DEV_DIEPCTL1_SNAK_LSB 27
58223 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_SNAK register field. */
58224 #define ALT_USB_DEV_DIEPCTL1_SNAK_MSB 27
58225 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_SNAK register field. */
58226 #define ALT_USB_DEV_DIEPCTL1_SNAK_WIDTH 1
58227 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_SNAK register field value. */
58228 #define ALT_USB_DEV_DIEPCTL1_SNAK_SET_MSK 0x08000000
58229 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_SNAK register field value. */
58230 #define ALT_USB_DEV_DIEPCTL1_SNAK_CLR_MSK 0xf7ffffff
58231 /* The reset value of the ALT_USB_DEV_DIEPCTL1_SNAK register field. */
58232 #define ALT_USB_DEV_DIEPCTL1_SNAK_RESET 0x0
58233 /* Extracts the ALT_USB_DEV_DIEPCTL1_SNAK field value from a register. */
58234 #define ALT_USB_DEV_DIEPCTL1_SNAK_GET(value) (((value) & 0x08000000) >> 27)
58235 /* Produces a ALT_USB_DEV_DIEPCTL1_SNAK register field value suitable for setting the register. */
58236 #define ALT_USB_DEV_DIEPCTL1_SNAK_SET(value) (((value) << 27) & 0x08000000)
58237 
58238 /*
58239  * Field : Set DATA0 PID - setd0pid
58240  *
58241  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
58242  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
58243  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
58244  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
58245  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
58246  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
58247  * mode is enabled, this field is reserved. The frame number in which to send data
58248  * is in the transmit descriptor structure. The frame in which to receive data is
58249  * updated in receive descriptor structure.
58250  *
58251  * Field Enumeration Values:
58252  *
58253  * Enum | Value | Description
58254  * :-------------------------------------|:------|:----------------------------
58255  * ALT_USB_DEV_DIEPCTL1_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
58256  * ALT_USB_DEV_DIEPCTL1_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
58257  *
58258  * Field Access Macros:
58259  *
58260  */
58261 /*
58262  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_SETD0PID
58263  *
58264  * Disables Set DATA0 PID
58265  */
58266 #define ALT_USB_DEV_DIEPCTL1_SETD0PID_E_DISD 0x0
58267 /*
58268  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_SETD0PID
58269  *
58270  * Endpoint Data PID to DATA0)
58271  */
58272 #define ALT_USB_DEV_DIEPCTL1_SETD0PID_E_END 0x1
58273 
58274 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_SETD0PID register field. */
58275 #define ALT_USB_DEV_DIEPCTL1_SETD0PID_LSB 28
58276 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_SETD0PID register field. */
58277 #define ALT_USB_DEV_DIEPCTL1_SETD0PID_MSB 28
58278 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_SETD0PID register field. */
58279 #define ALT_USB_DEV_DIEPCTL1_SETD0PID_WIDTH 1
58280 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_SETD0PID register field value. */
58281 #define ALT_USB_DEV_DIEPCTL1_SETD0PID_SET_MSK 0x10000000
58282 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_SETD0PID register field value. */
58283 #define ALT_USB_DEV_DIEPCTL1_SETD0PID_CLR_MSK 0xefffffff
58284 /* The reset value of the ALT_USB_DEV_DIEPCTL1_SETD0PID register field. */
58285 #define ALT_USB_DEV_DIEPCTL1_SETD0PID_RESET 0x0
58286 /* Extracts the ALT_USB_DEV_DIEPCTL1_SETD0PID field value from a register. */
58287 #define ALT_USB_DEV_DIEPCTL1_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
58288 /* Produces a ALT_USB_DEV_DIEPCTL1_SETD0PID register field value suitable for setting the register. */
58289 #define ALT_USB_DEV_DIEPCTL1_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
58290 
58291 /*
58292  * Field : Set DATA1 PID - setd1pid
58293  *
58294  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
58295  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
58296  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
58297  *
58298  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
58299  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
58300  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
58301  *
58302  * Field Enumeration Values:
58303  *
58304  * Enum | Value | Description
58305  * :-------------------------------------|:------|:-----------------------
58306  * ALT_USB_DEV_DIEPCTL1_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
58307  * ALT_USB_DEV_DIEPCTL1_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
58308  *
58309  * Field Access Macros:
58310  *
58311  */
58312 /*
58313  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_SETD1PID
58314  *
58315  * Disables Set DATA1 PID
58316  */
58317 #define ALT_USB_DEV_DIEPCTL1_SETD1PID_E_DISD 0x0
58318 /*
58319  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_SETD1PID
58320  *
58321  * Enables Set DATA1 PID
58322  */
58323 #define ALT_USB_DEV_DIEPCTL1_SETD1PID_E_END 0x1
58324 
58325 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_SETD1PID register field. */
58326 #define ALT_USB_DEV_DIEPCTL1_SETD1PID_LSB 29
58327 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_SETD1PID register field. */
58328 #define ALT_USB_DEV_DIEPCTL1_SETD1PID_MSB 29
58329 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_SETD1PID register field. */
58330 #define ALT_USB_DEV_DIEPCTL1_SETD1PID_WIDTH 1
58331 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_SETD1PID register field value. */
58332 #define ALT_USB_DEV_DIEPCTL1_SETD1PID_SET_MSK 0x20000000
58333 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_SETD1PID register field value. */
58334 #define ALT_USB_DEV_DIEPCTL1_SETD1PID_CLR_MSK 0xdfffffff
58335 /* The reset value of the ALT_USB_DEV_DIEPCTL1_SETD1PID register field. */
58336 #define ALT_USB_DEV_DIEPCTL1_SETD1PID_RESET 0x0
58337 /* Extracts the ALT_USB_DEV_DIEPCTL1_SETD1PID field value from a register. */
58338 #define ALT_USB_DEV_DIEPCTL1_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
58339 /* Produces a ALT_USB_DEV_DIEPCTL1_SETD1PID register field value suitable for setting the register. */
58340 #define ALT_USB_DEV_DIEPCTL1_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
58341 
58342 /*
58343  * Field : Endpoint Disable - epdis
58344  *
58345  * Applies to IN and OUT endpoints. The application sets this bit to stop
58346  * transmitting/receiving data on an endpoint, even before the transfer for that
58347  * endpoint is complete. The application must wait for the Endpoint Disabled
58348  * interrupt before treating the endpoint as disabled. The core clears this bit
58349  * before setting the Endpoint Disabled interrupt. The application must set this
58350  * bit only if Endpoint Enable is already set for this endpoint.
58351  *
58352  * Field Enumeration Values:
58353  *
58354  * Enum | Value | Description
58355  * :-----------------------------------|:------|:--------------------
58356  * ALT_USB_DEV_DIEPCTL1_EPDIS_E_INACT | 0x0 | No Endpoint Disable
58357  * ALT_USB_DEV_DIEPCTL1_EPDIS_E_ACT | 0x1 | Endpoint Disable
58358  *
58359  * Field Access Macros:
58360  *
58361  */
58362 /*
58363  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_EPDIS
58364  *
58365  * No Endpoint Disable
58366  */
58367 #define ALT_USB_DEV_DIEPCTL1_EPDIS_E_INACT 0x0
58368 /*
58369  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_EPDIS
58370  *
58371  * Endpoint Disable
58372  */
58373 #define ALT_USB_DEV_DIEPCTL1_EPDIS_E_ACT 0x1
58374 
58375 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_EPDIS register field. */
58376 #define ALT_USB_DEV_DIEPCTL1_EPDIS_LSB 30
58377 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_EPDIS register field. */
58378 #define ALT_USB_DEV_DIEPCTL1_EPDIS_MSB 30
58379 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_EPDIS register field. */
58380 #define ALT_USB_DEV_DIEPCTL1_EPDIS_WIDTH 1
58381 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_EPDIS register field value. */
58382 #define ALT_USB_DEV_DIEPCTL1_EPDIS_SET_MSK 0x40000000
58383 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_EPDIS register field value. */
58384 #define ALT_USB_DEV_DIEPCTL1_EPDIS_CLR_MSK 0xbfffffff
58385 /* The reset value of the ALT_USB_DEV_DIEPCTL1_EPDIS register field. */
58386 #define ALT_USB_DEV_DIEPCTL1_EPDIS_RESET 0x0
58387 /* Extracts the ALT_USB_DEV_DIEPCTL1_EPDIS field value from a register. */
58388 #define ALT_USB_DEV_DIEPCTL1_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
58389 /* Produces a ALT_USB_DEV_DIEPCTL1_EPDIS register field value suitable for setting the register. */
58390 #define ALT_USB_DEV_DIEPCTL1_EPDIS_SET(value) (((value) << 30) & 0x40000000)
58391 
58392 /*
58393  * Field : Endpoint Enable - epena
58394  *
58395  * Applies to IN and OUT endpoints.
58396  *
58397  * * When Scatter/Gather DMA mode is enabled,
58398  *
58399  * * for IN endpoints this bit indicates that the descriptor structure and data
58400  * buffer with data ready to transmit is setup.
58401  *
58402  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
58403  * receive data is setup.
58404  *
58405  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
58406  * mode:
58407  *
58408  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
58409  * the endpoint.
58410  *
58411  * * for OUT endpoints, this bit indicates that the application has allocated the
58412  * memory to start receiving data from the USB.
58413  *
58414  * * The core clears this bit before setting any of the following interrupts on
58415  * this endpoint:
58416  *
58417  * * SETUP Phase Done
58418  *
58419  * * Endpoint Disabled
58420  *
58421  * * Transfer Completed
58422  *
58423  * for control endpoints in DMA mode, this bit must be set to be able to transfer
58424  * SETUP data packets in memory.
58425  *
58426  * Field Enumeration Values:
58427  *
58428  * Enum | Value | Description
58429  * :-----------------------------------|:------|:-------------------------
58430  * ALT_USB_DEV_DIEPCTL1_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
58431  * ALT_USB_DEV_DIEPCTL1_EPENA_E_ACT | 0x1 | Endpoint Enable active
58432  *
58433  * Field Access Macros:
58434  *
58435  */
58436 /*
58437  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_EPENA
58438  *
58439  * Endpoint Enable inactive
58440  */
58441 #define ALT_USB_DEV_DIEPCTL1_EPENA_E_INACT 0x0
58442 /*
58443  * Enumerated value for register field ALT_USB_DEV_DIEPCTL1_EPENA
58444  *
58445  * Endpoint Enable active
58446  */
58447 #define ALT_USB_DEV_DIEPCTL1_EPENA_E_ACT 0x1
58448 
58449 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL1_EPENA register field. */
58450 #define ALT_USB_DEV_DIEPCTL1_EPENA_LSB 31
58451 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL1_EPENA register field. */
58452 #define ALT_USB_DEV_DIEPCTL1_EPENA_MSB 31
58453 /* The width in bits of the ALT_USB_DEV_DIEPCTL1_EPENA register field. */
58454 #define ALT_USB_DEV_DIEPCTL1_EPENA_WIDTH 1
58455 /* The mask used to set the ALT_USB_DEV_DIEPCTL1_EPENA register field value. */
58456 #define ALT_USB_DEV_DIEPCTL1_EPENA_SET_MSK 0x80000000
58457 /* The mask used to clear the ALT_USB_DEV_DIEPCTL1_EPENA register field value. */
58458 #define ALT_USB_DEV_DIEPCTL1_EPENA_CLR_MSK 0x7fffffff
58459 /* The reset value of the ALT_USB_DEV_DIEPCTL1_EPENA register field. */
58460 #define ALT_USB_DEV_DIEPCTL1_EPENA_RESET 0x0
58461 /* Extracts the ALT_USB_DEV_DIEPCTL1_EPENA field value from a register. */
58462 #define ALT_USB_DEV_DIEPCTL1_EPENA_GET(value) (((value) & 0x80000000) >> 31)
58463 /* Produces a ALT_USB_DEV_DIEPCTL1_EPENA register field value suitable for setting the register. */
58464 #define ALT_USB_DEV_DIEPCTL1_EPENA_SET(value) (((value) << 31) & 0x80000000)
58465 
58466 #ifndef __ASSEMBLY__
58467 /*
58468  * WARNING: The C register and register group struct declarations are provided for
58469  * convenience and illustrative purposes. They should, however, be used with
58470  * caution as the C language standard provides no guarantees about the alignment or
58471  * atomicity of device memory accesses. The recommended practice for writing
58472  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
58473  * alt_write_word() functions.
58474  *
58475  * The struct declaration for register ALT_USB_DEV_DIEPCTL1.
58476  */
58477 struct ALT_USB_DEV_DIEPCTL1_s
58478 {
58479  uint32_t mps : 11; /* Maximum Packet Size */
58480  uint32_t : 4; /* *UNDEFINED* */
58481  uint32_t usbactep : 1; /* USB Active Endpoint */
58482  const uint32_t dpid : 1; /* Endpoint Data PID */
58483  const uint32_t naksts : 1; /* NAK Status */
58484  uint32_t eptype : 2; /* Endpoint Type */
58485  uint32_t : 1; /* *UNDEFINED* */
58486  const uint32_t stall : 1; /* STALL Handshake */
58487  uint32_t txfnum : 4; /* TxFIFO Number */
58488  uint32_t cnak : 1; /* Clear NAK */
58489  uint32_t snak : 1; /* Set NAK */
58490  uint32_t setd0pid : 1; /* Set DATA0 PID */
58491  uint32_t setd1pid : 1; /* Set DATA1 PID */
58492  const uint32_t epdis : 1; /* Endpoint Disable */
58493  const uint32_t epena : 1; /* Endpoint Enable */
58494 };
58495 
58496 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL1. */
58497 typedef volatile struct ALT_USB_DEV_DIEPCTL1_s ALT_USB_DEV_DIEPCTL1_t;
58498 #endif /* __ASSEMBLY__ */
58499 
58500 /* The byte offset of the ALT_USB_DEV_DIEPCTL1 register from the beginning of the component. */
58501 #define ALT_USB_DEV_DIEPCTL1_OFST 0x120
58502 /* The address of the ALT_USB_DEV_DIEPCTL1 register. */
58503 #define ALT_USB_DEV_DIEPCTL1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL1_OFST))
58504 
58505 /*
58506  * Register : Device IN Endpoint 1 Interrupt Register - diepint1
58507  *
58508  * This register indicates the status of an endpoint with respect to USB- and AHB-
58509  * related events. The application must read this register when the OUT Endpoints
58510  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
58511  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
58512  * can read this register, it must first read the Device All Endpoints Interrupt
58513  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
58514  * Interrupt register. The application must clear the appropriate bit in this
58515  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
58516  *
58517  * Register Layout
58518  *
58519  * Bits | Access | Reset | Description
58520  * :--------|:-------|:------|:---------------------------------------
58521  * [0] | R | 0x0 | Transfer Completed Interrupt
58522  * [1] | R | 0x0 | Endpoint Disabled Interrupt
58523  * [2] | R | 0x0 | AHB Error
58524  * [3] | R | 0x0 | Timeout Condition
58525  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
58526  * [5] | R | 0x0 | IN Token Received with EP Mismatch
58527  * [6] | R | 0x0 | IN Endpoint NAK Effective
58528  * [7] | R | 0x1 | Transmit FIFO Empty
58529  * [8] | R | 0x0 | Fifo Underrun
58530  * [9] | R | 0x0 | BNA Interrupt
58531  * [10] | ??? | 0x0 | *UNDEFINED*
58532  * [11] | R | 0x0 | Packet Drop Status
58533  * [12] | R | 0x0 | BbleErr Interrupt (
58534  * [13] | R | 0x0 | NAK Interrupt
58535  * [14] | R | 0x0 | NYET Interrupt
58536  * [31:15] | ??? | 0x0 | *UNDEFINED*
58537  *
58538  */
58539 /*
58540  * Field : Transfer Completed Interrupt - xfercompl
58541  *
58542  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
58543  *
58544  * * for IN endpoint this field indicates that the requested data from the
58545  * descriptor is moved from external system memory to internal FIFO.
58546  *
58547  * * for OUT endpoint this field indicates that the requested data from the
58548  * internal FIFO is moved to external system memory. This interrupt is generated
58549  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
58550  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
58551  * this field indicates that the programmed transfer is complete on the AHB as
58552  * well as on the USB, for this endpoint.
58553  *
58554  * Field Enumeration Values:
58555  *
58556  * Enum | Value | Description
58557  * :---------------------------------------|:------|:-----------------------------
58558  * ALT_USB_DEV_DIEPINT1_XFERCOMPL_E_INACT | 0x0 | No Interrupt
58559  * ALT_USB_DEV_DIEPINT1_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
58560  *
58561  * Field Access Macros:
58562  *
58563  */
58564 /*
58565  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_XFERCOMPL
58566  *
58567  * No Interrupt
58568  */
58569 #define ALT_USB_DEV_DIEPINT1_XFERCOMPL_E_INACT 0x0
58570 /*
58571  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_XFERCOMPL
58572  *
58573  * Transfer Completed Interrupt
58574  */
58575 #define ALT_USB_DEV_DIEPINT1_XFERCOMPL_E_ACT 0x1
58576 
58577 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_XFERCOMPL register field. */
58578 #define ALT_USB_DEV_DIEPINT1_XFERCOMPL_LSB 0
58579 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_XFERCOMPL register field. */
58580 #define ALT_USB_DEV_DIEPINT1_XFERCOMPL_MSB 0
58581 /* The width in bits of the ALT_USB_DEV_DIEPINT1_XFERCOMPL register field. */
58582 #define ALT_USB_DEV_DIEPINT1_XFERCOMPL_WIDTH 1
58583 /* The mask used to set the ALT_USB_DEV_DIEPINT1_XFERCOMPL register field value. */
58584 #define ALT_USB_DEV_DIEPINT1_XFERCOMPL_SET_MSK 0x00000001
58585 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_XFERCOMPL register field value. */
58586 #define ALT_USB_DEV_DIEPINT1_XFERCOMPL_CLR_MSK 0xfffffffe
58587 /* The reset value of the ALT_USB_DEV_DIEPINT1_XFERCOMPL register field. */
58588 #define ALT_USB_DEV_DIEPINT1_XFERCOMPL_RESET 0x0
58589 /* Extracts the ALT_USB_DEV_DIEPINT1_XFERCOMPL field value from a register. */
58590 #define ALT_USB_DEV_DIEPINT1_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
58591 /* Produces a ALT_USB_DEV_DIEPINT1_XFERCOMPL register field value suitable for setting the register. */
58592 #define ALT_USB_DEV_DIEPINT1_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
58593 
58594 /*
58595  * Field : Endpoint Disabled Interrupt - epdisbld
58596  *
58597  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
58598  * disabled per the application's request.
58599  *
58600  * Field Enumeration Values:
58601  *
58602  * Enum | Value | Description
58603  * :--------------------------------------|:------|:----------------------------
58604  * ALT_USB_DEV_DIEPINT1_EPDISBLD_E_INACT | 0x0 | No Interrupt
58605  * ALT_USB_DEV_DIEPINT1_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
58606  *
58607  * Field Access Macros:
58608  *
58609  */
58610 /*
58611  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_EPDISBLD
58612  *
58613  * No Interrupt
58614  */
58615 #define ALT_USB_DEV_DIEPINT1_EPDISBLD_E_INACT 0x0
58616 /*
58617  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_EPDISBLD
58618  *
58619  * Endpoint Disabled Interrupt
58620  */
58621 #define ALT_USB_DEV_DIEPINT1_EPDISBLD_E_ACT 0x1
58622 
58623 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_EPDISBLD register field. */
58624 #define ALT_USB_DEV_DIEPINT1_EPDISBLD_LSB 1
58625 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_EPDISBLD register field. */
58626 #define ALT_USB_DEV_DIEPINT1_EPDISBLD_MSB 1
58627 /* The width in bits of the ALT_USB_DEV_DIEPINT1_EPDISBLD register field. */
58628 #define ALT_USB_DEV_DIEPINT1_EPDISBLD_WIDTH 1
58629 /* The mask used to set the ALT_USB_DEV_DIEPINT1_EPDISBLD register field value. */
58630 #define ALT_USB_DEV_DIEPINT1_EPDISBLD_SET_MSK 0x00000002
58631 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_EPDISBLD register field value. */
58632 #define ALT_USB_DEV_DIEPINT1_EPDISBLD_CLR_MSK 0xfffffffd
58633 /* The reset value of the ALT_USB_DEV_DIEPINT1_EPDISBLD register field. */
58634 #define ALT_USB_DEV_DIEPINT1_EPDISBLD_RESET 0x0
58635 /* Extracts the ALT_USB_DEV_DIEPINT1_EPDISBLD field value from a register. */
58636 #define ALT_USB_DEV_DIEPINT1_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
58637 /* Produces a ALT_USB_DEV_DIEPINT1_EPDISBLD register field value suitable for setting the register. */
58638 #define ALT_USB_DEV_DIEPINT1_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
58639 
58640 /*
58641  * Field : AHB Error - ahberr
58642  *
58643  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
58644  * there is an AHB error during an AHB read/write. The application can read the
58645  * corresponding endpoint DMA address register to get the error address.
58646  *
58647  * Field Enumeration Values:
58648  *
58649  * Enum | Value | Description
58650  * :------------------------------------|:------|:--------------------
58651  * ALT_USB_DEV_DIEPINT1_AHBERR_E_INACT | 0x0 | No Interrupt
58652  * ALT_USB_DEV_DIEPINT1_AHBERR_E_ACT | 0x1 | AHB Error interrupt
58653  *
58654  * Field Access Macros:
58655  *
58656  */
58657 /*
58658  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_AHBERR
58659  *
58660  * No Interrupt
58661  */
58662 #define ALT_USB_DEV_DIEPINT1_AHBERR_E_INACT 0x0
58663 /*
58664  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_AHBERR
58665  *
58666  * AHB Error interrupt
58667  */
58668 #define ALT_USB_DEV_DIEPINT1_AHBERR_E_ACT 0x1
58669 
58670 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_AHBERR register field. */
58671 #define ALT_USB_DEV_DIEPINT1_AHBERR_LSB 2
58672 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_AHBERR register field. */
58673 #define ALT_USB_DEV_DIEPINT1_AHBERR_MSB 2
58674 /* The width in bits of the ALT_USB_DEV_DIEPINT1_AHBERR register field. */
58675 #define ALT_USB_DEV_DIEPINT1_AHBERR_WIDTH 1
58676 /* The mask used to set the ALT_USB_DEV_DIEPINT1_AHBERR register field value. */
58677 #define ALT_USB_DEV_DIEPINT1_AHBERR_SET_MSK 0x00000004
58678 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_AHBERR register field value. */
58679 #define ALT_USB_DEV_DIEPINT1_AHBERR_CLR_MSK 0xfffffffb
58680 /* The reset value of the ALT_USB_DEV_DIEPINT1_AHBERR register field. */
58681 #define ALT_USB_DEV_DIEPINT1_AHBERR_RESET 0x0
58682 /* Extracts the ALT_USB_DEV_DIEPINT1_AHBERR field value from a register. */
58683 #define ALT_USB_DEV_DIEPINT1_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
58684 /* Produces a ALT_USB_DEV_DIEPINT1_AHBERR register field value suitable for setting the register. */
58685 #define ALT_USB_DEV_DIEPINT1_AHBERR_SET(value) (((value) << 2) & 0x00000004)
58686 
58687 /*
58688  * Field : Timeout Condition - timeout
58689  *
58690  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
58691  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
58692  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
58693  * detected a timeout condition on the USB for the last IN token on this endpoint.
58694  *
58695  * Field Enumeration Values:
58696  *
58697  * Enum | Value | Description
58698  * :---------------------------------|:------|:------------------
58699  * ALT_USB_DEV_DIEPINT1_TMO_E_INACT | 0x0 | No interrupt
58700  * ALT_USB_DEV_DIEPINT1_TMO_E_ACT | 0x1 | Timeout interrupy
58701  *
58702  * Field Access Macros:
58703  *
58704  */
58705 /*
58706  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_TMO
58707  *
58708  * No interrupt
58709  */
58710 #define ALT_USB_DEV_DIEPINT1_TMO_E_INACT 0x0
58711 /*
58712  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_TMO
58713  *
58714  * Timeout interrupy
58715  */
58716 #define ALT_USB_DEV_DIEPINT1_TMO_E_ACT 0x1
58717 
58718 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_TMO register field. */
58719 #define ALT_USB_DEV_DIEPINT1_TMO_LSB 3
58720 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_TMO register field. */
58721 #define ALT_USB_DEV_DIEPINT1_TMO_MSB 3
58722 /* The width in bits of the ALT_USB_DEV_DIEPINT1_TMO register field. */
58723 #define ALT_USB_DEV_DIEPINT1_TMO_WIDTH 1
58724 /* The mask used to set the ALT_USB_DEV_DIEPINT1_TMO register field value. */
58725 #define ALT_USB_DEV_DIEPINT1_TMO_SET_MSK 0x00000008
58726 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_TMO register field value. */
58727 #define ALT_USB_DEV_DIEPINT1_TMO_CLR_MSK 0xfffffff7
58728 /* The reset value of the ALT_USB_DEV_DIEPINT1_TMO register field. */
58729 #define ALT_USB_DEV_DIEPINT1_TMO_RESET 0x0
58730 /* Extracts the ALT_USB_DEV_DIEPINT1_TMO field value from a register. */
58731 #define ALT_USB_DEV_DIEPINT1_TMO_GET(value) (((value) & 0x00000008) >> 3)
58732 /* Produces a ALT_USB_DEV_DIEPINT1_TMO register field value suitable for setting the register. */
58733 #define ALT_USB_DEV_DIEPINT1_TMO_SET(value) (((value) << 3) & 0x00000008)
58734 
58735 /*
58736  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
58737  *
58738  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
58739  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
58740  * interrupt is asserted on the endpoint for which the IN token was received.
58741  *
58742  * Field Enumeration Values:
58743  *
58744  * Enum | Value | Description
58745  * :-----------------------------------------|:------|:----------------------------
58746  * ALT_USB_DEV_DIEPINT1_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
58747  * ALT_USB_DEV_DIEPINT1_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
58748  *
58749  * Field Access Macros:
58750  *
58751  */
58752 /*
58753  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_INTKNTXFEMP
58754  *
58755  * No interrupt
58756  */
58757 #define ALT_USB_DEV_DIEPINT1_INTKNTXFEMP_E_INACT 0x0
58758 /*
58759  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_INTKNTXFEMP
58760  *
58761  * IN Token Received Interrupt
58762  */
58763 #define ALT_USB_DEV_DIEPINT1_INTKNTXFEMP_E_ACT 0x1
58764 
58765 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_INTKNTXFEMP register field. */
58766 #define ALT_USB_DEV_DIEPINT1_INTKNTXFEMP_LSB 4
58767 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_INTKNTXFEMP register field. */
58768 #define ALT_USB_DEV_DIEPINT1_INTKNTXFEMP_MSB 4
58769 /* The width in bits of the ALT_USB_DEV_DIEPINT1_INTKNTXFEMP register field. */
58770 #define ALT_USB_DEV_DIEPINT1_INTKNTXFEMP_WIDTH 1
58771 /* The mask used to set the ALT_USB_DEV_DIEPINT1_INTKNTXFEMP register field value. */
58772 #define ALT_USB_DEV_DIEPINT1_INTKNTXFEMP_SET_MSK 0x00000010
58773 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_INTKNTXFEMP register field value. */
58774 #define ALT_USB_DEV_DIEPINT1_INTKNTXFEMP_CLR_MSK 0xffffffef
58775 /* The reset value of the ALT_USB_DEV_DIEPINT1_INTKNTXFEMP register field. */
58776 #define ALT_USB_DEV_DIEPINT1_INTKNTXFEMP_RESET 0x0
58777 /* Extracts the ALT_USB_DEV_DIEPINT1_INTKNTXFEMP field value from a register. */
58778 #define ALT_USB_DEV_DIEPINT1_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
58779 /* Produces a ALT_USB_DEV_DIEPINT1_INTKNTXFEMP register field value suitable for setting the register. */
58780 #define ALT_USB_DEV_DIEPINT1_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
58781 
58782 /*
58783  * Field : IN Token Received with EP Mismatch - intknepmis
58784  *
58785  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
58786  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
58787  * IN token was received. This interrupt is asserted on the endpoint for which the
58788  * IN token was received.
58789  *
58790  * Field Enumeration Values:
58791  *
58792  * Enum | Value | Description
58793  * :----------------------------------------|:------|:---------------------------------------------
58794  * ALT_USB_DEV_DIEPINT1_INTKNEPMIS_E_INACT | 0x0 | No interrupt
58795  * ALT_USB_DEV_DIEPINT1_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
58796  *
58797  * Field Access Macros:
58798  *
58799  */
58800 /*
58801  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_INTKNEPMIS
58802  *
58803  * No interrupt
58804  */
58805 #define ALT_USB_DEV_DIEPINT1_INTKNEPMIS_E_INACT 0x0
58806 /*
58807  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_INTKNEPMIS
58808  *
58809  * IN Token Received with EP Mismatch interrupt
58810  */
58811 #define ALT_USB_DEV_DIEPINT1_INTKNEPMIS_E_ACT 0x1
58812 
58813 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_INTKNEPMIS register field. */
58814 #define ALT_USB_DEV_DIEPINT1_INTKNEPMIS_LSB 5
58815 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_INTKNEPMIS register field. */
58816 #define ALT_USB_DEV_DIEPINT1_INTKNEPMIS_MSB 5
58817 /* The width in bits of the ALT_USB_DEV_DIEPINT1_INTKNEPMIS register field. */
58818 #define ALT_USB_DEV_DIEPINT1_INTKNEPMIS_WIDTH 1
58819 /* The mask used to set the ALT_USB_DEV_DIEPINT1_INTKNEPMIS register field value. */
58820 #define ALT_USB_DEV_DIEPINT1_INTKNEPMIS_SET_MSK 0x00000020
58821 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_INTKNEPMIS register field value. */
58822 #define ALT_USB_DEV_DIEPINT1_INTKNEPMIS_CLR_MSK 0xffffffdf
58823 /* The reset value of the ALT_USB_DEV_DIEPINT1_INTKNEPMIS register field. */
58824 #define ALT_USB_DEV_DIEPINT1_INTKNEPMIS_RESET 0x0
58825 /* Extracts the ALT_USB_DEV_DIEPINT1_INTKNEPMIS field value from a register. */
58826 #define ALT_USB_DEV_DIEPINT1_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
58827 /* Produces a ALT_USB_DEV_DIEPINT1_INTKNEPMIS register field value suitable for setting the register. */
58828 #define ALT_USB_DEV_DIEPINT1_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
58829 
58830 /*
58831  * Field : IN Endpoint NAK Effective - inepnakeff
58832  *
58833  * Applies to periodic IN endpoints only. This bit can be cleared when the
58834  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
58835  * interrupt indicates that the core has sampled the NAK bit Set (either by the
58836  * application or by the core). The interrupt indicates that the IN endpoint NAK
58837  * bit Set by the application has taken effect in the core.This interrupt does not
58838  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
58839  * over a NAK bit.
58840  *
58841  * Field Enumeration Values:
58842  *
58843  * Enum | Value | Description
58844  * :----------------------------------------|:------|:------------------------------------
58845  * ALT_USB_DEV_DIEPINT1_INEPNAKEFF_E_INACT | 0x0 | No interrupt
58846  * ALT_USB_DEV_DIEPINT1_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
58847  *
58848  * Field Access Macros:
58849  *
58850  */
58851 /*
58852  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_INEPNAKEFF
58853  *
58854  * No interrupt
58855  */
58856 #define ALT_USB_DEV_DIEPINT1_INEPNAKEFF_E_INACT 0x0
58857 /*
58858  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_INEPNAKEFF
58859  *
58860  * IN Endpoint NAK Effective interrupt
58861  */
58862 #define ALT_USB_DEV_DIEPINT1_INEPNAKEFF_E_ACT 0x1
58863 
58864 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_INEPNAKEFF register field. */
58865 #define ALT_USB_DEV_DIEPINT1_INEPNAKEFF_LSB 6
58866 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_INEPNAKEFF register field. */
58867 #define ALT_USB_DEV_DIEPINT1_INEPNAKEFF_MSB 6
58868 /* The width in bits of the ALT_USB_DEV_DIEPINT1_INEPNAKEFF register field. */
58869 #define ALT_USB_DEV_DIEPINT1_INEPNAKEFF_WIDTH 1
58870 /* The mask used to set the ALT_USB_DEV_DIEPINT1_INEPNAKEFF register field value. */
58871 #define ALT_USB_DEV_DIEPINT1_INEPNAKEFF_SET_MSK 0x00000040
58872 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_INEPNAKEFF register field value. */
58873 #define ALT_USB_DEV_DIEPINT1_INEPNAKEFF_CLR_MSK 0xffffffbf
58874 /* The reset value of the ALT_USB_DEV_DIEPINT1_INEPNAKEFF register field. */
58875 #define ALT_USB_DEV_DIEPINT1_INEPNAKEFF_RESET 0x0
58876 /* Extracts the ALT_USB_DEV_DIEPINT1_INEPNAKEFF field value from a register. */
58877 #define ALT_USB_DEV_DIEPINT1_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
58878 /* Produces a ALT_USB_DEV_DIEPINT1_INEPNAKEFF register field value suitable for setting the register. */
58879 #define ALT_USB_DEV_DIEPINT1_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
58880 
58881 /*
58882  * Field : Transmit FIFO Empty - txfemp
58883  *
58884  * This bit is valid only for IN Endpoints This interrupt is asserted when the
58885  * TxFIFO for this endpoint is either half or completely empty. The half or
58886  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
58887  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
58888  *
58889  * Field Enumeration Values:
58890  *
58891  * Enum | Value | Description
58892  * :------------------------------------|:------|:------------------------------
58893  * ALT_USB_DEV_DIEPINT1_TXFEMP_E_INACT | 0x0 | No interrupt
58894  * ALT_USB_DEV_DIEPINT1_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
58895  *
58896  * Field Access Macros:
58897  *
58898  */
58899 /*
58900  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_TXFEMP
58901  *
58902  * No interrupt
58903  */
58904 #define ALT_USB_DEV_DIEPINT1_TXFEMP_E_INACT 0x0
58905 /*
58906  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_TXFEMP
58907  *
58908  * Transmit FIFO Empty interrupt
58909  */
58910 #define ALT_USB_DEV_DIEPINT1_TXFEMP_E_ACT 0x1
58911 
58912 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_TXFEMP register field. */
58913 #define ALT_USB_DEV_DIEPINT1_TXFEMP_LSB 7
58914 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_TXFEMP register field. */
58915 #define ALT_USB_DEV_DIEPINT1_TXFEMP_MSB 7
58916 /* The width in bits of the ALT_USB_DEV_DIEPINT1_TXFEMP register field. */
58917 #define ALT_USB_DEV_DIEPINT1_TXFEMP_WIDTH 1
58918 /* The mask used to set the ALT_USB_DEV_DIEPINT1_TXFEMP register field value. */
58919 #define ALT_USB_DEV_DIEPINT1_TXFEMP_SET_MSK 0x00000080
58920 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_TXFEMP register field value. */
58921 #define ALT_USB_DEV_DIEPINT1_TXFEMP_CLR_MSK 0xffffff7f
58922 /* The reset value of the ALT_USB_DEV_DIEPINT1_TXFEMP register field. */
58923 #define ALT_USB_DEV_DIEPINT1_TXFEMP_RESET 0x1
58924 /* Extracts the ALT_USB_DEV_DIEPINT1_TXFEMP field value from a register. */
58925 #define ALT_USB_DEV_DIEPINT1_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
58926 /* Produces a ALT_USB_DEV_DIEPINT1_TXFEMP register field value suitable for setting the register. */
58927 #define ALT_USB_DEV_DIEPINT1_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
58928 
58929 /*
58930  * Field : Fifo Underrun - txfifoundrn
58931  *
58932  * Applies to IN endpoints Only. The core generates this interrupt when it detects
58933  * a transmit FIFO underrun condition for this endpoint.
58934  *
58935  * Field Enumeration Values:
58936  *
58937  * Enum | Value | Description
58938  * :-----------------------------------------|:------|:------------------------
58939  * ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
58940  * ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
58941  *
58942  * Field Access Macros:
58943  *
58944  */
58945 /*
58946  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN
58947  *
58948  * No interrupt
58949  */
58950 #define ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN_E_INACT 0x0
58951 /*
58952  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN
58953  *
58954  * Fifo Underrun interrupt
58955  */
58956 #define ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN_E_ACT 0x1
58957 
58958 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN register field. */
58959 #define ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN_LSB 8
58960 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN register field. */
58961 #define ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN_MSB 8
58962 /* The width in bits of the ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN register field. */
58963 #define ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN_WIDTH 1
58964 /* The mask used to set the ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN register field value. */
58965 #define ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN_SET_MSK 0x00000100
58966 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN register field value. */
58967 #define ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN_CLR_MSK 0xfffffeff
58968 /* The reset value of the ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN register field. */
58969 #define ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN_RESET 0x0
58970 /* Extracts the ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN field value from a register. */
58971 #define ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
58972 /* Produces a ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN register field value suitable for setting the register. */
58973 #define ALT_USB_DEV_DIEPINT1_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
58974 
58975 /*
58976  * Field : BNA Interrupt - bnaintr
58977  *
58978  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
58979  * generates this interrupt when the descriptor accessed is not ready for the Core
58980  * to process, such as Host busy or DMA done
58981  *
58982  * Field Enumeration Values:
58983  *
58984  * Enum | Value | Description
58985  * :-------------------------------------|:------|:--------------
58986  * ALT_USB_DEV_DIEPINT1_BNAINTR_E_INACT | 0x0 | No interrupt
58987  * ALT_USB_DEV_DIEPINT1_BNAINTR_E_ACT | 0x1 | BNA interrupt
58988  *
58989  * Field Access Macros:
58990  *
58991  */
58992 /*
58993  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_BNAINTR
58994  *
58995  * No interrupt
58996  */
58997 #define ALT_USB_DEV_DIEPINT1_BNAINTR_E_INACT 0x0
58998 /*
58999  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_BNAINTR
59000  *
59001  * BNA interrupt
59002  */
59003 #define ALT_USB_DEV_DIEPINT1_BNAINTR_E_ACT 0x1
59004 
59005 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_BNAINTR register field. */
59006 #define ALT_USB_DEV_DIEPINT1_BNAINTR_LSB 9
59007 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_BNAINTR register field. */
59008 #define ALT_USB_DEV_DIEPINT1_BNAINTR_MSB 9
59009 /* The width in bits of the ALT_USB_DEV_DIEPINT1_BNAINTR register field. */
59010 #define ALT_USB_DEV_DIEPINT1_BNAINTR_WIDTH 1
59011 /* The mask used to set the ALT_USB_DEV_DIEPINT1_BNAINTR register field value. */
59012 #define ALT_USB_DEV_DIEPINT1_BNAINTR_SET_MSK 0x00000200
59013 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_BNAINTR register field value. */
59014 #define ALT_USB_DEV_DIEPINT1_BNAINTR_CLR_MSK 0xfffffdff
59015 /* The reset value of the ALT_USB_DEV_DIEPINT1_BNAINTR register field. */
59016 #define ALT_USB_DEV_DIEPINT1_BNAINTR_RESET 0x0
59017 /* Extracts the ALT_USB_DEV_DIEPINT1_BNAINTR field value from a register. */
59018 #define ALT_USB_DEV_DIEPINT1_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
59019 /* Produces a ALT_USB_DEV_DIEPINT1_BNAINTR register field value suitable for setting the register. */
59020 #define ALT_USB_DEV_DIEPINT1_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
59021 
59022 /*
59023  * Field : Packet Drop Status - pktdrpsts
59024  *
59025  * This bit indicates to the application that an ISOC OUT packet has been dropped.
59026  * This bit does not have an associated mask bit and does not generate an
59027  * interrupt.
59028  *
59029  * Field Enumeration Values:
59030  *
59031  * Enum | Value | Description
59032  * :---------------------------------------|:------|:-----------------------------
59033  * ALT_USB_DEV_DIEPINT1_PKTDRPSTS_E_INACT | 0x0 | No interrupt
59034  * ALT_USB_DEV_DIEPINT1_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
59035  *
59036  * Field Access Macros:
59037  *
59038  */
59039 /*
59040  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_PKTDRPSTS
59041  *
59042  * No interrupt
59043  */
59044 #define ALT_USB_DEV_DIEPINT1_PKTDRPSTS_E_INACT 0x0
59045 /*
59046  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_PKTDRPSTS
59047  *
59048  * Packet Drop Status interrupt
59049  */
59050 #define ALT_USB_DEV_DIEPINT1_PKTDRPSTS_E_ACT 0x1
59051 
59052 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_PKTDRPSTS register field. */
59053 #define ALT_USB_DEV_DIEPINT1_PKTDRPSTS_LSB 11
59054 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_PKTDRPSTS register field. */
59055 #define ALT_USB_DEV_DIEPINT1_PKTDRPSTS_MSB 11
59056 /* The width in bits of the ALT_USB_DEV_DIEPINT1_PKTDRPSTS register field. */
59057 #define ALT_USB_DEV_DIEPINT1_PKTDRPSTS_WIDTH 1
59058 /* The mask used to set the ALT_USB_DEV_DIEPINT1_PKTDRPSTS register field value. */
59059 #define ALT_USB_DEV_DIEPINT1_PKTDRPSTS_SET_MSK 0x00000800
59060 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_PKTDRPSTS register field value. */
59061 #define ALT_USB_DEV_DIEPINT1_PKTDRPSTS_CLR_MSK 0xfffff7ff
59062 /* The reset value of the ALT_USB_DEV_DIEPINT1_PKTDRPSTS register field. */
59063 #define ALT_USB_DEV_DIEPINT1_PKTDRPSTS_RESET 0x0
59064 /* Extracts the ALT_USB_DEV_DIEPINT1_PKTDRPSTS field value from a register. */
59065 #define ALT_USB_DEV_DIEPINT1_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
59066 /* Produces a ALT_USB_DEV_DIEPINT1_PKTDRPSTS register field value suitable for setting the register. */
59067 #define ALT_USB_DEV_DIEPINT1_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
59068 
59069 /*
59070  * Field : BbleErr Interrupt ( - bbleerr
59071  *
59072  * The core generates this interrupt when babble is received for the endpoint.
59073  *
59074  * Field Enumeration Values:
59075  *
59076  * Enum | Value | Description
59077  * :-------------------------------------|:------|:------------------
59078  * ALT_USB_DEV_DIEPINT1_BBLEERR_E_INACT | 0x0 | No interrupt
59079  * ALT_USB_DEV_DIEPINT1_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
59080  *
59081  * Field Access Macros:
59082  *
59083  */
59084 /*
59085  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_BBLEERR
59086  *
59087  * No interrupt
59088  */
59089 #define ALT_USB_DEV_DIEPINT1_BBLEERR_E_INACT 0x0
59090 /*
59091  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_BBLEERR
59092  *
59093  * BbleErr interrupt
59094  */
59095 #define ALT_USB_DEV_DIEPINT1_BBLEERR_E_ACT 0x1
59096 
59097 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_BBLEERR register field. */
59098 #define ALT_USB_DEV_DIEPINT1_BBLEERR_LSB 12
59099 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_BBLEERR register field. */
59100 #define ALT_USB_DEV_DIEPINT1_BBLEERR_MSB 12
59101 /* The width in bits of the ALT_USB_DEV_DIEPINT1_BBLEERR register field. */
59102 #define ALT_USB_DEV_DIEPINT1_BBLEERR_WIDTH 1
59103 /* The mask used to set the ALT_USB_DEV_DIEPINT1_BBLEERR register field value. */
59104 #define ALT_USB_DEV_DIEPINT1_BBLEERR_SET_MSK 0x00001000
59105 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_BBLEERR register field value. */
59106 #define ALT_USB_DEV_DIEPINT1_BBLEERR_CLR_MSK 0xffffefff
59107 /* The reset value of the ALT_USB_DEV_DIEPINT1_BBLEERR register field. */
59108 #define ALT_USB_DEV_DIEPINT1_BBLEERR_RESET 0x0
59109 /* Extracts the ALT_USB_DEV_DIEPINT1_BBLEERR field value from a register. */
59110 #define ALT_USB_DEV_DIEPINT1_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
59111 /* Produces a ALT_USB_DEV_DIEPINT1_BBLEERR register field value suitable for setting the register. */
59112 #define ALT_USB_DEV_DIEPINT1_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
59113 
59114 /*
59115  * Field : NAK Interrupt - nakintrpt
59116  *
59117  * The core generates this interrupt when a NAK is transmitted or received by the
59118  * device. In case of isochronous IN endpoints the interrupt gets generated when a
59119  * zero length packet is transmitted due to un-availability of data in the TXFifo.
59120  *
59121  * Field Enumeration Values:
59122  *
59123  * Enum | Value | Description
59124  * :---------------------------------------|:------|:--------------
59125  * ALT_USB_DEV_DIEPINT1_NAKINTRPT_E_INACT | 0x0 | No interrupt
59126  * ALT_USB_DEV_DIEPINT1_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
59127  *
59128  * Field Access Macros:
59129  *
59130  */
59131 /*
59132  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_NAKINTRPT
59133  *
59134  * No interrupt
59135  */
59136 #define ALT_USB_DEV_DIEPINT1_NAKINTRPT_E_INACT 0x0
59137 /*
59138  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_NAKINTRPT
59139  *
59140  * NAK Interrupt
59141  */
59142 #define ALT_USB_DEV_DIEPINT1_NAKINTRPT_E_ACT 0x1
59143 
59144 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_NAKINTRPT register field. */
59145 #define ALT_USB_DEV_DIEPINT1_NAKINTRPT_LSB 13
59146 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_NAKINTRPT register field. */
59147 #define ALT_USB_DEV_DIEPINT1_NAKINTRPT_MSB 13
59148 /* The width in bits of the ALT_USB_DEV_DIEPINT1_NAKINTRPT register field. */
59149 #define ALT_USB_DEV_DIEPINT1_NAKINTRPT_WIDTH 1
59150 /* The mask used to set the ALT_USB_DEV_DIEPINT1_NAKINTRPT register field value. */
59151 #define ALT_USB_DEV_DIEPINT1_NAKINTRPT_SET_MSK 0x00002000
59152 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_NAKINTRPT register field value. */
59153 #define ALT_USB_DEV_DIEPINT1_NAKINTRPT_CLR_MSK 0xffffdfff
59154 /* The reset value of the ALT_USB_DEV_DIEPINT1_NAKINTRPT register field. */
59155 #define ALT_USB_DEV_DIEPINT1_NAKINTRPT_RESET 0x0
59156 /* Extracts the ALT_USB_DEV_DIEPINT1_NAKINTRPT field value from a register. */
59157 #define ALT_USB_DEV_DIEPINT1_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
59158 /* Produces a ALT_USB_DEV_DIEPINT1_NAKINTRPT register field value suitable for setting the register. */
59159 #define ALT_USB_DEV_DIEPINT1_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
59160 
59161 /*
59162  * Field : NYET Interrupt - nyetintrpt
59163  *
59164  * The core generates this interrupt when a NYET response is transmitted for a non
59165  * isochronous OUT endpoint.
59166  *
59167  * Field Enumeration Values:
59168  *
59169  * Enum | Value | Description
59170  * :----------------------------------------|:------|:---------------
59171  * ALT_USB_DEV_DIEPINT1_NYETINTRPT_E_INACT | 0x0 | No interrupt
59172  * ALT_USB_DEV_DIEPINT1_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
59173  *
59174  * Field Access Macros:
59175  *
59176  */
59177 /*
59178  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_NYETINTRPT
59179  *
59180  * No interrupt
59181  */
59182 #define ALT_USB_DEV_DIEPINT1_NYETINTRPT_E_INACT 0x0
59183 /*
59184  * Enumerated value for register field ALT_USB_DEV_DIEPINT1_NYETINTRPT
59185  *
59186  * NYET Interrupt
59187  */
59188 #define ALT_USB_DEV_DIEPINT1_NYETINTRPT_E_ACT 0x1
59189 
59190 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT1_NYETINTRPT register field. */
59191 #define ALT_USB_DEV_DIEPINT1_NYETINTRPT_LSB 14
59192 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT1_NYETINTRPT register field. */
59193 #define ALT_USB_DEV_DIEPINT1_NYETINTRPT_MSB 14
59194 /* The width in bits of the ALT_USB_DEV_DIEPINT1_NYETINTRPT register field. */
59195 #define ALT_USB_DEV_DIEPINT1_NYETINTRPT_WIDTH 1
59196 /* The mask used to set the ALT_USB_DEV_DIEPINT1_NYETINTRPT register field value. */
59197 #define ALT_USB_DEV_DIEPINT1_NYETINTRPT_SET_MSK 0x00004000
59198 /* The mask used to clear the ALT_USB_DEV_DIEPINT1_NYETINTRPT register field value. */
59199 #define ALT_USB_DEV_DIEPINT1_NYETINTRPT_CLR_MSK 0xffffbfff
59200 /* The reset value of the ALT_USB_DEV_DIEPINT1_NYETINTRPT register field. */
59201 #define ALT_USB_DEV_DIEPINT1_NYETINTRPT_RESET 0x0
59202 /* Extracts the ALT_USB_DEV_DIEPINT1_NYETINTRPT field value from a register. */
59203 #define ALT_USB_DEV_DIEPINT1_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
59204 /* Produces a ALT_USB_DEV_DIEPINT1_NYETINTRPT register field value suitable for setting the register. */
59205 #define ALT_USB_DEV_DIEPINT1_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
59206 
59207 #ifndef __ASSEMBLY__
59208 /*
59209  * WARNING: The C register and register group struct declarations are provided for
59210  * convenience and illustrative purposes. They should, however, be used with
59211  * caution as the C language standard provides no guarantees about the alignment or
59212  * atomicity of device memory accesses. The recommended practice for writing
59213  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
59214  * alt_write_word() functions.
59215  *
59216  * The struct declaration for register ALT_USB_DEV_DIEPINT1.
59217  */
59218 struct ALT_USB_DEV_DIEPINT1_s
59219 {
59220  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
59221  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
59222  const uint32_t ahberr : 1; /* AHB Error */
59223  const uint32_t timeout : 1; /* Timeout Condition */
59224  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
59225  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
59226  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
59227  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
59228  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
59229  const uint32_t bnaintr : 1; /* BNA Interrupt */
59230  uint32_t : 1; /* *UNDEFINED* */
59231  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
59232  const uint32_t bbleerr : 1; /* BbleErr Interrupt ( */
59233  const uint32_t nakintrpt : 1; /* NAK Interrupt */
59234  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
59235  uint32_t : 17; /* *UNDEFINED* */
59236 };
59237 
59238 /* The typedef declaration for register ALT_USB_DEV_DIEPINT1. */
59239 typedef volatile struct ALT_USB_DEV_DIEPINT1_s ALT_USB_DEV_DIEPINT1_t;
59240 #endif /* __ASSEMBLY__ */
59241 
59242 /* The byte offset of the ALT_USB_DEV_DIEPINT1 register from the beginning of the component. */
59243 #define ALT_USB_DEV_DIEPINT1_OFST 0x128
59244 /* The address of the ALT_USB_DEV_DIEPINT1 register. */
59245 #define ALT_USB_DEV_DIEPINT1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT1_OFST))
59246 
59247 /*
59248  * Register : Device IN Endpoint 1 Transfer Size Register - dieptsiz1
59249  *
59250  * The application must modify this register before enabling the endpoint. Once the
59251  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
59252  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
59253  * application can only read this register once the core has cleared the Endpoint
59254  * Enable bit.
59255  *
59256  * Register Layout
59257  *
59258  * Bits | Access | Reset | Description
59259  * :--------|:-------|:------|:----------------------------
59260  * [18:0] | RW | 0x0 | Transfer Size
59261  * [28:19] | RW | 0x0 | Packet Count
59262  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
59263  * [31] | ??? | 0x0 | *UNDEFINED*
59264  *
59265  */
59266 /*
59267  * Field : Transfer Size - xfersize
59268  *
59269  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
59270  * application only after it has exhausted the transfer size amount of data. The
59271  * transfer size can be Set to the maximum packet size of the endpoint, to be
59272  * interrupted at the end of each packet. The core decrements this field every time
59273  * a packet from the external memory is written to the TxFIFO.
59274  *
59275  * Field Access Macros:
59276  *
59277  */
59278 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ1_XFERSIZE register field. */
59279 #define ALT_USB_DEV_DIEPTSIZ1_XFERSIZE_LSB 0
59280 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ1_XFERSIZE register field. */
59281 #define ALT_USB_DEV_DIEPTSIZ1_XFERSIZE_MSB 18
59282 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ1_XFERSIZE register field. */
59283 #define ALT_USB_DEV_DIEPTSIZ1_XFERSIZE_WIDTH 19
59284 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ1_XFERSIZE register field value. */
59285 #define ALT_USB_DEV_DIEPTSIZ1_XFERSIZE_SET_MSK 0x0007ffff
59286 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ1_XFERSIZE register field value. */
59287 #define ALT_USB_DEV_DIEPTSIZ1_XFERSIZE_CLR_MSK 0xfff80000
59288 /* The reset value of the ALT_USB_DEV_DIEPTSIZ1_XFERSIZE register field. */
59289 #define ALT_USB_DEV_DIEPTSIZ1_XFERSIZE_RESET 0x0
59290 /* Extracts the ALT_USB_DEV_DIEPTSIZ1_XFERSIZE field value from a register. */
59291 #define ALT_USB_DEV_DIEPTSIZ1_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
59292 /* Produces a ALT_USB_DEV_DIEPTSIZ1_XFERSIZE register field value suitable for setting the register. */
59293 #define ALT_USB_DEV_DIEPTSIZ1_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
59294 
59295 /*
59296  * Field : Packet Count - PktCnt
59297  *
59298  * Indicates the total number of USB packets that constitute the Transfer Size
59299  * amount of data for endpoint 0.This field is decremented every time a packet
59300  * (maximum size or short packet) is read from the TxFIFO.
59301  *
59302  * Field Access Macros:
59303  *
59304  */
59305 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ1_PKTCNT register field. */
59306 #define ALT_USB_DEV_DIEPTSIZ1_PKTCNT_LSB 19
59307 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ1_PKTCNT register field. */
59308 #define ALT_USB_DEV_DIEPTSIZ1_PKTCNT_MSB 28
59309 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ1_PKTCNT register field. */
59310 #define ALT_USB_DEV_DIEPTSIZ1_PKTCNT_WIDTH 10
59311 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ1_PKTCNT register field value. */
59312 #define ALT_USB_DEV_DIEPTSIZ1_PKTCNT_SET_MSK 0x1ff80000
59313 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ1_PKTCNT register field value. */
59314 #define ALT_USB_DEV_DIEPTSIZ1_PKTCNT_CLR_MSK 0xe007ffff
59315 /* The reset value of the ALT_USB_DEV_DIEPTSIZ1_PKTCNT register field. */
59316 #define ALT_USB_DEV_DIEPTSIZ1_PKTCNT_RESET 0x0
59317 /* Extracts the ALT_USB_DEV_DIEPTSIZ1_PKTCNT field value from a register. */
59318 #define ALT_USB_DEV_DIEPTSIZ1_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
59319 /* Produces a ALT_USB_DEV_DIEPTSIZ1_PKTCNT register field value suitable for setting the register. */
59320 #define ALT_USB_DEV_DIEPTSIZ1_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
59321 
59322 /*
59323  * Field : Applies to IN endpoints onl - mc
59324  *
59325  * for periodic IN endpoints, this field indicates the number of packets that must
59326  * be transmitted per microframe on the USB. The core uses this field to calculate
59327  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
59328  * field is valid only in Internal DMA mode. It specifies the number of packets the
59329  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
59330  * by the Next Endpoint field of the Device Endpoint-n Control register
59331  * (DIEPCTLn.NextEp)
59332  *
59333  * Field Enumeration Values:
59334  *
59335  * Enum | Value | Description
59336  * :------------------------------------|:------|:------------
59337  * ALT_USB_DEV_DIEPTSIZ1_MC_E_PKTONE | 0x1 | 1 packet
59338  * ALT_USB_DEV_DIEPTSIZ1_MC_E_PKTTWO | 0x2 | 2 packets
59339  * ALT_USB_DEV_DIEPTSIZ1_MC_E_PKTTHREE | 0x3 | 3 packets
59340  *
59341  * Field Access Macros:
59342  *
59343  */
59344 /*
59345  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ1_MC
59346  *
59347  * 1 packet
59348  */
59349 #define ALT_USB_DEV_DIEPTSIZ1_MC_E_PKTONE 0x1
59350 /*
59351  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ1_MC
59352  *
59353  * 2 packets
59354  */
59355 #define ALT_USB_DEV_DIEPTSIZ1_MC_E_PKTTWO 0x2
59356 /*
59357  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ1_MC
59358  *
59359  * 3 packets
59360  */
59361 #define ALT_USB_DEV_DIEPTSIZ1_MC_E_PKTTHREE 0x3
59362 
59363 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ1_MC register field. */
59364 #define ALT_USB_DEV_DIEPTSIZ1_MC_LSB 29
59365 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ1_MC register field. */
59366 #define ALT_USB_DEV_DIEPTSIZ1_MC_MSB 30
59367 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ1_MC register field. */
59368 #define ALT_USB_DEV_DIEPTSIZ1_MC_WIDTH 2
59369 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ1_MC register field value. */
59370 #define ALT_USB_DEV_DIEPTSIZ1_MC_SET_MSK 0x60000000
59371 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ1_MC register field value. */
59372 #define ALT_USB_DEV_DIEPTSIZ1_MC_CLR_MSK 0x9fffffff
59373 /* The reset value of the ALT_USB_DEV_DIEPTSIZ1_MC register field. */
59374 #define ALT_USB_DEV_DIEPTSIZ1_MC_RESET 0x0
59375 /* Extracts the ALT_USB_DEV_DIEPTSIZ1_MC field value from a register. */
59376 #define ALT_USB_DEV_DIEPTSIZ1_MC_GET(value) (((value) & 0x60000000) >> 29)
59377 /* Produces a ALT_USB_DEV_DIEPTSIZ1_MC register field value suitable for setting the register. */
59378 #define ALT_USB_DEV_DIEPTSIZ1_MC_SET(value) (((value) << 29) & 0x60000000)
59379 
59380 #ifndef __ASSEMBLY__
59381 /*
59382  * WARNING: The C register and register group struct declarations are provided for
59383  * convenience and illustrative purposes. They should, however, be used with
59384  * caution as the C language standard provides no guarantees about the alignment or
59385  * atomicity of device memory accesses. The recommended practice for writing
59386  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
59387  * alt_write_word() functions.
59388  *
59389  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ1.
59390  */
59391 struct ALT_USB_DEV_DIEPTSIZ1_s
59392 {
59393  uint32_t xfersize : 19; /* Transfer Size */
59394  uint32_t PktCnt : 10; /* Packet Count */
59395  uint32_t mc : 2; /* Applies to IN endpoints onl */
59396  uint32_t : 1; /* *UNDEFINED* */
59397 };
59398 
59399 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ1. */
59400 typedef volatile struct ALT_USB_DEV_DIEPTSIZ1_s ALT_USB_DEV_DIEPTSIZ1_t;
59401 #endif /* __ASSEMBLY__ */
59402 
59403 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ1 register from the beginning of the component. */
59404 #define ALT_USB_DEV_DIEPTSIZ1_OFST 0x130
59405 /* The address of the ALT_USB_DEV_DIEPTSIZ1 register. */
59406 #define ALT_USB_DEV_DIEPTSIZ1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ1_OFST))
59407 
59408 /*
59409  * Register : Device IN Endpoint 1 DMA Address Registe - diepdma1
59410  *
59411  * DMA Addressing.
59412  *
59413  * Register Layout
59414  *
59415  * Bits | Access | Reset | Description
59416  * :-------|:-------|:--------|:------------
59417  * [31:0] | RW | Unknown | DMA Address
59418  *
59419  */
59420 /*
59421  * Field : DMA Address - diepdma1
59422  *
59423  * Holds the start address of the external memory for storing or fetching endpoint
59424  * data. for control endpoints, this field stores control OUT data packets as well
59425  * as SETUP transaction data packets. When more than three SETUP packets are
59426  * received back-to-back, the SETUP data packet in the memory is overwritten. This
59427  * register is incremented on every AHB transaction. The application can give only
59428  * a DWORD-aligned address.
59429  *
59430  * When Scatter/Gather DMA mode is not enabled, the application programs the start
59431  * address value in this field.
59432  *
59433  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
59434  * for the descriptor list.
59435  *
59436  * Field Access Macros:
59437  *
59438  */
59439 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA1_DIEPDMA1 register field. */
59440 #define ALT_USB_DEV_DIEPDMA1_DIEPDMA1_LSB 0
59441 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA1_DIEPDMA1 register field. */
59442 #define ALT_USB_DEV_DIEPDMA1_DIEPDMA1_MSB 31
59443 /* The width in bits of the ALT_USB_DEV_DIEPDMA1_DIEPDMA1 register field. */
59444 #define ALT_USB_DEV_DIEPDMA1_DIEPDMA1_WIDTH 32
59445 /* The mask used to set the ALT_USB_DEV_DIEPDMA1_DIEPDMA1 register field value. */
59446 #define ALT_USB_DEV_DIEPDMA1_DIEPDMA1_SET_MSK 0xffffffff
59447 /* The mask used to clear the ALT_USB_DEV_DIEPDMA1_DIEPDMA1 register field value. */
59448 #define ALT_USB_DEV_DIEPDMA1_DIEPDMA1_CLR_MSK 0x00000000
59449 /* The reset value of the ALT_USB_DEV_DIEPDMA1_DIEPDMA1 register field is UNKNOWN. */
59450 #define ALT_USB_DEV_DIEPDMA1_DIEPDMA1_RESET 0x0
59451 /* Extracts the ALT_USB_DEV_DIEPDMA1_DIEPDMA1 field value from a register. */
59452 #define ALT_USB_DEV_DIEPDMA1_DIEPDMA1_GET(value) (((value) & 0xffffffff) >> 0)
59453 /* Produces a ALT_USB_DEV_DIEPDMA1_DIEPDMA1 register field value suitable for setting the register. */
59454 #define ALT_USB_DEV_DIEPDMA1_DIEPDMA1_SET(value) (((value) << 0) & 0xffffffff)
59455 
59456 #ifndef __ASSEMBLY__
59457 /*
59458  * WARNING: The C register and register group struct declarations are provided for
59459  * convenience and illustrative purposes. They should, however, be used with
59460  * caution as the C language standard provides no guarantees about the alignment or
59461  * atomicity of device memory accesses. The recommended practice for writing
59462  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
59463  * alt_write_word() functions.
59464  *
59465  * The struct declaration for register ALT_USB_DEV_DIEPDMA1.
59466  */
59467 struct ALT_USB_DEV_DIEPDMA1_s
59468 {
59469  uint32_t diepdma1 : 32; /* DMA Address */
59470 };
59471 
59472 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA1. */
59473 typedef volatile struct ALT_USB_DEV_DIEPDMA1_s ALT_USB_DEV_DIEPDMA1_t;
59474 #endif /* __ASSEMBLY__ */
59475 
59476 /* The byte offset of the ALT_USB_DEV_DIEPDMA1 register from the beginning of the component. */
59477 #define ALT_USB_DEV_DIEPDMA1_OFST 0x134
59478 /* The address of the ALT_USB_DEV_DIEPDMA1 register. */
59479 #define ALT_USB_DEV_DIEPDMA1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA1_OFST))
59480 
59481 /*
59482  * Register : Device IN Endpoint Transmit FIFO Status Register 1 - dtxfsts1
59483  *
59484  * This register contains the free space information for the Device IN endpoint
59485  * TxFIFO.
59486  *
59487  * Register Layout
59488  *
59489  * Bits | Access | Reset | Description
59490  * :--------|:-------|:-------|:-------------------------------
59491  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
59492  * [31:16] | ??? | 0x0 | *UNDEFINED*
59493  *
59494  */
59495 /*
59496  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
59497  *
59498  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
59499  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
59500  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
59501  * 32,768 words available Others: Reserved
59502  *
59503  * Field Access Macros:
59504  *
59505  */
59506 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL register field. */
59507 #define ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL_LSB 0
59508 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL register field. */
59509 #define ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL_MSB 15
59510 /* The width in bits of the ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL register field. */
59511 #define ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL_WIDTH 16
59512 /* The mask used to set the ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL register field value. */
59513 #define ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
59514 /* The mask used to clear the ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL register field value. */
59515 #define ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
59516 /* The reset value of the ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL register field. */
59517 #define ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL_RESET 0x2000
59518 /* Extracts the ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL field value from a register. */
59519 #define ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
59520 /* Produces a ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL register field value suitable for setting the register. */
59521 #define ALT_USB_DEV_DTXFSTS1_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
59522 
59523 #ifndef __ASSEMBLY__
59524 /*
59525  * WARNING: The C register and register group struct declarations are provided for
59526  * convenience and illustrative purposes. They should, however, be used with
59527  * caution as the C language standard provides no guarantees about the alignment or
59528  * atomicity of device memory accesses. The recommended practice for writing
59529  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
59530  * alt_write_word() functions.
59531  *
59532  * The struct declaration for register ALT_USB_DEV_DTXFSTS1.
59533  */
59534 struct ALT_USB_DEV_DTXFSTS1_s
59535 {
59536  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
59537  uint32_t : 16; /* *UNDEFINED* */
59538 };
59539 
59540 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS1. */
59541 typedef volatile struct ALT_USB_DEV_DTXFSTS1_s ALT_USB_DEV_DTXFSTS1_t;
59542 #endif /* __ASSEMBLY__ */
59543 
59544 /* The byte offset of the ALT_USB_DEV_DTXFSTS1 register from the beginning of the component. */
59545 #define ALT_USB_DEV_DTXFSTS1_OFST 0x138
59546 /* The address of the ALT_USB_DEV_DTXFSTS1 register. */
59547 #define ALT_USB_DEV_DTXFSTS1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS1_OFST))
59548 
59549 /*
59550  * Register : Device IN Endpoint 1 DMA Buffer Address Register - diepdmab1
59551  *
59552  * DMA Buffer Address.
59553  *
59554  * Register Layout
59555  *
59556  * Bits | Access | Reset | Description
59557  * :-------|:-------|:--------|:-------------------
59558  * [31:0] | R | Unknown | DMA Buffer Address
59559  *
59560  */
59561 /*
59562  * Field : DMA Buffer Address - diepdmab1
59563  *
59564  * Holds the current buffer address. This register is updated as and when the data
59565  * transfer for the corresponding end point is in progress. This register is
59566  * present only in Scatter/Gather DMA mode.
59567  *
59568  * Field Access Macros:
59569  *
59570  */
59571 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1 register field. */
59572 #define ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1_LSB 0
59573 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1 register field. */
59574 #define ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1_MSB 31
59575 /* The width in bits of the ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1 register field. */
59576 #define ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1_WIDTH 32
59577 /* The mask used to set the ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1 register field value. */
59578 #define ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1_SET_MSK 0xffffffff
59579 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1 register field value. */
59580 #define ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1_CLR_MSK 0x00000000
59581 /* The reset value of the ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1 register field is UNKNOWN. */
59582 #define ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1_RESET 0x0
59583 /* Extracts the ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1 field value from a register. */
59584 #define ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1_GET(value) (((value) & 0xffffffff) >> 0)
59585 /* Produces a ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1 register field value suitable for setting the register. */
59586 #define ALT_USB_DEV_DIEPDMAB1_DIEPDMAB1_SET(value) (((value) << 0) & 0xffffffff)
59587 
59588 #ifndef __ASSEMBLY__
59589 /*
59590  * WARNING: The C register and register group struct declarations are provided for
59591  * convenience and illustrative purposes. They should, however, be used with
59592  * caution as the C language standard provides no guarantees about the alignment or
59593  * atomicity of device memory accesses. The recommended practice for writing
59594  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
59595  * alt_write_word() functions.
59596  *
59597  * The struct declaration for register ALT_USB_DEV_DIEPDMAB1.
59598  */
59599 struct ALT_USB_DEV_DIEPDMAB1_s
59600 {
59601  const uint32_t diepdmab1 : 32; /* DMA Buffer Address */
59602 };
59603 
59604 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB1. */
59605 typedef volatile struct ALT_USB_DEV_DIEPDMAB1_s ALT_USB_DEV_DIEPDMAB1_t;
59606 #endif /* __ASSEMBLY__ */
59607 
59608 /* The byte offset of the ALT_USB_DEV_DIEPDMAB1 register from the beginning of the component. */
59609 #define ALT_USB_DEV_DIEPDMAB1_OFST 0x13c
59610 /* The address of the ALT_USB_DEV_DIEPDMAB1 register. */
59611 #define ALT_USB_DEV_DIEPDMAB1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB1_OFST))
59612 
59613 /*
59614  * Register : Device Control IN Endpoint 2 Control Register - diepctl2
59615  *
59616  * Endpoint_number: 2
59617  *
59618  * Register Layout
59619  *
59620  * Bits | Access | Reset | Description
59621  * :--------|:-------|:------|:--------------------
59622  * [10:0] | RW | 0x0 | Maximum Packet Size
59623  * [14:11] | ??? | 0x0 | *UNDEFINED*
59624  * [15] | RW | 0x0 | USB Active Endpoint
59625  * [16] | R | 0x0 | Endpoint Data PID
59626  * [17] | R | 0x0 | NAK Status
59627  * [19:18] | RW | 0x0 | Endpoint Type
59628  * [20] | ??? | 0x0 | *UNDEFINED*
59629  * [21] | R | 0x0 | STALL Handshake
59630  * [25:22] | RW | 0x0 | TxFIFO Number
59631  * [26] | W | 0x0 | Clear NAK
59632  * [27] | W | 0x0 | Set NAK
59633  * [28] | W | 0x0 | Set DATA0 PID
59634  * [29] | W | 0x0 | Set DATA1 PID
59635  * [30] | R | 0x0 | Endpoint Disable
59636  * [31] | R | 0x0 | Endpoint Enable
59637  *
59638  */
59639 /*
59640  * Field : Maximum Packet Size - mps
59641  *
59642  * Applies to IN and OUT endpoints. The application must program this field with
59643  * the maximum packet size for the current logical endpoint. This value is in
59644  * bytes.
59645  *
59646  * Field Access Macros:
59647  *
59648  */
59649 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_MPS register field. */
59650 #define ALT_USB_DEV_DIEPCTL2_MPS_LSB 0
59651 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_MPS register field. */
59652 #define ALT_USB_DEV_DIEPCTL2_MPS_MSB 10
59653 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_MPS register field. */
59654 #define ALT_USB_DEV_DIEPCTL2_MPS_WIDTH 11
59655 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_MPS register field value. */
59656 #define ALT_USB_DEV_DIEPCTL2_MPS_SET_MSK 0x000007ff
59657 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_MPS register field value. */
59658 #define ALT_USB_DEV_DIEPCTL2_MPS_CLR_MSK 0xfffff800
59659 /* The reset value of the ALT_USB_DEV_DIEPCTL2_MPS register field. */
59660 #define ALT_USB_DEV_DIEPCTL2_MPS_RESET 0x0
59661 /* Extracts the ALT_USB_DEV_DIEPCTL2_MPS field value from a register. */
59662 #define ALT_USB_DEV_DIEPCTL2_MPS_GET(value) (((value) & 0x000007ff) >> 0)
59663 /* Produces a ALT_USB_DEV_DIEPCTL2_MPS register field value suitable for setting the register. */
59664 #define ALT_USB_DEV_DIEPCTL2_MPS_SET(value) (((value) << 0) & 0x000007ff)
59665 
59666 /*
59667  * Field : USB Active Endpoint - usbactep
59668  *
59669  * Indicates whether this endpoint is active in the current configuration and
59670  * interface. The core clears this bit for all endpoints (other than EP 0) after
59671  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
59672  * commands, the application must program endpoint registers accordingly and set
59673  * this bit.
59674  *
59675  * Field Enumeration Values:
59676  *
59677  * Enum | Value | Description
59678  * :-------------------------------------|:------|:--------------------
59679  * ALT_USB_DEV_DIEPCTL2_USBACTEP_E_DISD | 0x0 | Not Active
59680  * ALT_USB_DEV_DIEPCTL2_USBACTEP_E_END | 0x1 | USB Active Endpoint
59681  *
59682  * Field Access Macros:
59683  *
59684  */
59685 /*
59686  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_USBACTEP
59687  *
59688  * Not Active
59689  */
59690 #define ALT_USB_DEV_DIEPCTL2_USBACTEP_E_DISD 0x0
59691 /*
59692  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_USBACTEP
59693  *
59694  * USB Active Endpoint
59695  */
59696 #define ALT_USB_DEV_DIEPCTL2_USBACTEP_E_END 0x1
59697 
59698 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_USBACTEP register field. */
59699 #define ALT_USB_DEV_DIEPCTL2_USBACTEP_LSB 15
59700 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_USBACTEP register field. */
59701 #define ALT_USB_DEV_DIEPCTL2_USBACTEP_MSB 15
59702 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_USBACTEP register field. */
59703 #define ALT_USB_DEV_DIEPCTL2_USBACTEP_WIDTH 1
59704 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_USBACTEP register field value. */
59705 #define ALT_USB_DEV_DIEPCTL2_USBACTEP_SET_MSK 0x00008000
59706 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_USBACTEP register field value. */
59707 #define ALT_USB_DEV_DIEPCTL2_USBACTEP_CLR_MSK 0xffff7fff
59708 /* The reset value of the ALT_USB_DEV_DIEPCTL2_USBACTEP register field. */
59709 #define ALT_USB_DEV_DIEPCTL2_USBACTEP_RESET 0x0
59710 /* Extracts the ALT_USB_DEV_DIEPCTL2_USBACTEP field value from a register. */
59711 #define ALT_USB_DEV_DIEPCTL2_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
59712 /* Produces a ALT_USB_DEV_DIEPCTL2_USBACTEP register field value suitable for setting the register. */
59713 #define ALT_USB_DEV_DIEPCTL2_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
59714 
59715 /*
59716  * Field : Endpoint Data PID - dpid
59717  *
59718  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
59719  * packet to be received or transmitted on this endpoint. The application must
59720  * program the PID of the first packet to be received or transmitted on this
59721  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
59722  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
59723  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
59724  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
59725  * DMA mode:
59726  *
59727  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
59728  * number in which the core transmits/receives isochronous data for this endpoint.
59729  * The application must program the even/odd (micro) frame number in which it
59730  * intends to transmit/receive isochronous data for this endpoint using the
59731  * SetEvnFr and SetOddFr fields in this register.
59732  *
59733  * 0: Even (micro)frame
59734  *
59735  * 1: Odd (micro)frame
59736  *
59737  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
59738  * number in which to send data is provided in the transmit descriptor structure.
59739  * The frame in which data is received is updated in receive descriptor structure.
59740  *
59741  * Field Enumeration Values:
59742  *
59743  * Enum | Value | Description
59744  * :----------------------------------|:------|:-----------------------------
59745  * ALT_USB_DEV_DIEPCTL2_DPID_E_INACT | 0x0 | Endpoint Data PID not active
59746  * ALT_USB_DEV_DIEPCTL2_DPID_E_ACT | 0x1 | Endpoint Data PID active
59747  *
59748  * Field Access Macros:
59749  *
59750  */
59751 /*
59752  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_DPID
59753  *
59754  * Endpoint Data PID not active
59755  */
59756 #define ALT_USB_DEV_DIEPCTL2_DPID_E_INACT 0x0
59757 /*
59758  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_DPID
59759  *
59760  * Endpoint Data PID active
59761  */
59762 #define ALT_USB_DEV_DIEPCTL2_DPID_E_ACT 0x1
59763 
59764 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_DPID register field. */
59765 #define ALT_USB_DEV_DIEPCTL2_DPID_LSB 16
59766 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_DPID register field. */
59767 #define ALT_USB_DEV_DIEPCTL2_DPID_MSB 16
59768 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_DPID register field. */
59769 #define ALT_USB_DEV_DIEPCTL2_DPID_WIDTH 1
59770 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_DPID register field value. */
59771 #define ALT_USB_DEV_DIEPCTL2_DPID_SET_MSK 0x00010000
59772 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_DPID register field value. */
59773 #define ALT_USB_DEV_DIEPCTL2_DPID_CLR_MSK 0xfffeffff
59774 /* The reset value of the ALT_USB_DEV_DIEPCTL2_DPID register field. */
59775 #define ALT_USB_DEV_DIEPCTL2_DPID_RESET 0x0
59776 /* Extracts the ALT_USB_DEV_DIEPCTL2_DPID field value from a register. */
59777 #define ALT_USB_DEV_DIEPCTL2_DPID_GET(value) (((value) & 0x00010000) >> 16)
59778 /* Produces a ALT_USB_DEV_DIEPCTL2_DPID register field value suitable for setting the register. */
59779 #define ALT_USB_DEV_DIEPCTL2_DPID_SET(value) (((value) << 16) & 0x00010000)
59780 
59781 /*
59782  * Field : NAK Status - naksts
59783  *
59784  * When either the application or the core sets this bit:
59785  *
59786  * * The core stops receiving any data on an OUT endpoint, even if there is space
59787  * in the RxFIFO to accommodate the incoming packet.
59788  *
59789  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
59790  * IN endpoint, even if there data is available in the TxFIFO.
59791  *
59792  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
59793  * even if there data is available in the TxFIFO.
59794  *
59795  * Irrespective of this bit's setting, the core always responds to SETUP data
59796  * packets with an ACK handshake.
59797  *
59798  * Field Enumeration Values:
59799  *
59800  * Enum | Value | Description
59801  * :-------------------------------------|:------|:------------------------------------------------
59802  * ALT_USB_DEV_DIEPCTL2_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
59803  * : | | based on the FIFO status
59804  * ALT_USB_DEV_DIEPCTL2_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
59805  * : | | endpoint
59806  *
59807  * Field Access Macros:
59808  *
59809  */
59810 /*
59811  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_NAKSTS
59812  *
59813  * The core is transmitting non-NAK handshakes based on the FIFO status
59814  */
59815 #define ALT_USB_DEV_DIEPCTL2_NAKSTS_E_NONNAK 0x0
59816 /*
59817  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_NAKSTS
59818  *
59819  * The core is transmitting NAK handshakes on this endpoint
59820  */
59821 #define ALT_USB_DEV_DIEPCTL2_NAKSTS_E_NAK 0x1
59822 
59823 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_NAKSTS register field. */
59824 #define ALT_USB_DEV_DIEPCTL2_NAKSTS_LSB 17
59825 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_NAKSTS register field. */
59826 #define ALT_USB_DEV_DIEPCTL2_NAKSTS_MSB 17
59827 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_NAKSTS register field. */
59828 #define ALT_USB_DEV_DIEPCTL2_NAKSTS_WIDTH 1
59829 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_NAKSTS register field value. */
59830 #define ALT_USB_DEV_DIEPCTL2_NAKSTS_SET_MSK 0x00020000
59831 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_NAKSTS register field value. */
59832 #define ALT_USB_DEV_DIEPCTL2_NAKSTS_CLR_MSK 0xfffdffff
59833 /* The reset value of the ALT_USB_DEV_DIEPCTL2_NAKSTS register field. */
59834 #define ALT_USB_DEV_DIEPCTL2_NAKSTS_RESET 0x0
59835 /* Extracts the ALT_USB_DEV_DIEPCTL2_NAKSTS field value from a register. */
59836 #define ALT_USB_DEV_DIEPCTL2_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
59837 /* Produces a ALT_USB_DEV_DIEPCTL2_NAKSTS register field value suitable for setting the register. */
59838 #define ALT_USB_DEV_DIEPCTL2_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
59839 
59840 /*
59841  * Field : Endpoint Type - eptype
59842  *
59843  * This is the transfer type supported by this logical endpoint.
59844  *
59845  * Field Enumeration Values:
59846  *
59847  * Enum | Value | Description
59848  * :------------------------------------------|:------|:------------
59849  * ALT_USB_DEV_DIEPCTL2_EPTYPE_E_CTL | 0x0 | Control
59850  * ALT_USB_DEV_DIEPCTL2_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
59851  * ALT_USB_DEV_DIEPCTL2_EPTYPE_E_BULK | 0x2 | Bulk
59852  * ALT_USB_DEV_DIEPCTL2_EPTYPE_E_INTERRUP | 0x3 | Interrupt
59853  *
59854  * Field Access Macros:
59855  *
59856  */
59857 /*
59858  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_EPTYPE
59859  *
59860  * Control
59861  */
59862 #define ALT_USB_DEV_DIEPCTL2_EPTYPE_E_CTL 0x0
59863 /*
59864  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_EPTYPE
59865  *
59866  * Isochronous
59867  */
59868 #define ALT_USB_DEV_DIEPCTL2_EPTYPE_E_ISOCHRONOUS 0x1
59869 /*
59870  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_EPTYPE
59871  *
59872  * Bulk
59873  */
59874 #define ALT_USB_DEV_DIEPCTL2_EPTYPE_E_BULK 0x2
59875 /*
59876  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_EPTYPE
59877  *
59878  * Interrupt
59879  */
59880 #define ALT_USB_DEV_DIEPCTL2_EPTYPE_E_INTERRUP 0x3
59881 
59882 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_EPTYPE register field. */
59883 #define ALT_USB_DEV_DIEPCTL2_EPTYPE_LSB 18
59884 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_EPTYPE register field. */
59885 #define ALT_USB_DEV_DIEPCTL2_EPTYPE_MSB 19
59886 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_EPTYPE register field. */
59887 #define ALT_USB_DEV_DIEPCTL2_EPTYPE_WIDTH 2
59888 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_EPTYPE register field value. */
59889 #define ALT_USB_DEV_DIEPCTL2_EPTYPE_SET_MSK 0x000c0000
59890 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_EPTYPE register field value. */
59891 #define ALT_USB_DEV_DIEPCTL2_EPTYPE_CLR_MSK 0xfff3ffff
59892 /* The reset value of the ALT_USB_DEV_DIEPCTL2_EPTYPE register field. */
59893 #define ALT_USB_DEV_DIEPCTL2_EPTYPE_RESET 0x0
59894 /* Extracts the ALT_USB_DEV_DIEPCTL2_EPTYPE field value from a register. */
59895 #define ALT_USB_DEV_DIEPCTL2_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
59896 /* Produces a ALT_USB_DEV_DIEPCTL2_EPTYPE register field value suitable for setting the register. */
59897 #define ALT_USB_DEV_DIEPCTL2_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
59898 
59899 /*
59900  * Field : STALL Handshake - stall
59901  *
59902  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
59903  * application sets this bit to stall all tokens from the USB host to this
59904  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
59905  * along with this bit, the STALL bit takes priority. Only the application can
59906  * clear this bit, never the core. Applies to control endpoints only. The
59907  * application can only set this bit, and the core clears it, when a SETUP token is
59908  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
59909  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
59910  * of this bit's setting, the core always responds to SETUP data packets with an
59911  * ACK handshake.
59912  *
59913  * Field Enumeration Values:
59914  *
59915  * Enum | Value | Description
59916  * :-----------------------------------|:------|:----------------------------
59917  * ALT_USB_DEV_DIEPCTL2_STALL_E_INACT | 0x0 | STALL All Tokens not active
59918  * ALT_USB_DEV_DIEPCTL2_STALL_E_ACT | 0x1 | STALL All Tokens active
59919  *
59920  * Field Access Macros:
59921  *
59922  */
59923 /*
59924  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_STALL
59925  *
59926  * STALL All Tokens not active
59927  */
59928 #define ALT_USB_DEV_DIEPCTL2_STALL_E_INACT 0x0
59929 /*
59930  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_STALL
59931  *
59932  * STALL All Tokens active
59933  */
59934 #define ALT_USB_DEV_DIEPCTL2_STALL_E_ACT 0x1
59935 
59936 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_STALL register field. */
59937 #define ALT_USB_DEV_DIEPCTL2_STALL_LSB 21
59938 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_STALL register field. */
59939 #define ALT_USB_DEV_DIEPCTL2_STALL_MSB 21
59940 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_STALL register field. */
59941 #define ALT_USB_DEV_DIEPCTL2_STALL_WIDTH 1
59942 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_STALL register field value. */
59943 #define ALT_USB_DEV_DIEPCTL2_STALL_SET_MSK 0x00200000
59944 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_STALL register field value. */
59945 #define ALT_USB_DEV_DIEPCTL2_STALL_CLR_MSK 0xffdfffff
59946 /* The reset value of the ALT_USB_DEV_DIEPCTL2_STALL register field. */
59947 #define ALT_USB_DEV_DIEPCTL2_STALL_RESET 0x0
59948 /* Extracts the ALT_USB_DEV_DIEPCTL2_STALL field value from a register. */
59949 #define ALT_USB_DEV_DIEPCTL2_STALL_GET(value) (((value) & 0x00200000) >> 21)
59950 /* Produces a ALT_USB_DEV_DIEPCTL2_STALL register field value suitable for setting the register. */
59951 #define ALT_USB_DEV_DIEPCTL2_STALL_SET(value) (((value) << 21) & 0x00200000)
59952 
59953 /*
59954  * Field : TxFIFO Number - txfnum
59955  *
59956  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
59957  * endpoints must map this to the corresponding Periodic TxFIFO number.
59958  *
59959  * 4'h0: Non-Periodic TxFIFO
59960  *
59961  * Others: Specified Periodic TxFIFO.number
59962  *
59963  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
59964  * applications such as mass storage. The core treats an IN endpoint as a non-
59965  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
59966  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
59967  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
59968  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
59969  * This field is valid only for IN endpoints.
59970  *
59971  * Field Access Macros:
59972  *
59973  */
59974 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_TXFNUM register field. */
59975 #define ALT_USB_DEV_DIEPCTL2_TXFNUM_LSB 22
59976 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_TXFNUM register field. */
59977 #define ALT_USB_DEV_DIEPCTL2_TXFNUM_MSB 25
59978 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_TXFNUM register field. */
59979 #define ALT_USB_DEV_DIEPCTL2_TXFNUM_WIDTH 4
59980 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_TXFNUM register field value. */
59981 #define ALT_USB_DEV_DIEPCTL2_TXFNUM_SET_MSK 0x03c00000
59982 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_TXFNUM register field value. */
59983 #define ALT_USB_DEV_DIEPCTL2_TXFNUM_CLR_MSK 0xfc3fffff
59984 /* The reset value of the ALT_USB_DEV_DIEPCTL2_TXFNUM register field. */
59985 #define ALT_USB_DEV_DIEPCTL2_TXFNUM_RESET 0x0
59986 /* Extracts the ALT_USB_DEV_DIEPCTL2_TXFNUM field value from a register. */
59987 #define ALT_USB_DEV_DIEPCTL2_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
59988 /* Produces a ALT_USB_DEV_DIEPCTL2_TXFNUM register field value suitable for setting the register. */
59989 #define ALT_USB_DEV_DIEPCTL2_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
59990 
59991 /*
59992  * Field : Clear NAK - cnak
59993  *
59994  * A write to this bit clears the NAK bit for the endpoint.
59995  *
59996  * Field Enumeration Values:
59997  *
59998  * Enum | Value | Description
59999  * :----------------------------------|:------|:-------------
60000  * ALT_USB_DEV_DIEPCTL2_CNAK_E_INACT | 0x0 | No Clear NAK
60001  * ALT_USB_DEV_DIEPCTL2_CNAK_E_ACT | 0x1 | Clear NAK
60002  *
60003  * Field Access Macros:
60004  *
60005  */
60006 /*
60007  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_CNAK
60008  *
60009  * No Clear NAK
60010  */
60011 #define ALT_USB_DEV_DIEPCTL2_CNAK_E_INACT 0x0
60012 /*
60013  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_CNAK
60014  *
60015  * Clear NAK
60016  */
60017 #define ALT_USB_DEV_DIEPCTL2_CNAK_E_ACT 0x1
60018 
60019 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_CNAK register field. */
60020 #define ALT_USB_DEV_DIEPCTL2_CNAK_LSB 26
60021 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_CNAK register field. */
60022 #define ALT_USB_DEV_DIEPCTL2_CNAK_MSB 26
60023 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_CNAK register field. */
60024 #define ALT_USB_DEV_DIEPCTL2_CNAK_WIDTH 1
60025 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_CNAK register field value. */
60026 #define ALT_USB_DEV_DIEPCTL2_CNAK_SET_MSK 0x04000000
60027 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_CNAK register field value. */
60028 #define ALT_USB_DEV_DIEPCTL2_CNAK_CLR_MSK 0xfbffffff
60029 /* The reset value of the ALT_USB_DEV_DIEPCTL2_CNAK register field. */
60030 #define ALT_USB_DEV_DIEPCTL2_CNAK_RESET 0x0
60031 /* Extracts the ALT_USB_DEV_DIEPCTL2_CNAK field value from a register. */
60032 #define ALT_USB_DEV_DIEPCTL2_CNAK_GET(value) (((value) & 0x04000000) >> 26)
60033 /* Produces a ALT_USB_DEV_DIEPCTL2_CNAK register field value suitable for setting the register. */
60034 #define ALT_USB_DEV_DIEPCTL2_CNAK_SET(value) (((value) << 26) & 0x04000000)
60035 
60036 /*
60037  * Field : Set NAK - snak
60038  *
60039  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
60040  * application can control the transmission of NAK handshakes on an endpoint. The
60041  * core can also Set this bit for an endpoint after a SETUP packet is received on
60042  * that endpoint.
60043  *
60044  * Field Enumeration Values:
60045  *
60046  * Enum | Value | Description
60047  * :----------------------------------|:------|:------------
60048  * ALT_USB_DEV_DIEPCTL2_SNAK_E_INACT | 0x0 | No Set NAK
60049  * ALT_USB_DEV_DIEPCTL2_SNAK_E_ACT | 0x1 | Set NAK
60050  *
60051  * Field Access Macros:
60052  *
60053  */
60054 /*
60055  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_SNAK
60056  *
60057  * No Set NAK
60058  */
60059 #define ALT_USB_DEV_DIEPCTL2_SNAK_E_INACT 0x0
60060 /*
60061  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_SNAK
60062  *
60063  * Set NAK
60064  */
60065 #define ALT_USB_DEV_DIEPCTL2_SNAK_E_ACT 0x1
60066 
60067 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_SNAK register field. */
60068 #define ALT_USB_DEV_DIEPCTL2_SNAK_LSB 27
60069 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_SNAK register field. */
60070 #define ALT_USB_DEV_DIEPCTL2_SNAK_MSB 27
60071 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_SNAK register field. */
60072 #define ALT_USB_DEV_DIEPCTL2_SNAK_WIDTH 1
60073 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_SNAK register field value. */
60074 #define ALT_USB_DEV_DIEPCTL2_SNAK_SET_MSK 0x08000000
60075 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_SNAK register field value. */
60076 #define ALT_USB_DEV_DIEPCTL2_SNAK_CLR_MSK 0xf7ffffff
60077 /* The reset value of the ALT_USB_DEV_DIEPCTL2_SNAK register field. */
60078 #define ALT_USB_DEV_DIEPCTL2_SNAK_RESET 0x0
60079 /* Extracts the ALT_USB_DEV_DIEPCTL2_SNAK field value from a register. */
60080 #define ALT_USB_DEV_DIEPCTL2_SNAK_GET(value) (((value) & 0x08000000) >> 27)
60081 /* Produces a ALT_USB_DEV_DIEPCTL2_SNAK register field value suitable for setting the register. */
60082 #define ALT_USB_DEV_DIEPCTL2_SNAK_SET(value) (((value) << 27) & 0x08000000)
60083 
60084 /*
60085  * Field : Set DATA0 PID - setd0pid
60086  *
60087  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
60088  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
60089  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
60090  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
60091  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
60092  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
60093  * mode is enabled, this field is reserved. The frame number in which to send data
60094  * is in the transmit descriptor structure. The frame in which to receive data is
60095  * updated in receive descriptor structure.
60096  *
60097  * Field Enumeration Values:
60098  *
60099  * Enum | Value | Description
60100  * :-------------------------------------|:------|:----------------------------
60101  * ALT_USB_DEV_DIEPCTL2_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
60102  * ALT_USB_DEV_DIEPCTL2_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
60103  *
60104  * Field Access Macros:
60105  *
60106  */
60107 /*
60108  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_SETD0PID
60109  *
60110  * Disables Set DATA0 PID
60111  */
60112 #define ALT_USB_DEV_DIEPCTL2_SETD0PID_E_DISD 0x0
60113 /*
60114  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_SETD0PID
60115  *
60116  * Endpoint Data PID to DATA0)
60117  */
60118 #define ALT_USB_DEV_DIEPCTL2_SETD0PID_E_END 0x1
60119 
60120 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_SETD0PID register field. */
60121 #define ALT_USB_DEV_DIEPCTL2_SETD0PID_LSB 28
60122 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_SETD0PID register field. */
60123 #define ALT_USB_DEV_DIEPCTL2_SETD0PID_MSB 28
60124 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_SETD0PID register field. */
60125 #define ALT_USB_DEV_DIEPCTL2_SETD0PID_WIDTH 1
60126 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_SETD0PID register field value. */
60127 #define ALT_USB_DEV_DIEPCTL2_SETD0PID_SET_MSK 0x10000000
60128 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_SETD0PID register field value. */
60129 #define ALT_USB_DEV_DIEPCTL2_SETD0PID_CLR_MSK 0xefffffff
60130 /* The reset value of the ALT_USB_DEV_DIEPCTL2_SETD0PID register field. */
60131 #define ALT_USB_DEV_DIEPCTL2_SETD0PID_RESET 0x0
60132 /* Extracts the ALT_USB_DEV_DIEPCTL2_SETD0PID field value from a register. */
60133 #define ALT_USB_DEV_DIEPCTL2_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
60134 /* Produces a ALT_USB_DEV_DIEPCTL2_SETD0PID register field value suitable for setting the register. */
60135 #define ALT_USB_DEV_DIEPCTL2_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
60136 
60137 /*
60138  * Field : Set DATA1 PID - setd1pid
60139  *
60140  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
60141  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
60142  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
60143  *
60144  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
60145  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
60146  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
60147  *
60148  * Field Enumeration Values:
60149  *
60150  * Enum | Value | Description
60151  * :-------------------------------------|:------|:-----------------------
60152  * ALT_USB_DEV_DIEPCTL2_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
60153  * ALT_USB_DEV_DIEPCTL2_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
60154  *
60155  * Field Access Macros:
60156  *
60157  */
60158 /*
60159  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_SETD1PID
60160  *
60161  * Disables Set DATA1 PID
60162  */
60163 #define ALT_USB_DEV_DIEPCTL2_SETD1PID_E_DISD 0x0
60164 /*
60165  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_SETD1PID
60166  *
60167  * Enables Set DATA1 PID
60168  */
60169 #define ALT_USB_DEV_DIEPCTL2_SETD1PID_E_END 0x1
60170 
60171 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_SETD1PID register field. */
60172 #define ALT_USB_DEV_DIEPCTL2_SETD1PID_LSB 29
60173 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_SETD1PID register field. */
60174 #define ALT_USB_DEV_DIEPCTL2_SETD1PID_MSB 29
60175 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_SETD1PID register field. */
60176 #define ALT_USB_DEV_DIEPCTL2_SETD1PID_WIDTH 1
60177 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_SETD1PID register field value. */
60178 #define ALT_USB_DEV_DIEPCTL2_SETD1PID_SET_MSK 0x20000000
60179 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_SETD1PID register field value. */
60180 #define ALT_USB_DEV_DIEPCTL2_SETD1PID_CLR_MSK 0xdfffffff
60181 /* The reset value of the ALT_USB_DEV_DIEPCTL2_SETD1PID register field. */
60182 #define ALT_USB_DEV_DIEPCTL2_SETD1PID_RESET 0x0
60183 /* Extracts the ALT_USB_DEV_DIEPCTL2_SETD1PID field value from a register. */
60184 #define ALT_USB_DEV_DIEPCTL2_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
60185 /* Produces a ALT_USB_DEV_DIEPCTL2_SETD1PID register field value suitable for setting the register. */
60186 #define ALT_USB_DEV_DIEPCTL2_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
60187 
60188 /*
60189  * Field : Endpoint Disable - epdis
60190  *
60191  * Applies to IN and OUT endpoints. The application sets this bit to stop
60192  * transmitting/receiving data on an endpoint, even before the transfer for that
60193  * endpoint is complete. The application must wait for the Endpoint Disabled
60194  * interrupt before treating the endpoint as disabled. The core clears this bit
60195  * before setting the Endpoint Disabled interrupt. The application must set this
60196  * bit only if Endpoint Enable is already set for this endpoint.
60197  *
60198  * Field Enumeration Values:
60199  *
60200  * Enum | Value | Description
60201  * :-----------------------------------|:------|:--------------------
60202  * ALT_USB_DEV_DIEPCTL2_EPDIS_E_INACT | 0x0 | No Endpoint Disable
60203  * ALT_USB_DEV_DIEPCTL2_EPDIS_E_ACT | 0x1 | Endpoint Disable
60204  *
60205  * Field Access Macros:
60206  *
60207  */
60208 /*
60209  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_EPDIS
60210  *
60211  * No Endpoint Disable
60212  */
60213 #define ALT_USB_DEV_DIEPCTL2_EPDIS_E_INACT 0x0
60214 /*
60215  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_EPDIS
60216  *
60217  * Endpoint Disable
60218  */
60219 #define ALT_USB_DEV_DIEPCTL2_EPDIS_E_ACT 0x1
60220 
60221 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_EPDIS register field. */
60222 #define ALT_USB_DEV_DIEPCTL2_EPDIS_LSB 30
60223 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_EPDIS register field. */
60224 #define ALT_USB_DEV_DIEPCTL2_EPDIS_MSB 30
60225 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_EPDIS register field. */
60226 #define ALT_USB_DEV_DIEPCTL2_EPDIS_WIDTH 1
60227 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_EPDIS register field value. */
60228 #define ALT_USB_DEV_DIEPCTL2_EPDIS_SET_MSK 0x40000000
60229 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_EPDIS register field value. */
60230 #define ALT_USB_DEV_DIEPCTL2_EPDIS_CLR_MSK 0xbfffffff
60231 /* The reset value of the ALT_USB_DEV_DIEPCTL2_EPDIS register field. */
60232 #define ALT_USB_DEV_DIEPCTL2_EPDIS_RESET 0x0
60233 /* Extracts the ALT_USB_DEV_DIEPCTL2_EPDIS field value from a register. */
60234 #define ALT_USB_DEV_DIEPCTL2_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
60235 /* Produces a ALT_USB_DEV_DIEPCTL2_EPDIS register field value suitable for setting the register. */
60236 #define ALT_USB_DEV_DIEPCTL2_EPDIS_SET(value) (((value) << 30) & 0x40000000)
60237 
60238 /*
60239  * Field : Endpoint Enable - epena
60240  *
60241  * Applies to IN and OUT endpoints.
60242  *
60243  * * When Scatter/Gather DMA mode is enabled,
60244  *
60245  * * for IN endpoints this bit indicates that the descriptor structure and data
60246  * buffer with data ready to transmit is setup.
60247  *
60248  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
60249  * receive data is setup.
60250  *
60251  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
60252  * mode:
60253  *
60254  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
60255  * the endpoint.
60256  *
60257  * * for OUT endpoints, this bit indicates that the application has allocated the
60258  * memory to start receiving data from the USB.
60259  *
60260  * * The core clears this bit before setting any of the following interrupts on
60261  * this endpoint:
60262  *
60263  * * SETUP Phase Done
60264  *
60265  * * Endpoint Disabled
60266  *
60267  * * Transfer Completed
60268  *
60269  * for control endpoints in DMA mode, this bit must be set to be able to transfer
60270  * SETUP data packets in memory.
60271  *
60272  * Field Enumeration Values:
60273  *
60274  * Enum | Value | Description
60275  * :-----------------------------------|:------|:-------------------------
60276  * ALT_USB_DEV_DIEPCTL2_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
60277  * ALT_USB_DEV_DIEPCTL2_EPENA_E_ACT | 0x1 | Endpoint Enable active
60278  *
60279  * Field Access Macros:
60280  *
60281  */
60282 /*
60283  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_EPENA
60284  *
60285  * Endpoint Enable inactive
60286  */
60287 #define ALT_USB_DEV_DIEPCTL2_EPENA_E_INACT 0x0
60288 /*
60289  * Enumerated value for register field ALT_USB_DEV_DIEPCTL2_EPENA
60290  *
60291  * Endpoint Enable active
60292  */
60293 #define ALT_USB_DEV_DIEPCTL2_EPENA_E_ACT 0x1
60294 
60295 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL2_EPENA register field. */
60296 #define ALT_USB_DEV_DIEPCTL2_EPENA_LSB 31
60297 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL2_EPENA register field. */
60298 #define ALT_USB_DEV_DIEPCTL2_EPENA_MSB 31
60299 /* The width in bits of the ALT_USB_DEV_DIEPCTL2_EPENA register field. */
60300 #define ALT_USB_DEV_DIEPCTL2_EPENA_WIDTH 1
60301 /* The mask used to set the ALT_USB_DEV_DIEPCTL2_EPENA register field value. */
60302 #define ALT_USB_DEV_DIEPCTL2_EPENA_SET_MSK 0x80000000
60303 /* The mask used to clear the ALT_USB_DEV_DIEPCTL2_EPENA register field value. */
60304 #define ALT_USB_DEV_DIEPCTL2_EPENA_CLR_MSK 0x7fffffff
60305 /* The reset value of the ALT_USB_DEV_DIEPCTL2_EPENA register field. */
60306 #define ALT_USB_DEV_DIEPCTL2_EPENA_RESET 0x0
60307 /* Extracts the ALT_USB_DEV_DIEPCTL2_EPENA field value from a register. */
60308 #define ALT_USB_DEV_DIEPCTL2_EPENA_GET(value) (((value) & 0x80000000) >> 31)
60309 /* Produces a ALT_USB_DEV_DIEPCTL2_EPENA register field value suitable for setting the register. */
60310 #define ALT_USB_DEV_DIEPCTL2_EPENA_SET(value) (((value) << 31) & 0x80000000)
60311 
60312 #ifndef __ASSEMBLY__
60313 /*
60314  * WARNING: The C register and register group struct declarations are provided for
60315  * convenience and illustrative purposes. They should, however, be used with
60316  * caution as the C language standard provides no guarantees about the alignment or
60317  * atomicity of device memory accesses. The recommended practice for writing
60318  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
60319  * alt_write_word() functions.
60320  *
60321  * The struct declaration for register ALT_USB_DEV_DIEPCTL2.
60322  */
60323 struct ALT_USB_DEV_DIEPCTL2_s
60324 {
60325  uint32_t mps : 11; /* Maximum Packet Size */
60326  uint32_t : 4; /* *UNDEFINED* */
60327  uint32_t usbactep : 1; /* USB Active Endpoint */
60328  const uint32_t dpid : 1; /* Endpoint Data PID */
60329  const uint32_t naksts : 1; /* NAK Status */
60330  uint32_t eptype : 2; /* Endpoint Type */
60331  uint32_t : 1; /* *UNDEFINED* */
60332  const uint32_t stall : 1; /* STALL Handshake */
60333  uint32_t txfnum : 4; /* TxFIFO Number */
60334  uint32_t cnak : 1; /* Clear NAK */
60335  uint32_t snak : 1; /* Set NAK */
60336  uint32_t setd0pid : 1; /* Set DATA0 PID */
60337  uint32_t setd1pid : 1; /* Set DATA1 PID */
60338  const uint32_t epdis : 1; /* Endpoint Disable */
60339  const uint32_t epena : 1; /* Endpoint Enable */
60340 };
60341 
60342 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL2. */
60343 typedef volatile struct ALT_USB_DEV_DIEPCTL2_s ALT_USB_DEV_DIEPCTL2_t;
60344 #endif /* __ASSEMBLY__ */
60345 
60346 /* The byte offset of the ALT_USB_DEV_DIEPCTL2 register from the beginning of the component. */
60347 #define ALT_USB_DEV_DIEPCTL2_OFST 0x140
60348 /* The address of the ALT_USB_DEV_DIEPCTL2 register. */
60349 #define ALT_USB_DEV_DIEPCTL2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL2_OFST))
60350 
60351 /*
60352  * Register : Device IN Endpoint 2 Interrupt Register - diepint2
60353  *
60354  * This register indicates the status of an endpoint with respect to USB- and AHB-
60355  * related events. The application must read this register when the OUT Endpoints
60356  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
60357  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
60358  * can read this register, it must first read the Device All Endpoints Interrupt
60359  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
60360  * Interrupt register. The application must clear the appropriate bit in this
60361  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
60362  *
60363  * Register Layout
60364  *
60365  * Bits | Access | Reset | Description
60366  * :--------|:-------|:------|:---------------------------------------
60367  * [0] | R | 0x0 | Transfer Completed Interrupt
60368  * [1] | R | 0x0 | Endpoint Disabled Interrupt
60369  * [2] | R | 0x0 | AHB Error
60370  * [3] | R | 0x0 | Timeout Condition
60371  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
60372  * [5] | R | 0x0 | IN Token Received with EP Mismatch
60373  * [6] | R | 0x0 | IN Endpoint NAK Effective
60374  * [7] | R | 0x1 | Transmit FIFO Empty
60375  * [8] | R | 0x0 | Fifo Underrun
60376  * [9] | R | 0x0 | BNA Interrupt
60377  * [10] | ??? | 0x0 | *UNDEFINED*
60378  * [11] | R | 0x0 | Packet Drop Status
60379  * [12] | R | 0x0 | BbleErr Interrupt
60380  * [13] | R | 0x0 | NAK Interrupt
60381  * [14] | R | 0x0 | NYET Interrupt
60382  * [31:15] | ??? | 0x0 | *UNDEFINED*
60383  *
60384  */
60385 /*
60386  * Field : Transfer Completed Interrupt - xfercompl
60387  *
60388  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
60389  *
60390  * * for IN endpoint this field indicates that the requested data from the
60391  * descriptor is moved from external system memory to internal FIFO.
60392  *
60393  * * for OUT endpoint this field indicates that the requested data from the
60394  * internal FIFO is moved to external system memory. This interrupt is generated
60395  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
60396  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
60397  * this field indicates that the programmed transfer is complete on the AHB as
60398  * well as on the USB, for this endpoint.
60399  *
60400  * Field Enumeration Values:
60401  *
60402  * Enum | Value | Description
60403  * :---------------------------------------|:------|:-----------------------------
60404  * ALT_USB_DEV_DIEPINT2_XFERCOMPL_E_INACT | 0x0 | No Interrupt
60405  * ALT_USB_DEV_DIEPINT2_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
60406  *
60407  * Field Access Macros:
60408  *
60409  */
60410 /*
60411  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_XFERCOMPL
60412  *
60413  * No Interrupt
60414  */
60415 #define ALT_USB_DEV_DIEPINT2_XFERCOMPL_E_INACT 0x0
60416 /*
60417  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_XFERCOMPL
60418  *
60419  * Transfer Completed Interrupt
60420  */
60421 #define ALT_USB_DEV_DIEPINT2_XFERCOMPL_E_ACT 0x1
60422 
60423 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_XFERCOMPL register field. */
60424 #define ALT_USB_DEV_DIEPINT2_XFERCOMPL_LSB 0
60425 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_XFERCOMPL register field. */
60426 #define ALT_USB_DEV_DIEPINT2_XFERCOMPL_MSB 0
60427 /* The width in bits of the ALT_USB_DEV_DIEPINT2_XFERCOMPL register field. */
60428 #define ALT_USB_DEV_DIEPINT2_XFERCOMPL_WIDTH 1
60429 /* The mask used to set the ALT_USB_DEV_DIEPINT2_XFERCOMPL register field value. */
60430 #define ALT_USB_DEV_DIEPINT2_XFERCOMPL_SET_MSK 0x00000001
60431 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_XFERCOMPL register field value. */
60432 #define ALT_USB_DEV_DIEPINT2_XFERCOMPL_CLR_MSK 0xfffffffe
60433 /* The reset value of the ALT_USB_DEV_DIEPINT2_XFERCOMPL register field. */
60434 #define ALT_USB_DEV_DIEPINT2_XFERCOMPL_RESET 0x0
60435 /* Extracts the ALT_USB_DEV_DIEPINT2_XFERCOMPL field value from a register. */
60436 #define ALT_USB_DEV_DIEPINT2_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
60437 /* Produces a ALT_USB_DEV_DIEPINT2_XFERCOMPL register field value suitable for setting the register. */
60438 #define ALT_USB_DEV_DIEPINT2_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
60439 
60440 /*
60441  * Field : Endpoint Disabled Interrupt - epdisbld
60442  *
60443  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
60444  * disabled per the application's request.
60445  *
60446  * Field Enumeration Values:
60447  *
60448  * Enum | Value | Description
60449  * :--------------------------------------|:------|:----------------------------
60450  * ALT_USB_DEV_DIEPINT2_EPDISBLD_E_INACT | 0x0 | No Interrupt
60451  * ALT_USB_DEV_DIEPINT2_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
60452  *
60453  * Field Access Macros:
60454  *
60455  */
60456 /*
60457  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_EPDISBLD
60458  *
60459  * No Interrupt
60460  */
60461 #define ALT_USB_DEV_DIEPINT2_EPDISBLD_E_INACT 0x0
60462 /*
60463  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_EPDISBLD
60464  *
60465  * Endpoint Disabled Interrupt
60466  */
60467 #define ALT_USB_DEV_DIEPINT2_EPDISBLD_E_ACT 0x1
60468 
60469 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_EPDISBLD register field. */
60470 #define ALT_USB_DEV_DIEPINT2_EPDISBLD_LSB 1
60471 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_EPDISBLD register field. */
60472 #define ALT_USB_DEV_DIEPINT2_EPDISBLD_MSB 1
60473 /* The width in bits of the ALT_USB_DEV_DIEPINT2_EPDISBLD register field. */
60474 #define ALT_USB_DEV_DIEPINT2_EPDISBLD_WIDTH 1
60475 /* The mask used to set the ALT_USB_DEV_DIEPINT2_EPDISBLD register field value. */
60476 #define ALT_USB_DEV_DIEPINT2_EPDISBLD_SET_MSK 0x00000002
60477 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_EPDISBLD register field value. */
60478 #define ALT_USB_DEV_DIEPINT2_EPDISBLD_CLR_MSK 0xfffffffd
60479 /* The reset value of the ALT_USB_DEV_DIEPINT2_EPDISBLD register field. */
60480 #define ALT_USB_DEV_DIEPINT2_EPDISBLD_RESET 0x0
60481 /* Extracts the ALT_USB_DEV_DIEPINT2_EPDISBLD field value from a register. */
60482 #define ALT_USB_DEV_DIEPINT2_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
60483 /* Produces a ALT_USB_DEV_DIEPINT2_EPDISBLD register field value suitable for setting the register. */
60484 #define ALT_USB_DEV_DIEPINT2_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
60485 
60486 /*
60487  * Field : AHB Error - ahberr
60488  *
60489  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
60490  * there is an AHB error during an AHB read/write. The application can read the
60491  * corresponding endpoint DMA address register to get the error address.
60492  *
60493  * Field Enumeration Values:
60494  *
60495  * Enum | Value | Description
60496  * :------------------------------------|:------|:--------------------
60497  * ALT_USB_DEV_DIEPINT2_AHBERR_E_INACT | 0x0 | No Interrupt
60498  * ALT_USB_DEV_DIEPINT2_AHBERR_E_ACT | 0x1 | AHB Error interrupt
60499  *
60500  * Field Access Macros:
60501  *
60502  */
60503 /*
60504  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_AHBERR
60505  *
60506  * No Interrupt
60507  */
60508 #define ALT_USB_DEV_DIEPINT2_AHBERR_E_INACT 0x0
60509 /*
60510  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_AHBERR
60511  *
60512  * AHB Error interrupt
60513  */
60514 #define ALT_USB_DEV_DIEPINT2_AHBERR_E_ACT 0x1
60515 
60516 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_AHBERR register field. */
60517 #define ALT_USB_DEV_DIEPINT2_AHBERR_LSB 2
60518 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_AHBERR register field. */
60519 #define ALT_USB_DEV_DIEPINT2_AHBERR_MSB 2
60520 /* The width in bits of the ALT_USB_DEV_DIEPINT2_AHBERR register field. */
60521 #define ALT_USB_DEV_DIEPINT2_AHBERR_WIDTH 1
60522 /* The mask used to set the ALT_USB_DEV_DIEPINT2_AHBERR register field value. */
60523 #define ALT_USB_DEV_DIEPINT2_AHBERR_SET_MSK 0x00000004
60524 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_AHBERR register field value. */
60525 #define ALT_USB_DEV_DIEPINT2_AHBERR_CLR_MSK 0xfffffffb
60526 /* The reset value of the ALT_USB_DEV_DIEPINT2_AHBERR register field. */
60527 #define ALT_USB_DEV_DIEPINT2_AHBERR_RESET 0x0
60528 /* Extracts the ALT_USB_DEV_DIEPINT2_AHBERR field value from a register. */
60529 #define ALT_USB_DEV_DIEPINT2_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
60530 /* Produces a ALT_USB_DEV_DIEPINT2_AHBERR register field value suitable for setting the register. */
60531 #define ALT_USB_DEV_DIEPINT2_AHBERR_SET(value) (((value) << 2) & 0x00000004)
60532 
60533 /*
60534  * Field : Timeout Condition - timeout
60535  *
60536  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
60537  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
60538  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
60539  * detected a timeout condition on the USB for the last IN token on this endpoint.
60540  *
60541  * Field Enumeration Values:
60542  *
60543  * Enum | Value | Description
60544  * :---------------------------------|:------|:------------------
60545  * ALT_USB_DEV_DIEPINT2_TMO_E_INACT | 0x0 | No interrupt
60546  * ALT_USB_DEV_DIEPINT2_TMO_E_ACT | 0x1 | Timeout interrupy
60547  *
60548  * Field Access Macros:
60549  *
60550  */
60551 /*
60552  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_TMO
60553  *
60554  * No interrupt
60555  */
60556 #define ALT_USB_DEV_DIEPINT2_TMO_E_INACT 0x0
60557 /*
60558  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_TMO
60559  *
60560  * Timeout interrupy
60561  */
60562 #define ALT_USB_DEV_DIEPINT2_TMO_E_ACT 0x1
60563 
60564 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_TMO register field. */
60565 #define ALT_USB_DEV_DIEPINT2_TMO_LSB 3
60566 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_TMO register field. */
60567 #define ALT_USB_DEV_DIEPINT2_TMO_MSB 3
60568 /* The width in bits of the ALT_USB_DEV_DIEPINT2_TMO register field. */
60569 #define ALT_USB_DEV_DIEPINT2_TMO_WIDTH 1
60570 /* The mask used to set the ALT_USB_DEV_DIEPINT2_TMO register field value. */
60571 #define ALT_USB_DEV_DIEPINT2_TMO_SET_MSK 0x00000008
60572 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_TMO register field value. */
60573 #define ALT_USB_DEV_DIEPINT2_TMO_CLR_MSK 0xfffffff7
60574 /* The reset value of the ALT_USB_DEV_DIEPINT2_TMO register field. */
60575 #define ALT_USB_DEV_DIEPINT2_TMO_RESET 0x0
60576 /* Extracts the ALT_USB_DEV_DIEPINT2_TMO field value from a register. */
60577 #define ALT_USB_DEV_DIEPINT2_TMO_GET(value) (((value) & 0x00000008) >> 3)
60578 /* Produces a ALT_USB_DEV_DIEPINT2_TMO register field value suitable for setting the register. */
60579 #define ALT_USB_DEV_DIEPINT2_TMO_SET(value) (((value) << 3) & 0x00000008)
60580 
60581 /*
60582  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
60583  *
60584  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
60585  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
60586  * interrupt is asserted on the endpoint for which the IN token was received.
60587  *
60588  * Field Enumeration Values:
60589  *
60590  * Enum | Value | Description
60591  * :-----------------------------------------|:------|:----------------------------
60592  * ALT_USB_DEV_DIEPINT2_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
60593  * ALT_USB_DEV_DIEPINT2_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
60594  *
60595  * Field Access Macros:
60596  *
60597  */
60598 /*
60599  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_INTKNTXFEMP
60600  *
60601  * No interrupt
60602  */
60603 #define ALT_USB_DEV_DIEPINT2_INTKNTXFEMP_E_INACT 0x0
60604 /*
60605  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_INTKNTXFEMP
60606  *
60607  * IN Token Received Interrupt
60608  */
60609 #define ALT_USB_DEV_DIEPINT2_INTKNTXFEMP_E_ACT 0x1
60610 
60611 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_INTKNTXFEMP register field. */
60612 #define ALT_USB_DEV_DIEPINT2_INTKNTXFEMP_LSB 4
60613 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_INTKNTXFEMP register field. */
60614 #define ALT_USB_DEV_DIEPINT2_INTKNTXFEMP_MSB 4
60615 /* The width in bits of the ALT_USB_DEV_DIEPINT2_INTKNTXFEMP register field. */
60616 #define ALT_USB_DEV_DIEPINT2_INTKNTXFEMP_WIDTH 1
60617 /* The mask used to set the ALT_USB_DEV_DIEPINT2_INTKNTXFEMP register field value. */
60618 #define ALT_USB_DEV_DIEPINT2_INTKNTXFEMP_SET_MSK 0x00000010
60619 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_INTKNTXFEMP register field value. */
60620 #define ALT_USB_DEV_DIEPINT2_INTKNTXFEMP_CLR_MSK 0xffffffef
60621 /* The reset value of the ALT_USB_DEV_DIEPINT2_INTKNTXFEMP register field. */
60622 #define ALT_USB_DEV_DIEPINT2_INTKNTXFEMP_RESET 0x0
60623 /* Extracts the ALT_USB_DEV_DIEPINT2_INTKNTXFEMP field value from a register. */
60624 #define ALT_USB_DEV_DIEPINT2_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
60625 /* Produces a ALT_USB_DEV_DIEPINT2_INTKNTXFEMP register field value suitable for setting the register. */
60626 #define ALT_USB_DEV_DIEPINT2_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
60627 
60628 /*
60629  * Field : IN Token Received with EP Mismatch - intknepmis
60630  *
60631  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
60632  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
60633  * IN token was received. This interrupt is asserted on the endpoint for which the
60634  * IN token was received.
60635  *
60636  * Field Enumeration Values:
60637  *
60638  * Enum | Value | Description
60639  * :----------------------------------------|:------|:---------------------------------------------
60640  * ALT_USB_DEV_DIEPINT2_INTKNEPMIS_E_INACT | 0x0 | No interrupt
60641  * ALT_USB_DEV_DIEPINT2_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
60642  *
60643  * Field Access Macros:
60644  *
60645  */
60646 /*
60647  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_INTKNEPMIS
60648  *
60649  * No interrupt
60650  */
60651 #define ALT_USB_DEV_DIEPINT2_INTKNEPMIS_E_INACT 0x0
60652 /*
60653  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_INTKNEPMIS
60654  *
60655  * IN Token Received with EP Mismatch interrupt
60656  */
60657 #define ALT_USB_DEV_DIEPINT2_INTKNEPMIS_E_ACT 0x1
60658 
60659 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_INTKNEPMIS register field. */
60660 #define ALT_USB_DEV_DIEPINT2_INTKNEPMIS_LSB 5
60661 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_INTKNEPMIS register field. */
60662 #define ALT_USB_DEV_DIEPINT2_INTKNEPMIS_MSB 5
60663 /* The width in bits of the ALT_USB_DEV_DIEPINT2_INTKNEPMIS register field. */
60664 #define ALT_USB_DEV_DIEPINT2_INTKNEPMIS_WIDTH 1
60665 /* The mask used to set the ALT_USB_DEV_DIEPINT2_INTKNEPMIS register field value. */
60666 #define ALT_USB_DEV_DIEPINT2_INTKNEPMIS_SET_MSK 0x00000020
60667 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_INTKNEPMIS register field value. */
60668 #define ALT_USB_DEV_DIEPINT2_INTKNEPMIS_CLR_MSK 0xffffffdf
60669 /* The reset value of the ALT_USB_DEV_DIEPINT2_INTKNEPMIS register field. */
60670 #define ALT_USB_DEV_DIEPINT2_INTKNEPMIS_RESET 0x0
60671 /* Extracts the ALT_USB_DEV_DIEPINT2_INTKNEPMIS field value from a register. */
60672 #define ALT_USB_DEV_DIEPINT2_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
60673 /* Produces a ALT_USB_DEV_DIEPINT2_INTKNEPMIS register field value suitable for setting the register. */
60674 #define ALT_USB_DEV_DIEPINT2_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
60675 
60676 /*
60677  * Field : IN Endpoint NAK Effective - inepnakeff
60678  *
60679  * Applies to periodic IN endpoints only. This bit can be cleared when the
60680  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
60681  * interrupt indicates that the core has sampled the NAK bit Set (either by the
60682  * application or by the core). The interrupt indicates that the IN endpoint NAK
60683  * bit Set by the application has taken effect in the core.This interrupt does not
60684  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
60685  * over a NAK bit.
60686  *
60687  * Field Enumeration Values:
60688  *
60689  * Enum | Value | Description
60690  * :----------------------------------------|:------|:------------------------------------
60691  * ALT_USB_DEV_DIEPINT2_INEPNAKEFF_E_INACT | 0x0 | No interrupt
60692  * ALT_USB_DEV_DIEPINT2_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
60693  *
60694  * Field Access Macros:
60695  *
60696  */
60697 /*
60698  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_INEPNAKEFF
60699  *
60700  * No interrupt
60701  */
60702 #define ALT_USB_DEV_DIEPINT2_INEPNAKEFF_E_INACT 0x0
60703 /*
60704  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_INEPNAKEFF
60705  *
60706  * IN Endpoint NAK Effective interrupt
60707  */
60708 #define ALT_USB_DEV_DIEPINT2_INEPNAKEFF_E_ACT 0x1
60709 
60710 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_INEPNAKEFF register field. */
60711 #define ALT_USB_DEV_DIEPINT2_INEPNAKEFF_LSB 6
60712 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_INEPNAKEFF register field. */
60713 #define ALT_USB_DEV_DIEPINT2_INEPNAKEFF_MSB 6
60714 /* The width in bits of the ALT_USB_DEV_DIEPINT2_INEPNAKEFF register field. */
60715 #define ALT_USB_DEV_DIEPINT2_INEPNAKEFF_WIDTH 1
60716 /* The mask used to set the ALT_USB_DEV_DIEPINT2_INEPNAKEFF register field value. */
60717 #define ALT_USB_DEV_DIEPINT2_INEPNAKEFF_SET_MSK 0x00000040
60718 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_INEPNAKEFF register field value. */
60719 #define ALT_USB_DEV_DIEPINT2_INEPNAKEFF_CLR_MSK 0xffffffbf
60720 /* The reset value of the ALT_USB_DEV_DIEPINT2_INEPNAKEFF register field. */
60721 #define ALT_USB_DEV_DIEPINT2_INEPNAKEFF_RESET 0x0
60722 /* Extracts the ALT_USB_DEV_DIEPINT2_INEPNAKEFF field value from a register. */
60723 #define ALT_USB_DEV_DIEPINT2_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
60724 /* Produces a ALT_USB_DEV_DIEPINT2_INEPNAKEFF register field value suitable for setting the register. */
60725 #define ALT_USB_DEV_DIEPINT2_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
60726 
60727 /*
60728  * Field : Transmit FIFO Empty - txfemp
60729  *
60730  * This bit is valid only for IN Endpoints This interrupt is asserted when the
60731  * TxFIFO for this endpoint is either half or completely empty. The half or
60732  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
60733  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
60734  *
60735  * Field Enumeration Values:
60736  *
60737  * Enum | Value | Description
60738  * :------------------------------------|:------|:------------------------------
60739  * ALT_USB_DEV_DIEPINT2_TXFEMP_E_INACT | 0x0 | No interrupt
60740  * ALT_USB_DEV_DIEPINT2_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
60741  *
60742  * Field Access Macros:
60743  *
60744  */
60745 /*
60746  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_TXFEMP
60747  *
60748  * No interrupt
60749  */
60750 #define ALT_USB_DEV_DIEPINT2_TXFEMP_E_INACT 0x0
60751 /*
60752  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_TXFEMP
60753  *
60754  * Transmit FIFO Empty interrupt
60755  */
60756 #define ALT_USB_DEV_DIEPINT2_TXFEMP_E_ACT 0x1
60757 
60758 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_TXFEMP register field. */
60759 #define ALT_USB_DEV_DIEPINT2_TXFEMP_LSB 7
60760 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_TXFEMP register field. */
60761 #define ALT_USB_DEV_DIEPINT2_TXFEMP_MSB 7
60762 /* The width in bits of the ALT_USB_DEV_DIEPINT2_TXFEMP register field. */
60763 #define ALT_USB_DEV_DIEPINT2_TXFEMP_WIDTH 1
60764 /* The mask used to set the ALT_USB_DEV_DIEPINT2_TXFEMP register field value. */
60765 #define ALT_USB_DEV_DIEPINT2_TXFEMP_SET_MSK 0x00000080
60766 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_TXFEMP register field value. */
60767 #define ALT_USB_DEV_DIEPINT2_TXFEMP_CLR_MSK 0xffffff7f
60768 /* The reset value of the ALT_USB_DEV_DIEPINT2_TXFEMP register field. */
60769 #define ALT_USB_DEV_DIEPINT2_TXFEMP_RESET 0x1
60770 /* Extracts the ALT_USB_DEV_DIEPINT2_TXFEMP field value from a register. */
60771 #define ALT_USB_DEV_DIEPINT2_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
60772 /* Produces a ALT_USB_DEV_DIEPINT2_TXFEMP register field value suitable for setting the register. */
60773 #define ALT_USB_DEV_DIEPINT2_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
60774 
60775 /*
60776  * Field : Fifo Underrun - txfifoundrn
60777  *
60778  * Applies to IN endpoints Only. The core generates this interrupt when it detects
60779  * a transmit FIFO underrun condition for this endpoint.
60780  *
60781  * Field Enumeration Values:
60782  *
60783  * Enum | Value | Description
60784  * :-----------------------------------------|:------|:------------------------
60785  * ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
60786  * ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
60787  *
60788  * Field Access Macros:
60789  *
60790  */
60791 /*
60792  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN
60793  *
60794  * No interrupt
60795  */
60796 #define ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN_E_INACT 0x0
60797 /*
60798  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN
60799  *
60800  * Fifo Underrun interrupt
60801  */
60802 #define ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN_E_ACT 0x1
60803 
60804 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN register field. */
60805 #define ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN_LSB 8
60806 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN register field. */
60807 #define ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN_MSB 8
60808 /* The width in bits of the ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN register field. */
60809 #define ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN_WIDTH 1
60810 /* The mask used to set the ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN register field value. */
60811 #define ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN_SET_MSK 0x00000100
60812 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN register field value. */
60813 #define ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN_CLR_MSK 0xfffffeff
60814 /* The reset value of the ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN register field. */
60815 #define ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN_RESET 0x0
60816 /* Extracts the ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN field value from a register. */
60817 #define ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
60818 /* Produces a ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN register field value suitable for setting the register. */
60819 #define ALT_USB_DEV_DIEPINT2_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
60820 
60821 /*
60822  * Field : BNA Interrupt - bnaintr
60823  *
60824  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
60825  * generates this interrupt when the descriptor accessed is not ready for the Core
60826  * to process, such as Host busy or DMA done
60827  *
60828  * Field Enumeration Values:
60829  *
60830  * Enum | Value | Description
60831  * :-------------------------------------|:------|:--------------
60832  * ALT_USB_DEV_DIEPINT2_BNAINTR_E_INACT | 0x0 | No interrupt
60833  * ALT_USB_DEV_DIEPINT2_BNAINTR_E_ACT | 0x1 | BNA interrupt
60834  *
60835  * Field Access Macros:
60836  *
60837  */
60838 /*
60839  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_BNAINTR
60840  *
60841  * No interrupt
60842  */
60843 #define ALT_USB_DEV_DIEPINT2_BNAINTR_E_INACT 0x0
60844 /*
60845  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_BNAINTR
60846  *
60847  * BNA interrupt
60848  */
60849 #define ALT_USB_DEV_DIEPINT2_BNAINTR_E_ACT 0x1
60850 
60851 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_BNAINTR register field. */
60852 #define ALT_USB_DEV_DIEPINT2_BNAINTR_LSB 9
60853 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_BNAINTR register field. */
60854 #define ALT_USB_DEV_DIEPINT2_BNAINTR_MSB 9
60855 /* The width in bits of the ALT_USB_DEV_DIEPINT2_BNAINTR register field. */
60856 #define ALT_USB_DEV_DIEPINT2_BNAINTR_WIDTH 1
60857 /* The mask used to set the ALT_USB_DEV_DIEPINT2_BNAINTR register field value. */
60858 #define ALT_USB_DEV_DIEPINT2_BNAINTR_SET_MSK 0x00000200
60859 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_BNAINTR register field value. */
60860 #define ALT_USB_DEV_DIEPINT2_BNAINTR_CLR_MSK 0xfffffdff
60861 /* The reset value of the ALT_USB_DEV_DIEPINT2_BNAINTR register field. */
60862 #define ALT_USB_DEV_DIEPINT2_BNAINTR_RESET 0x0
60863 /* Extracts the ALT_USB_DEV_DIEPINT2_BNAINTR field value from a register. */
60864 #define ALT_USB_DEV_DIEPINT2_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
60865 /* Produces a ALT_USB_DEV_DIEPINT2_BNAINTR register field value suitable for setting the register. */
60866 #define ALT_USB_DEV_DIEPINT2_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
60867 
60868 /*
60869  * Field : Packet Drop Status - pktdrpsts
60870  *
60871  * This bit indicates to the application that an ISOC OUT packet has been dropped.
60872  * This bit does not have an associated mask bit and does not generate an
60873  * interrupt.
60874  *
60875  * Field Enumeration Values:
60876  *
60877  * Enum | Value | Description
60878  * :---------------------------------------|:------|:-----------------------------
60879  * ALT_USB_DEV_DIEPINT2_PKTDRPSTS_E_INACT | 0x0 | No interrupt
60880  * ALT_USB_DEV_DIEPINT2_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
60881  *
60882  * Field Access Macros:
60883  *
60884  */
60885 /*
60886  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_PKTDRPSTS
60887  *
60888  * No interrupt
60889  */
60890 #define ALT_USB_DEV_DIEPINT2_PKTDRPSTS_E_INACT 0x0
60891 /*
60892  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_PKTDRPSTS
60893  *
60894  * Packet Drop Status interrupt
60895  */
60896 #define ALT_USB_DEV_DIEPINT2_PKTDRPSTS_E_ACT 0x1
60897 
60898 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_PKTDRPSTS register field. */
60899 #define ALT_USB_DEV_DIEPINT2_PKTDRPSTS_LSB 11
60900 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_PKTDRPSTS register field. */
60901 #define ALT_USB_DEV_DIEPINT2_PKTDRPSTS_MSB 11
60902 /* The width in bits of the ALT_USB_DEV_DIEPINT2_PKTDRPSTS register field. */
60903 #define ALT_USB_DEV_DIEPINT2_PKTDRPSTS_WIDTH 1
60904 /* The mask used to set the ALT_USB_DEV_DIEPINT2_PKTDRPSTS register field value. */
60905 #define ALT_USB_DEV_DIEPINT2_PKTDRPSTS_SET_MSK 0x00000800
60906 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_PKTDRPSTS register field value. */
60907 #define ALT_USB_DEV_DIEPINT2_PKTDRPSTS_CLR_MSK 0xfffff7ff
60908 /* The reset value of the ALT_USB_DEV_DIEPINT2_PKTDRPSTS register field. */
60909 #define ALT_USB_DEV_DIEPINT2_PKTDRPSTS_RESET 0x0
60910 /* Extracts the ALT_USB_DEV_DIEPINT2_PKTDRPSTS field value from a register. */
60911 #define ALT_USB_DEV_DIEPINT2_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
60912 /* Produces a ALT_USB_DEV_DIEPINT2_PKTDRPSTS register field value suitable for setting the register. */
60913 #define ALT_USB_DEV_DIEPINT2_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
60914 
60915 /*
60916  * Field : BbleErr Interrupt - bbleerr
60917  *
60918  * The core generates this interrupt when babble is received for the endpoint.
60919  *
60920  * Field Enumeration Values:
60921  *
60922  * Enum | Value | Description
60923  * :-------------------------------------|:------|:------------------
60924  * ALT_USB_DEV_DIEPINT2_BBLEERR_E_INACT | 0x0 | No interrupt
60925  * ALT_USB_DEV_DIEPINT2_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
60926  *
60927  * Field Access Macros:
60928  *
60929  */
60930 /*
60931  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_BBLEERR
60932  *
60933  * No interrupt
60934  */
60935 #define ALT_USB_DEV_DIEPINT2_BBLEERR_E_INACT 0x0
60936 /*
60937  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_BBLEERR
60938  *
60939  * BbleErr interrupt
60940  */
60941 #define ALT_USB_DEV_DIEPINT2_BBLEERR_E_ACT 0x1
60942 
60943 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_BBLEERR register field. */
60944 #define ALT_USB_DEV_DIEPINT2_BBLEERR_LSB 12
60945 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_BBLEERR register field. */
60946 #define ALT_USB_DEV_DIEPINT2_BBLEERR_MSB 12
60947 /* The width in bits of the ALT_USB_DEV_DIEPINT2_BBLEERR register field. */
60948 #define ALT_USB_DEV_DIEPINT2_BBLEERR_WIDTH 1
60949 /* The mask used to set the ALT_USB_DEV_DIEPINT2_BBLEERR register field value. */
60950 #define ALT_USB_DEV_DIEPINT2_BBLEERR_SET_MSK 0x00001000
60951 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_BBLEERR register field value. */
60952 #define ALT_USB_DEV_DIEPINT2_BBLEERR_CLR_MSK 0xffffefff
60953 /* The reset value of the ALT_USB_DEV_DIEPINT2_BBLEERR register field. */
60954 #define ALT_USB_DEV_DIEPINT2_BBLEERR_RESET 0x0
60955 /* Extracts the ALT_USB_DEV_DIEPINT2_BBLEERR field value from a register. */
60956 #define ALT_USB_DEV_DIEPINT2_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
60957 /* Produces a ALT_USB_DEV_DIEPINT2_BBLEERR register field value suitable for setting the register. */
60958 #define ALT_USB_DEV_DIEPINT2_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
60959 
60960 /*
60961  * Field : NAK Interrupt - nakintrpt
60962  *
60963  * The core generates this interrupt when a NAK is transmitted or received by the
60964  * device. In case of isochronous IN endpoints the interrupt gets generated when a
60965  * zero length packet is transmitted due to un-availability of data in the TXFifo.
60966  *
60967  * Field Enumeration Values:
60968  *
60969  * Enum | Value | Description
60970  * :---------------------------------------|:------|:--------------
60971  * ALT_USB_DEV_DIEPINT2_NAKINTRPT_E_INACT | 0x0 | No interrupt
60972  * ALT_USB_DEV_DIEPINT2_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
60973  *
60974  * Field Access Macros:
60975  *
60976  */
60977 /*
60978  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_NAKINTRPT
60979  *
60980  * No interrupt
60981  */
60982 #define ALT_USB_DEV_DIEPINT2_NAKINTRPT_E_INACT 0x0
60983 /*
60984  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_NAKINTRPT
60985  *
60986  * NAK Interrupt
60987  */
60988 #define ALT_USB_DEV_DIEPINT2_NAKINTRPT_E_ACT 0x1
60989 
60990 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_NAKINTRPT register field. */
60991 #define ALT_USB_DEV_DIEPINT2_NAKINTRPT_LSB 13
60992 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_NAKINTRPT register field. */
60993 #define ALT_USB_DEV_DIEPINT2_NAKINTRPT_MSB 13
60994 /* The width in bits of the ALT_USB_DEV_DIEPINT2_NAKINTRPT register field. */
60995 #define ALT_USB_DEV_DIEPINT2_NAKINTRPT_WIDTH 1
60996 /* The mask used to set the ALT_USB_DEV_DIEPINT2_NAKINTRPT register field value. */
60997 #define ALT_USB_DEV_DIEPINT2_NAKINTRPT_SET_MSK 0x00002000
60998 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_NAKINTRPT register field value. */
60999 #define ALT_USB_DEV_DIEPINT2_NAKINTRPT_CLR_MSK 0xffffdfff
61000 /* The reset value of the ALT_USB_DEV_DIEPINT2_NAKINTRPT register field. */
61001 #define ALT_USB_DEV_DIEPINT2_NAKINTRPT_RESET 0x0
61002 /* Extracts the ALT_USB_DEV_DIEPINT2_NAKINTRPT field value from a register. */
61003 #define ALT_USB_DEV_DIEPINT2_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
61004 /* Produces a ALT_USB_DEV_DIEPINT2_NAKINTRPT register field value suitable for setting the register. */
61005 #define ALT_USB_DEV_DIEPINT2_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
61006 
61007 /*
61008  * Field : NYET Interrupt - nyetintrpt
61009  *
61010  * The core generates this interrupt when a NYET response is transmitted for a non
61011  * isochronous OUT endpoint.
61012  *
61013  * Field Enumeration Values:
61014  *
61015  * Enum | Value | Description
61016  * :----------------------------------------|:------|:---------------
61017  * ALT_USB_DEV_DIEPINT2_NYETINTRPT_E_INACT | 0x0 | No interrupt
61018  * ALT_USB_DEV_DIEPINT2_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
61019  *
61020  * Field Access Macros:
61021  *
61022  */
61023 /*
61024  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_NYETINTRPT
61025  *
61026  * No interrupt
61027  */
61028 #define ALT_USB_DEV_DIEPINT2_NYETINTRPT_E_INACT 0x0
61029 /*
61030  * Enumerated value for register field ALT_USB_DEV_DIEPINT2_NYETINTRPT
61031  *
61032  * NYET Interrupt
61033  */
61034 #define ALT_USB_DEV_DIEPINT2_NYETINTRPT_E_ACT 0x1
61035 
61036 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT2_NYETINTRPT register field. */
61037 #define ALT_USB_DEV_DIEPINT2_NYETINTRPT_LSB 14
61038 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT2_NYETINTRPT register field. */
61039 #define ALT_USB_DEV_DIEPINT2_NYETINTRPT_MSB 14
61040 /* The width in bits of the ALT_USB_DEV_DIEPINT2_NYETINTRPT register field. */
61041 #define ALT_USB_DEV_DIEPINT2_NYETINTRPT_WIDTH 1
61042 /* The mask used to set the ALT_USB_DEV_DIEPINT2_NYETINTRPT register field value. */
61043 #define ALT_USB_DEV_DIEPINT2_NYETINTRPT_SET_MSK 0x00004000
61044 /* The mask used to clear the ALT_USB_DEV_DIEPINT2_NYETINTRPT register field value. */
61045 #define ALT_USB_DEV_DIEPINT2_NYETINTRPT_CLR_MSK 0xffffbfff
61046 /* The reset value of the ALT_USB_DEV_DIEPINT2_NYETINTRPT register field. */
61047 #define ALT_USB_DEV_DIEPINT2_NYETINTRPT_RESET 0x0
61048 /* Extracts the ALT_USB_DEV_DIEPINT2_NYETINTRPT field value from a register. */
61049 #define ALT_USB_DEV_DIEPINT2_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
61050 /* Produces a ALT_USB_DEV_DIEPINT2_NYETINTRPT register field value suitable for setting the register. */
61051 #define ALT_USB_DEV_DIEPINT2_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
61052 
61053 #ifndef __ASSEMBLY__
61054 /*
61055  * WARNING: The C register and register group struct declarations are provided for
61056  * convenience and illustrative purposes. They should, however, be used with
61057  * caution as the C language standard provides no guarantees about the alignment or
61058  * atomicity of device memory accesses. The recommended practice for writing
61059  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
61060  * alt_write_word() functions.
61061  *
61062  * The struct declaration for register ALT_USB_DEV_DIEPINT2.
61063  */
61064 struct ALT_USB_DEV_DIEPINT2_s
61065 {
61066  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
61067  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
61068  const uint32_t ahberr : 1; /* AHB Error */
61069  const uint32_t timeout : 1; /* Timeout Condition */
61070  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
61071  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
61072  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
61073  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
61074  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
61075  const uint32_t bnaintr : 1; /* BNA Interrupt */
61076  uint32_t : 1; /* *UNDEFINED* */
61077  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
61078  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
61079  const uint32_t nakintrpt : 1; /* NAK Interrupt */
61080  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
61081  uint32_t : 17; /* *UNDEFINED* */
61082 };
61083 
61084 /* The typedef declaration for register ALT_USB_DEV_DIEPINT2. */
61085 typedef volatile struct ALT_USB_DEV_DIEPINT2_s ALT_USB_DEV_DIEPINT2_t;
61086 #endif /* __ASSEMBLY__ */
61087 
61088 /* The byte offset of the ALT_USB_DEV_DIEPINT2 register from the beginning of the component. */
61089 #define ALT_USB_DEV_DIEPINT2_OFST 0x148
61090 /* The address of the ALT_USB_DEV_DIEPINT2 register. */
61091 #define ALT_USB_DEV_DIEPINT2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT2_OFST))
61092 
61093 /*
61094  * Register : Device IN Endpoint 2 Transfer Size Register - dieptsiz2
61095  *
61096  * The application must modify this register before enabling the endpoint. Once the
61097  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
61098  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
61099  * application can only read this register once the core has cleared the Endpoint
61100  * Enable bit.
61101  *
61102  * Register Layout
61103  *
61104  * Bits | Access | Reset | Description
61105  * :--------|:-------|:------|:----------------------------
61106  * [18:0] | RW | 0x0 | Transfer Size
61107  * [28:19] | RW | 0x0 | Packet Count
61108  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
61109  * [31] | ??? | 0x0 | *UNDEFINED*
61110  *
61111  */
61112 /*
61113  * Field : Transfer Size - xfersize
61114  *
61115  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
61116  * application only after it has exhausted the transfer size amount of data. The
61117  * transfer size can be Set to the maximum packet size of the endpoint, to be
61118  * interrupted at the end of each packet. The core decrements this field every time
61119  * a packet from the external memory is written to the TxFIFO.
61120  *
61121  * Field Access Macros:
61122  *
61123  */
61124 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ2_XFERSIZE register field. */
61125 #define ALT_USB_DEV_DIEPTSIZ2_XFERSIZE_LSB 0
61126 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ2_XFERSIZE register field. */
61127 #define ALT_USB_DEV_DIEPTSIZ2_XFERSIZE_MSB 18
61128 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ2_XFERSIZE register field. */
61129 #define ALT_USB_DEV_DIEPTSIZ2_XFERSIZE_WIDTH 19
61130 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ2_XFERSIZE register field value. */
61131 #define ALT_USB_DEV_DIEPTSIZ2_XFERSIZE_SET_MSK 0x0007ffff
61132 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ2_XFERSIZE register field value. */
61133 #define ALT_USB_DEV_DIEPTSIZ2_XFERSIZE_CLR_MSK 0xfff80000
61134 /* The reset value of the ALT_USB_DEV_DIEPTSIZ2_XFERSIZE register field. */
61135 #define ALT_USB_DEV_DIEPTSIZ2_XFERSIZE_RESET 0x0
61136 /* Extracts the ALT_USB_DEV_DIEPTSIZ2_XFERSIZE field value from a register. */
61137 #define ALT_USB_DEV_DIEPTSIZ2_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
61138 /* Produces a ALT_USB_DEV_DIEPTSIZ2_XFERSIZE register field value suitable for setting the register. */
61139 #define ALT_USB_DEV_DIEPTSIZ2_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
61140 
61141 /*
61142  * Field : Packet Count - PktCnt
61143  *
61144  * Indicates the total number of USB packets that constitute the Transfer Size
61145  * amount of data for endpoint 0.This field is decremented every time a packet
61146  * (maximum size or short packet) is read from the TxFIFO.
61147  *
61148  * Field Access Macros:
61149  *
61150  */
61151 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ2_PKTCNT register field. */
61152 #define ALT_USB_DEV_DIEPTSIZ2_PKTCNT_LSB 19
61153 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ2_PKTCNT register field. */
61154 #define ALT_USB_DEV_DIEPTSIZ2_PKTCNT_MSB 28
61155 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ2_PKTCNT register field. */
61156 #define ALT_USB_DEV_DIEPTSIZ2_PKTCNT_WIDTH 10
61157 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ2_PKTCNT register field value. */
61158 #define ALT_USB_DEV_DIEPTSIZ2_PKTCNT_SET_MSK 0x1ff80000
61159 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ2_PKTCNT register field value. */
61160 #define ALT_USB_DEV_DIEPTSIZ2_PKTCNT_CLR_MSK 0xe007ffff
61161 /* The reset value of the ALT_USB_DEV_DIEPTSIZ2_PKTCNT register field. */
61162 #define ALT_USB_DEV_DIEPTSIZ2_PKTCNT_RESET 0x0
61163 /* Extracts the ALT_USB_DEV_DIEPTSIZ2_PKTCNT field value from a register. */
61164 #define ALT_USB_DEV_DIEPTSIZ2_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
61165 /* Produces a ALT_USB_DEV_DIEPTSIZ2_PKTCNT register field value suitable for setting the register. */
61166 #define ALT_USB_DEV_DIEPTSIZ2_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
61167 
61168 /*
61169  * Field : Applies to IN endpoints onl - mc
61170  *
61171  * for periodic IN endpoints, this field indicates the number of packets that must
61172  * be transmitted per microframe on the USB. The core uses this field to calculate
61173  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
61174  * field is valid only in Internal DMA mode. It specifies the number of packets the
61175  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
61176  * by the Next Endpoint field of the Device Endpoint-n Control register
61177  * (DIEPCTLn.NextEp)
61178  *
61179  * Field Enumeration Values:
61180  *
61181  * Enum | Value | Description
61182  * :------------------------------------|:------|:------------
61183  * ALT_USB_DEV_DIEPTSIZ2_MC_E_PKTONE | 0x1 | 1 packet
61184  * ALT_USB_DEV_DIEPTSIZ2_MC_E_PKTTWO | 0x2 | 2 packets
61185  * ALT_USB_DEV_DIEPTSIZ2_MC_E_PKTTHREE | 0x3 | 3 packets
61186  *
61187  * Field Access Macros:
61188  *
61189  */
61190 /*
61191  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ2_MC
61192  *
61193  * 1 packet
61194  */
61195 #define ALT_USB_DEV_DIEPTSIZ2_MC_E_PKTONE 0x1
61196 /*
61197  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ2_MC
61198  *
61199  * 2 packets
61200  */
61201 #define ALT_USB_DEV_DIEPTSIZ2_MC_E_PKTTWO 0x2
61202 /*
61203  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ2_MC
61204  *
61205  * 3 packets
61206  */
61207 #define ALT_USB_DEV_DIEPTSIZ2_MC_E_PKTTHREE 0x3
61208 
61209 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ2_MC register field. */
61210 #define ALT_USB_DEV_DIEPTSIZ2_MC_LSB 29
61211 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ2_MC register field. */
61212 #define ALT_USB_DEV_DIEPTSIZ2_MC_MSB 30
61213 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ2_MC register field. */
61214 #define ALT_USB_DEV_DIEPTSIZ2_MC_WIDTH 2
61215 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ2_MC register field value. */
61216 #define ALT_USB_DEV_DIEPTSIZ2_MC_SET_MSK 0x60000000
61217 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ2_MC register field value. */
61218 #define ALT_USB_DEV_DIEPTSIZ2_MC_CLR_MSK 0x9fffffff
61219 /* The reset value of the ALT_USB_DEV_DIEPTSIZ2_MC register field. */
61220 #define ALT_USB_DEV_DIEPTSIZ2_MC_RESET 0x0
61221 /* Extracts the ALT_USB_DEV_DIEPTSIZ2_MC field value from a register. */
61222 #define ALT_USB_DEV_DIEPTSIZ2_MC_GET(value) (((value) & 0x60000000) >> 29)
61223 /* Produces a ALT_USB_DEV_DIEPTSIZ2_MC register field value suitable for setting the register. */
61224 #define ALT_USB_DEV_DIEPTSIZ2_MC_SET(value) (((value) << 29) & 0x60000000)
61225 
61226 #ifndef __ASSEMBLY__
61227 /*
61228  * WARNING: The C register and register group struct declarations are provided for
61229  * convenience and illustrative purposes. They should, however, be used with
61230  * caution as the C language standard provides no guarantees about the alignment or
61231  * atomicity of device memory accesses. The recommended practice for writing
61232  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
61233  * alt_write_word() functions.
61234  *
61235  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ2.
61236  */
61237 struct ALT_USB_DEV_DIEPTSIZ2_s
61238 {
61239  uint32_t xfersize : 19; /* Transfer Size */
61240  uint32_t PktCnt : 10; /* Packet Count */
61241  uint32_t mc : 2; /* Applies to IN endpoints onl */
61242  uint32_t : 1; /* *UNDEFINED* */
61243 };
61244 
61245 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ2. */
61246 typedef volatile struct ALT_USB_DEV_DIEPTSIZ2_s ALT_USB_DEV_DIEPTSIZ2_t;
61247 #endif /* __ASSEMBLY__ */
61248 
61249 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ2 register from the beginning of the component. */
61250 #define ALT_USB_DEV_DIEPTSIZ2_OFST 0x150
61251 /* The address of the ALT_USB_DEV_DIEPTSIZ2 register. */
61252 #define ALT_USB_DEV_DIEPTSIZ2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ2_OFST))
61253 
61254 /*
61255  * Register : Device IN Endpoint 2 DMA Address Register - diepdma2
61256  *
61257  * DMA Addressing.
61258  *
61259  * Register Layout
61260  *
61261  * Bits | Access | Reset | Description
61262  * :-------|:-------|:--------|:------------
61263  * [31:0] | RW | Unknown | DMA Address
61264  *
61265  */
61266 /*
61267  * Field : DMA Address - diepdma2
61268  *
61269  * Holds the start address of the external memory for storing or fetching endpoint
61270  * data. for control endpoints, this field stores control OUT data packets as well
61271  * as SETUP transaction data packets. When more than three SETUP packets are
61272  * received back-to-back, the SETUP data packet in the memory is overwritten. This
61273  * register is incremented on every AHB transaction. The application can give only
61274  * a DWORD-aligned address.
61275  *
61276  * When Scatter/Gather DMA mode is not enabled, the application programs the start
61277  * address value in this field.
61278  *
61279  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
61280  * for the descriptor list.
61281  *
61282  * Field Access Macros:
61283  *
61284  */
61285 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA2_DIEPDMA2 register field. */
61286 #define ALT_USB_DEV_DIEPDMA2_DIEPDMA2_LSB 0
61287 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA2_DIEPDMA2 register field. */
61288 #define ALT_USB_DEV_DIEPDMA2_DIEPDMA2_MSB 31
61289 /* The width in bits of the ALT_USB_DEV_DIEPDMA2_DIEPDMA2 register field. */
61290 #define ALT_USB_DEV_DIEPDMA2_DIEPDMA2_WIDTH 32
61291 /* The mask used to set the ALT_USB_DEV_DIEPDMA2_DIEPDMA2 register field value. */
61292 #define ALT_USB_DEV_DIEPDMA2_DIEPDMA2_SET_MSK 0xffffffff
61293 /* The mask used to clear the ALT_USB_DEV_DIEPDMA2_DIEPDMA2 register field value. */
61294 #define ALT_USB_DEV_DIEPDMA2_DIEPDMA2_CLR_MSK 0x00000000
61295 /* The reset value of the ALT_USB_DEV_DIEPDMA2_DIEPDMA2 register field is UNKNOWN. */
61296 #define ALT_USB_DEV_DIEPDMA2_DIEPDMA2_RESET 0x0
61297 /* Extracts the ALT_USB_DEV_DIEPDMA2_DIEPDMA2 field value from a register. */
61298 #define ALT_USB_DEV_DIEPDMA2_DIEPDMA2_GET(value) (((value) & 0xffffffff) >> 0)
61299 /* Produces a ALT_USB_DEV_DIEPDMA2_DIEPDMA2 register field value suitable for setting the register. */
61300 #define ALT_USB_DEV_DIEPDMA2_DIEPDMA2_SET(value) (((value) << 0) & 0xffffffff)
61301 
61302 #ifndef __ASSEMBLY__
61303 /*
61304  * WARNING: The C register and register group struct declarations are provided for
61305  * convenience and illustrative purposes. They should, however, be used with
61306  * caution as the C language standard provides no guarantees about the alignment or
61307  * atomicity of device memory accesses. The recommended practice for writing
61308  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
61309  * alt_write_word() functions.
61310  *
61311  * The struct declaration for register ALT_USB_DEV_DIEPDMA2.
61312  */
61313 struct ALT_USB_DEV_DIEPDMA2_s
61314 {
61315  uint32_t diepdma2 : 32; /* DMA Address */
61316 };
61317 
61318 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA2. */
61319 typedef volatile struct ALT_USB_DEV_DIEPDMA2_s ALT_USB_DEV_DIEPDMA2_t;
61320 #endif /* __ASSEMBLY__ */
61321 
61322 /* The byte offset of the ALT_USB_DEV_DIEPDMA2 register from the beginning of the component. */
61323 #define ALT_USB_DEV_DIEPDMA2_OFST 0x154
61324 /* The address of the ALT_USB_DEV_DIEPDMA2 register. */
61325 #define ALT_USB_DEV_DIEPDMA2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA2_OFST))
61326 
61327 /*
61328  * Register : Device IN Endpoint Transmit FIFO Status Register 2 - DTXFSTS2
61329  *
61330  * This register contains the free space information for the Device IN endpoint
61331  * TxFIFO.
61332  *
61333  * Register Layout
61334  *
61335  * Bits | Access | Reset | Description
61336  * :--------|:-------|:-------|:-------------------------------
61337  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
61338  * [31:16] | ??? | 0x0 | *UNDEFINED*
61339  *
61340  */
61341 /*
61342  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
61343  *
61344  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
61345  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
61346  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
61347  * 32,768 words available Others: Reserved
61348  *
61349  * Field Access Macros:
61350  *
61351  */
61352 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL register field. */
61353 #define ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL_LSB 0
61354 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL register field. */
61355 #define ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL_MSB 15
61356 /* The width in bits of the ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL register field. */
61357 #define ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL_WIDTH 16
61358 /* The mask used to set the ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL register field value. */
61359 #define ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
61360 /* The mask used to clear the ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL register field value. */
61361 #define ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
61362 /* The reset value of the ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL register field. */
61363 #define ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL_RESET 0x2000
61364 /* Extracts the ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL field value from a register. */
61365 #define ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
61366 /* Produces a ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL register field value suitable for setting the register. */
61367 #define ALT_USB_DEV_DTXFSTS2_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
61368 
61369 #ifndef __ASSEMBLY__
61370 /*
61371  * WARNING: The C register and register group struct declarations are provided for
61372  * convenience and illustrative purposes. They should, however, be used with
61373  * caution as the C language standard provides no guarantees about the alignment or
61374  * atomicity of device memory accesses. The recommended practice for writing
61375  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
61376  * alt_write_word() functions.
61377  *
61378  * The struct declaration for register ALT_USB_DEV_DTXFSTS2.
61379  */
61380 struct ALT_USB_DEV_DTXFSTS2_s
61381 {
61382  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
61383  uint32_t : 16; /* *UNDEFINED* */
61384 };
61385 
61386 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS2. */
61387 typedef volatile struct ALT_USB_DEV_DTXFSTS2_s ALT_USB_DEV_DTXFSTS2_t;
61388 #endif /* __ASSEMBLY__ */
61389 
61390 /* The byte offset of the ALT_USB_DEV_DTXFSTS2 register from the beginning of the component. */
61391 #define ALT_USB_DEV_DTXFSTS2_OFST 0x158
61392 /* The address of the ALT_USB_DEV_DTXFSTS2 register. */
61393 #define ALT_USB_DEV_DTXFSTS2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS2_OFST))
61394 
61395 /*
61396  * Register : Device IN Endpoint 2 DMA Buffer Address Register - diepdmab2
61397  *
61398  * DMA Buffer Address.
61399  *
61400  * Register Layout
61401  *
61402  * Bits | Access | Reset | Description
61403  * :-------|:-------|:--------|:-------------------
61404  * [31:0] | R | Unknown | DMA Buffer Address
61405  *
61406  */
61407 /*
61408  * Field : DMA Buffer Address - diepdmab2
61409  *
61410  * Holds the current buffer address. This register is updated as and when the data
61411  * transfer for the corresponding end point is in progress. This register is
61412  * present only in Scatter/Gather DMA mode.
61413  *
61414  * Field Access Macros:
61415  *
61416  */
61417 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2 register field. */
61418 #define ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2_LSB 0
61419 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2 register field. */
61420 #define ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2_MSB 31
61421 /* The width in bits of the ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2 register field. */
61422 #define ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2_WIDTH 32
61423 /* The mask used to set the ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2 register field value. */
61424 #define ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2_SET_MSK 0xffffffff
61425 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2 register field value. */
61426 #define ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2_CLR_MSK 0x00000000
61427 /* The reset value of the ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2 register field is UNKNOWN. */
61428 #define ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2_RESET 0x0
61429 /* Extracts the ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2 field value from a register. */
61430 #define ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2_GET(value) (((value) & 0xffffffff) >> 0)
61431 /* Produces a ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2 register field value suitable for setting the register. */
61432 #define ALT_USB_DEV_DIEPDMAB2_DIEPDMAB2_SET(value) (((value) << 0) & 0xffffffff)
61433 
61434 #ifndef __ASSEMBLY__
61435 /*
61436  * WARNING: The C register and register group struct declarations are provided for
61437  * convenience and illustrative purposes. They should, however, be used with
61438  * caution as the C language standard provides no guarantees about the alignment or
61439  * atomicity of device memory accesses. The recommended practice for writing
61440  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
61441  * alt_write_word() functions.
61442  *
61443  * The struct declaration for register ALT_USB_DEV_DIEPDMAB2.
61444  */
61445 struct ALT_USB_DEV_DIEPDMAB2_s
61446 {
61447  const uint32_t diepdmab2 : 32; /* DMA Buffer Address */
61448 };
61449 
61450 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB2. */
61451 typedef volatile struct ALT_USB_DEV_DIEPDMAB2_s ALT_USB_DEV_DIEPDMAB2_t;
61452 #endif /* __ASSEMBLY__ */
61453 
61454 /* The byte offset of the ALT_USB_DEV_DIEPDMAB2 register from the beginning of the component. */
61455 #define ALT_USB_DEV_DIEPDMAB2_OFST 0x15c
61456 /* The address of the ALT_USB_DEV_DIEPDMAB2 register. */
61457 #define ALT_USB_DEV_DIEPDMAB2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB2_OFST))
61458 
61459 /*
61460  * Register : Device Control IN Endpoint 3 Control Register - diepctl3
61461  *
61462  * Endpoint_number: 3
61463  *
61464  * Register Layout
61465  *
61466  * Bits | Access | Reset | Description
61467  * :--------|:-------|:------|:--------------------
61468  * [10:0] | RW | 0x0 | Maximum Packet Size
61469  * [14:11] | ??? | 0x0 | *UNDEFINED*
61470  * [15] | RW | 0x0 | USB Active Endpoint
61471  * [16] | R | 0x0 | Endpoint Data PID
61472  * [17] | R | 0x0 | NAK Status
61473  * [19:18] | RW | 0x0 | Endpoint Type
61474  * [20] | ??? | 0x0 | *UNDEFINED*
61475  * [21] | R | 0x0 | STALL Handshake
61476  * [25:22] | RW | 0x0 | TxFIFO Number
61477  * [26] | W | 0x0 | Clear NAK
61478  * [27] | W | 0x0 | Set NAK
61479  * [28] | W | 0x0 | Set DATA0 PID
61480  * [29] | W | 0x0 | Set DATA1 PID
61481  * [30] | R | 0x0 | Endpoint Disable
61482  * [31] | R | 0x0 | Endpoint Enable
61483  *
61484  */
61485 /*
61486  * Field : Maximum Packet Size - mps
61487  *
61488  * Applies to IN and OUT endpoints. The application must program this field with
61489  * the maximum packet size for the current logical endpoint. This value is in
61490  * bytes.
61491  *
61492  * Field Access Macros:
61493  *
61494  */
61495 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_MPS register field. */
61496 #define ALT_USB_DEV_DIEPCTL3_MPS_LSB 0
61497 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_MPS register field. */
61498 #define ALT_USB_DEV_DIEPCTL3_MPS_MSB 10
61499 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_MPS register field. */
61500 #define ALT_USB_DEV_DIEPCTL3_MPS_WIDTH 11
61501 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_MPS register field value. */
61502 #define ALT_USB_DEV_DIEPCTL3_MPS_SET_MSK 0x000007ff
61503 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_MPS register field value. */
61504 #define ALT_USB_DEV_DIEPCTL3_MPS_CLR_MSK 0xfffff800
61505 /* The reset value of the ALT_USB_DEV_DIEPCTL3_MPS register field. */
61506 #define ALT_USB_DEV_DIEPCTL3_MPS_RESET 0x0
61507 /* Extracts the ALT_USB_DEV_DIEPCTL3_MPS field value from a register. */
61508 #define ALT_USB_DEV_DIEPCTL3_MPS_GET(value) (((value) & 0x000007ff) >> 0)
61509 /* Produces a ALT_USB_DEV_DIEPCTL3_MPS register field value suitable for setting the register. */
61510 #define ALT_USB_DEV_DIEPCTL3_MPS_SET(value) (((value) << 0) & 0x000007ff)
61511 
61512 /*
61513  * Field : USB Active Endpoint - usbactep
61514  *
61515  * Indicates whether this endpoint is active in the current configuration and
61516  * interface. The core clears this bit for all endpoints (other than EP 0) after
61517  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
61518  * commands, the application must program endpoint registers accordingly and set
61519  * this bit.
61520  *
61521  * Field Enumeration Values:
61522  *
61523  * Enum | Value | Description
61524  * :-------------------------------------|:------|:--------------------
61525  * ALT_USB_DEV_DIEPCTL3_USBACTEP_E_DISD | 0x0 | Not Active
61526  * ALT_USB_DEV_DIEPCTL3_USBACTEP_E_END | 0x1 | USB Active Endpoint
61527  *
61528  * Field Access Macros:
61529  *
61530  */
61531 /*
61532  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_USBACTEP
61533  *
61534  * Not Active
61535  */
61536 #define ALT_USB_DEV_DIEPCTL3_USBACTEP_E_DISD 0x0
61537 /*
61538  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_USBACTEP
61539  *
61540  * USB Active Endpoint
61541  */
61542 #define ALT_USB_DEV_DIEPCTL3_USBACTEP_E_END 0x1
61543 
61544 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_USBACTEP register field. */
61545 #define ALT_USB_DEV_DIEPCTL3_USBACTEP_LSB 15
61546 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_USBACTEP register field. */
61547 #define ALT_USB_DEV_DIEPCTL3_USBACTEP_MSB 15
61548 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_USBACTEP register field. */
61549 #define ALT_USB_DEV_DIEPCTL3_USBACTEP_WIDTH 1
61550 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_USBACTEP register field value. */
61551 #define ALT_USB_DEV_DIEPCTL3_USBACTEP_SET_MSK 0x00008000
61552 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_USBACTEP register field value. */
61553 #define ALT_USB_DEV_DIEPCTL3_USBACTEP_CLR_MSK 0xffff7fff
61554 /* The reset value of the ALT_USB_DEV_DIEPCTL3_USBACTEP register field. */
61555 #define ALT_USB_DEV_DIEPCTL3_USBACTEP_RESET 0x0
61556 /* Extracts the ALT_USB_DEV_DIEPCTL3_USBACTEP field value from a register. */
61557 #define ALT_USB_DEV_DIEPCTL3_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
61558 /* Produces a ALT_USB_DEV_DIEPCTL3_USBACTEP register field value suitable for setting the register. */
61559 #define ALT_USB_DEV_DIEPCTL3_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
61560 
61561 /*
61562  * Field : Endpoint Data PID - dpid
61563  *
61564  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
61565  * packet to be received or transmitted on this endpoint. The application must
61566  * program the PID of the first packet to be received or transmitted on this
61567  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
61568  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
61569  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
61570  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
61571  * DMA mode:
61572  *
61573  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
61574  * number in which the core transmits/receives isochronous data for this endpoint.
61575  * The application must program the even/odd (micro) frame number in which it
61576  * intends to transmit/receive isochronous data for this endpoint using the
61577  * SetEvnFr and SetOddFr fields in this register.
61578  *
61579  * 0: Even (micro)frame
61580  *
61581  * 1: Odd (micro)frame
61582  *
61583  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
61584  * number in which to send data is provided in the transmit descriptor structure.
61585  * The frame in which data is received is updated in receive descriptor structure.
61586  *
61587  * Field Enumeration Values:
61588  *
61589  * Enum | Value | Description
61590  * :----------------------------------|:------|:-----------------------------
61591  * ALT_USB_DEV_DIEPCTL3_DPID_E_INACT | 0x0 | Endpoint Data PID not active
61592  * ALT_USB_DEV_DIEPCTL3_DPID_E_ACT | 0x1 | Endpoint Data PID active
61593  *
61594  * Field Access Macros:
61595  *
61596  */
61597 /*
61598  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_DPID
61599  *
61600  * Endpoint Data PID not active
61601  */
61602 #define ALT_USB_DEV_DIEPCTL3_DPID_E_INACT 0x0
61603 /*
61604  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_DPID
61605  *
61606  * Endpoint Data PID active
61607  */
61608 #define ALT_USB_DEV_DIEPCTL3_DPID_E_ACT 0x1
61609 
61610 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_DPID register field. */
61611 #define ALT_USB_DEV_DIEPCTL3_DPID_LSB 16
61612 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_DPID register field. */
61613 #define ALT_USB_DEV_DIEPCTL3_DPID_MSB 16
61614 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_DPID register field. */
61615 #define ALT_USB_DEV_DIEPCTL3_DPID_WIDTH 1
61616 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_DPID register field value. */
61617 #define ALT_USB_DEV_DIEPCTL3_DPID_SET_MSK 0x00010000
61618 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_DPID register field value. */
61619 #define ALT_USB_DEV_DIEPCTL3_DPID_CLR_MSK 0xfffeffff
61620 /* The reset value of the ALT_USB_DEV_DIEPCTL3_DPID register field. */
61621 #define ALT_USB_DEV_DIEPCTL3_DPID_RESET 0x0
61622 /* Extracts the ALT_USB_DEV_DIEPCTL3_DPID field value from a register. */
61623 #define ALT_USB_DEV_DIEPCTL3_DPID_GET(value) (((value) & 0x00010000) >> 16)
61624 /* Produces a ALT_USB_DEV_DIEPCTL3_DPID register field value suitable for setting the register. */
61625 #define ALT_USB_DEV_DIEPCTL3_DPID_SET(value) (((value) << 16) & 0x00010000)
61626 
61627 /*
61628  * Field : NAK Status - naksts
61629  *
61630  * When either the application or the core sets this bit:
61631  *
61632  * * The core stops receiving any data on an OUT endpoint, even if there is space
61633  * in the RxFIFO to accommodate the incoming packet.
61634  *
61635  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
61636  * IN endpoint, even if there data is available in the TxFIFO.
61637  *
61638  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
61639  * even if there data is available in the TxFIFO.
61640  *
61641  * Irrespective of this bit's setting, the core always responds to SETUP data
61642  * packets with an ACK handshake.
61643  *
61644  * Field Enumeration Values:
61645  *
61646  * Enum | Value | Description
61647  * :-------------------------------------|:------|:------------------------------------------------
61648  * ALT_USB_DEV_DIEPCTL3_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
61649  * : | | based on the FIFO status
61650  * ALT_USB_DEV_DIEPCTL3_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
61651  * : | | endpoint
61652  *
61653  * Field Access Macros:
61654  *
61655  */
61656 /*
61657  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_NAKSTS
61658  *
61659  * The core is transmitting non-NAK handshakes based on the FIFO status
61660  */
61661 #define ALT_USB_DEV_DIEPCTL3_NAKSTS_E_NONNAK 0x0
61662 /*
61663  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_NAKSTS
61664  *
61665  * The core is transmitting NAK handshakes on this endpoint
61666  */
61667 #define ALT_USB_DEV_DIEPCTL3_NAKSTS_E_NAK 0x1
61668 
61669 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_NAKSTS register field. */
61670 #define ALT_USB_DEV_DIEPCTL3_NAKSTS_LSB 17
61671 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_NAKSTS register field. */
61672 #define ALT_USB_DEV_DIEPCTL3_NAKSTS_MSB 17
61673 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_NAKSTS register field. */
61674 #define ALT_USB_DEV_DIEPCTL3_NAKSTS_WIDTH 1
61675 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_NAKSTS register field value. */
61676 #define ALT_USB_DEV_DIEPCTL3_NAKSTS_SET_MSK 0x00020000
61677 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_NAKSTS register field value. */
61678 #define ALT_USB_DEV_DIEPCTL3_NAKSTS_CLR_MSK 0xfffdffff
61679 /* The reset value of the ALT_USB_DEV_DIEPCTL3_NAKSTS register field. */
61680 #define ALT_USB_DEV_DIEPCTL3_NAKSTS_RESET 0x0
61681 /* Extracts the ALT_USB_DEV_DIEPCTL3_NAKSTS field value from a register. */
61682 #define ALT_USB_DEV_DIEPCTL3_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
61683 /* Produces a ALT_USB_DEV_DIEPCTL3_NAKSTS register field value suitable for setting the register. */
61684 #define ALT_USB_DEV_DIEPCTL3_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
61685 
61686 /*
61687  * Field : Endpoint Type - eptype
61688  *
61689  * This is the transfer type supported by this logical endpoint.
61690  *
61691  * Field Enumeration Values:
61692  *
61693  * Enum | Value | Description
61694  * :------------------------------------------|:------|:------------
61695  * ALT_USB_DEV_DIEPCTL3_EPTYPE_E_CTL | 0x0 | Control
61696  * ALT_USB_DEV_DIEPCTL3_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
61697  * ALT_USB_DEV_DIEPCTL3_EPTYPE_E_BULK | 0x2 | Bulk
61698  * ALT_USB_DEV_DIEPCTL3_EPTYPE_E_INTERRUP | 0x3 | Interrupt
61699  *
61700  * Field Access Macros:
61701  *
61702  */
61703 /*
61704  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_EPTYPE
61705  *
61706  * Control
61707  */
61708 #define ALT_USB_DEV_DIEPCTL3_EPTYPE_E_CTL 0x0
61709 /*
61710  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_EPTYPE
61711  *
61712  * Isochronous
61713  */
61714 #define ALT_USB_DEV_DIEPCTL3_EPTYPE_E_ISOCHRONOUS 0x1
61715 /*
61716  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_EPTYPE
61717  *
61718  * Bulk
61719  */
61720 #define ALT_USB_DEV_DIEPCTL3_EPTYPE_E_BULK 0x2
61721 /*
61722  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_EPTYPE
61723  *
61724  * Interrupt
61725  */
61726 #define ALT_USB_DEV_DIEPCTL3_EPTYPE_E_INTERRUP 0x3
61727 
61728 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_EPTYPE register field. */
61729 #define ALT_USB_DEV_DIEPCTL3_EPTYPE_LSB 18
61730 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_EPTYPE register field. */
61731 #define ALT_USB_DEV_DIEPCTL3_EPTYPE_MSB 19
61732 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_EPTYPE register field. */
61733 #define ALT_USB_DEV_DIEPCTL3_EPTYPE_WIDTH 2
61734 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_EPTYPE register field value. */
61735 #define ALT_USB_DEV_DIEPCTL3_EPTYPE_SET_MSK 0x000c0000
61736 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_EPTYPE register field value. */
61737 #define ALT_USB_DEV_DIEPCTL3_EPTYPE_CLR_MSK 0xfff3ffff
61738 /* The reset value of the ALT_USB_DEV_DIEPCTL3_EPTYPE register field. */
61739 #define ALT_USB_DEV_DIEPCTL3_EPTYPE_RESET 0x0
61740 /* Extracts the ALT_USB_DEV_DIEPCTL3_EPTYPE field value from a register. */
61741 #define ALT_USB_DEV_DIEPCTL3_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
61742 /* Produces a ALT_USB_DEV_DIEPCTL3_EPTYPE register field value suitable for setting the register. */
61743 #define ALT_USB_DEV_DIEPCTL3_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
61744 
61745 /*
61746  * Field : STALL Handshake - stall
61747  *
61748  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
61749  * application sets this bit to stall all tokens from the USB host to this
61750  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
61751  * along with this bit, the STALL bit takes priority. Only the application can
61752  * clear this bit, never the core. Applies to control endpoints only. The
61753  * application can only set this bit, and the core clears it, when a SETUP token is
61754  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
61755  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
61756  * of this bit's setting, the core always responds to SETUP data packets with an
61757  * ACK handshake.
61758  *
61759  * Field Enumeration Values:
61760  *
61761  * Enum | Value | Description
61762  * :-----------------------------------|:------|:----------------------------
61763  * ALT_USB_DEV_DIEPCTL3_STALL_E_INACT | 0x0 | STALL All Tokens not active
61764  * ALT_USB_DEV_DIEPCTL3_STALL_E_ACT | 0x1 | STALL All Tokens active
61765  *
61766  * Field Access Macros:
61767  *
61768  */
61769 /*
61770  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_STALL
61771  *
61772  * STALL All Tokens not active
61773  */
61774 #define ALT_USB_DEV_DIEPCTL3_STALL_E_INACT 0x0
61775 /*
61776  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_STALL
61777  *
61778  * STALL All Tokens active
61779  */
61780 #define ALT_USB_DEV_DIEPCTL3_STALL_E_ACT 0x1
61781 
61782 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_STALL register field. */
61783 #define ALT_USB_DEV_DIEPCTL3_STALL_LSB 21
61784 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_STALL register field. */
61785 #define ALT_USB_DEV_DIEPCTL3_STALL_MSB 21
61786 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_STALL register field. */
61787 #define ALT_USB_DEV_DIEPCTL3_STALL_WIDTH 1
61788 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_STALL register field value. */
61789 #define ALT_USB_DEV_DIEPCTL3_STALL_SET_MSK 0x00200000
61790 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_STALL register field value. */
61791 #define ALT_USB_DEV_DIEPCTL3_STALL_CLR_MSK 0xffdfffff
61792 /* The reset value of the ALT_USB_DEV_DIEPCTL3_STALL register field. */
61793 #define ALT_USB_DEV_DIEPCTL3_STALL_RESET 0x0
61794 /* Extracts the ALT_USB_DEV_DIEPCTL3_STALL field value from a register. */
61795 #define ALT_USB_DEV_DIEPCTL3_STALL_GET(value) (((value) & 0x00200000) >> 21)
61796 /* Produces a ALT_USB_DEV_DIEPCTL3_STALL register field value suitable for setting the register. */
61797 #define ALT_USB_DEV_DIEPCTL3_STALL_SET(value) (((value) << 21) & 0x00200000)
61798 
61799 /*
61800  * Field : TxFIFO Number - txfnum
61801  *
61802  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
61803  * endpoints must map this to the corresponding Periodic TxFIFO number.
61804  *
61805  * 4'h0: Non-Periodic TxFIFO
61806  *
61807  * Others: Specified Periodic TxFIFO.number
61808  *
61809  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
61810  * applications such as mass storage. The core treats an IN endpoint as a non-
61811  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
61812  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
61813  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
61814  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
61815  * This field is valid only for IN endpoints.
61816  *
61817  * Field Access Macros:
61818  *
61819  */
61820 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_TXFNUM register field. */
61821 #define ALT_USB_DEV_DIEPCTL3_TXFNUM_LSB 22
61822 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_TXFNUM register field. */
61823 #define ALT_USB_DEV_DIEPCTL3_TXFNUM_MSB 25
61824 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_TXFNUM register field. */
61825 #define ALT_USB_DEV_DIEPCTL3_TXFNUM_WIDTH 4
61826 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_TXFNUM register field value. */
61827 #define ALT_USB_DEV_DIEPCTL3_TXFNUM_SET_MSK 0x03c00000
61828 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_TXFNUM register field value. */
61829 #define ALT_USB_DEV_DIEPCTL3_TXFNUM_CLR_MSK 0xfc3fffff
61830 /* The reset value of the ALT_USB_DEV_DIEPCTL3_TXFNUM register field. */
61831 #define ALT_USB_DEV_DIEPCTL3_TXFNUM_RESET 0x0
61832 /* Extracts the ALT_USB_DEV_DIEPCTL3_TXFNUM field value from a register. */
61833 #define ALT_USB_DEV_DIEPCTL3_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
61834 /* Produces a ALT_USB_DEV_DIEPCTL3_TXFNUM register field value suitable for setting the register. */
61835 #define ALT_USB_DEV_DIEPCTL3_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
61836 
61837 /*
61838  * Field : Clear NAK - cnak
61839  *
61840  * A write to this bit clears the NAK bit for the endpoint.
61841  *
61842  * Field Enumeration Values:
61843  *
61844  * Enum | Value | Description
61845  * :----------------------------------|:------|:-------------
61846  * ALT_USB_DEV_DIEPCTL3_CNAK_E_INACT | 0x0 | No Clear NAK
61847  * ALT_USB_DEV_DIEPCTL3_CNAK_E_ACT | 0x1 | Clear NAK
61848  *
61849  * Field Access Macros:
61850  *
61851  */
61852 /*
61853  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_CNAK
61854  *
61855  * No Clear NAK
61856  */
61857 #define ALT_USB_DEV_DIEPCTL3_CNAK_E_INACT 0x0
61858 /*
61859  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_CNAK
61860  *
61861  * Clear NAK
61862  */
61863 #define ALT_USB_DEV_DIEPCTL3_CNAK_E_ACT 0x1
61864 
61865 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_CNAK register field. */
61866 #define ALT_USB_DEV_DIEPCTL3_CNAK_LSB 26
61867 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_CNAK register field. */
61868 #define ALT_USB_DEV_DIEPCTL3_CNAK_MSB 26
61869 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_CNAK register field. */
61870 #define ALT_USB_DEV_DIEPCTL3_CNAK_WIDTH 1
61871 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_CNAK register field value. */
61872 #define ALT_USB_DEV_DIEPCTL3_CNAK_SET_MSK 0x04000000
61873 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_CNAK register field value. */
61874 #define ALT_USB_DEV_DIEPCTL3_CNAK_CLR_MSK 0xfbffffff
61875 /* The reset value of the ALT_USB_DEV_DIEPCTL3_CNAK register field. */
61876 #define ALT_USB_DEV_DIEPCTL3_CNAK_RESET 0x0
61877 /* Extracts the ALT_USB_DEV_DIEPCTL3_CNAK field value from a register. */
61878 #define ALT_USB_DEV_DIEPCTL3_CNAK_GET(value) (((value) & 0x04000000) >> 26)
61879 /* Produces a ALT_USB_DEV_DIEPCTL3_CNAK register field value suitable for setting the register. */
61880 #define ALT_USB_DEV_DIEPCTL3_CNAK_SET(value) (((value) << 26) & 0x04000000)
61881 
61882 /*
61883  * Field : Set NAK - snak
61884  *
61885  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
61886  * application can control the transmission of NAK handshakes on an endpoint. The
61887  * core can also Set this bit for an endpoint after a SETUP packet is received on
61888  * that endpoint.
61889  *
61890  * Field Enumeration Values:
61891  *
61892  * Enum | Value | Description
61893  * :----------------------------------|:------|:------------
61894  * ALT_USB_DEV_DIEPCTL3_SNAK_E_INACT | 0x0 | No Set NAK
61895  * ALT_USB_DEV_DIEPCTL3_SNAK_E_ACT | 0x1 | Set NAK
61896  *
61897  * Field Access Macros:
61898  *
61899  */
61900 /*
61901  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_SNAK
61902  *
61903  * No Set NAK
61904  */
61905 #define ALT_USB_DEV_DIEPCTL3_SNAK_E_INACT 0x0
61906 /*
61907  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_SNAK
61908  *
61909  * Set NAK
61910  */
61911 #define ALT_USB_DEV_DIEPCTL3_SNAK_E_ACT 0x1
61912 
61913 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_SNAK register field. */
61914 #define ALT_USB_DEV_DIEPCTL3_SNAK_LSB 27
61915 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_SNAK register field. */
61916 #define ALT_USB_DEV_DIEPCTL3_SNAK_MSB 27
61917 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_SNAK register field. */
61918 #define ALT_USB_DEV_DIEPCTL3_SNAK_WIDTH 1
61919 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_SNAK register field value. */
61920 #define ALT_USB_DEV_DIEPCTL3_SNAK_SET_MSK 0x08000000
61921 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_SNAK register field value. */
61922 #define ALT_USB_DEV_DIEPCTL3_SNAK_CLR_MSK 0xf7ffffff
61923 /* The reset value of the ALT_USB_DEV_DIEPCTL3_SNAK register field. */
61924 #define ALT_USB_DEV_DIEPCTL3_SNAK_RESET 0x0
61925 /* Extracts the ALT_USB_DEV_DIEPCTL3_SNAK field value from a register. */
61926 #define ALT_USB_DEV_DIEPCTL3_SNAK_GET(value) (((value) & 0x08000000) >> 27)
61927 /* Produces a ALT_USB_DEV_DIEPCTL3_SNAK register field value suitable for setting the register. */
61928 #define ALT_USB_DEV_DIEPCTL3_SNAK_SET(value) (((value) << 27) & 0x08000000)
61929 
61930 /*
61931  * Field : Set DATA0 PID - setd0pid
61932  *
61933  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
61934  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
61935  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
61936  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
61937  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
61938  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
61939  * mode is enabled, this field is reserved. The frame number in which to send data
61940  * is in the transmit descriptor structure. The frame in which to receive data is
61941  * updated in receive descriptor structure.
61942  *
61943  * Field Enumeration Values:
61944  *
61945  * Enum | Value | Description
61946  * :-------------------------------------|:------|:----------------------------
61947  * ALT_USB_DEV_DIEPCTL3_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
61948  * ALT_USB_DEV_DIEPCTL3_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
61949  *
61950  * Field Access Macros:
61951  *
61952  */
61953 /*
61954  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_SETD0PID
61955  *
61956  * Disables Set DATA0 PID
61957  */
61958 #define ALT_USB_DEV_DIEPCTL3_SETD0PID_E_DISD 0x0
61959 /*
61960  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_SETD0PID
61961  *
61962  * Endpoint Data PID to DATA0)
61963  */
61964 #define ALT_USB_DEV_DIEPCTL3_SETD0PID_E_END 0x1
61965 
61966 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_SETD0PID register field. */
61967 #define ALT_USB_DEV_DIEPCTL3_SETD0PID_LSB 28
61968 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_SETD0PID register field. */
61969 #define ALT_USB_DEV_DIEPCTL3_SETD0PID_MSB 28
61970 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_SETD0PID register field. */
61971 #define ALT_USB_DEV_DIEPCTL3_SETD0PID_WIDTH 1
61972 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_SETD0PID register field value. */
61973 #define ALT_USB_DEV_DIEPCTL3_SETD0PID_SET_MSK 0x10000000
61974 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_SETD0PID register field value. */
61975 #define ALT_USB_DEV_DIEPCTL3_SETD0PID_CLR_MSK 0xefffffff
61976 /* The reset value of the ALT_USB_DEV_DIEPCTL3_SETD0PID register field. */
61977 #define ALT_USB_DEV_DIEPCTL3_SETD0PID_RESET 0x0
61978 /* Extracts the ALT_USB_DEV_DIEPCTL3_SETD0PID field value from a register. */
61979 #define ALT_USB_DEV_DIEPCTL3_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
61980 /* Produces a ALT_USB_DEV_DIEPCTL3_SETD0PID register field value suitable for setting the register. */
61981 #define ALT_USB_DEV_DIEPCTL3_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
61982 
61983 /*
61984  * Field : Set DATA1 PID - setd1pid
61985  *
61986  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
61987  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
61988  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
61989  *
61990  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
61991  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
61992  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
61993  *
61994  * Field Enumeration Values:
61995  *
61996  * Enum | Value | Description
61997  * :-------------------------------------|:------|:-----------------------
61998  * ALT_USB_DEV_DIEPCTL3_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
61999  * ALT_USB_DEV_DIEPCTL3_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
62000  *
62001  * Field Access Macros:
62002  *
62003  */
62004 /*
62005  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_SETD1PID
62006  *
62007  * Disables Set DATA1 PID
62008  */
62009 #define ALT_USB_DEV_DIEPCTL3_SETD1PID_E_DISD 0x0
62010 /*
62011  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_SETD1PID
62012  *
62013  * Enables Set DATA1 PID
62014  */
62015 #define ALT_USB_DEV_DIEPCTL3_SETD1PID_E_END 0x1
62016 
62017 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_SETD1PID register field. */
62018 #define ALT_USB_DEV_DIEPCTL3_SETD1PID_LSB 29
62019 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_SETD1PID register field. */
62020 #define ALT_USB_DEV_DIEPCTL3_SETD1PID_MSB 29
62021 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_SETD1PID register field. */
62022 #define ALT_USB_DEV_DIEPCTL3_SETD1PID_WIDTH 1
62023 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_SETD1PID register field value. */
62024 #define ALT_USB_DEV_DIEPCTL3_SETD1PID_SET_MSK 0x20000000
62025 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_SETD1PID register field value. */
62026 #define ALT_USB_DEV_DIEPCTL3_SETD1PID_CLR_MSK 0xdfffffff
62027 /* The reset value of the ALT_USB_DEV_DIEPCTL3_SETD1PID register field. */
62028 #define ALT_USB_DEV_DIEPCTL3_SETD1PID_RESET 0x0
62029 /* Extracts the ALT_USB_DEV_DIEPCTL3_SETD1PID field value from a register. */
62030 #define ALT_USB_DEV_DIEPCTL3_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
62031 /* Produces a ALT_USB_DEV_DIEPCTL3_SETD1PID register field value suitable for setting the register. */
62032 #define ALT_USB_DEV_DIEPCTL3_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
62033 
62034 /*
62035  * Field : Endpoint Disable - epdis
62036  *
62037  * Applies to IN and OUT endpoints. The application sets this bit to stop
62038  * transmitting/receiving data on an endpoint, even before the transfer for that
62039  * endpoint is complete. The application must wait for the Endpoint Disabled
62040  * interrupt before treating the endpoint as disabled. The core clears this bit
62041  * before setting the Endpoint Disabled interrupt. The application must set this
62042  * bit only if Endpoint Enable is already set for this endpoint.
62043  *
62044  * Field Enumeration Values:
62045  *
62046  * Enum | Value | Description
62047  * :-----------------------------------|:------|:--------------------
62048  * ALT_USB_DEV_DIEPCTL3_EPDIS_E_INACT | 0x0 | No Endpoint Disable
62049  * ALT_USB_DEV_DIEPCTL3_EPDIS_E_ACT | 0x1 | Endpoint Disable
62050  *
62051  * Field Access Macros:
62052  *
62053  */
62054 /*
62055  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_EPDIS
62056  *
62057  * No Endpoint Disable
62058  */
62059 #define ALT_USB_DEV_DIEPCTL3_EPDIS_E_INACT 0x0
62060 /*
62061  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_EPDIS
62062  *
62063  * Endpoint Disable
62064  */
62065 #define ALT_USB_DEV_DIEPCTL3_EPDIS_E_ACT 0x1
62066 
62067 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_EPDIS register field. */
62068 #define ALT_USB_DEV_DIEPCTL3_EPDIS_LSB 30
62069 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_EPDIS register field. */
62070 #define ALT_USB_DEV_DIEPCTL3_EPDIS_MSB 30
62071 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_EPDIS register field. */
62072 #define ALT_USB_DEV_DIEPCTL3_EPDIS_WIDTH 1
62073 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_EPDIS register field value. */
62074 #define ALT_USB_DEV_DIEPCTL3_EPDIS_SET_MSK 0x40000000
62075 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_EPDIS register field value. */
62076 #define ALT_USB_DEV_DIEPCTL3_EPDIS_CLR_MSK 0xbfffffff
62077 /* The reset value of the ALT_USB_DEV_DIEPCTL3_EPDIS register field. */
62078 #define ALT_USB_DEV_DIEPCTL3_EPDIS_RESET 0x0
62079 /* Extracts the ALT_USB_DEV_DIEPCTL3_EPDIS field value from a register. */
62080 #define ALT_USB_DEV_DIEPCTL3_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
62081 /* Produces a ALT_USB_DEV_DIEPCTL3_EPDIS register field value suitable for setting the register. */
62082 #define ALT_USB_DEV_DIEPCTL3_EPDIS_SET(value) (((value) << 30) & 0x40000000)
62083 
62084 /*
62085  * Field : Endpoint Enable - epena
62086  *
62087  * Applies to IN and OUT endpoints.
62088  *
62089  * * When Scatter/Gather DMA mode is enabled,
62090  *
62091  * * for IN endpoints this bit indicates that the descriptor structure and data
62092  * buffer with data ready to transmit is setup.
62093  *
62094  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
62095  * receive data is setup.
62096  *
62097  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
62098  * mode:
62099  *
62100  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
62101  * the endpoint.
62102  *
62103  * * for OUT endpoints, this bit indicates that the application has allocated the
62104  * memory to start receiving data from the USB.
62105  *
62106  * * The core clears this bit before setting any of the following interrupts on
62107  * this endpoint:
62108  *
62109  * * SETUP Phase Done
62110  *
62111  * * Endpoint Disabled
62112  *
62113  * * Transfer Completed
62114  *
62115  * for control endpoints in DMA mode, this bit must be set to be able to transfer
62116  * SETUP data packets in memory.
62117  *
62118  * Field Enumeration Values:
62119  *
62120  * Enum | Value | Description
62121  * :-----------------------------------|:------|:-------------------------
62122  * ALT_USB_DEV_DIEPCTL3_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
62123  * ALT_USB_DEV_DIEPCTL3_EPENA_E_ACT | 0x1 | Endpoint Enable active
62124  *
62125  * Field Access Macros:
62126  *
62127  */
62128 /*
62129  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_EPENA
62130  *
62131  * Endpoint Enable inactive
62132  */
62133 #define ALT_USB_DEV_DIEPCTL3_EPENA_E_INACT 0x0
62134 /*
62135  * Enumerated value for register field ALT_USB_DEV_DIEPCTL3_EPENA
62136  *
62137  * Endpoint Enable active
62138  */
62139 #define ALT_USB_DEV_DIEPCTL3_EPENA_E_ACT 0x1
62140 
62141 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL3_EPENA register field. */
62142 #define ALT_USB_DEV_DIEPCTL3_EPENA_LSB 31
62143 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL3_EPENA register field. */
62144 #define ALT_USB_DEV_DIEPCTL3_EPENA_MSB 31
62145 /* The width in bits of the ALT_USB_DEV_DIEPCTL3_EPENA register field. */
62146 #define ALT_USB_DEV_DIEPCTL3_EPENA_WIDTH 1
62147 /* The mask used to set the ALT_USB_DEV_DIEPCTL3_EPENA register field value. */
62148 #define ALT_USB_DEV_DIEPCTL3_EPENA_SET_MSK 0x80000000
62149 /* The mask used to clear the ALT_USB_DEV_DIEPCTL3_EPENA register field value. */
62150 #define ALT_USB_DEV_DIEPCTL3_EPENA_CLR_MSK 0x7fffffff
62151 /* The reset value of the ALT_USB_DEV_DIEPCTL3_EPENA register field. */
62152 #define ALT_USB_DEV_DIEPCTL3_EPENA_RESET 0x0
62153 /* Extracts the ALT_USB_DEV_DIEPCTL3_EPENA field value from a register. */
62154 #define ALT_USB_DEV_DIEPCTL3_EPENA_GET(value) (((value) & 0x80000000) >> 31)
62155 /* Produces a ALT_USB_DEV_DIEPCTL3_EPENA register field value suitable for setting the register. */
62156 #define ALT_USB_DEV_DIEPCTL3_EPENA_SET(value) (((value) << 31) & 0x80000000)
62157 
62158 #ifndef __ASSEMBLY__
62159 /*
62160  * WARNING: The C register and register group struct declarations are provided for
62161  * convenience and illustrative purposes. They should, however, be used with
62162  * caution as the C language standard provides no guarantees about the alignment or
62163  * atomicity of device memory accesses. The recommended practice for writing
62164  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
62165  * alt_write_word() functions.
62166  *
62167  * The struct declaration for register ALT_USB_DEV_DIEPCTL3.
62168  */
62169 struct ALT_USB_DEV_DIEPCTL3_s
62170 {
62171  uint32_t mps : 11; /* Maximum Packet Size */
62172  uint32_t : 4; /* *UNDEFINED* */
62173  uint32_t usbactep : 1; /* USB Active Endpoint */
62174  const uint32_t dpid : 1; /* Endpoint Data PID */
62175  const uint32_t naksts : 1; /* NAK Status */
62176  uint32_t eptype : 2; /* Endpoint Type */
62177  uint32_t : 1; /* *UNDEFINED* */
62178  const uint32_t stall : 1; /* STALL Handshake */
62179  uint32_t txfnum : 4; /* TxFIFO Number */
62180  uint32_t cnak : 1; /* Clear NAK */
62181  uint32_t snak : 1; /* Set NAK */
62182  uint32_t setd0pid : 1; /* Set DATA0 PID */
62183  uint32_t setd1pid : 1; /* Set DATA1 PID */
62184  const uint32_t epdis : 1; /* Endpoint Disable */
62185  const uint32_t epena : 1; /* Endpoint Enable */
62186 };
62187 
62188 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL3. */
62189 typedef volatile struct ALT_USB_DEV_DIEPCTL3_s ALT_USB_DEV_DIEPCTL3_t;
62190 #endif /* __ASSEMBLY__ */
62191 
62192 /* The byte offset of the ALT_USB_DEV_DIEPCTL3 register from the beginning of the component. */
62193 #define ALT_USB_DEV_DIEPCTL3_OFST 0x160
62194 /* The address of the ALT_USB_DEV_DIEPCTL3 register. */
62195 #define ALT_USB_DEV_DIEPCTL3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL3_OFST))
62196 
62197 /*
62198  * Register : Device IN Endpoint 3 Interrupt Register - diepint3
62199  *
62200  * This register indicates the status of an endpoint with respect to USB- and AHB-
62201  * related events. The application must read this register when the OUT Endpoints
62202  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
62203  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
62204  * can read this register, it must first read the Device All Endpoints Interrupt
62205  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
62206  * Interrupt register. The application must clear the appropriate bit in this
62207  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
62208  *
62209  * Register Layout
62210  *
62211  * Bits | Access | Reset | Description
62212  * :--------|:-------|:------|:---------------------------------------
62213  * [0] | R | 0x0 | Transfer Completed Interrupt
62214  * [1] | R | 0x0 | Endpoint Disabled Interrupt
62215  * [2] | R | 0x0 | AHB Error
62216  * [3] | R | 0x0 | Timeout Condition
62217  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
62218  * [5] | R | 0x0 | IN Token Received with EP Mismatch
62219  * [6] | R | 0x0 | IN Endpoint NAK Effective
62220  * [7] | R | 0x1 | Transmit FIFO Empty
62221  * [8] | R | 0x0 | Fifo Underrun
62222  * [9] | R | 0x0 | BNA Interrupt
62223  * [10] | ??? | 0x0 | *UNDEFINED*
62224  * [11] | R | 0x0 | Packet Drop Status
62225  * [12] | R | 0x0 | BbleErr Interrupt
62226  * [13] | R | 0x0 | NAK Interrupt
62227  * [14] | R | 0x0 | NYET Interrupt
62228  * [31:15] | ??? | 0x0 | *UNDEFINED*
62229  *
62230  */
62231 /*
62232  * Field : Transfer Completed Interrupt - xfercompl
62233  *
62234  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
62235  *
62236  * * for IN endpoint this field indicates that the requested data from the
62237  * descriptor is moved from external system memory to internal FIFO.
62238  *
62239  * * for OUT endpoint this field indicates that the requested data from the
62240  * internal FIFO is moved to external system memory. This interrupt is generated
62241  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
62242  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
62243  * this field indicates that the programmed transfer is complete on the AHB as
62244  * well as on the USB, for this endpoint.
62245  *
62246  * Field Enumeration Values:
62247  *
62248  * Enum | Value | Description
62249  * :---------------------------------------|:------|:-----------------------------
62250  * ALT_USB_DEV_DIEPINT3_XFERCOMPL_E_INACT | 0x0 | No Interrupt
62251  * ALT_USB_DEV_DIEPINT3_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
62252  *
62253  * Field Access Macros:
62254  *
62255  */
62256 /*
62257  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_XFERCOMPL
62258  *
62259  * No Interrupt
62260  */
62261 #define ALT_USB_DEV_DIEPINT3_XFERCOMPL_E_INACT 0x0
62262 /*
62263  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_XFERCOMPL
62264  *
62265  * Transfer Completed Interrupt
62266  */
62267 #define ALT_USB_DEV_DIEPINT3_XFERCOMPL_E_ACT 0x1
62268 
62269 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_XFERCOMPL register field. */
62270 #define ALT_USB_DEV_DIEPINT3_XFERCOMPL_LSB 0
62271 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_XFERCOMPL register field. */
62272 #define ALT_USB_DEV_DIEPINT3_XFERCOMPL_MSB 0
62273 /* The width in bits of the ALT_USB_DEV_DIEPINT3_XFERCOMPL register field. */
62274 #define ALT_USB_DEV_DIEPINT3_XFERCOMPL_WIDTH 1
62275 /* The mask used to set the ALT_USB_DEV_DIEPINT3_XFERCOMPL register field value. */
62276 #define ALT_USB_DEV_DIEPINT3_XFERCOMPL_SET_MSK 0x00000001
62277 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_XFERCOMPL register field value. */
62278 #define ALT_USB_DEV_DIEPINT3_XFERCOMPL_CLR_MSK 0xfffffffe
62279 /* The reset value of the ALT_USB_DEV_DIEPINT3_XFERCOMPL register field. */
62280 #define ALT_USB_DEV_DIEPINT3_XFERCOMPL_RESET 0x0
62281 /* Extracts the ALT_USB_DEV_DIEPINT3_XFERCOMPL field value from a register. */
62282 #define ALT_USB_DEV_DIEPINT3_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
62283 /* Produces a ALT_USB_DEV_DIEPINT3_XFERCOMPL register field value suitable for setting the register. */
62284 #define ALT_USB_DEV_DIEPINT3_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
62285 
62286 /*
62287  * Field : Endpoint Disabled Interrupt - epdisbld
62288  *
62289  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
62290  * disabled per the application's request.
62291  *
62292  * Field Enumeration Values:
62293  *
62294  * Enum | Value | Description
62295  * :--------------------------------------|:------|:----------------------------
62296  * ALT_USB_DEV_DIEPINT3_EPDISBLD_E_INACT | 0x0 | No Interrupt
62297  * ALT_USB_DEV_DIEPINT3_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
62298  *
62299  * Field Access Macros:
62300  *
62301  */
62302 /*
62303  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_EPDISBLD
62304  *
62305  * No Interrupt
62306  */
62307 #define ALT_USB_DEV_DIEPINT3_EPDISBLD_E_INACT 0x0
62308 /*
62309  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_EPDISBLD
62310  *
62311  * Endpoint Disabled Interrupt
62312  */
62313 #define ALT_USB_DEV_DIEPINT3_EPDISBLD_E_ACT 0x1
62314 
62315 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_EPDISBLD register field. */
62316 #define ALT_USB_DEV_DIEPINT3_EPDISBLD_LSB 1
62317 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_EPDISBLD register field. */
62318 #define ALT_USB_DEV_DIEPINT3_EPDISBLD_MSB 1
62319 /* The width in bits of the ALT_USB_DEV_DIEPINT3_EPDISBLD register field. */
62320 #define ALT_USB_DEV_DIEPINT3_EPDISBLD_WIDTH 1
62321 /* The mask used to set the ALT_USB_DEV_DIEPINT3_EPDISBLD register field value. */
62322 #define ALT_USB_DEV_DIEPINT3_EPDISBLD_SET_MSK 0x00000002
62323 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_EPDISBLD register field value. */
62324 #define ALT_USB_DEV_DIEPINT3_EPDISBLD_CLR_MSK 0xfffffffd
62325 /* The reset value of the ALT_USB_DEV_DIEPINT3_EPDISBLD register field. */
62326 #define ALT_USB_DEV_DIEPINT3_EPDISBLD_RESET 0x0
62327 /* Extracts the ALT_USB_DEV_DIEPINT3_EPDISBLD field value from a register. */
62328 #define ALT_USB_DEV_DIEPINT3_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
62329 /* Produces a ALT_USB_DEV_DIEPINT3_EPDISBLD register field value suitable for setting the register. */
62330 #define ALT_USB_DEV_DIEPINT3_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
62331 
62332 /*
62333  * Field : AHB Error - ahberr
62334  *
62335  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
62336  * there is an AHB error during an AHB read/write. The application can read the
62337  * corresponding endpoint DMA address register to get the error address.
62338  *
62339  * Field Enumeration Values:
62340  *
62341  * Enum | Value | Description
62342  * :------------------------------------|:------|:--------------------
62343  * ALT_USB_DEV_DIEPINT3_AHBERR_E_INACT | 0x0 | No Interrupt
62344  * ALT_USB_DEV_DIEPINT3_AHBERR_E_ACT | 0x1 | AHB Error interrupt
62345  *
62346  * Field Access Macros:
62347  *
62348  */
62349 /*
62350  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_AHBERR
62351  *
62352  * No Interrupt
62353  */
62354 #define ALT_USB_DEV_DIEPINT3_AHBERR_E_INACT 0x0
62355 /*
62356  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_AHBERR
62357  *
62358  * AHB Error interrupt
62359  */
62360 #define ALT_USB_DEV_DIEPINT3_AHBERR_E_ACT 0x1
62361 
62362 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_AHBERR register field. */
62363 #define ALT_USB_DEV_DIEPINT3_AHBERR_LSB 2
62364 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_AHBERR register field. */
62365 #define ALT_USB_DEV_DIEPINT3_AHBERR_MSB 2
62366 /* The width in bits of the ALT_USB_DEV_DIEPINT3_AHBERR register field. */
62367 #define ALT_USB_DEV_DIEPINT3_AHBERR_WIDTH 1
62368 /* The mask used to set the ALT_USB_DEV_DIEPINT3_AHBERR register field value. */
62369 #define ALT_USB_DEV_DIEPINT3_AHBERR_SET_MSK 0x00000004
62370 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_AHBERR register field value. */
62371 #define ALT_USB_DEV_DIEPINT3_AHBERR_CLR_MSK 0xfffffffb
62372 /* The reset value of the ALT_USB_DEV_DIEPINT3_AHBERR register field. */
62373 #define ALT_USB_DEV_DIEPINT3_AHBERR_RESET 0x0
62374 /* Extracts the ALT_USB_DEV_DIEPINT3_AHBERR field value from a register. */
62375 #define ALT_USB_DEV_DIEPINT3_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
62376 /* Produces a ALT_USB_DEV_DIEPINT3_AHBERR register field value suitable for setting the register. */
62377 #define ALT_USB_DEV_DIEPINT3_AHBERR_SET(value) (((value) << 2) & 0x00000004)
62378 
62379 /*
62380  * Field : Timeout Condition - timeout
62381  *
62382  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
62383  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
62384  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
62385  * detected a timeout condition on the USB for the last IN token on this endpoint.
62386  *
62387  * Field Enumeration Values:
62388  *
62389  * Enum | Value | Description
62390  * :---------------------------------|:------|:------------------
62391  * ALT_USB_DEV_DIEPINT3_TMO_E_INACT | 0x0 | No interrupt
62392  * ALT_USB_DEV_DIEPINT3_TMO_E_ACT | 0x1 | Timeout interrupy
62393  *
62394  * Field Access Macros:
62395  *
62396  */
62397 /*
62398  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_TMO
62399  *
62400  * No interrupt
62401  */
62402 #define ALT_USB_DEV_DIEPINT3_TMO_E_INACT 0x0
62403 /*
62404  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_TMO
62405  *
62406  * Timeout interrupy
62407  */
62408 #define ALT_USB_DEV_DIEPINT3_TMO_E_ACT 0x1
62409 
62410 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_TMO register field. */
62411 #define ALT_USB_DEV_DIEPINT3_TMO_LSB 3
62412 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_TMO register field. */
62413 #define ALT_USB_DEV_DIEPINT3_TMO_MSB 3
62414 /* The width in bits of the ALT_USB_DEV_DIEPINT3_TMO register field. */
62415 #define ALT_USB_DEV_DIEPINT3_TMO_WIDTH 1
62416 /* The mask used to set the ALT_USB_DEV_DIEPINT3_TMO register field value. */
62417 #define ALT_USB_DEV_DIEPINT3_TMO_SET_MSK 0x00000008
62418 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_TMO register field value. */
62419 #define ALT_USB_DEV_DIEPINT3_TMO_CLR_MSK 0xfffffff7
62420 /* The reset value of the ALT_USB_DEV_DIEPINT3_TMO register field. */
62421 #define ALT_USB_DEV_DIEPINT3_TMO_RESET 0x0
62422 /* Extracts the ALT_USB_DEV_DIEPINT3_TMO field value from a register. */
62423 #define ALT_USB_DEV_DIEPINT3_TMO_GET(value) (((value) & 0x00000008) >> 3)
62424 /* Produces a ALT_USB_DEV_DIEPINT3_TMO register field value suitable for setting the register. */
62425 #define ALT_USB_DEV_DIEPINT3_TMO_SET(value) (((value) << 3) & 0x00000008)
62426 
62427 /*
62428  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
62429  *
62430  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
62431  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
62432  * interrupt is asserted on the endpoint for which the IN token was received.
62433  *
62434  * Field Enumeration Values:
62435  *
62436  * Enum | Value | Description
62437  * :-----------------------------------------|:------|:----------------------------
62438  * ALT_USB_DEV_DIEPINT3_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
62439  * ALT_USB_DEV_DIEPINT3_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
62440  *
62441  * Field Access Macros:
62442  *
62443  */
62444 /*
62445  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_INTKNTXFEMP
62446  *
62447  * No interrupt
62448  */
62449 #define ALT_USB_DEV_DIEPINT3_INTKNTXFEMP_E_INACT 0x0
62450 /*
62451  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_INTKNTXFEMP
62452  *
62453  * IN Token Received Interrupt
62454  */
62455 #define ALT_USB_DEV_DIEPINT3_INTKNTXFEMP_E_ACT 0x1
62456 
62457 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_INTKNTXFEMP register field. */
62458 #define ALT_USB_DEV_DIEPINT3_INTKNTXFEMP_LSB 4
62459 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_INTKNTXFEMP register field. */
62460 #define ALT_USB_DEV_DIEPINT3_INTKNTXFEMP_MSB 4
62461 /* The width in bits of the ALT_USB_DEV_DIEPINT3_INTKNTXFEMP register field. */
62462 #define ALT_USB_DEV_DIEPINT3_INTKNTXFEMP_WIDTH 1
62463 /* The mask used to set the ALT_USB_DEV_DIEPINT3_INTKNTXFEMP register field value. */
62464 #define ALT_USB_DEV_DIEPINT3_INTKNTXFEMP_SET_MSK 0x00000010
62465 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_INTKNTXFEMP register field value. */
62466 #define ALT_USB_DEV_DIEPINT3_INTKNTXFEMP_CLR_MSK 0xffffffef
62467 /* The reset value of the ALT_USB_DEV_DIEPINT3_INTKNTXFEMP register field. */
62468 #define ALT_USB_DEV_DIEPINT3_INTKNTXFEMP_RESET 0x0
62469 /* Extracts the ALT_USB_DEV_DIEPINT3_INTKNTXFEMP field value from a register. */
62470 #define ALT_USB_DEV_DIEPINT3_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
62471 /* Produces a ALT_USB_DEV_DIEPINT3_INTKNTXFEMP register field value suitable for setting the register. */
62472 #define ALT_USB_DEV_DIEPINT3_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
62473 
62474 /*
62475  * Field : IN Token Received with EP Mismatch - intknepmis
62476  *
62477  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
62478  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
62479  * IN token was received. This interrupt is asserted on the endpoint for which the
62480  * IN token was received.
62481  *
62482  * Field Enumeration Values:
62483  *
62484  * Enum | Value | Description
62485  * :----------------------------------------|:------|:---------------------------------------------
62486  * ALT_USB_DEV_DIEPINT3_INTKNEPMIS_E_INACT | 0x0 | No interrupt
62487  * ALT_USB_DEV_DIEPINT3_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
62488  *
62489  * Field Access Macros:
62490  *
62491  */
62492 /*
62493  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_INTKNEPMIS
62494  *
62495  * No interrupt
62496  */
62497 #define ALT_USB_DEV_DIEPINT3_INTKNEPMIS_E_INACT 0x0
62498 /*
62499  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_INTKNEPMIS
62500  *
62501  * IN Token Received with EP Mismatch interrupt
62502  */
62503 #define ALT_USB_DEV_DIEPINT3_INTKNEPMIS_E_ACT 0x1
62504 
62505 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_INTKNEPMIS register field. */
62506 #define ALT_USB_DEV_DIEPINT3_INTKNEPMIS_LSB 5
62507 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_INTKNEPMIS register field. */
62508 #define ALT_USB_DEV_DIEPINT3_INTKNEPMIS_MSB 5
62509 /* The width in bits of the ALT_USB_DEV_DIEPINT3_INTKNEPMIS register field. */
62510 #define ALT_USB_DEV_DIEPINT3_INTKNEPMIS_WIDTH 1
62511 /* The mask used to set the ALT_USB_DEV_DIEPINT3_INTKNEPMIS register field value. */
62512 #define ALT_USB_DEV_DIEPINT3_INTKNEPMIS_SET_MSK 0x00000020
62513 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_INTKNEPMIS register field value. */
62514 #define ALT_USB_DEV_DIEPINT3_INTKNEPMIS_CLR_MSK 0xffffffdf
62515 /* The reset value of the ALT_USB_DEV_DIEPINT3_INTKNEPMIS register field. */
62516 #define ALT_USB_DEV_DIEPINT3_INTKNEPMIS_RESET 0x0
62517 /* Extracts the ALT_USB_DEV_DIEPINT3_INTKNEPMIS field value from a register. */
62518 #define ALT_USB_DEV_DIEPINT3_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
62519 /* Produces a ALT_USB_DEV_DIEPINT3_INTKNEPMIS register field value suitable for setting the register. */
62520 #define ALT_USB_DEV_DIEPINT3_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
62521 
62522 /*
62523  * Field : IN Endpoint NAK Effective - inepnakeff
62524  *
62525  * Applies to periodic IN endpoints only. This bit can be cleared when the
62526  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
62527  * interrupt indicates that the core has sampled the NAK bit Set (either by the
62528  * application or by the core). The interrupt indicates that the IN endpoint NAK
62529  * bit Set by the application has taken effect in the core.This interrupt does not
62530  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
62531  * over a NAK bit.
62532  *
62533  * Field Enumeration Values:
62534  *
62535  * Enum | Value | Description
62536  * :----------------------------------------|:------|:------------------------------------
62537  * ALT_USB_DEV_DIEPINT3_INEPNAKEFF_E_INACT | 0x0 | No interrupt
62538  * ALT_USB_DEV_DIEPINT3_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
62539  *
62540  * Field Access Macros:
62541  *
62542  */
62543 /*
62544  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_INEPNAKEFF
62545  *
62546  * No interrupt
62547  */
62548 #define ALT_USB_DEV_DIEPINT3_INEPNAKEFF_E_INACT 0x0
62549 /*
62550  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_INEPNAKEFF
62551  *
62552  * IN Endpoint NAK Effective interrupt
62553  */
62554 #define ALT_USB_DEV_DIEPINT3_INEPNAKEFF_E_ACT 0x1
62555 
62556 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_INEPNAKEFF register field. */
62557 #define ALT_USB_DEV_DIEPINT3_INEPNAKEFF_LSB 6
62558 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_INEPNAKEFF register field. */
62559 #define ALT_USB_DEV_DIEPINT3_INEPNAKEFF_MSB 6
62560 /* The width in bits of the ALT_USB_DEV_DIEPINT3_INEPNAKEFF register field. */
62561 #define ALT_USB_DEV_DIEPINT3_INEPNAKEFF_WIDTH 1
62562 /* The mask used to set the ALT_USB_DEV_DIEPINT3_INEPNAKEFF register field value. */
62563 #define ALT_USB_DEV_DIEPINT3_INEPNAKEFF_SET_MSK 0x00000040
62564 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_INEPNAKEFF register field value. */
62565 #define ALT_USB_DEV_DIEPINT3_INEPNAKEFF_CLR_MSK 0xffffffbf
62566 /* The reset value of the ALT_USB_DEV_DIEPINT3_INEPNAKEFF register field. */
62567 #define ALT_USB_DEV_DIEPINT3_INEPNAKEFF_RESET 0x0
62568 /* Extracts the ALT_USB_DEV_DIEPINT3_INEPNAKEFF field value from a register. */
62569 #define ALT_USB_DEV_DIEPINT3_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
62570 /* Produces a ALT_USB_DEV_DIEPINT3_INEPNAKEFF register field value suitable for setting the register. */
62571 #define ALT_USB_DEV_DIEPINT3_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
62572 
62573 /*
62574  * Field : Transmit FIFO Empty - txfemp
62575  *
62576  * This bit is valid only for IN Endpoints This interrupt is asserted when the
62577  * TxFIFO for this endpoint is either half or completely empty. The half or
62578  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
62579  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
62580  *
62581  * Field Enumeration Values:
62582  *
62583  * Enum | Value | Description
62584  * :------------------------------------|:------|:------------------------------
62585  * ALT_USB_DEV_DIEPINT3_TXFEMP_E_INACT | 0x0 | No interrupt
62586  * ALT_USB_DEV_DIEPINT3_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
62587  *
62588  * Field Access Macros:
62589  *
62590  */
62591 /*
62592  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_TXFEMP
62593  *
62594  * No interrupt
62595  */
62596 #define ALT_USB_DEV_DIEPINT3_TXFEMP_E_INACT 0x0
62597 /*
62598  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_TXFEMP
62599  *
62600  * Transmit FIFO Empty interrupt
62601  */
62602 #define ALT_USB_DEV_DIEPINT3_TXFEMP_E_ACT 0x1
62603 
62604 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_TXFEMP register field. */
62605 #define ALT_USB_DEV_DIEPINT3_TXFEMP_LSB 7
62606 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_TXFEMP register field. */
62607 #define ALT_USB_DEV_DIEPINT3_TXFEMP_MSB 7
62608 /* The width in bits of the ALT_USB_DEV_DIEPINT3_TXFEMP register field. */
62609 #define ALT_USB_DEV_DIEPINT3_TXFEMP_WIDTH 1
62610 /* The mask used to set the ALT_USB_DEV_DIEPINT3_TXFEMP register field value. */
62611 #define ALT_USB_DEV_DIEPINT3_TXFEMP_SET_MSK 0x00000080
62612 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_TXFEMP register field value. */
62613 #define ALT_USB_DEV_DIEPINT3_TXFEMP_CLR_MSK 0xffffff7f
62614 /* The reset value of the ALT_USB_DEV_DIEPINT3_TXFEMP register field. */
62615 #define ALT_USB_DEV_DIEPINT3_TXFEMP_RESET 0x1
62616 /* Extracts the ALT_USB_DEV_DIEPINT3_TXFEMP field value from a register. */
62617 #define ALT_USB_DEV_DIEPINT3_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
62618 /* Produces a ALT_USB_DEV_DIEPINT3_TXFEMP register field value suitable for setting the register. */
62619 #define ALT_USB_DEV_DIEPINT3_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
62620 
62621 /*
62622  * Field : Fifo Underrun - txfifoundrn
62623  *
62624  * Applies to IN endpoints Only. The core generates this interrupt when it detects
62625  * a transmit FIFO underrun condition for this endpoint.
62626  *
62627  * Field Enumeration Values:
62628  *
62629  * Enum | Value | Description
62630  * :-----------------------------------------|:------|:------------------------
62631  * ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
62632  * ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
62633  *
62634  * Field Access Macros:
62635  *
62636  */
62637 /*
62638  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN
62639  *
62640  * No interrupt
62641  */
62642 #define ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN_E_INACT 0x0
62643 /*
62644  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN
62645  *
62646  * Fifo Underrun interrupt
62647  */
62648 #define ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN_E_ACT 0x1
62649 
62650 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN register field. */
62651 #define ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN_LSB 8
62652 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN register field. */
62653 #define ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN_MSB 8
62654 /* The width in bits of the ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN register field. */
62655 #define ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN_WIDTH 1
62656 /* The mask used to set the ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN register field value. */
62657 #define ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN_SET_MSK 0x00000100
62658 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN register field value. */
62659 #define ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN_CLR_MSK 0xfffffeff
62660 /* The reset value of the ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN register field. */
62661 #define ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN_RESET 0x0
62662 /* Extracts the ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN field value from a register. */
62663 #define ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
62664 /* Produces a ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN register field value suitable for setting the register. */
62665 #define ALT_USB_DEV_DIEPINT3_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
62666 
62667 /*
62668  * Field : BNA Interrupt - bnaintr
62669  *
62670  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
62671  * generates this interrupt when the descriptor accessed is not ready for the Core
62672  * to process, such as Host busy or DMA done
62673  *
62674  * Field Enumeration Values:
62675  *
62676  * Enum | Value | Description
62677  * :-------------------------------------|:------|:--------------
62678  * ALT_USB_DEV_DIEPINT3_BNAINTR_E_INACT | 0x0 | No interrupt
62679  * ALT_USB_DEV_DIEPINT3_BNAINTR_E_ACT | 0x1 | BNA interrupt
62680  *
62681  * Field Access Macros:
62682  *
62683  */
62684 /*
62685  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_BNAINTR
62686  *
62687  * No interrupt
62688  */
62689 #define ALT_USB_DEV_DIEPINT3_BNAINTR_E_INACT 0x0
62690 /*
62691  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_BNAINTR
62692  *
62693  * BNA interrupt
62694  */
62695 #define ALT_USB_DEV_DIEPINT3_BNAINTR_E_ACT 0x1
62696 
62697 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_BNAINTR register field. */
62698 #define ALT_USB_DEV_DIEPINT3_BNAINTR_LSB 9
62699 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_BNAINTR register field. */
62700 #define ALT_USB_DEV_DIEPINT3_BNAINTR_MSB 9
62701 /* The width in bits of the ALT_USB_DEV_DIEPINT3_BNAINTR register field. */
62702 #define ALT_USB_DEV_DIEPINT3_BNAINTR_WIDTH 1
62703 /* The mask used to set the ALT_USB_DEV_DIEPINT3_BNAINTR register field value. */
62704 #define ALT_USB_DEV_DIEPINT3_BNAINTR_SET_MSK 0x00000200
62705 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_BNAINTR register field value. */
62706 #define ALT_USB_DEV_DIEPINT3_BNAINTR_CLR_MSK 0xfffffdff
62707 /* The reset value of the ALT_USB_DEV_DIEPINT3_BNAINTR register field. */
62708 #define ALT_USB_DEV_DIEPINT3_BNAINTR_RESET 0x0
62709 /* Extracts the ALT_USB_DEV_DIEPINT3_BNAINTR field value from a register. */
62710 #define ALT_USB_DEV_DIEPINT3_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
62711 /* Produces a ALT_USB_DEV_DIEPINT3_BNAINTR register field value suitable for setting the register. */
62712 #define ALT_USB_DEV_DIEPINT3_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
62713 
62714 /*
62715  * Field : Packet Drop Status - pktdrpsts
62716  *
62717  * This bit indicates to the application that an ISOC OUT packet has been dropped.
62718  * This bit does not have an associated mask bit and does not generate an
62719  * interrupt.
62720  *
62721  * Field Enumeration Values:
62722  *
62723  * Enum | Value | Description
62724  * :---------------------------------------|:------|:-----------------------------
62725  * ALT_USB_DEV_DIEPINT3_PKTDRPSTS_E_INACT | 0x0 | No interrupt
62726  * ALT_USB_DEV_DIEPINT3_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
62727  *
62728  * Field Access Macros:
62729  *
62730  */
62731 /*
62732  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_PKTDRPSTS
62733  *
62734  * No interrupt
62735  */
62736 #define ALT_USB_DEV_DIEPINT3_PKTDRPSTS_E_INACT 0x0
62737 /*
62738  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_PKTDRPSTS
62739  *
62740  * Packet Drop Status interrupt
62741  */
62742 #define ALT_USB_DEV_DIEPINT3_PKTDRPSTS_E_ACT 0x1
62743 
62744 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_PKTDRPSTS register field. */
62745 #define ALT_USB_DEV_DIEPINT3_PKTDRPSTS_LSB 11
62746 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_PKTDRPSTS register field. */
62747 #define ALT_USB_DEV_DIEPINT3_PKTDRPSTS_MSB 11
62748 /* The width in bits of the ALT_USB_DEV_DIEPINT3_PKTDRPSTS register field. */
62749 #define ALT_USB_DEV_DIEPINT3_PKTDRPSTS_WIDTH 1
62750 /* The mask used to set the ALT_USB_DEV_DIEPINT3_PKTDRPSTS register field value. */
62751 #define ALT_USB_DEV_DIEPINT3_PKTDRPSTS_SET_MSK 0x00000800
62752 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_PKTDRPSTS register field value. */
62753 #define ALT_USB_DEV_DIEPINT3_PKTDRPSTS_CLR_MSK 0xfffff7ff
62754 /* The reset value of the ALT_USB_DEV_DIEPINT3_PKTDRPSTS register field. */
62755 #define ALT_USB_DEV_DIEPINT3_PKTDRPSTS_RESET 0x0
62756 /* Extracts the ALT_USB_DEV_DIEPINT3_PKTDRPSTS field value from a register. */
62757 #define ALT_USB_DEV_DIEPINT3_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
62758 /* Produces a ALT_USB_DEV_DIEPINT3_PKTDRPSTS register field value suitable for setting the register. */
62759 #define ALT_USB_DEV_DIEPINT3_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
62760 
62761 /*
62762  * Field : BbleErr Interrupt - bbleerr
62763  *
62764  * The core generates this interrupt when babble is received for the endpoint.
62765  *
62766  * Field Enumeration Values:
62767  *
62768  * Enum | Value | Description
62769  * :-------------------------------------|:------|:------------------
62770  * ALT_USB_DEV_DIEPINT3_BBLEERR_E_INACT | 0x0 | No interrupt
62771  * ALT_USB_DEV_DIEPINT3_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
62772  *
62773  * Field Access Macros:
62774  *
62775  */
62776 /*
62777  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_BBLEERR
62778  *
62779  * No interrupt
62780  */
62781 #define ALT_USB_DEV_DIEPINT3_BBLEERR_E_INACT 0x0
62782 /*
62783  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_BBLEERR
62784  *
62785  * BbleErr interrupt
62786  */
62787 #define ALT_USB_DEV_DIEPINT3_BBLEERR_E_ACT 0x1
62788 
62789 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_BBLEERR register field. */
62790 #define ALT_USB_DEV_DIEPINT3_BBLEERR_LSB 12
62791 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_BBLEERR register field. */
62792 #define ALT_USB_DEV_DIEPINT3_BBLEERR_MSB 12
62793 /* The width in bits of the ALT_USB_DEV_DIEPINT3_BBLEERR register field. */
62794 #define ALT_USB_DEV_DIEPINT3_BBLEERR_WIDTH 1
62795 /* The mask used to set the ALT_USB_DEV_DIEPINT3_BBLEERR register field value. */
62796 #define ALT_USB_DEV_DIEPINT3_BBLEERR_SET_MSK 0x00001000
62797 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_BBLEERR register field value. */
62798 #define ALT_USB_DEV_DIEPINT3_BBLEERR_CLR_MSK 0xffffefff
62799 /* The reset value of the ALT_USB_DEV_DIEPINT3_BBLEERR register field. */
62800 #define ALT_USB_DEV_DIEPINT3_BBLEERR_RESET 0x0
62801 /* Extracts the ALT_USB_DEV_DIEPINT3_BBLEERR field value from a register. */
62802 #define ALT_USB_DEV_DIEPINT3_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
62803 /* Produces a ALT_USB_DEV_DIEPINT3_BBLEERR register field value suitable for setting the register. */
62804 #define ALT_USB_DEV_DIEPINT3_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
62805 
62806 /*
62807  * Field : NAK Interrupt - nakintrpt
62808  *
62809  * The core generates this interrupt when a NAK is transmitted or received by the
62810  * device. In case of isochronous IN endpoints the interrupt gets generated when a
62811  * zero length packet is transmitted due to un-availability of data in the TXFifo.
62812  *
62813  * Field Enumeration Values:
62814  *
62815  * Enum | Value | Description
62816  * :---------------------------------------|:------|:--------------
62817  * ALT_USB_DEV_DIEPINT3_NAKINTRPT_E_INACT | 0x0 | No interrupt
62818  * ALT_USB_DEV_DIEPINT3_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
62819  *
62820  * Field Access Macros:
62821  *
62822  */
62823 /*
62824  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_NAKINTRPT
62825  *
62826  * No interrupt
62827  */
62828 #define ALT_USB_DEV_DIEPINT3_NAKINTRPT_E_INACT 0x0
62829 /*
62830  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_NAKINTRPT
62831  *
62832  * NAK Interrupt
62833  */
62834 #define ALT_USB_DEV_DIEPINT3_NAKINTRPT_E_ACT 0x1
62835 
62836 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_NAKINTRPT register field. */
62837 #define ALT_USB_DEV_DIEPINT3_NAKINTRPT_LSB 13
62838 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_NAKINTRPT register field. */
62839 #define ALT_USB_DEV_DIEPINT3_NAKINTRPT_MSB 13
62840 /* The width in bits of the ALT_USB_DEV_DIEPINT3_NAKINTRPT register field. */
62841 #define ALT_USB_DEV_DIEPINT3_NAKINTRPT_WIDTH 1
62842 /* The mask used to set the ALT_USB_DEV_DIEPINT3_NAKINTRPT register field value. */
62843 #define ALT_USB_DEV_DIEPINT3_NAKINTRPT_SET_MSK 0x00002000
62844 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_NAKINTRPT register field value. */
62845 #define ALT_USB_DEV_DIEPINT3_NAKINTRPT_CLR_MSK 0xffffdfff
62846 /* The reset value of the ALT_USB_DEV_DIEPINT3_NAKINTRPT register field. */
62847 #define ALT_USB_DEV_DIEPINT3_NAKINTRPT_RESET 0x0
62848 /* Extracts the ALT_USB_DEV_DIEPINT3_NAKINTRPT field value from a register. */
62849 #define ALT_USB_DEV_DIEPINT3_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
62850 /* Produces a ALT_USB_DEV_DIEPINT3_NAKINTRPT register field value suitable for setting the register. */
62851 #define ALT_USB_DEV_DIEPINT3_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
62852 
62853 /*
62854  * Field : NYET Interrupt - nyetintrpt
62855  *
62856  * The core generates this interrupt when a NYET response is transmitted for a non
62857  * isochronous OUT endpoint.
62858  *
62859  * Field Enumeration Values:
62860  *
62861  * Enum | Value | Description
62862  * :----------------------------------------|:------|:---------------
62863  * ALT_USB_DEV_DIEPINT3_NYETINTRPT_E_INACT | 0x0 | No interrupt
62864  * ALT_USB_DEV_DIEPINT3_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
62865  *
62866  * Field Access Macros:
62867  *
62868  */
62869 /*
62870  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_NYETINTRPT
62871  *
62872  * No interrupt
62873  */
62874 #define ALT_USB_DEV_DIEPINT3_NYETINTRPT_E_INACT 0x0
62875 /*
62876  * Enumerated value for register field ALT_USB_DEV_DIEPINT3_NYETINTRPT
62877  *
62878  * NYET Interrupt
62879  */
62880 #define ALT_USB_DEV_DIEPINT3_NYETINTRPT_E_ACT 0x1
62881 
62882 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT3_NYETINTRPT register field. */
62883 #define ALT_USB_DEV_DIEPINT3_NYETINTRPT_LSB 14
62884 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT3_NYETINTRPT register field. */
62885 #define ALT_USB_DEV_DIEPINT3_NYETINTRPT_MSB 14
62886 /* The width in bits of the ALT_USB_DEV_DIEPINT3_NYETINTRPT register field. */
62887 #define ALT_USB_DEV_DIEPINT3_NYETINTRPT_WIDTH 1
62888 /* The mask used to set the ALT_USB_DEV_DIEPINT3_NYETINTRPT register field value. */
62889 #define ALT_USB_DEV_DIEPINT3_NYETINTRPT_SET_MSK 0x00004000
62890 /* The mask used to clear the ALT_USB_DEV_DIEPINT3_NYETINTRPT register field value. */
62891 #define ALT_USB_DEV_DIEPINT3_NYETINTRPT_CLR_MSK 0xffffbfff
62892 /* The reset value of the ALT_USB_DEV_DIEPINT3_NYETINTRPT register field. */
62893 #define ALT_USB_DEV_DIEPINT3_NYETINTRPT_RESET 0x0
62894 /* Extracts the ALT_USB_DEV_DIEPINT3_NYETINTRPT field value from a register. */
62895 #define ALT_USB_DEV_DIEPINT3_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
62896 /* Produces a ALT_USB_DEV_DIEPINT3_NYETINTRPT register field value suitable for setting the register. */
62897 #define ALT_USB_DEV_DIEPINT3_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
62898 
62899 #ifndef __ASSEMBLY__
62900 /*
62901  * WARNING: The C register and register group struct declarations are provided for
62902  * convenience and illustrative purposes. They should, however, be used with
62903  * caution as the C language standard provides no guarantees about the alignment or
62904  * atomicity of device memory accesses. The recommended practice for writing
62905  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
62906  * alt_write_word() functions.
62907  *
62908  * The struct declaration for register ALT_USB_DEV_DIEPINT3.
62909  */
62910 struct ALT_USB_DEV_DIEPINT3_s
62911 {
62912  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
62913  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
62914  const uint32_t ahberr : 1; /* AHB Error */
62915  const uint32_t timeout : 1; /* Timeout Condition */
62916  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
62917  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
62918  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
62919  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
62920  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
62921  const uint32_t bnaintr : 1; /* BNA Interrupt */
62922  uint32_t : 1; /* *UNDEFINED* */
62923  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
62924  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
62925  const uint32_t nakintrpt : 1; /* NAK Interrupt */
62926  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
62927  uint32_t : 17; /* *UNDEFINED* */
62928 };
62929 
62930 /* The typedef declaration for register ALT_USB_DEV_DIEPINT3. */
62931 typedef volatile struct ALT_USB_DEV_DIEPINT3_s ALT_USB_DEV_DIEPINT3_t;
62932 #endif /* __ASSEMBLY__ */
62933 
62934 /* The byte offset of the ALT_USB_DEV_DIEPINT3 register from the beginning of the component. */
62935 #define ALT_USB_DEV_DIEPINT3_OFST 0x168
62936 /* The address of the ALT_USB_DEV_DIEPINT3 register. */
62937 #define ALT_USB_DEV_DIEPINT3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT3_OFST))
62938 
62939 /*
62940  * Register : Device IN Endpoint 3 Transfer Size Registe - dieptsiz3
62941  *
62942  * The application must modify this register before enabling the endpoint. Once the
62943  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
62944  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
62945  * application can only read this register once the core has cleared the Endpoint
62946  * Enable bit.
62947  *
62948  * Register Layout
62949  *
62950  * Bits | Access | Reset | Description
62951  * :--------|:-------|:------|:----------------------------
62952  * [18:0] | RW | 0x0 | Transfer Size
62953  * [28:19] | RW | 0x0 | Packet Count
62954  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
62955  * [31] | ??? | 0x0 | *UNDEFINED*
62956  *
62957  */
62958 /*
62959  * Field : Transfer Size - xfersize
62960  *
62961  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
62962  * application only after it has exhausted the transfer size amount of data. The
62963  * transfer size can be Set to the maximum packet size of the endpoint, to be
62964  * interrupted at the end of each packet. The core decrements this field every time
62965  * a packet from the external memory is written to the TxFIFO.
62966  *
62967  * Field Access Macros:
62968  *
62969  */
62970 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ3_XFERSIZE register field. */
62971 #define ALT_USB_DEV_DIEPTSIZ3_XFERSIZE_LSB 0
62972 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ3_XFERSIZE register field. */
62973 #define ALT_USB_DEV_DIEPTSIZ3_XFERSIZE_MSB 18
62974 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ3_XFERSIZE register field. */
62975 #define ALT_USB_DEV_DIEPTSIZ3_XFERSIZE_WIDTH 19
62976 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ3_XFERSIZE register field value. */
62977 #define ALT_USB_DEV_DIEPTSIZ3_XFERSIZE_SET_MSK 0x0007ffff
62978 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ3_XFERSIZE register field value. */
62979 #define ALT_USB_DEV_DIEPTSIZ3_XFERSIZE_CLR_MSK 0xfff80000
62980 /* The reset value of the ALT_USB_DEV_DIEPTSIZ3_XFERSIZE register field. */
62981 #define ALT_USB_DEV_DIEPTSIZ3_XFERSIZE_RESET 0x0
62982 /* Extracts the ALT_USB_DEV_DIEPTSIZ3_XFERSIZE field value from a register. */
62983 #define ALT_USB_DEV_DIEPTSIZ3_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
62984 /* Produces a ALT_USB_DEV_DIEPTSIZ3_XFERSIZE register field value suitable for setting the register. */
62985 #define ALT_USB_DEV_DIEPTSIZ3_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
62986 
62987 /*
62988  * Field : Packet Count - PktCnt
62989  *
62990  * Indicates the total number of USB packets that constitute the Transfer Size
62991  * amount of data for endpoint 0.This field is decremented every time a packet
62992  * (maximum size or short packet) is read from the TxFIFO.
62993  *
62994  * Field Access Macros:
62995  *
62996  */
62997 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ3_PKTCNT register field. */
62998 #define ALT_USB_DEV_DIEPTSIZ3_PKTCNT_LSB 19
62999 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ3_PKTCNT register field. */
63000 #define ALT_USB_DEV_DIEPTSIZ3_PKTCNT_MSB 28
63001 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ3_PKTCNT register field. */
63002 #define ALT_USB_DEV_DIEPTSIZ3_PKTCNT_WIDTH 10
63003 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ3_PKTCNT register field value. */
63004 #define ALT_USB_DEV_DIEPTSIZ3_PKTCNT_SET_MSK 0x1ff80000
63005 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ3_PKTCNT register field value. */
63006 #define ALT_USB_DEV_DIEPTSIZ3_PKTCNT_CLR_MSK 0xe007ffff
63007 /* The reset value of the ALT_USB_DEV_DIEPTSIZ3_PKTCNT register field. */
63008 #define ALT_USB_DEV_DIEPTSIZ3_PKTCNT_RESET 0x0
63009 /* Extracts the ALT_USB_DEV_DIEPTSIZ3_PKTCNT field value from a register. */
63010 #define ALT_USB_DEV_DIEPTSIZ3_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
63011 /* Produces a ALT_USB_DEV_DIEPTSIZ3_PKTCNT register field value suitable for setting the register. */
63012 #define ALT_USB_DEV_DIEPTSIZ3_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
63013 
63014 /*
63015  * Field : Applies to IN endpoints onl - mc
63016  *
63017  * for periodic IN endpoints, this field indicates the number of packets that must
63018  * be transmitted per microframe on the USB. The core uses this field to calculate
63019  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
63020  * field is valid only in Internal DMA mode. It specifies the number of packets the
63021  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
63022  * by the Next Endpoint field of the Device Endpoint-n Control register
63023  * (DIEPCTLn.NextEp)
63024  *
63025  * Field Enumeration Values:
63026  *
63027  * Enum | Value | Description
63028  * :------------------------------------|:------|:------------
63029  * ALT_USB_DEV_DIEPTSIZ3_MC_E_PKTONE | 0x1 | 1 packet
63030  * ALT_USB_DEV_DIEPTSIZ3_MC_E_PKTTWO | 0x2 | 2 packets
63031  * ALT_USB_DEV_DIEPTSIZ3_MC_E_PKTTHREE | 0x3 | 3 packets
63032  *
63033  * Field Access Macros:
63034  *
63035  */
63036 /*
63037  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ3_MC
63038  *
63039  * 1 packet
63040  */
63041 #define ALT_USB_DEV_DIEPTSIZ3_MC_E_PKTONE 0x1
63042 /*
63043  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ3_MC
63044  *
63045  * 2 packets
63046  */
63047 #define ALT_USB_DEV_DIEPTSIZ3_MC_E_PKTTWO 0x2
63048 /*
63049  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ3_MC
63050  *
63051  * 3 packets
63052  */
63053 #define ALT_USB_DEV_DIEPTSIZ3_MC_E_PKTTHREE 0x3
63054 
63055 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ3_MC register field. */
63056 #define ALT_USB_DEV_DIEPTSIZ3_MC_LSB 29
63057 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ3_MC register field. */
63058 #define ALT_USB_DEV_DIEPTSIZ3_MC_MSB 30
63059 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ3_MC register field. */
63060 #define ALT_USB_DEV_DIEPTSIZ3_MC_WIDTH 2
63061 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ3_MC register field value. */
63062 #define ALT_USB_DEV_DIEPTSIZ3_MC_SET_MSK 0x60000000
63063 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ3_MC register field value. */
63064 #define ALT_USB_DEV_DIEPTSIZ3_MC_CLR_MSK 0x9fffffff
63065 /* The reset value of the ALT_USB_DEV_DIEPTSIZ3_MC register field. */
63066 #define ALT_USB_DEV_DIEPTSIZ3_MC_RESET 0x0
63067 /* Extracts the ALT_USB_DEV_DIEPTSIZ3_MC field value from a register. */
63068 #define ALT_USB_DEV_DIEPTSIZ3_MC_GET(value) (((value) & 0x60000000) >> 29)
63069 /* Produces a ALT_USB_DEV_DIEPTSIZ3_MC register field value suitable for setting the register. */
63070 #define ALT_USB_DEV_DIEPTSIZ3_MC_SET(value) (((value) << 29) & 0x60000000)
63071 
63072 #ifndef __ASSEMBLY__
63073 /*
63074  * WARNING: The C register and register group struct declarations are provided for
63075  * convenience and illustrative purposes. They should, however, be used with
63076  * caution as the C language standard provides no guarantees about the alignment or
63077  * atomicity of device memory accesses. The recommended practice for writing
63078  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
63079  * alt_write_word() functions.
63080  *
63081  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ3.
63082  */
63083 struct ALT_USB_DEV_DIEPTSIZ3_s
63084 {
63085  uint32_t xfersize : 19; /* Transfer Size */
63086  uint32_t PktCnt : 10; /* Packet Count */
63087  uint32_t mc : 2; /* Applies to IN endpoints onl */
63088  uint32_t : 1; /* *UNDEFINED* */
63089 };
63090 
63091 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ3. */
63092 typedef volatile struct ALT_USB_DEV_DIEPTSIZ3_s ALT_USB_DEV_DIEPTSIZ3_t;
63093 #endif /* __ASSEMBLY__ */
63094 
63095 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ3 register from the beginning of the component. */
63096 #define ALT_USB_DEV_DIEPTSIZ3_OFST 0x170
63097 /* The address of the ALT_USB_DEV_DIEPTSIZ3 register. */
63098 #define ALT_USB_DEV_DIEPTSIZ3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ3_OFST))
63099 
63100 /*
63101  * Register : Device IN Endpoint 3 DMA Address Registe - diepdma3
63102  *
63103  * DMA Addressing.
63104  *
63105  * Register Layout
63106  *
63107  * Bits | Access | Reset | Description
63108  * :-------|:-------|:--------|:------------
63109  * [31:0] | RW | Unknown | DMA Address
63110  *
63111  */
63112 /*
63113  * Field : DMA Address - diepdma3
63114  *
63115  * Holds the start address of the external memory for storing or fetching endpoint
63116  * data. for control endpoints, this field stores control OUT data packets as well
63117  * as SETUP transaction data packets. When more than three SETUP packets are
63118  * received back-to-back, the SETUP data packet in the memory is overwritten. This
63119  * register is incremented on every AHB transaction. The application can give only
63120  * a DWORD-aligned address.
63121  *
63122  * When Scatter/Gather DMA mode is not enabled, the application programs the start
63123  * address value in this field.
63124  *
63125  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
63126  * for the descriptor list.
63127  *
63128  * Field Access Macros:
63129  *
63130  */
63131 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA3_DIEPDMA3 register field. */
63132 #define ALT_USB_DEV_DIEPDMA3_DIEPDMA3_LSB 0
63133 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA3_DIEPDMA3 register field. */
63134 #define ALT_USB_DEV_DIEPDMA3_DIEPDMA3_MSB 31
63135 /* The width in bits of the ALT_USB_DEV_DIEPDMA3_DIEPDMA3 register field. */
63136 #define ALT_USB_DEV_DIEPDMA3_DIEPDMA3_WIDTH 32
63137 /* The mask used to set the ALT_USB_DEV_DIEPDMA3_DIEPDMA3 register field value. */
63138 #define ALT_USB_DEV_DIEPDMA3_DIEPDMA3_SET_MSK 0xffffffff
63139 /* The mask used to clear the ALT_USB_DEV_DIEPDMA3_DIEPDMA3 register field value. */
63140 #define ALT_USB_DEV_DIEPDMA3_DIEPDMA3_CLR_MSK 0x00000000
63141 /* The reset value of the ALT_USB_DEV_DIEPDMA3_DIEPDMA3 register field is UNKNOWN. */
63142 #define ALT_USB_DEV_DIEPDMA3_DIEPDMA3_RESET 0x0
63143 /* Extracts the ALT_USB_DEV_DIEPDMA3_DIEPDMA3 field value from a register. */
63144 #define ALT_USB_DEV_DIEPDMA3_DIEPDMA3_GET(value) (((value) & 0xffffffff) >> 0)
63145 /* Produces a ALT_USB_DEV_DIEPDMA3_DIEPDMA3 register field value suitable for setting the register. */
63146 #define ALT_USB_DEV_DIEPDMA3_DIEPDMA3_SET(value) (((value) << 0) & 0xffffffff)
63147 
63148 #ifndef __ASSEMBLY__
63149 /*
63150  * WARNING: The C register and register group struct declarations are provided for
63151  * convenience and illustrative purposes. They should, however, be used with
63152  * caution as the C language standard provides no guarantees about the alignment or
63153  * atomicity of device memory accesses. The recommended practice for writing
63154  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
63155  * alt_write_word() functions.
63156  *
63157  * The struct declaration for register ALT_USB_DEV_DIEPDMA3.
63158  */
63159 struct ALT_USB_DEV_DIEPDMA3_s
63160 {
63161  uint32_t diepdma3 : 32; /* DMA Address */
63162 };
63163 
63164 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA3. */
63165 typedef volatile struct ALT_USB_DEV_DIEPDMA3_s ALT_USB_DEV_DIEPDMA3_t;
63166 #endif /* __ASSEMBLY__ */
63167 
63168 /* The byte offset of the ALT_USB_DEV_DIEPDMA3 register from the beginning of the component. */
63169 #define ALT_USB_DEV_DIEPDMA3_OFST 0x174
63170 /* The address of the ALT_USB_DEV_DIEPDMA3 register. */
63171 #define ALT_USB_DEV_DIEPDMA3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA3_OFST))
63172 
63173 /*
63174  * Register : Device IN Endpoint Transmit FIFO Status Register 3 - dtxfsts3
63175  *
63176  * This register contains the free space information for the Device IN endpoint
63177  * TxFIFO.
63178  *
63179  * Register Layout
63180  *
63181  * Bits | Access | Reset | Description
63182  * :--------|:-------|:-------|:-------------------------------
63183  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
63184  * [31:16] | ??? | 0x0 | *UNDEFINED*
63185  *
63186  */
63187 /*
63188  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
63189  *
63190  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
63191  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
63192  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
63193  * 32,768 words available Others: Reserved
63194  *
63195  * Field Access Macros:
63196  *
63197  */
63198 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL register field. */
63199 #define ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL_LSB 0
63200 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL register field. */
63201 #define ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL_MSB 15
63202 /* The width in bits of the ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL register field. */
63203 #define ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL_WIDTH 16
63204 /* The mask used to set the ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL register field value. */
63205 #define ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
63206 /* The mask used to clear the ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL register field value. */
63207 #define ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
63208 /* The reset value of the ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL register field. */
63209 #define ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL_RESET 0x2000
63210 /* Extracts the ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL field value from a register. */
63211 #define ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
63212 /* Produces a ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL register field value suitable for setting the register. */
63213 #define ALT_USB_DEV_DTXFSTS3_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
63214 
63215 #ifndef __ASSEMBLY__
63216 /*
63217  * WARNING: The C register and register group struct declarations are provided for
63218  * convenience and illustrative purposes. They should, however, be used with
63219  * caution as the C language standard provides no guarantees about the alignment or
63220  * atomicity of device memory accesses. The recommended practice for writing
63221  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
63222  * alt_write_word() functions.
63223  *
63224  * The struct declaration for register ALT_USB_DEV_DTXFSTS3.
63225  */
63226 struct ALT_USB_DEV_DTXFSTS3_s
63227 {
63228  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
63229  uint32_t : 16; /* *UNDEFINED* */
63230 };
63231 
63232 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS3. */
63233 typedef volatile struct ALT_USB_DEV_DTXFSTS3_s ALT_USB_DEV_DTXFSTS3_t;
63234 #endif /* __ASSEMBLY__ */
63235 
63236 /* The byte offset of the ALT_USB_DEV_DTXFSTS3 register from the beginning of the component. */
63237 #define ALT_USB_DEV_DTXFSTS3_OFST 0x178
63238 /* The address of the ALT_USB_DEV_DTXFSTS3 register. */
63239 #define ALT_USB_DEV_DTXFSTS3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS3_OFST))
63240 
63241 /*
63242  * Register : Device IN Endpoint 3 DMA Buffer Address Register - diepdmab3
63243  *
63244  * DMA Buffer Address.
63245  *
63246  * Register Layout
63247  *
63248  * Bits | Access | Reset | Description
63249  * :-------|:-------|:--------|:-------------------
63250  * [31:0] | R | Unknown | DMA Buffer Address
63251  *
63252  */
63253 /*
63254  * Field : DMA Buffer Address - diepdmab3
63255  *
63256  * Holds the current buffer address. This register is updated as and when the data
63257  * transfer for the corresponding end point is in progress. This register is
63258  * present only in Scatter/Gather DMA mode.
63259  *
63260  * Field Access Macros:
63261  *
63262  */
63263 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3 register field. */
63264 #define ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3_LSB 0
63265 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3 register field. */
63266 #define ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3_MSB 31
63267 /* The width in bits of the ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3 register field. */
63268 #define ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3_WIDTH 32
63269 /* The mask used to set the ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3 register field value. */
63270 #define ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3_SET_MSK 0xffffffff
63271 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3 register field value. */
63272 #define ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3_CLR_MSK 0x00000000
63273 /* The reset value of the ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3 register field is UNKNOWN. */
63274 #define ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3_RESET 0x0
63275 /* Extracts the ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3 field value from a register. */
63276 #define ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3_GET(value) (((value) & 0xffffffff) >> 0)
63277 /* Produces a ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3 register field value suitable for setting the register. */
63278 #define ALT_USB_DEV_DIEPDMAB3_DIEPDMAB3_SET(value) (((value) << 0) & 0xffffffff)
63279 
63280 #ifndef __ASSEMBLY__
63281 /*
63282  * WARNING: The C register and register group struct declarations are provided for
63283  * convenience and illustrative purposes. They should, however, be used with
63284  * caution as the C language standard provides no guarantees about the alignment or
63285  * atomicity of device memory accesses. The recommended practice for writing
63286  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
63287  * alt_write_word() functions.
63288  *
63289  * The struct declaration for register ALT_USB_DEV_DIEPDMAB3.
63290  */
63291 struct ALT_USB_DEV_DIEPDMAB3_s
63292 {
63293  const uint32_t diepdmab3 : 32; /* DMA Buffer Address */
63294 };
63295 
63296 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB3. */
63297 typedef volatile struct ALT_USB_DEV_DIEPDMAB3_s ALT_USB_DEV_DIEPDMAB3_t;
63298 #endif /* __ASSEMBLY__ */
63299 
63300 /* The byte offset of the ALT_USB_DEV_DIEPDMAB3 register from the beginning of the component. */
63301 #define ALT_USB_DEV_DIEPDMAB3_OFST 0x17c
63302 /* The address of the ALT_USB_DEV_DIEPDMAB3 register. */
63303 #define ALT_USB_DEV_DIEPDMAB3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB3_OFST))
63304 
63305 /*
63306  * Register : Device Control IN Endpoint 4 Control Register - diepctl4
63307  *
63308  * Endpoint_number: 4
63309  *
63310  * Register Layout
63311  *
63312  * Bits | Access | Reset | Description
63313  * :--------|:-------|:------|:--------------------
63314  * [10:0] | RW | 0x0 | Maximum Packet Size
63315  * [14:11] | ??? | 0x0 | *UNDEFINED*
63316  * [15] | RW | 0x0 | USB Active Endpoint
63317  * [16] | R | 0x0 | Endpoint Data PID
63318  * [17] | R | 0x0 | NAK Status
63319  * [19:18] | RW | 0x0 | Endpoint Type
63320  * [20] | ??? | 0x0 | *UNDEFINED*
63321  * [21] | R | 0x0 | STALL Handshake
63322  * [25:22] | RW | 0x0 | TxFIFO Number
63323  * [26] | W | 0x0 | Clear NAK
63324  * [27] | W | 0x0 | Set NAK
63325  * [28] | W | 0x0 | Set DATA0 PID
63326  * [29] | W | 0x0 | Set DATA1 PID
63327  * [30] | R | 0x0 | Endpoint Disable
63328  * [31] | R | 0x0 | Endpoint Enable
63329  *
63330  */
63331 /*
63332  * Field : Maximum Packet Size - mps
63333  *
63334  * Applies to IN and OUT endpoints. The application must program this field with
63335  * the maximum packet size for the current logical endpoint. This value is in
63336  * bytes.
63337  *
63338  * Field Access Macros:
63339  *
63340  */
63341 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_MPS register field. */
63342 #define ALT_USB_DEV_DIEPCTL4_MPS_LSB 0
63343 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_MPS register field. */
63344 #define ALT_USB_DEV_DIEPCTL4_MPS_MSB 10
63345 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_MPS register field. */
63346 #define ALT_USB_DEV_DIEPCTL4_MPS_WIDTH 11
63347 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_MPS register field value. */
63348 #define ALT_USB_DEV_DIEPCTL4_MPS_SET_MSK 0x000007ff
63349 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_MPS register field value. */
63350 #define ALT_USB_DEV_DIEPCTL4_MPS_CLR_MSK 0xfffff800
63351 /* The reset value of the ALT_USB_DEV_DIEPCTL4_MPS register field. */
63352 #define ALT_USB_DEV_DIEPCTL4_MPS_RESET 0x0
63353 /* Extracts the ALT_USB_DEV_DIEPCTL4_MPS field value from a register. */
63354 #define ALT_USB_DEV_DIEPCTL4_MPS_GET(value) (((value) & 0x000007ff) >> 0)
63355 /* Produces a ALT_USB_DEV_DIEPCTL4_MPS register field value suitable for setting the register. */
63356 #define ALT_USB_DEV_DIEPCTL4_MPS_SET(value) (((value) << 0) & 0x000007ff)
63357 
63358 /*
63359  * Field : USB Active Endpoint - usbactep
63360  *
63361  * Indicates whether this endpoint is active in the current configuration and
63362  * interface. The core clears this bit for all endpoints (other than EP 0) after
63363  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
63364  * commands, the application must program endpoint registers accordingly and set
63365  * this bit.
63366  *
63367  * Field Enumeration Values:
63368  *
63369  * Enum | Value | Description
63370  * :-------------------------------------|:------|:--------------------
63371  * ALT_USB_DEV_DIEPCTL4_USBACTEP_E_DISD | 0x0 | Not Active
63372  * ALT_USB_DEV_DIEPCTL4_USBACTEP_E_END | 0x1 | USB Active Endpoint
63373  *
63374  * Field Access Macros:
63375  *
63376  */
63377 /*
63378  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_USBACTEP
63379  *
63380  * Not Active
63381  */
63382 #define ALT_USB_DEV_DIEPCTL4_USBACTEP_E_DISD 0x0
63383 /*
63384  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_USBACTEP
63385  *
63386  * USB Active Endpoint
63387  */
63388 #define ALT_USB_DEV_DIEPCTL4_USBACTEP_E_END 0x1
63389 
63390 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_USBACTEP register field. */
63391 #define ALT_USB_DEV_DIEPCTL4_USBACTEP_LSB 15
63392 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_USBACTEP register field. */
63393 #define ALT_USB_DEV_DIEPCTL4_USBACTEP_MSB 15
63394 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_USBACTEP register field. */
63395 #define ALT_USB_DEV_DIEPCTL4_USBACTEP_WIDTH 1
63396 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_USBACTEP register field value. */
63397 #define ALT_USB_DEV_DIEPCTL4_USBACTEP_SET_MSK 0x00008000
63398 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_USBACTEP register field value. */
63399 #define ALT_USB_DEV_DIEPCTL4_USBACTEP_CLR_MSK 0xffff7fff
63400 /* The reset value of the ALT_USB_DEV_DIEPCTL4_USBACTEP register field. */
63401 #define ALT_USB_DEV_DIEPCTL4_USBACTEP_RESET 0x0
63402 /* Extracts the ALT_USB_DEV_DIEPCTL4_USBACTEP field value from a register. */
63403 #define ALT_USB_DEV_DIEPCTL4_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
63404 /* Produces a ALT_USB_DEV_DIEPCTL4_USBACTEP register field value suitable for setting the register. */
63405 #define ALT_USB_DEV_DIEPCTL4_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
63406 
63407 /*
63408  * Field : Endpoint Data PID - dpid
63409  *
63410  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
63411  * packet to be received or transmitted on this endpoint. The application must
63412  * program the PID of the first packet to be received or transmitted on this
63413  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
63414  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
63415  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
63416  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
63417  * DMA mode:
63418  *
63419  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
63420  * number in which the core transmits/receives isochronous data for this endpoint.
63421  * The application must program the even/odd (micro) frame number in which it
63422  * intends to transmit/receive isochronous data for this endpoint using the
63423  * SetEvnFr and SetOddFr fields in this register.
63424  *
63425  * 0: Even (micro)frame
63426  *
63427  * 1: Odd (micro)frame
63428  *
63429  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
63430  * number in which to send data is provided in the transmit descriptor structure.
63431  * The frame in which data is received is updated in receive descriptor structure.
63432  *
63433  * Field Enumeration Values:
63434  *
63435  * Enum | Value | Description
63436  * :----------------------------------|:------|:-----------------------------
63437  * ALT_USB_DEV_DIEPCTL4_DPID_E_INACT | 0x0 | Endpoint Data PID not active
63438  * ALT_USB_DEV_DIEPCTL4_DPID_E_ACT | 0x1 | Endpoint Data PID active
63439  *
63440  * Field Access Macros:
63441  *
63442  */
63443 /*
63444  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_DPID
63445  *
63446  * Endpoint Data PID not active
63447  */
63448 #define ALT_USB_DEV_DIEPCTL4_DPID_E_INACT 0x0
63449 /*
63450  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_DPID
63451  *
63452  * Endpoint Data PID active
63453  */
63454 #define ALT_USB_DEV_DIEPCTL4_DPID_E_ACT 0x1
63455 
63456 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_DPID register field. */
63457 #define ALT_USB_DEV_DIEPCTL4_DPID_LSB 16
63458 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_DPID register field. */
63459 #define ALT_USB_DEV_DIEPCTL4_DPID_MSB 16
63460 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_DPID register field. */
63461 #define ALT_USB_DEV_DIEPCTL4_DPID_WIDTH 1
63462 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_DPID register field value. */
63463 #define ALT_USB_DEV_DIEPCTL4_DPID_SET_MSK 0x00010000
63464 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_DPID register field value. */
63465 #define ALT_USB_DEV_DIEPCTL4_DPID_CLR_MSK 0xfffeffff
63466 /* The reset value of the ALT_USB_DEV_DIEPCTL4_DPID register field. */
63467 #define ALT_USB_DEV_DIEPCTL4_DPID_RESET 0x0
63468 /* Extracts the ALT_USB_DEV_DIEPCTL4_DPID field value from a register. */
63469 #define ALT_USB_DEV_DIEPCTL4_DPID_GET(value) (((value) & 0x00010000) >> 16)
63470 /* Produces a ALT_USB_DEV_DIEPCTL4_DPID register field value suitable for setting the register. */
63471 #define ALT_USB_DEV_DIEPCTL4_DPID_SET(value) (((value) << 16) & 0x00010000)
63472 
63473 /*
63474  * Field : NAK Status - naksts
63475  *
63476  * When either the application or the core sets this bit:
63477  *
63478  * * The core stops receiving any data on an OUT endpoint, even if there is space
63479  * in the RxFIFO to accommodate the incoming packet.
63480  *
63481  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
63482  * IN endpoint, even if there data is available in the TxFIFO.
63483  *
63484  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
63485  * even if there data is available in the TxFIFO.
63486  *
63487  * Irrespective of this bit's setting, the core always responds to SETUP data
63488  * packets with an ACK handshake.
63489  *
63490  * Field Enumeration Values:
63491  *
63492  * Enum | Value | Description
63493  * :-------------------------------------|:------|:------------------------------------------------
63494  * ALT_USB_DEV_DIEPCTL4_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
63495  * : | | based on the FIFO status
63496  * ALT_USB_DEV_DIEPCTL4_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
63497  * : | | endpoint
63498  *
63499  * Field Access Macros:
63500  *
63501  */
63502 /*
63503  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_NAKSTS
63504  *
63505  * The core is transmitting non-NAK handshakes based on the FIFO status
63506  */
63507 #define ALT_USB_DEV_DIEPCTL4_NAKSTS_E_NONNAK 0x0
63508 /*
63509  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_NAKSTS
63510  *
63511  * The core is transmitting NAK handshakes on this endpoint
63512  */
63513 #define ALT_USB_DEV_DIEPCTL4_NAKSTS_E_NAK 0x1
63514 
63515 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_NAKSTS register field. */
63516 #define ALT_USB_DEV_DIEPCTL4_NAKSTS_LSB 17
63517 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_NAKSTS register field. */
63518 #define ALT_USB_DEV_DIEPCTL4_NAKSTS_MSB 17
63519 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_NAKSTS register field. */
63520 #define ALT_USB_DEV_DIEPCTL4_NAKSTS_WIDTH 1
63521 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_NAKSTS register field value. */
63522 #define ALT_USB_DEV_DIEPCTL4_NAKSTS_SET_MSK 0x00020000
63523 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_NAKSTS register field value. */
63524 #define ALT_USB_DEV_DIEPCTL4_NAKSTS_CLR_MSK 0xfffdffff
63525 /* The reset value of the ALT_USB_DEV_DIEPCTL4_NAKSTS register field. */
63526 #define ALT_USB_DEV_DIEPCTL4_NAKSTS_RESET 0x0
63527 /* Extracts the ALT_USB_DEV_DIEPCTL4_NAKSTS field value from a register. */
63528 #define ALT_USB_DEV_DIEPCTL4_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
63529 /* Produces a ALT_USB_DEV_DIEPCTL4_NAKSTS register field value suitable for setting the register. */
63530 #define ALT_USB_DEV_DIEPCTL4_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
63531 
63532 /*
63533  * Field : Endpoint Type - eptype
63534  *
63535  * This is the transfer type supported by this logical endpoint.
63536  *
63537  * Field Enumeration Values:
63538  *
63539  * Enum | Value | Description
63540  * :------------------------------------------|:------|:------------
63541  * ALT_USB_DEV_DIEPCTL4_EPTYPE_E_CTL | 0x0 | Control
63542  * ALT_USB_DEV_DIEPCTL4_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
63543  * ALT_USB_DEV_DIEPCTL4_EPTYPE_E_BULK | 0x2 | Bulk
63544  * ALT_USB_DEV_DIEPCTL4_EPTYPE_E_INTERRUP | 0x3 | Interrupt
63545  *
63546  * Field Access Macros:
63547  *
63548  */
63549 /*
63550  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_EPTYPE
63551  *
63552  * Control
63553  */
63554 #define ALT_USB_DEV_DIEPCTL4_EPTYPE_E_CTL 0x0
63555 /*
63556  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_EPTYPE
63557  *
63558  * Isochronous
63559  */
63560 #define ALT_USB_DEV_DIEPCTL4_EPTYPE_E_ISOCHRONOUS 0x1
63561 /*
63562  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_EPTYPE
63563  *
63564  * Bulk
63565  */
63566 #define ALT_USB_DEV_DIEPCTL4_EPTYPE_E_BULK 0x2
63567 /*
63568  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_EPTYPE
63569  *
63570  * Interrupt
63571  */
63572 #define ALT_USB_DEV_DIEPCTL4_EPTYPE_E_INTERRUP 0x3
63573 
63574 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_EPTYPE register field. */
63575 #define ALT_USB_DEV_DIEPCTL4_EPTYPE_LSB 18
63576 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_EPTYPE register field. */
63577 #define ALT_USB_DEV_DIEPCTL4_EPTYPE_MSB 19
63578 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_EPTYPE register field. */
63579 #define ALT_USB_DEV_DIEPCTL4_EPTYPE_WIDTH 2
63580 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_EPTYPE register field value. */
63581 #define ALT_USB_DEV_DIEPCTL4_EPTYPE_SET_MSK 0x000c0000
63582 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_EPTYPE register field value. */
63583 #define ALT_USB_DEV_DIEPCTL4_EPTYPE_CLR_MSK 0xfff3ffff
63584 /* The reset value of the ALT_USB_DEV_DIEPCTL4_EPTYPE register field. */
63585 #define ALT_USB_DEV_DIEPCTL4_EPTYPE_RESET 0x0
63586 /* Extracts the ALT_USB_DEV_DIEPCTL4_EPTYPE field value from a register. */
63587 #define ALT_USB_DEV_DIEPCTL4_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
63588 /* Produces a ALT_USB_DEV_DIEPCTL4_EPTYPE register field value suitable for setting the register. */
63589 #define ALT_USB_DEV_DIEPCTL4_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
63590 
63591 /*
63592  * Field : STALL Handshake - stall
63593  *
63594  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
63595  * application sets this bit to stall all tokens from the USB host to this
63596  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
63597  * along with this bit, the STALL bit takes priority. Only the application can
63598  * clear this bit, never the core. Applies to control endpoints only. The
63599  * application can only set this bit, and the core clears it, when a SETUP token is
63600  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
63601  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
63602  * of this bit's setting, the core always responds to SETUP data packets with an
63603  * ACK handshake.
63604  *
63605  * Field Enumeration Values:
63606  *
63607  * Enum | Value | Description
63608  * :-----------------------------------|:------|:----------------------------
63609  * ALT_USB_DEV_DIEPCTL4_STALL_E_INACT | 0x0 | STALL All Tokens not active
63610  * ALT_USB_DEV_DIEPCTL4_STALL_E_ACT | 0x1 | STALL All Tokens active
63611  *
63612  * Field Access Macros:
63613  *
63614  */
63615 /*
63616  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_STALL
63617  *
63618  * STALL All Tokens not active
63619  */
63620 #define ALT_USB_DEV_DIEPCTL4_STALL_E_INACT 0x0
63621 /*
63622  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_STALL
63623  *
63624  * STALL All Tokens active
63625  */
63626 #define ALT_USB_DEV_DIEPCTL4_STALL_E_ACT 0x1
63627 
63628 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_STALL register field. */
63629 #define ALT_USB_DEV_DIEPCTL4_STALL_LSB 21
63630 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_STALL register field. */
63631 #define ALT_USB_DEV_DIEPCTL4_STALL_MSB 21
63632 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_STALL register field. */
63633 #define ALT_USB_DEV_DIEPCTL4_STALL_WIDTH 1
63634 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_STALL register field value. */
63635 #define ALT_USB_DEV_DIEPCTL4_STALL_SET_MSK 0x00200000
63636 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_STALL register field value. */
63637 #define ALT_USB_DEV_DIEPCTL4_STALL_CLR_MSK 0xffdfffff
63638 /* The reset value of the ALT_USB_DEV_DIEPCTL4_STALL register field. */
63639 #define ALT_USB_DEV_DIEPCTL4_STALL_RESET 0x0
63640 /* Extracts the ALT_USB_DEV_DIEPCTL4_STALL field value from a register. */
63641 #define ALT_USB_DEV_DIEPCTL4_STALL_GET(value) (((value) & 0x00200000) >> 21)
63642 /* Produces a ALT_USB_DEV_DIEPCTL4_STALL register field value suitable for setting the register. */
63643 #define ALT_USB_DEV_DIEPCTL4_STALL_SET(value) (((value) << 21) & 0x00200000)
63644 
63645 /*
63646  * Field : TxFIFO Number - txfnum
63647  *
63648  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
63649  * endpoints must map this to the corresponding Periodic TxFIFO number.
63650  *
63651  * 4'h0: Non-Periodic TxFIFO
63652  *
63653  * Others: Specified Periodic TxFIFO.number
63654  *
63655  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
63656  * applications such as mass storage. The core treats an IN endpoint as a non-
63657  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
63658  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
63659  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
63660  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
63661  * This field is valid only for IN endpoints.
63662  *
63663  * Field Access Macros:
63664  *
63665  */
63666 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_TXFNUM register field. */
63667 #define ALT_USB_DEV_DIEPCTL4_TXFNUM_LSB 22
63668 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_TXFNUM register field. */
63669 #define ALT_USB_DEV_DIEPCTL4_TXFNUM_MSB 25
63670 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_TXFNUM register field. */
63671 #define ALT_USB_DEV_DIEPCTL4_TXFNUM_WIDTH 4
63672 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_TXFNUM register field value. */
63673 #define ALT_USB_DEV_DIEPCTL4_TXFNUM_SET_MSK 0x03c00000
63674 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_TXFNUM register field value. */
63675 #define ALT_USB_DEV_DIEPCTL4_TXFNUM_CLR_MSK 0xfc3fffff
63676 /* The reset value of the ALT_USB_DEV_DIEPCTL4_TXFNUM register field. */
63677 #define ALT_USB_DEV_DIEPCTL4_TXFNUM_RESET 0x0
63678 /* Extracts the ALT_USB_DEV_DIEPCTL4_TXFNUM field value from a register. */
63679 #define ALT_USB_DEV_DIEPCTL4_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
63680 /* Produces a ALT_USB_DEV_DIEPCTL4_TXFNUM register field value suitable for setting the register. */
63681 #define ALT_USB_DEV_DIEPCTL4_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
63682 
63683 /*
63684  * Field : Clear NAK - cnak
63685  *
63686  * A write to this bit clears the NAK bit for the endpoint.
63687  *
63688  * Field Enumeration Values:
63689  *
63690  * Enum | Value | Description
63691  * :----------------------------------|:------|:-------------
63692  * ALT_USB_DEV_DIEPCTL4_CNAK_E_INACT | 0x0 | No Clear NAK
63693  * ALT_USB_DEV_DIEPCTL4_CNAK_E_ACT | 0x1 | Clear NAK
63694  *
63695  * Field Access Macros:
63696  *
63697  */
63698 /*
63699  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_CNAK
63700  *
63701  * No Clear NAK
63702  */
63703 #define ALT_USB_DEV_DIEPCTL4_CNAK_E_INACT 0x0
63704 /*
63705  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_CNAK
63706  *
63707  * Clear NAK
63708  */
63709 #define ALT_USB_DEV_DIEPCTL4_CNAK_E_ACT 0x1
63710 
63711 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_CNAK register field. */
63712 #define ALT_USB_DEV_DIEPCTL4_CNAK_LSB 26
63713 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_CNAK register field. */
63714 #define ALT_USB_DEV_DIEPCTL4_CNAK_MSB 26
63715 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_CNAK register field. */
63716 #define ALT_USB_DEV_DIEPCTL4_CNAK_WIDTH 1
63717 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_CNAK register field value. */
63718 #define ALT_USB_DEV_DIEPCTL4_CNAK_SET_MSK 0x04000000
63719 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_CNAK register field value. */
63720 #define ALT_USB_DEV_DIEPCTL4_CNAK_CLR_MSK 0xfbffffff
63721 /* The reset value of the ALT_USB_DEV_DIEPCTL4_CNAK register field. */
63722 #define ALT_USB_DEV_DIEPCTL4_CNAK_RESET 0x0
63723 /* Extracts the ALT_USB_DEV_DIEPCTL4_CNAK field value from a register. */
63724 #define ALT_USB_DEV_DIEPCTL4_CNAK_GET(value) (((value) & 0x04000000) >> 26)
63725 /* Produces a ALT_USB_DEV_DIEPCTL4_CNAK register field value suitable for setting the register. */
63726 #define ALT_USB_DEV_DIEPCTL4_CNAK_SET(value) (((value) << 26) & 0x04000000)
63727 
63728 /*
63729  * Field : Set NAK - snak
63730  *
63731  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
63732  * application can control the transmission of NAK handshakes on an endpoint. The
63733  * core can also Set this bit for an endpoint after a SETUP packet is received on
63734  * that endpoint.
63735  *
63736  * Field Enumeration Values:
63737  *
63738  * Enum | Value | Description
63739  * :----------------------------------|:------|:------------
63740  * ALT_USB_DEV_DIEPCTL4_SNAK_E_INACT | 0x0 | No Set NAK
63741  * ALT_USB_DEV_DIEPCTL4_SNAK_E_ACT | 0x1 | Set NAK
63742  *
63743  * Field Access Macros:
63744  *
63745  */
63746 /*
63747  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_SNAK
63748  *
63749  * No Set NAK
63750  */
63751 #define ALT_USB_DEV_DIEPCTL4_SNAK_E_INACT 0x0
63752 /*
63753  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_SNAK
63754  *
63755  * Set NAK
63756  */
63757 #define ALT_USB_DEV_DIEPCTL4_SNAK_E_ACT 0x1
63758 
63759 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_SNAK register field. */
63760 #define ALT_USB_DEV_DIEPCTL4_SNAK_LSB 27
63761 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_SNAK register field. */
63762 #define ALT_USB_DEV_DIEPCTL4_SNAK_MSB 27
63763 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_SNAK register field. */
63764 #define ALT_USB_DEV_DIEPCTL4_SNAK_WIDTH 1
63765 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_SNAK register field value. */
63766 #define ALT_USB_DEV_DIEPCTL4_SNAK_SET_MSK 0x08000000
63767 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_SNAK register field value. */
63768 #define ALT_USB_DEV_DIEPCTL4_SNAK_CLR_MSK 0xf7ffffff
63769 /* The reset value of the ALT_USB_DEV_DIEPCTL4_SNAK register field. */
63770 #define ALT_USB_DEV_DIEPCTL4_SNAK_RESET 0x0
63771 /* Extracts the ALT_USB_DEV_DIEPCTL4_SNAK field value from a register. */
63772 #define ALT_USB_DEV_DIEPCTL4_SNAK_GET(value) (((value) & 0x08000000) >> 27)
63773 /* Produces a ALT_USB_DEV_DIEPCTL4_SNAK register field value suitable for setting the register. */
63774 #define ALT_USB_DEV_DIEPCTL4_SNAK_SET(value) (((value) << 27) & 0x08000000)
63775 
63776 /*
63777  * Field : Set DATA0 PID - setd0pid
63778  *
63779  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
63780  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
63781  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
63782  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
63783  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
63784  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
63785  * mode is enabled, this field is reserved. The frame number in which to send data
63786  * is in the transmit descriptor structure. The frame in which to receive data is
63787  * updated in receive descriptor structure.
63788  *
63789  * Field Enumeration Values:
63790  *
63791  * Enum | Value | Description
63792  * :-------------------------------------|:------|:----------------------------
63793  * ALT_USB_DEV_DIEPCTL4_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
63794  * ALT_USB_DEV_DIEPCTL4_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
63795  *
63796  * Field Access Macros:
63797  *
63798  */
63799 /*
63800  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_SETD0PID
63801  *
63802  * Disables Set DATA0 PID
63803  */
63804 #define ALT_USB_DEV_DIEPCTL4_SETD0PID_E_DISD 0x0
63805 /*
63806  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_SETD0PID
63807  *
63808  * Endpoint Data PID to DATA0)
63809  */
63810 #define ALT_USB_DEV_DIEPCTL4_SETD0PID_E_END 0x1
63811 
63812 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_SETD0PID register field. */
63813 #define ALT_USB_DEV_DIEPCTL4_SETD0PID_LSB 28
63814 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_SETD0PID register field. */
63815 #define ALT_USB_DEV_DIEPCTL4_SETD0PID_MSB 28
63816 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_SETD0PID register field. */
63817 #define ALT_USB_DEV_DIEPCTL4_SETD0PID_WIDTH 1
63818 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_SETD0PID register field value. */
63819 #define ALT_USB_DEV_DIEPCTL4_SETD0PID_SET_MSK 0x10000000
63820 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_SETD0PID register field value. */
63821 #define ALT_USB_DEV_DIEPCTL4_SETD0PID_CLR_MSK 0xefffffff
63822 /* The reset value of the ALT_USB_DEV_DIEPCTL4_SETD0PID register field. */
63823 #define ALT_USB_DEV_DIEPCTL4_SETD0PID_RESET 0x0
63824 /* Extracts the ALT_USB_DEV_DIEPCTL4_SETD0PID field value from a register. */
63825 #define ALT_USB_DEV_DIEPCTL4_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
63826 /* Produces a ALT_USB_DEV_DIEPCTL4_SETD0PID register field value suitable for setting the register. */
63827 #define ALT_USB_DEV_DIEPCTL4_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
63828 
63829 /*
63830  * Field : Set DATA1 PID - setd1pid
63831  *
63832  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
63833  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
63834  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
63835  *
63836  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
63837  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
63838  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
63839  *
63840  * Field Enumeration Values:
63841  *
63842  * Enum | Value | Description
63843  * :-------------------------------------|:------|:-----------------------
63844  * ALT_USB_DEV_DIEPCTL4_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
63845  * ALT_USB_DEV_DIEPCTL4_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
63846  *
63847  * Field Access Macros:
63848  *
63849  */
63850 /*
63851  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_SETD1PID
63852  *
63853  * Disables Set DATA1 PID
63854  */
63855 #define ALT_USB_DEV_DIEPCTL4_SETD1PID_E_DISD 0x0
63856 /*
63857  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_SETD1PID
63858  *
63859  * Enables Set DATA1 PID
63860  */
63861 #define ALT_USB_DEV_DIEPCTL4_SETD1PID_E_END 0x1
63862 
63863 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_SETD1PID register field. */
63864 #define ALT_USB_DEV_DIEPCTL4_SETD1PID_LSB 29
63865 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_SETD1PID register field. */
63866 #define ALT_USB_DEV_DIEPCTL4_SETD1PID_MSB 29
63867 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_SETD1PID register field. */
63868 #define ALT_USB_DEV_DIEPCTL4_SETD1PID_WIDTH 1
63869 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_SETD1PID register field value. */
63870 #define ALT_USB_DEV_DIEPCTL4_SETD1PID_SET_MSK 0x20000000
63871 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_SETD1PID register field value. */
63872 #define ALT_USB_DEV_DIEPCTL4_SETD1PID_CLR_MSK 0xdfffffff
63873 /* The reset value of the ALT_USB_DEV_DIEPCTL4_SETD1PID register field. */
63874 #define ALT_USB_DEV_DIEPCTL4_SETD1PID_RESET 0x0
63875 /* Extracts the ALT_USB_DEV_DIEPCTL4_SETD1PID field value from a register. */
63876 #define ALT_USB_DEV_DIEPCTL4_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
63877 /* Produces a ALT_USB_DEV_DIEPCTL4_SETD1PID register field value suitable for setting the register. */
63878 #define ALT_USB_DEV_DIEPCTL4_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
63879 
63880 /*
63881  * Field : Endpoint Disable - epdis
63882  *
63883  * Applies to IN and OUT endpoints. The application sets this bit to stop
63884  * transmitting/receiving data on an endpoint, even before the transfer for that
63885  * endpoint is complete. The application must wait for the Endpoint Disabled
63886  * interrupt before treating the endpoint as disabled. The core clears this bit
63887  * before setting the Endpoint Disabled interrupt. The application must set this
63888  * bit only if Endpoint Enable is already set for this endpoint.
63889  *
63890  * Field Enumeration Values:
63891  *
63892  * Enum | Value | Description
63893  * :-----------------------------------|:------|:--------------------
63894  * ALT_USB_DEV_DIEPCTL4_EPDIS_E_INACT | 0x0 | No Endpoint Disable
63895  * ALT_USB_DEV_DIEPCTL4_EPDIS_E_ACT | 0x1 | Endpoint Disable
63896  *
63897  * Field Access Macros:
63898  *
63899  */
63900 /*
63901  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_EPDIS
63902  *
63903  * No Endpoint Disable
63904  */
63905 #define ALT_USB_DEV_DIEPCTL4_EPDIS_E_INACT 0x0
63906 /*
63907  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_EPDIS
63908  *
63909  * Endpoint Disable
63910  */
63911 #define ALT_USB_DEV_DIEPCTL4_EPDIS_E_ACT 0x1
63912 
63913 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_EPDIS register field. */
63914 #define ALT_USB_DEV_DIEPCTL4_EPDIS_LSB 30
63915 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_EPDIS register field. */
63916 #define ALT_USB_DEV_DIEPCTL4_EPDIS_MSB 30
63917 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_EPDIS register field. */
63918 #define ALT_USB_DEV_DIEPCTL4_EPDIS_WIDTH 1
63919 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_EPDIS register field value. */
63920 #define ALT_USB_DEV_DIEPCTL4_EPDIS_SET_MSK 0x40000000
63921 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_EPDIS register field value. */
63922 #define ALT_USB_DEV_DIEPCTL4_EPDIS_CLR_MSK 0xbfffffff
63923 /* The reset value of the ALT_USB_DEV_DIEPCTL4_EPDIS register field. */
63924 #define ALT_USB_DEV_DIEPCTL4_EPDIS_RESET 0x0
63925 /* Extracts the ALT_USB_DEV_DIEPCTL4_EPDIS field value from a register. */
63926 #define ALT_USB_DEV_DIEPCTL4_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
63927 /* Produces a ALT_USB_DEV_DIEPCTL4_EPDIS register field value suitable for setting the register. */
63928 #define ALT_USB_DEV_DIEPCTL4_EPDIS_SET(value) (((value) << 30) & 0x40000000)
63929 
63930 /*
63931  * Field : Endpoint Enable - epena
63932  *
63933  * Applies to IN and OUT endpoints.
63934  *
63935  * * When Scatter/Gather DMA mode is enabled,
63936  *
63937  * * for IN endpoints this bit indicates that the descriptor structure and data
63938  * buffer with data ready to transmit is setup.
63939  *
63940  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
63941  * receive data is setup.
63942  *
63943  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
63944  * mode:
63945  *
63946  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
63947  * the endpoint.
63948  *
63949  * * for OUT endpoints, this bit indicates that the application has allocated the
63950  * memory to start receiving data from the USB.
63951  *
63952  * * The core clears this bit before setting any of the following interrupts on
63953  * this endpoint:
63954  *
63955  * * SETUP Phase Done
63956  *
63957  * * Endpoint Disabled
63958  *
63959  * * Transfer Completed
63960  *
63961  * for control endpoints in DMA mode, this bit must be set to be able to transfer
63962  * SETUP data packets in memory.
63963  *
63964  * Field Enumeration Values:
63965  *
63966  * Enum | Value | Description
63967  * :-----------------------------------|:------|:-------------------------
63968  * ALT_USB_DEV_DIEPCTL4_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
63969  * ALT_USB_DEV_DIEPCTL4_EPENA_E_ACT | 0x1 | Endpoint Enable active
63970  *
63971  * Field Access Macros:
63972  *
63973  */
63974 /*
63975  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_EPENA
63976  *
63977  * Endpoint Enable inactive
63978  */
63979 #define ALT_USB_DEV_DIEPCTL4_EPENA_E_INACT 0x0
63980 /*
63981  * Enumerated value for register field ALT_USB_DEV_DIEPCTL4_EPENA
63982  *
63983  * Endpoint Enable active
63984  */
63985 #define ALT_USB_DEV_DIEPCTL4_EPENA_E_ACT 0x1
63986 
63987 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL4_EPENA register field. */
63988 #define ALT_USB_DEV_DIEPCTL4_EPENA_LSB 31
63989 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL4_EPENA register field. */
63990 #define ALT_USB_DEV_DIEPCTL4_EPENA_MSB 31
63991 /* The width in bits of the ALT_USB_DEV_DIEPCTL4_EPENA register field. */
63992 #define ALT_USB_DEV_DIEPCTL4_EPENA_WIDTH 1
63993 /* The mask used to set the ALT_USB_DEV_DIEPCTL4_EPENA register field value. */
63994 #define ALT_USB_DEV_DIEPCTL4_EPENA_SET_MSK 0x80000000
63995 /* The mask used to clear the ALT_USB_DEV_DIEPCTL4_EPENA register field value. */
63996 #define ALT_USB_DEV_DIEPCTL4_EPENA_CLR_MSK 0x7fffffff
63997 /* The reset value of the ALT_USB_DEV_DIEPCTL4_EPENA register field. */
63998 #define ALT_USB_DEV_DIEPCTL4_EPENA_RESET 0x0
63999 /* Extracts the ALT_USB_DEV_DIEPCTL4_EPENA field value from a register. */
64000 #define ALT_USB_DEV_DIEPCTL4_EPENA_GET(value) (((value) & 0x80000000) >> 31)
64001 /* Produces a ALT_USB_DEV_DIEPCTL4_EPENA register field value suitable for setting the register. */
64002 #define ALT_USB_DEV_DIEPCTL4_EPENA_SET(value) (((value) << 31) & 0x80000000)
64003 
64004 #ifndef __ASSEMBLY__
64005 /*
64006  * WARNING: The C register and register group struct declarations are provided for
64007  * convenience and illustrative purposes. They should, however, be used with
64008  * caution as the C language standard provides no guarantees about the alignment or
64009  * atomicity of device memory accesses. The recommended practice for writing
64010  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
64011  * alt_write_word() functions.
64012  *
64013  * The struct declaration for register ALT_USB_DEV_DIEPCTL4.
64014  */
64015 struct ALT_USB_DEV_DIEPCTL4_s
64016 {
64017  uint32_t mps : 11; /* Maximum Packet Size */
64018  uint32_t : 4; /* *UNDEFINED* */
64019  uint32_t usbactep : 1; /* USB Active Endpoint */
64020  const uint32_t dpid : 1; /* Endpoint Data PID */
64021  const uint32_t naksts : 1; /* NAK Status */
64022  uint32_t eptype : 2; /* Endpoint Type */
64023  uint32_t : 1; /* *UNDEFINED* */
64024  const uint32_t stall : 1; /* STALL Handshake */
64025  uint32_t txfnum : 4; /* TxFIFO Number */
64026  uint32_t cnak : 1; /* Clear NAK */
64027  uint32_t snak : 1; /* Set NAK */
64028  uint32_t setd0pid : 1; /* Set DATA0 PID */
64029  uint32_t setd1pid : 1; /* Set DATA1 PID */
64030  const uint32_t epdis : 1; /* Endpoint Disable */
64031  const uint32_t epena : 1; /* Endpoint Enable */
64032 };
64033 
64034 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL4. */
64035 typedef volatile struct ALT_USB_DEV_DIEPCTL4_s ALT_USB_DEV_DIEPCTL4_t;
64036 #endif /* __ASSEMBLY__ */
64037 
64038 /* The byte offset of the ALT_USB_DEV_DIEPCTL4 register from the beginning of the component. */
64039 #define ALT_USB_DEV_DIEPCTL4_OFST 0x180
64040 /* The address of the ALT_USB_DEV_DIEPCTL4 register. */
64041 #define ALT_USB_DEV_DIEPCTL4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL4_OFST))
64042 
64043 /*
64044  * Register : Device IN Endpoint 4 Interrupt Register - diepint4
64045  *
64046  * This register indicates the status of an endpoint with respect to USB- and AHB-
64047  * related events. The application must read this register when the OUT Endpoints
64048  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
64049  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
64050  * can read this register, it must first read the Device All Endpoints Interrupt
64051  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
64052  * Interrupt register. The application must clear the appropriate bit in this
64053  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
64054  *
64055  * Register Layout
64056  *
64057  * Bits | Access | Reset | Description
64058  * :--------|:-------|:------|:---------------------------------------
64059  * [0] | R | 0x0 | Transfer Completed Interrupt
64060  * [1] | R | 0x0 | Endpoint Disabled Interrupt
64061  * [2] | R | 0x0 | AHB Error
64062  * [3] | R | 0x0 | Timeout Condition
64063  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
64064  * [5] | R | 0x0 | IN Token Received with EP Mismatch
64065  * [6] | R | 0x0 | IN Endpoint NAK Effective
64066  * [7] | R | 0x1 | Transmit FIFO Empty
64067  * [8] | R | 0x0 | Fifo Underrun
64068  * [9] | R | 0x0 | BNA Interrupt
64069  * [10] | ??? | 0x0 | *UNDEFINED*
64070  * [11] | R | 0x0 | Packet Drop Status
64071  * [12] | R | 0x0 | BbleErr Interrupt
64072  * [13] | R | 0x0 | NAK Interrupt
64073  * [14] | R | 0x0 | NYET Interrupt
64074  * [31:15] | ??? | 0x0 | *UNDEFINED*
64075  *
64076  */
64077 /*
64078  * Field : Transfer Completed Interrupt - xfercompl
64079  *
64080  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
64081  *
64082  * * for IN endpoint this field indicates that the requested data from the
64083  * descriptor is moved from external system memory to internal FIFO.
64084  *
64085  * * for OUT endpoint this field indicates that the requested data from the
64086  * internal FIFO is moved to external system memory. This interrupt is generated
64087  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
64088  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
64089  * this field indicates that the programmed transfer is complete on the AHB as
64090  * well as on the USB, for this endpoint.
64091  *
64092  * Field Enumeration Values:
64093  *
64094  * Enum | Value | Description
64095  * :---------------------------------------|:------|:-----------------------------
64096  * ALT_USB_DEV_DIEPINT4_XFERCOMPL_E_INACT | 0x0 | No Interrupt
64097  * ALT_USB_DEV_DIEPINT4_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
64098  *
64099  * Field Access Macros:
64100  *
64101  */
64102 /*
64103  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_XFERCOMPL
64104  *
64105  * No Interrupt
64106  */
64107 #define ALT_USB_DEV_DIEPINT4_XFERCOMPL_E_INACT 0x0
64108 /*
64109  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_XFERCOMPL
64110  *
64111  * Transfer Completed Interrupt
64112  */
64113 #define ALT_USB_DEV_DIEPINT4_XFERCOMPL_E_ACT 0x1
64114 
64115 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_XFERCOMPL register field. */
64116 #define ALT_USB_DEV_DIEPINT4_XFERCOMPL_LSB 0
64117 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_XFERCOMPL register field. */
64118 #define ALT_USB_DEV_DIEPINT4_XFERCOMPL_MSB 0
64119 /* The width in bits of the ALT_USB_DEV_DIEPINT4_XFERCOMPL register field. */
64120 #define ALT_USB_DEV_DIEPINT4_XFERCOMPL_WIDTH 1
64121 /* The mask used to set the ALT_USB_DEV_DIEPINT4_XFERCOMPL register field value. */
64122 #define ALT_USB_DEV_DIEPINT4_XFERCOMPL_SET_MSK 0x00000001
64123 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_XFERCOMPL register field value. */
64124 #define ALT_USB_DEV_DIEPINT4_XFERCOMPL_CLR_MSK 0xfffffffe
64125 /* The reset value of the ALT_USB_DEV_DIEPINT4_XFERCOMPL register field. */
64126 #define ALT_USB_DEV_DIEPINT4_XFERCOMPL_RESET 0x0
64127 /* Extracts the ALT_USB_DEV_DIEPINT4_XFERCOMPL field value from a register. */
64128 #define ALT_USB_DEV_DIEPINT4_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
64129 /* Produces a ALT_USB_DEV_DIEPINT4_XFERCOMPL register field value suitable for setting the register. */
64130 #define ALT_USB_DEV_DIEPINT4_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
64131 
64132 /*
64133  * Field : Endpoint Disabled Interrupt - epdisbld
64134  *
64135  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
64136  * disabled per the application's request.
64137  *
64138  * Field Enumeration Values:
64139  *
64140  * Enum | Value | Description
64141  * :--------------------------------------|:------|:----------------------------
64142  * ALT_USB_DEV_DIEPINT4_EPDISBLD_E_INACT | 0x0 | No Interrupt
64143  * ALT_USB_DEV_DIEPINT4_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
64144  *
64145  * Field Access Macros:
64146  *
64147  */
64148 /*
64149  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_EPDISBLD
64150  *
64151  * No Interrupt
64152  */
64153 #define ALT_USB_DEV_DIEPINT4_EPDISBLD_E_INACT 0x0
64154 /*
64155  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_EPDISBLD
64156  *
64157  * Endpoint Disabled Interrupt
64158  */
64159 #define ALT_USB_DEV_DIEPINT4_EPDISBLD_E_ACT 0x1
64160 
64161 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_EPDISBLD register field. */
64162 #define ALT_USB_DEV_DIEPINT4_EPDISBLD_LSB 1
64163 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_EPDISBLD register field. */
64164 #define ALT_USB_DEV_DIEPINT4_EPDISBLD_MSB 1
64165 /* The width in bits of the ALT_USB_DEV_DIEPINT4_EPDISBLD register field. */
64166 #define ALT_USB_DEV_DIEPINT4_EPDISBLD_WIDTH 1
64167 /* The mask used to set the ALT_USB_DEV_DIEPINT4_EPDISBLD register field value. */
64168 #define ALT_USB_DEV_DIEPINT4_EPDISBLD_SET_MSK 0x00000002
64169 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_EPDISBLD register field value. */
64170 #define ALT_USB_DEV_DIEPINT4_EPDISBLD_CLR_MSK 0xfffffffd
64171 /* The reset value of the ALT_USB_DEV_DIEPINT4_EPDISBLD register field. */
64172 #define ALT_USB_DEV_DIEPINT4_EPDISBLD_RESET 0x0
64173 /* Extracts the ALT_USB_DEV_DIEPINT4_EPDISBLD field value from a register. */
64174 #define ALT_USB_DEV_DIEPINT4_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
64175 /* Produces a ALT_USB_DEV_DIEPINT4_EPDISBLD register field value suitable for setting the register. */
64176 #define ALT_USB_DEV_DIEPINT4_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
64177 
64178 /*
64179  * Field : AHB Error - ahberr
64180  *
64181  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
64182  * there is an AHB error during an AHB read/write. The application can read the
64183  * corresponding endpoint DMA address register to get the error address.
64184  *
64185  * Field Enumeration Values:
64186  *
64187  * Enum | Value | Description
64188  * :------------------------------------|:------|:--------------------
64189  * ALT_USB_DEV_DIEPINT4_AHBERR_E_INACT | 0x0 | No Interrupt
64190  * ALT_USB_DEV_DIEPINT4_AHBERR_E_ACT | 0x1 | AHB Error interrupt
64191  *
64192  * Field Access Macros:
64193  *
64194  */
64195 /*
64196  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_AHBERR
64197  *
64198  * No Interrupt
64199  */
64200 #define ALT_USB_DEV_DIEPINT4_AHBERR_E_INACT 0x0
64201 /*
64202  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_AHBERR
64203  *
64204  * AHB Error interrupt
64205  */
64206 #define ALT_USB_DEV_DIEPINT4_AHBERR_E_ACT 0x1
64207 
64208 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_AHBERR register field. */
64209 #define ALT_USB_DEV_DIEPINT4_AHBERR_LSB 2
64210 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_AHBERR register field. */
64211 #define ALT_USB_DEV_DIEPINT4_AHBERR_MSB 2
64212 /* The width in bits of the ALT_USB_DEV_DIEPINT4_AHBERR register field. */
64213 #define ALT_USB_DEV_DIEPINT4_AHBERR_WIDTH 1
64214 /* The mask used to set the ALT_USB_DEV_DIEPINT4_AHBERR register field value. */
64215 #define ALT_USB_DEV_DIEPINT4_AHBERR_SET_MSK 0x00000004
64216 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_AHBERR register field value. */
64217 #define ALT_USB_DEV_DIEPINT4_AHBERR_CLR_MSK 0xfffffffb
64218 /* The reset value of the ALT_USB_DEV_DIEPINT4_AHBERR register field. */
64219 #define ALT_USB_DEV_DIEPINT4_AHBERR_RESET 0x0
64220 /* Extracts the ALT_USB_DEV_DIEPINT4_AHBERR field value from a register. */
64221 #define ALT_USB_DEV_DIEPINT4_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
64222 /* Produces a ALT_USB_DEV_DIEPINT4_AHBERR register field value suitable for setting the register. */
64223 #define ALT_USB_DEV_DIEPINT4_AHBERR_SET(value) (((value) << 2) & 0x00000004)
64224 
64225 /*
64226  * Field : Timeout Condition - timeout
64227  *
64228  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
64229  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
64230  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
64231  * detected a timeout condition on the USB for the last IN token on this endpoint.
64232  *
64233  * Field Enumeration Values:
64234  *
64235  * Enum | Value | Description
64236  * :---------------------------------|:------|:------------------
64237  * ALT_USB_DEV_DIEPINT4_TMO_E_INACT | 0x0 | No interrupt
64238  * ALT_USB_DEV_DIEPINT4_TMO_E_ACT | 0x1 | Timeout interrupy
64239  *
64240  * Field Access Macros:
64241  *
64242  */
64243 /*
64244  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_TMO
64245  *
64246  * No interrupt
64247  */
64248 #define ALT_USB_DEV_DIEPINT4_TMO_E_INACT 0x0
64249 /*
64250  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_TMO
64251  *
64252  * Timeout interrupy
64253  */
64254 #define ALT_USB_DEV_DIEPINT4_TMO_E_ACT 0x1
64255 
64256 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_TMO register field. */
64257 #define ALT_USB_DEV_DIEPINT4_TMO_LSB 3
64258 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_TMO register field. */
64259 #define ALT_USB_DEV_DIEPINT4_TMO_MSB 3
64260 /* The width in bits of the ALT_USB_DEV_DIEPINT4_TMO register field. */
64261 #define ALT_USB_DEV_DIEPINT4_TMO_WIDTH 1
64262 /* The mask used to set the ALT_USB_DEV_DIEPINT4_TMO register field value. */
64263 #define ALT_USB_DEV_DIEPINT4_TMO_SET_MSK 0x00000008
64264 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_TMO register field value. */
64265 #define ALT_USB_DEV_DIEPINT4_TMO_CLR_MSK 0xfffffff7
64266 /* The reset value of the ALT_USB_DEV_DIEPINT4_TMO register field. */
64267 #define ALT_USB_DEV_DIEPINT4_TMO_RESET 0x0
64268 /* Extracts the ALT_USB_DEV_DIEPINT4_TMO field value from a register. */
64269 #define ALT_USB_DEV_DIEPINT4_TMO_GET(value) (((value) & 0x00000008) >> 3)
64270 /* Produces a ALT_USB_DEV_DIEPINT4_TMO register field value suitable for setting the register. */
64271 #define ALT_USB_DEV_DIEPINT4_TMO_SET(value) (((value) << 3) & 0x00000008)
64272 
64273 /*
64274  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
64275  *
64276  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
64277  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
64278  * interrupt is asserted on the endpoint for which the IN token was received.
64279  *
64280  * Field Enumeration Values:
64281  *
64282  * Enum | Value | Description
64283  * :-----------------------------------------|:------|:----------------------------
64284  * ALT_USB_DEV_DIEPINT4_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
64285  * ALT_USB_DEV_DIEPINT4_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
64286  *
64287  * Field Access Macros:
64288  *
64289  */
64290 /*
64291  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_INTKNTXFEMP
64292  *
64293  * No interrupt
64294  */
64295 #define ALT_USB_DEV_DIEPINT4_INTKNTXFEMP_E_INACT 0x0
64296 /*
64297  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_INTKNTXFEMP
64298  *
64299  * IN Token Received Interrupt
64300  */
64301 #define ALT_USB_DEV_DIEPINT4_INTKNTXFEMP_E_ACT 0x1
64302 
64303 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_INTKNTXFEMP register field. */
64304 #define ALT_USB_DEV_DIEPINT4_INTKNTXFEMP_LSB 4
64305 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_INTKNTXFEMP register field. */
64306 #define ALT_USB_DEV_DIEPINT4_INTKNTXFEMP_MSB 4
64307 /* The width in bits of the ALT_USB_DEV_DIEPINT4_INTKNTXFEMP register field. */
64308 #define ALT_USB_DEV_DIEPINT4_INTKNTXFEMP_WIDTH 1
64309 /* The mask used to set the ALT_USB_DEV_DIEPINT4_INTKNTXFEMP register field value. */
64310 #define ALT_USB_DEV_DIEPINT4_INTKNTXFEMP_SET_MSK 0x00000010
64311 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_INTKNTXFEMP register field value. */
64312 #define ALT_USB_DEV_DIEPINT4_INTKNTXFEMP_CLR_MSK 0xffffffef
64313 /* The reset value of the ALT_USB_DEV_DIEPINT4_INTKNTXFEMP register field. */
64314 #define ALT_USB_DEV_DIEPINT4_INTKNTXFEMP_RESET 0x0
64315 /* Extracts the ALT_USB_DEV_DIEPINT4_INTKNTXFEMP field value from a register. */
64316 #define ALT_USB_DEV_DIEPINT4_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
64317 /* Produces a ALT_USB_DEV_DIEPINT4_INTKNTXFEMP register field value suitable for setting the register. */
64318 #define ALT_USB_DEV_DIEPINT4_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
64319 
64320 /*
64321  * Field : IN Token Received with EP Mismatch - intknepmis
64322  *
64323  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
64324  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
64325  * IN token was received. This interrupt is asserted on the endpoint for which the
64326  * IN token was received.
64327  *
64328  * Field Enumeration Values:
64329  *
64330  * Enum | Value | Description
64331  * :----------------------------------------|:------|:---------------------------------------------
64332  * ALT_USB_DEV_DIEPINT4_INTKNEPMIS_E_INACT | 0x0 | No interrupt
64333  * ALT_USB_DEV_DIEPINT4_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
64334  *
64335  * Field Access Macros:
64336  *
64337  */
64338 /*
64339  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_INTKNEPMIS
64340  *
64341  * No interrupt
64342  */
64343 #define ALT_USB_DEV_DIEPINT4_INTKNEPMIS_E_INACT 0x0
64344 /*
64345  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_INTKNEPMIS
64346  *
64347  * IN Token Received with EP Mismatch interrupt
64348  */
64349 #define ALT_USB_DEV_DIEPINT4_INTKNEPMIS_E_ACT 0x1
64350 
64351 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_INTKNEPMIS register field. */
64352 #define ALT_USB_DEV_DIEPINT4_INTKNEPMIS_LSB 5
64353 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_INTKNEPMIS register field. */
64354 #define ALT_USB_DEV_DIEPINT4_INTKNEPMIS_MSB 5
64355 /* The width in bits of the ALT_USB_DEV_DIEPINT4_INTKNEPMIS register field. */
64356 #define ALT_USB_DEV_DIEPINT4_INTKNEPMIS_WIDTH 1
64357 /* The mask used to set the ALT_USB_DEV_DIEPINT4_INTKNEPMIS register field value. */
64358 #define ALT_USB_DEV_DIEPINT4_INTKNEPMIS_SET_MSK 0x00000020
64359 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_INTKNEPMIS register field value. */
64360 #define ALT_USB_DEV_DIEPINT4_INTKNEPMIS_CLR_MSK 0xffffffdf
64361 /* The reset value of the ALT_USB_DEV_DIEPINT4_INTKNEPMIS register field. */
64362 #define ALT_USB_DEV_DIEPINT4_INTKNEPMIS_RESET 0x0
64363 /* Extracts the ALT_USB_DEV_DIEPINT4_INTKNEPMIS field value from a register. */
64364 #define ALT_USB_DEV_DIEPINT4_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
64365 /* Produces a ALT_USB_DEV_DIEPINT4_INTKNEPMIS register field value suitable for setting the register. */
64366 #define ALT_USB_DEV_DIEPINT4_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
64367 
64368 /*
64369  * Field : IN Endpoint NAK Effective - inepnakeff
64370  *
64371  * Applies to periodic IN endpoints only. This bit can be cleared when the
64372  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
64373  * interrupt indicates that the core has sampled the NAK bit Set (either by the
64374  * application or by the core). The interrupt indicates that the IN endpoint NAK
64375  * bit Set by the application has taken effect in the core.This interrupt does not
64376  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
64377  * over a NAK bit.
64378  *
64379  * Field Enumeration Values:
64380  *
64381  * Enum | Value | Description
64382  * :----------------------------------------|:------|:------------------------------------
64383  * ALT_USB_DEV_DIEPINT4_INEPNAKEFF_E_INACT | 0x0 | No interrupt
64384  * ALT_USB_DEV_DIEPINT4_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
64385  *
64386  * Field Access Macros:
64387  *
64388  */
64389 /*
64390  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_INEPNAKEFF
64391  *
64392  * No interrupt
64393  */
64394 #define ALT_USB_DEV_DIEPINT4_INEPNAKEFF_E_INACT 0x0
64395 /*
64396  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_INEPNAKEFF
64397  *
64398  * IN Endpoint NAK Effective interrupt
64399  */
64400 #define ALT_USB_DEV_DIEPINT4_INEPNAKEFF_E_ACT 0x1
64401 
64402 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_INEPNAKEFF register field. */
64403 #define ALT_USB_DEV_DIEPINT4_INEPNAKEFF_LSB 6
64404 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_INEPNAKEFF register field. */
64405 #define ALT_USB_DEV_DIEPINT4_INEPNAKEFF_MSB 6
64406 /* The width in bits of the ALT_USB_DEV_DIEPINT4_INEPNAKEFF register field. */
64407 #define ALT_USB_DEV_DIEPINT4_INEPNAKEFF_WIDTH 1
64408 /* The mask used to set the ALT_USB_DEV_DIEPINT4_INEPNAKEFF register field value. */
64409 #define ALT_USB_DEV_DIEPINT4_INEPNAKEFF_SET_MSK 0x00000040
64410 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_INEPNAKEFF register field value. */
64411 #define ALT_USB_DEV_DIEPINT4_INEPNAKEFF_CLR_MSK 0xffffffbf
64412 /* The reset value of the ALT_USB_DEV_DIEPINT4_INEPNAKEFF register field. */
64413 #define ALT_USB_DEV_DIEPINT4_INEPNAKEFF_RESET 0x0
64414 /* Extracts the ALT_USB_DEV_DIEPINT4_INEPNAKEFF field value from a register. */
64415 #define ALT_USB_DEV_DIEPINT4_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
64416 /* Produces a ALT_USB_DEV_DIEPINT4_INEPNAKEFF register field value suitable for setting the register. */
64417 #define ALT_USB_DEV_DIEPINT4_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
64418 
64419 /*
64420  * Field : Transmit FIFO Empty - txfemp
64421  *
64422  * This bit is valid only for IN Endpoints This interrupt is asserted when the
64423  * TxFIFO for this endpoint is either half or completely empty. The half or
64424  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
64425  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
64426  *
64427  * Field Enumeration Values:
64428  *
64429  * Enum | Value | Description
64430  * :------------------------------------|:------|:------------------------------
64431  * ALT_USB_DEV_DIEPINT4_TXFEMP_E_INACT | 0x0 | No interrupt
64432  * ALT_USB_DEV_DIEPINT4_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
64433  *
64434  * Field Access Macros:
64435  *
64436  */
64437 /*
64438  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_TXFEMP
64439  *
64440  * No interrupt
64441  */
64442 #define ALT_USB_DEV_DIEPINT4_TXFEMP_E_INACT 0x0
64443 /*
64444  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_TXFEMP
64445  *
64446  * Transmit FIFO Empty interrupt
64447  */
64448 #define ALT_USB_DEV_DIEPINT4_TXFEMP_E_ACT 0x1
64449 
64450 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_TXFEMP register field. */
64451 #define ALT_USB_DEV_DIEPINT4_TXFEMP_LSB 7
64452 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_TXFEMP register field. */
64453 #define ALT_USB_DEV_DIEPINT4_TXFEMP_MSB 7
64454 /* The width in bits of the ALT_USB_DEV_DIEPINT4_TXFEMP register field. */
64455 #define ALT_USB_DEV_DIEPINT4_TXFEMP_WIDTH 1
64456 /* The mask used to set the ALT_USB_DEV_DIEPINT4_TXFEMP register field value. */
64457 #define ALT_USB_DEV_DIEPINT4_TXFEMP_SET_MSK 0x00000080
64458 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_TXFEMP register field value. */
64459 #define ALT_USB_DEV_DIEPINT4_TXFEMP_CLR_MSK 0xffffff7f
64460 /* The reset value of the ALT_USB_DEV_DIEPINT4_TXFEMP register field. */
64461 #define ALT_USB_DEV_DIEPINT4_TXFEMP_RESET 0x1
64462 /* Extracts the ALT_USB_DEV_DIEPINT4_TXFEMP field value from a register. */
64463 #define ALT_USB_DEV_DIEPINT4_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
64464 /* Produces a ALT_USB_DEV_DIEPINT4_TXFEMP register field value suitable for setting the register. */
64465 #define ALT_USB_DEV_DIEPINT4_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
64466 
64467 /*
64468  * Field : Fifo Underrun - txfifoundrn
64469  *
64470  * Applies to IN endpoints Only. The core generates this interrupt when it detects
64471  * a transmit FIFO underrun condition for this endpoint.
64472  *
64473  * Field Enumeration Values:
64474  *
64475  * Enum | Value | Description
64476  * :-----------------------------------------|:------|:------------------------
64477  * ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
64478  * ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
64479  *
64480  * Field Access Macros:
64481  *
64482  */
64483 /*
64484  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN
64485  *
64486  * No interrupt
64487  */
64488 #define ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN_E_INACT 0x0
64489 /*
64490  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN
64491  *
64492  * Fifo Underrun interrupt
64493  */
64494 #define ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN_E_ACT 0x1
64495 
64496 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN register field. */
64497 #define ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN_LSB 8
64498 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN register field. */
64499 #define ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN_MSB 8
64500 /* The width in bits of the ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN register field. */
64501 #define ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN_WIDTH 1
64502 /* The mask used to set the ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN register field value. */
64503 #define ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN_SET_MSK 0x00000100
64504 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN register field value. */
64505 #define ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN_CLR_MSK 0xfffffeff
64506 /* The reset value of the ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN register field. */
64507 #define ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN_RESET 0x0
64508 /* Extracts the ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN field value from a register. */
64509 #define ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
64510 /* Produces a ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN register field value suitable for setting the register. */
64511 #define ALT_USB_DEV_DIEPINT4_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
64512 
64513 /*
64514  * Field : BNA Interrupt - bnaintr
64515  *
64516  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
64517  * generates this interrupt when the descriptor accessed is not ready for the Core
64518  * to process, such as Host busy or DMA done
64519  *
64520  * Field Enumeration Values:
64521  *
64522  * Enum | Value | Description
64523  * :-------------------------------------|:------|:--------------
64524  * ALT_USB_DEV_DIEPINT4_BNAINTR_E_INACT | 0x0 | No interrupt
64525  * ALT_USB_DEV_DIEPINT4_BNAINTR_E_ACT | 0x1 | BNA interrupt
64526  *
64527  * Field Access Macros:
64528  *
64529  */
64530 /*
64531  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_BNAINTR
64532  *
64533  * No interrupt
64534  */
64535 #define ALT_USB_DEV_DIEPINT4_BNAINTR_E_INACT 0x0
64536 /*
64537  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_BNAINTR
64538  *
64539  * BNA interrupt
64540  */
64541 #define ALT_USB_DEV_DIEPINT4_BNAINTR_E_ACT 0x1
64542 
64543 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_BNAINTR register field. */
64544 #define ALT_USB_DEV_DIEPINT4_BNAINTR_LSB 9
64545 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_BNAINTR register field. */
64546 #define ALT_USB_DEV_DIEPINT4_BNAINTR_MSB 9
64547 /* The width in bits of the ALT_USB_DEV_DIEPINT4_BNAINTR register field. */
64548 #define ALT_USB_DEV_DIEPINT4_BNAINTR_WIDTH 1
64549 /* The mask used to set the ALT_USB_DEV_DIEPINT4_BNAINTR register field value. */
64550 #define ALT_USB_DEV_DIEPINT4_BNAINTR_SET_MSK 0x00000200
64551 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_BNAINTR register field value. */
64552 #define ALT_USB_DEV_DIEPINT4_BNAINTR_CLR_MSK 0xfffffdff
64553 /* The reset value of the ALT_USB_DEV_DIEPINT4_BNAINTR register field. */
64554 #define ALT_USB_DEV_DIEPINT4_BNAINTR_RESET 0x0
64555 /* Extracts the ALT_USB_DEV_DIEPINT4_BNAINTR field value from a register. */
64556 #define ALT_USB_DEV_DIEPINT4_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
64557 /* Produces a ALT_USB_DEV_DIEPINT4_BNAINTR register field value suitable for setting the register. */
64558 #define ALT_USB_DEV_DIEPINT4_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
64559 
64560 /*
64561  * Field : Packet Drop Status - pktdrpsts
64562  *
64563  * This bit indicates to the application that an ISOC OUT packet has been dropped.
64564  * This bit does not have an associated mask bit and does not generate an
64565  * interrupt.
64566  *
64567  * Field Enumeration Values:
64568  *
64569  * Enum | Value | Description
64570  * :---------------------------------------|:------|:-----------------------------
64571  * ALT_USB_DEV_DIEPINT4_PKTDRPSTS_E_INACT | 0x0 | No interrupt
64572  * ALT_USB_DEV_DIEPINT4_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
64573  *
64574  * Field Access Macros:
64575  *
64576  */
64577 /*
64578  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_PKTDRPSTS
64579  *
64580  * No interrupt
64581  */
64582 #define ALT_USB_DEV_DIEPINT4_PKTDRPSTS_E_INACT 0x0
64583 /*
64584  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_PKTDRPSTS
64585  *
64586  * Packet Drop Status interrupt
64587  */
64588 #define ALT_USB_DEV_DIEPINT4_PKTDRPSTS_E_ACT 0x1
64589 
64590 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_PKTDRPSTS register field. */
64591 #define ALT_USB_DEV_DIEPINT4_PKTDRPSTS_LSB 11
64592 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_PKTDRPSTS register field. */
64593 #define ALT_USB_DEV_DIEPINT4_PKTDRPSTS_MSB 11
64594 /* The width in bits of the ALT_USB_DEV_DIEPINT4_PKTDRPSTS register field. */
64595 #define ALT_USB_DEV_DIEPINT4_PKTDRPSTS_WIDTH 1
64596 /* The mask used to set the ALT_USB_DEV_DIEPINT4_PKTDRPSTS register field value. */
64597 #define ALT_USB_DEV_DIEPINT4_PKTDRPSTS_SET_MSK 0x00000800
64598 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_PKTDRPSTS register field value. */
64599 #define ALT_USB_DEV_DIEPINT4_PKTDRPSTS_CLR_MSK 0xfffff7ff
64600 /* The reset value of the ALT_USB_DEV_DIEPINT4_PKTDRPSTS register field. */
64601 #define ALT_USB_DEV_DIEPINT4_PKTDRPSTS_RESET 0x0
64602 /* Extracts the ALT_USB_DEV_DIEPINT4_PKTDRPSTS field value from a register. */
64603 #define ALT_USB_DEV_DIEPINT4_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
64604 /* Produces a ALT_USB_DEV_DIEPINT4_PKTDRPSTS register field value suitable for setting the register. */
64605 #define ALT_USB_DEV_DIEPINT4_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
64606 
64607 /*
64608  * Field : BbleErr Interrupt - bbleerr
64609  *
64610  * The core generates this interrupt when babble is received for the endpoint.
64611  *
64612  * Field Enumeration Values:
64613  *
64614  * Enum | Value | Description
64615  * :-------------------------------------|:------|:------------------
64616  * ALT_USB_DEV_DIEPINT4_BBLEERR_E_INACT | 0x0 | No interrupt
64617  * ALT_USB_DEV_DIEPINT4_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
64618  *
64619  * Field Access Macros:
64620  *
64621  */
64622 /*
64623  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_BBLEERR
64624  *
64625  * No interrupt
64626  */
64627 #define ALT_USB_DEV_DIEPINT4_BBLEERR_E_INACT 0x0
64628 /*
64629  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_BBLEERR
64630  *
64631  * BbleErr interrupt
64632  */
64633 #define ALT_USB_DEV_DIEPINT4_BBLEERR_E_ACT 0x1
64634 
64635 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_BBLEERR register field. */
64636 #define ALT_USB_DEV_DIEPINT4_BBLEERR_LSB 12
64637 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_BBLEERR register field. */
64638 #define ALT_USB_DEV_DIEPINT4_BBLEERR_MSB 12
64639 /* The width in bits of the ALT_USB_DEV_DIEPINT4_BBLEERR register field. */
64640 #define ALT_USB_DEV_DIEPINT4_BBLEERR_WIDTH 1
64641 /* The mask used to set the ALT_USB_DEV_DIEPINT4_BBLEERR register field value. */
64642 #define ALT_USB_DEV_DIEPINT4_BBLEERR_SET_MSK 0x00001000
64643 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_BBLEERR register field value. */
64644 #define ALT_USB_DEV_DIEPINT4_BBLEERR_CLR_MSK 0xffffefff
64645 /* The reset value of the ALT_USB_DEV_DIEPINT4_BBLEERR register field. */
64646 #define ALT_USB_DEV_DIEPINT4_BBLEERR_RESET 0x0
64647 /* Extracts the ALT_USB_DEV_DIEPINT4_BBLEERR field value from a register. */
64648 #define ALT_USB_DEV_DIEPINT4_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
64649 /* Produces a ALT_USB_DEV_DIEPINT4_BBLEERR register field value suitable for setting the register. */
64650 #define ALT_USB_DEV_DIEPINT4_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
64651 
64652 /*
64653  * Field : NAK Interrupt - nakintrpt
64654  *
64655  * The core generates this interrupt when a NAK is transmitted or received by the
64656  * device. In case of isochronous IN endpoints the interrupt gets generated when a
64657  * zero length packet is transmitted due to un-availability of data in the TXFifo.
64658  *
64659  * Field Enumeration Values:
64660  *
64661  * Enum | Value | Description
64662  * :---------------------------------------|:------|:--------------
64663  * ALT_USB_DEV_DIEPINT4_NAKINTRPT_E_INACT | 0x0 | No interrupt
64664  * ALT_USB_DEV_DIEPINT4_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
64665  *
64666  * Field Access Macros:
64667  *
64668  */
64669 /*
64670  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_NAKINTRPT
64671  *
64672  * No interrupt
64673  */
64674 #define ALT_USB_DEV_DIEPINT4_NAKINTRPT_E_INACT 0x0
64675 /*
64676  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_NAKINTRPT
64677  *
64678  * NAK Interrupt
64679  */
64680 #define ALT_USB_DEV_DIEPINT4_NAKINTRPT_E_ACT 0x1
64681 
64682 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_NAKINTRPT register field. */
64683 #define ALT_USB_DEV_DIEPINT4_NAKINTRPT_LSB 13
64684 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_NAKINTRPT register field. */
64685 #define ALT_USB_DEV_DIEPINT4_NAKINTRPT_MSB 13
64686 /* The width in bits of the ALT_USB_DEV_DIEPINT4_NAKINTRPT register field. */
64687 #define ALT_USB_DEV_DIEPINT4_NAKINTRPT_WIDTH 1
64688 /* The mask used to set the ALT_USB_DEV_DIEPINT4_NAKINTRPT register field value. */
64689 #define ALT_USB_DEV_DIEPINT4_NAKINTRPT_SET_MSK 0x00002000
64690 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_NAKINTRPT register field value. */
64691 #define ALT_USB_DEV_DIEPINT4_NAKINTRPT_CLR_MSK 0xffffdfff
64692 /* The reset value of the ALT_USB_DEV_DIEPINT4_NAKINTRPT register field. */
64693 #define ALT_USB_DEV_DIEPINT4_NAKINTRPT_RESET 0x0
64694 /* Extracts the ALT_USB_DEV_DIEPINT4_NAKINTRPT field value from a register. */
64695 #define ALT_USB_DEV_DIEPINT4_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
64696 /* Produces a ALT_USB_DEV_DIEPINT4_NAKINTRPT register field value suitable for setting the register. */
64697 #define ALT_USB_DEV_DIEPINT4_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
64698 
64699 /*
64700  * Field : NYET Interrupt - nyetintrpt
64701  *
64702  * The core generates this interrupt when a NYET response is transmitted for a non
64703  * isochronous OUT endpoint.
64704  *
64705  * Field Enumeration Values:
64706  *
64707  * Enum | Value | Description
64708  * :----------------------------------------|:------|:---------------
64709  * ALT_USB_DEV_DIEPINT4_NYETINTRPT_E_INACT | 0x0 | No interrupt
64710  * ALT_USB_DEV_DIEPINT4_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
64711  *
64712  * Field Access Macros:
64713  *
64714  */
64715 /*
64716  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_NYETINTRPT
64717  *
64718  * No interrupt
64719  */
64720 #define ALT_USB_DEV_DIEPINT4_NYETINTRPT_E_INACT 0x0
64721 /*
64722  * Enumerated value for register field ALT_USB_DEV_DIEPINT4_NYETINTRPT
64723  *
64724  * NYET Interrupt
64725  */
64726 #define ALT_USB_DEV_DIEPINT4_NYETINTRPT_E_ACT 0x1
64727 
64728 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT4_NYETINTRPT register field. */
64729 #define ALT_USB_DEV_DIEPINT4_NYETINTRPT_LSB 14
64730 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT4_NYETINTRPT register field. */
64731 #define ALT_USB_DEV_DIEPINT4_NYETINTRPT_MSB 14
64732 /* The width in bits of the ALT_USB_DEV_DIEPINT4_NYETINTRPT register field. */
64733 #define ALT_USB_DEV_DIEPINT4_NYETINTRPT_WIDTH 1
64734 /* The mask used to set the ALT_USB_DEV_DIEPINT4_NYETINTRPT register field value. */
64735 #define ALT_USB_DEV_DIEPINT4_NYETINTRPT_SET_MSK 0x00004000
64736 /* The mask used to clear the ALT_USB_DEV_DIEPINT4_NYETINTRPT register field value. */
64737 #define ALT_USB_DEV_DIEPINT4_NYETINTRPT_CLR_MSK 0xffffbfff
64738 /* The reset value of the ALT_USB_DEV_DIEPINT4_NYETINTRPT register field. */
64739 #define ALT_USB_DEV_DIEPINT4_NYETINTRPT_RESET 0x0
64740 /* Extracts the ALT_USB_DEV_DIEPINT4_NYETINTRPT field value from a register. */
64741 #define ALT_USB_DEV_DIEPINT4_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
64742 /* Produces a ALT_USB_DEV_DIEPINT4_NYETINTRPT register field value suitable for setting the register. */
64743 #define ALT_USB_DEV_DIEPINT4_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
64744 
64745 #ifndef __ASSEMBLY__
64746 /*
64747  * WARNING: The C register and register group struct declarations are provided for
64748  * convenience and illustrative purposes. They should, however, be used with
64749  * caution as the C language standard provides no guarantees about the alignment or
64750  * atomicity of device memory accesses. The recommended practice for writing
64751  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
64752  * alt_write_word() functions.
64753  *
64754  * The struct declaration for register ALT_USB_DEV_DIEPINT4.
64755  */
64756 struct ALT_USB_DEV_DIEPINT4_s
64757 {
64758  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
64759  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
64760  const uint32_t ahberr : 1; /* AHB Error */
64761  const uint32_t timeout : 1; /* Timeout Condition */
64762  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
64763  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
64764  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
64765  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
64766  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
64767  const uint32_t bnaintr : 1; /* BNA Interrupt */
64768  uint32_t : 1; /* *UNDEFINED* */
64769  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
64770  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
64771  const uint32_t nakintrpt : 1; /* NAK Interrupt */
64772  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
64773  uint32_t : 17; /* *UNDEFINED* */
64774 };
64775 
64776 /* The typedef declaration for register ALT_USB_DEV_DIEPINT4. */
64777 typedef volatile struct ALT_USB_DEV_DIEPINT4_s ALT_USB_DEV_DIEPINT4_t;
64778 #endif /* __ASSEMBLY__ */
64779 
64780 /* The byte offset of the ALT_USB_DEV_DIEPINT4 register from the beginning of the component. */
64781 #define ALT_USB_DEV_DIEPINT4_OFST 0x188
64782 /* The address of the ALT_USB_DEV_DIEPINT4 register. */
64783 #define ALT_USB_DEV_DIEPINT4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT4_OFST))
64784 
64785 /*
64786  * Register : Device IN Endpoint 4 Transfer Size Register - dieptsiz4
64787  *
64788  * The application must modify this register before enabling the endpoint. Once the
64789  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
64790  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
64791  * application can only read this register once the core has cleared the Endpoint
64792  * Enable bit.
64793  *
64794  * Register Layout
64795  *
64796  * Bits | Access | Reset | Description
64797  * :--------|:-------|:------|:----------------------------
64798  * [18:0] | RW | 0x0 | Transfer Size
64799  * [28:19] | RW | 0x0 | Packet Count
64800  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
64801  * [31] | ??? | 0x0 | *UNDEFINED*
64802  *
64803  */
64804 /*
64805  * Field : Transfer Size - xfersize
64806  *
64807  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
64808  * application only after it has exhausted the transfer size amount of data. The
64809  * transfer size can be Set to the maximum packet size of the endpoint, to be
64810  * interrupted at the end of each packet. The core decrements this field every time
64811  * a packet from the external memory is written to the TxFIFO.
64812  *
64813  * Field Access Macros:
64814  *
64815  */
64816 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ4_XFERSIZE register field. */
64817 #define ALT_USB_DEV_DIEPTSIZ4_XFERSIZE_LSB 0
64818 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ4_XFERSIZE register field. */
64819 #define ALT_USB_DEV_DIEPTSIZ4_XFERSIZE_MSB 18
64820 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ4_XFERSIZE register field. */
64821 #define ALT_USB_DEV_DIEPTSIZ4_XFERSIZE_WIDTH 19
64822 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ4_XFERSIZE register field value. */
64823 #define ALT_USB_DEV_DIEPTSIZ4_XFERSIZE_SET_MSK 0x0007ffff
64824 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ4_XFERSIZE register field value. */
64825 #define ALT_USB_DEV_DIEPTSIZ4_XFERSIZE_CLR_MSK 0xfff80000
64826 /* The reset value of the ALT_USB_DEV_DIEPTSIZ4_XFERSIZE register field. */
64827 #define ALT_USB_DEV_DIEPTSIZ4_XFERSIZE_RESET 0x0
64828 /* Extracts the ALT_USB_DEV_DIEPTSIZ4_XFERSIZE field value from a register. */
64829 #define ALT_USB_DEV_DIEPTSIZ4_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
64830 /* Produces a ALT_USB_DEV_DIEPTSIZ4_XFERSIZE register field value suitable for setting the register. */
64831 #define ALT_USB_DEV_DIEPTSIZ4_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
64832 
64833 /*
64834  * Field : Packet Count - PktCnt
64835  *
64836  * Indicates the total number of USB packets that constitute the Transfer Size
64837  * amount of data for endpoint 0.This field is decremented every time a packet
64838  * (maximum size or short packet) is read from the TxFIFO.
64839  *
64840  * Field Access Macros:
64841  *
64842  */
64843 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ4_PKTCNT register field. */
64844 #define ALT_USB_DEV_DIEPTSIZ4_PKTCNT_LSB 19
64845 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ4_PKTCNT register field. */
64846 #define ALT_USB_DEV_DIEPTSIZ4_PKTCNT_MSB 28
64847 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ4_PKTCNT register field. */
64848 #define ALT_USB_DEV_DIEPTSIZ4_PKTCNT_WIDTH 10
64849 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ4_PKTCNT register field value. */
64850 #define ALT_USB_DEV_DIEPTSIZ4_PKTCNT_SET_MSK 0x1ff80000
64851 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ4_PKTCNT register field value. */
64852 #define ALT_USB_DEV_DIEPTSIZ4_PKTCNT_CLR_MSK 0xe007ffff
64853 /* The reset value of the ALT_USB_DEV_DIEPTSIZ4_PKTCNT register field. */
64854 #define ALT_USB_DEV_DIEPTSIZ4_PKTCNT_RESET 0x0
64855 /* Extracts the ALT_USB_DEV_DIEPTSIZ4_PKTCNT field value from a register. */
64856 #define ALT_USB_DEV_DIEPTSIZ4_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
64857 /* Produces a ALT_USB_DEV_DIEPTSIZ4_PKTCNT register field value suitable for setting the register. */
64858 #define ALT_USB_DEV_DIEPTSIZ4_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
64859 
64860 /*
64861  * Field : Applies to IN endpoints onl - mc
64862  *
64863  * for periodic IN endpoints, this field indicates the number of packets that must
64864  * be transmitted per microframe on the USB. The core uses this field to calculate
64865  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
64866  * field is valid only in Internal DMA mode. It specifies the number of packets the
64867  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
64868  * by the Next Endpoint field of the Device Endpoint-n Control register
64869  * (DIEPCTLn.NextEp)
64870  *
64871  * Field Enumeration Values:
64872  *
64873  * Enum | Value | Description
64874  * :------------------------------------|:------|:------------
64875  * ALT_USB_DEV_DIEPTSIZ4_MC_E_PKTONE | 0x1 | 1 packet
64876  * ALT_USB_DEV_DIEPTSIZ4_MC_E_PKTTWO | 0x2 | 2 packets
64877  * ALT_USB_DEV_DIEPTSIZ4_MC_E_PKTTHREE | 0x3 | 3 packets
64878  *
64879  * Field Access Macros:
64880  *
64881  */
64882 /*
64883  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ4_MC
64884  *
64885  * 1 packet
64886  */
64887 #define ALT_USB_DEV_DIEPTSIZ4_MC_E_PKTONE 0x1
64888 /*
64889  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ4_MC
64890  *
64891  * 2 packets
64892  */
64893 #define ALT_USB_DEV_DIEPTSIZ4_MC_E_PKTTWO 0x2
64894 /*
64895  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ4_MC
64896  *
64897  * 3 packets
64898  */
64899 #define ALT_USB_DEV_DIEPTSIZ4_MC_E_PKTTHREE 0x3
64900 
64901 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ4_MC register field. */
64902 #define ALT_USB_DEV_DIEPTSIZ4_MC_LSB 29
64903 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ4_MC register field. */
64904 #define ALT_USB_DEV_DIEPTSIZ4_MC_MSB 30
64905 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ4_MC register field. */
64906 #define ALT_USB_DEV_DIEPTSIZ4_MC_WIDTH 2
64907 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ4_MC register field value. */
64908 #define ALT_USB_DEV_DIEPTSIZ4_MC_SET_MSK 0x60000000
64909 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ4_MC register field value. */
64910 #define ALT_USB_DEV_DIEPTSIZ4_MC_CLR_MSK 0x9fffffff
64911 /* The reset value of the ALT_USB_DEV_DIEPTSIZ4_MC register field. */
64912 #define ALT_USB_DEV_DIEPTSIZ4_MC_RESET 0x0
64913 /* Extracts the ALT_USB_DEV_DIEPTSIZ4_MC field value from a register. */
64914 #define ALT_USB_DEV_DIEPTSIZ4_MC_GET(value) (((value) & 0x60000000) >> 29)
64915 /* Produces a ALT_USB_DEV_DIEPTSIZ4_MC register field value suitable for setting the register. */
64916 #define ALT_USB_DEV_DIEPTSIZ4_MC_SET(value) (((value) << 29) & 0x60000000)
64917 
64918 #ifndef __ASSEMBLY__
64919 /*
64920  * WARNING: The C register and register group struct declarations are provided for
64921  * convenience and illustrative purposes. They should, however, be used with
64922  * caution as the C language standard provides no guarantees about the alignment or
64923  * atomicity of device memory accesses. The recommended practice for writing
64924  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
64925  * alt_write_word() functions.
64926  *
64927  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ4.
64928  */
64929 struct ALT_USB_DEV_DIEPTSIZ4_s
64930 {
64931  uint32_t xfersize : 19; /* Transfer Size */
64932  uint32_t PktCnt : 10; /* Packet Count */
64933  uint32_t mc : 2; /* Applies to IN endpoints onl */
64934  uint32_t : 1; /* *UNDEFINED* */
64935 };
64936 
64937 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ4. */
64938 typedef volatile struct ALT_USB_DEV_DIEPTSIZ4_s ALT_USB_DEV_DIEPTSIZ4_t;
64939 #endif /* __ASSEMBLY__ */
64940 
64941 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ4 register from the beginning of the component. */
64942 #define ALT_USB_DEV_DIEPTSIZ4_OFST 0x190
64943 /* The address of the ALT_USB_DEV_DIEPTSIZ4 register. */
64944 #define ALT_USB_DEV_DIEPTSIZ4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ4_OFST))
64945 
64946 /*
64947  * Register : Device IN Endpoint 4 DMA Address Register - diepdma4
64948  *
64949  * DMA Addressing.
64950  *
64951  * Register Layout
64952  *
64953  * Bits | Access | Reset | Description
64954  * :-------|:-------|:--------|:------------
64955  * [31:0] | RW | Unknown | DMA Address
64956  *
64957  */
64958 /*
64959  * Field : DMA Address - diepdma4
64960  *
64961  * Holds the start address of the external memory for storing or fetching endpoint
64962  * data. for control endpoints, this field stores control OUT data packets as well
64963  * as SETUP transaction data packets. When more than three SETUP packets are
64964  * received back-to-back, the SETUP data packet in the memory is overwritten. This
64965  * register is incremented on every AHB transaction. The application can give only
64966  * a DWORD-aligned address.
64967  *
64968  * When Scatter/Gather DMA mode is not enabled, the application programs the start
64969  * address value in this field.
64970  *
64971  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
64972  * for the descriptor list.
64973  *
64974  * Field Access Macros:
64975  *
64976  */
64977 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA4_DIEPDMA4 register field. */
64978 #define ALT_USB_DEV_DIEPDMA4_DIEPDMA4_LSB 0
64979 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA4_DIEPDMA4 register field. */
64980 #define ALT_USB_DEV_DIEPDMA4_DIEPDMA4_MSB 31
64981 /* The width in bits of the ALT_USB_DEV_DIEPDMA4_DIEPDMA4 register field. */
64982 #define ALT_USB_DEV_DIEPDMA4_DIEPDMA4_WIDTH 32
64983 /* The mask used to set the ALT_USB_DEV_DIEPDMA4_DIEPDMA4 register field value. */
64984 #define ALT_USB_DEV_DIEPDMA4_DIEPDMA4_SET_MSK 0xffffffff
64985 /* The mask used to clear the ALT_USB_DEV_DIEPDMA4_DIEPDMA4 register field value. */
64986 #define ALT_USB_DEV_DIEPDMA4_DIEPDMA4_CLR_MSK 0x00000000
64987 /* The reset value of the ALT_USB_DEV_DIEPDMA4_DIEPDMA4 register field is UNKNOWN. */
64988 #define ALT_USB_DEV_DIEPDMA4_DIEPDMA4_RESET 0x0
64989 /* Extracts the ALT_USB_DEV_DIEPDMA4_DIEPDMA4 field value from a register. */
64990 #define ALT_USB_DEV_DIEPDMA4_DIEPDMA4_GET(value) (((value) & 0xffffffff) >> 0)
64991 /* Produces a ALT_USB_DEV_DIEPDMA4_DIEPDMA4 register field value suitable for setting the register. */
64992 #define ALT_USB_DEV_DIEPDMA4_DIEPDMA4_SET(value) (((value) << 0) & 0xffffffff)
64993 
64994 #ifndef __ASSEMBLY__
64995 /*
64996  * WARNING: The C register and register group struct declarations are provided for
64997  * convenience and illustrative purposes. They should, however, be used with
64998  * caution as the C language standard provides no guarantees about the alignment or
64999  * atomicity of device memory accesses. The recommended practice for writing
65000  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
65001  * alt_write_word() functions.
65002  *
65003  * The struct declaration for register ALT_USB_DEV_DIEPDMA4.
65004  */
65005 struct ALT_USB_DEV_DIEPDMA4_s
65006 {
65007  uint32_t diepdma4 : 32; /* DMA Address */
65008 };
65009 
65010 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA4. */
65011 typedef volatile struct ALT_USB_DEV_DIEPDMA4_s ALT_USB_DEV_DIEPDMA4_t;
65012 #endif /* __ASSEMBLY__ */
65013 
65014 /* The byte offset of the ALT_USB_DEV_DIEPDMA4 register from the beginning of the component. */
65015 #define ALT_USB_DEV_DIEPDMA4_OFST 0x194
65016 /* The address of the ALT_USB_DEV_DIEPDMA4 register. */
65017 #define ALT_USB_DEV_DIEPDMA4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA4_OFST))
65018 
65019 /*
65020  * Register : Device IN Endpoint Transmit FIFO Status Register 4 - dtxfsts4
65021  *
65022  * This register contains the free space information for the Device IN endpoint
65023  * TxFIFO.
65024  *
65025  * Register Layout
65026  *
65027  * Bits | Access | Reset | Description
65028  * :--------|:-------|:-------|:-------------------------------
65029  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
65030  * [31:16] | ??? | 0x0 | *UNDEFINED*
65031  *
65032  */
65033 /*
65034  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
65035  *
65036  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
65037  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
65038  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
65039  * 32,768 words available Others: Reserved
65040  *
65041  * Field Access Macros:
65042  *
65043  */
65044 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL register field. */
65045 #define ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL_LSB 0
65046 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL register field. */
65047 #define ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL_MSB 15
65048 /* The width in bits of the ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL register field. */
65049 #define ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL_WIDTH 16
65050 /* The mask used to set the ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL register field value. */
65051 #define ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
65052 /* The mask used to clear the ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL register field value. */
65053 #define ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
65054 /* The reset value of the ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL register field. */
65055 #define ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL_RESET 0x2000
65056 /* Extracts the ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL field value from a register. */
65057 #define ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
65058 /* Produces a ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL register field value suitable for setting the register. */
65059 #define ALT_USB_DEV_DTXFSTS4_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
65060 
65061 #ifndef __ASSEMBLY__
65062 /*
65063  * WARNING: The C register and register group struct declarations are provided for
65064  * convenience and illustrative purposes. They should, however, be used with
65065  * caution as the C language standard provides no guarantees about the alignment or
65066  * atomicity of device memory accesses. The recommended practice for writing
65067  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
65068  * alt_write_word() functions.
65069  *
65070  * The struct declaration for register ALT_USB_DEV_DTXFSTS4.
65071  */
65072 struct ALT_USB_DEV_DTXFSTS4_s
65073 {
65074  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
65075  uint32_t : 16; /* *UNDEFINED* */
65076 };
65077 
65078 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS4. */
65079 typedef volatile struct ALT_USB_DEV_DTXFSTS4_s ALT_USB_DEV_DTXFSTS4_t;
65080 #endif /* __ASSEMBLY__ */
65081 
65082 /* The byte offset of the ALT_USB_DEV_DTXFSTS4 register from the beginning of the component. */
65083 #define ALT_USB_DEV_DTXFSTS4_OFST 0x198
65084 /* The address of the ALT_USB_DEV_DTXFSTS4 register. */
65085 #define ALT_USB_DEV_DTXFSTS4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS4_OFST))
65086 
65087 /*
65088  * Register : Device IN Endpoint 4 DMA Buffer Address Register - diepdmab4
65089  *
65090  * DMA Buffer Address.
65091  *
65092  * Register Layout
65093  *
65094  * Bits | Access | Reset | Description
65095  * :-------|:-------|:--------|:-------------------
65096  * [31:0] | R | Unknown | DMA Buffer Address
65097  *
65098  */
65099 /*
65100  * Field : DMA Buffer Address - diepdmab4
65101  *
65102  * Holds the current buffer address. This register is updated as and when the data
65103  * transfer for the corresponding end point is in progress. This register is
65104  * present only in Scatter/Gather DMA mode.
65105  *
65106  * Field Access Macros:
65107  *
65108  */
65109 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4 register field. */
65110 #define ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4_LSB 0
65111 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4 register field. */
65112 #define ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4_MSB 31
65113 /* The width in bits of the ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4 register field. */
65114 #define ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4_WIDTH 32
65115 /* The mask used to set the ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4 register field value. */
65116 #define ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4_SET_MSK 0xffffffff
65117 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4 register field value. */
65118 #define ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4_CLR_MSK 0x00000000
65119 /* The reset value of the ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4 register field is UNKNOWN. */
65120 #define ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4_RESET 0x0
65121 /* Extracts the ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4 field value from a register. */
65122 #define ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4_GET(value) (((value) & 0xffffffff) >> 0)
65123 /* Produces a ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4 register field value suitable for setting the register. */
65124 #define ALT_USB_DEV_DIEPDMAB4_DIEPDMAB4_SET(value) (((value) << 0) & 0xffffffff)
65125 
65126 #ifndef __ASSEMBLY__
65127 /*
65128  * WARNING: The C register and register group struct declarations are provided for
65129  * convenience and illustrative purposes. They should, however, be used with
65130  * caution as the C language standard provides no guarantees about the alignment or
65131  * atomicity of device memory accesses. The recommended practice for writing
65132  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
65133  * alt_write_word() functions.
65134  *
65135  * The struct declaration for register ALT_USB_DEV_DIEPDMAB4.
65136  */
65137 struct ALT_USB_DEV_DIEPDMAB4_s
65138 {
65139  const uint32_t diepdmab4 : 32; /* DMA Buffer Address */
65140 };
65141 
65142 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB4. */
65143 typedef volatile struct ALT_USB_DEV_DIEPDMAB4_s ALT_USB_DEV_DIEPDMAB4_t;
65144 #endif /* __ASSEMBLY__ */
65145 
65146 /* The byte offset of the ALT_USB_DEV_DIEPDMAB4 register from the beginning of the component. */
65147 #define ALT_USB_DEV_DIEPDMAB4_OFST 0x19c
65148 /* The address of the ALT_USB_DEV_DIEPDMAB4 register. */
65149 #define ALT_USB_DEV_DIEPDMAB4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB4_OFST))
65150 
65151 /*
65152  * Register : Device Control IN Endpoint 5 Control Register - diepctl5
65153  *
65154  * Endpoint_number: 5
65155  *
65156  * Register Layout
65157  *
65158  * Bits | Access | Reset | Description
65159  * :--------|:-------|:------|:--------------------
65160  * [10:0] | RW | 0x0 | Maximum Packet Size
65161  * [14:11] | ??? | 0x0 | *UNDEFINED*
65162  * [15] | RW | 0x0 | USB Active Endpoint
65163  * [16] | R | 0x0 | Endpoint Data PID
65164  * [17] | R | 0x0 | NAK Status
65165  * [19:18] | RW | 0x0 | Endpoint Type
65166  * [20] | ??? | 0x0 | *UNDEFINED*
65167  * [21] | R | 0x0 | STALL Handshake
65168  * [25:22] | RW | 0x0 | TxFIFO Number
65169  * [26] | W | 0x0 | Clear NAK
65170  * [27] | W | 0x0 | Set NAK
65171  * [28] | W | 0x0 | Set DATA0 PID
65172  * [29] | W | 0x0 | Set DATA1 PID
65173  * [30] | R | 0x0 | Endpoint Disable
65174  * [31] | R | 0x0 | Endpoint Enable
65175  *
65176  */
65177 /*
65178  * Field : Maximum Packet Size - mps
65179  *
65180  * Applies to IN and OUT endpoints. The application must program this field with
65181  * the maximum packet size for the current logical endpoint. This value is in
65182  * bytes.
65183  *
65184  * Field Access Macros:
65185  *
65186  */
65187 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_MPS register field. */
65188 #define ALT_USB_DEV_DIEPCTL5_MPS_LSB 0
65189 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_MPS register field. */
65190 #define ALT_USB_DEV_DIEPCTL5_MPS_MSB 10
65191 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_MPS register field. */
65192 #define ALT_USB_DEV_DIEPCTL5_MPS_WIDTH 11
65193 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_MPS register field value. */
65194 #define ALT_USB_DEV_DIEPCTL5_MPS_SET_MSK 0x000007ff
65195 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_MPS register field value. */
65196 #define ALT_USB_DEV_DIEPCTL5_MPS_CLR_MSK 0xfffff800
65197 /* The reset value of the ALT_USB_DEV_DIEPCTL5_MPS register field. */
65198 #define ALT_USB_DEV_DIEPCTL5_MPS_RESET 0x0
65199 /* Extracts the ALT_USB_DEV_DIEPCTL5_MPS field value from a register. */
65200 #define ALT_USB_DEV_DIEPCTL5_MPS_GET(value) (((value) & 0x000007ff) >> 0)
65201 /* Produces a ALT_USB_DEV_DIEPCTL5_MPS register field value suitable for setting the register. */
65202 #define ALT_USB_DEV_DIEPCTL5_MPS_SET(value) (((value) << 0) & 0x000007ff)
65203 
65204 /*
65205  * Field : USB Active Endpoint - usbactep
65206  *
65207  * Indicates whether this endpoint is active in the current configuration and
65208  * interface. The core clears this bit for all endpoints (other than EP 0) after
65209  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
65210  * commands, the application must program endpoint registers accordingly and set
65211  * this bit.
65212  *
65213  * Field Enumeration Values:
65214  *
65215  * Enum | Value | Description
65216  * :-------------------------------------|:------|:--------------------
65217  * ALT_USB_DEV_DIEPCTL5_USBACTEP_E_DISD | 0x0 | Not Active
65218  * ALT_USB_DEV_DIEPCTL5_USBACTEP_E_END | 0x1 | USB Active Endpoint
65219  *
65220  * Field Access Macros:
65221  *
65222  */
65223 /*
65224  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_USBACTEP
65225  *
65226  * Not Active
65227  */
65228 #define ALT_USB_DEV_DIEPCTL5_USBACTEP_E_DISD 0x0
65229 /*
65230  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_USBACTEP
65231  *
65232  * USB Active Endpoint
65233  */
65234 #define ALT_USB_DEV_DIEPCTL5_USBACTEP_E_END 0x1
65235 
65236 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_USBACTEP register field. */
65237 #define ALT_USB_DEV_DIEPCTL5_USBACTEP_LSB 15
65238 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_USBACTEP register field. */
65239 #define ALT_USB_DEV_DIEPCTL5_USBACTEP_MSB 15
65240 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_USBACTEP register field. */
65241 #define ALT_USB_DEV_DIEPCTL5_USBACTEP_WIDTH 1
65242 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_USBACTEP register field value. */
65243 #define ALT_USB_DEV_DIEPCTL5_USBACTEP_SET_MSK 0x00008000
65244 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_USBACTEP register field value. */
65245 #define ALT_USB_DEV_DIEPCTL5_USBACTEP_CLR_MSK 0xffff7fff
65246 /* The reset value of the ALT_USB_DEV_DIEPCTL5_USBACTEP register field. */
65247 #define ALT_USB_DEV_DIEPCTL5_USBACTEP_RESET 0x0
65248 /* Extracts the ALT_USB_DEV_DIEPCTL5_USBACTEP field value from a register. */
65249 #define ALT_USB_DEV_DIEPCTL5_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
65250 /* Produces a ALT_USB_DEV_DIEPCTL5_USBACTEP register field value suitable for setting the register. */
65251 #define ALT_USB_DEV_DIEPCTL5_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
65252 
65253 /*
65254  * Field : Endpoint Data PID - dpid
65255  *
65256  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
65257  * packet to be received or transmitted on this endpoint. The application must
65258  * program the PID of the first packet to be received or transmitted on this
65259  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
65260  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
65261  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
65262  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
65263  * DMA mode:
65264  *
65265  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
65266  * number in which the core transmits/receives isochronous data for this endpoint.
65267  * The application must program the even/odd (micro) frame number in which it
65268  * intends to transmit/receive isochronous data for this endpoint using the
65269  * SetEvnFr and SetOddFr fields in this register.
65270  *
65271  * 0: Even (micro)frame
65272  *
65273  * 1: Odd (micro)frame
65274  *
65275  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
65276  * number in which to send data is provided in the transmit descriptor structure.
65277  * The frame in which data is received is updated in receive descriptor structure.
65278  *
65279  * Field Enumeration Values:
65280  *
65281  * Enum | Value | Description
65282  * :----------------------------------|:------|:-----------------------------
65283  * ALT_USB_DEV_DIEPCTL5_DPID_E_INACT | 0x0 | Endpoint Data PID not active
65284  * ALT_USB_DEV_DIEPCTL5_DPID_E_ACT | 0x1 | Endpoint Data PID active
65285  *
65286  * Field Access Macros:
65287  *
65288  */
65289 /*
65290  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_DPID
65291  *
65292  * Endpoint Data PID not active
65293  */
65294 #define ALT_USB_DEV_DIEPCTL5_DPID_E_INACT 0x0
65295 /*
65296  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_DPID
65297  *
65298  * Endpoint Data PID active
65299  */
65300 #define ALT_USB_DEV_DIEPCTL5_DPID_E_ACT 0x1
65301 
65302 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_DPID register field. */
65303 #define ALT_USB_DEV_DIEPCTL5_DPID_LSB 16
65304 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_DPID register field. */
65305 #define ALT_USB_DEV_DIEPCTL5_DPID_MSB 16
65306 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_DPID register field. */
65307 #define ALT_USB_DEV_DIEPCTL5_DPID_WIDTH 1
65308 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_DPID register field value. */
65309 #define ALT_USB_DEV_DIEPCTL5_DPID_SET_MSK 0x00010000
65310 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_DPID register field value. */
65311 #define ALT_USB_DEV_DIEPCTL5_DPID_CLR_MSK 0xfffeffff
65312 /* The reset value of the ALT_USB_DEV_DIEPCTL5_DPID register field. */
65313 #define ALT_USB_DEV_DIEPCTL5_DPID_RESET 0x0
65314 /* Extracts the ALT_USB_DEV_DIEPCTL5_DPID field value from a register. */
65315 #define ALT_USB_DEV_DIEPCTL5_DPID_GET(value) (((value) & 0x00010000) >> 16)
65316 /* Produces a ALT_USB_DEV_DIEPCTL5_DPID register field value suitable for setting the register. */
65317 #define ALT_USB_DEV_DIEPCTL5_DPID_SET(value) (((value) << 16) & 0x00010000)
65318 
65319 /*
65320  * Field : NAK Status - naksts
65321  *
65322  * When either the application or the core sets this bit:
65323  *
65324  * * The core stops receiving any data on an OUT endpoint, even if there is space
65325  * in the RxFIFO to accommodate the incoming packet.
65326  *
65327  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
65328  * IN endpoint, even if there data is available in the TxFIFO.
65329  *
65330  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
65331  * even if there data is available in the TxFIFO.
65332  *
65333  * Irrespective of this bit's setting, the core always responds to SETUP data
65334  * packets with an ACK handshake.
65335  *
65336  * Field Enumeration Values:
65337  *
65338  * Enum | Value | Description
65339  * :-------------------------------------|:------|:------------------------------------------------
65340  * ALT_USB_DEV_DIEPCTL5_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
65341  * : | | based on the FIFO status
65342  * ALT_USB_DEV_DIEPCTL5_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
65343  * : | | endpoint
65344  *
65345  * Field Access Macros:
65346  *
65347  */
65348 /*
65349  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_NAKSTS
65350  *
65351  * The core is transmitting non-NAK handshakes based on the FIFO status
65352  */
65353 #define ALT_USB_DEV_DIEPCTL5_NAKSTS_E_NONNAK 0x0
65354 /*
65355  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_NAKSTS
65356  *
65357  * The core is transmitting NAK handshakes on this endpoint
65358  */
65359 #define ALT_USB_DEV_DIEPCTL5_NAKSTS_E_NAK 0x1
65360 
65361 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_NAKSTS register field. */
65362 #define ALT_USB_DEV_DIEPCTL5_NAKSTS_LSB 17
65363 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_NAKSTS register field. */
65364 #define ALT_USB_DEV_DIEPCTL5_NAKSTS_MSB 17
65365 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_NAKSTS register field. */
65366 #define ALT_USB_DEV_DIEPCTL5_NAKSTS_WIDTH 1
65367 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_NAKSTS register field value. */
65368 #define ALT_USB_DEV_DIEPCTL5_NAKSTS_SET_MSK 0x00020000
65369 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_NAKSTS register field value. */
65370 #define ALT_USB_DEV_DIEPCTL5_NAKSTS_CLR_MSK 0xfffdffff
65371 /* The reset value of the ALT_USB_DEV_DIEPCTL5_NAKSTS register field. */
65372 #define ALT_USB_DEV_DIEPCTL5_NAKSTS_RESET 0x0
65373 /* Extracts the ALT_USB_DEV_DIEPCTL5_NAKSTS field value from a register. */
65374 #define ALT_USB_DEV_DIEPCTL5_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
65375 /* Produces a ALT_USB_DEV_DIEPCTL5_NAKSTS register field value suitable for setting the register. */
65376 #define ALT_USB_DEV_DIEPCTL5_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
65377 
65378 /*
65379  * Field : Endpoint Type - eptype
65380  *
65381  * This is the transfer type supported by this logical endpoint.
65382  *
65383  * Field Enumeration Values:
65384  *
65385  * Enum | Value | Description
65386  * :------------------------------------------|:------|:------------
65387  * ALT_USB_DEV_DIEPCTL5_EPTYPE_E_CTL | 0x0 | Control
65388  * ALT_USB_DEV_DIEPCTL5_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
65389  * ALT_USB_DEV_DIEPCTL5_EPTYPE_E_BULK | 0x2 | Bulk
65390  * ALT_USB_DEV_DIEPCTL5_EPTYPE_E_INTERRUP | 0x3 | Interrupt
65391  *
65392  * Field Access Macros:
65393  *
65394  */
65395 /*
65396  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_EPTYPE
65397  *
65398  * Control
65399  */
65400 #define ALT_USB_DEV_DIEPCTL5_EPTYPE_E_CTL 0x0
65401 /*
65402  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_EPTYPE
65403  *
65404  * Isochronous
65405  */
65406 #define ALT_USB_DEV_DIEPCTL5_EPTYPE_E_ISOCHRONOUS 0x1
65407 /*
65408  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_EPTYPE
65409  *
65410  * Bulk
65411  */
65412 #define ALT_USB_DEV_DIEPCTL5_EPTYPE_E_BULK 0x2
65413 /*
65414  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_EPTYPE
65415  *
65416  * Interrupt
65417  */
65418 #define ALT_USB_DEV_DIEPCTL5_EPTYPE_E_INTERRUP 0x3
65419 
65420 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_EPTYPE register field. */
65421 #define ALT_USB_DEV_DIEPCTL5_EPTYPE_LSB 18
65422 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_EPTYPE register field. */
65423 #define ALT_USB_DEV_DIEPCTL5_EPTYPE_MSB 19
65424 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_EPTYPE register field. */
65425 #define ALT_USB_DEV_DIEPCTL5_EPTYPE_WIDTH 2
65426 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_EPTYPE register field value. */
65427 #define ALT_USB_DEV_DIEPCTL5_EPTYPE_SET_MSK 0x000c0000
65428 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_EPTYPE register field value. */
65429 #define ALT_USB_DEV_DIEPCTL5_EPTYPE_CLR_MSK 0xfff3ffff
65430 /* The reset value of the ALT_USB_DEV_DIEPCTL5_EPTYPE register field. */
65431 #define ALT_USB_DEV_DIEPCTL5_EPTYPE_RESET 0x0
65432 /* Extracts the ALT_USB_DEV_DIEPCTL5_EPTYPE field value from a register. */
65433 #define ALT_USB_DEV_DIEPCTL5_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
65434 /* Produces a ALT_USB_DEV_DIEPCTL5_EPTYPE register field value suitable for setting the register. */
65435 #define ALT_USB_DEV_DIEPCTL5_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
65436 
65437 /*
65438  * Field : STALL Handshake - stall
65439  *
65440  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
65441  * application sets this bit to stall all tokens from the USB host to this
65442  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
65443  * along with this bit, the STALL bit takes priority. Only the application can
65444  * clear this bit, never the core. Applies to control endpoints only. The
65445  * application can only set this bit, and the core clears it, when a SETUP token is
65446  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
65447  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
65448  * of this bit's setting, the core always responds to SETUP data packets with an
65449  * ACK handshake.
65450  *
65451  * Field Enumeration Values:
65452  *
65453  * Enum | Value | Description
65454  * :-----------------------------------|:------|:----------------------------
65455  * ALT_USB_DEV_DIEPCTL5_STALL_E_INACT | 0x0 | STALL All Tokens not active
65456  * ALT_USB_DEV_DIEPCTL5_STALL_E_ACT | 0x1 | STALL All Tokens active
65457  *
65458  * Field Access Macros:
65459  *
65460  */
65461 /*
65462  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_STALL
65463  *
65464  * STALL All Tokens not active
65465  */
65466 #define ALT_USB_DEV_DIEPCTL5_STALL_E_INACT 0x0
65467 /*
65468  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_STALL
65469  *
65470  * STALL All Tokens active
65471  */
65472 #define ALT_USB_DEV_DIEPCTL5_STALL_E_ACT 0x1
65473 
65474 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_STALL register field. */
65475 #define ALT_USB_DEV_DIEPCTL5_STALL_LSB 21
65476 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_STALL register field. */
65477 #define ALT_USB_DEV_DIEPCTL5_STALL_MSB 21
65478 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_STALL register field. */
65479 #define ALT_USB_DEV_DIEPCTL5_STALL_WIDTH 1
65480 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_STALL register field value. */
65481 #define ALT_USB_DEV_DIEPCTL5_STALL_SET_MSK 0x00200000
65482 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_STALL register field value. */
65483 #define ALT_USB_DEV_DIEPCTL5_STALL_CLR_MSK 0xffdfffff
65484 /* The reset value of the ALT_USB_DEV_DIEPCTL5_STALL register field. */
65485 #define ALT_USB_DEV_DIEPCTL5_STALL_RESET 0x0
65486 /* Extracts the ALT_USB_DEV_DIEPCTL5_STALL field value from a register. */
65487 #define ALT_USB_DEV_DIEPCTL5_STALL_GET(value) (((value) & 0x00200000) >> 21)
65488 /* Produces a ALT_USB_DEV_DIEPCTL5_STALL register field value suitable for setting the register. */
65489 #define ALT_USB_DEV_DIEPCTL5_STALL_SET(value) (((value) << 21) & 0x00200000)
65490 
65491 /*
65492  * Field : TxFIFO Number - txfnum
65493  *
65494  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
65495  * endpoints must map this to the corresponding Periodic TxFIFO number.
65496  *
65497  * 4'h0: Non-Periodic TxFIFO
65498  *
65499  * Others: Specified Periodic TxFIFO.number
65500  *
65501  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
65502  * applications such as mass storage. The core treats an IN endpoint as a non-
65503  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
65504  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
65505  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
65506  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
65507  * This field is valid only for IN endpoints.
65508  *
65509  * Field Access Macros:
65510  *
65511  */
65512 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_TXFNUM register field. */
65513 #define ALT_USB_DEV_DIEPCTL5_TXFNUM_LSB 22
65514 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_TXFNUM register field. */
65515 #define ALT_USB_DEV_DIEPCTL5_TXFNUM_MSB 25
65516 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_TXFNUM register field. */
65517 #define ALT_USB_DEV_DIEPCTL5_TXFNUM_WIDTH 4
65518 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_TXFNUM register field value. */
65519 #define ALT_USB_DEV_DIEPCTL5_TXFNUM_SET_MSK 0x03c00000
65520 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_TXFNUM register field value. */
65521 #define ALT_USB_DEV_DIEPCTL5_TXFNUM_CLR_MSK 0xfc3fffff
65522 /* The reset value of the ALT_USB_DEV_DIEPCTL5_TXFNUM register field. */
65523 #define ALT_USB_DEV_DIEPCTL5_TXFNUM_RESET 0x0
65524 /* Extracts the ALT_USB_DEV_DIEPCTL5_TXFNUM field value from a register. */
65525 #define ALT_USB_DEV_DIEPCTL5_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
65526 /* Produces a ALT_USB_DEV_DIEPCTL5_TXFNUM register field value suitable for setting the register. */
65527 #define ALT_USB_DEV_DIEPCTL5_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
65528 
65529 /*
65530  * Field : Clear NAK - cnak
65531  *
65532  * A write to this bit clears the NAK bit for the endpoint.
65533  *
65534  * Field Enumeration Values:
65535  *
65536  * Enum | Value | Description
65537  * :----------------------------------|:------|:-------------
65538  * ALT_USB_DEV_DIEPCTL5_CNAK_E_INACT | 0x0 | No Clear NAK
65539  * ALT_USB_DEV_DIEPCTL5_CNAK_E_ACT | 0x1 | Clear NAK
65540  *
65541  * Field Access Macros:
65542  *
65543  */
65544 /*
65545  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_CNAK
65546  *
65547  * No Clear NAK
65548  */
65549 #define ALT_USB_DEV_DIEPCTL5_CNAK_E_INACT 0x0
65550 /*
65551  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_CNAK
65552  *
65553  * Clear NAK
65554  */
65555 #define ALT_USB_DEV_DIEPCTL5_CNAK_E_ACT 0x1
65556 
65557 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_CNAK register field. */
65558 #define ALT_USB_DEV_DIEPCTL5_CNAK_LSB 26
65559 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_CNAK register field. */
65560 #define ALT_USB_DEV_DIEPCTL5_CNAK_MSB 26
65561 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_CNAK register field. */
65562 #define ALT_USB_DEV_DIEPCTL5_CNAK_WIDTH 1
65563 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_CNAK register field value. */
65564 #define ALT_USB_DEV_DIEPCTL5_CNAK_SET_MSK 0x04000000
65565 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_CNAK register field value. */
65566 #define ALT_USB_DEV_DIEPCTL5_CNAK_CLR_MSK 0xfbffffff
65567 /* The reset value of the ALT_USB_DEV_DIEPCTL5_CNAK register field. */
65568 #define ALT_USB_DEV_DIEPCTL5_CNAK_RESET 0x0
65569 /* Extracts the ALT_USB_DEV_DIEPCTL5_CNAK field value from a register. */
65570 #define ALT_USB_DEV_DIEPCTL5_CNAK_GET(value) (((value) & 0x04000000) >> 26)
65571 /* Produces a ALT_USB_DEV_DIEPCTL5_CNAK register field value suitable for setting the register. */
65572 #define ALT_USB_DEV_DIEPCTL5_CNAK_SET(value) (((value) << 26) & 0x04000000)
65573 
65574 /*
65575  * Field : Set NAK - snak
65576  *
65577  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
65578  * application can control the transmission of NAK handshakes on an endpoint. The
65579  * core can also Set this bit for an endpoint after a SETUP packet is received on
65580  * that endpoint.
65581  *
65582  * Field Enumeration Values:
65583  *
65584  * Enum | Value | Description
65585  * :----------------------------------|:------|:------------
65586  * ALT_USB_DEV_DIEPCTL5_SNAK_E_INACT | 0x0 | No Set NAK
65587  * ALT_USB_DEV_DIEPCTL5_SNAK_E_ACT | 0x1 | Set NAK
65588  *
65589  * Field Access Macros:
65590  *
65591  */
65592 /*
65593  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_SNAK
65594  *
65595  * No Set NAK
65596  */
65597 #define ALT_USB_DEV_DIEPCTL5_SNAK_E_INACT 0x0
65598 /*
65599  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_SNAK
65600  *
65601  * Set NAK
65602  */
65603 #define ALT_USB_DEV_DIEPCTL5_SNAK_E_ACT 0x1
65604 
65605 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_SNAK register field. */
65606 #define ALT_USB_DEV_DIEPCTL5_SNAK_LSB 27
65607 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_SNAK register field. */
65608 #define ALT_USB_DEV_DIEPCTL5_SNAK_MSB 27
65609 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_SNAK register field. */
65610 #define ALT_USB_DEV_DIEPCTL5_SNAK_WIDTH 1
65611 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_SNAK register field value. */
65612 #define ALT_USB_DEV_DIEPCTL5_SNAK_SET_MSK 0x08000000
65613 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_SNAK register field value. */
65614 #define ALT_USB_DEV_DIEPCTL5_SNAK_CLR_MSK 0xf7ffffff
65615 /* The reset value of the ALT_USB_DEV_DIEPCTL5_SNAK register field. */
65616 #define ALT_USB_DEV_DIEPCTL5_SNAK_RESET 0x0
65617 /* Extracts the ALT_USB_DEV_DIEPCTL5_SNAK field value from a register. */
65618 #define ALT_USB_DEV_DIEPCTL5_SNAK_GET(value) (((value) & 0x08000000) >> 27)
65619 /* Produces a ALT_USB_DEV_DIEPCTL5_SNAK register field value suitable for setting the register. */
65620 #define ALT_USB_DEV_DIEPCTL5_SNAK_SET(value) (((value) << 27) & 0x08000000)
65621 
65622 /*
65623  * Field : Set DATA0 PID - setd0pid
65624  *
65625  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
65626  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
65627  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
65628  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
65629  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
65630  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
65631  * mode is enabled, this field is reserved. The frame number in which to send data
65632  * is in the transmit descriptor structure. The frame in which to receive data is
65633  * updated in receive descriptor structure.
65634  *
65635  * Field Enumeration Values:
65636  *
65637  * Enum | Value | Description
65638  * :-------------------------------------|:------|:----------------------------
65639  * ALT_USB_DEV_DIEPCTL5_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
65640  * ALT_USB_DEV_DIEPCTL5_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
65641  *
65642  * Field Access Macros:
65643  *
65644  */
65645 /*
65646  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_SETD0PID
65647  *
65648  * Disables Set DATA0 PID
65649  */
65650 #define ALT_USB_DEV_DIEPCTL5_SETD0PID_E_DISD 0x0
65651 /*
65652  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_SETD0PID
65653  *
65654  * Endpoint Data PID to DATA0)
65655  */
65656 #define ALT_USB_DEV_DIEPCTL5_SETD0PID_E_END 0x1
65657 
65658 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_SETD0PID register field. */
65659 #define ALT_USB_DEV_DIEPCTL5_SETD0PID_LSB 28
65660 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_SETD0PID register field. */
65661 #define ALT_USB_DEV_DIEPCTL5_SETD0PID_MSB 28
65662 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_SETD0PID register field. */
65663 #define ALT_USB_DEV_DIEPCTL5_SETD0PID_WIDTH 1
65664 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_SETD0PID register field value. */
65665 #define ALT_USB_DEV_DIEPCTL5_SETD0PID_SET_MSK 0x10000000
65666 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_SETD0PID register field value. */
65667 #define ALT_USB_DEV_DIEPCTL5_SETD0PID_CLR_MSK 0xefffffff
65668 /* The reset value of the ALT_USB_DEV_DIEPCTL5_SETD0PID register field. */
65669 #define ALT_USB_DEV_DIEPCTL5_SETD0PID_RESET 0x0
65670 /* Extracts the ALT_USB_DEV_DIEPCTL5_SETD0PID field value from a register. */
65671 #define ALT_USB_DEV_DIEPCTL5_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
65672 /* Produces a ALT_USB_DEV_DIEPCTL5_SETD0PID register field value suitable for setting the register. */
65673 #define ALT_USB_DEV_DIEPCTL5_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
65674 
65675 /*
65676  * Field : Set DATA1 PID - setd1pid
65677  *
65678  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
65679  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
65680  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
65681  *
65682  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
65683  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
65684  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
65685  *
65686  * Field Enumeration Values:
65687  *
65688  * Enum | Value | Description
65689  * :-------------------------------------|:------|:-----------------------
65690  * ALT_USB_DEV_DIEPCTL5_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
65691  * ALT_USB_DEV_DIEPCTL5_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
65692  *
65693  * Field Access Macros:
65694  *
65695  */
65696 /*
65697  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_SETD1PID
65698  *
65699  * Disables Set DATA1 PID
65700  */
65701 #define ALT_USB_DEV_DIEPCTL5_SETD1PID_E_DISD 0x0
65702 /*
65703  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_SETD1PID
65704  *
65705  * Enables Set DATA1 PID
65706  */
65707 #define ALT_USB_DEV_DIEPCTL5_SETD1PID_E_END 0x1
65708 
65709 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_SETD1PID register field. */
65710 #define ALT_USB_DEV_DIEPCTL5_SETD1PID_LSB 29
65711 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_SETD1PID register field. */
65712 #define ALT_USB_DEV_DIEPCTL5_SETD1PID_MSB 29
65713 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_SETD1PID register field. */
65714 #define ALT_USB_DEV_DIEPCTL5_SETD1PID_WIDTH 1
65715 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_SETD1PID register field value. */
65716 #define ALT_USB_DEV_DIEPCTL5_SETD1PID_SET_MSK 0x20000000
65717 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_SETD1PID register field value. */
65718 #define ALT_USB_DEV_DIEPCTL5_SETD1PID_CLR_MSK 0xdfffffff
65719 /* The reset value of the ALT_USB_DEV_DIEPCTL5_SETD1PID register field. */
65720 #define ALT_USB_DEV_DIEPCTL5_SETD1PID_RESET 0x0
65721 /* Extracts the ALT_USB_DEV_DIEPCTL5_SETD1PID field value from a register. */
65722 #define ALT_USB_DEV_DIEPCTL5_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
65723 /* Produces a ALT_USB_DEV_DIEPCTL5_SETD1PID register field value suitable for setting the register. */
65724 #define ALT_USB_DEV_DIEPCTL5_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
65725 
65726 /*
65727  * Field : Endpoint Disable - epdis
65728  *
65729  * Applies to IN and OUT endpoints. The application sets this bit to stop
65730  * transmitting/receiving data on an endpoint, even before the transfer for that
65731  * endpoint is complete. The application must wait for the Endpoint Disabled
65732  * interrupt before treating the endpoint as disabled. The core clears this bit
65733  * before setting the Endpoint Disabled interrupt. The application must set this
65734  * bit only if Endpoint Enable is already set for this endpoint.
65735  *
65736  * Field Enumeration Values:
65737  *
65738  * Enum | Value | Description
65739  * :-----------------------------------|:------|:--------------------
65740  * ALT_USB_DEV_DIEPCTL5_EPDIS_E_INACT | 0x0 | No Endpoint Disable
65741  * ALT_USB_DEV_DIEPCTL5_EPDIS_E_ACT | 0x1 | Endpoint Disable
65742  *
65743  * Field Access Macros:
65744  *
65745  */
65746 /*
65747  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_EPDIS
65748  *
65749  * No Endpoint Disable
65750  */
65751 #define ALT_USB_DEV_DIEPCTL5_EPDIS_E_INACT 0x0
65752 /*
65753  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_EPDIS
65754  *
65755  * Endpoint Disable
65756  */
65757 #define ALT_USB_DEV_DIEPCTL5_EPDIS_E_ACT 0x1
65758 
65759 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_EPDIS register field. */
65760 #define ALT_USB_DEV_DIEPCTL5_EPDIS_LSB 30
65761 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_EPDIS register field. */
65762 #define ALT_USB_DEV_DIEPCTL5_EPDIS_MSB 30
65763 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_EPDIS register field. */
65764 #define ALT_USB_DEV_DIEPCTL5_EPDIS_WIDTH 1
65765 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_EPDIS register field value. */
65766 #define ALT_USB_DEV_DIEPCTL5_EPDIS_SET_MSK 0x40000000
65767 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_EPDIS register field value. */
65768 #define ALT_USB_DEV_DIEPCTL5_EPDIS_CLR_MSK 0xbfffffff
65769 /* The reset value of the ALT_USB_DEV_DIEPCTL5_EPDIS register field. */
65770 #define ALT_USB_DEV_DIEPCTL5_EPDIS_RESET 0x0
65771 /* Extracts the ALT_USB_DEV_DIEPCTL5_EPDIS field value from a register. */
65772 #define ALT_USB_DEV_DIEPCTL5_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
65773 /* Produces a ALT_USB_DEV_DIEPCTL5_EPDIS register field value suitable for setting the register. */
65774 #define ALT_USB_DEV_DIEPCTL5_EPDIS_SET(value) (((value) << 30) & 0x40000000)
65775 
65776 /*
65777  * Field : Endpoint Enable - epena
65778  *
65779  * Applies to IN and OUT endpoints.
65780  *
65781  * * When Scatter/Gather DMA mode is enabled,
65782  *
65783  * * for IN endpoints this bit indicates that the descriptor structure and data
65784  * buffer with data ready to transmit is setup.
65785  *
65786  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
65787  * receive data is setup.
65788  *
65789  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
65790  * mode:
65791  *
65792  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
65793  * the endpoint.
65794  *
65795  * * for OUT endpoints, this bit indicates that the application has allocated the
65796  * memory to start receiving data from the USB.
65797  *
65798  * * The core clears this bit before setting any of the following interrupts on
65799  * this endpoint:
65800  *
65801  * * SETUP Phase Done
65802  *
65803  * * Endpoint Disabled
65804  *
65805  * * Transfer Completed
65806  *
65807  * for control endpoints in DMA mode, this bit must be set to be able to transfer
65808  * SETUP data packets in memory.
65809  *
65810  * Field Enumeration Values:
65811  *
65812  * Enum | Value | Description
65813  * :-----------------------------------|:------|:-------------------------
65814  * ALT_USB_DEV_DIEPCTL5_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
65815  * ALT_USB_DEV_DIEPCTL5_EPENA_E_ACT | 0x1 | Endpoint Enable active
65816  *
65817  * Field Access Macros:
65818  *
65819  */
65820 /*
65821  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_EPENA
65822  *
65823  * Endpoint Enable inactive
65824  */
65825 #define ALT_USB_DEV_DIEPCTL5_EPENA_E_INACT 0x0
65826 /*
65827  * Enumerated value for register field ALT_USB_DEV_DIEPCTL5_EPENA
65828  *
65829  * Endpoint Enable active
65830  */
65831 #define ALT_USB_DEV_DIEPCTL5_EPENA_E_ACT 0x1
65832 
65833 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL5_EPENA register field. */
65834 #define ALT_USB_DEV_DIEPCTL5_EPENA_LSB 31
65835 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL5_EPENA register field. */
65836 #define ALT_USB_DEV_DIEPCTL5_EPENA_MSB 31
65837 /* The width in bits of the ALT_USB_DEV_DIEPCTL5_EPENA register field. */
65838 #define ALT_USB_DEV_DIEPCTL5_EPENA_WIDTH 1
65839 /* The mask used to set the ALT_USB_DEV_DIEPCTL5_EPENA register field value. */
65840 #define ALT_USB_DEV_DIEPCTL5_EPENA_SET_MSK 0x80000000
65841 /* The mask used to clear the ALT_USB_DEV_DIEPCTL5_EPENA register field value. */
65842 #define ALT_USB_DEV_DIEPCTL5_EPENA_CLR_MSK 0x7fffffff
65843 /* The reset value of the ALT_USB_DEV_DIEPCTL5_EPENA register field. */
65844 #define ALT_USB_DEV_DIEPCTL5_EPENA_RESET 0x0
65845 /* Extracts the ALT_USB_DEV_DIEPCTL5_EPENA field value from a register. */
65846 #define ALT_USB_DEV_DIEPCTL5_EPENA_GET(value) (((value) & 0x80000000) >> 31)
65847 /* Produces a ALT_USB_DEV_DIEPCTL5_EPENA register field value suitable for setting the register. */
65848 #define ALT_USB_DEV_DIEPCTL5_EPENA_SET(value) (((value) << 31) & 0x80000000)
65849 
65850 #ifndef __ASSEMBLY__
65851 /*
65852  * WARNING: The C register and register group struct declarations are provided for
65853  * convenience and illustrative purposes. They should, however, be used with
65854  * caution as the C language standard provides no guarantees about the alignment or
65855  * atomicity of device memory accesses. The recommended practice for writing
65856  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
65857  * alt_write_word() functions.
65858  *
65859  * The struct declaration for register ALT_USB_DEV_DIEPCTL5.
65860  */
65861 struct ALT_USB_DEV_DIEPCTL5_s
65862 {
65863  uint32_t mps : 11; /* Maximum Packet Size */
65864  uint32_t : 4; /* *UNDEFINED* */
65865  uint32_t usbactep : 1; /* USB Active Endpoint */
65866  const uint32_t dpid : 1; /* Endpoint Data PID */
65867  const uint32_t naksts : 1; /* NAK Status */
65868  uint32_t eptype : 2; /* Endpoint Type */
65869  uint32_t : 1; /* *UNDEFINED* */
65870  const uint32_t stall : 1; /* STALL Handshake */
65871  uint32_t txfnum : 4; /* TxFIFO Number */
65872  uint32_t cnak : 1; /* Clear NAK */
65873  uint32_t snak : 1; /* Set NAK */
65874  uint32_t setd0pid : 1; /* Set DATA0 PID */
65875  uint32_t setd1pid : 1; /* Set DATA1 PID */
65876  const uint32_t epdis : 1; /* Endpoint Disable */
65877  const uint32_t epena : 1; /* Endpoint Enable */
65878 };
65879 
65880 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL5. */
65881 typedef volatile struct ALT_USB_DEV_DIEPCTL5_s ALT_USB_DEV_DIEPCTL5_t;
65882 #endif /* __ASSEMBLY__ */
65883 
65884 /* The byte offset of the ALT_USB_DEV_DIEPCTL5 register from the beginning of the component. */
65885 #define ALT_USB_DEV_DIEPCTL5_OFST 0x1a0
65886 /* The address of the ALT_USB_DEV_DIEPCTL5 register. */
65887 #define ALT_USB_DEV_DIEPCTL5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL5_OFST))
65888 
65889 /*
65890  * Register : Device IN Endpoint 5 Interrupt Register - diepint5
65891  *
65892  * This register indicates the status of an endpoint with respect to USB- and AHB-
65893  * related events. The application must read this register when the OUT Endpoints
65894  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
65895  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
65896  * can read this register, it must first read the Device All Endpoints Interrupt
65897  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
65898  * Interrupt register. The application must clear the appropriate bit in this
65899  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
65900  *
65901  * Register Layout
65902  *
65903  * Bits | Access | Reset | Description
65904  * :--------|:-------|:------|:---------------------------------------
65905  * [0] | R | 0x0 | Transfer Completed Interrupt
65906  * [1] | R | 0x0 | Endpoint Disabled Interrupt
65907  * [2] | R | 0x0 | AHB Error
65908  * [3] | R | 0x0 | Timeout Condition
65909  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
65910  * [5] | R | 0x0 | IN Token Received with EP Mismatch
65911  * [6] | R | 0x0 | IN Endpoint NAK Effective
65912  * [7] | R | 0x1 | Transmit FIFO Empty
65913  * [8] | R | 0x0 | Fifo Underrun
65914  * [9] | R | 0x0 | BNA Interrupt
65915  * [10] | ??? | 0x0 | *UNDEFINED*
65916  * [11] | R | 0x0 | Packet Drop Status
65917  * [12] | R | 0x0 | BbleErr Interrupt (
65918  * [13] | R | 0x0 | NAK Interrupt
65919  * [14] | R | 0x0 | NYET Interrupt
65920  * [31:15] | ??? | 0x0 | *UNDEFINED*
65921  *
65922  */
65923 /*
65924  * Field : Transfer Completed Interrupt - xfercompl
65925  *
65926  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
65927  *
65928  * * for IN endpoint this field indicates that the requested data from the
65929  * descriptor is moved from external system memory to internal FIFO.
65930  *
65931  * * for OUT endpoint this field indicates that the requested data from the
65932  * internal FIFO is moved to external system memory. This interrupt is generated
65933  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
65934  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
65935  * this field indicates that the programmed transfer is complete on the AHB as
65936  * well as on the USB, for this endpoint.
65937  *
65938  * Field Enumeration Values:
65939  *
65940  * Enum | Value | Description
65941  * :---------------------------------------|:------|:-----------------------------
65942  * ALT_USB_DEV_DIEPINT5_XFERCOMPL_E_INACT | 0x0 | No Interrupt
65943  * ALT_USB_DEV_DIEPINT5_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
65944  *
65945  * Field Access Macros:
65946  *
65947  */
65948 /*
65949  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_XFERCOMPL
65950  *
65951  * No Interrupt
65952  */
65953 #define ALT_USB_DEV_DIEPINT5_XFERCOMPL_E_INACT 0x0
65954 /*
65955  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_XFERCOMPL
65956  *
65957  * Transfer Completed Interrupt
65958  */
65959 #define ALT_USB_DEV_DIEPINT5_XFERCOMPL_E_ACT 0x1
65960 
65961 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_XFERCOMPL register field. */
65962 #define ALT_USB_DEV_DIEPINT5_XFERCOMPL_LSB 0
65963 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_XFERCOMPL register field. */
65964 #define ALT_USB_DEV_DIEPINT5_XFERCOMPL_MSB 0
65965 /* The width in bits of the ALT_USB_DEV_DIEPINT5_XFERCOMPL register field. */
65966 #define ALT_USB_DEV_DIEPINT5_XFERCOMPL_WIDTH 1
65967 /* The mask used to set the ALT_USB_DEV_DIEPINT5_XFERCOMPL register field value. */
65968 #define ALT_USB_DEV_DIEPINT5_XFERCOMPL_SET_MSK 0x00000001
65969 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_XFERCOMPL register field value. */
65970 #define ALT_USB_DEV_DIEPINT5_XFERCOMPL_CLR_MSK 0xfffffffe
65971 /* The reset value of the ALT_USB_DEV_DIEPINT5_XFERCOMPL register field. */
65972 #define ALT_USB_DEV_DIEPINT5_XFERCOMPL_RESET 0x0
65973 /* Extracts the ALT_USB_DEV_DIEPINT5_XFERCOMPL field value from a register. */
65974 #define ALT_USB_DEV_DIEPINT5_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
65975 /* Produces a ALT_USB_DEV_DIEPINT5_XFERCOMPL register field value suitable for setting the register. */
65976 #define ALT_USB_DEV_DIEPINT5_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
65977 
65978 /*
65979  * Field : Endpoint Disabled Interrupt - epdisbld
65980  *
65981  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
65982  * disabled per the application's request.
65983  *
65984  * Field Enumeration Values:
65985  *
65986  * Enum | Value | Description
65987  * :--------------------------------------|:------|:----------------------------
65988  * ALT_USB_DEV_DIEPINT5_EPDISBLD_E_INACT | 0x0 | No Interrupt
65989  * ALT_USB_DEV_DIEPINT5_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
65990  *
65991  * Field Access Macros:
65992  *
65993  */
65994 /*
65995  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_EPDISBLD
65996  *
65997  * No Interrupt
65998  */
65999 #define ALT_USB_DEV_DIEPINT5_EPDISBLD_E_INACT 0x0
66000 /*
66001  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_EPDISBLD
66002  *
66003  * Endpoint Disabled Interrupt
66004  */
66005 #define ALT_USB_DEV_DIEPINT5_EPDISBLD_E_ACT 0x1
66006 
66007 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_EPDISBLD register field. */
66008 #define ALT_USB_DEV_DIEPINT5_EPDISBLD_LSB 1
66009 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_EPDISBLD register field. */
66010 #define ALT_USB_DEV_DIEPINT5_EPDISBLD_MSB 1
66011 /* The width in bits of the ALT_USB_DEV_DIEPINT5_EPDISBLD register field. */
66012 #define ALT_USB_DEV_DIEPINT5_EPDISBLD_WIDTH 1
66013 /* The mask used to set the ALT_USB_DEV_DIEPINT5_EPDISBLD register field value. */
66014 #define ALT_USB_DEV_DIEPINT5_EPDISBLD_SET_MSK 0x00000002
66015 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_EPDISBLD register field value. */
66016 #define ALT_USB_DEV_DIEPINT5_EPDISBLD_CLR_MSK 0xfffffffd
66017 /* The reset value of the ALT_USB_DEV_DIEPINT5_EPDISBLD register field. */
66018 #define ALT_USB_DEV_DIEPINT5_EPDISBLD_RESET 0x0
66019 /* Extracts the ALT_USB_DEV_DIEPINT5_EPDISBLD field value from a register. */
66020 #define ALT_USB_DEV_DIEPINT5_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
66021 /* Produces a ALT_USB_DEV_DIEPINT5_EPDISBLD register field value suitable for setting the register. */
66022 #define ALT_USB_DEV_DIEPINT5_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
66023 
66024 /*
66025  * Field : AHB Error - ahberr
66026  *
66027  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
66028  * there is an AHB error during an AHB read/write. The application can read the
66029  * corresponding endpoint DMA address register to get the error address.
66030  *
66031  * Field Enumeration Values:
66032  *
66033  * Enum | Value | Description
66034  * :------------------------------------|:------|:--------------------
66035  * ALT_USB_DEV_DIEPINT5_AHBERR_E_INACT | 0x0 | No Interrupt
66036  * ALT_USB_DEV_DIEPINT5_AHBERR_E_ACT | 0x1 | AHB Error interrupt
66037  *
66038  * Field Access Macros:
66039  *
66040  */
66041 /*
66042  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_AHBERR
66043  *
66044  * No Interrupt
66045  */
66046 #define ALT_USB_DEV_DIEPINT5_AHBERR_E_INACT 0x0
66047 /*
66048  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_AHBERR
66049  *
66050  * AHB Error interrupt
66051  */
66052 #define ALT_USB_DEV_DIEPINT5_AHBERR_E_ACT 0x1
66053 
66054 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_AHBERR register field. */
66055 #define ALT_USB_DEV_DIEPINT5_AHBERR_LSB 2
66056 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_AHBERR register field. */
66057 #define ALT_USB_DEV_DIEPINT5_AHBERR_MSB 2
66058 /* The width in bits of the ALT_USB_DEV_DIEPINT5_AHBERR register field. */
66059 #define ALT_USB_DEV_DIEPINT5_AHBERR_WIDTH 1
66060 /* The mask used to set the ALT_USB_DEV_DIEPINT5_AHBERR register field value. */
66061 #define ALT_USB_DEV_DIEPINT5_AHBERR_SET_MSK 0x00000004
66062 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_AHBERR register field value. */
66063 #define ALT_USB_DEV_DIEPINT5_AHBERR_CLR_MSK 0xfffffffb
66064 /* The reset value of the ALT_USB_DEV_DIEPINT5_AHBERR register field. */
66065 #define ALT_USB_DEV_DIEPINT5_AHBERR_RESET 0x0
66066 /* Extracts the ALT_USB_DEV_DIEPINT5_AHBERR field value from a register. */
66067 #define ALT_USB_DEV_DIEPINT5_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
66068 /* Produces a ALT_USB_DEV_DIEPINT5_AHBERR register field value suitable for setting the register. */
66069 #define ALT_USB_DEV_DIEPINT5_AHBERR_SET(value) (((value) << 2) & 0x00000004)
66070 
66071 /*
66072  * Field : Timeout Condition - timeout
66073  *
66074  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
66075  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
66076  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
66077  * detected a timeout condition on the USB for the last IN token on this endpoint.
66078  *
66079  * Field Enumeration Values:
66080  *
66081  * Enum | Value | Description
66082  * :---------------------------------|:------|:------------------
66083  * ALT_USB_DEV_DIEPINT5_TMO_E_INACT | 0x0 | No interrupt
66084  * ALT_USB_DEV_DIEPINT5_TMO_E_ACT | 0x1 | Timeout interrupy
66085  *
66086  * Field Access Macros:
66087  *
66088  */
66089 /*
66090  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_TMO
66091  *
66092  * No interrupt
66093  */
66094 #define ALT_USB_DEV_DIEPINT5_TMO_E_INACT 0x0
66095 /*
66096  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_TMO
66097  *
66098  * Timeout interrupy
66099  */
66100 #define ALT_USB_DEV_DIEPINT5_TMO_E_ACT 0x1
66101 
66102 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_TMO register field. */
66103 #define ALT_USB_DEV_DIEPINT5_TMO_LSB 3
66104 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_TMO register field. */
66105 #define ALT_USB_DEV_DIEPINT5_TMO_MSB 3
66106 /* The width in bits of the ALT_USB_DEV_DIEPINT5_TMO register field. */
66107 #define ALT_USB_DEV_DIEPINT5_TMO_WIDTH 1
66108 /* The mask used to set the ALT_USB_DEV_DIEPINT5_TMO register field value. */
66109 #define ALT_USB_DEV_DIEPINT5_TMO_SET_MSK 0x00000008
66110 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_TMO register field value. */
66111 #define ALT_USB_DEV_DIEPINT5_TMO_CLR_MSK 0xfffffff7
66112 /* The reset value of the ALT_USB_DEV_DIEPINT5_TMO register field. */
66113 #define ALT_USB_DEV_DIEPINT5_TMO_RESET 0x0
66114 /* Extracts the ALT_USB_DEV_DIEPINT5_TMO field value from a register. */
66115 #define ALT_USB_DEV_DIEPINT5_TMO_GET(value) (((value) & 0x00000008) >> 3)
66116 /* Produces a ALT_USB_DEV_DIEPINT5_TMO register field value suitable for setting the register. */
66117 #define ALT_USB_DEV_DIEPINT5_TMO_SET(value) (((value) << 3) & 0x00000008)
66118 
66119 /*
66120  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
66121  *
66122  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
66123  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
66124  * interrupt is asserted on the endpoint for which the IN token was received.
66125  *
66126  * Field Enumeration Values:
66127  *
66128  * Enum | Value | Description
66129  * :-----------------------------------------|:------|:----------------------------
66130  * ALT_USB_DEV_DIEPINT5_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
66131  * ALT_USB_DEV_DIEPINT5_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
66132  *
66133  * Field Access Macros:
66134  *
66135  */
66136 /*
66137  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_INTKNTXFEMP
66138  *
66139  * No interrupt
66140  */
66141 #define ALT_USB_DEV_DIEPINT5_INTKNTXFEMP_E_INACT 0x0
66142 /*
66143  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_INTKNTXFEMP
66144  *
66145  * IN Token Received Interrupt
66146  */
66147 #define ALT_USB_DEV_DIEPINT5_INTKNTXFEMP_E_ACT 0x1
66148 
66149 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_INTKNTXFEMP register field. */
66150 #define ALT_USB_DEV_DIEPINT5_INTKNTXFEMP_LSB 4
66151 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_INTKNTXFEMP register field. */
66152 #define ALT_USB_DEV_DIEPINT5_INTKNTXFEMP_MSB 4
66153 /* The width in bits of the ALT_USB_DEV_DIEPINT5_INTKNTXFEMP register field. */
66154 #define ALT_USB_DEV_DIEPINT5_INTKNTXFEMP_WIDTH 1
66155 /* The mask used to set the ALT_USB_DEV_DIEPINT5_INTKNTXFEMP register field value. */
66156 #define ALT_USB_DEV_DIEPINT5_INTKNTXFEMP_SET_MSK 0x00000010
66157 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_INTKNTXFEMP register field value. */
66158 #define ALT_USB_DEV_DIEPINT5_INTKNTXFEMP_CLR_MSK 0xffffffef
66159 /* The reset value of the ALT_USB_DEV_DIEPINT5_INTKNTXFEMP register field. */
66160 #define ALT_USB_DEV_DIEPINT5_INTKNTXFEMP_RESET 0x0
66161 /* Extracts the ALT_USB_DEV_DIEPINT5_INTKNTXFEMP field value from a register. */
66162 #define ALT_USB_DEV_DIEPINT5_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
66163 /* Produces a ALT_USB_DEV_DIEPINT5_INTKNTXFEMP register field value suitable for setting the register. */
66164 #define ALT_USB_DEV_DIEPINT5_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
66165 
66166 /*
66167  * Field : IN Token Received with EP Mismatch - intknepmis
66168  *
66169  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
66170  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
66171  * IN token was received. This interrupt is asserted on the endpoint for which the
66172  * IN token was received.
66173  *
66174  * Field Enumeration Values:
66175  *
66176  * Enum | Value | Description
66177  * :----------------------------------------|:------|:---------------------------------------------
66178  * ALT_USB_DEV_DIEPINT5_INTKNEPMIS_E_INACT | 0x0 | No interrupt
66179  * ALT_USB_DEV_DIEPINT5_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
66180  *
66181  * Field Access Macros:
66182  *
66183  */
66184 /*
66185  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_INTKNEPMIS
66186  *
66187  * No interrupt
66188  */
66189 #define ALT_USB_DEV_DIEPINT5_INTKNEPMIS_E_INACT 0x0
66190 /*
66191  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_INTKNEPMIS
66192  *
66193  * IN Token Received with EP Mismatch interrupt
66194  */
66195 #define ALT_USB_DEV_DIEPINT5_INTKNEPMIS_E_ACT 0x1
66196 
66197 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_INTKNEPMIS register field. */
66198 #define ALT_USB_DEV_DIEPINT5_INTKNEPMIS_LSB 5
66199 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_INTKNEPMIS register field. */
66200 #define ALT_USB_DEV_DIEPINT5_INTKNEPMIS_MSB 5
66201 /* The width in bits of the ALT_USB_DEV_DIEPINT5_INTKNEPMIS register field. */
66202 #define ALT_USB_DEV_DIEPINT5_INTKNEPMIS_WIDTH 1
66203 /* The mask used to set the ALT_USB_DEV_DIEPINT5_INTKNEPMIS register field value. */
66204 #define ALT_USB_DEV_DIEPINT5_INTKNEPMIS_SET_MSK 0x00000020
66205 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_INTKNEPMIS register field value. */
66206 #define ALT_USB_DEV_DIEPINT5_INTKNEPMIS_CLR_MSK 0xffffffdf
66207 /* The reset value of the ALT_USB_DEV_DIEPINT5_INTKNEPMIS register field. */
66208 #define ALT_USB_DEV_DIEPINT5_INTKNEPMIS_RESET 0x0
66209 /* Extracts the ALT_USB_DEV_DIEPINT5_INTKNEPMIS field value from a register. */
66210 #define ALT_USB_DEV_DIEPINT5_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
66211 /* Produces a ALT_USB_DEV_DIEPINT5_INTKNEPMIS register field value suitable for setting the register. */
66212 #define ALT_USB_DEV_DIEPINT5_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
66213 
66214 /*
66215  * Field : IN Endpoint NAK Effective - inepnakeff
66216  *
66217  * Applies to periodic IN endpoints only. This bit can be cleared when the
66218  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
66219  * interrupt indicates that the core has sampled the NAK bit Set (either by the
66220  * application or by the core). The interrupt indicates that the IN endpoint NAK
66221  * bit Set by the application has taken effect in the core.This interrupt does not
66222  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
66223  * over a NAK bit.
66224  *
66225  * Field Enumeration Values:
66226  *
66227  * Enum | Value | Description
66228  * :----------------------------------------|:------|:------------------------------------
66229  * ALT_USB_DEV_DIEPINT5_INEPNAKEFF_E_INACT | 0x0 | No interrupt
66230  * ALT_USB_DEV_DIEPINT5_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
66231  *
66232  * Field Access Macros:
66233  *
66234  */
66235 /*
66236  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_INEPNAKEFF
66237  *
66238  * No interrupt
66239  */
66240 #define ALT_USB_DEV_DIEPINT5_INEPNAKEFF_E_INACT 0x0
66241 /*
66242  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_INEPNAKEFF
66243  *
66244  * IN Endpoint NAK Effective interrupt
66245  */
66246 #define ALT_USB_DEV_DIEPINT5_INEPNAKEFF_E_ACT 0x1
66247 
66248 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_INEPNAKEFF register field. */
66249 #define ALT_USB_DEV_DIEPINT5_INEPNAKEFF_LSB 6
66250 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_INEPNAKEFF register field. */
66251 #define ALT_USB_DEV_DIEPINT5_INEPNAKEFF_MSB 6
66252 /* The width in bits of the ALT_USB_DEV_DIEPINT5_INEPNAKEFF register field. */
66253 #define ALT_USB_DEV_DIEPINT5_INEPNAKEFF_WIDTH 1
66254 /* The mask used to set the ALT_USB_DEV_DIEPINT5_INEPNAKEFF register field value. */
66255 #define ALT_USB_DEV_DIEPINT5_INEPNAKEFF_SET_MSK 0x00000040
66256 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_INEPNAKEFF register field value. */
66257 #define ALT_USB_DEV_DIEPINT5_INEPNAKEFF_CLR_MSK 0xffffffbf
66258 /* The reset value of the ALT_USB_DEV_DIEPINT5_INEPNAKEFF register field. */
66259 #define ALT_USB_DEV_DIEPINT5_INEPNAKEFF_RESET 0x0
66260 /* Extracts the ALT_USB_DEV_DIEPINT5_INEPNAKEFF field value from a register. */
66261 #define ALT_USB_DEV_DIEPINT5_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
66262 /* Produces a ALT_USB_DEV_DIEPINT5_INEPNAKEFF register field value suitable for setting the register. */
66263 #define ALT_USB_DEV_DIEPINT5_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
66264 
66265 /*
66266  * Field : Transmit FIFO Empty - txfemp
66267  *
66268  * This bit is valid only for IN Endpoints This interrupt is asserted when the
66269  * TxFIFO for this endpoint is either half or completely empty. The half or
66270  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
66271  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
66272  *
66273  * Field Enumeration Values:
66274  *
66275  * Enum | Value | Description
66276  * :------------------------------------|:------|:------------------------------
66277  * ALT_USB_DEV_DIEPINT5_TXFEMP_E_INACT | 0x0 | No interrupt
66278  * ALT_USB_DEV_DIEPINT5_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
66279  *
66280  * Field Access Macros:
66281  *
66282  */
66283 /*
66284  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_TXFEMP
66285  *
66286  * No interrupt
66287  */
66288 #define ALT_USB_DEV_DIEPINT5_TXFEMP_E_INACT 0x0
66289 /*
66290  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_TXFEMP
66291  *
66292  * Transmit FIFO Empty interrupt
66293  */
66294 #define ALT_USB_DEV_DIEPINT5_TXFEMP_E_ACT 0x1
66295 
66296 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_TXFEMP register field. */
66297 #define ALT_USB_DEV_DIEPINT5_TXFEMP_LSB 7
66298 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_TXFEMP register field. */
66299 #define ALT_USB_DEV_DIEPINT5_TXFEMP_MSB 7
66300 /* The width in bits of the ALT_USB_DEV_DIEPINT5_TXFEMP register field. */
66301 #define ALT_USB_DEV_DIEPINT5_TXFEMP_WIDTH 1
66302 /* The mask used to set the ALT_USB_DEV_DIEPINT5_TXFEMP register field value. */
66303 #define ALT_USB_DEV_DIEPINT5_TXFEMP_SET_MSK 0x00000080
66304 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_TXFEMP register field value. */
66305 #define ALT_USB_DEV_DIEPINT5_TXFEMP_CLR_MSK 0xffffff7f
66306 /* The reset value of the ALT_USB_DEV_DIEPINT5_TXFEMP register field. */
66307 #define ALT_USB_DEV_DIEPINT5_TXFEMP_RESET 0x1
66308 /* Extracts the ALT_USB_DEV_DIEPINT5_TXFEMP field value from a register. */
66309 #define ALT_USB_DEV_DIEPINT5_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
66310 /* Produces a ALT_USB_DEV_DIEPINT5_TXFEMP register field value suitable for setting the register. */
66311 #define ALT_USB_DEV_DIEPINT5_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
66312 
66313 /*
66314  * Field : Fifo Underrun - txfifoundrn
66315  *
66316  * Applies to IN endpoints Only. The core generates this interrupt when it detects
66317  * a transmit FIFO underrun condition for this endpoint.
66318  *
66319  * Field Enumeration Values:
66320  *
66321  * Enum | Value | Description
66322  * :-----------------------------------------|:------|:------------------------
66323  * ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
66324  * ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
66325  *
66326  * Field Access Macros:
66327  *
66328  */
66329 /*
66330  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN
66331  *
66332  * No interrupt
66333  */
66334 #define ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN_E_INACT 0x0
66335 /*
66336  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN
66337  *
66338  * Fifo Underrun interrupt
66339  */
66340 #define ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN_E_ACT 0x1
66341 
66342 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN register field. */
66343 #define ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN_LSB 8
66344 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN register field. */
66345 #define ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN_MSB 8
66346 /* The width in bits of the ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN register field. */
66347 #define ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN_WIDTH 1
66348 /* The mask used to set the ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN register field value. */
66349 #define ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN_SET_MSK 0x00000100
66350 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN register field value. */
66351 #define ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN_CLR_MSK 0xfffffeff
66352 /* The reset value of the ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN register field. */
66353 #define ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN_RESET 0x0
66354 /* Extracts the ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN field value from a register. */
66355 #define ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
66356 /* Produces a ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN register field value suitable for setting the register. */
66357 #define ALT_USB_DEV_DIEPINT5_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
66358 
66359 /*
66360  * Field : BNA Interrupt - bnaintr
66361  *
66362  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
66363  * generates this interrupt when the descriptor accessed is not ready for the Core
66364  * to process, such as Host busy or DMA done
66365  *
66366  * Field Enumeration Values:
66367  *
66368  * Enum | Value | Description
66369  * :-------------------------------------|:------|:--------------
66370  * ALT_USB_DEV_DIEPINT5_BNAINTR_E_INACT | 0x0 | No interrupt
66371  * ALT_USB_DEV_DIEPINT5_BNAINTR_E_ACT | 0x1 | BNA interrupt
66372  *
66373  * Field Access Macros:
66374  *
66375  */
66376 /*
66377  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_BNAINTR
66378  *
66379  * No interrupt
66380  */
66381 #define ALT_USB_DEV_DIEPINT5_BNAINTR_E_INACT 0x0
66382 /*
66383  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_BNAINTR
66384  *
66385  * BNA interrupt
66386  */
66387 #define ALT_USB_DEV_DIEPINT5_BNAINTR_E_ACT 0x1
66388 
66389 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_BNAINTR register field. */
66390 #define ALT_USB_DEV_DIEPINT5_BNAINTR_LSB 9
66391 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_BNAINTR register field. */
66392 #define ALT_USB_DEV_DIEPINT5_BNAINTR_MSB 9
66393 /* The width in bits of the ALT_USB_DEV_DIEPINT5_BNAINTR register field. */
66394 #define ALT_USB_DEV_DIEPINT5_BNAINTR_WIDTH 1
66395 /* The mask used to set the ALT_USB_DEV_DIEPINT5_BNAINTR register field value. */
66396 #define ALT_USB_DEV_DIEPINT5_BNAINTR_SET_MSK 0x00000200
66397 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_BNAINTR register field value. */
66398 #define ALT_USB_DEV_DIEPINT5_BNAINTR_CLR_MSK 0xfffffdff
66399 /* The reset value of the ALT_USB_DEV_DIEPINT5_BNAINTR register field. */
66400 #define ALT_USB_DEV_DIEPINT5_BNAINTR_RESET 0x0
66401 /* Extracts the ALT_USB_DEV_DIEPINT5_BNAINTR field value from a register. */
66402 #define ALT_USB_DEV_DIEPINT5_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
66403 /* Produces a ALT_USB_DEV_DIEPINT5_BNAINTR register field value suitable for setting the register. */
66404 #define ALT_USB_DEV_DIEPINT5_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
66405 
66406 /*
66407  * Field : Packet Drop Status - pktdrpsts
66408  *
66409  * This bit indicates to the application that an ISOC OUT packet has been dropped.
66410  * This bit does not have an associated mask bit and does not generate an
66411  * interrupt.
66412  *
66413  * Field Enumeration Values:
66414  *
66415  * Enum | Value | Description
66416  * :---------------------------------------|:------|:-----------------------------
66417  * ALT_USB_DEV_DIEPINT5_PKTDRPSTS_E_INACT | 0x0 | No interrupt
66418  * ALT_USB_DEV_DIEPINT5_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
66419  *
66420  * Field Access Macros:
66421  *
66422  */
66423 /*
66424  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_PKTDRPSTS
66425  *
66426  * No interrupt
66427  */
66428 #define ALT_USB_DEV_DIEPINT5_PKTDRPSTS_E_INACT 0x0
66429 /*
66430  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_PKTDRPSTS
66431  *
66432  * Packet Drop Status interrupt
66433  */
66434 #define ALT_USB_DEV_DIEPINT5_PKTDRPSTS_E_ACT 0x1
66435 
66436 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_PKTDRPSTS register field. */
66437 #define ALT_USB_DEV_DIEPINT5_PKTDRPSTS_LSB 11
66438 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_PKTDRPSTS register field. */
66439 #define ALT_USB_DEV_DIEPINT5_PKTDRPSTS_MSB 11
66440 /* The width in bits of the ALT_USB_DEV_DIEPINT5_PKTDRPSTS register field. */
66441 #define ALT_USB_DEV_DIEPINT5_PKTDRPSTS_WIDTH 1
66442 /* The mask used to set the ALT_USB_DEV_DIEPINT5_PKTDRPSTS register field value. */
66443 #define ALT_USB_DEV_DIEPINT5_PKTDRPSTS_SET_MSK 0x00000800
66444 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_PKTDRPSTS register field value. */
66445 #define ALT_USB_DEV_DIEPINT5_PKTDRPSTS_CLR_MSK 0xfffff7ff
66446 /* The reset value of the ALT_USB_DEV_DIEPINT5_PKTDRPSTS register field. */
66447 #define ALT_USB_DEV_DIEPINT5_PKTDRPSTS_RESET 0x0
66448 /* Extracts the ALT_USB_DEV_DIEPINT5_PKTDRPSTS field value from a register. */
66449 #define ALT_USB_DEV_DIEPINT5_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
66450 /* Produces a ALT_USB_DEV_DIEPINT5_PKTDRPSTS register field value suitable for setting the register. */
66451 #define ALT_USB_DEV_DIEPINT5_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
66452 
66453 /*
66454  * Field : BbleErr Interrupt ( - bbleerr
66455  *
66456  * The core generates this interrupt when babble is received for the endpoint.
66457  *
66458  * Field Enumeration Values:
66459  *
66460  * Enum | Value | Description
66461  * :-------------------------------------|:------|:------------------
66462  * ALT_USB_DEV_DIEPINT5_BBLEERR_E_INACT | 0x0 | No interrupt
66463  * ALT_USB_DEV_DIEPINT5_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
66464  *
66465  * Field Access Macros:
66466  *
66467  */
66468 /*
66469  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_BBLEERR
66470  *
66471  * No interrupt
66472  */
66473 #define ALT_USB_DEV_DIEPINT5_BBLEERR_E_INACT 0x0
66474 /*
66475  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_BBLEERR
66476  *
66477  * BbleErr interrupt
66478  */
66479 #define ALT_USB_DEV_DIEPINT5_BBLEERR_E_ACT 0x1
66480 
66481 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_BBLEERR register field. */
66482 #define ALT_USB_DEV_DIEPINT5_BBLEERR_LSB 12
66483 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_BBLEERR register field. */
66484 #define ALT_USB_DEV_DIEPINT5_BBLEERR_MSB 12
66485 /* The width in bits of the ALT_USB_DEV_DIEPINT5_BBLEERR register field. */
66486 #define ALT_USB_DEV_DIEPINT5_BBLEERR_WIDTH 1
66487 /* The mask used to set the ALT_USB_DEV_DIEPINT5_BBLEERR register field value. */
66488 #define ALT_USB_DEV_DIEPINT5_BBLEERR_SET_MSK 0x00001000
66489 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_BBLEERR register field value. */
66490 #define ALT_USB_DEV_DIEPINT5_BBLEERR_CLR_MSK 0xffffefff
66491 /* The reset value of the ALT_USB_DEV_DIEPINT5_BBLEERR register field. */
66492 #define ALT_USB_DEV_DIEPINT5_BBLEERR_RESET 0x0
66493 /* Extracts the ALT_USB_DEV_DIEPINT5_BBLEERR field value from a register. */
66494 #define ALT_USB_DEV_DIEPINT5_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
66495 /* Produces a ALT_USB_DEV_DIEPINT5_BBLEERR register field value suitable for setting the register. */
66496 #define ALT_USB_DEV_DIEPINT5_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
66497 
66498 /*
66499  * Field : NAK Interrupt - nakintrpt
66500  *
66501  * The core generates this interrupt when a NAK is transmitted or received by the
66502  * device. In case of isochronous IN endpoints the interrupt gets generated when a
66503  * zero length packet is transmitted due to un-availability of data in the TXFifo.
66504  *
66505  * Field Enumeration Values:
66506  *
66507  * Enum | Value | Description
66508  * :---------------------------------------|:------|:--------------
66509  * ALT_USB_DEV_DIEPINT5_NAKINTRPT_E_INACT | 0x0 | No interrupt
66510  * ALT_USB_DEV_DIEPINT5_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
66511  *
66512  * Field Access Macros:
66513  *
66514  */
66515 /*
66516  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_NAKINTRPT
66517  *
66518  * No interrupt
66519  */
66520 #define ALT_USB_DEV_DIEPINT5_NAKINTRPT_E_INACT 0x0
66521 /*
66522  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_NAKINTRPT
66523  *
66524  * NAK Interrupt
66525  */
66526 #define ALT_USB_DEV_DIEPINT5_NAKINTRPT_E_ACT 0x1
66527 
66528 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_NAKINTRPT register field. */
66529 #define ALT_USB_DEV_DIEPINT5_NAKINTRPT_LSB 13
66530 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_NAKINTRPT register field. */
66531 #define ALT_USB_DEV_DIEPINT5_NAKINTRPT_MSB 13
66532 /* The width in bits of the ALT_USB_DEV_DIEPINT5_NAKINTRPT register field. */
66533 #define ALT_USB_DEV_DIEPINT5_NAKINTRPT_WIDTH 1
66534 /* The mask used to set the ALT_USB_DEV_DIEPINT5_NAKINTRPT register field value. */
66535 #define ALT_USB_DEV_DIEPINT5_NAKINTRPT_SET_MSK 0x00002000
66536 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_NAKINTRPT register field value. */
66537 #define ALT_USB_DEV_DIEPINT5_NAKINTRPT_CLR_MSK 0xffffdfff
66538 /* The reset value of the ALT_USB_DEV_DIEPINT5_NAKINTRPT register field. */
66539 #define ALT_USB_DEV_DIEPINT5_NAKINTRPT_RESET 0x0
66540 /* Extracts the ALT_USB_DEV_DIEPINT5_NAKINTRPT field value from a register. */
66541 #define ALT_USB_DEV_DIEPINT5_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
66542 /* Produces a ALT_USB_DEV_DIEPINT5_NAKINTRPT register field value suitable for setting the register. */
66543 #define ALT_USB_DEV_DIEPINT5_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
66544 
66545 /*
66546  * Field : NYET Interrupt - nyetintrpt
66547  *
66548  * The core generates this interrupt when a NYET response is transmitted for a non
66549  * isochronous OUT endpoint.
66550  *
66551  * Field Enumeration Values:
66552  *
66553  * Enum | Value | Description
66554  * :----------------------------------------|:------|:---------------
66555  * ALT_USB_DEV_DIEPINT5_NYETINTRPT_E_INACT | 0x0 | No interrupt
66556  * ALT_USB_DEV_DIEPINT5_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
66557  *
66558  * Field Access Macros:
66559  *
66560  */
66561 /*
66562  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_NYETINTRPT
66563  *
66564  * No interrupt
66565  */
66566 #define ALT_USB_DEV_DIEPINT5_NYETINTRPT_E_INACT 0x0
66567 /*
66568  * Enumerated value for register field ALT_USB_DEV_DIEPINT5_NYETINTRPT
66569  *
66570  * NYET Interrupt
66571  */
66572 #define ALT_USB_DEV_DIEPINT5_NYETINTRPT_E_ACT 0x1
66573 
66574 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT5_NYETINTRPT register field. */
66575 #define ALT_USB_DEV_DIEPINT5_NYETINTRPT_LSB 14
66576 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT5_NYETINTRPT register field. */
66577 #define ALT_USB_DEV_DIEPINT5_NYETINTRPT_MSB 14
66578 /* The width in bits of the ALT_USB_DEV_DIEPINT5_NYETINTRPT register field. */
66579 #define ALT_USB_DEV_DIEPINT5_NYETINTRPT_WIDTH 1
66580 /* The mask used to set the ALT_USB_DEV_DIEPINT5_NYETINTRPT register field value. */
66581 #define ALT_USB_DEV_DIEPINT5_NYETINTRPT_SET_MSK 0x00004000
66582 /* The mask used to clear the ALT_USB_DEV_DIEPINT5_NYETINTRPT register field value. */
66583 #define ALT_USB_DEV_DIEPINT5_NYETINTRPT_CLR_MSK 0xffffbfff
66584 /* The reset value of the ALT_USB_DEV_DIEPINT5_NYETINTRPT register field. */
66585 #define ALT_USB_DEV_DIEPINT5_NYETINTRPT_RESET 0x0
66586 /* Extracts the ALT_USB_DEV_DIEPINT5_NYETINTRPT field value from a register. */
66587 #define ALT_USB_DEV_DIEPINT5_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
66588 /* Produces a ALT_USB_DEV_DIEPINT5_NYETINTRPT register field value suitable for setting the register. */
66589 #define ALT_USB_DEV_DIEPINT5_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
66590 
66591 #ifndef __ASSEMBLY__
66592 /*
66593  * WARNING: The C register and register group struct declarations are provided for
66594  * convenience and illustrative purposes. They should, however, be used with
66595  * caution as the C language standard provides no guarantees about the alignment or
66596  * atomicity of device memory accesses. The recommended practice for writing
66597  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
66598  * alt_write_word() functions.
66599  *
66600  * The struct declaration for register ALT_USB_DEV_DIEPINT5.
66601  */
66602 struct ALT_USB_DEV_DIEPINT5_s
66603 {
66604  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
66605  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
66606  const uint32_t ahberr : 1; /* AHB Error */
66607  const uint32_t timeout : 1; /* Timeout Condition */
66608  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
66609  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
66610  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
66611  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
66612  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
66613  const uint32_t bnaintr : 1; /* BNA Interrupt */
66614  uint32_t : 1; /* *UNDEFINED* */
66615  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
66616  const uint32_t bbleerr : 1; /* BbleErr Interrupt ( */
66617  const uint32_t nakintrpt : 1; /* NAK Interrupt */
66618  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
66619  uint32_t : 17; /* *UNDEFINED* */
66620 };
66621 
66622 /* The typedef declaration for register ALT_USB_DEV_DIEPINT5. */
66623 typedef volatile struct ALT_USB_DEV_DIEPINT5_s ALT_USB_DEV_DIEPINT5_t;
66624 #endif /* __ASSEMBLY__ */
66625 
66626 /* The byte offset of the ALT_USB_DEV_DIEPINT5 register from the beginning of the component. */
66627 #define ALT_USB_DEV_DIEPINT5_OFST 0x1a8
66628 /* The address of the ALT_USB_DEV_DIEPINT5 register. */
66629 #define ALT_USB_DEV_DIEPINT5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT5_OFST))
66630 
66631 /*
66632  * Register : Device IN Endpoint 5 Transfer Size Register - dieptsiz5
66633  *
66634  * The application must modify this register before enabling the endpoint. Once the
66635  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
66636  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
66637  * application can only read this register once the core has cleared the Endpoint
66638  * Enable bit.
66639  *
66640  * Register Layout
66641  *
66642  * Bits | Access | Reset | Description
66643  * :--------|:-------|:------|:----------------------------
66644  * [18:0] | RW | 0x0 | Transfer Size
66645  * [28:19] | RW | 0x0 | Packet Count
66646  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
66647  * [31] | ??? | 0x0 | *UNDEFINED*
66648  *
66649  */
66650 /*
66651  * Field : Transfer Size - xfersize
66652  *
66653  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
66654  * application only after it has exhausted the transfer size amount of data. The
66655  * transfer size can be Set to the maximum packet size of the endpoint, to be
66656  * interrupted at the end of each packet. The core decrements this field every time
66657  * a packet from the external memory is written to the TxFIFO.
66658  *
66659  * Field Access Macros:
66660  *
66661  */
66662 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ5_XFERSIZE register field. */
66663 #define ALT_USB_DEV_DIEPTSIZ5_XFERSIZE_LSB 0
66664 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ5_XFERSIZE register field. */
66665 #define ALT_USB_DEV_DIEPTSIZ5_XFERSIZE_MSB 18
66666 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ5_XFERSIZE register field. */
66667 #define ALT_USB_DEV_DIEPTSIZ5_XFERSIZE_WIDTH 19
66668 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ5_XFERSIZE register field value. */
66669 #define ALT_USB_DEV_DIEPTSIZ5_XFERSIZE_SET_MSK 0x0007ffff
66670 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ5_XFERSIZE register field value. */
66671 #define ALT_USB_DEV_DIEPTSIZ5_XFERSIZE_CLR_MSK 0xfff80000
66672 /* The reset value of the ALT_USB_DEV_DIEPTSIZ5_XFERSIZE register field. */
66673 #define ALT_USB_DEV_DIEPTSIZ5_XFERSIZE_RESET 0x0
66674 /* Extracts the ALT_USB_DEV_DIEPTSIZ5_XFERSIZE field value from a register. */
66675 #define ALT_USB_DEV_DIEPTSIZ5_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
66676 /* Produces a ALT_USB_DEV_DIEPTSIZ5_XFERSIZE register field value suitable for setting the register. */
66677 #define ALT_USB_DEV_DIEPTSIZ5_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
66678 
66679 /*
66680  * Field : Packet Count - pktcnt
66681  *
66682  * Indicates the total number of USB packets that constitute the Transfer Size
66683  * amount of data for endpoint 0.This field is decremented every time a packet
66684  * (maximum size or short packet) is read from the TxFIFO.
66685  *
66686  * Field Access Macros:
66687  *
66688  */
66689 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ5_PKTCNT register field. */
66690 #define ALT_USB_DEV_DIEPTSIZ5_PKTCNT_LSB 19
66691 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ5_PKTCNT register field. */
66692 #define ALT_USB_DEV_DIEPTSIZ5_PKTCNT_MSB 28
66693 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ5_PKTCNT register field. */
66694 #define ALT_USB_DEV_DIEPTSIZ5_PKTCNT_WIDTH 10
66695 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ5_PKTCNT register field value. */
66696 #define ALT_USB_DEV_DIEPTSIZ5_PKTCNT_SET_MSK 0x1ff80000
66697 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ5_PKTCNT register field value. */
66698 #define ALT_USB_DEV_DIEPTSIZ5_PKTCNT_CLR_MSK 0xe007ffff
66699 /* The reset value of the ALT_USB_DEV_DIEPTSIZ5_PKTCNT register field. */
66700 #define ALT_USB_DEV_DIEPTSIZ5_PKTCNT_RESET 0x0
66701 /* Extracts the ALT_USB_DEV_DIEPTSIZ5_PKTCNT field value from a register. */
66702 #define ALT_USB_DEV_DIEPTSIZ5_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
66703 /* Produces a ALT_USB_DEV_DIEPTSIZ5_PKTCNT register field value suitable for setting the register. */
66704 #define ALT_USB_DEV_DIEPTSIZ5_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
66705 
66706 /*
66707  * Field : Applies to IN endpoints onl - mc
66708  *
66709  * for periodic IN endpoints, this field indicates the number of packets that must
66710  * be transmitted per microframe on the USB. The core uses this field to calculate
66711  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
66712  * field is valid only in Internal DMA mode. It specifies the number of packets the
66713  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
66714  * by the Next Endpoint field of the Device Endpoint-n Control register
66715  * (DIEPCTLn.NextEp)
66716  *
66717  * Field Enumeration Values:
66718  *
66719  * Enum | Value | Description
66720  * :------------------------------------|:------|:------------
66721  * ALT_USB_DEV_DIEPTSIZ5_MC_E_PKTONE | 0x1 | 1 packet
66722  * ALT_USB_DEV_DIEPTSIZ5_MC_E_PKTTWO | 0x2 | 2 packets
66723  * ALT_USB_DEV_DIEPTSIZ5_MC_E_PKTTHREE | 0x3 | 3 packets
66724  *
66725  * Field Access Macros:
66726  *
66727  */
66728 /*
66729  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ5_MC
66730  *
66731  * 1 packet
66732  */
66733 #define ALT_USB_DEV_DIEPTSIZ5_MC_E_PKTONE 0x1
66734 /*
66735  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ5_MC
66736  *
66737  * 2 packets
66738  */
66739 #define ALT_USB_DEV_DIEPTSIZ5_MC_E_PKTTWO 0x2
66740 /*
66741  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ5_MC
66742  *
66743  * 3 packets
66744  */
66745 #define ALT_USB_DEV_DIEPTSIZ5_MC_E_PKTTHREE 0x3
66746 
66747 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ5_MC register field. */
66748 #define ALT_USB_DEV_DIEPTSIZ5_MC_LSB 29
66749 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ5_MC register field. */
66750 #define ALT_USB_DEV_DIEPTSIZ5_MC_MSB 30
66751 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ5_MC register field. */
66752 #define ALT_USB_DEV_DIEPTSIZ5_MC_WIDTH 2
66753 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ5_MC register field value. */
66754 #define ALT_USB_DEV_DIEPTSIZ5_MC_SET_MSK 0x60000000
66755 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ5_MC register field value. */
66756 #define ALT_USB_DEV_DIEPTSIZ5_MC_CLR_MSK 0x9fffffff
66757 /* The reset value of the ALT_USB_DEV_DIEPTSIZ5_MC register field. */
66758 #define ALT_USB_DEV_DIEPTSIZ5_MC_RESET 0x0
66759 /* Extracts the ALT_USB_DEV_DIEPTSIZ5_MC field value from a register. */
66760 #define ALT_USB_DEV_DIEPTSIZ5_MC_GET(value) (((value) & 0x60000000) >> 29)
66761 /* Produces a ALT_USB_DEV_DIEPTSIZ5_MC register field value suitable for setting the register. */
66762 #define ALT_USB_DEV_DIEPTSIZ5_MC_SET(value) (((value) << 29) & 0x60000000)
66763 
66764 #ifndef __ASSEMBLY__
66765 /*
66766  * WARNING: The C register and register group struct declarations are provided for
66767  * convenience and illustrative purposes. They should, however, be used with
66768  * caution as the C language standard provides no guarantees about the alignment or
66769  * atomicity of device memory accesses. The recommended practice for writing
66770  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
66771  * alt_write_word() functions.
66772  *
66773  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ5.
66774  */
66775 struct ALT_USB_DEV_DIEPTSIZ5_s
66776 {
66777  uint32_t xfersize : 19; /* Transfer Size */
66778  uint32_t pktcnt : 10; /* Packet Count */
66779  uint32_t mc : 2; /* Applies to IN endpoints onl */
66780  uint32_t : 1; /* *UNDEFINED* */
66781 };
66782 
66783 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ5. */
66784 typedef volatile struct ALT_USB_DEV_DIEPTSIZ5_s ALT_USB_DEV_DIEPTSIZ5_t;
66785 #endif /* __ASSEMBLY__ */
66786 
66787 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ5 register from the beginning of the component. */
66788 #define ALT_USB_DEV_DIEPTSIZ5_OFST 0x1b0
66789 /* The address of the ALT_USB_DEV_DIEPTSIZ5 register. */
66790 #define ALT_USB_DEV_DIEPTSIZ5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ5_OFST))
66791 
66792 /*
66793  * Register : Device IN Endpoint 5 DMA Address Register - diepdma5
66794  *
66795  * DMA Addressing.
66796  *
66797  * Register Layout
66798  *
66799  * Bits | Access | Reset | Description
66800  * :-------|:-------|:--------|:------------
66801  * [31:0] | RW | Unknown | DMA Address
66802  *
66803  */
66804 /*
66805  * Field : DMA Address - diepdma5
66806  *
66807  * Holds the start address of the external memory for storing or fetching endpoint
66808  * data. for control endpoints, this field stores control OUT data packets as well
66809  * as SETUP transaction data packets. When more than three SETUP packets are
66810  * received back-to-back, the SETUP data packet in the memory is overwritten. This
66811  * register is incremented on every AHB transaction. The application can give only
66812  * a DWORD-aligned address.
66813  *
66814  * When Scatter/Gather DMA mode is not enabled, the application programs the start
66815  * address value in this field.
66816  *
66817  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
66818  * for the descriptor list.
66819  *
66820  * Field Access Macros:
66821  *
66822  */
66823 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA5_DIEPDMA5 register field. */
66824 #define ALT_USB_DEV_DIEPDMA5_DIEPDMA5_LSB 0
66825 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA5_DIEPDMA5 register field. */
66826 #define ALT_USB_DEV_DIEPDMA5_DIEPDMA5_MSB 31
66827 /* The width in bits of the ALT_USB_DEV_DIEPDMA5_DIEPDMA5 register field. */
66828 #define ALT_USB_DEV_DIEPDMA5_DIEPDMA5_WIDTH 32
66829 /* The mask used to set the ALT_USB_DEV_DIEPDMA5_DIEPDMA5 register field value. */
66830 #define ALT_USB_DEV_DIEPDMA5_DIEPDMA5_SET_MSK 0xffffffff
66831 /* The mask used to clear the ALT_USB_DEV_DIEPDMA5_DIEPDMA5 register field value. */
66832 #define ALT_USB_DEV_DIEPDMA5_DIEPDMA5_CLR_MSK 0x00000000
66833 /* The reset value of the ALT_USB_DEV_DIEPDMA5_DIEPDMA5 register field is UNKNOWN. */
66834 #define ALT_USB_DEV_DIEPDMA5_DIEPDMA5_RESET 0x0
66835 /* Extracts the ALT_USB_DEV_DIEPDMA5_DIEPDMA5 field value from a register. */
66836 #define ALT_USB_DEV_DIEPDMA5_DIEPDMA5_GET(value) (((value) & 0xffffffff) >> 0)
66837 /* Produces a ALT_USB_DEV_DIEPDMA5_DIEPDMA5 register field value suitable for setting the register. */
66838 #define ALT_USB_DEV_DIEPDMA5_DIEPDMA5_SET(value) (((value) << 0) & 0xffffffff)
66839 
66840 #ifndef __ASSEMBLY__
66841 /*
66842  * WARNING: The C register and register group struct declarations are provided for
66843  * convenience and illustrative purposes. They should, however, be used with
66844  * caution as the C language standard provides no guarantees about the alignment or
66845  * atomicity of device memory accesses. The recommended practice for writing
66846  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
66847  * alt_write_word() functions.
66848  *
66849  * The struct declaration for register ALT_USB_DEV_DIEPDMA5.
66850  */
66851 struct ALT_USB_DEV_DIEPDMA5_s
66852 {
66853  uint32_t diepdma5 : 32; /* DMA Address */
66854 };
66855 
66856 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA5. */
66857 typedef volatile struct ALT_USB_DEV_DIEPDMA5_s ALT_USB_DEV_DIEPDMA5_t;
66858 #endif /* __ASSEMBLY__ */
66859 
66860 /* The byte offset of the ALT_USB_DEV_DIEPDMA5 register from the beginning of the component. */
66861 #define ALT_USB_DEV_DIEPDMA5_OFST 0x1b4
66862 /* The address of the ALT_USB_DEV_DIEPDMA5 register. */
66863 #define ALT_USB_DEV_DIEPDMA5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA5_OFST))
66864 
66865 /*
66866  * Register : Device IN Endpoint Transmit FIFO Status Register 5 - dtxfsts5
66867  *
66868  * This register contains the free space information for the Device IN endpoint
66869  * TxFIFO.
66870  *
66871  * Register Layout
66872  *
66873  * Bits | Access | Reset | Description
66874  * :--------|:-------|:-------|:-------------------------------
66875  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
66876  * [31:16] | ??? | 0x0 | *UNDEFINED*
66877  *
66878  */
66879 /*
66880  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
66881  *
66882  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
66883  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
66884  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
66885  * 32,768 words available Others: Reserved
66886  *
66887  * Field Access Macros:
66888  *
66889  */
66890 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL register field. */
66891 #define ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL_LSB 0
66892 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL register field. */
66893 #define ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL_MSB 15
66894 /* The width in bits of the ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL register field. */
66895 #define ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL_WIDTH 16
66896 /* The mask used to set the ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL register field value. */
66897 #define ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
66898 /* The mask used to clear the ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL register field value. */
66899 #define ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
66900 /* The reset value of the ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL register field. */
66901 #define ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL_RESET 0x2000
66902 /* Extracts the ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL field value from a register. */
66903 #define ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
66904 /* Produces a ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL register field value suitable for setting the register. */
66905 #define ALT_USB_DEV_DTXFSTS5_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
66906 
66907 #ifndef __ASSEMBLY__
66908 /*
66909  * WARNING: The C register and register group struct declarations are provided for
66910  * convenience and illustrative purposes. They should, however, be used with
66911  * caution as the C language standard provides no guarantees about the alignment or
66912  * atomicity of device memory accesses. The recommended practice for writing
66913  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
66914  * alt_write_word() functions.
66915  *
66916  * The struct declaration for register ALT_USB_DEV_DTXFSTS5.
66917  */
66918 struct ALT_USB_DEV_DTXFSTS5_s
66919 {
66920  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
66921  uint32_t : 16; /* *UNDEFINED* */
66922 };
66923 
66924 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS5. */
66925 typedef volatile struct ALT_USB_DEV_DTXFSTS5_s ALT_USB_DEV_DTXFSTS5_t;
66926 #endif /* __ASSEMBLY__ */
66927 
66928 /* The byte offset of the ALT_USB_DEV_DTXFSTS5 register from the beginning of the component. */
66929 #define ALT_USB_DEV_DTXFSTS5_OFST 0x1b8
66930 /* The address of the ALT_USB_DEV_DTXFSTS5 register. */
66931 #define ALT_USB_DEV_DTXFSTS5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS5_OFST))
66932 
66933 /*
66934  * Register : Device IN Endpoint 5 DMA Buffer Address Register - diepdmab5
66935  *
66936  * Device IN Endpoint 1 Buffer Address.
66937  *
66938  * Register Layout
66939  *
66940  * Bits | Access | Reset | Description
66941  * :-------|:-------|:--------|:------------------------------------
66942  * [31:0] | R | Unknown | Device IN Endpoint 1 Buffer Address
66943  *
66944  */
66945 /*
66946  * Field : Device IN Endpoint 1 Buffer Address - diepdmab5
66947  *
66948  * Holds the current buffer address. This register is updated as and when the data
66949  * transfer for the corresponding end point is in progress. This register is
66950  * present only in Scatter/Gather DMA mode.
66951  *
66952  * Field Access Macros:
66953  *
66954  */
66955 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5 register field. */
66956 #define ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5_LSB 0
66957 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5 register field. */
66958 #define ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5_MSB 31
66959 /* The width in bits of the ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5 register field. */
66960 #define ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5_WIDTH 32
66961 /* The mask used to set the ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5 register field value. */
66962 #define ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5_SET_MSK 0xffffffff
66963 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5 register field value. */
66964 #define ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5_CLR_MSK 0x00000000
66965 /* The reset value of the ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5 register field is UNKNOWN. */
66966 #define ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5_RESET 0x0
66967 /* Extracts the ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5 field value from a register. */
66968 #define ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5_GET(value) (((value) & 0xffffffff) >> 0)
66969 /* Produces a ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5 register field value suitable for setting the register. */
66970 #define ALT_USB_DEV_DIEPDMAB5_DIEPDMAB5_SET(value) (((value) << 0) & 0xffffffff)
66971 
66972 #ifndef __ASSEMBLY__
66973 /*
66974  * WARNING: The C register and register group struct declarations are provided for
66975  * convenience and illustrative purposes. They should, however, be used with
66976  * caution as the C language standard provides no guarantees about the alignment or
66977  * atomicity of device memory accesses. The recommended practice for writing
66978  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
66979  * alt_write_word() functions.
66980  *
66981  * The struct declaration for register ALT_USB_DEV_DIEPDMAB5.
66982  */
66983 struct ALT_USB_DEV_DIEPDMAB5_s
66984 {
66985  const uint32_t diepdmab5 : 32; /* Device IN Endpoint 1 Buffer Address */
66986 };
66987 
66988 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB5. */
66989 typedef volatile struct ALT_USB_DEV_DIEPDMAB5_s ALT_USB_DEV_DIEPDMAB5_t;
66990 #endif /* __ASSEMBLY__ */
66991 
66992 /* The byte offset of the ALT_USB_DEV_DIEPDMAB5 register from the beginning of the component. */
66993 #define ALT_USB_DEV_DIEPDMAB5_OFST 0x1bc
66994 /* The address of the ALT_USB_DEV_DIEPDMAB5 register. */
66995 #define ALT_USB_DEV_DIEPDMAB5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB5_OFST))
66996 
66997 /*
66998  * Register : Device Control IN Endpoint 6 Control Register - diepctl6
66999  *
67000  * Endpoint_number: 6
67001  *
67002  * Register Layout
67003  *
67004  * Bits | Access | Reset | Description
67005  * :--------|:-------|:------|:--------------------
67006  * [10:0] | RW | 0x0 | Maximum Packet Size
67007  * [14:11] | ??? | 0x0 | *UNDEFINED*
67008  * [15] | RW | 0x0 | USB Active Endpoint
67009  * [16] | R | 0x0 | Endpoint Data PID
67010  * [17] | R | 0x0 | NAK Status
67011  * [19:18] | RW | 0x0 | Endpoint Type
67012  * [20] | ??? | 0x0 | *UNDEFINED*
67013  * [21] | R | 0x0 | STALL Handshake
67014  * [25:22] | RW | 0x0 | TxFIFO Number
67015  * [26] | W | 0x0 | Clear NAK
67016  * [27] | W | 0x0 | Set NAK
67017  * [28] | W | 0x0 | Set DATA0 PID
67018  * [29] | W | 0x0 | Set DATA1 PID
67019  * [30] | R | 0x0 | Endpoint Disable
67020  * [31] | R | 0x0 | Endpoint Enable
67021  *
67022  */
67023 /*
67024  * Field : Maximum Packet Size - mps
67025  *
67026  * Applies to IN and OUT endpoints. The application must program this field with
67027  * the maximum packet size for the current logical endpoint. This value is in
67028  * bytes.
67029  *
67030  * Field Access Macros:
67031  *
67032  */
67033 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_MPS register field. */
67034 #define ALT_USB_DEV_DIEPCTL6_MPS_LSB 0
67035 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_MPS register field. */
67036 #define ALT_USB_DEV_DIEPCTL6_MPS_MSB 10
67037 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_MPS register field. */
67038 #define ALT_USB_DEV_DIEPCTL6_MPS_WIDTH 11
67039 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_MPS register field value. */
67040 #define ALT_USB_DEV_DIEPCTL6_MPS_SET_MSK 0x000007ff
67041 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_MPS register field value. */
67042 #define ALT_USB_DEV_DIEPCTL6_MPS_CLR_MSK 0xfffff800
67043 /* The reset value of the ALT_USB_DEV_DIEPCTL6_MPS register field. */
67044 #define ALT_USB_DEV_DIEPCTL6_MPS_RESET 0x0
67045 /* Extracts the ALT_USB_DEV_DIEPCTL6_MPS field value from a register. */
67046 #define ALT_USB_DEV_DIEPCTL6_MPS_GET(value) (((value) & 0x000007ff) >> 0)
67047 /* Produces a ALT_USB_DEV_DIEPCTL6_MPS register field value suitable for setting the register. */
67048 #define ALT_USB_DEV_DIEPCTL6_MPS_SET(value) (((value) << 0) & 0x000007ff)
67049 
67050 /*
67051  * Field : USB Active Endpoint - usbactep
67052  *
67053  * Indicates whether this endpoint is active in the current configuration and
67054  * interface. The core clears this bit for all endpoints (other than EP 0) after
67055  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
67056  * commands, the application must program endpoint registers accordingly and set
67057  * this bit.
67058  *
67059  * Field Enumeration Values:
67060  *
67061  * Enum | Value | Description
67062  * :-------------------------------------|:------|:--------------------
67063  * ALT_USB_DEV_DIEPCTL6_USBACTEP_E_DISD | 0x0 | Not Active
67064  * ALT_USB_DEV_DIEPCTL6_USBACTEP_E_END | 0x1 | USB Active Endpoint
67065  *
67066  * Field Access Macros:
67067  *
67068  */
67069 /*
67070  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_USBACTEP
67071  *
67072  * Not Active
67073  */
67074 #define ALT_USB_DEV_DIEPCTL6_USBACTEP_E_DISD 0x0
67075 /*
67076  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_USBACTEP
67077  *
67078  * USB Active Endpoint
67079  */
67080 #define ALT_USB_DEV_DIEPCTL6_USBACTEP_E_END 0x1
67081 
67082 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_USBACTEP register field. */
67083 #define ALT_USB_DEV_DIEPCTL6_USBACTEP_LSB 15
67084 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_USBACTEP register field. */
67085 #define ALT_USB_DEV_DIEPCTL6_USBACTEP_MSB 15
67086 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_USBACTEP register field. */
67087 #define ALT_USB_DEV_DIEPCTL6_USBACTEP_WIDTH 1
67088 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_USBACTEP register field value. */
67089 #define ALT_USB_DEV_DIEPCTL6_USBACTEP_SET_MSK 0x00008000
67090 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_USBACTEP register field value. */
67091 #define ALT_USB_DEV_DIEPCTL6_USBACTEP_CLR_MSK 0xffff7fff
67092 /* The reset value of the ALT_USB_DEV_DIEPCTL6_USBACTEP register field. */
67093 #define ALT_USB_DEV_DIEPCTL6_USBACTEP_RESET 0x0
67094 /* Extracts the ALT_USB_DEV_DIEPCTL6_USBACTEP field value from a register. */
67095 #define ALT_USB_DEV_DIEPCTL6_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
67096 /* Produces a ALT_USB_DEV_DIEPCTL6_USBACTEP register field value suitable for setting the register. */
67097 #define ALT_USB_DEV_DIEPCTL6_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
67098 
67099 /*
67100  * Field : Endpoint Data PID - dpid
67101  *
67102  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
67103  * packet to be received or transmitted on this endpoint. The application must
67104  * program the PID of the first packet to be received or transmitted on this
67105  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
67106  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
67107  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
67108  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
67109  * DMA mode:
67110  *
67111  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
67112  * number in which the core transmits/receives isochronous data for this endpoint.
67113  * The application must program the even/odd (micro) frame number in which it
67114  * intends to transmit/receive isochronous data for this endpoint using the
67115  * SetEvnFr and SetOddFr fields in this register.
67116  *
67117  * 0: Even (micro)frame
67118  *
67119  * 1: Odd (micro)frame
67120  *
67121  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
67122  * number in which to send data is provided in the transmit descriptor structure.
67123  * The frame in which data is received is updated in receive descriptor structure.
67124  *
67125  * Field Enumeration Values:
67126  *
67127  * Enum | Value | Description
67128  * :----------------------------------|:------|:-----------------------------
67129  * ALT_USB_DEV_DIEPCTL6_DPID_E_INACT | 0x0 | Endpoint Data PID not active
67130  * ALT_USB_DEV_DIEPCTL6_DPID_E_ACT | 0x1 | Endpoint Data PID active
67131  *
67132  * Field Access Macros:
67133  *
67134  */
67135 /*
67136  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_DPID
67137  *
67138  * Endpoint Data PID not active
67139  */
67140 #define ALT_USB_DEV_DIEPCTL6_DPID_E_INACT 0x0
67141 /*
67142  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_DPID
67143  *
67144  * Endpoint Data PID active
67145  */
67146 #define ALT_USB_DEV_DIEPCTL6_DPID_E_ACT 0x1
67147 
67148 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_DPID register field. */
67149 #define ALT_USB_DEV_DIEPCTL6_DPID_LSB 16
67150 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_DPID register field. */
67151 #define ALT_USB_DEV_DIEPCTL6_DPID_MSB 16
67152 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_DPID register field. */
67153 #define ALT_USB_DEV_DIEPCTL6_DPID_WIDTH 1
67154 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_DPID register field value. */
67155 #define ALT_USB_DEV_DIEPCTL6_DPID_SET_MSK 0x00010000
67156 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_DPID register field value. */
67157 #define ALT_USB_DEV_DIEPCTL6_DPID_CLR_MSK 0xfffeffff
67158 /* The reset value of the ALT_USB_DEV_DIEPCTL6_DPID register field. */
67159 #define ALT_USB_DEV_DIEPCTL6_DPID_RESET 0x0
67160 /* Extracts the ALT_USB_DEV_DIEPCTL6_DPID field value from a register. */
67161 #define ALT_USB_DEV_DIEPCTL6_DPID_GET(value) (((value) & 0x00010000) >> 16)
67162 /* Produces a ALT_USB_DEV_DIEPCTL6_DPID register field value suitable for setting the register. */
67163 #define ALT_USB_DEV_DIEPCTL6_DPID_SET(value) (((value) << 16) & 0x00010000)
67164 
67165 /*
67166  * Field : NAK Status - naksts
67167  *
67168  * When either the application or the core sets this bit:
67169  *
67170  * * The core stops receiving any data on an OUT endpoint, even if there is space
67171  * in the RxFIFO to accommodate the incoming packet.
67172  *
67173  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
67174  * IN endpoint, even if there data is available in the TxFIFO.
67175  *
67176  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
67177  * even if there data is available in the TxFIFO.
67178  *
67179  * Irrespective of this bit's setting, the core always responds to SETUP data
67180  * packets with an ACK handshake.
67181  *
67182  * Field Enumeration Values:
67183  *
67184  * Enum | Value | Description
67185  * :-------------------------------------|:------|:------------------------------------------------
67186  * ALT_USB_DEV_DIEPCTL6_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
67187  * : | | based on the FIFO status
67188  * ALT_USB_DEV_DIEPCTL6_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
67189  * : | | endpoint
67190  *
67191  * Field Access Macros:
67192  *
67193  */
67194 /*
67195  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_NAKSTS
67196  *
67197  * The core is transmitting non-NAK handshakes based on the FIFO status
67198  */
67199 #define ALT_USB_DEV_DIEPCTL6_NAKSTS_E_NONNAK 0x0
67200 /*
67201  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_NAKSTS
67202  *
67203  * The core is transmitting NAK handshakes on this endpoint
67204  */
67205 #define ALT_USB_DEV_DIEPCTL6_NAKSTS_E_NAK 0x1
67206 
67207 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_NAKSTS register field. */
67208 #define ALT_USB_DEV_DIEPCTL6_NAKSTS_LSB 17
67209 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_NAKSTS register field. */
67210 #define ALT_USB_DEV_DIEPCTL6_NAKSTS_MSB 17
67211 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_NAKSTS register field. */
67212 #define ALT_USB_DEV_DIEPCTL6_NAKSTS_WIDTH 1
67213 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_NAKSTS register field value. */
67214 #define ALT_USB_DEV_DIEPCTL6_NAKSTS_SET_MSK 0x00020000
67215 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_NAKSTS register field value. */
67216 #define ALT_USB_DEV_DIEPCTL6_NAKSTS_CLR_MSK 0xfffdffff
67217 /* The reset value of the ALT_USB_DEV_DIEPCTL6_NAKSTS register field. */
67218 #define ALT_USB_DEV_DIEPCTL6_NAKSTS_RESET 0x0
67219 /* Extracts the ALT_USB_DEV_DIEPCTL6_NAKSTS field value from a register. */
67220 #define ALT_USB_DEV_DIEPCTL6_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
67221 /* Produces a ALT_USB_DEV_DIEPCTL6_NAKSTS register field value suitable for setting the register. */
67222 #define ALT_USB_DEV_DIEPCTL6_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
67223 
67224 /*
67225  * Field : Endpoint Type - eptype
67226  *
67227  * This is the transfer type supported by this logical endpoint.
67228  *
67229  * Field Enumeration Values:
67230  *
67231  * Enum | Value | Description
67232  * :------------------------------------------|:------|:------------
67233  * ALT_USB_DEV_DIEPCTL6_EPTYPE_E_CTL | 0x0 | Control
67234  * ALT_USB_DEV_DIEPCTL6_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
67235  * ALT_USB_DEV_DIEPCTL6_EPTYPE_E_BULK | 0x2 | Bulk
67236  * ALT_USB_DEV_DIEPCTL6_EPTYPE_E_INTERRUP | 0x3 | Interrupt
67237  *
67238  * Field Access Macros:
67239  *
67240  */
67241 /*
67242  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_EPTYPE
67243  *
67244  * Control
67245  */
67246 #define ALT_USB_DEV_DIEPCTL6_EPTYPE_E_CTL 0x0
67247 /*
67248  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_EPTYPE
67249  *
67250  * Isochronous
67251  */
67252 #define ALT_USB_DEV_DIEPCTL6_EPTYPE_E_ISOCHRONOUS 0x1
67253 /*
67254  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_EPTYPE
67255  *
67256  * Bulk
67257  */
67258 #define ALT_USB_DEV_DIEPCTL6_EPTYPE_E_BULK 0x2
67259 /*
67260  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_EPTYPE
67261  *
67262  * Interrupt
67263  */
67264 #define ALT_USB_DEV_DIEPCTL6_EPTYPE_E_INTERRUP 0x3
67265 
67266 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_EPTYPE register field. */
67267 #define ALT_USB_DEV_DIEPCTL6_EPTYPE_LSB 18
67268 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_EPTYPE register field. */
67269 #define ALT_USB_DEV_DIEPCTL6_EPTYPE_MSB 19
67270 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_EPTYPE register field. */
67271 #define ALT_USB_DEV_DIEPCTL6_EPTYPE_WIDTH 2
67272 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_EPTYPE register field value. */
67273 #define ALT_USB_DEV_DIEPCTL6_EPTYPE_SET_MSK 0x000c0000
67274 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_EPTYPE register field value. */
67275 #define ALT_USB_DEV_DIEPCTL6_EPTYPE_CLR_MSK 0xfff3ffff
67276 /* The reset value of the ALT_USB_DEV_DIEPCTL6_EPTYPE register field. */
67277 #define ALT_USB_DEV_DIEPCTL6_EPTYPE_RESET 0x0
67278 /* Extracts the ALT_USB_DEV_DIEPCTL6_EPTYPE field value from a register. */
67279 #define ALT_USB_DEV_DIEPCTL6_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
67280 /* Produces a ALT_USB_DEV_DIEPCTL6_EPTYPE register field value suitable for setting the register. */
67281 #define ALT_USB_DEV_DIEPCTL6_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
67282 
67283 /*
67284  * Field : STALL Handshake - stall
67285  *
67286  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
67287  * application sets this bit to stall all tokens from the USB host to this
67288  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
67289  * along with this bit, the STALL bit takes priority. Only the application can
67290  * clear this bit, never the core. Applies to control endpoints only. The
67291  * application can only set this bit, and the core clears it, when a SETUP token is
67292  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
67293  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
67294  * of this bit's setting, the core always responds to SETUP data packets with an
67295  * ACK handshake.
67296  *
67297  * Field Enumeration Values:
67298  *
67299  * Enum | Value | Description
67300  * :-----------------------------------|:------|:----------------------------
67301  * ALT_USB_DEV_DIEPCTL6_STALL_E_INACT | 0x0 | STALL All Tokens not active
67302  * ALT_USB_DEV_DIEPCTL6_STALL_E_ACT | 0x1 | STALL All Tokens active
67303  *
67304  * Field Access Macros:
67305  *
67306  */
67307 /*
67308  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_STALL
67309  *
67310  * STALL All Tokens not active
67311  */
67312 #define ALT_USB_DEV_DIEPCTL6_STALL_E_INACT 0x0
67313 /*
67314  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_STALL
67315  *
67316  * STALL All Tokens active
67317  */
67318 #define ALT_USB_DEV_DIEPCTL6_STALL_E_ACT 0x1
67319 
67320 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_STALL register field. */
67321 #define ALT_USB_DEV_DIEPCTL6_STALL_LSB 21
67322 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_STALL register field. */
67323 #define ALT_USB_DEV_DIEPCTL6_STALL_MSB 21
67324 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_STALL register field. */
67325 #define ALT_USB_DEV_DIEPCTL6_STALL_WIDTH 1
67326 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_STALL register field value. */
67327 #define ALT_USB_DEV_DIEPCTL6_STALL_SET_MSK 0x00200000
67328 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_STALL register field value. */
67329 #define ALT_USB_DEV_DIEPCTL6_STALL_CLR_MSK 0xffdfffff
67330 /* The reset value of the ALT_USB_DEV_DIEPCTL6_STALL register field. */
67331 #define ALT_USB_DEV_DIEPCTL6_STALL_RESET 0x0
67332 /* Extracts the ALT_USB_DEV_DIEPCTL6_STALL field value from a register. */
67333 #define ALT_USB_DEV_DIEPCTL6_STALL_GET(value) (((value) & 0x00200000) >> 21)
67334 /* Produces a ALT_USB_DEV_DIEPCTL6_STALL register field value suitable for setting the register. */
67335 #define ALT_USB_DEV_DIEPCTL6_STALL_SET(value) (((value) << 21) & 0x00200000)
67336 
67337 /*
67338  * Field : TxFIFO Number - txfnum
67339  *
67340  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
67341  * endpoints must map this to the corresponding Periodic TxFIFO number.
67342  *
67343  * 4'h0: Non-Periodic TxFIFO
67344  *
67345  * Others: Specified Periodic TxFIFO.number
67346  *
67347  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
67348  * applications such as mass storage. The core treats an IN endpoint as a non-
67349  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
67350  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
67351  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
67352  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
67353  * This field is valid only for IN endpoints.
67354  *
67355  * Field Access Macros:
67356  *
67357  */
67358 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_TXFNUM register field. */
67359 #define ALT_USB_DEV_DIEPCTL6_TXFNUM_LSB 22
67360 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_TXFNUM register field. */
67361 #define ALT_USB_DEV_DIEPCTL6_TXFNUM_MSB 25
67362 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_TXFNUM register field. */
67363 #define ALT_USB_DEV_DIEPCTL6_TXFNUM_WIDTH 4
67364 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_TXFNUM register field value. */
67365 #define ALT_USB_DEV_DIEPCTL6_TXFNUM_SET_MSK 0x03c00000
67366 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_TXFNUM register field value. */
67367 #define ALT_USB_DEV_DIEPCTL6_TXFNUM_CLR_MSK 0xfc3fffff
67368 /* The reset value of the ALT_USB_DEV_DIEPCTL6_TXFNUM register field. */
67369 #define ALT_USB_DEV_DIEPCTL6_TXFNUM_RESET 0x0
67370 /* Extracts the ALT_USB_DEV_DIEPCTL6_TXFNUM field value from a register. */
67371 #define ALT_USB_DEV_DIEPCTL6_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
67372 /* Produces a ALT_USB_DEV_DIEPCTL6_TXFNUM register field value suitable for setting the register. */
67373 #define ALT_USB_DEV_DIEPCTL6_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
67374 
67375 /*
67376  * Field : Clear NAK - cnak
67377  *
67378  * A write to this bit clears the NAK bit for the endpoint.
67379  *
67380  * Field Enumeration Values:
67381  *
67382  * Enum | Value | Description
67383  * :----------------------------------|:------|:-------------
67384  * ALT_USB_DEV_DIEPCTL6_CNAK_E_INACT | 0x0 | No Clear NAK
67385  * ALT_USB_DEV_DIEPCTL6_CNAK_E_ACT | 0x1 | Clear NAK
67386  *
67387  * Field Access Macros:
67388  *
67389  */
67390 /*
67391  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_CNAK
67392  *
67393  * No Clear NAK
67394  */
67395 #define ALT_USB_DEV_DIEPCTL6_CNAK_E_INACT 0x0
67396 /*
67397  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_CNAK
67398  *
67399  * Clear NAK
67400  */
67401 #define ALT_USB_DEV_DIEPCTL6_CNAK_E_ACT 0x1
67402 
67403 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_CNAK register field. */
67404 #define ALT_USB_DEV_DIEPCTL6_CNAK_LSB 26
67405 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_CNAK register field. */
67406 #define ALT_USB_DEV_DIEPCTL6_CNAK_MSB 26
67407 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_CNAK register field. */
67408 #define ALT_USB_DEV_DIEPCTL6_CNAK_WIDTH 1
67409 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_CNAK register field value. */
67410 #define ALT_USB_DEV_DIEPCTL6_CNAK_SET_MSK 0x04000000
67411 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_CNAK register field value. */
67412 #define ALT_USB_DEV_DIEPCTL6_CNAK_CLR_MSK 0xfbffffff
67413 /* The reset value of the ALT_USB_DEV_DIEPCTL6_CNAK register field. */
67414 #define ALT_USB_DEV_DIEPCTL6_CNAK_RESET 0x0
67415 /* Extracts the ALT_USB_DEV_DIEPCTL6_CNAK field value from a register. */
67416 #define ALT_USB_DEV_DIEPCTL6_CNAK_GET(value) (((value) & 0x04000000) >> 26)
67417 /* Produces a ALT_USB_DEV_DIEPCTL6_CNAK register field value suitable for setting the register. */
67418 #define ALT_USB_DEV_DIEPCTL6_CNAK_SET(value) (((value) << 26) & 0x04000000)
67419 
67420 /*
67421  * Field : Set NAK - snak
67422  *
67423  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
67424  * application can control the transmission of NAK handshakes on an endpoint. The
67425  * core can also Set this bit for an endpoint after a SETUP packet is received on
67426  * that endpoint.
67427  *
67428  * Field Enumeration Values:
67429  *
67430  * Enum | Value | Description
67431  * :----------------------------------|:------|:------------
67432  * ALT_USB_DEV_DIEPCTL6_SNAK_E_INACT | 0x0 | No Set NAK
67433  * ALT_USB_DEV_DIEPCTL6_SNAK_E_ACT | 0x1 | Set NAK
67434  *
67435  * Field Access Macros:
67436  *
67437  */
67438 /*
67439  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_SNAK
67440  *
67441  * No Set NAK
67442  */
67443 #define ALT_USB_DEV_DIEPCTL6_SNAK_E_INACT 0x0
67444 /*
67445  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_SNAK
67446  *
67447  * Set NAK
67448  */
67449 #define ALT_USB_DEV_DIEPCTL6_SNAK_E_ACT 0x1
67450 
67451 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_SNAK register field. */
67452 #define ALT_USB_DEV_DIEPCTL6_SNAK_LSB 27
67453 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_SNAK register field. */
67454 #define ALT_USB_DEV_DIEPCTL6_SNAK_MSB 27
67455 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_SNAK register field. */
67456 #define ALT_USB_DEV_DIEPCTL6_SNAK_WIDTH 1
67457 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_SNAK register field value. */
67458 #define ALT_USB_DEV_DIEPCTL6_SNAK_SET_MSK 0x08000000
67459 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_SNAK register field value. */
67460 #define ALT_USB_DEV_DIEPCTL6_SNAK_CLR_MSK 0xf7ffffff
67461 /* The reset value of the ALT_USB_DEV_DIEPCTL6_SNAK register field. */
67462 #define ALT_USB_DEV_DIEPCTL6_SNAK_RESET 0x0
67463 /* Extracts the ALT_USB_DEV_DIEPCTL6_SNAK field value from a register. */
67464 #define ALT_USB_DEV_DIEPCTL6_SNAK_GET(value) (((value) & 0x08000000) >> 27)
67465 /* Produces a ALT_USB_DEV_DIEPCTL6_SNAK register field value suitable for setting the register. */
67466 #define ALT_USB_DEV_DIEPCTL6_SNAK_SET(value) (((value) << 27) & 0x08000000)
67467 
67468 /*
67469  * Field : Set DATA0 PID - setd0pid
67470  *
67471  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
67472  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
67473  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
67474  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
67475  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
67476  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
67477  * mode is enabled, this field is reserved. The frame number in which to send data
67478  * is in the transmit descriptor structure. The frame in which to receive data is
67479  * updated in receive descriptor structure.
67480  *
67481  * Field Enumeration Values:
67482  *
67483  * Enum | Value | Description
67484  * :-------------------------------------|:------|:----------------------------
67485  * ALT_USB_DEV_DIEPCTL6_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
67486  * ALT_USB_DEV_DIEPCTL6_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
67487  *
67488  * Field Access Macros:
67489  *
67490  */
67491 /*
67492  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_SETD0PID
67493  *
67494  * Disables Set DATA0 PID
67495  */
67496 #define ALT_USB_DEV_DIEPCTL6_SETD0PID_E_DISD 0x0
67497 /*
67498  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_SETD0PID
67499  *
67500  * Endpoint Data PID to DATA0)
67501  */
67502 #define ALT_USB_DEV_DIEPCTL6_SETD0PID_E_END 0x1
67503 
67504 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_SETD0PID register field. */
67505 #define ALT_USB_DEV_DIEPCTL6_SETD0PID_LSB 28
67506 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_SETD0PID register field. */
67507 #define ALT_USB_DEV_DIEPCTL6_SETD0PID_MSB 28
67508 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_SETD0PID register field. */
67509 #define ALT_USB_DEV_DIEPCTL6_SETD0PID_WIDTH 1
67510 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_SETD0PID register field value. */
67511 #define ALT_USB_DEV_DIEPCTL6_SETD0PID_SET_MSK 0x10000000
67512 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_SETD0PID register field value. */
67513 #define ALT_USB_DEV_DIEPCTL6_SETD0PID_CLR_MSK 0xefffffff
67514 /* The reset value of the ALT_USB_DEV_DIEPCTL6_SETD0PID register field. */
67515 #define ALT_USB_DEV_DIEPCTL6_SETD0PID_RESET 0x0
67516 /* Extracts the ALT_USB_DEV_DIEPCTL6_SETD0PID field value from a register. */
67517 #define ALT_USB_DEV_DIEPCTL6_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
67518 /* Produces a ALT_USB_DEV_DIEPCTL6_SETD0PID register field value suitable for setting the register. */
67519 #define ALT_USB_DEV_DIEPCTL6_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
67520 
67521 /*
67522  * Field : Set DATA1 PID - setd1pid
67523  *
67524  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
67525  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
67526  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
67527  *
67528  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
67529  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
67530  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
67531  *
67532  * Field Enumeration Values:
67533  *
67534  * Enum | Value | Description
67535  * :-------------------------------------|:------|:-----------------------
67536  * ALT_USB_DEV_DIEPCTL6_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
67537  * ALT_USB_DEV_DIEPCTL6_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
67538  *
67539  * Field Access Macros:
67540  *
67541  */
67542 /*
67543  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_SETD1PID
67544  *
67545  * Disables Set DATA1 PID
67546  */
67547 #define ALT_USB_DEV_DIEPCTL6_SETD1PID_E_DISD 0x0
67548 /*
67549  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_SETD1PID
67550  *
67551  * Enables Set DATA1 PID
67552  */
67553 #define ALT_USB_DEV_DIEPCTL6_SETD1PID_E_END 0x1
67554 
67555 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_SETD1PID register field. */
67556 #define ALT_USB_DEV_DIEPCTL6_SETD1PID_LSB 29
67557 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_SETD1PID register field. */
67558 #define ALT_USB_DEV_DIEPCTL6_SETD1PID_MSB 29
67559 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_SETD1PID register field. */
67560 #define ALT_USB_DEV_DIEPCTL6_SETD1PID_WIDTH 1
67561 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_SETD1PID register field value. */
67562 #define ALT_USB_DEV_DIEPCTL6_SETD1PID_SET_MSK 0x20000000
67563 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_SETD1PID register field value. */
67564 #define ALT_USB_DEV_DIEPCTL6_SETD1PID_CLR_MSK 0xdfffffff
67565 /* The reset value of the ALT_USB_DEV_DIEPCTL6_SETD1PID register field. */
67566 #define ALT_USB_DEV_DIEPCTL6_SETD1PID_RESET 0x0
67567 /* Extracts the ALT_USB_DEV_DIEPCTL6_SETD1PID field value from a register. */
67568 #define ALT_USB_DEV_DIEPCTL6_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
67569 /* Produces a ALT_USB_DEV_DIEPCTL6_SETD1PID register field value suitable for setting the register. */
67570 #define ALT_USB_DEV_DIEPCTL6_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
67571 
67572 /*
67573  * Field : Endpoint Disable - epdis
67574  *
67575  * Applies to IN and OUT endpoints. The application sets this bit to stop
67576  * transmitting/receiving data on an endpoint, even before the transfer for that
67577  * endpoint is complete. The application must wait for the Endpoint Disabled
67578  * interrupt before treating the endpoint as disabled. The core clears this bit
67579  * before setting the Endpoint Disabled interrupt. The application must set this
67580  * bit only if Endpoint Enable is already set for this endpoint.
67581  *
67582  * Field Enumeration Values:
67583  *
67584  * Enum | Value | Description
67585  * :-----------------------------------|:------|:--------------------
67586  * ALT_USB_DEV_DIEPCTL6_EPDIS_E_INACT | 0x0 | No Endpoint Disable
67587  * ALT_USB_DEV_DIEPCTL6_EPDIS_E_ACT | 0x1 | Endpoint Disable
67588  *
67589  * Field Access Macros:
67590  *
67591  */
67592 /*
67593  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_EPDIS
67594  *
67595  * No Endpoint Disable
67596  */
67597 #define ALT_USB_DEV_DIEPCTL6_EPDIS_E_INACT 0x0
67598 /*
67599  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_EPDIS
67600  *
67601  * Endpoint Disable
67602  */
67603 #define ALT_USB_DEV_DIEPCTL6_EPDIS_E_ACT 0x1
67604 
67605 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_EPDIS register field. */
67606 #define ALT_USB_DEV_DIEPCTL6_EPDIS_LSB 30
67607 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_EPDIS register field. */
67608 #define ALT_USB_DEV_DIEPCTL6_EPDIS_MSB 30
67609 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_EPDIS register field. */
67610 #define ALT_USB_DEV_DIEPCTL6_EPDIS_WIDTH 1
67611 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_EPDIS register field value. */
67612 #define ALT_USB_DEV_DIEPCTL6_EPDIS_SET_MSK 0x40000000
67613 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_EPDIS register field value. */
67614 #define ALT_USB_DEV_DIEPCTL6_EPDIS_CLR_MSK 0xbfffffff
67615 /* The reset value of the ALT_USB_DEV_DIEPCTL6_EPDIS register field. */
67616 #define ALT_USB_DEV_DIEPCTL6_EPDIS_RESET 0x0
67617 /* Extracts the ALT_USB_DEV_DIEPCTL6_EPDIS field value from a register. */
67618 #define ALT_USB_DEV_DIEPCTL6_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
67619 /* Produces a ALT_USB_DEV_DIEPCTL6_EPDIS register field value suitable for setting the register. */
67620 #define ALT_USB_DEV_DIEPCTL6_EPDIS_SET(value) (((value) << 30) & 0x40000000)
67621 
67622 /*
67623  * Field : Endpoint Enable - epena
67624  *
67625  * Applies to IN and OUT endpoints.
67626  *
67627  * * When Scatter/Gather DMA mode is enabled,
67628  *
67629  * * for IN endpoints this bit indicates that the descriptor structure and data
67630  * buffer with data ready to transmit is setup.
67631  *
67632  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
67633  * receive data is setup.
67634  *
67635  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
67636  * mode:
67637  *
67638  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
67639  * the endpoint.
67640  *
67641  * * for OUT endpoints, this bit indicates that the application has allocated the
67642  * memory to start receiving data from the USB.
67643  *
67644  * * The core clears this bit before setting any of the following interrupts on
67645  * this endpoint:
67646  *
67647  * * SETUP Phase Done
67648  *
67649  * * Endpoint Disabled
67650  *
67651  * * Transfer Completed
67652  *
67653  * for control endpoints in DMA mode, this bit must be set to be able to transfer
67654  * SETUP data packets in memory.
67655  *
67656  * Field Enumeration Values:
67657  *
67658  * Enum | Value | Description
67659  * :-----------------------------------|:------|:-------------------------
67660  * ALT_USB_DEV_DIEPCTL6_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
67661  * ALT_USB_DEV_DIEPCTL6_EPENA_E_ACT | 0x1 | Endpoint Enable active
67662  *
67663  * Field Access Macros:
67664  *
67665  */
67666 /*
67667  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_EPENA
67668  *
67669  * Endpoint Enable inactive
67670  */
67671 #define ALT_USB_DEV_DIEPCTL6_EPENA_E_INACT 0x0
67672 /*
67673  * Enumerated value for register field ALT_USB_DEV_DIEPCTL6_EPENA
67674  *
67675  * Endpoint Enable active
67676  */
67677 #define ALT_USB_DEV_DIEPCTL6_EPENA_E_ACT 0x1
67678 
67679 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL6_EPENA register field. */
67680 #define ALT_USB_DEV_DIEPCTL6_EPENA_LSB 31
67681 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL6_EPENA register field. */
67682 #define ALT_USB_DEV_DIEPCTL6_EPENA_MSB 31
67683 /* The width in bits of the ALT_USB_DEV_DIEPCTL6_EPENA register field. */
67684 #define ALT_USB_DEV_DIEPCTL6_EPENA_WIDTH 1
67685 /* The mask used to set the ALT_USB_DEV_DIEPCTL6_EPENA register field value. */
67686 #define ALT_USB_DEV_DIEPCTL6_EPENA_SET_MSK 0x80000000
67687 /* The mask used to clear the ALT_USB_DEV_DIEPCTL6_EPENA register field value. */
67688 #define ALT_USB_DEV_DIEPCTL6_EPENA_CLR_MSK 0x7fffffff
67689 /* The reset value of the ALT_USB_DEV_DIEPCTL6_EPENA register field. */
67690 #define ALT_USB_DEV_DIEPCTL6_EPENA_RESET 0x0
67691 /* Extracts the ALT_USB_DEV_DIEPCTL6_EPENA field value from a register. */
67692 #define ALT_USB_DEV_DIEPCTL6_EPENA_GET(value) (((value) & 0x80000000) >> 31)
67693 /* Produces a ALT_USB_DEV_DIEPCTL6_EPENA register field value suitable for setting the register. */
67694 #define ALT_USB_DEV_DIEPCTL6_EPENA_SET(value) (((value) << 31) & 0x80000000)
67695 
67696 #ifndef __ASSEMBLY__
67697 /*
67698  * WARNING: The C register and register group struct declarations are provided for
67699  * convenience and illustrative purposes. They should, however, be used with
67700  * caution as the C language standard provides no guarantees about the alignment or
67701  * atomicity of device memory accesses. The recommended practice for writing
67702  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
67703  * alt_write_word() functions.
67704  *
67705  * The struct declaration for register ALT_USB_DEV_DIEPCTL6.
67706  */
67707 struct ALT_USB_DEV_DIEPCTL6_s
67708 {
67709  uint32_t mps : 11; /* Maximum Packet Size */
67710  uint32_t : 4; /* *UNDEFINED* */
67711  uint32_t usbactep : 1; /* USB Active Endpoint */
67712  const uint32_t dpid : 1; /* Endpoint Data PID */
67713  const uint32_t naksts : 1; /* NAK Status */
67714  uint32_t eptype : 2; /* Endpoint Type */
67715  uint32_t : 1; /* *UNDEFINED* */
67716  const uint32_t stall : 1; /* STALL Handshake */
67717  uint32_t txfnum : 4; /* TxFIFO Number */
67718  uint32_t cnak : 1; /* Clear NAK */
67719  uint32_t snak : 1; /* Set NAK */
67720  uint32_t setd0pid : 1; /* Set DATA0 PID */
67721  uint32_t setd1pid : 1; /* Set DATA1 PID */
67722  const uint32_t epdis : 1; /* Endpoint Disable */
67723  const uint32_t epena : 1; /* Endpoint Enable */
67724 };
67725 
67726 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL6. */
67727 typedef volatile struct ALT_USB_DEV_DIEPCTL6_s ALT_USB_DEV_DIEPCTL6_t;
67728 #endif /* __ASSEMBLY__ */
67729 
67730 /* The byte offset of the ALT_USB_DEV_DIEPCTL6 register from the beginning of the component. */
67731 #define ALT_USB_DEV_DIEPCTL6_OFST 0x1c0
67732 /* The address of the ALT_USB_DEV_DIEPCTL6 register. */
67733 #define ALT_USB_DEV_DIEPCTL6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL6_OFST))
67734 
67735 /*
67736  * Register : Device IN Endpoint 6 Interrupt Register - diepint6
67737  *
67738  * This register indicates the status of an endpoint with respect to USB- and AHB-
67739  * related events. The application must read this register when the OUT Endpoints
67740  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
67741  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
67742  * can read this register, it must first read the Device All Endpoints Interrupt
67743  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
67744  * Interrupt register. The application must clear the appropriate bit in this
67745  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
67746  *
67747  * Register Layout
67748  *
67749  * Bits | Access | Reset | Description
67750  * :--------|:-------|:------|:---------------------------------------
67751  * [0] | R | 0x0 | Transfer Completed Interrupt
67752  * [1] | R | 0x0 | Endpoint Disabled Interrupt
67753  * [2] | R | 0x0 | AHB Error
67754  * [3] | R | 0x0 | Timeout Condition
67755  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
67756  * [5] | R | 0x0 | IN Token Received with EP Mismatch
67757  * [6] | R | 0x0 | IN Endpoint NAK Effective
67758  * [7] | R | 0x1 | Transmit FIFO Empty
67759  * [8] | R | 0x0 | Fifo Underrun
67760  * [9] | R | 0x0 | BNA Interrupt
67761  * [10] | ??? | 0x0 | *UNDEFINED*
67762  * [11] | R | 0x0 | Packet Drop Status
67763  * [12] | R | 0x0 | BbleErr Interrupt
67764  * [13] | R | 0x0 | NAK Interrupt
67765  * [14] | R | 0x0 | NYET Interrupt
67766  * [31:15] | ??? | 0x0 | *UNDEFINED*
67767  *
67768  */
67769 /*
67770  * Field : Transfer Completed Interrupt - xfercompl
67771  *
67772  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
67773  *
67774  * * for IN endpoint this field indicates that the requested data from the
67775  * descriptor is moved from external system memory to internal FIFO.
67776  *
67777  * * for OUT endpoint this field indicates that the requested data from the
67778  * internal FIFO is moved to external system memory. This interrupt is generated
67779  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
67780  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
67781  * this field indicates that the programmed transfer is complete on the AHB as
67782  * well as on the USB, for this endpoint.
67783  *
67784  * Field Enumeration Values:
67785  *
67786  * Enum | Value | Description
67787  * :---------------------------------------|:------|:-----------------------------
67788  * ALT_USB_DEV_DIEPINT6_XFERCOMPL_E_INACT | 0x0 | No Interrupt
67789  * ALT_USB_DEV_DIEPINT6_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
67790  *
67791  * Field Access Macros:
67792  *
67793  */
67794 /*
67795  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_XFERCOMPL
67796  *
67797  * No Interrupt
67798  */
67799 #define ALT_USB_DEV_DIEPINT6_XFERCOMPL_E_INACT 0x0
67800 /*
67801  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_XFERCOMPL
67802  *
67803  * Transfer Completed Interrupt
67804  */
67805 #define ALT_USB_DEV_DIEPINT6_XFERCOMPL_E_ACT 0x1
67806 
67807 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_XFERCOMPL register field. */
67808 #define ALT_USB_DEV_DIEPINT6_XFERCOMPL_LSB 0
67809 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_XFERCOMPL register field. */
67810 #define ALT_USB_DEV_DIEPINT6_XFERCOMPL_MSB 0
67811 /* The width in bits of the ALT_USB_DEV_DIEPINT6_XFERCOMPL register field. */
67812 #define ALT_USB_DEV_DIEPINT6_XFERCOMPL_WIDTH 1
67813 /* The mask used to set the ALT_USB_DEV_DIEPINT6_XFERCOMPL register field value. */
67814 #define ALT_USB_DEV_DIEPINT6_XFERCOMPL_SET_MSK 0x00000001
67815 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_XFERCOMPL register field value. */
67816 #define ALT_USB_DEV_DIEPINT6_XFERCOMPL_CLR_MSK 0xfffffffe
67817 /* The reset value of the ALT_USB_DEV_DIEPINT6_XFERCOMPL register field. */
67818 #define ALT_USB_DEV_DIEPINT6_XFERCOMPL_RESET 0x0
67819 /* Extracts the ALT_USB_DEV_DIEPINT6_XFERCOMPL field value from a register. */
67820 #define ALT_USB_DEV_DIEPINT6_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
67821 /* Produces a ALT_USB_DEV_DIEPINT6_XFERCOMPL register field value suitable for setting the register. */
67822 #define ALT_USB_DEV_DIEPINT6_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
67823 
67824 /*
67825  * Field : Endpoint Disabled Interrupt - epdisbld
67826  *
67827  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
67828  * disabled per the application's request.
67829  *
67830  * Field Enumeration Values:
67831  *
67832  * Enum | Value | Description
67833  * :--------------------------------------|:------|:----------------------------
67834  * ALT_USB_DEV_DIEPINT6_EPDISBLD_E_INACT | 0x0 | No Interrupt
67835  * ALT_USB_DEV_DIEPINT6_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
67836  *
67837  * Field Access Macros:
67838  *
67839  */
67840 /*
67841  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_EPDISBLD
67842  *
67843  * No Interrupt
67844  */
67845 #define ALT_USB_DEV_DIEPINT6_EPDISBLD_E_INACT 0x0
67846 /*
67847  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_EPDISBLD
67848  *
67849  * Endpoint Disabled Interrupt
67850  */
67851 #define ALT_USB_DEV_DIEPINT6_EPDISBLD_E_ACT 0x1
67852 
67853 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_EPDISBLD register field. */
67854 #define ALT_USB_DEV_DIEPINT6_EPDISBLD_LSB 1
67855 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_EPDISBLD register field. */
67856 #define ALT_USB_DEV_DIEPINT6_EPDISBLD_MSB 1
67857 /* The width in bits of the ALT_USB_DEV_DIEPINT6_EPDISBLD register field. */
67858 #define ALT_USB_DEV_DIEPINT6_EPDISBLD_WIDTH 1
67859 /* The mask used to set the ALT_USB_DEV_DIEPINT6_EPDISBLD register field value. */
67860 #define ALT_USB_DEV_DIEPINT6_EPDISBLD_SET_MSK 0x00000002
67861 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_EPDISBLD register field value. */
67862 #define ALT_USB_DEV_DIEPINT6_EPDISBLD_CLR_MSK 0xfffffffd
67863 /* The reset value of the ALT_USB_DEV_DIEPINT6_EPDISBLD register field. */
67864 #define ALT_USB_DEV_DIEPINT6_EPDISBLD_RESET 0x0
67865 /* Extracts the ALT_USB_DEV_DIEPINT6_EPDISBLD field value from a register. */
67866 #define ALT_USB_DEV_DIEPINT6_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
67867 /* Produces a ALT_USB_DEV_DIEPINT6_EPDISBLD register field value suitable for setting the register. */
67868 #define ALT_USB_DEV_DIEPINT6_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
67869 
67870 /*
67871  * Field : AHB Error - ahberr
67872  *
67873  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
67874  * there is an AHB error during an AHB read/write. The application can read the
67875  * corresponding endpoint DMA address register to get the error address.
67876  *
67877  * Field Enumeration Values:
67878  *
67879  * Enum | Value | Description
67880  * :------------------------------------|:------|:--------------------
67881  * ALT_USB_DEV_DIEPINT6_AHBERR_E_INACT | 0x0 | No Interrupt
67882  * ALT_USB_DEV_DIEPINT6_AHBERR_E_ACT | 0x1 | AHB Error interrupt
67883  *
67884  * Field Access Macros:
67885  *
67886  */
67887 /*
67888  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_AHBERR
67889  *
67890  * No Interrupt
67891  */
67892 #define ALT_USB_DEV_DIEPINT6_AHBERR_E_INACT 0x0
67893 /*
67894  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_AHBERR
67895  *
67896  * AHB Error interrupt
67897  */
67898 #define ALT_USB_DEV_DIEPINT6_AHBERR_E_ACT 0x1
67899 
67900 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_AHBERR register field. */
67901 #define ALT_USB_DEV_DIEPINT6_AHBERR_LSB 2
67902 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_AHBERR register field. */
67903 #define ALT_USB_DEV_DIEPINT6_AHBERR_MSB 2
67904 /* The width in bits of the ALT_USB_DEV_DIEPINT6_AHBERR register field. */
67905 #define ALT_USB_DEV_DIEPINT6_AHBERR_WIDTH 1
67906 /* The mask used to set the ALT_USB_DEV_DIEPINT6_AHBERR register field value. */
67907 #define ALT_USB_DEV_DIEPINT6_AHBERR_SET_MSK 0x00000004
67908 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_AHBERR register field value. */
67909 #define ALT_USB_DEV_DIEPINT6_AHBERR_CLR_MSK 0xfffffffb
67910 /* The reset value of the ALT_USB_DEV_DIEPINT6_AHBERR register field. */
67911 #define ALT_USB_DEV_DIEPINT6_AHBERR_RESET 0x0
67912 /* Extracts the ALT_USB_DEV_DIEPINT6_AHBERR field value from a register. */
67913 #define ALT_USB_DEV_DIEPINT6_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
67914 /* Produces a ALT_USB_DEV_DIEPINT6_AHBERR register field value suitable for setting the register. */
67915 #define ALT_USB_DEV_DIEPINT6_AHBERR_SET(value) (((value) << 2) & 0x00000004)
67916 
67917 /*
67918  * Field : Timeout Condition - timeout
67919  *
67920  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
67921  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
67922  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
67923  * detected a timeout condition on the USB for the last IN token on this endpoint.
67924  *
67925  * Field Enumeration Values:
67926  *
67927  * Enum | Value | Description
67928  * :---------------------------------|:------|:------------------
67929  * ALT_USB_DEV_DIEPINT6_TMO_E_INACT | 0x0 | No interrupt
67930  * ALT_USB_DEV_DIEPINT6_TMO_E_ACT | 0x1 | Timeout interrupy
67931  *
67932  * Field Access Macros:
67933  *
67934  */
67935 /*
67936  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_TMO
67937  *
67938  * No interrupt
67939  */
67940 #define ALT_USB_DEV_DIEPINT6_TMO_E_INACT 0x0
67941 /*
67942  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_TMO
67943  *
67944  * Timeout interrupy
67945  */
67946 #define ALT_USB_DEV_DIEPINT6_TMO_E_ACT 0x1
67947 
67948 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_TMO register field. */
67949 #define ALT_USB_DEV_DIEPINT6_TMO_LSB 3
67950 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_TMO register field. */
67951 #define ALT_USB_DEV_DIEPINT6_TMO_MSB 3
67952 /* The width in bits of the ALT_USB_DEV_DIEPINT6_TMO register field. */
67953 #define ALT_USB_DEV_DIEPINT6_TMO_WIDTH 1
67954 /* The mask used to set the ALT_USB_DEV_DIEPINT6_TMO register field value. */
67955 #define ALT_USB_DEV_DIEPINT6_TMO_SET_MSK 0x00000008
67956 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_TMO register field value. */
67957 #define ALT_USB_DEV_DIEPINT6_TMO_CLR_MSK 0xfffffff7
67958 /* The reset value of the ALT_USB_DEV_DIEPINT6_TMO register field. */
67959 #define ALT_USB_DEV_DIEPINT6_TMO_RESET 0x0
67960 /* Extracts the ALT_USB_DEV_DIEPINT6_TMO field value from a register. */
67961 #define ALT_USB_DEV_DIEPINT6_TMO_GET(value) (((value) & 0x00000008) >> 3)
67962 /* Produces a ALT_USB_DEV_DIEPINT6_TMO register field value suitable for setting the register. */
67963 #define ALT_USB_DEV_DIEPINT6_TMO_SET(value) (((value) << 3) & 0x00000008)
67964 
67965 /*
67966  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
67967  *
67968  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
67969  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
67970  * interrupt is asserted on the endpoint for which the IN token was received.
67971  *
67972  * Field Enumeration Values:
67973  *
67974  * Enum | Value | Description
67975  * :-----------------------------------------|:------|:----------------------------
67976  * ALT_USB_DEV_DIEPINT6_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
67977  * ALT_USB_DEV_DIEPINT6_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
67978  *
67979  * Field Access Macros:
67980  *
67981  */
67982 /*
67983  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_INTKNTXFEMP
67984  *
67985  * No interrupt
67986  */
67987 #define ALT_USB_DEV_DIEPINT6_INTKNTXFEMP_E_INACT 0x0
67988 /*
67989  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_INTKNTXFEMP
67990  *
67991  * IN Token Received Interrupt
67992  */
67993 #define ALT_USB_DEV_DIEPINT6_INTKNTXFEMP_E_ACT 0x1
67994 
67995 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_INTKNTXFEMP register field. */
67996 #define ALT_USB_DEV_DIEPINT6_INTKNTXFEMP_LSB 4
67997 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_INTKNTXFEMP register field. */
67998 #define ALT_USB_DEV_DIEPINT6_INTKNTXFEMP_MSB 4
67999 /* The width in bits of the ALT_USB_DEV_DIEPINT6_INTKNTXFEMP register field. */
68000 #define ALT_USB_DEV_DIEPINT6_INTKNTXFEMP_WIDTH 1
68001 /* The mask used to set the ALT_USB_DEV_DIEPINT6_INTKNTXFEMP register field value. */
68002 #define ALT_USB_DEV_DIEPINT6_INTKNTXFEMP_SET_MSK 0x00000010
68003 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_INTKNTXFEMP register field value. */
68004 #define ALT_USB_DEV_DIEPINT6_INTKNTXFEMP_CLR_MSK 0xffffffef
68005 /* The reset value of the ALT_USB_DEV_DIEPINT6_INTKNTXFEMP register field. */
68006 #define ALT_USB_DEV_DIEPINT6_INTKNTXFEMP_RESET 0x0
68007 /* Extracts the ALT_USB_DEV_DIEPINT6_INTKNTXFEMP field value from a register. */
68008 #define ALT_USB_DEV_DIEPINT6_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
68009 /* Produces a ALT_USB_DEV_DIEPINT6_INTKNTXFEMP register field value suitable for setting the register. */
68010 #define ALT_USB_DEV_DIEPINT6_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
68011 
68012 /*
68013  * Field : IN Token Received with EP Mismatch - intknepmis
68014  *
68015  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
68016  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
68017  * IN token was received. This interrupt is asserted on the endpoint for which the
68018  * IN token was received.
68019  *
68020  * Field Enumeration Values:
68021  *
68022  * Enum | Value | Description
68023  * :----------------------------------------|:------|:---------------------------------------------
68024  * ALT_USB_DEV_DIEPINT6_INTKNEPMIS_E_INACT | 0x0 | No interrupt
68025  * ALT_USB_DEV_DIEPINT6_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
68026  *
68027  * Field Access Macros:
68028  *
68029  */
68030 /*
68031  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_INTKNEPMIS
68032  *
68033  * No interrupt
68034  */
68035 #define ALT_USB_DEV_DIEPINT6_INTKNEPMIS_E_INACT 0x0
68036 /*
68037  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_INTKNEPMIS
68038  *
68039  * IN Token Received with EP Mismatch interrupt
68040  */
68041 #define ALT_USB_DEV_DIEPINT6_INTKNEPMIS_E_ACT 0x1
68042 
68043 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_INTKNEPMIS register field. */
68044 #define ALT_USB_DEV_DIEPINT6_INTKNEPMIS_LSB 5
68045 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_INTKNEPMIS register field. */
68046 #define ALT_USB_DEV_DIEPINT6_INTKNEPMIS_MSB 5
68047 /* The width in bits of the ALT_USB_DEV_DIEPINT6_INTKNEPMIS register field. */
68048 #define ALT_USB_DEV_DIEPINT6_INTKNEPMIS_WIDTH 1
68049 /* The mask used to set the ALT_USB_DEV_DIEPINT6_INTKNEPMIS register field value. */
68050 #define ALT_USB_DEV_DIEPINT6_INTKNEPMIS_SET_MSK 0x00000020
68051 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_INTKNEPMIS register field value. */
68052 #define ALT_USB_DEV_DIEPINT6_INTKNEPMIS_CLR_MSK 0xffffffdf
68053 /* The reset value of the ALT_USB_DEV_DIEPINT6_INTKNEPMIS register field. */
68054 #define ALT_USB_DEV_DIEPINT6_INTKNEPMIS_RESET 0x0
68055 /* Extracts the ALT_USB_DEV_DIEPINT6_INTKNEPMIS field value from a register. */
68056 #define ALT_USB_DEV_DIEPINT6_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
68057 /* Produces a ALT_USB_DEV_DIEPINT6_INTKNEPMIS register field value suitable for setting the register. */
68058 #define ALT_USB_DEV_DIEPINT6_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
68059 
68060 /*
68061  * Field : IN Endpoint NAK Effective - inepnakeff
68062  *
68063  * Applies to periodic IN endpoints only. This bit can be cleared when the
68064  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
68065  * interrupt indicates that the core has sampled the NAK bit Set (either by the
68066  * application or by the core). The interrupt indicates that the IN endpoint NAK
68067  * bit Set by the application has taken effect in the core.This interrupt does not
68068  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
68069  * over a NAK bit.
68070  *
68071  * Field Enumeration Values:
68072  *
68073  * Enum | Value | Description
68074  * :----------------------------------------|:------|:------------------------------------
68075  * ALT_USB_DEV_DIEPINT6_INEPNAKEFF_E_INACT | 0x0 | No interrupt
68076  * ALT_USB_DEV_DIEPINT6_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
68077  *
68078  * Field Access Macros:
68079  *
68080  */
68081 /*
68082  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_INEPNAKEFF
68083  *
68084  * No interrupt
68085  */
68086 #define ALT_USB_DEV_DIEPINT6_INEPNAKEFF_E_INACT 0x0
68087 /*
68088  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_INEPNAKEFF
68089  *
68090  * IN Endpoint NAK Effective interrupt
68091  */
68092 #define ALT_USB_DEV_DIEPINT6_INEPNAKEFF_E_ACT 0x1
68093 
68094 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_INEPNAKEFF register field. */
68095 #define ALT_USB_DEV_DIEPINT6_INEPNAKEFF_LSB 6
68096 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_INEPNAKEFF register field. */
68097 #define ALT_USB_DEV_DIEPINT6_INEPNAKEFF_MSB 6
68098 /* The width in bits of the ALT_USB_DEV_DIEPINT6_INEPNAKEFF register field. */
68099 #define ALT_USB_DEV_DIEPINT6_INEPNAKEFF_WIDTH 1
68100 /* The mask used to set the ALT_USB_DEV_DIEPINT6_INEPNAKEFF register field value. */
68101 #define ALT_USB_DEV_DIEPINT6_INEPNAKEFF_SET_MSK 0x00000040
68102 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_INEPNAKEFF register field value. */
68103 #define ALT_USB_DEV_DIEPINT6_INEPNAKEFF_CLR_MSK 0xffffffbf
68104 /* The reset value of the ALT_USB_DEV_DIEPINT6_INEPNAKEFF register field. */
68105 #define ALT_USB_DEV_DIEPINT6_INEPNAKEFF_RESET 0x0
68106 /* Extracts the ALT_USB_DEV_DIEPINT6_INEPNAKEFF field value from a register. */
68107 #define ALT_USB_DEV_DIEPINT6_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
68108 /* Produces a ALT_USB_DEV_DIEPINT6_INEPNAKEFF register field value suitable for setting the register. */
68109 #define ALT_USB_DEV_DIEPINT6_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
68110 
68111 /*
68112  * Field : Transmit FIFO Empty - txfemp
68113  *
68114  * This bit is valid only for IN Endpoints This interrupt is asserted when the
68115  * TxFIFO for this endpoint is either half or completely empty. The half or
68116  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
68117  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
68118  *
68119  * Field Enumeration Values:
68120  *
68121  * Enum | Value | Description
68122  * :------------------------------------|:------|:------------------------------
68123  * ALT_USB_DEV_DIEPINT6_TXFEMP_E_INACT | 0x0 | No interrupt
68124  * ALT_USB_DEV_DIEPINT6_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
68125  *
68126  * Field Access Macros:
68127  *
68128  */
68129 /*
68130  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_TXFEMP
68131  *
68132  * No interrupt
68133  */
68134 #define ALT_USB_DEV_DIEPINT6_TXFEMP_E_INACT 0x0
68135 /*
68136  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_TXFEMP
68137  *
68138  * Transmit FIFO Empty interrupt
68139  */
68140 #define ALT_USB_DEV_DIEPINT6_TXFEMP_E_ACT 0x1
68141 
68142 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_TXFEMP register field. */
68143 #define ALT_USB_DEV_DIEPINT6_TXFEMP_LSB 7
68144 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_TXFEMP register field. */
68145 #define ALT_USB_DEV_DIEPINT6_TXFEMP_MSB 7
68146 /* The width in bits of the ALT_USB_DEV_DIEPINT6_TXFEMP register field. */
68147 #define ALT_USB_DEV_DIEPINT6_TXFEMP_WIDTH 1
68148 /* The mask used to set the ALT_USB_DEV_DIEPINT6_TXFEMP register field value. */
68149 #define ALT_USB_DEV_DIEPINT6_TXFEMP_SET_MSK 0x00000080
68150 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_TXFEMP register field value. */
68151 #define ALT_USB_DEV_DIEPINT6_TXFEMP_CLR_MSK 0xffffff7f
68152 /* The reset value of the ALT_USB_DEV_DIEPINT6_TXFEMP register field. */
68153 #define ALT_USB_DEV_DIEPINT6_TXFEMP_RESET 0x1
68154 /* Extracts the ALT_USB_DEV_DIEPINT6_TXFEMP field value from a register. */
68155 #define ALT_USB_DEV_DIEPINT6_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
68156 /* Produces a ALT_USB_DEV_DIEPINT6_TXFEMP register field value suitable for setting the register. */
68157 #define ALT_USB_DEV_DIEPINT6_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
68158 
68159 /*
68160  * Field : Fifo Underrun - txfifoundrn
68161  *
68162  * Applies to IN endpoints Only. The core generates this interrupt when it detects
68163  * a transmit FIFO underrun condition for this endpoint.
68164  *
68165  * Field Enumeration Values:
68166  *
68167  * Enum | Value | Description
68168  * :-----------------------------------------|:------|:------------------------
68169  * ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
68170  * ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
68171  *
68172  * Field Access Macros:
68173  *
68174  */
68175 /*
68176  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN
68177  *
68178  * No interrupt
68179  */
68180 #define ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN_E_INACT 0x0
68181 /*
68182  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN
68183  *
68184  * Fifo Underrun interrupt
68185  */
68186 #define ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN_E_ACT 0x1
68187 
68188 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN register field. */
68189 #define ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN_LSB 8
68190 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN register field. */
68191 #define ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN_MSB 8
68192 /* The width in bits of the ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN register field. */
68193 #define ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN_WIDTH 1
68194 /* The mask used to set the ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN register field value. */
68195 #define ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN_SET_MSK 0x00000100
68196 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN register field value. */
68197 #define ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN_CLR_MSK 0xfffffeff
68198 /* The reset value of the ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN register field. */
68199 #define ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN_RESET 0x0
68200 /* Extracts the ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN field value from a register. */
68201 #define ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
68202 /* Produces a ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN register field value suitable for setting the register. */
68203 #define ALT_USB_DEV_DIEPINT6_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
68204 
68205 /*
68206  * Field : BNA Interrupt - bnaintr
68207  *
68208  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
68209  * generates this interrupt when the descriptor accessed is not ready for the Core
68210  * to process, such as Host busy or DMA done
68211  *
68212  * Field Enumeration Values:
68213  *
68214  * Enum | Value | Description
68215  * :-------------------------------------|:------|:--------------
68216  * ALT_USB_DEV_DIEPINT6_BNAINTR_E_INACT | 0x0 | No interrupt
68217  * ALT_USB_DEV_DIEPINT6_BNAINTR_E_ACT | 0x1 | BNA interrupt
68218  *
68219  * Field Access Macros:
68220  *
68221  */
68222 /*
68223  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_BNAINTR
68224  *
68225  * No interrupt
68226  */
68227 #define ALT_USB_DEV_DIEPINT6_BNAINTR_E_INACT 0x0
68228 /*
68229  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_BNAINTR
68230  *
68231  * BNA interrupt
68232  */
68233 #define ALT_USB_DEV_DIEPINT6_BNAINTR_E_ACT 0x1
68234 
68235 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_BNAINTR register field. */
68236 #define ALT_USB_DEV_DIEPINT6_BNAINTR_LSB 9
68237 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_BNAINTR register field. */
68238 #define ALT_USB_DEV_DIEPINT6_BNAINTR_MSB 9
68239 /* The width in bits of the ALT_USB_DEV_DIEPINT6_BNAINTR register field. */
68240 #define ALT_USB_DEV_DIEPINT6_BNAINTR_WIDTH 1
68241 /* The mask used to set the ALT_USB_DEV_DIEPINT6_BNAINTR register field value. */
68242 #define ALT_USB_DEV_DIEPINT6_BNAINTR_SET_MSK 0x00000200
68243 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_BNAINTR register field value. */
68244 #define ALT_USB_DEV_DIEPINT6_BNAINTR_CLR_MSK 0xfffffdff
68245 /* The reset value of the ALT_USB_DEV_DIEPINT6_BNAINTR register field. */
68246 #define ALT_USB_DEV_DIEPINT6_BNAINTR_RESET 0x0
68247 /* Extracts the ALT_USB_DEV_DIEPINT6_BNAINTR field value from a register. */
68248 #define ALT_USB_DEV_DIEPINT6_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
68249 /* Produces a ALT_USB_DEV_DIEPINT6_BNAINTR register field value suitable for setting the register. */
68250 #define ALT_USB_DEV_DIEPINT6_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
68251 
68252 /*
68253  * Field : Packet Drop Status - pktdrpsts
68254  *
68255  * This bit indicates to the application that an ISOC OUT packet has been dropped.
68256  * This bit does not have an associated mask bit and does not generate an
68257  * interrupt.
68258  *
68259  * Field Enumeration Values:
68260  *
68261  * Enum | Value | Description
68262  * :---------------------------------------|:------|:-----------------------------
68263  * ALT_USB_DEV_DIEPINT6_PKTDRPSTS_E_INACT | 0x0 | No interrupt
68264  * ALT_USB_DEV_DIEPINT6_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
68265  *
68266  * Field Access Macros:
68267  *
68268  */
68269 /*
68270  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_PKTDRPSTS
68271  *
68272  * No interrupt
68273  */
68274 #define ALT_USB_DEV_DIEPINT6_PKTDRPSTS_E_INACT 0x0
68275 /*
68276  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_PKTDRPSTS
68277  *
68278  * Packet Drop Status interrupt
68279  */
68280 #define ALT_USB_DEV_DIEPINT6_PKTDRPSTS_E_ACT 0x1
68281 
68282 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_PKTDRPSTS register field. */
68283 #define ALT_USB_DEV_DIEPINT6_PKTDRPSTS_LSB 11
68284 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_PKTDRPSTS register field. */
68285 #define ALT_USB_DEV_DIEPINT6_PKTDRPSTS_MSB 11
68286 /* The width in bits of the ALT_USB_DEV_DIEPINT6_PKTDRPSTS register field. */
68287 #define ALT_USB_DEV_DIEPINT6_PKTDRPSTS_WIDTH 1
68288 /* The mask used to set the ALT_USB_DEV_DIEPINT6_PKTDRPSTS register field value. */
68289 #define ALT_USB_DEV_DIEPINT6_PKTDRPSTS_SET_MSK 0x00000800
68290 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_PKTDRPSTS register field value. */
68291 #define ALT_USB_DEV_DIEPINT6_PKTDRPSTS_CLR_MSK 0xfffff7ff
68292 /* The reset value of the ALT_USB_DEV_DIEPINT6_PKTDRPSTS register field. */
68293 #define ALT_USB_DEV_DIEPINT6_PKTDRPSTS_RESET 0x0
68294 /* Extracts the ALT_USB_DEV_DIEPINT6_PKTDRPSTS field value from a register. */
68295 #define ALT_USB_DEV_DIEPINT6_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
68296 /* Produces a ALT_USB_DEV_DIEPINT6_PKTDRPSTS register field value suitable for setting the register. */
68297 #define ALT_USB_DEV_DIEPINT6_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
68298 
68299 /*
68300  * Field : BbleErr Interrupt - bbleerr
68301  *
68302  * The core generates this interrupt when babble is received for the endpoint.
68303  *
68304  * Field Enumeration Values:
68305  *
68306  * Enum | Value | Description
68307  * :-------------------------------------|:------|:------------------
68308  * ALT_USB_DEV_DIEPINT6_BBLEERR_E_INACT | 0x0 | No interrupt
68309  * ALT_USB_DEV_DIEPINT6_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
68310  *
68311  * Field Access Macros:
68312  *
68313  */
68314 /*
68315  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_BBLEERR
68316  *
68317  * No interrupt
68318  */
68319 #define ALT_USB_DEV_DIEPINT6_BBLEERR_E_INACT 0x0
68320 /*
68321  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_BBLEERR
68322  *
68323  * BbleErr interrupt
68324  */
68325 #define ALT_USB_DEV_DIEPINT6_BBLEERR_E_ACT 0x1
68326 
68327 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_BBLEERR register field. */
68328 #define ALT_USB_DEV_DIEPINT6_BBLEERR_LSB 12
68329 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_BBLEERR register field. */
68330 #define ALT_USB_DEV_DIEPINT6_BBLEERR_MSB 12
68331 /* The width in bits of the ALT_USB_DEV_DIEPINT6_BBLEERR register field. */
68332 #define ALT_USB_DEV_DIEPINT6_BBLEERR_WIDTH 1
68333 /* The mask used to set the ALT_USB_DEV_DIEPINT6_BBLEERR register field value. */
68334 #define ALT_USB_DEV_DIEPINT6_BBLEERR_SET_MSK 0x00001000
68335 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_BBLEERR register field value. */
68336 #define ALT_USB_DEV_DIEPINT6_BBLEERR_CLR_MSK 0xffffefff
68337 /* The reset value of the ALT_USB_DEV_DIEPINT6_BBLEERR register field. */
68338 #define ALT_USB_DEV_DIEPINT6_BBLEERR_RESET 0x0
68339 /* Extracts the ALT_USB_DEV_DIEPINT6_BBLEERR field value from a register. */
68340 #define ALT_USB_DEV_DIEPINT6_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
68341 /* Produces a ALT_USB_DEV_DIEPINT6_BBLEERR register field value suitable for setting the register. */
68342 #define ALT_USB_DEV_DIEPINT6_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
68343 
68344 /*
68345  * Field : NAK Interrupt - nakintrpt
68346  *
68347  * The core generates this interrupt when a NAK is transmitted or received by the
68348  * device. In case of isochronous IN endpoints the interrupt gets generated when a
68349  * zero length packet is transmitted due to un-availability of data in the TXFifo.
68350  *
68351  * Field Enumeration Values:
68352  *
68353  * Enum | Value | Description
68354  * :---------------------------------------|:------|:--------------
68355  * ALT_USB_DEV_DIEPINT6_NAKINTRPT_E_INACT | 0x0 | No interrupt
68356  * ALT_USB_DEV_DIEPINT6_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
68357  *
68358  * Field Access Macros:
68359  *
68360  */
68361 /*
68362  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_NAKINTRPT
68363  *
68364  * No interrupt
68365  */
68366 #define ALT_USB_DEV_DIEPINT6_NAKINTRPT_E_INACT 0x0
68367 /*
68368  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_NAKINTRPT
68369  *
68370  * NAK Interrupt
68371  */
68372 #define ALT_USB_DEV_DIEPINT6_NAKINTRPT_E_ACT 0x1
68373 
68374 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_NAKINTRPT register field. */
68375 #define ALT_USB_DEV_DIEPINT6_NAKINTRPT_LSB 13
68376 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_NAKINTRPT register field. */
68377 #define ALT_USB_DEV_DIEPINT6_NAKINTRPT_MSB 13
68378 /* The width in bits of the ALT_USB_DEV_DIEPINT6_NAKINTRPT register field. */
68379 #define ALT_USB_DEV_DIEPINT6_NAKINTRPT_WIDTH 1
68380 /* The mask used to set the ALT_USB_DEV_DIEPINT6_NAKINTRPT register field value. */
68381 #define ALT_USB_DEV_DIEPINT6_NAKINTRPT_SET_MSK 0x00002000
68382 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_NAKINTRPT register field value. */
68383 #define ALT_USB_DEV_DIEPINT6_NAKINTRPT_CLR_MSK 0xffffdfff
68384 /* The reset value of the ALT_USB_DEV_DIEPINT6_NAKINTRPT register field. */
68385 #define ALT_USB_DEV_DIEPINT6_NAKINTRPT_RESET 0x0
68386 /* Extracts the ALT_USB_DEV_DIEPINT6_NAKINTRPT field value from a register. */
68387 #define ALT_USB_DEV_DIEPINT6_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
68388 /* Produces a ALT_USB_DEV_DIEPINT6_NAKINTRPT register field value suitable for setting the register. */
68389 #define ALT_USB_DEV_DIEPINT6_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
68390 
68391 /*
68392  * Field : NYET Interrupt - nyetintrpt
68393  *
68394  * The core generates this interrupt when a NYET response is transmitted for a non
68395  * isochronous OUT endpoint.
68396  *
68397  * Field Enumeration Values:
68398  *
68399  * Enum | Value | Description
68400  * :----------------------------------------|:------|:---------------
68401  * ALT_USB_DEV_DIEPINT6_NYETINTRPT_E_INACT | 0x0 | No interrupt
68402  * ALT_USB_DEV_DIEPINT6_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
68403  *
68404  * Field Access Macros:
68405  *
68406  */
68407 /*
68408  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_NYETINTRPT
68409  *
68410  * No interrupt
68411  */
68412 #define ALT_USB_DEV_DIEPINT6_NYETINTRPT_E_INACT 0x0
68413 /*
68414  * Enumerated value for register field ALT_USB_DEV_DIEPINT6_NYETINTRPT
68415  *
68416  * NYET Interrupt
68417  */
68418 #define ALT_USB_DEV_DIEPINT6_NYETINTRPT_E_ACT 0x1
68419 
68420 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT6_NYETINTRPT register field. */
68421 #define ALT_USB_DEV_DIEPINT6_NYETINTRPT_LSB 14
68422 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT6_NYETINTRPT register field. */
68423 #define ALT_USB_DEV_DIEPINT6_NYETINTRPT_MSB 14
68424 /* The width in bits of the ALT_USB_DEV_DIEPINT6_NYETINTRPT register field. */
68425 #define ALT_USB_DEV_DIEPINT6_NYETINTRPT_WIDTH 1
68426 /* The mask used to set the ALT_USB_DEV_DIEPINT6_NYETINTRPT register field value. */
68427 #define ALT_USB_DEV_DIEPINT6_NYETINTRPT_SET_MSK 0x00004000
68428 /* The mask used to clear the ALT_USB_DEV_DIEPINT6_NYETINTRPT register field value. */
68429 #define ALT_USB_DEV_DIEPINT6_NYETINTRPT_CLR_MSK 0xffffbfff
68430 /* The reset value of the ALT_USB_DEV_DIEPINT6_NYETINTRPT register field. */
68431 #define ALT_USB_DEV_DIEPINT6_NYETINTRPT_RESET 0x0
68432 /* Extracts the ALT_USB_DEV_DIEPINT6_NYETINTRPT field value from a register. */
68433 #define ALT_USB_DEV_DIEPINT6_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
68434 /* Produces a ALT_USB_DEV_DIEPINT6_NYETINTRPT register field value suitable for setting the register. */
68435 #define ALT_USB_DEV_DIEPINT6_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
68436 
68437 #ifndef __ASSEMBLY__
68438 /*
68439  * WARNING: The C register and register group struct declarations are provided for
68440  * convenience and illustrative purposes. They should, however, be used with
68441  * caution as the C language standard provides no guarantees about the alignment or
68442  * atomicity of device memory accesses. The recommended practice for writing
68443  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
68444  * alt_write_word() functions.
68445  *
68446  * The struct declaration for register ALT_USB_DEV_DIEPINT6.
68447  */
68448 struct ALT_USB_DEV_DIEPINT6_s
68449 {
68450  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
68451  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
68452  const uint32_t ahberr : 1; /* AHB Error */
68453  const uint32_t timeout : 1; /* Timeout Condition */
68454  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
68455  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
68456  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
68457  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
68458  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
68459  const uint32_t bnaintr : 1; /* BNA Interrupt */
68460  uint32_t : 1; /* *UNDEFINED* */
68461  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
68462  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
68463  const uint32_t nakintrpt : 1; /* NAK Interrupt */
68464  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
68465  uint32_t : 17; /* *UNDEFINED* */
68466 };
68467 
68468 /* The typedef declaration for register ALT_USB_DEV_DIEPINT6. */
68469 typedef volatile struct ALT_USB_DEV_DIEPINT6_s ALT_USB_DEV_DIEPINT6_t;
68470 #endif /* __ASSEMBLY__ */
68471 
68472 /* The byte offset of the ALT_USB_DEV_DIEPINT6 register from the beginning of the component. */
68473 #define ALT_USB_DEV_DIEPINT6_OFST 0x1c8
68474 /* The address of the ALT_USB_DEV_DIEPINT6 register. */
68475 #define ALT_USB_DEV_DIEPINT6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT6_OFST))
68476 
68477 /*
68478  * Register : Device IN Endpoint 6 Transfer Size Register - dieptsiz6
68479  *
68480  * The application must modify this register before enabling the endpoint. Once the
68481  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
68482  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
68483  * application can only read this register once the core has cleared the Endpoint
68484  * Enable bit.
68485  *
68486  * Register Layout
68487  *
68488  * Bits | Access | Reset | Description
68489  * :--------|:-------|:------|:----------------------------
68490  * [18:0] | RW | 0x0 | Transfer Size
68491  * [28:19] | RW | 0x0 | Packet Count
68492  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
68493  * [31] | ??? | 0x0 | *UNDEFINED*
68494  *
68495  */
68496 /*
68497  * Field : Transfer Size - xfersize
68498  *
68499  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
68500  * application only after it has exhausted the transfer size amount of data. The
68501  * transfer size can be Set to the maximum packet size of the endpoint, to be
68502  * interrupted at the end of each packet. The core decrements this field every time
68503  * a packet from the external memory is written to the TxFIFO.
68504  *
68505  * Field Access Macros:
68506  *
68507  */
68508 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ6_XFERSIZE register field. */
68509 #define ALT_USB_DEV_DIEPTSIZ6_XFERSIZE_LSB 0
68510 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ6_XFERSIZE register field. */
68511 #define ALT_USB_DEV_DIEPTSIZ6_XFERSIZE_MSB 18
68512 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ6_XFERSIZE register field. */
68513 #define ALT_USB_DEV_DIEPTSIZ6_XFERSIZE_WIDTH 19
68514 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ6_XFERSIZE register field value. */
68515 #define ALT_USB_DEV_DIEPTSIZ6_XFERSIZE_SET_MSK 0x0007ffff
68516 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ6_XFERSIZE register field value. */
68517 #define ALT_USB_DEV_DIEPTSIZ6_XFERSIZE_CLR_MSK 0xfff80000
68518 /* The reset value of the ALT_USB_DEV_DIEPTSIZ6_XFERSIZE register field. */
68519 #define ALT_USB_DEV_DIEPTSIZ6_XFERSIZE_RESET 0x0
68520 /* Extracts the ALT_USB_DEV_DIEPTSIZ6_XFERSIZE field value from a register. */
68521 #define ALT_USB_DEV_DIEPTSIZ6_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
68522 /* Produces a ALT_USB_DEV_DIEPTSIZ6_XFERSIZE register field value suitable for setting the register. */
68523 #define ALT_USB_DEV_DIEPTSIZ6_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
68524 
68525 /*
68526  * Field : Packet Count - PktCnt
68527  *
68528  * Indicates the total number of USB packets that constitute the Transfer Size
68529  * amount of data for endpoint 0.This field is decremented every time a packet
68530  * (maximum size or short packet) is read from the TxFIFO.
68531  *
68532  * Field Access Macros:
68533  *
68534  */
68535 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ6_PKTCNT register field. */
68536 #define ALT_USB_DEV_DIEPTSIZ6_PKTCNT_LSB 19
68537 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ6_PKTCNT register field. */
68538 #define ALT_USB_DEV_DIEPTSIZ6_PKTCNT_MSB 28
68539 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ6_PKTCNT register field. */
68540 #define ALT_USB_DEV_DIEPTSIZ6_PKTCNT_WIDTH 10
68541 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ6_PKTCNT register field value. */
68542 #define ALT_USB_DEV_DIEPTSIZ6_PKTCNT_SET_MSK 0x1ff80000
68543 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ6_PKTCNT register field value. */
68544 #define ALT_USB_DEV_DIEPTSIZ6_PKTCNT_CLR_MSK 0xe007ffff
68545 /* The reset value of the ALT_USB_DEV_DIEPTSIZ6_PKTCNT register field. */
68546 #define ALT_USB_DEV_DIEPTSIZ6_PKTCNT_RESET 0x0
68547 /* Extracts the ALT_USB_DEV_DIEPTSIZ6_PKTCNT field value from a register. */
68548 #define ALT_USB_DEV_DIEPTSIZ6_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
68549 /* Produces a ALT_USB_DEV_DIEPTSIZ6_PKTCNT register field value suitable for setting the register. */
68550 #define ALT_USB_DEV_DIEPTSIZ6_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
68551 
68552 /*
68553  * Field : Applies to IN endpoints onl - mc
68554  *
68555  * for periodic IN endpoints, this field indicates the number of packets that must
68556  * be transmitted per microframe on the USB. The core uses this field to calculate
68557  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
68558  * field is valid only in Internal DMA mode. It specifies the number of packets the
68559  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
68560  * by the Next Endpoint field of the Device Endpoint-n Control register
68561  * (DIEPCTLn.NextEp)
68562  *
68563  * Field Enumeration Values:
68564  *
68565  * Enum | Value | Description
68566  * :------------------------------------|:------|:------------
68567  * ALT_USB_DEV_DIEPTSIZ6_MC_E_PKTONE | 0x1 | 1 packet
68568  * ALT_USB_DEV_DIEPTSIZ6_MC_E_PKTTWO | 0x2 | 2 packets
68569  * ALT_USB_DEV_DIEPTSIZ6_MC_E_PKTTHREE | 0x3 | 3 packets
68570  *
68571  * Field Access Macros:
68572  *
68573  */
68574 /*
68575  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ6_MC
68576  *
68577  * 1 packet
68578  */
68579 #define ALT_USB_DEV_DIEPTSIZ6_MC_E_PKTONE 0x1
68580 /*
68581  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ6_MC
68582  *
68583  * 2 packets
68584  */
68585 #define ALT_USB_DEV_DIEPTSIZ6_MC_E_PKTTWO 0x2
68586 /*
68587  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ6_MC
68588  *
68589  * 3 packets
68590  */
68591 #define ALT_USB_DEV_DIEPTSIZ6_MC_E_PKTTHREE 0x3
68592 
68593 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ6_MC register field. */
68594 #define ALT_USB_DEV_DIEPTSIZ6_MC_LSB 29
68595 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ6_MC register field. */
68596 #define ALT_USB_DEV_DIEPTSIZ6_MC_MSB 30
68597 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ6_MC register field. */
68598 #define ALT_USB_DEV_DIEPTSIZ6_MC_WIDTH 2
68599 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ6_MC register field value. */
68600 #define ALT_USB_DEV_DIEPTSIZ6_MC_SET_MSK 0x60000000
68601 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ6_MC register field value. */
68602 #define ALT_USB_DEV_DIEPTSIZ6_MC_CLR_MSK 0x9fffffff
68603 /* The reset value of the ALT_USB_DEV_DIEPTSIZ6_MC register field. */
68604 #define ALT_USB_DEV_DIEPTSIZ6_MC_RESET 0x0
68605 /* Extracts the ALT_USB_DEV_DIEPTSIZ6_MC field value from a register. */
68606 #define ALT_USB_DEV_DIEPTSIZ6_MC_GET(value) (((value) & 0x60000000) >> 29)
68607 /* Produces a ALT_USB_DEV_DIEPTSIZ6_MC register field value suitable for setting the register. */
68608 #define ALT_USB_DEV_DIEPTSIZ6_MC_SET(value) (((value) << 29) & 0x60000000)
68609 
68610 #ifndef __ASSEMBLY__
68611 /*
68612  * WARNING: The C register and register group struct declarations are provided for
68613  * convenience and illustrative purposes. They should, however, be used with
68614  * caution as the C language standard provides no guarantees about the alignment or
68615  * atomicity of device memory accesses. The recommended practice for writing
68616  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
68617  * alt_write_word() functions.
68618  *
68619  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ6.
68620  */
68621 struct ALT_USB_DEV_DIEPTSIZ6_s
68622 {
68623  uint32_t xfersize : 19; /* Transfer Size */
68624  uint32_t PktCnt : 10; /* Packet Count */
68625  uint32_t mc : 2; /* Applies to IN endpoints onl */
68626  uint32_t : 1; /* *UNDEFINED* */
68627 };
68628 
68629 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ6. */
68630 typedef volatile struct ALT_USB_DEV_DIEPTSIZ6_s ALT_USB_DEV_DIEPTSIZ6_t;
68631 #endif /* __ASSEMBLY__ */
68632 
68633 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ6 register from the beginning of the component. */
68634 #define ALT_USB_DEV_DIEPTSIZ6_OFST 0x1d0
68635 /* The address of the ALT_USB_DEV_DIEPTSIZ6 register. */
68636 #define ALT_USB_DEV_DIEPTSIZ6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ6_OFST))
68637 
68638 /*
68639  * Register : Device IN Endpoint 6 DMA Address Register - diepdma6
68640  *
68641  * DMA Addressing.
68642  *
68643  * Register Layout
68644  *
68645  * Bits | Access | Reset | Description
68646  * :-------|:-------|:--------|:------------
68647  * [31:0] | RW | Unknown | DMA Address
68648  *
68649  */
68650 /*
68651  * Field : DMA Address - diepdma6
68652  *
68653  * Holds the start address of the external memory for storing or fetching endpoint
68654  * data. for control endpoints, this field stores control OUT data packets as well
68655  * as SETUP transaction data packets. When more than three SETUP packets are
68656  * received back-to-back, the SETUP data packet in the memory is overwritten. This
68657  * register is incremented on every AHB transaction. The application can give only
68658  * a DWORD-aligned address.
68659  *
68660  * When Scatter/Gather DMA mode is not enabled, the application programs the start
68661  * address value in this field.
68662  *
68663  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
68664  * for the descriptor list.
68665  *
68666  * Field Access Macros:
68667  *
68668  */
68669 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA6_DIEPDMA6 register field. */
68670 #define ALT_USB_DEV_DIEPDMA6_DIEPDMA6_LSB 0
68671 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA6_DIEPDMA6 register field. */
68672 #define ALT_USB_DEV_DIEPDMA6_DIEPDMA6_MSB 31
68673 /* The width in bits of the ALT_USB_DEV_DIEPDMA6_DIEPDMA6 register field. */
68674 #define ALT_USB_DEV_DIEPDMA6_DIEPDMA6_WIDTH 32
68675 /* The mask used to set the ALT_USB_DEV_DIEPDMA6_DIEPDMA6 register field value. */
68676 #define ALT_USB_DEV_DIEPDMA6_DIEPDMA6_SET_MSK 0xffffffff
68677 /* The mask used to clear the ALT_USB_DEV_DIEPDMA6_DIEPDMA6 register field value. */
68678 #define ALT_USB_DEV_DIEPDMA6_DIEPDMA6_CLR_MSK 0x00000000
68679 /* The reset value of the ALT_USB_DEV_DIEPDMA6_DIEPDMA6 register field is UNKNOWN. */
68680 #define ALT_USB_DEV_DIEPDMA6_DIEPDMA6_RESET 0x0
68681 /* Extracts the ALT_USB_DEV_DIEPDMA6_DIEPDMA6 field value from a register. */
68682 #define ALT_USB_DEV_DIEPDMA6_DIEPDMA6_GET(value) (((value) & 0xffffffff) >> 0)
68683 /* Produces a ALT_USB_DEV_DIEPDMA6_DIEPDMA6 register field value suitable for setting the register. */
68684 #define ALT_USB_DEV_DIEPDMA6_DIEPDMA6_SET(value) (((value) << 0) & 0xffffffff)
68685 
68686 #ifndef __ASSEMBLY__
68687 /*
68688  * WARNING: The C register and register group struct declarations are provided for
68689  * convenience and illustrative purposes. They should, however, be used with
68690  * caution as the C language standard provides no guarantees about the alignment or
68691  * atomicity of device memory accesses. The recommended practice for writing
68692  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
68693  * alt_write_word() functions.
68694  *
68695  * The struct declaration for register ALT_USB_DEV_DIEPDMA6.
68696  */
68697 struct ALT_USB_DEV_DIEPDMA6_s
68698 {
68699  uint32_t diepdma6 : 32; /* DMA Address */
68700 };
68701 
68702 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA6. */
68703 typedef volatile struct ALT_USB_DEV_DIEPDMA6_s ALT_USB_DEV_DIEPDMA6_t;
68704 #endif /* __ASSEMBLY__ */
68705 
68706 /* The byte offset of the ALT_USB_DEV_DIEPDMA6 register from the beginning of the component. */
68707 #define ALT_USB_DEV_DIEPDMA6_OFST 0x1d4
68708 /* The address of the ALT_USB_DEV_DIEPDMA6 register. */
68709 #define ALT_USB_DEV_DIEPDMA6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA6_OFST))
68710 
68711 /*
68712  * Register : Device IN Endpoint Transmit FIFO Status Register 6 - dtxfsts6
68713  *
68714  * This register contains the free space information for the Device IN endpoint
68715  * TxFIFO.
68716  *
68717  * Register Layout
68718  *
68719  * Bits | Access | Reset | Description
68720  * :--------|:-------|:-------|:-------------------------------
68721  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
68722  * [31:16] | ??? | 0x0 | *UNDEFINED*
68723  *
68724  */
68725 /*
68726  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
68727  *
68728  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
68729  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
68730  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
68731  * 32,768 words available Others: Reserved
68732  *
68733  * Field Access Macros:
68734  *
68735  */
68736 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL register field. */
68737 #define ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL_LSB 0
68738 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL register field. */
68739 #define ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL_MSB 15
68740 /* The width in bits of the ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL register field. */
68741 #define ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL_WIDTH 16
68742 /* The mask used to set the ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL register field value. */
68743 #define ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
68744 /* The mask used to clear the ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL register field value. */
68745 #define ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
68746 /* The reset value of the ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL register field. */
68747 #define ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL_RESET 0x2000
68748 /* Extracts the ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL field value from a register. */
68749 #define ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
68750 /* Produces a ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL register field value suitable for setting the register. */
68751 #define ALT_USB_DEV_DTXFSTS6_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
68752 
68753 #ifndef __ASSEMBLY__
68754 /*
68755  * WARNING: The C register and register group struct declarations are provided for
68756  * convenience and illustrative purposes. They should, however, be used with
68757  * caution as the C language standard provides no guarantees about the alignment or
68758  * atomicity of device memory accesses. The recommended practice for writing
68759  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
68760  * alt_write_word() functions.
68761  *
68762  * The struct declaration for register ALT_USB_DEV_DTXFSTS6.
68763  */
68764 struct ALT_USB_DEV_DTXFSTS6_s
68765 {
68766  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
68767  uint32_t : 16; /* *UNDEFINED* */
68768 };
68769 
68770 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS6. */
68771 typedef volatile struct ALT_USB_DEV_DTXFSTS6_s ALT_USB_DEV_DTXFSTS6_t;
68772 #endif /* __ASSEMBLY__ */
68773 
68774 /* The byte offset of the ALT_USB_DEV_DTXFSTS6 register from the beginning of the component. */
68775 #define ALT_USB_DEV_DTXFSTS6_OFST 0x1d8
68776 /* The address of the ALT_USB_DEV_DTXFSTS6 register. */
68777 #define ALT_USB_DEV_DTXFSTS6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS6_OFST))
68778 
68779 /*
68780  * Register : Device IN Endpoint 6 DMA Buffer Address Register - diepdmab6
68781  *
68782  * DMA Buffer Address.
68783  *
68784  * Register Layout
68785  *
68786  * Bits | Access | Reset | Description
68787  * :-------|:-------|:--------|:-------------------
68788  * [31:0] | R | Unknown | DMA Buffer Address
68789  *
68790  */
68791 /*
68792  * Field : DMA Buffer Address - diepdmab6
68793  *
68794  * Holds the current buffer address. This register is updated as and when the data
68795  * transfer for the corresponding end point is in progress. This register is
68796  * present only in Scatter/Gather DMA mode.
68797  *
68798  * Field Access Macros:
68799  *
68800  */
68801 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6 register field. */
68802 #define ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6_LSB 0
68803 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6 register field. */
68804 #define ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6_MSB 31
68805 /* The width in bits of the ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6 register field. */
68806 #define ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6_WIDTH 32
68807 /* The mask used to set the ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6 register field value. */
68808 #define ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6_SET_MSK 0xffffffff
68809 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6 register field value. */
68810 #define ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6_CLR_MSK 0x00000000
68811 /* The reset value of the ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6 register field is UNKNOWN. */
68812 #define ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6_RESET 0x0
68813 /* Extracts the ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6 field value from a register. */
68814 #define ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6_GET(value) (((value) & 0xffffffff) >> 0)
68815 /* Produces a ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6 register field value suitable for setting the register. */
68816 #define ALT_USB_DEV_DIEPDMAB6_DIEPDMAB6_SET(value) (((value) << 0) & 0xffffffff)
68817 
68818 #ifndef __ASSEMBLY__
68819 /*
68820  * WARNING: The C register and register group struct declarations are provided for
68821  * convenience and illustrative purposes. They should, however, be used with
68822  * caution as the C language standard provides no guarantees about the alignment or
68823  * atomicity of device memory accesses. The recommended practice for writing
68824  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
68825  * alt_write_word() functions.
68826  *
68827  * The struct declaration for register ALT_USB_DEV_DIEPDMAB6.
68828  */
68829 struct ALT_USB_DEV_DIEPDMAB6_s
68830 {
68831  const uint32_t diepdmab6 : 32; /* DMA Buffer Address */
68832 };
68833 
68834 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB6. */
68835 typedef volatile struct ALT_USB_DEV_DIEPDMAB6_s ALT_USB_DEV_DIEPDMAB6_t;
68836 #endif /* __ASSEMBLY__ */
68837 
68838 /* The byte offset of the ALT_USB_DEV_DIEPDMAB6 register from the beginning of the component. */
68839 #define ALT_USB_DEV_DIEPDMAB6_OFST 0x1dc
68840 /* The address of the ALT_USB_DEV_DIEPDMAB6 register. */
68841 #define ALT_USB_DEV_DIEPDMAB6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB6_OFST))
68842 
68843 /*
68844  * Register : Device Control IN Endpoint 7 Control Register - diepctl7
68845  *
68846  * Endpoint_number: 7
68847  *
68848  * Register Layout
68849  *
68850  * Bits | Access | Reset | Description
68851  * :--------|:-------|:------|:--------------------
68852  * [10:0] | RW | 0x0 | Maximum Packet Size
68853  * [14:11] | ??? | 0x0 | *UNDEFINED*
68854  * [15] | RW | 0x0 | USB Active Endpoint
68855  * [16] | R | 0x0 | Endpoint Data PID
68856  * [17] | R | 0x0 | NAK Status
68857  * [19:18] | RW | 0x0 | Endpoint Type
68858  * [20] | ??? | 0x0 | *UNDEFINED*
68859  * [21] | R | 0x0 | STALL Handshake
68860  * [25:22] | RW | 0x0 | TxFIFO Number
68861  * [26] | W | 0x0 | Clear NAK
68862  * [27] | W | 0x0 | Set NAK
68863  * [28] | W | 0x0 | Set DATA0 PID
68864  * [29] | W | 0x0 | Set DATA1 PID
68865  * [30] | R | 0x0 | Endpoint Disable
68866  * [31] | R | 0x0 | Endpoint Enable
68867  *
68868  */
68869 /*
68870  * Field : Maximum Packet Size - mps
68871  *
68872  * Applies to IN and OUT endpoints. The application must program this field with
68873  * the maximum packet size for the current logical endpoint. This value is in
68874  * bytes.
68875  *
68876  * Field Access Macros:
68877  *
68878  */
68879 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_MPS register field. */
68880 #define ALT_USB_DEV_DIEPCTL7_MPS_LSB 0
68881 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_MPS register field. */
68882 #define ALT_USB_DEV_DIEPCTL7_MPS_MSB 10
68883 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_MPS register field. */
68884 #define ALT_USB_DEV_DIEPCTL7_MPS_WIDTH 11
68885 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_MPS register field value. */
68886 #define ALT_USB_DEV_DIEPCTL7_MPS_SET_MSK 0x000007ff
68887 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_MPS register field value. */
68888 #define ALT_USB_DEV_DIEPCTL7_MPS_CLR_MSK 0xfffff800
68889 /* The reset value of the ALT_USB_DEV_DIEPCTL7_MPS register field. */
68890 #define ALT_USB_DEV_DIEPCTL7_MPS_RESET 0x0
68891 /* Extracts the ALT_USB_DEV_DIEPCTL7_MPS field value from a register. */
68892 #define ALT_USB_DEV_DIEPCTL7_MPS_GET(value) (((value) & 0x000007ff) >> 0)
68893 /* Produces a ALT_USB_DEV_DIEPCTL7_MPS register field value suitable for setting the register. */
68894 #define ALT_USB_DEV_DIEPCTL7_MPS_SET(value) (((value) << 0) & 0x000007ff)
68895 
68896 /*
68897  * Field : USB Active Endpoint - usbactep
68898  *
68899  * Indicates whether this endpoint is active in the current configuration and
68900  * interface. The core clears this bit for all endpoints (other than EP 0) after
68901  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
68902  * commands, the application must program endpoint registers accordingly and set
68903  * this bit.
68904  *
68905  * Field Enumeration Values:
68906  *
68907  * Enum | Value | Description
68908  * :-------------------------------------|:------|:--------------------
68909  * ALT_USB_DEV_DIEPCTL7_USBACTEP_E_DISD | 0x0 | Not Active
68910  * ALT_USB_DEV_DIEPCTL7_USBACTEP_E_END | 0x1 | USB Active Endpoint
68911  *
68912  * Field Access Macros:
68913  *
68914  */
68915 /*
68916  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_USBACTEP
68917  *
68918  * Not Active
68919  */
68920 #define ALT_USB_DEV_DIEPCTL7_USBACTEP_E_DISD 0x0
68921 /*
68922  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_USBACTEP
68923  *
68924  * USB Active Endpoint
68925  */
68926 #define ALT_USB_DEV_DIEPCTL7_USBACTEP_E_END 0x1
68927 
68928 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_USBACTEP register field. */
68929 #define ALT_USB_DEV_DIEPCTL7_USBACTEP_LSB 15
68930 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_USBACTEP register field. */
68931 #define ALT_USB_DEV_DIEPCTL7_USBACTEP_MSB 15
68932 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_USBACTEP register field. */
68933 #define ALT_USB_DEV_DIEPCTL7_USBACTEP_WIDTH 1
68934 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_USBACTEP register field value. */
68935 #define ALT_USB_DEV_DIEPCTL7_USBACTEP_SET_MSK 0x00008000
68936 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_USBACTEP register field value. */
68937 #define ALT_USB_DEV_DIEPCTL7_USBACTEP_CLR_MSK 0xffff7fff
68938 /* The reset value of the ALT_USB_DEV_DIEPCTL7_USBACTEP register field. */
68939 #define ALT_USB_DEV_DIEPCTL7_USBACTEP_RESET 0x0
68940 /* Extracts the ALT_USB_DEV_DIEPCTL7_USBACTEP field value from a register. */
68941 #define ALT_USB_DEV_DIEPCTL7_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
68942 /* Produces a ALT_USB_DEV_DIEPCTL7_USBACTEP register field value suitable for setting the register. */
68943 #define ALT_USB_DEV_DIEPCTL7_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
68944 
68945 /*
68946  * Field : Endpoint Data PID - dpid
68947  *
68948  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
68949  * packet to be received or transmitted on this endpoint. The application must
68950  * program the PID of the first packet to be received or transmitted on this
68951  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
68952  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
68953  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
68954  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
68955  * DMA mode:
68956  *
68957  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
68958  * number in which the core transmits/receives isochronous data for this endpoint.
68959  * The application must program the even/odd (micro) frame number in which it
68960  * intends to transmit/receive isochronous data for this endpoint using the
68961  * SetEvnFr and SetOddFr fields in this register.
68962  *
68963  * 0: Even (micro)frame
68964  *
68965  * 1: Odd (micro)frame
68966  *
68967  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
68968  * number in which to send data is provided in the transmit descriptor structure.
68969  * The frame in which data is received is updated in receive descriptor structure.
68970  *
68971  * Field Enumeration Values:
68972  *
68973  * Enum | Value | Description
68974  * :----------------------------------|:------|:-----------------------------
68975  * ALT_USB_DEV_DIEPCTL7_DPID_E_INACT | 0x0 | Endpoint Data PID not active
68976  * ALT_USB_DEV_DIEPCTL7_DPID_E_ACT | 0x1 | Endpoint Data PID active
68977  *
68978  * Field Access Macros:
68979  *
68980  */
68981 /*
68982  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_DPID
68983  *
68984  * Endpoint Data PID not active
68985  */
68986 #define ALT_USB_DEV_DIEPCTL7_DPID_E_INACT 0x0
68987 /*
68988  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_DPID
68989  *
68990  * Endpoint Data PID active
68991  */
68992 #define ALT_USB_DEV_DIEPCTL7_DPID_E_ACT 0x1
68993 
68994 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_DPID register field. */
68995 #define ALT_USB_DEV_DIEPCTL7_DPID_LSB 16
68996 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_DPID register field. */
68997 #define ALT_USB_DEV_DIEPCTL7_DPID_MSB 16
68998 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_DPID register field. */
68999 #define ALT_USB_DEV_DIEPCTL7_DPID_WIDTH 1
69000 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_DPID register field value. */
69001 #define ALT_USB_DEV_DIEPCTL7_DPID_SET_MSK 0x00010000
69002 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_DPID register field value. */
69003 #define ALT_USB_DEV_DIEPCTL7_DPID_CLR_MSK 0xfffeffff
69004 /* The reset value of the ALT_USB_DEV_DIEPCTL7_DPID register field. */
69005 #define ALT_USB_DEV_DIEPCTL7_DPID_RESET 0x0
69006 /* Extracts the ALT_USB_DEV_DIEPCTL7_DPID field value from a register. */
69007 #define ALT_USB_DEV_DIEPCTL7_DPID_GET(value) (((value) & 0x00010000) >> 16)
69008 /* Produces a ALT_USB_DEV_DIEPCTL7_DPID register field value suitable for setting the register. */
69009 #define ALT_USB_DEV_DIEPCTL7_DPID_SET(value) (((value) << 16) & 0x00010000)
69010 
69011 /*
69012  * Field : NAK Status - naksts
69013  *
69014  * When either the application or the core sets this bit:
69015  *
69016  * * The core stops receiving any data on an OUT endpoint, even if there is space
69017  * in the RxFIFO to accommodate the incoming packet.
69018  *
69019  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
69020  * IN endpoint, even if there data is available in the TxFIFO.
69021  *
69022  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
69023  * even if there data is available in the TxFIFO.
69024  *
69025  * Irrespective of this bit's setting, the core always responds to SETUP data
69026  * packets with an ACK handshake.
69027  *
69028  * Field Enumeration Values:
69029  *
69030  * Enum | Value | Description
69031  * :-------------------------------------|:------|:------------------------------------------------
69032  * ALT_USB_DEV_DIEPCTL7_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
69033  * : | | based on the FIFO status
69034  * ALT_USB_DEV_DIEPCTL7_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
69035  * : | | endpoint
69036  *
69037  * Field Access Macros:
69038  *
69039  */
69040 /*
69041  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_NAKSTS
69042  *
69043  * The core is transmitting non-NAK handshakes based on the FIFO status
69044  */
69045 #define ALT_USB_DEV_DIEPCTL7_NAKSTS_E_NONNAK 0x0
69046 /*
69047  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_NAKSTS
69048  *
69049  * The core is transmitting NAK handshakes on this endpoint
69050  */
69051 #define ALT_USB_DEV_DIEPCTL7_NAKSTS_E_NAK 0x1
69052 
69053 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_NAKSTS register field. */
69054 #define ALT_USB_DEV_DIEPCTL7_NAKSTS_LSB 17
69055 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_NAKSTS register field. */
69056 #define ALT_USB_DEV_DIEPCTL7_NAKSTS_MSB 17
69057 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_NAKSTS register field. */
69058 #define ALT_USB_DEV_DIEPCTL7_NAKSTS_WIDTH 1
69059 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_NAKSTS register field value. */
69060 #define ALT_USB_DEV_DIEPCTL7_NAKSTS_SET_MSK 0x00020000
69061 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_NAKSTS register field value. */
69062 #define ALT_USB_DEV_DIEPCTL7_NAKSTS_CLR_MSK 0xfffdffff
69063 /* The reset value of the ALT_USB_DEV_DIEPCTL7_NAKSTS register field. */
69064 #define ALT_USB_DEV_DIEPCTL7_NAKSTS_RESET 0x0
69065 /* Extracts the ALT_USB_DEV_DIEPCTL7_NAKSTS field value from a register. */
69066 #define ALT_USB_DEV_DIEPCTL7_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
69067 /* Produces a ALT_USB_DEV_DIEPCTL7_NAKSTS register field value suitable for setting the register. */
69068 #define ALT_USB_DEV_DIEPCTL7_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
69069 
69070 /*
69071  * Field : Endpoint Type - eptype
69072  *
69073  * This is the transfer type supported by this logical endpoint.
69074  *
69075  * Field Enumeration Values:
69076  *
69077  * Enum | Value | Description
69078  * :------------------------------------------|:------|:------------
69079  * ALT_USB_DEV_DIEPCTL7_EPTYPE_E_CTL | 0x0 | Control
69080  * ALT_USB_DEV_DIEPCTL7_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
69081  * ALT_USB_DEV_DIEPCTL7_EPTYPE_E_BULK | 0x2 | Bulk
69082  * ALT_USB_DEV_DIEPCTL7_EPTYPE_E_INTERRUP | 0x3 | Interrupt
69083  *
69084  * Field Access Macros:
69085  *
69086  */
69087 /*
69088  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_EPTYPE
69089  *
69090  * Control
69091  */
69092 #define ALT_USB_DEV_DIEPCTL7_EPTYPE_E_CTL 0x0
69093 /*
69094  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_EPTYPE
69095  *
69096  * Isochronous
69097  */
69098 #define ALT_USB_DEV_DIEPCTL7_EPTYPE_E_ISOCHRONOUS 0x1
69099 /*
69100  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_EPTYPE
69101  *
69102  * Bulk
69103  */
69104 #define ALT_USB_DEV_DIEPCTL7_EPTYPE_E_BULK 0x2
69105 /*
69106  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_EPTYPE
69107  *
69108  * Interrupt
69109  */
69110 #define ALT_USB_DEV_DIEPCTL7_EPTYPE_E_INTERRUP 0x3
69111 
69112 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_EPTYPE register field. */
69113 #define ALT_USB_DEV_DIEPCTL7_EPTYPE_LSB 18
69114 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_EPTYPE register field. */
69115 #define ALT_USB_DEV_DIEPCTL7_EPTYPE_MSB 19
69116 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_EPTYPE register field. */
69117 #define ALT_USB_DEV_DIEPCTL7_EPTYPE_WIDTH 2
69118 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_EPTYPE register field value. */
69119 #define ALT_USB_DEV_DIEPCTL7_EPTYPE_SET_MSK 0x000c0000
69120 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_EPTYPE register field value. */
69121 #define ALT_USB_DEV_DIEPCTL7_EPTYPE_CLR_MSK 0xfff3ffff
69122 /* The reset value of the ALT_USB_DEV_DIEPCTL7_EPTYPE register field. */
69123 #define ALT_USB_DEV_DIEPCTL7_EPTYPE_RESET 0x0
69124 /* Extracts the ALT_USB_DEV_DIEPCTL7_EPTYPE field value from a register. */
69125 #define ALT_USB_DEV_DIEPCTL7_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
69126 /* Produces a ALT_USB_DEV_DIEPCTL7_EPTYPE register field value suitable for setting the register. */
69127 #define ALT_USB_DEV_DIEPCTL7_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
69128 
69129 /*
69130  * Field : STALL Handshake - stall
69131  *
69132  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
69133  * application sets this bit to stall all tokens from the USB host to this
69134  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
69135  * along with this bit, the STALL bit takes priority. Only the application can
69136  * clear this bit, never the core. Applies to control endpoints only. The
69137  * application can only set this bit, and the core clears it, when a SETUP token is
69138  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
69139  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
69140  * of this bit's setting, the core always responds to SETUP data packets with an
69141  * ACK handshake.
69142  *
69143  * Field Enumeration Values:
69144  *
69145  * Enum | Value | Description
69146  * :-----------------------------------|:------|:----------------------------
69147  * ALT_USB_DEV_DIEPCTL7_STALL_E_INACT | 0x0 | STALL All Tokens not active
69148  * ALT_USB_DEV_DIEPCTL7_STALL_E_ACT | 0x1 | STALL All Tokens active
69149  *
69150  * Field Access Macros:
69151  *
69152  */
69153 /*
69154  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_STALL
69155  *
69156  * STALL All Tokens not active
69157  */
69158 #define ALT_USB_DEV_DIEPCTL7_STALL_E_INACT 0x0
69159 /*
69160  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_STALL
69161  *
69162  * STALL All Tokens active
69163  */
69164 #define ALT_USB_DEV_DIEPCTL7_STALL_E_ACT 0x1
69165 
69166 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_STALL register field. */
69167 #define ALT_USB_DEV_DIEPCTL7_STALL_LSB 21
69168 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_STALL register field. */
69169 #define ALT_USB_DEV_DIEPCTL7_STALL_MSB 21
69170 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_STALL register field. */
69171 #define ALT_USB_DEV_DIEPCTL7_STALL_WIDTH 1
69172 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_STALL register field value. */
69173 #define ALT_USB_DEV_DIEPCTL7_STALL_SET_MSK 0x00200000
69174 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_STALL register field value. */
69175 #define ALT_USB_DEV_DIEPCTL7_STALL_CLR_MSK 0xffdfffff
69176 /* The reset value of the ALT_USB_DEV_DIEPCTL7_STALL register field. */
69177 #define ALT_USB_DEV_DIEPCTL7_STALL_RESET 0x0
69178 /* Extracts the ALT_USB_DEV_DIEPCTL7_STALL field value from a register. */
69179 #define ALT_USB_DEV_DIEPCTL7_STALL_GET(value) (((value) & 0x00200000) >> 21)
69180 /* Produces a ALT_USB_DEV_DIEPCTL7_STALL register field value suitable for setting the register. */
69181 #define ALT_USB_DEV_DIEPCTL7_STALL_SET(value) (((value) << 21) & 0x00200000)
69182 
69183 /*
69184  * Field : TxFIFO Number - txfnum
69185  *
69186  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
69187  * endpoints must map this to the corresponding Periodic TxFIFO number.
69188  *
69189  * 4'h0: Non-Periodic TxFIFO
69190  *
69191  * Others: Specified Periodic TxFIFO.number
69192  *
69193  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
69194  * applications such as mass storage. The core treats an IN endpoint as a non-
69195  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
69196  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
69197  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
69198  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
69199  * This field is valid only for IN endpoints.
69200  *
69201  * Field Access Macros:
69202  *
69203  */
69204 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_TXFNUM register field. */
69205 #define ALT_USB_DEV_DIEPCTL7_TXFNUM_LSB 22
69206 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_TXFNUM register field. */
69207 #define ALT_USB_DEV_DIEPCTL7_TXFNUM_MSB 25
69208 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_TXFNUM register field. */
69209 #define ALT_USB_DEV_DIEPCTL7_TXFNUM_WIDTH 4
69210 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_TXFNUM register field value. */
69211 #define ALT_USB_DEV_DIEPCTL7_TXFNUM_SET_MSK 0x03c00000
69212 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_TXFNUM register field value. */
69213 #define ALT_USB_DEV_DIEPCTL7_TXFNUM_CLR_MSK 0xfc3fffff
69214 /* The reset value of the ALT_USB_DEV_DIEPCTL7_TXFNUM register field. */
69215 #define ALT_USB_DEV_DIEPCTL7_TXFNUM_RESET 0x0
69216 /* Extracts the ALT_USB_DEV_DIEPCTL7_TXFNUM field value from a register. */
69217 #define ALT_USB_DEV_DIEPCTL7_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
69218 /* Produces a ALT_USB_DEV_DIEPCTL7_TXFNUM register field value suitable for setting the register. */
69219 #define ALT_USB_DEV_DIEPCTL7_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
69220 
69221 /*
69222  * Field : Clear NAK - cnak
69223  *
69224  * A write to this bit clears the NAK bit for the endpoint.
69225  *
69226  * Field Enumeration Values:
69227  *
69228  * Enum | Value | Description
69229  * :----------------------------------|:------|:-------------
69230  * ALT_USB_DEV_DIEPCTL7_CNAK_E_INACT | 0x0 | No Clear NAK
69231  * ALT_USB_DEV_DIEPCTL7_CNAK_E_ACT | 0x1 | Clear NAK
69232  *
69233  * Field Access Macros:
69234  *
69235  */
69236 /*
69237  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_CNAK
69238  *
69239  * No Clear NAK
69240  */
69241 #define ALT_USB_DEV_DIEPCTL7_CNAK_E_INACT 0x0
69242 /*
69243  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_CNAK
69244  *
69245  * Clear NAK
69246  */
69247 #define ALT_USB_DEV_DIEPCTL7_CNAK_E_ACT 0x1
69248 
69249 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_CNAK register field. */
69250 #define ALT_USB_DEV_DIEPCTL7_CNAK_LSB 26
69251 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_CNAK register field. */
69252 #define ALT_USB_DEV_DIEPCTL7_CNAK_MSB 26
69253 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_CNAK register field. */
69254 #define ALT_USB_DEV_DIEPCTL7_CNAK_WIDTH 1
69255 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_CNAK register field value. */
69256 #define ALT_USB_DEV_DIEPCTL7_CNAK_SET_MSK 0x04000000
69257 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_CNAK register field value. */
69258 #define ALT_USB_DEV_DIEPCTL7_CNAK_CLR_MSK 0xfbffffff
69259 /* The reset value of the ALT_USB_DEV_DIEPCTL7_CNAK register field. */
69260 #define ALT_USB_DEV_DIEPCTL7_CNAK_RESET 0x0
69261 /* Extracts the ALT_USB_DEV_DIEPCTL7_CNAK field value from a register. */
69262 #define ALT_USB_DEV_DIEPCTL7_CNAK_GET(value) (((value) & 0x04000000) >> 26)
69263 /* Produces a ALT_USB_DEV_DIEPCTL7_CNAK register field value suitable for setting the register. */
69264 #define ALT_USB_DEV_DIEPCTL7_CNAK_SET(value) (((value) << 26) & 0x04000000)
69265 
69266 /*
69267  * Field : Set NAK - snak
69268  *
69269  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
69270  * application can control the transmission of NAK handshakes on an endpoint. The
69271  * core can also Set this bit for an endpoint after a SETUP packet is received on
69272  * that endpoint.
69273  *
69274  * Field Enumeration Values:
69275  *
69276  * Enum | Value | Description
69277  * :----------------------------------|:------|:------------
69278  * ALT_USB_DEV_DIEPCTL7_SNAK_E_INACT | 0x0 | No Set NAK
69279  * ALT_USB_DEV_DIEPCTL7_SNAK_E_ACT | 0x1 | Set NAK
69280  *
69281  * Field Access Macros:
69282  *
69283  */
69284 /*
69285  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_SNAK
69286  *
69287  * No Set NAK
69288  */
69289 #define ALT_USB_DEV_DIEPCTL7_SNAK_E_INACT 0x0
69290 /*
69291  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_SNAK
69292  *
69293  * Set NAK
69294  */
69295 #define ALT_USB_DEV_DIEPCTL7_SNAK_E_ACT 0x1
69296 
69297 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_SNAK register field. */
69298 #define ALT_USB_DEV_DIEPCTL7_SNAK_LSB 27
69299 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_SNAK register field. */
69300 #define ALT_USB_DEV_DIEPCTL7_SNAK_MSB 27
69301 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_SNAK register field. */
69302 #define ALT_USB_DEV_DIEPCTL7_SNAK_WIDTH 1
69303 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_SNAK register field value. */
69304 #define ALT_USB_DEV_DIEPCTL7_SNAK_SET_MSK 0x08000000
69305 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_SNAK register field value. */
69306 #define ALT_USB_DEV_DIEPCTL7_SNAK_CLR_MSK 0xf7ffffff
69307 /* The reset value of the ALT_USB_DEV_DIEPCTL7_SNAK register field. */
69308 #define ALT_USB_DEV_DIEPCTL7_SNAK_RESET 0x0
69309 /* Extracts the ALT_USB_DEV_DIEPCTL7_SNAK field value from a register. */
69310 #define ALT_USB_DEV_DIEPCTL7_SNAK_GET(value) (((value) & 0x08000000) >> 27)
69311 /* Produces a ALT_USB_DEV_DIEPCTL7_SNAK register field value suitable for setting the register. */
69312 #define ALT_USB_DEV_DIEPCTL7_SNAK_SET(value) (((value) << 27) & 0x08000000)
69313 
69314 /*
69315  * Field : Set DATA0 PID - setd0pid
69316  *
69317  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
69318  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
69319  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
69320  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
69321  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
69322  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
69323  * mode is enabled, this field is reserved. The frame number in which to send data
69324  * is in the transmit descriptor structure. The frame in which to receive data is
69325  * updated in receive descriptor structure.
69326  *
69327  * Field Enumeration Values:
69328  *
69329  * Enum | Value | Description
69330  * :-------------------------------------|:------|:----------------------------
69331  * ALT_USB_DEV_DIEPCTL7_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
69332  * ALT_USB_DEV_DIEPCTL7_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
69333  *
69334  * Field Access Macros:
69335  *
69336  */
69337 /*
69338  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_SETD0PID
69339  *
69340  * Disables Set DATA0 PID
69341  */
69342 #define ALT_USB_DEV_DIEPCTL7_SETD0PID_E_DISD 0x0
69343 /*
69344  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_SETD0PID
69345  *
69346  * Endpoint Data PID to DATA0)
69347  */
69348 #define ALT_USB_DEV_DIEPCTL7_SETD0PID_E_END 0x1
69349 
69350 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_SETD0PID register field. */
69351 #define ALT_USB_DEV_DIEPCTL7_SETD0PID_LSB 28
69352 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_SETD0PID register field. */
69353 #define ALT_USB_DEV_DIEPCTL7_SETD0PID_MSB 28
69354 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_SETD0PID register field. */
69355 #define ALT_USB_DEV_DIEPCTL7_SETD0PID_WIDTH 1
69356 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_SETD0PID register field value. */
69357 #define ALT_USB_DEV_DIEPCTL7_SETD0PID_SET_MSK 0x10000000
69358 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_SETD0PID register field value. */
69359 #define ALT_USB_DEV_DIEPCTL7_SETD0PID_CLR_MSK 0xefffffff
69360 /* The reset value of the ALT_USB_DEV_DIEPCTL7_SETD0PID register field. */
69361 #define ALT_USB_DEV_DIEPCTL7_SETD0PID_RESET 0x0
69362 /* Extracts the ALT_USB_DEV_DIEPCTL7_SETD0PID field value from a register. */
69363 #define ALT_USB_DEV_DIEPCTL7_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
69364 /* Produces a ALT_USB_DEV_DIEPCTL7_SETD0PID register field value suitable for setting the register. */
69365 #define ALT_USB_DEV_DIEPCTL7_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
69366 
69367 /*
69368  * Field : Set DATA1 PID - setd1pid
69369  *
69370  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
69371  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
69372  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
69373  *
69374  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
69375  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
69376  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
69377  *
69378  * Field Enumeration Values:
69379  *
69380  * Enum | Value | Description
69381  * :-------------------------------------|:------|:-----------------------
69382  * ALT_USB_DEV_DIEPCTL7_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
69383  * ALT_USB_DEV_DIEPCTL7_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
69384  *
69385  * Field Access Macros:
69386  *
69387  */
69388 /*
69389  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_SETD1PID
69390  *
69391  * Disables Set DATA1 PID
69392  */
69393 #define ALT_USB_DEV_DIEPCTL7_SETD1PID_E_DISD 0x0
69394 /*
69395  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_SETD1PID
69396  *
69397  * Enables Set DATA1 PID
69398  */
69399 #define ALT_USB_DEV_DIEPCTL7_SETD1PID_E_END 0x1
69400 
69401 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_SETD1PID register field. */
69402 #define ALT_USB_DEV_DIEPCTL7_SETD1PID_LSB 29
69403 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_SETD1PID register field. */
69404 #define ALT_USB_DEV_DIEPCTL7_SETD1PID_MSB 29
69405 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_SETD1PID register field. */
69406 #define ALT_USB_DEV_DIEPCTL7_SETD1PID_WIDTH 1
69407 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_SETD1PID register field value. */
69408 #define ALT_USB_DEV_DIEPCTL7_SETD1PID_SET_MSK 0x20000000
69409 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_SETD1PID register field value. */
69410 #define ALT_USB_DEV_DIEPCTL7_SETD1PID_CLR_MSK 0xdfffffff
69411 /* The reset value of the ALT_USB_DEV_DIEPCTL7_SETD1PID register field. */
69412 #define ALT_USB_DEV_DIEPCTL7_SETD1PID_RESET 0x0
69413 /* Extracts the ALT_USB_DEV_DIEPCTL7_SETD1PID field value from a register. */
69414 #define ALT_USB_DEV_DIEPCTL7_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
69415 /* Produces a ALT_USB_DEV_DIEPCTL7_SETD1PID register field value suitable for setting the register. */
69416 #define ALT_USB_DEV_DIEPCTL7_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
69417 
69418 /*
69419  * Field : Endpoint Disable - epdis
69420  *
69421  * Applies to IN and OUT endpoints. The application sets this bit to stop
69422  * transmitting/receiving data on an endpoint, even before the transfer for that
69423  * endpoint is complete. The application must wait for the Endpoint Disabled
69424  * interrupt before treating the endpoint as disabled. The core clears this bit
69425  * before setting the Endpoint Disabled interrupt. The application must set this
69426  * bit only if Endpoint Enable is already set for this endpoint.
69427  *
69428  * Field Enumeration Values:
69429  *
69430  * Enum | Value | Description
69431  * :-----------------------------------|:------|:--------------------
69432  * ALT_USB_DEV_DIEPCTL7_EPDIS_E_INACT | 0x0 | No Endpoint Disable
69433  * ALT_USB_DEV_DIEPCTL7_EPDIS_E_ACT | 0x1 | Endpoint Disable
69434  *
69435  * Field Access Macros:
69436  *
69437  */
69438 /*
69439  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_EPDIS
69440  *
69441  * No Endpoint Disable
69442  */
69443 #define ALT_USB_DEV_DIEPCTL7_EPDIS_E_INACT 0x0
69444 /*
69445  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_EPDIS
69446  *
69447  * Endpoint Disable
69448  */
69449 #define ALT_USB_DEV_DIEPCTL7_EPDIS_E_ACT 0x1
69450 
69451 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_EPDIS register field. */
69452 #define ALT_USB_DEV_DIEPCTL7_EPDIS_LSB 30
69453 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_EPDIS register field. */
69454 #define ALT_USB_DEV_DIEPCTL7_EPDIS_MSB 30
69455 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_EPDIS register field. */
69456 #define ALT_USB_DEV_DIEPCTL7_EPDIS_WIDTH 1
69457 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_EPDIS register field value. */
69458 #define ALT_USB_DEV_DIEPCTL7_EPDIS_SET_MSK 0x40000000
69459 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_EPDIS register field value. */
69460 #define ALT_USB_DEV_DIEPCTL7_EPDIS_CLR_MSK 0xbfffffff
69461 /* The reset value of the ALT_USB_DEV_DIEPCTL7_EPDIS register field. */
69462 #define ALT_USB_DEV_DIEPCTL7_EPDIS_RESET 0x0
69463 /* Extracts the ALT_USB_DEV_DIEPCTL7_EPDIS field value from a register. */
69464 #define ALT_USB_DEV_DIEPCTL7_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
69465 /* Produces a ALT_USB_DEV_DIEPCTL7_EPDIS register field value suitable for setting the register. */
69466 #define ALT_USB_DEV_DIEPCTL7_EPDIS_SET(value) (((value) << 30) & 0x40000000)
69467 
69468 /*
69469  * Field : Endpoint Enable - epena
69470  *
69471  * Applies to IN and OUT endpoints.
69472  *
69473  * * When Scatter/Gather DMA mode is enabled,
69474  *
69475  * * for IN endpoints this bit indicates that the descriptor structure and data
69476  * buffer with data ready to transmit is setup.
69477  *
69478  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
69479  * receive data is setup.
69480  *
69481  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
69482  * mode:
69483  *
69484  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
69485  * the endpoint.
69486  *
69487  * * for OUT endpoints, this bit indicates that the application has allocated the
69488  * memory to start receiving data from the USB.
69489  *
69490  * * The core clears this bit before setting any of the following interrupts on
69491  * this endpoint:
69492  *
69493  * * SETUP Phase Done
69494  *
69495  * * Endpoint Disabled
69496  *
69497  * * Transfer Completed
69498  *
69499  * for control endpoints in DMA mode, this bit must be set to be able to transfer
69500  * SETUP data packets in memory.
69501  *
69502  * Field Enumeration Values:
69503  *
69504  * Enum | Value | Description
69505  * :-----------------------------------|:------|:-------------------------
69506  * ALT_USB_DEV_DIEPCTL7_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
69507  * ALT_USB_DEV_DIEPCTL7_EPENA_E_ACT | 0x1 | Endpoint Enable active
69508  *
69509  * Field Access Macros:
69510  *
69511  */
69512 /*
69513  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_EPENA
69514  *
69515  * Endpoint Enable inactive
69516  */
69517 #define ALT_USB_DEV_DIEPCTL7_EPENA_E_INACT 0x0
69518 /*
69519  * Enumerated value for register field ALT_USB_DEV_DIEPCTL7_EPENA
69520  *
69521  * Endpoint Enable active
69522  */
69523 #define ALT_USB_DEV_DIEPCTL7_EPENA_E_ACT 0x1
69524 
69525 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL7_EPENA register field. */
69526 #define ALT_USB_DEV_DIEPCTL7_EPENA_LSB 31
69527 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL7_EPENA register field. */
69528 #define ALT_USB_DEV_DIEPCTL7_EPENA_MSB 31
69529 /* The width in bits of the ALT_USB_DEV_DIEPCTL7_EPENA register field. */
69530 #define ALT_USB_DEV_DIEPCTL7_EPENA_WIDTH 1
69531 /* The mask used to set the ALT_USB_DEV_DIEPCTL7_EPENA register field value. */
69532 #define ALT_USB_DEV_DIEPCTL7_EPENA_SET_MSK 0x80000000
69533 /* The mask used to clear the ALT_USB_DEV_DIEPCTL7_EPENA register field value. */
69534 #define ALT_USB_DEV_DIEPCTL7_EPENA_CLR_MSK 0x7fffffff
69535 /* The reset value of the ALT_USB_DEV_DIEPCTL7_EPENA register field. */
69536 #define ALT_USB_DEV_DIEPCTL7_EPENA_RESET 0x0
69537 /* Extracts the ALT_USB_DEV_DIEPCTL7_EPENA field value from a register. */
69538 #define ALT_USB_DEV_DIEPCTL7_EPENA_GET(value) (((value) & 0x80000000) >> 31)
69539 /* Produces a ALT_USB_DEV_DIEPCTL7_EPENA register field value suitable for setting the register. */
69540 #define ALT_USB_DEV_DIEPCTL7_EPENA_SET(value) (((value) << 31) & 0x80000000)
69541 
69542 #ifndef __ASSEMBLY__
69543 /*
69544  * WARNING: The C register and register group struct declarations are provided for
69545  * convenience and illustrative purposes. They should, however, be used with
69546  * caution as the C language standard provides no guarantees about the alignment or
69547  * atomicity of device memory accesses. The recommended practice for writing
69548  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
69549  * alt_write_word() functions.
69550  *
69551  * The struct declaration for register ALT_USB_DEV_DIEPCTL7.
69552  */
69553 struct ALT_USB_DEV_DIEPCTL7_s
69554 {
69555  uint32_t mps : 11; /* Maximum Packet Size */
69556  uint32_t : 4; /* *UNDEFINED* */
69557  uint32_t usbactep : 1; /* USB Active Endpoint */
69558  const uint32_t dpid : 1; /* Endpoint Data PID */
69559  const uint32_t naksts : 1; /* NAK Status */
69560  uint32_t eptype : 2; /* Endpoint Type */
69561  uint32_t : 1; /* *UNDEFINED* */
69562  const uint32_t stall : 1; /* STALL Handshake */
69563  uint32_t txfnum : 4; /* TxFIFO Number */
69564  uint32_t cnak : 1; /* Clear NAK */
69565  uint32_t snak : 1; /* Set NAK */
69566  uint32_t setd0pid : 1; /* Set DATA0 PID */
69567  uint32_t setd1pid : 1; /* Set DATA1 PID */
69568  const uint32_t epdis : 1; /* Endpoint Disable */
69569  const uint32_t epena : 1; /* Endpoint Enable */
69570 };
69571 
69572 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL7. */
69573 typedef volatile struct ALT_USB_DEV_DIEPCTL7_s ALT_USB_DEV_DIEPCTL7_t;
69574 #endif /* __ASSEMBLY__ */
69575 
69576 /* The byte offset of the ALT_USB_DEV_DIEPCTL7 register from the beginning of the component. */
69577 #define ALT_USB_DEV_DIEPCTL7_OFST 0x1e0
69578 /* The address of the ALT_USB_DEV_DIEPCTL7 register. */
69579 #define ALT_USB_DEV_DIEPCTL7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL7_OFST))
69580 
69581 /*
69582  * Register : Device IN Endpoint 7 Interrupt Register - diepint7
69583  *
69584  * This register indicates the status of an endpoint with respect to USB- and AHB-
69585  * related events. The application must read this register when the OUT Endpoints
69586  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
69587  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
69588  * can read this register, it must first read the Device All Endpoints Interrupt
69589  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
69590  * Interrupt register. The application must clear the appropriate bit in this
69591  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
69592  *
69593  * Register Layout
69594  *
69595  * Bits | Access | Reset | Description
69596  * :--------|:-------|:------|:---------------------------------------
69597  * [0] | R | 0x0 | Transfer Completed Interrupt
69598  * [1] | R | 0x0 | Endpoint Disabled Interrupt
69599  * [2] | R | 0x0 | AHB Error
69600  * [3] | R | 0x0 | Timeout Condition
69601  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
69602  * [5] | R | 0x0 | IN Token Received with EP Mismatch
69603  * [6] | R | 0x0 | IN Endpoint NAK Effective
69604  * [7] | R | 0x1 | Transmit FIFO Empty
69605  * [8] | R | 0x0 | Fifo Underrun
69606  * [9] | R | 0x0 | BNA Interrupt
69607  * [10] | ??? | 0x0 | *UNDEFINED*
69608  * [11] | R | 0x0 | Packet Drop Status
69609  * [12] | R | 0x0 | BbleErr Interrupt
69610  * [13] | R | 0x0 | NAK Interrupt
69611  * [14] | R | 0x0 | NYET Interrupt
69612  * [31:15] | ??? | 0x0 | *UNDEFINED*
69613  *
69614  */
69615 /*
69616  * Field : Transfer Completed Interrupt - xfercompl
69617  *
69618  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
69619  *
69620  * * for IN endpoint this field indicates that the requested data from the
69621  * descriptor is moved from external system memory to internal FIFO.
69622  *
69623  * * for OUT endpoint this field indicates that the requested data from the
69624  * internal FIFO is moved to external system memory. This interrupt is generated
69625  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
69626  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
69627  * this field indicates that the programmed transfer is complete on the AHB as
69628  * well as on the USB, for this endpoint.
69629  *
69630  * Field Enumeration Values:
69631  *
69632  * Enum | Value | Description
69633  * :---------------------------------------|:------|:-----------------------------
69634  * ALT_USB_DEV_DIEPINT7_XFERCOMPL_E_INACT | 0x0 | No Interrupt
69635  * ALT_USB_DEV_DIEPINT7_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
69636  *
69637  * Field Access Macros:
69638  *
69639  */
69640 /*
69641  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_XFERCOMPL
69642  *
69643  * No Interrupt
69644  */
69645 #define ALT_USB_DEV_DIEPINT7_XFERCOMPL_E_INACT 0x0
69646 /*
69647  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_XFERCOMPL
69648  *
69649  * Transfer Completed Interrupt
69650  */
69651 #define ALT_USB_DEV_DIEPINT7_XFERCOMPL_E_ACT 0x1
69652 
69653 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_XFERCOMPL register field. */
69654 #define ALT_USB_DEV_DIEPINT7_XFERCOMPL_LSB 0
69655 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_XFERCOMPL register field. */
69656 #define ALT_USB_DEV_DIEPINT7_XFERCOMPL_MSB 0
69657 /* The width in bits of the ALT_USB_DEV_DIEPINT7_XFERCOMPL register field. */
69658 #define ALT_USB_DEV_DIEPINT7_XFERCOMPL_WIDTH 1
69659 /* The mask used to set the ALT_USB_DEV_DIEPINT7_XFERCOMPL register field value. */
69660 #define ALT_USB_DEV_DIEPINT7_XFERCOMPL_SET_MSK 0x00000001
69661 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_XFERCOMPL register field value. */
69662 #define ALT_USB_DEV_DIEPINT7_XFERCOMPL_CLR_MSK 0xfffffffe
69663 /* The reset value of the ALT_USB_DEV_DIEPINT7_XFERCOMPL register field. */
69664 #define ALT_USB_DEV_DIEPINT7_XFERCOMPL_RESET 0x0
69665 /* Extracts the ALT_USB_DEV_DIEPINT7_XFERCOMPL field value from a register. */
69666 #define ALT_USB_DEV_DIEPINT7_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
69667 /* Produces a ALT_USB_DEV_DIEPINT7_XFERCOMPL register field value suitable for setting the register. */
69668 #define ALT_USB_DEV_DIEPINT7_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
69669 
69670 /*
69671  * Field : Endpoint Disabled Interrupt - epdisbld
69672  *
69673  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
69674  * disabled per the application's request.
69675  *
69676  * Field Enumeration Values:
69677  *
69678  * Enum | Value | Description
69679  * :--------------------------------------|:------|:----------------------------
69680  * ALT_USB_DEV_DIEPINT7_EPDISBLD_E_INACT | 0x0 | No Interrupt
69681  * ALT_USB_DEV_DIEPINT7_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
69682  *
69683  * Field Access Macros:
69684  *
69685  */
69686 /*
69687  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_EPDISBLD
69688  *
69689  * No Interrupt
69690  */
69691 #define ALT_USB_DEV_DIEPINT7_EPDISBLD_E_INACT 0x0
69692 /*
69693  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_EPDISBLD
69694  *
69695  * Endpoint Disabled Interrupt
69696  */
69697 #define ALT_USB_DEV_DIEPINT7_EPDISBLD_E_ACT 0x1
69698 
69699 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_EPDISBLD register field. */
69700 #define ALT_USB_DEV_DIEPINT7_EPDISBLD_LSB 1
69701 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_EPDISBLD register field. */
69702 #define ALT_USB_DEV_DIEPINT7_EPDISBLD_MSB 1
69703 /* The width in bits of the ALT_USB_DEV_DIEPINT7_EPDISBLD register field. */
69704 #define ALT_USB_DEV_DIEPINT7_EPDISBLD_WIDTH 1
69705 /* The mask used to set the ALT_USB_DEV_DIEPINT7_EPDISBLD register field value. */
69706 #define ALT_USB_DEV_DIEPINT7_EPDISBLD_SET_MSK 0x00000002
69707 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_EPDISBLD register field value. */
69708 #define ALT_USB_DEV_DIEPINT7_EPDISBLD_CLR_MSK 0xfffffffd
69709 /* The reset value of the ALT_USB_DEV_DIEPINT7_EPDISBLD register field. */
69710 #define ALT_USB_DEV_DIEPINT7_EPDISBLD_RESET 0x0
69711 /* Extracts the ALT_USB_DEV_DIEPINT7_EPDISBLD field value from a register. */
69712 #define ALT_USB_DEV_DIEPINT7_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
69713 /* Produces a ALT_USB_DEV_DIEPINT7_EPDISBLD register field value suitable for setting the register. */
69714 #define ALT_USB_DEV_DIEPINT7_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
69715 
69716 /*
69717  * Field : AHB Error - ahberr
69718  *
69719  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
69720  * there is an AHB error during an AHB read/write. The application can read the
69721  * corresponding endpoint DMA address register to get the error address.
69722  *
69723  * Field Enumeration Values:
69724  *
69725  * Enum | Value | Description
69726  * :------------------------------------|:------|:--------------------
69727  * ALT_USB_DEV_DIEPINT7_AHBERR_E_INACT | 0x0 | No Interrupt
69728  * ALT_USB_DEV_DIEPINT7_AHBERR_E_ACT | 0x1 | AHB Error interrupt
69729  *
69730  * Field Access Macros:
69731  *
69732  */
69733 /*
69734  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_AHBERR
69735  *
69736  * No Interrupt
69737  */
69738 #define ALT_USB_DEV_DIEPINT7_AHBERR_E_INACT 0x0
69739 /*
69740  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_AHBERR
69741  *
69742  * AHB Error interrupt
69743  */
69744 #define ALT_USB_DEV_DIEPINT7_AHBERR_E_ACT 0x1
69745 
69746 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_AHBERR register field. */
69747 #define ALT_USB_DEV_DIEPINT7_AHBERR_LSB 2
69748 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_AHBERR register field. */
69749 #define ALT_USB_DEV_DIEPINT7_AHBERR_MSB 2
69750 /* The width in bits of the ALT_USB_DEV_DIEPINT7_AHBERR register field. */
69751 #define ALT_USB_DEV_DIEPINT7_AHBERR_WIDTH 1
69752 /* The mask used to set the ALT_USB_DEV_DIEPINT7_AHBERR register field value. */
69753 #define ALT_USB_DEV_DIEPINT7_AHBERR_SET_MSK 0x00000004
69754 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_AHBERR register field value. */
69755 #define ALT_USB_DEV_DIEPINT7_AHBERR_CLR_MSK 0xfffffffb
69756 /* The reset value of the ALT_USB_DEV_DIEPINT7_AHBERR register field. */
69757 #define ALT_USB_DEV_DIEPINT7_AHBERR_RESET 0x0
69758 /* Extracts the ALT_USB_DEV_DIEPINT7_AHBERR field value from a register. */
69759 #define ALT_USB_DEV_DIEPINT7_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
69760 /* Produces a ALT_USB_DEV_DIEPINT7_AHBERR register field value suitable for setting the register. */
69761 #define ALT_USB_DEV_DIEPINT7_AHBERR_SET(value) (((value) << 2) & 0x00000004)
69762 
69763 /*
69764  * Field : Timeout Condition - timeout
69765  *
69766  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
69767  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
69768  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
69769  * detected a timeout condition on the USB for the last IN token on this endpoint.
69770  *
69771  * Field Enumeration Values:
69772  *
69773  * Enum | Value | Description
69774  * :---------------------------------|:------|:------------------
69775  * ALT_USB_DEV_DIEPINT7_TMO_E_INACT | 0x0 | No interrupt
69776  * ALT_USB_DEV_DIEPINT7_TMO_E_ACT | 0x1 | Timeout interrupy
69777  *
69778  * Field Access Macros:
69779  *
69780  */
69781 /*
69782  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_TMO
69783  *
69784  * No interrupt
69785  */
69786 #define ALT_USB_DEV_DIEPINT7_TMO_E_INACT 0x0
69787 /*
69788  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_TMO
69789  *
69790  * Timeout interrupy
69791  */
69792 #define ALT_USB_DEV_DIEPINT7_TMO_E_ACT 0x1
69793 
69794 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_TMO register field. */
69795 #define ALT_USB_DEV_DIEPINT7_TMO_LSB 3
69796 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_TMO register field. */
69797 #define ALT_USB_DEV_DIEPINT7_TMO_MSB 3
69798 /* The width in bits of the ALT_USB_DEV_DIEPINT7_TMO register field. */
69799 #define ALT_USB_DEV_DIEPINT7_TMO_WIDTH 1
69800 /* The mask used to set the ALT_USB_DEV_DIEPINT7_TMO register field value. */
69801 #define ALT_USB_DEV_DIEPINT7_TMO_SET_MSK 0x00000008
69802 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_TMO register field value. */
69803 #define ALT_USB_DEV_DIEPINT7_TMO_CLR_MSK 0xfffffff7
69804 /* The reset value of the ALT_USB_DEV_DIEPINT7_TMO register field. */
69805 #define ALT_USB_DEV_DIEPINT7_TMO_RESET 0x0
69806 /* Extracts the ALT_USB_DEV_DIEPINT7_TMO field value from a register. */
69807 #define ALT_USB_DEV_DIEPINT7_TMO_GET(value) (((value) & 0x00000008) >> 3)
69808 /* Produces a ALT_USB_DEV_DIEPINT7_TMO register field value suitable for setting the register. */
69809 #define ALT_USB_DEV_DIEPINT7_TMO_SET(value) (((value) << 3) & 0x00000008)
69810 
69811 /*
69812  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
69813  *
69814  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
69815  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
69816  * interrupt is asserted on the endpoint for which the IN token was received.
69817  *
69818  * Field Enumeration Values:
69819  *
69820  * Enum | Value | Description
69821  * :-----------------------------------------|:------|:----------------------------
69822  * ALT_USB_DEV_DIEPINT7_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
69823  * ALT_USB_DEV_DIEPINT7_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
69824  *
69825  * Field Access Macros:
69826  *
69827  */
69828 /*
69829  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_INTKNTXFEMP
69830  *
69831  * No interrupt
69832  */
69833 #define ALT_USB_DEV_DIEPINT7_INTKNTXFEMP_E_INACT 0x0
69834 /*
69835  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_INTKNTXFEMP
69836  *
69837  * IN Token Received Interrupt
69838  */
69839 #define ALT_USB_DEV_DIEPINT7_INTKNTXFEMP_E_ACT 0x1
69840 
69841 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_INTKNTXFEMP register field. */
69842 #define ALT_USB_DEV_DIEPINT7_INTKNTXFEMP_LSB 4
69843 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_INTKNTXFEMP register field. */
69844 #define ALT_USB_DEV_DIEPINT7_INTKNTXFEMP_MSB 4
69845 /* The width in bits of the ALT_USB_DEV_DIEPINT7_INTKNTXFEMP register field. */
69846 #define ALT_USB_DEV_DIEPINT7_INTKNTXFEMP_WIDTH 1
69847 /* The mask used to set the ALT_USB_DEV_DIEPINT7_INTKNTXFEMP register field value. */
69848 #define ALT_USB_DEV_DIEPINT7_INTKNTXFEMP_SET_MSK 0x00000010
69849 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_INTKNTXFEMP register field value. */
69850 #define ALT_USB_DEV_DIEPINT7_INTKNTXFEMP_CLR_MSK 0xffffffef
69851 /* The reset value of the ALT_USB_DEV_DIEPINT7_INTKNTXFEMP register field. */
69852 #define ALT_USB_DEV_DIEPINT7_INTKNTXFEMP_RESET 0x0
69853 /* Extracts the ALT_USB_DEV_DIEPINT7_INTKNTXFEMP field value from a register. */
69854 #define ALT_USB_DEV_DIEPINT7_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
69855 /* Produces a ALT_USB_DEV_DIEPINT7_INTKNTXFEMP register field value suitable for setting the register. */
69856 #define ALT_USB_DEV_DIEPINT7_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
69857 
69858 /*
69859  * Field : IN Token Received with EP Mismatch - intknepmis
69860  *
69861  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
69862  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
69863  * IN token was received. This interrupt is asserted on the endpoint for which the
69864  * IN token was received.
69865  *
69866  * Field Enumeration Values:
69867  *
69868  * Enum | Value | Description
69869  * :----------------------------------------|:------|:---------------------------------------------
69870  * ALT_USB_DEV_DIEPINT7_INTKNEPMIS_E_INACT | 0x0 | No interrupt
69871  * ALT_USB_DEV_DIEPINT7_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
69872  *
69873  * Field Access Macros:
69874  *
69875  */
69876 /*
69877  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_INTKNEPMIS
69878  *
69879  * No interrupt
69880  */
69881 #define ALT_USB_DEV_DIEPINT7_INTKNEPMIS_E_INACT 0x0
69882 /*
69883  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_INTKNEPMIS
69884  *
69885  * IN Token Received with EP Mismatch interrupt
69886  */
69887 #define ALT_USB_DEV_DIEPINT7_INTKNEPMIS_E_ACT 0x1
69888 
69889 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_INTKNEPMIS register field. */
69890 #define ALT_USB_DEV_DIEPINT7_INTKNEPMIS_LSB 5
69891 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_INTKNEPMIS register field. */
69892 #define ALT_USB_DEV_DIEPINT7_INTKNEPMIS_MSB 5
69893 /* The width in bits of the ALT_USB_DEV_DIEPINT7_INTKNEPMIS register field. */
69894 #define ALT_USB_DEV_DIEPINT7_INTKNEPMIS_WIDTH 1
69895 /* The mask used to set the ALT_USB_DEV_DIEPINT7_INTKNEPMIS register field value. */
69896 #define ALT_USB_DEV_DIEPINT7_INTKNEPMIS_SET_MSK 0x00000020
69897 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_INTKNEPMIS register field value. */
69898 #define ALT_USB_DEV_DIEPINT7_INTKNEPMIS_CLR_MSK 0xffffffdf
69899 /* The reset value of the ALT_USB_DEV_DIEPINT7_INTKNEPMIS register field. */
69900 #define ALT_USB_DEV_DIEPINT7_INTKNEPMIS_RESET 0x0
69901 /* Extracts the ALT_USB_DEV_DIEPINT7_INTKNEPMIS field value from a register. */
69902 #define ALT_USB_DEV_DIEPINT7_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
69903 /* Produces a ALT_USB_DEV_DIEPINT7_INTKNEPMIS register field value suitable for setting the register. */
69904 #define ALT_USB_DEV_DIEPINT7_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
69905 
69906 /*
69907  * Field : IN Endpoint NAK Effective - inepnakeff
69908  *
69909  * Applies to periodic IN endpoints only. This bit can be cleared when the
69910  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
69911  * interrupt indicates that the core has sampled the NAK bit Set (either by the
69912  * application or by the core). The interrupt indicates that the IN endpoint NAK
69913  * bit Set by the application has taken effect in the core.This interrupt does not
69914  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
69915  * over a NAK bit.
69916  *
69917  * Field Enumeration Values:
69918  *
69919  * Enum | Value | Description
69920  * :----------------------------------------|:------|:------------------------------------
69921  * ALT_USB_DEV_DIEPINT7_INEPNAKEFF_E_INACT | 0x0 | No interrupt
69922  * ALT_USB_DEV_DIEPINT7_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
69923  *
69924  * Field Access Macros:
69925  *
69926  */
69927 /*
69928  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_INEPNAKEFF
69929  *
69930  * No interrupt
69931  */
69932 #define ALT_USB_DEV_DIEPINT7_INEPNAKEFF_E_INACT 0x0
69933 /*
69934  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_INEPNAKEFF
69935  *
69936  * IN Endpoint NAK Effective interrupt
69937  */
69938 #define ALT_USB_DEV_DIEPINT7_INEPNAKEFF_E_ACT 0x1
69939 
69940 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_INEPNAKEFF register field. */
69941 #define ALT_USB_DEV_DIEPINT7_INEPNAKEFF_LSB 6
69942 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_INEPNAKEFF register field. */
69943 #define ALT_USB_DEV_DIEPINT7_INEPNAKEFF_MSB 6
69944 /* The width in bits of the ALT_USB_DEV_DIEPINT7_INEPNAKEFF register field. */
69945 #define ALT_USB_DEV_DIEPINT7_INEPNAKEFF_WIDTH 1
69946 /* The mask used to set the ALT_USB_DEV_DIEPINT7_INEPNAKEFF register field value. */
69947 #define ALT_USB_DEV_DIEPINT7_INEPNAKEFF_SET_MSK 0x00000040
69948 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_INEPNAKEFF register field value. */
69949 #define ALT_USB_DEV_DIEPINT7_INEPNAKEFF_CLR_MSK 0xffffffbf
69950 /* The reset value of the ALT_USB_DEV_DIEPINT7_INEPNAKEFF register field. */
69951 #define ALT_USB_DEV_DIEPINT7_INEPNAKEFF_RESET 0x0
69952 /* Extracts the ALT_USB_DEV_DIEPINT7_INEPNAKEFF field value from a register. */
69953 #define ALT_USB_DEV_DIEPINT7_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
69954 /* Produces a ALT_USB_DEV_DIEPINT7_INEPNAKEFF register field value suitable for setting the register. */
69955 #define ALT_USB_DEV_DIEPINT7_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
69956 
69957 /*
69958  * Field : Transmit FIFO Empty - txfemp
69959  *
69960  * This bit is valid only for IN Endpoints This interrupt is asserted when the
69961  * TxFIFO for this endpoint is either half or completely empty. The half or
69962  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
69963  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
69964  *
69965  * Field Enumeration Values:
69966  *
69967  * Enum | Value | Description
69968  * :------------------------------------|:------|:------------------------------
69969  * ALT_USB_DEV_DIEPINT7_TXFEMP_E_INACT | 0x0 | No interrupt
69970  * ALT_USB_DEV_DIEPINT7_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
69971  *
69972  * Field Access Macros:
69973  *
69974  */
69975 /*
69976  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_TXFEMP
69977  *
69978  * No interrupt
69979  */
69980 #define ALT_USB_DEV_DIEPINT7_TXFEMP_E_INACT 0x0
69981 /*
69982  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_TXFEMP
69983  *
69984  * Transmit FIFO Empty interrupt
69985  */
69986 #define ALT_USB_DEV_DIEPINT7_TXFEMP_E_ACT 0x1
69987 
69988 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_TXFEMP register field. */
69989 #define ALT_USB_DEV_DIEPINT7_TXFEMP_LSB 7
69990 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_TXFEMP register field. */
69991 #define ALT_USB_DEV_DIEPINT7_TXFEMP_MSB 7
69992 /* The width in bits of the ALT_USB_DEV_DIEPINT7_TXFEMP register field. */
69993 #define ALT_USB_DEV_DIEPINT7_TXFEMP_WIDTH 1
69994 /* The mask used to set the ALT_USB_DEV_DIEPINT7_TXFEMP register field value. */
69995 #define ALT_USB_DEV_DIEPINT7_TXFEMP_SET_MSK 0x00000080
69996 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_TXFEMP register field value. */
69997 #define ALT_USB_DEV_DIEPINT7_TXFEMP_CLR_MSK 0xffffff7f
69998 /* The reset value of the ALT_USB_DEV_DIEPINT7_TXFEMP register field. */
69999 #define ALT_USB_DEV_DIEPINT7_TXFEMP_RESET 0x1
70000 /* Extracts the ALT_USB_DEV_DIEPINT7_TXFEMP field value from a register. */
70001 #define ALT_USB_DEV_DIEPINT7_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
70002 /* Produces a ALT_USB_DEV_DIEPINT7_TXFEMP register field value suitable for setting the register. */
70003 #define ALT_USB_DEV_DIEPINT7_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
70004 
70005 /*
70006  * Field : Fifo Underrun - txfifoundrn
70007  *
70008  * Applies to IN endpoints Only. The core generates this interrupt when it detects
70009  * a transmit FIFO underrun condition for this endpoint.
70010  *
70011  * Field Enumeration Values:
70012  *
70013  * Enum | Value | Description
70014  * :-----------------------------------------|:------|:------------------------
70015  * ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
70016  * ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
70017  *
70018  * Field Access Macros:
70019  *
70020  */
70021 /*
70022  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN
70023  *
70024  * No interrupt
70025  */
70026 #define ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN_E_INACT 0x0
70027 /*
70028  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN
70029  *
70030  * Fifo Underrun interrupt
70031  */
70032 #define ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN_E_ACT 0x1
70033 
70034 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN register field. */
70035 #define ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN_LSB 8
70036 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN register field. */
70037 #define ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN_MSB 8
70038 /* The width in bits of the ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN register field. */
70039 #define ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN_WIDTH 1
70040 /* The mask used to set the ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN register field value. */
70041 #define ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN_SET_MSK 0x00000100
70042 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN register field value. */
70043 #define ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN_CLR_MSK 0xfffffeff
70044 /* The reset value of the ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN register field. */
70045 #define ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN_RESET 0x0
70046 /* Extracts the ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN field value from a register. */
70047 #define ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
70048 /* Produces a ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN register field value suitable for setting the register. */
70049 #define ALT_USB_DEV_DIEPINT7_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
70050 
70051 /*
70052  * Field : BNA Interrupt - bnaintr
70053  *
70054  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
70055  * generates this interrupt when the descriptor accessed is not ready for the Core
70056  * to process, such as Host busy or DMA done
70057  *
70058  * Field Enumeration Values:
70059  *
70060  * Enum | Value | Description
70061  * :-------------------------------------|:------|:--------------
70062  * ALT_USB_DEV_DIEPINT7_BNAINTR_E_INACT | 0x0 | No interrupt
70063  * ALT_USB_DEV_DIEPINT7_BNAINTR_E_ACT | 0x1 | BNA interrupt
70064  *
70065  * Field Access Macros:
70066  *
70067  */
70068 /*
70069  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_BNAINTR
70070  *
70071  * No interrupt
70072  */
70073 #define ALT_USB_DEV_DIEPINT7_BNAINTR_E_INACT 0x0
70074 /*
70075  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_BNAINTR
70076  *
70077  * BNA interrupt
70078  */
70079 #define ALT_USB_DEV_DIEPINT7_BNAINTR_E_ACT 0x1
70080 
70081 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_BNAINTR register field. */
70082 #define ALT_USB_DEV_DIEPINT7_BNAINTR_LSB 9
70083 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_BNAINTR register field. */
70084 #define ALT_USB_DEV_DIEPINT7_BNAINTR_MSB 9
70085 /* The width in bits of the ALT_USB_DEV_DIEPINT7_BNAINTR register field. */
70086 #define ALT_USB_DEV_DIEPINT7_BNAINTR_WIDTH 1
70087 /* The mask used to set the ALT_USB_DEV_DIEPINT7_BNAINTR register field value. */
70088 #define ALT_USB_DEV_DIEPINT7_BNAINTR_SET_MSK 0x00000200
70089 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_BNAINTR register field value. */
70090 #define ALT_USB_DEV_DIEPINT7_BNAINTR_CLR_MSK 0xfffffdff
70091 /* The reset value of the ALT_USB_DEV_DIEPINT7_BNAINTR register field. */
70092 #define ALT_USB_DEV_DIEPINT7_BNAINTR_RESET 0x0
70093 /* Extracts the ALT_USB_DEV_DIEPINT7_BNAINTR field value from a register. */
70094 #define ALT_USB_DEV_DIEPINT7_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
70095 /* Produces a ALT_USB_DEV_DIEPINT7_BNAINTR register field value suitable for setting the register. */
70096 #define ALT_USB_DEV_DIEPINT7_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
70097 
70098 /*
70099  * Field : Packet Drop Status - pktdrpsts
70100  *
70101  * This bit indicates to the application that an ISOC OUT packet has been dropped.
70102  * This bit does not have an associated mask bit and does not generate an
70103  * interrupt.
70104  *
70105  * Field Enumeration Values:
70106  *
70107  * Enum | Value | Description
70108  * :---------------------------------------|:------|:-----------------------------
70109  * ALT_USB_DEV_DIEPINT7_PKTDRPSTS_E_INACT | 0x0 | No interrupt
70110  * ALT_USB_DEV_DIEPINT7_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
70111  *
70112  * Field Access Macros:
70113  *
70114  */
70115 /*
70116  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_PKTDRPSTS
70117  *
70118  * No interrupt
70119  */
70120 #define ALT_USB_DEV_DIEPINT7_PKTDRPSTS_E_INACT 0x0
70121 /*
70122  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_PKTDRPSTS
70123  *
70124  * Packet Drop Status interrupt
70125  */
70126 #define ALT_USB_DEV_DIEPINT7_PKTDRPSTS_E_ACT 0x1
70127 
70128 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_PKTDRPSTS register field. */
70129 #define ALT_USB_DEV_DIEPINT7_PKTDRPSTS_LSB 11
70130 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_PKTDRPSTS register field. */
70131 #define ALT_USB_DEV_DIEPINT7_PKTDRPSTS_MSB 11
70132 /* The width in bits of the ALT_USB_DEV_DIEPINT7_PKTDRPSTS register field. */
70133 #define ALT_USB_DEV_DIEPINT7_PKTDRPSTS_WIDTH 1
70134 /* The mask used to set the ALT_USB_DEV_DIEPINT7_PKTDRPSTS register field value. */
70135 #define ALT_USB_DEV_DIEPINT7_PKTDRPSTS_SET_MSK 0x00000800
70136 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_PKTDRPSTS register field value. */
70137 #define ALT_USB_DEV_DIEPINT7_PKTDRPSTS_CLR_MSK 0xfffff7ff
70138 /* The reset value of the ALT_USB_DEV_DIEPINT7_PKTDRPSTS register field. */
70139 #define ALT_USB_DEV_DIEPINT7_PKTDRPSTS_RESET 0x0
70140 /* Extracts the ALT_USB_DEV_DIEPINT7_PKTDRPSTS field value from a register. */
70141 #define ALT_USB_DEV_DIEPINT7_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
70142 /* Produces a ALT_USB_DEV_DIEPINT7_PKTDRPSTS register field value suitable for setting the register. */
70143 #define ALT_USB_DEV_DIEPINT7_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
70144 
70145 /*
70146  * Field : BbleErr Interrupt - bbleerr
70147  *
70148  * The core generates this interrupt when babble is received for the endpoint.
70149  *
70150  * Field Enumeration Values:
70151  *
70152  * Enum | Value | Description
70153  * :-------------------------------------|:------|:------------------
70154  * ALT_USB_DEV_DIEPINT7_BBLEERR_E_INACT | 0x0 | No interrupt
70155  * ALT_USB_DEV_DIEPINT7_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
70156  *
70157  * Field Access Macros:
70158  *
70159  */
70160 /*
70161  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_BBLEERR
70162  *
70163  * No interrupt
70164  */
70165 #define ALT_USB_DEV_DIEPINT7_BBLEERR_E_INACT 0x0
70166 /*
70167  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_BBLEERR
70168  *
70169  * BbleErr interrupt
70170  */
70171 #define ALT_USB_DEV_DIEPINT7_BBLEERR_E_ACT 0x1
70172 
70173 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_BBLEERR register field. */
70174 #define ALT_USB_DEV_DIEPINT7_BBLEERR_LSB 12
70175 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_BBLEERR register field. */
70176 #define ALT_USB_DEV_DIEPINT7_BBLEERR_MSB 12
70177 /* The width in bits of the ALT_USB_DEV_DIEPINT7_BBLEERR register field. */
70178 #define ALT_USB_DEV_DIEPINT7_BBLEERR_WIDTH 1
70179 /* The mask used to set the ALT_USB_DEV_DIEPINT7_BBLEERR register field value. */
70180 #define ALT_USB_DEV_DIEPINT7_BBLEERR_SET_MSK 0x00001000
70181 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_BBLEERR register field value. */
70182 #define ALT_USB_DEV_DIEPINT7_BBLEERR_CLR_MSK 0xffffefff
70183 /* The reset value of the ALT_USB_DEV_DIEPINT7_BBLEERR register field. */
70184 #define ALT_USB_DEV_DIEPINT7_BBLEERR_RESET 0x0
70185 /* Extracts the ALT_USB_DEV_DIEPINT7_BBLEERR field value from a register. */
70186 #define ALT_USB_DEV_DIEPINT7_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
70187 /* Produces a ALT_USB_DEV_DIEPINT7_BBLEERR register field value suitable for setting the register. */
70188 #define ALT_USB_DEV_DIEPINT7_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
70189 
70190 /*
70191  * Field : NAK Interrupt - nakintrpt
70192  *
70193  * The core generates this interrupt when a NAK is transmitted or received by the
70194  * device. In case of isochronous IN endpoints the interrupt gets generated when a
70195  * zero length packet is transmitted due to un-availability of data in the TXFifo.
70196  *
70197  * Field Enumeration Values:
70198  *
70199  * Enum | Value | Description
70200  * :---------------------------------------|:------|:--------------
70201  * ALT_USB_DEV_DIEPINT7_NAKINTRPT_E_INACT | 0x0 | No interrupt
70202  * ALT_USB_DEV_DIEPINT7_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
70203  *
70204  * Field Access Macros:
70205  *
70206  */
70207 /*
70208  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_NAKINTRPT
70209  *
70210  * No interrupt
70211  */
70212 #define ALT_USB_DEV_DIEPINT7_NAKINTRPT_E_INACT 0x0
70213 /*
70214  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_NAKINTRPT
70215  *
70216  * NAK Interrupt
70217  */
70218 #define ALT_USB_DEV_DIEPINT7_NAKINTRPT_E_ACT 0x1
70219 
70220 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_NAKINTRPT register field. */
70221 #define ALT_USB_DEV_DIEPINT7_NAKINTRPT_LSB 13
70222 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_NAKINTRPT register field. */
70223 #define ALT_USB_DEV_DIEPINT7_NAKINTRPT_MSB 13
70224 /* The width in bits of the ALT_USB_DEV_DIEPINT7_NAKINTRPT register field. */
70225 #define ALT_USB_DEV_DIEPINT7_NAKINTRPT_WIDTH 1
70226 /* The mask used to set the ALT_USB_DEV_DIEPINT7_NAKINTRPT register field value. */
70227 #define ALT_USB_DEV_DIEPINT7_NAKINTRPT_SET_MSK 0x00002000
70228 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_NAKINTRPT register field value. */
70229 #define ALT_USB_DEV_DIEPINT7_NAKINTRPT_CLR_MSK 0xffffdfff
70230 /* The reset value of the ALT_USB_DEV_DIEPINT7_NAKINTRPT register field. */
70231 #define ALT_USB_DEV_DIEPINT7_NAKINTRPT_RESET 0x0
70232 /* Extracts the ALT_USB_DEV_DIEPINT7_NAKINTRPT field value from a register. */
70233 #define ALT_USB_DEV_DIEPINT7_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
70234 /* Produces a ALT_USB_DEV_DIEPINT7_NAKINTRPT register field value suitable for setting the register. */
70235 #define ALT_USB_DEV_DIEPINT7_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
70236 
70237 /*
70238  * Field : NYET Interrupt - nyetintrpt
70239  *
70240  * The core generates this interrupt when a NYET response is transmitted for a non
70241  * isochronous OUT endpoint.
70242  *
70243  * Field Enumeration Values:
70244  *
70245  * Enum | Value | Description
70246  * :----------------------------------------|:------|:---------------
70247  * ALT_USB_DEV_DIEPINT7_NYETINTRPT_E_INACT | 0x0 | No interrupt
70248  * ALT_USB_DEV_DIEPINT7_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
70249  *
70250  * Field Access Macros:
70251  *
70252  */
70253 /*
70254  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_NYETINTRPT
70255  *
70256  * No interrupt
70257  */
70258 #define ALT_USB_DEV_DIEPINT7_NYETINTRPT_E_INACT 0x0
70259 /*
70260  * Enumerated value for register field ALT_USB_DEV_DIEPINT7_NYETINTRPT
70261  *
70262  * NYET Interrupt
70263  */
70264 #define ALT_USB_DEV_DIEPINT7_NYETINTRPT_E_ACT 0x1
70265 
70266 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT7_NYETINTRPT register field. */
70267 #define ALT_USB_DEV_DIEPINT7_NYETINTRPT_LSB 14
70268 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT7_NYETINTRPT register field. */
70269 #define ALT_USB_DEV_DIEPINT7_NYETINTRPT_MSB 14
70270 /* The width in bits of the ALT_USB_DEV_DIEPINT7_NYETINTRPT register field. */
70271 #define ALT_USB_DEV_DIEPINT7_NYETINTRPT_WIDTH 1
70272 /* The mask used to set the ALT_USB_DEV_DIEPINT7_NYETINTRPT register field value. */
70273 #define ALT_USB_DEV_DIEPINT7_NYETINTRPT_SET_MSK 0x00004000
70274 /* The mask used to clear the ALT_USB_DEV_DIEPINT7_NYETINTRPT register field value. */
70275 #define ALT_USB_DEV_DIEPINT7_NYETINTRPT_CLR_MSK 0xffffbfff
70276 /* The reset value of the ALT_USB_DEV_DIEPINT7_NYETINTRPT register field. */
70277 #define ALT_USB_DEV_DIEPINT7_NYETINTRPT_RESET 0x0
70278 /* Extracts the ALT_USB_DEV_DIEPINT7_NYETINTRPT field value from a register. */
70279 #define ALT_USB_DEV_DIEPINT7_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
70280 /* Produces a ALT_USB_DEV_DIEPINT7_NYETINTRPT register field value suitable for setting the register. */
70281 #define ALT_USB_DEV_DIEPINT7_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
70282 
70283 #ifndef __ASSEMBLY__
70284 /*
70285  * WARNING: The C register and register group struct declarations are provided for
70286  * convenience and illustrative purposes. They should, however, be used with
70287  * caution as the C language standard provides no guarantees about the alignment or
70288  * atomicity of device memory accesses. The recommended practice for writing
70289  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
70290  * alt_write_word() functions.
70291  *
70292  * The struct declaration for register ALT_USB_DEV_DIEPINT7.
70293  */
70294 struct ALT_USB_DEV_DIEPINT7_s
70295 {
70296  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
70297  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
70298  const uint32_t ahberr : 1; /* AHB Error */
70299  const uint32_t timeout : 1; /* Timeout Condition */
70300  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
70301  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
70302  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
70303  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
70304  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
70305  const uint32_t bnaintr : 1; /* BNA Interrupt */
70306  uint32_t : 1; /* *UNDEFINED* */
70307  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
70308  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
70309  const uint32_t nakintrpt : 1; /* NAK Interrupt */
70310  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
70311  uint32_t : 17; /* *UNDEFINED* */
70312 };
70313 
70314 /* The typedef declaration for register ALT_USB_DEV_DIEPINT7. */
70315 typedef volatile struct ALT_USB_DEV_DIEPINT7_s ALT_USB_DEV_DIEPINT7_t;
70316 #endif /* __ASSEMBLY__ */
70317 
70318 /* The byte offset of the ALT_USB_DEV_DIEPINT7 register from the beginning of the component. */
70319 #define ALT_USB_DEV_DIEPINT7_OFST 0x1e8
70320 /* The address of the ALT_USB_DEV_DIEPINT7 register. */
70321 #define ALT_USB_DEV_DIEPINT7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT7_OFST))
70322 
70323 /*
70324  * Register : Device IN Endpoint 7 Transfer Size Register - dieptsiz7
70325  *
70326  * The application must modify this register before enabling the endpoint. Once the
70327  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
70328  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
70329  * application can only read this register once the core has cleared the Endpoint
70330  * Enable bit.
70331  *
70332  * Register Layout
70333  *
70334  * Bits | Access | Reset | Description
70335  * :--------|:-------|:------|:----------------------------
70336  * [18:0] | RW | 0x0 | Transfer Size
70337  * [28:19] | RW | 0x0 | Packet Count
70338  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
70339  * [31] | ??? | 0x0 | *UNDEFINED*
70340  *
70341  */
70342 /*
70343  * Field : Transfer Size - xfersize
70344  *
70345  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
70346  * application only after it has exhausted the transfer size amount of data. The
70347  * transfer size can be Set to the maximum packet size of the endpoint, to be
70348  * interrupted at the end of each packet. The core decrements this field every time
70349  * a packet from the external memory is written to the TxFIFO.
70350  *
70351  * Field Access Macros:
70352  *
70353  */
70354 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ7_XFERSIZE register field. */
70355 #define ALT_USB_DEV_DIEPTSIZ7_XFERSIZE_LSB 0
70356 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ7_XFERSIZE register field. */
70357 #define ALT_USB_DEV_DIEPTSIZ7_XFERSIZE_MSB 18
70358 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ7_XFERSIZE register field. */
70359 #define ALT_USB_DEV_DIEPTSIZ7_XFERSIZE_WIDTH 19
70360 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ7_XFERSIZE register field value. */
70361 #define ALT_USB_DEV_DIEPTSIZ7_XFERSIZE_SET_MSK 0x0007ffff
70362 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ7_XFERSIZE register field value. */
70363 #define ALT_USB_DEV_DIEPTSIZ7_XFERSIZE_CLR_MSK 0xfff80000
70364 /* The reset value of the ALT_USB_DEV_DIEPTSIZ7_XFERSIZE register field. */
70365 #define ALT_USB_DEV_DIEPTSIZ7_XFERSIZE_RESET 0x0
70366 /* Extracts the ALT_USB_DEV_DIEPTSIZ7_XFERSIZE field value from a register. */
70367 #define ALT_USB_DEV_DIEPTSIZ7_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
70368 /* Produces a ALT_USB_DEV_DIEPTSIZ7_XFERSIZE register field value suitable for setting the register. */
70369 #define ALT_USB_DEV_DIEPTSIZ7_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
70370 
70371 /*
70372  * Field : Packet Count - PktCnt
70373  *
70374  * Indicates the total number of USB packets that constitute the Transfer Size
70375  * amount of data for endpoint 0.This field is decremented every time a packet
70376  * (maximum size or short packet) is read from the TxFIFO.
70377  *
70378  * Field Access Macros:
70379  *
70380  */
70381 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ7_PKTCNT register field. */
70382 #define ALT_USB_DEV_DIEPTSIZ7_PKTCNT_LSB 19
70383 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ7_PKTCNT register field. */
70384 #define ALT_USB_DEV_DIEPTSIZ7_PKTCNT_MSB 28
70385 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ7_PKTCNT register field. */
70386 #define ALT_USB_DEV_DIEPTSIZ7_PKTCNT_WIDTH 10
70387 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ7_PKTCNT register field value. */
70388 #define ALT_USB_DEV_DIEPTSIZ7_PKTCNT_SET_MSK 0x1ff80000
70389 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ7_PKTCNT register field value. */
70390 #define ALT_USB_DEV_DIEPTSIZ7_PKTCNT_CLR_MSK 0xe007ffff
70391 /* The reset value of the ALT_USB_DEV_DIEPTSIZ7_PKTCNT register field. */
70392 #define ALT_USB_DEV_DIEPTSIZ7_PKTCNT_RESET 0x0
70393 /* Extracts the ALT_USB_DEV_DIEPTSIZ7_PKTCNT field value from a register. */
70394 #define ALT_USB_DEV_DIEPTSIZ7_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
70395 /* Produces a ALT_USB_DEV_DIEPTSIZ7_PKTCNT register field value suitable for setting the register. */
70396 #define ALT_USB_DEV_DIEPTSIZ7_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
70397 
70398 /*
70399  * Field : Applies to IN endpoints onl - mc
70400  *
70401  * for periodic IN endpoints, this field indicates the number of packets that must
70402  * be transmitted per microframe on the USB. The core uses this field to calculate
70403  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
70404  * field is valid only in Internal DMA mode. It specifies the number of packets the
70405  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
70406  * by the Next Endpoint field of the Device Endpoint-n Control register
70407  * (DIEPCTLn.NextEp)
70408  *
70409  * Field Enumeration Values:
70410  *
70411  * Enum | Value | Description
70412  * :------------------------------------|:------|:------------
70413  * ALT_USB_DEV_DIEPTSIZ7_MC_E_PKTONE | 0x1 | 1 packet
70414  * ALT_USB_DEV_DIEPTSIZ7_MC_E_PKTTWO | 0x2 | 2 packets
70415  * ALT_USB_DEV_DIEPTSIZ7_MC_E_PKTTHREE | 0x3 | 3 packets
70416  *
70417  * Field Access Macros:
70418  *
70419  */
70420 /*
70421  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ7_MC
70422  *
70423  * 1 packet
70424  */
70425 #define ALT_USB_DEV_DIEPTSIZ7_MC_E_PKTONE 0x1
70426 /*
70427  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ7_MC
70428  *
70429  * 2 packets
70430  */
70431 #define ALT_USB_DEV_DIEPTSIZ7_MC_E_PKTTWO 0x2
70432 /*
70433  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ7_MC
70434  *
70435  * 3 packets
70436  */
70437 #define ALT_USB_DEV_DIEPTSIZ7_MC_E_PKTTHREE 0x3
70438 
70439 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ7_MC register field. */
70440 #define ALT_USB_DEV_DIEPTSIZ7_MC_LSB 29
70441 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ7_MC register field. */
70442 #define ALT_USB_DEV_DIEPTSIZ7_MC_MSB 30
70443 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ7_MC register field. */
70444 #define ALT_USB_DEV_DIEPTSIZ7_MC_WIDTH 2
70445 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ7_MC register field value. */
70446 #define ALT_USB_DEV_DIEPTSIZ7_MC_SET_MSK 0x60000000
70447 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ7_MC register field value. */
70448 #define ALT_USB_DEV_DIEPTSIZ7_MC_CLR_MSK 0x9fffffff
70449 /* The reset value of the ALT_USB_DEV_DIEPTSIZ7_MC register field. */
70450 #define ALT_USB_DEV_DIEPTSIZ7_MC_RESET 0x0
70451 /* Extracts the ALT_USB_DEV_DIEPTSIZ7_MC field value from a register. */
70452 #define ALT_USB_DEV_DIEPTSIZ7_MC_GET(value) (((value) & 0x60000000) >> 29)
70453 /* Produces a ALT_USB_DEV_DIEPTSIZ7_MC register field value suitable for setting the register. */
70454 #define ALT_USB_DEV_DIEPTSIZ7_MC_SET(value) (((value) << 29) & 0x60000000)
70455 
70456 #ifndef __ASSEMBLY__
70457 /*
70458  * WARNING: The C register and register group struct declarations are provided for
70459  * convenience and illustrative purposes. They should, however, be used with
70460  * caution as the C language standard provides no guarantees about the alignment or
70461  * atomicity of device memory accesses. The recommended practice for writing
70462  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
70463  * alt_write_word() functions.
70464  *
70465  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ7.
70466  */
70467 struct ALT_USB_DEV_DIEPTSIZ7_s
70468 {
70469  uint32_t xfersize : 19; /* Transfer Size */
70470  uint32_t PktCnt : 10; /* Packet Count */
70471  uint32_t mc : 2; /* Applies to IN endpoints onl */
70472  uint32_t : 1; /* *UNDEFINED* */
70473 };
70474 
70475 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ7. */
70476 typedef volatile struct ALT_USB_DEV_DIEPTSIZ7_s ALT_USB_DEV_DIEPTSIZ7_t;
70477 #endif /* __ASSEMBLY__ */
70478 
70479 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ7 register from the beginning of the component. */
70480 #define ALT_USB_DEV_DIEPTSIZ7_OFST 0x1f0
70481 /* The address of the ALT_USB_DEV_DIEPTSIZ7 register. */
70482 #define ALT_USB_DEV_DIEPTSIZ7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ7_OFST))
70483 
70484 /*
70485  * Register : Device IN Endpoint 7 DMA Address Register - diepdma7
70486  *
70487  * DMA Addressing.
70488  *
70489  * Register Layout
70490  *
70491  * Bits | Access | Reset | Description
70492  * :-------|:-------|:--------|:------------
70493  * [31:0] | RW | Unknown | DMA Address
70494  *
70495  */
70496 /*
70497  * Field : DMA Address - diepdma7
70498  *
70499  * Holds the start address of the external memory for storing or fetching endpoint
70500  * data. for control endpoints, this field stores control OUT data packets as well
70501  * as SETUP transaction data packets. When more than three SETUP packets are
70502  * received back-to-back, the SETUP data packet in the memory is overwritten. This
70503  * register is incremented on every AHB transaction. The application can give only
70504  * a DWORD-aligned address.
70505  *
70506  * When Scatter/Gather DMA mode is not enabled, the application programs the start
70507  * address value in this field.
70508  *
70509  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
70510  * for the descriptor list.
70511  *
70512  * Field Access Macros:
70513  *
70514  */
70515 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA7_DIEPDMA7 register field. */
70516 #define ALT_USB_DEV_DIEPDMA7_DIEPDMA7_LSB 0
70517 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA7_DIEPDMA7 register field. */
70518 #define ALT_USB_DEV_DIEPDMA7_DIEPDMA7_MSB 31
70519 /* The width in bits of the ALT_USB_DEV_DIEPDMA7_DIEPDMA7 register field. */
70520 #define ALT_USB_DEV_DIEPDMA7_DIEPDMA7_WIDTH 32
70521 /* The mask used to set the ALT_USB_DEV_DIEPDMA7_DIEPDMA7 register field value. */
70522 #define ALT_USB_DEV_DIEPDMA7_DIEPDMA7_SET_MSK 0xffffffff
70523 /* The mask used to clear the ALT_USB_DEV_DIEPDMA7_DIEPDMA7 register field value. */
70524 #define ALT_USB_DEV_DIEPDMA7_DIEPDMA7_CLR_MSK 0x00000000
70525 /* The reset value of the ALT_USB_DEV_DIEPDMA7_DIEPDMA7 register field is UNKNOWN. */
70526 #define ALT_USB_DEV_DIEPDMA7_DIEPDMA7_RESET 0x0
70527 /* Extracts the ALT_USB_DEV_DIEPDMA7_DIEPDMA7 field value from a register. */
70528 #define ALT_USB_DEV_DIEPDMA7_DIEPDMA7_GET(value) (((value) & 0xffffffff) >> 0)
70529 /* Produces a ALT_USB_DEV_DIEPDMA7_DIEPDMA7 register field value suitable for setting the register. */
70530 #define ALT_USB_DEV_DIEPDMA7_DIEPDMA7_SET(value) (((value) << 0) & 0xffffffff)
70531 
70532 #ifndef __ASSEMBLY__
70533 /*
70534  * WARNING: The C register and register group struct declarations are provided for
70535  * convenience and illustrative purposes. They should, however, be used with
70536  * caution as the C language standard provides no guarantees about the alignment or
70537  * atomicity of device memory accesses. The recommended practice for writing
70538  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
70539  * alt_write_word() functions.
70540  *
70541  * The struct declaration for register ALT_USB_DEV_DIEPDMA7.
70542  */
70543 struct ALT_USB_DEV_DIEPDMA7_s
70544 {
70545  uint32_t diepdma7 : 32; /* DMA Address */
70546 };
70547 
70548 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA7. */
70549 typedef volatile struct ALT_USB_DEV_DIEPDMA7_s ALT_USB_DEV_DIEPDMA7_t;
70550 #endif /* __ASSEMBLY__ */
70551 
70552 /* The byte offset of the ALT_USB_DEV_DIEPDMA7 register from the beginning of the component. */
70553 #define ALT_USB_DEV_DIEPDMA7_OFST 0x1f4
70554 /* The address of the ALT_USB_DEV_DIEPDMA7 register. */
70555 #define ALT_USB_DEV_DIEPDMA7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA7_OFST))
70556 
70557 /*
70558  * Register : Device IN Endpoint Transmit FIFO Status Register 7 - dtxfsts7
70559  *
70560  * This register contains the free space information for the Device IN endpoint
70561  * TxFIFO.
70562  *
70563  * Register Layout
70564  *
70565  * Bits | Access | Reset | Description
70566  * :--------|:-------|:-------|:-------------------------------
70567  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
70568  * [31:16] | ??? | 0x0 | *UNDEFINED*
70569  *
70570  */
70571 /*
70572  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
70573  *
70574  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
70575  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
70576  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
70577  * 32,768 words available Others: Reserved
70578  *
70579  * Field Access Macros:
70580  *
70581  */
70582 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL register field. */
70583 #define ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL_LSB 0
70584 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL register field. */
70585 #define ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL_MSB 15
70586 /* The width in bits of the ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL register field. */
70587 #define ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL_WIDTH 16
70588 /* The mask used to set the ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL register field value. */
70589 #define ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
70590 /* The mask used to clear the ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL register field value. */
70591 #define ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
70592 /* The reset value of the ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL register field. */
70593 #define ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL_RESET 0x2000
70594 /* Extracts the ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL field value from a register. */
70595 #define ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
70596 /* Produces a ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL register field value suitable for setting the register. */
70597 #define ALT_USB_DEV_DTXFSTS7_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
70598 
70599 #ifndef __ASSEMBLY__
70600 /*
70601  * WARNING: The C register and register group struct declarations are provided for
70602  * convenience and illustrative purposes. They should, however, be used with
70603  * caution as the C language standard provides no guarantees about the alignment or
70604  * atomicity of device memory accesses. The recommended practice for writing
70605  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
70606  * alt_write_word() functions.
70607  *
70608  * The struct declaration for register ALT_USB_DEV_DTXFSTS7.
70609  */
70610 struct ALT_USB_DEV_DTXFSTS7_s
70611 {
70612  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
70613  uint32_t : 16; /* *UNDEFINED* */
70614 };
70615 
70616 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS7. */
70617 typedef volatile struct ALT_USB_DEV_DTXFSTS7_s ALT_USB_DEV_DTXFSTS7_t;
70618 #endif /* __ASSEMBLY__ */
70619 
70620 /* The byte offset of the ALT_USB_DEV_DTXFSTS7 register from the beginning of the component. */
70621 #define ALT_USB_DEV_DTXFSTS7_OFST 0x1f8
70622 /* The address of the ALT_USB_DEV_DTXFSTS7 register. */
70623 #define ALT_USB_DEV_DTXFSTS7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS7_OFST))
70624 
70625 /*
70626  * Register : Device IN Endpoint 7 DMA Buffer Address Register - diepdmab7
70627  *
70628  * DMA Buffer Address.
70629  *
70630  * Register Layout
70631  *
70632  * Bits | Access | Reset | Description
70633  * :-------|:-------|:--------|:-------------------
70634  * [31:0] | R | Unknown | DMA Buffer Address
70635  *
70636  */
70637 /*
70638  * Field : DMA Buffer Address - diepdmab7
70639  *
70640  * Holds the current buffer address. This register is updated as and when the data
70641  * transfer for the corresponding end point is in progress. This register is
70642  * present only in Scatter/Gather DMA mode.
70643  *
70644  * Field Access Macros:
70645  *
70646  */
70647 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7 register field. */
70648 #define ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7_LSB 0
70649 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7 register field. */
70650 #define ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7_MSB 31
70651 /* The width in bits of the ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7 register field. */
70652 #define ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7_WIDTH 32
70653 /* The mask used to set the ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7 register field value. */
70654 #define ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7_SET_MSK 0xffffffff
70655 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7 register field value. */
70656 #define ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7_CLR_MSK 0x00000000
70657 /* The reset value of the ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7 register field is UNKNOWN. */
70658 #define ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7_RESET 0x0
70659 /* Extracts the ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7 field value from a register. */
70660 #define ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7_GET(value) (((value) & 0xffffffff) >> 0)
70661 /* Produces a ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7 register field value suitable for setting the register. */
70662 #define ALT_USB_DEV_DIEPDMAB7_DIEPDMAB7_SET(value) (((value) << 0) & 0xffffffff)
70663 
70664 #ifndef __ASSEMBLY__
70665 /*
70666  * WARNING: The C register and register group struct declarations are provided for
70667  * convenience and illustrative purposes. They should, however, be used with
70668  * caution as the C language standard provides no guarantees about the alignment or
70669  * atomicity of device memory accesses. The recommended practice for writing
70670  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
70671  * alt_write_word() functions.
70672  *
70673  * The struct declaration for register ALT_USB_DEV_DIEPDMAB7.
70674  */
70675 struct ALT_USB_DEV_DIEPDMAB7_s
70676 {
70677  const uint32_t diepdmab7 : 32; /* DMA Buffer Address */
70678 };
70679 
70680 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB7. */
70681 typedef volatile struct ALT_USB_DEV_DIEPDMAB7_s ALT_USB_DEV_DIEPDMAB7_t;
70682 #endif /* __ASSEMBLY__ */
70683 
70684 /* The byte offset of the ALT_USB_DEV_DIEPDMAB7 register from the beginning of the component. */
70685 #define ALT_USB_DEV_DIEPDMAB7_OFST 0x1fc
70686 /* The address of the ALT_USB_DEV_DIEPDMAB7 register. */
70687 #define ALT_USB_DEV_DIEPDMAB7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB7_OFST))
70688 
70689 /*
70690  * Register : Device Control IN Endpoint 8 Control Register - diepctl8
70691  *
70692  * Endpoint_number: 8
70693  *
70694  * Register Layout
70695  *
70696  * Bits | Access | Reset | Description
70697  * :--------|:-------|:------|:--------------------
70698  * [10:0] | RW | 0x0 | Maximum Packet Size
70699  * [14:11] | ??? | 0x0 | *UNDEFINED*
70700  * [15] | RW | 0x0 | USB Active Endpoint
70701  * [16] | R | 0x0 | Endpoint Data PID
70702  * [17] | R | 0x0 | NAK Status
70703  * [19:18] | RW | 0x0 | Endpoint Type
70704  * [20] | ??? | 0x0 | *UNDEFINED*
70705  * [21] | R | 0x0 | STALL Handshake
70706  * [25:22] | RW | 0x0 | TxFIFO Number
70707  * [26] | W | 0x0 | Clear NAK
70708  * [27] | W | 0x0 | Set NAK
70709  * [28] | W | 0x0 | Set DATA0 PID
70710  * [29] | W | 0x0 | Set DATA1 PID
70711  * [30] | R | 0x0 | Endpoint Disable
70712  * [31] | R | 0x0 | Endpoint Enable
70713  *
70714  */
70715 /*
70716  * Field : Maximum Packet Size - mps
70717  *
70718  * Applies to IN and OUT endpoints. The application must program this field with
70719  * the maximum packet size for the current logical endpoint. This value is in
70720  * bytes.
70721  *
70722  * Field Access Macros:
70723  *
70724  */
70725 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_MPS register field. */
70726 #define ALT_USB_DEV_DIEPCTL8_MPS_LSB 0
70727 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_MPS register field. */
70728 #define ALT_USB_DEV_DIEPCTL8_MPS_MSB 10
70729 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_MPS register field. */
70730 #define ALT_USB_DEV_DIEPCTL8_MPS_WIDTH 11
70731 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_MPS register field value. */
70732 #define ALT_USB_DEV_DIEPCTL8_MPS_SET_MSK 0x000007ff
70733 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_MPS register field value. */
70734 #define ALT_USB_DEV_DIEPCTL8_MPS_CLR_MSK 0xfffff800
70735 /* The reset value of the ALT_USB_DEV_DIEPCTL8_MPS register field. */
70736 #define ALT_USB_DEV_DIEPCTL8_MPS_RESET 0x0
70737 /* Extracts the ALT_USB_DEV_DIEPCTL8_MPS field value from a register. */
70738 #define ALT_USB_DEV_DIEPCTL8_MPS_GET(value) (((value) & 0x000007ff) >> 0)
70739 /* Produces a ALT_USB_DEV_DIEPCTL8_MPS register field value suitable for setting the register. */
70740 #define ALT_USB_DEV_DIEPCTL8_MPS_SET(value) (((value) << 0) & 0x000007ff)
70741 
70742 /*
70743  * Field : USB Active Endpoint - usbactep
70744  *
70745  * Indicates whether this endpoint is active in the current configuration and
70746  * interface. The core clears this bit for all endpoints (other than EP 0) after
70747  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
70748  * commands, the application must program endpoint registers accordingly and set
70749  * this bit.
70750  *
70751  * Field Enumeration Values:
70752  *
70753  * Enum | Value | Description
70754  * :-------------------------------------|:------|:--------------------
70755  * ALT_USB_DEV_DIEPCTL8_USBACTEP_E_DISD | 0x0 | Not Active
70756  * ALT_USB_DEV_DIEPCTL8_USBACTEP_E_END | 0x1 | USB Active Endpoint
70757  *
70758  * Field Access Macros:
70759  *
70760  */
70761 /*
70762  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_USBACTEP
70763  *
70764  * Not Active
70765  */
70766 #define ALT_USB_DEV_DIEPCTL8_USBACTEP_E_DISD 0x0
70767 /*
70768  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_USBACTEP
70769  *
70770  * USB Active Endpoint
70771  */
70772 #define ALT_USB_DEV_DIEPCTL8_USBACTEP_E_END 0x1
70773 
70774 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_USBACTEP register field. */
70775 #define ALT_USB_DEV_DIEPCTL8_USBACTEP_LSB 15
70776 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_USBACTEP register field. */
70777 #define ALT_USB_DEV_DIEPCTL8_USBACTEP_MSB 15
70778 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_USBACTEP register field. */
70779 #define ALT_USB_DEV_DIEPCTL8_USBACTEP_WIDTH 1
70780 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_USBACTEP register field value. */
70781 #define ALT_USB_DEV_DIEPCTL8_USBACTEP_SET_MSK 0x00008000
70782 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_USBACTEP register field value. */
70783 #define ALT_USB_DEV_DIEPCTL8_USBACTEP_CLR_MSK 0xffff7fff
70784 /* The reset value of the ALT_USB_DEV_DIEPCTL8_USBACTEP register field. */
70785 #define ALT_USB_DEV_DIEPCTL8_USBACTEP_RESET 0x0
70786 /* Extracts the ALT_USB_DEV_DIEPCTL8_USBACTEP field value from a register. */
70787 #define ALT_USB_DEV_DIEPCTL8_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
70788 /* Produces a ALT_USB_DEV_DIEPCTL8_USBACTEP register field value suitable for setting the register. */
70789 #define ALT_USB_DEV_DIEPCTL8_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
70790 
70791 /*
70792  * Field : Endpoint Data PID - dpid
70793  *
70794  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
70795  * packet to be received or transmitted on this endpoint. The application must
70796  * program the PID of the first packet to be received or transmitted on this
70797  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
70798  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
70799  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
70800  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
70801  * DMA mode:
70802  *
70803  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
70804  * number in which the core transmits/receives isochronous data for this endpoint.
70805  * The application must program the even/odd (micro) frame number in which it
70806  * intends to transmit/receive isochronous data for this endpoint using the
70807  * SetEvnFr and SetOddFr fields in this register.
70808  *
70809  * 0: Even (micro)frame
70810  *
70811  * 1: Odd (micro)frame
70812  *
70813  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
70814  * number in which to send data is provided in the transmit descriptor structure.
70815  * The frame in which data is received is updated in receive descriptor structure.
70816  *
70817  * Field Enumeration Values:
70818  *
70819  * Enum | Value | Description
70820  * :----------------------------------|:------|:-----------------------------
70821  * ALT_USB_DEV_DIEPCTL8_DPID_E_INACT | 0x0 | Endpoint Data PID not active
70822  * ALT_USB_DEV_DIEPCTL8_DPID_E_ACT | 0x1 | Endpoint Data PID active
70823  *
70824  * Field Access Macros:
70825  *
70826  */
70827 /*
70828  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_DPID
70829  *
70830  * Endpoint Data PID not active
70831  */
70832 #define ALT_USB_DEV_DIEPCTL8_DPID_E_INACT 0x0
70833 /*
70834  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_DPID
70835  *
70836  * Endpoint Data PID active
70837  */
70838 #define ALT_USB_DEV_DIEPCTL8_DPID_E_ACT 0x1
70839 
70840 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_DPID register field. */
70841 #define ALT_USB_DEV_DIEPCTL8_DPID_LSB 16
70842 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_DPID register field. */
70843 #define ALT_USB_DEV_DIEPCTL8_DPID_MSB 16
70844 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_DPID register field. */
70845 #define ALT_USB_DEV_DIEPCTL8_DPID_WIDTH 1
70846 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_DPID register field value. */
70847 #define ALT_USB_DEV_DIEPCTL8_DPID_SET_MSK 0x00010000
70848 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_DPID register field value. */
70849 #define ALT_USB_DEV_DIEPCTL8_DPID_CLR_MSK 0xfffeffff
70850 /* The reset value of the ALT_USB_DEV_DIEPCTL8_DPID register field. */
70851 #define ALT_USB_DEV_DIEPCTL8_DPID_RESET 0x0
70852 /* Extracts the ALT_USB_DEV_DIEPCTL8_DPID field value from a register. */
70853 #define ALT_USB_DEV_DIEPCTL8_DPID_GET(value) (((value) & 0x00010000) >> 16)
70854 /* Produces a ALT_USB_DEV_DIEPCTL8_DPID register field value suitable for setting the register. */
70855 #define ALT_USB_DEV_DIEPCTL8_DPID_SET(value) (((value) << 16) & 0x00010000)
70856 
70857 /*
70858  * Field : NAK Status - naksts
70859  *
70860  * When either the application or the core sets this bit:
70861  *
70862  * * The core stops receiving any data on an OUT endpoint, even if there is space
70863  * in the RxFIFO to accommodate the incoming packet.
70864  *
70865  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
70866  * IN endpoint, even if there data is available in the TxFIFO.
70867  *
70868  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
70869  * even if there data is available in the TxFIFO.
70870  *
70871  * Irrespective of this bit's setting, the core always responds to SETUP data
70872  * packets with an ACK handshake.
70873  *
70874  * Field Enumeration Values:
70875  *
70876  * Enum | Value | Description
70877  * :-------------------------------------|:------|:------------------------------------------------
70878  * ALT_USB_DEV_DIEPCTL8_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
70879  * : | | based on the FIFO status
70880  * ALT_USB_DEV_DIEPCTL8_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
70881  * : | | endpoint
70882  *
70883  * Field Access Macros:
70884  *
70885  */
70886 /*
70887  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_NAKSTS
70888  *
70889  * The core is transmitting non-NAK handshakes based on the FIFO status
70890  */
70891 #define ALT_USB_DEV_DIEPCTL8_NAKSTS_E_NONNAK 0x0
70892 /*
70893  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_NAKSTS
70894  *
70895  * The core is transmitting NAK handshakes on this endpoint
70896  */
70897 #define ALT_USB_DEV_DIEPCTL8_NAKSTS_E_NAK 0x1
70898 
70899 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_NAKSTS register field. */
70900 #define ALT_USB_DEV_DIEPCTL8_NAKSTS_LSB 17
70901 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_NAKSTS register field. */
70902 #define ALT_USB_DEV_DIEPCTL8_NAKSTS_MSB 17
70903 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_NAKSTS register field. */
70904 #define ALT_USB_DEV_DIEPCTL8_NAKSTS_WIDTH 1
70905 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_NAKSTS register field value. */
70906 #define ALT_USB_DEV_DIEPCTL8_NAKSTS_SET_MSK 0x00020000
70907 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_NAKSTS register field value. */
70908 #define ALT_USB_DEV_DIEPCTL8_NAKSTS_CLR_MSK 0xfffdffff
70909 /* The reset value of the ALT_USB_DEV_DIEPCTL8_NAKSTS register field. */
70910 #define ALT_USB_DEV_DIEPCTL8_NAKSTS_RESET 0x0
70911 /* Extracts the ALT_USB_DEV_DIEPCTL8_NAKSTS field value from a register. */
70912 #define ALT_USB_DEV_DIEPCTL8_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
70913 /* Produces a ALT_USB_DEV_DIEPCTL8_NAKSTS register field value suitable for setting the register. */
70914 #define ALT_USB_DEV_DIEPCTL8_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
70915 
70916 /*
70917  * Field : Endpoint Type - eptype
70918  *
70919  * This is the transfer type supported by this logical endpoint.
70920  *
70921  * Field Enumeration Values:
70922  *
70923  * Enum | Value | Description
70924  * :------------------------------------------|:------|:------------
70925  * ALT_USB_DEV_DIEPCTL8_EPTYPE_E_CTL | 0x0 | Control
70926  * ALT_USB_DEV_DIEPCTL8_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
70927  * ALT_USB_DEV_DIEPCTL8_EPTYPE_E_BULK | 0x2 | Bulk
70928  * ALT_USB_DEV_DIEPCTL8_EPTYPE_E_INTERRUP | 0x3 | Interrupt
70929  *
70930  * Field Access Macros:
70931  *
70932  */
70933 /*
70934  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_EPTYPE
70935  *
70936  * Control
70937  */
70938 #define ALT_USB_DEV_DIEPCTL8_EPTYPE_E_CTL 0x0
70939 /*
70940  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_EPTYPE
70941  *
70942  * Isochronous
70943  */
70944 #define ALT_USB_DEV_DIEPCTL8_EPTYPE_E_ISOCHRONOUS 0x1
70945 /*
70946  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_EPTYPE
70947  *
70948  * Bulk
70949  */
70950 #define ALT_USB_DEV_DIEPCTL8_EPTYPE_E_BULK 0x2
70951 /*
70952  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_EPTYPE
70953  *
70954  * Interrupt
70955  */
70956 #define ALT_USB_DEV_DIEPCTL8_EPTYPE_E_INTERRUP 0x3
70957 
70958 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_EPTYPE register field. */
70959 #define ALT_USB_DEV_DIEPCTL8_EPTYPE_LSB 18
70960 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_EPTYPE register field. */
70961 #define ALT_USB_DEV_DIEPCTL8_EPTYPE_MSB 19
70962 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_EPTYPE register field. */
70963 #define ALT_USB_DEV_DIEPCTL8_EPTYPE_WIDTH 2
70964 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_EPTYPE register field value. */
70965 #define ALT_USB_DEV_DIEPCTL8_EPTYPE_SET_MSK 0x000c0000
70966 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_EPTYPE register field value. */
70967 #define ALT_USB_DEV_DIEPCTL8_EPTYPE_CLR_MSK 0xfff3ffff
70968 /* The reset value of the ALT_USB_DEV_DIEPCTL8_EPTYPE register field. */
70969 #define ALT_USB_DEV_DIEPCTL8_EPTYPE_RESET 0x0
70970 /* Extracts the ALT_USB_DEV_DIEPCTL8_EPTYPE field value from a register. */
70971 #define ALT_USB_DEV_DIEPCTL8_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
70972 /* Produces a ALT_USB_DEV_DIEPCTL8_EPTYPE register field value suitable for setting the register. */
70973 #define ALT_USB_DEV_DIEPCTL8_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
70974 
70975 /*
70976  * Field : STALL Handshake - stall
70977  *
70978  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
70979  * application sets this bit to stall all tokens from the USB host to this
70980  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
70981  * along with this bit, the STALL bit takes priority. Only the application can
70982  * clear this bit, never the core. Applies to control endpoints only. The
70983  * application can only set this bit, and the core clears it, when a SETUP token is
70984  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
70985  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
70986  * of this bit's setting, the core always responds to SETUP data packets with an
70987  * ACK handshake.
70988  *
70989  * Field Enumeration Values:
70990  *
70991  * Enum | Value | Description
70992  * :-----------------------------------|:------|:----------------------------
70993  * ALT_USB_DEV_DIEPCTL8_STALL_E_INACT | 0x0 | STALL All Tokens not active
70994  * ALT_USB_DEV_DIEPCTL8_STALL_E_ACT | 0x1 | STALL All Tokens active
70995  *
70996  * Field Access Macros:
70997  *
70998  */
70999 /*
71000  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_STALL
71001  *
71002  * STALL All Tokens not active
71003  */
71004 #define ALT_USB_DEV_DIEPCTL8_STALL_E_INACT 0x0
71005 /*
71006  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_STALL
71007  *
71008  * STALL All Tokens active
71009  */
71010 #define ALT_USB_DEV_DIEPCTL8_STALL_E_ACT 0x1
71011 
71012 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_STALL register field. */
71013 #define ALT_USB_DEV_DIEPCTL8_STALL_LSB 21
71014 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_STALL register field. */
71015 #define ALT_USB_DEV_DIEPCTL8_STALL_MSB 21
71016 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_STALL register field. */
71017 #define ALT_USB_DEV_DIEPCTL8_STALL_WIDTH 1
71018 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_STALL register field value. */
71019 #define ALT_USB_DEV_DIEPCTL8_STALL_SET_MSK 0x00200000
71020 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_STALL register field value. */
71021 #define ALT_USB_DEV_DIEPCTL8_STALL_CLR_MSK 0xffdfffff
71022 /* The reset value of the ALT_USB_DEV_DIEPCTL8_STALL register field. */
71023 #define ALT_USB_DEV_DIEPCTL8_STALL_RESET 0x0
71024 /* Extracts the ALT_USB_DEV_DIEPCTL8_STALL field value from a register. */
71025 #define ALT_USB_DEV_DIEPCTL8_STALL_GET(value) (((value) & 0x00200000) >> 21)
71026 /* Produces a ALT_USB_DEV_DIEPCTL8_STALL register field value suitable for setting the register. */
71027 #define ALT_USB_DEV_DIEPCTL8_STALL_SET(value) (((value) << 21) & 0x00200000)
71028 
71029 /*
71030  * Field : TxFIFO Number - txfnum
71031  *
71032  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
71033  * endpoints must map this to the corresponding Periodic TxFIFO number.
71034  *
71035  * 4'h0: Non-Periodic TxFIFO
71036  *
71037  * Others: Specified Periodic TxFIFO.number
71038  *
71039  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
71040  * applications such as mass storage. The core treats an IN endpoint as a non-
71041  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
71042  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
71043  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
71044  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
71045  * This field is valid only for IN endpoints.
71046  *
71047  * Field Access Macros:
71048  *
71049  */
71050 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_TXFNUM register field. */
71051 #define ALT_USB_DEV_DIEPCTL8_TXFNUM_LSB 22
71052 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_TXFNUM register field. */
71053 #define ALT_USB_DEV_DIEPCTL8_TXFNUM_MSB 25
71054 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_TXFNUM register field. */
71055 #define ALT_USB_DEV_DIEPCTL8_TXFNUM_WIDTH 4
71056 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_TXFNUM register field value. */
71057 #define ALT_USB_DEV_DIEPCTL8_TXFNUM_SET_MSK 0x03c00000
71058 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_TXFNUM register field value. */
71059 #define ALT_USB_DEV_DIEPCTL8_TXFNUM_CLR_MSK 0xfc3fffff
71060 /* The reset value of the ALT_USB_DEV_DIEPCTL8_TXFNUM register field. */
71061 #define ALT_USB_DEV_DIEPCTL8_TXFNUM_RESET 0x0
71062 /* Extracts the ALT_USB_DEV_DIEPCTL8_TXFNUM field value from a register. */
71063 #define ALT_USB_DEV_DIEPCTL8_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
71064 /* Produces a ALT_USB_DEV_DIEPCTL8_TXFNUM register field value suitable for setting the register. */
71065 #define ALT_USB_DEV_DIEPCTL8_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
71066 
71067 /*
71068  * Field : Clear NAK - cnak
71069  *
71070  * A write to this bit clears the NAK bit for the endpoint.
71071  *
71072  * Field Enumeration Values:
71073  *
71074  * Enum | Value | Description
71075  * :----------------------------------|:------|:-------------
71076  * ALT_USB_DEV_DIEPCTL8_CNAK_E_INACT | 0x0 | No Clear NAK
71077  * ALT_USB_DEV_DIEPCTL8_CNAK_E_ACT | 0x1 | Clear NAK
71078  *
71079  * Field Access Macros:
71080  *
71081  */
71082 /*
71083  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_CNAK
71084  *
71085  * No Clear NAK
71086  */
71087 #define ALT_USB_DEV_DIEPCTL8_CNAK_E_INACT 0x0
71088 /*
71089  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_CNAK
71090  *
71091  * Clear NAK
71092  */
71093 #define ALT_USB_DEV_DIEPCTL8_CNAK_E_ACT 0x1
71094 
71095 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_CNAK register field. */
71096 #define ALT_USB_DEV_DIEPCTL8_CNAK_LSB 26
71097 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_CNAK register field. */
71098 #define ALT_USB_DEV_DIEPCTL8_CNAK_MSB 26
71099 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_CNAK register field. */
71100 #define ALT_USB_DEV_DIEPCTL8_CNAK_WIDTH 1
71101 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_CNAK register field value. */
71102 #define ALT_USB_DEV_DIEPCTL8_CNAK_SET_MSK 0x04000000
71103 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_CNAK register field value. */
71104 #define ALT_USB_DEV_DIEPCTL8_CNAK_CLR_MSK 0xfbffffff
71105 /* The reset value of the ALT_USB_DEV_DIEPCTL8_CNAK register field. */
71106 #define ALT_USB_DEV_DIEPCTL8_CNAK_RESET 0x0
71107 /* Extracts the ALT_USB_DEV_DIEPCTL8_CNAK field value from a register. */
71108 #define ALT_USB_DEV_DIEPCTL8_CNAK_GET(value) (((value) & 0x04000000) >> 26)
71109 /* Produces a ALT_USB_DEV_DIEPCTL8_CNAK register field value suitable for setting the register. */
71110 #define ALT_USB_DEV_DIEPCTL8_CNAK_SET(value) (((value) << 26) & 0x04000000)
71111 
71112 /*
71113  * Field : Set NAK - snak
71114  *
71115  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
71116  * application can control the transmission of NAK handshakes on an endpoint. The
71117  * core can also Set this bit for an endpoint after a SETUP packet is received on
71118  * that endpoint.
71119  *
71120  * Field Enumeration Values:
71121  *
71122  * Enum | Value | Description
71123  * :----------------------------------|:------|:------------
71124  * ALT_USB_DEV_DIEPCTL8_SNAK_E_INACT | 0x0 | No Set NAK
71125  * ALT_USB_DEV_DIEPCTL8_SNAK_E_ACT | 0x1 | Set NAK
71126  *
71127  * Field Access Macros:
71128  *
71129  */
71130 /*
71131  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_SNAK
71132  *
71133  * No Set NAK
71134  */
71135 #define ALT_USB_DEV_DIEPCTL8_SNAK_E_INACT 0x0
71136 /*
71137  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_SNAK
71138  *
71139  * Set NAK
71140  */
71141 #define ALT_USB_DEV_DIEPCTL8_SNAK_E_ACT 0x1
71142 
71143 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_SNAK register field. */
71144 #define ALT_USB_DEV_DIEPCTL8_SNAK_LSB 27
71145 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_SNAK register field. */
71146 #define ALT_USB_DEV_DIEPCTL8_SNAK_MSB 27
71147 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_SNAK register field. */
71148 #define ALT_USB_DEV_DIEPCTL8_SNAK_WIDTH 1
71149 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_SNAK register field value. */
71150 #define ALT_USB_DEV_DIEPCTL8_SNAK_SET_MSK 0x08000000
71151 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_SNAK register field value. */
71152 #define ALT_USB_DEV_DIEPCTL8_SNAK_CLR_MSK 0xf7ffffff
71153 /* The reset value of the ALT_USB_DEV_DIEPCTL8_SNAK register field. */
71154 #define ALT_USB_DEV_DIEPCTL8_SNAK_RESET 0x0
71155 /* Extracts the ALT_USB_DEV_DIEPCTL8_SNAK field value from a register. */
71156 #define ALT_USB_DEV_DIEPCTL8_SNAK_GET(value) (((value) & 0x08000000) >> 27)
71157 /* Produces a ALT_USB_DEV_DIEPCTL8_SNAK register field value suitable for setting the register. */
71158 #define ALT_USB_DEV_DIEPCTL8_SNAK_SET(value) (((value) << 27) & 0x08000000)
71159 
71160 /*
71161  * Field : Set DATA0 PID - setd0pid
71162  *
71163  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
71164  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
71165  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
71166  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
71167  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
71168  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
71169  * mode is enabled, this field is reserved. The frame number in which to send data
71170  * is in the transmit descriptor structure. The frame in which to receive data is
71171  * updated in receive descriptor structure.
71172  *
71173  * Field Enumeration Values:
71174  *
71175  * Enum | Value | Description
71176  * :-------------------------------------|:------|:----------------------------
71177  * ALT_USB_DEV_DIEPCTL8_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
71178  * ALT_USB_DEV_DIEPCTL8_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
71179  *
71180  * Field Access Macros:
71181  *
71182  */
71183 /*
71184  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_SETD0PID
71185  *
71186  * Disables Set DATA0 PID
71187  */
71188 #define ALT_USB_DEV_DIEPCTL8_SETD0PID_E_DISD 0x0
71189 /*
71190  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_SETD0PID
71191  *
71192  * Endpoint Data PID to DATA0)
71193  */
71194 #define ALT_USB_DEV_DIEPCTL8_SETD0PID_E_END 0x1
71195 
71196 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_SETD0PID register field. */
71197 #define ALT_USB_DEV_DIEPCTL8_SETD0PID_LSB 28
71198 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_SETD0PID register field. */
71199 #define ALT_USB_DEV_DIEPCTL8_SETD0PID_MSB 28
71200 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_SETD0PID register field. */
71201 #define ALT_USB_DEV_DIEPCTL8_SETD0PID_WIDTH 1
71202 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_SETD0PID register field value. */
71203 #define ALT_USB_DEV_DIEPCTL8_SETD0PID_SET_MSK 0x10000000
71204 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_SETD0PID register field value. */
71205 #define ALT_USB_DEV_DIEPCTL8_SETD0PID_CLR_MSK 0xefffffff
71206 /* The reset value of the ALT_USB_DEV_DIEPCTL8_SETD0PID register field. */
71207 #define ALT_USB_DEV_DIEPCTL8_SETD0PID_RESET 0x0
71208 /* Extracts the ALT_USB_DEV_DIEPCTL8_SETD0PID field value from a register. */
71209 #define ALT_USB_DEV_DIEPCTL8_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
71210 /* Produces a ALT_USB_DEV_DIEPCTL8_SETD0PID register field value suitable for setting the register. */
71211 #define ALT_USB_DEV_DIEPCTL8_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
71212 
71213 /*
71214  * Field : Set DATA1 PID - setd1pid
71215  *
71216  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
71217  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
71218  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
71219  *
71220  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
71221  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
71222  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
71223  *
71224  * Field Enumeration Values:
71225  *
71226  * Enum | Value | Description
71227  * :-------------------------------------|:------|:-----------------------
71228  * ALT_USB_DEV_DIEPCTL8_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
71229  * ALT_USB_DEV_DIEPCTL8_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
71230  *
71231  * Field Access Macros:
71232  *
71233  */
71234 /*
71235  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_SETD1PID
71236  *
71237  * Disables Set DATA1 PID
71238  */
71239 #define ALT_USB_DEV_DIEPCTL8_SETD1PID_E_DISD 0x0
71240 /*
71241  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_SETD1PID
71242  *
71243  * Enables Set DATA1 PID
71244  */
71245 #define ALT_USB_DEV_DIEPCTL8_SETD1PID_E_END 0x1
71246 
71247 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_SETD1PID register field. */
71248 #define ALT_USB_DEV_DIEPCTL8_SETD1PID_LSB 29
71249 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_SETD1PID register field. */
71250 #define ALT_USB_DEV_DIEPCTL8_SETD1PID_MSB 29
71251 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_SETD1PID register field. */
71252 #define ALT_USB_DEV_DIEPCTL8_SETD1PID_WIDTH 1
71253 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_SETD1PID register field value. */
71254 #define ALT_USB_DEV_DIEPCTL8_SETD1PID_SET_MSK 0x20000000
71255 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_SETD1PID register field value. */
71256 #define ALT_USB_DEV_DIEPCTL8_SETD1PID_CLR_MSK 0xdfffffff
71257 /* The reset value of the ALT_USB_DEV_DIEPCTL8_SETD1PID register field. */
71258 #define ALT_USB_DEV_DIEPCTL8_SETD1PID_RESET 0x0
71259 /* Extracts the ALT_USB_DEV_DIEPCTL8_SETD1PID field value from a register. */
71260 #define ALT_USB_DEV_DIEPCTL8_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
71261 /* Produces a ALT_USB_DEV_DIEPCTL8_SETD1PID register field value suitable for setting the register. */
71262 #define ALT_USB_DEV_DIEPCTL8_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
71263 
71264 /*
71265  * Field : Endpoint Disable - epdis
71266  *
71267  * Applies to IN and OUT endpoints. The application sets this bit to stop
71268  * transmitting/receiving data on an endpoint, even before the transfer for that
71269  * endpoint is complete. The application must wait for the Endpoint Disabled
71270  * interrupt before treating the endpoint as disabled. The core clears this bit
71271  * before setting the Endpoint Disabled interrupt. The application must set this
71272  * bit only if Endpoint Enable is already set for this endpoint.
71273  *
71274  * Field Enumeration Values:
71275  *
71276  * Enum | Value | Description
71277  * :-----------------------------------|:------|:--------------------
71278  * ALT_USB_DEV_DIEPCTL8_EPDIS_E_INACT | 0x0 | No Endpoint Disable
71279  * ALT_USB_DEV_DIEPCTL8_EPDIS_E_ACT | 0x1 | Endpoint Disable
71280  *
71281  * Field Access Macros:
71282  *
71283  */
71284 /*
71285  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_EPDIS
71286  *
71287  * No Endpoint Disable
71288  */
71289 #define ALT_USB_DEV_DIEPCTL8_EPDIS_E_INACT 0x0
71290 /*
71291  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_EPDIS
71292  *
71293  * Endpoint Disable
71294  */
71295 #define ALT_USB_DEV_DIEPCTL8_EPDIS_E_ACT 0x1
71296 
71297 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_EPDIS register field. */
71298 #define ALT_USB_DEV_DIEPCTL8_EPDIS_LSB 30
71299 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_EPDIS register field. */
71300 #define ALT_USB_DEV_DIEPCTL8_EPDIS_MSB 30
71301 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_EPDIS register field. */
71302 #define ALT_USB_DEV_DIEPCTL8_EPDIS_WIDTH 1
71303 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_EPDIS register field value. */
71304 #define ALT_USB_DEV_DIEPCTL8_EPDIS_SET_MSK 0x40000000
71305 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_EPDIS register field value. */
71306 #define ALT_USB_DEV_DIEPCTL8_EPDIS_CLR_MSK 0xbfffffff
71307 /* The reset value of the ALT_USB_DEV_DIEPCTL8_EPDIS register field. */
71308 #define ALT_USB_DEV_DIEPCTL8_EPDIS_RESET 0x0
71309 /* Extracts the ALT_USB_DEV_DIEPCTL8_EPDIS field value from a register. */
71310 #define ALT_USB_DEV_DIEPCTL8_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
71311 /* Produces a ALT_USB_DEV_DIEPCTL8_EPDIS register field value suitable for setting the register. */
71312 #define ALT_USB_DEV_DIEPCTL8_EPDIS_SET(value) (((value) << 30) & 0x40000000)
71313 
71314 /*
71315  * Field : Endpoint Enable - epena
71316  *
71317  * Applies to IN and OUT endpoints.
71318  *
71319  * * When Scatter/Gather DMA mode is enabled,
71320  *
71321  * * for IN endpoints this bit indicates that the descriptor structure and data
71322  * buffer with data ready to transmit is setup.
71323  *
71324  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
71325  * receive data is setup.
71326  *
71327  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
71328  * mode:
71329  *
71330  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
71331  * the endpoint.
71332  *
71333  * * for OUT endpoints, this bit indicates that the application has allocated the
71334  * memory to start receiving data from the USB.
71335  *
71336  * * The core clears this bit before setting any of the following interrupts on
71337  * this endpoint:
71338  *
71339  * * SETUP Phase Done
71340  *
71341  * * Endpoint Disabled
71342  *
71343  * * Transfer Completed
71344  *
71345  * for control endpoints in DMA mode, this bit must be set to be able to transfer
71346  * SETUP data packets in memory.
71347  *
71348  * Field Enumeration Values:
71349  *
71350  * Enum | Value | Description
71351  * :-----------------------------------|:------|:-------------------------
71352  * ALT_USB_DEV_DIEPCTL8_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
71353  * ALT_USB_DEV_DIEPCTL8_EPENA_E_ACT | 0x1 | Endpoint Enable active
71354  *
71355  * Field Access Macros:
71356  *
71357  */
71358 /*
71359  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_EPENA
71360  *
71361  * Endpoint Enable inactive
71362  */
71363 #define ALT_USB_DEV_DIEPCTL8_EPENA_E_INACT 0x0
71364 /*
71365  * Enumerated value for register field ALT_USB_DEV_DIEPCTL8_EPENA
71366  *
71367  * Endpoint Enable active
71368  */
71369 #define ALT_USB_DEV_DIEPCTL8_EPENA_E_ACT 0x1
71370 
71371 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL8_EPENA register field. */
71372 #define ALT_USB_DEV_DIEPCTL8_EPENA_LSB 31
71373 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL8_EPENA register field. */
71374 #define ALT_USB_DEV_DIEPCTL8_EPENA_MSB 31
71375 /* The width in bits of the ALT_USB_DEV_DIEPCTL8_EPENA register field. */
71376 #define ALT_USB_DEV_DIEPCTL8_EPENA_WIDTH 1
71377 /* The mask used to set the ALT_USB_DEV_DIEPCTL8_EPENA register field value. */
71378 #define ALT_USB_DEV_DIEPCTL8_EPENA_SET_MSK 0x80000000
71379 /* The mask used to clear the ALT_USB_DEV_DIEPCTL8_EPENA register field value. */
71380 #define ALT_USB_DEV_DIEPCTL8_EPENA_CLR_MSK 0x7fffffff
71381 /* The reset value of the ALT_USB_DEV_DIEPCTL8_EPENA register field. */
71382 #define ALT_USB_DEV_DIEPCTL8_EPENA_RESET 0x0
71383 /* Extracts the ALT_USB_DEV_DIEPCTL8_EPENA field value from a register. */
71384 #define ALT_USB_DEV_DIEPCTL8_EPENA_GET(value) (((value) & 0x80000000) >> 31)
71385 /* Produces a ALT_USB_DEV_DIEPCTL8_EPENA register field value suitable for setting the register. */
71386 #define ALT_USB_DEV_DIEPCTL8_EPENA_SET(value) (((value) << 31) & 0x80000000)
71387 
71388 #ifndef __ASSEMBLY__
71389 /*
71390  * WARNING: The C register and register group struct declarations are provided for
71391  * convenience and illustrative purposes. They should, however, be used with
71392  * caution as the C language standard provides no guarantees about the alignment or
71393  * atomicity of device memory accesses. The recommended practice for writing
71394  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
71395  * alt_write_word() functions.
71396  *
71397  * The struct declaration for register ALT_USB_DEV_DIEPCTL8.
71398  */
71399 struct ALT_USB_DEV_DIEPCTL8_s
71400 {
71401  uint32_t mps : 11; /* Maximum Packet Size */
71402  uint32_t : 4; /* *UNDEFINED* */
71403  uint32_t usbactep : 1; /* USB Active Endpoint */
71404  const uint32_t dpid : 1; /* Endpoint Data PID */
71405  const uint32_t naksts : 1; /* NAK Status */
71406  uint32_t eptype : 2; /* Endpoint Type */
71407  uint32_t : 1; /* *UNDEFINED* */
71408  const uint32_t stall : 1; /* STALL Handshake */
71409  uint32_t txfnum : 4; /* TxFIFO Number */
71410  uint32_t cnak : 1; /* Clear NAK */
71411  uint32_t snak : 1; /* Set NAK */
71412  uint32_t setd0pid : 1; /* Set DATA0 PID */
71413  uint32_t setd1pid : 1; /* Set DATA1 PID */
71414  const uint32_t epdis : 1; /* Endpoint Disable */
71415  const uint32_t epena : 1; /* Endpoint Enable */
71416 };
71417 
71418 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL8. */
71419 typedef volatile struct ALT_USB_DEV_DIEPCTL8_s ALT_USB_DEV_DIEPCTL8_t;
71420 #endif /* __ASSEMBLY__ */
71421 
71422 /* The byte offset of the ALT_USB_DEV_DIEPCTL8 register from the beginning of the component. */
71423 #define ALT_USB_DEV_DIEPCTL8_OFST 0x200
71424 /* The address of the ALT_USB_DEV_DIEPCTL8 register. */
71425 #define ALT_USB_DEV_DIEPCTL8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL8_OFST))
71426 
71427 /*
71428  * Register : Device IN Endpoint 8 Interrupt Register - diepint8
71429  *
71430  * This register indicates the status of an endpoint with respect to USB- and AHB-
71431  * related events. The application must read this register when the OUT Endpoints
71432  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
71433  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
71434  * can read this register, it must first read the Device All Endpoints Interrupt
71435  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
71436  * Interrupt register. The application must clear the appropriate bit in this
71437  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
71438  *
71439  * Register Layout
71440  *
71441  * Bits | Access | Reset | Description
71442  * :--------|:-------|:------|:---------------------------------------
71443  * [0] | R | 0x0 | Transfer Completed Interrupt
71444  * [1] | R | 0x0 | Endpoint Disabled Interrupt
71445  * [2] | R | 0x0 | AHB Error
71446  * [3] | R | 0x0 | Timeout Condition
71447  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
71448  * [5] | R | 0x0 | IN Token Received with EP Mismatch
71449  * [6] | R | 0x0 | IN Endpoint NAK Effective
71450  * [7] | R | 0x1 | Transmit FIFO Empty
71451  * [8] | R | 0x0 | Fifo Underrun
71452  * [9] | R | 0x0 | BNA Interrupt
71453  * [10] | ??? | 0x0 | *UNDEFINED*
71454  * [11] | R | 0x0 | Packet Drop Status
71455  * [12] | R | 0x0 | BbleErr Interrupt (
71456  * [13] | R | 0x0 | NAK Interrupt
71457  * [14] | R | 0x0 | NYET Interrupt
71458  * [31:15] | ??? | 0x0 | *UNDEFINED*
71459  *
71460  */
71461 /*
71462  * Field : Transfer Completed Interrupt - xfercompl
71463  *
71464  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
71465  *
71466  * * for IN endpoint this field indicates that the requested data from the
71467  * descriptor is moved from external system memory to internal FIFO.
71468  *
71469  * * for OUT endpoint this field indicates that the requested data from the
71470  * internal FIFO is moved to external system memory. This interrupt is generated
71471  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
71472  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
71473  * this field indicates that the programmed transfer is complete on the AHB as
71474  * well as on the USB, for this endpoint.
71475  *
71476  * Field Enumeration Values:
71477  *
71478  * Enum | Value | Description
71479  * :---------------------------------------|:------|:-----------------------------
71480  * ALT_USB_DEV_DIEPINT8_XFERCOMPL_E_INACT | 0x0 | No Interrupt
71481  * ALT_USB_DEV_DIEPINT8_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
71482  *
71483  * Field Access Macros:
71484  *
71485  */
71486 /*
71487  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_XFERCOMPL
71488  *
71489  * No Interrupt
71490  */
71491 #define ALT_USB_DEV_DIEPINT8_XFERCOMPL_E_INACT 0x0
71492 /*
71493  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_XFERCOMPL
71494  *
71495  * Transfer Completed Interrupt
71496  */
71497 #define ALT_USB_DEV_DIEPINT8_XFERCOMPL_E_ACT 0x1
71498 
71499 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_XFERCOMPL register field. */
71500 #define ALT_USB_DEV_DIEPINT8_XFERCOMPL_LSB 0
71501 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_XFERCOMPL register field. */
71502 #define ALT_USB_DEV_DIEPINT8_XFERCOMPL_MSB 0
71503 /* The width in bits of the ALT_USB_DEV_DIEPINT8_XFERCOMPL register field. */
71504 #define ALT_USB_DEV_DIEPINT8_XFERCOMPL_WIDTH 1
71505 /* The mask used to set the ALT_USB_DEV_DIEPINT8_XFERCOMPL register field value. */
71506 #define ALT_USB_DEV_DIEPINT8_XFERCOMPL_SET_MSK 0x00000001
71507 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_XFERCOMPL register field value. */
71508 #define ALT_USB_DEV_DIEPINT8_XFERCOMPL_CLR_MSK 0xfffffffe
71509 /* The reset value of the ALT_USB_DEV_DIEPINT8_XFERCOMPL register field. */
71510 #define ALT_USB_DEV_DIEPINT8_XFERCOMPL_RESET 0x0
71511 /* Extracts the ALT_USB_DEV_DIEPINT8_XFERCOMPL field value from a register. */
71512 #define ALT_USB_DEV_DIEPINT8_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
71513 /* Produces a ALT_USB_DEV_DIEPINT8_XFERCOMPL register field value suitable for setting the register. */
71514 #define ALT_USB_DEV_DIEPINT8_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
71515 
71516 /*
71517  * Field : Endpoint Disabled Interrupt - epdisbld
71518  *
71519  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
71520  * disabled per the application's request.
71521  *
71522  * Field Enumeration Values:
71523  *
71524  * Enum | Value | Description
71525  * :--------------------------------------|:------|:----------------------------
71526  * ALT_USB_DEV_DIEPINT8_EPDISBLD_E_INACT | 0x0 | No Interrupt
71527  * ALT_USB_DEV_DIEPINT8_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
71528  *
71529  * Field Access Macros:
71530  *
71531  */
71532 /*
71533  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_EPDISBLD
71534  *
71535  * No Interrupt
71536  */
71537 #define ALT_USB_DEV_DIEPINT8_EPDISBLD_E_INACT 0x0
71538 /*
71539  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_EPDISBLD
71540  *
71541  * Endpoint Disabled Interrupt
71542  */
71543 #define ALT_USB_DEV_DIEPINT8_EPDISBLD_E_ACT 0x1
71544 
71545 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_EPDISBLD register field. */
71546 #define ALT_USB_DEV_DIEPINT8_EPDISBLD_LSB 1
71547 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_EPDISBLD register field. */
71548 #define ALT_USB_DEV_DIEPINT8_EPDISBLD_MSB 1
71549 /* The width in bits of the ALT_USB_DEV_DIEPINT8_EPDISBLD register field. */
71550 #define ALT_USB_DEV_DIEPINT8_EPDISBLD_WIDTH 1
71551 /* The mask used to set the ALT_USB_DEV_DIEPINT8_EPDISBLD register field value. */
71552 #define ALT_USB_DEV_DIEPINT8_EPDISBLD_SET_MSK 0x00000002
71553 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_EPDISBLD register field value. */
71554 #define ALT_USB_DEV_DIEPINT8_EPDISBLD_CLR_MSK 0xfffffffd
71555 /* The reset value of the ALT_USB_DEV_DIEPINT8_EPDISBLD register field. */
71556 #define ALT_USB_DEV_DIEPINT8_EPDISBLD_RESET 0x0
71557 /* Extracts the ALT_USB_DEV_DIEPINT8_EPDISBLD field value from a register. */
71558 #define ALT_USB_DEV_DIEPINT8_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
71559 /* Produces a ALT_USB_DEV_DIEPINT8_EPDISBLD register field value suitable for setting the register. */
71560 #define ALT_USB_DEV_DIEPINT8_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
71561 
71562 /*
71563  * Field : AHB Error - ahberr
71564  *
71565  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
71566  * there is an AHB error during an AHB read/write. The application can read the
71567  * corresponding endpoint DMA address register to get the error address.
71568  *
71569  * Field Enumeration Values:
71570  *
71571  * Enum | Value | Description
71572  * :------------------------------------|:------|:--------------------
71573  * ALT_USB_DEV_DIEPINT8_AHBERR_E_INACT | 0x0 | No Interrupt
71574  * ALT_USB_DEV_DIEPINT8_AHBERR_E_ACT | 0x1 | AHB Error interrupt
71575  *
71576  * Field Access Macros:
71577  *
71578  */
71579 /*
71580  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_AHBERR
71581  *
71582  * No Interrupt
71583  */
71584 #define ALT_USB_DEV_DIEPINT8_AHBERR_E_INACT 0x0
71585 /*
71586  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_AHBERR
71587  *
71588  * AHB Error interrupt
71589  */
71590 #define ALT_USB_DEV_DIEPINT8_AHBERR_E_ACT 0x1
71591 
71592 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_AHBERR register field. */
71593 #define ALT_USB_DEV_DIEPINT8_AHBERR_LSB 2
71594 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_AHBERR register field. */
71595 #define ALT_USB_DEV_DIEPINT8_AHBERR_MSB 2
71596 /* The width in bits of the ALT_USB_DEV_DIEPINT8_AHBERR register field. */
71597 #define ALT_USB_DEV_DIEPINT8_AHBERR_WIDTH 1
71598 /* The mask used to set the ALT_USB_DEV_DIEPINT8_AHBERR register field value. */
71599 #define ALT_USB_DEV_DIEPINT8_AHBERR_SET_MSK 0x00000004
71600 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_AHBERR register field value. */
71601 #define ALT_USB_DEV_DIEPINT8_AHBERR_CLR_MSK 0xfffffffb
71602 /* The reset value of the ALT_USB_DEV_DIEPINT8_AHBERR register field. */
71603 #define ALT_USB_DEV_DIEPINT8_AHBERR_RESET 0x0
71604 /* Extracts the ALT_USB_DEV_DIEPINT8_AHBERR field value from a register. */
71605 #define ALT_USB_DEV_DIEPINT8_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
71606 /* Produces a ALT_USB_DEV_DIEPINT8_AHBERR register field value suitable for setting the register. */
71607 #define ALT_USB_DEV_DIEPINT8_AHBERR_SET(value) (((value) << 2) & 0x00000004)
71608 
71609 /*
71610  * Field : Timeout Condition - timeout
71611  *
71612  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
71613  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
71614  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
71615  * detected a timeout condition on the USB for the last IN token on this endpoint.
71616  *
71617  * Field Enumeration Values:
71618  *
71619  * Enum | Value | Description
71620  * :---------------------------------|:------|:------------------
71621  * ALT_USB_DEV_DIEPINT8_TMO_E_INACT | 0x0 | No interrupt
71622  * ALT_USB_DEV_DIEPINT8_TMO_E_ACT | 0x1 | Timeout interrupy
71623  *
71624  * Field Access Macros:
71625  *
71626  */
71627 /*
71628  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_TMO
71629  *
71630  * No interrupt
71631  */
71632 #define ALT_USB_DEV_DIEPINT8_TMO_E_INACT 0x0
71633 /*
71634  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_TMO
71635  *
71636  * Timeout interrupy
71637  */
71638 #define ALT_USB_DEV_DIEPINT8_TMO_E_ACT 0x1
71639 
71640 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_TMO register field. */
71641 #define ALT_USB_DEV_DIEPINT8_TMO_LSB 3
71642 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_TMO register field. */
71643 #define ALT_USB_DEV_DIEPINT8_TMO_MSB 3
71644 /* The width in bits of the ALT_USB_DEV_DIEPINT8_TMO register field. */
71645 #define ALT_USB_DEV_DIEPINT8_TMO_WIDTH 1
71646 /* The mask used to set the ALT_USB_DEV_DIEPINT8_TMO register field value. */
71647 #define ALT_USB_DEV_DIEPINT8_TMO_SET_MSK 0x00000008
71648 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_TMO register field value. */
71649 #define ALT_USB_DEV_DIEPINT8_TMO_CLR_MSK 0xfffffff7
71650 /* The reset value of the ALT_USB_DEV_DIEPINT8_TMO register field. */
71651 #define ALT_USB_DEV_DIEPINT8_TMO_RESET 0x0
71652 /* Extracts the ALT_USB_DEV_DIEPINT8_TMO field value from a register. */
71653 #define ALT_USB_DEV_DIEPINT8_TMO_GET(value) (((value) & 0x00000008) >> 3)
71654 /* Produces a ALT_USB_DEV_DIEPINT8_TMO register field value suitable for setting the register. */
71655 #define ALT_USB_DEV_DIEPINT8_TMO_SET(value) (((value) << 3) & 0x00000008)
71656 
71657 /*
71658  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
71659  *
71660  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
71661  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
71662  * interrupt is asserted on the endpoint for which the IN token was received.
71663  *
71664  * Field Enumeration Values:
71665  *
71666  * Enum | Value | Description
71667  * :-----------------------------------------|:------|:----------------------------
71668  * ALT_USB_DEV_DIEPINT8_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
71669  * ALT_USB_DEV_DIEPINT8_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
71670  *
71671  * Field Access Macros:
71672  *
71673  */
71674 /*
71675  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_INTKNTXFEMP
71676  *
71677  * No interrupt
71678  */
71679 #define ALT_USB_DEV_DIEPINT8_INTKNTXFEMP_E_INACT 0x0
71680 /*
71681  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_INTKNTXFEMP
71682  *
71683  * IN Token Received Interrupt
71684  */
71685 #define ALT_USB_DEV_DIEPINT8_INTKNTXFEMP_E_ACT 0x1
71686 
71687 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_INTKNTXFEMP register field. */
71688 #define ALT_USB_DEV_DIEPINT8_INTKNTXFEMP_LSB 4
71689 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_INTKNTXFEMP register field. */
71690 #define ALT_USB_DEV_DIEPINT8_INTKNTXFEMP_MSB 4
71691 /* The width in bits of the ALT_USB_DEV_DIEPINT8_INTKNTXFEMP register field. */
71692 #define ALT_USB_DEV_DIEPINT8_INTKNTXFEMP_WIDTH 1
71693 /* The mask used to set the ALT_USB_DEV_DIEPINT8_INTKNTXFEMP register field value. */
71694 #define ALT_USB_DEV_DIEPINT8_INTKNTXFEMP_SET_MSK 0x00000010
71695 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_INTKNTXFEMP register field value. */
71696 #define ALT_USB_DEV_DIEPINT8_INTKNTXFEMP_CLR_MSK 0xffffffef
71697 /* The reset value of the ALT_USB_DEV_DIEPINT8_INTKNTXFEMP register field. */
71698 #define ALT_USB_DEV_DIEPINT8_INTKNTXFEMP_RESET 0x0
71699 /* Extracts the ALT_USB_DEV_DIEPINT8_INTKNTXFEMP field value from a register. */
71700 #define ALT_USB_DEV_DIEPINT8_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
71701 /* Produces a ALT_USB_DEV_DIEPINT8_INTKNTXFEMP register field value suitable for setting the register. */
71702 #define ALT_USB_DEV_DIEPINT8_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
71703 
71704 /*
71705  * Field : IN Token Received with EP Mismatch - intknepmis
71706  *
71707  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
71708  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
71709  * IN token was received. This interrupt is asserted on the endpoint for which the
71710  * IN token was received.
71711  *
71712  * Field Enumeration Values:
71713  *
71714  * Enum | Value | Description
71715  * :----------------------------------------|:------|:---------------------------------------------
71716  * ALT_USB_DEV_DIEPINT8_INTKNEPMIS_E_INACT | 0x0 | No interrupt
71717  * ALT_USB_DEV_DIEPINT8_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
71718  *
71719  * Field Access Macros:
71720  *
71721  */
71722 /*
71723  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_INTKNEPMIS
71724  *
71725  * No interrupt
71726  */
71727 #define ALT_USB_DEV_DIEPINT8_INTKNEPMIS_E_INACT 0x0
71728 /*
71729  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_INTKNEPMIS
71730  *
71731  * IN Token Received with EP Mismatch interrupt
71732  */
71733 #define ALT_USB_DEV_DIEPINT8_INTKNEPMIS_E_ACT 0x1
71734 
71735 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_INTKNEPMIS register field. */
71736 #define ALT_USB_DEV_DIEPINT8_INTKNEPMIS_LSB 5
71737 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_INTKNEPMIS register field. */
71738 #define ALT_USB_DEV_DIEPINT8_INTKNEPMIS_MSB 5
71739 /* The width in bits of the ALT_USB_DEV_DIEPINT8_INTKNEPMIS register field. */
71740 #define ALT_USB_DEV_DIEPINT8_INTKNEPMIS_WIDTH 1
71741 /* The mask used to set the ALT_USB_DEV_DIEPINT8_INTKNEPMIS register field value. */
71742 #define ALT_USB_DEV_DIEPINT8_INTKNEPMIS_SET_MSK 0x00000020
71743 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_INTKNEPMIS register field value. */
71744 #define ALT_USB_DEV_DIEPINT8_INTKNEPMIS_CLR_MSK 0xffffffdf
71745 /* The reset value of the ALT_USB_DEV_DIEPINT8_INTKNEPMIS register field. */
71746 #define ALT_USB_DEV_DIEPINT8_INTKNEPMIS_RESET 0x0
71747 /* Extracts the ALT_USB_DEV_DIEPINT8_INTKNEPMIS field value from a register. */
71748 #define ALT_USB_DEV_DIEPINT8_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
71749 /* Produces a ALT_USB_DEV_DIEPINT8_INTKNEPMIS register field value suitable for setting the register. */
71750 #define ALT_USB_DEV_DIEPINT8_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
71751 
71752 /*
71753  * Field : IN Endpoint NAK Effective - inepnakeff
71754  *
71755  * Applies to periodic IN endpoints only. This bit can be cleared when the
71756  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
71757  * interrupt indicates that the core has sampled the NAK bit Set (either by the
71758  * application or by the core). The interrupt indicates that the IN endpoint NAK
71759  * bit Set by the application has taken effect in the core.This interrupt does not
71760  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
71761  * over a NAK bit.
71762  *
71763  * Field Enumeration Values:
71764  *
71765  * Enum | Value | Description
71766  * :----------------------------------------|:------|:------------------------------------
71767  * ALT_USB_DEV_DIEPINT8_INEPNAKEFF_E_INACT | 0x0 | No interrupt
71768  * ALT_USB_DEV_DIEPINT8_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
71769  *
71770  * Field Access Macros:
71771  *
71772  */
71773 /*
71774  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_INEPNAKEFF
71775  *
71776  * No interrupt
71777  */
71778 #define ALT_USB_DEV_DIEPINT8_INEPNAKEFF_E_INACT 0x0
71779 /*
71780  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_INEPNAKEFF
71781  *
71782  * IN Endpoint NAK Effective interrupt
71783  */
71784 #define ALT_USB_DEV_DIEPINT8_INEPNAKEFF_E_ACT 0x1
71785 
71786 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_INEPNAKEFF register field. */
71787 #define ALT_USB_DEV_DIEPINT8_INEPNAKEFF_LSB 6
71788 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_INEPNAKEFF register field. */
71789 #define ALT_USB_DEV_DIEPINT8_INEPNAKEFF_MSB 6
71790 /* The width in bits of the ALT_USB_DEV_DIEPINT8_INEPNAKEFF register field. */
71791 #define ALT_USB_DEV_DIEPINT8_INEPNAKEFF_WIDTH 1
71792 /* The mask used to set the ALT_USB_DEV_DIEPINT8_INEPNAKEFF register field value. */
71793 #define ALT_USB_DEV_DIEPINT8_INEPNAKEFF_SET_MSK 0x00000040
71794 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_INEPNAKEFF register field value. */
71795 #define ALT_USB_DEV_DIEPINT8_INEPNAKEFF_CLR_MSK 0xffffffbf
71796 /* The reset value of the ALT_USB_DEV_DIEPINT8_INEPNAKEFF register field. */
71797 #define ALT_USB_DEV_DIEPINT8_INEPNAKEFF_RESET 0x0
71798 /* Extracts the ALT_USB_DEV_DIEPINT8_INEPNAKEFF field value from a register. */
71799 #define ALT_USB_DEV_DIEPINT8_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
71800 /* Produces a ALT_USB_DEV_DIEPINT8_INEPNAKEFF register field value suitable for setting the register. */
71801 #define ALT_USB_DEV_DIEPINT8_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
71802 
71803 /*
71804  * Field : Transmit FIFO Empty - txfemp
71805  *
71806  * This bit is valid only for IN Endpoints This interrupt is asserted when the
71807  * TxFIFO for this endpoint is either half or completely empty. The half or
71808  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
71809  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
71810  *
71811  * Field Enumeration Values:
71812  *
71813  * Enum | Value | Description
71814  * :------------------------------------|:------|:------------------------------
71815  * ALT_USB_DEV_DIEPINT8_TXFEMP_E_INACT | 0x0 | No interrupt
71816  * ALT_USB_DEV_DIEPINT8_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
71817  *
71818  * Field Access Macros:
71819  *
71820  */
71821 /*
71822  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_TXFEMP
71823  *
71824  * No interrupt
71825  */
71826 #define ALT_USB_DEV_DIEPINT8_TXFEMP_E_INACT 0x0
71827 /*
71828  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_TXFEMP
71829  *
71830  * Transmit FIFO Empty interrupt
71831  */
71832 #define ALT_USB_DEV_DIEPINT8_TXFEMP_E_ACT 0x1
71833 
71834 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_TXFEMP register field. */
71835 #define ALT_USB_DEV_DIEPINT8_TXFEMP_LSB 7
71836 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_TXFEMP register field. */
71837 #define ALT_USB_DEV_DIEPINT8_TXFEMP_MSB 7
71838 /* The width in bits of the ALT_USB_DEV_DIEPINT8_TXFEMP register field. */
71839 #define ALT_USB_DEV_DIEPINT8_TXFEMP_WIDTH 1
71840 /* The mask used to set the ALT_USB_DEV_DIEPINT8_TXFEMP register field value. */
71841 #define ALT_USB_DEV_DIEPINT8_TXFEMP_SET_MSK 0x00000080
71842 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_TXFEMP register field value. */
71843 #define ALT_USB_DEV_DIEPINT8_TXFEMP_CLR_MSK 0xffffff7f
71844 /* The reset value of the ALT_USB_DEV_DIEPINT8_TXFEMP register field. */
71845 #define ALT_USB_DEV_DIEPINT8_TXFEMP_RESET 0x1
71846 /* Extracts the ALT_USB_DEV_DIEPINT8_TXFEMP field value from a register. */
71847 #define ALT_USB_DEV_DIEPINT8_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
71848 /* Produces a ALT_USB_DEV_DIEPINT8_TXFEMP register field value suitable for setting the register. */
71849 #define ALT_USB_DEV_DIEPINT8_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
71850 
71851 /*
71852  * Field : Fifo Underrun - txfifoundrn
71853  *
71854  * Applies to IN endpoints Only. The core generates this interrupt when it detects
71855  * a transmit FIFO underrun condition for this endpoint.
71856  *
71857  * Field Enumeration Values:
71858  *
71859  * Enum | Value | Description
71860  * :-----------------------------------------|:------|:------------------------
71861  * ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
71862  * ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
71863  *
71864  * Field Access Macros:
71865  *
71866  */
71867 /*
71868  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN
71869  *
71870  * No interrupt
71871  */
71872 #define ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN_E_INACT 0x0
71873 /*
71874  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN
71875  *
71876  * Fifo Underrun interrupt
71877  */
71878 #define ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN_E_ACT 0x1
71879 
71880 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN register field. */
71881 #define ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN_LSB 8
71882 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN register field. */
71883 #define ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN_MSB 8
71884 /* The width in bits of the ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN register field. */
71885 #define ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN_WIDTH 1
71886 /* The mask used to set the ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN register field value. */
71887 #define ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN_SET_MSK 0x00000100
71888 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN register field value. */
71889 #define ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN_CLR_MSK 0xfffffeff
71890 /* The reset value of the ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN register field. */
71891 #define ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN_RESET 0x0
71892 /* Extracts the ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN field value from a register. */
71893 #define ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
71894 /* Produces a ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN register field value suitable for setting the register. */
71895 #define ALT_USB_DEV_DIEPINT8_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
71896 
71897 /*
71898  * Field : BNA Interrupt - bnaintr
71899  *
71900  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
71901  * generates this interrupt when the descriptor accessed is not ready for the Core
71902  * to process, such as Host busy or DMA done
71903  *
71904  * Field Enumeration Values:
71905  *
71906  * Enum | Value | Description
71907  * :-------------------------------------|:------|:--------------
71908  * ALT_USB_DEV_DIEPINT8_BNAINTR_E_INACT | 0x0 | No interrupt
71909  * ALT_USB_DEV_DIEPINT8_BNAINTR_E_ACT | 0x1 | BNA interrupt
71910  *
71911  * Field Access Macros:
71912  *
71913  */
71914 /*
71915  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_BNAINTR
71916  *
71917  * No interrupt
71918  */
71919 #define ALT_USB_DEV_DIEPINT8_BNAINTR_E_INACT 0x0
71920 /*
71921  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_BNAINTR
71922  *
71923  * BNA interrupt
71924  */
71925 #define ALT_USB_DEV_DIEPINT8_BNAINTR_E_ACT 0x1
71926 
71927 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_BNAINTR register field. */
71928 #define ALT_USB_DEV_DIEPINT8_BNAINTR_LSB 9
71929 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_BNAINTR register field. */
71930 #define ALT_USB_DEV_DIEPINT8_BNAINTR_MSB 9
71931 /* The width in bits of the ALT_USB_DEV_DIEPINT8_BNAINTR register field. */
71932 #define ALT_USB_DEV_DIEPINT8_BNAINTR_WIDTH 1
71933 /* The mask used to set the ALT_USB_DEV_DIEPINT8_BNAINTR register field value. */
71934 #define ALT_USB_DEV_DIEPINT8_BNAINTR_SET_MSK 0x00000200
71935 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_BNAINTR register field value. */
71936 #define ALT_USB_DEV_DIEPINT8_BNAINTR_CLR_MSK 0xfffffdff
71937 /* The reset value of the ALT_USB_DEV_DIEPINT8_BNAINTR register field. */
71938 #define ALT_USB_DEV_DIEPINT8_BNAINTR_RESET 0x0
71939 /* Extracts the ALT_USB_DEV_DIEPINT8_BNAINTR field value from a register. */
71940 #define ALT_USB_DEV_DIEPINT8_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
71941 /* Produces a ALT_USB_DEV_DIEPINT8_BNAINTR register field value suitable for setting the register. */
71942 #define ALT_USB_DEV_DIEPINT8_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
71943 
71944 /*
71945  * Field : Packet Drop Status - pktdrpsts
71946  *
71947  * This bit indicates to the application that an ISOC OUT packet has been dropped.
71948  * This bit does not have an associated mask bit and does not generate an
71949  * interrupt.
71950  *
71951  * Field Enumeration Values:
71952  *
71953  * Enum | Value | Description
71954  * :---------------------------------------|:------|:-----------------------------
71955  * ALT_USB_DEV_DIEPINT8_PKTDRPSTS_E_INACT | 0x0 | No interrupt
71956  * ALT_USB_DEV_DIEPINT8_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
71957  *
71958  * Field Access Macros:
71959  *
71960  */
71961 /*
71962  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_PKTDRPSTS
71963  *
71964  * No interrupt
71965  */
71966 #define ALT_USB_DEV_DIEPINT8_PKTDRPSTS_E_INACT 0x0
71967 /*
71968  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_PKTDRPSTS
71969  *
71970  * Packet Drop Status interrupt
71971  */
71972 #define ALT_USB_DEV_DIEPINT8_PKTDRPSTS_E_ACT 0x1
71973 
71974 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_PKTDRPSTS register field. */
71975 #define ALT_USB_DEV_DIEPINT8_PKTDRPSTS_LSB 11
71976 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_PKTDRPSTS register field. */
71977 #define ALT_USB_DEV_DIEPINT8_PKTDRPSTS_MSB 11
71978 /* The width in bits of the ALT_USB_DEV_DIEPINT8_PKTDRPSTS register field. */
71979 #define ALT_USB_DEV_DIEPINT8_PKTDRPSTS_WIDTH 1
71980 /* The mask used to set the ALT_USB_DEV_DIEPINT8_PKTDRPSTS register field value. */
71981 #define ALT_USB_DEV_DIEPINT8_PKTDRPSTS_SET_MSK 0x00000800
71982 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_PKTDRPSTS register field value. */
71983 #define ALT_USB_DEV_DIEPINT8_PKTDRPSTS_CLR_MSK 0xfffff7ff
71984 /* The reset value of the ALT_USB_DEV_DIEPINT8_PKTDRPSTS register field. */
71985 #define ALT_USB_DEV_DIEPINT8_PKTDRPSTS_RESET 0x0
71986 /* Extracts the ALT_USB_DEV_DIEPINT8_PKTDRPSTS field value from a register. */
71987 #define ALT_USB_DEV_DIEPINT8_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
71988 /* Produces a ALT_USB_DEV_DIEPINT8_PKTDRPSTS register field value suitable for setting the register. */
71989 #define ALT_USB_DEV_DIEPINT8_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
71990 
71991 /*
71992  * Field : BbleErr Interrupt ( - bbleerr
71993  *
71994  * The core generates this interrupt when babble is received for the endpoint.
71995  *
71996  * Field Enumeration Values:
71997  *
71998  * Enum | Value | Description
71999  * :-------------------------------------|:------|:------------------
72000  * ALT_USB_DEV_DIEPINT8_BBLEERR_E_INACT | 0x0 | No interrupt
72001  * ALT_USB_DEV_DIEPINT8_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
72002  *
72003  * Field Access Macros:
72004  *
72005  */
72006 /*
72007  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_BBLEERR
72008  *
72009  * No interrupt
72010  */
72011 #define ALT_USB_DEV_DIEPINT8_BBLEERR_E_INACT 0x0
72012 /*
72013  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_BBLEERR
72014  *
72015  * BbleErr interrupt
72016  */
72017 #define ALT_USB_DEV_DIEPINT8_BBLEERR_E_ACT 0x1
72018 
72019 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_BBLEERR register field. */
72020 #define ALT_USB_DEV_DIEPINT8_BBLEERR_LSB 12
72021 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_BBLEERR register field. */
72022 #define ALT_USB_DEV_DIEPINT8_BBLEERR_MSB 12
72023 /* The width in bits of the ALT_USB_DEV_DIEPINT8_BBLEERR register field. */
72024 #define ALT_USB_DEV_DIEPINT8_BBLEERR_WIDTH 1
72025 /* The mask used to set the ALT_USB_DEV_DIEPINT8_BBLEERR register field value. */
72026 #define ALT_USB_DEV_DIEPINT8_BBLEERR_SET_MSK 0x00001000
72027 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_BBLEERR register field value. */
72028 #define ALT_USB_DEV_DIEPINT8_BBLEERR_CLR_MSK 0xffffefff
72029 /* The reset value of the ALT_USB_DEV_DIEPINT8_BBLEERR register field. */
72030 #define ALT_USB_DEV_DIEPINT8_BBLEERR_RESET 0x0
72031 /* Extracts the ALT_USB_DEV_DIEPINT8_BBLEERR field value from a register. */
72032 #define ALT_USB_DEV_DIEPINT8_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
72033 /* Produces a ALT_USB_DEV_DIEPINT8_BBLEERR register field value suitable for setting the register. */
72034 #define ALT_USB_DEV_DIEPINT8_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
72035 
72036 /*
72037  * Field : NAK Interrupt - nakintrpt
72038  *
72039  * The core generates this interrupt when a NAK is transmitted or received by the
72040  * device. In case of isochronous IN endpoints the interrupt gets generated when a
72041  * zero length packet is transmitted due to un-availability of data in the TXFifo.
72042  *
72043  * Field Enumeration Values:
72044  *
72045  * Enum | Value | Description
72046  * :---------------------------------------|:------|:--------------
72047  * ALT_USB_DEV_DIEPINT8_NAKINTRPT_E_INACT | 0x0 | No interrupt
72048  * ALT_USB_DEV_DIEPINT8_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
72049  *
72050  * Field Access Macros:
72051  *
72052  */
72053 /*
72054  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_NAKINTRPT
72055  *
72056  * No interrupt
72057  */
72058 #define ALT_USB_DEV_DIEPINT8_NAKINTRPT_E_INACT 0x0
72059 /*
72060  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_NAKINTRPT
72061  *
72062  * NAK Interrupt
72063  */
72064 #define ALT_USB_DEV_DIEPINT8_NAKINTRPT_E_ACT 0x1
72065 
72066 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_NAKINTRPT register field. */
72067 #define ALT_USB_DEV_DIEPINT8_NAKINTRPT_LSB 13
72068 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_NAKINTRPT register field. */
72069 #define ALT_USB_DEV_DIEPINT8_NAKINTRPT_MSB 13
72070 /* The width in bits of the ALT_USB_DEV_DIEPINT8_NAKINTRPT register field. */
72071 #define ALT_USB_DEV_DIEPINT8_NAKINTRPT_WIDTH 1
72072 /* The mask used to set the ALT_USB_DEV_DIEPINT8_NAKINTRPT register field value. */
72073 #define ALT_USB_DEV_DIEPINT8_NAKINTRPT_SET_MSK 0x00002000
72074 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_NAKINTRPT register field value. */
72075 #define ALT_USB_DEV_DIEPINT8_NAKINTRPT_CLR_MSK 0xffffdfff
72076 /* The reset value of the ALT_USB_DEV_DIEPINT8_NAKINTRPT register field. */
72077 #define ALT_USB_DEV_DIEPINT8_NAKINTRPT_RESET 0x0
72078 /* Extracts the ALT_USB_DEV_DIEPINT8_NAKINTRPT field value from a register. */
72079 #define ALT_USB_DEV_DIEPINT8_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
72080 /* Produces a ALT_USB_DEV_DIEPINT8_NAKINTRPT register field value suitable for setting the register. */
72081 #define ALT_USB_DEV_DIEPINT8_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
72082 
72083 /*
72084  * Field : NYET Interrupt - nyetintrpt
72085  *
72086  * The core generates this interrupt when a NYET response is transmitted for a non
72087  * isochronous OUT endpoint.
72088  *
72089  * Field Enumeration Values:
72090  *
72091  * Enum | Value | Description
72092  * :----------------------------------------|:------|:---------------
72093  * ALT_USB_DEV_DIEPINT8_NYETINTRPT_E_INACT | 0x0 | No interrupt
72094  * ALT_USB_DEV_DIEPINT8_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
72095  *
72096  * Field Access Macros:
72097  *
72098  */
72099 /*
72100  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_NYETINTRPT
72101  *
72102  * No interrupt
72103  */
72104 #define ALT_USB_DEV_DIEPINT8_NYETINTRPT_E_INACT 0x0
72105 /*
72106  * Enumerated value for register field ALT_USB_DEV_DIEPINT8_NYETINTRPT
72107  *
72108  * NYET Interrupt
72109  */
72110 #define ALT_USB_DEV_DIEPINT8_NYETINTRPT_E_ACT 0x1
72111 
72112 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT8_NYETINTRPT register field. */
72113 #define ALT_USB_DEV_DIEPINT8_NYETINTRPT_LSB 14
72114 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT8_NYETINTRPT register field. */
72115 #define ALT_USB_DEV_DIEPINT8_NYETINTRPT_MSB 14
72116 /* The width in bits of the ALT_USB_DEV_DIEPINT8_NYETINTRPT register field. */
72117 #define ALT_USB_DEV_DIEPINT8_NYETINTRPT_WIDTH 1
72118 /* The mask used to set the ALT_USB_DEV_DIEPINT8_NYETINTRPT register field value. */
72119 #define ALT_USB_DEV_DIEPINT8_NYETINTRPT_SET_MSK 0x00004000
72120 /* The mask used to clear the ALT_USB_DEV_DIEPINT8_NYETINTRPT register field value. */
72121 #define ALT_USB_DEV_DIEPINT8_NYETINTRPT_CLR_MSK 0xffffbfff
72122 /* The reset value of the ALT_USB_DEV_DIEPINT8_NYETINTRPT register field. */
72123 #define ALT_USB_DEV_DIEPINT8_NYETINTRPT_RESET 0x0
72124 /* Extracts the ALT_USB_DEV_DIEPINT8_NYETINTRPT field value from a register. */
72125 #define ALT_USB_DEV_DIEPINT8_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
72126 /* Produces a ALT_USB_DEV_DIEPINT8_NYETINTRPT register field value suitable for setting the register. */
72127 #define ALT_USB_DEV_DIEPINT8_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
72128 
72129 #ifndef __ASSEMBLY__
72130 /*
72131  * WARNING: The C register and register group struct declarations are provided for
72132  * convenience and illustrative purposes. They should, however, be used with
72133  * caution as the C language standard provides no guarantees about the alignment or
72134  * atomicity of device memory accesses. The recommended practice for writing
72135  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
72136  * alt_write_word() functions.
72137  *
72138  * The struct declaration for register ALT_USB_DEV_DIEPINT8.
72139  */
72140 struct ALT_USB_DEV_DIEPINT8_s
72141 {
72142  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
72143  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
72144  const uint32_t ahberr : 1; /* AHB Error */
72145  const uint32_t timeout : 1; /* Timeout Condition */
72146  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
72147  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
72148  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
72149  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
72150  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
72151  const uint32_t bnaintr : 1; /* BNA Interrupt */
72152  uint32_t : 1; /* *UNDEFINED* */
72153  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
72154  const uint32_t bbleerr : 1; /* BbleErr Interrupt ( */
72155  const uint32_t nakintrpt : 1; /* NAK Interrupt */
72156  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
72157  uint32_t : 17; /* *UNDEFINED* */
72158 };
72159 
72160 /* The typedef declaration for register ALT_USB_DEV_DIEPINT8. */
72161 typedef volatile struct ALT_USB_DEV_DIEPINT8_s ALT_USB_DEV_DIEPINT8_t;
72162 #endif /* __ASSEMBLY__ */
72163 
72164 /* The byte offset of the ALT_USB_DEV_DIEPINT8 register from the beginning of the component. */
72165 #define ALT_USB_DEV_DIEPINT8_OFST 0x208
72166 /* The address of the ALT_USB_DEV_DIEPINT8 register. */
72167 #define ALT_USB_DEV_DIEPINT8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT8_OFST))
72168 
72169 /*
72170  * Register : Device IN Endpoint 8 Transfer Size Register - dieptsiz8
72171  *
72172  * The application must modify this register before enabling the endpoint. Once the
72173  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
72174  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
72175  * application can only read this register once the core has cleared the Endpoint
72176  * Enable bit.
72177  *
72178  * Register Layout
72179  *
72180  * Bits | Access | Reset | Description
72181  * :--------|:-------|:------|:-----------------------------
72182  * [18:0] | RW | 0x0 | Transfer Size
72183  * [28:19] | RW | 0x0 | Packet Count
72184  * [30:29] | RW | 0x0 | Applies to IN endpoints only
72185  * [31] | ??? | 0x0 | *UNDEFINED*
72186  *
72187  */
72188 /*
72189  * Field : Transfer Size - xfersize
72190  *
72191  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
72192  * application only after it has exhausted the transfer size amount of data. The
72193  * transfer size can be Set to the maximum packet size of the endpoint, to be
72194  * interrupted at the end of each packet. The core decrements this field every time
72195  * a packet from the external memory is written to the TxFIFO.
72196  *
72197  * Field Access Macros:
72198  *
72199  */
72200 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ8_XFERSIZE register field. */
72201 #define ALT_USB_DEV_DIEPTSIZ8_XFERSIZE_LSB 0
72202 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ8_XFERSIZE register field. */
72203 #define ALT_USB_DEV_DIEPTSIZ8_XFERSIZE_MSB 18
72204 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ8_XFERSIZE register field. */
72205 #define ALT_USB_DEV_DIEPTSIZ8_XFERSIZE_WIDTH 19
72206 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ8_XFERSIZE register field value. */
72207 #define ALT_USB_DEV_DIEPTSIZ8_XFERSIZE_SET_MSK 0x0007ffff
72208 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ8_XFERSIZE register field value. */
72209 #define ALT_USB_DEV_DIEPTSIZ8_XFERSIZE_CLR_MSK 0xfff80000
72210 /* The reset value of the ALT_USB_DEV_DIEPTSIZ8_XFERSIZE register field. */
72211 #define ALT_USB_DEV_DIEPTSIZ8_XFERSIZE_RESET 0x0
72212 /* Extracts the ALT_USB_DEV_DIEPTSIZ8_XFERSIZE field value from a register. */
72213 #define ALT_USB_DEV_DIEPTSIZ8_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
72214 /* Produces a ALT_USB_DEV_DIEPTSIZ8_XFERSIZE register field value suitable for setting the register. */
72215 #define ALT_USB_DEV_DIEPTSIZ8_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
72216 
72217 /*
72218  * Field : Packet Count - pktcnt
72219  *
72220  * Indicates the total number of USB packets that constitute the Transfer Size
72221  * amount of data for endpoint 0.This field is decremented every time a packet
72222  * (maximum size or short packet) is read from the TxFIFO.
72223  *
72224  * Field Access Macros:
72225  *
72226  */
72227 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ8_PKTCNT register field. */
72228 #define ALT_USB_DEV_DIEPTSIZ8_PKTCNT_LSB 19
72229 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ8_PKTCNT register field. */
72230 #define ALT_USB_DEV_DIEPTSIZ8_PKTCNT_MSB 28
72231 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ8_PKTCNT register field. */
72232 #define ALT_USB_DEV_DIEPTSIZ8_PKTCNT_WIDTH 10
72233 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ8_PKTCNT register field value. */
72234 #define ALT_USB_DEV_DIEPTSIZ8_PKTCNT_SET_MSK 0x1ff80000
72235 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ8_PKTCNT register field value. */
72236 #define ALT_USB_DEV_DIEPTSIZ8_PKTCNT_CLR_MSK 0xe007ffff
72237 /* The reset value of the ALT_USB_DEV_DIEPTSIZ8_PKTCNT register field. */
72238 #define ALT_USB_DEV_DIEPTSIZ8_PKTCNT_RESET 0x0
72239 /* Extracts the ALT_USB_DEV_DIEPTSIZ8_PKTCNT field value from a register. */
72240 #define ALT_USB_DEV_DIEPTSIZ8_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
72241 /* Produces a ALT_USB_DEV_DIEPTSIZ8_PKTCNT register field value suitable for setting the register. */
72242 #define ALT_USB_DEV_DIEPTSIZ8_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
72243 
72244 /*
72245  * Field : Applies to IN endpoints only - mc
72246  *
72247  * for periodic IN endpoints, this field indicates the number of packets that must
72248  * be transmitted per microframe on the USB. The core uses this field to calculate
72249  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
72250  * field is valid only in Internal DMA mode. It specifies the number of packets the
72251  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
72252  * by the Next Endpoint field of the Device Endpoint-n Control register
72253  * (DIEPCTLn.NextEp)
72254  *
72255  * Field Enumeration Values:
72256  *
72257  * Enum | Value | Description
72258  * :------------------------------------|:------|:------------
72259  * ALT_USB_DEV_DIEPTSIZ8_MC_E_PKTONE | 0x1 | 1 packet
72260  * ALT_USB_DEV_DIEPTSIZ8_MC_E_PKTTWO | 0x2 | 2 packets
72261  * ALT_USB_DEV_DIEPTSIZ8_MC_E_PKTTHREE | 0x3 | 3 packets
72262  *
72263  * Field Access Macros:
72264  *
72265  */
72266 /*
72267  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ8_MC
72268  *
72269  * 1 packet
72270  */
72271 #define ALT_USB_DEV_DIEPTSIZ8_MC_E_PKTONE 0x1
72272 /*
72273  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ8_MC
72274  *
72275  * 2 packets
72276  */
72277 #define ALT_USB_DEV_DIEPTSIZ8_MC_E_PKTTWO 0x2
72278 /*
72279  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ8_MC
72280  *
72281  * 3 packets
72282  */
72283 #define ALT_USB_DEV_DIEPTSIZ8_MC_E_PKTTHREE 0x3
72284 
72285 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ8_MC register field. */
72286 #define ALT_USB_DEV_DIEPTSIZ8_MC_LSB 29
72287 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ8_MC register field. */
72288 #define ALT_USB_DEV_DIEPTSIZ8_MC_MSB 30
72289 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ8_MC register field. */
72290 #define ALT_USB_DEV_DIEPTSIZ8_MC_WIDTH 2
72291 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ8_MC register field value. */
72292 #define ALT_USB_DEV_DIEPTSIZ8_MC_SET_MSK 0x60000000
72293 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ8_MC register field value. */
72294 #define ALT_USB_DEV_DIEPTSIZ8_MC_CLR_MSK 0x9fffffff
72295 /* The reset value of the ALT_USB_DEV_DIEPTSIZ8_MC register field. */
72296 #define ALT_USB_DEV_DIEPTSIZ8_MC_RESET 0x0
72297 /* Extracts the ALT_USB_DEV_DIEPTSIZ8_MC field value from a register. */
72298 #define ALT_USB_DEV_DIEPTSIZ8_MC_GET(value) (((value) & 0x60000000) >> 29)
72299 /* Produces a ALT_USB_DEV_DIEPTSIZ8_MC register field value suitable for setting the register. */
72300 #define ALT_USB_DEV_DIEPTSIZ8_MC_SET(value) (((value) << 29) & 0x60000000)
72301 
72302 #ifndef __ASSEMBLY__
72303 /*
72304  * WARNING: The C register and register group struct declarations are provided for
72305  * convenience and illustrative purposes. They should, however, be used with
72306  * caution as the C language standard provides no guarantees about the alignment or
72307  * atomicity of device memory accesses. The recommended practice for writing
72308  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
72309  * alt_write_word() functions.
72310  *
72311  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ8.
72312  */
72313 struct ALT_USB_DEV_DIEPTSIZ8_s
72314 {
72315  uint32_t xfersize : 19; /* Transfer Size */
72316  uint32_t pktcnt : 10; /* Packet Count */
72317  uint32_t mc : 2; /* Applies to IN endpoints only */
72318  uint32_t : 1; /* *UNDEFINED* */
72319 };
72320 
72321 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ8. */
72322 typedef volatile struct ALT_USB_DEV_DIEPTSIZ8_s ALT_USB_DEV_DIEPTSIZ8_t;
72323 #endif /* __ASSEMBLY__ */
72324 
72325 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ8 register from the beginning of the component. */
72326 #define ALT_USB_DEV_DIEPTSIZ8_OFST 0x210
72327 /* The address of the ALT_USB_DEV_DIEPTSIZ8 register. */
72328 #define ALT_USB_DEV_DIEPTSIZ8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ8_OFST))
72329 
72330 /*
72331  * Register : Device IN Endpoint 8 DMA Address Register - diepdma8
72332  *
72333  * DMA Addressing.
72334  *
72335  * Register Layout
72336  *
72337  * Bits | Access | Reset | Description
72338  * :-------|:-------|:--------|:------------
72339  * [31:0] | RW | Unknown | DMA Address
72340  *
72341  */
72342 /*
72343  * Field : DMA Address - diepdma8
72344  *
72345  * Holds the start address of the external memory for storing or fetching endpoint
72346  * data. for control endpoints, this field stores control OUT data packets as well
72347  * as SETUP transaction data packets. When more than three SETUP packets are
72348  * received back-to-back, the SETUP data packet in the memory is overwritten. This
72349  * register is incremented on every AHB transaction. The application can give only
72350  * a DWORD-aligned address.
72351  *
72352  * When Scatter/Gather DMA mode is not enabled, the application programs the start
72353  * address value in this field.
72354  *
72355  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
72356  * for the descriptor list.
72357  *
72358  * Field Access Macros:
72359  *
72360  */
72361 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA8_DIEPDMA8 register field. */
72362 #define ALT_USB_DEV_DIEPDMA8_DIEPDMA8_LSB 0
72363 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA8_DIEPDMA8 register field. */
72364 #define ALT_USB_DEV_DIEPDMA8_DIEPDMA8_MSB 31
72365 /* The width in bits of the ALT_USB_DEV_DIEPDMA8_DIEPDMA8 register field. */
72366 #define ALT_USB_DEV_DIEPDMA8_DIEPDMA8_WIDTH 32
72367 /* The mask used to set the ALT_USB_DEV_DIEPDMA8_DIEPDMA8 register field value. */
72368 #define ALT_USB_DEV_DIEPDMA8_DIEPDMA8_SET_MSK 0xffffffff
72369 /* The mask used to clear the ALT_USB_DEV_DIEPDMA8_DIEPDMA8 register field value. */
72370 #define ALT_USB_DEV_DIEPDMA8_DIEPDMA8_CLR_MSK 0x00000000
72371 /* The reset value of the ALT_USB_DEV_DIEPDMA8_DIEPDMA8 register field is UNKNOWN. */
72372 #define ALT_USB_DEV_DIEPDMA8_DIEPDMA8_RESET 0x0
72373 /* Extracts the ALT_USB_DEV_DIEPDMA8_DIEPDMA8 field value from a register. */
72374 #define ALT_USB_DEV_DIEPDMA8_DIEPDMA8_GET(value) (((value) & 0xffffffff) >> 0)
72375 /* Produces a ALT_USB_DEV_DIEPDMA8_DIEPDMA8 register field value suitable for setting the register. */
72376 #define ALT_USB_DEV_DIEPDMA8_DIEPDMA8_SET(value) (((value) << 0) & 0xffffffff)
72377 
72378 #ifndef __ASSEMBLY__
72379 /*
72380  * WARNING: The C register and register group struct declarations are provided for
72381  * convenience and illustrative purposes. They should, however, be used with
72382  * caution as the C language standard provides no guarantees about the alignment or
72383  * atomicity of device memory accesses. The recommended practice for writing
72384  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
72385  * alt_write_word() functions.
72386  *
72387  * The struct declaration for register ALT_USB_DEV_DIEPDMA8.
72388  */
72389 struct ALT_USB_DEV_DIEPDMA8_s
72390 {
72391  uint32_t diepdma8 : 32; /* DMA Address */
72392 };
72393 
72394 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA8. */
72395 typedef volatile struct ALT_USB_DEV_DIEPDMA8_s ALT_USB_DEV_DIEPDMA8_t;
72396 #endif /* __ASSEMBLY__ */
72397 
72398 /* The byte offset of the ALT_USB_DEV_DIEPDMA8 register from the beginning of the component. */
72399 #define ALT_USB_DEV_DIEPDMA8_OFST 0x214
72400 /* The address of the ALT_USB_DEV_DIEPDMA8 register. */
72401 #define ALT_USB_DEV_DIEPDMA8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA8_OFST))
72402 
72403 /*
72404  * Register : Device IN Endpoint Transmit FIFO Status Register 8 - dtxfsts8
72405  *
72406  * This register contains the free space information for the Device IN endpoint
72407  * TxFIFO.
72408  *
72409  * Register Layout
72410  *
72411  * Bits | Access | Reset | Description
72412  * :--------|:-------|:-------|:-------------------------------
72413  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
72414  * [31:16] | ??? | 0x0 | *UNDEFINED*
72415  *
72416  */
72417 /*
72418  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
72419  *
72420  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
72421  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
72422  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
72423  * 32,768 words available Others: Reserved
72424  *
72425  * Field Access Macros:
72426  *
72427  */
72428 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL register field. */
72429 #define ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL_LSB 0
72430 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL register field. */
72431 #define ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL_MSB 15
72432 /* The width in bits of the ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL register field. */
72433 #define ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL_WIDTH 16
72434 /* The mask used to set the ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL register field value. */
72435 #define ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
72436 /* The mask used to clear the ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL register field value. */
72437 #define ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
72438 /* The reset value of the ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL register field. */
72439 #define ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL_RESET 0x2000
72440 /* Extracts the ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL field value from a register. */
72441 #define ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
72442 /* Produces a ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL register field value suitable for setting the register. */
72443 #define ALT_USB_DEV_DTXFSTS8_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
72444 
72445 #ifndef __ASSEMBLY__
72446 /*
72447  * WARNING: The C register and register group struct declarations are provided for
72448  * convenience and illustrative purposes. They should, however, be used with
72449  * caution as the C language standard provides no guarantees about the alignment or
72450  * atomicity of device memory accesses. The recommended practice for writing
72451  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
72452  * alt_write_word() functions.
72453  *
72454  * The struct declaration for register ALT_USB_DEV_DTXFSTS8.
72455  */
72456 struct ALT_USB_DEV_DTXFSTS8_s
72457 {
72458  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
72459  uint32_t : 16; /* *UNDEFINED* */
72460 };
72461 
72462 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS8. */
72463 typedef volatile struct ALT_USB_DEV_DTXFSTS8_s ALT_USB_DEV_DTXFSTS8_t;
72464 #endif /* __ASSEMBLY__ */
72465 
72466 /* The byte offset of the ALT_USB_DEV_DTXFSTS8 register from the beginning of the component. */
72467 #define ALT_USB_DEV_DTXFSTS8_OFST 0x218
72468 /* The address of the ALT_USB_DEV_DTXFSTS8 register. */
72469 #define ALT_USB_DEV_DTXFSTS8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS8_OFST))
72470 
72471 /*
72472  * Register : Device IN Endpoint 8 DMA Buffer Address Register - diepdmab8
72473  *
72474  * DMA Buffer Address.
72475  *
72476  * Register Layout
72477  *
72478  * Bits | Access | Reset | Description
72479  * :-------|:-------|:--------|:-------------------
72480  * [31:0] | R | Unknown | DMA Buffer Address
72481  *
72482  */
72483 /*
72484  * Field : DMA Buffer Address - diepdmab8
72485  *
72486  * Holds the current buffer address. This register is updated as and when the data
72487  * transfer for the corresponding end point is in progress. This register is
72488  * present only in Scatter/Gather DMA mode.
72489  *
72490  * Field Access Macros:
72491  *
72492  */
72493 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8 register field. */
72494 #define ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8_LSB 0
72495 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8 register field. */
72496 #define ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8_MSB 31
72497 /* The width in bits of the ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8 register field. */
72498 #define ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8_WIDTH 32
72499 /* The mask used to set the ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8 register field value. */
72500 #define ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8_SET_MSK 0xffffffff
72501 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8 register field value. */
72502 #define ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8_CLR_MSK 0x00000000
72503 /* The reset value of the ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8 register field is UNKNOWN. */
72504 #define ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8_RESET 0x0
72505 /* Extracts the ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8 field value from a register. */
72506 #define ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8_GET(value) (((value) & 0xffffffff) >> 0)
72507 /* Produces a ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8 register field value suitable for setting the register. */
72508 #define ALT_USB_DEV_DIEPDMAB8_DIEPDMAB8_SET(value) (((value) << 0) & 0xffffffff)
72509 
72510 #ifndef __ASSEMBLY__
72511 /*
72512  * WARNING: The C register and register group struct declarations are provided for
72513  * convenience and illustrative purposes. They should, however, be used with
72514  * caution as the C language standard provides no guarantees about the alignment or
72515  * atomicity of device memory accesses. The recommended practice for writing
72516  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
72517  * alt_write_word() functions.
72518  *
72519  * The struct declaration for register ALT_USB_DEV_DIEPDMAB8.
72520  */
72521 struct ALT_USB_DEV_DIEPDMAB8_s
72522 {
72523  const uint32_t diepdmab8 : 32; /* DMA Buffer Address */
72524 };
72525 
72526 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB8. */
72527 typedef volatile struct ALT_USB_DEV_DIEPDMAB8_s ALT_USB_DEV_DIEPDMAB8_t;
72528 #endif /* __ASSEMBLY__ */
72529 
72530 /* The byte offset of the ALT_USB_DEV_DIEPDMAB8 register from the beginning of the component. */
72531 #define ALT_USB_DEV_DIEPDMAB8_OFST 0x21c
72532 /* The address of the ALT_USB_DEV_DIEPDMAB8 register. */
72533 #define ALT_USB_DEV_DIEPDMAB8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB8_OFST))
72534 
72535 /*
72536  * Register : Device Control IN Endpoint 9 Control Register - diepctl9
72537  *
72538  * Endpoint_number: 9
72539  *
72540  * Register Layout
72541  *
72542  * Bits | Access | Reset | Description
72543  * :--------|:-------|:------|:--------------------
72544  * [10:0] | RW | 0x0 | Maximum Packet Size
72545  * [14:11] | ??? | 0x0 | *UNDEFINED*
72546  * [15] | RW | 0x0 | USB Active Endpoint
72547  * [16] | R | 0x0 | Endpoint Data PID
72548  * [17] | R | 0x0 | NAK Status
72549  * [19:18] | RW | 0x0 | Endpoint Type
72550  * [20] | ??? | 0x0 | *UNDEFINED*
72551  * [21] | R | 0x0 | STALL Handshake
72552  * [25:22] | RW | 0x0 | TxFIFO Number
72553  * [26] | W | 0x0 | Clear NAK
72554  * [27] | W | 0x0 | Set NAK
72555  * [28] | W | 0x0 | Set DATA0 PID
72556  * [29] | W | 0x0 | Set DATA1 PID
72557  * [30] | R | 0x0 | Endpoint Disable
72558  * [31] | R | 0x0 | Endpoint Enable
72559  *
72560  */
72561 /*
72562  * Field : Maximum Packet Size - mps
72563  *
72564  * Applies to IN and OUT endpoints. The application must program this field with
72565  * the maximum packet size for the current logical endpoint. This value is in
72566  * bytes.
72567  *
72568  * Field Access Macros:
72569  *
72570  */
72571 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_MPS register field. */
72572 #define ALT_USB_DEV_DIEPCTL9_MPS_LSB 0
72573 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_MPS register field. */
72574 #define ALT_USB_DEV_DIEPCTL9_MPS_MSB 10
72575 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_MPS register field. */
72576 #define ALT_USB_DEV_DIEPCTL9_MPS_WIDTH 11
72577 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_MPS register field value. */
72578 #define ALT_USB_DEV_DIEPCTL9_MPS_SET_MSK 0x000007ff
72579 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_MPS register field value. */
72580 #define ALT_USB_DEV_DIEPCTL9_MPS_CLR_MSK 0xfffff800
72581 /* The reset value of the ALT_USB_DEV_DIEPCTL9_MPS register field. */
72582 #define ALT_USB_DEV_DIEPCTL9_MPS_RESET 0x0
72583 /* Extracts the ALT_USB_DEV_DIEPCTL9_MPS field value from a register. */
72584 #define ALT_USB_DEV_DIEPCTL9_MPS_GET(value) (((value) & 0x000007ff) >> 0)
72585 /* Produces a ALT_USB_DEV_DIEPCTL9_MPS register field value suitable for setting the register. */
72586 #define ALT_USB_DEV_DIEPCTL9_MPS_SET(value) (((value) << 0) & 0x000007ff)
72587 
72588 /*
72589  * Field : USB Active Endpoint - usbactep
72590  *
72591  * Indicates whether this endpoint is active in the current configuration and
72592  * interface. The core clears this bit for all endpoints (other than EP 0) after
72593  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
72594  * commands, the application must program endpoint registers accordingly and set
72595  * this bit.
72596  *
72597  * Field Enumeration Values:
72598  *
72599  * Enum | Value | Description
72600  * :-------------------------------------|:------|:--------------------
72601  * ALT_USB_DEV_DIEPCTL9_USBACTEP_E_DISD | 0x0 | Not Active
72602  * ALT_USB_DEV_DIEPCTL9_USBACTEP_E_END | 0x1 | USB Active Endpoint
72603  *
72604  * Field Access Macros:
72605  *
72606  */
72607 /*
72608  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_USBACTEP
72609  *
72610  * Not Active
72611  */
72612 #define ALT_USB_DEV_DIEPCTL9_USBACTEP_E_DISD 0x0
72613 /*
72614  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_USBACTEP
72615  *
72616  * USB Active Endpoint
72617  */
72618 #define ALT_USB_DEV_DIEPCTL9_USBACTEP_E_END 0x1
72619 
72620 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_USBACTEP register field. */
72621 #define ALT_USB_DEV_DIEPCTL9_USBACTEP_LSB 15
72622 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_USBACTEP register field. */
72623 #define ALT_USB_DEV_DIEPCTL9_USBACTEP_MSB 15
72624 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_USBACTEP register field. */
72625 #define ALT_USB_DEV_DIEPCTL9_USBACTEP_WIDTH 1
72626 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_USBACTEP register field value. */
72627 #define ALT_USB_DEV_DIEPCTL9_USBACTEP_SET_MSK 0x00008000
72628 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_USBACTEP register field value. */
72629 #define ALT_USB_DEV_DIEPCTL9_USBACTEP_CLR_MSK 0xffff7fff
72630 /* The reset value of the ALT_USB_DEV_DIEPCTL9_USBACTEP register field. */
72631 #define ALT_USB_DEV_DIEPCTL9_USBACTEP_RESET 0x0
72632 /* Extracts the ALT_USB_DEV_DIEPCTL9_USBACTEP field value from a register. */
72633 #define ALT_USB_DEV_DIEPCTL9_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
72634 /* Produces a ALT_USB_DEV_DIEPCTL9_USBACTEP register field value suitable for setting the register. */
72635 #define ALT_USB_DEV_DIEPCTL9_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
72636 
72637 /*
72638  * Field : Endpoint Data PID - dpid
72639  *
72640  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
72641  * packet to be received or transmitted on this endpoint. The application must
72642  * program the PID of the first packet to be received or transmitted on this
72643  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
72644  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
72645  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
72646  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
72647  * DMA mode:
72648  *
72649  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
72650  * number in which the core transmits/receives isochronous data for this endpoint.
72651  * The application must program the even/odd (micro) frame number in which it
72652  * intends to transmit/receive isochronous data for this endpoint using the
72653  * SetEvnFr and SetOddFr fields in this register.
72654  *
72655  * 0: Even (micro)frame
72656  *
72657  * 1: Odd (micro)frame
72658  *
72659  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
72660  * number in which to send data is provided in the transmit descriptor structure.
72661  * The frame in which data is received is updated in receive descriptor structure.
72662  *
72663  * Field Enumeration Values:
72664  *
72665  * Enum | Value | Description
72666  * :----------------------------------|:------|:-----------------------------
72667  * ALT_USB_DEV_DIEPCTL9_DPID_E_INACT | 0x0 | Endpoint Data PID not active
72668  * ALT_USB_DEV_DIEPCTL9_DPID_E_ACT | 0x1 | Endpoint Data PID active
72669  *
72670  * Field Access Macros:
72671  *
72672  */
72673 /*
72674  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_DPID
72675  *
72676  * Endpoint Data PID not active
72677  */
72678 #define ALT_USB_DEV_DIEPCTL9_DPID_E_INACT 0x0
72679 /*
72680  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_DPID
72681  *
72682  * Endpoint Data PID active
72683  */
72684 #define ALT_USB_DEV_DIEPCTL9_DPID_E_ACT 0x1
72685 
72686 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_DPID register field. */
72687 #define ALT_USB_DEV_DIEPCTL9_DPID_LSB 16
72688 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_DPID register field. */
72689 #define ALT_USB_DEV_DIEPCTL9_DPID_MSB 16
72690 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_DPID register field. */
72691 #define ALT_USB_DEV_DIEPCTL9_DPID_WIDTH 1
72692 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_DPID register field value. */
72693 #define ALT_USB_DEV_DIEPCTL9_DPID_SET_MSK 0x00010000
72694 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_DPID register field value. */
72695 #define ALT_USB_DEV_DIEPCTL9_DPID_CLR_MSK 0xfffeffff
72696 /* The reset value of the ALT_USB_DEV_DIEPCTL9_DPID register field. */
72697 #define ALT_USB_DEV_DIEPCTL9_DPID_RESET 0x0
72698 /* Extracts the ALT_USB_DEV_DIEPCTL9_DPID field value from a register. */
72699 #define ALT_USB_DEV_DIEPCTL9_DPID_GET(value) (((value) & 0x00010000) >> 16)
72700 /* Produces a ALT_USB_DEV_DIEPCTL9_DPID register field value suitable for setting the register. */
72701 #define ALT_USB_DEV_DIEPCTL9_DPID_SET(value) (((value) << 16) & 0x00010000)
72702 
72703 /*
72704  * Field : NAK Status - naksts
72705  *
72706  * When either the application or the core sets this bit:
72707  *
72708  * * The core stops receiving any data on an OUT endpoint, even if there is space
72709  * in the RxFIFO to accommodate the incoming packet.
72710  *
72711  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
72712  * IN endpoint, even if there data is available in the TxFIFO.
72713  *
72714  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
72715  * even if there data is available in the TxFIFO.
72716  *
72717  * Irrespective of this bit's setting, the core always responds to SETUP data
72718  * packets with an ACK handshake.
72719  *
72720  * Field Enumeration Values:
72721  *
72722  * Enum | Value | Description
72723  * :-------------------------------------|:------|:------------------------------------------------
72724  * ALT_USB_DEV_DIEPCTL9_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
72725  * : | | based on the FIFO status
72726  * ALT_USB_DEV_DIEPCTL9_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
72727  * : | | endpoint
72728  *
72729  * Field Access Macros:
72730  *
72731  */
72732 /*
72733  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_NAKSTS
72734  *
72735  * The core is transmitting non-NAK handshakes based on the FIFO status
72736  */
72737 #define ALT_USB_DEV_DIEPCTL9_NAKSTS_E_NONNAK 0x0
72738 /*
72739  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_NAKSTS
72740  *
72741  * The core is transmitting NAK handshakes on this endpoint
72742  */
72743 #define ALT_USB_DEV_DIEPCTL9_NAKSTS_E_NAK 0x1
72744 
72745 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_NAKSTS register field. */
72746 #define ALT_USB_DEV_DIEPCTL9_NAKSTS_LSB 17
72747 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_NAKSTS register field. */
72748 #define ALT_USB_DEV_DIEPCTL9_NAKSTS_MSB 17
72749 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_NAKSTS register field. */
72750 #define ALT_USB_DEV_DIEPCTL9_NAKSTS_WIDTH 1
72751 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_NAKSTS register field value. */
72752 #define ALT_USB_DEV_DIEPCTL9_NAKSTS_SET_MSK 0x00020000
72753 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_NAKSTS register field value. */
72754 #define ALT_USB_DEV_DIEPCTL9_NAKSTS_CLR_MSK 0xfffdffff
72755 /* The reset value of the ALT_USB_DEV_DIEPCTL9_NAKSTS register field. */
72756 #define ALT_USB_DEV_DIEPCTL9_NAKSTS_RESET 0x0
72757 /* Extracts the ALT_USB_DEV_DIEPCTL9_NAKSTS field value from a register. */
72758 #define ALT_USB_DEV_DIEPCTL9_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
72759 /* Produces a ALT_USB_DEV_DIEPCTL9_NAKSTS register field value suitable for setting the register. */
72760 #define ALT_USB_DEV_DIEPCTL9_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
72761 
72762 /*
72763  * Field : Endpoint Type - eptype
72764  *
72765  * This is the transfer type supported by this logical endpoint.
72766  *
72767  * Field Enumeration Values:
72768  *
72769  * Enum | Value | Description
72770  * :------------------------------------------|:------|:------------
72771  * ALT_USB_DEV_DIEPCTL9_EPTYPE_E_CTL | 0x0 | Control
72772  * ALT_USB_DEV_DIEPCTL9_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
72773  * ALT_USB_DEV_DIEPCTL9_EPTYPE_E_BULK | 0x2 | Bulk
72774  * ALT_USB_DEV_DIEPCTL9_EPTYPE_E_INTERRUP | 0x3 | Interrupt
72775  *
72776  * Field Access Macros:
72777  *
72778  */
72779 /*
72780  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_EPTYPE
72781  *
72782  * Control
72783  */
72784 #define ALT_USB_DEV_DIEPCTL9_EPTYPE_E_CTL 0x0
72785 /*
72786  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_EPTYPE
72787  *
72788  * Isochronous
72789  */
72790 #define ALT_USB_DEV_DIEPCTL9_EPTYPE_E_ISOCHRONOUS 0x1
72791 /*
72792  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_EPTYPE
72793  *
72794  * Bulk
72795  */
72796 #define ALT_USB_DEV_DIEPCTL9_EPTYPE_E_BULK 0x2
72797 /*
72798  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_EPTYPE
72799  *
72800  * Interrupt
72801  */
72802 #define ALT_USB_DEV_DIEPCTL9_EPTYPE_E_INTERRUP 0x3
72803 
72804 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_EPTYPE register field. */
72805 #define ALT_USB_DEV_DIEPCTL9_EPTYPE_LSB 18
72806 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_EPTYPE register field. */
72807 #define ALT_USB_DEV_DIEPCTL9_EPTYPE_MSB 19
72808 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_EPTYPE register field. */
72809 #define ALT_USB_DEV_DIEPCTL9_EPTYPE_WIDTH 2
72810 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_EPTYPE register field value. */
72811 #define ALT_USB_DEV_DIEPCTL9_EPTYPE_SET_MSK 0x000c0000
72812 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_EPTYPE register field value. */
72813 #define ALT_USB_DEV_DIEPCTL9_EPTYPE_CLR_MSK 0xfff3ffff
72814 /* The reset value of the ALT_USB_DEV_DIEPCTL9_EPTYPE register field. */
72815 #define ALT_USB_DEV_DIEPCTL9_EPTYPE_RESET 0x0
72816 /* Extracts the ALT_USB_DEV_DIEPCTL9_EPTYPE field value from a register. */
72817 #define ALT_USB_DEV_DIEPCTL9_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
72818 /* Produces a ALT_USB_DEV_DIEPCTL9_EPTYPE register field value suitable for setting the register. */
72819 #define ALT_USB_DEV_DIEPCTL9_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
72820 
72821 /*
72822  * Field : STALL Handshake - stall
72823  *
72824  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
72825  * application sets this bit to stall all tokens from the USB host to this
72826  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
72827  * along with this bit, the STALL bit takes priority. Only the application can
72828  * clear this bit, never the core. Applies to control endpoints only. The
72829  * application can only set this bit, and the core clears it, when a SETUP token is
72830  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
72831  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
72832  * of this bit's setting, the core always responds to SETUP data packets with an
72833  * ACK handshake.
72834  *
72835  * Field Enumeration Values:
72836  *
72837  * Enum | Value | Description
72838  * :-----------------------------------|:------|:----------------------------
72839  * ALT_USB_DEV_DIEPCTL9_STALL_E_INACT | 0x0 | STALL All Tokens not active
72840  * ALT_USB_DEV_DIEPCTL9_STALL_E_ACT | 0x1 | STALL All Tokens active
72841  *
72842  * Field Access Macros:
72843  *
72844  */
72845 /*
72846  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_STALL
72847  *
72848  * STALL All Tokens not active
72849  */
72850 #define ALT_USB_DEV_DIEPCTL9_STALL_E_INACT 0x0
72851 /*
72852  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_STALL
72853  *
72854  * STALL All Tokens active
72855  */
72856 #define ALT_USB_DEV_DIEPCTL9_STALL_E_ACT 0x1
72857 
72858 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_STALL register field. */
72859 #define ALT_USB_DEV_DIEPCTL9_STALL_LSB 21
72860 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_STALL register field. */
72861 #define ALT_USB_DEV_DIEPCTL9_STALL_MSB 21
72862 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_STALL register field. */
72863 #define ALT_USB_DEV_DIEPCTL9_STALL_WIDTH 1
72864 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_STALL register field value. */
72865 #define ALT_USB_DEV_DIEPCTL9_STALL_SET_MSK 0x00200000
72866 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_STALL register field value. */
72867 #define ALT_USB_DEV_DIEPCTL9_STALL_CLR_MSK 0xffdfffff
72868 /* The reset value of the ALT_USB_DEV_DIEPCTL9_STALL register field. */
72869 #define ALT_USB_DEV_DIEPCTL9_STALL_RESET 0x0
72870 /* Extracts the ALT_USB_DEV_DIEPCTL9_STALL field value from a register. */
72871 #define ALT_USB_DEV_DIEPCTL9_STALL_GET(value) (((value) & 0x00200000) >> 21)
72872 /* Produces a ALT_USB_DEV_DIEPCTL9_STALL register field value suitable for setting the register. */
72873 #define ALT_USB_DEV_DIEPCTL9_STALL_SET(value) (((value) << 21) & 0x00200000)
72874 
72875 /*
72876  * Field : TxFIFO Number - txfnum
72877  *
72878  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
72879  * endpoints must map this to the corresponding Periodic TxFIFO number.
72880  *
72881  * 4'h0: Non-Periodic TxFIFO
72882  *
72883  * Others: Specified Periodic TxFIFO.number
72884  *
72885  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
72886  * applications such as mass storage. The core treats an IN endpoint as a non-
72887  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
72888  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
72889  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
72890  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
72891  * This field is valid only for IN endpoints.
72892  *
72893  * Field Access Macros:
72894  *
72895  */
72896 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_TXFNUM register field. */
72897 #define ALT_USB_DEV_DIEPCTL9_TXFNUM_LSB 22
72898 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_TXFNUM register field. */
72899 #define ALT_USB_DEV_DIEPCTL9_TXFNUM_MSB 25
72900 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_TXFNUM register field. */
72901 #define ALT_USB_DEV_DIEPCTL9_TXFNUM_WIDTH 4
72902 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_TXFNUM register field value. */
72903 #define ALT_USB_DEV_DIEPCTL9_TXFNUM_SET_MSK 0x03c00000
72904 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_TXFNUM register field value. */
72905 #define ALT_USB_DEV_DIEPCTL9_TXFNUM_CLR_MSK 0xfc3fffff
72906 /* The reset value of the ALT_USB_DEV_DIEPCTL9_TXFNUM register field. */
72907 #define ALT_USB_DEV_DIEPCTL9_TXFNUM_RESET 0x0
72908 /* Extracts the ALT_USB_DEV_DIEPCTL9_TXFNUM field value from a register. */
72909 #define ALT_USB_DEV_DIEPCTL9_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
72910 /* Produces a ALT_USB_DEV_DIEPCTL9_TXFNUM register field value suitable for setting the register. */
72911 #define ALT_USB_DEV_DIEPCTL9_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
72912 
72913 /*
72914  * Field : Clear NAK - cnak
72915  *
72916  * A write to this bit clears the NAK bit for the endpoint.
72917  *
72918  * Field Enumeration Values:
72919  *
72920  * Enum | Value | Description
72921  * :----------------------------------|:------|:-------------
72922  * ALT_USB_DEV_DIEPCTL9_CNAK_E_INACT | 0x0 | No Clear NAK
72923  * ALT_USB_DEV_DIEPCTL9_CNAK_E_ACT | 0x1 | Clear NAK
72924  *
72925  * Field Access Macros:
72926  *
72927  */
72928 /*
72929  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_CNAK
72930  *
72931  * No Clear NAK
72932  */
72933 #define ALT_USB_DEV_DIEPCTL9_CNAK_E_INACT 0x0
72934 /*
72935  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_CNAK
72936  *
72937  * Clear NAK
72938  */
72939 #define ALT_USB_DEV_DIEPCTL9_CNAK_E_ACT 0x1
72940 
72941 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_CNAK register field. */
72942 #define ALT_USB_DEV_DIEPCTL9_CNAK_LSB 26
72943 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_CNAK register field. */
72944 #define ALT_USB_DEV_DIEPCTL9_CNAK_MSB 26
72945 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_CNAK register field. */
72946 #define ALT_USB_DEV_DIEPCTL9_CNAK_WIDTH 1
72947 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_CNAK register field value. */
72948 #define ALT_USB_DEV_DIEPCTL9_CNAK_SET_MSK 0x04000000
72949 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_CNAK register field value. */
72950 #define ALT_USB_DEV_DIEPCTL9_CNAK_CLR_MSK 0xfbffffff
72951 /* The reset value of the ALT_USB_DEV_DIEPCTL9_CNAK register field. */
72952 #define ALT_USB_DEV_DIEPCTL9_CNAK_RESET 0x0
72953 /* Extracts the ALT_USB_DEV_DIEPCTL9_CNAK field value from a register. */
72954 #define ALT_USB_DEV_DIEPCTL9_CNAK_GET(value) (((value) & 0x04000000) >> 26)
72955 /* Produces a ALT_USB_DEV_DIEPCTL9_CNAK register field value suitable for setting the register. */
72956 #define ALT_USB_DEV_DIEPCTL9_CNAK_SET(value) (((value) << 26) & 0x04000000)
72957 
72958 /*
72959  * Field : Set NAK - snak
72960  *
72961  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
72962  * application can control the transmission of NAK handshakes on an endpoint. The
72963  * core can also Set this bit for an endpoint after a SETUP packet is received on
72964  * that endpoint.
72965  *
72966  * Field Enumeration Values:
72967  *
72968  * Enum | Value | Description
72969  * :----------------------------------|:------|:------------
72970  * ALT_USB_DEV_DIEPCTL9_SNAK_E_INACT | 0x0 | No Set NAK
72971  * ALT_USB_DEV_DIEPCTL9_SNAK_E_ACT | 0x1 | Set NAK
72972  *
72973  * Field Access Macros:
72974  *
72975  */
72976 /*
72977  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_SNAK
72978  *
72979  * No Set NAK
72980  */
72981 #define ALT_USB_DEV_DIEPCTL9_SNAK_E_INACT 0x0
72982 /*
72983  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_SNAK
72984  *
72985  * Set NAK
72986  */
72987 #define ALT_USB_DEV_DIEPCTL9_SNAK_E_ACT 0x1
72988 
72989 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_SNAK register field. */
72990 #define ALT_USB_DEV_DIEPCTL9_SNAK_LSB 27
72991 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_SNAK register field. */
72992 #define ALT_USB_DEV_DIEPCTL9_SNAK_MSB 27
72993 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_SNAK register field. */
72994 #define ALT_USB_DEV_DIEPCTL9_SNAK_WIDTH 1
72995 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_SNAK register field value. */
72996 #define ALT_USB_DEV_DIEPCTL9_SNAK_SET_MSK 0x08000000
72997 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_SNAK register field value. */
72998 #define ALT_USB_DEV_DIEPCTL9_SNAK_CLR_MSK 0xf7ffffff
72999 /* The reset value of the ALT_USB_DEV_DIEPCTL9_SNAK register field. */
73000 #define ALT_USB_DEV_DIEPCTL9_SNAK_RESET 0x0
73001 /* Extracts the ALT_USB_DEV_DIEPCTL9_SNAK field value from a register. */
73002 #define ALT_USB_DEV_DIEPCTL9_SNAK_GET(value) (((value) & 0x08000000) >> 27)
73003 /* Produces a ALT_USB_DEV_DIEPCTL9_SNAK register field value suitable for setting the register. */
73004 #define ALT_USB_DEV_DIEPCTL9_SNAK_SET(value) (((value) << 27) & 0x08000000)
73005 
73006 /*
73007  * Field : Set DATA0 PID - setd0pid
73008  *
73009  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
73010  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
73011  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
73012  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
73013  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
73014  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
73015  * mode is enabled, this field is reserved. The frame number in which to send data
73016  * is in the transmit descriptor structure. The frame in which to receive data is
73017  * updated in receive descriptor structure.
73018  *
73019  * Field Enumeration Values:
73020  *
73021  * Enum | Value | Description
73022  * :-------------------------------------|:------|:----------------------------
73023  * ALT_USB_DEV_DIEPCTL9_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
73024  * ALT_USB_DEV_DIEPCTL9_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
73025  *
73026  * Field Access Macros:
73027  *
73028  */
73029 /*
73030  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_SETD0PID
73031  *
73032  * Disables Set DATA0 PID
73033  */
73034 #define ALT_USB_DEV_DIEPCTL9_SETD0PID_E_DISD 0x0
73035 /*
73036  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_SETD0PID
73037  *
73038  * Endpoint Data PID to DATA0)
73039  */
73040 #define ALT_USB_DEV_DIEPCTL9_SETD0PID_E_END 0x1
73041 
73042 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_SETD0PID register field. */
73043 #define ALT_USB_DEV_DIEPCTL9_SETD0PID_LSB 28
73044 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_SETD0PID register field. */
73045 #define ALT_USB_DEV_DIEPCTL9_SETD0PID_MSB 28
73046 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_SETD0PID register field. */
73047 #define ALT_USB_DEV_DIEPCTL9_SETD0PID_WIDTH 1
73048 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_SETD0PID register field value. */
73049 #define ALT_USB_DEV_DIEPCTL9_SETD0PID_SET_MSK 0x10000000
73050 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_SETD0PID register field value. */
73051 #define ALT_USB_DEV_DIEPCTL9_SETD0PID_CLR_MSK 0xefffffff
73052 /* The reset value of the ALT_USB_DEV_DIEPCTL9_SETD0PID register field. */
73053 #define ALT_USB_DEV_DIEPCTL9_SETD0PID_RESET 0x0
73054 /* Extracts the ALT_USB_DEV_DIEPCTL9_SETD0PID field value from a register. */
73055 #define ALT_USB_DEV_DIEPCTL9_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
73056 /* Produces a ALT_USB_DEV_DIEPCTL9_SETD0PID register field value suitable for setting the register. */
73057 #define ALT_USB_DEV_DIEPCTL9_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
73058 
73059 /*
73060  * Field : Set DATA1 PID - setd1pid
73061  *
73062  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
73063  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
73064  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
73065  *
73066  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
73067  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
73068  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
73069  *
73070  * Field Enumeration Values:
73071  *
73072  * Enum | Value | Description
73073  * :-------------------------------------|:------|:-----------------------
73074  * ALT_USB_DEV_DIEPCTL9_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
73075  * ALT_USB_DEV_DIEPCTL9_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
73076  *
73077  * Field Access Macros:
73078  *
73079  */
73080 /*
73081  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_SETD1PID
73082  *
73083  * Disables Set DATA1 PID
73084  */
73085 #define ALT_USB_DEV_DIEPCTL9_SETD1PID_E_DISD 0x0
73086 /*
73087  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_SETD1PID
73088  *
73089  * Enables Set DATA1 PID
73090  */
73091 #define ALT_USB_DEV_DIEPCTL9_SETD1PID_E_END 0x1
73092 
73093 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_SETD1PID register field. */
73094 #define ALT_USB_DEV_DIEPCTL9_SETD1PID_LSB 29
73095 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_SETD1PID register field. */
73096 #define ALT_USB_DEV_DIEPCTL9_SETD1PID_MSB 29
73097 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_SETD1PID register field. */
73098 #define ALT_USB_DEV_DIEPCTL9_SETD1PID_WIDTH 1
73099 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_SETD1PID register field value. */
73100 #define ALT_USB_DEV_DIEPCTL9_SETD1PID_SET_MSK 0x20000000
73101 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_SETD1PID register field value. */
73102 #define ALT_USB_DEV_DIEPCTL9_SETD1PID_CLR_MSK 0xdfffffff
73103 /* The reset value of the ALT_USB_DEV_DIEPCTL9_SETD1PID register field. */
73104 #define ALT_USB_DEV_DIEPCTL9_SETD1PID_RESET 0x0
73105 /* Extracts the ALT_USB_DEV_DIEPCTL9_SETD1PID field value from a register. */
73106 #define ALT_USB_DEV_DIEPCTL9_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
73107 /* Produces a ALT_USB_DEV_DIEPCTL9_SETD1PID register field value suitable for setting the register. */
73108 #define ALT_USB_DEV_DIEPCTL9_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
73109 
73110 /*
73111  * Field : Endpoint Disable - epdis
73112  *
73113  * Applies to IN and OUT endpoints. The application sets this bit to stop
73114  * transmitting/receiving data on an endpoint, even before the transfer for that
73115  * endpoint is complete. The application must wait for the Endpoint Disabled
73116  * interrupt before treating the endpoint as disabled. The core clears this bit
73117  * before setting the Endpoint Disabled interrupt. The application must set this
73118  * bit only if Endpoint Enable is already set for this endpoint.
73119  *
73120  * Field Enumeration Values:
73121  *
73122  * Enum | Value | Description
73123  * :-----------------------------------|:------|:--------------------
73124  * ALT_USB_DEV_DIEPCTL9_EPDIS_E_INACT | 0x0 | No Endpoint Disable
73125  * ALT_USB_DEV_DIEPCTL9_EPDIS_E_ACT | 0x1 | Endpoint Disable
73126  *
73127  * Field Access Macros:
73128  *
73129  */
73130 /*
73131  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_EPDIS
73132  *
73133  * No Endpoint Disable
73134  */
73135 #define ALT_USB_DEV_DIEPCTL9_EPDIS_E_INACT 0x0
73136 /*
73137  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_EPDIS
73138  *
73139  * Endpoint Disable
73140  */
73141 #define ALT_USB_DEV_DIEPCTL9_EPDIS_E_ACT 0x1
73142 
73143 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_EPDIS register field. */
73144 #define ALT_USB_DEV_DIEPCTL9_EPDIS_LSB 30
73145 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_EPDIS register field. */
73146 #define ALT_USB_DEV_DIEPCTL9_EPDIS_MSB 30
73147 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_EPDIS register field. */
73148 #define ALT_USB_DEV_DIEPCTL9_EPDIS_WIDTH 1
73149 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_EPDIS register field value. */
73150 #define ALT_USB_DEV_DIEPCTL9_EPDIS_SET_MSK 0x40000000
73151 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_EPDIS register field value. */
73152 #define ALT_USB_DEV_DIEPCTL9_EPDIS_CLR_MSK 0xbfffffff
73153 /* The reset value of the ALT_USB_DEV_DIEPCTL9_EPDIS register field. */
73154 #define ALT_USB_DEV_DIEPCTL9_EPDIS_RESET 0x0
73155 /* Extracts the ALT_USB_DEV_DIEPCTL9_EPDIS field value from a register. */
73156 #define ALT_USB_DEV_DIEPCTL9_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
73157 /* Produces a ALT_USB_DEV_DIEPCTL9_EPDIS register field value suitable for setting the register. */
73158 #define ALT_USB_DEV_DIEPCTL9_EPDIS_SET(value) (((value) << 30) & 0x40000000)
73159 
73160 /*
73161  * Field : Endpoint Enable - epena
73162  *
73163  * Applies to IN and OUT endpoints.
73164  *
73165  * * When Scatter/Gather DMA mode is enabled,
73166  *
73167  * * for IN endpoints this bit indicates that the descriptor structure and data
73168  * buffer with data ready to transmit is setup.
73169  *
73170  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
73171  * receive data is setup.
73172  *
73173  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
73174  * mode:
73175  *
73176  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
73177  * the endpoint.
73178  *
73179  * * for OUT endpoints, this bit indicates that the application has allocated the
73180  * memory to start receiving data from the USB.
73181  *
73182  * * The core clears this bit before setting any of the following interrupts on
73183  * this endpoint:
73184  *
73185  * * SETUP Phase Done
73186  *
73187  * * Endpoint Disabled
73188  *
73189  * * Transfer Completed
73190  *
73191  * for control endpoints in DMA mode, this bit must be set to be able to transfer
73192  * SETUP data packets in memory.
73193  *
73194  * Field Enumeration Values:
73195  *
73196  * Enum | Value | Description
73197  * :-----------------------------------|:------|:-------------------------
73198  * ALT_USB_DEV_DIEPCTL9_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
73199  * ALT_USB_DEV_DIEPCTL9_EPENA_E_ACT | 0x1 | Endpoint Enable active
73200  *
73201  * Field Access Macros:
73202  *
73203  */
73204 /*
73205  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_EPENA
73206  *
73207  * Endpoint Enable inactive
73208  */
73209 #define ALT_USB_DEV_DIEPCTL9_EPENA_E_INACT 0x0
73210 /*
73211  * Enumerated value for register field ALT_USB_DEV_DIEPCTL9_EPENA
73212  *
73213  * Endpoint Enable active
73214  */
73215 #define ALT_USB_DEV_DIEPCTL9_EPENA_E_ACT 0x1
73216 
73217 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL9_EPENA register field. */
73218 #define ALT_USB_DEV_DIEPCTL9_EPENA_LSB 31
73219 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL9_EPENA register field. */
73220 #define ALT_USB_DEV_DIEPCTL9_EPENA_MSB 31
73221 /* The width in bits of the ALT_USB_DEV_DIEPCTL9_EPENA register field. */
73222 #define ALT_USB_DEV_DIEPCTL9_EPENA_WIDTH 1
73223 /* The mask used to set the ALT_USB_DEV_DIEPCTL9_EPENA register field value. */
73224 #define ALT_USB_DEV_DIEPCTL9_EPENA_SET_MSK 0x80000000
73225 /* The mask used to clear the ALT_USB_DEV_DIEPCTL9_EPENA register field value. */
73226 #define ALT_USB_DEV_DIEPCTL9_EPENA_CLR_MSK 0x7fffffff
73227 /* The reset value of the ALT_USB_DEV_DIEPCTL9_EPENA register field. */
73228 #define ALT_USB_DEV_DIEPCTL9_EPENA_RESET 0x0
73229 /* Extracts the ALT_USB_DEV_DIEPCTL9_EPENA field value from a register. */
73230 #define ALT_USB_DEV_DIEPCTL9_EPENA_GET(value) (((value) & 0x80000000) >> 31)
73231 /* Produces a ALT_USB_DEV_DIEPCTL9_EPENA register field value suitable for setting the register. */
73232 #define ALT_USB_DEV_DIEPCTL9_EPENA_SET(value) (((value) << 31) & 0x80000000)
73233 
73234 #ifndef __ASSEMBLY__
73235 /*
73236  * WARNING: The C register and register group struct declarations are provided for
73237  * convenience and illustrative purposes. They should, however, be used with
73238  * caution as the C language standard provides no guarantees about the alignment or
73239  * atomicity of device memory accesses. The recommended practice for writing
73240  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
73241  * alt_write_word() functions.
73242  *
73243  * The struct declaration for register ALT_USB_DEV_DIEPCTL9.
73244  */
73245 struct ALT_USB_DEV_DIEPCTL9_s
73246 {
73247  uint32_t mps : 11; /* Maximum Packet Size */
73248  uint32_t : 4; /* *UNDEFINED* */
73249  uint32_t usbactep : 1; /* USB Active Endpoint */
73250  const uint32_t dpid : 1; /* Endpoint Data PID */
73251  const uint32_t naksts : 1; /* NAK Status */
73252  uint32_t eptype : 2; /* Endpoint Type */
73253  uint32_t : 1; /* *UNDEFINED* */
73254  const uint32_t stall : 1; /* STALL Handshake */
73255  uint32_t txfnum : 4; /* TxFIFO Number */
73256  uint32_t cnak : 1; /* Clear NAK */
73257  uint32_t snak : 1; /* Set NAK */
73258  uint32_t setd0pid : 1; /* Set DATA0 PID */
73259  uint32_t setd1pid : 1; /* Set DATA1 PID */
73260  const uint32_t epdis : 1; /* Endpoint Disable */
73261  const uint32_t epena : 1; /* Endpoint Enable */
73262 };
73263 
73264 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL9. */
73265 typedef volatile struct ALT_USB_DEV_DIEPCTL9_s ALT_USB_DEV_DIEPCTL9_t;
73266 #endif /* __ASSEMBLY__ */
73267 
73268 /* The byte offset of the ALT_USB_DEV_DIEPCTL9 register from the beginning of the component. */
73269 #define ALT_USB_DEV_DIEPCTL9_OFST 0x220
73270 /* The address of the ALT_USB_DEV_DIEPCTL9 register. */
73271 #define ALT_USB_DEV_DIEPCTL9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL9_OFST))
73272 
73273 /*
73274  * Register : Device IN Endpoint 9 Interrupt Register - diepint9
73275  *
73276  * This register indicates the status of an endpoint with respect to USB- and AHB-
73277  * related events. The application must read this register when the OUT Endpoints
73278  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
73279  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
73280  * can read this register, it must first read the Device All Endpoints Interrupt
73281  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
73282  * Interrupt register. The application must clear the appropriate bit in this
73283  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
73284  *
73285  * Register Layout
73286  *
73287  * Bits | Access | Reset | Description
73288  * :--------|:-------|:------|:---------------------------------------
73289  * [0] | R | 0x0 | Transfer Completed Interrupt
73290  * [1] | R | 0x0 | Endpoint Disabled Interrupt
73291  * [2] | R | 0x0 | AHB Error
73292  * [3] | R | 0x0 | Timeout Condition
73293  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
73294  * [5] | R | 0x0 | IN Token Received with EP Mismatch
73295  * [6] | R | 0x0 | IN Endpoint NAK Effective
73296  * [7] | R | 0x1 | Transmit FIFO Empty
73297  * [8] | R | 0x0 | Fifo Underrun
73298  * [9] | R | 0x0 | BNA Interrupt
73299  * [10] | ??? | 0x0 | *UNDEFINED*
73300  * [11] | R | 0x0 | Packet Drop Status
73301  * [12] | R | 0x0 | BbleErr Interrupt
73302  * [13] | R | 0x0 | NAK Interrupt
73303  * [14] | R | 0x0 | NYET Interrupt
73304  * [31:15] | ??? | 0x0 | *UNDEFINED*
73305  *
73306  */
73307 /*
73308  * Field : Transfer Completed Interrupt - xfercompl
73309  *
73310  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
73311  *
73312  * * for IN endpoint this field indicates that the requested data from the
73313  * descriptor is moved from external system memory to internal FIFO.
73314  *
73315  * * for OUT endpoint this field indicates that the requested data from the
73316  * internal FIFO is moved to external system memory. This interrupt is generated
73317  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
73318  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
73319  * this field indicates that the programmed transfer is complete on the AHB as
73320  * well as on the USB, for this endpoint.
73321  *
73322  * Field Enumeration Values:
73323  *
73324  * Enum | Value | Description
73325  * :---------------------------------------|:------|:-----------------------------
73326  * ALT_USB_DEV_DIEPINT9_XFERCOMPL_E_INACT | 0x0 | No Interrupt
73327  * ALT_USB_DEV_DIEPINT9_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
73328  *
73329  * Field Access Macros:
73330  *
73331  */
73332 /*
73333  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_XFERCOMPL
73334  *
73335  * No Interrupt
73336  */
73337 #define ALT_USB_DEV_DIEPINT9_XFERCOMPL_E_INACT 0x0
73338 /*
73339  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_XFERCOMPL
73340  *
73341  * Transfer Completed Interrupt
73342  */
73343 #define ALT_USB_DEV_DIEPINT9_XFERCOMPL_E_ACT 0x1
73344 
73345 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_XFERCOMPL register field. */
73346 #define ALT_USB_DEV_DIEPINT9_XFERCOMPL_LSB 0
73347 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_XFERCOMPL register field. */
73348 #define ALT_USB_DEV_DIEPINT9_XFERCOMPL_MSB 0
73349 /* The width in bits of the ALT_USB_DEV_DIEPINT9_XFERCOMPL register field. */
73350 #define ALT_USB_DEV_DIEPINT9_XFERCOMPL_WIDTH 1
73351 /* The mask used to set the ALT_USB_DEV_DIEPINT9_XFERCOMPL register field value. */
73352 #define ALT_USB_DEV_DIEPINT9_XFERCOMPL_SET_MSK 0x00000001
73353 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_XFERCOMPL register field value. */
73354 #define ALT_USB_DEV_DIEPINT9_XFERCOMPL_CLR_MSK 0xfffffffe
73355 /* The reset value of the ALT_USB_DEV_DIEPINT9_XFERCOMPL register field. */
73356 #define ALT_USB_DEV_DIEPINT9_XFERCOMPL_RESET 0x0
73357 /* Extracts the ALT_USB_DEV_DIEPINT9_XFERCOMPL field value from a register. */
73358 #define ALT_USB_DEV_DIEPINT9_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
73359 /* Produces a ALT_USB_DEV_DIEPINT9_XFERCOMPL register field value suitable for setting the register. */
73360 #define ALT_USB_DEV_DIEPINT9_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
73361 
73362 /*
73363  * Field : Endpoint Disabled Interrupt - epdisbld
73364  *
73365  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
73366  * disabled per the application's request.
73367  *
73368  * Field Enumeration Values:
73369  *
73370  * Enum | Value | Description
73371  * :--------------------------------------|:------|:----------------------------
73372  * ALT_USB_DEV_DIEPINT9_EPDISBLD_E_INACT | 0x0 | No Interrupt
73373  * ALT_USB_DEV_DIEPINT9_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
73374  *
73375  * Field Access Macros:
73376  *
73377  */
73378 /*
73379  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_EPDISBLD
73380  *
73381  * No Interrupt
73382  */
73383 #define ALT_USB_DEV_DIEPINT9_EPDISBLD_E_INACT 0x0
73384 /*
73385  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_EPDISBLD
73386  *
73387  * Endpoint Disabled Interrupt
73388  */
73389 #define ALT_USB_DEV_DIEPINT9_EPDISBLD_E_ACT 0x1
73390 
73391 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_EPDISBLD register field. */
73392 #define ALT_USB_DEV_DIEPINT9_EPDISBLD_LSB 1
73393 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_EPDISBLD register field. */
73394 #define ALT_USB_DEV_DIEPINT9_EPDISBLD_MSB 1
73395 /* The width in bits of the ALT_USB_DEV_DIEPINT9_EPDISBLD register field. */
73396 #define ALT_USB_DEV_DIEPINT9_EPDISBLD_WIDTH 1
73397 /* The mask used to set the ALT_USB_DEV_DIEPINT9_EPDISBLD register field value. */
73398 #define ALT_USB_DEV_DIEPINT9_EPDISBLD_SET_MSK 0x00000002
73399 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_EPDISBLD register field value. */
73400 #define ALT_USB_DEV_DIEPINT9_EPDISBLD_CLR_MSK 0xfffffffd
73401 /* The reset value of the ALT_USB_DEV_DIEPINT9_EPDISBLD register field. */
73402 #define ALT_USB_DEV_DIEPINT9_EPDISBLD_RESET 0x0
73403 /* Extracts the ALT_USB_DEV_DIEPINT9_EPDISBLD field value from a register. */
73404 #define ALT_USB_DEV_DIEPINT9_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
73405 /* Produces a ALT_USB_DEV_DIEPINT9_EPDISBLD register field value suitable for setting the register. */
73406 #define ALT_USB_DEV_DIEPINT9_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
73407 
73408 /*
73409  * Field : AHB Error - ahberr
73410  *
73411  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
73412  * there is an AHB error during an AHB read/write. The application can read the
73413  * corresponding endpoint DMA address register to get the error address.
73414  *
73415  * Field Enumeration Values:
73416  *
73417  * Enum | Value | Description
73418  * :------------------------------------|:------|:--------------------
73419  * ALT_USB_DEV_DIEPINT9_AHBERR_E_INACT | 0x0 | No Interrupt
73420  * ALT_USB_DEV_DIEPINT9_AHBERR_E_ACT | 0x1 | AHB Error interrupt
73421  *
73422  * Field Access Macros:
73423  *
73424  */
73425 /*
73426  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_AHBERR
73427  *
73428  * No Interrupt
73429  */
73430 #define ALT_USB_DEV_DIEPINT9_AHBERR_E_INACT 0x0
73431 /*
73432  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_AHBERR
73433  *
73434  * AHB Error interrupt
73435  */
73436 #define ALT_USB_DEV_DIEPINT9_AHBERR_E_ACT 0x1
73437 
73438 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_AHBERR register field. */
73439 #define ALT_USB_DEV_DIEPINT9_AHBERR_LSB 2
73440 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_AHBERR register field. */
73441 #define ALT_USB_DEV_DIEPINT9_AHBERR_MSB 2
73442 /* The width in bits of the ALT_USB_DEV_DIEPINT9_AHBERR register field. */
73443 #define ALT_USB_DEV_DIEPINT9_AHBERR_WIDTH 1
73444 /* The mask used to set the ALT_USB_DEV_DIEPINT9_AHBERR register field value. */
73445 #define ALT_USB_DEV_DIEPINT9_AHBERR_SET_MSK 0x00000004
73446 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_AHBERR register field value. */
73447 #define ALT_USB_DEV_DIEPINT9_AHBERR_CLR_MSK 0xfffffffb
73448 /* The reset value of the ALT_USB_DEV_DIEPINT9_AHBERR register field. */
73449 #define ALT_USB_DEV_DIEPINT9_AHBERR_RESET 0x0
73450 /* Extracts the ALT_USB_DEV_DIEPINT9_AHBERR field value from a register. */
73451 #define ALT_USB_DEV_DIEPINT9_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
73452 /* Produces a ALT_USB_DEV_DIEPINT9_AHBERR register field value suitable for setting the register. */
73453 #define ALT_USB_DEV_DIEPINT9_AHBERR_SET(value) (((value) << 2) & 0x00000004)
73454 
73455 /*
73456  * Field : Timeout Condition - timeout
73457  *
73458  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
73459  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
73460  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
73461  * detected a timeout condition on the USB for the last IN token on this endpoint.
73462  *
73463  * Field Enumeration Values:
73464  *
73465  * Enum | Value | Description
73466  * :---------------------------------|:------|:------------------
73467  * ALT_USB_DEV_DIEPINT9_TMO_E_INACT | 0x0 | No interrupt
73468  * ALT_USB_DEV_DIEPINT9_TMO_E_ACT | 0x1 | Timeout interrupy
73469  *
73470  * Field Access Macros:
73471  *
73472  */
73473 /*
73474  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_TMO
73475  *
73476  * No interrupt
73477  */
73478 #define ALT_USB_DEV_DIEPINT9_TMO_E_INACT 0x0
73479 /*
73480  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_TMO
73481  *
73482  * Timeout interrupy
73483  */
73484 #define ALT_USB_DEV_DIEPINT9_TMO_E_ACT 0x1
73485 
73486 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_TMO register field. */
73487 #define ALT_USB_DEV_DIEPINT9_TMO_LSB 3
73488 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_TMO register field. */
73489 #define ALT_USB_DEV_DIEPINT9_TMO_MSB 3
73490 /* The width in bits of the ALT_USB_DEV_DIEPINT9_TMO register field. */
73491 #define ALT_USB_DEV_DIEPINT9_TMO_WIDTH 1
73492 /* The mask used to set the ALT_USB_DEV_DIEPINT9_TMO register field value. */
73493 #define ALT_USB_DEV_DIEPINT9_TMO_SET_MSK 0x00000008
73494 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_TMO register field value. */
73495 #define ALT_USB_DEV_DIEPINT9_TMO_CLR_MSK 0xfffffff7
73496 /* The reset value of the ALT_USB_DEV_DIEPINT9_TMO register field. */
73497 #define ALT_USB_DEV_DIEPINT9_TMO_RESET 0x0
73498 /* Extracts the ALT_USB_DEV_DIEPINT9_TMO field value from a register. */
73499 #define ALT_USB_DEV_DIEPINT9_TMO_GET(value) (((value) & 0x00000008) >> 3)
73500 /* Produces a ALT_USB_DEV_DIEPINT9_TMO register field value suitable for setting the register. */
73501 #define ALT_USB_DEV_DIEPINT9_TMO_SET(value) (((value) << 3) & 0x00000008)
73502 
73503 /*
73504  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
73505  *
73506  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
73507  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
73508  * interrupt is asserted on the endpoint for which the IN token was received.
73509  *
73510  * Field Enumeration Values:
73511  *
73512  * Enum | Value | Description
73513  * :-----------------------------------------|:------|:----------------------------
73514  * ALT_USB_DEV_DIEPINT9_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
73515  * ALT_USB_DEV_DIEPINT9_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
73516  *
73517  * Field Access Macros:
73518  *
73519  */
73520 /*
73521  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_INTKNTXFEMP
73522  *
73523  * No interrupt
73524  */
73525 #define ALT_USB_DEV_DIEPINT9_INTKNTXFEMP_E_INACT 0x0
73526 /*
73527  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_INTKNTXFEMP
73528  *
73529  * IN Token Received Interrupt
73530  */
73531 #define ALT_USB_DEV_DIEPINT9_INTKNTXFEMP_E_ACT 0x1
73532 
73533 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_INTKNTXFEMP register field. */
73534 #define ALT_USB_DEV_DIEPINT9_INTKNTXFEMP_LSB 4
73535 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_INTKNTXFEMP register field. */
73536 #define ALT_USB_DEV_DIEPINT9_INTKNTXFEMP_MSB 4
73537 /* The width in bits of the ALT_USB_DEV_DIEPINT9_INTKNTXFEMP register field. */
73538 #define ALT_USB_DEV_DIEPINT9_INTKNTXFEMP_WIDTH 1
73539 /* The mask used to set the ALT_USB_DEV_DIEPINT9_INTKNTXFEMP register field value. */
73540 #define ALT_USB_DEV_DIEPINT9_INTKNTXFEMP_SET_MSK 0x00000010
73541 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_INTKNTXFEMP register field value. */
73542 #define ALT_USB_DEV_DIEPINT9_INTKNTXFEMP_CLR_MSK 0xffffffef
73543 /* The reset value of the ALT_USB_DEV_DIEPINT9_INTKNTXFEMP register field. */
73544 #define ALT_USB_DEV_DIEPINT9_INTKNTXFEMP_RESET 0x0
73545 /* Extracts the ALT_USB_DEV_DIEPINT9_INTKNTXFEMP field value from a register. */
73546 #define ALT_USB_DEV_DIEPINT9_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
73547 /* Produces a ALT_USB_DEV_DIEPINT9_INTKNTXFEMP register field value suitable for setting the register. */
73548 #define ALT_USB_DEV_DIEPINT9_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
73549 
73550 /*
73551  * Field : IN Token Received with EP Mismatch - intknepmis
73552  *
73553  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
73554  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
73555  * IN token was received. This interrupt is asserted on the endpoint for which the
73556  * IN token was received.
73557  *
73558  * Field Enumeration Values:
73559  *
73560  * Enum | Value | Description
73561  * :----------------------------------------|:------|:---------------------------------------------
73562  * ALT_USB_DEV_DIEPINT9_INTKNEPMIS_E_INACT | 0x0 | No interrupt
73563  * ALT_USB_DEV_DIEPINT9_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
73564  *
73565  * Field Access Macros:
73566  *
73567  */
73568 /*
73569  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_INTKNEPMIS
73570  *
73571  * No interrupt
73572  */
73573 #define ALT_USB_DEV_DIEPINT9_INTKNEPMIS_E_INACT 0x0
73574 /*
73575  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_INTKNEPMIS
73576  *
73577  * IN Token Received with EP Mismatch interrupt
73578  */
73579 #define ALT_USB_DEV_DIEPINT9_INTKNEPMIS_E_ACT 0x1
73580 
73581 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_INTKNEPMIS register field. */
73582 #define ALT_USB_DEV_DIEPINT9_INTKNEPMIS_LSB 5
73583 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_INTKNEPMIS register field. */
73584 #define ALT_USB_DEV_DIEPINT9_INTKNEPMIS_MSB 5
73585 /* The width in bits of the ALT_USB_DEV_DIEPINT9_INTKNEPMIS register field. */
73586 #define ALT_USB_DEV_DIEPINT9_INTKNEPMIS_WIDTH 1
73587 /* The mask used to set the ALT_USB_DEV_DIEPINT9_INTKNEPMIS register field value. */
73588 #define ALT_USB_DEV_DIEPINT9_INTKNEPMIS_SET_MSK 0x00000020
73589 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_INTKNEPMIS register field value. */
73590 #define ALT_USB_DEV_DIEPINT9_INTKNEPMIS_CLR_MSK 0xffffffdf
73591 /* The reset value of the ALT_USB_DEV_DIEPINT9_INTKNEPMIS register field. */
73592 #define ALT_USB_DEV_DIEPINT9_INTKNEPMIS_RESET 0x0
73593 /* Extracts the ALT_USB_DEV_DIEPINT9_INTKNEPMIS field value from a register. */
73594 #define ALT_USB_DEV_DIEPINT9_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
73595 /* Produces a ALT_USB_DEV_DIEPINT9_INTKNEPMIS register field value suitable for setting the register. */
73596 #define ALT_USB_DEV_DIEPINT9_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
73597 
73598 /*
73599  * Field : IN Endpoint NAK Effective - inepnakeff
73600  *
73601  * Applies to periodic IN endpoints only. This bit can be cleared when the
73602  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
73603  * interrupt indicates that the core has sampled the NAK bit Set (either by the
73604  * application or by the core). The interrupt indicates that the IN endpoint NAK
73605  * bit Set by the application has taken effect in the core.This interrupt does not
73606  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
73607  * over a NAK bit.
73608  *
73609  * Field Enumeration Values:
73610  *
73611  * Enum | Value | Description
73612  * :----------------------------------------|:------|:------------------------------------
73613  * ALT_USB_DEV_DIEPINT9_INEPNAKEFF_E_INACT | 0x0 | No interrupt
73614  * ALT_USB_DEV_DIEPINT9_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
73615  *
73616  * Field Access Macros:
73617  *
73618  */
73619 /*
73620  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_INEPNAKEFF
73621  *
73622  * No interrupt
73623  */
73624 #define ALT_USB_DEV_DIEPINT9_INEPNAKEFF_E_INACT 0x0
73625 /*
73626  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_INEPNAKEFF
73627  *
73628  * IN Endpoint NAK Effective interrupt
73629  */
73630 #define ALT_USB_DEV_DIEPINT9_INEPNAKEFF_E_ACT 0x1
73631 
73632 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_INEPNAKEFF register field. */
73633 #define ALT_USB_DEV_DIEPINT9_INEPNAKEFF_LSB 6
73634 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_INEPNAKEFF register field. */
73635 #define ALT_USB_DEV_DIEPINT9_INEPNAKEFF_MSB 6
73636 /* The width in bits of the ALT_USB_DEV_DIEPINT9_INEPNAKEFF register field. */
73637 #define ALT_USB_DEV_DIEPINT9_INEPNAKEFF_WIDTH 1
73638 /* The mask used to set the ALT_USB_DEV_DIEPINT9_INEPNAKEFF register field value. */
73639 #define ALT_USB_DEV_DIEPINT9_INEPNAKEFF_SET_MSK 0x00000040
73640 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_INEPNAKEFF register field value. */
73641 #define ALT_USB_DEV_DIEPINT9_INEPNAKEFF_CLR_MSK 0xffffffbf
73642 /* The reset value of the ALT_USB_DEV_DIEPINT9_INEPNAKEFF register field. */
73643 #define ALT_USB_DEV_DIEPINT9_INEPNAKEFF_RESET 0x0
73644 /* Extracts the ALT_USB_DEV_DIEPINT9_INEPNAKEFF field value from a register. */
73645 #define ALT_USB_DEV_DIEPINT9_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
73646 /* Produces a ALT_USB_DEV_DIEPINT9_INEPNAKEFF register field value suitable for setting the register. */
73647 #define ALT_USB_DEV_DIEPINT9_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
73648 
73649 /*
73650  * Field : Transmit FIFO Empty - txfemp
73651  *
73652  * This bit is valid only for IN Endpoints This interrupt is asserted when the
73653  * TxFIFO for this endpoint is either half or completely empty. The half or
73654  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
73655  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
73656  *
73657  * Field Enumeration Values:
73658  *
73659  * Enum | Value | Description
73660  * :------------------------------------|:------|:------------------------------
73661  * ALT_USB_DEV_DIEPINT9_TXFEMP_E_INACT | 0x0 | No interrupt
73662  * ALT_USB_DEV_DIEPINT9_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
73663  *
73664  * Field Access Macros:
73665  *
73666  */
73667 /*
73668  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_TXFEMP
73669  *
73670  * No interrupt
73671  */
73672 #define ALT_USB_DEV_DIEPINT9_TXFEMP_E_INACT 0x0
73673 /*
73674  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_TXFEMP
73675  *
73676  * Transmit FIFO Empty interrupt
73677  */
73678 #define ALT_USB_DEV_DIEPINT9_TXFEMP_E_ACT 0x1
73679 
73680 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_TXFEMP register field. */
73681 #define ALT_USB_DEV_DIEPINT9_TXFEMP_LSB 7
73682 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_TXFEMP register field. */
73683 #define ALT_USB_DEV_DIEPINT9_TXFEMP_MSB 7
73684 /* The width in bits of the ALT_USB_DEV_DIEPINT9_TXFEMP register field. */
73685 #define ALT_USB_DEV_DIEPINT9_TXFEMP_WIDTH 1
73686 /* The mask used to set the ALT_USB_DEV_DIEPINT9_TXFEMP register field value. */
73687 #define ALT_USB_DEV_DIEPINT9_TXFEMP_SET_MSK 0x00000080
73688 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_TXFEMP register field value. */
73689 #define ALT_USB_DEV_DIEPINT9_TXFEMP_CLR_MSK 0xffffff7f
73690 /* The reset value of the ALT_USB_DEV_DIEPINT9_TXFEMP register field. */
73691 #define ALT_USB_DEV_DIEPINT9_TXFEMP_RESET 0x1
73692 /* Extracts the ALT_USB_DEV_DIEPINT9_TXFEMP field value from a register. */
73693 #define ALT_USB_DEV_DIEPINT9_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
73694 /* Produces a ALT_USB_DEV_DIEPINT9_TXFEMP register field value suitable for setting the register. */
73695 #define ALT_USB_DEV_DIEPINT9_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
73696 
73697 /*
73698  * Field : Fifo Underrun - txfifoundrn
73699  *
73700  * Applies to IN endpoints Only. The core generates this interrupt when it detects
73701  * a transmit FIFO underrun condition for this endpoint.
73702  *
73703  * Field Enumeration Values:
73704  *
73705  * Enum | Value | Description
73706  * :-----------------------------------------|:------|:------------------------
73707  * ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
73708  * ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
73709  *
73710  * Field Access Macros:
73711  *
73712  */
73713 /*
73714  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN
73715  *
73716  * No interrupt
73717  */
73718 #define ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN_E_INACT 0x0
73719 /*
73720  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN
73721  *
73722  * Fifo Underrun interrupt
73723  */
73724 #define ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN_E_ACT 0x1
73725 
73726 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN register field. */
73727 #define ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN_LSB 8
73728 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN register field. */
73729 #define ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN_MSB 8
73730 /* The width in bits of the ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN register field. */
73731 #define ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN_WIDTH 1
73732 /* The mask used to set the ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN register field value. */
73733 #define ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN_SET_MSK 0x00000100
73734 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN register field value. */
73735 #define ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN_CLR_MSK 0xfffffeff
73736 /* The reset value of the ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN register field. */
73737 #define ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN_RESET 0x0
73738 /* Extracts the ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN field value from a register. */
73739 #define ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
73740 /* Produces a ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN register field value suitable for setting the register. */
73741 #define ALT_USB_DEV_DIEPINT9_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
73742 
73743 /*
73744  * Field : BNA Interrupt - bnaintr
73745  *
73746  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
73747  * generates this interrupt when the descriptor accessed is not ready for the Core
73748  * to process, such as Host busy or DMA done
73749  *
73750  * Field Enumeration Values:
73751  *
73752  * Enum | Value | Description
73753  * :-------------------------------------|:------|:--------------
73754  * ALT_USB_DEV_DIEPINT9_BNAINTR_E_INACT | 0x0 | No interrupt
73755  * ALT_USB_DEV_DIEPINT9_BNAINTR_E_ACT | 0x1 | BNA interrupt
73756  *
73757  * Field Access Macros:
73758  *
73759  */
73760 /*
73761  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_BNAINTR
73762  *
73763  * No interrupt
73764  */
73765 #define ALT_USB_DEV_DIEPINT9_BNAINTR_E_INACT 0x0
73766 /*
73767  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_BNAINTR
73768  *
73769  * BNA interrupt
73770  */
73771 #define ALT_USB_DEV_DIEPINT9_BNAINTR_E_ACT 0x1
73772 
73773 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_BNAINTR register field. */
73774 #define ALT_USB_DEV_DIEPINT9_BNAINTR_LSB 9
73775 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_BNAINTR register field. */
73776 #define ALT_USB_DEV_DIEPINT9_BNAINTR_MSB 9
73777 /* The width in bits of the ALT_USB_DEV_DIEPINT9_BNAINTR register field. */
73778 #define ALT_USB_DEV_DIEPINT9_BNAINTR_WIDTH 1
73779 /* The mask used to set the ALT_USB_DEV_DIEPINT9_BNAINTR register field value. */
73780 #define ALT_USB_DEV_DIEPINT9_BNAINTR_SET_MSK 0x00000200
73781 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_BNAINTR register field value. */
73782 #define ALT_USB_DEV_DIEPINT9_BNAINTR_CLR_MSK 0xfffffdff
73783 /* The reset value of the ALT_USB_DEV_DIEPINT9_BNAINTR register field. */
73784 #define ALT_USB_DEV_DIEPINT9_BNAINTR_RESET 0x0
73785 /* Extracts the ALT_USB_DEV_DIEPINT9_BNAINTR field value from a register. */
73786 #define ALT_USB_DEV_DIEPINT9_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
73787 /* Produces a ALT_USB_DEV_DIEPINT9_BNAINTR register field value suitable for setting the register. */
73788 #define ALT_USB_DEV_DIEPINT9_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
73789 
73790 /*
73791  * Field : Packet Drop Status - pktdrpsts
73792  *
73793  * This bit indicates to the application that an ISOC OUT packet has been dropped.
73794  * This bit does not have an associated mask bit and does not generate an
73795  * interrupt.
73796  *
73797  * Field Enumeration Values:
73798  *
73799  * Enum | Value | Description
73800  * :---------------------------------------|:------|:-----------------------------
73801  * ALT_USB_DEV_DIEPINT9_PKTDRPSTS_E_INACT | 0x0 | No interrupt
73802  * ALT_USB_DEV_DIEPINT9_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
73803  *
73804  * Field Access Macros:
73805  *
73806  */
73807 /*
73808  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_PKTDRPSTS
73809  *
73810  * No interrupt
73811  */
73812 #define ALT_USB_DEV_DIEPINT9_PKTDRPSTS_E_INACT 0x0
73813 /*
73814  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_PKTDRPSTS
73815  *
73816  * Packet Drop Status interrupt
73817  */
73818 #define ALT_USB_DEV_DIEPINT9_PKTDRPSTS_E_ACT 0x1
73819 
73820 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_PKTDRPSTS register field. */
73821 #define ALT_USB_DEV_DIEPINT9_PKTDRPSTS_LSB 11
73822 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_PKTDRPSTS register field. */
73823 #define ALT_USB_DEV_DIEPINT9_PKTDRPSTS_MSB 11
73824 /* The width in bits of the ALT_USB_DEV_DIEPINT9_PKTDRPSTS register field. */
73825 #define ALT_USB_DEV_DIEPINT9_PKTDRPSTS_WIDTH 1
73826 /* The mask used to set the ALT_USB_DEV_DIEPINT9_PKTDRPSTS register field value. */
73827 #define ALT_USB_DEV_DIEPINT9_PKTDRPSTS_SET_MSK 0x00000800
73828 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_PKTDRPSTS register field value. */
73829 #define ALT_USB_DEV_DIEPINT9_PKTDRPSTS_CLR_MSK 0xfffff7ff
73830 /* The reset value of the ALT_USB_DEV_DIEPINT9_PKTDRPSTS register field. */
73831 #define ALT_USB_DEV_DIEPINT9_PKTDRPSTS_RESET 0x0
73832 /* Extracts the ALT_USB_DEV_DIEPINT9_PKTDRPSTS field value from a register. */
73833 #define ALT_USB_DEV_DIEPINT9_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
73834 /* Produces a ALT_USB_DEV_DIEPINT9_PKTDRPSTS register field value suitable for setting the register. */
73835 #define ALT_USB_DEV_DIEPINT9_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
73836 
73837 /*
73838  * Field : BbleErr Interrupt - bbleerr
73839  *
73840  * The core generates this interrupt when babble is received for the endpoint.
73841  *
73842  * Field Enumeration Values:
73843  *
73844  * Enum | Value | Description
73845  * :-------------------------------------|:------|:------------------
73846  * ALT_USB_DEV_DIEPINT9_BBLEERR_E_INACT | 0x0 | No interrupt
73847  * ALT_USB_DEV_DIEPINT9_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
73848  *
73849  * Field Access Macros:
73850  *
73851  */
73852 /*
73853  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_BBLEERR
73854  *
73855  * No interrupt
73856  */
73857 #define ALT_USB_DEV_DIEPINT9_BBLEERR_E_INACT 0x0
73858 /*
73859  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_BBLEERR
73860  *
73861  * BbleErr interrupt
73862  */
73863 #define ALT_USB_DEV_DIEPINT9_BBLEERR_E_ACT 0x1
73864 
73865 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_BBLEERR register field. */
73866 #define ALT_USB_DEV_DIEPINT9_BBLEERR_LSB 12
73867 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_BBLEERR register field. */
73868 #define ALT_USB_DEV_DIEPINT9_BBLEERR_MSB 12
73869 /* The width in bits of the ALT_USB_DEV_DIEPINT9_BBLEERR register field. */
73870 #define ALT_USB_DEV_DIEPINT9_BBLEERR_WIDTH 1
73871 /* The mask used to set the ALT_USB_DEV_DIEPINT9_BBLEERR register field value. */
73872 #define ALT_USB_DEV_DIEPINT9_BBLEERR_SET_MSK 0x00001000
73873 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_BBLEERR register field value. */
73874 #define ALT_USB_DEV_DIEPINT9_BBLEERR_CLR_MSK 0xffffefff
73875 /* The reset value of the ALT_USB_DEV_DIEPINT9_BBLEERR register field. */
73876 #define ALT_USB_DEV_DIEPINT9_BBLEERR_RESET 0x0
73877 /* Extracts the ALT_USB_DEV_DIEPINT9_BBLEERR field value from a register. */
73878 #define ALT_USB_DEV_DIEPINT9_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
73879 /* Produces a ALT_USB_DEV_DIEPINT9_BBLEERR register field value suitable for setting the register. */
73880 #define ALT_USB_DEV_DIEPINT9_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
73881 
73882 /*
73883  * Field : NAK Interrupt - nakintrpt
73884  *
73885  * The core generates this interrupt when a NAK is transmitted or received by the
73886  * device. In case of isochronous IN endpoints the interrupt gets generated when a
73887  * zero length packet is transmitted due to un-availability of data in the TXFifo.
73888  *
73889  * Field Enumeration Values:
73890  *
73891  * Enum | Value | Description
73892  * :---------------------------------------|:------|:--------------
73893  * ALT_USB_DEV_DIEPINT9_NAKINTRPT_E_INACT | 0x0 | No interrupt
73894  * ALT_USB_DEV_DIEPINT9_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
73895  *
73896  * Field Access Macros:
73897  *
73898  */
73899 /*
73900  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_NAKINTRPT
73901  *
73902  * No interrupt
73903  */
73904 #define ALT_USB_DEV_DIEPINT9_NAKINTRPT_E_INACT 0x0
73905 /*
73906  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_NAKINTRPT
73907  *
73908  * NAK Interrupt
73909  */
73910 #define ALT_USB_DEV_DIEPINT9_NAKINTRPT_E_ACT 0x1
73911 
73912 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_NAKINTRPT register field. */
73913 #define ALT_USB_DEV_DIEPINT9_NAKINTRPT_LSB 13
73914 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_NAKINTRPT register field. */
73915 #define ALT_USB_DEV_DIEPINT9_NAKINTRPT_MSB 13
73916 /* The width in bits of the ALT_USB_DEV_DIEPINT9_NAKINTRPT register field. */
73917 #define ALT_USB_DEV_DIEPINT9_NAKINTRPT_WIDTH 1
73918 /* The mask used to set the ALT_USB_DEV_DIEPINT9_NAKINTRPT register field value. */
73919 #define ALT_USB_DEV_DIEPINT9_NAKINTRPT_SET_MSK 0x00002000
73920 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_NAKINTRPT register field value. */
73921 #define ALT_USB_DEV_DIEPINT9_NAKINTRPT_CLR_MSK 0xffffdfff
73922 /* The reset value of the ALT_USB_DEV_DIEPINT9_NAKINTRPT register field. */
73923 #define ALT_USB_DEV_DIEPINT9_NAKINTRPT_RESET 0x0
73924 /* Extracts the ALT_USB_DEV_DIEPINT9_NAKINTRPT field value from a register. */
73925 #define ALT_USB_DEV_DIEPINT9_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
73926 /* Produces a ALT_USB_DEV_DIEPINT9_NAKINTRPT register field value suitable for setting the register. */
73927 #define ALT_USB_DEV_DIEPINT9_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
73928 
73929 /*
73930  * Field : NYET Interrupt - nyetintrpt
73931  *
73932  * The core generates this interrupt when a NYET response is transmitted for a non
73933  * isochronous OUT endpoint.
73934  *
73935  * Field Enumeration Values:
73936  *
73937  * Enum | Value | Description
73938  * :----------------------------------------|:------|:---------------
73939  * ALT_USB_DEV_DIEPINT9_NYETINTRPT_E_INACT | 0x0 | No interrupt
73940  * ALT_USB_DEV_DIEPINT9_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
73941  *
73942  * Field Access Macros:
73943  *
73944  */
73945 /*
73946  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_NYETINTRPT
73947  *
73948  * No interrupt
73949  */
73950 #define ALT_USB_DEV_DIEPINT9_NYETINTRPT_E_INACT 0x0
73951 /*
73952  * Enumerated value for register field ALT_USB_DEV_DIEPINT9_NYETINTRPT
73953  *
73954  * NYET Interrupt
73955  */
73956 #define ALT_USB_DEV_DIEPINT9_NYETINTRPT_E_ACT 0x1
73957 
73958 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT9_NYETINTRPT register field. */
73959 #define ALT_USB_DEV_DIEPINT9_NYETINTRPT_LSB 14
73960 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT9_NYETINTRPT register field. */
73961 #define ALT_USB_DEV_DIEPINT9_NYETINTRPT_MSB 14
73962 /* The width in bits of the ALT_USB_DEV_DIEPINT9_NYETINTRPT register field. */
73963 #define ALT_USB_DEV_DIEPINT9_NYETINTRPT_WIDTH 1
73964 /* The mask used to set the ALT_USB_DEV_DIEPINT9_NYETINTRPT register field value. */
73965 #define ALT_USB_DEV_DIEPINT9_NYETINTRPT_SET_MSK 0x00004000
73966 /* The mask used to clear the ALT_USB_DEV_DIEPINT9_NYETINTRPT register field value. */
73967 #define ALT_USB_DEV_DIEPINT9_NYETINTRPT_CLR_MSK 0xffffbfff
73968 /* The reset value of the ALT_USB_DEV_DIEPINT9_NYETINTRPT register field. */
73969 #define ALT_USB_DEV_DIEPINT9_NYETINTRPT_RESET 0x0
73970 /* Extracts the ALT_USB_DEV_DIEPINT9_NYETINTRPT field value from a register. */
73971 #define ALT_USB_DEV_DIEPINT9_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
73972 /* Produces a ALT_USB_DEV_DIEPINT9_NYETINTRPT register field value suitable for setting the register. */
73973 #define ALT_USB_DEV_DIEPINT9_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
73974 
73975 #ifndef __ASSEMBLY__
73976 /*
73977  * WARNING: The C register and register group struct declarations are provided for
73978  * convenience and illustrative purposes. They should, however, be used with
73979  * caution as the C language standard provides no guarantees about the alignment or
73980  * atomicity of device memory accesses. The recommended practice for writing
73981  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
73982  * alt_write_word() functions.
73983  *
73984  * The struct declaration for register ALT_USB_DEV_DIEPINT9.
73985  */
73986 struct ALT_USB_DEV_DIEPINT9_s
73987 {
73988  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
73989  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
73990  const uint32_t ahberr : 1; /* AHB Error */
73991  const uint32_t timeout : 1; /* Timeout Condition */
73992  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
73993  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
73994  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
73995  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
73996  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
73997  const uint32_t bnaintr : 1; /* BNA Interrupt */
73998  uint32_t : 1; /* *UNDEFINED* */
73999  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
74000  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
74001  const uint32_t nakintrpt : 1; /* NAK Interrupt */
74002  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
74003  uint32_t : 17; /* *UNDEFINED* */
74004 };
74005 
74006 /* The typedef declaration for register ALT_USB_DEV_DIEPINT9. */
74007 typedef volatile struct ALT_USB_DEV_DIEPINT9_s ALT_USB_DEV_DIEPINT9_t;
74008 #endif /* __ASSEMBLY__ */
74009 
74010 /* The byte offset of the ALT_USB_DEV_DIEPINT9 register from the beginning of the component. */
74011 #define ALT_USB_DEV_DIEPINT9_OFST 0x228
74012 /* The address of the ALT_USB_DEV_DIEPINT9 register. */
74013 #define ALT_USB_DEV_DIEPINT9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT9_OFST))
74014 
74015 /*
74016  * Register : Device IN Endpoint 9 Transfer Size Register - dieptsiz9
74017  *
74018  * The application must modify this register before enabling the endpoint. Once the
74019  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
74020  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
74021  * application can only read this register once the core has cleared the Endpoint
74022  * Enable bit.
74023  *
74024  * Register Layout
74025  *
74026  * Bits | Access | Reset | Description
74027  * :--------|:-------|:------|:----------------------------
74028  * [18:0] | RW | 0x0 | Transfer Size
74029  * [28:19] | RW | 0x0 | Packet Count
74030  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
74031  * [31] | ??? | 0x0 | *UNDEFINED*
74032  *
74033  */
74034 /*
74035  * Field : Transfer Size - xfersize
74036  *
74037  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
74038  * application only after it has exhausted the transfer size amount of data. The
74039  * transfer size can be Set to the maximum packet size of the endpoint, to be
74040  * interrupted at the end of each packet. The core decrements this field every time
74041  * a packet from the external memory is written to the TxFIFO.
74042  *
74043  * Field Access Macros:
74044  *
74045  */
74046 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ9_XFERSIZE register field. */
74047 #define ALT_USB_DEV_DIEPTSIZ9_XFERSIZE_LSB 0
74048 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ9_XFERSIZE register field. */
74049 #define ALT_USB_DEV_DIEPTSIZ9_XFERSIZE_MSB 18
74050 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ9_XFERSIZE register field. */
74051 #define ALT_USB_DEV_DIEPTSIZ9_XFERSIZE_WIDTH 19
74052 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ9_XFERSIZE register field value. */
74053 #define ALT_USB_DEV_DIEPTSIZ9_XFERSIZE_SET_MSK 0x0007ffff
74054 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ9_XFERSIZE register field value. */
74055 #define ALT_USB_DEV_DIEPTSIZ9_XFERSIZE_CLR_MSK 0xfff80000
74056 /* The reset value of the ALT_USB_DEV_DIEPTSIZ9_XFERSIZE register field. */
74057 #define ALT_USB_DEV_DIEPTSIZ9_XFERSIZE_RESET 0x0
74058 /* Extracts the ALT_USB_DEV_DIEPTSIZ9_XFERSIZE field value from a register. */
74059 #define ALT_USB_DEV_DIEPTSIZ9_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
74060 /* Produces a ALT_USB_DEV_DIEPTSIZ9_XFERSIZE register field value suitable for setting the register. */
74061 #define ALT_USB_DEV_DIEPTSIZ9_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
74062 
74063 /*
74064  * Field : Packet Count - PktCnt
74065  *
74066  * Indicates the total number of USB packets that constitute the Transfer Size
74067  * amount of data for endpoint 0.This field is decremented every time a packet
74068  * (maximum size or short packet) is read from the TxFIFO.
74069  *
74070  * Field Access Macros:
74071  *
74072  */
74073 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ9_PKTCNT register field. */
74074 #define ALT_USB_DEV_DIEPTSIZ9_PKTCNT_LSB 19
74075 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ9_PKTCNT register field. */
74076 #define ALT_USB_DEV_DIEPTSIZ9_PKTCNT_MSB 28
74077 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ9_PKTCNT register field. */
74078 #define ALT_USB_DEV_DIEPTSIZ9_PKTCNT_WIDTH 10
74079 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ9_PKTCNT register field value. */
74080 #define ALT_USB_DEV_DIEPTSIZ9_PKTCNT_SET_MSK 0x1ff80000
74081 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ9_PKTCNT register field value. */
74082 #define ALT_USB_DEV_DIEPTSIZ9_PKTCNT_CLR_MSK 0xe007ffff
74083 /* The reset value of the ALT_USB_DEV_DIEPTSIZ9_PKTCNT register field. */
74084 #define ALT_USB_DEV_DIEPTSIZ9_PKTCNT_RESET 0x0
74085 /* Extracts the ALT_USB_DEV_DIEPTSIZ9_PKTCNT field value from a register. */
74086 #define ALT_USB_DEV_DIEPTSIZ9_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
74087 /* Produces a ALT_USB_DEV_DIEPTSIZ9_PKTCNT register field value suitable for setting the register. */
74088 #define ALT_USB_DEV_DIEPTSIZ9_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
74089 
74090 /*
74091  * Field : Applies to IN endpoints onl - mc
74092  *
74093  * for periodic IN endpoints, this field indicates the number of packets that must
74094  * be transmitted per microframe on the USB. The core uses this field to calculate
74095  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
74096  * field is valid only in Internal DMA mode. It specifies the number of packets the
74097  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
74098  * by the Next Endpoint field of the Device Endpoint-n Control register
74099  * (DIEPCTLn.NextEp)
74100  *
74101  * Field Enumeration Values:
74102  *
74103  * Enum | Value | Description
74104  * :------------------------------------|:------|:------------
74105  * ALT_USB_DEV_DIEPTSIZ9_MC_E_PKTONE | 0x1 | 1 packet
74106  * ALT_USB_DEV_DIEPTSIZ9_MC_E_PKTTWO | 0x2 | 2 packets
74107  * ALT_USB_DEV_DIEPTSIZ9_MC_E_PKTTHREE | 0x3 | 3 packets
74108  *
74109  * Field Access Macros:
74110  *
74111  */
74112 /*
74113  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ9_MC
74114  *
74115  * 1 packet
74116  */
74117 #define ALT_USB_DEV_DIEPTSIZ9_MC_E_PKTONE 0x1
74118 /*
74119  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ9_MC
74120  *
74121  * 2 packets
74122  */
74123 #define ALT_USB_DEV_DIEPTSIZ9_MC_E_PKTTWO 0x2
74124 /*
74125  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ9_MC
74126  *
74127  * 3 packets
74128  */
74129 #define ALT_USB_DEV_DIEPTSIZ9_MC_E_PKTTHREE 0x3
74130 
74131 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ9_MC register field. */
74132 #define ALT_USB_DEV_DIEPTSIZ9_MC_LSB 29
74133 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ9_MC register field. */
74134 #define ALT_USB_DEV_DIEPTSIZ9_MC_MSB 30
74135 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ9_MC register field. */
74136 #define ALT_USB_DEV_DIEPTSIZ9_MC_WIDTH 2
74137 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ9_MC register field value. */
74138 #define ALT_USB_DEV_DIEPTSIZ9_MC_SET_MSK 0x60000000
74139 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ9_MC register field value. */
74140 #define ALT_USB_DEV_DIEPTSIZ9_MC_CLR_MSK 0x9fffffff
74141 /* The reset value of the ALT_USB_DEV_DIEPTSIZ9_MC register field. */
74142 #define ALT_USB_DEV_DIEPTSIZ9_MC_RESET 0x0
74143 /* Extracts the ALT_USB_DEV_DIEPTSIZ9_MC field value from a register. */
74144 #define ALT_USB_DEV_DIEPTSIZ9_MC_GET(value) (((value) & 0x60000000) >> 29)
74145 /* Produces a ALT_USB_DEV_DIEPTSIZ9_MC register field value suitable for setting the register. */
74146 #define ALT_USB_DEV_DIEPTSIZ9_MC_SET(value) (((value) << 29) & 0x60000000)
74147 
74148 #ifndef __ASSEMBLY__
74149 /*
74150  * WARNING: The C register and register group struct declarations are provided for
74151  * convenience and illustrative purposes. They should, however, be used with
74152  * caution as the C language standard provides no guarantees about the alignment or
74153  * atomicity of device memory accesses. The recommended practice for writing
74154  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
74155  * alt_write_word() functions.
74156  *
74157  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ9.
74158  */
74159 struct ALT_USB_DEV_DIEPTSIZ9_s
74160 {
74161  uint32_t xfersize : 19; /* Transfer Size */
74162  uint32_t PktCnt : 10; /* Packet Count */
74163  uint32_t mc : 2; /* Applies to IN endpoints onl */
74164  uint32_t : 1; /* *UNDEFINED* */
74165 };
74166 
74167 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ9. */
74168 typedef volatile struct ALT_USB_DEV_DIEPTSIZ9_s ALT_USB_DEV_DIEPTSIZ9_t;
74169 #endif /* __ASSEMBLY__ */
74170 
74171 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ9 register from the beginning of the component. */
74172 #define ALT_USB_DEV_DIEPTSIZ9_OFST 0x230
74173 /* The address of the ALT_USB_DEV_DIEPTSIZ9 register. */
74174 #define ALT_USB_DEV_DIEPTSIZ9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ9_OFST))
74175 
74176 /*
74177  * Register : Device IN Endpoint 9 DMA Address Register - diepdma9
74178  *
74179  * DMA Addressing.
74180  *
74181  * Register Layout
74182  *
74183  * Bits | Access | Reset | Description
74184  * :-------|:-------|:--------|:------------
74185  * [31:0] | RW | Unknown | DMA Address
74186  *
74187  */
74188 /*
74189  * Field : DMA Address - diepdma9
74190  *
74191  * Holds the start address of the external memory for storing or fetching endpoint
74192  * data. for control endpoints, this field stores control OUT data packets as well
74193  * as SETUP transaction data packets. When more than three SETUP packets are
74194  * received back-to-back, the SETUP data packet in the memory is overwritten. This
74195  * register is incremented on every AHB transaction. The application can give only
74196  * a DWORD-aligned address.
74197  *
74198  * When Scatter/Gather DMA mode is not enabled, the application programs the start
74199  * address value in this field.
74200  *
74201  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
74202  * for the descriptor list.
74203  *
74204  * Field Access Macros:
74205  *
74206  */
74207 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA9_DIEPDMA9 register field. */
74208 #define ALT_USB_DEV_DIEPDMA9_DIEPDMA9_LSB 0
74209 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA9_DIEPDMA9 register field. */
74210 #define ALT_USB_DEV_DIEPDMA9_DIEPDMA9_MSB 31
74211 /* The width in bits of the ALT_USB_DEV_DIEPDMA9_DIEPDMA9 register field. */
74212 #define ALT_USB_DEV_DIEPDMA9_DIEPDMA9_WIDTH 32
74213 /* The mask used to set the ALT_USB_DEV_DIEPDMA9_DIEPDMA9 register field value. */
74214 #define ALT_USB_DEV_DIEPDMA9_DIEPDMA9_SET_MSK 0xffffffff
74215 /* The mask used to clear the ALT_USB_DEV_DIEPDMA9_DIEPDMA9 register field value. */
74216 #define ALT_USB_DEV_DIEPDMA9_DIEPDMA9_CLR_MSK 0x00000000
74217 /* The reset value of the ALT_USB_DEV_DIEPDMA9_DIEPDMA9 register field is UNKNOWN. */
74218 #define ALT_USB_DEV_DIEPDMA9_DIEPDMA9_RESET 0x0
74219 /* Extracts the ALT_USB_DEV_DIEPDMA9_DIEPDMA9 field value from a register. */
74220 #define ALT_USB_DEV_DIEPDMA9_DIEPDMA9_GET(value) (((value) & 0xffffffff) >> 0)
74221 /* Produces a ALT_USB_DEV_DIEPDMA9_DIEPDMA9 register field value suitable for setting the register. */
74222 #define ALT_USB_DEV_DIEPDMA9_DIEPDMA9_SET(value) (((value) << 0) & 0xffffffff)
74223 
74224 #ifndef __ASSEMBLY__
74225 /*
74226  * WARNING: The C register and register group struct declarations are provided for
74227  * convenience and illustrative purposes. They should, however, be used with
74228  * caution as the C language standard provides no guarantees about the alignment or
74229  * atomicity of device memory accesses. The recommended practice for writing
74230  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
74231  * alt_write_word() functions.
74232  *
74233  * The struct declaration for register ALT_USB_DEV_DIEPDMA9.
74234  */
74235 struct ALT_USB_DEV_DIEPDMA9_s
74236 {
74237  uint32_t diepdma9 : 32; /* DMA Address */
74238 };
74239 
74240 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA9. */
74241 typedef volatile struct ALT_USB_DEV_DIEPDMA9_s ALT_USB_DEV_DIEPDMA9_t;
74242 #endif /* __ASSEMBLY__ */
74243 
74244 /* The byte offset of the ALT_USB_DEV_DIEPDMA9 register from the beginning of the component. */
74245 #define ALT_USB_DEV_DIEPDMA9_OFST 0x234
74246 /* The address of the ALT_USB_DEV_DIEPDMA9 register. */
74247 #define ALT_USB_DEV_DIEPDMA9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA9_OFST))
74248 
74249 /*
74250  * Register : Device IN Endpoint Transmit FIFO Status Register 9 - dtxfsts9
74251  *
74252  * This register contains the free space information for the Device IN endpoint
74253  * TxFIFO.
74254  *
74255  * Register Layout
74256  *
74257  * Bits | Access | Reset | Description
74258  * :--------|:-------|:-------|:-------------------------------
74259  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
74260  * [31:16] | ??? | 0x0 | *UNDEFINED*
74261  *
74262  */
74263 /*
74264  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
74265  *
74266  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
74267  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
74268  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
74269  * 32,768 words available Others: Reserved
74270  *
74271  * Field Access Macros:
74272  *
74273  */
74274 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL register field. */
74275 #define ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL_LSB 0
74276 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL register field. */
74277 #define ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL_MSB 15
74278 /* The width in bits of the ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL register field. */
74279 #define ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL_WIDTH 16
74280 /* The mask used to set the ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL register field value. */
74281 #define ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
74282 /* The mask used to clear the ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL register field value. */
74283 #define ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
74284 /* The reset value of the ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL register field. */
74285 #define ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL_RESET 0x2000
74286 /* Extracts the ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL field value from a register. */
74287 #define ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
74288 /* Produces a ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL register field value suitable for setting the register. */
74289 #define ALT_USB_DEV_DTXFSTS9_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
74290 
74291 #ifndef __ASSEMBLY__
74292 /*
74293  * WARNING: The C register and register group struct declarations are provided for
74294  * convenience and illustrative purposes. They should, however, be used with
74295  * caution as the C language standard provides no guarantees about the alignment or
74296  * atomicity of device memory accesses. The recommended practice for writing
74297  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
74298  * alt_write_word() functions.
74299  *
74300  * The struct declaration for register ALT_USB_DEV_DTXFSTS9.
74301  */
74302 struct ALT_USB_DEV_DTXFSTS9_s
74303 {
74304  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
74305  uint32_t : 16; /* *UNDEFINED* */
74306 };
74307 
74308 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS9. */
74309 typedef volatile struct ALT_USB_DEV_DTXFSTS9_s ALT_USB_DEV_DTXFSTS9_t;
74310 #endif /* __ASSEMBLY__ */
74311 
74312 /* The byte offset of the ALT_USB_DEV_DTXFSTS9 register from the beginning of the component. */
74313 #define ALT_USB_DEV_DTXFSTS9_OFST 0x238
74314 /* The address of the ALT_USB_DEV_DTXFSTS9 register. */
74315 #define ALT_USB_DEV_DTXFSTS9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS9_OFST))
74316 
74317 /*
74318  * Register : Device IN Endpoint 9 DMA Buffer Address Register - diepdmab9
74319  *
74320  * DMA Buffer Address.
74321  *
74322  * Register Layout
74323  *
74324  * Bits | Access | Reset | Description
74325  * :-------|:-------|:--------|:-------------------
74326  * [31:0] | R | Unknown | DMA Buffer Address
74327  *
74328  */
74329 /*
74330  * Field : DMA Buffer Address - diepdmab9
74331  *
74332  * Holds the current buffer address. This register is updated as and when the data
74333  * transfer for the corresponding end point is in progress. This register is
74334  * present only in Scatter/Gather DMA mode.
74335  *
74336  * Field Access Macros:
74337  *
74338  */
74339 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9 register field. */
74340 #define ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9_LSB 0
74341 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9 register field. */
74342 #define ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9_MSB 31
74343 /* The width in bits of the ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9 register field. */
74344 #define ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9_WIDTH 32
74345 /* The mask used to set the ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9 register field value. */
74346 #define ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9_SET_MSK 0xffffffff
74347 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9 register field value. */
74348 #define ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9_CLR_MSK 0x00000000
74349 /* The reset value of the ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9 register field is UNKNOWN. */
74350 #define ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9_RESET 0x0
74351 /* Extracts the ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9 field value from a register. */
74352 #define ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9_GET(value) (((value) & 0xffffffff) >> 0)
74353 /* Produces a ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9 register field value suitable for setting the register. */
74354 #define ALT_USB_DEV_DIEPDMAB9_DIEPDMAB9_SET(value) (((value) << 0) & 0xffffffff)
74355 
74356 #ifndef __ASSEMBLY__
74357 /*
74358  * WARNING: The C register and register group struct declarations are provided for
74359  * convenience and illustrative purposes. They should, however, be used with
74360  * caution as the C language standard provides no guarantees about the alignment or
74361  * atomicity of device memory accesses. The recommended practice for writing
74362  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
74363  * alt_write_word() functions.
74364  *
74365  * The struct declaration for register ALT_USB_DEV_DIEPDMAB9.
74366  */
74367 struct ALT_USB_DEV_DIEPDMAB9_s
74368 {
74369  const uint32_t diepdmab9 : 32; /* DMA Buffer Address */
74370 };
74371 
74372 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB9. */
74373 typedef volatile struct ALT_USB_DEV_DIEPDMAB9_s ALT_USB_DEV_DIEPDMAB9_t;
74374 #endif /* __ASSEMBLY__ */
74375 
74376 /* The byte offset of the ALT_USB_DEV_DIEPDMAB9 register from the beginning of the component. */
74377 #define ALT_USB_DEV_DIEPDMAB9_OFST 0x23c
74378 /* The address of the ALT_USB_DEV_DIEPDMAB9 register. */
74379 #define ALT_USB_DEV_DIEPDMAB9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB9_OFST))
74380 
74381 /*
74382  * Register : Device Control IN Endpoint 10 Control Register - diepctl10
74383  *
74384  * Endpoint_number: 10
74385  *
74386  * Register Layout
74387  *
74388  * Bits | Access | Reset | Description
74389  * :--------|:-------|:------|:--------------------
74390  * [10:0] | RW | 0x0 | Maximum Packet Size
74391  * [14:11] | ??? | 0x0 | *UNDEFINED*
74392  * [15] | RW | 0x0 | USB Active Endpoint
74393  * [16] | R | 0x0 | Endpoint Data PID
74394  * [17] | R | 0x0 | NAK Status
74395  * [19:18] | RW | 0x0 | Endpoint Type
74396  * [20] | ??? | 0x0 | *UNDEFINED*
74397  * [21] | R | 0x0 | STALL Handshake
74398  * [25:22] | RW | 0x0 | TxFIFO Number
74399  * [26] | W | 0x0 | Clear NAK
74400  * [27] | W | 0x0 | Set NAK
74401  * [28] | W | 0x0 | Set DATA0 PID
74402  * [29] | W | 0x0 | Set DATA1 PID
74403  * [30] | R | 0x0 | Endpoint Disable
74404  * [31] | R | 0x0 | Endpoint Enable
74405  *
74406  */
74407 /*
74408  * Field : Maximum Packet Size - mps
74409  *
74410  * Applies to IN and OUT endpoints. The application must program this field with
74411  * the maximum packet size for the current logical endpoint. This value is in
74412  * bytes.
74413  *
74414  * Field Access Macros:
74415  *
74416  */
74417 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_MPS register field. */
74418 #define ALT_USB_DEV_DIEPCTL10_MPS_LSB 0
74419 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_MPS register field. */
74420 #define ALT_USB_DEV_DIEPCTL10_MPS_MSB 10
74421 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_MPS register field. */
74422 #define ALT_USB_DEV_DIEPCTL10_MPS_WIDTH 11
74423 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_MPS register field value. */
74424 #define ALT_USB_DEV_DIEPCTL10_MPS_SET_MSK 0x000007ff
74425 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_MPS register field value. */
74426 #define ALT_USB_DEV_DIEPCTL10_MPS_CLR_MSK 0xfffff800
74427 /* The reset value of the ALT_USB_DEV_DIEPCTL10_MPS register field. */
74428 #define ALT_USB_DEV_DIEPCTL10_MPS_RESET 0x0
74429 /* Extracts the ALT_USB_DEV_DIEPCTL10_MPS field value from a register. */
74430 #define ALT_USB_DEV_DIEPCTL10_MPS_GET(value) (((value) & 0x000007ff) >> 0)
74431 /* Produces a ALT_USB_DEV_DIEPCTL10_MPS register field value suitable for setting the register. */
74432 #define ALT_USB_DEV_DIEPCTL10_MPS_SET(value) (((value) << 0) & 0x000007ff)
74433 
74434 /*
74435  * Field : USB Active Endpoint - usbactep
74436  *
74437  * Indicates whether this endpoint is active in the current configuration and
74438  * interface. The core clears this bit for all endpoints (other than EP 0) after
74439  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
74440  * commands, the application must program endpoint registers accordingly and set
74441  * this bit.
74442  *
74443  * Field Enumeration Values:
74444  *
74445  * Enum | Value | Description
74446  * :--------------------------------------|:------|:--------------------
74447  * ALT_USB_DEV_DIEPCTL10_USBACTEP_E_DISD | 0x0 | Not Active
74448  * ALT_USB_DEV_DIEPCTL10_USBACTEP_E_END | 0x1 | USB Active Endpoint
74449  *
74450  * Field Access Macros:
74451  *
74452  */
74453 /*
74454  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_USBACTEP
74455  *
74456  * Not Active
74457  */
74458 #define ALT_USB_DEV_DIEPCTL10_USBACTEP_E_DISD 0x0
74459 /*
74460  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_USBACTEP
74461  *
74462  * USB Active Endpoint
74463  */
74464 #define ALT_USB_DEV_DIEPCTL10_USBACTEP_E_END 0x1
74465 
74466 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_USBACTEP register field. */
74467 #define ALT_USB_DEV_DIEPCTL10_USBACTEP_LSB 15
74468 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_USBACTEP register field. */
74469 #define ALT_USB_DEV_DIEPCTL10_USBACTEP_MSB 15
74470 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_USBACTEP register field. */
74471 #define ALT_USB_DEV_DIEPCTL10_USBACTEP_WIDTH 1
74472 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_USBACTEP register field value. */
74473 #define ALT_USB_DEV_DIEPCTL10_USBACTEP_SET_MSK 0x00008000
74474 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_USBACTEP register field value. */
74475 #define ALT_USB_DEV_DIEPCTL10_USBACTEP_CLR_MSK 0xffff7fff
74476 /* The reset value of the ALT_USB_DEV_DIEPCTL10_USBACTEP register field. */
74477 #define ALT_USB_DEV_DIEPCTL10_USBACTEP_RESET 0x0
74478 /* Extracts the ALT_USB_DEV_DIEPCTL10_USBACTEP field value from a register. */
74479 #define ALT_USB_DEV_DIEPCTL10_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
74480 /* Produces a ALT_USB_DEV_DIEPCTL10_USBACTEP register field value suitable for setting the register. */
74481 #define ALT_USB_DEV_DIEPCTL10_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
74482 
74483 /*
74484  * Field : Endpoint Data PID - dpid
74485  *
74486  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
74487  * packet to be received or transmitted on this endpoint. The application must
74488  * program the PID of the first packet to be received or transmitted on this
74489  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
74490  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
74491  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
74492  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
74493  * DMA mode:
74494  *
74495  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
74496  * number in which the core transmits/receives isochronous data for this endpoint.
74497  * The application must program the even/odd (micro) frame number in which it
74498  * intends to transmit/receive isochronous data for this endpoint using the
74499  * SetEvnFr and SetOddFr fields in this register.
74500  *
74501  * 0: Even (micro)frame
74502  *
74503  * 1: Odd (micro)frame
74504  *
74505  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
74506  * number in which to send data is provided in the transmit descriptor structure.
74507  * The frame in which data is received is updated in receive descriptor structure.
74508  *
74509  * Field Enumeration Values:
74510  *
74511  * Enum | Value | Description
74512  * :-----------------------------------|:------|:-----------------------------
74513  * ALT_USB_DEV_DIEPCTL10_DPID_E_INACT | 0x0 | Endpoint Data PID not active
74514  * ALT_USB_DEV_DIEPCTL10_DPID_E_ACT | 0x1 | Endpoint Data PID active
74515  *
74516  * Field Access Macros:
74517  *
74518  */
74519 /*
74520  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_DPID
74521  *
74522  * Endpoint Data PID not active
74523  */
74524 #define ALT_USB_DEV_DIEPCTL10_DPID_E_INACT 0x0
74525 /*
74526  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_DPID
74527  *
74528  * Endpoint Data PID active
74529  */
74530 #define ALT_USB_DEV_DIEPCTL10_DPID_E_ACT 0x1
74531 
74532 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_DPID register field. */
74533 #define ALT_USB_DEV_DIEPCTL10_DPID_LSB 16
74534 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_DPID register field. */
74535 #define ALT_USB_DEV_DIEPCTL10_DPID_MSB 16
74536 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_DPID register field. */
74537 #define ALT_USB_DEV_DIEPCTL10_DPID_WIDTH 1
74538 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_DPID register field value. */
74539 #define ALT_USB_DEV_DIEPCTL10_DPID_SET_MSK 0x00010000
74540 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_DPID register field value. */
74541 #define ALT_USB_DEV_DIEPCTL10_DPID_CLR_MSK 0xfffeffff
74542 /* The reset value of the ALT_USB_DEV_DIEPCTL10_DPID register field. */
74543 #define ALT_USB_DEV_DIEPCTL10_DPID_RESET 0x0
74544 /* Extracts the ALT_USB_DEV_DIEPCTL10_DPID field value from a register. */
74545 #define ALT_USB_DEV_DIEPCTL10_DPID_GET(value) (((value) & 0x00010000) >> 16)
74546 /* Produces a ALT_USB_DEV_DIEPCTL10_DPID register field value suitable for setting the register. */
74547 #define ALT_USB_DEV_DIEPCTL10_DPID_SET(value) (((value) << 16) & 0x00010000)
74548 
74549 /*
74550  * Field : NAK Status - naksts
74551  *
74552  * When either the application or the core sets this bit:
74553  *
74554  * * The core stops receiving any data on an OUT endpoint, even if there is space
74555  * in the RxFIFO to accommodate the incoming packet.
74556  *
74557  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
74558  * IN endpoint, even if there data is available in the TxFIFO.
74559  *
74560  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
74561  * even if there data is available in the TxFIFO.
74562  *
74563  * Irrespective of this bit's setting, the core always responds to SETUP data
74564  * packets with an ACK handshake.
74565  *
74566  * Field Enumeration Values:
74567  *
74568  * Enum | Value | Description
74569  * :--------------------------------------|:------|:------------------------------------------------
74570  * ALT_USB_DEV_DIEPCTL10_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
74571  * : | | based on the FIFO status
74572  * ALT_USB_DEV_DIEPCTL10_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
74573  * : | | endpoint
74574  *
74575  * Field Access Macros:
74576  *
74577  */
74578 /*
74579  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_NAKSTS
74580  *
74581  * The core is transmitting non-NAK handshakes based on the FIFO status
74582  */
74583 #define ALT_USB_DEV_DIEPCTL10_NAKSTS_E_NONNAK 0x0
74584 /*
74585  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_NAKSTS
74586  *
74587  * The core is transmitting NAK handshakes on this endpoint
74588  */
74589 #define ALT_USB_DEV_DIEPCTL10_NAKSTS_E_NAK 0x1
74590 
74591 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_NAKSTS register field. */
74592 #define ALT_USB_DEV_DIEPCTL10_NAKSTS_LSB 17
74593 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_NAKSTS register field. */
74594 #define ALT_USB_DEV_DIEPCTL10_NAKSTS_MSB 17
74595 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_NAKSTS register field. */
74596 #define ALT_USB_DEV_DIEPCTL10_NAKSTS_WIDTH 1
74597 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_NAKSTS register field value. */
74598 #define ALT_USB_DEV_DIEPCTL10_NAKSTS_SET_MSK 0x00020000
74599 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_NAKSTS register field value. */
74600 #define ALT_USB_DEV_DIEPCTL10_NAKSTS_CLR_MSK 0xfffdffff
74601 /* The reset value of the ALT_USB_DEV_DIEPCTL10_NAKSTS register field. */
74602 #define ALT_USB_DEV_DIEPCTL10_NAKSTS_RESET 0x0
74603 /* Extracts the ALT_USB_DEV_DIEPCTL10_NAKSTS field value from a register. */
74604 #define ALT_USB_DEV_DIEPCTL10_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
74605 /* Produces a ALT_USB_DEV_DIEPCTL10_NAKSTS register field value suitable for setting the register. */
74606 #define ALT_USB_DEV_DIEPCTL10_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
74607 
74608 /*
74609  * Field : Endpoint Type - eptype
74610  *
74611  * This is the transfer type supported by this logical endpoint.
74612  *
74613  * Field Enumeration Values:
74614  *
74615  * Enum | Value | Description
74616  * :-------------------------------------------|:------|:------------
74617  * ALT_USB_DEV_DIEPCTL10_EPTYPE_E_CTL | 0x0 | Control
74618  * ALT_USB_DEV_DIEPCTL10_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
74619  * ALT_USB_DEV_DIEPCTL10_EPTYPE_E_BULK | 0x2 | Bulk
74620  * ALT_USB_DEV_DIEPCTL10_EPTYPE_E_INTERRUP | 0x3 | Interrupt
74621  *
74622  * Field Access Macros:
74623  *
74624  */
74625 /*
74626  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_EPTYPE
74627  *
74628  * Control
74629  */
74630 #define ALT_USB_DEV_DIEPCTL10_EPTYPE_E_CTL 0x0
74631 /*
74632  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_EPTYPE
74633  *
74634  * Isochronous
74635  */
74636 #define ALT_USB_DEV_DIEPCTL10_EPTYPE_E_ISOCHRONOUS 0x1
74637 /*
74638  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_EPTYPE
74639  *
74640  * Bulk
74641  */
74642 #define ALT_USB_DEV_DIEPCTL10_EPTYPE_E_BULK 0x2
74643 /*
74644  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_EPTYPE
74645  *
74646  * Interrupt
74647  */
74648 #define ALT_USB_DEV_DIEPCTL10_EPTYPE_E_INTERRUP 0x3
74649 
74650 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_EPTYPE register field. */
74651 #define ALT_USB_DEV_DIEPCTL10_EPTYPE_LSB 18
74652 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_EPTYPE register field. */
74653 #define ALT_USB_DEV_DIEPCTL10_EPTYPE_MSB 19
74654 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_EPTYPE register field. */
74655 #define ALT_USB_DEV_DIEPCTL10_EPTYPE_WIDTH 2
74656 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_EPTYPE register field value. */
74657 #define ALT_USB_DEV_DIEPCTL10_EPTYPE_SET_MSK 0x000c0000
74658 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_EPTYPE register field value. */
74659 #define ALT_USB_DEV_DIEPCTL10_EPTYPE_CLR_MSK 0xfff3ffff
74660 /* The reset value of the ALT_USB_DEV_DIEPCTL10_EPTYPE register field. */
74661 #define ALT_USB_DEV_DIEPCTL10_EPTYPE_RESET 0x0
74662 /* Extracts the ALT_USB_DEV_DIEPCTL10_EPTYPE field value from a register. */
74663 #define ALT_USB_DEV_DIEPCTL10_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
74664 /* Produces a ALT_USB_DEV_DIEPCTL10_EPTYPE register field value suitable for setting the register. */
74665 #define ALT_USB_DEV_DIEPCTL10_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
74666 
74667 /*
74668  * Field : STALL Handshake - stall
74669  *
74670  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
74671  * application sets this bit to stall all tokens from the USB host to this
74672  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
74673  * along with this bit, the STALL bit takes priority. Only the application can
74674  * clear this bit, never the core. Applies to control endpoints only. The
74675  * application can only set this bit, and the core clears it, when a SETUP token is
74676  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
74677  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
74678  * of this bit's setting, the core always responds to SETUP data packets with an
74679  * ACK handshake.
74680  *
74681  * Field Enumeration Values:
74682  *
74683  * Enum | Value | Description
74684  * :------------------------------------|:------|:----------------------------
74685  * ALT_USB_DEV_DIEPCTL10_STALL_E_INACT | 0x0 | STALL All Tokens not active
74686  * ALT_USB_DEV_DIEPCTL10_STALL_E_ACT | 0x1 | STALL All Tokens active
74687  *
74688  * Field Access Macros:
74689  *
74690  */
74691 /*
74692  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_STALL
74693  *
74694  * STALL All Tokens not active
74695  */
74696 #define ALT_USB_DEV_DIEPCTL10_STALL_E_INACT 0x0
74697 /*
74698  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_STALL
74699  *
74700  * STALL All Tokens active
74701  */
74702 #define ALT_USB_DEV_DIEPCTL10_STALL_E_ACT 0x1
74703 
74704 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_STALL register field. */
74705 #define ALT_USB_DEV_DIEPCTL10_STALL_LSB 21
74706 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_STALL register field. */
74707 #define ALT_USB_DEV_DIEPCTL10_STALL_MSB 21
74708 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_STALL register field. */
74709 #define ALT_USB_DEV_DIEPCTL10_STALL_WIDTH 1
74710 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_STALL register field value. */
74711 #define ALT_USB_DEV_DIEPCTL10_STALL_SET_MSK 0x00200000
74712 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_STALL register field value. */
74713 #define ALT_USB_DEV_DIEPCTL10_STALL_CLR_MSK 0xffdfffff
74714 /* The reset value of the ALT_USB_DEV_DIEPCTL10_STALL register field. */
74715 #define ALT_USB_DEV_DIEPCTL10_STALL_RESET 0x0
74716 /* Extracts the ALT_USB_DEV_DIEPCTL10_STALL field value from a register. */
74717 #define ALT_USB_DEV_DIEPCTL10_STALL_GET(value) (((value) & 0x00200000) >> 21)
74718 /* Produces a ALT_USB_DEV_DIEPCTL10_STALL register field value suitable for setting the register. */
74719 #define ALT_USB_DEV_DIEPCTL10_STALL_SET(value) (((value) << 21) & 0x00200000)
74720 
74721 /*
74722  * Field : TxFIFO Number - txfnum
74723  *
74724  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
74725  * endpoints must map this to the corresponding Periodic TxFIFO number.
74726  *
74727  * 4'h0: Non-Periodic TxFIFO
74728  *
74729  * Others: Specified Periodic TxFIFO.number
74730  *
74731  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
74732  * applications such as mass storage. The core treats an IN endpoint as a non-
74733  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
74734  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
74735  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
74736  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
74737  * This field is valid only for IN endpoints.
74738  *
74739  * Field Access Macros:
74740  *
74741  */
74742 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_TXFNUM register field. */
74743 #define ALT_USB_DEV_DIEPCTL10_TXFNUM_LSB 22
74744 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_TXFNUM register field. */
74745 #define ALT_USB_DEV_DIEPCTL10_TXFNUM_MSB 25
74746 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_TXFNUM register field. */
74747 #define ALT_USB_DEV_DIEPCTL10_TXFNUM_WIDTH 4
74748 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_TXFNUM register field value. */
74749 #define ALT_USB_DEV_DIEPCTL10_TXFNUM_SET_MSK 0x03c00000
74750 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_TXFNUM register field value. */
74751 #define ALT_USB_DEV_DIEPCTL10_TXFNUM_CLR_MSK 0xfc3fffff
74752 /* The reset value of the ALT_USB_DEV_DIEPCTL10_TXFNUM register field. */
74753 #define ALT_USB_DEV_DIEPCTL10_TXFNUM_RESET 0x0
74754 /* Extracts the ALT_USB_DEV_DIEPCTL10_TXFNUM field value from a register. */
74755 #define ALT_USB_DEV_DIEPCTL10_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
74756 /* Produces a ALT_USB_DEV_DIEPCTL10_TXFNUM register field value suitable for setting the register. */
74757 #define ALT_USB_DEV_DIEPCTL10_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
74758 
74759 /*
74760  * Field : Clear NAK - cnak
74761  *
74762  * A write to this bit clears the NAK bit for the endpoint.
74763  *
74764  * Field Enumeration Values:
74765  *
74766  * Enum | Value | Description
74767  * :-----------------------------------|:------|:-------------
74768  * ALT_USB_DEV_DIEPCTL10_CNAK_E_INACT | 0x0 | No Clear NAK
74769  * ALT_USB_DEV_DIEPCTL10_CNAK_E_ACT | 0x1 | Clear NAK
74770  *
74771  * Field Access Macros:
74772  *
74773  */
74774 /*
74775  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_CNAK
74776  *
74777  * No Clear NAK
74778  */
74779 #define ALT_USB_DEV_DIEPCTL10_CNAK_E_INACT 0x0
74780 /*
74781  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_CNAK
74782  *
74783  * Clear NAK
74784  */
74785 #define ALT_USB_DEV_DIEPCTL10_CNAK_E_ACT 0x1
74786 
74787 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_CNAK register field. */
74788 #define ALT_USB_DEV_DIEPCTL10_CNAK_LSB 26
74789 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_CNAK register field. */
74790 #define ALT_USB_DEV_DIEPCTL10_CNAK_MSB 26
74791 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_CNAK register field. */
74792 #define ALT_USB_DEV_DIEPCTL10_CNAK_WIDTH 1
74793 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_CNAK register field value. */
74794 #define ALT_USB_DEV_DIEPCTL10_CNAK_SET_MSK 0x04000000
74795 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_CNAK register field value. */
74796 #define ALT_USB_DEV_DIEPCTL10_CNAK_CLR_MSK 0xfbffffff
74797 /* The reset value of the ALT_USB_DEV_DIEPCTL10_CNAK register field. */
74798 #define ALT_USB_DEV_DIEPCTL10_CNAK_RESET 0x0
74799 /* Extracts the ALT_USB_DEV_DIEPCTL10_CNAK field value from a register. */
74800 #define ALT_USB_DEV_DIEPCTL10_CNAK_GET(value) (((value) & 0x04000000) >> 26)
74801 /* Produces a ALT_USB_DEV_DIEPCTL10_CNAK register field value suitable for setting the register. */
74802 #define ALT_USB_DEV_DIEPCTL10_CNAK_SET(value) (((value) << 26) & 0x04000000)
74803 
74804 /*
74805  * Field : Set NAK - snak
74806  *
74807  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
74808  * application can control the transmission of NAK handshakes on an endpoint. The
74809  * core can also Set this bit for an endpoint after a SETUP packet is received on
74810  * that endpoint.
74811  *
74812  * Field Enumeration Values:
74813  *
74814  * Enum | Value | Description
74815  * :-----------------------------------|:------|:------------
74816  * ALT_USB_DEV_DIEPCTL10_SNAK_E_INACT | 0x0 | No Set NAK
74817  * ALT_USB_DEV_DIEPCTL10_SNAK_E_ACT | 0x1 | Set NAK
74818  *
74819  * Field Access Macros:
74820  *
74821  */
74822 /*
74823  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_SNAK
74824  *
74825  * No Set NAK
74826  */
74827 #define ALT_USB_DEV_DIEPCTL10_SNAK_E_INACT 0x0
74828 /*
74829  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_SNAK
74830  *
74831  * Set NAK
74832  */
74833 #define ALT_USB_DEV_DIEPCTL10_SNAK_E_ACT 0x1
74834 
74835 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_SNAK register field. */
74836 #define ALT_USB_DEV_DIEPCTL10_SNAK_LSB 27
74837 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_SNAK register field. */
74838 #define ALT_USB_DEV_DIEPCTL10_SNAK_MSB 27
74839 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_SNAK register field. */
74840 #define ALT_USB_DEV_DIEPCTL10_SNAK_WIDTH 1
74841 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_SNAK register field value. */
74842 #define ALT_USB_DEV_DIEPCTL10_SNAK_SET_MSK 0x08000000
74843 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_SNAK register field value. */
74844 #define ALT_USB_DEV_DIEPCTL10_SNAK_CLR_MSK 0xf7ffffff
74845 /* The reset value of the ALT_USB_DEV_DIEPCTL10_SNAK register field. */
74846 #define ALT_USB_DEV_DIEPCTL10_SNAK_RESET 0x0
74847 /* Extracts the ALT_USB_DEV_DIEPCTL10_SNAK field value from a register. */
74848 #define ALT_USB_DEV_DIEPCTL10_SNAK_GET(value) (((value) & 0x08000000) >> 27)
74849 /* Produces a ALT_USB_DEV_DIEPCTL10_SNAK register field value suitable for setting the register. */
74850 #define ALT_USB_DEV_DIEPCTL10_SNAK_SET(value) (((value) << 27) & 0x08000000)
74851 
74852 /*
74853  * Field : Set DATA0 PID - setd0pid
74854  *
74855  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
74856  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
74857  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
74858  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
74859  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
74860  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
74861  * mode is enabled, this field is reserved. The frame number in which to send data
74862  * is in the transmit descriptor structure. The frame in which to receive data is
74863  * updated in receive descriptor structure.
74864  *
74865  * Field Enumeration Values:
74866  *
74867  * Enum | Value | Description
74868  * :--------------------------------------|:------|:----------------------------
74869  * ALT_USB_DEV_DIEPCTL10_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
74870  * ALT_USB_DEV_DIEPCTL10_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
74871  *
74872  * Field Access Macros:
74873  *
74874  */
74875 /*
74876  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_SETD0PID
74877  *
74878  * Disables Set DATA0 PID
74879  */
74880 #define ALT_USB_DEV_DIEPCTL10_SETD0PID_E_DISD 0x0
74881 /*
74882  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_SETD0PID
74883  *
74884  * Endpoint Data PID to DATA0)
74885  */
74886 #define ALT_USB_DEV_DIEPCTL10_SETD0PID_E_END 0x1
74887 
74888 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_SETD0PID register field. */
74889 #define ALT_USB_DEV_DIEPCTL10_SETD0PID_LSB 28
74890 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_SETD0PID register field. */
74891 #define ALT_USB_DEV_DIEPCTL10_SETD0PID_MSB 28
74892 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_SETD0PID register field. */
74893 #define ALT_USB_DEV_DIEPCTL10_SETD0PID_WIDTH 1
74894 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_SETD0PID register field value. */
74895 #define ALT_USB_DEV_DIEPCTL10_SETD0PID_SET_MSK 0x10000000
74896 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_SETD0PID register field value. */
74897 #define ALT_USB_DEV_DIEPCTL10_SETD0PID_CLR_MSK 0xefffffff
74898 /* The reset value of the ALT_USB_DEV_DIEPCTL10_SETD0PID register field. */
74899 #define ALT_USB_DEV_DIEPCTL10_SETD0PID_RESET 0x0
74900 /* Extracts the ALT_USB_DEV_DIEPCTL10_SETD0PID field value from a register. */
74901 #define ALT_USB_DEV_DIEPCTL10_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
74902 /* Produces a ALT_USB_DEV_DIEPCTL10_SETD0PID register field value suitable for setting the register. */
74903 #define ALT_USB_DEV_DIEPCTL10_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
74904 
74905 /*
74906  * Field : Set DATA1 PID - setd1pid
74907  *
74908  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
74909  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
74910  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
74911  *
74912  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
74913  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
74914  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
74915  *
74916  * Field Enumeration Values:
74917  *
74918  * Enum | Value | Description
74919  * :--------------------------------------|:------|:-----------------------
74920  * ALT_USB_DEV_DIEPCTL10_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
74921  * ALT_USB_DEV_DIEPCTL10_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
74922  *
74923  * Field Access Macros:
74924  *
74925  */
74926 /*
74927  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_SETD1PID
74928  *
74929  * Disables Set DATA1 PID
74930  */
74931 #define ALT_USB_DEV_DIEPCTL10_SETD1PID_E_DISD 0x0
74932 /*
74933  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_SETD1PID
74934  *
74935  * Enables Set DATA1 PID
74936  */
74937 #define ALT_USB_DEV_DIEPCTL10_SETD1PID_E_END 0x1
74938 
74939 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_SETD1PID register field. */
74940 #define ALT_USB_DEV_DIEPCTL10_SETD1PID_LSB 29
74941 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_SETD1PID register field. */
74942 #define ALT_USB_DEV_DIEPCTL10_SETD1PID_MSB 29
74943 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_SETD1PID register field. */
74944 #define ALT_USB_DEV_DIEPCTL10_SETD1PID_WIDTH 1
74945 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_SETD1PID register field value. */
74946 #define ALT_USB_DEV_DIEPCTL10_SETD1PID_SET_MSK 0x20000000
74947 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_SETD1PID register field value. */
74948 #define ALT_USB_DEV_DIEPCTL10_SETD1PID_CLR_MSK 0xdfffffff
74949 /* The reset value of the ALT_USB_DEV_DIEPCTL10_SETD1PID register field. */
74950 #define ALT_USB_DEV_DIEPCTL10_SETD1PID_RESET 0x0
74951 /* Extracts the ALT_USB_DEV_DIEPCTL10_SETD1PID field value from a register. */
74952 #define ALT_USB_DEV_DIEPCTL10_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
74953 /* Produces a ALT_USB_DEV_DIEPCTL10_SETD1PID register field value suitable for setting the register. */
74954 #define ALT_USB_DEV_DIEPCTL10_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
74955 
74956 /*
74957  * Field : Endpoint Disable - epdis
74958  *
74959  * Applies to IN and OUT endpoints. The application sets this bit to stop
74960  * transmitting/receiving data on an endpoint, even before the transfer for that
74961  * endpoint is complete. The application must wait for the Endpoint Disabled
74962  * interrupt before treating the endpoint as disabled. The core clears this bit
74963  * before setting the Endpoint Disabled interrupt. The application must set this
74964  * bit only if Endpoint Enable is already set for this endpoint.
74965  *
74966  * Field Enumeration Values:
74967  *
74968  * Enum | Value | Description
74969  * :------------------------------------|:------|:--------------------
74970  * ALT_USB_DEV_DIEPCTL10_EPDIS_E_INACT | 0x0 | No Endpoint Disable
74971  * ALT_USB_DEV_DIEPCTL10_EPDIS_E_ACT | 0x1 | Endpoint Disable
74972  *
74973  * Field Access Macros:
74974  *
74975  */
74976 /*
74977  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_EPDIS
74978  *
74979  * No Endpoint Disable
74980  */
74981 #define ALT_USB_DEV_DIEPCTL10_EPDIS_E_INACT 0x0
74982 /*
74983  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_EPDIS
74984  *
74985  * Endpoint Disable
74986  */
74987 #define ALT_USB_DEV_DIEPCTL10_EPDIS_E_ACT 0x1
74988 
74989 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_EPDIS register field. */
74990 #define ALT_USB_DEV_DIEPCTL10_EPDIS_LSB 30
74991 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_EPDIS register field. */
74992 #define ALT_USB_DEV_DIEPCTL10_EPDIS_MSB 30
74993 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_EPDIS register field. */
74994 #define ALT_USB_DEV_DIEPCTL10_EPDIS_WIDTH 1
74995 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_EPDIS register field value. */
74996 #define ALT_USB_DEV_DIEPCTL10_EPDIS_SET_MSK 0x40000000
74997 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_EPDIS register field value. */
74998 #define ALT_USB_DEV_DIEPCTL10_EPDIS_CLR_MSK 0xbfffffff
74999 /* The reset value of the ALT_USB_DEV_DIEPCTL10_EPDIS register field. */
75000 #define ALT_USB_DEV_DIEPCTL10_EPDIS_RESET 0x0
75001 /* Extracts the ALT_USB_DEV_DIEPCTL10_EPDIS field value from a register. */
75002 #define ALT_USB_DEV_DIEPCTL10_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
75003 /* Produces a ALT_USB_DEV_DIEPCTL10_EPDIS register field value suitable for setting the register. */
75004 #define ALT_USB_DEV_DIEPCTL10_EPDIS_SET(value) (((value) << 30) & 0x40000000)
75005 
75006 /*
75007  * Field : Endpoint Enable - epena
75008  *
75009  * Applies to IN and OUT endpoints.
75010  *
75011  * * When Scatter/Gather DMA mode is enabled,
75012  *
75013  * * for IN endpoints this bit indicates that the descriptor structure and data
75014  * buffer with data ready to transmit is setup.
75015  *
75016  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
75017  * receive data is setup.
75018  *
75019  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
75020  * mode:
75021  *
75022  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
75023  * the endpoint.
75024  *
75025  * * for OUT endpoints, this bit indicates that the application has allocated the
75026  * memory to start receiving data from the USB.
75027  *
75028  * * The core clears this bit before setting any of the following interrupts on
75029  * this endpoint:
75030  *
75031  * * SETUP Phase Done
75032  *
75033  * * Endpoint Disabled
75034  *
75035  * * Transfer Completed
75036  *
75037  * for control endpoints in DMA mode, this bit must be set to be able to transfer
75038  * SETUP data packets in memory.
75039  *
75040  * Field Enumeration Values:
75041  *
75042  * Enum | Value | Description
75043  * :------------------------------------|:------|:-------------------------
75044  * ALT_USB_DEV_DIEPCTL10_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
75045  * ALT_USB_DEV_DIEPCTL10_EPENA_E_ACT | 0x1 | Endpoint Enable active
75046  *
75047  * Field Access Macros:
75048  *
75049  */
75050 /*
75051  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_EPENA
75052  *
75053  * Endpoint Enable inactive
75054  */
75055 #define ALT_USB_DEV_DIEPCTL10_EPENA_E_INACT 0x0
75056 /*
75057  * Enumerated value for register field ALT_USB_DEV_DIEPCTL10_EPENA
75058  *
75059  * Endpoint Enable active
75060  */
75061 #define ALT_USB_DEV_DIEPCTL10_EPENA_E_ACT 0x1
75062 
75063 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL10_EPENA register field. */
75064 #define ALT_USB_DEV_DIEPCTL10_EPENA_LSB 31
75065 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL10_EPENA register field. */
75066 #define ALT_USB_DEV_DIEPCTL10_EPENA_MSB 31
75067 /* The width in bits of the ALT_USB_DEV_DIEPCTL10_EPENA register field. */
75068 #define ALT_USB_DEV_DIEPCTL10_EPENA_WIDTH 1
75069 /* The mask used to set the ALT_USB_DEV_DIEPCTL10_EPENA register field value. */
75070 #define ALT_USB_DEV_DIEPCTL10_EPENA_SET_MSK 0x80000000
75071 /* The mask used to clear the ALT_USB_DEV_DIEPCTL10_EPENA register field value. */
75072 #define ALT_USB_DEV_DIEPCTL10_EPENA_CLR_MSK 0x7fffffff
75073 /* The reset value of the ALT_USB_DEV_DIEPCTL10_EPENA register field. */
75074 #define ALT_USB_DEV_DIEPCTL10_EPENA_RESET 0x0
75075 /* Extracts the ALT_USB_DEV_DIEPCTL10_EPENA field value from a register. */
75076 #define ALT_USB_DEV_DIEPCTL10_EPENA_GET(value) (((value) & 0x80000000) >> 31)
75077 /* Produces a ALT_USB_DEV_DIEPCTL10_EPENA register field value suitable for setting the register. */
75078 #define ALT_USB_DEV_DIEPCTL10_EPENA_SET(value) (((value) << 31) & 0x80000000)
75079 
75080 #ifndef __ASSEMBLY__
75081 /*
75082  * WARNING: The C register and register group struct declarations are provided for
75083  * convenience and illustrative purposes. They should, however, be used with
75084  * caution as the C language standard provides no guarantees about the alignment or
75085  * atomicity of device memory accesses. The recommended practice for writing
75086  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
75087  * alt_write_word() functions.
75088  *
75089  * The struct declaration for register ALT_USB_DEV_DIEPCTL10.
75090  */
75091 struct ALT_USB_DEV_DIEPCTL10_s
75092 {
75093  uint32_t mps : 11; /* Maximum Packet Size */
75094  uint32_t : 4; /* *UNDEFINED* */
75095  uint32_t usbactep : 1; /* USB Active Endpoint */
75096  const uint32_t dpid : 1; /* Endpoint Data PID */
75097  const uint32_t naksts : 1; /* NAK Status */
75098  uint32_t eptype : 2; /* Endpoint Type */
75099  uint32_t : 1; /* *UNDEFINED* */
75100  const uint32_t stall : 1; /* STALL Handshake */
75101  uint32_t txfnum : 4; /* TxFIFO Number */
75102  uint32_t cnak : 1; /* Clear NAK */
75103  uint32_t snak : 1; /* Set NAK */
75104  uint32_t setd0pid : 1; /* Set DATA0 PID */
75105  uint32_t setd1pid : 1; /* Set DATA1 PID */
75106  const uint32_t epdis : 1; /* Endpoint Disable */
75107  const uint32_t epena : 1; /* Endpoint Enable */
75108 };
75109 
75110 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL10. */
75111 typedef volatile struct ALT_USB_DEV_DIEPCTL10_s ALT_USB_DEV_DIEPCTL10_t;
75112 #endif /* __ASSEMBLY__ */
75113 
75114 /* The byte offset of the ALT_USB_DEV_DIEPCTL10 register from the beginning of the component. */
75115 #define ALT_USB_DEV_DIEPCTL10_OFST 0x240
75116 /* The address of the ALT_USB_DEV_DIEPCTL10 register. */
75117 #define ALT_USB_DEV_DIEPCTL10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL10_OFST))
75118 
75119 /*
75120  * Register : Device IN Endpoint 10 Interrupt Register - diepint10
75121  *
75122  * This register indicates the status of an endpoint with respect to USB- and AHB-
75123  * related events. The application must read this register when the OUT Endpoints
75124  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
75125  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
75126  * can read this register, it must first read the Device All Endpoints Interrupt
75127  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
75128  * Interrupt register. The application must clear the appropriate bit in this
75129  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
75130  *
75131  * Register Layout
75132  *
75133  * Bits | Access | Reset | Description
75134  * :--------|:-------|:------|:---------------------------------------
75135  * [0] | R | 0x0 | Transfer Completed Interrupt
75136  * [1] | R | 0x0 | Endpoint Disabled Interrupt
75137  * [2] | R | 0x0 | AHB Error
75138  * [3] | R | 0x0 | Timeout Condition
75139  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
75140  * [5] | R | 0x0 | IN Token Received with EP Mismatch
75141  * [6] | R | 0x0 | IN Endpoint NAK Effective
75142  * [7] | R | 0x1 | Transmit FIFO Empty
75143  * [8] | R | 0x0 | Fifo Underrun
75144  * [9] | R | 0x0 | BNA Interrupt
75145  * [10] | ??? | 0x0 | *UNDEFINED*
75146  * [11] | R | 0x0 | Packet Drop Status
75147  * [12] | R | 0x0 | BbleErr Interrupt
75148  * [13] | R | 0x0 | NAK Interrupt
75149  * [14] | R | 0x0 | NYET Interrupt
75150  * [31:15] | ??? | 0x0 | *UNDEFINED*
75151  *
75152  */
75153 /*
75154  * Field : Transfer Completed Interrupt - xfercompl
75155  *
75156  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
75157  *
75158  * * for IN endpoint this field indicates that the requested data from the
75159  * descriptor is moved from external system memory to internal FIFO.
75160  *
75161  * * for OUT endpoint this field indicates that the requested data from the
75162  * internal FIFO is moved to external system memory. This interrupt is generated
75163  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
75164  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
75165  * this field indicates that the programmed transfer is complete on the AHB as
75166  * well as on the USB, for this endpoint.
75167  *
75168  * Field Enumeration Values:
75169  *
75170  * Enum | Value | Description
75171  * :----------------------------------------|:------|:-----------------------------
75172  * ALT_USB_DEV_DIEPINT10_XFERCOMPL_E_INACT | 0x0 | No Interrupt
75173  * ALT_USB_DEV_DIEPINT10_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
75174  *
75175  * Field Access Macros:
75176  *
75177  */
75178 /*
75179  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_XFERCOMPL
75180  *
75181  * No Interrupt
75182  */
75183 #define ALT_USB_DEV_DIEPINT10_XFERCOMPL_E_INACT 0x0
75184 /*
75185  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_XFERCOMPL
75186  *
75187  * Transfer Completed Interrupt
75188  */
75189 #define ALT_USB_DEV_DIEPINT10_XFERCOMPL_E_ACT 0x1
75190 
75191 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_XFERCOMPL register field. */
75192 #define ALT_USB_DEV_DIEPINT10_XFERCOMPL_LSB 0
75193 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_XFERCOMPL register field. */
75194 #define ALT_USB_DEV_DIEPINT10_XFERCOMPL_MSB 0
75195 /* The width in bits of the ALT_USB_DEV_DIEPINT10_XFERCOMPL register field. */
75196 #define ALT_USB_DEV_DIEPINT10_XFERCOMPL_WIDTH 1
75197 /* The mask used to set the ALT_USB_DEV_DIEPINT10_XFERCOMPL register field value. */
75198 #define ALT_USB_DEV_DIEPINT10_XFERCOMPL_SET_MSK 0x00000001
75199 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_XFERCOMPL register field value. */
75200 #define ALT_USB_DEV_DIEPINT10_XFERCOMPL_CLR_MSK 0xfffffffe
75201 /* The reset value of the ALT_USB_DEV_DIEPINT10_XFERCOMPL register field. */
75202 #define ALT_USB_DEV_DIEPINT10_XFERCOMPL_RESET 0x0
75203 /* Extracts the ALT_USB_DEV_DIEPINT10_XFERCOMPL field value from a register. */
75204 #define ALT_USB_DEV_DIEPINT10_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
75205 /* Produces a ALT_USB_DEV_DIEPINT10_XFERCOMPL register field value suitable for setting the register. */
75206 #define ALT_USB_DEV_DIEPINT10_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
75207 
75208 /*
75209  * Field : Endpoint Disabled Interrupt - epdisbld
75210  *
75211  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
75212  * disabled per the application's request.
75213  *
75214  * Field Enumeration Values:
75215  *
75216  * Enum | Value | Description
75217  * :---------------------------------------|:------|:----------------------------
75218  * ALT_USB_DEV_DIEPINT10_EPDISBLD_E_INACT | 0x0 | No Interrupt
75219  * ALT_USB_DEV_DIEPINT10_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
75220  *
75221  * Field Access Macros:
75222  *
75223  */
75224 /*
75225  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_EPDISBLD
75226  *
75227  * No Interrupt
75228  */
75229 #define ALT_USB_DEV_DIEPINT10_EPDISBLD_E_INACT 0x0
75230 /*
75231  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_EPDISBLD
75232  *
75233  * Endpoint Disabled Interrupt
75234  */
75235 #define ALT_USB_DEV_DIEPINT10_EPDISBLD_E_ACT 0x1
75236 
75237 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_EPDISBLD register field. */
75238 #define ALT_USB_DEV_DIEPINT10_EPDISBLD_LSB 1
75239 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_EPDISBLD register field. */
75240 #define ALT_USB_DEV_DIEPINT10_EPDISBLD_MSB 1
75241 /* The width in bits of the ALT_USB_DEV_DIEPINT10_EPDISBLD register field. */
75242 #define ALT_USB_DEV_DIEPINT10_EPDISBLD_WIDTH 1
75243 /* The mask used to set the ALT_USB_DEV_DIEPINT10_EPDISBLD register field value. */
75244 #define ALT_USB_DEV_DIEPINT10_EPDISBLD_SET_MSK 0x00000002
75245 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_EPDISBLD register field value. */
75246 #define ALT_USB_DEV_DIEPINT10_EPDISBLD_CLR_MSK 0xfffffffd
75247 /* The reset value of the ALT_USB_DEV_DIEPINT10_EPDISBLD register field. */
75248 #define ALT_USB_DEV_DIEPINT10_EPDISBLD_RESET 0x0
75249 /* Extracts the ALT_USB_DEV_DIEPINT10_EPDISBLD field value from a register. */
75250 #define ALT_USB_DEV_DIEPINT10_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
75251 /* Produces a ALT_USB_DEV_DIEPINT10_EPDISBLD register field value suitable for setting the register. */
75252 #define ALT_USB_DEV_DIEPINT10_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
75253 
75254 /*
75255  * Field : AHB Error - ahberr
75256  *
75257  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
75258  * there is an AHB error during an AHB read/write. The application can read the
75259  * corresponding endpoint DMA address register to get the error address.
75260  *
75261  * Field Enumeration Values:
75262  *
75263  * Enum | Value | Description
75264  * :-------------------------------------|:------|:--------------------
75265  * ALT_USB_DEV_DIEPINT10_AHBERR_E_INACT | 0x0 | No Interrupt
75266  * ALT_USB_DEV_DIEPINT10_AHBERR_E_ACT | 0x1 | AHB Error interrupt
75267  *
75268  * Field Access Macros:
75269  *
75270  */
75271 /*
75272  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_AHBERR
75273  *
75274  * No Interrupt
75275  */
75276 #define ALT_USB_DEV_DIEPINT10_AHBERR_E_INACT 0x0
75277 /*
75278  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_AHBERR
75279  *
75280  * AHB Error interrupt
75281  */
75282 #define ALT_USB_DEV_DIEPINT10_AHBERR_E_ACT 0x1
75283 
75284 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_AHBERR register field. */
75285 #define ALT_USB_DEV_DIEPINT10_AHBERR_LSB 2
75286 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_AHBERR register field. */
75287 #define ALT_USB_DEV_DIEPINT10_AHBERR_MSB 2
75288 /* The width in bits of the ALT_USB_DEV_DIEPINT10_AHBERR register field. */
75289 #define ALT_USB_DEV_DIEPINT10_AHBERR_WIDTH 1
75290 /* The mask used to set the ALT_USB_DEV_DIEPINT10_AHBERR register field value. */
75291 #define ALT_USB_DEV_DIEPINT10_AHBERR_SET_MSK 0x00000004
75292 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_AHBERR register field value. */
75293 #define ALT_USB_DEV_DIEPINT10_AHBERR_CLR_MSK 0xfffffffb
75294 /* The reset value of the ALT_USB_DEV_DIEPINT10_AHBERR register field. */
75295 #define ALT_USB_DEV_DIEPINT10_AHBERR_RESET 0x0
75296 /* Extracts the ALT_USB_DEV_DIEPINT10_AHBERR field value from a register. */
75297 #define ALT_USB_DEV_DIEPINT10_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
75298 /* Produces a ALT_USB_DEV_DIEPINT10_AHBERR register field value suitable for setting the register. */
75299 #define ALT_USB_DEV_DIEPINT10_AHBERR_SET(value) (((value) << 2) & 0x00000004)
75300 
75301 /*
75302  * Field : Timeout Condition - timeout
75303  *
75304  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
75305  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
75306  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
75307  * detected a timeout condition on the USB for the last IN token on this endpoint.
75308  *
75309  * Field Enumeration Values:
75310  *
75311  * Enum | Value | Description
75312  * :----------------------------------|:------|:------------------
75313  * ALT_USB_DEV_DIEPINT10_TMO_E_INACT | 0x0 | No interrupt
75314  * ALT_USB_DEV_DIEPINT10_TMO_E_ACT | 0x1 | Timeout interrupy
75315  *
75316  * Field Access Macros:
75317  *
75318  */
75319 /*
75320  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_TMO
75321  *
75322  * No interrupt
75323  */
75324 #define ALT_USB_DEV_DIEPINT10_TMO_E_INACT 0x0
75325 /*
75326  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_TMO
75327  *
75328  * Timeout interrupy
75329  */
75330 #define ALT_USB_DEV_DIEPINT10_TMO_E_ACT 0x1
75331 
75332 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_TMO register field. */
75333 #define ALT_USB_DEV_DIEPINT10_TMO_LSB 3
75334 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_TMO register field. */
75335 #define ALT_USB_DEV_DIEPINT10_TMO_MSB 3
75336 /* The width in bits of the ALT_USB_DEV_DIEPINT10_TMO register field. */
75337 #define ALT_USB_DEV_DIEPINT10_TMO_WIDTH 1
75338 /* The mask used to set the ALT_USB_DEV_DIEPINT10_TMO register field value. */
75339 #define ALT_USB_DEV_DIEPINT10_TMO_SET_MSK 0x00000008
75340 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_TMO register field value. */
75341 #define ALT_USB_DEV_DIEPINT10_TMO_CLR_MSK 0xfffffff7
75342 /* The reset value of the ALT_USB_DEV_DIEPINT10_TMO register field. */
75343 #define ALT_USB_DEV_DIEPINT10_TMO_RESET 0x0
75344 /* Extracts the ALT_USB_DEV_DIEPINT10_TMO field value from a register. */
75345 #define ALT_USB_DEV_DIEPINT10_TMO_GET(value) (((value) & 0x00000008) >> 3)
75346 /* Produces a ALT_USB_DEV_DIEPINT10_TMO register field value suitable for setting the register. */
75347 #define ALT_USB_DEV_DIEPINT10_TMO_SET(value) (((value) << 3) & 0x00000008)
75348 
75349 /*
75350  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
75351  *
75352  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
75353  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
75354  * interrupt is asserted on the endpoint for which the IN token was received.
75355  *
75356  * Field Enumeration Values:
75357  *
75358  * Enum | Value | Description
75359  * :------------------------------------------|:------|:----------------------------
75360  * ALT_USB_DEV_DIEPINT10_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
75361  * ALT_USB_DEV_DIEPINT10_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
75362  *
75363  * Field Access Macros:
75364  *
75365  */
75366 /*
75367  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_INTKNTXFEMP
75368  *
75369  * No interrupt
75370  */
75371 #define ALT_USB_DEV_DIEPINT10_INTKNTXFEMP_E_INACT 0x0
75372 /*
75373  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_INTKNTXFEMP
75374  *
75375  * IN Token Received Interrupt
75376  */
75377 #define ALT_USB_DEV_DIEPINT10_INTKNTXFEMP_E_ACT 0x1
75378 
75379 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_INTKNTXFEMP register field. */
75380 #define ALT_USB_DEV_DIEPINT10_INTKNTXFEMP_LSB 4
75381 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_INTKNTXFEMP register field. */
75382 #define ALT_USB_DEV_DIEPINT10_INTKNTXFEMP_MSB 4
75383 /* The width in bits of the ALT_USB_DEV_DIEPINT10_INTKNTXFEMP register field. */
75384 #define ALT_USB_DEV_DIEPINT10_INTKNTXFEMP_WIDTH 1
75385 /* The mask used to set the ALT_USB_DEV_DIEPINT10_INTKNTXFEMP register field value. */
75386 #define ALT_USB_DEV_DIEPINT10_INTKNTXFEMP_SET_MSK 0x00000010
75387 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_INTKNTXFEMP register field value. */
75388 #define ALT_USB_DEV_DIEPINT10_INTKNTXFEMP_CLR_MSK 0xffffffef
75389 /* The reset value of the ALT_USB_DEV_DIEPINT10_INTKNTXFEMP register field. */
75390 #define ALT_USB_DEV_DIEPINT10_INTKNTXFEMP_RESET 0x0
75391 /* Extracts the ALT_USB_DEV_DIEPINT10_INTKNTXFEMP field value from a register. */
75392 #define ALT_USB_DEV_DIEPINT10_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
75393 /* Produces a ALT_USB_DEV_DIEPINT10_INTKNTXFEMP register field value suitable for setting the register. */
75394 #define ALT_USB_DEV_DIEPINT10_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
75395 
75396 /*
75397  * Field : IN Token Received with EP Mismatch - intknepmis
75398  *
75399  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
75400  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
75401  * IN token was received. This interrupt is asserted on the endpoint for which the
75402  * IN token was received.
75403  *
75404  * Field Enumeration Values:
75405  *
75406  * Enum | Value | Description
75407  * :-----------------------------------------|:------|:---------------------------------------------
75408  * ALT_USB_DEV_DIEPINT10_INTKNEPMIS_E_INACT | 0x0 | No interrupt
75409  * ALT_USB_DEV_DIEPINT10_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
75410  *
75411  * Field Access Macros:
75412  *
75413  */
75414 /*
75415  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_INTKNEPMIS
75416  *
75417  * No interrupt
75418  */
75419 #define ALT_USB_DEV_DIEPINT10_INTKNEPMIS_E_INACT 0x0
75420 /*
75421  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_INTKNEPMIS
75422  *
75423  * IN Token Received with EP Mismatch interrupt
75424  */
75425 #define ALT_USB_DEV_DIEPINT10_INTKNEPMIS_E_ACT 0x1
75426 
75427 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_INTKNEPMIS register field. */
75428 #define ALT_USB_DEV_DIEPINT10_INTKNEPMIS_LSB 5
75429 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_INTKNEPMIS register field. */
75430 #define ALT_USB_DEV_DIEPINT10_INTKNEPMIS_MSB 5
75431 /* The width in bits of the ALT_USB_DEV_DIEPINT10_INTKNEPMIS register field. */
75432 #define ALT_USB_DEV_DIEPINT10_INTKNEPMIS_WIDTH 1
75433 /* The mask used to set the ALT_USB_DEV_DIEPINT10_INTKNEPMIS register field value. */
75434 #define ALT_USB_DEV_DIEPINT10_INTKNEPMIS_SET_MSK 0x00000020
75435 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_INTKNEPMIS register field value. */
75436 #define ALT_USB_DEV_DIEPINT10_INTKNEPMIS_CLR_MSK 0xffffffdf
75437 /* The reset value of the ALT_USB_DEV_DIEPINT10_INTKNEPMIS register field. */
75438 #define ALT_USB_DEV_DIEPINT10_INTKNEPMIS_RESET 0x0
75439 /* Extracts the ALT_USB_DEV_DIEPINT10_INTKNEPMIS field value from a register. */
75440 #define ALT_USB_DEV_DIEPINT10_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
75441 /* Produces a ALT_USB_DEV_DIEPINT10_INTKNEPMIS register field value suitable for setting the register. */
75442 #define ALT_USB_DEV_DIEPINT10_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
75443 
75444 /*
75445  * Field : IN Endpoint NAK Effective - inepnakeff
75446  *
75447  * Applies to periodic IN endpoints only. This bit can be cleared when the
75448  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
75449  * interrupt indicates that the core has sampled the NAK bit Set (either by the
75450  * application or by the core). The interrupt indicates that the IN endpoint NAK
75451  * bit Set by the application has taken effect in the core.This interrupt does not
75452  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
75453  * over a NAK bit.
75454  *
75455  * Field Enumeration Values:
75456  *
75457  * Enum | Value | Description
75458  * :-----------------------------------------|:------|:------------------------------------
75459  * ALT_USB_DEV_DIEPINT10_INEPNAKEFF_E_INACT | 0x0 | No interrupt
75460  * ALT_USB_DEV_DIEPINT10_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
75461  *
75462  * Field Access Macros:
75463  *
75464  */
75465 /*
75466  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_INEPNAKEFF
75467  *
75468  * No interrupt
75469  */
75470 #define ALT_USB_DEV_DIEPINT10_INEPNAKEFF_E_INACT 0x0
75471 /*
75472  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_INEPNAKEFF
75473  *
75474  * IN Endpoint NAK Effective interrupt
75475  */
75476 #define ALT_USB_DEV_DIEPINT10_INEPNAKEFF_E_ACT 0x1
75477 
75478 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_INEPNAKEFF register field. */
75479 #define ALT_USB_DEV_DIEPINT10_INEPNAKEFF_LSB 6
75480 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_INEPNAKEFF register field. */
75481 #define ALT_USB_DEV_DIEPINT10_INEPNAKEFF_MSB 6
75482 /* The width in bits of the ALT_USB_DEV_DIEPINT10_INEPNAKEFF register field. */
75483 #define ALT_USB_DEV_DIEPINT10_INEPNAKEFF_WIDTH 1
75484 /* The mask used to set the ALT_USB_DEV_DIEPINT10_INEPNAKEFF register field value. */
75485 #define ALT_USB_DEV_DIEPINT10_INEPNAKEFF_SET_MSK 0x00000040
75486 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_INEPNAKEFF register field value. */
75487 #define ALT_USB_DEV_DIEPINT10_INEPNAKEFF_CLR_MSK 0xffffffbf
75488 /* The reset value of the ALT_USB_DEV_DIEPINT10_INEPNAKEFF register field. */
75489 #define ALT_USB_DEV_DIEPINT10_INEPNAKEFF_RESET 0x0
75490 /* Extracts the ALT_USB_DEV_DIEPINT10_INEPNAKEFF field value from a register. */
75491 #define ALT_USB_DEV_DIEPINT10_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
75492 /* Produces a ALT_USB_DEV_DIEPINT10_INEPNAKEFF register field value suitable for setting the register. */
75493 #define ALT_USB_DEV_DIEPINT10_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
75494 
75495 /*
75496  * Field : Transmit FIFO Empty - txfemp
75497  *
75498  * This bit is valid only for IN Endpoints This interrupt is asserted when the
75499  * TxFIFO for this endpoint is either half or completely empty. The half or
75500  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
75501  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
75502  *
75503  * Field Enumeration Values:
75504  *
75505  * Enum | Value | Description
75506  * :-------------------------------------|:------|:------------------------------
75507  * ALT_USB_DEV_DIEPINT10_TXFEMP_E_INACT | 0x0 | No interrupt
75508  * ALT_USB_DEV_DIEPINT10_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
75509  *
75510  * Field Access Macros:
75511  *
75512  */
75513 /*
75514  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_TXFEMP
75515  *
75516  * No interrupt
75517  */
75518 #define ALT_USB_DEV_DIEPINT10_TXFEMP_E_INACT 0x0
75519 /*
75520  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_TXFEMP
75521  *
75522  * Transmit FIFO Empty interrupt
75523  */
75524 #define ALT_USB_DEV_DIEPINT10_TXFEMP_E_ACT 0x1
75525 
75526 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_TXFEMP register field. */
75527 #define ALT_USB_DEV_DIEPINT10_TXFEMP_LSB 7
75528 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_TXFEMP register field. */
75529 #define ALT_USB_DEV_DIEPINT10_TXFEMP_MSB 7
75530 /* The width in bits of the ALT_USB_DEV_DIEPINT10_TXFEMP register field. */
75531 #define ALT_USB_DEV_DIEPINT10_TXFEMP_WIDTH 1
75532 /* The mask used to set the ALT_USB_DEV_DIEPINT10_TXFEMP register field value. */
75533 #define ALT_USB_DEV_DIEPINT10_TXFEMP_SET_MSK 0x00000080
75534 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_TXFEMP register field value. */
75535 #define ALT_USB_DEV_DIEPINT10_TXFEMP_CLR_MSK 0xffffff7f
75536 /* The reset value of the ALT_USB_DEV_DIEPINT10_TXFEMP register field. */
75537 #define ALT_USB_DEV_DIEPINT10_TXFEMP_RESET 0x1
75538 /* Extracts the ALT_USB_DEV_DIEPINT10_TXFEMP field value from a register. */
75539 #define ALT_USB_DEV_DIEPINT10_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
75540 /* Produces a ALT_USB_DEV_DIEPINT10_TXFEMP register field value suitable for setting the register. */
75541 #define ALT_USB_DEV_DIEPINT10_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
75542 
75543 /*
75544  * Field : Fifo Underrun - txfifoundrn
75545  *
75546  * Applies to IN endpoints Only. The core generates this interrupt when it detects
75547  * a transmit FIFO underrun condition for this endpoint.
75548  *
75549  * Field Enumeration Values:
75550  *
75551  * Enum | Value | Description
75552  * :------------------------------------------|:------|:------------------------
75553  * ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
75554  * ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
75555  *
75556  * Field Access Macros:
75557  *
75558  */
75559 /*
75560  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN
75561  *
75562  * No interrupt
75563  */
75564 #define ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN_E_INACT 0x0
75565 /*
75566  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN
75567  *
75568  * Fifo Underrun interrupt
75569  */
75570 #define ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN_E_ACT 0x1
75571 
75572 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN register field. */
75573 #define ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN_LSB 8
75574 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN register field. */
75575 #define ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN_MSB 8
75576 /* The width in bits of the ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN register field. */
75577 #define ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN_WIDTH 1
75578 /* The mask used to set the ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN register field value. */
75579 #define ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN_SET_MSK 0x00000100
75580 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN register field value. */
75581 #define ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN_CLR_MSK 0xfffffeff
75582 /* The reset value of the ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN register field. */
75583 #define ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN_RESET 0x0
75584 /* Extracts the ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN field value from a register. */
75585 #define ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
75586 /* Produces a ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN register field value suitable for setting the register. */
75587 #define ALT_USB_DEV_DIEPINT10_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
75588 
75589 /*
75590  * Field : BNA Interrupt - bnaintr
75591  *
75592  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
75593  * generates this interrupt when the descriptor accessed is not ready for the Core
75594  * to process, such as Host busy or DMA done
75595  *
75596  * Field Enumeration Values:
75597  *
75598  * Enum | Value | Description
75599  * :--------------------------------------|:------|:--------------
75600  * ALT_USB_DEV_DIEPINT10_BNAINTR_E_INACT | 0x0 | No interrupt
75601  * ALT_USB_DEV_DIEPINT10_BNAINTR_E_ACT | 0x1 | BNA interrupt
75602  *
75603  * Field Access Macros:
75604  *
75605  */
75606 /*
75607  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_BNAINTR
75608  *
75609  * No interrupt
75610  */
75611 #define ALT_USB_DEV_DIEPINT10_BNAINTR_E_INACT 0x0
75612 /*
75613  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_BNAINTR
75614  *
75615  * BNA interrupt
75616  */
75617 #define ALT_USB_DEV_DIEPINT10_BNAINTR_E_ACT 0x1
75618 
75619 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_BNAINTR register field. */
75620 #define ALT_USB_DEV_DIEPINT10_BNAINTR_LSB 9
75621 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_BNAINTR register field. */
75622 #define ALT_USB_DEV_DIEPINT10_BNAINTR_MSB 9
75623 /* The width in bits of the ALT_USB_DEV_DIEPINT10_BNAINTR register field. */
75624 #define ALT_USB_DEV_DIEPINT10_BNAINTR_WIDTH 1
75625 /* The mask used to set the ALT_USB_DEV_DIEPINT10_BNAINTR register field value. */
75626 #define ALT_USB_DEV_DIEPINT10_BNAINTR_SET_MSK 0x00000200
75627 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_BNAINTR register field value. */
75628 #define ALT_USB_DEV_DIEPINT10_BNAINTR_CLR_MSK 0xfffffdff
75629 /* The reset value of the ALT_USB_DEV_DIEPINT10_BNAINTR register field. */
75630 #define ALT_USB_DEV_DIEPINT10_BNAINTR_RESET 0x0
75631 /* Extracts the ALT_USB_DEV_DIEPINT10_BNAINTR field value from a register. */
75632 #define ALT_USB_DEV_DIEPINT10_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
75633 /* Produces a ALT_USB_DEV_DIEPINT10_BNAINTR register field value suitable for setting the register. */
75634 #define ALT_USB_DEV_DIEPINT10_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
75635 
75636 /*
75637  * Field : Packet Drop Status - pktdrpsts
75638  *
75639  * This bit indicates to the application that an ISOC OUT packet has been dropped.
75640  * This bit does not have an associated mask bit and does not generate an
75641  * interrupt.
75642  *
75643  * Field Enumeration Values:
75644  *
75645  * Enum | Value | Description
75646  * :----------------------------------------|:------|:-----------------------------
75647  * ALT_USB_DEV_DIEPINT10_PKTDRPSTS_E_INACT | 0x0 | No interrupt
75648  * ALT_USB_DEV_DIEPINT10_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
75649  *
75650  * Field Access Macros:
75651  *
75652  */
75653 /*
75654  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_PKTDRPSTS
75655  *
75656  * No interrupt
75657  */
75658 #define ALT_USB_DEV_DIEPINT10_PKTDRPSTS_E_INACT 0x0
75659 /*
75660  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_PKTDRPSTS
75661  *
75662  * Packet Drop Status interrupt
75663  */
75664 #define ALT_USB_DEV_DIEPINT10_PKTDRPSTS_E_ACT 0x1
75665 
75666 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_PKTDRPSTS register field. */
75667 #define ALT_USB_DEV_DIEPINT10_PKTDRPSTS_LSB 11
75668 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_PKTDRPSTS register field. */
75669 #define ALT_USB_DEV_DIEPINT10_PKTDRPSTS_MSB 11
75670 /* The width in bits of the ALT_USB_DEV_DIEPINT10_PKTDRPSTS register field. */
75671 #define ALT_USB_DEV_DIEPINT10_PKTDRPSTS_WIDTH 1
75672 /* The mask used to set the ALT_USB_DEV_DIEPINT10_PKTDRPSTS register field value. */
75673 #define ALT_USB_DEV_DIEPINT10_PKTDRPSTS_SET_MSK 0x00000800
75674 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_PKTDRPSTS register field value. */
75675 #define ALT_USB_DEV_DIEPINT10_PKTDRPSTS_CLR_MSK 0xfffff7ff
75676 /* The reset value of the ALT_USB_DEV_DIEPINT10_PKTDRPSTS register field. */
75677 #define ALT_USB_DEV_DIEPINT10_PKTDRPSTS_RESET 0x0
75678 /* Extracts the ALT_USB_DEV_DIEPINT10_PKTDRPSTS field value from a register. */
75679 #define ALT_USB_DEV_DIEPINT10_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
75680 /* Produces a ALT_USB_DEV_DIEPINT10_PKTDRPSTS register field value suitable for setting the register. */
75681 #define ALT_USB_DEV_DIEPINT10_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
75682 
75683 /*
75684  * Field : BbleErr Interrupt - bbleerr
75685  *
75686  * The core generates this interrupt when babble is received for the endpoint.
75687  *
75688  * Field Enumeration Values:
75689  *
75690  * Enum | Value | Description
75691  * :--------------------------------------|:------|:------------------
75692  * ALT_USB_DEV_DIEPINT10_BBLEERR_E_INACT | 0x0 | No interrupt
75693  * ALT_USB_DEV_DIEPINT10_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
75694  *
75695  * Field Access Macros:
75696  *
75697  */
75698 /*
75699  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_BBLEERR
75700  *
75701  * No interrupt
75702  */
75703 #define ALT_USB_DEV_DIEPINT10_BBLEERR_E_INACT 0x0
75704 /*
75705  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_BBLEERR
75706  *
75707  * BbleErr interrupt
75708  */
75709 #define ALT_USB_DEV_DIEPINT10_BBLEERR_E_ACT 0x1
75710 
75711 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_BBLEERR register field. */
75712 #define ALT_USB_DEV_DIEPINT10_BBLEERR_LSB 12
75713 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_BBLEERR register field. */
75714 #define ALT_USB_DEV_DIEPINT10_BBLEERR_MSB 12
75715 /* The width in bits of the ALT_USB_DEV_DIEPINT10_BBLEERR register field. */
75716 #define ALT_USB_DEV_DIEPINT10_BBLEERR_WIDTH 1
75717 /* The mask used to set the ALT_USB_DEV_DIEPINT10_BBLEERR register field value. */
75718 #define ALT_USB_DEV_DIEPINT10_BBLEERR_SET_MSK 0x00001000
75719 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_BBLEERR register field value. */
75720 #define ALT_USB_DEV_DIEPINT10_BBLEERR_CLR_MSK 0xffffefff
75721 /* The reset value of the ALT_USB_DEV_DIEPINT10_BBLEERR register field. */
75722 #define ALT_USB_DEV_DIEPINT10_BBLEERR_RESET 0x0
75723 /* Extracts the ALT_USB_DEV_DIEPINT10_BBLEERR field value from a register. */
75724 #define ALT_USB_DEV_DIEPINT10_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
75725 /* Produces a ALT_USB_DEV_DIEPINT10_BBLEERR register field value suitable for setting the register. */
75726 #define ALT_USB_DEV_DIEPINT10_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
75727 
75728 /*
75729  * Field : NAK Interrupt - nakintrpt
75730  *
75731  * The core generates this interrupt when a NAK is transmitted or received by the
75732  * device. In case of isochronous IN endpoints the interrupt gets generated when a
75733  * zero length packet is transmitted due to un-availability of data in the TXFifo.
75734  *
75735  * Field Enumeration Values:
75736  *
75737  * Enum | Value | Description
75738  * :----------------------------------------|:------|:--------------
75739  * ALT_USB_DEV_DIEPINT10_NAKINTRPT_E_INACT | 0x0 | No interrupt
75740  * ALT_USB_DEV_DIEPINT10_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
75741  *
75742  * Field Access Macros:
75743  *
75744  */
75745 /*
75746  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_NAKINTRPT
75747  *
75748  * No interrupt
75749  */
75750 #define ALT_USB_DEV_DIEPINT10_NAKINTRPT_E_INACT 0x0
75751 /*
75752  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_NAKINTRPT
75753  *
75754  * NAK Interrupt
75755  */
75756 #define ALT_USB_DEV_DIEPINT10_NAKINTRPT_E_ACT 0x1
75757 
75758 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_NAKINTRPT register field. */
75759 #define ALT_USB_DEV_DIEPINT10_NAKINTRPT_LSB 13
75760 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_NAKINTRPT register field. */
75761 #define ALT_USB_DEV_DIEPINT10_NAKINTRPT_MSB 13
75762 /* The width in bits of the ALT_USB_DEV_DIEPINT10_NAKINTRPT register field. */
75763 #define ALT_USB_DEV_DIEPINT10_NAKINTRPT_WIDTH 1
75764 /* The mask used to set the ALT_USB_DEV_DIEPINT10_NAKINTRPT register field value. */
75765 #define ALT_USB_DEV_DIEPINT10_NAKINTRPT_SET_MSK 0x00002000
75766 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_NAKINTRPT register field value. */
75767 #define ALT_USB_DEV_DIEPINT10_NAKINTRPT_CLR_MSK 0xffffdfff
75768 /* The reset value of the ALT_USB_DEV_DIEPINT10_NAKINTRPT register field. */
75769 #define ALT_USB_DEV_DIEPINT10_NAKINTRPT_RESET 0x0
75770 /* Extracts the ALT_USB_DEV_DIEPINT10_NAKINTRPT field value from a register. */
75771 #define ALT_USB_DEV_DIEPINT10_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
75772 /* Produces a ALT_USB_DEV_DIEPINT10_NAKINTRPT register field value suitable for setting the register. */
75773 #define ALT_USB_DEV_DIEPINT10_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
75774 
75775 /*
75776  * Field : NYET Interrupt - nyetintrpt
75777  *
75778  * The core generates this interrupt when a NYET response is transmitted for a non
75779  * isochronous OUT endpoint.
75780  *
75781  * Field Enumeration Values:
75782  *
75783  * Enum | Value | Description
75784  * :-----------------------------------------|:------|:---------------
75785  * ALT_USB_DEV_DIEPINT10_NYETINTRPT_E_INACT | 0x0 | No interrupt
75786  * ALT_USB_DEV_DIEPINT10_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
75787  *
75788  * Field Access Macros:
75789  *
75790  */
75791 /*
75792  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_NYETINTRPT
75793  *
75794  * No interrupt
75795  */
75796 #define ALT_USB_DEV_DIEPINT10_NYETINTRPT_E_INACT 0x0
75797 /*
75798  * Enumerated value for register field ALT_USB_DEV_DIEPINT10_NYETINTRPT
75799  *
75800  * NYET Interrupt
75801  */
75802 #define ALT_USB_DEV_DIEPINT10_NYETINTRPT_E_ACT 0x1
75803 
75804 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT10_NYETINTRPT register field. */
75805 #define ALT_USB_DEV_DIEPINT10_NYETINTRPT_LSB 14
75806 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT10_NYETINTRPT register field. */
75807 #define ALT_USB_DEV_DIEPINT10_NYETINTRPT_MSB 14
75808 /* The width in bits of the ALT_USB_DEV_DIEPINT10_NYETINTRPT register field. */
75809 #define ALT_USB_DEV_DIEPINT10_NYETINTRPT_WIDTH 1
75810 /* The mask used to set the ALT_USB_DEV_DIEPINT10_NYETINTRPT register field value. */
75811 #define ALT_USB_DEV_DIEPINT10_NYETINTRPT_SET_MSK 0x00004000
75812 /* The mask used to clear the ALT_USB_DEV_DIEPINT10_NYETINTRPT register field value. */
75813 #define ALT_USB_DEV_DIEPINT10_NYETINTRPT_CLR_MSK 0xffffbfff
75814 /* The reset value of the ALT_USB_DEV_DIEPINT10_NYETINTRPT register field. */
75815 #define ALT_USB_DEV_DIEPINT10_NYETINTRPT_RESET 0x0
75816 /* Extracts the ALT_USB_DEV_DIEPINT10_NYETINTRPT field value from a register. */
75817 #define ALT_USB_DEV_DIEPINT10_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
75818 /* Produces a ALT_USB_DEV_DIEPINT10_NYETINTRPT register field value suitable for setting the register. */
75819 #define ALT_USB_DEV_DIEPINT10_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
75820 
75821 #ifndef __ASSEMBLY__
75822 /*
75823  * WARNING: The C register and register group struct declarations are provided for
75824  * convenience and illustrative purposes. They should, however, be used with
75825  * caution as the C language standard provides no guarantees about the alignment or
75826  * atomicity of device memory accesses. The recommended practice for writing
75827  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
75828  * alt_write_word() functions.
75829  *
75830  * The struct declaration for register ALT_USB_DEV_DIEPINT10.
75831  */
75832 struct ALT_USB_DEV_DIEPINT10_s
75833 {
75834  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
75835  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
75836  const uint32_t ahberr : 1; /* AHB Error */
75837  const uint32_t timeout : 1; /* Timeout Condition */
75838  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
75839  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
75840  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
75841  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
75842  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
75843  const uint32_t bnaintr : 1; /* BNA Interrupt */
75844  uint32_t : 1; /* *UNDEFINED* */
75845  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
75846  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
75847  const uint32_t nakintrpt : 1; /* NAK Interrupt */
75848  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
75849  uint32_t : 17; /* *UNDEFINED* */
75850 };
75851 
75852 /* The typedef declaration for register ALT_USB_DEV_DIEPINT10. */
75853 typedef volatile struct ALT_USB_DEV_DIEPINT10_s ALT_USB_DEV_DIEPINT10_t;
75854 #endif /* __ASSEMBLY__ */
75855 
75856 /* The byte offset of the ALT_USB_DEV_DIEPINT10 register from the beginning of the component. */
75857 #define ALT_USB_DEV_DIEPINT10_OFST 0x248
75858 /* The address of the ALT_USB_DEV_DIEPINT10 register. */
75859 #define ALT_USB_DEV_DIEPINT10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT10_OFST))
75860 
75861 /*
75862  * Register : Device IN Endpoint 10 Transfer Size Register - dieptsiz10
75863  *
75864  * The application must modify this register before enabling the endpoint. Once the
75865  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
75866  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
75867  * application can only read this register once the core has cleared the Endpoint
75868  * Enable bit.
75869  *
75870  * Register Layout
75871  *
75872  * Bits | Access | Reset | Description
75873  * :--------|:-------|:------|:----------------------------
75874  * [18:0] | RW | 0x0 | Transfer Size
75875  * [28:19] | RW | 0x0 | Packet Count
75876  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
75877  * [31] | ??? | 0x0 | *UNDEFINED*
75878  *
75879  */
75880 /*
75881  * Field : Transfer Size - xfersize
75882  *
75883  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
75884  * application only after it has exhausted the transfer size amount of data. The
75885  * transfer size can be Set to the maximum packet size of the endpoint, to be
75886  * interrupted at the end of each packet. The core decrements this field every time
75887  * a packet from the external memory is written to the TxFIFO.
75888  *
75889  * Field Access Macros:
75890  *
75891  */
75892 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ10_XFERSIZE register field. */
75893 #define ALT_USB_DEV_DIEPTSIZ10_XFERSIZE_LSB 0
75894 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ10_XFERSIZE register field. */
75895 #define ALT_USB_DEV_DIEPTSIZ10_XFERSIZE_MSB 18
75896 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ10_XFERSIZE register field. */
75897 #define ALT_USB_DEV_DIEPTSIZ10_XFERSIZE_WIDTH 19
75898 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ10_XFERSIZE register field value. */
75899 #define ALT_USB_DEV_DIEPTSIZ10_XFERSIZE_SET_MSK 0x0007ffff
75900 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ10_XFERSIZE register field value. */
75901 #define ALT_USB_DEV_DIEPTSIZ10_XFERSIZE_CLR_MSK 0xfff80000
75902 /* The reset value of the ALT_USB_DEV_DIEPTSIZ10_XFERSIZE register field. */
75903 #define ALT_USB_DEV_DIEPTSIZ10_XFERSIZE_RESET 0x0
75904 /* Extracts the ALT_USB_DEV_DIEPTSIZ10_XFERSIZE field value from a register. */
75905 #define ALT_USB_DEV_DIEPTSIZ10_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
75906 /* Produces a ALT_USB_DEV_DIEPTSIZ10_XFERSIZE register field value suitable for setting the register. */
75907 #define ALT_USB_DEV_DIEPTSIZ10_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
75908 
75909 /*
75910  * Field : Packet Count - PktCnt
75911  *
75912  * Indicates the total number of USB packets that constitute the Transfer Size
75913  * amount of data for endpoint 0.This field is decremented every time a packet
75914  * (maximum size or short packet) is read from the TxFIFO.
75915  *
75916  * Field Access Macros:
75917  *
75918  */
75919 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ10_PKTCNT register field. */
75920 #define ALT_USB_DEV_DIEPTSIZ10_PKTCNT_LSB 19
75921 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ10_PKTCNT register field. */
75922 #define ALT_USB_DEV_DIEPTSIZ10_PKTCNT_MSB 28
75923 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ10_PKTCNT register field. */
75924 #define ALT_USB_DEV_DIEPTSIZ10_PKTCNT_WIDTH 10
75925 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ10_PKTCNT register field value. */
75926 #define ALT_USB_DEV_DIEPTSIZ10_PKTCNT_SET_MSK 0x1ff80000
75927 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ10_PKTCNT register field value. */
75928 #define ALT_USB_DEV_DIEPTSIZ10_PKTCNT_CLR_MSK 0xe007ffff
75929 /* The reset value of the ALT_USB_DEV_DIEPTSIZ10_PKTCNT register field. */
75930 #define ALT_USB_DEV_DIEPTSIZ10_PKTCNT_RESET 0x0
75931 /* Extracts the ALT_USB_DEV_DIEPTSIZ10_PKTCNT field value from a register. */
75932 #define ALT_USB_DEV_DIEPTSIZ10_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
75933 /* Produces a ALT_USB_DEV_DIEPTSIZ10_PKTCNT register field value suitable for setting the register. */
75934 #define ALT_USB_DEV_DIEPTSIZ10_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
75935 
75936 /*
75937  * Field : Applies to IN endpoints onl - mc
75938  *
75939  * for periodic IN endpoints, this field indicates the number of packets that must
75940  * be transmitted per microframe on the USB. The core uses this field to calculate
75941  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
75942  * field is valid only in Internal DMA mode. It specifies the number of packets the
75943  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
75944  * by the Next Endpoint field of the Device Endpoint-n Control register
75945  * (DIEPCTLn.NextEp)
75946  *
75947  * Field Enumeration Values:
75948  *
75949  * Enum | Value | Description
75950  * :-------------------------------------|:------|:------------
75951  * ALT_USB_DEV_DIEPTSIZ10_MC_E_PKTONE | 0x1 | 1 packet
75952  * ALT_USB_DEV_DIEPTSIZ10_MC_E_PKTTWO | 0x2 | 2 packets
75953  * ALT_USB_DEV_DIEPTSIZ10_MC_E_PKTTHREE | 0x3 | 3 packets
75954  *
75955  * Field Access Macros:
75956  *
75957  */
75958 /*
75959  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ10_MC
75960  *
75961  * 1 packet
75962  */
75963 #define ALT_USB_DEV_DIEPTSIZ10_MC_E_PKTONE 0x1
75964 /*
75965  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ10_MC
75966  *
75967  * 2 packets
75968  */
75969 #define ALT_USB_DEV_DIEPTSIZ10_MC_E_PKTTWO 0x2
75970 /*
75971  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ10_MC
75972  *
75973  * 3 packets
75974  */
75975 #define ALT_USB_DEV_DIEPTSIZ10_MC_E_PKTTHREE 0x3
75976 
75977 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ10_MC register field. */
75978 #define ALT_USB_DEV_DIEPTSIZ10_MC_LSB 29
75979 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ10_MC register field. */
75980 #define ALT_USB_DEV_DIEPTSIZ10_MC_MSB 30
75981 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ10_MC register field. */
75982 #define ALT_USB_DEV_DIEPTSIZ10_MC_WIDTH 2
75983 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ10_MC register field value. */
75984 #define ALT_USB_DEV_DIEPTSIZ10_MC_SET_MSK 0x60000000
75985 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ10_MC register field value. */
75986 #define ALT_USB_DEV_DIEPTSIZ10_MC_CLR_MSK 0x9fffffff
75987 /* The reset value of the ALT_USB_DEV_DIEPTSIZ10_MC register field. */
75988 #define ALT_USB_DEV_DIEPTSIZ10_MC_RESET 0x0
75989 /* Extracts the ALT_USB_DEV_DIEPTSIZ10_MC field value from a register. */
75990 #define ALT_USB_DEV_DIEPTSIZ10_MC_GET(value) (((value) & 0x60000000) >> 29)
75991 /* Produces a ALT_USB_DEV_DIEPTSIZ10_MC register field value suitable for setting the register. */
75992 #define ALT_USB_DEV_DIEPTSIZ10_MC_SET(value) (((value) << 29) & 0x60000000)
75993 
75994 #ifndef __ASSEMBLY__
75995 /*
75996  * WARNING: The C register and register group struct declarations are provided for
75997  * convenience and illustrative purposes. They should, however, be used with
75998  * caution as the C language standard provides no guarantees about the alignment or
75999  * atomicity of device memory accesses. The recommended practice for writing
76000  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
76001  * alt_write_word() functions.
76002  *
76003  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ10.
76004  */
76005 struct ALT_USB_DEV_DIEPTSIZ10_s
76006 {
76007  uint32_t xfersize : 19; /* Transfer Size */
76008  uint32_t PktCnt : 10; /* Packet Count */
76009  uint32_t mc : 2; /* Applies to IN endpoints onl */
76010  uint32_t : 1; /* *UNDEFINED* */
76011 };
76012 
76013 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ10. */
76014 typedef volatile struct ALT_USB_DEV_DIEPTSIZ10_s ALT_USB_DEV_DIEPTSIZ10_t;
76015 #endif /* __ASSEMBLY__ */
76016 
76017 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ10 register from the beginning of the component. */
76018 #define ALT_USB_DEV_DIEPTSIZ10_OFST 0x250
76019 /* The address of the ALT_USB_DEV_DIEPTSIZ10 register. */
76020 #define ALT_USB_DEV_DIEPTSIZ10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ10_OFST))
76021 
76022 /*
76023  * Register : Device IN Endpoint 10 DMA Address Register - diepdma10
76024  *
76025  * DMA Addressing.
76026  *
76027  * Register Layout
76028  *
76029  * Bits | Access | Reset | Description
76030  * :-------|:-------|:--------|:------------
76031  * [31:0] | RW | Unknown | DMA Address
76032  *
76033  */
76034 /*
76035  * Field : DMA Address - diepdma10
76036  *
76037  * Holds the start address of the external memory for storing or fetching endpoint
76038  * data. for control endpoints, this field stores control OUT data packets as well
76039  * as SETUP transaction data packets. When more than three SETUP packets are
76040  * received back-to-back, the SETUP data packet in the memory is overwritten. This
76041  * register is incremented on every AHB transaction. The application can give only
76042  * a DWORD-aligned address.
76043  *
76044  * When Scatter/Gather DMA mode is not enabled, the application programs the start
76045  * address value in this field.
76046  *
76047  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
76048  * for the descriptor list.
76049  *
76050  * Field Access Macros:
76051  *
76052  */
76053 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA10_DIEPDMA10 register field. */
76054 #define ALT_USB_DEV_DIEPDMA10_DIEPDMA10_LSB 0
76055 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA10_DIEPDMA10 register field. */
76056 #define ALT_USB_DEV_DIEPDMA10_DIEPDMA10_MSB 31
76057 /* The width in bits of the ALT_USB_DEV_DIEPDMA10_DIEPDMA10 register field. */
76058 #define ALT_USB_DEV_DIEPDMA10_DIEPDMA10_WIDTH 32
76059 /* The mask used to set the ALT_USB_DEV_DIEPDMA10_DIEPDMA10 register field value. */
76060 #define ALT_USB_DEV_DIEPDMA10_DIEPDMA10_SET_MSK 0xffffffff
76061 /* The mask used to clear the ALT_USB_DEV_DIEPDMA10_DIEPDMA10 register field value. */
76062 #define ALT_USB_DEV_DIEPDMA10_DIEPDMA10_CLR_MSK 0x00000000
76063 /* The reset value of the ALT_USB_DEV_DIEPDMA10_DIEPDMA10 register field is UNKNOWN. */
76064 #define ALT_USB_DEV_DIEPDMA10_DIEPDMA10_RESET 0x0
76065 /* Extracts the ALT_USB_DEV_DIEPDMA10_DIEPDMA10 field value from a register. */
76066 #define ALT_USB_DEV_DIEPDMA10_DIEPDMA10_GET(value) (((value) & 0xffffffff) >> 0)
76067 /* Produces a ALT_USB_DEV_DIEPDMA10_DIEPDMA10 register field value suitable for setting the register. */
76068 #define ALT_USB_DEV_DIEPDMA10_DIEPDMA10_SET(value) (((value) << 0) & 0xffffffff)
76069 
76070 #ifndef __ASSEMBLY__
76071 /*
76072  * WARNING: The C register and register group struct declarations are provided for
76073  * convenience and illustrative purposes. They should, however, be used with
76074  * caution as the C language standard provides no guarantees about the alignment or
76075  * atomicity of device memory accesses. The recommended practice for writing
76076  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
76077  * alt_write_word() functions.
76078  *
76079  * The struct declaration for register ALT_USB_DEV_DIEPDMA10.
76080  */
76081 struct ALT_USB_DEV_DIEPDMA10_s
76082 {
76083  uint32_t diepdma10 : 32; /* DMA Address */
76084 };
76085 
76086 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA10. */
76087 typedef volatile struct ALT_USB_DEV_DIEPDMA10_s ALT_USB_DEV_DIEPDMA10_t;
76088 #endif /* __ASSEMBLY__ */
76089 
76090 /* The byte offset of the ALT_USB_DEV_DIEPDMA10 register from the beginning of the component. */
76091 #define ALT_USB_DEV_DIEPDMA10_OFST 0x254
76092 /* The address of the ALT_USB_DEV_DIEPDMA10 register. */
76093 #define ALT_USB_DEV_DIEPDMA10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA10_OFST))
76094 
76095 /*
76096  * Register : Device IN Endpoint Transmit FIFO Status Register 10 - dtxfsts10
76097  *
76098  * This register contains the free space information for the Device IN endpoint
76099  * TxFIFO.
76100  *
76101  * Register Layout
76102  *
76103  * Bits | Access | Reset | Description
76104  * :--------|:-------|:-------|:-------------------------------
76105  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
76106  * [31:16] | ??? | 0x0 | *UNDEFINED*
76107  *
76108  */
76109 /*
76110  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
76111  *
76112  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
76113  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
76114  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
76115  * 32,768 words available Others: Reserved
76116  *
76117  * Field Access Macros:
76118  *
76119  */
76120 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL register field. */
76121 #define ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL_LSB 0
76122 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL register field. */
76123 #define ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL_MSB 15
76124 /* The width in bits of the ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL register field. */
76125 #define ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL_WIDTH 16
76126 /* The mask used to set the ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL register field value. */
76127 #define ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
76128 /* The mask used to clear the ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL register field value. */
76129 #define ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
76130 /* The reset value of the ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL register field. */
76131 #define ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL_RESET 0x2000
76132 /* Extracts the ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL field value from a register. */
76133 #define ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
76134 /* Produces a ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL register field value suitable for setting the register. */
76135 #define ALT_USB_DEV_DTXFSTS10_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
76136 
76137 #ifndef __ASSEMBLY__
76138 /*
76139  * WARNING: The C register and register group struct declarations are provided for
76140  * convenience and illustrative purposes. They should, however, be used with
76141  * caution as the C language standard provides no guarantees about the alignment or
76142  * atomicity of device memory accesses. The recommended practice for writing
76143  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
76144  * alt_write_word() functions.
76145  *
76146  * The struct declaration for register ALT_USB_DEV_DTXFSTS10.
76147  */
76148 struct ALT_USB_DEV_DTXFSTS10_s
76149 {
76150  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
76151  uint32_t : 16; /* *UNDEFINED* */
76152 };
76153 
76154 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS10. */
76155 typedef volatile struct ALT_USB_DEV_DTXFSTS10_s ALT_USB_DEV_DTXFSTS10_t;
76156 #endif /* __ASSEMBLY__ */
76157 
76158 /* The byte offset of the ALT_USB_DEV_DTXFSTS10 register from the beginning of the component. */
76159 #define ALT_USB_DEV_DTXFSTS10_OFST 0x258
76160 /* The address of the ALT_USB_DEV_DTXFSTS10 register. */
76161 #define ALT_USB_DEV_DTXFSTS10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS10_OFST))
76162 
76163 /*
76164  * Register : Device IN Endpoint 10 DMA Buffer Address Register - diepdmab10
76165  *
76166  * DMA Buffer Address.
76167  *
76168  * Register Layout
76169  *
76170  * Bits | Access | Reset | Description
76171  * :-------|:-------|:--------|:-------------------
76172  * [31:0] | R | Unknown | DMA Buffer Address
76173  *
76174  */
76175 /*
76176  * Field : DMA Buffer Address - diepdmab10
76177  *
76178  * Holds the current buffer address. This register is updated as and when the data
76179  * transfer for the corresponding end point is in progress. This register is
76180  * present only in Scatter/Gather DMA mode.
76181  *
76182  * Field Access Macros:
76183  *
76184  */
76185 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10 register field. */
76186 #define ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10_LSB 0
76187 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10 register field. */
76188 #define ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10_MSB 31
76189 /* The width in bits of the ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10 register field. */
76190 #define ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10_WIDTH 32
76191 /* The mask used to set the ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10 register field value. */
76192 #define ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10_SET_MSK 0xffffffff
76193 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10 register field value. */
76194 #define ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10_CLR_MSK 0x00000000
76195 /* The reset value of the ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10 register field is UNKNOWN. */
76196 #define ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10_RESET 0x0
76197 /* Extracts the ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10 field value from a register. */
76198 #define ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10_GET(value) (((value) & 0xffffffff) >> 0)
76199 /* Produces a ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10 register field value suitable for setting the register. */
76200 #define ALT_USB_DEV_DIEPDMAB10_DIEPDMAB10_SET(value) (((value) << 0) & 0xffffffff)
76201 
76202 #ifndef __ASSEMBLY__
76203 /*
76204  * WARNING: The C register and register group struct declarations are provided for
76205  * convenience and illustrative purposes. They should, however, be used with
76206  * caution as the C language standard provides no guarantees about the alignment or
76207  * atomicity of device memory accesses. The recommended practice for writing
76208  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
76209  * alt_write_word() functions.
76210  *
76211  * The struct declaration for register ALT_USB_DEV_DIEPDMAB10.
76212  */
76213 struct ALT_USB_DEV_DIEPDMAB10_s
76214 {
76215  const uint32_t diepdmab10 : 32; /* DMA Buffer Address */
76216 };
76217 
76218 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB10. */
76219 typedef volatile struct ALT_USB_DEV_DIEPDMAB10_s ALT_USB_DEV_DIEPDMAB10_t;
76220 #endif /* __ASSEMBLY__ */
76221 
76222 /* The byte offset of the ALT_USB_DEV_DIEPDMAB10 register from the beginning of the component. */
76223 #define ALT_USB_DEV_DIEPDMAB10_OFST 0x25c
76224 /* The address of the ALT_USB_DEV_DIEPDMAB10 register. */
76225 #define ALT_USB_DEV_DIEPDMAB10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB10_OFST))
76226 
76227 /*
76228  * Register : Device Control IN Endpoint 11 Control Register - diepctl11
76229  *
76230  * Endpoint_number: 11
76231  *
76232  * Register Layout
76233  *
76234  * Bits | Access | Reset | Description
76235  * :--------|:-------|:------|:--------------------
76236  * [10:0] | RW | 0x0 | Maximum Packet Size
76237  * [14:11] | ??? | 0x0 | *UNDEFINED*
76238  * [15] | RW | 0x0 | USB Active Endpoint
76239  * [16] | R | 0x0 | Endpoint Data PID
76240  * [17] | R | 0x0 | NAK Status
76241  * [19:18] | RW | 0x0 | Endpoint Type
76242  * [20] | ??? | 0x0 | *UNDEFINED*
76243  * [21] | R | 0x0 | STALL Handshake
76244  * [25:22] | RW | 0x0 | TxFIFO Number
76245  * [26] | W | 0x0 | Clear NAK
76246  * [27] | W | 0x0 | Set NAK
76247  * [28] | W | 0x0 | Set DATA0 PID
76248  * [29] | W | 0x0 | Set DATA1 PID
76249  * [30] | R | 0x0 | Endpoint Disable
76250  * [31] | R | 0x0 | Endpoint Enable
76251  *
76252  */
76253 /*
76254  * Field : Maximum Packet Size - mps
76255  *
76256  * Applies to IN and OUT endpoints. The application must program this field with
76257  * the maximum packet size for the current logical endpoint. This value is in
76258  * bytes.
76259  *
76260  * Field Access Macros:
76261  *
76262  */
76263 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_MPS register field. */
76264 #define ALT_USB_DEV_DIEPCTL11_MPS_LSB 0
76265 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_MPS register field. */
76266 #define ALT_USB_DEV_DIEPCTL11_MPS_MSB 10
76267 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_MPS register field. */
76268 #define ALT_USB_DEV_DIEPCTL11_MPS_WIDTH 11
76269 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_MPS register field value. */
76270 #define ALT_USB_DEV_DIEPCTL11_MPS_SET_MSK 0x000007ff
76271 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_MPS register field value. */
76272 #define ALT_USB_DEV_DIEPCTL11_MPS_CLR_MSK 0xfffff800
76273 /* The reset value of the ALT_USB_DEV_DIEPCTL11_MPS register field. */
76274 #define ALT_USB_DEV_DIEPCTL11_MPS_RESET 0x0
76275 /* Extracts the ALT_USB_DEV_DIEPCTL11_MPS field value from a register. */
76276 #define ALT_USB_DEV_DIEPCTL11_MPS_GET(value) (((value) & 0x000007ff) >> 0)
76277 /* Produces a ALT_USB_DEV_DIEPCTL11_MPS register field value suitable for setting the register. */
76278 #define ALT_USB_DEV_DIEPCTL11_MPS_SET(value) (((value) << 0) & 0x000007ff)
76279 
76280 /*
76281  * Field : USB Active Endpoint - usbactep
76282  *
76283  * Indicates whether this endpoint is active in the current configuration and
76284  * interface. The core clears this bit for all endpoints (other than EP 0) after
76285  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
76286  * commands, the application must program endpoint registers accordingly and set
76287  * this bit.
76288  *
76289  * Field Enumeration Values:
76290  *
76291  * Enum | Value | Description
76292  * :--------------------------------------|:------|:--------------------
76293  * ALT_USB_DEV_DIEPCTL11_USBACTEP_E_DISD | 0x0 | Not Active
76294  * ALT_USB_DEV_DIEPCTL11_USBACTEP_E_END | 0x1 | USB Active Endpoint
76295  *
76296  * Field Access Macros:
76297  *
76298  */
76299 /*
76300  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_USBACTEP
76301  *
76302  * Not Active
76303  */
76304 #define ALT_USB_DEV_DIEPCTL11_USBACTEP_E_DISD 0x0
76305 /*
76306  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_USBACTEP
76307  *
76308  * USB Active Endpoint
76309  */
76310 #define ALT_USB_DEV_DIEPCTL11_USBACTEP_E_END 0x1
76311 
76312 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_USBACTEP register field. */
76313 #define ALT_USB_DEV_DIEPCTL11_USBACTEP_LSB 15
76314 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_USBACTEP register field. */
76315 #define ALT_USB_DEV_DIEPCTL11_USBACTEP_MSB 15
76316 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_USBACTEP register field. */
76317 #define ALT_USB_DEV_DIEPCTL11_USBACTEP_WIDTH 1
76318 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_USBACTEP register field value. */
76319 #define ALT_USB_DEV_DIEPCTL11_USBACTEP_SET_MSK 0x00008000
76320 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_USBACTEP register field value. */
76321 #define ALT_USB_DEV_DIEPCTL11_USBACTEP_CLR_MSK 0xffff7fff
76322 /* The reset value of the ALT_USB_DEV_DIEPCTL11_USBACTEP register field. */
76323 #define ALT_USB_DEV_DIEPCTL11_USBACTEP_RESET 0x0
76324 /* Extracts the ALT_USB_DEV_DIEPCTL11_USBACTEP field value from a register. */
76325 #define ALT_USB_DEV_DIEPCTL11_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
76326 /* Produces a ALT_USB_DEV_DIEPCTL11_USBACTEP register field value suitable for setting the register. */
76327 #define ALT_USB_DEV_DIEPCTL11_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
76328 
76329 /*
76330  * Field : Endpoint Data PID - dpid
76331  *
76332  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
76333  * packet to be received or transmitted on this endpoint. The application must
76334  * program the PID of the first packet to be received or transmitted on this
76335  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
76336  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
76337  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
76338  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
76339  * DMA mode:
76340  *
76341  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
76342  * number in which the core transmits/receives isochronous data for this endpoint.
76343  * The application must program the even/odd (micro) frame number in which it
76344  * intends to transmit/receive isochronous data for this endpoint using the
76345  * SetEvnFr and SetOddFr fields in this register.
76346  *
76347  * 0: Even (micro)frame
76348  *
76349  * 1: Odd (micro)frame
76350  *
76351  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
76352  * number in which to send data is provided in the transmit descriptor structure.
76353  * The frame in which data is received is updated in receive descriptor structure.
76354  *
76355  * Field Enumeration Values:
76356  *
76357  * Enum | Value | Description
76358  * :-----------------------------------|:------|:-----------------------------
76359  * ALT_USB_DEV_DIEPCTL11_DPID_E_INACT | 0x0 | Endpoint Data PID not active
76360  * ALT_USB_DEV_DIEPCTL11_DPID_E_ACT | 0x1 | Endpoint Data PID active
76361  *
76362  * Field Access Macros:
76363  *
76364  */
76365 /*
76366  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_DPID
76367  *
76368  * Endpoint Data PID not active
76369  */
76370 #define ALT_USB_DEV_DIEPCTL11_DPID_E_INACT 0x0
76371 /*
76372  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_DPID
76373  *
76374  * Endpoint Data PID active
76375  */
76376 #define ALT_USB_DEV_DIEPCTL11_DPID_E_ACT 0x1
76377 
76378 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_DPID register field. */
76379 #define ALT_USB_DEV_DIEPCTL11_DPID_LSB 16
76380 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_DPID register field. */
76381 #define ALT_USB_DEV_DIEPCTL11_DPID_MSB 16
76382 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_DPID register field. */
76383 #define ALT_USB_DEV_DIEPCTL11_DPID_WIDTH 1
76384 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_DPID register field value. */
76385 #define ALT_USB_DEV_DIEPCTL11_DPID_SET_MSK 0x00010000
76386 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_DPID register field value. */
76387 #define ALT_USB_DEV_DIEPCTL11_DPID_CLR_MSK 0xfffeffff
76388 /* The reset value of the ALT_USB_DEV_DIEPCTL11_DPID register field. */
76389 #define ALT_USB_DEV_DIEPCTL11_DPID_RESET 0x0
76390 /* Extracts the ALT_USB_DEV_DIEPCTL11_DPID field value from a register. */
76391 #define ALT_USB_DEV_DIEPCTL11_DPID_GET(value) (((value) & 0x00010000) >> 16)
76392 /* Produces a ALT_USB_DEV_DIEPCTL11_DPID register field value suitable for setting the register. */
76393 #define ALT_USB_DEV_DIEPCTL11_DPID_SET(value) (((value) << 16) & 0x00010000)
76394 
76395 /*
76396  * Field : NAK Status - naksts
76397  *
76398  * When either the application or the core sets this bit:
76399  *
76400  * * The core stops receiving any data on an OUT endpoint, even if there is space
76401  * in the RxFIFO to accommodate the incoming packet.
76402  *
76403  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
76404  * IN endpoint, even if there data is available in the TxFIFO.
76405  *
76406  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
76407  * even if there data is available in the TxFIFO.
76408  *
76409  * Irrespective of this bit's setting, the core always responds to SETUP data
76410  * packets with an ACK handshake.
76411  *
76412  * Field Enumeration Values:
76413  *
76414  * Enum | Value | Description
76415  * :--------------------------------------|:------|:------------------------------------------------
76416  * ALT_USB_DEV_DIEPCTL11_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
76417  * : | | based on the FIFO status
76418  * ALT_USB_DEV_DIEPCTL11_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
76419  * : | | endpoint
76420  *
76421  * Field Access Macros:
76422  *
76423  */
76424 /*
76425  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_NAKSTS
76426  *
76427  * The core is transmitting non-NAK handshakes based on the FIFO status
76428  */
76429 #define ALT_USB_DEV_DIEPCTL11_NAKSTS_E_NONNAK 0x0
76430 /*
76431  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_NAKSTS
76432  *
76433  * The core is transmitting NAK handshakes on this endpoint
76434  */
76435 #define ALT_USB_DEV_DIEPCTL11_NAKSTS_E_NAK 0x1
76436 
76437 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_NAKSTS register field. */
76438 #define ALT_USB_DEV_DIEPCTL11_NAKSTS_LSB 17
76439 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_NAKSTS register field. */
76440 #define ALT_USB_DEV_DIEPCTL11_NAKSTS_MSB 17
76441 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_NAKSTS register field. */
76442 #define ALT_USB_DEV_DIEPCTL11_NAKSTS_WIDTH 1
76443 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_NAKSTS register field value. */
76444 #define ALT_USB_DEV_DIEPCTL11_NAKSTS_SET_MSK 0x00020000
76445 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_NAKSTS register field value. */
76446 #define ALT_USB_DEV_DIEPCTL11_NAKSTS_CLR_MSK 0xfffdffff
76447 /* The reset value of the ALT_USB_DEV_DIEPCTL11_NAKSTS register field. */
76448 #define ALT_USB_DEV_DIEPCTL11_NAKSTS_RESET 0x0
76449 /* Extracts the ALT_USB_DEV_DIEPCTL11_NAKSTS field value from a register. */
76450 #define ALT_USB_DEV_DIEPCTL11_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
76451 /* Produces a ALT_USB_DEV_DIEPCTL11_NAKSTS register field value suitable for setting the register. */
76452 #define ALT_USB_DEV_DIEPCTL11_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
76453 
76454 /*
76455  * Field : Endpoint Type - eptype
76456  *
76457  * This is the transfer type supported by this logical endpoint.
76458  *
76459  * Field Enumeration Values:
76460  *
76461  * Enum | Value | Description
76462  * :-------------------------------------------|:------|:------------
76463  * ALT_USB_DEV_DIEPCTL11_EPTYPE_E_CTL | 0x0 | Control
76464  * ALT_USB_DEV_DIEPCTL11_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
76465  * ALT_USB_DEV_DIEPCTL11_EPTYPE_E_BULK | 0x2 | Bulk
76466  * ALT_USB_DEV_DIEPCTL11_EPTYPE_E_INTERRUP | 0x3 | Interrupt
76467  *
76468  * Field Access Macros:
76469  *
76470  */
76471 /*
76472  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_EPTYPE
76473  *
76474  * Control
76475  */
76476 #define ALT_USB_DEV_DIEPCTL11_EPTYPE_E_CTL 0x0
76477 /*
76478  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_EPTYPE
76479  *
76480  * Isochronous
76481  */
76482 #define ALT_USB_DEV_DIEPCTL11_EPTYPE_E_ISOCHRONOUS 0x1
76483 /*
76484  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_EPTYPE
76485  *
76486  * Bulk
76487  */
76488 #define ALT_USB_DEV_DIEPCTL11_EPTYPE_E_BULK 0x2
76489 /*
76490  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_EPTYPE
76491  *
76492  * Interrupt
76493  */
76494 #define ALT_USB_DEV_DIEPCTL11_EPTYPE_E_INTERRUP 0x3
76495 
76496 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_EPTYPE register field. */
76497 #define ALT_USB_DEV_DIEPCTL11_EPTYPE_LSB 18
76498 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_EPTYPE register field. */
76499 #define ALT_USB_DEV_DIEPCTL11_EPTYPE_MSB 19
76500 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_EPTYPE register field. */
76501 #define ALT_USB_DEV_DIEPCTL11_EPTYPE_WIDTH 2
76502 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_EPTYPE register field value. */
76503 #define ALT_USB_DEV_DIEPCTL11_EPTYPE_SET_MSK 0x000c0000
76504 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_EPTYPE register field value. */
76505 #define ALT_USB_DEV_DIEPCTL11_EPTYPE_CLR_MSK 0xfff3ffff
76506 /* The reset value of the ALT_USB_DEV_DIEPCTL11_EPTYPE register field. */
76507 #define ALT_USB_DEV_DIEPCTL11_EPTYPE_RESET 0x0
76508 /* Extracts the ALT_USB_DEV_DIEPCTL11_EPTYPE field value from a register. */
76509 #define ALT_USB_DEV_DIEPCTL11_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
76510 /* Produces a ALT_USB_DEV_DIEPCTL11_EPTYPE register field value suitable for setting the register. */
76511 #define ALT_USB_DEV_DIEPCTL11_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
76512 
76513 /*
76514  * Field : STALL Handshake - stall
76515  *
76516  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
76517  * application sets this bit to stall all tokens from the USB host to this
76518  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
76519  * along with this bit, the STALL bit takes priority. Only the application can
76520  * clear this bit, never the core. Applies to control endpoints only. The
76521  * application can only set this bit, and the core clears it, when a SETUP token is
76522  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
76523  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
76524  * of this bit's setting, the core always responds to SETUP data packets with an
76525  * ACK handshake.
76526  *
76527  * Field Enumeration Values:
76528  *
76529  * Enum | Value | Description
76530  * :------------------------------------|:------|:----------------------------
76531  * ALT_USB_DEV_DIEPCTL11_STALL_E_INACT | 0x0 | STALL All Tokens not active
76532  * ALT_USB_DEV_DIEPCTL11_STALL_E_ACT | 0x1 | STALL All Tokens active
76533  *
76534  * Field Access Macros:
76535  *
76536  */
76537 /*
76538  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_STALL
76539  *
76540  * STALL All Tokens not active
76541  */
76542 #define ALT_USB_DEV_DIEPCTL11_STALL_E_INACT 0x0
76543 /*
76544  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_STALL
76545  *
76546  * STALL All Tokens active
76547  */
76548 #define ALT_USB_DEV_DIEPCTL11_STALL_E_ACT 0x1
76549 
76550 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_STALL register field. */
76551 #define ALT_USB_DEV_DIEPCTL11_STALL_LSB 21
76552 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_STALL register field. */
76553 #define ALT_USB_DEV_DIEPCTL11_STALL_MSB 21
76554 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_STALL register field. */
76555 #define ALT_USB_DEV_DIEPCTL11_STALL_WIDTH 1
76556 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_STALL register field value. */
76557 #define ALT_USB_DEV_DIEPCTL11_STALL_SET_MSK 0x00200000
76558 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_STALL register field value. */
76559 #define ALT_USB_DEV_DIEPCTL11_STALL_CLR_MSK 0xffdfffff
76560 /* The reset value of the ALT_USB_DEV_DIEPCTL11_STALL register field. */
76561 #define ALT_USB_DEV_DIEPCTL11_STALL_RESET 0x0
76562 /* Extracts the ALT_USB_DEV_DIEPCTL11_STALL field value from a register. */
76563 #define ALT_USB_DEV_DIEPCTL11_STALL_GET(value) (((value) & 0x00200000) >> 21)
76564 /* Produces a ALT_USB_DEV_DIEPCTL11_STALL register field value suitable for setting the register. */
76565 #define ALT_USB_DEV_DIEPCTL11_STALL_SET(value) (((value) << 21) & 0x00200000)
76566 
76567 /*
76568  * Field : TxFIFO Number - txfnum
76569  *
76570  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
76571  * endpoints must map this to the corresponding Periodic TxFIFO number.
76572  *
76573  * 4'h0: Non-Periodic TxFIFO
76574  *
76575  * Others: Specified Periodic TxFIFO.number
76576  *
76577  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
76578  * applications such as mass storage. The core treats an IN endpoint as a non-
76579  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
76580  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
76581  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
76582  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
76583  * This field is valid only for IN endpoints.
76584  *
76585  * Field Access Macros:
76586  *
76587  */
76588 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_TXFNUM register field. */
76589 #define ALT_USB_DEV_DIEPCTL11_TXFNUM_LSB 22
76590 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_TXFNUM register field. */
76591 #define ALT_USB_DEV_DIEPCTL11_TXFNUM_MSB 25
76592 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_TXFNUM register field. */
76593 #define ALT_USB_DEV_DIEPCTL11_TXFNUM_WIDTH 4
76594 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_TXFNUM register field value. */
76595 #define ALT_USB_DEV_DIEPCTL11_TXFNUM_SET_MSK 0x03c00000
76596 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_TXFNUM register field value. */
76597 #define ALT_USB_DEV_DIEPCTL11_TXFNUM_CLR_MSK 0xfc3fffff
76598 /* The reset value of the ALT_USB_DEV_DIEPCTL11_TXFNUM register field. */
76599 #define ALT_USB_DEV_DIEPCTL11_TXFNUM_RESET 0x0
76600 /* Extracts the ALT_USB_DEV_DIEPCTL11_TXFNUM field value from a register. */
76601 #define ALT_USB_DEV_DIEPCTL11_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
76602 /* Produces a ALT_USB_DEV_DIEPCTL11_TXFNUM register field value suitable for setting the register. */
76603 #define ALT_USB_DEV_DIEPCTL11_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
76604 
76605 /*
76606  * Field : Clear NAK - cnak
76607  *
76608  * A write to this bit clears the NAK bit for the endpoint.
76609  *
76610  * Field Enumeration Values:
76611  *
76612  * Enum | Value | Description
76613  * :-----------------------------------|:------|:-------------
76614  * ALT_USB_DEV_DIEPCTL11_CNAK_E_INACT | 0x0 | No Clear NAK
76615  * ALT_USB_DEV_DIEPCTL11_CNAK_E_ACT | 0x1 | Clear NAK
76616  *
76617  * Field Access Macros:
76618  *
76619  */
76620 /*
76621  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_CNAK
76622  *
76623  * No Clear NAK
76624  */
76625 #define ALT_USB_DEV_DIEPCTL11_CNAK_E_INACT 0x0
76626 /*
76627  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_CNAK
76628  *
76629  * Clear NAK
76630  */
76631 #define ALT_USB_DEV_DIEPCTL11_CNAK_E_ACT 0x1
76632 
76633 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_CNAK register field. */
76634 #define ALT_USB_DEV_DIEPCTL11_CNAK_LSB 26
76635 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_CNAK register field. */
76636 #define ALT_USB_DEV_DIEPCTL11_CNAK_MSB 26
76637 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_CNAK register field. */
76638 #define ALT_USB_DEV_DIEPCTL11_CNAK_WIDTH 1
76639 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_CNAK register field value. */
76640 #define ALT_USB_DEV_DIEPCTL11_CNAK_SET_MSK 0x04000000
76641 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_CNAK register field value. */
76642 #define ALT_USB_DEV_DIEPCTL11_CNAK_CLR_MSK 0xfbffffff
76643 /* The reset value of the ALT_USB_DEV_DIEPCTL11_CNAK register field. */
76644 #define ALT_USB_DEV_DIEPCTL11_CNAK_RESET 0x0
76645 /* Extracts the ALT_USB_DEV_DIEPCTL11_CNAK field value from a register. */
76646 #define ALT_USB_DEV_DIEPCTL11_CNAK_GET(value) (((value) & 0x04000000) >> 26)
76647 /* Produces a ALT_USB_DEV_DIEPCTL11_CNAK register field value suitable for setting the register. */
76648 #define ALT_USB_DEV_DIEPCTL11_CNAK_SET(value) (((value) << 26) & 0x04000000)
76649 
76650 /*
76651  * Field : Set NAK - snak
76652  *
76653  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
76654  * application can control the transmission of NAK handshakes on an endpoint. The
76655  * core can also Set this bit for an endpoint after a SETUP packet is received on
76656  * that endpoint.
76657  *
76658  * Field Enumeration Values:
76659  *
76660  * Enum | Value | Description
76661  * :-----------------------------------|:------|:------------
76662  * ALT_USB_DEV_DIEPCTL11_SNAK_E_INACT | 0x0 | No Set NAK
76663  * ALT_USB_DEV_DIEPCTL11_SNAK_E_ACT | 0x1 | Set NAK
76664  *
76665  * Field Access Macros:
76666  *
76667  */
76668 /*
76669  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_SNAK
76670  *
76671  * No Set NAK
76672  */
76673 #define ALT_USB_DEV_DIEPCTL11_SNAK_E_INACT 0x0
76674 /*
76675  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_SNAK
76676  *
76677  * Set NAK
76678  */
76679 #define ALT_USB_DEV_DIEPCTL11_SNAK_E_ACT 0x1
76680 
76681 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_SNAK register field. */
76682 #define ALT_USB_DEV_DIEPCTL11_SNAK_LSB 27
76683 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_SNAK register field. */
76684 #define ALT_USB_DEV_DIEPCTL11_SNAK_MSB 27
76685 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_SNAK register field. */
76686 #define ALT_USB_DEV_DIEPCTL11_SNAK_WIDTH 1
76687 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_SNAK register field value. */
76688 #define ALT_USB_DEV_DIEPCTL11_SNAK_SET_MSK 0x08000000
76689 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_SNAK register field value. */
76690 #define ALT_USB_DEV_DIEPCTL11_SNAK_CLR_MSK 0xf7ffffff
76691 /* The reset value of the ALT_USB_DEV_DIEPCTL11_SNAK register field. */
76692 #define ALT_USB_DEV_DIEPCTL11_SNAK_RESET 0x0
76693 /* Extracts the ALT_USB_DEV_DIEPCTL11_SNAK field value from a register. */
76694 #define ALT_USB_DEV_DIEPCTL11_SNAK_GET(value) (((value) & 0x08000000) >> 27)
76695 /* Produces a ALT_USB_DEV_DIEPCTL11_SNAK register field value suitable for setting the register. */
76696 #define ALT_USB_DEV_DIEPCTL11_SNAK_SET(value) (((value) << 27) & 0x08000000)
76697 
76698 /*
76699  * Field : Set DATA0 PID - setd0pid
76700  *
76701  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
76702  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
76703  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
76704  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
76705  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
76706  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
76707  * mode is enabled, this field is reserved. The frame number in which to send data
76708  * is in the transmit descriptor structure. The frame in which to receive data is
76709  * updated in receive descriptor structure.
76710  *
76711  * Field Enumeration Values:
76712  *
76713  * Enum | Value | Description
76714  * :--------------------------------------|:------|:----------------------------
76715  * ALT_USB_DEV_DIEPCTL11_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
76716  * ALT_USB_DEV_DIEPCTL11_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
76717  *
76718  * Field Access Macros:
76719  *
76720  */
76721 /*
76722  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_SETD0PID
76723  *
76724  * Disables Set DATA0 PID
76725  */
76726 #define ALT_USB_DEV_DIEPCTL11_SETD0PID_E_DISD 0x0
76727 /*
76728  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_SETD0PID
76729  *
76730  * Endpoint Data PID to DATA0)
76731  */
76732 #define ALT_USB_DEV_DIEPCTL11_SETD0PID_E_END 0x1
76733 
76734 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_SETD0PID register field. */
76735 #define ALT_USB_DEV_DIEPCTL11_SETD0PID_LSB 28
76736 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_SETD0PID register field. */
76737 #define ALT_USB_DEV_DIEPCTL11_SETD0PID_MSB 28
76738 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_SETD0PID register field. */
76739 #define ALT_USB_DEV_DIEPCTL11_SETD0PID_WIDTH 1
76740 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_SETD0PID register field value. */
76741 #define ALT_USB_DEV_DIEPCTL11_SETD0PID_SET_MSK 0x10000000
76742 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_SETD0PID register field value. */
76743 #define ALT_USB_DEV_DIEPCTL11_SETD0PID_CLR_MSK 0xefffffff
76744 /* The reset value of the ALT_USB_DEV_DIEPCTL11_SETD0PID register field. */
76745 #define ALT_USB_DEV_DIEPCTL11_SETD0PID_RESET 0x0
76746 /* Extracts the ALT_USB_DEV_DIEPCTL11_SETD0PID field value from a register. */
76747 #define ALT_USB_DEV_DIEPCTL11_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
76748 /* Produces a ALT_USB_DEV_DIEPCTL11_SETD0PID register field value suitable for setting the register. */
76749 #define ALT_USB_DEV_DIEPCTL11_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
76750 
76751 /*
76752  * Field : Set DATA1 PID - setd1pid
76753  *
76754  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
76755  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
76756  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
76757  *
76758  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
76759  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
76760  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
76761  *
76762  * Field Enumeration Values:
76763  *
76764  * Enum | Value | Description
76765  * :--------------------------------------|:------|:-----------------------
76766  * ALT_USB_DEV_DIEPCTL11_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
76767  * ALT_USB_DEV_DIEPCTL11_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
76768  *
76769  * Field Access Macros:
76770  *
76771  */
76772 /*
76773  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_SETD1PID
76774  *
76775  * Disables Set DATA1 PID
76776  */
76777 #define ALT_USB_DEV_DIEPCTL11_SETD1PID_E_DISD 0x0
76778 /*
76779  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_SETD1PID
76780  *
76781  * Enables Set DATA1 PID
76782  */
76783 #define ALT_USB_DEV_DIEPCTL11_SETD1PID_E_END 0x1
76784 
76785 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_SETD1PID register field. */
76786 #define ALT_USB_DEV_DIEPCTL11_SETD1PID_LSB 29
76787 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_SETD1PID register field. */
76788 #define ALT_USB_DEV_DIEPCTL11_SETD1PID_MSB 29
76789 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_SETD1PID register field. */
76790 #define ALT_USB_DEV_DIEPCTL11_SETD1PID_WIDTH 1
76791 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_SETD1PID register field value. */
76792 #define ALT_USB_DEV_DIEPCTL11_SETD1PID_SET_MSK 0x20000000
76793 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_SETD1PID register field value. */
76794 #define ALT_USB_DEV_DIEPCTL11_SETD1PID_CLR_MSK 0xdfffffff
76795 /* The reset value of the ALT_USB_DEV_DIEPCTL11_SETD1PID register field. */
76796 #define ALT_USB_DEV_DIEPCTL11_SETD1PID_RESET 0x0
76797 /* Extracts the ALT_USB_DEV_DIEPCTL11_SETD1PID field value from a register. */
76798 #define ALT_USB_DEV_DIEPCTL11_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
76799 /* Produces a ALT_USB_DEV_DIEPCTL11_SETD1PID register field value suitable for setting the register. */
76800 #define ALT_USB_DEV_DIEPCTL11_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
76801 
76802 /*
76803  * Field : Endpoint Disable - epdis
76804  *
76805  * Applies to IN and OUT endpoints. The application sets this bit to stop
76806  * transmitting/receiving data on an endpoint, even before the transfer for that
76807  * endpoint is complete. The application must wait for the Endpoint Disabled
76808  * interrupt before treating the endpoint as disabled. The core clears this bit
76809  * before setting the Endpoint Disabled interrupt. The application must set this
76810  * bit only if Endpoint Enable is already set for this endpoint.
76811  *
76812  * Field Enumeration Values:
76813  *
76814  * Enum | Value | Description
76815  * :------------------------------------|:------|:--------------------
76816  * ALT_USB_DEV_DIEPCTL11_EPDIS_E_INACT | 0x0 | No Endpoint Disable
76817  * ALT_USB_DEV_DIEPCTL11_EPDIS_E_ACT | 0x1 | Endpoint Disable
76818  *
76819  * Field Access Macros:
76820  *
76821  */
76822 /*
76823  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_EPDIS
76824  *
76825  * No Endpoint Disable
76826  */
76827 #define ALT_USB_DEV_DIEPCTL11_EPDIS_E_INACT 0x0
76828 /*
76829  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_EPDIS
76830  *
76831  * Endpoint Disable
76832  */
76833 #define ALT_USB_DEV_DIEPCTL11_EPDIS_E_ACT 0x1
76834 
76835 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_EPDIS register field. */
76836 #define ALT_USB_DEV_DIEPCTL11_EPDIS_LSB 30
76837 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_EPDIS register field. */
76838 #define ALT_USB_DEV_DIEPCTL11_EPDIS_MSB 30
76839 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_EPDIS register field. */
76840 #define ALT_USB_DEV_DIEPCTL11_EPDIS_WIDTH 1
76841 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_EPDIS register field value. */
76842 #define ALT_USB_DEV_DIEPCTL11_EPDIS_SET_MSK 0x40000000
76843 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_EPDIS register field value. */
76844 #define ALT_USB_DEV_DIEPCTL11_EPDIS_CLR_MSK 0xbfffffff
76845 /* The reset value of the ALT_USB_DEV_DIEPCTL11_EPDIS register field. */
76846 #define ALT_USB_DEV_DIEPCTL11_EPDIS_RESET 0x0
76847 /* Extracts the ALT_USB_DEV_DIEPCTL11_EPDIS field value from a register. */
76848 #define ALT_USB_DEV_DIEPCTL11_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
76849 /* Produces a ALT_USB_DEV_DIEPCTL11_EPDIS register field value suitable for setting the register. */
76850 #define ALT_USB_DEV_DIEPCTL11_EPDIS_SET(value) (((value) << 30) & 0x40000000)
76851 
76852 /*
76853  * Field : Endpoint Enable - epena
76854  *
76855  * Applies to IN and OUT endpoints.
76856  *
76857  * * When Scatter/Gather DMA mode is enabled,
76858  *
76859  * * for IN endpoints this bit indicates that the descriptor structure and data
76860  * buffer with data ready to transmit is setup.
76861  *
76862  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
76863  * receive data is setup.
76864  *
76865  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
76866  * mode:
76867  *
76868  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
76869  * the endpoint.
76870  *
76871  * * for OUT endpoints, this bit indicates that the application has allocated the
76872  * memory to start receiving data from the USB.
76873  *
76874  * * The core clears this bit before setting any of the following interrupts on
76875  * this endpoint:
76876  *
76877  * * SETUP Phase Done
76878  *
76879  * * Endpoint Disabled
76880  *
76881  * * Transfer Completed
76882  *
76883  * for control endpoints in DMA mode, this bit must be set to be able to transfer
76884  * SETUP data packets in memory.
76885  *
76886  * Field Enumeration Values:
76887  *
76888  * Enum | Value | Description
76889  * :------------------------------------|:------|:-------------------------
76890  * ALT_USB_DEV_DIEPCTL11_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
76891  * ALT_USB_DEV_DIEPCTL11_EPENA_E_ACT | 0x1 | Endpoint Enable active
76892  *
76893  * Field Access Macros:
76894  *
76895  */
76896 /*
76897  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_EPENA
76898  *
76899  * Endpoint Enable inactive
76900  */
76901 #define ALT_USB_DEV_DIEPCTL11_EPENA_E_INACT 0x0
76902 /*
76903  * Enumerated value for register field ALT_USB_DEV_DIEPCTL11_EPENA
76904  *
76905  * Endpoint Enable active
76906  */
76907 #define ALT_USB_DEV_DIEPCTL11_EPENA_E_ACT 0x1
76908 
76909 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL11_EPENA register field. */
76910 #define ALT_USB_DEV_DIEPCTL11_EPENA_LSB 31
76911 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL11_EPENA register field. */
76912 #define ALT_USB_DEV_DIEPCTL11_EPENA_MSB 31
76913 /* The width in bits of the ALT_USB_DEV_DIEPCTL11_EPENA register field. */
76914 #define ALT_USB_DEV_DIEPCTL11_EPENA_WIDTH 1
76915 /* The mask used to set the ALT_USB_DEV_DIEPCTL11_EPENA register field value. */
76916 #define ALT_USB_DEV_DIEPCTL11_EPENA_SET_MSK 0x80000000
76917 /* The mask used to clear the ALT_USB_DEV_DIEPCTL11_EPENA register field value. */
76918 #define ALT_USB_DEV_DIEPCTL11_EPENA_CLR_MSK 0x7fffffff
76919 /* The reset value of the ALT_USB_DEV_DIEPCTL11_EPENA register field. */
76920 #define ALT_USB_DEV_DIEPCTL11_EPENA_RESET 0x0
76921 /* Extracts the ALT_USB_DEV_DIEPCTL11_EPENA field value from a register. */
76922 #define ALT_USB_DEV_DIEPCTL11_EPENA_GET(value) (((value) & 0x80000000) >> 31)
76923 /* Produces a ALT_USB_DEV_DIEPCTL11_EPENA register field value suitable for setting the register. */
76924 #define ALT_USB_DEV_DIEPCTL11_EPENA_SET(value) (((value) << 31) & 0x80000000)
76925 
76926 #ifndef __ASSEMBLY__
76927 /*
76928  * WARNING: The C register and register group struct declarations are provided for
76929  * convenience and illustrative purposes. They should, however, be used with
76930  * caution as the C language standard provides no guarantees about the alignment or
76931  * atomicity of device memory accesses. The recommended practice for writing
76932  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
76933  * alt_write_word() functions.
76934  *
76935  * The struct declaration for register ALT_USB_DEV_DIEPCTL11.
76936  */
76937 struct ALT_USB_DEV_DIEPCTL11_s
76938 {
76939  uint32_t mps : 11; /* Maximum Packet Size */
76940  uint32_t : 4; /* *UNDEFINED* */
76941  uint32_t usbactep : 1; /* USB Active Endpoint */
76942  const uint32_t dpid : 1; /* Endpoint Data PID */
76943  const uint32_t naksts : 1; /* NAK Status */
76944  uint32_t eptype : 2; /* Endpoint Type */
76945  uint32_t : 1; /* *UNDEFINED* */
76946  const uint32_t stall : 1; /* STALL Handshake */
76947  uint32_t txfnum : 4; /* TxFIFO Number */
76948  uint32_t cnak : 1; /* Clear NAK */
76949  uint32_t snak : 1; /* Set NAK */
76950  uint32_t setd0pid : 1; /* Set DATA0 PID */
76951  uint32_t setd1pid : 1; /* Set DATA1 PID */
76952  const uint32_t epdis : 1; /* Endpoint Disable */
76953  const uint32_t epena : 1; /* Endpoint Enable */
76954 };
76955 
76956 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL11. */
76957 typedef volatile struct ALT_USB_DEV_DIEPCTL11_s ALT_USB_DEV_DIEPCTL11_t;
76958 #endif /* __ASSEMBLY__ */
76959 
76960 /* The byte offset of the ALT_USB_DEV_DIEPCTL11 register from the beginning of the component. */
76961 #define ALT_USB_DEV_DIEPCTL11_OFST 0x260
76962 /* The address of the ALT_USB_DEV_DIEPCTL11 register. */
76963 #define ALT_USB_DEV_DIEPCTL11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL11_OFST))
76964 
76965 /*
76966  * Register : Device IN Endpoint 11 Interrupt Register - diepint11
76967  *
76968  * This register indicates the status of an endpoint with respect to USB- and AHB-
76969  * related events. The application must read this register when the OUT Endpoints
76970  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
76971  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
76972  * can read this register, it must first read the Device All Endpoints Interrupt
76973  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
76974  * Interrupt register. The application must clear the appropriate bit in this
76975  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
76976  *
76977  * Register Layout
76978  *
76979  * Bits | Access | Reset | Description
76980  * :--------|:-------|:------|:---------------------------------------
76981  * [0] | R | 0x0 | Transfer Completed Interrupt
76982  * [1] | R | 0x0 | Endpoint Disabled Interrupt
76983  * [2] | R | 0x0 | AHB Error
76984  * [3] | R | 0x0 | Timeout Condition
76985  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
76986  * [5] | R | 0x0 | IN Token Received with EP Mismatch
76987  * [6] | R | 0x0 | IN Endpoint NAK Effective
76988  * [7] | R | 0x1 | Transmit FIFO Empty
76989  * [8] | R | 0x0 | Fifo Underrun
76990  * [9] | R | 0x0 | BNA Interrupt
76991  * [10] | ??? | 0x0 | *UNDEFINED*
76992  * [11] | R | 0x0 | Packet Drop Status
76993  * [12] | R | 0x0 | BbleErr Interrupt
76994  * [13] | R | 0x0 | NAK Interrupt
76995  * [14] | R | 0x0 | NYET Interrupt
76996  * [31:15] | ??? | 0x0 | *UNDEFINED*
76997  *
76998  */
76999 /*
77000  * Field : Transfer Completed Interrupt - xfercompl
77001  *
77002  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
77003  *
77004  * * for IN endpoint this field indicates that the requested data from the
77005  * descriptor is moved from external system memory to internal FIFO.
77006  *
77007  * * for OUT endpoint this field indicates that the requested data from the
77008  * internal FIFO is moved to external system memory. This interrupt is generated
77009  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
77010  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
77011  * this field indicates that the programmed transfer is complete on the AHB as
77012  * well as on the USB, for this endpoint.
77013  *
77014  * Field Enumeration Values:
77015  *
77016  * Enum | Value | Description
77017  * :----------------------------------------|:------|:-----------------------------
77018  * ALT_USB_DEV_DIEPINT11_XFERCOMPL_E_INACT | 0x0 | No Interrupt
77019  * ALT_USB_DEV_DIEPINT11_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
77020  *
77021  * Field Access Macros:
77022  *
77023  */
77024 /*
77025  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_XFERCOMPL
77026  *
77027  * No Interrupt
77028  */
77029 #define ALT_USB_DEV_DIEPINT11_XFERCOMPL_E_INACT 0x0
77030 /*
77031  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_XFERCOMPL
77032  *
77033  * Transfer Completed Interrupt
77034  */
77035 #define ALT_USB_DEV_DIEPINT11_XFERCOMPL_E_ACT 0x1
77036 
77037 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_XFERCOMPL register field. */
77038 #define ALT_USB_DEV_DIEPINT11_XFERCOMPL_LSB 0
77039 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_XFERCOMPL register field. */
77040 #define ALT_USB_DEV_DIEPINT11_XFERCOMPL_MSB 0
77041 /* The width in bits of the ALT_USB_DEV_DIEPINT11_XFERCOMPL register field. */
77042 #define ALT_USB_DEV_DIEPINT11_XFERCOMPL_WIDTH 1
77043 /* The mask used to set the ALT_USB_DEV_DIEPINT11_XFERCOMPL register field value. */
77044 #define ALT_USB_DEV_DIEPINT11_XFERCOMPL_SET_MSK 0x00000001
77045 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_XFERCOMPL register field value. */
77046 #define ALT_USB_DEV_DIEPINT11_XFERCOMPL_CLR_MSK 0xfffffffe
77047 /* The reset value of the ALT_USB_DEV_DIEPINT11_XFERCOMPL register field. */
77048 #define ALT_USB_DEV_DIEPINT11_XFERCOMPL_RESET 0x0
77049 /* Extracts the ALT_USB_DEV_DIEPINT11_XFERCOMPL field value from a register. */
77050 #define ALT_USB_DEV_DIEPINT11_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
77051 /* Produces a ALT_USB_DEV_DIEPINT11_XFERCOMPL register field value suitable for setting the register. */
77052 #define ALT_USB_DEV_DIEPINT11_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
77053 
77054 /*
77055  * Field : Endpoint Disabled Interrupt - epdisbld
77056  *
77057  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
77058  * disabled per the application's request.
77059  *
77060  * Field Enumeration Values:
77061  *
77062  * Enum | Value | Description
77063  * :---------------------------------------|:------|:----------------------------
77064  * ALT_USB_DEV_DIEPINT11_EPDISBLD_E_INACT | 0x0 | No Interrupt
77065  * ALT_USB_DEV_DIEPINT11_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
77066  *
77067  * Field Access Macros:
77068  *
77069  */
77070 /*
77071  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_EPDISBLD
77072  *
77073  * No Interrupt
77074  */
77075 #define ALT_USB_DEV_DIEPINT11_EPDISBLD_E_INACT 0x0
77076 /*
77077  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_EPDISBLD
77078  *
77079  * Endpoint Disabled Interrupt
77080  */
77081 #define ALT_USB_DEV_DIEPINT11_EPDISBLD_E_ACT 0x1
77082 
77083 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_EPDISBLD register field. */
77084 #define ALT_USB_DEV_DIEPINT11_EPDISBLD_LSB 1
77085 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_EPDISBLD register field. */
77086 #define ALT_USB_DEV_DIEPINT11_EPDISBLD_MSB 1
77087 /* The width in bits of the ALT_USB_DEV_DIEPINT11_EPDISBLD register field. */
77088 #define ALT_USB_DEV_DIEPINT11_EPDISBLD_WIDTH 1
77089 /* The mask used to set the ALT_USB_DEV_DIEPINT11_EPDISBLD register field value. */
77090 #define ALT_USB_DEV_DIEPINT11_EPDISBLD_SET_MSK 0x00000002
77091 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_EPDISBLD register field value. */
77092 #define ALT_USB_DEV_DIEPINT11_EPDISBLD_CLR_MSK 0xfffffffd
77093 /* The reset value of the ALT_USB_DEV_DIEPINT11_EPDISBLD register field. */
77094 #define ALT_USB_DEV_DIEPINT11_EPDISBLD_RESET 0x0
77095 /* Extracts the ALT_USB_DEV_DIEPINT11_EPDISBLD field value from a register. */
77096 #define ALT_USB_DEV_DIEPINT11_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
77097 /* Produces a ALT_USB_DEV_DIEPINT11_EPDISBLD register field value suitable for setting the register. */
77098 #define ALT_USB_DEV_DIEPINT11_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
77099 
77100 /*
77101  * Field : AHB Error - ahberr
77102  *
77103  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
77104  * there is an AHB error during an AHB read/write. The application can read the
77105  * corresponding endpoint DMA address register to get the error address.
77106  *
77107  * Field Enumeration Values:
77108  *
77109  * Enum | Value | Description
77110  * :-------------------------------------|:------|:--------------------
77111  * ALT_USB_DEV_DIEPINT11_AHBERR_E_INACT | 0x0 | No Interrupt
77112  * ALT_USB_DEV_DIEPINT11_AHBERR_E_ACT | 0x1 | AHB Error interrupt
77113  *
77114  * Field Access Macros:
77115  *
77116  */
77117 /*
77118  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_AHBERR
77119  *
77120  * No Interrupt
77121  */
77122 #define ALT_USB_DEV_DIEPINT11_AHBERR_E_INACT 0x0
77123 /*
77124  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_AHBERR
77125  *
77126  * AHB Error interrupt
77127  */
77128 #define ALT_USB_DEV_DIEPINT11_AHBERR_E_ACT 0x1
77129 
77130 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_AHBERR register field. */
77131 #define ALT_USB_DEV_DIEPINT11_AHBERR_LSB 2
77132 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_AHBERR register field. */
77133 #define ALT_USB_DEV_DIEPINT11_AHBERR_MSB 2
77134 /* The width in bits of the ALT_USB_DEV_DIEPINT11_AHBERR register field. */
77135 #define ALT_USB_DEV_DIEPINT11_AHBERR_WIDTH 1
77136 /* The mask used to set the ALT_USB_DEV_DIEPINT11_AHBERR register field value. */
77137 #define ALT_USB_DEV_DIEPINT11_AHBERR_SET_MSK 0x00000004
77138 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_AHBERR register field value. */
77139 #define ALT_USB_DEV_DIEPINT11_AHBERR_CLR_MSK 0xfffffffb
77140 /* The reset value of the ALT_USB_DEV_DIEPINT11_AHBERR register field. */
77141 #define ALT_USB_DEV_DIEPINT11_AHBERR_RESET 0x0
77142 /* Extracts the ALT_USB_DEV_DIEPINT11_AHBERR field value from a register. */
77143 #define ALT_USB_DEV_DIEPINT11_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
77144 /* Produces a ALT_USB_DEV_DIEPINT11_AHBERR register field value suitable for setting the register. */
77145 #define ALT_USB_DEV_DIEPINT11_AHBERR_SET(value) (((value) << 2) & 0x00000004)
77146 
77147 /*
77148  * Field : Timeout Condition - timeout
77149  *
77150  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
77151  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
77152  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
77153  * detected a timeout condition on the USB for the last IN token on this endpoint.
77154  *
77155  * Field Enumeration Values:
77156  *
77157  * Enum | Value | Description
77158  * :----------------------------------|:------|:------------------
77159  * ALT_USB_DEV_DIEPINT11_TMO_E_INACT | 0x0 | No interrupt
77160  * ALT_USB_DEV_DIEPINT11_TMO_E_ACT | 0x1 | Timeout interrupy
77161  *
77162  * Field Access Macros:
77163  *
77164  */
77165 /*
77166  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_TMO
77167  *
77168  * No interrupt
77169  */
77170 #define ALT_USB_DEV_DIEPINT11_TMO_E_INACT 0x0
77171 /*
77172  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_TMO
77173  *
77174  * Timeout interrupy
77175  */
77176 #define ALT_USB_DEV_DIEPINT11_TMO_E_ACT 0x1
77177 
77178 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_TMO register field. */
77179 #define ALT_USB_DEV_DIEPINT11_TMO_LSB 3
77180 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_TMO register field. */
77181 #define ALT_USB_DEV_DIEPINT11_TMO_MSB 3
77182 /* The width in bits of the ALT_USB_DEV_DIEPINT11_TMO register field. */
77183 #define ALT_USB_DEV_DIEPINT11_TMO_WIDTH 1
77184 /* The mask used to set the ALT_USB_DEV_DIEPINT11_TMO register field value. */
77185 #define ALT_USB_DEV_DIEPINT11_TMO_SET_MSK 0x00000008
77186 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_TMO register field value. */
77187 #define ALT_USB_DEV_DIEPINT11_TMO_CLR_MSK 0xfffffff7
77188 /* The reset value of the ALT_USB_DEV_DIEPINT11_TMO register field. */
77189 #define ALT_USB_DEV_DIEPINT11_TMO_RESET 0x0
77190 /* Extracts the ALT_USB_DEV_DIEPINT11_TMO field value from a register. */
77191 #define ALT_USB_DEV_DIEPINT11_TMO_GET(value) (((value) & 0x00000008) >> 3)
77192 /* Produces a ALT_USB_DEV_DIEPINT11_TMO register field value suitable for setting the register. */
77193 #define ALT_USB_DEV_DIEPINT11_TMO_SET(value) (((value) << 3) & 0x00000008)
77194 
77195 /*
77196  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
77197  *
77198  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
77199  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
77200  * interrupt is asserted on the endpoint for which the IN token was received.
77201  *
77202  * Field Enumeration Values:
77203  *
77204  * Enum | Value | Description
77205  * :------------------------------------------|:------|:----------------------------
77206  * ALT_USB_DEV_DIEPINT11_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
77207  * ALT_USB_DEV_DIEPINT11_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
77208  *
77209  * Field Access Macros:
77210  *
77211  */
77212 /*
77213  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_INTKNTXFEMP
77214  *
77215  * No interrupt
77216  */
77217 #define ALT_USB_DEV_DIEPINT11_INTKNTXFEMP_E_INACT 0x0
77218 /*
77219  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_INTKNTXFEMP
77220  *
77221  * IN Token Received Interrupt
77222  */
77223 #define ALT_USB_DEV_DIEPINT11_INTKNTXFEMP_E_ACT 0x1
77224 
77225 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_INTKNTXFEMP register field. */
77226 #define ALT_USB_DEV_DIEPINT11_INTKNTXFEMP_LSB 4
77227 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_INTKNTXFEMP register field. */
77228 #define ALT_USB_DEV_DIEPINT11_INTKNTXFEMP_MSB 4
77229 /* The width in bits of the ALT_USB_DEV_DIEPINT11_INTKNTXFEMP register field. */
77230 #define ALT_USB_DEV_DIEPINT11_INTKNTXFEMP_WIDTH 1
77231 /* The mask used to set the ALT_USB_DEV_DIEPINT11_INTKNTXFEMP register field value. */
77232 #define ALT_USB_DEV_DIEPINT11_INTKNTXFEMP_SET_MSK 0x00000010
77233 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_INTKNTXFEMP register field value. */
77234 #define ALT_USB_DEV_DIEPINT11_INTKNTXFEMP_CLR_MSK 0xffffffef
77235 /* The reset value of the ALT_USB_DEV_DIEPINT11_INTKNTXFEMP register field. */
77236 #define ALT_USB_DEV_DIEPINT11_INTKNTXFEMP_RESET 0x0
77237 /* Extracts the ALT_USB_DEV_DIEPINT11_INTKNTXFEMP field value from a register. */
77238 #define ALT_USB_DEV_DIEPINT11_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
77239 /* Produces a ALT_USB_DEV_DIEPINT11_INTKNTXFEMP register field value suitable for setting the register. */
77240 #define ALT_USB_DEV_DIEPINT11_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
77241 
77242 /*
77243  * Field : IN Token Received with EP Mismatch - intknepmis
77244  *
77245  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
77246  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
77247  * IN token was received. This interrupt is asserted on the endpoint for which the
77248  * IN token was received.
77249  *
77250  * Field Enumeration Values:
77251  *
77252  * Enum | Value | Description
77253  * :-----------------------------------------|:------|:---------------------------------------------
77254  * ALT_USB_DEV_DIEPINT11_INTKNEPMIS_E_INACT | 0x0 | No interrupt
77255  * ALT_USB_DEV_DIEPINT11_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
77256  *
77257  * Field Access Macros:
77258  *
77259  */
77260 /*
77261  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_INTKNEPMIS
77262  *
77263  * No interrupt
77264  */
77265 #define ALT_USB_DEV_DIEPINT11_INTKNEPMIS_E_INACT 0x0
77266 /*
77267  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_INTKNEPMIS
77268  *
77269  * IN Token Received with EP Mismatch interrupt
77270  */
77271 #define ALT_USB_DEV_DIEPINT11_INTKNEPMIS_E_ACT 0x1
77272 
77273 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_INTKNEPMIS register field. */
77274 #define ALT_USB_DEV_DIEPINT11_INTKNEPMIS_LSB 5
77275 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_INTKNEPMIS register field. */
77276 #define ALT_USB_DEV_DIEPINT11_INTKNEPMIS_MSB 5
77277 /* The width in bits of the ALT_USB_DEV_DIEPINT11_INTKNEPMIS register field. */
77278 #define ALT_USB_DEV_DIEPINT11_INTKNEPMIS_WIDTH 1
77279 /* The mask used to set the ALT_USB_DEV_DIEPINT11_INTKNEPMIS register field value. */
77280 #define ALT_USB_DEV_DIEPINT11_INTKNEPMIS_SET_MSK 0x00000020
77281 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_INTKNEPMIS register field value. */
77282 #define ALT_USB_DEV_DIEPINT11_INTKNEPMIS_CLR_MSK 0xffffffdf
77283 /* The reset value of the ALT_USB_DEV_DIEPINT11_INTKNEPMIS register field. */
77284 #define ALT_USB_DEV_DIEPINT11_INTKNEPMIS_RESET 0x0
77285 /* Extracts the ALT_USB_DEV_DIEPINT11_INTKNEPMIS field value from a register. */
77286 #define ALT_USB_DEV_DIEPINT11_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
77287 /* Produces a ALT_USB_DEV_DIEPINT11_INTKNEPMIS register field value suitable for setting the register. */
77288 #define ALT_USB_DEV_DIEPINT11_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
77289 
77290 /*
77291  * Field : IN Endpoint NAK Effective - inepnakeff
77292  *
77293  * Applies to periodic IN endpoints only. This bit can be cleared when the
77294  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
77295  * interrupt indicates that the core has sampled the NAK bit Set (either by the
77296  * application or by the core). The interrupt indicates that the IN endpoint NAK
77297  * bit Set by the application has taken effect in the core.This interrupt does not
77298  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
77299  * over a NAK bit.
77300  *
77301  * Field Enumeration Values:
77302  *
77303  * Enum | Value | Description
77304  * :-----------------------------------------|:------|:------------------------------------
77305  * ALT_USB_DEV_DIEPINT11_INEPNAKEFF_E_INACT | 0x0 | No interrupt
77306  * ALT_USB_DEV_DIEPINT11_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
77307  *
77308  * Field Access Macros:
77309  *
77310  */
77311 /*
77312  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_INEPNAKEFF
77313  *
77314  * No interrupt
77315  */
77316 #define ALT_USB_DEV_DIEPINT11_INEPNAKEFF_E_INACT 0x0
77317 /*
77318  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_INEPNAKEFF
77319  *
77320  * IN Endpoint NAK Effective interrupt
77321  */
77322 #define ALT_USB_DEV_DIEPINT11_INEPNAKEFF_E_ACT 0x1
77323 
77324 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_INEPNAKEFF register field. */
77325 #define ALT_USB_DEV_DIEPINT11_INEPNAKEFF_LSB 6
77326 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_INEPNAKEFF register field. */
77327 #define ALT_USB_DEV_DIEPINT11_INEPNAKEFF_MSB 6
77328 /* The width in bits of the ALT_USB_DEV_DIEPINT11_INEPNAKEFF register field. */
77329 #define ALT_USB_DEV_DIEPINT11_INEPNAKEFF_WIDTH 1
77330 /* The mask used to set the ALT_USB_DEV_DIEPINT11_INEPNAKEFF register field value. */
77331 #define ALT_USB_DEV_DIEPINT11_INEPNAKEFF_SET_MSK 0x00000040
77332 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_INEPNAKEFF register field value. */
77333 #define ALT_USB_DEV_DIEPINT11_INEPNAKEFF_CLR_MSK 0xffffffbf
77334 /* The reset value of the ALT_USB_DEV_DIEPINT11_INEPNAKEFF register field. */
77335 #define ALT_USB_DEV_DIEPINT11_INEPNAKEFF_RESET 0x0
77336 /* Extracts the ALT_USB_DEV_DIEPINT11_INEPNAKEFF field value from a register. */
77337 #define ALT_USB_DEV_DIEPINT11_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
77338 /* Produces a ALT_USB_DEV_DIEPINT11_INEPNAKEFF register field value suitable for setting the register. */
77339 #define ALT_USB_DEV_DIEPINT11_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
77340 
77341 /*
77342  * Field : Transmit FIFO Empty - txfemp
77343  *
77344  * This bit is valid only for IN Endpoints This interrupt is asserted when the
77345  * TxFIFO for this endpoint is either half or completely empty. The half or
77346  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
77347  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
77348  *
77349  * Field Enumeration Values:
77350  *
77351  * Enum | Value | Description
77352  * :-------------------------------------|:------|:------------------------------
77353  * ALT_USB_DEV_DIEPINT11_TXFEMP_E_INACT | 0x0 | No interrupt
77354  * ALT_USB_DEV_DIEPINT11_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
77355  *
77356  * Field Access Macros:
77357  *
77358  */
77359 /*
77360  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_TXFEMP
77361  *
77362  * No interrupt
77363  */
77364 #define ALT_USB_DEV_DIEPINT11_TXFEMP_E_INACT 0x0
77365 /*
77366  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_TXFEMP
77367  *
77368  * Transmit FIFO Empty interrupt
77369  */
77370 #define ALT_USB_DEV_DIEPINT11_TXFEMP_E_ACT 0x1
77371 
77372 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_TXFEMP register field. */
77373 #define ALT_USB_DEV_DIEPINT11_TXFEMP_LSB 7
77374 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_TXFEMP register field. */
77375 #define ALT_USB_DEV_DIEPINT11_TXFEMP_MSB 7
77376 /* The width in bits of the ALT_USB_DEV_DIEPINT11_TXFEMP register field. */
77377 #define ALT_USB_DEV_DIEPINT11_TXFEMP_WIDTH 1
77378 /* The mask used to set the ALT_USB_DEV_DIEPINT11_TXFEMP register field value. */
77379 #define ALT_USB_DEV_DIEPINT11_TXFEMP_SET_MSK 0x00000080
77380 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_TXFEMP register field value. */
77381 #define ALT_USB_DEV_DIEPINT11_TXFEMP_CLR_MSK 0xffffff7f
77382 /* The reset value of the ALT_USB_DEV_DIEPINT11_TXFEMP register field. */
77383 #define ALT_USB_DEV_DIEPINT11_TXFEMP_RESET 0x1
77384 /* Extracts the ALT_USB_DEV_DIEPINT11_TXFEMP field value from a register. */
77385 #define ALT_USB_DEV_DIEPINT11_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
77386 /* Produces a ALT_USB_DEV_DIEPINT11_TXFEMP register field value suitable for setting the register. */
77387 #define ALT_USB_DEV_DIEPINT11_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
77388 
77389 /*
77390  * Field : Fifo Underrun - txfifoundrn
77391  *
77392  * Applies to IN endpoints Only. The core generates this interrupt when it detects
77393  * a transmit FIFO underrun condition for this endpoint.
77394  *
77395  * Field Enumeration Values:
77396  *
77397  * Enum | Value | Description
77398  * :------------------------------------------|:------|:------------------------
77399  * ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
77400  * ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
77401  *
77402  * Field Access Macros:
77403  *
77404  */
77405 /*
77406  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN
77407  *
77408  * No interrupt
77409  */
77410 #define ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN_E_INACT 0x0
77411 /*
77412  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN
77413  *
77414  * Fifo Underrun interrupt
77415  */
77416 #define ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN_E_ACT 0x1
77417 
77418 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN register field. */
77419 #define ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN_LSB 8
77420 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN register field. */
77421 #define ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN_MSB 8
77422 /* The width in bits of the ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN register field. */
77423 #define ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN_WIDTH 1
77424 /* The mask used to set the ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN register field value. */
77425 #define ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN_SET_MSK 0x00000100
77426 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN register field value. */
77427 #define ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN_CLR_MSK 0xfffffeff
77428 /* The reset value of the ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN register field. */
77429 #define ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN_RESET 0x0
77430 /* Extracts the ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN field value from a register. */
77431 #define ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
77432 /* Produces a ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN register field value suitable for setting the register. */
77433 #define ALT_USB_DEV_DIEPINT11_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
77434 
77435 /*
77436  * Field : BNA Interrupt - bnaintr
77437  *
77438  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
77439  * generates this interrupt when the descriptor accessed is not ready for the Core
77440  * to process, such as Host busy or DMA done
77441  *
77442  * Field Enumeration Values:
77443  *
77444  * Enum | Value | Description
77445  * :--------------------------------------|:------|:--------------
77446  * ALT_USB_DEV_DIEPINT11_BNAINTR_E_INACT | 0x0 | No interrupt
77447  * ALT_USB_DEV_DIEPINT11_BNAINTR_E_ACT | 0x1 | BNA interrupt
77448  *
77449  * Field Access Macros:
77450  *
77451  */
77452 /*
77453  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_BNAINTR
77454  *
77455  * No interrupt
77456  */
77457 #define ALT_USB_DEV_DIEPINT11_BNAINTR_E_INACT 0x0
77458 /*
77459  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_BNAINTR
77460  *
77461  * BNA interrupt
77462  */
77463 #define ALT_USB_DEV_DIEPINT11_BNAINTR_E_ACT 0x1
77464 
77465 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_BNAINTR register field. */
77466 #define ALT_USB_DEV_DIEPINT11_BNAINTR_LSB 9
77467 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_BNAINTR register field. */
77468 #define ALT_USB_DEV_DIEPINT11_BNAINTR_MSB 9
77469 /* The width in bits of the ALT_USB_DEV_DIEPINT11_BNAINTR register field. */
77470 #define ALT_USB_DEV_DIEPINT11_BNAINTR_WIDTH 1
77471 /* The mask used to set the ALT_USB_DEV_DIEPINT11_BNAINTR register field value. */
77472 #define ALT_USB_DEV_DIEPINT11_BNAINTR_SET_MSK 0x00000200
77473 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_BNAINTR register field value. */
77474 #define ALT_USB_DEV_DIEPINT11_BNAINTR_CLR_MSK 0xfffffdff
77475 /* The reset value of the ALT_USB_DEV_DIEPINT11_BNAINTR register field. */
77476 #define ALT_USB_DEV_DIEPINT11_BNAINTR_RESET 0x0
77477 /* Extracts the ALT_USB_DEV_DIEPINT11_BNAINTR field value from a register. */
77478 #define ALT_USB_DEV_DIEPINT11_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
77479 /* Produces a ALT_USB_DEV_DIEPINT11_BNAINTR register field value suitable for setting the register. */
77480 #define ALT_USB_DEV_DIEPINT11_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
77481 
77482 /*
77483  * Field : Packet Drop Status - pktdrpsts
77484  *
77485  * This bit indicates to the application that an ISOC OUT packet has been dropped.
77486  * This bit does not have an associated mask bit and does not generate an
77487  * interrupt.
77488  *
77489  * Field Enumeration Values:
77490  *
77491  * Enum | Value | Description
77492  * :----------------------------------------|:------|:-----------------------------
77493  * ALT_USB_DEV_DIEPINT11_PKTDRPSTS_E_INACT | 0x0 | No interrupt
77494  * ALT_USB_DEV_DIEPINT11_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
77495  *
77496  * Field Access Macros:
77497  *
77498  */
77499 /*
77500  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_PKTDRPSTS
77501  *
77502  * No interrupt
77503  */
77504 #define ALT_USB_DEV_DIEPINT11_PKTDRPSTS_E_INACT 0x0
77505 /*
77506  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_PKTDRPSTS
77507  *
77508  * Packet Drop Status interrupt
77509  */
77510 #define ALT_USB_DEV_DIEPINT11_PKTDRPSTS_E_ACT 0x1
77511 
77512 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_PKTDRPSTS register field. */
77513 #define ALT_USB_DEV_DIEPINT11_PKTDRPSTS_LSB 11
77514 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_PKTDRPSTS register field. */
77515 #define ALT_USB_DEV_DIEPINT11_PKTDRPSTS_MSB 11
77516 /* The width in bits of the ALT_USB_DEV_DIEPINT11_PKTDRPSTS register field. */
77517 #define ALT_USB_DEV_DIEPINT11_PKTDRPSTS_WIDTH 1
77518 /* The mask used to set the ALT_USB_DEV_DIEPINT11_PKTDRPSTS register field value. */
77519 #define ALT_USB_DEV_DIEPINT11_PKTDRPSTS_SET_MSK 0x00000800
77520 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_PKTDRPSTS register field value. */
77521 #define ALT_USB_DEV_DIEPINT11_PKTDRPSTS_CLR_MSK 0xfffff7ff
77522 /* The reset value of the ALT_USB_DEV_DIEPINT11_PKTDRPSTS register field. */
77523 #define ALT_USB_DEV_DIEPINT11_PKTDRPSTS_RESET 0x0
77524 /* Extracts the ALT_USB_DEV_DIEPINT11_PKTDRPSTS field value from a register. */
77525 #define ALT_USB_DEV_DIEPINT11_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
77526 /* Produces a ALT_USB_DEV_DIEPINT11_PKTDRPSTS register field value suitable for setting the register. */
77527 #define ALT_USB_DEV_DIEPINT11_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
77528 
77529 /*
77530  * Field : BbleErr Interrupt - bbleerr
77531  *
77532  * The core generates this interrupt when babble is received for the endpoint.
77533  *
77534  * Field Enumeration Values:
77535  *
77536  * Enum | Value | Description
77537  * :--------------------------------------|:------|:------------------
77538  * ALT_USB_DEV_DIEPINT11_BBLEERR_E_INACT | 0x0 | No interrupt
77539  * ALT_USB_DEV_DIEPINT11_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
77540  *
77541  * Field Access Macros:
77542  *
77543  */
77544 /*
77545  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_BBLEERR
77546  *
77547  * No interrupt
77548  */
77549 #define ALT_USB_DEV_DIEPINT11_BBLEERR_E_INACT 0x0
77550 /*
77551  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_BBLEERR
77552  *
77553  * BbleErr interrupt
77554  */
77555 #define ALT_USB_DEV_DIEPINT11_BBLEERR_E_ACT 0x1
77556 
77557 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_BBLEERR register field. */
77558 #define ALT_USB_DEV_DIEPINT11_BBLEERR_LSB 12
77559 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_BBLEERR register field. */
77560 #define ALT_USB_DEV_DIEPINT11_BBLEERR_MSB 12
77561 /* The width in bits of the ALT_USB_DEV_DIEPINT11_BBLEERR register field. */
77562 #define ALT_USB_DEV_DIEPINT11_BBLEERR_WIDTH 1
77563 /* The mask used to set the ALT_USB_DEV_DIEPINT11_BBLEERR register field value. */
77564 #define ALT_USB_DEV_DIEPINT11_BBLEERR_SET_MSK 0x00001000
77565 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_BBLEERR register field value. */
77566 #define ALT_USB_DEV_DIEPINT11_BBLEERR_CLR_MSK 0xffffefff
77567 /* The reset value of the ALT_USB_DEV_DIEPINT11_BBLEERR register field. */
77568 #define ALT_USB_DEV_DIEPINT11_BBLEERR_RESET 0x0
77569 /* Extracts the ALT_USB_DEV_DIEPINT11_BBLEERR field value from a register. */
77570 #define ALT_USB_DEV_DIEPINT11_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
77571 /* Produces a ALT_USB_DEV_DIEPINT11_BBLEERR register field value suitable for setting the register. */
77572 #define ALT_USB_DEV_DIEPINT11_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
77573 
77574 /*
77575  * Field : NAK Interrupt - nakintrpt
77576  *
77577  * The core generates this interrupt when a NAK is transmitted or received by the
77578  * device. In case of isochronous IN endpoints the interrupt gets generated when a
77579  * zero length packet is transmitted due to un-availability of data in the TXFifo.
77580  *
77581  * Field Enumeration Values:
77582  *
77583  * Enum | Value | Description
77584  * :----------------------------------------|:------|:--------------
77585  * ALT_USB_DEV_DIEPINT11_NAKINTRPT_E_INACT | 0x0 | No interrupt
77586  * ALT_USB_DEV_DIEPINT11_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
77587  *
77588  * Field Access Macros:
77589  *
77590  */
77591 /*
77592  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_NAKINTRPT
77593  *
77594  * No interrupt
77595  */
77596 #define ALT_USB_DEV_DIEPINT11_NAKINTRPT_E_INACT 0x0
77597 /*
77598  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_NAKINTRPT
77599  *
77600  * NAK Interrupt
77601  */
77602 #define ALT_USB_DEV_DIEPINT11_NAKINTRPT_E_ACT 0x1
77603 
77604 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_NAKINTRPT register field. */
77605 #define ALT_USB_DEV_DIEPINT11_NAKINTRPT_LSB 13
77606 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_NAKINTRPT register field. */
77607 #define ALT_USB_DEV_DIEPINT11_NAKINTRPT_MSB 13
77608 /* The width in bits of the ALT_USB_DEV_DIEPINT11_NAKINTRPT register field. */
77609 #define ALT_USB_DEV_DIEPINT11_NAKINTRPT_WIDTH 1
77610 /* The mask used to set the ALT_USB_DEV_DIEPINT11_NAKINTRPT register field value. */
77611 #define ALT_USB_DEV_DIEPINT11_NAKINTRPT_SET_MSK 0x00002000
77612 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_NAKINTRPT register field value. */
77613 #define ALT_USB_DEV_DIEPINT11_NAKINTRPT_CLR_MSK 0xffffdfff
77614 /* The reset value of the ALT_USB_DEV_DIEPINT11_NAKINTRPT register field. */
77615 #define ALT_USB_DEV_DIEPINT11_NAKINTRPT_RESET 0x0
77616 /* Extracts the ALT_USB_DEV_DIEPINT11_NAKINTRPT field value from a register. */
77617 #define ALT_USB_DEV_DIEPINT11_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
77618 /* Produces a ALT_USB_DEV_DIEPINT11_NAKINTRPT register field value suitable for setting the register. */
77619 #define ALT_USB_DEV_DIEPINT11_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
77620 
77621 /*
77622  * Field : NYET Interrupt - nyetintrpt
77623  *
77624  * The core generates this interrupt when a NYET response is transmitted for a non
77625  * isochronous OUT endpoint.
77626  *
77627  * Field Enumeration Values:
77628  *
77629  * Enum | Value | Description
77630  * :-----------------------------------------|:------|:---------------
77631  * ALT_USB_DEV_DIEPINT11_NYETINTRPT_E_INACT | 0x0 | No interrupt
77632  * ALT_USB_DEV_DIEPINT11_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
77633  *
77634  * Field Access Macros:
77635  *
77636  */
77637 /*
77638  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_NYETINTRPT
77639  *
77640  * No interrupt
77641  */
77642 #define ALT_USB_DEV_DIEPINT11_NYETINTRPT_E_INACT 0x0
77643 /*
77644  * Enumerated value for register field ALT_USB_DEV_DIEPINT11_NYETINTRPT
77645  *
77646  * NYET Interrupt
77647  */
77648 #define ALT_USB_DEV_DIEPINT11_NYETINTRPT_E_ACT 0x1
77649 
77650 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT11_NYETINTRPT register field. */
77651 #define ALT_USB_DEV_DIEPINT11_NYETINTRPT_LSB 14
77652 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT11_NYETINTRPT register field. */
77653 #define ALT_USB_DEV_DIEPINT11_NYETINTRPT_MSB 14
77654 /* The width in bits of the ALT_USB_DEV_DIEPINT11_NYETINTRPT register field. */
77655 #define ALT_USB_DEV_DIEPINT11_NYETINTRPT_WIDTH 1
77656 /* The mask used to set the ALT_USB_DEV_DIEPINT11_NYETINTRPT register field value. */
77657 #define ALT_USB_DEV_DIEPINT11_NYETINTRPT_SET_MSK 0x00004000
77658 /* The mask used to clear the ALT_USB_DEV_DIEPINT11_NYETINTRPT register field value. */
77659 #define ALT_USB_DEV_DIEPINT11_NYETINTRPT_CLR_MSK 0xffffbfff
77660 /* The reset value of the ALT_USB_DEV_DIEPINT11_NYETINTRPT register field. */
77661 #define ALT_USB_DEV_DIEPINT11_NYETINTRPT_RESET 0x0
77662 /* Extracts the ALT_USB_DEV_DIEPINT11_NYETINTRPT field value from a register. */
77663 #define ALT_USB_DEV_DIEPINT11_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
77664 /* Produces a ALT_USB_DEV_DIEPINT11_NYETINTRPT register field value suitable for setting the register. */
77665 #define ALT_USB_DEV_DIEPINT11_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
77666 
77667 #ifndef __ASSEMBLY__
77668 /*
77669  * WARNING: The C register and register group struct declarations are provided for
77670  * convenience and illustrative purposes. They should, however, be used with
77671  * caution as the C language standard provides no guarantees about the alignment or
77672  * atomicity of device memory accesses. The recommended practice for writing
77673  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
77674  * alt_write_word() functions.
77675  *
77676  * The struct declaration for register ALT_USB_DEV_DIEPINT11.
77677  */
77678 struct ALT_USB_DEV_DIEPINT11_s
77679 {
77680  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
77681  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
77682  const uint32_t ahberr : 1; /* AHB Error */
77683  const uint32_t timeout : 1; /* Timeout Condition */
77684  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
77685  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
77686  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
77687  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
77688  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
77689  const uint32_t bnaintr : 1; /* BNA Interrupt */
77690  uint32_t : 1; /* *UNDEFINED* */
77691  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
77692  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
77693  const uint32_t nakintrpt : 1; /* NAK Interrupt */
77694  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
77695  uint32_t : 17; /* *UNDEFINED* */
77696 };
77697 
77698 /* The typedef declaration for register ALT_USB_DEV_DIEPINT11. */
77699 typedef volatile struct ALT_USB_DEV_DIEPINT11_s ALT_USB_DEV_DIEPINT11_t;
77700 #endif /* __ASSEMBLY__ */
77701 
77702 /* The byte offset of the ALT_USB_DEV_DIEPINT11 register from the beginning of the component. */
77703 #define ALT_USB_DEV_DIEPINT11_OFST 0x268
77704 /* The address of the ALT_USB_DEV_DIEPINT11 register. */
77705 #define ALT_USB_DEV_DIEPINT11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT11_OFST))
77706 
77707 /*
77708  * Register : Device IN Endpoint 11 Transfer Size Register - dieptsiz11
77709  *
77710  * The application must modify this register before enabling the endpoint. Once the
77711  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
77712  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
77713  * application can only read this register once the core has cleared the Endpoint
77714  * Enable bit.
77715  *
77716  * Register Layout
77717  *
77718  * Bits | Access | Reset | Description
77719  * :--------|:-------|:------|:----------------------------
77720  * [18:0] | RW | 0x0 | Transfer Size
77721  * [28:19] | RW | 0x0 | Packet Count
77722  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
77723  * [31] | ??? | 0x0 | *UNDEFINED*
77724  *
77725  */
77726 /*
77727  * Field : Transfer Size - xfersize
77728  *
77729  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
77730  * application only after it has exhausted the transfer size amount of data. The
77731  * transfer size can be Set to the maximum packet size of the endpoint, to be
77732  * interrupted at the end of each packet. The core decrements this field every time
77733  * a packet from the external memory is written to the TxFIFO.
77734  *
77735  * Field Access Macros:
77736  *
77737  */
77738 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ11_XFERSIZE register field. */
77739 #define ALT_USB_DEV_DIEPTSIZ11_XFERSIZE_LSB 0
77740 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ11_XFERSIZE register field. */
77741 #define ALT_USB_DEV_DIEPTSIZ11_XFERSIZE_MSB 18
77742 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ11_XFERSIZE register field. */
77743 #define ALT_USB_DEV_DIEPTSIZ11_XFERSIZE_WIDTH 19
77744 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ11_XFERSIZE register field value. */
77745 #define ALT_USB_DEV_DIEPTSIZ11_XFERSIZE_SET_MSK 0x0007ffff
77746 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ11_XFERSIZE register field value. */
77747 #define ALT_USB_DEV_DIEPTSIZ11_XFERSIZE_CLR_MSK 0xfff80000
77748 /* The reset value of the ALT_USB_DEV_DIEPTSIZ11_XFERSIZE register field. */
77749 #define ALT_USB_DEV_DIEPTSIZ11_XFERSIZE_RESET 0x0
77750 /* Extracts the ALT_USB_DEV_DIEPTSIZ11_XFERSIZE field value from a register. */
77751 #define ALT_USB_DEV_DIEPTSIZ11_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
77752 /* Produces a ALT_USB_DEV_DIEPTSIZ11_XFERSIZE register field value suitable for setting the register. */
77753 #define ALT_USB_DEV_DIEPTSIZ11_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
77754 
77755 /*
77756  * Field : Packet Count - PktCnt
77757  *
77758  * Indicates the total number of USB packets that constitute the Transfer Size
77759  * amount of data for endpoint 0.This field is decremented every time a packet
77760  * (maximum size or short packet) is read from the TxFIFO.
77761  *
77762  * Field Access Macros:
77763  *
77764  */
77765 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ11_PKTCNT register field. */
77766 #define ALT_USB_DEV_DIEPTSIZ11_PKTCNT_LSB 19
77767 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ11_PKTCNT register field. */
77768 #define ALT_USB_DEV_DIEPTSIZ11_PKTCNT_MSB 28
77769 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ11_PKTCNT register field. */
77770 #define ALT_USB_DEV_DIEPTSIZ11_PKTCNT_WIDTH 10
77771 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ11_PKTCNT register field value. */
77772 #define ALT_USB_DEV_DIEPTSIZ11_PKTCNT_SET_MSK 0x1ff80000
77773 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ11_PKTCNT register field value. */
77774 #define ALT_USB_DEV_DIEPTSIZ11_PKTCNT_CLR_MSK 0xe007ffff
77775 /* The reset value of the ALT_USB_DEV_DIEPTSIZ11_PKTCNT register field. */
77776 #define ALT_USB_DEV_DIEPTSIZ11_PKTCNT_RESET 0x0
77777 /* Extracts the ALT_USB_DEV_DIEPTSIZ11_PKTCNT field value from a register. */
77778 #define ALT_USB_DEV_DIEPTSIZ11_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
77779 /* Produces a ALT_USB_DEV_DIEPTSIZ11_PKTCNT register field value suitable for setting the register. */
77780 #define ALT_USB_DEV_DIEPTSIZ11_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
77781 
77782 /*
77783  * Field : Applies to IN endpoints onl - mc
77784  *
77785  * for periodic IN endpoints, this field indicates the number of packets that must
77786  * be transmitted per microframe on the USB. The core uses this field to calculate
77787  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
77788  * field is valid only in Internal DMA mode. It specifies the number of packets the
77789  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
77790  * by the Next Endpoint field of the Device Endpoint-n Control register
77791  * (DIEPCTLn.NextEp)
77792  *
77793  * Field Enumeration Values:
77794  *
77795  * Enum | Value | Description
77796  * :-------------------------------------|:------|:------------
77797  * ALT_USB_DEV_DIEPTSIZ11_MC_E_PKTONE | 0x1 | 1 packet
77798  * ALT_USB_DEV_DIEPTSIZ11_MC_E_PKTTWO | 0x2 | 2 packets
77799  * ALT_USB_DEV_DIEPTSIZ11_MC_E_PKTTHREE | 0x3 | 3 packets
77800  *
77801  * Field Access Macros:
77802  *
77803  */
77804 /*
77805  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ11_MC
77806  *
77807  * 1 packet
77808  */
77809 #define ALT_USB_DEV_DIEPTSIZ11_MC_E_PKTONE 0x1
77810 /*
77811  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ11_MC
77812  *
77813  * 2 packets
77814  */
77815 #define ALT_USB_DEV_DIEPTSIZ11_MC_E_PKTTWO 0x2
77816 /*
77817  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ11_MC
77818  *
77819  * 3 packets
77820  */
77821 #define ALT_USB_DEV_DIEPTSIZ11_MC_E_PKTTHREE 0x3
77822 
77823 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ11_MC register field. */
77824 #define ALT_USB_DEV_DIEPTSIZ11_MC_LSB 29
77825 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ11_MC register field. */
77826 #define ALT_USB_DEV_DIEPTSIZ11_MC_MSB 30
77827 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ11_MC register field. */
77828 #define ALT_USB_DEV_DIEPTSIZ11_MC_WIDTH 2
77829 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ11_MC register field value. */
77830 #define ALT_USB_DEV_DIEPTSIZ11_MC_SET_MSK 0x60000000
77831 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ11_MC register field value. */
77832 #define ALT_USB_DEV_DIEPTSIZ11_MC_CLR_MSK 0x9fffffff
77833 /* The reset value of the ALT_USB_DEV_DIEPTSIZ11_MC register field. */
77834 #define ALT_USB_DEV_DIEPTSIZ11_MC_RESET 0x0
77835 /* Extracts the ALT_USB_DEV_DIEPTSIZ11_MC field value from a register. */
77836 #define ALT_USB_DEV_DIEPTSIZ11_MC_GET(value) (((value) & 0x60000000) >> 29)
77837 /* Produces a ALT_USB_DEV_DIEPTSIZ11_MC register field value suitable for setting the register. */
77838 #define ALT_USB_DEV_DIEPTSIZ11_MC_SET(value) (((value) << 29) & 0x60000000)
77839 
77840 #ifndef __ASSEMBLY__
77841 /*
77842  * WARNING: The C register and register group struct declarations are provided for
77843  * convenience and illustrative purposes. They should, however, be used with
77844  * caution as the C language standard provides no guarantees about the alignment or
77845  * atomicity of device memory accesses. The recommended practice for writing
77846  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
77847  * alt_write_word() functions.
77848  *
77849  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ11.
77850  */
77851 struct ALT_USB_DEV_DIEPTSIZ11_s
77852 {
77853  uint32_t xfersize : 19; /* Transfer Size */
77854  uint32_t PktCnt : 10; /* Packet Count */
77855  uint32_t mc : 2; /* Applies to IN endpoints onl */
77856  uint32_t : 1; /* *UNDEFINED* */
77857 };
77858 
77859 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ11. */
77860 typedef volatile struct ALT_USB_DEV_DIEPTSIZ11_s ALT_USB_DEV_DIEPTSIZ11_t;
77861 #endif /* __ASSEMBLY__ */
77862 
77863 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ11 register from the beginning of the component. */
77864 #define ALT_USB_DEV_DIEPTSIZ11_OFST 0x270
77865 /* The address of the ALT_USB_DEV_DIEPTSIZ11 register. */
77866 #define ALT_USB_DEV_DIEPTSIZ11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ11_OFST))
77867 
77868 /*
77869  * Register : Device IN Endpoint 11 DMA Address Register - diepdma11
77870  *
77871  * DMA Addressing.
77872  *
77873  * Register Layout
77874  *
77875  * Bits | Access | Reset | Description
77876  * :-------|:-------|:--------|:------------
77877  * [31:0] | RW | Unknown | DMA Address
77878  *
77879  */
77880 /*
77881  * Field : DMA Address - diepdma11
77882  *
77883  * Holds the start address of the external memory for storing or fetching endpoint
77884  * data. for control endpoints, this field stores control OUT data packets as well
77885  * as SETUP transaction data packets. When more than three SETUP packets are
77886  * received back-to-back, the SETUP data packet in the memory is overwritten. This
77887  * register is incremented on every AHB transaction. The application can give only
77888  * a DWORD-aligned address.
77889  *
77890  * When Scatter/Gather DMA mode is not enabled, the application programs the start
77891  * address value in this field.
77892  *
77893  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
77894  * for the descriptor list.
77895  *
77896  * Field Access Macros:
77897  *
77898  */
77899 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA11_DIEPDMA11 register field. */
77900 #define ALT_USB_DEV_DIEPDMA11_DIEPDMA11_LSB 0
77901 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA11_DIEPDMA11 register field. */
77902 #define ALT_USB_DEV_DIEPDMA11_DIEPDMA11_MSB 31
77903 /* The width in bits of the ALT_USB_DEV_DIEPDMA11_DIEPDMA11 register field. */
77904 #define ALT_USB_DEV_DIEPDMA11_DIEPDMA11_WIDTH 32
77905 /* The mask used to set the ALT_USB_DEV_DIEPDMA11_DIEPDMA11 register field value. */
77906 #define ALT_USB_DEV_DIEPDMA11_DIEPDMA11_SET_MSK 0xffffffff
77907 /* The mask used to clear the ALT_USB_DEV_DIEPDMA11_DIEPDMA11 register field value. */
77908 #define ALT_USB_DEV_DIEPDMA11_DIEPDMA11_CLR_MSK 0x00000000
77909 /* The reset value of the ALT_USB_DEV_DIEPDMA11_DIEPDMA11 register field is UNKNOWN. */
77910 #define ALT_USB_DEV_DIEPDMA11_DIEPDMA11_RESET 0x0
77911 /* Extracts the ALT_USB_DEV_DIEPDMA11_DIEPDMA11 field value from a register. */
77912 #define ALT_USB_DEV_DIEPDMA11_DIEPDMA11_GET(value) (((value) & 0xffffffff) >> 0)
77913 /* Produces a ALT_USB_DEV_DIEPDMA11_DIEPDMA11 register field value suitable for setting the register. */
77914 #define ALT_USB_DEV_DIEPDMA11_DIEPDMA11_SET(value) (((value) << 0) & 0xffffffff)
77915 
77916 #ifndef __ASSEMBLY__
77917 /*
77918  * WARNING: The C register and register group struct declarations are provided for
77919  * convenience and illustrative purposes. They should, however, be used with
77920  * caution as the C language standard provides no guarantees about the alignment or
77921  * atomicity of device memory accesses. The recommended practice for writing
77922  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
77923  * alt_write_word() functions.
77924  *
77925  * The struct declaration for register ALT_USB_DEV_DIEPDMA11.
77926  */
77927 struct ALT_USB_DEV_DIEPDMA11_s
77928 {
77929  uint32_t diepdma11 : 32; /* DMA Address */
77930 };
77931 
77932 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA11. */
77933 typedef volatile struct ALT_USB_DEV_DIEPDMA11_s ALT_USB_DEV_DIEPDMA11_t;
77934 #endif /* __ASSEMBLY__ */
77935 
77936 /* The byte offset of the ALT_USB_DEV_DIEPDMA11 register from the beginning of the component. */
77937 #define ALT_USB_DEV_DIEPDMA11_OFST 0x274
77938 /* The address of the ALT_USB_DEV_DIEPDMA11 register. */
77939 #define ALT_USB_DEV_DIEPDMA11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA11_OFST))
77940 
77941 /*
77942  * Register : Device IN Endpoint Transmit FIFO Status Register 11 - dtxfsts11
77943  *
77944  * This register contains the free space information for the Device IN endpoint
77945  * TxFIFO.
77946  *
77947  * Register Layout
77948  *
77949  * Bits | Access | Reset | Description
77950  * :--------|:-------|:-------|:-------------------------------
77951  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
77952  * [31:16] | ??? | 0x0 | *UNDEFINED*
77953  *
77954  */
77955 /*
77956  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
77957  *
77958  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
77959  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
77960  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
77961  * 32,768 words available Others: Reserved
77962  *
77963  * Field Access Macros:
77964  *
77965  */
77966 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL register field. */
77967 #define ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL_LSB 0
77968 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL register field. */
77969 #define ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL_MSB 15
77970 /* The width in bits of the ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL register field. */
77971 #define ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL_WIDTH 16
77972 /* The mask used to set the ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL register field value. */
77973 #define ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
77974 /* The mask used to clear the ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL register field value. */
77975 #define ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
77976 /* The reset value of the ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL register field. */
77977 #define ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL_RESET 0x2000
77978 /* Extracts the ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL field value from a register. */
77979 #define ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
77980 /* Produces a ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL register field value suitable for setting the register. */
77981 #define ALT_USB_DEV_DTXFSTS11_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
77982 
77983 #ifndef __ASSEMBLY__
77984 /*
77985  * WARNING: The C register and register group struct declarations are provided for
77986  * convenience and illustrative purposes. They should, however, be used with
77987  * caution as the C language standard provides no guarantees about the alignment or
77988  * atomicity of device memory accesses. The recommended practice for writing
77989  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
77990  * alt_write_word() functions.
77991  *
77992  * The struct declaration for register ALT_USB_DEV_DTXFSTS11.
77993  */
77994 struct ALT_USB_DEV_DTXFSTS11_s
77995 {
77996  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
77997  uint32_t : 16; /* *UNDEFINED* */
77998 };
77999 
78000 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS11. */
78001 typedef volatile struct ALT_USB_DEV_DTXFSTS11_s ALT_USB_DEV_DTXFSTS11_t;
78002 #endif /* __ASSEMBLY__ */
78003 
78004 /* The byte offset of the ALT_USB_DEV_DTXFSTS11 register from the beginning of the component. */
78005 #define ALT_USB_DEV_DTXFSTS11_OFST 0x278
78006 /* The address of the ALT_USB_DEV_DTXFSTS11 register. */
78007 #define ALT_USB_DEV_DTXFSTS11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS11_OFST))
78008 
78009 /*
78010  * Register : Device IN Endpoint 11 DMA Buffer Address Register - diepdmab11
78011  *
78012  * DMA Buffer Address.
78013  *
78014  * Register Layout
78015  *
78016  * Bits | Access | Reset | Description
78017  * :-------|:-------|:--------|:-------------------
78018  * [31:0] | R | Unknown | DMA Buffer Address
78019  *
78020  */
78021 /*
78022  * Field : DMA Buffer Address - diepdmab11
78023  *
78024  * Holds the current buffer address. This register is updated as and when the data
78025  * transfer for the corresponding end point is in progress. This register is
78026  * present only in Scatter/Gather DMA mode.
78027  *
78028  * Field Access Macros:
78029  *
78030  */
78031 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11 register field. */
78032 #define ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11_LSB 0
78033 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11 register field. */
78034 #define ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11_MSB 31
78035 /* The width in bits of the ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11 register field. */
78036 #define ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11_WIDTH 32
78037 /* The mask used to set the ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11 register field value. */
78038 #define ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11_SET_MSK 0xffffffff
78039 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11 register field value. */
78040 #define ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11_CLR_MSK 0x00000000
78041 /* The reset value of the ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11 register field is UNKNOWN. */
78042 #define ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11_RESET 0x0
78043 /* Extracts the ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11 field value from a register. */
78044 #define ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11_GET(value) (((value) & 0xffffffff) >> 0)
78045 /* Produces a ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11 register field value suitable for setting the register. */
78046 #define ALT_USB_DEV_DIEPDMAB11_DIEPDMAB11_SET(value) (((value) << 0) & 0xffffffff)
78047 
78048 #ifndef __ASSEMBLY__
78049 /*
78050  * WARNING: The C register and register group struct declarations are provided for
78051  * convenience and illustrative purposes. They should, however, be used with
78052  * caution as the C language standard provides no guarantees about the alignment or
78053  * atomicity of device memory accesses. The recommended practice for writing
78054  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
78055  * alt_write_word() functions.
78056  *
78057  * The struct declaration for register ALT_USB_DEV_DIEPDMAB11.
78058  */
78059 struct ALT_USB_DEV_DIEPDMAB11_s
78060 {
78061  const uint32_t diepdmab11 : 32; /* DMA Buffer Address */
78062 };
78063 
78064 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB11. */
78065 typedef volatile struct ALT_USB_DEV_DIEPDMAB11_s ALT_USB_DEV_DIEPDMAB11_t;
78066 #endif /* __ASSEMBLY__ */
78067 
78068 /* The byte offset of the ALT_USB_DEV_DIEPDMAB11 register from the beginning of the component. */
78069 #define ALT_USB_DEV_DIEPDMAB11_OFST 0x27c
78070 /* The address of the ALT_USB_DEV_DIEPDMAB11 register. */
78071 #define ALT_USB_DEV_DIEPDMAB11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB11_OFST))
78072 
78073 /*
78074  * Register : Device Control IN Endpoint 12 Control Register - diepctl12
78075  *
78076  * Endpoint_number: 12
78077  *
78078  * Register Layout
78079  *
78080  * Bits | Access | Reset | Description
78081  * :--------|:-------|:------|:--------------------
78082  * [10:0] | RW | 0x0 | Maximum Packet Size
78083  * [14:11] | ??? | 0x0 | *UNDEFINED*
78084  * [15] | RW | 0x0 | USB Active Endpoint
78085  * [16] | R | 0x0 | Endpoint Data PID
78086  * [17] | R | 0x0 | NAK Status
78087  * [19:18] | RW | 0x0 | Endpoint Type
78088  * [20] | ??? | 0x0 | *UNDEFINED*
78089  * [21] | R | 0x0 | STALL Handshake
78090  * [25:22] | RW | 0x0 | TxFIFO Number
78091  * [26] | W | 0x0 | Clear NAK
78092  * [27] | W | 0x0 | Set NAK
78093  * [28] | W | 0x0 | Set DATA0 PID
78094  * [29] | W | 0x0 | Set DATA1 PID
78095  * [30] | R | 0x0 | Endpoint Disable
78096  * [31] | R | 0x0 | Endpoint Enable
78097  *
78098  */
78099 /*
78100  * Field : Maximum Packet Size - mps
78101  *
78102  * Applies to IN and OUT endpoints. The application must program this field with
78103  * the maximum packet size for the current logical endpoint. This value is in
78104  * bytes.
78105  *
78106  * Field Access Macros:
78107  *
78108  */
78109 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_MPS register field. */
78110 #define ALT_USB_DEV_DIEPCTL12_MPS_LSB 0
78111 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_MPS register field. */
78112 #define ALT_USB_DEV_DIEPCTL12_MPS_MSB 10
78113 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_MPS register field. */
78114 #define ALT_USB_DEV_DIEPCTL12_MPS_WIDTH 11
78115 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_MPS register field value. */
78116 #define ALT_USB_DEV_DIEPCTL12_MPS_SET_MSK 0x000007ff
78117 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_MPS register field value. */
78118 #define ALT_USB_DEV_DIEPCTL12_MPS_CLR_MSK 0xfffff800
78119 /* The reset value of the ALT_USB_DEV_DIEPCTL12_MPS register field. */
78120 #define ALT_USB_DEV_DIEPCTL12_MPS_RESET 0x0
78121 /* Extracts the ALT_USB_DEV_DIEPCTL12_MPS field value from a register. */
78122 #define ALT_USB_DEV_DIEPCTL12_MPS_GET(value) (((value) & 0x000007ff) >> 0)
78123 /* Produces a ALT_USB_DEV_DIEPCTL12_MPS register field value suitable for setting the register. */
78124 #define ALT_USB_DEV_DIEPCTL12_MPS_SET(value) (((value) << 0) & 0x000007ff)
78125 
78126 /*
78127  * Field : USB Active Endpoint - usbactep
78128  *
78129  * Indicates whether this endpoint is active in the current configuration and
78130  * interface. The core clears this bit for all endpoints (other than EP 0) after
78131  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
78132  * commands, the application must program endpoint registers accordingly and set
78133  * this bit.
78134  *
78135  * Field Enumeration Values:
78136  *
78137  * Enum | Value | Description
78138  * :--------------------------------------|:------|:--------------------
78139  * ALT_USB_DEV_DIEPCTL12_USBACTEP_E_DISD | 0x0 | Not Active
78140  * ALT_USB_DEV_DIEPCTL12_USBACTEP_E_END | 0x1 | USB Active Endpoint
78141  *
78142  * Field Access Macros:
78143  *
78144  */
78145 /*
78146  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_USBACTEP
78147  *
78148  * Not Active
78149  */
78150 #define ALT_USB_DEV_DIEPCTL12_USBACTEP_E_DISD 0x0
78151 /*
78152  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_USBACTEP
78153  *
78154  * USB Active Endpoint
78155  */
78156 #define ALT_USB_DEV_DIEPCTL12_USBACTEP_E_END 0x1
78157 
78158 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_USBACTEP register field. */
78159 #define ALT_USB_DEV_DIEPCTL12_USBACTEP_LSB 15
78160 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_USBACTEP register field. */
78161 #define ALT_USB_DEV_DIEPCTL12_USBACTEP_MSB 15
78162 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_USBACTEP register field. */
78163 #define ALT_USB_DEV_DIEPCTL12_USBACTEP_WIDTH 1
78164 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_USBACTEP register field value. */
78165 #define ALT_USB_DEV_DIEPCTL12_USBACTEP_SET_MSK 0x00008000
78166 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_USBACTEP register field value. */
78167 #define ALT_USB_DEV_DIEPCTL12_USBACTEP_CLR_MSK 0xffff7fff
78168 /* The reset value of the ALT_USB_DEV_DIEPCTL12_USBACTEP register field. */
78169 #define ALT_USB_DEV_DIEPCTL12_USBACTEP_RESET 0x0
78170 /* Extracts the ALT_USB_DEV_DIEPCTL12_USBACTEP field value from a register. */
78171 #define ALT_USB_DEV_DIEPCTL12_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
78172 /* Produces a ALT_USB_DEV_DIEPCTL12_USBACTEP register field value suitable for setting the register. */
78173 #define ALT_USB_DEV_DIEPCTL12_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
78174 
78175 /*
78176  * Field : Endpoint Data PID - dpid
78177  *
78178  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
78179  * packet to be received or transmitted on this endpoint. The application must
78180  * program the PID of the first packet to be received or transmitted on this
78181  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
78182  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
78183  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
78184  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
78185  * DMA mode:
78186  *
78187  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
78188  * number in which the core transmits/receives isochronous data for this endpoint.
78189  * The application must program the even/odd (micro) frame number in which it
78190  * intends to transmit/receive isochronous data for this endpoint using the
78191  * SetEvnFr and SetOddFr fields in this register.
78192  *
78193  * 0: Even (micro)frame
78194  *
78195  * 1: Odd (micro)frame
78196  *
78197  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
78198  * number in which to send data is provided in the transmit descriptor structure.
78199  * The frame in which data is received is updated in receive descriptor structure.
78200  *
78201  * Field Enumeration Values:
78202  *
78203  * Enum | Value | Description
78204  * :-----------------------------------|:------|:-----------------------------
78205  * ALT_USB_DEV_DIEPCTL12_DPID_E_INACT | 0x0 | Endpoint Data PID not active
78206  * ALT_USB_DEV_DIEPCTL12_DPID_E_ACT | 0x1 | Endpoint Data PID active
78207  *
78208  * Field Access Macros:
78209  *
78210  */
78211 /*
78212  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_DPID
78213  *
78214  * Endpoint Data PID not active
78215  */
78216 #define ALT_USB_DEV_DIEPCTL12_DPID_E_INACT 0x0
78217 /*
78218  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_DPID
78219  *
78220  * Endpoint Data PID active
78221  */
78222 #define ALT_USB_DEV_DIEPCTL12_DPID_E_ACT 0x1
78223 
78224 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_DPID register field. */
78225 #define ALT_USB_DEV_DIEPCTL12_DPID_LSB 16
78226 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_DPID register field. */
78227 #define ALT_USB_DEV_DIEPCTL12_DPID_MSB 16
78228 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_DPID register field. */
78229 #define ALT_USB_DEV_DIEPCTL12_DPID_WIDTH 1
78230 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_DPID register field value. */
78231 #define ALT_USB_DEV_DIEPCTL12_DPID_SET_MSK 0x00010000
78232 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_DPID register field value. */
78233 #define ALT_USB_DEV_DIEPCTL12_DPID_CLR_MSK 0xfffeffff
78234 /* The reset value of the ALT_USB_DEV_DIEPCTL12_DPID register field. */
78235 #define ALT_USB_DEV_DIEPCTL12_DPID_RESET 0x0
78236 /* Extracts the ALT_USB_DEV_DIEPCTL12_DPID field value from a register. */
78237 #define ALT_USB_DEV_DIEPCTL12_DPID_GET(value) (((value) & 0x00010000) >> 16)
78238 /* Produces a ALT_USB_DEV_DIEPCTL12_DPID register field value suitable for setting the register. */
78239 #define ALT_USB_DEV_DIEPCTL12_DPID_SET(value) (((value) << 16) & 0x00010000)
78240 
78241 /*
78242  * Field : NAK Status - naksts
78243  *
78244  * When either the application or the core sets this bit:
78245  *
78246  * * The core stops receiving any data on an OUT endpoint, even if there is space
78247  * in the RxFIFO to accommodate the incoming packet.
78248  *
78249  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
78250  * IN endpoint, even if there data is available in the TxFIFO.
78251  *
78252  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
78253  * even if there data is available in the TxFIFO.
78254  *
78255  * Irrespective of this bit's setting, the core always responds to SETUP data
78256  * packets with an ACK handshake.
78257  *
78258  * Field Enumeration Values:
78259  *
78260  * Enum | Value | Description
78261  * :--------------------------------------|:------|:------------------------------------------------
78262  * ALT_USB_DEV_DIEPCTL12_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
78263  * : | | based on the FIFO status
78264  * ALT_USB_DEV_DIEPCTL12_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
78265  * : | | endpoint
78266  *
78267  * Field Access Macros:
78268  *
78269  */
78270 /*
78271  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_NAKSTS
78272  *
78273  * The core is transmitting non-NAK handshakes based on the FIFO status
78274  */
78275 #define ALT_USB_DEV_DIEPCTL12_NAKSTS_E_NONNAK 0x0
78276 /*
78277  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_NAKSTS
78278  *
78279  * The core is transmitting NAK handshakes on this endpoint
78280  */
78281 #define ALT_USB_DEV_DIEPCTL12_NAKSTS_E_NAK 0x1
78282 
78283 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_NAKSTS register field. */
78284 #define ALT_USB_DEV_DIEPCTL12_NAKSTS_LSB 17
78285 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_NAKSTS register field. */
78286 #define ALT_USB_DEV_DIEPCTL12_NAKSTS_MSB 17
78287 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_NAKSTS register field. */
78288 #define ALT_USB_DEV_DIEPCTL12_NAKSTS_WIDTH 1
78289 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_NAKSTS register field value. */
78290 #define ALT_USB_DEV_DIEPCTL12_NAKSTS_SET_MSK 0x00020000
78291 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_NAKSTS register field value. */
78292 #define ALT_USB_DEV_DIEPCTL12_NAKSTS_CLR_MSK 0xfffdffff
78293 /* The reset value of the ALT_USB_DEV_DIEPCTL12_NAKSTS register field. */
78294 #define ALT_USB_DEV_DIEPCTL12_NAKSTS_RESET 0x0
78295 /* Extracts the ALT_USB_DEV_DIEPCTL12_NAKSTS field value from a register. */
78296 #define ALT_USB_DEV_DIEPCTL12_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
78297 /* Produces a ALT_USB_DEV_DIEPCTL12_NAKSTS register field value suitable for setting the register. */
78298 #define ALT_USB_DEV_DIEPCTL12_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
78299 
78300 /*
78301  * Field : Endpoint Type - eptype
78302  *
78303  * This is the transfer type supported by this logical endpoint.
78304  *
78305  * Field Enumeration Values:
78306  *
78307  * Enum | Value | Description
78308  * :-------------------------------------------|:------|:------------
78309  * ALT_USB_DEV_DIEPCTL12_EPTYPE_E_CTL | 0x0 | Control
78310  * ALT_USB_DEV_DIEPCTL12_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
78311  * ALT_USB_DEV_DIEPCTL12_EPTYPE_E_BULK | 0x2 | Bulk
78312  * ALT_USB_DEV_DIEPCTL12_EPTYPE_E_INTERRUP | 0x3 | Interrupt
78313  *
78314  * Field Access Macros:
78315  *
78316  */
78317 /*
78318  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_EPTYPE
78319  *
78320  * Control
78321  */
78322 #define ALT_USB_DEV_DIEPCTL12_EPTYPE_E_CTL 0x0
78323 /*
78324  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_EPTYPE
78325  *
78326  * Isochronous
78327  */
78328 #define ALT_USB_DEV_DIEPCTL12_EPTYPE_E_ISOCHRONOUS 0x1
78329 /*
78330  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_EPTYPE
78331  *
78332  * Bulk
78333  */
78334 #define ALT_USB_DEV_DIEPCTL12_EPTYPE_E_BULK 0x2
78335 /*
78336  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_EPTYPE
78337  *
78338  * Interrupt
78339  */
78340 #define ALT_USB_DEV_DIEPCTL12_EPTYPE_E_INTERRUP 0x3
78341 
78342 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_EPTYPE register field. */
78343 #define ALT_USB_DEV_DIEPCTL12_EPTYPE_LSB 18
78344 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_EPTYPE register field. */
78345 #define ALT_USB_DEV_DIEPCTL12_EPTYPE_MSB 19
78346 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_EPTYPE register field. */
78347 #define ALT_USB_DEV_DIEPCTL12_EPTYPE_WIDTH 2
78348 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_EPTYPE register field value. */
78349 #define ALT_USB_DEV_DIEPCTL12_EPTYPE_SET_MSK 0x000c0000
78350 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_EPTYPE register field value. */
78351 #define ALT_USB_DEV_DIEPCTL12_EPTYPE_CLR_MSK 0xfff3ffff
78352 /* The reset value of the ALT_USB_DEV_DIEPCTL12_EPTYPE register field. */
78353 #define ALT_USB_DEV_DIEPCTL12_EPTYPE_RESET 0x0
78354 /* Extracts the ALT_USB_DEV_DIEPCTL12_EPTYPE field value from a register. */
78355 #define ALT_USB_DEV_DIEPCTL12_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
78356 /* Produces a ALT_USB_DEV_DIEPCTL12_EPTYPE register field value suitable for setting the register. */
78357 #define ALT_USB_DEV_DIEPCTL12_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
78358 
78359 /*
78360  * Field : STALL Handshake - stall
78361  *
78362  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
78363  * application sets this bit to stall all tokens from the USB host to this
78364  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
78365  * along with this bit, the STALL bit takes priority. Only the application can
78366  * clear this bit, never the core. Applies to control endpoints only. The
78367  * application can only set this bit, and the core clears it, when a SETUP token is
78368  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
78369  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
78370  * of this bit's setting, the core always responds to SETUP data packets with an
78371  * ACK handshake.
78372  *
78373  * Field Enumeration Values:
78374  *
78375  * Enum | Value | Description
78376  * :------------------------------------|:------|:----------------------------
78377  * ALT_USB_DEV_DIEPCTL12_STALL_E_INACT | 0x0 | STALL All Tokens not active
78378  * ALT_USB_DEV_DIEPCTL12_STALL_E_ACT | 0x1 | STALL All Tokens active
78379  *
78380  * Field Access Macros:
78381  *
78382  */
78383 /*
78384  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_STALL
78385  *
78386  * STALL All Tokens not active
78387  */
78388 #define ALT_USB_DEV_DIEPCTL12_STALL_E_INACT 0x0
78389 /*
78390  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_STALL
78391  *
78392  * STALL All Tokens active
78393  */
78394 #define ALT_USB_DEV_DIEPCTL12_STALL_E_ACT 0x1
78395 
78396 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_STALL register field. */
78397 #define ALT_USB_DEV_DIEPCTL12_STALL_LSB 21
78398 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_STALL register field. */
78399 #define ALT_USB_DEV_DIEPCTL12_STALL_MSB 21
78400 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_STALL register field. */
78401 #define ALT_USB_DEV_DIEPCTL12_STALL_WIDTH 1
78402 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_STALL register field value. */
78403 #define ALT_USB_DEV_DIEPCTL12_STALL_SET_MSK 0x00200000
78404 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_STALL register field value. */
78405 #define ALT_USB_DEV_DIEPCTL12_STALL_CLR_MSK 0xffdfffff
78406 /* The reset value of the ALT_USB_DEV_DIEPCTL12_STALL register field. */
78407 #define ALT_USB_DEV_DIEPCTL12_STALL_RESET 0x0
78408 /* Extracts the ALT_USB_DEV_DIEPCTL12_STALL field value from a register. */
78409 #define ALT_USB_DEV_DIEPCTL12_STALL_GET(value) (((value) & 0x00200000) >> 21)
78410 /* Produces a ALT_USB_DEV_DIEPCTL12_STALL register field value suitable for setting the register. */
78411 #define ALT_USB_DEV_DIEPCTL12_STALL_SET(value) (((value) << 21) & 0x00200000)
78412 
78413 /*
78414  * Field : TxFIFO Number - txfnum
78415  *
78416  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
78417  * endpoints must map this to the corresponding Periodic TxFIFO number.
78418  *
78419  * 4'h0: Non-Periodic TxFIFO
78420  *
78421  * Others: Specified Periodic TxFIFO.number
78422  *
78423  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
78424  * applications such as mass storage. The core treats an IN endpoint as a non-
78425  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
78426  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
78427  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
78428  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
78429  * This field is valid only for IN endpoints.
78430  *
78431  * Field Access Macros:
78432  *
78433  */
78434 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_TXFNUM register field. */
78435 #define ALT_USB_DEV_DIEPCTL12_TXFNUM_LSB 22
78436 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_TXFNUM register field. */
78437 #define ALT_USB_DEV_DIEPCTL12_TXFNUM_MSB 25
78438 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_TXFNUM register field. */
78439 #define ALT_USB_DEV_DIEPCTL12_TXFNUM_WIDTH 4
78440 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_TXFNUM register field value. */
78441 #define ALT_USB_DEV_DIEPCTL12_TXFNUM_SET_MSK 0x03c00000
78442 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_TXFNUM register field value. */
78443 #define ALT_USB_DEV_DIEPCTL12_TXFNUM_CLR_MSK 0xfc3fffff
78444 /* The reset value of the ALT_USB_DEV_DIEPCTL12_TXFNUM register field. */
78445 #define ALT_USB_DEV_DIEPCTL12_TXFNUM_RESET 0x0
78446 /* Extracts the ALT_USB_DEV_DIEPCTL12_TXFNUM field value from a register. */
78447 #define ALT_USB_DEV_DIEPCTL12_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
78448 /* Produces a ALT_USB_DEV_DIEPCTL12_TXFNUM register field value suitable for setting the register. */
78449 #define ALT_USB_DEV_DIEPCTL12_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
78450 
78451 /*
78452  * Field : Clear NAK - cnak
78453  *
78454  * A write to this bit clears the NAK bit for the endpoint.
78455  *
78456  * Field Enumeration Values:
78457  *
78458  * Enum | Value | Description
78459  * :-----------------------------------|:------|:-------------
78460  * ALT_USB_DEV_DIEPCTL12_CNAK_E_INACT | 0x0 | No Clear NAK
78461  * ALT_USB_DEV_DIEPCTL12_CNAK_E_ACT | 0x1 | Clear NAK
78462  *
78463  * Field Access Macros:
78464  *
78465  */
78466 /*
78467  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_CNAK
78468  *
78469  * No Clear NAK
78470  */
78471 #define ALT_USB_DEV_DIEPCTL12_CNAK_E_INACT 0x0
78472 /*
78473  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_CNAK
78474  *
78475  * Clear NAK
78476  */
78477 #define ALT_USB_DEV_DIEPCTL12_CNAK_E_ACT 0x1
78478 
78479 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_CNAK register field. */
78480 #define ALT_USB_DEV_DIEPCTL12_CNAK_LSB 26
78481 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_CNAK register field. */
78482 #define ALT_USB_DEV_DIEPCTL12_CNAK_MSB 26
78483 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_CNAK register field. */
78484 #define ALT_USB_DEV_DIEPCTL12_CNAK_WIDTH 1
78485 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_CNAK register field value. */
78486 #define ALT_USB_DEV_DIEPCTL12_CNAK_SET_MSK 0x04000000
78487 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_CNAK register field value. */
78488 #define ALT_USB_DEV_DIEPCTL12_CNAK_CLR_MSK 0xfbffffff
78489 /* The reset value of the ALT_USB_DEV_DIEPCTL12_CNAK register field. */
78490 #define ALT_USB_DEV_DIEPCTL12_CNAK_RESET 0x0
78491 /* Extracts the ALT_USB_DEV_DIEPCTL12_CNAK field value from a register. */
78492 #define ALT_USB_DEV_DIEPCTL12_CNAK_GET(value) (((value) & 0x04000000) >> 26)
78493 /* Produces a ALT_USB_DEV_DIEPCTL12_CNAK register field value suitable for setting the register. */
78494 #define ALT_USB_DEV_DIEPCTL12_CNAK_SET(value) (((value) << 26) & 0x04000000)
78495 
78496 /*
78497  * Field : Set NAK - snak
78498  *
78499  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
78500  * application can control the transmission of NAK handshakes on an endpoint. The
78501  * core can also Set this bit for an endpoint after a SETUP packet is received on
78502  * that endpoint.
78503  *
78504  * Field Enumeration Values:
78505  *
78506  * Enum | Value | Description
78507  * :-----------------------------------|:------|:------------
78508  * ALT_USB_DEV_DIEPCTL12_SNAK_E_INACT | 0x0 | No Set NAK
78509  * ALT_USB_DEV_DIEPCTL12_SNAK_E_ACT | 0x1 | Set NAK
78510  *
78511  * Field Access Macros:
78512  *
78513  */
78514 /*
78515  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_SNAK
78516  *
78517  * No Set NAK
78518  */
78519 #define ALT_USB_DEV_DIEPCTL12_SNAK_E_INACT 0x0
78520 /*
78521  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_SNAK
78522  *
78523  * Set NAK
78524  */
78525 #define ALT_USB_DEV_DIEPCTL12_SNAK_E_ACT 0x1
78526 
78527 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_SNAK register field. */
78528 #define ALT_USB_DEV_DIEPCTL12_SNAK_LSB 27
78529 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_SNAK register field. */
78530 #define ALT_USB_DEV_DIEPCTL12_SNAK_MSB 27
78531 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_SNAK register field. */
78532 #define ALT_USB_DEV_DIEPCTL12_SNAK_WIDTH 1
78533 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_SNAK register field value. */
78534 #define ALT_USB_DEV_DIEPCTL12_SNAK_SET_MSK 0x08000000
78535 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_SNAK register field value. */
78536 #define ALT_USB_DEV_DIEPCTL12_SNAK_CLR_MSK 0xf7ffffff
78537 /* The reset value of the ALT_USB_DEV_DIEPCTL12_SNAK register field. */
78538 #define ALT_USB_DEV_DIEPCTL12_SNAK_RESET 0x0
78539 /* Extracts the ALT_USB_DEV_DIEPCTL12_SNAK field value from a register. */
78540 #define ALT_USB_DEV_DIEPCTL12_SNAK_GET(value) (((value) & 0x08000000) >> 27)
78541 /* Produces a ALT_USB_DEV_DIEPCTL12_SNAK register field value suitable for setting the register. */
78542 #define ALT_USB_DEV_DIEPCTL12_SNAK_SET(value) (((value) << 27) & 0x08000000)
78543 
78544 /*
78545  * Field : Set DATA0 PID - setd0pid
78546  *
78547  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
78548  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
78549  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
78550  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
78551  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
78552  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
78553  * mode is enabled, this field is reserved. The frame number in which to send data
78554  * is in the transmit descriptor structure. The frame in which to receive data is
78555  * updated in receive descriptor structure.
78556  *
78557  * Field Enumeration Values:
78558  *
78559  * Enum | Value | Description
78560  * :--------------------------------------|:------|:----------------------------
78561  * ALT_USB_DEV_DIEPCTL12_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
78562  * ALT_USB_DEV_DIEPCTL12_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
78563  *
78564  * Field Access Macros:
78565  *
78566  */
78567 /*
78568  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_SETD0PID
78569  *
78570  * Disables Set DATA0 PID
78571  */
78572 #define ALT_USB_DEV_DIEPCTL12_SETD0PID_E_DISD 0x0
78573 /*
78574  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_SETD0PID
78575  *
78576  * Endpoint Data PID to DATA0)
78577  */
78578 #define ALT_USB_DEV_DIEPCTL12_SETD0PID_E_END 0x1
78579 
78580 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_SETD0PID register field. */
78581 #define ALT_USB_DEV_DIEPCTL12_SETD0PID_LSB 28
78582 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_SETD0PID register field. */
78583 #define ALT_USB_DEV_DIEPCTL12_SETD0PID_MSB 28
78584 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_SETD0PID register field. */
78585 #define ALT_USB_DEV_DIEPCTL12_SETD0PID_WIDTH 1
78586 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_SETD0PID register field value. */
78587 #define ALT_USB_DEV_DIEPCTL12_SETD0PID_SET_MSK 0x10000000
78588 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_SETD0PID register field value. */
78589 #define ALT_USB_DEV_DIEPCTL12_SETD0PID_CLR_MSK 0xefffffff
78590 /* The reset value of the ALT_USB_DEV_DIEPCTL12_SETD0PID register field. */
78591 #define ALT_USB_DEV_DIEPCTL12_SETD0PID_RESET 0x0
78592 /* Extracts the ALT_USB_DEV_DIEPCTL12_SETD0PID field value from a register. */
78593 #define ALT_USB_DEV_DIEPCTL12_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
78594 /* Produces a ALT_USB_DEV_DIEPCTL12_SETD0PID register field value suitable for setting the register. */
78595 #define ALT_USB_DEV_DIEPCTL12_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
78596 
78597 /*
78598  * Field : Set DATA1 PID - setd1pid
78599  *
78600  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
78601  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
78602  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
78603  *
78604  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
78605  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
78606  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
78607  *
78608  * Field Enumeration Values:
78609  *
78610  * Enum | Value | Description
78611  * :--------------------------------------|:------|:-----------------------
78612  * ALT_USB_DEV_DIEPCTL12_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
78613  * ALT_USB_DEV_DIEPCTL12_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
78614  *
78615  * Field Access Macros:
78616  *
78617  */
78618 /*
78619  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_SETD1PID
78620  *
78621  * Disables Set DATA1 PID
78622  */
78623 #define ALT_USB_DEV_DIEPCTL12_SETD1PID_E_DISD 0x0
78624 /*
78625  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_SETD1PID
78626  *
78627  * Enables Set DATA1 PID
78628  */
78629 #define ALT_USB_DEV_DIEPCTL12_SETD1PID_E_END 0x1
78630 
78631 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_SETD1PID register field. */
78632 #define ALT_USB_DEV_DIEPCTL12_SETD1PID_LSB 29
78633 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_SETD1PID register field. */
78634 #define ALT_USB_DEV_DIEPCTL12_SETD1PID_MSB 29
78635 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_SETD1PID register field. */
78636 #define ALT_USB_DEV_DIEPCTL12_SETD1PID_WIDTH 1
78637 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_SETD1PID register field value. */
78638 #define ALT_USB_DEV_DIEPCTL12_SETD1PID_SET_MSK 0x20000000
78639 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_SETD1PID register field value. */
78640 #define ALT_USB_DEV_DIEPCTL12_SETD1PID_CLR_MSK 0xdfffffff
78641 /* The reset value of the ALT_USB_DEV_DIEPCTL12_SETD1PID register field. */
78642 #define ALT_USB_DEV_DIEPCTL12_SETD1PID_RESET 0x0
78643 /* Extracts the ALT_USB_DEV_DIEPCTL12_SETD1PID field value from a register. */
78644 #define ALT_USB_DEV_DIEPCTL12_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
78645 /* Produces a ALT_USB_DEV_DIEPCTL12_SETD1PID register field value suitable for setting the register. */
78646 #define ALT_USB_DEV_DIEPCTL12_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
78647 
78648 /*
78649  * Field : Endpoint Disable - epdis
78650  *
78651  * Applies to IN and OUT endpoints. The application sets this bit to stop
78652  * transmitting/receiving data on an endpoint, even before the transfer for that
78653  * endpoint is complete. The application must wait for the Endpoint Disabled
78654  * interrupt before treating the endpoint as disabled. The core clears this bit
78655  * before setting the Endpoint Disabled interrupt. The application must set this
78656  * bit only if Endpoint Enable is already set for this endpoint.
78657  *
78658  * Field Enumeration Values:
78659  *
78660  * Enum | Value | Description
78661  * :------------------------------------|:------|:--------------------
78662  * ALT_USB_DEV_DIEPCTL12_EPDIS_E_INACT | 0x0 | No Endpoint Disable
78663  * ALT_USB_DEV_DIEPCTL12_EPDIS_E_ACT | 0x1 | Endpoint Disable
78664  *
78665  * Field Access Macros:
78666  *
78667  */
78668 /*
78669  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_EPDIS
78670  *
78671  * No Endpoint Disable
78672  */
78673 #define ALT_USB_DEV_DIEPCTL12_EPDIS_E_INACT 0x0
78674 /*
78675  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_EPDIS
78676  *
78677  * Endpoint Disable
78678  */
78679 #define ALT_USB_DEV_DIEPCTL12_EPDIS_E_ACT 0x1
78680 
78681 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_EPDIS register field. */
78682 #define ALT_USB_DEV_DIEPCTL12_EPDIS_LSB 30
78683 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_EPDIS register field. */
78684 #define ALT_USB_DEV_DIEPCTL12_EPDIS_MSB 30
78685 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_EPDIS register field. */
78686 #define ALT_USB_DEV_DIEPCTL12_EPDIS_WIDTH 1
78687 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_EPDIS register field value. */
78688 #define ALT_USB_DEV_DIEPCTL12_EPDIS_SET_MSK 0x40000000
78689 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_EPDIS register field value. */
78690 #define ALT_USB_DEV_DIEPCTL12_EPDIS_CLR_MSK 0xbfffffff
78691 /* The reset value of the ALT_USB_DEV_DIEPCTL12_EPDIS register field. */
78692 #define ALT_USB_DEV_DIEPCTL12_EPDIS_RESET 0x0
78693 /* Extracts the ALT_USB_DEV_DIEPCTL12_EPDIS field value from a register. */
78694 #define ALT_USB_DEV_DIEPCTL12_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
78695 /* Produces a ALT_USB_DEV_DIEPCTL12_EPDIS register field value suitable for setting the register. */
78696 #define ALT_USB_DEV_DIEPCTL12_EPDIS_SET(value) (((value) << 30) & 0x40000000)
78697 
78698 /*
78699  * Field : Endpoint Enable - epena
78700  *
78701  * Applies to IN and OUT endpoints.
78702  *
78703  * * When Scatter/Gather DMA mode is enabled,
78704  *
78705  * * for IN endpoints this bit indicates that the descriptor structure and data
78706  * buffer with data ready to transmit is setup.
78707  *
78708  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
78709  * receive data is setup.
78710  *
78711  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
78712  * mode:
78713  *
78714  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
78715  * the endpoint.
78716  *
78717  * * for OUT endpoints, this bit indicates that the application has allocated the
78718  * memory to start receiving data from the USB.
78719  *
78720  * * The core clears this bit before setting any of the following interrupts on
78721  * this endpoint:
78722  *
78723  * * SETUP Phase Done
78724  *
78725  * * Endpoint Disabled
78726  *
78727  * * Transfer Completed
78728  *
78729  * for control endpoints in DMA mode, this bit must be set to be able to transfer
78730  * SETUP data packets in memory.
78731  *
78732  * Field Enumeration Values:
78733  *
78734  * Enum | Value | Description
78735  * :------------------------------------|:------|:-------------------------
78736  * ALT_USB_DEV_DIEPCTL12_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
78737  * ALT_USB_DEV_DIEPCTL12_EPENA_E_ACT | 0x1 | Endpoint Enable active
78738  *
78739  * Field Access Macros:
78740  *
78741  */
78742 /*
78743  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_EPENA
78744  *
78745  * Endpoint Enable inactive
78746  */
78747 #define ALT_USB_DEV_DIEPCTL12_EPENA_E_INACT 0x0
78748 /*
78749  * Enumerated value for register field ALT_USB_DEV_DIEPCTL12_EPENA
78750  *
78751  * Endpoint Enable active
78752  */
78753 #define ALT_USB_DEV_DIEPCTL12_EPENA_E_ACT 0x1
78754 
78755 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL12_EPENA register field. */
78756 #define ALT_USB_DEV_DIEPCTL12_EPENA_LSB 31
78757 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL12_EPENA register field. */
78758 #define ALT_USB_DEV_DIEPCTL12_EPENA_MSB 31
78759 /* The width in bits of the ALT_USB_DEV_DIEPCTL12_EPENA register field. */
78760 #define ALT_USB_DEV_DIEPCTL12_EPENA_WIDTH 1
78761 /* The mask used to set the ALT_USB_DEV_DIEPCTL12_EPENA register field value. */
78762 #define ALT_USB_DEV_DIEPCTL12_EPENA_SET_MSK 0x80000000
78763 /* The mask used to clear the ALT_USB_DEV_DIEPCTL12_EPENA register field value. */
78764 #define ALT_USB_DEV_DIEPCTL12_EPENA_CLR_MSK 0x7fffffff
78765 /* The reset value of the ALT_USB_DEV_DIEPCTL12_EPENA register field. */
78766 #define ALT_USB_DEV_DIEPCTL12_EPENA_RESET 0x0
78767 /* Extracts the ALT_USB_DEV_DIEPCTL12_EPENA field value from a register. */
78768 #define ALT_USB_DEV_DIEPCTL12_EPENA_GET(value) (((value) & 0x80000000) >> 31)
78769 /* Produces a ALT_USB_DEV_DIEPCTL12_EPENA register field value suitable for setting the register. */
78770 #define ALT_USB_DEV_DIEPCTL12_EPENA_SET(value) (((value) << 31) & 0x80000000)
78771 
78772 #ifndef __ASSEMBLY__
78773 /*
78774  * WARNING: The C register and register group struct declarations are provided for
78775  * convenience and illustrative purposes. They should, however, be used with
78776  * caution as the C language standard provides no guarantees about the alignment or
78777  * atomicity of device memory accesses. The recommended practice for writing
78778  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
78779  * alt_write_word() functions.
78780  *
78781  * The struct declaration for register ALT_USB_DEV_DIEPCTL12.
78782  */
78783 struct ALT_USB_DEV_DIEPCTL12_s
78784 {
78785  uint32_t mps : 11; /* Maximum Packet Size */
78786  uint32_t : 4; /* *UNDEFINED* */
78787  uint32_t usbactep : 1; /* USB Active Endpoint */
78788  const uint32_t dpid : 1; /* Endpoint Data PID */
78789  const uint32_t naksts : 1; /* NAK Status */
78790  uint32_t eptype : 2; /* Endpoint Type */
78791  uint32_t : 1; /* *UNDEFINED* */
78792  const uint32_t stall : 1; /* STALL Handshake */
78793  uint32_t txfnum : 4; /* TxFIFO Number */
78794  uint32_t cnak : 1; /* Clear NAK */
78795  uint32_t snak : 1; /* Set NAK */
78796  uint32_t setd0pid : 1; /* Set DATA0 PID */
78797  uint32_t setd1pid : 1; /* Set DATA1 PID */
78798  const uint32_t epdis : 1; /* Endpoint Disable */
78799  const uint32_t epena : 1; /* Endpoint Enable */
78800 };
78801 
78802 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL12. */
78803 typedef volatile struct ALT_USB_DEV_DIEPCTL12_s ALT_USB_DEV_DIEPCTL12_t;
78804 #endif /* __ASSEMBLY__ */
78805 
78806 /* The byte offset of the ALT_USB_DEV_DIEPCTL12 register from the beginning of the component. */
78807 #define ALT_USB_DEV_DIEPCTL12_OFST 0x280
78808 /* The address of the ALT_USB_DEV_DIEPCTL12 register. */
78809 #define ALT_USB_DEV_DIEPCTL12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL12_OFST))
78810 
78811 /*
78812  * Register : Device IN Endpoint 12 Interrupt Register - diepint12
78813  *
78814  * This register indicates the status of an endpoint with respect to USB- and AHB-
78815  * related events. The application must read this register when the OUT Endpoints
78816  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
78817  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
78818  * can read this register, it must first read the Device All Endpoints Interrupt
78819  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
78820  * Interrupt register. The application must clear the appropriate bit in this
78821  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
78822  *
78823  * Register Layout
78824  *
78825  * Bits | Access | Reset | Description
78826  * :--------|:-------|:------|:---------------------------------------
78827  * [0] | R | 0x0 | Transfer Completed Interrupt
78828  * [1] | R | 0x0 | Endpoint Disabled Interrupt
78829  * [2] | R | 0x0 | AHB Error
78830  * [3] | R | 0x0 | Timeout Condition
78831  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
78832  * [5] | R | 0x0 | IN Token Received with EP Mismatch
78833  * [6] | R | 0x0 | IN Endpoint NAK Effective
78834  * [7] | R | 0x1 | Transmit FIFO Empty
78835  * [8] | R | 0x0 | Fifo Underrun
78836  * [9] | R | 0x0 | BNA Interrupt
78837  * [10] | ??? | 0x0 | *UNDEFINED*
78838  * [11] | R | 0x0 | Packet Drop Status
78839  * [12] | R | 0x0 | BbleErr Interrupt (
78840  * [13] | R | 0x0 | NAK Interrupt
78841  * [14] | R | 0x0 | NYET Interrupt
78842  * [31:15] | ??? | 0x0 | *UNDEFINED*
78843  *
78844  */
78845 /*
78846  * Field : Transfer Completed Interrupt - xfercompl
78847  *
78848  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
78849  *
78850  * * for IN endpoint this field indicates that the requested data from the
78851  * descriptor is moved from external system memory to internal FIFO.
78852  *
78853  * * for OUT endpoint this field indicates that the requested data from the
78854  * internal FIFO is moved to external system memory. This interrupt is generated
78855  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
78856  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
78857  * this field indicates that the programmed transfer is complete on the AHB as
78858  * well as on the USB, for this endpoint.
78859  *
78860  * Field Enumeration Values:
78861  *
78862  * Enum | Value | Description
78863  * :----------------------------------------|:------|:-----------------------------
78864  * ALT_USB_DEV_DIEPINT12_XFERCOMPL_E_INACT | 0x0 | No Interrupt
78865  * ALT_USB_DEV_DIEPINT12_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
78866  *
78867  * Field Access Macros:
78868  *
78869  */
78870 /*
78871  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_XFERCOMPL
78872  *
78873  * No Interrupt
78874  */
78875 #define ALT_USB_DEV_DIEPINT12_XFERCOMPL_E_INACT 0x0
78876 /*
78877  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_XFERCOMPL
78878  *
78879  * Transfer Completed Interrupt
78880  */
78881 #define ALT_USB_DEV_DIEPINT12_XFERCOMPL_E_ACT 0x1
78882 
78883 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_XFERCOMPL register field. */
78884 #define ALT_USB_DEV_DIEPINT12_XFERCOMPL_LSB 0
78885 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_XFERCOMPL register field. */
78886 #define ALT_USB_DEV_DIEPINT12_XFERCOMPL_MSB 0
78887 /* The width in bits of the ALT_USB_DEV_DIEPINT12_XFERCOMPL register field. */
78888 #define ALT_USB_DEV_DIEPINT12_XFERCOMPL_WIDTH 1
78889 /* The mask used to set the ALT_USB_DEV_DIEPINT12_XFERCOMPL register field value. */
78890 #define ALT_USB_DEV_DIEPINT12_XFERCOMPL_SET_MSK 0x00000001
78891 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_XFERCOMPL register field value. */
78892 #define ALT_USB_DEV_DIEPINT12_XFERCOMPL_CLR_MSK 0xfffffffe
78893 /* The reset value of the ALT_USB_DEV_DIEPINT12_XFERCOMPL register field. */
78894 #define ALT_USB_DEV_DIEPINT12_XFERCOMPL_RESET 0x0
78895 /* Extracts the ALT_USB_DEV_DIEPINT12_XFERCOMPL field value from a register. */
78896 #define ALT_USB_DEV_DIEPINT12_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
78897 /* Produces a ALT_USB_DEV_DIEPINT12_XFERCOMPL register field value suitable for setting the register. */
78898 #define ALT_USB_DEV_DIEPINT12_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
78899 
78900 /*
78901  * Field : Endpoint Disabled Interrupt - epdisbld
78902  *
78903  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
78904  * disabled per the application's request.
78905  *
78906  * Field Enumeration Values:
78907  *
78908  * Enum | Value | Description
78909  * :---------------------------------------|:------|:----------------------------
78910  * ALT_USB_DEV_DIEPINT12_EPDISBLD_E_INACT | 0x0 | No Interrupt
78911  * ALT_USB_DEV_DIEPINT12_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
78912  *
78913  * Field Access Macros:
78914  *
78915  */
78916 /*
78917  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_EPDISBLD
78918  *
78919  * No Interrupt
78920  */
78921 #define ALT_USB_DEV_DIEPINT12_EPDISBLD_E_INACT 0x0
78922 /*
78923  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_EPDISBLD
78924  *
78925  * Endpoint Disabled Interrupt
78926  */
78927 #define ALT_USB_DEV_DIEPINT12_EPDISBLD_E_ACT 0x1
78928 
78929 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_EPDISBLD register field. */
78930 #define ALT_USB_DEV_DIEPINT12_EPDISBLD_LSB 1
78931 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_EPDISBLD register field. */
78932 #define ALT_USB_DEV_DIEPINT12_EPDISBLD_MSB 1
78933 /* The width in bits of the ALT_USB_DEV_DIEPINT12_EPDISBLD register field. */
78934 #define ALT_USB_DEV_DIEPINT12_EPDISBLD_WIDTH 1
78935 /* The mask used to set the ALT_USB_DEV_DIEPINT12_EPDISBLD register field value. */
78936 #define ALT_USB_DEV_DIEPINT12_EPDISBLD_SET_MSK 0x00000002
78937 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_EPDISBLD register field value. */
78938 #define ALT_USB_DEV_DIEPINT12_EPDISBLD_CLR_MSK 0xfffffffd
78939 /* The reset value of the ALT_USB_DEV_DIEPINT12_EPDISBLD register field. */
78940 #define ALT_USB_DEV_DIEPINT12_EPDISBLD_RESET 0x0
78941 /* Extracts the ALT_USB_DEV_DIEPINT12_EPDISBLD field value from a register. */
78942 #define ALT_USB_DEV_DIEPINT12_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
78943 /* Produces a ALT_USB_DEV_DIEPINT12_EPDISBLD register field value suitable for setting the register. */
78944 #define ALT_USB_DEV_DIEPINT12_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
78945 
78946 /*
78947  * Field : AHB Error - ahberr
78948  *
78949  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
78950  * there is an AHB error during an AHB read/write. The application can read the
78951  * corresponding endpoint DMA address register to get the error address.
78952  *
78953  * Field Enumeration Values:
78954  *
78955  * Enum | Value | Description
78956  * :-------------------------------------|:------|:--------------------
78957  * ALT_USB_DEV_DIEPINT12_AHBERR_E_INACT | 0x0 | No Interrupt
78958  * ALT_USB_DEV_DIEPINT12_AHBERR_E_ACT | 0x1 | AHB Error interrupt
78959  *
78960  * Field Access Macros:
78961  *
78962  */
78963 /*
78964  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_AHBERR
78965  *
78966  * No Interrupt
78967  */
78968 #define ALT_USB_DEV_DIEPINT12_AHBERR_E_INACT 0x0
78969 /*
78970  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_AHBERR
78971  *
78972  * AHB Error interrupt
78973  */
78974 #define ALT_USB_DEV_DIEPINT12_AHBERR_E_ACT 0x1
78975 
78976 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_AHBERR register field. */
78977 #define ALT_USB_DEV_DIEPINT12_AHBERR_LSB 2
78978 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_AHBERR register field. */
78979 #define ALT_USB_DEV_DIEPINT12_AHBERR_MSB 2
78980 /* The width in bits of the ALT_USB_DEV_DIEPINT12_AHBERR register field. */
78981 #define ALT_USB_DEV_DIEPINT12_AHBERR_WIDTH 1
78982 /* The mask used to set the ALT_USB_DEV_DIEPINT12_AHBERR register field value. */
78983 #define ALT_USB_DEV_DIEPINT12_AHBERR_SET_MSK 0x00000004
78984 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_AHBERR register field value. */
78985 #define ALT_USB_DEV_DIEPINT12_AHBERR_CLR_MSK 0xfffffffb
78986 /* The reset value of the ALT_USB_DEV_DIEPINT12_AHBERR register field. */
78987 #define ALT_USB_DEV_DIEPINT12_AHBERR_RESET 0x0
78988 /* Extracts the ALT_USB_DEV_DIEPINT12_AHBERR field value from a register. */
78989 #define ALT_USB_DEV_DIEPINT12_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
78990 /* Produces a ALT_USB_DEV_DIEPINT12_AHBERR register field value suitable for setting the register. */
78991 #define ALT_USB_DEV_DIEPINT12_AHBERR_SET(value) (((value) << 2) & 0x00000004)
78992 
78993 /*
78994  * Field : Timeout Condition - timeout
78995  *
78996  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
78997  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
78998  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
78999  * detected a timeout condition on the USB for the last IN token on this endpoint.
79000  *
79001  * Field Enumeration Values:
79002  *
79003  * Enum | Value | Description
79004  * :----------------------------------|:------|:------------------
79005  * ALT_USB_DEV_DIEPINT12_TMO_E_INACT | 0x0 | No interrupt
79006  * ALT_USB_DEV_DIEPINT12_TMO_E_ACT | 0x1 | Timeout interrupy
79007  *
79008  * Field Access Macros:
79009  *
79010  */
79011 /*
79012  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_TMO
79013  *
79014  * No interrupt
79015  */
79016 #define ALT_USB_DEV_DIEPINT12_TMO_E_INACT 0x0
79017 /*
79018  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_TMO
79019  *
79020  * Timeout interrupy
79021  */
79022 #define ALT_USB_DEV_DIEPINT12_TMO_E_ACT 0x1
79023 
79024 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_TMO register field. */
79025 #define ALT_USB_DEV_DIEPINT12_TMO_LSB 3
79026 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_TMO register field. */
79027 #define ALT_USB_DEV_DIEPINT12_TMO_MSB 3
79028 /* The width in bits of the ALT_USB_DEV_DIEPINT12_TMO register field. */
79029 #define ALT_USB_DEV_DIEPINT12_TMO_WIDTH 1
79030 /* The mask used to set the ALT_USB_DEV_DIEPINT12_TMO register field value. */
79031 #define ALT_USB_DEV_DIEPINT12_TMO_SET_MSK 0x00000008
79032 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_TMO register field value. */
79033 #define ALT_USB_DEV_DIEPINT12_TMO_CLR_MSK 0xfffffff7
79034 /* The reset value of the ALT_USB_DEV_DIEPINT12_TMO register field. */
79035 #define ALT_USB_DEV_DIEPINT12_TMO_RESET 0x0
79036 /* Extracts the ALT_USB_DEV_DIEPINT12_TMO field value from a register. */
79037 #define ALT_USB_DEV_DIEPINT12_TMO_GET(value) (((value) & 0x00000008) >> 3)
79038 /* Produces a ALT_USB_DEV_DIEPINT12_TMO register field value suitable for setting the register. */
79039 #define ALT_USB_DEV_DIEPINT12_TMO_SET(value) (((value) << 3) & 0x00000008)
79040 
79041 /*
79042  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
79043  *
79044  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
79045  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
79046  * interrupt is asserted on the endpoint for which the IN token was received.
79047  *
79048  * Field Enumeration Values:
79049  *
79050  * Enum | Value | Description
79051  * :------------------------------------------|:------|:----------------------------
79052  * ALT_USB_DEV_DIEPINT12_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
79053  * ALT_USB_DEV_DIEPINT12_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
79054  *
79055  * Field Access Macros:
79056  *
79057  */
79058 /*
79059  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_INTKNTXFEMP
79060  *
79061  * No interrupt
79062  */
79063 #define ALT_USB_DEV_DIEPINT12_INTKNTXFEMP_E_INACT 0x0
79064 /*
79065  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_INTKNTXFEMP
79066  *
79067  * IN Token Received Interrupt
79068  */
79069 #define ALT_USB_DEV_DIEPINT12_INTKNTXFEMP_E_ACT 0x1
79070 
79071 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_INTKNTXFEMP register field. */
79072 #define ALT_USB_DEV_DIEPINT12_INTKNTXFEMP_LSB 4
79073 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_INTKNTXFEMP register field. */
79074 #define ALT_USB_DEV_DIEPINT12_INTKNTXFEMP_MSB 4
79075 /* The width in bits of the ALT_USB_DEV_DIEPINT12_INTKNTXFEMP register field. */
79076 #define ALT_USB_DEV_DIEPINT12_INTKNTXFEMP_WIDTH 1
79077 /* The mask used to set the ALT_USB_DEV_DIEPINT12_INTKNTXFEMP register field value. */
79078 #define ALT_USB_DEV_DIEPINT12_INTKNTXFEMP_SET_MSK 0x00000010
79079 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_INTKNTXFEMP register field value. */
79080 #define ALT_USB_DEV_DIEPINT12_INTKNTXFEMP_CLR_MSK 0xffffffef
79081 /* The reset value of the ALT_USB_DEV_DIEPINT12_INTKNTXFEMP register field. */
79082 #define ALT_USB_DEV_DIEPINT12_INTKNTXFEMP_RESET 0x0
79083 /* Extracts the ALT_USB_DEV_DIEPINT12_INTKNTXFEMP field value from a register. */
79084 #define ALT_USB_DEV_DIEPINT12_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
79085 /* Produces a ALT_USB_DEV_DIEPINT12_INTKNTXFEMP register field value suitable for setting the register. */
79086 #define ALT_USB_DEV_DIEPINT12_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
79087 
79088 /*
79089  * Field : IN Token Received with EP Mismatch - intknepmis
79090  *
79091  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
79092  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
79093  * IN token was received. This interrupt is asserted on the endpoint for which the
79094  * IN token was received.
79095  *
79096  * Field Enumeration Values:
79097  *
79098  * Enum | Value | Description
79099  * :-----------------------------------------|:------|:---------------------------------------------
79100  * ALT_USB_DEV_DIEPINT12_INTKNEPMIS_E_INACT | 0x0 | No interrupt
79101  * ALT_USB_DEV_DIEPINT12_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
79102  *
79103  * Field Access Macros:
79104  *
79105  */
79106 /*
79107  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_INTKNEPMIS
79108  *
79109  * No interrupt
79110  */
79111 #define ALT_USB_DEV_DIEPINT12_INTKNEPMIS_E_INACT 0x0
79112 /*
79113  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_INTKNEPMIS
79114  *
79115  * IN Token Received with EP Mismatch interrupt
79116  */
79117 #define ALT_USB_DEV_DIEPINT12_INTKNEPMIS_E_ACT 0x1
79118 
79119 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_INTKNEPMIS register field. */
79120 #define ALT_USB_DEV_DIEPINT12_INTKNEPMIS_LSB 5
79121 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_INTKNEPMIS register field. */
79122 #define ALT_USB_DEV_DIEPINT12_INTKNEPMIS_MSB 5
79123 /* The width in bits of the ALT_USB_DEV_DIEPINT12_INTKNEPMIS register field. */
79124 #define ALT_USB_DEV_DIEPINT12_INTKNEPMIS_WIDTH 1
79125 /* The mask used to set the ALT_USB_DEV_DIEPINT12_INTKNEPMIS register field value. */
79126 #define ALT_USB_DEV_DIEPINT12_INTKNEPMIS_SET_MSK 0x00000020
79127 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_INTKNEPMIS register field value. */
79128 #define ALT_USB_DEV_DIEPINT12_INTKNEPMIS_CLR_MSK 0xffffffdf
79129 /* The reset value of the ALT_USB_DEV_DIEPINT12_INTKNEPMIS register field. */
79130 #define ALT_USB_DEV_DIEPINT12_INTKNEPMIS_RESET 0x0
79131 /* Extracts the ALT_USB_DEV_DIEPINT12_INTKNEPMIS field value from a register. */
79132 #define ALT_USB_DEV_DIEPINT12_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
79133 /* Produces a ALT_USB_DEV_DIEPINT12_INTKNEPMIS register field value suitable for setting the register. */
79134 #define ALT_USB_DEV_DIEPINT12_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
79135 
79136 /*
79137  * Field : IN Endpoint NAK Effective - inepnakeff
79138  *
79139  * Applies to periodic IN endpoints only. This bit can be cleared when the
79140  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
79141  * interrupt indicates that the core has sampled the NAK bit Set (either by the
79142  * application or by the core). The interrupt indicates that the IN endpoint NAK
79143  * bit Set by the application has taken effect in the core.This interrupt does not
79144  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
79145  * over a NAK bit.
79146  *
79147  * Field Enumeration Values:
79148  *
79149  * Enum | Value | Description
79150  * :-----------------------------------------|:------|:------------------------------------
79151  * ALT_USB_DEV_DIEPINT12_INEPNAKEFF_E_INACT | 0x0 | No interrupt
79152  * ALT_USB_DEV_DIEPINT12_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
79153  *
79154  * Field Access Macros:
79155  *
79156  */
79157 /*
79158  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_INEPNAKEFF
79159  *
79160  * No interrupt
79161  */
79162 #define ALT_USB_DEV_DIEPINT12_INEPNAKEFF_E_INACT 0x0
79163 /*
79164  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_INEPNAKEFF
79165  *
79166  * IN Endpoint NAK Effective interrupt
79167  */
79168 #define ALT_USB_DEV_DIEPINT12_INEPNAKEFF_E_ACT 0x1
79169 
79170 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_INEPNAKEFF register field. */
79171 #define ALT_USB_DEV_DIEPINT12_INEPNAKEFF_LSB 6
79172 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_INEPNAKEFF register field. */
79173 #define ALT_USB_DEV_DIEPINT12_INEPNAKEFF_MSB 6
79174 /* The width in bits of the ALT_USB_DEV_DIEPINT12_INEPNAKEFF register field. */
79175 #define ALT_USB_DEV_DIEPINT12_INEPNAKEFF_WIDTH 1
79176 /* The mask used to set the ALT_USB_DEV_DIEPINT12_INEPNAKEFF register field value. */
79177 #define ALT_USB_DEV_DIEPINT12_INEPNAKEFF_SET_MSK 0x00000040
79178 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_INEPNAKEFF register field value. */
79179 #define ALT_USB_DEV_DIEPINT12_INEPNAKEFF_CLR_MSK 0xffffffbf
79180 /* The reset value of the ALT_USB_DEV_DIEPINT12_INEPNAKEFF register field. */
79181 #define ALT_USB_DEV_DIEPINT12_INEPNAKEFF_RESET 0x0
79182 /* Extracts the ALT_USB_DEV_DIEPINT12_INEPNAKEFF field value from a register. */
79183 #define ALT_USB_DEV_DIEPINT12_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
79184 /* Produces a ALT_USB_DEV_DIEPINT12_INEPNAKEFF register field value suitable for setting the register. */
79185 #define ALT_USB_DEV_DIEPINT12_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
79186 
79187 /*
79188  * Field : Transmit FIFO Empty - txfemp
79189  *
79190  * This bit is valid only for IN Endpoints This interrupt is asserted when the
79191  * TxFIFO for this endpoint is either half or completely empty. The half or
79192  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
79193  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
79194  *
79195  * Field Enumeration Values:
79196  *
79197  * Enum | Value | Description
79198  * :-------------------------------------|:------|:------------------------------
79199  * ALT_USB_DEV_DIEPINT12_TXFEMP_E_INACT | 0x0 | No interrupt
79200  * ALT_USB_DEV_DIEPINT12_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
79201  *
79202  * Field Access Macros:
79203  *
79204  */
79205 /*
79206  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_TXFEMP
79207  *
79208  * No interrupt
79209  */
79210 #define ALT_USB_DEV_DIEPINT12_TXFEMP_E_INACT 0x0
79211 /*
79212  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_TXFEMP
79213  *
79214  * Transmit FIFO Empty interrupt
79215  */
79216 #define ALT_USB_DEV_DIEPINT12_TXFEMP_E_ACT 0x1
79217 
79218 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_TXFEMP register field. */
79219 #define ALT_USB_DEV_DIEPINT12_TXFEMP_LSB 7
79220 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_TXFEMP register field. */
79221 #define ALT_USB_DEV_DIEPINT12_TXFEMP_MSB 7
79222 /* The width in bits of the ALT_USB_DEV_DIEPINT12_TXFEMP register field. */
79223 #define ALT_USB_DEV_DIEPINT12_TXFEMP_WIDTH 1
79224 /* The mask used to set the ALT_USB_DEV_DIEPINT12_TXFEMP register field value. */
79225 #define ALT_USB_DEV_DIEPINT12_TXFEMP_SET_MSK 0x00000080
79226 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_TXFEMP register field value. */
79227 #define ALT_USB_DEV_DIEPINT12_TXFEMP_CLR_MSK 0xffffff7f
79228 /* The reset value of the ALT_USB_DEV_DIEPINT12_TXFEMP register field. */
79229 #define ALT_USB_DEV_DIEPINT12_TXFEMP_RESET 0x1
79230 /* Extracts the ALT_USB_DEV_DIEPINT12_TXFEMP field value from a register. */
79231 #define ALT_USB_DEV_DIEPINT12_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
79232 /* Produces a ALT_USB_DEV_DIEPINT12_TXFEMP register field value suitable for setting the register. */
79233 #define ALT_USB_DEV_DIEPINT12_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
79234 
79235 /*
79236  * Field : Fifo Underrun - txfifoundrn
79237  *
79238  * Applies to IN endpoints Only. The core generates this interrupt when it detects
79239  * a transmit FIFO underrun condition for this endpoint.
79240  *
79241  * Field Enumeration Values:
79242  *
79243  * Enum | Value | Description
79244  * :------------------------------------------|:------|:------------------------
79245  * ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
79246  * ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
79247  *
79248  * Field Access Macros:
79249  *
79250  */
79251 /*
79252  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN
79253  *
79254  * No interrupt
79255  */
79256 #define ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN_E_INACT 0x0
79257 /*
79258  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN
79259  *
79260  * Fifo Underrun interrupt
79261  */
79262 #define ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN_E_ACT 0x1
79263 
79264 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN register field. */
79265 #define ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN_LSB 8
79266 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN register field. */
79267 #define ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN_MSB 8
79268 /* The width in bits of the ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN register field. */
79269 #define ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN_WIDTH 1
79270 /* The mask used to set the ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN register field value. */
79271 #define ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN_SET_MSK 0x00000100
79272 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN register field value. */
79273 #define ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN_CLR_MSK 0xfffffeff
79274 /* The reset value of the ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN register field. */
79275 #define ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN_RESET 0x0
79276 /* Extracts the ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN field value from a register. */
79277 #define ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
79278 /* Produces a ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN register field value suitable for setting the register. */
79279 #define ALT_USB_DEV_DIEPINT12_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
79280 
79281 /*
79282  * Field : BNA Interrupt - bnaintr
79283  *
79284  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
79285  * generates this interrupt when the descriptor accessed is not ready for the Core
79286  * to process, such as Host busy or DMA done
79287  *
79288  * Field Enumeration Values:
79289  *
79290  * Enum | Value | Description
79291  * :--------------------------------------|:------|:--------------
79292  * ALT_USB_DEV_DIEPINT12_BNAINTR_E_INACT | 0x0 | No interrupt
79293  * ALT_USB_DEV_DIEPINT12_BNAINTR_E_ACT | 0x1 | BNA interrupt
79294  *
79295  * Field Access Macros:
79296  *
79297  */
79298 /*
79299  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_BNAINTR
79300  *
79301  * No interrupt
79302  */
79303 #define ALT_USB_DEV_DIEPINT12_BNAINTR_E_INACT 0x0
79304 /*
79305  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_BNAINTR
79306  *
79307  * BNA interrupt
79308  */
79309 #define ALT_USB_DEV_DIEPINT12_BNAINTR_E_ACT 0x1
79310 
79311 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_BNAINTR register field. */
79312 #define ALT_USB_DEV_DIEPINT12_BNAINTR_LSB 9
79313 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_BNAINTR register field. */
79314 #define ALT_USB_DEV_DIEPINT12_BNAINTR_MSB 9
79315 /* The width in bits of the ALT_USB_DEV_DIEPINT12_BNAINTR register field. */
79316 #define ALT_USB_DEV_DIEPINT12_BNAINTR_WIDTH 1
79317 /* The mask used to set the ALT_USB_DEV_DIEPINT12_BNAINTR register field value. */
79318 #define ALT_USB_DEV_DIEPINT12_BNAINTR_SET_MSK 0x00000200
79319 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_BNAINTR register field value. */
79320 #define ALT_USB_DEV_DIEPINT12_BNAINTR_CLR_MSK 0xfffffdff
79321 /* The reset value of the ALT_USB_DEV_DIEPINT12_BNAINTR register field. */
79322 #define ALT_USB_DEV_DIEPINT12_BNAINTR_RESET 0x0
79323 /* Extracts the ALT_USB_DEV_DIEPINT12_BNAINTR field value from a register. */
79324 #define ALT_USB_DEV_DIEPINT12_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
79325 /* Produces a ALT_USB_DEV_DIEPINT12_BNAINTR register field value suitable for setting the register. */
79326 #define ALT_USB_DEV_DIEPINT12_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
79327 
79328 /*
79329  * Field : Packet Drop Status - pktdrpsts
79330  *
79331  * This bit indicates to the application that an ISOC OUT packet has been dropped.
79332  * This bit does not have an associated mask bit and does not generate an
79333  * interrupt.
79334  *
79335  * Field Enumeration Values:
79336  *
79337  * Enum | Value | Description
79338  * :----------------------------------------|:------|:-----------------------------
79339  * ALT_USB_DEV_DIEPINT12_PKTDRPSTS_E_INACT | 0x0 | No interrupt
79340  * ALT_USB_DEV_DIEPINT12_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
79341  *
79342  * Field Access Macros:
79343  *
79344  */
79345 /*
79346  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_PKTDRPSTS
79347  *
79348  * No interrupt
79349  */
79350 #define ALT_USB_DEV_DIEPINT12_PKTDRPSTS_E_INACT 0x0
79351 /*
79352  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_PKTDRPSTS
79353  *
79354  * Packet Drop Status interrupt
79355  */
79356 #define ALT_USB_DEV_DIEPINT12_PKTDRPSTS_E_ACT 0x1
79357 
79358 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_PKTDRPSTS register field. */
79359 #define ALT_USB_DEV_DIEPINT12_PKTDRPSTS_LSB 11
79360 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_PKTDRPSTS register field. */
79361 #define ALT_USB_DEV_DIEPINT12_PKTDRPSTS_MSB 11
79362 /* The width in bits of the ALT_USB_DEV_DIEPINT12_PKTDRPSTS register field. */
79363 #define ALT_USB_DEV_DIEPINT12_PKTDRPSTS_WIDTH 1
79364 /* The mask used to set the ALT_USB_DEV_DIEPINT12_PKTDRPSTS register field value. */
79365 #define ALT_USB_DEV_DIEPINT12_PKTDRPSTS_SET_MSK 0x00000800
79366 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_PKTDRPSTS register field value. */
79367 #define ALT_USB_DEV_DIEPINT12_PKTDRPSTS_CLR_MSK 0xfffff7ff
79368 /* The reset value of the ALT_USB_DEV_DIEPINT12_PKTDRPSTS register field. */
79369 #define ALT_USB_DEV_DIEPINT12_PKTDRPSTS_RESET 0x0
79370 /* Extracts the ALT_USB_DEV_DIEPINT12_PKTDRPSTS field value from a register. */
79371 #define ALT_USB_DEV_DIEPINT12_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
79372 /* Produces a ALT_USB_DEV_DIEPINT12_PKTDRPSTS register field value suitable for setting the register. */
79373 #define ALT_USB_DEV_DIEPINT12_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
79374 
79375 /*
79376  * Field : BbleErr Interrupt ( - bbleerr
79377  *
79378  * The core generates this interrupt when babble is received for the endpoint.
79379  *
79380  * Field Enumeration Values:
79381  *
79382  * Enum | Value | Description
79383  * :--------------------------------------|:------|:------------------
79384  * ALT_USB_DEV_DIEPINT12_BBLEERR_E_INACT | 0x0 | No interrupt
79385  * ALT_USB_DEV_DIEPINT12_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
79386  *
79387  * Field Access Macros:
79388  *
79389  */
79390 /*
79391  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_BBLEERR
79392  *
79393  * No interrupt
79394  */
79395 #define ALT_USB_DEV_DIEPINT12_BBLEERR_E_INACT 0x0
79396 /*
79397  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_BBLEERR
79398  *
79399  * BbleErr interrupt
79400  */
79401 #define ALT_USB_DEV_DIEPINT12_BBLEERR_E_ACT 0x1
79402 
79403 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_BBLEERR register field. */
79404 #define ALT_USB_DEV_DIEPINT12_BBLEERR_LSB 12
79405 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_BBLEERR register field. */
79406 #define ALT_USB_DEV_DIEPINT12_BBLEERR_MSB 12
79407 /* The width in bits of the ALT_USB_DEV_DIEPINT12_BBLEERR register field. */
79408 #define ALT_USB_DEV_DIEPINT12_BBLEERR_WIDTH 1
79409 /* The mask used to set the ALT_USB_DEV_DIEPINT12_BBLEERR register field value. */
79410 #define ALT_USB_DEV_DIEPINT12_BBLEERR_SET_MSK 0x00001000
79411 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_BBLEERR register field value. */
79412 #define ALT_USB_DEV_DIEPINT12_BBLEERR_CLR_MSK 0xffffefff
79413 /* The reset value of the ALT_USB_DEV_DIEPINT12_BBLEERR register field. */
79414 #define ALT_USB_DEV_DIEPINT12_BBLEERR_RESET 0x0
79415 /* Extracts the ALT_USB_DEV_DIEPINT12_BBLEERR field value from a register. */
79416 #define ALT_USB_DEV_DIEPINT12_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
79417 /* Produces a ALT_USB_DEV_DIEPINT12_BBLEERR register field value suitable for setting the register. */
79418 #define ALT_USB_DEV_DIEPINT12_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
79419 
79420 /*
79421  * Field : NAK Interrupt - nakintrpt
79422  *
79423  * The core generates this interrupt when a NAK is transmitted or received by the
79424  * device. In case of isochronous IN endpoints the interrupt gets generated when a
79425  * zero length packet is transmitted due to un-availability of data in the TXFifo.
79426  *
79427  * Field Enumeration Values:
79428  *
79429  * Enum | Value | Description
79430  * :----------------------------------------|:------|:--------------
79431  * ALT_USB_DEV_DIEPINT12_NAKINTRPT_E_INACT | 0x0 | No interrupt
79432  * ALT_USB_DEV_DIEPINT12_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
79433  *
79434  * Field Access Macros:
79435  *
79436  */
79437 /*
79438  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_NAKINTRPT
79439  *
79440  * No interrupt
79441  */
79442 #define ALT_USB_DEV_DIEPINT12_NAKINTRPT_E_INACT 0x0
79443 /*
79444  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_NAKINTRPT
79445  *
79446  * NAK Interrupt
79447  */
79448 #define ALT_USB_DEV_DIEPINT12_NAKINTRPT_E_ACT 0x1
79449 
79450 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_NAKINTRPT register field. */
79451 #define ALT_USB_DEV_DIEPINT12_NAKINTRPT_LSB 13
79452 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_NAKINTRPT register field. */
79453 #define ALT_USB_DEV_DIEPINT12_NAKINTRPT_MSB 13
79454 /* The width in bits of the ALT_USB_DEV_DIEPINT12_NAKINTRPT register field. */
79455 #define ALT_USB_DEV_DIEPINT12_NAKINTRPT_WIDTH 1
79456 /* The mask used to set the ALT_USB_DEV_DIEPINT12_NAKINTRPT register field value. */
79457 #define ALT_USB_DEV_DIEPINT12_NAKINTRPT_SET_MSK 0x00002000
79458 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_NAKINTRPT register field value. */
79459 #define ALT_USB_DEV_DIEPINT12_NAKINTRPT_CLR_MSK 0xffffdfff
79460 /* The reset value of the ALT_USB_DEV_DIEPINT12_NAKINTRPT register field. */
79461 #define ALT_USB_DEV_DIEPINT12_NAKINTRPT_RESET 0x0
79462 /* Extracts the ALT_USB_DEV_DIEPINT12_NAKINTRPT field value from a register. */
79463 #define ALT_USB_DEV_DIEPINT12_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
79464 /* Produces a ALT_USB_DEV_DIEPINT12_NAKINTRPT register field value suitable for setting the register. */
79465 #define ALT_USB_DEV_DIEPINT12_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
79466 
79467 /*
79468  * Field : NYET Interrupt - nyetintrpt
79469  *
79470  * The core generates this interrupt when a NYET response is transmitted for a non
79471  * isochronous OUT endpoint.
79472  *
79473  * Field Enumeration Values:
79474  *
79475  * Enum | Value | Description
79476  * :-----------------------------------------|:------|:---------------
79477  * ALT_USB_DEV_DIEPINT12_NYETINTRPT_E_INACT | 0x0 | No interrupt
79478  * ALT_USB_DEV_DIEPINT12_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
79479  *
79480  * Field Access Macros:
79481  *
79482  */
79483 /*
79484  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_NYETINTRPT
79485  *
79486  * No interrupt
79487  */
79488 #define ALT_USB_DEV_DIEPINT12_NYETINTRPT_E_INACT 0x0
79489 /*
79490  * Enumerated value for register field ALT_USB_DEV_DIEPINT12_NYETINTRPT
79491  *
79492  * NYET Interrupt
79493  */
79494 #define ALT_USB_DEV_DIEPINT12_NYETINTRPT_E_ACT 0x1
79495 
79496 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT12_NYETINTRPT register field. */
79497 #define ALT_USB_DEV_DIEPINT12_NYETINTRPT_LSB 14
79498 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT12_NYETINTRPT register field. */
79499 #define ALT_USB_DEV_DIEPINT12_NYETINTRPT_MSB 14
79500 /* The width in bits of the ALT_USB_DEV_DIEPINT12_NYETINTRPT register field. */
79501 #define ALT_USB_DEV_DIEPINT12_NYETINTRPT_WIDTH 1
79502 /* The mask used to set the ALT_USB_DEV_DIEPINT12_NYETINTRPT register field value. */
79503 #define ALT_USB_DEV_DIEPINT12_NYETINTRPT_SET_MSK 0x00004000
79504 /* The mask used to clear the ALT_USB_DEV_DIEPINT12_NYETINTRPT register field value. */
79505 #define ALT_USB_DEV_DIEPINT12_NYETINTRPT_CLR_MSK 0xffffbfff
79506 /* The reset value of the ALT_USB_DEV_DIEPINT12_NYETINTRPT register field. */
79507 #define ALT_USB_DEV_DIEPINT12_NYETINTRPT_RESET 0x0
79508 /* Extracts the ALT_USB_DEV_DIEPINT12_NYETINTRPT field value from a register. */
79509 #define ALT_USB_DEV_DIEPINT12_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
79510 /* Produces a ALT_USB_DEV_DIEPINT12_NYETINTRPT register field value suitable for setting the register. */
79511 #define ALT_USB_DEV_DIEPINT12_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
79512 
79513 #ifndef __ASSEMBLY__
79514 /*
79515  * WARNING: The C register and register group struct declarations are provided for
79516  * convenience and illustrative purposes. They should, however, be used with
79517  * caution as the C language standard provides no guarantees about the alignment or
79518  * atomicity of device memory accesses. The recommended practice for writing
79519  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
79520  * alt_write_word() functions.
79521  *
79522  * The struct declaration for register ALT_USB_DEV_DIEPINT12.
79523  */
79524 struct ALT_USB_DEV_DIEPINT12_s
79525 {
79526  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
79527  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
79528  const uint32_t ahberr : 1; /* AHB Error */
79529  const uint32_t timeout : 1; /* Timeout Condition */
79530  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
79531  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
79532  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
79533  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
79534  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
79535  const uint32_t bnaintr : 1; /* BNA Interrupt */
79536  uint32_t : 1; /* *UNDEFINED* */
79537  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
79538  const uint32_t bbleerr : 1; /* BbleErr Interrupt ( */
79539  const uint32_t nakintrpt : 1; /* NAK Interrupt */
79540  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
79541  uint32_t : 17; /* *UNDEFINED* */
79542 };
79543 
79544 /* The typedef declaration for register ALT_USB_DEV_DIEPINT12. */
79545 typedef volatile struct ALT_USB_DEV_DIEPINT12_s ALT_USB_DEV_DIEPINT12_t;
79546 #endif /* __ASSEMBLY__ */
79547 
79548 /* The byte offset of the ALT_USB_DEV_DIEPINT12 register from the beginning of the component. */
79549 #define ALT_USB_DEV_DIEPINT12_OFST 0x288
79550 /* The address of the ALT_USB_DEV_DIEPINT12 register. */
79551 #define ALT_USB_DEV_DIEPINT12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT12_OFST))
79552 
79553 /*
79554  * Register : Device IN Endpoint 12 Transfer Size Register - dieptsiz12
79555  *
79556  * The application must modify this register before enabling the endpoint. Once the
79557  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
79558  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
79559  * application can only read this register once the core has cleared the Endpoint
79560  * Enable bit.
79561  *
79562  * Register Layout
79563  *
79564  * Bits | Access | Reset | Description
79565  * :--------|:-------|:------|:----------------------------
79566  * [18:0] | RW | 0x0 | Transfer Size
79567  * [28:19] | RW | 0x0 | Packet Count
79568  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
79569  * [31] | ??? | 0x0 | *UNDEFINED*
79570  *
79571  */
79572 /*
79573  * Field : Transfer Size - xfersize
79574  *
79575  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
79576  * application only after it has exhausted the transfer size amount of data. The
79577  * transfer size can be Set to the maximum packet size of the endpoint, to be
79578  * interrupted at the end of each packet. The core decrements this field every time
79579  * a packet from the external memory is written to the TxFIFO.
79580  *
79581  * Field Access Macros:
79582  *
79583  */
79584 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ12_XFERSIZE register field. */
79585 #define ALT_USB_DEV_DIEPTSIZ12_XFERSIZE_LSB 0
79586 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ12_XFERSIZE register field. */
79587 #define ALT_USB_DEV_DIEPTSIZ12_XFERSIZE_MSB 18
79588 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ12_XFERSIZE register field. */
79589 #define ALT_USB_DEV_DIEPTSIZ12_XFERSIZE_WIDTH 19
79590 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ12_XFERSIZE register field value. */
79591 #define ALT_USB_DEV_DIEPTSIZ12_XFERSIZE_SET_MSK 0x0007ffff
79592 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ12_XFERSIZE register field value. */
79593 #define ALT_USB_DEV_DIEPTSIZ12_XFERSIZE_CLR_MSK 0xfff80000
79594 /* The reset value of the ALT_USB_DEV_DIEPTSIZ12_XFERSIZE register field. */
79595 #define ALT_USB_DEV_DIEPTSIZ12_XFERSIZE_RESET 0x0
79596 /* Extracts the ALT_USB_DEV_DIEPTSIZ12_XFERSIZE field value from a register. */
79597 #define ALT_USB_DEV_DIEPTSIZ12_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
79598 /* Produces a ALT_USB_DEV_DIEPTSIZ12_XFERSIZE register field value suitable for setting the register. */
79599 #define ALT_USB_DEV_DIEPTSIZ12_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
79600 
79601 /*
79602  * Field : Packet Count - pktcnt
79603  *
79604  * Indicates the total number of USB packets that constitute the Transfer Size
79605  * amount of data for endpoint 0.This field is decremented every time a packet
79606  * (maximum size or short packet) is read from the TxFIFO.
79607  *
79608  * Field Access Macros:
79609  *
79610  */
79611 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ12_PKTCNT register field. */
79612 #define ALT_USB_DEV_DIEPTSIZ12_PKTCNT_LSB 19
79613 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ12_PKTCNT register field. */
79614 #define ALT_USB_DEV_DIEPTSIZ12_PKTCNT_MSB 28
79615 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ12_PKTCNT register field. */
79616 #define ALT_USB_DEV_DIEPTSIZ12_PKTCNT_WIDTH 10
79617 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ12_PKTCNT register field value. */
79618 #define ALT_USB_DEV_DIEPTSIZ12_PKTCNT_SET_MSK 0x1ff80000
79619 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ12_PKTCNT register field value. */
79620 #define ALT_USB_DEV_DIEPTSIZ12_PKTCNT_CLR_MSK 0xe007ffff
79621 /* The reset value of the ALT_USB_DEV_DIEPTSIZ12_PKTCNT register field. */
79622 #define ALT_USB_DEV_DIEPTSIZ12_PKTCNT_RESET 0x0
79623 /* Extracts the ALT_USB_DEV_DIEPTSIZ12_PKTCNT field value from a register. */
79624 #define ALT_USB_DEV_DIEPTSIZ12_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
79625 /* Produces a ALT_USB_DEV_DIEPTSIZ12_PKTCNT register field value suitable for setting the register. */
79626 #define ALT_USB_DEV_DIEPTSIZ12_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
79627 
79628 /*
79629  * Field : Applies to IN endpoints onl - mc
79630  *
79631  * for periodic IN endpoints, this field indicates the number of packets that must
79632  * be transmitted per microframe on the USB. The core uses this field to calculate
79633  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
79634  * field is valid only in Internal DMA mode. It specifies the number of packets the
79635  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
79636  * by the Next Endpoint field of the Device Endpoint-n Control register
79637  * (DIEPCTLn.NextEp)
79638  *
79639  * Field Enumeration Values:
79640  *
79641  * Enum | Value | Description
79642  * :-------------------------------------|:------|:------------
79643  * ALT_USB_DEV_DIEPTSIZ12_MC_E_PKTONE | 0x1 | 1 packet
79644  * ALT_USB_DEV_DIEPTSIZ12_MC_E_PKTTWO | 0x2 | 2 packets
79645  * ALT_USB_DEV_DIEPTSIZ12_MC_E_PKTTHREE | 0x3 | 3 packets
79646  *
79647  * Field Access Macros:
79648  *
79649  */
79650 /*
79651  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ12_MC
79652  *
79653  * 1 packet
79654  */
79655 #define ALT_USB_DEV_DIEPTSIZ12_MC_E_PKTONE 0x1
79656 /*
79657  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ12_MC
79658  *
79659  * 2 packets
79660  */
79661 #define ALT_USB_DEV_DIEPTSIZ12_MC_E_PKTTWO 0x2
79662 /*
79663  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ12_MC
79664  *
79665  * 3 packets
79666  */
79667 #define ALT_USB_DEV_DIEPTSIZ12_MC_E_PKTTHREE 0x3
79668 
79669 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ12_MC register field. */
79670 #define ALT_USB_DEV_DIEPTSIZ12_MC_LSB 29
79671 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ12_MC register field. */
79672 #define ALT_USB_DEV_DIEPTSIZ12_MC_MSB 30
79673 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ12_MC register field. */
79674 #define ALT_USB_DEV_DIEPTSIZ12_MC_WIDTH 2
79675 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ12_MC register field value. */
79676 #define ALT_USB_DEV_DIEPTSIZ12_MC_SET_MSK 0x60000000
79677 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ12_MC register field value. */
79678 #define ALT_USB_DEV_DIEPTSIZ12_MC_CLR_MSK 0x9fffffff
79679 /* The reset value of the ALT_USB_DEV_DIEPTSIZ12_MC register field. */
79680 #define ALT_USB_DEV_DIEPTSIZ12_MC_RESET 0x0
79681 /* Extracts the ALT_USB_DEV_DIEPTSIZ12_MC field value from a register. */
79682 #define ALT_USB_DEV_DIEPTSIZ12_MC_GET(value) (((value) & 0x60000000) >> 29)
79683 /* Produces a ALT_USB_DEV_DIEPTSIZ12_MC register field value suitable for setting the register. */
79684 #define ALT_USB_DEV_DIEPTSIZ12_MC_SET(value) (((value) << 29) & 0x60000000)
79685 
79686 #ifndef __ASSEMBLY__
79687 /*
79688  * WARNING: The C register and register group struct declarations are provided for
79689  * convenience and illustrative purposes. They should, however, be used with
79690  * caution as the C language standard provides no guarantees about the alignment or
79691  * atomicity of device memory accesses. The recommended practice for writing
79692  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
79693  * alt_write_word() functions.
79694  *
79695  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ12.
79696  */
79697 struct ALT_USB_DEV_DIEPTSIZ12_s
79698 {
79699  uint32_t xfersize : 19; /* Transfer Size */
79700  uint32_t pktcnt : 10; /* Packet Count */
79701  uint32_t mc : 2; /* Applies to IN endpoints onl */
79702  uint32_t : 1; /* *UNDEFINED* */
79703 };
79704 
79705 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ12. */
79706 typedef volatile struct ALT_USB_DEV_DIEPTSIZ12_s ALT_USB_DEV_DIEPTSIZ12_t;
79707 #endif /* __ASSEMBLY__ */
79708 
79709 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ12 register from the beginning of the component. */
79710 #define ALT_USB_DEV_DIEPTSIZ12_OFST 0x290
79711 /* The address of the ALT_USB_DEV_DIEPTSIZ12 register. */
79712 #define ALT_USB_DEV_DIEPTSIZ12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ12_OFST))
79713 
79714 /*
79715  * Register : Device IN Endpoint 12 DMA Address Register - diepdma12
79716  *
79717  * DMA Addressing.
79718  *
79719  * Register Layout
79720  *
79721  * Bits | Access | Reset | Description
79722  * :-------|:-------|:--------|:------------
79723  * [31:0] | RW | Unknown | DMA Address
79724  *
79725  */
79726 /*
79727  * Field : DMA Address - diepdma12
79728  *
79729  * Holds the start address of the external memory for storing or fetching endpoint
79730  * data. for control endpoints, this field stores control OUT data packets as well
79731  * as SETUP transaction data packets. When more than three SETUP packets are
79732  * received back-to-back, the SETUP data packet in the memory is overwritten. This
79733  * register is incremented on every AHB transaction. The application can give only
79734  * a DWORD-aligned address.
79735  *
79736  * When Scatter/Gather DMA mode is not enabled, the application programs the start
79737  * address value in this field.
79738  *
79739  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
79740  * for the descriptor list.
79741  *
79742  * Field Access Macros:
79743  *
79744  */
79745 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA12_DIEPDMA12 register field. */
79746 #define ALT_USB_DEV_DIEPDMA12_DIEPDMA12_LSB 0
79747 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA12_DIEPDMA12 register field. */
79748 #define ALT_USB_DEV_DIEPDMA12_DIEPDMA12_MSB 31
79749 /* The width in bits of the ALT_USB_DEV_DIEPDMA12_DIEPDMA12 register field. */
79750 #define ALT_USB_DEV_DIEPDMA12_DIEPDMA12_WIDTH 32
79751 /* The mask used to set the ALT_USB_DEV_DIEPDMA12_DIEPDMA12 register field value. */
79752 #define ALT_USB_DEV_DIEPDMA12_DIEPDMA12_SET_MSK 0xffffffff
79753 /* The mask used to clear the ALT_USB_DEV_DIEPDMA12_DIEPDMA12 register field value. */
79754 #define ALT_USB_DEV_DIEPDMA12_DIEPDMA12_CLR_MSK 0x00000000
79755 /* The reset value of the ALT_USB_DEV_DIEPDMA12_DIEPDMA12 register field is UNKNOWN. */
79756 #define ALT_USB_DEV_DIEPDMA12_DIEPDMA12_RESET 0x0
79757 /* Extracts the ALT_USB_DEV_DIEPDMA12_DIEPDMA12 field value from a register. */
79758 #define ALT_USB_DEV_DIEPDMA12_DIEPDMA12_GET(value) (((value) & 0xffffffff) >> 0)
79759 /* Produces a ALT_USB_DEV_DIEPDMA12_DIEPDMA12 register field value suitable for setting the register. */
79760 #define ALT_USB_DEV_DIEPDMA12_DIEPDMA12_SET(value) (((value) << 0) & 0xffffffff)
79761 
79762 #ifndef __ASSEMBLY__
79763 /*
79764  * WARNING: The C register and register group struct declarations are provided for
79765  * convenience and illustrative purposes. They should, however, be used with
79766  * caution as the C language standard provides no guarantees about the alignment or
79767  * atomicity of device memory accesses. The recommended practice for writing
79768  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
79769  * alt_write_word() functions.
79770  *
79771  * The struct declaration for register ALT_USB_DEV_DIEPDMA12.
79772  */
79773 struct ALT_USB_DEV_DIEPDMA12_s
79774 {
79775  uint32_t diepdma12 : 32; /* DMA Address */
79776 };
79777 
79778 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA12. */
79779 typedef volatile struct ALT_USB_DEV_DIEPDMA12_s ALT_USB_DEV_DIEPDMA12_t;
79780 #endif /* __ASSEMBLY__ */
79781 
79782 /* The byte offset of the ALT_USB_DEV_DIEPDMA12 register from the beginning of the component. */
79783 #define ALT_USB_DEV_DIEPDMA12_OFST 0x294
79784 /* The address of the ALT_USB_DEV_DIEPDMA12 register. */
79785 #define ALT_USB_DEV_DIEPDMA12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA12_OFST))
79786 
79787 /*
79788  * Register : Device IN Endpoint Transmit FIFO Status Register 12 - dtxfsts12
79789  *
79790  * This register contains the free space information for the Device IN endpoint
79791  * TxFIFO.
79792  *
79793  * Register Layout
79794  *
79795  * Bits | Access | Reset | Description
79796  * :--------|:-------|:-------|:-------------------------------
79797  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
79798  * [31:16] | ??? | 0x0 | *UNDEFINED*
79799  *
79800  */
79801 /*
79802  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
79803  *
79804  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
79805  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
79806  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
79807  * 32,768 words available Others: Reserved
79808  *
79809  * Field Access Macros:
79810  *
79811  */
79812 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL register field. */
79813 #define ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL_LSB 0
79814 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL register field. */
79815 #define ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL_MSB 15
79816 /* The width in bits of the ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL register field. */
79817 #define ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL_WIDTH 16
79818 /* The mask used to set the ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL register field value. */
79819 #define ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
79820 /* The mask used to clear the ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL register field value. */
79821 #define ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
79822 /* The reset value of the ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL register field. */
79823 #define ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL_RESET 0x2000
79824 /* Extracts the ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL field value from a register. */
79825 #define ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
79826 /* Produces a ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL register field value suitable for setting the register. */
79827 #define ALT_USB_DEV_DTXFSTS12_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
79828 
79829 #ifndef __ASSEMBLY__
79830 /*
79831  * WARNING: The C register and register group struct declarations are provided for
79832  * convenience and illustrative purposes. They should, however, be used with
79833  * caution as the C language standard provides no guarantees about the alignment or
79834  * atomicity of device memory accesses. The recommended practice for writing
79835  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
79836  * alt_write_word() functions.
79837  *
79838  * The struct declaration for register ALT_USB_DEV_DTXFSTS12.
79839  */
79840 struct ALT_USB_DEV_DTXFSTS12_s
79841 {
79842  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
79843  uint32_t : 16; /* *UNDEFINED* */
79844 };
79845 
79846 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS12. */
79847 typedef volatile struct ALT_USB_DEV_DTXFSTS12_s ALT_USB_DEV_DTXFSTS12_t;
79848 #endif /* __ASSEMBLY__ */
79849 
79850 /* The byte offset of the ALT_USB_DEV_DTXFSTS12 register from the beginning of the component. */
79851 #define ALT_USB_DEV_DTXFSTS12_OFST 0x298
79852 /* The address of the ALT_USB_DEV_DTXFSTS12 register. */
79853 #define ALT_USB_DEV_DTXFSTS12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS12_OFST))
79854 
79855 /*
79856  * Register : Device IN Endpoint 12 DMA Buffer Address Register - diepdmab12
79857  *
79858  * DMA Buffer Address.
79859  *
79860  * Register Layout
79861  *
79862  * Bits | Access | Reset | Description
79863  * :-------|:-------|:--------|:-------------------
79864  * [31:0] | R | Unknown | DMA Buffer Address
79865  *
79866  */
79867 /*
79868  * Field : DMA Buffer Address - diepdmab12
79869  *
79870  * Holds the current buffer address. This register is updated as and when the data
79871  * transfer for the corresponding end point is in progress. This register is
79872  * present only in Scatter/Gather DMA mode.
79873  *
79874  * Field Access Macros:
79875  *
79876  */
79877 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12 register field. */
79878 #define ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12_LSB 0
79879 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12 register field. */
79880 #define ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12_MSB 31
79881 /* The width in bits of the ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12 register field. */
79882 #define ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12_WIDTH 32
79883 /* The mask used to set the ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12 register field value. */
79884 #define ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12_SET_MSK 0xffffffff
79885 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12 register field value. */
79886 #define ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12_CLR_MSK 0x00000000
79887 /* The reset value of the ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12 register field is UNKNOWN. */
79888 #define ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12_RESET 0x0
79889 /* Extracts the ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12 field value from a register. */
79890 #define ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12_GET(value) (((value) & 0xffffffff) >> 0)
79891 /* Produces a ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12 register field value suitable for setting the register. */
79892 #define ALT_USB_DEV_DIEPDMAB12_DIEPDMAB12_SET(value) (((value) << 0) & 0xffffffff)
79893 
79894 #ifndef __ASSEMBLY__
79895 /*
79896  * WARNING: The C register and register group struct declarations are provided for
79897  * convenience and illustrative purposes. They should, however, be used with
79898  * caution as the C language standard provides no guarantees about the alignment or
79899  * atomicity of device memory accesses. The recommended practice for writing
79900  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
79901  * alt_write_word() functions.
79902  *
79903  * The struct declaration for register ALT_USB_DEV_DIEPDMAB12.
79904  */
79905 struct ALT_USB_DEV_DIEPDMAB12_s
79906 {
79907  const uint32_t diepdmab12 : 32; /* DMA Buffer Address */
79908 };
79909 
79910 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB12. */
79911 typedef volatile struct ALT_USB_DEV_DIEPDMAB12_s ALT_USB_DEV_DIEPDMAB12_t;
79912 #endif /* __ASSEMBLY__ */
79913 
79914 /* The byte offset of the ALT_USB_DEV_DIEPDMAB12 register from the beginning of the component. */
79915 #define ALT_USB_DEV_DIEPDMAB12_OFST 0x29c
79916 /* The address of the ALT_USB_DEV_DIEPDMAB12 register. */
79917 #define ALT_USB_DEV_DIEPDMAB12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB12_OFST))
79918 
79919 /*
79920  * Register : Device Control IN Endpoint 13 Control Register - diepctl13
79921  *
79922  * Endpoint_number: 13
79923  *
79924  * Register Layout
79925  *
79926  * Bits | Access | Reset | Description
79927  * :--------|:-------|:------|:--------------------
79928  * [10:0] | RW | 0x0 | Maximum Packet Size
79929  * [14:11] | ??? | 0x0 | *UNDEFINED*
79930  * [15] | RW | 0x0 | USB Active Endpoint
79931  * [16] | R | 0x0 | Endpoint Data PID
79932  * [17] | R | 0x0 | NAK Status
79933  * [19:18] | RW | 0x0 | Endpoint Type
79934  * [20] | ??? | 0x0 | *UNDEFINED*
79935  * [21] | R | 0x0 | STALL Handshake
79936  * [25:22] | RW | 0x0 | TxFIFO Number
79937  * [26] | W | 0x0 | Clear NAK
79938  * [27] | W | 0x0 | Set NAK
79939  * [28] | W | 0x0 | Set DATA0 PID
79940  * [29] | W | 0x0 | Set DATA1 PID
79941  * [30] | R | 0x0 | Endpoint Disable
79942  * [31] | R | 0x0 | Endpoint Enable
79943  *
79944  */
79945 /*
79946  * Field : Maximum Packet Size - mps
79947  *
79948  * Applies to IN and OUT endpoints. The application must program this field with
79949  * the maximum packet size for the current logical endpoint. This value is in
79950  * bytes.
79951  *
79952  * Field Access Macros:
79953  *
79954  */
79955 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_MPS register field. */
79956 #define ALT_USB_DEV_DIEPCTL13_MPS_LSB 0
79957 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_MPS register field. */
79958 #define ALT_USB_DEV_DIEPCTL13_MPS_MSB 10
79959 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_MPS register field. */
79960 #define ALT_USB_DEV_DIEPCTL13_MPS_WIDTH 11
79961 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_MPS register field value. */
79962 #define ALT_USB_DEV_DIEPCTL13_MPS_SET_MSK 0x000007ff
79963 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_MPS register field value. */
79964 #define ALT_USB_DEV_DIEPCTL13_MPS_CLR_MSK 0xfffff800
79965 /* The reset value of the ALT_USB_DEV_DIEPCTL13_MPS register field. */
79966 #define ALT_USB_DEV_DIEPCTL13_MPS_RESET 0x0
79967 /* Extracts the ALT_USB_DEV_DIEPCTL13_MPS field value from a register. */
79968 #define ALT_USB_DEV_DIEPCTL13_MPS_GET(value) (((value) & 0x000007ff) >> 0)
79969 /* Produces a ALT_USB_DEV_DIEPCTL13_MPS register field value suitable for setting the register. */
79970 #define ALT_USB_DEV_DIEPCTL13_MPS_SET(value) (((value) << 0) & 0x000007ff)
79971 
79972 /*
79973  * Field : USB Active Endpoint - usbactep
79974  *
79975  * Indicates whether this endpoint is active in the current configuration and
79976  * interface. The core clears this bit for all endpoints (other than EP 0) after
79977  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
79978  * commands, the application must program endpoint registers accordingly and set
79979  * this bit.
79980  *
79981  * Field Enumeration Values:
79982  *
79983  * Enum | Value | Description
79984  * :--------------------------------------|:------|:--------------------
79985  * ALT_USB_DEV_DIEPCTL13_USBACTEP_E_DISD | 0x0 | Not Active
79986  * ALT_USB_DEV_DIEPCTL13_USBACTEP_E_END | 0x1 | USB Active Endpoint
79987  *
79988  * Field Access Macros:
79989  *
79990  */
79991 /*
79992  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_USBACTEP
79993  *
79994  * Not Active
79995  */
79996 #define ALT_USB_DEV_DIEPCTL13_USBACTEP_E_DISD 0x0
79997 /*
79998  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_USBACTEP
79999  *
80000  * USB Active Endpoint
80001  */
80002 #define ALT_USB_DEV_DIEPCTL13_USBACTEP_E_END 0x1
80003 
80004 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_USBACTEP register field. */
80005 #define ALT_USB_DEV_DIEPCTL13_USBACTEP_LSB 15
80006 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_USBACTEP register field. */
80007 #define ALT_USB_DEV_DIEPCTL13_USBACTEP_MSB 15
80008 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_USBACTEP register field. */
80009 #define ALT_USB_DEV_DIEPCTL13_USBACTEP_WIDTH 1
80010 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_USBACTEP register field value. */
80011 #define ALT_USB_DEV_DIEPCTL13_USBACTEP_SET_MSK 0x00008000
80012 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_USBACTEP register field value. */
80013 #define ALT_USB_DEV_DIEPCTL13_USBACTEP_CLR_MSK 0xffff7fff
80014 /* The reset value of the ALT_USB_DEV_DIEPCTL13_USBACTEP register field. */
80015 #define ALT_USB_DEV_DIEPCTL13_USBACTEP_RESET 0x0
80016 /* Extracts the ALT_USB_DEV_DIEPCTL13_USBACTEP field value from a register. */
80017 #define ALT_USB_DEV_DIEPCTL13_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
80018 /* Produces a ALT_USB_DEV_DIEPCTL13_USBACTEP register field value suitable for setting the register. */
80019 #define ALT_USB_DEV_DIEPCTL13_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
80020 
80021 /*
80022  * Field : Endpoint Data PID - dpid
80023  *
80024  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
80025  * packet to be received or transmitted on this endpoint. The application must
80026  * program the PID of the first packet to be received or transmitted on this
80027  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
80028  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
80029  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
80030  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
80031  * DMA mode:
80032  *
80033  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
80034  * number in which the core transmits/receives isochronous data for this endpoint.
80035  * The application must program the even/odd (micro) frame number in which it
80036  * intends to transmit/receive isochronous data for this endpoint using the
80037  * SetEvnFr and SetOddFr fields in this register.
80038  *
80039  * 0: Even (micro)frame
80040  *
80041  * 1: Odd (micro)frame
80042  *
80043  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
80044  * number in which to send data is provided in the transmit descriptor structure.
80045  * The frame in which data is received is updated in receive descriptor structure.
80046  *
80047  * Field Enumeration Values:
80048  *
80049  * Enum | Value | Description
80050  * :-----------------------------------|:------|:-----------------------------
80051  * ALT_USB_DEV_DIEPCTL13_DPID_E_INACT | 0x0 | Endpoint Data PID not active
80052  * ALT_USB_DEV_DIEPCTL13_DPID_E_ACT | 0x1 | Endpoint Data PID active
80053  *
80054  * Field Access Macros:
80055  *
80056  */
80057 /*
80058  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_DPID
80059  *
80060  * Endpoint Data PID not active
80061  */
80062 #define ALT_USB_DEV_DIEPCTL13_DPID_E_INACT 0x0
80063 /*
80064  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_DPID
80065  *
80066  * Endpoint Data PID active
80067  */
80068 #define ALT_USB_DEV_DIEPCTL13_DPID_E_ACT 0x1
80069 
80070 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_DPID register field. */
80071 #define ALT_USB_DEV_DIEPCTL13_DPID_LSB 16
80072 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_DPID register field. */
80073 #define ALT_USB_DEV_DIEPCTL13_DPID_MSB 16
80074 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_DPID register field. */
80075 #define ALT_USB_DEV_DIEPCTL13_DPID_WIDTH 1
80076 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_DPID register field value. */
80077 #define ALT_USB_DEV_DIEPCTL13_DPID_SET_MSK 0x00010000
80078 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_DPID register field value. */
80079 #define ALT_USB_DEV_DIEPCTL13_DPID_CLR_MSK 0xfffeffff
80080 /* The reset value of the ALT_USB_DEV_DIEPCTL13_DPID register field. */
80081 #define ALT_USB_DEV_DIEPCTL13_DPID_RESET 0x0
80082 /* Extracts the ALT_USB_DEV_DIEPCTL13_DPID field value from a register. */
80083 #define ALT_USB_DEV_DIEPCTL13_DPID_GET(value) (((value) & 0x00010000) >> 16)
80084 /* Produces a ALT_USB_DEV_DIEPCTL13_DPID register field value suitable for setting the register. */
80085 #define ALT_USB_DEV_DIEPCTL13_DPID_SET(value) (((value) << 16) & 0x00010000)
80086 
80087 /*
80088  * Field : NAK Status - naksts
80089  *
80090  * When either the application or the core sets this bit:
80091  *
80092  * * The core stops receiving any data on an OUT endpoint, even if there is space
80093  * in the RxFIFO to accommodate the incoming packet.
80094  *
80095  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
80096  * IN endpoint, even if there data is available in the TxFIFO.
80097  *
80098  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
80099  * even if there data is available in the TxFIFO.
80100  *
80101  * Irrespective of this bit's setting, the core always responds to SETUP data
80102  * packets with an ACK handshake.
80103  *
80104  * Field Enumeration Values:
80105  *
80106  * Enum | Value | Description
80107  * :--------------------------------------|:------|:------------------------------------------------
80108  * ALT_USB_DEV_DIEPCTL13_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
80109  * : | | based on the FIFO status
80110  * ALT_USB_DEV_DIEPCTL13_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
80111  * : | | endpoint
80112  *
80113  * Field Access Macros:
80114  *
80115  */
80116 /*
80117  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_NAKSTS
80118  *
80119  * The core is transmitting non-NAK handshakes based on the FIFO status
80120  */
80121 #define ALT_USB_DEV_DIEPCTL13_NAKSTS_E_NONNAK 0x0
80122 /*
80123  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_NAKSTS
80124  *
80125  * The core is transmitting NAK handshakes on this endpoint
80126  */
80127 #define ALT_USB_DEV_DIEPCTL13_NAKSTS_E_NAK 0x1
80128 
80129 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_NAKSTS register field. */
80130 #define ALT_USB_DEV_DIEPCTL13_NAKSTS_LSB 17
80131 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_NAKSTS register field. */
80132 #define ALT_USB_DEV_DIEPCTL13_NAKSTS_MSB 17
80133 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_NAKSTS register field. */
80134 #define ALT_USB_DEV_DIEPCTL13_NAKSTS_WIDTH 1
80135 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_NAKSTS register field value. */
80136 #define ALT_USB_DEV_DIEPCTL13_NAKSTS_SET_MSK 0x00020000
80137 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_NAKSTS register field value. */
80138 #define ALT_USB_DEV_DIEPCTL13_NAKSTS_CLR_MSK 0xfffdffff
80139 /* The reset value of the ALT_USB_DEV_DIEPCTL13_NAKSTS register field. */
80140 #define ALT_USB_DEV_DIEPCTL13_NAKSTS_RESET 0x0
80141 /* Extracts the ALT_USB_DEV_DIEPCTL13_NAKSTS field value from a register. */
80142 #define ALT_USB_DEV_DIEPCTL13_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
80143 /* Produces a ALT_USB_DEV_DIEPCTL13_NAKSTS register field value suitable for setting the register. */
80144 #define ALT_USB_DEV_DIEPCTL13_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
80145 
80146 /*
80147  * Field : Endpoint Type - eptype
80148  *
80149  * This is the transfer type supported by this logical endpoint.
80150  *
80151  * Field Enumeration Values:
80152  *
80153  * Enum | Value | Description
80154  * :-------------------------------------------|:------|:------------
80155  * ALT_USB_DEV_DIEPCTL13_EPTYPE_E_CTL | 0x0 | Control
80156  * ALT_USB_DEV_DIEPCTL13_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
80157  * ALT_USB_DEV_DIEPCTL13_EPTYPE_E_BULK | 0x2 | Bulk
80158  * ALT_USB_DEV_DIEPCTL13_EPTYPE_E_INTERRUP | 0x3 | Interrupt
80159  *
80160  * Field Access Macros:
80161  *
80162  */
80163 /*
80164  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_EPTYPE
80165  *
80166  * Control
80167  */
80168 #define ALT_USB_DEV_DIEPCTL13_EPTYPE_E_CTL 0x0
80169 /*
80170  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_EPTYPE
80171  *
80172  * Isochronous
80173  */
80174 #define ALT_USB_DEV_DIEPCTL13_EPTYPE_E_ISOCHRONOUS 0x1
80175 /*
80176  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_EPTYPE
80177  *
80178  * Bulk
80179  */
80180 #define ALT_USB_DEV_DIEPCTL13_EPTYPE_E_BULK 0x2
80181 /*
80182  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_EPTYPE
80183  *
80184  * Interrupt
80185  */
80186 #define ALT_USB_DEV_DIEPCTL13_EPTYPE_E_INTERRUP 0x3
80187 
80188 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_EPTYPE register field. */
80189 #define ALT_USB_DEV_DIEPCTL13_EPTYPE_LSB 18
80190 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_EPTYPE register field. */
80191 #define ALT_USB_DEV_DIEPCTL13_EPTYPE_MSB 19
80192 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_EPTYPE register field. */
80193 #define ALT_USB_DEV_DIEPCTL13_EPTYPE_WIDTH 2
80194 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_EPTYPE register field value. */
80195 #define ALT_USB_DEV_DIEPCTL13_EPTYPE_SET_MSK 0x000c0000
80196 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_EPTYPE register field value. */
80197 #define ALT_USB_DEV_DIEPCTL13_EPTYPE_CLR_MSK 0xfff3ffff
80198 /* The reset value of the ALT_USB_DEV_DIEPCTL13_EPTYPE register field. */
80199 #define ALT_USB_DEV_DIEPCTL13_EPTYPE_RESET 0x0
80200 /* Extracts the ALT_USB_DEV_DIEPCTL13_EPTYPE field value from a register. */
80201 #define ALT_USB_DEV_DIEPCTL13_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
80202 /* Produces a ALT_USB_DEV_DIEPCTL13_EPTYPE register field value suitable for setting the register. */
80203 #define ALT_USB_DEV_DIEPCTL13_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
80204 
80205 /*
80206  * Field : STALL Handshake - stall
80207  *
80208  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
80209  * application sets this bit to stall all tokens from the USB host to this
80210  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
80211  * along with this bit, the STALL bit takes priority. Only the application can
80212  * clear this bit, never the core. Applies to control endpoints only. The
80213  * application can only set this bit, and the core clears it, when a SETUP token is
80214  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
80215  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
80216  * of this bit's setting, the core always responds to SETUP data packets with an
80217  * ACK handshake.
80218  *
80219  * Field Enumeration Values:
80220  *
80221  * Enum | Value | Description
80222  * :------------------------------------|:------|:----------------------------
80223  * ALT_USB_DEV_DIEPCTL13_STALL_E_INACT | 0x0 | STALL All Tokens not active
80224  * ALT_USB_DEV_DIEPCTL13_STALL_E_ACT | 0x1 | STALL All Tokens active
80225  *
80226  * Field Access Macros:
80227  *
80228  */
80229 /*
80230  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_STALL
80231  *
80232  * STALL All Tokens not active
80233  */
80234 #define ALT_USB_DEV_DIEPCTL13_STALL_E_INACT 0x0
80235 /*
80236  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_STALL
80237  *
80238  * STALL All Tokens active
80239  */
80240 #define ALT_USB_DEV_DIEPCTL13_STALL_E_ACT 0x1
80241 
80242 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_STALL register field. */
80243 #define ALT_USB_DEV_DIEPCTL13_STALL_LSB 21
80244 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_STALL register field. */
80245 #define ALT_USB_DEV_DIEPCTL13_STALL_MSB 21
80246 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_STALL register field. */
80247 #define ALT_USB_DEV_DIEPCTL13_STALL_WIDTH 1
80248 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_STALL register field value. */
80249 #define ALT_USB_DEV_DIEPCTL13_STALL_SET_MSK 0x00200000
80250 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_STALL register field value. */
80251 #define ALT_USB_DEV_DIEPCTL13_STALL_CLR_MSK 0xffdfffff
80252 /* The reset value of the ALT_USB_DEV_DIEPCTL13_STALL register field. */
80253 #define ALT_USB_DEV_DIEPCTL13_STALL_RESET 0x0
80254 /* Extracts the ALT_USB_DEV_DIEPCTL13_STALL field value from a register. */
80255 #define ALT_USB_DEV_DIEPCTL13_STALL_GET(value) (((value) & 0x00200000) >> 21)
80256 /* Produces a ALT_USB_DEV_DIEPCTL13_STALL register field value suitable for setting the register. */
80257 #define ALT_USB_DEV_DIEPCTL13_STALL_SET(value) (((value) << 21) & 0x00200000)
80258 
80259 /*
80260  * Field : TxFIFO Number - txfnum
80261  *
80262  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
80263  * endpoints must map this to the corresponding Periodic TxFIFO number.
80264  *
80265  * 4'h0: Non-Periodic TxFIFO
80266  *
80267  * Others: Specified Periodic TxFIFO.number
80268  *
80269  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
80270  * applications such as mass storage. The core treats an IN endpoint as a non-
80271  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
80272  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
80273  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
80274  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
80275  * This field is valid only for IN endpoints.
80276  *
80277  * Field Access Macros:
80278  *
80279  */
80280 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_TXFNUM register field. */
80281 #define ALT_USB_DEV_DIEPCTL13_TXFNUM_LSB 22
80282 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_TXFNUM register field. */
80283 #define ALT_USB_DEV_DIEPCTL13_TXFNUM_MSB 25
80284 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_TXFNUM register field. */
80285 #define ALT_USB_DEV_DIEPCTL13_TXFNUM_WIDTH 4
80286 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_TXFNUM register field value. */
80287 #define ALT_USB_DEV_DIEPCTL13_TXFNUM_SET_MSK 0x03c00000
80288 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_TXFNUM register field value. */
80289 #define ALT_USB_DEV_DIEPCTL13_TXFNUM_CLR_MSK 0xfc3fffff
80290 /* The reset value of the ALT_USB_DEV_DIEPCTL13_TXFNUM register field. */
80291 #define ALT_USB_DEV_DIEPCTL13_TXFNUM_RESET 0x0
80292 /* Extracts the ALT_USB_DEV_DIEPCTL13_TXFNUM field value from a register. */
80293 #define ALT_USB_DEV_DIEPCTL13_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
80294 /* Produces a ALT_USB_DEV_DIEPCTL13_TXFNUM register field value suitable for setting the register. */
80295 #define ALT_USB_DEV_DIEPCTL13_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
80296 
80297 /*
80298  * Field : Clear NAK - cnak
80299  *
80300  * A write to this bit clears the NAK bit for the endpoint.
80301  *
80302  * Field Enumeration Values:
80303  *
80304  * Enum | Value | Description
80305  * :-----------------------------------|:------|:-------------
80306  * ALT_USB_DEV_DIEPCTL13_CNAK_E_INACT | 0x0 | No Clear NAK
80307  * ALT_USB_DEV_DIEPCTL13_CNAK_E_ACT | 0x1 | Clear NAK
80308  *
80309  * Field Access Macros:
80310  *
80311  */
80312 /*
80313  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_CNAK
80314  *
80315  * No Clear NAK
80316  */
80317 #define ALT_USB_DEV_DIEPCTL13_CNAK_E_INACT 0x0
80318 /*
80319  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_CNAK
80320  *
80321  * Clear NAK
80322  */
80323 #define ALT_USB_DEV_DIEPCTL13_CNAK_E_ACT 0x1
80324 
80325 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_CNAK register field. */
80326 #define ALT_USB_DEV_DIEPCTL13_CNAK_LSB 26
80327 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_CNAK register field. */
80328 #define ALT_USB_DEV_DIEPCTL13_CNAK_MSB 26
80329 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_CNAK register field. */
80330 #define ALT_USB_DEV_DIEPCTL13_CNAK_WIDTH 1
80331 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_CNAK register field value. */
80332 #define ALT_USB_DEV_DIEPCTL13_CNAK_SET_MSK 0x04000000
80333 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_CNAK register field value. */
80334 #define ALT_USB_DEV_DIEPCTL13_CNAK_CLR_MSK 0xfbffffff
80335 /* The reset value of the ALT_USB_DEV_DIEPCTL13_CNAK register field. */
80336 #define ALT_USB_DEV_DIEPCTL13_CNAK_RESET 0x0
80337 /* Extracts the ALT_USB_DEV_DIEPCTL13_CNAK field value from a register. */
80338 #define ALT_USB_DEV_DIEPCTL13_CNAK_GET(value) (((value) & 0x04000000) >> 26)
80339 /* Produces a ALT_USB_DEV_DIEPCTL13_CNAK register field value suitable for setting the register. */
80340 #define ALT_USB_DEV_DIEPCTL13_CNAK_SET(value) (((value) << 26) & 0x04000000)
80341 
80342 /*
80343  * Field : Set NAK - snak
80344  *
80345  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
80346  * application can control the transmission of NAK handshakes on an endpoint. The
80347  * core can also Set this bit for an endpoint after a SETUP packet is received on
80348  * that endpoint.
80349  *
80350  * Field Enumeration Values:
80351  *
80352  * Enum | Value | Description
80353  * :-----------------------------------|:------|:------------
80354  * ALT_USB_DEV_DIEPCTL13_SNAK_E_INACT | 0x0 | No Set NAK
80355  * ALT_USB_DEV_DIEPCTL13_SNAK_E_ACT | 0x1 | Set NAK
80356  *
80357  * Field Access Macros:
80358  *
80359  */
80360 /*
80361  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_SNAK
80362  *
80363  * No Set NAK
80364  */
80365 #define ALT_USB_DEV_DIEPCTL13_SNAK_E_INACT 0x0
80366 /*
80367  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_SNAK
80368  *
80369  * Set NAK
80370  */
80371 #define ALT_USB_DEV_DIEPCTL13_SNAK_E_ACT 0x1
80372 
80373 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_SNAK register field. */
80374 #define ALT_USB_DEV_DIEPCTL13_SNAK_LSB 27
80375 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_SNAK register field. */
80376 #define ALT_USB_DEV_DIEPCTL13_SNAK_MSB 27
80377 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_SNAK register field. */
80378 #define ALT_USB_DEV_DIEPCTL13_SNAK_WIDTH 1
80379 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_SNAK register field value. */
80380 #define ALT_USB_DEV_DIEPCTL13_SNAK_SET_MSK 0x08000000
80381 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_SNAK register field value. */
80382 #define ALT_USB_DEV_DIEPCTL13_SNAK_CLR_MSK 0xf7ffffff
80383 /* The reset value of the ALT_USB_DEV_DIEPCTL13_SNAK register field. */
80384 #define ALT_USB_DEV_DIEPCTL13_SNAK_RESET 0x0
80385 /* Extracts the ALT_USB_DEV_DIEPCTL13_SNAK field value from a register. */
80386 #define ALT_USB_DEV_DIEPCTL13_SNAK_GET(value) (((value) & 0x08000000) >> 27)
80387 /* Produces a ALT_USB_DEV_DIEPCTL13_SNAK register field value suitable for setting the register. */
80388 #define ALT_USB_DEV_DIEPCTL13_SNAK_SET(value) (((value) << 27) & 0x08000000)
80389 
80390 /*
80391  * Field : Set DATA0 PID - setd0pid
80392  *
80393  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
80394  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
80395  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
80396  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
80397  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
80398  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
80399  * mode is enabled, this field is reserved. The frame number in which to send data
80400  * is in the transmit descriptor structure. The frame in which to receive data is
80401  * updated in receive descriptor structure.
80402  *
80403  * Field Enumeration Values:
80404  *
80405  * Enum | Value | Description
80406  * :--------------------------------------|:------|:----------------------------
80407  * ALT_USB_DEV_DIEPCTL13_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
80408  * ALT_USB_DEV_DIEPCTL13_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
80409  *
80410  * Field Access Macros:
80411  *
80412  */
80413 /*
80414  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_SETD0PID
80415  *
80416  * Disables Set DATA0 PID
80417  */
80418 #define ALT_USB_DEV_DIEPCTL13_SETD0PID_E_DISD 0x0
80419 /*
80420  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_SETD0PID
80421  *
80422  * Endpoint Data PID to DATA0)
80423  */
80424 #define ALT_USB_DEV_DIEPCTL13_SETD0PID_E_END 0x1
80425 
80426 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_SETD0PID register field. */
80427 #define ALT_USB_DEV_DIEPCTL13_SETD0PID_LSB 28
80428 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_SETD0PID register field. */
80429 #define ALT_USB_DEV_DIEPCTL13_SETD0PID_MSB 28
80430 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_SETD0PID register field. */
80431 #define ALT_USB_DEV_DIEPCTL13_SETD0PID_WIDTH 1
80432 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_SETD0PID register field value. */
80433 #define ALT_USB_DEV_DIEPCTL13_SETD0PID_SET_MSK 0x10000000
80434 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_SETD0PID register field value. */
80435 #define ALT_USB_DEV_DIEPCTL13_SETD0PID_CLR_MSK 0xefffffff
80436 /* The reset value of the ALT_USB_DEV_DIEPCTL13_SETD0PID register field. */
80437 #define ALT_USB_DEV_DIEPCTL13_SETD0PID_RESET 0x0
80438 /* Extracts the ALT_USB_DEV_DIEPCTL13_SETD0PID field value from a register. */
80439 #define ALT_USB_DEV_DIEPCTL13_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
80440 /* Produces a ALT_USB_DEV_DIEPCTL13_SETD0PID register field value suitable for setting the register. */
80441 #define ALT_USB_DEV_DIEPCTL13_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
80442 
80443 /*
80444  * Field : Set DATA1 PID - setd1pid
80445  *
80446  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
80447  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
80448  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
80449  *
80450  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
80451  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
80452  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
80453  *
80454  * Field Enumeration Values:
80455  *
80456  * Enum | Value | Description
80457  * :--------------------------------------|:------|:-----------------------
80458  * ALT_USB_DEV_DIEPCTL13_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
80459  * ALT_USB_DEV_DIEPCTL13_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
80460  *
80461  * Field Access Macros:
80462  *
80463  */
80464 /*
80465  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_SETD1PID
80466  *
80467  * Disables Set DATA1 PID
80468  */
80469 #define ALT_USB_DEV_DIEPCTL13_SETD1PID_E_DISD 0x0
80470 /*
80471  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_SETD1PID
80472  *
80473  * Enables Set DATA1 PID
80474  */
80475 #define ALT_USB_DEV_DIEPCTL13_SETD1PID_E_END 0x1
80476 
80477 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_SETD1PID register field. */
80478 #define ALT_USB_DEV_DIEPCTL13_SETD1PID_LSB 29
80479 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_SETD1PID register field. */
80480 #define ALT_USB_DEV_DIEPCTL13_SETD1PID_MSB 29
80481 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_SETD1PID register field. */
80482 #define ALT_USB_DEV_DIEPCTL13_SETD1PID_WIDTH 1
80483 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_SETD1PID register field value. */
80484 #define ALT_USB_DEV_DIEPCTL13_SETD1PID_SET_MSK 0x20000000
80485 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_SETD1PID register field value. */
80486 #define ALT_USB_DEV_DIEPCTL13_SETD1PID_CLR_MSK 0xdfffffff
80487 /* The reset value of the ALT_USB_DEV_DIEPCTL13_SETD1PID register field. */
80488 #define ALT_USB_DEV_DIEPCTL13_SETD1PID_RESET 0x0
80489 /* Extracts the ALT_USB_DEV_DIEPCTL13_SETD1PID field value from a register. */
80490 #define ALT_USB_DEV_DIEPCTL13_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
80491 /* Produces a ALT_USB_DEV_DIEPCTL13_SETD1PID register field value suitable for setting the register. */
80492 #define ALT_USB_DEV_DIEPCTL13_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
80493 
80494 /*
80495  * Field : Endpoint Disable - epdis
80496  *
80497  * Applies to IN and OUT endpoints. The application sets this bit to stop
80498  * transmitting/receiving data on an endpoint, even before the transfer for that
80499  * endpoint is complete. The application must wait for the Endpoint Disabled
80500  * interrupt before treating the endpoint as disabled. The core clears this bit
80501  * before setting the Endpoint Disabled interrupt. The application must set this
80502  * bit only if Endpoint Enable is already set for this endpoint.
80503  *
80504  * Field Enumeration Values:
80505  *
80506  * Enum | Value | Description
80507  * :------------------------------------|:------|:--------------------
80508  * ALT_USB_DEV_DIEPCTL13_EPDIS_E_INACT | 0x0 | No Endpoint Disable
80509  * ALT_USB_DEV_DIEPCTL13_EPDIS_E_ACT | 0x1 | Endpoint Disable
80510  *
80511  * Field Access Macros:
80512  *
80513  */
80514 /*
80515  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_EPDIS
80516  *
80517  * No Endpoint Disable
80518  */
80519 #define ALT_USB_DEV_DIEPCTL13_EPDIS_E_INACT 0x0
80520 /*
80521  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_EPDIS
80522  *
80523  * Endpoint Disable
80524  */
80525 #define ALT_USB_DEV_DIEPCTL13_EPDIS_E_ACT 0x1
80526 
80527 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_EPDIS register field. */
80528 #define ALT_USB_DEV_DIEPCTL13_EPDIS_LSB 30
80529 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_EPDIS register field. */
80530 #define ALT_USB_DEV_DIEPCTL13_EPDIS_MSB 30
80531 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_EPDIS register field. */
80532 #define ALT_USB_DEV_DIEPCTL13_EPDIS_WIDTH 1
80533 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_EPDIS register field value. */
80534 #define ALT_USB_DEV_DIEPCTL13_EPDIS_SET_MSK 0x40000000
80535 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_EPDIS register field value. */
80536 #define ALT_USB_DEV_DIEPCTL13_EPDIS_CLR_MSK 0xbfffffff
80537 /* The reset value of the ALT_USB_DEV_DIEPCTL13_EPDIS register field. */
80538 #define ALT_USB_DEV_DIEPCTL13_EPDIS_RESET 0x0
80539 /* Extracts the ALT_USB_DEV_DIEPCTL13_EPDIS field value from a register. */
80540 #define ALT_USB_DEV_DIEPCTL13_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
80541 /* Produces a ALT_USB_DEV_DIEPCTL13_EPDIS register field value suitable for setting the register. */
80542 #define ALT_USB_DEV_DIEPCTL13_EPDIS_SET(value) (((value) << 30) & 0x40000000)
80543 
80544 /*
80545  * Field : Endpoint Enable - epena
80546  *
80547  * Applies to IN and OUT endpoints.
80548  *
80549  * * When Scatter/Gather DMA mode is enabled,
80550  *
80551  * * for IN endpoints this bit indicates that the descriptor structure and data
80552  * buffer with data ready to transmit is setup.
80553  *
80554  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
80555  * receive data is setup.
80556  *
80557  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
80558  * mode:
80559  *
80560  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
80561  * the endpoint.
80562  *
80563  * * for OUT endpoints, this bit indicates that the application has allocated the
80564  * memory to start receiving data from the USB.
80565  *
80566  * * The core clears this bit before setting any of the following interrupts on
80567  * this endpoint:
80568  *
80569  * * SETUP Phase Done
80570  *
80571  * * Endpoint Disabled
80572  *
80573  * * Transfer Completed
80574  *
80575  * for control endpoints in DMA mode, this bit must be set to be able to transfer
80576  * SETUP data packets in memory.
80577  *
80578  * Field Enumeration Values:
80579  *
80580  * Enum | Value | Description
80581  * :------------------------------------|:------|:-------------------------
80582  * ALT_USB_DEV_DIEPCTL13_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
80583  * ALT_USB_DEV_DIEPCTL13_EPENA_E_ACT | 0x1 | Endpoint Enable active
80584  *
80585  * Field Access Macros:
80586  *
80587  */
80588 /*
80589  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_EPENA
80590  *
80591  * Endpoint Enable inactive
80592  */
80593 #define ALT_USB_DEV_DIEPCTL13_EPENA_E_INACT 0x0
80594 /*
80595  * Enumerated value for register field ALT_USB_DEV_DIEPCTL13_EPENA
80596  *
80597  * Endpoint Enable active
80598  */
80599 #define ALT_USB_DEV_DIEPCTL13_EPENA_E_ACT 0x1
80600 
80601 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL13_EPENA register field. */
80602 #define ALT_USB_DEV_DIEPCTL13_EPENA_LSB 31
80603 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL13_EPENA register field. */
80604 #define ALT_USB_DEV_DIEPCTL13_EPENA_MSB 31
80605 /* The width in bits of the ALT_USB_DEV_DIEPCTL13_EPENA register field. */
80606 #define ALT_USB_DEV_DIEPCTL13_EPENA_WIDTH 1
80607 /* The mask used to set the ALT_USB_DEV_DIEPCTL13_EPENA register field value. */
80608 #define ALT_USB_DEV_DIEPCTL13_EPENA_SET_MSK 0x80000000
80609 /* The mask used to clear the ALT_USB_DEV_DIEPCTL13_EPENA register field value. */
80610 #define ALT_USB_DEV_DIEPCTL13_EPENA_CLR_MSK 0x7fffffff
80611 /* The reset value of the ALT_USB_DEV_DIEPCTL13_EPENA register field. */
80612 #define ALT_USB_DEV_DIEPCTL13_EPENA_RESET 0x0
80613 /* Extracts the ALT_USB_DEV_DIEPCTL13_EPENA field value from a register. */
80614 #define ALT_USB_DEV_DIEPCTL13_EPENA_GET(value) (((value) & 0x80000000) >> 31)
80615 /* Produces a ALT_USB_DEV_DIEPCTL13_EPENA register field value suitable for setting the register. */
80616 #define ALT_USB_DEV_DIEPCTL13_EPENA_SET(value) (((value) << 31) & 0x80000000)
80617 
80618 #ifndef __ASSEMBLY__
80619 /*
80620  * WARNING: The C register and register group struct declarations are provided for
80621  * convenience and illustrative purposes. They should, however, be used with
80622  * caution as the C language standard provides no guarantees about the alignment or
80623  * atomicity of device memory accesses. The recommended practice for writing
80624  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
80625  * alt_write_word() functions.
80626  *
80627  * The struct declaration for register ALT_USB_DEV_DIEPCTL13.
80628  */
80629 struct ALT_USB_DEV_DIEPCTL13_s
80630 {
80631  uint32_t mps : 11; /* Maximum Packet Size */
80632  uint32_t : 4; /* *UNDEFINED* */
80633  uint32_t usbactep : 1; /* USB Active Endpoint */
80634  const uint32_t dpid : 1; /* Endpoint Data PID */
80635  const uint32_t naksts : 1; /* NAK Status */
80636  uint32_t eptype : 2; /* Endpoint Type */
80637  uint32_t : 1; /* *UNDEFINED* */
80638  const uint32_t stall : 1; /* STALL Handshake */
80639  uint32_t txfnum : 4; /* TxFIFO Number */
80640  uint32_t cnak : 1; /* Clear NAK */
80641  uint32_t snak : 1; /* Set NAK */
80642  uint32_t setd0pid : 1; /* Set DATA0 PID */
80643  uint32_t setd1pid : 1; /* Set DATA1 PID */
80644  const uint32_t epdis : 1; /* Endpoint Disable */
80645  const uint32_t epena : 1; /* Endpoint Enable */
80646 };
80647 
80648 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL13. */
80649 typedef volatile struct ALT_USB_DEV_DIEPCTL13_s ALT_USB_DEV_DIEPCTL13_t;
80650 #endif /* __ASSEMBLY__ */
80651 
80652 /* The byte offset of the ALT_USB_DEV_DIEPCTL13 register from the beginning of the component. */
80653 #define ALT_USB_DEV_DIEPCTL13_OFST 0x2a0
80654 /* The address of the ALT_USB_DEV_DIEPCTL13 register. */
80655 #define ALT_USB_DEV_DIEPCTL13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL13_OFST))
80656 
80657 /*
80658  * Register : Device IN Endpoint 13 Interrupt Register - diepint13
80659  *
80660  * This register indicates the status of an endpoint with respect to USB- and AHB-
80661  * related events. The application must read this register when the OUT Endpoints
80662  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
80663  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
80664  * can read this register, it must first read the Device All Endpoints Interrupt
80665  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
80666  * Interrupt register. The application must clear the appropriate bit in this
80667  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
80668  *
80669  * Register Layout
80670  *
80671  * Bits | Access | Reset | Description
80672  * :--------|:-------|:------|:---------------------------------------
80673  * [0] | R | 0x0 | Transfer Completed Interrupt
80674  * [1] | R | 0x0 | Endpoint Disabled Interrupt
80675  * [2] | R | 0x0 | AHB Error
80676  * [3] | R | 0x0 | Timeout Condition
80677  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
80678  * [5] | R | 0x0 | IN Token Received with EP Mismatch
80679  * [6] | R | 0x0 | IN Endpoint NAK Effective
80680  * [7] | R | 0x1 | Transmit FIFO Empty
80681  * [8] | R | 0x0 | Fifo Underrun
80682  * [9] | R | 0x0 | BNA Interrupt
80683  * [10] | ??? | 0x0 | *UNDEFINED*
80684  * [11] | R | 0x0 | Packet Drop Status
80685  * [12] | R | 0x0 | BbleErr Interrupt
80686  * [13] | R | 0x0 | NAK Interrupt
80687  * [14] | R | 0x0 | NYET Interrupt
80688  * [31:15] | ??? | 0x0 | *UNDEFINED*
80689  *
80690  */
80691 /*
80692  * Field : Transfer Completed Interrupt - xfercompl
80693  *
80694  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
80695  *
80696  * * for IN endpoint this field indicates that the requested data from the
80697  * descriptor is moved from external system memory to internal FIFO.
80698  *
80699  * * for OUT endpoint this field indicates that the requested data from the
80700  * internal FIFO is moved to external system memory. This interrupt is generated
80701  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
80702  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
80703  * this field indicates that the programmed transfer is complete on the AHB as
80704  * well as on the USB, for this endpoint.
80705  *
80706  * Field Enumeration Values:
80707  *
80708  * Enum | Value | Description
80709  * :----------------------------------------|:------|:-----------------------------
80710  * ALT_USB_DEV_DIEPINT13_XFERCOMPL_E_INACT | 0x0 | No Interrupt
80711  * ALT_USB_DEV_DIEPINT13_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
80712  *
80713  * Field Access Macros:
80714  *
80715  */
80716 /*
80717  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_XFERCOMPL
80718  *
80719  * No Interrupt
80720  */
80721 #define ALT_USB_DEV_DIEPINT13_XFERCOMPL_E_INACT 0x0
80722 /*
80723  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_XFERCOMPL
80724  *
80725  * Transfer Completed Interrupt
80726  */
80727 #define ALT_USB_DEV_DIEPINT13_XFERCOMPL_E_ACT 0x1
80728 
80729 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_XFERCOMPL register field. */
80730 #define ALT_USB_DEV_DIEPINT13_XFERCOMPL_LSB 0
80731 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_XFERCOMPL register field. */
80732 #define ALT_USB_DEV_DIEPINT13_XFERCOMPL_MSB 0
80733 /* The width in bits of the ALT_USB_DEV_DIEPINT13_XFERCOMPL register field. */
80734 #define ALT_USB_DEV_DIEPINT13_XFERCOMPL_WIDTH 1
80735 /* The mask used to set the ALT_USB_DEV_DIEPINT13_XFERCOMPL register field value. */
80736 #define ALT_USB_DEV_DIEPINT13_XFERCOMPL_SET_MSK 0x00000001
80737 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_XFERCOMPL register field value. */
80738 #define ALT_USB_DEV_DIEPINT13_XFERCOMPL_CLR_MSK 0xfffffffe
80739 /* The reset value of the ALT_USB_DEV_DIEPINT13_XFERCOMPL register field. */
80740 #define ALT_USB_DEV_DIEPINT13_XFERCOMPL_RESET 0x0
80741 /* Extracts the ALT_USB_DEV_DIEPINT13_XFERCOMPL field value from a register. */
80742 #define ALT_USB_DEV_DIEPINT13_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
80743 /* Produces a ALT_USB_DEV_DIEPINT13_XFERCOMPL register field value suitable for setting the register. */
80744 #define ALT_USB_DEV_DIEPINT13_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
80745 
80746 /*
80747  * Field : Endpoint Disabled Interrupt - epdisbld
80748  *
80749  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
80750  * disabled per the application's request.
80751  *
80752  * Field Enumeration Values:
80753  *
80754  * Enum | Value | Description
80755  * :---------------------------------------|:------|:----------------------------
80756  * ALT_USB_DEV_DIEPINT13_EPDISBLD_E_INACT | 0x0 | No Interrupt
80757  * ALT_USB_DEV_DIEPINT13_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
80758  *
80759  * Field Access Macros:
80760  *
80761  */
80762 /*
80763  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_EPDISBLD
80764  *
80765  * No Interrupt
80766  */
80767 #define ALT_USB_DEV_DIEPINT13_EPDISBLD_E_INACT 0x0
80768 /*
80769  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_EPDISBLD
80770  *
80771  * Endpoint Disabled Interrupt
80772  */
80773 #define ALT_USB_DEV_DIEPINT13_EPDISBLD_E_ACT 0x1
80774 
80775 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_EPDISBLD register field. */
80776 #define ALT_USB_DEV_DIEPINT13_EPDISBLD_LSB 1
80777 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_EPDISBLD register field. */
80778 #define ALT_USB_DEV_DIEPINT13_EPDISBLD_MSB 1
80779 /* The width in bits of the ALT_USB_DEV_DIEPINT13_EPDISBLD register field. */
80780 #define ALT_USB_DEV_DIEPINT13_EPDISBLD_WIDTH 1
80781 /* The mask used to set the ALT_USB_DEV_DIEPINT13_EPDISBLD register field value. */
80782 #define ALT_USB_DEV_DIEPINT13_EPDISBLD_SET_MSK 0x00000002
80783 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_EPDISBLD register field value. */
80784 #define ALT_USB_DEV_DIEPINT13_EPDISBLD_CLR_MSK 0xfffffffd
80785 /* The reset value of the ALT_USB_DEV_DIEPINT13_EPDISBLD register field. */
80786 #define ALT_USB_DEV_DIEPINT13_EPDISBLD_RESET 0x0
80787 /* Extracts the ALT_USB_DEV_DIEPINT13_EPDISBLD field value from a register. */
80788 #define ALT_USB_DEV_DIEPINT13_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
80789 /* Produces a ALT_USB_DEV_DIEPINT13_EPDISBLD register field value suitable for setting the register. */
80790 #define ALT_USB_DEV_DIEPINT13_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
80791 
80792 /*
80793  * Field : AHB Error - ahberr
80794  *
80795  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
80796  * there is an AHB error during an AHB read/write. The application can read the
80797  * corresponding endpoint DMA address register to get the error address.
80798  *
80799  * Field Enumeration Values:
80800  *
80801  * Enum | Value | Description
80802  * :-------------------------------------|:------|:--------------------
80803  * ALT_USB_DEV_DIEPINT13_AHBERR_E_INACT | 0x0 | No Interrupt
80804  * ALT_USB_DEV_DIEPINT13_AHBERR_E_ACT | 0x1 | AHB Error interrupt
80805  *
80806  * Field Access Macros:
80807  *
80808  */
80809 /*
80810  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_AHBERR
80811  *
80812  * No Interrupt
80813  */
80814 #define ALT_USB_DEV_DIEPINT13_AHBERR_E_INACT 0x0
80815 /*
80816  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_AHBERR
80817  *
80818  * AHB Error interrupt
80819  */
80820 #define ALT_USB_DEV_DIEPINT13_AHBERR_E_ACT 0x1
80821 
80822 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_AHBERR register field. */
80823 #define ALT_USB_DEV_DIEPINT13_AHBERR_LSB 2
80824 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_AHBERR register field. */
80825 #define ALT_USB_DEV_DIEPINT13_AHBERR_MSB 2
80826 /* The width in bits of the ALT_USB_DEV_DIEPINT13_AHBERR register field. */
80827 #define ALT_USB_DEV_DIEPINT13_AHBERR_WIDTH 1
80828 /* The mask used to set the ALT_USB_DEV_DIEPINT13_AHBERR register field value. */
80829 #define ALT_USB_DEV_DIEPINT13_AHBERR_SET_MSK 0x00000004
80830 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_AHBERR register field value. */
80831 #define ALT_USB_DEV_DIEPINT13_AHBERR_CLR_MSK 0xfffffffb
80832 /* The reset value of the ALT_USB_DEV_DIEPINT13_AHBERR register field. */
80833 #define ALT_USB_DEV_DIEPINT13_AHBERR_RESET 0x0
80834 /* Extracts the ALT_USB_DEV_DIEPINT13_AHBERR field value from a register. */
80835 #define ALT_USB_DEV_DIEPINT13_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
80836 /* Produces a ALT_USB_DEV_DIEPINT13_AHBERR register field value suitable for setting the register. */
80837 #define ALT_USB_DEV_DIEPINT13_AHBERR_SET(value) (((value) << 2) & 0x00000004)
80838 
80839 /*
80840  * Field : Timeout Condition - timeout
80841  *
80842  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
80843  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
80844  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
80845  * detected a timeout condition on the USB for the last IN token on this endpoint.
80846  *
80847  * Field Enumeration Values:
80848  *
80849  * Enum | Value | Description
80850  * :----------------------------------|:------|:------------------
80851  * ALT_USB_DEV_DIEPINT13_TMO_E_INACT | 0x0 | No interrupt
80852  * ALT_USB_DEV_DIEPINT13_TMO_E_ACT | 0x1 | Timeout interrupy
80853  *
80854  * Field Access Macros:
80855  *
80856  */
80857 /*
80858  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_TMO
80859  *
80860  * No interrupt
80861  */
80862 #define ALT_USB_DEV_DIEPINT13_TMO_E_INACT 0x0
80863 /*
80864  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_TMO
80865  *
80866  * Timeout interrupy
80867  */
80868 #define ALT_USB_DEV_DIEPINT13_TMO_E_ACT 0x1
80869 
80870 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_TMO register field. */
80871 #define ALT_USB_DEV_DIEPINT13_TMO_LSB 3
80872 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_TMO register field. */
80873 #define ALT_USB_DEV_DIEPINT13_TMO_MSB 3
80874 /* The width in bits of the ALT_USB_DEV_DIEPINT13_TMO register field. */
80875 #define ALT_USB_DEV_DIEPINT13_TMO_WIDTH 1
80876 /* The mask used to set the ALT_USB_DEV_DIEPINT13_TMO register field value. */
80877 #define ALT_USB_DEV_DIEPINT13_TMO_SET_MSK 0x00000008
80878 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_TMO register field value. */
80879 #define ALT_USB_DEV_DIEPINT13_TMO_CLR_MSK 0xfffffff7
80880 /* The reset value of the ALT_USB_DEV_DIEPINT13_TMO register field. */
80881 #define ALT_USB_DEV_DIEPINT13_TMO_RESET 0x0
80882 /* Extracts the ALT_USB_DEV_DIEPINT13_TMO field value from a register. */
80883 #define ALT_USB_DEV_DIEPINT13_TMO_GET(value) (((value) & 0x00000008) >> 3)
80884 /* Produces a ALT_USB_DEV_DIEPINT13_TMO register field value suitable for setting the register. */
80885 #define ALT_USB_DEV_DIEPINT13_TMO_SET(value) (((value) << 3) & 0x00000008)
80886 
80887 /*
80888  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
80889  *
80890  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
80891  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
80892  * interrupt is asserted on the endpoint for which the IN token was received.
80893  *
80894  * Field Enumeration Values:
80895  *
80896  * Enum | Value | Description
80897  * :------------------------------------------|:------|:----------------------------
80898  * ALT_USB_DEV_DIEPINT13_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
80899  * ALT_USB_DEV_DIEPINT13_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
80900  *
80901  * Field Access Macros:
80902  *
80903  */
80904 /*
80905  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_INTKNTXFEMP
80906  *
80907  * No interrupt
80908  */
80909 #define ALT_USB_DEV_DIEPINT13_INTKNTXFEMP_E_INACT 0x0
80910 /*
80911  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_INTKNTXFEMP
80912  *
80913  * IN Token Received Interrupt
80914  */
80915 #define ALT_USB_DEV_DIEPINT13_INTKNTXFEMP_E_ACT 0x1
80916 
80917 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_INTKNTXFEMP register field. */
80918 #define ALT_USB_DEV_DIEPINT13_INTKNTXFEMP_LSB 4
80919 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_INTKNTXFEMP register field. */
80920 #define ALT_USB_DEV_DIEPINT13_INTKNTXFEMP_MSB 4
80921 /* The width in bits of the ALT_USB_DEV_DIEPINT13_INTKNTXFEMP register field. */
80922 #define ALT_USB_DEV_DIEPINT13_INTKNTXFEMP_WIDTH 1
80923 /* The mask used to set the ALT_USB_DEV_DIEPINT13_INTKNTXFEMP register field value. */
80924 #define ALT_USB_DEV_DIEPINT13_INTKNTXFEMP_SET_MSK 0x00000010
80925 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_INTKNTXFEMP register field value. */
80926 #define ALT_USB_DEV_DIEPINT13_INTKNTXFEMP_CLR_MSK 0xffffffef
80927 /* The reset value of the ALT_USB_DEV_DIEPINT13_INTKNTXFEMP register field. */
80928 #define ALT_USB_DEV_DIEPINT13_INTKNTXFEMP_RESET 0x0
80929 /* Extracts the ALT_USB_DEV_DIEPINT13_INTKNTXFEMP field value from a register. */
80930 #define ALT_USB_DEV_DIEPINT13_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
80931 /* Produces a ALT_USB_DEV_DIEPINT13_INTKNTXFEMP register field value suitable for setting the register. */
80932 #define ALT_USB_DEV_DIEPINT13_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
80933 
80934 /*
80935  * Field : IN Token Received with EP Mismatch - intknepmis
80936  *
80937  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
80938  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
80939  * IN token was received. This interrupt is asserted on the endpoint for which the
80940  * IN token was received.
80941  *
80942  * Field Enumeration Values:
80943  *
80944  * Enum | Value | Description
80945  * :-----------------------------------------|:------|:---------------------------------------------
80946  * ALT_USB_DEV_DIEPINT13_INTKNEPMIS_E_INACT | 0x0 | No interrupt
80947  * ALT_USB_DEV_DIEPINT13_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
80948  *
80949  * Field Access Macros:
80950  *
80951  */
80952 /*
80953  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_INTKNEPMIS
80954  *
80955  * No interrupt
80956  */
80957 #define ALT_USB_DEV_DIEPINT13_INTKNEPMIS_E_INACT 0x0
80958 /*
80959  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_INTKNEPMIS
80960  *
80961  * IN Token Received with EP Mismatch interrupt
80962  */
80963 #define ALT_USB_DEV_DIEPINT13_INTKNEPMIS_E_ACT 0x1
80964 
80965 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_INTKNEPMIS register field. */
80966 #define ALT_USB_DEV_DIEPINT13_INTKNEPMIS_LSB 5
80967 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_INTKNEPMIS register field. */
80968 #define ALT_USB_DEV_DIEPINT13_INTKNEPMIS_MSB 5
80969 /* The width in bits of the ALT_USB_DEV_DIEPINT13_INTKNEPMIS register field. */
80970 #define ALT_USB_DEV_DIEPINT13_INTKNEPMIS_WIDTH 1
80971 /* The mask used to set the ALT_USB_DEV_DIEPINT13_INTKNEPMIS register field value. */
80972 #define ALT_USB_DEV_DIEPINT13_INTKNEPMIS_SET_MSK 0x00000020
80973 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_INTKNEPMIS register field value. */
80974 #define ALT_USB_DEV_DIEPINT13_INTKNEPMIS_CLR_MSK 0xffffffdf
80975 /* The reset value of the ALT_USB_DEV_DIEPINT13_INTKNEPMIS register field. */
80976 #define ALT_USB_DEV_DIEPINT13_INTKNEPMIS_RESET 0x0
80977 /* Extracts the ALT_USB_DEV_DIEPINT13_INTKNEPMIS field value from a register. */
80978 #define ALT_USB_DEV_DIEPINT13_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
80979 /* Produces a ALT_USB_DEV_DIEPINT13_INTKNEPMIS register field value suitable for setting the register. */
80980 #define ALT_USB_DEV_DIEPINT13_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
80981 
80982 /*
80983  * Field : IN Endpoint NAK Effective - inepnakeff
80984  *
80985  * Applies to periodic IN endpoints only. This bit can be cleared when the
80986  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
80987  * interrupt indicates that the core has sampled the NAK bit Set (either by the
80988  * application or by the core). The interrupt indicates that the IN endpoint NAK
80989  * bit Set by the application has taken effect in the core.This interrupt does not
80990  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
80991  * over a NAK bit.
80992  *
80993  * Field Enumeration Values:
80994  *
80995  * Enum | Value | Description
80996  * :-----------------------------------------|:------|:------------------------------------
80997  * ALT_USB_DEV_DIEPINT13_INEPNAKEFF_E_INACT | 0x0 | No interrupt
80998  * ALT_USB_DEV_DIEPINT13_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
80999  *
81000  * Field Access Macros:
81001  *
81002  */
81003 /*
81004  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_INEPNAKEFF
81005  *
81006  * No interrupt
81007  */
81008 #define ALT_USB_DEV_DIEPINT13_INEPNAKEFF_E_INACT 0x0
81009 /*
81010  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_INEPNAKEFF
81011  *
81012  * IN Endpoint NAK Effective interrupt
81013  */
81014 #define ALT_USB_DEV_DIEPINT13_INEPNAKEFF_E_ACT 0x1
81015 
81016 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_INEPNAKEFF register field. */
81017 #define ALT_USB_DEV_DIEPINT13_INEPNAKEFF_LSB 6
81018 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_INEPNAKEFF register field. */
81019 #define ALT_USB_DEV_DIEPINT13_INEPNAKEFF_MSB 6
81020 /* The width in bits of the ALT_USB_DEV_DIEPINT13_INEPNAKEFF register field. */
81021 #define ALT_USB_DEV_DIEPINT13_INEPNAKEFF_WIDTH 1
81022 /* The mask used to set the ALT_USB_DEV_DIEPINT13_INEPNAKEFF register field value. */
81023 #define ALT_USB_DEV_DIEPINT13_INEPNAKEFF_SET_MSK 0x00000040
81024 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_INEPNAKEFF register field value. */
81025 #define ALT_USB_DEV_DIEPINT13_INEPNAKEFF_CLR_MSK 0xffffffbf
81026 /* The reset value of the ALT_USB_DEV_DIEPINT13_INEPNAKEFF register field. */
81027 #define ALT_USB_DEV_DIEPINT13_INEPNAKEFF_RESET 0x0
81028 /* Extracts the ALT_USB_DEV_DIEPINT13_INEPNAKEFF field value from a register. */
81029 #define ALT_USB_DEV_DIEPINT13_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
81030 /* Produces a ALT_USB_DEV_DIEPINT13_INEPNAKEFF register field value suitable for setting the register. */
81031 #define ALT_USB_DEV_DIEPINT13_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
81032 
81033 /*
81034  * Field : Transmit FIFO Empty - txfemp
81035  *
81036  * This bit is valid only for IN Endpoints This interrupt is asserted when the
81037  * TxFIFO for this endpoint is either half or completely empty. The half or
81038  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
81039  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
81040  *
81041  * Field Enumeration Values:
81042  *
81043  * Enum | Value | Description
81044  * :-------------------------------------|:------|:------------------------------
81045  * ALT_USB_DEV_DIEPINT13_TXFEMP_E_INACT | 0x0 | No interrupt
81046  * ALT_USB_DEV_DIEPINT13_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
81047  *
81048  * Field Access Macros:
81049  *
81050  */
81051 /*
81052  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_TXFEMP
81053  *
81054  * No interrupt
81055  */
81056 #define ALT_USB_DEV_DIEPINT13_TXFEMP_E_INACT 0x0
81057 /*
81058  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_TXFEMP
81059  *
81060  * Transmit FIFO Empty interrupt
81061  */
81062 #define ALT_USB_DEV_DIEPINT13_TXFEMP_E_ACT 0x1
81063 
81064 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_TXFEMP register field. */
81065 #define ALT_USB_DEV_DIEPINT13_TXFEMP_LSB 7
81066 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_TXFEMP register field. */
81067 #define ALT_USB_DEV_DIEPINT13_TXFEMP_MSB 7
81068 /* The width in bits of the ALT_USB_DEV_DIEPINT13_TXFEMP register field. */
81069 #define ALT_USB_DEV_DIEPINT13_TXFEMP_WIDTH 1
81070 /* The mask used to set the ALT_USB_DEV_DIEPINT13_TXFEMP register field value. */
81071 #define ALT_USB_DEV_DIEPINT13_TXFEMP_SET_MSK 0x00000080
81072 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_TXFEMP register field value. */
81073 #define ALT_USB_DEV_DIEPINT13_TXFEMP_CLR_MSK 0xffffff7f
81074 /* The reset value of the ALT_USB_DEV_DIEPINT13_TXFEMP register field. */
81075 #define ALT_USB_DEV_DIEPINT13_TXFEMP_RESET 0x1
81076 /* Extracts the ALT_USB_DEV_DIEPINT13_TXFEMP field value from a register. */
81077 #define ALT_USB_DEV_DIEPINT13_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
81078 /* Produces a ALT_USB_DEV_DIEPINT13_TXFEMP register field value suitable for setting the register. */
81079 #define ALT_USB_DEV_DIEPINT13_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
81080 
81081 /*
81082  * Field : Fifo Underrun - txfifoundrn
81083  *
81084  * Applies to IN endpoints Only. The core generates this interrupt when it detects
81085  * a transmit FIFO underrun condition for this endpoint.
81086  *
81087  * Field Enumeration Values:
81088  *
81089  * Enum | Value | Description
81090  * :------------------------------------------|:------|:------------------------
81091  * ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
81092  * ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
81093  *
81094  * Field Access Macros:
81095  *
81096  */
81097 /*
81098  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN
81099  *
81100  * No interrupt
81101  */
81102 #define ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN_E_INACT 0x0
81103 /*
81104  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN
81105  *
81106  * Fifo Underrun interrupt
81107  */
81108 #define ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN_E_ACT 0x1
81109 
81110 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN register field. */
81111 #define ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN_LSB 8
81112 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN register field. */
81113 #define ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN_MSB 8
81114 /* The width in bits of the ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN register field. */
81115 #define ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN_WIDTH 1
81116 /* The mask used to set the ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN register field value. */
81117 #define ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN_SET_MSK 0x00000100
81118 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN register field value. */
81119 #define ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN_CLR_MSK 0xfffffeff
81120 /* The reset value of the ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN register field. */
81121 #define ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN_RESET 0x0
81122 /* Extracts the ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN field value from a register. */
81123 #define ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
81124 /* Produces a ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN register field value suitable for setting the register. */
81125 #define ALT_USB_DEV_DIEPINT13_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
81126 
81127 /*
81128  * Field : BNA Interrupt - bnaintr
81129  *
81130  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
81131  * generates this interrupt when the descriptor accessed is not ready for the Core
81132  * to process, such as Host busy or DMA done
81133  *
81134  * Field Enumeration Values:
81135  *
81136  * Enum | Value | Description
81137  * :--------------------------------------|:------|:--------------
81138  * ALT_USB_DEV_DIEPINT13_BNAINTR_E_INACT | 0x0 | No interrupt
81139  * ALT_USB_DEV_DIEPINT13_BNAINTR_E_ACT | 0x1 | BNA interrupt
81140  *
81141  * Field Access Macros:
81142  *
81143  */
81144 /*
81145  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_BNAINTR
81146  *
81147  * No interrupt
81148  */
81149 #define ALT_USB_DEV_DIEPINT13_BNAINTR_E_INACT 0x0
81150 /*
81151  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_BNAINTR
81152  *
81153  * BNA interrupt
81154  */
81155 #define ALT_USB_DEV_DIEPINT13_BNAINTR_E_ACT 0x1
81156 
81157 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_BNAINTR register field. */
81158 #define ALT_USB_DEV_DIEPINT13_BNAINTR_LSB 9
81159 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_BNAINTR register field. */
81160 #define ALT_USB_DEV_DIEPINT13_BNAINTR_MSB 9
81161 /* The width in bits of the ALT_USB_DEV_DIEPINT13_BNAINTR register field. */
81162 #define ALT_USB_DEV_DIEPINT13_BNAINTR_WIDTH 1
81163 /* The mask used to set the ALT_USB_DEV_DIEPINT13_BNAINTR register field value. */
81164 #define ALT_USB_DEV_DIEPINT13_BNAINTR_SET_MSK 0x00000200
81165 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_BNAINTR register field value. */
81166 #define ALT_USB_DEV_DIEPINT13_BNAINTR_CLR_MSK 0xfffffdff
81167 /* The reset value of the ALT_USB_DEV_DIEPINT13_BNAINTR register field. */
81168 #define ALT_USB_DEV_DIEPINT13_BNAINTR_RESET 0x0
81169 /* Extracts the ALT_USB_DEV_DIEPINT13_BNAINTR field value from a register. */
81170 #define ALT_USB_DEV_DIEPINT13_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
81171 /* Produces a ALT_USB_DEV_DIEPINT13_BNAINTR register field value suitable for setting the register. */
81172 #define ALT_USB_DEV_DIEPINT13_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
81173 
81174 /*
81175  * Field : Packet Drop Status - pktdrpsts
81176  *
81177  * This bit indicates to the application that an ISOC OUT packet has been dropped.
81178  * This bit does not have an associated mask bit and does not generate an
81179  * interrupt.
81180  *
81181  * Field Enumeration Values:
81182  *
81183  * Enum | Value | Description
81184  * :----------------------------------------|:------|:-----------------------------
81185  * ALT_USB_DEV_DIEPINT13_PKTDRPSTS_E_INACT | 0x0 | No interrupt
81186  * ALT_USB_DEV_DIEPINT13_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
81187  *
81188  * Field Access Macros:
81189  *
81190  */
81191 /*
81192  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_PKTDRPSTS
81193  *
81194  * No interrupt
81195  */
81196 #define ALT_USB_DEV_DIEPINT13_PKTDRPSTS_E_INACT 0x0
81197 /*
81198  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_PKTDRPSTS
81199  *
81200  * Packet Drop Status interrupt
81201  */
81202 #define ALT_USB_DEV_DIEPINT13_PKTDRPSTS_E_ACT 0x1
81203 
81204 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_PKTDRPSTS register field. */
81205 #define ALT_USB_DEV_DIEPINT13_PKTDRPSTS_LSB 11
81206 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_PKTDRPSTS register field. */
81207 #define ALT_USB_DEV_DIEPINT13_PKTDRPSTS_MSB 11
81208 /* The width in bits of the ALT_USB_DEV_DIEPINT13_PKTDRPSTS register field. */
81209 #define ALT_USB_DEV_DIEPINT13_PKTDRPSTS_WIDTH 1
81210 /* The mask used to set the ALT_USB_DEV_DIEPINT13_PKTDRPSTS register field value. */
81211 #define ALT_USB_DEV_DIEPINT13_PKTDRPSTS_SET_MSK 0x00000800
81212 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_PKTDRPSTS register field value. */
81213 #define ALT_USB_DEV_DIEPINT13_PKTDRPSTS_CLR_MSK 0xfffff7ff
81214 /* The reset value of the ALT_USB_DEV_DIEPINT13_PKTDRPSTS register field. */
81215 #define ALT_USB_DEV_DIEPINT13_PKTDRPSTS_RESET 0x0
81216 /* Extracts the ALT_USB_DEV_DIEPINT13_PKTDRPSTS field value from a register. */
81217 #define ALT_USB_DEV_DIEPINT13_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
81218 /* Produces a ALT_USB_DEV_DIEPINT13_PKTDRPSTS register field value suitable for setting the register. */
81219 #define ALT_USB_DEV_DIEPINT13_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
81220 
81221 /*
81222  * Field : BbleErr Interrupt - bbleerr
81223  *
81224  * The core generates this interrupt when babble is received for the endpoint.
81225  *
81226  * Field Enumeration Values:
81227  *
81228  * Enum | Value | Description
81229  * :--------------------------------------|:------|:------------------
81230  * ALT_USB_DEV_DIEPINT13_BBLEERR_E_INACT | 0x0 | No interrupt
81231  * ALT_USB_DEV_DIEPINT13_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
81232  *
81233  * Field Access Macros:
81234  *
81235  */
81236 /*
81237  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_BBLEERR
81238  *
81239  * No interrupt
81240  */
81241 #define ALT_USB_DEV_DIEPINT13_BBLEERR_E_INACT 0x0
81242 /*
81243  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_BBLEERR
81244  *
81245  * BbleErr interrupt
81246  */
81247 #define ALT_USB_DEV_DIEPINT13_BBLEERR_E_ACT 0x1
81248 
81249 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_BBLEERR register field. */
81250 #define ALT_USB_DEV_DIEPINT13_BBLEERR_LSB 12
81251 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_BBLEERR register field. */
81252 #define ALT_USB_DEV_DIEPINT13_BBLEERR_MSB 12
81253 /* The width in bits of the ALT_USB_DEV_DIEPINT13_BBLEERR register field. */
81254 #define ALT_USB_DEV_DIEPINT13_BBLEERR_WIDTH 1
81255 /* The mask used to set the ALT_USB_DEV_DIEPINT13_BBLEERR register field value. */
81256 #define ALT_USB_DEV_DIEPINT13_BBLEERR_SET_MSK 0x00001000
81257 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_BBLEERR register field value. */
81258 #define ALT_USB_DEV_DIEPINT13_BBLEERR_CLR_MSK 0xffffefff
81259 /* The reset value of the ALT_USB_DEV_DIEPINT13_BBLEERR register field. */
81260 #define ALT_USB_DEV_DIEPINT13_BBLEERR_RESET 0x0
81261 /* Extracts the ALT_USB_DEV_DIEPINT13_BBLEERR field value from a register. */
81262 #define ALT_USB_DEV_DIEPINT13_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
81263 /* Produces a ALT_USB_DEV_DIEPINT13_BBLEERR register field value suitable for setting the register. */
81264 #define ALT_USB_DEV_DIEPINT13_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
81265 
81266 /*
81267  * Field : NAK Interrupt - nakintrpt
81268  *
81269  * The core generates this interrupt when a NAK is transmitted or received by the
81270  * device. In case of isochronous IN endpoints the interrupt gets generated when a
81271  * zero length packet is transmitted due to un-availability of data in the TXFifo.
81272  *
81273  * Field Enumeration Values:
81274  *
81275  * Enum | Value | Description
81276  * :----------------------------------------|:------|:--------------
81277  * ALT_USB_DEV_DIEPINT13_NAKINTRPT_E_INACT | 0x0 | No interrupt
81278  * ALT_USB_DEV_DIEPINT13_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
81279  *
81280  * Field Access Macros:
81281  *
81282  */
81283 /*
81284  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_NAKINTRPT
81285  *
81286  * No interrupt
81287  */
81288 #define ALT_USB_DEV_DIEPINT13_NAKINTRPT_E_INACT 0x0
81289 /*
81290  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_NAKINTRPT
81291  *
81292  * NAK Interrupt
81293  */
81294 #define ALT_USB_DEV_DIEPINT13_NAKINTRPT_E_ACT 0x1
81295 
81296 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_NAKINTRPT register field. */
81297 #define ALT_USB_DEV_DIEPINT13_NAKINTRPT_LSB 13
81298 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_NAKINTRPT register field. */
81299 #define ALT_USB_DEV_DIEPINT13_NAKINTRPT_MSB 13
81300 /* The width in bits of the ALT_USB_DEV_DIEPINT13_NAKINTRPT register field. */
81301 #define ALT_USB_DEV_DIEPINT13_NAKINTRPT_WIDTH 1
81302 /* The mask used to set the ALT_USB_DEV_DIEPINT13_NAKINTRPT register field value. */
81303 #define ALT_USB_DEV_DIEPINT13_NAKINTRPT_SET_MSK 0x00002000
81304 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_NAKINTRPT register field value. */
81305 #define ALT_USB_DEV_DIEPINT13_NAKINTRPT_CLR_MSK 0xffffdfff
81306 /* The reset value of the ALT_USB_DEV_DIEPINT13_NAKINTRPT register field. */
81307 #define ALT_USB_DEV_DIEPINT13_NAKINTRPT_RESET 0x0
81308 /* Extracts the ALT_USB_DEV_DIEPINT13_NAKINTRPT field value from a register. */
81309 #define ALT_USB_DEV_DIEPINT13_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
81310 /* Produces a ALT_USB_DEV_DIEPINT13_NAKINTRPT register field value suitable for setting the register. */
81311 #define ALT_USB_DEV_DIEPINT13_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
81312 
81313 /*
81314  * Field : NYET Interrupt - nyetintrpt
81315  *
81316  * The core generates this interrupt when a NYET response is transmitted for a non
81317  * isochronous OUT endpoint.
81318  *
81319  * Field Enumeration Values:
81320  *
81321  * Enum | Value | Description
81322  * :-----------------------------------------|:------|:---------------
81323  * ALT_USB_DEV_DIEPINT13_NYETINTRPT_E_INACT | 0x0 | No interrupt
81324  * ALT_USB_DEV_DIEPINT13_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
81325  *
81326  * Field Access Macros:
81327  *
81328  */
81329 /*
81330  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_NYETINTRPT
81331  *
81332  * No interrupt
81333  */
81334 #define ALT_USB_DEV_DIEPINT13_NYETINTRPT_E_INACT 0x0
81335 /*
81336  * Enumerated value for register field ALT_USB_DEV_DIEPINT13_NYETINTRPT
81337  *
81338  * NYET Interrupt
81339  */
81340 #define ALT_USB_DEV_DIEPINT13_NYETINTRPT_E_ACT 0x1
81341 
81342 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT13_NYETINTRPT register field. */
81343 #define ALT_USB_DEV_DIEPINT13_NYETINTRPT_LSB 14
81344 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT13_NYETINTRPT register field. */
81345 #define ALT_USB_DEV_DIEPINT13_NYETINTRPT_MSB 14
81346 /* The width in bits of the ALT_USB_DEV_DIEPINT13_NYETINTRPT register field. */
81347 #define ALT_USB_DEV_DIEPINT13_NYETINTRPT_WIDTH 1
81348 /* The mask used to set the ALT_USB_DEV_DIEPINT13_NYETINTRPT register field value. */
81349 #define ALT_USB_DEV_DIEPINT13_NYETINTRPT_SET_MSK 0x00004000
81350 /* The mask used to clear the ALT_USB_DEV_DIEPINT13_NYETINTRPT register field value. */
81351 #define ALT_USB_DEV_DIEPINT13_NYETINTRPT_CLR_MSK 0xffffbfff
81352 /* The reset value of the ALT_USB_DEV_DIEPINT13_NYETINTRPT register field. */
81353 #define ALT_USB_DEV_DIEPINT13_NYETINTRPT_RESET 0x0
81354 /* Extracts the ALT_USB_DEV_DIEPINT13_NYETINTRPT field value from a register. */
81355 #define ALT_USB_DEV_DIEPINT13_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
81356 /* Produces a ALT_USB_DEV_DIEPINT13_NYETINTRPT register field value suitable for setting the register. */
81357 #define ALT_USB_DEV_DIEPINT13_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
81358 
81359 #ifndef __ASSEMBLY__
81360 /*
81361  * WARNING: The C register and register group struct declarations are provided for
81362  * convenience and illustrative purposes. They should, however, be used with
81363  * caution as the C language standard provides no guarantees about the alignment or
81364  * atomicity of device memory accesses. The recommended practice for writing
81365  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
81366  * alt_write_word() functions.
81367  *
81368  * The struct declaration for register ALT_USB_DEV_DIEPINT13.
81369  */
81370 struct ALT_USB_DEV_DIEPINT13_s
81371 {
81372  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
81373  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
81374  const uint32_t ahberr : 1; /* AHB Error */
81375  const uint32_t timeout : 1; /* Timeout Condition */
81376  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
81377  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
81378  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
81379  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
81380  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
81381  const uint32_t bnaintr : 1; /* BNA Interrupt */
81382  uint32_t : 1; /* *UNDEFINED* */
81383  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
81384  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
81385  const uint32_t nakintrpt : 1; /* NAK Interrupt */
81386  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
81387  uint32_t : 17; /* *UNDEFINED* */
81388 };
81389 
81390 /* The typedef declaration for register ALT_USB_DEV_DIEPINT13. */
81391 typedef volatile struct ALT_USB_DEV_DIEPINT13_s ALT_USB_DEV_DIEPINT13_t;
81392 #endif /* __ASSEMBLY__ */
81393 
81394 /* The byte offset of the ALT_USB_DEV_DIEPINT13 register from the beginning of the component. */
81395 #define ALT_USB_DEV_DIEPINT13_OFST 0x2a8
81396 /* The address of the ALT_USB_DEV_DIEPINT13 register. */
81397 #define ALT_USB_DEV_DIEPINT13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT13_OFST))
81398 
81399 /*
81400  * Register : Device IN Endpoint 13 Transfer Size Register - dieptsiz13
81401  *
81402  * The application must modify this register before enabling the endpoint. Once the
81403  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
81404  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
81405  * application can only read this register once the core has cleared the Endpoint
81406  * Enable bit.
81407  *
81408  * Register Layout
81409  *
81410  * Bits | Access | Reset | Description
81411  * :--------|:-------|:------|:----------------------------
81412  * [18:0] | RW | 0x0 | Transfer Size
81413  * [28:19] | RW | 0x0 | Packet Count
81414  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
81415  * [31] | ??? | 0x0 | *UNDEFINED*
81416  *
81417  */
81418 /*
81419  * Field : Transfer Size - xfersize
81420  *
81421  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
81422  * application only after it has exhausted the transfer size amount of data. The
81423  * transfer size can be Set to the maximum packet size of the endpoint, to be
81424  * interrupted at the end of each packet. The core decrements this field every time
81425  * a packet from the external memory is written to the TxFIFO.
81426  *
81427  * Field Access Macros:
81428  *
81429  */
81430 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ13_XFERSIZE register field. */
81431 #define ALT_USB_DEV_DIEPTSIZ13_XFERSIZE_LSB 0
81432 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ13_XFERSIZE register field. */
81433 #define ALT_USB_DEV_DIEPTSIZ13_XFERSIZE_MSB 18
81434 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ13_XFERSIZE register field. */
81435 #define ALT_USB_DEV_DIEPTSIZ13_XFERSIZE_WIDTH 19
81436 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ13_XFERSIZE register field value. */
81437 #define ALT_USB_DEV_DIEPTSIZ13_XFERSIZE_SET_MSK 0x0007ffff
81438 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ13_XFERSIZE register field value. */
81439 #define ALT_USB_DEV_DIEPTSIZ13_XFERSIZE_CLR_MSK 0xfff80000
81440 /* The reset value of the ALT_USB_DEV_DIEPTSIZ13_XFERSIZE register field. */
81441 #define ALT_USB_DEV_DIEPTSIZ13_XFERSIZE_RESET 0x0
81442 /* Extracts the ALT_USB_DEV_DIEPTSIZ13_XFERSIZE field value from a register. */
81443 #define ALT_USB_DEV_DIEPTSIZ13_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
81444 /* Produces a ALT_USB_DEV_DIEPTSIZ13_XFERSIZE register field value suitable for setting the register. */
81445 #define ALT_USB_DEV_DIEPTSIZ13_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
81446 
81447 /*
81448  * Field : Packet Count - PktCnt
81449  *
81450  * Indicates the total number of USB packets that constitute the Transfer Size
81451  * amount of data for endpoint 0.This field is decremented every time a packet
81452  * (maximum size or short packet) is read from the TxFIFO.
81453  *
81454  * Field Access Macros:
81455  *
81456  */
81457 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ13_PKTCNT register field. */
81458 #define ALT_USB_DEV_DIEPTSIZ13_PKTCNT_LSB 19
81459 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ13_PKTCNT register field. */
81460 #define ALT_USB_DEV_DIEPTSIZ13_PKTCNT_MSB 28
81461 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ13_PKTCNT register field. */
81462 #define ALT_USB_DEV_DIEPTSIZ13_PKTCNT_WIDTH 10
81463 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ13_PKTCNT register field value. */
81464 #define ALT_USB_DEV_DIEPTSIZ13_PKTCNT_SET_MSK 0x1ff80000
81465 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ13_PKTCNT register field value. */
81466 #define ALT_USB_DEV_DIEPTSIZ13_PKTCNT_CLR_MSK 0xe007ffff
81467 /* The reset value of the ALT_USB_DEV_DIEPTSIZ13_PKTCNT register field. */
81468 #define ALT_USB_DEV_DIEPTSIZ13_PKTCNT_RESET 0x0
81469 /* Extracts the ALT_USB_DEV_DIEPTSIZ13_PKTCNT field value from a register. */
81470 #define ALT_USB_DEV_DIEPTSIZ13_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
81471 /* Produces a ALT_USB_DEV_DIEPTSIZ13_PKTCNT register field value suitable for setting the register. */
81472 #define ALT_USB_DEV_DIEPTSIZ13_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
81473 
81474 /*
81475  * Field : Applies to IN endpoints onl - mc
81476  *
81477  * for periodic IN endpoints, this field indicates the number of packets that must
81478  * be transmitted per microframe on the USB. The core uses this field to calculate
81479  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
81480  * field is valid only in Internal DMA mode. It specifies the number of packets the
81481  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
81482  * by the Next Endpoint field of the Device Endpoint-n Control register
81483  * (DIEPCTLn.NextEp)
81484  *
81485  * Field Enumeration Values:
81486  *
81487  * Enum | Value | Description
81488  * :-------------------------------------|:------|:------------
81489  * ALT_USB_DEV_DIEPTSIZ13_MC_E_PKTONE | 0x1 | 1 packet
81490  * ALT_USB_DEV_DIEPTSIZ13_MC_E_PKTTWO | 0x2 | 2 packets
81491  * ALT_USB_DEV_DIEPTSIZ13_MC_E_PKTTHREE | 0x3 | 3 packets
81492  *
81493  * Field Access Macros:
81494  *
81495  */
81496 /*
81497  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ13_MC
81498  *
81499  * 1 packet
81500  */
81501 #define ALT_USB_DEV_DIEPTSIZ13_MC_E_PKTONE 0x1
81502 /*
81503  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ13_MC
81504  *
81505  * 2 packets
81506  */
81507 #define ALT_USB_DEV_DIEPTSIZ13_MC_E_PKTTWO 0x2
81508 /*
81509  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ13_MC
81510  *
81511  * 3 packets
81512  */
81513 #define ALT_USB_DEV_DIEPTSIZ13_MC_E_PKTTHREE 0x3
81514 
81515 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ13_MC register field. */
81516 #define ALT_USB_DEV_DIEPTSIZ13_MC_LSB 29
81517 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ13_MC register field. */
81518 #define ALT_USB_DEV_DIEPTSIZ13_MC_MSB 30
81519 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ13_MC register field. */
81520 #define ALT_USB_DEV_DIEPTSIZ13_MC_WIDTH 2
81521 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ13_MC register field value. */
81522 #define ALT_USB_DEV_DIEPTSIZ13_MC_SET_MSK 0x60000000
81523 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ13_MC register field value. */
81524 #define ALT_USB_DEV_DIEPTSIZ13_MC_CLR_MSK 0x9fffffff
81525 /* The reset value of the ALT_USB_DEV_DIEPTSIZ13_MC register field. */
81526 #define ALT_USB_DEV_DIEPTSIZ13_MC_RESET 0x0
81527 /* Extracts the ALT_USB_DEV_DIEPTSIZ13_MC field value from a register. */
81528 #define ALT_USB_DEV_DIEPTSIZ13_MC_GET(value) (((value) & 0x60000000) >> 29)
81529 /* Produces a ALT_USB_DEV_DIEPTSIZ13_MC register field value suitable for setting the register. */
81530 #define ALT_USB_DEV_DIEPTSIZ13_MC_SET(value) (((value) << 29) & 0x60000000)
81531 
81532 #ifndef __ASSEMBLY__
81533 /*
81534  * WARNING: The C register and register group struct declarations are provided for
81535  * convenience and illustrative purposes. They should, however, be used with
81536  * caution as the C language standard provides no guarantees about the alignment or
81537  * atomicity of device memory accesses. The recommended practice for writing
81538  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
81539  * alt_write_word() functions.
81540  *
81541  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ13.
81542  */
81543 struct ALT_USB_DEV_DIEPTSIZ13_s
81544 {
81545  uint32_t xfersize : 19; /* Transfer Size */
81546  uint32_t PktCnt : 10; /* Packet Count */
81547  uint32_t mc : 2; /* Applies to IN endpoints onl */
81548  uint32_t : 1; /* *UNDEFINED* */
81549 };
81550 
81551 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ13. */
81552 typedef volatile struct ALT_USB_DEV_DIEPTSIZ13_s ALT_USB_DEV_DIEPTSIZ13_t;
81553 #endif /* __ASSEMBLY__ */
81554 
81555 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ13 register from the beginning of the component. */
81556 #define ALT_USB_DEV_DIEPTSIZ13_OFST 0x2b0
81557 /* The address of the ALT_USB_DEV_DIEPTSIZ13 register. */
81558 #define ALT_USB_DEV_DIEPTSIZ13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ13_OFST))
81559 
81560 /*
81561  * Register : Device IN Endpoint 13 DMA Address Register - diepdma13
81562  *
81563  * DMA Addressing.
81564  *
81565  * Register Layout
81566  *
81567  * Bits | Access | Reset | Description
81568  * :-------|:-------|:--------|:------------
81569  * [31:0] | RW | Unknown | DMA Address
81570  *
81571  */
81572 /*
81573  * Field : DMA Address - diepdma13
81574  *
81575  * Holds the start address of the external memory for storing or fetching endpoint
81576  * data. for control endpoints, this field stores control OUT data packets as well
81577  * as SETUP transaction data packets. When more than three SETUP packets are
81578  * received back-to-back, the SETUP data packet in the memory is overwritten. This
81579  * register is incremented on every AHB transaction. The application can give only
81580  * a DWORD-aligned address.
81581  *
81582  * When Scatter/Gather DMA mode is not enabled, the application programs the start
81583  * address value in this field.
81584  *
81585  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
81586  * for the descriptor list.
81587  *
81588  * Field Access Macros:
81589  *
81590  */
81591 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA13_DIEPDMA13 register field. */
81592 #define ALT_USB_DEV_DIEPDMA13_DIEPDMA13_LSB 0
81593 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA13_DIEPDMA13 register field. */
81594 #define ALT_USB_DEV_DIEPDMA13_DIEPDMA13_MSB 31
81595 /* The width in bits of the ALT_USB_DEV_DIEPDMA13_DIEPDMA13 register field. */
81596 #define ALT_USB_DEV_DIEPDMA13_DIEPDMA13_WIDTH 32
81597 /* The mask used to set the ALT_USB_DEV_DIEPDMA13_DIEPDMA13 register field value. */
81598 #define ALT_USB_DEV_DIEPDMA13_DIEPDMA13_SET_MSK 0xffffffff
81599 /* The mask used to clear the ALT_USB_DEV_DIEPDMA13_DIEPDMA13 register field value. */
81600 #define ALT_USB_DEV_DIEPDMA13_DIEPDMA13_CLR_MSK 0x00000000
81601 /* The reset value of the ALT_USB_DEV_DIEPDMA13_DIEPDMA13 register field is UNKNOWN. */
81602 #define ALT_USB_DEV_DIEPDMA13_DIEPDMA13_RESET 0x0
81603 /* Extracts the ALT_USB_DEV_DIEPDMA13_DIEPDMA13 field value from a register. */
81604 #define ALT_USB_DEV_DIEPDMA13_DIEPDMA13_GET(value) (((value) & 0xffffffff) >> 0)
81605 /* Produces a ALT_USB_DEV_DIEPDMA13_DIEPDMA13 register field value suitable for setting the register. */
81606 #define ALT_USB_DEV_DIEPDMA13_DIEPDMA13_SET(value) (((value) << 0) & 0xffffffff)
81607 
81608 #ifndef __ASSEMBLY__
81609 /*
81610  * WARNING: The C register and register group struct declarations are provided for
81611  * convenience and illustrative purposes. They should, however, be used with
81612  * caution as the C language standard provides no guarantees about the alignment or
81613  * atomicity of device memory accesses. The recommended practice for writing
81614  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
81615  * alt_write_word() functions.
81616  *
81617  * The struct declaration for register ALT_USB_DEV_DIEPDMA13.
81618  */
81619 struct ALT_USB_DEV_DIEPDMA13_s
81620 {
81621  uint32_t diepdma13 : 32; /* DMA Address */
81622 };
81623 
81624 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA13. */
81625 typedef volatile struct ALT_USB_DEV_DIEPDMA13_s ALT_USB_DEV_DIEPDMA13_t;
81626 #endif /* __ASSEMBLY__ */
81627 
81628 /* The byte offset of the ALT_USB_DEV_DIEPDMA13 register from the beginning of the component. */
81629 #define ALT_USB_DEV_DIEPDMA13_OFST 0x2b4
81630 /* The address of the ALT_USB_DEV_DIEPDMA13 register. */
81631 #define ALT_USB_DEV_DIEPDMA13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA13_OFST))
81632 
81633 /*
81634  * Register : Device IN Endpoint Transmit FIFO Status Register 13 - dtxfsts13
81635  *
81636  * This register contains the free space information for the Device IN endpoint
81637  * TxFIFO.
81638  *
81639  * Register Layout
81640  *
81641  * Bits | Access | Reset | Description
81642  * :--------|:-------|:-------|:-------------------------------
81643  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
81644  * [31:16] | ??? | 0x0 | *UNDEFINED*
81645  *
81646  */
81647 /*
81648  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
81649  *
81650  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
81651  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
81652  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
81653  * 32,768 words available Others: Reserved
81654  *
81655  * Field Access Macros:
81656  *
81657  */
81658 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL register field. */
81659 #define ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL_LSB 0
81660 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL register field. */
81661 #define ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL_MSB 15
81662 /* The width in bits of the ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL register field. */
81663 #define ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL_WIDTH 16
81664 /* The mask used to set the ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL register field value. */
81665 #define ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
81666 /* The mask used to clear the ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL register field value. */
81667 #define ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
81668 /* The reset value of the ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL register field. */
81669 #define ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL_RESET 0x2000
81670 /* Extracts the ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL field value from a register. */
81671 #define ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
81672 /* Produces a ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL register field value suitable for setting the register. */
81673 #define ALT_USB_DEV_DTXFSTS13_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
81674 
81675 #ifndef __ASSEMBLY__
81676 /*
81677  * WARNING: The C register and register group struct declarations are provided for
81678  * convenience and illustrative purposes. They should, however, be used with
81679  * caution as the C language standard provides no guarantees about the alignment or
81680  * atomicity of device memory accesses. The recommended practice for writing
81681  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
81682  * alt_write_word() functions.
81683  *
81684  * The struct declaration for register ALT_USB_DEV_DTXFSTS13.
81685  */
81686 struct ALT_USB_DEV_DTXFSTS13_s
81687 {
81688  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
81689  uint32_t : 16; /* *UNDEFINED* */
81690 };
81691 
81692 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS13. */
81693 typedef volatile struct ALT_USB_DEV_DTXFSTS13_s ALT_USB_DEV_DTXFSTS13_t;
81694 #endif /* __ASSEMBLY__ */
81695 
81696 /* The byte offset of the ALT_USB_DEV_DTXFSTS13 register from the beginning of the component. */
81697 #define ALT_USB_DEV_DTXFSTS13_OFST 0x2b8
81698 /* The address of the ALT_USB_DEV_DTXFSTS13 register. */
81699 #define ALT_USB_DEV_DTXFSTS13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS13_OFST))
81700 
81701 /*
81702  * Register : Device IN Endpoint 13 DMA Buffer Address Register - diepdmab13
81703  *
81704  * DMA Buffer Address.
81705  *
81706  * Register Layout
81707  *
81708  * Bits | Access | Reset | Description
81709  * :-------|:-------|:--------|:-------------------
81710  * [31:0] | R | Unknown | DMA Buffer Address
81711  *
81712  */
81713 /*
81714  * Field : DMA Buffer Address - diepdmab13
81715  *
81716  * Holds the current buffer address. This register is updated as and when the data
81717  * transfer for the corresponding end point is in progress. This register is
81718  * present only in Scatter/Gather DMA mode.
81719  *
81720  * Field Access Macros:
81721  *
81722  */
81723 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13 register field. */
81724 #define ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13_LSB 0
81725 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13 register field. */
81726 #define ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13_MSB 31
81727 /* The width in bits of the ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13 register field. */
81728 #define ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13_WIDTH 32
81729 /* The mask used to set the ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13 register field value. */
81730 #define ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13_SET_MSK 0xffffffff
81731 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13 register field value. */
81732 #define ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13_CLR_MSK 0x00000000
81733 /* The reset value of the ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13 register field is UNKNOWN. */
81734 #define ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13_RESET 0x0
81735 /* Extracts the ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13 field value from a register. */
81736 #define ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13_GET(value) (((value) & 0xffffffff) >> 0)
81737 /* Produces a ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13 register field value suitable for setting the register. */
81738 #define ALT_USB_DEV_DIEPDMAB13_DIEPDMAB13_SET(value) (((value) << 0) & 0xffffffff)
81739 
81740 #ifndef __ASSEMBLY__
81741 /*
81742  * WARNING: The C register and register group struct declarations are provided for
81743  * convenience and illustrative purposes. They should, however, be used with
81744  * caution as the C language standard provides no guarantees about the alignment or
81745  * atomicity of device memory accesses. The recommended practice for writing
81746  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
81747  * alt_write_word() functions.
81748  *
81749  * The struct declaration for register ALT_USB_DEV_DIEPDMAB13.
81750  */
81751 struct ALT_USB_DEV_DIEPDMAB13_s
81752 {
81753  const uint32_t diepdmab13 : 32; /* DMA Buffer Address */
81754 };
81755 
81756 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB13. */
81757 typedef volatile struct ALT_USB_DEV_DIEPDMAB13_s ALT_USB_DEV_DIEPDMAB13_t;
81758 #endif /* __ASSEMBLY__ */
81759 
81760 /* The byte offset of the ALT_USB_DEV_DIEPDMAB13 register from the beginning of the component. */
81761 #define ALT_USB_DEV_DIEPDMAB13_OFST 0x2bc
81762 /* The address of the ALT_USB_DEV_DIEPDMAB13 register. */
81763 #define ALT_USB_DEV_DIEPDMAB13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB13_OFST))
81764 
81765 /*
81766  * Register : Device Control IN Endpoint 14 Control Register - diepctl14
81767  *
81768  * Endpoint_number: 14
81769  *
81770  * Register Layout
81771  *
81772  * Bits | Access | Reset | Description
81773  * :--------|:-------|:------|:--------------------
81774  * [10:0] | RW | 0x0 | Maximum Packet Size
81775  * [14:11] | ??? | 0x0 | *UNDEFINED*
81776  * [15] | RW | 0x0 | USB Active Endpoint
81777  * [16] | R | 0x0 | Endpoint Data PID
81778  * [17] | R | 0x0 | NAK Status
81779  * [19:18] | RW | 0x0 | Endpoint Type
81780  * [20] | ??? | 0x0 | *UNDEFINED*
81781  * [21] | R | 0x0 | STALL Handshake
81782  * [25:22] | RW | 0x0 | TxFIFO Number
81783  * [26] | W | 0x0 | Clear NAK
81784  * [27] | W | 0x0 | Set NAK
81785  * [28] | W | 0x0 | Set DATA0 PID
81786  * [29] | W | 0x0 | Set DATA1 PID
81787  * [30] | R | 0x0 | Endpoint Disable
81788  * [31] | R | 0x0 | Endpoint Enable
81789  *
81790  */
81791 /*
81792  * Field : Maximum Packet Size - mps
81793  *
81794  * Applies to IN and OUT endpoints. The application must program this field with
81795  * the maximum packet size for the current logical endpoint. This value is in
81796  * bytes.
81797  *
81798  * Field Access Macros:
81799  *
81800  */
81801 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_MPS register field. */
81802 #define ALT_USB_DEV_DIEPCTL14_MPS_LSB 0
81803 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_MPS register field. */
81804 #define ALT_USB_DEV_DIEPCTL14_MPS_MSB 10
81805 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_MPS register field. */
81806 #define ALT_USB_DEV_DIEPCTL14_MPS_WIDTH 11
81807 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_MPS register field value. */
81808 #define ALT_USB_DEV_DIEPCTL14_MPS_SET_MSK 0x000007ff
81809 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_MPS register field value. */
81810 #define ALT_USB_DEV_DIEPCTL14_MPS_CLR_MSK 0xfffff800
81811 /* The reset value of the ALT_USB_DEV_DIEPCTL14_MPS register field. */
81812 #define ALT_USB_DEV_DIEPCTL14_MPS_RESET 0x0
81813 /* Extracts the ALT_USB_DEV_DIEPCTL14_MPS field value from a register. */
81814 #define ALT_USB_DEV_DIEPCTL14_MPS_GET(value) (((value) & 0x000007ff) >> 0)
81815 /* Produces a ALT_USB_DEV_DIEPCTL14_MPS register field value suitable for setting the register. */
81816 #define ALT_USB_DEV_DIEPCTL14_MPS_SET(value) (((value) << 0) & 0x000007ff)
81817 
81818 /*
81819  * Field : USB Active Endpoint - usbactep
81820  *
81821  * Indicates whether this endpoint is active in the current configuration and
81822  * interface. The core clears this bit for all endpoints (other than EP 0) after
81823  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
81824  * commands, the application must program endpoint registers accordingly and set
81825  * this bit.
81826  *
81827  * Field Enumeration Values:
81828  *
81829  * Enum | Value | Description
81830  * :--------------------------------------|:------|:--------------------
81831  * ALT_USB_DEV_DIEPCTL14_USBACTEP_E_DISD | 0x0 | Not Active
81832  * ALT_USB_DEV_DIEPCTL14_USBACTEP_E_END | 0x1 | USB Active Endpoint
81833  *
81834  * Field Access Macros:
81835  *
81836  */
81837 /*
81838  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_USBACTEP
81839  *
81840  * Not Active
81841  */
81842 #define ALT_USB_DEV_DIEPCTL14_USBACTEP_E_DISD 0x0
81843 /*
81844  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_USBACTEP
81845  *
81846  * USB Active Endpoint
81847  */
81848 #define ALT_USB_DEV_DIEPCTL14_USBACTEP_E_END 0x1
81849 
81850 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_USBACTEP register field. */
81851 #define ALT_USB_DEV_DIEPCTL14_USBACTEP_LSB 15
81852 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_USBACTEP register field. */
81853 #define ALT_USB_DEV_DIEPCTL14_USBACTEP_MSB 15
81854 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_USBACTEP register field. */
81855 #define ALT_USB_DEV_DIEPCTL14_USBACTEP_WIDTH 1
81856 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_USBACTEP register field value. */
81857 #define ALT_USB_DEV_DIEPCTL14_USBACTEP_SET_MSK 0x00008000
81858 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_USBACTEP register field value. */
81859 #define ALT_USB_DEV_DIEPCTL14_USBACTEP_CLR_MSK 0xffff7fff
81860 /* The reset value of the ALT_USB_DEV_DIEPCTL14_USBACTEP register field. */
81861 #define ALT_USB_DEV_DIEPCTL14_USBACTEP_RESET 0x0
81862 /* Extracts the ALT_USB_DEV_DIEPCTL14_USBACTEP field value from a register. */
81863 #define ALT_USB_DEV_DIEPCTL14_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
81864 /* Produces a ALT_USB_DEV_DIEPCTL14_USBACTEP register field value suitable for setting the register. */
81865 #define ALT_USB_DEV_DIEPCTL14_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
81866 
81867 /*
81868  * Field : Endpoint Data PID - dpid
81869  *
81870  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
81871  * packet to be received or transmitted on this endpoint. The application must
81872  * program the PID of the first packet to be received or transmitted on this
81873  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
81874  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
81875  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
81876  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
81877  * DMA mode:
81878  *
81879  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
81880  * number in which the core transmits/receives isochronous data for this endpoint.
81881  * The application must program the even/odd (micro) frame number in which it
81882  * intends to transmit/receive isochronous data for this endpoint using the
81883  * SetEvnFr and SetOddFr fields in this register.
81884  *
81885  * 0: Even (micro)frame
81886  *
81887  * 1: Odd (micro)frame
81888  *
81889  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
81890  * number in which to send data is provided in the transmit descriptor structure.
81891  * The frame in which data is received is updated in receive descriptor structure.
81892  *
81893  * Field Enumeration Values:
81894  *
81895  * Enum | Value | Description
81896  * :-----------------------------------|:------|:-----------------------------
81897  * ALT_USB_DEV_DIEPCTL14_DPID_E_INACT | 0x0 | Endpoint Data PID not active
81898  * ALT_USB_DEV_DIEPCTL14_DPID_E_ACT | 0x1 | Endpoint Data PID active
81899  *
81900  * Field Access Macros:
81901  *
81902  */
81903 /*
81904  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_DPID
81905  *
81906  * Endpoint Data PID not active
81907  */
81908 #define ALT_USB_DEV_DIEPCTL14_DPID_E_INACT 0x0
81909 /*
81910  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_DPID
81911  *
81912  * Endpoint Data PID active
81913  */
81914 #define ALT_USB_DEV_DIEPCTL14_DPID_E_ACT 0x1
81915 
81916 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_DPID register field. */
81917 #define ALT_USB_DEV_DIEPCTL14_DPID_LSB 16
81918 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_DPID register field. */
81919 #define ALT_USB_DEV_DIEPCTL14_DPID_MSB 16
81920 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_DPID register field. */
81921 #define ALT_USB_DEV_DIEPCTL14_DPID_WIDTH 1
81922 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_DPID register field value. */
81923 #define ALT_USB_DEV_DIEPCTL14_DPID_SET_MSK 0x00010000
81924 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_DPID register field value. */
81925 #define ALT_USB_DEV_DIEPCTL14_DPID_CLR_MSK 0xfffeffff
81926 /* The reset value of the ALT_USB_DEV_DIEPCTL14_DPID register field. */
81927 #define ALT_USB_DEV_DIEPCTL14_DPID_RESET 0x0
81928 /* Extracts the ALT_USB_DEV_DIEPCTL14_DPID field value from a register. */
81929 #define ALT_USB_DEV_DIEPCTL14_DPID_GET(value) (((value) & 0x00010000) >> 16)
81930 /* Produces a ALT_USB_DEV_DIEPCTL14_DPID register field value suitable for setting the register. */
81931 #define ALT_USB_DEV_DIEPCTL14_DPID_SET(value) (((value) << 16) & 0x00010000)
81932 
81933 /*
81934  * Field : NAK Status - naksts
81935  *
81936  * When either the application or the core sets this bit:
81937  *
81938  * * The core stops receiving any data on an OUT endpoint, even if there is space
81939  * in the RxFIFO to accommodate the incoming packet.
81940  *
81941  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
81942  * IN endpoint, even if there data is available in the TxFIFO.
81943  *
81944  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
81945  * even if there data is available in the TxFIFO.
81946  *
81947  * Irrespective of this bit's setting, the core always responds to SETUP data
81948  * packets with an ACK handshake.
81949  *
81950  * Field Enumeration Values:
81951  *
81952  * Enum | Value | Description
81953  * :--------------------------------------|:------|:------------------------------------------------
81954  * ALT_USB_DEV_DIEPCTL14_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
81955  * : | | based on the FIFO status
81956  * ALT_USB_DEV_DIEPCTL14_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
81957  * : | | endpoint
81958  *
81959  * Field Access Macros:
81960  *
81961  */
81962 /*
81963  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_NAKSTS
81964  *
81965  * The core is transmitting non-NAK handshakes based on the FIFO status
81966  */
81967 #define ALT_USB_DEV_DIEPCTL14_NAKSTS_E_NONNAK 0x0
81968 /*
81969  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_NAKSTS
81970  *
81971  * The core is transmitting NAK handshakes on this endpoint
81972  */
81973 #define ALT_USB_DEV_DIEPCTL14_NAKSTS_E_NAK 0x1
81974 
81975 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_NAKSTS register field. */
81976 #define ALT_USB_DEV_DIEPCTL14_NAKSTS_LSB 17
81977 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_NAKSTS register field. */
81978 #define ALT_USB_DEV_DIEPCTL14_NAKSTS_MSB 17
81979 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_NAKSTS register field. */
81980 #define ALT_USB_DEV_DIEPCTL14_NAKSTS_WIDTH 1
81981 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_NAKSTS register field value. */
81982 #define ALT_USB_DEV_DIEPCTL14_NAKSTS_SET_MSK 0x00020000
81983 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_NAKSTS register field value. */
81984 #define ALT_USB_DEV_DIEPCTL14_NAKSTS_CLR_MSK 0xfffdffff
81985 /* The reset value of the ALT_USB_DEV_DIEPCTL14_NAKSTS register field. */
81986 #define ALT_USB_DEV_DIEPCTL14_NAKSTS_RESET 0x0
81987 /* Extracts the ALT_USB_DEV_DIEPCTL14_NAKSTS field value from a register. */
81988 #define ALT_USB_DEV_DIEPCTL14_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
81989 /* Produces a ALT_USB_DEV_DIEPCTL14_NAKSTS register field value suitable for setting the register. */
81990 #define ALT_USB_DEV_DIEPCTL14_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
81991 
81992 /*
81993  * Field : Endpoint Type - eptype
81994  *
81995  * This is the transfer type supported by this logical endpoint.
81996  *
81997  * Field Enumeration Values:
81998  *
81999  * Enum | Value | Description
82000  * :-------------------------------------------|:------|:------------
82001  * ALT_USB_DEV_DIEPCTL14_EPTYPE_E_CTL | 0x0 | Control
82002  * ALT_USB_DEV_DIEPCTL14_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
82003  * ALT_USB_DEV_DIEPCTL14_EPTYPE_E_BULK | 0x2 | Bulk
82004  * ALT_USB_DEV_DIEPCTL14_EPTYPE_E_INTERRUP | 0x3 | Interrupt
82005  *
82006  * Field Access Macros:
82007  *
82008  */
82009 /*
82010  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_EPTYPE
82011  *
82012  * Control
82013  */
82014 #define ALT_USB_DEV_DIEPCTL14_EPTYPE_E_CTL 0x0
82015 /*
82016  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_EPTYPE
82017  *
82018  * Isochronous
82019  */
82020 #define ALT_USB_DEV_DIEPCTL14_EPTYPE_E_ISOCHRONOUS 0x1
82021 /*
82022  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_EPTYPE
82023  *
82024  * Bulk
82025  */
82026 #define ALT_USB_DEV_DIEPCTL14_EPTYPE_E_BULK 0x2
82027 /*
82028  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_EPTYPE
82029  *
82030  * Interrupt
82031  */
82032 #define ALT_USB_DEV_DIEPCTL14_EPTYPE_E_INTERRUP 0x3
82033 
82034 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_EPTYPE register field. */
82035 #define ALT_USB_DEV_DIEPCTL14_EPTYPE_LSB 18
82036 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_EPTYPE register field. */
82037 #define ALT_USB_DEV_DIEPCTL14_EPTYPE_MSB 19
82038 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_EPTYPE register field. */
82039 #define ALT_USB_DEV_DIEPCTL14_EPTYPE_WIDTH 2
82040 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_EPTYPE register field value. */
82041 #define ALT_USB_DEV_DIEPCTL14_EPTYPE_SET_MSK 0x000c0000
82042 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_EPTYPE register field value. */
82043 #define ALT_USB_DEV_DIEPCTL14_EPTYPE_CLR_MSK 0xfff3ffff
82044 /* The reset value of the ALT_USB_DEV_DIEPCTL14_EPTYPE register field. */
82045 #define ALT_USB_DEV_DIEPCTL14_EPTYPE_RESET 0x0
82046 /* Extracts the ALT_USB_DEV_DIEPCTL14_EPTYPE field value from a register. */
82047 #define ALT_USB_DEV_DIEPCTL14_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
82048 /* Produces a ALT_USB_DEV_DIEPCTL14_EPTYPE register field value suitable for setting the register. */
82049 #define ALT_USB_DEV_DIEPCTL14_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
82050 
82051 /*
82052  * Field : STALL Handshake - stall
82053  *
82054  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
82055  * application sets this bit to stall all tokens from the USB host to this
82056  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
82057  * along with this bit, the STALL bit takes priority. Only the application can
82058  * clear this bit, never the core. Applies to control endpoints only. The
82059  * application can only set this bit, and the core clears it, when a SETUP token is
82060  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
82061  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
82062  * of this bit's setting, the core always responds to SETUP data packets with an
82063  * ACK handshake.
82064  *
82065  * Field Enumeration Values:
82066  *
82067  * Enum | Value | Description
82068  * :------------------------------------|:------|:----------------------------
82069  * ALT_USB_DEV_DIEPCTL14_STALL_E_INACT | 0x0 | STALL All Tokens not active
82070  * ALT_USB_DEV_DIEPCTL14_STALL_E_ACT | 0x1 | STALL All Tokens active
82071  *
82072  * Field Access Macros:
82073  *
82074  */
82075 /*
82076  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_STALL
82077  *
82078  * STALL All Tokens not active
82079  */
82080 #define ALT_USB_DEV_DIEPCTL14_STALL_E_INACT 0x0
82081 /*
82082  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_STALL
82083  *
82084  * STALL All Tokens active
82085  */
82086 #define ALT_USB_DEV_DIEPCTL14_STALL_E_ACT 0x1
82087 
82088 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_STALL register field. */
82089 #define ALT_USB_DEV_DIEPCTL14_STALL_LSB 21
82090 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_STALL register field. */
82091 #define ALT_USB_DEV_DIEPCTL14_STALL_MSB 21
82092 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_STALL register field. */
82093 #define ALT_USB_DEV_DIEPCTL14_STALL_WIDTH 1
82094 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_STALL register field value. */
82095 #define ALT_USB_DEV_DIEPCTL14_STALL_SET_MSK 0x00200000
82096 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_STALL register field value. */
82097 #define ALT_USB_DEV_DIEPCTL14_STALL_CLR_MSK 0xffdfffff
82098 /* The reset value of the ALT_USB_DEV_DIEPCTL14_STALL register field. */
82099 #define ALT_USB_DEV_DIEPCTL14_STALL_RESET 0x0
82100 /* Extracts the ALT_USB_DEV_DIEPCTL14_STALL field value from a register. */
82101 #define ALT_USB_DEV_DIEPCTL14_STALL_GET(value) (((value) & 0x00200000) >> 21)
82102 /* Produces a ALT_USB_DEV_DIEPCTL14_STALL register field value suitable for setting the register. */
82103 #define ALT_USB_DEV_DIEPCTL14_STALL_SET(value) (((value) << 21) & 0x00200000)
82104 
82105 /*
82106  * Field : TxFIFO Number - txfnum
82107  *
82108  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
82109  * endpoints must map this to the corresponding Periodic TxFIFO number.
82110  *
82111  * 4'h0: Non-Periodic TxFIFO
82112  *
82113  * Others: Specified Periodic TxFIFO.number
82114  *
82115  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
82116  * applications such as mass storage. The core treats an IN endpoint as a non-
82117  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
82118  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
82119  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
82120  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
82121  * This field is valid only for IN endpoints.
82122  *
82123  * Field Access Macros:
82124  *
82125  */
82126 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_TXFNUM register field. */
82127 #define ALT_USB_DEV_DIEPCTL14_TXFNUM_LSB 22
82128 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_TXFNUM register field. */
82129 #define ALT_USB_DEV_DIEPCTL14_TXFNUM_MSB 25
82130 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_TXFNUM register field. */
82131 #define ALT_USB_DEV_DIEPCTL14_TXFNUM_WIDTH 4
82132 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_TXFNUM register field value. */
82133 #define ALT_USB_DEV_DIEPCTL14_TXFNUM_SET_MSK 0x03c00000
82134 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_TXFNUM register field value. */
82135 #define ALT_USB_DEV_DIEPCTL14_TXFNUM_CLR_MSK 0xfc3fffff
82136 /* The reset value of the ALT_USB_DEV_DIEPCTL14_TXFNUM register field. */
82137 #define ALT_USB_DEV_DIEPCTL14_TXFNUM_RESET 0x0
82138 /* Extracts the ALT_USB_DEV_DIEPCTL14_TXFNUM field value from a register. */
82139 #define ALT_USB_DEV_DIEPCTL14_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
82140 /* Produces a ALT_USB_DEV_DIEPCTL14_TXFNUM register field value suitable for setting the register. */
82141 #define ALT_USB_DEV_DIEPCTL14_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
82142 
82143 /*
82144  * Field : Clear NAK - cnak
82145  *
82146  * A write to this bit clears the NAK bit for the endpoint.
82147  *
82148  * Field Enumeration Values:
82149  *
82150  * Enum | Value | Description
82151  * :-----------------------------------|:------|:-------------
82152  * ALT_USB_DEV_DIEPCTL14_CNAK_E_INACT | 0x0 | No Clear NAK
82153  * ALT_USB_DEV_DIEPCTL14_CNAK_E_ACT | 0x1 | Clear NAK
82154  *
82155  * Field Access Macros:
82156  *
82157  */
82158 /*
82159  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_CNAK
82160  *
82161  * No Clear NAK
82162  */
82163 #define ALT_USB_DEV_DIEPCTL14_CNAK_E_INACT 0x0
82164 /*
82165  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_CNAK
82166  *
82167  * Clear NAK
82168  */
82169 #define ALT_USB_DEV_DIEPCTL14_CNAK_E_ACT 0x1
82170 
82171 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_CNAK register field. */
82172 #define ALT_USB_DEV_DIEPCTL14_CNAK_LSB 26
82173 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_CNAK register field. */
82174 #define ALT_USB_DEV_DIEPCTL14_CNAK_MSB 26
82175 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_CNAK register field. */
82176 #define ALT_USB_DEV_DIEPCTL14_CNAK_WIDTH 1
82177 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_CNAK register field value. */
82178 #define ALT_USB_DEV_DIEPCTL14_CNAK_SET_MSK 0x04000000
82179 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_CNAK register field value. */
82180 #define ALT_USB_DEV_DIEPCTL14_CNAK_CLR_MSK 0xfbffffff
82181 /* The reset value of the ALT_USB_DEV_DIEPCTL14_CNAK register field. */
82182 #define ALT_USB_DEV_DIEPCTL14_CNAK_RESET 0x0
82183 /* Extracts the ALT_USB_DEV_DIEPCTL14_CNAK field value from a register. */
82184 #define ALT_USB_DEV_DIEPCTL14_CNAK_GET(value) (((value) & 0x04000000) >> 26)
82185 /* Produces a ALT_USB_DEV_DIEPCTL14_CNAK register field value suitable for setting the register. */
82186 #define ALT_USB_DEV_DIEPCTL14_CNAK_SET(value) (((value) << 26) & 0x04000000)
82187 
82188 /*
82189  * Field : Set NAK - snak
82190  *
82191  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
82192  * application can control the transmission of NAK handshakes on an endpoint. The
82193  * core can also Set this bit for an endpoint after a SETUP packet is received on
82194  * that endpoint.
82195  *
82196  * Field Enumeration Values:
82197  *
82198  * Enum | Value | Description
82199  * :-----------------------------------|:------|:------------
82200  * ALT_USB_DEV_DIEPCTL14_SNAK_E_INACT | 0x0 | No Set NAK
82201  * ALT_USB_DEV_DIEPCTL14_SNAK_E_ACT | 0x1 | Set NAK
82202  *
82203  * Field Access Macros:
82204  *
82205  */
82206 /*
82207  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_SNAK
82208  *
82209  * No Set NAK
82210  */
82211 #define ALT_USB_DEV_DIEPCTL14_SNAK_E_INACT 0x0
82212 /*
82213  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_SNAK
82214  *
82215  * Set NAK
82216  */
82217 #define ALT_USB_DEV_DIEPCTL14_SNAK_E_ACT 0x1
82218 
82219 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_SNAK register field. */
82220 #define ALT_USB_DEV_DIEPCTL14_SNAK_LSB 27
82221 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_SNAK register field. */
82222 #define ALT_USB_DEV_DIEPCTL14_SNAK_MSB 27
82223 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_SNAK register field. */
82224 #define ALT_USB_DEV_DIEPCTL14_SNAK_WIDTH 1
82225 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_SNAK register field value. */
82226 #define ALT_USB_DEV_DIEPCTL14_SNAK_SET_MSK 0x08000000
82227 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_SNAK register field value. */
82228 #define ALT_USB_DEV_DIEPCTL14_SNAK_CLR_MSK 0xf7ffffff
82229 /* The reset value of the ALT_USB_DEV_DIEPCTL14_SNAK register field. */
82230 #define ALT_USB_DEV_DIEPCTL14_SNAK_RESET 0x0
82231 /* Extracts the ALT_USB_DEV_DIEPCTL14_SNAK field value from a register. */
82232 #define ALT_USB_DEV_DIEPCTL14_SNAK_GET(value) (((value) & 0x08000000) >> 27)
82233 /* Produces a ALT_USB_DEV_DIEPCTL14_SNAK register field value suitable for setting the register. */
82234 #define ALT_USB_DEV_DIEPCTL14_SNAK_SET(value) (((value) << 27) & 0x08000000)
82235 
82236 /*
82237  * Field : Set DATA0 PID - setd0pid
82238  *
82239  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
82240  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
82241  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
82242  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
82243  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
82244  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
82245  * mode is enabled, this field is reserved. The frame number in which to send data
82246  * is in the transmit descriptor structure. The frame in which to receive data is
82247  * updated in receive descriptor structure.
82248  *
82249  * Field Enumeration Values:
82250  *
82251  * Enum | Value | Description
82252  * :--------------------------------------|:------|:----------------------------
82253  * ALT_USB_DEV_DIEPCTL14_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
82254  * ALT_USB_DEV_DIEPCTL14_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
82255  *
82256  * Field Access Macros:
82257  *
82258  */
82259 /*
82260  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_SETD0PID
82261  *
82262  * Disables Set DATA0 PID
82263  */
82264 #define ALT_USB_DEV_DIEPCTL14_SETD0PID_E_DISD 0x0
82265 /*
82266  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_SETD0PID
82267  *
82268  * Endpoint Data PID to DATA0)
82269  */
82270 #define ALT_USB_DEV_DIEPCTL14_SETD0PID_E_END 0x1
82271 
82272 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_SETD0PID register field. */
82273 #define ALT_USB_DEV_DIEPCTL14_SETD0PID_LSB 28
82274 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_SETD0PID register field. */
82275 #define ALT_USB_DEV_DIEPCTL14_SETD0PID_MSB 28
82276 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_SETD0PID register field. */
82277 #define ALT_USB_DEV_DIEPCTL14_SETD0PID_WIDTH 1
82278 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_SETD0PID register field value. */
82279 #define ALT_USB_DEV_DIEPCTL14_SETD0PID_SET_MSK 0x10000000
82280 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_SETD0PID register field value. */
82281 #define ALT_USB_DEV_DIEPCTL14_SETD0PID_CLR_MSK 0xefffffff
82282 /* The reset value of the ALT_USB_DEV_DIEPCTL14_SETD0PID register field. */
82283 #define ALT_USB_DEV_DIEPCTL14_SETD0PID_RESET 0x0
82284 /* Extracts the ALT_USB_DEV_DIEPCTL14_SETD0PID field value from a register. */
82285 #define ALT_USB_DEV_DIEPCTL14_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
82286 /* Produces a ALT_USB_DEV_DIEPCTL14_SETD0PID register field value suitable for setting the register. */
82287 #define ALT_USB_DEV_DIEPCTL14_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
82288 
82289 /*
82290  * Field : Set DATA1 PID - setd1pid
82291  *
82292  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
82293  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
82294  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
82295  *
82296  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
82297  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
82298  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
82299  *
82300  * Field Enumeration Values:
82301  *
82302  * Enum | Value | Description
82303  * :--------------------------------------|:------|:-----------------------
82304  * ALT_USB_DEV_DIEPCTL14_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
82305  * ALT_USB_DEV_DIEPCTL14_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
82306  *
82307  * Field Access Macros:
82308  *
82309  */
82310 /*
82311  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_SETD1PID
82312  *
82313  * Disables Set DATA1 PID
82314  */
82315 #define ALT_USB_DEV_DIEPCTL14_SETD1PID_E_DISD 0x0
82316 /*
82317  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_SETD1PID
82318  *
82319  * Enables Set DATA1 PID
82320  */
82321 #define ALT_USB_DEV_DIEPCTL14_SETD1PID_E_END 0x1
82322 
82323 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_SETD1PID register field. */
82324 #define ALT_USB_DEV_DIEPCTL14_SETD1PID_LSB 29
82325 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_SETD1PID register field. */
82326 #define ALT_USB_DEV_DIEPCTL14_SETD1PID_MSB 29
82327 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_SETD1PID register field. */
82328 #define ALT_USB_DEV_DIEPCTL14_SETD1PID_WIDTH 1
82329 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_SETD1PID register field value. */
82330 #define ALT_USB_DEV_DIEPCTL14_SETD1PID_SET_MSK 0x20000000
82331 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_SETD1PID register field value. */
82332 #define ALT_USB_DEV_DIEPCTL14_SETD1PID_CLR_MSK 0xdfffffff
82333 /* The reset value of the ALT_USB_DEV_DIEPCTL14_SETD1PID register field. */
82334 #define ALT_USB_DEV_DIEPCTL14_SETD1PID_RESET 0x0
82335 /* Extracts the ALT_USB_DEV_DIEPCTL14_SETD1PID field value from a register. */
82336 #define ALT_USB_DEV_DIEPCTL14_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
82337 /* Produces a ALT_USB_DEV_DIEPCTL14_SETD1PID register field value suitable for setting the register. */
82338 #define ALT_USB_DEV_DIEPCTL14_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
82339 
82340 /*
82341  * Field : Endpoint Disable - epdis
82342  *
82343  * Applies to IN and OUT endpoints. The application sets this bit to stop
82344  * transmitting/receiving data on an endpoint, even before the transfer for that
82345  * endpoint is complete. The application must wait for the Endpoint Disabled
82346  * interrupt before treating the endpoint as disabled. The core clears this bit
82347  * before setting the Endpoint Disabled interrupt. The application must set this
82348  * bit only if Endpoint Enable is already set for this endpoint.
82349  *
82350  * Field Enumeration Values:
82351  *
82352  * Enum | Value | Description
82353  * :------------------------------------|:------|:--------------------
82354  * ALT_USB_DEV_DIEPCTL14_EPDIS_E_INACT | 0x0 | No Endpoint Disable
82355  * ALT_USB_DEV_DIEPCTL14_EPDIS_E_ACT | 0x1 | Endpoint Disable
82356  *
82357  * Field Access Macros:
82358  *
82359  */
82360 /*
82361  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_EPDIS
82362  *
82363  * No Endpoint Disable
82364  */
82365 #define ALT_USB_DEV_DIEPCTL14_EPDIS_E_INACT 0x0
82366 /*
82367  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_EPDIS
82368  *
82369  * Endpoint Disable
82370  */
82371 #define ALT_USB_DEV_DIEPCTL14_EPDIS_E_ACT 0x1
82372 
82373 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_EPDIS register field. */
82374 #define ALT_USB_DEV_DIEPCTL14_EPDIS_LSB 30
82375 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_EPDIS register field. */
82376 #define ALT_USB_DEV_DIEPCTL14_EPDIS_MSB 30
82377 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_EPDIS register field. */
82378 #define ALT_USB_DEV_DIEPCTL14_EPDIS_WIDTH 1
82379 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_EPDIS register field value. */
82380 #define ALT_USB_DEV_DIEPCTL14_EPDIS_SET_MSK 0x40000000
82381 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_EPDIS register field value. */
82382 #define ALT_USB_DEV_DIEPCTL14_EPDIS_CLR_MSK 0xbfffffff
82383 /* The reset value of the ALT_USB_DEV_DIEPCTL14_EPDIS register field. */
82384 #define ALT_USB_DEV_DIEPCTL14_EPDIS_RESET 0x0
82385 /* Extracts the ALT_USB_DEV_DIEPCTL14_EPDIS field value from a register. */
82386 #define ALT_USB_DEV_DIEPCTL14_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
82387 /* Produces a ALT_USB_DEV_DIEPCTL14_EPDIS register field value suitable for setting the register. */
82388 #define ALT_USB_DEV_DIEPCTL14_EPDIS_SET(value) (((value) << 30) & 0x40000000)
82389 
82390 /*
82391  * Field : Endpoint Enable - epena
82392  *
82393  * Applies to IN and OUT endpoints.
82394  *
82395  * * When Scatter/Gather DMA mode is enabled,
82396  *
82397  * * for IN endpoints this bit indicates that the descriptor structure and data
82398  * buffer with data ready to transmit is setup.
82399  *
82400  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
82401  * receive data is setup.
82402  *
82403  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
82404  * mode:
82405  *
82406  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
82407  * the endpoint.
82408  *
82409  * * for OUT endpoints, this bit indicates that the application has allocated the
82410  * memory to start receiving data from the USB.
82411  *
82412  * * The core clears this bit before setting any of the following interrupts on
82413  * this endpoint:
82414  *
82415  * * SETUP Phase Done
82416  *
82417  * * Endpoint Disabled
82418  *
82419  * * Transfer Completed
82420  *
82421  * for control endpoints in DMA mode, this bit must be set to be able to transfer
82422  * SETUP data packets in memory.
82423  *
82424  * Field Enumeration Values:
82425  *
82426  * Enum | Value | Description
82427  * :------------------------------------|:------|:-------------------------
82428  * ALT_USB_DEV_DIEPCTL14_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
82429  * ALT_USB_DEV_DIEPCTL14_EPENA_E_ACT | 0x1 | Endpoint Enable active
82430  *
82431  * Field Access Macros:
82432  *
82433  */
82434 /*
82435  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_EPENA
82436  *
82437  * Endpoint Enable inactive
82438  */
82439 #define ALT_USB_DEV_DIEPCTL14_EPENA_E_INACT 0x0
82440 /*
82441  * Enumerated value for register field ALT_USB_DEV_DIEPCTL14_EPENA
82442  *
82443  * Endpoint Enable active
82444  */
82445 #define ALT_USB_DEV_DIEPCTL14_EPENA_E_ACT 0x1
82446 
82447 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL14_EPENA register field. */
82448 #define ALT_USB_DEV_DIEPCTL14_EPENA_LSB 31
82449 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL14_EPENA register field. */
82450 #define ALT_USB_DEV_DIEPCTL14_EPENA_MSB 31
82451 /* The width in bits of the ALT_USB_DEV_DIEPCTL14_EPENA register field. */
82452 #define ALT_USB_DEV_DIEPCTL14_EPENA_WIDTH 1
82453 /* The mask used to set the ALT_USB_DEV_DIEPCTL14_EPENA register field value. */
82454 #define ALT_USB_DEV_DIEPCTL14_EPENA_SET_MSK 0x80000000
82455 /* The mask used to clear the ALT_USB_DEV_DIEPCTL14_EPENA register field value. */
82456 #define ALT_USB_DEV_DIEPCTL14_EPENA_CLR_MSK 0x7fffffff
82457 /* The reset value of the ALT_USB_DEV_DIEPCTL14_EPENA register field. */
82458 #define ALT_USB_DEV_DIEPCTL14_EPENA_RESET 0x0
82459 /* Extracts the ALT_USB_DEV_DIEPCTL14_EPENA field value from a register. */
82460 #define ALT_USB_DEV_DIEPCTL14_EPENA_GET(value) (((value) & 0x80000000) >> 31)
82461 /* Produces a ALT_USB_DEV_DIEPCTL14_EPENA register field value suitable for setting the register. */
82462 #define ALT_USB_DEV_DIEPCTL14_EPENA_SET(value) (((value) << 31) & 0x80000000)
82463 
82464 #ifndef __ASSEMBLY__
82465 /*
82466  * WARNING: The C register and register group struct declarations are provided for
82467  * convenience and illustrative purposes. They should, however, be used with
82468  * caution as the C language standard provides no guarantees about the alignment or
82469  * atomicity of device memory accesses. The recommended practice for writing
82470  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
82471  * alt_write_word() functions.
82472  *
82473  * The struct declaration for register ALT_USB_DEV_DIEPCTL14.
82474  */
82475 struct ALT_USB_DEV_DIEPCTL14_s
82476 {
82477  uint32_t mps : 11; /* Maximum Packet Size */
82478  uint32_t : 4; /* *UNDEFINED* */
82479  uint32_t usbactep : 1; /* USB Active Endpoint */
82480  const uint32_t dpid : 1; /* Endpoint Data PID */
82481  const uint32_t naksts : 1; /* NAK Status */
82482  uint32_t eptype : 2; /* Endpoint Type */
82483  uint32_t : 1; /* *UNDEFINED* */
82484  const uint32_t stall : 1; /* STALL Handshake */
82485  uint32_t txfnum : 4; /* TxFIFO Number */
82486  uint32_t cnak : 1; /* Clear NAK */
82487  uint32_t snak : 1; /* Set NAK */
82488  uint32_t setd0pid : 1; /* Set DATA0 PID */
82489  uint32_t setd1pid : 1; /* Set DATA1 PID */
82490  const uint32_t epdis : 1; /* Endpoint Disable */
82491  const uint32_t epena : 1; /* Endpoint Enable */
82492 };
82493 
82494 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL14. */
82495 typedef volatile struct ALT_USB_DEV_DIEPCTL14_s ALT_USB_DEV_DIEPCTL14_t;
82496 #endif /* __ASSEMBLY__ */
82497 
82498 /* The byte offset of the ALT_USB_DEV_DIEPCTL14 register from the beginning of the component. */
82499 #define ALT_USB_DEV_DIEPCTL14_OFST 0x2c0
82500 /* The address of the ALT_USB_DEV_DIEPCTL14 register. */
82501 #define ALT_USB_DEV_DIEPCTL14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL14_OFST))
82502 
82503 /*
82504  * Register : Device IN Endpoint 14 Interrupt Register - diepint14
82505  *
82506  * This register indicates the status of an endpoint with respect to USB- and AHB-
82507  * related events. The application must read this register when the OUT Endpoints
82508  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
82509  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
82510  * can read this register, it must first read the Device All Endpoints Interrupt
82511  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
82512  * Interrupt register. The application must clear the appropriate bit in this
82513  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
82514  *
82515  * Register Layout
82516  *
82517  * Bits | Access | Reset | Description
82518  * :--------|:-------|:------|:---------------------------------------
82519  * [0] | R | 0x0 | Transfer Completed Interrupt
82520  * [1] | R | 0x0 | Endpoint Disabled Interrupt
82521  * [2] | R | 0x0 | AHB Error
82522  * [3] | R | 0x0 | Timeout Condition
82523  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
82524  * [5] | R | 0x0 | IN Token Received with EP Mismatch
82525  * [6] | R | 0x0 | IN Endpoint NAK Effective
82526  * [7] | R | 0x1 | Transmit FIFO Empty
82527  * [8] | R | 0x0 | Fifo Underrun
82528  * [9] | R | 0x0 | BNA Interrupt
82529  * [10] | ??? | 0x0 | *UNDEFINED*
82530  * [11] | R | 0x0 | Packet Drop Status
82531  * [12] | R | 0x0 | BbleErr Interrupt (
82532  * [13] | R | 0x0 | NAK Interrupt
82533  * [14] | R | 0x0 | NYET Interrupt
82534  * [31:15] | ??? | 0x0 | *UNDEFINED*
82535  *
82536  */
82537 /*
82538  * Field : Transfer Completed Interrupt - xfercompl
82539  *
82540  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
82541  *
82542  * * for IN endpoint this field indicates that the requested data from the
82543  * descriptor is moved from external system memory to internal FIFO.
82544  *
82545  * * for OUT endpoint this field indicates that the requested data from the
82546  * internal FIFO is moved to external system memory. This interrupt is generated
82547  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
82548  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
82549  * this field indicates that the programmed transfer is complete on the AHB as
82550  * well as on the USB, for this endpoint.
82551  *
82552  * Field Enumeration Values:
82553  *
82554  * Enum | Value | Description
82555  * :----------------------------------------|:------|:-----------------------------
82556  * ALT_USB_DEV_DIEPINT14_XFERCOMPL_E_INACT | 0x0 | No Interrupt
82557  * ALT_USB_DEV_DIEPINT14_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
82558  *
82559  * Field Access Macros:
82560  *
82561  */
82562 /*
82563  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_XFERCOMPL
82564  *
82565  * No Interrupt
82566  */
82567 #define ALT_USB_DEV_DIEPINT14_XFERCOMPL_E_INACT 0x0
82568 /*
82569  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_XFERCOMPL
82570  *
82571  * Transfer Completed Interrupt
82572  */
82573 #define ALT_USB_DEV_DIEPINT14_XFERCOMPL_E_ACT 0x1
82574 
82575 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_XFERCOMPL register field. */
82576 #define ALT_USB_DEV_DIEPINT14_XFERCOMPL_LSB 0
82577 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_XFERCOMPL register field. */
82578 #define ALT_USB_DEV_DIEPINT14_XFERCOMPL_MSB 0
82579 /* The width in bits of the ALT_USB_DEV_DIEPINT14_XFERCOMPL register field. */
82580 #define ALT_USB_DEV_DIEPINT14_XFERCOMPL_WIDTH 1
82581 /* The mask used to set the ALT_USB_DEV_DIEPINT14_XFERCOMPL register field value. */
82582 #define ALT_USB_DEV_DIEPINT14_XFERCOMPL_SET_MSK 0x00000001
82583 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_XFERCOMPL register field value. */
82584 #define ALT_USB_DEV_DIEPINT14_XFERCOMPL_CLR_MSK 0xfffffffe
82585 /* The reset value of the ALT_USB_DEV_DIEPINT14_XFERCOMPL register field. */
82586 #define ALT_USB_DEV_DIEPINT14_XFERCOMPL_RESET 0x0
82587 /* Extracts the ALT_USB_DEV_DIEPINT14_XFERCOMPL field value from a register. */
82588 #define ALT_USB_DEV_DIEPINT14_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
82589 /* Produces a ALT_USB_DEV_DIEPINT14_XFERCOMPL register field value suitable for setting the register. */
82590 #define ALT_USB_DEV_DIEPINT14_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
82591 
82592 /*
82593  * Field : Endpoint Disabled Interrupt - epdisbld
82594  *
82595  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
82596  * disabled per the application's request.
82597  *
82598  * Field Enumeration Values:
82599  *
82600  * Enum | Value | Description
82601  * :---------------------------------------|:------|:----------------------------
82602  * ALT_USB_DEV_DIEPINT14_EPDISBLD_E_INACT | 0x0 | No Interrupt
82603  * ALT_USB_DEV_DIEPINT14_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
82604  *
82605  * Field Access Macros:
82606  *
82607  */
82608 /*
82609  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_EPDISBLD
82610  *
82611  * No Interrupt
82612  */
82613 #define ALT_USB_DEV_DIEPINT14_EPDISBLD_E_INACT 0x0
82614 /*
82615  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_EPDISBLD
82616  *
82617  * Endpoint Disabled Interrupt
82618  */
82619 #define ALT_USB_DEV_DIEPINT14_EPDISBLD_E_ACT 0x1
82620 
82621 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_EPDISBLD register field. */
82622 #define ALT_USB_DEV_DIEPINT14_EPDISBLD_LSB 1
82623 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_EPDISBLD register field. */
82624 #define ALT_USB_DEV_DIEPINT14_EPDISBLD_MSB 1
82625 /* The width in bits of the ALT_USB_DEV_DIEPINT14_EPDISBLD register field. */
82626 #define ALT_USB_DEV_DIEPINT14_EPDISBLD_WIDTH 1
82627 /* The mask used to set the ALT_USB_DEV_DIEPINT14_EPDISBLD register field value. */
82628 #define ALT_USB_DEV_DIEPINT14_EPDISBLD_SET_MSK 0x00000002
82629 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_EPDISBLD register field value. */
82630 #define ALT_USB_DEV_DIEPINT14_EPDISBLD_CLR_MSK 0xfffffffd
82631 /* The reset value of the ALT_USB_DEV_DIEPINT14_EPDISBLD register field. */
82632 #define ALT_USB_DEV_DIEPINT14_EPDISBLD_RESET 0x0
82633 /* Extracts the ALT_USB_DEV_DIEPINT14_EPDISBLD field value from a register. */
82634 #define ALT_USB_DEV_DIEPINT14_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
82635 /* Produces a ALT_USB_DEV_DIEPINT14_EPDISBLD register field value suitable for setting the register. */
82636 #define ALT_USB_DEV_DIEPINT14_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
82637 
82638 /*
82639  * Field : AHB Error - ahberr
82640  *
82641  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
82642  * there is an AHB error during an AHB read/write. The application can read the
82643  * corresponding endpoint DMA address register to get the error address.
82644  *
82645  * Field Enumeration Values:
82646  *
82647  * Enum | Value | Description
82648  * :-------------------------------------|:------|:--------------------
82649  * ALT_USB_DEV_DIEPINT14_AHBERR_E_INACT | 0x0 | No Interrupt
82650  * ALT_USB_DEV_DIEPINT14_AHBERR_E_ACT | 0x1 | AHB Error interrupt
82651  *
82652  * Field Access Macros:
82653  *
82654  */
82655 /*
82656  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_AHBERR
82657  *
82658  * No Interrupt
82659  */
82660 #define ALT_USB_DEV_DIEPINT14_AHBERR_E_INACT 0x0
82661 /*
82662  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_AHBERR
82663  *
82664  * AHB Error interrupt
82665  */
82666 #define ALT_USB_DEV_DIEPINT14_AHBERR_E_ACT 0x1
82667 
82668 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_AHBERR register field. */
82669 #define ALT_USB_DEV_DIEPINT14_AHBERR_LSB 2
82670 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_AHBERR register field. */
82671 #define ALT_USB_DEV_DIEPINT14_AHBERR_MSB 2
82672 /* The width in bits of the ALT_USB_DEV_DIEPINT14_AHBERR register field. */
82673 #define ALT_USB_DEV_DIEPINT14_AHBERR_WIDTH 1
82674 /* The mask used to set the ALT_USB_DEV_DIEPINT14_AHBERR register field value. */
82675 #define ALT_USB_DEV_DIEPINT14_AHBERR_SET_MSK 0x00000004
82676 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_AHBERR register field value. */
82677 #define ALT_USB_DEV_DIEPINT14_AHBERR_CLR_MSK 0xfffffffb
82678 /* The reset value of the ALT_USB_DEV_DIEPINT14_AHBERR register field. */
82679 #define ALT_USB_DEV_DIEPINT14_AHBERR_RESET 0x0
82680 /* Extracts the ALT_USB_DEV_DIEPINT14_AHBERR field value from a register. */
82681 #define ALT_USB_DEV_DIEPINT14_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
82682 /* Produces a ALT_USB_DEV_DIEPINT14_AHBERR register field value suitable for setting the register. */
82683 #define ALT_USB_DEV_DIEPINT14_AHBERR_SET(value) (((value) << 2) & 0x00000004)
82684 
82685 /*
82686  * Field : Timeout Condition - timeout
82687  *
82688  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
82689  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
82690  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
82691  * detected a timeout condition on the USB for the last IN token on this endpoint.
82692  *
82693  * Field Enumeration Values:
82694  *
82695  * Enum | Value | Description
82696  * :----------------------------------|:------|:------------------
82697  * ALT_USB_DEV_DIEPINT14_TMO_E_INACT | 0x0 | No interrupt
82698  * ALT_USB_DEV_DIEPINT14_TMO_E_ACT | 0x1 | Timeout interrupy
82699  *
82700  * Field Access Macros:
82701  *
82702  */
82703 /*
82704  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_TMO
82705  *
82706  * No interrupt
82707  */
82708 #define ALT_USB_DEV_DIEPINT14_TMO_E_INACT 0x0
82709 /*
82710  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_TMO
82711  *
82712  * Timeout interrupy
82713  */
82714 #define ALT_USB_DEV_DIEPINT14_TMO_E_ACT 0x1
82715 
82716 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_TMO register field. */
82717 #define ALT_USB_DEV_DIEPINT14_TMO_LSB 3
82718 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_TMO register field. */
82719 #define ALT_USB_DEV_DIEPINT14_TMO_MSB 3
82720 /* The width in bits of the ALT_USB_DEV_DIEPINT14_TMO register field. */
82721 #define ALT_USB_DEV_DIEPINT14_TMO_WIDTH 1
82722 /* The mask used to set the ALT_USB_DEV_DIEPINT14_TMO register field value. */
82723 #define ALT_USB_DEV_DIEPINT14_TMO_SET_MSK 0x00000008
82724 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_TMO register field value. */
82725 #define ALT_USB_DEV_DIEPINT14_TMO_CLR_MSK 0xfffffff7
82726 /* The reset value of the ALT_USB_DEV_DIEPINT14_TMO register field. */
82727 #define ALT_USB_DEV_DIEPINT14_TMO_RESET 0x0
82728 /* Extracts the ALT_USB_DEV_DIEPINT14_TMO field value from a register. */
82729 #define ALT_USB_DEV_DIEPINT14_TMO_GET(value) (((value) & 0x00000008) >> 3)
82730 /* Produces a ALT_USB_DEV_DIEPINT14_TMO register field value suitable for setting the register. */
82731 #define ALT_USB_DEV_DIEPINT14_TMO_SET(value) (((value) << 3) & 0x00000008)
82732 
82733 /*
82734  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
82735  *
82736  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
82737  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
82738  * interrupt is asserted on the endpoint for which the IN token was received.
82739  *
82740  * Field Enumeration Values:
82741  *
82742  * Enum | Value | Description
82743  * :------------------------------------------|:------|:----------------------------
82744  * ALT_USB_DEV_DIEPINT14_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
82745  * ALT_USB_DEV_DIEPINT14_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
82746  *
82747  * Field Access Macros:
82748  *
82749  */
82750 /*
82751  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_INTKNTXFEMP
82752  *
82753  * No interrupt
82754  */
82755 #define ALT_USB_DEV_DIEPINT14_INTKNTXFEMP_E_INACT 0x0
82756 /*
82757  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_INTKNTXFEMP
82758  *
82759  * IN Token Received Interrupt
82760  */
82761 #define ALT_USB_DEV_DIEPINT14_INTKNTXFEMP_E_ACT 0x1
82762 
82763 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_INTKNTXFEMP register field. */
82764 #define ALT_USB_DEV_DIEPINT14_INTKNTXFEMP_LSB 4
82765 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_INTKNTXFEMP register field. */
82766 #define ALT_USB_DEV_DIEPINT14_INTKNTXFEMP_MSB 4
82767 /* The width in bits of the ALT_USB_DEV_DIEPINT14_INTKNTXFEMP register field. */
82768 #define ALT_USB_DEV_DIEPINT14_INTKNTXFEMP_WIDTH 1
82769 /* The mask used to set the ALT_USB_DEV_DIEPINT14_INTKNTXFEMP register field value. */
82770 #define ALT_USB_DEV_DIEPINT14_INTKNTXFEMP_SET_MSK 0x00000010
82771 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_INTKNTXFEMP register field value. */
82772 #define ALT_USB_DEV_DIEPINT14_INTKNTXFEMP_CLR_MSK 0xffffffef
82773 /* The reset value of the ALT_USB_DEV_DIEPINT14_INTKNTXFEMP register field. */
82774 #define ALT_USB_DEV_DIEPINT14_INTKNTXFEMP_RESET 0x0
82775 /* Extracts the ALT_USB_DEV_DIEPINT14_INTKNTXFEMP field value from a register. */
82776 #define ALT_USB_DEV_DIEPINT14_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
82777 /* Produces a ALT_USB_DEV_DIEPINT14_INTKNTXFEMP register field value suitable for setting the register. */
82778 #define ALT_USB_DEV_DIEPINT14_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
82779 
82780 /*
82781  * Field : IN Token Received with EP Mismatch - intknepmis
82782  *
82783  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
82784  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
82785  * IN token was received. This interrupt is asserted on the endpoint for which the
82786  * IN token was received.
82787  *
82788  * Field Enumeration Values:
82789  *
82790  * Enum | Value | Description
82791  * :-----------------------------------------|:------|:---------------------------------------------
82792  * ALT_USB_DEV_DIEPINT14_INTKNEPMIS_E_INACT | 0x0 | No interrupt
82793  * ALT_USB_DEV_DIEPINT14_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
82794  *
82795  * Field Access Macros:
82796  *
82797  */
82798 /*
82799  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_INTKNEPMIS
82800  *
82801  * No interrupt
82802  */
82803 #define ALT_USB_DEV_DIEPINT14_INTKNEPMIS_E_INACT 0x0
82804 /*
82805  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_INTKNEPMIS
82806  *
82807  * IN Token Received with EP Mismatch interrupt
82808  */
82809 #define ALT_USB_DEV_DIEPINT14_INTKNEPMIS_E_ACT 0x1
82810 
82811 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_INTKNEPMIS register field. */
82812 #define ALT_USB_DEV_DIEPINT14_INTKNEPMIS_LSB 5
82813 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_INTKNEPMIS register field. */
82814 #define ALT_USB_DEV_DIEPINT14_INTKNEPMIS_MSB 5
82815 /* The width in bits of the ALT_USB_DEV_DIEPINT14_INTKNEPMIS register field. */
82816 #define ALT_USB_DEV_DIEPINT14_INTKNEPMIS_WIDTH 1
82817 /* The mask used to set the ALT_USB_DEV_DIEPINT14_INTKNEPMIS register field value. */
82818 #define ALT_USB_DEV_DIEPINT14_INTKNEPMIS_SET_MSK 0x00000020
82819 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_INTKNEPMIS register field value. */
82820 #define ALT_USB_DEV_DIEPINT14_INTKNEPMIS_CLR_MSK 0xffffffdf
82821 /* The reset value of the ALT_USB_DEV_DIEPINT14_INTKNEPMIS register field. */
82822 #define ALT_USB_DEV_DIEPINT14_INTKNEPMIS_RESET 0x0
82823 /* Extracts the ALT_USB_DEV_DIEPINT14_INTKNEPMIS field value from a register. */
82824 #define ALT_USB_DEV_DIEPINT14_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
82825 /* Produces a ALT_USB_DEV_DIEPINT14_INTKNEPMIS register field value suitable for setting the register. */
82826 #define ALT_USB_DEV_DIEPINT14_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
82827 
82828 /*
82829  * Field : IN Endpoint NAK Effective - inepnakeff
82830  *
82831  * Applies to periodic IN endpoints only. This bit can be cleared when the
82832  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
82833  * interrupt indicates that the core has sampled the NAK bit Set (either by the
82834  * application or by the core). The interrupt indicates that the IN endpoint NAK
82835  * bit Set by the application has taken effect in the core.This interrupt does not
82836  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
82837  * over a NAK bit.
82838  *
82839  * Field Enumeration Values:
82840  *
82841  * Enum | Value | Description
82842  * :-----------------------------------------|:------|:------------------------------------
82843  * ALT_USB_DEV_DIEPINT14_INEPNAKEFF_E_INACT | 0x0 | No interrupt
82844  * ALT_USB_DEV_DIEPINT14_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
82845  *
82846  * Field Access Macros:
82847  *
82848  */
82849 /*
82850  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_INEPNAKEFF
82851  *
82852  * No interrupt
82853  */
82854 #define ALT_USB_DEV_DIEPINT14_INEPNAKEFF_E_INACT 0x0
82855 /*
82856  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_INEPNAKEFF
82857  *
82858  * IN Endpoint NAK Effective interrupt
82859  */
82860 #define ALT_USB_DEV_DIEPINT14_INEPNAKEFF_E_ACT 0x1
82861 
82862 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_INEPNAKEFF register field. */
82863 #define ALT_USB_DEV_DIEPINT14_INEPNAKEFF_LSB 6
82864 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_INEPNAKEFF register field. */
82865 #define ALT_USB_DEV_DIEPINT14_INEPNAKEFF_MSB 6
82866 /* The width in bits of the ALT_USB_DEV_DIEPINT14_INEPNAKEFF register field. */
82867 #define ALT_USB_DEV_DIEPINT14_INEPNAKEFF_WIDTH 1
82868 /* The mask used to set the ALT_USB_DEV_DIEPINT14_INEPNAKEFF register field value. */
82869 #define ALT_USB_DEV_DIEPINT14_INEPNAKEFF_SET_MSK 0x00000040
82870 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_INEPNAKEFF register field value. */
82871 #define ALT_USB_DEV_DIEPINT14_INEPNAKEFF_CLR_MSK 0xffffffbf
82872 /* The reset value of the ALT_USB_DEV_DIEPINT14_INEPNAKEFF register field. */
82873 #define ALT_USB_DEV_DIEPINT14_INEPNAKEFF_RESET 0x0
82874 /* Extracts the ALT_USB_DEV_DIEPINT14_INEPNAKEFF field value from a register. */
82875 #define ALT_USB_DEV_DIEPINT14_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
82876 /* Produces a ALT_USB_DEV_DIEPINT14_INEPNAKEFF register field value suitable for setting the register. */
82877 #define ALT_USB_DEV_DIEPINT14_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
82878 
82879 /*
82880  * Field : Transmit FIFO Empty - txfemp
82881  *
82882  * This bit is valid only for IN Endpoints This interrupt is asserted when the
82883  * TxFIFO for this endpoint is either half or completely empty. The half or
82884  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
82885  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
82886  *
82887  * Field Enumeration Values:
82888  *
82889  * Enum | Value | Description
82890  * :-------------------------------------|:------|:------------------------------
82891  * ALT_USB_DEV_DIEPINT14_TXFEMP_E_INACT | 0x0 | No interrupt
82892  * ALT_USB_DEV_DIEPINT14_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
82893  *
82894  * Field Access Macros:
82895  *
82896  */
82897 /*
82898  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_TXFEMP
82899  *
82900  * No interrupt
82901  */
82902 #define ALT_USB_DEV_DIEPINT14_TXFEMP_E_INACT 0x0
82903 /*
82904  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_TXFEMP
82905  *
82906  * Transmit FIFO Empty interrupt
82907  */
82908 #define ALT_USB_DEV_DIEPINT14_TXFEMP_E_ACT 0x1
82909 
82910 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_TXFEMP register field. */
82911 #define ALT_USB_DEV_DIEPINT14_TXFEMP_LSB 7
82912 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_TXFEMP register field. */
82913 #define ALT_USB_DEV_DIEPINT14_TXFEMP_MSB 7
82914 /* The width in bits of the ALT_USB_DEV_DIEPINT14_TXFEMP register field. */
82915 #define ALT_USB_DEV_DIEPINT14_TXFEMP_WIDTH 1
82916 /* The mask used to set the ALT_USB_DEV_DIEPINT14_TXFEMP register field value. */
82917 #define ALT_USB_DEV_DIEPINT14_TXFEMP_SET_MSK 0x00000080
82918 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_TXFEMP register field value. */
82919 #define ALT_USB_DEV_DIEPINT14_TXFEMP_CLR_MSK 0xffffff7f
82920 /* The reset value of the ALT_USB_DEV_DIEPINT14_TXFEMP register field. */
82921 #define ALT_USB_DEV_DIEPINT14_TXFEMP_RESET 0x1
82922 /* Extracts the ALT_USB_DEV_DIEPINT14_TXFEMP field value from a register. */
82923 #define ALT_USB_DEV_DIEPINT14_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
82924 /* Produces a ALT_USB_DEV_DIEPINT14_TXFEMP register field value suitable for setting the register. */
82925 #define ALT_USB_DEV_DIEPINT14_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
82926 
82927 /*
82928  * Field : Fifo Underrun - txfifoundrn
82929  *
82930  * Applies to IN endpoints Only. The core generates this interrupt when it detects
82931  * a transmit FIFO underrun condition for this endpoint.
82932  *
82933  * Field Enumeration Values:
82934  *
82935  * Enum | Value | Description
82936  * :------------------------------------------|:------|:------------------------
82937  * ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
82938  * ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
82939  *
82940  * Field Access Macros:
82941  *
82942  */
82943 /*
82944  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN
82945  *
82946  * No interrupt
82947  */
82948 #define ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN_E_INACT 0x0
82949 /*
82950  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN
82951  *
82952  * Fifo Underrun interrupt
82953  */
82954 #define ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN_E_ACT 0x1
82955 
82956 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN register field. */
82957 #define ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN_LSB 8
82958 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN register field. */
82959 #define ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN_MSB 8
82960 /* The width in bits of the ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN register field. */
82961 #define ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN_WIDTH 1
82962 /* The mask used to set the ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN register field value. */
82963 #define ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN_SET_MSK 0x00000100
82964 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN register field value. */
82965 #define ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN_CLR_MSK 0xfffffeff
82966 /* The reset value of the ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN register field. */
82967 #define ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN_RESET 0x0
82968 /* Extracts the ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN field value from a register. */
82969 #define ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
82970 /* Produces a ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN register field value suitable for setting the register. */
82971 #define ALT_USB_DEV_DIEPINT14_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
82972 
82973 /*
82974  * Field : BNA Interrupt - bnaintr
82975  *
82976  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
82977  * generates this interrupt when the descriptor accessed is not ready for the Core
82978  * to process, such as Host busy or DMA done
82979  *
82980  * Field Enumeration Values:
82981  *
82982  * Enum | Value | Description
82983  * :--------------------------------------|:------|:--------------
82984  * ALT_USB_DEV_DIEPINT14_BNAINTR_E_INACT | 0x0 | No interrupt
82985  * ALT_USB_DEV_DIEPINT14_BNAINTR_E_ACT | 0x1 | BNA interrupt
82986  *
82987  * Field Access Macros:
82988  *
82989  */
82990 /*
82991  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_BNAINTR
82992  *
82993  * No interrupt
82994  */
82995 #define ALT_USB_DEV_DIEPINT14_BNAINTR_E_INACT 0x0
82996 /*
82997  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_BNAINTR
82998  *
82999  * BNA interrupt
83000  */
83001 #define ALT_USB_DEV_DIEPINT14_BNAINTR_E_ACT 0x1
83002 
83003 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_BNAINTR register field. */
83004 #define ALT_USB_DEV_DIEPINT14_BNAINTR_LSB 9
83005 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_BNAINTR register field. */
83006 #define ALT_USB_DEV_DIEPINT14_BNAINTR_MSB 9
83007 /* The width in bits of the ALT_USB_DEV_DIEPINT14_BNAINTR register field. */
83008 #define ALT_USB_DEV_DIEPINT14_BNAINTR_WIDTH 1
83009 /* The mask used to set the ALT_USB_DEV_DIEPINT14_BNAINTR register field value. */
83010 #define ALT_USB_DEV_DIEPINT14_BNAINTR_SET_MSK 0x00000200
83011 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_BNAINTR register field value. */
83012 #define ALT_USB_DEV_DIEPINT14_BNAINTR_CLR_MSK 0xfffffdff
83013 /* The reset value of the ALT_USB_DEV_DIEPINT14_BNAINTR register field. */
83014 #define ALT_USB_DEV_DIEPINT14_BNAINTR_RESET 0x0
83015 /* Extracts the ALT_USB_DEV_DIEPINT14_BNAINTR field value from a register. */
83016 #define ALT_USB_DEV_DIEPINT14_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
83017 /* Produces a ALT_USB_DEV_DIEPINT14_BNAINTR register field value suitable for setting the register. */
83018 #define ALT_USB_DEV_DIEPINT14_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
83019 
83020 /*
83021  * Field : Packet Drop Status - pktdrpsts
83022  *
83023  * This bit indicates to the application that an ISOC OUT packet has been dropped.
83024  * This bit does not have an associated mask bit and does not generate an
83025  * interrupt.
83026  *
83027  * Field Enumeration Values:
83028  *
83029  * Enum | Value | Description
83030  * :----------------------------------------|:------|:-----------------------------
83031  * ALT_USB_DEV_DIEPINT14_PKTDRPSTS_E_INACT | 0x0 | No interrupt
83032  * ALT_USB_DEV_DIEPINT14_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
83033  *
83034  * Field Access Macros:
83035  *
83036  */
83037 /*
83038  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_PKTDRPSTS
83039  *
83040  * No interrupt
83041  */
83042 #define ALT_USB_DEV_DIEPINT14_PKTDRPSTS_E_INACT 0x0
83043 /*
83044  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_PKTDRPSTS
83045  *
83046  * Packet Drop Status interrupt
83047  */
83048 #define ALT_USB_DEV_DIEPINT14_PKTDRPSTS_E_ACT 0x1
83049 
83050 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_PKTDRPSTS register field. */
83051 #define ALT_USB_DEV_DIEPINT14_PKTDRPSTS_LSB 11
83052 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_PKTDRPSTS register field. */
83053 #define ALT_USB_DEV_DIEPINT14_PKTDRPSTS_MSB 11
83054 /* The width in bits of the ALT_USB_DEV_DIEPINT14_PKTDRPSTS register field. */
83055 #define ALT_USB_DEV_DIEPINT14_PKTDRPSTS_WIDTH 1
83056 /* The mask used to set the ALT_USB_DEV_DIEPINT14_PKTDRPSTS register field value. */
83057 #define ALT_USB_DEV_DIEPINT14_PKTDRPSTS_SET_MSK 0x00000800
83058 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_PKTDRPSTS register field value. */
83059 #define ALT_USB_DEV_DIEPINT14_PKTDRPSTS_CLR_MSK 0xfffff7ff
83060 /* The reset value of the ALT_USB_DEV_DIEPINT14_PKTDRPSTS register field. */
83061 #define ALT_USB_DEV_DIEPINT14_PKTDRPSTS_RESET 0x0
83062 /* Extracts the ALT_USB_DEV_DIEPINT14_PKTDRPSTS field value from a register. */
83063 #define ALT_USB_DEV_DIEPINT14_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
83064 /* Produces a ALT_USB_DEV_DIEPINT14_PKTDRPSTS register field value suitable for setting the register. */
83065 #define ALT_USB_DEV_DIEPINT14_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
83066 
83067 /*
83068  * Field : BbleErr Interrupt ( - bbleerr
83069  *
83070  * The core generates this interrupt when babble is received for the endpoint.
83071  *
83072  * Field Enumeration Values:
83073  *
83074  * Enum | Value | Description
83075  * :--------------------------------------|:------|:------------------
83076  * ALT_USB_DEV_DIEPINT14_BBLEERR_E_INACT | 0x0 | No interrupt
83077  * ALT_USB_DEV_DIEPINT14_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
83078  *
83079  * Field Access Macros:
83080  *
83081  */
83082 /*
83083  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_BBLEERR
83084  *
83085  * No interrupt
83086  */
83087 #define ALT_USB_DEV_DIEPINT14_BBLEERR_E_INACT 0x0
83088 /*
83089  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_BBLEERR
83090  *
83091  * BbleErr interrupt
83092  */
83093 #define ALT_USB_DEV_DIEPINT14_BBLEERR_E_ACT 0x1
83094 
83095 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_BBLEERR register field. */
83096 #define ALT_USB_DEV_DIEPINT14_BBLEERR_LSB 12
83097 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_BBLEERR register field. */
83098 #define ALT_USB_DEV_DIEPINT14_BBLEERR_MSB 12
83099 /* The width in bits of the ALT_USB_DEV_DIEPINT14_BBLEERR register field. */
83100 #define ALT_USB_DEV_DIEPINT14_BBLEERR_WIDTH 1
83101 /* The mask used to set the ALT_USB_DEV_DIEPINT14_BBLEERR register field value. */
83102 #define ALT_USB_DEV_DIEPINT14_BBLEERR_SET_MSK 0x00001000
83103 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_BBLEERR register field value. */
83104 #define ALT_USB_DEV_DIEPINT14_BBLEERR_CLR_MSK 0xffffefff
83105 /* The reset value of the ALT_USB_DEV_DIEPINT14_BBLEERR register field. */
83106 #define ALT_USB_DEV_DIEPINT14_BBLEERR_RESET 0x0
83107 /* Extracts the ALT_USB_DEV_DIEPINT14_BBLEERR field value from a register. */
83108 #define ALT_USB_DEV_DIEPINT14_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
83109 /* Produces a ALT_USB_DEV_DIEPINT14_BBLEERR register field value suitable for setting the register. */
83110 #define ALT_USB_DEV_DIEPINT14_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
83111 
83112 /*
83113  * Field : NAK Interrupt - nakintrpt
83114  *
83115  * The core generates this interrupt when a NAK is transmitted or received by the
83116  * device. In case of isochronous IN endpoints the interrupt gets generated when a
83117  * zero length packet is transmitted due to un-availability of data in the TXFifo.
83118  *
83119  * Field Enumeration Values:
83120  *
83121  * Enum | Value | Description
83122  * :----------------------------------------|:------|:--------------
83123  * ALT_USB_DEV_DIEPINT14_NAKINTRPT_E_INACT | 0x0 | No interrupt
83124  * ALT_USB_DEV_DIEPINT14_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
83125  *
83126  * Field Access Macros:
83127  *
83128  */
83129 /*
83130  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_NAKINTRPT
83131  *
83132  * No interrupt
83133  */
83134 #define ALT_USB_DEV_DIEPINT14_NAKINTRPT_E_INACT 0x0
83135 /*
83136  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_NAKINTRPT
83137  *
83138  * NAK Interrupt
83139  */
83140 #define ALT_USB_DEV_DIEPINT14_NAKINTRPT_E_ACT 0x1
83141 
83142 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_NAKINTRPT register field. */
83143 #define ALT_USB_DEV_DIEPINT14_NAKINTRPT_LSB 13
83144 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_NAKINTRPT register field. */
83145 #define ALT_USB_DEV_DIEPINT14_NAKINTRPT_MSB 13
83146 /* The width in bits of the ALT_USB_DEV_DIEPINT14_NAKINTRPT register field. */
83147 #define ALT_USB_DEV_DIEPINT14_NAKINTRPT_WIDTH 1
83148 /* The mask used to set the ALT_USB_DEV_DIEPINT14_NAKINTRPT register field value. */
83149 #define ALT_USB_DEV_DIEPINT14_NAKINTRPT_SET_MSK 0x00002000
83150 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_NAKINTRPT register field value. */
83151 #define ALT_USB_DEV_DIEPINT14_NAKINTRPT_CLR_MSK 0xffffdfff
83152 /* The reset value of the ALT_USB_DEV_DIEPINT14_NAKINTRPT register field. */
83153 #define ALT_USB_DEV_DIEPINT14_NAKINTRPT_RESET 0x0
83154 /* Extracts the ALT_USB_DEV_DIEPINT14_NAKINTRPT field value from a register. */
83155 #define ALT_USB_DEV_DIEPINT14_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
83156 /* Produces a ALT_USB_DEV_DIEPINT14_NAKINTRPT register field value suitable for setting the register. */
83157 #define ALT_USB_DEV_DIEPINT14_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
83158 
83159 /*
83160  * Field : NYET Interrupt - nyetintrpt
83161  *
83162  * The core generates this interrupt when a NYET response is transmitted for a non
83163  * isochronous OUT endpoint.
83164  *
83165  * Field Enumeration Values:
83166  *
83167  * Enum | Value | Description
83168  * :-----------------------------------------|:------|:---------------
83169  * ALT_USB_DEV_DIEPINT14_NYETINTRPT_E_INACT | 0x0 | No interrupt
83170  * ALT_USB_DEV_DIEPINT14_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
83171  *
83172  * Field Access Macros:
83173  *
83174  */
83175 /*
83176  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_NYETINTRPT
83177  *
83178  * No interrupt
83179  */
83180 #define ALT_USB_DEV_DIEPINT14_NYETINTRPT_E_INACT 0x0
83181 /*
83182  * Enumerated value for register field ALT_USB_DEV_DIEPINT14_NYETINTRPT
83183  *
83184  * NYET Interrupt
83185  */
83186 #define ALT_USB_DEV_DIEPINT14_NYETINTRPT_E_ACT 0x1
83187 
83188 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT14_NYETINTRPT register field. */
83189 #define ALT_USB_DEV_DIEPINT14_NYETINTRPT_LSB 14
83190 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT14_NYETINTRPT register field. */
83191 #define ALT_USB_DEV_DIEPINT14_NYETINTRPT_MSB 14
83192 /* The width in bits of the ALT_USB_DEV_DIEPINT14_NYETINTRPT register field. */
83193 #define ALT_USB_DEV_DIEPINT14_NYETINTRPT_WIDTH 1
83194 /* The mask used to set the ALT_USB_DEV_DIEPINT14_NYETINTRPT register field value. */
83195 #define ALT_USB_DEV_DIEPINT14_NYETINTRPT_SET_MSK 0x00004000
83196 /* The mask used to clear the ALT_USB_DEV_DIEPINT14_NYETINTRPT register field value. */
83197 #define ALT_USB_DEV_DIEPINT14_NYETINTRPT_CLR_MSK 0xffffbfff
83198 /* The reset value of the ALT_USB_DEV_DIEPINT14_NYETINTRPT register field. */
83199 #define ALT_USB_DEV_DIEPINT14_NYETINTRPT_RESET 0x0
83200 /* Extracts the ALT_USB_DEV_DIEPINT14_NYETINTRPT field value from a register. */
83201 #define ALT_USB_DEV_DIEPINT14_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
83202 /* Produces a ALT_USB_DEV_DIEPINT14_NYETINTRPT register field value suitable for setting the register. */
83203 #define ALT_USB_DEV_DIEPINT14_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
83204 
83205 #ifndef __ASSEMBLY__
83206 /*
83207  * WARNING: The C register and register group struct declarations are provided for
83208  * convenience and illustrative purposes. They should, however, be used with
83209  * caution as the C language standard provides no guarantees about the alignment or
83210  * atomicity of device memory accesses. The recommended practice for writing
83211  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
83212  * alt_write_word() functions.
83213  *
83214  * The struct declaration for register ALT_USB_DEV_DIEPINT14.
83215  */
83216 struct ALT_USB_DEV_DIEPINT14_s
83217 {
83218  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
83219  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
83220  const uint32_t ahberr : 1; /* AHB Error */
83221  const uint32_t timeout : 1; /* Timeout Condition */
83222  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
83223  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
83224  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
83225  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
83226  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
83227  const uint32_t bnaintr : 1; /* BNA Interrupt */
83228  uint32_t : 1; /* *UNDEFINED* */
83229  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
83230  const uint32_t bbleerr : 1; /* BbleErr Interrupt ( */
83231  const uint32_t nakintrpt : 1; /* NAK Interrupt */
83232  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
83233  uint32_t : 17; /* *UNDEFINED* */
83234 };
83235 
83236 /* The typedef declaration for register ALT_USB_DEV_DIEPINT14. */
83237 typedef volatile struct ALT_USB_DEV_DIEPINT14_s ALT_USB_DEV_DIEPINT14_t;
83238 #endif /* __ASSEMBLY__ */
83239 
83240 /* The byte offset of the ALT_USB_DEV_DIEPINT14 register from the beginning of the component. */
83241 #define ALT_USB_DEV_DIEPINT14_OFST 0x2c8
83242 /* The address of the ALT_USB_DEV_DIEPINT14 register. */
83243 #define ALT_USB_DEV_DIEPINT14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT14_OFST))
83244 
83245 /*
83246  * Register : Device IN Endpoint 14 Transfer Size Register - dieptsiz14
83247  *
83248  * The application must modify this register before enabling the endpoint. Once the
83249  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
83250  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
83251  * application can only read this register once the core has cleared the Endpoint
83252  * Enable bit.
83253  *
83254  * Register Layout
83255  *
83256  * Bits | Access | Reset | Description
83257  * :--------|:-------|:------|:-----------------------------
83258  * [18:0] | RW | 0x0 | Transfer Size
83259  * [28:19] | RW | 0x0 | Packet Count
83260  * [30:29] | RW | 0x0 | Applies to IN endpoints only
83261  * [31] | ??? | 0x0 | *UNDEFINED*
83262  *
83263  */
83264 /*
83265  * Field : Transfer Size - xfersize
83266  *
83267  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
83268  * application only after it has exhausted the transfer size amount of data. The
83269  * transfer size can be Set to the maximum packet size of the endpoint, to be
83270  * interrupted at the end of each packet. The core decrements this field every time
83271  * a packet from the external memory is written to the TxFIFO.
83272  *
83273  * Field Access Macros:
83274  *
83275  */
83276 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ14_XFERSIZE register field. */
83277 #define ALT_USB_DEV_DIEPTSIZ14_XFERSIZE_LSB 0
83278 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ14_XFERSIZE register field. */
83279 #define ALT_USB_DEV_DIEPTSIZ14_XFERSIZE_MSB 18
83280 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ14_XFERSIZE register field. */
83281 #define ALT_USB_DEV_DIEPTSIZ14_XFERSIZE_WIDTH 19
83282 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ14_XFERSIZE register field value. */
83283 #define ALT_USB_DEV_DIEPTSIZ14_XFERSIZE_SET_MSK 0x0007ffff
83284 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ14_XFERSIZE register field value. */
83285 #define ALT_USB_DEV_DIEPTSIZ14_XFERSIZE_CLR_MSK 0xfff80000
83286 /* The reset value of the ALT_USB_DEV_DIEPTSIZ14_XFERSIZE register field. */
83287 #define ALT_USB_DEV_DIEPTSIZ14_XFERSIZE_RESET 0x0
83288 /* Extracts the ALT_USB_DEV_DIEPTSIZ14_XFERSIZE field value from a register. */
83289 #define ALT_USB_DEV_DIEPTSIZ14_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
83290 /* Produces a ALT_USB_DEV_DIEPTSIZ14_XFERSIZE register field value suitable for setting the register. */
83291 #define ALT_USB_DEV_DIEPTSIZ14_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
83292 
83293 /*
83294  * Field : Packet Count - PktCnt
83295  *
83296  * Indicates the total number of USB packets that constitute the Transfer Size
83297  * amount of data for endpoint 0.This field is decremented every time a packet
83298  * (maximum size or short packet) is read from the TxFIFO.
83299  *
83300  * Field Access Macros:
83301  *
83302  */
83303 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ14_PKTCNT register field. */
83304 #define ALT_USB_DEV_DIEPTSIZ14_PKTCNT_LSB 19
83305 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ14_PKTCNT register field. */
83306 #define ALT_USB_DEV_DIEPTSIZ14_PKTCNT_MSB 28
83307 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ14_PKTCNT register field. */
83308 #define ALT_USB_DEV_DIEPTSIZ14_PKTCNT_WIDTH 10
83309 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ14_PKTCNT register field value. */
83310 #define ALT_USB_DEV_DIEPTSIZ14_PKTCNT_SET_MSK 0x1ff80000
83311 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ14_PKTCNT register field value. */
83312 #define ALT_USB_DEV_DIEPTSIZ14_PKTCNT_CLR_MSK 0xe007ffff
83313 /* The reset value of the ALT_USB_DEV_DIEPTSIZ14_PKTCNT register field. */
83314 #define ALT_USB_DEV_DIEPTSIZ14_PKTCNT_RESET 0x0
83315 /* Extracts the ALT_USB_DEV_DIEPTSIZ14_PKTCNT field value from a register. */
83316 #define ALT_USB_DEV_DIEPTSIZ14_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
83317 /* Produces a ALT_USB_DEV_DIEPTSIZ14_PKTCNT register field value suitable for setting the register. */
83318 #define ALT_USB_DEV_DIEPTSIZ14_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
83319 
83320 /*
83321  * Field : Applies to IN endpoints only - mc
83322  *
83323  * for periodic IN endpoints, this field indicates the number of packets that must
83324  * be transmitted per microframe on the USB. The core uses this field to calculate
83325  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
83326  * field is valid only in Internal DMA mode. It specifies the number of packets the
83327  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
83328  * by the Next Endpoint field of the Device Endpoint-n Control register
83329  * (DIEPCTLn.NextEp)
83330  *
83331  * Field Enumeration Values:
83332  *
83333  * Enum | Value | Description
83334  * :-------------------------------------|:------|:------------
83335  * ALT_USB_DEV_DIEPTSIZ14_MC_E_PKTONE | 0x1 | 1 packet
83336  * ALT_USB_DEV_DIEPTSIZ14_MC_E_PKTTWO | 0x2 | 2 packets
83337  * ALT_USB_DEV_DIEPTSIZ14_MC_E_PKTTHREE | 0x3 | 3 packets
83338  *
83339  * Field Access Macros:
83340  *
83341  */
83342 /*
83343  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ14_MC
83344  *
83345  * 1 packet
83346  */
83347 #define ALT_USB_DEV_DIEPTSIZ14_MC_E_PKTONE 0x1
83348 /*
83349  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ14_MC
83350  *
83351  * 2 packets
83352  */
83353 #define ALT_USB_DEV_DIEPTSIZ14_MC_E_PKTTWO 0x2
83354 /*
83355  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ14_MC
83356  *
83357  * 3 packets
83358  */
83359 #define ALT_USB_DEV_DIEPTSIZ14_MC_E_PKTTHREE 0x3
83360 
83361 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ14_MC register field. */
83362 #define ALT_USB_DEV_DIEPTSIZ14_MC_LSB 29
83363 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ14_MC register field. */
83364 #define ALT_USB_DEV_DIEPTSIZ14_MC_MSB 30
83365 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ14_MC register field. */
83366 #define ALT_USB_DEV_DIEPTSIZ14_MC_WIDTH 2
83367 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ14_MC register field value. */
83368 #define ALT_USB_DEV_DIEPTSIZ14_MC_SET_MSK 0x60000000
83369 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ14_MC register field value. */
83370 #define ALT_USB_DEV_DIEPTSIZ14_MC_CLR_MSK 0x9fffffff
83371 /* The reset value of the ALT_USB_DEV_DIEPTSIZ14_MC register field. */
83372 #define ALT_USB_DEV_DIEPTSIZ14_MC_RESET 0x0
83373 /* Extracts the ALT_USB_DEV_DIEPTSIZ14_MC field value from a register. */
83374 #define ALT_USB_DEV_DIEPTSIZ14_MC_GET(value) (((value) & 0x60000000) >> 29)
83375 /* Produces a ALT_USB_DEV_DIEPTSIZ14_MC register field value suitable for setting the register. */
83376 #define ALT_USB_DEV_DIEPTSIZ14_MC_SET(value) (((value) << 29) & 0x60000000)
83377 
83378 #ifndef __ASSEMBLY__
83379 /*
83380  * WARNING: The C register and register group struct declarations are provided for
83381  * convenience and illustrative purposes. They should, however, be used with
83382  * caution as the C language standard provides no guarantees about the alignment or
83383  * atomicity of device memory accesses. The recommended practice for writing
83384  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
83385  * alt_write_word() functions.
83386  *
83387  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ14.
83388  */
83389 struct ALT_USB_DEV_DIEPTSIZ14_s
83390 {
83391  uint32_t xfersize : 19; /* Transfer Size */
83392  uint32_t PktCnt : 10; /* Packet Count */
83393  uint32_t mc : 2; /* Applies to IN endpoints only */
83394  uint32_t : 1; /* *UNDEFINED* */
83395 };
83396 
83397 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ14. */
83398 typedef volatile struct ALT_USB_DEV_DIEPTSIZ14_s ALT_USB_DEV_DIEPTSIZ14_t;
83399 #endif /* __ASSEMBLY__ */
83400 
83401 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ14 register from the beginning of the component. */
83402 #define ALT_USB_DEV_DIEPTSIZ14_OFST 0x2d0
83403 /* The address of the ALT_USB_DEV_DIEPTSIZ14 register. */
83404 #define ALT_USB_DEV_DIEPTSIZ14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ14_OFST))
83405 
83406 /*
83407  * Register : Device IN Endpoint 14 DMA Address Register - diepdma14
83408  *
83409  * DMA Addressing.
83410  *
83411  * Register Layout
83412  *
83413  * Bits | Access | Reset | Description
83414  * :-------|:-------|:--------|:------------
83415  * [31:0] | RW | Unknown | DMA Address
83416  *
83417  */
83418 /*
83419  * Field : DMA Address - diepdma14
83420  *
83421  * Holds the start address of the external memory for storing or fetching endpoint
83422  * data. for control endpoints, this field stores control OUT data packets as well
83423  * as SETUP transaction data packets. When more than three SETUP packets are
83424  * received back-to-back, the SETUP data packet in the memory is overwritten. This
83425  * register is incremented on every AHB transaction. The application can give only
83426  * a DWORD-aligned address.
83427  *
83428  * When Scatter/Gather DMA mode is not enabled, the application programs the start
83429  * address value in this field.
83430  *
83431  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
83432  * for the descriptor list.
83433  *
83434  * Field Access Macros:
83435  *
83436  */
83437 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA14_DIEPDMA14 register field. */
83438 #define ALT_USB_DEV_DIEPDMA14_DIEPDMA14_LSB 0
83439 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA14_DIEPDMA14 register field. */
83440 #define ALT_USB_DEV_DIEPDMA14_DIEPDMA14_MSB 31
83441 /* The width in bits of the ALT_USB_DEV_DIEPDMA14_DIEPDMA14 register field. */
83442 #define ALT_USB_DEV_DIEPDMA14_DIEPDMA14_WIDTH 32
83443 /* The mask used to set the ALT_USB_DEV_DIEPDMA14_DIEPDMA14 register field value. */
83444 #define ALT_USB_DEV_DIEPDMA14_DIEPDMA14_SET_MSK 0xffffffff
83445 /* The mask used to clear the ALT_USB_DEV_DIEPDMA14_DIEPDMA14 register field value. */
83446 #define ALT_USB_DEV_DIEPDMA14_DIEPDMA14_CLR_MSK 0x00000000
83447 /* The reset value of the ALT_USB_DEV_DIEPDMA14_DIEPDMA14 register field is UNKNOWN. */
83448 #define ALT_USB_DEV_DIEPDMA14_DIEPDMA14_RESET 0x0
83449 /* Extracts the ALT_USB_DEV_DIEPDMA14_DIEPDMA14 field value from a register. */
83450 #define ALT_USB_DEV_DIEPDMA14_DIEPDMA14_GET(value) (((value) & 0xffffffff) >> 0)
83451 /* Produces a ALT_USB_DEV_DIEPDMA14_DIEPDMA14 register field value suitable for setting the register. */
83452 #define ALT_USB_DEV_DIEPDMA14_DIEPDMA14_SET(value) (((value) << 0) & 0xffffffff)
83453 
83454 #ifndef __ASSEMBLY__
83455 /*
83456  * WARNING: The C register and register group struct declarations are provided for
83457  * convenience and illustrative purposes. They should, however, be used with
83458  * caution as the C language standard provides no guarantees about the alignment or
83459  * atomicity of device memory accesses. The recommended practice for writing
83460  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
83461  * alt_write_word() functions.
83462  *
83463  * The struct declaration for register ALT_USB_DEV_DIEPDMA14.
83464  */
83465 struct ALT_USB_DEV_DIEPDMA14_s
83466 {
83467  uint32_t diepdma14 : 32; /* DMA Address */
83468 };
83469 
83470 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA14. */
83471 typedef volatile struct ALT_USB_DEV_DIEPDMA14_s ALT_USB_DEV_DIEPDMA14_t;
83472 #endif /* __ASSEMBLY__ */
83473 
83474 /* The byte offset of the ALT_USB_DEV_DIEPDMA14 register from the beginning of the component. */
83475 #define ALT_USB_DEV_DIEPDMA14_OFST 0x2d4
83476 /* The address of the ALT_USB_DEV_DIEPDMA14 register. */
83477 #define ALT_USB_DEV_DIEPDMA14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA14_OFST))
83478 
83479 /*
83480  * Register : Device IN Endpoint Transmit FIFO Status Register 14 - dtxfsts14
83481  *
83482  * This register contains the free space information for the Device IN endpoint
83483  * TxFIFO.
83484  *
83485  * Register Layout
83486  *
83487  * Bits | Access | Reset | Description
83488  * :--------|:-------|:-------|:-------------------------------
83489  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
83490  * [31:16] | ??? | 0x0 | *UNDEFINED*
83491  *
83492  */
83493 /*
83494  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
83495  *
83496  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
83497  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
83498  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
83499  * 32,768 words available Others: Reserved
83500  *
83501  * Field Access Macros:
83502  *
83503  */
83504 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL register field. */
83505 #define ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL_LSB 0
83506 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL register field. */
83507 #define ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL_MSB 15
83508 /* The width in bits of the ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL register field. */
83509 #define ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL_WIDTH 16
83510 /* The mask used to set the ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL register field value. */
83511 #define ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
83512 /* The mask used to clear the ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL register field value. */
83513 #define ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
83514 /* The reset value of the ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL register field. */
83515 #define ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL_RESET 0x2000
83516 /* Extracts the ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL field value from a register. */
83517 #define ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
83518 /* Produces a ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL register field value suitable for setting the register. */
83519 #define ALT_USB_DEV_DTXFSTS14_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
83520 
83521 #ifndef __ASSEMBLY__
83522 /*
83523  * WARNING: The C register and register group struct declarations are provided for
83524  * convenience and illustrative purposes. They should, however, be used with
83525  * caution as the C language standard provides no guarantees about the alignment or
83526  * atomicity of device memory accesses. The recommended practice for writing
83527  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
83528  * alt_write_word() functions.
83529  *
83530  * The struct declaration for register ALT_USB_DEV_DTXFSTS14.
83531  */
83532 struct ALT_USB_DEV_DTXFSTS14_s
83533 {
83534  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
83535  uint32_t : 16; /* *UNDEFINED* */
83536 };
83537 
83538 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS14. */
83539 typedef volatile struct ALT_USB_DEV_DTXFSTS14_s ALT_USB_DEV_DTXFSTS14_t;
83540 #endif /* __ASSEMBLY__ */
83541 
83542 /* The byte offset of the ALT_USB_DEV_DTXFSTS14 register from the beginning of the component. */
83543 #define ALT_USB_DEV_DTXFSTS14_OFST 0x2d8
83544 /* The address of the ALT_USB_DEV_DTXFSTS14 register. */
83545 #define ALT_USB_DEV_DTXFSTS14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS14_OFST))
83546 
83547 /*
83548  * Register : Device IN Endpoint 14 DMA Buffer Address Register - diepdmab14
83549  *
83550  * DMA Buffer Address.
83551  *
83552  * Register Layout
83553  *
83554  * Bits | Access | Reset | Description
83555  * :-------|:-------|:--------|:-------------------
83556  * [31:0] | R | Unknown | DMA Buffer Address
83557  *
83558  */
83559 /*
83560  * Field : DMA Buffer Address - diepdmab14
83561  *
83562  * Holds the current buffer address. This register is updated as and when the data
83563  * transfer for the corresponding end point is in progress. This register is
83564  * present only in Scatter/Gather DMA mode.
83565  *
83566  * Field Access Macros:
83567  *
83568  */
83569 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14 register field. */
83570 #define ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14_LSB 0
83571 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14 register field. */
83572 #define ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14_MSB 31
83573 /* The width in bits of the ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14 register field. */
83574 #define ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14_WIDTH 32
83575 /* The mask used to set the ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14 register field value. */
83576 #define ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14_SET_MSK 0xffffffff
83577 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14 register field value. */
83578 #define ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14_CLR_MSK 0x00000000
83579 /* The reset value of the ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14 register field is UNKNOWN. */
83580 #define ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14_RESET 0x0
83581 /* Extracts the ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14 field value from a register. */
83582 #define ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14_GET(value) (((value) & 0xffffffff) >> 0)
83583 /* Produces a ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14 register field value suitable for setting the register. */
83584 #define ALT_USB_DEV_DIEPDMAB14_DIEPDMAB14_SET(value) (((value) << 0) & 0xffffffff)
83585 
83586 #ifndef __ASSEMBLY__
83587 /*
83588  * WARNING: The C register and register group struct declarations are provided for
83589  * convenience and illustrative purposes. They should, however, be used with
83590  * caution as the C language standard provides no guarantees about the alignment or
83591  * atomicity of device memory accesses. The recommended practice for writing
83592  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
83593  * alt_write_word() functions.
83594  *
83595  * The struct declaration for register ALT_USB_DEV_DIEPDMAB14.
83596  */
83597 struct ALT_USB_DEV_DIEPDMAB14_s
83598 {
83599  const uint32_t diepdmab14 : 32; /* DMA Buffer Address */
83600 };
83601 
83602 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB14. */
83603 typedef volatile struct ALT_USB_DEV_DIEPDMAB14_s ALT_USB_DEV_DIEPDMAB14_t;
83604 #endif /* __ASSEMBLY__ */
83605 
83606 /* The byte offset of the ALT_USB_DEV_DIEPDMAB14 register from the beginning of the component. */
83607 #define ALT_USB_DEV_DIEPDMAB14_OFST 0x2dc
83608 /* The address of the ALT_USB_DEV_DIEPDMAB14 register. */
83609 #define ALT_USB_DEV_DIEPDMAB14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB14_OFST))
83610 
83611 /*
83612  * Register : Device Control IN Endpoint 15 Control Registe - diepctl15
83613  *
83614  * Endpoint_number: 15
83615  *
83616  * Register Layout
83617  *
83618  * Bits | Access | Reset | Description
83619  * :--------|:-------|:------|:--------------------
83620  * [10:0] | RW | 0x0 | Maximum Packet Size
83621  * [14:11] | ??? | 0x0 | *UNDEFINED*
83622  * [15] | RW | 0x0 | USB Active Endpoint
83623  * [16] | R | 0x0 | Endpoint Data PID
83624  * [17] | R | 0x0 | NAK Status
83625  * [19:18] | RW | 0x0 | Endpoint Type
83626  * [20] | ??? | 0x0 | *UNDEFINED*
83627  * [21] | R | 0x0 | STALL Handshake
83628  * [25:22] | RW | 0x0 | TxFIFO Number
83629  * [26] | W | 0x0 | Clear NAK
83630  * [27] | W | 0x0 | Set NAK
83631  * [28] | W | 0x0 | Set DATA0 PID
83632  * [29] | W | 0x0 | Set DATA1 PID
83633  * [30] | R | 0x0 | Endpoint Disable
83634  * [31] | R | 0x0 | Endpoint Enable
83635  *
83636  */
83637 /*
83638  * Field : Maximum Packet Size - mps
83639  *
83640  * Applies to IN and OUT endpoints. The application must program this field with
83641  * the maximum packet size for the current logical endpoint. This value is in
83642  * bytes.
83643  *
83644  * Field Access Macros:
83645  *
83646  */
83647 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_MPS register field. */
83648 #define ALT_USB_DEV_DIEPCTL15_MPS_LSB 0
83649 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_MPS register field. */
83650 #define ALT_USB_DEV_DIEPCTL15_MPS_MSB 10
83651 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_MPS register field. */
83652 #define ALT_USB_DEV_DIEPCTL15_MPS_WIDTH 11
83653 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_MPS register field value. */
83654 #define ALT_USB_DEV_DIEPCTL15_MPS_SET_MSK 0x000007ff
83655 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_MPS register field value. */
83656 #define ALT_USB_DEV_DIEPCTL15_MPS_CLR_MSK 0xfffff800
83657 /* The reset value of the ALT_USB_DEV_DIEPCTL15_MPS register field. */
83658 #define ALT_USB_DEV_DIEPCTL15_MPS_RESET 0x0
83659 /* Extracts the ALT_USB_DEV_DIEPCTL15_MPS field value from a register. */
83660 #define ALT_USB_DEV_DIEPCTL15_MPS_GET(value) (((value) & 0x000007ff) >> 0)
83661 /* Produces a ALT_USB_DEV_DIEPCTL15_MPS register field value suitable for setting the register. */
83662 #define ALT_USB_DEV_DIEPCTL15_MPS_SET(value) (((value) << 0) & 0x000007ff)
83663 
83664 /*
83665  * Field : USB Active Endpoint - usbactep
83666  *
83667  * Indicates whether this endpoint is active in the current configuration and
83668  * interface. The core clears this bit for all endpoints (other than EP 0) after
83669  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
83670  * commands, the application must program endpoint registers accordingly and set
83671  * this bit.
83672  *
83673  * Field Enumeration Values:
83674  *
83675  * Enum | Value | Description
83676  * :--------------------------------------|:------|:--------------------
83677  * ALT_USB_DEV_DIEPCTL15_USBACTEP_E_DISD | 0x0 | Not Active
83678  * ALT_USB_DEV_DIEPCTL15_USBACTEP_E_END | 0x1 | USB Active Endpoint
83679  *
83680  * Field Access Macros:
83681  *
83682  */
83683 /*
83684  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_USBACTEP
83685  *
83686  * Not Active
83687  */
83688 #define ALT_USB_DEV_DIEPCTL15_USBACTEP_E_DISD 0x0
83689 /*
83690  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_USBACTEP
83691  *
83692  * USB Active Endpoint
83693  */
83694 #define ALT_USB_DEV_DIEPCTL15_USBACTEP_E_END 0x1
83695 
83696 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_USBACTEP register field. */
83697 #define ALT_USB_DEV_DIEPCTL15_USBACTEP_LSB 15
83698 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_USBACTEP register field. */
83699 #define ALT_USB_DEV_DIEPCTL15_USBACTEP_MSB 15
83700 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_USBACTEP register field. */
83701 #define ALT_USB_DEV_DIEPCTL15_USBACTEP_WIDTH 1
83702 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_USBACTEP register field value. */
83703 #define ALT_USB_DEV_DIEPCTL15_USBACTEP_SET_MSK 0x00008000
83704 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_USBACTEP register field value. */
83705 #define ALT_USB_DEV_DIEPCTL15_USBACTEP_CLR_MSK 0xffff7fff
83706 /* The reset value of the ALT_USB_DEV_DIEPCTL15_USBACTEP register field. */
83707 #define ALT_USB_DEV_DIEPCTL15_USBACTEP_RESET 0x0
83708 /* Extracts the ALT_USB_DEV_DIEPCTL15_USBACTEP field value from a register. */
83709 #define ALT_USB_DEV_DIEPCTL15_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
83710 /* Produces a ALT_USB_DEV_DIEPCTL15_USBACTEP register field value suitable for setting the register. */
83711 #define ALT_USB_DEV_DIEPCTL15_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
83712 
83713 /*
83714  * Field : Endpoint Data PID - dpid
83715  *
83716  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
83717  * packet to be received or transmitted on this endpoint. The application must
83718  * program the PID of the first packet to be received or transmitted on this
83719  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
83720  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
83721  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
83722  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
83723  * DMA mode:
83724  *
83725  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
83726  * number in which the core transmits/receives isochronous data for this endpoint.
83727  * The application must program the even/odd (micro) frame number in which it
83728  * intends to transmit/receive isochronous data for this endpoint using the
83729  * SetEvnFr and SetOddFr fields in this register.
83730  *
83731  * 0: Even (micro)frame
83732  *
83733  * 1: Odd (micro)frame
83734  *
83735  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
83736  * number in which to send data is provided in the transmit descriptor structure.
83737  * The frame in which data is received is updated in receive descriptor structure.
83738  *
83739  * Field Enumeration Values:
83740  *
83741  * Enum | Value | Description
83742  * :-----------------------------------|:------|:-----------------------------
83743  * ALT_USB_DEV_DIEPCTL15_DPID_E_INACT | 0x0 | Endpoint Data PID not active
83744  * ALT_USB_DEV_DIEPCTL15_DPID_E_ACT | 0x1 | Endpoint Data PID active
83745  *
83746  * Field Access Macros:
83747  *
83748  */
83749 /*
83750  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_DPID
83751  *
83752  * Endpoint Data PID not active
83753  */
83754 #define ALT_USB_DEV_DIEPCTL15_DPID_E_INACT 0x0
83755 /*
83756  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_DPID
83757  *
83758  * Endpoint Data PID active
83759  */
83760 #define ALT_USB_DEV_DIEPCTL15_DPID_E_ACT 0x1
83761 
83762 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_DPID register field. */
83763 #define ALT_USB_DEV_DIEPCTL15_DPID_LSB 16
83764 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_DPID register field. */
83765 #define ALT_USB_DEV_DIEPCTL15_DPID_MSB 16
83766 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_DPID register field. */
83767 #define ALT_USB_DEV_DIEPCTL15_DPID_WIDTH 1
83768 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_DPID register field value. */
83769 #define ALT_USB_DEV_DIEPCTL15_DPID_SET_MSK 0x00010000
83770 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_DPID register field value. */
83771 #define ALT_USB_DEV_DIEPCTL15_DPID_CLR_MSK 0xfffeffff
83772 /* The reset value of the ALT_USB_DEV_DIEPCTL15_DPID register field. */
83773 #define ALT_USB_DEV_DIEPCTL15_DPID_RESET 0x0
83774 /* Extracts the ALT_USB_DEV_DIEPCTL15_DPID field value from a register. */
83775 #define ALT_USB_DEV_DIEPCTL15_DPID_GET(value) (((value) & 0x00010000) >> 16)
83776 /* Produces a ALT_USB_DEV_DIEPCTL15_DPID register field value suitable for setting the register. */
83777 #define ALT_USB_DEV_DIEPCTL15_DPID_SET(value) (((value) << 16) & 0x00010000)
83778 
83779 /*
83780  * Field : NAK Status - naksts
83781  *
83782  * When either the application or the core sets this bit:
83783  *
83784  * * The core stops receiving any data on an OUT endpoint, even if there is space
83785  * in the RxFIFO to accommodate the incoming packet.
83786  *
83787  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
83788  * IN endpoint, even if there data is available in the TxFIFO.
83789  *
83790  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
83791  * even if there data is available in the TxFIFO.
83792  *
83793  * Irrespective of this bit's setting, the core always responds to SETUP data
83794  * packets with an ACK handshake.
83795  *
83796  * Field Enumeration Values:
83797  *
83798  * Enum | Value | Description
83799  * :--------------------------------------|:------|:------------------------------------------------
83800  * ALT_USB_DEV_DIEPCTL15_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
83801  * : | | based on the FIFO status
83802  * ALT_USB_DEV_DIEPCTL15_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
83803  * : | | endpoint
83804  *
83805  * Field Access Macros:
83806  *
83807  */
83808 /*
83809  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_NAKSTS
83810  *
83811  * The core is transmitting non-NAK handshakes based on the FIFO status
83812  */
83813 #define ALT_USB_DEV_DIEPCTL15_NAKSTS_E_NONNAK 0x0
83814 /*
83815  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_NAKSTS
83816  *
83817  * The core is transmitting NAK handshakes on this endpoint
83818  */
83819 #define ALT_USB_DEV_DIEPCTL15_NAKSTS_E_NAK 0x1
83820 
83821 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_NAKSTS register field. */
83822 #define ALT_USB_DEV_DIEPCTL15_NAKSTS_LSB 17
83823 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_NAKSTS register field. */
83824 #define ALT_USB_DEV_DIEPCTL15_NAKSTS_MSB 17
83825 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_NAKSTS register field. */
83826 #define ALT_USB_DEV_DIEPCTL15_NAKSTS_WIDTH 1
83827 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_NAKSTS register field value. */
83828 #define ALT_USB_DEV_DIEPCTL15_NAKSTS_SET_MSK 0x00020000
83829 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_NAKSTS register field value. */
83830 #define ALT_USB_DEV_DIEPCTL15_NAKSTS_CLR_MSK 0xfffdffff
83831 /* The reset value of the ALT_USB_DEV_DIEPCTL15_NAKSTS register field. */
83832 #define ALT_USB_DEV_DIEPCTL15_NAKSTS_RESET 0x0
83833 /* Extracts the ALT_USB_DEV_DIEPCTL15_NAKSTS field value from a register. */
83834 #define ALT_USB_DEV_DIEPCTL15_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
83835 /* Produces a ALT_USB_DEV_DIEPCTL15_NAKSTS register field value suitable for setting the register. */
83836 #define ALT_USB_DEV_DIEPCTL15_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
83837 
83838 /*
83839  * Field : Endpoint Type - eptype
83840  *
83841  * This is the transfer type supported by this logical endpoint.
83842  *
83843  * Field Enumeration Values:
83844  *
83845  * Enum | Value | Description
83846  * :-------------------------------------------|:------|:------------
83847  * ALT_USB_DEV_DIEPCTL15_EPTYPE_E_CTL | 0x0 | Control
83848  * ALT_USB_DEV_DIEPCTL15_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
83849  * ALT_USB_DEV_DIEPCTL15_EPTYPE_E_BULK | 0x2 | Bulk
83850  * ALT_USB_DEV_DIEPCTL15_EPTYPE_E_INTERRUP | 0x3 | Interrupt
83851  *
83852  * Field Access Macros:
83853  *
83854  */
83855 /*
83856  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_EPTYPE
83857  *
83858  * Control
83859  */
83860 #define ALT_USB_DEV_DIEPCTL15_EPTYPE_E_CTL 0x0
83861 /*
83862  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_EPTYPE
83863  *
83864  * Isochronous
83865  */
83866 #define ALT_USB_DEV_DIEPCTL15_EPTYPE_E_ISOCHRONOUS 0x1
83867 /*
83868  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_EPTYPE
83869  *
83870  * Bulk
83871  */
83872 #define ALT_USB_DEV_DIEPCTL15_EPTYPE_E_BULK 0x2
83873 /*
83874  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_EPTYPE
83875  *
83876  * Interrupt
83877  */
83878 #define ALT_USB_DEV_DIEPCTL15_EPTYPE_E_INTERRUP 0x3
83879 
83880 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_EPTYPE register field. */
83881 #define ALT_USB_DEV_DIEPCTL15_EPTYPE_LSB 18
83882 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_EPTYPE register field. */
83883 #define ALT_USB_DEV_DIEPCTL15_EPTYPE_MSB 19
83884 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_EPTYPE register field. */
83885 #define ALT_USB_DEV_DIEPCTL15_EPTYPE_WIDTH 2
83886 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_EPTYPE register field value. */
83887 #define ALT_USB_DEV_DIEPCTL15_EPTYPE_SET_MSK 0x000c0000
83888 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_EPTYPE register field value. */
83889 #define ALT_USB_DEV_DIEPCTL15_EPTYPE_CLR_MSK 0xfff3ffff
83890 /* The reset value of the ALT_USB_DEV_DIEPCTL15_EPTYPE register field. */
83891 #define ALT_USB_DEV_DIEPCTL15_EPTYPE_RESET 0x0
83892 /* Extracts the ALT_USB_DEV_DIEPCTL15_EPTYPE field value from a register. */
83893 #define ALT_USB_DEV_DIEPCTL15_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
83894 /* Produces a ALT_USB_DEV_DIEPCTL15_EPTYPE register field value suitable for setting the register. */
83895 #define ALT_USB_DEV_DIEPCTL15_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
83896 
83897 /*
83898  * Field : STALL Handshake - stall
83899  *
83900  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
83901  * application sets this bit to stall all tokens from the USB host to this
83902  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
83903  * along with this bit, the STALL bit takes priority. Only the application can
83904  * clear this bit, never the core. Applies to control endpoints only. The
83905  * application can only set this bit, and the core clears it, when a SETUP token is
83906  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
83907  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
83908  * of this bit's setting, the core always responds to SETUP data packets with an
83909  * ACK handshake.
83910  *
83911  * Field Enumeration Values:
83912  *
83913  * Enum | Value | Description
83914  * :------------------------------------|:------|:----------------------------
83915  * ALT_USB_DEV_DIEPCTL15_STALL_E_INACT | 0x0 | STALL All Tokens not active
83916  * ALT_USB_DEV_DIEPCTL15_STALL_E_ACT | 0x1 | STALL All Tokens active
83917  *
83918  * Field Access Macros:
83919  *
83920  */
83921 /*
83922  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_STALL
83923  *
83924  * STALL All Tokens not active
83925  */
83926 #define ALT_USB_DEV_DIEPCTL15_STALL_E_INACT 0x0
83927 /*
83928  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_STALL
83929  *
83930  * STALL All Tokens active
83931  */
83932 #define ALT_USB_DEV_DIEPCTL15_STALL_E_ACT 0x1
83933 
83934 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_STALL register field. */
83935 #define ALT_USB_DEV_DIEPCTL15_STALL_LSB 21
83936 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_STALL register field. */
83937 #define ALT_USB_DEV_DIEPCTL15_STALL_MSB 21
83938 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_STALL register field. */
83939 #define ALT_USB_DEV_DIEPCTL15_STALL_WIDTH 1
83940 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_STALL register field value. */
83941 #define ALT_USB_DEV_DIEPCTL15_STALL_SET_MSK 0x00200000
83942 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_STALL register field value. */
83943 #define ALT_USB_DEV_DIEPCTL15_STALL_CLR_MSK 0xffdfffff
83944 /* The reset value of the ALT_USB_DEV_DIEPCTL15_STALL register field. */
83945 #define ALT_USB_DEV_DIEPCTL15_STALL_RESET 0x0
83946 /* Extracts the ALT_USB_DEV_DIEPCTL15_STALL field value from a register. */
83947 #define ALT_USB_DEV_DIEPCTL15_STALL_GET(value) (((value) & 0x00200000) >> 21)
83948 /* Produces a ALT_USB_DEV_DIEPCTL15_STALL register field value suitable for setting the register. */
83949 #define ALT_USB_DEV_DIEPCTL15_STALL_SET(value) (((value) << 21) & 0x00200000)
83950 
83951 /*
83952  * Field : TxFIFO Number - txfnum
83953  *
83954  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
83955  * endpoints must map this to the corresponding Periodic TxFIFO number.
83956  *
83957  * 4'h0: Non-Periodic TxFIFO
83958  *
83959  * Others: Specified Periodic TxFIFO.number
83960  *
83961  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
83962  * applications such as mass storage. The core treats an IN endpoint as a non-
83963  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
83964  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
83965  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
83966  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
83967  * This field is valid only for IN endpoints.
83968  *
83969  * Field Access Macros:
83970  *
83971  */
83972 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_TXFNUM register field. */
83973 #define ALT_USB_DEV_DIEPCTL15_TXFNUM_LSB 22
83974 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_TXFNUM register field. */
83975 #define ALT_USB_DEV_DIEPCTL15_TXFNUM_MSB 25
83976 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_TXFNUM register field. */
83977 #define ALT_USB_DEV_DIEPCTL15_TXFNUM_WIDTH 4
83978 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_TXFNUM register field value. */
83979 #define ALT_USB_DEV_DIEPCTL15_TXFNUM_SET_MSK 0x03c00000
83980 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_TXFNUM register field value. */
83981 #define ALT_USB_DEV_DIEPCTL15_TXFNUM_CLR_MSK 0xfc3fffff
83982 /* The reset value of the ALT_USB_DEV_DIEPCTL15_TXFNUM register field. */
83983 #define ALT_USB_DEV_DIEPCTL15_TXFNUM_RESET 0x0
83984 /* Extracts the ALT_USB_DEV_DIEPCTL15_TXFNUM field value from a register. */
83985 #define ALT_USB_DEV_DIEPCTL15_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
83986 /* Produces a ALT_USB_DEV_DIEPCTL15_TXFNUM register field value suitable for setting the register. */
83987 #define ALT_USB_DEV_DIEPCTL15_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
83988 
83989 /*
83990  * Field : Clear NAK - cnak
83991  *
83992  * A write to this bit clears the NAK bit for the endpoint.
83993  *
83994  * Field Enumeration Values:
83995  *
83996  * Enum | Value | Description
83997  * :-----------------------------------|:------|:-------------
83998  * ALT_USB_DEV_DIEPCTL15_CNAK_E_INACT | 0x0 | No Clear NAK
83999  * ALT_USB_DEV_DIEPCTL15_CNAK_E_ACT | 0x1 | Clear NAK
84000  *
84001  * Field Access Macros:
84002  *
84003  */
84004 /*
84005  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_CNAK
84006  *
84007  * No Clear NAK
84008  */
84009 #define ALT_USB_DEV_DIEPCTL15_CNAK_E_INACT 0x0
84010 /*
84011  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_CNAK
84012  *
84013  * Clear NAK
84014  */
84015 #define ALT_USB_DEV_DIEPCTL15_CNAK_E_ACT 0x1
84016 
84017 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_CNAK register field. */
84018 #define ALT_USB_DEV_DIEPCTL15_CNAK_LSB 26
84019 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_CNAK register field. */
84020 #define ALT_USB_DEV_DIEPCTL15_CNAK_MSB 26
84021 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_CNAK register field. */
84022 #define ALT_USB_DEV_DIEPCTL15_CNAK_WIDTH 1
84023 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_CNAK register field value. */
84024 #define ALT_USB_DEV_DIEPCTL15_CNAK_SET_MSK 0x04000000
84025 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_CNAK register field value. */
84026 #define ALT_USB_DEV_DIEPCTL15_CNAK_CLR_MSK 0xfbffffff
84027 /* The reset value of the ALT_USB_DEV_DIEPCTL15_CNAK register field. */
84028 #define ALT_USB_DEV_DIEPCTL15_CNAK_RESET 0x0
84029 /* Extracts the ALT_USB_DEV_DIEPCTL15_CNAK field value from a register. */
84030 #define ALT_USB_DEV_DIEPCTL15_CNAK_GET(value) (((value) & 0x04000000) >> 26)
84031 /* Produces a ALT_USB_DEV_DIEPCTL15_CNAK register field value suitable for setting the register. */
84032 #define ALT_USB_DEV_DIEPCTL15_CNAK_SET(value) (((value) << 26) & 0x04000000)
84033 
84034 /*
84035  * Field : Set NAK - snak
84036  *
84037  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
84038  * application can control the transmission of NAK handshakes on an endpoint. The
84039  * core can also Set this bit for an endpoint after a SETUP packet is received on
84040  * that endpoint.
84041  *
84042  * Field Enumeration Values:
84043  *
84044  * Enum | Value | Description
84045  * :-----------------------------------|:------|:------------
84046  * ALT_USB_DEV_DIEPCTL15_SNAK_E_INACT | 0x0 | No Set NAK
84047  * ALT_USB_DEV_DIEPCTL15_SNAK_E_ACT | 0x1 | Set NAK
84048  *
84049  * Field Access Macros:
84050  *
84051  */
84052 /*
84053  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_SNAK
84054  *
84055  * No Set NAK
84056  */
84057 #define ALT_USB_DEV_DIEPCTL15_SNAK_E_INACT 0x0
84058 /*
84059  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_SNAK
84060  *
84061  * Set NAK
84062  */
84063 #define ALT_USB_DEV_DIEPCTL15_SNAK_E_ACT 0x1
84064 
84065 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_SNAK register field. */
84066 #define ALT_USB_DEV_DIEPCTL15_SNAK_LSB 27
84067 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_SNAK register field. */
84068 #define ALT_USB_DEV_DIEPCTL15_SNAK_MSB 27
84069 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_SNAK register field. */
84070 #define ALT_USB_DEV_DIEPCTL15_SNAK_WIDTH 1
84071 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_SNAK register field value. */
84072 #define ALT_USB_DEV_DIEPCTL15_SNAK_SET_MSK 0x08000000
84073 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_SNAK register field value. */
84074 #define ALT_USB_DEV_DIEPCTL15_SNAK_CLR_MSK 0xf7ffffff
84075 /* The reset value of the ALT_USB_DEV_DIEPCTL15_SNAK register field. */
84076 #define ALT_USB_DEV_DIEPCTL15_SNAK_RESET 0x0
84077 /* Extracts the ALT_USB_DEV_DIEPCTL15_SNAK field value from a register. */
84078 #define ALT_USB_DEV_DIEPCTL15_SNAK_GET(value) (((value) & 0x08000000) >> 27)
84079 /* Produces a ALT_USB_DEV_DIEPCTL15_SNAK register field value suitable for setting the register. */
84080 #define ALT_USB_DEV_DIEPCTL15_SNAK_SET(value) (((value) << 27) & 0x08000000)
84081 
84082 /*
84083  * Field : Set DATA0 PID - setd0pid
84084  *
84085  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
84086  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
84087  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
84088  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
84089  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
84090  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
84091  * mode is enabled, this field is reserved. The frame number in which to send data
84092  * is in the transmit descriptor structure. The frame in which to receive data is
84093  * updated in receive descriptor structure.
84094  *
84095  * Field Enumeration Values:
84096  *
84097  * Enum | Value | Description
84098  * :--------------------------------------|:------|:----------------------------
84099  * ALT_USB_DEV_DIEPCTL15_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
84100  * ALT_USB_DEV_DIEPCTL15_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
84101  *
84102  * Field Access Macros:
84103  *
84104  */
84105 /*
84106  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_SETD0PID
84107  *
84108  * Disables Set DATA0 PID
84109  */
84110 #define ALT_USB_DEV_DIEPCTL15_SETD0PID_E_DISD 0x0
84111 /*
84112  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_SETD0PID
84113  *
84114  * Endpoint Data PID to DATA0)
84115  */
84116 #define ALT_USB_DEV_DIEPCTL15_SETD0PID_E_END 0x1
84117 
84118 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_SETD0PID register field. */
84119 #define ALT_USB_DEV_DIEPCTL15_SETD0PID_LSB 28
84120 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_SETD0PID register field. */
84121 #define ALT_USB_DEV_DIEPCTL15_SETD0PID_MSB 28
84122 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_SETD0PID register field. */
84123 #define ALT_USB_DEV_DIEPCTL15_SETD0PID_WIDTH 1
84124 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_SETD0PID register field value. */
84125 #define ALT_USB_DEV_DIEPCTL15_SETD0PID_SET_MSK 0x10000000
84126 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_SETD0PID register field value. */
84127 #define ALT_USB_DEV_DIEPCTL15_SETD0PID_CLR_MSK 0xefffffff
84128 /* The reset value of the ALT_USB_DEV_DIEPCTL15_SETD0PID register field. */
84129 #define ALT_USB_DEV_DIEPCTL15_SETD0PID_RESET 0x0
84130 /* Extracts the ALT_USB_DEV_DIEPCTL15_SETD0PID field value from a register. */
84131 #define ALT_USB_DEV_DIEPCTL15_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
84132 /* Produces a ALT_USB_DEV_DIEPCTL15_SETD0PID register field value suitable for setting the register. */
84133 #define ALT_USB_DEV_DIEPCTL15_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
84134 
84135 /*
84136  * Field : Set DATA1 PID - setd1pid
84137  *
84138  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
84139  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
84140  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
84141  *
84142  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
84143  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
84144  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
84145  *
84146  * Field Enumeration Values:
84147  *
84148  * Enum | Value | Description
84149  * :--------------------------------------|:------|:-----------------------
84150  * ALT_USB_DEV_DIEPCTL15_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
84151  * ALT_USB_DEV_DIEPCTL15_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
84152  *
84153  * Field Access Macros:
84154  *
84155  */
84156 /*
84157  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_SETD1PID
84158  *
84159  * Disables Set DATA1 PID
84160  */
84161 #define ALT_USB_DEV_DIEPCTL15_SETD1PID_E_DISD 0x0
84162 /*
84163  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_SETD1PID
84164  *
84165  * Enables Set DATA1 PID
84166  */
84167 #define ALT_USB_DEV_DIEPCTL15_SETD1PID_E_END 0x1
84168 
84169 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_SETD1PID register field. */
84170 #define ALT_USB_DEV_DIEPCTL15_SETD1PID_LSB 29
84171 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_SETD1PID register field. */
84172 #define ALT_USB_DEV_DIEPCTL15_SETD1PID_MSB 29
84173 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_SETD1PID register field. */
84174 #define ALT_USB_DEV_DIEPCTL15_SETD1PID_WIDTH 1
84175 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_SETD1PID register field value. */
84176 #define ALT_USB_DEV_DIEPCTL15_SETD1PID_SET_MSK 0x20000000
84177 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_SETD1PID register field value. */
84178 #define ALT_USB_DEV_DIEPCTL15_SETD1PID_CLR_MSK 0xdfffffff
84179 /* The reset value of the ALT_USB_DEV_DIEPCTL15_SETD1PID register field. */
84180 #define ALT_USB_DEV_DIEPCTL15_SETD1PID_RESET 0x0
84181 /* Extracts the ALT_USB_DEV_DIEPCTL15_SETD1PID field value from a register. */
84182 #define ALT_USB_DEV_DIEPCTL15_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
84183 /* Produces a ALT_USB_DEV_DIEPCTL15_SETD1PID register field value suitable for setting the register. */
84184 #define ALT_USB_DEV_DIEPCTL15_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
84185 
84186 /*
84187  * Field : Endpoint Disable - epdis
84188  *
84189  * Applies to IN and OUT endpoints. The application sets this bit to stop
84190  * transmitting/receiving data on an endpoint, even before the transfer for that
84191  * endpoint is complete. The application must wait for the Endpoint Disabled
84192  * interrupt before treating the endpoint as disabled. The core clears this bit
84193  * before setting the Endpoint Disabled interrupt. The application must set this
84194  * bit only if Endpoint Enable is already set for this endpoint.
84195  *
84196  * Field Enumeration Values:
84197  *
84198  * Enum | Value | Description
84199  * :------------------------------------|:------|:--------------------
84200  * ALT_USB_DEV_DIEPCTL15_EPDIS_E_INACT | 0x0 | No Endpoint Disable
84201  * ALT_USB_DEV_DIEPCTL15_EPDIS_E_ACT | 0x1 | Endpoint Disable
84202  *
84203  * Field Access Macros:
84204  *
84205  */
84206 /*
84207  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_EPDIS
84208  *
84209  * No Endpoint Disable
84210  */
84211 #define ALT_USB_DEV_DIEPCTL15_EPDIS_E_INACT 0x0
84212 /*
84213  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_EPDIS
84214  *
84215  * Endpoint Disable
84216  */
84217 #define ALT_USB_DEV_DIEPCTL15_EPDIS_E_ACT 0x1
84218 
84219 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_EPDIS register field. */
84220 #define ALT_USB_DEV_DIEPCTL15_EPDIS_LSB 30
84221 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_EPDIS register field. */
84222 #define ALT_USB_DEV_DIEPCTL15_EPDIS_MSB 30
84223 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_EPDIS register field. */
84224 #define ALT_USB_DEV_DIEPCTL15_EPDIS_WIDTH 1
84225 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_EPDIS register field value. */
84226 #define ALT_USB_DEV_DIEPCTL15_EPDIS_SET_MSK 0x40000000
84227 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_EPDIS register field value. */
84228 #define ALT_USB_DEV_DIEPCTL15_EPDIS_CLR_MSK 0xbfffffff
84229 /* The reset value of the ALT_USB_DEV_DIEPCTL15_EPDIS register field. */
84230 #define ALT_USB_DEV_DIEPCTL15_EPDIS_RESET 0x0
84231 /* Extracts the ALT_USB_DEV_DIEPCTL15_EPDIS field value from a register. */
84232 #define ALT_USB_DEV_DIEPCTL15_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
84233 /* Produces a ALT_USB_DEV_DIEPCTL15_EPDIS register field value suitable for setting the register. */
84234 #define ALT_USB_DEV_DIEPCTL15_EPDIS_SET(value) (((value) << 30) & 0x40000000)
84235 
84236 /*
84237  * Field : Endpoint Enable - epena
84238  *
84239  * Applies to IN and OUT endpoints.
84240  *
84241  * * When Scatter/Gather DMA mode is enabled,
84242  *
84243  * * for IN endpoints this bit indicates that the descriptor structure and data
84244  * buffer with data ready to transmit is setup.
84245  *
84246  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
84247  * receive data is setup.
84248  *
84249  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
84250  * mode:
84251  *
84252  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
84253  * the endpoint.
84254  *
84255  * * for OUT endpoints, this bit indicates that the application has allocated the
84256  * memory to start receiving data from the USB.
84257  *
84258  * * The core clears this bit before setting any of the following interrupts on
84259  * this endpoint:
84260  *
84261  * * SETUP Phase Done
84262  *
84263  * * Endpoint Disabled
84264  *
84265  * * Transfer Completed
84266  *
84267  * for control endpoints in DMA mode, this bit must be set to be able to transfer
84268  * SETUP data packets in memory.
84269  *
84270  * Field Enumeration Values:
84271  *
84272  * Enum | Value | Description
84273  * :------------------------------------|:------|:-------------------------
84274  * ALT_USB_DEV_DIEPCTL15_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
84275  * ALT_USB_DEV_DIEPCTL15_EPENA_E_ACT | 0x1 | Endpoint Enable active
84276  *
84277  * Field Access Macros:
84278  *
84279  */
84280 /*
84281  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_EPENA
84282  *
84283  * Endpoint Enable inactive
84284  */
84285 #define ALT_USB_DEV_DIEPCTL15_EPENA_E_INACT 0x0
84286 /*
84287  * Enumerated value for register field ALT_USB_DEV_DIEPCTL15_EPENA
84288  *
84289  * Endpoint Enable active
84290  */
84291 #define ALT_USB_DEV_DIEPCTL15_EPENA_E_ACT 0x1
84292 
84293 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL15_EPENA register field. */
84294 #define ALT_USB_DEV_DIEPCTL15_EPENA_LSB 31
84295 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL15_EPENA register field. */
84296 #define ALT_USB_DEV_DIEPCTL15_EPENA_MSB 31
84297 /* The width in bits of the ALT_USB_DEV_DIEPCTL15_EPENA register field. */
84298 #define ALT_USB_DEV_DIEPCTL15_EPENA_WIDTH 1
84299 /* The mask used to set the ALT_USB_DEV_DIEPCTL15_EPENA register field value. */
84300 #define ALT_USB_DEV_DIEPCTL15_EPENA_SET_MSK 0x80000000
84301 /* The mask used to clear the ALT_USB_DEV_DIEPCTL15_EPENA register field value. */
84302 #define ALT_USB_DEV_DIEPCTL15_EPENA_CLR_MSK 0x7fffffff
84303 /* The reset value of the ALT_USB_DEV_DIEPCTL15_EPENA register field. */
84304 #define ALT_USB_DEV_DIEPCTL15_EPENA_RESET 0x0
84305 /* Extracts the ALT_USB_DEV_DIEPCTL15_EPENA field value from a register. */
84306 #define ALT_USB_DEV_DIEPCTL15_EPENA_GET(value) (((value) & 0x80000000) >> 31)
84307 /* Produces a ALT_USB_DEV_DIEPCTL15_EPENA register field value suitable for setting the register. */
84308 #define ALT_USB_DEV_DIEPCTL15_EPENA_SET(value) (((value) << 31) & 0x80000000)
84309 
84310 #ifndef __ASSEMBLY__
84311 /*
84312  * WARNING: The C register and register group struct declarations are provided for
84313  * convenience and illustrative purposes. They should, however, be used with
84314  * caution as the C language standard provides no guarantees about the alignment or
84315  * atomicity of device memory accesses. The recommended practice for writing
84316  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
84317  * alt_write_word() functions.
84318  *
84319  * The struct declaration for register ALT_USB_DEV_DIEPCTL15.
84320  */
84321 struct ALT_USB_DEV_DIEPCTL15_s
84322 {
84323  uint32_t mps : 11; /* Maximum Packet Size */
84324  uint32_t : 4; /* *UNDEFINED* */
84325  uint32_t usbactep : 1; /* USB Active Endpoint */
84326  const uint32_t dpid : 1; /* Endpoint Data PID */
84327  const uint32_t naksts : 1; /* NAK Status */
84328  uint32_t eptype : 2; /* Endpoint Type */
84329  uint32_t : 1; /* *UNDEFINED* */
84330  const uint32_t stall : 1; /* STALL Handshake */
84331  uint32_t txfnum : 4; /* TxFIFO Number */
84332  uint32_t cnak : 1; /* Clear NAK */
84333  uint32_t snak : 1; /* Set NAK */
84334  uint32_t setd0pid : 1; /* Set DATA0 PID */
84335  uint32_t setd1pid : 1; /* Set DATA1 PID */
84336  const uint32_t epdis : 1; /* Endpoint Disable */
84337  const uint32_t epena : 1; /* Endpoint Enable */
84338 };
84339 
84340 /* The typedef declaration for register ALT_USB_DEV_DIEPCTL15. */
84341 typedef volatile struct ALT_USB_DEV_DIEPCTL15_s ALT_USB_DEV_DIEPCTL15_t;
84342 #endif /* __ASSEMBLY__ */
84343 
84344 /* The byte offset of the ALT_USB_DEV_DIEPCTL15 register from the beginning of the component. */
84345 #define ALT_USB_DEV_DIEPCTL15_OFST 0x2e0
84346 /* The address of the ALT_USB_DEV_DIEPCTL15 register. */
84347 #define ALT_USB_DEV_DIEPCTL15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL15_OFST))
84348 
84349 /*
84350  * Register : Device IN Endpoint 15 Interrupt Register - diepint15
84351  *
84352  * This register indicates the status of an endpoint with respect to USB- and AHB-
84353  * related events. The application must read this register when the OUT Endpoints
84354  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
84355  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
84356  * can read this register, it must first read the Device All Endpoints Interrupt
84357  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
84358  * Interrupt register. The application must clear the appropriate bit in this
84359  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
84360  *
84361  * Register Layout
84362  *
84363  * Bits | Access | Reset | Description
84364  * :--------|:-------|:------|:---------------------------------------
84365  * [0] | R | 0x0 | Transfer Completed Interrupt
84366  * [1] | R | 0x0 | Endpoint Disabled Interrupt
84367  * [2] | R | 0x0 | AHB Error
84368  * [3] | R | 0x0 | Timeout Condition
84369  * [4] | R | 0x0 | IN Token Received When TxFIFO is Empty
84370  * [5] | R | 0x0 | IN Token Received with EP Mismatch
84371  * [6] | R | 0x0 | IN Endpoint NAK Effective
84372  * [7] | R | 0x1 | Transmit FIFO Empty
84373  * [8] | R | 0x0 | Fifo Underrun
84374  * [9] | R | 0x0 | BNA Interrupt
84375  * [10] | ??? | 0x0 | *UNDEFINED*
84376  * [11] | R | 0x0 | Packet Drop Status
84377  * [12] | R | 0x0 | BbleErr Interrupt
84378  * [13] | R | 0x0 | NAK Interrupt
84379  * [14] | R | 0x0 | NYET Interrupt
84380  * [31:15] | ??? | 0x0 | *UNDEFINED*
84381  *
84382  */
84383 /*
84384  * Field : Transfer Completed Interrupt - xfercompl
84385  *
84386  * Applies to IN and OUT endpoints. When Scatter/Gather DMA mode is enabled
84387  *
84388  * * for IN endpoint this field indicates that the requested data from the
84389  * descriptor is moved from external system memory to internal FIFO.
84390  *
84391  * * for OUT endpoint this field indicates that the requested data from the
84392  * internal FIFO is moved to external system memory. This interrupt is generated
84393  * only when the corresponding endpoint descriptor is closed, and the IOC bit for
84394  * the corresponding descriptor is Set. When Scatter/Gather DMA mode is disabled,
84395  * this field indicates that the programmed transfer is complete on the AHB as
84396  * well as on the USB, for this endpoint.
84397  *
84398  * Field Enumeration Values:
84399  *
84400  * Enum | Value | Description
84401  * :----------------------------------------|:------|:-----------------------------
84402  * ALT_USB_DEV_DIEPINT15_XFERCOMPL_E_INACT | 0x0 | No Interrupt
84403  * ALT_USB_DEV_DIEPINT15_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
84404  *
84405  * Field Access Macros:
84406  *
84407  */
84408 /*
84409  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_XFERCOMPL
84410  *
84411  * No Interrupt
84412  */
84413 #define ALT_USB_DEV_DIEPINT15_XFERCOMPL_E_INACT 0x0
84414 /*
84415  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_XFERCOMPL
84416  *
84417  * Transfer Completed Interrupt
84418  */
84419 #define ALT_USB_DEV_DIEPINT15_XFERCOMPL_E_ACT 0x1
84420 
84421 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_XFERCOMPL register field. */
84422 #define ALT_USB_DEV_DIEPINT15_XFERCOMPL_LSB 0
84423 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_XFERCOMPL register field. */
84424 #define ALT_USB_DEV_DIEPINT15_XFERCOMPL_MSB 0
84425 /* The width in bits of the ALT_USB_DEV_DIEPINT15_XFERCOMPL register field. */
84426 #define ALT_USB_DEV_DIEPINT15_XFERCOMPL_WIDTH 1
84427 /* The mask used to set the ALT_USB_DEV_DIEPINT15_XFERCOMPL register field value. */
84428 #define ALT_USB_DEV_DIEPINT15_XFERCOMPL_SET_MSK 0x00000001
84429 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_XFERCOMPL register field value. */
84430 #define ALT_USB_DEV_DIEPINT15_XFERCOMPL_CLR_MSK 0xfffffffe
84431 /* The reset value of the ALT_USB_DEV_DIEPINT15_XFERCOMPL register field. */
84432 #define ALT_USB_DEV_DIEPINT15_XFERCOMPL_RESET 0x0
84433 /* Extracts the ALT_USB_DEV_DIEPINT15_XFERCOMPL field value from a register. */
84434 #define ALT_USB_DEV_DIEPINT15_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
84435 /* Produces a ALT_USB_DEV_DIEPINT15_XFERCOMPL register field value suitable for setting the register. */
84436 #define ALT_USB_DEV_DIEPINT15_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
84437 
84438 /*
84439  * Field : Endpoint Disabled Interrupt - epdisbld
84440  *
84441  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
84442  * disabled per the application's request.
84443  *
84444  * Field Enumeration Values:
84445  *
84446  * Enum | Value | Description
84447  * :---------------------------------------|:------|:----------------------------
84448  * ALT_USB_DEV_DIEPINT15_EPDISBLD_E_INACT | 0x0 | No Interrupt
84449  * ALT_USB_DEV_DIEPINT15_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
84450  *
84451  * Field Access Macros:
84452  *
84453  */
84454 /*
84455  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_EPDISBLD
84456  *
84457  * No Interrupt
84458  */
84459 #define ALT_USB_DEV_DIEPINT15_EPDISBLD_E_INACT 0x0
84460 /*
84461  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_EPDISBLD
84462  *
84463  * Endpoint Disabled Interrupt
84464  */
84465 #define ALT_USB_DEV_DIEPINT15_EPDISBLD_E_ACT 0x1
84466 
84467 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_EPDISBLD register field. */
84468 #define ALT_USB_DEV_DIEPINT15_EPDISBLD_LSB 1
84469 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_EPDISBLD register field. */
84470 #define ALT_USB_DEV_DIEPINT15_EPDISBLD_MSB 1
84471 /* The width in bits of the ALT_USB_DEV_DIEPINT15_EPDISBLD register field. */
84472 #define ALT_USB_DEV_DIEPINT15_EPDISBLD_WIDTH 1
84473 /* The mask used to set the ALT_USB_DEV_DIEPINT15_EPDISBLD register field value. */
84474 #define ALT_USB_DEV_DIEPINT15_EPDISBLD_SET_MSK 0x00000002
84475 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_EPDISBLD register field value. */
84476 #define ALT_USB_DEV_DIEPINT15_EPDISBLD_CLR_MSK 0xfffffffd
84477 /* The reset value of the ALT_USB_DEV_DIEPINT15_EPDISBLD register field. */
84478 #define ALT_USB_DEV_DIEPINT15_EPDISBLD_RESET 0x0
84479 /* Extracts the ALT_USB_DEV_DIEPINT15_EPDISBLD field value from a register. */
84480 #define ALT_USB_DEV_DIEPINT15_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
84481 /* Produces a ALT_USB_DEV_DIEPINT15_EPDISBLD register field value suitable for setting the register. */
84482 #define ALT_USB_DEV_DIEPINT15_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
84483 
84484 /*
84485  * Field : AHB Error - ahberr
84486  *
84487  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
84488  * there is an AHB error during an AHB read/write. The application can read the
84489  * corresponding endpoint DMA address register to get the error address.
84490  *
84491  * Field Enumeration Values:
84492  *
84493  * Enum | Value | Description
84494  * :-------------------------------------|:------|:--------------------
84495  * ALT_USB_DEV_DIEPINT15_AHBERR_E_INACT | 0x0 | No Interrupt
84496  * ALT_USB_DEV_DIEPINT15_AHBERR_E_ACT | 0x1 | AHB Error interrupt
84497  *
84498  * Field Access Macros:
84499  *
84500  */
84501 /*
84502  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_AHBERR
84503  *
84504  * No Interrupt
84505  */
84506 #define ALT_USB_DEV_DIEPINT15_AHBERR_E_INACT 0x0
84507 /*
84508  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_AHBERR
84509  *
84510  * AHB Error interrupt
84511  */
84512 #define ALT_USB_DEV_DIEPINT15_AHBERR_E_ACT 0x1
84513 
84514 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_AHBERR register field. */
84515 #define ALT_USB_DEV_DIEPINT15_AHBERR_LSB 2
84516 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_AHBERR register field. */
84517 #define ALT_USB_DEV_DIEPINT15_AHBERR_MSB 2
84518 /* The width in bits of the ALT_USB_DEV_DIEPINT15_AHBERR register field. */
84519 #define ALT_USB_DEV_DIEPINT15_AHBERR_WIDTH 1
84520 /* The mask used to set the ALT_USB_DEV_DIEPINT15_AHBERR register field value. */
84521 #define ALT_USB_DEV_DIEPINT15_AHBERR_SET_MSK 0x00000004
84522 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_AHBERR register field value. */
84523 #define ALT_USB_DEV_DIEPINT15_AHBERR_CLR_MSK 0xfffffffb
84524 /* The reset value of the ALT_USB_DEV_DIEPINT15_AHBERR register field. */
84525 #define ALT_USB_DEV_DIEPINT15_AHBERR_RESET 0x0
84526 /* Extracts the ALT_USB_DEV_DIEPINT15_AHBERR field value from a register. */
84527 #define ALT_USB_DEV_DIEPINT15_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
84528 /* Produces a ALT_USB_DEV_DIEPINT15_AHBERR register field value suitable for setting the register. */
84529 #define ALT_USB_DEV_DIEPINT15_AHBERR_SET(value) (((value) << 2) & 0x00000004)
84530 
84531 /*
84532  * Field : Timeout Condition - timeout
84533  *
84534  * In shared TX FIFO mode, applies to non-isochronous IN endpoints only. In
84535  * dedicated FIFO mode, applies only to Control IN endpoints. In Scatter/Gather
84536  * DMA mode, the TimeOUT interrupt is notasserted. Indicates that the core has
84537  * detected a timeout condition on the USB for the last IN token on this endpoint.
84538  *
84539  * Field Enumeration Values:
84540  *
84541  * Enum | Value | Description
84542  * :----------------------------------|:------|:------------------
84543  * ALT_USB_DEV_DIEPINT15_TMO_E_INACT | 0x0 | No interrupt
84544  * ALT_USB_DEV_DIEPINT15_TMO_E_ACT | 0x1 | Timeout interrupy
84545  *
84546  * Field Access Macros:
84547  *
84548  */
84549 /*
84550  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_TMO
84551  *
84552  * No interrupt
84553  */
84554 #define ALT_USB_DEV_DIEPINT15_TMO_E_INACT 0x0
84555 /*
84556  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_TMO
84557  *
84558  * Timeout interrupy
84559  */
84560 #define ALT_USB_DEV_DIEPINT15_TMO_E_ACT 0x1
84561 
84562 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_TMO register field. */
84563 #define ALT_USB_DEV_DIEPINT15_TMO_LSB 3
84564 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_TMO register field. */
84565 #define ALT_USB_DEV_DIEPINT15_TMO_MSB 3
84566 /* The width in bits of the ALT_USB_DEV_DIEPINT15_TMO register field. */
84567 #define ALT_USB_DEV_DIEPINT15_TMO_WIDTH 1
84568 /* The mask used to set the ALT_USB_DEV_DIEPINT15_TMO register field value. */
84569 #define ALT_USB_DEV_DIEPINT15_TMO_SET_MSK 0x00000008
84570 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_TMO register field value. */
84571 #define ALT_USB_DEV_DIEPINT15_TMO_CLR_MSK 0xfffffff7
84572 /* The reset value of the ALT_USB_DEV_DIEPINT15_TMO register field. */
84573 #define ALT_USB_DEV_DIEPINT15_TMO_RESET 0x0
84574 /* Extracts the ALT_USB_DEV_DIEPINT15_TMO field value from a register. */
84575 #define ALT_USB_DEV_DIEPINT15_TMO_GET(value) (((value) & 0x00000008) >> 3)
84576 /* Produces a ALT_USB_DEV_DIEPINT15_TMO register field value suitable for setting the register. */
84577 #define ALT_USB_DEV_DIEPINT15_TMO_SET(value) (((value) << 3) & 0x00000008)
84578 
84579 /*
84580  * Field : IN Token Received When TxFIFO is Empty - intkntxfemp
84581  *
84582  * Applies to non-periodic IN endpoints only. Indicates that an IN token was
84583  * received when the associated TxFIFO (periodic/non-periodic) was empty. This
84584  * interrupt is asserted on the endpoint for which the IN token was received.
84585  *
84586  * Field Enumeration Values:
84587  *
84588  * Enum | Value | Description
84589  * :------------------------------------------|:------|:----------------------------
84590  * ALT_USB_DEV_DIEPINT15_INTKNTXFEMP_E_INACT | 0x0 | No interrupt
84591  * ALT_USB_DEV_DIEPINT15_INTKNTXFEMP_E_ACT | 0x1 | IN Token Received Interrupt
84592  *
84593  * Field Access Macros:
84594  *
84595  */
84596 /*
84597  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_INTKNTXFEMP
84598  *
84599  * No interrupt
84600  */
84601 #define ALT_USB_DEV_DIEPINT15_INTKNTXFEMP_E_INACT 0x0
84602 /*
84603  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_INTKNTXFEMP
84604  *
84605  * IN Token Received Interrupt
84606  */
84607 #define ALT_USB_DEV_DIEPINT15_INTKNTXFEMP_E_ACT 0x1
84608 
84609 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_INTKNTXFEMP register field. */
84610 #define ALT_USB_DEV_DIEPINT15_INTKNTXFEMP_LSB 4
84611 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_INTKNTXFEMP register field. */
84612 #define ALT_USB_DEV_DIEPINT15_INTKNTXFEMP_MSB 4
84613 /* The width in bits of the ALT_USB_DEV_DIEPINT15_INTKNTXFEMP register field. */
84614 #define ALT_USB_DEV_DIEPINT15_INTKNTXFEMP_WIDTH 1
84615 /* The mask used to set the ALT_USB_DEV_DIEPINT15_INTKNTXFEMP register field value. */
84616 #define ALT_USB_DEV_DIEPINT15_INTKNTXFEMP_SET_MSK 0x00000010
84617 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_INTKNTXFEMP register field value. */
84618 #define ALT_USB_DEV_DIEPINT15_INTKNTXFEMP_CLR_MSK 0xffffffef
84619 /* The reset value of the ALT_USB_DEV_DIEPINT15_INTKNTXFEMP register field. */
84620 #define ALT_USB_DEV_DIEPINT15_INTKNTXFEMP_RESET 0x0
84621 /* Extracts the ALT_USB_DEV_DIEPINT15_INTKNTXFEMP field value from a register. */
84622 #define ALT_USB_DEV_DIEPINT15_INTKNTXFEMP_GET(value) (((value) & 0x00000010) >> 4)
84623 /* Produces a ALT_USB_DEV_DIEPINT15_INTKNTXFEMP register field value suitable for setting the register. */
84624 #define ALT_USB_DEV_DIEPINT15_INTKNTXFEMP_SET(value) (((value) << 4) & 0x00000010)
84625 
84626 /*
84627  * Field : IN Token Received with EP Mismatch - intknepmis
84628  *
84629  * Applies to non-periodic IN endpoints only. Indicates that the data in the top of
84630  * the non-periodic TxFIFO belongs to an endpoint other than the one for which the
84631  * IN token was received. This interrupt is asserted on the endpoint for which the
84632  * IN token was received.
84633  *
84634  * Field Enumeration Values:
84635  *
84636  * Enum | Value | Description
84637  * :-----------------------------------------|:------|:---------------------------------------------
84638  * ALT_USB_DEV_DIEPINT15_INTKNEPMIS_E_INACT | 0x0 | No interrupt
84639  * ALT_USB_DEV_DIEPINT15_INTKNEPMIS_E_ACT | 0x1 | IN Token Received with EP Mismatch interrupt
84640  *
84641  * Field Access Macros:
84642  *
84643  */
84644 /*
84645  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_INTKNEPMIS
84646  *
84647  * No interrupt
84648  */
84649 #define ALT_USB_DEV_DIEPINT15_INTKNEPMIS_E_INACT 0x0
84650 /*
84651  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_INTKNEPMIS
84652  *
84653  * IN Token Received with EP Mismatch interrupt
84654  */
84655 #define ALT_USB_DEV_DIEPINT15_INTKNEPMIS_E_ACT 0x1
84656 
84657 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_INTKNEPMIS register field. */
84658 #define ALT_USB_DEV_DIEPINT15_INTKNEPMIS_LSB 5
84659 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_INTKNEPMIS register field. */
84660 #define ALT_USB_DEV_DIEPINT15_INTKNEPMIS_MSB 5
84661 /* The width in bits of the ALT_USB_DEV_DIEPINT15_INTKNEPMIS register field. */
84662 #define ALT_USB_DEV_DIEPINT15_INTKNEPMIS_WIDTH 1
84663 /* The mask used to set the ALT_USB_DEV_DIEPINT15_INTKNEPMIS register field value. */
84664 #define ALT_USB_DEV_DIEPINT15_INTKNEPMIS_SET_MSK 0x00000020
84665 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_INTKNEPMIS register field value. */
84666 #define ALT_USB_DEV_DIEPINT15_INTKNEPMIS_CLR_MSK 0xffffffdf
84667 /* The reset value of the ALT_USB_DEV_DIEPINT15_INTKNEPMIS register field. */
84668 #define ALT_USB_DEV_DIEPINT15_INTKNEPMIS_RESET 0x0
84669 /* Extracts the ALT_USB_DEV_DIEPINT15_INTKNEPMIS field value from a register. */
84670 #define ALT_USB_DEV_DIEPINT15_INTKNEPMIS_GET(value) (((value) & 0x00000020) >> 5)
84671 /* Produces a ALT_USB_DEV_DIEPINT15_INTKNEPMIS register field value suitable for setting the register. */
84672 #define ALT_USB_DEV_DIEPINT15_INTKNEPMIS_SET(value) (((value) << 5) & 0x00000020)
84673 
84674 /*
84675  * Field : IN Endpoint NAK Effective - inepnakeff
84676  *
84677  * Applies to periodic IN endpoints only. This bit can be cleared when the
84678  * application clears the IN endpoint NAK by writing to DIEPCTLn.CNAK. This
84679  * interrupt indicates that the core has sampled the NAK bit Set (either by the
84680  * application or by the core). The interrupt indicates that the IN endpoint NAK
84681  * bit Set by the application has taken effect in the core.This interrupt does not
84682  * guarantee that a NAK handshake is sent on the USB. A STALL bit takes priority
84683  * over a NAK bit.
84684  *
84685  * Field Enumeration Values:
84686  *
84687  * Enum | Value | Description
84688  * :-----------------------------------------|:------|:------------------------------------
84689  * ALT_USB_DEV_DIEPINT15_INEPNAKEFF_E_INACT | 0x0 | No interrupt
84690  * ALT_USB_DEV_DIEPINT15_INEPNAKEFF_E_ACT | 0x1 | IN Endpoint NAK Effective interrupt
84691  *
84692  * Field Access Macros:
84693  *
84694  */
84695 /*
84696  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_INEPNAKEFF
84697  *
84698  * No interrupt
84699  */
84700 #define ALT_USB_DEV_DIEPINT15_INEPNAKEFF_E_INACT 0x0
84701 /*
84702  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_INEPNAKEFF
84703  *
84704  * IN Endpoint NAK Effective interrupt
84705  */
84706 #define ALT_USB_DEV_DIEPINT15_INEPNAKEFF_E_ACT 0x1
84707 
84708 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_INEPNAKEFF register field. */
84709 #define ALT_USB_DEV_DIEPINT15_INEPNAKEFF_LSB 6
84710 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_INEPNAKEFF register field. */
84711 #define ALT_USB_DEV_DIEPINT15_INEPNAKEFF_MSB 6
84712 /* The width in bits of the ALT_USB_DEV_DIEPINT15_INEPNAKEFF register field. */
84713 #define ALT_USB_DEV_DIEPINT15_INEPNAKEFF_WIDTH 1
84714 /* The mask used to set the ALT_USB_DEV_DIEPINT15_INEPNAKEFF register field value. */
84715 #define ALT_USB_DEV_DIEPINT15_INEPNAKEFF_SET_MSK 0x00000040
84716 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_INEPNAKEFF register field value. */
84717 #define ALT_USB_DEV_DIEPINT15_INEPNAKEFF_CLR_MSK 0xffffffbf
84718 /* The reset value of the ALT_USB_DEV_DIEPINT15_INEPNAKEFF register field. */
84719 #define ALT_USB_DEV_DIEPINT15_INEPNAKEFF_RESET 0x0
84720 /* Extracts the ALT_USB_DEV_DIEPINT15_INEPNAKEFF field value from a register. */
84721 #define ALT_USB_DEV_DIEPINT15_INEPNAKEFF_GET(value) (((value) & 0x00000040) >> 6)
84722 /* Produces a ALT_USB_DEV_DIEPINT15_INEPNAKEFF register field value suitable for setting the register. */
84723 #define ALT_USB_DEV_DIEPINT15_INEPNAKEFF_SET(value) (((value) << 6) & 0x00000040)
84724 
84725 /*
84726  * Field : Transmit FIFO Empty - txfemp
84727  *
84728  * This bit is valid only for IN Endpoints This interrupt is asserted when the
84729  * TxFIFO for this endpoint is either half or completely empty. The half or
84730  * completely empty status is determined by the TxFIFO Empty Level bit in the Core
84731  * AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
84732  *
84733  * Field Enumeration Values:
84734  *
84735  * Enum | Value | Description
84736  * :-------------------------------------|:------|:------------------------------
84737  * ALT_USB_DEV_DIEPINT15_TXFEMP_E_INACT | 0x0 | No interrupt
84738  * ALT_USB_DEV_DIEPINT15_TXFEMP_E_ACT | 0x1 | Transmit FIFO Empty interrupt
84739  *
84740  * Field Access Macros:
84741  *
84742  */
84743 /*
84744  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_TXFEMP
84745  *
84746  * No interrupt
84747  */
84748 #define ALT_USB_DEV_DIEPINT15_TXFEMP_E_INACT 0x0
84749 /*
84750  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_TXFEMP
84751  *
84752  * Transmit FIFO Empty interrupt
84753  */
84754 #define ALT_USB_DEV_DIEPINT15_TXFEMP_E_ACT 0x1
84755 
84756 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_TXFEMP register field. */
84757 #define ALT_USB_DEV_DIEPINT15_TXFEMP_LSB 7
84758 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_TXFEMP register field. */
84759 #define ALT_USB_DEV_DIEPINT15_TXFEMP_MSB 7
84760 /* The width in bits of the ALT_USB_DEV_DIEPINT15_TXFEMP register field. */
84761 #define ALT_USB_DEV_DIEPINT15_TXFEMP_WIDTH 1
84762 /* The mask used to set the ALT_USB_DEV_DIEPINT15_TXFEMP register field value. */
84763 #define ALT_USB_DEV_DIEPINT15_TXFEMP_SET_MSK 0x00000080
84764 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_TXFEMP register field value. */
84765 #define ALT_USB_DEV_DIEPINT15_TXFEMP_CLR_MSK 0xffffff7f
84766 /* The reset value of the ALT_USB_DEV_DIEPINT15_TXFEMP register field. */
84767 #define ALT_USB_DEV_DIEPINT15_TXFEMP_RESET 0x1
84768 /* Extracts the ALT_USB_DEV_DIEPINT15_TXFEMP field value from a register. */
84769 #define ALT_USB_DEV_DIEPINT15_TXFEMP_GET(value) (((value) & 0x00000080) >> 7)
84770 /* Produces a ALT_USB_DEV_DIEPINT15_TXFEMP register field value suitable for setting the register. */
84771 #define ALT_USB_DEV_DIEPINT15_TXFEMP_SET(value) (((value) << 7) & 0x00000080)
84772 
84773 /*
84774  * Field : Fifo Underrun - txfifoundrn
84775  *
84776  * Applies to IN endpoints Only. The core generates this interrupt when it detects
84777  * a transmit FIFO underrun condition for this endpoint.
84778  *
84779  * Field Enumeration Values:
84780  *
84781  * Enum | Value | Description
84782  * :------------------------------------------|:------|:------------------------
84783  * ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN_E_INACT | 0x0 | No interrupt
84784  * ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN_E_ACT | 0x1 | Fifo Underrun interrupt
84785  *
84786  * Field Access Macros:
84787  *
84788  */
84789 /*
84790  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN
84791  *
84792  * No interrupt
84793  */
84794 #define ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN_E_INACT 0x0
84795 /*
84796  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN
84797  *
84798  * Fifo Underrun interrupt
84799  */
84800 #define ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN_E_ACT 0x1
84801 
84802 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN register field. */
84803 #define ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN_LSB 8
84804 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN register field. */
84805 #define ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN_MSB 8
84806 /* The width in bits of the ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN register field. */
84807 #define ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN_WIDTH 1
84808 /* The mask used to set the ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN register field value. */
84809 #define ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN_SET_MSK 0x00000100
84810 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN register field value. */
84811 #define ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN_CLR_MSK 0xfffffeff
84812 /* The reset value of the ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN register field. */
84813 #define ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN_RESET 0x0
84814 /* Extracts the ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN field value from a register. */
84815 #define ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN_GET(value) (((value) & 0x00000100) >> 8)
84816 /* Produces a ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN register field value suitable for setting the register. */
84817 #define ALT_USB_DEV_DIEPINT15_TXFIFOUNDRN_SET(value) (((value) << 8) & 0x00000100)
84818 
84819 /*
84820  * Field : BNA Interrupt - bnaintr
84821  *
84822  * This bit is valid only when Scatter/Gather DMA mode is enabled. The core
84823  * generates this interrupt when the descriptor accessed is not ready for the Core
84824  * to process, such as Host busy or DMA done
84825  *
84826  * Field Enumeration Values:
84827  *
84828  * Enum | Value | Description
84829  * :--------------------------------------|:------|:--------------
84830  * ALT_USB_DEV_DIEPINT15_BNAINTR_E_INACT | 0x0 | No interrupt
84831  * ALT_USB_DEV_DIEPINT15_BNAINTR_E_ACT | 0x1 | BNA interrupt
84832  *
84833  * Field Access Macros:
84834  *
84835  */
84836 /*
84837  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_BNAINTR
84838  *
84839  * No interrupt
84840  */
84841 #define ALT_USB_DEV_DIEPINT15_BNAINTR_E_INACT 0x0
84842 /*
84843  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_BNAINTR
84844  *
84845  * BNA interrupt
84846  */
84847 #define ALT_USB_DEV_DIEPINT15_BNAINTR_E_ACT 0x1
84848 
84849 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_BNAINTR register field. */
84850 #define ALT_USB_DEV_DIEPINT15_BNAINTR_LSB 9
84851 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_BNAINTR register field. */
84852 #define ALT_USB_DEV_DIEPINT15_BNAINTR_MSB 9
84853 /* The width in bits of the ALT_USB_DEV_DIEPINT15_BNAINTR register field. */
84854 #define ALT_USB_DEV_DIEPINT15_BNAINTR_WIDTH 1
84855 /* The mask used to set the ALT_USB_DEV_DIEPINT15_BNAINTR register field value. */
84856 #define ALT_USB_DEV_DIEPINT15_BNAINTR_SET_MSK 0x00000200
84857 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_BNAINTR register field value. */
84858 #define ALT_USB_DEV_DIEPINT15_BNAINTR_CLR_MSK 0xfffffdff
84859 /* The reset value of the ALT_USB_DEV_DIEPINT15_BNAINTR register field. */
84860 #define ALT_USB_DEV_DIEPINT15_BNAINTR_RESET 0x0
84861 /* Extracts the ALT_USB_DEV_DIEPINT15_BNAINTR field value from a register. */
84862 #define ALT_USB_DEV_DIEPINT15_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
84863 /* Produces a ALT_USB_DEV_DIEPINT15_BNAINTR register field value suitable for setting the register. */
84864 #define ALT_USB_DEV_DIEPINT15_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
84865 
84866 /*
84867  * Field : Packet Drop Status - pktdrpsts
84868  *
84869  * This bit indicates to the application that an ISOC OUT packet has been dropped.
84870  * This bit does not have an associated mask bit and does not generate an
84871  * interrupt.
84872  *
84873  * Field Enumeration Values:
84874  *
84875  * Enum | Value | Description
84876  * :----------------------------------------|:------|:-----------------------------
84877  * ALT_USB_DEV_DIEPINT15_PKTDRPSTS_E_INACT | 0x0 | No interrupt
84878  * ALT_USB_DEV_DIEPINT15_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
84879  *
84880  * Field Access Macros:
84881  *
84882  */
84883 /*
84884  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_PKTDRPSTS
84885  *
84886  * No interrupt
84887  */
84888 #define ALT_USB_DEV_DIEPINT15_PKTDRPSTS_E_INACT 0x0
84889 /*
84890  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_PKTDRPSTS
84891  *
84892  * Packet Drop Status interrupt
84893  */
84894 #define ALT_USB_DEV_DIEPINT15_PKTDRPSTS_E_ACT 0x1
84895 
84896 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_PKTDRPSTS register field. */
84897 #define ALT_USB_DEV_DIEPINT15_PKTDRPSTS_LSB 11
84898 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_PKTDRPSTS register field. */
84899 #define ALT_USB_DEV_DIEPINT15_PKTDRPSTS_MSB 11
84900 /* The width in bits of the ALT_USB_DEV_DIEPINT15_PKTDRPSTS register field. */
84901 #define ALT_USB_DEV_DIEPINT15_PKTDRPSTS_WIDTH 1
84902 /* The mask used to set the ALT_USB_DEV_DIEPINT15_PKTDRPSTS register field value. */
84903 #define ALT_USB_DEV_DIEPINT15_PKTDRPSTS_SET_MSK 0x00000800
84904 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_PKTDRPSTS register field value. */
84905 #define ALT_USB_DEV_DIEPINT15_PKTDRPSTS_CLR_MSK 0xfffff7ff
84906 /* The reset value of the ALT_USB_DEV_DIEPINT15_PKTDRPSTS register field. */
84907 #define ALT_USB_DEV_DIEPINT15_PKTDRPSTS_RESET 0x0
84908 /* Extracts the ALT_USB_DEV_DIEPINT15_PKTDRPSTS field value from a register. */
84909 #define ALT_USB_DEV_DIEPINT15_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
84910 /* Produces a ALT_USB_DEV_DIEPINT15_PKTDRPSTS register field value suitable for setting the register. */
84911 #define ALT_USB_DEV_DIEPINT15_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
84912 
84913 /*
84914  * Field : BbleErr Interrupt - bbleerr
84915  *
84916  * The core generates this interrupt when babble is received for the endpoint.
84917  *
84918  * Field Enumeration Values:
84919  *
84920  * Enum | Value | Description
84921  * :--------------------------------------|:------|:------------------
84922  * ALT_USB_DEV_DIEPINT15_BBLEERR_E_INACT | 0x0 | No interrupt
84923  * ALT_USB_DEV_DIEPINT15_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
84924  *
84925  * Field Access Macros:
84926  *
84927  */
84928 /*
84929  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_BBLEERR
84930  *
84931  * No interrupt
84932  */
84933 #define ALT_USB_DEV_DIEPINT15_BBLEERR_E_INACT 0x0
84934 /*
84935  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_BBLEERR
84936  *
84937  * BbleErr interrupt
84938  */
84939 #define ALT_USB_DEV_DIEPINT15_BBLEERR_E_ACT 0x1
84940 
84941 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_BBLEERR register field. */
84942 #define ALT_USB_DEV_DIEPINT15_BBLEERR_LSB 12
84943 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_BBLEERR register field. */
84944 #define ALT_USB_DEV_DIEPINT15_BBLEERR_MSB 12
84945 /* The width in bits of the ALT_USB_DEV_DIEPINT15_BBLEERR register field. */
84946 #define ALT_USB_DEV_DIEPINT15_BBLEERR_WIDTH 1
84947 /* The mask used to set the ALT_USB_DEV_DIEPINT15_BBLEERR register field value. */
84948 #define ALT_USB_DEV_DIEPINT15_BBLEERR_SET_MSK 0x00001000
84949 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_BBLEERR register field value. */
84950 #define ALT_USB_DEV_DIEPINT15_BBLEERR_CLR_MSK 0xffffefff
84951 /* The reset value of the ALT_USB_DEV_DIEPINT15_BBLEERR register field. */
84952 #define ALT_USB_DEV_DIEPINT15_BBLEERR_RESET 0x0
84953 /* Extracts the ALT_USB_DEV_DIEPINT15_BBLEERR field value from a register. */
84954 #define ALT_USB_DEV_DIEPINT15_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
84955 /* Produces a ALT_USB_DEV_DIEPINT15_BBLEERR register field value suitable for setting the register. */
84956 #define ALT_USB_DEV_DIEPINT15_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
84957 
84958 /*
84959  * Field : NAK Interrupt - nakintrpt
84960  *
84961  * The core generates this interrupt when a NAK is transmitted or received by the
84962  * device. In case of isochronous IN endpoints the interrupt gets generated when a
84963  * zero length packet is transmitted due to un-availability of data in the TXFifo.
84964  *
84965  * Field Enumeration Values:
84966  *
84967  * Enum | Value | Description
84968  * :----------------------------------------|:------|:--------------
84969  * ALT_USB_DEV_DIEPINT15_NAKINTRPT_E_INACT | 0x0 | No interrupt
84970  * ALT_USB_DEV_DIEPINT15_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
84971  *
84972  * Field Access Macros:
84973  *
84974  */
84975 /*
84976  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_NAKINTRPT
84977  *
84978  * No interrupt
84979  */
84980 #define ALT_USB_DEV_DIEPINT15_NAKINTRPT_E_INACT 0x0
84981 /*
84982  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_NAKINTRPT
84983  *
84984  * NAK Interrupt
84985  */
84986 #define ALT_USB_DEV_DIEPINT15_NAKINTRPT_E_ACT 0x1
84987 
84988 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_NAKINTRPT register field. */
84989 #define ALT_USB_DEV_DIEPINT15_NAKINTRPT_LSB 13
84990 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_NAKINTRPT register field. */
84991 #define ALT_USB_DEV_DIEPINT15_NAKINTRPT_MSB 13
84992 /* The width in bits of the ALT_USB_DEV_DIEPINT15_NAKINTRPT register field. */
84993 #define ALT_USB_DEV_DIEPINT15_NAKINTRPT_WIDTH 1
84994 /* The mask used to set the ALT_USB_DEV_DIEPINT15_NAKINTRPT register field value. */
84995 #define ALT_USB_DEV_DIEPINT15_NAKINTRPT_SET_MSK 0x00002000
84996 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_NAKINTRPT register field value. */
84997 #define ALT_USB_DEV_DIEPINT15_NAKINTRPT_CLR_MSK 0xffffdfff
84998 /* The reset value of the ALT_USB_DEV_DIEPINT15_NAKINTRPT register field. */
84999 #define ALT_USB_DEV_DIEPINT15_NAKINTRPT_RESET 0x0
85000 /* Extracts the ALT_USB_DEV_DIEPINT15_NAKINTRPT field value from a register. */
85001 #define ALT_USB_DEV_DIEPINT15_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
85002 /* Produces a ALT_USB_DEV_DIEPINT15_NAKINTRPT register field value suitable for setting the register. */
85003 #define ALT_USB_DEV_DIEPINT15_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
85004 
85005 /*
85006  * Field : NYET Interrupt - nyetintrpt
85007  *
85008  * The core generates this interrupt when a NYET response is transmitted for a non
85009  * isochronous OUT endpoint.
85010  *
85011  * Field Enumeration Values:
85012  *
85013  * Enum | Value | Description
85014  * :-----------------------------------------|:------|:---------------
85015  * ALT_USB_DEV_DIEPINT15_NYETINTRPT_E_INACT | 0x0 | No interrupt
85016  * ALT_USB_DEV_DIEPINT15_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
85017  *
85018  * Field Access Macros:
85019  *
85020  */
85021 /*
85022  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_NYETINTRPT
85023  *
85024  * No interrupt
85025  */
85026 #define ALT_USB_DEV_DIEPINT15_NYETINTRPT_E_INACT 0x0
85027 /*
85028  * Enumerated value for register field ALT_USB_DEV_DIEPINT15_NYETINTRPT
85029  *
85030  * NYET Interrupt
85031  */
85032 #define ALT_USB_DEV_DIEPINT15_NYETINTRPT_E_ACT 0x1
85033 
85034 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPINT15_NYETINTRPT register field. */
85035 #define ALT_USB_DEV_DIEPINT15_NYETINTRPT_LSB 14
85036 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPINT15_NYETINTRPT register field. */
85037 #define ALT_USB_DEV_DIEPINT15_NYETINTRPT_MSB 14
85038 /* The width in bits of the ALT_USB_DEV_DIEPINT15_NYETINTRPT register field. */
85039 #define ALT_USB_DEV_DIEPINT15_NYETINTRPT_WIDTH 1
85040 /* The mask used to set the ALT_USB_DEV_DIEPINT15_NYETINTRPT register field value. */
85041 #define ALT_USB_DEV_DIEPINT15_NYETINTRPT_SET_MSK 0x00004000
85042 /* The mask used to clear the ALT_USB_DEV_DIEPINT15_NYETINTRPT register field value. */
85043 #define ALT_USB_DEV_DIEPINT15_NYETINTRPT_CLR_MSK 0xffffbfff
85044 /* The reset value of the ALT_USB_DEV_DIEPINT15_NYETINTRPT register field. */
85045 #define ALT_USB_DEV_DIEPINT15_NYETINTRPT_RESET 0x0
85046 /* Extracts the ALT_USB_DEV_DIEPINT15_NYETINTRPT field value from a register. */
85047 #define ALT_USB_DEV_DIEPINT15_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
85048 /* Produces a ALT_USB_DEV_DIEPINT15_NYETINTRPT register field value suitable for setting the register. */
85049 #define ALT_USB_DEV_DIEPINT15_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
85050 
85051 #ifndef __ASSEMBLY__
85052 /*
85053  * WARNING: The C register and register group struct declarations are provided for
85054  * convenience and illustrative purposes. They should, however, be used with
85055  * caution as the C language standard provides no guarantees about the alignment or
85056  * atomicity of device memory accesses. The recommended practice for writing
85057  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
85058  * alt_write_word() functions.
85059  *
85060  * The struct declaration for register ALT_USB_DEV_DIEPINT15.
85061  */
85062 struct ALT_USB_DEV_DIEPINT15_s
85063 {
85064  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
85065  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
85066  const uint32_t ahberr : 1; /* AHB Error */
85067  const uint32_t timeout : 1; /* Timeout Condition */
85068  const uint32_t intkntxfemp : 1; /* IN Token Received When TxFIFO is Empty */
85069  const uint32_t intknepmis : 1; /* IN Token Received with EP Mismatch */
85070  const uint32_t inepnakeff : 1; /* IN Endpoint NAK Effective */
85071  const uint32_t txfemp : 1; /* Transmit FIFO Empty */
85072  const uint32_t txfifoundrn : 1; /* Fifo Underrun */
85073  const uint32_t bnaintr : 1; /* BNA Interrupt */
85074  uint32_t : 1; /* *UNDEFINED* */
85075  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
85076  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
85077  const uint32_t nakintrpt : 1; /* NAK Interrupt */
85078  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
85079  uint32_t : 17; /* *UNDEFINED* */
85080 };
85081 
85082 /* The typedef declaration for register ALT_USB_DEV_DIEPINT15. */
85083 typedef volatile struct ALT_USB_DEV_DIEPINT15_s ALT_USB_DEV_DIEPINT15_t;
85084 #endif /* __ASSEMBLY__ */
85085 
85086 /* The byte offset of the ALT_USB_DEV_DIEPINT15 register from the beginning of the component. */
85087 #define ALT_USB_DEV_DIEPINT15_OFST 0x2e8
85088 /* The address of the ALT_USB_DEV_DIEPINT15 register. */
85089 #define ALT_USB_DEV_DIEPINT15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPINT15_OFST))
85090 
85091 /*
85092  * Register : Device IN Endpoint 15 Transfer Size Register - dieptsiz15
85093  *
85094  * The application must modify this register before enabling the endpoint. Once the
85095  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
85096  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
85097  * application can only read this register once the core has cleared the Endpoint
85098  * Enable bit.
85099  *
85100  * Register Layout
85101  *
85102  * Bits | Access | Reset | Description
85103  * :--------|:-------|:------|:----------------------------
85104  * [18:0] | RW | 0x0 | Transfer Size
85105  * [28:19] | RW | 0x0 | Packet Count
85106  * [30:29] | RW | 0x0 | Applies to IN endpoints onl
85107  * [31] | ??? | 0x0 | *UNDEFINED*
85108  *
85109  */
85110 /*
85111  * Field : Transfer Size - xfersize
85112  *
85113  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
85114  * application only after it has exhausted the transfer size amount of data. The
85115  * transfer size can be Set to the maximum packet size of the endpoint, to be
85116  * interrupted at the end of each packet. The core decrements this field every time
85117  * a packet from the external memory is written to the TxFIFO.
85118  *
85119  * Field Access Macros:
85120  *
85121  */
85122 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ15_XFERSIZE register field. */
85123 #define ALT_USB_DEV_DIEPTSIZ15_XFERSIZE_LSB 0
85124 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ15_XFERSIZE register field. */
85125 #define ALT_USB_DEV_DIEPTSIZ15_XFERSIZE_MSB 18
85126 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ15_XFERSIZE register field. */
85127 #define ALT_USB_DEV_DIEPTSIZ15_XFERSIZE_WIDTH 19
85128 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ15_XFERSIZE register field value. */
85129 #define ALT_USB_DEV_DIEPTSIZ15_XFERSIZE_SET_MSK 0x0007ffff
85130 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ15_XFERSIZE register field value. */
85131 #define ALT_USB_DEV_DIEPTSIZ15_XFERSIZE_CLR_MSK 0xfff80000
85132 /* The reset value of the ALT_USB_DEV_DIEPTSIZ15_XFERSIZE register field. */
85133 #define ALT_USB_DEV_DIEPTSIZ15_XFERSIZE_RESET 0x0
85134 /* Extracts the ALT_USB_DEV_DIEPTSIZ15_XFERSIZE field value from a register. */
85135 #define ALT_USB_DEV_DIEPTSIZ15_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
85136 /* Produces a ALT_USB_DEV_DIEPTSIZ15_XFERSIZE register field value suitable for setting the register. */
85137 #define ALT_USB_DEV_DIEPTSIZ15_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
85138 
85139 /*
85140  * Field : Packet Count - PktCnt
85141  *
85142  * Indicates the total number of USB packets that constitute the Transfer Size
85143  * amount of data for endpoint 0.This field is decremented every time a packet
85144  * (maximum size or short packet) is read from the TxFIFO.
85145  *
85146  * Field Access Macros:
85147  *
85148  */
85149 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ15_PKTCNT register field. */
85150 #define ALT_USB_DEV_DIEPTSIZ15_PKTCNT_LSB 19
85151 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ15_PKTCNT register field. */
85152 #define ALT_USB_DEV_DIEPTSIZ15_PKTCNT_MSB 28
85153 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ15_PKTCNT register field. */
85154 #define ALT_USB_DEV_DIEPTSIZ15_PKTCNT_WIDTH 10
85155 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ15_PKTCNT register field value. */
85156 #define ALT_USB_DEV_DIEPTSIZ15_PKTCNT_SET_MSK 0x1ff80000
85157 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ15_PKTCNT register field value. */
85158 #define ALT_USB_DEV_DIEPTSIZ15_PKTCNT_CLR_MSK 0xe007ffff
85159 /* The reset value of the ALT_USB_DEV_DIEPTSIZ15_PKTCNT register field. */
85160 #define ALT_USB_DEV_DIEPTSIZ15_PKTCNT_RESET 0x0
85161 /* Extracts the ALT_USB_DEV_DIEPTSIZ15_PKTCNT field value from a register. */
85162 #define ALT_USB_DEV_DIEPTSIZ15_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
85163 /* Produces a ALT_USB_DEV_DIEPTSIZ15_PKTCNT register field value suitable for setting the register. */
85164 #define ALT_USB_DEV_DIEPTSIZ15_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
85165 
85166 /*
85167  * Field : Applies to IN endpoints onl - mc
85168  *
85169  * for periodic IN endpoints, this field indicates the number of packets that must
85170  * be transmitted per microframe on the USB. The core uses this field to calculate
85171  * the data PID for isochronous IN endpoints. for non-periodic IN endpoints, this
85172  * field is valid only in Internal DMA mode. It specifies the number of packets the
85173  * core must fetchfor an IN endpoint before it switches to the endpoint pointed to
85174  * by the Next Endpoint field of the Device Endpoint-n Control register
85175  * (DIEPCTLn.NextEp)
85176  *
85177  * Field Enumeration Values:
85178  *
85179  * Enum | Value | Description
85180  * :-------------------------------------|:------|:------------
85181  * ALT_USB_DEV_DIEPTSIZ15_MC_E_PKTONE | 0x1 | 1 packet
85182  * ALT_USB_DEV_DIEPTSIZ15_MC_E_PKTTWO | 0x2 | 2 packets
85183  * ALT_USB_DEV_DIEPTSIZ15_MC_E_PKTTHREE | 0x3 | 3 packets
85184  *
85185  * Field Access Macros:
85186  *
85187  */
85188 /*
85189  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ15_MC
85190  *
85191  * 1 packet
85192  */
85193 #define ALT_USB_DEV_DIEPTSIZ15_MC_E_PKTONE 0x1
85194 /*
85195  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ15_MC
85196  *
85197  * 2 packets
85198  */
85199 #define ALT_USB_DEV_DIEPTSIZ15_MC_E_PKTTWO 0x2
85200 /*
85201  * Enumerated value for register field ALT_USB_DEV_DIEPTSIZ15_MC
85202  *
85203  * 3 packets
85204  */
85205 #define ALT_USB_DEV_DIEPTSIZ15_MC_E_PKTTHREE 0x3
85206 
85207 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPTSIZ15_MC register field. */
85208 #define ALT_USB_DEV_DIEPTSIZ15_MC_LSB 29
85209 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPTSIZ15_MC register field. */
85210 #define ALT_USB_DEV_DIEPTSIZ15_MC_MSB 30
85211 /* The width in bits of the ALT_USB_DEV_DIEPTSIZ15_MC register field. */
85212 #define ALT_USB_DEV_DIEPTSIZ15_MC_WIDTH 2
85213 /* The mask used to set the ALT_USB_DEV_DIEPTSIZ15_MC register field value. */
85214 #define ALT_USB_DEV_DIEPTSIZ15_MC_SET_MSK 0x60000000
85215 /* The mask used to clear the ALT_USB_DEV_DIEPTSIZ15_MC register field value. */
85216 #define ALT_USB_DEV_DIEPTSIZ15_MC_CLR_MSK 0x9fffffff
85217 /* The reset value of the ALT_USB_DEV_DIEPTSIZ15_MC register field. */
85218 #define ALT_USB_DEV_DIEPTSIZ15_MC_RESET 0x0
85219 /* Extracts the ALT_USB_DEV_DIEPTSIZ15_MC field value from a register. */
85220 #define ALT_USB_DEV_DIEPTSIZ15_MC_GET(value) (((value) & 0x60000000) >> 29)
85221 /* Produces a ALT_USB_DEV_DIEPTSIZ15_MC register field value suitable for setting the register. */
85222 #define ALT_USB_DEV_DIEPTSIZ15_MC_SET(value) (((value) << 29) & 0x60000000)
85223 
85224 #ifndef __ASSEMBLY__
85225 /*
85226  * WARNING: The C register and register group struct declarations are provided for
85227  * convenience and illustrative purposes. They should, however, be used with
85228  * caution as the C language standard provides no guarantees about the alignment or
85229  * atomicity of device memory accesses. The recommended practice for writing
85230  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
85231  * alt_write_word() functions.
85232  *
85233  * The struct declaration for register ALT_USB_DEV_DIEPTSIZ15.
85234  */
85235 struct ALT_USB_DEV_DIEPTSIZ15_s
85236 {
85237  uint32_t xfersize : 19; /* Transfer Size */
85238  uint32_t PktCnt : 10; /* Packet Count */
85239  uint32_t mc : 2; /* Applies to IN endpoints onl */
85240  uint32_t : 1; /* *UNDEFINED* */
85241 };
85242 
85243 /* The typedef declaration for register ALT_USB_DEV_DIEPTSIZ15. */
85244 typedef volatile struct ALT_USB_DEV_DIEPTSIZ15_s ALT_USB_DEV_DIEPTSIZ15_t;
85245 #endif /* __ASSEMBLY__ */
85246 
85247 /* The byte offset of the ALT_USB_DEV_DIEPTSIZ15 register from the beginning of the component. */
85248 #define ALT_USB_DEV_DIEPTSIZ15_OFST 0x2f0
85249 /* The address of the ALT_USB_DEV_DIEPTSIZ15 register. */
85250 #define ALT_USB_DEV_DIEPTSIZ15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPTSIZ15_OFST))
85251 
85252 /*
85253  * Register : Device IN Endpoint 15 DMA Address Register - diepdma15
85254  *
85255  * DMA Addressing.
85256  *
85257  * Register Layout
85258  *
85259  * Bits | Access | Reset | Description
85260  * :-------|:-------|:--------|:------------
85261  * [31:0] | RW | Unknown | DMA Address
85262  *
85263  */
85264 /*
85265  * Field : DMA Address - diepdma15
85266  *
85267  * Holds the start address of the external memory for storing or fetching endpoint
85268  * data. for control endpoints, this field stores control OUT data packets as well
85269  * as SETUP transaction data packets. When more than three SETUP packets are
85270  * received back-to-back, the SETUP data packet in the memory is overwritten. This
85271  * register is incremented on every AHB transaction. The application can give only
85272  * a DWORD-aligned address.
85273  *
85274  * When Scatter/Gather DMA mode is not enabled, the application programs the start
85275  * address value in this field.
85276  *
85277  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
85278  * for the descriptor list.
85279  *
85280  * Field Access Macros:
85281  *
85282  */
85283 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMA15_DIEPDMA15 register field. */
85284 #define ALT_USB_DEV_DIEPDMA15_DIEPDMA15_LSB 0
85285 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMA15_DIEPDMA15 register field. */
85286 #define ALT_USB_DEV_DIEPDMA15_DIEPDMA15_MSB 31
85287 /* The width in bits of the ALT_USB_DEV_DIEPDMA15_DIEPDMA15 register field. */
85288 #define ALT_USB_DEV_DIEPDMA15_DIEPDMA15_WIDTH 32
85289 /* The mask used to set the ALT_USB_DEV_DIEPDMA15_DIEPDMA15 register field value. */
85290 #define ALT_USB_DEV_DIEPDMA15_DIEPDMA15_SET_MSK 0xffffffff
85291 /* The mask used to clear the ALT_USB_DEV_DIEPDMA15_DIEPDMA15 register field value. */
85292 #define ALT_USB_DEV_DIEPDMA15_DIEPDMA15_CLR_MSK 0x00000000
85293 /* The reset value of the ALT_USB_DEV_DIEPDMA15_DIEPDMA15 register field is UNKNOWN. */
85294 #define ALT_USB_DEV_DIEPDMA15_DIEPDMA15_RESET 0x0
85295 /* Extracts the ALT_USB_DEV_DIEPDMA15_DIEPDMA15 field value from a register. */
85296 #define ALT_USB_DEV_DIEPDMA15_DIEPDMA15_GET(value) (((value) & 0xffffffff) >> 0)
85297 /* Produces a ALT_USB_DEV_DIEPDMA15_DIEPDMA15 register field value suitable for setting the register. */
85298 #define ALT_USB_DEV_DIEPDMA15_DIEPDMA15_SET(value) (((value) << 0) & 0xffffffff)
85299 
85300 #ifndef __ASSEMBLY__
85301 /*
85302  * WARNING: The C register and register group struct declarations are provided for
85303  * convenience and illustrative purposes. They should, however, be used with
85304  * caution as the C language standard provides no guarantees about the alignment or
85305  * atomicity of device memory accesses. The recommended practice for writing
85306  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
85307  * alt_write_word() functions.
85308  *
85309  * The struct declaration for register ALT_USB_DEV_DIEPDMA15.
85310  */
85311 struct ALT_USB_DEV_DIEPDMA15_s
85312 {
85313  uint32_t diepdma15 : 32; /* DMA Address */
85314 };
85315 
85316 /* The typedef declaration for register ALT_USB_DEV_DIEPDMA15. */
85317 typedef volatile struct ALT_USB_DEV_DIEPDMA15_s ALT_USB_DEV_DIEPDMA15_t;
85318 #endif /* __ASSEMBLY__ */
85319 
85320 /* The byte offset of the ALT_USB_DEV_DIEPDMA15 register from the beginning of the component. */
85321 #define ALT_USB_DEV_DIEPDMA15_OFST 0x2f4
85322 /* The address of the ALT_USB_DEV_DIEPDMA15 register. */
85323 #define ALT_USB_DEV_DIEPDMA15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMA15_OFST))
85324 
85325 /*
85326  * Register : Device IN Endpoint Transmit FIFO Status Register 15 - dtxfsts15
85327  *
85328  * This register contains the free space information for the Device IN endpoint
85329  * TxFIFO.
85330  *
85331  * Register Layout
85332  *
85333  * Bits | Access | Reset | Description
85334  * :--------|:-------|:-------|:-------------------------------
85335  * [15:0] | R | 0x2000 | IN Endpoint TxFIFO Space Avail
85336  * [31:16] | ??? | 0x0 | *UNDEFINED*
85337  *
85338  */
85339 /*
85340  * Field : IN Endpoint TxFIFO Space Avail - ineptxfspcavail
85341  *
85342  * Indicates the amount of free space available in the Endpoint TxFIFO. Values are
85343  * in terms of 32-bit words. 16'h0: Endpoint TxFIFO is full 16'h1: 1 word available
85344  * 16'h2: 2 words available 16'hn: n words available (where 0 n 32,768) 16'h8000:
85345  * 32,768 words available Others: Reserved
85346  *
85347  * Field Access Macros:
85348  *
85349  */
85350 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL register field. */
85351 #define ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL_LSB 0
85352 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL register field. */
85353 #define ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL_MSB 15
85354 /* The width in bits of the ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL register field. */
85355 #define ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL_WIDTH 16
85356 /* The mask used to set the ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL register field value. */
85357 #define ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL_SET_MSK 0x0000ffff
85358 /* The mask used to clear the ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL register field value. */
85359 #define ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL_CLR_MSK 0xffff0000
85360 /* The reset value of the ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL register field. */
85361 #define ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL_RESET 0x2000
85362 /* Extracts the ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL field value from a register. */
85363 #define ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL_GET(value) (((value) & 0x0000ffff) >> 0)
85364 /* Produces a ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL register field value suitable for setting the register. */
85365 #define ALT_USB_DEV_DTXFSTS15_INEPTXFSPCAVAIL_SET(value) (((value) << 0) & 0x0000ffff)
85366 
85367 #ifndef __ASSEMBLY__
85368 /*
85369  * WARNING: The C register and register group struct declarations are provided for
85370  * convenience and illustrative purposes. They should, however, be used with
85371  * caution as the C language standard provides no guarantees about the alignment or
85372  * atomicity of device memory accesses. The recommended practice for writing
85373  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
85374  * alt_write_word() functions.
85375  *
85376  * The struct declaration for register ALT_USB_DEV_DTXFSTS15.
85377  */
85378 struct ALT_USB_DEV_DTXFSTS15_s
85379 {
85380  const uint32_t ineptxfspcavail : 16; /* IN Endpoint TxFIFO Space Avail */
85381  uint32_t : 16; /* *UNDEFINED* */
85382 };
85383 
85384 /* The typedef declaration for register ALT_USB_DEV_DTXFSTS15. */
85385 typedef volatile struct ALT_USB_DEV_DTXFSTS15_s ALT_USB_DEV_DTXFSTS15_t;
85386 #endif /* __ASSEMBLY__ */
85387 
85388 /* The byte offset of the ALT_USB_DEV_DTXFSTS15 register from the beginning of the component. */
85389 #define ALT_USB_DEV_DTXFSTS15_OFST 0x2f8
85390 /* The address of the ALT_USB_DEV_DTXFSTS15 register. */
85391 #define ALT_USB_DEV_DTXFSTS15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DTXFSTS15_OFST))
85392 
85393 /*
85394  * Register : Device IN Endpoint 15 DMA Buffer Address Register - diepdmab15
85395  *
85396  * DMA Buffer Address.
85397  *
85398  * Register Layout
85399  *
85400  * Bits | Access | Reset | Description
85401  * :-------|:-------|:--------|:-------------------
85402  * [31:0] | R | Unknown | DMA Buffer Address
85403  *
85404  */
85405 /*
85406  * Field : DMA Buffer Address - diepdmab15
85407  *
85408  * Holds the current buffer address. This register is updated as and when the data
85409  * transfer for the corresponding end point is in progress. This register is
85410  * present only in Scatter/Gather DMA mode.
85411  *
85412  * Field Access Macros:
85413  *
85414  */
85415 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15 register field. */
85416 #define ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15_LSB 0
85417 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15 register field. */
85418 #define ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15_MSB 31
85419 /* The width in bits of the ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15 register field. */
85420 #define ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15_WIDTH 32
85421 /* The mask used to set the ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15 register field value. */
85422 #define ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15_SET_MSK 0xffffffff
85423 /* The mask used to clear the ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15 register field value. */
85424 #define ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15_CLR_MSK 0x00000000
85425 /* The reset value of the ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15 register field is UNKNOWN. */
85426 #define ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15_RESET 0x0
85427 /* Extracts the ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15 field value from a register. */
85428 #define ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15_GET(value) (((value) & 0xffffffff) >> 0)
85429 /* Produces a ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15 register field value suitable for setting the register. */
85430 #define ALT_USB_DEV_DIEPDMAB15_DIEPDMAB15_SET(value) (((value) << 0) & 0xffffffff)
85431 
85432 #ifndef __ASSEMBLY__
85433 /*
85434  * WARNING: The C register and register group struct declarations are provided for
85435  * convenience and illustrative purposes. They should, however, be used with
85436  * caution as the C language standard provides no guarantees about the alignment or
85437  * atomicity of device memory accesses. The recommended practice for writing
85438  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
85439  * alt_write_word() functions.
85440  *
85441  * The struct declaration for register ALT_USB_DEV_DIEPDMAB15.
85442  */
85443 struct ALT_USB_DEV_DIEPDMAB15_s
85444 {
85445  const uint32_t diepdmab15 : 32; /* DMA Buffer Address */
85446 };
85447 
85448 /* The typedef declaration for register ALT_USB_DEV_DIEPDMAB15. */
85449 typedef volatile struct ALT_USB_DEV_DIEPDMAB15_s ALT_USB_DEV_DIEPDMAB15_t;
85450 #endif /* __ASSEMBLY__ */
85451 
85452 /* The byte offset of the ALT_USB_DEV_DIEPDMAB15 register from the beginning of the component. */
85453 #define ALT_USB_DEV_DIEPDMAB15_OFST 0x2fc
85454 /* The address of the ALT_USB_DEV_DIEPDMAB15 register. */
85455 #define ALT_USB_DEV_DIEPDMAB15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPDMAB15_OFST))
85456 
85457 /*
85458  * Register : Device Control OUT Endpoint 0 Control Register - doepctl0
85459  *
85460  * This is Control OUT Endpoint 0 Control register.
85461  *
85462  * Register Layout
85463  *
85464  * Bits | Access | Reset | Description
85465  * :--------|:-------|:------|:--------------------
85466  * [1:0] | R | 0x0 | Maximum Packet Size
85467  * [14:2] | ??? | 0x0 | *UNDEFINED*
85468  * [15] | R | 0x1 | USB Active Endpoint
85469  * [16] | ??? | 0x0 | *UNDEFINED*
85470  * [17] | R | 0x0 | NAK Status
85471  * [19:18] | R | 0x0 | Endpoint Type
85472  * [20] | RW | 0x0 | Snoop Mode
85473  * [21] | R | 0x0 | STALL Handshake
85474  * [25:22] | ??? | 0x0 | *UNDEFINED*
85475  * [26] | W | 0x0 | Clear NAK
85476  * [27] | W | 0x0 | Set NAK
85477  * [29:28] | ??? | 0x0 | *UNDEFINED*
85478  * [30] | R | 0x0 | Endpoint Disable
85479  * [31] | R | 0x0 | Endpoint Enable
85480  *
85481  */
85482 /*
85483  * Field : Maximum Packet Size - mps
85484  *
85485  * The maximum packet size for control OUT endpoint 0 is thesame as what is
85486  * programmed in control IN Endpoint 0.
85487  *
85488  * Field Enumeration Values:
85489  *
85490  * Enum | Value | Description
85491  * :----------------------------------|:------|:------------
85492  * ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE64 | 0x0 | 64 bytes
85493  * ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE32 | 0x1 | 32 bytes
85494  * ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE16 | 0x2 | 16 bytes
85495  * ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE8 | 0x3 | 8 bytes
85496  *
85497  * Field Access Macros:
85498  *
85499  */
85500 /*
85501  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_MPS
85502  *
85503  * 64 bytes
85504  */
85505 #define ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE64 0x0
85506 /*
85507  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_MPS
85508  *
85509  * 32 bytes
85510  */
85511 #define ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE32 0x1
85512 /*
85513  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_MPS
85514  *
85515  * 16 bytes
85516  */
85517 #define ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE16 0x2
85518 /*
85519  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_MPS
85520  *
85521  * 8 bytes
85522  */
85523 #define ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE8 0x3
85524 
85525 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_MPS register field. */
85526 #define ALT_USB_DEV_DOEPCTL0_MPS_LSB 0
85527 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_MPS register field. */
85528 #define ALT_USB_DEV_DOEPCTL0_MPS_MSB 1
85529 /* The width in bits of the ALT_USB_DEV_DOEPCTL0_MPS register field. */
85530 #define ALT_USB_DEV_DOEPCTL0_MPS_WIDTH 2
85531 /* The mask used to set the ALT_USB_DEV_DOEPCTL0_MPS register field value. */
85532 #define ALT_USB_DEV_DOEPCTL0_MPS_SET_MSK 0x00000003
85533 /* The mask used to clear the ALT_USB_DEV_DOEPCTL0_MPS register field value. */
85534 #define ALT_USB_DEV_DOEPCTL0_MPS_CLR_MSK 0xfffffffc
85535 /* The reset value of the ALT_USB_DEV_DOEPCTL0_MPS register field. */
85536 #define ALT_USB_DEV_DOEPCTL0_MPS_RESET 0x0
85537 /* Extracts the ALT_USB_DEV_DOEPCTL0_MPS field value from a register. */
85538 #define ALT_USB_DEV_DOEPCTL0_MPS_GET(value) (((value) & 0x00000003) >> 0)
85539 /* Produces a ALT_USB_DEV_DOEPCTL0_MPS register field value suitable for setting the register. */
85540 #define ALT_USB_DEV_DOEPCTL0_MPS_SET(value) (((value) << 0) & 0x00000003)
85541 
85542 /*
85543  * Field : USB Active Endpoint - usbactep
85544  *
85545  * This bit is always Set to 1, indicating that a control endpoint 0 is always
85546  * active in all configurations and interfaces.
85547  *
85548  * Field Enumeration Values:
85549  *
85550  * Enum | Value | Description
85551  * :------------------------------------|:------|:----------------------
85552  * ALT_USB_DEV_DOEPCTL0_USBACTEP_E_ACT | 0x1 | USB Active Endpoint 0
85553  *
85554  * Field Access Macros:
85555  *
85556  */
85557 /*
85558  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_USBACTEP
85559  *
85560  * USB Active Endpoint 0
85561  */
85562 #define ALT_USB_DEV_DOEPCTL0_USBACTEP_E_ACT 0x1
85563 
85564 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_USBACTEP register field. */
85565 #define ALT_USB_DEV_DOEPCTL0_USBACTEP_LSB 15
85566 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_USBACTEP register field. */
85567 #define ALT_USB_DEV_DOEPCTL0_USBACTEP_MSB 15
85568 /* The width in bits of the ALT_USB_DEV_DOEPCTL0_USBACTEP register field. */
85569 #define ALT_USB_DEV_DOEPCTL0_USBACTEP_WIDTH 1
85570 /* The mask used to set the ALT_USB_DEV_DOEPCTL0_USBACTEP register field value. */
85571 #define ALT_USB_DEV_DOEPCTL0_USBACTEP_SET_MSK 0x00008000
85572 /* The mask used to clear the ALT_USB_DEV_DOEPCTL0_USBACTEP register field value. */
85573 #define ALT_USB_DEV_DOEPCTL0_USBACTEP_CLR_MSK 0xffff7fff
85574 /* The reset value of the ALT_USB_DEV_DOEPCTL0_USBACTEP register field. */
85575 #define ALT_USB_DEV_DOEPCTL0_USBACTEP_RESET 0x1
85576 /* Extracts the ALT_USB_DEV_DOEPCTL0_USBACTEP field value from a register. */
85577 #define ALT_USB_DEV_DOEPCTL0_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
85578 /* Produces a ALT_USB_DEV_DOEPCTL0_USBACTEP register field value suitable for setting the register. */
85579 #define ALT_USB_DEV_DOEPCTL0_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
85580 
85581 /*
85582  * Field : NAK Status - naksts
85583  *
85584  * When either the application or the core sets this bit, the core stops receiving
85585  * data, even If there is space in the RxFIFO to accommodate the incoming packet.
85586  * Irrespective of this bit's setting, the core always responds to SETUP data
85587  * packets with an ACK handshake.
85588  *
85589  * Field Enumeration Values:
85590  *
85591  * Enum | Value | Description
85592  * :------------------------------------|:------|:------------------------------------------------
85593  * ALT_USB_DEV_DOEPCTL0_NAKSTS_E_INACT | 0x0 | The core is transmitting non-NAK handshakes
85594  * : | | based on the FIFO status
85595  * ALT_USB_DEV_DOEPCTL0_NAKSTS_E_ACT | 0x1 | The core is transmitting NAK handshakes on this
85596  * : | | endpoint
85597  *
85598  * Field Access Macros:
85599  *
85600  */
85601 /*
85602  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_NAKSTS
85603  *
85604  * The core is transmitting non-NAK handshakes based on the FIFO status
85605  */
85606 #define ALT_USB_DEV_DOEPCTL0_NAKSTS_E_INACT 0x0
85607 /*
85608  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_NAKSTS
85609  *
85610  * The core is transmitting NAK handshakes on this endpoint
85611  */
85612 #define ALT_USB_DEV_DOEPCTL0_NAKSTS_E_ACT 0x1
85613 
85614 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_NAKSTS register field. */
85615 #define ALT_USB_DEV_DOEPCTL0_NAKSTS_LSB 17
85616 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_NAKSTS register field. */
85617 #define ALT_USB_DEV_DOEPCTL0_NAKSTS_MSB 17
85618 /* The width in bits of the ALT_USB_DEV_DOEPCTL0_NAKSTS register field. */
85619 #define ALT_USB_DEV_DOEPCTL0_NAKSTS_WIDTH 1
85620 /* The mask used to set the ALT_USB_DEV_DOEPCTL0_NAKSTS register field value. */
85621 #define ALT_USB_DEV_DOEPCTL0_NAKSTS_SET_MSK 0x00020000
85622 /* The mask used to clear the ALT_USB_DEV_DOEPCTL0_NAKSTS register field value. */
85623 #define ALT_USB_DEV_DOEPCTL0_NAKSTS_CLR_MSK 0xfffdffff
85624 /* The reset value of the ALT_USB_DEV_DOEPCTL0_NAKSTS register field. */
85625 #define ALT_USB_DEV_DOEPCTL0_NAKSTS_RESET 0x0
85626 /* Extracts the ALT_USB_DEV_DOEPCTL0_NAKSTS field value from a register. */
85627 #define ALT_USB_DEV_DOEPCTL0_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
85628 /* Produces a ALT_USB_DEV_DOEPCTL0_NAKSTS register field value suitable for setting the register. */
85629 #define ALT_USB_DEV_DOEPCTL0_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
85630 
85631 /*
85632  * Field : Endpoint Type - eptype
85633  *
85634  * Hardcoded to 0 for control.
85635  *
85636  * Field Enumeration Values:
85637  *
85638  * Enum | Value | Description
85639  * :----------------------------------|:------|:-------------------
85640  * ALT_USB_DEV_DOEPCTL0_EPTYPE_E_ACT | 0x0 | Endpoint Control 0
85641  *
85642  * Field Access Macros:
85643  *
85644  */
85645 /*
85646  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_EPTYPE
85647  *
85648  * Endpoint Control 0
85649  */
85650 #define ALT_USB_DEV_DOEPCTL0_EPTYPE_E_ACT 0x0
85651 
85652 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_EPTYPE register field. */
85653 #define ALT_USB_DEV_DOEPCTL0_EPTYPE_LSB 18
85654 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_EPTYPE register field. */
85655 #define ALT_USB_DEV_DOEPCTL0_EPTYPE_MSB 19
85656 /* The width in bits of the ALT_USB_DEV_DOEPCTL0_EPTYPE register field. */
85657 #define ALT_USB_DEV_DOEPCTL0_EPTYPE_WIDTH 2
85658 /* The mask used to set the ALT_USB_DEV_DOEPCTL0_EPTYPE register field value. */
85659 #define ALT_USB_DEV_DOEPCTL0_EPTYPE_SET_MSK 0x000c0000
85660 /* The mask used to clear the ALT_USB_DEV_DOEPCTL0_EPTYPE register field value. */
85661 #define ALT_USB_DEV_DOEPCTL0_EPTYPE_CLR_MSK 0xfff3ffff
85662 /* The reset value of the ALT_USB_DEV_DOEPCTL0_EPTYPE register field. */
85663 #define ALT_USB_DEV_DOEPCTL0_EPTYPE_RESET 0x0
85664 /* Extracts the ALT_USB_DEV_DOEPCTL0_EPTYPE field value from a register. */
85665 #define ALT_USB_DEV_DOEPCTL0_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
85666 /* Produces a ALT_USB_DEV_DOEPCTL0_EPTYPE register field value suitable for setting the register. */
85667 #define ALT_USB_DEV_DOEPCTL0_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
85668 
85669 /*
85670  * Field : Snoop Mode - snp
85671  *
85672  * This bit configures the endpoint to Snoop mode. In Snoop mode, the core does not
85673  * check the correctness of OUT packets before transferring them to application
85674  * memory.
85675  *
85676  * Field Enumeration Values:
85677  *
85678  * Enum | Value | Description
85679  * :--------------------------------|:------|:--------------------
85680  * ALT_USB_DEV_DOEPCTL0_SNP_E_DISD | 0x0 | Snoop Mode disabled
85681  * ALT_USB_DEV_DOEPCTL0_SNP_E_END | 0x1 | Snoop Mode enabled
85682  *
85683  * Field Access Macros:
85684  *
85685  */
85686 /*
85687  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_SNP
85688  *
85689  * Snoop Mode disabled
85690  */
85691 #define ALT_USB_DEV_DOEPCTL0_SNP_E_DISD 0x0
85692 /*
85693  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_SNP
85694  *
85695  * Snoop Mode enabled
85696  */
85697 #define ALT_USB_DEV_DOEPCTL0_SNP_E_END 0x1
85698 
85699 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_SNP register field. */
85700 #define ALT_USB_DEV_DOEPCTL0_SNP_LSB 20
85701 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_SNP register field. */
85702 #define ALT_USB_DEV_DOEPCTL0_SNP_MSB 20
85703 /* The width in bits of the ALT_USB_DEV_DOEPCTL0_SNP register field. */
85704 #define ALT_USB_DEV_DOEPCTL0_SNP_WIDTH 1
85705 /* The mask used to set the ALT_USB_DEV_DOEPCTL0_SNP register field value. */
85706 #define ALT_USB_DEV_DOEPCTL0_SNP_SET_MSK 0x00100000
85707 /* The mask used to clear the ALT_USB_DEV_DOEPCTL0_SNP register field value. */
85708 #define ALT_USB_DEV_DOEPCTL0_SNP_CLR_MSK 0xffefffff
85709 /* The reset value of the ALT_USB_DEV_DOEPCTL0_SNP register field. */
85710 #define ALT_USB_DEV_DOEPCTL0_SNP_RESET 0x0
85711 /* Extracts the ALT_USB_DEV_DOEPCTL0_SNP field value from a register. */
85712 #define ALT_USB_DEV_DOEPCTL0_SNP_GET(value) (((value) & 0x00100000) >> 20)
85713 /* Produces a ALT_USB_DEV_DOEPCTL0_SNP register field value suitable for setting the register. */
85714 #define ALT_USB_DEV_DOEPCTL0_SNP_SET(value) (((value) << 20) & 0x00100000)
85715 
85716 /*
85717  * Field : STALL Handshake - stall
85718  *
85719  * The application can only Set this bit, and the core clears it, when a SETUP
85720  * token is received for this endpoint. If a NAK bit or Global OUT NAK is Set along
85721  * with this bit, the STALL bit takes priority. Irrespective of this bit's setting,
85722  * the core always responds to SETUP data packets with an ACK handshake.
85723  *
85724  * Field Enumeration Values:
85725  *
85726  * Enum | Value | Description
85727  * :-----------------------------------|:------|:----------------
85728  * ALT_USB_DEV_DOEPCTL0_STALL_E_INACT | 0x0 | No Stall
85729  * ALT_USB_DEV_DOEPCTL0_STALL_E_ACT | 0x1 | Stall Handshake
85730  *
85731  * Field Access Macros:
85732  *
85733  */
85734 /*
85735  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_STALL
85736  *
85737  * No Stall
85738  */
85739 #define ALT_USB_DEV_DOEPCTL0_STALL_E_INACT 0x0
85740 /*
85741  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_STALL
85742  *
85743  * Stall Handshake
85744  */
85745 #define ALT_USB_DEV_DOEPCTL0_STALL_E_ACT 0x1
85746 
85747 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_STALL register field. */
85748 #define ALT_USB_DEV_DOEPCTL0_STALL_LSB 21
85749 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_STALL register field. */
85750 #define ALT_USB_DEV_DOEPCTL0_STALL_MSB 21
85751 /* The width in bits of the ALT_USB_DEV_DOEPCTL0_STALL register field. */
85752 #define ALT_USB_DEV_DOEPCTL0_STALL_WIDTH 1
85753 /* The mask used to set the ALT_USB_DEV_DOEPCTL0_STALL register field value. */
85754 #define ALT_USB_DEV_DOEPCTL0_STALL_SET_MSK 0x00200000
85755 /* The mask used to clear the ALT_USB_DEV_DOEPCTL0_STALL register field value. */
85756 #define ALT_USB_DEV_DOEPCTL0_STALL_CLR_MSK 0xffdfffff
85757 /* The reset value of the ALT_USB_DEV_DOEPCTL0_STALL register field. */
85758 #define ALT_USB_DEV_DOEPCTL0_STALL_RESET 0x0
85759 /* Extracts the ALT_USB_DEV_DOEPCTL0_STALL field value from a register. */
85760 #define ALT_USB_DEV_DOEPCTL0_STALL_GET(value) (((value) & 0x00200000) >> 21)
85761 /* Produces a ALT_USB_DEV_DOEPCTL0_STALL register field value suitable for setting the register. */
85762 #define ALT_USB_DEV_DOEPCTL0_STALL_SET(value) (((value) << 21) & 0x00200000)
85763 
85764 /*
85765  * Field : Clear NAK - cnak
85766  *
85767  * A write to this bit clears the NAK bit for the endpoint.
85768  *
85769  * Field Enumeration Values:
85770  *
85771  * Enum | Value | Description
85772  * :----------------------------------|:------|:------------
85773  * ALT_USB_DEV_DOEPCTL0_CNAK_E_NOCLR | 0x0 | No action
85774  * ALT_USB_DEV_DOEPCTL0_CNAK_E_CLR | 0x1 | Clear NAK
85775  *
85776  * Field Access Macros:
85777  *
85778  */
85779 /*
85780  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_CNAK
85781  *
85782  * No action
85783  */
85784 #define ALT_USB_DEV_DOEPCTL0_CNAK_E_NOCLR 0x0
85785 /*
85786  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_CNAK
85787  *
85788  * Clear NAK
85789  */
85790 #define ALT_USB_DEV_DOEPCTL0_CNAK_E_CLR 0x1
85791 
85792 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_CNAK register field. */
85793 #define ALT_USB_DEV_DOEPCTL0_CNAK_LSB 26
85794 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_CNAK register field. */
85795 #define ALT_USB_DEV_DOEPCTL0_CNAK_MSB 26
85796 /* The width in bits of the ALT_USB_DEV_DOEPCTL0_CNAK register field. */
85797 #define ALT_USB_DEV_DOEPCTL0_CNAK_WIDTH 1
85798 /* The mask used to set the ALT_USB_DEV_DOEPCTL0_CNAK register field value. */
85799 #define ALT_USB_DEV_DOEPCTL0_CNAK_SET_MSK 0x04000000
85800 /* The mask used to clear the ALT_USB_DEV_DOEPCTL0_CNAK register field value. */
85801 #define ALT_USB_DEV_DOEPCTL0_CNAK_CLR_MSK 0xfbffffff
85802 /* The reset value of the ALT_USB_DEV_DOEPCTL0_CNAK register field. */
85803 #define ALT_USB_DEV_DOEPCTL0_CNAK_RESET 0x0
85804 /* Extracts the ALT_USB_DEV_DOEPCTL0_CNAK field value from a register. */
85805 #define ALT_USB_DEV_DOEPCTL0_CNAK_GET(value) (((value) & 0x04000000) >> 26)
85806 /* Produces a ALT_USB_DEV_DOEPCTL0_CNAK register field value suitable for setting the register. */
85807 #define ALT_USB_DEV_DOEPCTL0_CNAK_SET(value) (((value) << 26) & 0x04000000)
85808 
85809 /*
85810  * Field : Set NAK - snak
85811  *
85812  * A write to this bit sets the NAK bit for the endpoint.Using this bit, the
85813  * application can control the transmission of NAK handshakes on an endpoint. The
85814  * core can also Set bit on a Transfer Completed interrupt, or after a SETUP is
85815  * received on the endpoint.
85816  *
85817  * Field Enumeration Values:
85818  *
85819  * Enum | Value | Description
85820  * :----------------------------------|:------|:------------
85821  * ALT_USB_DEV_DOEPCTL0_SNAK_E_NOSET | 0x0 | No action
85822  * ALT_USB_DEV_DOEPCTL0_SNAK_E_SET | 0x1 | Set NAK
85823  *
85824  * Field Access Macros:
85825  *
85826  */
85827 /*
85828  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_SNAK
85829  *
85830  * No action
85831  */
85832 #define ALT_USB_DEV_DOEPCTL0_SNAK_E_NOSET 0x0
85833 /*
85834  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_SNAK
85835  *
85836  * Set NAK
85837  */
85838 #define ALT_USB_DEV_DOEPCTL0_SNAK_E_SET 0x1
85839 
85840 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_SNAK register field. */
85841 #define ALT_USB_DEV_DOEPCTL0_SNAK_LSB 27
85842 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_SNAK register field. */
85843 #define ALT_USB_DEV_DOEPCTL0_SNAK_MSB 27
85844 /* The width in bits of the ALT_USB_DEV_DOEPCTL0_SNAK register field. */
85845 #define ALT_USB_DEV_DOEPCTL0_SNAK_WIDTH 1
85846 /* The mask used to set the ALT_USB_DEV_DOEPCTL0_SNAK register field value. */
85847 #define ALT_USB_DEV_DOEPCTL0_SNAK_SET_MSK 0x08000000
85848 /* The mask used to clear the ALT_USB_DEV_DOEPCTL0_SNAK register field value. */
85849 #define ALT_USB_DEV_DOEPCTL0_SNAK_CLR_MSK 0xf7ffffff
85850 /* The reset value of the ALT_USB_DEV_DOEPCTL0_SNAK register field. */
85851 #define ALT_USB_DEV_DOEPCTL0_SNAK_RESET 0x0
85852 /* Extracts the ALT_USB_DEV_DOEPCTL0_SNAK field value from a register. */
85853 #define ALT_USB_DEV_DOEPCTL0_SNAK_GET(value) (((value) & 0x08000000) >> 27)
85854 /* Produces a ALT_USB_DEV_DOEPCTL0_SNAK register field value suitable for setting the register. */
85855 #define ALT_USB_DEV_DOEPCTL0_SNAK_SET(value) (((value) << 27) & 0x08000000)
85856 
85857 /*
85858  * Field : Endpoint Disable - epdis
85859  *
85860  * The application cannot disable control OUT endpoint 0.
85861  *
85862  * Field Enumeration Values:
85863  *
85864  * Enum | Value | Description
85865  * :-----------------------------------|:------|:--------------------
85866  * ALT_USB_DEV_DOEPCTL0_EPDIS_E_INACT | 0x0 | No Endpoint disable
85867  *
85868  * Field Access Macros:
85869  *
85870  */
85871 /*
85872  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_EPDIS
85873  *
85874  * No Endpoint disable
85875  */
85876 #define ALT_USB_DEV_DOEPCTL0_EPDIS_E_INACT 0x0
85877 
85878 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_EPDIS register field. */
85879 #define ALT_USB_DEV_DOEPCTL0_EPDIS_LSB 30
85880 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_EPDIS register field. */
85881 #define ALT_USB_DEV_DOEPCTL0_EPDIS_MSB 30
85882 /* The width in bits of the ALT_USB_DEV_DOEPCTL0_EPDIS register field. */
85883 #define ALT_USB_DEV_DOEPCTL0_EPDIS_WIDTH 1
85884 /* The mask used to set the ALT_USB_DEV_DOEPCTL0_EPDIS register field value. */
85885 #define ALT_USB_DEV_DOEPCTL0_EPDIS_SET_MSK 0x40000000
85886 /* The mask used to clear the ALT_USB_DEV_DOEPCTL0_EPDIS register field value. */
85887 #define ALT_USB_DEV_DOEPCTL0_EPDIS_CLR_MSK 0xbfffffff
85888 /* The reset value of the ALT_USB_DEV_DOEPCTL0_EPDIS register field. */
85889 #define ALT_USB_DEV_DOEPCTL0_EPDIS_RESET 0x0
85890 /* Extracts the ALT_USB_DEV_DOEPCTL0_EPDIS field value from a register. */
85891 #define ALT_USB_DEV_DOEPCTL0_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
85892 /* Produces a ALT_USB_DEV_DOEPCTL0_EPDIS register field value suitable for setting the register. */
85893 #define ALT_USB_DEV_DOEPCTL0_EPDIS_SET(value) (((value) << 30) & 0x40000000)
85894 
85895 /*
85896  * Field : Endpoint Enable - epena
85897  *
85898  * When Scatter/Gather DMA mode is enabled, for OUT endpoints this bit indicates
85899  * that the descriptor structure and data buffer to receive data is setup. When
85900  * Scatter/Gather DMA mode is disabled(such as for buffer-pointer based DMA
85901  * mode)this bit indicates that the application has allocated the memory to start
85902  * receiving data from the USB.The core clears this bit before setting any of the
85903  * following interrupts on this endpoint:
85904  *
85905  * SETUP Phase Done
85906  *
85907  * Endpoint Disabled
85908  *
85909  * Transfer Completed
85910  *
85911  * In DMA mode, this bit must be Set for the core to transfer SETUP data packets
85912  * into memory.
85913  *
85914  * Field Enumeration Values:
85915  *
85916  * Enum | Value | Description
85917  * :-----------------------------------|:------|:-----------------
85918  * ALT_USB_DEV_DOEPCTL0_EPENA_E_INACT | 0x0 | No action
85919  * ALT_USB_DEV_DOEPCTL0_EPENA_E_ACT | 0x1 | Endpoint Enabled
85920  *
85921  * Field Access Macros:
85922  *
85923  */
85924 /*
85925  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_EPENA
85926  *
85927  * No action
85928  */
85929 #define ALT_USB_DEV_DOEPCTL0_EPENA_E_INACT 0x0
85930 /*
85931  * Enumerated value for register field ALT_USB_DEV_DOEPCTL0_EPENA
85932  *
85933  * Endpoint Enabled
85934  */
85935 #define ALT_USB_DEV_DOEPCTL0_EPENA_E_ACT 0x1
85936 
85937 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_EPENA register field. */
85938 #define ALT_USB_DEV_DOEPCTL0_EPENA_LSB 31
85939 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_EPENA register field. */
85940 #define ALT_USB_DEV_DOEPCTL0_EPENA_MSB 31
85941 /* The width in bits of the ALT_USB_DEV_DOEPCTL0_EPENA register field. */
85942 #define ALT_USB_DEV_DOEPCTL0_EPENA_WIDTH 1
85943 /* The mask used to set the ALT_USB_DEV_DOEPCTL0_EPENA register field value. */
85944 #define ALT_USB_DEV_DOEPCTL0_EPENA_SET_MSK 0x80000000
85945 /* The mask used to clear the ALT_USB_DEV_DOEPCTL0_EPENA register field value. */
85946 #define ALT_USB_DEV_DOEPCTL0_EPENA_CLR_MSK 0x7fffffff
85947 /* The reset value of the ALT_USB_DEV_DOEPCTL0_EPENA register field. */
85948 #define ALT_USB_DEV_DOEPCTL0_EPENA_RESET 0x0
85949 /* Extracts the ALT_USB_DEV_DOEPCTL0_EPENA field value from a register. */
85950 #define ALT_USB_DEV_DOEPCTL0_EPENA_GET(value) (((value) & 0x80000000) >> 31)
85951 /* Produces a ALT_USB_DEV_DOEPCTL0_EPENA register field value suitable for setting the register. */
85952 #define ALT_USB_DEV_DOEPCTL0_EPENA_SET(value) (((value) << 31) & 0x80000000)
85953 
85954 #ifndef __ASSEMBLY__
85955 /*
85956  * WARNING: The C register and register group struct declarations are provided for
85957  * convenience and illustrative purposes. They should, however, be used with
85958  * caution as the C language standard provides no guarantees about the alignment or
85959  * atomicity of device memory accesses. The recommended practice for writing
85960  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
85961  * alt_write_word() functions.
85962  *
85963  * The struct declaration for register ALT_USB_DEV_DOEPCTL0.
85964  */
85965 struct ALT_USB_DEV_DOEPCTL0_s
85966 {
85967  const uint32_t mps : 2; /* Maximum Packet Size */
85968  uint32_t : 13; /* *UNDEFINED* */
85969  const uint32_t usbactep : 1; /* USB Active Endpoint */
85970  uint32_t : 1; /* *UNDEFINED* */
85971  const uint32_t naksts : 1; /* NAK Status */
85972  const uint32_t eptype : 2; /* Endpoint Type */
85973  uint32_t snp : 1; /* Snoop Mode */
85974  const uint32_t stall : 1; /* STALL Handshake */
85975  uint32_t : 4; /* *UNDEFINED* */
85976  uint32_t cnak : 1; /* Clear NAK */
85977  uint32_t snak : 1; /* Set NAK */
85978  uint32_t : 2; /* *UNDEFINED* */
85979  const uint32_t epdis : 1; /* Endpoint Disable */
85980  const uint32_t epena : 1; /* Endpoint Enable */
85981 };
85982 
85983 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL0. */
85984 typedef volatile struct ALT_USB_DEV_DOEPCTL0_s ALT_USB_DEV_DOEPCTL0_t;
85985 #endif /* __ASSEMBLY__ */
85986 
85987 /* The byte offset of the ALT_USB_DEV_DOEPCTL0 register from the beginning of the component. */
85988 #define ALT_USB_DEV_DOEPCTL0_OFST 0x300
85989 /* The address of the ALT_USB_DEV_DOEPCTL0 register. */
85990 #define ALT_USB_DEV_DOEPCTL0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL0_OFST))
85991 
85992 /*
85993  * Register : Device OUT Endpoint 0 Interrupt Register - doepint0
85994  *
85995  * This register indicates the status of an endpoint with respect to USB- and AHB-
85996  * related events. The application must read this register when the OUT Endpoints
85997  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
85998  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
85999  * can read this register, it must first read the Device All Endpoints Interrupt
86000  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
86001  * Interrupt register. The application must clear the appropriate bit in this
86002  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
86003  *
86004  * Register Layout
86005  *
86006  * Bits | Access | Reset | Description
86007  * :--------|:-------|:------|:------------------------------------------
86008  * [0] | R | 0x0 | Transfer Completed Interrupt
86009  * [1] | R | 0x0 | Endpoint Disabled Interrupt
86010  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT0_AHBERR
86011  * [3] | R | 0x0 | SETUP Phase Done
86012  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
86013  * [5] | R | 0x0 | Status Phase Received for Control Write
86014  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
86015  * [7] | ??? | 0x0 | *UNDEFINED*
86016  * [8] | R | 0x0 | OUT Packet Error
86017  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
86018  * [10] | ??? | 0x0 | *UNDEFINED*
86019  * [11] | R | 0x0 | Packet Drop Status
86020  * [12] | R | 0x0 | BbleErr Interrupt
86021  * [13] | R | 0x0 | NAK Interrupt
86022  * [14] | R | 0x0 | NYET Interrupt
86023  * [31:15] | ??? | 0x0 | *UNDEFINED*
86024  *
86025  */
86026 /*
86027  * Field : Transfer Completed Interrupt - xfercompl
86028  *
86029  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
86030  *
86031  * This field indicates that the requested data from the internal FIFO is moved to
86032  * external system memory. This interrupt is generated only when the corresponding
86033  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
86034  * is Set.
86035  *
86036  * When Scatter/Gather DMA mode is disabled, this field indicates that the
86037  * programmed transfer is complete on the AHB as well as on the USB, for this
86038  * endpoint.
86039  *
86040  * Field Enumeration Values:
86041  *
86042  * Enum | Value | Description
86043  * :---------------------------------------|:------|:-----------------------------
86044  * ALT_USB_DEV_DOEPINT0_XFERCOMPL_E_INACT | 0x0 | No Interrupt
86045  * ALT_USB_DEV_DOEPINT0_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
86046  *
86047  * Field Access Macros:
86048  *
86049  */
86050 /*
86051  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_XFERCOMPL
86052  *
86053  * No Interrupt
86054  */
86055 #define ALT_USB_DEV_DOEPINT0_XFERCOMPL_E_INACT 0x0
86056 /*
86057  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_XFERCOMPL
86058  *
86059  * Transfer Completed Interrupt
86060  */
86061 #define ALT_USB_DEV_DOEPINT0_XFERCOMPL_E_ACT 0x1
86062 
86063 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_XFERCOMPL register field. */
86064 #define ALT_USB_DEV_DOEPINT0_XFERCOMPL_LSB 0
86065 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_XFERCOMPL register field. */
86066 #define ALT_USB_DEV_DOEPINT0_XFERCOMPL_MSB 0
86067 /* The width in bits of the ALT_USB_DEV_DOEPINT0_XFERCOMPL register field. */
86068 #define ALT_USB_DEV_DOEPINT0_XFERCOMPL_WIDTH 1
86069 /* The mask used to set the ALT_USB_DEV_DOEPINT0_XFERCOMPL register field value. */
86070 #define ALT_USB_DEV_DOEPINT0_XFERCOMPL_SET_MSK 0x00000001
86071 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_XFERCOMPL register field value. */
86072 #define ALT_USB_DEV_DOEPINT0_XFERCOMPL_CLR_MSK 0xfffffffe
86073 /* The reset value of the ALT_USB_DEV_DOEPINT0_XFERCOMPL register field. */
86074 #define ALT_USB_DEV_DOEPINT0_XFERCOMPL_RESET 0x0
86075 /* Extracts the ALT_USB_DEV_DOEPINT0_XFERCOMPL field value from a register. */
86076 #define ALT_USB_DEV_DOEPINT0_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
86077 /* Produces a ALT_USB_DEV_DOEPINT0_XFERCOMPL register field value suitable for setting the register. */
86078 #define ALT_USB_DEV_DOEPINT0_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
86079 
86080 /*
86081  * Field : Endpoint Disabled Interrupt - epdisbld
86082  *
86083  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
86084  * disabled per the application's request.
86085  *
86086  * Field Enumeration Values:
86087  *
86088  * Enum | Value | Description
86089  * :--------------------------------------|:------|:----------------------------
86090  * ALT_USB_DEV_DOEPINT0_EPDISBLD_E_INACT | 0x0 | No Interrupt
86091  * ALT_USB_DEV_DOEPINT0_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
86092  *
86093  * Field Access Macros:
86094  *
86095  */
86096 /*
86097  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_EPDISBLD
86098  *
86099  * No Interrupt
86100  */
86101 #define ALT_USB_DEV_DOEPINT0_EPDISBLD_E_INACT 0x0
86102 /*
86103  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_EPDISBLD
86104  *
86105  * Endpoint Disabled Interrupt
86106  */
86107 #define ALT_USB_DEV_DOEPINT0_EPDISBLD_E_ACT 0x1
86108 
86109 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_EPDISBLD register field. */
86110 #define ALT_USB_DEV_DOEPINT0_EPDISBLD_LSB 1
86111 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_EPDISBLD register field. */
86112 #define ALT_USB_DEV_DOEPINT0_EPDISBLD_MSB 1
86113 /* The width in bits of the ALT_USB_DEV_DOEPINT0_EPDISBLD register field. */
86114 #define ALT_USB_DEV_DOEPINT0_EPDISBLD_WIDTH 1
86115 /* The mask used to set the ALT_USB_DEV_DOEPINT0_EPDISBLD register field value. */
86116 #define ALT_USB_DEV_DOEPINT0_EPDISBLD_SET_MSK 0x00000002
86117 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_EPDISBLD register field value. */
86118 #define ALT_USB_DEV_DOEPINT0_EPDISBLD_CLR_MSK 0xfffffffd
86119 /* The reset value of the ALT_USB_DEV_DOEPINT0_EPDISBLD register field. */
86120 #define ALT_USB_DEV_DOEPINT0_EPDISBLD_RESET 0x0
86121 /* Extracts the ALT_USB_DEV_DOEPINT0_EPDISBLD field value from a register. */
86122 #define ALT_USB_DEV_DOEPINT0_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
86123 /* Produces a ALT_USB_DEV_DOEPINT0_EPDISBLD register field value suitable for setting the register. */
86124 #define ALT_USB_DEV_DOEPINT0_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
86125 
86126 /*
86127  * Field : ahberr
86128  *
86129  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
86130  * there is an AHB error during an AHB read/write. The application can read the
86131  * corresponding endpoint DMA address register to get the error address.
86132  *
86133  * Field Enumeration Values:
86134  *
86135  * Enum | Value | Description
86136  * :------------------------------------|:------|:--------------------
86137  * ALT_USB_DEV_DOEPINT0_AHBERR_E_INACT | 0x0 | No Interrupt
86138  * ALT_USB_DEV_DOEPINT0_AHBERR_E_ACT | 0x1 | AHB Error interrupt
86139  *
86140  * Field Access Macros:
86141  *
86142  */
86143 /*
86144  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_AHBERR
86145  *
86146  * No Interrupt
86147  */
86148 #define ALT_USB_DEV_DOEPINT0_AHBERR_E_INACT 0x0
86149 /*
86150  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_AHBERR
86151  *
86152  * AHB Error interrupt
86153  */
86154 #define ALT_USB_DEV_DOEPINT0_AHBERR_E_ACT 0x1
86155 
86156 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_AHBERR register field. */
86157 #define ALT_USB_DEV_DOEPINT0_AHBERR_LSB 2
86158 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_AHBERR register field. */
86159 #define ALT_USB_DEV_DOEPINT0_AHBERR_MSB 2
86160 /* The width in bits of the ALT_USB_DEV_DOEPINT0_AHBERR register field. */
86161 #define ALT_USB_DEV_DOEPINT0_AHBERR_WIDTH 1
86162 /* The mask used to set the ALT_USB_DEV_DOEPINT0_AHBERR register field value. */
86163 #define ALT_USB_DEV_DOEPINT0_AHBERR_SET_MSK 0x00000004
86164 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_AHBERR register field value. */
86165 #define ALT_USB_DEV_DOEPINT0_AHBERR_CLR_MSK 0xfffffffb
86166 /* The reset value of the ALT_USB_DEV_DOEPINT0_AHBERR register field. */
86167 #define ALT_USB_DEV_DOEPINT0_AHBERR_RESET 0x0
86168 /* Extracts the ALT_USB_DEV_DOEPINT0_AHBERR field value from a register. */
86169 #define ALT_USB_DEV_DOEPINT0_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
86170 /* Produces a ALT_USB_DEV_DOEPINT0_AHBERR register field value suitable for setting the register. */
86171 #define ALT_USB_DEV_DOEPINT0_AHBERR_SET(value) (((value) << 2) & 0x00000004)
86172 
86173 /*
86174  * Field : SETUP Phase Done - setup
86175  *
86176  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
86177  * control endpoint is complete and no more back-to-back SETUP packets were
86178  * received for the current control transfer. On this interrupt, the application
86179  * can decode the received SETUP data packet.
86180  *
86181  * Field Enumeration Values:
86182  *
86183  * Enum | Value | Description
86184  * :-----------------------------------|:------|:--------------------
86185  * ALT_USB_DEV_DOEPINT0_SETUP_E_INACT | 0x0 | No SETUP Phase Done
86186  * ALT_USB_DEV_DOEPINT0_SETUP_E_ACT | 0x1 | SETUP Phase Done
86187  *
86188  * Field Access Macros:
86189  *
86190  */
86191 /*
86192  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_SETUP
86193  *
86194  * No SETUP Phase Done
86195  */
86196 #define ALT_USB_DEV_DOEPINT0_SETUP_E_INACT 0x0
86197 /*
86198  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_SETUP
86199  *
86200  * SETUP Phase Done
86201  */
86202 #define ALT_USB_DEV_DOEPINT0_SETUP_E_ACT 0x1
86203 
86204 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_SETUP register field. */
86205 #define ALT_USB_DEV_DOEPINT0_SETUP_LSB 3
86206 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_SETUP register field. */
86207 #define ALT_USB_DEV_DOEPINT0_SETUP_MSB 3
86208 /* The width in bits of the ALT_USB_DEV_DOEPINT0_SETUP register field. */
86209 #define ALT_USB_DEV_DOEPINT0_SETUP_WIDTH 1
86210 /* The mask used to set the ALT_USB_DEV_DOEPINT0_SETUP register field value. */
86211 #define ALT_USB_DEV_DOEPINT0_SETUP_SET_MSK 0x00000008
86212 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_SETUP register field value. */
86213 #define ALT_USB_DEV_DOEPINT0_SETUP_CLR_MSK 0xfffffff7
86214 /* The reset value of the ALT_USB_DEV_DOEPINT0_SETUP register field. */
86215 #define ALT_USB_DEV_DOEPINT0_SETUP_RESET 0x0
86216 /* Extracts the ALT_USB_DEV_DOEPINT0_SETUP field value from a register. */
86217 #define ALT_USB_DEV_DOEPINT0_SETUP_GET(value) (((value) & 0x00000008) >> 3)
86218 /* Produces a ALT_USB_DEV_DOEPINT0_SETUP register field value suitable for setting the register. */
86219 #define ALT_USB_DEV_DOEPINT0_SETUP_SET(value) (((value) << 3) & 0x00000008)
86220 
86221 /*
86222  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
86223  *
86224  * Applies only to control OUT endpoints. Indicates that an OUT token was received
86225  * when the endpoint was not yet enabled. This interrupt is asserted on the
86226  * endpoint for which the OUT token was received.
86227  *
86228  * Field Enumeration Values:
86229  *
86230  * Enum | Value | Description
86231  * :-----------------------------------------|:------|:---------------------------------------------
86232  * ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
86233  * ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
86234  *
86235  * Field Access Macros:
86236  *
86237  */
86238 /*
86239  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS
86240  *
86241  * No OUT Token Received When Endpoint Disabled
86242  */
86243 #define ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS_E_INACT 0x0
86244 /*
86245  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS
86246  *
86247  * OUT Token Received When Endpoint Disabled
86248  */
86249 #define ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS_E_ACT 0x1
86250 
86251 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS register field. */
86252 #define ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS_LSB 4
86253 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS register field. */
86254 #define ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS_MSB 4
86255 /* The width in bits of the ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS register field. */
86256 #define ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS_WIDTH 1
86257 /* The mask used to set the ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS register field value. */
86258 #define ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS_SET_MSK 0x00000010
86259 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS register field value. */
86260 #define ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS_CLR_MSK 0xffffffef
86261 /* The reset value of the ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS register field. */
86262 #define ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS_RESET 0x0
86263 /* Extracts the ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS field value from a register. */
86264 #define ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
86265 /* Produces a ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS register field value suitable for setting the register. */
86266 #define ALT_USB_DEV_DOEPINT0_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
86267 
86268 /*
86269  * Field : Status Phase Received for Control Write - stsphsercvd
86270  *
86271  * This interrupt is valid only for Control OUT endpoints and only in Scatter
86272  * Gather DMA mode. This interrupt is generated only after the core has transferred
86273  * all the data that the host has sent during the data phase of a control write
86274  * transfer, to the system memory buffer. The interrupt indicates to the
86275  * application that the host has switched from data phase to the status phase of a
86276  * Control Write transfer. The application can use this interrupt to ACK or STALL
86277  * the Status phase, after it has decoded the data phase. This is applicable only
86278  * in Case of Scatter Gather DMA mode.
86279  *
86280  * Field Enumeration Values:
86281  *
86282  * Enum | Value | Description
86283  * :-----------------------------------------|:------|:-------------------------------------------
86284  * ALT_USB_DEV_DOEPINT0_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
86285  * ALT_USB_DEV_DOEPINT0_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
86286  *
86287  * Field Access Macros:
86288  *
86289  */
86290 /*
86291  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_STSPHSERCVD
86292  *
86293  * No Status Phase Received for Control Write
86294  */
86295 #define ALT_USB_DEV_DOEPINT0_STSPHSERCVD_E_INACT 0x0
86296 /*
86297  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_STSPHSERCVD
86298  *
86299  * Status Phase Received for Control Write
86300  */
86301 #define ALT_USB_DEV_DOEPINT0_STSPHSERCVD_E_ACT 0x1
86302 
86303 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_STSPHSERCVD register field. */
86304 #define ALT_USB_DEV_DOEPINT0_STSPHSERCVD_LSB 5
86305 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_STSPHSERCVD register field. */
86306 #define ALT_USB_DEV_DOEPINT0_STSPHSERCVD_MSB 5
86307 /* The width in bits of the ALT_USB_DEV_DOEPINT0_STSPHSERCVD register field. */
86308 #define ALT_USB_DEV_DOEPINT0_STSPHSERCVD_WIDTH 1
86309 /* The mask used to set the ALT_USB_DEV_DOEPINT0_STSPHSERCVD register field value. */
86310 #define ALT_USB_DEV_DOEPINT0_STSPHSERCVD_SET_MSK 0x00000020
86311 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_STSPHSERCVD register field value. */
86312 #define ALT_USB_DEV_DOEPINT0_STSPHSERCVD_CLR_MSK 0xffffffdf
86313 /* The reset value of the ALT_USB_DEV_DOEPINT0_STSPHSERCVD register field. */
86314 #define ALT_USB_DEV_DOEPINT0_STSPHSERCVD_RESET 0x0
86315 /* Extracts the ALT_USB_DEV_DOEPINT0_STSPHSERCVD field value from a register. */
86316 #define ALT_USB_DEV_DOEPINT0_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
86317 /* Produces a ALT_USB_DEV_DOEPINT0_STSPHSERCVD register field value suitable for setting the register. */
86318 #define ALT_USB_DEV_DOEPINT0_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
86319 
86320 /*
86321  * Field : Back-to-Back SETUP Packets Received - back2backsetup
86322  *
86323  * Applies to Control OUT endpoints only. This bit indicates that the core has
86324  * received more than three back-to-back SETUP packets for this particular
86325  * endpoint. for information about handling this interrupt,
86326  *
86327  * Field Enumeration Values:
86328  *
86329  * Enum | Value | Description
86330  * :--------------------------------------------|:------|:---------------------------------------
86331  * ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
86332  * ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
86333  *
86334  * Field Access Macros:
86335  *
86336  */
86337 /*
86338  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP
86339  *
86340  * No Back-to-Back SETUP Packets Received
86341  */
86342 #define ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP_E_INACT 0x0
86343 /*
86344  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP
86345  *
86346  * Back-to-Back SETUP Packets Received
86347  */
86348 #define ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP_E_ACT 0x1
86349 
86350 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP register field. */
86351 #define ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP_LSB 6
86352 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP register field. */
86353 #define ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP_MSB 6
86354 /* The width in bits of the ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP register field. */
86355 #define ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP_WIDTH 1
86356 /* The mask used to set the ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP register field value. */
86357 #define ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP_SET_MSK 0x00000040
86358 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP register field value. */
86359 #define ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP_CLR_MSK 0xffffffbf
86360 /* The reset value of the ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP register field. */
86361 #define ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP_RESET 0x0
86362 /* Extracts the ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP field value from a register. */
86363 #define ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
86364 /* Produces a ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP register field value suitable for setting the register. */
86365 #define ALT_USB_DEV_DOEPINT0_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
86366 
86367 /*
86368  * Field : OUT Packet Error - outpkterr
86369  *
86370  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
86371  * an overflow or a CRC error for non-Isochronous OUT packet.
86372  *
86373  * Field Enumeration Values:
86374  *
86375  * Enum | Value | Description
86376  * :---------------------------------------|:------|:--------------------
86377  * ALT_USB_DEV_DOEPINT0_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
86378  * ALT_USB_DEV_DOEPINT0_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
86379  *
86380  * Field Access Macros:
86381  *
86382  */
86383 /*
86384  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_OUTPKTERR
86385  *
86386  * No OUT Packet Error
86387  */
86388 #define ALT_USB_DEV_DOEPINT0_OUTPKTERR_E_INACT 0x0
86389 /*
86390  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_OUTPKTERR
86391  *
86392  * OUT Packet Error
86393  */
86394 #define ALT_USB_DEV_DOEPINT0_OUTPKTERR_E_ACT 0x1
86395 
86396 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_OUTPKTERR register field. */
86397 #define ALT_USB_DEV_DOEPINT0_OUTPKTERR_LSB 8
86398 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_OUTPKTERR register field. */
86399 #define ALT_USB_DEV_DOEPINT0_OUTPKTERR_MSB 8
86400 /* The width in bits of the ALT_USB_DEV_DOEPINT0_OUTPKTERR register field. */
86401 #define ALT_USB_DEV_DOEPINT0_OUTPKTERR_WIDTH 1
86402 /* The mask used to set the ALT_USB_DEV_DOEPINT0_OUTPKTERR register field value. */
86403 #define ALT_USB_DEV_DOEPINT0_OUTPKTERR_SET_MSK 0x00000100
86404 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_OUTPKTERR register field value. */
86405 #define ALT_USB_DEV_DOEPINT0_OUTPKTERR_CLR_MSK 0xfffffeff
86406 /* The reset value of the ALT_USB_DEV_DOEPINT0_OUTPKTERR register field. */
86407 #define ALT_USB_DEV_DOEPINT0_OUTPKTERR_RESET 0x0
86408 /* Extracts the ALT_USB_DEV_DOEPINT0_OUTPKTERR field value from a register. */
86409 #define ALT_USB_DEV_DOEPINT0_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
86410 /* Produces a ALT_USB_DEV_DOEPINT0_OUTPKTERR register field value suitable for setting the register. */
86411 #define ALT_USB_DEV_DOEPINT0_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
86412 
86413 /*
86414  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
86415  *
86416  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
86417  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
86418  * the descriptor accessed is not ready for the Core to process, such as Host busy
86419  * or DMA done
86420  *
86421  * Field Enumeration Values:
86422  *
86423  * Enum | Value | Description
86424  * :-------------------------------------|:------|:--------------
86425  * ALT_USB_DEV_DOEPINT0_BNAINTR_E_INACT | 0x0 | No interrupt
86426  * ALT_USB_DEV_DOEPINT0_BNAINTR_E_ACT | 0x1 | BNA interrupt
86427  *
86428  * Field Access Macros:
86429  *
86430  */
86431 /*
86432  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_BNAINTR
86433  *
86434  * No interrupt
86435  */
86436 #define ALT_USB_DEV_DOEPINT0_BNAINTR_E_INACT 0x0
86437 /*
86438  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_BNAINTR
86439  *
86440  * BNA interrupt
86441  */
86442 #define ALT_USB_DEV_DOEPINT0_BNAINTR_E_ACT 0x1
86443 
86444 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_BNAINTR register field. */
86445 #define ALT_USB_DEV_DOEPINT0_BNAINTR_LSB 9
86446 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_BNAINTR register field. */
86447 #define ALT_USB_DEV_DOEPINT0_BNAINTR_MSB 9
86448 /* The width in bits of the ALT_USB_DEV_DOEPINT0_BNAINTR register field. */
86449 #define ALT_USB_DEV_DOEPINT0_BNAINTR_WIDTH 1
86450 /* The mask used to set the ALT_USB_DEV_DOEPINT0_BNAINTR register field value. */
86451 #define ALT_USB_DEV_DOEPINT0_BNAINTR_SET_MSK 0x00000200
86452 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_BNAINTR register field value. */
86453 #define ALT_USB_DEV_DOEPINT0_BNAINTR_CLR_MSK 0xfffffdff
86454 /* The reset value of the ALT_USB_DEV_DOEPINT0_BNAINTR register field. */
86455 #define ALT_USB_DEV_DOEPINT0_BNAINTR_RESET 0x0
86456 /* Extracts the ALT_USB_DEV_DOEPINT0_BNAINTR field value from a register. */
86457 #define ALT_USB_DEV_DOEPINT0_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
86458 /* Produces a ALT_USB_DEV_DOEPINT0_BNAINTR register field value suitable for setting the register. */
86459 #define ALT_USB_DEV_DOEPINT0_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
86460 
86461 /*
86462  * Field : Packet Drop Status - pktdrpsts
86463  *
86464  * This bit indicates to the application that an ISOC OUT packet has been dropped.
86465  * This bit does not have an associated mask bit and does not generate an
86466  * interrupt.
86467  *
86468  * Field Enumeration Values:
86469  *
86470  * Enum | Value | Description
86471  * :---------------------------------------|:------|:-----------------------------
86472  * ALT_USB_DEV_DOEPINT0_PKTDRPSTS_E_INACT | 0x0 | No interrupt
86473  * ALT_USB_DEV_DOEPINT0_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
86474  *
86475  * Field Access Macros:
86476  *
86477  */
86478 /*
86479  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_PKTDRPSTS
86480  *
86481  * No interrupt
86482  */
86483 #define ALT_USB_DEV_DOEPINT0_PKTDRPSTS_E_INACT 0x0
86484 /*
86485  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_PKTDRPSTS
86486  *
86487  * Packet Drop Status interrupt
86488  */
86489 #define ALT_USB_DEV_DOEPINT0_PKTDRPSTS_E_ACT 0x1
86490 
86491 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_PKTDRPSTS register field. */
86492 #define ALT_USB_DEV_DOEPINT0_PKTDRPSTS_LSB 11
86493 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_PKTDRPSTS register field. */
86494 #define ALT_USB_DEV_DOEPINT0_PKTDRPSTS_MSB 11
86495 /* The width in bits of the ALT_USB_DEV_DOEPINT0_PKTDRPSTS register field. */
86496 #define ALT_USB_DEV_DOEPINT0_PKTDRPSTS_WIDTH 1
86497 /* The mask used to set the ALT_USB_DEV_DOEPINT0_PKTDRPSTS register field value. */
86498 #define ALT_USB_DEV_DOEPINT0_PKTDRPSTS_SET_MSK 0x00000800
86499 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_PKTDRPSTS register field value. */
86500 #define ALT_USB_DEV_DOEPINT0_PKTDRPSTS_CLR_MSK 0xfffff7ff
86501 /* The reset value of the ALT_USB_DEV_DOEPINT0_PKTDRPSTS register field. */
86502 #define ALT_USB_DEV_DOEPINT0_PKTDRPSTS_RESET 0x0
86503 /* Extracts the ALT_USB_DEV_DOEPINT0_PKTDRPSTS field value from a register. */
86504 #define ALT_USB_DEV_DOEPINT0_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
86505 /* Produces a ALT_USB_DEV_DOEPINT0_PKTDRPSTS register field value suitable for setting the register. */
86506 #define ALT_USB_DEV_DOEPINT0_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
86507 
86508 /*
86509  * Field : BbleErr Interrupt - bbleerr
86510  *
86511  * The core generates this interrupt when babble is received for the endpoint.
86512  *
86513  * Field Enumeration Values:
86514  *
86515  * Enum | Value | Description
86516  * :-------------------------------------|:------|:------------------
86517  * ALT_USB_DEV_DOEPINT0_BBLEERR_E_INACT | 0x0 | No interrupt
86518  * ALT_USB_DEV_DOEPINT0_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
86519  *
86520  * Field Access Macros:
86521  *
86522  */
86523 /*
86524  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_BBLEERR
86525  *
86526  * No interrupt
86527  */
86528 #define ALT_USB_DEV_DOEPINT0_BBLEERR_E_INACT 0x0
86529 /*
86530  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_BBLEERR
86531  *
86532  * BbleErr interrupt
86533  */
86534 #define ALT_USB_DEV_DOEPINT0_BBLEERR_E_ACT 0x1
86535 
86536 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_BBLEERR register field. */
86537 #define ALT_USB_DEV_DOEPINT0_BBLEERR_LSB 12
86538 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_BBLEERR register field. */
86539 #define ALT_USB_DEV_DOEPINT0_BBLEERR_MSB 12
86540 /* The width in bits of the ALT_USB_DEV_DOEPINT0_BBLEERR register field. */
86541 #define ALT_USB_DEV_DOEPINT0_BBLEERR_WIDTH 1
86542 /* The mask used to set the ALT_USB_DEV_DOEPINT0_BBLEERR register field value. */
86543 #define ALT_USB_DEV_DOEPINT0_BBLEERR_SET_MSK 0x00001000
86544 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_BBLEERR register field value. */
86545 #define ALT_USB_DEV_DOEPINT0_BBLEERR_CLR_MSK 0xffffefff
86546 /* The reset value of the ALT_USB_DEV_DOEPINT0_BBLEERR register field. */
86547 #define ALT_USB_DEV_DOEPINT0_BBLEERR_RESET 0x0
86548 /* Extracts the ALT_USB_DEV_DOEPINT0_BBLEERR field value from a register. */
86549 #define ALT_USB_DEV_DOEPINT0_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
86550 /* Produces a ALT_USB_DEV_DOEPINT0_BBLEERR register field value suitable for setting the register. */
86551 #define ALT_USB_DEV_DOEPINT0_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
86552 
86553 /*
86554  * Field : NAK Interrupt - nakintrpt
86555  *
86556  * The core generates this interrupt when a NAK is transmitted or received by the
86557  * device. In case of isochronous IN endpoints the interrupt gets generated when a
86558  * zero length packet is transmitted due to un-availability of data in the TXFifo.
86559  *
86560  * Field Enumeration Values:
86561  *
86562  * Enum | Value | Description
86563  * :---------------------------------------|:------|:--------------
86564  * ALT_USB_DEV_DOEPINT0_NAKINTRPT_E_INACT | 0x0 | No interrupt
86565  * ALT_USB_DEV_DOEPINT0_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
86566  *
86567  * Field Access Macros:
86568  *
86569  */
86570 /*
86571  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_NAKINTRPT
86572  *
86573  * No interrupt
86574  */
86575 #define ALT_USB_DEV_DOEPINT0_NAKINTRPT_E_INACT 0x0
86576 /*
86577  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_NAKINTRPT
86578  *
86579  * NAK Interrupt
86580  */
86581 #define ALT_USB_DEV_DOEPINT0_NAKINTRPT_E_ACT 0x1
86582 
86583 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_NAKINTRPT register field. */
86584 #define ALT_USB_DEV_DOEPINT0_NAKINTRPT_LSB 13
86585 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_NAKINTRPT register field. */
86586 #define ALT_USB_DEV_DOEPINT0_NAKINTRPT_MSB 13
86587 /* The width in bits of the ALT_USB_DEV_DOEPINT0_NAKINTRPT register field. */
86588 #define ALT_USB_DEV_DOEPINT0_NAKINTRPT_WIDTH 1
86589 /* The mask used to set the ALT_USB_DEV_DOEPINT0_NAKINTRPT register field value. */
86590 #define ALT_USB_DEV_DOEPINT0_NAKINTRPT_SET_MSK 0x00002000
86591 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_NAKINTRPT register field value. */
86592 #define ALT_USB_DEV_DOEPINT0_NAKINTRPT_CLR_MSK 0xffffdfff
86593 /* The reset value of the ALT_USB_DEV_DOEPINT0_NAKINTRPT register field. */
86594 #define ALT_USB_DEV_DOEPINT0_NAKINTRPT_RESET 0x0
86595 /* Extracts the ALT_USB_DEV_DOEPINT0_NAKINTRPT field value from a register. */
86596 #define ALT_USB_DEV_DOEPINT0_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
86597 /* Produces a ALT_USB_DEV_DOEPINT0_NAKINTRPT register field value suitable for setting the register. */
86598 #define ALT_USB_DEV_DOEPINT0_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
86599 
86600 /*
86601  * Field : NYET Interrupt - nyetintrpt
86602  *
86603  * The core generates this interrupt when a NYET response is transmitted for a non
86604  * isochronous OUT endpoint.
86605  *
86606  * Field Enumeration Values:
86607  *
86608  * Enum | Value | Description
86609  * :----------------------------------------|:------|:---------------
86610  * ALT_USB_DEV_DOEPINT0_NYETINTRPT_E_INACT | 0x0 | No interrupt
86611  * ALT_USB_DEV_DOEPINT0_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
86612  *
86613  * Field Access Macros:
86614  *
86615  */
86616 /*
86617  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_NYETINTRPT
86618  *
86619  * No interrupt
86620  */
86621 #define ALT_USB_DEV_DOEPINT0_NYETINTRPT_E_INACT 0x0
86622 /*
86623  * Enumerated value for register field ALT_USB_DEV_DOEPINT0_NYETINTRPT
86624  *
86625  * NYET Interrupt
86626  */
86627 #define ALT_USB_DEV_DOEPINT0_NYETINTRPT_E_ACT 0x1
86628 
86629 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT0_NYETINTRPT register field. */
86630 #define ALT_USB_DEV_DOEPINT0_NYETINTRPT_LSB 14
86631 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT0_NYETINTRPT register field. */
86632 #define ALT_USB_DEV_DOEPINT0_NYETINTRPT_MSB 14
86633 /* The width in bits of the ALT_USB_DEV_DOEPINT0_NYETINTRPT register field. */
86634 #define ALT_USB_DEV_DOEPINT0_NYETINTRPT_WIDTH 1
86635 /* The mask used to set the ALT_USB_DEV_DOEPINT0_NYETINTRPT register field value. */
86636 #define ALT_USB_DEV_DOEPINT0_NYETINTRPT_SET_MSK 0x00004000
86637 /* The mask used to clear the ALT_USB_DEV_DOEPINT0_NYETINTRPT register field value. */
86638 #define ALT_USB_DEV_DOEPINT0_NYETINTRPT_CLR_MSK 0xffffbfff
86639 /* The reset value of the ALT_USB_DEV_DOEPINT0_NYETINTRPT register field. */
86640 #define ALT_USB_DEV_DOEPINT0_NYETINTRPT_RESET 0x0
86641 /* Extracts the ALT_USB_DEV_DOEPINT0_NYETINTRPT field value from a register. */
86642 #define ALT_USB_DEV_DOEPINT0_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
86643 /* Produces a ALT_USB_DEV_DOEPINT0_NYETINTRPT register field value suitable for setting the register. */
86644 #define ALT_USB_DEV_DOEPINT0_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
86645 
86646 #ifndef __ASSEMBLY__
86647 /*
86648  * WARNING: The C register and register group struct declarations are provided for
86649  * convenience and illustrative purposes. They should, however, be used with
86650  * caution as the C language standard provides no guarantees about the alignment or
86651  * atomicity of device memory accesses. The recommended practice for writing
86652  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
86653  * alt_write_word() functions.
86654  *
86655  * The struct declaration for register ALT_USB_DEV_DOEPINT0.
86656  */
86657 struct ALT_USB_DEV_DOEPINT0_s
86658 {
86659  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
86660  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
86661  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT0_AHBERR */
86662  const uint32_t setup : 1; /* SETUP Phase Done */
86663  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
86664  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
86665  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
86666  uint32_t : 1; /* *UNDEFINED* */
86667  const uint32_t outpkterr : 1; /* OUT Packet Error */
86668  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
86669  uint32_t : 1; /* *UNDEFINED* */
86670  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
86671  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
86672  const uint32_t nakintrpt : 1; /* NAK Interrupt */
86673  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
86674  uint32_t : 17; /* *UNDEFINED* */
86675 };
86676 
86677 /* The typedef declaration for register ALT_USB_DEV_DOEPINT0. */
86678 typedef volatile struct ALT_USB_DEV_DOEPINT0_s ALT_USB_DEV_DOEPINT0_t;
86679 #endif /* __ASSEMBLY__ */
86680 
86681 /* The byte offset of the ALT_USB_DEV_DOEPINT0 register from the beginning of the component. */
86682 #define ALT_USB_DEV_DOEPINT0_OFST 0x308
86683 /* The address of the ALT_USB_DEV_DOEPINT0 register. */
86684 #define ALT_USB_DEV_DOEPINT0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT0_OFST))
86685 
86686 /*
86687  * Register : Device OUT Endpoint 0 Transfer Size Register - doeptsiz0
86688  *
86689  * The application must modify this register before enabling endpoint 0. Once
86690  * endpoint 0 is enabled using Endpoint Enable bit of the Device Control Endpoint 0
86691  * Control registers (DIEPCTL0.EPEna/DOEPCTL0.EPEna), the core modifies this
86692  * register. The application can only read this register once the core has cleared
86693  * the Endpoint Enable bit. Nonzero endpoints use the registers for endpoints 1 to
86694  * 15. When Scatter/Gather DMA mode is enabled, this register must not be
86695  * programmed by the application. If the application reads this register when
86696  * Scatter/Gather DMA mode is enabled, the core returns all zeros.
86697  *
86698  * Register Layout
86699  *
86700  * Bits | Access | Reset | Description
86701  * :--------|:-------|:------|:-----------------------------
86702  * [6:0] | RW | 0x0 | Transfer Size
86703  * [18:7] | ??? | 0x0 | *UNDEFINED*
86704  * [19] | RW | 0x0 | Packet Count
86705  * [28:20] | ??? | 0x0 | *UNDEFINED*
86706  * [30:29] | RW | 0x0 | ALT_USB_DEV_DOEPTSIZ0_SUPCNT
86707  * [31] | ??? | 0x0 | *UNDEFINED*
86708  *
86709  */
86710 /*
86711  * Field : Transfer Size - xfersize
86712  *
86713  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
86714  * application only after it has exhausted the transfer size amount of data. The
86715  * transfer size can be Set to the maximum packet size of the endpoint, to be
86716  * interrupted at the end of each packet. The core decrements this field every time
86717  * a packet from the external memory is written to the RxFIFO.
86718  *
86719  * Field Access Macros:
86720  *
86721  */
86722 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ0_XFERSIZE register field. */
86723 #define ALT_USB_DEV_DOEPTSIZ0_XFERSIZE_LSB 0
86724 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ0_XFERSIZE register field. */
86725 #define ALT_USB_DEV_DOEPTSIZ0_XFERSIZE_MSB 6
86726 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ0_XFERSIZE register field. */
86727 #define ALT_USB_DEV_DOEPTSIZ0_XFERSIZE_WIDTH 7
86728 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ0_XFERSIZE register field value. */
86729 #define ALT_USB_DEV_DOEPTSIZ0_XFERSIZE_SET_MSK 0x0000007f
86730 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ0_XFERSIZE register field value. */
86731 #define ALT_USB_DEV_DOEPTSIZ0_XFERSIZE_CLR_MSK 0xffffff80
86732 /* The reset value of the ALT_USB_DEV_DOEPTSIZ0_XFERSIZE register field. */
86733 #define ALT_USB_DEV_DOEPTSIZ0_XFERSIZE_RESET 0x0
86734 /* Extracts the ALT_USB_DEV_DOEPTSIZ0_XFERSIZE field value from a register. */
86735 #define ALT_USB_DEV_DOEPTSIZ0_XFERSIZE_GET(value) (((value) & 0x0000007f) >> 0)
86736 /* Produces a ALT_USB_DEV_DOEPTSIZ0_XFERSIZE register field value suitable for setting the register. */
86737 #define ALT_USB_DEV_DOEPTSIZ0_XFERSIZE_SET(value) (((value) << 0) & 0x0000007f)
86738 
86739 /*
86740  * Field : Packet Count - pktcnt
86741  *
86742  * This field is decremented to zero after a packet is written into the RxFIFO.
86743  *
86744  * Field Access Macros:
86745  *
86746  */
86747 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ0_PKTCNT register field. */
86748 #define ALT_USB_DEV_DOEPTSIZ0_PKTCNT_LSB 19
86749 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ0_PKTCNT register field. */
86750 #define ALT_USB_DEV_DOEPTSIZ0_PKTCNT_MSB 19
86751 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ0_PKTCNT register field. */
86752 #define ALT_USB_DEV_DOEPTSIZ0_PKTCNT_WIDTH 1
86753 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ0_PKTCNT register field value. */
86754 #define ALT_USB_DEV_DOEPTSIZ0_PKTCNT_SET_MSK 0x00080000
86755 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ0_PKTCNT register field value. */
86756 #define ALT_USB_DEV_DOEPTSIZ0_PKTCNT_CLR_MSK 0xfff7ffff
86757 /* The reset value of the ALT_USB_DEV_DOEPTSIZ0_PKTCNT register field. */
86758 #define ALT_USB_DEV_DOEPTSIZ0_PKTCNT_RESET 0x0
86759 /* Extracts the ALT_USB_DEV_DOEPTSIZ0_PKTCNT field value from a register. */
86760 #define ALT_USB_DEV_DOEPTSIZ0_PKTCNT_GET(value) (((value) & 0x00080000) >> 19)
86761 /* Produces a ALT_USB_DEV_DOEPTSIZ0_PKTCNT register field value suitable for setting the register. */
86762 #define ALT_USB_DEV_DOEPTSIZ0_PKTCNT_SET(value) (((value) << 19) & 0x00080000)
86763 
86764 /*
86765  * Field : supcnt
86766  *
86767  * SETUP Packet Count (SUPCnt)This field specifies the number of back-to-back SETUP
86768  * datapackets the endpoint can receive.
86769  *
86770  * Field Enumeration Values:
86771  *
86772  * Enum | Value | Description
86773  * :----------------------------------------|:------|:------------
86774  * ALT_USB_DEV_DOEPTSIZ0_SUPCNT_E_ONEPKT | 0x1 | 1 packet
86775  * ALT_USB_DEV_DOEPTSIZ0_SUPCNT_E_TWOPKT | 0x2 | 2 packets
86776  * ALT_USB_DEV_DOEPTSIZ0_SUPCNT_E_THREEPKT | 0x3 | 3 packets
86777  *
86778  * Field Access Macros:
86779  *
86780  */
86781 /*
86782  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ0_SUPCNT
86783  *
86784  * 1 packet
86785  */
86786 #define ALT_USB_DEV_DOEPTSIZ0_SUPCNT_E_ONEPKT 0x1
86787 /*
86788  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ0_SUPCNT
86789  *
86790  * 2 packets
86791  */
86792 #define ALT_USB_DEV_DOEPTSIZ0_SUPCNT_E_TWOPKT 0x2
86793 /*
86794  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ0_SUPCNT
86795  *
86796  * 3 packets
86797  */
86798 #define ALT_USB_DEV_DOEPTSIZ0_SUPCNT_E_THREEPKT 0x3
86799 
86800 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ0_SUPCNT register field. */
86801 #define ALT_USB_DEV_DOEPTSIZ0_SUPCNT_LSB 29
86802 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ0_SUPCNT register field. */
86803 #define ALT_USB_DEV_DOEPTSIZ0_SUPCNT_MSB 30
86804 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ0_SUPCNT register field. */
86805 #define ALT_USB_DEV_DOEPTSIZ0_SUPCNT_WIDTH 2
86806 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ0_SUPCNT register field value. */
86807 #define ALT_USB_DEV_DOEPTSIZ0_SUPCNT_SET_MSK 0x60000000
86808 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ0_SUPCNT register field value. */
86809 #define ALT_USB_DEV_DOEPTSIZ0_SUPCNT_CLR_MSK 0x9fffffff
86810 /* The reset value of the ALT_USB_DEV_DOEPTSIZ0_SUPCNT register field. */
86811 #define ALT_USB_DEV_DOEPTSIZ0_SUPCNT_RESET 0x0
86812 /* Extracts the ALT_USB_DEV_DOEPTSIZ0_SUPCNT field value from a register. */
86813 #define ALT_USB_DEV_DOEPTSIZ0_SUPCNT_GET(value) (((value) & 0x60000000) >> 29)
86814 /* Produces a ALT_USB_DEV_DOEPTSIZ0_SUPCNT register field value suitable for setting the register. */
86815 #define ALT_USB_DEV_DOEPTSIZ0_SUPCNT_SET(value) (((value) << 29) & 0x60000000)
86816 
86817 #ifndef __ASSEMBLY__
86818 /*
86819  * WARNING: The C register and register group struct declarations are provided for
86820  * convenience and illustrative purposes. They should, however, be used with
86821  * caution as the C language standard provides no guarantees about the alignment or
86822  * atomicity of device memory accesses. The recommended practice for writing
86823  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
86824  * alt_write_word() functions.
86825  *
86826  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ0.
86827  */
86828 struct ALT_USB_DEV_DOEPTSIZ0_s
86829 {
86830  uint32_t xfersize : 7; /* Transfer Size */
86831  uint32_t : 12; /* *UNDEFINED* */
86832  uint32_t pktcnt : 1; /* Packet Count */
86833  uint32_t : 9; /* *UNDEFINED* */
86834  uint32_t supcnt : 2; /* ALT_USB_DEV_DOEPTSIZ0_SUPCNT */
86835  uint32_t : 1; /* *UNDEFINED* */
86836 };
86837 
86838 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ0. */
86839 typedef volatile struct ALT_USB_DEV_DOEPTSIZ0_s ALT_USB_DEV_DOEPTSIZ0_t;
86840 #endif /* __ASSEMBLY__ */
86841 
86842 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ0 register from the beginning of the component. */
86843 #define ALT_USB_DEV_DOEPTSIZ0_OFST 0x310
86844 /* The address of the ALT_USB_DEV_DOEPTSIZ0 register. */
86845 #define ALT_USB_DEV_DOEPTSIZ0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ0_OFST))
86846 
86847 /*
86848  * Register : Device OUT Endpoint 0 DMA Address Register - doepdma0
86849  *
86850  * DMA Addressing.
86851  *
86852  * Register Layout
86853  *
86854  * Bits | Access | Reset | Description
86855  * :-------|:-------|:--------|:------------
86856  * [31:0] | RW | Unknown | DMA Address
86857  *
86858  */
86859 /*
86860  * Field : DMA Address - doepdma0
86861  *
86862  * Holds the start address of the external memory for storing or fetching endpoint
86863  * data. for control endpoints, this field stores control OUT data packets as well
86864  * as SETUP transaction data packets. When more than three SETUP packets are
86865  * received back-to-back, the SETUP data packet in the memory is overwritten. This
86866  * register is incremented on every AHB transaction. The application can give only
86867  * a DWORD-aligned address.
86868  *
86869  * When Scatter/Gather DMA mode is not enabled, the application programs the start
86870  * address value in this field.
86871  *
86872  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
86873  * for the descriptor list.
86874  *
86875  * Field Access Macros:
86876  *
86877  */
86878 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA0_DOEPDMA0 register field. */
86879 #define ALT_USB_DEV_DOEPDMA0_DOEPDMA0_LSB 0
86880 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA0_DOEPDMA0 register field. */
86881 #define ALT_USB_DEV_DOEPDMA0_DOEPDMA0_MSB 31
86882 /* The width in bits of the ALT_USB_DEV_DOEPDMA0_DOEPDMA0 register field. */
86883 #define ALT_USB_DEV_DOEPDMA0_DOEPDMA0_WIDTH 32
86884 /* The mask used to set the ALT_USB_DEV_DOEPDMA0_DOEPDMA0 register field value. */
86885 #define ALT_USB_DEV_DOEPDMA0_DOEPDMA0_SET_MSK 0xffffffff
86886 /* The mask used to clear the ALT_USB_DEV_DOEPDMA0_DOEPDMA0 register field value. */
86887 #define ALT_USB_DEV_DOEPDMA0_DOEPDMA0_CLR_MSK 0x00000000
86888 /* The reset value of the ALT_USB_DEV_DOEPDMA0_DOEPDMA0 register field is UNKNOWN. */
86889 #define ALT_USB_DEV_DOEPDMA0_DOEPDMA0_RESET 0x0
86890 /* Extracts the ALT_USB_DEV_DOEPDMA0_DOEPDMA0 field value from a register. */
86891 #define ALT_USB_DEV_DOEPDMA0_DOEPDMA0_GET(value) (((value) & 0xffffffff) >> 0)
86892 /* Produces a ALT_USB_DEV_DOEPDMA0_DOEPDMA0 register field value suitable for setting the register. */
86893 #define ALT_USB_DEV_DOEPDMA0_DOEPDMA0_SET(value) (((value) << 0) & 0xffffffff)
86894 
86895 #ifndef __ASSEMBLY__
86896 /*
86897  * WARNING: The C register and register group struct declarations are provided for
86898  * convenience and illustrative purposes. They should, however, be used with
86899  * caution as the C language standard provides no guarantees about the alignment or
86900  * atomicity of device memory accesses. The recommended practice for writing
86901  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
86902  * alt_write_word() functions.
86903  *
86904  * The struct declaration for register ALT_USB_DEV_DOEPDMA0.
86905  */
86906 struct ALT_USB_DEV_DOEPDMA0_s
86907 {
86908  uint32_t doepdma0 : 32; /* DMA Address */
86909 };
86910 
86911 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA0. */
86912 typedef volatile struct ALT_USB_DEV_DOEPDMA0_s ALT_USB_DEV_DOEPDMA0_t;
86913 #endif /* __ASSEMBLY__ */
86914 
86915 /* The byte offset of the ALT_USB_DEV_DOEPDMA0 register from the beginning of the component. */
86916 #define ALT_USB_DEV_DOEPDMA0_OFST 0x314
86917 /* The address of the ALT_USB_DEV_DOEPDMA0 register. */
86918 #define ALT_USB_DEV_DOEPDMA0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA0_OFST))
86919 
86920 /*
86921  * Register : Device OUT Endpoint 16 DMA Buffer Address Register - doepdmab0
86922  *
86923  * DMA Buffer Address.
86924  *
86925  * Register Layout
86926  *
86927  * Bits | Access | Reset | Description
86928  * :-------|:-------|:--------|:-------------------
86929  * [31:0] | R | Unknown | DMA Buffer Address
86930  *
86931  */
86932 /*
86933  * Field : DMA Buffer Address - doepdmab0
86934  *
86935  * Used with Scatter/Gather DMA.
86936  *
86937  * Field Access Macros:
86938  *
86939  */
86940 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0 register field. */
86941 #define ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0_LSB 0
86942 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0 register field. */
86943 #define ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0_MSB 31
86944 /* The width in bits of the ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0 register field. */
86945 #define ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0_WIDTH 32
86946 /* The mask used to set the ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0 register field value. */
86947 #define ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0_SET_MSK 0xffffffff
86948 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0 register field value. */
86949 #define ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0_CLR_MSK 0x00000000
86950 /* The reset value of the ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0 register field is UNKNOWN. */
86951 #define ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0_RESET 0x0
86952 /* Extracts the ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0 field value from a register. */
86953 #define ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0_GET(value) (((value) & 0xffffffff) >> 0)
86954 /* Produces a ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0 register field value suitable for setting the register. */
86955 #define ALT_USB_DEV_DOEPDMAB0_DOEPDMAB0_SET(value) (((value) << 0) & 0xffffffff)
86956 
86957 #ifndef __ASSEMBLY__
86958 /*
86959  * WARNING: The C register and register group struct declarations are provided for
86960  * convenience and illustrative purposes. They should, however, be used with
86961  * caution as the C language standard provides no guarantees about the alignment or
86962  * atomicity of device memory accesses. The recommended practice for writing
86963  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
86964  * alt_write_word() functions.
86965  *
86966  * The struct declaration for register ALT_USB_DEV_DOEPDMAB0.
86967  */
86968 struct ALT_USB_DEV_DOEPDMAB0_s
86969 {
86970  const uint32_t doepdmab0 : 32; /* DMA Buffer Address */
86971 };
86972 
86973 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB0. */
86974 typedef volatile struct ALT_USB_DEV_DOEPDMAB0_s ALT_USB_DEV_DOEPDMAB0_t;
86975 #endif /* __ASSEMBLY__ */
86976 
86977 /* The byte offset of the ALT_USB_DEV_DOEPDMAB0 register from the beginning of the component. */
86978 #define ALT_USB_DEV_DOEPDMAB0_OFST 0x31c
86979 /* The address of the ALT_USB_DEV_DOEPDMAB0 register. */
86980 #define ALT_USB_DEV_DOEPDMAB0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB0_OFST))
86981 
86982 /*
86983  * Register : Device Control OUT Endpoint 1 Control Register - doepctl1
86984  *
86985  * Out Endpoint 1.
86986  *
86987  * Register Layout
86988  *
86989  * Bits | Access | Reset | Description
86990  * :--------|:-------|:------|:--------------------
86991  * [10:0] | RW | 0x0 | Maximum Packet Size
86992  * [14:11] | ??? | 0x0 | *UNDEFINED*
86993  * [15] | RW | 0x0 | USB Active Endpoint
86994  * [16] | R | 0x0 | Endpoint Data PID
86995  * [17] | R | 0x0 | NAK Status
86996  * [19:18] | RW | 0x0 | Endpoint Type
86997  * [20] | RW | 0x0 | Snoop Mode
86998  * [21] | R | 0x0 | STALL Handshake
86999  * [25:22] | ??? | 0x0 | *UNDEFINED*
87000  * [26] | W | 0x0 | Clear NAK
87001  * [27] | W | 0x0 | Set NAK
87002  * [28] | W | 0x0 | Set DATA0 PID
87003  * [29] | W | 0x0 | Set DATA1 PID
87004  * [30] | R | 0x0 | Endpoint Disable
87005  * [31] | R | 0x0 | Endpoint Enable
87006  *
87007  */
87008 /*
87009  * Field : Maximum Packet Size - mps
87010  *
87011  * Applies to IN and OUT endpoints. The application must program this field with
87012  * the maximum packet size for the current logical endpoint. This value is in
87013  * bytes.
87014  *
87015  * Field Access Macros:
87016  *
87017  */
87018 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_MPS register field. */
87019 #define ALT_USB_DEV_DOEPCTL1_MPS_LSB 0
87020 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_MPS register field. */
87021 #define ALT_USB_DEV_DOEPCTL1_MPS_MSB 10
87022 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_MPS register field. */
87023 #define ALT_USB_DEV_DOEPCTL1_MPS_WIDTH 11
87024 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_MPS register field value. */
87025 #define ALT_USB_DEV_DOEPCTL1_MPS_SET_MSK 0x000007ff
87026 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_MPS register field value. */
87027 #define ALT_USB_DEV_DOEPCTL1_MPS_CLR_MSK 0xfffff800
87028 /* The reset value of the ALT_USB_DEV_DOEPCTL1_MPS register field. */
87029 #define ALT_USB_DEV_DOEPCTL1_MPS_RESET 0x0
87030 /* Extracts the ALT_USB_DEV_DOEPCTL1_MPS field value from a register. */
87031 #define ALT_USB_DEV_DOEPCTL1_MPS_GET(value) (((value) & 0x000007ff) >> 0)
87032 /* Produces a ALT_USB_DEV_DOEPCTL1_MPS register field value suitable for setting the register. */
87033 #define ALT_USB_DEV_DOEPCTL1_MPS_SET(value) (((value) << 0) & 0x000007ff)
87034 
87035 /*
87036  * Field : USB Active Endpoint - usbactep
87037  *
87038  * Indicates whether this endpoint is active in the current configuration and
87039  * interface. The core clears this bit for all endpoints (other than EP 0) after
87040  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
87041  * commands, the application must program endpoint registers accordingly and set
87042  * this bit.
87043  *
87044  * Field Enumeration Values:
87045  *
87046  * Enum | Value | Description
87047  * :-------------------------------------|:------|:--------------------
87048  * ALT_USB_DEV_DOEPCTL1_USBACTEP_E_DISD | 0x0 | Not Active
87049  * ALT_USB_DEV_DOEPCTL1_USBACTEP_E_END | 0x1 | USB Active Endpoint
87050  *
87051  * Field Access Macros:
87052  *
87053  */
87054 /*
87055  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_USBACTEP
87056  *
87057  * Not Active
87058  */
87059 #define ALT_USB_DEV_DOEPCTL1_USBACTEP_E_DISD 0x0
87060 /*
87061  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_USBACTEP
87062  *
87063  * USB Active Endpoint
87064  */
87065 #define ALT_USB_DEV_DOEPCTL1_USBACTEP_E_END 0x1
87066 
87067 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_USBACTEP register field. */
87068 #define ALT_USB_DEV_DOEPCTL1_USBACTEP_LSB 15
87069 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_USBACTEP register field. */
87070 #define ALT_USB_DEV_DOEPCTL1_USBACTEP_MSB 15
87071 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_USBACTEP register field. */
87072 #define ALT_USB_DEV_DOEPCTL1_USBACTEP_WIDTH 1
87073 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_USBACTEP register field value. */
87074 #define ALT_USB_DEV_DOEPCTL1_USBACTEP_SET_MSK 0x00008000
87075 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_USBACTEP register field value. */
87076 #define ALT_USB_DEV_DOEPCTL1_USBACTEP_CLR_MSK 0xffff7fff
87077 /* The reset value of the ALT_USB_DEV_DOEPCTL1_USBACTEP register field. */
87078 #define ALT_USB_DEV_DOEPCTL1_USBACTEP_RESET 0x0
87079 /* Extracts the ALT_USB_DEV_DOEPCTL1_USBACTEP field value from a register. */
87080 #define ALT_USB_DEV_DOEPCTL1_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
87081 /* Produces a ALT_USB_DEV_DOEPCTL1_USBACTEP register field value suitable for setting the register. */
87082 #define ALT_USB_DEV_DOEPCTL1_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
87083 
87084 /*
87085  * Field : Endpoint Data PID - dpid
87086  *
87087  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
87088  * packet to be received or transmitted on this endpoint. The application must
87089  * program the PID of the first packet to be received or transmitted on this
87090  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
87091  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
87092  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
87093  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
87094  * DMA mode:
87095  *
87096  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
87097  * number in which the core transmits/receives isochronous data for this endpoint.
87098  * The application must program the even/odd (micro) frame number in which it
87099  * intends to transmit/receive isochronous data for this endpoint using the
87100  * SetEvnFr and SetOddFr fields in this register.
87101  *
87102  * h 1'b0'b0: Even (micro)frame
87103  *
87104  * 1: Odd (micro)frame
87105  *
87106  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
87107  * number in which to send data is provided in the transmit descriptor structure.
87108  * The frame in which data is received is updated in receive descriptor structure.
87109  *
87110  * Field Enumeration Values:
87111  *
87112  * Enum | Value | Description
87113  * :----------------------------------|:------|:-----------------------------
87114  * ALT_USB_DEV_DOEPCTL1_DPID_E_INACT | 0x0 | Endpoint Data PID not active
87115  * ALT_USB_DEV_DOEPCTL1_DPID_E_ACT | 0x1 | Endpoint Data PID active
87116  *
87117  * Field Access Macros:
87118  *
87119  */
87120 /*
87121  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_DPID
87122  *
87123  * Endpoint Data PID not active
87124  */
87125 #define ALT_USB_DEV_DOEPCTL1_DPID_E_INACT 0x0
87126 /*
87127  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_DPID
87128  *
87129  * Endpoint Data PID active
87130  */
87131 #define ALT_USB_DEV_DOEPCTL1_DPID_E_ACT 0x1
87132 
87133 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_DPID register field. */
87134 #define ALT_USB_DEV_DOEPCTL1_DPID_LSB 16
87135 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_DPID register field. */
87136 #define ALT_USB_DEV_DOEPCTL1_DPID_MSB 16
87137 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_DPID register field. */
87138 #define ALT_USB_DEV_DOEPCTL1_DPID_WIDTH 1
87139 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_DPID register field value. */
87140 #define ALT_USB_DEV_DOEPCTL1_DPID_SET_MSK 0x00010000
87141 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_DPID register field value. */
87142 #define ALT_USB_DEV_DOEPCTL1_DPID_CLR_MSK 0xfffeffff
87143 /* The reset value of the ALT_USB_DEV_DOEPCTL1_DPID register field. */
87144 #define ALT_USB_DEV_DOEPCTL1_DPID_RESET 0x0
87145 /* Extracts the ALT_USB_DEV_DOEPCTL1_DPID field value from a register. */
87146 #define ALT_USB_DEV_DOEPCTL1_DPID_GET(value) (((value) & 0x00010000) >> 16)
87147 /* Produces a ALT_USB_DEV_DOEPCTL1_DPID register field value suitable for setting the register. */
87148 #define ALT_USB_DEV_DOEPCTL1_DPID_SET(value) (((value) << 16) & 0x00010000)
87149 
87150 /*
87151  * Field : NAK Status - naksts
87152  *
87153  * When either the application or the core sets this bit:
87154  *
87155  * * The core stops receiving any data on an OUT endpoint, even if there is space
87156  * in the RxFIFO to accommodate the incoming packet.
87157  *
87158  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
87159  * IN endpoint, even if there data is available in the TxFIFO.
87160  *
87161  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
87162  * even if there data is available in the TxFIFO.
87163  *
87164  * Irrespective of this bit's setting, the core always responds to SETUP data
87165  * packets with an ACK handshake.
87166  *
87167  * Field Enumeration Values:
87168  *
87169  * Enum | Value | Description
87170  * :-------------------------------------|:------|:------------------------------------------------
87171  * ALT_USB_DEV_DOEPCTL1_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
87172  * : | | based on the FIFO status
87173  * ALT_USB_DEV_DOEPCTL1_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
87174  * : | | endpoint
87175  *
87176  * Field Access Macros:
87177  *
87178  */
87179 /*
87180  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_NAKSTS
87181  *
87182  * The core is transmitting non-NAK handshakes based on the FIFO status
87183  */
87184 #define ALT_USB_DEV_DOEPCTL1_NAKSTS_E_NONNAK 0x0
87185 /*
87186  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_NAKSTS
87187  *
87188  * The core is transmitting NAK handshakes on this endpoint
87189  */
87190 #define ALT_USB_DEV_DOEPCTL1_NAKSTS_E_NAK 0x1
87191 
87192 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_NAKSTS register field. */
87193 #define ALT_USB_DEV_DOEPCTL1_NAKSTS_LSB 17
87194 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_NAKSTS register field. */
87195 #define ALT_USB_DEV_DOEPCTL1_NAKSTS_MSB 17
87196 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_NAKSTS register field. */
87197 #define ALT_USB_DEV_DOEPCTL1_NAKSTS_WIDTH 1
87198 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_NAKSTS register field value. */
87199 #define ALT_USB_DEV_DOEPCTL1_NAKSTS_SET_MSK 0x00020000
87200 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_NAKSTS register field value. */
87201 #define ALT_USB_DEV_DOEPCTL1_NAKSTS_CLR_MSK 0xfffdffff
87202 /* The reset value of the ALT_USB_DEV_DOEPCTL1_NAKSTS register field. */
87203 #define ALT_USB_DEV_DOEPCTL1_NAKSTS_RESET 0x0
87204 /* Extracts the ALT_USB_DEV_DOEPCTL1_NAKSTS field value from a register. */
87205 #define ALT_USB_DEV_DOEPCTL1_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
87206 /* Produces a ALT_USB_DEV_DOEPCTL1_NAKSTS register field value suitable for setting the register. */
87207 #define ALT_USB_DEV_DOEPCTL1_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
87208 
87209 /*
87210  * Field : Endpoint Type - eptype
87211  *
87212  * This is the transfer type supported by this logical endpoint.
87213  *
87214  * Field Enumeration Values:
87215  *
87216  * Enum | Value | Description
87217  * :------------------------------------------|:------|:------------
87218  * ALT_USB_DEV_DOEPCTL1_EPTYPE_E_CTL | 0x0 | Control
87219  * ALT_USB_DEV_DOEPCTL1_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
87220  * ALT_USB_DEV_DOEPCTL1_EPTYPE_E_BULK | 0x2 | Bulk
87221  * ALT_USB_DEV_DOEPCTL1_EPTYPE_E_INTERRUP | 0x3 | Interrupt
87222  *
87223  * Field Access Macros:
87224  *
87225  */
87226 /*
87227  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_EPTYPE
87228  *
87229  * Control
87230  */
87231 #define ALT_USB_DEV_DOEPCTL1_EPTYPE_E_CTL 0x0
87232 /*
87233  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_EPTYPE
87234  *
87235  * Isochronous
87236  */
87237 #define ALT_USB_DEV_DOEPCTL1_EPTYPE_E_ISOCHRONOUS 0x1
87238 /*
87239  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_EPTYPE
87240  *
87241  * Bulk
87242  */
87243 #define ALT_USB_DEV_DOEPCTL1_EPTYPE_E_BULK 0x2
87244 /*
87245  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_EPTYPE
87246  *
87247  * Interrupt
87248  */
87249 #define ALT_USB_DEV_DOEPCTL1_EPTYPE_E_INTERRUP 0x3
87250 
87251 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_EPTYPE register field. */
87252 #define ALT_USB_DEV_DOEPCTL1_EPTYPE_LSB 18
87253 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_EPTYPE register field. */
87254 #define ALT_USB_DEV_DOEPCTL1_EPTYPE_MSB 19
87255 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_EPTYPE register field. */
87256 #define ALT_USB_DEV_DOEPCTL1_EPTYPE_WIDTH 2
87257 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_EPTYPE register field value. */
87258 #define ALT_USB_DEV_DOEPCTL1_EPTYPE_SET_MSK 0x000c0000
87259 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_EPTYPE register field value. */
87260 #define ALT_USB_DEV_DOEPCTL1_EPTYPE_CLR_MSK 0xfff3ffff
87261 /* The reset value of the ALT_USB_DEV_DOEPCTL1_EPTYPE register field. */
87262 #define ALT_USB_DEV_DOEPCTL1_EPTYPE_RESET 0x0
87263 /* Extracts the ALT_USB_DEV_DOEPCTL1_EPTYPE field value from a register. */
87264 #define ALT_USB_DEV_DOEPCTL1_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
87265 /* Produces a ALT_USB_DEV_DOEPCTL1_EPTYPE register field value suitable for setting the register. */
87266 #define ALT_USB_DEV_DOEPCTL1_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
87267 
87268 /*
87269  * Field : Snoop Mode - snp
87270  *
87271  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
87272  * In Snoop mode, the core does not check the correctness of OUT packets before
87273  * transferring them to application memory.
87274  *
87275  * Field Enumeration Values:
87276  *
87277  * Enum | Value | Description
87278  * :-------------------------------|:------|:-------------------
87279  * ALT_USB_DEV_DOEPCTL1_SNP_E_DIS | 0x0 | Disable Snoop Mode
87280  * ALT_USB_DEV_DOEPCTL1_SNP_E_EN | 0x1 | Enable Snoop Mode
87281  *
87282  * Field Access Macros:
87283  *
87284  */
87285 /*
87286  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_SNP
87287  *
87288  * Disable Snoop Mode
87289  */
87290 #define ALT_USB_DEV_DOEPCTL1_SNP_E_DIS 0x0
87291 /*
87292  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_SNP
87293  *
87294  * Enable Snoop Mode
87295  */
87296 #define ALT_USB_DEV_DOEPCTL1_SNP_E_EN 0x1
87297 
87298 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_SNP register field. */
87299 #define ALT_USB_DEV_DOEPCTL1_SNP_LSB 20
87300 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_SNP register field. */
87301 #define ALT_USB_DEV_DOEPCTL1_SNP_MSB 20
87302 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_SNP register field. */
87303 #define ALT_USB_DEV_DOEPCTL1_SNP_WIDTH 1
87304 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_SNP register field value. */
87305 #define ALT_USB_DEV_DOEPCTL1_SNP_SET_MSK 0x00100000
87306 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_SNP register field value. */
87307 #define ALT_USB_DEV_DOEPCTL1_SNP_CLR_MSK 0xffefffff
87308 /* The reset value of the ALT_USB_DEV_DOEPCTL1_SNP register field. */
87309 #define ALT_USB_DEV_DOEPCTL1_SNP_RESET 0x0
87310 /* Extracts the ALT_USB_DEV_DOEPCTL1_SNP field value from a register. */
87311 #define ALT_USB_DEV_DOEPCTL1_SNP_GET(value) (((value) & 0x00100000) >> 20)
87312 /* Produces a ALT_USB_DEV_DOEPCTL1_SNP register field value suitable for setting the register. */
87313 #define ALT_USB_DEV_DOEPCTL1_SNP_SET(value) (((value) << 20) & 0x00100000)
87314 
87315 /*
87316  * Field : STALL Handshake - stall
87317  *
87318  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
87319  * application sets this bit to stall all tokens from the USB host to this
87320  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
87321  * along with this bit, the STALL bit takes priority. Only the application can
87322  * clear this bit, never the core. Applies to control endpoints only. The
87323  * application can only set this bit, and the core clears it, when a SETUP token is
87324  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
87325  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
87326  * of this bit's setting, the core always responds to SETUP data packets with an
87327  * ACK handshake.
87328  *
87329  * Field Enumeration Values:
87330  *
87331  * Enum | Value | Description
87332  * :-----------------------------------|:------|:----------------------------
87333  * ALT_USB_DEV_DOEPCTL1_STALL_E_INACT | 0x0 | STALL All Tokens not active
87334  * ALT_USB_DEV_DOEPCTL1_STALL_E_ACT | 0x1 | STALL All Tokens active
87335  *
87336  * Field Access Macros:
87337  *
87338  */
87339 /*
87340  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_STALL
87341  *
87342  * STALL All Tokens not active
87343  */
87344 #define ALT_USB_DEV_DOEPCTL1_STALL_E_INACT 0x0
87345 /*
87346  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_STALL
87347  *
87348  * STALL All Tokens active
87349  */
87350 #define ALT_USB_DEV_DOEPCTL1_STALL_E_ACT 0x1
87351 
87352 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_STALL register field. */
87353 #define ALT_USB_DEV_DOEPCTL1_STALL_LSB 21
87354 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_STALL register field. */
87355 #define ALT_USB_DEV_DOEPCTL1_STALL_MSB 21
87356 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_STALL register field. */
87357 #define ALT_USB_DEV_DOEPCTL1_STALL_WIDTH 1
87358 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_STALL register field value. */
87359 #define ALT_USB_DEV_DOEPCTL1_STALL_SET_MSK 0x00200000
87360 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_STALL register field value. */
87361 #define ALT_USB_DEV_DOEPCTL1_STALL_CLR_MSK 0xffdfffff
87362 /* The reset value of the ALT_USB_DEV_DOEPCTL1_STALL register field. */
87363 #define ALT_USB_DEV_DOEPCTL1_STALL_RESET 0x0
87364 /* Extracts the ALT_USB_DEV_DOEPCTL1_STALL field value from a register. */
87365 #define ALT_USB_DEV_DOEPCTL1_STALL_GET(value) (((value) & 0x00200000) >> 21)
87366 /* Produces a ALT_USB_DEV_DOEPCTL1_STALL register field value suitable for setting the register. */
87367 #define ALT_USB_DEV_DOEPCTL1_STALL_SET(value) (((value) << 21) & 0x00200000)
87368 
87369 /*
87370  * Field : Clear NAK - cnak
87371  *
87372  * A write to this bit clears the NAK bit for the endpoint.
87373  *
87374  * Field Enumeration Values:
87375  *
87376  * Enum | Value | Description
87377  * :----------------------------------|:------|:-------------
87378  * ALT_USB_DEV_DOEPCTL1_CNAK_E_INACT | 0x0 | No Clear NAK
87379  * ALT_USB_DEV_DOEPCTL1_CNAK_E_ACT | 0x1 | Clear NAK
87380  *
87381  * Field Access Macros:
87382  *
87383  */
87384 /*
87385  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_CNAK
87386  *
87387  * No Clear NAK
87388  */
87389 #define ALT_USB_DEV_DOEPCTL1_CNAK_E_INACT 0x0
87390 /*
87391  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_CNAK
87392  *
87393  * Clear NAK
87394  */
87395 #define ALT_USB_DEV_DOEPCTL1_CNAK_E_ACT 0x1
87396 
87397 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_CNAK register field. */
87398 #define ALT_USB_DEV_DOEPCTL1_CNAK_LSB 26
87399 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_CNAK register field. */
87400 #define ALT_USB_DEV_DOEPCTL1_CNAK_MSB 26
87401 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_CNAK register field. */
87402 #define ALT_USB_DEV_DOEPCTL1_CNAK_WIDTH 1
87403 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_CNAK register field value. */
87404 #define ALT_USB_DEV_DOEPCTL1_CNAK_SET_MSK 0x04000000
87405 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_CNAK register field value. */
87406 #define ALT_USB_DEV_DOEPCTL1_CNAK_CLR_MSK 0xfbffffff
87407 /* The reset value of the ALT_USB_DEV_DOEPCTL1_CNAK register field. */
87408 #define ALT_USB_DEV_DOEPCTL1_CNAK_RESET 0x0
87409 /* Extracts the ALT_USB_DEV_DOEPCTL1_CNAK field value from a register. */
87410 #define ALT_USB_DEV_DOEPCTL1_CNAK_GET(value) (((value) & 0x04000000) >> 26)
87411 /* Produces a ALT_USB_DEV_DOEPCTL1_CNAK register field value suitable for setting the register. */
87412 #define ALT_USB_DEV_DOEPCTL1_CNAK_SET(value) (((value) << 26) & 0x04000000)
87413 
87414 /*
87415  * Field : Set NAK - snak
87416  *
87417  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
87418  * application can control the transmission of NAK handshakes on an endpoint. The
87419  * core can also Set this bit for an endpoint after a SETUP packet is received on
87420  * that endpoint.
87421  *
87422  * Field Enumeration Values:
87423  *
87424  * Enum | Value | Description
87425  * :----------------------------------|:------|:------------
87426  * ALT_USB_DEV_DOEPCTL1_SNAK_E_INACT | 0x0 | No Set NAK
87427  * ALT_USB_DEV_DOEPCTL1_SNAK_E_ACT | 0x1 | Set NAK
87428  *
87429  * Field Access Macros:
87430  *
87431  */
87432 /*
87433  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_SNAK
87434  *
87435  * No Set NAK
87436  */
87437 #define ALT_USB_DEV_DOEPCTL1_SNAK_E_INACT 0x0
87438 /*
87439  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_SNAK
87440  *
87441  * Set NAK
87442  */
87443 #define ALT_USB_DEV_DOEPCTL1_SNAK_E_ACT 0x1
87444 
87445 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_SNAK register field. */
87446 #define ALT_USB_DEV_DOEPCTL1_SNAK_LSB 27
87447 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_SNAK register field. */
87448 #define ALT_USB_DEV_DOEPCTL1_SNAK_MSB 27
87449 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_SNAK register field. */
87450 #define ALT_USB_DEV_DOEPCTL1_SNAK_WIDTH 1
87451 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_SNAK register field value. */
87452 #define ALT_USB_DEV_DOEPCTL1_SNAK_SET_MSK 0x08000000
87453 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_SNAK register field value. */
87454 #define ALT_USB_DEV_DOEPCTL1_SNAK_CLR_MSK 0xf7ffffff
87455 /* The reset value of the ALT_USB_DEV_DOEPCTL1_SNAK register field. */
87456 #define ALT_USB_DEV_DOEPCTL1_SNAK_RESET 0x0
87457 /* Extracts the ALT_USB_DEV_DOEPCTL1_SNAK field value from a register. */
87458 #define ALT_USB_DEV_DOEPCTL1_SNAK_GET(value) (((value) & 0x08000000) >> 27)
87459 /* Produces a ALT_USB_DEV_DOEPCTL1_SNAK register field value suitable for setting the register. */
87460 #define ALT_USB_DEV_DOEPCTL1_SNAK_SET(value) (((value) << 27) & 0x08000000)
87461 
87462 /*
87463  * Field : Set DATA0 PID - setd0pid
87464  *
87465  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
87466  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
87467  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
87468  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
87469  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
87470  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
87471  * mode is enabled, this field is reserved. The frame number in which to send data
87472  * is in the transmit descriptor structure. The frame in which to receive data is
87473  * updated in receive descriptor structure.
87474  *
87475  * Field Enumeration Values:
87476  *
87477  * Enum | Value | Description
87478  * :-------------------------------------|:------|:------------------------------------
87479  * ALT_USB_DEV_DOEPCTL1_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
87480  * ALT_USB_DEV_DOEPCTL1_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
87481  *
87482  * Field Access Macros:
87483  *
87484  */
87485 /*
87486  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_SETD0PID
87487  *
87488  * Disables Set DATA0 PID
87489  */
87490 #define ALT_USB_DEV_DOEPCTL1_SETD0PID_E_DISD 0x0
87491 /*
87492  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_SETD0PID
87493  *
87494  * Enables Endpoint Data PID to DATA0)
87495  */
87496 #define ALT_USB_DEV_DOEPCTL1_SETD0PID_E_END 0x1
87497 
87498 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_SETD0PID register field. */
87499 #define ALT_USB_DEV_DOEPCTL1_SETD0PID_LSB 28
87500 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_SETD0PID register field. */
87501 #define ALT_USB_DEV_DOEPCTL1_SETD0PID_MSB 28
87502 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_SETD0PID register field. */
87503 #define ALT_USB_DEV_DOEPCTL1_SETD0PID_WIDTH 1
87504 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_SETD0PID register field value. */
87505 #define ALT_USB_DEV_DOEPCTL1_SETD0PID_SET_MSK 0x10000000
87506 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_SETD0PID register field value. */
87507 #define ALT_USB_DEV_DOEPCTL1_SETD0PID_CLR_MSK 0xefffffff
87508 /* The reset value of the ALT_USB_DEV_DOEPCTL1_SETD0PID register field. */
87509 #define ALT_USB_DEV_DOEPCTL1_SETD0PID_RESET 0x0
87510 /* Extracts the ALT_USB_DEV_DOEPCTL1_SETD0PID field value from a register. */
87511 #define ALT_USB_DEV_DOEPCTL1_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
87512 /* Produces a ALT_USB_DEV_DOEPCTL1_SETD0PID register field value suitable for setting the register. */
87513 #define ALT_USB_DEV_DOEPCTL1_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
87514 
87515 /*
87516  * Field : Set DATA1 PID - setd1pid
87517  *
87518  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
87519  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
87520  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
87521  *
87522  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
87523  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
87524  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
87525  *
87526  * Field Enumeration Values:
87527  *
87528  * Enum | Value | Description
87529  * :-------------------------------------|:------|:-----------------------
87530  * ALT_USB_DEV_DOEPCTL1_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
87531  * ALT_USB_DEV_DOEPCTL1_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
87532  *
87533  * Field Access Macros:
87534  *
87535  */
87536 /*
87537  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_SETD1PID
87538  *
87539  * Disables Set DATA1 PID
87540  */
87541 #define ALT_USB_DEV_DOEPCTL1_SETD1PID_E_DISD 0x0
87542 /*
87543  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_SETD1PID
87544  *
87545  * Enables Set DATA1 PID
87546  */
87547 #define ALT_USB_DEV_DOEPCTL1_SETD1PID_E_END 0x1
87548 
87549 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_SETD1PID register field. */
87550 #define ALT_USB_DEV_DOEPCTL1_SETD1PID_LSB 29
87551 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_SETD1PID register field. */
87552 #define ALT_USB_DEV_DOEPCTL1_SETD1PID_MSB 29
87553 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_SETD1PID register field. */
87554 #define ALT_USB_DEV_DOEPCTL1_SETD1PID_WIDTH 1
87555 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_SETD1PID register field value. */
87556 #define ALT_USB_DEV_DOEPCTL1_SETD1PID_SET_MSK 0x20000000
87557 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_SETD1PID register field value. */
87558 #define ALT_USB_DEV_DOEPCTL1_SETD1PID_CLR_MSK 0xdfffffff
87559 /* The reset value of the ALT_USB_DEV_DOEPCTL1_SETD1PID register field. */
87560 #define ALT_USB_DEV_DOEPCTL1_SETD1PID_RESET 0x0
87561 /* Extracts the ALT_USB_DEV_DOEPCTL1_SETD1PID field value from a register. */
87562 #define ALT_USB_DEV_DOEPCTL1_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
87563 /* Produces a ALT_USB_DEV_DOEPCTL1_SETD1PID register field value suitable for setting the register. */
87564 #define ALT_USB_DEV_DOEPCTL1_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
87565 
87566 /*
87567  * Field : Endpoint Disable - epdis
87568  *
87569  * Applies to IN and OUT endpoints. The application sets this bit to stop
87570  * transmitting/receiving data on an endpoint, even before the transfer for that
87571  * endpoint is complete. The application must wait for the Endpoint Disabled
87572  * interrupt before treating the endpoint as disabled. The core clears this bit
87573  * before setting the Endpoint Disabled interrupt. The application must set this
87574  * bit only if Endpoint Enable is already set for this endpoint.
87575  *
87576  * Field Enumeration Values:
87577  *
87578  * Enum | Value | Description
87579  * :-----------------------------------|:------|:--------------------
87580  * ALT_USB_DEV_DOEPCTL1_EPDIS_E_INACT | 0x0 | No Endpoint Disable
87581  * ALT_USB_DEV_DOEPCTL1_EPDIS_E_ACT | 0x1 | Endpoint Disable
87582  *
87583  * Field Access Macros:
87584  *
87585  */
87586 /*
87587  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_EPDIS
87588  *
87589  * No Endpoint Disable
87590  */
87591 #define ALT_USB_DEV_DOEPCTL1_EPDIS_E_INACT 0x0
87592 /*
87593  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_EPDIS
87594  *
87595  * Endpoint Disable
87596  */
87597 #define ALT_USB_DEV_DOEPCTL1_EPDIS_E_ACT 0x1
87598 
87599 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_EPDIS register field. */
87600 #define ALT_USB_DEV_DOEPCTL1_EPDIS_LSB 30
87601 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_EPDIS register field. */
87602 #define ALT_USB_DEV_DOEPCTL1_EPDIS_MSB 30
87603 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_EPDIS register field. */
87604 #define ALT_USB_DEV_DOEPCTL1_EPDIS_WIDTH 1
87605 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_EPDIS register field value. */
87606 #define ALT_USB_DEV_DOEPCTL1_EPDIS_SET_MSK 0x40000000
87607 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_EPDIS register field value. */
87608 #define ALT_USB_DEV_DOEPCTL1_EPDIS_CLR_MSK 0xbfffffff
87609 /* The reset value of the ALT_USB_DEV_DOEPCTL1_EPDIS register field. */
87610 #define ALT_USB_DEV_DOEPCTL1_EPDIS_RESET 0x0
87611 /* Extracts the ALT_USB_DEV_DOEPCTL1_EPDIS field value from a register. */
87612 #define ALT_USB_DEV_DOEPCTL1_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
87613 /* Produces a ALT_USB_DEV_DOEPCTL1_EPDIS register field value suitable for setting the register. */
87614 #define ALT_USB_DEV_DOEPCTL1_EPDIS_SET(value) (((value) << 30) & 0x40000000)
87615 
87616 /*
87617  * Field : Endpoint Enable - epena
87618  *
87619  * Applies to IN and OUT endpoints.
87620  *
87621  * * When Scatter/Gather DMA mode is enabled,
87622  *
87623  * * for IN endpoints this bit indicates that the descriptor structure and data
87624  * buffer with data ready to transmit is setup.
87625  *
87626  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
87627  * receive data is setup.
87628  *
87629  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
87630  * mode:
87631  *
87632  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
87633  * the endpoint.
87634  *
87635  * * for OUT endpoints, this bit indicates that the application has allocated the
87636  * memory to start receiving data from the USB.
87637  *
87638  * * The core clears this bit before setting any of the following interrupts on
87639  * this endpoint:
87640  *
87641  * * SETUP Phase Done
87642  *
87643  * * Endpoint Disabled
87644  *
87645  * * Transfer Completed
87646  *
87647  * for control endpoints in DMA mode, this bit must be set to be able to transfer
87648  * SETUP data packets in memory.
87649  *
87650  * Field Enumeration Values:
87651  *
87652  * Enum | Value | Description
87653  * :-----------------------------------|:------|:-------------------------
87654  * ALT_USB_DEV_DOEPCTL1_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
87655  * ALT_USB_DEV_DOEPCTL1_EPENA_E_ACT | 0x1 | Endpoint Enable active
87656  *
87657  * Field Access Macros:
87658  *
87659  */
87660 /*
87661  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_EPENA
87662  *
87663  * Endpoint Enable inactive
87664  */
87665 #define ALT_USB_DEV_DOEPCTL1_EPENA_E_INACT 0x0
87666 /*
87667  * Enumerated value for register field ALT_USB_DEV_DOEPCTL1_EPENA
87668  *
87669  * Endpoint Enable active
87670  */
87671 #define ALT_USB_DEV_DOEPCTL1_EPENA_E_ACT 0x1
87672 
87673 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL1_EPENA register field. */
87674 #define ALT_USB_DEV_DOEPCTL1_EPENA_LSB 31
87675 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL1_EPENA register field. */
87676 #define ALT_USB_DEV_DOEPCTL1_EPENA_MSB 31
87677 /* The width in bits of the ALT_USB_DEV_DOEPCTL1_EPENA register field. */
87678 #define ALT_USB_DEV_DOEPCTL1_EPENA_WIDTH 1
87679 /* The mask used to set the ALT_USB_DEV_DOEPCTL1_EPENA register field value. */
87680 #define ALT_USB_DEV_DOEPCTL1_EPENA_SET_MSK 0x80000000
87681 /* The mask used to clear the ALT_USB_DEV_DOEPCTL1_EPENA register field value. */
87682 #define ALT_USB_DEV_DOEPCTL1_EPENA_CLR_MSK 0x7fffffff
87683 /* The reset value of the ALT_USB_DEV_DOEPCTL1_EPENA register field. */
87684 #define ALT_USB_DEV_DOEPCTL1_EPENA_RESET 0x0
87685 /* Extracts the ALT_USB_DEV_DOEPCTL1_EPENA field value from a register. */
87686 #define ALT_USB_DEV_DOEPCTL1_EPENA_GET(value) (((value) & 0x80000000) >> 31)
87687 /* Produces a ALT_USB_DEV_DOEPCTL1_EPENA register field value suitable for setting the register. */
87688 #define ALT_USB_DEV_DOEPCTL1_EPENA_SET(value) (((value) << 31) & 0x80000000)
87689 
87690 #ifndef __ASSEMBLY__
87691 /*
87692  * WARNING: The C register and register group struct declarations are provided for
87693  * convenience and illustrative purposes. They should, however, be used with
87694  * caution as the C language standard provides no guarantees about the alignment or
87695  * atomicity of device memory accesses. The recommended practice for writing
87696  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
87697  * alt_write_word() functions.
87698  *
87699  * The struct declaration for register ALT_USB_DEV_DOEPCTL1.
87700  */
87701 struct ALT_USB_DEV_DOEPCTL1_s
87702 {
87703  uint32_t mps : 11; /* Maximum Packet Size */
87704  uint32_t : 4; /* *UNDEFINED* */
87705  uint32_t usbactep : 1; /* USB Active Endpoint */
87706  const uint32_t dpid : 1; /* Endpoint Data PID */
87707  const uint32_t naksts : 1; /* NAK Status */
87708  uint32_t eptype : 2; /* Endpoint Type */
87709  uint32_t snp : 1; /* Snoop Mode */
87710  const uint32_t stall : 1; /* STALL Handshake */
87711  uint32_t : 4; /* *UNDEFINED* */
87712  uint32_t cnak : 1; /* Clear NAK */
87713  uint32_t snak : 1; /* Set NAK */
87714  uint32_t setd0pid : 1; /* Set DATA0 PID */
87715  uint32_t setd1pid : 1; /* Set DATA1 PID */
87716  const uint32_t epdis : 1; /* Endpoint Disable */
87717  const uint32_t epena : 1; /* Endpoint Enable */
87718 };
87719 
87720 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL1. */
87721 typedef volatile struct ALT_USB_DEV_DOEPCTL1_s ALT_USB_DEV_DOEPCTL1_t;
87722 #endif /* __ASSEMBLY__ */
87723 
87724 /* The byte offset of the ALT_USB_DEV_DOEPCTL1 register from the beginning of the component. */
87725 #define ALT_USB_DEV_DOEPCTL1_OFST 0x320
87726 /* The address of the ALT_USB_DEV_DOEPCTL1 register. */
87727 #define ALT_USB_DEV_DOEPCTL1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL1_OFST))
87728 
87729 /*
87730  * Register : Device OUT Endpoint 1 Interrupt Register - doepint1
87731  *
87732  * This register indicates the status of an endpoint with respect to USB- and AHB-
87733  * related events. The application must read this register when the OUT Endpoints
87734  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
87735  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
87736  * can read this register, it must first read the Device All Endpoints Interrupt
87737  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
87738  * Interrupt register. The application must clear the appropriate bit in this
87739  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
87740  *
87741  * Register Layout
87742  *
87743  * Bits | Access | Reset | Description
87744  * :--------|:-------|:------|:------------------------------------------
87745  * [0] | R | 0x0 | Transfer Completed Interrupt
87746  * [1] | R | 0x0 | Endpoint Disabled Interrupt
87747  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT1_AHBERR
87748  * [3] | R | 0x0 | SETUP Phase Done
87749  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
87750  * [5] | R | 0x0 | Status Phase Received for Control Write
87751  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
87752  * [7] | ??? | 0x0 | *UNDEFINED*
87753  * [8] | R | 0x0 | OUT Packet Error
87754  * [9] | R | 0x0 | BNA Interrupt
87755  * [10] | ??? | 0x0 | *UNDEFINED*
87756  * [11] | R | 0x0 | Packet Drop Status
87757  * [12] | R | 0x0 | BbleErr Interrupt
87758  * [13] | R | 0x0 | NAK Interrupt
87759  * [14] | R | 0x0 | NYET Interrupt
87760  * [31:15] | ??? | 0x0 | *UNDEFINED*
87761  *
87762  */
87763 /*
87764  * Field : Transfer Completed Interrupt - xfercompl
87765  *
87766  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
87767  *
87768  * This field indicates that the requested data from the internal FIFO is moved to
87769  * external system memory. This interrupt is generated only when the corresponding
87770  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
87771  * is Set.
87772  *
87773  * When Scatter/Gather DMA mode is disabled, this field indicates that the
87774  * programmed transfer is complete on the AHB as well as on the USB, for this
87775  * endpoint.
87776  *
87777  * Field Enumeration Values:
87778  *
87779  * Enum | Value | Description
87780  * :---------------------------------------|:------|:-----------------------------
87781  * ALT_USB_DEV_DOEPINT1_XFERCOMPL_E_INACT | 0x0 | No Interrupt
87782  * ALT_USB_DEV_DOEPINT1_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
87783  *
87784  * Field Access Macros:
87785  *
87786  */
87787 /*
87788  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_XFERCOMPL
87789  *
87790  * No Interrupt
87791  */
87792 #define ALT_USB_DEV_DOEPINT1_XFERCOMPL_E_INACT 0x0
87793 /*
87794  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_XFERCOMPL
87795  *
87796  * Transfer Completed Interrupt
87797  */
87798 #define ALT_USB_DEV_DOEPINT1_XFERCOMPL_E_ACT 0x1
87799 
87800 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_XFERCOMPL register field. */
87801 #define ALT_USB_DEV_DOEPINT1_XFERCOMPL_LSB 0
87802 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_XFERCOMPL register field. */
87803 #define ALT_USB_DEV_DOEPINT1_XFERCOMPL_MSB 0
87804 /* The width in bits of the ALT_USB_DEV_DOEPINT1_XFERCOMPL register field. */
87805 #define ALT_USB_DEV_DOEPINT1_XFERCOMPL_WIDTH 1
87806 /* The mask used to set the ALT_USB_DEV_DOEPINT1_XFERCOMPL register field value. */
87807 #define ALT_USB_DEV_DOEPINT1_XFERCOMPL_SET_MSK 0x00000001
87808 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_XFERCOMPL register field value. */
87809 #define ALT_USB_DEV_DOEPINT1_XFERCOMPL_CLR_MSK 0xfffffffe
87810 /* The reset value of the ALT_USB_DEV_DOEPINT1_XFERCOMPL register field. */
87811 #define ALT_USB_DEV_DOEPINT1_XFERCOMPL_RESET 0x0
87812 /* Extracts the ALT_USB_DEV_DOEPINT1_XFERCOMPL field value from a register. */
87813 #define ALT_USB_DEV_DOEPINT1_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
87814 /* Produces a ALT_USB_DEV_DOEPINT1_XFERCOMPL register field value suitable for setting the register. */
87815 #define ALT_USB_DEV_DOEPINT1_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
87816 
87817 /*
87818  * Field : Endpoint Disabled Interrupt - epdisbld
87819  *
87820  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
87821  * disabled per the application's request.
87822  *
87823  * Field Enumeration Values:
87824  *
87825  * Enum | Value | Description
87826  * :--------------------------------------|:------|:----------------------------
87827  * ALT_USB_DEV_DOEPINT1_EPDISBLD_E_INACT | 0x0 | No Interrupt
87828  * ALT_USB_DEV_DOEPINT1_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
87829  *
87830  * Field Access Macros:
87831  *
87832  */
87833 /*
87834  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_EPDISBLD
87835  *
87836  * No Interrupt
87837  */
87838 #define ALT_USB_DEV_DOEPINT1_EPDISBLD_E_INACT 0x0
87839 /*
87840  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_EPDISBLD
87841  *
87842  * Endpoint Disabled Interrupt
87843  */
87844 #define ALT_USB_DEV_DOEPINT1_EPDISBLD_E_ACT 0x1
87845 
87846 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_EPDISBLD register field. */
87847 #define ALT_USB_DEV_DOEPINT1_EPDISBLD_LSB 1
87848 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_EPDISBLD register field. */
87849 #define ALT_USB_DEV_DOEPINT1_EPDISBLD_MSB 1
87850 /* The width in bits of the ALT_USB_DEV_DOEPINT1_EPDISBLD register field. */
87851 #define ALT_USB_DEV_DOEPINT1_EPDISBLD_WIDTH 1
87852 /* The mask used to set the ALT_USB_DEV_DOEPINT1_EPDISBLD register field value. */
87853 #define ALT_USB_DEV_DOEPINT1_EPDISBLD_SET_MSK 0x00000002
87854 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_EPDISBLD register field value. */
87855 #define ALT_USB_DEV_DOEPINT1_EPDISBLD_CLR_MSK 0xfffffffd
87856 /* The reset value of the ALT_USB_DEV_DOEPINT1_EPDISBLD register field. */
87857 #define ALT_USB_DEV_DOEPINT1_EPDISBLD_RESET 0x0
87858 /* Extracts the ALT_USB_DEV_DOEPINT1_EPDISBLD field value from a register. */
87859 #define ALT_USB_DEV_DOEPINT1_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
87860 /* Produces a ALT_USB_DEV_DOEPINT1_EPDISBLD register field value suitable for setting the register. */
87861 #define ALT_USB_DEV_DOEPINT1_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
87862 
87863 /*
87864  * Field : ahberr
87865  *
87866  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
87867  * there is an AHB error during an AHB read/write. The application can read the
87868  * corresponding endpoint DMA address register to get the error address.
87869  *
87870  * Field Enumeration Values:
87871  *
87872  * Enum | Value | Description
87873  * :------------------------------------|:------|:--------------------
87874  * ALT_USB_DEV_DOEPINT1_AHBERR_E_INACT | 0x0 | No Interrupt
87875  * ALT_USB_DEV_DOEPINT1_AHBERR_E_ACT | 0x1 | AHB Error interrupt
87876  *
87877  * Field Access Macros:
87878  *
87879  */
87880 /*
87881  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_AHBERR
87882  *
87883  * No Interrupt
87884  */
87885 #define ALT_USB_DEV_DOEPINT1_AHBERR_E_INACT 0x0
87886 /*
87887  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_AHBERR
87888  *
87889  * AHB Error interrupt
87890  */
87891 #define ALT_USB_DEV_DOEPINT1_AHBERR_E_ACT 0x1
87892 
87893 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_AHBERR register field. */
87894 #define ALT_USB_DEV_DOEPINT1_AHBERR_LSB 2
87895 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_AHBERR register field. */
87896 #define ALT_USB_DEV_DOEPINT1_AHBERR_MSB 2
87897 /* The width in bits of the ALT_USB_DEV_DOEPINT1_AHBERR register field. */
87898 #define ALT_USB_DEV_DOEPINT1_AHBERR_WIDTH 1
87899 /* The mask used to set the ALT_USB_DEV_DOEPINT1_AHBERR register field value. */
87900 #define ALT_USB_DEV_DOEPINT1_AHBERR_SET_MSK 0x00000004
87901 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_AHBERR register field value. */
87902 #define ALT_USB_DEV_DOEPINT1_AHBERR_CLR_MSK 0xfffffffb
87903 /* The reset value of the ALT_USB_DEV_DOEPINT1_AHBERR register field. */
87904 #define ALT_USB_DEV_DOEPINT1_AHBERR_RESET 0x0
87905 /* Extracts the ALT_USB_DEV_DOEPINT1_AHBERR field value from a register. */
87906 #define ALT_USB_DEV_DOEPINT1_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
87907 /* Produces a ALT_USB_DEV_DOEPINT1_AHBERR register field value suitable for setting the register. */
87908 #define ALT_USB_DEV_DOEPINT1_AHBERR_SET(value) (((value) << 2) & 0x00000004)
87909 
87910 /*
87911  * Field : SETUP Phase Done - setup
87912  *
87913  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
87914  * control endpoint is complete and no more back-to-back SETUP packets were
87915  * received for the current control transfer. On this interrupt, the application
87916  * can decode the received SETUP data packet.
87917  *
87918  * Field Enumeration Values:
87919  *
87920  * Enum | Value | Description
87921  * :-----------------------------------|:------|:--------------------
87922  * ALT_USB_DEV_DOEPINT1_SETUP_E_INACT | 0x0 | No SETUP Phase Done
87923  * ALT_USB_DEV_DOEPINT1_SETUP_E_ACT | 0x1 | SETUP Phase Done
87924  *
87925  * Field Access Macros:
87926  *
87927  */
87928 /*
87929  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_SETUP
87930  *
87931  * No SETUP Phase Done
87932  */
87933 #define ALT_USB_DEV_DOEPINT1_SETUP_E_INACT 0x0
87934 /*
87935  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_SETUP
87936  *
87937  * SETUP Phase Done
87938  */
87939 #define ALT_USB_DEV_DOEPINT1_SETUP_E_ACT 0x1
87940 
87941 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_SETUP register field. */
87942 #define ALT_USB_DEV_DOEPINT1_SETUP_LSB 3
87943 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_SETUP register field. */
87944 #define ALT_USB_DEV_DOEPINT1_SETUP_MSB 3
87945 /* The width in bits of the ALT_USB_DEV_DOEPINT1_SETUP register field. */
87946 #define ALT_USB_DEV_DOEPINT1_SETUP_WIDTH 1
87947 /* The mask used to set the ALT_USB_DEV_DOEPINT1_SETUP register field value. */
87948 #define ALT_USB_DEV_DOEPINT1_SETUP_SET_MSK 0x00000008
87949 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_SETUP register field value. */
87950 #define ALT_USB_DEV_DOEPINT1_SETUP_CLR_MSK 0xfffffff7
87951 /* The reset value of the ALT_USB_DEV_DOEPINT1_SETUP register field. */
87952 #define ALT_USB_DEV_DOEPINT1_SETUP_RESET 0x0
87953 /* Extracts the ALT_USB_DEV_DOEPINT1_SETUP field value from a register. */
87954 #define ALT_USB_DEV_DOEPINT1_SETUP_GET(value) (((value) & 0x00000008) >> 3)
87955 /* Produces a ALT_USB_DEV_DOEPINT1_SETUP register field value suitable for setting the register. */
87956 #define ALT_USB_DEV_DOEPINT1_SETUP_SET(value) (((value) << 3) & 0x00000008)
87957 
87958 /*
87959  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
87960  *
87961  * Applies only to control OUT endpoints. Indicates that an OUT token was received
87962  * when the endpoint was not yet enabled. This interrupt is asserted on the
87963  * endpoint for which the OUT token was received.
87964  *
87965  * Field Enumeration Values:
87966  *
87967  * Enum | Value | Description
87968  * :-----------------------------------------|:------|:---------------------------------------------
87969  * ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
87970  * ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
87971  *
87972  * Field Access Macros:
87973  *
87974  */
87975 /*
87976  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS
87977  *
87978  * No OUT Token Received When Endpoint Disabled
87979  */
87980 #define ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS_E_INACT 0x0
87981 /*
87982  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS
87983  *
87984  * OUT Token Received When Endpoint Disabled
87985  */
87986 #define ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS_E_ACT 0x1
87987 
87988 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS register field. */
87989 #define ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS_LSB 4
87990 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS register field. */
87991 #define ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS_MSB 4
87992 /* The width in bits of the ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS register field. */
87993 #define ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS_WIDTH 1
87994 /* The mask used to set the ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS register field value. */
87995 #define ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS_SET_MSK 0x00000010
87996 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS register field value. */
87997 #define ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS_CLR_MSK 0xffffffef
87998 /* The reset value of the ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS register field. */
87999 #define ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS_RESET 0x0
88000 /* Extracts the ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS field value from a register. */
88001 #define ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
88002 /* Produces a ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS register field value suitable for setting the register. */
88003 #define ALT_USB_DEV_DOEPINT1_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
88004 
88005 /*
88006  * Field : Status Phase Received for Control Write - stsphsercvd
88007  *
88008  * This interrupt is valid only for Control OUT endpoints and only in Scatter
88009  * Gather DMA mode. This interrupt is generated only after the core has transferred
88010  * all the data that the host has sent during the data phase of a control write
88011  * transfer, to the system memory buffer. The interrupt indicates to the
88012  * application that the host has switched from data phase to the status phase of a
88013  * Control Write transfer. The application can use this interrupt to ACK or STALL
88014  * the Status phase, after it has decoded the data phase. This is applicable only
88015  * in Case of Scatter Gather DMA mode.
88016  *
88017  * Field Enumeration Values:
88018  *
88019  * Enum | Value | Description
88020  * :-----------------------------------------|:------|:-------------------------------------------
88021  * ALT_USB_DEV_DOEPINT1_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
88022  * ALT_USB_DEV_DOEPINT1_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
88023  *
88024  * Field Access Macros:
88025  *
88026  */
88027 /*
88028  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_STSPHSERCVD
88029  *
88030  * No Status Phase Received for Control Write
88031  */
88032 #define ALT_USB_DEV_DOEPINT1_STSPHSERCVD_E_INACT 0x0
88033 /*
88034  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_STSPHSERCVD
88035  *
88036  * Status Phase Received for Control Write
88037  */
88038 #define ALT_USB_DEV_DOEPINT1_STSPHSERCVD_E_ACT 0x1
88039 
88040 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_STSPHSERCVD register field. */
88041 #define ALT_USB_DEV_DOEPINT1_STSPHSERCVD_LSB 5
88042 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_STSPHSERCVD register field. */
88043 #define ALT_USB_DEV_DOEPINT1_STSPHSERCVD_MSB 5
88044 /* The width in bits of the ALT_USB_DEV_DOEPINT1_STSPHSERCVD register field. */
88045 #define ALT_USB_DEV_DOEPINT1_STSPHSERCVD_WIDTH 1
88046 /* The mask used to set the ALT_USB_DEV_DOEPINT1_STSPHSERCVD register field value. */
88047 #define ALT_USB_DEV_DOEPINT1_STSPHSERCVD_SET_MSK 0x00000020
88048 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_STSPHSERCVD register field value. */
88049 #define ALT_USB_DEV_DOEPINT1_STSPHSERCVD_CLR_MSK 0xffffffdf
88050 /* The reset value of the ALT_USB_DEV_DOEPINT1_STSPHSERCVD register field. */
88051 #define ALT_USB_DEV_DOEPINT1_STSPHSERCVD_RESET 0x0
88052 /* Extracts the ALT_USB_DEV_DOEPINT1_STSPHSERCVD field value from a register. */
88053 #define ALT_USB_DEV_DOEPINT1_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
88054 /* Produces a ALT_USB_DEV_DOEPINT1_STSPHSERCVD register field value suitable for setting the register. */
88055 #define ALT_USB_DEV_DOEPINT1_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
88056 
88057 /*
88058  * Field : Back-to-Back SETUP Packets Received - back2backsetup
88059  *
88060  * Applies to Control OUT endpoints only. This bit indicates that the core has
88061  * received more than three back-to-back SETUP packets for this particular
88062  * endpoint. for information about handling this interrupt,
88063  *
88064  * Field Enumeration Values:
88065  *
88066  * Enum | Value | Description
88067  * :--------------------------------------------|:------|:---------------------------------------
88068  * ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
88069  * ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
88070  *
88071  * Field Access Macros:
88072  *
88073  */
88074 /*
88075  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP
88076  *
88077  * No Back-to-Back SETUP Packets Received
88078  */
88079 #define ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP_E_INACT 0x0
88080 /*
88081  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP
88082  *
88083  * Back-to-Back SETUP Packets Received
88084  */
88085 #define ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP_E_ACT 0x1
88086 
88087 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP register field. */
88088 #define ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP_LSB 6
88089 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP register field. */
88090 #define ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP_MSB 6
88091 /* The width in bits of the ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP register field. */
88092 #define ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP_WIDTH 1
88093 /* The mask used to set the ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP register field value. */
88094 #define ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP_SET_MSK 0x00000040
88095 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP register field value. */
88096 #define ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP_CLR_MSK 0xffffffbf
88097 /* The reset value of the ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP register field. */
88098 #define ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP_RESET 0x0
88099 /* Extracts the ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP field value from a register. */
88100 #define ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
88101 /* Produces a ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP register field value suitable for setting the register. */
88102 #define ALT_USB_DEV_DOEPINT1_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
88103 
88104 /*
88105  * Field : OUT Packet Error - outpkterr
88106  *
88107  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
88108  * an overflow or a CRC error for non-Isochronous OUT packet.
88109  *
88110  * Field Enumeration Values:
88111  *
88112  * Enum | Value | Description
88113  * :---------------------------------------|:------|:--------------------
88114  * ALT_USB_DEV_DOEPINT1_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
88115  * ALT_USB_DEV_DOEPINT1_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
88116  *
88117  * Field Access Macros:
88118  *
88119  */
88120 /*
88121  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_OUTPKTERR
88122  *
88123  * No OUT Packet Error
88124  */
88125 #define ALT_USB_DEV_DOEPINT1_OUTPKTERR_E_INACT 0x0
88126 /*
88127  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_OUTPKTERR
88128  *
88129  * OUT Packet Error
88130  */
88131 #define ALT_USB_DEV_DOEPINT1_OUTPKTERR_E_ACT 0x1
88132 
88133 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_OUTPKTERR register field. */
88134 #define ALT_USB_DEV_DOEPINT1_OUTPKTERR_LSB 8
88135 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_OUTPKTERR register field. */
88136 #define ALT_USB_DEV_DOEPINT1_OUTPKTERR_MSB 8
88137 /* The width in bits of the ALT_USB_DEV_DOEPINT1_OUTPKTERR register field. */
88138 #define ALT_USB_DEV_DOEPINT1_OUTPKTERR_WIDTH 1
88139 /* The mask used to set the ALT_USB_DEV_DOEPINT1_OUTPKTERR register field value. */
88140 #define ALT_USB_DEV_DOEPINT1_OUTPKTERR_SET_MSK 0x00000100
88141 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_OUTPKTERR register field value. */
88142 #define ALT_USB_DEV_DOEPINT1_OUTPKTERR_CLR_MSK 0xfffffeff
88143 /* The reset value of the ALT_USB_DEV_DOEPINT1_OUTPKTERR register field. */
88144 #define ALT_USB_DEV_DOEPINT1_OUTPKTERR_RESET 0x0
88145 /* Extracts the ALT_USB_DEV_DOEPINT1_OUTPKTERR field value from a register. */
88146 #define ALT_USB_DEV_DOEPINT1_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
88147 /* Produces a ALT_USB_DEV_DOEPINT1_OUTPKTERR register field value suitable for setting the register. */
88148 #define ALT_USB_DEV_DOEPINT1_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
88149 
88150 /*
88151  * Field : BNA Interrupt - bnaintr
88152  *
88153  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
88154  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
88155  * the descriptor accessed is not ready for the Core to process, such as Host busy
88156  * or DMA done
88157  *
88158  * Field Enumeration Values:
88159  *
88160  * Enum | Value | Description
88161  * :-------------------------------------|:------|:--------------
88162  * ALT_USB_DEV_DOEPINT1_BNAINTR_E_INACT | 0x0 | No interrupt
88163  * ALT_USB_DEV_DOEPINT1_BNAINTR_E_ACT | 0x1 | BNA interrupt
88164  *
88165  * Field Access Macros:
88166  *
88167  */
88168 /*
88169  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_BNAINTR
88170  *
88171  * No interrupt
88172  */
88173 #define ALT_USB_DEV_DOEPINT1_BNAINTR_E_INACT 0x0
88174 /*
88175  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_BNAINTR
88176  *
88177  * BNA interrupt
88178  */
88179 #define ALT_USB_DEV_DOEPINT1_BNAINTR_E_ACT 0x1
88180 
88181 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_BNAINTR register field. */
88182 #define ALT_USB_DEV_DOEPINT1_BNAINTR_LSB 9
88183 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_BNAINTR register field. */
88184 #define ALT_USB_DEV_DOEPINT1_BNAINTR_MSB 9
88185 /* The width in bits of the ALT_USB_DEV_DOEPINT1_BNAINTR register field. */
88186 #define ALT_USB_DEV_DOEPINT1_BNAINTR_WIDTH 1
88187 /* The mask used to set the ALT_USB_DEV_DOEPINT1_BNAINTR register field value. */
88188 #define ALT_USB_DEV_DOEPINT1_BNAINTR_SET_MSK 0x00000200
88189 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_BNAINTR register field value. */
88190 #define ALT_USB_DEV_DOEPINT1_BNAINTR_CLR_MSK 0xfffffdff
88191 /* The reset value of the ALT_USB_DEV_DOEPINT1_BNAINTR register field. */
88192 #define ALT_USB_DEV_DOEPINT1_BNAINTR_RESET 0x0
88193 /* Extracts the ALT_USB_DEV_DOEPINT1_BNAINTR field value from a register. */
88194 #define ALT_USB_DEV_DOEPINT1_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
88195 /* Produces a ALT_USB_DEV_DOEPINT1_BNAINTR register field value suitable for setting the register. */
88196 #define ALT_USB_DEV_DOEPINT1_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
88197 
88198 /*
88199  * Field : Packet Drop Status - pktdrpsts
88200  *
88201  * This bit indicates to the application that an ISOC OUT packet has been dropped.
88202  * This bit does not have an associated mask bit and does not generate an
88203  * interrupt.
88204  *
88205  * Field Enumeration Values:
88206  *
88207  * Enum | Value | Description
88208  * :---------------------------------------|:------|:-----------------------------
88209  * ALT_USB_DEV_DOEPINT1_PKTDRPSTS_E_INACT | 0x0 | No interrupt
88210  * ALT_USB_DEV_DOEPINT1_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
88211  *
88212  * Field Access Macros:
88213  *
88214  */
88215 /*
88216  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_PKTDRPSTS
88217  *
88218  * No interrupt
88219  */
88220 #define ALT_USB_DEV_DOEPINT1_PKTDRPSTS_E_INACT 0x0
88221 /*
88222  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_PKTDRPSTS
88223  *
88224  * Packet Drop Status interrupt
88225  */
88226 #define ALT_USB_DEV_DOEPINT1_PKTDRPSTS_E_ACT 0x1
88227 
88228 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_PKTDRPSTS register field. */
88229 #define ALT_USB_DEV_DOEPINT1_PKTDRPSTS_LSB 11
88230 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_PKTDRPSTS register field. */
88231 #define ALT_USB_DEV_DOEPINT1_PKTDRPSTS_MSB 11
88232 /* The width in bits of the ALT_USB_DEV_DOEPINT1_PKTDRPSTS register field. */
88233 #define ALT_USB_DEV_DOEPINT1_PKTDRPSTS_WIDTH 1
88234 /* The mask used to set the ALT_USB_DEV_DOEPINT1_PKTDRPSTS register field value. */
88235 #define ALT_USB_DEV_DOEPINT1_PKTDRPSTS_SET_MSK 0x00000800
88236 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_PKTDRPSTS register field value. */
88237 #define ALT_USB_DEV_DOEPINT1_PKTDRPSTS_CLR_MSK 0xfffff7ff
88238 /* The reset value of the ALT_USB_DEV_DOEPINT1_PKTDRPSTS register field. */
88239 #define ALT_USB_DEV_DOEPINT1_PKTDRPSTS_RESET 0x0
88240 /* Extracts the ALT_USB_DEV_DOEPINT1_PKTDRPSTS field value from a register. */
88241 #define ALT_USB_DEV_DOEPINT1_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
88242 /* Produces a ALT_USB_DEV_DOEPINT1_PKTDRPSTS register field value suitable for setting the register. */
88243 #define ALT_USB_DEV_DOEPINT1_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
88244 
88245 /*
88246  * Field : BbleErr Interrupt - bbleerr
88247  *
88248  * The core generates this interrupt when babble is received for the endpoint.
88249  *
88250  * Field Enumeration Values:
88251  *
88252  * Enum | Value | Description
88253  * :-------------------------------------|:------|:------------------
88254  * ALT_USB_DEV_DOEPINT1_BBLEERR_E_INACT | 0x0 | No interrupt
88255  * ALT_USB_DEV_DOEPINT1_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
88256  *
88257  * Field Access Macros:
88258  *
88259  */
88260 /*
88261  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_BBLEERR
88262  *
88263  * No interrupt
88264  */
88265 #define ALT_USB_DEV_DOEPINT1_BBLEERR_E_INACT 0x0
88266 /*
88267  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_BBLEERR
88268  *
88269  * BbleErr interrupt
88270  */
88271 #define ALT_USB_DEV_DOEPINT1_BBLEERR_E_ACT 0x1
88272 
88273 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_BBLEERR register field. */
88274 #define ALT_USB_DEV_DOEPINT1_BBLEERR_LSB 12
88275 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_BBLEERR register field. */
88276 #define ALT_USB_DEV_DOEPINT1_BBLEERR_MSB 12
88277 /* The width in bits of the ALT_USB_DEV_DOEPINT1_BBLEERR register field. */
88278 #define ALT_USB_DEV_DOEPINT1_BBLEERR_WIDTH 1
88279 /* The mask used to set the ALT_USB_DEV_DOEPINT1_BBLEERR register field value. */
88280 #define ALT_USB_DEV_DOEPINT1_BBLEERR_SET_MSK 0x00001000
88281 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_BBLEERR register field value. */
88282 #define ALT_USB_DEV_DOEPINT1_BBLEERR_CLR_MSK 0xffffefff
88283 /* The reset value of the ALT_USB_DEV_DOEPINT1_BBLEERR register field. */
88284 #define ALT_USB_DEV_DOEPINT1_BBLEERR_RESET 0x0
88285 /* Extracts the ALT_USB_DEV_DOEPINT1_BBLEERR field value from a register. */
88286 #define ALT_USB_DEV_DOEPINT1_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
88287 /* Produces a ALT_USB_DEV_DOEPINT1_BBLEERR register field value suitable for setting the register. */
88288 #define ALT_USB_DEV_DOEPINT1_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
88289 
88290 /*
88291  * Field : NAK Interrupt - nakintrpt
88292  *
88293  * The core generates this interrupt when a NAK is transmitted or received by the
88294  * device. In case of isochronous IN endpoints the interrupt gets generated when a
88295  * zero length packet is transmitted due to un-availability of data in the TXFifo.
88296  *
88297  * Field Enumeration Values:
88298  *
88299  * Enum | Value | Description
88300  * :---------------------------------------|:------|:--------------
88301  * ALT_USB_DEV_DOEPINT1_NAKINTRPT_E_INACT | 0x0 | No interrupt
88302  * ALT_USB_DEV_DOEPINT1_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
88303  *
88304  * Field Access Macros:
88305  *
88306  */
88307 /*
88308  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_NAKINTRPT
88309  *
88310  * No interrupt
88311  */
88312 #define ALT_USB_DEV_DOEPINT1_NAKINTRPT_E_INACT 0x0
88313 /*
88314  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_NAKINTRPT
88315  *
88316  * NAK Interrupt
88317  */
88318 #define ALT_USB_DEV_DOEPINT1_NAKINTRPT_E_ACT 0x1
88319 
88320 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_NAKINTRPT register field. */
88321 #define ALT_USB_DEV_DOEPINT1_NAKINTRPT_LSB 13
88322 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_NAKINTRPT register field. */
88323 #define ALT_USB_DEV_DOEPINT1_NAKINTRPT_MSB 13
88324 /* The width in bits of the ALT_USB_DEV_DOEPINT1_NAKINTRPT register field. */
88325 #define ALT_USB_DEV_DOEPINT1_NAKINTRPT_WIDTH 1
88326 /* The mask used to set the ALT_USB_DEV_DOEPINT1_NAKINTRPT register field value. */
88327 #define ALT_USB_DEV_DOEPINT1_NAKINTRPT_SET_MSK 0x00002000
88328 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_NAKINTRPT register field value. */
88329 #define ALT_USB_DEV_DOEPINT1_NAKINTRPT_CLR_MSK 0xffffdfff
88330 /* The reset value of the ALT_USB_DEV_DOEPINT1_NAKINTRPT register field. */
88331 #define ALT_USB_DEV_DOEPINT1_NAKINTRPT_RESET 0x0
88332 /* Extracts the ALT_USB_DEV_DOEPINT1_NAKINTRPT field value from a register. */
88333 #define ALT_USB_DEV_DOEPINT1_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
88334 /* Produces a ALT_USB_DEV_DOEPINT1_NAKINTRPT register field value suitable for setting the register. */
88335 #define ALT_USB_DEV_DOEPINT1_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
88336 
88337 /*
88338  * Field : NYET Interrupt - nyetintrpt
88339  *
88340  * The core generates this interrupt when a NYET response is transmitted for a non
88341  * isochronous OUT endpoint.
88342  *
88343  * Field Enumeration Values:
88344  *
88345  * Enum | Value | Description
88346  * :----------------------------------------|:------|:---------------
88347  * ALT_USB_DEV_DOEPINT1_NYETINTRPT_E_INACT | 0x0 | No interrupt
88348  * ALT_USB_DEV_DOEPINT1_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
88349  *
88350  * Field Access Macros:
88351  *
88352  */
88353 /*
88354  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_NYETINTRPT
88355  *
88356  * No interrupt
88357  */
88358 #define ALT_USB_DEV_DOEPINT1_NYETINTRPT_E_INACT 0x0
88359 /*
88360  * Enumerated value for register field ALT_USB_DEV_DOEPINT1_NYETINTRPT
88361  *
88362  * NYET Interrupt
88363  */
88364 #define ALT_USB_DEV_DOEPINT1_NYETINTRPT_E_ACT 0x1
88365 
88366 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT1_NYETINTRPT register field. */
88367 #define ALT_USB_DEV_DOEPINT1_NYETINTRPT_LSB 14
88368 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT1_NYETINTRPT register field. */
88369 #define ALT_USB_DEV_DOEPINT1_NYETINTRPT_MSB 14
88370 /* The width in bits of the ALT_USB_DEV_DOEPINT1_NYETINTRPT register field. */
88371 #define ALT_USB_DEV_DOEPINT1_NYETINTRPT_WIDTH 1
88372 /* The mask used to set the ALT_USB_DEV_DOEPINT1_NYETINTRPT register field value. */
88373 #define ALT_USB_DEV_DOEPINT1_NYETINTRPT_SET_MSK 0x00004000
88374 /* The mask used to clear the ALT_USB_DEV_DOEPINT1_NYETINTRPT register field value. */
88375 #define ALT_USB_DEV_DOEPINT1_NYETINTRPT_CLR_MSK 0xffffbfff
88376 /* The reset value of the ALT_USB_DEV_DOEPINT1_NYETINTRPT register field. */
88377 #define ALT_USB_DEV_DOEPINT1_NYETINTRPT_RESET 0x0
88378 /* Extracts the ALT_USB_DEV_DOEPINT1_NYETINTRPT field value from a register. */
88379 #define ALT_USB_DEV_DOEPINT1_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
88380 /* Produces a ALT_USB_DEV_DOEPINT1_NYETINTRPT register field value suitable for setting the register. */
88381 #define ALT_USB_DEV_DOEPINT1_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
88382 
88383 #ifndef __ASSEMBLY__
88384 /*
88385  * WARNING: The C register and register group struct declarations are provided for
88386  * convenience and illustrative purposes. They should, however, be used with
88387  * caution as the C language standard provides no guarantees about the alignment or
88388  * atomicity of device memory accesses. The recommended practice for writing
88389  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
88390  * alt_write_word() functions.
88391  *
88392  * The struct declaration for register ALT_USB_DEV_DOEPINT1.
88393  */
88394 struct ALT_USB_DEV_DOEPINT1_s
88395 {
88396  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
88397  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
88398  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT1_AHBERR */
88399  const uint32_t setup : 1; /* SETUP Phase Done */
88400  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
88401  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
88402  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
88403  uint32_t : 1; /* *UNDEFINED* */
88404  const uint32_t outpkterr : 1; /* OUT Packet Error */
88405  const uint32_t bnaintr : 1; /* BNA Interrupt */
88406  uint32_t : 1; /* *UNDEFINED* */
88407  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
88408  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
88409  const uint32_t nakintrpt : 1; /* NAK Interrupt */
88410  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
88411  uint32_t : 17; /* *UNDEFINED* */
88412 };
88413 
88414 /* The typedef declaration for register ALT_USB_DEV_DOEPINT1. */
88415 typedef volatile struct ALT_USB_DEV_DOEPINT1_s ALT_USB_DEV_DOEPINT1_t;
88416 #endif /* __ASSEMBLY__ */
88417 
88418 /* The byte offset of the ALT_USB_DEV_DOEPINT1 register from the beginning of the component. */
88419 #define ALT_USB_DEV_DOEPINT1_OFST 0x328
88420 /* The address of the ALT_USB_DEV_DOEPINT1 register. */
88421 #define ALT_USB_DEV_DOEPINT1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT1_OFST))
88422 
88423 /*
88424  * Register : Device OUT Endpoint 1 Transfer Size Register - doeptsiz1
88425  *
88426  * The application must modify this register before enabling the endpoint. Once the
88427  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
88428  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
88429  * application can only read this register once the core has cleared the Endpoint
88430  * Enable bit.
88431  *
88432  * Register Layout
88433  *
88434  * Bits | Access | Reset | Description
88435  * :--------|:-------|:------|:-------------------
88436  * [18:0] | RW | 0x0 | Transfer Size
88437  * [28:19] | RW | 0x0 | Packet Count
88438  * [30:29] | R | 0x0 | SETUP Packet Count
88439  * [31] | ??? | 0x0 | *UNDEFINED*
88440  *
88441  */
88442 /*
88443  * Field : Transfer Size - xfersize
88444  *
88445  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
88446  * application only after it has exhausted the transfer size amount of data. The
88447  * transfer size can be Set to the maximum packet size of the endpoint, to be
88448  * interrupted at the end of each packet. The core decrements this field every time
88449  * a packet from the external memory is written to the RxFIFO.
88450  *
88451  * Field Access Macros:
88452  *
88453  */
88454 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ1_XFERSIZE register field. */
88455 #define ALT_USB_DEV_DOEPTSIZ1_XFERSIZE_LSB 0
88456 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ1_XFERSIZE register field. */
88457 #define ALT_USB_DEV_DOEPTSIZ1_XFERSIZE_MSB 18
88458 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ1_XFERSIZE register field. */
88459 #define ALT_USB_DEV_DOEPTSIZ1_XFERSIZE_WIDTH 19
88460 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ1_XFERSIZE register field value. */
88461 #define ALT_USB_DEV_DOEPTSIZ1_XFERSIZE_SET_MSK 0x0007ffff
88462 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ1_XFERSIZE register field value. */
88463 #define ALT_USB_DEV_DOEPTSIZ1_XFERSIZE_CLR_MSK 0xfff80000
88464 /* The reset value of the ALT_USB_DEV_DOEPTSIZ1_XFERSIZE register field. */
88465 #define ALT_USB_DEV_DOEPTSIZ1_XFERSIZE_RESET 0x0
88466 /* Extracts the ALT_USB_DEV_DOEPTSIZ1_XFERSIZE field value from a register. */
88467 #define ALT_USB_DEV_DOEPTSIZ1_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
88468 /* Produces a ALT_USB_DEV_DOEPTSIZ1_XFERSIZE register field value suitable for setting the register. */
88469 #define ALT_USB_DEV_DOEPTSIZ1_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
88470 
88471 /*
88472  * Field : Packet Count - pktcnt
88473  *
88474  * Indicates the total number of USB packets that constitute the Transfer Size
88475  * amount of data for endpoint 0.This field is decremented every time a packet
88476  * (maximum size or short packet) is read from the RxFIFO.
88477  *
88478  * Field Access Macros:
88479  *
88480  */
88481 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ1_PKTCNT register field. */
88482 #define ALT_USB_DEV_DOEPTSIZ1_PKTCNT_LSB 19
88483 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ1_PKTCNT register field. */
88484 #define ALT_USB_DEV_DOEPTSIZ1_PKTCNT_MSB 28
88485 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ1_PKTCNT register field. */
88486 #define ALT_USB_DEV_DOEPTSIZ1_PKTCNT_WIDTH 10
88487 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ1_PKTCNT register field value. */
88488 #define ALT_USB_DEV_DOEPTSIZ1_PKTCNT_SET_MSK 0x1ff80000
88489 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ1_PKTCNT register field value. */
88490 #define ALT_USB_DEV_DOEPTSIZ1_PKTCNT_CLR_MSK 0xe007ffff
88491 /* The reset value of the ALT_USB_DEV_DOEPTSIZ1_PKTCNT register field. */
88492 #define ALT_USB_DEV_DOEPTSIZ1_PKTCNT_RESET 0x0
88493 /* Extracts the ALT_USB_DEV_DOEPTSIZ1_PKTCNT field value from a register. */
88494 #define ALT_USB_DEV_DOEPTSIZ1_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
88495 /* Produces a ALT_USB_DEV_DOEPTSIZ1_PKTCNT register field value suitable for setting the register. */
88496 #define ALT_USB_DEV_DOEPTSIZ1_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
88497 
88498 /*
88499  * Field : SETUP Packet Count - rxdpid
88500  *
88501  * Applies to isochronous OUT endpoints only.This is the data PID received in the
88502  * last packet for this endpoint. Use datax.
88503  *
88504  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
88505  * number of back-to-back SETUP data packets the endpoint can receive.
88506  *
88507  * Field Enumeration Values:
88508  *
88509  * Enum | Value | Description
88510  * :-----------------------------------------|:------|:-------------------
88511  * ALT_USB_DEV_DOEPTSIZ1_RXDPID_E_DATA0 | 0x0 | DATA0
88512  * ALT_USB_DEV_DOEPTSIZ1_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
88513  * ALT_USB_DEV_DOEPTSIZ1_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
88514  * ALT_USB_DEV_DOEPTSIZ1_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
88515  *
88516  * Field Access Macros:
88517  *
88518  */
88519 /*
88520  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ1_RXDPID
88521  *
88522  * DATA0
88523  */
88524 #define ALT_USB_DEV_DOEPTSIZ1_RXDPID_E_DATA0 0x0
88525 /*
88526  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ1_RXDPID
88527  *
88528  * DATA2 or 1 packet
88529  */
88530 #define ALT_USB_DEV_DOEPTSIZ1_RXDPID_E_DATA2PKT1 0x1
88531 /*
88532  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ1_RXDPID
88533  *
88534  * DATA1 or 2 packets
88535  */
88536 #define ALT_USB_DEV_DOEPTSIZ1_RXDPID_E_DATA1PKT2 0x2
88537 /*
88538  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ1_RXDPID
88539  *
88540  * MDATA or 3 packets
88541  */
88542 #define ALT_USB_DEV_DOEPTSIZ1_RXDPID_E_MDATAPKT3 0x3
88543 
88544 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ1_RXDPID register field. */
88545 #define ALT_USB_DEV_DOEPTSIZ1_RXDPID_LSB 29
88546 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ1_RXDPID register field. */
88547 #define ALT_USB_DEV_DOEPTSIZ1_RXDPID_MSB 30
88548 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ1_RXDPID register field. */
88549 #define ALT_USB_DEV_DOEPTSIZ1_RXDPID_WIDTH 2
88550 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ1_RXDPID register field value. */
88551 #define ALT_USB_DEV_DOEPTSIZ1_RXDPID_SET_MSK 0x60000000
88552 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ1_RXDPID register field value. */
88553 #define ALT_USB_DEV_DOEPTSIZ1_RXDPID_CLR_MSK 0x9fffffff
88554 /* The reset value of the ALT_USB_DEV_DOEPTSIZ1_RXDPID register field. */
88555 #define ALT_USB_DEV_DOEPTSIZ1_RXDPID_RESET 0x0
88556 /* Extracts the ALT_USB_DEV_DOEPTSIZ1_RXDPID field value from a register. */
88557 #define ALT_USB_DEV_DOEPTSIZ1_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
88558 /* Produces a ALT_USB_DEV_DOEPTSIZ1_RXDPID register field value suitable for setting the register. */
88559 #define ALT_USB_DEV_DOEPTSIZ1_RXDPID_SET(value) (((value) << 29) & 0x60000000)
88560 
88561 #ifndef __ASSEMBLY__
88562 /*
88563  * WARNING: The C register and register group struct declarations are provided for
88564  * convenience and illustrative purposes. They should, however, be used with
88565  * caution as the C language standard provides no guarantees about the alignment or
88566  * atomicity of device memory accesses. The recommended practice for writing
88567  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
88568  * alt_write_word() functions.
88569  *
88570  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ1.
88571  */
88572 struct ALT_USB_DEV_DOEPTSIZ1_s
88573 {
88574  uint32_t xfersize : 19; /* Transfer Size */
88575  uint32_t pktcnt : 10; /* Packet Count */
88576  const uint32_t rxdpid : 2; /* SETUP Packet Count */
88577  uint32_t : 1; /* *UNDEFINED* */
88578 };
88579 
88580 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ1. */
88581 typedef volatile struct ALT_USB_DEV_DOEPTSIZ1_s ALT_USB_DEV_DOEPTSIZ1_t;
88582 #endif /* __ASSEMBLY__ */
88583 
88584 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ1 register from the beginning of the component. */
88585 #define ALT_USB_DEV_DOEPTSIZ1_OFST 0x330
88586 /* The address of the ALT_USB_DEV_DOEPTSIZ1 register. */
88587 #define ALT_USB_DEV_DOEPTSIZ1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ1_OFST))
88588 
88589 /*
88590  * Register : Device OUT Endpoint 1 DMA Address Register - doepdma1
88591  *
88592  * DMA Addressing.
88593  *
88594  * Register Layout
88595  *
88596  * Bits | Access | Reset | Description
88597  * :-------|:-------|:--------|:------------
88598  * [31:0] | RW | Unknown | DMA Address
88599  *
88600  */
88601 /*
88602  * Field : DMA Address - doepdma1
88603  *
88604  * Holds the start address of the external memory for storing or fetching endpoint
88605  * data. for control endpoints, this field stores control OUT data packets as well
88606  * as SETUP transaction data packets. When more than three SETUP packets are
88607  * received back-to-back, the SETUP data packet in the memory is overwritten. This
88608  * register is incremented on every AHB transaction. The application can give only
88609  * a DWORD-aligned address.
88610  *
88611  * When Scatter/Gather DMA mode is not enabled, the application programs the start
88612  * address value in this field.
88613  *
88614  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
88615  * for the descriptor list.
88616  *
88617  * Field Access Macros:
88618  *
88619  */
88620 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA1_DOEPDMA1 register field. */
88621 #define ALT_USB_DEV_DOEPDMA1_DOEPDMA1_LSB 0
88622 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA1_DOEPDMA1 register field. */
88623 #define ALT_USB_DEV_DOEPDMA1_DOEPDMA1_MSB 31
88624 /* The width in bits of the ALT_USB_DEV_DOEPDMA1_DOEPDMA1 register field. */
88625 #define ALT_USB_DEV_DOEPDMA1_DOEPDMA1_WIDTH 32
88626 /* The mask used to set the ALT_USB_DEV_DOEPDMA1_DOEPDMA1 register field value. */
88627 #define ALT_USB_DEV_DOEPDMA1_DOEPDMA1_SET_MSK 0xffffffff
88628 /* The mask used to clear the ALT_USB_DEV_DOEPDMA1_DOEPDMA1 register field value. */
88629 #define ALT_USB_DEV_DOEPDMA1_DOEPDMA1_CLR_MSK 0x00000000
88630 /* The reset value of the ALT_USB_DEV_DOEPDMA1_DOEPDMA1 register field is UNKNOWN. */
88631 #define ALT_USB_DEV_DOEPDMA1_DOEPDMA1_RESET 0x0
88632 /* Extracts the ALT_USB_DEV_DOEPDMA1_DOEPDMA1 field value from a register. */
88633 #define ALT_USB_DEV_DOEPDMA1_DOEPDMA1_GET(value) (((value) & 0xffffffff) >> 0)
88634 /* Produces a ALT_USB_DEV_DOEPDMA1_DOEPDMA1 register field value suitable for setting the register. */
88635 #define ALT_USB_DEV_DOEPDMA1_DOEPDMA1_SET(value) (((value) << 0) & 0xffffffff)
88636 
88637 #ifndef __ASSEMBLY__
88638 /*
88639  * WARNING: The C register and register group struct declarations are provided for
88640  * convenience and illustrative purposes. They should, however, be used with
88641  * caution as the C language standard provides no guarantees about the alignment or
88642  * atomicity of device memory accesses. The recommended practice for writing
88643  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
88644  * alt_write_word() functions.
88645  *
88646  * The struct declaration for register ALT_USB_DEV_DOEPDMA1.
88647  */
88648 struct ALT_USB_DEV_DOEPDMA1_s
88649 {
88650  uint32_t doepdma1 : 32; /* DMA Address */
88651 };
88652 
88653 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA1. */
88654 typedef volatile struct ALT_USB_DEV_DOEPDMA1_s ALT_USB_DEV_DOEPDMA1_t;
88655 #endif /* __ASSEMBLY__ */
88656 
88657 /* The byte offset of the ALT_USB_DEV_DOEPDMA1 register from the beginning of the component. */
88658 #define ALT_USB_DEV_DOEPDMA1_OFST 0x334
88659 /* The address of the ALT_USB_DEV_DOEPDMA1 register. */
88660 #define ALT_USB_DEV_DOEPDMA1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA1_OFST))
88661 
88662 /*
88663  * Register : Device OUT Endpoint 1 DMA Buffer Address Register - doepdmab1
88664  *
88665  * DMA Buffer Address.
88666  *
88667  * Register Layout
88668  *
88669  * Bits | Access | Reset | Description
88670  * :-------|:-------|:--------|:-------------------
88671  * [31:0] | R | Unknown | DMA Buffer Address
88672  *
88673  */
88674 /*
88675  * Field : DMA Buffer Address - doepdmab1
88676  *
88677  * Holds the current buffer address. This register is updated as and when the data
88678  * transfer for the corresponding end point is in progress. This register is
88679  * present only in Scatter/Gather DMA mode.
88680  *
88681  * Field Access Macros:
88682  *
88683  */
88684 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1 register field. */
88685 #define ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1_LSB 0
88686 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1 register field. */
88687 #define ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1_MSB 31
88688 /* The width in bits of the ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1 register field. */
88689 #define ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1_WIDTH 32
88690 /* The mask used to set the ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1 register field value. */
88691 #define ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1_SET_MSK 0xffffffff
88692 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1 register field value. */
88693 #define ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1_CLR_MSK 0x00000000
88694 /* The reset value of the ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1 register field is UNKNOWN. */
88695 #define ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1_RESET 0x0
88696 /* Extracts the ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1 field value from a register. */
88697 #define ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1_GET(value) (((value) & 0xffffffff) >> 0)
88698 /* Produces a ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1 register field value suitable for setting the register. */
88699 #define ALT_USB_DEV_DOEPDMAB1_DOEPDMAB1_SET(value) (((value) << 0) & 0xffffffff)
88700 
88701 #ifndef __ASSEMBLY__
88702 /*
88703  * WARNING: The C register and register group struct declarations are provided for
88704  * convenience and illustrative purposes. They should, however, be used with
88705  * caution as the C language standard provides no guarantees about the alignment or
88706  * atomicity of device memory accesses. The recommended practice for writing
88707  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
88708  * alt_write_word() functions.
88709  *
88710  * The struct declaration for register ALT_USB_DEV_DOEPDMAB1.
88711  */
88712 struct ALT_USB_DEV_DOEPDMAB1_s
88713 {
88714  const uint32_t doepdmab1 : 32; /* DMA Buffer Address */
88715 };
88716 
88717 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB1. */
88718 typedef volatile struct ALT_USB_DEV_DOEPDMAB1_s ALT_USB_DEV_DOEPDMAB1_t;
88719 #endif /* __ASSEMBLY__ */
88720 
88721 /* The byte offset of the ALT_USB_DEV_DOEPDMAB1 register from the beginning of the component. */
88722 #define ALT_USB_DEV_DOEPDMAB1_OFST 0x33c
88723 /* The address of the ALT_USB_DEV_DOEPDMAB1 register. */
88724 #define ALT_USB_DEV_DOEPDMAB1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB1_OFST))
88725 
88726 /*
88727  * Register : Device Control OUT Endpoint 2 Control Register - DOEPCTL2
88728  *
88729  * Out Endpoint 2.
88730  *
88731  * Register Layout
88732  *
88733  * Bits | Access | Reset | Description
88734  * :--------|:-------|:------|:--------------------
88735  * [10:0] | RW | 0x0 | Maximum Packet Size
88736  * [14:11] | ??? | 0x0 | *UNDEFINED*
88737  * [15] | RW | 0x0 | USB Active Endpoint
88738  * [16] | R | 0x0 | Endpoint Data PID
88739  * [17] | R | 0x0 | NAK Status
88740  * [19:18] | RW | 0x0 | Endpoint Type
88741  * [20] | RW | 0x0 | Snoop Mode
88742  * [21] | R | 0x0 | STALL Handshake
88743  * [25:22] | ??? | 0x0 | *UNDEFINED*
88744  * [26] | W | 0x0 | Clear NAK
88745  * [27] | W | 0x0 | Set NAK
88746  * [28] | W | 0x0 | Set DATA0 PID
88747  * [29] | W | 0x0 | Set DATA1 PID
88748  * [30] | R | 0x0 | Endpoint Disable
88749  * [31] | R | 0x0 | Endpoint Enable
88750  *
88751  */
88752 /*
88753  * Field : Maximum Packet Size - mps
88754  *
88755  * Applies to IN and OUT endpoints. The application must program this field with
88756  * the maximum packet size for the current logical endpoint. This value is in
88757  * bytes.
88758  *
88759  * Field Access Macros:
88760  *
88761  */
88762 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_MPS register field. */
88763 #define ALT_USB_DEV_DOEPCTL2_MPS_LSB 0
88764 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_MPS register field. */
88765 #define ALT_USB_DEV_DOEPCTL2_MPS_MSB 10
88766 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_MPS register field. */
88767 #define ALT_USB_DEV_DOEPCTL2_MPS_WIDTH 11
88768 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_MPS register field value. */
88769 #define ALT_USB_DEV_DOEPCTL2_MPS_SET_MSK 0x000007ff
88770 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_MPS register field value. */
88771 #define ALT_USB_DEV_DOEPCTL2_MPS_CLR_MSK 0xfffff800
88772 /* The reset value of the ALT_USB_DEV_DOEPCTL2_MPS register field. */
88773 #define ALT_USB_DEV_DOEPCTL2_MPS_RESET 0x0
88774 /* Extracts the ALT_USB_DEV_DOEPCTL2_MPS field value from a register. */
88775 #define ALT_USB_DEV_DOEPCTL2_MPS_GET(value) (((value) & 0x000007ff) >> 0)
88776 /* Produces a ALT_USB_DEV_DOEPCTL2_MPS register field value suitable for setting the register. */
88777 #define ALT_USB_DEV_DOEPCTL2_MPS_SET(value) (((value) << 0) & 0x000007ff)
88778 
88779 /*
88780  * Field : USB Active Endpoint - usbactep
88781  *
88782  * Indicates whether this endpoint is active in the current configuration and
88783  * interface. The core clears this bit for all endpoints (other than EP 0) after
88784  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
88785  * commands, the application must program endpoint registers accordingly and set
88786  * this bit.
88787  *
88788  * Field Enumeration Values:
88789  *
88790  * Enum | Value | Description
88791  * :-------------------------------------|:------|:--------------------
88792  * ALT_USB_DEV_DOEPCTL2_USBACTEP_E_DISD | 0x0 | Not Active
88793  * ALT_USB_DEV_DOEPCTL2_USBACTEP_E_END | 0x1 | USB Active Endpoint
88794  *
88795  * Field Access Macros:
88796  *
88797  */
88798 /*
88799  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_USBACTEP
88800  *
88801  * Not Active
88802  */
88803 #define ALT_USB_DEV_DOEPCTL2_USBACTEP_E_DISD 0x0
88804 /*
88805  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_USBACTEP
88806  *
88807  * USB Active Endpoint
88808  */
88809 #define ALT_USB_DEV_DOEPCTL2_USBACTEP_E_END 0x1
88810 
88811 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_USBACTEP register field. */
88812 #define ALT_USB_DEV_DOEPCTL2_USBACTEP_LSB 15
88813 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_USBACTEP register field. */
88814 #define ALT_USB_DEV_DOEPCTL2_USBACTEP_MSB 15
88815 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_USBACTEP register field. */
88816 #define ALT_USB_DEV_DOEPCTL2_USBACTEP_WIDTH 1
88817 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_USBACTEP register field value. */
88818 #define ALT_USB_DEV_DOEPCTL2_USBACTEP_SET_MSK 0x00008000
88819 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_USBACTEP register field value. */
88820 #define ALT_USB_DEV_DOEPCTL2_USBACTEP_CLR_MSK 0xffff7fff
88821 /* The reset value of the ALT_USB_DEV_DOEPCTL2_USBACTEP register field. */
88822 #define ALT_USB_DEV_DOEPCTL2_USBACTEP_RESET 0x0
88823 /* Extracts the ALT_USB_DEV_DOEPCTL2_USBACTEP field value from a register. */
88824 #define ALT_USB_DEV_DOEPCTL2_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
88825 /* Produces a ALT_USB_DEV_DOEPCTL2_USBACTEP register field value suitable for setting the register. */
88826 #define ALT_USB_DEV_DOEPCTL2_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
88827 
88828 /*
88829  * Field : Endpoint Data PID - dpid
88830  *
88831  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
88832  * packet to be received or transmitted on this endpoint. The application must
88833  * program the PID of the first packet to be received or transmitted on this
88834  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
88835  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
88836  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
88837  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
88838  * DMA mode:
88839  *
88840  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
88841  * number in which the core transmits/receives isochronous data for this endpoint.
88842  * The application must program the even/odd (micro) frame number in which it
88843  * intends to transmit/receive isochronous data for this endpoint using the
88844  * SetEvnFr and SetOddFr fields in this register.
88845  *
88846  * 0: Even (micro)frame
88847  *
88848  * 1: Odd (micro)frame
88849  *
88850  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
88851  * number in which to send data is provided in the transmit descriptor structure.
88852  * The frame in which data is received is updated in receive descriptor structure.
88853  *
88854  * Field Enumeration Values:
88855  *
88856  * Enum | Value | Description
88857  * :----------------------------------|:------|:-----------------------------
88858  * ALT_USB_DEV_DOEPCTL2_DPID_E_INACT | 0x0 | Endpoint Data PID not active
88859  * ALT_USB_DEV_DOEPCTL2_DPID_E_ACT | 0x1 | Endpoint Data PID active
88860  *
88861  * Field Access Macros:
88862  *
88863  */
88864 /*
88865  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_DPID
88866  *
88867  * Endpoint Data PID not active
88868  */
88869 #define ALT_USB_DEV_DOEPCTL2_DPID_E_INACT 0x0
88870 /*
88871  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_DPID
88872  *
88873  * Endpoint Data PID active
88874  */
88875 #define ALT_USB_DEV_DOEPCTL2_DPID_E_ACT 0x1
88876 
88877 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_DPID register field. */
88878 #define ALT_USB_DEV_DOEPCTL2_DPID_LSB 16
88879 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_DPID register field. */
88880 #define ALT_USB_DEV_DOEPCTL2_DPID_MSB 16
88881 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_DPID register field. */
88882 #define ALT_USB_DEV_DOEPCTL2_DPID_WIDTH 1
88883 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_DPID register field value. */
88884 #define ALT_USB_DEV_DOEPCTL2_DPID_SET_MSK 0x00010000
88885 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_DPID register field value. */
88886 #define ALT_USB_DEV_DOEPCTL2_DPID_CLR_MSK 0xfffeffff
88887 /* The reset value of the ALT_USB_DEV_DOEPCTL2_DPID register field. */
88888 #define ALT_USB_DEV_DOEPCTL2_DPID_RESET 0x0
88889 /* Extracts the ALT_USB_DEV_DOEPCTL2_DPID field value from a register. */
88890 #define ALT_USB_DEV_DOEPCTL2_DPID_GET(value) (((value) & 0x00010000) >> 16)
88891 /* Produces a ALT_USB_DEV_DOEPCTL2_DPID register field value suitable for setting the register. */
88892 #define ALT_USB_DEV_DOEPCTL2_DPID_SET(value) (((value) << 16) & 0x00010000)
88893 
88894 /*
88895  * Field : NAK Status - naksts
88896  *
88897  * When either the application or the core sets this bit:
88898  *
88899  * * The core stops receiving any data on an OUT endpoint, even if there is space
88900  * in the RxFIFO to accommodate the incoming packet.
88901  *
88902  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
88903  * IN endpoint, even if there data is available in the TxFIFO.
88904  *
88905  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
88906  * even if there data is available in the TxFIFO.
88907  *
88908  * Irrespective of this bit's setting, the core always responds to SETUP data
88909  * packets with an ACK handshake.
88910  *
88911  * Field Enumeration Values:
88912  *
88913  * Enum | Value | Description
88914  * :-------------------------------------|:------|:------------------------------------------------
88915  * ALT_USB_DEV_DOEPCTL2_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
88916  * : | | based on the FIFO status
88917  * ALT_USB_DEV_DOEPCTL2_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
88918  * : | | endpoint
88919  *
88920  * Field Access Macros:
88921  *
88922  */
88923 /*
88924  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_NAKSTS
88925  *
88926  * The core is transmitting non-NAK handshakes based on the FIFO status
88927  */
88928 #define ALT_USB_DEV_DOEPCTL2_NAKSTS_E_NONNAK 0x0
88929 /*
88930  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_NAKSTS
88931  *
88932  * The core is transmitting NAK handshakes on this endpoint
88933  */
88934 #define ALT_USB_DEV_DOEPCTL2_NAKSTS_E_NAK 0x1
88935 
88936 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_NAKSTS register field. */
88937 #define ALT_USB_DEV_DOEPCTL2_NAKSTS_LSB 17
88938 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_NAKSTS register field. */
88939 #define ALT_USB_DEV_DOEPCTL2_NAKSTS_MSB 17
88940 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_NAKSTS register field. */
88941 #define ALT_USB_DEV_DOEPCTL2_NAKSTS_WIDTH 1
88942 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_NAKSTS register field value. */
88943 #define ALT_USB_DEV_DOEPCTL2_NAKSTS_SET_MSK 0x00020000
88944 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_NAKSTS register field value. */
88945 #define ALT_USB_DEV_DOEPCTL2_NAKSTS_CLR_MSK 0xfffdffff
88946 /* The reset value of the ALT_USB_DEV_DOEPCTL2_NAKSTS register field. */
88947 #define ALT_USB_DEV_DOEPCTL2_NAKSTS_RESET 0x0
88948 /* Extracts the ALT_USB_DEV_DOEPCTL2_NAKSTS field value from a register. */
88949 #define ALT_USB_DEV_DOEPCTL2_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
88950 /* Produces a ALT_USB_DEV_DOEPCTL2_NAKSTS register field value suitable for setting the register. */
88951 #define ALT_USB_DEV_DOEPCTL2_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
88952 
88953 /*
88954  * Field : Endpoint Type - eptype
88955  *
88956  * This is the transfer type supported by this logical endpoint.
88957  *
88958  * Field Enumeration Values:
88959  *
88960  * Enum | Value | Description
88961  * :------------------------------------------|:------|:------------
88962  * ALT_USB_DEV_DOEPCTL2_EPTYPE_E_CTL | 0x0 | Control
88963  * ALT_USB_DEV_DOEPCTL2_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
88964  * ALT_USB_DEV_DOEPCTL2_EPTYPE_E_BULK | 0x2 | Bulk
88965  * ALT_USB_DEV_DOEPCTL2_EPTYPE_E_INTERRUP | 0x3 | Interrupt
88966  *
88967  * Field Access Macros:
88968  *
88969  */
88970 /*
88971  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_EPTYPE
88972  *
88973  * Control
88974  */
88975 #define ALT_USB_DEV_DOEPCTL2_EPTYPE_E_CTL 0x0
88976 /*
88977  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_EPTYPE
88978  *
88979  * Isochronous
88980  */
88981 #define ALT_USB_DEV_DOEPCTL2_EPTYPE_E_ISOCHRONOUS 0x1
88982 /*
88983  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_EPTYPE
88984  *
88985  * Bulk
88986  */
88987 #define ALT_USB_DEV_DOEPCTL2_EPTYPE_E_BULK 0x2
88988 /*
88989  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_EPTYPE
88990  *
88991  * Interrupt
88992  */
88993 #define ALT_USB_DEV_DOEPCTL2_EPTYPE_E_INTERRUP 0x3
88994 
88995 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_EPTYPE register field. */
88996 #define ALT_USB_DEV_DOEPCTL2_EPTYPE_LSB 18
88997 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_EPTYPE register field. */
88998 #define ALT_USB_DEV_DOEPCTL2_EPTYPE_MSB 19
88999 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_EPTYPE register field. */
89000 #define ALT_USB_DEV_DOEPCTL2_EPTYPE_WIDTH 2
89001 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_EPTYPE register field value. */
89002 #define ALT_USB_DEV_DOEPCTL2_EPTYPE_SET_MSK 0x000c0000
89003 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_EPTYPE register field value. */
89004 #define ALT_USB_DEV_DOEPCTL2_EPTYPE_CLR_MSK 0xfff3ffff
89005 /* The reset value of the ALT_USB_DEV_DOEPCTL2_EPTYPE register field. */
89006 #define ALT_USB_DEV_DOEPCTL2_EPTYPE_RESET 0x0
89007 /* Extracts the ALT_USB_DEV_DOEPCTL2_EPTYPE field value from a register. */
89008 #define ALT_USB_DEV_DOEPCTL2_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
89009 /* Produces a ALT_USB_DEV_DOEPCTL2_EPTYPE register field value suitable for setting the register. */
89010 #define ALT_USB_DEV_DOEPCTL2_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
89011 
89012 /*
89013  * Field : Snoop Mode - snp
89014  *
89015  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
89016  * In Snoop mode, the core does not check the correctness of OUT packets before
89017  * transferring them to application memory.
89018  *
89019  * Field Enumeration Values:
89020  *
89021  * Enum | Value | Description
89022  * :-------------------------------|:------|:-------------------
89023  * ALT_USB_DEV_DOEPCTL2_SNP_E_DIS | 0x0 | Disable Snoop Mode
89024  * ALT_USB_DEV_DOEPCTL2_SNP_E_EN | 0x1 | Enable Snoop Mode
89025  *
89026  * Field Access Macros:
89027  *
89028  */
89029 /*
89030  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_SNP
89031  *
89032  * Disable Snoop Mode
89033  */
89034 #define ALT_USB_DEV_DOEPCTL2_SNP_E_DIS 0x0
89035 /*
89036  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_SNP
89037  *
89038  * Enable Snoop Mode
89039  */
89040 #define ALT_USB_DEV_DOEPCTL2_SNP_E_EN 0x1
89041 
89042 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_SNP register field. */
89043 #define ALT_USB_DEV_DOEPCTL2_SNP_LSB 20
89044 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_SNP register field. */
89045 #define ALT_USB_DEV_DOEPCTL2_SNP_MSB 20
89046 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_SNP register field. */
89047 #define ALT_USB_DEV_DOEPCTL2_SNP_WIDTH 1
89048 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_SNP register field value. */
89049 #define ALT_USB_DEV_DOEPCTL2_SNP_SET_MSK 0x00100000
89050 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_SNP register field value. */
89051 #define ALT_USB_DEV_DOEPCTL2_SNP_CLR_MSK 0xffefffff
89052 /* The reset value of the ALT_USB_DEV_DOEPCTL2_SNP register field. */
89053 #define ALT_USB_DEV_DOEPCTL2_SNP_RESET 0x0
89054 /* Extracts the ALT_USB_DEV_DOEPCTL2_SNP field value from a register. */
89055 #define ALT_USB_DEV_DOEPCTL2_SNP_GET(value) (((value) & 0x00100000) >> 20)
89056 /* Produces a ALT_USB_DEV_DOEPCTL2_SNP register field value suitable for setting the register. */
89057 #define ALT_USB_DEV_DOEPCTL2_SNP_SET(value) (((value) << 20) & 0x00100000)
89058 
89059 /*
89060  * Field : STALL Handshake - stall
89061  *
89062  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
89063  * application sets this bit to stall all tokens from the USB host to this
89064  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
89065  * along with this bit, the STALL bit takes priority. Only the application can
89066  * clear this bit, never the core. Applies to control endpoints only. The
89067  * application can only set this bit, and the core clears it, when a SETUP token is
89068  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
89069  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
89070  * of this bit's setting, the core always responds to SETUP data packets with an
89071  * ACK handshake.
89072  *
89073  * Field Enumeration Values:
89074  *
89075  * Enum | Value | Description
89076  * :-----------------------------------|:------|:----------------------------
89077  * ALT_USB_DEV_DOEPCTL2_STALL_E_INACT | 0x0 | STALL All Tokens not active
89078  * ALT_USB_DEV_DOEPCTL2_STALL_E_ACT | 0x1 | STALL All Tokens active
89079  *
89080  * Field Access Macros:
89081  *
89082  */
89083 /*
89084  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_STALL
89085  *
89086  * STALL All Tokens not active
89087  */
89088 #define ALT_USB_DEV_DOEPCTL2_STALL_E_INACT 0x0
89089 /*
89090  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_STALL
89091  *
89092  * STALL All Tokens active
89093  */
89094 #define ALT_USB_DEV_DOEPCTL2_STALL_E_ACT 0x1
89095 
89096 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_STALL register field. */
89097 #define ALT_USB_DEV_DOEPCTL2_STALL_LSB 21
89098 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_STALL register field. */
89099 #define ALT_USB_DEV_DOEPCTL2_STALL_MSB 21
89100 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_STALL register field. */
89101 #define ALT_USB_DEV_DOEPCTL2_STALL_WIDTH 1
89102 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_STALL register field value. */
89103 #define ALT_USB_DEV_DOEPCTL2_STALL_SET_MSK 0x00200000
89104 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_STALL register field value. */
89105 #define ALT_USB_DEV_DOEPCTL2_STALL_CLR_MSK 0xffdfffff
89106 /* The reset value of the ALT_USB_DEV_DOEPCTL2_STALL register field. */
89107 #define ALT_USB_DEV_DOEPCTL2_STALL_RESET 0x0
89108 /* Extracts the ALT_USB_DEV_DOEPCTL2_STALL field value from a register. */
89109 #define ALT_USB_DEV_DOEPCTL2_STALL_GET(value) (((value) & 0x00200000) >> 21)
89110 /* Produces a ALT_USB_DEV_DOEPCTL2_STALL register field value suitable for setting the register. */
89111 #define ALT_USB_DEV_DOEPCTL2_STALL_SET(value) (((value) << 21) & 0x00200000)
89112 
89113 /*
89114  * Field : Clear NAK - cnak
89115  *
89116  * A write to this bit clears the NAK bit for the endpoint.
89117  *
89118  * Field Enumeration Values:
89119  *
89120  * Enum | Value | Description
89121  * :----------------------------------|:------|:-------------
89122  * ALT_USB_DEV_DOEPCTL2_CNAK_E_INACT | 0x0 | No Clear NAK
89123  * ALT_USB_DEV_DOEPCTL2_CNAK_E_ACT | 0x1 | Clear NAK
89124  *
89125  * Field Access Macros:
89126  *
89127  */
89128 /*
89129  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_CNAK
89130  *
89131  * No Clear NAK
89132  */
89133 #define ALT_USB_DEV_DOEPCTL2_CNAK_E_INACT 0x0
89134 /*
89135  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_CNAK
89136  *
89137  * Clear NAK
89138  */
89139 #define ALT_USB_DEV_DOEPCTL2_CNAK_E_ACT 0x1
89140 
89141 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_CNAK register field. */
89142 #define ALT_USB_DEV_DOEPCTL2_CNAK_LSB 26
89143 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_CNAK register field. */
89144 #define ALT_USB_DEV_DOEPCTL2_CNAK_MSB 26
89145 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_CNAK register field. */
89146 #define ALT_USB_DEV_DOEPCTL2_CNAK_WIDTH 1
89147 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_CNAK register field value. */
89148 #define ALT_USB_DEV_DOEPCTL2_CNAK_SET_MSK 0x04000000
89149 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_CNAK register field value. */
89150 #define ALT_USB_DEV_DOEPCTL2_CNAK_CLR_MSK 0xfbffffff
89151 /* The reset value of the ALT_USB_DEV_DOEPCTL2_CNAK register field. */
89152 #define ALT_USB_DEV_DOEPCTL2_CNAK_RESET 0x0
89153 /* Extracts the ALT_USB_DEV_DOEPCTL2_CNAK field value from a register. */
89154 #define ALT_USB_DEV_DOEPCTL2_CNAK_GET(value) (((value) & 0x04000000) >> 26)
89155 /* Produces a ALT_USB_DEV_DOEPCTL2_CNAK register field value suitable for setting the register. */
89156 #define ALT_USB_DEV_DOEPCTL2_CNAK_SET(value) (((value) << 26) & 0x04000000)
89157 
89158 /*
89159  * Field : Set NAK - snak
89160  *
89161  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
89162  * application can control the transmission of NAK handshakes on an endpoint. The
89163  * core can also Set this bit for an endpoint after a SETUP packet is received on
89164  * that endpoint.
89165  *
89166  * Field Enumeration Values:
89167  *
89168  * Enum | Value | Description
89169  * :----------------------------------|:------|:------------
89170  * ALT_USB_DEV_DOEPCTL2_SNAK_E_INACT | 0x0 | No Set NAK
89171  * ALT_USB_DEV_DOEPCTL2_SNAK_E_ACT | 0x1 | Set NAK
89172  *
89173  * Field Access Macros:
89174  *
89175  */
89176 /*
89177  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_SNAK
89178  *
89179  * No Set NAK
89180  */
89181 #define ALT_USB_DEV_DOEPCTL2_SNAK_E_INACT 0x0
89182 /*
89183  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_SNAK
89184  *
89185  * Set NAK
89186  */
89187 #define ALT_USB_DEV_DOEPCTL2_SNAK_E_ACT 0x1
89188 
89189 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_SNAK register field. */
89190 #define ALT_USB_DEV_DOEPCTL2_SNAK_LSB 27
89191 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_SNAK register field. */
89192 #define ALT_USB_DEV_DOEPCTL2_SNAK_MSB 27
89193 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_SNAK register field. */
89194 #define ALT_USB_DEV_DOEPCTL2_SNAK_WIDTH 1
89195 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_SNAK register field value. */
89196 #define ALT_USB_DEV_DOEPCTL2_SNAK_SET_MSK 0x08000000
89197 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_SNAK register field value. */
89198 #define ALT_USB_DEV_DOEPCTL2_SNAK_CLR_MSK 0xf7ffffff
89199 /* The reset value of the ALT_USB_DEV_DOEPCTL2_SNAK register field. */
89200 #define ALT_USB_DEV_DOEPCTL2_SNAK_RESET 0x0
89201 /* Extracts the ALT_USB_DEV_DOEPCTL2_SNAK field value from a register. */
89202 #define ALT_USB_DEV_DOEPCTL2_SNAK_GET(value) (((value) & 0x08000000) >> 27)
89203 /* Produces a ALT_USB_DEV_DOEPCTL2_SNAK register field value suitable for setting the register. */
89204 #define ALT_USB_DEV_DOEPCTL2_SNAK_SET(value) (((value) << 27) & 0x08000000)
89205 
89206 /*
89207  * Field : Set DATA0 PID - setd0pid
89208  *
89209  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
89210  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
89211  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
89212  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
89213  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
89214  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
89215  * mode is enabled, this field is reserved. The frame number in which to send data
89216  * is in the transmit descriptor structure. The frame in which to receive data is
89217  * updated in receive descriptor structure.
89218  *
89219  * Field Enumeration Values:
89220  *
89221  * Enum | Value | Description
89222  * :-------------------------------------|:------|:------------------------------------
89223  * ALT_USB_DEV_DOEPCTL2_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
89224  * ALT_USB_DEV_DOEPCTL2_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
89225  *
89226  * Field Access Macros:
89227  *
89228  */
89229 /*
89230  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_SETD0PID
89231  *
89232  * Disables Set DATA0 PID
89233  */
89234 #define ALT_USB_DEV_DOEPCTL2_SETD0PID_E_DISD 0x0
89235 /*
89236  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_SETD0PID
89237  *
89238  * Enables Endpoint Data PID to DATA0)
89239  */
89240 #define ALT_USB_DEV_DOEPCTL2_SETD0PID_E_END 0x1
89241 
89242 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_SETD0PID register field. */
89243 #define ALT_USB_DEV_DOEPCTL2_SETD0PID_LSB 28
89244 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_SETD0PID register field. */
89245 #define ALT_USB_DEV_DOEPCTL2_SETD0PID_MSB 28
89246 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_SETD0PID register field. */
89247 #define ALT_USB_DEV_DOEPCTL2_SETD0PID_WIDTH 1
89248 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_SETD0PID register field value. */
89249 #define ALT_USB_DEV_DOEPCTL2_SETD0PID_SET_MSK 0x10000000
89250 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_SETD0PID register field value. */
89251 #define ALT_USB_DEV_DOEPCTL2_SETD0PID_CLR_MSK 0xefffffff
89252 /* The reset value of the ALT_USB_DEV_DOEPCTL2_SETD0PID register field. */
89253 #define ALT_USB_DEV_DOEPCTL2_SETD0PID_RESET 0x0
89254 /* Extracts the ALT_USB_DEV_DOEPCTL2_SETD0PID field value from a register. */
89255 #define ALT_USB_DEV_DOEPCTL2_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
89256 /* Produces a ALT_USB_DEV_DOEPCTL2_SETD0PID register field value suitable for setting the register. */
89257 #define ALT_USB_DEV_DOEPCTL2_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
89258 
89259 /*
89260  * Field : Set DATA1 PID - setd1pid
89261  *
89262  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
89263  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
89264  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
89265  *
89266  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
89267  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
89268  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
89269  *
89270  * Field Enumeration Values:
89271  *
89272  * Enum | Value | Description
89273  * :-------------------------------------|:------|:-----------------------
89274  * ALT_USB_DEV_DOEPCTL2_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
89275  * ALT_USB_DEV_DOEPCTL2_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
89276  *
89277  * Field Access Macros:
89278  *
89279  */
89280 /*
89281  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_SETD1PID
89282  *
89283  * Disables Set DATA1 PID
89284  */
89285 #define ALT_USB_DEV_DOEPCTL2_SETD1PID_E_DISD 0x0
89286 /*
89287  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_SETD1PID
89288  *
89289  * Enables Set DATA1 PID
89290  */
89291 #define ALT_USB_DEV_DOEPCTL2_SETD1PID_E_END 0x1
89292 
89293 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_SETD1PID register field. */
89294 #define ALT_USB_DEV_DOEPCTL2_SETD1PID_LSB 29
89295 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_SETD1PID register field. */
89296 #define ALT_USB_DEV_DOEPCTL2_SETD1PID_MSB 29
89297 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_SETD1PID register field. */
89298 #define ALT_USB_DEV_DOEPCTL2_SETD1PID_WIDTH 1
89299 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_SETD1PID register field value. */
89300 #define ALT_USB_DEV_DOEPCTL2_SETD1PID_SET_MSK 0x20000000
89301 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_SETD1PID register field value. */
89302 #define ALT_USB_DEV_DOEPCTL2_SETD1PID_CLR_MSK 0xdfffffff
89303 /* The reset value of the ALT_USB_DEV_DOEPCTL2_SETD1PID register field. */
89304 #define ALT_USB_DEV_DOEPCTL2_SETD1PID_RESET 0x0
89305 /* Extracts the ALT_USB_DEV_DOEPCTL2_SETD1PID field value from a register. */
89306 #define ALT_USB_DEV_DOEPCTL2_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
89307 /* Produces a ALT_USB_DEV_DOEPCTL2_SETD1PID register field value suitable for setting the register. */
89308 #define ALT_USB_DEV_DOEPCTL2_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
89309 
89310 /*
89311  * Field : Endpoint Disable - epdis
89312  *
89313  * Applies to IN and OUT endpoints. The application sets this bit to stop
89314  * transmitting/receiving data on an endpoint, even before the transfer for that
89315  * endpoint is complete. The application must wait for the Endpoint Disabled
89316  * interrupt before treating the endpoint as disabled. The core clears this bit
89317  * before setting the Endpoint Disabled interrupt. The application must set this
89318  * bit only if Endpoint Enable is already set for this endpoint.
89319  *
89320  * Field Enumeration Values:
89321  *
89322  * Enum | Value | Description
89323  * :-----------------------------------|:------|:--------------------
89324  * ALT_USB_DEV_DOEPCTL2_EPDIS_E_INACT | 0x0 | No Endpoint Disable
89325  * ALT_USB_DEV_DOEPCTL2_EPDIS_E_ACT | 0x1 | Endpoint Disable
89326  *
89327  * Field Access Macros:
89328  *
89329  */
89330 /*
89331  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_EPDIS
89332  *
89333  * No Endpoint Disable
89334  */
89335 #define ALT_USB_DEV_DOEPCTL2_EPDIS_E_INACT 0x0
89336 /*
89337  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_EPDIS
89338  *
89339  * Endpoint Disable
89340  */
89341 #define ALT_USB_DEV_DOEPCTL2_EPDIS_E_ACT 0x1
89342 
89343 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_EPDIS register field. */
89344 #define ALT_USB_DEV_DOEPCTL2_EPDIS_LSB 30
89345 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_EPDIS register field. */
89346 #define ALT_USB_DEV_DOEPCTL2_EPDIS_MSB 30
89347 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_EPDIS register field. */
89348 #define ALT_USB_DEV_DOEPCTL2_EPDIS_WIDTH 1
89349 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_EPDIS register field value. */
89350 #define ALT_USB_DEV_DOEPCTL2_EPDIS_SET_MSK 0x40000000
89351 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_EPDIS register field value. */
89352 #define ALT_USB_DEV_DOEPCTL2_EPDIS_CLR_MSK 0xbfffffff
89353 /* The reset value of the ALT_USB_DEV_DOEPCTL2_EPDIS register field. */
89354 #define ALT_USB_DEV_DOEPCTL2_EPDIS_RESET 0x0
89355 /* Extracts the ALT_USB_DEV_DOEPCTL2_EPDIS field value from a register. */
89356 #define ALT_USB_DEV_DOEPCTL2_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
89357 /* Produces a ALT_USB_DEV_DOEPCTL2_EPDIS register field value suitable for setting the register. */
89358 #define ALT_USB_DEV_DOEPCTL2_EPDIS_SET(value) (((value) << 30) & 0x40000000)
89359 
89360 /*
89361  * Field : Endpoint Enable - epena
89362  *
89363  * Applies to IN and OUT endpoints.
89364  *
89365  * * When Scatter/Gather DMA mode is enabled,
89366  *
89367  * * for IN endpoints this bit indicates that the descriptor structure and data
89368  * buffer with data ready to transmit is setup.
89369  *
89370  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
89371  * receive data is setup.
89372  *
89373  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
89374  * mode:
89375  *
89376  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
89377  * the endpoint.
89378  *
89379  * * for OUT endpoints, this bit indicates that the application has allocated the
89380  * memory to start receiving data from the USB.
89381  *
89382  * * The core clears this bit before setting any of the following interrupts on
89383  * this endpoint:
89384  *
89385  * * SETUP Phase Done
89386  *
89387  * * Endpoint Disabled
89388  *
89389  * * Transfer Completed
89390  *
89391  * for control endpoints in DMA mode, this bit must be set to be able to transfer
89392  * SETUP data packets in memory.
89393  *
89394  * Field Enumeration Values:
89395  *
89396  * Enum | Value | Description
89397  * :-----------------------------------|:------|:-------------------------
89398  * ALT_USB_DEV_DOEPCTL2_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
89399  * ALT_USB_DEV_DOEPCTL2_EPENA_E_ACT | 0x1 | Endpoint Enable active
89400  *
89401  * Field Access Macros:
89402  *
89403  */
89404 /*
89405  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_EPENA
89406  *
89407  * Endpoint Enable inactive
89408  */
89409 #define ALT_USB_DEV_DOEPCTL2_EPENA_E_INACT 0x0
89410 /*
89411  * Enumerated value for register field ALT_USB_DEV_DOEPCTL2_EPENA
89412  *
89413  * Endpoint Enable active
89414  */
89415 #define ALT_USB_DEV_DOEPCTL2_EPENA_E_ACT 0x1
89416 
89417 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL2_EPENA register field. */
89418 #define ALT_USB_DEV_DOEPCTL2_EPENA_LSB 31
89419 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL2_EPENA register field. */
89420 #define ALT_USB_DEV_DOEPCTL2_EPENA_MSB 31
89421 /* The width in bits of the ALT_USB_DEV_DOEPCTL2_EPENA register field. */
89422 #define ALT_USB_DEV_DOEPCTL2_EPENA_WIDTH 1
89423 /* The mask used to set the ALT_USB_DEV_DOEPCTL2_EPENA register field value. */
89424 #define ALT_USB_DEV_DOEPCTL2_EPENA_SET_MSK 0x80000000
89425 /* The mask used to clear the ALT_USB_DEV_DOEPCTL2_EPENA register field value. */
89426 #define ALT_USB_DEV_DOEPCTL2_EPENA_CLR_MSK 0x7fffffff
89427 /* The reset value of the ALT_USB_DEV_DOEPCTL2_EPENA register field. */
89428 #define ALT_USB_DEV_DOEPCTL2_EPENA_RESET 0x0
89429 /* Extracts the ALT_USB_DEV_DOEPCTL2_EPENA field value from a register. */
89430 #define ALT_USB_DEV_DOEPCTL2_EPENA_GET(value) (((value) & 0x80000000) >> 31)
89431 /* Produces a ALT_USB_DEV_DOEPCTL2_EPENA register field value suitable for setting the register. */
89432 #define ALT_USB_DEV_DOEPCTL2_EPENA_SET(value) (((value) << 31) & 0x80000000)
89433 
89434 #ifndef __ASSEMBLY__
89435 /*
89436  * WARNING: The C register and register group struct declarations are provided for
89437  * convenience and illustrative purposes. They should, however, be used with
89438  * caution as the C language standard provides no guarantees about the alignment or
89439  * atomicity of device memory accesses. The recommended practice for writing
89440  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
89441  * alt_write_word() functions.
89442  *
89443  * The struct declaration for register ALT_USB_DEV_DOEPCTL2.
89444  */
89445 struct ALT_USB_DEV_DOEPCTL2_s
89446 {
89447  uint32_t mps : 11; /* Maximum Packet Size */
89448  uint32_t : 4; /* *UNDEFINED* */
89449  uint32_t usbactep : 1; /* USB Active Endpoint */
89450  const uint32_t dpid : 1; /* Endpoint Data PID */
89451  const uint32_t naksts : 1; /* NAK Status */
89452  uint32_t eptype : 2; /* Endpoint Type */
89453  uint32_t snp : 1; /* Snoop Mode */
89454  const uint32_t stall : 1; /* STALL Handshake */
89455  uint32_t : 4; /* *UNDEFINED* */
89456  uint32_t cnak : 1; /* Clear NAK */
89457  uint32_t snak : 1; /* Set NAK */
89458  uint32_t setd0pid : 1; /* Set DATA0 PID */
89459  uint32_t setd1pid : 1; /* Set DATA1 PID */
89460  const uint32_t epdis : 1; /* Endpoint Disable */
89461  const uint32_t epena : 1; /* Endpoint Enable */
89462 };
89463 
89464 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL2. */
89465 typedef volatile struct ALT_USB_DEV_DOEPCTL2_s ALT_USB_DEV_DOEPCTL2_t;
89466 #endif /* __ASSEMBLY__ */
89467 
89468 /* The byte offset of the ALT_USB_DEV_DOEPCTL2 register from the beginning of the component. */
89469 #define ALT_USB_DEV_DOEPCTL2_OFST 0x340
89470 /* The address of the ALT_USB_DEV_DOEPCTL2 register. */
89471 #define ALT_USB_DEV_DOEPCTL2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL2_OFST))
89472 
89473 /*
89474  * Register : Device OUT Endpoint 2 Interrupt Register - doepint2
89475  *
89476  * This register indicates the status of an endpoint with respect to USB- and AHB-
89477  * related events. The application must read this register when the OUT Endpoints
89478  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
89479  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
89480  * can read this register, it must first read the Device All Endpoints Interrupt
89481  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
89482  * Interrupt register. The application must clear the appropriate bit in this
89483  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
89484  *
89485  * Register Layout
89486  *
89487  * Bits | Access | Reset | Description
89488  * :--------|:-------|:------|:------------------------------------------
89489  * [0] | R | 0x0 | Transfer Completed Interrupt
89490  * [1] | R | 0x0 | Endpoint Disabled Interrupt
89491  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT2_AHBERR
89492  * [3] | R | 0x0 | SETUP Phase Done
89493  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
89494  * [5] | R | 0x0 | Status Phase Received for Control Write
89495  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
89496  * [7] | ??? | 0x0 | *UNDEFINED*
89497  * [8] | R | 0x0 | OUT Packet Error
89498  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
89499  * [10] | ??? | 0x0 | *UNDEFINED*
89500  * [11] | R | 0x0 | Packet Drop Status
89501  * [12] | R | 0x0 | BbleErr Interrupt
89502  * [13] | R | 0x0 | NAK Interrupt
89503  * [14] | R | 0x0 | NYET Interrupt
89504  * [31:15] | ??? | 0x0 | *UNDEFINED*
89505  *
89506  */
89507 /*
89508  * Field : Transfer Completed Interrupt - xfercompl
89509  *
89510  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
89511  *
89512  * This field indicates that the requested data from the internal FIFO is moved to
89513  * external system memory. This interrupt is generated only when the corresponding
89514  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
89515  * is Set.
89516  *
89517  * When Scatter/Gather DMA mode is disabled, this field indicates that the
89518  * programmed transfer is complete on the AHB as well as on the USB, for this
89519  * endpoint.
89520  *
89521  * Field Enumeration Values:
89522  *
89523  * Enum | Value | Description
89524  * :---------------------------------------|:------|:-----------------------------
89525  * ALT_USB_DEV_DOEPINT2_XFERCOMPL_E_INACT | 0x0 | No Interrupt
89526  * ALT_USB_DEV_DOEPINT2_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
89527  *
89528  * Field Access Macros:
89529  *
89530  */
89531 /*
89532  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_XFERCOMPL
89533  *
89534  * No Interrupt
89535  */
89536 #define ALT_USB_DEV_DOEPINT2_XFERCOMPL_E_INACT 0x0
89537 /*
89538  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_XFERCOMPL
89539  *
89540  * Transfer Completed Interrupt
89541  */
89542 #define ALT_USB_DEV_DOEPINT2_XFERCOMPL_E_ACT 0x1
89543 
89544 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_XFERCOMPL register field. */
89545 #define ALT_USB_DEV_DOEPINT2_XFERCOMPL_LSB 0
89546 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_XFERCOMPL register field. */
89547 #define ALT_USB_DEV_DOEPINT2_XFERCOMPL_MSB 0
89548 /* The width in bits of the ALT_USB_DEV_DOEPINT2_XFERCOMPL register field. */
89549 #define ALT_USB_DEV_DOEPINT2_XFERCOMPL_WIDTH 1
89550 /* The mask used to set the ALT_USB_DEV_DOEPINT2_XFERCOMPL register field value. */
89551 #define ALT_USB_DEV_DOEPINT2_XFERCOMPL_SET_MSK 0x00000001
89552 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_XFERCOMPL register field value. */
89553 #define ALT_USB_DEV_DOEPINT2_XFERCOMPL_CLR_MSK 0xfffffffe
89554 /* The reset value of the ALT_USB_DEV_DOEPINT2_XFERCOMPL register field. */
89555 #define ALT_USB_DEV_DOEPINT2_XFERCOMPL_RESET 0x0
89556 /* Extracts the ALT_USB_DEV_DOEPINT2_XFERCOMPL field value from a register. */
89557 #define ALT_USB_DEV_DOEPINT2_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
89558 /* Produces a ALT_USB_DEV_DOEPINT2_XFERCOMPL register field value suitable for setting the register. */
89559 #define ALT_USB_DEV_DOEPINT2_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
89560 
89561 /*
89562  * Field : Endpoint Disabled Interrupt - epdisbld
89563  *
89564  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
89565  * disabled per the application's request.
89566  *
89567  * Field Enumeration Values:
89568  *
89569  * Enum | Value | Description
89570  * :--------------------------------------|:------|:----------------------------
89571  * ALT_USB_DEV_DOEPINT2_EPDISBLD_E_INACT | 0x0 | No Interrupt
89572  * ALT_USB_DEV_DOEPINT2_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
89573  *
89574  * Field Access Macros:
89575  *
89576  */
89577 /*
89578  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_EPDISBLD
89579  *
89580  * No Interrupt
89581  */
89582 #define ALT_USB_DEV_DOEPINT2_EPDISBLD_E_INACT 0x0
89583 /*
89584  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_EPDISBLD
89585  *
89586  * Endpoint Disabled Interrupt
89587  */
89588 #define ALT_USB_DEV_DOEPINT2_EPDISBLD_E_ACT 0x1
89589 
89590 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_EPDISBLD register field. */
89591 #define ALT_USB_DEV_DOEPINT2_EPDISBLD_LSB 1
89592 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_EPDISBLD register field. */
89593 #define ALT_USB_DEV_DOEPINT2_EPDISBLD_MSB 1
89594 /* The width in bits of the ALT_USB_DEV_DOEPINT2_EPDISBLD register field. */
89595 #define ALT_USB_DEV_DOEPINT2_EPDISBLD_WIDTH 1
89596 /* The mask used to set the ALT_USB_DEV_DOEPINT2_EPDISBLD register field value. */
89597 #define ALT_USB_DEV_DOEPINT2_EPDISBLD_SET_MSK 0x00000002
89598 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_EPDISBLD register field value. */
89599 #define ALT_USB_DEV_DOEPINT2_EPDISBLD_CLR_MSK 0xfffffffd
89600 /* The reset value of the ALT_USB_DEV_DOEPINT2_EPDISBLD register field. */
89601 #define ALT_USB_DEV_DOEPINT2_EPDISBLD_RESET 0x0
89602 /* Extracts the ALT_USB_DEV_DOEPINT2_EPDISBLD field value from a register. */
89603 #define ALT_USB_DEV_DOEPINT2_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
89604 /* Produces a ALT_USB_DEV_DOEPINT2_EPDISBLD register field value suitable for setting the register. */
89605 #define ALT_USB_DEV_DOEPINT2_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
89606 
89607 /*
89608  * Field : ahberr
89609  *
89610  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
89611  * there is an AHB error during an AHB read/write. The application can read the
89612  * corresponding endpoint DMA address register to get the error address.
89613  *
89614  * Field Enumeration Values:
89615  *
89616  * Enum | Value | Description
89617  * :------------------------------------|:------|:--------------------
89618  * ALT_USB_DEV_DOEPINT2_AHBERR_E_INACT | 0x0 | No Interrupt
89619  * ALT_USB_DEV_DOEPINT2_AHBERR_E_ACT | 0x1 | AHB Error interrupt
89620  *
89621  * Field Access Macros:
89622  *
89623  */
89624 /*
89625  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_AHBERR
89626  *
89627  * No Interrupt
89628  */
89629 #define ALT_USB_DEV_DOEPINT2_AHBERR_E_INACT 0x0
89630 /*
89631  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_AHBERR
89632  *
89633  * AHB Error interrupt
89634  */
89635 #define ALT_USB_DEV_DOEPINT2_AHBERR_E_ACT 0x1
89636 
89637 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_AHBERR register field. */
89638 #define ALT_USB_DEV_DOEPINT2_AHBERR_LSB 2
89639 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_AHBERR register field. */
89640 #define ALT_USB_DEV_DOEPINT2_AHBERR_MSB 2
89641 /* The width in bits of the ALT_USB_DEV_DOEPINT2_AHBERR register field. */
89642 #define ALT_USB_DEV_DOEPINT2_AHBERR_WIDTH 1
89643 /* The mask used to set the ALT_USB_DEV_DOEPINT2_AHBERR register field value. */
89644 #define ALT_USB_DEV_DOEPINT2_AHBERR_SET_MSK 0x00000004
89645 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_AHBERR register field value. */
89646 #define ALT_USB_DEV_DOEPINT2_AHBERR_CLR_MSK 0xfffffffb
89647 /* The reset value of the ALT_USB_DEV_DOEPINT2_AHBERR register field. */
89648 #define ALT_USB_DEV_DOEPINT2_AHBERR_RESET 0x0
89649 /* Extracts the ALT_USB_DEV_DOEPINT2_AHBERR field value from a register. */
89650 #define ALT_USB_DEV_DOEPINT2_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
89651 /* Produces a ALT_USB_DEV_DOEPINT2_AHBERR register field value suitable for setting the register. */
89652 #define ALT_USB_DEV_DOEPINT2_AHBERR_SET(value) (((value) << 2) & 0x00000004)
89653 
89654 /*
89655  * Field : SETUP Phase Done - setup
89656  *
89657  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
89658  * control endpoint is complete and no more back-to-back SETUP packets were
89659  * received for the current control transfer. On this interrupt, the application
89660  * can decode the received SETUP data packet.
89661  *
89662  * Field Enumeration Values:
89663  *
89664  * Enum | Value | Description
89665  * :-----------------------------------|:------|:--------------------
89666  * ALT_USB_DEV_DOEPINT2_SETUP_E_INACT | 0x0 | No SETUP Phase Done
89667  * ALT_USB_DEV_DOEPINT2_SETUP_E_ACT | 0x1 | SETUP Phase Done
89668  *
89669  * Field Access Macros:
89670  *
89671  */
89672 /*
89673  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_SETUP
89674  *
89675  * No SETUP Phase Done
89676  */
89677 #define ALT_USB_DEV_DOEPINT2_SETUP_E_INACT 0x0
89678 /*
89679  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_SETUP
89680  *
89681  * SETUP Phase Done
89682  */
89683 #define ALT_USB_DEV_DOEPINT2_SETUP_E_ACT 0x1
89684 
89685 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_SETUP register field. */
89686 #define ALT_USB_DEV_DOEPINT2_SETUP_LSB 3
89687 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_SETUP register field. */
89688 #define ALT_USB_DEV_DOEPINT2_SETUP_MSB 3
89689 /* The width in bits of the ALT_USB_DEV_DOEPINT2_SETUP register field. */
89690 #define ALT_USB_DEV_DOEPINT2_SETUP_WIDTH 1
89691 /* The mask used to set the ALT_USB_DEV_DOEPINT2_SETUP register field value. */
89692 #define ALT_USB_DEV_DOEPINT2_SETUP_SET_MSK 0x00000008
89693 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_SETUP register field value. */
89694 #define ALT_USB_DEV_DOEPINT2_SETUP_CLR_MSK 0xfffffff7
89695 /* The reset value of the ALT_USB_DEV_DOEPINT2_SETUP register field. */
89696 #define ALT_USB_DEV_DOEPINT2_SETUP_RESET 0x0
89697 /* Extracts the ALT_USB_DEV_DOEPINT2_SETUP field value from a register. */
89698 #define ALT_USB_DEV_DOEPINT2_SETUP_GET(value) (((value) & 0x00000008) >> 3)
89699 /* Produces a ALT_USB_DEV_DOEPINT2_SETUP register field value suitable for setting the register. */
89700 #define ALT_USB_DEV_DOEPINT2_SETUP_SET(value) (((value) << 3) & 0x00000008)
89701 
89702 /*
89703  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
89704  *
89705  * Applies only to control OUT endpoints. Indicates that an OUT token was received
89706  * when the endpoint was not yet enabled. This interrupt is asserted on the
89707  * endpoint for which the OUT token was received.
89708  *
89709  * Field Enumeration Values:
89710  *
89711  * Enum | Value | Description
89712  * :-----------------------------------------|:------|:---------------------------------------------
89713  * ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
89714  * ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
89715  *
89716  * Field Access Macros:
89717  *
89718  */
89719 /*
89720  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS
89721  *
89722  * No OUT Token Received When Endpoint Disabled
89723  */
89724 #define ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS_E_INACT 0x0
89725 /*
89726  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS
89727  *
89728  * OUT Token Received When Endpoint Disabled
89729  */
89730 #define ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS_E_ACT 0x1
89731 
89732 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS register field. */
89733 #define ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS_LSB 4
89734 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS register field. */
89735 #define ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS_MSB 4
89736 /* The width in bits of the ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS register field. */
89737 #define ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS_WIDTH 1
89738 /* The mask used to set the ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS register field value. */
89739 #define ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS_SET_MSK 0x00000010
89740 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS register field value. */
89741 #define ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS_CLR_MSK 0xffffffef
89742 /* The reset value of the ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS register field. */
89743 #define ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS_RESET 0x0
89744 /* Extracts the ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS field value from a register. */
89745 #define ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
89746 /* Produces a ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS register field value suitable for setting the register. */
89747 #define ALT_USB_DEV_DOEPINT2_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
89748 
89749 /*
89750  * Field : Status Phase Received for Control Write - stsphsercvd
89751  *
89752  * This interrupt is valid only for Control OUT endpoints and only in Scatter
89753  * Gather DMA mode. This interrupt is generated only after the core has transferred
89754  * all the data that the host has sent during the data phase of a control write
89755  * transfer, to the system memory buffer. The interrupt indicates to the
89756  * application that the host has switched from data phase to the status phase of a
89757  * Control Write transfer. The application can use this interrupt to ACK or STALL
89758  * the Status phase, after it has decoded the data phase. This is applicable only
89759  * in Case of Scatter Gather DMA mode.
89760  *
89761  * Field Enumeration Values:
89762  *
89763  * Enum | Value | Description
89764  * :-----------------------------------------|:------|:-------------------------------------------
89765  * ALT_USB_DEV_DOEPINT2_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
89766  * ALT_USB_DEV_DOEPINT2_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
89767  *
89768  * Field Access Macros:
89769  *
89770  */
89771 /*
89772  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_STSPHSERCVD
89773  *
89774  * No Status Phase Received for Control Write
89775  */
89776 #define ALT_USB_DEV_DOEPINT2_STSPHSERCVD_E_INACT 0x0
89777 /*
89778  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_STSPHSERCVD
89779  *
89780  * Status Phase Received for Control Write
89781  */
89782 #define ALT_USB_DEV_DOEPINT2_STSPHSERCVD_E_ACT 0x1
89783 
89784 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_STSPHSERCVD register field. */
89785 #define ALT_USB_DEV_DOEPINT2_STSPHSERCVD_LSB 5
89786 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_STSPHSERCVD register field. */
89787 #define ALT_USB_DEV_DOEPINT2_STSPHSERCVD_MSB 5
89788 /* The width in bits of the ALT_USB_DEV_DOEPINT2_STSPHSERCVD register field. */
89789 #define ALT_USB_DEV_DOEPINT2_STSPHSERCVD_WIDTH 1
89790 /* The mask used to set the ALT_USB_DEV_DOEPINT2_STSPHSERCVD register field value. */
89791 #define ALT_USB_DEV_DOEPINT2_STSPHSERCVD_SET_MSK 0x00000020
89792 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_STSPHSERCVD register field value. */
89793 #define ALT_USB_DEV_DOEPINT2_STSPHSERCVD_CLR_MSK 0xffffffdf
89794 /* The reset value of the ALT_USB_DEV_DOEPINT2_STSPHSERCVD register field. */
89795 #define ALT_USB_DEV_DOEPINT2_STSPHSERCVD_RESET 0x0
89796 /* Extracts the ALT_USB_DEV_DOEPINT2_STSPHSERCVD field value from a register. */
89797 #define ALT_USB_DEV_DOEPINT2_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
89798 /* Produces a ALT_USB_DEV_DOEPINT2_STSPHSERCVD register field value suitable for setting the register. */
89799 #define ALT_USB_DEV_DOEPINT2_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
89800 
89801 /*
89802  * Field : Back-to-Back SETUP Packets Received - back2backsetup
89803  *
89804  * Applies to Control OUT endpoints only. This bit indicates that the core has
89805  * received more than three back-to-back SETUP packets for this particular
89806  * endpoint. for information about handling this interrupt,
89807  *
89808  * Field Enumeration Values:
89809  *
89810  * Enum | Value | Description
89811  * :--------------------------------------------|:------|:---------------------------------------
89812  * ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
89813  * ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
89814  *
89815  * Field Access Macros:
89816  *
89817  */
89818 /*
89819  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP
89820  *
89821  * No Back-to-Back SETUP Packets Received
89822  */
89823 #define ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP_E_INACT 0x0
89824 /*
89825  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP
89826  *
89827  * Back-to-Back SETUP Packets Received
89828  */
89829 #define ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP_E_ACT 0x1
89830 
89831 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP register field. */
89832 #define ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP_LSB 6
89833 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP register field. */
89834 #define ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP_MSB 6
89835 /* The width in bits of the ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP register field. */
89836 #define ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP_WIDTH 1
89837 /* The mask used to set the ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP register field value. */
89838 #define ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP_SET_MSK 0x00000040
89839 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP register field value. */
89840 #define ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP_CLR_MSK 0xffffffbf
89841 /* The reset value of the ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP register field. */
89842 #define ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP_RESET 0x0
89843 /* Extracts the ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP field value from a register. */
89844 #define ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
89845 /* Produces a ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP register field value suitable for setting the register. */
89846 #define ALT_USB_DEV_DOEPINT2_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
89847 
89848 /*
89849  * Field : OUT Packet Error - outpkterr
89850  *
89851  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
89852  * an overflow or a CRC error for non-Isochronous OUT packet.
89853  *
89854  * Field Enumeration Values:
89855  *
89856  * Enum | Value | Description
89857  * :---------------------------------------|:------|:--------------------
89858  * ALT_USB_DEV_DOEPINT2_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
89859  * ALT_USB_DEV_DOEPINT2_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
89860  *
89861  * Field Access Macros:
89862  *
89863  */
89864 /*
89865  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_OUTPKTERR
89866  *
89867  * No OUT Packet Error
89868  */
89869 #define ALT_USB_DEV_DOEPINT2_OUTPKTERR_E_INACT 0x0
89870 /*
89871  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_OUTPKTERR
89872  *
89873  * OUT Packet Error
89874  */
89875 #define ALT_USB_DEV_DOEPINT2_OUTPKTERR_E_ACT 0x1
89876 
89877 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_OUTPKTERR register field. */
89878 #define ALT_USB_DEV_DOEPINT2_OUTPKTERR_LSB 8
89879 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_OUTPKTERR register field. */
89880 #define ALT_USB_DEV_DOEPINT2_OUTPKTERR_MSB 8
89881 /* The width in bits of the ALT_USB_DEV_DOEPINT2_OUTPKTERR register field. */
89882 #define ALT_USB_DEV_DOEPINT2_OUTPKTERR_WIDTH 1
89883 /* The mask used to set the ALT_USB_DEV_DOEPINT2_OUTPKTERR register field value. */
89884 #define ALT_USB_DEV_DOEPINT2_OUTPKTERR_SET_MSK 0x00000100
89885 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_OUTPKTERR register field value. */
89886 #define ALT_USB_DEV_DOEPINT2_OUTPKTERR_CLR_MSK 0xfffffeff
89887 /* The reset value of the ALT_USB_DEV_DOEPINT2_OUTPKTERR register field. */
89888 #define ALT_USB_DEV_DOEPINT2_OUTPKTERR_RESET 0x0
89889 /* Extracts the ALT_USB_DEV_DOEPINT2_OUTPKTERR field value from a register. */
89890 #define ALT_USB_DEV_DOEPINT2_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
89891 /* Produces a ALT_USB_DEV_DOEPINT2_OUTPKTERR register field value suitable for setting the register. */
89892 #define ALT_USB_DEV_DOEPINT2_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
89893 
89894 /*
89895  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
89896  *
89897  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
89898  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
89899  * the descriptor accessed is not ready for the Core to process, such as Host busy
89900  * or DMA done
89901  *
89902  * Field Enumeration Values:
89903  *
89904  * Enum | Value | Description
89905  * :-------------------------------------|:------|:--------------
89906  * ALT_USB_DEV_DOEPINT2_BNAINTR_E_INACT | 0x0 | No interrupt
89907  * ALT_USB_DEV_DOEPINT2_BNAINTR_E_ACT | 0x1 | BNA interrupt
89908  *
89909  * Field Access Macros:
89910  *
89911  */
89912 /*
89913  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_BNAINTR
89914  *
89915  * No interrupt
89916  */
89917 #define ALT_USB_DEV_DOEPINT2_BNAINTR_E_INACT 0x0
89918 /*
89919  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_BNAINTR
89920  *
89921  * BNA interrupt
89922  */
89923 #define ALT_USB_DEV_DOEPINT2_BNAINTR_E_ACT 0x1
89924 
89925 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_BNAINTR register field. */
89926 #define ALT_USB_DEV_DOEPINT2_BNAINTR_LSB 9
89927 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_BNAINTR register field. */
89928 #define ALT_USB_DEV_DOEPINT2_BNAINTR_MSB 9
89929 /* The width in bits of the ALT_USB_DEV_DOEPINT2_BNAINTR register field. */
89930 #define ALT_USB_DEV_DOEPINT2_BNAINTR_WIDTH 1
89931 /* The mask used to set the ALT_USB_DEV_DOEPINT2_BNAINTR register field value. */
89932 #define ALT_USB_DEV_DOEPINT2_BNAINTR_SET_MSK 0x00000200
89933 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_BNAINTR register field value. */
89934 #define ALT_USB_DEV_DOEPINT2_BNAINTR_CLR_MSK 0xfffffdff
89935 /* The reset value of the ALT_USB_DEV_DOEPINT2_BNAINTR register field. */
89936 #define ALT_USB_DEV_DOEPINT2_BNAINTR_RESET 0x0
89937 /* Extracts the ALT_USB_DEV_DOEPINT2_BNAINTR field value from a register. */
89938 #define ALT_USB_DEV_DOEPINT2_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
89939 /* Produces a ALT_USB_DEV_DOEPINT2_BNAINTR register field value suitable for setting the register. */
89940 #define ALT_USB_DEV_DOEPINT2_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
89941 
89942 /*
89943  * Field : Packet Drop Status - pktdrpsts
89944  *
89945  * This bit indicates to the application that an ISOC OUT packet has been dropped.
89946  * This bit does not have an associated mask bit and does not generate an
89947  * interrupt.
89948  *
89949  * Field Enumeration Values:
89950  *
89951  * Enum | Value | Description
89952  * :---------------------------------------|:------|:-----------------------------
89953  * ALT_USB_DEV_DOEPINT2_PKTDRPSTS_E_INACT | 0x0 | No interrupt
89954  * ALT_USB_DEV_DOEPINT2_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
89955  *
89956  * Field Access Macros:
89957  *
89958  */
89959 /*
89960  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_PKTDRPSTS
89961  *
89962  * No interrupt
89963  */
89964 #define ALT_USB_DEV_DOEPINT2_PKTDRPSTS_E_INACT 0x0
89965 /*
89966  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_PKTDRPSTS
89967  *
89968  * Packet Drop Status interrupt
89969  */
89970 #define ALT_USB_DEV_DOEPINT2_PKTDRPSTS_E_ACT 0x1
89971 
89972 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_PKTDRPSTS register field. */
89973 #define ALT_USB_DEV_DOEPINT2_PKTDRPSTS_LSB 11
89974 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_PKTDRPSTS register field. */
89975 #define ALT_USB_DEV_DOEPINT2_PKTDRPSTS_MSB 11
89976 /* The width in bits of the ALT_USB_DEV_DOEPINT2_PKTDRPSTS register field. */
89977 #define ALT_USB_DEV_DOEPINT2_PKTDRPSTS_WIDTH 1
89978 /* The mask used to set the ALT_USB_DEV_DOEPINT2_PKTDRPSTS register field value. */
89979 #define ALT_USB_DEV_DOEPINT2_PKTDRPSTS_SET_MSK 0x00000800
89980 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_PKTDRPSTS register field value. */
89981 #define ALT_USB_DEV_DOEPINT2_PKTDRPSTS_CLR_MSK 0xfffff7ff
89982 /* The reset value of the ALT_USB_DEV_DOEPINT2_PKTDRPSTS register field. */
89983 #define ALT_USB_DEV_DOEPINT2_PKTDRPSTS_RESET 0x0
89984 /* Extracts the ALT_USB_DEV_DOEPINT2_PKTDRPSTS field value from a register. */
89985 #define ALT_USB_DEV_DOEPINT2_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
89986 /* Produces a ALT_USB_DEV_DOEPINT2_PKTDRPSTS register field value suitable for setting the register. */
89987 #define ALT_USB_DEV_DOEPINT2_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
89988 
89989 /*
89990  * Field : BbleErr Interrupt - bbleerr
89991  *
89992  * The core generates this interrupt when babble is received for the endpoint.
89993  *
89994  * Field Enumeration Values:
89995  *
89996  * Enum | Value | Description
89997  * :-------------------------------------|:------|:------------------
89998  * ALT_USB_DEV_DOEPINT2_BBLEERR_E_INACT | 0x0 | No interrupt
89999  * ALT_USB_DEV_DOEPINT2_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
90000  *
90001  * Field Access Macros:
90002  *
90003  */
90004 /*
90005  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_BBLEERR
90006  *
90007  * No interrupt
90008  */
90009 #define ALT_USB_DEV_DOEPINT2_BBLEERR_E_INACT 0x0
90010 /*
90011  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_BBLEERR
90012  *
90013  * BbleErr interrupt
90014  */
90015 #define ALT_USB_DEV_DOEPINT2_BBLEERR_E_ACT 0x1
90016 
90017 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_BBLEERR register field. */
90018 #define ALT_USB_DEV_DOEPINT2_BBLEERR_LSB 12
90019 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_BBLEERR register field. */
90020 #define ALT_USB_DEV_DOEPINT2_BBLEERR_MSB 12
90021 /* The width in bits of the ALT_USB_DEV_DOEPINT2_BBLEERR register field. */
90022 #define ALT_USB_DEV_DOEPINT2_BBLEERR_WIDTH 1
90023 /* The mask used to set the ALT_USB_DEV_DOEPINT2_BBLEERR register field value. */
90024 #define ALT_USB_DEV_DOEPINT2_BBLEERR_SET_MSK 0x00001000
90025 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_BBLEERR register field value. */
90026 #define ALT_USB_DEV_DOEPINT2_BBLEERR_CLR_MSK 0xffffefff
90027 /* The reset value of the ALT_USB_DEV_DOEPINT2_BBLEERR register field. */
90028 #define ALT_USB_DEV_DOEPINT2_BBLEERR_RESET 0x0
90029 /* Extracts the ALT_USB_DEV_DOEPINT2_BBLEERR field value from a register. */
90030 #define ALT_USB_DEV_DOEPINT2_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
90031 /* Produces a ALT_USB_DEV_DOEPINT2_BBLEERR register field value suitable for setting the register. */
90032 #define ALT_USB_DEV_DOEPINT2_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
90033 
90034 /*
90035  * Field : NAK Interrupt - nakintrpt
90036  *
90037  * The core generates this interrupt when a NAK is transmitted or received by the
90038  * device. In case of isochronous IN endpoints the interrupt gets generated when a
90039  * zero length packet is transmitted due to un-availability of data in the TXFifo.
90040  *
90041  * Field Enumeration Values:
90042  *
90043  * Enum | Value | Description
90044  * :---------------------------------------|:------|:--------------
90045  * ALT_USB_DEV_DOEPINT2_NAKINTRPT_E_INACT | 0x0 | No interrupt
90046  * ALT_USB_DEV_DOEPINT2_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
90047  *
90048  * Field Access Macros:
90049  *
90050  */
90051 /*
90052  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_NAKINTRPT
90053  *
90054  * No interrupt
90055  */
90056 #define ALT_USB_DEV_DOEPINT2_NAKINTRPT_E_INACT 0x0
90057 /*
90058  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_NAKINTRPT
90059  *
90060  * NAK Interrupt
90061  */
90062 #define ALT_USB_DEV_DOEPINT2_NAKINTRPT_E_ACT 0x1
90063 
90064 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_NAKINTRPT register field. */
90065 #define ALT_USB_DEV_DOEPINT2_NAKINTRPT_LSB 13
90066 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_NAKINTRPT register field. */
90067 #define ALT_USB_DEV_DOEPINT2_NAKINTRPT_MSB 13
90068 /* The width in bits of the ALT_USB_DEV_DOEPINT2_NAKINTRPT register field. */
90069 #define ALT_USB_DEV_DOEPINT2_NAKINTRPT_WIDTH 1
90070 /* The mask used to set the ALT_USB_DEV_DOEPINT2_NAKINTRPT register field value. */
90071 #define ALT_USB_DEV_DOEPINT2_NAKINTRPT_SET_MSK 0x00002000
90072 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_NAKINTRPT register field value. */
90073 #define ALT_USB_DEV_DOEPINT2_NAKINTRPT_CLR_MSK 0xffffdfff
90074 /* The reset value of the ALT_USB_DEV_DOEPINT2_NAKINTRPT register field. */
90075 #define ALT_USB_DEV_DOEPINT2_NAKINTRPT_RESET 0x0
90076 /* Extracts the ALT_USB_DEV_DOEPINT2_NAKINTRPT field value from a register. */
90077 #define ALT_USB_DEV_DOEPINT2_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
90078 /* Produces a ALT_USB_DEV_DOEPINT2_NAKINTRPT register field value suitable for setting the register. */
90079 #define ALT_USB_DEV_DOEPINT2_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
90080 
90081 /*
90082  * Field : NYET Interrupt - nyetintrpt
90083  *
90084  * The core generates this interrupt when a NYET response is transmitted for a non
90085  * isochronous OUT endpoint.
90086  *
90087  * Field Enumeration Values:
90088  *
90089  * Enum | Value | Description
90090  * :----------------------------------------|:------|:---------------
90091  * ALT_USB_DEV_DOEPINT2_NYETINTRPT_E_INACT | 0x0 | No interrupt
90092  * ALT_USB_DEV_DOEPINT2_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
90093  *
90094  * Field Access Macros:
90095  *
90096  */
90097 /*
90098  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_NYETINTRPT
90099  *
90100  * No interrupt
90101  */
90102 #define ALT_USB_DEV_DOEPINT2_NYETINTRPT_E_INACT 0x0
90103 /*
90104  * Enumerated value for register field ALT_USB_DEV_DOEPINT2_NYETINTRPT
90105  *
90106  * NYET Interrupt
90107  */
90108 #define ALT_USB_DEV_DOEPINT2_NYETINTRPT_E_ACT 0x1
90109 
90110 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT2_NYETINTRPT register field. */
90111 #define ALT_USB_DEV_DOEPINT2_NYETINTRPT_LSB 14
90112 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT2_NYETINTRPT register field. */
90113 #define ALT_USB_DEV_DOEPINT2_NYETINTRPT_MSB 14
90114 /* The width in bits of the ALT_USB_DEV_DOEPINT2_NYETINTRPT register field. */
90115 #define ALT_USB_DEV_DOEPINT2_NYETINTRPT_WIDTH 1
90116 /* The mask used to set the ALT_USB_DEV_DOEPINT2_NYETINTRPT register field value. */
90117 #define ALT_USB_DEV_DOEPINT2_NYETINTRPT_SET_MSK 0x00004000
90118 /* The mask used to clear the ALT_USB_DEV_DOEPINT2_NYETINTRPT register field value. */
90119 #define ALT_USB_DEV_DOEPINT2_NYETINTRPT_CLR_MSK 0xffffbfff
90120 /* The reset value of the ALT_USB_DEV_DOEPINT2_NYETINTRPT register field. */
90121 #define ALT_USB_DEV_DOEPINT2_NYETINTRPT_RESET 0x0
90122 /* Extracts the ALT_USB_DEV_DOEPINT2_NYETINTRPT field value from a register. */
90123 #define ALT_USB_DEV_DOEPINT2_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
90124 /* Produces a ALT_USB_DEV_DOEPINT2_NYETINTRPT register field value suitable for setting the register. */
90125 #define ALT_USB_DEV_DOEPINT2_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
90126 
90127 #ifndef __ASSEMBLY__
90128 /*
90129  * WARNING: The C register and register group struct declarations are provided for
90130  * convenience and illustrative purposes. They should, however, be used with
90131  * caution as the C language standard provides no guarantees about the alignment or
90132  * atomicity of device memory accesses. The recommended practice for writing
90133  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
90134  * alt_write_word() functions.
90135  *
90136  * The struct declaration for register ALT_USB_DEV_DOEPINT2.
90137  */
90138 struct ALT_USB_DEV_DOEPINT2_s
90139 {
90140  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
90141  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
90142  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT2_AHBERR */
90143  const uint32_t setup : 1; /* SETUP Phase Done */
90144  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
90145  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
90146  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
90147  uint32_t : 1; /* *UNDEFINED* */
90148  const uint32_t outpkterr : 1; /* OUT Packet Error */
90149  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
90150  uint32_t : 1; /* *UNDEFINED* */
90151  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
90152  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
90153  const uint32_t nakintrpt : 1; /* NAK Interrupt */
90154  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
90155  uint32_t : 17; /* *UNDEFINED* */
90156 };
90157 
90158 /* The typedef declaration for register ALT_USB_DEV_DOEPINT2. */
90159 typedef volatile struct ALT_USB_DEV_DOEPINT2_s ALT_USB_DEV_DOEPINT2_t;
90160 #endif /* __ASSEMBLY__ */
90161 
90162 /* The byte offset of the ALT_USB_DEV_DOEPINT2 register from the beginning of the component. */
90163 #define ALT_USB_DEV_DOEPINT2_OFST 0x348
90164 /* The address of the ALT_USB_DEV_DOEPINT2 register. */
90165 #define ALT_USB_DEV_DOEPINT2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT2_OFST))
90166 
90167 /*
90168  * Register : Device OUT Endpoint 2 Transfer Size Register - doeptsiz2
90169  *
90170  * The application must modify this register before enabling the endpoint. Once the
90171  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
90172  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
90173  * application can only read this register once the core has cleared the Endpoint
90174  * Enable bit.
90175  *
90176  * Register Layout
90177  *
90178  * Bits | Access | Reset | Description
90179  * :--------|:-------|:------|:-------------------
90180  * [18:0] | RW | 0x0 | Transfer Size
90181  * [28:19] | RW | 0x0 | Packet Count
90182  * [30:29] | R | 0x0 | SETUP Packet Count
90183  * [31] | ??? | 0x0 | *UNDEFINED*
90184  *
90185  */
90186 /*
90187  * Field : Transfer Size - xfersize
90188  *
90189  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
90190  * application only after it has exhausted the transfer size amount of data. The
90191  * transfer size can be Set to the maximum packet size of the endpoint, to be
90192  * interrupted at the end of each packet. The core decrements this field every time
90193  * a packet from the external memory is written to the RxFIFO.
90194  *
90195  * Field Access Macros:
90196  *
90197  */
90198 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ2_XFERSIZE register field. */
90199 #define ALT_USB_DEV_DOEPTSIZ2_XFERSIZE_LSB 0
90200 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ2_XFERSIZE register field. */
90201 #define ALT_USB_DEV_DOEPTSIZ2_XFERSIZE_MSB 18
90202 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ2_XFERSIZE register field. */
90203 #define ALT_USB_DEV_DOEPTSIZ2_XFERSIZE_WIDTH 19
90204 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ2_XFERSIZE register field value. */
90205 #define ALT_USB_DEV_DOEPTSIZ2_XFERSIZE_SET_MSK 0x0007ffff
90206 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ2_XFERSIZE register field value. */
90207 #define ALT_USB_DEV_DOEPTSIZ2_XFERSIZE_CLR_MSK 0xfff80000
90208 /* The reset value of the ALT_USB_DEV_DOEPTSIZ2_XFERSIZE register field. */
90209 #define ALT_USB_DEV_DOEPTSIZ2_XFERSIZE_RESET 0x0
90210 /* Extracts the ALT_USB_DEV_DOEPTSIZ2_XFERSIZE field value from a register. */
90211 #define ALT_USB_DEV_DOEPTSIZ2_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
90212 /* Produces a ALT_USB_DEV_DOEPTSIZ2_XFERSIZE register field value suitable for setting the register. */
90213 #define ALT_USB_DEV_DOEPTSIZ2_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
90214 
90215 /*
90216  * Field : Packet Count - pktcnt
90217  *
90218  * Indicates the total number of USB packets that constitute the Transfer Size
90219  * amount of data for endpoint 0.This field is decremented every time a packet
90220  * (maximum size or short packet) is read from the RxFIFO.
90221  *
90222  * Field Access Macros:
90223  *
90224  */
90225 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ2_PKTCNT register field. */
90226 #define ALT_USB_DEV_DOEPTSIZ2_PKTCNT_LSB 19
90227 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ2_PKTCNT register field. */
90228 #define ALT_USB_DEV_DOEPTSIZ2_PKTCNT_MSB 28
90229 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ2_PKTCNT register field. */
90230 #define ALT_USB_DEV_DOEPTSIZ2_PKTCNT_WIDTH 10
90231 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ2_PKTCNT register field value. */
90232 #define ALT_USB_DEV_DOEPTSIZ2_PKTCNT_SET_MSK 0x1ff80000
90233 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ2_PKTCNT register field value. */
90234 #define ALT_USB_DEV_DOEPTSIZ2_PKTCNT_CLR_MSK 0xe007ffff
90235 /* The reset value of the ALT_USB_DEV_DOEPTSIZ2_PKTCNT register field. */
90236 #define ALT_USB_DEV_DOEPTSIZ2_PKTCNT_RESET 0x0
90237 /* Extracts the ALT_USB_DEV_DOEPTSIZ2_PKTCNT field value from a register. */
90238 #define ALT_USB_DEV_DOEPTSIZ2_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
90239 /* Produces a ALT_USB_DEV_DOEPTSIZ2_PKTCNT register field value suitable for setting the register. */
90240 #define ALT_USB_DEV_DOEPTSIZ2_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
90241 
90242 /*
90243  * Field : SETUP Packet Count - rxdpid
90244  *
90245  * Applies to isochronous OUT endpoints only.This is the data PID received in the
90246  * last packet for this endpoint. Use datax.
90247  *
90248  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
90249  * number of back-to-back SETUP data packets the endpoint can receive.
90250  *
90251  * Field Enumeration Values:
90252  *
90253  * Enum | Value | Description
90254  * :-----------------------------------------|:------|:-------------------
90255  * ALT_USB_DEV_DOEPTSIZ2_RXDPID_E_DATA0 | 0x0 | DATA0
90256  * ALT_USB_DEV_DOEPTSIZ2_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
90257  * ALT_USB_DEV_DOEPTSIZ2_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
90258  * ALT_USB_DEV_DOEPTSIZ2_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
90259  *
90260  * Field Access Macros:
90261  *
90262  */
90263 /*
90264  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ2_RXDPID
90265  *
90266  * DATA0
90267  */
90268 #define ALT_USB_DEV_DOEPTSIZ2_RXDPID_E_DATA0 0x0
90269 /*
90270  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ2_RXDPID
90271  *
90272  * DATA2 or 1 packet
90273  */
90274 #define ALT_USB_DEV_DOEPTSIZ2_RXDPID_E_DATA2PKT1 0x1
90275 /*
90276  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ2_RXDPID
90277  *
90278  * DATA1 or 2 packets
90279  */
90280 #define ALT_USB_DEV_DOEPTSIZ2_RXDPID_E_DATA1PKT2 0x2
90281 /*
90282  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ2_RXDPID
90283  *
90284  * MDATA or 3 packets
90285  */
90286 #define ALT_USB_DEV_DOEPTSIZ2_RXDPID_E_MDATAPKT3 0x3
90287 
90288 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ2_RXDPID register field. */
90289 #define ALT_USB_DEV_DOEPTSIZ2_RXDPID_LSB 29
90290 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ2_RXDPID register field. */
90291 #define ALT_USB_DEV_DOEPTSIZ2_RXDPID_MSB 30
90292 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ2_RXDPID register field. */
90293 #define ALT_USB_DEV_DOEPTSIZ2_RXDPID_WIDTH 2
90294 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ2_RXDPID register field value. */
90295 #define ALT_USB_DEV_DOEPTSIZ2_RXDPID_SET_MSK 0x60000000
90296 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ2_RXDPID register field value. */
90297 #define ALT_USB_DEV_DOEPTSIZ2_RXDPID_CLR_MSK 0x9fffffff
90298 /* The reset value of the ALT_USB_DEV_DOEPTSIZ2_RXDPID register field. */
90299 #define ALT_USB_DEV_DOEPTSIZ2_RXDPID_RESET 0x0
90300 /* Extracts the ALT_USB_DEV_DOEPTSIZ2_RXDPID field value from a register. */
90301 #define ALT_USB_DEV_DOEPTSIZ2_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
90302 /* Produces a ALT_USB_DEV_DOEPTSIZ2_RXDPID register field value suitable for setting the register. */
90303 #define ALT_USB_DEV_DOEPTSIZ2_RXDPID_SET(value) (((value) << 29) & 0x60000000)
90304 
90305 #ifndef __ASSEMBLY__
90306 /*
90307  * WARNING: The C register and register group struct declarations are provided for
90308  * convenience and illustrative purposes. They should, however, be used with
90309  * caution as the C language standard provides no guarantees about the alignment or
90310  * atomicity of device memory accesses. The recommended practice for writing
90311  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
90312  * alt_write_word() functions.
90313  *
90314  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ2.
90315  */
90316 struct ALT_USB_DEV_DOEPTSIZ2_s
90317 {
90318  uint32_t xfersize : 19; /* Transfer Size */
90319  uint32_t pktcnt : 10; /* Packet Count */
90320  const uint32_t rxdpid : 2; /* SETUP Packet Count */
90321  uint32_t : 1; /* *UNDEFINED* */
90322 };
90323 
90324 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ2. */
90325 typedef volatile struct ALT_USB_DEV_DOEPTSIZ2_s ALT_USB_DEV_DOEPTSIZ2_t;
90326 #endif /* __ASSEMBLY__ */
90327 
90328 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ2 register from the beginning of the component. */
90329 #define ALT_USB_DEV_DOEPTSIZ2_OFST 0x350
90330 /* The address of the ALT_USB_DEV_DOEPTSIZ2 register. */
90331 #define ALT_USB_DEV_DOEPTSIZ2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ2_OFST))
90332 
90333 /*
90334  * Register : Device OUT Endpoint 2 DMA Address Register - doepdma2
90335  *
90336  * DMA Addressing.
90337  *
90338  * Register Layout
90339  *
90340  * Bits | Access | Reset | Description
90341  * :-------|:-------|:--------|:------------
90342  * [31:0] | RW | Unknown | DMA Address
90343  *
90344  */
90345 /*
90346  * Field : DMA Address - doepdma2
90347  *
90348  * Holds the start address of the external memory for storing or fetching endpoint
90349  * data. for control endpoints, this field stores control OUT data packets as well
90350  * as SETUP transaction data packets. When more than three SETUP packets are
90351  * received back-to-back, the SETUP data packet in the memory is overwritten. This
90352  * register is incremented on every AHB transaction. The application can give only
90353  * a DWORD-aligned address.
90354  *
90355  * When Scatter/Gather DMA mode is not enabled, the application programs the start
90356  * address value in this field.
90357  *
90358  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
90359  * for the descriptor list.
90360  *
90361  * Field Access Macros:
90362  *
90363  */
90364 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA2_DOEPDMA2 register field. */
90365 #define ALT_USB_DEV_DOEPDMA2_DOEPDMA2_LSB 0
90366 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA2_DOEPDMA2 register field. */
90367 #define ALT_USB_DEV_DOEPDMA2_DOEPDMA2_MSB 31
90368 /* The width in bits of the ALT_USB_DEV_DOEPDMA2_DOEPDMA2 register field. */
90369 #define ALT_USB_DEV_DOEPDMA2_DOEPDMA2_WIDTH 32
90370 /* The mask used to set the ALT_USB_DEV_DOEPDMA2_DOEPDMA2 register field value. */
90371 #define ALT_USB_DEV_DOEPDMA2_DOEPDMA2_SET_MSK 0xffffffff
90372 /* The mask used to clear the ALT_USB_DEV_DOEPDMA2_DOEPDMA2 register field value. */
90373 #define ALT_USB_DEV_DOEPDMA2_DOEPDMA2_CLR_MSK 0x00000000
90374 /* The reset value of the ALT_USB_DEV_DOEPDMA2_DOEPDMA2 register field is UNKNOWN. */
90375 #define ALT_USB_DEV_DOEPDMA2_DOEPDMA2_RESET 0x0
90376 /* Extracts the ALT_USB_DEV_DOEPDMA2_DOEPDMA2 field value from a register. */
90377 #define ALT_USB_DEV_DOEPDMA2_DOEPDMA2_GET(value) (((value) & 0xffffffff) >> 0)
90378 /* Produces a ALT_USB_DEV_DOEPDMA2_DOEPDMA2 register field value suitable for setting the register. */
90379 #define ALT_USB_DEV_DOEPDMA2_DOEPDMA2_SET(value) (((value) << 0) & 0xffffffff)
90380 
90381 #ifndef __ASSEMBLY__
90382 /*
90383  * WARNING: The C register and register group struct declarations are provided for
90384  * convenience and illustrative purposes. They should, however, be used with
90385  * caution as the C language standard provides no guarantees about the alignment or
90386  * atomicity of device memory accesses. The recommended practice for writing
90387  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
90388  * alt_write_word() functions.
90389  *
90390  * The struct declaration for register ALT_USB_DEV_DOEPDMA2.
90391  */
90392 struct ALT_USB_DEV_DOEPDMA2_s
90393 {
90394  uint32_t doepdma2 : 32; /* DMA Address */
90395 };
90396 
90397 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA2. */
90398 typedef volatile struct ALT_USB_DEV_DOEPDMA2_s ALT_USB_DEV_DOEPDMA2_t;
90399 #endif /* __ASSEMBLY__ */
90400 
90401 /* The byte offset of the ALT_USB_DEV_DOEPDMA2 register from the beginning of the component. */
90402 #define ALT_USB_DEV_DOEPDMA2_OFST 0x354
90403 /* The address of the ALT_USB_DEV_DOEPDMA2 register. */
90404 #define ALT_USB_DEV_DOEPDMA2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA2_OFST))
90405 
90406 /*
90407  * Register : Device OUT Endpoint 2 DMA Buffer Address Register - doepdmab2
90408  *
90409  * DMA Buffer Address.
90410  *
90411  * Register Layout
90412  *
90413  * Bits | Access | Reset | Description
90414  * :-------|:-------|:--------|:------------------------------------
90415  * [31:0] | R | Unknown | Device IN Endpoint 1 Buffer Address
90416  *
90417  */
90418 /*
90419  * Field : Device IN Endpoint 1 Buffer Address - doepdmab2
90420  *
90421  * Holds the current buffer address. This register is updated as and when the data
90422  * transfer for the corresponding end point is in progress. This register is
90423  * present only in Scatter/Gather DMA mode.
90424  *
90425  * Field Access Macros:
90426  *
90427  */
90428 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2 register field. */
90429 #define ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2_LSB 0
90430 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2 register field. */
90431 #define ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2_MSB 31
90432 /* The width in bits of the ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2 register field. */
90433 #define ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2_WIDTH 32
90434 /* The mask used to set the ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2 register field value. */
90435 #define ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2_SET_MSK 0xffffffff
90436 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2 register field value. */
90437 #define ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2_CLR_MSK 0x00000000
90438 /* The reset value of the ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2 register field is UNKNOWN. */
90439 #define ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2_RESET 0x0
90440 /* Extracts the ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2 field value from a register. */
90441 #define ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2_GET(value) (((value) & 0xffffffff) >> 0)
90442 /* Produces a ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2 register field value suitable for setting the register. */
90443 #define ALT_USB_DEV_DOEPDMAB2_DOEPDMAB2_SET(value) (((value) << 0) & 0xffffffff)
90444 
90445 #ifndef __ASSEMBLY__
90446 /*
90447  * WARNING: The C register and register group struct declarations are provided for
90448  * convenience and illustrative purposes. They should, however, be used with
90449  * caution as the C language standard provides no guarantees about the alignment or
90450  * atomicity of device memory accesses. The recommended practice for writing
90451  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
90452  * alt_write_word() functions.
90453  *
90454  * The struct declaration for register ALT_USB_DEV_DOEPDMAB2.
90455  */
90456 struct ALT_USB_DEV_DOEPDMAB2_s
90457 {
90458  const uint32_t doepdmab2 : 32; /* Device IN Endpoint 1 Buffer Address */
90459 };
90460 
90461 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB2. */
90462 typedef volatile struct ALT_USB_DEV_DOEPDMAB2_s ALT_USB_DEV_DOEPDMAB2_t;
90463 #endif /* __ASSEMBLY__ */
90464 
90465 /* The byte offset of the ALT_USB_DEV_DOEPDMAB2 register from the beginning of the component. */
90466 #define ALT_USB_DEV_DOEPDMAB2_OFST 0x35c
90467 /* The address of the ALT_USB_DEV_DOEPDMAB2 register. */
90468 #define ALT_USB_DEV_DOEPDMAB2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB2_OFST))
90469 
90470 /*
90471  * Register : Device Control OUT Endpoint 3 Control Register - DOEPCTL3
90472  *
90473  * Out Endpoint 3.
90474  *
90475  * Register Layout
90476  *
90477  * Bits | Access | Reset | Description
90478  * :--------|:-------|:------|:--------------------
90479  * [10:0] | RW | 0x0 | Maximum Packet Size
90480  * [14:11] | ??? | 0x0 | *UNDEFINED*
90481  * [15] | RW | 0x0 | USB Active Endpoint
90482  * [16] | R | 0x0 | Endpoint Data PID
90483  * [17] | R | 0x0 | NAK Status
90484  * [19:18] | RW | 0x0 | Endpoint Type
90485  * [20] | RW | 0x0 | Snoop Mode
90486  * [21] | R | 0x0 | STALL Handshake
90487  * [25:22] | ??? | 0x0 | *UNDEFINED*
90488  * [26] | W | 0x0 | Clear NAK
90489  * [27] | W | 0x0 | Set NAK
90490  * [28] | W | 0x0 | Set DATA0 PID
90491  * [29] | W | 0x0 | Set DATA1 PID
90492  * [30] | R | 0x0 | Endpoint Disable
90493  * [31] | R | 0x0 | Endpoint Enable
90494  *
90495  */
90496 /*
90497  * Field : Maximum Packet Size - mps
90498  *
90499  * Applies to IN and OUT endpoints. The application must program this field with
90500  * the maximum packet size for the current logical endpoint. This value is in
90501  * bytes.
90502  *
90503  * Field Access Macros:
90504  *
90505  */
90506 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_MPS register field. */
90507 #define ALT_USB_DEV_DOEPCTL3_MPS_LSB 0
90508 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_MPS register field. */
90509 #define ALT_USB_DEV_DOEPCTL3_MPS_MSB 10
90510 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_MPS register field. */
90511 #define ALT_USB_DEV_DOEPCTL3_MPS_WIDTH 11
90512 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_MPS register field value. */
90513 #define ALT_USB_DEV_DOEPCTL3_MPS_SET_MSK 0x000007ff
90514 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_MPS register field value. */
90515 #define ALT_USB_DEV_DOEPCTL3_MPS_CLR_MSK 0xfffff800
90516 /* The reset value of the ALT_USB_DEV_DOEPCTL3_MPS register field. */
90517 #define ALT_USB_DEV_DOEPCTL3_MPS_RESET 0x0
90518 /* Extracts the ALT_USB_DEV_DOEPCTL3_MPS field value from a register. */
90519 #define ALT_USB_DEV_DOEPCTL3_MPS_GET(value) (((value) & 0x000007ff) >> 0)
90520 /* Produces a ALT_USB_DEV_DOEPCTL3_MPS register field value suitable for setting the register. */
90521 #define ALT_USB_DEV_DOEPCTL3_MPS_SET(value) (((value) << 0) & 0x000007ff)
90522 
90523 /*
90524  * Field : USB Active Endpoint - usbactep
90525  *
90526  * Indicates whether this endpoint is active in the current configuration and
90527  * interface. The core clears this bit for all endpoints (other than EP 0) after
90528  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
90529  * commands, the application must program endpoint registers accordingly and set
90530  * this bit.
90531  *
90532  * Field Enumeration Values:
90533  *
90534  * Enum | Value | Description
90535  * :-------------------------------------|:------|:--------------------
90536  * ALT_USB_DEV_DOEPCTL3_USBACTEP_E_DISD | 0x0 | Not Active
90537  * ALT_USB_DEV_DOEPCTL3_USBACTEP_E_END | 0x1 | USB Active Endpoint
90538  *
90539  * Field Access Macros:
90540  *
90541  */
90542 /*
90543  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_USBACTEP
90544  *
90545  * Not Active
90546  */
90547 #define ALT_USB_DEV_DOEPCTL3_USBACTEP_E_DISD 0x0
90548 /*
90549  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_USBACTEP
90550  *
90551  * USB Active Endpoint
90552  */
90553 #define ALT_USB_DEV_DOEPCTL3_USBACTEP_E_END 0x1
90554 
90555 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_USBACTEP register field. */
90556 #define ALT_USB_DEV_DOEPCTL3_USBACTEP_LSB 15
90557 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_USBACTEP register field. */
90558 #define ALT_USB_DEV_DOEPCTL3_USBACTEP_MSB 15
90559 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_USBACTEP register field. */
90560 #define ALT_USB_DEV_DOEPCTL3_USBACTEP_WIDTH 1
90561 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_USBACTEP register field value. */
90562 #define ALT_USB_DEV_DOEPCTL3_USBACTEP_SET_MSK 0x00008000
90563 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_USBACTEP register field value. */
90564 #define ALT_USB_DEV_DOEPCTL3_USBACTEP_CLR_MSK 0xffff7fff
90565 /* The reset value of the ALT_USB_DEV_DOEPCTL3_USBACTEP register field. */
90566 #define ALT_USB_DEV_DOEPCTL3_USBACTEP_RESET 0x0
90567 /* Extracts the ALT_USB_DEV_DOEPCTL3_USBACTEP field value from a register. */
90568 #define ALT_USB_DEV_DOEPCTL3_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
90569 /* Produces a ALT_USB_DEV_DOEPCTL3_USBACTEP register field value suitable for setting the register. */
90570 #define ALT_USB_DEV_DOEPCTL3_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
90571 
90572 /*
90573  * Field : Endpoint Data PID - dpid
90574  *
90575  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
90576  * packet to be received or transmitted on this endpoint. The application must
90577  * program the PID of the first packet to be received or transmitted on this
90578  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
90579  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
90580  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
90581  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
90582  * DMA mode:
90583  *
90584  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
90585  * number in which the core transmits/receives isochronous data for this endpoint.
90586  * The application must program the even/odd (micro) frame number in which it
90587  * intends to transmit/receive isochronous data for this endpoint using the
90588  * SetEvnFr and SetOddFr fields in this register.
90589  *
90590  * 0: Even (micro)frame
90591  *
90592  * 1: Odd (micro)frame
90593  *
90594  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
90595  * number in which to send data is provided in the transmit descriptor structure.
90596  * The frame in which data is received is updated in receive descriptor structure.
90597  *
90598  * Field Enumeration Values:
90599  *
90600  * Enum | Value | Description
90601  * :----------------------------------|:------|:-----------------------------
90602  * ALT_USB_DEV_DOEPCTL3_DPID_E_INACT | 0x0 | Endpoint Data PID not active
90603  * ALT_USB_DEV_DOEPCTL3_DPID_E_ACT | 0x1 | Endpoint Data PID active
90604  *
90605  * Field Access Macros:
90606  *
90607  */
90608 /*
90609  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_DPID
90610  *
90611  * Endpoint Data PID not active
90612  */
90613 #define ALT_USB_DEV_DOEPCTL3_DPID_E_INACT 0x0
90614 /*
90615  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_DPID
90616  *
90617  * Endpoint Data PID active
90618  */
90619 #define ALT_USB_DEV_DOEPCTL3_DPID_E_ACT 0x1
90620 
90621 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_DPID register field. */
90622 #define ALT_USB_DEV_DOEPCTL3_DPID_LSB 16
90623 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_DPID register field. */
90624 #define ALT_USB_DEV_DOEPCTL3_DPID_MSB 16
90625 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_DPID register field. */
90626 #define ALT_USB_DEV_DOEPCTL3_DPID_WIDTH 1
90627 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_DPID register field value. */
90628 #define ALT_USB_DEV_DOEPCTL3_DPID_SET_MSK 0x00010000
90629 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_DPID register field value. */
90630 #define ALT_USB_DEV_DOEPCTL3_DPID_CLR_MSK 0xfffeffff
90631 /* The reset value of the ALT_USB_DEV_DOEPCTL3_DPID register field. */
90632 #define ALT_USB_DEV_DOEPCTL3_DPID_RESET 0x0
90633 /* Extracts the ALT_USB_DEV_DOEPCTL3_DPID field value from a register. */
90634 #define ALT_USB_DEV_DOEPCTL3_DPID_GET(value) (((value) & 0x00010000) >> 16)
90635 /* Produces a ALT_USB_DEV_DOEPCTL3_DPID register field value suitable for setting the register. */
90636 #define ALT_USB_DEV_DOEPCTL3_DPID_SET(value) (((value) << 16) & 0x00010000)
90637 
90638 /*
90639  * Field : NAK Status - naksts
90640  *
90641  * When either the application or the core sets this bit:
90642  *
90643  * * The core stops receiving any data on an OUT endpoint, even if there is space
90644  * in the RxFIFO to accommodate the incoming packet.
90645  *
90646  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
90647  * IN endpoint, even if there data is available in the TxFIFO.
90648  *
90649  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
90650  * even if there data is available in the TxFIFO.
90651  *
90652  * Irrespective of this bit's setting, the core always responds to SETUP data
90653  * packets with an ACK handshake.
90654  *
90655  * Field Enumeration Values:
90656  *
90657  * Enum | Value | Description
90658  * :-------------------------------------|:------|:------------------------------------------------
90659  * ALT_USB_DEV_DOEPCTL3_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
90660  * : | | based on the FIFO status
90661  * ALT_USB_DEV_DOEPCTL3_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
90662  * : | | endpoint
90663  *
90664  * Field Access Macros:
90665  *
90666  */
90667 /*
90668  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_NAKSTS
90669  *
90670  * The core is transmitting non-NAK handshakes based on the FIFO status
90671  */
90672 #define ALT_USB_DEV_DOEPCTL3_NAKSTS_E_NONNAK 0x0
90673 /*
90674  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_NAKSTS
90675  *
90676  * The core is transmitting NAK handshakes on this endpoint
90677  */
90678 #define ALT_USB_DEV_DOEPCTL3_NAKSTS_E_NAK 0x1
90679 
90680 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_NAKSTS register field. */
90681 #define ALT_USB_DEV_DOEPCTL3_NAKSTS_LSB 17
90682 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_NAKSTS register field. */
90683 #define ALT_USB_DEV_DOEPCTL3_NAKSTS_MSB 17
90684 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_NAKSTS register field. */
90685 #define ALT_USB_DEV_DOEPCTL3_NAKSTS_WIDTH 1
90686 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_NAKSTS register field value. */
90687 #define ALT_USB_DEV_DOEPCTL3_NAKSTS_SET_MSK 0x00020000
90688 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_NAKSTS register field value. */
90689 #define ALT_USB_DEV_DOEPCTL3_NAKSTS_CLR_MSK 0xfffdffff
90690 /* The reset value of the ALT_USB_DEV_DOEPCTL3_NAKSTS register field. */
90691 #define ALT_USB_DEV_DOEPCTL3_NAKSTS_RESET 0x0
90692 /* Extracts the ALT_USB_DEV_DOEPCTL3_NAKSTS field value from a register. */
90693 #define ALT_USB_DEV_DOEPCTL3_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
90694 /* Produces a ALT_USB_DEV_DOEPCTL3_NAKSTS register field value suitable for setting the register. */
90695 #define ALT_USB_DEV_DOEPCTL3_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
90696 
90697 /*
90698  * Field : Endpoint Type - eptype
90699  *
90700  * This is the transfer type supported by this logical endpoint.
90701  *
90702  * Field Enumeration Values:
90703  *
90704  * Enum | Value | Description
90705  * :------------------------------------------|:------|:------------
90706  * ALT_USB_DEV_DOEPCTL3_EPTYPE_E_CTL | 0x0 | Control
90707  * ALT_USB_DEV_DOEPCTL3_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
90708  * ALT_USB_DEV_DOEPCTL3_EPTYPE_E_BULK | 0x2 | Bulk
90709  * ALT_USB_DEV_DOEPCTL3_EPTYPE_E_INTERRUP | 0x3 | Interrupt
90710  *
90711  * Field Access Macros:
90712  *
90713  */
90714 /*
90715  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_EPTYPE
90716  *
90717  * Control
90718  */
90719 #define ALT_USB_DEV_DOEPCTL3_EPTYPE_E_CTL 0x0
90720 /*
90721  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_EPTYPE
90722  *
90723  * Isochronous
90724  */
90725 #define ALT_USB_DEV_DOEPCTL3_EPTYPE_E_ISOCHRONOUS 0x1
90726 /*
90727  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_EPTYPE
90728  *
90729  * Bulk
90730  */
90731 #define ALT_USB_DEV_DOEPCTL3_EPTYPE_E_BULK 0x2
90732 /*
90733  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_EPTYPE
90734  *
90735  * Interrupt
90736  */
90737 #define ALT_USB_DEV_DOEPCTL3_EPTYPE_E_INTERRUP 0x3
90738 
90739 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_EPTYPE register field. */
90740 #define ALT_USB_DEV_DOEPCTL3_EPTYPE_LSB 18
90741 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_EPTYPE register field. */
90742 #define ALT_USB_DEV_DOEPCTL3_EPTYPE_MSB 19
90743 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_EPTYPE register field. */
90744 #define ALT_USB_DEV_DOEPCTL3_EPTYPE_WIDTH 2
90745 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_EPTYPE register field value. */
90746 #define ALT_USB_DEV_DOEPCTL3_EPTYPE_SET_MSK 0x000c0000
90747 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_EPTYPE register field value. */
90748 #define ALT_USB_DEV_DOEPCTL3_EPTYPE_CLR_MSK 0xfff3ffff
90749 /* The reset value of the ALT_USB_DEV_DOEPCTL3_EPTYPE register field. */
90750 #define ALT_USB_DEV_DOEPCTL3_EPTYPE_RESET 0x0
90751 /* Extracts the ALT_USB_DEV_DOEPCTL3_EPTYPE field value from a register. */
90752 #define ALT_USB_DEV_DOEPCTL3_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
90753 /* Produces a ALT_USB_DEV_DOEPCTL3_EPTYPE register field value suitable for setting the register. */
90754 #define ALT_USB_DEV_DOEPCTL3_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
90755 
90756 /*
90757  * Field : Snoop Mode - snp
90758  *
90759  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
90760  * In Snoop mode, the core does not check the correctness of OUT packets before
90761  * transferring them to application memory.
90762  *
90763  * Field Enumeration Values:
90764  *
90765  * Enum | Value | Description
90766  * :-------------------------------|:------|:-------------------
90767  * ALT_USB_DEV_DOEPCTL3_SNP_E_DIS | 0x0 | Disable Snoop Mode
90768  * ALT_USB_DEV_DOEPCTL3_SNP_E_EN | 0x1 | Enable Snoop Mode
90769  *
90770  * Field Access Macros:
90771  *
90772  */
90773 /*
90774  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_SNP
90775  *
90776  * Disable Snoop Mode
90777  */
90778 #define ALT_USB_DEV_DOEPCTL3_SNP_E_DIS 0x0
90779 /*
90780  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_SNP
90781  *
90782  * Enable Snoop Mode
90783  */
90784 #define ALT_USB_DEV_DOEPCTL3_SNP_E_EN 0x1
90785 
90786 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_SNP register field. */
90787 #define ALT_USB_DEV_DOEPCTL3_SNP_LSB 20
90788 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_SNP register field. */
90789 #define ALT_USB_DEV_DOEPCTL3_SNP_MSB 20
90790 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_SNP register field. */
90791 #define ALT_USB_DEV_DOEPCTL3_SNP_WIDTH 1
90792 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_SNP register field value. */
90793 #define ALT_USB_DEV_DOEPCTL3_SNP_SET_MSK 0x00100000
90794 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_SNP register field value. */
90795 #define ALT_USB_DEV_DOEPCTL3_SNP_CLR_MSK 0xffefffff
90796 /* The reset value of the ALT_USB_DEV_DOEPCTL3_SNP register field. */
90797 #define ALT_USB_DEV_DOEPCTL3_SNP_RESET 0x0
90798 /* Extracts the ALT_USB_DEV_DOEPCTL3_SNP field value from a register. */
90799 #define ALT_USB_DEV_DOEPCTL3_SNP_GET(value) (((value) & 0x00100000) >> 20)
90800 /* Produces a ALT_USB_DEV_DOEPCTL3_SNP register field value suitable for setting the register. */
90801 #define ALT_USB_DEV_DOEPCTL3_SNP_SET(value) (((value) << 20) & 0x00100000)
90802 
90803 /*
90804  * Field : STALL Handshake - stall
90805  *
90806  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
90807  * application sets this bit to stall all tokens from the USB host to this
90808  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
90809  * along with this bit, the STALL bit takes priority. Only the application can
90810  * clear this bit, never the core. Applies to control endpoints only. The
90811  * application can only set this bit, and the core clears it, when a SETUP token is
90812  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
90813  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
90814  * of this bit's setting, the core always responds to SETUP data packets with an
90815  * ACK handshake.
90816  *
90817  * Field Enumeration Values:
90818  *
90819  * Enum | Value | Description
90820  * :-----------------------------------|:------|:----------------------------
90821  * ALT_USB_DEV_DOEPCTL3_STALL_E_INACT | 0x0 | STALL All Tokens not active
90822  * ALT_USB_DEV_DOEPCTL3_STALL_E_ACT | 0x1 | STALL All Tokens active
90823  *
90824  * Field Access Macros:
90825  *
90826  */
90827 /*
90828  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_STALL
90829  *
90830  * STALL All Tokens not active
90831  */
90832 #define ALT_USB_DEV_DOEPCTL3_STALL_E_INACT 0x0
90833 /*
90834  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_STALL
90835  *
90836  * STALL All Tokens active
90837  */
90838 #define ALT_USB_DEV_DOEPCTL3_STALL_E_ACT 0x1
90839 
90840 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_STALL register field. */
90841 #define ALT_USB_DEV_DOEPCTL3_STALL_LSB 21
90842 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_STALL register field. */
90843 #define ALT_USB_DEV_DOEPCTL3_STALL_MSB 21
90844 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_STALL register field. */
90845 #define ALT_USB_DEV_DOEPCTL3_STALL_WIDTH 1
90846 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_STALL register field value. */
90847 #define ALT_USB_DEV_DOEPCTL3_STALL_SET_MSK 0x00200000
90848 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_STALL register field value. */
90849 #define ALT_USB_DEV_DOEPCTL3_STALL_CLR_MSK 0xffdfffff
90850 /* The reset value of the ALT_USB_DEV_DOEPCTL3_STALL register field. */
90851 #define ALT_USB_DEV_DOEPCTL3_STALL_RESET 0x0
90852 /* Extracts the ALT_USB_DEV_DOEPCTL3_STALL field value from a register. */
90853 #define ALT_USB_DEV_DOEPCTL3_STALL_GET(value) (((value) & 0x00200000) >> 21)
90854 /* Produces a ALT_USB_DEV_DOEPCTL3_STALL register field value suitable for setting the register. */
90855 #define ALT_USB_DEV_DOEPCTL3_STALL_SET(value) (((value) << 21) & 0x00200000)
90856 
90857 /*
90858  * Field : Clear NAK - cnak
90859  *
90860  * A write to this bit clears the NAK bit for the endpoint.
90861  *
90862  * Field Enumeration Values:
90863  *
90864  * Enum | Value | Description
90865  * :----------------------------------|:------|:-------------
90866  * ALT_USB_DEV_DOEPCTL3_CNAK_E_INACT | 0x0 | No Clear NAK
90867  * ALT_USB_DEV_DOEPCTL3_CNAK_E_ACT | 0x1 | Clear NAK
90868  *
90869  * Field Access Macros:
90870  *
90871  */
90872 /*
90873  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_CNAK
90874  *
90875  * No Clear NAK
90876  */
90877 #define ALT_USB_DEV_DOEPCTL3_CNAK_E_INACT 0x0
90878 /*
90879  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_CNAK
90880  *
90881  * Clear NAK
90882  */
90883 #define ALT_USB_DEV_DOEPCTL3_CNAK_E_ACT 0x1
90884 
90885 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_CNAK register field. */
90886 #define ALT_USB_DEV_DOEPCTL3_CNAK_LSB 26
90887 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_CNAK register field. */
90888 #define ALT_USB_DEV_DOEPCTL3_CNAK_MSB 26
90889 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_CNAK register field. */
90890 #define ALT_USB_DEV_DOEPCTL3_CNAK_WIDTH 1
90891 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_CNAK register field value. */
90892 #define ALT_USB_DEV_DOEPCTL3_CNAK_SET_MSK 0x04000000
90893 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_CNAK register field value. */
90894 #define ALT_USB_DEV_DOEPCTL3_CNAK_CLR_MSK 0xfbffffff
90895 /* The reset value of the ALT_USB_DEV_DOEPCTL3_CNAK register field. */
90896 #define ALT_USB_DEV_DOEPCTL3_CNAK_RESET 0x0
90897 /* Extracts the ALT_USB_DEV_DOEPCTL3_CNAK field value from a register. */
90898 #define ALT_USB_DEV_DOEPCTL3_CNAK_GET(value) (((value) & 0x04000000) >> 26)
90899 /* Produces a ALT_USB_DEV_DOEPCTL3_CNAK register field value suitable for setting the register. */
90900 #define ALT_USB_DEV_DOEPCTL3_CNAK_SET(value) (((value) << 26) & 0x04000000)
90901 
90902 /*
90903  * Field : Set NAK - snak
90904  *
90905  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
90906  * application can control the transmission of NAK handshakes on an endpoint. The
90907  * core can also Set this bit for an endpoint after a SETUP packet is received on
90908  * that endpoint.
90909  *
90910  * Field Enumeration Values:
90911  *
90912  * Enum | Value | Description
90913  * :----------------------------------|:------|:------------
90914  * ALT_USB_DEV_DOEPCTL3_SNAK_E_INACT | 0x0 | No Set NAK
90915  * ALT_USB_DEV_DOEPCTL3_SNAK_E_ACT | 0x1 | Set NAK
90916  *
90917  * Field Access Macros:
90918  *
90919  */
90920 /*
90921  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_SNAK
90922  *
90923  * No Set NAK
90924  */
90925 #define ALT_USB_DEV_DOEPCTL3_SNAK_E_INACT 0x0
90926 /*
90927  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_SNAK
90928  *
90929  * Set NAK
90930  */
90931 #define ALT_USB_DEV_DOEPCTL3_SNAK_E_ACT 0x1
90932 
90933 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_SNAK register field. */
90934 #define ALT_USB_DEV_DOEPCTL3_SNAK_LSB 27
90935 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_SNAK register field. */
90936 #define ALT_USB_DEV_DOEPCTL3_SNAK_MSB 27
90937 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_SNAK register field. */
90938 #define ALT_USB_DEV_DOEPCTL3_SNAK_WIDTH 1
90939 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_SNAK register field value. */
90940 #define ALT_USB_DEV_DOEPCTL3_SNAK_SET_MSK 0x08000000
90941 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_SNAK register field value. */
90942 #define ALT_USB_DEV_DOEPCTL3_SNAK_CLR_MSK 0xf7ffffff
90943 /* The reset value of the ALT_USB_DEV_DOEPCTL3_SNAK register field. */
90944 #define ALT_USB_DEV_DOEPCTL3_SNAK_RESET 0x0
90945 /* Extracts the ALT_USB_DEV_DOEPCTL3_SNAK field value from a register. */
90946 #define ALT_USB_DEV_DOEPCTL3_SNAK_GET(value) (((value) & 0x08000000) >> 27)
90947 /* Produces a ALT_USB_DEV_DOEPCTL3_SNAK register field value suitable for setting the register. */
90948 #define ALT_USB_DEV_DOEPCTL3_SNAK_SET(value) (((value) << 27) & 0x08000000)
90949 
90950 /*
90951  * Field : Set DATA0 PID - setd0pid
90952  *
90953  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
90954  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
90955  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
90956  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
90957  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
90958  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
90959  * mode is enabled, this field is reserved. The frame number in which to send data
90960  * is in the transmit descriptor structure. The frame in which to receive data is
90961  * updated in receive descriptor structure.
90962  *
90963  * Field Enumeration Values:
90964  *
90965  * Enum | Value | Description
90966  * :-------------------------------------|:------|:------------------------------------
90967  * ALT_USB_DEV_DOEPCTL3_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
90968  * ALT_USB_DEV_DOEPCTL3_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
90969  *
90970  * Field Access Macros:
90971  *
90972  */
90973 /*
90974  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_SETD0PID
90975  *
90976  * Disables Set DATA0 PID
90977  */
90978 #define ALT_USB_DEV_DOEPCTL3_SETD0PID_E_DISD 0x0
90979 /*
90980  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_SETD0PID
90981  *
90982  * Enables Endpoint Data PID to DATA0)
90983  */
90984 #define ALT_USB_DEV_DOEPCTL3_SETD0PID_E_END 0x1
90985 
90986 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_SETD0PID register field. */
90987 #define ALT_USB_DEV_DOEPCTL3_SETD0PID_LSB 28
90988 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_SETD0PID register field. */
90989 #define ALT_USB_DEV_DOEPCTL3_SETD0PID_MSB 28
90990 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_SETD0PID register field. */
90991 #define ALT_USB_DEV_DOEPCTL3_SETD0PID_WIDTH 1
90992 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_SETD0PID register field value. */
90993 #define ALT_USB_DEV_DOEPCTL3_SETD0PID_SET_MSK 0x10000000
90994 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_SETD0PID register field value. */
90995 #define ALT_USB_DEV_DOEPCTL3_SETD0PID_CLR_MSK 0xefffffff
90996 /* The reset value of the ALT_USB_DEV_DOEPCTL3_SETD0PID register field. */
90997 #define ALT_USB_DEV_DOEPCTL3_SETD0PID_RESET 0x0
90998 /* Extracts the ALT_USB_DEV_DOEPCTL3_SETD0PID field value from a register. */
90999 #define ALT_USB_DEV_DOEPCTL3_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
91000 /* Produces a ALT_USB_DEV_DOEPCTL3_SETD0PID register field value suitable for setting the register. */
91001 #define ALT_USB_DEV_DOEPCTL3_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
91002 
91003 /*
91004  * Field : Set DATA1 PID - setd1pid
91005  *
91006  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
91007  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
91008  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
91009  *
91010  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
91011  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
91012  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
91013  *
91014  * Field Enumeration Values:
91015  *
91016  * Enum | Value | Description
91017  * :-------------------------------------|:------|:-----------------------
91018  * ALT_USB_DEV_DOEPCTL3_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
91019  * ALT_USB_DEV_DOEPCTL3_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
91020  *
91021  * Field Access Macros:
91022  *
91023  */
91024 /*
91025  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_SETD1PID
91026  *
91027  * Disables Set DATA1 PID
91028  */
91029 #define ALT_USB_DEV_DOEPCTL3_SETD1PID_E_DISD 0x0
91030 /*
91031  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_SETD1PID
91032  *
91033  * Enables Set DATA1 PID
91034  */
91035 #define ALT_USB_DEV_DOEPCTL3_SETD1PID_E_END 0x1
91036 
91037 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_SETD1PID register field. */
91038 #define ALT_USB_DEV_DOEPCTL3_SETD1PID_LSB 29
91039 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_SETD1PID register field. */
91040 #define ALT_USB_DEV_DOEPCTL3_SETD1PID_MSB 29
91041 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_SETD1PID register field. */
91042 #define ALT_USB_DEV_DOEPCTL3_SETD1PID_WIDTH 1
91043 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_SETD1PID register field value. */
91044 #define ALT_USB_DEV_DOEPCTL3_SETD1PID_SET_MSK 0x20000000
91045 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_SETD1PID register field value. */
91046 #define ALT_USB_DEV_DOEPCTL3_SETD1PID_CLR_MSK 0xdfffffff
91047 /* The reset value of the ALT_USB_DEV_DOEPCTL3_SETD1PID register field. */
91048 #define ALT_USB_DEV_DOEPCTL3_SETD1PID_RESET 0x0
91049 /* Extracts the ALT_USB_DEV_DOEPCTL3_SETD1PID field value from a register. */
91050 #define ALT_USB_DEV_DOEPCTL3_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
91051 /* Produces a ALT_USB_DEV_DOEPCTL3_SETD1PID register field value suitable for setting the register. */
91052 #define ALT_USB_DEV_DOEPCTL3_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
91053 
91054 /*
91055  * Field : Endpoint Disable - epdis
91056  *
91057  * Applies to IN and OUT endpoints. The application sets this bit to stop
91058  * transmitting/receiving data on an endpoint, even before the transfer for that
91059  * endpoint is complete. The application must wait for the Endpoint Disabled
91060  * interrupt before treating the endpoint as disabled. The core clears this bit
91061  * before setting the Endpoint Disabled interrupt. The application must set this
91062  * bit only if Endpoint Enable is already set for this endpoint.
91063  *
91064  * Field Enumeration Values:
91065  *
91066  * Enum | Value | Description
91067  * :-----------------------------------|:------|:--------------------
91068  * ALT_USB_DEV_DOEPCTL3_EPDIS_E_INACT | 0x0 | No Endpoint Disable
91069  * ALT_USB_DEV_DOEPCTL3_EPDIS_E_ACT | 0x1 | Endpoint Disable
91070  *
91071  * Field Access Macros:
91072  *
91073  */
91074 /*
91075  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_EPDIS
91076  *
91077  * No Endpoint Disable
91078  */
91079 #define ALT_USB_DEV_DOEPCTL3_EPDIS_E_INACT 0x0
91080 /*
91081  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_EPDIS
91082  *
91083  * Endpoint Disable
91084  */
91085 #define ALT_USB_DEV_DOEPCTL3_EPDIS_E_ACT 0x1
91086 
91087 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_EPDIS register field. */
91088 #define ALT_USB_DEV_DOEPCTL3_EPDIS_LSB 30
91089 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_EPDIS register field. */
91090 #define ALT_USB_DEV_DOEPCTL3_EPDIS_MSB 30
91091 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_EPDIS register field. */
91092 #define ALT_USB_DEV_DOEPCTL3_EPDIS_WIDTH 1
91093 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_EPDIS register field value. */
91094 #define ALT_USB_DEV_DOEPCTL3_EPDIS_SET_MSK 0x40000000
91095 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_EPDIS register field value. */
91096 #define ALT_USB_DEV_DOEPCTL3_EPDIS_CLR_MSK 0xbfffffff
91097 /* The reset value of the ALT_USB_DEV_DOEPCTL3_EPDIS register field. */
91098 #define ALT_USB_DEV_DOEPCTL3_EPDIS_RESET 0x0
91099 /* Extracts the ALT_USB_DEV_DOEPCTL3_EPDIS field value from a register. */
91100 #define ALT_USB_DEV_DOEPCTL3_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
91101 /* Produces a ALT_USB_DEV_DOEPCTL3_EPDIS register field value suitable for setting the register. */
91102 #define ALT_USB_DEV_DOEPCTL3_EPDIS_SET(value) (((value) << 30) & 0x40000000)
91103 
91104 /*
91105  * Field : Endpoint Enable - epena
91106  *
91107  * Applies to IN and OUT endpoints.
91108  *
91109  * * When Scatter/Gather DMA mode is enabled,
91110  *
91111  * * for IN endpoints this bit indicates that the descriptor structure and data
91112  * buffer with data ready to transmit is setup.
91113  *
91114  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
91115  * receive data is setup.
91116  *
91117  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
91118  * mode:
91119  *
91120  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
91121  * the endpoint.
91122  *
91123  * * for OUT endpoints, this bit indicates that the application has allocated the
91124  * memory to start receiving data from the USB.
91125  *
91126  * * The core clears this bit before setting any of the following interrupts on
91127  * this endpoint:
91128  *
91129  * * SETUP Phase Done
91130  *
91131  * * Endpoint Disabled
91132  *
91133  * * Transfer Completed
91134  *
91135  * for control endpoints in DMA mode, this bit must be set to be able to transfer
91136  * SETUP data packets in memory.
91137  *
91138  * Field Enumeration Values:
91139  *
91140  * Enum | Value | Description
91141  * :-----------------------------------|:------|:-------------------------
91142  * ALT_USB_DEV_DOEPCTL3_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
91143  * ALT_USB_DEV_DOEPCTL3_EPENA_E_ACT | 0x1 | Endpoint Enable active
91144  *
91145  * Field Access Macros:
91146  *
91147  */
91148 /*
91149  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_EPENA
91150  *
91151  * Endpoint Enable inactive
91152  */
91153 #define ALT_USB_DEV_DOEPCTL3_EPENA_E_INACT 0x0
91154 /*
91155  * Enumerated value for register field ALT_USB_DEV_DOEPCTL3_EPENA
91156  *
91157  * Endpoint Enable active
91158  */
91159 #define ALT_USB_DEV_DOEPCTL3_EPENA_E_ACT 0x1
91160 
91161 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL3_EPENA register field. */
91162 #define ALT_USB_DEV_DOEPCTL3_EPENA_LSB 31
91163 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL3_EPENA register field. */
91164 #define ALT_USB_DEV_DOEPCTL3_EPENA_MSB 31
91165 /* The width in bits of the ALT_USB_DEV_DOEPCTL3_EPENA register field. */
91166 #define ALT_USB_DEV_DOEPCTL3_EPENA_WIDTH 1
91167 /* The mask used to set the ALT_USB_DEV_DOEPCTL3_EPENA register field value. */
91168 #define ALT_USB_DEV_DOEPCTL3_EPENA_SET_MSK 0x80000000
91169 /* The mask used to clear the ALT_USB_DEV_DOEPCTL3_EPENA register field value. */
91170 #define ALT_USB_DEV_DOEPCTL3_EPENA_CLR_MSK 0x7fffffff
91171 /* The reset value of the ALT_USB_DEV_DOEPCTL3_EPENA register field. */
91172 #define ALT_USB_DEV_DOEPCTL3_EPENA_RESET 0x0
91173 /* Extracts the ALT_USB_DEV_DOEPCTL3_EPENA field value from a register. */
91174 #define ALT_USB_DEV_DOEPCTL3_EPENA_GET(value) (((value) & 0x80000000) >> 31)
91175 /* Produces a ALT_USB_DEV_DOEPCTL3_EPENA register field value suitable for setting the register. */
91176 #define ALT_USB_DEV_DOEPCTL3_EPENA_SET(value) (((value) << 31) & 0x80000000)
91177 
91178 #ifndef __ASSEMBLY__
91179 /*
91180  * WARNING: The C register and register group struct declarations are provided for
91181  * convenience and illustrative purposes. They should, however, be used with
91182  * caution as the C language standard provides no guarantees about the alignment or
91183  * atomicity of device memory accesses. The recommended practice for writing
91184  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
91185  * alt_write_word() functions.
91186  *
91187  * The struct declaration for register ALT_USB_DEV_DOEPCTL3.
91188  */
91189 struct ALT_USB_DEV_DOEPCTL3_s
91190 {
91191  uint32_t mps : 11; /* Maximum Packet Size */
91192  uint32_t : 4; /* *UNDEFINED* */
91193  uint32_t usbactep : 1; /* USB Active Endpoint */
91194  const uint32_t dpid : 1; /* Endpoint Data PID */
91195  const uint32_t naksts : 1; /* NAK Status */
91196  uint32_t eptype : 2; /* Endpoint Type */
91197  uint32_t snp : 1; /* Snoop Mode */
91198  const uint32_t stall : 1; /* STALL Handshake */
91199  uint32_t : 4; /* *UNDEFINED* */
91200  uint32_t cnak : 1; /* Clear NAK */
91201  uint32_t snak : 1; /* Set NAK */
91202  uint32_t setd0pid : 1; /* Set DATA0 PID */
91203  uint32_t setd1pid : 1; /* Set DATA1 PID */
91204  const uint32_t epdis : 1; /* Endpoint Disable */
91205  const uint32_t epena : 1; /* Endpoint Enable */
91206 };
91207 
91208 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL3. */
91209 typedef volatile struct ALT_USB_DEV_DOEPCTL3_s ALT_USB_DEV_DOEPCTL3_t;
91210 #endif /* __ASSEMBLY__ */
91211 
91212 /* The byte offset of the ALT_USB_DEV_DOEPCTL3 register from the beginning of the component. */
91213 #define ALT_USB_DEV_DOEPCTL3_OFST 0x360
91214 /* The address of the ALT_USB_DEV_DOEPCTL3 register. */
91215 #define ALT_USB_DEV_DOEPCTL3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL3_OFST))
91216 
91217 /*
91218  * Register : Device OUT Endpoint 3 Interrupt Register - doepint3
91219  *
91220  * This register indicates the status of an endpoint with respect to USB- and AHB-
91221  * related events. The application must read this register when the OUT Endpoints
91222  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
91223  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
91224  * can read this register, it must first read the Device All Endpoints Interrupt
91225  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
91226  * Interrupt register. The application must clear the appropriate bit in this
91227  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
91228  *
91229  * Register Layout
91230  *
91231  * Bits | Access | Reset | Description
91232  * :--------|:-------|:------|:------------------------------------------
91233  * [0] | R | 0x0 | Transfer Completed Interrupt
91234  * [1] | R | 0x0 | Endpoint Disabled Interrupt
91235  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT3_AHBERR
91236  * [3] | R | 0x0 | SETUP Phase Done
91237  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
91238  * [5] | R | 0x0 | Status Phase Received for Control Write
91239  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
91240  * [7] | ??? | 0x0 | *UNDEFINED*
91241  * [8] | R | 0x0 | OUT Packet Error
91242  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
91243  * [10] | ??? | 0x0 | *UNDEFINED*
91244  * [11] | R | 0x0 | Packet Drop Status
91245  * [12] | R | 0x0 | BbleErr Interrupt
91246  * [13] | R | 0x0 | NAK Interrupt
91247  * [14] | R | 0x0 | NYET Interrupt
91248  * [31:15] | ??? | 0x0 | *UNDEFINED*
91249  *
91250  */
91251 /*
91252  * Field : Transfer Completed Interrupt - xfercompl
91253  *
91254  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
91255  *
91256  * This field indicates that the requested data from the internal FIFO is moved to
91257  * external system memory. This interrupt is generated only when the corresponding
91258  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
91259  * is Set.
91260  *
91261  * When Scatter/Gather DMA mode is disabled, this field indicates that the
91262  * programmed transfer is complete on the AHB as well as on the USB, for this
91263  * endpoint.
91264  *
91265  * Field Enumeration Values:
91266  *
91267  * Enum | Value | Description
91268  * :---------------------------------------|:------|:-----------------------------
91269  * ALT_USB_DEV_DOEPINT3_XFERCOMPL_E_INACT | 0x0 | No Interrupt
91270  * ALT_USB_DEV_DOEPINT3_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
91271  *
91272  * Field Access Macros:
91273  *
91274  */
91275 /*
91276  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_XFERCOMPL
91277  *
91278  * No Interrupt
91279  */
91280 #define ALT_USB_DEV_DOEPINT3_XFERCOMPL_E_INACT 0x0
91281 /*
91282  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_XFERCOMPL
91283  *
91284  * Transfer Completed Interrupt
91285  */
91286 #define ALT_USB_DEV_DOEPINT3_XFERCOMPL_E_ACT 0x1
91287 
91288 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_XFERCOMPL register field. */
91289 #define ALT_USB_DEV_DOEPINT3_XFERCOMPL_LSB 0
91290 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_XFERCOMPL register field. */
91291 #define ALT_USB_DEV_DOEPINT3_XFERCOMPL_MSB 0
91292 /* The width in bits of the ALT_USB_DEV_DOEPINT3_XFERCOMPL register field. */
91293 #define ALT_USB_DEV_DOEPINT3_XFERCOMPL_WIDTH 1
91294 /* The mask used to set the ALT_USB_DEV_DOEPINT3_XFERCOMPL register field value. */
91295 #define ALT_USB_DEV_DOEPINT3_XFERCOMPL_SET_MSK 0x00000001
91296 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_XFERCOMPL register field value. */
91297 #define ALT_USB_DEV_DOEPINT3_XFERCOMPL_CLR_MSK 0xfffffffe
91298 /* The reset value of the ALT_USB_DEV_DOEPINT3_XFERCOMPL register field. */
91299 #define ALT_USB_DEV_DOEPINT3_XFERCOMPL_RESET 0x0
91300 /* Extracts the ALT_USB_DEV_DOEPINT3_XFERCOMPL field value from a register. */
91301 #define ALT_USB_DEV_DOEPINT3_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
91302 /* Produces a ALT_USB_DEV_DOEPINT3_XFERCOMPL register field value suitable for setting the register. */
91303 #define ALT_USB_DEV_DOEPINT3_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
91304 
91305 /*
91306  * Field : Endpoint Disabled Interrupt - epdisbld
91307  *
91308  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
91309  * disabled per the application's request.
91310  *
91311  * Field Enumeration Values:
91312  *
91313  * Enum | Value | Description
91314  * :--------------------------------------|:------|:----------------------------
91315  * ALT_USB_DEV_DOEPINT3_EPDISBLD_E_INACT | 0x0 | No Interrupt
91316  * ALT_USB_DEV_DOEPINT3_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
91317  *
91318  * Field Access Macros:
91319  *
91320  */
91321 /*
91322  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_EPDISBLD
91323  *
91324  * No Interrupt
91325  */
91326 #define ALT_USB_DEV_DOEPINT3_EPDISBLD_E_INACT 0x0
91327 /*
91328  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_EPDISBLD
91329  *
91330  * Endpoint Disabled Interrupt
91331  */
91332 #define ALT_USB_DEV_DOEPINT3_EPDISBLD_E_ACT 0x1
91333 
91334 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_EPDISBLD register field. */
91335 #define ALT_USB_DEV_DOEPINT3_EPDISBLD_LSB 1
91336 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_EPDISBLD register field. */
91337 #define ALT_USB_DEV_DOEPINT3_EPDISBLD_MSB 1
91338 /* The width in bits of the ALT_USB_DEV_DOEPINT3_EPDISBLD register field. */
91339 #define ALT_USB_DEV_DOEPINT3_EPDISBLD_WIDTH 1
91340 /* The mask used to set the ALT_USB_DEV_DOEPINT3_EPDISBLD register field value. */
91341 #define ALT_USB_DEV_DOEPINT3_EPDISBLD_SET_MSK 0x00000002
91342 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_EPDISBLD register field value. */
91343 #define ALT_USB_DEV_DOEPINT3_EPDISBLD_CLR_MSK 0xfffffffd
91344 /* The reset value of the ALT_USB_DEV_DOEPINT3_EPDISBLD register field. */
91345 #define ALT_USB_DEV_DOEPINT3_EPDISBLD_RESET 0x0
91346 /* Extracts the ALT_USB_DEV_DOEPINT3_EPDISBLD field value from a register. */
91347 #define ALT_USB_DEV_DOEPINT3_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
91348 /* Produces a ALT_USB_DEV_DOEPINT3_EPDISBLD register field value suitable for setting the register. */
91349 #define ALT_USB_DEV_DOEPINT3_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
91350 
91351 /*
91352  * Field : ahberr
91353  *
91354  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
91355  * there is an AHB error during an AHB read/write. The application can read the
91356  * corresponding endpoint DMA address register to get the error address.
91357  *
91358  * Field Enumeration Values:
91359  *
91360  * Enum | Value | Description
91361  * :------------------------------------|:------|:--------------------
91362  * ALT_USB_DEV_DOEPINT3_AHBERR_E_INACT | 0x0 | No Interrupt
91363  * ALT_USB_DEV_DOEPINT3_AHBERR_E_ACT | 0x1 | AHB Error interrupt
91364  *
91365  * Field Access Macros:
91366  *
91367  */
91368 /*
91369  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_AHBERR
91370  *
91371  * No Interrupt
91372  */
91373 #define ALT_USB_DEV_DOEPINT3_AHBERR_E_INACT 0x0
91374 /*
91375  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_AHBERR
91376  *
91377  * AHB Error interrupt
91378  */
91379 #define ALT_USB_DEV_DOEPINT3_AHBERR_E_ACT 0x1
91380 
91381 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_AHBERR register field. */
91382 #define ALT_USB_DEV_DOEPINT3_AHBERR_LSB 2
91383 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_AHBERR register field. */
91384 #define ALT_USB_DEV_DOEPINT3_AHBERR_MSB 2
91385 /* The width in bits of the ALT_USB_DEV_DOEPINT3_AHBERR register field. */
91386 #define ALT_USB_DEV_DOEPINT3_AHBERR_WIDTH 1
91387 /* The mask used to set the ALT_USB_DEV_DOEPINT3_AHBERR register field value. */
91388 #define ALT_USB_DEV_DOEPINT3_AHBERR_SET_MSK 0x00000004
91389 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_AHBERR register field value. */
91390 #define ALT_USB_DEV_DOEPINT3_AHBERR_CLR_MSK 0xfffffffb
91391 /* The reset value of the ALT_USB_DEV_DOEPINT3_AHBERR register field. */
91392 #define ALT_USB_DEV_DOEPINT3_AHBERR_RESET 0x0
91393 /* Extracts the ALT_USB_DEV_DOEPINT3_AHBERR field value from a register. */
91394 #define ALT_USB_DEV_DOEPINT3_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
91395 /* Produces a ALT_USB_DEV_DOEPINT3_AHBERR register field value suitable for setting the register. */
91396 #define ALT_USB_DEV_DOEPINT3_AHBERR_SET(value) (((value) << 2) & 0x00000004)
91397 
91398 /*
91399  * Field : SETUP Phase Done - setup
91400  *
91401  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
91402  * control endpoint is complete and no more back-to-back SETUP packets were
91403  * received for the current control transfer. On this interrupt, the application
91404  * can decode the received SETUP data packet.
91405  *
91406  * Field Enumeration Values:
91407  *
91408  * Enum | Value | Description
91409  * :-----------------------------------|:------|:--------------------
91410  * ALT_USB_DEV_DOEPINT3_SETUP_E_INACT | 0x0 | No SETUP Phase Done
91411  * ALT_USB_DEV_DOEPINT3_SETUP_E_ACT | 0x1 | SETUP Phase Done
91412  *
91413  * Field Access Macros:
91414  *
91415  */
91416 /*
91417  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_SETUP
91418  *
91419  * No SETUP Phase Done
91420  */
91421 #define ALT_USB_DEV_DOEPINT3_SETUP_E_INACT 0x0
91422 /*
91423  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_SETUP
91424  *
91425  * SETUP Phase Done
91426  */
91427 #define ALT_USB_DEV_DOEPINT3_SETUP_E_ACT 0x1
91428 
91429 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_SETUP register field. */
91430 #define ALT_USB_DEV_DOEPINT3_SETUP_LSB 3
91431 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_SETUP register field. */
91432 #define ALT_USB_DEV_DOEPINT3_SETUP_MSB 3
91433 /* The width in bits of the ALT_USB_DEV_DOEPINT3_SETUP register field. */
91434 #define ALT_USB_DEV_DOEPINT3_SETUP_WIDTH 1
91435 /* The mask used to set the ALT_USB_DEV_DOEPINT3_SETUP register field value. */
91436 #define ALT_USB_DEV_DOEPINT3_SETUP_SET_MSK 0x00000008
91437 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_SETUP register field value. */
91438 #define ALT_USB_DEV_DOEPINT3_SETUP_CLR_MSK 0xfffffff7
91439 /* The reset value of the ALT_USB_DEV_DOEPINT3_SETUP register field. */
91440 #define ALT_USB_DEV_DOEPINT3_SETUP_RESET 0x0
91441 /* Extracts the ALT_USB_DEV_DOEPINT3_SETUP field value from a register. */
91442 #define ALT_USB_DEV_DOEPINT3_SETUP_GET(value) (((value) & 0x00000008) >> 3)
91443 /* Produces a ALT_USB_DEV_DOEPINT3_SETUP register field value suitable for setting the register. */
91444 #define ALT_USB_DEV_DOEPINT3_SETUP_SET(value) (((value) << 3) & 0x00000008)
91445 
91446 /*
91447  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
91448  *
91449  * Applies only to control OUT endpoints. Indicates that an OUT token was received
91450  * when the endpoint was not yet enabled. This interrupt is asserted on the
91451  * endpoint for which the OUT token was received.
91452  *
91453  * Field Enumeration Values:
91454  *
91455  * Enum | Value | Description
91456  * :-----------------------------------------|:------|:---------------------------------------------
91457  * ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
91458  * ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
91459  *
91460  * Field Access Macros:
91461  *
91462  */
91463 /*
91464  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS
91465  *
91466  * No OUT Token Received When Endpoint Disabled
91467  */
91468 #define ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS_E_INACT 0x0
91469 /*
91470  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS
91471  *
91472  * OUT Token Received When Endpoint Disabled
91473  */
91474 #define ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS_E_ACT 0x1
91475 
91476 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS register field. */
91477 #define ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS_LSB 4
91478 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS register field. */
91479 #define ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS_MSB 4
91480 /* The width in bits of the ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS register field. */
91481 #define ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS_WIDTH 1
91482 /* The mask used to set the ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS register field value. */
91483 #define ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS_SET_MSK 0x00000010
91484 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS register field value. */
91485 #define ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS_CLR_MSK 0xffffffef
91486 /* The reset value of the ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS register field. */
91487 #define ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS_RESET 0x0
91488 /* Extracts the ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS field value from a register. */
91489 #define ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
91490 /* Produces a ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS register field value suitable for setting the register. */
91491 #define ALT_USB_DEV_DOEPINT3_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
91492 
91493 /*
91494  * Field : Status Phase Received for Control Write - stsphsercvd
91495  *
91496  * This interrupt is valid only for Control OUT endpoints and only in Scatter
91497  * Gather DMA mode. This interrupt is generated only after the core has transferred
91498  * all the data that the host has sent during the data phase of a control write
91499  * transfer, to the system memory buffer. The interrupt indicates to the
91500  * application that the host has switched from data phase to the status phase of a
91501  * Control Write transfer. The application can use this interrupt to ACK or STALL
91502  * the Status phase, after it has decoded the data phase. This is applicable only
91503  * in Case of Scatter Gather DMA mode.
91504  *
91505  * Field Enumeration Values:
91506  *
91507  * Enum | Value | Description
91508  * :-----------------------------------------|:------|:-------------------------------------------
91509  * ALT_USB_DEV_DOEPINT3_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
91510  * ALT_USB_DEV_DOEPINT3_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
91511  *
91512  * Field Access Macros:
91513  *
91514  */
91515 /*
91516  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_STSPHSERCVD
91517  *
91518  * No Status Phase Received for Control Write
91519  */
91520 #define ALT_USB_DEV_DOEPINT3_STSPHSERCVD_E_INACT 0x0
91521 /*
91522  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_STSPHSERCVD
91523  *
91524  * Status Phase Received for Control Write
91525  */
91526 #define ALT_USB_DEV_DOEPINT3_STSPHSERCVD_E_ACT 0x1
91527 
91528 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_STSPHSERCVD register field. */
91529 #define ALT_USB_DEV_DOEPINT3_STSPHSERCVD_LSB 5
91530 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_STSPHSERCVD register field. */
91531 #define ALT_USB_DEV_DOEPINT3_STSPHSERCVD_MSB 5
91532 /* The width in bits of the ALT_USB_DEV_DOEPINT3_STSPHSERCVD register field. */
91533 #define ALT_USB_DEV_DOEPINT3_STSPHSERCVD_WIDTH 1
91534 /* The mask used to set the ALT_USB_DEV_DOEPINT3_STSPHSERCVD register field value. */
91535 #define ALT_USB_DEV_DOEPINT3_STSPHSERCVD_SET_MSK 0x00000020
91536 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_STSPHSERCVD register field value. */
91537 #define ALT_USB_DEV_DOEPINT3_STSPHSERCVD_CLR_MSK 0xffffffdf
91538 /* The reset value of the ALT_USB_DEV_DOEPINT3_STSPHSERCVD register field. */
91539 #define ALT_USB_DEV_DOEPINT3_STSPHSERCVD_RESET 0x0
91540 /* Extracts the ALT_USB_DEV_DOEPINT3_STSPHSERCVD field value from a register. */
91541 #define ALT_USB_DEV_DOEPINT3_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
91542 /* Produces a ALT_USB_DEV_DOEPINT3_STSPHSERCVD register field value suitable for setting the register. */
91543 #define ALT_USB_DEV_DOEPINT3_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
91544 
91545 /*
91546  * Field : Back-to-Back SETUP Packets Received - back2backsetup
91547  *
91548  * Applies to Control OUT endpoints only. This bit indicates that the core has
91549  * received more than three back-to-back SETUP packets for this particular
91550  * endpoint. for information about handling this interrupt,
91551  *
91552  * Field Enumeration Values:
91553  *
91554  * Enum | Value | Description
91555  * :--------------------------------------------|:------|:---------------------------------------
91556  * ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
91557  * ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
91558  *
91559  * Field Access Macros:
91560  *
91561  */
91562 /*
91563  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP
91564  *
91565  * No Back-to-Back SETUP Packets Received
91566  */
91567 #define ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP_E_INACT 0x0
91568 /*
91569  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP
91570  *
91571  * Back-to-Back SETUP Packets Received
91572  */
91573 #define ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP_E_ACT 0x1
91574 
91575 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP register field. */
91576 #define ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP_LSB 6
91577 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP register field. */
91578 #define ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP_MSB 6
91579 /* The width in bits of the ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP register field. */
91580 #define ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP_WIDTH 1
91581 /* The mask used to set the ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP register field value. */
91582 #define ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP_SET_MSK 0x00000040
91583 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP register field value. */
91584 #define ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP_CLR_MSK 0xffffffbf
91585 /* The reset value of the ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP register field. */
91586 #define ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP_RESET 0x0
91587 /* Extracts the ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP field value from a register. */
91588 #define ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
91589 /* Produces a ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP register field value suitable for setting the register. */
91590 #define ALT_USB_DEV_DOEPINT3_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
91591 
91592 /*
91593  * Field : OUT Packet Error - outpkterr
91594  *
91595  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
91596  * an overflow or a CRC error for non-Isochronous OUT packet.
91597  *
91598  * Field Enumeration Values:
91599  *
91600  * Enum | Value | Description
91601  * :---------------------------------------|:------|:--------------------
91602  * ALT_USB_DEV_DOEPINT3_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
91603  * ALT_USB_DEV_DOEPINT3_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
91604  *
91605  * Field Access Macros:
91606  *
91607  */
91608 /*
91609  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_OUTPKTERR
91610  *
91611  * No OUT Packet Error
91612  */
91613 #define ALT_USB_DEV_DOEPINT3_OUTPKTERR_E_INACT 0x0
91614 /*
91615  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_OUTPKTERR
91616  *
91617  * OUT Packet Error
91618  */
91619 #define ALT_USB_DEV_DOEPINT3_OUTPKTERR_E_ACT 0x1
91620 
91621 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_OUTPKTERR register field. */
91622 #define ALT_USB_DEV_DOEPINT3_OUTPKTERR_LSB 8
91623 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_OUTPKTERR register field. */
91624 #define ALT_USB_DEV_DOEPINT3_OUTPKTERR_MSB 8
91625 /* The width in bits of the ALT_USB_DEV_DOEPINT3_OUTPKTERR register field. */
91626 #define ALT_USB_DEV_DOEPINT3_OUTPKTERR_WIDTH 1
91627 /* The mask used to set the ALT_USB_DEV_DOEPINT3_OUTPKTERR register field value. */
91628 #define ALT_USB_DEV_DOEPINT3_OUTPKTERR_SET_MSK 0x00000100
91629 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_OUTPKTERR register field value. */
91630 #define ALT_USB_DEV_DOEPINT3_OUTPKTERR_CLR_MSK 0xfffffeff
91631 /* The reset value of the ALT_USB_DEV_DOEPINT3_OUTPKTERR register field. */
91632 #define ALT_USB_DEV_DOEPINT3_OUTPKTERR_RESET 0x0
91633 /* Extracts the ALT_USB_DEV_DOEPINT3_OUTPKTERR field value from a register. */
91634 #define ALT_USB_DEV_DOEPINT3_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
91635 /* Produces a ALT_USB_DEV_DOEPINT3_OUTPKTERR register field value suitable for setting the register. */
91636 #define ALT_USB_DEV_DOEPINT3_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
91637 
91638 /*
91639  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
91640  *
91641  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
91642  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
91643  * the descriptor accessed is not ready for the Core to process, such as Host busy
91644  * or DMA done
91645  *
91646  * Field Enumeration Values:
91647  *
91648  * Enum | Value | Description
91649  * :-------------------------------------|:------|:--------------
91650  * ALT_USB_DEV_DOEPINT3_BNAINTR_E_INACT | 0x0 | No interrupt
91651  * ALT_USB_DEV_DOEPINT3_BNAINTR_E_ACT | 0x1 | BNA interrupt
91652  *
91653  * Field Access Macros:
91654  *
91655  */
91656 /*
91657  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_BNAINTR
91658  *
91659  * No interrupt
91660  */
91661 #define ALT_USB_DEV_DOEPINT3_BNAINTR_E_INACT 0x0
91662 /*
91663  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_BNAINTR
91664  *
91665  * BNA interrupt
91666  */
91667 #define ALT_USB_DEV_DOEPINT3_BNAINTR_E_ACT 0x1
91668 
91669 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_BNAINTR register field. */
91670 #define ALT_USB_DEV_DOEPINT3_BNAINTR_LSB 9
91671 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_BNAINTR register field. */
91672 #define ALT_USB_DEV_DOEPINT3_BNAINTR_MSB 9
91673 /* The width in bits of the ALT_USB_DEV_DOEPINT3_BNAINTR register field. */
91674 #define ALT_USB_DEV_DOEPINT3_BNAINTR_WIDTH 1
91675 /* The mask used to set the ALT_USB_DEV_DOEPINT3_BNAINTR register field value. */
91676 #define ALT_USB_DEV_DOEPINT3_BNAINTR_SET_MSK 0x00000200
91677 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_BNAINTR register field value. */
91678 #define ALT_USB_DEV_DOEPINT3_BNAINTR_CLR_MSK 0xfffffdff
91679 /* The reset value of the ALT_USB_DEV_DOEPINT3_BNAINTR register field. */
91680 #define ALT_USB_DEV_DOEPINT3_BNAINTR_RESET 0x0
91681 /* Extracts the ALT_USB_DEV_DOEPINT3_BNAINTR field value from a register. */
91682 #define ALT_USB_DEV_DOEPINT3_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
91683 /* Produces a ALT_USB_DEV_DOEPINT3_BNAINTR register field value suitable for setting the register. */
91684 #define ALT_USB_DEV_DOEPINT3_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
91685 
91686 /*
91687  * Field : Packet Drop Status - pktdrpsts
91688  *
91689  * This bit indicates to the application that an ISOC OUT packet has been dropped.
91690  * This bit does not have an associated mask bit and does not generate an
91691  * interrupt.
91692  *
91693  * Field Enumeration Values:
91694  *
91695  * Enum | Value | Description
91696  * :---------------------------------------|:------|:-----------------------------
91697  * ALT_USB_DEV_DOEPINT3_PKTDRPSTS_E_INACT | 0x0 | No interrupt
91698  * ALT_USB_DEV_DOEPINT3_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
91699  *
91700  * Field Access Macros:
91701  *
91702  */
91703 /*
91704  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_PKTDRPSTS
91705  *
91706  * No interrupt
91707  */
91708 #define ALT_USB_DEV_DOEPINT3_PKTDRPSTS_E_INACT 0x0
91709 /*
91710  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_PKTDRPSTS
91711  *
91712  * Packet Drop Status interrupt
91713  */
91714 #define ALT_USB_DEV_DOEPINT3_PKTDRPSTS_E_ACT 0x1
91715 
91716 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_PKTDRPSTS register field. */
91717 #define ALT_USB_DEV_DOEPINT3_PKTDRPSTS_LSB 11
91718 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_PKTDRPSTS register field. */
91719 #define ALT_USB_DEV_DOEPINT3_PKTDRPSTS_MSB 11
91720 /* The width in bits of the ALT_USB_DEV_DOEPINT3_PKTDRPSTS register field. */
91721 #define ALT_USB_DEV_DOEPINT3_PKTDRPSTS_WIDTH 1
91722 /* The mask used to set the ALT_USB_DEV_DOEPINT3_PKTDRPSTS register field value. */
91723 #define ALT_USB_DEV_DOEPINT3_PKTDRPSTS_SET_MSK 0x00000800
91724 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_PKTDRPSTS register field value. */
91725 #define ALT_USB_DEV_DOEPINT3_PKTDRPSTS_CLR_MSK 0xfffff7ff
91726 /* The reset value of the ALT_USB_DEV_DOEPINT3_PKTDRPSTS register field. */
91727 #define ALT_USB_DEV_DOEPINT3_PKTDRPSTS_RESET 0x0
91728 /* Extracts the ALT_USB_DEV_DOEPINT3_PKTDRPSTS field value from a register. */
91729 #define ALT_USB_DEV_DOEPINT3_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
91730 /* Produces a ALT_USB_DEV_DOEPINT3_PKTDRPSTS register field value suitable for setting the register. */
91731 #define ALT_USB_DEV_DOEPINT3_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
91732 
91733 /*
91734  * Field : BbleErr Interrupt - bbleerr
91735  *
91736  * The core generates this interrupt when babble is received for the endpoint.
91737  *
91738  * Field Enumeration Values:
91739  *
91740  * Enum | Value | Description
91741  * :-------------------------------------|:------|:------------------
91742  * ALT_USB_DEV_DOEPINT3_BBLEERR_E_INACT | 0x0 | No interrupt
91743  * ALT_USB_DEV_DOEPINT3_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
91744  *
91745  * Field Access Macros:
91746  *
91747  */
91748 /*
91749  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_BBLEERR
91750  *
91751  * No interrupt
91752  */
91753 #define ALT_USB_DEV_DOEPINT3_BBLEERR_E_INACT 0x0
91754 /*
91755  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_BBLEERR
91756  *
91757  * BbleErr interrupt
91758  */
91759 #define ALT_USB_DEV_DOEPINT3_BBLEERR_E_ACT 0x1
91760 
91761 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_BBLEERR register field. */
91762 #define ALT_USB_DEV_DOEPINT3_BBLEERR_LSB 12
91763 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_BBLEERR register field. */
91764 #define ALT_USB_DEV_DOEPINT3_BBLEERR_MSB 12
91765 /* The width in bits of the ALT_USB_DEV_DOEPINT3_BBLEERR register field. */
91766 #define ALT_USB_DEV_DOEPINT3_BBLEERR_WIDTH 1
91767 /* The mask used to set the ALT_USB_DEV_DOEPINT3_BBLEERR register field value. */
91768 #define ALT_USB_DEV_DOEPINT3_BBLEERR_SET_MSK 0x00001000
91769 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_BBLEERR register field value. */
91770 #define ALT_USB_DEV_DOEPINT3_BBLEERR_CLR_MSK 0xffffefff
91771 /* The reset value of the ALT_USB_DEV_DOEPINT3_BBLEERR register field. */
91772 #define ALT_USB_DEV_DOEPINT3_BBLEERR_RESET 0x0
91773 /* Extracts the ALT_USB_DEV_DOEPINT3_BBLEERR field value from a register. */
91774 #define ALT_USB_DEV_DOEPINT3_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
91775 /* Produces a ALT_USB_DEV_DOEPINT3_BBLEERR register field value suitable for setting the register. */
91776 #define ALT_USB_DEV_DOEPINT3_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
91777 
91778 /*
91779  * Field : NAK Interrupt - nakintrpt
91780  *
91781  * The core generates this interrupt when a NAK is transmitted or received by the
91782  * device. In case of isochronous IN endpoints the interrupt gets generated when a
91783  * zero length packet is transmitted due to un-availability of data in the TXFifo.
91784  *
91785  * Field Enumeration Values:
91786  *
91787  * Enum | Value | Description
91788  * :---------------------------------------|:------|:--------------
91789  * ALT_USB_DEV_DOEPINT3_NAKINTRPT_E_INACT | 0x0 | No interrupt
91790  * ALT_USB_DEV_DOEPINT3_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
91791  *
91792  * Field Access Macros:
91793  *
91794  */
91795 /*
91796  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_NAKINTRPT
91797  *
91798  * No interrupt
91799  */
91800 #define ALT_USB_DEV_DOEPINT3_NAKINTRPT_E_INACT 0x0
91801 /*
91802  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_NAKINTRPT
91803  *
91804  * NAK Interrupt
91805  */
91806 #define ALT_USB_DEV_DOEPINT3_NAKINTRPT_E_ACT 0x1
91807 
91808 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_NAKINTRPT register field. */
91809 #define ALT_USB_DEV_DOEPINT3_NAKINTRPT_LSB 13
91810 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_NAKINTRPT register field. */
91811 #define ALT_USB_DEV_DOEPINT3_NAKINTRPT_MSB 13
91812 /* The width in bits of the ALT_USB_DEV_DOEPINT3_NAKINTRPT register field. */
91813 #define ALT_USB_DEV_DOEPINT3_NAKINTRPT_WIDTH 1
91814 /* The mask used to set the ALT_USB_DEV_DOEPINT3_NAKINTRPT register field value. */
91815 #define ALT_USB_DEV_DOEPINT3_NAKINTRPT_SET_MSK 0x00002000
91816 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_NAKINTRPT register field value. */
91817 #define ALT_USB_DEV_DOEPINT3_NAKINTRPT_CLR_MSK 0xffffdfff
91818 /* The reset value of the ALT_USB_DEV_DOEPINT3_NAKINTRPT register field. */
91819 #define ALT_USB_DEV_DOEPINT3_NAKINTRPT_RESET 0x0
91820 /* Extracts the ALT_USB_DEV_DOEPINT3_NAKINTRPT field value from a register. */
91821 #define ALT_USB_DEV_DOEPINT3_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
91822 /* Produces a ALT_USB_DEV_DOEPINT3_NAKINTRPT register field value suitable for setting the register. */
91823 #define ALT_USB_DEV_DOEPINT3_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
91824 
91825 /*
91826  * Field : NYET Interrupt - nyetintrpt
91827  *
91828  * The core generates this interrupt when a NYET response is transmitted for a non
91829  * isochronous OUT endpoint.
91830  *
91831  * Field Enumeration Values:
91832  *
91833  * Enum | Value | Description
91834  * :----------------------------------------|:------|:---------------
91835  * ALT_USB_DEV_DOEPINT3_NYETINTRPT_E_INACT | 0x0 | No interrupt
91836  * ALT_USB_DEV_DOEPINT3_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
91837  *
91838  * Field Access Macros:
91839  *
91840  */
91841 /*
91842  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_NYETINTRPT
91843  *
91844  * No interrupt
91845  */
91846 #define ALT_USB_DEV_DOEPINT3_NYETINTRPT_E_INACT 0x0
91847 /*
91848  * Enumerated value for register field ALT_USB_DEV_DOEPINT3_NYETINTRPT
91849  *
91850  * NYET Interrupt
91851  */
91852 #define ALT_USB_DEV_DOEPINT3_NYETINTRPT_E_ACT 0x1
91853 
91854 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT3_NYETINTRPT register field. */
91855 #define ALT_USB_DEV_DOEPINT3_NYETINTRPT_LSB 14
91856 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT3_NYETINTRPT register field. */
91857 #define ALT_USB_DEV_DOEPINT3_NYETINTRPT_MSB 14
91858 /* The width in bits of the ALT_USB_DEV_DOEPINT3_NYETINTRPT register field. */
91859 #define ALT_USB_DEV_DOEPINT3_NYETINTRPT_WIDTH 1
91860 /* The mask used to set the ALT_USB_DEV_DOEPINT3_NYETINTRPT register field value. */
91861 #define ALT_USB_DEV_DOEPINT3_NYETINTRPT_SET_MSK 0x00004000
91862 /* The mask used to clear the ALT_USB_DEV_DOEPINT3_NYETINTRPT register field value. */
91863 #define ALT_USB_DEV_DOEPINT3_NYETINTRPT_CLR_MSK 0xffffbfff
91864 /* The reset value of the ALT_USB_DEV_DOEPINT3_NYETINTRPT register field. */
91865 #define ALT_USB_DEV_DOEPINT3_NYETINTRPT_RESET 0x0
91866 /* Extracts the ALT_USB_DEV_DOEPINT3_NYETINTRPT field value from a register. */
91867 #define ALT_USB_DEV_DOEPINT3_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
91868 /* Produces a ALT_USB_DEV_DOEPINT3_NYETINTRPT register field value suitable for setting the register. */
91869 #define ALT_USB_DEV_DOEPINT3_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
91870 
91871 #ifndef __ASSEMBLY__
91872 /*
91873  * WARNING: The C register and register group struct declarations are provided for
91874  * convenience and illustrative purposes. They should, however, be used with
91875  * caution as the C language standard provides no guarantees about the alignment or
91876  * atomicity of device memory accesses. The recommended practice for writing
91877  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
91878  * alt_write_word() functions.
91879  *
91880  * The struct declaration for register ALT_USB_DEV_DOEPINT3.
91881  */
91882 struct ALT_USB_DEV_DOEPINT3_s
91883 {
91884  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
91885  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
91886  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT3_AHBERR */
91887  const uint32_t setup : 1; /* SETUP Phase Done */
91888  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
91889  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
91890  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
91891  uint32_t : 1; /* *UNDEFINED* */
91892  const uint32_t outpkterr : 1; /* OUT Packet Error */
91893  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
91894  uint32_t : 1; /* *UNDEFINED* */
91895  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
91896  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
91897  const uint32_t nakintrpt : 1; /* NAK Interrupt */
91898  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
91899  uint32_t : 17; /* *UNDEFINED* */
91900 };
91901 
91902 /* The typedef declaration for register ALT_USB_DEV_DOEPINT3. */
91903 typedef volatile struct ALT_USB_DEV_DOEPINT3_s ALT_USB_DEV_DOEPINT3_t;
91904 #endif /* __ASSEMBLY__ */
91905 
91906 /* The byte offset of the ALT_USB_DEV_DOEPINT3 register from the beginning of the component. */
91907 #define ALT_USB_DEV_DOEPINT3_OFST 0x368
91908 /* The address of the ALT_USB_DEV_DOEPINT3 register. */
91909 #define ALT_USB_DEV_DOEPINT3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT3_OFST))
91910 
91911 /*
91912  * Register : Device OUT Endpoint 3 Transfer Size Register - doeptsiz3
91913  *
91914  * The application must modify this register before enabling the endpoint. Once the
91915  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
91916  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
91917  * application can only read this register once the core has cleared the Endpoint
91918  * Enable bit.
91919  *
91920  * Register Layout
91921  *
91922  * Bits | Access | Reset | Description
91923  * :--------|:-------|:------|:-------------------
91924  * [18:0] | RW | 0x0 | Transfer Size
91925  * [28:19] | RW | 0x0 | Packet Count
91926  * [30:29] | R | 0x0 | SETUP Packet Count
91927  * [31] | ??? | 0x0 | *UNDEFINED*
91928  *
91929  */
91930 /*
91931  * Field : Transfer Size - xfersize
91932  *
91933  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
91934  * application only after it has exhausted the transfer size amount of data. The
91935  * transfer size can be Set to the maximum packet size of the endpoint, to be
91936  * interrupted at the end of each packet. The core decrements this field every time
91937  * a packet from the external memory is written to the RxFIFO.
91938  *
91939  * Field Access Macros:
91940  *
91941  */
91942 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ3_XFERSIZE register field. */
91943 #define ALT_USB_DEV_DOEPTSIZ3_XFERSIZE_LSB 0
91944 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ3_XFERSIZE register field. */
91945 #define ALT_USB_DEV_DOEPTSIZ3_XFERSIZE_MSB 18
91946 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ3_XFERSIZE register field. */
91947 #define ALT_USB_DEV_DOEPTSIZ3_XFERSIZE_WIDTH 19
91948 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ3_XFERSIZE register field value. */
91949 #define ALT_USB_DEV_DOEPTSIZ3_XFERSIZE_SET_MSK 0x0007ffff
91950 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ3_XFERSIZE register field value. */
91951 #define ALT_USB_DEV_DOEPTSIZ3_XFERSIZE_CLR_MSK 0xfff80000
91952 /* The reset value of the ALT_USB_DEV_DOEPTSIZ3_XFERSIZE register field. */
91953 #define ALT_USB_DEV_DOEPTSIZ3_XFERSIZE_RESET 0x0
91954 /* Extracts the ALT_USB_DEV_DOEPTSIZ3_XFERSIZE field value from a register. */
91955 #define ALT_USB_DEV_DOEPTSIZ3_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
91956 /* Produces a ALT_USB_DEV_DOEPTSIZ3_XFERSIZE register field value suitable for setting the register. */
91957 #define ALT_USB_DEV_DOEPTSIZ3_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
91958 
91959 /*
91960  * Field : Packet Count - pktcnt
91961  *
91962  * Indicates the total number of USB packets that constitute the Transfer Size
91963  * amount of data for endpoint 0.This field is decremented every time a packet
91964  * (maximum size or short packet) is read from the RxFIFO.
91965  *
91966  * Field Access Macros:
91967  *
91968  */
91969 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ3_PKTCNT register field. */
91970 #define ALT_USB_DEV_DOEPTSIZ3_PKTCNT_LSB 19
91971 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ3_PKTCNT register field. */
91972 #define ALT_USB_DEV_DOEPTSIZ3_PKTCNT_MSB 28
91973 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ3_PKTCNT register field. */
91974 #define ALT_USB_DEV_DOEPTSIZ3_PKTCNT_WIDTH 10
91975 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ3_PKTCNT register field value. */
91976 #define ALT_USB_DEV_DOEPTSIZ3_PKTCNT_SET_MSK 0x1ff80000
91977 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ3_PKTCNT register field value. */
91978 #define ALT_USB_DEV_DOEPTSIZ3_PKTCNT_CLR_MSK 0xe007ffff
91979 /* The reset value of the ALT_USB_DEV_DOEPTSIZ3_PKTCNT register field. */
91980 #define ALT_USB_DEV_DOEPTSIZ3_PKTCNT_RESET 0x0
91981 /* Extracts the ALT_USB_DEV_DOEPTSIZ3_PKTCNT field value from a register. */
91982 #define ALT_USB_DEV_DOEPTSIZ3_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
91983 /* Produces a ALT_USB_DEV_DOEPTSIZ3_PKTCNT register field value suitable for setting the register. */
91984 #define ALT_USB_DEV_DOEPTSIZ3_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
91985 
91986 /*
91987  * Field : SETUP Packet Count - rxdpid
91988  *
91989  * Applies to isochronous OUT endpoints only.This is the data PID received in the
91990  * last packet for this endpoint. Use datax.
91991  *
91992  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
91993  * number of back-to-back SETUP data packets the endpoint can receive.
91994  *
91995  * Field Enumeration Values:
91996  *
91997  * Enum | Value | Description
91998  * :-----------------------------------------|:------|:-------------------
91999  * ALT_USB_DEV_DOEPTSIZ3_RXDPID_E_DATA0 | 0x0 | DATA0
92000  * ALT_USB_DEV_DOEPTSIZ3_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
92001  * ALT_USB_DEV_DOEPTSIZ3_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
92002  * ALT_USB_DEV_DOEPTSIZ3_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
92003  *
92004  * Field Access Macros:
92005  *
92006  */
92007 /*
92008  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ3_RXDPID
92009  *
92010  * DATA0
92011  */
92012 #define ALT_USB_DEV_DOEPTSIZ3_RXDPID_E_DATA0 0x0
92013 /*
92014  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ3_RXDPID
92015  *
92016  * DATA2 or 1 packet
92017  */
92018 #define ALT_USB_DEV_DOEPTSIZ3_RXDPID_E_DATA2PKT1 0x1
92019 /*
92020  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ3_RXDPID
92021  *
92022  * DATA1 or 2 packets
92023  */
92024 #define ALT_USB_DEV_DOEPTSIZ3_RXDPID_E_DATA1PKT2 0x2
92025 /*
92026  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ3_RXDPID
92027  *
92028  * MDATA or 3 packets
92029  */
92030 #define ALT_USB_DEV_DOEPTSIZ3_RXDPID_E_MDATAPKT3 0x3
92031 
92032 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ3_RXDPID register field. */
92033 #define ALT_USB_DEV_DOEPTSIZ3_RXDPID_LSB 29
92034 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ3_RXDPID register field. */
92035 #define ALT_USB_DEV_DOEPTSIZ3_RXDPID_MSB 30
92036 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ3_RXDPID register field. */
92037 #define ALT_USB_DEV_DOEPTSIZ3_RXDPID_WIDTH 2
92038 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ3_RXDPID register field value. */
92039 #define ALT_USB_DEV_DOEPTSIZ3_RXDPID_SET_MSK 0x60000000
92040 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ3_RXDPID register field value. */
92041 #define ALT_USB_DEV_DOEPTSIZ3_RXDPID_CLR_MSK 0x9fffffff
92042 /* The reset value of the ALT_USB_DEV_DOEPTSIZ3_RXDPID register field. */
92043 #define ALT_USB_DEV_DOEPTSIZ3_RXDPID_RESET 0x0
92044 /* Extracts the ALT_USB_DEV_DOEPTSIZ3_RXDPID field value from a register. */
92045 #define ALT_USB_DEV_DOEPTSIZ3_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
92046 /* Produces a ALT_USB_DEV_DOEPTSIZ3_RXDPID register field value suitable for setting the register. */
92047 #define ALT_USB_DEV_DOEPTSIZ3_RXDPID_SET(value) (((value) << 29) & 0x60000000)
92048 
92049 #ifndef __ASSEMBLY__
92050 /*
92051  * WARNING: The C register and register group struct declarations are provided for
92052  * convenience and illustrative purposes. They should, however, be used with
92053  * caution as the C language standard provides no guarantees about the alignment or
92054  * atomicity of device memory accesses. The recommended practice for writing
92055  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
92056  * alt_write_word() functions.
92057  *
92058  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ3.
92059  */
92060 struct ALT_USB_DEV_DOEPTSIZ3_s
92061 {
92062  uint32_t xfersize : 19; /* Transfer Size */
92063  uint32_t pktcnt : 10; /* Packet Count */
92064  const uint32_t rxdpid : 2; /* SETUP Packet Count */
92065  uint32_t : 1; /* *UNDEFINED* */
92066 };
92067 
92068 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ3. */
92069 typedef volatile struct ALT_USB_DEV_DOEPTSIZ3_s ALT_USB_DEV_DOEPTSIZ3_t;
92070 #endif /* __ASSEMBLY__ */
92071 
92072 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ3 register from the beginning of the component. */
92073 #define ALT_USB_DEV_DOEPTSIZ3_OFST 0x370
92074 /* The address of the ALT_USB_DEV_DOEPTSIZ3 register. */
92075 #define ALT_USB_DEV_DOEPTSIZ3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ3_OFST))
92076 
92077 /*
92078  * Register : Device OUT Endpoint 3 DMA Address Register - doepdma3
92079  *
92080  * DMA OUT Address.
92081  *
92082  * Register Layout
92083  *
92084  * Bits | Access | Reset | Description
92085  * :-------|:-------|:--------|:------------
92086  * [31:0] | RW | Unknown | DMA Address
92087  *
92088  */
92089 /*
92090  * Field : DMA Address - doepdma3
92091  *
92092  * Holds the start address of the external memory for storing or fetching endpoint
92093  * data. for control endpoints, this field stores control OUT data packets as well
92094  * as SETUP transaction data packets. When more than three SETUP packets are
92095  * received back-to-back, the SETUP data packet in the memory is overwritten. This
92096  * register is incremented on every AHB transaction. The application can give only
92097  * a DWORD-aligned address.
92098  *
92099  * When Scatter/Gather DMA mode is not enabled, the application programs the start
92100  * address value in this field.
92101  *
92102  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
92103  * for the descriptor list.
92104  *
92105  * Field Access Macros:
92106  *
92107  */
92108 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA3_DOEPDMA3 register field. */
92109 #define ALT_USB_DEV_DOEPDMA3_DOEPDMA3_LSB 0
92110 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA3_DOEPDMA3 register field. */
92111 #define ALT_USB_DEV_DOEPDMA3_DOEPDMA3_MSB 31
92112 /* The width in bits of the ALT_USB_DEV_DOEPDMA3_DOEPDMA3 register field. */
92113 #define ALT_USB_DEV_DOEPDMA3_DOEPDMA3_WIDTH 32
92114 /* The mask used to set the ALT_USB_DEV_DOEPDMA3_DOEPDMA3 register field value. */
92115 #define ALT_USB_DEV_DOEPDMA3_DOEPDMA3_SET_MSK 0xffffffff
92116 /* The mask used to clear the ALT_USB_DEV_DOEPDMA3_DOEPDMA3 register field value. */
92117 #define ALT_USB_DEV_DOEPDMA3_DOEPDMA3_CLR_MSK 0x00000000
92118 /* The reset value of the ALT_USB_DEV_DOEPDMA3_DOEPDMA3 register field is UNKNOWN. */
92119 #define ALT_USB_DEV_DOEPDMA3_DOEPDMA3_RESET 0x0
92120 /* Extracts the ALT_USB_DEV_DOEPDMA3_DOEPDMA3 field value from a register. */
92121 #define ALT_USB_DEV_DOEPDMA3_DOEPDMA3_GET(value) (((value) & 0xffffffff) >> 0)
92122 /* Produces a ALT_USB_DEV_DOEPDMA3_DOEPDMA3 register field value suitable for setting the register. */
92123 #define ALT_USB_DEV_DOEPDMA3_DOEPDMA3_SET(value) (((value) << 0) & 0xffffffff)
92124 
92125 #ifndef __ASSEMBLY__
92126 /*
92127  * WARNING: The C register and register group struct declarations are provided for
92128  * convenience and illustrative purposes. They should, however, be used with
92129  * caution as the C language standard provides no guarantees about the alignment or
92130  * atomicity of device memory accesses. The recommended practice for writing
92131  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
92132  * alt_write_word() functions.
92133  *
92134  * The struct declaration for register ALT_USB_DEV_DOEPDMA3.
92135  */
92136 struct ALT_USB_DEV_DOEPDMA3_s
92137 {
92138  uint32_t doepdma3 : 32; /* DMA Address */
92139 };
92140 
92141 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA3. */
92142 typedef volatile struct ALT_USB_DEV_DOEPDMA3_s ALT_USB_DEV_DOEPDMA3_t;
92143 #endif /* __ASSEMBLY__ */
92144 
92145 /* The byte offset of the ALT_USB_DEV_DOEPDMA3 register from the beginning of the component. */
92146 #define ALT_USB_DEV_DOEPDMA3_OFST 0x374
92147 /* The address of the ALT_USB_DEV_DOEPDMA3 register. */
92148 #define ALT_USB_DEV_DOEPDMA3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA3_OFST))
92149 
92150 /*
92151  * Register : Device OUT Endpoint 3 DMA Buffer Address Register - doepdmab3
92152  *
92153  * DMA Buffer Address.
92154  *
92155  * Register Layout
92156  *
92157  * Bits | Access | Reset | Description
92158  * :-------|:-------|:--------|:-------------------
92159  * [31:0] | R | Unknown | DMA Buffer Address
92160  *
92161  */
92162 /*
92163  * Field : DMA Buffer Address - doepdmab3
92164  *
92165  * Holds the current buffer address. This register is updated as and when the data
92166  * transfer for the corresponding end point is in progress. This register is
92167  * present only in Scatter/Gather DMA mode.
92168  *
92169  * Field Access Macros:
92170  *
92171  */
92172 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3 register field. */
92173 #define ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3_LSB 0
92174 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3 register field. */
92175 #define ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3_MSB 31
92176 /* The width in bits of the ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3 register field. */
92177 #define ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3_WIDTH 32
92178 /* The mask used to set the ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3 register field value. */
92179 #define ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3_SET_MSK 0xffffffff
92180 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3 register field value. */
92181 #define ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3_CLR_MSK 0x00000000
92182 /* The reset value of the ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3 register field is UNKNOWN. */
92183 #define ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3_RESET 0x0
92184 /* Extracts the ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3 field value from a register. */
92185 #define ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3_GET(value) (((value) & 0xffffffff) >> 0)
92186 /* Produces a ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3 register field value suitable for setting the register. */
92187 #define ALT_USB_DEV_DOEPDMAB3_DOEPDMAB3_SET(value) (((value) << 0) & 0xffffffff)
92188 
92189 #ifndef __ASSEMBLY__
92190 /*
92191  * WARNING: The C register and register group struct declarations are provided for
92192  * convenience and illustrative purposes. They should, however, be used with
92193  * caution as the C language standard provides no guarantees about the alignment or
92194  * atomicity of device memory accesses. The recommended practice for writing
92195  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
92196  * alt_write_word() functions.
92197  *
92198  * The struct declaration for register ALT_USB_DEV_DOEPDMAB3.
92199  */
92200 struct ALT_USB_DEV_DOEPDMAB3_s
92201 {
92202  const uint32_t doepdmab3 : 32; /* DMA Buffer Address */
92203 };
92204 
92205 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB3. */
92206 typedef volatile struct ALT_USB_DEV_DOEPDMAB3_s ALT_USB_DEV_DOEPDMAB3_t;
92207 #endif /* __ASSEMBLY__ */
92208 
92209 /* The byte offset of the ALT_USB_DEV_DOEPDMAB3 register from the beginning of the component. */
92210 #define ALT_USB_DEV_DOEPDMAB3_OFST 0x37c
92211 /* The address of the ALT_USB_DEV_DOEPDMAB3 register. */
92212 #define ALT_USB_DEV_DOEPDMAB3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB3_OFST))
92213 
92214 /*
92215  * Register : Device Control OUT Endpoint 4 Control Register - doepctl4
92216  *
92217  * Out Endpoint 4.
92218  *
92219  * Register Layout
92220  *
92221  * Bits | Access | Reset | Description
92222  * :--------|:-------|:------|:--------------------
92223  * [10:0] | RW | 0x0 | Maximum Packet Size
92224  * [14:11] | ??? | 0x0 | *UNDEFINED*
92225  * [15] | RW | 0x0 | USB Active Endpoint
92226  * [16] | R | 0x0 | Endpoint Data PID
92227  * [17] | R | 0x0 | NAK Status
92228  * [19:18] | RW | 0x0 | Endpoint Type
92229  * [20] | RW | 0x0 | Snoop Mode
92230  * [21] | R | 0x0 | STALL Handshake
92231  * [25:22] | ??? | 0x0 | *UNDEFINED*
92232  * [26] | W | 0x0 | Clear NAK
92233  * [27] | W | 0x0 | Set NAK
92234  * [28] | W | 0x0 | Set DATA0 PID
92235  * [29] | W | 0x0 | Set DATA1 PID
92236  * [30] | R | 0x0 | Endpoint Disable
92237  * [31] | R | 0x0 | Endpoint Enable
92238  *
92239  */
92240 /*
92241  * Field : Maximum Packet Size - mps
92242  *
92243  * Applies to IN and OUT endpoints. The application must program this field with
92244  * the maximum packet size for the current logical endpoint. This value is in
92245  * bytes.
92246  *
92247  * Field Access Macros:
92248  *
92249  */
92250 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_MPS register field. */
92251 #define ALT_USB_DEV_DOEPCTL4_MPS_LSB 0
92252 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_MPS register field. */
92253 #define ALT_USB_DEV_DOEPCTL4_MPS_MSB 10
92254 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_MPS register field. */
92255 #define ALT_USB_DEV_DOEPCTL4_MPS_WIDTH 11
92256 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_MPS register field value. */
92257 #define ALT_USB_DEV_DOEPCTL4_MPS_SET_MSK 0x000007ff
92258 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_MPS register field value. */
92259 #define ALT_USB_DEV_DOEPCTL4_MPS_CLR_MSK 0xfffff800
92260 /* The reset value of the ALT_USB_DEV_DOEPCTL4_MPS register field. */
92261 #define ALT_USB_DEV_DOEPCTL4_MPS_RESET 0x0
92262 /* Extracts the ALT_USB_DEV_DOEPCTL4_MPS field value from a register. */
92263 #define ALT_USB_DEV_DOEPCTL4_MPS_GET(value) (((value) & 0x000007ff) >> 0)
92264 /* Produces a ALT_USB_DEV_DOEPCTL4_MPS register field value suitable for setting the register. */
92265 #define ALT_USB_DEV_DOEPCTL4_MPS_SET(value) (((value) << 0) & 0x000007ff)
92266 
92267 /*
92268  * Field : USB Active Endpoint - usbactep
92269  *
92270  * Indicates whether this endpoint is active in the current configuration and
92271  * interface. The core clears this bit for all endpoints (other than EP 0) after
92272  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
92273  * commands, the application must program endpoint registers accordingly and set
92274  * this bit.
92275  *
92276  * Field Enumeration Values:
92277  *
92278  * Enum | Value | Description
92279  * :-------------------------------------|:------|:--------------------
92280  * ALT_USB_DEV_DOEPCTL4_USBACTEP_E_DISD | 0x0 | Not Active
92281  * ALT_USB_DEV_DOEPCTL4_USBACTEP_E_END | 0x1 | USB Active Endpoint
92282  *
92283  * Field Access Macros:
92284  *
92285  */
92286 /*
92287  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_USBACTEP
92288  *
92289  * Not Active
92290  */
92291 #define ALT_USB_DEV_DOEPCTL4_USBACTEP_E_DISD 0x0
92292 /*
92293  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_USBACTEP
92294  *
92295  * USB Active Endpoint
92296  */
92297 #define ALT_USB_DEV_DOEPCTL4_USBACTEP_E_END 0x1
92298 
92299 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_USBACTEP register field. */
92300 #define ALT_USB_DEV_DOEPCTL4_USBACTEP_LSB 15
92301 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_USBACTEP register field. */
92302 #define ALT_USB_DEV_DOEPCTL4_USBACTEP_MSB 15
92303 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_USBACTEP register field. */
92304 #define ALT_USB_DEV_DOEPCTL4_USBACTEP_WIDTH 1
92305 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_USBACTEP register field value. */
92306 #define ALT_USB_DEV_DOEPCTL4_USBACTEP_SET_MSK 0x00008000
92307 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_USBACTEP register field value. */
92308 #define ALT_USB_DEV_DOEPCTL4_USBACTEP_CLR_MSK 0xffff7fff
92309 /* The reset value of the ALT_USB_DEV_DOEPCTL4_USBACTEP register field. */
92310 #define ALT_USB_DEV_DOEPCTL4_USBACTEP_RESET 0x0
92311 /* Extracts the ALT_USB_DEV_DOEPCTL4_USBACTEP field value from a register. */
92312 #define ALT_USB_DEV_DOEPCTL4_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
92313 /* Produces a ALT_USB_DEV_DOEPCTL4_USBACTEP register field value suitable for setting the register. */
92314 #define ALT_USB_DEV_DOEPCTL4_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
92315 
92316 /*
92317  * Field : Endpoint Data PID - dpid
92318  *
92319  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
92320  * packet to be received or transmitted on this endpoint. The application must
92321  * program the PID of the first packet to be received or transmitted on this
92322  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
92323  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
92324  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
92325  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
92326  * DMA mode:
92327  *
92328  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
92329  * number in which the core transmits/receives isochronous data for this endpoint.
92330  * The application must program the even/odd (micro) frame number in which it
92331  * intends to transmit/receive isochronous data for this endpoint using the
92332  * SetEvnFr and SetOddFr fields in this register.
92333  *
92334  * 0: Even (micro)frame
92335  *
92336  * 1: Odd (micro)frame
92337  *
92338  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
92339  * number in which to send data is provided in the transmit descriptor structure.
92340  * The frame in which data is received is updated in receive descriptor structure.
92341  *
92342  * Field Enumeration Values:
92343  *
92344  * Enum | Value | Description
92345  * :----------------------------------|:------|:-----------------------------
92346  * ALT_USB_DEV_DOEPCTL4_DPID_E_INACT | 0x0 | Endpoint Data PID not active
92347  * ALT_USB_DEV_DOEPCTL4_DPID_E_ACT | 0x1 | Endpoint Data PID active
92348  *
92349  * Field Access Macros:
92350  *
92351  */
92352 /*
92353  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_DPID
92354  *
92355  * Endpoint Data PID not active
92356  */
92357 #define ALT_USB_DEV_DOEPCTL4_DPID_E_INACT 0x0
92358 /*
92359  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_DPID
92360  *
92361  * Endpoint Data PID active
92362  */
92363 #define ALT_USB_DEV_DOEPCTL4_DPID_E_ACT 0x1
92364 
92365 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_DPID register field. */
92366 #define ALT_USB_DEV_DOEPCTL4_DPID_LSB 16
92367 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_DPID register field. */
92368 #define ALT_USB_DEV_DOEPCTL4_DPID_MSB 16
92369 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_DPID register field. */
92370 #define ALT_USB_DEV_DOEPCTL4_DPID_WIDTH 1
92371 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_DPID register field value. */
92372 #define ALT_USB_DEV_DOEPCTL4_DPID_SET_MSK 0x00010000
92373 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_DPID register field value. */
92374 #define ALT_USB_DEV_DOEPCTL4_DPID_CLR_MSK 0xfffeffff
92375 /* The reset value of the ALT_USB_DEV_DOEPCTL4_DPID register field. */
92376 #define ALT_USB_DEV_DOEPCTL4_DPID_RESET 0x0
92377 /* Extracts the ALT_USB_DEV_DOEPCTL4_DPID field value from a register. */
92378 #define ALT_USB_DEV_DOEPCTL4_DPID_GET(value) (((value) & 0x00010000) >> 16)
92379 /* Produces a ALT_USB_DEV_DOEPCTL4_DPID register field value suitable for setting the register. */
92380 #define ALT_USB_DEV_DOEPCTL4_DPID_SET(value) (((value) << 16) & 0x00010000)
92381 
92382 /*
92383  * Field : NAK Status - naksts
92384  *
92385  * When either the application or the core sets this bit:
92386  *
92387  * * The core stops receiving any data on an OUT endpoint, even if there is space
92388  * in the RxFIFO to accommodate the incoming packet.
92389  *
92390  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
92391  * IN endpoint, even if there data is available in the TxFIFO.
92392  *
92393  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
92394  * even if there data is available in the TxFIFO.
92395  *
92396  * Irrespective of this bit's setting, the core always responds to SETUP data
92397  * packets with an ACK handshake.
92398  *
92399  * Field Enumeration Values:
92400  *
92401  * Enum | Value | Description
92402  * :-------------------------------------|:------|:------------------------------------------------
92403  * ALT_USB_DEV_DOEPCTL4_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
92404  * : | | based on the FIFO status
92405  * ALT_USB_DEV_DOEPCTL4_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
92406  * : | | endpoint
92407  *
92408  * Field Access Macros:
92409  *
92410  */
92411 /*
92412  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_NAKSTS
92413  *
92414  * The core is transmitting non-NAK handshakes based on the FIFO status
92415  */
92416 #define ALT_USB_DEV_DOEPCTL4_NAKSTS_E_NONNAK 0x0
92417 /*
92418  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_NAKSTS
92419  *
92420  * The core is transmitting NAK handshakes on this endpoint
92421  */
92422 #define ALT_USB_DEV_DOEPCTL4_NAKSTS_E_NAK 0x1
92423 
92424 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_NAKSTS register field. */
92425 #define ALT_USB_DEV_DOEPCTL4_NAKSTS_LSB 17
92426 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_NAKSTS register field. */
92427 #define ALT_USB_DEV_DOEPCTL4_NAKSTS_MSB 17
92428 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_NAKSTS register field. */
92429 #define ALT_USB_DEV_DOEPCTL4_NAKSTS_WIDTH 1
92430 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_NAKSTS register field value. */
92431 #define ALT_USB_DEV_DOEPCTL4_NAKSTS_SET_MSK 0x00020000
92432 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_NAKSTS register field value. */
92433 #define ALT_USB_DEV_DOEPCTL4_NAKSTS_CLR_MSK 0xfffdffff
92434 /* The reset value of the ALT_USB_DEV_DOEPCTL4_NAKSTS register field. */
92435 #define ALT_USB_DEV_DOEPCTL4_NAKSTS_RESET 0x0
92436 /* Extracts the ALT_USB_DEV_DOEPCTL4_NAKSTS field value from a register. */
92437 #define ALT_USB_DEV_DOEPCTL4_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
92438 /* Produces a ALT_USB_DEV_DOEPCTL4_NAKSTS register field value suitable for setting the register. */
92439 #define ALT_USB_DEV_DOEPCTL4_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
92440 
92441 /*
92442  * Field : Endpoint Type - eptype
92443  *
92444  * This is the transfer type supported by this logical endpoint.
92445  *
92446  * Field Enumeration Values:
92447  *
92448  * Enum | Value | Description
92449  * :------------------------------------------|:------|:------------
92450  * ALT_USB_DEV_DOEPCTL4_EPTYPE_E_CTL | 0x0 | Control
92451  * ALT_USB_DEV_DOEPCTL4_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
92452  * ALT_USB_DEV_DOEPCTL4_EPTYPE_E_BULK | 0x2 | Bulk
92453  * ALT_USB_DEV_DOEPCTL4_EPTYPE_E_INTERRUP | 0x3 | Interrupt
92454  *
92455  * Field Access Macros:
92456  *
92457  */
92458 /*
92459  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_EPTYPE
92460  *
92461  * Control
92462  */
92463 #define ALT_USB_DEV_DOEPCTL4_EPTYPE_E_CTL 0x0
92464 /*
92465  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_EPTYPE
92466  *
92467  * Isochronous
92468  */
92469 #define ALT_USB_DEV_DOEPCTL4_EPTYPE_E_ISOCHRONOUS 0x1
92470 /*
92471  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_EPTYPE
92472  *
92473  * Bulk
92474  */
92475 #define ALT_USB_DEV_DOEPCTL4_EPTYPE_E_BULK 0x2
92476 /*
92477  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_EPTYPE
92478  *
92479  * Interrupt
92480  */
92481 #define ALT_USB_DEV_DOEPCTL4_EPTYPE_E_INTERRUP 0x3
92482 
92483 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_EPTYPE register field. */
92484 #define ALT_USB_DEV_DOEPCTL4_EPTYPE_LSB 18
92485 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_EPTYPE register field. */
92486 #define ALT_USB_DEV_DOEPCTL4_EPTYPE_MSB 19
92487 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_EPTYPE register field. */
92488 #define ALT_USB_DEV_DOEPCTL4_EPTYPE_WIDTH 2
92489 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_EPTYPE register field value. */
92490 #define ALT_USB_DEV_DOEPCTL4_EPTYPE_SET_MSK 0x000c0000
92491 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_EPTYPE register field value. */
92492 #define ALT_USB_DEV_DOEPCTL4_EPTYPE_CLR_MSK 0xfff3ffff
92493 /* The reset value of the ALT_USB_DEV_DOEPCTL4_EPTYPE register field. */
92494 #define ALT_USB_DEV_DOEPCTL4_EPTYPE_RESET 0x0
92495 /* Extracts the ALT_USB_DEV_DOEPCTL4_EPTYPE field value from a register. */
92496 #define ALT_USB_DEV_DOEPCTL4_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
92497 /* Produces a ALT_USB_DEV_DOEPCTL4_EPTYPE register field value suitable for setting the register. */
92498 #define ALT_USB_DEV_DOEPCTL4_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
92499 
92500 /*
92501  * Field : Snoop Mode - snp
92502  *
92503  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
92504  * In Snoop mode, the core does not check the correctness of OUT packets before
92505  * transferring them to application memory.
92506  *
92507  * Field Enumeration Values:
92508  *
92509  * Enum | Value | Description
92510  * :-------------------------------|:------|:-------------------
92511  * ALT_USB_DEV_DOEPCTL4_SNP_E_DIS | 0x0 | Disable Snoop Mode
92512  * ALT_USB_DEV_DOEPCTL4_SNP_E_EN | 0x1 | Enable Snoop Mode
92513  *
92514  * Field Access Macros:
92515  *
92516  */
92517 /*
92518  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_SNP
92519  *
92520  * Disable Snoop Mode
92521  */
92522 #define ALT_USB_DEV_DOEPCTL4_SNP_E_DIS 0x0
92523 /*
92524  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_SNP
92525  *
92526  * Enable Snoop Mode
92527  */
92528 #define ALT_USB_DEV_DOEPCTL4_SNP_E_EN 0x1
92529 
92530 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_SNP register field. */
92531 #define ALT_USB_DEV_DOEPCTL4_SNP_LSB 20
92532 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_SNP register field. */
92533 #define ALT_USB_DEV_DOEPCTL4_SNP_MSB 20
92534 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_SNP register field. */
92535 #define ALT_USB_DEV_DOEPCTL4_SNP_WIDTH 1
92536 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_SNP register field value. */
92537 #define ALT_USB_DEV_DOEPCTL4_SNP_SET_MSK 0x00100000
92538 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_SNP register field value. */
92539 #define ALT_USB_DEV_DOEPCTL4_SNP_CLR_MSK 0xffefffff
92540 /* The reset value of the ALT_USB_DEV_DOEPCTL4_SNP register field. */
92541 #define ALT_USB_DEV_DOEPCTL4_SNP_RESET 0x0
92542 /* Extracts the ALT_USB_DEV_DOEPCTL4_SNP field value from a register. */
92543 #define ALT_USB_DEV_DOEPCTL4_SNP_GET(value) (((value) & 0x00100000) >> 20)
92544 /* Produces a ALT_USB_DEV_DOEPCTL4_SNP register field value suitable for setting the register. */
92545 #define ALT_USB_DEV_DOEPCTL4_SNP_SET(value) (((value) << 20) & 0x00100000)
92546 
92547 /*
92548  * Field : STALL Handshake - stall
92549  *
92550  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
92551  * application sets this bit to stall all tokens from the USB host to this
92552  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
92553  * along with this bit, the STALL bit takes priority. Only the application can
92554  * clear this bit, never the core. Applies to control endpoints only. The
92555  * application can only set this bit, and the core clears it, when a SETUP token is
92556  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
92557  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
92558  * of this bit's setting, the core always responds to SETUP data packets with an
92559  * ACK handshake.
92560  *
92561  * Field Enumeration Values:
92562  *
92563  * Enum | Value | Description
92564  * :-----------------------------------|:------|:----------------------------
92565  * ALT_USB_DEV_DOEPCTL4_STALL_E_INACT | 0x0 | STALL All Tokens not active
92566  * ALT_USB_DEV_DOEPCTL4_STALL_E_ACT | 0x1 | STALL All Tokens active
92567  *
92568  * Field Access Macros:
92569  *
92570  */
92571 /*
92572  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_STALL
92573  *
92574  * STALL All Tokens not active
92575  */
92576 #define ALT_USB_DEV_DOEPCTL4_STALL_E_INACT 0x0
92577 /*
92578  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_STALL
92579  *
92580  * STALL All Tokens active
92581  */
92582 #define ALT_USB_DEV_DOEPCTL4_STALL_E_ACT 0x1
92583 
92584 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_STALL register field. */
92585 #define ALT_USB_DEV_DOEPCTL4_STALL_LSB 21
92586 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_STALL register field. */
92587 #define ALT_USB_DEV_DOEPCTL4_STALL_MSB 21
92588 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_STALL register field. */
92589 #define ALT_USB_DEV_DOEPCTL4_STALL_WIDTH 1
92590 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_STALL register field value. */
92591 #define ALT_USB_DEV_DOEPCTL4_STALL_SET_MSK 0x00200000
92592 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_STALL register field value. */
92593 #define ALT_USB_DEV_DOEPCTL4_STALL_CLR_MSK 0xffdfffff
92594 /* The reset value of the ALT_USB_DEV_DOEPCTL4_STALL register field. */
92595 #define ALT_USB_DEV_DOEPCTL4_STALL_RESET 0x0
92596 /* Extracts the ALT_USB_DEV_DOEPCTL4_STALL field value from a register. */
92597 #define ALT_USB_DEV_DOEPCTL4_STALL_GET(value) (((value) & 0x00200000) >> 21)
92598 /* Produces a ALT_USB_DEV_DOEPCTL4_STALL register field value suitable for setting the register. */
92599 #define ALT_USB_DEV_DOEPCTL4_STALL_SET(value) (((value) << 21) & 0x00200000)
92600 
92601 /*
92602  * Field : Clear NAK - cnak
92603  *
92604  * A write to this bit clears the NAK bit for the endpoint.
92605  *
92606  * Field Enumeration Values:
92607  *
92608  * Enum | Value | Description
92609  * :----------------------------------|:------|:-------------
92610  * ALT_USB_DEV_DOEPCTL4_CNAK_E_INACT | 0x0 | No Clear NAK
92611  * ALT_USB_DEV_DOEPCTL4_CNAK_E_ACT | 0x1 | Clear NAK
92612  *
92613  * Field Access Macros:
92614  *
92615  */
92616 /*
92617  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_CNAK
92618  *
92619  * No Clear NAK
92620  */
92621 #define ALT_USB_DEV_DOEPCTL4_CNAK_E_INACT 0x0
92622 /*
92623  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_CNAK
92624  *
92625  * Clear NAK
92626  */
92627 #define ALT_USB_DEV_DOEPCTL4_CNAK_E_ACT 0x1
92628 
92629 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_CNAK register field. */
92630 #define ALT_USB_DEV_DOEPCTL4_CNAK_LSB 26
92631 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_CNAK register field. */
92632 #define ALT_USB_DEV_DOEPCTL4_CNAK_MSB 26
92633 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_CNAK register field. */
92634 #define ALT_USB_DEV_DOEPCTL4_CNAK_WIDTH 1
92635 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_CNAK register field value. */
92636 #define ALT_USB_DEV_DOEPCTL4_CNAK_SET_MSK 0x04000000
92637 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_CNAK register field value. */
92638 #define ALT_USB_DEV_DOEPCTL4_CNAK_CLR_MSK 0xfbffffff
92639 /* The reset value of the ALT_USB_DEV_DOEPCTL4_CNAK register field. */
92640 #define ALT_USB_DEV_DOEPCTL4_CNAK_RESET 0x0
92641 /* Extracts the ALT_USB_DEV_DOEPCTL4_CNAK field value from a register. */
92642 #define ALT_USB_DEV_DOEPCTL4_CNAK_GET(value) (((value) & 0x04000000) >> 26)
92643 /* Produces a ALT_USB_DEV_DOEPCTL4_CNAK register field value suitable for setting the register. */
92644 #define ALT_USB_DEV_DOEPCTL4_CNAK_SET(value) (((value) << 26) & 0x04000000)
92645 
92646 /*
92647  * Field : Set NAK - snak
92648  *
92649  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
92650  * application can control the transmission of NAK handshakes on an endpoint. The
92651  * core can also Set this bit for an endpoint after a SETUP packet is received on
92652  * that endpoint.
92653  *
92654  * Field Enumeration Values:
92655  *
92656  * Enum | Value | Description
92657  * :----------------------------------|:------|:------------
92658  * ALT_USB_DEV_DOEPCTL4_SNAK_E_INACT | 0x0 | No Set NAK
92659  * ALT_USB_DEV_DOEPCTL4_SNAK_E_ACT | 0x1 | Set NAK
92660  *
92661  * Field Access Macros:
92662  *
92663  */
92664 /*
92665  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_SNAK
92666  *
92667  * No Set NAK
92668  */
92669 #define ALT_USB_DEV_DOEPCTL4_SNAK_E_INACT 0x0
92670 /*
92671  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_SNAK
92672  *
92673  * Set NAK
92674  */
92675 #define ALT_USB_DEV_DOEPCTL4_SNAK_E_ACT 0x1
92676 
92677 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_SNAK register field. */
92678 #define ALT_USB_DEV_DOEPCTL4_SNAK_LSB 27
92679 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_SNAK register field. */
92680 #define ALT_USB_DEV_DOEPCTL4_SNAK_MSB 27
92681 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_SNAK register field. */
92682 #define ALT_USB_DEV_DOEPCTL4_SNAK_WIDTH 1
92683 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_SNAK register field value. */
92684 #define ALT_USB_DEV_DOEPCTL4_SNAK_SET_MSK 0x08000000
92685 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_SNAK register field value. */
92686 #define ALT_USB_DEV_DOEPCTL4_SNAK_CLR_MSK 0xf7ffffff
92687 /* The reset value of the ALT_USB_DEV_DOEPCTL4_SNAK register field. */
92688 #define ALT_USB_DEV_DOEPCTL4_SNAK_RESET 0x0
92689 /* Extracts the ALT_USB_DEV_DOEPCTL4_SNAK field value from a register. */
92690 #define ALT_USB_DEV_DOEPCTL4_SNAK_GET(value) (((value) & 0x08000000) >> 27)
92691 /* Produces a ALT_USB_DEV_DOEPCTL4_SNAK register field value suitable for setting the register. */
92692 #define ALT_USB_DEV_DOEPCTL4_SNAK_SET(value) (((value) << 27) & 0x08000000)
92693 
92694 /*
92695  * Field : Set DATA0 PID - setd0pid
92696  *
92697  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
92698  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
92699  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
92700  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
92701  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
92702  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
92703  * mode is enabled, this field is reserved. The frame number in which to send data
92704  * is in the transmit descriptor structure. The frame in which to receive data is
92705  * updated in receive descriptor structure.
92706  *
92707  * Field Enumeration Values:
92708  *
92709  * Enum | Value | Description
92710  * :-------------------------------------|:------|:------------------------------------
92711  * ALT_USB_DEV_DOEPCTL4_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
92712  * ALT_USB_DEV_DOEPCTL4_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
92713  *
92714  * Field Access Macros:
92715  *
92716  */
92717 /*
92718  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_SETD0PID
92719  *
92720  * Disables Set DATA0 PID
92721  */
92722 #define ALT_USB_DEV_DOEPCTL4_SETD0PID_E_DISD 0x0
92723 /*
92724  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_SETD0PID
92725  *
92726  * Enables Endpoint Data PID to DATA0)
92727  */
92728 #define ALT_USB_DEV_DOEPCTL4_SETD0PID_E_END 0x1
92729 
92730 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_SETD0PID register field. */
92731 #define ALT_USB_DEV_DOEPCTL4_SETD0PID_LSB 28
92732 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_SETD0PID register field. */
92733 #define ALT_USB_DEV_DOEPCTL4_SETD0PID_MSB 28
92734 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_SETD0PID register field. */
92735 #define ALT_USB_DEV_DOEPCTL4_SETD0PID_WIDTH 1
92736 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_SETD0PID register field value. */
92737 #define ALT_USB_DEV_DOEPCTL4_SETD0PID_SET_MSK 0x10000000
92738 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_SETD0PID register field value. */
92739 #define ALT_USB_DEV_DOEPCTL4_SETD0PID_CLR_MSK 0xefffffff
92740 /* The reset value of the ALT_USB_DEV_DOEPCTL4_SETD0PID register field. */
92741 #define ALT_USB_DEV_DOEPCTL4_SETD0PID_RESET 0x0
92742 /* Extracts the ALT_USB_DEV_DOEPCTL4_SETD0PID field value from a register. */
92743 #define ALT_USB_DEV_DOEPCTL4_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
92744 /* Produces a ALT_USB_DEV_DOEPCTL4_SETD0PID register field value suitable for setting the register. */
92745 #define ALT_USB_DEV_DOEPCTL4_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
92746 
92747 /*
92748  * Field : Set DATA1 PID - setd1pid
92749  *
92750  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
92751  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
92752  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
92753  *
92754  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
92755  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
92756  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
92757  *
92758  * Field Enumeration Values:
92759  *
92760  * Enum | Value | Description
92761  * :-------------------------------------|:------|:-----------------------
92762  * ALT_USB_DEV_DOEPCTL4_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
92763  * ALT_USB_DEV_DOEPCTL4_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
92764  *
92765  * Field Access Macros:
92766  *
92767  */
92768 /*
92769  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_SETD1PID
92770  *
92771  * Disables Set DATA1 PID
92772  */
92773 #define ALT_USB_DEV_DOEPCTL4_SETD1PID_E_DISD 0x0
92774 /*
92775  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_SETD1PID
92776  *
92777  * Enables Set DATA1 PID
92778  */
92779 #define ALT_USB_DEV_DOEPCTL4_SETD1PID_E_END 0x1
92780 
92781 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_SETD1PID register field. */
92782 #define ALT_USB_DEV_DOEPCTL4_SETD1PID_LSB 29
92783 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_SETD1PID register field. */
92784 #define ALT_USB_DEV_DOEPCTL4_SETD1PID_MSB 29
92785 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_SETD1PID register field. */
92786 #define ALT_USB_DEV_DOEPCTL4_SETD1PID_WIDTH 1
92787 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_SETD1PID register field value. */
92788 #define ALT_USB_DEV_DOEPCTL4_SETD1PID_SET_MSK 0x20000000
92789 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_SETD1PID register field value. */
92790 #define ALT_USB_DEV_DOEPCTL4_SETD1PID_CLR_MSK 0xdfffffff
92791 /* The reset value of the ALT_USB_DEV_DOEPCTL4_SETD1PID register field. */
92792 #define ALT_USB_DEV_DOEPCTL4_SETD1PID_RESET 0x0
92793 /* Extracts the ALT_USB_DEV_DOEPCTL4_SETD1PID field value from a register. */
92794 #define ALT_USB_DEV_DOEPCTL4_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
92795 /* Produces a ALT_USB_DEV_DOEPCTL4_SETD1PID register field value suitable for setting the register. */
92796 #define ALT_USB_DEV_DOEPCTL4_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
92797 
92798 /*
92799  * Field : Endpoint Disable - epdis
92800  *
92801  * Applies to IN and OUT endpoints. The application sets this bit to stop
92802  * transmitting/receiving data on an endpoint, even before the transfer for that
92803  * endpoint is complete. The application must wait for the Endpoint Disabled
92804  * interrupt before treating the endpoint as disabled. The core clears this bit
92805  * before setting the Endpoint Disabled interrupt. The application must set this
92806  * bit only if Endpoint Enable is already set for this endpoint.
92807  *
92808  * Field Enumeration Values:
92809  *
92810  * Enum | Value | Description
92811  * :-----------------------------------|:------|:--------------------
92812  * ALT_USB_DEV_DOEPCTL4_EPDIS_E_INACT | 0x0 | No Endpoint Disable
92813  * ALT_USB_DEV_DOEPCTL4_EPDIS_E_ACT | 0x1 | Endpoint Disable
92814  *
92815  * Field Access Macros:
92816  *
92817  */
92818 /*
92819  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_EPDIS
92820  *
92821  * No Endpoint Disable
92822  */
92823 #define ALT_USB_DEV_DOEPCTL4_EPDIS_E_INACT 0x0
92824 /*
92825  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_EPDIS
92826  *
92827  * Endpoint Disable
92828  */
92829 #define ALT_USB_DEV_DOEPCTL4_EPDIS_E_ACT 0x1
92830 
92831 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_EPDIS register field. */
92832 #define ALT_USB_DEV_DOEPCTL4_EPDIS_LSB 30
92833 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_EPDIS register field. */
92834 #define ALT_USB_DEV_DOEPCTL4_EPDIS_MSB 30
92835 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_EPDIS register field. */
92836 #define ALT_USB_DEV_DOEPCTL4_EPDIS_WIDTH 1
92837 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_EPDIS register field value. */
92838 #define ALT_USB_DEV_DOEPCTL4_EPDIS_SET_MSK 0x40000000
92839 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_EPDIS register field value. */
92840 #define ALT_USB_DEV_DOEPCTL4_EPDIS_CLR_MSK 0xbfffffff
92841 /* The reset value of the ALT_USB_DEV_DOEPCTL4_EPDIS register field. */
92842 #define ALT_USB_DEV_DOEPCTL4_EPDIS_RESET 0x0
92843 /* Extracts the ALT_USB_DEV_DOEPCTL4_EPDIS field value from a register. */
92844 #define ALT_USB_DEV_DOEPCTL4_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
92845 /* Produces a ALT_USB_DEV_DOEPCTL4_EPDIS register field value suitable for setting the register. */
92846 #define ALT_USB_DEV_DOEPCTL4_EPDIS_SET(value) (((value) << 30) & 0x40000000)
92847 
92848 /*
92849  * Field : Endpoint Enable - epena
92850  *
92851  * Applies to IN and OUT endpoints.
92852  *
92853  * * When Scatter/Gather DMA mode is enabled,
92854  *
92855  * * for IN endpoints this bit indicates that the descriptor structure and data
92856  * buffer with data ready to transmit is setup.
92857  *
92858  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
92859  * receive data is setup.
92860  *
92861  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
92862  * mode:
92863  *
92864  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
92865  * the endpoint.
92866  *
92867  * * for OUT endpoints, this bit indicates that the application has allocated the
92868  * memory to start receiving data from the USB.
92869  *
92870  * * The core clears this bit before setting any of the following interrupts on
92871  * this endpoint:
92872  *
92873  * * SETUP Phase Done
92874  *
92875  * * Endpoint Disabled
92876  *
92877  * * Transfer Completed
92878  *
92879  * for control endpoints in DMA mode, this bit must be set to be able to transfer
92880  * SETUP data packets in memory.
92881  *
92882  * Field Enumeration Values:
92883  *
92884  * Enum | Value | Description
92885  * :-----------------------------------|:------|:-------------------------
92886  * ALT_USB_DEV_DOEPCTL4_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
92887  * ALT_USB_DEV_DOEPCTL4_EPENA_E_ACT | 0x1 | Endpoint Enable active
92888  *
92889  * Field Access Macros:
92890  *
92891  */
92892 /*
92893  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_EPENA
92894  *
92895  * Endpoint Enable inactive
92896  */
92897 #define ALT_USB_DEV_DOEPCTL4_EPENA_E_INACT 0x0
92898 /*
92899  * Enumerated value for register field ALT_USB_DEV_DOEPCTL4_EPENA
92900  *
92901  * Endpoint Enable active
92902  */
92903 #define ALT_USB_DEV_DOEPCTL4_EPENA_E_ACT 0x1
92904 
92905 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL4_EPENA register field. */
92906 #define ALT_USB_DEV_DOEPCTL4_EPENA_LSB 31
92907 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL4_EPENA register field. */
92908 #define ALT_USB_DEV_DOEPCTL4_EPENA_MSB 31
92909 /* The width in bits of the ALT_USB_DEV_DOEPCTL4_EPENA register field. */
92910 #define ALT_USB_DEV_DOEPCTL4_EPENA_WIDTH 1
92911 /* The mask used to set the ALT_USB_DEV_DOEPCTL4_EPENA register field value. */
92912 #define ALT_USB_DEV_DOEPCTL4_EPENA_SET_MSK 0x80000000
92913 /* The mask used to clear the ALT_USB_DEV_DOEPCTL4_EPENA register field value. */
92914 #define ALT_USB_DEV_DOEPCTL4_EPENA_CLR_MSK 0x7fffffff
92915 /* The reset value of the ALT_USB_DEV_DOEPCTL4_EPENA register field. */
92916 #define ALT_USB_DEV_DOEPCTL4_EPENA_RESET 0x0
92917 /* Extracts the ALT_USB_DEV_DOEPCTL4_EPENA field value from a register. */
92918 #define ALT_USB_DEV_DOEPCTL4_EPENA_GET(value) (((value) & 0x80000000) >> 31)
92919 /* Produces a ALT_USB_DEV_DOEPCTL4_EPENA register field value suitable for setting the register. */
92920 #define ALT_USB_DEV_DOEPCTL4_EPENA_SET(value) (((value) << 31) & 0x80000000)
92921 
92922 #ifndef __ASSEMBLY__
92923 /*
92924  * WARNING: The C register and register group struct declarations are provided for
92925  * convenience and illustrative purposes. They should, however, be used with
92926  * caution as the C language standard provides no guarantees about the alignment or
92927  * atomicity of device memory accesses. The recommended practice for writing
92928  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
92929  * alt_write_word() functions.
92930  *
92931  * The struct declaration for register ALT_USB_DEV_DOEPCTL4.
92932  */
92933 struct ALT_USB_DEV_DOEPCTL4_s
92934 {
92935  uint32_t mps : 11; /* Maximum Packet Size */
92936  uint32_t : 4; /* *UNDEFINED* */
92937  uint32_t usbactep : 1; /* USB Active Endpoint */
92938  const uint32_t dpid : 1; /* Endpoint Data PID */
92939  const uint32_t naksts : 1; /* NAK Status */
92940  uint32_t eptype : 2; /* Endpoint Type */
92941  uint32_t snp : 1; /* Snoop Mode */
92942  const uint32_t stall : 1; /* STALL Handshake */
92943  uint32_t : 4; /* *UNDEFINED* */
92944  uint32_t cnak : 1; /* Clear NAK */
92945  uint32_t snak : 1; /* Set NAK */
92946  uint32_t setd0pid : 1; /* Set DATA0 PID */
92947  uint32_t setd1pid : 1; /* Set DATA1 PID */
92948  const uint32_t epdis : 1; /* Endpoint Disable */
92949  const uint32_t epena : 1; /* Endpoint Enable */
92950 };
92951 
92952 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL4. */
92953 typedef volatile struct ALT_USB_DEV_DOEPCTL4_s ALT_USB_DEV_DOEPCTL4_t;
92954 #endif /* __ASSEMBLY__ */
92955 
92956 /* The byte offset of the ALT_USB_DEV_DOEPCTL4 register from the beginning of the component. */
92957 #define ALT_USB_DEV_DOEPCTL4_OFST 0x380
92958 /* The address of the ALT_USB_DEV_DOEPCTL4 register. */
92959 #define ALT_USB_DEV_DOEPCTL4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL4_OFST))
92960 
92961 /*
92962  * Register : Device OUT Endpoint 4 Interrupt Register - Doepint4
92963  *
92964  * This register indicates the status of an endpoint with respect to USB- and AHB-
92965  * related events. The application must read this register when the OUT Endpoints
92966  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
92967  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
92968  * can read this register, it must first read the Device All Endpoints Interrupt
92969  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
92970  * Interrupt register. The application must clear the appropriate bit in this
92971  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
92972  *
92973  * Register Layout
92974  *
92975  * Bits | Access | Reset | Description
92976  * :--------|:-------|:------|:------------------------------------------
92977  * [0] | R | 0x0 | Transfer Completed Interrupt
92978  * [1] | R | 0x0 | Endpoint Disabled Interrupt
92979  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT4_AHBERR
92980  * [3] | R | 0x0 | SETUP Phase Done
92981  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
92982  * [5] | R | 0x0 | Status Phase Received for Control Write
92983  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
92984  * [7] | ??? | 0x0 | *UNDEFINED*
92985  * [8] | R | 0x0 | OUT Packet Error
92986  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
92987  * [10] | ??? | 0x0 | *UNDEFINED*
92988  * [11] | R | 0x0 | Packet Drop Status
92989  * [12] | R | 0x0 | BbleErr Interrupt
92990  * [13] | R | 0x0 | NAK Interrupt
92991  * [14] | R | 0x0 | NYET Interrupt
92992  * [31:15] | ??? | 0x0 | *UNDEFINED*
92993  *
92994  */
92995 /*
92996  * Field : Transfer Completed Interrupt - xfercompl
92997  *
92998  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
92999  *
93000  * This field indicates that the requested data from the internal FIFO is moved to
93001  * external system memory. This interrupt is generated only when the corresponding
93002  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
93003  * is Set.
93004  *
93005  * When Scatter/Gather DMA mode is disabled, this field indicates that the
93006  * programmed transfer is complete on the AHB as well as on the USB, for this
93007  * endpoint.
93008  *
93009  * Field Enumeration Values:
93010  *
93011  * Enum | Value | Description
93012  * :---------------------------------------|:------|:-----------------------------
93013  * ALT_USB_DEV_DOEPINT4_XFERCOMPL_E_INACT | 0x0 | No Interrupt
93014  * ALT_USB_DEV_DOEPINT4_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
93015  *
93016  * Field Access Macros:
93017  *
93018  */
93019 /*
93020  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_XFERCOMPL
93021  *
93022  * No Interrupt
93023  */
93024 #define ALT_USB_DEV_DOEPINT4_XFERCOMPL_E_INACT 0x0
93025 /*
93026  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_XFERCOMPL
93027  *
93028  * Transfer Completed Interrupt
93029  */
93030 #define ALT_USB_DEV_DOEPINT4_XFERCOMPL_E_ACT 0x1
93031 
93032 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_XFERCOMPL register field. */
93033 #define ALT_USB_DEV_DOEPINT4_XFERCOMPL_LSB 0
93034 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_XFERCOMPL register field. */
93035 #define ALT_USB_DEV_DOEPINT4_XFERCOMPL_MSB 0
93036 /* The width in bits of the ALT_USB_DEV_DOEPINT4_XFERCOMPL register field. */
93037 #define ALT_USB_DEV_DOEPINT4_XFERCOMPL_WIDTH 1
93038 /* The mask used to set the ALT_USB_DEV_DOEPINT4_XFERCOMPL register field value. */
93039 #define ALT_USB_DEV_DOEPINT4_XFERCOMPL_SET_MSK 0x00000001
93040 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_XFERCOMPL register field value. */
93041 #define ALT_USB_DEV_DOEPINT4_XFERCOMPL_CLR_MSK 0xfffffffe
93042 /* The reset value of the ALT_USB_DEV_DOEPINT4_XFERCOMPL register field. */
93043 #define ALT_USB_DEV_DOEPINT4_XFERCOMPL_RESET 0x0
93044 /* Extracts the ALT_USB_DEV_DOEPINT4_XFERCOMPL field value from a register. */
93045 #define ALT_USB_DEV_DOEPINT4_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
93046 /* Produces a ALT_USB_DEV_DOEPINT4_XFERCOMPL register field value suitable for setting the register. */
93047 #define ALT_USB_DEV_DOEPINT4_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
93048 
93049 /*
93050  * Field : Endpoint Disabled Interrupt - epdisbld
93051  *
93052  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
93053  * disabled per the application's request.
93054  *
93055  * Field Enumeration Values:
93056  *
93057  * Enum | Value | Description
93058  * :--------------------------------------|:------|:----------------------------
93059  * ALT_USB_DEV_DOEPINT4_EPDISBLD_E_INACT | 0x0 | No Interrupt
93060  * ALT_USB_DEV_DOEPINT4_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
93061  *
93062  * Field Access Macros:
93063  *
93064  */
93065 /*
93066  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_EPDISBLD
93067  *
93068  * No Interrupt
93069  */
93070 #define ALT_USB_DEV_DOEPINT4_EPDISBLD_E_INACT 0x0
93071 /*
93072  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_EPDISBLD
93073  *
93074  * Endpoint Disabled Interrupt
93075  */
93076 #define ALT_USB_DEV_DOEPINT4_EPDISBLD_E_ACT 0x1
93077 
93078 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_EPDISBLD register field. */
93079 #define ALT_USB_DEV_DOEPINT4_EPDISBLD_LSB 1
93080 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_EPDISBLD register field. */
93081 #define ALT_USB_DEV_DOEPINT4_EPDISBLD_MSB 1
93082 /* The width in bits of the ALT_USB_DEV_DOEPINT4_EPDISBLD register field. */
93083 #define ALT_USB_DEV_DOEPINT4_EPDISBLD_WIDTH 1
93084 /* The mask used to set the ALT_USB_DEV_DOEPINT4_EPDISBLD register field value. */
93085 #define ALT_USB_DEV_DOEPINT4_EPDISBLD_SET_MSK 0x00000002
93086 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_EPDISBLD register field value. */
93087 #define ALT_USB_DEV_DOEPINT4_EPDISBLD_CLR_MSK 0xfffffffd
93088 /* The reset value of the ALT_USB_DEV_DOEPINT4_EPDISBLD register field. */
93089 #define ALT_USB_DEV_DOEPINT4_EPDISBLD_RESET 0x0
93090 /* Extracts the ALT_USB_DEV_DOEPINT4_EPDISBLD field value from a register. */
93091 #define ALT_USB_DEV_DOEPINT4_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
93092 /* Produces a ALT_USB_DEV_DOEPINT4_EPDISBLD register field value suitable for setting the register. */
93093 #define ALT_USB_DEV_DOEPINT4_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
93094 
93095 /*
93096  * Field : ahberr
93097  *
93098  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
93099  * there is an AHB error during an AHB read/write. The application can read the
93100  * corresponding endpoint DMA address register to get the error address.
93101  *
93102  * Field Enumeration Values:
93103  *
93104  * Enum | Value | Description
93105  * :------------------------------------|:------|:--------------------
93106  * ALT_USB_DEV_DOEPINT4_AHBERR_E_INACT | 0x0 | No Interrupt
93107  * ALT_USB_DEV_DOEPINT4_AHBERR_E_ACT | 0x1 | AHB Error interrupt
93108  *
93109  * Field Access Macros:
93110  *
93111  */
93112 /*
93113  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_AHBERR
93114  *
93115  * No Interrupt
93116  */
93117 #define ALT_USB_DEV_DOEPINT4_AHBERR_E_INACT 0x0
93118 /*
93119  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_AHBERR
93120  *
93121  * AHB Error interrupt
93122  */
93123 #define ALT_USB_DEV_DOEPINT4_AHBERR_E_ACT 0x1
93124 
93125 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_AHBERR register field. */
93126 #define ALT_USB_DEV_DOEPINT4_AHBERR_LSB 2
93127 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_AHBERR register field. */
93128 #define ALT_USB_DEV_DOEPINT4_AHBERR_MSB 2
93129 /* The width in bits of the ALT_USB_DEV_DOEPINT4_AHBERR register field. */
93130 #define ALT_USB_DEV_DOEPINT4_AHBERR_WIDTH 1
93131 /* The mask used to set the ALT_USB_DEV_DOEPINT4_AHBERR register field value. */
93132 #define ALT_USB_DEV_DOEPINT4_AHBERR_SET_MSK 0x00000004
93133 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_AHBERR register field value. */
93134 #define ALT_USB_DEV_DOEPINT4_AHBERR_CLR_MSK 0xfffffffb
93135 /* The reset value of the ALT_USB_DEV_DOEPINT4_AHBERR register field. */
93136 #define ALT_USB_DEV_DOEPINT4_AHBERR_RESET 0x0
93137 /* Extracts the ALT_USB_DEV_DOEPINT4_AHBERR field value from a register. */
93138 #define ALT_USB_DEV_DOEPINT4_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
93139 /* Produces a ALT_USB_DEV_DOEPINT4_AHBERR register field value suitable for setting the register. */
93140 #define ALT_USB_DEV_DOEPINT4_AHBERR_SET(value) (((value) << 2) & 0x00000004)
93141 
93142 /*
93143  * Field : SETUP Phase Done - setup
93144  *
93145  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
93146  * control endpoint is complete and no more back-to-back SETUP packets were
93147  * received for the current control transfer. On this interrupt, the application
93148  * can decode the received SETUP data packet.
93149  *
93150  * Field Enumeration Values:
93151  *
93152  * Enum | Value | Description
93153  * :-----------------------------------|:------|:--------------------
93154  * ALT_USB_DEV_DOEPINT4_SETUP_E_INACT | 0x0 | No SETUP Phase Done
93155  * ALT_USB_DEV_DOEPINT4_SETUP_E_ACT | 0x1 | SETUP Phase Done
93156  *
93157  * Field Access Macros:
93158  *
93159  */
93160 /*
93161  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_SETUP
93162  *
93163  * No SETUP Phase Done
93164  */
93165 #define ALT_USB_DEV_DOEPINT4_SETUP_E_INACT 0x0
93166 /*
93167  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_SETUP
93168  *
93169  * SETUP Phase Done
93170  */
93171 #define ALT_USB_DEV_DOEPINT4_SETUP_E_ACT 0x1
93172 
93173 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_SETUP register field. */
93174 #define ALT_USB_DEV_DOEPINT4_SETUP_LSB 3
93175 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_SETUP register field. */
93176 #define ALT_USB_DEV_DOEPINT4_SETUP_MSB 3
93177 /* The width in bits of the ALT_USB_DEV_DOEPINT4_SETUP register field. */
93178 #define ALT_USB_DEV_DOEPINT4_SETUP_WIDTH 1
93179 /* The mask used to set the ALT_USB_DEV_DOEPINT4_SETUP register field value. */
93180 #define ALT_USB_DEV_DOEPINT4_SETUP_SET_MSK 0x00000008
93181 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_SETUP register field value. */
93182 #define ALT_USB_DEV_DOEPINT4_SETUP_CLR_MSK 0xfffffff7
93183 /* The reset value of the ALT_USB_DEV_DOEPINT4_SETUP register field. */
93184 #define ALT_USB_DEV_DOEPINT4_SETUP_RESET 0x0
93185 /* Extracts the ALT_USB_DEV_DOEPINT4_SETUP field value from a register. */
93186 #define ALT_USB_DEV_DOEPINT4_SETUP_GET(value) (((value) & 0x00000008) >> 3)
93187 /* Produces a ALT_USB_DEV_DOEPINT4_SETUP register field value suitable for setting the register. */
93188 #define ALT_USB_DEV_DOEPINT4_SETUP_SET(value) (((value) << 3) & 0x00000008)
93189 
93190 /*
93191  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
93192  *
93193  * Applies only to control OUT endpoints. Indicates that an OUT token was received
93194  * when the endpoint was not yet enabled. This interrupt is asserted on the
93195  * endpoint for which the OUT token was received.
93196  *
93197  * Field Enumeration Values:
93198  *
93199  * Enum | Value | Description
93200  * :-----------------------------------------|:------|:---------------------------------------------
93201  * ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
93202  * ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
93203  *
93204  * Field Access Macros:
93205  *
93206  */
93207 /*
93208  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS
93209  *
93210  * No OUT Token Received When Endpoint Disabled
93211  */
93212 #define ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS_E_INACT 0x0
93213 /*
93214  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS
93215  *
93216  * OUT Token Received When Endpoint Disabled
93217  */
93218 #define ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS_E_ACT 0x1
93219 
93220 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS register field. */
93221 #define ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS_LSB 4
93222 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS register field. */
93223 #define ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS_MSB 4
93224 /* The width in bits of the ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS register field. */
93225 #define ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS_WIDTH 1
93226 /* The mask used to set the ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS register field value. */
93227 #define ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS_SET_MSK 0x00000010
93228 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS register field value. */
93229 #define ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS_CLR_MSK 0xffffffef
93230 /* The reset value of the ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS register field. */
93231 #define ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS_RESET 0x0
93232 /* Extracts the ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS field value from a register. */
93233 #define ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
93234 /* Produces a ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS register field value suitable for setting the register. */
93235 #define ALT_USB_DEV_DOEPINT4_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
93236 
93237 /*
93238  * Field : Status Phase Received for Control Write - stsphsercvd
93239  *
93240  * This interrupt is valid only for Control OUT endpoints and only in Scatter
93241  * Gather DMA mode. This interrupt is generated only after the core has transferred
93242  * all the data that the host has sent during the data phase of a control write
93243  * transfer, to the system memory buffer. The interrupt indicates to the
93244  * application that the host has switched from data phase to the status phase of a
93245  * Control Write transfer. The application can use this interrupt to ACK or STALL
93246  * the Status phase, after it has decoded the data phase. This is applicable only
93247  * in Case of Scatter Gather DMA mode.
93248  *
93249  * Field Enumeration Values:
93250  *
93251  * Enum | Value | Description
93252  * :-----------------------------------------|:------|:-------------------------------------------
93253  * ALT_USB_DEV_DOEPINT4_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
93254  * ALT_USB_DEV_DOEPINT4_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
93255  *
93256  * Field Access Macros:
93257  *
93258  */
93259 /*
93260  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_STSPHSERCVD
93261  *
93262  * No Status Phase Received for Control Write
93263  */
93264 #define ALT_USB_DEV_DOEPINT4_STSPHSERCVD_E_INACT 0x0
93265 /*
93266  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_STSPHSERCVD
93267  *
93268  * Status Phase Received for Control Write
93269  */
93270 #define ALT_USB_DEV_DOEPINT4_STSPHSERCVD_E_ACT 0x1
93271 
93272 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_STSPHSERCVD register field. */
93273 #define ALT_USB_DEV_DOEPINT4_STSPHSERCVD_LSB 5
93274 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_STSPHSERCVD register field. */
93275 #define ALT_USB_DEV_DOEPINT4_STSPHSERCVD_MSB 5
93276 /* The width in bits of the ALT_USB_DEV_DOEPINT4_STSPHSERCVD register field. */
93277 #define ALT_USB_DEV_DOEPINT4_STSPHSERCVD_WIDTH 1
93278 /* The mask used to set the ALT_USB_DEV_DOEPINT4_STSPHSERCVD register field value. */
93279 #define ALT_USB_DEV_DOEPINT4_STSPHSERCVD_SET_MSK 0x00000020
93280 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_STSPHSERCVD register field value. */
93281 #define ALT_USB_DEV_DOEPINT4_STSPHSERCVD_CLR_MSK 0xffffffdf
93282 /* The reset value of the ALT_USB_DEV_DOEPINT4_STSPHSERCVD register field. */
93283 #define ALT_USB_DEV_DOEPINT4_STSPHSERCVD_RESET 0x0
93284 /* Extracts the ALT_USB_DEV_DOEPINT4_STSPHSERCVD field value from a register. */
93285 #define ALT_USB_DEV_DOEPINT4_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
93286 /* Produces a ALT_USB_DEV_DOEPINT4_STSPHSERCVD register field value suitable for setting the register. */
93287 #define ALT_USB_DEV_DOEPINT4_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
93288 
93289 /*
93290  * Field : Back-to-Back SETUP Packets Received - back2backsetup
93291  *
93292  * Applies to Control OUT endpoints only. This bit indicates that the core has
93293  * received more than three back-to-back SETUP packets for this particular
93294  * endpoint. for information about handling this interrupt,
93295  *
93296  * Field Enumeration Values:
93297  *
93298  * Enum | Value | Description
93299  * :--------------------------------------------|:------|:---------------------------------------
93300  * ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
93301  * ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
93302  *
93303  * Field Access Macros:
93304  *
93305  */
93306 /*
93307  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP
93308  *
93309  * No Back-to-Back SETUP Packets Received
93310  */
93311 #define ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP_E_INACT 0x0
93312 /*
93313  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP
93314  *
93315  * Back-to-Back SETUP Packets Received
93316  */
93317 #define ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP_E_ACT 0x1
93318 
93319 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP register field. */
93320 #define ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP_LSB 6
93321 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP register field. */
93322 #define ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP_MSB 6
93323 /* The width in bits of the ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP register field. */
93324 #define ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP_WIDTH 1
93325 /* The mask used to set the ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP register field value. */
93326 #define ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP_SET_MSK 0x00000040
93327 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP register field value. */
93328 #define ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP_CLR_MSK 0xffffffbf
93329 /* The reset value of the ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP register field. */
93330 #define ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP_RESET 0x0
93331 /* Extracts the ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP field value from a register. */
93332 #define ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
93333 /* Produces a ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP register field value suitable for setting the register. */
93334 #define ALT_USB_DEV_DOEPINT4_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
93335 
93336 /*
93337  * Field : OUT Packet Error - outpkterr
93338  *
93339  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
93340  * an overflow or a CRC error for non-Isochronous OUT packet.
93341  *
93342  * Field Enumeration Values:
93343  *
93344  * Enum | Value | Description
93345  * :---------------------------------------|:------|:--------------------
93346  * ALT_USB_DEV_DOEPINT4_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
93347  * ALT_USB_DEV_DOEPINT4_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
93348  *
93349  * Field Access Macros:
93350  *
93351  */
93352 /*
93353  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_OUTPKTERR
93354  *
93355  * No OUT Packet Error
93356  */
93357 #define ALT_USB_DEV_DOEPINT4_OUTPKTERR_E_INACT 0x0
93358 /*
93359  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_OUTPKTERR
93360  *
93361  * OUT Packet Error
93362  */
93363 #define ALT_USB_DEV_DOEPINT4_OUTPKTERR_E_ACT 0x1
93364 
93365 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_OUTPKTERR register field. */
93366 #define ALT_USB_DEV_DOEPINT4_OUTPKTERR_LSB 8
93367 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_OUTPKTERR register field. */
93368 #define ALT_USB_DEV_DOEPINT4_OUTPKTERR_MSB 8
93369 /* The width in bits of the ALT_USB_DEV_DOEPINT4_OUTPKTERR register field. */
93370 #define ALT_USB_DEV_DOEPINT4_OUTPKTERR_WIDTH 1
93371 /* The mask used to set the ALT_USB_DEV_DOEPINT4_OUTPKTERR register field value. */
93372 #define ALT_USB_DEV_DOEPINT4_OUTPKTERR_SET_MSK 0x00000100
93373 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_OUTPKTERR register field value. */
93374 #define ALT_USB_DEV_DOEPINT4_OUTPKTERR_CLR_MSK 0xfffffeff
93375 /* The reset value of the ALT_USB_DEV_DOEPINT4_OUTPKTERR register field. */
93376 #define ALT_USB_DEV_DOEPINT4_OUTPKTERR_RESET 0x0
93377 /* Extracts the ALT_USB_DEV_DOEPINT4_OUTPKTERR field value from a register. */
93378 #define ALT_USB_DEV_DOEPINT4_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
93379 /* Produces a ALT_USB_DEV_DOEPINT4_OUTPKTERR register field value suitable for setting the register. */
93380 #define ALT_USB_DEV_DOEPINT4_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
93381 
93382 /*
93383  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
93384  *
93385  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
93386  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
93387  * the descriptor accessed is not ready for the Core to process, such as Host busy
93388  * or DMA done
93389  *
93390  * Field Enumeration Values:
93391  *
93392  * Enum | Value | Description
93393  * :-------------------------------------|:------|:--------------
93394  * ALT_USB_DEV_DOEPINT4_BNAINTR_E_INACT | 0x0 | No interrupt
93395  * ALT_USB_DEV_DOEPINT4_BNAINTR_E_ACT | 0x1 | BNA interrupt
93396  *
93397  * Field Access Macros:
93398  *
93399  */
93400 /*
93401  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_BNAINTR
93402  *
93403  * No interrupt
93404  */
93405 #define ALT_USB_DEV_DOEPINT4_BNAINTR_E_INACT 0x0
93406 /*
93407  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_BNAINTR
93408  *
93409  * BNA interrupt
93410  */
93411 #define ALT_USB_DEV_DOEPINT4_BNAINTR_E_ACT 0x1
93412 
93413 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_BNAINTR register field. */
93414 #define ALT_USB_DEV_DOEPINT4_BNAINTR_LSB 9
93415 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_BNAINTR register field. */
93416 #define ALT_USB_DEV_DOEPINT4_BNAINTR_MSB 9
93417 /* The width in bits of the ALT_USB_DEV_DOEPINT4_BNAINTR register field. */
93418 #define ALT_USB_DEV_DOEPINT4_BNAINTR_WIDTH 1
93419 /* The mask used to set the ALT_USB_DEV_DOEPINT4_BNAINTR register field value. */
93420 #define ALT_USB_DEV_DOEPINT4_BNAINTR_SET_MSK 0x00000200
93421 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_BNAINTR register field value. */
93422 #define ALT_USB_DEV_DOEPINT4_BNAINTR_CLR_MSK 0xfffffdff
93423 /* The reset value of the ALT_USB_DEV_DOEPINT4_BNAINTR register field. */
93424 #define ALT_USB_DEV_DOEPINT4_BNAINTR_RESET 0x0
93425 /* Extracts the ALT_USB_DEV_DOEPINT4_BNAINTR field value from a register. */
93426 #define ALT_USB_DEV_DOEPINT4_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
93427 /* Produces a ALT_USB_DEV_DOEPINT4_BNAINTR register field value suitable for setting the register. */
93428 #define ALT_USB_DEV_DOEPINT4_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
93429 
93430 /*
93431  * Field : Packet Drop Status - pktdrpsts
93432  *
93433  * This bit indicates to the application that an ISOC OUT packet has been dropped.
93434  * This bit does not have an associated mask bit and does not generate an
93435  * interrupt.
93436  *
93437  * Field Enumeration Values:
93438  *
93439  * Enum | Value | Description
93440  * :---------------------------------------|:------|:-----------------------------
93441  * ALT_USB_DEV_DOEPINT4_PKTDRPSTS_E_INACT | 0x0 | No interrupt
93442  * ALT_USB_DEV_DOEPINT4_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
93443  *
93444  * Field Access Macros:
93445  *
93446  */
93447 /*
93448  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_PKTDRPSTS
93449  *
93450  * No interrupt
93451  */
93452 #define ALT_USB_DEV_DOEPINT4_PKTDRPSTS_E_INACT 0x0
93453 /*
93454  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_PKTDRPSTS
93455  *
93456  * Packet Drop Status interrupt
93457  */
93458 #define ALT_USB_DEV_DOEPINT4_PKTDRPSTS_E_ACT 0x1
93459 
93460 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_PKTDRPSTS register field. */
93461 #define ALT_USB_DEV_DOEPINT4_PKTDRPSTS_LSB 11
93462 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_PKTDRPSTS register field. */
93463 #define ALT_USB_DEV_DOEPINT4_PKTDRPSTS_MSB 11
93464 /* The width in bits of the ALT_USB_DEV_DOEPINT4_PKTDRPSTS register field. */
93465 #define ALT_USB_DEV_DOEPINT4_PKTDRPSTS_WIDTH 1
93466 /* The mask used to set the ALT_USB_DEV_DOEPINT4_PKTDRPSTS register field value. */
93467 #define ALT_USB_DEV_DOEPINT4_PKTDRPSTS_SET_MSK 0x00000800
93468 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_PKTDRPSTS register field value. */
93469 #define ALT_USB_DEV_DOEPINT4_PKTDRPSTS_CLR_MSK 0xfffff7ff
93470 /* The reset value of the ALT_USB_DEV_DOEPINT4_PKTDRPSTS register field. */
93471 #define ALT_USB_DEV_DOEPINT4_PKTDRPSTS_RESET 0x0
93472 /* Extracts the ALT_USB_DEV_DOEPINT4_PKTDRPSTS field value from a register. */
93473 #define ALT_USB_DEV_DOEPINT4_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
93474 /* Produces a ALT_USB_DEV_DOEPINT4_PKTDRPSTS register field value suitable for setting the register. */
93475 #define ALT_USB_DEV_DOEPINT4_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
93476 
93477 /*
93478  * Field : BbleErr Interrupt - bbleerr
93479  *
93480  * The core generates this interrupt when babble is received for the endpoint.
93481  *
93482  * Field Enumeration Values:
93483  *
93484  * Enum | Value | Description
93485  * :-------------------------------------|:------|:------------------
93486  * ALT_USB_DEV_DOEPINT4_BBLEERR_E_INACT | 0x0 | No interrupt
93487  * ALT_USB_DEV_DOEPINT4_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
93488  *
93489  * Field Access Macros:
93490  *
93491  */
93492 /*
93493  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_BBLEERR
93494  *
93495  * No interrupt
93496  */
93497 #define ALT_USB_DEV_DOEPINT4_BBLEERR_E_INACT 0x0
93498 /*
93499  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_BBLEERR
93500  *
93501  * BbleErr interrupt
93502  */
93503 #define ALT_USB_DEV_DOEPINT4_BBLEERR_E_ACT 0x1
93504 
93505 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_BBLEERR register field. */
93506 #define ALT_USB_DEV_DOEPINT4_BBLEERR_LSB 12
93507 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_BBLEERR register field. */
93508 #define ALT_USB_DEV_DOEPINT4_BBLEERR_MSB 12
93509 /* The width in bits of the ALT_USB_DEV_DOEPINT4_BBLEERR register field. */
93510 #define ALT_USB_DEV_DOEPINT4_BBLEERR_WIDTH 1
93511 /* The mask used to set the ALT_USB_DEV_DOEPINT4_BBLEERR register field value. */
93512 #define ALT_USB_DEV_DOEPINT4_BBLEERR_SET_MSK 0x00001000
93513 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_BBLEERR register field value. */
93514 #define ALT_USB_DEV_DOEPINT4_BBLEERR_CLR_MSK 0xffffefff
93515 /* The reset value of the ALT_USB_DEV_DOEPINT4_BBLEERR register field. */
93516 #define ALT_USB_DEV_DOEPINT4_BBLEERR_RESET 0x0
93517 /* Extracts the ALT_USB_DEV_DOEPINT4_BBLEERR field value from a register. */
93518 #define ALT_USB_DEV_DOEPINT4_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
93519 /* Produces a ALT_USB_DEV_DOEPINT4_BBLEERR register field value suitable for setting the register. */
93520 #define ALT_USB_DEV_DOEPINT4_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
93521 
93522 /*
93523  * Field : NAK Interrupt - nakintrpt
93524  *
93525  * The core generates this interrupt when a NAK is transmitted or received by the
93526  * device. In case of isochronous IN endpoints the interrupt gets generated when a
93527  * zero length packet is transmitted due to un-availability of data in the TXFifo.
93528  *
93529  * Field Enumeration Values:
93530  *
93531  * Enum | Value | Description
93532  * :---------------------------------------|:------|:--------------
93533  * ALT_USB_DEV_DOEPINT4_NAKINTRPT_E_INACT | 0x0 | No interrupt
93534  * ALT_USB_DEV_DOEPINT4_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
93535  *
93536  * Field Access Macros:
93537  *
93538  */
93539 /*
93540  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_NAKINTRPT
93541  *
93542  * No interrupt
93543  */
93544 #define ALT_USB_DEV_DOEPINT4_NAKINTRPT_E_INACT 0x0
93545 /*
93546  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_NAKINTRPT
93547  *
93548  * NAK Interrupt
93549  */
93550 #define ALT_USB_DEV_DOEPINT4_NAKINTRPT_E_ACT 0x1
93551 
93552 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_NAKINTRPT register field. */
93553 #define ALT_USB_DEV_DOEPINT4_NAKINTRPT_LSB 13
93554 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_NAKINTRPT register field. */
93555 #define ALT_USB_DEV_DOEPINT4_NAKINTRPT_MSB 13
93556 /* The width in bits of the ALT_USB_DEV_DOEPINT4_NAKINTRPT register field. */
93557 #define ALT_USB_DEV_DOEPINT4_NAKINTRPT_WIDTH 1
93558 /* The mask used to set the ALT_USB_DEV_DOEPINT4_NAKINTRPT register field value. */
93559 #define ALT_USB_DEV_DOEPINT4_NAKINTRPT_SET_MSK 0x00002000
93560 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_NAKINTRPT register field value. */
93561 #define ALT_USB_DEV_DOEPINT4_NAKINTRPT_CLR_MSK 0xffffdfff
93562 /* The reset value of the ALT_USB_DEV_DOEPINT4_NAKINTRPT register field. */
93563 #define ALT_USB_DEV_DOEPINT4_NAKINTRPT_RESET 0x0
93564 /* Extracts the ALT_USB_DEV_DOEPINT4_NAKINTRPT field value from a register. */
93565 #define ALT_USB_DEV_DOEPINT4_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
93566 /* Produces a ALT_USB_DEV_DOEPINT4_NAKINTRPT register field value suitable for setting the register. */
93567 #define ALT_USB_DEV_DOEPINT4_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
93568 
93569 /*
93570  * Field : NYET Interrupt - nyetintrpt
93571  *
93572  * The core generates this interrupt when a NYET response is transmitted for a non
93573  * isochronous OUT endpoint.
93574  *
93575  * Field Enumeration Values:
93576  *
93577  * Enum | Value | Description
93578  * :----------------------------------------|:------|:---------------
93579  * ALT_USB_DEV_DOEPINT4_NYETINTRPT_E_INACT | 0x0 | No interrupt
93580  * ALT_USB_DEV_DOEPINT4_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
93581  *
93582  * Field Access Macros:
93583  *
93584  */
93585 /*
93586  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_NYETINTRPT
93587  *
93588  * No interrupt
93589  */
93590 #define ALT_USB_DEV_DOEPINT4_NYETINTRPT_E_INACT 0x0
93591 /*
93592  * Enumerated value for register field ALT_USB_DEV_DOEPINT4_NYETINTRPT
93593  *
93594  * NYET Interrupt
93595  */
93596 #define ALT_USB_DEV_DOEPINT4_NYETINTRPT_E_ACT 0x1
93597 
93598 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT4_NYETINTRPT register field. */
93599 #define ALT_USB_DEV_DOEPINT4_NYETINTRPT_LSB 14
93600 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT4_NYETINTRPT register field. */
93601 #define ALT_USB_DEV_DOEPINT4_NYETINTRPT_MSB 14
93602 /* The width in bits of the ALT_USB_DEV_DOEPINT4_NYETINTRPT register field. */
93603 #define ALT_USB_DEV_DOEPINT4_NYETINTRPT_WIDTH 1
93604 /* The mask used to set the ALT_USB_DEV_DOEPINT4_NYETINTRPT register field value. */
93605 #define ALT_USB_DEV_DOEPINT4_NYETINTRPT_SET_MSK 0x00004000
93606 /* The mask used to clear the ALT_USB_DEV_DOEPINT4_NYETINTRPT register field value. */
93607 #define ALT_USB_DEV_DOEPINT4_NYETINTRPT_CLR_MSK 0xffffbfff
93608 /* The reset value of the ALT_USB_DEV_DOEPINT4_NYETINTRPT register field. */
93609 #define ALT_USB_DEV_DOEPINT4_NYETINTRPT_RESET 0x0
93610 /* Extracts the ALT_USB_DEV_DOEPINT4_NYETINTRPT field value from a register. */
93611 #define ALT_USB_DEV_DOEPINT4_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
93612 /* Produces a ALT_USB_DEV_DOEPINT4_NYETINTRPT register field value suitable for setting the register. */
93613 #define ALT_USB_DEV_DOEPINT4_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
93614 
93615 #ifndef __ASSEMBLY__
93616 /*
93617  * WARNING: The C register and register group struct declarations are provided for
93618  * convenience and illustrative purposes. They should, however, be used with
93619  * caution as the C language standard provides no guarantees about the alignment or
93620  * atomicity of device memory accesses. The recommended practice for writing
93621  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
93622  * alt_write_word() functions.
93623  *
93624  * The struct declaration for register ALT_USB_DEV_DOEPINT4.
93625  */
93626 struct ALT_USB_DEV_DOEPINT4_s
93627 {
93628  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
93629  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
93630  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT4_AHBERR */
93631  const uint32_t setup : 1; /* SETUP Phase Done */
93632  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
93633  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
93634  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
93635  uint32_t : 1; /* *UNDEFINED* */
93636  const uint32_t outpkterr : 1; /* OUT Packet Error */
93637  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
93638  uint32_t : 1; /* *UNDEFINED* */
93639  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
93640  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
93641  const uint32_t nakintrpt : 1; /* NAK Interrupt */
93642  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
93643  uint32_t : 17; /* *UNDEFINED* */
93644 };
93645 
93646 /* The typedef declaration for register ALT_USB_DEV_DOEPINT4. */
93647 typedef volatile struct ALT_USB_DEV_DOEPINT4_s ALT_USB_DEV_DOEPINT4_t;
93648 #endif /* __ASSEMBLY__ */
93649 
93650 /* The byte offset of the ALT_USB_DEV_DOEPINT4 register from the beginning of the component. */
93651 #define ALT_USB_DEV_DOEPINT4_OFST 0x388
93652 /* The address of the ALT_USB_DEV_DOEPINT4 register. */
93653 #define ALT_USB_DEV_DOEPINT4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT4_OFST))
93654 
93655 /*
93656  * Register : Device OUT Endpoint 4 Transfer Size Register - doeptsiz4
93657  *
93658  * The application must modify this register before enabling the endpoint. Once the
93659  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
93660  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
93661  * application can only read this register once the core has cleared the Endpoint
93662  * Enable bit.
93663  *
93664  * Register Layout
93665  *
93666  * Bits | Access | Reset | Description
93667  * :--------|:-------|:------|:-------------------
93668  * [18:0] | RW | 0x0 | Transfer Size
93669  * [28:19] | RW | 0x0 | Packet Count
93670  * [30:29] | R | 0x0 | SETUP Packet Count
93671  * [31] | ??? | 0x0 | *UNDEFINED*
93672  *
93673  */
93674 /*
93675  * Field : Transfer Size - xfersize
93676  *
93677  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
93678  * application only after it has exhausted the transfer size amount of data. The
93679  * transfer size can be Set to the maximum packet size of the endpoint, to be
93680  * interrupted at the end of each packet. The core decrements this field every time
93681  * a packet from the external memory is written to the RxFIFO.
93682  *
93683  * Field Access Macros:
93684  *
93685  */
93686 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ4_XFERSIZE register field. */
93687 #define ALT_USB_DEV_DOEPTSIZ4_XFERSIZE_LSB 0
93688 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ4_XFERSIZE register field. */
93689 #define ALT_USB_DEV_DOEPTSIZ4_XFERSIZE_MSB 18
93690 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ4_XFERSIZE register field. */
93691 #define ALT_USB_DEV_DOEPTSIZ4_XFERSIZE_WIDTH 19
93692 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ4_XFERSIZE register field value. */
93693 #define ALT_USB_DEV_DOEPTSIZ4_XFERSIZE_SET_MSK 0x0007ffff
93694 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ4_XFERSIZE register field value. */
93695 #define ALT_USB_DEV_DOEPTSIZ4_XFERSIZE_CLR_MSK 0xfff80000
93696 /* The reset value of the ALT_USB_DEV_DOEPTSIZ4_XFERSIZE register field. */
93697 #define ALT_USB_DEV_DOEPTSIZ4_XFERSIZE_RESET 0x0
93698 /* Extracts the ALT_USB_DEV_DOEPTSIZ4_XFERSIZE field value from a register. */
93699 #define ALT_USB_DEV_DOEPTSIZ4_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
93700 /* Produces a ALT_USB_DEV_DOEPTSIZ4_XFERSIZE register field value suitable for setting the register. */
93701 #define ALT_USB_DEV_DOEPTSIZ4_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
93702 
93703 /*
93704  * Field : Packet Count - pktcnt
93705  *
93706  * Indicates the total number of USB packets that constitute the Transfer Size
93707  * amount of data for endpoint 0.This field is decremented every time a packet
93708  * (maximum size or short packet) is read from the RxFIFO.
93709  *
93710  * Field Access Macros:
93711  *
93712  */
93713 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ4_PKTCNT register field. */
93714 #define ALT_USB_DEV_DOEPTSIZ4_PKTCNT_LSB 19
93715 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ4_PKTCNT register field. */
93716 #define ALT_USB_DEV_DOEPTSIZ4_PKTCNT_MSB 28
93717 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ4_PKTCNT register field. */
93718 #define ALT_USB_DEV_DOEPTSIZ4_PKTCNT_WIDTH 10
93719 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ4_PKTCNT register field value. */
93720 #define ALT_USB_DEV_DOEPTSIZ4_PKTCNT_SET_MSK 0x1ff80000
93721 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ4_PKTCNT register field value. */
93722 #define ALT_USB_DEV_DOEPTSIZ4_PKTCNT_CLR_MSK 0xe007ffff
93723 /* The reset value of the ALT_USB_DEV_DOEPTSIZ4_PKTCNT register field. */
93724 #define ALT_USB_DEV_DOEPTSIZ4_PKTCNT_RESET 0x0
93725 /* Extracts the ALT_USB_DEV_DOEPTSIZ4_PKTCNT field value from a register. */
93726 #define ALT_USB_DEV_DOEPTSIZ4_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
93727 /* Produces a ALT_USB_DEV_DOEPTSIZ4_PKTCNT register field value suitable for setting the register. */
93728 #define ALT_USB_DEV_DOEPTSIZ4_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
93729 
93730 /*
93731  * Field : SETUP Packet Count - rxdpid
93732  *
93733  * Applies to isochronous OUT endpoints only.This is the data PID received in the
93734  * last packet for this endpoint. Use datax.
93735  *
93736  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
93737  * number of back-to-back SETUP data packets the endpoint can receive.
93738  *
93739  * Field Enumeration Values:
93740  *
93741  * Enum | Value | Description
93742  * :-----------------------------------------|:------|:-------------------
93743  * ALT_USB_DEV_DOEPTSIZ4_RXDPID_E_DATA0 | 0x0 | DATA0
93744  * ALT_USB_DEV_DOEPTSIZ4_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
93745  * ALT_USB_DEV_DOEPTSIZ4_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
93746  * ALT_USB_DEV_DOEPTSIZ4_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
93747  *
93748  * Field Access Macros:
93749  *
93750  */
93751 /*
93752  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ4_RXDPID
93753  *
93754  * DATA0
93755  */
93756 #define ALT_USB_DEV_DOEPTSIZ4_RXDPID_E_DATA0 0x0
93757 /*
93758  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ4_RXDPID
93759  *
93760  * DATA2 or 1 packet
93761  */
93762 #define ALT_USB_DEV_DOEPTSIZ4_RXDPID_E_DATA2PKT1 0x1
93763 /*
93764  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ4_RXDPID
93765  *
93766  * DATA1 or 2 packets
93767  */
93768 #define ALT_USB_DEV_DOEPTSIZ4_RXDPID_E_DATA1PKT2 0x2
93769 /*
93770  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ4_RXDPID
93771  *
93772  * MDATA or 3 packets
93773  */
93774 #define ALT_USB_DEV_DOEPTSIZ4_RXDPID_E_MDATAPKT3 0x3
93775 
93776 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ4_RXDPID register field. */
93777 #define ALT_USB_DEV_DOEPTSIZ4_RXDPID_LSB 29
93778 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ4_RXDPID register field. */
93779 #define ALT_USB_DEV_DOEPTSIZ4_RXDPID_MSB 30
93780 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ4_RXDPID register field. */
93781 #define ALT_USB_DEV_DOEPTSIZ4_RXDPID_WIDTH 2
93782 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ4_RXDPID register field value. */
93783 #define ALT_USB_DEV_DOEPTSIZ4_RXDPID_SET_MSK 0x60000000
93784 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ4_RXDPID register field value. */
93785 #define ALT_USB_DEV_DOEPTSIZ4_RXDPID_CLR_MSK 0x9fffffff
93786 /* The reset value of the ALT_USB_DEV_DOEPTSIZ4_RXDPID register field. */
93787 #define ALT_USB_DEV_DOEPTSIZ4_RXDPID_RESET 0x0
93788 /* Extracts the ALT_USB_DEV_DOEPTSIZ4_RXDPID field value from a register. */
93789 #define ALT_USB_DEV_DOEPTSIZ4_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
93790 /* Produces a ALT_USB_DEV_DOEPTSIZ4_RXDPID register field value suitable for setting the register. */
93791 #define ALT_USB_DEV_DOEPTSIZ4_RXDPID_SET(value) (((value) << 29) & 0x60000000)
93792 
93793 #ifndef __ASSEMBLY__
93794 /*
93795  * WARNING: The C register and register group struct declarations are provided for
93796  * convenience and illustrative purposes. They should, however, be used with
93797  * caution as the C language standard provides no guarantees about the alignment or
93798  * atomicity of device memory accesses. The recommended practice for writing
93799  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
93800  * alt_write_word() functions.
93801  *
93802  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ4.
93803  */
93804 struct ALT_USB_DEV_DOEPTSIZ4_s
93805 {
93806  uint32_t xfersize : 19; /* Transfer Size */
93807  uint32_t pktcnt : 10; /* Packet Count */
93808  const uint32_t rxdpid : 2; /* SETUP Packet Count */
93809  uint32_t : 1; /* *UNDEFINED* */
93810 };
93811 
93812 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ4. */
93813 typedef volatile struct ALT_USB_DEV_DOEPTSIZ4_s ALT_USB_DEV_DOEPTSIZ4_t;
93814 #endif /* __ASSEMBLY__ */
93815 
93816 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ4 register from the beginning of the component. */
93817 #define ALT_USB_DEV_DOEPTSIZ4_OFST 0x390
93818 /* The address of the ALT_USB_DEV_DOEPTSIZ4 register. */
93819 #define ALT_USB_DEV_DOEPTSIZ4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ4_OFST))
93820 
93821 /*
93822  * Register : Device OUT Endpoint 4 DMA Address Register - doepdma4
93823  *
93824  * DMA OUT Address.
93825  *
93826  * Register Layout
93827  *
93828  * Bits | Access | Reset | Description
93829  * :-------|:-------|:--------|:------------
93830  * [31:0] | RW | Unknown | DMA Address
93831  *
93832  */
93833 /*
93834  * Field : DMA Address - doepdma4
93835  *
93836  * Holds the start address of the external memory for storing or fetching endpoint
93837  * data. for control endpoints, this field stores control OUT data packets as well
93838  * as SETUP transaction data packets. When more than three SETUP packets are
93839  * received back-to-back, the SETUP data packet in the memory is overwritten. This
93840  * register is incremented on every AHB transaction. The application can give only
93841  * a DWORD-aligned address.
93842  *
93843  * When Scatter/Gather DMA mode is not enabled, the application programs the start
93844  * address value in this field.
93845  *
93846  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
93847  * for the descriptor list.
93848  *
93849  * Field Access Macros:
93850  *
93851  */
93852 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA4_DOEPDMA4 register field. */
93853 #define ALT_USB_DEV_DOEPDMA4_DOEPDMA4_LSB 0
93854 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA4_DOEPDMA4 register field. */
93855 #define ALT_USB_DEV_DOEPDMA4_DOEPDMA4_MSB 31
93856 /* The width in bits of the ALT_USB_DEV_DOEPDMA4_DOEPDMA4 register field. */
93857 #define ALT_USB_DEV_DOEPDMA4_DOEPDMA4_WIDTH 32
93858 /* The mask used to set the ALT_USB_DEV_DOEPDMA4_DOEPDMA4 register field value. */
93859 #define ALT_USB_DEV_DOEPDMA4_DOEPDMA4_SET_MSK 0xffffffff
93860 /* The mask used to clear the ALT_USB_DEV_DOEPDMA4_DOEPDMA4 register field value. */
93861 #define ALT_USB_DEV_DOEPDMA4_DOEPDMA4_CLR_MSK 0x00000000
93862 /* The reset value of the ALT_USB_DEV_DOEPDMA4_DOEPDMA4 register field is UNKNOWN. */
93863 #define ALT_USB_DEV_DOEPDMA4_DOEPDMA4_RESET 0x0
93864 /* Extracts the ALT_USB_DEV_DOEPDMA4_DOEPDMA4 field value from a register. */
93865 #define ALT_USB_DEV_DOEPDMA4_DOEPDMA4_GET(value) (((value) & 0xffffffff) >> 0)
93866 /* Produces a ALT_USB_DEV_DOEPDMA4_DOEPDMA4 register field value suitable for setting the register. */
93867 #define ALT_USB_DEV_DOEPDMA4_DOEPDMA4_SET(value) (((value) << 0) & 0xffffffff)
93868 
93869 #ifndef __ASSEMBLY__
93870 /*
93871  * WARNING: The C register and register group struct declarations are provided for
93872  * convenience and illustrative purposes. They should, however, be used with
93873  * caution as the C language standard provides no guarantees about the alignment or
93874  * atomicity of device memory accesses. The recommended practice for writing
93875  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
93876  * alt_write_word() functions.
93877  *
93878  * The struct declaration for register ALT_USB_DEV_DOEPDMA4.
93879  */
93880 struct ALT_USB_DEV_DOEPDMA4_s
93881 {
93882  uint32_t doepdma4 : 32; /* DMA Address */
93883 };
93884 
93885 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA4. */
93886 typedef volatile struct ALT_USB_DEV_DOEPDMA4_s ALT_USB_DEV_DOEPDMA4_t;
93887 #endif /* __ASSEMBLY__ */
93888 
93889 /* The byte offset of the ALT_USB_DEV_DOEPDMA4 register from the beginning of the component. */
93890 #define ALT_USB_DEV_DOEPDMA4_OFST 0x394
93891 /* The address of the ALT_USB_DEV_DOEPDMA4 register. */
93892 #define ALT_USB_DEV_DOEPDMA4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA4_OFST))
93893 
93894 /*
93895  * Register : Device OUT Endpoint 4 Buffer Address Register - doepdmab4
93896  *
93897  * DMA Buffer Address.
93898  *
93899  * Register Layout
93900  *
93901  * Bits | Access | Reset | Description
93902  * :-------|:-------|:--------|:-------------------
93903  * [31:0] | R | Unknown | DMA Buffer Address
93904  *
93905  */
93906 /*
93907  * Field : DMA Buffer Address - doepdmab4
93908  *
93909  * Holds the current buffer address. This register is updated as and when the data
93910  * transfer for the corresponding end point is in progress. This register is
93911  * present only in Scatter/Gather DMA mode.
93912  *
93913  * Field Access Macros:
93914  *
93915  */
93916 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4 register field. */
93917 #define ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4_LSB 0
93918 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4 register field. */
93919 #define ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4_MSB 31
93920 /* The width in bits of the ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4 register field. */
93921 #define ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4_WIDTH 32
93922 /* The mask used to set the ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4 register field value. */
93923 #define ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4_SET_MSK 0xffffffff
93924 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4 register field value. */
93925 #define ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4_CLR_MSK 0x00000000
93926 /* The reset value of the ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4 register field is UNKNOWN. */
93927 #define ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4_RESET 0x0
93928 /* Extracts the ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4 field value from a register. */
93929 #define ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4_GET(value) (((value) & 0xffffffff) >> 0)
93930 /* Produces a ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4 register field value suitable for setting the register. */
93931 #define ALT_USB_DEV_DOEPDMAB4_DOEPDMAB4_SET(value) (((value) << 0) & 0xffffffff)
93932 
93933 #ifndef __ASSEMBLY__
93934 /*
93935  * WARNING: The C register and register group struct declarations are provided for
93936  * convenience and illustrative purposes. They should, however, be used with
93937  * caution as the C language standard provides no guarantees about the alignment or
93938  * atomicity of device memory accesses. The recommended practice for writing
93939  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
93940  * alt_write_word() functions.
93941  *
93942  * The struct declaration for register ALT_USB_DEV_DOEPDMAB4.
93943  */
93944 struct ALT_USB_DEV_DOEPDMAB4_s
93945 {
93946  const uint32_t doepdmab4 : 32; /* DMA Buffer Address */
93947 };
93948 
93949 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB4. */
93950 typedef volatile struct ALT_USB_DEV_DOEPDMAB4_s ALT_USB_DEV_DOEPDMAB4_t;
93951 #endif /* __ASSEMBLY__ */
93952 
93953 /* The byte offset of the ALT_USB_DEV_DOEPDMAB4 register from the beginning of the component. */
93954 #define ALT_USB_DEV_DOEPDMAB4_OFST 0x39c
93955 /* The address of the ALT_USB_DEV_DOEPDMAB4 register. */
93956 #define ALT_USB_DEV_DOEPDMAB4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB4_OFST))
93957 
93958 /*
93959  * Register : Device Control OUT Endpoint 5 Control Register - doepctl5
93960  *
93961  * Out Endpoint 5.
93962  *
93963  * Register Layout
93964  *
93965  * Bits | Access | Reset | Description
93966  * :--------|:-------|:------|:--------------------
93967  * [10:0] | RW | 0x0 | Maximum Packet Size
93968  * [14:11] | ??? | 0x0 | *UNDEFINED*
93969  * [15] | RW | 0x0 | USB Active Endpoint
93970  * [16] | R | 0x0 | Endpoint Data PID
93971  * [17] | R | 0x0 | NAK Status
93972  * [19:18] | RW | 0x0 | Endpoint Type
93973  * [20] | RW | 0x0 | Snoop Mode
93974  * [21] | R | 0x0 | STALL Handshake
93975  * [25:22] | ??? | 0x0 | *UNDEFINED*
93976  * [26] | W | 0x0 | Clear NAK
93977  * [27] | W | 0x0 | Set NAK
93978  * [28] | W | 0x0 | Set DATA0 PID
93979  * [29] | W | 0x0 | Set DATA1 PID
93980  * [30] | R | 0x0 | Endpoint Disable
93981  * [31] | R | 0x0 | Endpoint Enable
93982  *
93983  */
93984 /*
93985  * Field : Maximum Packet Size - mps
93986  *
93987  * Applies to IN and OUT endpoints. The application must program this field with
93988  * the maximum packet size for the current logical endpoint. This value is in
93989  * bytes.
93990  *
93991  * Field Access Macros:
93992  *
93993  */
93994 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_MPS register field. */
93995 #define ALT_USB_DEV_DOEPCTL5_MPS_LSB 0
93996 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_MPS register field. */
93997 #define ALT_USB_DEV_DOEPCTL5_MPS_MSB 10
93998 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_MPS register field. */
93999 #define ALT_USB_DEV_DOEPCTL5_MPS_WIDTH 11
94000 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_MPS register field value. */
94001 #define ALT_USB_DEV_DOEPCTL5_MPS_SET_MSK 0x000007ff
94002 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_MPS register field value. */
94003 #define ALT_USB_DEV_DOEPCTL5_MPS_CLR_MSK 0xfffff800
94004 /* The reset value of the ALT_USB_DEV_DOEPCTL5_MPS register field. */
94005 #define ALT_USB_DEV_DOEPCTL5_MPS_RESET 0x0
94006 /* Extracts the ALT_USB_DEV_DOEPCTL5_MPS field value from a register. */
94007 #define ALT_USB_DEV_DOEPCTL5_MPS_GET(value) (((value) & 0x000007ff) >> 0)
94008 /* Produces a ALT_USB_DEV_DOEPCTL5_MPS register field value suitable for setting the register. */
94009 #define ALT_USB_DEV_DOEPCTL5_MPS_SET(value) (((value) << 0) & 0x000007ff)
94010 
94011 /*
94012  * Field : USB Active Endpoint - usbactep
94013  *
94014  * Indicates whether this endpoint is active in the current configuration and
94015  * interface. The core clears this bit for all endpoints (other than EP 0) after
94016  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
94017  * commands, the application must program endpoint registers accordingly and set
94018  * this bit.
94019  *
94020  * Field Enumeration Values:
94021  *
94022  * Enum | Value | Description
94023  * :-------------------------------------|:------|:--------------------
94024  * ALT_USB_DEV_DOEPCTL5_USBACTEP_E_DISD | 0x0 | Not Active
94025  * ALT_USB_DEV_DOEPCTL5_USBACTEP_E_END | 0x1 | USB Active Endpoint
94026  *
94027  * Field Access Macros:
94028  *
94029  */
94030 /*
94031  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_USBACTEP
94032  *
94033  * Not Active
94034  */
94035 #define ALT_USB_DEV_DOEPCTL5_USBACTEP_E_DISD 0x0
94036 /*
94037  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_USBACTEP
94038  *
94039  * USB Active Endpoint
94040  */
94041 #define ALT_USB_DEV_DOEPCTL5_USBACTEP_E_END 0x1
94042 
94043 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_USBACTEP register field. */
94044 #define ALT_USB_DEV_DOEPCTL5_USBACTEP_LSB 15
94045 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_USBACTEP register field. */
94046 #define ALT_USB_DEV_DOEPCTL5_USBACTEP_MSB 15
94047 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_USBACTEP register field. */
94048 #define ALT_USB_DEV_DOEPCTL5_USBACTEP_WIDTH 1
94049 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_USBACTEP register field value. */
94050 #define ALT_USB_DEV_DOEPCTL5_USBACTEP_SET_MSK 0x00008000
94051 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_USBACTEP register field value. */
94052 #define ALT_USB_DEV_DOEPCTL5_USBACTEP_CLR_MSK 0xffff7fff
94053 /* The reset value of the ALT_USB_DEV_DOEPCTL5_USBACTEP register field. */
94054 #define ALT_USB_DEV_DOEPCTL5_USBACTEP_RESET 0x0
94055 /* Extracts the ALT_USB_DEV_DOEPCTL5_USBACTEP field value from a register. */
94056 #define ALT_USB_DEV_DOEPCTL5_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
94057 /* Produces a ALT_USB_DEV_DOEPCTL5_USBACTEP register field value suitable for setting the register. */
94058 #define ALT_USB_DEV_DOEPCTL5_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
94059 
94060 /*
94061  * Field : Endpoint Data PID - dpid
94062  *
94063  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
94064  * packet to be received or transmitted on this endpoint. The application must
94065  * program the PID of the first packet to be received or transmitted on this
94066  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
94067  * SetD0PID fields of this register to program either DATA0 or DATA1 PID.
94068  *
94069  * 0: DATA0 1: DATA1This field is applicable both for Scatter/Gather DMA mode and
94070  * non-Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-
94071  * Scatter/Gather DMA mode:
94072  *
94073  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
94074  * number in which the core transmits/receives isochronous data for this endpoint.
94075  * The application must program the even/odd (micro) frame number in which it
94076  * intends to transmit/receive isochronous data for this endpoint using the
94077  * SetEvnFr and SetOddFr fields in this register.
94078  *
94079  * 0: Even (micro)frame
94080  *
94081  * 1: Odd (micro)frame
94082  *
94083  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
94084  * number in which to send data is provided in the transmit descriptor structure.
94085  * The frame in which data is received is updated in receive descriptor structure.
94086  *
94087  * Field Enumeration Values:
94088  *
94089  * Enum | Value | Description
94090  * :----------------------------------|:------|:-----------------------------
94091  * ALT_USB_DEV_DOEPCTL5_DPID_E_INACT | 0x0 | Endpoint Data PID not active
94092  * ALT_USB_DEV_DOEPCTL5_DPID_E_ACT | 0x1 | Endpoint Data PID active
94093  *
94094  * Field Access Macros:
94095  *
94096  */
94097 /*
94098  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_DPID
94099  *
94100  * Endpoint Data PID not active
94101  */
94102 #define ALT_USB_DEV_DOEPCTL5_DPID_E_INACT 0x0
94103 /*
94104  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_DPID
94105  *
94106  * Endpoint Data PID active
94107  */
94108 #define ALT_USB_DEV_DOEPCTL5_DPID_E_ACT 0x1
94109 
94110 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_DPID register field. */
94111 #define ALT_USB_DEV_DOEPCTL5_DPID_LSB 16
94112 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_DPID register field. */
94113 #define ALT_USB_DEV_DOEPCTL5_DPID_MSB 16
94114 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_DPID register field. */
94115 #define ALT_USB_DEV_DOEPCTL5_DPID_WIDTH 1
94116 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_DPID register field value. */
94117 #define ALT_USB_DEV_DOEPCTL5_DPID_SET_MSK 0x00010000
94118 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_DPID register field value. */
94119 #define ALT_USB_DEV_DOEPCTL5_DPID_CLR_MSK 0xfffeffff
94120 /* The reset value of the ALT_USB_DEV_DOEPCTL5_DPID register field. */
94121 #define ALT_USB_DEV_DOEPCTL5_DPID_RESET 0x0
94122 /* Extracts the ALT_USB_DEV_DOEPCTL5_DPID field value from a register. */
94123 #define ALT_USB_DEV_DOEPCTL5_DPID_GET(value) (((value) & 0x00010000) >> 16)
94124 /* Produces a ALT_USB_DEV_DOEPCTL5_DPID register field value suitable for setting the register. */
94125 #define ALT_USB_DEV_DOEPCTL5_DPID_SET(value) (((value) << 16) & 0x00010000)
94126 
94127 /*
94128  * Field : NAK Status - naksts
94129  *
94130  * When either the application or the core sets this bit:
94131  *
94132  * * The core stops receiving any data on an OUT endpoint, even if there is space
94133  * in the RxFIFO to accommodate the incoming packet.
94134  *
94135  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
94136  * IN endpoint, even if there data is available in the TxFIFO.
94137  *
94138  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
94139  * even if there data is available in the TxFIFO.
94140  *
94141  * Irrespective of this bit's setting, the core always responds to SETUP data
94142  * packets with an ACK handshake.
94143  *
94144  * Field Enumeration Values:
94145  *
94146  * Enum | Value | Description
94147  * :-------------------------------------|:------|:------------------------------------------------
94148  * ALT_USB_DEV_DOEPCTL5_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
94149  * : | | based on the FIFO status
94150  * ALT_USB_DEV_DOEPCTL5_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
94151  * : | | endpoint
94152  *
94153  * Field Access Macros:
94154  *
94155  */
94156 /*
94157  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_NAKSTS
94158  *
94159  * The core is transmitting non-NAK handshakes based on the FIFO status
94160  */
94161 #define ALT_USB_DEV_DOEPCTL5_NAKSTS_E_NONNAK 0x0
94162 /*
94163  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_NAKSTS
94164  *
94165  * The core is transmitting NAK handshakes on this endpoint
94166  */
94167 #define ALT_USB_DEV_DOEPCTL5_NAKSTS_E_NAK 0x1
94168 
94169 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_NAKSTS register field. */
94170 #define ALT_USB_DEV_DOEPCTL5_NAKSTS_LSB 17
94171 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_NAKSTS register field. */
94172 #define ALT_USB_DEV_DOEPCTL5_NAKSTS_MSB 17
94173 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_NAKSTS register field. */
94174 #define ALT_USB_DEV_DOEPCTL5_NAKSTS_WIDTH 1
94175 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_NAKSTS register field value. */
94176 #define ALT_USB_DEV_DOEPCTL5_NAKSTS_SET_MSK 0x00020000
94177 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_NAKSTS register field value. */
94178 #define ALT_USB_DEV_DOEPCTL5_NAKSTS_CLR_MSK 0xfffdffff
94179 /* The reset value of the ALT_USB_DEV_DOEPCTL5_NAKSTS register field. */
94180 #define ALT_USB_DEV_DOEPCTL5_NAKSTS_RESET 0x0
94181 /* Extracts the ALT_USB_DEV_DOEPCTL5_NAKSTS field value from a register. */
94182 #define ALT_USB_DEV_DOEPCTL5_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
94183 /* Produces a ALT_USB_DEV_DOEPCTL5_NAKSTS register field value suitable for setting the register. */
94184 #define ALT_USB_DEV_DOEPCTL5_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
94185 
94186 /*
94187  * Field : Endpoint Type - eptype
94188  *
94189  * This is the transfer type supported by this logical endpoint.
94190  *
94191  * Field Enumeration Values:
94192  *
94193  * Enum | Value | Description
94194  * :------------------------------------------|:------|:------------
94195  * ALT_USB_DEV_DOEPCTL5_EPTYPE_E_CTL | 0x0 | Control
94196  * ALT_USB_DEV_DOEPCTL5_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
94197  * ALT_USB_DEV_DOEPCTL5_EPTYPE_E_BULK | 0x2 | Bulk
94198  * ALT_USB_DEV_DOEPCTL5_EPTYPE_E_INTERRUP | 0x3 | Interrupt
94199  *
94200  * Field Access Macros:
94201  *
94202  */
94203 /*
94204  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_EPTYPE
94205  *
94206  * Control
94207  */
94208 #define ALT_USB_DEV_DOEPCTL5_EPTYPE_E_CTL 0x0
94209 /*
94210  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_EPTYPE
94211  *
94212  * Isochronous
94213  */
94214 #define ALT_USB_DEV_DOEPCTL5_EPTYPE_E_ISOCHRONOUS 0x1
94215 /*
94216  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_EPTYPE
94217  *
94218  * Bulk
94219  */
94220 #define ALT_USB_DEV_DOEPCTL5_EPTYPE_E_BULK 0x2
94221 /*
94222  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_EPTYPE
94223  *
94224  * Interrupt
94225  */
94226 #define ALT_USB_DEV_DOEPCTL5_EPTYPE_E_INTERRUP 0x3
94227 
94228 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_EPTYPE register field. */
94229 #define ALT_USB_DEV_DOEPCTL5_EPTYPE_LSB 18
94230 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_EPTYPE register field. */
94231 #define ALT_USB_DEV_DOEPCTL5_EPTYPE_MSB 19
94232 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_EPTYPE register field. */
94233 #define ALT_USB_DEV_DOEPCTL5_EPTYPE_WIDTH 2
94234 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_EPTYPE register field value. */
94235 #define ALT_USB_DEV_DOEPCTL5_EPTYPE_SET_MSK 0x000c0000
94236 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_EPTYPE register field value. */
94237 #define ALT_USB_DEV_DOEPCTL5_EPTYPE_CLR_MSK 0xfff3ffff
94238 /* The reset value of the ALT_USB_DEV_DOEPCTL5_EPTYPE register field. */
94239 #define ALT_USB_DEV_DOEPCTL5_EPTYPE_RESET 0x0
94240 /* Extracts the ALT_USB_DEV_DOEPCTL5_EPTYPE field value from a register. */
94241 #define ALT_USB_DEV_DOEPCTL5_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
94242 /* Produces a ALT_USB_DEV_DOEPCTL5_EPTYPE register field value suitable for setting the register. */
94243 #define ALT_USB_DEV_DOEPCTL5_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
94244 
94245 /*
94246  * Field : Snoop Mode - snp
94247  *
94248  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
94249  * In Snoop mode, the core does not check the correctness of OUT packets before
94250  * transferring them to application memory.
94251  *
94252  * Field Enumeration Values:
94253  *
94254  * Enum | Value | Description
94255  * :-------------------------------|:------|:-------------------
94256  * ALT_USB_DEV_DOEPCTL5_SNP_E_DIS | 0x0 | Disable Snoop Mode
94257  * ALT_USB_DEV_DOEPCTL5_SNP_E_EN | 0x1 | Enable Snoop Mode
94258  *
94259  * Field Access Macros:
94260  *
94261  */
94262 /*
94263  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_SNP
94264  *
94265  * Disable Snoop Mode
94266  */
94267 #define ALT_USB_DEV_DOEPCTL5_SNP_E_DIS 0x0
94268 /*
94269  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_SNP
94270  *
94271  * Enable Snoop Mode
94272  */
94273 #define ALT_USB_DEV_DOEPCTL5_SNP_E_EN 0x1
94274 
94275 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_SNP register field. */
94276 #define ALT_USB_DEV_DOEPCTL5_SNP_LSB 20
94277 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_SNP register field. */
94278 #define ALT_USB_DEV_DOEPCTL5_SNP_MSB 20
94279 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_SNP register field. */
94280 #define ALT_USB_DEV_DOEPCTL5_SNP_WIDTH 1
94281 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_SNP register field value. */
94282 #define ALT_USB_DEV_DOEPCTL5_SNP_SET_MSK 0x00100000
94283 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_SNP register field value. */
94284 #define ALT_USB_DEV_DOEPCTL5_SNP_CLR_MSK 0xffefffff
94285 /* The reset value of the ALT_USB_DEV_DOEPCTL5_SNP register field. */
94286 #define ALT_USB_DEV_DOEPCTL5_SNP_RESET 0x0
94287 /* Extracts the ALT_USB_DEV_DOEPCTL5_SNP field value from a register. */
94288 #define ALT_USB_DEV_DOEPCTL5_SNP_GET(value) (((value) & 0x00100000) >> 20)
94289 /* Produces a ALT_USB_DEV_DOEPCTL5_SNP register field value suitable for setting the register. */
94290 #define ALT_USB_DEV_DOEPCTL5_SNP_SET(value) (((value) << 20) & 0x00100000)
94291 
94292 /*
94293  * Field : STALL Handshake - stall
94294  *
94295  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
94296  * application sets this bit to stall all tokens from the USB host to this
94297  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
94298  * along with this bit, the STALL bit takes priority. Only the application can
94299  * clear this bit, never the core. Applies to control endpoints only. The
94300  * application can only set this bit, and the core clears it, when a SETUP token is
94301  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
94302  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
94303  * of this bit's setting, the core always responds to SETUP data packets with an
94304  * ACK handshake.
94305  *
94306  * Field Enumeration Values:
94307  *
94308  * Enum | Value | Description
94309  * :-----------------------------------|:------|:----------------------------
94310  * ALT_USB_DEV_DOEPCTL5_STALL_E_INACT | 0x0 | STALL All Tokens not active
94311  * ALT_USB_DEV_DOEPCTL5_STALL_E_ACT | 0x1 | STALL All Tokens active
94312  *
94313  * Field Access Macros:
94314  *
94315  */
94316 /*
94317  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_STALL
94318  *
94319  * STALL All Tokens not active
94320  */
94321 #define ALT_USB_DEV_DOEPCTL5_STALL_E_INACT 0x0
94322 /*
94323  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_STALL
94324  *
94325  * STALL All Tokens active
94326  */
94327 #define ALT_USB_DEV_DOEPCTL5_STALL_E_ACT 0x1
94328 
94329 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_STALL register field. */
94330 #define ALT_USB_DEV_DOEPCTL5_STALL_LSB 21
94331 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_STALL register field. */
94332 #define ALT_USB_DEV_DOEPCTL5_STALL_MSB 21
94333 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_STALL register field. */
94334 #define ALT_USB_DEV_DOEPCTL5_STALL_WIDTH 1
94335 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_STALL register field value. */
94336 #define ALT_USB_DEV_DOEPCTL5_STALL_SET_MSK 0x00200000
94337 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_STALL register field value. */
94338 #define ALT_USB_DEV_DOEPCTL5_STALL_CLR_MSK 0xffdfffff
94339 /* The reset value of the ALT_USB_DEV_DOEPCTL5_STALL register field. */
94340 #define ALT_USB_DEV_DOEPCTL5_STALL_RESET 0x0
94341 /* Extracts the ALT_USB_DEV_DOEPCTL5_STALL field value from a register. */
94342 #define ALT_USB_DEV_DOEPCTL5_STALL_GET(value) (((value) & 0x00200000) >> 21)
94343 /* Produces a ALT_USB_DEV_DOEPCTL5_STALL register field value suitable for setting the register. */
94344 #define ALT_USB_DEV_DOEPCTL5_STALL_SET(value) (((value) << 21) & 0x00200000)
94345 
94346 /*
94347  * Field : Clear NAK - cnak
94348  *
94349  * A write to this bit clears the NAK bit for the endpoint.
94350  *
94351  * Field Enumeration Values:
94352  *
94353  * Enum | Value | Description
94354  * :----------------------------------|:------|:-------------
94355  * ALT_USB_DEV_DOEPCTL5_CNAK_E_INACT | 0x0 | No Clear NAK
94356  * ALT_USB_DEV_DOEPCTL5_CNAK_E_ACT | 0x1 | Clear NAK
94357  *
94358  * Field Access Macros:
94359  *
94360  */
94361 /*
94362  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_CNAK
94363  *
94364  * No Clear NAK
94365  */
94366 #define ALT_USB_DEV_DOEPCTL5_CNAK_E_INACT 0x0
94367 /*
94368  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_CNAK
94369  *
94370  * Clear NAK
94371  */
94372 #define ALT_USB_DEV_DOEPCTL5_CNAK_E_ACT 0x1
94373 
94374 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_CNAK register field. */
94375 #define ALT_USB_DEV_DOEPCTL5_CNAK_LSB 26
94376 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_CNAK register field. */
94377 #define ALT_USB_DEV_DOEPCTL5_CNAK_MSB 26
94378 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_CNAK register field. */
94379 #define ALT_USB_DEV_DOEPCTL5_CNAK_WIDTH 1
94380 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_CNAK register field value. */
94381 #define ALT_USB_DEV_DOEPCTL5_CNAK_SET_MSK 0x04000000
94382 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_CNAK register field value. */
94383 #define ALT_USB_DEV_DOEPCTL5_CNAK_CLR_MSK 0xfbffffff
94384 /* The reset value of the ALT_USB_DEV_DOEPCTL5_CNAK register field. */
94385 #define ALT_USB_DEV_DOEPCTL5_CNAK_RESET 0x0
94386 /* Extracts the ALT_USB_DEV_DOEPCTL5_CNAK field value from a register. */
94387 #define ALT_USB_DEV_DOEPCTL5_CNAK_GET(value) (((value) & 0x04000000) >> 26)
94388 /* Produces a ALT_USB_DEV_DOEPCTL5_CNAK register field value suitable for setting the register. */
94389 #define ALT_USB_DEV_DOEPCTL5_CNAK_SET(value) (((value) << 26) & 0x04000000)
94390 
94391 /*
94392  * Field : Set NAK - snak
94393  *
94394  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
94395  * application can control the transmission of NAK handshakes on an endpoint. The
94396  * core can also Set this bit for an endpoint after a SETUP packet is received on
94397  * that endpoint.
94398  *
94399  * Field Enumeration Values:
94400  *
94401  * Enum | Value | Description
94402  * :----------------------------------|:------|:------------
94403  * ALT_USB_DEV_DOEPCTL5_SNAK_E_INACT | 0x0 | No Set NAK
94404  * ALT_USB_DEV_DOEPCTL5_SNAK_E_ACT | 0x1 | Set NAK
94405  *
94406  * Field Access Macros:
94407  *
94408  */
94409 /*
94410  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_SNAK
94411  *
94412  * No Set NAK
94413  */
94414 #define ALT_USB_DEV_DOEPCTL5_SNAK_E_INACT 0x0
94415 /*
94416  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_SNAK
94417  *
94418  * Set NAK
94419  */
94420 #define ALT_USB_DEV_DOEPCTL5_SNAK_E_ACT 0x1
94421 
94422 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_SNAK register field. */
94423 #define ALT_USB_DEV_DOEPCTL5_SNAK_LSB 27
94424 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_SNAK register field. */
94425 #define ALT_USB_DEV_DOEPCTL5_SNAK_MSB 27
94426 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_SNAK register field. */
94427 #define ALT_USB_DEV_DOEPCTL5_SNAK_WIDTH 1
94428 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_SNAK register field value. */
94429 #define ALT_USB_DEV_DOEPCTL5_SNAK_SET_MSK 0x08000000
94430 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_SNAK register field value. */
94431 #define ALT_USB_DEV_DOEPCTL5_SNAK_CLR_MSK 0xf7ffffff
94432 /* The reset value of the ALT_USB_DEV_DOEPCTL5_SNAK register field. */
94433 #define ALT_USB_DEV_DOEPCTL5_SNAK_RESET 0x0
94434 /* Extracts the ALT_USB_DEV_DOEPCTL5_SNAK field value from a register. */
94435 #define ALT_USB_DEV_DOEPCTL5_SNAK_GET(value) (((value) & 0x08000000) >> 27)
94436 /* Produces a ALT_USB_DEV_DOEPCTL5_SNAK register field value suitable for setting the register. */
94437 #define ALT_USB_DEV_DOEPCTL5_SNAK_SET(value) (((value) << 27) & 0x08000000)
94438 
94439 /*
94440  * Field : Set DATA0 PID - setd0pid
94441  *
94442  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
94443  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
94444  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
94445  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
94446  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
94447  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
94448  * mode is enabled, this field is reserved. The frame number in which to send data
94449  * is in the transmit descriptor structure. The frame in which to receive data is
94450  * updated in receive descriptor structure.
94451  *
94452  * Field Enumeration Values:
94453  *
94454  * Enum | Value | Description
94455  * :-------------------------------------|:------|:------------------------------------
94456  * ALT_USB_DEV_DOEPCTL5_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
94457  * ALT_USB_DEV_DOEPCTL5_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
94458  *
94459  * Field Access Macros:
94460  *
94461  */
94462 /*
94463  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_SETD0PID
94464  *
94465  * Disables Set DATA0 PID
94466  */
94467 #define ALT_USB_DEV_DOEPCTL5_SETD0PID_E_DISD 0x0
94468 /*
94469  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_SETD0PID
94470  *
94471  * Enables Endpoint Data PID to DATA0)
94472  */
94473 #define ALT_USB_DEV_DOEPCTL5_SETD0PID_E_END 0x1
94474 
94475 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_SETD0PID register field. */
94476 #define ALT_USB_DEV_DOEPCTL5_SETD0PID_LSB 28
94477 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_SETD0PID register field. */
94478 #define ALT_USB_DEV_DOEPCTL5_SETD0PID_MSB 28
94479 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_SETD0PID register field. */
94480 #define ALT_USB_DEV_DOEPCTL5_SETD0PID_WIDTH 1
94481 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_SETD0PID register field value. */
94482 #define ALT_USB_DEV_DOEPCTL5_SETD0PID_SET_MSK 0x10000000
94483 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_SETD0PID register field value. */
94484 #define ALT_USB_DEV_DOEPCTL5_SETD0PID_CLR_MSK 0xefffffff
94485 /* The reset value of the ALT_USB_DEV_DOEPCTL5_SETD0PID register field. */
94486 #define ALT_USB_DEV_DOEPCTL5_SETD0PID_RESET 0x0
94487 /* Extracts the ALT_USB_DEV_DOEPCTL5_SETD0PID field value from a register. */
94488 #define ALT_USB_DEV_DOEPCTL5_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
94489 /* Produces a ALT_USB_DEV_DOEPCTL5_SETD0PID register field value suitable for setting the register. */
94490 #define ALT_USB_DEV_DOEPCTL5_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
94491 
94492 /*
94493  * Field : Set DATA1 PID - setd1pid
94494  *
94495  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
94496  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
94497  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
94498  *
94499  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
94500  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
94501  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
94502  *
94503  * Field Enumeration Values:
94504  *
94505  * Enum | Value | Description
94506  * :-------------------------------------|:------|:-----------------------
94507  * ALT_USB_DEV_DOEPCTL5_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
94508  * ALT_USB_DEV_DOEPCTL5_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
94509  *
94510  * Field Access Macros:
94511  *
94512  */
94513 /*
94514  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_SETD1PID
94515  *
94516  * Disables Set DATA1 PID
94517  */
94518 #define ALT_USB_DEV_DOEPCTL5_SETD1PID_E_DISD 0x0
94519 /*
94520  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_SETD1PID
94521  *
94522  * Enables Set DATA1 PID
94523  */
94524 #define ALT_USB_DEV_DOEPCTL5_SETD1PID_E_END 0x1
94525 
94526 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_SETD1PID register field. */
94527 #define ALT_USB_DEV_DOEPCTL5_SETD1PID_LSB 29
94528 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_SETD1PID register field. */
94529 #define ALT_USB_DEV_DOEPCTL5_SETD1PID_MSB 29
94530 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_SETD1PID register field. */
94531 #define ALT_USB_DEV_DOEPCTL5_SETD1PID_WIDTH 1
94532 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_SETD1PID register field value. */
94533 #define ALT_USB_DEV_DOEPCTL5_SETD1PID_SET_MSK 0x20000000
94534 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_SETD1PID register field value. */
94535 #define ALT_USB_DEV_DOEPCTL5_SETD1PID_CLR_MSK 0xdfffffff
94536 /* The reset value of the ALT_USB_DEV_DOEPCTL5_SETD1PID register field. */
94537 #define ALT_USB_DEV_DOEPCTL5_SETD1PID_RESET 0x0
94538 /* Extracts the ALT_USB_DEV_DOEPCTL5_SETD1PID field value from a register. */
94539 #define ALT_USB_DEV_DOEPCTL5_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
94540 /* Produces a ALT_USB_DEV_DOEPCTL5_SETD1PID register field value suitable for setting the register. */
94541 #define ALT_USB_DEV_DOEPCTL5_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
94542 
94543 /*
94544  * Field : Endpoint Disable - epdis
94545  *
94546  * Applies to IN and OUT endpoints. The application sets this bit to stop
94547  * transmitting/receiving data on an endpoint, even before the transfer for that
94548  * endpoint is complete. The application must wait for the Endpoint Disabled
94549  * interrupt before treating the endpoint as disabled. The core clears this bit
94550  * before setting the Endpoint Disabled interrupt. The application must set this
94551  * bit only if Endpoint Enable is already set for this endpoint.
94552  *
94553  * Field Enumeration Values:
94554  *
94555  * Enum | Value | Description
94556  * :-----------------------------------|:------|:--------------------
94557  * ALT_USB_DEV_DOEPCTL5_EPDIS_E_INACT | 0x0 | No Endpoint Disable
94558  * ALT_USB_DEV_DOEPCTL5_EPDIS_E_ACT | 0x1 | Endpoint Disable
94559  *
94560  * Field Access Macros:
94561  *
94562  */
94563 /*
94564  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_EPDIS
94565  *
94566  * No Endpoint Disable
94567  */
94568 #define ALT_USB_DEV_DOEPCTL5_EPDIS_E_INACT 0x0
94569 /*
94570  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_EPDIS
94571  *
94572  * Endpoint Disable
94573  */
94574 #define ALT_USB_DEV_DOEPCTL5_EPDIS_E_ACT 0x1
94575 
94576 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_EPDIS register field. */
94577 #define ALT_USB_DEV_DOEPCTL5_EPDIS_LSB 30
94578 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_EPDIS register field. */
94579 #define ALT_USB_DEV_DOEPCTL5_EPDIS_MSB 30
94580 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_EPDIS register field. */
94581 #define ALT_USB_DEV_DOEPCTL5_EPDIS_WIDTH 1
94582 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_EPDIS register field value. */
94583 #define ALT_USB_DEV_DOEPCTL5_EPDIS_SET_MSK 0x40000000
94584 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_EPDIS register field value. */
94585 #define ALT_USB_DEV_DOEPCTL5_EPDIS_CLR_MSK 0xbfffffff
94586 /* The reset value of the ALT_USB_DEV_DOEPCTL5_EPDIS register field. */
94587 #define ALT_USB_DEV_DOEPCTL5_EPDIS_RESET 0x0
94588 /* Extracts the ALT_USB_DEV_DOEPCTL5_EPDIS field value from a register. */
94589 #define ALT_USB_DEV_DOEPCTL5_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
94590 /* Produces a ALT_USB_DEV_DOEPCTL5_EPDIS register field value suitable for setting the register. */
94591 #define ALT_USB_DEV_DOEPCTL5_EPDIS_SET(value) (((value) << 30) & 0x40000000)
94592 
94593 /*
94594  * Field : Endpoint Enable - epena
94595  *
94596  * Applies to IN and OUT endpoints.
94597  *
94598  * * When Scatter/Gather DMA mode is enabled,
94599  *
94600  * * for IN endpoints this bit indicates that the descriptor structure and data
94601  * buffer with data ready to transmit is setup.
94602  *
94603  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
94604  * receive data is setup.
94605  *
94606  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
94607  * mode:
94608  *
94609  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
94610  * the endpoint.
94611  *
94612  * * for OUT endpoints, this bit indicates that the application has allocated the
94613  * memory to start receiving data from the USB.
94614  *
94615  * * The core clears this bit before setting any of the following interrupts on
94616  * this endpoint:
94617  *
94618  * * SETUP Phase Done
94619  *
94620  * * Endpoint Disabled
94621  *
94622  * * Transfer Completed
94623  *
94624  * for control endpoints in DMA mode, this bit must be set to be able to transfer
94625  * SETUP data packets in memory.
94626  *
94627  * Field Enumeration Values:
94628  *
94629  * Enum | Value | Description
94630  * :-----------------------------------|:------|:-------------------------
94631  * ALT_USB_DEV_DOEPCTL5_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
94632  * ALT_USB_DEV_DOEPCTL5_EPENA_E_ACT | 0x1 | Endpoint Enable active
94633  *
94634  * Field Access Macros:
94635  *
94636  */
94637 /*
94638  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_EPENA
94639  *
94640  * Endpoint Enable inactive
94641  */
94642 #define ALT_USB_DEV_DOEPCTL5_EPENA_E_INACT 0x0
94643 /*
94644  * Enumerated value for register field ALT_USB_DEV_DOEPCTL5_EPENA
94645  *
94646  * Endpoint Enable active
94647  */
94648 #define ALT_USB_DEV_DOEPCTL5_EPENA_E_ACT 0x1
94649 
94650 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL5_EPENA register field. */
94651 #define ALT_USB_DEV_DOEPCTL5_EPENA_LSB 31
94652 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL5_EPENA register field. */
94653 #define ALT_USB_DEV_DOEPCTL5_EPENA_MSB 31
94654 /* The width in bits of the ALT_USB_DEV_DOEPCTL5_EPENA register field. */
94655 #define ALT_USB_DEV_DOEPCTL5_EPENA_WIDTH 1
94656 /* The mask used to set the ALT_USB_DEV_DOEPCTL5_EPENA register field value. */
94657 #define ALT_USB_DEV_DOEPCTL5_EPENA_SET_MSK 0x80000000
94658 /* The mask used to clear the ALT_USB_DEV_DOEPCTL5_EPENA register field value. */
94659 #define ALT_USB_DEV_DOEPCTL5_EPENA_CLR_MSK 0x7fffffff
94660 /* The reset value of the ALT_USB_DEV_DOEPCTL5_EPENA register field. */
94661 #define ALT_USB_DEV_DOEPCTL5_EPENA_RESET 0x0
94662 /* Extracts the ALT_USB_DEV_DOEPCTL5_EPENA field value from a register. */
94663 #define ALT_USB_DEV_DOEPCTL5_EPENA_GET(value) (((value) & 0x80000000) >> 31)
94664 /* Produces a ALT_USB_DEV_DOEPCTL5_EPENA register field value suitable for setting the register. */
94665 #define ALT_USB_DEV_DOEPCTL5_EPENA_SET(value) (((value) << 31) & 0x80000000)
94666 
94667 #ifndef __ASSEMBLY__
94668 /*
94669  * WARNING: The C register and register group struct declarations are provided for
94670  * convenience and illustrative purposes. They should, however, be used with
94671  * caution as the C language standard provides no guarantees about the alignment or
94672  * atomicity of device memory accesses. The recommended practice for writing
94673  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
94674  * alt_write_word() functions.
94675  *
94676  * The struct declaration for register ALT_USB_DEV_DOEPCTL5.
94677  */
94678 struct ALT_USB_DEV_DOEPCTL5_s
94679 {
94680  uint32_t mps : 11; /* Maximum Packet Size */
94681  uint32_t : 4; /* *UNDEFINED* */
94682  uint32_t usbactep : 1; /* USB Active Endpoint */
94683  const uint32_t dpid : 1; /* Endpoint Data PID */
94684  const uint32_t naksts : 1; /* NAK Status */
94685  uint32_t eptype : 2; /* Endpoint Type */
94686  uint32_t snp : 1; /* Snoop Mode */
94687  const uint32_t stall : 1; /* STALL Handshake */
94688  uint32_t : 4; /* *UNDEFINED* */
94689  uint32_t cnak : 1; /* Clear NAK */
94690  uint32_t snak : 1; /* Set NAK */
94691  uint32_t setd0pid : 1; /* Set DATA0 PID */
94692  uint32_t setd1pid : 1; /* Set DATA1 PID */
94693  const uint32_t epdis : 1; /* Endpoint Disable */
94694  const uint32_t epena : 1; /* Endpoint Enable */
94695 };
94696 
94697 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL5. */
94698 typedef volatile struct ALT_USB_DEV_DOEPCTL5_s ALT_USB_DEV_DOEPCTL5_t;
94699 #endif /* __ASSEMBLY__ */
94700 
94701 /* The byte offset of the ALT_USB_DEV_DOEPCTL5 register from the beginning of the component. */
94702 #define ALT_USB_DEV_DOEPCTL5_OFST 0x3a0
94703 /* The address of the ALT_USB_DEV_DOEPCTL5 register. */
94704 #define ALT_USB_DEV_DOEPCTL5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL5_OFST))
94705 
94706 /*
94707  * Register : Device OUT Endpoint 5 Interrupt Register - doepint5
94708  *
94709  * This register indicates the status of an endpoint with respect to USB- and AHB-
94710  * related events. The application must read this register when the OUT Endpoints
94711  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
94712  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
94713  * can read this register, it must first read the Device All Endpoints Interrupt
94714  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
94715  * Interrupt register. The application must clear the appropriate bit in this
94716  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
94717  *
94718  * Register Layout
94719  *
94720  * Bits | Access | Reset | Description
94721  * :--------|:-------|:------|:------------------------------------------
94722  * [0] | R | 0x0 | Transfer Completed Interrupt
94723  * [1] | R | 0x0 | Endpoint Disabled Interrupt
94724  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT5_AHBERR
94725  * [3] | R | 0x0 | SETUP Phase Done
94726  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
94727  * [5] | R | 0x0 | Status Phase Received for Control Write
94728  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
94729  * [7] | ??? | 0x0 | *UNDEFINED*
94730  * [8] | R | 0x0 | OUT Packet Error
94731  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
94732  * [10] | ??? | 0x0 | *UNDEFINED*
94733  * [11] | R | 0x0 | Packet Drop Status
94734  * [12] | R | 0x0 | BbleErr Interrupt
94735  * [13] | R | 0x0 | NAK Interrupt
94736  * [14] | R | 0x0 | NYET Interrupt
94737  * [31:15] | ??? | 0x0 | *UNDEFINED*
94738  *
94739  */
94740 /*
94741  * Field : Transfer Completed Interrupt - xfercompl
94742  *
94743  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
94744  *
94745  * This field indicates that the requested data from the internal FIFO is moved to
94746  * external system memory. This interrupt is generated only when the corresponding
94747  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
94748  * is Set.
94749  *
94750  * When Scatter/Gather DMA mode is disabled, this field indicates that the
94751  * programmed transfer is complete on the AHB as well as on the USB, for this
94752  * endpoint.
94753  *
94754  * Field Enumeration Values:
94755  *
94756  * Enum | Value | Description
94757  * :---------------------------------------|:------|:-----------------------------
94758  * ALT_USB_DEV_DOEPINT5_XFERCOMPL_E_INACT | 0x0 | No Interrupt
94759  * ALT_USB_DEV_DOEPINT5_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
94760  *
94761  * Field Access Macros:
94762  *
94763  */
94764 /*
94765  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_XFERCOMPL
94766  *
94767  * No Interrupt
94768  */
94769 #define ALT_USB_DEV_DOEPINT5_XFERCOMPL_E_INACT 0x0
94770 /*
94771  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_XFERCOMPL
94772  *
94773  * Transfer Completed Interrupt
94774  */
94775 #define ALT_USB_DEV_DOEPINT5_XFERCOMPL_E_ACT 0x1
94776 
94777 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_XFERCOMPL register field. */
94778 #define ALT_USB_DEV_DOEPINT5_XFERCOMPL_LSB 0
94779 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_XFERCOMPL register field. */
94780 #define ALT_USB_DEV_DOEPINT5_XFERCOMPL_MSB 0
94781 /* The width in bits of the ALT_USB_DEV_DOEPINT5_XFERCOMPL register field. */
94782 #define ALT_USB_DEV_DOEPINT5_XFERCOMPL_WIDTH 1
94783 /* The mask used to set the ALT_USB_DEV_DOEPINT5_XFERCOMPL register field value. */
94784 #define ALT_USB_DEV_DOEPINT5_XFERCOMPL_SET_MSK 0x00000001
94785 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_XFERCOMPL register field value. */
94786 #define ALT_USB_DEV_DOEPINT5_XFERCOMPL_CLR_MSK 0xfffffffe
94787 /* The reset value of the ALT_USB_DEV_DOEPINT5_XFERCOMPL register field. */
94788 #define ALT_USB_DEV_DOEPINT5_XFERCOMPL_RESET 0x0
94789 /* Extracts the ALT_USB_DEV_DOEPINT5_XFERCOMPL field value from a register. */
94790 #define ALT_USB_DEV_DOEPINT5_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
94791 /* Produces a ALT_USB_DEV_DOEPINT5_XFERCOMPL register field value suitable for setting the register. */
94792 #define ALT_USB_DEV_DOEPINT5_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
94793 
94794 /*
94795  * Field : Endpoint Disabled Interrupt - epdisbld
94796  *
94797  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
94798  * disabled per the application's request.
94799  *
94800  * Field Enumeration Values:
94801  *
94802  * Enum | Value | Description
94803  * :--------------------------------------|:------|:----------------------------
94804  * ALT_USB_DEV_DOEPINT5_EPDISBLD_E_INACT | 0x0 | No Interrupt
94805  * ALT_USB_DEV_DOEPINT5_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
94806  *
94807  * Field Access Macros:
94808  *
94809  */
94810 /*
94811  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_EPDISBLD
94812  *
94813  * No Interrupt
94814  */
94815 #define ALT_USB_DEV_DOEPINT5_EPDISBLD_E_INACT 0x0
94816 /*
94817  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_EPDISBLD
94818  *
94819  * Endpoint Disabled Interrupt
94820  */
94821 #define ALT_USB_DEV_DOEPINT5_EPDISBLD_E_ACT 0x1
94822 
94823 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_EPDISBLD register field. */
94824 #define ALT_USB_DEV_DOEPINT5_EPDISBLD_LSB 1
94825 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_EPDISBLD register field. */
94826 #define ALT_USB_DEV_DOEPINT5_EPDISBLD_MSB 1
94827 /* The width in bits of the ALT_USB_DEV_DOEPINT5_EPDISBLD register field. */
94828 #define ALT_USB_DEV_DOEPINT5_EPDISBLD_WIDTH 1
94829 /* The mask used to set the ALT_USB_DEV_DOEPINT5_EPDISBLD register field value. */
94830 #define ALT_USB_DEV_DOEPINT5_EPDISBLD_SET_MSK 0x00000002
94831 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_EPDISBLD register field value. */
94832 #define ALT_USB_DEV_DOEPINT5_EPDISBLD_CLR_MSK 0xfffffffd
94833 /* The reset value of the ALT_USB_DEV_DOEPINT5_EPDISBLD register field. */
94834 #define ALT_USB_DEV_DOEPINT5_EPDISBLD_RESET 0x0
94835 /* Extracts the ALT_USB_DEV_DOEPINT5_EPDISBLD field value from a register. */
94836 #define ALT_USB_DEV_DOEPINT5_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
94837 /* Produces a ALT_USB_DEV_DOEPINT5_EPDISBLD register field value suitable for setting the register. */
94838 #define ALT_USB_DEV_DOEPINT5_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
94839 
94840 /*
94841  * Field : ahberr
94842  *
94843  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
94844  * there is an AHB error during an AHB read/write. The application can read the
94845  * corresponding endpoint DMA address register to get the error address.
94846  *
94847  * Field Enumeration Values:
94848  *
94849  * Enum | Value | Description
94850  * :------------------------------------|:------|:--------------------
94851  * ALT_USB_DEV_DOEPINT5_AHBERR_E_INACT | 0x0 | No Interrupt
94852  * ALT_USB_DEV_DOEPINT5_AHBERR_E_ACT | 0x1 | AHB Error interrupt
94853  *
94854  * Field Access Macros:
94855  *
94856  */
94857 /*
94858  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_AHBERR
94859  *
94860  * No Interrupt
94861  */
94862 #define ALT_USB_DEV_DOEPINT5_AHBERR_E_INACT 0x0
94863 /*
94864  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_AHBERR
94865  *
94866  * AHB Error interrupt
94867  */
94868 #define ALT_USB_DEV_DOEPINT5_AHBERR_E_ACT 0x1
94869 
94870 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_AHBERR register field. */
94871 #define ALT_USB_DEV_DOEPINT5_AHBERR_LSB 2
94872 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_AHBERR register field. */
94873 #define ALT_USB_DEV_DOEPINT5_AHBERR_MSB 2
94874 /* The width in bits of the ALT_USB_DEV_DOEPINT5_AHBERR register field. */
94875 #define ALT_USB_DEV_DOEPINT5_AHBERR_WIDTH 1
94876 /* The mask used to set the ALT_USB_DEV_DOEPINT5_AHBERR register field value. */
94877 #define ALT_USB_DEV_DOEPINT5_AHBERR_SET_MSK 0x00000004
94878 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_AHBERR register field value. */
94879 #define ALT_USB_DEV_DOEPINT5_AHBERR_CLR_MSK 0xfffffffb
94880 /* The reset value of the ALT_USB_DEV_DOEPINT5_AHBERR register field. */
94881 #define ALT_USB_DEV_DOEPINT5_AHBERR_RESET 0x0
94882 /* Extracts the ALT_USB_DEV_DOEPINT5_AHBERR field value from a register. */
94883 #define ALT_USB_DEV_DOEPINT5_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
94884 /* Produces a ALT_USB_DEV_DOEPINT5_AHBERR register field value suitable for setting the register. */
94885 #define ALT_USB_DEV_DOEPINT5_AHBERR_SET(value) (((value) << 2) & 0x00000004)
94886 
94887 /*
94888  * Field : SETUP Phase Done - setup
94889  *
94890  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
94891  * control endpoint is complete and no more back-to-back SETUP packets were
94892  * received for the current control transfer. On this interrupt, the application
94893  * can decode the received SETUP data packet.
94894  *
94895  * Field Enumeration Values:
94896  *
94897  * Enum | Value | Description
94898  * :-----------------------------------|:------|:--------------------
94899  * ALT_USB_DEV_DOEPINT5_SETUP_E_INACT | 0x0 | No SETUP Phase Done
94900  * ALT_USB_DEV_DOEPINT5_SETUP_E_ACT | 0x1 | SETUP Phase Done
94901  *
94902  * Field Access Macros:
94903  *
94904  */
94905 /*
94906  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_SETUP
94907  *
94908  * No SETUP Phase Done
94909  */
94910 #define ALT_USB_DEV_DOEPINT5_SETUP_E_INACT 0x0
94911 /*
94912  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_SETUP
94913  *
94914  * SETUP Phase Done
94915  */
94916 #define ALT_USB_DEV_DOEPINT5_SETUP_E_ACT 0x1
94917 
94918 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_SETUP register field. */
94919 #define ALT_USB_DEV_DOEPINT5_SETUP_LSB 3
94920 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_SETUP register field. */
94921 #define ALT_USB_DEV_DOEPINT5_SETUP_MSB 3
94922 /* The width in bits of the ALT_USB_DEV_DOEPINT5_SETUP register field. */
94923 #define ALT_USB_DEV_DOEPINT5_SETUP_WIDTH 1
94924 /* The mask used to set the ALT_USB_DEV_DOEPINT5_SETUP register field value. */
94925 #define ALT_USB_DEV_DOEPINT5_SETUP_SET_MSK 0x00000008
94926 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_SETUP register field value. */
94927 #define ALT_USB_DEV_DOEPINT5_SETUP_CLR_MSK 0xfffffff7
94928 /* The reset value of the ALT_USB_DEV_DOEPINT5_SETUP register field. */
94929 #define ALT_USB_DEV_DOEPINT5_SETUP_RESET 0x0
94930 /* Extracts the ALT_USB_DEV_DOEPINT5_SETUP field value from a register. */
94931 #define ALT_USB_DEV_DOEPINT5_SETUP_GET(value) (((value) & 0x00000008) >> 3)
94932 /* Produces a ALT_USB_DEV_DOEPINT5_SETUP register field value suitable for setting the register. */
94933 #define ALT_USB_DEV_DOEPINT5_SETUP_SET(value) (((value) << 3) & 0x00000008)
94934 
94935 /*
94936  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
94937  *
94938  * Applies only to control OUT endpoints. Indicates that an OUT token was received
94939  * when the endpoint was not yet enabled. This interrupt is asserted on the
94940  * endpoint for which the OUT token was received.
94941  *
94942  * Field Enumeration Values:
94943  *
94944  * Enum | Value | Description
94945  * :-----------------------------------------|:------|:---------------------------------------------
94946  * ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
94947  * ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
94948  *
94949  * Field Access Macros:
94950  *
94951  */
94952 /*
94953  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS
94954  *
94955  * No OUT Token Received When Endpoint Disabled
94956  */
94957 #define ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS_E_INACT 0x0
94958 /*
94959  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS
94960  *
94961  * OUT Token Received When Endpoint Disabled
94962  */
94963 #define ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS_E_ACT 0x1
94964 
94965 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS register field. */
94966 #define ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS_LSB 4
94967 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS register field. */
94968 #define ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS_MSB 4
94969 /* The width in bits of the ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS register field. */
94970 #define ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS_WIDTH 1
94971 /* The mask used to set the ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS register field value. */
94972 #define ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS_SET_MSK 0x00000010
94973 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS register field value. */
94974 #define ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS_CLR_MSK 0xffffffef
94975 /* The reset value of the ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS register field. */
94976 #define ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS_RESET 0x0
94977 /* Extracts the ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS field value from a register. */
94978 #define ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
94979 /* Produces a ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS register field value suitable for setting the register. */
94980 #define ALT_USB_DEV_DOEPINT5_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
94981 
94982 /*
94983  * Field : Status Phase Received for Control Write - stsphsercvd
94984  *
94985  * This interrupt is valid only for Control OUT endpoints and only in Scatter
94986  * Gather DMA mode. This interrupt is generated only after the core has transferred
94987  * all the data that the host has sent during the data phase of a control write
94988  * transfer, to the system memory buffer. The interrupt indicates to the
94989  * application that the host has switched from data phase to the status phase of a
94990  * Control Write transfer. The application can use this interrupt to ACK or STALL
94991  * the Status phase, after it has decoded the data phase. This is applicable only
94992  * in Case of Scatter Gather DMA mode.
94993  *
94994  * Field Enumeration Values:
94995  *
94996  * Enum | Value | Description
94997  * :-----------------------------------------|:------|:-------------------------------------------
94998  * ALT_USB_DEV_DOEPINT5_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
94999  * ALT_USB_DEV_DOEPINT5_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
95000  *
95001  * Field Access Macros:
95002  *
95003  */
95004 /*
95005  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_STSPHSERCVD
95006  *
95007  * No Status Phase Received for Control Write
95008  */
95009 #define ALT_USB_DEV_DOEPINT5_STSPHSERCVD_E_INACT 0x0
95010 /*
95011  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_STSPHSERCVD
95012  *
95013  * Status Phase Received for Control Write
95014  */
95015 #define ALT_USB_DEV_DOEPINT5_STSPHSERCVD_E_ACT 0x1
95016 
95017 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_STSPHSERCVD register field. */
95018 #define ALT_USB_DEV_DOEPINT5_STSPHSERCVD_LSB 5
95019 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_STSPHSERCVD register field. */
95020 #define ALT_USB_DEV_DOEPINT5_STSPHSERCVD_MSB 5
95021 /* The width in bits of the ALT_USB_DEV_DOEPINT5_STSPHSERCVD register field. */
95022 #define ALT_USB_DEV_DOEPINT5_STSPHSERCVD_WIDTH 1
95023 /* The mask used to set the ALT_USB_DEV_DOEPINT5_STSPHSERCVD register field value. */
95024 #define ALT_USB_DEV_DOEPINT5_STSPHSERCVD_SET_MSK 0x00000020
95025 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_STSPHSERCVD register field value. */
95026 #define ALT_USB_DEV_DOEPINT5_STSPHSERCVD_CLR_MSK 0xffffffdf
95027 /* The reset value of the ALT_USB_DEV_DOEPINT5_STSPHSERCVD register field. */
95028 #define ALT_USB_DEV_DOEPINT5_STSPHSERCVD_RESET 0x0
95029 /* Extracts the ALT_USB_DEV_DOEPINT5_STSPHSERCVD field value from a register. */
95030 #define ALT_USB_DEV_DOEPINT5_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
95031 /* Produces a ALT_USB_DEV_DOEPINT5_STSPHSERCVD register field value suitable for setting the register. */
95032 #define ALT_USB_DEV_DOEPINT5_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
95033 
95034 /*
95035  * Field : Back-to-Back SETUP Packets Received - back2backsetup
95036  *
95037  * Applies to Control OUT endpoints only. This bit indicates that the core has
95038  * received more than three back-to-back SETUP packets for this particular
95039  * endpoint. for information about handling this interrupt,
95040  *
95041  * Field Enumeration Values:
95042  *
95043  * Enum | Value | Description
95044  * :--------------------------------------------|:------|:---------------------------------------
95045  * ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
95046  * ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
95047  *
95048  * Field Access Macros:
95049  *
95050  */
95051 /*
95052  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP
95053  *
95054  * No Back-to-Back SETUP Packets Received
95055  */
95056 #define ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP_E_INACT 0x0
95057 /*
95058  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP
95059  *
95060  * Back-to-Back SETUP Packets Received
95061  */
95062 #define ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP_E_ACT 0x1
95063 
95064 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP register field. */
95065 #define ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP_LSB 6
95066 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP register field. */
95067 #define ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP_MSB 6
95068 /* The width in bits of the ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP register field. */
95069 #define ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP_WIDTH 1
95070 /* The mask used to set the ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP register field value. */
95071 #define ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP_SET_MSK 0x00000040
95072 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP register field value. */
95073 #define ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP_CLR_MSK 0xffffffbf
95074 /* The reset value of the ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP register field. */
95075 #define ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP_RESET 0x0
95076 /* Extracts the ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP field value from a register. */
95077 #define ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
95078 /* Produces a ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP register field value suitable for setting the register. */
95079 #define ALT_USB_DEV_DOEPINT5_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
95080 
95081 /*
95082  * Field : OUT Packet Error - outpkterr
95083  *
95084  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
95085  * an overflow or a CRC error for non-Isochronous OUT packet.
95086  *
95087  * Field Enumeration Values:
95088  *
95089  * Enum | Value | Description
95090  * :---------------------------------------|:------|:--------------------
95091  * ALT_USB_DEV_DOEPINT5_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
95092  * ALT_USB_DEV_DOEPINT5_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
95093  *
95094  * Field Access Macros:
95095  *
95096  */
95097 /*
95098  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_OUTPKTERR
95099  *
95100  * No OUT Packet Error
95101  */
95102 #define ALT_USB_DEV_DOEPINT5_OUTPKTERR_E_INACT 0x0
95103 /*
95104  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_OUTPKTERR
95105  *
95106  * OUT Packet Error
95107  */
95108 #define ALT_USB_DEV_DOEPINT5_OUTPKTERR_E_ACT 0x1
95109 
95110 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_OUTPKTERR register field. */
95111 #define ALT_USB_DEV_DOEPINT5_OUTPKTERR_LSB 8
95112 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_OUTPKTERR register field. */
95113 #define ALT_USB_DEV_DOEPINT5_OUTPKTERR_MSB 8
95114 /* The width in bits of the ALT_USB_DEV_DOEPINT5_OUTPKTERR register field. */
95115 #define ALT_USB_DEV_DOEPINT5_OUTPKTERR_WIDTH 1
95116 /* The mask used to set the ALT_USB_DEV_DOEPINT5_OUTPKTERR register field value. */
95117 #define ALT_USB_DEV_DOEPINT5_OUTPKTERR_SET_MSK 0x00000100
95118 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_OUTPKTERR register field value. */
95119 #define ALT_USB_DEV_DOEPINT5_OUTPKTERR_CLR_MSK 0xfffffeff
95120 /* The reset value of the ALT_USB_DEV_DOEPINT5_OUTPKTERR register field. */
95121 #define ALT_USB_DEV_DOEPINT5_OUTPKTERR_RESET 0x0
95122 /* Extracts the ALT_USB_DEV_DOEPINT5_OUTPKTERR field value from a register. */
95123 #define ALT_USB_DEV_DOEPINT5_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
95124 /* Produces a ALT_USB_DEV_DOEPINT5_OUTPKTERR register field value suitable for setting the register. */
95125 #define ALT_USB_DEV_DOEPINT5_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
95126 
95127 /*
95128  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
95129  *
95130  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
95131  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
95132  * the descriptor accessed is not ready for the Core to process, such as Host busy
95133  * or DMA done
95134  *
95135  * Field Enumeration Values:
95136  *
95137  * Enum | Value | Description
95138  * :-------------------------------------|:------|:--------------
95139  * ALT_USB_DEV_DOEPINT5_BNAINTR_E_INACT | 0x0 | No interrupt
95140  * ALT_USB_DEV_DOEPINT5_BNAINTR_E_ACT | 0x1 | BNA interrupt
95141  *
95142  * Field Access Macros:
95143  *
95144  */
95145 /*
95146  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_BNAINTR
95147  *
95148  * No interrupt
95149  */
95150 #define ALT_USB_DEV_DOEPINT5_BNAINTR_E_INACT 0x0
95151 /*
95152  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_BNAINTR
95153  *
95154  * BNA interrupt
95155  */
95156 #define ALT_USB_DEV_DOEPINT5_BNAINTR_E_ACT 0x1
95157 
95158 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_BNAINTR register field. */
95159 #define ALT_USB_DEV_DOEPINT5_BNAINTR_LSB 9
95160 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_BNAINTR register field. */
95161 #define ALT_USB_DEV_DOEPINT5_BNAINTR_MSB 9
95162 /* The width in bits of the ALT_USB_DEV_DOEPINT5_BNAINTR register field. */
95163 #define ALT_USB_DEV_DOEPINT5_BNAINTR_WIDTH 1
95164 /* The mask used to set the ALT_USB_DEV_DOEPINT5_BNAINTR register field value. */
95165 #define ALT_USB_DEV_DOEPINT5_BNAINTR_SET_MSK 0x00000200
95166 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_BNAINTR register field value. */
95167 #define ALT_USB_DEV_DOEPINT5_BNAINTR_CLR_MSK 0xfffffdff
95168 /* The reset value of the ALT_USB_DEV_DOEPINT5_BNAINTR register field. */
95169 #define ALT_USB_DEV_DOEPINT5_BNAINTR_RESET 0x0
95170 /* Extracts the ALT_USB_DEV_DOEPINT5_BNAINTR field value from a register. */
95171 #define ALT_USB_DEV_DOEPINT5_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
95172 /* Produces a ALT_USB_DEV_DOEPINT5_BNAINTR register field value suitable for setting the register. */
95173 #define ALT_USB_DEV_DOEPINT5_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
95174 
95175 /*
95176  * Field : Packet Drop Status - pktdrpsts
95177  *
95178  * This bit indicates to the application that an ISOC OUT packet has been dropped.
95179  * This bit does not have an associated mask bit and does not generate an
95180  * interrupt.
95181  *
95182  * Field Enumeration Values:
95183  *
95184  * Enum | Value | Description
95185  * :---------------------------------------|:------|:-----------------------------
95186  * ALT_USB_DEV_DOEPINT5_PKTDRPSTS_E_INACT | 0x0 | No interrupt
95187  * ALT_USB_DEV_DOEPINT5_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
95188  *
95189  * Field Access Macros:
95190  *
95191  */
95192 /*
95193  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_PKTDRPSTS
95194  *
95195  * No interrupt
95196  */
95197 #define ALT_USB_DEV_DOEPINT5_PKTDRPSTS_E_INACT 0x0
95198 /*
95199  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_PKTDRPSTS
95200  *
95201  * Packet Drop Status interrupt
95202  */
95203 #define ALT_USB_DEV_DOEPINT5_PKTDRPSTS_E_ACT 0x1
95204 
95205 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_PKTDRPSTS register field. */
95206 #define ALT_USB_DEV_DOEPINT5_PKTDRPSTS_LSB 11
95207 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_PKTDRPSTS register field. */
95208 #define ALT_USB_DEV_DOEPINT5_PKTDRPSTS_MSB 11
95209 /* The width in bits of the ALT_USB_DEV_DOEPINT5_PKTDRPSTS register field. */
95210 #define ALT_USB_DEV_DOEPINT5_PKTDRPSTS_WIDTH 1
95211 /* The mask used to set the ALT_USB_DEV_DOEPINT5_PKTDRPSTS register field value. */
95212 #define ALT_USB_DEV_DOEPINT5_PKTDRPSTS_SET_MSK 0x00000800
95213 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_PKTDRPSTS register field value. */
95214 #define ALT_USB_DEV_DOEPINT5_PKTDRPSTS_CLR_MSK 0xfffff7ff
95215 /* The reset value of the ALT_USB_DEV_DOEPINT5_PKTDRPSTS register field. */
95216 #define ALT_USB_DEV_DOEPINT5_PKTDRPSTS_RESET 0x0
95217 /* Extracts the ALT_USB_DEV_DOEPINT5_PKTDRPSTS field value from a register. */
95218 #define ALT_USB_DEV_DOEPINT5_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
95219 /* Produces a ALT_USB_DEV_DOEPINT5_PKTDRPSTS register field value suitable for setting the register. */
95220 #define ALT_USB_DEV_DOEPINT5_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
95221 
95222 /*
95223  * Field : BbleErr Interrupt - bbleerr
95224  *
95225  * The core generates this interrupt when babble is received for the endpoint.
95226  *
95227  * Field Enumeration Values:
95228  *
95229  * Enum | Value | Description
95230  * :-------------------------------------|:------|:------------------
95231  * ALT_USB_DEV_DOEPINT5_BBLEERR_E_INACT | 0x0 | No interrupt
95232  * ALT_USB_DEV_DOEPINT5_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
95233  *
95234  * Field Access Macros:
95235  *
95236  */
95237 /*
95238  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_BBLEERR
95239  *
95240  * No interrupt
95241  */
95242 #define ALT_USB_DEV_DOEPINT5_BBLEERR_E_INACT 0x0
95243 /*
95244  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_BBLEERR
95245  *
95246  * BbleErr interrupt
95247  */
95248 #define ALT_USB_DEV_DOEPINT5_BBLEERR_E_ACT 0x1
95249 
95250 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_BBLEERR register field. */
95251 #define ALT_USB_DEV_DOEPINT5_BBLEERR_LSB 12
95252 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_BBLEERR register field. */
95253 #define ALT_USB_DEV_DOEPINT5_BBLEERR_MSB 12
95254 /* The width in bits of the ALT_USB_DEV_DOEPINT5_BBLEERR register field. */
95255 #define ALT_USB_DEV_DOEPINT5_BBLEERR_WIDTH 1
95256 /* The mask used to set the ALT_USB_DEV_DOEPINT5_BBLEERR register field value. */
95257 #define ALT_USB_DEV_DOEPINT5_BBLEERR_SET_MSK 0x00001000
95258 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_BBLEERR register field value. */
95259 #define ALT_USB_DEV_DOEPINT5_BBLEERR_CLR_MSK 0xffffefff
95260 /* The reset value of the ALT_USB_DEV_DOEPINT5_BBLEERR register field. */
95261 #define ALT_USB_DEV_DOEPINT5_BBLEERR_RESET 0x0
95262 /* Extracts the ALT_USB_DEV_DOEPINT5_BBLEERR field value from a register. */
95263 #define ALT_USB_DEV_DOEPINT5_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
95264 /* Produces a ALT_USB_DEV_DOEPINT5_BBLEERR register field value suitable for setting the register. */
95265 #define ALT_USB_DEV_DOEPINT5_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
95266 
95267 /*
95268  * Field : NAK Interrupt - nakintrpt
95269  *
95270  * The core generates this interrupt when a NAK is transmitted or received by the
95271  * device. In case of isochronous IN endpoints the interrupt gets generated when a
95272  * zero length packet is transmitted due to un-availability of data in the TXFifo.
95273  *
95274  * Field Enumeration Values:
95275  *
95276  * Enum | Value | Description
95277  * :---------------------------------------|:------|:--------------
95278  * ALT_USB_DEV_DOEPINT5_NAKINTRPT_E_INACT | 0x0 | No interrupt
95279  * ALT_USB_DEV_DOEPINT5_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
95280  *
95281  * Field Access Macros:
95282  *
95283  */
95284 /*
95285  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_NAKINTRPT
95286  *
95287  * No interrupt
95288  */
95289 #define ALT_USB_DEV_DOEPINT5_NAKINTRPT_E_INACT 0x0
95290 /*
95291  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_NAKINTRPT
95292  *
95293  * NAK Interrupt
95294  */
95295 #define ALT_USB_DEV_DOEPINT5_NAKINTRPT_E_ACT 0x1
95296 
95297 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_NAKINTRPT register field. */
95298 #define ALT_USB_DEV_DOEPINT5_NAKINTRPT_LSB 13
95299 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_NAKINTRPT register field. */
95300 #define ALT_USB_DEV_DOEPINT5_NAKINTRPT_MSB 13
95301 /* The width in bits of the ALT_USB_DEV_DOEPINT5_NAKINTRPT register field. */
95302 #define ALT_USB_DEV_DOEPINT5_NAKINTRPT_WIDTH 1
95303 /* The mask used to set the ALT_USB_DEV_DOEPINT5_NAKINTRPT register field value. */
95304 #define ALT_USB_DEV_DOEPINT5_NAKINTRPT_SET_MSK 0x00002000
95305 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_NAKINTRPT register field value. */
95306 #define ALT_USB_DEV_DOEPINT5_NAKINTRPT_CLR_MSK 0xffffdfff
95307 /* The reset value of the ALT_USB_DEV_DOEPINT5_NAKINTRPT register field. */
95308 #define ALT_USB_DEV_DOEPINT5_NAKINTRPT_RESET 0x0
95309 /* Extracts the ALT_USB_DEV_DOEPINT5_NAKINTRPT field value from a register. */
95310 #define ALT_USB_DEV_DOEPINT5_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
95311 /* Produces a ALT_USB_DEV_DOEPINT5_NAKINTRPT register field value suitable for setting the register. */
95312 #define ALT_USB_DEV_DOEPINT5_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
95313 
95314 /*
95315  * Field : NYET Interrupt - nyetintrpt
95316  *
95317  * The core generates this interrupt when a NYET response is transmitted for a non
95318  * isochronous OUT endpoint.
95319  *
95320  * Field Enumeration Values:
95321  *
95322  * Enum | Value | Description
95323  * :----------------------------------------|:------|:---------------
95324  * ALT_USB_DEV_DOEPINT5_NYETINTRPT_E_INACT | 0x0 | No interrupt
95325  * ALT_USB_DEV_DOEPINT5_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
95326  *
95327  * Field Access Macros:
95328  *
95329  */
95330 /*
95331  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_NYETINTRPT
95332  *
95333  * No interrupt
95334  */
95335 #define ALT_USB_DEV_DOEPINT5_NYETINTRPT_E_INACT 0x0
95336 /*
95337  * Enumerated value for register field ALT_USB_DEV_DOEPINT5_NYETINTRPT
95338  *
95339  * NYET Interrupt
95340  */
95341 #define ALT_USB_DEV_DOEPINT5_NYETINTRPT_E_ACT 0x1
95342 
95343 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT5_NYETINTRPT register field. */
95344 #define ALT_USB_DEV_DOEPINT5_NYETINTRPT_LSB 14
95345 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT5_NYETINTRPT register field. */
95346 #define ALT_USB_DEV_DOEPINT5_NYETINTRPT_MSB 14
95347 /* The width in bits of the ALT_USB_DEV_DOEPINT5_NYETINTRPT register field. */
95348 #define ALT_USB_DEV_DOEPINT5_NYETINTRPT_WIDTH 1
95349 /* The mask used to set the ALT_USB_DEV_DOEPINT5_NYETINTRPT register field value. */
95350 #define ALT_USB_DEV_DOEPINT5_NYETINTRPT_SET_MSK 0x00004000
95351 /* The mask used to clear the ALT_USB_DEV_DOEPINT5_NYETINTRPT register field value. */
95352 #define ALT_USB_DEV_DOEPINT5_NYETINTRPT_CLR_MSK 0xffffbfff
95353 /* The reset value of the ALT_USB_DEV_DOEPINT5_NYETINTRPT register field. */
95354 #define ALT_USB_DEV_DOEPINT5_NYETINTRPT_RESET 0x0
95355 /* Extracts the ALT_USB_DEV_DOEPINT5_NYETINTRPT field value from a register. */
95356 #define ALT_USB_DEV_DOEPINT5_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
95357 /* Produces a ALT_USB_DEV_DOEPINT5_NYETINTRPT register field value suitable for setting the register. */
95358 #define ALT_USB_DEV_DOEPINT5_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
95359 
95360 #ifndef __ASSEMBLY__
95361 /*
95362  * WARNING: The C register and register group struct declarations are provided for
95363  * convenience and illustrative purposes. They should, however, be used with
95364  * caution as the C language standard provides no guarantees about the alignment or
95365  * atomicity of device memory accesses. The recommended practice for writing
95366  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
95367  * alt_write_word() functions.
95368  *
95369  * The struct declaration for register ALT_USB_DEV_DOEPINT5.
95370  */
95371 struct ALT_USB_DEV_DOEPINT5_s
95372 {
95373  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
95374  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
95375  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT5_AHBERR */
95376  const uint32_t setup : 1; /* SETUP Phase Done */
95377  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
95378  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
95379  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
95380  uint32_t : 1; /* *UNDEFINED* */
95381  const uint32_t outpkterr : 1; /* OUT Packet Error */
95382  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
95383  uint32_t : 1; /* *UNDEFINED* */
95384  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
95385  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
95386  const uint32_t nakintrpt : 1; /* NAK Interrupt */
95387  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
95388  uint32_t : 17; /* *UNDEFINED* */
95389 };
95390 
95391 /* The typedef declaration for register ALT_USB_DEV_DOEPINT5. */
95392 typedef volatile struct ALT_USB_DEV_DOEPINT5_s ALT_USB_DEV_DOEPINT5_t;
95393 #endif /* __ASSEMBLY__ */
95394 
95395 /* The byte offset of the ALT_USB_DEV_DOEPINT5 register from the beginning of the component. */
95396 #define ALT_USB_DEV_DOEPINT5_OFST 0x3a8
95397 /* The address of the ALT_USB_DEV_DOEPINT5 register. */
95398 #define ALT_USB_DEV_DOEPINT5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT5_OFST))
95399 
95400 /*
95401  * Register : Device OUT Endpoint 5 Transfer Size Register - doeptsiz5
95402  *
95403  * The application must modify this register before enabling the endpoint. Once the
95404  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
95405  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
95406  * application can only read this register once the core has cleared the Endpoint
95407  * Enable bit.
95408  *
95409  * Register Layout
95410  *
95411  * Bits | Access | Reset | Description
95412  * :--------|:-------|:------|:-------------------
95413  * [18:0] | RW | 0x0 | Transfer Size
95414  * [28:19] | RW | 0x0 | Packet Count
95415  * [30:29] | R | 0x0 | SETUP Packet Count
95416  * [31] | ??? | 0x0 | *UNDEFINED*
95417  *
95418  */
95419 /*
95420  * Field : Transfer Size - xfersize
95421  *
95422  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
95423  * application only after it has exhausted the transfer size amount of data. The
95424  * transfer size can be Set to the maximum packet size of the endpoint, to be
95425  * interrupted at the end of each packet. The core decrements this field every time
95426  * a packet from the external memory is written to the RxFIFO.
95427  *
95428  * Field Access Macros:
95429  *
95430  */
95431 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ5_XFERSIZE register field. */
95432 #define ALT_USB_DEV_DOEPTSIZ5_XFERSIZE_LSB 0
95433 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ5_XFERSIZE register field. */
95434 #define ALT_USB_DEV_DOEPTSIZ5_XFERSIZE_MSB 18
95435 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ5_XFERSIZE register field. */
95436 #define ALT_USB_DEV_DOEPTSIZ5_XFERSIZE_WIDTH 19
95437 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ5_XFERSIZE register field value. */
95438 #define ALT_USB_DEV_DOEPTSIZ5_XFERSIZE_SET_MSK 0x0007ffff
95439 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ5_XFERSIZE register field value. */
95440 #define ALT_USB_DEV_DOEPTSIZ5_XFERSIZE_CLR_MSK 0xfff80000
95441 /* The reset value of the ALT_USB_DEV_DOEPTSIZ5_XFERSIZE register field. */
95442 #define ALT_USB_DEV_DOEPTSIZ5_XFERSIZE_RESET 0x0
95443 /* Extracts the ALT_USB_DEV_DOEPTSIZ5_XFERSIZE field value from a register. */
95444 #define ALT_USB_DEV_DOEPTSIZ5_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
95445 /* Produces a ALT_USB_DEV_DOEPTSIZ5_XFERSIZE register field value suitable for setting the register. */
95446 #define ALT_USB_DEV_DOEPTSIZ5_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
95447 
95448 /*
95449  * Field : Packet Count - pktcnt
95450  *
95451  * Indicates the total number of USB packets that constitute the Transfer Size
95452  * amount of data for endpoint 0.This field is decremented every time a packet
95453  * (maximum size or short packet) is read from the RxFIFO.
95454  *
95455  * Field Access Macros:
95456  *
95457  */
95458 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ5_PKTCNT register field. */
95459 #define ALT_USB_DEV_DOEPTSIZ5_PKTCNT_LSB 19
95460 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ5_PKTCNT register field. */
95461 #define ALT_USB_DEV_DOEPTSIZ5_PKTCNT_MSB 28
95462 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ5_PKTCNT register field. */
95463 #define ALT_USB_DEV_DOEPTSIZ5_PKTCNT_WIDTH 10
95464 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ5_PKTCNT register field value. */
95465 #define ALT_USB_DEV_DOEPTSIZ5_PKTCNT_SET_MSK 0x1ff80000
95466 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ5_PKTCNT register field value. */
95467 #define ALT_USB_DEV_DOEPTSIZ5_PKTCNT_CLR_MSK 0xe007ffff
95468 /* The reset value of the ALT_USB_DEV_DOEPTSIZ5_PKTCNT register field. */
95469 #define ALT_USB_DEV_DOEPTSIZ5_PKTCNT_RESET 0x0
95470 /* Extracts the ALT_USB_DEV_DOEPTSIZ5_PKTCNT field value from a register. */
95471 #define ALT_USB_DEV_DOEPTSIZ5_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
95472 /* Produces a ALT_USB_DEV_DOEPTSIZ5_PKTCNT register field value suitable for setting the register. */
95473 #define ALT_USB_DEV_DOEPTSIZ5_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
95474 
95475 /*
95476  * Field : SETUP Packet Count - rxdpid
95477  *
95478  * Applies to isochronous OUT endpoints only.This is the data PID received in the
95479  * last packet for this endpoint. Use datax.
95480  *
95481  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
95482  * number of back-to-back SETUP data packets the endpoint can receive.
95483  *
95484  * Field Enumeration Values:
95485  *
95486  * Enum | Value | Description
95487  * :-----------------------------------------|:------|:-------------------
95488  * ALT_USB_DEV_DOEPTSIZ5_RXDPID_E_DATA0 | 0x0 | DATA0
95489  * ALT_USB_DEV_DOEPTSIZ5_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
95490  * ALT_USB_DEV_DOEPTSIZ5_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
95491  * ALT_USB_DEV_DOEPTSIZ5_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
95492  *
95493  * Field Access Macros:
95494  *
95495  */
95496 /*
95497  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ5_RXDPID
95498  *
95499  * DATA0
95500  */
95501 #define ALT_USB_DEV_DOEPTSIZ5_RXDPID_E_DATA0 0x0
95502 /*
95503  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ5_RXDPID
95504  *
95505  * DATA2 or 1 packet
95506  */
95507 #define ALT_USB_DEV_DOEPTSIZ5_RXDPID_E_DATA2PKT1 0x1
95508 /*
95509  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ5_RXDPID
95510  *
95511  * DATA1 or 2 packets
95512  */
95513 #define ALT_USB_DEV_DOEPTSIZ5_RXDPID_E_DATA1PKT2 0x2
95514 /*
95515  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ5_RXDPID
95516  *
95517  * MDATA or 3 packets
95518  */
95519 #define ALT_USB_DEV_DOEPTSIZ5_RXDPID_E_MDATAPKT3 0x3
95520 
95521 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ5_RXDPID register field. */
95522 #define ALT_USB_DEV_DOEPTSIZ5_RXDPID_LSB 29
95523 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ5_RXDPID register field. */
95524 #define ALT_USB_DEV_DOEPTSIZ5_RXDPID_MSB 30
95525 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ5_RXDPID register field. */
95526 #define ALT_USB_DEV_DOEPTSIZ5_RXDPID_WIDTH 2
95527 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ5_RXDPID register field value. */
95528 #define ALT_USB_DEV_DOEPTSIZ5_RXDPID_SET_MSK 0x60000000
95529 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ5_RXDPID register field value. */
95530 #define ALT_USB_DEV_DOEPTSIZ5_RXDPID_CLR_MSK 0x9fffffff
95531 /* The reset value of the ALT_USB_DEV_DOEPTSIZ5_RXDPID register field. */
95532 #define ALT_USB_DEV_DOEPTSIZ5_RXDPID_RESET 0x0
95533 /* Extracts the ALT_USB_DEV_DOEPTSIZ5_RXDPID field value from a register. */
95534 #define ALT_USB_DEV_DOEPTSIZ5_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
95535 /* Produces a ALT_USB_DEV_DOEPTSIZ5_RXDPID register field value suitable for setting the register. */
95536 #define ALT_USB_DEV_DOEPTSIZ5_RXDPID_SET(value) (((value) << 29) & 0x60000000)
95537 
95538 #ifndef __ASSEMBLY__
95539 /*
95540  * WARNING: The C register and register group struct declarations are provided for
95541  * convenience and illustrative purposes. They should, however, be used with
95542  * caution as the C language standard provides no guarantees about the alignment or
95543  * atomicity of device memory accesses. The recommended practice for writing
95544  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
95545  * alt_write_word() functions.
95546  *
95547  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ5.
95548  */
95549 struct ALT_USB_DEV_DOEPTSIZ5_s
95550 {
95551  uint32_t xfersize : 19; /* Transfer Size */
95552  uint32_t pktcnt : 10; /* Packet Count */
95553  const uint32_t rxdpid : 2; /* SETUP Packet Count */
95554  uint32_t : 1; /* *UNDEFINED* */
95555 };
95556 
95557 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ5. */
95558 typedef volatile struct ALT_USB_DEV_DOEPTSIZ5_s ALT_USB_DEV_DOEPTSIZ5_t;
95559 #endif /* __ASSEMBLY__ */
95560 
95561 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ5 register from the beginning of the component. */
95562 #define ALT_USB_DEV_DOEPTSIZ5_OFST 0x3b0
95563 /* The address of the ALT_USB_DEV_DOEPTSIZ5 register. */
95564 #define ALT_USB_DEV_DOEPTSIZ5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ5_OFST))
95565 
95566 /*
95567  * Register : Device OUT Endpoint 5 DMA Address Register - doepdma5
95568  *
95569  * DMA OUT Address.
95570  *
95571  * Register Layout
95572  *
95573  * Bits | Access | Reset | Description
95574  * :-------|:-------|:--------|:------------
95575  * [31:0] | RW | Unknown | DMA Address
95576  *
95577  */
95578 /*
95579  * Field : DMA Address - doepdma5
95580  *
95581  * Holds the start address of the external memory for storing or fetching endpoint
95582  * data. for control endpoints, this field stores control OUT data packets as well
95583  * as SETUP transaction data packets. When more than three SETUP packets are
95584  * received back-to-back, the SETUP data packet in the memory is overwritten. This
95585  * register is incremented on every AHB transaction. The application can give only
95586  * a DWORD-aligned address.
95587  *
95588  * When Scatter/Gather DMA mode is not enabled, the application programs the start
95589  * address value in this field.
95590  *
95591  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
95592  * for the descriptor list.
95593  *
95594  * Field Access Macros:
95595  *
95596  */
95597 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA5_DOEPDMA5 register field. */
95598 #define ALT_USB_DEV_DOEPDMA5_DOEPDMA5_LSB 0
95599 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA5_DOEPDMA5 register field. */
95600 #define ALT_USB_DEV_DOEPDMA5_DOEPDMA5_MSB 31
95601 /* The width in bits of the ALT_USB_DEV_DOEPDMA5_DOEPDMA5 register field. */
95602 #define ALT_USB_DEV_DOEPDMA5_DOEPDMA5_WIDTH 32
95603 /* The mask used to set the ALT_USB_DEV_DOEPDMA5_DOEPDMA5 register field value. */
95604 #define ALT_USB_DEV_DOEPDMA5_DOEPDMA5_SET_MSK 0xffffffff
95605 /* The mask used to clear the ALT_USB_DEV_DOEPDMA5_DOEPDMA5 register field value. */
95606 #define ALT_USB_DEV_DOEPDMA5_DOEPDMA5_CLR_MSK 0x00000000
95607 /* The reset value of the ALT_USB_DEV_DOEPDMA5_DOEPDMA5 register field is UNKNOWN. */
95608 #define ALT_USB_DEV_DOEPDMA5_DOEPDMA5_RESET 0x0
95609 /* Extracts the ALT_USB_DEV_DOEPDMA5_DOEPDMA5 field value from a register. */
95610 #define ALT_USB_DEV_DOEPDMA5_DOEPDMA5_GET(value) (((value) & 0xffffffff) >> 0)
95611 /* Produces a ALT_USB_DEV_DOEPDMA5_DOEPDMA5 register field value suitable for setting the register. */
95612 #define ALT_USB_DEV_DOEPDMA5_DOEPDMA5_SET(value) (((value) << 0) & 0xffffffff)
95613 
95614 #ifndef __ASSEMBLY__
95615 /*
95616  * WARNING: The C register and register group struct declarations are provided for
95617  * convenience and illustrative purposes. They should, however, be used with
95618  * caution as the C language standard provides no guarantees about the alignment or
95619  * atomicity of device memory accesses. The recommended practice for writing
95620  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
95621  * alt_write_word() functions.
95622  *
95623  * The struct declaration for register ALT_USB_DEV_DOEPDMA5.
95624  */
95625 struct ALT_USB_DEV_DOEPDMA5_s
95626 {
95627  uint32_t doepdma5 : 32; /* DMA Address */
95628 };
95629 
95630 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA5. */
95631 typedef volatile struct ALT_USB_DEV_DOEPDMA5_s ALT_USB_DEV_DOEPDMA5_t;
95632 #endif /* __ASSEMBLY__ */
95633 
95634 /* The byte offset of the ALT_USB_DEV_DOEPDMA5 register from the beginning of the component. */
95635 #define ALT_USB_DEV_DOEPDMA5_OFST 0x3b4
95636 /* The address of the ALT_USB_DEV_DOEPDMA5 register. */
95637 #define ALT_USB_DEV_DOEPDMA5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA5_OFST))
95638 
95639 /*
95640  * Register : Device OUT Endpoint 5 DMA Buffer Address Register - doepdmab5
95641  *
95642  * DMA Buffer Address.
95643  *
95644  * Register Layout
95645  *
95646  * Bits | Access | Reset | Description
95647  * :-------|:-------|:--------|:-------------------
95648  * [31:0] | R | Unknown | DMA Buffer Address
95649  *
95650  */
95651 /*
95652  * Field : DMA Buffer Address - doepdmab5
95653  *
95654  * Holds the current buffer address. This register is updated as and when the data
95655  * transfer for the corresponding end point is in progress. This register is
95656  * present only in Scatter/Gather DMA mode.
95657  *
95658  * Field Access Macros:
95659  *
95660  */
95661 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5 register field. */
95662 #define ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5_LSB 0
95663 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5 register field. */
95664 #define ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5_MSB 31
95665 /* The width in bits of the ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5 register field. */
95666 #define ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5_WIDTH 32
95667 /* The mask used to set the ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5 register field value. */
95668 #define ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5_SET_MSK 0xffffffff
95669 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5 register field value. */
95670 #define ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5_CLR_MSK 0x00000000
95671 /* The reset value of the ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5 register field is UNKNOWN. */
95672 #define ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5_RESET 0x0
95673 /* Extracts the ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5 field value from a register. */
95674 #define ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5_GET(value) (((value) & 0xffffffff) >> 0)
95675 /* Produces a ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5 register field value suitable for setting the register. */
95676 #define ALT_USB_DEV_DOEPDMAB5_DOEPDMAB5_SET(value) (((value) << 0) & 0xffffffff)
95677 
95678 #ifndef __ASSEMBLY__
95679 /*
95680  * WARNING: The C register and register group struct declarations are provided for
95681  * convenience and illustrative purposes. They should, however, be used with
95682  * caution as the C language standard provides no guarantees about the alignment or
95683  * atomicity of device memory accesses. The recommended practice for writing
95684  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
95685  * alt_write_word() functions.
95686  *
95687  * The struct declaration for register ALT_USB_DEV_DOEPDMAB5.
95688  */
95689 struct ALT_USB_DEV_DOEPDMAB5_s
95690 {
95691  const uint32_t doepdmab5 : 32; /* DMA Buffer Address */
95692 };
95693 
95694 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB5. */
95695 typedef volatile struct ALT_USB_DEV_DOEPDMAB5_s ALT_USB_DEV_DOEPDMAB5_t;
95696 #endif /* __ASSEMBLY__ */
95697 
95698 /* The byte offset of the ALT_USB_DEV_DOEPDMAB5 register from the beginning of the component. */
95699 #define ALT_USB_DEV_DOEPDMAB5_OFST 0x3bc
95700 /* The address of the ALT_USB_DEV_DOEPDMAB5 register. */
95701 #define ALT_USB_DEV_DOEPDMAB5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB5_OFST))
95702 
95703 /*
95704  * Register : Device Control OUT Endpoint 6 Control Register - doepctl6
95705  *
95706  * Out Endpoint 6.
95707  *
95708  * Register Layout
95709  *
95710  * Bits | Access | Reset | Description
95711  * :--------|:-------|:------|:--------------------
95712  * [10:0] | RW | 0x0 | Maximum Packet Size
95713  * [14:11] | ??? | 0x0 | *UNDEFINED*
95714  * [15] | RW | 0x0 | USB Active Endpoint
95715  * [16] | R | 0x0 | Endpoint Data PID
95716  * [17] | R | 0x0 | NAK Status
95717  * [19:18] | RW | 0x0 | Endpoint Type
95718  * [20] | RW | 0x0 | Snoop Mode
95719  * [21] | R | 0x0 | STALL Handshake
95720  * [25:22] | ??? | 0x0 | *UNDEFINED*
95721  * [26] | W | 0x0 | Clear NAK
95722  * [27] | W | 0x0 | Set NAK
95723  * [28] | W | 0x0 | Set DATA0 PID
95724  * [29] | W | 0x0 | Set DATA1 PID
95725  * [30] | R | 0x0 | Endpoint Disable
95726  * [31] | R | 0x0 | Endpoint Enable
95727  *
95728  */
95729 /*
95730  * Field : Maximum Packet Size - mps
95731  *
95732  * Applies to IN and OUT endpoints. The application must program this field with
95733  * the maximum packet size for the current logical endpoint. This value is in
95734  * bytes.
95735  *
95736  * Field Access Macros:
95737  *
95738  */
95739 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_MPS register field. */
95740 #define ALT_USB_DEV_DOEPCTL6_MPS_LSB 0
95741 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_MPS register field. */
95742 #define ALT_USB_DEV_DOEPCTL6_MPS_MSB 10
95743 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_MPS register field. */
95744 #define ALT_USB_DEV_DOEPCTL6_MPS_WIDTH 11
95745 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_MPS register field value. */
95746 #define ALT_USB_DEV_DOEPCTL6_MPS_SET_MSK 0x000007ff
95747 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_MPS register field value. */
95748 #define ALT_USB_DEV_DOEPCTL6_MPS_CLR_MSK 0xfffff800
95749 /* The reset value of the ALT_USB_DEV_DOEPCTL6_MPS register field. */
95750 #define ALT_USB_DEV_DOEPCTL6_MPS_RESET 0x0
95751 /* Extracts the ALT_USB_DEV_DOEPCTL6_MPS field value from a register. */
95752 #define ALT_USB_DEV_DOEPCTL6_MPS_GET(value) (((value) & 0x000007ff) >> 0)
95753 /* Produces a ALT_USB_DEV_DOEPCTL6_MPS register field value suitable for setting the register. */
95754 #define ALT_USB_DEV_DOEPCTL6_MPS_SET(value) (((value) << 0) & 0x000007ff)
95755 
95756 /*
95757  * Field : USB Active Endpoint - usbactep
95758  *
95759  * Indicates whether this endpoint is active in the current configuration and
95760  * interface. The core clears this bit for all endpoints (other than EP 0) after
95761  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
95762  * commands, the application must program endpoint registers accordingly and set
95763  * this bit.
95764  *
95765  * Field Enumeration Values:
95766  *
95767  * Enum | Value | Description
95768  * :-------------------------------------|:------|:--------------------
95769  * ALT_USB_DEV_DOEPCTL6_USBACTEP_E_DISD | 0x0 | Not Active
95770  * ALT_USB_DEV_DOEPCTL6_USBACTEP_E_END | 0x1 | USB Active Endpoint
95771  *
95772  * Field Access Macros:
95773  *
95774  */
95775 /*
95776  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_USBACTEP
95777  *
95778  * Not Active
95779  */
95780 #define ALT_USB_DEV_DOEPCTL6_USBACTEP_E_DISD 0x0
95781 /*
95782  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_USBACTEP
95783  *
95784  * USB Active Endpoint
95785  */
95786 #define ALT_USB_DEV_DOEPCTL6_USBACTEP_E_END 0x1
95787 
95788 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_USBACTEP register field. */
95789 #define ALT_USB_DEV_DOEPCTL6_USBACTEP_LSB 15
95790 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_USBACTEP register field. */
95791 #define ALT_USB_DEV_DOEPCTL6_USBACTEP_MSB 15
95792 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_USBACTEP register field. */
95793 #define ALT_USB_DEV_DOEPCTL6_USBACTEP_WIDTH 1
95794 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_USBACTEP register field value. */
95795 #define ALT_USB_DEV_DOEPCTL6_USBACTEP_SET_MSK 0x00008000
95796 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_USBACTEP register field value. */
95797 #define ALT_USB_DEV_DOEPCTL6_USBACTEP_CLR_MSK 0xffff7fff
95798 /* The reset value of the ALT_USB_DEV_DOEPCTL6_USBACTEP register field. */
95799 #define ALT_USB_DEV_DOEPCTL6_USBACTEP_RESET 0x0
95800 /* Extracts the ALT_USB_DEV_DOEPCTL6_USBACTEP field value from a register. */
95801 #define ALT_USB_DEV_DOEPCTL6_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
95802 /* Produces a ALT_USB_DEV_DOEPCTL6_USBACTEP register field value suitable for setting the register. */
95803 #define ALT_USB_DEV_DOEPCTL6_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
95804 
95805 /*
95806  * Field : Endpoint Data PID - dpid
95807  *
95808  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
95809  * packet to be received or transmitted on this endpoint. The application must
95810  * program the PID of the first packet to be received or transmitted on this
95811  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
95812  * SetD0PID fields of this register to program either DATA0 or DATA1 PID.
95813  *
95814  * 0: DATA0 1: DATA1This field is applicable both for Scatter/Gather DMA mode and
95815  * non-Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-
95816  * Scatter/Gather DMA mode:
95817  *
95818  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
95819  * number in which the core transmits/receives isochronous data for this endpoint.
95820  * The application must program the even/odd (micro) frame number in which it
95821  * intends to transmit/receive isochronous data for this endpoint using the
95822  * SetEvnFr and SetOddFr fields in this register.
95823  *
95824  * 0: Even (micro)frame
95825  *
95826  * 1: Odd (micro)frame
95827  *
95828  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
95829  * number in which to send data is provided in the transmit descriptor structure.
95830  * The frame in which data is received is updated in receive descriptor structure.
95831  *
95832  * Field Enumeration Values:
95833  *
95834  * Enum | Value | Description
95835  * :----------------------------------|:------|:-----------------------------
95836  * ALT_USB_DEV_DOEPCTL6_DPID_E_INACT | 0x0 | Endpoint Data PID not active
95837  * ALT_USB_DEV_DOEPCTL6_DPID_E_ACT | 0x1 | Endpoint Data PID active
95838  *
95839  * Field Access Macros:
95840  *
95841  */
95842 /*
95843  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_DPID
95844  *
95845  * Endpoint Data PID not active
95846  */
95847 #define ALT_USB_DEV_DOEPCTL6_DPID_E_INACT 0x0
95848 /*
95849  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_DPID
95850  *
95851  * Endpoint Data PID active
95852  */
95853 #define ALT_USB_DEV_DOEPCTL6_DPID_E_ACT 0x1
95854 
95855 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_DPID register field. */
95856 #define ALT_USB_DEV_DOEPCTL6_DPID_LSB 16
95857 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_DPID register field. */
95858 #define ALT_USB_DEV_DOEPCTL6_DPID_MSB 16
95859 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_DPID register field. */
95860 #define ALT_USB_DEV_DOEPCTL6_DPID_WIDTH 1
95861 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_DPID register field value. */
95862 #define ALT_USB_DEV_DOEPCTL6_DPID_SET_MSK 0x00010000
95863 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_DPID register field value. */
95864 #define ALT_USB_DEV_DOEPCTL6_DPID_CLR_MSK 0xfffeffff
95865 /* The reset value of the ALT_USB_DEV_DOEPCTL6_DPID register field. */
95866 #define ALT_USB_DEV_DOEPCTL6_DPID_RESET 0x0
95867 /* Extracts the ALT_USB_DEV_DOEPCTL6_DPID field value from a register. */
95868 #define ALT_USB_DEV_DOEPCTL6_DPID_GET(value) (((value) & 0x00010000) >> 16)
95869 /* Produces a ALT_USB_DEV_DOEPCTL6_DPID register field value suitable for setting the register. */
95870 #define ALT_USB_DEV_DOEPCTL6_DPID_SET(value) (((value) << 16) & 0x00010000)
95871 
95872 /*
95873  * Field : NAK Status - naksts
95874  *
95875  * When either the application or the core sets this bit:
95876  *
95877  * * The core stops receiving any data on an OUT endpoint, even if there is space
95878  * in the RxFIFO to accommodate the incoming packet.
95879  *
95880  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
95881  * IN endpoint, even if there data is available in the TxFIFO.
95882  *
95883  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
95884  * even if there data is available in the TxFIFO.
95885  *
95886  * Irrespective of this bit's setting, the core always responds to SETUP data
95887  * packets with an ACK handshake.
95888  *
95889  * Field Enumeration Values:
95890  *
95891  * Enum | Value | Description
95892  * :-------------------------------------|:------|:------------------------------------------------
95893  * ALT_USB_DEV_DOEPCTL6_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
95894  * : | | based on the FIFO status
95895  * ALT_USB_DEV_DOEPCTL6_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
95896  * : | | endpoint
95897  *
95898  * Field Access Macros:
95899  *
95900  */
95901 /*
95902  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_NAKSTS
95903  *
95904  * The core is transmitting non-NAK handshakes based on the FIFO status
95905  */
95906 #define ALT_USB_DEV_DOEPCTL6_NAKSTS_E_NONNAK 0x0
95907 /*
95908  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_NAKSTS
95909  *
95910  * The core is transmitting NAK handshakes on this endpoint
95911  */
95912 #define ALT_USB_DEV_DOEPCTL6_NAKSTS_E_NAK 0x1
95913 
95914 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_NAKSTS register field. */
95915 #define ALT_USB_DEV_DOEPCTL6_NAKSTS_LSB 17
95916 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_NAKSTS register field. */
95917 #define ALT_USB_DEV_DOEPCTL6_NAKSTS_MSB 17
95918 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_NAKSTS register field. */
95919 #define ALT_USB_DEV_DOEPCTL6_NAKSTS_WIDTH 1
95920 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_NAKSTS register field value. */
95921 #define ALT_USB_DEV_DOEPCTL6_NAKSTS_SET_MSK 0x00020000
95922 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_NAKSTS register field value. */
95923 #define ALT_USB_DEV_DOEPCTL6_NAKSTS_CLR_MSK 0xfffdffff
95924 /* The reset value of the ALT_USB_DEV_DOEPCTL6_NAKSTS register field. */
95925 #define ALT_USB_DEV_DOEPCTL6_NAKSTS_RESET 0x0
95926 /* Extracts the ALT_USB_DEV_DOEPCTL6_NAKSTS field value from a register. */
95927 #define ALT_USB_DEV_DOEPCTL6_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
95928 /* Produces a ALT_USB_DEV_DOEPCTL6_NAKSTS register field value suitable for setting the register. */
95929 #define ALT_USB_DEV_DOEPCTL6_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
95930 
95931 /*
95932  * Field : Endpoint Type - eptype
95933  *
95934  * This is the transfer type supported by this logical endpoint.
95935  *
95936  * Field Enumeration Values:
95937  *
95938  * Enum | Value | Description
95939  * :------------------------------------------|:------|:------------
95940  * ALT_USB_DEV_DOEPCTL6_EPTYPE_E_CTL | 0x0 | Control
95941  * ALT_USB_DEV_DOEPCTL6_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
95942  * ALT_USB_DEV_DOEPCTL6_EPTYPE_E_BULK | 0x2 | Bulk
95943  * ALT_USB_DEV_DOEPCTL6_EPTYPE_E_INTERRUP | 0x3 | Interrupt
95944  *
95945  * Field Access Macros:
95946  *
95947  */
95948 /*
95949  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_EPTYPE
95950  *
95951  * Control
95952  */
95953 #define ALT_USB_DEV_DOEPCTL6_EPTYPE_E_CTL 0x0
95954 /*
95955  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_EPTYPE
95956  *
95957  * Isochronous
95958  */
95959 #define ALT_USB_DEV_DOEPCTL6_EPTYPE_E_ISOCHRONOUS 0x1
95960 /*
95961  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_EPTYPE
95962  *
95963  * Bulk
95964  */
95965 #define ALT_USB_DEV_DOEPCTL6_EPTYPE_E_BULK 0x2
95966 /*
95967  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_EPTYPE
95968  *
95969  * Interrupt
95970  */
95971 #define ALT_USB_DEV_DOEPCTL6_EPTYPE_E_INTERRUP 0x3
95972 
95973 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_EPTYPE register field. */
95974 #define ALT_USB_DEV_DOEPCTL6_EPTYPE_LSB 18
95975 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_EPTYPE register field. */
95976 #define ALT_USB_DEV_DOEPCTL6_EPTYPE_MSB 19
95977 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_EPTYPE register field. */
95978 #define ALT_USB_DEV_DOEPCTL6_EPTYPE_WIDTH 2
95979 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_EPTYPE register field value. */
95980 #define ALT_USB_DEV_DOEPCTL6_EPTYPE_SET_MSK 0x000c0000
95981 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_EPTYPE register field value. */
95982 #define ALT_USB_DEV_DOEPCTL6_EPTYPE_CLR_MSK 0xfff3ffff
95983 /* The reset value of the ALT_USB_DEV_DOEPCTL6_EPTYPE register field. */
95984 #define ALT_USB_DEV_DOEPCTL6_EPTYPE_RESET 0x0
95985 /* Extracts the ALT_USB_DEV_DOEPCTL6_EPTYPE field value from a register. */
95986 #define ALT_USB_DEV_DOEPCTL6_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
95987 /* Produces a ALT_USB_DEV_DOEPCTL6_EPTYPE register field value suitable for setting the register. */
95988 #define ALT_USB_DEV_DOEPCTL6_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
95989 
95990 /*
95991  * Field : Snoop Mode - snp
95992  *
95993  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
95994  * In Snoop mode, the core does not check the correctness of OUT packets before
95995  * transferring them to application memory.
95996  *
95997  * Field Enumeration Values:
95998  *
95999  * Enum | Value | Description
96000  * :-------------------------------|:------|:-------------------
96001  * ALT_USB_DEV_DOEPCTL6_SNP_E_DIS | 0x0 | Disable Snoop Mode
96002  * ALT_USB_DEV_DOEPCTL6_SNP_E_EN | 0x1 | Enable Snoop Mode
96003  *
96004  * Field Access Macros:
96005  *
96006  */
96007 /*
96008  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_SNP
96009  *
96010  * Disable Snoop Mode
96011  */
96012 #define ALT_USB_DEV_DOEPCTL6_SNP_E_DIS 0x0
96013 /*
96014  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_SNP
96015  *
96016  * Enable Snoop Mode
96017  */
96018 #define ALT_USB_DEV_DOEPCTL6_SNP_E_EN 0x1
96019 
96020 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_SNP register field. */
96021 #define ALT_USB_DEV_DOEPCTL6_SNP_LSB 20
96022 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_SNP register field. */
96023 #define ALT_USB_DEV_DOEPCTL6_SNP_MSB 20
96024 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_SNP register field. */
96025 #define ALT_USB_DEV_DOEPCTL6_SNP_WIDTH 1
96026 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_SNP register field value. */
96027 #define ALT_USB_DEV_DOEPCTL6_SNP_SET_MSK 0x00100000
96028 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_SNP register field value. */
96029 #define ALT_USB_DEV_DOEPCTL6_SNP_CLR_MSK 0xffefffff
96030 /* The reset value of the ALT_USB_DEV_DOEPCTL6_SNP register field. */
96031 #define ALT_USB_DEV_DOEPCTL6_SNP_RESET 0x0
96032 /* Extracts the ALT_USB_DEV_DOEPCTL6_SNP field value from a register. */
96033 #define ALT_USB_DEV_DOEPCTL6_SNP_GET(value) (((value) & 0x00100000) >> 20)
96034 /* Produces a ALT_USB_DEV_DOEPCTL6_SNP register field value suitable for setting the register. */
96035 #define ALT_USB_DEV_DOEPCTL6_SNP_SET(value) (((value) << 20) & 0x00100000)
96036 
96037 /*
96038  * Field : STALL Handshake - stall
96039  *
96040  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
96041  * application sets this bit to stall all tokens from the USB host to this
96042  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
96043  * along with this bit, the STALL bit takes priority. Only the application can
96044  * clear this bit, never the core. Applies to control endpoints only. The
96045  * application can only set this bit, and the core clears it, when a SETUP token is
96046  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
96047  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
96048  * of this bit's setting, the core always responds to SETUP data packets with an
96049  * ACK handshake.
96050  *
96051  * Field Enumeration Values:
96052  *
96053  * Enum | Value | Description
96054  * :-----------------------------------|:------|:----------------------------
96055  * ALT_USB_DEV_DOEPCTL6_STALL_E_INACT | 0x0 | STALL All Tokens not active
96056  * ALT_USB_DEV_DOEPCTL6_STALL_E_ACT | 0x1 | STALL All Tokens active
96057  *
96058  * Field Access Macros:
96059  *
96060  */
96061 /*
96062  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_STALL
96063  *
96064  * STALL All Tokens not active
96065  */
96066 #define ALT_USB_DEV_DOEPCTL6_STALL_E_INACT 0x0
96067 /*
96068  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_STALL
96069  *
96070  * STALL All Tokens active
96071  */
96072 #define ALT_USB_DEV_DOEPCTL6_STALL_E_ACT 0x1
96073 
96074 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_STALL register field. */
96075 #define ALT_USB_DEV_DOEPCTL6_STALL_LSB 21
96076 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_STALL register field. */
96077 #define ALT_USB_DEV_DOEPCTL6_STALL_MSB 21
96078 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_STALL register field. */
96079 #define ALT_USB_DEV_DOEPCTL6_STALL_WIDTH 1
96080 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_STALL register field value. */
96081 #define ALT_USB_DEV_DOEPCTL6_STALL_SET_MSK 0x00200000
96082 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_STALL register field value. */
96083 #define ALT_USB_DEV_DOEPCTL6_STALL_CLR_MSK 0xffdfffff
96084 /* The reset value of the ALT_USB_DEV_DOEPCTL6_STALL register field. */
96085 #define ALT_USB_DEV_DOEPCTL6_STALL_RESET 0x0
96086 /* Extracts the ALT_USB_DEV_DOEPCTL6_STALL field value from a register. */
96087 #define ALT_USB_DEV_DOEPCTL6_STALL_GET(value) (((value) & 0x00200000) >> 21)
96088 /* Produces a ALT_USB_DEV_DOEPCTL6_STALL register field value suitable for setting the register. */
96089 #define ALT_USB_DEV_DOEPCTL6_STALL_SET(value) (((value) << 21) & 0x00200000)
96090 
96091 /*
96092  * Field : Clear NAK - cnak
96093  *
96094  * A write to this bit clears the NAK bit for the endpoint.
96095  *
96096  * Field Enumeration Values:
96097  *
96098  * Enum | Value | Description
96099  * :----------------------------------|:------|:-------------
96100  * ALT_USB_DEV_DOEPCTL6_CNAK_E_INACT | 0x0 | No Clear NAK
96101  * ALT_USB_DEV_DOEPCTL6_CNAK_E_ACT | 0x1 | Clear NAK
96102  *
96103  * Field Access Macros:
96104  *
96105  */
96106 /*
96107  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_CNAK
96108  *
96109  * No Clear NAK
96110  */
96111 #define ALT_USB_DEV_DOEPCTL6_CNAK_E_INACT 0x0
96112 /*
96113  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_CNAK
96114  *
96115  * Clear NAK
96116  */
96117 #define ALT_USB_DEV_DOEPCTL6_CNAK_E_ACT 0x1
96118 
96119 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_CNAK register field. */
96120 #define ALT_USB_DEV_DOEPCTL6_CNAK_LSB 26
96121 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_CNAK register field. */
96122 #define ALT_USB_DEV_DOEPCTL6_CNAK_MSB 26
96123 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_CNAK register field. */
96124 #define ALT_USB_DEV_DOEPCTL6_CNAK_WIDTH 1
96125 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_CNAK register field value. */
96126 #define ALT_USB_DEV_DOEPCTL6_CNAK_SET_MSK 0x04000000
96127 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_CNAK register field value. */
96128 #define ALT_USB_DEV_DOEPCTL6_CNAK_CLR_MSK 0xfbffffff
96129 /* The reset value of the ALT_USB_DEV_DOEPCTL6_CNAK register field. */
96130 #define ALT_USB_DEV_DOEPCTL6_CNAK_RESET 0x0
96131 /* Extracts the ALT_USB_DEV_DOEPCTL6_CNAK field value from a register. */
96132 #define ALT_USB_DEV_DOEPCTL6_CNAK_GET(value) (((value) & 0x04000000) >> 26)
96133 /* Produces a ALT_USB_DEV_DOEPCTL6_CNAK register field value suitable for setting the register. */
96134 #define ALT_USB_DEV_DOEPCTL6_CNAK_SET(value) (((value) << 26) & 0x04000000)
96135 
96136 /*
96137  * Field : Set NAK - snak
96138  *
96139  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
96140  * application can control the transmission of NAK handshakes on an endpoint. The
96141  * core can also Set this bit for an endpoint after a SETUP packet is received on
96142  * that endpoint.
96143  *
96144  * Field Enumeration Values:
96145  *
96146  * Enum | Value | Description
96147  * :----------------------------------|:------|:------------
96148  * ALT_USB_DEV_DOEPCTL6_SNAK_E_INACT | 0x0 | No Set NAK
96149  * ALT_USB_DEV_DOEPCTL6_SNAK_E_ACT | 0x1 | Set NAK
96150  *
96151  * Field Access Macros:
96152  *
96153  */
96154 /*
96155  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_SNAK
96156  *
96157  * No Set NAK
96158  */
96159 #define ALT_USB_DEV_DOEPCTL6_SNAK_E_INACT 0x0
96160 /*
96161  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_SNAK
96162  *
96163  * Set NAK
96164  */
96165 #define ALT_USB_DEV_DOEPCTL6_SNAK_E_ACT 0x1
96166 
96167 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_SNAK register field. */
96168 #define ALT_USB_DEV_DOEPCTL6_SNAK_LSB 27
96169 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_SNAK register field. */
96170 #define ALT_USB_DEV_DOEPCTL6_SNAK_MSB 27
96171 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_SNAK register field. */
96172 #define ALT_USB_DEV_DOEPCTL6_SNAK_WIDTH 1
96173 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_SNAK register field value. */
96174 #define ALT_USB_DEV_DOEPCTL6_SNAK_SET_MSK 0x08000000
96175 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_SNAK register field value. */
96176 #define ALT_USB_DEV_DOEPCTL6_SNAK_CLR_MSK 0xf7ffffff
96177 /* The reset value of the ALT_USB_DEV_DOEPCTL6_SNAK register field. */
96178 #define ALT_USB_DEV_DOEPCTL6_SNAK_RESET 0x0
96179 /* Extracts the ALT_USB_DEV_DOEPCTL6_SNAK field value from a register. */
96180 #define ALT_USB_DEV_DOEPCTL6_SNAK_GET(value) (((value) & 0x08000000) >> 27)
96181 /* Produces a ALT_USB_DEV_DOEPCTL6_SNAK register field value suitable for setting the register. */
96182 #define ALT_USB_DEV_DOEPCTL6_SNAK_SET(value) (((value) << 27) & 0x08000000)
96183 
96184 /*
96185  * Field : Set DATA0 PID - setd0pid
96186  *
96187  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
96188  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
96189  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
96190  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
96191  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
96192  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
96193  * mode is enabled, this field is reserved. The frame number in which to send data
96194  * is in the transmit descriptor structure. The frame in which to receive data is
96195  * updated in receive descriptor structure.
96196  *
96197  * Field Enumeration Values:
96198  *
96199  * Enum | Value | Description
96200  * :-------------------------------------|:------|:------------------------------------
96201  * ALT_USB_DEV_DOEPCTL6_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
96202  * ALT_USB_DEV_DOEPCTL6_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
96203  *
96204  * Field Access Macros:
96205  *
96206  */
96207 /*
96208  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_SETD0PID
96209  *
96210  * Disables Set DATA0 PID
96211  */
96212 #define ALT_USB_DEV_DOEPCTL6_SETD0PID_E_DISD 0x0
96213 /*
96214  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_SETD0PID
96215  *
96216  * Enables Endpoint Data PID to DATA0)
96217  */
96218 #define ALT_USB_DEV_DOEPCTL6_SETD0PID_E_END 0x1
96219 
96220 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_SETD0PID register field. */
96221 #define ALT_USB_DEV_DOEPCTL6_SETD0PID_LSB 28
96222 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_SETD0PID register field. */
96223 #define ALT_USB_DEV_DOEPCTL6_SETD0PID_MSB 28
96224 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_SETD0PID register field. */
96225 #define ALT_USB_DEV_DOEPCTL6_SETD0PID_WIDTH 1
96226 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_SETD0PID register field value. */
96227 #define ALT_USB_DEV_DOEPCTL6_SETD0PID_SET_MSK 0x10000000
96228 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_SETD0PID register field value. */
96229 #define ALT_USB_DEV_DOEPCTL6_SETD0PID_CLR_MSK 0xefffffff
96230 /* The reset value of the ALT_USB_DEV_DOEPCTL6_SETD0PID register field. */
96231 #define ALT_USB_DEV_DOEPCTL6_SETD0PID_RESET 0x0
96232 /* Extracts the ALT_USB_DEV_DOEPCTL6_SETD0PID field value from a register. */
96233 #define ALT_USB_DEV_DOEPCTL6_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
96234 /* Produces a ALT_USB_DEV_DOEPCTL6_SETD0PID register field value suitable for setting the register. */
96235 #define ALT_USB_DEV_DOEPCTL6_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
96236 
96237 /*
96238  * Field : Set DATA1 PID - setd1pid
96239  *
96240  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
96241  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
96242  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
96243  *
96244  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
96245  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
96246  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
96247  *
96248  * Field Enumeration Values:
96249  *
96250  * Enum | Value | Description
96251  * :-------------------------------------|:------|:-----------------------
96252  * ALT_USB_DEV_DOEPCTL6_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
96253  * ALT_USB_DEV_DOEPCTL6_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
96254  *
96255  * Field Access Macros:
96256  *
96257  */
96258 /*
96259  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_SETD1PID
96260  *
96261  * Disables Set DATA1 PID
96262  */
96263 #define ALT_USB_DEV_DOEPCTL6_SETD1PID_E_DISD 0x0
96264 /*
96265  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_SETD1PID
96266  *
96267  * Enables Set DATA1 PID
96268  */
96269 #define ALT_USB_DEV_DOEPCTL6_SETD1PID_E_END 0x1
96270 
96271 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_SETD1PID register field. */
96272 #define ALT_USB_DEV_DOEPCTL6_SETD1PID_LSB 29
96273 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_SETD1PID register field. */
96274 #define ALT_USB_DEV_DOEPCTL6_SETD1PID_MSB 29
96275 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_SETD1PID register field. */
96276 #define ALT_USB_DEV_DOEPCTL6_SETD1PID_WIDTH 1
96277 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_SETD1PID register field value. */
96278 #define ALT_USB_DEV_DOEPCTL6_SETD1PID_SET_MSK 0x20000000
96279 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_SETD1PID register field value. */
96280 #define ALT_USB_DEV_DOEPCTL6_SETD1PID_CLR_MSK 0xdfffffff
96281 /* The reset value of the ALT_USB_DEV_DOEPCTL6_SETD1PID register field. */
96282 #define ALT_USB_DEV_DOEPCTL6_SETD1PID_RESET 0x0
96283 /* Extracts the ALT_USB_DEV_DOEPCTL6_SETD1PID field value from a register. */
96284 #define ALT_USB_DEV_DOEPCTL6_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
96285 /* Produces a ALT_USB_DEV_DOEPCTL6_SETD1PID register field value suitable for setting the register. */
96286 #define ALT_USB_DEV_DOEPCTL6_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
96287 
96288 /*
96289  * Field : Endpoint Disable - epdis
96290  *
96291  * Applies to IN and OUT endpoints. The application sets this bit to stop
96292  * transmitting/receiving data on an endpoint, even before the transfer for that
96293  * endpoint is complete. The application must wait for the Endpoint Disabled
96294  * interrupt before treating the endpoint as disabled. The core clears this bit
96295  * before setting the Endpoint Disabled interrupt. The application must set this
96296  * bit only if Endpoint Enable is already set for this endpoint.
96297  *
96298  * Field Enumeration Values:
96299  *
96300  * Enum | Value | Description
96301  * :-----------------------------------|:------|:--------------------
96302  * ALT_USB_DEV_DOEPCTL6_EPDIS_E_INACT | 0x0 | No Endpoint Disable
96303  * ALT_USB_DEV_DOEPCTL6_EPDIS_E_ACT | 0x1 | Endpoint Disable
96304  *
96305  * Field Access Macros:
96306  *
96307  */
96308 /*
96309  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_EPDIS
96310  *
96311  * No Endpoint Disable
96312  */
96313 #define ALT_USB_DEV_DOEPCTL6_EPDIS_E_INACT 0x0
96314 /*
96315  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_EPDIS
96316  *
96317  * Endpoint Disable
96318  */
96319 #define ALT_USB_DEV_DOEPCTL6_EPDIS_E_ACT 0x1
96320 
96321 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_EPDIS register field. */
96322 #define ALT_USB_DEV_DOEPCTL6_EPDIS_LSB 30
96323 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_EPDIS register field. */
96324 #define ALT_USB_DEV_DOEPCTL6_EPDIS_MSB 30
96325 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_EPDIS register field. */
96326 #define ALT_USB_DEV_DOEPCTL6_EPDIS_WIDTH 1
96327 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_EPDIS register field value. */
96328 #define ALT_USB_DEV_DOEPCTL6_EPDIS_SET_MSK 0x40000000
96329 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_EPDIS register field value. */
96330 #define ALT_USB_DEV_DOEPCTL6_EPDIS_CLR_MSK 0xbfffffff
96331 /* The reset value of the ALT_USB_DEV_DOEPCTL6_EPDIS register field. */
96332 #define ALT_USB_DEV_DOEPCTL6_EPDIS_RESET 0x0
96333 /* Extracts the ALT_USB_DEV_DOEPCTL6_EPDIS field value from a register. */
96334 #define ALT_USB_DEV_DOEPCTL6_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
96335 /* Produces a ALT_USB_DEV_DOEPCTL6_EPDIS register field value suitable for setting the register. */
96336 #define ALT_USB_DEV_DOEPCTL6_EPDIS_SET(value) (((value) << 30) & 0x40000000)
96337 
96338 /*
96339  * Field : Endpoint Enable - epena
96340  *
96341  * Applies to IN and OUT endpoints.
96342  *
96343  * * When Scatter/Gather DMA mode is enabled,
96344  *
96345  * * for IN endpoints this bit indicates that the descriptor structure and data
96346  * buffer with data ready to transmit is setup.
96347  *
96348  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
96349  * receive data is setup.
96350  *
96351  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
96352  * mode:
96353  *
96354  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
96355  * the endpoint.
96356  *
96357  * * for OUT endpoints, this bit indicates that the application has allocated the
96358  * memory to start receiving data from the USB.
96359  *
96360  * * The core clears this bit before setting any of the following interrupts on
96361  * this endpoint:
96362  *
96363  * * SETUP Phase Done
96364  *
96365  * * Endpoint Disabled
96366  *
96367  * * Transfer Completed
96368  *
96369  * for control endpoints in DMA mode, this bit must be set to be able to transfer
96370  * SETUP data packets in memory.
96371  *
96372  * Field Enumeration Values:
96373  *
96374  * Enum | Value | Description
96375  * :-----------------------------------|:------|:-------------------------
96376  * ALT_USB_DEV_DOEPCTL6_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
96377  * ALT_USB_DEV_DOEPCTL6_EPENA_E_ACT | 0x1 | Endpoint Enable active
96378  *
96379  * Field Access Macros:
96380  *
96381  */
96382 /*
96383  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_EPENA
96384  *
96385  * Endpoint Enable inactive
96386  */
96387 #define ALT_USB_DEV_DOEPCTL6_EPENA_E_INACT 0x0
96388 /*
96389  * Enumerated value for register field ALT_USB_DEV_DOEPCTL6_EPENA
96390  *
96391  * Endpoint Enable active
96392  */
96393 #define ALT_USB_DEV_DOEPCTL6_EPENA_E_ACT 0x1
96394 
96395 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL6_EPENA register field. */
96396 #define ALT_USB_DEV_DOEPCTL6_EPENA_LSB 31
96397 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL6_EPENA register field. */
96398 #define ALT_USB_DEV_DOEPCTL6_EPENA_MSB 31
96399 /* The width in bits of the ALT_USB_DEV_DOEPCTL6_EPENA register field. */
96400 #define ALT_USB_DEV_DOEPCTL6_EPENA_WIDTH 1
96401 /* The mask used to set the ALT_USB_DEV_DOEPCTL6_EPENA register field value. */
96402 #define ALT_USB_DEV_DOEPCTL6_EPENA_SET_MSK 0x80000000
96403 /* The mask used to clear the ALT_USB_DEV_DOEPCTL6_EPENA register field value. */
96404 #define ALT_USB_DEV_DOEPCTL6_EPENA_CLR_MSK 0x7fffffff
96405 /* The reset value of the ALT_USB_DEV_DOEPCTL6_EPENA register field. */
96406 #define ALT_USB_DEV_DOEPCTL6_EPENA_RESET 0x0
96407 /* Extracts the ALT_USB_DEV_DOEPCTL6_EPENA field value from a register. */
96408 #define ALT_USB_DEV_DOEPCTL6_EPENA_GET(value) (((value) & 0x80000000) >> 31)
96409 /* Produces a ALT_USB_DEV_DOEPCTL6_EPENA register field value suitable for setting the register. */
96410 #define ALT_USB_DEV_DOEPCTL6_EPENA_SET(value) (((value) << 31) & 0x80000000)
96411 
96412 #ifndef __ASSEMBLY__
96413 /*
96414  * WARNING: The C register and register group struct declarations are provided for
96415  * convenience and illustrative purposes. They should, however, be used with
96416  * caution as the C language standard provides no guarantees about the alignment or
96417  * atomicity of device memory accesses. The recommended practice for writing
96418  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
96419  * alt_write_word() functions.
96420  *
96421  * The struct declaration for register ALT_USB_DEV_DOEPCTL6.
96422  */
96423 struct ALT_USB_DEV_DOEPCTL6_s
96424 {
96425  uint32_t mps : 11; /* Maximum Packet Size */
96426  uint32_t : 4; /* *UNDEFINED* */
96427  uint32_t usbactep : 1; /* USB Active Endpoint */
96428  const uint32_t dpid : 1; /* Endpoint Data PID */
96429  const uint32_t naksts : 1; /* NAK Status */
96430  uint32_t eptype : 2; /* Endpoint Type */
96431  uint32_t snp : 1; /* Snoop Mode */
96432  const uint32_t stall : 1; /* STALL Handshake */
96433  uint32_t : 4; /* *UNDEFINED* */
96434  uint32_t cnak : 1; /* Clear NAK */
96435  uint32_t snak : 1; /* Set NAK */
96436  uint32_t setd0pid : 1; /* Set DATA0 PID */
96437  uint32_t setd1pid : 1; /* Set DATA1 PID */
96438  const uint32_t epdis : 1; /* Endpoint Disable */
96439  const uint32_t epena : 1; /* Endpoint Enable */
96440 };
96441 
96442 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL6. */
96443 typedef volatile struct ALT_USB_DEV_DOEPCTL6_s ALT_USB_DEV_DOEPCTL6_t;
96444 #endif /* __ASSEMBLY__ */
96445 
96446 /* The byte offset of the ALT_USB_DEV_DOEPCTL6 register from the beginning of the component. */
96447 #define ALT_USB_DEV_DOEPCTL6_OFST 0x3c0
96448 /* The address of the ALT_USB_DEV_DOEPCTL6 register. */
96449 #define ALT_USB_DEV_DOEPCTL6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL6_OFST))
96450 
96451 /*
96452  * Register : Device OUT Endpoint 6 Interrupt Register - doepint6
96453  *
96454  * This register indicates the status of an endpoint with respect to USB- and AHB-
96455  * related events. The application must read this register when the OUT Endpoints
96456  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
96457  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
96458  * can read this register, it must first read the Device All Endpoints Interrupt
96459  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
96460  * Interrupt register. The application must clear the appropriate bit in this
96461  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
96462  *
96463  * Register Layout
96464  *
96465  * Bits | Access | Reset | Description
96466  * :--------|:-------|:------|:------------------------------------------
96467  * [0] | R | 0x0 | Transfer Completed Interrupt
96468  * [1] | R | 0x0 | Endpoint Disabled Interrupt
96469  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT6_AHBERR
96470  * [3] | R | 0x0 | SETUP Phase Done
96471  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
96472  * [5] | R | 0x0 | Status Phase Received for Control Write
96473  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
96474  * [7] | ??? | 0x0 | *UNDEFINED*
96475  * [8] | R | 0x0 | OUT Packet Error
96476  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
96477  * [10] | ??? | 0x0 | *UNDEFINED*
96478  * [11] | R | 0x0 | Packet Drop Status
96479  * [12] | R | 0x0 | BbleErr Interrupt
96480  * [13] | R | 0x0 | NAK Interrupt
96481  * [14] | R | 0x0 | NYET Interrupt
96482  * [31:15] | ??? | 0x0 | *UNDEFINED*
96483  *
96484  */
96485 /*
96486  * Field : Transfer Completed Interrupt - xfercompl
96487  *
96488  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
96489  *
96490  * This field indicates that the requested data from the internal FIFO is moved to
96491  * external system memory. This interrupt is generated only when the corresponding
96492  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
96493  * is Set.
96494  *
96495  * When Scatter/Gather DMA mode is disabled, this field indicates that the
96496  * programmed transfer is complete on the AHB as well as on the USB, for this
96497  * endpoint.
96498  *
96499  * Field Enumeration Values:
96500  *
96501  * Enum | Value | Description
96502  * :---------------------------------------|:------|:-----------------------------
96503  * ALT_USB_DEV_DOEPINT6_XFERCOMPL_E_INACT | 0x0 | No Interrupt
96504  * ALT_USB_DEV_DOEPINT6_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
96505  *
96506  * Field Access Macros:
96507  *
96508  */
96509 /*
96510  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_XFERCOMPL
96511  *
96512  * No Interrupt
96513  */
96514 #define ALT_USB_DEV_DOEPINT6_XFERCOMPL_E_INACT 0x0
96515 /*
96516  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_XFERCOMPL
96517  *
96518  * Transfer Completed Interrupt
96519  */
96520 #define ALT_USB_DEV_DOEPINT6_XFERCOMPL_E_ACT 0x1
96521 
96522 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_XFERCOMPL register field. */
96523 #define ALT_USB_DEV_DOEPINT6_XFERCOMPL_LSB 0
96524 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_XFERCOMPL register field. */
96525 #define ALT_USB_DEV_DOEPINT6_XFERCOMPL_MSB 0
96526 /* The width in bits of the ALT_USB_DEV_DOEPINT6_XFERCOMPL register field. */
96527 #define ALT_USB_DEV_DOEPINT6_XFERCOMPL_WIDTH 1
96528 /* The mask used to set the ALT_USB_DEV_DOEPINT6_XFERCOMPL register field value. */
96529 #define ALT_USB_DEV_DOEPINT6_XFERCOMPL_SET_MSK 0x00000001
96530 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_XFERCOMPL register field value. */
96531 #define ALT_USB_DEV_DOEPINT6_XFERCOMPL_CLR_MSK 0xfffffffe
96532 /* The reset value of the ALT_USB_DEV_DOEPINT6_XFERCOMPL register field. */
96533 #define ALT_USB_DEV_DOEPINT6_XFERCOMPL_RESET 0x0
96534 /* Extracts the ALT_USB_DEV_DOEPINT6_XFERCOMPL field value from a register. */
96535 #define ALT_USB_DEV_DOEPINT6_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
96536 /* Produces a ALT_USB_DEV_DOEPINT6_XFERCOMPL register field value suitable for setting the register. */
96537 #define ALT_USB_DEV_DOEPINT6_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
96538 
96539 /*
96540  * Field : Endpoint Disabled Interrupt - epdisbld
96541  *
96542  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
96543  * disabled per the application's request.
96544  *
96545  * Field Enumeration Values:
96546  *
96547  * Enum | Value | Description
96548  * :--------------------------------------|:------|:----------------------------
96549  * ALT_USB_DEV_DOEPINT6_EPDISBLD_E_INACT | 0x0 | No Interrupt
96550  * ALT_USB_DEV_DOEPINT6_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
96551  *
96552  * Field Access Macros:
96553  *
96554  */
96555 /*
96556  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_EPDISBLD
96557  *
96558  * No Interrupt
96559  */
96560 #define ALT_USB_DEV_DOEPINT6_EPDISBLD_E_INACT 0x0
96561 /*
96562  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_EPDISBLD
96563  *
96564  * Endpoint Disabled Interrupt
96565  */
96566 #define ALT_USB_DEV_DOEPINT6_EPDISBLD_E_ACT 0x1
96567 
96568 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_EPDISBLD register field. */
96569 #define ALT_USB_DEV_DOEPINT6_EPDISBLD_LSB 1
96570 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_EPDISBLD register field. */
96571 #define ALT_USB_DEV_DOEPINT6_EPDISBLD_MSB 1
96572 /* The width in bits of the ALT_USB_DEV_DOEPINT6_EPDISBLD register field. */
96573 #define ALT_USB_DEV_DOEPINT6_EPDISBLD_WIDTH 1
96574 /* The mask used to set the ALT_USB_DEV_DOEPINT6_EPDISBLD register field value. */
96575 #define ALT_USB_DEV_DOEPINT6_EPDISBLD_SET_MSK 0x00000002
96576 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_EPDISBLD register field value. */
96577 #define ALT_USB_DEV_DOEPINT6_EPDISBLD_CLR_MSK 0xfffffffd
96578 /* The reset value of the ALT_USB_DEV_DOEPINT6_EPDISBLD register field. */
96579 #define ALT_USB_DEV_DOEPINT6_EPDISBLD_RESET 0x0
96580 /* Extracts the ALT_USB_DEV_DOEPINT6_EPDISBLD field value from a register. */
96581 #define ALT_USB_DEV_DOEPINT6_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
96582 /* Produces a ALT_USB_DEV_DOEPINT6_EPDISBLD register field value suitable for setting the register. */
96583 #define ALT_USB_DEV_DOEPINT6_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
96584 
96585 /*
96586  * Field : ahberr
96587  *
96588  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
96589  * there is an AHB error during an AHB read/write. The application can read the
96590  * corresponding endpoint DMA address register to get the error address.
96591  *
96592  * Field Enumeration Values:
96593  *
96594  * Enum | Value | Description
96595  * :------------------------------------|:------|:--------------------
96596  * ALT_USB_DEV_DOEPINT6_AHBERR_E_INACT | 0x0 | No Interrupt
96597  * ALT_USB_DEV_DOEPINT6_AHBERR_E_ACT | 0x1 | AHB Error interrupt
96598  *
96599  * Field Access Macros:
96600  *
96601  */
96602 /*
96603  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_AHBERR
96604  *
96605  * No Interrupt
96606  */
96607 #define ALT_USB_DEV_DOEPINT6_AHBERR_E_INACT 0x0
96608 /*
96609  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_AHBERR
96610  *
96611  * AHB Error interrupt
96612  */
96613 #define ALT_USB_DEV_DOEPINT6_AHBERR_E_ACT 0x1
96614 
96615 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_AHBERR register field. */
96616 #define ALT_USB_DEV_DOEPINT6_AHBERR_LSB 2
96617 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_AHBERR register field. */
96618 #define ALT_USB_DEV_DOEPINT6_AHBERR_MSB 2
96619 /* The width in bits of the ALT_USB_DEV_DOEPINT6_AHBERR register field. */
96620 #define ALT_USB_DEV_DOEPINT6_AHBERR_WIDTH 1
96621 /* The mask used to set the ALT_USB_DEV_DOEPINT6_AHBERR register field value. */
96622 #define ALT_USB_DEV_DOEPINT6_AHBERR_SET_MSK 0x00000004
96623 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_AHBERR register field value. */
96624 #define ALT_USB_DEV_DOEPINT6_AHBERR_CLR_MSK 0xfffffffb
96625 /* The reset value of the ALT_USB_DEV_DOEPINT6_AHBERR register field. */
96626 #define ALT_USB_DEV_DOEPINT6_AHBERR_RESET 0x0
96627 /* Extracts the ALT_USB_DEV_DOEPINT6_AHBERR field value from a register. */
96628 #define ALT_USB_DEV_DOEPINT6_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
96629 /* Produces a ALT_USB_DEV_DOEPINT6_AHBERR register field value suitable for setting the register. */
96630 #define ALT_USB_DEV_DOEPINT6_AHBERR_SET(value) (((value) << 2) & 0x00000004)
96631 
96632 /*
96633  * Field : SETUP Phase Done - setup
96634  *
96635  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
96636  * control endpoint is complete and no more back-to-back SETUP packets were
96637  * received for the current control transfer. On this interrupt, the application
96638  * can decode the received SETUP data packet.
96639  *
96640  * Field Enumeration Values:
96641  *
96642  * Enum | Value | Description
96643  * :-----------------------------------|:------|:--------------------
96644  * ALT_USB_DEV_DOEPINT6_SETUP_E_INACT | 0x0 | No SETUP Phase Done
96645  * ALT_USB_DEV_DOEPINT6_SETUP_E_ACT | 0x1 | SETUP Phase Done
96646  *
96647  * Field Access Macros:
96648  *
96649  */
96650 /*
96651  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_SETUP
96652  *
96653  * No SETUP Phase Done
96654  */
96655 #define ALT_USB_DEV_DOEPINT6_SETUP_E_INACT 0x0
96656 /*
96657  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_SETUP
96658  *
96659  * SETUP Phase Done
96660  */
96661 #define ALT_USB_DEV_DOEPINT6_SETUP_E_ACT 0x1
96662 
96663 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_SETUP register field. */
96664 #define ALT_USB_DEV_DOEPINT6_SETUP_LSB 3
96665 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_SETUP register field. */
96666 #define ALT_USB_DEV_DOEPINT6_SETUP_MSB 3
96667 /* The width in bits of the ALT_USB_DEV_DOEPINT6_SETUP register field. */
96668 #define ALT_USB_DEV_DOEPINT6_SETUP_WIDTH 1
96669 /* The mask used to set the ALT_USB_DEV_DOEPINT6_SETUP register field value. */
96670 #define ALT_USB_DEV_DOEPINT6_SETUP_SET_MSK 0x00000008
96671 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_SETUP register field value. */
96672 #define ALT_USB_DEV_DOEPINT6_SETUP_CLR_MSK 0xfffffff7
96673 /* The reset value of the ALT_USB_DEV_DOEPINT6_SETUP register field. */
96674 #define ALT_USB_DEV_DOEPINT6_SETUP_RESET 0x0
96675 /* Extracts the ALT_USB_DEV_DOEPINT6_SETUP field value from a register. */
96676 #define ALT_USB_DEV_DOEPINT6_SETUP_GET(value) (((value) & 0x00000008) >> 3)
96677 /* Produces a ALT_USB_DEV_DOEPINT6_SETUP register field value suitable for setting the register. */
96678 #define ALT_USB_DEV_DOEPINT6_SETUP_SET(value) (((value) << 3) & 0x00000008)
96679 
96680 /*
96681  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
96682  *
96683  * Applies only to control OUT endpoints. Indicates that an OUT token was received
96684  * when the endpoint was not yet enabled. This interrupt is asserted on the
96685  * endpoint for which the OUT token was received.
96686  *
96687  * Field Enumeration Values:
96688  *
96689  * Enum | Value | Description
96690  * :-----------------------------------------|:------|:---------------------------------------------
96691  * ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
96692  * ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
96693  *
96694  * Field Access Macros:
96695  *
96696  */
96697 /*
96698  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS
96699  *
96700  * No OUT Token Received When Endpoint Disabled
96701  */
96702 #define ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS_E_INACT 0x0
96703 /*
96704  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS
96705  *
96706  * OUT Token Received When Endpoint Disabled
96707  */
96708 #define ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS_E_ACT 0x1
96709 
96710 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS register field. */
96711 #define ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS_LSB 4
96712 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS register field. */
96713 #define ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS_MSB 4
96714 /* The width in bits of the ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS register field. */
96715 #define ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS_WIDTH 1
96716 /* The mask used to set the ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS register field value. */
96717 #define ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS_SET_MSK 0x00000010
96718 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS register field value. */
96719 #define ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS_CLR_MSK 0xffffffef
96720 /* The reset value of the ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS register field. */
96721 #define ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS_RESET 0x0
96722 /* Extracts the ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS field value from a register. */
96723 #define ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
96724 /* Produces a ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS register field value suitable for setting the register. */
96725 #define ALT_USB_DEV_DOEPINT6_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
96726 
96727 /*
96728  * Field : Status Phase Received for Control Write - stsphsercvd
96729  *
96730  * This interrupt is valid only for Control OUT endpoints and only in Scatter
96731  * Gather DMA mode. This interrupt is generated only after the core has transferred
96732  * all the data that the host has sent during the data phase of a control write
96733  * transfer, to the system memory buffer. The interrupt indicates to the
96734  * application that the host has switched from data phase to the status phase of a
96735  * Control Write transfer. The application can use this interrupt to ACK or STALL
96736  * the Status phase, after it has decoded the data phase. This is applicable only
96737  * in Case of Scatter Gather DMA mode.
96738  *
96739  * Field Enumeration Values:
96740  *
96741  * Enum | Value | Description
96742  * :-----------------------------------------|:------|:-------------------------------------------
96743  * ALT_USB_DEV_DOEPINT6_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
96744  * ALT_USB_DEV_DOEPINT6_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
96745  *
96746  * Field Access Macros:
96747  *
96748  */
96749 /*
96750  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_STSPHSERCVD
96751  *
96752  * No Status Phase Received for Control Write
96753  */
96754 #define ALT_USB_DEV_DOEPINT6_STSPHSERCVD_E_INACT 0x0
96755 /*
96756  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_STSPHSERCVD
96757  *
96758  * Status Phase Received for Control Write
96759  */
96760 #define ALT_USB_DEV_DOEPINT6_STSPHSERCVD_E_ACT 0x1
96761 
96762 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_STSPHSERCVD register field. */
96763 #define ALT_USB_DEV_DOEPINT6_STSPHSERCVD_LSB 5
96764 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_STSPHSERCVD register field. */
96765 #define ALT_USB_DEV_DOEPINT6_STSPHSERCVD_MSB 5
96766 /* The width in bits of the ALT_USB_DEV_DOEPINT6_STSPHSERCVD register field. */
96767 #define ALT_USB_DEV_DOEPINT6_STSPHSERCVD_WIDTH 1
96768 /* The mask used to set the ALT_USB_DEV_DOEPINT6_STSPHSERCVD register field value. */
96769 #define ALT_USB_DEV_DOEPINT6_STSPHSERCVD_SET_MSK 0x00000020
96770 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_STSPHSERCVD register field value. */
96771 #define ALT_USB_DEV_DOEPINT6_STSPHSERCVD_CLR_MSK 0xffffffdf
96772 /* The reset value of the ALT_USB_DEV_DOEPINT6_STSPHSERCVD register field. */
96773 #define ALT_USB_DEV_DOEPINT6_STSPHSERCVD_RESET 0x0
96774 /* Extracts the ALT_USB_DEV_DOEPINT6_STSPHSERCVD field value from a register. */
96775 #define ALT_USB_DEV_DOEPINT6_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
96776 /* Produces a ALT_USB_DEV_DOEPINT6_STSPHSERCVD register field value suitable for setting the register. */
96777 #define ALT_USB_DEV_DOEPINT6_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
96778 
96779 /*
96780  * Field : Back-to-Back SETUP Packets Received - back2backsetup
96781  *
96782  * Applies to Control OUT endpoints only. This bit indicates that the core has
96783  * received more than three back-to-back SETUP packets for this particular
96784  * endpoint. for information about handling this interrupt,
96785  *
96786  * Field Enumeration Values:
96787  *
96788  * Enum | Value | Description
96789  * :--------------------------------------------|:------|:---------------------------------------
96790  * ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
96791  * ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
96792  *
96793  * Field Access Macros:
96794  *
96795  */
96796 /*
96797  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP
96798  *
96799  * No Back-to-Back SETUP Packets Received
96800  */
96801 #define ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP_E_INACT 0x0
96802 /*
96803  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP
96804  *
96805  * Back-to-Back SETUP Packets Received
96806  */
96807 #define ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP_E_ACT 0x1
96808 
96809 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP register field. */
96810 #define ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP_LSB 6
96811 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP register field. */
96812 #define ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP_MSB 6
96813 /* The width in bits of the ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP register field. */
96814 #define ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP_WIDTH 1
96815 /* The mask used to set the ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP register field value. */
96816 #define ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP_SET_MSK 0x00000040
96817 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP register field value. */
96818 #define ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP_CLR_MSK 0xffffffbf
96819 /* The reset value of the ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP register field. */
96820 #define ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP_RESET 0x0
96821 /* Extracts the ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP field value from a register. */
96822 #define ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
96823 /* Produces a ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP register field value suitable for setting the register. */
96824 #define ALT_USB_DEV_DOEPINT6_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
96825 
96826 /*
96827  * Field : OUT Packet Error - outpkterr
96828  *
96829  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
96830  * an overflow or a CRC error for non-Isochronous OUT packet.
96831  *
96832  * Field Enumeration Values:
96833  *
96834  * Enum | Value | Description
96835  * :---------------------------------------|:------|:--------------------
96836  * ALT_USB_DEV_DOEPINT6_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
96837  * ALT_USB_DEV_DOEPINT6_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
96838  *
96839  * Field Access Macros:
96840  *
96841  */
96842 /*
96843  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_OUTPKTERR
96844  *
96845  * No OUT Packet Error
96846  */
96847 #define ALT_USB_DEV_DOEPINT6_OUTPKTERR_E_INACT 0x0
96848 /*
96849  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_OUTPKTERR
96850  *
96851  * OUT Packet Error
96852  */
96853 #define ALT_USB_DEV_DOEPINT6_OUTPKTERR_E_ACT 0x1
96854 
96855 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_OUTPKTERR register field. */
96856 #define ALT_USB_DEV_DOEPINT6_OUTPKTERR_LSB 8
96857 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_OUTPKTERR register field. */
96858 #define ALT_USB_DEV_DOEPINT6_OUTPKTERR_MSB 8
96859 /* The width in bits of the ALT_USB_DEV_DOEPINT6_OUTPKTERR register field. */
96860 #define ALT_USB_DEV_DOEPINT6_OUTPKTERR_WIDTH 1
96861 /* The mask used to set the ALT_USB_DEV_DOEPINT6_OUTPKTERR register field value. */
96862 #define ALT_USB_DEV_DOEPINT6_OUTPKTERR_SET_MSK 0x00000100
96863 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_OUTPKTERR register field value. */
96864 #define ALT_USB_DEV_DOEPINT6_OUTPKTERR_CLR_MSK 0xfffffeff
96865 /* The reset value of the ALT_USB_DEV_DOEPINT6_OUTPKTERR register field. */
96866 #define ALT_USB_DEV_DOEPINT6_OUTPKTERR_RESET 0x0
96867 /* Extracts the ALT_USB_DEV_DOEPINT6_OUTPKTERR field value from a register. */
96868 #define ALT_USB_DEV_DOEPINT6_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
96869 /* Produces a ALT_USB_DEV_DOEPINT6_OUTPKTERR register field value suitable for setting the register. */
96870 #define ALT_USB_DEV_DOEPINT6_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
96871 
96872 /*
96873  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
96874  *
96875  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
96876  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
96877  * the descriptor accessed is not ready for the Core to process, such as Host busy
96878  * or DMA done
96879  *
96880  * Field Enumeration Values:
96881  *
96882  * Enum | Value | Description
96883  * :-------------------------------------|:------|:--------------
96884  * ALT_USB_DEV_DOEPINT6_BNAINTR_E_INACT | 0x0 | No interrupt
96885  * ALT_USB_DEV_DOEPINT6_BNAINTR_E_ACT | 0x1 | BNA interrupt
96886  *
96887  * Field Access Macros:
96888  *
96889  */
96890 /*
96891  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_BNAINTR
96892  *
96893  * No interrupt
96894  */
96895 #define ALT_USB_DEV_DOEPINT6_BNAINTR_E_INACT 0x0
96896 /*
96897  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_BNAINTR
96898  *
96899  * BNA interrupt
96900  */
96901 #define ALT_USB_DEV_DOEPINT6_BNAINTR_E_ACT 0x1
96902 
96903 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_BNAINTR register field. */
96904 #define ALT_USB_DEV_DOEPINT6_BNAINTR_LSB 9
96905 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_BNAINTR register field. */
96906 #define ALT_USB_DEV_DOEPINT6_BNAINTR_MSB 9
96907 /* The width in bits of the ALT_USB_DEV_DOEPINT6_BNAINTR register field. */
96908 #define ALT_USB_DEV_DOEPINT6_BNAINTR_WIDTH 1
96909 /* The mask used to set the ALT_USB_DEV_DOEPINT6_BNAINTR register field value. */
96910 #define ALT_USB_DEV_DOEPINT6_BNAINTR_SET_MSK 0x00000200
96911 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_BNAINTR register field value. */
96912 #define ALT_USB_DEV_DOEPINT6_BNAINTR_CLR_MSK 0xfffffdff
96913 /* The reset value of the ALT_USB_DEV_DOEPINT6_BNAINTR register field. */
96914 #define ALT_USB_DEV_DOEPINT6_BNAINTR_RESET 0x0
96915 /* Extracts the ALT_USB_DEV_DOEPINT6_BNAINTR field value from a register. */
96916 #define ALT_USB_DEV_DOEPINT6_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
96917 /* Produces a ALT_USB_DEV_DOEPINT6_BNAINTR register field value suitable for setting the register. */
96918 #define ALT_USB_DEV_DOEPINT6_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
96919 
96920 /*
96921  * Field : Packet Drop Status - pktdrpsts
96922  *
96923  * This bit indicates to the application that an ISOC OUT packet has been dropped.
96924  * This bit does not have an associated mask bit and does not generate an
96925  * interrupt.
96926  *
96927  * Field Enumeration Values:
96928  *
96929  * Enum | Value | Description
96930  * :---------------------------------------|:------|:-----------------------------
96931  * ALT_USB_DEV_DOEPINT6_PKTDRPSTS_E_INACT | 0x0 | No interrupt
96932  * ALT_USB_DEV_DOEPINT6_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
96933  *
96934  * Field Access Macros:
96935  *
96936  */
96937 /*
96938  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_PKTDRPSTS
96939  *
96940  * No interrupt
96941  */
96942 #define ALT_USB_DEV_DOEPINT6_PKTDRPSTS_E_INACT 0x0
96943 /*
96944  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_PKTDRPSTS
96945  *
96946  * Packet Drop Status interrupt
96947  */
96948 #define ALT_USB_DEV_DOEPINT6_PKTDRPSTS_E_ACT 0x1
96949 
96950 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_PKTDRPSTS register field. */
96951 #define ALT_USB_DEV_DOEPINT6_PKTDRPSTS_LSB 11
96952 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_PKTDRPSTS register field. */
96953 #define ALT_USB_DEV_DOEPINT6_PKTDRPSTS_MSB 11
96954 /* The width in bits of the ALT_USB_DEV_DOEPINT6_PKTDRPSTS register field. */
96955 #define ALT_USB_DEV_DOEPINT6_PKTDRPSTS_WIDTH 1
96956 /* The mask used to set the ALT_USB_DEV_DOEPINT6_PKTDRPSTS register field value. */
96957 #define ALT_USB_DEV_DOEPINT6_PKTDRPSTS_SET_MSK 0x00000800
96958 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_PKTDRPSTS register field value. */
96959 #define ALT_USB_DEV_DOEPINT6_PKTDRPSTS_CLR_MSK 0xfffff7ff
96960 /* The reset value of the ALT_USB_DEV_DOEPINT6_PKTDRPSTS register field. */
96961 #define ALT_USB_DEV_DOEPINT6_PKTDRPSTS_RESET 0x0
96962 /* Extracts the ALT_USB_DEV_DOEPINT6_PKTDRPSTS field value from a register. */
96963 #define ALT_USB_DEV_DOEPINT6_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
96964 /* Produces a ALT_USB_DEV_DOEPINT6_PKTDRPSTS register field value suitable for setting the register. */
96965 #define ALT_USB_DEV_DOEPINT6_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
96966 
96967 /*
96968  * Field : BbleErr Interrupt - bbleerr
96969  *
96970  * The core generates this interrupt when babble is received for the endpoint.
96971  *
96972  * Field Enumeration Values:
96973  *
96974  * Enum | Value | Description
96975  * :-------------------------------------|:------|:------------------
96976  * ALT_USB_DEV_DOEPINT6_BBLEERR_E_INACT | 0x0 | No interrupt
96977  * ALT_USB_DEV_DOEPINT6_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
96978  *
96979  * Field Access Macros:
96980  *
96981  */
96982 /*
96983  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_BBLEERR
96984  *
96985  * No interrupt
96986  */
96987 #define ALT_USB_DEV_DOEPINT6_BBLEERR_E_INACT 0x0
96988 /*
96989  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_BBLEERR
96990  *
96991  * BbleErr interrupt
96992  */
96993 #define ALT_USB_DEV_DOEPINT6_BBLEERR_E_ACT 0x1
96994 
96995 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_BBLEERR register field. */
96996 #define ALT_USB_DEV_DOEPINT6_BBLEERR_LSB 12
96997 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_BBLEERR register field. */
96998 #define ALT_USB_DEV_DOEPINT6_BBLEERR_MSB 12
96999 /* The width in bits of the ALT_USB_DEV_DOEPINT6_BBLEERR register field. */
97000 #define ALT_USB_DEV_DOEPINT6_BBLEERR_WIDTH 1
97001 /* The mask used to set the ALT_USB_DEV_DOEPINT6_BBLEERR register field value. */
97002 #define ALT_USB_DEV_DOEPINT6_BBLEERR_SET_MSK 0x00001000
97003 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_BBLEERR register field value. */
97004 #define ALT_USB_DEV_DOEPINT6_BBLEERR_CLR_MSK 0xffffefff
97005 /* The reset value of the ALT_USB_DEV_DOEPINT6_BBLEERR register field. */
97006 #define ALT_USB_DEV_DOEPINT6_BBLEERR_RESET 0x0
97007 /* Extracts the ALT_USB_DEV_DOEPINT6_BBLEERR field value from a register. */
97008 #define ALT_USB_DEV_DOEPINT6_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
97009 /* Produces a ALT_USB_DEV_DOEPINT6_BBLEERR register field value suitable for setting the register. */
97010 #define ALT_USB_DEV_DOEPINT6_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
97011 
97012 /*
97013  * Field : NAK Interrupt - nakintrpt
97014  *
97015  * The core generates this interrupt when a NAK is transmitted or received by the
97016  * device. In case of isochronous IN endpoints the interrupt gets generated when a
97017  * zero length packet is transmitted due to un-availability of data in the TXFifo.
97018  *
97019  * Field Enumeration Values:
97020  *
97021  * Enum | Value | Description
97022  * :---------------------------------------|:------|:--------------
97023  * ALT_USB_DEV_DOEPINT6_NAKINTRPT_E_INACT | 0x0 | No interrupt
97024  * ALT_USB_DEV_DOEPINT6_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
97025  *
97026  * Field Access Macros:
97027  *
97028  */
97029 /*
97030  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_NAKINTRPT
97031  *
97032  * No interrupt
97033  */
97034 #define ALT_USB_DEV_DOEPINT6_NAKINTRPT_E_INACT 0x0
97035 /*
97036  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_NAKINTRPT
97037  *
97038  * NAK Interrupt
97039  */
97040 #define ALT_USB_DEV_DOEPINT6_NAKINTRPT_E_ACT 0x1
97041 
97042 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_NAKINTRPT register field. */
97043 #define ALT_USB_DEV_DOEPINT6_NAKINTRPT_LSB 13
97044 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_NAKINTRPT register field. */
97045 #define ALT_USB_DEV_DOEPINT6_NAKINTRPT_MSB 13
97046 /* The width in bits of the ALT_USB_DEV_DOEPINT6_NAKINTRPT register field. */
97047 #define ALT_USB_DEV_DOEPINT6_NAKINTRPT_WIDTH 1
97048 /* The mask used to set the ALT_USB_DEV_DOEPINT6_NAKINTRPT register field value. */
97049 #define ALT_USB_DEV_DOEPINT6_NAKINTRPT_SET_MSK 0x00002000
97050 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_NAKINTRPT register field value. */
97051 #define ALT_USB_DEV_DOEPINT6_NAKINTRPT_CLR_MSK 0xffffdfff
97052 /* The reset value of the ALT_USB_DEV_DOEPINT6_NAKINTRPT register field. */
97053 #define ALT_USB_DEV_DOEPINT6_NAKINTRPT_RESET 0x0
97054 /* Extracts the ALT_USB_DEV_DOEPINT6_NAKINTRPT field value from a register. */
97055 #define ALT_USB_DEV_DOEPINT6_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
97056 /* Produces a ALT_USB_DEV_DOEPINT6_NAKINTRPT register field value suitable for setting the register. */
97057 #define ALT_USB_DEV_DOEPINT6_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
97058 
97059 /*
97060  * Field : NYET Interrupt - nyetintrpt
97061  *
97062  * The core generates this interrupt when a NYET response is transmitted for a non
97063  * isochronous OUT endpoint.
97064  *
97065  * Field Enumeration Values:
97066  *
97067  * Enum | Value | Description
97068  * :----------------------------------------|:------|:---------------
97069  * ALT_USB_DEV_DOEPINT6_NYETINTRPT_E_INACT | 0x0 | No interrupt
97070  * ALT_USB_DEV_DOEPINT6_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
97071  *
97072  * Field Access Macros:
97073  *
97074  */
97075 /*
97076  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_NYETINTRPT
97077  *
97078  * No interrupt
97079  */
97080 #define ALT_USB_DEV_DOEPINT6_NYETINTRPT_E_INACT 0x0
97081 /*
97082  * Enumerated value for register field ALT_USB_DEV_DOEPINT6_NYETINTRPT
97083  *
97084  * NYET Interrupt
97085  */
97086 #define ALT_USB_DEV_DOEPINT6_NYETINTRPT_E_ACT 0x1
97087 
97088 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT6_NYETINTRPT register field. */
97089 #define ALT_USB_DEV_DOEPINT6_NYETINTRPT_LSB 14
97090 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT6_NYETINTRPT register field. */
97091 #define ALT_USB_DEV_DOEPINT6_NYETINTRPT_MSB 14
97092 /* The width in bits of the ALT_USB_DEV_DOEPINT6_NYETINTRPT register field. */
97093 #define ALT_USB_DEV_DOEPINT6_NYETINTRPT_WIDTH 1
97094 /* The mask used to set the ALT_USB_DEV_DOEPINT6_NYETINTRPT register field value. */
97095 #define ALT_USB_DEV_DOEPINT6_NYETINTRPT_SET_MSK 0x00004000
97096 /* The mask used to clear the ALT_USB_DEV_DOEPINT6_NYETINTRPT register field value. */
97097 #define ALT_USB_DEV_DOEPINT6_NYETINTRPT_CLR_MSK 0xffffbfff
97098 /* The reset value of the ALT_USB_DEV_DOEPINT6_NYETINTRPT register field. */
97099 #define ALT_USB_DEV_DOEPINT6_NYETINTRPT_RESET 0x0
97100 /* Extracts the ALT_USB_DEV_DOEPINT6_NYETINTRPT field value from a register. */
97101 #define ALT_USB_DEV_DOEPINT6_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
97102 /* Produces a ALT_USB_DEV_DOEPINT6_NYETINTRPT register field value suitable for setting the register. */
97103 #define ALT_USB_DEV_DOEPINT6_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
97104 
97105 #ifndef __ASSEMBLY__
97106 /*
97107  * WARNING: The C register and register group struct declarations are provided for
97108  * convenience and illustrative purposes. They should, however, be used with
97109  * caution as the C language standard provides no guarantees about the alignment or
97110  * atomicity of device memory accesses. The recommended practice for writing
97111  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
97112  * alt_write_word() functions.
97113  *
97114  * The struct declaration for register ALT_USB_DEV_DOEPINT6.
97115  */
97116 struct ALT_USB_DEV_DOEPINT6_s
97117 {
97118  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
97119  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
97120  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT6_AHBERR */
97121  const uint32_t setup : 1; /* SETUP Phase Done */
97122  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
97123  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
97124  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
97125  uint32_t : 1; /* *UNDEFINED* */
97126  const uint32_t outpkterr : 1; /* OUT Packet Error */
97127  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
97128  uint32_t : 1; /* *UNDEFINED* */
97129  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
97130  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
97131  const uint32_t nakintrpt : 1; /* NAK Interrupt */
97132  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
97133  uint32_t : 17; /* *UNDEFINED* */
97134 };
97135 
97136 /* The typedef declaration for register ALT_USB_DEV_DOEPINT6. */
97137 typedef volatile struct ALT_USB_DEV_DOEPINT6_s ALT_USB_DEV_DOEPINT6_t;
97138 #endif /* __ASSEMBLY__ */
97139 
97140 /* The byte offset of the ALT_USB_DEV_DOEPINT6 register from the beginning of the component. */
97141 #define ALT_USB_DEV_DOEPINT6_OFST 0x3c8
97142 /* The address of the ALT_USB_DEV_DOEPINT6 register. */
97143 #define ALT_USB_DEV_DOEPINT6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT6_OFST))
97144 
97145 /*
97146  * Register : Device OUT Endpoint 6 Transfer Size Register - doeptsiz6
97147  *
97148  * The application must modify this register before enabling the endpoint. Once the
97149  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
97150  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
97151  * application can only read this register once the core has cleared the Endpoint
97152  * Enable bit.
97153  *
97154  * Register Layout
97155  *
97156  * Bits | Access | Reset | Description
97157  * :--------|:-------|:------|:-------------------
97158  * [18:0] | RW | 0x0 | Transfer Size
97159  * [28:19] | RW | 0x0 | Packet Count
97160  * [30:29] | R | 0x0 | SETUP Packet Count
97161  * [31] | ??? | 0x0 | *UNDEFINED*
97162  *
97163  */
97164 /*
97165  * Field : Transfer Size - xfersize
97166  *
97167  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
97168  * application only after it has exhausted the transfer size amount of data. The
97169  * transfer size can be Set to the maximum packet size of the endpoint, to be
97170  * interrupted at the end of each packet. The core decrements this field every time
97171  * a packet from the external memory is written to the RxFIFO.
97172  *
97173  * Field Access Macros:
97174  *
97175  */
97176 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ6_XFERSIZE register field. */
97177 #define ALT_USB_DEV_DOEPTSIZ6_XFERSIZE_LSB 0
97178 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ6_XFERSIZE register field. */
97179 #define ALT_USB_DEV_DOEPTSIZ6_XFERSIZE_MSB 18
97180 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ6_XFERSIZE register field. */
97181 #define ALT_USB_DEV_DOEPTSIZ6_XFERSIZE_WIDTH 19
97182 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ6_XFERSIZE register field value. */
97183 #define ALT_USB_DEV_DOEPTSIZ6_XFERSIZE_SET_MSK 0x0007ffff
97184 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ6_XFERSIZE register field value. */
97185 #define ALT_USB_DEV_DOEPTSIZ6_XFERSIZE_CLR_MSK 0xfff80000
97186 /* The reset value of the ALT_USB_DEV_DOEPTSIZ6_XFERSIZE register field. */
97187 #define ALT_USB_DEV_DOEPTSIZ6_XFERSIZE_RESET 0x0
97188 /* Extracts the ALT_USB_DEV_DOEPTSIZ6_XFERSIZE field value from a register. */
97189 #define ALT_USB_DEV_DOEPTSIZ6_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
97190 /* Produces a ALT_USB_DEV_DOEPTSIZ6_XFERSIZE register field value suitable for setting the register. */
97191 #define ALT_USB_DEV_DOEPTSIZ6_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
97192 
97193 /*
97194  * Field : Packet Count - pktcnt
97195  *
97196  * Indicates the total number of USB packets that constitute the Transfer Size
97197  * amount of data for endpoint 0.This field is decremented every time a packet
97198  * (maximum size or short packet) is read from the RxFIFO.
97199  *
97200  * Field Access Macros:
97201  *
97202  */
97203 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ6_PKTCNT register field. */
97204 #define ALT_USB_DEV_DOEPTSIZ6_PKTCNT_LSB 19
97205 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ6_PKTCNT register field. */
97206 #define ALT_USB_DEV_DOEPTSIZ6_PKTCNT_MSB 28
97207 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ6_PKTCNT register field. */
97208 #define ALT_USB_DEV_DOEPTSIZ6_PKTCNT_WIDTH 10
97209 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ6_PKTCNT register field value. */
97210 #define ALT_USB_DEV_DOEPTSIZ6_PKTCNT_SET_MSK 0x1ff80000
97211 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ6_PKTCNT register field value. */
97212 #define ALT_USB_DEV_DOEPTSIZ6_PKTCNT_CLR_MSK 0xe007ffff
97213 /* The reset value of the ALT_USB_DEV_DOEPTSIZ6_PKTCNT register field. */
97214 #define ALT_USB_DEV_DOEPTSIZ6_PKTCNT_RESET 0x0
97215 /* Extracts the ALT_USB_DEV_DOEPTSIZ6_PKTCNT field value from a register. */
97216 #define ALT_USB_DEV_DOEPTSIZ6_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
97217 /* Produces a ALT_USB_DEV_DOEPTSIZ6_PKTCNT register field value suitable for setting the register. */
97218 #define ALT_USB_DEV_DOEPTSIZ6_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
97219 
97220 /*
97221  * Field : SETUP Packet Count - rxdpid
97222  *
97223  * Applies to isochronous OUT endpoints only.This is the data PID received in the
97224  * last packet for this endpoint. Use datax.
97225  *
97226  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
97227  * number of back-to-back SETUP data packets the endpoint can receive.
97228  *
97229  * Field Enumeration Values:
97230  *
97231  * Enum | Value | Description
97232  * :-----------------------------------------|:------|:-------------------
97233  * ALT_USB_DEV_DOEPTSIZ6_RXDPID_E_DATA0 | 0x0 | DATA0
97234  * ALT_USB_DEV_DOEPTSIZ6_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
97235  * ALT_USB_DEV_DOEPTSIZ6_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
97236  * ALT_USB_DEV_DOEPTSIZ6_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
97237  *
97238  * Field Access Macros:
97239  *
97240  */
97241 /*
97242  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ6_RXDPID
97243  *
97244  * DATA0
97245  */
97246 #define ALT_USB_DEV_DOEPTSIZ6_RXDPID_E_DATA0 0x0
97247 /*
97248  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ6_RXDPID
97249  *
97250  * DATA2 or 1 packet
97251  */
97252 #define ALT_USB_DEV_DOEPTSIZ6_RXDPID_E_DATA2PKT1 0x1
97253 /*
97254  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ6_RXDPID
97255  *
97256  * DATA1 or 2 packets
97257  */
97258 #define ALT_USB_DEV_DOEPTSIZ6_RXDPID_E_DATA1PKT2 0x2
97259 /*
97260  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ6_RXDPID
97261  *
97262  * MDATA or 3 packets
97263  */
97264 #define ALT_USB_DEV_DOEPTSIZ6_RXDPID_E_MDATAPKT3 0x3
97265 
97266 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ6_RXDPID register field. */
97267 #define ALT_USB_DEV_DOEPTSIZ6_RXDPID_LSB 29
97268 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ6_RXDPID register field. */
97269 #define ALT_USB_DEV_DOEPTSIZ6_RXDPID_MSB 30
97270 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ6_RXDPID register field. */
97271 #define ALT_USB_DEV_DOEPTSIZ6_RXDPID_WIDTH 2
97272 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ6_RXDPID register field value. */
97273 #define ALT_USB_DEV_DOEPTSIZ6_RXDPID_SET_MSK 0x60000000
97274 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ6_RXDPID register field value. */
97275 #define ALT_USB_DEV_DOEPTSIZ6_RXDPID_CLR_MSK 0x9fffffff
97276 /* The reset value of the ALT_USB_DEV_DOEPTSIZ6_RXDPID register field. */
97277 #define ALT_USB_DEV_DOEPTSIZ6_RXDPID_RESET 0x0
97278 /* Extracts the ALT_USB_DEV_DOEPTSIZ6_RXDPID field value from a register. */
97279 #define ALT_USB_DEV_DOEPTSIZ6_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
97280 /* Produces a ALT_USB_DEV_DOEPTSIZ6_RXDPID register field value suitable for setting the register. */
97281 #define ALT_USB_DEV_DOEPTSIZ6_RXDPID_SET(value) (((value) << 29) & 0x60000000)
97282 
97283 #ifndef __ASSEMBLY__
97284 /*
97285  * WARNING: The C register and register group struct declarations are provided for
97286  * convenience and illustrative purposes. They should, however, be used with
97287  * caution as the C language standard provides no guarantees about the alignment or
97288  * atomicity of device memory accesses. The recommended practice for writing
97289  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
97290  * alt_write_word() functions.
97291  *
97292  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ6.
97293  */
97294 struct ALT_USB_DEV_DOEPTSIZ6_s
97295 {
97296  uint32_t xfersize : 19; /* Transfer Size */
97297  uint32_t pktcnt : 10; /* Packet Count */
97298  const uint32_t rxdpid : 2; /* SETUP Packet Count */
97299  uint32_t : 1; /* *UNDEFINED* */
97300 };
97301 
97302 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ6. */
97303 typedef volatile struct ALT_USB_DEV_DOEPTSIZ6_s ALT_USB_DEV_DOEPTSIZ6_t;
97304 #endif /* __ASSEMBLY__ */
97305 
97306 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ6 register from the beginning of the component. */
97307 #define ALT_USB_DEV_DOEPTSIZ6_OFST 0x3d0
97308 /* The address of the ALT_USB_DEV_DOEPTSIZ6 register. */
97309 #define ALT_USB_DEV_DOEPTSIZ6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ6_OFST))
97310 
97311 /*
97312  * Register : Device OUT Endpoint 6 DMA Address Register - doepdma6
97313  *
97314  * DMA OUT Address.
97315  *
97316  * Register Layout
97317  *
97318  * Bits | Access | Reset | Description
97319  * :-------|:-------|:--------|:------------
97320  * [31:0] | RW | Unknown | DMA Address
97321  *
97322  */
97323 /*
97324  * Field : DMA Address - doepdma6
97325  *
97326  * Holds the start address of the external memory for storing or fetching endpoint
97327  * data. for control endpoints, this field stores control OUT data packets as well
97328  * as SETUP transaction data packets. When more than three SETUP packets are
97329  * received back-to-back, the SETUP data packet in the memory is overwritten. This
97330  * register is incremented on every AHB transaction. The application can give only
97331  * a DWORD-aligned address.
97332  *
97333  * When Scatter/Gather DMA mode is not enabled, the application programs the start
97334  * address value in this field.
97335  *
97336  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
97337  * for the descriptor list.
97338  *
97339  * Field Access Macros:
97340  *
97341  */
97342 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA6_DOEPDMA6 register field. */
97343 #define ALT_USB_DEV_DOEPDMA6_DOEPDMA6_LSB 0
97344 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA6_DOEPDMA6 register field. */
97345 #define ALT_USB_DEV_DOEPDMA6_DOEPDMA6_MSB 31
97346 /* The width in bits of the ALT_USB_DEV_DOEPDMA6_DOEPDMA6 register field. */
97347 #define ALT_USB_DEV_DOEPDMA6_DOEPDMA6_WIDTH 32
97348 /* The mask used to set the ALT_USB_DEV_DOEPDMA6_DOEPDMA6 register field value. */
97349 #define ALT_USB_DEV_DOEPDMA6_DOEPDMA6_SET_MSK 0xffffffff
97350 /* The mask used to clear the ALT_USB_DEV_DOEPDMA6_DOEPDMA6 register field value. */
97351 #define ALT_USB_DEV_DOEPDMA6_DOEPDMA6_CLR_MSK 0x00000000
97352 /* The reset value of the ALT_USB_DEV_DOEPDMA6_DOEPDMA6 register field is UNKNOWN. */
97353 #define ALT_USB_DEV_DOEPDMA6_DOEPDMA6_RESET 0x0
97354 /* Extracts the ALT_USB_DEV_DOEPDMA6_DOEPDMA6 field value from a register. */
97355 #define ALT_USB_DEV_DOEPDMA6_DOEPDMA6_GET(value) (((value) & 0xffffffff) >> 0)
97356 /* Produces a ALT_USB_DEV_DOEPDMA6_DOEPDMA6 register field value suitable for setting the register. */
97357 #define ALT_USB_DEV_DOEPDMA6_DOEPDMA6_SET(value) (((value) << 0) & 0xffffffff)
97358 
97359 #ifndef __ASSEMBLY__
97360 /*
97361  * WARNING: The C register and register group struct declarations are provided for
97362  * convenience and illustrative purposes. They should, however, be used with
97363  * caution as the C language standard provides no guarantees about the alignment or
97364  * atomicity of device memory accesses. The recommended practice for writing
97365  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
97366  * alt_write_word() functions.
97367  *
97368  * The struct declaration for register ALT_USB_DEV_DOEPDMA6.
97369  */
97370 struct ALT_USB_DEV_DOEPDMA6_s
97371 {
97372  uint32_t doepdma6 : 32; /* DMA Address */
97373 };
97374 
97375 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA6. */
97376 typedef volatile struct ALT_USB_DEV_DOEPDMA6_s ALT_USB_DEV_DOEPDMA6_t;
97377 #endif /* __ASSEMBLY__ */
97378 
97379 /* The byte offset of the ALT_USB_DEV_DOEPDMA6 register from the beginning of the component. */
97380 #define ALT_USB_DEV_DOEPDMA6_OFST 0x3d4
97381 /* The address of the ALT_USB_DEV_DOEPDMA6 register. */
97382 #define ALT_USB_DEV_DOEPDMA6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA6_OFST))
97383 
97384 /*
97385  * Register : Device OUT Endpoint 6 DMA Buffer Address Register - doepdmab6
97386  *
97387  * DMA Buffer Address.
97388  *
97389  * Register Layout
97390  *
97391  * Bits | Access | Reset | Description
97392  * :-------|:-------|:--------|:-------------------
97393  * [31:0] | R | Unknown | DMA Buffer Address
97394  *
97395  */
97396 /*
97397  * Field : DMA Buffer Address - doepdmab6
97398  *
97399  * Holds the current buffer address. This register is updated as and when the data
97400  * transfer for the corresponding end point is in progress. This register is
97401  * present only in Scatter/Gather DMA mode.
97402  *
97403  * Field Access Macros:
97404  *
97405  */
97406 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6 register field. */
97407 #define ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6_LSB 0
97408 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6 register field. */
97409 #define ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6_MSB 31
97410 /* The width in bits of the ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6 register field. */
97411 #define ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6_WIDTH 32
97412 /* The mask used to set the ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6 register field value. */
97413 #define ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6_SET_MSK 0xffffffff
97414 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6 register field value. */
97415 #define ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6_CLR_MSK 0x00000000
97416 /* The reset value of the ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6 register field is UNKNOWN. */
97417 #define ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6_RESET 0x0
97418 /* Extracts the ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6 field value from a register. */
97419 #define ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6_GET(value) (((value) & 0xffffffff) >> 0)
97420 /* Produces a ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6 register field value suitable for setting the register. */
97421 #define ALT_USB_DEV_DOEPDMAB6_DOEPDMAB6_SET(value) (((value) << 0) & 0xffffffff)
97422 
97423 #ifndef __ASSEMBLY__
97424 /*
97425  * WARNING: The C register and register group struct declarations are provided for
97426  * convenience and illustrative purposes. They should, however, be used with
97427  * caution as the C language standard provides no guarantees about the alignment or
97428  * atomicity of device memory accesses. The recommended practice for writing
97429  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
97430  * alt_write_word() functions.
97431  *
97432  * The struct declaration for register ALT_USB_DEV_DOEPDMAB6.
97433  */
97434 struct ALT_USB_DEV_DOEPDMAB6_s
97435 {
97436  const uint32_t doepdmab6 : 32; /* DMA Buffer Address */
97437 };
97438 
97439 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB6. */
97440 typedef volatile struct ALT_USB_DEV_DOEPDMAB6_s ALT_USB_DEV_DOEPDMAB6_t;
97441 #endif /* __ASSEMBLY__ */
97442 
97443 /* The byte offset of the ALT_USB_DEV_DOEPDMAB6 register from the beginning of the component. */
97444 #define ALT_USB_DEV_DOEPDMAB6_OFST 0x3dc
97445 /* The address of the ALT_USB_DEV_DOEPDMAB6 register. */
97446 #define ALT_USB_DEV_DOEPDMAB6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB6_OFST))
97447 
97448 /*
97449  * Register : Device Control OUT Endpoint 7 Control Register - doepctl7
97450  *
97451  * Endpoint_number: 7
97452  *
97453  * Register Layout
97454  *
97455  * Bits | Access | Reset | Description
97456  * :--------|:-------|:------|:--------------------
97457  * [10:0] | RW | 0x0 | Maximum Packet Size
97458  * [14:11] | ??? | 0x0 | *UNDEFINED*
97459  * [15] | RW | 0x0 | USB Active Endpoint
97460  * [16] | R | 0x0 | Endpoint Data PID
97461  * [17] | R | 0x0 | NAK Status
97462  * [19:18] | RW | 0x0 | Endpoint Type
97463  * [20] | ??? | 0x0 | *UNDEFINED*
97464  * [21] | R | 0x0 | STALL Handshake
97465  * [25:22] | RW | 0x0 | TxFIFO Number
97466  * [26] | W | 0x0 | Clear NAK
97467  * [27] | W | 0x0 | Set NAK
97468  * [28] | W | 0x0 | Set DATA0 PID
97469  * [29] | W | 0x0 | Set DATA1 PID
97470  * [30] | R | 0x0 | Endpoint Disable
97471  * [31] | R | 0x0 | Endpoint Enable
97472  *
97473  */
97474 /*
97475  * Field : Maximum Packet Size - mps
97476  *
97477  * Applies to IN and OUT endpoints. The application must program this field with
97478  * the maximum packet size for the current logical endpoint. This value is in
97479  * bytes.
97480  *
97481  * Field Access Macros:
97482  *
97483  */
97484 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_MPS register field. */
97485 #define ALT_USB_DEV_DOEPCTL7_MPS_LSB 0
97486 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_MPS register field. */
97487 #define ALT_USB_DEV_DOEPCTL7_MPS_MSB 10
97488 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_MPS register field. */
97489 #define ALT_USB_DEV_DOEPCTL7_MPS_WIDTH 11
97490 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_MPS register field value. */
97491 #define ALT_USB_DEV_DOEPCTL7_MPS_SET_MSK 0x000007ff
97492 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_MPS register field value. */
97493 #define ALT_USB_DEV_DOEPCTL7_MPS_CLR_MSK 0xfffff800
97494 /* The reset value of the ALT_USB_DEV_DOEPCTL7_MPS register field. */
97495 #define ALT_USB_DEV_DOEPCTL7_MPS_RESET 0x0
97496 /* Extracts the ALT_USB_DEV_DOEPCTL7_MPS field value from a register. */
97497 #define ALT_USB_DEV_DOEPCTL7_MPS_GET(value) (((value) & 0x000007ff) >> 0)
97498 /* Produces a ALT_USB_DEV_DOEPCTL7_MPS register field value suitable for setting the register. */
97499 #define ALT_USB_DEV_DOEPCTL7_MPS_SET(value) (((value) << 0) & 0x000007ff)
97500 
97501 /*
97502  * Field : USB Active Endpoint - usbactep
97503  *
97504  * Indicates whether this endpoint is active in the current configuration and
97505  * interface. The core clears this bit for all endpoints (other than EP 0) after
97506  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
97507  * commands, the application must program endpoint registers accordingly and set
97508  * this bit.
97509  *
97510  * Field Enumeration Values:
97511  *
97512  * Enum | Value | Description
97513  * :-------------------------------------|:------|:--------------------
97514  * ALT_USB_DEV_DOEPCTL7_USBACTEP_E_DISD | 0x0 | Not Active
97515  * ALT_USB_DEV_DOEPCTL7_USBACTEP_E_END | 0x1 | USB Active Endpoint
97516  *
97517  * Field Access Macros:
97518  *
97519  */
97520 /*
97521  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_USBACTEP
97522  *
97523  * Not Active
97524  */
97525 #define ALT_USB_DEV_DOEPCTL7_USBACTEP_E_DISD 0x0
97526 /*
97527  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_USBACTEP
97528  *
97529  * USB Active Endpoint
97530  */
97531 #define ALT_USB_DEV_DOEPCTL7_USBACTEP_E_END 0x1
97532 
97533 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_USBACTEP register field. */
97534 #define ALT_USB_DEV_DOEPCTL7_USBACTEP_LSB 15
97535 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_USBACTEP register field. */
97536 #define ALT_USB_DEV_DOEPCTL7_USBACTEP_MSB 15
97537 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_USBACTEP register field. */
97538 #define ALT_USB_DEV_DOEPCTL7_USBACTEP_WIDTH 1
97539 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_USBACTEP register field value. */
97540 #define ALT_USB_DEV_DOEPCTL7_USBACTEP_SET_MSK 0x00008000
97541 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_USBACTEP register field value. */
97542 #define ALT_USB_DEV_DOEPCTL7_USBACTEP_CLR_MSK 0xffff7fff
97543 /* The reset value of the ALT_USB_DEV_DOEPCTL7_USBACTEP register field. */
97544 #define ALT_USB_DEV_DOEPCTL7_USBACTEP_RESET 0x0
97545 /* Extracts the ALT_USB_DEV_DOEPCTL7_USBACTEP field value from a register. */
97546 #define ALT_USB_DEV_DOEPCTL7_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
97547 /* Produces a ALT_USB_DEV_DOEPCTL7_USBACTEP register field value suitable for setting the register. */
97548 #define ALT_USB_DEV_DOEPCTL7_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
97549 
97550 /*
97551  * Field : Endpoint Data PID - dpid
97552  *
97553  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
97554  * packet to be received or transmitted on this endpoint. The application must
97555  * program the PID of the first packet to be received or transmitted on this
97556  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
97557  * SetD0PID fields of this register to program either DATA0 or DATA1 PID.
97558  *
97559  * 0: DATA0 1: DATA1This field is applicable both for Scatter/Gather DMA mode and
97560  * non-Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-
97561  * Scatter/Gather DMA mode:
97562  *
97563  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
97564  * number in which the core transmits/receives isochronous data for this endpoint.
97565  * The application must program the even/odd (micro) frame number in which it
97566  * intends to transmit/receive isochronous data for this endpoint using the
97567  * SetEvnFr and SetOddFr fields in this register.
97568  *
97569  * 0: Even (micro)frame
97570  *
97571  * 1: Odd (micro)frame
97572  *
97573  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
97574  * number in which to send data is provided in the transmit descriptor structure.
97575  * The frame in which data is received is updated in receive descriptor structure.
97576  *
97577  * Field Enumeration Values:
97578  *
97579  * Enum | Value | Description
97580  * :----------------------------------|:------|:-----------------------------
97581  * ALT_USB_DEV_DOEPCTL7_DPID_E_INACT | 0x0 | Endpoint Data PID not active
97582  * ALT_USB_DEV_DOEPCTL7_DPID_E_ACT | 0x1 | Endpoint Data PID active
97583  *
97584  * Field Access Macros:
97585  *
97586  */
97587 /*
97588  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_DPID
97589  *
97590  * Endpoint Data PID not active
97591  */
97592 #define ALT_USB_DEV_DOEPCTL7_DPID_E_INACT 0x0
97593 /*
97594  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_DPID
97595  *
97596  * Endpoint Data PID active
97597  */
97598 #define ALT_USB_DEV_DOEPCTL7_DPID_E_ACT 0x1
97599 
97600 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_DPID register field. */
97601 #define ALT_USB_DEV_DOEPCTL7_DPID_LSB 16
97602 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_DPID register field. */
97603 #define ALT_USB_DEV_DOEPCTL7_DPID_MSB 16
97604 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_DPID register field. */
97605 #define ALT_USB_DEV_DOEPCTL7_DPID_WIDTH 1
97606 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_DPID register field value. */
97607 #define ALT_USB_DEV_DOEPCTL7_DPID_SET_MSK 0x00010000
97608 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_DPID register field value. */
97609 #define ALT_USB_DEV_DOEPCTL7_DPID_CLR_MSK 0xfffeffff
97610 /* The reset value of the ALT_USB_DEV_DOEPCTL7_DPID register field. */
97611 #define ALT_USB_DEV_DOEPCTL7_DPID_RESET 0x0
97612 /* Extracts the ALT_USB_DEV_DOEPCTL7_DPID field value from a register. */
97613 #define ALT_USB_DEV_DOEPCTL7_DPID_GET(value) (((value) & 0x00010000) >> 16)
97614 /* Produces a ALT_USB_DEV_DOEPCTL7_DPID register field value suitable for setting the register. */
97615 #define ALT_USB_DEV_DOEPCTL7_DPID_SET(value) (((value) << 16) & 0x00010000)
97616 
97617 /*
97618  * Field : NAK Status - naksts
97619  *
97620  * When either the application or the core sets this bit:
97621  *
97622  * * The core stops receiving any data on an OUT endpoint, even if there is space
97623  * in the RxFIFO to accommodate the incoming packet.
97624  *
97625  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
97626  * IN endpoint, even if there data is available in the TxFIFO.
97627  *
97628  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
97629  * even if there data is available in the TxFIFO.
97630  *
97631  * Irrespective of this bit's setting, the core always responds to SETUP data
97632  * packets with an ACK handshake.
97633  *
97634  * Field Enumeration Values:
97635  *
97636  * Enum | Value | Description
97637  * :-------------------------------------|:------|:------------------------------------------------
97638  * ALT_USB_DEV_DOEPCTL7_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
97639  * : | | based on the FIFO status
97640  * ALT_USB_DEV_DOEPCTL7_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
97641  * : | | endpoint
97642  *
97643  * Field Access Macros:
97644  *
97645  */
97646 /*
97647  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_NAKSTS
97648  *
97649  * The core is transmitting non-NAK handshakes based on the FIFO status
97650  */
97651 #define ALT_USB_DEV_DOEPCTL7_NAKSTS_E_NONNAK 0x0
97652 /*
97653  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_NAKSTS
97654  *
97655  * The core is transmitting NAK handshakes on this endpoint
97656  */
97657 #define ALT_USB_DEV_DOEPCTL7_NAKSTS_E_NAK 0x1
97658 
97659 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_NAKSTS register field. */
97660 #define ALT_USB_DEV_DOEPCTL7_NAKSTS_LSB 17
97661 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_NAKSTS register field. */
97662 #define ALT_USB_DEV_DOEPCTL7_NAKSTS_MSB 17
97663 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_NAKSTS register field. */
97664 #define ALT_USB_DEV_DOEPCTL7_NAKSTS_WIDTH 1
97665 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_NAKSTS register field value. */
97666 #define ALT_USB_DEV_DOEPCTL7_NAKSTS_SET_MSK 0x00020000
97667 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_NAKSTS register field value. */
97668 #define ALT_USB_DEV_DOEPCTL7_NAKSTS_CLR_MSK 0xfffdffff
97669 /* The reset value of the ALT_USB_DEV_DOEPCTL7_NAKSTS register field. */
97670 #define ALT_USB_DEV_DOEPCTL7_NAKSTS_RESET 0x0
97671 /* Extracts the ALT_USB_DEV_DOEPCTL7_NAKSTS field value from a register. */
97672 #define ALT_USB_DEV_DOEPCTL7_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
97673 /* Produces a ALT_USB_DEV_DOEPCTL7_NAKSTS register field value suitable for setting the register. */
97674 #define ALT_USB_DEV_DOEPCTL7_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
97675 
97676 /*
97677  * Field : Endpoint Type - eptype
97678  *
97679  * This is the transfer type supported by this logical endpoint.
97680  *
97681  * Field Enumeration Values:
97682  *
97683  * Enum | Value | Description
97684  * :------------------------------------------|:------|:------------
97685  * ALT_USB_DEV_DOEPCTL7_EPTYPE_E_CTL | 0x0 | Control
97686  * ALT_USB_DEV_DOEPCTL7_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
97687  * ALT_USB_DEV_DOEPCTL7_EPTYPE_E_BULK | 0x2 | Bulk
97688  * ALT_USB_DEV_DOEPCTL7_EPTYPE_E_INTERRUP | 0x3 | Interrupt
97689  *
97690  * Field Access Macros:
97691  *
97692  */
97693 /*
97694  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_EPTYPE
97695  *
97696  * Control
97697  */
97698 #define ALT_USB_DEV_DOEPCTL7_EPTYPE_E_CTL 0x0
97699 /*
97700  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_EPTYPE
97701  *
97702  * Isochronous
97703  */
97704 #define ALT_USB_DEV_DOEPCTL7_EPTYPE_E_ISOCHRONOUS 0x1
97705 /*
97706  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_EPTYPE
97707  *
97708  * Bulk
97709  */
97710 #define ALT_USB_DEV_DOEPCTL7_EPTYPE_E_BULK 0x2
97711 /*
97712  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_EPTYPE
97713  *
97714  * Interrupt
97715  */
97716 #define ALT_USB_DEV_DOEPCTL7_EPTYPE_E_INTERRUP 0x3
97717 
97718 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_EPTYPE register field. */
97719 #define ALT_USB_DEV_DOEPCTL7_EPTYPE_LSB 18
97720 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_EPTYPE register field. */
97721 #define ALT_USB_DEV_DOEPCTL7_EPTYPE_MSB 19
97722 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_EPTYPE register field. */
97723 #define ALT_USB_DEV_DOEPCTL7_EPTYPE_WIDTH 2
97724 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_EPTYPE register field value. */
97725 #define ALT_USB_DEV_DOEPCTL7_EPTYPE_SET_MSK 0x000c0000
97726 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_EPTYPE register field value. */
97727 #define ALT_USB_DEV_DOEPCTL7_EPTYPE_CLR_MSK 0xfff3ffff
97728 /* The reset value of the ALT_USB_DEV_DOEPCTL7_EPTYPE register field. */
97729 #define ALT_USB_DEV_DOEPCTL7_EPTYPE_RESET 0x0
97730 /* Extracts the ALT_USB_DEV_DOEPCTL7_EPTYPE field value from a register. */
97731 #define ALT_USB_DEV_DOEPCTL7_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
97732 /* Produces a ALT_USB_DEV_DOEPCTL7_EPTYPE register field value suitable for setting the register. */
97733 #define ALT_USB_DEV_DOEPCTL7_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
97734 
97735 /*
97736  * Field : STALL Handshake - stall
97737  *
97738  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
97739  * application sets this bit to stall all tokens from the USB host to this
97740  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
97741  * along with this bit, the STALL bit takes priority. Only the application can
97742  * clear this bit, never the core. Applies to control endpoints only. The
97743  * application can only set this bit, and the core clears it, when a SETUP token is
97744  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
97745  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
97746  * of this bit's setting, the core always responds to SETUP data packets with an
97747  * ACK handshake.
97748  *
97749  * Field Enumeration Values:
97750  *
97751  * Enum | Value | Description
97752  * :-----------------------------------|:------|:----------------------------
97753  * ALT_USB_DEV_DOEPCTL7_STALL_E_INACT | 0x0 | STALL All Tokens not active
97754  * ALT_USB_DEV_DOEPCTL7_STALL_E_ACT | 0x1 | STALL All Tokens active
97755  *
97756  * Field Access Macros:
97757  *
97758  */
97759 /*
97760  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_STALL
97761  *
97762  * STALL All Tokens not active
97763  */
97764 #define ALT_USB_DEV_DOEPCTL7_STALL_E_INACT 0x0
97765 /*
97766  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_STALL
97767  *
97768  * STALL All Tokens active
97769  */
97770 #define ALT_USB_DEV_DOEPCTL7_STALL_E_ACT 0x1
97771 
97772 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_STALL register field. */
97773 #define ALT_USB_DEV_DOEPCTL7_STALL_LSB 21
97774 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_STALL register field. */
97775 #define ALT_USB_DEV_DOEPCTL7_STALL_MSB 21
97776 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_STALL register field. */
97777 #define ALT_USB_DEV_DOEPCTL7_STALL_WIDTH 1
97778 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_STALL register field value. */
97779 #define ALT_USB_DEV_DOEPCTL7_STALL_SET_MSK 0x00200000
97780 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_STALL register field value. */
97781 #define ALT_USB_DEV_DOEPCTL7_STALL_CLR_MSK 0xffdfffff
97782 /* The reset value of the ALT_USB_DEV_DOEPCTL7_STALL register field. */
97783 #define ALT_USB_DEV_DOEPCTL7_STALL_RESET 0x0
97784 /* Extracts the ALT_USB_DEV_DOEPCTL7_STALL field value from a register. */
97785 #define ALT_USB_DEV_DOEPCTL7_STALL_GET(value) (((value) & 0x00200000) >> 21)
97786 /* Produces a ALT_USB_DEV_DOEPCTL7_STALL register field value suitable for setting the register. */
97787 #define ALT_USB_DEV_DOEPCTL7_STALL_SET(value) (((value) << 21) & 0x00200000)
97788 
97789 /*
97790  * Field : TxFIFO Number - txfnum
97791  *
97792  * Shared FIFO Operation-non-periodic endpoints must set this bit to zero. Periodic
97793  * endpoints must map this to the corresponding Periodic TxFIFO number.
97794  *
97795  * 4'h0: Non-Periodic TxFIFO
97796  *
97797  * Others: Specified Periodic TxFIFO.number
97798  *
97799  * An interrupt IN endpoint can be configured as a non-periodic endpoint for
97800  * applications such as mass storage. The core treats an IN endpoint as a non-
97801  * periodic endpoint if the TxFNum field is set to 0. Configuring an interrupt IN
97802  * endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
97803  * Dedicated FIFO Operation-these bits specify the FIFO number associated with this
97804  * endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
97805  * This field is valid only for IN endpoints.
97806  *
97807  * Field Access Macros:
97808  *
97809  */
97810 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_TXFNUM register field. */
97811 #define ALT_USB_DEV_DOEPCTL7_TXFNUM_LSB 22
97812 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_TXFNUM register field. */
97813 #define ALT_USB_DEV_DOEPCTL7_TXFNUM_MSB 25
97814 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_TXFNUM register field. */
97815 #define ALT_USB_DEV_DOEPCTL7_TXFNUM_WIDTH 4
97816 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_TXFNUM register field value. */
97817 #define ALT_USB_DEV_DOEPCTL7_TXFNUM_SET_MSK 0x03c00000
97818 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_TXFNUM register field value. */
97819 #define ALT_USB_DEV_DOEPCTL7_TXFNUM_CLR_MSK 0xfc3fffff
97820 /* The reset value of the ALT_USB_DEV_DOEPCTL7_TXFNUM register field. */
97821 #define ALT_USB_DEV_DOEPCTL7_TXFNUM_RESET 0x0
97822 /* Extracts the ALT_USB_DEV_DOEPCTL7_TXFNUM field value from a register. */
97823 #define ALT_USB_DEV_DOEPCTL7_TXFNUM_GET(value) (((value) & 0x03c00000) >> 22)
97824 /* Produces a ALT_USB_DEV_DOEPCTL7_TXFNUM register field value suitable for setting the register. */
97825 #define ALT_USB_DEV_DOEPCTL7_TXFNUM_SET(value) (((value) << 22) & 0x03c00000)
97826 
97827 /*
97828  * Field : Clear NAK - cnak
97829  *
97830  * A write to this bit clears the NAK bit for the endpoint.
97831  *
97832  * Field Enumeration Values:
97833  *
97834  * Enum | Value | Description
97835  * :----------------------------------|:------|:-------------
97836  * ALT_USB_DEV_DOEPCTL7_CNAK_E_INACT | 0x0 | No Clear NAK
97837  * ALT_USB_DEV_DOEPCTL7_CNAK_E_ACT | 0x1 | Clear NAK
97838  *
97839  * Field Access Macros:
97840  *
97841  */
97842 /*
97843  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_CNAK
97844  *
97845  * No Clear NAK
97846  */
97847 #define ALT_USB_DEV_DOEPCTL7_CNAK_E_INACT 0x0
97848 /*
97849  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_CNAK
97850  *
97851  * Clear NAK
97852  */
97853 #define ALT_USB_DEV_DOEPCTL7_CNAK_E_ACT 0x1
97854 
97855 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_CNAK register field. */
97856 #define ALT_USB_DEV_DOEPCTL7_CNAK_LSB 26
97857 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_CNAK register field. */
97858 #define ALT_USB_DEV_DOEPCTL7_CNAK_MSB 26
97859 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_CNAK register field. */
97860 #define ALT_USB_DEV_DOEPCTL7_CNAK_WIDTH 1
97861 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_CNAK register field value. */
97862 #define ALT_USB_DEV_DOEPCTL7_CNAK_SET_MSK 0x04000000
97863 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_CNAK register field value. */
97864 #define ALT_USB_DEV_DOEPCTL7_CNAK_CLR_MSK 0xfbffffff
97865 /* The reset value of the ALT_USB_DEV_DOEPCTL7_CNAK register field. */
97866 #define ALT_USB_DEV_DOEPCTL7_CNAK_RESET 0x0
97867 /* Extracts the ALT_USB_DEV_DOEPCTL7_CNAK field value from a register. */
97868 #define ALT_USB_DEV_DOEPCTL7_CNAK_GET(value) (((value) & 0x04000000) >> 26)
97869 /* Produces a ALT_USB_DEV_DOEPCTL7_CNAK register field value suitable for setting the register. */
97870 #define ALT_USB_DEV_DOEPCTL7_CNAK_SET(value) (((value) << 26) & 0x04000000)
97871 
97872 /*
97873  * Field : Set NAK - snak
97874  *
97875  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
97876  * application can control the transmission of NAK handshakes on an endpoint. The
97877  * core can also Set this bit for an endpoint after a SETUP packet is received on
97878  * that endpoint.
97879  *
97880  * Field Enumeration Values:
97881  *
97882  * Enum | Value | Description
97883  * :----------------------------------|:------|:------------
97884  * ALT_USB_DEV_DOEPCTL7_SNAK_E_INACT | 0x0 | No Set NAK
97885  * ALT_USB_DEV_DOEPCTL7_SNAK_E_ACT | 0x1 | Set NAK
97886  *
97887  * Field Access Macros:
97888  *
97889  */
97890 /*
97891  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_SNAK
97892  *
97893  * No Set NAK
97894  */
97895 #define ALT_USB_DEV_DOEPCTL7_SNAK_E_INACT 0x0
97896 /*
97897  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_SNAK
97898  *
97899  * Set NAK
97900  */
97901 #define ALT_USB_DEV_DOEPCTL7_SNAK_E_ACT 0x1
97902 
97903 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_SNAK register field. */
97904 #define ALT_USB_DEV_DOEPCTL7_SNAK_LSB 27
97905 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_SNAK register field. */
97906 #define ALT_USB_DEV_DOEPCTL7_SNAK_MSB 27
97907 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_SNAK register field. */
97908 #define ALT_USB_DEV_DOEPCTL7_SNAK_WIDTH 1
97909 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_SNAK register field value. */
97910 #define ALT_USB_DEV_DOEPCTL7_SNAK_SET_MSK 0x08000000
97911 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_SNAK register field value. */
97912 #define ALT_USB_DEV_DOEPCTL7_SNAK_CLR_MSK 0xf7ffffff
97913 /* The reset value of the ALT_USB_DEV_DOEPCTL7_SNAK register field. */
97914 #define ALT_USB_DEV_DOEPCTL7_SNAK_RESET 0x0
97915 /* Extracts the ALT_USB_DEV_DOEPCTL7_SNAK field value from a register. */
97916 #define ALT_USB_DEV_DOEPCTL7_SNAK_GET(value) (((value) & 0x08000000) >> 27)
97917 /* Produces a ALT_USB_DEV_DOEPCTL7_SNAK register field value suitable for setting the register. */
97918 #define ALT_USB_DEV_DOEPCTL7_SNAK_SET(value) (((value) << 27) & 0x08000000)
97919 
97920 /*
97921  * Field : Set DATA0 PID - setd0pid
97922  *
97923  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
97924  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
97925  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
97926  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
97927  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
97928  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
97929  * mode is enabled, this field is reserved. The frame number in which to send data
97930  * is in the transmit descriptor structure. The frame in which to receive data is
97931  * updated in receive descriptor structure.
97932  *
97933  * Field Enumeration Values:
97934  *
97935  * Enum | Value | Description
97936  * :-------------------------------------|:------|:----------------------------
97937  * ALT_USB_DEV_DOEPCTL7_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
97938  * ALT_USB_DEV_DOEPCTL7_SETD0PID_E_END | 0x1 | Endpoint Data PID to DATA0)
97939  *
97940  * Field Access Macros:
97941  *
97942  */
97943 /*
97944  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_SETD0PID
97945  *
97946  * Disables Set DATA0 PID
97947  */
97948 #define ALT_USB_DEV_DOEPCTL7_SETD0PID_E_DISD 0x0
97949 /*
97950  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_SETD0PID
97951  *
97952  * Endpoint Data PID to DATA0)
97953  */
97954 #define ALT_USB_DEV_DOEPCTL7_SETD0PID_E_END 0x1
97955 
97956 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_SETD0PID register field. */
97957 #define ALT_USB_DEV_DOEPCTL7_SETD0PID_LSB 28
97958 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_SETD0PID register field. */
97959 #define ALT_USB_DEV_DOEPCTL7_SETD0PID_MSB 28
97960 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_SETD0PID register field. */
97961 #define ALT_USB_DEV_DOEPCTL7_SETD0PID_WIDTH 1
97962 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_SETD0PID register field value. */
97963 #define ALT_USB_DEV_DOEPCTL7_SETD0PID_SET_MSK 0x10000000
97964 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_SETD0PID register field value. */
97965 #define ALT_USB_DEV_DOEPCTL7_SETD0PID_CLR_MSK 0xefffffff
97966 /* The reset value of the ALT_USB_DEV_DOEPCTL7_SETD0PID register field. */
97967 #define ALT_USB_DEV_DOEPCTL7_SETD0PID_RESET 0x0
97968 /* Extracts the ALT_USB_DEV_DOEPCTL7_SETD0PID field value from a register. */
97969 #define ALT_USB_DEV_DOEPCTL7_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
97970 /* Produces a ALT_USB_DEV_DOEPCTL7_SETD0PID register field value suitable for setting the register. */
97971 #define ALT_USB_DEV_DOEPCTL7_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
97972 
97973 /*
97974  * Field : Set DATA1 PID - setd1pid
97975  *
97976  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
97977  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
97978  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
97979  *
97980  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
97981  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
97982  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
97983  *
97984  * Field Enumeration Values:
97985  *
97986  * Enum | Value | Description
97987  * :-------------------------------------|:------|:-----------------------
97988  * ALT_USB_DEV_DOEPCTL7_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
97989  * ALT_USB_DEV_DOEPCTL7_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
97990  *
97991  * Field Access Macros:
97992  *
97993  */
97994 /*
97995  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_SETD1PID
97996  *
97997  * Disables Set DATA1 PID
97998  */
97999 #define ALT_USB_DEV_DOEPCTL7_SETD1PID_E_DISD 0x0
98000 /*
98001  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_SETD1PID
98002  *
98003  * Enables Set DATA1 PID
98004  */
98005 #define ALT_USB_DEV_DOEPCTL7_SETD1PID_E_END 0x1
98006 
98007 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_SETD1PID register field. */
98008 #define ALT_USB_DEV_DOEPCTL7_SETD1PID_LSB 29
98009 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_SETD1PID register field. */
98010 #define ALT_USB_DEV_DOEPCTL7_SETD1PID_MSB 29
98011 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_SETD1PID register field. */
98012 #define ALT_USB_DEV_DOEPCTL7_SETD1PID_WIDTH 1
98013 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_SETD1PID register field value. */
98014 #define ALT_USB_DEV_DOEPCTL7_SETD1PID_SET_MSK 0x20000000
98015 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_SETD1PID register field value. */
98016 #define ALT_USB_DEV_DOEPCTL7_SETD1PID_CLR_MSK 0xdfffffff
98017 /* The reset value of the ALT_USB_DEV_DOEPCTL7_SETD1PID register field. */
98018 #define ALT_USB_DEV_DOEPCTL7_SETD1PID_RESET 0x0
98019 /* Extracts the ALT_USB_DEV_DOEPCTL7_SETD1PID field value from a register. */
98020 #define ALT_USB_DEV_DOEPCTL7_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
98021 /* Produces a ALT_USB_DEV_DOEPCTL7_SETD1PID register field value suitable for setting the register. */
98022 #define ALT_USB_DEV_DOEPCTL7_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
98023 
98024 /*
98025  * Field : Endpoint Disable - epdis
98026  *
98027  * Applies to IN and OUT endpoints. The application sets this bit to stop
98028  * transmitting/receiving data on an endpoint, even before the transfer for that
98029  * endpoint is complete. The application must wait for the Endpoint Disabled
98030  * interrupt before treating the endpoint as disabled. The core clears this bit
98031  * before setting the Endpoint Disabled interrupt. The application must set this
98032  * bit only if Endpoint Enable is already set for this endpoint.
98033  *
98034  * Field Enumeration Values:
98035  *
98036  * Enum | Value | Description
98037  * :-----------------------------------|:------|:--------------------
98038  * ALT_USB_DEV_DOEPCTL7_EPDIS_E_INACT | 0x0 | No Endpoint Disable
98039  * ALT_USB_DEV_DOEPCTL7_EPDIS_E_ACT | 0x1 | Endpoint Disable
98040  *
98041  * Field Access Macros:
98042  *
98043  */
98044 /*
98045  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_EPDIS
98046  *
98047  * No Endpoint Disable
98048  */
98049 #define ALT_USB_DEV_DOEPCTL7_EPDIS_E_INACT 0x0
98050 /*
98051  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_EPDIS
98052  *
98053  * Endpoint Disable
98054  */
98055 #define ALT_USB_DEV_DOEPCTL7_EPDIS_E_ACT 0x1
98056 
98057 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_EPDIS register field. */
98058 #define ALT_USB_DEV_DOEPCTL7_EPDIS_LSB 30
98059 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_EPDIS register field. */
98060 #define ALT_USB_DEV_DOEPCTL7_EPDIS_MSB 30
98061 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_EPDIS register field. */
98062 #define ALT_USB_DEV_DOEPCTL7_EPDIS_WIDTH 1
98063 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_EPDIS register field value. */
98064 #define ALT_USB_DEV_DOEPCTL7_EPDIS_SET_MSK 0x40000000
98065 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_EPDIS register field value. */
98066 #define ALT_USB_DEV_DOEPCTL7_EPDIS_CLR_MSK 0xbfffffff
98067 /* The reset value of the ALT_USB_DEV_DOEPCTL7_EPDIS register field. */
98068 #define ALT_USB_DEV_DOEPCTL7_EPDIS_RESET 0x0
98069 /* Extracts the ALT_USB_DEV_DOEPCTL7_EPDIS field value from a register. */
98070 #define ALT_USB_DEV_DOEPCTL7_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
98071 /* Produces a ALT_USB_DEV_DOEPCTL7_EPDIS register field value suitable for setting the register. */
98072 #define ALT_USB_DEV_DOEPCTL7_EPDIS_SET(value) (((value) << 30) & 0x40000000)
98073 
98074 /*
98075  * Field : Endpoint Enable - epena
98076  *
98077  * Applies to IN and OUT endpoints.
98078  *
98079  * * When Scatter/Gather DMA mode is enabled,
98080  *
98081  * * for IN endpoints this bit indicates that the descriptor structure and data
98082  * buffer with data ready to transmit is setup.
98083  *
98084  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
98085  * receive data is setup.
98086  *
98087  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
98088  * mode:
98089  *
98090  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
98091  * the endpoint.
98092  *
98093  * * for OUT endpoints, this bit indicates that the application has allocated the
98094  * memory to start receiving data from the USB.
98095  *
98096  * * The core clears this bit before setting any of the following interrupts on
98097  * this endpoint:
98098  *
98099  * * SETUP Phase Done
98100  *
98101  * * Endpoint Disabled
98102  *
98103  * * Transfer Completed
98104  *
98105  * for control endpoints in DMA mode, this bit must be set to be able to transfer
98106  * SETUP data packets in memory.
98107  *
98108  * Field Enumeration Values:
98109  *
98110  * Enum | Value | Description
98111  * :-----------------------------------|:------|:-------------------------
98112  * ALT_USB_DEV_DOEPCTL7_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
98113  * ALT_USB_DEV_DOEPCTL7_EPENA_E_ACT | 0x1 | Endpoint Enable active
98114  *
98115  * Field Access Macros:
98116  *
98117  */
98118 /*
98119  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_EPENA
98120  *
98121  * Endpoint Enable inactive
98122  */
98123 #define ALT_USB_DEV_DOEPCTL7_EPENA_E_INACT 0x0
98124 /*
98125  * Enumerated value for register field ALT_USB_DEV_DOEPCTL7_EPENA
98126  *
98127  * Endpoint Enable active
98128  */
98129 #define ALT_USB_DEV_DOEPCTL7_EPENA_E_ACT 0x1
98130 
98131 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL7_EPENA register field. */
98132 #define ALT_USB_DEV_DOEPCTL7_EPENA_LSB 31
98133 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL7_EPENA register field. */
98134 #define ALT_USB_DEV_DOEPCTL7_EPENA_MSB 31
98135 /* The width in bits of the ALT_USB_DEV_DOEPCTL7_EPENA register field. */
98136 #define ALT_USB_DEV_DOEPCTL7_EPENA_WIDTH 1
98137 /* The mask used to set the ALT_USB_DEV_DOEPCTL7_EPENA register field value. */
98138 #define ALT_USB_DEV_DOEPCTL7_EPENA_SET_MSK 0x80000000
98139 /* The mask used to clear the ALT_USB_DEV_DOEPCTL7_EPENA register field value. */
98140 #define ALT_USB_DEV_DOEPCTL7_EPENA_CLR_MSK 0x7fffffff
98141 /* The reset value of the ALT_USB_DEV_DOEPCTL7_EPENA register field. */
98142 #define ALT_USB_DEV_DOEPCTL7_EPENA_RESET 0x0
98143 /* Extracts the ALT_USB_DEV_DOEPCTL7_EPENA field value from a register. */
98144 #define ALT_USB_DEV_DOEPCTL7_EPENA_GET(value) (((value) & 0x80000000) >> 31)
98145 /* Produces a ALT_USB_DEV_DOEPCTL7_EPENA register field value suitable for setting the register. */
98146 #define ALT_USB_DEV_DOEPCTL7_EPENA_SET(value) (((value) << 31) & 0x80000000)
98147 
98148 #ifndef __ASSEMBLY__
98149 /*
98150  * WARNING: The C register and register group struct declarations are provided for
98151  * convenience and illustrative purposes. They should, however, be used with
98152  * caution as the C language standard provides no guarantees about the alignment or
98153  * atomicity of device memory accesses. The recommended practice for writing
98154  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
98155  * alt_write_word() functions.
98156  *
98157  * The struct declaration for register ALT_USB_DEV_DOEPCTL7.
98158  */
98159 struct ALT_USB_DEV_DOEPCTL7_s
98160 {
98161  uint32_t mps : 11; /* Maximum Packet Size */
98162  uint32_t : 4; /* *UNDEFINED* */
98163  uint32_t usbactep : 1; /* USB Active Endpoint */
98164  const uint32_t dpid : 1; /* Endpoint Data PID */
98165  const uint32_t naksts : 1; /* NAK Status */
98166  uint32_t eptype : 2; /* Endpoint Type */
98167  uint32_t : 1; /* *UNDEFINED* */
98168  const uint32_t stall : 1; /* STALL Handshake */
98169  uint32_t txfnum : 4; /* TxFIFO Number */
98170  uint32_t cnak : 1; /* Clear NAK */
98171  uint32_t snak : 1; /* Set NAK */
98172  uint32_t setd0pid : 1; /* Set DATA0 PID */
98173  uint32_t setd1pid : 1; /* Set DATA1 PID */
98174  const uint32_t epdis : 1; /* Endpoint Disable */
98175  const uint32_t epena : 1; /* Endpoint Enable */
98176 };
98177 
98178 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL7. */
98179 typedef volatile struct ALT_USB_DEV_DOEPCTL7_s ALT_USB_DEV_DOEPCTL7_t;
98180 #endif /* __ASSEMBLY__ */
98181 
98182 /* The byte offset of the ALT_USB_DEV_DOEPCTL7 register from the beginning of the component. */
98183 #define ALT_USB_DEV_DOEPCTL7_OFST 0x3e0
98184 /* The address of the ALT_USB_DEV_DOEPCTL7 register. */
98185 #define ALT_USB_DEV_DOEPCTL7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL7_OFST))
98186 
98187 /*
98188  * Register : Device OUT Endpoint 7 Interrupt Register - doepint7
98189  *
98190  * This register indicates the status of an endpoint with respect to USB- and AHB-
98191  * related events. The application must read this register when the OUT Endpoints
98192  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
98193  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
98194  * can read this register, it must first read the Device All Endpoints Interrupt
98195  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
98196  * Interrupt register. The application must clear the appropriate bit in this
98197  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
98198  *
98199  * Register Layout
98200  *
98201  * Bits | Access | Reset | Description
98202  * :--------|:-------|:------|:------------------------------------------
98203  * [0] | R | 0x0 | Transfer Completed Interrupt
98204  * [1] | R | 0x0 | Endpoint Disabled Interrupt
98205  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT7_AHBERR
98206  * [3] | R | 0x0 | SETUP Phase Done
98207  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
98208  * [5] | R | 0x0 | Status Phase Received for Control Write
98209  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
98210  * [7] | ??? | 0x0 | *UNDEFINED*
98211  * [8] | R | 0x0 | OUT Packet Error
98212  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
98213  * [10] | ??? | 0x0 | *UNDEFINED*
98214  * [11] | R | 0x0 | Packet Drop Status
98215  * [12] | R | 0x0 | BbleErr Interrupt
98216  * [13] | R | 0x0 | NAK Interrupt
98217  * [14] | R | 0x0 | NYET Interrupt
98218  * [31:15] | ??? | 0x0 | *UNDEFINED*
98219  *
98220  */
98221 /*
98222  * Field : Transfer Completed Interrupt - xfercompl
98223  *
98224  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
98225  *
98226  * This field indicates that the requested data from the internal FIFO is moved to
98227  * external system memory. This interrupt is generated only when the corresponding
98228  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
98229  * is Set.
98230  *
98231  * When Scatter/Gather DMA mode is disabled, this field indicates that the
98232  * programmed transfer is complete on the AHB as well as on the USB, for this
98233  * endpoint.
98234  *
98235  * Field Enumeration Values:
98236  *
98237  * Enum | Value | Description
98238  * :---------------------------------------|:------|:-----------------------------
98239  * ALT_USB_DEV_DOEPINT7_XFERCOMPL_E_INACT | 0x0 | No Interrupt
98240  * ALT_USB_DEV_DOEPINT7_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
98241  *
98242  * Field Access Macros:
98243  *
98244  */
98245 /*
98246  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_XFERCOMPL
98247  *
98248  * No Interrupt
98249  */
98250 #define ALT_USB_DEV_DOEPINT7_XFERCOMPL_E_INACT 0x0
98251 /*
98252  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_XFERCOMPL
98253  *
98254  * Transfer Completed Interrupt
98255  */
98256 #define ALT_USB_DEV_DOEPINT7_XFERCOMPL_E_ACT 0x1
98257 
98258 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_XFERCOMPL register field. */
98259 #define ALT_USB_DEV_DOEPINT7_XFERCOMPL_LSB 0
98260 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_XFERCOMPL register field. */
98261 #define ALT_USB_DEV_DOEPINT7_XFERCOMPL_MSB 0
98262 /* The width in bits of the ALT_USB_DEV_DOEPINT7_XFERCOMPL register field. */
98263 #define ALT_USB_DEV_DOEPINT7_XFERCOMPL_WIDTH 1
98264 /* The mask used to set the ALT_USB_DEV_DOEPINT7_XFERCOMPL register field value. */
98265 #define ALT_USB_DEV_DOEPINT7_XFERCOMPL_SET_MSK 0x00000001
98266 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_XFERCOMPL register field value. */
98267 #define ALT_USB_DEV_DOEPINT7_XFERCOMPL_CLR_MSK 0xfffffffe
98268 /* The reset value of the ALT_USB_DEV_DOEPINT7_XFERCOMPL register field. */
98269 #define ALT_USB_DEV_DOEPINT7_XFERCOMPL_RESET 0x0
98270 /* Extracts the ALT_USB_DEV_DOEPINT7_XFERCOMPL field value from a register. */
98271 #define ALT_USB_DEV_DOEPINT7_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
98272 /* Produces a ALT_USB_DEV_DOEPINT7_XFERCOMPL register field value suitable for setting the register. */
98273 #define ALT_USB_DEV_DOEPINT7_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
98274 
98275 /*
98276  * Field : Endpoint Disabled Interrupt - epdisbld
98277  *
98278  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
98279  * disabled per the application's request.
98280  *
98281  * Field Enumeration Values:
98282  *
98283  * Enum | Value | Description
98284  * :--------------------------------------|:------|:----------------------------
98285  * ALT_USB_DEV_DOEPINT7_EPDISBLD_E_INACT | 0x0 | No Interrupt
98286  * ALT_USB_DEV_DOEPINT7_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
98287  *
98288  * Field Access Macros:
98289  *
98290  */
98291 /*
98292  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_EPDISBLD
98293  *
98294  * No Interrupt
98295  */
98296 #define ALT_USB_DEV_DOEPINT7_EPDISBLD_E_INACT 0x0
98297 /*
98298  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_EPDISBLD
98299  *
98300  * Endpoint Disabled Interrupt
98301  */
98302 #define ALT_USB_DEV_DOEPINT7_EPDISBLD_E_ACT 0x1
98303 
98304 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_EPDISBLD register field. */
98305 #define ALT_USB_DEV_DOEPINT7_EPDISBLD_LSB 1
98306 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_EPDISBLD register field. */
98307 #define ALT_USB_DEV_DOEPINT7_EPDISBLD_MSB 1
98308 /* The width in bits of the ALT_USB_DEV_DOEPINT7_EPDISBLD register field. */
98309 #define ALT_USB_DEV_DOEPINT7_EPDISBLD_WIDTH 1
98310 /* The mask used to set the ALT_USB_DEV_DOEPINT7_EPDISBLD register field value. */
98311 #define ALT_USB_DEV_DOEPINT7_EPDISBLD_SET_MSK 0x00000002
98312 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_EPDISBLD register field value. */
98313 #define ALT_USB_DEV_DOEPINT7_EPDISBLD_CLR_MSK 0xfffffffd
98314 /* The reset value of the ALT_USB_DEV_DOEPINT7_EPDISBLD register field. */
98315 #define ALT_USB_DEV_DOEPINT7_EPDISBLD_RESET 0x0
98316 /* Extracts the ALT_USB_DEV_DOEPINT7_EPDISBLD field value from a register. */
98317 #define ALT_USB_DEV_DOEPINT7_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
98318 /* Produces a ALT_USB_DEV_DOEPINT7_EPDISBLD register field value suitable for setting the register. */
98319 #define ALT_USB_DEV_DOEPINT7_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
98320 
98321 /*
98322  * Field : ahberr
98323  *
98324  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
98325  * there is an AHB error during an AHB read/write. The application can read the
98326  * corresponding endpoint DMA address register to get the error address.
98327  *
98328  * Field Enumeration Values:
98329  *
98330  * Enum | Value | Description
98331  * :------------------------------------|:------|:--------------------
98332  * ALT_USB_DEV_DOEPINT7_AHBERR_E_INACT | 0x0 | No Interrupt
98333  * ALT_USB_DEV_DOEPINT7_AHBERR_E_ACT | 0x1 | AHB Error interrupt
98334  *
98335  * Field Access Macros:
98336  *
98337  */
98338 /*
98339  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_AHBERR
98340  *
98341  * No Interrupt
98342  */
98343 #define ALT_USB_DEV_DOEPINT7_AHBERR_E_INACT 0x0
98344 /*
98345  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_AHBERR
98346  *
98347  * AHB Error interrupt
98348  */
98349 #define ALT_USB_DEV_DOEPINT7_AHBERR_E_ACT 0x1
98350 
98351 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_AHBERR register field. */
98352 #define ALT_USB_DEV_DOEPINT7_AHBERR_LSB 2
98353 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_AHBERR register field. */
98354 #define ALT_USB_DEV_DOEPINT7_AHBERR_MSB 2
98355 /* The width in bits of the ALT_USB_DEV_DOEPINT7_AHBERR register field. */
98356 #define ALT_USB_DEV_DOEPINT7_AHBERR_WIDTH 1
98357 /* The mask used to set the ALT_USB_DEV_DOEPINT7_AHBERR register field value. */
98358 #define ALT_USB_DEV_DOEPINT7_AHBERR_SET_MSK 0x00000004
98359 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_AHBERR register field value. */
98360 #define ALT_USB_DEV_DOEPINT7_AHBERR_CLR_MSK 0xfffffffb
98361 /* The reset value of the ALT_USB_DEV_DOEPINT7_AHBERR register field. */
98362 #define ALT_USB_DEV_DOEPINT7_AHBERR_RESET 0x0
98363 /* Extracts the ALT_USB_DEV_DOEPINT7_AHBERR field value from a register. */
98364 #define ALT_USB_DEV_DOEPINT7_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
98365 /* Produces a ALT_USB_DEV_DOEPINT7_AHBERR register field value suitable for setting the register. */
98366 #define ALT_USB_DEV_DOEPINT7_AHBERR_SET(value) (((value) << 2) & 0x00000004)
98367 
98368 /*
98369  * Field : SETUP Phase Done - setup
98370  *
98371  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
98372  * control endpoint is complete and no more back-to-back SETUP packets were
98373  * received for the current control transfer. On this interrupt, the application
98374  * can decode the received SETUP data packet.
98375  *
98376  * Field Enumeration Values:
98377  *
98378  * Enum | Value | Description
98379  * :-----------------------------------|:------|:--------------------
98380  * ALT_USB_DEV_DOEPINT7_SETUP_E_INACT | 0x0 | No SETUP Phase Done
98381  * ALT_USB_DEV_DOEPINT7_SETUP_E_ACT | 0x1 | SETUP Phase Done
98382  *
98383  * Field Access Macros:
98384  *
98385  */
98386 /*
98387  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_SETUP
98388  *
98389  * No SETUP Phase Done
98390  */
98391 #define ALT_USB_DEV_DOEPINT7_SETUP_E_INACT 0x0
98392 /*
98393  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_SETUP
98394  *
98395  * SETUP Phase Done
98396  */
98397 #define ALT_USB_DEV_DOEPINT7_SETUP_E_ACT 0x1
98398 
98399 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_SETUP register field. */
98400 #define ALT_USB_DEV_DOEPINT7_SETUP_LSB 3
98401 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_SETUP register field. */
98402 #define ALT_USB_DEV_DOEPINT7_SETUP_MSB 3
98403 /* The width in bits of the ALT_USB_DEV_DOEPINT7_SETUP register field. */
98404 #define ALT_USB_DEV_DOEPINT7_SETUP_WIDTH 1
98405 /* The mask used to set the ALT_USB_DEV_DOEPINT7_SETUP register field value. */
98406 #define ALT_USB_DEV_DOEPINT7_SETUP_SET_MSK 0x00000008
98407 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_SETUP register field value. */
98408 #define ALT_USB_DEV_DOEPINT7_SETUP_CLR_MSK 0xfffffff7
98409 /* The reset value of the ALT_USB_DEV_DOEPINT7_SETUP register field. */
98410 #define ALT_USB_DEV_DOEPINT7_SETUP_RESET 0x0
98411 /* Extracts the ALT_USB_DEV_DOEPINT7_SETUP field value from a register. */
98412 #define ALT_USB_DEV_DOEPINT7_SETUP_GET(value) (((value) & 0x00000008) >> 3)
98413 /* Produces a ALT_USB_DEV_DOEPINT7_SETUP register field value suitable for setting the register. */
98414 #define ALT_USB_DEV_DOEPINT7_SETUP_SET(value) (((value) << 3) & 0x00000008)
98415 
98416 /*
98417  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
98418  *
98419  * Applies only to control OUT endpoints. Indicates that an OUT token was received
98420  * when the endpoint was not yet enabled. This interrupt is asserted on the
98421  * endpoint for which the OUT token was received.
98422  *
98423  * Field Enumeration Values:
98424  *
98425  * Enum | Value | Description
98426  * :-----------------------------------------|:------|:---------------------------------------------
98427  * ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
98428  * ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
98429  *
98430  * Field Access Macros:
98431  *
98432  */
98433 /*
98434  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS
98435  *
98436  * No OUT Token Received When Endpoint Disabled
98437  */
98438 #define ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS_E_INACT 0x0
98439 /*
98440  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS
98441  *
98442  * OUT Token Received When Endpoint Disabled
98443  */
98444 #define ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS_E_ACT 0x1
98445 
98446 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS register field. */
98447 #define ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS_LSB 4
98448 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS register field. */
98449 #define ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS_MSB 4
98450 /* The width in bits of the ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS register field. */
98451 #define ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS_WIDTH 1
98452 /* The mask used to set the ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS register field value. */
98453 #define ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS_SET_MSK 0x00000010
98454 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS register field value. */
98455 #define ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS_CLR_MSK 0xffffffef
98456 /* The reset value of the ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS register field. */
98457 #define ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS_RESET 0x0
98458 /* Extracts the ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS field value from a register. */
98459 #define ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
98460 /* Produces a ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS register field value suitable for setting the register. */
98461 #define ALT_USB_DEV_DOEPINT7_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
98462 
98463 /*
98464  * Field : Status Phase Received for Control Write - stsphsercvd
98465  *
98466  * This interrupt is valid only for Control OUT endpoints and only in Scatter
98467  * Gather DMA mode. This interrupt is generated only after the core has transferred
98468  * all the data that the host has sent during the data phase of a control write
98469  * transfer, to the system memory buffer. The interrupt indicates to the
98470  * application that the host has switched from data phase to the status phase of a
98471  * Control Write transfer. The application can use this interrupt to ACK or STALL
98472  * the Status phase, after it has decoded the data phase. This is applicable only
98473  * in Case of Scatter Gather DMA mode.
98474  *
98475  * Field Enumeration Values:
98476  *
98477  * Enum | Value | Description
98478  * :-----------------------------------------|:------|:-------------------------------------------
98479  * ALT_USB_DEV_DOEPINT7_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
98480  * ALT_USB_DEV_DOEPINT7_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
98481  *
98482  * Field Access Macros:
98483  *
98484  */
98485 /*
98486  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_STSPHSERCVD
98487  *
98488  * No Status Phase Received for Control Write
98489  */
98490 #define ALT_USB_DEV_DOEPINT7_STSPHSERCVD_E_INACT 0x0
98491 /*
98492  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_STSPHSERCVD
98493  *
98494  * Status Phase Received for Control Write
98495  */
98496 #define ALT_USB_DEV_DOEPINT7_STSPHSERCVD_E_ACT 0x1
98497 
98498 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_STSPHSERCVD register field. */
98499 #define ALT_USB_DEV_DOEPINT7_STSPHSERCVD_LSB 5
98500 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_STSPHSERCVD register field. */
98501 #define ALT_USB_DEV_DOEPINT7_STSPHSERCVD_MSB 5
98502 /* The width in bits of the ALT_USB_DEV_DOEPINT7_STSPHSERCVD register field. */
98503 #define ALT_USB_DEV_DOEPINT7_STSPHSERCVD_WIDTH 1
98504 /* The mask used to set the ALT_USB_DEV_DOEPINT7_STSPHSERCVD register field value. */
98505 #define ALT_USB_DEV_DOEPINT7_STSPHSERCVD_SET_MSK 0x00000020
98506 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_STSPHSERCVD register field value. */
98507 #define ALT_USB_DEV_DOEPINT7_STSPHSERCVD_CLR_MSK 0xffffffdf
98508 /* The reset value of the ALT_USB_DEV_DOEPINT7_STSPHSERCVD register field. */
98509 #define ALT_USB_DEV_DOEPINT7_STSPHSERCVD_RESET 0x0
98510 /* Extracts the ALT_USB_DEV_DOEPINT7_STSPHSERCVD field value from a register. */
98511 #define ALT_USB_DEV_DOEPINT7_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
98512 /* Produces a ALT_USB_DEV_DOEPINT7_STSPHSERCVD register field value suitable for setting the register. */
98513 #define ALT_USB_DEV_DOEPINT7_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
98514 
98515 /*
98516  * Field : Back-to-Back SETUP Packets Received - back2backsetup
98517  *
98518  * Applies to Control OUT endpoints only. This bit indicates that the core has
98519  * received more than three back-to-back SETUP packets for this particular
98520  * endpoint. for information about handling this interrupt,
98521  *
98522  * Field Enumeration Values:
98523  *
98524  * Enum | Value | Description
98525  * :--------------------------------------------|:------|:---------------------------------------
98526  * ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
98527  * ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
98528  *
98529  * Field Access Macros:
98530  *
98531  */
98532 /*
98533  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP
98534  *
98535  * No Back-to-Back SETUP Packets Received
98536  */
98537 #define ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP_E_INACT 0x0
98538 /*
98539  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP
98540  *
98541  * Back-to-Back SETUP Packets Received
98542  */
98543 #define ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP_E_ACT 0x1
98544 
98545 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP register field. */
98546 #define ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP_LSB 6
98547 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP register field. */
98548 #define ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP_MSB 6
98549 /* The width in bits of the ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP register field. */
98550 #define ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP_WIDTH 1
98551 /* The mask used to set the ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP register field value. */
98552 #define ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP_SET_MSK 0x00000040
98553 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP register field value. */
98554 #define ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP_CLR_MSK 0xffffffbf
98555 /* The reset value of the ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP register field. */
98556 #define ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP_RESET 0x0
98557 /* Extracts the ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP field value from a register. */
98558 #define ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
98559 /* Produces a ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP register field value suitable for setting the register. */
98560 #define ALT_USB_DEV_DOEPINT7_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
98561 
98562 /*
98563  * Field : OUT Packet Error - outpkterr
98564  *
98565  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
98566  * an overflow or a CRC error for non-Isochronous OUT packet.
98567  *
98568  * Field Enumeration Values:
98569  *
98570  * Enum | Value | Description
98571  * :---------------------------------------|:------|:--------------------
98572  * ALT_USB_DEV_DOEPINT7_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
98573  * ALT_USB_DEV_DOEPINT7_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
98574  *
98575  * Field Access Macros:
98576  *
98577  */
98578 /*
98579  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_OUTPKTERR
98580  *
98581  * No OUT Packet Error
98582  */
98583 #define ALT_USB_DEV_DOEPINT7_OUTPKTERR_E_INACT 0x0
98584 /*
98585  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_OUTPKTERR
98586  *
98587  * OUT Packet Error
98588  */
98589 #define ALT_USB_DEV_DOEPINT7_OUTPKTERR_E_ACT 0x1
98590 
98591 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_OUTPKTERR register field. */
98592 #define ALT_USB_DEV_DOEPINT7_OUTPKTERR_LSB 8
98593 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_OUTPKTERR register field. */
98594 #define ALT_USB_DEV_DOEPINT7_OUTPKTERR_MSB 8
98595 /* The width in bits of the ALT_USB_DEV_DOEPINT7_OUTPKTERR register field. */
98596 #define ALT_USB_DEV_DOEPINT7_OUTPKTERR_WIDTH 1
98597 /* The mask used to set the ALT_USB_DEV_DOEPINT7_OUTPKTERR register field value. */
98598 #define ALT_USB_DEV_DOEPINT7_OUTPKTERR_SET_MSK 0x00000100
98599 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_OUTPKTERR register field value. */
98600 #define ALT_USB_DEV_DOEPINT7_OUTPKTERR_CLR_MSK 0xfffffeff
98601 /* The reset value of the ALT_USB_DEV_DOEPINT7_OUTPKTERR register field. */
98602 #define ALT_USB_DEV_DOEPINT7_OUTPKTERR_RESET 0x0
98603 /* Extracts the ALT_USB_DEV_DOEPINT7_OUTPKTERR field value from a register. */
98604 #define ALT_USB_DEV_DOEPINT7_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
98605 /* Produces a ALT_USB_DEV_DOEPINT7_OUTPKTERR register field value suitable for setting the register. */
98606 #define ALT_USB_DEV_DOEPINT7_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
98607 
98608 /*
98609  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
98610  *
98611  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
98612  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
98613  * the descriptor accessed is not ready for the Core to process, such as Host busy
98614  * or DMA done
98615  *
98616  * Field Enumeration Values:
98617  *
98618  * Enum | Value | Description
98619  * :-------------------------------------|:------|:--------------
98620  * ALT_USB_DEV_DOEPINT7_BNAINTR_E_INACT | 0x0 | No interrupt
98621  * ALT_USB_DEV_DOEPINT7_BNAINTR_E_ACT | 0x1 | BNA interrupt
98622  *
98623  * Field Access Macros:
98624  *
98625  */
98626 /*
98627  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_BNAINTR
98628  *
98629  * No interrupt
98630  */
98631 #define ALT_USB_DEV_DOEPINT7_BNAINTR_E_INACT 0x0
98632 /*
98633  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_BNAINTR
98634  *
98635  * BNA interrupt
98636  */
98637 #define ALT_USB_DEV_DOEPINT7_BNAINTR_E_ACT 0x1
98638 
98639 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_BNAINTR register field. */
98640 #define ALT_USB_DEV_DOEPINT7_BNAINTR_LSB 9
98641 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_BNAINTR register field. */
98642 #define ALT_USB_DEV_DOEPINT7_BNAINTR_MSB 9
98643 /* The width in bits of the ALT_USB_DEV_DOEPINT7_BNAINTR register field. */
98644 #define ALT_USB_DEV_DOEPINT7_BNAINTR_WIDTH 1
98645 /* The mask used to set the ALT_USB_DEV_DOEPINT7_BNAINTR register field value. */
98646 #define ALT_USB_DEV_DOEPINT7_BNAINTR_SET_MSK 0x00000200
98647 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_BNAINTR register field value. */
98648 #define ALT_USB_DEV_DOEPINT7_BNAINTR_CLR_MSK 0xfffffdff
98649 /* The reset value of the ALT_USB_DEV_DOEPINT7_BNAINTR register field. */
98650 #define ALT_USB_DEV_DOEPINT7_BNAINTR_RESET 0x0
98651 /* Extracts the ALT_USB_DEV_DOEPINT7_BNAINTR field value from a register. */
98652 #define ALT_USB_DEV_DOEPINT7_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
98653 /* Produces a ALT_USB_DEV_DOEPINT7_BNAINTR register field value suitable for setting the register. */
98654 #define ALT_USB_DEV_DOEPINT7_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
98655 
98656 /*
98657  * Field : Packet Drop Status - pktdrpsts
98658  *
98659  * This bit indicates to the application that an ISOC OUT packet has been dropped.
98660  * This bit does not have an associated mask bit and does not generate an
98661  * interrupt.
98662  *
98663  * Field Enumeration Values:
98664  *
98665  * Enum | Value | Description
98666  * :---------------------------------------|:------|:-----------------------------
98667  * ALT_USB_DEV_DOEPINT7_PKTDRPSTS_E_INACT | 0x0 | No interrupt
98668  * ALT_USB_DEV_DOEPINT7_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
98669  *
98670  * Field Access Macros:
98671  *
98672  */
98673 /*
98674  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_PKTDRPSTS
98675  *
98676  * No interrupt
98677  */
98678 #define ALT_USB_DEV_DOEPINT7_PKTDRPSTS_E_INACT 0x0
98679 /*
98680  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_PKTDRPSTS
98681  *
98682  * Packet Drop Status interrupt
98683  */
98684 #define ALT_USB_DEV_DOEPINT7_PKTDRPSTS_E_ACT 0x1
98685 
98686 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_PKTDRPSTS register field. */
98687 #define ALT_USB_DEV_DOEPINT7_PKTDRPSTS_LSB 11
98688 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_PKTDRPSTS register field. */
98689 #define ALT_USB_DEV_DOEPINT7_PKTDRPSTS_MSB 11
98690 /* The width in bits of the ALT_USB_DEV_DOEPINT7_PKTDRPSTS register field. */
98691 #define ALT_USB_DEV_DOEPINT7_PKTDRPSTS_WIDTH 1
98692 /* The mask used to set the ALT_USB_DEV_DOEPINT7_PKTDRPSTS register field value. */
98693 #define ALT_USB_DEV_DOEPINT7_PKTDRPSTS_SET_MSK 0x00000800
98694 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_PKTDRPSTS register field value. */
98695 #define ALT_USB_DEV_DOEPINT7_PKTDRPSTS_CLR_MSK 0xfffff7ff
98696 /* The reset value of the ALT_USB_DEV_DOEPINT7_PKTDRPSTS register field. */
98697 #define ALT_USB_DEV_DOEPINT7_PKTDRPSTS_RESET 0x0
98698 /* Extracts the ALT_USB_DEV_DOEPINT7_PKTDRPSTS field value from a register. */
98699 #define ALT_USB_DEV_DOEPINT7_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
98700 /* Produces a ALT_USB_DEV_DOEPINT7_PKTDRPSTS register field value suitable for setting the register. */
98701 #define ALT_USB_DEV_DOEPINT7_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
98702 
98703 /*
98704  * Field : BbleErr Interrupt - bbleerr
98705  *
98706  * The core generates this interrupt when babble is received for the endpoint.
98707  *
98708  * Field Enumeration Values:
98709  *
98710  * Enum | Value | Description
98711  * :-------------------------------------|:------|:------------------
98712  * ALT_USB_DEV_DOEPINT7_BBLEERR_E_INACT | 0x0 | No interrupt
98713  * ALT_USB_DEV_DOEPINT7_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
98714  *
98715  * Field Access Macros:
98716  *
98717  */
98718 /*
98719  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_BBLEERR
98720  *
98721  * No interrupt
98722  */
98723 #define ALT_USB_DEV_DOEPINT7_BBLEERR_E_INACT 0x0
98724 /*
98725  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_BBLEERR
98726  *
98727  * BbleErr interrupt
98728  */
98729 #define ALT_USB_DEV_DOEPINT7_BBLEERR_E_ACT 0x1
98730 
98731 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_BBLEERR register field. */
98732 #define ALT_USB_DEV_DOEPINT7_BBLEERR_LSB 12
98733 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_BBLEERR register field. */
98734 #define ALT_USB_DEV_DOEPINT7_BBLEERR_MSB 12
98735 /* The width in bits of the ALT_USB_DEV_DOEPINT7_BBLEERR register field. */
98736 #define ALT_USB_DEV_DOEPINT7_BBLEERR_WIDTH 1
98737 /* The mask used to set the ALT_USB_DEV_DOEPINT7_BBLEERR register field value. */
98738 #define ALT_USB_DEV_DOEPINT7_BBLEERR_SET_MSK 0x00001000
98739 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_BBLEERR register field value. */
98740 #define ALT_USB_DEV_DOEPINT7_BBLEERR_CLR_MSK 0xffffefff
98741 /* The reset value of the ALT_USB_DEV_DOEPINT7_BBLEERR register field. */
98742 #define ALT_USB_DEV_DOEPINT7_BBLEERR_RESET 0x0
98743 /* Extracts the ALT_USB_DEV_DOEPINT7_BBLEERR field value from a register. */
98744 #define ALT_USB_DEV_DOEPINT7_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
98745 /* Produces a ALT_USB_DEV_DOEPINT7_BBLEERR register field value suitable for setting the register. */
98746 #define ALT_USB_DEV_DOEPINT7_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
98747 
98748 /*
98749  * Field : NAK Interrupt - nakintrpt
98750  *
98751  * The core generates this interrupt when a NAK is transmitted or received by the
98752  * device. In case of isochronous IN endpoints the interrupt gets generated when a
98753  * zero length packet is transmitted due to un-availability of data in the TXFifo.
98754  *
98755  * Field Enumeration Values:
98756  *
98757  * Enum | Value | Description
98758  * :---------------------------------------|:------|:--------------
98759  * ALT_USB_DEV_DOEPINT7_NAKINTRPT_E_INACT | 0x0 | No interrupt
98760  * ALT_USB_DEV_DOEPINT7_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
98761  *
98762  * Field Access Macros:
98763  *
98764  */
98765 /*
98766  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_NAKINTRPT
98767  *
98768  * No interrupt
98769  */
98770 #define ALT_USB_DEV_DOEPINT7_NAKINTRPT_E_INACT 0x0
98771 /*
98772  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_NAKINTRPT
98773  *
98774  * NAK Interrupt
98775  */
98776 #define ALT_USB_DEV_DOEPINT7_NAKINTRPT_E_ACT 0x1
98777 
98778 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_NAKINTRPT register field. */
98779 #define ALT_USB_DEV_DOEPINT7_NAKINTRPT_LSB 13
98780 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_NAKINTRPT register field. */
98781 #define ALT_USB_DEV_DOEPINT7_NAKINTRPT_MSB 13
98782 /* The width in bits of the ALT_USB_DEV_DOEPINT7_NAKINTRPT register field. */
98783 #define ALT_USB_DEV_DOEPINT7_NAKINTRPT_WIDTH 1
98784 /* The mask used to set the ALT_USB_DEV_DOEPINT7_NAKINTRPT register field value. */
98785 #define ALT_USB_DEV_DOEPINT7_NAKINTRPT_SET_MSK 0x00002000
98786 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_NAKINTRPT register field value. */
98787 #define ALT_USB_DEV_DOEPINT7_NAKINTRPT_CLR_MSK 0xffffdfff
98788 /* The reset value of the ALT_USB_DEV_DOEPINT7_NAKINTRPT register field. */
98789 #define ALT_USB_DEV_DOEPINT7_NAKINTRPT_RESET 0x0
98790 /* Extracts the ALT_USB_DEV_DOEPINT7_NAKINTRPT field value from a register. */
98791 #define ALT_USB_DEV_DOEPINT7_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
98792 /* Produces a ALT_USB_DEV_DOEPINT7_NAKINTRPT register field value suitable for setting the register. */
98793 #define ALT_USB_DEV_DOEPINT7_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
98794 
98795 /*
98796  * Field : NYET Interrupt - nyetintrpt
98797  *
98798  * The core generates this interrupt when a NYET response is transmitted for a non
98799  * isochronous OUT endpoint.
98800  *
98801  * Field Enumeration Values:
98802  *
98803  * Enum | Value | Description
98804  * :----------------------------------------|:------|:---------------
98805  * ALT_USB_DEV_DOEPINT7_NYETINTRPT_E_INACT | 0x0 | No interrupt
98806  * ALT_USB_DEV_DOEPINT7_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
98807  *
98808  * Field Access Macros:
98809  *
98810  */
98811 /*
98812  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_NYETINTRPT
98813  *
98814  * No interrupt
98815  */
98816 #define ALT_USB_DEV_DOEPINT7_NYETINTRPT_E_INACT 0x0
98817 /*
98818  * Enumerated value for register field ALT_USB_DEV_DOEPINT7_NYETINTRPT
98819  *
98820  * NYET Interrupt
98821  */
98822 #define ALT_USB_DEV_DOEPINT7_NYETINTRPT_E_ACT 0x1
98823 
98824 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT7_NYETINTRPT register field. */
98825 #define ALT_USB_DEV_DOEPINT7_NYETINTRPT_LSB 14
98826 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT7_NYETINTRPT register field. */
98827 #define ALT_USB_DEV_DOEPINT7_NYETINTRPT_MSB 14
98828 /* The width in bits of the ALT_USB_DEV_DOEPINT7_NYETINTRPT register field. */
98829 #define ALT_USB_DEV_DOEPINT7_NYETINTRPT_WIDTH 1
98830 /* The mask used to set the ALT_USB_DEV_DOEPINT7_NYETINTRPT register field value. */
98831 #define ALT_USB_DEV_DOEPINT7_NYETINTRPT_SET_MSK 0x00004000
98832 /* The mask used to clear the ALT_USB_DEV_DOEPINT7_NYETINTRPT register field value. */
98833 #define ALT_USB_DEV_DOEPINT7_NYETINTRPT_CLR_MSK 0xffffbfff
98834 /* The reset value of the ALT_USB_DEV_DOEPINT7_NYETINTRPT register field. */
98835 #define ALT_USB_DEV_DOEPINT7_NYETINTRPT_RESET 0x0
98836 /* Extracts the ALT_USB_DEV_DOEPINT7_NYETINTRPT field value from a register. */
98837 #define ALT_USB_DEV_DOEPINT7_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
98838 /* Produces a ALT_USB_DEV_DOEPINT7_NYETINTRPT register field value suitable for setting the register. */
98839 #define ALT_USB_DEV_DOEPINT7_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
98840 
98841 #ifndef __ASSEMBLY__
98842 /*
98843  * WARNING: The C register and register group struct declarations are provided for
98844  * convenience and illustrative purposes. They should, however, be used with
98845  * caution as the C language standard provides no guarantees about the alignment or
98846  * atomicity of device memory accesses. The recommended practice for writing
98847  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
98848  * alt_write_word() functions.
98849  *
98850  * The struct declaration for register ALT_USB_DEV_DOEPINT7.
98851  */
98852 struct ALT_USB_DEV_DOEPINT7_s
98853 {
98854  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
98855  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
98856  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT7_AHBERR */
98857  const uint32_t setup : 1; /* SETUP Phase Done */
98858  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
98859  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
98860  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
98861  uint32_t : 1; /* *UNDEFINED* */
98862  const uint32_t outpkterr : 1; /* OUT Packet Error */
98863  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
98864  uint32_t : 1; /* *UNDEFINED* */
98865  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
98866  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
98867  const uint32_t nakintrpt : 1; /* NAK Interrupt */
98868  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
98869  uint32_t : 17; /* *UNDEFINED* */
98870 };
98871 
98872 /* The typedef declaration for register ALT_USB_DEV_DOEPINT7. */
98873 typedef volatile struct ALT_USB_DEV_DOEPINT7_s ALT_USB_DEV_DOEPINT7_t;
98874 #endif /* __ASSEMBLY__ */
98875 
98876 /* The byte offset of the ALT_USB_DEV_DOEPINT7 register from the beginning of the component. */
98877 #define ALT_USB_DEV_DOEPINT7_OFST 0x3e8
98878 /* The address of the ALT_USB_DEV_DOEPINT7 register. */
98879 #define ALT_USB_DEV_DOEPINT7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT7_OFST))
98880 
98881 /*
98882  * Register : Device OUT Endpoint 7 Transfer Size Register - doeptsiz7
98883  *
98884  * The application must modify this register before enabling the endpoint. Once the
98885  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
98886  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
98887  * application can only read this register once the core has cleared the Endpoint
98888  * Enable bit.
98889  *
98890  * Register Layout
98891  *
98892  * Bits | Access | Reset | Description
98893  * :--------|:-------|:------|:-------------------
98894  * [18:0] | RW | 0x0 | Transfer Size
98895  * [28:19] | RW | 0x0 | Packet Count
98896  * [30:29] | R | 0x0 | SETUP Packet Count
98897  * [31] | ??? | 0x0 | *UNDEFINED*
98898  *
98899  */
98900 /*
98901  * Field : Transfer Size - xfersize
98902  *
98903  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
98904  * application only after it has exhausted the transfer size amount of data. The
98905  * transfer size can be Set to the maximum packet size of the endpoint, to be
98906  * interrupted at the end of each packet. The core decrements this field every time
98907  * a packet from the external memory is written to the RxFIFO.
98908  *
98909  * Field Access Macros:
98910  *
98911  */
98912 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ7_XFERSIZE register field. */
98913 #define ALT_USB_DEV_DOEPTSIZ7_XFERSIZE_LSB 0
98914 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ7_XFERSIZE register field. */
98915 #define ALT_USB_DEV_DOEPTSIZ7_XFERSIZE_MSB 18
98916 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ7_XFERSIZE register field. */
98917 #define ALT_USB_DEV_DOEPTSIZ7_XFERSIZE_WIDTH 19
98918 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ7_XFERSIZE register field value. */
98919 #define ALT_USB_DEV_DOEPTSIZ7_XFERSIZE_SET_MSK 0x0007ffff
98920 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ7_XFERSIZE register field value. */
98921 #define ALT_USB_DEV_DOEPTSIZ7_XFERSIZE_CLR_MSK 0xfff80000
98922 /* The reset value of the ALT_USB_DEV_DOEPTSIZ7_XFERSIZE register field. */
98923 #define ALT_USB_DEV_DOEPTSIZ7_XFERSIZE_RESET 0x0
98924 /* Extracts the ALT_USB_DEV_DOEPTSIZ7_XFERSIZE field value from a register. */
98925 #define ALT_USB_DEV_DOEPTSIZ7_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
98926 /* Produces a ALT_USB_DEV_DOEPTSIZ7_XFERSIZE register field value suitable for setting the register. */
98927 #define ALT_USB_DEV_DOEPTSIZ7_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
98928 
98929 /*
98930  * Field : Packet Count - pktcnt
98931  *
98932  * Indicates the total number of USB packets that constitute the Transfer Size
98933  * amount of data for endpoint 0.This field is decremented every time a packet
98934  * (maximum size or short packet) is read from the RxFIFO.
98935  *
98936  * Field Access Macros:
98937  *
98938  */
98939 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ7_PKTCNT register field. */
98940 #define ALT_USB_DEV_DOEPTSIZ7_PKTCNT_LSB 19
98941 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ7_PKTCNT register field. */
98942 #define ALT_USB_DEV_DOEPTSIZ7_PKTCNT_MSB 28
98943 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ7_PKTCNT register field. */
98944 #define ALT_USB_DEV_DOEPTSIZ7_PKTCNT_WIDTH 10
98945 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ7_PKTCNT register field value. */
98946 #define ALT_USB_DEV_DOEPTSIZ7_PKTCNT_SET_MSK 0x1ff80000
98947 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ7_PKTCNT register field value. */
98948 #define ALT_USB_DEV_DOEPTSIZ7_PKTCNT_CLR_MSK 0xe007ffff
98949 /* The reset value of the ALT_USB_DEV_DOEPTSIZ7_PKTCNT register field. */
98950 #define ALT_USB_DEV_DOEPTSIZ7_PKTCNT_RESET 0x0
98951 /* Extracts the ALT_USB_DEV_DOEPTSIZ7_PKTCNT field value from a register. */
98952 #define ALT_USB_DEV_DOEPTSIZ7_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
98953 /* Produces a ALT_USB_DEV_DOEPTSIZ7_PKTCNT register field value suitable for setting the register. */
98954 #define ALT_USB_DEV_DOEPTSIZ7_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
98955 
98956 /*
98957  * Field : SETUP Packet Count - rxdpid
98958  *
98959  * Applies to isochronous OUT endpoints only.This is the data PID received in the
98960  * last packet for this endpoint. Use datax.
98961  *
98962  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
98963  * number of back-to-back SETUP data packets the endpoint can receive.
98964  *
98965  * Field Enumeration Values:
98966  *
98967  * Enum | Value | Description
98968  * :-----------------------------------------|:------|:-------------------
98969  * ALT_USB_DEV_DOEPTSIZ7_RXDPID_E_DATA0 | 0x0 | DATA0
98970  * ALT_USB_DEV_DOEPTSIZ7_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
98971  * ALT_USB_DEV_DOEPTSIZ7_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
98972  * ALT_USB_DEV_DOEPTSIZ7_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
98973  *
98974  * Field Access Macros:
98975  *
98976  */
98977 /*
98978  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ7_RXDPID
98979  *
98980  * DATA0
98981  */
98982 #define ALT_USB_DEV_DOEPTSIZ7_RXDPID_E_DATA0 0x0
98983 /*
98984  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ7_RXDPID
98985  *
98986  * DATA2 or 1 packet
98987  */
98988 #define ALT_USB_DEV_DOEPTSIZ7_RXDPID_E_DATA2PKT1 0x1
98989 /*
98990  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ7_RXDPID
98991  *
98992  * DATA1 or 2 packets
98993  */
98994 #define ALT_USB_DEV_DOEPTSIZ7_RXDPID_E_DATA1PKT2 0x2
98995 /*
98996  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ7_RXDPID
98997  *
98998  * MDATA or 3 packets
98999  */
99000 #define ALT_USB_DEV_DOEPTSIZ7_RXDPID_E_MDATAPKT3 0x3
99001 
99002 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ7_RXDPID register field. */
99003 #define ALT_USB_DEV_DOEPTSIZ7_RXDPID_LSB 29
99004 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ7_RXDPID register field. */
99005 #define ALT_USB_DEV_DOEPTSIZ7_RXDPID_MSB 30
99006 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ7_RXDPID register field. */
99007 #define ALT_USB_DEV_DOEPTSIZ7_RXDPID_WIDTH 2
99008 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ7_RXDPID register field value. */
99009 #define ALT_USB_DEV_DOEPTSIZ7_RXDPID_SET_MSK 0x60000000
99010 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ7_RXDPID register field value. */
99011 #define ALT_USB_DEV_DOEPTSIZ7_RXDPID_CLR_MSK 0x9fffffff
99012 /* The reset value of the ALT_USB_DEV_DOEPTSIZ7_RXDPID register field. */
99013 #define ALT_USB_DEV_DOEPTSIZ7_RXDPID_RESET 0x0
99014 /* Extracts the ALT_USB_DEV_DOEPTSIZ7_RXDPID field value from a register. */
99015 #define ALT_USB_DEV_DOEPTSIZ7_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
99016 /* Produces a ALT_USB_DEV_DOEPTSIZ7_RXDPID register field value suitable for setting the register. */
99017 #define ALT_USB_DEV_DOEPTSIZ7_RXDPID_SET(value) (((value) << 29) & 0x60000000)
99018 
99019 #ifndef __ASSEMBLY__
99020 /*
99021  * WARNING: The C register and register group struct declarations are provided for
99022  * convenience and illustrative purposes. They should, however, be used with
99023  * caution as the C language standard provides no guarantees about the alignment or
99024  * atomicity of device memory accesses. The recommended practice for writing
99025  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
99026  * alt_write_word() functions.
99027  *
99028  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ7.
99029  */
99030 struct ALT_USB_DEV_DOEPTSIZ7_s
99031 {
99032  uint32_t xfersize : 19; /* Transfer Size */
99033  uint32_t pktcnt : 10; /* Packet Count */
99034  const uint32_t rxdpid : 2; /* SETUP Packet Count */
99035  uint32_t : 1; /* *UNDEFINED* */
99036 };
99037 
99038 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ7. */
99039 typedef volatile struct ALT_USB_DEV_DOEPTSIZ7_s ALT_USB_DEV_DOEPTSIZ7_t;
99040 #endif /* __ASSEMBLY__ */
99041 
99042 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ7 register from the beginning of the component. */
99043 #define ALT_USB_DEV_DOEPTSIZ7_OFST 0x3f0
99044 /* The address of the ALT_USB_DEV_DOEPTSIZ7 register. */
99045 #define ALT_USB_DEV_DOEPTSIZ7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ7_OFST))
99046 
99047 /*
99048  * Register : Device OUT Endpoint 7 DMA Address Register - doepdma7
99049  *
99050  * DMA OUT Address.
99051  *
99052  * Register Layout
99053  *
99054  * Bits | Access | Reset | Description
99055  * :-------|:-------|:--------|:------------
99056  * [31:0] | RW | Unknown | DMA Address
99057  *
99058  */
99059 /*
99060  * Field : DMA Address - doepdma7
99061  *
99062  * Holds the start address of the external memory for storing or fetching endpoint
99063  * data. for control endpoints, this field stores control OUT data packets as well
99064  * as SETUP transaction data packets. When more than three SETUP packets are
99065  * received back-to-back, the SETUP data packet in the memory is overwritten. This
99066  * register is incremented on every AHB transaction. The application can give only
99067  * a DWORD-aligned address.
99068  *
99069  * When Scatter/Gather DMA mode is not enabled, the application programs the start
99070  * address value in this field.
99071  *
99072  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
99073  * for the descriptor list.
99074  *
99075  * Field Access Macros:
99076  *
99077  */
99078 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA7_DOEPDMA7 register field. */
99079 #define ALT_USB_DEV_DOEPDMA7_DOEPDMA7_LSB 0
99080 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA7_DOEPDMA7 register field. */
99081 #define ALT_USB_DEV_DOEPDMA7_DOEPDMA7_MSB 31
99082 /* The width in bits of the ALT_USB_DEV_DOEPDMA7_DOEPDMA7 register field. */
99083 #define ALT_USB_DEV_DOEPDMA7_DOEPDMA7_WIDTH 32
99084 /* The mask used to set the ALT_USB_DEV_DOEPDMA7_DOEPDMA7 register field value. */
99085 #define ALT_USB_DEV_DOEPDMA7_DOEPDMA7_SET_MSK 0xffffffff
99086 /* The mask used to clear the ALT_USB_DEV_DOEPDMA7_DOEPDMA7 register field value. */
99087 #define ALT_USB_DEV_DOEPDMA7_DOEPDMA7_CLR_MSK 0x00000000
99088 /* The reset value of the ALT_USB_DEV_DOEPDMA7_DOEPDMA7 register field is UNKNOWN. */
99089 #define ALT_USB_DEV_DOEPDMA7_DOEPDMA7_RESET 0x0
99090 /* Extracts the ALT_USB_DEV_DOEPDMA7_DOEPDMA7 field value from a register. */
99091 #define ALT_USB_DEV_DOEPDMA7_DOEPDMA7_GET(value) (((value) & 0xffffffff) >> 0)
99092 /* Produces a ALT_USB_DEV_DOEPDMA7_DOEPDMA7 register field value suitable for setting the register. */
99093 #define ALT_USB_DEV_DOEPDMA7_DOEPDMA7_SET(value) (((value) << 0) & 0xffffffff)
99094 
99095 #ifndef __ASSEMBLY__
99096 /*
99097  * WARNING: The C register and register group struct declarations are provided for
99098  * convenience and illustrative purposes. They should, however, be used with
99099  * caution as the C language standard provides no guarantees about the alignment or
99100  * atomicity of device memory accesses. The recommended practice for writing
99101  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
99102  * alt_write_word() functions.
99103  *
99104  * The struct declaration for register ALT_USB_DEV_DOEPDMA7.
99105  */
99106 struct ALT_USB_DEV_DOEPDMA7_s
99107 {
99108  uint32_t doepdma7 : 32; /* DMA Address */
99109 };
99110 
99111 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA7. */
99112 typedef volatile struct ALT_USB_DEV_DOEPDMA7_s ALT_USB_DEV_DOEPDMA7_t;
99113 #endif /* __ASSEMBLY__ */
99114 
99115 /* The byte offset of the ALT_USB_DEV_DOEPDMA7 register from the beginning of the component. */
99116 #define ALT_USB_DEV_DOEPDMA7_OFST 0x3f4
99117 /* The address of the ALT_USB_DEV_DOEPDMA7 register. */
99118 #define ALT_USB_DEV_DOEPDMA7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA7_OFST))
99119 
99120 /*
99121  * Register : Device OUT Endpoint 7 Buffer Address - doepdmab7
99122  *
99123  * DMA Buffer Address.
99124  *
99125  * Register Layout
99126  *
99127  * Bits | Access | Reset | Description
99128  * :-------|:-------|:--------|:-------------------
99129  * [31:0] | R | Unknown | DMA Buffer Address
99130  *
99131  */
99132 /*
99133  * Field : DMA Buffer Address - doepdmab7
99134  *
99135  * Holds the current buffer address. This register is updated as and when the data
99136  * transfer for the corresponding end point is in progress. This register is
99137  * present only in Scatter/Gather DMA mode.
99138  *
99139  * Field Access Macros:
99140  *
99141  */
99142 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7 register field. */
99143 #define ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7_LSB 0
99144 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7 register field. */
99145 #define ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7_MSB 31
99146 /* The width in bits of the ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7 register field. */
99147 #define ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7_WIDTH 32
99148 /* The mask used to set the ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7 register field value. */
99149 #define ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7_SET_MSK 0xffffffff
99150 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7 register field value. */
99151 #define ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7_CLR_MSK 0x00000000
99152 /* The reset value of the ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7 register field is UNKNOWN. */
99153 #define ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7_RESET 0x0
99154 /* Extracts the ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7 field value from a register. */
99155 #define ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7_GET(value) (((value) & 0xffffffff) >> 0)
99156 /* Produces a ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7 register field value suitable for setting the register. */
99157 #define ALT_USB_DEV_DOEPDMAB7_DOEPDMAB7_SET(value) (((value) << 0) & 0xffffffff)
99158 
99159 #ifndef __ASSEMBLY__
99160 /*
99161  * WARNING: The C register and register group struct declarations are provided for
99162  * convenience and illustrative purposes. They should, however, be used with
99163  * caution as the C language standard provides no guarantees about the alignment or
99164  * atomicity of device memory accesses. The recommended practice for writing
99165  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
99166  * alt_write_word() functions.
99167  *
99168  * The struct declaration for register ALT_USB_DEV_DOEPDMAB7.
99169  */
99170 struct ALT_USB_DEV_DOEPDMAB7_s
99171 {
99172  const uint32_t doepdmab7 : 32; /* DMA Buffer Address */
99173 };
99174 
99175 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB7. */
99176 typedef volatile struct ALT_USB_DEV_DOEPDMAB7_s ALT_USB_DEV_DOEPDMAB7_t;
99177 #endif /* __ASSEMBLY__ */
99178 
99179 /* The byte offset of the ALT_USB_DEV_DOEPDMAB7 register from the beginning of the component. */
99180 #define ALT_USB_DEV_DOEPDMAB7_OFST 0x3fc
99181 /* The address of the ALT_USB_DEV_DOEPDMAB7 register. */
99182 #define ALT_USB_DEV_DOEPDMAB7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB7_OFST))
99183 
99184 /*
99185  * Register : Device Control OUT Endpoint 8 Control Register - doepctl8
99186  *
99187  * Out Endpoint 8.
99188  *
99189  * Register Layout
99190  *
99191  * Bits | Access | Reset | Description
99192  * :--------|:-------|:------|:--------------------
99193  * [10:0] | RW | 0x0 | Maximum Packet Size
99194  * [14:11] | ??? | 0x0 | *UNDEFINED*
99195  * [15] | RW | 0x0 | USB Active Endpoint
99196  * [16] | R | 0x0 | Endpoint Data PID
99197  * [17] | R | 0x0 | NAK Status
99198  * [19:18] | RW | 0x0 | Endpoint Type
99199  * [20] | RW | 0x0 | Snoop Mode
99200  * [21] | R | 0x0 | STALL Handshake
99201  * [25:22] | ??? | 0x0 | *UNDEFINED*
99202  * [26] | W | 0x0 | Clear NAK
99203  * [27] | W | 0x0 | Set NAK
99204  * [28] | W | 0x0 | Set DATA0 PID
99205  * [29] | W | 0x0 | Set DATA1 PID
99206  * [30] | R | 0x0 | Endpoint Disable
99207  * [31] | R | 0x0 | Endpoint Enable
99208  *
99209  */
99210 /*
99211  * Field : Maximum Packet Size - mps
99212  *
99213  * Applies to IN and OUT endpoints. The application must program this field with
99214  * the maximum packet size for the current logical endpoint. This value is in
99215  * bytes.
99216  *
99217  * Field Access Macros:
99218  *
99219  */
99220 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_MPS register field. */
99221 #define ALT_USB_DEV_DOEPCTL8_MPS_LSB 0
99222 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_MPS register field. */
99223 #define ALT_USB_DEV_DOEPCTL8_MPS_MSB 10
99224 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_MPS register field. */
99225 #define ALT_USB_DEV_DOEPCTL8_MPS_WIDTH 11
99226 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_MPS register field value. */
99227 #define ALT_USB_DEV_DOEPCTL8_MPS_SET_MSK 0x000007ff
99228 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_MPS register field value. */
99229 #define ALT_USB_DEV_DOEPCTL8_MPS_CLR_MSK 0xfffff800
99230 /* The reset value of the ALT_USB_DEV_DOEPCTL8_MPS register field. */
99231 #define ALT_USB_DEV_DOEPCTL8_MPS_RESET 0x0
99232 /* Extracts the ALT_USB_DEV_DOEPCTL8_MPS field value from a register. */
99233 #define ALT_USB_DEV_DOEPCTL8_MPS_GET(value) (((value) & 0x000007ff) >> 0)
99234 /* Produces a ALT_USB_DEV_DOEPCTL8_MPS register field value suitable for setting the register. */
99235 #define ALT_USB_DEV_DOEPCTL8_MPS_SET(value) (((value) << 0) & 0x000007ff)
99236 
99237 /*
99238  * Field : USB Active Endpoint - usbactep
99239  *
99240  * Indicates whether this endpoint is active in the current configuration and
99241  * interface. The core clears this bit for all endpoints (other than EP 0) after
99242  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
99243  * commands, the application must program endpoint registers accordingly and set
99244  * this bit.
99245  *
99246  * Field Enumeration Values:
99247  *
99248  * Enum | Value | Description
99249  * :-------------------------------------|:------|:--------------------
99250  * ALT_USB_DEV_DOEPCTL8_USBACTEP_E_DISD | 0x0 | Not Active
99251  * ALT_USB_DEV_DOEPCTL8_USBACTEP_E_END | 0x1 | USB Active Endpoint
99252  *
99253  * Field Access Macros:
99254  *
99255  */
99256 /*
99257  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_USBACTEP
99258  *
99259  * Not Active
99260  */
99261 #define ALT_USB_DEV_DOEPCTL8_USBACTEP_E_DISD 0x0
99262 /*
99263  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_USBACTEP
99264  *
99265  * USB Active Endpoint
99266  */
99267 #define ALT_USB_DEV_DOEPCTL8_USBACTEP_E_END 0x1
99268 
99269 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_USBACTEP register field. */
99270 #define ALT_USB_DEV_DOEPCTL8_USBACTEP_LSB 15
99271 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_USBACTEP register field. */
99272 #define ALT_USB_DEV_DOEPCTL8_USBACTEP_MSB 15
99273 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_USBACTEP register field. */
99274 #define ALT_USB_DEV_DOEPCTL8_USBACTEP_WIDTH 1
99275 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_USBACTEP register field value. */
99276 #define ALT_USB_DEV_DOEPCTL8_USBACTEP_SET_MSK 0x00008000
99277 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_USBACTEP register field value. */
99278 #define ALT_USB_DEV_DOEPCTL8_USBACTEP_CLR_MSK 0xffff7fff
99279 /* The reset value of the ALT_USB_DEV_DOEPCTL8_USBACTEP register field. */
99280 #define ALT_USB_DEV_DOEPCTL8_USBACTEP_RESET 0x0
99281 /* Extracts the ALT_USB_DEV_DOEPCTL8_USBACTEP field value from a register. */
99282 #define ALT_USB_DEV_DOEPCTL8_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
99283 /* Produces a ALT_USB_DEV_DOEPCTL8_USBACTEP register field value suitable for setting the register. */
99284 #define ALT_USB_DEV_DOEPCTL8_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
99285 
99286 /*
99287  * Field : Endpoint Data PID - dpid
99288  *
99289  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
99290  * packet to be received or transmitted on this endpoint. The application must
99291  * program the PID of the first packet to be received or transmitted on this
99292  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
99293  * SetD0PID fields of this register to program either DATA0 or DATA1 PID.
99294  *
99295  * 0: DATA0
99296  *
99297  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
99298  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
99299  * DMA mode:
99300  *
99301  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
99302  * number in which the core transmits/receives isochronous data for this endpoint.
99303  * The application must program the even/odd (micro) frame number in which it
99304  * intends to transmit/receive isochronous data for this endpoint using the
99305  * SetEvnFr and SetOddFr fields in this register.
99306  *
99307  * 0: Even (micro)frame
99308  *
99309  * 1: Odd (micro)frame
99310  *
99311  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
99312  * number in which to send data is provided in the transmit descriptor structure.
99313  * The frame in which data is received is updated in receive descriptor structure.
99314  *
99315  * Field Enumeration Values:
99316  *
99317  * Enum | Value | Description
99318  * :----------------------------------|:------|:-----------------------------
99319  * ALT_USB_DEV_DOEPCTL8_DPID_E_INACT | 0x0 | Endpoint Data PID not active
99320  * ALT_USB_DEV_DOEPCTL8_DPID_E_ACT | 0x1 | Endpoint Data PID active
99321  *
99322  * Field Access Macros:
99323  *
99324  */
99325 /*
99326  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_DPID
99327  *
99328  * Endpoint Data PID not active
99329  */
99330 #define ALT_USB_DEV_DOEPCTL8_DPID_E_INACT 0x0
99331 /*
99332  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_DPID
99333  *
99334  * Endpoint Data PID active
99335  */
99336 #define ALT_USB_DEV_DOEPCTL8_DPID_E_ACT 0x1
99337 
99338 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_DPID register field. */
99339 #define ALT_USB_DEV_DOEPCTL8_DPID_LSB 16
99340 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_DPID register field. */
99341 #define ALT_USB_DEV_DOEPCTL8_DPID_MSB 16
99342 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_DPID register field. */
99343 #define ALT_USB_DEV_DOEPCTL8_DPID_WIDTH 1
99344 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_DPID register field value. */
99345 #define ALT_USB_DEV_DOEPCTL8_DPID_SET_MSK 0x00010000
99346 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_DPID register field value. */
99347 #define ALT_USB_DEV_DOEPCTL8_DPID_CLR_MSK 0xfffeffff
99348 /* The reset value of the ALT_USB_DEV_DOEPCTL8_DPID register field. */
99349 #define ALT_USB_DEV_DOEPCTL8_DPID_RESET 0x0
99350 /* Extracts the ALT_USB_DEV_DOEPCTL8_DPID field value from a register. */
99351 #define ALT_USB_DEV_DOEPCTL8_DPID_GET(value) (((value) & 0x00010000) >> 16)
99352 /* Produces a ALT_USB_DEV_DOEPCTL8_DPID register field value suitable for setting the register. */
99353 #define ALT_USB_DEV_DOEPCTL8_DPID_SET(value) (((value) << 16) & 0x00010000)
99354 
99355 /*
99356  * Field : NAK Status - naksts
99357  *
99358  * When either the application or the core sets this bit:
99359  *
99360  * * The core stops receiving any data on an OUT endpoint, even if there is space
99361  * in the RxFIFO to accommodate the incoming packet.
99362  *
99363  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
99364  * IN endpoint, even if there data is available in the TxFIFO.
99365  *
99366  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
99367  * even if there data is available in the TxFIFO.
99368  *
99369  * Irrespective of this bit's setting, the core always responds to SETUP data
99370  * packets with an ACK handshake.
99371  *
99372  * Field Enumeration Values:
99373  *
99374  * Enum | Value | Description
99375  * :-------------------------------------|:------|:------------------------------------------------
99376  * ALT_USB_DEV_DOEPCTL8_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
99377  * : | | based on the FIFO status
99378  * ALT_USB_DEV_DOEPCTL8_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
99379  * : | | endpoint
99380  *
99381  * Field Access Macros:
99382  *
99383  */
99384 /*
99385  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_NAKSTS
99386  *
99387  * The core is transmitting non-NAK handshakes based on the FIFO status
99388  */
99389 #define ALT_USB_DEV_DOEPCTL8_NAKSTS_E_NONNAK 0x0
99390 /*
99391  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_NAKSTS
99392  *
99393  * The core is transmitting NAK handshakes on this endpoint
99394  */
99395 #define ALT_USB_DEV_DOEPCTL8_NAKSTS_E_NAK 0x1
99396 
99397 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_NAKSTS register field. */
99398 #define ALT_USB_DEV_DOEPCTL8_NAKSTS_LSB 17
99399 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_NAKSTS register field. */
99400 #define ALT_USB_DEV_DOEPCTL8_NAKSTS_MSB 17
99401 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_NAKSTS register field. */
99402 #define ALT_USB_DEV_DOEPCTL8_NAKSTS_WIDTH 1
99403 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_NAKSTS register field value. */
99404 #define ALT_USB_DEV_DOEPCTL8_NAKSTS_SET_MSK 0x00020000
99405 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_NAKSTS register field value. */
99406 #define ALT_USB_DEV_DOEPCTL8_NAKSTS_CLR_MSK 0xfffdffff
99407 /* The reset value of the ALT_USB_DEV_DOEPCTL8_NAKSTS register field. */
99408 #define ALT_USB_DEV_DOEPCTL8_NAKSTS_RESET 0x0
99409 /* Extracts the ALT_USB_DEV_DOEPCTL8_NAKSTS field value from a register. */
99410 #define ALT_USB_DEV_DOEPCTL8_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
99411 /* Produces a ALT_USB_DEV_DOEPCTL8_NAKSTS register field value suitable for setting the register. */
99412 #define ALT_USB_DEV_DOEPCTL8_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
99413 
99414 /*
99415  * Field : Endpoint Type - eptype
99416  *
99417  * This is the transfer type supported by this logical endpoint.
99418  *
99419  * Field Enumeration Values:
99420  *
99421  * Enum | Value | Description
99422  * :------------------------------------------|:------|:------------
99423  * ALT_USB_DEV_DOEPCTL8_EPTYPE_E_CTL | 0x0 | Control
99424  * ALT_USB_DEV_DOEPCTL8_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
99425  * ALT_USB_DEV_DOEPCTL8_EPTYPE_E_BULK | 0x2 | Bulk
99426  * ALT_USB_DEV_DOEPCTL8_EPTYPE_E_INTERRUP | 0x3 | Interrupt
99427  *
99428  * Field Access Macros:
99429  *
99430  */
99431 /*
99432  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_EPTYPE
99433  *
99434  * Control
99435  */
99436 #define ALT_USB_DEV_DOEPCTL8_EPTYPE_E_CTL 0x0
99437 /*
99438  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_EPTYPE
99439  *
99440  * Isochronous
99441  */
99442 #define ALT_USB_DEV_DOEPCTL8_EPTYPE_E_ISOCHRONOUS 0x1
99443 /*
99444  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_EPTYPE
99445  *
99446  * Bulk
99447  */
99448 #define ALT_USB_DEV_DOEPCTL8_EPTYPE_E_BULK 0x2
99449 /*
99450  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_EPTYPE
99451  *
99452  * Interrupt
99453  */
99454 #define ALT_USB_DEV_DOEPCTL8_EPTYPE_E_INTERRUP 0x3
99455 
99456 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_EPTYPE register field. */
99457 #define ALT_USB_DEV_DOEPCTL8_EPTYPE_LSB 18
99458 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_EPTYPE register field. */
99459 #define ALT_USB_DEV_DOEPCTL8_EPTYPE_MSB 19
99460 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_EPTYPE register field. */
99461 #define ALT_USB_DEV_DOEPCTL8_EPTYPE_WIDTH 2
99462 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_EPTYPE register field value. */
99463 #define ALT_USB_DEV_DOEPCTL8_EPTYPE_SET_MSK 0x000c0000
99464 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_EPTYPE register field value. */
99465 #define ALT_USB_DEV_DOEPCTL8_EPTYPE_CLR_MSK 0xfff3ffff
99466 /* The reset value of the ALT_USB_DEV_DOEPCTL8_EPTYPE register field. */
99467 #define ALT_USB_DEV_DOEPCTL8_EPTYPE_RESET 0x0
99468 /* Extracts the ALT_USB_DEV_DOEPCTL8_EPTYPE field value from a register. */
99469 #define ALT_USB_DEV_DOEPCTL8_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
99470 /* Produces a ALT_USB_DEV_DOEPCTL8_EPTYPE register field value suitable for setting the register. */
99471 #define ALT_USB_DEV_DOEPCTL8_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
99472 
99473 /*
99474  * Field : Snoop Mode - snp
99475  *
99476  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
99477  * In Snoop mode, the core does not check the correctness of OUT packets before
99478  * transferring them to application memory.
99479  *
99480  * Field Enumeration Values:
99481  *
99482  * Enum | Value | Description
99483  * :-------------------------------|:------|:-------------------
99484  * ALT_USB_DEV_DOEPCTL8_SNP_E_DIS | 0x0 | Disable Snoop Mode
99485  * ALT_USB_DEV_DOEPCTL8_SNP_E_EN | 0x1 | Enable Snoop Mode
99486  *
99487  * Field Access Macros:
99488  *
99489  */
99490 /*
99491  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_SNP
99492  *
99493  * Disable Snoop Mode
99494  */
99495 #define ALT_USB_DEV_DOEPCTL8_SNP_E_DIS 0x0
99496 /*
99497  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_SNP
99498  *
99499  * Enable Snoop Mode
99500  */
99501 #define ALT_USB_DEV_DOEPCTL8_SNP_E_EN 0x1
99502 
99503 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_SNP register field. */
99504 #define ALT_USB_DEV_DOEPCTL8_SNP_LSB 20
99505 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_SNP register field. */
99506 #define ALT_USB_DEV_DOEPCTL8_SNP_MSB 20
99507 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_SNP register field. */
99508 #define ALT_USB_DEV_DOEPCTL8_SNP_WIDTH 1
99509 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_SNP register field value. */
99510 #define ALT_USB_DEV_DOEPCTL8_SNP_SET_MSK 0x00100000
99511 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_SNP register field value. */
99512 #define ALT_USB_DEV_DOEPCTL8_SNP_CLR_MSK 0xffefffff
99513 /* The reset value of the ALT_USB_DEV_DOEPCTL8_SNP register field. */
99514 #define ALT_USB_DEV_DOEPCTL8_SNP_RESET 0x0
99515 /* Extracts the ALT_USB_DEV_DOEPCTL8_SNP field value from a register. */
99516 #define ALT_USB_DEV_DOEPCTL8_SNP_GET(value) (((value) & 0x00100000) >> 20)
99517 /* Produces a ALT_USB_DEV_DOEPCTL8_SNP register field value suitable for setting the register. */
99518 #define ALT_USB_DEV_DOEPCTL8_SNP_SET(value) (((value) << 20) & 0x00100000)
99519 
99520 /*
99521  * Field : STALL Handshake - stall
99522  *
99523  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
99524  * application sets this bit to stall all tokens from the USB host to this
99525  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
99526  * along with this bit, the STALL bit takes priority. Only the application can
99527  * clear this bit, never the core. Applies to control endpoints only. The
99528  * application can only set this bit, and the core clears it, when a SETUP token is
99529  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
99530  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
99531  * of this bit's setting, the core always responds to SETUP data packets with an
99532  * ACK handshake.
99533  *
99534  * Field Enumeration Values:
99535  *
99536  * Enum | Value | Description
99537  * :-----------------------------------|:------|:----------------------------
99538  * ALT_USB_DEV_DOEPCTL8_STALL_E_INACT | 0x0 | STALL All Tokens not active
99539  * ALT_USB_DEV_DOEPCTL8_STALL_E_ACT | 0x1 | STALL All Tokens active
99540  *
99541  * Field Access Macros:
99542  *
99543  */
99544 /*
99545  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_STALL
99546  *
99547  * STALL All Tokens not active
99548  */
99549 #define ALT_USB_DEV_DOEPCTL8_STALL_E_INACT 0x0
99550 /*
99551  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_STALL
99552  *
99553  * STALL All Tokens active
99554  */
99555 #define ALT_USB_DEV_DOEPCTL8_STALL_E_ACT 0x1
99556 
99557 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_STALL register field. */
99558 #define ALT_USB_DEV_DOEPCTL8_STALL_LSB 21
99559 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_STALL register field. */
99560 #define ALT_USB_DEV_DOEPCTL8_STALL_MSB 21
99561 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_STALL register field. */
99562 #define ALT_USB_DEV_DOEPCTL8_STALL_WIDTH 1
99563 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_STALL register field value. */
99564 #define ALT_USB_DEV_DOEPCTL8_STALL_SET_MSK 0x00200000
99565 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_STALL register field value. */
99566 #define ALT_USB_DEV_DOEPCTL8_STALL_CLR_MSK 0xffdfffff
99567 /* The reset value of the ALT_USB_DEV_DOEPCTL8_STALL register field. */
99568 #define ALT_USB_DEV_DOEPCTL8_STALL_RESET 0x0
99569 /* Extracts the ALT_USB_DEV_DOEPCTL8_STALL field value from a register. */
99570 #define ALT_USB_DEV_DOEPCTL8_STALL_GET(value) (((value) & 0x00200000) >> 21)
99571 /* Produces a ALT_USB_DEV_DOEPCTL8_STALL register field value suitable for setting the register. */
99572 #define ALT_USB_DEV_DOEPCTL8_STALL_SET(value) (((value) << 21) & 0x00200000)
99573 
99574 /*
99575  * Field : Clear NAK - cnak
99576  *
99577  * A write to this bit clears the NAK bit for the endpoint.
99578  *
99579  * Field Enumeration Values:
99580  *
99581  * Enum | Value | Description
99582  * :----------------------------------|:------|:-------------
99583  * ALT_USB_DEV_DOEPCTL8_CNAK_E_INACT | 0x0 | No Clear NAK
99584  * ALT_USB_DEV_DOEPCTL8_CNAK_E_ACT | 0x1 | Clear NAK
99585  *
99586  * Field Access Macros:
99587  *
99588  */
99589 /*
99590  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_CNAK
99591  *
99592  * No Clear NAK
99593  */
99594 #define ALT_USB_DEV_DOEPCTL8_CNAK_E_INACT 0x0
99595 /*
99596  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_CNAK
99597  *
99598  * Clear NAK
99599  */
99600 #define ALT_USB_DEV_DOEPCTL8_CNAK_E_ACT 0x1
99601 
99602 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_CNAK register field. */
99603 #define ALT_USB_DEV_DOEPCTL8_CNAK_LSB 26
99604 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_CNAK register field. */
99605 #define ALT_USB_DEV_DOEPCTL8_CNAK_MSB 26
99606 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_CNAK register field. */
99607 #define ALT_USB_DEV_DOEPCTL8_CNAK_WIDTH 1
99608 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_CNAK register field value. */
99609 #define ALT_USB_DEV_DOEPCTL8_CNAK_SET_MSK 0x04000000
99610 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_CNAK register field value. */
99611 #define ALT_USB_DEV_DOEPCTL8_CNAK_CLR_MSK 0xfbffffff
99612 /* The reset value of the ALT_USB_DEV_DOEPCTL8_CNAK register field. */
99613 #define ALT_USB_DEV_DOEPCTL8_CNAK_RESET 0x0
99614 /* Extracts the ALT_USB_DEV_DOEPCTL8_CNAK field value from a register. */
99615 #define ALT_USB_DEV_DOEPCTL8_CNAK_GET(value) (((value) & 0x04000000) >> 26)
99616 /* Produces a ALT_USB_DEV_DOEPCTL8_CNAK register field value suitable for setting the register. */
99617 #define ALT_USB_DEV_DOEPCTL8_CNAK_SET(value) (((value) << 26) & 0x04000000)
99618 
99619 /*
99620  * Field : Set NAK - snak
99621  *
99622  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
99623  * application can control the transmission of NAK handshakes on an endpoint. The
99624  * core can also Set this bit for an endpoint after a SETUP packet is received on
99625  * that endpoint.
99626  *
99627  * Field Enumeration Values:
99628  *
99629  * Enum | Value | Description
99630  * :----------------------------------|:------|:------------
99631  * ALT_USB_DEV_DOEPCTL8_SNAK_E_INACT | 0x0 | No Set NAK
99632  * ALT_USB_DEV_DOEPCTL8_SNAK_E_ACT | 0x1 | Set NAK
99633  *
99634  * Field Access Macros:
99635  *
99636  */
99637 /*
99638  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_SNAK
99639  *
99640  * No Set NAK
99641  */
99642 #define ALT_USB_DEV_DOEPCTL8_SNAK_E_INACT 0x0
99643 /*
99644  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_SNAK
99645  *
99646  * Set NAK
99647  */
99648 #define ALT_USB_DEV_DOEPCTL8_SNAK_E_ACT 0x1
99649 
99650 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_SNAK register field. */
99651 #define ALT_USB_DEV_DOEPCTL8_SNAK_LSB 27
99652 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_SNAK register field. */
99653 #define ALT_USB_DEV_DOEPCTL8_SNAK_MSB 27
99654 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_SNAK register field. */
99655 #define ALT_USB_DEV_DOEPCTL8_SNAK_WIDTH 1
99656 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_SNAK register field value. */
99657 #define ALT_USB_DEV_DOEPCTL8_SNAK_SET_MSK 0x08000000
99658 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_SNAK register field value. */
99659 #define ALT_USB_DEV_DOEPCTL8_SNAK_CLR_MSK 0xf7ffffff
99660 /* The reset value of the ALT_USB_DEV_DOEPCTL8_SNAK register field. */
99661 #define ALT_USB_DEV_DOEPCTL8_SNAK_RESET 0x0
99662 /* Extracts the ALT_USB_DEV_DOEPCTL8_SNAK field value from a register. */
99663 #define ALT_USB_DEV_DOEPCTL8_SNAK_GET(value) (((value) & 0x08000000) >> 27)
99664 /* Produces a ALT_USB_DEV_DOEPCTL8_SNAK register field value suitable for setting the register. */
99665 #define ALT_USB_DEV_DOEPCTL8_SNAK_SET(value) (((value) << 27) & 0x08000000)
99666 
99667 /*
99668  * Field : Set DATA0 PID - setd0pid
99669  *
99670  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
99671  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
99672  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
99673  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
99674  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
99675  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
99676  * mode is enabled, this field is reserved. The frame number in which to send data
99677  * is in the transmit descriptor structure. The frame in which to receive data is
99678  * updated in receive descriptor structure.
99679  *
99680  * Field Enumeration Values:
99681  *
99682  * Enum | Value | Description
99683  * :-------------------------------------|:------|:------------------------------------
99684  * ALT_USB_DEV_DOEPCTL8_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
99685  * ALT_USB_DEV_DOEPCTL8_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
99686  *
99687  * Field Access Macros:
99688  *
99689  */
99690 /*
99691  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_SETD0PID
99692  *
99693  * Disables Set DATA0 PID
99694  */
99695 #define ALT_USB_DEV_DOEPCTL8_SETD0PID_E_DISD 0x0
99696 /*
99697  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_SETD0PID
99698  *
99699  * Enables Endpoint Data PID to DATA0)
99700  */
99701 #define ALT_USB_DEV_DOEPCTL8_SETD0PID_E_END 0x1
99702 
99703 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_SETD0PID register field. */
99704 #define ALT_USB_DEV_DOEPCTL8_SETD0PID_LSB 28
99705 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_SETD0PID register field. */
99706 #define ALT_USB_DEV_DOEPCTL8_SETD0PID_MSB 28
99707 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_SETD0PID register field. */
99708 #define ALT_USB_DEV_DOEPCTL8_SETD0PID_WIDTH 1
99709 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_SETD0PID register field value. */
99710 #define ALT_USB_DEV_DOEPCTL8_SETD0PID_SET_MSK 0x10000000
99711 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_SETD0PID register field value. */
99712 #define ALT_USB_DEV_DOEPCTL8_SETD0PID_CLR_MSK 0xefffffff
99713 /* The reset value of the ALT_USB_DEV_DOEPCTL8_SETD0PID register field. */
99714 #define ALT_USB_DEV_DOEPCTL8_SETD0PID_RESET 0x0
99715 /* Extracts the ALT_USB_DEV_DOEPCTL8_SETD0PID field value from a register. */
99716 #define ALT_USB_DEV_DOEPCTL8_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
99717 /* Produces a ALT_USB_DEV_DOEPCTL8_SETD0PID register field value suitable for setting the register. */
99718 #define ALT_USB_DEV_DOEPCTL8_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
99719 
99720 /*
99721  * Field : Set DATA1 PID - setd1pid
99722  *
99723  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
99724  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
99725  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
99726  *
99727  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
99728  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
99729  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
99730  *
99731  * Field Enumeration Values:
99732  *
99733  * Enum | Value | Description
99734  * :-------------------------------------|:------|:-----------------------
99735  * ALT_USB_DEV_DOEPCTL8_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
99736  * ALT_USB_DEV_DOEPCTL8_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
99737  *
99738  * Field Access Macros:
99739  *
99740  */
99741 /*
99742  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_SETD1PID
99743  *
99744  * Disables Set DATA1 PID
99745  */
99746 #define ALT_USB_DEV_DOEPCTL8_SETD1PID_E_DISD 0x0
99747 /*
99748  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_SETD1PID
99749  *
99750  * Enables Set DATA1 PID
99751  */
99752 #define ALT_USB_DEV_DOEPCTL8_SETD1PID_E_END 0x1
99753 
99754 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_SETD1PID register field. */
99755 #define ALT_USB_DEV_DOEPCTL8_SETD1PID_LSB 29
99756 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_SETD1PID register field. */
99757 #define ALT_USB_DEV_DOEPCTL8_SETD1PID_MSB 29
99758 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_SETD1PID register field. */
99759 #define ALT_USB_DEV_DOEPCTL8_SETD1PID_WIDTH 1
99760 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_SETD1PID register field value. */
99761 #define ALT_USB_DEV_DOEPCTL8_SETD1PID_SET_MSK 0x20000000
99762 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_SETD1PID register field value. */
99763 #define ALT_USB_DEV_DOEPCTL8_SETD1PID_CLR_MSK 0xdfffffff
99764 /* The reset value of the ALT_USB_DEV_DOEPCTL8_SETD1PID register field. */
99765 #define ALT_USB_DEV_DOEPCTL8_SETD1PID_RESET 0x0
99766 /* Extracts the ALT_USB_DEV_DOEPCTL8_SETD1PID field value from a register. */
99767 #define ALT_USB_DEV_DOEPCTL8_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
99768 /* Produces a ALT_USB_DEV_DOEPCTL8_SETD1PID register field value suitable for setting the register. */
99769 #define ALT_USB_DEV_DOEPCTL8_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
99770 
99771 /*
99772  * Field : Endpoint Disable - epdis
99773  *
99774  * Applies to IN and OUT endpoints. The application sets this bit to stop
99775  * transmitting/receiving data on an endpoint, even before the transfer for that
99776  * endpoint is complete. The application must wait for the Endpoint Disabled
99777  * interrupt before treating the endpoint as disabled. The core clears this bit
99778  * before setting the Endpoint Disabled interrupt. The application must set this
99779  * bit only if Endpoint Enable is already set for this endpoint.
99780  *
99781  * Field Enumeration Values:
99782  *
99783  * Enum | Value | Description
99784  * :-----------------------------------|:------|:--------------------
99785  * ALT_USB_DEV_DOEPCTL8_EPDIS_E_INACT | 0x0 | No Endpoint Disable
99786  * ALT_USB_DEV_DOEPCTL8_EPDIS_E_ACT | 0x1 | Endpoint Disable
99787  *
99788  * Field Access Macros:
99789  *
99790  */
99791 /*
99792  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_EPDIS
99793  *
99794  * No Endpoint Disable
99795  */
99796 #define ALT_USB_DEV_DOEPCTL8_EPDIS_E_INACT 0x0
99797 /*
99798  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_EPDIS
99799  *
99800  * Endpoint Disable
99801  */
99802 #define ALT_USB_DEV_DOEPCTL8_EPDIS_E_ACT 0x1
99803 
99804 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_EPDIS register field. */
99805 #define ALT_USB_DEV_DOEPCTL8_EPDIS_LSB 30
99806 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_EPDIS register field. */
99807 #define ALT_USB_DEV_DOEPCTL8_EPDIS_MSB 30
99808 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_EPDIS register field. */
99809 #define ALT_USB_DEV_DOEPCTL8_EPDIS_WIDTH 1
99810 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_EPDIS register field value. */
99811 #define ALT_USB_DEV_DOEPCTL8_EPDIS_SET_MSK 0x40000000
99812 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_EPDIS register field value. */
99813 #define ALT_USB_DEV_DOEPCTL8_EPDIS_CLR_MSK 0xbfffffff
99814 /* The reset value of the ALT_USB_DEV_DOEPCTL8_EPDIS register field. */
99815 #define ALT_USB_DEV_DOEPCTL8_EPDIS_RESET 0x0
99816 /* Extracts the ALT_USB_DEV_DOEPCTL8_EPDIS field value from a register. */
99817 #define ALT_USB_DEV_DOEPCTL8_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
99818 /* Produces a ALT_USB_DEV_DOEPCTL8_EPDIS register field value suitable for setting the register. */
99819 #define ALT_USB_DEV_DOEPCTL8_EPDIS_SET(value) (((value) << 30) & 0x40000000)
99820 
99821 /*
99822  * Field : Endpoint Enable - epena
99823  *
99824  * Applies to IN and OUT endpoints.
99825  *
99826  * * When Scatter/Gather DMA mode is enabled,
99827  *
99828  * * for IN endpoints this bit indicates that the descriptor structure and data
99829  * buffer with data ready to transmit is setup.
99830  *
99831  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
99832  * receive data is setup.
99833  *
99834  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
99835  * mode:
99836  *
99837  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
99838  * the endpoint.
99839  *
99840  * * for OUT endpoints, this bit indicates that the application has allocated the
99841  * memory to start receiving data from the USB.
99842  *
99843  * * The core clears this bit before setting any of the following interrupts on
99844  * this endpoint:
99845  *
99846  * * SETUP Phase Done
99847  *
99848  * * Endpoint Disabled
99849  *
99850  * * Transfer Completed
99851  *
99852  * for control endpoints in DMA mode, this bit must be set to be able to transfer
99853  * SETUP data packets in memory.
99854  *
99855  * Field Enumeration Values:
99856  *
99857  * Enum | Value | Description
99858  * :-----------------------------------|:------|:-------------------------
99859  * ALT_USB_DEV_DOEPCTL8_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
99860  * ALT_USB_DEV_DOEPCTL8_EPENA_E_ACT | 0x1 | Endpoint Enable active
99861  *
99862  * Field Access Macros:
99863  *
99864  */
99865 /*
99866  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_EPENA
99867  *
99868  * Endpoint Enable inactive
99869  */
99870 #define ALT_USB_DEV_DOEPCTL8_EPENA_E_INACT 0x0
99871 /*
99872  * Enumerated value for register field ALT_USB_DEV_DOEPCTL8_EPENA
99873  *
99874  * Endpoint Enable active
99875  */
99876 #define ALT_USB_DEV_DOEPCTL8_EPENA_E_ACT 0x1
99877 
99878 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL8_EPENA register field. */
99879 #define ALT_USB_DEV_DOEPCTL8_EPENA_LSB 31
99880 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL8_EPENA register field. */
99881 #define ALT_USB_DEV_DOEPCTL8_EPENA_MSB 31
99882 /* The width in bits of the ALT_USB_DEV_DOEPCTL8_EPENA register field. */
99883 #define ALT_USB_DEV_DOEPCTL8_EPENA_WIDTH 1
99884 /* The mask used to set the ALT_USB_DEV_DOEPCTL8_EPENA register field value. */
99885 #define ALT_USB_DEV_DOEPCTL8_EPENA_SET_MSK 0x80000000
99886 /* The mask used to clear the ALT_USB_DEV_DOEPCTL8_EPENA register field value. */
99887 #define ALT_USB_DEV_DOEPCTL8_EPENA_CLR_MSK 0x7fffffff
99888 /* The reset value of the ALT_USB_DEV_DOEPCTL8_EPENA register field. */
99889 #define ALT_USB_DEV_DOEPCTL8_EPENA_RESET 0x0
99890 /* Extracts the ALT_USB_DEV_DOEPCTL8_EPENA field value from a register. */
99891 #define ALT_USB_DEV_DOEPCTL8_EPENA_GET(value) (((value) & 0x80000000) >> 31)
99892 /* Produces a ALT_USB_DEV_DOEPCTL8_EPENA register field value suitable for setting the register. */
99893 #define ALT_USB_DEV_DOEPCTL8_EPENA_SET(value) (((value) << 31) & 0x80000000)
99894 
99895 #ifndef __ASSEMBLY__
99896 /*
99897  * WARNING: The C register and register group struct declarations are provided for
99898  * convenience and illustrative purposes. They should, however, be used with
99899  * caution as the C language standard provides no guarantees about the alignment or
99900  * atomicity of device memory accesses. The recommended practice for writing
99901  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
99902  * alt_write_word() functions.
99903  *
99904  * The struct declaration for register ALT_USB_DEV_DOEPCTL8.
99905  */
99906 struct ALT_USB_DEV_DOEPCTL8_s
99907 {
99908  uint32_t mps : 11; /* Maximum Packet Size */
99909  uint32_t : 4; /* *UNDEFINED* */
99910  uint32_t usbactep : 1; /* USB Active Endpoint */
99911  const uint32_t dpid : 1; /* Endpoint Data PID */
99912  const uint32_t naksts : 1; /* NAK Status */
99913  uint32_t eptype : 2; /* Endpoint Type */
99914  uint32_t snp : 1; /* Snoop Mode */
99915  const uint32_t stall : 1; /* STALL Handshake */
99916  uint32_t : 4; /* *UNDEFINED* */
99917  uint32_t cnak : 1; /* Clear NAK */
99918  uint32_t snak : 1; /* Set NAK */
99919  uint32_t setd0pid : 1; /* Set DATA0 PID */
99920  uint32_t setd1pid : 1; /* Set DATA1 PID */
99921  const uint32_t epdis : 1; /* Endpoint Disable */
99922  const uint32_t epena : 1; /* Endpoint Enable */
99923 };
99924 
99925 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL8. */
99926 typedef volatile struct ALT_USB_DEV_DOEPCTL8_s ALT_USB_DEV_DOEPCTL8_t;
99927 #endif /* __ASSEMBLY__ */
99928 
99929 /* The byte offset of the ALT_USB_DEV_DOEPCTL8 register from the beginning of the component. */
99930 #define ALT_USB_DEV_DOEPCTL8_OFST 0x400
99931 /* The address of the ALT_USB_DEV_DOEPCTL8 register. */
99932 #define ALT_USB_DEV_DOEPCTL8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL8_OFST))
99933 
99934 /*
99935  * Register : Device OUT Endpoint 8 Interrupt Register - doepint8
99936  *
99937  * This register indicates the status of an endpoint with respect to USB- and AHB-
99938  * related events. The application must read this register when the OUT Endpoints
99939  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
99940  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
99941  * can read this register, it must first read the Device All Endpoints Interrupt
99942  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
99943  * Interrupt register. The application must clear the appropriate bit in this
99944  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
99945  *
99946  * Register Layout
99947  *
99948  * Bits | Access | Reset | Description
99949  * :--------|:-------|:------|:------------------------------------------
99950  * [0] | R | 0x0 | Transfer Completed Interrupt
99951  * [1] | R | 0x0 | Endpoint Disabled Interrupt
99952  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT8_AHBERR
99953  * [3] | R | 0x0 | SETUP Phase Done
99954  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
99955  * [5] | R | 0x0 | Status Phase Received for Control Write
99956  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
99957  * [7] | ??? | 0x0 | *UNDEFINED*
99958  * [8] | R | 0x0 | OUT Packet Error
99959  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
99960  * [10] | ??? | 0x0 | *UNDEFINED*
99961  * [11] | R | 0x0 | Packet Drop Status
99962  * [12] | R | 0x0 | BbleErr Interrupt
99963  * [13] | R | 0x0 | NAK Interrupt
99964  * [14] | R | 0x0 | NYET Interrupt
99965  * [31:15] | ??? | 0x0 | *UNDEFINED*
99966  *
99967  */
99968 /*
99969  * Field : Transfer Completed Interrupt - xfercompl
99970  *
99971  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
99972  *
99973  * This field indicates that the requested data from the internal FIFO is moved to
99974  * external system memory. This interrupt is generated only when the corresponding
99975  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
99976  * is Set.
99977  *
99978  * When Scatter/Gather DMA mode is disabled, this field indicates that the
99979  * programmed transfer is complete on the AHB as well as on the USB, for this
99980  * endpoint.
99981  *
99982  * Field Enumeration Values:
99983  *
99984  * Enum | Value | Description
99985  * :---------------------------------------|:------|:-----------------------------
99986  * ALT_USB_DEV_DOEPINT8_XFERCOMPL_E_INACT | 0x0 | No Interrupt
99987  * ALT_USB_DEV_DOEPINT8_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
99988  *
99989  * Field Access Macros:
99990  *
99991  */
99992 /*
99993  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_XFERCOMPL
99994  *
99995  * No Interrupt
99996  */
99997 #define ALT_USB_DEV_DOEPINT8_XFERCOMPL_E_INACT 0x0
99998 /*
99999  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_XFERCOMPL
100000  *
100001  * Transfer Completed Interrupt
100002  */
100003 #define ALT_USB_DEV_DOEPINT8_XFERCOMPL_E_ACT 0x1
100004 
100005 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_XFERCOMPL register field. */
100006 #define ALT_USB_DEV_DOEPINT8_XFERCOMPL_LSB 0
100007 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_XFERCOMPL register field. */
100008 #define ALT_USB_DEV_DOEPINT8_XFERCOMPL_MSB 0
100009 /* The width in bits of the ALT_USB_DEV_DOEPINT8_XFERCOMPL register field. */
100010 #define ALT_USB_DEV_DOEPINT8_XFERCOMPL_WIDTH 1
100011 /* The mask used to set the ALT_USB_DEV_DOEPINT8_XFERCOMPL register field value. */
100012 #define ALT_USB_DEV_DOEPINT8_XFERCOMPL_SET_MSK 0x00000001
100013 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_XFERCOMPL register field value. */
100014 #define ALT_USB_DEV_DOEPINT8_XFERCOMPL_CLR_MSK 0xfffffffe
100015 /* The reset value of the ALT_USB_DEV_DOEPINT8_XFERCOMPL register field. */
100016 #define ALT_USB_DEV_DOEPINT8_XFERCOMPL_RESET 0x0
100017 /* Extracts the ALT_USB_DEV_DOEPINT8_XFERCOMPL field value from a register. */
100018 #define ALT_USB_DEV_DOEPINT8_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
100019 /* Produces a ALT_USB_DEV_DOEPINT8_XFERCOMPL register field value suitable for setting the register. */
100020 #define ALT_USB_DEV_DOEPINT8_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
100021 
100022 /*
100023  * Field : Endpoint Disabled Interrupt - epdisbld
100024  *
100025  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
100026  * disabled per the application's request.
100027  *
100028  * Field Enumeration Values:
100029  *
100030  * Enum | Value | Description
100031  * :--------------------------------------|:------|:----------------------------
100032  * ALT_USB_DEV_DOEPINT8_EPDISBLD_E_INACT | 0x0 | No Interrupt
100033  * ALT_USB_DEV_DOEPINT8_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
100034  *
100035  * Field Access Macros:
100036  *
100037  */
100038 /*
100039  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_EPDISBLD
100040  *
100041  * No Interrupt
100042  */
100043 #define ALT_USB_DEV_DOEPINT8_EPDISBLD_E_INACT 0x0
100044 /*
100045  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_EPDISBLD
100046  *
100047  * Endpoint Disabled Interrupt
100048  */
100049 #define ALT_USB_DEV_DOEPINT8_EPDISBLD_E_ACT 0x1
100050 
100051 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_EPDISBLD register field. */
100052 #define ALT_USB_DEV_DOEPINT8_EPDISBLD_LSB 1
100053 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_EPDISBLD register field. */
100054 #define ALT_USB_DEV_DOEPINT8_EPDISBLD_MSB 1
100055 /* The width in bits of the ALT_USB_DEV_DOEPINT8_EPDISBLD register field. */
100056 #define ALT_USB_DEV_DOEPINT8_EPDISBLD_WIDTH 1
100057 /* The mask used to set the ALT_USB_DEV_DOEPINT8_EPDISBLD register field value. */
100058 #define ALT_USB_DEV_DOEPINT8_EPDISBLD_SET_MSK 0x00000002
100059 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_EPDISBLD register field value. */
100060 #define ALT_USB_DEV_DOEPINT8_EPDISBLD_CLR_MSK 0xfffffffd
100061 /* The reset value of the ALT_USB_DEV_DOEPINT8_EPDISBLD register field. */
100062 #define ALT_USB_DEV_DOEPINT8_EPDISBLD_RESET 0x0
100063 /* Extracts the ALT_USB_DEV_DOEPINT8_EPDISBLD field value from a register. */
100064 #define ALT_USB_DEV_DOEPINT8_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
100065 /* Produces a ALT_USB_DEV_DOEPINT8_EPDISBLD register field value suitable for setting the register. */
100066 #define ALT_USB_DEV_DOEPINT8_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
100067 
100068 /*
100069  * Field : ahberr
100070  *
100071  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
100072  * there is an AHB error during an AHB read/write. The application can read the
100073  * corresponding endpoint DMA address register to get the error address.
100074  *
100075  * Field Enumeration Values:
100076  *
100077  * Enum | Value | Description
100078  * :------------------------------------|:------|:--------------------
100079  * ALT_USB_DEV_DOEPINT8_AHBERR_E_INACT | 0x0 | No Interrupt
100080  * ALT_USB_DEV_DOEPINT8_AHBERR_E_ACT | 0x1 | AHB Error interrupt
100081  *
100082  * Field Access Macros:
100083  *
100084  */
100085 /*
100086  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_AHBERR
100087  *
100088  * No Interrupt
100089  */
100090 #define ALT_USB_DEV_DOEPINT8_AHBERR_E_INACT 0x0
100091 /*
100092  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_AHBERR
100093  *
100094  * AHB Error interrupt
100095  */
100096 #define ALT_USB_DEV_DOEPINT8_AHBERR_E_ACT 0x1
100097 
100098 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_AHBERR register field. */
100099 #define ALT_USB_DEV_DOEPINT8_AHBERR_LSB 2
100100 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_AHBERR register field. */
100101 #define ALT_USB_DEV_DOEPINT8_AHBERR_MSB 2
100102 /* The width in bits of the ALT_USB_DEV_DOEPINT8_AHBERR register field. */
100103 #define ALT_USB_DEV_DOEPINT8_AHBERR_WIDTH 1
100104 /* The mask used to set the ALT_USB_DEV_DOEPINT8_AHBERR register field value. */
100105 #define ALT_USB_DEV_DOEPINT8_AHBERR_SET_MSK 0x00000004
100106 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_AHBERR register field value. */
100107 #define ALT_USB_DEV_DOEPINT8_AHBERR_CLR_MSK 0xfffffffb
100108 /* The reset value of the ALT_USB_DEV_DOEPINT8_AHBERR register field. */
100109 #define ALT_USB_DEV_DOEPINT8_AHBERR_RESET 0x0
100110 /* Extracts the ALT_USB_DEV_DOEPINT8_AHBERR field value from a register. */
100111 #define ALT_USB_DEV_DOEPINT8_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
100112 /* Produces a ALT_USB_DEV_DOEPINT8_AHBERR register field value suitable for setting the register. */
100113 #define ALT_USB_DEV_DOEPINT8_AHBERR_SET(value) (((value) << 2) & 0x00000004)
100114 
100115 /*
100116  * Field : SETUP Phase Done - setup
100117  *
100118  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
100119  * control endpoint is complete and no more back-to-back SETUP packets were
100120  * received for the current control transfer. On this interrupt, the application
100121  * can decode the received SETUP data packet.
100122  *
100123  * Field Enumeration Values:
100124  *
100125  * Enum | Value | Description
100126  * :-----------------------------------|:------|:--------------------
100127  * ALT_USB_DEV_DOEPINT8_SETUP_E_INACT | 0x0 | No SETUP Phase Done
100128  * ALT_USB_DEV_DOEPINT8_SETUP_E_ACT | 0x1 | SETUP Phase Done
100129  *
100130  * Field Access Macros:
100131  *
100132  */
100133 /*
100134  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_SETUP
100135  *
100136  * No SETUP Phase Done
100137  */
100138 #define ALT_USB_DEV_DOEPINT8_SETUP_E_INACT 0x0
100139 /*
100140  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_SETUP
100141  *
100142  * SETUP Phase Done
100143  */
100144 #define ALT_USB_DEV_DOEPINT8_SETUP_E_ACT 0x1
100145 
100146 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_SETUP register field. */
100147 #define ALT_USB_DEV_DOEPINT8_SETUP_LSB 3
100148 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_SETUP register field. */
100149 #define ALT_USB_DEV_DOEPINT8_SETUP_MSB 3
100150 /* The width in bits of the ALT_USB_DEV_DOEPINT8_SETUP register field. */
100151 #define ALT_USB_DEV_DOEPINT8_SETUP_WIDTH 1
100152 /* The mask used to set the ALT_USB_DEV_DOEPINT8_SETUP register field value. */
100153 #define ALT_USB_DEV_DOEPINT8_SETUP_SET_MSK 0x00000008
100154 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_SETUP register field value. */
100155 #define ALT_USB_DEV_DOEPINT8_SETUP_CLR_MSK 0xfffffff7
100156 /* The reset value of the ALT_USB_DEV_DOEPINT8_SETUP register field. */
100157 #define ALT_USB_DEV_DOEPINT8_SETUP_RESET 0x0
100158 /* Extracts the ALT_USB_DEV_DOEPINT8_SETUP field value from a register. */
100159 #define ALT_USB_DEV_DOEPINT8_SETUP_GET(value) (((value) & 0x00000008) >> 3)
100160 /* Produces a ALT_USB_DEV_DOEPINT8_SETUP register field value suitable for setting the register. */
100161 #define ALT_USB_DEV_DOEPINT8_SETUP_SET(value) (((value) << 3) & 0x00000008)
100162 
100163 /*
100164  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
100165  *
100166  * Applies only to control OUT endpoints. Indicates that an OUT token was received
100167  * when the endpoint was not yet enabled. This interrupt is asserted on the
100168  * endpoint for which the OUT token was received.
100169  *
100170  * Field Enumeration Values:
100171  *
100172  * Enum | Value | Description
100173  * :-----------------------------------------|:------|:---------------------------------------------
100174  * ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
100175  * ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
100176  *
100177  * Field Access Macros:
100178  *
100179  */
100180 /*
100181  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS
100182  *
100183  * No OUT Token Received When Endpoint Disabled
100184  */
100185 #define ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS_E_INACT 0x0
100186 /*
100187  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS
100188  *
100189  * OUT Token Received When Endpoint Disabled
100190  */
100191 #define ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS_E_ACT 0x1
100192 
100193 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS register field. */
100194 #define ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS_LSB 4
100195 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS register field. */
100196 #define ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS_MSB 4
100197 /* The width in bits of the ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS register field. */
100198 #define ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS_WIDTH 1
100199 /* The mask used to set the ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS register field value. */
100200 #define ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS_SET_MSK 0x00000010
100201 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS register field value. */
100202 #define ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS_CLR_MSK 0xffffffef
100203 /* The reset value of the ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS register field. */
100204 #define ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS_RESET 0x0
100205 /* Extracts the ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS field value from a register. */
100206 #define ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
100207 /* Produces a ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS register field value suitable for setting the register. */
100208 #define ALT_USB_DEV_DOEPINT8_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
100209 
100210 /*
100211  * Field : Status Phase Received for Control Write - stsphsercvd
100212  *
100213  * This interrupt is valid only for Control OUT endpoints and only in Scatter
100214  * Gather DMA mode. This interrupt is generated only after the core has transferred
100215  * all the data that the host has sent during the data phase of a control write
100216  * transfer, to the system memory buffer. The interrupt indicates to the
100217  * application that the host has switched from data phase to the status phase of a
100218  * Control Write transfer. The application can use this interrupt to ACK or STALL
100219  * the Status phase, after it has decoded the data phase. This is applicable only
100220  * in Case of Scatter Gather DMA mode.
100221  *
100222  * Field Enumeration Values:
100223  *
100224  * Enum | Value | Description
100225  * :-----------------------------------------|:------|:-------------------------------------------
100226  * ALT_USB_DEV_DOEPINT8_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
100227  * ALT_USB_DEV_DOEPINT8_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
100228  *
100229  * Field Access Macros:
100230  *
100231  */
100232 /*
100233  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_STSPHSERCVD
100234  *
100235  * No Status Phase Received for Control Write
100236  */
100237 #define ALT_USB_DEV_DOEPINT8_STSPHSERCVD_E_INACT 0x0
100238 /*
100239  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_STSPHSERCVD
100240  *
100241  * Status Phase Received for Control Write
100242  */
100243 #define ALT_USB_DEV_DOEPINT8_STSPHSERCVD_E_ACT 0x1
100244 
100245 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_STSPHSERCVD register field. */
100246 #define ALT_USB_DEV_DOEPINT8_STSPHSERCVD_LSB 5
100247 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_STSPHSERCVD register field. */
100248 #define ALT_USB_DEV_DOEPINT8_STSPHSERCVD_MSB 5
100249 /* The width in bits of the ALT_USB_DEV_DOEPINT8_STSPHSERCVD register field. */
100250 #define ALT_USB_DEV_DOEPINT8_STSPHSERCVD_WIDTH 1
100251 /* The mask used to set the ALT_USB_DEV_DOEPINT8_STSPHSERCVD register field value. */
100252 #define ALT_USB_DEV_DOEPINT8_STSPHSERCVD_SET_MSK 0x00000020
100253 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_STSPHSERCVD register field value. */
100254 #define ALT_USB_DEV_DOEPINT8_STSPHSERCVD_CLR_MSK 0xffffffdf
100255 /* The reset value of the ALT_USB_DEV_DOEPINT8_STSPHSERCVD register field. */
100256 #define ALT_USB_DEV_DOEPINT8_STSPHSERCVD_RESET 0x0
100257 /* Extracts the ALT_USB_DEV_DOEPINT8_STSPHSERCVD field value from a register. */
100258 #define ALT_USB_DEV_DOEPINT8_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
100259 /* Produces a ALT_USB_DEV_DOEPINT8_STSPHSERCVD register field value suitable for setting the register. */
100260 #define ALT_USB_DEV_DOEPINT8_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
100261 
100262 /*
100263  * Field : Back-to-Back SETUP Packets Received - back2backsetup
100264  *
100265  * Applies to Control OUT endpoints only. This bit indicates that the core has
100266  * received more than three back-to-back SETUP packets for this particular
100267  * endpoint. for information about handling this interrupt,
100268  *
100269  * Field Enumeration Values:
100270  *
100271  * Enum | Value | Description
100272  * :--------------------------------------------|:------|:---------------------------------------
100273  * ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
100274  * ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
100275  *
100276  * Field Access Macros:
100277  *
100278  */
100279 /*
100280  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP
100281  *
100282  * No Back-to-Back SETUP Packets Received
100283  */
100284 #define ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP_E_INACT 0x0
100285 /*
100286  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP
100287  *
100288  * Back-to-Back SETUP Packets Received
100289  */
100290 #define ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP_E_ACT 0x1
100291 
100292 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP register field. */
100293 #define ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP_LSB 6
100294 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP register field. */
100295 #define ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP_MSB 6
100296 /* The width in bits of the ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP register field. */
100297 #define ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP_WIDTH 1
100298 /* The mask used to set the ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP register field value. */
100299 #define ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP_SET_MSK 0x00000040
100300 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP register field value. */
100301 #define ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP_CLR_MSK 0xffffffbf
100302 /* The reset value of the ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP register field. */
100303 #define ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP_RESET 0x0
100304 /* Extracts the ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP field value from a register. */
100305 #define ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
100306 /* Produces a ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP register field value suitable for setting the register. */
100307 #define ALT_USB_DEV_DOEPINT8_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
100308 
100309 /*
100310  * Field : OUT Packet Error - outpkterr
100311  *
100312  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
100313  * an overflow or a CRC error for non-Isochronous OUT packet.
100314  *
100315  * Field Enumeration Values:
100316  *
100317  * Enum | Value | Description
100318  * :---------------------------------------|:------|:--------------------
100319  * ALT_USB_DEV_DOEPINT8_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
100320  * ALT_USB_DEV_DOEPINT8_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
100321  *
100322  * Field Access Macros:
100323  *
100324  */
100325 /*
100326  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_OUTPKTERR
100327  *
100328  * No OUT Packet Error
100329  */
100330 #define ALT_USB_DEV_DOEPINT8_OUTPKTERR_E_INACT 0x0
100331 /*
100332  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_OUTPKTERR
100333  *
100334  * OUT Packet Error
100335  */
100336 #define ALT_USB_DEV_DOEPINT8_OUTPKTERR_E_ACT 0x1
100337 
100338 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_OUTPKTERR register field. */
100339 #define ALT_USB_DEV_DOEPINT8_OUTPKTERR_LSB 8
100340 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_OUTPKTERR register field. */
100341 #define ALT_USB_DEV_DOEPINT8_OUTPKTERR_MSB 8
100342 /* The width in bits of the ALT_USB_DEV_DOEPINT8_OUTPKTERR register field. */
100343 #define ALT_USB_DEV_DOEPINT8_OUTPKTERR_WIDTH 1
100344 /* The mask used to set the ALT_USB_DEV_DOEPINT8_OUTPKTERR register field value. */
100345 #define ALT_USB_DEV_DOEPINT8_OUTPKTERR_SET_MSK 0x00000100
100346 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_OUTPKTERR register field value. */
100347 #define ALT_USB_DEV_DOEPINT8_OUTPKTERR_CLR_MSK 0xfffffeff
100348 /* The reset value of the ALT_USB_DEV_DOEPINT8_OUTPKTERR register field. */
100349 #define ALT_USB_DEV_DOEPINT8_OUTPKTERR_RESET 0x0
100350 /* Extracts the ALT_USB_DEV_DOEPINT8_OUTPKTERR field value from a register. */
100351 #define ALT_USB_DEV_DOEPINT8_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
100352 /* Produces a ALT_USB_DEV_DOEPINT8_OUTPKTERR register field value suitable for setting the register. */
100353 #define ALT_USB_DEV_DOEPINT8_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
100354 
100355 /*
100356  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
100357  *
100358  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
100359  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
100360  * the descriptor accessed is not ready for the Core to process, such as Host busy
100361  * or DMA done
100362  *
100363  * Field Enumeration Values:
100364  *
100365  * Enum | Value | Description
100366  * :-------------------------------------|:------|:--------------
100367  * ALT_USB_DEV_DOEPINT8_BNAINTR_E_INACT | 0x0 | No interrupt
100368  * ALT_USB_DEV_DOEPINT8_BNAINTR_E_ACT | 0x1 | BNA interrupt
100369  *
100370  * Field Access Macros:
100371  *
100372  */
100373 /*
100374  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_BNAINTR
100375  *
100376  * No interrupt
100377  */
100378 #define ALT_USB_DEV_DOEPINT8_BNAINTR_E_INACT 0x0
100379 /*
100380  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_BNAINTR
100381  *
100382  * BNA interrupt
100383  */
100384 #define ALT_USB_DEV_DOEPINT8_BNAINTR_E_ACT 0x1
100385 
100386 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_BNAINTR register field. */
100387 #define ALT_USB_DEV_DOEPINT8_BNAINTR_LSB 9
100388 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_BNAINTR register field. */
100389 #define ALT_USB_DEV_DOEPINT8_BNAINTR_MSB 9
100390 /* The width in bits of the ALT_USB_DEV_DOEPINT8_BNAINTR register field. */
100391 #define ALT_USB_DEV_DOEPINT8_BNAINTR_WIDTH 1
100392 /* The mask used to set the ALT_USB_DEV_DOEPINT8_BNAINTR register field value. */
100393 #define ALT_USB_DEV_DOEPINT8_BNAINTR_SET_MSK 0x00000200
100394 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_BNAINTR register field value. */
100395 #define ALT_USB_DEV_DOEPINT8_BNAINTR_CLR_MSK 0xfffffdff
100396 /* The reset value of the ALT_USB_DEV_DOEPINT8_BNAINTR register field. */
100397 #define ALT_USB_DEV_DOEPINT8_BNAINTR_RESET 0x0
100398 /* Extracts the ALT_USB_DEV_DOEPINT8_BNAINTR field value from a register. */
100399 #define ALT_USB_DEV_DOEPINT8_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
100400 /* Produces a ALT_USB_DEV_DOEPINT8_BNAINTR register field value suitable for setting the register. */
100401 #define ALT_USB_DEV_DOEPINT8_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
100402 
100403 /*
100404  * Field : Packet Drop Status - pktdrpsts
100405  *
100406  * This bit indicates to the application that an ISOC OUT packet has been dropped.
100407  * This bit does not have an associated mask bit and does not generate an
100408  * interrupt.
100409  *
100410  * Field Enumeration Values:
100411  *
100412  * Enum | Value | Description
100413  * :---------------------------------------|:------|:-----------------------------
100414  * ALT_USB_DEV_DOEPINT8_PKTDRPSTS_E_INACT | 0x0 | No interrupt
100415  * ALT_USB_DEV_DOEPINT8_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
100416  *
100417  * Field Access Macros:
100418  *
100419  */
100420 /*
100421  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_PKTDRPSTS
100422  *
100423  * No interrupt
100424  */
100425 #define ALT_USB_DEV_DOEPINT8_PKTDRPSTS_E_INACT 0x0
100426 /*
100427  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_PKTDRPSTS
100428  *
100429  * Packet Drop Status interrupt
100430  */
100431 #define ALT_USB_DEV_DOEPINT8_PKTDRPSTS_E_ACT 0x1
100432 
100433 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_PKTDRPSTS register field. */
100434 #define ALT_USB_DEV_DOEPINT8_PKTDRPSTS_LSB 11
100435 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_PKTDRPSTS register field. */
100436 #define ALT_USB_DEV_DOEPINT8_PKTDRPSTS_MSB 11
100437 /* The width in bits of the ALT_USB_DEV_DOEPINT8_PKTDRPSTS register field. */
100438 #define ALT_USB_DEV_DOEPINT8_PKTDRPSTS_WIDTH 1
100439 /* The mask used to set the ALT_USB_DEV_DOEPINT8_PKTDRPSTS register field value. */
100440 #define ALT_USB_DEV_DOEPINT8_PKTDRPSTS_SET_MSK 0x00000800
100441 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_PKTDRPSTS register field value. */
100442 #define ALT_USB_DEV_DOEPINT8_PKTDRPSTS_CLR_MSK 0xfffff7ff
100443 /* The reset value of the ALT_USB_DEV_DOEPINT8_PKTDRPSTS register field. */
100444 #define ALT_USB_DEV_DOEPINT8_PKTDRPSTS_RESET 0x0
100445 /* Extracts the ALT_USB_DEV_DOEPINT8_PKTDRPSTS field value from a register. */
100446 #define ALT_USB_DEV_DOEPINT8_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
100447 /* Produces a ALT_USB_DEV_DOEPINT8_PKTDRPSTS register field value suitable for setting the register. */
100448 #define ALT_USB_DEV_DOEPINT8_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
100449 
100450 /*
100451  * Field : BbleErr Interrupt - bbleerr
100452  *
100453  * The core generates this interrupt when babble is received for the endpoint.
100454  *
100455  * Field Enumeration Values:
100456  *
100457  * Enum | Value | Description
100458  * :-------------------------------------|:------|:------------------
100459  * ALT_USB_DEV_DOEPINT8_BBLEERR_E_INACT | 0x0 | No interrupt
100460  * ALT_USB_DEV_DOEPINT8_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
100461  *
100462  * Field Access Macros:
100463  *
100464  */
100465 /*
100466  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_BBLEERR
100467  *
100468  * No interrupt
100469  */
100470 #define ALT_USB_DEV_DOEPINT8_BBLEERR_E_INACT 0x0
100471 /*
100472  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_BBLEERR
100473  *
100474  * BbleErr interrupt
100475  */
100476 #define ALT_USB_DEV_DOEPINT8_BBLEERR_E_ACT 0x1
100477 
100478 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_BBLEERR register field. */
100479 #define ALT_USB_DEV_DOEPINT8_BBLEERR_LSB 12
100480 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_BBLEERR register field. */
100481 #define ALT_USB_DEV_DOEPINT8_BBLEERR_MSB 12
100482 /* The width in bits of the ALT_USB_DEV_DOEPINT8_BBLEERR register field. */
100483 #define ALT_USB_DEV_DOEPINT8_BBLEERR_WIDTH 1
100484 /* The mask used to set the ALT_USB_DEV_DOEPINT8_BBLEERR register field value. */
100485 #define ALT_USB_DEV_DOEPINT8_BBLEERR_SET_MSK 0x00001000
100486 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_BBLEERR register field value. */
100487 #define ALT_USB_DEV_DOEPINT8_BBLEERR_CLR_MSK 0xffffefff
100488 /* The reset value of the ALT_USB_DEV_DOEPINT8_BBLEERR register field. */
100489 #define ALT_USB_DEV_DOEPINT8_BBLEERR_RESET 0x0
100490 /* Extracts the ALT_USB_DEV_DOEPINT8_BBLEERR field value from a register. */
100491 #define ALT_USB_DEV_DOEPINT8_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
100492 /* Produces a ALT_USB_DEV_DOEPINT8_BBLEERR register field value suitable for setting the register. */
100493 #define ALT_USB_DEV_DOEPINT8_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
100494 
100495 /*
100496  * Field : NAK Interrupt - nakintrpt
100497  *
100498  * The core generates this interrupt when a NAK is transmitted or received by the
100499  * device. In case of isochronous IN endpoints the interrupt gets generated when a
100500  * zero length packet is transmitted due to un-availability of data in the TXFifo.
100501  *
100502  * Field Enumeration Values:
100503  *
100504  * Enum | Value | Description
100505  * :---------------------------------------|:------|:--------------
100506  * ALT_USB_DEV_DOEPINT8_NAKINTRPT_E_INACT | 0x0 | No interrupt
100507  * ALT_USB_DEV_DOEPINT8_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
100508  *
100509  * Field Access Macros:
100510  *
100511  */
100512 /*
100513  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_NAKINTRPT
100514  *
100515  * No interrupt
100516  */
100517 #define ALT_USB_DEV_DOEPINT8_NAKINTRPT_E_INACT 0x0
100518 /*
100519  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_NAKINTRPT
100520  *
100521  * NAK Interrupt
100522  */
100523 #define ALT_USB_DEV_DOEPINT8_NAKINTRPT_E_ACT 0x1
100524 
100525 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_NAKINTRPT register field. */
100526 #define ALT_USB_DEV_DOEPINT8_NAKINTRPT_LSB 13
100527 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_NAKINTRPT register field. */
100528 #define ALT_USB_DEV_DOEPINT8_NAKINTRPT_MSB 13
100529 /* The width in bits of the ALT_USB_DEV_DOEPINT8_NAKINTRPT register field. */
100530 #define ALT_USB_DEV_DOEPINT8_NAKINTRPT_WIDTH 1
100531 /* The mask used to set the ALT_USB_DEV_DOEPINT8_NAKINTRPT register field value. */
100532 #define ALT_USB_DEV_DOEPINT8_NAKINTRPT_SET_MSK 0x00002000
100533 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_NAKINTRPT register field value. */
100534 #define ALT_USB_DEV_DOEPINT8_NAKINTRPT_CLR_MSK 0xffffdfff
100535 /* The reset value of the ALT_USB_DEV_DOEPINT8_NAKINTRPT register field. */
100536 #define ALT_USB_DEV_DOEPINT8_NAKINTRPT_RESET 0x0
100537 /* Extracts the ALT_USB_DEV_DOEPINT8_NAKINTRPT field value from a register. */
100538 #define ALT_USB_DEV_DOEPINT8_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
100539 /* Produces a ALT_USB_DEV_DOEPINT8_NAKINTRPT register field value suitable for setting the register. */
100540 #define ALT_USB_DEV_DOEPINT8_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
100541 
100542 /*
100543  * Field : NYET Interrupt - nyetintrpt
100544  *
100545  * The core generates this interrupt when a NYET response is transmitted for a non
100546  * isochronous OUT endpoint.
100547  *
100548  * Field Enumeration Values:
100549  *
100550  * Enum | Value | Description
100551  * :----------------------------------------|:------|:---------------
100552  * ALT_USB_DEV_DOEPINT8_NYETINTRPT_E_INACT | 0x0 | No interrupt
100553  * ALT_USB_DEV_DOEPINT8_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
100554  *
100555  * Field Access Macros:
100556  *
100557  */
100558 /*
100559  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_NYETINTRPT
100560  *
100561  * No interrupt
100562  */
100563 #define ALT_USB_DEV_DOEPINT8_NYETINTRPT_E_INACT 0x0
100564 /*
100565  * Enumerated value for register field ALT_USB_DEV_DOEPINT8_NYETINTRPT
100566  *
100567  * NYET Interrupt
100568  */
100569 #define ALT_USB_DEV_DOEPINT8_NYETINTRPT_E_ACT 0x1
100570 
100571 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT8_NYETINTRPT register field. */
100572 #define ALT_USB_DEV_DOEPINT8_NYETINTRPT_LSB 14
100573 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT8_NYETINTRPT register field. */
100574 #define ALT_USB_DEV_DOEPINT8_NYETINTRPT_MSB 14
100575 /* The width in bits of the ALT_USB_DEV_DOEPINT8_NYETINTRPT register field. */
100576 #define ALT_USB_DEV_DOEPINT8_NYETINTRPT_WIDTH 1
100577 /* The mask used to set the ALT_USB_DEV_DOEPINT8_NYETINTRPT register field value. */
100578 #define ALT_USB_DEV_DOEPINT8_NYETINTRPT_SET_MSK 0x00004000
100579 /* The mask used to clear the ALT_USB_DEV_DOEPINT8_NYETINTRPT register field value. */
100580 #define ALT_USB_DEV_DOEPINT8_NYETINTRPT_CLR_MSK 0xffffbfff
100581 /* The reset value of the ALT_USB_DEV_DOEPINT8_NYETINTRPT register field. */
100582 #define ALT_USB_DEV_DOEPINT8_NYETINTRPT_RESET 0x0
100583 /* Extracts the ALT_USB_DEV_DOEPINT8_NYETINTRPT field value from a register. */
100584 #define ALT_USB_DEV_DOEPINT8_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
100585 /* Produces a ALT_USB_DEV_DOEPINT8_NYETINTRPT register field value suitable for setting the register. */
100586 #define ALT_USB_DEV_DOEPINT8_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
100587 
100588 #ifndef __ASSEMBLY__
100589 /*
100590  * WARNING: The C register and register group struct declarations are provided for
100591  * convenience and illustrative purposes. They should, however, be used with
100592  * caution as the C language standard provides no guarantees about the alignment or
100593  * atomicity of device memory accesses. The recommended practice for writing
100594  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
100595  * alt_write_word() functions.
100596  *
100597  * The struct declaration for register ALT_USB_DEV_DOEPINT8.
100598  */
100599 struct ALT_USB_DEV_DOEPINT8_s
100600 {
100601  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
100602  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
100603  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT8_AHBERR */
100604  const uint32_t setup : 1; /* SETUP Phase Done */
100605  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
100606  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
100607  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
100608  uint32_t : 1; /* *UNDEFINED* */
100609  const uint32_t outpkterr : 1; /* OUT Packet Error */
100610  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
100611  uint32_t : 1; /* *UNDEFINED* */
100612  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
100613  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
100614  const uint32_t nakintrpt : 1; /* NAK Interrupt */
100615  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
100616  uint32_t : 17; /* *UNDEFINED* */
100617 };
100618 
100619 /* The typedef declaration for register ALT_USB_DEV_DOEPINT8. */
100620 typedef volatile struct ALT_USB_DEV_DOEPINT8_s ALT_USB_DEV_DOEPINT8_t;
100621 #endif /* __ASSEMBLY__ */
100622 
100623 /* The byte offset of the ALT_USB_DEV_DOEPINT8 register from the beginning of the component. */
100624 #define ALT_USB_DEV_DOEPINT8_OFST 0x408
100625 /* The address of the ALT_USB_DEV_DOEPINT8 register. */
100626 #define ALT_USB_DEV_DOEPINT8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT8_OFST))
100627 
100628 /*
100629  * Register : Device OUT Endpoint 8 Transfer Size Register - doeptsiz8
100630  *
100631  * The application must modify this register before enabling the endpoint. Once the
100632  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
100633  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
100634  * application can only read this register once the core has cleared the Endpoint
100635  * Enable bit.
100636  *
100637  * Register Layout
100638  *
100639  * Bits | Access | Reset | Description
100640  * :--------|:-------|:------|:-------------------
100641  * [18:0] | RW | 0x0 | Transfer Size
100642  * [28:19] | RW | 0x0 | Packet Count
100643  * [30:29] | R | 0x0 | SETUP Packet Count
100644  * [31] | ??? | 0x0 | *UNDEFINED*
100645  *
100646  */
100647 /*
100648  * Field : Transfer Size - xfersize
100649  *
100650  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
100651  * application only after it has exhausted the transfer size amount of data. The
100652  * transfer size can be Set to the maximum packet size of the endpoint, to be
100653  * interrupted at the end of each packet. The core decrements this field every time
100654  * a packet from the external memory is written to the RxFIFO.
100655  *
100656  * Field Access Macros:
100657  *
100658  */
100659 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ8_XFERSIZE register field. */
100660 #define ALT_USB_DEV_DOEPTSIZ8_XFERSIZE_LSB 0
100661 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ8_XFERSIZE register field. */
100662 #define ALT_USB_DEV_DOEPTSIZ8_XFERSIZE_MSB 18
100663 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ8_XFERSIZE register field. */
100664 #define ALT_USB_DEV_DOEPTSIZ8_XFERSIZE_WIDTH 19
100665 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ8_XFERSIZE register field value. */
100666 #define ALT_USB_DEV_DOEPTSIZ8_XFERSIZE_SET_MSK 0x0007ffff
100667 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ8_XFERSIZE register field value. */
100668 #define ALT_USB_DEV_DOEPTSIZ8_XFERSIZE_CLR_MSK 0xfff80000
100669 /* The reset value of the ALT_USB_DEV_DOEPTSIZ8_XFERSIZE register field. */
100670 #define ALT_USB_DEV_DOEPTSIZ8_XFERSIZE_RESET 0x0
100671 /* Extracts the ALT_USB_DEV_DOEPTSIZ8_XFERSIZE field value from a register. */
100672 #define ALT_USB_DEV_DOEPTSIZ8_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
100673 /* Produces a ALT_USB_DEV_DOEPTSIZ8_XFERSIZE register field value suitable for setting the register. */
100674 #define ALT_USB_DEV_DOEPTSIZ8_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
100675 
100676 /*
100677  * Field : Packet Count - pktcnt
100678  *
100679  * Indicates the total number of USB packets that constitute the Transfer Size
100680  * amount of data for endpoint 0.This field is decremented every time a packet
100681  * (maximum size or short packet) is read from the RxFIFO.
100682  *
100683  * Field Access Macros:
100684  *
100685  */
100686 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ8_PKTCNT register field. */
100687 #define ALT_USB_DEV_DOEPTSIZ8_PKTCNT_LSB 19
100688 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ8_PKTCNT register field. */
100689 #define ALT_USB_DEV_DOEPTSIZ8_PKTCNT_MSB 28
100690 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ8_PKTCNT register field. */
100691 #define ALT_USB_DEV_DOEPTSIZ8_PKTCNT_WIDTH 10
100692 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ8_PKTCNT register field value. */
100693 #define ALT_USB_DEV_DOEPTSIZ8_PKTCNT_SET_MSK 0x1ff80000
100694 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ8_PKTCNT register field value. */
100695 #define ALT_USB_DEV_DOEPTSIZ8_PKTCNT_CLR_MSK 0xe007ffff
100696 /* The reset value of the ALT_USB_DEV_DOEPTSIZ8_PKTCNT register field. */
100697 #define ALT_USB_DEV_DOEPTSIZ8_PKTCNT_RESET 0x0
100698 /* Extracts the ALT_USB_DEV_DOEPTSIZ8_PKTCNT field value from a register. */
100699 #define ALT_USB_DEV_DOEPTSIZ8_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
100700 /* Produces a ALT_USB_DEV_DOEPTSIZ8_PKTCNT register field value suitable for setting the register. */
100701 #define ALT_USB_DEV_DOEPTSIZ8_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
100702 
100703 /*
100704  * Field : SETUP Packet Count - rxdpid
100705  *
100706  * Applies to isochronous OUT endpoints only.This is the data PID received in the
100707  * last packet for this endpoint. Use datax.
100708  *
100709  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
100710  * number of back-to-back SETUP data packets the endpoint can receive.
100711  *
100712  * Field Enumeration Values:
100713  *
100714  * Enum | Value | Description
100715  * :-----------------------------------------|:------|:-------------------
100716  * ALT_USB_DEV_DOEPTSIZ8_RXDPID_E_DATA0 | 0x0 | DATA0
100717  * ALT_USB_DEV_DOEPTSIZ8_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
100718  * ALT_USB_DEV_DOEPTSIZ8_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
100719  * ALT_USB_DEV_DOEPTSIZ8_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
100720  *
100721  * Field Access Macros:
100722  *
100723  */
100724 /*
100725  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ8_RXDPID
100726  *
100727  * DATA0
100728  */
100729 #define ALT_USB_DEV_DOEPTSIZ8_RXDPID_E_DATA0 0x0
100730 /*
100731  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ8_RXDPID
100732  *
100733  * DATA2 or 1 packet
100734  */
100735 #define ALT_USB_DEV_DOEPTSIZ8_RXDPID_E_DATA2PKT1 0x1
100736 /*
100737  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ8_RXDPID
100738  *
100739  * DATA1 or 2 packets
100740  */
100741 #define ALT_USB_DEV_DOEPTSIZ8_RXDPID_E_DATA1PKT2 0x2
100742 /*
100743  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ8_RXDPID
100744  *
100745  * MDATA or 3 packets
100746  */
100747 #define ALT_USB_DEV_DOEPTSIZ8_RXDPID_E_MDATAPKT3 0x3
100748 
100749 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ8_RXDPID register field. */
100750 #define ALT_USB_DEV_DOEPTSIZ8_RXDPID_LSB 29
100751 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ8_RXDPID register field. */
100752 #define ALT_USB_DEV_DOEPTSIZ8_RXDPID_MSB 30
100753 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ8_RXDPID register field. */
100754 #define ALT_USB_DEV_DOEPTSIZ8_RXDPID_WIDTH 2
100755 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ8_RXDPID register field value. */
100756 #define ALT_USB_DEV_DOEPTSIZ8_RXDPID_SET_MSK 0x60000000
100757 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ8_RXDPID register field value. */
100758 #define ALT_USB_DEV_DOEPTSIZ8_RXDPID_CLR_MSK 0x9fffffff
100759 /* The reset value of the ALT_USB_DEV_DOEPTSIZ8_RXDPID register field. */
100760 #define ALT_USB_DEV_DOEPTSIZ8_RXDPID_RESET 0x0
100761 /* Extracts the ALT_USB_DEV_DOEPTSIZ8_RXDPID field value from a register. */
100762 #define ALT_USB_DEV_DOEPTSIZ8_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
100763 /* Produces a ALT_USB_DEV_DOEPTSIZ8_RXDPID register field value suitable for setting the register. */
100764 #define ALT_USB_DEV_DOEPTSIZ8_RXDPID_SET(value) (((value) << 29) & 0x60000000)
100765 
100766 #ifndef __ASSEMBLY__
100767 /*
100768  * WARNING: The C register and register group struct declarations are provided for
100769  * convenience and illustrative purposes. They should, however, be used with
100770  * caution as the C language standard provides no guarantees about the alignment or
100771  * atomicity of device memory accesses. The recommended practice for writing
100772  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
100773  * alt_write_word() functions.
100774  *
100775  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ8.
100776  */
100777 struct ALT_USB_DEV_DOEPTSIZ8_s
100778 {
100779  uint32_t xfersize : 19; /* Transfer Size */
100780  uint32_t pktcnt : 10; /* Packet Count */
100781  const uint32_t rxdpid : 2; /* SETUP Packet Count */
100782  uint32_t : 1; /* *UNDEFINED* */
100783 };
100784 
100785 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ8. */
100786 typedef volatile struct ALT_USB_DEV_DOEPTSIZ8_s ALT_USB_DEV_DOEPTSIZ8_t;
100787 #endif /* __ASSEMBLY__ */
100788 
100789 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ8 register from the beginning of the component. */
100790 #define ALT_USB_DEV_DOEPTSIZ8_OFST 0x410
100791 /* The address of the ALT_USB_DEV_DOEPTSIZ8 register. */
100792 #define ALT_USB_DEV_DOEPTSIZ8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ8_OFST))
100793 
100794 /*
100795  * Register : Device OUT Endpoint 8 DMA Address Register - doepdma8
100796  *
100797  * DMA OUT Address.
100798  *
100799  * Register Layout
100800  *
100801  * Bits | Access | Reset | Description
100802  * :-------|:-------|:--------|:------------
100803  * [31:0] | RW | Unknown | DMA Address
100804  *
100805  */
100806 /*
100807  * Field : DMA Address - doepdma8
100808  *
100809  * Holds the start address of the external memory for storing or fetching endpoint
100810  * data. for control endpoints, this field stores control OUT data packets as well
100811  * as SETUP transaction data packets. When more than three SETUP packets are
100812  * received back-to-back, the SETUP data packet in the memory is overwritten. This
100813  * register is incremented on every AHB transaction. The application can give only
100814  * a DWORD-aligned address.
100815  *
100816  * When Scatter/Gather DMA mode is not enabled, the application programs the start
100817  * address value in this field.
100818  *
100819  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
100820  * for the descriptor list.
100821  *
100822  * Field Access Macros:
100823  *
100824  */
100825 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA8_DOEPDMA8 register field. */
100826 #define ALT_USB_DEV_DOEPDMA8_DOEPDMA8_LSB 0
100827 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA8_DOEPDMA8 register field. */
100828 #define ALT_USB_DEV_DOEPDMA8_DOEPDMA8_MSB 31
100829 /* The width in bits of the ALT_USB_DEV_DOEPDMA8_DOEPDMA8 register field. */
100830 #define ALT_USB_DEV_DOEPDMA8_DOEPDMA8_WIDTH 32
100831 /* The mask used to set the ALT_USB_DEV_DOEPDMA8_DOEPDMA8 register field value. */
100832 #define ALT_USB_DEV_DOEPDMA8_DOEPDMA8_SET_MSK 0xffffffff
100833 /* The mask used to clear the ALT_USB_DEV_DOEPDMA8_DOEPDMA8 register field value. */
100834 #define ALT_USB_DEV_DOEPDMA8_DOEPDMA8_CLR_MSK 0x00000000
100835 /* The reset value of the ALT_USB_DEV_DOEPDMA8_DOEPDMA8 register field is UNKNOWN. */
100836 #define ALT_USB_DEV_DOEPDMA8_DOEPDMA8_RESET 0x0
100837 /* Extracts the ALT_USB_DEV_DOEPDMA8_DOEPDMA8 field value from a register. */
100838 #define ALT_USB_DEV_DOEPDMA8_DOEPDMA8_GET(value) (((value) & 0xffffffff) >> 0)
100839 /* Produces a ALT_USB_DEV_DOEPDMA8_DOEPDMA8 register field value suitable for setting the register. */
100840 #define ALT_USB_DEV_DOEPDMA8_DOEPDMA8_SET(value) (((value) << 0) & 0xffffffff)
100841 
100842 #ifndef __ASSEMBLY__
100843 /*
100844  * WARNING: The C register and register group struct declarations are provided for
100845  * convenience and illustrative purposes. They should, however, be used with
100846  * caution as the C language standard provides no guarantees about the alignment or
100847  * atomicity of device memory accesses. The recommended practice for writing
100848  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
100849  * alt_write_word() functions.
100850  *
100851  * The struct declaration for register ALT_USB_DEV_DOEPDMA8.
100852  */
100853 struct ALT_USB_DEV_DOEPDMA8_s
100854 {
100855  uint32_t doepdma8 : 32; /* DMA Address */
100856 };
100857 
100858 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA8. */
100859 typedef volatile struct ALT_USB_DEV_DOEPDMA8_s ALT_USB_DEV_DOEPDMA8_t;
100860 #endif /* __ASSEMBLY__ */
100861 
100862 /* The byte offset of the ALT_USB_DEV_DOEPDMA8 register from the beginning of the component. */
100863 #define ALT_USB_DEV_DOEPDMA8_OFST 0x414
100864 /* The address of the ALT_USB_DEV_DOEPDMA8 register. */
100865 #define ALT_USB_DEV_DOEPDMA8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA8_OFST))
100866 
100867 /*
100868  * Register : Device OUT Endpoint 8 DMA Buffer Address Register - doepdmab8
100869  *
100870  * DMA Buffer Address.
100871  *
100872  * Register Layout
100873  *
100874  * Bits | Access | Reset | Description
100875  * :-------|:-------|:--------|:-------------------
100876  * [31:0] | R | Unknown | DMA Buffer Address
100877  *
100878  */
100879 /*
100880  * Field : DMA Buffer Address - doepdmab8
100881  *
100882  * Holds the current buffer address. This register is updated as and when the data
100883  * transfer for the corresponding end point is in progress. This register is
100884  * present only in Scatter/Gather DMA mode.
100885  *
100886  * Field Access Macros:
100887  *
100888  */
100889 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8 register field. */
100890 #define ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8_LSB 0
100891 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8 register field. */
100892 #define ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8_MSB 31
100893 /* The width in bits of the ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8 register field. */
100894 #define ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8_WIDTH 32
100895 /* The mask used to set the ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8 register field value. */
100896 #define ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8_SET_MSK 0xffffffff
100897 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8 register field value. */
100898 #define ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8_CLR_MSK 0x00000000
100899 /* The reset value of the ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8 register field is UNKNOWN. */
100900 #define ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8_RESET 0x0
100901 /* Extracts the ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8 field value from a register. */
100902 #define ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8_GET(value) (((value) & 0xffffffff) >> 0)
100903 /* Produces a ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8 register field value suitable for setting the register. */
100904 #define ALT_USB_DEV_DOEPDMAB8_DOEPDMAB8_SET(value) (((value) << 0) & 0xffffffff)
100905 
100906 #ifndef __ASSEMBLY__
100907 /*
100908  * WARNING: The C register and register group struct declarations are provided for
100909  * convenience and illustrative purposes. They should, however, be used with
100910  * caution as the C language standard provides no guarantees about the alignment or
100911  * atomicity of device memory accesses. The recommended practice for writing
100912  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
100913  * alt_write_word() functions.
100914  *
100915  * The struct declaration for register ALT_USB_DEV_DOEPDMAB8.
100916  */
100917 struct ALT_USB_DEV_DOEPDMAB8_s
100918 {
100919  const uint32_t doepdmab8 : 32; /* DMA Buffer Address */
100920 };
100921 
100922 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB8. */
100923 typedef volatile struct ALT_USB_DEV_DOEPDMAB8_s ALT_USB_DEV_DOEPDMAB8_t;
100924 #endif /* __ASSEMBLY__ */
100925 
100926 /* The byte offset of the ALT_USB_DEV_DOEPDMAB8 register from the beginning of the component. */
100927 #define ALT_USB_DEV_DOEPDMAB8_OFST 0x41c
100928 /* The address of the ALT_USB_DEV_DOEPDMAB8 register. */
100929 #define ALT_USB_DEV_DOEPDMAB8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB8_OFST))
100930 
100931 /*
100932  * Register : Device Control OUT Endpoint 9 Control Register - doepctl9
100933  *
100934  * Out Endpoint 9.
100935  *
100936  * Register Layout
100937  *
100938  * Bits | Access | Reset | Description
100939  * :--------|:-------|:------|:--------------------
100940  * [10:0] | RW | 0x0 | Maximum Packet Size
100941  * [14:11] | ??? | 0x0 | *UNDEFINED*
100942  * [15] | RW | 0x0 | USB Active Endpoint
100943  * [16] | R | 0x0 | Endpoint Data PID
100944  * [17] | R | 0x0 | NAK Status
100945  * [19:18] | RW | 0x0 | Endpoint Type
100946  * [20] | RW | 0x0 | Snoop Mode
100947  * [21] | R | 0x0 | STALL Handshake
100948  * [25:22] | ??? | 0x0 | *UNDEFINED*
100949  * [26] | W | 0x0 | Clear NAK
100950  * [27] | W | 0x0 | Set NAK
100951  * [28] | W | 0x0 | Set DATA0 PID
100952  * [29] | W | 0x0 | Set DATA1 PID
100953  * [30] | R | 0x0 | Endpoint Disable
100954  * [31] | R | 0x0 | Endpoint Enable
100955  *
100956  */
100957 /*
100958  * Field : Maximum Packet Size - mps
100959  *
100960  * Applies to IN and OUT endpoints. The application must program this field with
100961  * the maximum packet size for the current logical endpoint. This value is in
100962  * bytes.
100963  *
100964  * Field Access Macros:
100965  *
100966  */
100967 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_MPS register field. */
100968 #define ALT_USB_DEV_DOEPCTL9_MPS_LSB 0
100969 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_MPS register field. */
100970 #define ALT_USB_DEV_DOEPCTL9_MPS_MSB 10
100971 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_MPS register field. */
100972 #define ALT_USB_DEV_DOEPCTL9_MPS_WIDTH 11
100973 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_MPS register field value. */
100974 #define ALT_USB_DEV_DOEPCTL9_MPS_SET_MSK 0x000007ff
100975 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_MPS register field value. */
100976 #define ALT_USB_DEV_DOEPCTL9_MPS_CLR_MSK 0xfffff800
100977 /* The reset value of the ALT_USB_DEV_DOEPCTL9_MPS register field. */
100978 #define ALT_USB_DEV_DOEPCTL9_MPS_RESET 0x0
100979 /* Extracts the ALT_USB_DEV_DOEPCTL9_MPS field value from a register. */
100980 #define ALT_USB_DEV_DOEPCTL9_MPS_GET(value) (((value) & 0x000007ff) >> 0)
100981 /* Produces a ALT_USB_DEV_DOEPCTL9_MPS register field value suitable for setting the register. */
100982 #define ALT_USB_DEV_DOEPCTL9_MPS_SET(value) (((value) << 0) & 0x000007ff)
100983 
100984 /*
100985  * Field : USB Active Endpoint - usbactep
100986  *
100987  * Indicates whether this endpoint is active in the current configuration and
100988  * interface. The core clears this bit for all endpoints (other than EP 0) after
100989  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
100990  * commands, the application must program endpoint registers accordingly and set
100991  * this bit.
100992  *
100993  * Field Enumeration Values:
100994  *
100995  * Enum | Value | Description
100996  * :-------------------------------------|:------|:--------------------
100997  * ALT_USB_DEV_DOEPCTL9_USBACTEP_E_DISD | 0x0 | Not Active
100998  * ALT_USB_DEV_DOEPCTL9_USBACTEP_E_END | 0x1 | USB Active Endpoint
100999  *
101000  * Field Access Macros:
101001  *
101002  */
101003 /*
101004  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_USBACTEP
101005  *
101006  * Not Active
101007  */
101008 #define ALT_USB_DEV_DOEPCTL9_USBACTEP_E_DISD 0x0
101009 /*
101010  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_USBACTEP
101011  *
101012  * USB Active Endpoint
101013  */
101014 #define ALT_USB_DEV_DOEPCTL9_USBACTEP_E_END 0x1
101015 
101016 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_USBACTEP register field. */
101017 #define ALT_USB_DEV_DOEPCTL9_USBACTEP_LSB 15
101018 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_USBACTEP register field. */
101019 #define ALT_USB_DEV_DOEPCTL9_USBACTEP_MSB 15
101020 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_USBACTEP register field. */
101021 #define ALT_USB_DEV_DOEPCTL9_USBACTEP_WIDTH 1
101022 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_USBACTEP register field value. */
101023 #define ALT_USB_DEV_DOEPCTL9_USBACTEP_SET_MSK 0x00008000
101024 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_USBACTEP register field value. */
101025 #define ALT_USB_DEV_DOEPCTL9_USBACTEP_CLR_MSK 0xffff7fff
101026 /* The reset value of the ALT_USB_DEV_DOEPCTL9_USBACTEP register field. */
101027 #define ALT_USB_DEV_DOEPCTL9_USBACTEP_RESET 0x0
101028 /* Extracts the ALT_USB_DEV_DOEPCTL9_USBACTEP field value from a register. */
101029 #define ALT_USB_DEV_DOEPCTL9_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
101030 /* Produces a ALT_USB_DEV_DOEPCTL9_USBACTEP register field value suitable for setting the register. */
101031 #define ALT_USB_DEV_DOEPCTL9_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
101032 
101033 /*
101034  * Field : Endpoint Data PID - dpid
101035  *
101036  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
101037  * packet to be received or transmitted on this endpoint. The application must
101038  * program the PID of the first packet to be received or transmitted on this
101039  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
101040  * SetD0PID fields of this register to program either DATA0 or DATA1 PID.
101041  *
101042  * 0: DATA0
101043  *
101044  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
101045  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
101046  * DMA mode:
101047  *
101048  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
101049  * number in which the core transmits/receives isochronous data for this endpoint.
101050  * The application must program the even/odd (micro) frame number in which it
101051  * intends to transmit/receive isochronous data for this endpoint using the
101052  * SetEvnFr and SetOddFr fields in this register.
101053  *
101054  * 0: Even (micro)frame
101055  *
101056  * 1: Odd (micro)frame
101057  *
101058  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
101059  * number in which to send data is provided in the transmit descriptor structure.
101060  * The frame in which data is received is updated in receive descriptor structure.
101061  *
101062  * Field Enumeration Values:
101063  *
101064  * Enum | Value | Description
101065  * :----------------------------------|:------|:-----------------------------
101066  * ALT_USB_DEV_DOEPCTL9_DPID_E_INACT | 0x0 | Endpoint Data PID not active
101067  * ALT_USB_DEV_DOEPCTL9_DPID_E_ACT | 0x1 | Endpoint Data PID active
101068  *
101069  * Field Access Macros:
101070  *
101071  */
101072 /*
101073  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_DPID
101074  *
101075  * Endpoint Data PID not active
101076  */
101077 #define ALT_USB_DEV_DOEPCTL9_DPID_E_INACT 0x0
101078 /*
101079  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_DPID
101080  *
101081  * Endpoint Data PID active
101082  */
101083 #define ALT_USB_DEV_DOEPCTL9_DPID_E_ACT 0x1
101084 
101085 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_DPID register field. */
101086 #define ALT_USB_DEV_DOEPCTL9_DPID_LSB 16
101087 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_DPID register field. */
101088 #define ALT_USB_DEV_DOEPCTL9_DPID_MSB 16
101089 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_DPID register field. */
101090 #define ALT_USB_DEV_DOEPCTL9_DPID_WIDTH 1
101091 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_DPID register field value. */
101092 #define ALT_USB_DEV_DOEPCTL9_DPID_SET_MSK 0x00010000
101093 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_DPID register field value. */
101094 #define ALT_USB_DEV_DOEPCTL9_DPID_CLR_MSK 0xfffeffff
101095 /* The reset value of the ALT_USB_DEV_DOEPCTL9_DPID register field. */
101096 #define ALT_USB_DEV_DOEPCTL9_DPID_RESET 0x0
101097 /* Extracts the ALT_USB_DEV_DOEPCTL9_DPID field value from a register. */
101098 #define ALT_USB_DEV_DOEPCTL9_DPID_GET(value) (((value) & 0x00010000) >> 16)
101099 /* Produces a ALT_USB_DEV_DOEPCTL9_DPID register field value suitable for setting the register. */
101100 #define ALT_USB_DEV_DOEPCTL9_DPID_SET(value) (((value) << 16) & 0x00010000)
101101 
101102 /*
101103  * Field : NAK Status - naksts
101104  *
101105  * When either the application or the core sets this bit:
101106  *
101107  * * The core stops receiving any data on an OUT endpoint, even if there is space
101108  * in the RxFIFO to accommodate the incoming packet.
101109  *
101110  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
101111  * IN endpoint, even if there data is available in the TxFIFO.
101112  *
101113  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
101114  * even if there data is available in the TxFIFO.
101115  *
101116  * Irrespective of this bit's setting, the core always responds to SETUP data
101117  * packets with an ACK handshake.
101118  *
101119  * Field Enumeration Values:
101120  *
101121  * Enum | Value | Description
101122  * :-------------------------------------|:------|:------------------------------------------------
101123  * ALT_USB_DEV_DOEPCTL9_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
101124  * : | | based on the FIFO status
101125  * ALT_USB_DEV_DOEPCTL9_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
101126  * : | | endpoint
101127  *
101128  * Field Access Macros:
101129  *
101130  */
101131 /*
101132  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_NAKSTS
101133  *
101134  * The core is transmitting non-NAK handshakes based on the FIFO status
101135  */
101136 #define ALT_USB_DEV_DOEPCTL9_NAKSTS_E_NONNAK 0x0
101137 /*
101138  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_NAKSTS
101139  *
101140  * The core is transmitting NAK handshakes on this endpoint
101141  */
101142 #define ALT_USB_DEV_DOEPCTL9_NAKSTS_E_NAK 0x1
101143 
101144 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_NAKSTS register field. */
101145 #define ALT_USB_DEV_DOEPCTL9_NAKSTS_LSB 17
101146 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_NAKSTS register field. */
101147 #define ALT_USB_DEV_DOEPCTL9_NAKSTS_MSB 17
101148 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_NAKSTS register field. */
101149 #define ALT_USB_DEV_DOEPCTL9_NAKSTS_WIDTH 1
101150 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_NAKSTS register field value. */
101151 #define ALT_USB_DEV_DOEPCTL9_NAKSTS_SET_MSK 0x00020000
101152 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_NAKSTS register field value. */
101153 #define ALT_USB_DEV_DOEPCTL9_NAKSTS_CLR_MSK 0xfffdffff
101154 /* The reset value of the ALT_USB_DEV_DOEPCTL9_NAKSTS register field. */
101155 #define ALT_USB_DEV_DOEPCTL9_NAKSTS_RESET 0x0
101156 /* Extracts the ALT_USB_DEV_DOEPCTL9_NAKSTS field value from a register. */
101157 #define ALT_USB_DEV_DOEPCTL9_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
101158 /* Produces a ALT_USB_DEV_DOEPCTL9_NAKSTS register field value suitable for setting the register. */
101159 #define ALT_USB_DEV_DOEPCTL9_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
101160 
101161 /*
101162  * Field : Endpoint Type - eptype
101163  *
101164  * This is the transfer type supported by this logical endpoint.
101165  *
101166  * Field Enumeration Values:
101167  *
101168  * Enum | Value | Description
101169  * :------------------------------------------|:------|:------------
101170  * ALT_USB_DEV_DOEPCTL9_EPTYPE_E_CTL | 0x0 | Control
101171  * ALT_USB_DEV_DOEPCTL9_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
101172  * ALT_USB_DEV_DOEPCTL9_EPTYPE_E_BULK | 0x2 | Bulk
101173  * ALT_USB_DEV_DOEPCTL9_EPTYPE_E_INTERRUP | 0x3 | Interrupt
101174  *
101175  * Field Access Macros:
101176  *
101177  */
101178 /*
101179  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_EPTYPE
101180  *
101181  * Control
101182  */
101183 #define ALT_USB_DEV_DOEPCTL9_EPTYPE_E_CTL 0x0
101184 /*
101185  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_EPTYPE
101186  *
101187  * Isochronous
101188  */
101189 #define ALT_USB_DEV_DOEPCTL9_EPTYPE_E_ISOCHRONOUS 0x1
101190 /*
101191  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_EPTYPE
101192  *
101193  * Bulk
101194  */
101195 #define ALT_USB_DEV_DOEPCTL9_EPTYPE_E_BULK 0x2
101196 /*
101197  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_EPTYPE
101198  *
101199  * Interrupt
101200  */
101201 #define ALT_USB_DEV_DOEPCTL9_EPTYPE_E_INTERRUP 0x3
101202 
101203 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_EPTYPE register field. */
101204 #define ALT_USB_DEV_DOEPCTL9_EPTYPE_LSB 18
101205 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_EPTYPE register field. */
101206 #define ALT_USB_DEV_DOEPCTL9_EPTYPE_MSB 19
101207 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_EPTYPE register field. */
101208 #define ALT_USB_DEV_DOEPCTL9_EPTYPE_WIDTH 2
101209 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_EPTYPE register field value. */
101210 #define ALT_USB_DEV_DOEPCTL9_EPTYPE_SET_MSK 0x000c0000
101211 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_EPTYPE register field value. */
101212 #define ALT_USB_DEV_DOEPCTL9_EPTYPE_CLR_MSK 0xfff3ffff
101213 /* The reset value of the ALT_USB_DEV_DOEPCTL9_EPTYPE register field. */
101214 #define ALT_USB_DEV_DOEPCTL9_EPTYPE_RESET 0x0
101215 /* Extracts the ALT_USB_DEV_DOEPCTL9_EPTYPE field value from a register. */
101216 #define ALT_USB_DEV_DOEPCTL9_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
101217 /* Produces a ALT_USB_DEV_DOEPCTL9_EPTYPE register field value suitable for setting the register. */
101218 #define ALT_USB_DEV_DOEPCTL9_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
101219 
101220 /*
101221  * Field : Snoop Mode - snp
101222  *
101223  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
101224  * In Snoop mode, the core does not check the correctness of OUT packets before
101225  * transferring them to application memory.
101226  *
101227  * Field Enumeration Values:
101228  *
101229  * Enum | Value | Description
101230  * :-------------------------------|:------|:-------------------
101231  * ALT_USB_DEV_DOEPCTL9_SNP_E_DIS | 0x0 | Disable Snoop Mode
101232  * ALT_USB_DEV_DOEPCTL9_SNP_E_EN | 0x1 | Enable Snoop Mode
101233  *
101234  * Field Access Macros:
101235  *
101236  */
101237 /*
101238  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_SNP
101239  *
101240  * Disable Snoop Mode
101241  */
101242 #define ALT_USB_DEV_DOEPCTL9_SNP_E_DIS 0x0
101243 /*
101244  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_SNP
101245  *
101246  * Enable Snoop Mode
101247  */
101248 #define ALT_USB_DEV_DOEPCTL9_SNP_E_EN 0x1
101249 
101250 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_SNP register field. */
101251 #define ALT_USB_DEV_DOEPCTL9_SNP_LSB 20
101252 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_SNP register field. */
101253 #define ALT_USB_DEV_DOEPCTL9_SNP_MSB 20
101254 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_SNP register field. */
101255 #define ALT_USB_DEV_DOEPCTL9_SNP_WIDTH 1
101256 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_SNP register field value. */
101257 #define ALT_USB_DEV_DOEPCTL9_SNP_SET_MSK 0x00100000
101258 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_SNP register field value. */
101259 #define ALT_USB_DEV_DOEPCTL9_SNP_CLR_MSK 0xffefffff
101260 /* The reset value of the ALT_USB_DEV_DOEPCTL9_SNP register field. */
101261 #define ALT_USB_DEV_DOEPCTL9_SNP_RESET 0x0
101262 /* Extracts the ALT_USB_DEV_DOEPCTL9_SNP field value from a register. */
101263 #define ALT_USB_DEV_DOEPCTL9_SNP_GET(value) (((value) & 0x00100000) >> 20)
101264 /* Produces a ALT_USB_DEV_DOEPCTL9_SNP register field value suitable for setting the register. */
101265 #define ALT_USB_DEV_DOEPCTL9_SNP_SET(value) (((value) << 20) & 0x00100000)
101266 
101267 /*
101268  * Field : STALL Handshake - stall
101269  *
101270  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
101271  * application sets this bit to stall all tokens from the USB host to this
101272  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
101273  * along with this bit, the STALL bit takes priority. Only the application can
101274  * clear this bit, never the core. Applies to control endpoints only. The
101275  * application can only set this bit, and the core clears it, when a SETUP token is
101276  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
101277  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
101278  * of this bit's setting, the core always responds to SETUP data packets with an
101279  * ACK handshake.
101280  *
101281  * Field Enumeration Values:
101282  *
101283  * Enum | Value | Description
101284  * :-----------------------------------|:------|:----------------------------
101285  * ALT_USB_DEV_DOEPCTL9_STALL_E_INACT | 0x0 | STALL All Tokens not active
101286  * ALT_USB_DEV_DOEPCTL9_STALL_E_ACT | 0x1 | STALL All Tokens active
101287  *
101288  * Field Access Macros:
101289  *
101290  */
101291 /*
101292  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_STALL
101293  *
101294  * STALL All Tokens not active
101295  */
101296 #define ALT_USB_DEV_DOEPCTL9_STALL_E_INACT 0x0
101297 /*
101298  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_STALL
101299  *
101300  * STALL All Tokens active
101301  */
101302 #define ALT_USB_DEV_DOEPCTL9_STALL_E_ACT 0x1
101303 
101304 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_STALL register field. */
101305 #define ALT_USB_DEV_DOEPCTL9_STALL_LSB 21
101306 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_STALL register field. */
101307 #define ALT_USB_DEV_DOEPCTL9_STALL_MSB 21
101308 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_STALL register field. */
101309 #define ALT_USB_DEV_DOEPCTL9_STALL_WIDTH 1
101310 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_STALL register field value. */
101311 #define ALT_USB_DEV_DOEPCTL9_STALL_SET_MSK 0x00200000
101312 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_STALL register field value. */
101313 #define ALT_USB_DEV_DOEPCTL9_STALL_CLR_MSK 0xffdfffff
101314 /* The reset value of the ALT_USB_DEV_DOEPCTL9_STALL register field. */
101315 #define ALT_USB_DEV_DOEPCTL9_STALL_RESET 0x0
101316 /* Extracts the ALT_USB_DEV_DOEPCTL9_STALL field value from a register. */
101317 #define ALT_USB_DEV_DOEPCTL9_STALL_GET(value) (((value) & 0x00200000) >> 21)
101318 /* Produces a ALT_USB_DEV_DOEPCTL9_STALL register field value suitable for setting the register. */
101319 #define ALT_USB_DEV_DOEPCTL9_STALL_SET(value) (((value) << 21) & 0x00200000)
101320 
101321 /*
101322  * Field : Clear NAK - cnak
101323  *
101324  * A write to this bit clears the NAK bit for the endpoint.
101325  *
101326  * Field Enumeration Values:
101327  *
101328  * Enum | Value | Description
101329  * :----------------------------------|:------|:-------------
101330  * ALT_USB_DEV_DOEPCTL9_CNAK_E_INACT | 0x0 | No Clear NAK
101331  * ALT_USB_DEV_DOEPCTL9_CNAK_E_ACT | 0x1 | Clear NAK
101332  *
101333  * Field Access Macros:
101334  *
101335  */
101336 /*
101337  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_CNAK
101338  *
101339  * No Clear NAK
101340  */
101341 #define ALT_USB_DEV_DOEPCTL9_CNAK_E_INACT 0x0
101342 /*
101343  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_CNAK
101344  *
101345  * Clear NAK
101346  */
101347 #define ALT_USB_DEV_DOEPCTL9_CNAK_E_ACT 0x1
101348 
101349 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_CNAK register field. */
101350 #define ALT_USB_DEV_DOEPCTL9_CNAK_LSB 26
101351 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_CNAK register field. */
101352 #define ALT_USB_DEV_DOEPCTL9_CNAK_MSB 26
101353 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_CNAK register field. */
101354 #define ALT_USB_DEV_DOEPCTL9_CNAK_WIDTH 1
101355 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_CNAK register field value. */
101356 #define ALT_USB_DEV_DOEPCTL9_CNAK_SET_MSK 0x04000000
101357 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_CNAK register field value. */
101358 #define ALT_USB_DEV_DOEPCTL9_CNAK_CLR_MSK 0xfbffffff
101359 /* The reset value of the ALT_USB_DEV_DOEPCTL9_CNAK register field. */
101360 #define ALT_USB_DEV_DOEPCTL9_CNAK_RESET 0x0
101361 /* Extracts the ALT_USB_DEV_DOEPCTL9_CNAK field value from a register. */
101362 #define ALT_USB_DEV_DOEPCTL9_CNAK_GET(value) (((value) & 0x04000000) >> 26)
101363 /* Produces a ALT_USB_DEV_DOEPCTL9_CNAK register field value suitable for setting the register. */
101364 #define ALT_USB_DEV_DOEPCTL9_CNAK_SET(value) (((value) << 26) & 0x04000000)
101365 
101366 /*
101367  * Field : Set NAK - snak
101368  *
101369  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
101370  * application can control the transmission of NAK handshakes on an endpoint. The
101371  * core can also Set this bit for an endpoint after a SETUP packet is received on
101372  * that endpoint.
101373  *
101374  * Field Enumeration Values:
101375  *
101376  * Enum | Value | Description
101377  * :----------------------------------|:------|:------------
101378  * ALT_USB_DEV_DOEPCTL9_SNAK_E_INACT | 0x0 | No Set NAK
101379  * ALT_USB_DEV_DOEPCTL9_SNAK_E_ACT | 0x1 | Set NAK
101380  *
101381  * Field Access Macros:
101382  *
101383  */
101384 /*
101385  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_SNAK
101386  *
101387  * No Set NAK
101388  */
101389 #define ALT_USB_DEV_DOEPCTL9_SNAK_E_INACT 0x0
101390 /*
101391  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_SNAK
101392  *
101393  * Set NAK
101394  */
101395 #define ALT_USB_DEV_DOEPCTL9_SNAK_E_ACT 0x1
101396 
101397 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_SNAK register field. */
101398 #define ALT_USB_DEV_DOEPCTL9_SNAK_LSB 27
101399 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_SNAK register field. */
101400 #define ALT_USB_DEV_DOEPCTL9_SNAK_MSB 27
101401 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_SNAK register field. */
101402 #define ALT_USB_DEV_DOEPCTL9_SNAK_WIDTH 1
101403 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_SNAK register field value. */
101404 #define ALT_USB_DEV_DOEPCTL9_SNAK_SET_MSK 0x08000000
101405 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_SNAK register field value. */
101406 #define ALT_USB_DEV_DOEPCTL9_SNAK_CLR_MSK 0xf7ffffff
101407 /* The reset value of the ALT_USB_DEV_DOEPCTL9_SNAK register field. */
101408 #define ALT_USB_DEV_DOEPCTL9_SNAK_RESET 0x0
101409 /* Extracts the ALT_USB_DEV_DOEPCTL9_SNAK field value from a register. */
101410 #define ALT_USB_DEV_DOEPCTL9_SNAK_GET(value) (((value) & 0x08000000) >> 27)
101411 /* Produces a ALT_USB_DEV_DOEPCTL9_SNAK register field value suitable for setting the register. */
101412 #define ALT_USB_DEV_DOEPCTL9_SNAK_SET(value) (((value) << 27) & 0x08000000)
101413 
101414 /*
101415  * Field : Set DATA0 PID - setd0pid
101416  *
101417  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
101418  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
101419  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
101420  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
101421  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
101422  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
101423  * mode is enabled, this field is reserved. The frame number in which to send data
101424  * is in the transmit descriptor structure. The frame in which to receive data is
101425  * updated in receive descriptor structure.
101426  *
101427  * Field Enumeration Values:
101428  *
101429  * Enum | Value | Description
101430  * :-------------------------------------|:------|:------------------------------------
101431  * ALT_USB_DEV_DOEPCTL9_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
101432  * ALT_USB_DEV_DOEPCTL9_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
101433  *
101434  * Field Access Macros:
101435  *
101436  */
101437 /*
101438  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_SETD0PID
101439  *
101440  * Disables Set DATA0 PID
101441  */
101442 #define ALT_USB_DEV_DOEPCTL9_SETD0PID_E_DISD 0x0
101443 /*
101444  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_SETD0PID
101445  *
101446  * Enables Endpoint Data PID to DATA0)
101447  */
101448 #define ALT_USB_DEV_DOEPCTL9_SETD0PID_E_END 0x1
101449 
101450 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_SETD0PID register field. */
101451 #define ALT_USB_DEV_DOEPCTL9_SETD0PID_LSB 28
101452 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_SETD0PID register field. */
101453 #define ALT_USB_DEV_DOEPCTL9_SETD0PID_MSB 28
101454 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_SETD0PID register field. */
101455 #define ALT_USB_DEV_DOEPCTL9_SETD0PID_WIDTH 1
101456 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_SETD0PID register field value. */
101457 #define ALT_USB_DEV_DOEPCTL9_SETD0PID_SET_MSK 0x10000000
101458 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_SETD0PID register field value. */
101459 #define ALT_USB_DEV_DOEPCTL9_SETD0PID_CLR_MSK 0xefffffff
101460 /* The reset value of the ALT_USB_DEV_DOEPCTL9_SETD0PID register field. */
101461 #define ALT_USB_DEV_DOEPCTL9_SETD0PID_RESET 0x0
101462 /* Extracts the ALT_USB_DEV_DOEPCTL9_SETD0PID field value from a register. */
101463 #define ALT_USB_DEV_DOEPCTL9_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
101464 /* Produces a ALT_USB_DEV_DOEPCTL9_SETD0PID register field value suitable for setting the register. */
101465 #define ALT_USB_DEV_DOEPCTL9_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
101466 
101467 /*
101468  * Field : Set DATA1 PID - setd1pid
101469  *
101470  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
101471  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
101472  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
101473  *
101474  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
101475  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
101476  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
101477  *
101478  * Field Enumeration Values:
101479  *
101480  * Enum | Value | Description
101481  * :-------------------------------------|:------|:-----------------------
101482  * ALT_USB_DEV_DOEPCTL9_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
101483  * ALT_USB_DEV_DOEPCTL9_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
101484  *
101485  * Field Access Macros:
101486  *
101487  */
101488 /*
101489  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_SETD1PID
101490  *
101491  * Disables Set DATA1 PID
101492  */
101493 #define ALT_USB_DEV_DOEPCTL9_SETD1PID_E_DISD 0x0
101494 /*
101495  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_SETD1PID
101496  *
101497  * Enables Set DATA1 PID
101498  */
101499 #define ALT_USB_DEV_DOEPCTL9_SETD1PID_E_END 0x1
101500 
101501 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_SETD1PID register field. */
101502 #define ALT_USB_DEV_DOEPCTL9_SETD1PID_LSB 29
101503 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_SETD1PID register field. */
101504 #define ALT_USB_DEV_DOEPCTL9_SETD1PID_MSB 29
101505 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_SETD1PID register field. */
101506 #define ALT_USB_DEV_DOEPCTL9_SETD1PID_WIDTH 1
101507 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_SETD1PID register field value. */
101508 #define ALT_USB_DEV_DOEPCTL9_SETD1PID_SET_MSK 0x20000000
101509 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_SETD1PID register field value. */
101510 #define ALT_USB_DEV_DOEPCTL9_SETD1PID_CLR_MSK 0xdfffffff
101511 /* The reset value of the ALT_USB_DEV_DOEPCTL9_SETD1PID register field. */
101512 #define ALT_USB_DEV_DOEPCTL9_SETD1PID_RESET 0x0
101513 /* Extracts the ALT_USB_DEV_DOEPCTL9_SETD1PID field value from a register. */
101514 #define ALT_USB_DEV_DOEPCTL9_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
101515 /* Produces a ALT_USB_DEV_DOEPCTL9_SETD1PID register field value suitable for setting the register. */
101516 #define ALT_USB_DEV_DOEPCTL9_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
101517 
101518 /*
101519  * Field : Endpoint Disable - epdis
101520  *
101521  * Applies to IN and OUT endpoints. The application sets this bit to stop
101522  * transmitting/receiving data on an endpoint, even before the transfer for that
101523  * endpoint is complete. The application must wait for the Endpoint Disabled
101524  * interrupt before treating the endpoint as disabled. The core clears this bit
101525  * before setting the Endpoint Disabled interrupt. The application must set this
101526  * bit only if Endpoint Enable is already set for this endpoint.
101527  *
101528  * Field Enumeration Values:
101529  *
101530  * Enum | Value | Description
101531  * :-----------------------------------|:------|:--------------------
101532  * ALT_USB_DEV_DOEPCTL9_EPDIS_E_INACT | 0x0 | No Endpoint Disable
101533  * ALT_USB_DEV_DOEPCTL9_EPDIS_E_ACT | 0x1 | Endpoint Disable
101534  *
101535  * Field Access Macros:
101536  *
101537  */
101538 /*
101539  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_EPDIS
101540  *
101541  * No Endpoint Disable
101542  */
101543 #define ALT_USB_DEV_DOEPCTL9_EPDIS_E_INACT 0x0
101544 /*
101545  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_EPDIS
101546  *
101547  * Endpoint Disable
101548  */
101549 #define ALT_USB_DEV_DOEPCTL9_EPDIS_E_ACT 0x1
101550 
101551 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_EPDIS register field. */
101552 #define ALT_USB_DEV_DOEPCTL9_EPDIS_LSB 30
101553 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_EPDIS register field. */
101554 #define ALT_USB_DEV_DOEPCTL9_EPDIS_MSB 30
101555 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_EPDIS register field. */
101556 #define ALT_USB_DEV_DOEPCTL9_EPDIS_WIDTH 1
101557 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_EPDIS register field value. */
101558 #define ALT_USB_DEV_DOEPCTL9_EPDIS_SET_MSK 0x40000000
101559 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_EPDIS register field value. */
101560 #define ALT_USB_DEV_DOEPCTL9_EPDIS_CLR_MSK 0xbfffffff
101561 /* The reset value of the ALT_USB_DEV_DOEPCTL9_EPDIS register field. */
101562 #define ALT_USB_DEV_DOEPCTL9_EPDIS_RESET 0x0
101563 /* Extracts the ALT_USB_DEV_DOEPCTL9_EPDIS field value from a register. */
101564 #define ALT_USB_DEV_DOEPCTL9_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
101565 /* Produces a ALT_USB_DEV_DOEPCTL9_EPDIS register field value suitable for setting the register. */
101566 #define ALT_USB_DEV_DOEPCTL9_EPDIS_SET(value) (((value) << 30) & 0x40000000)
101567 
101568 /*
101569  * Field : Endpoint Enable - epena
101570  *
101571  * Applies to IN and OUT endpoints.
101572  *
101573  * * When Scatter/Gather DMA mode is enabled,
101574  *
101575  * * for IN endpoints this bit indicates that the descriptor structure and data
101576  * buffer with data ready to transmit is setup.
101577  *
101578  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
101579  * receive data is setup.
101580  *
101581  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
101582  * mode:
101583  *
101584  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
101585  * the endpoint.
101586  *
101587  * * for OUT endpoints, this bit indicates that the application has allocated the
101588  * memory to start receiving data from the USB.
101589  *
101590  * * The core clears this bit before setting any of the following interrupts on
101591  * this endpoint:
101592  *
101593  * * SETUP Phase Done
101594  *
101595  * * Endpoint Disabled
101596  *
101597  * * Transfer Completed
101598  *
101599  * for control endpoints in DMA mode, this bit must be set to be able to transfer
101600  * SETUP data packets in memory.
101601  *
101602  * Field Enumeration Values:
101603  *
101604  * Enum | Value | Description
101605  * :-----------------------------------|:------|:-------------------------
101606  * ALT_USB_DEV_DOEPCTL9_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
101607  * ALT_USB_DEV_DOEPCTL9_EPENA_E_ACT | 0x1 | Endpoint Enable active
101608  *
101609  * Field Access Macros:
101610  *
101611  */
101612 /*
101613  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_EPENA
101614  *
101615  * Endpoint Enable inactive
101616  */
101617 #define ALT_USB_DEV_DOEPCTL9_EPENA_E_INACT 0x0
101618 /*
101619  * Enumerated value for register field ALT_USB_DEV_DOEPCTL9_EPENA
101620  *
101621  * Endpoint Enable active
101622  */
101623 #define ALT_USB_DEV_DOEPCTL9_EPENA_E_ACT 0x1
101624 
101625 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL9_EPENA register field. */
101626 #define ALT_USB_DEV_DOEPCTL9_EPENA_LSB 31
101627 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL9_EPENA register field. */
101628 #define ALT_USB_DEV_DOEPCTL9_EPENA_MSB 31
101629 /* The width in bits of the ALT_USB_DEV_DOEPCTL9_EPENA register field. */
101630 #define ALT_USB_DEV_DOEPCTL9_EPENA_WIDTH 1
101631 /* The mask used to set the ALT_USB_DEV_DOEPCTL9_EPENA register field value. */
101632 #define ALT_USB_DEV_DOEPCTL9_EPENA_SET_MSK 0x80000000
101633 /* The mask used to clear the ALT_USB_DEV_DOEPCTL9_EPENA register field value. */
101634 #define ALT_USB_DEV_DOEPCTL9_EPENA_CLR_MSK 0x7fffffff
101635 /* The reset value of the ALT_USB_DEV_DOEPCTL9_EPENA register field. */
101636 #define ALT_USB_DEV_DOEPCTL9_EPENA_RESET 0x0
101637 /* Extracts the ALT_USB_DEV_DOEPCTL9_EPENA field value from a register. */
101638 #define ALT_USB_DEV_DOEPCTL9_EPENA_GET(value) (((value) & 0x80000000) >> 31)
101639 /* Produces a ALT_USB_DEV_DOEPCTL9_EPENA register field value suitable for setting the register. */
101640 #define ALT_USB_DEV_DOEPCTL9_EPENA_SET(value) (((value) << 31) & 0x80000000)
101641 
101642 #ifndef __ASSEMBLY__
101643 /*
101644  * WARNING: The C register and register group struct declarations are provided for
101645  * convenience and illustrative purposes. They should, however, be used with
101646  * caution as the C language standard provides no guarantees about the alignment or
101647  * atomicity of device memory accesses. The recommended practice for writing
101648  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
101649  * alt_write_word() functions.
101650  *
101651  * The struct declaration for register ALT_USB_DEV_DOEPCTL9.
101652  */
101653 struct ALT_USB_DEV_DOEPCTL9_s
101654 {
101655  uint32_t mps : 11; /* Maximum Packet Size */
101656  uint32_t : 4; /* *UNDEFINED* */
101657  uint32_t usbactep : 1; /* USB Active Endpoint */
101658  const uint32_t dpid : 1; /* Endpoint Data PID */
101659  const uint32_t naksts : 1; /* NAK Status */
101660  uint32_t eptype : 2; /* Endpoint Type */
101661  uint32_t snp : 1; /* Snoop Mode */
101662  const uint32_t stall : 1; /* STALL Handshake */
101663  uint32_t : 4; /* *UNDEFINED* */
101664  uint32_t cnak : 1; /* Clear NAK */
101665  uint32_t snak : 1; /* Set NAK */
101666  uint32_t setd0pid : 1; /* Set DATA0 PID */
101667  uint32_t setd1pid : 1; /* Set DATA1 PID */
101668  const uint32_t epdis : 1; /* Endpoint Disable */
101669  const uint32_t epena : 1; /* Endpoint Enable */
101670 };
101671 
101672 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL9. */
101673 typedef volatile struct ALT_USB_DEV_DOEPCTL9_s ALT_USB_DEV_DOEPCTL9_t;
101674 #endif /* __ASSEMBLY__ */
101675 
101676 /* The byte offset of the ALT_USB_DEV_DOEPCTL9 register from the beginning of the component. */
101677 #define ALT_USB_DEV_DOEPCTL9_OFST 0x420
101678 /* The address of the ALT_USB_DEV_DOEPCTL9 register. */
101679 #define ALT_USB_DEV_DOEPCTL9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL9_OFST))
101680 
101681 /*
101682  * Register : Device OUT Endpoint 9 Interrupt Register - doepint9
101683  *
101684  * This register indicates the status of an endpoint with respect to USB- and AHB-
101685  * related events. The application must read this register when the OUT Endpoints
101686  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
101687  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
101688  * can read this register, it must first read the Device All Endpoints Interrupt
101689  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
101690  * Interrupt register. The application must clear the appropriate bit in this
101691  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
101692  *
101693  * Register Layout
101694  *
101695  * Bits | Access | Reset | Description
101696  * :--------|:-------|:------|:------------------------------------------
101697  * [0] | R | 0x0 | Transfer Completed Interrupt
101698  * [1] | R | 0x0 | Endpoint Disabled Interrupt
101699  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT9_AHBERR
101700  * [3] | R | 0x0 | SETUP Phase Done
101701  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
101702  * [5] | R | 0x0 | Status Phase Received for Control Write
101703  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
101704  * [7] | ??? | 0x0 | *UNDEFINED*
101705  * [8] | R | 0x0 | OUT Packet Error
101706  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
101707  * [10] | ??? | 0x0 | *UNDEFINED*
101708  * [11] | R | 0x0 | Packet Drop Status
101709  * [12] | R | 0x0 | BbleErr Interrupt
101710  * [13] | R | 0x0 | NAK Interrupt
101711  * [14] | R | 0x0 | NYET Interrupt
101712  * [31:15] | ??? | 0x0 | *UNDEFINED*
101713  *
101714  */
101715 /*
101716  * Field : Transfer Completed Interrupt - xfercompl
101717  *
101718  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
101719  *
101720  * This field indicates that the requested data from the internal FIFO is moved to
101721  * external system memory. This interrupt is generated only when the corresponding
101722  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
101723  * is Set.
101724  *
101725  * When Scatter/Gather DMA mode is disabled, this field indicates that the
101726  * programmed transfer is complete on the AHB as well as on the USB, for this
101727  * endpoint.
101728  *
101729  * Field Enumeration Values:
101730  *
101731  * Enum | Value | Description
101732  * :---------------------------------------|:------|:-----------------------------
101733  * ALT_USB_DEV_DOEPINT9_XFERCOMPL_E_INACT | 0x0 | No Interrupt
101734  * ALT_USB_DEV_DOEPINT9_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
101735  *
101736  * Field Access Macros:
101737  *
101738  */
101739 /*
101740  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_XFERCOMPL
101741  *
101742  * No Interrupt
101743  */
101744 #define ALT_USB_DEV_DOEPINT9_XFERCOMPL_E_INACT 0x0
101745 /*
101746  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_XFERCOMPL
101747  *
101748  * Transfer Completed Interrupt
101749  */
101750 #define ALT_USB_DEV_DOEPINT9_XFERCOMPL_E_ACT 0x1
101751 
101752 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_XFERCOMPL register field. */
101753 #define ALT_USB_DEV_DOEPINT9_XFERCOMPL_LSB 0
101754 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_XFERCOMPL register field. */
101755 #define ALT_USB_DEV_DOEPINT9_XFERCOMPL_MSB 0
101756 /* The width in bits of the ALT_USB_DEV_DOEPINT9_XFERCOMPL register field. */
101757 #define ALT_USB_DEV_DOEPINT9_XFERCOMPL_WIDTH 1
101758 /* The mask used to set the ALT_USB_DEV_DOEPINT9_XFERCOMPL register field value. */
101759 #define ALT_USB_DEV_DOEPINT9_XFERCOMPL_SET_MSK 0x00000001
101760 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_XFERCOMPL register field value. */
101761 #define ALT_USB_DEV_DOEPINT9_XFERCOMPL_CLR_MSK 0xfffffffe
101762 /* The reset value of the ALT_USB_DEV_DOEPINT9_XFERCOMPL register field. */
101763 #define ALT_USB_DEV_DOEPINT9_XFERCOMPL_RESET 0x0
101764 /* Extracts the ALT_USB_DEV_DOEPINT9_XFERCOMPL field value from a register. */
101765 #define ALT_USB_DEV_DOEPINT9_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
101766 /* Produces a ALT_USB_DEV_DOEPINT9_XFERCOMPL register field value suitable for setting the register. */
101767 #define ALT_USB_DEV_DOEPINT9_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
101768 
101769 /*
101770  * Field : Endpoint Disabled Interrupt - epdisbld
101771  *
101772  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
101773  * disabled per the application's request.
101774  *
101775  * Field Enumeration Values:
101776  *
101777  * Enum | Value | Description
101778  * :--------------------------------------|:------|:----------------------------
101779  * ALT_USB_DEV_DOEPINT9_EPDISBLD_E_INACT | 0x0 | No Interrupt
101780  * ALT_USB_DEV_DOEPINT9_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
101781  *
101782  * Field Access Macros:
101783  *
101784  */
101785 /*
101786  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_EPDISBLD
101787  *
101788  * No Interrupt
101789  */
101790 #define ALT_USB_DEV_DOEPINT9_EPDISBLD_E_INACT 0x0
101791 /*
101792  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_EPDISBLD
101793  *
101794  * Endpoint Disabled Interrupt
101795  */
101796 #define ALT_USB_DEV_DOEPINT9_EPDISBLD_E_ACT 0x1
101797 
101798 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_EPDISBLD register field. */
101799 #define ALT_USB_DEV_DOEPINT9_EPDISBLD_LSB 1
101800 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_EPDISBLD register field. */
101801 #define ALT_USB_DEV_DOEPINT9_EPDISBLD_MSB 1
101802 /* The width in bits of the ALT_USB_DEV_DOEPINT9_EPDISBLD register field. */
101803 #define ALT_USB_DEV_DOEPINT9_EPDISBLD_WIDTH 1
101804 /* The mask used to set the ALT_USB_DEV_DOEPINT9_EPDISBLD register field value. */
101805 #define ALT_USB_DEV_DOEPINT9_EPDISBLD_SET_MSK 0x00000002
101806 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_EPDISBLD register field value. */
101807 #define ALT_USB_DEV_DOEPINT9_EPDISBLD_CLR_MSK 0xfffffffd
101808 /* The reset value of the ALT_USB_DEV_DOEPINT9_EPDISBLD register field. */
101809 #define ALT_USB_DEV_DOEPINT9_EPDISBLD_RESET 0x0
101810 /* Extracts the ALT_USB_DEV_DOEPINT9_EPDISBLD field value from a register. */
101811 #define ALT_USB_DEV_DOEPINT9_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
101812 /* Produces a ALT_USB_DEV_DOEPINT9_EPDISBLD register field value suitable for setting the register. */
101813 #define ALT_USB_DEV_DOEPINT9_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
101814 
101815 /*
101816  * Field : ahberr
101817  *
101818  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
101819  * there is an AHB error during an AHB read/write. The application can read the
101820  * corresponding endpoint DMA address register to get the error address.
101821  *
101822  * Field Enumeration Values:
101823  *
101824  * Enum | Value | Description
101825  * :------------------------------------|:------|:--------------------
101826  * ALT_USB_DEV_DOEPINT9_AHBERR_E_INACT | 0x0 | No Interrupt
101827  * ALT_USB_DEV_DOEPINT9_AHBERR_E_ACT | 0x1 | AHB Error interrupt
101828  *
101829  * Field Access Macros:
101830  *
101831  */
101832 /*
101833  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_AHBERR
101834  *
101835  * No Interrupt
101836  */
101837 #define ALT_USB_DEV_DOEPINT9_AHBERR_E_INACT 0x0
101838 /*
101839  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_AHBERR
101840  *
101841  * AHB Error interrupt
101842  */
101843 #define ALT_USB_DEV_DOEPINT9_AHBERR_E_ACT 0x1
101844 
101845 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_AHBERR register field. */
101846 #define ALT_USB_DEV_DOEPINT9_AHBERR_LSB 2
101847 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_AHBERR register field. */
101848 #define ALT_USB_DEV_DOEPINT9_AHBERR_MSB 2
101849 /* The width in bits of the ALT_USB_DEV_DOEPINT9_AHBERR register field. */
101850 #define ALT_USB_DEV_DOEPINT9_AHBERR_WIDTH 1
101851 /* The mask used to set the ALT_USB_DEV_DOEPINT9_AHBERR register field value. */
101852 #define ALT_USB_DEV_DOEPINT9_AHBERR_SET_MSK 0x00000004
101853 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_AHBERR register field value. */
101854 #define ALT_USB_DEV_DOEPINT9_AHBERR_CLR_MSK 0xfffffffb
101855 /* The reset value of the ALT_USB_DEV_DOEPINT9_AHBERR register field. */
101856 #define ALT_USB_DEV_DOEPINT9_AHBERR_RESET 0x0
101857 /* Extracts the ALT_USB_DEV_DOEPINT9_AHBERR field value from a register. */
101858 #define ALT_USB_DEV_DOEPINT9_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
101859 /* Produces a ALT_USB_DEV_DOEPINT9_AHBERR register field value suitable for setting the register. */
101860 #define ALT_USB_DEV_DOEPINT9_AHBERR_SET(value) (((value) << 2) & 0x00000004)
101861 
101862 /*
101863  * Field : SETUP Phase Done - setup
101864  *
101865  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
101866  * control endpoint is complete and no more back-to-back SETUP packets were
101867  * received for the current control transfer. On this interrupt, the application
101868  * can decode the received SETUP data packet.
101869  *
101870  * Field Enumeration Values:
101871  *
101872  * Enum | Value | Description
101873  * :-----------------------------------|:------|:--------------------
101874  * ALT_USB_DEV_DOEPINT9_SETUP_E_INACT | 0x0 | No SETUP Phase Done
101875  * ALT_USB_DEV_DOEPINT9_SETUP_E_ACT | 0x1 | SETUP Phase Done
101876  *
101877  * Field Access Macros:
101878  *
101879  */
101880 /*
101881  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_SETUP
101882  *
101883  * No SETUP Phase Done
101884  */
101885 #define ALT_USB_DEV_DOEPINT9_SETUP_E_INACT 0x0
101886 /*
101887  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_SETUP
101888  *
101889  * SETUP Phase Done
101890  */
101891 #define ALT_USB_DEV_DOEPINT9_SETUP_E_ACT 0x1
101892 
101893 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_SETUP register field. */
101894 #define ALT_USB_DEV_DOEPINT9_SETUP_LSB 3
101895 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_SETUP register field. */
101896 #define ALT_USB_DEV_DOEPINT9_SETUP_MSB 3
101897 /* The width in bits of the ALT_USB_DEV_DOEPINT9_SETUP register field. */
101898 #define ALT_USB_DEV_DOEPINT9_SETUP_WIDTH 1
101899 /* The mask used to set the ALT_USB_DEV_DOEPINT9_SETUP register field value. */
101900 #define ALT_USB_DEV_DOEPINT9_SETUP_SET_MSK 0x00000008
101901 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_SETUP register field value. */
101902 #define ALT_USB_DEV_DOEPINT9_SETUP_CLR_MSK 0xfffffff7
101903 /* The reset value of the ALT_USB_DEV_DOEPINT9_SETUP register field. */
101904 #define ALT_USB_DEV_DOEPINT9_SETUP_RESET 0x0
101905 /* Extracts the ALT_USB_DEV_DOEPINT9_SETUP field value from a register. */
101906 #define ALT_USB_DEV_DOEPINT9_SETUP_GET(value) (((value) & 0x00000008) >> 3)
101907 /* Produces a ALT_USB_DEV_DOEPINT9_SETUP register field value suitable for setting the register. */
101908 #define ALT_USB_DEV_DOEPINT9_SETUP_SET(value) (((value) << 3) & 0x00000008)
101909 
101910 /*
101911  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
101912  *
101913  * Applies only to control OUT endpoints. Indicates that an OUT token was received
101914  * when the endpoint was not yet enabled. This interrupt is asserted on the
101915  * endpoint for which the OUT token was received.
101916  *
101917  * Field Enumeration Values:
101918  *
101919  * Enum | Value | Description
101920  * :-----------------------------------------|:------|:---------------------------------------------
101921  * ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
101922  * ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
101923  *
101924  * Field Access Macros:
101925  *
101926  */
101927 /*
101928  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS
101929  *
101930  * No OUT Token Received When Endpoint Disabled
101931  */
101932 #define ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS_E_INACT 0x0
101933 /*
101934  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS
101935  *
101936  * OUT Token Received When Endpoint Disabled
101937  */
101938 #define ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS_E_ACT 0x1
101939 
101940 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS register field. */
101941 #define ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS_LSB 4
101942 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS register field. */
101943 #define ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS_MSB 4
101944 /* The width in bits of the ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS register field. */
101945 #define ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS_WIDTH 1
101946 /* The mask used to set the ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS register field value. */
101947 #define ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS_SET_MSK 0x00000010
101948 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS register field value. */
101949 #define ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS_CLR_MSK 0xffffffef
101950 /* The reset value of the ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS register field. */
101951 #define ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS_RESET 0x0
101952 /* Extracts the ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS field value from a register. */
101953 #define ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
101954 /* Produces a ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS register field value suitable for setting the register. */
101955 #define ALT_USB_DEV_DOEPINT9_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
101956 
101957 /*
101958  * Field : Status Phase Received for Control Write - stsphsercvd
101959  *
101960  * This interrupt is valid only for Control OUT endpoints and only in Scatter
101961  * Gather DMA mode. This interrupt is generated only after the core has transferred
101962  * all the data that the host has sent during the data phase of a control write
101963  * transfer, to the system memory buffer. The interrupt indicates to the
101964  * application that the host has switched from data phase to the status phase of a
101965  * Control Write transfer. The application can use this interrupt to ACK or STALL
101966  * the Status phase, after it has decoded the data phase. This is applicable only
101967  * in Case of Scatter Gather DMA mode.
101968  *
101969  * Field Enumeration Values:
101970  *
101971  * Enum | Value | Description
101972  * :-----------------------------------------|:------|:-------------------------------------------
101973  * ALT_USB_DEV_DOEPINT9_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
101974  * ALT_USB_DEV_DOEPINT9_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
101975  *
101976  * Field Access Macros:
101977  *
101978  */
101979 /*
101980  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_STSPHSERCVD
101981  *
101982  * No Status Phase Received for Control Write
101983  */
101984 #define ALT_USB_DEV_DOEPINT9_STSPHSERCVD_E_INACT 0x0
101985 /*
101986  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_STSPHSERCVD
101987  *
101988  * Status Phase Received for Control Write
101989  */
101990 #define ALT_USB_DEV_DOEPINT9_STSPHSERCVD_E_ACT 0x1
101991 
101992 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_STSPHSERCVD register field. */
101993 #define ALT_USB_DEV_DOEPINT9_STSPHSERCVD_LSB 5
101994 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_STSPHSERCVD register field. */
101995 #define ALT_USB_DEV_DOEPINT9_STSPHSERCVD_MSB 5
101996 /* The width in bits of the ALT_USB_DEV_DOEPINT9_STSPHSERCVD register field. */
101997 #define ALT_USB_DEV_DOEPINT9_STSPHSERCVD_WIDTH 1
101998 /* The mask used to set the ALT_USB_DEV_DOEPINT9_STSPHSERCVD register field value. */
101999 #define ALT_USB_DEV_DOEPINT9_STSPHSERCVD_SET_MSK 0x00000020
102000 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_STSPHSERCVD register field value. */
102001 #define ALT_USB_DEV_DOEPINT9_STSPHSERCVD_CLR_MSK 0xffffffdf
102002 /* The reset value of the ALT_USB_DEV_DOEPINT9_STSPHSERCVD register field. */
102003 #define ALT_USB_DEV_DOEPINT9_STSPHSERCVD_RESET 0x0
102004 /* Extracts the ALT_USB_DEV_DOEPINT9_STSPHSERCVD field value from a register. */
102005 #define ALT_USB_DEV_DOEPINT9_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
102006 /* Produces a ALT_USB_DEV_DOEPINT9_STSPHSERCVD register field value suitable for setting the register. */
102007 #define ALT_USB_DEV_DOEPINT9_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
102008 
102009 /*
102010  * Field : Back-to-Back SETUP Packets Received - back2backsetup
102011  *
102012  * Applies to Control OUT endpoints only. This bit indicates that the core has
102013  * received more than three back-to-back SETUP packets for this particular
102014  * endpoint. for information about handling this interrupt,
102015  *
102016  * Field Enumeration Values:
102017  *
102018  * Enum | Value | Description
102019  * :--------------------------------------------|:------|:---------------------------------------
102020  * ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
102021  * ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
102022  *
102023  * Field Access Macros:
102024  *
102025  */
102026 /*
102027  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP
102028  *
102029  * No Back-to-Back SETUP Packets Received
102030  */
102031 #define ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP_E_INACT 0x0
102032 /*
102033  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP
102034  *
102035  * Back-to-Back SETUP Packets Received
102036  */
102037 #define ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP_E_ACT 0x1
102038 
102039 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP register field. */
102040 #define ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP_LSB 6
102041 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP register field. */
102042 #define ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP_MSB 6
102043 /* The width in bits of the ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP register field. */
102044 #define ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP_WIDTH 1
102045 /* The mask used to set the ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP register field value. */
102046 #define ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP_SET_MSK 0x00000040
102047 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP register field value. */
102048 #define ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP_CLR_MSK 0xffffffbf
102049 /* The reset value of the ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP register field. */
102050 #define ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP_RESET 0x0
102051 /* Extracts the ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP field value from a register. */
102052 #define ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
102053 /* Produces a ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP register field value suitable for setting the register. */
102054 #define ALT_USB_DEV_DOEPINT9_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
102055 
102056 /*
102057  * Field : OUT Packet Error - outpkterr
102058  *
102059  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
102060  * an overflow or a CRC error for non-Isochronous OUT packet.
102061  *
102062  * Field Enumeration Values:
102063  *
102064  * Enum | Value | Description
102065  * :---------------------------------------|:------|:--------------------
102066  * ALT_USB_DEV_DOEPINT9_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
102067  * ALT_USB_DEV_DOEPINT9_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
102068  *
102069  * Field Access Macros:
102070  *
102071  */
102072 /*
102073  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_OUTPKTERR
102074  *
102075  * No OUT Packet Error
102076  */
102077 #define ALT_USB_DEV_DOEPINT9_OUTPKTERR_E_INACT 0x0
102078 /*
102079  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_OUTPKTERR
102080  *
102081  * OUT Packet Error
102082  */
102083 #define ALT_USB_DEV_DOEPINT9_OUTPKTERR_E_ACT 0x1
102084 
102085 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_OUTPKTERR register field. */
102086 #define ALT_USB_DEV_DOEPINT9_OUTPKTERR_LSB 8
102087 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_OUTPKTERR register field. */
102088 #define ALT_USB_DEV_DOEPINT9_OUTPKTERR_MSB 8
102089 /* The width in bits of the ALT_USB_DEV_DOEPINT9_OUTPKTERR register field. */
102090 #define ALT_USB_DEV_DOEPINT9_OUTPKTERR_WIDTH 1
102091 /* The mask used to set the ALT_USB_DEV_DOEPINT9_OUTPKTERR register field value. */
102092 #define ALT_USB_DEV_DOEPINT9_OUTPKTERR_SET_MSK 0x00000100
102093 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_OUTPKTERR register field value. */
102094 #define ALT_USB_DEV_DOEPINT9_OUTPKTERR_CLR_MSK 0xfffffeff
102095 /* The reset value of the ALT_USB_DEV_DOEPINT9_OUTPKTERR register field. */
102096 #define ALT_USB_DEV_DOEPINT9_OUTPKTERR_RESET 0x0
102097 /* Extracts the ALT_USB_DEV_DOEPINT9_OUTPKTERR field value from a register. */
102098 #define ALT_USB_DEV_DOEPINT9_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
102099 /* Produces a ALT_USB_DEV_DOEPINT9_OUTPKTERR register field value suitable for setting the register. */
102100 #define ALT_USB_DEV_DOEPINT9_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
102101 
102102 /*
102103  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
102104  *
102105  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
102106  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
102107  * the descriptor accessed is not ready for the Core to process, such as Host busy
102108  * or DMA done
102109  *
102110  * Field Enumeration Values:
102111  *
102112  * Enum | Value | Description
102113  * :-------------------------------------|:------|:--------------
102114  * ALT_USB_DEV_DOEPINT9_BNAINTR_E_INACT | 0x0 | No interrupt
102115  * ALT_USB_DEV_DOEPINT9_BNAINTR_E_ACT | 0x1 | BNA interrupt
102116  *
102117  * Field Access Macros:
102118  *
102119  */
102120 /*
102121  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_BNAINTR
102122  *
102123  * No interrupt
102124  */
102125 #define ALT_USB_DEV_DOEPINT9_BNAINTR_E_INACT 0x0
102126 /*
102127  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_BNAINTR
102128  *
102129  * BNA interrupt
102130  */
102131 #define ALT_USB_DEV_DOEPINT9_BNAINTR_E_ACT 0x1
102132 
102133 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_BNAINTR register field. */
102134 #define ALT_USB_DEV_DOEPINT9_BNAINTR_LSB 9
102135 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_BNAINTR register field. */
102136 #define ALT_USB_DEV_DOEPINT9_BNAINTR_MSB 9
102137 /* The width in bits of the ALT_USB_DEV_DOEPINT9_BNAINTR register field. */
102138 #define ALT_USB_DEV_DOEPINT9_BNAINTR_WIDTH 1
102139 /* The mask used to set the ALT_USB_DEV_DOEPINT9_BNAINTR register field value. */
102140 #define ALT_USB_DEV_DOEPINT9_BNAINTR_SET_MSK 0x00000200
102141 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_BNAINTR register field value. */
102142 #define ALT_USB_DEV_DOEPINT9_BNAINTR_CLR_MSK 0xfffffdff
102143 /* The reset value of the ALT_USB_DEV_DOEPINT9_BNAINTR register field. */
102144 #define ALT_USB_DEV_DOEPINT9_BNAINTR_RESET 0x0
102145 /* Extracts the ALT_USB_DEV_DOEPINT9_BNAINTR field value from a register. */
102146 #define ALT_USB_DEV_DOEPINT9_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
102147 /* Produces a ALT_USB_DEV_DOEPINT9_BNAINTR register field value suitable for setting the register. */
102148 #define ALT_USB_DEV_DOEPINT9_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
102149 
102150 /*
102151  * Field : Packet Drop Status - pktdrpsts
102152  *
102153  * This bit indicates to the application that an ISOC OUT packet has been dropped.
102154  * This bit does not have an associated mask bit and does not generate an
102155  * interrupt.
102156  *
102157  * Field Enumeration Values:
102158  *
102159  * Enum | Value | Description
102160  * :---------------------------------------|:------|:-----------------------------
102161  * ALT_USB_DEV_DOEPINT9_PKTDRPSTS_E_INACT | 0x0 | No interrupt
102162  * ALT_USB_DEV_DOEPINT9_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
102163  *
102164  * Field Access Macros:
102165  *
102166  */
102167 /*
102168  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_PKTDRPSTS
102169  *
102170  * No interrupt
102171  */
102172 #define ALT_USB_DEV_DOEPINT9_PKTDRPSTS_E_INACT 0x0
102173 /*
102174  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_PKTDRPSTS
102175  *
102176  * Packet Drop Status interrupt
102177  */
102178 #define ALT_USB_DEV_DOEPINT9_PKTDRPSTS_E_ACT 0x1
102179 
102180 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_PKTDRPSTS register field. */
102181 #define ALT_USB_DEV_DOEPINT9_PKTDRPSTS_LSB 11
102182 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_PKTDRPSTS register field. */
102183 #define ALT_USB_DEV_DOEPINT9_PKTDRPSTS_MSB 11
102184 /* The width in bits of the ALT_USB_DEV_DOEPINT9_PKTDRPSTS register field. */
102185 #define ALT_USB_DEV_DOEPINT9_PKTDRPSTS_WIDTH 1
102186 /* The mask used to set the ALT_USB_DEV_DOEPINT9_PKTDRPSTS register field value. */
102187 #define ALT_USB_DEV_DOEPINT9_PKTDRPSTS_SET_MSK 0x00000800
102188 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_PKTDRPSTS register field value. */
102189 #define ALT_USB_DEV_DOEPINT9_PKTDRPSTS_CLR_MSK 0xfffff7ff
102190 /* The reset value of the ALT_USB_DEV_DOEPINT9_PKTDRPSTS register field. */
102191 #define ALT_USB_DEV_DOEPINT9_PKTDRPSTS_RESET 0x0
102192 /* Extracts the ALT_USB_DEV_DOEPINT9_PKTDRPSTS field value from a register. */
102193 #define ALT_USB_DEV_DOEPINT9_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
102194 /* Produces a ALT_USB_DEV_DOEPINT9_PKTDRPSTS register field value suitable for setting the register. */
102195 #define ALT_USB_DEV_DOEPINT9_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
102196 
102197 /*
102198  * Field : BbleErr Interrupt - bbleerr
102199  *
102200  * The core generates this interrupt when babble is received for the endpoint.
102201  *
102202  * Field Enumeration Values:
102203  *
102204  * Enum | Value | Description
102205  * :-------------------------------------|:------|:------------------
102206  * ALT_USB_DEV_DOEPINT9_BBLEERR_E_INACT | 0x0 | No interrupt
102207  * ALT_USB_DEV_DOEPINT9_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
102208  *
102209  * Field Access Macros:
102210  *
102211  */
102212 /*
102213  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_BBLEERR
102214  *
102215  * No interrupt
102216  */
102217 #define ALT_USB_DEV_DOEPINT9_BBLEERR_E_INACT 0x0
102218 /*
102219  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_BBLEERR
102220  *
102221  * BbleErr interrupt
102222  */
102223 #define ALT_USB_DEV_DOEPINT9_BBLEERR_E_ACT 0x1
102224 
102225 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_BBLEERR register field. */
102226 #define ALT_USB_DEV_DOEPINT9_BBLEERR_LSB 12
102227 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_BBLEERR register field. */
102228 #define ALT_USB_DEV_DOEPINT9_BBLEERR_MSB 12
102229 /* The width in bits of the ALT_USB_DEV_DOEPINT9_BBLEERR register field. */
102230 #define ALT_USB_DEV_DOEPINT9_BBLEERR_WIDTH 1
102231 /* The mask used to set the ALT_USB_DEV_DOEPINT9_BBLEERR register field value. */
102232 #define ALT_USB_DEV_DOEPINT9_BBLEERR_SET_MSK 0x00001000
102233 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_BBLEERR register field value. */
102234 #define ALT_USB_DEV_DOEPINT9_BBLEERR_CLR_MSK 0xffffefff
102235 /* The reset value of the ALT_USB_DEV_DOEPINT9_BBLEERR register field. */
102236 #define ALT_USB_DEV_DOEPINT9_BBLEERR_RESET 0x0
102237 /* Extracts the ALT_USB_DEV_DOEPINT9_BBLEERR field value from a register. */
102238 #define ALT_USB_DEV_DOEPINT9_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
102239 /* Produces a ALT_USB_DEV_DOEPINT9_BBLEERR register field value suitable for setting the register. */
102240 #define ALT_USB_DEV_DOEPINT9_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
102241 
102242 /*
102243  * Field : NAK Interrupt - nakintrpt
102244  *
102245  * The core generates this interrupt when a NAK is transmitted or received by the
102246  * device. In case of isochronous IN endpoints the interrupt gets generated when a
102247  * zero length packet is transmitted due to un-availability of data in the TXFifo.
102248  *
102249  * Field Enumeration Values:
102250  *
102251  * Enum | Value | Description
102252  * :---------------------------------------|:------|:--------------
102253  * ALT_USB_DEV_DOEPINT9_NAKINTRPT_E_INACT | 0x0 | No interrupt
102254  * ALT_USB_DEV_DOEPINT9_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
102255  *
102256  * Field Access Macros:
102257  *
102258  */
102259 /*
102260  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_NAKINTRPT
102261  *
102262  * No interrupt
102263  */
102264 #define ALT_USB_DEV_DOEPINT9_NAKINTRPT_E_INACT 0x0
102265 /*
102266  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_NAKINTRPT
102267  *
102268  * NAK Interrupt
102269  */
102270 #define ALT_USB_DEV_DOEPINT9_NAKINTRPT_E_ACT 0x1
102271 
102272 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_NAKINTRPT register field. */
102273 #define ALT_USB_DEV_DOEPINT9_NAKINTRPT_LSB 13
102274 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_NAKINTRPT register field. */
102275 #define ALT_USB_DEV_DOEPINT9_NAKINTRPT_MSB 13
102276 /* The width in bits of the ALT_USB_DEV_DOEPINT9_NAKINTRPT register field. */
102277 #define ALT_USB_DEV_DOEPINT9_NAKINTRPT_WIDTH 1
102278 /* The mask used to set the ALT_USB_DEV_DOEPINT9_NAKINTRPT register field value. */
102279 #define ALT_USB_DEV_DOEPINT9_NAKINTRPT_SET_MSK 0x00002000
102280 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_NAKINTRPT register field value. */
102281 #define ALT_USB_DEV_DOEPINT9_NAKINTRPT_CLR_MSK 0xffffdfff
102282 /* The reset value of the ALT_USB_DEV_DOEPINT9_NAKINTRPT register field. */
102283 #define ALT_USB_DEV_DOEPINT9_NAKINTRPT_RESET 0x0
102284 /* Extracts the ALT_USB_DEV_DOEPINT9_NAKINTRPT field value from a register. */
102285 #define ALT_USB_DEV_DOEPINT9_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
102286 /* Produces a ALT_USB_DEV_DOEPINT9_NAKINTRPT register field value suitable for setting the register. */
102287 #define ALT_USB_DEV_DOEPINT9_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
102288 
102289 /*
102290  * Field : NYET Interrupt - nyetintrpt
102291  *
102292  * The core generates this interrupt when a NYET response is transmitted for a non
102293  * isochronous OUT endpoint.
102294  *
102295  * Field Enumeration Values:
102296  *
102297  * Enum | Value | Description
102298  * :----------------------------------------|:------|:---------------
102299  * ALT_USB_DEV_DOEPINT9_NYETINTRPT_E_INACT | 0x0 | No interrupt
102300  * ALT_USB_DEV_DOEPINT9_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
102301  *
102302  * Field Access Macros:
102303  *
102304  */
102305 /*
102306  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_NYETINTRPT
102307  *
102308  * No interrupt
102309  */
102310 #define ALT_USB_DEV_DOEPINT9_NYETINTRPT_E_INACT 0x0
102311 /*
102312  * Enumerated value for register field ALT_USB_DEV_DOEPINT9_NYETINTRPT
102313  *
102314  * NYET Interrupt
102315  */
102316 #define ALT_USB_DEV_DOEPINT9_NYETINTRPT_E_ACT 0x1
102317 
102318 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT9_NYETINTRPT register field. */
102319 #define ALT_USB_DEV_DOEPINT9_NYETINTRPT_LSB 14
102320 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT9_NYETINTRPT register field. */
102321 #define ALT_USB_DEV_DOEPINT9_NYETINTRPT_MSB 14
102322 /* The width in bits of the ALT_USB_DEV_DOEPINT9_NYETINTRPT register field. */
102323 #define ALT_USB_DEV_DOEPINT9_NYETINTRPT_WIDTH 1
102324 /* The mask used to set the ALT_USB_DEV_DOEPINT9_NYETINTRPT register field value. */
102325 #define ALT_USB_DEV_DOEPINT9_NYETINTRPT_SET_MSK 0x00004000
102326 /* The mask used to clear the ALT_USB_DEV_DOEPINT9_NYETINTRPT register field value. */
102327 #define ALT_USB_DEV_DOEPINT9_NYETINTRPT_CLR_MSK 0xffffbfff
102328 /* The reset value of the ALT_USB_DEV_DOEPINT9_NYETINTRPT register field. */
102329 #define ALT_USB_DEV_DOEPINT9_NYETINTRPT_RESET 0x0
102330 /* Extracts the ALT_USB_DEV_DOEPINT9_NYETINTRPT field value from a register. */
102331 #define ALT_USB_DEV_DOEPINT9_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
102332 /* Produces a ALT_USB_DEV_DOEPINT9_NYETINTRPT register field value suitable for setting the register. */
102333 #define ALT_USB_DEV_DOEPINT9_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
102334 
102335 #ifndef __ASSEMBLY__
102336 /*
102337  * WARNING: The C register and register group struct declarations are provided for
102338  * convenience and illustrative purposes. They should, however, be used with
102339  * caution as the C language standard provides no guarantees about the alignment or
102340  * atomicity of device memory accesses. The recommended practice for writing
102341  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
102342  * alt_write_word() functions.
102343  *
102344  * The struct declaration for register ALT_USB_DEV_DOEPINT9.
102345  */
102346 struct ALT_USB_DEV_DOEPINT9_s
102347 {
102348  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
102349  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
102350  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT9_AHBERR */
102351  const uint32_t setup : 1; /* SETUP Phase Done */
102352  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
102353  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
102354  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
102355  uint32_t : 1; /* *UNDEFINED* */
102356  const uint32_t outpkterr : 1; /* OUT Packet Error */
102357  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
102358  uint32_t : 1; /* *UNDEFINED* */
102359  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
102360  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
102361  const uint32_t nakintrpt : 1; /* NAK Interrupt */
102362  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
102363  uint32_t : 17; /* *UNDEFINED* */
102364 };
102365 
102366 /* The typedef declaration for register ALT_USB_DEV_DOEPINT9. */
102367 typedef volatile struct ALT_USB_DEV_DOEPINT9_s ALT_USB_DEV_DOEPINT9_t;
102368 #endif /* __ASSEMBLY__ */
102369 
102370 /* The byte offset of the ALT_USB_DEV_DOEPINT9 register from the beginning of the component. */
102371 #define ALT_USB_DEV_DOEPINT9_OFST 0x428
102372 /* The address of the ALT_USB_DEV_DOEPINT9 register. */
102373 #define ALT_USB_DEV_DOEPINT9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT9_OFST))
102374 
102375 /*
102376  * Register : Device OUT Endpoint 9 Transfer Size Register - doeptsiz9
102377  *
102378  * The application must modify this register before enabling the endpoint. Once the
102379  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
102380  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
102381  * application can only read this register once the core has cleared the Endpoint
102382  * Enable bit.
102383  *
102384  * Register Layout
102385  *
102386  * Bits | Access | Reset | Description
102387  * :--------|:-------|:------|:-------------------
102388  * [18:0] | RW | 0x0 | Transfer Size
102389  * [28:19] | RW | 0x0 | Packet Count
102390  * [30:29] | R | 0x0 | SETUP Packet Count
102391  * [31] | ??? | 0x0 | *UNDEFINED*
102392  *
102393  */
102394 /*
102395  * Field : Transfer Size - xfersize
102396  *
102397  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
102398  * application only after it has exhausted the transfer size amount of data. The
102399  * transfer size can be Set to the maximum packet size of the endpoint, to be
102400  * interrupted at the end of each packet. The core decrements this field every time
102401  * a packet from the external memory is written to the RxFIFO.
102402  *
102403  * Field Access Macros:
102404  *
102405  */
102406 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ9_XFERSIZE register field. */
102407 #define ALT_USB_DEV_DOEPTSIZ9_XFERSIZE_LSB 0
102408 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ9_XFERSIZE register field. */
102409 #define ALT_USB_DEV_DOEPTSIZ9_XFERSIZE_MSB 18
102410 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ9_XFERSIZE register field. */
102411 #define ALT_USB_DEV_DOEPTSIZ9_XFERSIZE_WIDTH 19
102412 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ9_XFERSIZE register field value. */
102413 #define ALT_USB_DEV_DOEPTSIZ9_XFERSIZE_SET_MSK 0x0007ffff
102414 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ9_XFERSIZE register field value. */
102415 #define ALT_USB_DEV_DOEPTSIZ9_XFERSIZE_CLR_MSK 0xfff80000
102416 /* The reset value of the ALT_USB_DEV_DOEPTSIZ9_XFERSIZE register field. */
102417 #define ALT_USB_DEV_DOEPTSIZ9_XFERSIZE_RESET 0x0
102418 /* Extracts the ALT_USB_DEV_DOEPTSIZ9_XFERSIZE field value from a register. */
102419 #define ALT_USB_DEV_DOEPTSIZ9_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
102420 /* Produces a ALT_USB_DEV_DOEPTSIZ9_XFERSIZE register field value suitable for setting the register. */
102421 #define ALT_USB_DEV_DOEPTSIZ9_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
102422 
102423 /*
102424  * Field : Packet Count - pktcnt
102425  *
102426  * Indicates the total number of USB packets that constitute the Transfer Size
102427  * amount of data for endpoint 0.This field is decremented every time a packet
102428  * (maximum size or short packet) is read from the RxFIFO.
102429  *
102430  * Field Access Macros:
102431  *
102432  */
102433 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ9_PKTCNT register field. */
102434 #define ALT_USB_DEV_DOEPTSIZ9_PKTCNT_LSB 19
102435 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ9_PKTCNT register field. */
102436 #define ALT_USB_DEV_DOEPTSIZ9_PKTCNT_MSB 28
102437 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ9_PKTCNT register field. */
102438 #define ALT_USB_DEV_DOEPTSIZ9_PKTCNT_WIDTH 10
102439 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ9_PKTCNT register field value. */
102440 #define ALT_USB_DEV_DOEPTSIZ9_PKTCNT_SET_MSK 0x1ff80000
102441 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ9_PKTCNT register field value. */
102442 #define ALT_USB_DEV_DOEPTSIZ9_PKTCNT_CLR_MSK 0xe007ffff
102443 /* The reset value of the ALT_USB_DEV_DOEPTSIZ9_PKTCNT register field. */
102444 #define ALT_USB_DEV_DOEPTSIZ9_PKTCNT_RESET 0x0
102445 /* Extracts the ALT_USB_DEV_DOEPTSIZ9_PKTCNT field value from a register. */
102446 #define ALT_USB_DEV_DOEPTSIZ9_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
102447 /* Produces a ALT_USB_DEV_DOEPTSIZ9_PKTCNT register field value suitable for setting the register. */
102448 #define ALT_USB_DEV_DOEPTSIZ9_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
102449 
102450 /*
102451  * Field : SETUP Packet Count - rxdpid
102452  *
102453  * Applies to isochronous OUT endpoints only.This is the data PID received in the
102454  * last packet for this endpoint. Use datax.
102455  *
102456  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
102457  * number of back-to-back SETUP data packets the endpoint can receive.
102458  *
102459  * Field Enumeration Values:
102460  *
102461  * Enum | Value | Description
102462  * :-----------------------------------------|:------|:-------------------
102463  * ALT_USB_DEV_DOEPTSIZ9_RXDPID_E_DATA0 | 0x0 | DATA0
102464  * ALT_USB_DEV_DOEPTSIZ9_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
102465  * ALT_USB_DEV_DOEPTSIZ9_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
102466  * ALT_USB_DEV_DOEPTSIZ9_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
102467  *
102468  * Field Access Macros:
102469  *
102470  */
102471 /*
102472  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ9_RXDPID
102473  *
102474  * DATA0
102475  */
102476 #define ALT_USB_DEV_DOEPTSIZ9_RXDPID_E_DATA0 0x0
102477 /*
102478  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ9_RXDPID
102479  *
102480  * DATA2 or 1 packet
102481  */
102482 #define ALT_USB_DEV_DOEPTSIZ9_RXDPID_E_DATA2PKT1 0x1
102483 /*
102484  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ9_RXDPID
102485  *
102486  * DATA1 or 2 packets
102487  */
102488 #define ALT_USB_DEV_DOEPTSIZ9_RXDPID_E_DATA1PKT2 0x2
102489 /*
102490  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ9_RXDPID
102491  *
102492  * MDATA or 3 packets
102493  */
102494 #define ALT_USB_DEV_DOEPTSIZ9_RXDPID_E_MDATAPKT3 0x3
102495 
102496 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ9_RXDPID register field. */
102497 #define ALT_USB_DEV_DOEPTSIZ9_RXDPID_LSB 29
102498 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ9_RXDPID register field. */
102499 #define ALT_USB_DEV_DOEPTSIZ9_RXDPID_MSB 30
102500 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ9_RXDPID register field. */
102501 #define ALT_USB_DEV_DOEPTSIZ9_RXDPID_WIDTH 2
102502 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ9_RXDPID register field value. */
102503 #define ALT_USB_DEV_DOEPTSIZ9_RXDPID_SET_MSK 0x60000000
102504 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ9_RXDPID register field value. */
102505 #define ALT_USB_DEV_DOEPTSIZ9_RXDPID_CLR_MSK 0x9fffffff
102506 /* The reset value of the ALT_USB_DEV_DOEPTSIZ9_RXDPID register field. */
102507 #define ALT_USB_DEV_DOEPTSIZ9_RXDPID_RESET 0x0
102508 /* Extracts the ALT_USB_DEV_DOEPTSIZ9_RXDPID field value from a register. */
102509 #define ALT_USB_DEV_DOEPTSIZ9_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
102510 /* Produces a ALT_USB_DEV_DOEPTSIZ9_RXDPID register field value suitable for setting the register. */
102511 #define ALT_USB_DEV_DOEPTSIZ9_RXDPID_SET(value) (((value) << 29) & 0x60000000)
102512 
102513 #ifndef __ASSEMBLY__
102514 /*
102515  * WARNING: The C register and register group struct declarations are provided for
102516  * convenience and illustrative purposes. They should, however, be used with
102517  * caution as the C language standard provides no guarantees about the alignment or
102518  * atomicity of device memory accesses. The recommended practice for writing
102519  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
102520  * alt_write_word() functions.
102521  *
102522  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ9.
102523  */
102524 struct ALT_USB_DEV_DOEPTSIZ9_s
102525 {
102526  uint32_t xfersize : 19; /* Transfer Size */
102527  uint32_t pktcnt : 10; /* Packet Count */
102528  const uint32_t rxdpid : 2; /* SETUP Packet Count */
102529  uint32_t : 1; /* *UNDEFINED* */
102530 };
102531 
102532 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ9. */
102533 typedef volatile struct ALT_USB_DEV_DOEPTSIZ9_s ALT_USB_DEV_DOEPTSIZ9_t;
102534 #endif /* __ASSEMBLY__ */
102535 
102536 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ9 register from the beginning of the component. */
102537 #define ALT_USB_DEV_DOEPTSIZ9_OFST 0x430
102538 /* The address of the ALT_USB_DEV_DOEPTSIZ9 register. */
102539 #define ALT_USB_DEV_DOEPTSIZ9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ9_OFST))
102540 
102541 /*
102542  * Register : Device OUT Endpoint 9 DMA Address Register - doepdma9
102543  *
102544  * DMA OUT Address.
102545  *
102546  * Register Layout
102547  *
102548  * Bits | Access | Reset | Description
102549  * :-------|:-------|:--------|:------------
102550  * [31:0] | RW | Unknown | DMA Address
102551  *
102552  */
102553 /*
102554  * Field : DMA Address - doepdma9
102555  *
102556  * Holds the start address of the external memory for storing or fetching endpoint
102557  * data. for control endpoints, this field stores control OUT data packets as well
102558  * as SETUP transaction data packets. When more than three SETUP packets are
102559  * received back-to-back, the SETUP data packet in the memory is overwritten. This
102560  * register is incremented on every AHB transaction. The application can give only
102561  * a DWORD-aligned address.
102562  *
102563  * When Scatter/Gather DMA mode is not enabled, the application programs the start
102564  * address value in this field.
102565  *
102566  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
102567  * for the descriptor list.
102568  *
102569  * Field Access Macros:
102570  *
102571  */
102572 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA9_DOEPDMA9 register field. */
102573 #define ALT_USB_DEV_DOEPDMA9_DOEPDMA9_LSB 0
102574 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA9_DOEPDMA9 register field. */
102575 #define ALT_USB_DEV_DOEPDMA9_DOEPDMA9_MSB 31
102576 /* The width in bits of the ALT_USB_DEV_DOEPDMA9_DOEPDMA9 register field. */
102577 #define ALT_USB_DEV_DOEPDMA9_DOEPDMA9_WIDTH 32
102578 /* The mask used to set the ALT_USB_DEV_DOEPDMA9_DOEPDMA9 register field value. */
102579 #define ALT_USB_DEV_DOEPDMA9_DOEPDMA9_SET_MSK 0xffffffff
102580 /* The mask used to clear the ALT_USB_DEV_DOEPDMA9_DOEPDMA9 register field value. */
102581 #define ALT_USB_DEV_DOEPDMA9_DOEPDMA9_CLR_MSK 0x00000000
102582 /* The reset value of the ALT_USB_DEV_DOEPDMA9_DOEPDMA9 register field is UNKNOWN. */
102583 #define ALT_USB_DEV_DOEPDMA9_DOEPDMA9_RESET 0x0
102584 /* Extracts the ALT_USB_DEV_DOEPDMA9_DOEPDMA9 field value from a register. */
102585 #define ALT_USB_DEV_DOEPDMA9_DOEPDMA9_GET(value) (((value) & 0xffffffff) >> 0)
102586 /* Produces a ALT_USB_DEV_DOEPDMA9_DOEPDMA9 register field value suitable for setting the register. */
102587 #define ALT_USB_DEV_DOEPDMA9_DOEPDMA9_SET(value) (((value) << 0) & 0xffffffff)
102588 
102589 #ifndef __ASSEMBLY__
102590 /*
102591  * WARNING: The C register and register group struct declarations are provided for
102592  * convenience and illustrative purposes. They should, however, be used with
102593  * caution as the C language standard provides no guarantees about the alignment or
102594  * atomicity of device memory accesses. The recommended practice for writing
102595  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
102596  * alt_write_word() functions.
102597  *
102598  * The struct declaration for register ALT_USB_DEV_DOEPDMA9.
102599  */
102600 struct ALT_USB_DEV_DOEPDMA9_s
102601 {
102602  uint32_t doepdma9 : 32; /* DMA Address */
102603 };
102604 
102605 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA9. */
102606 typedef volatile struct ALT_USB_DEV_DOEPDMA9_s ALT_USB_DEV_DOEPDMA9_t;
102607 #endif /* __ASSEMBLY__ */
102608 
102609 /* The byte offset of the ALT_USB_DEV_DOEPDMA9 register from the beginning of the component. */
102610 #define ALT_USB_DEV_DOEPDMA9_OFST 0x434
102611 /* The address of the ALT_USB_DEV_DOEPDMA9 register. */
102612 #define ALT_USB_DEV_DOEPDMA9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA9_OFST))
102613 
102614 /*
102615  * Register : Device OUT Endpoint 9 DMA Buffer Address Register - doepdmab9
102616  *
102617  * DMA Buffer Address.
102618  *
102619  * Register Layout
102620  *
102621  * Bits | Access | Reset | Description
102622  * :-------|:-------|:--------|:-------------------
102623  * [31:0] | R | Unknown | DMA Buffer Address
102624  *
102625  */
102626 /*
102627  * Field : DMA Buffer Address - doepdmab9
102628  *
102629  * Holds the current buffer address. This register is updated as and when the data
102630  * transfer for the corresponding end point is in progress. This register is
102631  * present only in Scatter/Gather DMA mode.
102632  *
102633  * Field Access Macros:
102634  *
102635  */
102636 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9 register field. */
102637 #define ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9_LSB 0
102638 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9 register field. */
102639 #define ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9_MSB 31
102640 /* The width in bits of the ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9 register field. */
102641 #define ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9_WIDTH 32
102642 /* The mask used to set the ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9 register field value. */
102643 #define ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9_SET_MSK 0xffffffff
102644 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9 register field value. */
102645 #define ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9_CLR_MSK 0x00000000
102646 /* The reset value of the ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9 register field is UNKNOWN. */
102647 #define ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9_RESET 0x0
102648 /* Extracts the ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9 field value from a register. */
102649 #define ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9_GET(value) (((value) & 0xffffffff) >> 0)
102650 /* Produces a ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9 register field value suitable for setting the register. */
102651 #define ALT_USB_DEV_DOEPDMAB9_DOEPDMAB9_SET(value) (((value) << 0) & 0xffffffff)
102652 
102653 #ifndef __ASSEMBLY__
102654 /*
102655  * WARNING: The C register and register group struct declarations are provided for
102656  * convenience and illustrative purposes. They should, however, be used with
102657  * caution as the C language standard provides no guarantees about the alignment or
102658  * atomicity of device memory accesses. The recommended practice for writing
102659  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
102660  * alt_write_word() functions.
102661  *
102662  * The struct declaration for register ALT_USB_DEV_DOEPDMAB9.
102663  */
102664 struct ALT_USB_DEV_DOEPDMAB9_s
102665 {
102666  const uint32_t doepdmab9 : 32; /* DMA Buffer Address */
102667 };
102668 
102669 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB9. */
102670 typedef volatile struct ALT_USB_DEV_DOEPDMAB9_s ALT_USB_DEV_DOEPDMAB9_t;
102671 #endif /* __ASSEMBLY__ */
102672 
102673 /* The byte offset of the ALT_USB_DEV_DOEPDMAB9 register from the beginning of the component. */
102674 #define ALT_USB_DEV_DOEPDMAB9_OFST 0x43c
102675 /* The address of the ALT_USB_DEV_DOEPDMAB9 register. */
102676 #define ALT_USB_DEV_DOEPDMAB9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB9_OFST))
102677 
102678 /*
102679  * Register : Device Control OUT Endpoint 10 Control Register - doepctl10
102680  *
102681  * Out Endpoint 10.
102682  *
102683  * Register Layout
102684  *
102685  * Bits | Access | Reset | Description
102686  * :--------|:-------|:------|:--------------------
102687  * [10:0] | RW | 0x0 | Maximum Packet Size
102688  * [14:11] | ??? | 0x0 | *UNDEFINED*
102689  * [15] | RW | 0x0 | USB Active Endpoint
102690  * [16] | R | 0x0 | Endpoint Data PID
102691  * [17] | R | 0x0 | NAK Status
102692  * [19:18] | RW | 0x0 | Endpoint Type
102693  * [20] | RW | 0x0 | Snoop Mode
102694  * [21] | R | 0x0 | STALL Handshake
102695  * [25:22] | ??? | 0x0 | *UNDEFINED*
102696  * [26] | W | 0x0 | Clear NAK
102697  * [27] | W | 0x0 | Set NAK
102698  * [28] | W | 0x0 | Set DATA0 PID
102699  * [29] | W | 0x0 | Set DATA1 PID
102700  * [30] | R | 0x0 | Endpoint Disable
102701  * [31] | R | 0x0 | Endpoint Enable
102702  *
102703  */
102704 /*
102705  * Field : Maximum Packet Size - mps
102706  *
102707  * Applies to IN and OUT endpoints. The application must program this field with
102708  * the maximum packet size for the current logical endpoint. This value is in
102709  * bytes.
102710  *
102711  * Field Access Macros:
102712  *
102713  */
102714 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_MPS register field. */
102715 #define ALT_USB_DEV_DOEPCTL10_MPS_LSB 0
102716 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_MPS register field. */
102717 #define ALT_USB_DEV_DOEPCTL10_MPS_MSB 10
102718 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_MPS register field. */
102719 #define ALT_USB_DEV_DOEPCTL10_MPS_WIDTH 11
102720 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_MPS register field value. */
102721 #define ALT_USB_DEV_DOEPCTL10_MPS_SET_MSK 0x000007ff
102722 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_MPS register field value. */
102723 #define ALT_USB_DEV_DOEPCTL10_MPS_CLR_MSK 0xfffff800
102724 /* The reset value of the ALT_USB_DEV_DOEPCTL10_MPS register field. */
102725 #define ALT_USB_DEV_DOEPCTL10_MPS_RESET 0x0
102726 /* Extracts the ALT_USB_DEV_DOEPCTL10_MPS field value from a register. */
102727 #define ALT_USB_DEV_DOEPCTL10_MPS_GET(value) (((value) & 0x000007ff) >> 0)
102728 /* Produces a ALT_USB_DEV_DOEPCTL10_MPS register field value suitable for setting the register. */
102729 #define ALT_USB_DEV_DOEPCTL10_MPS_SET(value) (((value) << 0) & 0x000007ff)
102730 
102731 /*
102732  * Field : USB Active Endpoint - usbactep
102733  *
102734  * Indicates whether this endpoint is active in the current configuration and
102735  * interface. The core clears this bit for all endpoints (other than EP 0) after
102736  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
102737  * commands, the application must program endpoint registers accordingly and set
102738  * this bit.
102739  *
102740  * Field Enumeration Values:
102741  *
102742  * Enum | Value | Description
102743  * :--------------------------------------|:------|:--------------------
102744  * ALT_USB_DEV_DOEPCTL10_USBACTEP_E_DISD | 0x0 | Not Active
102745  * ALT_USB_DEV_DOEPCTL10_USBACTEP_E_END | 0x1 | USB Active Endpoint
102746  *
102747  * Field Access Macros:
102748  *
102749  */
102750 /*
102751  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_USBACTEP
102752  *
102753  * Not Active
102754  */
102755 #define ALT_USB_DEV_DOEPCTL10_USBACTEP_E_DISD 0x0
102756 /*
102757  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_USBACTEP
102758  *
102759  * USB Active Endpoint
102760  */
102761 #define ALT_USB_DEV_DOEPCTL10_USBACTEP_E_END 0x1
102762 
102763 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_USBACTEP register field. */
102764 #define ALT_USB_DEV_DOEPCTL10_USBACTEP_LSB 15
102765 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_USBACTEP register field. */
102766 #define ALT_USB_DEV_DOEPCTL10_USBACTEP_MSB 15
102767 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_USBACTEP register field. */
102768 #define ALT_USB_DEV_DOEPCTL10_USBACTEP_WIDTH 1
102769 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_USBACTEP register field value. */
102770 #define ALT_USB_DEV_DOEPCTL10_USBACTEP_SET_MSK 0x00008000
102771 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_USBACTEP register field value. */
102772 #define ALT_USB_DEV_DOEPCTL10_USBACTEP_CLR_MSK 0xffff7fff
102773 /* The reset value of the ALT_USB_DEV_DOEPCTL10_USBACTEP register field. */
102774 #define ALT_USB_DEV_DOEPCTL10_USBACTEP_RESET 0x0
102775 /* Extracts the ALT_USB_DEV_DOEPCTL10_USBACTEP field value from a register. */
102776 #define ALT_USB_DEV_DOEPCTL10_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
102777 /* Produces a ALT_USB_DEV_DOEPCTL10_USBACTEP register field value suitable for setting the register. */
102778 #define ALT_USB_DEV_DOEPCTL10_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
102779 
102780 /*
102781  * Field : Endpoint Data PID - dpid
102782  *
102783  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
102784  * packet to be received or transmitted on this endpoint. The application must
102785  * program the PID of the first packet to be received or transmitted on this
102786  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
102787  * SetD0PID fields of this register to program either DATA0 or DATA1 PID. 0: DATA0
102788  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
102789  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
102790  * DMA mode:
102791  *
102792  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
102793  * number in which the core transmits/receives isochronous data for this endpoint.
102794  * The application must program the even/odd (micro) frame number in which it
102795  * intends to transmit/receive isochronous data for this endpoint using the
102796  * SetEvnFr and SetOddFr fields in this register.
102797  *
102798  * 0: Even (micro)frame
102799  *
102800  * 1: Odd (micro)frame
102801  *
102802  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
102803  * number in which to send data is provided in the transmit descriptor structure.
102804  * The frame in which data is received is updated in receive descriptor structure.
102805  *
102806  * Field Enumeration Values:
102807  *
102808  * Enum | Value | Description
102809  * :-----------------------------------|:------|:-----------------------------
102810  * ALT_USB_DEV_DOEPCTL10_DPID_E_INACT | 0x0 | Endpoint Data PID not active
102811  * ALT_USB_DEV_DOEPCTL10_DPID_E_ACT | 0x1 | Endpoint Data PID active
102812  *
102813  * Field Access Macros:
102814  *
102815  */
102816 /*
102817  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_DPID
102818  *
102819  * Endpoint Data PID not active
102820  */
102821 #define ALT_USB_DEV_DOEPCTL10_DPID_E_INACT 0x0
102822 /*
102823  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_DPID
102824  *
102825  * Endpoint Data PID active
102826  */
102827 #define ALT_USB_DEV_DOEPCTL10_DPID_E_ACT 0x1
102828 
102829 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_DPID register field. */
102830 #define ALT_USB_DEV_DOEPCTL10_DPID_LSB 16
102831 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_DPID register field. */
102832 #define ALT_USB_DEV_DOEPCTL10_DPID_MSB 16
102833 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_DPID register field. */
102834 #define ALT_USB_DEV_DOEPCTL10_DPID_WIDTH 1
102835 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_DPID register field value. */
102836 #define ALT_USB_DEV_DOEPCTL10_DPID_SET_MSK 0x00010000
102837 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_DPID register field value. */
102838 #define ALT_USB_DEV_DOEPCTL10_DPID_CLR_MSK 0xfffeffff
102839 /* The reset value of the ALT_USB_DEV_DOEPCTL10_DPID register field. */
102840 #define ALT_USB_DEV_DOEPCTL10_DPID_RESET 0x0
102841 /* Extracts the ALT_USB_DEV_DOEPCTL10_DPID field value from a register. */
102842 #define ALT_USB_DEV_DOEPCTL10_DPID_GET(value) (((value) & 0x00010000) >> 16)
102843 /* Produces a ALT_USB_DEV_DOEPCTL10_DPID register field value suitable for setting the register. */
102844 #define ALT_USB_DEV_DOEPCTL10_DPID_SET(value) (((value) << 16) & 0x00010000)
102845 
102846 /*
102847  * Field : NAK Status - naksts
102848  *
102849  * When either the application or the core sets this bit:
102850  *
102851  * * The core stops receiving any data on an OUT endpoint, even if there is space
102852  * in the RxFIFO to accommodate the incoming packet.
102853  *
102854  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
102855  * IN endpoint, even if there data is available in the TxFIFO.
102856  *
102857  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
102858  * even if there data is available in the TxFIFO.
102859  *
102860  * Irrespective of this bit's setting, the core always responds to SETUP data
102861  * packets with an ACK handshake.
102862  *
102863  * Field Enumeration Values:
102864  *
102865  * Enum | Value | Description
102866  * :--------------------------------------|:------|:------------------------------------------------
102867  * ALT_USB_DEV_DOEPCTL10_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
102868  * : | | based on the FIFO status
102869  * ALT_USB_DEV_DOEPCTL10_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
102870  * : | | endpoint
102871  *
102872  * Field Access Macros:
102873  *
102874  */
102875 /*
102876  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_NAKSTS
102877  *
102878  * The core is transmitting non-NAK handshakes based on the FIFO status
102879  */
102880 #define ALT_USB_DEV_DOEPCTL10_NAKSTS_E_NONNAK 0x0
102881 /*
102882  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_NAKSTS
102883  *
102884  * The core is transmitting NAK handshakes on this endpoint
102885  */
102886 #define ALT_USB_DEV_DOEPCTL10_NAKSTS_E_NAK 0x1
102887 
102888 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_NAKSTS register field. */
102889 #define ALT_USB_DEV_DOEPCTL10_NAKSTS_LSB 17
102890 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_NAKSTS register field. */
102891 #define ALT_USB_DEV_DOEPCTL10_NAKSTS_MSB 17
102892 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_NAKSTS register field. */
102893 #define ALT_USB_DEV_DOEPCTL10_NAKSTS_WIDTH 1
102894 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_NAKSTS register field value. */
102895 #define ALT_USB_DEV_DOEPCTL10_NAKSTS_SET_MSK 0x00020000
102896 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_NAKSTS register field value. */
102897 #define ALT_USB_DEV_DOEPCTL10_NAKSTS_CLR_MSK 0xfffdffff
102898 /* The reset value of the ALT_USB_DEV_DOEPCTL10_NAKSTS register field. */
102899 #define ALT_USB_DEV_DOEPCTL10_NAKSTS_RESET 0x0
102900 /* Extracts the ALT_USB_DEV_DOEPCTL10_NAKSTS field value from a register. */
102901 #define ALT_USB_DEV_DOEPCTL10_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
102902 /* Produces a ALT_USB_DEV_DOEPCTL10_NAKSTS register field value suitable for setting the register. */
102903 #define ALT_USB_DEV_DOEPCTL10_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
102904 
102905 /*
102906  * Field : Endpoint Type - eptype
102907  *
102908  * This is the transfer type supported by this logical endpoint.
102909  *
102910  * Field Enumeration Values:
102911  *
102912  * Enum | Value | Description
102913  * :-------------------------------------------|:------|:------------
102914  * ALT_USB_DEV_DOEPCTL10_EPTYPE_E_CTL | 0x0 | Control
102915  * ALT_USB_DEV_DOEPCTL10_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
102916  * ALT_USB_DEV_DOEPCTL10_EPTYPE_E_BULK | 0x2 | Bulk
102917  * ALT_USB_DEV_DOEPCTL10_EPTYPE_E_INTERRUP | 0x3 | Interrupt
102918  *
102919  * Field Access Macros:
102920  *
102921  */
102922 /*
102923  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_EPTYPE
102924  *
102925  * Control
102926  */
102927 #define ALT_USB_DEV_DOEPCTL10_EPTYPE_E_CTL 0x0
102928 /*
102929  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_EPTYPE
102930  *
102931  * Isochronous
102932  */
102933 #define ALT_USB_DEV_DOEPCTL10_EPTYPE_E_ISOCHRONOUS 0x1
102934 /*
102935  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_EPTYPE
102936  *
102937  * Bulk
102938  */
102939 #define ALT_USB_DEV_DOEPCTL10_EPTYPE_E_BULK 0x2
102940 /*
102941  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_EPTYPE
102942  *
102943  * Interrupt
102944  */
102945 #define ALT_USB_DEV_DOEPCTL10_EPTYPE_E_INTERRUP 0x3
102946 
102947 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_EPTYPE register field. */
102948 #define ALT_USB_DEV_DOEPCTL10_EPTYPE_LSB 18
102949 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_EPTYPE register field. */
102950 #define ALT_USB_DEV_DOEPCTL10_EPTYPE_MSB 19
102951 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_EPTYPE register field. */
102952 #define ALT_USB_DEV_DOEPCTL10_EPTYPE_WIDTH 2
102953 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_EPTYPE register field value. */
102954 #define ALT_USB_DEV_DOEPCTL10_EPTYPE_SET_MSK 0x000c0000
102955 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_EPTYPE register field value. */
102956 #define ALT_USB_DEV_DOEPCTL10_EPTYPE_CLR_MSK 0xfff3ffff
102957 /* The reset value of the ALT_USB_DEV_DOEPCTL10_EPTYPE register field. */
102958 #define ALT_USB_DEV_DOEPCTL10_EPTYPE_RESET 0x0
102959 /* Extracts the ALT_USB_DEV_DOEPCTL10_EPTYPE field value from a register. */
102960 #define ALT_USB_DEV_DOEPCTL10_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
102961 /* Produces a ALT_USB_DEV_DOEPCTL10_EPTYPE register field value suitable for setting the register. */
102962 #define ALT_USB_DEV_DOEPCTL10_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
102963 
102964 /*
102965  * Field : Snoop Mode - snp
102966  *
102967  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
102968  * In Snoop mode, the core does not check the correctness of OUT packets before
102969  * transferring them to application memory.
102970  *
102971  * Field Enumeration Values:
102972  *
102973  * Enum | Value | Description
102974  * :--------------------------------|:------|:-------------------
102975  * ALT_USB_DEV_DOEPCTL10_SNP_E_DIS | 0x0 | Disable Snoop Mode
102976  * ALT_USB_DEV_DOEPCTL10_SNP_E_EN | 0x1 | Enable Snoop Mode
102977  *
102978  * Field Access Macros:
102979  *
102980  */
102981 /*
102982  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_SNP
102983  *
102984  * Disable Snoop Mode
102985  */
102986 #define ALT_USB_DEV_DOEPCTL10_SNP_E_DIS 0x0
102987 /*
102988  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_SNP
102989  *
102990  * Enable Snoop Mode
102991  */
102992 #define ALT_USB_DEV_DOEPCTL10_SNP_E_EN 0x1
102993 
102994 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_SNP register field. */
102995 #define ALT_USB_DEV_DOEPCTL10_SNP_LSB 20
102996 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_SNP register field. */
102997 #define ALT_USB_DEV_DOEPCTL10_SNP_MSB 20
102998 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_SNP register field. */
102999 #define ALT_USB_DEV_DOEPCTL10_SNP_WIDTH 1
103000 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_SNP register field value. */
103001 #define ALT_USB_DEV_DOEPCTL10_SNP_SET_MSK 0x00100000
103002 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_SNP register field value. */
103003 #define ALT_USB_DEV_DOEPCTL10_SNP_CLR_MSK 0xffefffff
103004 /* The reset value of the ALT_USB_DEV_DOEPCTL10_SNP register field. */
103005 #define ALT_USB_DEV_DOEPCTL10_SNP_RESET 0x0
103006 /* Extracts the ALT_USB_DEV_DOEPCTL10_SNP field value from a register. */
103007 #define ALT_USB_DEV_DOEPCTL10_SNP_GET(value) (((value) & 0x00100000) >> 20)
103008 /* Produces a ALT_USB_DEV_DOEPCTL10_SNP register field value suitable for setting the register. */
103009 #define ALT_USB_DEV_DOEPCTL10_SNP_SET(value) (((value) << 20) & 0x00100000)
103010 
103011 /*
103012  * Field : STALL Handshake - stall
103013  *
103014  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
103015  * application sets this bit to stall all tokens from the USB host to this
103016  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
103017  * along with this bit, the STALL bit takes priority. Only the application can
103018  * clear this bit, never the core. Applies to control endpoints only. The
103019  * application can only set this bit, and the core clears it, when a SETUP token is
103020  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
103021  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
103022  * of this bit's setting, the core always responds to SETUP data packets with an
103023  * ACK handshake.
103024  *
103025  * Field Enumeration Values:
103026  *
103027  * Enum | Value | Description
103028  * :------------------------------------|:------|:----------------------------
103029  * ALT_USB_DEV_DOEPCTL10_STALL_E_INACT | 0x0 | STALL All Tokens not active
103030  * ALT_USB_DEV_DOEPCTL10_STALL_E_ACT | 0x1 | STALL All Tokens active
103031  *
103032  * Field Access Macros:
103033  *
103034  */
103035 /*
103036  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_STALL
103037  *
103038  * STALL All Tokens not active
103039  */
103040 #define ALT_USB_DEV_DOEPCTL10_STALL_E_INACT 0x0
103041 /*
103042  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_STALL
103043  *
103044  * STALL All Tokens active
103045  */
103046 #define ALT_USB_DEV_DOEPCTL10_STALL_E_ACT 0x1
103047 
103048 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_STALL register field. */
103049 #define ALT_USB_DEV_DOEPCTL10_STALL_LSB 21
103050 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_STALL register field. */
103051 #define ALT_USB_DEV_DOEPCTL10_STALL_MSB 21
103052 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_STALL register field. */
103053 #define ALT_USB_DEV_DOEPCTL10_STALL_WIDTH 1
103054 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_STALL register field value. */
103055 #define ALT_USB_DEV_DOEPCTL10_STALL_SET_MSK 0x00200000
103056 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_STALL register field value. */
103057 #define ALT_USB_DEV_DOEPCTL10_STALL_CLR_MSK 0xffdfffff
103058 /* The reset value of the ALT_USB_DEV_DOEPCTL10_STALL register field. */
103059 #define ALT_USB_DEV_DOEPCTL10_STALL_RESET 0x0
103060 /* Extracts the ALT_USB_DEV_DOEPCTL10_STALL field value from a register. */
103061 #define ALT_USB_DEV_DOEPCTL10_STALL_GET(value) (((value) & 0x00200000) >> 21)
103062 /* Produces a ALT_USB_DEV_DOEPCTL10_STALL register field value suitable for setting the register. */
103063 #define ALT_USB_DEV_DOEPCTL10_STALL_SET(value) (((value) << 21) & 0x00200000)
103064 
103065 /*
103066  * Field : Clear NAK - cnak
103067  *
103068  * A write to this bit clears the NAK bit for the endpoint.
103069  *
103070  * Field Enumeration Values:
103071  *
103072  * Enum | Value | Description
103073  * :-----------------------------------|:------|:-------------
103074  * ALT_USB_DEV_DOEPCTL10_CNAK_E_INACT | 0x0 | No Clear NAK
103075  * ALT_USB_DEV_DOEPCTL10_CNAK_E_ACT | 0x1 | Clear NAK
103076  *
103077  * Field Access Macros:
103078  *
103079  */
103080 /*
103081  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_CNAK
103082  *
103083  * No Clear NAK
103084  */
103085 #define ALT_USB_DEV_DOEPCTL10_CNAK_E_INACT 0x0
103086 /*
103087  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_CNAK
103088  *
103089  * Clear NAK
103090  */
103091 #define ALT_USB_DEV_DOEPCTL10_CNAK_E_ACT 0x1
103092 
103093 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_CNAK register field. */
103094 #define ALT_USB_DEV_DOEPCTL10_CNAK_LSB 26
103095 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_CNAK register field. */
103096 #define ALT_USB_DEV_DOEPCTL10_CNAK_MSB 26
103097 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_CNAK register field. */
103098 #define ALT_USB_DEV_DOEPCTL10_CNAK_WIDTH 1
103099 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_CNAK register field value. */
103100 #define ALT_USB_DEV_DOEPCTL10_CNAK_SET_MSK 0x04000000
103101 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_CNAK register field value. */
103102 #define ALT_USB_DEV_DOEPCTL10_CNAK_CLR_MSK 0xfbffffff
103103 /* The reset value of the ALT_USB_DEV_DOEPCTL10_CNAK register field. */
103104 #define ALT_USB_DEV_DOEPCTL10_CNAK_RESET 0x0
103105 /* Extracts the ALT_USB_DEV_DOEPCTL10_CNAK field value from a register. */
103106 #define ALT_USB_DEV_DOEPCTL10_CNAK_GET(value) (((value) & 0x04000000) >> 26)
103107 /* Produces a ALT_USB_DEV_DOEPCTL10_CNAK register field value suitable for setting the register. */
103108 #define ALT_USB_DEV_DOEPCTL10_CNAK_SET(value) (((value) << 26) & 0x04000000)
103109 
103110 /*
103111  * Field : Set NAK - snak
103112  *
103113  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
103114  * application can control the transmission of NAK handshakes on an endpoint. The
103115  * core can also Set this bit for an endpoint after a SETUP packet is received on
103116  * that endpoint.
103117  *
103118  * Field Enumeration Values:
103119  *
103120  * Enum | Value | Description
103121  * :-----------------------------------|:------|:------------
103122  * ALT_USB_DEV_DOEPCTL10_SNAK_E_INACT | 0x0 | No Set NAK
103123  * ALT_USB_DEV_DOEPCTL10_SNAK_E_ACT | 0x1 | Set NAK
103124  *
103125  * Field Access Macros:
103126  *
103127  */
103128 /*
103129  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_SNAK
103130  *
103131  * No Set NAK
103132  */
103133 #define ALT_USB_DEV_DOEPCTL10_SNAK_E_INACT 0x0
103134 /*
103135  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_SNAK
103136  *
103137  * Set NAK
103138  */
103139 #define ALT_USB_DEV_DOEPCTL10_SNAK_E_ACT 0x1
103140 
103141 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_SNAK register field. */
103142 #define ALT_USB_DEV_DOEPCTL10_SNAK_LSB 27
103143 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_SNAK register field. */
103144 #define ALT_USB_DEV_DOEPCTL10_SNAK_MSB 27
103145 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_SNAK register field. */
103146 #define ALT_USB_DEV_DOEPCTL10_SNAK_WIDTH 1
103147 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_SNAK register field value. */
103148 #define ALT_USB_DEV_DOEPCTL10_SNAK_SET_MSK 0x08000000
103149 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_SNAK register field value. */
103150 #define ALT_USB_DEV_DOEPCTL10_SNAK_CLR_MSK 0xf7ffffff
103151 /* The reset value of the ALT_USB_DEV_DOEPCTL10_SNAK register field. */
103152 #define ALT_USB_DEV_DOEPCTL10_SNAK_RESET 0x0
103153 /* Extracts the ALT_USB_DEV_DOEPCTL10_SNAK field value from a register. */
103154 #define ALT_USB_DEV_DOEPCTL10_SNAK_GET(value) (((value) & 0x08000000) >> 27)
103155 /* Produces a ALT_USB_DEV_DOEPCTL10_SNAK register field value suitable for setting the register. */
103156 #define ALT_USB_DEV_DOEPCTL10_SNAK_SET(value) (((value) << 27) & 0x08000000)
103157 
103158 /*
103159  * Field : Set DATA0 PID - setd0pid
103160  *
103161  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
103162  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
103163  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
103164  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
103165  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
103166  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
103167  * mode is enabled, this field is reserved. The frame number in which to send data
103168  * is in the transmit descriptor structure. The frame in which to receive data is
103169  * updated in receive descriptor structure.
103170  *
103171  * Field Enumeration Values:
103172  *
103173  * Enum | Value | Description
103174  * :--------------------------------------|:------|:------------------------------------
103175  * ALT_USB_DEV_DOEPCTL10_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
103176  * ALT_USB_DEV_DOEPCTL10_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
103177  *
103178  * Field Access Macros:
103179  *
103180  */
103181 /*
103182  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_SETD0PID
103183  *
103184  * Disables Set DATA0 PID
103185  */
103186 #define ALT_USB_DEV_DOEPCTL10_SETD0PID_E_DISD 0x0
103187 /*
103188  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_SETD0PID
103189  *
103190  * Enables Endpoint Data PID to DATA0)
103191  */
103192 #define ALT_USB_DEV_DOEPCTL10_SETD0PID_E_END 0x1
103193 
103194 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_SETD0PID register field. */
103195 #define ALT_USB_DEV_DOEPCTL10_SETD0PID_LSB 28
103196 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_SETD0PID register field. */
103197 #define ALT_USB_DEV_DOEPCTL10_SETD0PID_MSB 28
103198 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_SETD0PID register field. */
103199 #define ALT_USB_DEV_DOEPCTL10_SETD0PID_WIDTH 1
103200 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_SETD0PID register field value. */
103201 #define ALT_USB_DEV_DOEPCTL10_SETD0PID_SET_MSK 0x10000000
103202 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_SETD0PID register field value. */
103203 #define ALT_USB_DEV_DOEPCTL10_SETD0PID_CLR_MSK 0xefffffff
103204 /* The reset value of the ALT_USB_DEV_DOEPCTL10_SETD0PID register field. */
103205 #define ALT_USB_DEV_DOEPCTL10_SETD0PID_RESET 0x0
103206 /* Extracts the ALT_USB_DEV_DOEPCTL10_SETD0PID field value from a register. */
103207 #define ALT_USB_DEV_DOEPCTL10_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
103208 /* Produces a ALT_USB_DEV_DOEPCTL10_SETD0PID register field value suitable for setting the register. */
103209 #define ALT_USB_DEV_DOEPCTL10_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
103210 
103211 /*
103212  * Field : Set DATA1 PID - setd1pid
103213  *
103214  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
103215  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
103216  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
103217  *
103218  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
103219  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
103220  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
103221  *
103222  * Field Enumeration Values:
103223  *
103224  * Enum | Value | Description
103225  * :--------------------------------------|:------|:-----------------------
103226  * ALT_USB_DEV_DOEPCTL10_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
103227  * ALT_USB_DEV_DOEPCTL10_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
103228  *
103229  * Field Access Macros:
103230  *
103231  */
103232 /*
103233  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_SETD1PID
103234  *
103235  * Disables Set DATA1 PID
103236  */
103237 #define ALT_USB_DEV_DOEPCTL10_SETD1PID_E_DISD 0x0
103238 /*
103239  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_SETD1PID
103240  *
103241  * Enables Set DATA1 PID
103242  */
103243 #define ALT_USB_DEV_DOEPCTL10_SETD1PID_E_END 0x1
103244 
103245 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_SETD1PID register field. */
103246 #define ALT_USB_DEV_DOEPCTL10_SETD1PID_LSB 29
103247 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_SETD1PID register field. */
103248 #define ALT_USB_DEV_DOEPCTL10_SETD1PID_MSB 29
103249 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_SETD1PID register field. */
103250 #define ALT_USB_DEV_DOEPCTL10_SETD1PID_WIDTH 1
103251 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_SETD1PID register field value. */
103252 #define ALT_USB_DEV_DOEPCTL10_SETD1PID_SET_MSK 0x20000000
103253 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_SETD1PID register field value. */
103254 #define ALT_USB_DEV_DOEPCTL10_SETD1PID_CLR_MSK 0xdfffffff
103255 /* The reset value of the ALT_USB_DEV_DOEPCTL10_SETD1PID register field. */
103256 #define ALT_USB_DEV_DOEPCTL10_SETD1PID_RESET 0x0
103257 /* Extracts the ALT_USB_DEV_DOEPCTL10_SETD1PID field value from a register. */
103258 #define ALT_USB_DEV_DOEPCTL10_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
103259 /* Produces a ALT_USB_DEV_DOEPCTL10_SETD1PID register field value suitable for setting the register. */
103260 #define ALT_USB_DEV_DOEPCTL10_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
103261 
103262 /*
103263  * Field : Endpoint Disable - epdis
103264  *
103265  * Applies to IN and OUT endpoints. The application sets this bit to stop
103266  * transmitting/receiving data on an endpoint, even before the transfer for that
103267  * endpoint is complete. The application must wait for the Endpoint Disabled
103268  * interrupt before treating the endpoint as disabled. The core clears this bit
103269  * before setting the Endpoint Disabled interrupt. The application must set this
103270  * bit only if Endpoint Enable is already set for this endpoint.
103271  *
103272  * Field Enumeration Values:
103273  *
103274  * Enum | Value | Description
103275  * :------------------------------------|:------|:--------------------
103276  * ALT_USB_DEV_DOEPCTL10_EPDIS_E_INACT | 0x0 | No Endpoint Disable
103277  * ALT_USB_DEV_DOEPCTL10_EPDIS_E_ACT | 0x1 | Endpoint Disable
103278  *
103279  * Field Access Macros:
103280  *
103281  */
103282 /*
103283  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_EPDIS
103284  *
103285  * No Endpoint Disable
103286  */
103287 #define ALT_USB_DEV_DOEPCTL10_EPDIS_E_INACT 0x0
103288 /*
103289  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_EPDIS
103290  *
103291  * Endpoint Disable
103292  */
103293 #define ALT_USB_DEV_DOEPCTL10_EPDIS_E_ACT 0x1
103294 
103295 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_EPDIS register field. */
103296 #define ALT_USB_DEV_DOEPCTL10_EPDIS_LSB 30
103297 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_EPDIS register field. */
103298 #define ALT_USB_DEV_DOEPCTL10_EPDIS_MSB 30
103299 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_EPDIS register field. */
103300 #define ALT_USB_DEV_DOEPCTL10_EPDIS_WIDTH 1
103301 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_EPDIS register field value. */
103302 #define ALT_USB_DEV_DOEPCTL10_EPDIS_SET_MSK 0x40000000
103303 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_EPDIS register field value. */
103304 #define ALT_USB_DEV_DOEPCTL10_EPDIS_CLR_MSK 0xbfffffff
103305 /* The reset value of the ALT_USB_DEV_DOEPCTL10_EPDIS register field. */
103306 #define ALT_USB_DEV_DOEPCTL10_EPDIS_RESET 0x0
103307 /* Extracts the ALT_USB_DEV_DOEPCTL10_EPDIS field value from a register. */
103308 #define ALT_USB_DEV_DOEPCTL10_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
103309 /* Produces a ALT_USB_DEV_DOEPCTL10_EPDIS register field value suitable for setting the register. */
103310 #define ALT_USB_DEV_DOEPCTL10_EPDIS_SET(value) (((value) << 30) & 0x40000000)
103311 
103312 /*
103313  * Field : Endpoint Enable - epena
103314  *
103315  * Applies to IN and OUT endpoints.
103316  *
103317  * * When Scatter/Gather DMA mode is enabled,
103318  *
103319  * * for IN endpoints this bit indicates that the descriptor structure and data
103320  * buffer with data ready to transmit is setup.
103321  *
103322  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
103323  * receive data is setup.
103324  *
103325  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
103326  * mode:
103327  *
103328  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
103329  * the endpoint.
103330  *
103331  * * for OUT endpoints, this bit indicates that the application has allocated the
103332  * memory to start receiving data from the USB.
103333  *
103334  * * The core clears this bit before setting any of the following interrupts on
103335  * this endpoint:
103336  *
103337  * * SETUP Phase Done
103338  *
103339  * * Endpoint Disabled
103340  *
103341  * * Transfer Completed
103342  *
103343  * for control endpoints in DMA mode, this bit must be set to be able to transfer
103344  * SETUP data packets in memory.
103345  *
103346  * Field Enumeration Values:
103347  *
103348  * Enum | Value | Description
103349  * :------------------------------------|:------|:-------------------------
103350  * ALT_USB_DEV_DOEPCTL10_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
103351  * ALT_USB_DEV_DOEPCTL10_EPENA_E_ACT | 0x1 | Endpoint Enable active
103352  *
103353  * Field Access Macros:
103354  *
103355  */
103356 /*
103357  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_EPENA
103358  *
103359  * Endpoint Enable inactive
103360  */
103361 #define ALT_USB_DEV_DOEPCTL10_EPENA_E_INACT 0x0
103362 /*
103363  * Enumerated value for register field ALT_USB_DEV_DOEPCTL10_EPENA
103364  *
103365  * Endpoint Enable active
103366  */
103367 #define ALT_USB_DEV_DOEPCTL10_EPENA_E_ACT 0x1
103368 
103369 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL10_EPENA register field. */
103370 #define ALT_USB_DEV_DOEPCTL10_EPENA_LSB 31
103371 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL10_EPENA register field. */
103372 #define ALT_USB_DEV_DOEPCTL10_EPENA_MSB 31
103373 /* The width in bits of the ALT_USB_DEV_DOEPCTL10_EPENA register field. */
103374 #define ALT_USB_DEV_DOEPCTL10_EPENA_WIDTH 1
103375 /* The mask used to set the ALT_USB_DEV_DOEPCTL10_EPENA register field value. */
103376 #define ALT_USB_DEV_DOEPCTL10_EPENA_SET_MSK 0x80000000
103377 /* The mask used to clear the ALT_USB_DEV_DOEPCTL10_EPENA register field value. */
103378 #define ALT_USB_DEV_DOEPCTL10_EPENA_CLR_MSK 0x7fffffff
103379 /* The reset value of the ALT_USB_DEV_DOEPCTL10_EPENA register field. */
103380 #define ALT_USB_DEV_DOEPCTL10_EPENA_RESET 0x0
103381 /* Extracts the ALT_USB_DEV_DOEPCTL10_EPENA field value from a register. */
103382 #define ALT_USB_DEV_DOEPCTL10_EPENA_GET(value) (((value) & 0x80000000) >> 31)
103383 /* Produces a ALT_USB_DEV_DOEPCTL10_EPENA register field value suitable for setting the register. */
103384 #define ALT_USB_DEV_DOEPCTL10_EPENA_SET(value) (((value) << 31) & 0x80000000)
103385 
103386 #ifndef __ASSEMBLY__
103387 /*
103388  * WARNING: The C register and register group struct declarations are provided for
103389  * convenience and illustrative purposes. They should, however, be used with
103390  * caution as the C language standard provides no guarantees about the alignment or
103391  * atomicity of device memory accesses. The recommended practice for writing
103392  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
103393  * alt_write_word() functions.
103394  *
103395  * The struct declaration for register ALT_USB_DEV_DOEPCTL10.
103396  */
103397 struct ALT_USB_DEV_DOEPCTL10_s
103398 {
103399  uint32_t mps : 11; /* Maximum Packet Size */
103400  uint32_t : 4; /* *UNDEFINED* */
103401  uint32_t usbactep : 1; /* USB Active Endpoint */
103402  const uint32_t dpid : 1; /* Endpoint Data PID */
103403  const uint32_t naksts : 1; /* NAK Status */
103404  uint32_t eptype : 2; /* Endpoint Type */
103405  uint32_t snp : 1; /* Snoop Mode */
103406  const uint32_t stall : 1; /* STALL Handshake */
103407  uint32_t : 4; /* *UNDEFINED* */
103408  uint32_t cnak : 1; /* Clear NAK */
103409  uint32_t snak : 1; /* Set NAK */
103410  uint32_t setd0pid : 1; /* Set DATA0 PID */
103411  uint32_t setd1pid : 1; /* Set DATA1 PID */
103412  const uint32_t epdis : 1; /* Endpoint Disable */
103413  const uint32_t epena : 1; /* Endpoint Enable */
103414 };
103415 
103416 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL10. */
103417 typedef volatile struct ALT_USB_DEV_DOEPCTL10_s ALT_USB_DEV_DOEPCTL10_t;
103418 #endif /* __ASSEMBLY__ */
103419 
103420 /* The byte offset of the ALT_USB_DEV_DOEPCTL10 register from the beginning of the component. */
103421 #define ALT_USB_DEV_DOEPCTL10_OFST 0x440
103422 /* The address of the ALT_USB_DEV_DOEPCTL10 register. */
103423 #define ALT_USB_DEV_DOEPCTL10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL10_OFST))
103424 
103425 /*
103426  * Register : Device OUT Endpoint 10 Interrupt Register - doepint10
103427  *
103428  * This register indicates the status of an endpoint with respect to USB- and AHB-
103429  * related events. The application must read this register when the OUT Endpoints
103430  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
103431  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
103432  * can read this register, it must first read the Device All Endpoints Interrupt
103433  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
103434  * Interrupt register. The application must clear the appropriate bit in this
103435  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
103436  *
103437  * Register Layout
103438  *
103439  * Bits | Access | Reset | Description
103440  * :--------|:-------|:------|:------------------------------------------
103441  * [0] | R | 0x0 | Transfer Completed Interrupt
103442  * [1] | R | 0x0 | Endpoint Disabled Interrupt
103443  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT10_AHBERR
103444  * [3] | R | 0x0 | SETUP Phase Done
103445  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
103446  * [5] | R | 0x0 | Status Phase Received for Control Write
103447  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
103448  * [7] | ??? | 0x0 | *UNDEFINED*
103449  * [8] | R | 0x0 | OUT Packet Error
103450  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
103451  * [10] | ??? | 0x0 | *UNDEFINED*
103452  * [11] | R | 0x0 | Packet Drop Status
103453  * [12] | R | 0x0 | BbleErr Interrupt
103454  * [13] | R | 0x0 | NAK Interrupt
103455  * [14] | R | 0x0 | NYET Interrupt
103456  * [31:15] | ??? | 0x0 | *UNDEFINED*
103457  *
103458  */
103459 /*
103460  * Field : Transfer Completed Interrupt - xfercompl
103461  *
103462  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
103463  *
103464  * This field indicates that the requested data from the internal FIFO is moved to
103465  * external system memory. This interrupt is generated only when the corresponding
103466  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
103467  * is Set.
103468  *
103469  * When Scatter/Gather DMA mode is disabled, this field indicates that the
103470  * programmed transfer is complete on the AHB as well as on the USB, for this
103471  * endpoint.
103472  *
103473  * Field Enumeration Values:
103474  *
103475  * Enum | Value | Description
103476  * :----------------------------------------|:------|:-----------------------------
103477  * ALT_USB_DEV_DOEPINT10_XFERCOMPL_E_INACT | 0x0 | No Interrupt
103478  * ALT_USB_DEV_DOEPINT10_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
103479  *
103480  * Field Access Macros:
103481  *
103482  */
103483 /*
103484  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_XFERCOMPL
103485  *
103486  * No Interrupt
103487  */
103488 #define ALT_USB_DEV_DOEPINT10_XFERCOMPL_E_INACT 0x0
103489 /*
103490  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_XFERCOMPL
103491  *
103492  * Transfer Completed Interrupt
103493  */
103494 #define ALT_USB_DEV_DOEPINT10_XFERCOMPL_E_ACT 0x1
103495 
103496 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_XFERCOMPL register field. */
103497 #define ALT_USB_DEV_DOEPINT10_XFERCOMPL_LSB 0
103498 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_XFERCOMPL register field. */
103499 #define ALT_USB_DEV_DOEPINT10_XFERCOMPL_MSB 0
103500 /* The width in bits of the ALT_USB_DEV_DOEPINT10_XFERCOMPL register field. */
103501 #define ALT_USB_DEV_DOEPINT10_XFERCOMPL_WIDTH 1
103502 /* The mask used to set the ALT_USB_DEV_DOEPINT10_XFERCOMPL register field value. */
103503 #define ALT_USB_DEV_DOEPINT10_XFERCOMPL_SET_MSK 0x00000001
103504 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_XFERCOMPL register field value. */
103505 #define ALT_USB_DEV_DOEPINT10_XFERCOMPL_CLR_MSK 0xfffffffe
103506 /* The reset value of the ALT_USB_DEV_DOEPINT10_XFERCOMPL register field. */
103507 #define ALT_USB_DEV_DOEPINT10_XFERCOMPL_RESET 0x0
103508 /* Extracts the ALT_USB_DEV_DOEPINT10_XFERCOMPL field value from a register. */
103509 #define ALT_USB_DEV_DOEPINT10_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
103510 /* Produces a ALT_USB_DEV_DOEPINT10_XFERCOMPL register field value suitable for setting the register. */
103511 #define ALT_USB_DEV_DOEPINT10_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
103512 
103513 /*
103514  * Field : Endpoint Disabled Interrupt - epdisbld
103515  *
103516  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
103517  * disabled per the application's request.
103518  *
103519  * Field Enumeration Values:
103520  *
103521  * Enum | Value | Description
103522  * :---------------------------------------|:------|:----------------------------
103523  * ALT_USB_DEV_DOEPINT10_EPDISBLD_E_INACT | 0x0 | No Interrupt
103524  * ALT_USB_DEV_DOEPINT10_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
103525  *
103526  * Field Access Macros:
103527  *
103528  */
103529 /*
103530  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_EPDISBLD
103531  *
103532  * No Interrupt
103533  */
103534 #define ALT_USB_DEV_DOEPINT10_EPDISBLD_E_INACT 0x0
103535 /*
103536  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_EPDISBLD
103537  *
103538  * Endpoint Disabled Interrupt
103539  */
103540 #define ALT_USB_DEV_DOEPINT10_EPDISBLD_E_ACT 0x1
103541 
103542 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_EPDISBLD register field. */
103543 #define ALT_USB_DEV_DOEPINT10_EPDISBLD_LSB 1
103544 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_EPDISBLD register field. */
103545 #define ALT_USB_DEV_DOEPINT10_EPDISBLD_MSB 1
103546 /* The width in bits of the ALT_USB_DEV_DOEPINT10_EPDISBLD register field. */
103547 #define ALT_USB_DEV_DOEPINT10_EPDISBLD_WIDTH 1
103548 /* The mask used to set the ALT_USB_DEV_DOEPINT10_EPDISBLD register field value. */
103549 #define ALT_USB_DEV_DOEPINT10_EPDISBLD_SET_MSK 0x00000002
103550 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_EPDISBLD register field value. */
103551 #define ALT_USB_DEV_DOEPINT10_EPDISBLD_CLR_MSK 0xfffffffd
103552 /* The reset value of the ALT_USB_DEV_DOEPINT10_EPDISBLD register field. */
103553 #define ALT_USB_DEV_DOEPINT10_EPDISBLD_RESET 0x0
103554 /* Extracts the ALT_USB_DEV_DOEPINT10_EPDISBLD field value from a register. */
103555 #define ALT_USB_DEV_DOEPINT10_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
103556 /* Produces a ALT_USB_DEV_DOEPINT10_EPDISBLD register field value suitable for setting the register. */
103557 #define ALT_USB_DEV_DOEPINT10_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
103558 
103559 /*
103560  * Field : ahberr
103561  *
103562  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
103563  * there is an AHB error during an AHB read/write. The application can read the
103564  * corresponding endpoint DMA address register to get the error address.
103565  *
103566  * Field Enumeration Values:
103567  *
103568  * Enum | Value | Description
103569  * :-------------------------------------|:------|:--------------------
103570  * ALT_USB_DEV_DOEPINT10_AHBERR_E_INACT | 0x0 | No Interrupt
103571  * ALT_USB_DEV_DOEPINT10_AHBERR_E_ACT | 0x1 | AHB Error interrupt
103572  *
103573  * Field Access Macros:
103574  *
103575  */
103576 /*
103577  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_AHBERR
103578  *
103579  * No Interrupt
103580  */
103581 #define ALT_USB_DEV_DOEPINT10_AHBERR_E_INACT 0x0
103582 /*
103583  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_AHBERR
103584  *
103585  * AHB Error interrupt
103586  */
103587 #define ALT_USB_DEV_DOEPINT10_AHBERR_E_ACT 0x1
103588 
103589 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_AHBERR register field. */
103590 #define ALT_USB_DEV_DOEPINT10_AHBERR_LSB 2
103591 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_AHBERR register field. */
103592 #define ALT_USB_DEV_DOEPINT10_AHBERR_MSB 2
103593 /* The width in bits of the ALT_USB_DEV_DOEPINT10_AHBERR register field. */
103594 #define ALT_USB_DEV_DOEPINT10_AHBERR_WIDTH 1
103595 /* The mask used to set the ALT_USB_DEV_DOEPINT10_AHBERR register field value. */
103596 #define ALT_USB_DEV_DOEPINT10_AHBERR_SET_MSK 0x00000004
103597 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_AHBERR register field value. */
103598 #define ALT_USB_DEV_DOEPINT10_AHBERR_CLR_MSK 0xfffffffb
103599 /* The reset value of the ALT_USB_DEV_DOEPINT10_AHBERR register field. */
103600 #define ALT_USB_DEV_DOEPINT10_AHBERR_RESET 0x0
103601 /* Extracts the ALT_USB_DEV_DOEPINT10_AHBERR field value from a register. */
103602 #define ALT_USB_DEV_DOEPINT10_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
103603 /* Produces a ALT_USB_DEV_DOEPINT10_AHBERR register field value suitable for setting the register. */
103604 #define ALT_USB_DEV_DOEPINT10_AHBERR_SET(value) (((value) << 2) & 0x00000004)
103605 
103606 /*
103607  * Field : SETUP Phase Done - setup
103608  *
103609  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
103610  * control endpoint is complete and no more back-to-back SETUP packets were
103611  * received for the current control transfer. On this interrupt, the application
103612  * can decode the received SETUP data packet.
103613  *
103614  * Field Enumeration Values:
103615  *
103616  * Enum | Value | Description
103617  * :------------------------------------|:------|:--------------------
103618  * ALT_USB_DEV_DOEPINT10_SETUP_E_INACT | 0x0 | No SETUP Phase Done
103619  * ALT_USB_DEV_DOEPINT10_SETUP_E_ACT | 0x1 | SETUP Phase Done
103620  *
103621  * Field Access Macros:
103622  *
103623  */
103624 /*
103625  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_SETUP
103626  *
103627  * No SETUP Phase Done
103628  */
103629 #define ALT_USB_DEV_DOEPINT10_SETUP_E_INACT 0x0
103630 /*
103631  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_SETUP
103632  *
103633  * SETUP Phase Done
103634  */
103635 #define ALT_USB_DEV_DOEPINT10_SETUP_E_ACT 0x1
103636 
103637 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_SETUP register field. */
103638 #define ALT_USB_DEV_DOEPINT10_SETUP_LSB 3
103639 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_SETUP register field. */
103640 #define ALT_USB_DEV_DOEPINT10_SETUP_MSB 3
103641 /* The width in bits of the ALT_USB_DEV_DOEPINT10_SETUP register field. */
103642 #define ALT_USB_DEV_DOEPINT10_SETUP_WIDTH 1
103643 /* The mask used to set the ALT_USB_DEV_DOEPINT10_SETUP register field value. */
103644 #define ALT_USB_DEV_DOEPINT10_SETUP_SET_MSK 0x00000008
103645 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_SETUP register field value. */
103646 #define ALT_USB_DEV_DOEPINT10_SETUP_CLR_MSK 0xfffffff7
103647 /* The reset value of the ALT_USB_DEV_DOEPINT10_SETUP register field. */
103648 #define ALT_USB_DEV_DOEPINT10_SETUP_RESET 0x0
103649 /* Extracts the ALT_USB_DEV_DOEPINT10_SETUP field value from a register. */
103650 #define ALT_USB_DEV_DOEPINT10_SETUP_GET(value) (((value) & 0x00000008) >> 3)
103651 /* Produces a ALT_USB_DEV_DOEPINT10_SETUP register field value suitable for setting the register. */
103652 #define ALT_USB_DEV_DOEPINT10_SETUP_SET(value) (((value) << 3) & 0x00000008)
103653 
103654 /*
103655  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
103656  *
103657  * Applies only to control OUT endpoints. Indicates that an OUT token was received
103658  * when the endpoint was not yet enabled. This interrupt is asserted on the
103659  * endpoint for which the OUT token was received.
103660  *
103661  * Field Enumeration Values:
103662  *
103663  * Enum | Value | Description
103664  * :------------------------------------------|:------|:---------------------------------------------
103665  * ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
103666  * ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
103667  *
103668  * Field Access Macros:
103669  *
103670  */
103671 /*
103672  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS
103673  *
103674  * No OUT Token Received When Endpoint Disabled
103675  */
103676 #define ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS_E_INACT 0x0
103677 /*
103678  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS
103679  *
103680  * OUT Token Received When Endpoint Disabled
103681  */
103682 #define ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS_E_ACT 0x1
103683 
103684 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS register field. */
103685 #define ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS_LSB 4
103686 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS register field. */
103687 #define ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS_MSB 4
103688 /* The width in bits of the ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS register field. */
103689 #define ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS_WIDTH 1
103690 /* The mask used to set the ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS register field value. */
103691 #define ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS_SET_MSK 0x00000010
103692 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS register field value. */
103693 #define ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS_CLR_MSK 0xffffffef
103694 /* The reset value of the ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS register field. */
103695 #define ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS_RESET 0x0
103696 /* Extracts the ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS field value from a register. */
103697 #define ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
103698 /* Produces a ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS register field value suitable for setting the register. */
103699 #define ALT_USB_DEV_DOEPINT10_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
103700 
103701 /*
103702  * Field : Status Phase Received for Control Write - stsphsercvd
103703  *
103704  * This interrupt is valid only for Control OUT endpoints and only in Scatter
103705  * Gather DMA mode. This interrupt is generated only after the core has transferred
103706  * all the data that the host has sent during the data phase of a control write
103707  * transfer, to the system memory buffer. The interrupt indicates to the
103708  * application that the host has switched from data phase to the status phase of a
103709  * Control Write transfer. The application can use this interrupt to ACK or STALL
103710  * the Status phase, after it has decoded the data phase. This is applicable only
103711  * in Case of Scatter Gather DMA mode.
103712  *
103713  * Field Enumeration Values:
103714  *
103715  * Enum | Value | Description
103716  * :------------------------------------------|:------|:-------------------------------------------
103717  * ALT_USB_DEV_DOEPINT10_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
103718  * ALT_USB_DEV_DOEPINT10_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
103719  *
103720  * Field Access Macros:
103721  *
103722  */
103723 /*
103724  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_STSPHSERCVD
103725  *
103726  * No Status Phase Received for Control Write
103727  */
103728 #define ALT_USB_DEV_DOEPINT10_STSPHSERCVD_E_INACT 0x0
103729 /*
103730  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_STSPHSERCVD
103731  *
103732  * Status Phase Received for Control Write
103733  */
103734 #define ALT_USB_DEV_DOEPINT10_STSPHSERCVD_E_ACT 0x1
103735 
103736 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_STSPHSERCVD register field. */
103737 #define ALT_USB_DEV_DOEPINT10_STSPHSERCVD_LSB 5
103738 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_STSPHSERCVD register field. */
103739 #define ALT_USB_DEV_DOEPINT10_STSPHSERCVD_MSB 5
103740 /* The width in bits of the ALT_USB_DEV_DOEPINT10_STSPHSERCVD register field. */
103741 #define ALT_USB_DEV_DOEPINT10_STSPHSERCVD_WIDTH 1
103742 /* The mask used to set the ALT_USB_DEV_DOEPINT10_STSPHSERCVD register field value. */
103743 #define ALT_USB_DEV_DOEPINT10_STSPHSERCVD_SET_MSK 0x00000020
103744 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_STSPHSERCVD register field value. */
103745 #define ALT_USB_DEV_DOEPINT10_STSPHSERCVD_CLR_MSK 0xffffffdf
103746 /* The reset value of the ALT_USB_DEV_DOEPINT10_STSPHSERCVD register field. */
103747 #define ALT_USB_DEV_DOEPINT10_STSPHSERCVD_RESET 0x0
103748 /* Extracts the ALT_USB_DEV_DOEPINT10_STSPHSERCVD field value from a register. */
103749 #define ALT_USB_DEV_DOEPINT10_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
103750 /* Produces a ALT_USB_DEV_DOEPINT10_STSPHSERCVD register field value suitable for setting the register. */
103751 #define ALT_USB_DEV_DOEPINT10_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
103752 
103753 /*
103754  * Field : Back-to-Back SETUP Packets Received - back2backsetup
103755  *
103756  * Applies to Control OUT endpoints only. This bit indicates that the core has
103757  * received more than three back-to-back SETUP packets for this particular
103758  * endpoint. for information about handling this interrupt,
103759  *
103760  * Field Enumeration Values:
103761  *
103762  * Enum | Value | Description
103763  * :---------------------------------------------|:------|:---------------------------------------
103764  * ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
103765  * ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
103766  *
103767  * Field Access Macros:
103768  *
103769  */
103770 /*
103771  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP
103772  *
103773  * No Back-to-Back SETUP Packets Received
103774  */
103775 #define ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP_E_INACT 0x0
103776 /*
103777  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP
103778  *
103779  * Back-to-Back SETUP Packets Received
103780  */
103781 #define ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP_E_ACT 0x1
103782 
103783 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP register field. */
103784 #define ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP_LSB 6
103785 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP register field. */
103786 #define ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP_MSB 6
103787 /* The width in bits of the ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP register field. */
103788 #define ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP_WIDTH 1
103789 /* The mask used to set the ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP register field value. */
103790 #define ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP_SET_MSK 0x00000040
103791 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP register field value. */
103792 #define ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP_CLR_MSK 0xffffffbf
103793 /* The reset value of the ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP register field. */
103794 #define ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP_RESET 0x0
103795 /* Extracts the ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP field value from a register. */
103796 #define ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
103797 /* Produces a ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP register field value suitable for setting the register. */
103798 #define ALT_USB_DEV_DOEPINT10_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
103799 
103800 /*
103801  * Field : OUT Packet Error - outpkterr
103802  *
103803  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
103804  * an overflow or a CRC error for non-Isochronous OUT packet.
103805  *
103806  * Field Enumeration Values:
103807  *
103808  * Enum | Value | Description
103809  * :----------------------------------------|:------|:--------------------
103810  * ALT_USB_DEV_DOEPINT10_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
103811  * ALT_USB_DEV_DOEPINT10_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
103812  *
103813  * Field Access Macros:
103814  *
103815  */
103816 /*
103817  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_OUTPKTERR
103818  *
103819  * No OUT Packet Error
103820  */
103821 #define ALT_USB_DEV_DOEPINT10_OUTPKTERR_E_INACT 0x0
103822 /*
103823  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_OUTPKTERR
103824  *
103825  * OUT Packet Error
103826  */
103827 #define ALT_USB_DEV_DOEPINT10_OUTPKTERR_E_ACT 0x1
103828 
103829 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_OUTPKTERR register field. */
103830 #define ALT_USB_DEV_DOEPINT10_OUTPKTERR_LSB 8
103831 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_OUTPKTERR register field. */
103832 #define ALT_USB_DEV_DOEPINT10_OUTPKTERR_MSB 8
103833 /* The width in bits of the ALT_USB_DEV_DOEPINT10_OUTPKTERR register field. */
103834 #define ALT_USB_DEV_DOEPINT10_OUTPKTERR_WIDTH 1
103835 /* The mask used to set the ALT_USB_DEV_DOEPINT10_OUTPKTERR register field value. */
103836 #define ALT_USB_DEV_DOEPINT10_OUTPKTERR_SET_MSK 0x00000100
103837 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_OUTPKTERR register field value. */
103838 #define ALT_USB_DEV_DOEPINT10_OUTPKTERR_CLR_MSK 0xfffffeff
103839 /* The reset value of the ALT_USB_DEV_DOEPINT10_OUTPKTERR register field. */
103840 #define ALT_USB_DEV_DOEPINT10_OUTPKTERR_RESET 0x0
103841 /* Extracts the ALT_USB_DEV_DOEPINT10_OUTPKTERR field value from a register. */
103842 #define ALT_USB_DEV_DOEPINT10_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
103843 /* Produces a ALT_USB_DEV_DOEPINT10_OUTPKTERR register field value suitable for setting the register. */
103844 #define ALT_USB_DEV_DOEPINT10_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
103845 
103846 /*
103847  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
103848  *
103849  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
103850  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
103851  * the descriptor accessed is not ready for the Core to process, such as Host busy
103852  * or DMA done
103853  *
103854  * Field Enumeration Values:
103855  *
103856  * Enum | Value | Description
103857  * :--------------------------------------|:------|:--------------
103858  * ALT_USB_DEV_DOEPINT10_BNAINTR_E_INACT | 0x0 | No interrupt
103859  * ALT_USB_DEV_DOEPINT10_BNAINTR_E_ACT | 0x1 | BNA interrupt
103860  *
103861  * Field Access Macros:
103862  *
103863  */
103864 /*
103865  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_BNAINTR
103866  *
103867  * No interrupt
103868  */
103869 #define ALT_USB_DEV_DOEPINT10_BNAINTR_E_INACT 0x0
103870 /*
103871  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_BNAINTR
103872  *
103873  * BNA interrupt
103874  */
103875 #define ALT_USB_DEV_DOEPINT10_BNAINTR_E_ACT 0x1
103876 
103877 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_BNAINTR register field. */
103878 #define ALT_USB_DEV_DOEPINT10_BNAINTR_LSB 9
103879 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_BNAINTR register field. */
103880 #define ALT_USB_DEV_DOEPINT10_BNAINTR_MSB 9
103881 /* The width in bits of the ALT_USB_DEV_DOEPINT10_BNAINTR register field. */
103882 #define ALT_USB_DEV_DOEPINT10_BNAINTR_WIDTH 1
103883 /* The mask used to set the ALT_USB_DEV_DOEPINT10_BNAINTR register field value. */
103884 #define ALT_USB_DEV_DOEPINT10_BNAINTR_SET_MSK 0x00000200
103885 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_BNAINTR register field value. */
103886 #define ALT_USB_DEV_DOEPINT10_BNAINTR_CLR_MSK 0xfffffdff
103887 /* The reset value of the ALT_USB_DEV_DOEPINT10_BNAINTR register field. */
103888 #define ALT_USB_DEV_DOEPINT10_BNAINTR_RESET 0x0
103889 /* Extracts the ALT_USB_DEV_DOEPINT10_BNAINTR field value from a register. */
103890 #define ALT_USB_DEV_DOEPINT10_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
103891 /* Produces a ALT_USB_DEV_DOEPINT10_BNAINTR register field value suitable for setting the register. */
103892 #define ALT_USB_DEV_DOEPINT10_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
103893 
103894 /*
103895  * Field : Packet Drop Status - pktdrpsts
103896  *
103897  * This bit indicates to the application that an ISOC OUT packet has been dropped.
103898  * This bit does not have an associated mask bit and does not generate an
103899  * interrupt.
103900  *
103901  * Field Enumeration Values:
103902  *
103903  * Enum | Value | Description
103904  * :----------------------------------------|:------|:-----------------------------
103905  * ALT_USB_DEV_DOEPINT10_PKTDRPSTS_E_INACT | 0x0 | No interrupt
103906  * ALT_USB_DEV_DOEPINT10_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
103907  *
103908  * Field Access Macros:
103909  *
103910  */
103911 /*
103912  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_PKTDRPSTS
103913  *
103914  * No interrupt
103915  */
103916 #define ALT_USB_DEV_DOEPINT10_PKTDRPSTS_E_INACT 0x0
103917 /*
103918  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_PKTDRPSTS
103919  *
103920  * Packet Drop Status interrupt
103921  */
103922 #define ALT_USB_DEV_DOEPINT10_PKTDRPSTS_E_ACT 0x1
103923 
103924 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_PKTDRPSTS register field. */
103925 #define ALT_USB_DEV_DOEPINT10_PKTDRPSTS_LSB 11
103926 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_PKTDRPSTS register field. */
103927 #define ALT_USB_DEV_DOEPINT10_PKTDRPSTS_MSB 11
103928 /* The width in bits of the ALT_USB_DEV_DOEPINT10_PKTDRPSTS register field. */
103929 #define ALT_USB_DEV_DOEPINT10_PKTDRPSTS_WIDTH 1
103930 /* The mask used to set the ALT_USB_DEV_DOEPINT10_PKTDRPSTS register field value. */
103931 #define ALT_USB_DEV_DOEPINT10_PKTDRPSTS_SET_MSK 0x00000800
103932 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_PKTDRPSTS register field value. */
103933 #define ALT_USB_DEV_DOEPINT10_PKTDRPSTS_CLR_MSK 0xfffff7ff
103934 /* The reset value of the ALT_USB_DEV_DOEPINT10_PKTDRPSTS register field. */
103935 #define ALT_USB_DEV_DOEPINT10_PKTDRPSTS_RESET 0x0
103936 /* Extracts the ALT_USB_DEV_DOEPINT10_PKTDRPSTS field value from a register. */
103937 #define ALT_USB_DEV_DOEPINT10_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
103938 /* Produces a ALT_USB_DEV_DOEPINT10_PKTDRPSTS register field value suitable for setting the register. */
103939 #define ALT_USB_DEV_DOEPINT10_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
103940 
103941 /*
103942  * Field : BbleErr Interrupt - bbleerr
103943  *
103944  * The core generates this interrupt when babble is received for the endpoint.
103945  *
103946  * Field Enumeration Values:
103947  *
103948  * Enum | Value | Description
103949  * :--------------------------------------|:------|:------------------
103950  * ALT_USB_DEV_DOEPINT10_BBLEERR_E_INACT | 0x0 | No interrupt
103951  * ALT_USB_DEV_DOEPINT10_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
103952  *
103953  * Field Access Macros:
103954  *
103955  */
103956 /*
103957  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_BBLEERR
103958  *
103959  * No interrupt
103960  */
103961 #define ALT_USB_DEV_DOEPINT10_BBLEERR_E_INACT 0x0
103962 /*
103963  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_BBLEERR
103964  *
103965  * BbleErr interrupt
103966  */
103967 #define ALT_USB_DEV_DOEPINT10_BBLEERR_E_ACT 0x1
103968 
103969 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_BBLEERR register field. */
103970 #define ALT_USB_DEV_DOEPINT10_BBLEERR_LSB 12
103971 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_BBLEERR register field. */
103972 #define ALT_USB_DEV_DOEPINT10_BBLEERR_MSB 12
103973 /* The width in bits of the ALT_USB_DEV_DOEPINT10_BBLEERR register field. */
103974 #define ALT_USB_DEV_DOEPINT10_BBLEERR_WIDTH 1
103975 /* The mask used to set the ALT_USB_DEV_DOEPINT10_BBLEERR register field value. */
103976 #define ALT_USB_DEV_DOEPINT10_BBLEERR_SET_MSK 0x00001000
103977 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_BBLEERR register field value. */
103978 #define ALT_USB_DEV_DOEPINT10_BBLEERR_CLR_MSK 0xffffefff
103979 /* The reset value of the ALT_USB_DEV_DOEPINT10_BBLEERR register field. */
103980 #define ALT_USB_DEV_DOEPINT10_BBLEERR_RESET 0x0
103981 /* Extracts the ALT_USB_DEV_DOEPINT10_BBLEERR field value from a register. */
103982 #define ALT_USB_DEV_DOEPINT10_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
103983 /* Produces a ALT_USB_DEV_DOEPINT10_BBLEERR register field value suitable for setting the register. */
103984 #define ALT_USB_DEV_DOEPINT10_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
103985 
103986 /*
103987  * Field : NAK Interrupt - nakintrpt
103988  *
103989  * The core generates this interrupt when a NAK is transmitted or received by the
103990  * device. In case of isochronous IN endpoints the interrupt gets generated when a
103991  * zero length packet is transmitted due to un-availability of data in the TXFifo.
103992  *
103993  * Field Enumeration Values:
103994  *
103995  * Enum | Value | Description
103996  * :----------------------------------------|:------|:--------------
103997  * ALT_USB_DEV_DOEPINT10_NAKINTRPT_E_INACT | 0x0 | No interrupt
103998  * ALT_USB_DEV_DOEPINT10_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
103999  *
104000  * Field Access Macros:
104001  *
104002  */
104003 /*
104004  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_NAKINTRPT
104005  *
104006  * No interrupt
104007  */
104008 #define ALT_USB_DEV_DOEPINT10_NAKINTRPT_E_INACT 0x0
104009 /*
104010  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_NAKINTRPT
104011  *
104012  * NAK Interrupt
104013  */
104014 #define ALT_USB_DEV_DOEPINT10_NAKINTRPT_E_ACT 0x1
104015 
104016 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_NAKINTRPT register field. */
104017 #define ALT_USB_DEV_DOEPINT10_NAKINTRPT_LSB 13
104018 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_NAKINTRPT register field. */
104019 #define ALT_USB_DEV_DOEPINT10_NAKINTRPT_MSB 13
104020 /* The width in bits of the ALT_USB_DEV_DOEPINT10_NAKINTRPT register field. */
104021 #define ALT_USB_DEV_DOEPINT10_NAKINTRPT_WIDTH 1
104022 /* The mask used to set the ALT_USB_DEV_DOEPINT10_NAKINTRPT register field value. */
104023 #define ALT_USB_DEV_DOEPINT10_NAKINTRPT_SET_MSK 0x00002000
104024 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_NAKINTRPT register field value. */
104025 #define ALT_USB_DEV_DOEPINT10_NAKINTRPT_CLR_MSK 0xffffdfff
104026 /* The reset value of the ALT_USB_DEV_DOEPINT10_NAKINTRPT register field. */
104027 #define ALT_USB_DEV_DOEPINT10_NAKINTRPT_RESET 0x0
104028 /* Extracts the ALT_USB_DEV_DOEPINT10_NAKINTRPT field value from a register. */
104029 #define ALT_USB_DEV_DOEPINT10_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
104030 /* Produces a ALT_USB_DEV_DOEPINT10_NAKINTRPT register field value suitable for setting the register. */
104031 #define ALT_USB_DEV_DOEPINT10_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
104032 
104033 /*
104034  * Field : NYET Interrupt - nyetintrpt
104035  *
104036  * The core generates this interrupt when a NYET response is transmitted for a non
104037  * isochronous OUT endpoint.
104038  *
104039  * Field Enumeration Values:
104040  *
104041  * Enum | Value | Description
104042  * :-----------------------------------------|:------|:---------------
104043  * ALT_USB_DEV_DOEPINT10_NYETINTRPT_E_INACT | 0x0 | No interrupt
104044  * ALT_USB_DEV_DOEPINT10_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
104045  *
104046  * Field Access Macros:
104047  *
104048  */
104049 /*
104050  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_NYETINTRPT
104051  *
104052  * No interrupt
104053  */
104054 #define ALT_USB_DEV_DOEPINT10_NYETINTRPT_E_INACT 0x0
104055 /*
104056  * Enumerated value for register field ALT_USB_DEV_DOEPINT10_NYETINTRPT
104057  *
104058  * NYET Interrupt
104059  */
104060 #define ALT_USB_DEV_DOEPINT10_NYETINTRPT_E_ACT 0x1
104061 
104062 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT10_NYETINTRPT register field. */
104063 #define ALT_USB_DEV_DOEPINT10_NYETINTRPT_LSB 14
104064 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT10_NYETINTRPT register field. */
104065 #define ALT_USB_DEV_DOEPINT10_NYETINTRPT_MSB 14
104066 /* The width in bits of the ALT_USB_DEV_DOEPINT10_NYETINTRPT register field. */
104067 #define ALT_USB_DEV_DOEPINT10_NYETINTRPT_WIDTH 1
104068 /* The mask used to set the ALT_USB_DEV_DOEPINT10_NYETINTRPT register field value. */
104069 #define ALT_USB_DEV_DOEPINT10_NYETINTRPT_SET_MSK 0x00004000
104070 /* The mask used to clear the ALT_USB_DEV_DOEPINT10_NYETINTRPT register field value. */
104071 #define ALT_USB_DEV_DOEPINT10_NYETINTRPT_CLR_MSK 0xffffbfff
104072 /* The reset value of the ALT_USB_DEV_DOEPINT10_NYETINTRPT register field. */
104073 #define ALT_USB_DEV_DOEPINT10_NYETINTRPT_RESET 0x0
104074 /* Extracts the ALT_USB_DEV_DOEPINT10_NYETINTRPT field value from a register. */
104075 #define ALT_USB_DEV_DOEPINT10_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
104076 /* Produces a ALT_USB_DEV_DOEPINT10_NYETINTRPT register field value suitable for setting the register. */
104077 #define ALT_USB_DEV_DOEPINT10_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
104078 
104079 #ifndef __ASSEMBLY__
104080 /*
104081  * WARNING: The C register and register group struct declarations are provided for
104082  * convenience and illustrative purposes. They should, however, be used with
104083  * caution as the C language standard provides no guarantees about the alignment or
104084  * atomicity of device memory accesses. The recommended practice for writing
104085  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
104086  * alt_write_word() functions.
104087  *
104088  * The struct declaration for register ALT_USB_DEV_DOEPINT10.
104089  */
104090 struct ALT_USB_DEV_DOEPINT10_s
104091 {
104092  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
104093  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
104094  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT10_AHBERR */
104095  const uint32_t setup : 1; /* SETUP Phase Done */
104096  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
104097  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
104098  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
104099  uint32_t : 1; /* *UNDEFINED* */
104100  const uint32_t outpkterr : 1; /* OUT Packet Error */
104101  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
104102  uint32_t : 1; /* *UNDEFINED* */
104103  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
104104  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
104105  const uint32_t nakintrpt : 1; /* NAK Interrupt */
104106  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
104107  uint32_t : 17; /* *UNDEFINED* */
104108 };
104109 
104110 /* The typedef declaration for register ALT_USB_DEV_DOEPINT10. */
104111 typedef volatile struct ALT_USB_DEV_DOEPINT10_s ALT_USB_DEV_DOEPINT10_t;
104112 #endif /* __ASSEMBLY__ */
104113 
104114 /* The byte offset of the ALT_USB_DEV_DOEPINT10 register from the beginning of the component. */
104115 #define ALT_USB_DEV_DOEPINT10_OFST 0x448
104116 /* The address of the ALT_USB_DEV_DOEPINT10 register. */
104117 #define ALT_USB_DEV_DOEPINT10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT10_OFST))
104118 
104119 /*
104120  * Register : Device OUT Endpoint 10 Transfer Size Register - doeptsiz10
104121  *
104122  * The application must modify this register before enabling the endpoint. Once the
104123  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
104124  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
104125  * application can only read this register once the core has cleared the Endpoint
104126  * Enable bit.
104127  *
104128  * Register Layout
104129  *
104130  * Bits | Access | Reset | Description
104131  * :--------|:-------|:------|:-------------------
104132  * [18:0] | RW | 0x0 | Transfer Size
104133  * [28:19] | RW | 0x0 | Packet Count
104134  * [30:29] | R | 0x0 | SETUP Packet Count
104135  * [31] | ??? | 0x0 | *UNDEFINED*
104136  *
104137  */
104138 /*
104139  * Field : Transfer Size - xfersize
104140  *
104141  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
104142  * application only after it has exhausted the transfer size amount of data. The
104143  * transfer size can be Set to the maximum packet size of the endpoint, to be
104144  * interrupted at the end of each packet. The core decrements this field every time
104145  * a packet from the external memory is written to the RxFIFO.
104146  *
104147  * Field Access Macros:
104148  *
104149  */
104150 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ10_XFERSIZE register field. */
104151 #define ALT_USB_DEV_DOEPTSIZ10_XFERSIZE_LSB 0
104152 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ10_XFERSIZE register field. */
104153 #define ALT_USB_DEV_DOEPTSIZ10_XFERSIZE_MSB 18
104154 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ10_XFERSIZE register field. */
104155 #define ALT_USB_DEV_DOEPTSIZ10_XFERSIZE_WIDTH 19
104156 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ10_XFERSIZE register field value. */
104157 #define ALT_USB_DEV_DOEPTSIZ10_XFERSIZE_SET_MSK 0x0007ffff
104158 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ10_XFERSIZE register field value. */
104159 #define ALT_USB_DEV_DOEPTSIZ10_XFERSIZE_CLR_MSK 0xfff80000
104160 /* The reset value of the ALT_USB_DEV_DOEPTSIZ10_XFERSIZE register field. */
104161 #define ALT_USB_DEV_DOEPTSIZ10_XFERSIZE_RESET 0x0
104162 /* Extracts the ALT_USB_DEV_DOEPTSIZ10_XFERSIZE field value from a register. */
104163 #define ALT_USB_DEV_DOEPTSIZ10_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
104164 /* Produces a ALT_USB_DEV_DOEPTSIZ10_XFERSIZE register field value suitable for setting the register. */
104165 #define ALT_USB_DEV_DOEPTSIZ10_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
104166 
104167 /*
104168  * Field : Packet Count - pktcnt
104169  *
104170  * Indicates the total number of USB packets that constitute the Transfer Size
104171  * amount of data for endpoint 0.This field is decremented every time a packet
104172  * (maximum size or short packet) is read from the RxFIFO.
104173  *
104174  * Field Access Macros:
104175  *
104176  */
104177 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ10_PKTCNT register field. */
104178 #define ALT_USB_DEV_DOEPTSIZ10_PKTCNT_LSB 19
104179 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ10_PKTCNT register field. */
104180 #define ALT_USB_DEV_DOEPTSIZ10_PKTCNT_MSB 28
104181 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ10_PKTCNT register field. */
104182 #define ALT_USB_DEV_DOEPTSIZ10_PKTCNT_WIDTH 10
104183 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ10_PKTCNT register field value. */
104184 #define ALT_USB_DEV_DOEPTSIZ10_PKTCNT_SET_MSK 0x1ff80000
104185 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ10_PKTCNT register field value. */
104186 #define ALT_USB_DEV_DOEPTSIZ10_PKTCNT_CLR_MSK 0xe007ffff
104187 /* The reset value of the ALT_USB_DEV_DOEPTSIZ10_PKTCNT register field. */
104188 #define ALT_USB_DEV_DOEPTSIZ10_PKTCNT_RESET 0x0
104189 /* Extracts the ALT_USB_DEV_DOEPTSIZ10_PKTCNT field value from a register. */
104190 #define ALT_USB_DEV_DOEPTSIZ10_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
104191 /* Produces a ALT_USB_DEV_DOEPTSIZ10_PKTCNT register field value suitable for setting the register. */
104192 #define ALT_USB_DEV_DOEPTSIZ10_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
104193 
104194 /*
104195  * Field : SETUP Packet Count - rxdpid
104196  *
104197  * Applies to isochronous OUT endpoints only.This is the data PID received in the
104198  * last packet for this endpoint. Use datax.
104199  *
104200  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
104201  * number of back-to-back SETUP data packets the endpoint can receive.
104202  *
104203  * Field Enumeration Values:
104204  *
104205  * Enum | Value | Description
104206  * :------------------------------------------|:------|:-------------------
104207  * ALT_USB_DEV_DOEPTSIZ10_RXDPID_E_DATA0 | 0x0 | DATA0
104208  * ALT_USB_DEV_DOEPTSIZ10_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
104209  * ALT_USB_DEV_DOEPTSIZ10_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
104210  * ALT_USB_DEV_DOEPTSIZ10_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
104211  *
104212  * Field Access Macros:
104213  *
104214  */
104215 /*
104216  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ10_RXDPID
104217  *
104218  * DATA0
104219  */
104220 #define ALT_USB_DEV_DOEPTSIZ10_RXDPID_E_DATA0 0x0
104221 /*
104222  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ10_RXDPID
104223  *
104224  * DATA2 or 1 packet
104225  */
104226 #define ALT_USB_DEV_DOEPTSIZ10_RXDPID_E_DATA2PKT1 0x1
104227 /*
104228  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ10_RXDPID
104229  *
104230  * DATA1 or 2 packets
104231  */
104232 #define ALT_USB_DEV_DOEPTSIZ10_RXDPID_E_DATA1PKT2 0x2
104233 /*
104234  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ10_RXDPID
104235  *
104236  * MDATA or 3 packets
104237  */
104238 #define ALT_USB_DEV_DOEPTSIZ10_RXDPID_E_MDATAPKT3 0x3
104239 
104240 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ10_RXDPID register field. */
104241 #define ALT_USB_DEV_DOEPTSIZ10_RXDPID_LSB 29
104242 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ10_RXDPID register field. */
104243 #define ALT_USB_DEV_DOEPTSIZ10_RXDPID_MSB 30
104244 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ10_RXDPID register field. */
104245 #define ALT_USB_DEV_DOEPTSIZ10_RXDPID_WIDTH 2
104246 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ10_RXDPID register field value. */
104247 #define ALT_USB_DEV_DOEPTSIZ10_RXDPID_SET_MSK 0x60000000
104248 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ10_RXDPID register field value. */
104249 #define ALT_USB_DEV_DOEPTSIZ10_RXDPID_CLR_MSK 0x9fffffff
104250 /* The reset value of the ALT_USB_DEV_DOEPTSIZ10_RXDPID register field. */
104251 #define ALT_USB_DEV_DOEPTSIZ10_RXDPID_RESET 0x0
104252 /* Extracts the ALT_USB_DEV_DOEPTSIZ10_RXDPID field value from a register. */
104253 #define ALT_USB_DEV_DOEPTSIZ10_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
104254 /* Produces a ALT_USB_DEV_DOEPTSIZ10_RXDPID register field value suitable for setting the register. */
104255 #define ALT_USB_DEV_DOEPTSIZ10_RXDPID_SET(value) (((value) << 29) & 0x60000000)
104256 
104257 #ifndef __ASSEMBLY__
104258 /*
104259  * WARNING: The C register and register group struct declarations are provided for
104260  * convenience and illustrative purposes. They should, however, be used with
104261  * caution as the C language standard provides no guarantees about the alignment or
104262  * atomicity of device memory accesses. The recommended practice for writing
104263  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
104264  * alt_write_word() functions.
104265  *
104266  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ10.
104267  */
104268 struct ALT_USB_DEV_DOEPTSIZ10_s
104269 {
104270  uint32_t xfersize : 19; /* Transfer Size */
104271  uint32_t pktcnt : 10; /* Packet Count */
104272  const uint32_t rxdpid : 2; /* SETUP Packet Count */
104273  uint32_t : 1; /* *UNDEFINED* */
104274 };
104275 
104276 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ10. */
104277 typedef volatile struct ALT_USB_DEV_DOEPTSIZ10_s ALT_USB_DEV_DOEPTSIZ10_t;
104278 #endif /* __ASSEMBLY__ */
104279 
104280 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ10 register from the beginning of the component. */
104281 #define ALT_USB_DEV_DOEPTSIZ10_OFST 0x450
104282 /* The address of the ALT_USB_DEV_DOEPTSIZ10 register. */
104283 #define ALT_USB_DEV_DOEPTSIZ10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ10_OFST))
104284 
104285 /*
104286  * Register : Device OUT Endpoint 10 DMA Address Register - doepdma10
104287  *
104288  * DMA OUT Address.
104289  *
104290  * Register Layout
104291  *
104292  * Bits | Access | Reset | Description
104293  * :-------|:-------|:--------|:------------
104294  * [31:0] | RW | Unknown | DMA Address
104295  *
104296  */
104297 /*
104298  * Field : DMA Address - doepdma10
104299  *
104300  * Holds the start address of the external memory for storing or fetching endpoint
104301  * data. for control endpoints, this field stores control OUT data packets as well
104302  * as SETUP transaction data packets. When more than three SETUP packets are
104303  * received back-to-back, the SETUP data packet in the memory is overwritten. This
104304  * register is incremented on every AHB transaction. The application can give only
104305  * a DWORD-aligned address.
104306  *
104307  * When Scatter/Gather DMA mode is not enabled, the application programs the start
104308  * address value in this field.
104309  *
104310  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
104311  * for the descriptor list.
104312  *
104313  * Field Access Macros:
104314  *
104315  */
104316 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA10_DOEPDMA10 register field. */
104317 #define ALT_USB_DEV_DOEPDMA10_DOEPDMA10_LSB 0
104318 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA10_DOEPDMA10 register field. */
104319 #define ALT_USB_DEV_DOEPDMA10_DOEPDMA10_MSB 31
104320 /* The width in bits of the ALT_USB_DEV_DOEPDMA10_DOEPDMA10 register field. */
104321 #define ALT_USB_DEV_DOEPDMA10_DOEPDMA10_WIDTH 32
104322 /* The mask used to set the ALT_USB_DEV_DOEPDMA10_DOEPDMA10 register field value. */
104323 #define ALT_USB_DEV_DOEPDMA10_DOEPDMA10_SET_MSK 0xffffffff
104324 /* The mask used to clear the ALT_USB_DEV_DOEPDMA10_DOEPDMA10 register field value. */
104325 #define ALT_USB_DEV_DOEPDMA10_DOEPDMA10_CLR_MSK 0x00000000
104326 /* The reset value of the ALT_USB_DEV_DOEPDMA10_DOEPDMA10 register field is UNKNOWN. */
104327 #define ALT_USB_DEV_DOEPDMA10_DOEPDMA10_RESET 0x0
104328 /* Extracts the ALT_USB_DEV_DOEPDMA10_DOEPDMA10 field value from a register. */
104329 #define ALT_USB_DEV_DOEPDMA10_DOEPDMA10_GET(value) (((value) & 0xffffffff) >> 0)
104330 /* Produces a ALT_USB_DEV_DOEPDMA10_DOEPDMA10 register field value suitable for setting the register. */
104331 #define ALT_USB_DEV_DOEPDMA10_DOEPDMA10_SET(value) (((value) << 0) & 0xffffffff)
104332 
104333 #ifndef __ASSEMBLY__
104334 /*
104335  * WARNING: The C register and register group struct declarations are provided for
104336  * convenience and illustrative purposes. They should, however, be used with
104337  * caution as the C language standard provides no guarantees about the alignment or
104338  * atomicity of device memory accesses. The recommended practice for writing
104339  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
104340  * alt_write_word() functions.
104341  *
104342  * The struct declaration for register ALT_USB_DEV_DOEPDMA10.
104343  */
104344 struct ALT_USB_DEV_DOEPDMA10_s
104345 {
104346  uint32_t doepdma10 : 32; /* DMA Address */
104347 };
104348 
104349 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA10. */
104350 typedef volatile struct ALT_USB_DEV_DOEPDMA10_s ALT_USB_DEV_DOEPDMA10_t;
104351 #endif /* __ASSEMBLY__ */
104352 
104353 /* The byte offset of the ALT_USB_DEV_DOEPDMA10 register from the beginning of the component. */
104354 #define ALT_USB_DEV_DOEPDMA10_OFST 0x454
104355 /* The address of the ALT_USB_DEV_DOEPDMA10 register. */
104356 #define ALT_USB_DEV_DOEPDMA10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA10_OFST))
104357 
104358 /*
104359  * Register : Device OUT Endpoint 10 DMA Buffer Address Register - doepdmab10
104360  *
104361  * DMA Buffer Address.
104362  *
104363  * Register Layout
104364  *
104365  * Bits | Access | Reset | Description
104366  * :-------|:-------|:--------|:-------------------
104367  * [31:0] | R | Unknown | DMA Buffer Address
104368  *
104369  */
104370 /*
104371  * Field : DMA Buffer Address - doepdmab10
104372  *
104373  * Holds the current buffer address. This register is updated as and when the data
104374  * transfer for the corresponding end point is in progress. This register is
104375  * present only in Scatter/Gather DMA mode.
104376  *
104377  * Field Access Macros:
104378  *
104379  */
104380 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10 register field. */
104381 #define ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10_LSB 0
104382 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10 register field. */
104383 #define ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10_MSB 31
104384 /* The width in bits of the ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10 register field. */
104385 #define ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10_WIDTH 32
104386 /* The mask used to set the ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10 register field value. */
104387 #define ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10_SET_MSK 0xffffffff
104388 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10 register field value. */
104389 #define ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10_CLR_MSK 0x00000000
104390 /* The reset value of the ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10 register field is UNKNOWN. */
104391 #define ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10_RESET 0x0
104392 /* Extracts the ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10 field value from a register. */
104393 #define ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10_GET(value) (((value) & 0xffffffff) >> 0)
104394 /* Produces a ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10 register field value suitable for setting the register. */
104395 #define ALT_USB_DEV_DOEPDMAB10_DOEPDMAB10_SET(value) (((value) << 0) & 0xffffffff)
104396 
104397 #ifndef __ASSEMBLY__
104398 /*
104399  * WARNING: The C register and register group struct declarations are provided for
104400  * convenience and illustrative purposes. They should, however, be used with
104401  * caution as the C language standard provides no guarantees about the alignment or
104402  * atomicity of device memory accesses. The recommended practice for writing
104403  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
104404  * alt_write_word() functions.
104405  *
104406  * The struct declaration for register ALT_USB_DEV_DOEPDMAB10.
104407  */
104408 struct ALT_USB_DEV_DOEPDMAB10_s
104409 {
104410  const uint32_t doepdmab10 : 32; /* DMA Buffer Address */
104411 };
104412 
104413 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB10. */
104414 typedef volatile struct ALT_USB_DEV_DOEPDMAB10_s ALT_USB_DEV_DOEPDMAB10_t;
104415 #endif /* __ASSEMBLY__ */
104416 
104417 /* The byte offset of the ALT_USB_DEV_DOEPDMAB10 register from the beginning of the component. */
104418 #define ALT_USB_DEV_DOEPDMAB10_OFST 0x45c
104419 /* The address of the ALT_USB_DEV_DOEPDMAB10 register. */
104420 #define ALT_USB_DEV_DOEPDMAB10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB10_OFST))
104421 
104422 /*
104423  * Register : Device Control OUT Endpoint 11 Control Register - doepctl11
104424  *
104425  * Out Endpoint 11.
104426  *
104427  * Register Layout
104428  *
104429  * Bits | Access | Reset | Description
104430  * :--------|:-------|:------|:--------------------
104431  * [10:0] | RW | 0x0 | Maximum Packet Size
104432  * [14:11] | ??? | 0x0 | *UNDEFINED*
104433  * [15] | RW | 0x0 | USB Active Endpoint
104434  * [16] | R | 0x0 | Endpoint Data PID
104435  * [17] | R | 0x0 | NAK Status
104436  * [19:18] | RW | 0x0 | Endpoint Type
104437  * [20] | RW | 0x0 | Snoop Mode
104438  * [21] | R | 0x0 | STALL Handshake
104439  * [25:22] | ??? | 0x0 | *UNDEFINED*
104440  * [26] | W | 0x0 | Clear NAK
104441  * [27] | W | 0x0 | Set NAK
104442  * [28] | W | 0x0 | Set DATA0 PID
104443  * [29] | W | 0x0 | Set DATA1 PID
104444  * [30] | R | 0x0 | Endpoint Disable
104445  * [31] | R | 0x0 | Endpoint Enable
104446  *
104447  */
104448 /*
104449  * Field : Maximum Packet Size - mps
104450  *
104451  * Applies to IN and OUT endpoints. The application must program this field with
104452  * the maximum packet size for the current logical endpoint. This value is in
104453  * bytes.
104454  *
104455  * Field Access Macros:
104456  *
104457  */
104458 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_MPS register field. */
104459 #define ALT_USB_DEV_DOEPCTL11_MPS_LSB 0
104460 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_MPS register field. */
104461 #define ALT_USB_DEV_DOEPCTL11_MPS_MSB 10
104462 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_MPS register field. */
104463 #define ALT_USB_DEV_DOEPCTL11_MPS_WIDTH 11
104464 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_MPS register field value. */
104465 #define ALT_USB_DEV_DOEPCTL11_MPS_SET_MSK 0x000007ff
104466 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_MPS register field value. */
104467 #define ALT_USB_DEV_DOEPCTL11_MPS_CLR_MSK 0xfffff800
104468 /* The reset value of the ALT_USB_DEV_DOEPCTL11_MPS register field. */
104469 #define ALT_USB_DEV_DOEPCTL11_MPS_RESET 0x0
104470 /* Extracts the ALT_USB_DEV_DOEPCTL11_MPS field value from a register. */
104471 #define ALT_USB_DEV_DOEPCTL11_MPS_GET(value) (((value) & 0x000007ff) >> 0)
104472 /* Produces a ALT_USB_DEV_DOEPCTL11_MPS register field value suitable for setting the register. */
104473 #define ALT_USB_DEV_DOEPCTL11_MPS_SET(value) (((value) << 0) & 0x000007ff)
104474 
104475 /*
104476  * Field : USB Active Endpoint - usbactep
104477  *
104478  * Indicates whether this endpoint is active in the current configuration and
104479  * interface. The core clears this bit for all endpoints (other than EP 0) after
104480  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
104481  * commands, the application must program endpoint registers accordingly and set
104482  * this bit.
104483  *
104484  * Field Enumeration Values:
104485  *
104486  * Enum | Value | Description
104487  * :--------------------------------------|:------|:--------------------
104488  * ALT_USB_DEV_DOEPCTL11_USBACTEP_E_DISD | 0x0 | Not Active
104489  * ALT_USB_DEV_DOEPCTL11_USBACTEP_E_END | 0x1 | USB Active Endpoint
104490  *
104491  * Field Access Macros:
104492  *
104493  */
104494 /*
104495  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_USBACTEP
104496  *
104497  * Not Active
104498  */
104499 #define ALT_USB_DEV_DOEPCTL11_USBACTEP_E_DISD 0x0
104500 /*
104501  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_USBACTEP
104502  *
104503  * USB Active Endpoint
104504  */
104505 #define ALT_USB_DEV_DOEPCTL11_USBACTEP_E_END 0x1
104506 
104507 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_USBACTEP register field. */
104508 #define ALT_USB_DEV_DOEPCTL11_USBACTEP_LSB 15
104509 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_USBACTEP register field. */
104510 #define ALT_USB_DEV_DOEPCTL11_USBACTEP_MSB 15
104511 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_USBACTEP register field. */
104512 #define ALT_USB_DEV_DOEPCTL11_USBACTEP_WIDTH 1
104513 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_USBACTEP register field value. */
104514 #define ALT_USB_DEV_DOEPCTL11_USBACTEP_SET_MSK 0x00008000
104515 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_USBACTEP register field value. */
104516 #define ALT_USB_DEV_DOEPCTL11_USBACTEP_CLR_MSK 0xffff7fff
104517 /* The reset value of the ALT_USB_DEV_DOEPCTL11_USBACTEP register field. */
104518 #define ALT_USB_DEV_DOEPCTL11_USBACTEP_RESET 0x0
104519 /* Extracts the ALT_USB_DEV_DOEPCTL11_USBACTEP field value from a register. */
104520 #define ALT_USB_DEV_DOEPCTL11_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
104521 /* Produces a ALT_USB_DEV_DOEPCTL11_USBACTEP register field value suitable for setting the register. */
104522 #define ALT_USB_DEV_DOEPCTL11_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
104523 
104524 /*
104525  * Field : Endpoint Data PID - dpid
104526  *
104527  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
104528  * packet to be received or transmitted on this endpoint. The application must
104529  * program the PID of the first packet to be received or transmitted on this
104530  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
104531  * SetD0PID fields of this register to program either DATA0 or DATA1 PID.
104532  *
104533  * 0: DATA0
104534  *
104535  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
104536  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
104537  * DMA mode:
104538  *
104539  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
104540  * number in which the core transmits/receives isochronous data for this endpoint.
104541  * The application must program the even/odd (micro) frame number in which it
104542  * intends to transmit/receive isochronous data for this endpoint using the
104543  * SetEvnFr and SetOddFr fields in this register.
104544  *
104545  * 0: Even (micro)frame
104546  *
104547  * 1: Odd (micro)frame
104548  *
104549  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
104550  * number in which to send data is provided in the transmit descriptor structure.
104551  * The frame in which data is received is updated in receive descriptor structure.
104552  *
104553  * Field Enumeration Values:
104554  *
104555  * Enum | Value | Description
104556  * :-----------------------------------|:------|:-----------------------------
104557  * ALT_USB_DEV_DOEPCTL11_DPID_E_INACT | 0x0 | Endpoint Data PID not active
104558  * ALT_USB_DEV_DOEPCTL11_DPID_E_ACT | 0x1 | Endpoint Data PID active
104559  *
104560  * Field Access Macros:
104561  *
104562  */
104563 /*
104564  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_DPID
104565  *
104566  * Endpoint Data PID not active
104567  */
104568 #define ALT_USB_DEV_DOEPCTL11_DPID_E_INACT 0x0
104569 /*
104570  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_DPID
104571  *
104572  * Endpoint Data PID active
104573  */
104574 #define ALT_USB_DEV_DOEPCTL11_DPID_E_ACT 0x1
104575 
104576 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_DPID register field. */
104577 #define ALT_USB_DEV_DOEPCTL11_DPID_LSB 16
104578 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_DPID register field. */
104579 #define ALT_USB_DEV_DOEPCTL11_DPID_MSB 16
104580 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_DPID register field. */
104581 #define ALT_USB_DEV_DOEPCTL11_DPID_WIDTH 1
104582 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_DPID register field value. */
104583 #define ALT_USB_DEV_DOEPCTL11_DPID_SET_MSK 0x00010000
104584 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_DPID register field value. */
104585 #define ALT_USB_DEV_DOEPCTL11_DPID_CLR_MSK 0xfffeffff
104586 /* The reset value of the ALT_USB_DEV_DOEPCTL11_DPID register field. */
104587 #define ALT_USB_DEV_DOEPCTL11_DPID_RESET 0x0
104588 /* Extracts the ALT_USB_DEV_DOEPCTL11_DPID field value from a register. */
104589 #define ALT_USB_DEV_DOEPCTL11_DPID_GET(value) (((value) & 0x00010000) >> 16)
104590 /* Produces a ALT_USB_DEV_DOEPCTL11_DPID register field value suitable for setting the register. */
104591 #define ALT_USB_DEV_DOEPCTL11_DPID_SET(value) (((value) << 16) & 0x00010000)
104592 
104593 /*
104594  * Field : NAK Status - naksts
104595  *
104596  * When either the application or the core sets this bit:
104597  *
104598  * * The core stops receiving any data on an OUT endpoint, even if there is space
104599  * in the RxFIFO to accommodate the incoming packet.
104600  *
104601  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
104602  * IN endpoint, even if there data is available in the TxFIFO.
104603  *
104604  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
104605  * even if there data is available in the TxFIFO.
104606  *
104607  * Irrespective of this bit's setting, the core always responds to SETUP data
104608  * packets with an ACK handshake.
104609  *
104610  * Field Enumeration Values:
104611  *
104612  * Enum | Value | Description
104613  * :--------------------------------------|:------|:------------------------------------------------
104614  * ALT_USB_DEV_DOEPCTL11_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
104615  * : | | based on the FIFO status
104616  * ALT_USB_DEV_DOEPCTL11_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
104617  * : | | endpoint
104618  *
104619  * Field Access Macros:
104620  *
104621  */
104622 /*
104623  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_NAKSTS
104624  *
104625  * The core is transmitting non-NAK handshakes based on the FIFO status
104626  */
104627 #define ALT_USB_DEV_DOEPCTL11_NAKSTS_E_NONNAK 0x0
104628 /*
104629  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_NAKSTS
104630  *
104631  * The core is transmitting NAK handshakes on this endpoint
104632  */
104633 #define ALT_USB_DEV_DOEPCTL11_NAKSTS_E_NAK 0x1
104634 
104635 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_NAKSTS register field. */
104636 #define ALT_USB_DEV_DOEPCTL11_NAKSTS_LSB 17
104637 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_NAKSTS register field. */
104638 #define ALT_USB_DEV_DOEPCTL11_NAKSTS_MSB 17
104639 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_NAKSTS register field. */
104640 #define ALT_USB_DEV_DOEPCTL11_NAKSTS_WIDTH 1
104641 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_NAKSTS register field value. */
104642 #define ALT_USB_DEV_DOEPCTL11_NAKSTS_SET_MSK 0x00020000
104643 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_NAKSTS register field value. */
104644 #define ALT_USB_DEV_DOEPCTL11_NAKSTS_CLR_MSK 0xfffdffff
104645 /* The reset value of the ALT_USB_DEV_DOEPCTL11_NAKSTS register field. */
104646 #define ALT_USB_DEV_DOEPCTL11_NAKSTS_RESET 0x0
104647 /* Extracts the ALT_USB_DEV_DOEPCTL11_NAKSTS field value from a register. */
104648 #define ALT_USB_DEV_DOEPCTL11_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
104649 /* Produces a ALT_USB_DEV_DOEPCTL11_NAKSTS register field value suitable for setting the register. */
104650 #define ALT_USB_DEV_DOEPCTL11_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
104651 
104652 /*
104653  * Field : Endpoint Type - eptype
104654  *
104655  * This is the transfer type supported by this logical endpoint.
104656  *
104657  * Field Enumeration Values:
104658  *
104659  * Enum | Value | Description
104660  * :-------------------------------------------|:------|:------------
104661  * ALT_USB_DEV_DOEPCTL11_EPTYPE_E_CTL | 0x0 | Control
104662  * ALT_USB_DEV_DOEPCTL11_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
104663  * ALT_USB_DEV_DOEPCTL11_EPTYPE_E_BULK | 0x2 | Bulk
104664  * ALT_USB_DEV_DOEPCTL11_EPTYPE_E_INTERRUP | 0x3 | Interrupt
104665  *
104666  * Field Access Macros:
104667  *
104668  */
104669 /*
104670  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_EPTYPE
104671  *
104672  * Control
104673  */
104674 #define ALT_USB_DEV_DOEPCTL11_EPTYPE_E_CTL 0x0
104675 /*
104676  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_EPTYPE
104677  *
104678  * Isochronous
104679  */
104680 #define ALT_USB_DEV_DOEPCTL11_EPTYPE_E_ISOCHRONOUS 0x1
104681 /*
104682  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_EPTYPE
104683  *
104684  * Bulk
104685  */
104686 #define ALT_USB_DEV_DOEPCTL11_EPTYPE_E_BULK 0x2
104687 /*
104688  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_EPTYPE
104689  *
104690  * Interrupt
104691  */
104692 #define ALT_USB_DEV_DOEPCTL11_EPTYPE_E_INTERRUP 0x3
104693 
104694 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_EPTYPE register field. */
104695 #define ALT_USB_DEV_DOEPCTL11_EPTYPE_LSB 18
104696 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_EPTYPE register field. */
104697 #define ALT_USB_DEV_DOEPCTL11_EPTYPE_MSB 19
104698 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_EPTYPE register field. */
104699 #define ALT_USB_DEV_DOEPCTL11_EPTYPE_WIDTH 2
104700 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_EPTYPE register field value. */
104701 #define ALT_USB_DEV_DOEPCTL11_EPTYPE_SET_MSK 0x000c0000
104702 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_EPTYPE register field value. */
104703 #define ALT_USB_DEV_DOEPCTL11_EPTYPE_CLR_MSK 0xfff3ffff
104704 /* The reset value of the ALT_USB_DEV_DOEPCTL11_EPTYPE register field. */
104705 #define ALT_USB_DEV_DOEPCTL11_EPTYPE_RESET 0x0
104706 /* Extracts the ALT_USB_DEV_DOEPCTL11_EPTYPE field value from a register. */
104707 #define ALT_USB_DEV_DOEPCTL11_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
104708 /* Produces a ALT_USB_DEV_DOEPCTL11_EPTYPE register field value suitable for setting the register. */
104709 #define ALT_USB_DEV_DOEPCTL11_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
104710 
104711 /*
104712  * Field : Snoop Mode - snp
104713  *
104714  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
104715  * In Snoop mode, the core does not check the correctness of OUT packets before
104716  * transferring them to application memory.
104717  *
104718  * Field Enumeration Values:
104719  *
104720  * Enum | Value | Description
104721  * :--------------------------------|:------|:-------------------
104722  * ALT_USB_DEV_DOEPCTL11_SNP_E_DIS | 0x0 | Disable Snoop Mode
104723  * ALT_USB_DEV_DOEPCTL11_SNP_E_EN | 0x1 | Enable Snoop Mode
104724  *
104725  * Field Access Macros:
104726  *
104727  */
104728 /*
104729  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_SNP
104730  *
104731  * Disable Snoop Mode
104732  */
104733 #define ALT_USB_DEV_DOEPCTL11_SNP_E_DIS 0x0
104734 /*
104735  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_SNP
104736  *
104737  * Enable Snoop Mode
104738  */
104739 #define ALT_USB_DEV_DOEPCTL11_SNP_E_EN 0x1
104740 
104741 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_SNP register field. */
104742 #define ALT_USB_DEV_DOEPCTL11_SNP_LSB 20
104743 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_SNP register field. */
104744 #define ALT_USB_DEV_DOEPCTL11_SNP_MSB 20
104745 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_SNP register field. */
104746 #define ALT_USB_DEV_DOEPCTL11_SNP_WIDTH 1
104747 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_SNP register field value. */
104748 #define ALT_USB_DEV_DOEPCTL11_SNP_SET_MSK 0x00100000
104749 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_SNP register field value. */
104750 #define ALT_USB_DEV_DOEPCTL11_SNP_CLR_MSK 0xffefffff
104751 /* The reset value of the ALT_USB_DEV_DOEPCTL11_SNP register field. */
104752 #define ALT_USB_DEV_DOEPCTL11_SNP_RESET 0x0
104753 /* Extracts the ALT_USB_DEV_DOEPCTL11_SNP field value from a register. */
104754 #define ALT_USB_DEV_DOEPCTL11_SNP_GET(value) (((value) & 0x00100000) >> 20)
104755 /* Produces a ALT_USB_DEV_DOEPCTL11_SNP register field value suitable for setting the register. */
104756 #define ALT_USB_DEV_DOEPCTL11_SNP_SET(value) (((value) << 20) & 0x00100000)
104757 
104758 /*
104759  * Field : STALL Handshake - stall
104760  *
104761  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
104762  * application sets this bit to stall all tokens from the USB host to this
104763  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
104764  * along with this bit, the STALL bit takes priority. Only the application can
104765  * clear this bit, never the core. Applies to control endpoints only. The
104766  * application can only set this bit, and the core clears it, when a SETUP token is
104767  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
104768  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
104769  * of this bit's setting, the core always responds to SETUP data packets with an
104770  * ACK handshake.
104771  *
104772  * Field Enumeration Values:
104773  *
104774  * Enum | Value | Description
104775  * :------------------------------------|:------|:----------------------------
104776  * ALT_USB_DEV_DOEPCTL11_STALL_E_INACT | 0x0 | STALL All Tokens not active
104777  * ALT_USB_DEV_DOEPCTL11_STALL_E_ACT | 0x1 | STALL All Tokens active
104778  *
104779  * Field Access Macros:
104780  *
104781  */
104782 /*
104783  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_STALL
104784  *
104785  * STALL All Tokens not active
104786  */
104787 #define ALT_USB_DEV_DOEPCTL11_STALL_E_INACT 0x0
104788 /*
104789  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_STALL
104790  *
104791  * STALL All Tokens active
104792  */
104793 #define ALT_USB_DEV_DOEPCTL11_STALL_E_ACT 0x1
104794 
104795 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_STALL register field. */
104796 #define ALT_USB_DEV_DOEPCTL11_STALL_LSB 21
104797 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_STALL register field. */
104798 #define ALT_USB_DEV_DOEPCTL11_STALL_MSB 21
104799 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_STALL register field. */
104800 #define ALT_USB_DEV_DOEPCTL11_STALL_WIDTH 1
104801 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_STALL register field value. */
104802 #define ALT_USB_DEV_DOEPCTL11_STALL_SET_MSK 0x00200000
104803 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_STALL register field value. */
104804 #define ALT_USB_DEV_DOEPCTL11_STALL_CLR_MSK 0xffdfffff
104805 /* The reset value of the ALT_USB_DEV_DOEPCTL11_STALL register field. */
104806 #define ALT_USB_DEV_DOEPCTL11_STALL_RESET 0x0
104807 /* Extracts the ALT_USB_DEV_DOEPCTL11_STALL field value from a register. */
104808 #define ALT_USB_DEV_DOEPCTL11_STALL_GET(value) (((value) & 0x00200000) >> 21)
104809 /* Produces a ALT_USB_DEV_DOEPCTL11_STALL register field value suitable for setting the register. */
104810 #define ALT_USB_DEV_DOEPCTL11_STALL_SET(value) (((value) << 21) & 0x00200000)
104811 
104812 /*
104813  * Field : Clear NAK - cnak
104814  *
104815  * A write to this bit clears the NAK bit for the endpoint.
104816  *
104817  * Field Enumeration Values:
104818  *
104819  * Enum | Value | Description
104820  * :-----------------------------------|:------|:-------------
104821  * ALT_USB_DEV_DOEPCTL11_CNAK_E_INACT | 0x0 | No Clear NAK
104822  * ALT_USB_DEV_DOEPCTL11_CNAK_E_ACT | 0x1 | Clear NAK
104823  *
104824  * Field Access Macros:
104825  *
104826  */
104827 /*
104828  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_CNAK
104829  *
104830  * No Clear NAK
104831  */
104832 #define ALT_USB_DEV_DOEPCTL11_CNAK_E_INACT 0x0
104833 /*
104834  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_CNAK
104835  *
104836  * Clear NAK
104837  */
104838 #define ALT_USB_DEV_DOEPCTL11_CNAK_E_ACT 0x1
104839 
104840 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_CNAK register field. */
104841 #define ALT_USB_DEV_DOEPCTL11_CNAK_LSB 26
104842 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_CNAK register field. */
104843 #define ALT_USB_DEV_DOEPCTL11_CNAK_MSB 26
104844 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_CNAK register field. */
104845 #define ALT_USB_DEV_DOEPCTL11_CNAK_WIDTH 1
104846 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_CNAK register field value. */
104847 #define ALT_USB_DEV_DOEPCTL11_CNAK_SET_MSK 0x04000000
104848 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_CNAK register field value. */
104849 #define ALT_USB_DEV_DOEPCTL11_CNAK_CLR_MSK 0xfbffffff
104850 /* The reset value of the ALT_USB_DEV_DOEPCTL11_CNAK register field. */
104851 #define ALT_USB_DEV_DOEPCTL11_CNAK_RESET 0x0
104852 /* Extracts the ALT_USB_DEV_DOEPCTL11_CNAK field value from a register. */
104853 #define ALT_USB_DEV_DOEPCTL11_CNAK_GET(value) (((value) & 0x04000000) >> 26)
104854 /* Produces a ALT_USB_DEV_DOEPCTL11_CNAK register field value suitable for setting the register. */
104855 #define ALT_USB_DEV_DOEPCTL11_CNAK_SET(value) (((value) << 26) & 0x04000000)
104856 
104857 /*
104858  * Field : Set NAK - snak
104859  *
104860  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
104861  * application can control the transmission of NAK handshakes on an endpoint. The
104862  * core can also Set this bit for an endpoint after a SETUP packet is received on
104863  * that endpoint.
104864  *
104865  * Field Enumeration Values:
104866  *
104867  * Enum | Value | Description
104868  * :-----------------------------------|:------|:------------
104869  * ALT_USB_DEV_DOEPCTL11_SNAK_E_INACT | 0x0 | No Set NAK
104870  * ALT_USB_DEV_DOEPCTL11_SNAK_E_ACT | 0x1 | Set NAK
104871  *
104872  * Field Access Macros:
104873  *
104874  */
104875 /*
104876  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_SNAK
104877  *
104878  * No Set NAK
104879  */
104880 #define ALT_USB_DEV_DOEPCTL11_SNAK_E_INACT 0x0
104881 /*
104882  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_SNAK
104883  *
104884  * Set NAK
104885  */
104886 #define ALT_USB_DEV_DOEPCTL11_SNAK_E_ACT 0x1
104887 
104888 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_SNAK register field. */
104889 #define ALT_USB_DEV_DOEPCTL11_SNAK_LSB 27
104890 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_SNAK register field. */
104891 #define ALT_USB_DEV_DOEPCTL11_SNAK_MSB 27
104892 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_SNAK register field. */
104893 #define ALT_USB_DEV_DOEPCTL11_SNAK_WIDTH 1
104894 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_SNAK register field value. */
104895 #define ALT_USB_DEV_DOEPCTL11_SNAK_SET_MSK 0x08000000
104896 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_SNAK register field value. */
104897 #define ALT_USB_DEV_DOEPCTL11_SNAK_CLR_MSK 0xf7ffffff
104898 /* The reset value of the ALT_USB_DEV_DOEPCTL11_SNAK register field. */
104899 #define ALT_USB_DEV_DOEPCTL11_SNAK_RESET 0x0
104900 /* Extracts the ALT_USB_DEV_DOEPCTL11_SNAK field value from a register. */
104901 #define ALT_USB_DEV_DOEPCTL11_SNAK_GET(value) (((value) & 0x08000000) >> 27)
104902 /* Produces a ALT_USB_DEV_DOEPCTL11_SNAK register field value suitable for setting the register. */
104903 #define ALT_USB_DEV_DOEPCTL11_SNAK_SET(value) (((value) << 27) & 0x08000000)
104904 
104905 /*
104906  * Field : Set DATA0 PID - setd0pid
104907  *
104908  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
104909  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
104910  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
104911  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
104912  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
104913  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
104914  * mode is enabled, this field is reserved. The frame number in which to send data
104915  * is in the transmit descriptor structure. The frame in which to receive data is
104916  * updated in receive descriptor structure.
104917  *
104918  * Field Enumeration Values:
104919  *
104920  * Enum | Value | Description
104921  * :--------------------------------------|:------|:------------------------------------
104922  * ALT_USB_DEV_DOEPCTL11_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
104923  * ALT_USB_DEV_DOEPCTL11_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
104924  *
104925  * Field Access Macros:
104926  *
104927  */
104928 /*
104929  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_SETD0PID
104930  *
104931  * Disables Set DATA0 PID
104932  */
104933 #define ALT_USB_DEV_DOEPCTL11_SETD0PID_E_DISD 0x0
104934 /*
104935  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_SETD0PID
104936  *
104937  * Enables Endpoint Data PID to DATA0)
104938  */
104939 #define ALT_USB_DEV_DOEPCTL11_SETD0PID_E_END 0x1
104940 
104941 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_SETD0PID register field. */
104942 #define ALT_USB_DEV_DOEPCTL11_SETD0PID_LSB 28
104943 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_SETD0PID register field. */
104944 #define ALT_USB_DEV_DOEPCTL11_SETD0PID_MSB 28
104945 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_SETD0PID register field. */
104946 #define ALT_USB_DEV_DOEPCTL11_SETD0PID_WIDTH 1
104947 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_SETD0PID register field value. */
104948 #define ALT_USB_DEV_DOEPCTL11_SETD0PID_SET_MSK 0x10000000
104949 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_SETD0PID register field value. */
104950 #define ALT_USB_DEV_DOEPCTL11_SETD0PID_CLR_MSK 0xefffffff
104951 /* The reset value of the ALT_USB_DEV_DOEPCTL11_SETD0PID register field. */
104952 #define ALT_USB_DEV_DOEPCTL11_SETD0PID_RESET 0x0
104953 /* Extracts the ALT_USB_DEV_DOEPCTL11_SETD0PID field value from a register. */
104954 #define ALT_USB_DEV_DOEPCTL11_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
104955 /* Produces a ALT_USB_DEV_DOEPCTL11_SETD0PID register field value suitable for setting the register. */
104956 #define ALT_USB_DEV_DOEPCTL11_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
104957 
104958 /*
104959  * Field : Set DATA1 PID - setd1pid
104960  *
104961  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
104962  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
104963  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
104964  *
104965  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
104966  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
104967  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
104968  *
104969  * Field Enumeration Values:
104970  *
104971  * Enum | Value | Description
104972  * :--------------------------------------|:------|:-----------------------
104973  * ALT_USB_DEV_DOEPCTL11_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
104974  * ALT_USB_DEV_DOEPCTL11_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
104975  *
104976  * Field Access Macros:
104977  *
104978  */
104979 /*
104980  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_SETD1PID
104981  *
104982  * Disables Set DATA1 PID
104983  */
104984 #define ALT_USB_DEV_DOEPCTL11_SETD1PID_E_DISD 0x0
104985 /*
104986  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_SETD1PID
104987  *
104988  * Enables Set DATA1 PID
104989  */
104990 #define ALT_USB_DEV_DOEPCTL11_SETD1PID_E_END 0x1
104991 
104992 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_SETD1PID register field. */
104993 #define ALT_USB_DEV_DOEPCTL11_SETD1PID_LSB 29
104994 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_SETD1PID register field. */
104995 #define ALT_USB_DEV_DOEPCTL11_SETD1PID_MSB 29
104996 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_SETD1PID register field. */
104997 #define ALT_USB_DEV_DOEPCTL11_SETD1PID_WIDTH 1
104998 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_SETD1PID register field value. */
104999 #define ALT_USB_DEV_DOEPCTL11_SETD1PID_SET_MSK 0x20000000
105000 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_SETD1PID register field value. */
105001 #define ALT_USB_DEV_DOEPCTL11_SETD1PID_CLR_MSK 0xdfffffff
105002 /* The reset value of the ALT_USB_DEV_DOEPCTL11_SETD1PID register field. */
105003 #define ALT_USB_DEV_DOEPCTL11_SETD1PID_RESET 0x0
105004 /* Extracts the ALT_USB_DEV_DOEPCTL11_SETD1PID field value from a register. */
105005 #define ALT_USB_DEV_DOEPCTL11_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
105006 /* Produces a ALT_USB_DEV_DOEPCTL11_SETD1PID register field value suitable for setting the register. */
105007 #define ALT_USB_DEV_DOEPCTL11_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
105008 
105009 /*
105010  * Field : Endpoint Disable - epdis
105011  *
105012  * Applies to IN and OUT endpoints. The application sets this bit to stop
105013  * transmitting/receiving data on an endpoint, even before the transfer for that
105014  * endpoint is complete. The application must wait for the Endpoint Disabled
105015  * interrupt before treating the endpoint as disabled. The core clears this bit
105016  * before setting the Endpoint Disabled interrupt. The application must set this
105017  * bit only if Endpoint Enable is already set for this endpoint.
105018  *
105019  * Field Enumeration Values:
105020  *
105021  * Enum | Value | Description
105022  * :------------------------------------|:------|:--------------------
105023  * ALT_USB_DEV_DOEPCTL11_EPDIS_E_INACT | 0x0 | No Endpoint Disable
105024  * ALT_USB_DEV_DOEPCTL11_EPDIS_E_ACT | 0x1 | Endpoint Disable
105025  *
105026  * Field Access Macros:
105027  *
105028  */
105029 /*
105030  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_EPDIS
105031  *
105032  * No Endpoint Disable
105033  */
105034 #define ALT_USB_DEV_DOEPCTL11_EPDIS_E_INACT 0x0
105035 /*
105036  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_EPDIS
105037  *
105038  * Endpoint Disable
105039  */
105040 #define ALT_USB_DEV_DOEPCTL11_EPDIS_E_ACT 0x1
105041 
105042 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_EPDIS register field. */
105043 #define ALT_USB_DEV_DOEPCTL11_EPDIS_LSB 30
105044 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_EPDIS register field. */
105045 #define ALT_USB_DEV_DOEPCTL11_EPDIS_MSB 30
105046 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_EPDIS register field. */
105047 #define ALT_USB_DEV_DOEPCTL11_EPDIS_WIDTH 1
105048 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_EPDIS register field value. */
105049 #define ALT_USB_DEV_DOEPCTL11_EPDIS_SET_MSK 0x40000000
105050 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_EPDIS register field value. */
105051 #define ALT_USB_DEV_DOEPCTL11_EPDIS_CLR_MSK 0xbfffffff
105052 /* The reset value of the ALT_USB_DEV_DOEPCTL11_EPDIS register field. */
105053 #define ALT_USB_DEV_DOEPCTL11_EPDIS_RESET 0x0
105054 /* Extracts the ALT_USB_DEV_DOEPCTL11_EPDIS field value from a register. */
105055 #define ALT_USB_DEV_DOEPCTL11_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
105056 /* Produces a ALT_USB_DEV_DOEPCTL11_EPDIS register field value suitable for setting the register. */
105057 #define ALT_USB_DEV_DOEPCTL11_EPDIS_SET(value) (((value) << 30) & 0x40000000)
105058 
105059 /*
105060  * Field : Endpoint Enable - epena
105061  *
105062  * Applies to IN and OUT endpoints.
105063  *
105064  * * When Scatter/Gather DMA mode is enabled,
105065  *
105066  * * for IN endpoints this bit indicates that the descriptor structure and data
105067  * buffer with data ready to transmit is setup.
105068  *
105069  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
105070  * receive data is setup.
105071  *
105072  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
105073  * mode:
105074  *
105075  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
105076  * the endpoint.
105077  *
105078  * * for OUT endpoints, this bit indicates that the application has allocated the
105079  * memory to start receiving data from the USB.
105080  *
105081  * * The core clears this bit before setting any of the following interrupts on
105082  * this endpoint:
105083  *
105084  * * SETUP Phase Done
105085  *
105086  * * Endpoint Disabled
105087  *
105088  * * Transfer Completed
105089  *
105090  * for control endpoints in DMA mode, this bit must be set to be able to transfer
105091  * SETUP data packets in memory.
105092  *
105093  * Field Enumeration Values:
105094  *
105095  * Enum | Value | Description
105096  * :------------------------------------|:------|:-------------------------
105097  * ALT_USB_DEV_DOEPCTL11_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
105098  * ALT_USB_DEV_DOEPCTL11_EPENA_E_ACT | 0x1 | Endpoint Enable active
105099  *
105100  * Field Access Macros:
105101  *
105102  */
105103 /*
105104  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_EPENA
105105  *
105106  * Endpoint Enable inactive
105107  */
105108 #define ALT_USB_DEV_DOEPCTL11_EPENA_E_INACT 0x0
105109 /*
105110  * Enumerated value for register field ALT_USB_DEV_DOEPCTL11_EPENA
105111  *
105112  * Endpoint Enable active
105113  */
105114 #define ALT_USB_DEV_DOEPCTL11_EPENA_E_ACT 0x1
105115 
105116 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL11_EPENA register field. */
105117 #define ALT_USB_DEV_DOEPCTL11_EPENA_LSB 31
105118 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL11_EPENA register field. */
105119 #define ALT_USB_DEV_DOEPCTL11_EPENA_MSB 31
105120 /* The width in bits of the ALT_USB_DEV_DOEPCTL11_EPENA register field. */
105121 #define ALT_USB_DEV_DOEPCTL11_EPENA_WIDTH 1
105122 /* The mask used to set the ALT_USB_DEV_DOEPCTL11_EPENA register field value. */
105123 #define ALT_USB_DEV_DOEPCTL11_EPENA_SET_MSK 0x80000000
105124 /* The mask used to clear the ALT_USB_DEV_DOEPCTL11_EPENA register field value. */
105125 #define ALT_USB_DEV_DOEPCTL11_EPENA_CLR_MSK 0x7fffffff
105126 /* The reset value of the ALT_USB_DEV_DOEPCTL11_EPENA register field. */
105127 #define ALT_USB_DEV_DOEPCTL11_EPENA_RESET 0x0
105128 /* Extracts the ALT_USB_DEV_DOEPCTL11_EPENA field value from a register. */
105129 #define ALT_USB_DEV_DOEPCTL11_EPENA_GET(value) (((value) & 0x80000000) >> 31)
105130 /* Produces a ALT_USB_DEV_DOEPCTL11_EPENA register field value suitable for setting the register. */
105131 #define ALT_USB_DEV_DOEPCTL11_EPENA_SET(value) (((value) << 31) & 0x80000000)
105132 
105133 #ifndef __ASSEMBLY__
105134 /*
105135  * WARNING: The C register and register group struct declarations are provided for
105136  * convenience and illustrative purposes. They should, however, be used with
105137  * caution as the C language standard provides no guarantees about the alignment or
105138  * atomicity of device memory accesses. The recommended practice for writing
105139  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
105140  * alt_write_word() functions.
105141  *
105142  * The struct declaration for register ALT_USB_DEV_DOEPCTL11.
105143  */
105144 struct ALT_USB_DEV_DOEPCTL11_s
105145 {
105146  uint32_t mps : 11; /* Maximum Packet Size */
105147  uint32_t : 4; /* *UNDEFINED* */
105148  uint32_t usbactep : 1; /* USB Active Endpoint */
105149  const uint32_t dpid : 1; /* Endpoint Data PID */
105150  const uint32_t naksts : 1; /* NAK Status */
105151  uint32_t eptype : 2; /* Endpoint Type */
105152  uint32_t snp : 1; /* Snoop Mode */
105153  const uint32_t stall : 1; /* STALL Handshake */
105154  uint32_t : 4; /* *UNDEFINED* */
105155  uint32_t cnak : 1; /* Clear NAK */
105156  uint32_t snak : 1; /* Set NAK */
105157  uint32_t setd0pid : 1; /* Set DATA0 PID */
105158  uint32_t setd1pid : 1; /* Set DATA1 PID */
105159  const uint32_t epdis : 1; /* Endpoint Disable */
105160  const uint32_t epena : 1; /* Endpoint Enable */
105161 };
105162 
105163 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL11. */
105164 typedef volatile struct ALT_USB_DEV_DOEPCTL11_s ALT_USB_DEV_DOEPCTL11_t;
105165 #endif /* __ASSEMBLY__ */
105166 
105167 /* The byte offset of the ALT_USB_DEV_DOEPCTL11 register from the beginning of the component. */
105168 #define ALT_USB_DEV_DOEPCTL11_OFST 0x460
105169 /* The address of the ALT_USB_DEV_DOEPCTL11 register. */
105170 #define ALT_USB_DEV_DOEPCTL11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL11_OFST))
105171 
105172 /*
105173  * Register : Device OUT Endpoint 11 Interrupt Register - doepint11
105174  *
105175  * This register indicates the status of an endpoint with respect to USB- and AHB-
105176  * related events. The application must read this register when the OUT Endpoints
105177  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
105178  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
105179  * can read this register, it must first read the Device All Endpoints Interrupt
105180  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
105181  * Interrupt register. The application must clear the appropriate bit in this
105182  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
105183  *
105184  * Register Layout
105185  *
105186  * Bits | Access | Reset | Description
105187  * :--------|:-------|:------|:------------------------------------------
105188  * [0] | R | 0x0 | Transfer Completed Interrupt
105189  * [1] | R | 0x0 | Endpoint Disabled Interrupt
105190  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT11_AHBERR
105191  * [3] | R | 0x0 | SETUP Phase Done
105192  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
105193  * [5] | R | 0x0 | Status Phase Received for Control Write
105194  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
105195  * [7] | ??? | 0x0 | *UNDEFINED*
105196  * [8] | R | 0x0 | OUT Packet Error
105197  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
105198  * [10] | ??? | 0x0 | *UNDEFINED*
105199  * [11] | R | 0x0 | Packet Drop Status
105200  * [12] | R | 0x0 | BbleErr Interrupt
105201  * [13] | R | 0x0 | NAK Interrupt
105202  * [14] | R | 0x0 | NYET Interrupt
105203  * [31:15] | ??? | 0x0 | *UNDEFINED*
105204  *
105205  */
105206 /*
105207  * Field : Transfer Completed Interrupt - xfercompl
105208  *
105209  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
105210  *
105211  * This field indicates that the requested data from the internal FIFO is moved to
105212  * external system memory. This interrupt is generated only when the corresponding
105213  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
105214  * is Set.
105215  *
105216  * When Scatter/Gather DMA mode is disabled, this field indicates that the
105217  * programmed transfer is complete on the AHB as well as on the USB, for this
105218  * endpoint.
105219  *
105220  * Field Enumeration Values:
105221  *
105222  * Enum | Value | Description
105223  * :----------------------------------------|:------|:-----------------------------
105224  * ALT_USB_DEV_DOEPINT11_XFERCOMPL_E_INACT | 0x0 | No Interrupt
105225  * ALT_USB_DEV_DOEPINT11_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
105226  *
105227  * Field Access Macros:
105228  *
105229  */
105230 /*
105231  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_XFERCOMPL
105232  *
105233  * No Interrupt
105234  */
105235 #define ALT_USB_DEV_DOEPINT11_XFERCOMPL_E_INACT 0x0
105236 /*
105237  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_XFERCOMPL
105238  *
105239  * Transfer Completed Interrupt
105240  */
105241 #define ALT_USB_DEV_DOEPINT11_XFERCOMPL_E_ACT 0x1
105242 
105243 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_XFERCOMPL register field. */
105244 #define ALT_USB_DEV_DOEPINT11_XFERCOMPL_LSB 0
105245 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_XFERCOMPL register field. */
105246 #define ALT_USB_DEV_DOEPINT11_XFERCOMPL_MSB 0
105247 /* The width in bits of the ALT_USB_DEV_DOEPINT11_XFERCOMPL register field. */
105248 #define ALT_USB_DEV_DOEPINT11_XFERCOMPL_WIDTH 1
105249 /* The mask used to set the ALT_USB_DEV_DOEPINT11_XFERCOMPL register field value. */
105250 #define ALT_USB_DEV_DOEPINT11_XFERCOMPL_SET_MSK 0x00000001
105251 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_XFERCOMPL register field value. */
105252 #define ALT_USB_DEV_DOEPINT11_XFERCOMPL_CLR_MSK 0xfffffffe
105253 /* The reset value of the ALT_USB_DEV_DOEPINT11_XFERCOMPL register field. */
105254 #define ALT_USB_DEV_DOEPINT11_XFERCOMPL_RESET 0x0
105255 /* Extracts the ALT_USB_DEV_DOEPINT11_XFERCOMPL field value from a register. */
105256 #define ALT_USB_DEV_DOEPINT11_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
105257 /* Produces a ALT_USB_DEV_DOEPINT11_XFERCOMPL register field value suitable for setting the register. */
105258 #define ALT_USB_DEV_DOEPINT11_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
105259 
105260 /*
105261  * Field : Endpoint Disabled Interrupt - epdisbld
105262  *
105263  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
105264  * disabled per the application's request.
105265  *
105266  * Field Enumeration Values:
105267  *
105268  * Enum | Value | Description
105269  * :---------------------------------------|:------|:----------------------------
105270  * ALT_USB_DEV_DOEPINT11_EPDISBLD_E_INACT | 0x0 | No Interrupt
105271  * ALT_USB_DEV_DOEPINT11_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
105272  *
105273  * Field Access Macros:
105274  *
105275  */
105276 /*
105277  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_EPDISBLD
105278  *
105279  * No Interrupt
105280  */
105281 #define ALT_USB_DEV_DOEPINT11_EPDISBLD_E_INACT 0x0
105282 /*
105283  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_EPDISBLD
105284  *
105285  * Endpoint Disabled Interrupt
105286  */
105287 #define ALT_USB_DEV_DOEPINT11_EPDISBLD_E_ACT 0x1
105288 
105289 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_EPDISBLD register field. */
105290 #define ALT_USB_DEV_DOEPINT11_EPDISBLD_LSB 1
105291 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_EPDISBLD register field. */
105292 #define ALT_USB_DEV_DOEPINT11_EPDISBLD_MSB 1
105293 /* The width in bits of the ALT_USB_DEV_DOEPINT11_EPDISBLD register field. */
105294 #define ALT_USB_DEV_DOEPINT11_EPDISBLD_WIDTH 1
105295 /* The mask used to set the ALT_USB_DEV_DOEPINT11_EPDISBLD register field value. */
105296 #define ALT_USB_DEV_DOEPINT11_EPDISBLD_SET_MSK 0x00000002
105297 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_EPDISBLD register field value. */
105298 #define ALT_USB_DEV_DOEPINT11_EPDISBLD_CLR_MSK 0xfffffffd
105299 /* The reset value of the ALT_USB_DEV_DOEPINT11_EPDISBLD register field. */
105300 #define ALT_USB_DEV_DOEPINT11_EPDISBLD_RESET 0x0
105301 /* Extracts the ALT_USB_DEV_DOEPINT11_EPDISBLD field value from a register. */
105302 #define ALT_USB_DEV_DOEPINT11_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
105303 /* Produces a ALT_USB_DEV_DOEPINT11_EPDISBLD register field value suitable for setting the register. */
105304 #define ALT_USB_DEV_DOEPINT11_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
105305 
105306 /*
105307  * Field : ahberr
105308  *
105309  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
105310  * there is an AHB error during an AHB read/write. The application can read the
105311  * corresponding endpoint DMA address register to get the error address.
105312  *
105313  * Field Enumeration Values:
105314  *
105315  * Enum | Value | Description
105316  * :-------------------------------------|:------|:--------------------
105317  * ALT_USB_DEV_DOEPINT11_AHBERR_E_INACT | 0x0 | No Interrupt
105318  * ALT_USB_DEV_DOEPINT11_AHBERR_E_ACT | 0x1 | AHB Error interrupt
105319  *
105320  * Field Access Macros:
105321  *
105322  */
105323 /*
105324  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_AHBERR
105325  *
105326  * No Interrupt
105327  */
105328 #define ALT_USB_DEV_DOEPINT11_AHBERR_E_INACT 0x0
105329 /*
105330  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_AHBERR
105331  *
105332  * AHB Error interrupt
105333  */
105334 #define ALT_USB_DEV_DOEPINT11_AHBERR_E_ACT 0x1
105335 
105336 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_AHBERR register field. */
105337 #define ALT_USB_DEV_DOEPINT11_AHBERR_LSB 2
105338 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_AHBERR register field. */
105339 #define ALT_USB_DEV_DOEPINT11_AHBERR_MSB 2
105340 /* The width in bits of the ALT_USB_DEV_DOEPINT11_AHBERR register field. */
105341 #define ALT_USB_DEV_DOEPINT11_AHBERR_WIDTH 1
105342 /* The mask used to set the ALT_USB_DEV_DOEPINT11_AHBERR register field value. */
105343 #define ALT_USB_DEV_DOEPINT11_AHBERR_SET_MSK 0x00000004
105344 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_AHBERR register field value. */
105345 #define ALT_USB_DEV_DOEPINT11_AHBERR_CLR_MSK 0xfffffffb
105346 /* The reset value of the ALT_USB_DEV_DOEPINT11_AHBERR register field. */
105347 #define ALT_USB_DEV_DOEPINT11_AHBERR_RESET 0x0
105348 /* Extracts the ALT_USB_DEV_DOEPINT11_AHBERR field value from a register. */
105349 #define ALT_USB_DEV_DOEPINT11_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
105350 /* Produces a ALT_USB_DEV_DOEPINT11_AHBERR register field value suitable for setting the register. */
105351 #define ALT_USB_DEV_DOEPINT11_AHBERR_SET(value) (((value) << 2) & 0x00000004)
105352 
105353 /*
105354  * Field : SETUP Phase Done - setup
105355  *
105356  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
105357  * control endpoint is complete and no more back-to-back SETUP packets were
105358  * received for the current control transfer. On this interrupt, the application
105359  * can decode the received SETUP data packet.
105360  *
105361  * Field Enumeration Values:
105362  *
105363  * Enum | Value | Description
105364  * :------------------------------------|:------|:--------------------
105365  * ALT_USB_DEV_DOEPINT11_SETUP_E_INACT | 0x0 | No SETUP Phase Done
105366  * ALT_USB_DEV_DOEPINT11_SETUP_E_ACT | 0x1 | SETUP Phase Done
105367  *
105368  * Field Access Macros:
105369  *
105370  */
105371 /*
105372  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_SETUP
105373  *
105374  * No SETUP Phase Done
105375  */
105376 #define ALT_USB_DEV_DOEPINT11_SETUP_E_INACT 0x0
105377 /*
105378  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_SETUP
105379  *
105380  * SETUP Phase Done
105381  */
105382 #define ALT_USB_DEV_DOEPINT11_SETUP_E_ACT 0x1
105383 
105384 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_SETUP register field. */
105385 #define ALT_USB_DEV_DOEPINT11_SETUP_LSB 3
105386 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_SETUP register field. */
105387 #define ALT_USB_DEV_DOEPINT11_SETUP_MSB 3
105388 /* The width in bits of the ALT_USB_DEV_DOEPINT11_SETUP register field. */
105389 #define ALT_USB_DEV_DOEPINT11_SETUP_WIDTH 1
105390 /* The mask used to set the ALT_USB_DEV_DOEPINT11_SETUP register field value. */
105391 #define ALT_USB_DEV_DOEPINT11_SETUP_SET_MSK 0x00000008
105392 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_SETUP register field value. */
105393 #define ALT_USB_DEV_DOEPINT11_SETUP_CLR_MSK 0xfffffff7
105394 /* The reset value of the ALT_USB_DEV_DOEPINT11_SETUP register field. */
105395 #define ALT_USB_DEV_DOEPINT11_SETUP_RESET 0x0
105396 /* Extracts the ALT_USB_DEV_DOEPINT11_SETUP field value from a register. */
105397 #define ALT_USB_DEV_DOEPINT11_SETUP_GET(value) (((value) & 0x00000008) >> 3)
105398 /* Produces a ALT_USB_DEV_DOEPINT11_SETUP register field value suitable for setting the register. */
105399 #define ALT_USB_DEV_DOEPINT11_SETUP_SET(value) (((value) << 3) & 0x00000008)
105400 
105401 /*
105402  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
105403  *
105404  * Applies only to control OUT endpoints. Indicates that an OUT token was received
105405  * when the endpoint was not yet enabled. This interrupt is asserted on the
105406  * endpoint for which the OUT token was received.
105407  *
105408  * Field Enumeration Values:
105409  *
105410  * Enum | Value | Description
105411  * :------------------------------------------|:------|:---------------------------------------------
105412  * ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
105413  * ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
105414  *
105415  * Field Access Macros:
105416  *
105417  */
105418 /*
105419  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS
105420  *
105421  * No OUT Token Received When Endpoint Disabled
105422  */
105423 #define ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS_E_INACT 0x0
105424 /*
105425  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS
105426  *
105427  * OUT Token Received When Endpoint Disabled
105428  */
105429 #define ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS_E_ACT 0x1
105430 
105431 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS register field. */
105432 #define ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS_LSB 4
105433 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS register field. */
105434 #define ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS_MSB 4
105435 /* The width in bits of the ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS register field. */
105436 #define ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS_WIDTH 1
105437 /* The mask used to set the ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS register field value. */
105438 #define ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS_SET_MSK 0x00000010
105439 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS register field value. */
105440 #define ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS_CLR_MSK 0xffffffef
105441 /* The reset value of the ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS register field. */
105442 #define ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS_RESET 0x0
105443 /* Extracts the ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS field value from a register. */
105444 #define ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
105445 /* Produces a ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS register field value suitable for setting the register. */
105446 #define ALT_USB_DEV_DOEPINT11_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
105447 
105448 /*
105449  * Field : Status Phase Received for Control Write - stsphsercvd
105450  *
105451  * This interrupt is valid only for Control OUT endpoints and only in Scatter
105452  * Gather DMA mode. This interrupt is generated only after the core has transferred
105453  * all the data that the host has sent during the data phase of a control write
105454  * transfer, to the system memory buffer. The interrupt indicates to the
105455  * application that the host has switched from data phase to the status phase of a
105456  * Control Write transfer. The application can use this interrupt to ACK or STALL
105457  * the Status phase, after it has decoded the data phase. This is applicable only
105458  * in Case of Scatter Gather DMA mode.
105459  *
105460  * Field Enumeration Values:
105461  *
105462  * Enum | Value | Description
105463  * :------------------------------------------|:------|:-------------------------------------------
105464  * ALT_USB_DEV_DOEPINT11_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
105465  * ALT_USB_DEV_DOEPINT11_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
105466  *
105467  * Field Access Macros:
105468  *
105469  */
105470 /*
105471  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_STSPHSERCVD
105472  *
105473  * No Status Phase Received for Control Write
105474  */
105475 #define ALT_USB_DEV_DOEPINT11_STSPHSERCVD_E_INACT 0x0
105476 /*
105477  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_STSPHSERCVD
105478  *
105479  * Status Phase Received for Control Write
105480  */
105481 #define ALT_USB_DEV_DOEPINT11_STSPHSERCVD_E_ACT 0x1
105482 
105483 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_STSPHSERCVD register field. */
105484 #define ALT_USB_DEV_DOEPINT11_STSPHSERCVD_LSB 5
105485 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_STSPHSERCVD register field. */
105486 #define ALT_USB_DEV_DOEPINT11_STSPHSERCVD_MSB 5
105487 /* The width in bits of the ALT_USB_DEV_DOEPINT11_STSPHSERCVD register field. */
105488 #define ALT_USB_DEV_DOEPINT11_STSPHSERCVD_WIDTH 1
105489 /* The mask used to set the ALT_USB_DEV_DOEPINT11_STSPHSERCVD register field value. */
105490 #define ALT_USB_DEV_DOEPINT11_STSPHSERCVD_SET_MSK 0x00000020
105491 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_STSPHSERCVD register field value. */
105492 #define ALT_USB_DEV_DOEPINT11_STSPHSERCVD_CLR_MSK 0xffffffdf
105493 /* The reset value of the ALT_USB_DEV_DOEPINT11_STSPHSERCVD register field. */
105494 #define ALT_USB_DEV_DOEPINT11_STSPHSERCVD_RESET 0x0
105495 /* Extracts the ALT_USB_DEV_DOEPINT11_STSPHSERCVD field value from a register. */
105496 #define ALT_USB_DEV_DOEPINT11_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
105497 /* Produces a ALT_USB_DEV_DOEPINT11_STSPHSERCVD register field value suitable for setting the register. */
105498 #define ALT_USB_DEV_DOEPINT11_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
105499 
105500 /*
105501  * Field : Back-to-Back SETUP Packets Received - back2backsetup
105502  *
105503  * Applies to Control OUT endpoints only. This bit indicates that the core has
105504  * received more than three back-to-back SETUP packets for this particular
105505  * endpoint. for information about handling this interrupt,
105506  *
105507  * Field Enumeration Values:
105508  *
105509  * Enum | Value | Description
105510  * :---------------------------------------------|:------|:---------------------------------------
105511  * ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
105512  * ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
105513  *
105514  * Field Access Macros:
105515  *
105516  */
105517 /*
105518  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP
105519  *
105520  * No Back-to-Back SETUP Packets Received
105521  */
105522 #define ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP_E_INACT 0x0
105523 /*
105524  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP
105525  *
105526  * Back-to-Back SETUP Packets Received
105527  */
105528 #define ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP_E_ACT 0x1
105529 
105530 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP register field. */
105531 #define ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP_LSB 6
105532 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP register field. */
105533 #define ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP_MSB 6
105534 /* The width in bits of the ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP register field. */
105535 #define ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP_WIDTH 1
105536 /* The mask used to set the ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP register field value. */
105537 #define ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP_SET_MSK 0x00000040
105538 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP register field value. */
105539 #define ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP_CLR_MSK 0xffffffbf
105540 /* The reset value of the ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP register field. */
105541 #define ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP_RESET 0x0
105542 /* Extracts the ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP field value from a register. */
105543 #define ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
105544 /* Produces a ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP register field value suitable for setting the register. */
105545 #define ALT_USB_DEV_DOEPINT11_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
105546 
105547 /*
105548  * Field : OUT Packet Error - outpkterr
105549  *
105550  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
105551  * an overflow or a CRC error for non-Isochronous OUT packet.
105552  *
105553  * Field Enumeration Values:
105554  *
105555  * Enum | Value | Description
105556  * :----------------------------------------|:------|:--------------------
105557  * ALT_USB_DEV_DOEPINT11_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
105558  * ALT_USB_DEV_DOEPINT11_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
105559  *
105560  * Field Access Macros:
105561  *
105562  */
105563 /*
105564  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_OUTPKTERR
105565  *
105566  * No OUT Packet Error
105567  */
105568 #define ALT_USB_DEV_DOEPINT11_OUTPKTERR_E_INACT 0x0
105569 /*
105570  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_OUTPKTERR
105571  *
105572  * OUT Packet Error
105573  */
105574 #define ALT_USB_DEV_DOEPINT11_OUTPKTERR_E_ACT 0x1
105575 
105576 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_OUTPKTERR register field. */
105577 #define ALT_USB_DEV_DOEPINT11_OUTPKTERR_LSB 8
105578 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_OUTPKTERR register field. */
105579 #define ALT_USB_DEV_DOEPINT11_OUTPKTERR_MSB 8
105580 /* The width in bits of the ALT_USB_DEV_DOEPINT11_OUTPKTERR register field. */
105581 #define ALT_USB_DEV_DOEPINT11_OUTPKTERR_WIDTH 1
105582 /* The mask used to set the ALT_USB_DEV_DOEPINT11_OUTPKTERR register field value. */
105583 #define ALT_USB_DEV_DOEPINT11_OUTPKTERR_SET_MSK 0x00000100
105584 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_OUTPKTERR register field value. */
105585 #define ALT_USB_DEV_DOEPINT11_OUTPKTERR_CLR_MSK 0xfffffeff
105586 /* The reset value of the ALT_USB_DEV_DOEPINT11_OUTPKTERR register field. */
105587 #define ALT_USB_DEV_DOEPINT11_OUTPKTERR_RESET 0x0
105588 /* Extracts the ALT_USB_DEV_DOEPINT11_OUTPKTERR field value from a register. */
105589 #define ALT_USB_DEV_DOEPINT11_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
105590 /* Produces a ALT_USB_DEV_DOEPINT11_OUTPKTERR register field value suitable for setting the register. */
105591 #define ALT_USB_DEV_DOEPINT11_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
105592 
105593 /*
105594  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
105595  *
105596  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
105597  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
105598  * the descriptor accessed is not ready for the Core to process, such as Host busy
105599  * or DMA done
105600  *
105601  * Field Enumeration Values:
105602  *
105603  * Enum | Value | Description
105604  * :--------------------------------------|:------|:--------------
105605  * ALT_USB_DEV_DOEPINT11_BNAINTR_E_INACT | 0x0 | No interrupt
105606  * ALT_USB_DEV_DOEPINT11_BNAINTR_E_ACT | 0x1 | BNA interrupt
105607  *
105608  * Field Access Macros:
105609  *
105610  */
105611 /*
105612  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_BNAINTR
105613  *
105614  * No interrupt
105615  */
105616 #define ALT_USB_DEV_DOEPINT11_BNAINTR_E_INACT 0x0
105617 /*
105618  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_BNAINTR
105619  *
105620  * BNA interrupt
105621  */
105622 #define ALT_USB_DEV_DOEPINT11_BNAINTR_E_ACT 0x1
105623 
105624 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_BNAINTR register field. */
105625 #define ALT_USB_DEV_DOEPINT11_BNAINTR_LSB 9
105626 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_BNAINTR register field. */
105627 #define ALT_USB_DEV_DOEPINT11_BNAINTR_MSB 9
105628 /* The width in bits of the ALT_USB_DEV_DOEPINT11_BNAINTR register field. */
105629 #define ALT_USB_DEV_DOEPINT11_BNAINTR_WIDTH 1
105630 /* The mask used to set the ALT_USB_DEV_DOEPINT11_BNAINTR register field value. */
105631 #define ALT_USB_DEV_DOEPINT11_BNAINTR_SET_MSK 0x00000200
105632 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_BNAINTR register field value. */
105633 #define ALT_USB_DEV_DOEPINT11_BNAINTR_CLR_MSK 0xfffffdff
105634 /* The reset value of the ALT_USB_DEV_DOEPINT11_BNAINTR register field. */
105635 #define ALT_USB_DEV_DOEPINT11_BNAINTR_RESET 0x0
105636 /* Extracts the ALT_USB_DEV_DOEPINT11_BNAINTR field value from a register. */
105637 #define ALT_USB_DEV_DOEPINT11_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
105638 /* Produces a ALT_USB_DEV_DOEPINT11_BNAINTR register field value suitable for setting the register. */
105639 #define ALT_USB_DEV_DOEPINT11_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
105640 
105641 /*
105642  * Field : Packet Drop Status - pktdrpsts
105643  *
105644  * This bit indicates to the application that an ISOC OUT packet has been dropped.
105645  * This bit does not have an associated mask bit and does not generate an
105646  * interrupt.
105647  *
105648  * Field Enumeration Values:
105649  *
105650  * Enum | Value | Description
105651  * :----------------------------------------|:------|:-----------------------------
105652  * ALT_USB_DEV_DOEPINT11_PKTDRPSTS_E_INACT | 0x0 | No interrupt
105653  * ALT_USB_DEV_DOEPINT11_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
105654  *
105655  * Field Access Macros:
105656  *
105657  */
105658 /*
105659  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_PKTDRPSTS
105660  *
105661  * No interrupt
105662  */
105663 #define ALT_USB_DEV_DOEPINT11_PKTDRPSTS_E_INACT 0x0
105664 /*
105665  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_PKTDRPSTS
105666  *
105667  * Packet Drop Status interrupt
105668  */
105669 #define ALT_USB_DEV_DOEPINT11_PKTDRPSTS_E_ACT 0x1
105670 
105671 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_PKTDRPSTS register field. */
105672 #define ALT_USB_DEV_DOEPINT11_PKTDRPSTS_LSB 11
105673 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_PKTDRPSTS register field. */
105674 #define ALT_USB_DEV_DOEPINT11_PKTDRPSTS_MSB 11
105675 /* The width in bits of the ALT_USB_DEV_DOEPINT11_PKTDRPSTS register field. */
105676 #define ALT_USB_DEV_DOEPINT11_PKTDRPSTS_WIDTH 1
105677 /* The mask used to set the ALT_USB_DEV_DOEPINT11_PKTDRPSTS register field value. */
105678 #define ALT_USB_DEV_DOEPINT11_PKTDRPSTS_SET_MSK 0x00000800
105679 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_PKTDRPSTS register field value. */
105680 #define ALT_USB_DEV_DOEPINT11_PKTDRPSTS_CLR_MSK 0xfffff7ff
105681 /* The reset value of the ALT_USB_DEV_DOEPINT11_PKTDRPSTS register field. */
105682 #define ALT_USB_DEV_DOEPINT11_PKTDRPSTS_RESET 0x0
105683 /* Extracts the ALT_USB_DEV_DOEPINT11_PKTDRPSTS field value from a register. */
105684 #define ALT_USB_DEV_DOEPINT11_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
105685 /* Produces a ALT_USB_DEV_DOEPINT11_PKTDRPSTS register field value suitable for setting the register. */
105686 #define ALT_USB_DEV_DOEPINT11_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
105687 
105688 /*
105689  * Field : BbleErr Interrupt - bbleerr
105690  *
105691  * The core generates this interrupt when babble is received for the endpoint.
105692  *
105693  * Field Enumeration Values:
105694  *
105695  * Enum | Value | Description
105696  * :--------------------------------------|:------|:------------------
105697  * ALT_USB_DEV_DOEPINT11_BBLEERR_E_INACT | 0x0 | No interrupt
105698  * ALT_USB_DEV_DOEPINT11_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
105699  *
105700  * Field Access Macros:
105701  *
105702  */
105703 /*
105704  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_BBLEERR
105705  *
105706  * No interrupt
105707  */
105708 #define ALT_USB_DEV_DOEPINT11_BBLEERR_E_INACT 0x0
105709 /*
105710  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_BBLEERR
105711  *
105712  * BbleErr interrupt
105713  */
105714 #define ALT_USB_DEV_DOEPINT11_BBLEERR_E_ACT 0x1
105715 
105716 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_BBLEERR register field. */
105717 #define ALT_USB_DEV_DOEPINT11_BBLEERR_LSB 12
105718 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_BBLEERR register field. */
105719 #define ALT_USB_DEV_DOEPINT11_BBLEERR_MSB 12
105720 /* The width in bits of the ALT_USB_DEV_DOEPINT11_BBLEERR register field. */
105721 #define ALT_USB_DEV_DOEPINT11_BBLEERR_WIDTH 1
105722 /* The mask used to set the ALT_USB_DEV_DOEPINT11_BBLEERR register field value. */
105723 #define ALT_USB_DEV_DOEPINT11_BBLEERR_SET_MSK 0x00001000
105724 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_BBLEERR register field value. */
105725 #define ALT_USB_DEV_DOEPINT11_BBLEERR_CLR_MSK 0xffffefff
105726 /* The reset value of the ALT_USB_DEV_DOEPINT11_BBLEERR register field. */
105727 #define ALT_USB_DEV_DOEPINT11_BBLEERR_RESET 0x0
105728 /* Extracts the ALT_USB_DEV_DOEPINT11_BBLEERR field value from a register. */
105729 #define ALT_USB_DEV_DOEPINT11_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
105730 /* Produces a ALT_USB_DEV_DOEPINT11_BBLEERR register field value suitable for setting the register. */
105731 #define ALT_USB_DEV_DOEPINT11_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
105732 
105733 /*
105734  * Field : NAK Interrupt - nakintrpt
105735  *
105736  * The core generates this interrupt when a NAK is transmitted or received by the
105737  * device. In case of isochronous IN endpoints the interrupt gets generated when a
105738  * zero length packet is transmitted due to un-availability of data in the TXFifo.
105739  *
105740  * Field Enumeration Values:
105741  *
105742  * Enum | Value | Description
105743  * :----------------------------------------|:------|:--------------
105744  * ALT_USB_DEV_DOEPINT11_NAKINTRPT_E_INACT | 0x0 | No interrupt
105745  * ALT_USB_DEV_DOEPINT11_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
105746  *
105747  * Field Access Macros:
105748  *
105749  */
105750 /*
105751  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_NAKINTRPT
105752  *
105753  * No interrupt
105754  */
105755 #define ALT_USB_DEV_DOEPINT11_NAKINTRPT_E_INACT 0x0
105756 /*
105757  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_NAKINTRPT
105758  *
105759  * NAK Interrupt
105760  */
105761 #define ALT_USB_DEV_DOEPINT11_NAKINTRPT_E_ACT 0x1
105762 
105763 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_NAKINTRPT register field. */
105764 #define ALT_USB_DEV_DOEPINT11_NAKINTRPT_LSB 13
105765 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_NAKINTRPT register field. */
105766 #define ALT_USB_DEV_DOEPINT11_NAKINTRPT_MSB 13
105767 /* The width in bits of the ALT_USB_DEV_DOEPINT11_NAKINTRPT register field. */
105768 #define ALT_USB_DEV_DOEPINT11_NAKINTRPT_WIDTH 1
105769 /* The mask used to set the ALT_USB_DEV_DOEPINT11_NAKINTRPT register field value. */
105770 #define ALT_USB_DEV_DOEPINT11_NAKINTRPT_SET_MSK 0x00002000
105771 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_NAKINTRPT register field value. */
105772 #define ALT_USB_DEV_DOEPINT11_NAKINTRPT_CLR_MSK 0xffffdfff
105773 /* The reset value of the ALT_USB_DEV_DOEPINT11_NAKINTRPT register field. */
105774 #define ALT_USB_DEV_DOEPINT11_NAKINTRPT_RESET 0x0
105775 /* Extracts the ALT_USB_DEV_DOEPINT11_NAKINTRPT field value from a register. */
105776 #define ALT_USB_DEV_DOEPINT11_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
105777 /* Produces a ALT_USB_DEV_DOEPINT11_NAKINTRPT register field value suitable for setting the register. */
105778 #define ALT_USB_DEV_DOEPINT11_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
105779 
105780 /*
105781  * Field : NYET Interrupt - nyetintrpt
105782  *
105783  * The core generates this interrupt when a NYET response is transmitted for a non
105784  * isochronous OUT endpoint.
105785  *
105786  * Field Enumeration Values:
105787  *
105788  * Enum | Value | Description
105789  * :-----------------------------------------|:------|:---------------
105790  * ALT_USB_DEV_DOEPINT11_NYETINTRPT_E_INACT | 0x0 | No interrupt
105791  * ALT_USB_DEV_DOEPINT11_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
105792  *
105793  * Field Access Macros:
105794  *
105795  */
105796 /*
105797  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_NYETINTRPT
105798  *
105799  * No interrupt
105800  */
105801 #define ALT_USB_DEV_DOEPINT11_NYETINTRPT_E_INACT 0x0
105802 /*
105803  * Enumerated value for register field ALT_USB_DEV_DOEPINT11_NYETINTRPT
105804  *
105805  * NYET Interrupt
105806  */
105807 #define ALT_USB_DEV_DOEPINT11_NYETINTRPT_E_ACT 0x1
105808 
105809 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT11_NYETINTRPT register field. */
105810 #define ALT_USB_DEV_DOEPINT11_NYETINTRPT_LSB 14
105811 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT11_NYETINTRPT register field. */
105812 #define ALT_USB_DEV_DOEPINT11_NYETINTRPT_MSB 14
105813 /* The width in bits of the ALT_USB_DEV_DOEPINT11_NYETINTRPT register field. */
105814 #define ALT_USB_DEV_DOEPINT11_NYETINTRPT_WIDTH 1
105815 /* The mask used to set the ALT_USB_DEV_DOEPINT11_NYETINTRPT register field value. */
105816 #define ALT_USB_DEV_DOEPINT11_NYETINTRPT_SET_MSK 0x00004000
105817 /* The mask used to clear the ALT_USB_DEV_DOEPINT11_NYETINTRPT register field value. */
105818 #define ALT_USB_DEV_DOEPINT11_NYETINTRPT_CLR_MSK 0xffffbfff
105819 /* The reset value of the ALT_USB_DEV_DOEPINT11_NYETINTRPT register field. */
105820 #define ALT_USB_DEV_DOEPINT11_NYETINTRPT_RESET 0x0
105821 /* Extracts the ALT_USB_DEV_DOEPINT11_NYETINTRPT field value from a register. */
105822 #define ALT_USB_DEV_DOEPINT11_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
105823 /* Produces a ALT_USB_DEV_DOEPINT11_NYETINTRPT register field value suitable for setting the register. */
105824 #define ALT_USB_DEV_DOEPINT11_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
105825 
105826 #ifndef __ASSEMBLY__
105827 /*
105828  * WARNING: The C register and register group struct declarations are provided for
105829  * convenience and illustrative purposes. They should, however, be used with
105830  * caution as the C language standard provides no guarantees about the alignment or
105831  * atomicity of device memory accesses. The recommended practice for writing
105832  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
105833  * alt_write_word() functions.
105834  *
105835  * The struct declaration for register ALT_USB_DEV_DOEPINT11.
105836  */
105837 struct ALT_USB_DEV_DOEPINT11_s
105838 {
105839  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
105840  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
105841  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT11_AHBERR */
105842  const uint32_t setup : 1; /* SETUP Phase Done */
105843  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
105844  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
105845  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
105846  uint32_t : 1; /* *UNDEFINED* */
105847  const uint32_t outpkterr : 1; /* OUT Packet Error */
105848  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
105849  uint32_t : 1; /* *UNDEFINED* */
105850  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
105851  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
105852  const uint32_t nakintrpt : 1; /* NAK Interrupt */
105853  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
105854  uint32_t : 17; /* *UNDEFINED* */
105855 };
105856 
105857 /* The typedef declaration for register ALT_USB_DEV_DOEPINT11. */
105858 typedef volatile struct ALT_USB_DEV_DOEPINT11_s ALT_USB_DEV_DOEPINT11_t;
105859 #endif /* __ASSEMBLY__ */
105860 
105861 /* The byte offset of the ALT_USB_DEV_DOEPINT11 register from the beginning of the component. */
105862 #define ALT_USB_DEV_DOEPINT11_OFST 0x468
105863 /* The address of the ALT_USB_DEV_DOEPINT11 register. */
105864 #define ALT_USB_DEV_DOEPINT11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT11_OFST))
105865 
105866 /*
105867  * Register : Device OUT Endpoint 11 Transfer Size Register - doeptsiz11
105868  *
105869  * The application must modify this register before enabling the endpoint. Once the
105870  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
105871  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
105872  * application can only read this register once the core has cleared the Endpoint
105873  * Enable bit.
105874  *
105875  * Register Layout
105876  *
105877  * Bits | Access | Reset | Description
105878  * :--------|:-------|:------|:-------------------
105879  * [18:0] | RW | 0x0 | Transfer Size
105880  * [28:19] | RW | 0x0 | Packet Count
105881  * [30:29] | R | 0x0 | SETUP Packet Count
105882  * [31] | ??? | 0x0 | *UNDEFINED*
105883  *
105884  */
105885 /*
105886  * Field : Transfer Size - xfersize
105887  *
105888  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
105889  * application only after it has exhausted the transfer size amount of data. The
105890  * transfer size can be Set to the maximum packet size of the endpoint, to be
105891  * interrupted at the end of each packet. The core decrements this field every time
105892  * a packet from the external memory is written to the RxFIFO.
105893  *
105894  * Field Access Macros:
105895  *
105896  */
105897 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ11_XFERSIZE register field. */
105898 #define ALT_USB_DEV_DOEPTSIZ11_XFERSIZE_LSB 0
105899 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ11_XFERSIZE register field. */
105900 #define ALT_USB_DEV_DOEPTSIZ11_XFERSIZE_MSB 18
105901 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ11_XFERSIZE register field. */
105902 #define ALT_USB_DEV_DOEPTSIZ11_XFERSIZE_WIDTH 19
105903 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ11_XFERSIZE register field value. */
105904 #define ALT_USB_DEV_DOEPTSIZ11_XFERSIZE_SET_MSK 0x0007ffff
105905 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ11_XFERSIZE register field value. */
105906 #define ALT_USB_DEV_DOEPTSIZ11_XFERSIZE_CLR_MSK 0xfff80000
105907 /* The reset value of the ALT_USB_DEV_DOEPTSIZ11_XFERSIZE register field. */
105908 #define ALT_USB_DEV_DOEPTSIZ11_XFERSIZE_RESET 0x0
105909 /* Extracts the ALT_USB_DEV_DOEPTSIZ11_XFERSIZE field value from a register. */
105910 #define ALT_USB_DEV_DOEPTSIZ11_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
105911 /* Produces a ALT_USB_DEV_DOEPTSIZ11_XFERSIZE register field value suitable for setting the register. */
105912 #define ALT_USB_DEV_DOEPTSIZ11_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
105913 
105914 /*
105915  * Field : Packet Count - pktcnt
105916  *
105917  * Indicates the total number of USB packets that constitute the Transfer Size
105918  * amount of data for endpoint 0.This field is decremented every time a packet
105919  * (maximum size or short packet) is read from the RxFIFO.
105920  *
105921  * Field Access Macros:
105922  *
105923  */
105924 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ11_PKTCNT register field. */
105925 #define ALT_USB_DEV_DOEPTSIZ11_PKTCNT_LSB 19
105926 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ11_PKTCNT register field. */
105927 #define ALT_USB_DEV_DOEPTSIZ11_PKTCNT_MSB 28
105928 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ11_PKTCNT register field. */
105929 #define ALT_USB_DEV_DOEPTSIZ11_PKTCNT_WIDTH 10
105930 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ11_PKTCNT register field value. */
105931 #define ALT_USB_DEV_DOEPTSIZ11_PKTCNT_SET_MSK 0x1ff80000
105932 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ11_PKTCNT register field value. */
105933 #define ALT_USB_DEV_DOEPTSIZ11_PKTCNT_CLR_MSK 0xe007ffff
105934 /* The reset value of the ALT_USB_DEV_DOEPTSIZ11_PKTCNT register field. */
105935 #define ALT_USB_DEV_DOEPTSIZ11_PKTCNT_RESET 0x0
105936 /* Extracts the ALT_USB_DEV_DOEPTSIZ11_PKTCNT field value from a register. */
105937 #define ALT_USB_DEV_DOEPTSIZ11_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
105938 /* Produces a ALT_USB_DEV_DOEPTSIZ11_PKTCNT register field value suitable for setting the register. */
105939 #define ALT_USB_DEV_DOEPTSIZ11_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
105940 
105941 /*
105942  * Field : SETUP Packet Count - rxdpid
105943  *
105944  * Applies to isochronous OUT endpoints only.This is the data PID received in the
105945  * last packet for this endpoint. Use datax.
105946  *
105947  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
105948  * number of back-to-back SETUP data packets the endpoint can receive.
105949  *
105950  * Field Enumeration Values:
105951  *
105952  * Enum | Value | Description
105953  * :------------------------------------------|:------|:-------------------
105954  * ALT_USB_DEV_DOEPTSIZ11_RXDPID_E_DATA0 | 0x0 | DATA0
105955  * ALT_USB_DEV_DOEPTSIZ11_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
105956  * ALT_USB_DEV_DOEPTSIZ11_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
105957  * ALT_USB_DEV_DOEPTSIZ11_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
105958  *
105959  * Field Access Macros:
105960  *
105961  */
105962 /*
105963  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ11_RXDPID
105964  *
105965  * DATA0
105966  */
105967 #define ALT_USB_DEV_DOEPTSIZ11_RXDPID_E_DATA0 0x0
105968 /*
105969  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ11_RXDPID
105970  *
105971  * DATA2 or 1 packet
105972  */
105973 #define ALT_USB_DEV_DOEPTSIZ11_RXDPID_E_DATA2PKT1 0x1
105974 /*
105975  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ11_RXDPID
105976  *
105977  * DATA1 or 2 packets
105978  */
105979 #define ALT_USB_DEV_DOEPTSIZ11_RXDPID_E_DATA1PKT2 0x2
105980 /*
105981  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ11_RXDPID
105982  *
105983  * MDATA or 3 packets
105984  */
105985 #define ALT_USB_DEV_DOEPTSIZ11_RXDPID_E_MDATAPKT3 0x3
105986 
105987 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ11_RXDPID register field. */
105988 #define ALT_USB_DEV_DOEPTSIZ11_RXDPID_LSB 29
105989 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ11_RXDPID register field. */
105990 #define ALT_USB_DEV_DOEPTSIZ11_RXDPID_MSB 30
105991 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ11_RXDPID register field. */
105992 #define ALT_USB_DEV_DOEPTSIZ11_RXDPID_WIDTH 2
105993 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ11_RXDPID register field value. */
105994 #define ALT_USB_DEV_DOEPTSIZ11_RXDPID_SET_MSK 0x60000000
105995 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ11_RXDPID register field value. */
105996 #define ALT_USB_DEV_DOEPTSIZ11_RXDPID_CLR_MSK 0x9fffffff
105997 /* The reset value of the ALT_USB_DEV_DOEPTSIZ11_RXDPID register field. */
105998 #define ALT_USB_DEV_DOEPTSIZ11_RXDPID_RESET 0x0
105999 /* Extracts the ALT_USB_DEV_DOEPTSIZ11_RXDPID field value from a register. */
106000 #define ALT_USB_DEV_DOEPTSIZ11_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
106001 /* Produces a ALT_USB_DEV_DOEPTSIZ11_RXDPID register field value suitable for setting the register. */
106002 #define ALT_USB_DEV_DOEPTSIZ11_RXDPID_SET(value) (((value) << 29) & 0x60000000)
106003 
106004 #ifndef __ASSEMBLY__
106005 /*
106006  * WARNING: The C register and register group struct declarations are provided for
106007  * convenience and illustrative purposes. They should, however, be used with
106008  * caution as the C language standard provides no guarantees about the alignment or
106009  * atomicity of device memory accesses. The recommended practice for writing
106010  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
106011  * alt_write_word() functions.
106012  *
106013  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ11.
106014  */
106015 struct ALT_USB_DEV_DOEPTSIZ11_s
106016 {
106017  uint32_t xfersize : 19; /* Transfer Size */
106018  uint32_t pktcnt : 10; /* Packet Count */
106019  const uint32_t rxdpid : 2; /* SETUP Packet Count */
106020  uint32_t : 1; /* *UNDEFINED* */
106021 };
106022 
106023 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ11. */
106024 typedef volatile struct ALT_USB_DEV_DOEPTSIZ11_s ALT_USB_DEV_DOEPTSIZ11_t;
106025 #endif /* __ASSEMBLY__ */
106026 
106027 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ11 register from the beginning of the component. */
106028 #define ALT_USB_DEV_DOEPTSIZ11_OFST 0x470
106029 /* The address of the ALT_USB_DEV_DOEPTSIZ11 register. */
106030 #define ALT_USB_DEV_DOEPTSIZ11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ11_OFST))
106031 
106032 /*
106033  * Register : Device OUT Endpoint 11 DMA Address Register - doepdma11
106034  *
106035  * DMA OUT Address.
106036  *
106037  * Register Layout
106038  *
106039  * Bits | Access | Reset | Description
106040  * :-------|:-------|:--------|:------------
106041  * [31:0] | RW | Unknown | DMA Address
106042  *
106043  */
106044 /*
106045  * Field : DMA Address - doepdma11
106046  *
106047  * Holds the start address of the external memory for storing or fetching endpoint
106048  * data. for control endpoints, this field stores control OUT data packets as well
106049  * as SETUP transaction data packets. When more than three SETUP packets are
106050  * received back-to-back, the SETUP data packet in the memory is overwritten. This
106051  * register is incremented on every AHB transaction. The application can give only
106052  * a DWORD-aligned address.
106053  *
106054  * When Scatter/Gather DMA mode is not enabled, the application programs the start
106055  * address value in this field.
106056  *
106057  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
106058  * for the descriptor list.
106059  *
106060  * Field Access Macros:
106061  *
106062  */
106063 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA11_DOEPDMA11 register field. */
106064 #define ALT_USB_DEV_DOEPDMA11_DOEPDMA11_LSB 0
106065 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA11_DOEPDMA11 register field. */
106066 #define ALT_USB_DEV_DOEPDMA11_DOEPDMA11_MSB 31
106067 /* The width in bits of the ALT_USB_DEV_DOEPDMA11_DOEPDMA11 register field. */
106068 #define ALT_USB_DEV_DOEPDMA11_DOEPDMA11_WIDTH 32
106069 /* The mask used to set the ALT_USB_DEV_DOEPDMA11_DOEPDMA11 register field value. */
106070 #define ALT_USB_DEV_DOEPDMA11_DOEPDMA11_SET_MSK 0xffffffff
106071 /* The mask used to clear the ALT_USB_DEV_DOEPDMA11_DOEPDMA11 register field value. */
106072 #define ALT_USB_DEV_DOEPDMA11_DOEPDMA11_CLR_MSK 0x00000000
106073 /* The reset value of the ALT_USB_DEV_DOEPDMA11_DOEPDMA11 register field is UNKNOWN. */
106074 #define ALT_USB_DEV_DOEPDMA11_DOEPDMA11_RESET 0x0
106075 /* Extracts the ALT_USB_DEV_DOEPDMA11_DOEPDMA11 field value from a register. */
106076 #define ALT_USB_DEV_DOEPDMA11_DOEPDMA11_GET(value) (((value) & 0xffffffff) >> 0)
106077 /* Produces a ALT_USB_DEV_DOEPDMA11_DOEPDMA11 register field value suitable for setting the register. */
106078 #define ALT_USB_DEV_DOEPDMA11_DOEPDMA11_SET(value) (((value) << 0) & 0xffffffff)
106079 
106080 #ifndef __ASSEMBLY__
106081 /*
106082  * WARNING: The C register and register group struct declarations are provided for
106083  * convenience and illustrative purposes. They should, however, be used with
106084  * caution as the C language standard provides no guarantees about the alignment or
106085  * atomicity of device memory accesses. The recommended practice for writing
106086  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
106087  * alt_write_word() functions.
106088  *
106089  * The struct declaration for register ALT_USB_DEV_DOEPDMA11.
106090  */
106091 struct ALT_USB_DEV_DOEPDMA11_s
106092 {
106093  uint32_t doepdma11 : 32; /* DMA Address */
106094 };
106095 
106096 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA11. */
106097 typedef volatile struct ALT_USB_DEV_DOEPDMA11_s ALT_USB_DEV_DOEPDMA11_t;
106098 #endif /* __ASSEMBLY__ */
106099 
106100 /* The byte offset of the ALT_USB_DEV_DOEPDMA11 register from the beginning of the component. */
106101 #define ALT_USB_DEV_DOEPDMA11_OFST 0x474
106102 /* The address of the ALT_USB_DEV_DOEPDMA11 register. */
106103 #define ALT_USB_DEV_DOEPDMA11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA11_OFST))
106104 
106105 /*
106106  * Register : Device OUT Endpoint 11 DMA Buffer Address Register - doepdmab11
106107  *
106108  * DMA Buffer Address.
106109  *
106110  * Register Layout
106111  *
106112  * Bits | Access | Reset | Description
106113  * :-------|:-------|:--------|:-------------------
106114  * [31:0] | R | Unknown | DMA Buffer Address
106115  *
106116  */
106117 /*
106118  * Field : DMA Buffer Address - doepdmab11
106119  *
106120  * Holds the current buffer address. This register is updated as and when the data
106121  * transfer for the corresponding end point is in progress. This register is
106122  * present only in Scatter/Gather DMA mode.
106123  *
106124  * Field Access Macros:
106125  *
106126  */
106127 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11 register field. */
106128 #define ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11_LSB 0
106129 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11 register field. */
106130 #define ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11_MSB 31
106131 /* The width in bits of the ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11 register field. */
106132 #define ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11_WIDTH 32
106133 /* The mask used to set the ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11 register field value. */
106134 #define ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11_SET_MSK 0xffffffff
106135 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11 register field value. */
106136 #define ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11_CLR_MSK 0x00000000
106137 /* The reset value of the ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11 register field is UNKNOWN. */
106138 #define ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11_RESET 0x0
106139 /* Extracts the ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11 field value from a register. */
106140 #define ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11_GET(value) (((value) & 0xffffffff) >> 0)
106141 /* Produces a ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11 register field value suitable for setting the register. */
106142 #define ALT_USB_DEV_DOEPDMAB11_DOEPDMAB11_SET(value) (((value) << 0) & 0xffffffff)
106143 
106144 #ifndef __ASSEMBLY__
106145 /*
106146  * WARNING: The C register and register group struct declarations are provided for
106147  * convenience and illustrative purposes. They should, however, be used with
106148  * caution as the C language standard provides no guarantees about the alignment or
106149  * atomicity of device memory accesses. The recommended practice for writing
106150  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
106151  * alt_write_word() functions.
106152  *
106153  * The struct declaration for register ALT_USB_DEV_DOEPDMAB11.
106154  */
106155 struct ALT_USB_DEV_DOEPDMAB11_s
106156 {
106157  const uint32_t doepdmab11 : 32; /* DMA Buffer Address */
106158 };
106159 
106160 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB11. */
106161 typedef volatile struct ALT_USB_DEV_DOEPDMAB11_s ALT_USB_DEV_DOEPDMAB11_t;
106162 #endif /* __ASSEMBLY__ */
106163 
106164 /* The byte offset of the ALT_USB_DEV_DOEPDMAB11 register from the beginning of the component. */
106165 #define ALT_USB_DEV_DOEPDMAB11_OFST 0x47c
106166 /* The address of the ALT_USB_DEV_DOEPDMAB11 register. */
106167 #define ALT_USB_DEV_DOEPDMAB11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB11_OFST))
106168 
106169 /*
106170  * Register : Device Control OUT Endpoint 12 Control Register - doepctl12
106171  *
106172  * Out Endpoint 12.
106173  *
106174  * Register Layout
106175  *
106176  * Bits | Access | Reset | Description
106177  * :--------|:-------|:------|:--------------------
106178  * [10:0] | RW | 0x0 | Maximum Packet Size
106179  * [14:11] | ??? | 0x0 | *UNDEFINED*
106180  * [15] | RW | 0x0 | USB Active Endpoint
106181  * [16] | R | 0x0 | Endpoint Data PID
106182  * [17] | R | 0x0 | NAK Status
106183  * [19:18] | RW | 0x0 | Endpoint Type
106184  * [20] | RW | 0x0 | Snoop Mode
106185  * [21] | R | 0x0 | STALL Handshake
106186  * [25:22] | ??? | 0x0 | *UNDEFINED*
106187  * [26] | W | 0x0 | Clear NAK
106188  * [27] | W | 0x0 | Set NAK
106189  * [28] | W | 0x0 | Set DATA0 PID
106190  * [29] | W | 0x0 | Set DATA1 PID
106191  * [30] | R | 0x0 | Endpoint Disable
106192  * [31] | R | 0x0 | Endpoint Enable
106193  *
106194  */
106195 /*
106196  * Field : Maximum Packet Size - mps
106197  *
106198  * Applies to IN and OUT endpoints. The application must program this field with
106199  * the maximum packet size for the current logical endpoint. This value is in
106200  * bytes.
106201  *
106202  * Field Access Macros:
106203  *
106204  */
106205 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_MPS register field. */
106206 #define ALT_USB_DEV_DOEPCTL12_MPS_LSB 0
106207 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_MPS register field. */
106208 #define ALT_USB_DEV_DOEPCTL12_MPS_MSB 10
106209 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_MPS register field. */
106210 #define ALT_USB_DEV_DOEPCTL12_MPS_WIDTH 11
106211 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_MPS register field value. */
106212 #define ALT_USB_DEV_DOEPCTL12_MPS_SET_MSK 0x000007ff
106213 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_MPS register field value. */
106214 #define ALT_USB_DEV_DOEPCTL12_MPS_CLR_MSK 0xfffff800
106215 /* The reset value of the ALT_USB_DEV_DOEPCTL12_MPS register field. */
106216 #define ALT_USB_DEV_DOEPCTL12_MPS_RESET 0x0
106217 /* Extracts the ALT_USB_DEV_DOEPCTL12_MPS field value from a register. */
106218 #define ALT_USB_DEV_DOEPCTL12_MPS_GET(value) (((value) & 0x000007ff) >> 0)
106219 /* Produces a ALT_USB_DEV_DOEPCTL12_MPS register field value suitable for setting the register. */
106220 #define ALT_USB_DEV_DOEPCTL12_MPS_SET(value) (((value) << 0) & 0x000007ff)
106221 
106222 /*
106223  * Field : USB Active Endpoint - usbactep
106224  *
106225  * Indicates whether this endpoint is active in the current configuration and
106226  * interface. The core clears this bit for all endpoints (other than EP 0) after
106227  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
106228  * commands, the application must program endpoint registers accordingly and set
106229  * this bit.
106230  *
106231  * Field Enumeration Values:
106232  *
106233  * Enum | Value | Description
106234  * :--------------------------------------|:------|:--------------------
106235  * ALT_USB_DEV_DOEPCTL12_USBACTEP_E_DISD | 0x0 | Not Active
106236  * ALT_USB_DEV_DOEPCTL12_USBACTEP_E_END | 0x1 | USB Active Endpoint
106237  *
106238  * Field Access Macros:
106239  *
106240  */
106241 /*
106242  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_USBACTEP
106243  *
106244  * Not Active
106245  */
106246 #define ALT_USB_DEV_DOEPCTL12_USBACTEP_E_DISD 0x0
106247 /*
106248  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_USBACTEP
106249  *
106250  * USB Active Endpoint
106251  */
106252 #define ALT_USB_DEV_DOEPCTL12_USBACTEP_E_END 0x1
106253 
106254 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_USBACTEP register field. */
106255 #define ALT_USB_DEV_DOEPCTL12_USBACTEP_LSB 15
106256 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_USBACTEP register field. */
106257 #define ALT_USB_DEV_DOEPCTL12_USBACTEP_MSB 15
106258 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_USBACTEP register field. */
106259 #define ALT_USB_DEV_DOEPCTL12_USBACTEP_WIDTH 1
106260 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_USBACTEP register field value. */
106261 #define ALT_USB_DEV_DOEPCTL12_USBACTEP_SET_MSK 0x00008000
106262 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_USBACTEP register field value. */
106263 #define ALT_USB_DEV_DOEPCTL12_USBACTEP_CLR_MSK 0xffff7fff
106264 /* The reset value of the ALT_USB_DEV_DOEPCTL12_USBACTEP register field. */
106265 #define ALT_USB_DEV_DOEPCTL12_USBACTEP_RESET 0x0
106266 /* Extracts the ALT_USB_DEV_DOEPCTL12_USBACTEP field value from a register. */
106267 #define ALT_USB_DEV_DOEPCTL12_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
106268 /* Produces a ALT_USB_DEV_DOEPCTL12_USBACTEP register field value suitable for setting the register. */
106269 #define ALT_USB_DEV_DOEPCTL12_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
106270 
106271 /*
106272  * Field : Endpoint Data PID - dpid
106273  *
106274  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
106275  * packet to be received or transmitted on this endpoint. The application must
106276  * program the PID of the first packet to be received or transmitted on this
106277  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
106278  * SetD0PID fields of this register to program either DATA0 or DATA1 PID.
106279  *
106280  * 0: DATA0
106281  *
106282  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
106283  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
106284  * DMA mode:
106285  *
106286  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
106287  * number in which the core transmits/receives isochronous data for this endpoint.
106288  * The application must program the even/odd (micro) frame number in which it
106289  * intends to transmit/receive isochronous data for this endpoint using the
106290  * SetEvnFr and SetOddFr fields in this register.
106291  *
106292  * 0: Even (micro)frame
106293  *
106294  * 1: Odd (micro)frame
106295  *
106296  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
106297  * number in which to send data is provided in the transmit descriptor structure.
106298  * The frame in which data is received is updated in receive descriptor structure.
106299  *
106300  * Field Enumeration Values:
106301  *
106302  * Enum | Value | Description
106303  * :-----------------------------------|:------|:-----------------------------
106304  * ALT_USB_DEV_DOEPCTL12_DPID_E_INACT | 0x0 | Endpoint Data PID not active
106305  * ALT_USB_DEV_DOEPCTL12_DPID_E_ACT | 0x1 | Endpoint Data PID active
106306  *
106307  * Field Access Macros:
106308  *
106309  */
106310 /*
106311  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_DPID
106312  *
106313  * Endpoint Data PID not active
106314  */
106315 #define ALT_USB_DEV_DOEPCTL12_DPID_E_INACT 0x0
106316 /*
106317  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_DPID
106318  *
106319  * Endpoint Data PID active
106320  */
106321 #define ALT_USB_DEV_DOEPCTL12_DPID_E_ACT 0x1
106322 
106323 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_DPID register field. */
106324 #define ALT_USB_DEV_DOEPCTL12_DPID_LSB 16
106325 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_DPID register field. */
106326 #define ALT_USB_DEV_DOEPCTL12_DPID_MSB 16
106327 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_DPID register field. */
106328 #define ALT_USB_DEV_DOEPCTL12_DPID_WIDTH 1
106329 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_DPID register field value. */
106330 #define ALT_USB_DEV_DOEPCTL12_DPID_SET_MSK 0x00010000
106331 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_DPID register field value. */
106332 #define ALT_USB_DEV_DOEPCTL12_DPID_CLR_MSK 0xfffeffff
106333 /* The reset value of the ALT_USB_DEV_DOEPCTL12_DPID register field. */
106334 #define ALT_USB_DEV_DOEPCTL12_DPID_RESET 0x0
106335 /* Extracts the ALT_USB_DEV_DOEPCTL12_DPID field value from a register. */
106336 #define ALT_USB_DEV_DOEPCTL12_DPID_GET(value) (((value) & 0x00010000) >> 16)
106337 /* Produces a ALT_USB_DEV_DOEPCTL12_DPID register field value suitable for setting the register. */
106338 #define ALT_USB_DEV_DOEPCTL12_DPID_SET(value) (((value) << 16) & 0x00010000)
106339 
106340 /*
106341  * Field : NAK Status - naksts
106342  *
106343  * When either the application or the core sets this bit:
106344  *
106345  * * The core stops receiving any data on an OUT endpoint, even if there is space
106346  * in the RxFIFO to accommodate the incoming packet.
106347  *
106348  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
106349  * IN endpoint, even if there data is available in the TxFIFO.
106350  *
106351  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
106352  * even if there data is available in the TxFIFO.
106353  *
106354  * Irrespective of this bit's setting, the core always responds to SETUP data
106355  * packets with an ACK handshake.
106356  *
106357  * Field Enumeration Values:
106358  *
106359  * Enum | Value | Description
106360  * :--------------------------------------|:------|:------------------------------------------------
106361  * ALT_USB_DEV_DOEPCTL12_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
106362  * : | | based on the FIFO status
106363  * ALT_USB_DEV_DOEPCTL12_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
106364  * : | | endpoint
106365  *
106366  * Field Access Macros:
106367  *
106368  */
106369 /*
106370  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_NAKSTS
106371  *
106372  * The core is transmitting non-NAK handshakes based on the FIFO status
106373  */
106374 #define ALT_USB_DEV_DOEPCTL12_NAKSTS_E_NONNAK 0x0
106375 /*
106376  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_NAKSTS
106377  *
106378  * The core is transmitting NAK handshakes on this endpoint
106379  */
106380 #define ALT_USB_DEV_DOEPCTL12_NAKSTS_E_NAK 0x1
106381 
106382 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_NAKSTS register field. */
106383 #define ALT_USB_DEV_DOEPCTL12_NAKSTS_LSB 17
106384 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_NAKSTS register field. */
106385 #define ALT_USB_DEV_DOEPCTL12_NAKSTS_MSB 17
106386 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_NAKSTS register field. */
106387 #define ALT_USB_DEV_DOEPCTL12_NAKSTS_WIDTH 1
106388 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_NAKSTS register field value. */
106389 #define ALT_USB_DEV_DOEPCTL12_NAKSTS_SET_MSK 0x00020000
106390 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_NAKSTS register field value. */
106391 #define ALT_USB_DEV_DOEPCTL12_NAKSTS_CLR_MSK 0xfffdffff
106392 /* The reset value of the ALT_USB_DEV_DOEPCTL12_NAKSTS register field. */
106393 #define ALT_USB_DEV_DOEPCTL12_NAKSTS_RESET 0x0
106394 /* Extracts the ALT_USB_DEV_DOEPCTL12_NAKSTS field value from a register. */
106395 #define ALT_USB_DEV_DOEPCTL12_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
106396 /* Produces a ALT_USB_DEV_DOEPCTL12_NAKSTS register field value suitable for setting the register. */
106397 #define ALT_USB_DEV_DOEPCTL12_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
106398 
106399 /*
106400  * Field : Endpoint Type - eptype
106401  *
106402  * This is the transfer type supported by this logical endpoint.
106403  *
106404  * Field Enumeration Values:
106405  *
106406  * Enum | Value | Description
106407  * :-------------------------------------------|:------|:------------
106408  * ALT_USB_DEV_DOEPCTL12_EPTYPE_E_CTL | 0x0 | Control
106409  * ALT_USB_DEV_DOEPCTL12_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
106410  * ALT_USB_DEV_DOEPCTL12_EPTYPE_E_BULK | 0x2 | Bulk
106411  * ALT_USB_DEV_DOEPCTL12_EPTYPE_E_INTERRUP | 0x3 | Interrupt
106412  *
106413  * Field Access Macros:
106414  *
106415  */
106416 /*
106417  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_EPTYPE
106418  *
106419  * Control
106420  */
106421 #define ALT_USB_DEV_DOEPCTL12_EPTYPE_E_CTL 0x0
106422 /*
106423  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_EPTYPE
106424  *
106425  * Isochronous
106426  */
106427 #define ALT_USB_DEV_DOEPCTL12_EPTYPE_E_ISOCHRONOUS 0x1
106428 /*
106429  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_EPTYPE
106430  *
106431  * Bulk
106432  */
106433 #define ALT_USB_DEV_DOEPCTL12_EPTYPE_E_BULK 0x2
106434 /*
106435  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_EPTYPE
106436  *
106437  * Interrupt
106438  */
106439 #define ALT_USB_DEV_DOEPCTL12_EPTYPE_E_INTERRUP 0x3
106440 
106441 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_EPTYPE register field. */
106442 #define ALT_USB_DEV_DOEPCTL12_EPTYPE_LSB 18
106443 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_EPTYPE register field. */
106444 #define ALT_USB_DEV_DOEPCTL12_EPTYPE_MSB 19
106445 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_EPTYPE register field. */
106446 #define ALT_USB_DEV_DOEPCTL12_EPTYPE_WIDTH 2
106447 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_EPTYPE register field value. */
106448 #define ALT_USB_DEV_DOEPCTL12_EPTYPE_SET_MSK 0x000c0000
106449 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_EPTYPE register field value. */
106450 #define ALT_USB_DEV_DOEPCTL12_EPTYPE_CLR_MSK 0xfff3ffff
106451 /* The reset value of the ALT_USB_DEV_DOEPCTL12_EPTYPE register field. */
106452 #define ALT_USB_DEV_DOEPCTL12_EPTYPE_RESET 0x0
106453 /* Extracts the ALT_USB_DEV_DOEPCTL12_EPTYPE field value from a register. */
106454 #define ALT_USB_DEV_DOEPCTL12_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
106455 /* Produces a ALT_USB_DEV_DOEPCTL12_EPTYPE register field value suitable for setting the register. */
106456 #define ALT_USB_DEV_DOEPCTL12_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
106457 
106458 /*
106459  * Field : Snoop Mode - snp
106460  *
106461  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
106462  * In Snoop mode, the core does not check the correctness of OUT packets before
106463  * transferring them to application memory.
106464  *
106465  * Field Enumeration Values:
106466  *
106467  * Enum | Value | Description
106468  * :--------------------------------|:------|:-------------------
106469  * ALT_USB_DEV_DOEPCTL12_SNP_E_DIS | 0x0 | Disable Snoop Mode
106470  * ALT_USB_DEV_DOEPCTL12_SNP_E_EN | 0x1 | Enable Snoop Mode
106471  *
106472  * Field Access Macros:
106473  *
106474  */
106475 /*
106476  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_SNP
106477  *
106478  * Disable Snoop Mode
106479  */
106480 #define ALT_USB_DEV_DOEPCTL12_SNP_E_DIS 0x0
106481 /*
106482  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_SNP
106483  *
106484  * Enable Snoop Mode
106485  */
106486 #define ALT_USB_DEV_DOEPCTL12_SNP_E_EN 0x1
106487 
106488 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_SNP register field. */
106489 #define ALT_USB_DEV_DOEPCTL12_SNP_LSB 20
106490 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_SNP register field. */
106491 #define ALT_USB_DEV_DOEPCTL12_SNP_MSB 20
106492 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_SNP register field. */
106493 #define ALT_USB_DEV_DOEPCTL12_SNP_WIDTH 1
106494 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_SNP register field value. */
106495 #define ALT_USB_DEV_DOEPCTL12_SNP_SET_MSK 0x00100000
106496 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_SNP register field value. */
106497 #define ALT_USB_DEV_DOEPCTL12_SNP_CLR_MSK 0xffefffff
106498 /* The reset value of the ALT_USB_DEV_DOEPCTL12_SNP register field. */
106499 #define ALT_USB_DEV_DOEPCTL12_SNP_RESET 0x0
106500 /* Extracts the ALT_USB_DEV_DOEPCTL12_SNP field value from a register. */
106501 #define ALT_USB_DEV_DOEPCTL12_SNP_GET(value) (((value) & 0x00100000) >> 20)
106502 /* Produces a ALT_USB_DEV_DOEPCTL12_SNP register field value suitable for setting the register. */
106503 #define ALT_USB_DEV_DOEPCTL12_SNP_SET(value) (((value) << 20) & 0x00100000)
106504 
106505 /*
106506  * Field : STALL Handshake - stall
106507  *
106508  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
106509  * application sets this bit to stall all tokens from the USB host to this
106510  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
106511  * along with this bit, the STALL bit takes priority. Only the application can
106512  * clear this bit, never the core. Applies to control endpoints only. The
106513  * application can only set this bit, and the core clears it, when a SETUP token is
106514  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
106515  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
106516  * of this bit's setting, the core always responds to SETUP data packets with an
106517  * ACK handshake.
106518  *
106519  * Field Enumeration Values:
106520  *
106521  * Enum | Value | Description
106522  * :------------------------------------|:------|:----------------------------
106523  * ALT_USB_DEV_DOEPCTL12_STALL_E_INACT | 0x0 | STALL All Tokens not active
106524  * ALT_USB_DEV_DOEPCTL12_STALL_E_ACT | 0x1 | STALL All Tokens active
106525  *
106526  * Field Access Macros:
106527  *
106528  */
106529 /*
106530  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_STALL
106531  *
106532  * STALL All Tokens not active
106533  */
106534 #define ALT_USB_DEV_DOEPCTL12_STALL_E_INACT 0x0
106535 /*
106536  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_STALL
106537  *
106538  * STALL All Tokens active
106539  */
106540 #define ALT_USB_DEV_DOEPCTL12_STALL_E_ACT 0x1
106541 
106542 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_STALL register field. */
106543 #define ALT_USB_DEV_DOEPCTL12_STALL_LSB 21
106544 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_STALL register field. */
106545 #define ALT_USB_DEV_DOEPCTL12_STALL_MSB 21
106546 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_STALL register field. */
106547 #define ALT_USB_DEV_DOEPCTL12_STALL_WIDTH 1
106548 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_STALL register field value. */
106549 #define ALT_USB_DEV_DOEPCTL12_STALL_SET_MSK 0x00200000
106550 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_STALL register field value. */
106551 #define ALT_USB_DEV_DOEPCTL12_STALL_CLR_MSK 0xffdfffff
106552 /* The reset value of the ALT_USB_DEV_DOEPCTL12_STALL register field. */
106553 #define ALT_USB_DEV_DOEPCTL12_STALL_RESET 0x0
106554 /* Extracts the ALT_USB_DEV_DOEPCTL12_STALL field value from a register. */
106555 #define ALT_USB_DEV_DOEPCTL12_STALL_GET(value) (((value) & 0x00200000) >> 21)
106556 /* Produces a ALT_USB_DEV_DOEPCTL12_STALL register field value suitable for setting the register. */
106557 #define ALT_USB_DEV_DOEPCTL12_STALL_SET(value) (((value) << 21) & 0x00200000)
106558 
106559 /*
106560  * Field : Clear NAK - cnak
106561  *
106562  * A write to this bit clears the NAK bit for the endpoint.
106563  *
106564  * Field Enumeration Values:
106565  *
106566  * Enum | Value | Description
106567  * :-----------------------------------|:------|:-------------
106568  * ALT_USB_DEV_DOEPCTL12_CNAK_E_INACT | 0x0 | No Clear NAK
106569  * ALT_USB_DEV_DOEPCTL12_CNAK_E_ACT | 0x1 | Clear NAK
106570  *
106571  * Field Access Macros:
106572  *
106573  */
106574 /*
106575  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_CNAK
106576  *
106577  * No Clear NAK
106578  */
106579 #define ALT_USB_DEV_DOEPCTL12_CNAK_E_INACT 0x0
106580 /*
106581  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_CNAK
106582  *
106583  * Clear NAK
106584  */
106585 #define ALT_USB_DEV_DOEPCTL12_CNAK_E_ACT 0x1
106586 
106587 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_CNAK register field. */
106588 #define ALT_USB_DEV_DOEPCTL12_CNAK_LSB 26
106589 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_CNAK register field. */
106590 #define ALT_USB_DEV_DOEPCTL12_CNAK_MSB 26
106591 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_CNAK register field. */
106592 #define ALT_USB_DEV_DOEPCTL12_CNAK_WIDTH 1
106593 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_CNAK register field value. */
106594 #define ALT_USB_DEV_DOEPCTL12_CNAK_SET_MSK 0x04000000
106595 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_CNAK register field value. */
106596 #define ALT_USB_DEV_DOEPCTL12_CNAK_CLR_MSK 0xfbffffff
106597 /* The reset value of the ALT_USB_DEV_DOEPCTL12_CNAK register field. */
106598 #define ALT_USB_DEV_DOEPCTL12_CNAK_RESET 0x0
106599 /* Extracts the ALT_USB_DEV_DOEPCTL12_CNAK field value from a register. */
106600 #define ALT_USB_DEV_DOEPCTL12_CNAK_GET(value) (((value) & 0x04000000) >> 26)
106601 /* Produces a ALT_USB_DEV_DOEPCTL12_CNAK register field value suitable for setting the register. */
106602 #define ALT_USB_DEV_DOEPCTL12_CNAK_SET(value) (((value) << 26) & 0x04000000)
106603 
106604 /*
106605  * Field : Set NAK - snak
106606  *
106607  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
106608  * application can control the transmission of NAK handshakes on an endpoint. The
106609  * core can also Set this bit for an endpoint after a SETUP packet is received on
106610  * that endpoint.
106611  *
106612  * Field Enumeration Values:
106613  *
106614  * Enum | Value | Description
106615  * :-----------------------------------|:------|:------------
106616  * ALT_USB_DEV_DOEPCTL12_SNAK_E_INACT | 0x0 | No Set NAK
106617  * ALT_USB_DEV_DOEPCTL12_SNAK_E_ACT | 0x1 | Set NAK
106618  *
106619  * Field Access Macros:
106620  *
106621  */
106622 /*
106623  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_SNAK
106624  *
106625  * No Set NAK
106626  */
106627 #define ALT_USB_DEV_DOEPCTL12_SNAK_E_INACT 0x0
106628 /*
106629  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_SNAK
106630  *
106631  * Set NAK
106632  */
106633 #define ALT_USB_DEV_DOEPCTL12_SNAK_E_ACT 0x1
106634 
106635 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_SNAK register field. */
106636 #define ALT_USB_DEV_DOEPCTL12_SNAK_LSB 27
106637 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_SNAK register field. */
106638 #define ALT_USB_DEV_DOEPCTL12_SNAK_MSB 27
106639 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_SNAK register field. */
106640 #define ALT_USB_DEV_DOEPCTL12_SNAK_WIDTH 1
106641 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_SNAK register field value. */
106642 #define ALT_USB_DEV_DOEPCTL12_SNAK_SET_MSK 0x08000000
106643 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_SNAK register field value. */
106644 #define ALT_USB_DEV_DOEPCTL12_SNAK_CLR_MSK 0xf7ffffff
106645 /* The reset value of the ALT_USB_DEV_DOEPCTL12_SNAK register field. */
106646 #define ALT_USB_DEV_DOEPCTL12_SNAK_RESET 0x0
106647 /* Extracts the ALT_USB_DEV_DOEPCTL12_SNAK field value from a register. */
106648 #define ALT_USB_DEV_DOEPCTL12_SNAK_GET(value) (((value) & 0x08000000) >> 27)
106649 /* Produces a ALT_USB_DEV_DOEPCTL12_SNAK register field value suitable for setting the register. */
106650 #define ALT_USB_DEV_DOEPCTL12_SNAK_SET(value) (((value) << 27) & 0x08000000)
106651 
106652 /*
106653  * Field : Set DATA0 PID - setd0pid
106654  *
106655  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
106656  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
106657  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
106658  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
106659  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
106660  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
106661  * mode is enabled, this field is reserved. The frame number in which to send data
106662  * is in the transmit descriptor structure. The frame in which to receive data is
106663  * updated in receive descriptor structure.
106664  *
106665  * Field Enumeration Values:
106666  *
106667  * Enum | Value | Description
106668  * :--------------------------------------|:------|:------------------------------------
106669  * ALT_USB_DEV_DOEPCTL12_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
106670  * ALT_USB_DEV_DOEPCTL12_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
106671  *
106672  * Field Access Macros:
106673  *
106674  */
106675 /*
106676  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_SETD0PID
106677  *
106678  * Disables Set DATA0 PID
106679  */
106680 #define ALT_USB_DEV_DOEPCTL12_SETD0PID_E_DISD 0x0
106681 /*
106682  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_SETD0PID
106683  *
106684  * Enables Endpoint Data PID to DATA0)
106685  */
106686 #define ALT_USB_DEV_DOEPCTL12_SETD0PID_E_END 0x1
106687 
106688 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_SETD0PID register field. */
106689 #define ALT_USB_DEV_DOEPCTL12_SETD0PID_LSB 28
106690 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_SETD0PID register field. */
106691 #define ALT_USB_DEV_DOEPCTL12_SETD0PID_MSB 28
106692 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_SETD0PID register field. */
106693 #define ALT_USB_DEV_DOEPCTL12_SETD0PID_WIDTH 1
106694 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_SETD0PID register field value. */
106695 #define ALT_USB_DEV_DOEPCTL12_SETD0PID_SET_MSK 0x10000000
106696 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_SETD0PID register field value. */
106697 #define ALT_USB_DEV_DOEPCTL12_SETD0PID_CLR_MSK 0xefffffff
106698 /* The reset value of the ALT_USB_DEV_DOEPCTL12_SETD0PID register field. */
106699 #define ALT_USB_DEV_DOEPCTL12_SETD0PID_RESET 0x0
106700 /* Extracts the ALT_USB_DEV_DOEPCTL12_SETD0PID field value from a register. */
106701 #define ALT_USB_DEV_DOEPCTL12_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
106702 /* Produces a ALT_USB_DEV_DOEPCTL12_SETD0PID register field value suitable for setting the register. */
106703 #define ALT_USB_DEV_DOEPCTL12_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
106704 
106705 /*
106706  * Field : Set DATA1 PID - setd1pid
106707  *
106708  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
106709  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
106710  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
106711  *
106712  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
106713  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
106714  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
106715  *
106716  * Field Enumeration Values:
106717  *
106718  * Enum | Value | Description
106719  * :--------------------------------------|:------|:-----------------------
106720  * ALT_USB_DEV_DOEPCTL12_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
106721  * ALT_USB_DEV_DOEPCTL12_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
106722  *
106723  * Field Access Macros:
106724  *
106725  */
106726 /*
106727  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_SETD1PID
106728  *
106729  * Disables Set DATA1 PID
106730  */
106731 #define ALT_USB_DEV_DOEPCTL12_SETD1PID_E_DISD 0x0
106732 /*
106733  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_SETD1PID
106734  *
106735  * Enables Set DATA1 PID
106736  */
106737 #define ALT_USB_DEV_DOEPCTL12_SETD1PID_E_END 0x1
106738 
106739 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_SETD1PID register field. */
106740 #define ALT_USB_DEV_DOEPCTL12_SETD1PID_LSB 29
106741 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_SETD1PID register field. */
106742 #define ALT_USB_DEV_DOEPCTL12_SETD1PID_MSB 29
106743 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_SETD1PID register field. */
106744 #define ALT_USB_DEV_DOEPCTL12_SETD1PID_WIDTH 1
106745 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_SETD1PID register field value. */
106746 #define ALT_USB_DEV_DOEPCTL12_SETD1PID_SET_MSK 0x20000000
106747 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_SETD1PID register field value. */
106748 #define ALT_USB_DEV_DOEPCTL12_SETD1PID_CLR_MSK 0xdfffffff
106749 /* The reset value of the ALT_USB_DEV_DOEPCTL12_SETD1PID register field. */
106750 #define ALT_USB_DEV_DOEPCTL12_SETD1PID_RESET 0x0
106751 /* Extracts the ALT_USB_DEV_DOEPCTL12_SETD1PID field value from a register. */
106752 #define ALT_USB_DEV_DOEPCTL12_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
106753 /* Produces a ALT_USB_DEV_DOEPCTL12_SETD1PID register field value suitable for setting the register. */
106754 #define ALT_USB_DEV_DOEPCTL12_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
106755 
106756 /*
106757  * Field : Endpoint Disable - epdis
106758  *
106759  * Applies to IN and OUT endpoints. The application sets this bit to stop
106760  * transmitting/receiving data on an endpoint, even before the transfer for that
106761  * endpoint is complete. The application must wait for the Endpoint Disabled
106762  * interrupt before treating the endpoint as disabled. The core clears this bit
106763  * before setting the Endpoint Disabled interrupt. The application must set this
106764  * bit only if Endpoint Enable is already set for this endpoint.
106765  *
106766  * Field Enumeration Values:
106767  *
106768  * Enum | Value | Description
106769  * :------------------------------------|:------|:--------------------
106770  * ALT_USB_DEV_DOEPCTL12_EPDIS_E_INACT | 0x0 | No Endpoint Disable
106771  * ALT_USB_DEV_DOEPCTL12_EPDIS_E_ACT | 0x1 | Endpoint Disable
106772  *
106773  * Field Access Macros:
106774  *
106775  */
106776 /*
106777  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_EPDIS
106778  *
106779  * No Endpoint Disable
106780  */
106781 #define ALT_USB_DEV_DOEPCTL12_EPDIS_E_INACT 0x0
106782 /*
106783  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_EPDIS
106784  *
106785  * Endpoint Disable
106786  */
106787 #define ALT_USB_DEV_DOEPCTL12_EPDIS_E_ACT 0x1
106788 
106789 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_EPDIS register field. */
106790 #define ALT_USB_DEV_DOEPCTL12_EPDIS_LSB 30
106791 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_EPDIS register field. */
106792 #define ALT_USB_DEV_DOEPCTL12_EPDIS_MSB 30
106793 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_EPDIS register field. */
106794 #define ALT_USB_DEV_DOEPCTL12_EPDIS_WIDTH 1
106795 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_EPDIS register field value. */
106796 #define ALT_USB_DEV_DOEPCTL12_EPDIS_SET_MSK 0x40000000
106797 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_EPDIS register field value. */
106798 #define ALT_USB_DEV_DOEPCTL12_EPDIS_CLR_MSK 0xbfffffff
106799 /* The reset value of the ALT_USB_DEV_DOEPCTL12_EPDIS register field. */
106800 #define ALT_USB_DEV_DOEPCTL12_EPDIS_RESET 0x0
106801 /* Extracts the ALT_USB_DEV_DOEPCTL12_EPDIS field value from a register. */
106802 #define ALT_USB_DEV_DOEPCTL12_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
106803 /* Produces a ALT_USB_DEV_DOEPCTL12_EPDIS register field value suitable for setting the register. */
106804 #define ALT_USB_DEV_DOEPCTL12_EPDIS_SET(value) (((value) << 30) & 0x40000000)
106805 
106806 /*
106807  * Field : Endpoint Enable - epena
106808  *
106809  * Applies to IN and OUT endpoints.
106810  *
106811  * * When Scatter/Gather DMA mode is enabled,
106812  *
106813  * * for IN endpoints this bit indicates that the descriptor structure and data
106814  * buffer with data ready to transmit is setup.
106815  *
106816  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
106817  * receive data is setup.
106818  *
106819  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
106820  * mode:
106821  *
106822  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
106823  * the endpoint.
106824  *
106825  * * for OUT endpoints, this bit indicates that the application has allocated the
106826  * memory to start receiving data from the USB.
106827  *
106828  * * The core clears this bit before setting any of the following interrupts on
106829  * this endpoint:
106830  *
106831  * * SETUP Phase Done
106832  *
106833  * * Endpoint Disabled
106834  *
106835  * * Transfer Completed
106836  *
106837  * for control endpoints in DMA mode, this bit must be set to be able to transfer
106838  * SETUP data packets in memory.
106839  *
106840  * Field Enumeration Values:
106841  *
106842  * Enum | Value | Description
106843  * :------------------------------------|:------|:-------------------------
106844  * ALT_USB_DEV_DOEPCTL12_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
106845  * ALT_USB_DEV_DOEPCTL12_EPENA_E_ACT | 0x1 | Endpoint Enable active
106846  *
106847  * Field Access Macros:
106848  *
106849  */
106850 /*
106851  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_EPENA
106852  *
106853  * Endpoint Enable inactive
106854  */
106855 #define ALT_USB_DEV_DOEPCTL12_EPENA_E_INACT 0x0
106856 /*
106857  * Enumerated value for register field ALT_USB_DEV_DOEPCTL12_EPENA
106858  *
106859  * Endpoint Enable active
106860  */
106861 #define ALT_USB_DEV_DOEPCTL12_EPENA_E_ACT 0x1
106862 
106863 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL12_EPENA register field. */
106864 #define ALT_USB_DEV_DOEPCTL12_EPENA_LSB 31
106865 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL12_EPENA register field. */
106866 #define ALT_USB_DEV_DOEPCTL12_EPENA_MSB 31
106867 /* The width in bits of the ALT_USB_DEV_DOEPCTL12_EPENA register field. */
106868 #define ALT_USB_DEV_DOEPCTL12_EPENA_WIDTH 1
106869 /* The mask used to set the ALT_USB_DEV_DOEPCTL12_EPENA register field value. */
106870 #define ALT_USB_DEV_DOEPCTL12_EPENA_SET_MSK 0x80000000
106871 /* The mask used to clear the ALT_USB_DEV_DOEPCTL12_EPENA register field value. */
106872 #define ALT_USB_DEV_DOEPCTL12_EPENA_CLR_MSK 0x7fffffff
106873 /* The reset value of the ALT_USB_DEV_DOEPCTL12_EPENA register field. */
106874 #define ALT_USB_DEV_DOEPCTL12_EPENA_RESET 0x0
106875 /* Extracts the ALT_USB_DEV_DOEPCTL12_EPENA field value from a register. */
106876 #define ALT_USB_DEV_DOEPCTL12_EPENA_GET(value) (((value) & 0x80000000) >> 31)
106877 /* Produces a ALT_USB_DEV_DOEPCTL12_EPENA register field value suitable for setting the register. */
106878 #define ALT_USB_DEV_DOEPCTL12_EPENA_SET(value) (((value) << 31) & 0x80000000)
106879 
106880 #ifndef __ASSEMBLY__
106881 /*
106882  * WARNING: The C register and register group struct declarations are provided for
106883  * convenience and illustrative purposes. They should, however, be used with
106884  * caution as the C language standard provides no guarantees about the alignment or
106885  * atomicity of device memory accesses. The recommended practice for writing
106886  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
106887  * alt_write_word() functions.
106888  *
106889  * The struct declaration for register ALT_USB_DEV_DOEPCTL12.
106890  */
106891 struct ALT_USB_DEV_DOEPCTL12_s
106892 {
106893  uint32_t mps : 11; /* Maximum Packet Size */
106894  uint32_t : 4; /* *UNDEFINED* */
106895  uint32_t usbactep : 1; /* USB Active Endpoint */
106896  const uint32_t dpid : 1; /* Endpoint Data PID */
106897  const uint32_t naksts : 1; /* NAK Status */
106898  uint32_t eptype : 2; /* Endpoint Type */
106899  uint32_t snp : 1; /* Snoop Mode */
106900  const uint32_t stall : 1; /* STALL Handshake */
106901  uint32_t : 4; /* *UNDEFINED* */
106902  uint32_t cnak : 1; /* Clear NAK */
106903  uint32_t snak : 1; /* Set NAK */
106904  uint32_t setd0pid : 1; /* Set DATA0 PID */
106905  uint32_t setd1pid : 1; /* Set DATA1 PID */
106906  const uint32_t epdis : 1; /* Endpoint Disable */
106907  const uint32_t epena : 1; /* Endpoint Enable */
106908 };
106909 
106910 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL12. */
106911 typedef volatile struct ALT_USB_DEV_DOEPCTL12_s ALT_USB_DEV_DOEPCTL12_t;
106912 #endif /* __ASSEMBLY__ */
106913 
106914 /* The byte offset of the ALT_USB_DEV_DOEPCTL12 register from the beginning of the component. */
106915 #define ALT_USB_DEV_DOEPCTL12_OFST 0x480
106916 /* The address of the ALT_USB_DEV_DOEPCTL12 register. */
106917 #define ALT_USB_DEV_DOEPCTL12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL12_OFST))
106918 
106919 /*
106920  * Register : Device OUT Endpoint 12 Interrupt Register - doepint12
106921  *
106922  * This register indicates the status of an endpoint with respect to USB- and AHB-
106923  * related events. The application must read this register when the OUT Endpoints
106924  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
106925  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
106926  * can read this register, it must first read the Device All Endpoints Interrupt
106927  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
106928  * Interrupt register. The application must clear the appropriate bit in this
106929  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
106930  *
106931  * Register Layout
106932  *
106933  * Bits | Access | Reset | Description
106934  * :--------|:-------|:------|:------------------------------------------
106935  * [0] | R | 0x0 | Transfer Completed Interrupt
106936  * [1] | R | 0x0 | Endpoint Disabled Interrupt
106937  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT12_AHBERR
106938  * [3] | R | 0x0 | SETUP Phase Done
106939  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
106940  * [5] | R | 0x0 | Status Phase Received for Control Write
106941  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
106942  * [7] | ??? | 0x0 | *UNDEFINED*
106943  * [8] | R | 0x0 | OUT Packet Error
106944  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
106945  * [10] | ??? | 0x0 | *UNDEFINED*
106946  * [11] | R | 0x0 | Packet Drop Status
106947  * [12] | R | 0x0 | BbleErr Interrupt
106948  * [13] | R | 0x0 | NAK Interrupt
106949  * [14] | R | 0x0 | NYET Interrupt
106950  * [31:15] | ??? | 0x0 | *UNDEFINED*
106951  *
106952  */
106953 /*
106954  * Field : Transfer Completed Interrupt - xfercompl
106955  *
106956  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
106957  *
106958  * This field indicates that the requested data from the internal FIFO is moved to
106959  * external system memory. This interrupt is generated only when the corresponding
106960  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
106961  * is Set.
106962  *
106963  * When Scatter/Gather DMA mode is disabled, this field indicates that the
106964  * programmed transfer is complete on the AHB as well as on the USB, for this
106965  * endpoint.
106966  *
106967  * Field Enumeration Values:
106968  *
106969  * Enum | Value | Description
106970  * :----------------------------------------|:------|:-----------------------------
106971  * ALT_USB_DEV_DOEPINT12_XFERCOMPL_E_INACT | 0x0 | No Interrupt
106972  * ALT_USB_DEV_DOEPINT12_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
106973  *
106974  * Field Access Macros:
106975  *
106976  */
106977 /*
106978  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_XFERCOMPL
106979  *
106980  * No Interrupt
106981  */
106982 #define ALT_USB_DEV_DOEPINT12_XFERCOMPL_E_INACT 0x0
106983 /*
106984  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_XFERCOMPL
106985  *
106986  * Transfer Completed Interrupt
106987  */
106988 #define ALT_USB_DEV_DOEPINT12_XFERCOMPL_E_ACT 0x1
106989 
106990 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_XFERCOMPL register field. */
106991 #define ALT_USB_DEV_DOEPINT12_XFERCOMPL_LSB 0
106992 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_XFERCOMPL register field. */
106993 #define ALT_USB_DEV_DOEPINT12_XFERCOMPL_MSB 0
106994 /* The width in bits of the ALT_USB_DEV_DOEPINT12_XFERCOMPL register field. */
106995 #define ALT_USB_DEV_DOEPINT12_XFERCOMPL_WIDTH 1
106996 /* The mask used to set the ALT_USB_DEV_DOEPINT12_XFERCOMPL register field value. */
106997 #define ALT_USB_DEV_DOEPINT12_XFERCOMPL_SET_MSK 0x00000001
106998 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_XFERCOMPL register field value. */
106999 #define ALT_USB_DEV_DOEPINT12_XFERCOMPL_CLR_MSK 0xfffffffe
107000 /* The reset value of the ALT_USB_DEV_DOEPINT12_XFERCOMPL register field. */
107001 #define ALT_USB_DEV_DOEPINT12_XFERCOMPL_RESET 0x0
107002 /* Extracts the ALT_USB_DEV_DOEPINT12_XFERCOMPL field value from a register. */
107003 #define ALT_USB_DEV_DOEPINT12_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
107004 /* Produces a ALT_USB_DEV_DOEPINT12_XFERCOMPL register field value suitable for setting the register. */
107005 #define ALT_USB_DEV_DOEPINT12_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
107006 
107007 /*
107008  * Field : Endpoint Disabled Interrupt - epdisbld
107009  *
107010  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
107011  * disabled per the application's request.
107012  *
107013  * Field Enumeration Values:
107014  *
107015  * Enum | Value | Description
107016  * :---------------------------------------|:------|:----------------------------
107017  * ALT_USB_DEV_DOEPINT12_EPDISBLD_E_INACT | 0x0 | No Interrupt
107018  * ALT_USB_DEV_DOEPINT12_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
107019  *
107020  * Field Access Macros:
107021  *
107022  */
107023 /*
107024  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_EPDISBLD
107025  *
107026  * No Interrupt
107027  */
107028 #define ALT_USB_DEV_DOEPINT12_EPDISBLD_E_INACT 0x0
107029 /*
107030  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_EPDISBLD
107031  *
107032  * Endpoint Disabled Interrupt
107033  */
107034 #define ALT_USB_DEV_DOEPINT12_EPDISBLD_E_ACT 0x1
107035 
107036 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_EPDISBLD register field. */
107037 #define ALT_USB_DEV_DOEPINT12_EPDISBLD_LSB 1
107038 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_EPDISBLD register field. */
107039 #define ALT_USB_DEV_DOEPINT12_EPDISBLD_MSB 1
107040 /* The width in bits of the ALT_USB_DEV_DOEPINT12_EPDISBLD register field. */
107041 #define ALT_USB_DEV_DOEPINT12_EPDISBLD_WIDTH 1
107042 /* The mask used to set the ALT_USB_DEV_DOEPINT12_EPDISBLD register field value. */
107043 #define ALT_USB_DEV_DOEPINT12_EPDISBLD_SET_MSK 0x00000002
107044 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_EPDISBLD register field value. */
107045 #define ALT_USB_DEV_DOEPINT12_EPDISBLD_CLR_MSK 0xfffffffd
107046 /* The reset value of the ALT_USB_DEV_DOEPINT12_EPDISBLD register field. */
107047 #define ALT_USB_DEV_DOEPINT12_EPDISBLD_RESET 0x0
107048 /* Extracts the ALT_USB_DEV_DOEPINT12_EPDISBLD field value from a register. */
107049 #define ALT_USB_DEV_DOEPINT12_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
107050 /* Produces a ALT_USB_DEV_DOEPINT12_EPDISBLD register field value suitable for setting the register. */
107051 #define ALT_USB_DEV_DOEPINT12_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
107052 
107053 /*
107054  * Field : ahberr
107055  *
107056  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
107057  * there is an AHB error during an AHB read/write. The application can read the
107058  * corresponding endpoint DMA address register to get the error address.
107059  *
107060  * Field Enumeration Values:
107061  *
107062  * Enum | Value | Description
107063  * :-------------------------------------|:------|:--------------------
107064  * ALT_USB_DEV_DOEPINT12_AHBERR_E_INACT | 0x0 | No Interrupt
107065  * ALT_USB_DEV_DOEPINT12_AHBERR_E_ACT | 0x1 | AHB Error interrupt
107066  *
107067  * Field Access Macros:
107068  *
107069  */
107070 /*
107071  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_AHBERR
107072  *
107073  * No Interrupt
107074  */
107075 #define ALT_USB_DEV_DOEPINT12_AHBERR_E_INACT 0x0
107076 /*
107077  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_AHBERR
107078  *
107079  * AHB Error interrupt
107080  */
107081 #define ALT_USB_DEV_DOEPINT12_AHBERR_E_ACT 0x1
107082 
107083 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_AHBERR register field. */
107084 #define ALT_USB_DEV_DOEPINT12_AHBERR_LSB 2
107085 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_AHBERR register field. */
107086 #define ALT_USB_DEV_DOEPINT12_AHBERR_MSB 2
107087 /* The width in bits of the ALT_USB_DEV_DOEPINT12_AHBERR register field. */
107088 #define ALT_USB_DEV_DOEPINT12_AHBERR_WIDTH 1
107089 /* The mask used to set the ALT_USB_DEV_DOEPINT12_AHBERR register field value. */
107090 #define ALT_USB_DEV_DOEPINT12_AHBERR_SET_MSK 0x00000004
107091 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_AHBERR register field value. */
107092 #define ALT_USB_DEV_DOEPINT12_AHBERR_CLR_MSK 0xfffffffb
107093 /* The reset value of the ALT_USB_DEV_DOEPINT12_AHBERR register field. */
107094 #define ALT_USB_DEV_DOEPINT12_AHBERR_RESET 0x0
107095 /* Extracts the ALT_USB_DEV_DOEPINT12_AHBERR field value from a register. */
107096 #define ALT_USB_DEV_DOEPINT12_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
107097 /* Produces a ALT_USB_DEV_DOEPINT12_AHBERR register field value suitable for setting the register. */
107098 #define ALT_USB_DEV_DOEPINT12_AHBERR_SET(value) (((value) << 2) & 0x00000004)
107099 
107100 /*
107101  * Field : SETUP Phase Done - setup
107102  *
107103  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
107104  * control endpoint is complete and no more back-to-back SETUP packets were
107105  * received for the current control transfer. On this interrupt, the application
107106  * can decode the received SETUP data packet.
107107  *
107108  * Field Enumeration Values:
107109  *
107110  * Enum | Value | Description
107111  * :------------------------------------|:------|:--------------------
107112  * ALT_USB_DEV_DOEPINT12_SETUP_E_INACT | 0x0 | No SETUP Phase Done
107113  * ALT_USB_DEV_DOEPINT12_SETUP_E_ACT | 0x1 | SETUP Phase Done
107114  *
107115  * Field Access Macros:
107116  *
107117  */
107118 /*
107119  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_SETUP
107120  *
107121  * No SETUP Phase Done
107122  */
107123 #define ALT_USB_DEV_DOEPINT12_SETUP_E_INACT 0x0
107124 /*
107125  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_SETUP
107126  *
107127  * SETUP Phase Done
107128  */
107129 #define ALT_USB_DEV_DOEPINT12_SETUP_E_ACT 0x1
107130 
107131 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_SETUP register field. */
107132 #define ALT_USB_DEV_DOEPINT12_SETUP_LSB 3
107133 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_SETUP register field. */
107134 #define ALT_USB_DEV_DOEPINT12_SETUP_MSB 3
107135 /* The width in bits of the ALT_USB_DEV_DOEPINT12_SETUP register field. */
107136 #define ALT_USB_DEV_DOEPINT12_SETUP_WIDTH 1
107137 /* The mask used to set the ALT_USB_DEV_DOEPINT12_SETUP register field value. */
107138 #define ALT_USB_DEV_DOEPINT12_SETUP_SET_MSK 0x00000008
107139 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_SETUP register field value. */
107140 #define ALT_USB_DEV_DOEPINT12_SETUP_CLR_MSK 0xfffffff7
107141 /* The reset value of the ALT_USB_DEV_DOEPINT12_SETUP register field. */
107142 #define ALT_USB_DEV_DOEPINT12_SETUP_RESET 0x0
107143 /* Extracts the ALT_USB_DEV_DOEPINT12_SETUP field value from a register. */
107144 #define ALT_USB_DEV_DOEPINT12_SETUP_GET(value) (((value) & 0x00000008) >> 3)
107145 /* Produces a ALT_USB_DEV_DOEPINT12_SETUP register field value suitable for setting the register. */
107146 #define ALT_USB_DEV_DOEPINT12_SETUP_SET(value) (((value) << 3) & 0x00000008)
107147 
107148 /*
107149  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
107150  *
107151  * Applies only to control OUT endpoints. Indicates that an OUT token was received
107152  * when the endpoint was not yet enabled. This interrupt is asserted on the
107153  * endpoint for which the OUT token was received.
107154  *
107155  * Field Enumeration Values:
107156  *
107157  * Enum | Value | Description
107158  * :------------------------------------------|:------|:---------------------------------------------
107159  * ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
107160  * ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
107161  *
107162  * Field Access Macros:
107163  *
107164  */
107165 /*
107166  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS
107167  *
107168  * No OUT Token Received When Endpoint Disabled
107169  */
107170 #define ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS_E_INACT 0x0
107171 /*
107172  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS
107173  *
107174  * OUT Token Received When Endpoint Disabled
107175  */
107176 #define ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS_E_ACT 0x1
107177 
107178 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS register field. */
107179 #define ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS_LSB 4
107180 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS register field. */
107181 #define ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS_MSB 4
107182 /* The width in bits of the ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS register field. */
107183 #define ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS_WIDTH 1
107184 /* The mask used to set the ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS register field value. */
107185 #define ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS_SET_MSK 0x00000010
107186 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS register field value. */
107187 #define ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS_CLR_MSK 0xffffffef
107188 /* The reset value of the ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS register field. */
107189 #define ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS_RESET 0x0
107190 /* Extracts the ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS field value from a register. */
107191 #define ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
107192 /* Produces a ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS register field value suitable for setting the register. */
107193 #define ALT_USB_DEV_DOEPINT12_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
107194 
107195 /*
107196  * Field : Status Phase Received for Control Write - stsphsercvd
107197  *
107198  * This interrupt is valid only for Control OUT endpoints and only in Scatter
107199  * Gather DMA mode. This interrupt is generated only after the core has transferred
107200  * all the data that the host has sent during the data phase of a control write
107201  * transfer, to the system memory buffer. The interrupt indicates to the
107202  * application that the host has switched from data phase to the status phase of a
107203  * Control Write transfer. The application can use this interrupt to ACK or STALL
107204  * the Status phase, after it has decoded the data phase. This is applicable only
107205  * in Case of Scatter Gather DMA mode.
107206  *
107207  * Field Enumeration Values:
107208  *
107209  * Enum | Value | Description
107210  * :------------------------------------------|:------|:-------------------------------------------
107211  * ALT_USB_DEV_DOEPINT12_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
107212  * ALT_USB_DEV_DOEPINT12_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
107213  *
107214  * Field Access Macros:
107215  *
107216  */
107217 /*
107218  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_STSPHSERCVD
107219  *
107220  * No Status Phase Received for Control Write
107221  */
107222 #define ALT_USB_DEV_DOEPINT12_STSPHSERCVD_E_INACT 0x0
107223 /*
107224  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_STSPHSERCVD
107225  *
107226  * Status Phase Received for Control Write
107227  */
107228 #define ALT_USB_DEV_DOEPINT12_STSPHSERCVD_E_ACT 0x1
107229 
107230 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_STSPHSERCVD register field. */
107231 #define ALT_USB_DEV_DOEPINT12_STSPHSERCVD_LSB 5
107232 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_STSPHSERCVD register field. */
107233 #define ALT_USB_DEV_DOEPINT12_STSPHSERCVD_MSB 5
107234 /* The width in bits of the ALT_USB_DEV_DOEPINT12_STSPHSERCVD register field. */
107235 #define ALT_USB_DEV_DOEPINT12_STSPHSERCVD_WIDTH 1
107236 /* The mask used to set the ALT_USB_DEV_DOEPINT12_STSPHSERCVD register field value. */
107237 #define ALT_USB_DEV_DOEPINT12_STSPHSERCVD_SET_MSK 0x00000020
107238 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_STSPHSERCVD register field value. */
107239 #define ALT_USB_DEV_DOEPINT12_STSPHSERCVD_CLR_MSK 0xffffffdf
107240 /* The reset value of the ALT_USB_DEV_DOEPINT12_STSPHSERCVD register field. */
107241 #define ALT_USB_DEV_DOEPINT12_STSPHSERCVD_RESET 0x0
107242 /* Extracts the ALT_USB_DEV_DOEPINT12_STSPHSERCVD field value from a register. */
107243 #define ALT_USB_DEV_DOEPINT12_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
107244 /* Produces a ALT_USB_DEV_DOEPINT12_STSPHSERCVD register field value suitable for setting the register. */
107245 #define ALT_USB_DEV_DOEPINT12_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
107246 
107247 /*
107248  * Field : Back-to-Back SETUP Packets Received - back2backsetup
107249  *
107250  * Applies to Control OUT endpoints only. This bit indicates that the core has
107251  * received more than three back-to-back SETUP packets for this particular
107252  * endpoint. for information about handling this interrupt,
107253  *
107254  * Field Enumeration Values:
107255  *
107256  * Enum | Value | Description
107257  * :---------------------------------------------|:------|:---------------------------------------
107258  * ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
107259  * ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
107260  *
107261  * Field Access Macros:
107262  *
107263  */
107264 /*
107265  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP
107266  *
107267  * No Back-to-Back SETUP Packets Received
107268  */
107269 #define ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP_E_INACT 0x0
107270 /*
107271  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP
107272  *
107273  * Back-to-Back SETUP Packets Received
107274  */
107275 #define ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP_E_ACT 0x1
107276 
107277 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP register field. */
107278 #define ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP_LSB 6
107279 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP register field. */
107280 #define ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP_MSB 6
107281 /* The width in bits of the ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP register field. */
107282 #define ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP_WIDTH 1
107283 /* The mask used to set the ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP register field value. */
107284 #define ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP_SET_MSK 0x00000040
107285 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP register field value. */
107286 #define ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP_CLR_MSK 0xffffffbf
107287 /* The reset value of the ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP register field. */
107288 #define ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP_RESET 0x0
107289 /* Extracts the ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP field value from a register. */
107290 #define ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
107291 /* Produces a ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP register field value suitable for setting the register. */
107292 #define ALT_USB_DEV_DOEPINT12_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
107293 
107294 /*
107295  * Field : OUT Packet Error - outpkterr
107296  *
107297  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
107298  * an overflow or a CRC error for non-Isochronous OUT packet.
107299  *
107300  * Field Enumeration Values:
107301  *
107302  * Enum | Value | Description
107303  * :----------------------------------------|:------|:--------------------
107304  * ALT_USB_DEV_DOEPINT12_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
107305  * ALT_USB_DEV_DOEPINT12_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
107306  *
107307  * Field Access Macros:
107308  *
107309  */
107310 /*
107311  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_OUTPKTERR
107312  *
107313  * No OUT Packet Error
107314  */
107315 #define ALT_USB_DEV_DOEPINT12_OUTPKTERR_E_INACT 0x0
107316 /*
107317  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_OUTPKTERR
107318  *
107319  * OUT Packet Error
107320  */
107321 #define ALT_USB_DEV_DOEPINT12_OUTPKTERR_E_ACT 0x1
107322 
107323 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_OUTPKTERR register field. */
107324 #define ALT_USB_DEV_DOEPINT12_OUTPKTERR_LSB 8
107325 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_OUTPKTERR register field. */
107326 #define ALT_USB_DEV_DOEPINT12_OUTPKTERR_MSB 8
107327 /* The width in bits of the ALT_USB_DEV_DOEPINT12_OUTPKTERR register field. */
107328 #define ALT_USB_DEV_DOEPINT12_OUTPKTERR_WIDTH 1
107329 /* The mask used to set the ALT_USB_DEV_DOEPINT12_OUTPKTERR register field value. */
107330 #define ALT_USB_DEV_DOEPINT12_OUTPKTERR_SET_MSK 0x00000100
107331 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_OUTPKTERR register field value. */
107332 #define ALT_USB_DEV_DOEPINT12_OUTPKTERR_CLR_MSK 0xfffffeff
107333 /* The reset value of the ALT_USB_DEV_DOEPINT12_OUTPKTERR register field. */
107334 #define ALT_USB_DEV_DOEPINT12_OUTPKTERR_RESET 0x0
107335 /* Extracts the ALT_USB_DEV_DOEPINT12_OUTPKTERR field value from a register. */
107336 #define ALT_USB_DEV_DOEPINT12_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
107337 /* Produces a ALT_USB_DEV_DOEPINT12_OUTPKTERR register field value suitable for setting the register. */
107338 #define ALT_USB_DEV_DOEPINT12_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
107339 
107340 /*
107341  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
107342  *
107343  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
107344  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
107345  * the descriptor accessed is not ready for the Core to process, such as Host busy
107346  * or DMA done
107347  *
107348  * Field Enumeration Values:
107349  *
107350  * Enum | Value | Description
107351  * :--------------------------------------|:------|:--------------
107352  * ALT_USB_DEV_DOEPINT12_BNAINTR_E_INACT | 0x0 | No interrupt
107353  * ALT_USB_DEV_DOEPINT12_BNAINTR_E_ACT | 0x1 | BNA interrupt
107354  *
107355  * Field Access Macros:
107356  *
107357  */
107358 /*
107359  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_BNAINTR
107360  *
107361  * No interrupt
107362  */
107363 #define ALT_USB_DEV_DOEPINT12_BNAINTR_E_INACT 0x0
107364 /*
107365  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_BNAINTR
107366  *
107367  * BNA interrupt
107368  */
107369 #define ALT_USB_DEV_DOEPINT12_BNAINTR_E_ACT 0x1
107370 
107371 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_BNAINTR register field. */
107372 #define ALT_USB_DEV_DOEPINT12_BNAINTR_LSB 9
107373 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_BNAINTR register field. */
107374 #define ALT_USB_DEV_DOEPINT12_BNAINTR_MSB 9
107375 /* The width in bits of the ALT_USB_DEV_DOEPINT12_BNAINTR register field. */
107376 #define ALT_USB_DEV_DOEPINT12_BNAINTR_WIDTH 1
107377 /* The mask used to set the ALT_USB_DEV_DOEPINT12_BNAINTR register field value. */
107378 #define ALT_USB_DEV_DOEPINT12_BNAINTR_SET_MSK 0x00000200
107379 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_BNAINTR register field value. */
107380 #define ALT_USB_DEV_DOEPINT12_BNAINTR_CLR_MSK 0xfffffdff
107381 /* The reset value of the ALT_USB_DEV_DOEPINT12_BNAINTR register field. */
107382 #define ALT_USB_DEV_DOEPINT12_BNAINTR_RESET 0x0
107383 /* Extracts the ALT_USB_DEV_DOEPINT12_BNAINTR field value from a register. */
107384 #define ALT_USB_DEV_DOEPINT12_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
107385 /* Produces a ALT_USB_DEV_DOEPINT12_BNAINTR register field value suitable for setting the register. */
107386 #define ALT_USB_DEV_DOEPINT12_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
107387 
107388 /*
107389  * Field : Packet Drop Status - pktdrpsts
107390  *
107391  * This bit indicates to the application that an ISOC OUT packet has been dropped.
107392  * This bit does not have an associated mask bit and does not generate an
107393  * interrupt.
107394  *
107395  * Field Enumeration Values:
107396  *
107397  * Enum | Value | Description
107398  * :----------------------------------------|:------|:-----------------------------
107399  * ALT_USB_DEV_DOEPINT12_PKTDRPSTS_E_INACT | 0x0 | No interrupt
107400  * ALT_USB_DEV_DOEPINT12_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
107401  *
107402  * Field Access Macros:
107403  *
107404  */
107405 /*
107406  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_PKTDRPSTS
107407  *
107408  * No interrupt
107409  */
107410 #define ALT_USB_DEV_DOEPINT12_PKTDRPSTS_E_INACT 0x0
107411 /*
107412  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_PKTDRPSTS
107413  *
107414  * Packet Drop Status interrupt
107415  */
107416 #define ALT_USB_DEV_DOEPINT12_PKTDRPSTS_E_ACT 0x1
107417 
107418 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_PKTDRPSTS register field. */
107419 #define ALT_USB_DEV_DOEPINT12_PKTDRPSTS_LSB 11
107420 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_PKTDRPSTS register field. */
107421 #define ALT_USB_DEV_DOEPINT12_PKTDRPSTS_MSB 11
107422 /* The width in bits of the ALT_USB_DEV_DOEPINT12_PKTDRPSTS register field. */
107423 #define ALT_USB_DEV_DOEPINT12_PKTDRPSTS_WIDTH 1
107424 /* The mask used to set the ALT_USB_DEV_DOEPINT12_PKTDRPSTS register field value. */
107425 #define ALT_USB_DEV_DOEPINT12_PKTDRPSTS_SET_MSK 0x00000800
107426 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_PKTDRPSTS register field value. */
107427 #define ALT_USB_DEV_DOEPINT12_PKTDRPSTS_CLR_MSK 0xfffff7ff
107428 /* The reset value of the ALT_USB_DEV_DOEPINT12_PKTDRPSTS register field. */
107429 #define ALT_USB_DEV_DOEPINT12_PKTDRPSTS_RESET 0x0
107430 /* Extracts the ALT_USB_DEV_DOEPINT12_PKTDRPSTS field value from a register. */
107431 #define ALT_USB_DEV_DOEPINT12_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
107432 /* Produces a ALT_USB_DEV_DOEPINT12_PKTDRPSTS register field value suitable for setting the register. */
107433 #define ALT_USB_DEV_DOEPINT12_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
107434 
107435 /*
107436  * Field : BbleErr Interrupt - bbleerr
107437  *
107438  * The core generates this interrupt when babble is received for the endpoint.
107439  *
107440  * Field Enumeration Values:
107441  *
107442  * Enum | Value | Description
107443  * :--------------------------------------|:------|:------------------
107444  * ALT_USB_DEV_DOEPINT12_BBLEERR_E_INACT | 0x0 | No interrupt
107445  * ALT_USB_DEV_DOEPINT12_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
107446  *
107447  * Field Access Macros:
107448  *
107449  */
107450 /*
107451  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_BBLEERR
107452  *
107453  * No interrupt
107454  */
107455 #define ALT_USB_DEV_DOEPINT12_BBLEERR_E_INACT 0x0
107456 /*
107457  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_BBLEERR
107458  *
107459  * BbleErr interrupt
107460  */
107461 #define ALT_USB_DEV_DOEPINT12_BBLEERR_E_ACT 0x1
107462 
107463 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_BBLEERR register field. */
107464 #define ALT_USB_DEV_DOEPINT12_BBLEERR_LSB 12
107465 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_BBLEERR register field. */
107466 #define ALT_USB_DEV_DOEPINT12_BBLEERR_MSB 12
107467 /* The width in bits of the ALT_USB_DEV_DOEPINT12_BBLEERR register field. */
107468 #define ALT_USB_DEV_DOEPINT12_BBLEERR_WIDTH 1
107469 /* The mask used to set the ALT_USB_DEV_DOEPINT12_BBLEERR register field value. */
107470 #define ALT_USB_DEV_DOEPINT12_BBLEERR_SET_MSK 0x00001000
107471 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_BBLEERR register field value. */
107472 #define ALT_USB_DEV_DOEPINT12_BBLEERR_CLR_MSK 0xffffefff
107473 /* The reset value of the ALT_USB_DEV_DOEPINT12_BBLEERR register field. */
107474 #define ALT_USB_DEV_DOEPINT12_BBLEERR_RESET 0x0
107475 /* Extracts the ALT_USB_DEV_DOEPINT12_BBLEERR field value from a register. */
107476 #define ALT_USB_DEV_DOEPINT12_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
107477 /* Produces a ALT_USB_DEV_DOEPINT12_BBLEERR register field value suitable for setting the register. */
107478 #define ALT_USB_DEV_DOEPINT12_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
107479 
107480 /*
107481  * Field : NAK Interrupt - nakintrpt
107482  *
107483  * The core generates this interrupt when a NAK is transmitted or received by the
107484  * device. In case of isochronous IN endpoints the interrupt gets generated when a
107485  * zero length packet is transmitted due to un-availability of data in the TXFifo.
107486  *
107487  * Field Enumeration Values:
107488  *
107489  * Enum | Value | Description
107490  * :----------------------------------------|:------|:--------------
107491  * ALT_USB_DEV_DOEPINT12_NAKINTRPT_E_INACT | 0x0 | No interrupt
107492  * ALT_USB_DEV_DOEPINT12_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
107493  *
107494  * Field Access Macros:
107495  *
107496  */
107497 /*
107498  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_NAKINTRPT
107499  *
107500  * No interrupt
107501  */
107502 #define ALT_USB_DEV_DOEPINT12_NAKINTRPT_E_INACT 0x0
107503 /*
107504  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_NAKINTRPT
107505  *
107506  * NAK Interrupt
107507  */
107508 #define ALT_USB_DEV_DOEPINT12_NAKINTRPT_E_ACT 0x1
107509 
107510 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_NAKINTRPT register field. */
107511 #define ALT_USB_DEV_DOEPINT12_NAKINTRPT_LSB 13
107512 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_NAKINTRPT register field. */
107513 #define ALT_USB_DEV_DOEPINT12_NAKINTRPT_MSB 13
107514 /* The width in bits of the ALT_USB_DEV_DOEPINT12_NAKINTRPT register field. */
107515 #define ALT_USB_DEV_DOEPINT12_NAKINTRPT_WIDTH 1
107516 /* The mask used to set the ALT_USB_DEV_DOEPINT12_NAKINTRPT register field value. */
107517 #define ALT_USB_DEV_DOEPINT12_NAKINTRPT_SET_MSK 0x00002000
107518 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_NAKINTRPT register field value. */
107519 #define ALT_USB_DEV_DOEPINT12_NAKINTRPT_CLR_MSK 0xffffdfff
107520 /* The reset value of the ALT_USB_DEV_DOEPINT12_NAKINTRPT register field. */
107521 #define ALT_USB_DEV_DOEPINT12_NAKINTRPT_RESET 0x0
107522 /* Extracts the ALT_USB_DEV_DOEPINT12_NAKINTRPT field value from a register. */
107523 #define ALT_USB_DEV_DOEPINT12_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
107524 /* Produces a ALT_USB_DEV_DOEPINT12_NAKINTRPT register field value suitable for setting the register. */
107525 #define ALT_USB_DEV_DOEPINT12_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
107526 
107527 /*
107528  * Field : NYET Interrupt - nyetintrpt
107529  *
107530  * The core generates this interrupt when a NYET response is transmitted for a non
107531  * isochronous OUT endpoint.
107532  *
107533  * Field Enumeration Values:
107534  *
107535  * Enum | Value | Description
107536  * :-----------------------------------------|:------|:---------------
107537  * ALT_USB_DEV_DOEPINT12_NYETINTRPT_E_INACT | 0x0 | No interrupt
107538  * ALT_USB_DEV_DOEPINT12_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
107539  *
107540  * Field Access Macros:
107541  *
107542  */
107543 /*
107544  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_NYETINTRPT
107545  *
107546  * No interrupt
107547  */
107548 #define ALT_USB_DEV_DOEPINT12_NYETINTRPT_E_INACT 0x0
107549 /*
107550  * Enumerated value for register field ALT_USB_DEV_DOEPINT12_NYETINTRPT
107551  *
107552  * NYET Interrupt
107553  */
107554 #define ALT_USB_DEV_DOEPINT12_NYETINTRPT_E_ACT 0x1
107555 
107556 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT12_NYETINTRPT register field. */
107557 #define ALT_USB_DEV_DOEPINT12_NYETINTRPT_LSB 14
107558 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT12_NYETINTRPT register field. */
107559 #define ALT_USB_DEV_DOEPINT12_NYETINTRPT_MSB 14
107560 /* The width in bits of the ALT_USB_DEV_DOEPINT12_NYETINTRPT register field. */
107561 #define ALT_USB_DEV_DOEPINT12_NYETINTRPT_WIDTH 1
107562 /* The mask used to set the ALT_USB_DEV_DOEPINT12_NYETINTRPT register field value. */
107563 #define ALT_USB_DEV_DOEPINT12_NYETINTRPT_SET_MSK 0x00004000
107564 /* The mask used to clear the ALT_USB_DEV_DOEPINT12_NYETINTRPT register field value. */
107565 #define ALT_USB_DEV_DOEPINT12_NYETINTRPT_CLR_MSK 0xffffbfff
107566 /* The reset value of the ALT_USB_DEV_DOEPINT12_NYETINTRPT register field. */
107567 #define ALT_USB_DEV_DOEPINT12_NYETINTRPT_RESET 0x0
107568 /* Extracts the ALT_USB_DEV_DOEPINT12_NYETINTRPT field value from a register. */
107569 #define ALT_USB_DEV_DOEPINT12_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
107570 /* Produces a ALT_USB_DEV_DOEPINT12_NYETINTRPT register field value suitable for setting the register. */
107571 #define ALT_USB_DEV_DOEPINT12_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
107572 
107573 #ifndef __ASSEMBLY__
107574 /*
107575  * WARNING: The C register and register group struct declarations are provided for
107576  * convenience and illustrative purposes. They should, however, be used with
107577  * caution as the C language standard provides no guarantees about the alignment or
107578  * atomicity of device memory accesses. The recommended practice for writing
107579  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
107580  * alt_write_word() functions.
107581  *
107582  * The struct declaration for register ALT_USB_DEV_DOEPINT12.
107583  */
107584 struct ALT_USB_DEV_DOEPINT12_s
107585 {
107586  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
107587  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
107588  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT12_AHBERR */
107589  const uint32_t setup : 1; /* SETUP Phase Done */
107590  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
107591  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
107592  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
107593  uint32_t : 1; /* *UNDEFINED* */
107594  const uint32_t outpkterr : 1; /* OUT Packet Error */
107595  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
107596  uint32_t : 1; /* *UNDEFINED* */
107597  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
107598  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
107599  const uint32_t nakintrpt : 1; /* NAK Interrupt */
107600  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
107601  uint32_t : 17; /* *UNDEFINED* */
107602 };
107603 
107604 /* The typedef declaration for register ALT_USB_DEV_DOEPINT12. */
107605 typedef volatile struct ALT_USB_DEV_DOEPINT12_s ALT_USB_DEV_DOEPINT12_t;
107606 #endif /* __ASSEMBLY__ */
107607 
107608 /* The byte offset of the ALT_USB_DEV_DOEPINT12 register from the beginning of the component. */
107609 #define ALT_USB_DEV_DOEPINT12_OFST 0x488
107610 /* The address of the ALT_USB_DEV_DOEPINT12 register. */
107611 #define ALT_USB_DEV_DOEPINT12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT12_OFST))
107612 
107613 /*
107614  * Register : Device OUT Endpoint 12 Transfer Size Register - doeptsiz12
107615  *
107616  * The application must modify this register before enabling the endpoint. Once the
107617  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
107618  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
107619  * application can only read this register once the core has cleared the Endpoint
107620  * Enable bit.
107621  *
107622  * Register Layout
107623  *
107624  * Bits | Access | Reset | Description
107625  * :--------|:-------|:------|:-------------------
107626  * [18:0] | RW | 0x0 | Transfer Size
107627  * [28:19] | RW | 0x0 | Packet Count
107628  * [30:29] | R | 0x0 | SETUP Packet Count
107629  * [31] | ??? | 0x0 | *UNDEFINED*
107630  *
107631  */
107632 /*
107633  * Field : Transfer Size - xfersize
107634  *
107635  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
107636  * application only after it has exhausted the transfer size amount of data. The
107637  * transfer size can be Set to the maximum packet size of the endpoint, to be
107638  * interrupted at the end of each packet. The core decrements this field every time
107639  * a packet from the external memory is written to the RxFIFO.
107640  *
107641  * Field Access Macros:
107642  *
107643  */
107644 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ12_XFERSIZE register field. */
107645 #define ALT_USB_DEV_DOEPTSIZ12_XFERSIZE_LSB 0
107646 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ12_XFERSIZE register field. */
107647 #define ALT_USB_DEV_DOEPTSIZ12_XFERSIZE_MSB 18
107648 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ12_XFERSIZE register field. */
107649 #define ALT_USB_DEV_DOEPTSIZ12_XFERSIZE_WIDTH 19
107650 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ12_XFERSIZE register field value. */
107651 #define ALT_USB_DEV_DOEPTSIZ12_XFERSIZE_SET_MSK 0x0007ffff
107652 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ12_XFERSIZE register field value. */
107653 #define ALT_USB_DEV_DOEPTSIZ12_XFERSIZE_CLR_MSK 0xfff80000
107654 /* The reset value of the ALT_USB_DEV_DOEPTSIZ12_XFERSIZE register field. */
107655 #define ALT_USB_DEV_DOEPTSIZ12_XFERSIZE_RESET 0x0
107656 /* Extracts the ALT_USB_DEV_DOEPTSIZ12_XFERSIZE field value from a register. */
107657 #define ALT_USB_DEV_DOEPTSIZ12_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
107658 /* Produces a ALT_USB_DEV_DOEPTSIZ12_XFERSIZE register field value suitable for setting the register. */
107659 #define ALT_USB_DEV_DOEPTSIZ12_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
107660 
107661 /*
107662  * Field : Packet Count - pktcnt
107663  *
107664  * Indicates the total number of USB packets that constitute the Transfer Size
107665  * amount of data for endpoint 0.This field is decremented every time a packet
107666  * (maximum size or short packet) is read from the RxFIFO.
107667  *
107668  * Field Access Macros:
107669  *
107670  */
107671 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ12_PKTCNT register field. */
107672 #define ALT_USB_DEV_DOEPTSIZ12_PKTCNT_LSB 19
107673 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ12_PKTCNT register field. */
107674 #define ALT_USB_DEV_DOEPTSIZ12_PKTCNT_MSB 28
107675 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ12_PKTCNT register field. */
107676 #define ALT_USB_DEV_DOEPTSIZ12_PKTCNT_WIDTH 10
107677 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ12_PKTCNT register field value. */
107678 #define ALT_USB_DEV_DOEPTSIZ12_PKTCNT_SET_MSK 0x1ff80000
107679 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ12_PKTCNT register field value. */
107680 #define ALT_USB_DEV_DOEPTSIZ12_PKTCNT_CLR_MSK 0xe007ffff
107681 /* The reset value of the ALT_USB_DEV_DOEPTSIZ12_PKTCNT register field. */
107682 #define ALT_USB_DEV_DOEPTSIZ12_PKTCNT_RESET 0x0
107683 /* Extracts the ALT_USB_DEV_DOEPTSIZ12_PKTCNT field value from a register. */
107684 #define ALT_USB_DEV_DOEPTSIZ12_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
107685 /* Produces a ALT_USB_DEV_DOEPTSIZ12_PKTCNT register field value suitable for setting the register. */
107686 #define ALT_USB_DEV_DOEPTSIZ12_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
107687 
107688 /*
107689  * Field : SETUP Packet Count - rxdpid
107690  *
107691  * Applies to isochronous OUT endpoints only.This is the data PID received in the
107692  * last packet for this endpoint. Use datax.
107693  *
107694  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
107695  * number of back-to-back SETUP data packets the endpoint can receive.
107696  *
107697  * Field Enumeration Values:
107698  *
107699  * Enum | Value | Description
107700  * :------------------------------------------|:------|:-------------------
107701  * ALT_USB_DEV_DOEPTSIZ12_RXDPID_E_DATA0 | 0x0 | DATA0
107702  * ALT_USB_DEV_DOEPTSIZ12_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
107703  * ALT_USB_DEV_DOEPTSIZ12_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
107704  * ALT_USB_DEV_DOEPTSIZ12_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
107705  *
107706  * Field Access Macros:
107707  *
107708  */
107709 /*
107710  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ12_RXDPID
107711  *
107712  * DATA0
107713  */
107714 #define ALT_USB_DEV_DOEPTSIZ12_RXDPID_E_DATA0 0x0
107715 /*
107716  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ12_RXDPID
107717  *
107718  * DATA2 or 1 packet
107719  */
107720 #define ALT_USB_DEV_DOEPTSIZ12_RXDPID_E_DATA2PKT1 0x1
107721 /*
107722  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ12_RXDPID
107723  *
107724  * DATA1 or 2 packets
107725  */
107726 #define ALT_USB_DEV_DOEPTSIZ12_RXDPID_E_DATA1PKT2 0x2
107727 /*
107728  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ12_RXDPID
107729  *
107730  * MDATA or 3 packets
107731  */
107732 #define ALT_USB_DEV_DOEPTSIZ12_RXDPID_E_MDATAPKT3 0x3
107733 
107734 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ12_RXDPID register field. */
107735 #define ALT_USB_DEV_DOEPTSIZ12_RXDPID_LSB 29
107736 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ12_RXDPID register field. */
107737 #define ALT_USB_DEV_DOEPTSIZ12_RXDPID_MSB 30
107738 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ12_RXDPID register field. */
107739 #define ALT_USB_DEV_DOEPTSIZ12_RXDPID_WIDTH 2
107740 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ12_RXDPID register field value. */
107741 #define ALT_USB_DEV_DOEPTSIZ12_RXDPID_SET_MSK 0x60000000
107742 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ12_RXDPID register field value. */
107743 #define ALT_USB_DEV_DOEPTSIZ12_RXDPID_CLR_MSK 0x9fffffff
107744 /* The reset value of the ALT_USB_DEV_DOEPTSIZ12_RXDPID register field. */
107745 #define ALT_USB_DEV_DOEPTSIZ12_RXDPID_RESET 0x0
107746 /* Extracts the ALT_USB_DEV_DOEPTSIZ12_RXDPID field value from a register. */
107747 #define ALT_USB_DEV_DOEPTSIZ12_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
107748 /* Produces a ALT_USB_DEV_DOEPTSIZ12_RXDPID register field value suitable for setting the register. */
107749 #define ALT_USB_DEV_DOEPTSIZ12_RXDPID_SET(value) (((value) << 29) & 0x60000000)
107750 
107751 #ifndef __ASSEMBLY__
107752 /*
107753  * WARNING: The C register and register group struct declarations are provided for
107754  * convenience and illustrative purposes. They should, however, be used with
107755  * caution as the C language standard provides no guarantees about the alignment or
107756  * atomicity of device memory accesses. The recommended practice for writing
107757  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
107758  * alt_write_word() functions.
107759  *
107760  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ12.
107761  */
107762 struct ALT_USB_DEV_DOEPTSIZ12_s
107763 {
107764  uint32_t xfersize : 19; /* Transfer Size */
107765  uint32_t pktcnt : 10; /* Packet Count */
107766  const uint32_t rxdpid : 2; /* SETUP Packet Count */
107767  uint32_t : 1; /* *UNDEFINED* */
107768 };
107769 
107770 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ12. */
107771 typedef volatile struct ALT_USB_DEV_DOEPTSIZ12_s ALT_USB_DEV_DOEPTSIZ12_t;
107772 #endif /* __ASSEMBLY__ */
107773 
107774 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ12 register from the beginning of the component. */
107775 #define ALT_USB_DEV_DOEPTSIZ12_OFST 0x490
107776 /* The address of the ALT_USB_DEV_DOEPTSIZ12 register. */
107777 #define ALT_USB_DEV_DOEPTSIZ12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ12_OFST))
107778 
107779 /*
107780  * Register : Device OUT Endpoint 12 DMA Address Register - doepdma12
107781  *
107782  * DMA OUT Address.
107783  *
107784  * Register Layout
107785  *
107786  * Bits | Access | Reset | Description
107787  * :-------|:-------|:--------|:------------
107788  * [31:0] | RW | Unknown | DMA Address
107789  *
107790  */
107791 /*
107792  * Field : DMA Address - doepdma12
107793  *
107794  * Holds the start address of the external memory for storing or fetching endpoint
107795  * data. for control endpoints, this field stores control OUT data packets as well
107796  * as SETUP transaction data packets. When more than three SETUP packets are
107797  * received back-to-back, the SETUP data packet in the memory is overwritten. This
107798  * register is incremented on every AHB transaction. The application can give only
107799  * a DWORD-aligned address.
107800  *
107801  * When Scatter/Gather DMA mode is not enabled, the application programs the start
107802  * address value in this field.
107803  *
107804  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
107805  * for the descriptor list.
107806  *
107807  * Field Access Macros:
107808  *
107809  */
107810 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA12_DOEPDMA12 register field. */
107811 #define ALT_USB_DEV_DOEPDMA12_DOEPDMA12_LSB 0
107812 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA12_DOEPDMA12 register field. */
107813 #define ALT_USB_DEV_DOEPDMA12_DOEPDMA12_MSB 31
107814 /* The width in bits of the ALT_USB_DEV_DOEPDMA12_DOEPDMA12 register field. */
107815 #define ALT_USB_DEV_DOEPDMA12_DOEPDMA12_WIDTH 32
107816 /* The mask used to set the ALT_USB_DEV_DOEPDMA12_DOEPDMA12 register field value. */
107817 #define ALT_USB_DEV_DOEPDMA12_DOEPDMA12_SET_MSK 0xffffffff
107818 /* The mask used to clear the ALT_USB_DEV_DOEPDMA12_DOEPDMA12 register field value. */
107819 #define ALT_USB_DEV_DOEPDMA12_DOEPDMA12_CLR_MSK 0x00000000
107820 /* The reset value of the ALT_USB_DEV_DOEPDMA12_DOEPDMA12 register field is UNKNOWN. */
107821 #define ALT_USB_DEV_DOEPDMA12_DOEPDMA12_RESET 0x0
107822 /* Extracts the ALT_USB_DEV_DOEPDMA12_DOEPDMA12 field value from a register. */
107823 #define ALT_USB_DEV_DOEPDMA12_DOEPDMA12_GET(value) (((value) & 0xffffffff) >> 0)
107824 /* Produces a ALT_USB_DEV_DOEPDMA12_DOEPDMA12 register field value suitable for setting the register. */
107825 #define ALT_USB_DEV_DOEPDMA12_DOEPDMA12_SET(value) (((value) << 0) & 0xffffffff)
107826 
107827 #ifndef __ASSEMBLY__
107828 /*
107829  * WARNING: The C register and register group struct declarations are provided for
107830  * convenience and illustrative purposes. They should, however, be used with
107831  * caution as the C language standard provides no guarantees about the alignment or
107832  * atomicity of device memory accesses. The recommended practice for writing
107833  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
107834  * alt_write_word() functions.
107835  *
107836  * The struct declaration for register ALT_USB_DEV_DOEPDMA12.
107837  */
107838 struct ALT_USB_DEV_DOEPDMA12_s
107839 {
107840  uint32_t doepdma12 : 32; /* DMA Address */
107841 };
107842 
107843 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA12. */
107844 typedef volatile struct ALT_USB_DEV_DOEPDMA12_s ALT_USB_DEV_DOEPDMA12_t;
107845 #endif /* __ASSEMBLY__ */
107846 
107847 /* The byte offset of the ALT_USB_DEV_DOEPDMA12 register from the beginning of the component. */
107848 #define ALT_USB_DEV_DOEPDMA12_OFST 0x494
107849 /* The address of the ALT_USB_DEV_DOEPDMA12 register. */
107850 #define ALT_USB_DEV_DOEPDMA12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA12_OFST))
107851 
107852 /*
107853  * Register : Device OUT Endpoint 12 DMA Buffer Address Register - doepdmab12
107854  *
107855  * DMA Buffer Address.
107856  *
107857  * Register Layout
107858  *
107859  * Bits | Access | Reset | Description
107860  * :-------|:-------|:--------|:-------------------
107861  * [31:0] | R | Unknown | DMA Buffer Address
107862  *
107863  */
107864 /*
107865  * Field : DMA Buffer Address - doepdmab12
107866  *
107867  * Holds the current buffer address. This register is updated as and when the data
107868  * transfer for the corresponding end point is in progress. This register is
107869  * present only in Scatter/Gather DMA mode.
107870  *
107871  * Field Access Macros:
107872  *
107873  */
107874 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12 register field. */
107875 #define ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12_LSB 0
107876 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12 register field. */
107877 #define ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12_MSB 31
107878 /* The width in bits of the ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12 register field. */
107879 #define ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12_WIDTH 32
107880 /* The mask used to set the ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12 register field value. */
107881 #define ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12_SET_MSK 0xffffffff
107882 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12 register field value. */
107883 #define ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12_CLR_MSK 0x00000000
107884 /* The reset value of the ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12 register field is UNKNOWN. */
107885 #define ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12_RESET 0x0
107886 /* Extracts the ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12 field value from a register. */
107887 #define ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12_GET(value) (((value) & 0xffffffff) >> 0)
107888 /* Produces a ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12 register field value suitable for setting the register. */
107889 #define ALT_USB_DEV_DOEPDMAB12_DOEPDMAB12_SET(value) (((value) << 0) & 0xffffffff)
107890 
107891 #ifndef __ASSEMBLY__
107892 /*
107893  * WARNING: The C register and register group struct declarations are provided for
107894  * convenience and illustrative purposes. They should, however, be used with
107895  * caution as the C language standard provides no guarantees about the alignment or
107896  * atomicity of device memory accesses. The recommended practice for writing
107897  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
107898  * alt_write_word() functions.
107899  *
107900  * The struct declaration for register ALT_USB_DEV_DOEPDMAB12.
107901  */
107902 struct ALT_USB_DEV_DOEPDMAB12_s
107903 {
107904  const uint32_t doepdmab12 : 32; /* DMA Buffer Address */
107905 };
107906 
107907 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB12. */
107908 typedef volatile struct ALT_USB_DEV_DOEPDMAB12_s ALT_USB_DEV_DOEPDMAB12_t;
107909 #endif /* __ASSEMBLY__ */
107910 
107911 /* The byte offset of the ALT_USB_DEV_DOEPDMAB12 register from the beginning of the component. */
107912 #define ALT_USB_DEV_DOEPDMAB12_OFST 0x49c
107913 /* The address of the ALT_USB_DEV_DOEPDMAB12 register. */
107914 #define ALT_USB_DEV_DOEPDMAB12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB12_OFST))
107915 
107916 /*
107917  * Register : Device Control OUT Endpoint 13 Control Register - doepctl13
107918  *
107919  * Out Endpoint 13.
107920  *
107921  * Register Layout
107922  *
107923  * Bits | Access | Reset | Description
107924  * :--------|:-------|:------|:--------------------
107925  * [10:0] | RW | 0x0 | Maximum Packet Size
107926  * [14:11] | ??? | 0x0 | *UNDEFINED*
107927  * [15] | RW | 0x0 | USB Active Endpoint
107928  * [16] | R | 0x0 | Endpoint Data PID
107929  * [17] | R | 0x0 | NAK Status
107930  * [19:18] | RW | 0x0 | Endpoint Type
107931  * [20] | RW | 0x0 | Snoop Mode
107932  * [21] | R | 0x0 | STALL Handshake
107933  * [25:22] | ??? | 0x0 | *UNDEFINED*
107934  * [26] | W | 0x0 | Clear NAK
107935  * [27] | W | 0x0 | Set NAK
107936  * [28] | W | 0x0 | Set DATA0 PID
107937  * [29] | W | 0x0 | Set DATA1 PID
107938  * [30] | R | 0x0 | Endpoint Disable
107939  * [31] | R | 0x0 | Endpoint Enable
107940  *
107941  */
107942 /*
107943  * Field : Maximum Packet Size - mps
107944  *
107945  * Applies to IN and OUT endpoints. The application must program this field with
107946  * the maximum packet size for the current logical endpoint. This value is in
107947  * bytes.
107948  *
107949  * Field Access Macros:
107950  *
107951  */
107952 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_MPS register field. */
107953 #define ALT_USB_DEV_DOEPCTL13_MPS_LSB 0
107954 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_MPS register field. */
107955 #define ALT_USB_DEV_DOEPCTL13_MPS_MSB 10
107956 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_MPS register field. */
107957 #define ALT_USB_DEV_DOEPCTL13_MPS_WIDTH 11
107958 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_MPS register field value. */
107959 #define ALT_USB_DEV_DOEPCTL13_MPS_SET_MSK 0x000007ff
107960 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_MPS register field value. */
107961 #define ALT_USB_DEV_DOEPCTL13_MPS_CLR_MSK 0xfffff800
107962 /* The reset value of the ALT_USB_DEV_DOEPCTL13_MPS register field. */
107963 #define ALT_USB_DEV_DOEPCTL13_MPS_RESET 0x0
107964 /* Extracts the ALT_USB_DEV_DOEPCTL13_MPS field value from a register. */
107965 #define ALT_USB_DEV_DOEPCTL13_MPS_GET(value) (((value) & 0x000007ff) >> 0)
107966 /* Produces a ALT_USB_DEV_DOEPCTL13_MPS register field value suitable for setting the register. */
107967 #define ALT_USB_DEV_DOEPCTL13_MPS_SET(value) (((value) << 0) & 0x000007ff)
107968 
107969 /*
107970  * Field : USB Active Endpoint - usbactep
107971  *
107972  * Indicates whether this endpoint is active in the current configuration and
107973  * interface. The core clears this bit for all endpoints (other than EP 0) after
107974  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
107975  * commands, the application must program endpoint registers accordingly and set
107976  * this bit.
107977  *
107978  * Field Enumeration Values:
107979  *
107980  * Enum | Value | Description
107981  * :--------------------------------------|:------|:--------------------
107982  * ALT_USB_DEV_DOEPCTL13_USBACTEP_E_DISD | 0x0 | Not Active
107983  * ALT_USB_DEV_DOEPCTL13_USBACTEP_E_END | 0x1 | USB Active Endpoint
107984  *
107985  * Field Access Macros:
107986  *
107987  */
107988 /*
107989  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_USBACTEP
107990  *
107991  * Not Active
107992  */
107993 #define ALT_USB_DEV_DOEPCTL13_USBACTEP_E_DISD 0x0
107994 /*
107995  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_USBACTEP
107996  *
107997  * USB Active Endpoint
107998  */
107999 #define ALT_USB_DEV_DOEPCTL13_USBACTEP_E_END 0x1
108000 
108001 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_USBACTEP register field. */
108002 #define ALT_USB_DEV_DOEPCTL13_USBACTEP_LSB 15
108003 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_USBACTEP register field. */
108004 #define ALT_USB_DEV_DOEPCTL13_USBACTEP_MSB 15
108005 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_USBACTEP register field. */
108006 #define ALT_USB_DEV_DOEPCTL13_USBACTEP_WIDTH 1
108007 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_USBACTEP register field value. */
108008 #define ALT_USB_DEV_DOEPCTL13_USBACTEP_SET_MSK 0x00008000
108009 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_USBACTEP register field value. */
108010 #define ALT_USB_DEV_DOEPCTL13_USBACTEP_CLR_MSK 0xffff7fff
108011 /* The reset value of the ALT_USB_DEV_DOEPCTL13_USBACTEP register field. */
108012 #define ALT_USB_DEV_DOEPCTL13_USBACTEP_RESET 0x0
108013 /* Extracts the ALT_USB_DEV_DOEPCTL13_USBACTEP field value from a register. */
108014 #define ALT_USB_DEV_DOEPCTL13_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
108015 /* Produces a ALT_USB_DEV_DOEPCTL13_USBACTEP register field value suitable for setting the register. */
108016 #define ALT_USB_DEV_DOEPCTL13_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
108017 
108018 /*
108019  * Field : Endpoint Data PID - dpid
108020  *
108021  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
108022  * packet to be received or transmitted on this endpoint. The application must
108023  * program the PID of the first packet to be received or transmitted on this
108024  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
108025  * SetD0PID fields of this register to program either DATA0 or DATA1 PID.
108026  *
108027  * 0: DATA0
108028  *
108029  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
108030  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
108031  * DMA mode:
108032  *
108033  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
108034  * number in which the core transmits/receives isochronous data for this endpoint.
108035  * The application must program the even/odd (micro) frame number in which it
108036  * intends to transmit/receive isochronous data for this endpoint using the
108037  * SetEvnFr and SetOddFr fields in this register.
108038  *
108039  * 0: Even (micro)frame
108040  *
108041  * 1: Odd (micro)frame
108042  *
108043  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
108044  * number in which to send data is provided in the transmit descriptor structure.
108045  * The frame in which data is received is updated in receive descriptor structure.
108046  *
108047  * Field Enumeration Values:
108048  *
108049  * Enum | Value | Description
108050  * :-----------------------------------|:------|:-----------------------------
108051  * ALT_USB_DEV_DOEPCTL13_DPID_E_INACT | 0x0 | Endpoint Data PID not active
108052  * ALT_USB_DEV_DOEPCTL13_DPID_E_ACT | 0x1 | Endpoint Data PID active
108053  *
108054  * Field Access Macros:
108055  *
108056  */
108057 /*
108058  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_DPID
108059  *
108060  * Endpoint Data PID not active
108061  */
108062 #define ALT_USB_DEV_DOEPCTL13_DPID_E_INACT 0x0
108063 /*
108064  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_DPID
108065  *
108066  * Endpoint Data PID active
108067  */
108068 #define ALT_USB_DEV_DOEPCTL13_DPID_E_ACT 0x1
108069 
108070 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_DPID register field. */
108071 #define ALT_USB_DEV_DOEPCTL13_DPID_LSB 16
108072 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_DPID register field. */
108073 #define ALT_USB_DEV_DOEPCTL13_DPID_MSB 16
108074 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_DPID register field. */
108075 #define ALT_USB_DEV_DOEPCTL13_DPID_WIDTH 1
108076 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_DPID register field value. */
108077 #define ALT_USB_DEV_DOEPCTL13_DPID_SET_MSK 0x00010000
108078 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_DPID register field value. */
108079 #define ALT_USB_DEV_DOEPCTL13_DPID_CLR_MSK 0xfffeffff
108080 /* The reset value of the ALT_USB_DEV_DOEPCTL13_DPID register field. */
108081 #define ALT_USB_DEV_DOEPCTL13_DPID_RESET 0x0
108082 /* Extracts the ALT_USB_DEV_DOEPCTL13_DPID field value from a register. */
108083 #define ALT_USB_DEV_DOEPCTL13_DPID_GET(value) (((value) & 0x00010000) >> 16)
108084 /* Produces a ALT_USB_DEV_DOEPCTL13_DPID register field value suitable for setting the register. */
108085 #define ALT_USB_DEV_DOEPCTL13_DPID_SET(value) (((value) << 16) & 0x00010000)
108086 
108087 /*
108088  * Field : NAK Status - naksts
108089  *
108090  * When either the application or the core sets this bit:
108091  *
108092  * * The core stops receiving any data on an OUT endpoint, even if there is space
108093  * in the RxFIFO to accommodate the incoming packet.
108094  *
108095  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
108096  * IN endpoint, even if there data is available in the TxFIFO.
108097  *
108098  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
108099  * even if there data is available in the TxFIFO.
108100  *
108101  * Irrespective of this bit's setting, the core always responds to SETUP data
108102  * packets with an ACK handshake.
108103  *
108104  * Field Enumeration Values:
108105  *
108106  * Enum | Value | Description
108107  * :--------------------------------------|:------|:------------------------------------------------
108108  * ALT_USB_DEV_DOEPCTL13_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
108109  * : | | based on the FIFO status
108110  * ALT_USB_DEV_DOEPCTL13_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
108111  * : | | endpoint
108112  *
108113  * Field Access Macros:
108114  *
108115  */
108116 /*
108117  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_NAKSTS
108118  *
108119  * The core is transmitting non-NAK handshakes based on the FIFO status
108120  */
108121 #define ALT_USB_DEV_DOEPCTL13_NAKSTS_E_NONNAK 0x0
108122 /*
108123  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_NAKSTS
108124  *
108125  * The core is transmitting NAK handshakes on this endpoint
108126  */
108127 #define ALT_USB_DEV_DOEPCTL13_NAKSTS_E_NAK 0x1
108128 
108129 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_NAKSTS register field. */
108130 #define ALT_USB_DEV_DOEPCTL13_NAKSTS_LSB 17
108131 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_NAKSTS register field. */
108132 #define ALT_USB_DEV_DOEPCTL13_NAKSTS_MSB 17
108133 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_NAKSTS register field. */
108134 #define ALT_USB_DEV_DOEPCTL13_NAKSTS_WIDTH 1
108135 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_NAKSTS register field value. */
108136 #define ALT_USB_DEV_DOEPCTL13_NAKSTS_SET_MSK 0x00020000
108137 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_NAKSTS register field value. */
108138 #define ALT_USB_DEV_DOEPCTL13_NAKSTS_CLR_MSK 0xfffdffff
108139 /* The reset value of the ALT_USB_DEV_DOEPCTL13_NAKSTS register field. */
108140 #define ALT_USB_DEV_DOEPCTL13_NAKSTS_RESET 0x0
108141 /* Extracts the ALT_USB_DEV_DOEPCTL13_NAKSTS field value from a register. */
108142 #define ALT_USB_DEV_DOEPCTL13_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
108143 /* Produces a ALT_USB_DEV_DOEPCTL13_NAKSTS register field value suitable for setting the register. */
108144 #define ALT_USB_DEV_DOEPCTL13_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
108145 
108146 /*
108147  * Field : Endpoint Type - eptype
108148  *
108149  * This is the transfer type supported by this logical endpoint.
108150  *
108151  * Field Enumeration Values:
108152  *
108153  * Enum | Value | Description
108154  * :-------------------------------------------|:------|:------------
108155  * ALT_USB_DEV_DOEPCTL13_EPTYPE_E_CTL | 0x0 | Control
108156  * ALT_USB_DEV_DOEPCTL13_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
108157  * ALT_USB_DEV_DOEPCTL13_EPTYPE_E_BULK | 0x2 | Bulk
108158  * ALT_USB_DEV_DOEPCTL13_EPTYPE_E_INTERRUP | 0x3 | Interrupt
108159  *
108160  * Field Access Macros:
108161  *
108162  */
108163 /*
108164  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_EPTYPE
108165  *
108166  * Control
108167  */
108168 #define ALT_USB_DEV_DOEPCTL13_EPTYPE_E_CTL 0x0
108169 /*
108170  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_EPTYPE
108171  *
108172  * Isochronous
108173  */
108174 #define ALT_USB_DEV_DOEPCTL13_EPTYPE_E_ISOCHRONOUS 0x1
108175 /*
108176  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_EPTYPE
108177  *
108178  * Bulk
108179  */
108180 #define ALT_USB_DEV_DOEPCTL13_EPTYPE_E_BULK 0x2
108181 /*
108182  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_EPTYPE
108183  *
108184  * Interrupt
108185  */
108186 #define ALT_USB_DEV_DOEPCTL13_EPTYPE_E_INTERRUP 0x3
108187 
108188 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_EPTYPE register field. */
108189 #define ALT_USB_DEV_DOEPCTL13_EPTYPE_LSB 18
108190 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_EPTYPE register field. */
108191 #define ALT_USB_DEV_DOEPCTL13_EPTYPE_MSB 19
108192 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_EPTYPE register field. */
108193 #define ALT_USB_DEV_DOEPCTL13_EPTYPE_WIDTH 2
108194 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_EPTYPE register field value. */
108195 #define ALT_USB_DEV_DOEPCTL13_EPTYPE_SET_MSK 0x000c0000
108196 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_EPTYPE register field value. */
108197 #define ALT_USB_DEV_DOEPCTL13_EPTYPE_CLR_MSK 0xfff3ffff
108198 /* The reset value of the ALT_USB_DEV_DOEPCTL13_EPTYPE register field. */
108199 #define ALT_USB_DEV_DOEPCTL13_EPTYPE_RESET 0x0
108200 /* Extracts the ALT_USB_DEV_DOEPCTL13_EPTYPE field value from a register. */
108201 #define ALT_USB_DEV_DOEPCTL13_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
108202 /* Produces a ALT_USB_DEV_DOEPCTL13_EPTYPE register field value suitable for setting the register. */
108203 #define ALT_USB_DEV_DOEPCTL13_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
108204 
108205 /*
108206  * Field : Snoop Mode - snp
108207  *
108208  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
108209  * In Snoop mode, the core does not check the correctness of OUT packets before
108210  * transferring them to application memory.
108211  *
108212  * Field Enumeration Values:
108213  *
108214  * Enum | Value | Description
108215  * :--------------------------------|:------|:-------------------
108216  * ALT_USB_DEV_DOEPCTL13_SNP_E_DIS | 0x0 | Disable Snoop Mode
108217  * ALT_USB_DEV_DOEPCTL13_SNP_E_EN | 0x1 | Enable Snoop Mode
108218  *
108219  * Field Access Macros:
108220  *
108221  */
108222 /*
108223  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_SNP
108224  *
108225  * Disable Snoop Mode
108226  */
108227 #define ALT_USB_DEV_DOEPCTL13_SNP_E_DIS 0x0
108228 /*
108229  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_SNP
108230  *
108231  * Enable Snoop Mode
108232  */
108233 #define ALT_USB_DEV_DOEPCTL13_SNP_E_EN 0x1
108234 
108235 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_SNP register field. */
108236 #define ALT_USB_DEV_DOEPCTL13_SNP_LSB 20
108237 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_SNP register field. */
108238 #define ALT_USB_DEV_DOEPCTL13_SNP_MSB 20
108239 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_SNP register field. */
108240 #define ALT_USB_DEV_DOEPCTL13_SNP_WIDTH 1
108241 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_SNP register field value. */
108242 #define ALT_USB_DEV_DOEPCTL13_SNP_SET_MSK 0x00100000
108243 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_SNP register field value. */
108244 #define ALT_USB_DEV_DOEPCTL13_SNP_CLR_MSK 0xffefffff
108245 /* The reset value of the ALT_USB_DEV_DOEPCTL13_SNP register field. */
108246 #define ALT_USB_DEV_DOEPCTL13_SNP_RESET 0x0
108247 /* Extracts the ALT_USB_DEV_DOEPCTL13_SNP field value from a register. */
108248 #define ALT_USB_DEV_DOEPCTL13_SNP_GET(value) (((value) & 0x00100000) >> 20)
108249 /* Produces a ALT_USB_DEV_DOEPCTL13_SNP register field value suitable for setting the register. */
108250 #define ALT_USB_DEV_DOEPCTL13_SNP_SET(value) (((value) << 20) & 0x00100000)
108251 
108252 /*
108253  * Field : STALL Handshake - stall
108254  *
108255  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
108256  * application sets this bit to stall all tokens from the USB host to this
108257  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
108258  * along with this bit, the STALL bit takes priority. Only the application can
108259  * clear this bit, never the core. Applies to control endpoints only. The
108260  * application can only set this bit, and the core clears it, when a SETUP token is
108261  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
108262  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
108263  * of this bit's setting, the core always responds to SETUP data packets with an
108264  * ACK handshake.
108265  *
108266  * Field Enumeration Values:
108267  *
108268  * Enum | Value | Description
108269  * :------------------------------------|:------|:----------------------------
108270  * ALT_USB_DEV_DOEPCTL13_STALL_E_INACT | 0x0 | STALL All Tokens not active
108271  * ALT_USB_DEV_DOEPCTL13_STALL_E_ACT | 0x1 | STALL All Tokens active
108272  *
108273  * Field Access Macros:
108274  *
108275  */
108276 /*
108277  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_STALL
108278  *
108279  * STALL All Tokens not active
108280  */
108281 #define ALT_USB_DEV_DOEPCTL13_STALL_E_INACT 0x0
108282 /*
108283  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_STALL
108284  *
108285  * STALL All Tokens active
108286  */
108287 #define ALT_USB_DEV_DOEPCTL13_STALL_E_ACT 0x1
108288 
108289 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_STALL register field. */
108290 #define ALT_USB_DEV_DOEPCTL13_STALL_LSB 21
108291 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_STALL register field. */
108292 #define ALT_USB_DEV_DOEPCTL13_STALL_MSB 21
108293 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_STALL register field. */
108294 #define ALT_USB_DEV_DOEPCTL13_STALL_WIDTH 1
108295 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_STALL register field value. */
108296 #define ALT_USB_DEV_DOEPCTL13_STALL_SET_MSK 0x00200000
108297 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_STALL register field value. */
108298 #define ALT_USB_DEV_DOEPCTL13_STALL_CLR_MSK 0xffdfffff
108299 /* The reset value of the ALT_USB_DEV_DOEPCTL13_STALL register field. */
108300 #define ALT_USB_DEV_DOEPCTL13_STALL_RESET 0x0
108301 /* Extracts the ALT_USB_DEV_DOEPCTL13_STALL field value from a register. */
108302 #define ALT_USB_DEV_DOEPCTL13_STALL_GET(value) (((value) & 0x00200000) >> 21)
108303 /* Produces a ALT_USB_DEV_DOEPCTL13_STALL register field value suitable for setting the register. */
108304 #define ALT_USB_DEV_DOEPCTL13_STALL_SET(value) (((value) << 21) & 0x00200000)
108305 
108306 /*
108307  * Field : Clear NAK - cnak
108308  *
108309  * A write to this bit clears the NAK bit for the endpoint.
108310  *
108311  * Field Enumeration Values:
108312  *
108313  * Enum | Value | Description
108314  * :-----------------------------------|:------|:-------------
108315  * ALT_USB_DEV_DOEPCTL13_CNAK_E_INACT | 0x0 | No Clear NAK
108316  * ALT_USB_DEV_DOEPCTL13_CNAK_E_ACT | 0x1 | Clear NAK
108317  *
108318  * Field Access Macros:
108319  *
108320  */
108321 /*
108322  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_CNAK
108323  *
108324  * No Clear NAK
108325  */
108326 #define ALT_USB_DEV_DOEPCTL13_CNAK_E_INACT 0x0
108327 /*
108328  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_CNAK
108329  *
108330  * Clear NAK
108331  */
108332 #define ALT_USB_DEV_DOEPCTL13_CNAK_E_ACT 0x1
108333 
108334 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_CNAK register field. */
108335 #define ALT_USB_DEV_DOEPCTL13_CNAK_LSB 26
108336 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_CNAK register field. */
108337 #define ALT_USB_DEV_DOEPCTL13_CNAK_MSB 26
108338 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_CNAK register field. */
108339 #define ALT_USB_DEV_DOEPCTL13_CNAK_WIDTH 1
108340 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_CNAK register field value. */
108341 #define ALT_USB_DEV_DOEPCTL13_CNAK_SET_MSK 0x04000000
108342 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_CNAK register field value. */
108343 #define ALT_USB_DEV_DOEPCTL13_CNAK_CLR_MSK 0xfbffffff
108344 /* The reset value of the ALT_USB_DEV_DOEPCTL13_CNAK register field. */
108345 #define ALT_USB_DEV_DOEPCTL13_CNAK_RESET 0x0
108346 /* Extracts the ALT_USB_DEV_DOEPCTL13_CNAK field value from a register. */
108347 #define ALT_USB_DEV_DOEPCTL13_CNAK_GET(value) (((value) & 0x04000000) >> 26)
108348 /* Produces a ALT_USB_DEV_DOEPCTL13_CNAK register field value suitable for setting the register. */
108349 #define ALT_USB_DEV_DOEPCTL13_CNAK_SET(value) (((value) << 26) & 0x04000000)
108350 
108351 /*
108352  * Field : Set NAK - snak
108353  *
108354  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
108355  * application can control the transmission of NAK handshakes on an endpoint. The
108356  * core can also Set this bit for an endpoint after a SETUP packet is received on
108357  * that endpoint.
108358  *
108359  * Field Enumeration Values:
108360  *
108361  * Enum | Value | Description
108362  * :-----------------------------------|:------|:------------
108363  * ALT_USB_DEV_DOEPCTL13_SNAK_E_INACT | 0x0 | No Set NAK
108364  * ALT_USB_DEV_DOEPCTL13_SNAK_E_ACT | 0x1 | Set NAK
108365  *
108366  * Field Access Macros:
108367  *
108368  */
108369 /*
108370  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_SNAK
108371  *
108372  * No Set NAK
108373  */
108374 #define ALT_USB_DEV_DOEPCTL13_SNAK_E_INACT 0x0
108375 /*
108376  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_SNAK
108377  *
108378  * Set NAK
108379  */
108380 #define ALT_USB_DEV_DOEPCTL13_SNAK_E_ACT 0x1
108381 
108382 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_SNAK register field. */
108383 #define ALT_USB_DEV_DOEPCTL13_SNAK_LSB 27
108384 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_SNAK register field. */
108385 #define ALT_USB_DEV_DOEPCTL13_SNAK_MSB 27
108386 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_SNAK register field. */
108387 #define ALT_USB_DEV_DOEPCTL13_SNAK_WIDTH 1
108388 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_SNAK register field value. */
108389 #define ALT_USB_DEV_DOEPCTL13_SNAK_SET_MSK 0x08000000
108390 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_SNAK register field value. */
108391 #define ALT_USB_DEV_DOEPCTL13_SNAK_CLR_MSK 0xf7ffffff
108392 /* The reset value of the ALT_USB_DEV_DOEPCTL13_SNAK register field. */
108393 #define ALT_USB_DEV_DOEPCTL13_SNAK_RESET 0x0
108394 /* Extracts the ALT_USB_DEV_DOEPCTL13_SNAK field value from a register. */
108395 #define ALT_USB_DEV_DOEPCTL13_SNAK_GET(value) (((value) & 0x08000000) >> 27)
108396 /* Produces a ALT_USB_DEV_DOEPCTL13_SNAK register field value suitable for setting the register. */
108397 #define ALT_USB_DEV_DOEPCTL13_SNAK_SET(value) (((value) << 27) & 0x08000000)
108398 
108399 /*
108400  * Field : Set DATA0 PID - setd0pid
108401  *
108402  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
108403  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
108404  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
108405  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
108406  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
108407  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
108408  * mode is enabled, this field is reserved. The frame number in which to send data
108409  * is in the transmit descriptor structure. The frame in which to receive data is
108410  * updated in receive descriptor structure.
108411  *
108412  * Field Enumeration Values:
108413  *
108414  * Enum | Value | Description
108415  * :--------------------------------------|:------|:------------------------------------
108416  * ALT_USB_DEV_DOEPCTL13_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
108417  * ALT_USB_DEV_DOEPCTL13_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
108418  *
108419  * Field Access Macros:
108420  *
108421  */
108422 /*
108423  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_SETD0PID
108424  *
108425  * Disables Set DATA0 PID
108426  */
108427 #define ALT_USB_DEV_DOEPCTL13_SETD0PID_E_DISD 0x0
108428 /*
108429  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_SETD0PID
108430  *
108431  * Enables Endpoint Data PID to DATA0)
108432  */
108433 #define ALT_USB_DEV_DOEPCTL13_SETD0PID_E_END 0x1
108434 
108435 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_SETD0PID register field. */
108436 #define ALT_USB_DEV_DOEPCTL13_SETD0PID_LSB 28
108437 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_SETD0PID register field. */
108438 #define ALT_USB_DEV_DOEPCTL13_SETD0PID_MSB 28
108439 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_SETD0PID register field. */
108440 #define ALT_USB_DEV_DOEPCTL13_SETD0PID_WIDTH 1
108441 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_SETD0PID register field value. */
108442 #define ALT_USB_DEV_DOEPCTL13_SETD0PID_SET_MSK 0x10000000
108443 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_SETD0PID register field value. */
108444 #define ALT_USB_DEV_DOEPCTL13_SETD0PID_CLR_MSK 0xefffffff
108445 /* The reset value of the ALT_USB_DEV_DOEPCTL13_SETD0PID register field. */
108446 #define ALT_USB_DEV_DOEPCTL13_SETD0PID_RESET 0x0
108447 /* Extracts the ALT_USB_DEV_DOEPCTL13_SETD0PID field value from a register. */
108448 #define ALT_USB_DEV_DOEPCTL13_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
108449 /* Produces a ALT_USB_DEV_DOEPCTL13_SETD0PID register field value suitable for setting the register. */
108450 #define ALT_USB_DEV_DOEPCTL13_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
108451 
108452 /*
108453  * Field : Set DATA1 PID - setd1pid
108454  *
108455  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
108456  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
108457  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
108458  *
108459  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
108460  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
108461  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
108462  *
108463  * Field Enumeration Values:
108464  *
108465  * Enum | Value | Description
108466  * :--------------------------------------|:------|:-----------------------
108467  * ALT_USB_DEV_DOEPCTL13_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
108468  * ALT_USB_DEV_DOEPCTL13_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
108469  *
108470  * Field Access Macros:
108471  *
108472  */
108473 /*
108474  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_SETD1PID
108475  *
108476  * Disables Set DATA1 PID
108477  */
108478 #define ALT_USB_DEV_DOEPCTL13_SETD1PID_E_DISD 0x0
108479 /*
108480  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_SETD1PID
108481  *
108482  * Enables Set DATA1 PID
108483  */
108484 #define ALT_USB_DEV_DOEPCTL13_SETD1PID_E_END 0x1
108485 
108486 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_SETD1PID register field. */
108487 #define ALT_USB_DEV_DOEPCTL13_SETD1PID_LSB 29
108488 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_SETD1PID register field. */
108489 #define ALT_USB_DEV_DOEPCTL13_SETD1PID_MSB 29
108490 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_SETD1PID register field. */
108491 #define ALT_USB_DEV_DOEPCTL13_SETD1PID_WIDTH 1
108492 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_SETD1PID register field value. */
108493 #define ALT_USB_DEV_DOEPCTL13_SETD1PID_SET_MSK 0x20000000
108494 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_SETD1PID register field value. */
108495 #define ALT_USB_DEV_DOEPCTL13_SETD1PID_CLR_MSK 0xdfffffff
108496 /* The reset value of the ALT_USB_DEV_DOEPCTL13_SETD1PID register field. */
108497 #define ALT_USB_DEV_DOEPCTL13_SETD1PID_RESET 0x0
108498 /* Extracts the ALT_USB_DEV_DOEPCTL13_SETD1PID field value from a register. */
108499 #define ALT_USB_DEV_DOEPCTL13_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
108500 /* Produces a ALT_USB_DEV_DOEPCTL13_SETD1PID register field value suitable for setting the register. */
108501 #define ALT_USB_DEV_DOEPCTL13_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
108502 
108503 /*
108504  * Field : Endpoint Disable - epdis
108505  *
108506  * Applies to IN and OUT endpoints. The application sets this bit to stop
108507  * transmitting/receiving data on an endpoint, even before the transfer for that
108508  * endpoint is complete. The application must wait for the Endpoint Disabled
108509  * interrupt before treating the endpoint as disabled. The core clears this bit
108510  * before setting the Endpoint Disabled interrupt. The application must set this
108511  * bit only if Endpoint Enable is already set for this endpoint.
108512  *
108513  * Field Enumeration Values:
108514  *
108515  * Enum | Value | Description
108516  * :------------------------------------|:------|:--------------------
108517  * ALT_USB_DEV_DOEPCTL13_EPDIS_E_INACT | 0x0 | No Endpoint Disable
108518  * ALT_USB_DEV_DOEPCTL13_EPDIS_E_ACT | 0x1 | Endpoint Disable
108519  *
108520  * Field Access Macros:
108521  *
108522  */
108523 /*
108524  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_EPDIS
108525  *
108526  * No Endpoint Disable
108527  */
108528 #define ALT_USB_DEV_DOEPCTL13_EPDIS_E_INACT 0x0
108529 /*
108530  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_EPDIS
108531  *
108532  * Endpoint Disable
108533  */
108534 #define ALT_USB_DEV_DOEPCTL13_EPDIS_E_ACT 0x1
108535 
108536 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_EPDIS register field. */
108537 #define ALT_USB_DEV_DOEPCTL13_EPDIS_LSB 30
108538 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_EPDIS register field. */
108539 #define ALT_USB_DEV_DOEPCTL13_EPDIS_MSB 30
108540 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_EPDIS register field. */
108541 #define ALT_USB_DEV_DOEPCTL13_EPDIS_WIDTH 1
108542 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_EPDIS register field value. */
108543 #define ALT_USB_DEV_DOEPCTL13_EPDIS_SET_MSK 0x40000000
108544 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_EPDIS register field value. */
108545 #define ALT_USB_DEV_DOEPCTL13_EPDIS_CLR_MSK 0xbfffffff
108546 /* The reset value of the ALT_USB_DEV_DOEPCTL13_EPDIS register field. */
108547 #define ALT_USB_DEV_DOEPCTL13_EPDIS_RESET 0x0
108548 /* Extracts the ALT_USB_DEV_DOEPCTL13_EPDIS field value from a register. */
108549 #define ALT_USB_DEV_DOEPCTL13_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
108550 /* Produces a ALT_USB_DEV_DOEPCTL13_EPDIS register field value suitable for setting the register. */
108551 #define ALT_USB_DEV_DOEPCTL13_EPDIS_SET(value) (((value) << 30) & 0x40000000)
108552 
108553 /*
108554  * Field : Endpoint Enable - epena
108555  *
108556  * Applies to IN and OUT endpoints.
108557  *
108558  * * When Scatter/Gather DMA mode is enabled,
108559  *
108560  * * for IN endpoints this bit indicates that the descriptor structure and data
108561  * buffer with data ready to transmit is setup.
108562  *
108563  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
108564  * receive data is setup.
108565  *
108566  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
108567  * mode:
108568  *
108569  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
108570  * the endpoint.
108571  *
108572  * * for OUT endpoints, this bit indicates that the application has allocated the
108573  * memory to start receiving data from the USB.
108574  *
108575  * * The core clears this bit before setting any of the following interrupts on
108576  * this endpoint:
108577  *
108578  * * SETUP Phase Done
108579  *
108580  * * Endpoint Disabled
108581  *
108582  * * Transfer Completed
108583  *
108584  * for control endpoints in DMA mode, this bit must be set to be able to transfer
108585  * SETUP data packets in memory.
108586  *
108587  * Field Enumeration Values:
108588  *
108589  * Enum | Value | Description
108590  * :------------------------------------|:------|:-------------------------
108591  * ALT_USB_DEV_DOEPCTL13_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
108592  * ALT_USB_DEV_DOEPCTL13_EPENA_E_ACT | 0x1 | Endpoint Enable active
108593  *
108594  * Field Access Macros:
108595  *
108596  */
108597 /*
108598  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_EPENA
108599  *
108600  * Endpoint Enable inactive
108601  */
108602 #define ALT_USB_DEV_DOEPCTL13_EPENA_E_INACT 0x0
108603 /*
108604  * Enumerated value for register field ALT_USB_DEV_DOEPCTL13_EPENA
108605  *
108606  * Endpoint Enable active
108607  */
108608 #define ALT_USB_DEV_DOEPCTL13_EPENA_E_ACT 0x1
108609 
108610 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL13_EPENA register field. */
108611 #define ALT_USB_DEV_DOEPCTL13_EPENA_LSB 31
108612 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL13_EPENA register field. */
108613 #define ALT_USB_DEV_DOEPCTL13_EPENA_MSB 31
108614 /* The width in bits of the ALT_USB_DEV_DOEPCTL13_EPENA register field. */
108615 #define ALT_USB_DEV_DOEPCTL13_EPENA_WIDTH 1
108616 /* The mask used to set the ALT_USB_DEV_DOEPCTL13_EPENA register field value. */
108617 #define ALT_USB_DEV_DOEPCTL13_EPENA_SET_MSK 0x80000000
108618 /* The mask used to clear the ALT_USB_DEV_DOEPCTL13_EPENA register field value. */
108619 #define ALT_USB_DEV_DOEPCTL13_EPENA_CLR_MSK 0x7fffffff
108620 /* The reset value of the ALT_USB_DEV_DOEPCTL13_EPENA register field. */
108621 #define ALT_USB_DEV_DOEPCTL13_EPENA_RESET 0x0
108622 /* Extracts the ALT_USB_DEV_DOEPCTL13_EPENA field value from a register. */
108623 #define ALT_USB_DEV_DOEPCTL13_EPENA_GET(value) (((value) & 0x80000000) >> 31)
108624 /* Produces a ALT_USB_DEV_DOEPCTL13_EPENA register field value suitable for setting the register. */
108625 #define ALT_USB_DEV_DOEPCTL13_EPENA_SET(value) (((value) << 31) & 0x80000000)
108626 
108627 #ifndef __ASSEMBLY__
108628 /*
108629  * WARNING: The C register and register group struct declarations are provided for
108630  * convenience and illustrative purposes. They should, however, be used with
108631  * caution as the C language standard provides no guarantees about the alignment or
108632  * atomicity of device memory accesses. The recommended practice for writing
108633  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
108634  * alt_write_word() functions.
108635  *
108636  * The struct declaration for register ALT_USB_DEV_DOEPCTL13.
108637  */
108638 struct ALT_USB_DEV_DOEPCTL13_s
108639 {
108640  uint32_t mps : 11; /* Maximum Packet Size */
108641  uint32_t : 4; /* *UNDEFINED* */
108642  uint32_t usbactep : 1; /* USB Active Endpoint */
108643  const uint32_t dpid : 1; /* Endpoint Data PID */
108644  const uint32_t naksts : 1; /* NAK Status */
108645  uint32_t eptype : 2; /* Endpoint Type */
108646  uint32_t snp : 1; /* Snoop Mode */
108647  const uint32_t stall : 1; /* STALL Handshake */
108648  uint32_t : 4; /* *UNDEFINED* */
108649  uint32_t cnak : 1; /* Clear NAK */
108650  uint32_t snak : 1; /* Set NAK */
108651  uint32_t setd0pid : 1; /* Set DATA0 PID */
108652  uint32_t setd1pid : 1; /* Set DATA1 PID */
108653  const uint32_t epdis : 1; /* Endpoint Disable */
108654  const uint32_t epena : 1; /* Endpoint Enable */
108655 };
108656 
108657 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL13. */
108658 typedef volatile struct ALT_USB_DEV_DOEPCTL13_s ALT_USB_DEV_DOEPCTL13_t;
108659 #endif /* __ASSEMBLY__ */
108660 
108661 /* The byte offset of the ALT_USB_DEV_DOEPCTL13 register from the beginning of the component. */
108662 #define ALT_USB_DEV_DOEPCTL13_OFST 0x4a0
108663 /* The address of the ALT_USB_DEV_DOEPCTL13 register. */
108664 #define ALT_USB_DEV_DOEPCTL13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL13_OFST))
108665 
108666 /*
108667  * Register : Device OUT Endpoint 13 Interrupt Register - doepint13
108668  *
108669  * This register indicates the status of an endpoint with respect to USB- and AHB-
108670  * related events. The application must read this register when the OUT Endpoints
108671  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
108672  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
108673  * can read this register, it must first read the Device All Endpoints Interrupt
108674  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
108675  * Interrupt register. The application must clear the appropriate bit in this
108676  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
108677  *
108678  * Register Layout
108679  *
108680  * Bits | Access | Reset | Description
108681  * :--------|:-------|:------|:------------------------------------------
108682  * [0] | R | 0x0 | Transfer Completed Interrupt
108683  * [1] | R | 0x0 | Endpoint Disabled Interrupt
108684  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT13_AHBERR
108685  * [3] | R | 0x0 | SETUP Phase Done
108686  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
108687  * [5] | R | 0x0 | Status Phase Received for Control Write
108688  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
108689  * [7] | ??? | 0x0 | *UNDEFINED*
108690  * [8] | R | 0x0 | OUT Packet Error
108691  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
108692  * [10] | ??? | 0x0 | *UNDEFINED*
108693  * [11] | R | 0x0 | Packet Drop Status
108694  * [12] | R | 0x0 | BbleErr Interrupt
108695  * [13] | R | 0x0 | NAK Interrupt
108696  * [14] | R | 0x0 | NYET Interrupt
108697  * [31:15] | ??? | 0x0 | *UNDEFINED*
108698  *
108699  */
108700 /*
108701  * Field : Transfer Completed Interrupt - xfercompl
108702  *
108703  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
108704  *
108705  * This field indicates that the requested data from the internal FIFO is moved to
108706  * external system memory. This interrupt is generated only when the corresponding
108707  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
108708  * is Set.
108709  *
108710  * When Scatter/Gather DMA mode is disabled, this field indicates that the
108711  * programmed transfer is complete on the AHB as well as on the USB, for this
108712  * endpoint.
108713  *
108714  * Field Enumeration Values:
108715  *
108716  * Enum | Value | Description
108717  * :----------------------------------------|:------|:-----------------------------
108718  * ALT_USB_DEV_DOEPINT13_XFERCOMPL_E_INACT | 0x0 | No Interrupt
108719  * ALT_USB_DEV_DOEPINT13_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
108720  *
108721  * Field Access Macros:
108722  *
108723  */
108724 /*
108725  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_XFERCOMPL
108726  *
108727  * No Interrupt
108728  */
108729 #define ALT_USB_DEV_DOEPINT13_XFERCOMPL_E_INACT 0x0
108730 /*
108731  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_XFERCOMPL
108732  *
108733  * Transfer Completed Interrupt
108734  */
108735 #define ALT_USB_DEV_DOEPINT13_XFERCOMPL_E_ACT 0x1
108736 
108737 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_XFERCOMPL register field. */
108738 #define ALT_USB_DEV_DOEPINT13_XFERCOMPL_LSB 0
108739 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_XFERCOMPL register field. */
108740 #define ALT_USB_DEV_DOEPINT13_XFERCOMPL_MSB 0
108741 /* The width in bits of the ALT_USB_DEV_DOEPINT13_XFERCOMPL register field. */
108742 #define ALT_USB_DEV_DOEPINT13_XFERCOMPL_WIDTH 1
108743 /* The mask used to set the ALT_USB_DEV_DOEPINT13_XFERCOMPL register field value. */
108744 #define ALT_USB_DEV_DOEPINT13_XFERCOMPL_SET_MSK 0x00000001
108745 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_XFERCOMPL register field value. */
108746 #define ALT_USB_DEV_DOEPINT13_XFERCOMPL_CLR_MSK 0xfffffffe
108747 /* The reset value of the ALT_USB_DEV_DOEPINT13_XFERCOMPL register field. */
108748 #define ALT_USB_DEV_DOEPINT13_XFERCOMPL_RESET 0x0
108749 /* Extracts the ALT_USB_DEV_DOEPINT13_XFERCOMPL field value from a register. */
108750 #define ALT_USB_DEV_DOEPINT13_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
108751 /* Produces a ALT_USB_DEV_DOEPINT13_XFERCOMPL register field value suitable for setting the register. */
108752 #define ALT_USB_DEV_DOEPINT13_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
108753 
108754 /*
108755  * Field : Endpoint Disabled Interrupt - epdisbld
108756  *
108757  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
108758  * disabled per the application's request.
108759  *
108760  * Field Enumeration Values:
108761  *
108762  * Enum | Value | Description
108763  * :---------------------------------------|:------|:----------------------------
108764  * ALT_USB_DEV_DOEPINT13_EPDISBLD_E_INACT | 0x0 | No Interrupt
108765  * ALT_USB_DEV_DOEPINT13_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
108766  *
108767  * Field Access Macros:
108768  *
108769  */
108770 /*
108771  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_EPDISBLD
108772  *
108773  * No Interrupt
108774  */
108775 #define ALT_USB_DEV_DOEPINT13_EPDISBLD_E_INACT 0x0
108776 /*
108777  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_EPDISBLD
108778  *
108779  * Endpoint Disabled Interrupt
108780  */
108781 #define ALT_USB_DEV_DOEPINT13_EPDISBLD_E_ACT 0x1
108782 
108783 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_EPDISBLD register field. */
108784 #define ALT_USB_DEV_DOEPINT13_EPDISBLD_LSB 1
108785 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_EPDISBLD register field. */
108786 #define ALT_USB_DEV_DOEPINT13_EPDISBLD_MSB 1
108787 /* The width in bits of the ALT_USB_DEV_DOEPINT13_EPDISBLD register field. */
108788 #define ALT_USB_DEV_DOEPINT13_EPDISBLD_WIDTH 1
108789 /* The mask used to set the ALT_USB_DEV_DOEPINT13_EPDISBLD register field value. */
108790 #define ALT_USB_DEV_DOEPINT13_EPDISBLD_SET_MSK 0x00000002
108791 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_EPDISBLD register field value. */
108792 #define ALT_USB_DEV_DOEPINT13_EPDISBLD_CLR_MSK 0xfffffffd
108793 /* The reset value of the ALT_USB_DEV_DOEPINT13_EPDISBLD register field. */
108794 #define ALT_USB_DEV_DOEPINT13_EPDISBLD_RESET 0x0
108795 /* Extracts the ALT_USB_DEV_DOEPINT13_EPDISBLD field value from a register. */
108796 #define ALT_USB_DEV_DOEPINT13_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
108797 /* Produces a ALT_USB_DEV_DOEPINT13_EPDISBLD register field value suitable for setting the register. */
108798 #define ALT_USB_DEV_DOEPINT13_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
108799 
108800 /*
108801  * Field : ahberr
108802  *
108803  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
108804  * there is an AHB error during an AHB read/write. The application can read the
108805  * corresponding endpoint DMA address register to get the error address.
108806  *
108807  * Field Enumeration Values:
108808  *
108809  * Enum | Value | Description
108810  * :-------------------------------------|:------|:--------------------
108811  * ALT_USB_DEV_DOEPINT13_AHBERR_E_INACT | 0x0 | No Interrupt
108812  * ALT_USB_DEV_DOEPINT13_AHBERR_E_ACT | 0x1 | AHB Error interrupt
108813  *
108814  * Field Access Macros:
108815  *
108816  */
108817 /*
108818  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_AHBERR
108819  *
108820  * No Interrupt
108821  */
108822 #define ALT_USB_DEV_DOEPINT13_AHBERR_E_INACT 0x0
108823 /*
108824  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_AHBERR
108825  *
108826  * AHB Error interrupt
108827  */
108828 #define ALT_USB_DEV_DOEPINT13_AHBERR_E_ACT 0x1
108829 
108830 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_AHBERR register field. */
108831 #define ALT_USB_DEV_DOEPINT13_AHBERR_LSB 2
108832 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_AHBERR register field. */
108833 #define ALT_USB_DEV_DOEPINT13_AHBERR_MSB 2
108834 /* The width in bits of the ALT_USB_DEV_DOEPINT13_AHBERR register field. */
108835 #define ALT_USB_DEV_DOEPINT13_AHBERR_WIDTH 1
108836 /* The mask used to set the ALT_USB_DEV_DOEPINT13_AHBERR register field value. */
108837 #define ALT_USB_DEV_DOEPINT13_AHBERR_SET_MSK 0x00000004
108838 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_AHBERR register field value. */
108839 #define ALT_USB_DEV_DOEPINT13_AHBERR_CLR_MSK 0xfffffffb
108840 /* The reset value of the ALT_USB_DEV_DOEPINT13_AHBERR register field. */
108841 #define ALT_USB_DEV_DOEPINT13_AHBERR_RESET 0x0
108842 /* Extracts the ALT_USB_DEV_DOEPINT13_AHBERR field value from a register. */
108843 #define ALT_USB_DEV_DOEPINT13_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
108844 /* Produces a ALT_USB_DEV_DOEPINT13_AHBERR register field value suitable for setting the register. */
108845 #define ALT_USB_DEV_DOEPINT13_AHBERR_SET(value) (((value) << 2) & 0x00000004)
108846 
108847 /*
108848  * Field : SETUP Phase Done - setup
108849  *
108850  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
108851  * control endpoint is complete and no more back-to-back SETUP packets were
108852  * received for the current control transfer. On this interrupt, the application
108853  * can decode the received SETUP data packet.
108854  *
108855  * Field Enumeration Values:
108856  *
108857  * Enum | Value | Description
108858  * :------------------------------------|:------|:--------------------
108859  * ALT_USB_DEV_DOEPINT13_SETUP_E_INACT | 0x0 | No SETUP Phase Done
108860  * ALT_USB_DEV_DOEPINT13_SETUP_E_ACT | 0x1 | SETUP Phase Done
108861  *
108862  * Field Access Macros:
108863  *
108864  */
108865 /*
108866  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_SETUP
108867  *
108868  * No SETUP Phase Done
108869  */
108870 #define ALT_USB_DEV_DOEPINT13_SETUP_E_INACT 0x0
108871 /*
108872  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_SETUP
108873  *
108874  * SETUP Phase Done
108875  */
108876 #define ALT_USB_DEV_DOEPINT13_SETUP_E_ACT 0x1
108877 
108878 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_SETUP register field. */
108879 #define ALT_USB_DEV_DOEPINT13_SETUP_LSB 3
108880 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_SETUP register field. */
108881 #define ALT_USB_DEV_DOEPINT13_SETUP_MSB 3
108882 /* The width in bits of the ALT_USB_DEV_DOEPINT13_SETUP register field. */
108883 #define ALT_USB_DEV_DOEPINT13_SETUP_WIDTH 1
108884 /* The mask used to set the ALT_USB_DEV_DOEPINT13_SETUP register field value. */
108885 #define ALT_USB_DEV_DOEPINT13_SETUP_SET_MSK 0x00000008
108886 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_SETUP register field value. */
108887 #define ALT_USB_DEV_DOEPINT13_SETUP_CLR_MSK 0xfffffff7
108888 /* The reset value of the ALT_USB_DEV_DOEPINT13_SETUP register field. */
108889 #define ALT_USB_DEV_DOEPINT13_SETUP_RESET 0x0
108890 /* Extracts the ALT_USB_DEV_DOEPINT13_SETUP field value from a register. */
108891 #define ALT_USB_DEV_DOEPINT13_SETUP_GET(value) (((value) & 0x00000008) >> 3)
108892 /* Produces a ALT_USB_DEV_DOEPINT13_SETUP register field value suitable for setting the register. */
108893 #define ALT_USB_DEV_DOEPINT13_SETUP_SET(value) (((value) << 3) & 0x00000008)
108894 
108895 /*
108896  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
108897  *
108898  * Applies only to control OUT endpoints. Indicates that an OUT token was received
108899  * when the endpoint was not yet enabled. This interrupt is asserted on the
108900  * endpoint for which the OUT token was received.
108901  *
108902  * Field Enumeration Values:
108903  *
108904  * Enum | Value | Description
108905  * :------------------------------------------|:------|:---------------------------------------------
108906  * ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
108907  * ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
108908  *
108909  * Field Access Macros:
108910  *
108911  */
108912 /*
108913  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS
108914  *
108915  * No OUT Token Received When Endpoint Disabled
108916  */
108917 #define ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS_E_INACT 0x0
108918 /*
108919  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS
108920  *
108921  * OUT Token Received When Endpoint Disabled
108922  */
108923 #define ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS_E_ACT 0x1
108924 
108925 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS register field. */
108926 #define ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS_LSB 4
108927 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS register field. */
108928 #define ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS_MSB 4
108929 /* The width in bits of the ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS register field. */
108930 #define ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS_WIDTH 1
108931 /* The mask used to set the ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS register field value. */
108932 #define ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS_SET_MSK 0x00000010
108933 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS register field value. */
108934 #define ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS_CLR_MSK 0xffffffef
108935 /* The reset value of the ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS register field. */
108936 #define ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS_RESET 0x0
108937 /* Extracts the ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS field value from a register. */
108938 #define ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
108939 /* Produces a ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS register field value suitable for setting the register. */
108940 #define ALT_USB_DEV_DOEPINT13_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
108941 
108942 /*
108943  * Field : Status Phase Received for Control Write - stsphsercvd
108944  *
108945  * This interrupt is valid only for Control OUT endpoints and only in Scatter
108946  * Gather DMA mode. This interrupt is generated only after the core has transferred
108947  * all the data that the host has sent during the data phase of a control write
108948  * transfer, to the system memory buffer. The interrupt indicates to the
108949  * application that the host has switched from data phase to the status phase of a
108950  * Control Write transfer. The application can use this interrupt to ACK or STALL
108951  * the Status phase, after it has decoded the data phase. This is applicable only
108952  * in Case of Scatter Gather DMA mode.
108953  *
108954  * Field Enumeration Values:
108955  *
108956  * Enum | Value | Description
108957  * :------------------------------------------|:------|:-------------------------------------------
108958  * ALT_USB_DEV_DOEPINT13_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
108959  * ALT_USB_DEV_DOEPINT13_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
108960  *
108961  * Field Access Macros:
108962  *
108963  */
108964 /*
108965  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_STSPHSERCVD
108966  *
108967  * No Status Phase Received for Control Write
108968  */
108969 #define ALT_USB_DEV_DOEPINT13_STSPHSERCVD_E_INACT 0x0
108970 /*
108971  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_STSPHSERCVD
108972  *
108973  * Status Phase Received for Control Write
108974  */
108975 #define ALT_USB_DEV_DOEPINT13_STSPHSERCVD_E_ACT 0x1
108976 
108977 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_STSPHSERCVD register field. */
108978 #define ALT_USB_DEV_DOEPINT13_STSPHSERCVD_LSB 5
108979 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_STSPHSERCVD register field. */
108980 #define ALT_USB_DEV_DOEPINT13_STSPHSERCVD_MSB 5
108981 /* The width in bits of the ALT_USB_DEV_DOEPINT13_STSPHSERCVD register field. */
108982 #define ALT_USB_DEV_DOEPINT13_STSPHSERCVD_WIDTH 1
108983 /* The mask used to set the ALT_USB_DEV_DOEPINT13_STSPHSERCVD register field value. */
108984 #define ALT_USB_DEV_DOEPINT13_STSPHSERCVD_SET_MSK 0x00000020
108985 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_STSPHSERCVD register field value. */
108986 #define ALT_USB_DEV_DOEPINT13_STSPHSERCVD_CLR_MSK 0xffffffdf
108987 /* The reset value of the ALT_USB_DEV_DOEPINT13_STSPHSERCVD register field. */
108988 #define ALT_USB_DEV_DOEPINT13_STSPHSERCVD_RESET 0x0
108989 /* Extracts the ALT_USB_DEV_DOEPINT13_STSPHSERCVD field value from a register. */
108990 #define ALT_USB_DEV_DOEPINT13_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
108991 /* Produces a ALT_USB_DEV_DOEPINT13_STSPHSERCVD register field value suitable for setting the register. */
108992 #define ALT_USB_DEV_DOEPINT13_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
108993 
108994 /*
108995  * Field : Back-to-Back SETUP Packets Received - back2backsetup
108996  *
108997  * Applies to Control OUT endpoints only. This bit indicates that the core has
108998  * received more than three back-to-back SETUP packets for this particular
108999  * endpoint. for information about handling this interrupt,
109000  *
109001  * Field Enumeration Values:
109002  *
109003  * Enum | Value | Description
109004  * :---------------------------------------------|:------|:---------------------------------------
109005  * ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
109006  * ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
109007  *
109008  * Field Access Macros:
109009  *
109010  */
109011 /*
109012  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP
109013  *
109014  * No Back-to-Back SETUP Packets Received
109015  */
109016 #define ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP_E_INACT 0x0
109017 /*
109018  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP
109019  *
109020  * Back-to-Back SETUP Packets Received
109021  */
109022 #define ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP_E_ACT 0x1
109023 
109024 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP register field. */
109025 #define ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP_LSB 6
109026 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP register field. */
109027 #define ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP_MSB 6
109028 /* The width in bits of the ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP register field. */
109029 #define ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP_WIDTH 1
109030 /* The mask used to set the ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP register field value. */
109031 #define ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP_SET_MSK 0x00000040
109032 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP register field value. */
109033 #define ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP_CLR_MSK 0xffffffbf
109034 /* The reset value of the ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP register field. */
109035 #define ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP_RESET 0x0
109036 /* Extracts the ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP field value from a register. */
109037 #define ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
109038 /* Produces a ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP register field value suitable for setting the register. */
109039 #define ALT_USB_DEV_DOEPINT13_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
109040 
109041 /*
109042  * Field : OUT Packet Error - outpkterr
109043  *
109044  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
109045  * an overflow or a CRC error for non-Isochronous OUT packet.
109046  *
109047  * Field Enumeration Values:
109048  *
109049  * Enum | Value | Description
109050  * :----------------------------------------|:------|:--------------------
109051  * ALT_USB_DEV_DOEPINT13_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
109052  * ALT_USB_DEV_DOEPINT13_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
109053  *
109054  * Field Access Macros:
109055  *
109056  */
109057 /*
109058  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_OUTPKTERR
109059  *
109060  * No OUT Packet Error
109061  */
109062 #define ALT_USB_DEV_DOEPINT13_OUTPKTERR_E_INACT 0x0
109063 /*
109064  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_OUTPKTERR
109065  *
109066  * OUT Packet Error
109067  */
109068 #define ALT_USB_DEV_DOEPINT13_OUTPKTERR_E_ACT 0x1
109069 
109070 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_OUTPKTERR register field. */
109071 #define ALT_USB_DEV_DOEPINT13_OUTPKTERR_LSB 8
109072 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_OUTPKTERR register field. */
109073 #define ALT_USB_DEV_DOEPINT13_OUTPKTERR_MSB 8
109074 /* The width in bits of the ALT_USB_DEV_DOEPINT13_OUTPKTERR register field. */
109075 #define ALT_USB_DEV_DOEPINT13_OUTPKTERR_WIDTH 1
109076 /* The mask used to set the ALT_USB_DEV_DOEPINT13_OUTPKTERR register field value. */
109077 #define ALT_USB_DEV_DOEPINT13_OUTPKTERR_SET_MSK 0x00000100
109078 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_OUTPKTERR register field value. */
109079 #define ALT_USB_DEV_DOEPINT13_OUTPKTERR_CLR_MSK 0xfffffeff
109080 /* The reset value of the ALT_USB_DEV_DOEPINT13_OUTPKTERR register field. */
109081 #define ALT_USB_DEV_DOEPINT13_OUTPKTERR_RESET 0x0
109082 /* Extracts the ALT_USB_DEV_DOEPINT13_OUTPKTERR field value from a register. */
109083 #define ALT_USB_DEV_DOEPINT13_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
109084 /* Produces a ALT_USB_DEV_DOEPINT13_OUTPKTERR register field value suitable for setting the register. */
109085 #define ALT_USB_DEV_DOEPINT13_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
109086 
109087 /*
109088  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
109089  *
109090  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
109091  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
109092  * the descriptor accessed is not ready for the Core to process, such as Host busy
109093  * or DMA done
109094  *
109095  * Field Enumeration Values:
109096  *
109097  * Enum | Value | Description
109098  * :--------------------------------------|:------|:--------------
109099  * ALT_USB_DEV_DOEPINT13_BNAINTR_E_INACT | 0x0 | No interrupt
109100  * ALT_USB_DEV_DOEPINT13_BNAINTR_E_ACT | 0x1 | BNA interrupt
109101  *
109102  * Field Access Macros:
109103  *
109104  */
109105 /*
109106  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_BNAINTR
109107  *
109108  * No interrupt
109109  */
109110 #define ALT_USB_DEV_DOEPINT13_BNAINTR_E_INACT 0x0
109111 /*
109112  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_BNAINTR
109113  *
109114  * BNA interrupt
109115  */
109116 #define ALT_USB_DEV_DOEPINT13_BNAINTR_E_ACT 0x1
109117 
109118 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_BNAINTR register field. */
109119 #define ALT_USB_DEV_DOEPINT13_BNAINTR_LSB 9
109120 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_BNAINTR register field. */
109121 #define ALT_USB_DEV_DOEPINT13_BNAINTR_MSB 9
109122 /* The width in bits of the ALT_USB_DEV_DOEPINT13_BNAINTR register field. */
109123 #define ALT_USB_DEV_DOEPINT13_BNAINTR_WIDTH 1
109124 /* The mask used to set the ALT_USB_DEV_DOEPINT13_BNAINTR register field value. */
109125 #define ALT_USB_DEV_DOEPINT13_BNAINTR_SET_MSK 0x00000200
109126 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_BNAINTR register field value. */
109127 #define ALT_USB_DEV_DOEPINT13_BNAINTR_CLR_MSK 0xfffffdff
109128 /* The reset value of the ALT_USB_DEV_DOEPINT13_BNAINTR register field. */
109129 #define ALT_USB_DEV_DOEPINT13_BNAINTR_RESET 0x0
109130 /* Extracts the ALT_USB_DEV_DOEPINT13_BNAINTR field value from a register. */
109131 #define ALT_USB_DEV_DOEPINT13_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
109132 /* Produces a ALT_USB_DEV_DOEPINT13_BNAINTR register field value suitable for setting the register. */
109133 #define ALT_USB_DEV_DOEPINT13_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
109134 
109135 /*
109136  * Field : Packet Drop Status - pktdrpsts
109137  *
109138  * This bit indicates to the application that an ISOC OUT packet has been dropped.
109139  * This bit does not have an associated mask bit and does not generate an
109140  * interrupt.
109141  *
109142  * Field Enumeration Values:
109143  *
109144  * Enum | Value | Description
109145  * :----------------------------------------|:------|:-----------------------------
109146  * ALT_USB_DEV_DOEPINT13_PKTDRPSTS_E_INACT | 0x0 | No interrupt
109147  * ALT_USB_DEV_DOEPINT13_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
109148  *
109149  * Field Access Macros:
109150  *
109151  */
109152 /*
109153  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_PKTDRPSTS
109154  *
109155  * No interrupt
109156  */
109157 #define ALT_USB_DEV_DOEPINT13_PKTDRPSTS_E_INACT 0x0
109158 /*
109159  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_PKTDRPSTS
109160  *
109161  * Packet Drop Status interrupt
109162  */
109163 #define ALT_USB_DEV_DOEPINT13_PKTDRPSTS_E_ACT 0x1
109164 
109165 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_PKTDRPSTS register field. */
109166 #define ALT_USB_DEV_DOEPINT13_PKTDRPSTS_LSB 11
109167 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_PKTDRPSTS register field. */
109168 #define ALT_USB_DEV_DOEPINT13_PKTDRPSTS_MSB 11
109169 /* The width in bits of the ALT_USB_DEV_DOEPINT13_PKTDRPSTS register field. */
109170 #define ALT_USB_DEV_DOEPINT13_PKTDRPSTS_WIDTH 1
109171 /* The mask used to set the ALT_USB_DEV_DOEPINT13_PKTDRPSTS register field value. */
109172 #define ALT_USB_DEV_DOEPINT13_PKTDRPSTS_SET_MSK 0x00000800
109173 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_PKTDRPSTS register field value. */
109174 #define ALT_USB_DEV_DOEPINT13_PKTDRPSTS_CLR_MSK 0xfffff7ff
109175 /* The reset value of the ALT_USB_DEV_DOEPINT13_PKTDRPSTS register field. */
109176 #define ALT_USB_DEV_DOEPINT13_PKTDRPSTS_RESET 0x0
109177 /* Extracts the ALT_USB_DEV_DOEPINT13_PKTDRPSTS field value from a register. */
109178 #define ALT_USB_DEV_DOEPINT13_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
109179 /* Produces a ALT_USB_DEV_DOEPINT13_PKTDRPSTS register field value suitable for setting the register. */
109180 #define ALT_USB_DEV_DOEPINT13_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
109181 
109182 /*
109183  * Field : BbleErr Interrupt - bbleerr
109184  *
109185  * The core generates this interrupt when babble is received for the endpoint.
109186  *
109187  * Field Enumeration Values:
109188  *
109189  * Enum | Value | Description
109190  * :--------------------------------------|:------|:------------------
109191  * ALT_USB_DEV_DOEPINT13_BBLEERR_E_INACT | 0x0 | No interrupt
109192  * ALT_USB_DEV_DOEPINT13_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
109193  *
109194  * Field Access Macros:
109195  *
109196  */
109197 /*
109198  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_BBLEERR
109199  *
109200  * No interrupt
109201  */
109202 #define ALT_USB_DEV_DOEPINT13_BBLEERR_E_INACT 0x0
109203 /*
109204  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_BBLEERR
109205  *
109206  * BbleErr interrupt
109207  */
109208 #define ALT_USB_DEV_DOEPINT13_BBLEERR_E_ACT 0x1
109209 
109210 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_BBLEERR register field. */
109211 #define ALT_USB_DEV_DOEPINT13_BBLEERR_LSB 12
109212 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_BBLEERR register field. */
109213 #define ALT_USB_DEV_DOEPINT13_BBLEERR_MSB 12
109214 /* The width in bits of the ALT_USB_DEV_DOEPINT13_BBLEERR register field. */
109215 #define ALT_USB_DEV_DOEPINT13_BBLEERR_WIDTH 1
109216 /* The mask used to set the ALT_USB_DEV_DOEPINT13_BBLEERR register field value. */
109217 #define ALT_USB_DEV_DOEPINT13_BBLEERR_SET_MSK 0x00001000
109218 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_BBLEERR register field value. */
109219 #define ALT_USB_DEV_DOEPINT13_BBLEERR_CLR_MSK 0xffffefff
109220 /* The reset value of the ALT_USB_DEV_DOEPINT13_BBLEERR register field. */
109221 #define ALT_USB_DEV_DOEPINT13_BBLEERR_RESET 0x0
109222 /* Extracts the ALT_USB_DEV_DOEPINT13_BBLEERR field value from a register. */
109223 #define ALT_USB_DEV_DOEPINT13_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
109224 /* Produces a ALT_USB_DEV_DOEPINT13_BBLEERR register field value suitable for setting the register. */
109225 #define ALT_USB_DEV_DOEPINT13_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
109226 
109227 /*
109228  * Field : NAK Interrupt - nakintrpt
109229  *
109230  * The core generates this interrupt when a NAK is transmitted or received by the
109231  * device. In case of isochronous IN endpoints the interrupt gets generated when a
109232  * zero length packet is transmitted due to un-availability of data in the TXFifo.
109233  *
109234  * Field Enumeration Values:
109235  *
109236  * Enum | Value | Description
109237  * :----------------------------------------|:------|:--------------
109238  * ALT_USB_DEV_DOEPINT13_NAKINTRPT_E_INACT | 0x0 | No interrupt
109239  * ALT_USB_DEV_DOEPINT13_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
109240  *
109241  * Field Access Macros:
109242  *
109243  */
109244 /*
109245  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_NAKINTRPT
109246  *
109247  * No interrupt
109248  */
109249 #define ALT_USB_DEV_DOEPINT13_NAKINTRPT_E_INACT 0x0
109250 /*
109251  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_NAKINTRPT
109252  *
109253  * NAK Interrupt
109254  */
109255 #define ALT_USB_DEV_DOEPINT13_NAKINTRPT_E_ACT 0x1
109256 
109257 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_NAKINTRPT register field. */
109258 #define ALT_USB_DEV_DOEPINT13_NAKINTRPT_LSB 13
109259 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_NAKINTRPT register field. */
109260 #define ALT_USB_DEV_DOEPINT13_NAKINTRPT_MSB 13
109261 /* The width in bits of the ALT_USB_DEV_DOEPINT13_NAKINTRPT register field. */
109262 #define ALT_USB_DEV_DOEPINT13_NAKINTRPT_WIDTH 1
109263 /* The mask used to set the ALT_USB_DEV_DOEPINT13_NAKINTRPT register field value. */
109264 #define ALT_USB_DEV_DOEPINT13_NAKINTRPT_SET_MSK 0x00002000
109265 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_NAKINTRPT register field value. */
109266 #define ALT_USB_DEV_DOEPINT13_NAKINTRPT_CLR_MSK 0xffffdfff
109267 /* The reset value of the ALT_USB_DEV_DOEPINT13_NAKINTRPT register field. */
109268 #define ALT_USB_DEV_DOEPINT13_NAKINTRPT_RESET 0x0
109269 /* Extracts the ALT_USB_DEV_DOEPINT13_NAKINTRPT field value from a register. */
109270 #define ALT_USB_DEV_DOEPINT13_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
109271 /* Produces a ALT_USB_DEV_DOEPINT13_NAKINTRPT register field value suitable for setting the register. */
109272 #define ALT_USB_DEV_DOEPINT13_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
109273 
109274 /*
109275  * Field : NYET Interrupt - nyetintrpt
109276  *
109277  * The core generates this interrupt when a NYET response is transmitted for a non
109278  * isochronous OUT endpoint.
109279  *
109280  * Field Enumeration Values:
109281  *
109282  * Enum | Value | Description
109283  * :-----------------------------------------|:------|:---------------
109284  * ALT_USB_DEV_DOEPINT13_NYETINTRPT_E_INACT | 0x0 | No interrupt
109285  * ALT_USB_DEV_DOEPINT13_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
109286  *
109287  * Field Access Macros:
109288  *
109289  */
109290 /*
109291  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_NYETINTRPT
109292  *
109293  * No interrupt
109294  */
109295 #define ALT_USB_DEV_DOEPINT13_NYETINTRPT_E_INACT 0x0
109296 /*
109297  * Enumerated value for register field ALT_USB_DEV_DOEPINT13_NYETINTRPT
109298  *
109299  * NYET Interrupt
109300  */
109301 #define ALT_USB_DEV_DOEPINT13_NYETINTRPT_E_ACT 0x1
109302 
109303 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT13_NYETINTRPT register field. */
109304 #define ALT_USB_DEV_DOEPINT13_NYETINTRPT_LSB 14
109305 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT13_NYETINTRPT register field. */
109306 #define ALT_USB_DEV_DOEPINT13_NYETINTRPT_MSB 14
109307 /* The width in bits of the ALT_USB_DEV_DOEPINT13_NYETINTRPT register field. */
109308 #define ALT_USB_DEV_DOEPINT13_NYETINTRPT_WIDTH 1
109309 /* The mask used to set the ALT_USB_DEV_DOEPINT13_NYETINTRPT register field value. */
109310 #define ALT_USB_DEV_DOEPINT13_NYETINTRPT_SET_MSK 0x00004000
109311 /* The mask used to clear the ALT_USB_DEV_DOEPINT13_NYETINTRPT register field value. */
109312 #define ALT_USB_DEV_DOEPINT13_NYETINTRPT_CLR_MSK 0xffffbfff
109313 /* The reset value of the ALT_USB_DEV_DOEPINT13_NYETINTRPT register field. */
109314 #define ALT_USB_DEV_DOEPINT13_NYETINTRPT_RESET 0x0
109315 /* Extracts the ALT_USB_DEV_DOEPINT13_NYETINTRPT field value from a register. */
109316 #define ALT_USB_DEV_DOEPINT13_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
109317 /* Produces a ALT_USB_DEV_DOEPINT13_NYETINTRPT register field value suitable for setting the register. */
109318 #define ALT_USB_DEV_DOEPINT13_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
109319 
109320 #ifndef __ASSEMBLY__
109321 /*
109322  * WARNING: The C register and register group struct declarations are provided for
109323  * convenience and illustrative purposes. They should, however, be used with
109324  * caution as the C language standard provides no guarantees about the alignment or
109325  * atomicity of device memory accesses. The recommended practice for writing
109326  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
109327  * alt_write_word() functions.
109328  *
109329  * The struct declaration for register ALT_USB_DEV_DOEPINT13.
109330  */
109331 struct ALT_USB_DEV_DOEPINT13_s
109332 {
109333  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
109334  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
109335  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT13_AHBERR */
109336  const uint32_t setup : 1; /* SETUP Phase Done */
109337  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
109338  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
109339  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
109340  uint32_t : 1; /* *UNDEFINED* */
109341  const uint32_t outpkterr : 1; /* OUT Packet Error */
109342  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
109343  uint32_t : 1; /* *UNDEFINED* */
109344  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
109345  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
109346  const uint32_t nakintrpt : 1; /* NAK Interrupt */
109347  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
109348  uint32_t : 17; /* *UNDEFINED* */
109349 };
109350 
109351 /* The typedef declaration for register ALT_USB_DEV_DOEPINT13. */
109352 typedef volatile struct ALT_USB_DEV_DOEPINT13_s ALT_USB_DEV_DOEPINT13_t;
109353 #endif /* __ASSEMBLY__ */
109354 
109355 /* The byte offset of the ALT_USB_DEV_DOEPINT13 register from the beginning of the component. */
109356 #define ALT_USB_DEV_DOEPINT13_OFST 0x4a8
109357 /* The address of the ALT_USB_DEV_DOEPINT13 register. */
109358 #define ALT_USB_DEV_DOEPINT13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT13_OFST))
109359 
109360 /*
109361  * Register : Device OUT Endpoint 13 Transfer Size Register - doeptsiz13
109362  *
109363  * The application must modify this register before enabling the endpoint. Once the
109364  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
109365  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
109366  * application can only read this register once the core has cleared the Endpoint
109367  * Enable bit.
109368  *
109369  * Register Layout
109370  *
109371  * Bits | Access | Reset | Description
109372  * :--------|:-------|:------|:-------------------
109373  * [18:0] | RW | 0x0 | Transfer Size
109374  * [28:19] | RW | 0x0 | Packet Count
109375  * [30:29] | R | 0x0 | SETUP Packet Count
109376  * [31] | ??? | 0x0 | *UNDEFINED*
109377  *
109378  */
109379 /*
109380  * Field : Transfer Size - xfersize
109381  *
109382  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
109383  * application only after it has exhausted the transfer size amount of data. The
109384  * transfer size can be Set to the maximum packet size of the endpoint, to be
109385  * interrupted at the end of each packet. The core decrements this field every time
109386  * a packet from the external memory is written to the RxFIFO.
109387  *
109388  * Field Access Macros:
109389  *
109390  */
109391 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ13_XFERSIZE register field. */
109392 #define ALT_USB_DEV_DOEPTSIZ13_XFERSIZE_LSB 0
109393 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ13_XFERSIZE register field. */
109394 #define ALT_USB_DEV_DOEPTSIZ13_XFERSIZE_MSB 18
109395 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ13_XFERSIZE register field. */
109396 #define ALT_USB_DEV_DOEPTSIZ13_XFERSIZE_WIDTH 19
109397 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ13_XFERSIZE register field value. */
109398 #define ALT_USB_DEV_DOEPTSIZ13_XFERSIZE_SET_MSK 0x0007ffff
109399 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ13_XFERSIZE register field value. */
109400 #define ALT_USB_DEV_DOEPTSIZ13_XFERSIZE_CLR_MSK 0xfff80000
109401 /* The reset value of the ALT_USB_DEV_DOEPTSIZ13_XFERSIZE register field. */
109402 #define ALT_USB_DEV_DOEPTSIZ13_XFERSIZE_RESET 0x0
109403 /* Extracts the ALT_USB_DEV_DOEPTSIZ13_XFERSIZE field value from a register. */
109404 #define ALT_USB_DEV_DOEPTSIZ13_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
109405 /* Produces a ALT_USB_DEV_DOEPTSIZ13_XFERSIZE register field value suitable for setting the register. */
109406 #define ALT_USB_DEV_DOEPTSIZ13_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
109407 
109408 /*
109409  * Field : Packet Count - pktcnt
109410  *
109411  * Indicates the total number of USB packets that constitute the Transfer Size
109412  * amount of data for endpoint 0.This field is decremented every time a packet
109413  * (maximum size or short packet) is read from the RxFIFO.
109414  *
109415  * Field Access Macros:
109416  *
109417  */
109418 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ13_PKTCNT register field. */
109419 #define ALT_USB_DEV_DOEPTSIZ13_PKTCNT_LSB 19
109420 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ13_PKTCNT register field. */
109421 #define ALT_USB_DEV_DOEPTSIZ13_PKTCNT_MSB 28
109422 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ13_PKTCNT register field. */
109423 #define ALT_USB_DEV_DOEPTSIZ13_PKTCNT_WIDTH 10
109424 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ13_PKTCNT register field value. */
109425 #define ALT_USB_DEV_DOEPTSIZ13_PKTCNT_SET_MSK 0x1ff80000
109426 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ13_PKTCNT register field value. */
109427 #define ALT_USB_DEV_DOEPTSIZ13_PKTCNT_CLR_MSK 0xe007ffff
109428 /* The reset value of the ALT_USB_DEV_DOEPTSIZ13_PKTCNT register field. */
109429 #define ALT_USB_DEV_DOEPTSIZ13_PKTCNT_RESET 0x0
109430 /* Extracts the ALT_USB_DEV_DOEPTSIZ13_PKTCNT field value from a register. */
109431 #define ALT_USB_DEV_DOEPTSIZ13_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
109432 /* Produces a ALT_USB_DEV_DOEPTSIZ13_PKTCNT register field value suitable for setting the register. */
109433 #define ALT_USB_DEV_DOEPTSIZ13_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
109434 
109435 /*
109436  * Field : SETUP Packet Count - rxdpid
109437  *
109438  * Applies to isochronous OUT endpoints only.This is the data PID received in the
109439  * last packet for this endpoint. Use datax.
109440  *
109441  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
109442  * number of back-to-back SETUP data packets the endpoint can receive.
109443  *
109444  * Field Enumeration Values:
109445  *
109446  * Enum | Value | Description
109447  * :------------------------------------------|:------|:-------------------
109448  * ALT_USB_DEV_DOEPTSIZ13_RXDPID_E_DATA0 | 0x0 | DATA0
109449  * ALT_USB_DEV_DOEPTSIZ13_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
109450  * ALT_USB_DEV_DOEPTSIZ13_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
109451  * ALT_USB_DEV_DOEPTSIZ13_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
109452  *
109453  * Field Access Macros:
109454  *
109455  */
109456 /*
109457  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ13_RXDPID
109458  *
109459  * DATA0
109460  */
109461 #define ALT_USB_DEV_DOEPTSIZ13_RXDPID_E_DATA0 0x0
109462 /*
109463  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ13_RXDPID
109464  *
109465  * DATA2 or 1 packet
109466  */
109467 #define ALT_USB_DEV_DOEPTSIZ13_RXDPID_E_DATA2PKT1 0x1
109468 /*
109469  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ13_RXDPID
109470  *
109471  * DATA1 or 2 packets
109472  */
109473 #define ALT_USB_DEV_DOEPTSIZ13_RXDPID_E_DATA1PKT2 0x2
109474 /*
109475  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ13_RXDPID
109476  *
109477  * MDATA or 3 packets
109478  */
109479 #define ALT_USB_DEV_DOEPTSIZ13_RXDPID_E_MDATAPKT3 0x3
109480 
109481 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ13_RXDPID register field. */
109482 #define ALT_USB_DEV_DOEPTSIZ13_RXDPID_LSB 29
109483 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ13_RXDPID register field. */
109484 #define ALT_USB_DEV_DOEPTSIZ13_RXDPID_MSB 30
109485 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ13_RXDPID register field. */
109486 #define ALT_USB_DEV_DOEPTSIZ13_RXDPID_WIDTH 2
109487 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ13_RXDPID register field value. */
109488 #define ALT_USB_DEV_DOEPTSIZ13_RXDPID_SET_MSK 0x60000000
109489 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ13_RXDPID register field value. */
109490 #define ALT_USB_DEV_DOEPTSIZ13_RXDPID_CLR_MSK 0x9fffffff
109491 /* The reset value of the ALT_USB_DEV_DOEPTSIZ13_RXDPID register field. */
109492 #define ALT_USB_DEV_DOEPTSIZ13_RXDPID_RESET 0x0
109493 /* Extracts the ALT_USB_DEV_DOEPTSIZ13_RXDPID field value from a register. */
109494 #define ALT_USB_DEV_DOEPTSIZ13_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
109495 /* Produces a ALT_USB_DEV_DOEPTSIZ13_RXDPID register field value suitable for setting the register. */
109496 #define ALT_USB_DEV_DOEPTSIZ13_RXDPID_SET(value) (((value) << 29) & 0x60000000)
109497 
109498 #ifndef __ASSEMBLY__
109499 /*
109500  * WARNING: The C register and register group struct declarations are provided for
109501  * convenience and illustrative purposes. They should, however, be used with
109502  * caution as the C language standard provides no guarantees about the alignment or
109503  * atomicity of device memory accesses. The recommended practice for writing
109504  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
109505  * alt_write_word() functions.
109506  *
109507  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ13.
109508  */
109509 struct ALT_USB_DEV_DOEPTSIZ13_s
109510 {
109511  uint32_t xfersize : 19; /* Transfer Size */
109512  uint32_t pktcnt : 10; /* Packet Count */
109513  const uint32_t rxdpid : 2; /* SETUP Packet Count */
109514  uint32_t : 1; /* *UNDEFINED* */
109515 };
109516 
109517 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ13. */
109518 typedef volatile struct ALT_USB_DEV_DOEPTSIZ13_s ALT_USB_DEV_DOEPTSIZ13_t;
109519 #endif /* __ASSEMBLY__ */
109520 
109521 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ13 register from the beginning of the component. */
109522 #define ALT_USB_DEV_DOEPTSIZ13_OFST 0x4b0
109523 /* The address of the ALT_USB_DEV_DOEPTSIZ13 register. */
109524 #define ALT_USB_DEV_DOEPTSIZ13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ13_OFST))
109525 
109526 /*
109527  * Register : Device OUT Endpoint 13 DMA Address Register - doepdma13
109528  *
109529  * DMA OUT Address.
109530  *
109531  * Register Layout
109532  *
109533  * Bits | Access | Reset | Description
109534  * :-------|:-------|:--------|:------------
109535  * [31:0] | RW | Unknown | DMA Address
109536  *
109537  */
109538 /*
109539  * Field : DMA Address - doepdma13
109540  *
109541  * Holds the start address of the external memory for storing or fetching endpoint
109542  * data. for control endpoints, this field stores control OUT data packets as well
109543  * as SETUP transaction data packets. When more than three SETUP packets are
109544  * received back-to-back, the SETUP data packet in the memory is overwritten. This
109545  * register is incremented on every AHB transaction. The application can give only
109546  * a DWORD-aligned address.
109547  *
109548  * When Scatter/Gather DMA mode is not enabled, the application programs the start
109549  * address value in this field.
109550  *
109551  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
109552  * for the descriptor list.
109553  *
109554  * Field Access Macros:
109555  *
109556  */
109557 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA13_DOEPDMA13 register field. */
109558 #define ALT_USB_DEV_DOEPDMA13_DOEPDMA13_LSB 0
109559 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA13_DOEPDMA13 register field. */
109560 #define ALT_USB_DEV_DOEPDMA13_DOEPDMA13_MSB 31
109561 /* The width in bits of the ALT_USB_DEV_DOEPDMA13_DOEPDMA13 register field. */
109562 #define ALT_USB_DEV_DOEPDMA13_DOEPDMA13_WIDTH 32
109563 /* The mask used to set the ALT_USB_DEV_DOEPDMA13_DOEPDMA13 register field value. */
109564 #define ALT_USB_DEV_DOEPDMA13_DOEPDMA13_SET_MSK 0xffffffff
109565 /* The mask used to clear the ALT_USB_DEV_DOEPDMA13_DOEPDMA13 register field value. */
109566 #define ALT_USB_DEV_DOEPDMA13_DOEPDMA13_CLR_MSK 0x00000000
109567 /* The reset value of the ALT_USB_DEV_DOEPDMA13_DOEPDMA13 register field is UNKNOWN. */
109568 #define ALT_USB_DEV_DOEPDMA13_DOEPDMA13_RESET 0x0
109569 /* Extracts the ALT_USB_DEV_DOEPDMA13_DOEPDMA13 field value from a register. */
109570 #define ALT_USB_DEV_DOEPDMA13_DOEPDMA13_GET(value) (((value) & 0xffffffff) >> 0)
109571 /* Produces a ALT_USB_DEV_DOEPDMA13_DOEPDMA13 register field value suitable for setting the register. */
109572 #define ALT_USB_DEV_DOEPDMA13_DOEPDMA13_SET(value) (((value) << 0) & 0xffffffff)
109573 
109574 #ifndef __ASSEMBLY__
109575 /*
109576  * WARNING: The C register and register group struct declarations are provided for
109577  * convenience and illustrative purposes. They should, however, be used with
109578  * caution as the C language standard provides no guarantees about the alignment or
109579  * atomicity of device memory accesses. The recommended practice for writing
109580  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
109581  * alt_write_word() functions.
109582  *
109583  * The struct declaration for register ALT_USB_DEV_DOEPDMA13.
109584  */
109585 struct ALT_USB_DEV_DOEPDMA13_s
109586 {
109587  uint32_t doepdma13 : 32; /* DMA Address */
109588 };
109589 
109590 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA13. */
109591 typedef volatile struct ALT_USB_DEV_DOEPDMA13_s ALT_USB_DEV_DOEPDMA13_t;
109592 #endif /* __ASSEMBLY__ */
109593 
109594 /* The byte offset of the ALT_USB_DEV_DOEPDMA13 register from the beginning of the component. */
109595 #define ALT_USB_DEV_DOEPDMA13_OFST 0x4b4
109596 /* The address of the ALT_USB_DEV_DOEPDMA13 register. */
109597 #define ALT_USB_DEV_DOEPDMA13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA13_OFST))
109598 
109599 /*
109600  * Register : Device OUT Endpoint 13 DMA Buffer Address Register - doepdmab13
109601  *
109602  * DMA Buffer Address.
109603  *
109604  * Register Layout
109605  *
109606  * Bits | Access | Reset | Description
109607  * :-------|:-------|:--------|:-------------------
109608  * [31:0] | R | Unknown | DMA Buffer Address
109609  *
109610  */
109611 /*
109612  * Field : DMA Buffer Address - doepdmab13
109613  *
109614  * Holds the current buffer address. This register is updated as and when the data
109615  * transfer for the corresponding end point is in progress. This register is
109616  * present only in Scatter/Gather DMA mode.
109617  *
109618  * Field Access Macros:
109619  *
109620  */
109621 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13 register field. */
109622 #define ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13_LSB 0
109623 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13 register field. */
109624 #define ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13_MSB 31
109625 /* The width in bits of the ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13 register field. */
109626 #define ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13_WIDTH 32
109627 /* The mask used to set the ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13 register field value. */
109628 #define ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13_SET_MSK 0xffffffff
109629 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13 register field value. */
109630 #define ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13_CLR_MSK 0x00000000
109631 /* The reset value of the ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13 register field is UNKNOWN. */
109632 #define ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13_RESET 0x0
109633 /* Extracts the ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13 field value from a register. */
109634 #define ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13_GET(value) (((value) & 0xffffffff) >> 0)
109635 /* Produces a ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13 register field value suitable for setting the register. */
109636 #define ALT_USB_DEV_DOEPDMAB13_DOEPDMAB13_SET(value) (((value) << 0) & 0xffffffff)
109637 
109638 #ifndef __ASSEMBLY__
109639 /*
109640  * WARNING: The C register and register group struct declarations are provided for
109641  * convenience and illustrative purposes. They should, however, be used with
109642  * caution as the C language standard provides no guarantees about the alignment or
109643  * atomicity of device memory accesses. The recommended practice for writing
109644  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
109645  * alt_write_word() functions.
109646  *
109647  * The struct declaration for register ALT_USB_DEV_DOEPDMAB13.
109648  */
109649 struct ALT_USB_DEV_DOEPDMAB13_s
109650 {
109651  const uint32_t doepdmab13 : 32; /* DMA Buffer Address */
109652 };
109653 
109654 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB13. */
109655 typedef volatile struct ALT_USB_DEV_DOEPDMAB13_s ALT_USB_DEV_DOEPDMAB13_t;
109656 #endif /* __ASSEMBLY__ */
109657 
109658 /* The byte offset of the ALT_USB_DEV_DOEPDMAB13 register from the beginning of the component. */
109659 #define ALT_USB_DEV_DOEPDMAB13_OFST 0x4bc
109660 /* The address of the ALT_USB_DEV_DOEPDMAB13 register. */
109661 #define ALT_USB_DEV_DOEPDMAB13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB13_OFST))
109662 
109663 /*
109664  * Register : Device Control OUT Endpoint 14 Control Register - doepctl14
109665  *
109666  * Out Endpoint 14.
109667  *
109668  * Register Layout
109669  *
109670  * Bits | Access | Reset | Description
109671  * :--------|:-------|:------|:--------------------
109672  * [10:0] | RW | 0x0 | Maximum Packet Size
109673  * [14:11] | ??? | 0x0 | *UNDEFINED*
109674  * [15] | RW | 0x0 | USB Active Endpoint
109675  * [16] | R | 0x0 | Endpoint Data PID
109676  * [17] | R | 0x0 | NAK Status
109677  * [19:18] | RW | 0x0 | Endpoint Type
109678  * [20] | RW | 0x0 | Snoop Mode
109679  * [21] | R | 0x0 | STALL Handshake
109680  * [25:22] | ??? | 0x0 | *UNDEFINED*
109681  * [26] | W | 0x0 | Clear NAK
109682  * [27] | W | 0x0 | Set NAK
109683  * [28] | W | 0x0 | Set DATA0 PID
109684  * [29] | W | 0x0 | Set DATA1 PID
109685  * [30] | R | 0x0 | Endpoint Disable
109686  * [31] | R | 0x0 | Endpoint Enable
109687  *
109688  */
109689 /*
109690  * Field : Maximum Packet Size - mps
109691  *
109692  * Applies to IN and OUT endpoints. The application must program this field with
109693  * the maximum packet size for the current logical endpoint. This value is in
109694  * bytes.
109695  *
109696  * Field Access Macros:
109697  *
109698  */
109699 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_MPS register field. */
109700 #define ALT_USB_DEV_DOEPCTL14_MPS_LSB 0
109701 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_MPS register field. */
109702 #define ALT_USB_DEV_DOEPCTL14_MPS_MSB 10
109703 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_MPS register field. */
109704 #define ALT_USB_DEV_DOEPCTL14_MPS_WIDTH 11
109705 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_MPS register field value. */
109706 #define ALT_USB_DEV_DOEPCTL14_MPS_SET_MSK 0x000007ff
109707 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_MPS register field value. */
109708 #define ALT_USB_DEV_DOEPCTL14_MPS_CLR_MSK 0xfffff800
109709 /* The reset value of the ALT_USB_DEV_DOEPCTL14_MPS register field. */
109710 #define ALT_USB_DEV_DOEPCTL14_MPS_RESET 0x0
109711 /* Extracts the ALT_USB_DEV_DOEPCTL14_MPS field value from a register. */
109712 #define ALT_USB_DEV_DOEPCTL14_MPS_GET(value) (((value) & 0x000007ff) >> 0)
109713 /* Produces a ALT_USB_DEV_DOEPCTL14_MPS register field value suitable for setting the register. */
109714 #define ALT_USB_DEV_DOEPCTL14_MPS_SET(value) (((value) << 0) & 0x000007ff)
109715 
109716 /*
109717  * Field : USB Active Endpoint - usbactep
109718  *
109719  * Indicates whether this endpoint is active in the current configuration and
109720  * interface. The core clears this bit for all endpoints (other than EP 0) after
109721  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
109722  * commands, the application must program endpoint registers accordingly and set
109723  * this bit.
109724  *
109725  * Field Enumeration Values:
109726  *
109727  * Enum | Value | Description
109728  * :--------------------------------------|:------|:--------------------
109729  * ALT_USB_DEV_DOEPCTL14_USBACTEP_E_DISD | 0x0 | Not Active
109730  * ALT_USB_DEV_DOEPCTL14_USBACTEP_E_END | 0x1 | USB Active Endpoint
109731  *
109732  * Field Access Macros:
109733  *
109734  */
109735 /*
109736  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_USBACTEP
109737  *
109738  * Not Active
109739  */
109740 #define ALT_USB_DEV_DOEPCTL14_USBACTEP_E_DISD 0x0
109741 /*
109742  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_USBACTEP
109743  *
109744  * USB Active Endpoint
109745  */
109746 #define ALT_USB_DEV_DOEPCTL14_USBACTEP_E_END 0x1
109747 
109748 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_USBACTEP register field. */
109749 #define ALT_USB_DEV_DOEPCTL14_USBACTEP_LSB 15
109750 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_USBACTEP register field. */
109751 #define ALT_USB_DEV_DOEPCTL14_USBACTEP_MSB 15
109752 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_USBACTEP register field. */
109753 #define ALT_USB_DEV_DOEPCTL14_USBACTEP_WIDTH 1
109754 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_USBACTEP register field value. */
109755 #define ALT_USB_DEV_DOEPCTL14_USBACTEP_SET_MSK 0x00008000
109756 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_USBACTEP register field value. */
109757 #define ALT_USB_DEV_DOEPCTL14_USBACTEP_CLR_MSK 0xffff7fff
109758 /* The reset value of the ALT_USB_DEV_DOEPCTL14_USBACTEP register field. */
109759 #define ALT_USB_DEV_DOEPCTL14_USBACTEP_RESET 0x0
109760 /* Extracts the ALT_USB_DEV_DOEPCTL14_USBACTEP field value from a register. */
109761 #define ALT_USB_DEV_DOEPCTL14_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
109762 /* Produces a ALT_USB_DEV_DOEPCTL14_USBACTEP register field value suitable for setting the register. */
109763 #define ALT_USB_DEV_DOEPCTL14_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
109764 
109765 /*
109766  * Field : Endpoint Data PID - dpid
109767  *
109768  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
109769  * packet to be received or transmitted on this endpoint. The application must
109770  * program the PID of the first packet to be received or transmitted on this
109771  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
109772  * SetD0PID fields of this register to program either DATA0 or DATA1 PID.
109773  *
109774  * 0: DATA0
109775  *
109776  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
109777  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
109778  * DMA mode:
109779  *
109780  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
109781  * number in which the core transmits/receives isochronous data for this endpoint.
109782  * The application must program the even/odd (micro) frame number in which it
109783  * intends to transmit/receive isochronous data for this endpoint using the
109784  * SetEvnFr and SetOddFr fields in this register.
109785  *
109786  * 0: Even (micro)frame
109787  *
109788  * 1: Odd (micro)frame
109789  *
109790  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
109791  * number in which to send data is provided in the transmit descriptor structure.
109792  * The frame in which data is received is updated in receive descriptor structure.
109793  *
109794  * Field Enumeration Values:
109795  *
109796  * Enum | Value | Description
109797  * :-----------------------------------|:------|:-----------------------------
109798  * ALT_USB_DEV_DOEPCTL14_DPID_E_INACT | 0x0 | Endpoint Data PID not active
109799  * ALT_USB_DEV_DOEPCTL14_DPID_E_ACT | 0x1 | Endpoint Data PID active
109800  *
109801  * Field Access Macros:
109802  *
109803  */
109804 /*
109805  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_DPID
109806  *
109807  * Endpoint Data PID not active
109808  */
109809 #define ALT_USB_DEV_DOEPCTL14_DPID_E_INACT 0x0
109810 /*
109811  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_DPID
109812  *
109813  * Endpoint Data PID active
109814  */
109815 #define ALT_USB_DEV_DOEPCTL14_DPID_E_ACT 0x1
109816 
109817 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_DPID register field. */
109818 #define ALT_USB_DEV_DOEPCTL14_DPID_LSB 16
109819 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_DPID register field. */
109820 #define ALT_USB_DEV_DOEPCTL14_DPID_MSB 16
109821 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_DPID register field. */
109822 #define ALT_USB_DEV_DOEPCTL14_DPID_WIDTH 1
109823 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_DPID register field value. */
109824 #define ALT_USB_DEV_DOEPCTL14_DPID_SET_MSK 0x00010000
109825 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_DPID register field value. */
109826 #define ALT_USB_DEV_DOEPCTL14_DPID_CLR_MSK 0xfffeffff
109827 /* The reset value of the ALT_USB_DEV_DOEPCTL14_DPID register field. */
109828 #define ALT_USB_DEV_DOEPCTL14_DPID_RESET 0x0
109829 /* Extracts the ALT_USB_DEV_DOEPCTL14_DPID field value from a register. */
109830 #define ALT_USB_DEV_DOEPCTL14_DPID_GET(value) (((value) & 0x00010000) >> 16)
109831 /* Produces a ALT_USB_DEV_DOEPCTL14_DPID register field value suitable for setting the register. */
109832 #define ALT_USB_DEV_DOEPCTL14_DPID_SET(value) (((value) << 16) & 0x00010000)
109833 
109834 /*
109835  * Field : NAK Status - naksts
109836  *
109837  * When either the application or the core sets this bit:
109838  *
109839  * * The core stops receiving any data on an OUT endpoint, even if there is space
109840  * in the RxFIFO to accommodate the incoming packet.
109841  *
109842  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
109843  * IN endpoint, even if there data is available in the TxFIFO.
109844  *
109845  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
109846  * even if there data is available in the TxFIFO.
109847  *
109848  * Irrespective of this bit's setting, the core always responds to SETUP data
109849  * packets with an ACK handshake.
109850  *
109851  * Field Enumeration Values:
109852  *
109853  * Enum | Value | Description
109854  * :--------------------------------------|:------|:------------------------------------------------
109855  * ALT_USB_DEV_DOEPCTL14_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
109856  * : | | based on the FIFO status
109857  * ALT_USB_DEV_DOEPCTL14_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
109858  * : | | endpoint
109859  *
109860  * Field Access Macros:
109861  *
109862  */
109863 /*
109864  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_NAKSTS
109865  *
109866  * The core is transmitting non-NAK handshakes based on the FIFO status
109867  */
109868 #define ALT_USB_DEV_DOEPCTL14_NAKSTS_E_NONNAK 0x0
109869 /*
109870  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_NAKSTS
109871  *
109872  * The core is transmitting NAK handshakes on this endpoint
109873  */
109874 #define ALT_USB_DEV_DOEPCTL14_NAKSTS_E_NAK 0x1
109875 
109876 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_NAKSTS register field. */
109877 #define ALT_USB_DEV_DOEPCTL14_NAKSTS_LSB 17
109878 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_NAKSTS register field. */
109879 #define ALT_USB_DEV_DOEPCTL14_NAKSTS_MSB 17
109880 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_NAKSTS register field. */
109881 #define ALT_USB_DEV_DOEPCTL14_NAKSTS_WIDTH 1
109882 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_NAKSTS register field value. */
109883 #define ALT_USB_DEV_DOEPCTL14_NAKSTS_SET_MSK 0x00020000
109884 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_NAKSTS register field value. */
109885 #define ALT_USB_DEV_DOEPCTL14_NAKSTS_CLR_MSK 0xfffdffff
109886 /* The reset value of the ALT_USB_DEV_DOEPCTL14_NAKSTS register field. */
109887 #define ALT_USB_DEV_DOEPCTL14_NAKSTS_RESET 0x0
109888 /* Extracts the ALT_USB_DEV_DOEPCTL14_NAKSTS field value from a register. */
109889 #define ALT_USB_DEV_DOEPCTL14_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
109890 /* Produces a ALT_USB_DEV_DOEPCTL14_NAKSTS register field value suitable for setting the register. */
109891 #define ALT_USB_DEV_DOEPCTL14_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
109892 
109893 /*
109894  * Field : Endpoint Type - eptype
109895  *
109896  * This is the transfer type supported by this logical endpoint.
109897  *
109898  * Field Enumeration Values:
109899  *
109900  * Enum | Value | Description
109901  * :-------------------------------------------|:------|:------------
109902  * ALT_USB_DEV_DOEPCTL14_EPTYPE_E_CTL | 0x0 | Control
109903  * ALT_USB_DEV_DOEPCTL14_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
109904  * ALT_USB_DEV_DOEPCTL14_EPTYPE_E_BULK | 0x2 | Bulk
109905  * ALT_USB_DEV_DOEPCTL14_EPTYPE_E_INTERRUP | 0x3 | Interrupt
109906  *
109907  * Field Access Macros:
109908  *
109909  */
109910 /*
109911  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_EPTYPE
109912  *
109913  * Control
109914  */
109915 #define ALT_USB_DEV_DOEPCTL14_EPTYPE_E_CTL 0x0
109916 /*
109917  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_EPTYPE
109918  *
109919  * Isochronous
109920  */
109921 #define ALT_USB_DEV_DOEPCTL14_EPTYPE_E_ISOCHRONOUS 0x1
109922 /*
109923  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_EPTYPE
109924  *
109925  * Bulk
109926  */
109927 #define ALT_USB_DEV_DOEPCTL14_EPTYPE_E_BULK 0x2
109928 /*
109929  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_EPTYPE
109930  *
109931  * Interrupt
109932  */
109933 #define ALT_USB_DEV_DOEPCTL14_EPTYPE_E_INTERRUP 0x3
109934 
109935 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_EPTYPE register field. */
109936 #define ALT_USB_DEV_DOEPCTL14_EPTYPE_LSB 18
109937 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_EPTYPE register field. */
109938 #define ALT_USB_DEV_DOEPCTL14_EPTYPE_MSB 19
109939 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_EPTYPE register field. */
109940 #define ALT_USB_DEV_DOEPCTL14_EPTYPE_WIDTH 2
109941 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_EPTYPE register field value. */
109942 #define ALT_USB_DEV_DOEPCTL14_EPTYPE_SET_MSK 0x000c0000
109943 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_EPTYPE register field value. */
109944 #define ALT_USB_DEV_DOEPCTL14_EPTYPE_CLR_MSK 0xfff3ffff
109945 /* The reset value of the ALT_USB_DEV_DOEPCTL14_EPTYPE register field. */
109946 #define ALT_USB_DEV_DOEPCTL14_EPTYPE_RESET 0x0
109947 /* Extracts the ALT_USB_DEV_DOEPCTL14_EPTYPE field value from a register. */
109948 #define ALT_USB_DEV_DOEPCTL14_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
109949 /* Produces a ALT_USB_DEV_DOEPCTL14_EPTYPE register field value suitable for setting the register. */
109950 #define ALT_USB_DEV_DOEPCTL14_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
109951 
109952 /*
109953  * Field : Snoop Mode - snp
109954  *
109955  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
109956  * In Snoop mode, the core does not check the correctness of OUT packets before
109957  * transferring them to application memory.
109958  *
109959  * Field Enumeration Values:
109960  *
109961  * Enum | Value | Description
109962  * :--------------------------------|:------|:-------------------
109963  * ALT_USB_DEV_DOEPCTL14_SNP_E_DIS | 0x0 | Disable Snoop Mode
109964  * ALT_USB_DEV_DOEPCTL14_SNP_E_EN | 0x1 | Enable Snoop Mode
109965  *
109966  * Field Access Macros:
109967  *
109968  */
109969 /*
109970  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_SNP
109971  *
109972  * Disable Snoop Mode
109973  */
109974 #define ALT_USB_DEV_DOEPCTL14_SNP_E_DIS 0x0
109975 /*
109976  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_SNP
109977  *
109978  * Enable Snoop Mode
109979  */
109980 #define ALT_USB_DEV_DOEPCTL14_SNP_E_EN 0x1
109981 
109982 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_SNP register field. */
109983 #define ALT_USB_DEV_DOEPCTL14_SNP_LSB 20
109984 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_SNP register field. */
109985 #define ALT_USB_DEV_DOEPCTL14_SNP_MSB 20
109986 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_SNP register field. */
109987 #define ALT_USB_DEV_DOEPCTL14_SNP_WIDTH 1
109988 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_SNP register field value. */
109989 #define ALT_USB_DEV_DOEPCTL14_SNP_SET_MSK 0x00100000
109990 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_SNP register field value. */
109991 #define ALT_USB_DEV_DOEPCTL14_SNP_CLR_MSK 0xffefffff
109992 /* The reset value of the ALT_USB_DEV_DOEPCTL14_SNP register field. */
109993 #define ALT_USB_DEV_DOEPCTL14_SNP_RESET 0x0
109994 /* Extracts the ALT_USB_DEV_DOEPCTL14_SNP field value from a register. */
109995 #define ALT_USB_DEV_DOEPCTL14_SNP_GET(value) (((value) & 0x00100000) >> 20)
109996 /* Produces a ALT_USB_DEV_DOEPCTL14_SNP register field value suitable for setting the register. */
109997 #define ALT_USB_DEV_DOEPCTL14_SNP_SET(value) (((value) << 20) & 0x00100000)
109998 
109999 /*
110000  * Field : STALL Handshake - stall
110001  *
110002  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
110003  * application sets this bit to stall all tokens from the USB host to this
110004  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
110005  * along with this bit, the STALL bit takes priority. Only the application can
110006  * clear this bit, never the core. Applies to control endpoints only. The
110007  * application can only set this bit, and the core clears it, when a SETUP token is
110008  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
110009  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
110010  * of this bit's setting, the core always responds to SETUP data packets with an
110011  * ACK handshake.
110012  *
110013  * Field Enumeration Values:
110014  *
110015  * Enum | Value | Description
110016  * :------------------------------------|:------|:----------------------------
110017  * ALT_USB_DEV_DOEPCTL14_STALL_E_INACT | 0x0 | STALL All Tokens not active
110018  * ALT_USB_DEV_DOEPCTL14_STALL_E_ACT | 0x1 | STALL All Tokens active
110019  *
110020  * Field Access Macros:
110021  *
110022  */
110023 /*
110024  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_STALL
110025  *
110026  * STALL All Tokens not active
110027  */
110028 #define ALT_USB_DEV_DOEPCTL14_STALL_E_INACT 0x0
110029 /*
110030  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_STALL
110031  *
110032  * STALL All Tokens active
110033  */
110034 #define ALT_USB_DEV_DOEPCTL14_STALL_E_ACT 0x1
110035 
110036 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_STALL register field. */
110037 #define ALT_USB_DEV_DOEPCTL14_STALL_LSB 21
110038 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_STALL register field. */
110039 #define ALT_USB_DEV_DOEPCTL14_STALL_MSB 21
110040 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_STALL register field. */
110041 #define ALT_USB_DEV_DOEPCTL14_STALL_WIDTH 1
110042 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_STALL register field value. */
110043 #define ALT_USB_DEV_DOEPCTL14_STALL_SET_MSK 0x00200000
110044 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_STALL register field value. */
110045 #define ALT_USB_DEV_DOEPCTL14_STALL_CLR_MSK 0xffdfffff
110046 /* The reset value of the ALT_USB_DEV_DOEPCTL14_STALL register field. */
110047 #define ALT_USB_DEV_DOEPCTL14_STALL_RESET 0x0
110048 /* Extracts the ALT_USB_DEV_DOEPCTL14_STALL field value from a register. */
110049 #define ALT_USB_DEV_DOEPCTL14_STALL_GET(value) (((value) & 0x00200000) >> 21)
110050 /* Produces a ALT_USB_DEV_DOEPCTL14_STALL register field value suitable for setting the register. */
110051 #define ALT_USB_DEV_DOEPCTL14_STALL_SET(value) (((value) << 21) & 0x00200000)
110052 
110053 /*
110054  * Field : Clear NAK - cnak
110055  *
110056  * A write to this bit clears the NAK bit for the endpoint.
110057  *
110058  * Field Enumeration Values:
110059  *
110060  * Enum | Value | Description
110061  * :-----------------------------------|:------|:-------------
110062  * ALT_USB_DEV_DOEPCTL14_CNAK_E_INACT | 0x0 | No Clear NAK
110063  * ALT_USB_DEV_DOEPCTL14_CNAK_E_ACT | 0x1 | Clear NAK
110064  *
110065  * Field Access Macros:
110066  *
110067  */
110068 /*
110069  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_CNAK
110070  *
110071  * No Clear NAK
110072  */
110073 #define ALT_USB_DEV_DOEPCTL14_CNAK_E_INACT 0x0
110074 /*
110075  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_CNAK
110076  *
110077  * Clear NAK
110078  */
110079 #define ALT_USB_DEV_DOEPCTL14_CNAK_E_ACT 0x1
110080 
110081 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_CNAK register field. */
110082 #define ALT_USB_DEV_DOEPCTL14_CNAK_LSB 26
110083 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_CNAK register field. */
110084 #define ALT_USB_DEV_DOEPCTL14_CNAK_MSB 26
110085 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_CNAK register field. */
110086 #define ALT_USB_DEV_DOEPCTL14_CNAK_WIDTH 1
110087 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_CNAK register field value. */
110088 #define ALT_USB_DEV_DOEPCTL14_CNAK_SET_MSK 0x04000000
110089 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_CNAK register field value. */
110090 #define ALT_USB_DEV_DOEPCTL14_CNAK_CLR_MSK 0xfbffffff
110091 /* The reset value of the ALT_USB_DEV_DOEPCTL14_CNAK register field. */
110092 #define ALT_USB_DEV_DOEPCTL14_CNAK_RESET 0x0
110093 /* Extracts the ALT_USB_DEV_DOEPCTL14_CNAK field value from a register. */
110094 #define ALT_USB_DEV_DOEPCTL14_CNAK_GET(value) (((value) & 0x04000000) >> 26)
110095 /* Produces a ALT_USB_DEV_DOEPCTL14_CNAK register field value suitable for setting the register. */
110096 #define ALT_USB_DEV_DOEPCTL14_CNAK_SET(value) (((value) << 26) & 0x04000000)
110097 
110098 /*
110099  * Field : Set NAK - snak
110100  *
110101  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
110102  * application can control the transmission of NAK handshakes on an endpoint. The
110103  * core can also Set this bit for an endpoint after a SETUP packet is received on
110104  * that endpoint.
110105  *
110106  * Field Enumeration Values:
110107  *
110108  * Enum | Value | Description
110109  * :-----------------------------------|:------|:------------
110110  * ALT_USB_DEV_DOEPCTL14_SNAK_E_INACT | 0x0 | No Set NAK
110111  * ALT_USB_DEV_DOEPCTL14_SNAK_E_ACT | 0x1 | Set NAK
110112  *
110113  * Field Access Macros:
110114  *
110115  */
110116 /*
110117  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_SNAK
110118  *
110119  * No Set NAK
110120  */
110121 #define ALT_USB_DEV_DOEPCTL14_SNAK_E_INACT 0x0
110122 /*
110123  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_SNAK
110124  *
110125  * Set NAK
110126  */
110127 #define ALT_USB_DEV_DOEPCTL14_SNAK_E_ACT 0x1
110128 
110129 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_SNAK register field. */
110130 #define ALT_USB_DEV_DOEPCTL14_SNAK_LSB 27
110131 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_SNAK register field. */
110132 #define ALT_USB_DEV_DOEPCTL14_SNAK_MSB 27
110133 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_SNAK register field. */
110134 #define ALT_USB_DEV_DOEPCTL14_SNAK_WIDTH 1
110135 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_SNAK register field value. */
110136 #define ALT_USB_DEV_DOEPCTL14_SNAK_SET_MSK 0x08000000
110137 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_SNAK register field value. */
110138 #define ALT_USB_DEV_DOEPCTL14_SNAK_CLR_MSK 0xf7ffffff
110139 /* The reset value of the ALT_USB_DEV_DOEPCTL14_SNAK register field. */
110140 #define ALT_USB_DEV_DOEPCTL14_SNAK_RESET 0x0
110141 /* Extracts the ALT_USB_DEV_DOEPCTL14_SNAK field value from a register. */
110142 #define ALT_USB_DEV_DOEPCTL14_SNAK_GET(value) (((value) & 0x08000000) >> 27)
110143 /* Produces a ALT_USB_DEV_DOEPCTL14_SNAK register field value suitable for setting the register. */
110144 #define ALT_USB_DEV_DOEPCTL14_SNAK_SET(value) (((value) << 27) & 0x08000000)
110145 
110146 /*
110147  * Field : Set DATA0 PID - setd0pid
110148  *
110149  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
110150  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
110151  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
110152  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
110153  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
110154  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
110155  * mode is enabled, this field is reserved. The frame number in which to send data
110156  * is in the transmit descriptor structure. The frame in which to receive data is
110157  * updated in receive descriptor structure.
110158  *
110159  * Field Enumeration Values:
110160  *
110161  * Enum | Value | Description
110162  * :--------------------------------------|:------|:------------------------------------
110163  * ALT_USB_DEV_DOEPCTL14_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
110164  * ALT_USB_DEV_DOEPCTL14_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
110165  *
110166  * Field Access Macros:
110167  *
110168  */
110169 /*
110170  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_SETD0PID
110171  *
110172  * Disables Set DATA0 PID
110173  */
110174 #define ALT_USB_DEV_DOEPCTL14_SETD0PID_E_DISD 0x0
110175 /*
110176  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_SETD0PID
110177  *
110178  * Enables Endpoint Data PID to DATA0)
110179  */
110180 #define ALT_USB_DEV_DOEPCTL14_SETD0PID_E_END 0x1
110181 
110182 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_SETD0PID register field. */
110183 #define ALT_USB_DEV_DOEPCTL14_SETD0PID_LSB 28
110184 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_SETD0PID register field. */
110185 #define ALT_USB_DEV_DOEPCTL14_SETD0PID_MSB 28
110186 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_SETD0PID register field. */
110187 #define ALT_USB_DEV_DOEPCTL14_SETD0PID_WIDTH 1
110188 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_SETD0PID register field value. */
110189 #define ALT_USB_DEV_DOEPCTL14_SETD0PID_SET_MSK 0x10000000
110190 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_SETD0PID register field value. */
110191 #define ALT_USB_DEV_DOEPCTL14_SETD0PID_CLR_MSK 0xefffffff
110192 /* The reset value of the ALT_USB_DEV_DOEPCTL14_SETD0PID register field. */
110193 #define ALT_USB_DEV_DOEPCTL14_SETD0PID_RESET 0x0
110194 /* Extracts the ALT_USB_DEV_DOEPCTL14_SETD0PID field value from a register. */
110195 #define ALT_USB_DEV_DOEPCTL14_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
110196 /* Produces a ALT_USB_DEV_DOEPCTL14_SETD0PID register field value suitable for setting the register. */
110197 #define ALT_USB_DEV_DOEPCTL14_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
110198 
110199 /*
110200  * Field : Set DATA1 PID - setd1pid
110201  *
110202  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
110203  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
110204  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
110205  *
110206  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
110207  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
110208  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
110209  *
110210  * Field Enumeration Values:
110211  *
110212  * Enum | Value | Description
110213  * :--------------------------------------|:------|:-----------------------
110214  * ALT_USB_DEV_DOEPCTL14_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
110215  * ALT_USB_DEV_DOEPCTL14_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
110216  *
110217  * Field Access Macros:
110218  *
110219  */
110220 /*
110221  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_SETD1PID
110222  *
110223  * Disables Set DATA1 PID
110224  */
110225 #define ALT_USB_DEV_DOEPCTL14_SETD1PID_E_DISD 0x0
110226 /*
110227  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_SETD1PID
110228  *
110229  * Enables Set DATA1 PID
110230  */
110231 #define ALT_USB_DEV_DOEPCTL14_SETD1PID_E_END 0x1
110232 
110233 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_SETD1PID register field. */
110234 #define ALT_USB_DEV_DOEPCTL14_SETD1PID_LSB 29
110235 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_SETD1PID register field. */
110236 #define ALT_USB_DEV_DOEPCTL14_SETD1PID_MSB 29
110237 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_SETD1PID register field. */
110238 #define ALT_USB_DEV_DOEPCTL14_SETD1PID_WIDTH 1
110239 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_SETD1PID register field value. */
110240 #define ALT_USB_DEV_DOEPCTL14_SETD1PID_SET_MSK 0x20000000
110241 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_SETD1PID register field value. */
110242 #define ALT_USB_DEV_DOEPCTL14_SETD1PID_CLR_MSK 0xdfffffff
110243 /* The reset value of the ALT_USB_DEV_DOEPCTL14_SETD1PID register field. */
110244 #define ALT_USB_DEV_DOEPCTL14_SETD1PID_RESET 0x0
110245 /* Extracts the ALT_USB_DEV_DOEPCTL14_SETD1PID field value from a register. */
110246 #define ALT_USB_DEV_DOEPCTL14_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
110247 /* Produces a ALT_USB_DEV_DOEPCTL14_SETD1PID register field value suitable for setting the register. */
110248 #define ALT_USB_DEV_DOEPCTL14_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
110249 
110250 /*
110251  * Field : Endpoint Disable - epdis
110252  *
110253  * Applies to IN and OUT endpoints. The application sets this bit to stop
110254  * transmitting/receiving data on an endpoint, even before the transfer for that
110255  * endpoint is complete. The application must wait for the Endpoint Disabled
110256  * interrupt before treating the endpoint as disabled. The core clears this bit
110257  * before setting the Endpoint Disabled interrupt. The application must set this
110258  * bit only if Endpoint Enable is already set for this endpoint.
110259  *
110260  * Field Enumeration Values:
110261  *
110262  * Enum | Value | Description
110263  * :------------------------------------|:------|:--------------------
110264  * ALT_USB_DEV_DOEPCTL14_EPDIS_E_INACT | 0x0 | No Endpoint Disable
110265  * ALT_USB_DEV_DOEPCTL14_EPDIS_E_ACT | 0x1 | Endpoint Disable
110266  *
110267  * Field Access Macros:
110268  *
110269  */
110270 /*
110271  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_EPDIS
110272  *
110273  * No Endpoint Disable
110274  */
110275 #define ALT_USB_DEV_DOEPCTL14_EPDIS_E_INACT 0x0
110276 /*
110277  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_EPDIS
110278  *
110279  * Endpoint Disable
110280  */
110281 #define ALT_USB_DEV_DOEPCTL14_EPDIS_E_ACT 0x1
110282 
110283 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_EPDIS register field. */
110284 #define ALT_USB_DEV_DOEPCTL14_EPDIS_LSB 30
110285 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_EPDIS register field. */
110286 #define ALT_USB_DEV_DOEPCTL14_EPDIS_MSB 30
110287 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_EPDIS register field. */
110288 #define ALT_USB_DEV_DOEPCTL14_EPDIS_WIDTH 1
110289 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_EPDIS register field value. */
110290 #define ALT_USB_DEV_DOEPCTL14_EPDIS_SET_MSK 0x40000000
110291 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_EPDIS register field value. */
110292 #define ALT_USB_DEV_DOEPCTL14_EPDIS_CLR_MSK 0xbfffffff
110293 /* The reset value of the ALT_USB_DEV_DOEPCTL14_EPDIS register field. */
110294 #define ALT_USB_DEV_DOEPCTL14_EPDIS_RESET 0x0
110295 /* Extracts the ALT_USB_DEV_DOEPCTL14_EPDIS field value from a register. */
110296 #define ALT_USB_DEV_DOEPCTL14_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
110297 /* Produces a ALT_USB_DEV_DOEPCTL14_EPDIS register field value suitable for setting the register. */
110298 #define ALT_USB_DEV_DOEPCTL14_EPDIS_SET(value) (((value) << 30) & 0x40000000)
110299 
110300 /*
110301  * Field : Endpoint Enable - epena
110302  *
110303  * Applies to IN and OUT endpoints.
110304  *
110305  * * When Scatter/Gather DMA mode is enabled,
110306  *
110307  * * for IN endpoints this bit indicates that the descriptor structure and data
110308  * buffer with data ready to transmit is setup.
110309  *
110310  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
110311  * receive data is setup.
110312  *
110313  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
110314  * mode:
110315  *
110316  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
110317  * the endpoint.
110318  *
110319  * * for OUT endpoints, this bit indicates that the application has allocated the
110320  * memory to start receiving data from the USB.
110321  *
110322  * * The core clears this bit before setting any of the following interrupts on
110323  * this endpoint:
110324  *
110325  * * SETUP Phase Done
110326  *
110327  * * Endpoint Disabled
110328  *
110329  * * Transfer Completed
110330  *
110331  * for control endpoints in DMA mode, this bit must be set to be able to transfer
110332  * SETUP data packets in memory.
110333  *
110334  * Field Enumeration Values:
110335  *
110336  * Enum | Value | Description
110337  * :------------------------------------|:------|:-------------------------
110338  * ALT_USB_DEV_DOEPCTL14_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
110339  * ALT_USB_DEV_DOEPCTL14_EPENA_E_ACT | 0x1 | Endpoint Enable active
110340  *
110341  * Field Access Macros:
110342  *
110343  */
110344 /*
110345  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_EPENA
110346  *
110347  * Endpoint Enable inactive
110348  */
110349 #define ALT_USB_DEV_DOEPCTL14_EPENA_E_INACT 0x0
110350 /*
110351  * Enumerated value for register field ALT_USB_DEV_DOEPCTL14_EPENA
110352  *
110353  * Endpoint Enable active
110354  */
110355 #define ALT_USB_DEV_DOEPCTL14_EPENA_E_ACT 0x1
110356 
110357 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL14_EPENA register field. */
110358 #define ALT_USB_DEV_DOEPCTL14_EPENA_LSB 31
110359 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL14_EPENA register field. */
110360 #define ALT_USB_DEV_DOEPCTL14_EPENA_MSB 31
110361 /* The width in bits of the ALT_USB_DEV_DOEPCTL14_EPENA register field. */
110362 #define ALT_USB_DEV_DOEPCTL14_EPENA_WIDTH 1
110363 /* The mask used to set the ALT_USB_DEV_DOEPCTL14_EPENA register field value. */
110364 #define ALT_USB_DEV_DOEPCTL14_EPENA_SET_MSK 0x80000000
110365 /* The mask used to clear the ALT_USB_DEV_DOEPCTL14_EPENA register field value. */
110366 #define ALT_USB_DEV_DOEPCTL14_EPENA_CLR_MSK 0x7fffffff
110367 /* The reset value of the ALT_USB_DEV_DOEPCTL14_EPENA register field. */
110368 #define ALT_USB_DEV_DOEPCTL14_EPENA_RESET 0x0
110369 /* Extracts the ALT_USB_DEV_DOEPCTL14_EPENA field value from a register. */
110370 #define ALT_USB_DEV_DOEPCTL14_EPENA_GET(value) (((value) & 0x80000000) >> 31)
110371 /* Produces a ALT_USB_DEV_DOEPCTL14_EPENA register field value suitable for setting the register. */
110372 #define ALT_USB_DEV_DOEPCTL14_EPENA_SET(value) (((value) << 31) & 0x80000000)
110373 
110374 #ifndef __ASSEMBLY__
110375 /*
110376  * WARNING: The C register and register group struct declarations are provided for
110377  * convenience and illustrative purposes. They should, however, be used with
110378  * caution as the C language standard provides no guarantees about the alignment or
110379  * atomicity of device memory accesses. The recommended practice for writing
110380  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
110381  * alt_write_word() functions.
110382  *
110383  * The struct declaration for register ALT_USB_DEV_DOEPCTL14.
110384  */
110385 struct ALT_USB_DEV_DOEPCTL14_s
110386 {
110387  uint32_t mps : 11; /* Maximum Packet Size */
110388  uint32_t : 4; /* *UNDEFINED* */
110389  uint32_t usbactep : 1; /* USB Active Endpoint */
110390  const uint32_t dpid : 1; /* Endpoint Data PID */
110391  const uint32_t naksts : 1; /* NAK Status */
110392  uint32_t eptype : 2; /* Endpoint Type */
110393  uint32_t snp : 1; /* Snoop Mode */
110394  const uint32_t stall : 1; /* STALL Handshake */
110395  uint32_t : 4; /* *UNDEFINED* */
110396  uint32_t cnak : 1; /* Clear NAK */
110397  uint32_t snak : 1; /* Set NAK */
110398  uint32_t setd0pid : 1; /* Set DATA0 PID */
110399  uint32_t setd1pid : 1; /* Set DATA1 PID */
110400  const uint32_t epdis : 1; /* Endpoint Disable */
110401  const uint32_t epena : 1; /* Endpoint Enable */
110402 };
110403 
110404 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL14. */
110405 typedef volatile struct ALT_USB_DEV_DOEPCTL14_s ALT_USB_DEV_DOEPCTL14_t;
110406 #endif /* __ASSEMBLY__ */
110407 
110408 /* The byte offset of the ALT_USB_DEV_DOEPCTL14 register from the beginning of the component. */
110409 #define ALT_USB_DEV_DOEPCTL14_OFST 0x4c0
110410 /* The address of the ALT_USB_DEV_DOEPCTL14 register. */
110411 #define ALT_USB_DEV_DOEPCTL14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL14_OFST))
110412 
110413 /*
110414  * Register : Device OUT Endpoint 14 Interrupt Register - doepint14
110415  *
110416  * This register indicates the status of an endpoint with respect to USB- and AHB-
110417  * related events. The application must read this register when the OUT Endpoints
110418  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
110419  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
110420  * can read this register, it must first read the Device All Endpoints Interrupt
110421  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
110422  * Interrupt register. The application must clear the appropriate bit in this
110423  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
110424  *
110425  * Register Layout
110426  *
110427  * Bits | Access | Reset | Description
110428  * :--------|:-------|:------|:------------------------------------------
110429  * [0] | R | 0x0 | Transfer Completed Interrupt
110430  * [1] | R | 0x0 | Endpoint Disabled Interrupt
110431  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT14_AHBERR
110432  * [3] | R | 0x0 | SETUP Phase Done
110433  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
110434  * [5] | R | 0x0 | Status Phase Received for Control Write
110435  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
110436  * [7] | ??? | 0x0 | *UNDEFINED*
110437  * [8] | R | 0x0 | OUT Packet Error
110438  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
110439  * [10] | ??? | 0x0 | *UNDEFINED*
110440  * [11] | R | 0x0 | Packet Drop Status
110441  * [12] | R | 0x0 | BbleErr Interrupt
110442  * [13] | R | 0x0 | NAK Interrupt
110443  * [14] | R | 0x0 | NYET Interrupt
110444  * [31:15] | ??? | 0x0 | *UNDEFINED*
110445  *
110446  */
110447 /*
110448  * Field : Transfer Completed Interrupt - xfercompl
110449  *
110450  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
110451  *
110452  * This field indicates that the requested data from the internal FIFO is moved to
110453  * external system memory. This interrupt is generated only when the corresponding
110454  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
110455  * is Set.
110456  *
110457  * When Scatter/Gather DMA mode is disabled, this field indicates that the
110458  * programmed transfer is complete on the AHB as well as on the USB, for this
110459  * endpoint.
110460  *
110461  * Field Enumeration Values:
110462  *
110463  * Enum | Value | Description
110464  * :----------------------------------------|:------|:-----------------------------
110465  * ALT_USB_DEV_DOEPINT14_XFERCOMPL_E_INACT | 0x0 | No Interrupt
110466  * ALT_USB_DEV_DOEPINT14_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
110467  *
110468  * Field Access Macros:
110469  *
110470  */
110471 /*
110472  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_XFERCOMPL
110473  *
110474  * No Interrupt
110475  */
110476 #define ALT_USB_DEV_DOEPINT14_XFERCOMPL_E_INACT 0x0
110477 /*
110478  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_XFERCOMPL
110479  *
110480  * Transfer Completed Interrupt
110481  */
110482 #define ALT_USB_DEV_DOEPINT14_XFERCOMPL_E_ACT 0x1
110483 
110484 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_XFERCOMPL register field. */
110485 #define ALT_USB_DEV_DOEPINT14_XFERCOMPL_LSB 0
110486 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_XFERCOMPL register field. */
110487 #define ALT_USB_DEV_DOEPINT14_XFERCOMPL_MSB 0
110488 /* The width in bits of the ALT_USB_DEV_DOEPINT14_XFERCOMPL register field. */
110489 #define ALT_USB_DEV_DOEPINT14_XFERCOMPL_WIDTH 1
110490 /* The mask used to set the ALT_USB_DEV_DOEPINT14_XFERCOMPL register field value. */
110491 #define ALT_USB_DEV_DOEPINT14_XFERCOMPL_SET_MSK 0x00000001
110492 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_XFERCOMPL register field value. */
110493 #define ALT_USB_DEV_DOEPINT14_XFERCOMPL_CLR_MSK 0xfffffffe
110494 /* The reset value of the ALT_USB_DEV_DOEPINT14_XFERCOMPL register field. */
110495 #define ALT_USB_DEV_DOEPINT14_XFERCOMPL_RESET 0x0
110496 /* Extracts the ALT_USB_DEV_DOEPINT14_XFERCOMPL field value from a register. */
110497 #define ALT_USB_DEV_DOEPINT14_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
110498 /* Produces a ALT_USB_DEV_DOEPINT14_XFERCOMPL register field value suitable for setting the register. */
110499 #define ALT_USB_DEV_DOEPINT14_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
110500 
110501 /*
110502  * Field : Endpoint Disabled Interrupt - epdisbld
110503  *
110504  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
110505  * disabled per the application's request.
110506  *
110507  * Field Enumeration Values:
110508  *
110509  * Enum | Value | Description
110510  * :---------------------------------------|:------|:----------------------------
110511  * ALT_USB_DEV_DOEPINT14_EPDISBLD_E_INACT | 0x0 | No Interrupt
110512  * ALT_USB_DEV_DOEPINT14_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
110513  *
110514  * Field Access Macros:
110515  *
110516  */
110517 /*
110518  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_EPDISBLD
110519  *
110520  * No Interrupt
110521  */
110522 #define ALT_USB_DEV_DOEPINT14_EPDISBLD_E_INACT 0x0
110523 /*
110524  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_EPDISBLD
110525  *
110526  * Endpoint Disabled Interrupt
110527  */
110528 #define ALT_USB_DEV_DOEPINT14_EPDISBLD_E_ACT 0x1
110529 
110530 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_EPDISBLD register field. */
110531 #define ALT_USB_DEV_DOEPINT14_EPDISBLD_LSB 1
110532 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_EPDISBLD register field. */
110533 #define ALT_USB_DEV_DOEPINT14_EPDISBLD_MSB 1
110534 /* The width in bits of the ALT_USB_DEV_DOEPINT14_EPDISBLD register field. */
110535 #define ALT_USB_DEV_DOEPINT14_EPDISBLD_WIDTH 1
110536 /* The mask used to set the ALT_USB_DEV_DOEPINT14_EPDISBLD register field value. */
110537 #define ALT_USB_DEV_DOEPINT14_EPDISBLD_SET_MSK 0x00000002
110538 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_EPDISBLD register field value. */
110539 #define ALT_USB_DEV_DOEPINT14_EPDISBLD_CLR_MSK 0xfffffffd
110540 /* The reset value of the ALT_USB_DEV_DOEPINT14_EPDISBLD register field. */
110541 #define ALT_USB_DEV_DOEPINT14_EPDISBLD_RESET 0x0
110542 /* Extracts the ALT_USB_DEV_DOEPINT14_EPDISBLD field value from a register. */
110543 #define ALT_USB_DEV_DOEPINT14_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
110544 /* Produces a ALT_USB_DEV_DOEPINT14_EPDISBLD register field value suitable for setting the register. */
110545 #define ALT_USB_DEV_DOEPINT14_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
110546 
110547 /*
110548  * Field : ahberr
110549  *
110550  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
110551  * there is an AHB error during an AHB read/write. The application can read the
110552  * corresponding endpoint DMA address register to get the error address.
110553  *
110554  * Field Enumeration Values:
110555  *
110556  * Enum | Value | Description
110557  * :-------------------------------------|:------|:--------------------
110558  * ALT_USB_DEV_DOEPINT14_AHBERR_E_INACT | 0x0 | No Interrupt
110559  * ALT_USB_DEV_DOEPINT14_AHBERR_E_ACT | 0x1 | AHB Error interrupt
110560  *
110561  * Field Access Macros:
110562  *
110563  */
110564 /*
110565  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_AHBERR
110566  *
110567  * No Interrupt
110568  */
110569 #define ALT_USB_DEV_DOEPINT14_AHBERR_E_INACT 0x0
110570 /*
110571  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_AHBERR
110572  *
110573  * AHB Error interrupt
110574  */
110575 #define ALT_USB_DEV_DOEPINT14_AHBERR_E_ACT 0x1
110576 
110577 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_AHBERR register field. */
110578 #define ALT_USB_DEV_DOEPINT14_AHBERR_LSB 2
110579 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_AHBERR register field. */
110580 #define ALT_USB_DEV_DOEPINT14_AHBERR_MSB 2
110581 /* The width in bits of the ALT_USB_DEV_DOEPINT14_AHBERR register field. */
110582 #define ALT_USB_DEV_DOEPINT14_AHBERR_WIDTH 1
110583 /* The mask used to set the ALT_USB_DEV_DOEPINT14_AHBERR register field value. */
110584 #define ALT_USB_DEV_DOEPINT14_AHBERR_SET_MSK 0x00000004
110585 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_AHBERR register field value. */
110586 #define ALT_USB_DEV_DOEPINT14_AHBERR_CLR_MSK 0xfffffffb
110587 /* The reset value of the ALT_USB_DEV_DOEPINT14_AHBERR register field. */
110588 #define ALT_USB_DEV_DOEPINT14_AHBERR_RESET 0x0
110589 /* Extracts the ALT_USB_DEV_DOEPINT14_AHBERR field value from a register. */
110590 #define ALT_USB_DEV_DOEPINT14_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
110591 /* Produces a ALT_USB_DEV_DOEPINT14_AHBERR register field value suitable for setting the register. */
110592 #define ALT_USB_DEV_DOEPINT14_AHBERR_SET(value) (((value) << 2) & 0x00000004)
110593 
110594 /*
110595  * Field : SETUP Phase Done - setup
110596  *
110597  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
110598  * control endpoint is complete and no more back-to-back SETUP packets were
110599  * received for the current control transfer. On this interrupt, the application
110600  * can decode the received SETUP data packet.
110601  *
110602  * Field Enumeration Values:
110603  *
110604  * Enum | Value | Description
110605  * :------------------------------------|:------|:--------------------
110606  * ALT_USB_DEV_DOEPINT14_SETUP_E_INACT | 0x0 | No SETUP Phase Done
110607  * ALT_USB_DEV_DOEPINT14_SETUP_E_ACT | 0x1 | SETUP Phase Done
110608  *
110609  * Field Access Macros:
110610  *
110611  */
110612 /*
110613  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_SETUP
110614  *
110615  * No SETUP Phase Done
110616  */
110617 #define ALT_USB_DEV_DOEPINT14_SETUP_E_INACT 0x0
110618 /*
110619  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_SETUP
110620  *
110621  * SETUP Phase Done
110622  */
110623 #define ALT_USB_DEV_DOEPINT14_SETUP_E_ACT 0x1
110624 
110625 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_SETUP register field. */
110626 #define ALT_USB_DEV_DOEPINT14_SETUP_LSB 3
110627 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_SETUP register field. */
110628 #define ALT_USB_DEV_DOEPINT14_SETUP_MSB 3
110629 /* The width in bits of the ALT_USB_DEV_DOEPINT14_SETUP register field. */
110630 #define ALT_USB_DEV_DOEPINT14_SETUP_WIDTH 1
110631 /* The mask used to set the ALT_USB_DEV_DOEPINT14_SETUP register field value. */
110632 #define ALT_USB_DEV_DOEPINT14_SETUP_SET_MSK 0x00000008
110633 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_SETUP register field value. */
110634 #define ALT_USB_DEV_DOEPINT14_SETUP_CLR_MSK 0xfffffff7
110635 /* The reset value of the ALT_USB_DEV_DOEPINT14_SETUP register field. */
110636 #define ALT_USB_DEV_DOEPINT14_SETUP_RESET 0x0
110637 /* Extracts the ALT_USB_DEV_DOEPINT14_SETUP field value from a register. */
110638 #define ALT_USB_DEV_DOEPINT14_SETUP_GET(value) (((value) & 0x00000008) >> 3)
110639 /* Produces a ALT_USB_DEV_DOEPINT14_SETUP register field value suitable for setting the register. */
110640 #define ALT_USB_DEV_DOEPINT14_SETUP_SET(value) (((value) << 3) & 0x00000008)
110641 
110642 /*
110643  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
110644  *
110645  * Applies only to control OUT endpoints. Indicates that an OUT token was received
110646  * when the endpoint was not yet enabled. This interrupt is asserted on the
110647  * endpoint for which the OUT token was received.
110648  *
110649  * Field Enumeration Values:
110650  *
110651  * Enum | Value | Description
110652  * :------------------------------------------|:------|:---------------------------------------------
110653  * ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
110654  * ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
110655  *
110656  * Field Access Macros:
110657  *
110658  */
110659 /*
110660  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS
110661  *
110662  * No OUT Token Received When Endpoint Disabled
110663  */
110664 #define ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS_E_INACT 0x0
110665 /*
110666  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS
110667  *
110668  * OUT Token Received When Endpoint Disabled
110669  */
110670 #define ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS_E_ACT 0x1
110671 
110672 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS register field. */
110673 #define ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS_LSB 4
110674 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS register field. */
110675 #define ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS_MSB 4
110676 /* The width in bits of the ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS register field. */
110677 #define ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS_WIDTH 1
110678 /* The mask used to set the ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS register field value. */
110679 #define ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS_SET_MSK 0x00000010
110680 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS register field value. */
110681 #define ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS_CLR_MSK 0xffffffef
110682 /* The reset value of the ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS register field. */
110683 #define ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS_RESET 0x0
110684 /* Extracts the ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS field value from a register. */
110685 #define ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
110686 /* Produces a ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS register field value suitable for setting the register. */
110687 #define ALT_USB_DEV_DOEPINT14_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
110688 
110689 /*
110690  * Field : Status Phase Received for Control Write - stsphsercvd
110691  *
110692  * This interrupt is valid only for Control OUT endpoints and only in Scatter
110693  * Gather DMA mode. This interrupt is generated only after the core has transferred
110694  * all the data that the host has sent during the data phase of a control write
110695  * transfer, to the system memory buffer. The interrupt indicates to the
110696  * application that the host has switched from data phase to the status phase of a
110697  * Control Write transfer. The application can use this interrupt to ACK or STALL
110698  * the Status phase, after it has decoded the data phase. This is applicable only
110699  * in Case of Scatter Gather DMA mode.
110700  *
110701  * Field Enumeration Values:
110702  *
110703  * Enum | Value | Description
110704  * :------------------------------------------|:------|:-------------------------------------------
110705  * ALT_USB_DEV_DOEPINT14_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
110706  * ALT_USB_DEV_DOEPINT14_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
110707  *
110708  * Field Access Macros:
110709  *
110710  */
110711 /*
110712  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_STSPHSERCVD
110713  *
110714  * No Status Phase Received for Control Write
110715  */
110716 #define ALT_USB_DEV_DOEPINT14_STSPHSERCVD_E_INACT 0x0
110717 /*
110718  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_STSPHSERCVD
110719  *
110720  * Status Phase Received for Control Write
110721  */
110722 #define ALT_USB_DEV_DOEPINT14_STSPHSERCVD_E_ACT 0x1
110723 
110724 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_STSPHSERCVD register field. */
110725 #define ALT_USB_DEV_DOEPINT14_STSPHSERCVD_LSB 5
110726 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_STSPHSERCVD register field. */
110727 #define ALT_USB_DEV_DOEPINT14_STSPHSERCVD_MSB 5
110728 /* The width in bits of the ALT_USB_DEV_DOEPINT14_STSPHSERCVD register field. */
110729 #define ALT_USB_DEV_DOEPINT14_STSPHSERCVD_WIDTH 1
110730 /* The mask used to set the ALT_USB_DEV_DOEPINT14_STSPHSERCVD register field value. */
110731 #define ALT_USB_DEV_DOEPINT14_STSPHSERCVD_SET_MSK 0x00000020
110732 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_STSPHSERCVD register field value. */
110733 #define ALT_USB_DEV_DOEPINT14_STSPHSERCVD_CLR_MSK 0xffffffdf
110734 /* The reset value of the ALT_USB_DEV_DOEPINT14_STSPHSERCVD register field. */
110735 #define ALT_USB_DEV_DOEPINT14_STSPHSERCVD_RESET 0x0
110736 /* Extracts the ALT_USB_DEV_DOEPINT14_STSPHSERCVD field value from a register. */
110737 #define ALT_USB_DEV_DOEPINT14_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
110738 /* Produces a ALT_USB_DEV_DOEPINT14_STSPHSERCVD register field value suitable for setting the register. */
110739 #define ALT_USB_DEV_DOEPINT14_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
110740 
110741 /*
110742  * Field : Back-to-Back SETUP Packets Received - back2backsetup
110743  *
110744  * Applies to Control OUT endpoints only. This bit indicates that the core has
110745  * received more than three back-to-back SETUP packets for this particular
110746  * endpoint. for information about handling this interrupt,
110747  *
110748  * Field Enumeration Values:
110749  *
110750  * Enum | Value | Description
110751  * :---------------------------------------------|:------|:---------------------------------------
110752  * ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
110753  * ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
110754  *
110755  * Field Access Macros:
110756  *
110757  */
110758 /*
110759  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP
110760  *
110761  * No Back-to-Back SETUP Packets Received
110762  */
110763 #define ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP_E_INACT 0x0
110764 /*
110765  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP
110766  *
110767  * Back-to-Back SETUP Packets Received
110768  */
110769 #define ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP_E_ACT 0x1
110770 
110771 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP register field. */
110772 #define ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP_LSB 6
110773 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP register field. */
110774 #define ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP_MSB 6
110775 /* The width in bits of the ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP register field. */
110776 #define ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP_WIDTH 1
110777 /* The mask used to set the ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP register field value. */
110778 #define ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP_SET_MSK 0x00000040
110779 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP register field value. */
110780 #define ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP_CLR_MSK 0xffffffbf
110781 /* The reset value of the ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP register field. */
110782 #define ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP_RESET 0x0
110783 /* Extracts the ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP field value from a register. */
110784 #define ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
110785 /* Produces a ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP register field value suitable for setting the register. */
110786 #define ALT_USB_DEV_DOEPINT14_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
110787 
110788 /*
110789  * Field : OUT Packet Error - outpkterr
110790  *
110791  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
110792  * an overflow or a CRC error for non-Isochronous OUT packet.
110793  *
110794  * Field Enumeration Values:
110795  *
110796  * Enum | Value | Description
110797  * :----------------------------------------|:------|:--------------------
110798  * ALT_USB_DEV_DOEPINT14_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
110799  * ALT_USB_DEV_DOEPINT14_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
110800  *
110801  * Field Access Macros:
110802  *
110803  */
110804 /*
110805  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_OUTPKTERR
110806  *
110807  * No OUT Packet Error
110808  */
110809 #define ALT_USB_DEV_DOEPINT14_OUTPKTERR_E_INACT 0x0
110810 /*
110811  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_OUTPKTERR
110812  *
110813  * OUT Packet Error
110814  */
110815 #define ALT_USB_DEV_DOEPINT14_OUTPKTERR_E_ACT 0x1
110816 
110817 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_OUTPKTERR register field. */
110818 #define ALT_USB_DEV_DOEPINT14_OUTPKTERR_LSB 8
110819 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_OUTPKTERR register field. */
110820 #define ALT_USB_DEV_DOEPINT14_OUTPKTERR_MSB 8
110821 /* The width in bits of the ALT_USB_DEV_DOEPINT14_OUTPKTERR register field. */
110822 #define ALT_USB_DEV_DOEPINT14_OUTPKTERR_WIDTH 1
110823 /* The mask used to set the ALT_USB_DEV_DOEPINT14_OUTPKTERR register field value. */
110824 #define ALT_USB_DEV_DOEPINT14_OUTPKTERR_SET_MSK 0x00000100
110825 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_OUTPKTERR register field value. */
110826 #define ALT_USB_DEV_DOEPINT14_OUTPKTERR_CLR_MSK 0xfffffeff
110827 /* The reset value of the ALT_USB_DEV_DOEPINT14_OUTPKTERR register field. */
110828 #define ALT_USB_DEV_DOEPINT14_OUTPKTERR_RESET 0x0
110829 /* Extracts the ALT_USB_DEV_DOEPINT14_OUTPKTERR field value from a register. */
110830 #define ALT_USB_DEV_DOEPINT14_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
110831 /* Produces a ALT_USB_DEV_DOEPINT14_OUTPKTERR register field value suitable for setting the register. */
110832 #define ALT_USB_DEV_DOEPINT14_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
110833 
110834 /*
110835  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
110836  *
110837  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
110838  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
110839  * the descriptor accessed is not ready for the Core to process, such as Host busy
110840  * or DMA done
110841  *
110842  * Field Enumeration Values:
110843  *
110844  * Enum | Value | Description
110845  * :--------------------------------------|:------|:--------------
110846  * ALT_USB_DEV_DOEPINT14_BNAINTR_E_INACT | 0x0 | No interrupt
110847  * ALT_USB_DEV_DOEPINT14_BNAINTR_E_ACT | 0x1 | BNA interrupt
110848  *
110849  * Field Access Macros:
110850  *
110851  */
110852 /*
110853  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_BNAINTR
110854  *
110855  * No interrupt
110856  */
110857 #define ALT_USB_DEV_DOEPINT14_BNAINTR_E_INACT 0x0
110858 /*
110859  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_BNAINTR
110860  *
110861  * BNA interrupt
110862  */
110863 #define ALT_USB_DEV_DOEPINT14_BNAINTR_E_ACT 0x1
110864 
110865 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_BNAINTR register field. */
110866 #define ALT_USB_DEV_DOEPINT14_BNAINTR_LSB 9
110867 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_BNAINTR register field. */
110868 #define ALT_USB_DEV_DOEPINT14_BNAINTR_MSB 9
110869 /* The width in bits of the ALT_USB_DEV_DOEPINT14_BNAINTR register field. */
110870 #define ALT_USB_DEV_DOEPINT14_BNAINTR_WIDTH 1
110871 /* The mask used to set the ALT_USB_DEV_DOEPINT14_BNAINTR register field value. */
110872 #define ALT_USB_DEV_DOEPINT14_BNAINTR_SET_MSK 0x00000200
110873 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_BNAINTR register field value. */
110874 #define ALT_USB_DEV_DOEPINT14_BNAINTR_CLR_MSK 0xfffffdff
110875 /* The reset value of the ALT_USB_DEV_DOEPINT14_BNAINTR register field. */
110876 #define ALT_USB_DEV_DOEPINT14_BNAINTR_RESET 0x0
110877 /* Extracts the ALT_USB_DEV_DOEPINT14_BNAINTR field value from a register. */
110878 #define ALT_USB_DEV_DOEPINT14_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
110879 /* Produces a ALT_USB_DEV_DOEPINT14_BNAINTR register field value suitable for setting the register. */
110880 #define ALT_USB_DEV_DOEPINT14_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
110881 
110882 /*
110883  * Field : Packet Drop Status - pktdrpsts
110884  *
110885  * This bit indicates to the application that an ISOC OUT packet has been dropped.
110886  * This bit does not have an associated mask bit and does not generate an
110887  * interrupt.
110888  *
110889  * Field Enumeration Values:
110890  *
110891  * Enum | Value | Description
110892  * :----------------------------------------|:------|:-----------------------------
110893  * ALT_USB_DEV_DOEPINT14_PKTDRPSTS_E_INACT | 0x0 | No interrupt
110894  * ALT_USB_DEV_DOEPINT14_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
110895  *
110896  * Field Access Macros:
110897  *
110898  */
110899 /*
110900  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_PKTDRPSTS
110901  *
110902  * No interrupt
110903  */
110904 #define ALT_USB_DEV_DOEPINT14_PKTDRPSTS_E_INACT 0x0
110905 /*
110906  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_PKTDRPSTS
110907  *
110908  * Packet Drop Status interrupt
110909  */
110910 #define ALT_USB_DEV_DOEPINT14_PKTDRPSTS_E_ACT 0x1
110911 
110912 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_PKTDRPSTS register field. */
110913 #define ALT_USB_DEV_DOEPINT14_PKTDRPSTS_LSB 11
110914 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_PKTDRPSTS register field. */
110915 #define ALT_USB_DEV_DOEPINT14_PKTDRPSTS_MSB 11
110916 /* The width in bits of the ALT_USB_DEV_DOEPINT14_PKTDRPSTS register field. */
110917 #define ALT_USB_DEV_DOEPINT14_PKTDRPSTS_WIDTH 1
110918 /* The mask used to set the ALT_USB_DEV_DOEPINT14_PKTDRPSTS register field value. */
110919 #define ALT_USB_DEV_DOEPINT14_PKTDRPSTS_SET_MSK 0x00000800
110920 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_PKTDRPSTS register field value. */
110921 #define ALT_USB_DEV_DOEPINT14_PKTDRPSTS_CLR_MSK 0xfffff7ff
110922 /* The reset value of the ALT_USB_DEV_DOEPINT14_PKTDRPSTS register field. */
110923 #define ALT_USB_DEV_DOEPINT14_PKTDRPSTS_RESET 0x0
110924 /* Extracts the ALT_USB_DEV_DOEPINT14_PKTDRPSTS field value from a register. */
110925 #define ALT_USB_DEV_DOEPINT14_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
110926 /* Produces a ALT_USB_DEV_DOEPINT14_PKTDRPSTS register field value suitable for setting the register. */
110927 #define ALT_USB_DEV_DOEPINT14_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
110928 
110929 /*
110930  * Field : BbleErr Interrupt - bbleerr
110931  *
110932  * The core generates this interrupt when babble is received for the endpoint.
110933  *
110934  * Field Enumeration Values:
110935  *
110936  * Enum | Value | Description
110937  * :--------------------------------------|:------|:------------------
110938  * ALT_USB_DEV_DOEPINT14_BBLEERR_E_INACT | 0x0 | No interrupt
110939  * ALT_USB_DEV_DOEPINT14_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
110940  *
110941  * Field Access Macros:
110942  *
110943  */
110944 /*
110945  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_BBLEERR
110946  *
110947  * No interrupt
110948  */
110949 #define ALT_USB_DEV_DOEPINT14_BBLEERR_E_INACT 0x0
110950 /*
110951  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_BBLEERR
110952  *
110953  * BbleErr interrupt
110954  */
110955 #define ALT_USB_DEV_DOEPINT14_BBLEERR_E_ACT 0x1
110956 
110957 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_BBLEERR register field. */
110958 #define ALT_USB_DEV_DOEPINT14_BBLEERR_LSB 12
110959 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_BBLEERR register field. */
110960 #define ALT_USB_DEV_DOEPINT14_BBLEERR_MSB 12
110961 /* The width in bits of the ALT_USB_DEV_DOEPINT14_BBLEERR register field. */
110962 #define ALT_USB_DEV_DOEPINT14_BBLEERR_WIDTH 1
110963 /* The mask used to set the ALT_USB_DEV_DOEPINT14_BBLEERR register field value. */
110964 #define ALT_USB_DEV_DOEPINT14_BBLEERR_SET_MSK 0x00001000
110965 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_BBLEERR register field value. */
110966 #define ALT_USB_DEV_DOEPINT14_BBLEERR_CLR_MSK 0xffffefff
110967 /* The reset value of the ALT_USB_DEV_DOEPINT14_BBLEERR register field. */
110968 #define ALT_USB_DEV_DOEPINT14_BBLEERR_RESET 0x0
110969 /* Extracts the ALT_USB_DEV_DOEPINT14_BBLEERR field value from a register. */
110970 #define ALT_USB_DEV_DOEPINT14_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
110971 /* Produces a ALT_USB_DEV_DOEPINT14_BBLEERR register field value suitable for setting the register. */
110972 #define ALT_USB_DEV_DOEPINT14_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
110973 
110974 /*
110975  * Field : NAK Interrupt - nakintrpt
110976  *
110977  * The core generates this interrupt when a NAK is transmitted or received by the
110978  * device. In case of isochronous IN endpoints the interrupt gets generated when a
110979  * zero length packet is transmitted due to un-availability of data in the TXFifo.
110980  *
110981  * Field Enumeration Values:
110982  *
110983  * Enum | Value | Description
110984  * :----------------------------------------|:------|:--------------
110985  * ALT_USB_DEV_DOEPINT14_NAKINTRPT_E_INACT | 0x0 | No interrupt
110986  * ALT_USB_DEV_DOEPINT14_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
110987  *
110988  * Field Access Macros:
110989  *
110990  */
110991 /*
110992  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_NAKINTRPT
110993  *
110994  * No interrupt
110995  */
110996 #define ALT_USB_DEV_DOEPINT14_NAKINTRPT_E_INACT 0x0
110997 /*
110998  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_NAKINTRPT
110999  *
111000  * NAK Interrupt
111001  */
111002 #define ALT_USB_DEV_DOEPINT14_NAKINTRPT_E_ACT 0x1
111003 
111004 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_NAKINTRPT register field. */
111005 #define ALT_USB_DEV_DOEPINT14_NAKINTRPT_LSB 13
111006 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_NAKINTRPT register field. */
111007 #define ALT_USB_DEV_DOEPINT14_NAKINTRPT_MSB 13
111008 /* The width in bits of the ALT_USB_DEV_DOEPINT14_NAKINTRPT register field. */
111009 #define ALT_USB_DEV_DOEPINT14_NAKINTRPT_WIDTH 1
111010 /* The mask used to set the ALT_USB_DEV_DOEPINT14_NAKINTRPT register field value. */
111011 #define ALT_USB_DEV_DOEPINT14_NAKINTRPT_SET_MSK 0x00002000
111012 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_NAKINTRPT register field value. */
111013 #define ALT_USB_DEV_DOEPINT14_NAKINTRPT_CLR_MSK 0xffffdfff
111014 /* The reset value of the ALT_USB_DEV_DOEPINT14_NAKINTRPT register field. */
111015 #define ALT_USB_DEV_DOEPINT14_NAKINTRPT_RESET 0x0
111016 /* Extracts the ALT_USB_DEV_DOEPINT14_NAKINTRPT field value from a register. */
111017 #define ALT_USB_DEV_DOEPINT14_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
111018 /* Produces a ALT_USB_DEV_DOEPINT14_NAKINTRPT register field value suitable for setting the register. */
111019 #define ALT_USB_DEV_DOEPINT14_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
111020 
111021 /*
111022  * Field : NYET Interrupt - nyetintrpt
111023  *
111024  * The core generates this interrupt when a NYET response is transmitted for a non
111025  * isochronous OUT endpoint.
111026  *
111027  * Field Enumeration Values:
111028  *
111029  * Enum | Value | Description
111030  * :-----------------------------------------|:------|:---------------
111031  * ALT_USB_DEV_DOEPINT14_NYETINTRPT_E_INACT | 0x0 | No interrupt
111032  * ALT_USB_DEV_DOEPINT14_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
111033  *
111034  * Field Access Macros:
111035  *
111036  */
111037 /*
111038  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_NYETINTRPT
111039  *
111040  * No interrupt
111041  */
111042 #define ALT_USB_DEV_DOEPINT14_NYETINTRPT_E_INACT 0x0
111043 /*
111044  * Enumerated value for register field ALT_USB_DEV_DOEPINT14_NYETINTRPT
111045  *
111046  * NYET Interrupt
111047  */
111048 #define ALT_USB_DEV_DOEPINT14_NYETINTRPT_E_ACT 0x1
111049 
111050 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT14_NYETINTRPT register field. */
111051 #define ALT_USB_DEV_DOEPINT14_NYETINTRPT_LSB 14
111052 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT14_NYETINTRPT register field. */
111053 #define ALT_USB_DEV_DOEPINT14_NYETINTRPT_MSB 14
111054 /* The width in bits of the ALT_USB_DEV_DOEPINT14_NYETINTRPT register field. */
111055 #define ALT_USB_DEV_DOEPINT14_NYETINTRPT_WIDTH 1
111056 /* The mask used to set the ALT_USB_DEV_DOEPINT14_NYETINTRPT register field value. */
111057 #define ALT_USB_DEV_DOEPINT14_NYETINTRPT_SET_MSK 0x00004000
111058 /* The mask used to clear the ALT_USB_DEV_DOEPINT14_NYETINTRPT register field value. */
111059 #define ALT_USB_DEV_DOEPINT14_NYETINTRPT_CLR_MSK 0xffffbfff
111060 /* The reset value of the ALT_USB_DEV_DOEPINT14_NYETINTRPT register field. */
111061 #define ALT_USB_DEV_DOEPINT14_NYETINTRPT_RESET 0x0
111062 /* Extracts the ALT_USB_DEV_DOEPINT14_NYETINTRPT field value from a register. */
111063 #define ALT_USB_DEV_DOEPINT14_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
111064 /* Produces a ALT_USB_DEV_DOEPINT14_NYETINTRPT register field value suitable for setting the register. */
111065 #define ALT_USB_DEV_DOEPINT14_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
111066 
111067 #ifndef __ASSEMBLY__
111068 /*
111069  * WARNING: The C register and register group struct declarations are provided for
111070  * convenience and illustrative purposes. They should, however, be used with
111071  * caution as the C language standard provides no guarantees about the alignment or
111072  * atomicity of device memory accesses. The recommended practice for writing
111073  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
111074  * alt_write_word() functions.
111075  *
111076  * The struct declaration for register ALT_USB_DEV_DOEPINT14.
111077  */
111078 struct ALT_USB_DEV_DOEPINT14_s
111079 {
111080  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
111081  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
111082  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT14_AHBERR */
111083  const uint32_t setup : 1; /* SETUP Phase Done */
111084  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
111085  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
111086  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
111087  uint32_t : 1; /* *UNDEFINED* */
111088  const uint32_t outpkterr : 1; /* OUT Packet Error */
111089  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
111090  uint32_t : 1; /* *UNDEFINED* */
111091  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
111092  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
111093  const uint32_t nakintrpt : 1; /* NAK Interrupt */
111094  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
111095  uint32_t : 17; /* *UNDEFINED* */
111096 };
111097 
111098 /* The typedef declaration for register ALT_USB_DEV_DOEPINT14. */
111099 typedef volatile struct ALT_USB_DEV_DOEPINT14_s ALT_USB_DEV_DOEPINT14_t;
111100 #endif /* __ASSEMBLY__ */
111101 
111102 /* The byte offset of the ALT_USB_DEV_DOEPINT14 register from the beginning of the component. */
111103 #define ALT_USB_DEV_DOEPINT14_OFST 0x4c8
111104 /* The address of the ALT_USB_DEV_DOEPINT14 register. */
111105 #define ALT_USB_DEV_DOEPINT14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT14_OFST))
111106 
111107 /*
111108  * Register : Device OUT Endpoint 14 Transfer Size Register - doeptsiz14
111109  *
111110  * The application must modify this register before enabling the endpoint. Once the
111111  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
111112  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
111113  * application can only read this register once the core has cleared the Endpoint
111114  * Enable bit.
111115  *
111116  * Register Layout
111117  *
111118  * Bits | Access | Reset | Description
111119  * :--------|:-------|:------|:-------------------
111120  * [18:0] | RW | 0x0 | Transfer Size
111121  * [28:19] | RW | 0x0 | Packet Count
111122  * [30:29] | R | 0x0 | SETUP Packet Count
111123  * [31] | ??? | 0x0 | *UNDEFINED*
111124  *
111125  */
111126 /*
111127  * Field : Transfer Size - xfersize
111128  *
111129  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
111130  * application only after it has exhausted the transfer size amount of data. The
111131  * transfer size can be Set to the maximum packet size of the endpoint, to be
111132  * interrupted at the end of each packet. The core decrements this field every time
111133  * a packet from the external memory is written to the RxFIFO.
111134  *
111135  * Field Access Macros:
111136  *
111137  */
111138 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ14_XFERSIZE register field. */
111139 #define ALT_USB_DEV_DOEPTSIZ14_XFERSIZE_LSB 0
111140 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ14_XFERSIZE register field. */
111141 #define ALT_USB_DEV_DOEPTSIZ14_XFERSIZE_MSB 18
111142 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ14_XFERSIZE register field. */
111143 #define ALT_USB_DEV_DOEPTSIZ14_XFERSIZE_WIDTH 19
111144 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ14_XFERSIZE register field value. */
111145 #define ALT_USB_DEV_DOEPTSIZ14_XFERSIZE_SET_MSK 0x0007ffff
111146 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ14_XFERSIZE register field value. */
111147 #define ALT_USB_DEV_DOEPTSIZ14_XFERSIZE_CLR_MSK 0xfff80000
111148 /* The reset value of the ALT_USB_DEV_DOEPTSIZ14_XFERSIZE register field. */
111149 #define ALT_USB_DEV_DOEPTSIZ14_XFERSIZE_RESET 0x0
111150 /* Extracts the ALT_USB_DEV_DOEPTSIZ14_XFERSIZE field value from a register. */
111151 #define ALT_USB_DEV_DOEPTSIZ14_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
111152 /* Produces a ALT_USB_DEV_DOEPTSIZ14_XFERSIZE register field value suitable for setting the register. */
111153 #define ALT_USB_DEV_DOEPTSIZ14_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
111154 
111155 /*
111156  * Field : Packet Count - pktcnt
111157  *
111158  * Indicates the total number of USB packets that constitute the Transfer Size
111159  * amount of data for endpoint 0.This field is decremented every time a packet
111160  * (maximum size or short packet) is read from the RxFIFO.
111161  *
111162  * Field Access Macros:
111163  *
111164  */
111165 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ14_PKTCNT register field. */
111166 #define ALT_USB_DEV_DOEPTSIZ14_PKTCNT_LSB 19
111167 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ14_PKTCNT register field. */
111168 #define ALT_USB_DEV_DOEPTSIZ14_PKTCNT_MSB 28
111169 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ14_PKTCNT register field. */
111170 #define ALT_USB_DEV_DOEPTSIZ14_PKTCNT_WIDTH 10
111171 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ14_PKTCNT register field value. */
111172 #define ALT_USB_DEV_DOEPTSIZ14_PKTCNT_SET_MSK 0x1ff80000
111173 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ14_PKTCNT register field value. */
111174 #define ALT_USB_DEV_DOEPTSIZ14_PKTCNT_CLR_MSK 0xe007ffff
111175 /* The reset value of the ALT_USB_DEV_DOEPTSIZ14_PKTCNT register field. */
111176 #define ALT_USB_DEV_DOEPTSIZ14_PKTCNT_RESET 0x0
111177 /* Extracts the ALT_USB_DEV_DOEPTSIZ14_PKTCNT field value from a register. */
111178 #define ALT_USB_DEV_DOEPTSIZ14_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
111179 /* Produces a ALT_USB_DEV_DOEPTSIZ14_PKTCNT register field value suitable for setting the register. */
111180 #define ALT_USB_DEV_DOEPTSIZ14_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
111181 
111182 /*
111183  * Field : SETUP Packet Count - rxdpid
111184  *
111185  * Applies to isochronous OUT endpoints only.This is the data PID received in the
111186  * last packet for this endpoint. Use datax.
111187  *
111188  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
111189  * number of back-to-back SETUP data packets the endpoint can receive.
111190  *
111191  * Field Enumeration Values:
111192  *
111193  * Enum | Value | Description
111194  * :------------------------------------------|:------|:-------------------
111195  * ALT_USB_DEV_DOEPTSIZ14_RXDPID_E_DATA0 | 0x0 | DATA0
111196  * ALT_USB_DEV_DOEPTSIZ14_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
111197  * ALT_USB_DEV_DOEPTSIZ14_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
111198  * ALT_USB_DEV_DOEPTSIZ14_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
111199  *
111200  * Field Access Macros:
111201  *
111202  */
111203 /*
111204  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ14_RXDPID
111205  *
111206  * DATA0
111207  */
111208 #define ALT_USB_DEV_DOEPTSIZ14_RXDPID_E_DATA0 0x0
111209 /*
111210  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ14_RXDPID
111211  *
111212  * DATA2 or 1 packet
111213  */
111214 #define ALT_USB_DEV_DOEPTSIZ14_RXDPID_E_DATA2PKT1 0x1
111215 /*
111216  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ14_RXDPID
111217  *
111218  * DATA1 or 2 packets
111219  */
111220 #define ALT_USB_DEV_DOEPTSIZ14_RXDPID_E_DATA1PKT2 0x2
111221 /*
111222  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ14_RXDPID
111223  *
111224  * MDATA or 3 packets
111225  */
111226 #define ALT_USB_DEV_DOEPTSIZ14_RXDPID_E_MDATAPKT3 0x3
111227 
111228 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ14_RXDPID register field. */
111229 #define ALT_USB_DEV_DOEPTSIZ14_RXDPID_LSB 29
111230 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ14_RXDPID register field. */
111231 #define ALT_USB_DEV_DOEPTSIZ14_RXDPID_MSB 30
111232 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ14_RXDPID register field. */
111233 #define ALT_USB_DEV_DOEPTSIZ14_RXDPID_WIDTH 2
111234 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ14_RXDPID register field value. */
111235 #define ALT_USB_DEV_DOEPTSIZ14_RXDPID_SET_MSK 0x60000000
111236 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ14_RXDPID register field value. */
111237 #define ALT_USB_DEV_DOEPTSIZ14_RXDPID_CLR_MSK 0x9fffffff
111238 /* The reset value of the ALT_USB_DEV_DOEPTSIZ14_RXDPID register field. */
111239 #define ALT_USB_DEV_DOEPTSIZ14_RXDPID_RESET 0x0
111240 /* Extracts the ALT_USB_DEV_DOEPTSIZ14_RXDPID field value from a register. */
111241 #define ALT_USB_DEV_DOEPTSIZ14_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
111242 /* Produces a ALT_USB_DEV_DOEPTSIZ14_RXDPID register field value suitable for setting the register. */
111243 #define ALT_USB_DEV_DOEPTSIZ14_RXDPID_SET(value) (((value) << 29) & 0x60000000)
111244 
111245 #ifndef __ASSEMBLY__
111246 /*
111247  * WARNING: The C register and register group struct declarations are provided for
111248  * convenience and illustrative purposes. They should, however, be used with
111249  * caution as the C language standard provides no guarantees about the alignment or
111250  * atomicity of device memory accesses. The recommended practice for writing
111251  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
111252  * alt_write_word() functions.
111253  *
111254  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ14.
111255  */
111256 struct ALT_USB_DEV_DOEPTSIZ14_s
111257 {
111258  uint32_t xfersize : 19; /* Transfer Size */
111259  uint32_t pktcnt : 10; /* Packet Count */
111260  const uint32_t rxdpid : 2; /* SETUP Packet Count */
111261  uint32_t : 1; /* *UNDEFINED* */
111262 };
111263 
111264 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ14. */
111265 typedef volatile struct ALT_USB_DEV_DOEPTSIZ14_s ALT_USB_DEV_DOEPTSIZ14_t;
111266 #endif /* __ASSEMBLY__ */
111267 
111268 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ14 register from the beginning of the component. */
111269 #define ALT_USB_DEV_DOEPTSIZ14_OFST 0x4d0
111270 /* The address of the ALT_USB_DEV_DOEPTSIZ14 register. */
111271 #define ALT_USB_DEV_DOEPTSIZ14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ14_OFST))
111272 
111273 /*
111274  * Register : Device OUT Endpoint 14 DMA Address Register - doepdma14
111275  *
111276  * DMA OUT Address.
111277  *
111278  * Register Layout
111279  *
111280  * Bits | Access | Reset | Description
111281  * :-------|:-------|:--------|:------------
111282  * [31:0] | RW | Unknown | DMA Address
111283  *
111284  */
111285 /*
111286  * Field : DMA Address - doepdma14
111287  *
111288  * Holds the start address of the external memory for storing or fetching endpoint
111289  * data. for control endpoints, this field stores control OUT data packets as well
111290  * as SETUP transaction data packets. When more than three SETUP packets are
111291  * received back-to-back, the SETUP data packet in the memory is overwritten. This
111292  * register is incremented on every AHB transaction. The application can give only
111293  * a DWORD-aligned address.
111294  *
111295  * When Scatter/Gather DMA mode is not enabled, the application programs the start
111296  * address value in this field.
111297  *
111298  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
111299  * for the descriptor list.
111300  *
111301  * Field Access Macros:
111302  *
111303  */
111304 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA14_DOEPDMA14 register field. */
111305 #define ALT_USB_DEV_DOEPDMA14_DOEPDMA14_LSB 0
111306 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA14_DOEPDMA14 register field. */
111307 #define ALT_USB_DEV_DOEPDMA14_DOEPDMA14_MSB 31
111308 /* The width in bits of the ALT_USB_DEV_DOEPDMA14_DOEPDMA14 register field. */
111309 #define ALT_USB_DEV_DOEPDMA14_DOEPDMA14_WIDTH 32
111310 /* The mask used to set the ALT_USB_DEV_DOEPDMA14_DOEPDMA14 register field value. */
111311 #define ALT_USB_DEV_DOEPDMA14_DOEPDMA14_SET_MSK 0xffffffff
111312 /* The mask used to clear the ALT_USB_DEV_DOEPDMA14_DOEPDMA14 register field value. */
111313 #define ALT_USB_DEV_DOEPDMA14_DOEPDMA14_CLR_MSK 0x00000000
111314 /* The reset value of the ALT_USB_DEV_DOEPDMA14_DOEPDMA14 register field is UNKNOWN. */
111315 #define ALT_USB_DEV_DOEPDMA14_DOEPDMA14_RESET 0x0
111316 /* Extracts the ALT_USB_DEV_DOEPDMA14_DOEPDMA14 field value from a register. */
111317 #define ALT_USB_DEV_DOEPDMA14_DOEPDMA14_GET(value) (((value) & 0xffffffff) >> 0)
111318 /* Produces a ALT_USB_DEV_DOEPDMA14_DOEPDMA14 register field value suitable for setting the register. */
111319 #define ALT_USB_DEV_DOEPDMA14_DOEPDMA14_SET(value) (((value) << 0) & 0xffffffff)
111320 
111321 #ifndef __ASSEMBLY__
111322 /*
111323  * WARNING: The C register and register group struct declarations are provided for
111324  * convenience and illustrative purposes. They should, however, be used with
111325  * caution as the C language standard provides no guarantees about the alignment or
111326  * atomicity of device memory accesses. The recommended practice for writing
111327  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
111328  * alt_write_word() functions.
111329  *
111330  * The struct declaration for register ALT_USB_DEV_DOEPDMA14.
111331  */
111332 struct ALT_USB_DEV_DOEPDMA14_s
111333 {
111334  uint32_t doepdma14 : 32; /* DMA Address */
111335 };
111336 
111337 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA14. */
111338 typedef volatile struct ALT_USB_DEV_DOEPDMA14_s ALT_USB_DEV_DOEPDMA14_t;
111339 #endif /* __ASSEMBLY__ */
111340 
111341 /* The byte offset of the ALT_USB_DEV_DOEPDMA14 register from the beginning of the component. */
111342 #define ALT_USB_DEV_DOEPDMA14_OFST 0x4d4
111343 /* The address of the ALT_USB_DEV_DOEPDMA14 register. */
111344 #define ALT_USB_DEV_DOEPDMA14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA14_OFST))
111345 
111346 /*
111347  * Register : Device OUT Endpoint 14 DMA Buffer Address Register - doepdmab14
111348  *
111349  * DMA Buffer Address.
111350  *
111351  * Register Layout
111352  *
111353  * Bits | Access | Reset | Description
111354  * :-------|:-------|:--------|:-------------------
111355  * [31:0] | R | Unknown | DMA Buffer Address
111356  *
111357  */
111358 /*
111359  * Field : DMA Buffer Address - doepdmab14
111360  *
111361  * Holds the current buffer address. This register is updated as and when the data
111362  * transfer for the corresponding end point is in progress. This register is
111363  * present only in Scatter/Gather DMA mode.
111364  *
111365  * Field Access Macros:
111366  *
111367  */
111368 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14 register field. */
111369 #define ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14_LSB 0
111370 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14 register field. */
111371 #define ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14_MSB 31
111372 /* The width in bits of the ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14 register field. */
111373 #define ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14_WIDTH 32
111374 /* The mask used to set the ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14 register field value. */
111375 #define ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14_SET_MSK 0xffffffff
111376 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14 register field value. */
111377 #define ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14_CLR_MSK 0x00000000
111378 /* The reset value of the ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14 register field is UNKNOWN. */
111379 #define ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14_RESET 0x0
111380 /* Extracts the ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14 field value from a register. */
111381 #define ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14_GET(value) (((value) & 0xffffffff) >> 0)
111382 /* Produces a ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14 register field value suitable for setting the register. */
111383 #define ALT_USB_DEV_DOEPDMAB14_DOEPDMAB14_SET(value) (((value) << 0) & 0xffffffff)
111384 
111385 #ifndef __ASSEMBLY__
111386 /*
111387  * WARNING: The C register and register group struct declarations are provided for
111388  * convenience and illustrative purposes. They should, however, be used with
111389  * caution as the C language standard provides no guarantees about the alignment or
111390  * atomicity of device memory accesses. The recommended practice for writing
111391  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
111392  * alt_write_word() functions.
111393  *
111394  * The struct declaration for register ALT_USB_DEV_DOEPDMAB14.
111395  */
111396 struct ALT_USB_DEV_DOEPDMAB14_s
111397 {
111398  const uint32_t doepdmab14 : 32; /* DMA Buffer Address */
111399 };
111400 
111401 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB14. */
111402 typedef volatile struct ALT_USB_DEV_DOEPDMAB14_s ALT_USB_DEV_DOEPDMAB14_t;
111403 #endif /* __ASSEMBLY__ */
111404 
111405 /* The byte offset of the ALT_USB_DEV_DOEPDMAB14 register from the beginning of the component. */
111406 #define ALT_USB_DEV_DOEPDMAB14_OFST 0x4dc
111407 /* The address of the ALT_USB_DEV_DOEPDMAB14 register. */
111408 #define ALT_USB_DEV_DOEPDMAB14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB14_OFST))
111409 
111410 /*
111411  * Register : Device Control OUT Endpoint 15 Control Register - doepctl15
111412  *
111413  * Out Endpoint 15.
111414  *
111415  * Register Layout
111416  *
111417  * Bits | Access | Reset | Description
111418  * :--------|:-------|:------|:--------------------
111419  * [10:0] | RW | 0x0 | Maximum Packet Size
111420  * [14:11] | ??? | 0x0 | *UNDEFINED*
111421  * [15] | RW | 0x0 | USB Active Endpoint
111422  * [16] | R | 0x0 | Endpoint Data PID
111423  * [17] | R | 0x0 | NAK Status
111424  * [19:18] | RW | 0x0 | Endpoint Type
111425  * [20] | RW | 0x0 | Snoop Mode
111426  * [21] | R | 0x0 | STALL Handshake
111427  * [25:22] | ??? | 0x0 | *UNDEFINED*
111428  * [26] | W | 0x0 | Clear NAK
111429  * [27] | W | 0x0 | Set NAK
111430  * [28] | W | 0x0 | Set DATA0 PID
111431  * [29] | W | 0x0 | Set DATA1 PID
111432  * [30] | R | 0x0 | Endpoint Disable
111433  * [31] | R | 0x0 | Endpoint Enable
111434  *
111435  */
111436 /*
111437  * Field : Maximum Packet Size - mps
111438  *
111439  * Applies to IN and OUT endpoints. The application must program this field with
111440  * the maximum packet size for the current logical endpoint. This value is in
111441  * bytes.
111442  *
111443  * Field Access Macros:
111444  *
111445  */
111446 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_MPS register field. */
111447 #define ALT_USB_DEV_DOEPCTL15_MPS_LSB 0
111448 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_MPS register field. */
111449 #define ALT_USB_DEV_DOEPCTL15_MPS_MSB 10
111450 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_MPS register field. */
111451 #define ALT_USB_DEV_DOEPCTL15_MPS_WIDTH 11
111452 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_MPS register field value. */
111453 #define ALT_USB_DEV_DOEPCTL15_MPS_SET_MSK 0x000007ff
111454 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_MPS register field value. */
111455 #define ALT_USB_DEV_DOEPCTL15_MPS_CLR_MSK 0xfffff800
111456 /* The reset value of the ALT_USB_DEV_DOEPCTL15_MPS register field. */
111457 #define ALT_USB_DEV_DOEPCTL15_MPS_RESET 0x0
111458 /* Extracts the ALT_USB_DEV_DOEPCTL15_MPS field value from a register. */
111459 #define ALT_USB_DEV_DOEPCTL15_MPS_GET(value) (((value) & 0x000007ff) >> 0)
111460 /* Produces a ALT_USB_DEV_DOEPCTL15_MPS register field value suitable for setting the register. */
111461 #define ALT_USB_DEV_DOEPCTL15_MPS_SET(value) (((value) << 0) & 0x000007ff)
111462 
111463 /*
111464  * Field : USB Active Endpoint - usbactep
111465  *
111466  * Indicates whether this endpoint is active in the current configuration and
111467  * interface. The core clears this bit for all endpoints (other than EP 0) after
111468  * detecting a USB reset. After receiving the SetConfiguration and SetInterface
111469  * commands, the application must program endpoint registers accordingly and set
111470  * this bit.
111471  *
111472  * Field Enumeration Values:
111473  *
111474  * Enum | Value | Description
111475  * :--------------------------------------|:------|:--------------------
111476  * ALT_USB_DEV_DOEPCTL15_USBACTEP_E_DISD | 0x0 | Not Active
111477  * ALT_USB_DEV_DOEPCTL15_USBACTEP_E_END | 0x1 | USB Active Endpoint
111478  *
111479  * Field Access Macros:
111480  *
111481  */
111482 /*
111483  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_USBACTEP
111484  *
111485  * Not Active
111486  */
111487 #define ALT_USB_DEV_DOEPCTL15_USBACTEP_E_DISD 0x0
111488 /*
111489  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_USBACTEP
111490  *
111491  * USB Active Endpoint
111492  */
111493 #define ALT_USB_DEV_DOEPCTL15_USBACTEP_E_END 0x1
111494 
111495 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_USBACTEP register field. */
111496 #define ALT_USB_DEV_DOEPCTL15_USBACTEP_LSB 15
111497 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_USBACTEP register field. */
111498 #define ALT_USB_DEV_DOEPCTL15_USBACTEP_MSB 15
111499 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_USBACTEP register field. */
111500 #define ALT_USB_DEV_DOEPCTL15_USBACTEP_WIDTH 1
111501 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_USBACTEP register field value. */
111502 #define ALT_USB_DEV_DOEPCTL15_USBACTEP_SET_MSK 0x00008000
111503 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_USBACTEP register field value. */
111504 #define ALT_USB_DEV_DOEPCTL15_USBACTEP_CLR_MSK 0xffff7fff
111505 /* The reset value of the ALT_USB_DEV_DOEPCTL15_USBACTEP register field. */
111506 #define ALT_USB_DEV_DOEPCTL15_USBACTEP_RESET 0x0
111507 /* Extracts the ALT_USB_DEV_DOEPCTL15_USBACTEP field value from a register. */
111508 #define ALT_USB_DEV_DOEPCTL15_USBACTEP_GET(value) (((value) & 0x00008000) >> 15)
111509 /* Produces a ALT_USB_DEV_DOEPCTL15_USBACTEP register field value suitable for setting the register. */
111510 #define ALT_USB_DEV_DOEPCTL15_USBACTEP_SET(value) (((value) << 15) & 0x00008000)
111511 
111512 /*
111513  * Field : Endpoint Data PID - dpid
111514  *
111515  * Applies to interrupt/bulk IN and OUT endpoints only. Contains the PID of the
111516  * packet to be received or transmitted on this endpoint. The application must
111517  * program the PID of the first packet to be received or transmitted on this
111518  * endpoint, after the endpoint is activated. The applications use the SetD1PID and
111519  * SetD0PID fields of this register to program either DATA0 or DATA1 PID.
111520  *
111521  * 0: DATA0
111522  *
111523  * 1: DATA1This field is applicable both for Scatter/Gather DMA mode and non-
111524  * Scatter/Gather DMA mode. Even/Odd (Micro)Frame (EO_FrNum) In non-Scatter/Gather
111525  * DMA mode:
111526  *
111527  * Applies to isochronous IN and OUT endpoints only. Indicates the (micro)frame
111528  * number in which the core transmits/receives isochronous data for this endpoint.
111529  * The application must program the even/odd (micro) frame number in which it
111530  * intends to transmit/receive isochronous data for this endpoint using the
111531  * SetEvnFr and SetOddFr fields in this register.
111532  *
111533  * 0: Even (micro)frame
111534  *
111535  * 1: Odd (micro)frame
111536  *
111537  * When Scatter/Gather DMA mode is enabled, this field is reserved. The frame
111538  * number in which to send data is provided in the transmit descriptor structure.
111539  * The frame in which data is received is updated in receive descriptor structure.
111540  *
111541  * Field Enumeration Values:
111542  *
111543  * Enum | Value | Description
111544  * :-----------------------------------|:------|:-----------------------------
111545  * ALT_USB_DEV_DOEPCTL15_DPID_E_INACT | 0x0 | Endpoint Data PID not active
111546  * ALT_USB_DEV_DOEPCTL15_DPID_E_ACT | 0x1 | Endpoint Data PID active
111547  *
111548  * Field Access Macros:
111549  *
111550  */
111551 /*
111552  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_DPID
111553  *
111554  * Endpoint Data PID not active
111555  */
111556 #define ALT_USB_DEV_DOEPCTL15_DPID_E_INACT 0x0
111557 /*
111558  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_DPID
111559  *
111560  * Endpoint Data PID active
111561  */
111562 #define ALT_USB_DEV_DOEPCTL15_DPID_E_ACT 0x1
111563 
111564 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_DPID register field. */
111565 #define ALT_USB_DEV_DOEPCTL15_DPID_LSB 16
111566 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_DPID register field. */
111567 #define ALT_USB_DEV_DOEPCTL15_DPID_MSB 16
111568 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_DPID register field. */
111569 #define ALT_USB_DEV_DOEPCTL15_DPID_WIDTH 1
111570 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_DPID register field value. */
111571 #define ALT_USB_DEV_DOEPCTL15_DPID_SET_MSK 0x00010000
111572 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_DPID register field value. */
111573 #define ALT_USB_DEV_DOEPCTL15_DPID_CLR_MSK 0xfffeffff
111574 /* The reset value of the ALT_USB_DEV_DOEPCTL15_DPID register field. */
111575 #define ALT_USB_DEV_DOEPCTL15_DPID_RESET 0x0
111576 /* Extracts the ALT_USB_DEV_DOEPCTL15_DPID field value from a register. */
111577 #define ALT_USB_DEV_DOEPCTL15_DPID_GET(value) (((value) & 0x00010000) >> 16)
111578 /* Produces a ALT_USB_DEV_DOEPCTL15_DPID register field value suitable for setting the register. */
111579 #define ALT_USB_DEV_DOEPCTL15_DPID_SET(value) (((value) << 16) & 0x00010000)
111580 
111581 /*
111582  * Field : NAK Status - naksts
111583  *
111584  * When either the application or the core sets this bit:
111585  *
111586  * * The core stops receiving any data on an OUT endpoint, even if there is space
111587  * in the RxFIFO to accommodate the incoming packet.
111588  *
111589  * * for non-isochronous IN endpoints: The core stops transmitting any data on an
111590  * IN endpoint, even if there data is available in the TxFIFO.
111591  *
111592  * * for isochronous IN endpoints: The core sends out a zero-length data packet,
111593  * even if there data is available in the TxFIFO.
111594  *
111595  * Irrespective of this bit's setting, the core always responds to SETUP data
111596  * packets with an ACK handshake.
111597  *
111598  * Field Enumeration Values:
111599  *
111600  * Enum | Value | Description
111601  * :--------------------------------------|:------|:------------------------------------------------
111602  * ALT_USB_DEV_DOEPCTL15_NAKSTS_E_NONNAK | 0x0 | The core is transmitting non-NAK handshakes
111603  * : | | based on the FIFO status
111604  * ALT_USB_DEV_DOEPCTL15_NAKSTS_E_NAK | 0x1 | The core is transmitting NAK handshakes on this
111605  * : | | endpoint
111606  *
111607  * Field Access Macros:
111608  *
111609  */
111610 /*
111611  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_NAKSTS
111612  *
111613  * The core is transmitting non-NAK handshakes based on the FIFO status
111614  */
111615 #define ALT_USB_DEV_DOEPCTL15_NAKSTS_E_NONNAK 0x0
111616 /*
111617  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_NAKSTS
111618  *
111619  * The core is transmitting NAK handshakes on this endpoint
111620  */
111621 #define ALT_USB_DEV_DOEPCTL15_NAKSTS_E_NAK 0x1
111622 
111623 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_NAKSTS register field. */
111624 #define ALT_USB_DEV_DOEPCTL15_NAKSTS_LSB 17
111625 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_NAKSTS register field. */
111626 #define ALT_USB_DEV_DOEPCTL15_NAKSTS_MSB 17
111627 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_NAKSTS register field. */
111628 #define ALT_USB_DEV_DOEPCTL15_NAKSTS_WIDTH 1
111629 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_NAKSTS register field value. */
111630 #define ALT_USB_DEV_DOEPCTL15_NAKSTS_SET_MSK 0x00020000
111631 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_NAKSTS register field value. */
111632 #define ALT_USB_DEV_DOEPCTL15_NAKSTS_CLR_MSK 0xfffdffff
111633 /* The reset value of the ALT_USB_DEV_DOEPCTL15_NAKSTS register field. */
111634 #define ALT_USB_DEV_DOEPCTL15_NAKSTS_RESET 0x0
111635 /* Extracts the ALT_USB_DEV_DOEPCTL15_NAKSTS field value from a register. */
111636 #define ALT_USB_DEV_DOEPCTL15_NAKSTS_GET(value) (((value) & 0x00020000) >> 17)
111637 /* Produces a ALT_USB_DEV_DOEPCTL15_NAKSTS register field value suitable for setting the register. */
111638 #define ALT_USB_DEV_DOEPCTL15_NAKSTS_SET(value) (((value) << 17) & 0x00020000)
111639 
111640 /*
111641  * Field : Endpoint Type - eptype
111642  *
111643  * This is the transfer type supported by this logical endpoint.
111644  *
111645  * Field Enumeration Values:
111646  *
111647  * Enum | Value | Description
111648  * :-------------------------------------------|:------|:------------
111649  * ALT_USB_DEV_DOEPCTL15_EPTYPE_E_CTL | 0x0 | Control
111650  * ALT_USB_DEV_DOEPCTL15_EPTYPE_E_ISOCHRONOUS | 0x1 | Isochronous
111651  * ALT_USB_DEV_DOEPCTL15_EPTYPE_E_BULK | 0x2 | Bulk
111652  * ALT_USB_DEV_DOEPCTL15_EPTYPE_E_INTERRUP | 0x3 | Interrupt
111653  *
111654  * Field Access Macros:
111655  *
111656  */
111657 /*
111658  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_EPTYPE
111659  *
111660  * Control
111661  */
111662 #define ALT_USB_DEV_DOEPCTL15_EPTYPE_E_CTL 0x0
111663 /*
111664  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_EPTYPE
111665  *
111666  * Isochronous
111667  */
111668 #define ALT_USB_DEV_DOEPCTL15_EPTYPE_E_ISOCHRONOUS 0x1
111669 /*
111670  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_EPTYPE
111671  *
111672  * Bulk
111673  */
111674 #define ALT_USB_DEV_DOEPCTL15_EPTYPE_E_BULK 0x2
111675 /*
111676  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_EPTYPE
111677  *
111678  * Interrupt
111679  */
111680 #define ALT_USB_DEV_DOEPCTL15_EPTYPE_E_INTERRUP 0x3
111681 
111682 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_EPTYPE register field. */
111683 #define ALT_USB_DEV_DOEPCTL15_EPTYPE_LSB 18
111684 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_EPTYPE register field. */
111685 #define ALT_USB_DEV_DOEPCTL15_EPTYPE_MSB 19
111686 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_EPTYPE register field. */
111687 #define ALT_USB_DEV_DOEPCTL15_EPTYPE_WIDTH 2
111688 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_EPTYPE register field value. */
111689 #define ALT_USB_DEV_DOEPCTL15_EPTYPE_SET_MSK 0x000c0000
111690 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_EPTYPE register field value. */
111691 #define ALT_USB_DEV_DOEPCTL15_EPTYPE_CLR_MSK 0xfff3ffff
111692 /* The reset value of the ALT_USB_DEV_DOEPCTL15_EPTYPE register field. */
111693 #define ALT_USB_DEV_DOEPCTL15_EPTYPE_RESET 0x0
111694 /* Extracts the ALT_USB_DEV_DOEPCTL15_EPTYPE field value from a register. */
111695 #define ALT_USB_DEV_DOEPCTL15_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18)
111696 /* Produces a ALT_USB_DEV_DOEPCTL15_EPTYPE register field value suitable for setting the register. */
111697 #define ALT_USB_DEV_DOEPCTL15_EPTYPE_SET(value) (((value) << 18) & 0x000c0000)
111698 
111699 /*
111700  * Field : Snoop Mode - snp
111701  *
111702  * Applies to OUT endpoints only. This bit configures the endpoint to Snoop mode.
111703  * In Snoop mode, the core does not check the correctness of OUT packets before
111704  * transferring them to application memory.
111705  *
111706  * Field Enumeration Values:
111707  *
111708  * Enum | Value | Description
111709  * :--------------------------------|:------|:-------------------
111710  * ALT_USB_DEV_DOEPCTL15_SNP_E_DIS | 0x0 | Disable Snoop Mode
111711  * ALT_USB_DEV_DOEPCTL15_SNP_E_EN | 0x1 | Enable Snoop Mode
111712  *
111713  * Field Access Macros:
111714  *
111715  */
111716 /*
111717  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_SNP
111718  *
111719  * Disable Snoop Mode
111720  */
111721 #define ALT_USB_DEV_DOEPCTL15_SNP_E_DIS 0x0
111722 /*
111723  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_SNP
111724  *
111725  * Enable Snoop Mode
111726  */
111727 #define ALT_USB_DEV_DOEPCTL15_SNP_E_EN 0x1
111728 
111729 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_SNP register field. */
111730 #define ALT_USB_DEV_DOEPCTL15_SNP_LSB 20
111731 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_SNP register field. */
111732 #define ALT_USB_DEV_DOEPCTL15_SNP_MSB 20
111733 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_SNP register field. */
111734 #define ALT_USB_DEV_DOEPCTL15_SNP_WIDTH 1
111735 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_SNP register field value. */
111736 #define ALT_USB_DEV_DOEPCTL15_SNP_SET_MSK 0x00100000
111737 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_SNP register field value. */
111738 #define ALT_USB_DEV_DOEPCTL15_SNP_CLR_MSK 0xffefffff
111739 /* The reset value of the ALT_USB_DEV_DOEPCTL15_SNP register field. */
111740 #define ALT_USB_DEV_DOEPCTL15_SNP_RESET 0x0
111741 /* Extracts the ALT_USB_DEV_DOEPCTL15_SNP field value from a register. */
111742 #define ALT_USB_DEV_DOEPCTL15_SNP_GET(value) (((value) & 0x00100000) >> 20)
111743 /* Produces a ALT_USB_DEV_DOEPCTL15_SNP register field value suitable for setting the register. */
111744 #define ALT_USB_DEV_DOEPCTL15_SNP_SET(value) (((value) << 20) & 0x00100000)
111745 
111746 /*
111747  * Field : STALL Handshake - stall
111748  *
111749  * Applies to non-control, non-isochronous IN and OUT endpoints only. The
111750  * application sets this bit to stall all tokens from the USB host to this
111751  * endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set
111752  * along with this bit, the STALL bit takes priority. Only the application can
111753  * clear this bit, never the core. Applies to control endpoints only. The
111754  * application can only set this bit, and the core clears it, when a SETUP token is
111755  * received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global
111756  * OUT NAK is set along with this bit, the STALL bit takes priority. Irrespective
111757  * of this bit's setting, the core always responds to SETUP data packets with an
111758  * ACK handshake.
111759  *
111760  * Field Enumeration Values:
111761  *
111762  * Enum | Value | Description
111763  * :------------------------------------|:------|:----------------------------
111764  * ALT_USB_DEV_DOEPCTL15_STALL_E_INACT | 0x0 | STALL All Tokens not active
111765  * ALT_USB_DEV_DOEPCTL15_STALL_E_ACT | 0x1 | STALL All Tokens active
111766  *
111767  * Field Access Macros:
111768  *
111769  */
111770 /*
111771  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_STALL
111772  *
111773  * STALL All Tokens not active
111774  */
111775 #define ALT_USB_DEV_DOEPCTL15_STALL_E_INACT 0x0
111776 /*
111777  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_STALL
111778  *
111779  * STALL All Tokens active
111780  */
111781 #define ALT_USB_DEV_DOEPCTL15_STALL_E_ACT 0x1
111782 
111783 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_STALL register field. */
111784 #define ALT_USB_DEV_DOEPCTL15_STALL_LSB 21
111785 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_STALL register field. */
111786 #define ALT_USB_DEV_DOEPCTL15_STALL_MSB 21
111787 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_STALL register field. */
111788 #define ALT_USB_DEV_DOEPCTL15_STALL_WIDTH 1
111789 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_STALL register field value. */
111790 #define ALT_USB_DEV_DOEPCTL15_STALL_SET_MSK 0x00200000
111791 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_STALL register field value. */
111792 #define ALT_USB_DEV_DOEPCTL15_STALL_CLR_MSK 0xffdfffff
111793 /* The reset value of the ALT_USB_DEV_DOEPCTL15_STALL register field. */
111794 #define ALT_USB_DEV_DOEPCTL15_STALL_RESET 0x0
111795 /* Extracts the ALT_USB_DEV_DOEPCTL15_STALL field value from a register. */
111796 #define ALT_USB_DEV_DOEPCTL15_STALL_GET(value) (((value) & 0x00200000) >> 21)
111797 /* Produces a ALT_USB_DEV_DOEPCTL15_STALL register field value suitable for setting the register. */
111798 #define ALT_USB_DEV_DOEPCTL15_STALL_SET(value) (((value) << 21) & 0x00200000)
111799 
111800 /*
111801  * Field : Clear NAK - cnak
111802  *
111803  * A write to this bit clears the NAK bit for the endpoint.
111804  *
111805  * Field Enumeration Values:
111806  *
111807  * Enum | Value | Description
111808  * :-----------------------------------|:------|:-------------
111809  * ALT_USB_DEV_DOEPCTL15_CNAK_E_INACT | 0x0 | No Clear NAK
111810  * ALT_USB_DEV_DOEPCTL15_CNAK_E_ACT | 0x1 | Clear NAK
111811  *
111812  * Field Access Macros:
111813  *
111814  */
111815 /*
111816  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_CNAK
111817  *
111818  * No Clear NAK
111819  */
111820 #define ALT_USB_DEV_DOEPCTL15_CNAK_E_INACT 0x0
111821 /*
111822  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_CNAK
111823  *
111824  * Clear NAK
111825  */
111826 #define ALT_USB_DEV_DOEPCTL15_CNAK_E_ACT 0x1
111827 
111828 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_CNAK register field. */
111829 #define ALT_USB_DEV_DOEPCTL15_CNAK_LSB 26
111830 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_CNAK register field. */
111831 #define ALT_USB_DEV_DOEPCTL15_CNAK_MSB 26
111832 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_CNAK register field. */
111833 #define ALT_USB_DEV_DOEPCTL15_CNAK_WIDTH 1
111834 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_CNAK register field value. */
111835 #define ALT_USB_DEV_DOEPCTL15_CNAK_SET_MSK 0x04000000
111836 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_CNAK register field value. */
111837 #define ALT_USB_DEV_DOEPCTL15_CNAK_CLR_MSK 0xfbffffff
111838 /* The reset value of the ALT_USB_DEV_DOEPCTL15_CNAK register field. */
111839 #define ALT_USB_DEV_DOEPCTL15_CNAK_RESET 0x0
111840 /* Extracts the ALT_USB_DEV_DOEPCTL15_CNAK field value from a register. */
111841 #define ALT_USB_DEV_DOEPCTL15_CNAK_GET(value) (((value) & 0x04000000) >> 26)
111842 /* Produces a ALT_USB_DEV_DOEPCTL15_CNAK register field value suitable for setting the register. */
111843 #define ALT_USB_DEV_DOEPCTL15_CNAK_SET(value) (((value) << 26) & 0x04000000)
111844 
111845 /*
111846  * Field : Set NAK - snak
111847  *
111848  * A write to this bit sets the NAK bit for the endpoint. Using this bit, the
111849  * application can control the transmission of NAK handshakes on an endpoint. The
111850  * core can also Set this bit for an endpoint after a SETUP packet is received on
111851  * that endpoint.
111852  *
111853  * Field Enumeration Values:
111854  *
111855  * Enum | Value | Description
111856  * :-----------------------------------|:------|:------------
111857  * ALT_USB_DEV_DOEPCTL15_SNAK_E_INACT | 0x0 | No Set NAK
111858  * ALT_USB_DEV_DOEPCTL15_SNAK_E_ACT | 0x1 | Set NAK
111859  *
111860  * Field Access Macros:
111861  *
111862  */
111863 /*
111864  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_SNAK
111865  *
111866  * No Set NAK
111867  */
111868 #define ALT_USB_DEV_DOEPCTL15_SNAK_E_INACT 0x0
111869 /*
111870  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_SNAK
111871  *
111872  * Set NAK
111873  */
111874 #define ALT_USB_DEV_DOEPCTL15_SNAK_E_ACT 0x1
111875 
111876 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_SNAK register field. */
111877 #define ALT_USB_DEV_DOEPCTL15_SNAK_LSB 27
111878 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_SNAK register field. */
111879 #define ALT_USB_DEV_DOEPCTL15_SNAK_MSB 27
111880 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_SNAK register field. */
111881 #define ALT_USB_DEV_DOEPCTL15_SNAK_WIDTH 1
111882 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_SNAK register field value. */
111883 #define ALT_USB_DEV_DOEPCTL15_SNAK_SET_MSK 0x08000000
111884 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_SNAK register field value. */
111885 #define ALT_USB_DEV_DOEPCTL15_SNAK_CLR_MSK 0xf7ffffff
111886 /* The reset value of the ALT_USB_DEV_DOEPCTL15_SNAK register field. */
111887 #define ALT_USB_DEV_DOEPCTL15_SNAK_RESET 0x0
111888 /* Extracts the ALT_USB_DEV_DOEPCTL15_SNAK field value from a register. */
111889 #define ALT_USB_DEV_DOEPCTL15_SNAK_GET(value) (((value) & 0x08000000) >> 27)
111890 /* Produces a ALT_USB_DEV_DOEPCTL15_SNAK register field value suitable for setting the register. */
111891 #define ALT_USB_DEV_DOEPCTL15_SNAK_SET(value) (((value) << 27) & 0x08000000)
111892 
111893 /*
111894  * Field : Set DATA0 PID - setd0pid
111895  *
111896  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
111897  * the Endpoint Data PID (DPID) field in this register to DATA0. This field is
111898  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode. In
111899  * non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr) Applies to
111900  * isochronous IN and OUT endpoints only. Writing to this field sets the Even/Odd
111901  * (micro)frame (EO_FrNum) field to even (micro) frame. When Scatter/Gather DMA
111902  * mode is enabled, this field is reserved. The frame number in which to send data
111903  * is in the transmit descriptor structure. The frame in which to receive data is
111904  * updated in receive descriptor structure.
111905  *
111906  * Field Enumeration Values:
111907  *
111908  * Enum | Value | Description
111909  * :--------------------------------------|:------|:------------------------------------
111910  * ALT_USB_DEV_DOEPCTL15_SETD0PID_E_DISD | 0x0 | Disables Set DATA0 PID
111911  * ALT_USB_DEV_DOEPCTL15_SETD0PID_E_END | 0x1 | Enables Endpoint Data PID to DATA0)
111912  *
111913  * Field Access Macros:
111914  *
111915  */
111916 /*
111917  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_SETD0PID
111918  *
111919  * Disables Set DATA0 PID
111920  */
111921 #define ALT_USB_DEV_DOEPCTL15_SETD0PID_E_DISD 0x0
111922 /*
111923  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_SETD0PID
111924  *
111925  * Enables Endpoint Data PID to DATA0)
111926  */
111927 #define ALT_USB_DEV_DOEPCTL15_SETD0PID_E_END 0x1
111928 
111929 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_SETD0PID register field. */
111930 #define ALT_USB_DEV_DOEPCTL15_SETD0PID_LSB 28
111931 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_SETD0PID register field. */
111932 #define ALT_USB_DEV_DOEPCTL15_SETD0PID_MSB 28
111933 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_SETD0PID register field. */
111934 #define ALT_USB_DEV_DOEPCTL15_SETD0PID_WIDTH 1
111935 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_SETD0PID register field value. */
111936 #define ALT_USB_DEV_DOEPCTL15_SETD0PID_SET_MSK 0x10000000
111937 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_SETD0PID register field value. */
111938 #define ALT_USB_DEV_DOEPCTL15_SETD0PID_CLR_MSK 0xefffffff
111939 /* The reset value of the ALT_USB_DEV_DOEPCTL15_SETD0PID register field. */
111940 #define ALT_USB_DEV_DOEPCTL15_SETD0PID_RESET 0x0
111941 /* Extracts the ALT_USB_DEV_DOEPCTL15_SETD0PID field value from a register. */
111942 #define ALT_USB_DEV_DOEPCTL15_SETD0PID_GET(value) (((value) & 0x10000000) >> 28)
111943 /* Produces a ALT_USB_DEV_DOEPCTL15_SETD0PID register field value suitable for setting the register. */
111944 #define ALT_USB_DEV_DOEPCTL15_SETD0PID_SET(value) (((value) << 28) & 0x10000000)
111945 
111946 /*
111947  * Field : Set DATA1 PID - setd1pid
111948  *
111949  * Applies to interrupt/bulk IN and OUT endpoints only. Writing to this field sets
111950  * the Endpoint Data PID (DPID) field in this register to DATA1. This field is
111951  * applicable both for Scatter/Gather DMA mode and non-Scatter/Gather DMA mode.
111952  *
111953  * Set Odd (micro)frame (SetOddFr) Applies to isochronous IN and OUT endpoints
111954  * only. Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to
111955  * odd (micro)frame.This field is not applicable for Scatter/Gather DMA mode.
111956  *
111957  * Field Enumeration Values:
111958  *
111959  * Enum | Value | Description
111960  * :--------------------------------------|:------|:-----------------------
111961  * ALT_USB_DEV_DOEPCTL15_SETD1PID_E_DISD | 0x0 | Disables Set DATA1 PID
111962  * ALT_USB_DEV_DOEPCTL15_SETD1PID_E_END | 0x1 | Enables Set DATA1 PID
111963  *
111964  * Field Access Macros:
111965  *
111966  */
111967 /*
111968  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_SETD1PID
111969  *
111970  * Disables Set DATA1 PID
111971  */
111972 #define ALT_USB_DEV_DOEPCTL15_SETD1PID_E_DISD 0x0
111973 /*
111974  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_SETD1PID
111975  *
111976  * Enables Set DATA1 PID
111977  */
111978 #define ALT_USB_DEV_DOEPCTL15_SETD1PID_E_END 0x1
111979 
111980 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_SETD1PID register field. */
111981 #define ALT_USB_DEV_DOEPCTL15_SETD1PID_LSB 29
111982 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_SETD1PID register field. */
111983 #define ALT_USB_DEV_DOEPCTL15_SETD1PID_MSB 29
111984 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_SETD1PID register field. */
111985 #define ALT_USB_DEV_DOEPCTL15_SETD1PID_WIDTH 1
111986 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_SETD1PID register field value. */
111987 #define ALT_USB_DEV_DOEPCTL15_SETD1PID_SET_MSK 0x20000000
111988 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_SETD1PID register field value. */
111989 #define ALT_USB_DEV_DOEPCTL15_SETD1PID_CLR_MSK 0xdfffffff
111990 /* The reset value of the ALT_USB_DEV_DOEPCTL15_SETD1PID register field. */
111991 #define ALT_USB_DEV_DOEPCTL15_SETD1PID_RESET 0x0
111992 /* Extracts the ALT_USB_DEV_DOEPCTL15_SETD1PID field value from a register. */
111993 #define ALT_USB_DEV_DOEPCTL15_SETD1PID_GET(value) (((value) & 0x20000000) >> 29)
111994 /* Produces a ALT_USB_DEV_DOEPCTL15_SETD1PID register field value suitable for setting the register. */
111995 #define ALT_USB_DEV_DOEPCTL15_SETD1PID_SET(value) (((value) << 29) & 0x20000000)
111996 
111997 /*
111998  * Field : Endpoint Disable - epdis
111999  *
112000  * Applies to IN and OUT endpoints. The application sets this bit to stop
112001  * transmitting/receiving data on an endpoint, even before the transfer for that
112002  * endpoint is complete. The application must wait for the Endpoint Disabled
112003  * interrupt before treating the endpoint as disabled. The core clears this bit
112004  * before setting the Endpoint Disabled interrupt. The application must set this
112005  * bit only if Endpoint Enable is already set for this endpoint.
112006  *
112007  * Field Enumeration Values:
112008  *
112009  * Enum | Value | Description
112010  * :------------------------------------|:------|:--------------------
112011  * ALT_USB_DEV_DOEPCTL15_EPDIS_E_INACT | 0x0 | No Endpoint Disable
112012  * ALT_USB_DEV_DOEPCTL15_EPDIS_E_ACT | 0x1 | Endpoint Disable
112013  *
112014  * Field Access Macros:
112015  *
112016  */
112017 /*
112018  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_EPDIS
112019  *
112020  * No Endpoint Disable
112021  */
112022 #define ALT_USB_DEV_DOEPCTL15_EPDIS_E_INACT 0x0
112023 /*
112024  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_EPDIS
112025  *
112026  * Endpoint Disable
112027  */
112028 #define ALT_USB_DEV_DOEPCTL15_EPDIS_E_ACT 0x1
112029 
112030 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_EPDIS register field. */
112031 #define ALT_USB_DEV_DOEPCTL15_EPDIS_LSB 30
112032 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_EPDIS register field. */
112033 #define ALT_USB_DEV_DOEPCTL15_EPDIS_MSB 30
112034 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_EPDIS register field. */
112035 #define ALT_USB_DEV_DOEPCTL15_EPDIS_WIDTH 1
112036 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_EPDIS register field value. */
112037 #define ALT_USB_DEV_DOEPCTL15_EPDIS_SET_MSK 0x40000000
112038 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_EPDIS register field value. */
112039 #define ALT_USB_DEV_DOEPCTL15_EPDIS_CLR_MSK 0xbfffffff
112040 /* The reset value of the ALT_USB_DEV_DOEPCTL15_EPDIS register field. */
112041 #define ALT_USB_DEV_DOEPCTL15_EPDIS_RESET 0x0
112042 /* Extracts the ALT_USB_DEV_DOEPCTL15_EPDIS field value from a register. */
112043 #define ALT_USB_DEV_DOEPCTL15_EPDIS_GET(value) (((value) & 0x40000000) >> 30)
112044 /* Produces a ALT_USB_DEV_DOEPCTL15_EPDIS register field value suitable for setting the register. */
112045 #define ALT_USB_DEV_DOEPCTL15_EPDIS_SET(value) (((value) << 30) & 0x40000000)
112046 
112047 /*
112048  * Field : Endpoint Enable - epena
112049  *
112050  * Applies to IN and OUT endpoints.
112051  *
112052  * * When Scatter/Gather DMA mode is enabled,
112053  *
112054  * * for IN endpoints this bit indicates that the descriptor structure and data
112055  * buffer with data ready to transmit is setup.
112056  *
112057  * * for OUT endpoint it indicates that the descriptor structure and data buffer to
112058  * receive data is setup.
112059  *
112060  * * When Scatter/Gather DMA mode is enabled such as for buffer-pointer based DMA
112061  * mode:
112062  *
112063  * * for IN endpoints, this bit indicates that data is ready to be transmitted on
112064  * the endpoint.
112065  *
112066  * * for OUT endpoints, this bit indicates that the application has allocated the
112067  * memory to start receiving data from the USB.
112068  *
112069  * * The core clears this bit before setting any of the following interrupts on
112070  * this endpoint:
112071  *
112072  * * SETUP Phase Done
112073  *
112074  * * Endpoint Disabled
112075  *
112076  * * Transfer Completed
112077  *
112078  * for control endpoints in DMA mode, this bit must be set to be able to transfer
112079  * SETUP data packets in memory.
112080  *
112081  * Field Enumeration Values:
112082  *
112083  * Enum | Value | Description
112084  * :------------------------------------|:------|:-------------------------
112085  * ALT_USB_DEV_DOEPCTL15_EPENA_E_INACT | 0x0 | Endpoint Enable inactive
112086  * ALT_USB_DEV_DOEPCTL15_EPENA_E_ACT | 0x1 | Endpoint Enable active
112087  *
112088  * Field Access Macros:
112089  *
112090  */
112091 /*
112092  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_EPENA
112093  *
112094  * Endpoint Enable inactive
112095  */
112096 #define ALT_USB_DEV_DOEPCTL15_EPENA_E_INACT 0x0
112097 /*
112098  * Enumerated value for register field ALT_USB_DEV_DOEPCTL15_EPENA
112099  *
112100  * Endpoint Enable active
112101  */
112102 #define ALT_USB_DEV_DOEPCTL15_EPENA_E_ACT 0x1
112103 
112104 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL15_EPENA register field. */
112105 #define ALT_USB_DEV_DOEPCTL15_EPENA_LSB 31
112106 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL15_EPENA register field. */
112107 #define ALT_USB_DEV_DOEPCTL15_EPENA_MSB 31
112108 /* The width in bits of the ALT_USB_DEV_DOEPCTL15_EPENA register field. */
112109 #define ALT_USB_DEV_DOEPCTL15_EPENA_WIDTH 1
112110 /* The mask used to set the ALT_USB_DEV_DOEPCTL15_EPENA register field value. */
112111 #define ALT_USB_DEV_DOEPCTL15_EPENA_SET_MSK 0x80000000
112112 /* The mask used to clear the ALT_USB_DEV_DOEPCTL15_EPENA register field value. */
112113 #define ALT_USB_DEV_DOEPCTL15_EPENA_CLR_MSK 0x7fffffff
112114 /* The reset value of the ALT_USB_DEV_DOEPCTL15_EPENA register field. */
112115 #define ALT_USB_DEV_DOEPCTL15_EPENA_RESET 0x0
112116 /* Extracts the ALT_USB_DEV_DOEPCTL15_EPENA field value from a register. */
112117 #define ALT_USB_DEV_DOEPCTL15_EPENA_GET(value) (((value) & 0x80000000) >> 31)
112118 /* Produces a ALT_USB_DEV_DOEPCTL15_EPENA register field value suitable for setting the register. */
112119 #define ALT_USB_DEV_DOEPCTL15_EPENA_SET(value) (((value) << 31) & 0x80000000)
112120 
112121 #ifndef __ASSEMBLY__
112122 /*
112123  * WARNING: The C register and register group struct declarations are provided for
112124  * convenience and illustrative purposes. They should, however, be used with
112125  * caution as the C language standard provides no guarantees about the alignment or
112126  * atomicity of device memory accesses. The recommended practice for writing
112127  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
112128  * alt_write_word() functions.
112129  *
112130  * The struct declaration for register ALT_USB_DEV_DOEPCTL15.
112131  */
112132 struct ALT_USB_DEV_DOEPCTL15_s
112133 {
112134  uint32_t mps : 11; /* Maximum Packet Size */
112135  uint32_t : 4; /* *UNDEFINED* */
112136  uint32_t usbactep : 1; /* USB Active Endpoint */
112137  const uint32_t dpid : 1; /* Endpoint Data PID */
112138  const uint32_t naksts : 1; /* NAK Status */
112139  uint32_t eptype : 2; /* Endpoint Type */
112140  uint32_t snp : 1; /* Snoop Mode */
112141  const uint32_t stall : 1; /* STALL Handshake */
112142  uint32_t : 4; /* *UNDEFINED* */
112143  uint32_t cnak : 1; /* Clear NAK */
112144  uint32_t snak : 1; /* Set NAK */
112145  uint32_t setd0pid : 1; /* Set DATA0 PID */
112146  uint32_t setd1pid : 1; /* Set DATA1 PID */
112147  const uint32_t epdis : 1; /* Endpoint Disable */
112148  const uint32_t epena : 1; /* Endpoint Enable */
112149 };
112150 
112151 /* The typedef declaration for register ALT_USB_DEV_DOEPCTL15. */
112152 typedef volatile struct ALT_USB_DEV_DOEPCTL15_s ALT_USB_DEV_DOEPCTL15_t;
112153 #endif /* __ASSEMBLY__ */
112154 
112155 /* The byte offset of the ALT_USB_DEV_DOEPCTL15 register from the beginning of the component. */
112156 #define ALT_USB_DEV_DOEPCTL15_OFST 0x4e0
112157 /* The address of the ALT_USB_DEV_DOEPCTL15 register. */
112158 #define ALT_USB_DEV_DOEPCTL15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL15_OFST))
112159 
112160 /*
112161  * Register : Device OUT Endpoint 15 Interrupt Register - doepint15
112162  *
112163  * This register indicates the status of an endpoint with respect to USB- and AHB-
112164  * related events. The application must read this register when the OUT Endpoints
112165  * Interrupt bit or IN Endpoints Interrupt bit of the Core Interrupt register
112166  * (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the application
112167  * can read this register, it must first read the Device All Endpoints Interrupt
112168  * (DAINT) register to get the exact endpoint number for the Device Endpoint-n
112169  * Interrupt register. The application must clear the appropriate bit in this
112170  * register to clear the corresponding bits in the DAINT and GINTSTS registers.
112171  *
112172  * Register Layout
112173  *
112174  * Bits | Access | Reset | Description
112175  * :--------|:-------|:------|:------------------------------------------
112176  * [0] | R | 0x0 | Transfer Completed Interrupt
112177  * [1] | R | 0x0 | Endpoint Disabled Interrupt
112178  * [2] | R | 0x0 | ALT_USB_DEV_DOEPINT15_AHBERR
112179  * [3] | R | 0x0 | SETUP Phase Done
112180  * [4] | R | 0x0 | OUT Token Received When Endpoint Disabled
112181  * [5] | R | 0x0 | Status Phase Received for Control Write
112182  * [6] | R | 0x0 | Back-to-Back SETUP Packets Received
112183  * [7] | ??? | 0x0 | *UNDEFINED*
112184  * [8] | R | 0x0 | OUT Packet Error
112185  * [9] | R | 0x0 | BNA (Buffer Not Available) Interrupt
112186  * [10] | ??? | 0x0 | *UNDEFINED*
112187  * [11] | R | 0x0 | Packet Drop Status
112188  * [12] | R | 0x0 | BbleErr Interrupt
112189  * [13] | R | 0x0 | NAK Interrupt
112190  * [14] | R | 0x0 | NYET Interrupt
112191  * [31:15] | ??? | 0x0 | *UNDEFINED*
112192  *
112193  */
112194 /*
112195  * Field : Transfer Completed Interrupt - xfercompl
112196  *
112197  * Applies to IN and OUT endpoints.When Scatter/Gather DMA mode is enabled
112198  *
112199  * This field indicates that the requested data from the internal FIFO is moved to
112200  * external system memory. This interrupt is generated only when the corresponding
112201  * endpoint descriptor is closed, and the IOC bit for the corresponding descriptor
112202  * is Set.
112203  *
112204  * When Scatter/Gather DMA mode is disabled, this field indicates that the
112205  * programmed transfer is complete on the AHB as well as on the USB, for this
112206  * endpoint.
112207  *
112208  * Field Enumeration Values:
112209  *
112210  * Enum | Value | Description
112211  * :----------------------------------------|:------|:-----------------------------
112212  * ALT_USB_DEV_DOEPINT15_XFERCOMPL_E_INACT | 0x0 | No Interrupt
112213  * ALT_USB_DEV_DOEPINT15_XFERCOMPL_E_ACT | 0x1 | Transfer Completed Interrupt
112214  *
112215  * Field Access Macros:
112216  *
112217  */
112218 /*
112219  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_XFERCOMPL
112220  *
112221  * No Interrupt
112222  */
112223 #define ALT_USB_DEV_DOEPINT15_XFERCOMPL_E_INACT 0x0
112224 /*
112225  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_XFERCOMPL
112226  *
112227  * Transfer Completed Interrupt
112228  */
112229 #define ALT_USB_DEV_DOEPINT15_XFERCOMPL_E_ACT 0x1
112230 
112231 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_XFERCOMPL register field. */
112232 #define ALT_USB_DEV_DOEPINT15_XFERCOMPL_LSB 0
112233 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_XFERCOMPL register field. */
112234 #define ALT_USB_DEV_DOEPINT15_XFERCOMPL_MSB 0
112235 /* The width in bits of the ALT_USB_DEV_DOEPINT15_XFERCOMPL register field. */
112236 #define ALT_USB_DEV_DOEPINT15_XFERCOMPL_WIDTH 1
112237 /* The mask used to set the ALT_USB_DEV_DOEPINT15_XFERCOMPL register field value. */
112238 #define ALT_USB_DEV_DOEPINT15_XFERCOMPL_SET_MSK 0x00000001
112239 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_XFERCOMPL register field value. */
112240 #define ALT_USB_DEV_DOEPINT15_XFERCOMPL_CLR_MSK 0xfffffffe
112241 /* The reset value of the ALT_USB_DEV_DOEPINT15_XFERCOMPL register field. */
112242 #define ALT_USB_DEV_DOEPINT15_XFERCOMPL_RESET 0x0
112243 /* Extracts the ALT_USB_DEV_DOEPINT15_XFERCOMPL field value from a register. */
112244 #define ALT_USB_DEV_DOEPINT15_XFERCOMPL_GET(value) (((value) & 0x00000001) >> 0)
112245 /* Produces a ALT_USB_DEV_DOEPINT15_XFERCOMPL register field value suitable for setting the register. */
112246 #define ALT_USB_DEV_DOEPINT15_XFERCOMPL_SET(value) (((value) << 0) & 0x00000001)
112247 
112248 /*
112249  * Field : Endpoint Disabled Interrupt - epdisbld
112250  *
112251  * Applies to IN and OUT endpoints. This bit indicates that the endpoint is
112252  * disabled per the application's request.
112253  *
112254  * Field Enumeration Values:
112255  *
112256  * Enum | Value | Description
112257  * :---------------------------------------|:------|:----------------------------
112258  * ALT_USB_DEV_DOEPINT15_EPDISBLD_E_INACT | 0x0 | No Interrupt
112259  * ALT_USB_DEV_DOEPINT15_EPDISBLD_E_ACT | 0x1 | Endpoint Disabled Interrupt
112260  *
112261  * Field Access Macros:
112262  *
112263  */
112264 /*
112265  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_EPDISBLD
112266  *
112267  * No Interrupt
112268  */
112269 #define ALT_USB_DEV_DOEPINT15_EPDISBLD_E_INACT 0x0
112270 /*
112271  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_EPDISBLD
112272  *
112273  * Endpoint Disabled Interrupt
112274  */
112275 #define ALT_USB_DEV_DOEPINT15_EPDISBLD_E_ACT 0x1
112276 
112277 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_EPDISBLD register field. */
112278 #define ALT_USB_DEV_DOEPINT15_EPDISBLD_LSB 1
112279 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_EPDISBLD register field. */
112280 #define ALT_USB_DEV_DOEPINT15_EPDISBLD_MSB 1
112281 /* The width in bits of the ALT_USB_DEV_DOEPINT15_EPDISBLD register field. */
112282 #define ALT_USB_DEV_DOEPINT15_EPDISBLD_WIDTH 1
112283 /* The mask used to set the ALT_USB_DEV_DOEPINT15_EPDISBLD register field value. */
112284 #define ALT_USB_DEV_DOEPINT15_EPDISBLD_SET_MSK 0x00000002
112285 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_EPDISBLD register field value. */
112286 #define ALT_USB_DEV_DOEPINT15_EPDISBLD_CLR_MSK 0xfffffffd
112287 /* The reset value of the ALT_USB_DEV_DOEPINT15_EPDISBLD register field. */
112288 #define ALT_USB_DEV_DOEPINT15_EPDISBLD_RESET 0x0
112289 /* Extracts the ALT_USB_DEV_DOEPINT15_EPDISBLD field value from a register. */
112290 #define ALT_USB_DEV_DOEPINT15_EPDISBLD_GET(value) (((value) & 0x00000002) >> 1)
112291 /* Produces a ALT_USB_DEV_DOEPINT15_EPDISBLD register field value suitable for setting the register. */
112292 #define ALT_USB_DEV_DOEPINT15_EPDISBLD_SET(value) (((value) << 1) & 0x00000002)
112293 
112294 /*
112295  * Field : ahberr
112296  *
112297  * Applies to IN and OUT endpoints.This is generated only in Internal DMA mode when
112298  * there is an AHB error during an AHB read/write. The application can read the
112299  * corresponding endpoint DMA address register to get the error address.
112300  *
112301  * Field Enumeration Values:
112302  *
112303  * Enum | Value | Description
112304  * :-------------------------------------|:------|:--------------------
112305  * ALT_USB_DEV_DOEPINT15_AHBERR_E_INACT | 0x0 | No Interrupt
112306  * ALT_USB_DEV_DOEPINT15_AHBERR_E_ACT | 0x1 | AHB Error interrupt
112307  *
112308  * Field Access Macros:
112309  *
112310  */
112311 /*
112312  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_AHBERR
112313  *
112314  * No Interrupt
112315  */
112316 #define ALT_USB_DEV_DOEPINT15_AHBERR_E_INACT 0x0
112317 /*
112318  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_AHBERR
112319  *
112320  * AHB Error interrupt
112321  */
112322 #define ALT_USB_DEV_DOEPINT15_AHBERR_E_ACT 0x1
112323 
112324 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_AHBERR register field. */
112325 #define ALT_USB_DEV_DOEPINT15_AHBERR_LSB 2
112326 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_AHBERR register field. */
112327 #define ALT_USB_DEV_DOEPINT15_AHBERR_MSB 2
112328 /* The width in bits of the ALT_USB_DEV_DOEPINT15_AHBERR register field. */
112329 #define ALT_USB_DEV_DOEPINT15_AHBERR_WIDTH 1
112330 /* The mask used to set the ALT_USB_DEV_DOEPINT15_AHBERR register field value. */
112331 #define ALT_USB_DEV_DOEPINT15_AHBERR_SET_MSK 0x00000004
112332 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_AHBERR register field value. */
112333 #define ALT_USB_DEV_DOEPINT15_AHBERR_CLR_MSK 0xfffffffb
112334 /* The reset value of the ALT_USB_DEV_DOEPINT15_AHBERR register field. */
112335 #define ALT_USB_DEV_DOEPINT15_AHBERR_RESET 0x0
112336 /* Extracts the ALT_USB_DEV_DOEPINT15_AHBERR field value from a register. */
112337 #define ALT_USB_DEV_DOEPINT15_AHBERR_GET(value) (((value) & 0x00000004) >> 2)
112338 /* Produces a ALT_USB_DEV_DOEPINT15_AHBERR register field value suitable for setting the register. */
112339 #define ALT_USB_DEV_DOEPINT15_AHBERR_SET(value) (((value) << 2) & 0x00000004)
112340 
112341 /*
112342  * Field : SETUP Phase Done - setup
112343  *
112344  * Applies to control OUT endpoints only. Indicates that the SETUP phase for the
112345  * control endpoint is complete and no more back-to-back SETUP packets were
112346  * received for the current control transfer. On this interrupt, the application
112347  * can decode the received SETUP data packet.
112348  *
112349  * Field Enumeration Values:
112350  *
112351  * Enum | Value | Description
112352  * :------------------------------------|:------|:--------------------
112353  * ALT_USB_DEV_DOEPINT15_SETUP_E_INACT | 0x0 | No SETUP Phase Done
112354  * ALT_USB_DEV_DOEPINT15_SETUP_E_ACT | 0x1 | SETUP Phase Done
112355  *
112356  * Field Access Macros:
112357  *
112358  */
112359 /*
112360  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_SETUP
112361  *
112362  * No SETUP Phase Done
112363  */
112364 #define ALT_USB_DEV_DOEPINT15_SETUP_E_INACT 0x0
112365 /*
112366  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_SETUP
112367  *
112368  * SETUP Phase Done
112369  */
112370 #define ALT_USB_DEV_DOEPINT15_SETUP_E_ACT 0x1
112371 
112372 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_SETUP register field. */
112373 #define ALT_USB_DEV_DOEPINT15_SETUP_LSB 3
112374 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_SETUP register field. */
112375 #define ALT_USB_DEV_DOEPINT15_SETUP_MSB 3
112376 /* The width in bits of the ALT_USB_DEV_DOEPINT15_SETUP register field. */
112377 #define ALT_USB_DEV_DOEPINT15_SETUP_WIDTH 1
112378 /* The mask used to set the ALT_USB_DEV_DOEPINT15_SETUP register field value. */
112379 #define ALT_USB_DEV_DOEPINT15_SETUP_SET_MSK 0x00000008
112380 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_SETUP register field value. */
112381 #define ALT_USB_DEV_DOEPINT15_SETUP_CLR_MSK 0xfffffff7
112382 /* The reset value of the ALT_USB_DEV_DOEPINT15_SETUP register field. */
112383 #define ALT_USB_DEV_DOEPINT15_SETUP_RESET 0x0
112384 /* Extracts the ALT_USB_DEV_DOEPINT15_SETUP field value from a register. */
112385 #define ALT_USB_DEV_DOEPINT15_SETUP_GET(value) (((value) & 0x00000008) >> 3)
112386 /* Produces a ALT_USB_DEV_DOEPINT15_SETUP register field value suitable for setting the register. */
112387 #define ALT_USB_DEV_DOEPINT15_SETUP_SET(value) (((value) << 3) & 0x00000008)
112388 
112389 /*
112390  * Field : OUT Token Received When Endpoint Disabled - outtknepdis
112391  *
112392  * Applies only to control OUT endpoints. Indicates that an OUT token was received
112393  * when the endpoint was not yet enabled. This interrupt is asserted on the
112394  * endpoint for which the OUT token was received.
112395  *
112396  * Field Enumeration Values:
112397  *
112398  * Enum | Value | Description
112399  * :------------------------------------------|:------|:---------------------------------------------
112400  * ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS_E_INACT | 0x0 | No OUT Token Received When Endpoint Disabled
112401  * ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS_E_ACT | 0x1 | OUT Token Received When Endpoint Disabled
112402  *
112403  * Field Access Macros:
112404  *
112405  */
112406 /*
112407  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS
112408  *
112409  * No OUT Token Received When Endpoint Disabled
112410  */
112411 #define ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS_E_INACT 0x0
112412 /*
112413  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS
112414  *
112415  * OUT Token Received When Endpoint Disabled
112416  */
112417 #define ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS_E_ACT 0x1
112418 
112419 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS register field. */
112420 #define ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS_LSB 4
112421 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS register field. */
112422 #define ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS_MSB 4
112423 /* The width in bits of the ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS register field. */
112424 #define ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS_WIDTH 1
112425 /* The mask used to set the ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS register field value. */
112426 #define ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS_SET_MSK 0x00000010
112427 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS register field value. */
112428 #define ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS_CLR_MSK 0xffffffef
112429 /* The reset value of the ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS register field. */
112430 #define ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS_RESET 0x0
112431 /* Extracts the ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS field value from a register. */
112432 #define ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS_GET(value) (((value) & 0x00000010) >> 4)
112433 /* Produces a ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS register field value suitable for setting the register. */
112434 #define ALT_USB_DEV_DOEPINT15_OUTTKNEPDIS_SET(value) (((value) << 4) & 0x00000010)
112435 
112436 /*
112437  * Field : Status Phase Received for Control Write - stsphsercvd
112438  *
112439  * This interrupt is valid only for Control OUT endpoints and only in Scatter
112440  * Gather DMA mode. This interrupt is generated only after the core has transferred
112441  * all the data that the host has sent during the data phase of a control write
112442  * transfer, to the system memory buffer. The interrupt indicates to the
112443  * application that the host has switched from data phase to the status phase of a
112444  * Control Write transfer. The application can use this interrupt to ACK or STALL
112445  * the Status phase, after it has decoded the data phase. This is applicable only
112446  * in Case of Scatter Gather DMA mode.
112447  *
112448  * Field Enumeration Values:
112449  *
112450  * Enum | Value | Description
112451  * :------------------------------------------|:------|:-------------------------------------------
112452  * ALT_USB_DEV_DOEPINT15_STSPHSERCVD_E_INACT | 0x0 | No Status Phase Received for Control Write
112453  * ALT_USB_DEV_DOEPINT15_STSPHSERCVD_E_ACT | 0x1 | Status Phase Received for Control Write
112454  *
112455  * Field Access Macros:
112456  *
112457  */
112458 /*
112459  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_STSPHSERCVD
112460  *
112461  * No Status Phase Received for Control Write
112462  */
112463 #define ALT_USB_DEV_DOEPINT15_STSPHSERCVD_E_INACT 0x0
112464 /*
112465  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_STSPHSERCVD
112466  *
112467  * Status Phase Received for Control Write
112468  */
112469 #define ALT_USB_DEV_DOEPINT15_STSPHSERCVD_E_ACT 0x1
112470 
112471 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_STSPHSERCVD register field. */
112472 #define ALT_USB_DEV_DOEPINT15_STSPHSERCVD_LSB 5
112473 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_STSPHSERCVD register field. */
112474 #define ALT_USB_DEV_DOEPINT15_STSPHSERCVD_MSB 5
112475 /* The width in bits of the ALT_USB_DEV_DOEPINT15_STSPHSERCVD register field. */
112476 #define ALT_USB_DEV_DOEPINT15_STSPHSERCVD_WIDTH 1
112477 /* The mask used to set the ALT_USB_DEV_DOEPINT15_STSPHSERCVD register field value. */
112478 #define ALT_USB_DEV_DOEPINT15_STSPHSERCVD_SET_MSK 0x00000020
112479 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_STSPHSERCVD register field value. */
112480 #define ALT_USB_DEV_DOEPINT15_STSPHSERCVD_CLR_MSK 0xffffffdf
112481 /* The reset value of the ALT_USB_DEV_DOEPINT15_STSPHSERCVD register field. */
112482 #define ALT_USB_DEV_DOEPINT15_STSPHSERCVD_RESET 0x0
112483 /* Extracts the ALT_USB_DEV_DOEPINT15_STSPHSERCVD field value from a register. */
112484 #define ALT_USB_DEV_DOEPINT15_STSPHSERCVD_GET(value) (((value) & 0x00000020) >> 5)
112485 /* Produces a ALT_USB_DEV_DOEPINT15_STSPHSERCVD register field value suitable for setting the register. */
112486 #define ALT_USB_DEV_DOEPINT15_STSPHSERCVD_SET(value) (((value) << 5) & 0x00000020)
112487 
112488 /*
112489  * Field : Back-to-Back SETUP Packets Received - back2backsetup
112490  *
112491  * Applies to Control OUT endpoints only. This bit indicates that the core has
112492  * received more than three back-to-back SETUP packets for this particular
112493  * endpoint. for information about handling this interrupt,
112494  *
112495  * Field Enumeration Values:
112496  *
112497  * Enum | Value | Description
112498  * :---------------------------------------------|:------|:---------------------------------------
112499  * ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP_E_INACT | 0x0 | No Back-to-Back SETUP Packets Received
112500  * ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP_E_ACT | 0x1 | Back-to-Back SETUP Packets Received
112501  *
112502  * Field Access Macros:
112503  *
112504  */
112505 /*
112506  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP
112507  *
112508  * No Back-to-Back SETUP Packets Received
112509  */
112510 #define ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP_E_INACT 0x0
112511 /*
112512  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP
112513  *
112514  * Back-to-Back SETUP Packets Received
112515  */
112516 #define ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP_E_ACT 0x1
112517 
112518 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP register field. */
112519 #define ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP_LSB 6
112520 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP register field. */
112521 #define ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP_MSB 6
112522 /* The width in bits of the ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP register field. */
112523 #define ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP_WIDTH 1
112524 /* The mask used to set the ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP register field value. */
112525 #define ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP_SET_MSK 0x00000040
112526 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP register field value. */
112527 #define ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP_CLR_MSK 0xffffffbf
112528 /* The reset value of the ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP register field. */
112529 #define ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP_RESET 0x0
112530 /* Extracts the ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP field value from a register. */
112531 #define ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP_GET(value) (((value) & 0x00000040) >> 6)
112532 /* Produces a ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP register field value suitable for setting the register. */
112533 #define ALT_USB_DEV_DOEPINT15_BACK2BACKSETUP_SET(value) (((value) << 6) & 0x00000040)
112534 
112535 /*
112536  * Field : OUT Packet Error - outpkterr
112537  *
112538  * Applies to OUT endpoints Only This interrupt is asserted when the core detects
112539  * an overflow or a CRC error for non-Isochronous OUT packet.
112540  *
112541  * Field Enumeration Values:
112542  *
112543  * Enum | Value | Description
112544  * :----------------------------------------|:------|:--------------------
112545  * ALT_USB_DEV_DOEPINT15_OUTPKTERR_E_INACT | 0x0 | No OUT Packet Error
112546  * ALT_USB_DEV_DOEPINT15_OUTPKTERR_E_ACT | 0x1 | OUT Packet Error
112547  *
112548  * Field Access Macros:
112549  *
112550  */
112551 /*
112552  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_OUTPKTERR
112553  *
112554  * No OUT Packet Error
112555  */
112556 #define ALT_USB_DEV_DOEPINT15_OUTPKTERR_E_INACT 0x0
112557 /*
112558  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_OUTPKTERR
112559  *
112560  * OUT Packet Error
112561  */
112562 #define ALT_USB_DEV_DOEPINT15_OUTPKTERR_E_ACT 0x1
112563 
112564 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_OUTPKTERR register field. */
112565 #define ALT_USB_DEV_DOEPINT15_OUTPKTERR_LSB 8
112566 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_OUTPKTERR register field. */
112567 #define ALT_USB_DEV_DOEPINT15_OUTPKTERR_MSB 8
112568 /* The width in bits of the ALT_USB_DEV_DOEPINT15_OUTPKTERR register field. */
112569 #define ALT_USB_DEV_DOEPINT15_OUTPKTERR_WIDTH 1
112570 /* The mask used to set the ALT_USB_DEV_DOEPINT15_OUTPKTERR register field value. */
112571 #define ALT_USB_DEV_DOEPINT15_OUTPKTERR_SET_MSK 0x00000100
112572 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_OUTPKTERR register field value. */
112573 #define ALT_USB_DEV_DOEPINT15_OUTPKTERR_CLR_MSK 0xfffffeff
112574 /* The reset value of the ALT_USB_DEV_DOEPINT15_OUTPKTERR register field. */
112575 #define ALT_USB_DEV_DOEPINT15_OUTPKTERR_RESET 0x0
112576 /* Extracts the ALT_USB_DEV_DOEPINT15_OUTPKTERR field value from a register. */
112577 #define ALT_USB_DEV_DOEPINT15_OUTPKTERR_GET(value) (((value) & 0x00000100) >> 8)
112578 /* Produces a ALT_USB_DEV_DOEPINT15_OUTPKTERR register field value suitable for setting the register. */
112579 #define ALT_USB_DEV_DOEPINT15_OUTPKTERR_SET(value) (((value) << 8) & 0x00000100)
112580 
112581 /*
112582  * Field : BNA (Buffer Not Available) Interrupt - bnaintr
112583  *
112584  * This bit is valid only when Scatter/Gather DMA mode is This bit is valid only
112585  * when Scatter/Gather DMA mode is enabled. The core generates this interrupt when
112586  * the descriptor accessed is not ready for the Core to process, such as Host busy
112587  * or DMA done
112588  *
112589  * Field Enumeration Values:
112590  *
112591  * Enum | Value | Description
112592  * :--------------------------------------|:------|:--------------
112593  * ALT_USB_DEV_DOEPINT15_BNAINTR_E_INACT | 0x0 | No interrupt
112594  * ALT_USB_DEV_DOEPINT15_BNAINTR_E_ACT | 0x1 | BNA interrupt
112595  *
112596  * Field Access Macros:
112597  *
112598  */
112599 /*
112600  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_BNAINTR
112601  *
112602  * No interrupt
112603  */
112604 #define ALT_USB_DEV_DOEPINT15_BNAINTR_E_INACT 0x0
112605 /*
112606  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_BNAINTR
112607  *
112608  * BNA interrupt
112609  */
112610 #define ALT_USB_DEV_DOEPINT15_BNAINTR_E_ACT 0x1
112611 
112612 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_BNAINTR register field. */
112613 #define ALT_USB_DEV_DOEPINT15_BNAINTR_LSB 9
112614 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_BNAINTR register field. */
112615 #define ALT_USB_DEV_DOEPINT15_BNAINTR_MSB 9
112616 /* The width in bits of the ALT_USB_DEV_DOEPINT15_BNAINTR register field. */
112617 #define ALT_USB_DEV_DOEPINT15_BNAINTR_WIDTH 1
112618 /* The mask used to set the ALT_USB_DEV_DOEPINT15_BNAINTR register field value. */
112619 #define ALT_USB_DEV_DOEPINT15_BNAINTR_SET_MSK 0x00000200
112620 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_BNAINTR register field value. */
112621 #define ALT_USB_DEV_DOEPINT15_BNAINTR_CLR_MSK 0xfffffdff
112622 /* The reset value of the ALT_USB_DEV_DOEPINT15_BNAINTR register field. */
112623 #define ALT_USB_DEV_DOEPINT15_BNAINTR_RESET 0x0
112624 /* Extracts the ALT_USB_DEV_DOEPINT15_BNAINTR field value from a register. */
112625 #define ALT_USB_DEV_DOEPINT15_BNAINTR_GET(value) (((value) & 0x00000200) >> 9)
112626 /* Produces a ALT_USB_DEV_DOEPINT15_BNAINTR register field value suitable for setting the register. */
112627 #define ALT_USB_DEV_DOEPINT15_BNAINTR_SET(value) (((value) << 9) & 0x00000200)
112628 
112629 /*
112630  * Field : Packet Drop Status - pktdrpsts
112631  *
112632  * This bit indicates to the application that an ISOC OUT packet has been dropped.
112633  * This bit does not have an associated mask bit and does not generate an
112634  * interrupt.
112635  *
112636  * Field Enumeration Values:
112637  *
112638  * Enum | Value | Description
112639  * :----------------------------------------|:------|:-----------------------------
112640  * ALT_USB_DEV_DOEPINT15_PKTDRPSTS_E_INACT | 0x0 | No interrupt
112641  * ALT_USB_DEV_DOEPINT15_PKTDRPSTS_E_ACT | 0x1 | Packet Drop Status interrupt
112642  *
112643  * Field Access Macros:
112644  *
112645  */
112646 /*
112647  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_PKTDRPSTS
112648  *
112649  * No interrupt
112650  */
112651 #define ALT_USB_DEV_DOEPINT15_PKTDRPSTS_E_INACT 0x0
112652 /*
112653  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_PKTDRPSTS
112654  *
112655  * Packet Drop Status interrupt
112656  */
112657 #define ALT_USB_DEV_DOEPINT15_PKTDRPSTS_E_ACT 0x1
112658 
112659 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_PKTDRPSTS register field. */
112660 #define ALT_USB_DEV_DOEPINT15_PKTDRPSTS_LSB 11
112661 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_PKTDRPSTS register field. */
112662 #define ALT_USB_DEV_DOEPINT15_PKTDRPSTS_MSB 11
112663 /* The width in bits of the ALT_USB_DEV_DOEPINT15_PKTDRPSTS register field. */
112664 #define ALT_USB_DEV_DOEPINT15_PKTDRPSTS_WIDTH 1
112665 /* The mask used to set the ALT_USB_DEV_DOEPINT15_PKTDRPSTS register field value. */
112666 #define ALT_USB_DEV_DOEPINT15_PKTDRPSTS_SET_MSK 0x00000800
112667 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_PKTDRPSTS register field value. */
112668 #define ALT_USB_DEV_DOEPINT15_PKTDRPSTS_CLR_MSK 0xfffff7ff
112669 /* The reset value of the ALT_USB_DEV_DOEPINT15_PKTDRPSTS register field. */
112670 #define ALT_USB_DEV_DOEPINT15_PKTDRPSTS_RESET 0x0
112671 /* Extracts the ALT_USB_DEV_DOEPINT15_PKTDRPSTS field value from a register. */
112672 #define ALT_USB_DEV_DOEPINT15_PKTDRPSTS_GET(value) (((value) & 0x00000800) >> 11)
112673 /* Produces a ALT_USB_DEV_DOEPINT15_PKTDRPSTS register field value suitable for setting the register. */
112674 #define ALT_USB_DEV_DOEPINT15_PKTDRPSTS_SET(value) (((value) << 11) & 0x00000800)
112675 
112676 /*
112677  * Field : BbleErr Interrupt - bbleerr
112678  *
112679  * The core generates this interrupt when babble is received for the endpoint.
112680  *
112681  * Field Enumeration Values:
112682  *
112683  * Enum | Value | Description
112684  * :--------------------------------------|:------|:------------------
112685  * ALT_USB_DEV_DOEPINT15_BBLEERR_E_INACT | 0x0 | No interrupt
112686  * ALT_USB_DEV_DOEPINT15_BBLEERR_E_ACT | 0x1 | BbleErr interrupt
112687  *
112688  * Field Access Macros:
112689  *
112690  */
112691 /*
112692  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_BBLEERR
112693  *
112694  * No interrupt
112695  */
112696 #define ALT_USB_DEV_DOEPINT15_BBLEERR_E_INACT 0x0
112697 /*
112698  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_BBLEERR
112699  *
112700  * BbleErr interrupt
112701  */
112702 #define ALT_USB_DEV_DOEPINT15_BBLEERR_E_ACT 0x1
112703 
112704 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_BBLEERR register field. */
112705 #define ALT_USB_DEV_DOEPINT15_BBLEERR_LSB 12
112706 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_BBLEERR register field. */
112707 #define ALT_USB_DEV_DOEPINT15_BBLEERR_MSB 12
112708 /* The width in bits of the ALT_USB_DEV_DOEPINT15_BBLEERR register field. */
112709 #define ALT_USB_DEV_DOEPINT15_BBLEERR_WIDTH 1
112710 /* The mask used to set the ALT_USB_DEV_DOEPINT15_BBLEERR register field value. */
112711 #define ALT_USB_DEV_DOEPINT15_BBLEERR_SET_MSK 0x00001000
112712 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_BBLEERR register field value. */
112713 #define ALT_USB_DEV_DOEPINT15_BBLEERR_CLR_MSK 0xffffefff
112714 /* The reset value of the ALT_USB_DEV_DOEPINT15_BBLEERR register field. */
112715 #define ALT_USB_DEV_DOEPINT15_BBLEERR_RESET 0x0
112716 /* Extracts the ALT_USB_DEV_DOEPINT15_BBLEERR field value from a register. */
112717 #define ALT_USB_DEV_DOEPINT15_BBLEERR_GET(value) (((value) & 0x00001000) >> 12)
112718 /* Produces a ALT_USB_DEV_DOEPINT15_BBLEERR register field value suitable for setting the register. */
112719 #define ALT_USB_DEV_DOEPINT15_BBLEERR_SET(value) (((value) << 12) & 0x00001000)
112720 
112721 /*
112722  * Field : NAK Interrupt - nakintrpt
112723  *
112724  * The core generates this interrupt when a NAK is transmitted or received by the
112725  * device. In case of isochronous IN endpoints the interrupt gets generated when a
112726  * zero length packet is transmitted due to un-availability of data in the TXFifo.
112727  *
112728  * Field Enumeration Values:
112729  *
112730  * Enum | Value | Description
112731  * :----------------------------------------|:------|:--------------
112732  * ALT_USB_DEV_DOEPINT15_NAKINTRPT_E_INACT | 0x0 | No interrupt
112733  * ALT_USB_DEV_DOEPINT15_NAKINTRPT_E_ACT | 0x1 | NAK Interrupt
112734  *
112735  * Field Access Macros:
112736  *
112737  */
112738 /*
112739  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_NAKINTRPT
112740  *
112741  * No interrupt
112742  */
112743 #define ALT_USB_DEV_DOEPINT15_NAKINTRPT_E_INACT 0x0
112744 /*
112745  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_NAKINTRPT
112746  *
112747  * NAK Interrupt
112748  */
112749 #define ALT_USB_DEV_DOEPINT15_NAKINTRPT_E_ACT 0x1
112750 
112751 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_NAKINTRPT register field. */
112752 #define ALT_USB_DEV_DOEPINT15_NAKINTRPT_LSB 13
112753 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_NAKINTRPT register field. */
112754 #define ALT_USB_DEV_DOEPINT15_NAKINTRPT_MSB 13
112755 /* The width in bits of the ALT_USB_DEV_DOEPINT15_NAKINTRPT register field. */
112756 #define ALT_USB_DEV_DOEPINT15_NAKINTRPT_WIDTH 1
112757 /* The mask used to set the ALT_USB_DEV_DOEPINT15_NAKINTRPT register field value. */
112758 #define ALT_USB_DEV_DOEPINT15_NAKINTRPT_SET_MSK 0x00002000
112759 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_NAKINTRPT register field value. */
112760 #define ALT_USB_DEV_DOEPINT15_NAKINTRPT_CLR_MSK 0xffffdfff
112761 /* The reset value of the ALT_USB_DEV_DOEPINT15_NAKINTRPT register field. */
112762 #define ALT_USB_DEV_DOEPINT15_NAKINTRPT_RESET 0x0
112763 /* Extracts the ALT_USB_DEV_DOEPINT15_NAKINTRPT field value from a register. */
112764 #define ALT_USB_DEV_DOEPINT15_NAKINTRPT_GET(value) (((value) & 0x00002000) >> 13)
112765 /* Produces a ALT_USB_DEV_DOEPINT15_NAKINTRPT register field value suitable for setting the register. */
112766 #define ALT_USB_DEV_DOEPINT15_NAKINTRPT_SET(value) (((value) << 13) & 0x00002000)
112767 
112768 /*
112769  * Field : NYET Interrupt - nyetintrpt
112770  *
112771  * The core generates this interrupt when a NYET response is transmitted for a non
112772  * isochronous OUT endpoint.
112773  *
112774  * Field Enumeration Values:
112775  *
112776  * Enum | Value | Description
112777  * :-----------------------------------------|:------|:---------------
112778  * ALT_USB_DEV_DOEPINT15_NYETINTRPT_E_INACT | 0x0 | No interrupt
112779  * ALT_USB_DEV_DOEPINT15_NYETINTRPT_E_ACT | 0x1 | NYET Interrupt
112780  *
112781  * Field Access Macros:
112782  *
112783  */
112784 /*
112785  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_NYETINTRPT
112786  *
112787  * No interrupt
112788  */
112789 #define ALT_USB_DEV_DOEPINT15_NYETINTRPT_E_INACT 0x0
112790 /*
112791  * Enumerated value for register field ALT_USB_DEV_DOEPINT15_NYETINTRPT
112792  *
112793  * NYET Interrupt
112794  */
112795 #define ALT_USB_DEV_DOEPINT15_NYETINTRPT_E_ACT 0x1
112796 
112797 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPINT15_NYETINTRPT register field. */
112798 #define ALT_USB_DEV_DOEPINT15_NYETINTRPT_LSB 14
112799 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPINT15_NYETINTRPT register field. */
112800 #define ALT_USB_DEV_DOEPINT15_NYETINTRPT_MSB 14
112801 /* The width in bits of the ALT_USB_DEV_DOEPINT15_NYETINTRPT register field. */
112802 #define ALT_USB_DEV_DOEPINT15_NYETINTRPT_WIDTH 1
112803 /* The mask used to set the ALT_USB_DEV_DOEPINT15_NYETINTRPT register field value. */
112804 #define ALT_USB_DEV_DOEPINT15_NYETINTRPT_SET_MSK 0x00004000
112805 /* The mask used to clear the ALT_USB_DEV_DOEPINT15_NYETINTRPT register field value. */
112806 #define ALT_USB_DEV_DOEPINT15_NYETINTRPT_CLR_MSK 0xffffbfff
112807 /* The reset value of the ALT_USB_DEV_DOEPINT15_NYETINTRPT register field. */
112808 #define ALT_USB_DEV_DOEPINT15_NYETINTRPT_RESET 0x0
112809 /* Extracts the ALT_USB_DEV_DOEPINT15_NYETINTRPT field value from a register. */
112810 #define ALT_USB_DEV_DOEPINT15_NYETINTRPT_GET(value) (((value) & 0x00004000) >> 14)
112811 /* Produces a ALT_USB_DEV_DOEPINT15_NYETINTRPT register field value suitable for setting the register. */
112812 #define ALT_USB_DEV_DOEPINT15_NYETINTRPT_SET(value) (((value) << 14) & 0x00004000)
112813 
112814 #ifndef __ASSEMBLY__
112815 /*
112816  * WARNING: The C register and register group struct declarations are provided for
112817  * convenience and illustrative purposes. They should, however, be used with
112818  * caution as the C language standard provides no guarantees about the alignment or
112819  * atomicity of device memory accesses. The recommended practice for writing
112820  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
112821  * alt_write_word() functions.
112822  *
112823  * The struct declaration for register ALT_USB_DEV_DOEPINT15.
112824  */
112825 struct ALT_USB_DEV_DOEPINT15_s
112826 {
112827  const uint32_t xfercompl : 1; /* Transfer Completed Interrupt */
112828  const uint32_t epdisbld : 1; /* Endpoint Disabled Interrupt */
112829  const uint32_t ahberr : 1; /* ALT_USB_DEV_DOEPINT15_AHBERR */
112830  const uint32_t setup : 1; /* SETUP Phase Done */
112831  const uint32_t outtknepdis : 1; /* OUT Token Received When Endpoint Disabled */
112832  const uint32_t stsphsercvd : 1; /* Status Phase Received for Control Write */
112833  const uint32_t back2backsetup : 1; /* Back-to-Back SETUP Packets Received */
112834  uint32_t : 1; /* *UNDEFINED* */
112835  const uint32_t outpkterr : 1; /* OUT Packet Error */
112836  const uint32_t bnaintr : 1; /* BNA (Buffer Not Available) Interrupt */
112837  uint32_t : 1; /* *UNDEFINED* */
112838  const uint32_t pktdrpsts : 1; /* Packet Drop Status */
112839  const uint32_t bbleerr : 1; /* BbleErr Interrupt */
112840  const uint32_t nakintrpt : 1; /* NAK Interrupt */
112841  const uint32_t nyetintrpt : 1; /* NYET Interrupt */
112842  uint32_t : 17; /* *UNDEFINED* */
112843 };
112844 
112845 /* The typedef declaration for register ALT_USB_DEV_DOEPINT15. */
112846 typedef volatile struct ALT_USB_DEV_DOEPINT15_s ALT_USB_DEV_DOEPINT15_t;
112847 #endif /* __ASSEMBLY__ */
112848 
112849 /* The byte offset of the ALT_USB_DEV_DOEPINT15 register from the beginning of the component. */
112850 #define ALT_USB_DEV_DOEPINT15_OFST 0x4e8
112851 /* The address of the ALT_USB_DEV_DOEPINT15 register. */
112852 #define ALT_USB_DEV_DOEPINT15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPINT15_OFST))
112853 
112854 /*
112855  * Register : Device OUT Endpoint 15 Transfer Size Register - doeptsiz15
112856  *
112857  * The application must modify this register before enabling the endpoint. Once the
112858  * endpoint is enabled using Endpoint Enable bit of the Device Endpoint-n Control
112859  * registers (DIEPCTLn.EPEna/DOEPCTLn.EPEna), the core modifies this register. The
112860  * application can only read this register once the core has cleared the Endpoint
112861  * Enable bit.
112862  *
112863  * Register Layout
112864  *
112865  * Bits | Access | Reset | Description
112866  * :--------|:-------|:------|:-------------------
112867  * [18:0] | RW | 0x0 | Transfer Size
112868  * [28:19] | RW | 0x0 | Packet Count
112869  * [30:29] | R | 0x0 | SETUP Packet Count
112870  * [31] | ??? | 0x0 | *UNDEFINED*
112871  *
112872  */
112873 /*
112874  * Field : Transfer Size - xfersize
112875  *
112876  * Indicates the transfer size in bytes for endpoint 0. The core interrupts the
112877  * application only after it has exhausted the transfer size amount of data. The
112878  * transfer size can be Set to the maximum packet size of the endpoint, to be
112879  * interrupted at the end of each packet. The core decrements this field every time
112880  * a packet from the external memory is written to the RxFIFO.
112881  *
112882  * Field Access Macros:
112883  *
112884  */
112885 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ15_XFERSIZE register field. */
112886 #define ALT_USB_DEV_DOEPTSIZ15_XFERSIZE_LSB 0
112887 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ15_XFERSIZE register field. */
112888 #define ALT_USB_DEV_DOEPTSIZ15_XFERSIZE_MSB 18
112889 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ15_XFERSIZE register field. */
112890 #define ALT_USB_DEV_DOEPTSIZ15_XFERSIZE_WIDTH 19
112891 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ15_XFERSIZE register field value. */
112892 #define ALT_USB_DEV_DOEPTSIZ15_XFERSIZE_SET_MSK 0x0007ffff
112893 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ15_XFERSIZE register field value. */
112894 #define ALT_USB_DEV_DOEPTSIZ15_XFERSIZE_CLR_MSK 0xfff80000
112895 /* The reset value of the ALT_USB_DEV_DOEPTSIZ15_XFERSIZE register field. */
112896 #define ALT_USB_DEV_DOEPTSIZ15_XFERSIZE_RESET 0x0
112897 /* Extracts the ALT_USB_DEV_DOEPTSIZ15_XFERSIZE field value from a register. */
112898 #define ALT_USB_DEV_DOEPTSIZ15_XFERSIZE_GET(value) (((value) & 0x0007ffff) >> 0)
112899 /* Produces a ALT_USB_DEV_DOEPTSIZ15_XFERSIZE register field value suitable for setting the register. */
112900 #define ALT_USB_DEV_DOEPTSIZ15_XFERSIZE_SET(value) (((value) << 0) & 0x0007ffff)
112901 
112902 /*
112903  * Field : Packet Count - pktcnt
112904  *
112905  * Indicates the total number of USB packets that constitute the Transfer Size
112906  * amount of data for endpoint 0.This field is decremented every time a packet
112907  * (maximum size or short packet) is read from the RxFIFO.
112908  *
112909  * Field Access Macros:
112910  *
112911  */
112912 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ15_PKTCNT register field. */
112913 #define ALT_USB_DEV_DOEPTSIZ15_PKTCNT_LSB 19
112914 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ15_PKTCNT register field. */
112915 #define ALT_USB_DEV_DOEPTSIZ15_PKTCNT_MSB 28
112916 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ15_PKTCNT register field. */
112917 #define ALT_USB_DEV_DOEPTSIZ15_PKTCNT_WIDTH 10
112918 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ15_PKTCNT register field value. */
112919 #define ALT_USB_DEV_DOEPTSIZ15_PKTCNT_SET_MSK 0x1ff80000
112920 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ15_PKTCNT register field value. */
112921 #define ALT_USB_DEV_DOEPTSIZ15_PKTCNT_CLR_MSK 0xe007ffff
112922 /* The reset value of the ALT_USB_DEV_DOEPTSIZ15_PKTCNT register field. */
112923 #define ALT_USB_DEV_DOEPTSIZ15_PKTCNT_RESET 0x0
112924 /* Extracts the ALT_USB_DEV_DOEPTSIZ15_PKTCNT field value from a register. */
112925 #define ALT_USB_DEV_DOEPTSIZ15_PKTCNT_GET(value) (((value) & 0x1ff80000) >> 19)
112926 /* Produces a ALT_USB_DEV_DOEPTSIZ15_PKTCNT register field value suitable for setting the register. */
112927 #define ALT_USB_DEV_DOEPTSIZ15_PKTCNT_SET(value) (((value) << 19) & 0x1ff80000)
112928 
112929 /*
112930  * Field : SETUP Packet Count - rxdpid
112931  *
112932  * Applies to isochronous OUT endpoints only.This is the data PID received in the
112933  * last packet for this endpoint. Use datax.
112934  *
112935  * Applies to control OUT Endpoints only. Use packetx. This field specifies the
112936  * number of back-to-back SETUP data packets the endpoint can receive.
112937  *
112938  * Field Enumeration Values:
112939  *
112940  * Enum | Value | Description
112941  * :------------------------------------------|:------|:-------------------
112942  * ALT_USB_DEV_DOEPTSIZ15_RXDPID_E_DATA0 | 0x0 | DATA0
112943  * ALT_USB_DEV_DOEPTSIZ15_RXDPID_E_DATA2PKT1 | 0x1 | DATA2 or 1 packet
112944  * ALT_USB_DEV_DOEPTSIZ15_RXDPID_E_DATA1PKT2 | 0x2 | DATA1 or 2 packets
112945  * ALT_USB_DEV_DOEPTSIZ15_RXDPID_E_MDATAPKT3 | 0x3 | MDATA or 3 packets
112946  *
112947  * Field Access Macros:
112948  *
112949  */
112950 /*
112951  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ15_RXDPID
112952  *
112953  * DATA0
112954  */
112955 #define ALT_USB_DEV_DOEPTSIZ15_RXDPID_E_DATA0 0x0
112956 /*
112957  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ15_RXDPID
112958  *
112959  * DATA2 or 1 packet
112960  */
112961 #define ALT_USB_DEV_DOEPTSIZ15_RXDPID_E_DATA2PKT1 0x1
112962 /*
112963  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ15_RXDPID
112964  *
112965  * DATA1 or 2 packets
112966  */
112967 #define ALT_USB_DEV_DOEPTSIZ15_RXDPID_E_DATA1PKT2 0x2
112968 /*
112969  * Enumerated value for register field ALT_USB_DEV_DOEPTSIZ15_RXDPID
112970  *
112971  * MDATA or 3 packets
112972  */
112973 #define ALT_USB_DEV_DOEPTSIZ15_RXDPID_E_MDATAPKT3 0x3
112974 
112975 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPTSIZ15_RXDPID register field. */
112976 #define ALT_USB_DEV_DOEPTSIZ15_RXDPID_LSB 29
112977 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPTSIZ15_RXDPID register field. */
112978 #define ALT_USB_DEV_DOEPTSIZ15_RXDPID_MSB 30
112979 /* The width in bits of the ALT_USB_DEV_DOEPTSIZ15_RXDPID register field. */
112980 #define ALT_USB_DEV_DOEPTSIZ15_RXDPID_WIDTH 2
112981 /* The mask used to set the ALT_USB_DEV_DOEPTSIZ15_RXDPID register field value. */
112982 #define ALT_USB_DEV_DOEPTSIZ15_RXDPID_SET_MSK 0x60000000
112983 /* The mask used to clear the ALT_USB_DEV_DOEPTSIZ15_RXDPID register field value. */
112984 #define ALT_USB_DEV_DOEPTSIZ15_RXDPID_CLR_MSK 0x9fffffff
112985 /* The reset value of the ALT_USB_DEV_DOEPTSIZ15_RXDPID register field. */
112986 #define ALT_USB_DEV_DOEPTSIZ15_RXDPID_RESET 0x0
112987 /* Extracts the ALT_USB_DEV_DOEPTSIZ15_RXDPID field value from a register. */
112988 #define ALT_USB_DEV_DOEPTSIZ15_RXDPID_GET(value) (((value) & 0x60000000) >> 29)
112989 /* Produces a ALT_USB_DEV_DOEPTSIZ15_RXDPID register field value suitable for setting the register. */
112990 #define ALT_USB_DEV_DOEPTSIZ15_RXDPID_SET(value) (((value) << 29) & 0x60000000)
112991 
112992 #ifndef __ASSEMBLY__
112993 /*
112994  * WARNING: The C register and register group struct declarations are provided for
112995  * convenience and illustrative purposes. They should, however, be used with
112996  * caution as the C language standard provides no guarantees about the alignment or
112997  * atomicity of device memory accesses. The recommended practice for writing
112998  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
112999  * alt_write_word() functions.
113000  *
113001  * The struct declaration for register ALT_USB_DEV_DOEPTSIZ15.
113002  */
113003 struct ALT_USB_DEV_DOEPTSIZ15_s
113004 {
113005  uint32_t xfersize : 19; /* Transfer Size */
113006  uint32_t pktcnt : 10; /* Packet Count */
113007  const uint32_t rxdpid : 2; /* SETUP Packet Count */
113008  uint32_t : 1; /* *UNDEFINED* */
113009 };
113010 
113011 /* The typedef declaration for register ALT_USB_DEV_DOEPTSIZ15. */
113012 typedef volatile struct ALT_USB_DEV_DOEPTSIZ15_s ALT_USB_DEV_DOEPTSIZ15_t;
113013 #endif /* __ASSEMBLY__ */
113014 
113015 /* The byte offset of the ALT_USB_DEV_DOEPTSIZ15 register from the beginning of the component. */
113016 #define ALT_USB_DEV_DOEPTSIZ15_OFST 0x4f0
113017 /* The address of the ALT_USB_DEV_DOEPTSIZ15 register. */
113018 #define ALT_USB_DEV_DOEPTSIZ15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPTSIZ15_OFST))
113019 
113020 /*
113021  * Register : Device OUT Endpoint 15 DMA Address Register - doepdma15
113022  *
113023  * DMA OUT Address.
113024  *
113025  * Register Layout
113026  *
113027  * Bits | Access | Reset | Description
113028  * :-------|:-------|:--------|:------------
113029  * [31:0] | RW | Unknown | DMA Address
113030  *
113031  */
113032 /*
113033  * Field : DMA Address - doepdma15
113034  *
113035  * Holds the start address of the external memory for storing or fetching endpoint
113036  * data. for control endpoints, this field stores control OUT data packets as well
113037  * as SETUP transaction data packets. When more than three SETUP packets are
113038  * received back-to-back, the SETUP data packet in the memory is overwritten. This
113039  * register is incremented on every AHB transaction. The application can give only
113040  * a DWORD-aligned address.
113041  *
113042  * When Scatter/Gather DMA mode is not enabled, the application programs the start
113043  * address value in this field.
113044  *
113045  * When Scatter/Gather DMA mode is enabled, this field indicates the base pointer
113046  * for the descriptor list.
113047  *
113048  * Field Access Macros:
113049  *
113050  */
113051 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMA15_DOEPDMA15 register field. */
113052 #define ALT_USB_DEV_DOEPDMA15_DOEPDMA15_LSB 0
113053 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMA15_DOEPDMA15 register field. */
113054 #define ALT_USB_DEV_DOEPDMA15_DOEPDMA15_MSB 31
113055 /* The width in bits of the ALT_USB_DEV_DOEPDMA15_DOEPDMA15 register field. */
113056 #define ALT_USB_DEV_DOEPDMA15_DOEPDMA15_WIDTH 32
113057 /* The mask used to set the ALT_USB_DEV_DOEPDMA15_DOEPDMA15 register field value. */
113058 #define ALT_USB_DEV_DOEPDMA15_DOEPDMA15_SET_MSK 0xffffffff
113059 /* The mask used to clear the ALT_USB_DEV_DOEPDMA15_DOEPDMA15 register field value. */
113060 #define ALT_USB_DEV_DOEPDMA15_DOEPDMA15_CLR_MSK 0x00000000
113061 /* The reset value of the ALT_USB_DEV_DOEPDMA15_DOEPDMA15 register field is UNKNOWN. */
113062 #define ALT_USB_DEV_DOEPDMA15_DOEPDMA15_RESET 0x0
113063 /* Extracts the ALT_USB_DEV_DOEPDMA15_DOEPDMA15 field value from a register. */
113064 #define ALT_USB_DEV_DOEPDMA15_DOEPDMA15_GET(value) (((value) & 0xffffffff) >> 0)
113065 /* Produces a ALT_USB_DEV_DOEPDMA15_DOEPDMA15 register field value suitable for setting the register. */
113066 #define ALT_USB_DEV_DOEPDMA15_DOEPDMA15_SET(value) (((value) << 0) & 0xffffffff)
113067 
113068 #ifndef __ASSEMBLY__
113069 /*
113070  * WARNING: The C register and register group struct declarations are provided for
113071  * convenience and illustrative purposes. They should, however, be used with
113072  * caution as the C language standard provides no guarantees about the alignment or
113073  * atomicity of device memory accesses. The recommended practice for writing
113074  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
113075  * alt_write_word() functions.
113076  *
113077  * The struct declaration for register ALT_USB_DEV_DOEPDMA15.
113078  */
113079 struct ALT_USB_DEV_DOEPDMA15_s
113080 {
113081  uint32_t doepdma15 : 32; /* DMA Address */
113082 };
113083 
113084 /* The typedef declaration for register ALT_USB_DEV_DOEPDMA15. */
113085 typedef volatile struct ALT_USB_DEV_DOEPDMA15_s ALT_USB_DEV_DOEPDMA15_t;
113086 #endif /* __ASSEMBLY__ */
113087 
113088 /* The byte offset of the ALT_USB_DEV_DOEPDMA15 register from the beginning of the component. */
113089 #define ALT_USB_DEV_DOEPDMA15_OFST 0x4f4
113090 /* The address of the ALT_USB_DEV_DOEPDMA15 register. */
113091 #define ALT_USB_DEV_DOEPDMA15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMA15_OFST))
113092 
113093 /*
113094  * Register : Device OUT Endpoint 15 DMA Buffer Address Register - doepdmab15
113095  *
113096  * DMA Buffer Address.
113097  *
113098  * Register Layout
113099  *
113100  * Bits | Access | Reset | Description
113101  * :-------|:-------|:--------|:-------------------
113102  * [31:0] | R | Unknown | DMA Buffer Address
113103  *
113104  */
113105 /*
113106  * Field : DMA Buffer Address - doepdmab15
113107  *
113108  * Holds the current buffer address. This register is updated as and when the data
113109  * transfer for the corresponding end point is in progress. This register is
113110  * present only in Scatter/Gather DMA mode.
113111  *
113112  * Field Access Macros:
113113  *
113114  */
113115 /* The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15 register field. */
113116 #define ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15_LSB 0
113117 /* The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15 register field. */
113118 #define ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15_MSB 31
113119 /* The width in bits of the ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15 register field. */
113120 #define ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15_WIDTH 32
113121 /* The mask used to set the ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15 register field value. */
113122 #define ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15_SET_MSK 0xffffffff
113123 /* The mask used to clear the ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15 register field value. */
113124 #define ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15_CLR_MSK 0x00000000
113125 /* The reset value of the ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15 register field is UNKNOWN. */
113126 #define ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15_RESET 0x0
113127 /* Extracts the ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15 field value from a register. */
113128 #define ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15_GET(value) (((value) & 0xffffffff) >> 0)
113129 /* Produces a ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15 register field value suitable for setting the register. */
113130 #define ALT_USB_DEV_DOEPDMAB15_DOEPDMAB15_SET(value) (((value) << 0) & 0xffffffff)
113131 
113132 #ifndef __ASSEMBLY__
113133 /*
113134  * WARNING: The C register and register group struct declarations are provided for
113135  * convenience and illustrative purposes. They should, however, be used with
113136  * caution as the C language standard provides no guarantees about the alignment or
113137  * atomicity of device memory accesses. The recommended practice for writing
113138  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
113139  * alt_write_word() functions.
113140  *
113141  * The struct declaration for register ALT_USB_DEV_DOEPDMAB15.
113142  */
113143 struct ALT_USB_DEV_DOEPDMAB15_s
113144 {
113145  const uint32_t doepdmab15 : 32; /* DMA Buffer Address */
113146 };
113147 
113148 /* The typedef declaration for register ALT_USB_DEV_DOEPDMAB15. */
113149 typedef volatile struct ALT_USB_DEV_DOEPDMAB15_s ALT_USB_DEV_DOEPDMAB15_t;
113150 #endif /* __ASSEMBLY__ */
113151 
113152 /* The byte offset of the ALT_USB_DEV_DOEPDMAB15 register from the beginning of the component. */
113153 #define ALT_USB_DEV_DOEPDMAB15_OFST 0x4fc
113154 /* The address of the ALT_USB_DEV_DOEPDMAB15 register. */
113155 #define ALT_USB_DEV_DOEPDMAB15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPDMAB15_OFST))
113156 
113157 #ifndef __ASSEMBLY__
113158 /*
113159  * WARNING: The C register and register group struct declarations are provided for
113160  * convenience and illustrative purposes. They should, however, be used with
113161  * caution as the C language standard provides no guarantees about the alignment or
113162  * atomicity of device memory accesses. The recommended practice for writing
113163  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
113164  * alt_write_word() functions.
113165  *
113166  * The struct declaration for register group ALT_USB_DEV.
113167  */
113168 struct ALT_USB_DEV_s
113169 {
113170  ALT_USB_DEV_DCFG_t dcfg; /* ALT_USB_DEV_DCFG */
113171  ALT_USB_DEV_DCTL_t dctl; /* ALT_USB_DEV_DCTL */
113172  ALT_USB_DEV_DSTS_t dsts; /* ALT_USB_DEV_DSTS */
113173  volatile uint32_t _pad_0xc_0xf; /* *UNDEFINED* */
113174  ALT_USB_DEV_DIEPMSK_t diepmsk; /* ALT_USB_DEV_DIEPMSK */
113175  ALT_USB_DEV_DOEPMSK_t doepmsk; /* ALT_USB_DEV_DOEPMSK */
113176  ALT_USB_DEV_DAINT_t daint; /* ALT_USB_DEV_DAINT */
113177  ALT_USB_DEV_DAINTMSK_t daintmsk; /* ALT_USB_DEV_DAINTMSK */
113178  volatile uint32_t _pad_0x20_0x27[2]; /* *UNDEFINED* */
113179  ALT_USB_DEV_DVBUSDIS_t dvbusdis; /* ALT_USB_DEV_DVBUSDIS */
113180  ALT_USB_DEV_DVBUSPULSE_t dvbuspulse; /* ALT_USB_DEV_DVBUSPULSE */
113181  ALT_USB_DEV_DTHRCTL_t dthrctl; /* ALT_USB_DEV_DTHRCTL */
113182  ALT_USB_DEV_DIEPEMPMSK_t diepempmsk; /* ALT_USB_DEV_DIEPEMPMSK */
113183  volatile uint32_t _pad_0x38_0xff[50]; /* *UNDEFINED* */
113184  ALT_USB_DEV_DIEPCTL0_t diepctl0; /* ALT_USB_DEV_DIEPCTL0 */
113185  volatile uint32_t _pad_0x104_0x107; /* *UNDEFINED* */
113186  ALT_USB_DEV_DIEPINT0_t diepint0; /* ALT_USB_DEV_DIEPINT0 */
113187  volatile uint32_t _pad_0x10c_0x10f; /* *UNDEFINED* */
113188  ALT_USB_DEV_DIEPTSIZ0_t dieptsiz0; /* ALT_USB_DEV_DIEPTSIZ0 */
113189  ALT_USB_DEV_DIEPDMA0_t diepdma0; /* ALT_USB_DEV_DIEPDMA0 */
113190  ALT_USB_DEV_DTXFSTS0_t dtxfsts0; /* ALT_USB_DEV_DTXFSTS0 */
113191  ALT_USB_DEV_DIEPDMAB0_t diepdmab0; /* ALT_USB_DEV_DIEPDMAB0 */
113192  ALT_USB_DEV_DIEPCTL1_t diepctl1; /* ALT_USB_DEV_DIEPCTL1 */
113193  volatile uint32_t _pad_0x124_0x127; /* *UNDEFINED* */
113194  ALT_USB_DEV_DIEPINT1_t diepint1; /* ALT_USB_DEV_DIEPINT1 */
113195  volatile uint32_t _pad_0x12c_0x12f; /* *UNDEFINED* */
113196  ALT_USB_DEV_DIEPTSIZ1_t dieptsiz1; /* ALT_USB_DEV_DIEPTSIZ1 */
113197  ALT_USB_DEV_DIEPDMA1_t diepdma1; /* ALT_USB_DEV_DIEPDMA1 */
113198  ALT_USB_DEV_DTXFSTS1_t dtxfsts1; /* ALT_USB_DEV_DTXFSTS1 */
113199  ALT_USB_DEV_DIEPDMAB1_t diepdmab1; /* ALT_USB_DEV_DIEPDMAB1 */
113200  ALT_USB_DEV_DIEPCTL2_t diepctl2; /* ALT_USB_DEV_DIEPCTL2 */
113201  volatile uint32_t _pad_0x144_0x147; /* *UNDEFINED* */
113202  ALT_USB_DEV_DIEPINT2_t diepint2; /* ALT_USB_DEV_DIEPINT2 */
113203  volatile uint32_t _pad_0x14c_0x14f; /* *UNDEFINED* */
113204  ALT_USB_DEV_DIEPTSIZ2_t dieptsiz2; /* ALT_USB_DEV_DIEPTSIZ2 */
113205  ALT_USB_DEV_DIEPDMA2_t diepdma2; /* ALT_USB_DEV_DIEPDMA2 */
113206  ALT_USB_DEV_DTXFSTS2_t DTXFSTS2; /* ALT_USB_DEV_DTXFSTS2 */
113207  ALT_USB_DEV_DIEPDMAB2_t diepdmab2; /* ALT_USB_DEV_DIEPDMAB2 */
113208  ALT_USB_DEV_DIEPCTL3_t diepctl3; /* ALT_USB_DEV_DIEPCTL3 */
113209  volatile uint32_t _pad_0x164_0x167; /* *UNDEFINED* */
113210  ALT_USB_DEV_DIEPINT3_t diepint3; /* ALT_USB_DEV_DIEPINT3 */
113211  volatile uint32_t _pad_0x16c_0x16f; /* *UNDEFINED* */
113212  ALT_USB_DEV_DIEPTSIZ3_t dieptsiz3; /* ALT_USB_DEV_DIEPTSIZ3 */
113213  ALT_USB_DEV_DIEPDMA3_t diepdma3; /* ALT_USB_DEV_DIEPDMA3 */
113214  ALT_USB_DEV_DTXFSTS3_t dtxfsts3; /* ALT_USB_DEV_DTXFSTS3 */
113215  ALT_USB_DEV_DIEPDMAB3_t diepdmab3; /* ALT_USB_DEV_DIEPDMAB3 */
113216  ALT_USB_DEV_DIEPCTL4_t diepctl4; /* ALT_USB_DEV_DIEPCTL4 */
113217  volatile uint32_t _pad_0x184_0x187; /* *UNDEFINED* */
113218  ALT_USB_DEV_DIEPINT4_t diepint4; /* ALT_USB_DEV_DIEPINT4 */
113219  volatile uint32_t _pad_0x18c_0x18f; /* *UNDEFINED* */
113220  ALT_USB_DEV_DIEPTSIZ4_t dieptsiz4; /* ALT_USB_DEV_DIEPTSIZ4 */
113221  ALT_USB_DEV_DIEPDMA4_t diepdma4; /* ALT_USB_DEV_DIEPDMA4 */
113222  ALT_USB_DEV_DTXFSTS4_t dtxfsts4; /* ALT_USB_DEV_DTXFSTS4 */
113223  ALT_USB_DEV_DIEPDMAB4_t diepdmab4; /* ALT_USB_DEV_DIEPDMAB4 */
113224  ALT_USB_DEV_DIEPCTL5_t diepctl5; /* ALT_USB_DEV_DIEPCTL5 */
113225  volatile uint32_t _pad_0x1a4_0x1a7; /* *UNDEFINED* */
113226  ALT_USB_DEV_DIEPINT5_t diepint5; /* ALT_USB_DEV_DIEPINT5 */
113227  volatile uint32_t _pad_0x1ac_0x1af; /* *UNDEFINED* */
113228  ALT_USB_DEV_DIEPTSIZ5_t dieptsiz5; /* ALT_USB_DEV_DIEPTSIZ5 */
113229  ALT_USB_DEV_DIEPDMA5_t diepdma5; /* ALT_USB_DEV_DIEPDMA5 */
113230  ALT_USB_DEV_DTXFSTS5_t dtxfsts5; /* ALT_USB_DEV_DTXFSTS5 */
113231  ALT_USB_DEV_DIEPDMAB5_t diepdmab5; /* ALT_USB_DEV_DIEPDMAB5 */
113232  ALT_USB_DEV_DIEPCTL6_t diepctl6; /* ALT_USB_DEV_DIEPCTL6 */
113233  volatile uint32_t _pad_0x1c4_0x1c7; /* *UNDEFINED* */
113234  ALT_USB_DEV_DIEPINT6_t diepint6; /* ALT_USB_DEV_DIEPINT6 */
113235  volatile uint32_t _pad_0x1cc_0x1cf; /* *UNDEFINED* */
113236  ALT_USB_DEV_DIEPTSIZ6_t dieptsiz6; /* ALT_USB_DEV_DIEPTSIZ6 */
113237  ALT_USB_DEV_DIEPDMA6_t diepdma6; /* ALT_USB_DEV_DIEPDMA6 */
113238  ALT_USB_DEV_DTXFSTS6_t dtxfsts6; /* ALT_USB_DEV_DTXFSTS6 */
113239  ALT_USB_DEV_DIEPDMAB6_t diepdmab6; /* ALT_USB_DEV_DIEPDMAB6 */
113240  ALT_USB_DEV_DIEPCTL7_t diepctl7; /* ALT_USB_DEV_DIEPCTL7 */
113241  volatile uint32_t _pad_0x1e4_0x1e7; /* *UNDEFINED* */
113242  ALT_USB_DEV_DIEPINT7_t diepint7; /* ALT_USB_DEV_DIEPINT7 */
113243  volatile uint32_t _pad_0x1ec_0x1ef; /* *UNDEFINED* */
113244  ALT_USB_DEV_DIEPTSIZ7_t dieptsiz7; /* ALT_USB_DEV_DIEPTSIZ7 */
113245  ALT_USB_DEV_DIEPDMA7_t diepdma7; /* ALT_USB_DEV_DIEPDMA7 */
113246  ALT_USB_DEV_DTXFSTS7_t dtxfsts7; /* ALT_USB_DEV_DTXFSTS7 */
113247  ALT_USB_DEV_DIEPDMAB7_t diepdmab7; /* ALT_USB_DEV_DIEPDMAB7 */
113248  ALT_USB_DEV_DIEPCTL8_t diepctl8; /* ALT_USB_DEV_DIEPCTL8 */
113249  volatile uint32_t _pad_0x204_0x207; /* *UNDEFINED* */
113250  ALT_USB_DEV_DIEPINT8_t diepint8; /* ALT_USB_DEV_DIEPINT8 */
113251  volatile uint32_t _pad_0x20c_0x20f; /* *UNDEFINED* */
113252  ALT_USB_DEV_DIEPTSIZ8_t dieptsiz8; /* ALT_USB_DEV_DIEPTSIZ8 */
113253  ALT_USB_DEV_DIEPDMA8_t diepdma8; /* ALT_USB_DEV_DIEPDMA8 */
113254  ALT_USB_DEV_DTXFSTS8_t dtxfsts8; /* ALT_USB_DEV_DTXFSTS8 */
113255  ALT_USB_DEV_DIEPDMAB8_t diepdmab8; /* ALT_USB_DEV_DIEPDMAB8 */
113256  ALT_USB_DEV_DIEPCTL9_t diepctl9; /* ALT_USB_DEV_DIEPCTL9 */
113257  volatile uint32_t _pad_0x224_0x227; /* *UNDEFINED* */
113258  ALT_USB_DEV_DIEPINT9_t diepint9; /* ALT_USB_DEV_DIEPINT9 */
113259  volatile uint32_t _pad_0x22c_0x22f; /* *UNDEFINED* */
113260  ALT_USB_DEV_DIEPTSIZ9_t dieptsiz9; /* ALT_USB_DEV_DIEPTSIZ9 */
113261  ALT_USB_DEV_DIEPDMA9_t diepdma9; /* ALT_USB_DEV_DIEPDMA9 */
113262  ALT_USB_DEV_DTXFSTS9_t dtxfsts9; /* ALT_USB_DEV_DTXFSTS9 */
113263  ALT_USB_DEV_DIEPDMAB9_t diepdmab9; /* ALT_USB_DEV_DIEPDMAB9 */
113264  ALT_USB_DEV_DIEPCTL10_t diepctl10; /* ALT_USB_DEV_DIEPCTL10 */
113265  volatile uint32_t _pad_0x244_0x247; /* *UNDEFINED* */
113266  ALT_USB_DEV_DIEPINT10_t diepint10; /* ALT_USB_DEV_DIEPINT10 */
113267  volatile uint32_t _pad_0x24c_0x24f; /* *UNDEFINED* */
113268  ALT_USB_DEV_DIEPTSIZ10_t dieptsiz10; /* ALT_USB_DEV_DIEPTSIZ10 */
113269  ALT_USB_DEV_DIEPDMA10_t diepdma10; /* ALT_USB_DEV_DIEPDMA10 */
113270  ALT_USB_DEV_DTXFSTS10_t dtxfsts10; /* ALT_USB_DEV_DTXFSTS10 */
113271  ALT_USB_DEV_DIEPDMAB10_t diepdmab10; /* ALT_USB_DEV_DIEPDMAB10 */
113272  ALT_USB_DEV_DIEPCTL11_t diepctl11; /* ALT_USB_DEV_DIEPCTL11 */
113273  volatile uint32_t _pad_0x264_0x267; /* *UNDEFINED* */
113274  ALT_USB_DEV_DIEPINT11_t diepint11; /* ALT_USB_DEV_DIEPINT11 */
113275  volatile uint32_t _pad_0x26c_0x26f; /* *UNDEFINED* */
113276  ALT_USB_DEV_DIEPTSIZ11_t dieptsiz11; /* ALT_USB_DEV_DIEPTSIZ11 */
113277  ALT_USB_DEV_DIEPDMA11_t diepdma11; /* ALT_USB_DEV_DIEPDMA11 */
113278  ALT_USB_DEV_DTXFSTS11_t dtxfsts11; /* ALT_USB_DEV_DTXFSTS11 */
113279  ALT_USB_DEV_DIEPDMAB11_t diepdmab11; /* ALT_USB_DEV_DIEPDMAB11 */
113280  ALT_USB_DEV_DIEPCTL12_t diepctl12; /* ALT_USB_DEV_DIEPCTL12 */
113281  volatile uint32_t _pad_0x284_0x287; /* *UNDEFINED* */
113282  ALT_USB_DEV_DIEPINT12_t diepint12; /* ALT_USB_DEV_DIEPINT12 */
113283  volatile uint32_t _pad_0x28c_0x28f; /* *UNDEFINED* */
113284  ALT_USB_DEV_DIEPTSIZ12_t dieptsiz12; /* ALT_USB_DEV_DIEPTSIZ12 */
113285  ALT_USB_DEV_DIEPDMA12_t diepdma12; /* ALT_USB_DEV_DIEPDMA12 */
113286  ALT_USB_DEV_DTXFSTS12_t dtxfsts12; /* ALT_USB_DEV_DTXFSTS12 */
113287  ALT_USB_DEV_DIEPDMAB12_t diepdmab12; /* ALT_USB_DEV_DIEPDMAB12 */
113288  ALT_USB_DEV_DIEPCTL13_t diepctl13; /* ALT_USB_DEV_DIEPCTL13 */
113289  volatile uint32_t _pad_0x2a4_0x2a7; /* *UNDEFINED* */
113290  ALT_USB_DEV_DIEPINT13_t diepint13; /* ALT_USB_DEV_DIEPINT13 */
113291  volatile uint32_t _pad_0x2ac_0x2af; /* *UNDEFINED* */
113292  ALT_USB_DEV_DIEPTSIZ13_t dieptsiz13; /* ALT_USB_DEV_DIEPTSIZ13 */
113293  ALT_USB_DEV_DIEPDMA13_t diepdma13; /* ALT_USB_DEV_DIEPDMA13 */
113294  ALT_USB_DEV_DTXFSTS13_t dtxfsts13; /* ALT_USB_DEV_DTXFSTS13 */
113295  ALT_USB_DEV_DIEPDMAB13_t diepdmab13; /* ALT_USB_DEV_DIEPDMAB13 */
113296  ALT_USB_DEV_DIEPCTL14_t diepctl14; /* ALT_USB_DEV_DIEPCTL14 */
113297  volatile uint32_t _pad_0x2c4_0x2c7; /* *UNDEFINED* */
113298  ALT_USB_DEV_DIEPINT14_t diepint14; /* ALT_USB_DEV_DIEPINT14 */
113299  volatile uint32_t _pad_0x2cc_0x2cf; /* *UNDEFINED* */
113300  ALT_USB_DEV_DIEPTSIZ14_t dieptsiz14; /* ALT_USB_DEV_DIEPTSIZ14 */
113301  ALT_USB_DEV_DIEPDMA14_t diepdma14; /* ALT_USB_DEV_DIEPDMA14 */
113302  ALT_USB_DEV_DTXFSTS14_t dtxfsts14; /* ALT_USB_DEV_DTXFSTS14 */
113303  ALT_USB_DEV_DIEPDMAB14_t diepdmab14; /* ALT_USB_DEV_DIEPDMAB14 */
113304  ALT_USB_DEV_DIEPCTL15_t diepctl15; /* ALT_USB_DEV_DIEPCTL15 */
113305  volatile uint32_t _pad_0x2e4_0x2e7; /* *UNDEFINED* */
113306  ALT_USB_DEV_DIEPINT15_t diepint15; /* ALT_USB_DEV_DIEPINT15 */
113307  volatile uint32_t _pad_0x2ec_0x2ef; /* *UNDEFINED* */
113308  ALT_USB_DEV_DIEPTSIZ15_t dieptsiz15; /* ALT_USB_DEV_DIEPTSIZ15 */
113309  ALT_USB_DEV_DIEPDMA15_t diepdma15; /* ALT_USB_DEV_DIEPDMA15 */
113310  ALT_USB_DEV_DTXFSTS15_t dtxfsts15; /* ALT_USB_DEV_DTXFSTS15 */
113311  ALT_USB_DEV_DIEPDMAB15_t diepdmab15; /* ALT_USB_DEV_DIEPDMAB15 */
113312  ALT_USB_DEV_DOEPCTL0_t doepctl0; /* ALT_USB_DEV_DOEPCTL0 */
113313  volatile uint32_t _pad_0x304_0x307; /* *UNDEFINED* */
113314  ALT_USB_DEV_DOEPINT0_t doepint0; /* ALT_USB_DEV_DOEPINT0 */
113315  volatile uint32_t _pad_0x30c_0x30f; /* *UNDEFINED* */
113316  ALT_USB_DEV_DOEPTSIZ0_t doeptsiz0; /* ALT_USB_DEV_DOEPTSIZ0 */
113317  ALT_USB_DEV_DOEPDMA0_t doepdma0; /* ALT_USB_DEV_DOEPDMA0 */
113318  volatile uint32_t _pad_0x318_0x31b; /* *UNDEFINED* */
113319  ALT_USB_DEV_DOEPDMAB0_t doepdmab0; /* ALT_USB_DEV_DOEPDMAB0 */
113320  ALT_USB_DEV_DOEPCTL1_t doepctl1; /* ALT_USB_DEV_DOEPCTL1 */
113321  volatile uint32_t _pad_0x324_0x327; /* *UNDEFINED* */
113322  ALT_USB_DEV_DOEPINT1_t doepint1; /* ALT_USB_DEV_DOEPINT1 */
113323  volatile uint32_t _pad_0x32c_0x32f; /* *UNDEFINED* */
113324  ALT_USB_DEV_DOEPTSIZ1_t doeptsiz1; /* ALT_USB_DEV_DOEPTSIZ1 */
113325  ALT_USB_DEV_DOEPDMA1_t doepdma1; /* ALT_USB_DEV_DOEPDMA1 */
113326  volatile uint32_t _pad_0x338_0x33b; /* *UNDEFINED* */
113327  ALT_USB_DEV_DOEPDMAB1_t doepdmab1; /* ALT_USB_DEV_DOEPDMAB1 */
113328  ALT_USB_DEV_DOEPCTL2_t DOEPCTL2; /* ALT_USB_DEV_DOEPCTL2 */
113329  volatile uint32_t _pad_0x344_0x347; /* *UNDEFINED* */
113330  ALT_USB_DEV_DOEPINT2_t doepint2; /* ALT_USB_DEV_DOEPINT2 */
113331  volatile uint32_t _pad_0x34c_0x34f; /* *UNDEFINED* */
113332  ALT_USB_DEV_DOEPTSIZ2_t doeptsiz2; /* ALT_USB_DEV_DOEPTSIZ2 */
113333  ALT_USB_DEV_DOEPDMA2_t doepdma2; /* ALT_USB_DEV_DOEPDMA2 */
113334  volatile uint32_t _pad_0x358_0x35b; /* *UNDEFINED* */
113335  ALT_USB_DEV_DOEPDMAB2_t doepdmab2; /* ALT_USB_DEV_DOEPDMAB2 */
113336  ALT_USB_DEV_DOEPCTL3_t DOEPCTL3; /* ALT_USB_DEV_DOEPCTL3 */
113337  volatile uint32_t _pad_0x364_0x367; /* *UNDEFINED* */
113338  ALT_USB_DEV_DOEPINT3_t doepint3; /* ALT_USB_DEV_DOEPINT3 */
113339  volatile uint32_t _pad_0x36c_0x36f; /* *UNDEFINED* */
113340  ALT_USB_DEV_DOEPTSIZ3_t doeptsiz3; /* ALT_USB_DEV_DOEPTSIZ3 */
113341  ALT_USB_DEV_DOEPDMA3_t doepdma3; /* ALT_USB_DEV_DOEPDMA3 */
113342  volatile uint32_t _pad_0x378_0x37b; /* *UNDEFINED* */
113343  ALT_USB_DEV_DOEPDMAB3_t doepdmab3; /* ALT_USB_DEV_DOEPDMAB3 */
113344  ALT_USB_DEV_DOEPCTL4_t doepctl4; /* ALT_USB_DEV_DOEPCTL4 */
113345  volatile uint32_t _pad_0x384_0x387; /* *UNDEFINED* */
113346  ALT_USB_DEV_DOEPINT4_t Doepint4; /* ALT_USB_DEV_DOEPINT4 */
113347  volatile uint32_t _pad_0x38c_0x38f; /* *UNDEFINED* */
113348  ALT_USB_DEV_DOEPTSIZ4_t doeptsiz4; /* ALT_USB_DEV_DOEPTSIZ4 */
113349  ALT_USB_DEV_DOEPDMA4_t doepdma4; /* ALT_USB_DEV_DOEPDMA4 */
113350  volatile uint32_t _pad_0x398_0x39b; /* *UNDEFINED* */
113351  ALT_USB_DEV_DOEPDMAB4_t doepdmab4; /* ALT_USB_DEV_DOEPDMAB4 */
113352  ALT_USB_DEV_DOEPCTL5_t doepctl5; /* ALT_USB_DEV_DOEPCTL5 */
113353  volatile uint32_t _pad_0x3a4_0x3a7; /* *UNDEFINED* */
113354  ALT_USB_DEV_DOEPINT5_t doepint5; /* ALT_USB_DEV_DOEPINT5 */
113355  volatile uint32_t _pad_0x3ac_0x3af; /* *UNDEFINED* */
113356  ALT_USB_DEV_DOEPTSIZ5_t doeptsiz5; /* ALT_USB_DEV_DOEPTSIZ5 */
113357  ALT_USB_DEV_DOEPDMA5_t doepdma5; /* ALT_USB_DEV_DOEPDMA5 */
113358  volatile uint32_t _pad_0x3b8_0x3bb; /* *UNDEFINED* */
113359  ALT_USB_DEV_DOEPDMAB5_t doepdmab5; /* ALT_USB_DEV_DOEPDMAB5 */
113360  ALT_USB_DEV_DOEPCTL6_t doepctl6; /* ALT_USB_DEV_DOEPCTL6 */
113361  volatile uint32_t _pad_0x3c4_0x3c7; /* *UNDEFINED* */
113362  ALT_USB_DEV_DOEPINT6_t doepint6; /* ALT_USB_DEV_DOEPINT6 */
113363  volatile uint32_t _pad_0x3cc_0x3cf; /* *UNDEFINED* */
113364  ALT_USB_DEV_DOEPTSIZ6_t doeptsiz6; /* ALT_USB_DEV_DOEPTSIZ6 */
113365  ALT_USB_DEV_DOEPDMA6_t doepdma6; /* ALT_USB_DEV_DOEPDMA6 */
113366  volatile uint32_t _pad_0x3d8_0x3db; /* *UNDEFINED* */
113367  ALT_USB_DEV_DOEPDMAB6_t doepdmab6; /* ALT_USB_DEV_DOEPDMAB6 */
113368  ALT_USB_DEV_DOEPCTL7_t doepctl7; /* ALT_USB_DEV_DOEPCTL7 */
113369  volatile uint32_t _pad_0x3e4_0x3e7; /* *UNDEFINED* */
113370  ALT_USB_DEV_DOEPINT7_t doepint7; /* ALT_USB_DEV_DOEPINT7 */
113371  volatile uint32_t _pad_0x3ec_0x3ef; /* *UNDEFINED* */
113372  ALT_USB_DEV_DOEPTSIZ7_t doeptsiz7; /* ALT_USB_DEV_DOEPTSIZ7 */
113373  ALT_USB_DEV_DOEPDMA7_t doepdma7; /* ALT_USB_DEV_DOEPDMA7 */
113374  volatile uint32_t _pad_0x3f8_0x3fb; /* *UNDEFINED* */
113375  ALT_USB_DEV_DOEPDMAB7_t doepdmab7; /* ALT_USB_DEV_DOEPDMAB7 */
113376  ALT_USB_DEV_DOEPCTL8_t doepctl8; /* ALT_USB_DEV_DOEPCTL8 */
113377  volatile uint32_t _pad_0x404_0x407; /* *UNDEFINED* */
113378  ALT_USB_DEV_DOEPINT8_t doepint8; /* ALT_USB_DEV_DOEPINT8 */
113379  volatile uint32_t _pad_0x40c_0x40f; /* *UNDEFINED* */
113380  ALT_USB_DEV_DOEPTSIZ8_t doeptsiz8; /* ALT_USB_DEV_DOEPTSIZ8 */
113381  ALT_USB_DEV_DOEPDMA8_t doepdma8; /* ALT_USB_DEV_DOEPDMA8 */
113382  volatile uint32_t _pad_0x418_0x41b; /* *UNDEFINED* */
113383  ALT_USB_DEV_DOEPDMAB8_t doepdmab8; /* ALT_USB_DEV_DOEPDMAB8 */
113384  ALT_USB_DEV_DOEPCTL9_t doepctl9; /* ALT_USB_DEV_DOEPCTL9 */
113385  volatile uint32_t _pad_0x424_0x427; /* *UNDEFINED* */
113386  ALT_USB_DEV_DOEPINT9_t doepint9; /* ALT_USB_DEV_DOEPINT9 */
113387  volatile uint32_t _pad_0x42c_0x42f; /* *UNDEFINED* */
113388  ALT_USB_DEV_DOEPTSIZ9_t doeptsiz9; /* ALT_USB_DEV_DOEPTSIZ9 */
113389  ALT_USB_DEV_DOEPDMA9_t doepdma9; /* ALT_USB_DEV_DOEPDMA9 */
113390  volatile uint32_t _pad_0x438_0x43b; /* *UNDEFINED* */
113391  ALT_USB_DEV_DOEPDMAB9_t doepdmab9; /* ALT_USB_DEV_DOEPDMAB9 */
113392  ALT_USB_DEV_DOEPCTL10_t doepctl10; /* ALT_USB_DEV_DOEPCTL10 */
113393  volatile uint32_t _pad_0x444_0x447; /* *UNDEFINED* */
113394  ALT_USB_DEV_DOEPINT10_t doepint10; /* ALT_USB_DEV_DOEPINT10 */
113395  volatile uint32_t _pad_0x44c_0x44f; /* *UNDEFINED* */
113396  ALT_USB_DEV_DOEPTSIZ10_t doeptsiz10; /* ALT_USB_DEV_DOEPTSIZ10 */
113397  ALT_USB_DEV_DOEPDMA10_t doepdma10; /* ALT_USB_DEV_DOEPDMA10 */
113398  volatile uint32_t _pad_0x458_0x45b; /* *UNDEFINED* */
113399  ALT_USB_DEV_DOEPDMAB10_t doepdmab10; /* ALT_USB_DEV_DOEPDMAB10 */
113400  ALT_USB_DEV_DOEPCTL11_t doepctl11; /* ALT_USB_DEV_DOEPCTL11 */
113401  volatile uint32_t _pad_0x464_0x467; /* *UNDEFINED* */
113402  ALT_USB_DEV_DOEPINT11_t doepint11; /* ALT_USB_DEV_DOEPINT11 */
113403  volatile uint32_t _pad_0x46c_0x46f; /* *UNDEFINED* */
113404  ALT_USB_DEV_DOEPTSIZ11_t doeptsiz11; /* ALT_USB_DEV_DOEPTSIZ11 */
113405  ALT_USB_DEV_DOEPDMA11_t doepdma11; /* ALT_USB_DEV_DOEPDMA11 */
113406  volatile uint32_t _pad_0x478_0x47b; /* *UNDEFINED* */
113407  ALT_USB_DEV_DOEPDMAB11_t doepdmab11; /* ALT_USB_DEV_DOEPDMAB11 */
113408  ALT_USB_DEV_DOEPCTL12_t doepctl12; /* ALT_USB_DEV_DOEPCTL12 */
113409  volatile uint32_t _pad_0x484_0x487; /* *UNDEFINED* */
113410  ALT_USB_DEV_DOEPINT12_t doepint12; /* ALT_USB_DEV_DOEPINT12 */
113411  volatile uint32_t _pad_0x48c_0x48f; /* *UNDEFINED* */
113412  ALT_USB_DEV_DOEPTSIZ12_t doeptsiz12; /* ALT_USB_DEV_DOEPTSIZ12 */
113413  ALT_USB_DEV_DOEPDMA12_t doepdma12; /* ALT_USB_DEV_DOEPDMA12 */
113414  volatile uint32_t _pad_0x498_0x49b; /* *UNDEFINED* */
113415  ALT_USB_DEV_DOEPDMAB12_t doepdmab12; /* ALT_USB_DEV_DOEPDMAB12 */
113416  ALT_USB_DEV_DOEPCTL13_t doepctl13; /* ALT_USB_DEV_DOEPCTL13 */
113417  volatile uint32_t _pad_0x4a4_0x4a7; /* *UNDEFINED* */
113418  ALT_USB_DEV_DOEPINT13_t doepint13; /* ALT_USB_DEV_DOEPINT13 */
113419  volatile uint32_t _pad_0x4ac_0x4af; /* *UNDEFINED* */
113420  ALT_USB_DEV_DOEPTSIZ13_t doeptsiz13; /* ALT_USB_DEV_DOEPTSIZ13 */
113421  ALT_USB_DEV_DOEPDMA13_t doepdma13; /* ALT_USB_DEV_DOEPDMA13 */
113422  volatile uint32_t _pad_0x4b8_0x4bb; /* *UNDEFINED* */
113423  ALT_USB_DEV_DOEPDMAB13_t doepdmab13; /* ALT_USB_DEV_DOEPDMAB13 */
113424  ALT_USB_DEV_DOEPCTL14_t doepctl14; /* ALT_USB_DEV_DOEPCTL14 */
113425  volatile uint32_t _pad_0x4c4_0x4c7; /* *UNDEFINED* */
113426  ALT_USB_DEV_DOEPINT14_t doepint14; /* ALT_USB_DEV_DOEPINT14 */
113427  volatile uint32_t _pad_0x4cc_0x4cf; /* *UNDEFINED* */
113428  ALT_USB_DEV_DOEPTSIZ14_t doeptsiz14; /* ALT_USB_DEV_DOEPTSIZ14 */
113429  ALT_USB_DEV_DOEPDMA14_t doepdma14; /* ALT_USB_DEV_DOEPDMA14 */
113430  volatile uint32_t _pad_0x4d8_0x4db; /* *UNDEFINED* */
113431  ALT_USB_DEV_DOEPDMAB14_t doepdmab14; /* ALT_USB_DEV_DOEPDMAB14 */
113432  ALT_USB_DEV_DOEPCTL15_t doepctl15; /* ALT_USB_DEV_DOEPCTL15 */
113433  volatile uint32_t _pad_0x4e4_0x4e7; /* *UNDEFINED* */
113434  ALT_USB_DEV_DOEPINT15_t doepint15; /* ALT_USB_DEV_DOEPINT15 */
113435  volatile uint32_t _pad_0x4ec_0x4ef; /* *UNDEFINED* */
113436  ALT_USB_DEV_DOEPTSIZ15_t doeptsiz15; /* ALT_USB_DEV_DOEPTSIZ15 */
113437  ALT_USB_DEV_DOEPDMA15_t doepdma15; /* ALT_USB_DEV_DOEPDMA15 */
113438  volatile uint32_t _pad_0x4f8_0x4fb; /* *UNDEFINED* */
113439  ALT_USB_DEV_DOEPDMAB15_t doepdmab15; /* ALT_USB_DEV_DOEPDMAB15 */
113440 };
113441 
113442 /* The typedef declaration for register group ALT_USB_DEV. */
113443 typedef volatile struct ALT_USB_DEV_s ALT_USB_DEV_t;
113444 /* The struct declaration for the raw register contents of register group ALT_USB_DEV. */
113445 struct ALT_USB_DEV_raw_s
113446 {
113447  volatile uint32_t dcfg; /* ALT_USB_DEV_DCFG */
113448  volatile uint32_t dctl; /* ALT_USB_DEV_DCTL */
113449  volatile uint32_t dsts; /* ALT_USB_DEV_DSTS */
113450  uint32_t _pad_0xc_0xf; /* *UNDEFINED* */
113451  volatile uint32_t diepmsk; /* ALT_USB_DEV_DIEPMSK */
113452  volatile uint32_t doepmsk; /* ALT_USB_DEV_DOEPMSK */
113453  volatile uint32_t daint; /* ALT_USB_DEV_DAINT */
113454  volatile uint32_t daintmsk; /* ALT_USB_DEV_DAINTMSK */
113455  uint32_t _pad_0x20_0x27[2]; /* *UNDEFINED* */
113456  volatile uint32_t dvbusdis; /* ALT_USB_DEV_DVBUSDIS */
113457  volatile uint32_t dvbuspulse; /* ALT_USB_DEV_DVBUSPULSE */
113458  volatile uint32_t dthrctl; /* ALT_USB_DEV_DTHRCTL */
113459  volatile uint32_t diepempmsk; /* ALT_USB_DEV_DIEPEMPMSK */
113460  uint32_t _pad_0x38_0xff[50]; /* *UNDEFINED* */
113461  volatile uint32_t diepctl0; /* ALT_USB_DEV_DIEPCTL0 */
113462  uint32_t _pad_0x104_0x107; /* *UNDEFINED* */
113463  volatile uint32_t diepint0; /* ALT_USB_DEV_DIEPINT0 */
113464  uint32_t _pad_0x10c_0x10f; /* *UNDEFINED* */
113465  volatile uint32_t dieptsiz0; /* ALT_USB_DEV_DIEPTSIZ0 */
113466  volatile uint32_t diepdma0; /* ALT_USB_DEV_DIEPDMA0 */
113467  volatile uint32_t dtxfsts0; /* ALT_USB_DEV_DTXFSTS0 */
113468  volatile uint32_t diepdmab0; /* ALT_USB_DEV_DIEPDMAB0 */
113469  volatile uint32_t diepctl1; /* ALT_USB_DEV_DIEPCTL1 */
113470  uint32_t _pad_0x124_0x127; /* *UNDEFINED* */
113471  volatile uint32_t diepint1; /* ALT_USB_DEV_DIEPINT1 */
113472  uint32_t _pad_0x12c_0x12f; /* *UNDEFINED* */
113473  volatile uint32_t dieptsiz1; /* ALT_USB_DEV_DIEPTSIZ1 */
113474  volatile uint32_t diepdma1; /* ALT_USB_DEV_DIEPDMA1 */
113475  volatile uint32_t dtxfsts1; /* ALT_USB_DEV_DTXFSTS1 */
113476  volatile uint32_t diepdmab1; /* ALT_USB_DEV_DIEPDMAB1 */
113477  volatile uint32_t diepctl2; /* ALT_USB_DEV_DIEPCTL2 */
113478  uint32_t _pad_0x144_0x147; /* *UNDEFINED* */
113479  volatile uint32_t diepint2; /* ALT_USB_DEV_DIEPINT2 */
113480  uint32_t _pad_0x14c_0x14f; /* *UNDEFINED* */
113481  volatile uint32_t dieptsiz2; /* ALT_USB_DEV_DIEPTSIZ2 */
113482  volatile uint32_t diepdma2; /* ALT_USB_DEV_DIEPDMA2 */
113483  volatile uint32_t DTXFSTS2; /* ALT_USB_DEV_DTXFSTS2 */
113484  volatile uint32_t diepdmab2; /* ALT_USB_DEV_DIEPDMAB2 */
113485  volatile uint32_t diepctl3; /* ALT_USB_DEV_DIEPCTL3 */
113486  uint32_t _pad_0x164_0x167; /* *UNDEFINED* */
113487  volatile uint32_t diepint3; /* ALT_USB_DEV_DIEPINT3 */
113488  uint32_t _pad_0x16c_0x16f; /* *UNDEFINED* */
113489  volatile uint32_t dieptsiz3; /* ALT_USB_DEV_DIEPTSIZ3 */
113490  volatile uint32_t diepdma3; /* ALT_USB_DEV_DIEPDMA3 */
113491  volatile uint32_t dtxfsts3; /* ALT_USB_DEV_DTXFSTS3 */
113492  volatile uint32_t diepdmab3; /* ALT_USB_DEV_DIEPDMAB3 */
113493  volatile uint32_t diepctl4; /* ALT_USB_DEV_DIEPCTL4 */
113494  uint32_t _pad_0x184_0x187; /* *UNDEFINED* */
113495  volatile uint32_t diepint4; /* ALT_USB_DEV_DIEPINT4 */
113496  uint32_t _pad_0x18c_0x18f; /* *UNDEFINED* */
113497  volatile uint32_t dieptsiz4; /* ALT_USB_DEV_DIEPTSIZ4 */
113498  volatile uint32_t diepdma4; /* ALT_USB_DEV_DIEPDMA4 */
113499  volatile uint32_t dtxfsts4; /* ALT_USB_DEV_DTXFSTS4 */
113500  volatile uint32_t diepdmab4; /* ALT_USB_DEV_DIEPDMAB4 */
113501  volatile uint32_t diepctl5; /* ALT_USB_DEV_DIEPCTL5 */
113502  uint32_t _pad_0x1a4_0x1a7; /* *UNDEFINED* */
113503  volatile uint32_t diepint5; /* ALT_USB_DEV_DIEPINT5 */
113504  uint32_t _pad_0x1ac_0x1af; /* *UNDEFINED* */
113505  volatile uint32_t dieptsiz5; /* ALT_USB_DEV_DIEPTSIZ5 */
113506  volatile uint32_t diepdma5; /* ALT_USB_DEV_DIEPDMA5 */
113507  volatile uint32_t dtxfsts5; /* ALT_USB_DEV_DTXFSTS5 */
113508  volatile uint32_t diepdmab5; /* ALT_USB_DEV_DIEPDMAB5 */
113509  volatile uint32_t diepctl6; /* ALT_USB_DEV_DIEPCTL6 */
113510  uint32_t _pad_0x1c4_0x1c7; /* *UNDEFINED* */
113511  volatile uint32_t diepint6; /* ALT_USB_DEV_DIEPINT6 */
113512  uint32_t _pad_0x1cc_0x1cf; /* *UNDEFINED* */
113513  volatile uint32_t dieptsiz6; /* ALT_USB_DEV_DIEPTSIZ6 */
113514  volatile uint32_t diepdma6; /* ALT_USB_DEV_DIEPDMA6 */
113515  volatile uint32_t dtxfsts6; /* ALT_USB_DEV_DTXFSTS6 */
113516  volatile uint32_t diepdmab6; /* ALT_USB_DEV_DIEPDMAB6 */
113517  volatile uint32_t diepctl7; /* ALT_USB_DEV_DIEPCTL7 */
113518  uint32_t _pad_0x1e4_0x1e7; /* *UNDEFINED* */
113519  volatile uint32_t diepint7; /* ALT_USB_DEV_DIEPINT7 */
113520  uint32_t _pad_0x1ec_0x1ef; /* *UNDEFINED* */
113521  volatile uint32_t dieptsiz7; /* ALT_USB_DEV_DIEPTSIZ7 */
113522  volatile uint32_t diepdma7; /* ALT_USB_DEV_DIEPDMA7 */
113523  volatile uint32_t dtxfsts7; /* ALT_USB_DEV_DTXFSTS7 */
113524  volatile uint32_t diepdmab7; /* ALT_USB_DEV_DIEPDMAB7 */
113525  volatile uint32_t diepctl8; /* ALT_USB_DEV_DIEPCTL8 */
113526  uint32_t _pad_0x204_0x207; /* *UNDEFINED* */
113527  volatile uint32_t diepint8; /* ALT_USB_DEV_DIEPINT8 */
113528  uint32_t _pad_0x20c_0x20f; /* *UNDEFINED* */
113529  volatile uint32_t dieptsiz8; /* ALT_USB_DEV_DIEPTSIZ8 */
113530  volatile uint32_t diepdma8; /* ALT_USB_DEV_DIEPDMA8 */
113531  volatile uint32_t dtxfsts8; /* ALT_USB_DEV_DTXFSTS8 */
113532  volatile uint32_t diepdmab8; /* ALT_USB_DEV_DIEPDMAB8 */
113533  volatile uint32_t diepctl9; /* ALT_USB_DEV_DIEPCTL9 */
113534  uint32_t _pad_0x224_0x227; /* *UNDEFINED* */
113535  volatile uint32_t diepint9; /* ALT_USB_DEV_DIEPINT9 */
113536  uint32_t _pad_0x22c_0x22f; /* *UNDEFINED* */
113537  volatile uint32_t dieptsiz9; /* ALT_USB_DEV_DIEPTSIZ9 */
113538  volatile uint32_t diepdma9; /* ALT_USB_DEV_DIEPDMA9 */
113539  volatile uint32_t dtxfsts9; /* ALT_USB_DEV_DTXFSTS9 */
113540  volatile uint32_t diepdmab9; /* ALT_USB_DEV_DIEPDMAB9 */
113541  volatile uint32_t diepctl10; /* ALT_USB_DEV_DIEPCTL10 */
113542  uint32_t _pad_0x244_0x247; /* *UNDEFINED* */
113543  volatile uint32_t diepint10; /* ALT_USB_DEV_DIEPINT10 */
113544  uint32_t _pad_0x24c_0x24f; /* *UNDEFINED* */
113545  volatile uint32_t dieptsiz10; /* ALT_USB_DEV_DIEPTSIZ10 */
113546  volatile uint32_t diepdma10; /* ALT_USB_DEV_DIEPDMA10 */
113547  volatile uint32_t dtxfsts10; /* ALT_USB_DEV_DTXFSTS10 */
113548  volatile uint32_t diepdmab10; /* ALT_USB_DEV_DIEPDMAB10 */
113549  volatile uint32_t diepctl11; /* ALT_USB_DEV_DIEPCTL11 */
113550  uint32_t _pad_0x264_0x267; /* *UNDEFINED* */
113551  volatile uint32_t diepint11; /* ALT_USB_DEV_DIEPINT11 */
113552  uint32_t _pad_0x26c_0x26f; /* *UNDEFINED* */
113553  volatile uint32_t dieptsiz11; /* ALT_USB_DEV_DIEPTSIZ11 */
113554  volatile uint32_t diepdma11; /* ALT_USB_DEV_DIEPDMA11 */
113555  volatile uint32_t dtxfsts11; /* ALT_USB_DEV_DTXFSTS11 */
113556  volatile uint32_t diepdmab11; /* ALT_USB_DEV_DIEPDMAB11 */
113557  volatile uint32_t diepctl12; /* ALT_USB_DEV_DIEPCTL12 */
113558  uint32_t _pad_0x284_0x287; /* *UNDEFINED* */
113559  volatile uint32_t diepint12; /* ALT_USB_DEV_DIEPINT12 */
113560  uint32_t _pad_0x28c_0x28f; /* *UNDEFINED* */
113561  volatile uint32_t dieptsiz12; /* ALT_USB_DEV_DIEPTSIZ12 */
113562  volatile uint32_t diepdma12; /* ALT_USB_DEV_DIEPDMA12 */
113563  volatile uint32_t dtxfsts12; /* ALT_USB_DEV_DTXFSTS12 */
113564  volatile uint32_t diepdmab12; /* ALT_USB_DEV_DIEPDMAB12 */
113565  volatile uint32_t diepctl13; /* ALT_USB_DEV_DIEPCTL13 */
113566  uint32_t _pad_0x2a4_0x2a7; /* *UNDEFINED* */
113567  volatile uint32_t diepint13; /* ALT_USB_DEV_DIEPINT13 */
113568  uint32_t _pad_0x2ac_0x2af; /* *UNDEFINED* */
113569  volatile uint32_t dieptsiz13; /* ALT_USB_DEV_DIEPTSIZ13 */
113570  volatile uint32_t diepdma13; /* ALT_USB_DEV_DIEPDMA13 */
113571  volatile uint32_t dtxfsts13; /* ALT_USB_DEV_DTXFSTS13 */
113572  volatile uint32_t diepdmab13; /* ALT_USB_DEV_DIEPDMAB13 */
113573  volatile uint32_t diepctl14; /* ALT_USB_DEV_DIEPCTL14 */
113574  uint32_t _pad_0x2c4_0x2c7; /* *UNDEFINED* */
113575  volatile uint32_t diepint14; /* ALT_USB_DEV_DIEPINT14 */
113576  uint32_t _pad_0x2cc_0x2cf; /* *UNDEFINED* */
113577  volatile uint32_t dieptsiz14; /* ALT_USB_DEV_DIEPTSIZ14 */
113578  volatile uint32_t diepdma14; /* ALT_USB_DEV_DIEPDMA14 */
113579  volatile uint32_t dtxfsts14; /* ALT_USB_DEV_DTXFSTS14 */
113580  volatile uint32_t diepdmab14; /* ALT_USB_DEV_DIEPDMAB14 */
113581  volatile uint32_t diepctl15; /* ALT_USB_DEV_DIEPCTL15 */
113582  uint32_t _pad_0x2e4_0x2e7; /* *UNDEFINED* */
113583  volatile uint32_t diepint15; /* ALT_USB_DEV_DIEPINT15 */
113584  uint32_t _pad_0x2ec_0x2ef; /* *UNDEFINED* */
113585  volatile uint32_t dieptsiz15; /* ALT_USB_DEV_DIEPTSIZ15 */
113586  volatile uint32_t diepdma15; /* ALT_USB_DEV_DIEPDMA15 */
113587  volatile uint32_t dtxfsts15; /* ALT_USB_DEV_DTXFSTS15 */
113588  volatile uint32_t diepdmab15; /* ALT_USB_DEV_DIEPDMAB15 */
113589  volatile uint32_t doepctl0; /* ALT_USB_DEV_DOEPCTL0 */
113590  uint32_t _pad_0x304_0x307; /* *UNDEFINED* */
113591  volatile uint32_t doepint0; /* ALT_USB_DEV_DOEPINT0 */
113592  uint32_t _pad_0x30c_0x30f; /* *UNDEFINED* */
113593  volatile uint32_t doeptsiz0; /* ALT_USB_DEV_DOEPTSIZ0 */
113594  volatile uint32_t doepdma0; /* ALT_USB_DEV_DOEPDMA0 */
113595  uint32_t _pad_0x318_0x31b; /* *UNDEFINED* */
113596  volatile uint32_t doepdmab0; /* ALT_USB_DEV_DOEPDMAB0 */
113597  volatile uint32_t doepctl1; /* ALT_USB_DEV_DOEPCTL1 */
113598  uint32_t _pad_0x324_0x327; /* *UNDEFINED* */
113599  volatile uint32_t doepint1; /* ALT_USB_DEV_DOEPINT1 */
113600  uint32_t _pad_0x32c_0x32f; /* *UNDEFINED* */
113601  volatile uint32_t doeptsiz1; /* ALT_USB_DEV_DOEPTSIZ1 */
113602  volatile uint32_t doepdma1; /* ALT_USB_DEV_DOEPDMA1 */
113603  uint32_t _pad_0x338_0x33b; /* *UNDEFINED* */
113604  volatile uint32_t doepdmab1; /* ALT_USB_DEV_DOEPDMAB1 */
113605  volatile uint32_t DOEPCTL2; /* ALT_USB_DEV_DOEPCTL2 */
113606  uint32_t _pad_0x344_0x347; /* *UNDEFINED* */
113607  volatile uint32_t doepint2; /* ALT_USB_DEV_DOEPINT2 */
113608  uint32_t _pad_0x34c_0x34f; /* *UNDEFINED* */
113609  volatile uint32_t doeptsiz2; /* ALT_USB_DEV_DOEPTSIZ2 */
113610  volatile uint32_t doepdma2; /* ALT_USB_DEV_DOEPDMA2 */
113611  uint32_t _pad_0x358_0x35b; /* *UNDEFINED* */
113612  volatile uint32_t doepdmab2; /* ALT_USB_DEV_DOEPDMAB2 */
113613  volatile uint32_t DOEPCTL3; /* ALT_USB_DEV_DOEPCTL3 */
113614  uint32_t _pad_0x364_0x367; /* *UNDEFINED* */
113615  volatile uint32_t doepint3; /* ALT_USB_DEV_DOEPINT3 */
113616  uint32_t _pad_0x36c_0x36f; /* *UNDEFINED* */
113617  volatile uint32_t doeptsiz3; /* ALT_USB_DEV_DOEPTSIZ3 */
113618  volatile uint32_t doepdma3; /* ALT_USB_DEV_DOEPDMA3 */
113619  uint32_t _pad_0x378_0x37b; /* *UNDEFINED* */
113620  volatile uint32_t doepdmab3; /* ALT_USB_DEV_DOEPDMAB3 */
113621  volatile uint32_t doepctl4; /* ALT_USB_DEV_DOEPCTL4 */
113622  uint32_t _pad_0x384_0x387; /* *UNDEFINED* */
113623  volatile uint32_t Doepint4; /* ALT_USB_DEV_DOEPINT4 */
113624  uint32_t _pad_0x38c_0x38f; /* *UNDEFINED* */
113625  volatile uint32_t doeptsiz4; /* ALT_USB_DEV_DOEPTSIZ4 */
113626  volatile uint32_t doepdma4; /* ALT_USB_DEV_DOEPDMA4 */
113627  uint32_t _pad_0x398_0x39b; /* *UNDEFINED* */
113628  volatile uint32_t doepdmab4; /* ALT_USB_DEV_DOEPDMAB4 */
113629  volatile uint32_t doepctl5; /* ALT_USB_DEV_DOEPCTL5 */
113630  uint32_t _pad_0x3a4_0x3a7; /* *UNDEFINED* */
113631  volatile uint32_t doepint5; /* ALT_USB_DEV_DOEPINT5 */
113632  uint32_t _pad_0x3ac_0x3af; /* *UNDEFINED* */
113633  volatile uint32_t doeptsiz5; /* ALT_USB_DEV_DOEPTSIZ5 */
113634  volatile uint32_t doepdma5; /* ALT_USB_DEV_DOEPDMA5 */
113635  uint32_t _pad_0x3b8_0x3bb; /* *UNDEFINED* */
113636  volatile uint32_t doepdmab5; /* ALT_USB_DEV_DOEPDMAB5 */
113637  volatile uint32_t doepctl6; /* ALT_USB_DEV_DOEPCTL6 */
113638  uint32_t _pad_0x3c4_0x3c7; /* *UNDEFINED* */
113639  volatile uint32_t doepint6; /* ALT_USB_DEV_DOEPINT6 */
113640  uint32_t _pad_0x3cc_0x3cf; /* *UNDEFINED* */
113641  volatile uint32_t doeptsiz6; /* ALT_USB_DEV_DOEPTSIZ6 */
113642  volatile uint32_t doepdma6; /* ALT_USB_DEV_DOEPDMA6 */
113643  uint32_t _pad_0x3d8_0x3db; /* *UNDEFINED* */
113644  volatile uint32_t doepdmab6; /* ALT_USB_DEV_DOEPDMAB6 */
113645  volatile uint32_t doepctl7; /* ALT_USB_DEV_DOEPCTL7 */
113646  uint32_t _pad_0x3e4_0x3e7; /* *UNDEFINED* */
113647  volatile uint32_t doepint7; /* ALT_USB_DEV_DOEPINT7 */
113648  uint32_t _pad_0x3ec_0x3ef; /* *UNDEFINED* */
113649  volatile uint32_t doeptsiz7; /* ALT_USB_DEV_DOEPTSIZ7 */
113650  volatile uint32_t doepdma7; /* ALT_USB_DEV_DOEPDMA7 */
113651  uint32_t _pad_0x3f8_0x3fb; /* *UNDEFINED* */
113652  volatile uint32_t doepdmab7; /* ALT_USB_DEV_DOEPDMAB7 */
113653  volatile uint32_t doepctl8; /* ALT_USB_DEV_DOEPCTL8 */
113654  uint32_t _pad_0x404_0x407; /* *UNDEFINED* */
113655  volatile uint32_t doepint8; /* ALT_USB_DEV_DOEPINT8 */
113656  uint32_t _pad_0x40c_0x40f; /* *UNDEFINED* */
113657  volatile uint32_t doeptsiz8; /* ALT_USB_DEV_DOEPTSIZ8 */
113658  volatile uint32_t doepdma8; /* ALT_USB_DEV_DOEPDMA8 */
113659  uint32_t _pad_0x418_0x41b; /* *UNDEFINED* */
113660  volatile uint32_t doepdmab8; /* ALT_USB_DEV_DOEPDMAB8 */
113661  volatile uint32_t doepctl9; /* ALT_USB_DEV_DOEPCTL9 */
113662  uint32_t _pad_0x424_0x427; /* *UNDEFINED* */
113663  volatile uint32_t doepint9; /* ALT_USB_DEV_DOEPINT9 */
113664  uint32_t _pad_0x42c_0x42f; /* *UNDEFINED* */
113665  volatile uint32_t doeptsiz9; /* ALT_USB_DEV_DOEPTSIZ9 */
113666  volatile uint32_t doepdma9; /* ALT_USB_DEV_DOEPDMA9 */
113667  uint32_t _pad_0x438_0x43b; /* *UNDEFINED* */
113668  volatile uint32_t doepdmab9; /* ALT_USB_DEV_DOEPDMAB9 */
113669  volatile uint32_t doepctl10; /* ALT_USB_DEV_DOEPCTL10 */
113670  uint32_t _pad_0x444_0x447; /* *UNDEFINED* */
113671  volatile uint32_t doepint10; /* ALT_USB_DEV_DOEPINT10 */
113672  uint32_t _pad_0x44c_0x44f; /* *UNDEFINED* */
113673  volatile uint32_t doeptsiz10; /* ALT_USB_DEV_DOEPTSIZ10 */
113674  volatile uint32_t doepdma10; /* ALT_USB_DEV_DOEPDMA10 */
113675  uint32_t _pad_0x458_0x45b; /* *UNDEFINED* */
113676  volatile uint32_t doepdmab10; /* ALT_USB_DEV_DOEPDMAB10 */
113677  volatile uint32_t doepctl11; /* ALT_USB_DEV_DOEPCTL11 */
113678  uint32_t _pad_0x464_0x467; /* *UNDEFINED* */
113679  volatile uint32_t doepint11; /* ALT_USB_DEV_DOEPINT11 */
113680  uint32_t _pad_0x46c_0x46f; /* *UNDEFINED* */
113681  volatile uint32_t doeptsiz11; /* ALT_USB_DEV_DOEPTSIZ11 */
113682  volatile uint32_t doepdma11; /* ALT_USB_DEV_DOEPDMA11 */
113683  uint32_t _pad_0x478_0x47b; /* *UNDEFINED* */
113684  volatile uint32_t doepdmab11; /* ALT_USB_DEV_DOEPDMAB11 */
113685  volatile uint32_t doepctl12; /* ALT_USB_DEV_DOEPCTL12 */
113686  uint32_t _pad_0x484_0x487; /* *UNDEFINED* */
113687  volatile uint32_t doepint12; /* ALT_USB_DEV_DOEPINT12 */
113688  uint32_t _pad_0x48c_0x48f; /* *UNDEFINED* */
113689  volatile uint32_t doeptsiz12; /* ALT_USB_DEV_DOEPTSIZ12 */
113690  volatile uint32_t doepdma12; /* ALT_USB_DEV_DOEPDMA12 */
113691  uint32_t _pad_0x498_0x49b; /* *UNDEFINED* */
113692  volatile uint32_t doepdmab12; /* ALT_USB_DEV_DOEPDMAB12 */
113693  volatile uint32_t doepctl13; /* ALT_USB_DEV_DOEPCTL13 */
113694  uint32_t _pad_0x4a4_0x4a7; /* *UNDEFINED* */
113695  volatile uint32_t doepint13; /* ALT_USB_DEV_DOEPINT13 */
113696  uint32_t _pad_0x4ac_0x4af; /* *UNDEFINED* */
113697  volatile uint32_t doeptsiz13; /* ALT_USB_DEV_DOEPTSIZ13 */
113698  volatile uint32_t doepdma13; /* ALT_USB_DEV_DOEPDMA13 */
113699  uint32_t _pad_0x4b8_0x4bb; /* *UNDEFINED* */
113700  volatile uint32_t doepdmab13; /* ALT_USB_DEV_DOEPDMAB13 */
113701  volatile uint32_t doepctl14; /* ALT_USB_DEV_DOEPCTL14 */
113702  uint32_t _pad_0x4c4_0x4c7; /* *UNDEFINED* */
113703  volatile uint32_t doepint14; /* ALT_USB_DEV_DOEPINT14 */
113704  uint32_t _pad_0x4cc_0x4cf; /* *UNDEFINED* */
113705  volatile uint32_t doeptsiz14; /* ALT_USB_DEV_DOEPTSIZ14 */
113706  volatile uint32_t doepdma14; /* ALT_USB_DEV_DOEPDMA14 */
113707  uint32_t _pad_0x4d8_0x4db; /* *UNDEFINED* */
113708  volatile uint32_t doepdmab14; /* ALT_USB_DEV_DOEPDMAB14 */
113709  volatile uint32_t doepctl15; /* ALT_USB_DEV_DOEPCTL15 */
113710  uint32_t _pad_0x4e4_0x4e7; /* *UNDEFINED* */
113711  volatile uint32_t doepint15; /* ALT_USB_DEV_DOEPINT15 */
113712  uint32_t _pad_0x4ec_0x4ef; /* *UNDEFINED* */
113713  volatile uint32_t doeptsiz15; /* ALT_USB_DEV_DOEPTSIZ15 */
113714  volatile uint32_t doepdma15; /* ALT_USB_DEV_DOEPDMA15 */
113715  uint32_t _pad_0x4f8_0x4fb; /* *UNDEFINED* */
113716  volatile uint32_t doepdmab15; /* ALT_USB_DEV_DOEPDMAB15 */
113717 };
113718 
113719 /* The typedef declaration for the raw register contents of register group ALT_USB_DEV. */
113720 typedef volatile struct ALT_USB_DEV_raw_s ALT_USB_DEV_raw_t;
113721 #endif /* __ASSEMBLY__ */
113722 
113723 
113724 /*
113725  * Register Group : Power and Clock Gating Register - ALT_USB_PWRCLK
113726  * Power and Clock Gating Register
113727  *
113728  * There is a single register for power and clock gating. It is available in both
113729  * Host and Device modes.
113730  *
113731  */
113732 /*
113733  * Register : Power and Clock Gating Control Register - pcgcctl
113734  *
113735  * This register is available in Host and Device modes. The application can use
113736  * this register to control the core's power-down and clock gating features.
113737  * Because the CSR module is turned off during power-down, this register is
113738  * implemented in the AHB Slave BIU module.
113739  *
113740  * Register Layout
113741  *
113742  * Bits | Access | Reset | Description
113743  * :-------|:-------|:------|:-------------------------
113744  * [0] | RW | 0x0 | Stop Pclk
113745  * [2:1] | ??? | 0x0 | *UNDEFINED*
113746  * [3] | RW | 0x0 | Reset Power-Down Modules
113747  * [5:4] | ??? | 0x0 | *UNDEFINED*
113748  * [6] | R | 0x0 | PHY In Sleep
113749  * [7] | R | 0x0 | Deep Sleep
113750  * [31:8] | ??? | 0x0 | *UNDEFINED*
113751  *
113752  */
113753 /*
113754  * Field : Stop Pclk - stoppclk
113755  *
113756  * The application sets this bit to stop the PHY clock (phy_clk) when the USB is
113757  * suspended, the session is not valid, or the device is disconnected. The
113758  * application clears this bit when the USB is resumed or a new session starts.
113759  *
113760  * Field Enumeration Values:
113761  *
113762  * Enum | Value | Description
113763  * :---------------------------------------|:------|:------------------
113764  * ALT_USB_PWRCLK_PCGCCTL_STOPPCLK_E_DISD | 0x0 | Disable Stop Pclk
113765  * ALT_USB_PWRCLK_PCGCCTL_STOPPCLK_E_END | 0x1 | Enable Stop Pclk
113766  *
113767  * Field Access Macros:
113768  *
113769  */
113770 /*
113771  * Enumerated value for register field ALT_USB_PWRCLK_PCGCCTL_STOPPCLK
113772  *
113773  * Disable Stop Pclk
113774  */
113775 #define ALT_USB_PWRCLK_PCGCCTL_STOPPCLK_E_DISD 0x0
113776 /*
113777  * Enumerated value for register field ALT_USB_PWRCLK_PCGCCTL_STOPPCLK
113778  *
113779  * Enable Stop Pclk
113780  */
113781 #define ALT_USB_PWRCLK_PCGCCTL_STOPPCLK_E_END 0x1
113782 
113783 /* The Least Significant Bit (LSB) position of the ALT_USB_PWRCLK_PCGCCTL_STOPPCLK register field. */
113784 #define ALT_USB_PWRCLK_PCGCCTL_STOPPCLK_LSB 0
113785 /* The Most Significant Bit (MSB) position of the ALT_USB_PWRCLK_PCGCCTL_STOPPCLK register field. */
113786 #define ALT_USB_PWRCLK_PCGCCTL_STOPPCLK_MSB 0
113787 /* The width in bits of the ALT_USB_PWRCLK_PCGCCTL_STOPPCLK register field. */
113788 #define ALT_USB_PWRCLK_PCGCCTL_STOPPCLK_WIDTH 1
113789 /* The mask used to set the ALT_USB_PWRCLK_PCGCCTL_STOPPCLK register field value. */
113790 #define ALT_USB_PWRCLK_PCGCCTL_STOPPCLK_SET_MSK 0x00000001
113791 /* The mask used to clear the ALT_USB_PWRCLK_PCGCCTL_STOPPCLK register field value. */
113792 #define ALT_USB_PWRCLK_PCGCCTL_STOPPCLK_CLR_MSK 0xfffffffe
113793 /* The reset value of the ALT_USB_PWRCLK_PCGCCTL_STOPPCLK register field. */
113794 #define ALT_USB_PWRCLK_PCGCCTL_STOPPCLK_RESET 0x0
113795 /* Extracts the ALT_USB_PWRCLK_PCGCCTL_STOPPCLK field value from a register. */
113796 #define ALT_USB_PWRCLK_PCGCCTL_STOPPCLK_GET(value) (((value) & 0x00000001) >> 0)
113797 /* Produces a ALT_USB_PWRCLK_PCGCCTL_STOPPCLK register field value suitable for setting the register. */
113798 #define ALT_USB_PWRCLK_PCGCCTL_STOPPCLK_SET(value) (((value) << 0) & 0x00000001)
113799 
113800 /*
113801  * Field : Reset Power-Down Modules - rstpdwnmodule
113802  *
113803  * This bit is valid only in Partial Power-Down mode. Theapplication sets this bit
113804  * when the power is turned off. The application clears this bit after the power is
113805  * turned on and the PHY clock is up. The R/W of all core registers are possible
113806  * only when this bit is set to 1b0.
113807  *
113808  * Field Enumeration Values:
113809  *
113810  * Enum | Value | Description
113811  * :-------------------------------------------|:------|:--------------------
113812  * ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE_E_ON | 0x0 | Power is turned on
113813  * ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE_E_OFF | 0x1 | Power is turned off
113814  *
113815  * Field Access Macros:
113816  *
113817  */
113818 /*
113819  * Enumerated value for register field ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE
113820  *
113821  * Power is turned on
113822  */
113823 #define ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE_E_ON 0x0
113824 /*
113825  * Enumerated value for register field ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE
113826  *
113827  * Power is turned off
113828  */
113829 #define ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE_E_OFF 0x1
113830 
113831 /* The Least Significant Bit (LSB) position of the ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE register field. */
113832 #define ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE_LSB 3
113833 /* The Most Significant Bit (MSB) position of the ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE register field. */
113834 #define ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE_MSB 3
113835 /* The width in bits of the ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE register field. */
113836 #define ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE_WIDTH 1
113837 /* The mask used to set the ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE register field value. */
113838 #define ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE_SET_MSK 0x00000008
113839 /* The mask used to clear the ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE register field value. */
113840 #define ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE_CLR_MSK 0xfffffff7
113841 /* The reset value of the ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE register field. */
113842 #define ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE_RESET 0x0
113843 /* Extracts the ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE field value from a register. */
113844 #define ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE_GET(value) (((value) & 0x00000008) >> 3)
113845 /* Produces a ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE register field value suitable for setting the register. */
113846 #define ALT_USB_PWRCLK_PCGCCTL_RSTPDWNMODULE_SET(value) (((value) << 3) & 0x00000008)
113847 
113848 /*
113849  * Field : PHY In Sleep - physleep
113850  *
113851  * Indicates that the PHY is in Sleep State.
113852  *
113853  * Field Enumeration Values:
113854  *
113855  * Enum | Value | Description
113856  * :----------------------------------------|:------|:----------------
113857  * ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP_E_INACT | 0x0 | Phy non-sleep
113858  * ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP_E_ACT | 0x1 | Phy sleep state
113859  *
113860  * Field Access Macros:
113861  *
113862  */
113863 /*
113864  * Enumerated value for register field ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP
113865  *
113866  * Phy non-sleep
113867  */
113868 #define ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP_E_INACT 0x0
113869 /*
113870  * Enumerated value for register field ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP
113871  *
113872  * Phy sleep state
113873  */
113874 #define ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP_E_ACT 0x1
113875 
113876 /* The Least Significant Bit (LSB) position of the ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP register field. */
113877 #define ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP_LSB 6
113878 /* The Most Significant Bit (MSB) position of the ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP register field. */
113879 #define ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP_MSB 6
113880 /* The width in bits of the ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP register field. */
113881 #define ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP_WIDTH 1
113882 /* The mask used to set the ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP register field value. */
113883 #define ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP_SET_MSK 0x00000040
113884 /* The mask used to clear the ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP register field value. */
113885 #define ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP_CLR_MSK 0xffffffbf
113886 /* The reset value of the ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP register field. */
113887 #define ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP_RESET 0x0
113888 /* Extracts the ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP field value from a register. */
113889 #define ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP_GET(value) (((value) & 0x00000040) >> 6)
113890 /* Produces a ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP register field value suitable for setting the register. */
113891 #define ALT_USB_PWRCLK_PCGCCTL_PHYSLEEP_SET(value) (((value) << 6) & 0x00000040)
113892 
113893 /*
113894  * Field : Deep Sleep - l1suspended
113895  *
113896  * Indicates that the PHY is in deep sleep when in L1 state.
113897  *
113898  * Field Enumeration Values:
113899  *
113900  * Enum | Value | Description
113901  * :-------------------------------------------|:------|:------------------
113902  * ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED_E_INACT | 0x0 | Non Deep Sleep
113903  * ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED_E_ACT | 0x1 | Deep Sleep active
113904  *
113905  * Field Access Macros:
113906  *
113907  */
113908 /*
113909  * Enumerated value for register field ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED
113910  *
113911  * Non Deep Sleep
113912  */
113913 #define ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED_E_INACT 0x0
113914 /*
113915  * Enumerated value for register field ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED
113916  *
113917  * Deep Sleep active
113918  */
113919 #define ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED_E_ACT 0x1
113920 
113921 /* The Least Significant Bit (LSB) position of the ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED register field. */
113922 #define ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED_LSB 7
113923 /* The Most Significant Bit (MSB) position of the ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED register field. */
113924 #define ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED_MSB 7
113925 /* The width in bits of the ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED register field. */
113926 #define ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED_WIDTH 1
113927 /* The mask used to set the ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED register field value. */
113928 #define ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED_SET_MSK 0x00000080
113929 /* The mask used to clear the ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED register field value. */
113930 #define ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED_CLR_MSK 0xffffff7f
113931 /* The reset value of the ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED register field. */
113932 #define ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED_RESET 0x0
113933 /* Extracts the ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED field value from a register. */
113934 #define ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED_GET(value) (((value) & 0x00000080) >> 7)
113935 /* Produces a ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED register field value suitable for setting the register. */
113936 #define ALT_USB_PWRCLK_PCGCCTL_L1SUSPENDED_SET(value) (((value) << 7) & 0x00000080)
113937 
113938 #ifndef __ASSEMBLY__
113939 /*
113940  * WARNING: The C register and register group struct declarations are provided for
113941  * convenience and illustrative purposes. They should, however, be used with
113942  * caution as the C language standard provides no guarantees about the alignment or
113943  * atomicity of device memory accesses. The recommended practice for writing
113944  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
113945  * alt_write_word() functions.
113946  *
113947  * The struct declaration for register ALT_USB_PWRCLK_PCGCCTL.
113948  */
113949 struct ALT_USB_PWRCLK_PCGCCTL_s
113950 {
113951  uint32_t stoppclk : 1; /* Stop Pclk */
113952  uint32_t : 2; /* *UNDEFINED* */
113953  uint32_t rstpdwnmodule : 1; /* Reset Power-Down Modules */
113954  uint32_t : 2; /* *UNDEFINED* */
113955  const uint32_t physleep : 1; /* PHY In Sleep */
113956  const uint32_t l1suspended : 1; /* Deep Sleep */
113957  uint32_t : 24; /* *UNDEFINED* */
113958 };
113959 
113960 /* The typedef declaration for register ALT_USB_PWRCLK_PCGCCTL. */
113961 typedef volatile struct ALT_USB_PWRCLK_PCGCCTL_s ALT_USB_PWRCLK_PCGCCTL_t;
113962 #endif /* __ASSEMBLY__ */
113963 
113964 /* The byte offset of the ALT_USB_PWRCLK_PCGCCTL register from the beginning of the component. */
113965 #define ALT_USB_PWRCLK_PCGCCTL_OFST 0x0
113966 /* The address of the ALT_USB_PWRCLK_PCGCCTL register. */
113967 #define ALT_USB_PWRCLK_PCGCCTL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_PWRCLK_PCGCCTL_OFST))
113968 
113969 #ifndef __ASSEMBLY__
113970 /*
113971  * WARNING: The C register and register group struct declarations are provided for
113972  * convenience and illustrative purposes. They should, however, be used with
113973  * caution as the C language standard provides no guarantees about the alignment or
113974  * atomicity of device memory accesses. The recommended practice for writing
113975  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
113976  * alt_write_word() functions.
113977  *
113978  * The struct declaration for register group ALT_USB_PWRCLK.
113979  */
113980 struct ALT_USB_PWRCLK_s
113981 {
113982  ALT_USB_PWRCLK_PCGCCTL_t pcgcctl; /* ALT_USB_PWRCLK_PCGCCTL */
113983 };
113984 
113985 /* The typedef declaration for register group ALT_USB_PWRCLK. */
113986 typedef volatile struct ALT_USB_PWRCLK_s ALT_USB_PWRCLK_t;
113987 /* The struct declaration for the raw register contents of register group ALT_USB_PWRCLK. */
113988 struct ALT_USB_PWRCLK_raw_s
113989 {
113990  volatile uint32_t pcgcctl; /* ALT_USB_PWRCLK_PCGCCTL */
113991 };
113992 
113993 /* The typedef declaration for the raw register contents of register group ALT_USB_PWRCLK. */
113994 typedef volatile struct ALT_USB_PWRCLK_raw_s ALT_USB_PWRCLK_raw_t;
113995 #endif /* __ASSEMBLY__ */
113996 
113997 
113998 #ifndef __ASSEMBLY__
113999 /*
114000  * WARNING: The C register and register group struct declarations are provided for
114001  * convenience and illustrative purposes. They should, however, be used with
114002  * caution as the C language standard provides no guarantees about the alignment or
114003  * atomicity of device memory accesses. The recommended practice for writing
114004  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
114005  * alt_write_word() functions.
114006  *
114007  * The struct declaration for register group ALT_USB.
114008  */
114009 struct ALT_USB_s
114010 {
114011  ALT_USB_GLOB_t globgrp; /* ALT_USB_GLOB */
114012  volatile uint32_t _pad_0x140_0x3ff[176]; /* *UNDEFINED* */
114013  ALT_USB_HOST_t hostgrp; /* ALT_USB_HOST */
114014  volatile uint32_t _pad_0x6fc_0x7ff[65]; /* *UNDEFINED* */
114015  ALT_USB_DEV_t devgrp; /* ALT_USB_DEV */
114016  volatile uint32_t _pad_0xd00_0xdff[64]; /* *UNDEFINED* */
114017  ALT_USB_PWRCLK_t pwrclkgrp; /* ALT_USB_PWRCLK */
114018  volatile uint32_t _pad_0xe04_0x40000[64639]; /* *UNDEFINED* */
114019 };
114020 
114021 /* The typedef declaration for register group ALT_USB. */
114022 typedef volatile struct ALT_USB_s ALT_USB_t;
114023 /* The struct declaration for the raw register contents of register group ALT_USB. */
114024 struct ALT_USB_raw_s
114025 {
114026  ALT_USB_GLOB_raw_t globgrp; /* ALT_USB_GLOB */
114027  uint32_t _pad_0x140_0x3ff[176]; /* *UNDEFINED* */
114028  ALT_USB_HOST_raw_t hostgrp; /* ALT_USB_HOST */
114029  uint32_t _pad_0x6fc_0x7ff[65]; /* *UNDEFINED* */
114030  ALT_USB_DEV_raw_t devgrp; /* ALT_USB_DEV */
114031  uint32_t _pad_0xd00_0xdff[64]; /* *UNDEFINED* */
114032  ALT_USB_PWRCLK_raw_t pwrclkgrp; /* ALT_USB_PWRCLK */
114033  uint32_t _pad_0xe04_0x40000[64639]; /* *UNDEFINED* */
114034 };
114035 
114036 /* The typedef declaration for the raw register contents of register group ALT_USB. */
114037 typedef volatile struct ALT_USB_raw_s ALT_USB_raw_t;
114038 #endif /* __ASSEMBLY__ */
114039 
114040 
114041 #ifdef __cplusplus
114042 }
114043 #endif /* __cplusplus */
114044 #endif /* __ALTERA_ALT_USB_H__ */
114045