35 #ifndef __ALTERA_ALT_SYSMGR_H__
36 #define __ALTERA_ALT_SYSMGR_H__
82 #define ALT_SYSMGR_SILICONID1_REV_E_REV1 0x1
85 #define ALT_SYSMGR_SILICONID1_REV_LSB 0
87 #define ALT_SYSMGR_SILICONID1_REV_MSB 15
89 #define ALT_SYSMGR_SILICONID1_REV_WIDTH 16
91 #define ALT_SYSMGR_SILICONID1_REV_SET_MSK 0x0000ffff
93 #define ALT_SYSMGR_SILICONID1_REV_CLR_MSK 0xffff0000
95 #define ALT_SYSMGR_SILICONID1_REV_RESET 0x1
97 #define ALT_SYSMGR_SILICONID1_REV_GET(value) (((value) & 0x0000ffff) >> 0)
99 #define ALT_SYSMGR_SILICONID1_REV_SET(value) (((value) << 0) & 0x0000ffff)
120 #define ALT_SYSMGR_SILICONID1_ID_E_CYCLONEV_ARRIAV 0x0
123 #define ALT_SYSMGR_SILICONID1_ID_LSB 16
125 #define ALT_SYSMGR_SILICONID1_ID_MSB 31
127 #define ALT_SYSMGR_SILICONID1_ID_WIDTH 16
129 #define ALT_SYSMGR_SILICONID1_ID_SET_MSK 0xffff0000
131 #define ALT_SYSMGR_SILICONID1_ID_CLR_MSK 0x0000ffff
133 #define ALT_SYSMGR_SILICONID1_ID_RESET 0x0
135 #define ALT_SYSMGR_SILICONID1_ID_GET(value) (((value) & 0xffff0000) >> 16)
137 #define ALT_SYSMGR_SILICONID1_ID_SET(value) (((value) << 16) & 0xffff0000)
150 struct ALT_SYSMGR_SILICONID1_s
152 const uint32_t rev : 16;
153 const uint32_t
id : 16;
157 typedef volatile struct ALT_SYSMGR_SILICONID1_s ALT_SYSMGR_SILICONID1_t;
161 #define ALT_SYSMGR_SILICONID1_OFST 0x0
184 #define ALT_SYSMGR_SILICONID2_RSV_LSB 0
186 #define ALT_SYSMGR_SILICONID2_RSV_MSB 31
188 #define ALT_SYSMGR_SILICONID2_RSV_WIDTH 32
190 #define ALT_SYSMGR_SILICONID2_RSV_SET_MSK 0xffffffff
192 #define ALT_SYSMGR_SILICONID2_RSV_CLR_MSK 0x00000000
194 #define ALT_SYSMGR_SILICONID2_RSV_RESET 0x0
196 #define ALT_SYSMGR_SILICONID2_RSV_GET(value) (((value) & 0xffffffff) >> 0)
198 #define ALT_SYSMGR_SILICONID2_RSV_SET(value) (((value) << 0) & 0xffffffff)
211 struct ALT_SYSMGR_SILICONID2_s
213 const uint32_t rsv : 32;
217 typedef volatile struct ALT_SYSMGR_SILICONID2_s ALT_SYSMGR_SILICONID2_t;
221 #define ALT_SYSMGR_SILICONID2_OFST 0x4
267 #define ALT_SYSMGR_WDDBG_MOD_0_E_CONTINUE 0x0
273 #define ALT_SYSMGR_WDDBG_MOD_0_E_PAUSECPU0 0x1
279 #define ALT_SYSMGR_WDDBG_MOD_0_E_PAUSECPU1 0x2
285 #define ALT_SYSMGR_WDDBG_MOD_0_E_PAUSEEITHER 0x3
288 #define ALT_SYSMGR_WDDBG_MOD_0_LSB 0
290 #define ALT_SYSMGR_WDDBG_MOD_0_MSB 1
292 #define ALT_SYSMGR_WDDBG_MOD_0_WIDTH 2
294 #define ALT_SYSMGR_WDDBG_MOD_0_SET_MSK 0x00000003
296 #define ALT_SYSMGR_WDDBG_MOD_0_CLR_MSK 0xfffffffc
298 #define ALT_SYSMGR_WDDBG_MOD_0_RESET 0x3
300 #define ALT_SYSMGR_WDDBG_MOD_0_GET(value) (((value) & 0x00000003) >> 0)
302 #define ALT_SYSMGR_WDDBG_MOD_0_SET(value) (((value) << 0) & 0x00000003)
331 #define ALT_SYSMGR_WDDBG_MOD_1_E_CONTINUE 0x0
337 #define ALT_SYSMGR_WDDBG_MOD_1_E_PAUSECPU0 0x1
343 #define ALT_SYSMGR_WDDBG_MOD_1_E_PAUSECPU1 0x2
349 #define ALT_SYSMGR_WDDBG_MOD_1_E_PAUSEEITHER 0x3
352 #define ALT_SYSMGR_WDDBG_MOD_1_LSB 2
354 #define ALT_SYSMGR_WDDBG_MOD_1_MSB 3
356 #define ALT_SYSMGR_WDDBG_MOD_1_WIDTH 2
358 #define ALT_SYSMGR_WDDBG_MOD_1_SET_MSK 0x0000000c
360 #define ALT_SYSMGR_WDDBG_MOD_1_CLR_MSK 0xfffffff3
362 #define ALT_SYSMGR_WDDBG_MOD_1_RESET 0x3
364 #define ALT_SYSMGR_WDDBG_MOD_1_GET(value) (((value) & 0x0000000c) >> 2)
366 #define ALT_SYSMGR_WDDBG_MOD_1_SET(value) (((value) << 2) & 0x0000000c)
379 struct ALT_SYSMGR_WDDBG_s
387 typedef volatile struct ALT_SYSMGR_WDDBG_s ALT_SYSMGR_WDDBG_t;
391 #define ALT_SYSMGR_WDDBG_OFST 0x10
438 #define ALT_SYSMGR_BOOT_BSEL_E_RSVD 0x0
444 #define ALT_SYSMGR_BOOT_BSEL_E_FPGA 0x1
450 #define ALT_SYSMGR_BOOT_BSEL_E_NAND_FLSH_1_8V 0x2
456 #define ALT_SYSMGR_BOOT_BSEL_E_NAND_FLSH_3_0V 0x3
462 #define ALT_SYSMGR_BOOT_BSEL_E_SD_MMC_EXTERNAL_TRANSCEIVER_1_8V 0x4
468 #define ALT_SYSMGR_BOOT_BSEL_E_SD_MMC_INTERNAL_TRANSCEIVER_3_0V 0x5
474 #define ALT_SYSMGR_BOOT_BSEL_E_QSPI_FLSH_1_8V 0x6
480 #define ALT_SYSMGR_BOOT_BSEL_E_QSPI_FLSH_3_0V 0x7
483 #define ALT_SYSMGR_BOOT_BSEL_LSB 0
485 #define ALT_SYSMGR_BOOT_BSEL_MSB 2
487 #define ALT_SYSMGR_BOOT_BSEL_WIDTH 3
489 #define ALT_SYSMGR_BOOT_BSEL_SET_MSK 0x00000007
491 #define ALT_SYSMGR_BOOT_BSEL_CLR_MSK 0xfffffff8
493 #define ALT_SYSMGR_BOOT_BSEL_RESET 0x0
495 #define ALT_SYSMGR_BOOT_BSEL_GET(value) (((value) & 0x00000007) >> 0)
497 #define ALT_SYSMGR_BOOT_BSEL_SET(value) (((value) << 0) & 0x00000007)
542 #define ALT_SYSMGR_BOOT_CSEL_E_CSEL_0 0x0
549 #define ALT_SYSMGR_BOOT_CSEL_E_CSEL_1 0x1
556 #define ALT_SYSMGR_BOOT_CSEL_E_CSEL_2 0x2
563 #define ALT_SYSMGR_BOOT_CSEL_E_CSEL_3 0x3
566 #define ALT_SYSMGR_BOOT_CSEL_LSB 3
568 #define ALT_SYSMGR_BOOT_CSEL_MSB 4
570 #define ALT_SYSMGR_BOOT_CSEL_WIDTH 2
572 #define ALT_SYSMGR_BOOT_CSEL_SET_MSK 0x00000018
574 #define ALT_SYSMGR_BOOT_CSEL_CLR_MSK 0xffffffe7
576 #define ALT_SYSMGR_BOOT_CSEL_RESET 0x0
578 #define ALT_SYSMGR_BOOT_CSEL_GET(value) (((value) & 0x00000018) >> 3)
580 #define ALT_SYSMGR_BOOT_CSEL_SET(value) (((value) << 3) & 0x00000018)
592 #define ALT_SYSMGR_BOOT_PINBSEL_LSB 5
594 #define ALT_SYSMGR_BOOT_PINBSEL_MSB 7
596 #define ALT_SYSMGR_BOOT_PINBSEL_WIDTH 3
598 #define ALT_SYSMGR_BOOT_PINBSEL_SET_MSK 0x000000e0
600 #define ALT_SYSMGR_BOOT_PINBSEL_CLR_MSK 0xffffff1f
602 #define ALT_SYSMGR_BOOT_PINBSEL_RESET 0x0
604 #define ALT_SYSMGR_BOOT_PINBSEL_GET(value) (((value) & 0x000000e0) >> 5)
606 #define ALT_SYSMGR_BOOT_PINBSEL_SET(value) (((value) << 5) & 0x000000e0)
618 #define ALT_SYSMGR_BOOT_PINCSEL_LSB 8
620 #define ALT_SYSMGR_BOOT_PINCSEL_MSB 9
622 #define ALT_SYSMGR_BOOT_PINCSEL_WIDTH 2
624 #define ALT_SYSMGR_BOOT_PINCSEL_SET_MSK 0x00000300
626 #define ALT_SYSMGR_BOOT_PINCSEL_CLR_MSK 0xfffffcff
628 #define ALT_SYSMGR_BOOT_PINCSEL_RESET 0x0
630 #define ALT_SYSMGR_BOOT_PINCSEL_GET(value) (((value) & 0x00000300) >> 8)
632 #define ALT_SYSMGR_BOOT_PINCSEL_SET(value) (((value) << 8) & 0x00000300)
645 struct ALT_SYSMGR_BOOT_s
647 const uint32_t bsel : 3;
648 const uint32_t csel : 2;
649 const uint32_t pinbsel : 3;
650 const uint32_t pincsel : 2;
655 typedef volatile struct ALT_SYSMGR_BOOT_s ALT_SYSMGR_BOOT_t;
659 #define ALT_SYSMGR_BOOT_OFST 0x14
695 #define ALT_SYSMGR_HPSINFO_DUALCORE_E_SINGLECORE 0x0
701 #define ALT_SYSMGR_HPSINFO_DUALCORE_E_DUALCORE 0x1
704 #define ALT_SYSMGR_HPSINFO_DUALCORE_LSB 0
706 #define ALT_SYSMGR_HPSINFO_DUALCORE_MSB 0
708 #define ALT_SYSMGR_HPSINFO_DUALCORE_WIDTH 1
710 #define ALT_SYSMGR_HPSINFO_DUALCORE_SET_MSK 0x00000001
712 #define ALT_SYSMGR_HPSINFO_DUALCORE_CLR_MSK 0xfffffffe
714 #define ALT_SYSMGR_HPSINFO_DUALCORE_RESET 0x0
716 #define ALT_SYSMGR_HPSINFO_DUALCORE_GET(value) (((value) & 0x00000001) >> 0)
718 #define ALT_SYSMGR_HPSINFO_DUALCORE_SET(value) (((value) << 0) & 0x00000001)
740 #define ALT_SYSMGR_HPSINFO_CAN_E_CAN_UNAVAILABLE 0x0
746 #define ALT_SYSMGR_HPSINFO_CAN_E_CAN_AVAILABLE 0x1
749 #define ALT_SYSMGR_HPSINFO_CAN_LSB 1
751 #define ALT_SYSMGR_HPSINFO_CAN_MSB 1
753 #define ALT_SYSMGR_HPSINFO_CAN_WIDTH 1
755 #define ALT_SYSMGR_HPSINFO_CAN_SET_MSK 0x00000002
757 #define ALT_SYSMGR_HPSINFO_CAN_CLR_MSK 0xfffffffd
759 #define ALT_SYSMGR_HPSINFO_CAN_RESET 0x0
761 #define ALT_SYSMGR_HPSINFO_CAN_GET(value) (((value) & 0x00000002) >> 1)
763 #define ALT_SYSMGR_HPSINFO_CAN_SET(value) (((value) << 1) & 0x00000002)
776 struct ALT_SYSMGR_HPSINFO_s
778 const uint32_t dualcore : 1;
779 const uint32_t can : 1;
784 typedef volatile struct ALT_SYSMGR_HPSINFO_s ALT_SYSMGR_HPSINFO_t;
788 #define ALT_SYSMGR_HPSINFO_OFST 0x18
832 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_LSB 0
834 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_MSB 0
836 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_WIDTH 1
838 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_SET_MSK 0x00000001
840 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_CLR_MSK 0xfffffffe
842 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_RESET 0x0
844 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_GET(value) (((value) & 0x00000001) >> 0)
846 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_SET(value) (((value) << 0) & 0x00000001)
858 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_LSB 1
860 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_MSB 1
862 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_WIDTH 1
864 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_SET_MSK 0x00000002
866 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_CLR_MSK 0xfffffffd
868 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_RESET 0x0
870 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_GET(value) (((value) & 0x00000002) >> 1)
872 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_SET(value) (((value) << 1) & 0x00000002)
884 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_LSB 2
886 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_MSB 2
888 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_WIDTH 1
890 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_SET_MSK 0x00000004
892 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_CLR_MSK 0xfffffffb
894 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_RESET 0x0
896 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_GET(value) (((value) & 0x00000004) >> 2)
898 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_SET(value) (((value) << 2) & 0x00000004)
910 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_LSB 3
912 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_MSB 3
914 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_WIDTH 1
916 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_SET_MSK 0x00000008
918 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_CLR_MSK 0xfffffff7
920 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_RESET 0x0
922 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_GET(value) (((value) & 0x00000008) >> 3)
924 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_SET(value) (((value) << 3) & 0x00000008)
936 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_LSB 4
938 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_MSB 4
940 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_WIDTH 1
942 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_SET_MSK 0x00000010
944 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_CLR_MSK 0xffffffef
946 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_RESET 0x0
948 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_GET(value) (((value) & 0x00000010) >> 4)
950 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_SET(value) (((value) << 4) & 0x00000010)
962 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_LSB 5
964 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_MSB 5
966 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_WIDTH 1
968 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_SET_MSK 0x00000020
970 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_CLR_MSK 0xffffffdf
972 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_RESET 0x0
974 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_GET(value) (((value) & 0x00000020) >> 5)
976 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_SET(value) (((value) << 5) & 0x00000020)
988 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_LSB 6
990 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_MSB 6
992 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_WIDTH 1
994 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_SET_MSK 0x00000040
996 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_CLR_MSK 0xffffffbf
998 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_RESET 0x0
1000 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_GET(value) (((value) & 0x00000040) >> 6)
1002 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_SET(value) (((value) << 6) & 0x00000040)
1014 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_LSB 7
1016 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_MSB 7
1018 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_WIDTH 1
1020 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_SET_MSK 0x00000080
1022 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_CLR_MSK 0xffffff7f
1024 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_RESET 0x0
1026 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_GET(value) (((value) & 0x00000080) >> 7)
1028 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_SET(value) (((value) << 7) & 0x00000080)
1040 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_LSB 8
1042 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_MSB 8
1044 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_WIDTH 1
1046 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_SET_MSK 0x00000100
1048 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_CLR_MSK 0xfffffeff
1050 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_RESET 0x0
1052 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_GET(value) (((value) & 0x00000100) >> 8)
1054 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_SET(value) (((value) << 8) & 0x00000100)
1066 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_LSB 9
1068 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_MSB 9
1070 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_WIDTH 1
1072 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_SET_MSK 0x00000200
1074 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_CLR_MSK 0xfffffdff
1076 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_RESET 0x0
1078 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_GET(value) (((value) & 0x00000200) >> 9)
1080 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_SET(value) (((value) << 9) & 0x00000200)
1092 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_LSB 10
1094 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_MSB 10
1096 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_WIDTH 1
1098 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_SET_MSK 0x00000400
1100 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_CLR_MSK 0xfffffbff
1102 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_RESET 0x0
1104 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_GET(value) (((value) & 0x00000400) >> 10)
1106 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_SET(value) (((value) << 10) & 0x00000400)
1118 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_LSB 11
1120 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_MSB 11
1122 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_WIDTH 1
1124 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_SET_MSK 0x00000800
1126 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_CLR_MSK 0xfffff7ff
1128 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_RESET 0x0
1130 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_GET(value) (((value) & 0x00000800) >> 11)
1132 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_SET(value) (((value) << 11) & 0x00000800)
1144 #define ALT_SYSMGR_PARITYINJ_GHB_0_LSB 12
1146 #define ALT_SYSMGR_PARITYINJ_GHB_0_MSB 12
1148 #define ALT_SYSMGR_PARITYINJ_GHB_0_WIDTH 1
1150 #define ALT_SYSMGR_PARITYINJ_GHB_0_SET_MSK 0x00001000
1152 #define ALT_SYSMGR_PARITYINJ_GHB_0_CLR_MSK 0xffffefff
1154 #define ALT_SYSMGR_PARITYINJ_GHB_0_RESET 0x0
1156 #define ALT_SYSMGR_PARITYINJ_GHB_0_GET(value) (((value) & 0x00001000) >> 12)
1158 #define ALT_SYSMGR_PARITYINJ_GHB_0_SET(value) (((value) << 12) & 0x00001000)
1170 #define ALT_SYSMGR_PARITYINJ_GHB_1_LSB 13
1172 #define ALT_SYSMGR_PARITYINJ_GHB_1_MSB 13
1174 #define ALT_SYSMGR_PARITYINJ_GHB_1_WIDTH 1
1176 #define ALT_SYSMGR_PARITYINJ_GHB_1_SET_MSK 0x00002000
1178 #define ALT_SYSMGR_PARITYINJ_GHB_1_CLR_MSK 0xffffdfff
1180 #define ALT_SYSMGR_PARITYINJ_GHB_1_RESET 0x0
1182 #define ALT_SYSMGR_PARITYINJ_GHB_1_GET(value) (((value) & 0x00002000) >> 13)
1184 #define ALT_SYSMGR_PARITYINJ_GHB_1_SET(value) (((value) << 13) & 0x00002000)
1196 #define ALT_SYSMGR_PARITYINJ_BTAC_0_LSB 14
1198 #define ALT_SYSMGR_PARITYINJ_BTAC_0_MSB 14
1200 #define ALT_SYSMGR_PARITYINJ_BTAC_0_WIDTH 1
1202 #define ALT_SYSMGR_PARITYINJ_BTAC_0_SET_MSK 0x00004000
1204 #define ALT_SYSMGR_PARITYINJ_BTAC_0_CLR_MSK 0xffffbfff
1206 #define ALT_SYSMGR_PARITYINJ_BTAC_0_RESET 0x0
1208 #define ALT_SYSMGR_PARITYINJ_BTAC_0_GET(value) (((value) & 0x00004000) >> 14)
1210 #define ALT_SYSMGR_PARITYINJ_BTAC_0_SET(value) (((value) << 14) & 0x00004000)
1222 #define ALT_SYSMGR_PARITYINJ_BTAC_1_LSB 15
1224 #define ALT_SYSMGR_PARITYINJ_BTAC_1_MSB 15
1226 #define ALT_SYSMGR_PARITYINJ_BTAC_1_WIDTH 1
1228 #define ALT_SYSMGR_PARITYINJ_BTAC_1_SET_MSK 0x00008000
1230 #define ALT_SYSMGR_PARITYINJ_BTAC_1_CLR_MSK 0xffff7fff
1232 #define ALT_SYSMGR_PARITYINJ_BTAC_1_RESET 0x0
1234 #define ALT_SYSMGR_PARITYINJ_BTAC_1_GET(value) (((value) & 0x00008000) >> 15)
1236 #define ALT_SYSMGR_PARITYINJ_BTAC_1_SET(value) (((value) << 15) & 0x00008000)
1238 #ifndef __ASSEMBLY__
1249 struct ALT_SYSMGR_PARITYINJ_s
1251 uint32_t dcdata_0 : 1;
1252 uint32_t dcdata_1 : 1;
1253 uint32_t dctag_0 : 1;
1254 uint32_t dctag_1 : 1;
1255 uint32_t dcouter_0 : 1;
1256 uint32_t dcouter_1 : 1;
1257 uint32_t maintlb_0 : 1;
1258 uint32_t maintlb_1 : 1;
1259 uint32_t icdata_0 : 1;
1260 uint32_t icdata_1 : 1;
1261 uint32_t ictag_0 : 1;
1262 uint32_t ictag_1 : 1;
1265 uint32_t btac_0 : 1;
1266 uint32_t btac_1 : 1;
1271 typedef volatile struct ALT_SYSMGR_PARITYINJ_s ALT_SYSMGR_PARITYINJ_t;
1275 #define ALT_SYSMGR_PARITYINJ_OFST 0x1c
1331 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_E_DIS 0x0
1341 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_E_EN 0x1
1344 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_LSB 0
1346 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_MSB 0
1348 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_WIDTH 1
1350 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_SET_MSK 0x00000001
1352 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_CLR_MSK 0xfffffffe
1354 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_RESET 0x1
1356 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_GET(value) (((value) & 0x00000001) >> 0)
1358 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_SET(value) (((value) << 0) & 0x00000001)
1360 #ifndef __ASSEMBLY__
1371 struct ALT_SYSMGR_FPGAINTF_GBL_s
1378 typedef volatile struct ALT_SYSMGR_FPGAINTF_GBL_s ALT_SYSMGR_FPGAINTF_GBL_t;
1382 #define ALT_SYSMGR_FPGAINTF_GBL_OFST 0x0
1431 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_E_DIS 0x0
1437 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_E_EN 0x1
1440 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_LSB 0
1442 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_MSB 0
1444 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_WIDTH 1
1446 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_SET_MSK 0x00000001
1448 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_CLR_MSK 0xfffffffe
1450 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_RESET 0x1
1452 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_GET(value) (((value) & 0x00000001) >> 0)
1454 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_SET(value) (((value) << 0) & 0x00000001)
1480 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_E_DIS 0x0
1487 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_E_EN 0x1
1490 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_LSB 1
1492 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_MSB 1
1494 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_WIDTH 1
1496 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_SET_MSK 0x00000002
1498 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_CLR_MSK 0xfffffffd
1500 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_RESET 0x1
1502 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_GET(value) (((value) & 0x00000002) >> 1)
1504 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_SET(value) (((value) << 1) & 0x00000002)
1536 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_E_DIS 0x0
1543 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_E_EN 0x1
1546 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_LSB 2
1548 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_MSB 2
1550 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_WIDTH 1
1552 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_SET_MSK 0x00000004
1554 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_CLR_MSK 0xfffffffb
1556 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_RESET 0x1
1558 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_GET(value) (((value) & 0x00000004) >> 2)
1560 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_SET(value) (((value) << 2) & 0x00000004)
1591 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_E_DIS 0x0
1598 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_E_EN 0x1
1601 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_LSB 3
1603 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_MSB 3
1605 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_WIDTH 1
1607 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_SET_MSK 0x00000008
1609 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_CLR_MSK 0xfffffff7
1611 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_RESET 0x1
1613 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_GET(value) (((value) & 0x00000008) >> 3)
1615 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_SET(value) (((value) << 3) & 0x00000008)
1642 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_E_DIS 0x0
1649 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_E_EN 0x1
1652 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_LSB 4
1654 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_MSB 4
1656 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_WIDTH 1
1658 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_SET_MSK 0x00000010
1660 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_CLR_MSK 0xffffffef
1662 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_RESET 0x1
1664 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_GET(value) (((value) & 0x00000010) >> 4)
1666 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_SET(value) (((value) << 4) & 0x00000010)
1692 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_E_DIS 0x0
1699 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_E_EN 0x1
1702 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_LSB 6
1704 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_MSB 6
1706 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_WIDTH 1
1708 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_SET_MSK 0x00000040
1710 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_CLR_MSK 0xffffffbf
1712 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_RESET 0x1
1714 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_GET(value) (((value) & 0x00000040) >> 6)
1716 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_SET(value) (((value) << 6) & 0x00000040)
1740 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_E_DIS 0x0
1746 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_E_EN 0x1
1749 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_LSB 7
1751 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_MSB 7
1753 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_WIDTH 1
1755 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_SET_MSK 0x00000080
1757 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_CLR_MSK 0xffffff7f
1759 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_RESET 0x1
1761 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_GET(value) (((value) & 0x00000080) >> 7)
1763 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_SET(value) (((value) << 7) & 0x00000080)
1765 #ifndef __ASSEMBLY__
1776 struct ALT_SYSMGR_FPGAINTF_INDIV_s
1778 uint32_t rstreqintf : 1;
1779 uint32_t jtagenintf : 1;
1780 uint32_t configiointf : 1;
1781 uint32_t bscanintf : 1;
1782 uint32_t traceintf : 1;
1784 uint32_t stmeventintf : 1;
1785 uint32_t crosstrigintf : 1;
1790 typedef volatile struct ALT_SYSMGR_FPGAINTF_INDIV_s ALT_SYSMGR_FPGAINTF_INDIV_t;
1794 #define ALT_SYSMGR_FPGAINTF_INDIV_OFST 0x4
1836 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_E_DIS 0x0
1842 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_E_EN 0x1
1845 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_LSB 2
1847 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_MSB 2
1849 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_WIDTH 1
1851 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_SET_MSK 0x00000004
1853 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_CLR_MSK 0xfffffffb
1855 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_RESET 0x0
1857 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_GET(value) (((value) & 0x00000004) >> 2)
1859 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_SET(value) (((value) << 2) & 0x00000004)
1886 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_E_DIS 0x0
1892 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_E_EN 0x1
1895 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_LSB 3
1897 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_MSB 3
1899 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_WIDTH 1
1901 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_SET_MSK 0x00000008
1903 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_CLR_MSK 0xfffffff7
1905 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_RESET 0x0
1907 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_GET(value) (((value) & 0x00000008) >> 3)
1909 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_SET(value) (((value) << 3) & 0x00000008)
1911 #ifndef __ASSEMBLY__
1922 struct ALT_SYSMGR_FPGAINTF_MODULE_s
1925 uint32_t emac_0 : 1;
1926 uint32_t emac_1 : 1;
1931 typedef volatile struct ALT_SYSMGR_FPGAINTF_MODULE_s ALT_SYSMGR_FPGAINTF_MODULE_t;
1935 #define ALT_SYSMGR_FPGAINTF_MODULE_OFST 0x8
1937 #ifndef __ASSEMBLY__
1948 struct ALT_SYSMGR_FPGAINTF_s
1950 ALT_SYSMGR_FPGAINTF_GBL_t gbl;
1951 ALT_SYSMGR_FPGAINTF_INDIV_t indiv;
1952 ALT_SYSMGR_FPGAINTF_MODULE_t module;
1953 volatile uint32_t _pad_0xc_0x10;
1957 typedef volatile struct ALT_SYSMGR_FPGAINTF_s ALT_SYSMGR_FPGAINTF_t;
1959 struct ALT_SYSMGR_FPGAINTF_raw_s
1961 volatile uint32_t gbl;
1962 volatile uint32_t indiv;
1963 volatile uint32_t module;
1964 uint32_t _pad_0xc_0x10;
1968 typedef volatile struct ALT_SYSMGR_FPGAINTF_raw_s ALT_SYSMGR_FPGAINTF_raw_t;
2016 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_E_FPGAPINS 0x0
2022 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_E_SCANMGR 0x1
2025 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_LSB 0
2027 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_MSB 0
2029 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_WIDTH 1
2031 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_SET_MSK 0x00000001
2033 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_CLR_MSK 0xfffffffe
2035 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_RESET 0x0
2037 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_GET(value) (((value) & 0x00000001) >> 0)
2039 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_SET(value) (((value) << 0) & 0x00000001)
2041 #ifndef __ASSEMBLY__
2052 struct ALT_SYSMGR_SCANMGR_CTL_s
2054 uint32_t fpgajtagen : 1;
2059 typedef volatile struct ALT_SYSMGR_SCANMGR_CTL_s ALT_SYSMGR_SCANMGR_CTL_t;
2063 #define ALT_SYSMGR_SCANMGR_CTL_OFST 0x0
2065 #ifndef __ASSEMBLY__
2076 struct ALT_SYSMGR_SCANMGR_s
2078 ALT_SYSMGR_SCANMGR_CTL_t ctrl;
2082 typedef volatile struct ALT_SYSMGR_SCANMGR_s ALT_SYSMGR_SCANMGR_t;
2084 struct ALT_SYSMGR_SCANMGR_raw_s
2086 volatile uint32_t ctrl;
2090 typedef volatile struct ALT_SYSMGR_SCANMGR_raw_s ALT_SYSMGR_SCANMGR_raw_t;
2159 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_E_DIS 0x0
2166 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_E_CFG 0x1
2169 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_LSB 0
2171 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_MSB 0
2173 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_WIDTH 1
2175 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_SET_MSK 0x00000001
2177 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_CLR_MSK 0xfffffffe
2179 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_RESET 0x0
2181 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_GET(value) (((value) & 0x00000001) >> 0)
2183 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_SET(value) (((value) << 0) & 0x00000001)
2205 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_E_DIS 0x0
2211 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_E_CFG 0x1
2214 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_LSB 1
2216 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_MSB 1
2218 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_WIDTH 1
2220 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_SET_MSK 0x00000002
2222 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_CLR_MSK 0xfffffffd
2224 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_RESET 0x0
2226 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_GET(value) (((value) & 0x00000002) >> 1)
2228 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_SET(value) (((value) << 1) & 0x00000002)
2250 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_E_EN 0x0
2256 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_E_CFG 0x1
2259 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_LSB 2
2261 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_MSB 2
2263 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_WIDTH 1
2265 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_SET_MSK 0x00000004
2267 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_CLR_MSK 0xfffffffb
2269 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_RESET 0x0
2271 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_GET(value) (((value) & 0x00000004) >> 2)
2273 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_SET(value) (((value) << 2) & 0x00000004)
2296 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_E_EN 0x0
2302 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_E_CFG 0x1
2305 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_LSB 3
2307 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_MSB 3
2309 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_WIDTH 1
2311 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_SET_MSK 0x00000008
2313 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_CLR_MSK 0xfffffff7
2315 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_RESET 0x0
2317 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_GET(value) (((value) & 0x00000008) >> 3)
2319 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_SET(value) (((value) << 3) & 0x00000008)
2341 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_E_SLOW 0x0
2347 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_E_CFG 0x1
2350 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_LSB 4
2352 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_MSB 4
2354 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_WIDTH 1
2356 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_SET_MSK 0x00000010
2358 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_CLR_MSK 0xffffffef
2360 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_RESET 0x0
2362 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_GET(value) (((value) & 0x00000010) >> 4)
2364 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_SET(value) (((value) << 4) & 0x00000010)
2366 #ifndef __ASSEMBLY__
2377 struct ALT_SYSMGR_FRZCTL_VIOCTL_s
2380 uint32_t bushold : 1;
2381 uint32_t tristate : 1;
2382 uint32_t wkpullup : 1;
2388 typedef volatile struct ALT_SYSMGR_FRZCTL_VIOCTL_s ALT_SYSMGR_FRZCTL_VIOCTL_t;
2392 #define ALT_SYSMGR_FRZCTL_VIOCTL_OFST 0x0
2445 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_E_DIS 0x0
2452 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_E_CFG 0x1
2455 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_LSB 0
2457 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_MSB 0
2459 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_WIDTH 1
2461 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_SET_MSK 0x00000001
2463 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_CLR_MSK 0xfffffffe
2465 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_RESET 0x0
2467 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_GET(value) (((value) & 0x00000001) >> 0)
2469 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_SET(value) (((value) << 0) & 0x00000001)
2491 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_E_DIS 0x0
2497 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_E_CFG 0x1
2500 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_LSB 1
2502 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_MSB 1
2504 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_WIDTH 1
2506 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_SET_MSK 0x00000002
2508 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_CLR_MSK 0xfffffffd
2510 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_RESET 0x0
2512 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_GET(value) (((value) & 0x00000002) >> 1)
2514 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_SET(value) (((value) << 1) & 0x00000002)
2536 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_E_EN 0x0
2542 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_E_CFG 0x1
2545 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_LSB 2
2547 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_MSB 2
2549 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_WIDTH 1
2551 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_SET_MSK 0x00000004
2553 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_CLR_MSK 0xfffffffb
2555 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_RESET 0x0
2557 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_GET(value) (((value) & 0x00000004) >> 2)
2559 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_SET(value) (((value) << 2) & 0x00000004)
2582 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_E_EN 0x0
2588 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_E_CFG 0x1
2591 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_LSB 3
2593 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_MSB 3
2595 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_WIDTH 1
2597 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_SET_MSK 0x00000008
2599 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_CLR_MSK 0xfffffff7
2601 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_RESET 0x0
2603 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_GET(value) (((value) & 0x00000008) >> 3)
2605 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_SET(value) (((value) << 3) & 0x00000008)
2627 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_E_SLOW 0x0
2633 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_E_CFG 0x1
2636 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_LSB 4
2638 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_MSB 4
2640 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_WIDTH 1
2642 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_SET_MSK 0x00000010
2644 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_CLR_MSK 0xffffffef
2646 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_RESET 0x0
2648 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_GET(value) (((value) & 0x00000010) >> 4)
2650 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_SET(value) (((value) << 4) & 0x00000010)
2673 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_E_DIS 0x0
2679 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_E_EN 0x1
2682 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_LSB 5
2684 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_MSB 5
2686 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_WIDTH 1
2688 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_SET_MSK 0x00000020
2690 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_CLR_MSK 0xffffffdf
2692 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_RESET 0x1
2694 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_GET(value) (((value) & 0x00000020) >> 5)
2696 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_SET(value) (((value) << 5) & 0x00000020)
2718 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_E_DIS 0x0
2724 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_E_EN 0x1
2727 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_LSB 6
2729 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_MSB 6
2731 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_WIDTH 1
2733 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_SET_MSK 0x00000040
2735 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_CLR_MSK 0xffffffbf
2737 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_RESET 0x1
2739 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_GET(value) (((value) & 0x00000040) >> 6)
2741 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_SET(value) (((value) << 6) & 0x00000040)
2763 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_E_DIS 0x0
2769 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_E_EN 0x1
2772 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_LSB 7
2774 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_MSB 7
2776 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_WIDTH 1
2778 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_SET_MSK 0x00000080
2780 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_CLR_MSK 0xffffff7f
2782 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_RESET 0x1
2784 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_GET(value) (((value) & 0x00000080) >> 7)
2786 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_SET(value) (((value) << 7) & 0x00000080)
2810 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_E_DIS 0x0
2817 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_E_EN 0x1
2820 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_LSB 8
2822 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_MSB 8
2824 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_WIDTH 1
2826 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_SET_MSK 0x00000100
2828 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_CLR_MSK 0xfffffeff
2830 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_RESET 0x0
2832 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_GET(value) (((value) & 0x00000100) >> 8)
2834 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_SET(value) (((value) << 8) & 0x00000100)
2836 #ifndef __ASSEMBLY__
2847 struct ALT_SYSMGR_FRZCTL_HIOCTL_s
2850 uint32_t bushold : 1;
2851 uint32_t tristate : 1;
2852 uint32_t wkpullup : 1;
2854 uint32_t dllrst : 1;
2855 uint32_t octrst : 1;
2856 uint32_t regrst : 1;
2857 uint32_t oct_cfgen_calstart : 1;
2862 typedef volatile struct ALT_SYSMGR_FRZCTL_HIOCTL_s ALT_SYSMGR_FRZCTL_HIOCTL_t;
2866 #define ALT_SYSMGR_FRZCTL_HIOCTL_OFST 0x10
2913 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_E_SW 0x0
2921 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_E_HW 0x1
2924 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_LSB 0
2926 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_MSB 0
2928 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_WIDTH 1
2930 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_SET_MSK 0x00000001
2932 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_CLR_MSK 0xfffffffe
2934 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_RESET 0x0
2936 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_GET(value) (((value) & 0x00000001) >> 0)
2938 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_SET(value) (((value) << 0) & 0x00000001)
2940 #ifndef __ASSEMBLY__
2951 struct ALT_SYSMGR_FRZCTL_SRC_s
2958 typedef volatile struct ALT_SYSMGR_FRZCTL_SRC_s ALT_SYSMGR_FRZCTL_SRC_t;
2962 #define ALT_SYSMGR_FRZCTL_SRC_OFST 0x14
3010 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_E_REQTHAW 0x0
3016 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_E_REQFRZ 0x1
3019 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_LSB 0
3021 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_MSB 0
3023 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_WIDTH 1
3025 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_SET_MSK 0x00000001
3027 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_CLR_MSK 0xfffffffe
3029 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_RESET 0x1
3031 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_GET(value) (((value) & 0x00000001) >> 0)
3033 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_SET(value) (((value) << 0) & 0x00000001)
3066 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_E_THAWED2FROZEN 0x0
3073 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_E_THAWED 0x1
3081 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_E_FROZEN 0x2
3087 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_E_FROZEN2THAWED 0x3
3090 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_LSB 1
3092 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_MSB 2
3094 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_WIDTH 2
3096 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_SET_MSK 0x00000006
3098 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_CLR_MSK 0xfffffff9
3100 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_RESET 0x2
3102 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_GET(value) (((value) & 0x00000006) >> 1)
3104 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_SET(value) (((value) << 1) & 0x00000006)
3106 #ifndef __ASSEMBLY__
3117 struct ALT_SYSMGR_FRZCTL_HWCTL_s
3119 uint32_t vio1req : 1;
3120 const uint32_t vio1state : 2;
3125 typedef volatile struct ALT_SYSMGR_FRZCTL_HWCTL_s ALT_SYSMGR_FRZCTL_HWCTL_t;
3129 #define ALT_SYSMGR_FRZCTL_HWCTL_OFST 0x18
3131 #ifndef __ASSEMBLY__
3142 struct ALT_SYSMGR_FRZCTL_s
3144 ALT_SYSMGR_FRZCTL_VIOCTL_t vioctrl[3];
3145 volatile uint32_t _pad_0xc_0xf;
3146 ALT_SYSMGR_FRZCTL_HIOCTL_t hioctrl;
3147 ALT_SYSMGR_FRZCTL_SRC_t src;
3148 ALT_SYSMGR_FRZCTL_HWCTL_t hwctrl;
3149 volatile uint32_t _pad_0x1c_0x20;
3153 typedef volatile struct ALT_SYSMGR_FRZCTL_s ALT_SYSMGR_FRZCTL_t;
3155 struct ALT_SYSMGR_FRZCTL_raw_s
3157 volatile uint32_t vioctrl[3];
3158 uint32_t _pad_0xc_0xf;
3159 volatile uint32_t hioctrl;
3160 volatile uint32_t src;
3161 volatile uint32_t hwctrl;
3162 uint32_t _pad_0x1c_0x20;
3166 typedef volatile struct ALT_SYSMGR_FRZCTL_raw_s ALT_SYSMGR_FRZCTL_raw_t;
3216 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_E_GMII_MII 0x0
3222 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_E_RGMII 0x1
3228 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_E_RMII 0x2
3231 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_LSB 0
3233 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_MSB 1
3235 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_WIDTH 2
3237 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_SET_MSK 0x00000003
3239 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_CLR_MSK 0xfffffffc
3241 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_RESET 0x2
3243 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_GET(value) (((value) & 0x00000003) >> 0)
3245 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_SET(value) (((value) << 0) & 0x00000003)
3270 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_E_GMII_MII 0x0
3276 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_E_RGMII 0x1
3282 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_E_RMII 0x2
3285 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_LSB 2
3287 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_MSB 3
3289 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_WIDTH 2
3291 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_SET_MSK 0x0000000c
3293 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_CLR_MSK 0xfffffff3
3295 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_RESET 0x2
3297 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_GET(value) (((value) & 0x0000000c) >> 2)
3299 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_SET(value) (((value) << 2) & 0x0000000c)
3323 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_E_OSC1_CLK 0x0
3329 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_E_FPGA_PTP_REF_CLK 0x1
3332 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_LSB 4
3334 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_MSB 4
3336 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_WIDTH 1
3338 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_SET_MSK 0x00000010
3340 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_CLR_MSK 0xffffffef
3342 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_RESET 0x0
3344 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_GET(value) (((value) & 0x00000010) >> 4)
3346 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_SET(value) (((value) << 4) & 0x00000010)
3370 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_E_OSC1_CLK 0x0
3376 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_E_FPGA_PTP_REF_CLK 0x1
3379 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_LSB 5
3381 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_MSB 5
3383 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_WIDTH 1
3385 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_SET_MSK 0x00000020
3387 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_CLR_MSK 0xffffffdf
3389 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_RESET 0x0
3391 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_GET(value) (((value) & 0x00000020) >> 5)
3393 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_SET(value) (((value) << 5) & 0x00000020)
3395 #ifndef __ASSEMBLY__
3406 struct ALT_SYSMGR_EMAC_CTL_s
3408 uint32_t physel_0 : 2;
3409 uint32_t physel_1 : 2;
3410 uint32_t ptpclksel_0 : 1;
3411 uint32_t ptpclksel_1 : 1;
3416 typedef volatile struct ALT_SYSMGR_EMAC_CTL_s ALT_SYSMGR_EMAC_CTL_t;
3420 #define ALT_SYSMGR_EMAC_CTL_OFST 0x0
3483 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_NONCACHE_NONBUFF 0x0
3489 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_BUFF 0x1
3495 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_NONALLOC 0x2
3501 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_BUFF_NONALLOC 0x3
3507 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_RSVD1 0x4
3513 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_RSVD2 0x5
3519 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_WRTHRU_RDALLOC 0x6
3525 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_WRBACK_RDALLOC 0x7
3531 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_RSVD3 0x8
3537 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_RSVD4 0x9
3543 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_WRTHRU_WRALLOC 0xa
3549 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_WRBACK_WRALLOC 0xb
3555 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_RSVD5 0xc
3561 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_RSVD6 0xd
3567 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_WRTHRU_ALLOC 0xe
3573 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_WRBACK_ALLOC 0xf
3576 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_LSB 0
3578 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_MSB 3
3580 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_WIDTH 4
3582 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_SET_MSK 0x0000000f
3584 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_CLR_MSK 0xfffffff0
3586 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_RESET 0x0
3588 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_GET(value) (((value) & 0x0000000f) >> 0)
3590 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_SET(value) (((value) << 0) & 0x0000000f)
3631 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_NONCACHE_NONBUFF 0x0
3637 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_BUFF 0x1
3643 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_NONALLOC 0x2
3649 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_BUFF_NONALLOC 0x3
3655 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_RSVD1 0x4
3661 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_RSVD2 0x5
3667 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRTHRU_RDALLOC 0x6
3673 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRBACK_RDALLOC 0x7
3679 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_RSVD3 0x8
3685 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_RSVD4 0x9
3691 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRTHRU_WRALLOC 0xa
3697 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRBACK_WRALLOC 0xb
3703 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_RSVD5 0xc
3709 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_RSVD6 0xd
3715 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRTHRU_ALLOC 0xe
3721 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRBACK_ALLOC 0xf
3724 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_LSB 4
3726 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_MSB 7
3728 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_WIDTH 4
3730 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_SET_MSK 0x000000f0
3732 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_CLR_MSK 0xffffff0f
3734 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_RESET 0x0
3736 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_GET(value) (((value) & 0x000000f0) >> 4)
3738 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_SET(value) (((value) << 4) & 0x000000f0)
3779 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_NONCACHE_NONBUFF 0x0
3785 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_BUFF 0x1
3791 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_NONALLOC 0x2
3797 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_BUFF_NONALLOC 0x3
3803 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_RSVD1 0x4
3809 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_RSVD2 0x5
3815 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_WRTHRU_RDALLOC 0x6
3821 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_WRBACK_RDALLOC 0x7
3827 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_RSVD3 0x8
3833 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_RSVD4 0x9
3839 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_WRTHRU_WRALLOC 0xa
3845 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_WRBACK_WRALLOC 0xb
3851 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_RSVD5 0xc
3857 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_RSVD6 0xd
3863 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_WRTHRU_ALLOC 0xe
3869 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_WRBACK_ALLOC 0xf
3872 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_LSB 8
3874 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_MSB 11
3876 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_WIDTH 4
3878 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_SET_MSK 0x00000f00
3880 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_CLR_MSK 0xfffff0ff
3882 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_RESET 0x0
3884 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_GET(value) (((value) & 0x00000f00) >> 8)
3886 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_SET(value) (((value) << 8) & 0x00000f00)
3927 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_NONCACHE_NONBUFF 0x0
3933 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_BUFF 0x1
3939 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_NONALLOC 0x2
3945 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_BUFF_NONALLOC 0x3
3951 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_RSVD1 0x4
3957 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_RSVD2 0x5
3963 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRTHRU_RDALLOC 0x6
3969 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRBACK_RDALLOC 0x7
3975 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_RSVD3 0x8
3981 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_RSVD4 0x9
3987 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRTHRU_WRALLOC 0xa
3993 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRBACK_WRALLOC 0xb
3999 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_RSVD5 0xc
4005 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_RSVD6 0xd
4011 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRTHRU_ALLOC 0xe
4017 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRBACK_ALLOC 0xf
4020 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_LSB 12
4022 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_MSB 15
4024 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_WIDTH 4
4026 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_SET_MSK 0x0000f000
4028 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_CLR_MSK 0xffff0fff
4030 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_RESET 0x0
4032 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_GET(value) (((value) & 0x0000f000) >> 12)
4034 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_SET(value) (((value) << 12) & 0x0000f000)
4036 #ifndef __ASSEMBLY__
4047 struct ALT_SYSMGR_EMAC_L3MST_s
4049 uint32_t arcache_0 : 4;
4050 uint32_t arcache_1 : 4;
4051 uint32_t awcache_0 : 4;
4052 uint32_t awcache_1 : 4;
4057 typedef volatile struct ALT_SYSMGR_EMAC_L3MST_s ALT_SYSMGR_EMAC_L3MST_t;
4061 #define ALT_SYSMGR_EMAC_L3MST_OFST 0x4
4063 #ifndef __ASSEMBLY__
4074 struct ALT_SYSMGR_EMAC_s
4076 ALT_SYSMGR_EMAC_CTL_t ctrl;
4077 ALT_SYSMGR_EMAC_L3MST_t l3master;
4078 volatile uint32_t _pad_0x8_0x10[2];
4082 typedef volatile struct ALT_SYSMGR_EMAC_s ALT_SYSMGR_EMAC_t;
4084 struct ALT_SYSMGR_EMAC_raw_s
4086 volatile uint32_t ctrl;
4087 volatile uint32_t l3master;
4088 uint32_t _pad_0x8_0x10[2];
4092 typedef volatile struct ALT_SYSMGR_EMAC_raw_s ALT_SYSMGR_EMAC_raw_t;
4149 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_E_FPGA 0x0
4155 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_E_CAN 0x1
4158 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_LSB 0
4160 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_MSB 0
4162 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_WIDTH 1
4164 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_SET_MSK 0x00000001
4166 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_CLR_MSK 0xfffffffe
4168 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_RESET 0x0
4170 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_GET(value) (((value) & 0x00000001) >> 0)
4172 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_SET(value) (((value) << 0) & 0x00000001)
4196 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_E_FPGA 0x0
4202 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_E_CAN 0x1
4205 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_LSB 1
4207 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_MSB 1
4209 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_WIDTH 1
4211 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_SET_MSK 0x00000002
4213 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_CLR_MSK 0xfffffffd
4215 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_RESET 0x0
4217 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_GET(value) (((value) & 0x00000002) >> 1)
4219 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_SET(value) (((value) << 1) & 0x00000002)
4243 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_E_FPGA 0x0
4249 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_E_CAN 0x1
4252 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_LSB 2
4254 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_MSB 2
4256 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_WIDTH 1
4258 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_SET_MSK 0x00000004
4260 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_CLR_MSK 0xfffffffb
4262 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_RESET 0x0
4264 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_GET(value) (((value) & 0x00000004) >> 2)
4266 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_SET(value) (((value) << 2) & 0x00000004)
4290 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_E_FPGA 0x0
4296 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_E_CAN 0x1
4299 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_LSB 3
4301 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_MSB 3
4303 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_WIDTH 1
4305 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_SET_MSK 0x00000008
4307 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_CLR_MSK 0xfffffff7
4309 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_RESET 0x0
4311 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_GET(value) (((value) & 0x00000008) >> 3)
4313 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_SET(value) (((value) << 3) & 0x00000008)
4330 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_LSB 4
4332 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_MSB 4
4334 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_WIDTH 1
4336 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_SET_MSK 0x00000010
4338 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_CLR_MSK 0xffffffef
4340 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_RESET 0x0
4342 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_GET(value) (((value) & 0x00000010) >> 4)
4344 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_SET(value) (((value) << 4) & 0x00000010)
4360 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_LSB 5
4362 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_MSB 12
4364 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_WIDTH 8
4366 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_SET_MSK 0x00001fe0
4368 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_CLR_MSK 0xffffe01f
4370 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_RESET 0x0
4372 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_GET(value) (((value) & 0x00001fe0) >> 5)
4374 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_SET(value) (((value) << 5) & 0x00001fe0)
4376 #ifndef __ASSEMBLY__
4387 struct ALT_SYSMGR_DMA_CTL_s
4389 uint32_t chansel_0 : 1;
4390 uint32_t chansel_1 : 1;
4391 uint32_t chansel_2 : 1;
4392 uint32_t chansel_3 : 1;
4393 uint32_t mgrnonsecure : 1;
4394 uint32_t irqnonsecure : 8;
4399 typedef volatile struct ALT_SYSMGR_DMA_CTL_s ALT_SYSMGR_DMA_CTL_t;
4403 #define ALT_SYSMGR_DMA_CTL_OFST 0x0
4437 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_LSB 0
4439 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_MSB 31
4441 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_WIDTH 32
4443 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_SET_MSK 0xffffffff
4445 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_CLR_MSK 0x00000000
4447 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_RESET 0x0
4449 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_GET(value) (((value) & 0xffffffff) >> 0)
4451 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_SET(value) (((value) << 0) & 0xffffffff)
4453 #ifndef __ASSEMBLY__
4464 struct ALT_SYSMGR_DMA_PERSECURITY_s
4466 uint32_t nonsecure : 32;
4470 typedef volatile struct ALT_SYSMGR_DMA_PERSECURITY_s ALT_SYSMGR_DMA_PERSECURITY_t;
4474 #define ALT_SYSMGR_DMA_PERSECURITY_OFST 0x4
4476 #ifndef __ASSEMBLY__
4487 struct ALT_SYSMGR_DMA_s
4489 ALT_SYSMGR_DMA_CTL_t ctrl;
4490 ALT_SYSMGR_DMA_PERSECURITY_t persecurity;
4494 typedef volatile struct ALT_SYSMGR_DMA_s ALT_SYSMGR_DMA_t;
4496 struct ALT_SYSMGR_DMA_raw_s
4498 volatile uint32_t ctrl;
4499 volatile uint32_t persecurity;
4503 typedef volatile struct ALT_SYSMGR_DMA_raw_s ALT_SYSMGR_DMA_raw_t;
4539 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_LSB 0
4541 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_MSB 31
4543 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_WIDTH 32
4545 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_SET_MSK 0xffffffff
4547 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_CLR_MSK 0x00000000
4549 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_RESET 0x0
4551 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_GET(value) (((value) & 0xffffffff) >> 0)
4553 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_SET(value) (((value) << 0) & 0xffffffff)
4555 #ifndef __ASSEMBLY__
4566 struct ALT_SYSMGR_ISW_HANDOFF_s
4568 uint32_t value : 32;
4572 typedef volatile struct ALT_SYSMGR_ISW_HANDOFF_s ALT_SYSMGR_ISW_HANDOFF_t;
4576 #define ALT_SYSMGR_ISW_HANDOFF_OFST 0x0
4578 #ifndef __ASSEMBLY__
4589 struct ALT_SYSMGR_ISW_s
4591 ALT_SYSMGR_ISW_HANDOFF_t handoff[8];
4595 typedef volatile struct ALT_SYSMGR_ISW_s ALT_SYSMGR_ISW_t;
4597 struct ALT_SYSMGR_ISW_raw_s
4599 volatile uint32_t handoff[8];
4603 typedef volatile struct ALT_SYSMGR_ISW_raw_s ALT_SYSMGR_ISW_raw_t;
4655 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_E_DISD 0x0
4661 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_E_END 0x1
4664 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_LSB 0
4666 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_MSB 0
4668 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_WIDTH 1
4670 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_SET_MSK 0x00000001
4672 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_CLR_MSK 0xfffffffe
4674 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_RESET 0x0
4676 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_GET(value) (((value) & 0x00000001) >> 0)
4678 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_SET(value) (((value) << 0) & 0x00000001)
4706 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_E_DISD 0x0
4712 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_E_END 0x1
4715 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_LSB 1
4717 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_MSB 1
4719 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_WIDTH 1
4721 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_SET_MSK 0x00000002
4723 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_CLR_MSK 0xfffffffd
4725 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_RESET 0x0
4727 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_GET(value) (((value) & 0x00000002) >> 1)
4729 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_SET(value) (((value) << 1) & 0x00000002)
4731 #ifndef __ASSEMBLY__
4742 struct ALT_SYSMGR_ROMCODE_CTL_s
4744 uint32_t warmrstcfgpinmux : 1;
4745 uint32_t warmrstcfgio : 1;
4750 typedef volatile struct ALT_SYSMGR_ROMCODE_CTL_s ALT_SYSMGR_ROMCODE_CTL_t;
4754 #define ALT_SYSMGR_ROMCODE_CTL_OFST 0x0
4780 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_LSB 0
4782 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_MSB 31
4784 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_WIDTH 32
4786 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_SET_MSK 0xffffffff
4788 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_CLR_MSK 0x00000000
4790 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_RESET 0x0
4792 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_GET(value) (((value) & 0xffffffff) >> 0)
4794 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_SET(value) (((value) << 0) & 0xffffffff)
4796 #ifndef __ASSEMBLY__
4807 struct ALT_SYSMGR_ROMCODE_CPU1STARTADDR_s
4809 uint32_t value : 32;
4813 typedef volatile struct ALT_SYSMGR_ROMCODE_CPU1STARTADDR_s ALT_SYSMGR_ROMCODE_CPU1STARTADDR_t;
4817 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_OFST 0x4
4851 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_E_INVALID 0x0
4856 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_E_VALID 0x49535756
4859 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_LSB 0
4861 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_MSB 31
4863 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_WIDTH 32
4865 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_SET_MSK 0xffffffff
4867 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_CLR_MSK 0x00000000
4869 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_RESET 0x0
4871 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_GET(value) (((value) & 0xffffffff) >> 0)
4873 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_SET(value) (((value) << 0) & 0xffffffff)
4875 #ifndef __ASSEMBLY__
4886 struct ALT_SYSMGR_ROMCODE_INITSWSTATE_s
4888 uint32_t value : 32;
4892 typedef volatile struct ALT_SYSMGR_ROMCODE_INITSWSTATE_s ALT_SYSMGR_ROMCODE_INITSWSTATE_t;
4896 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_OFST 0x8
4921 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_LSB 0
4923 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_MSB 1
4925 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_WIDTH 2
4927 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_SET_MSK 0x00000003
4929 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_CLR_MSK 0xfffffffc
4931 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_RESET 0x0
4933 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_GET(value) (((value) & 0x00000003) >> 0)
4935 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_SET(value) (((value) << 0) & 0x00000003)
4937 #ifndef __ASSEMBLY__
4948 struct ALT_SYSMGR_ROMCODE_INITSWLASTLD_s
4955 typedef volatile struct ALT_SYSMGR_ROMCODE_INITSWLASTLD_s ALT_SYSMGR_ROMCODE_INITSWLASTLD_t;
4959 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_OFST 0xc
4983 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_LSB 0
4985 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_MSB 31
4987 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_WIDTH 32
4989 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_SET_MSK 0xffffffff
4991 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_CLR_MSK 0x00000000
4993 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_RESET 0x0
4995 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_GET(value) (((value) & 0xffffffff) >> 0)
4997 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_SET(value) (((value) << 0) & 0xffffffff)
4999 #ifndef __ASSEMBLY__
5010 struct ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_s
5012 uint32_t value : 32;
5016 typedef volatile struct ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_s ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_t;
5020 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_OFST 0x10
5069 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_E_DISD 0x0
5075 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_E_END 0xae9efebc
5078 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_LSB 0
5080 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_MSB 31
5082 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_WIDTH 32
5084 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_SET_MSK 0xffffffff
5086 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_CLR_MSK 0x00000000
5088 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_RESET 0x0
5090 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_GET(value) (((value) & 0xffffffff) >> 0)
5092 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_SET(value) (((value) << 0) & 0xffffffff)
5094 #ifndef __ASSEMBLY__
5105 struct ALT_SYSMGR_ROMCODE_WARMRAM_EN_s
5107 uint32_t magic : 32;
5111 typedef volatile struct ALT_SYSMGR_ROMCODE_WARMRAM_EN_s ALT_SYSMGR_ROMCODE_WARMRAM_EN_t;
5115 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_OFST 0x0
5117 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SYSMGR_ROMCODE_WARMRAM_EN_OFST))
5144 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_LSB 0
5146 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_MSB 15
5148 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_WIDTH 16
5150 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_SET_MSK 0x0000ffff
5152 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_CLR_MSK 0xffff0000
5154 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_RESET 0x0
5156 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_GET(value) (((value) & 0x0000ffff) >> 0)
5158 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_SET(value) (((value) << 0) & 0x0000ffff)
5160 #ifndef __ASSEMBLY__
5171 struct ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_s
5173 uint32_t offset : 16;
5178 typedef volatile struct ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_s ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_t;
5182 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFST 0x4
5184 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFST))
5219 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_LSB 0
5221 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_MSB 15
5223 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_WIDTH 16
5225 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_SET_MSK 0x0000ffff
5227 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_CLR_MSK 0xffff0000
5229 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_RESET 0x0
5231 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_GET(value) (((value) & 0x0000ffff) >> 0)
5233 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_SET(value) (((value) << 0) & 0x0000ffff)
5235 #ifndef __ASSEMBLY__
5246 struct ALT_SYSMGR_ROMCODE_WARMRAM_LEN_s
5253 typedef volatile struct ALT_SYSMGR_ROMCODE_WARMRAM_LEN_s ALT_SYSMGR_ROMCODE_WARMRAM_LEN_t;
5257 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_OFST 0x8
5259 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SYSMGR_ROMCODE_WARMRAM_LEN_OFST))
5286 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_LSB 0
5288 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_MSB 15
5290 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_WIDTH 16
5292 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_SET_MSK 0x0000ffff
5294 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_CLR_MSK 0xffff0000
5296 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_RESET 0x0
5298 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_GET(value) (((value) & 0x0000ffff) >> 0)
5300 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_SET(value) (((value) << 0) & 0x0000ffff)
5302 #ifndef __ASSEMBLY__
5313 struct ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_s
5315 uint32_t offset : 16;
5320 typedef volatile struct ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_s ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_t;
5324 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFST 0xc
5326 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFST))
5364 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_LSB 0
5366 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_MSB 31
5368 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_WIDTH 32
5370 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_SET_MSK 0xffffffff
5372 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_CLR_MSK 0x00000000
5374 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_RESET 0xe763552a
5376 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_GET(value) (((value) & 0xffffffff) >> 0)
5378 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_SET(value) (((value) << 0) & 0xffffffff)
5380 #ifndef __ASSEMBLY__
5391 struct ALT_SYSMGR_ROMCODE_WARMRAM_CRC_s
5393 uint32_t expected : 32;
5397 typedef volatile struct ALT_SYSMGR_ROMCODE_WARMRAM_CRC_s ALT_SYSMGR_ROMCODE_WARMRAM_CRC_t;
5401 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_OFST 0x10
5403 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SYSMGR_ROMCODE_WARMRAM_CRC_OFST))
5405 #ifndef __ASSEMBLY__
5416 struct ALT_SYSMGR_ROMCODE_WARMRAM_s
5418 ALT_SYSMGR_ROMCODE_WARMRAM_EN_t enable;
5419 ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_t datastart;
5420 ALT_SYSMGR_ROMCODE_WARMRAM_LEN_t length;
5421 ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_t execution;
5422 ALT_SYSMGR_ROMCODE_WARMRAM_CRC_t crc;
5423 volatile uint32_t _pad_0x14_0x20[3];
5427 typedef volatile struct ALT_SYSMGR_ROMCODE_WARMRAM_s ALT_SYSMGR_ROMCODE_WARMRAM_t;
5429 struct ALT_SYSMGR_ROMCODE_WARMRAM_raw_s
5431 volatile uint32_t enable;
5432 volatile uint32_t datastart;
5433 volatile uint32_t length;
5434 volatile uint32_t execution;
5435 volatile uint32_t crc;
5436 uint32_t _pad_0x14_0x20[3];
5440 typedef volatile struct ALT_SYSMGR_ROMCODE_WARMRAM_raw_s ALT_SYSMGR_ROMCODE_WARMRAM_raw_t;
5444 #ifndef __ASSEMBLY__
5455 struct ALT_SYSMGR_ROMCODE_s
5457 ALT_SYSMGR_ROMCODE_CTL_t ctrl;
5458 ALT_SYSMGR_ROMCODE_CPU1STARTADDR_t cpu1startaddr;
5459 ALT_SYSMGR_ROMCODE_INITSWSTATE_t initswstate;
5460 ALT_SYSMGR_ROMCODE_INITSWLASTLD_t initswlastld;
5461 ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_t bootromswstate;
5462 volatile uint32_t _pad_0x14_0x1f[3];
5463 ALT_SYSMGR_ROMCODE_WARMRAM_t romcodegrp_warmramgrp;
5467 typedef volatile struct ALT_SYSMGR_ROMCODE_s ALT_SYSMGR_ROMCODE_t;
5469 struct ALT_SYSMGR_ROMCODE_raw_s
5471 volatile uint32_t ctrl;
5472 volatile uint32_t cpu1startaddr;
5473 volatile uint32_t initswstate;
5474 volatile uint32_t initswlastld;
5475 volatile uint32_t bootromswstate;
5476 uint32_t _pad_0x14_0x1f[3];
5477 ALT_SYSMGR_ROMCODE_WARMRAM_raw_t romcodegrp_warmramgrp;
5481 typedef volatile struct ALT_SYSMGR_ROMCODE_raw_s ALT_SYSMGR_ROMCODE_raw_t;
5533 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_E_DIS 0x0
5539 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_E_EN 0x1
5542 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_LSB 0
5544 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_MSB 0
5546 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_WIDTH 1
5548 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_SET_MSK 0x00000001
5550 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_CLR_MSK 0xfffffffe
5552 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_RESET 0x0
5554 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_GET(value) (((value) & 0x00000001) >> 0)
5556 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_SET(value) (((value) << 0) & 0x00000001)
5585 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_E_DIS 0x0
5594 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_E_EN 0x1
5597 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_LSB 1
5599 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_MSB 1
5601 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_WIDTH 1
5603 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_SET_MSK 0x00000002
5605 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_CLR_MSK 0xfffffffd
5607 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_RESET 0x1
5609 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_GET(value) (((value) & 0x00000002) >> 1)
5611 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_SET(value) (((value) << 1) & 0x00000002)
5613 #ifndef __ASSEMBLY__
5624 struct ALT_SYSMGR_ROMHW_CTL_s
5626 uint32_t waitstate : 1;
5627 uint32_t ensfmdwru : 1;
5632 typedef volatile struct ALT_SYSMGR_ROMHW_CTL_s ALT_SYSMGR_ROMHW_CTL_t;
5636 #define ALT_SYSMGR_ROMHW_CTL_OFST 0x0
5638 #ifndef __ASSEMBLY__
5649 struct ALT_SYSMGR_ROMHW_s
5651 ALT_SYSMGR_ROMHW_CTL_t ctrl;
5655 typedef volatile struct ALT_SYSMGR_ROMHW_s ALT_SYSMGR_ROMHW_t;
5657 struct ALT_SYSMGR_ROMHW_raw_s
5659 volatile uint32_t ctrl;
5663 typedef volatile struct ALT_SYSMGR_ROMHW_raw_s ALT_SYSMGR_ROMHW_raw_t;
5717 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES0 0x0
5723 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES45 0x1
5729 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES90 0x2
5735 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES135 0x3
5741 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES180 0x4
5747 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES225 0x5
5753 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES270 0x6
5759 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES315 0x7
5762 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_LSB 0
5764 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_MSB 2
5766 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_WIDTH 3
5768 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_SET_MSK 0x00000007
5770 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_CLR_MSK 0xfffffff8
5772 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_RESET 0x0
5774 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_GET(value) (((value) & 0x00000007) >> 0)
5776 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_SET(value) (((value) << 0) & 0x00000007)
5804 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES0 0x0
5810 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES45 0x1
5816 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES90 0x2
5822 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES135 0x3
5828 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES180 0x4
5834 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES225 0x5
5840 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES270 0x6
5846 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES315 0x7
5849 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_LSB 3
5851 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_MSB 5
5853 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_WIDTH 3
5855 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_SET_MSK 0x00000038
5857 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_CLR_MSK 0xffffffc7
5859 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_RESET 0x0
5861 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_GET(value) (((value) & 0x00000038) >> 3)
5863 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_SET(value) (((value) << 3) & 0x00000038)
5882 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_LSB 6
5884 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_MSB 6
5886 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_WIDTH 1
5888 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_SET_MSK 0x00000040
5890 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_CLR_MSK 0xffffffbf
5892 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_RESET 0x0
5894 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_GET(value) (((value) & 0x00000040) >> 6)
5896 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_SET(value) (((value) << 6) & 0x00000040)
5898 #ifndef __ASSEMBLY__
5909 struct ALT_SYSMGR_SDMMC_CTL_s
5911 uint32_t drvsel : 3;
5912 uint32_t smplsel : 3;
5913 uint32_t fbclksel : 1;
5918 typedef volatile struct ALT_SYSMGR_SDMMC_CTL_s ALT_SYSMGR_SDMMC_CTL_t;
5922 #define ALT_SYSMGR_SDMMC_CTL_OFST 0x0
5966 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_E_OPCODE 0x0
5972 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_E_DATA 0x1
5975 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_LSB 0
5977 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_MSB 0
5979 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_WIDTH 1
5981 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_SET_MSK 0x00000001
5983 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_CLR_MSK 0xfffffffe
5985 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_RESET 0x1
5987 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_GET(value) (((value) & 0x00000001) >> 0)
5989 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_SET(value) (((value) << 0) & 0x00000001)
6000 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_LSB 1
6002 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_MSB 1
6004 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_WIDTH 1
6006 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_SET_MSK 0x00000002
6008 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_CLR_MSK 0xfffffffd
6010 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_RESET 0x1
6012 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_GET(value) (((value) & 0x00000002) >> 1)
6014 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_SET(value) (((value) << 1) & 0x00000002)
6025 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_LSB 2
6027 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_MSB 2
6029 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_WIDTH 1
6031 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_SET_MSK 0x00000004
6033 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_CLR_MSK 0xfffffffb
6035 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_RESET 0x0
6037 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_GET(value) (((value) & 0x00000004) >> 2)
6039 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_SET(value) (((value) << 2) & 0x00000004)
6050 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_LSB 3
6052 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_MSB 3
6054 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_WIDTH 1
6056 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_SET_MSK 0x00000008
6058 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_CLR_MSK 0xfffffff7
6060 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_RESET 0x0
6062 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_GET(value) (((value) & 0x00000008) >> 3)
6064 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_SET(value) (((value) << 3) & 0x00000008)
6066 #ifndef __ASSEMBLY__
6077 struct ALT_SYSMGR_SDMMC_L3MST_s
6079 uint32_t hprotdata_0 : 1;
6080 uint32_t hprotpriv_0 : 1;
6081 uint32_t hprotbuff_0 : 1;
6082 uint32_t hprotcache_0 : 1;
6087 typedef volatile struct ALT_SYSMGR_SDMMC_L3MST_s ALT_SYSMGR_SDMMC_L3MST_t;
6091 #define ALT_SYSMGR_SDMMC_L3MST_OFST 0x4
6093 #ifndef __ASSEMBLY__
6104 struct ALT_SYSMGR_SDMMC_s
6106 ALT_SYSMGR_SDMMC_CTL_t ctrl;
6107 ALT_SYSMGR_SDMMC_L3MST_t l3master;
6111 typedef volatile struct ALT_SYSMGR_SDMMC_s ALT_SYSMGR_SDMMC_t;
6113 struct ALT_SYSMGR_SDMMC_raw_s
6115 volatile uint32_t ctrl;
6116 volatile uint32_t l3master;
6120 typedef volatile struct ALT_SYSMGR_SDMMC_raw_s ALT_SYSMGR_SDMMC_raw_t;
6161 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_LSB 0
6163 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_MSB 0
6165 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_WIDTH 1
6167 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_SET_MSK 0x00000001
6169 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_CLR_MSK 0xfffffffe
6171 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_RESET 0x0
6173 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_GET(value) (((value) & 0x00000001) >> 0)
6175 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_SET(value) (((value) << 0) & 0x00000001)
6186 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_LSB 1
6188 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_MSB 1
6190 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_WIDTH 1
6192 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_SET_MSK 0x00000002
6194 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_CLR_MSK 0xfffffffd
6196 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_RESET 0x0
6198 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_GET(value) (((value) & 0x00000002) >> 1)
6200 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_SET(value) (((value) << 1) & 0x00000002)
6212 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_LSB 2
6214 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_MSB 2
6216 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_WIDTH 1
6218 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_SET_MSK 0x00000004
6220 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_CLR_MSK 0xfffffffb
6222 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_RESET 0x0
6224 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_GET(value) (((value) & 0x00000004) >> 2)
6226 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_SET(value) (((value) << 2) & 0x00000004)
6238 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_LSB 3
6240 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_MSB 3
6242 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_WIDTH 1
6244 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_SET_MSK 0x00000008
6246 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_CLR_MSK 0xfffffff7
6248 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_RESET 0x0
6250 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_GET(value) (((value) & 0x00000008) >> 3)
6252 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_SET(value) (((value) << 3) & 0x00000008)
6254 #ifndef __ASSEMBLY__
6265 struct ALT_SYSMGR_NAND_BOOTSTRAP_s
6267 uint32_t noinit : 1;
6268 uint32_t page512 : 1;
6269 uint32_t noloadb0p0 : 1;
6270 uint32_t tworowaddr : 1;
6275 typedef volatile struct ALT_SYSMGR_NAND_BOOTSTRAP_s ALT_SYSMGR_NAND_BOOTSTRAP_t;
6279 #define ALT_SYSMGR_NAND_BOOTSTRAP_OFST 0x0
6338 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_NONCACHE_NONBUFF 0x0
6344 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_BUFF 0x1
6350 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_NONALLOC 0x2
6356 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_BUFF_NONALLOC 0x3
6362 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_RSVD1 0x4
6368 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_RSVD2 0x5
6374 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_WRTHRU_RDALLOC 0x6
6380 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_WRBACK_RDALLOC 0x7
6386 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_RSVD3 0x8
6392 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_RSVD4 0x9
6398 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_WRTHRU_WRALLOC 0xa
6404 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_WRBACK_WRALLOC 0xb
6410 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_RSVD5 0xc
6416 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_RSVD6 0xd
6422 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_WRTHRU_ALLOC 0xe
6428 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_WRBACK_ALLOC 0xf
6431 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_LSB 0
6433 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_MSB 3
6435 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_WIDTH 4
6437 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_SET_MSK 0x0000000f
6439 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_CLR_MSK 0xfffffff0
6441 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_RESET 0x0
6443 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_GET(value) (((value) & 0x0000000f) >> 0)
6445 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_SET(value) (((value) << 0) & 0x0000000f)
6484 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_NONCACHE_NONBUFF 0x0
6490 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_BUFF 0x1
6496 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_NONALLOC 0x2
6502 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_BUFF_NONALLOC 0x3
6508 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_RSVD1 0x4
6514 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_RSVD2 0x5
6520 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_WRTHRU_RDALLOC 0x6
6526 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_WRBACK_RDALLOC 0x7
6532 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_RSVD3 0x8
6538 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_RSVD4 0x9
6544 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_WRTHRU_WRALLOC 0xa
6550 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_WRBACK_WRALLOC 0xb
6556 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_RSVD5 0xc
6562 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_RSVD6 0xd
6568 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_WRTHRU_ALLOC 0xe
6574 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_WRBACK_ALLOC 0xf
6577 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_LSB 4
6579 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_MSB 7
6581 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_WIDTH 4
6583 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_SET_MSK 0x000000f0
6585 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_CLR_MSK 0xffffff0f
6587 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_RESET 0x0
6589 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_GET(value) (((value) & 0x000000f0) >> 4)
6591 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_SET(value) (((value) << 4) & 0x000000f0)
6593 #ifndef __ASSEMBLY__
6604 struct ALT_SYSMGR_NAND_L3MST_s
6606 uint32_t arcache_0 : 4;
6607 uint32_t awcache_0 : 4;
6612 typedef volatile struct ALT_SYSMGR_NAND_L3MST_s ALT_SYSMGR_NAND_L3MST_t;
6616 #define ALT_SYSMGR_NAND_L3MST_OFST 0x4
6618 #ifndef __ASSEMBLY__
6629 struct ALT_SYSMGR_NAND_s
6631 ALT_SYSMGR_NAND_BOOTSTRAP_t bootstrap;
6632 ALT_SYSMGR_NAND_L3MST_t l3master;
6636 typedef volatile struct ALT_SYSMGR_NAND_s ALT_SYSMGR_NAND_t;
6638 struct ALT_SYSMGR_NAND_raw_s
6640 volatile uint32_t bootstrap;
6641 volatile uint32_t l3master;
6645 typedef volatile struct ALT_SYSMGR_NAND_raw_s ALT_SYSMGR_NAND_raw_t;
6705 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_E_OPCODE 0x0
6711 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_E_DATA 0x1
6714 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_LSB 0
6716 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_MSB 0
6718 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_WIDTH 1
6720 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_SET_MSK 0x00000001
6722 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_CLR_MSK 0xfffffffe
6724 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_RESET 0x1
6726 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_GET(value) (((value) & 0x00000001) >> 0)
6728 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_SET(value) (((value) << 0) & 0x00000001)
6752 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_E_OPCODE 0x0
6758 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_E_DATA 0x1
6761 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_LSB 1
6763 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_MSB 1
6765 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_WIDTH 1
6767 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_SET_MSK 0x00000002
6769 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_CLR_MSK 0xfffffffd
6771 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_RESET 0x1
6773 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_GET(value) (((value) & 0x00000002) >> 1)
6775 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_SET(value) (((value) << 1) & 0x00000002)
6788 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_LSB 2
6790 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_MSB 2
6792 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_WIDTH 1
6794 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_SET_MSK 0x00000004
6796 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_CLR_MSK 0xfffffffb
6798 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_RESET 0x1
6800 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_GET(value) (((value) & 0x00000004) >> 2)
6802 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_SET(value) (((value) << 2) & 0x00000004)
6815 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_LSB 3
6817 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_MSB 3
6819 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_WIDTH 1
6821 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_SET_MSK 0x00000008
6823 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_CLR_MSK 0xfffffff7
6825 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_RESET 0x1
6827 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_GET(value) (((value) & 0x00000008) >> 3)
6829 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_SET(value) (((value) << 3) & 0x00000008)
6842 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_LSB 4
6844 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_MSB 4
6846 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_WIDTH 1
6848 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_SET_MSK 0x00000010
6850 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_CLR_MSK 0xffffffef
6852 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_RESET 0x0
6854 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_GET(value) (((value) & 0x00000010) >> 4)
6856 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_SET(value) (((value) << 4) & 0x00000010)
6869 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_LSB 5
6871 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_MSB 5
6873 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_WIDTH 1
6875 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_SET_MSK 0x00000020
6877 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_CLR_MSK 0xffffffdf
6879 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_RESET 0x0
6881 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_GET(value) (((value) & 0x00000020) >> 5)
6883 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_SET(value) (((value) << 5) & 0x00000020)
6896 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_LSB 6
6898 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_MSB 6
6900 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_WIDTH 1
6902 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_SET_MSK 0x00000040
6904 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_CLR_MSK 0xffffffbf
6906 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_RESET 0x0
6908 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_GET(value) (((value) & 0x00000040) >> 6)
6910 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_SET(value) (((value) << 6) & 0x00000040)
6923 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_LSB 7
6925 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_MSB 7
6927 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_WIDTH 1
6929 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_SET_MSK 0x00000080
6931 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_CLR_MSK 0xffffff7f
6933 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_RESET 0x0
6935 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_GET(value) (((value) & 0x00000080) >> 7)
6937 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_SET(value) (((value) << 7) & 0x00000080)
6939 #ifndef __ASSEMBLY__
6950 struct ALT_SYSMGR_USB_L3MST_s
6952 uint32_t hprotdata_0 : 1;
6953 uint32_t hprotdata_1 : 1;
6954 uint32_t hprotpriv_0 : 1;
6955 uint32_t hprotpriv_1 : 1;
6956 uint32_t hprotbuff_0 : 1;
6957 uint32_t hprotbuff_1 : 1;
6958 uint32_t hprotcache_0 : 1;
6959 uint32_t hprotcache_1 : 1;
6964 typedef volatile struct ALT_SYSMGR_USB_L3MST_s ALT_SYSMGR_USB_L3MST_t;
6968 #define ALT_SYSMGR_USB_L3MST_OFST 0x0
6970 #ifndef __ASSEMBLY__
6981 struct ALT_SYSMGR_USB_s
6983 ALT_SYSMGR_USB_L3MST_t l3master;
6987 typedef volatile struct ALT_SYSMGR_USB_s ALT_SYSMGR_USB_t;
6989 struct ALT_SYSMGR_USB_raw_s
6991 volatile uint32_t l3master;
6995 typedef volatile struct ALT_SYSMGR_USB_raw_s ALT_SYSMGR_USB_raw_t;
7034 #define ALT_SYSMGR_ECC_L2_EN_LSB 0
7036 #define ALT_SYSMGR_ECC_L2_EN_MSB 0
7038 #define ALT_SYSMGR_ECC_L2_EN_WIDTH 1
7040 #define ALT_SYSMGR_ECC_L2_EN_SET_MSK 0x00000001
7042 #define ALT_SYSMGR_ECC_L2_EN_CLR_MSK 0xfffffffe
7044 #define ALT_SYSMGR_ECC_L2_EN_RESET 0x0
7046 #define ALT_SYSMGR_ECC_L2_EN_GET(value) (((value) & 0x00000001) >> 0)
7048 #define ALT_SYSMGR_ECC_L2_EN_SET(value) (((value) << 0) & 0x00000001)
7060 #define ALT_SYSMGR_ECC_L2_INJS_LSB 1
7062 #define ALT_SYSMGR_ECC_L2_INJS_MSB 1
7064 #define ALT_SYSMGR_ECC_L2_INJS_WIDTH 1
7066 #define ALT_SYSMGR_ECC_L2_INJS_SET_MSK 0x00000002
7068 #define ALT_SYSMGR_ECC_L2_INJS_CLR_MSK 0xfffffffd
7070 #define ALT_SYSMGR_ECC_L2_INJS_RESET 0x0
7072 #define ALT_SYSMGR_ECC_L2_INJS_GET(value) (((value) & 0x00000002) >> 1)
7074 #define ALT_SYSMGR_ECC_L2_INJS_SET(value) (((value) << 1) & 0x00000002)
7086 #define ALT_SYSMGR_ECC_L2_INJD_LSB 2
7088 #define ALT_SYSMGR_ECC_L2_INJD_MSB 2
7090 #define ALT_SYSMGR_ECC_L2_INJD_WIDTH 1
7092 #define ALT_SYSMGR_ECC_L2_INJD_SET_MSK 0x00000004
7094 #define ALT_SYSMGR_ECC_L2_INJD_CLR_MSK 0xfffffffb
7096 #define ALT_SYSMGR_ECC_L2_INJD_RESET 0x0
7098 #define ALT_SYSMGR_ECC_L2_INJD_GET(value) (((value) & 0x00000004) >> 2)
7100 #define ALT_SYSMGR_ECC_L2_INJD_SET(value) (((value) << 2) & 0x00000004)
7102 #ifndef __ASSEMBLY__
7113 struct ALT_SYSMGR_ECC_L2_s
7122 typedef volatile struct ALT_SYSMGR_ECC_L2_s ALT_SYSMGR_ECC_L2_t;
7126 #define ALT_SYSMGR_ECC_L2_OFST 0x0
7158 #define ALT_SYSMGR_ECC_OCRAM_EN_LSB 0
7160 #define ALT_SYSMGR_ECC_OCRAM_EN_MSB 0
7162 #define ALT_SYSMGR_ECC_OCRAM_EN_WIDTH 1
7164 #define ALT_SYSMGR_ECC_OCRAM_EN_SET_MSK 0x00000001
7166 #define ALT_SYSMGR_ECC_OCRAM_EN_CLR_MSK 0xfffffffe
7168 #define ALT_SYSMGR_ECC_OCRAM_EN_RESET 0x0
7170 #define ALT_SYSMGR_ECC_OCRAM_EN_GET(value) (((value) & 0x00000001) >> 0)
7172 #define ALT_SYSMGR_ECC_OCRAM_EN_SET(value) (((value) << 0) & 0x00000001)
7184 #define ALT_SYSMGR_ECC_OCRAM_INJS_LSB 1
7186 #define ALT_SYSMGR_ECC_OCRAM_INJS_MSB 1
7188 #define ALT_SYSMGR_ECC_OCRAM_INJS_WIDTH 1
7190 #define ALT_SYSMGR_ECC_OCRAM_INJS_SET_MSK 0x00000002
7192 #define ALT_SYSMGR_ECC_OCRAM_INJS_CLR_MSK 0xfffffffd
7194 #define ALT_SYSMGR_ECC_OCRAM_INJS_RESET 0x0
7196 #define ALT_SYSMGR_ECC_OCRAM_INJS_GET(value) (((value) & 0x00000002) >> 1)
7198 #define ALT_SYSMGR_ECC_OCRAM_INJS_SET(value) (((value) << 1) & 0x00000002)
7210 #define ALT_SYSMGR_ECC_OCRAM_INJD_LSB 2
7212 #define ALT_SYSMGR_ECC_OCRAM_INJD_MSB 2
7214 #define ALT_SYSMGR_ECC_OCRAM_INJD_WIDTH 1
7216 #define ALT_SYSMGR_ECC_OCRAM_INJD_SET_MSK 0x00000004
7218 #define ALT_SYSMGR_ECC_OCRAM_INJD_CLR_MSK 0xfffffffb
7220 #define ALT_SYSMGR_ECC_OCRAM_INJD_RESET 0x0
7222 #define ALT_SYSMGR_ECC_OCRAM_INJD_GET(value) (((value) & 0x00000004) >> 2)
7224 #define ALT_SYSMGR_ECC_OCRAM_INJD_SET(value) (((value) << 2) & 0x00000004)
7237 #define ALT_SYSMGR_ECC_OCRAM_SERR_LSB 3
7239 #define ALT_SYSMGR_ECC_OCRAM_SERR_MSB 3
7241 #define ALT_SYSMGR_ECC_OCRAM_SERR_WIDTH 1
7243 #define ALT_SYSMGR_ECC_OCRAM_SERR_SET_MSK 0x00000008
7245 #define ALT_SYSMGR_ECC_OCRAM_SERR_CLR_MSK 0xfffffff7
7247 #define ALT_SYSMGR_ECC_OCRAM_SERR_RESET 0x0
7249 #define ALT_SYSMGR_ECC_OCRAM_SERR_GET(value) (((value) & 0x00000008) >> 3)
7251 #define ALT_SYSMGR_ECC_OCRAM_SERR_SET(value) (((value) << 3) & 0x00000008)
7265 #define ALT_SYSMGR_ECC_OCRAM_DERR_LSB 4
7267 #define ALT_SYSMGR_ECC_OCRAM_DERR_MSB 4
7269 #define ALT_SYSMGR_ECC_OCRAM_DERR_WIDTH 1
7271 #define ALT_SYSMGR_ECC_OCRAM_DERR_SET_MSK 0x00000010
7273 #define ALT_SYSMGR_ECC_OCRAM_DERR_CLR_MSK 0xffffffef
7275 #define ALT_SYSMGR_ECC_OCRAM_DERR_RESET 0x0
7277 #define ALT_SYSMGR_ECC_OCRAM_DERR_GET(value) (((value) & 0x00000010) >> 4)
7279 #define ALT_SYSMGR_ECC_OCRAM_DERR_SET(value) (((value) << 4) & 0x00000010)
7281 #ifndef __ASSEMBLY__
7292 struct ALT_SYSMGR_ECC_OCRAM_s
7303 typedef volatile struct ALT_SYSMGR_ECC_OCRAM_s ALT_SYSMGR_ECC_OCRAM_t;
7307 #define ALT_SYSMGR_ECC_OCRAM_OFST 0x4
7339 #define ALT_SYSMGR_ECC_USB0_EN_LSB 0
7341 #define ALT_SYSMGR_ECC_USB0_EN_MSB 0
7343 #define ALT_SYSMGR_ECC_USB0_EN_WIDTH 1
7345 #define ALT_SYSMGR_ECC_USB0_EN_SET_MSK 0x00000001
7347 #define ALT_SYSMGR_ECC_USB0_EN_CLR_MSK 0xfffffffe
7349 #define ALT_SYSMGR_ECC_USB0_EN_RESET 0x0
7351 #define ALT_SYSMGR_ECC_USB0_EN_GET(value) (((value) & 0x00000001) >> 0)
7353 #define ALT_SYSMGR_ECC_USB0_EN_SET(value) (((value) << 0) & 0x00000001)
7365 #define ALT_SYSMGR_ECC_USB0_INJS_LSB 1
7367 #define ALT_SYSMGR_ECC_USB0_INJS_MSB 1
7369 #define ALT_SYSMGR_ECC_USB0_INJS_WIDTH 1
7371 #define ALT_SYSMGR_ECC_USB0_INJS_SET_MSK 0x00000002
7373 #define ALT_SYSMGR_ECC_USB0_INJS_CLR_MSK 0xfffffffd
7375 #define ALT_SYSMGR_ECC_USB0_INJS_RESET 0x0
7377 #define ALT_SYSMGR_ECC_USB0_INJS_GET(value) (((value) & 0x00000002) >> 1)
7379 #define ALT_SYSMGR_ECC_USB0_INJS_SET(value) (((value) << 1) & 0x00000002)
7391 #define ALT_SYSMGR_ECC_USB0_INJD_LSB 2
7393 #define ALT_SYSMGR_ECC_USB0_INJD_MSB 2
7395 #define ALT_SYSMGR_ECC_USB0_INJD_WIDTH 1
7397 #define ALT_SYSMGR_ECC_USB0_INJD_SET_MSK 0x00000004
7399 #define ALT_SYSMGR_ECC_USB0_INJD_CLR_MSK 0xfffffffb
7401 #define ALT_SYSMGR_ECC_USB0_INJD_RESET 0x0
7403 #define ALT_SYSMGR_ECC_USB0_INJD_GET(value) (((value) & 0x00000004) >> 2)
7405 #define ALT_SYSMGR_ECC_USB0_INJD_SET(value) (((value) << 2) & 0x00000004)
7418 #define ALT_SYSMGR_ECC_USB0_SERR_LSB 3
7420 #define ALT_SYSMGR_ECC_USB0_SERR_MSB 3
7422 #define ALT_SYSMGR_ECC_USB0_SERR_WIDTH 1
7424 #define ALT_SYSMGR_ECC_USB0_SERR_SET_MSK 0x00000008
7426 #define ALT_SYSMGR_ECC_USB0_SERR_CLR_MSK 0xfffffff7
7428 #define ALT_SYSMGR_ECC_USB0_SERR_RESET 0x0
7430 #define ALT_SYSMGR_ECC_USB0_SERR_GET(value) (((value) & 0x00000008) >> 3)
7432 #define ALT_SYSMGR_ECC_USB0_SERR_SET(value) (((value) << 3) & 0x00000008)
7445 #define ALT_SYSMGR_ECC_USB0_DERR_LSB 4
7447 #define ALT_SYSMGR_ECC_USB0_DERR_MSB 4
7449 #define ALT_SYSMGR_ECC_USB0_DERR_WIDTH 1
7451 #define ALT_SYSMGR_ECC_USB0_DERR_SET_MSK 0x00000010
7453 #define ALT_SYSMGR_ECC_USB0_DERR_CLR_MSK 0xffffffef
7455 #define ALT_SYSMGR_ECC_USB0_DERR_RESET 0x0
7457 #define ALT_SYSMGR_ECC_USB0_DERR_GET(value) (((value) & 0x00000010) >> 4)
7459 #define ALT_SYSMGR_ECC_USB0_DERR_SET(value) (((value) << 4) & 0x00000010)
7461 #ifndef __ASSEMBLY__
7472 struct ALT_SYSMGR_ECC_USB0_s
7483 typedef volatile struct ALT_SYSMGR_ECC_USB0_s ALT_SYSMGR_ECC_USB0_t;
7487 #define ALT_SYSMGR_ECC_USB0_OFST 0x8
7519 #define ALT_SYSMGR_ECC_USB1_EN_LSB 0
7521 #define ALT_SYSMGR_ECC_USB1_EN_MSB 0
7523 #define ALT_SYSMGR_ECC_USB1_EN_WIDTH 1
7525 #define ALT_SYSMGR_ECC_USB1_EN_SET_MSK 0x00000001
7527 #define ALT_SYSMGR_ECC_USB1_EN_CLR_MSK 0xfffffffe
7529 #define ALT_SYSMGR_ECC_USB1_EN_RESET 0x0
7531 #define ALT_SYSMGR_ECC_USB1_EN_GET(value) (((value) & 0x00000001) >> 0)
7533 #define ALT_SYSMGR_ECC_USB1_EN_SET(value) (((value) << 0) & 0x00000001)
7545 #define ALT_SYSMGR_ECC_USB1_INJS_LSB 1
7547 #define ALT_SYSMGR_ECC_USB1_INJS_MSB 1
7549 #define ALT_SYSMGR_ECC_USB1_INJS_WIDTH 1
7551 #define ALT_SYSMGR_ECC_USB1_INJS_SET_MSK 0x00000002
7553 #define ALT_SYSMGR_ECC_USB1_INJS_CLR_MSK 0xfffffffd
7555 #define ALT_SYSMGR_ECC_USB1_INJS_RESET 0x0
7557 #define ALT_SYSMGR_ECC_USB1_INJS_GET(value) (((value) & 0x00000002) >> 1)
7559 #define ALT_SYSMGR_ECC_USB1_INJS_SET(value) (((value) << 1) & 0x00000002)
7571 #define ALT_SYSMGR_ECC_USB1_INJD_LSB 2
7573 #define ALT_SYSMGR_ECC_USB1_INJD_MSB 2
7575 #define ALT_SYSMGR_ECC_USB1_INJD_WIDTH 1
7577 #define ALT_SYSMGR_ECC_USB1_INJD_SET_MSK 0x00000004
7579 #define ALT_SYSMGR_ECC_USB1_INJD_CLR_MSK 0xfffffffb
7581 #define ALT_SYSMGR_ECC_USB1_INJD_RESET 0x0
7583 #define ALT_SYSMGR_ECC_USB1_INJD_GET(value) (((value) & 0x00000004) >> 2)
7585 #define ALT_SYSMGR_ECC_USB1_INJD_SET(value) (((value) << 2) & 0x00000004)
7598 #define ALT_SYSMGR_ECC_USB1_SERR_LSB 3
7600 #define ALT_SYSMGR_ECC_USB1_SERR_MSB 3
7602 #define ALT_SYSMGR_ECC_USB1_SERR_WIDTH 1
7604 #define ALT_SYSMGR_ECC_USB1_SERR_SET_MSK 0x00000008
7606 #define ALT_SYSMGR_ECC_USB1_SERR_CLR_MSK 0xfffffff7
7608 #define ALT_SYSMGR_ECC_USB1_SERR_RESET 0x0
7610 #define ALT_SYSMGR_ECC_USB1_SERR_GET(value) (((value) & 0x00000008) >> 3)
7612 #define ALT_SYSMGR_ECC_USB1_SERR_SET(value) (((value) << 3) & 0x00000008)
7625 #define ALT_SYSMGR_ECC_USB1_DERR_LSB 4
7627 #define ALT_SYSMGR_ECC_USB1_DERR_MSB 4
7629 #define ALT_SYSMGR_ECC_USB1_DERR_WIDTH 1
7631 #define ALT_SYSMGR_ECC_USB1_DERR_SET_MSK 0x00000010
7633 #define ALT_SYSMGR_ECC_USB1_DERR_CLR_MSK 0xffffffef
7635 #define ALT_SYSMGR_ECC_USB1_DERR_RESET 0x0
7637 #define ALT_SYSMGR_ECC_USB1_DERR_GET(value) (((value) & 0x00000010) >> 4)
7639 #define ALT_SYSMGR_ECC_USB1_DERR_SET(value) (((value) << 4) & 0x00000010)
7641 #ifndef __ASSEMBLY__
7652 struct ALT_SYSMGR_ECC_USB1_s
7663 typedef volatile struct ALT_SYSMGR_ECC_USB1_s ALT_SYSMGR_ECC_USB1_t;
7667 #define ALT_SYSMGR_ECC_USB1_OFST 0xc
7703 #define ALT_SYSMGR_ECC_EMAC0_EN_LSB 0
7705 #define ALT_SYSMGR_ECC_EMAC0_EN_MSB 0
7707 #define ALT_SYSMGR_ECC_EMAC0_EN_WIDTH 1
7709 #define ALT_SYSMGR_ECC_EMAC0_EN_SET_MSK 0x00000001
7711 #define ALT_SYSMGR_ECC_EMAC0_EN_CLR_MSK 0xfffffffe
7713 #define ALT_SYSMGR_ECC_EMAC0_EN_RESET 0x0
7715 #define ALT_SYSMGR_ECC_EMAC0_EN_GET(value) (((value) & 0x00000001) >> 0)
7717 #define ALT_SYSMGR_ECC_EMAC0_EN_SET(value) (((value) << 0) & 0x00000001)
7729 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_LSB 1
7731 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_MSB 1
7733 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_WIDTH 1
7735 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_SET_MSK 0x00000002
7737 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_CLR_MSK 0xfffffffd
7739 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_RESET 0x0
7741 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_GET(value) (((value) & 0x00000002) >> 1)
7743 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_SET(value) (((value) << 1) & 0x00000002)
7756 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_LSB 2
7758 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_MSB 2
7760 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_WIDTH 1
7762 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_SET_MSK 0x00000004
7764 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_CLR_MSK 0xfffffffb
7766 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_RESET 0x0
7768 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_GET(value) (((value) & 0x00000004) >> 2)
7770 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_SET(value) (((value) << 2) & 0x00000004)
7782 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_LSB 3
7784 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_MSB 3
7786 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_WIDTH 1
7788 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_SET_MSK 0x00000008
7790 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_CLR_MSK 0xfffffff7
7792 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_RESET 0x0
7794 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_GET(value) (((value) & 0x00000008) >> 3)
7796 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_SET(value) (((value) << 3) & 0x00000008)
7809 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_LSB 4
7811 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_MSB 4
7813 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_WIDTH 1
7815 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_SET_MSK 0x00000010
7817 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_CLR_MSK 0xffffffef
7819 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_RESET 0x0
7821 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_GET(value) (((value) & 0x00000010) >> 4)
7823 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_SET(value) (((value) << 4) & 0x00000010)
7837 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_LSB 5
7839 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_MSB 5
7841 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_WIDTH 1
7843 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_SET_MSK 0x00000020
7845 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_CLR_MSK 0xffffffdf
7847 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_RESET 0x0
7849 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_GET(value) (((value) & 0x00000020) >> 5)
7851 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_SET(value) (((value) << 5) & 0x00000020)
7865 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_LSB 6
7867 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_MSB 6
7869 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_WIDTH 1
7871 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_SET_MSK 0x00000040
7873 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_CLR_MSK 0xffffffbf
7875 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_RESET 0x0
7877 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_GET(value) (((value) & 0x00000040) >> 6)
7879 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_SET(value) (((value) << 6) & 0x00000040)
7893 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_LSB 7
7895 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_MSB 7
7897 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_WIDTH 1
7899 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_SET_MSK 0x00000080
7901 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_CLR_MSK 0xffffff7f
7903 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_RESET 0x0
7905 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_GET(value) (((value) & 0x00000080) >> 7)
7907 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_SET(value) (((value) << 7) & 0x00000080)
7921 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_LSB 8
7923 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_MSB 8
7925 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_WIDTH 1
7927 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_SET_MSK 0x00000100
7929 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_CLR_MSK 0xfffffeff
7931 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_RESET 0x0
7933 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_GET(value) (((value) & 0x00000100) >> 8)
7935 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_SET(value) (((value) << 8) & 0x00000100)
7937 #ifndef __ASSEMBLY__
7948 struct ALT_SYSMGR_ECC_EMAC0_s
7951 uint32_t txfifoinjs : 1;
7952 uint32_t txfifoinjd : 1;
7953 uint32_t rxfifoinjs : 1;
7954 uint32_t rxfifoinjd : 1;
7955 uint32_t txfifoserr : 1;
7956 uint32_t txfifoderr : 1;
7957 uint32_t rxfifoserr : 1;
7958 uint32_t rxfifoderr : 1;
7963 typedef volatile struct ALT_SYSMGR_ECC_EMAC0_s ALT_SYSMGR_ECC_EMAC0_t;
7967 #define ALT_SYSMGR_ECC_EMAC0_OFST 0x10
8003 #define ALT_SYSMGR_ECC_EMAC1_EN_LSB 0
8005 #define ALT_SYSMGR_ECC_EMAC1_EN_MSB 0
8007 #define ALT_SYSMGR_ECC_EMAC1_EN_WIDTH 1
8009 #define ALT_SYSMGR_ECC_EMAC1_EN_SET_MSK 0x00000001
8011 #define ALT_SYSMGR_ECC_EMAC1_EN_CLR_MSK 0xfffffffe
8013 #define ALT_SYSMGR_ECC_EMAC1_EN_RESET 0x0
8015 #define ALT_SYSMGR_ECC_EMAC1_EN_GET(value) (((value) & 0x00000001) >> 0)
8017 #define ALT_SYSMGR_ECC_EMAC1_EN_SET(value) (((value) << 0) & 0x00000001)
8029 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_LSB 1
8031 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_MSB 1
8033 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_WIDTH 1
8035 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_SET_MSK 0x00000002
8037 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_CLR_MSK 0xfffffffd
8039 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_RESET 0x0
8041 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_GET(value) (((value) & 0x00000002) >> 1)
8043 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_SET(value) (((value) << 1) & 0x00000002)
8056 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_LSB 2
8058 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_MSB 2
8060 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_WIDTH 1
8062 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_SET_MSK 0x00000004
8064 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_CLR_MSK 0xfffffffb
8066 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_RESET 0x0
8068 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_GET(value) (((value) & 0x00000004) >> 2)
8070 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_SET(value) (((value) << 2) & 0x00000004)
8082 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_LSB 3
8084 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_MSB 3
8086 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_WIDTH 1
8088 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_SET_MSK 0x00000008
8090 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_CLR_MSK 0xfffffff7
8092 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_RESET 0x0
8094 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_GET(value) (((value) & 0x00000008) >> 3)
8096 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_SET(value) (((value) << 3) & 0x00000008)
8109 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_LSB 4
8111 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_MSB 4
8113 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_WIDTH 1
8115 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_SET_MSK 0x00000010
8117 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_CLR_MSK 0xffffffef
8119 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_RESET 0x0
8121 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_GET(value) (((value) & 0x00000010) >> 4)
8123 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_SET(value) (((value) << 4) & 0x00000010)
8137 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_LSB 5
8139 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_MSB 5
8141 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_WIDTH 1
8143 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_SET_MSK 0x00000020
8145 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_CLR_MSK 0xffffffdf
8147 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_RESET 0x0
8149 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_GET(value) (((value) & 0x00000020) >> 5)
8151 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_SET(value) (((value) << 5) & 0x00000020)
8165 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_LSB 6
8167 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_MSB 6
8169 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_WIDTH 1
8171 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_SET_MSK 0x00000040
8173 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_CLR_MSK 0xffffffbf
8175 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_RESET 0x0
8177 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_GET(value) (((value) & 0x00000040) >> 6)
8179 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_SET(value) (((value) << 6) & 0x00000040)
8193 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_LSB 7
8195 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_MSB 7
8197 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_WIDTH 1
8199 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_SET_MSK 0x00000080
8201 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_CLR_MSK 0xffffff7f
8203 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_RESET 0x0
8205 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_GET(value) (((value) & 0x00000080) >> 7)
8207 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_SET(value) (((value) << 7) & 0x00000080)
8221 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_LSB 8
8223 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_MSB 8
8225 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_WIDTH 1
8227 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_SET_MSK 0x00000100
8229 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_CLR_MSK 0xfffffeff
8231 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_RESET 0x0
8233 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_GET(value) (((value) & 0x00000100) >> 8)
8235 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_SET(value) (((value) << 8) & 0x00000100)
8237 #ifndef __ASSEMBLY__
8248 struct ALT_SYSMGR_ECC_EMAC1_s
8251 uint32_t txfifoinjs : 1;
8252 uint32_t txfifoinjd : 1;
8253 uint32_t rxfifoinjs : 1;
8254 uint32_t rxfifoinjd : 1;
8255 uint32_t txfifoserr : 1;
8256 uint32_t txfifoderr : 1;
8257 uint32_t rxfifoserr : 1;
8258 uint32_t rxfifoderr : 1;
8263 typedef volatile struct ALT_SYSMGR_ECC_EMAC1_s ALT_SYSMGR_ECC_EMAC1_t;
8267 #define ALT_SYSMGR_ECC_EMAC1_OFST 0x14
8299 #define ALT_SYSMGR_ECC_DMA_EN_LSB 0
8301 #define ALT_SYSMGR_ECC_DMA_EN_MSB 0
8303 #define ALT_SYSMGR_ECC_DMA_EN_WIDTH 1
8305 #define ALT_SYSMGR_ECC_DMA_EN_SET_MSK 0x00000001
8307 #define ALT_SYSMGR_ECC_DMA_EN_CLR_MSK 0xfffffffe
8309 #define ALT_SYSMGR_ECC_DMA_EN_RESET 0x0
8311 #define ALT_SYSMGR_ECC_DMA_EN_GET(value) (((value) & 0x00000001) >> 0)
8313 #define ALT_SYSMGR_ECC_DMA_EN_SET(value) (((value) << 0) & 0x00000001)
8325 #define ALT_SYSMGR_ECC_DMA_INJS_LSB 1
8327 #define ALT_SYSMGR_ECC_DMA_INJS_MSB 1
8329 #define ALT_SYSMGR_ECC_DMA_INJS_WIDTH 1
8331 #define ALT_SYSMGR_ECC_DMA_INJS_SET_MSK 0x00000002
8333 #define ALT_SYSMGR_ECC_DMA_INJS_CLR_MSK 0xfffffffd
8335 #define ALT_SYSMGR_ECC_DMA_INJS_RESET 0x0
8337 #define ALT_SYSMGR_ECC_DMA_INJS_GET(value) (((value) & 0x00000002) >> 1)
8339 #define ALT_SYSMGR_ECC_DMA_INJS_SET(value) (((value) << 1) & 0x00000002)
8351 #define ALT_SYSMGR_ECC_DMA_INJD_LSB 2
8353 #define ALT_SYSMGR_ECC_DMA_INJD_MSB 2
8355 #define ALT_SYSMGR_ECC_DMA_INJD_WIDTH 1
8357 #define ALT_SYSMGR_ECC_DMA_INJD_SET_MSK 0x00000004
8359 #define ALT_SYSMGR_ECC_DMA_INJD_CLR_MSK 0xfffffffb
8361 #define ALT_SYSMGR_ECC_DMA_INJD_RESET 0x0
8363 #define ALT_SYSMGR_ECC_DMA_INJD_GET(value) (((value) & 0x00000004) >> 2)
8365 #define ALT_SYSMGR_ECC_DMA_INJD_SET(value) (((value) << 2) & 0x00000004)
8378 #define ALT_SYSMGR_ECC_DMA_SERR_LSB 3
8380 #define ALT_SYSMGR_ECC_DMA_SERR_MSB 3
8382 #define ALT_SYSMGR_ECC_DMA_SERR_WIDTH 1
8384 #define ALT_SYSMGR_ECC_DMA_SERR_SET_MSK 0x00000008
8386 #define ALT_SYSMGR_ECC_DMA_SERR_CLR_MSK 0xfffffff7
8388 #define ALT_SYSMGR_ECC_DMA_SERR_RESET 0x0
8390 #define ALT_SYSMGR_ECC_DMA_SERR_GET(value) (((value) & 0x00000008) >> 3)
8392 #define ALT_SYSMGR_ECC_DMA_SERR_SET(value) (((value) << 3) & 0x00000008)
8405 #define ALT_SYSMGR_ECC_DMA_DERR_LSB 4
8407 #define ALT_SYSMGR_ECC_DMA_DERR_MSB 4
8409 #define ALT_SYSMGR_ECC_DMA_DERR_WIDTH 1
8411 #define ALT_SYSMGR_ECC_DMA_DERR_SET_MSK 0x00000010
8413 #define ALT_SYSMGR_ECC_DMA_DERR_CLR_MSK 0xffffffef
8415 #define ALT_SYSMGR_ECC_DMA_DERR_RESET 0x0
8417 #define ALT_SYSMGR_ECC_DMA_DERR_GET(value) (((value) & 0x00000010) >> 4)
8419 #define ALT_SYSMGR_ECC_DMA_DERR_SET(value) (((value) << 4) & 0x00000010)
8421 #ifndef __ASSEMBLY__
8432 struct ALT_SYSMGR_ECC_DMA_s
8443 typedef volatile struct ALT_SYSMGR_ECC_DMA_s ALT_SYSMGR_ECC_DMA_t;
8447 #define ALT_SYSMGR_ECC_DMA_OFST 0x18
8479 #define ALT_SYSMGR_ECC_CAN0_EN_LSB 0
8481 #define ALT_SYSMGR_ECC_CAN0_EN_MSB 0
8483 #define ALT_SYSMGR_ECC_CAN0_EN_WIDTH 1
8485 #define ALT_SYSMGR_ECC_CAN0_EN_SET_MSK 0x00000001
8487 #define ALT_SYSMGR_ECC_CAN0_EN_CLR_MSK 0xfffffffe
8489 #define ALT_SYSMGR_ECC_CAN0_EN_RESET 0x0
8491 #define ALT_SYSMGR_ECC_CAN0_EN_GET(value) (((value) & 0x00000001) >> 0)
8493 #define ALT_SYSMGR_ECC_CAN0_EN_SET(value) (((value) << 0) & 0x00000001)
8505 #define ALT_SYSMGR_ECC_CAN0_INJS_LSB 1
8507 #define ALT_SYSMGR_ECC_CAN0_INJS_MSB 1
8509 #define ALT_SYSMGR_ECC_CAN0_INJS_WIDTH 1
8511 #define ALT_SYSMGR_ECC_CAN0_INJS_SET_MSK 0x00000002
8513 #define ALT_SYSMGR_ECC_CAN0_INJS_CLR_MSK 0xfffffffd
8515 #define ALT_SYSMGR_ECC_CAN0_INJS_RESET 0x0
8517 #define ALT_SYSMGR_ECC_CAN0_INJS_GET(value) (((value) & 0x00000002) >> 1)
8519 #define ALT_SYSMGR_ECC_CAN0_INJS_SET(value) (((value) << 1) & 0x00000002)
8531 #define ALT_SYSMGR_ECC_CAN0_INJD_LSB 2
8533 #define ALT_SYSMGR_ECC_CAN0_INJD_MSB 2
8535 #define ALT_SYSMGR_ECC_CAN0_INJD_WIDTH 1
8537 #define ALT_SYSMGR_ECC_CAN0_INJD_SET_MSK 0x00000004
8539 #define ALT_SYSMGR_ECC_CAN0_INJD_CLR_MSK 0xfffffffb
8541 #define ALT_SYSMGR_ECC_CAN0_INJD_RESET 0x0
8543 #define ALT_SYSMGR_ECC_CAN0_INJD_GET(value) (((value) & 0x00000004) >> 2)
8545 #define ALT_SYSMGR_ECC_CAN0_INJD_SET(value) (((value) << 2) & 0x00000004)
8558 #define ALT_SYSMGR_ECC_CAN0_SERR_LSB 3
8560 #define ALT_SYSMGR_ECC_CAN0_SERR_MSB 3
8562 #define ALT_SYSMGR_ECC_CAN0_SERR_WIDTH 1
8564 #define ALT_SYSMGR_ECC_CAN0_SERR_SET_MSK 0x00000008
8566 #define ALT_SYSMGR_ECC_CAN0_SERR_CLR_MSK 0xfffffff7
8568 #define ALT_SYSMGR_ECC_CAN0_SERR_RESET 0x0
8570 #define ALT_SYSMGR_ECC_CAN0_SERR_GET(value) (((value) & 0x00000008) >> 3)
8572 #define ALT_SYSMGR_ECC_CAN0_SERR_SET(value) (((value) << 3) & 0x00000008)
8585 #define ALT_SYSMGR_ECC_CAN0_DERR_LSB 4
8587 #define ALT_SYSMGR_ECC_CAN0_DERR_MSB 4
8589 #define ALT_SYSMGR_ECC_CAN0_DERR_WIDTH 1
8591 #define ALT_SYSMGR_ECC_CAN0_DERR_SET_MSK 0x00000010
8593 #define ALT_SYSMGR_ECC_CAN0_DERR_CLR_MSK 0xffffffef
8595 #define ALT_SYSMGR_ECC_CAN0_DERR_RESET 0x0
8597 #define ALT_SYSMGR_ECC_CAN0_DERR_GET(value) (((value) & 0x00000010) >> 4)
8599 #define ALT_SYSMGR_ECC_CAN0_DERR_SET(value) (((value) << 4) & 0x00000010)
8601 #ifndef __ASSEMBLY__
8612 struct ALT_SYSMGR_ECC_CAN0_s
8623 typedef volatile struct ALT_SYSMGR_ECC_CAN0_s ALT_SYSMGR_ECC_CAN0_t;
8627 #define ALT_SYSMGR_ECC_CAN0_OFST 0x1c
8659 #define ALT_SYSMGR_ECC_CAN1_EN_LSB 0
8661 #define ALT_SYSMGR_ECC_CAN1_EN_MSB 0
8663 #define ALT_SYSMGR_ECC_CAN1_EN_WIDTH 1
8665 #define ALT_SYSMGR_ECC_CAN1_EN_SET_MSK 0x00000001
8667 #define ALT_SYSMGR_ECC_CAN1_EN_CLR_MSK 0xfffffffe
8669 #define ALT_SYSMGR_ECC_CAN1_EN_RESET 0x0
8671 #define ALT_SYSMGR_ECC_CAN1_EN_GET(value) (((value) & 0x00000001) >> 0)
8673 #define ALT_SYSMGR_ECC_CAN1_EN_SET(value) (((value) << 0) & 0x00000001)
8685 #define ALT_SYSMGR_ECC_CAN1_INJS_LSB 1
8687 #define ALT_SYSMGR_ECC_CAN1_INJS_MSB 1
8689 #define ALT_SYSMGR_ECC_CAN1_INJS_WIDTH 1
8691 #define ALT_SYSMGR_ECC_CAN1_INJS_SET_MSK 0x00000002
8693 #define ALT_SYSMGR_ECC_CAN1_INJS_CLR_MSK 0xfffffffd
8695 #define ALT_SYSMGR_ECC_CAN1_INJS_RESET 0x0
8697 #define ALT_SYSMGR_ECC_CAN1_INJS_GET(value) (((value) & 0x00000002) >> 1)
8699 #define ALT_SYSMGR_ECC_CAN1_INJS_SET(value) (((value) << 1) & 0x00000002)
8711 #define ALT_SYSMGR_ECC_CAN1_INJD_LSB 2
8713 #define ALT_SYSMGR_ECC_CAN1_INJD_MSB 2
8715 #define ALT_SYSMGR_ECC_CAN1_INJD_WIDTH 1
8717 #define ALT_SYSMGR_ECC_CAN1_INJD_SET_MSK 0x00000004
8719 #define ALT_SYSMGR_ECC_CAN1_INJD_CLR_MSK 0xfffffffb
8721 #define ALT_SYSMGR_ECC_CAN1_INJD_RESET 0x0
8723 #define ALT_SYSMGR_ECC_CAN1_INJD_GET(value) (((value) & 0x00000004) >> 2)
8725 #define ALT_SYSMGR_ECC_CAN1_INJD_SET(value) (((value) << 2) & 0x00000004)
8738 #define ALT_SYSMGR_ECC_CAN1_SERR_LSB 3
8740 #define ALT_SYSMGR_ECC_CAN1_SERR_MSB 3
8742 #define ALT_SYSMGR_ECC_CAN1_SERR_WIDTH 1
8744 #define ALT_SYSMGR_ECC_CAN1_SERR_SET_MSK 0x00000008
8746 #define ALT_SYSMGR_ECC_CAN1_SERR_CLR_MSK 0xfffffff7
8748 #define ALT_SYSMGR_ECC_CAN1_SERR_RESET 0x0
8750 #define ALT_SYSMGR_ECC_CAN1_SERR_GET(value) (((value) & 0x00000008) >> 3)
8752 #define ALT_SYSMGR_ECC_CAN1_SERR_SET(value) (((value) << 3) & 0x00000008)
8765 #define ALT_SYSMGR_ECC_CAN1_DERR_LSB 4
8767 #define ALT_SYSMGR_ECC_CAN1_DERR_MSB 4
8769 #define ALT_SYSMGR_ECC_CAN1_DERR_WIDTH 1
8771 #define ALT_SYSMGR_ECC_CAN1_DERR_SET_MSK 0x00000010
8773 #define ALT_SYSMGR_ECC_CAN1_DERR_CLR_MSK 0xffffffef
8775 #define ALT_SYSMGR_ECC_CAN1_DERR_RESET 0x0
8777 #define ALT_SYSMGR_ECC_CAN1_DERR_GET(value) (((value) & 0x00000010) >> 4)
8779 #define ALT_SYSMGR_ECC_CAN1_DERR_SET(value) (((value) << 4) & 0x00000010)
8781 #ifndef __ASSEMBLY__
8792 struct ALT_SYSMGR_ECC_CAN1_s
8803 typedef volatile struct ALT_SYSMGR_ECC_CAN1_s ALT_SYSMGR_ECC_CAN1_t;
8807 #define ALT_SYSMGR_ECC_CAN1_OFST 0x20
8847 #define ALT_SYSMGR_ECC_NAND_EN_LSB 0
8849 #define ALT_SYSMGR_ECC_NAND_EN_MSB 0
8851 #define ALT_SYSMGR_ECC_NAND_EN_WIDTH 1
8853 #define ALT_SYSMGR_ECC_NAND_EN_SET_MSK 0x00000001
8855 #define ALT_SYSMGR_ECC_NAND_EN_CLR_MSK 0xfffffffe
8857 #define ALT_SYSMGR_ECC_NAND_EN_RESET 0x0
8859 #define ALT_SYSMGR_ECC_NAND_EN_GET(value) (((value) & 0x00000001) >> 0)
8861 #define ALT_SYSMGR_ECC_NAND_EN_SET(value) (((value) << 0) & 0x00000001)
8873 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_LSB 1
8875 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_MSB 1
8877 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_WIDTH 1
8879 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_SET_MSK 0x00000002
8881 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_CLR_MSK 0xfffffffd
8883 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_RESET 0x0
8885 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_GET(value) (((value) & 0x00000002) >> 1)
8887 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_SET(value) (((value) << 1) & 0x00000002)
8900 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_LSB 2
8902 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_MSB 2
8904 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_WIDTH 1
8906 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_SET_MSK 0x00000004
8908 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_CLR_MSK 0xfffffffb
8910 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_RESET 0x0
8912 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_GET(value) (((value) & 0x00000004) >> 2)
8914 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_SET(value) (((value) << 2) & 0x00000004)
8926 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_LSB 3
8928 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_MSB 3
8930 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_WIDTH 1
8932 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_SET_MSK 0x00000008
8934 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_CLR_MSK 0xfffffff7
8936 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_RESET 0x0
8938 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_GET(value) (((value) & 0x00000008) >> 3)
8940 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_SET(value) (((value) << 3) & 0x00000008)
8953 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_LSB 4
8955 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_MSB 4
8957 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_WIDTH 1
8959 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_SET_MSK 0x00000010
8961 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_CLR_MSK 0xffffffef
8963 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_RESET 0x0
8965 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_GET(value) (((value) & 0x00000010) >> 4)
8967 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_SET(value) (((value) << 4) & 0x00000010)
8979 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_LSB 5
8981 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_MSB 5
8983 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_WIDTH 1
8985 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_SET_MSK 0x00000020
8987 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_CLR_MSK 0xffffffdf
8989 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_RESET 0x0
8991 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_GET(value) (((value) & 0x00000020) >> 5)
8993 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_SET(value) (((value) << 5) & 0x00000020)
9006 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_LSB 6
9008 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_MSB 6
9010 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_WIDTH 1
9012 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_SET_MSK 0x00000040
9014 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_CLR_MSK 0xffffffbf
9016 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_RESET 0x0
9018 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_GET(value) (((value) & 0x00000040) >> 6)
9020 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_SET(value) (((value) << 6) & 0x00000040)
9034 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_LSB 7
9036 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_MSB 7
9038 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_WIDTH 1
9040 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_SET_MSK 0x00000080
9042 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_CLR_MSK 0xffffff7f
9044 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_RESET 0x0
9046 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_GET(value) (((value) & 0x00000080) >> 7)
9048 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_SET(value) (((value) << 7) & 0x00000080)
9062 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_LSB 8
9064 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_MSB 8
9066 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_WIDTH 1
9068 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_SET_MSK 0x00000100
9070 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_CLR_MSK 0xfffffeff
9072 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_RESET 0x0
9074 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_GET(value) (((value) & 0x00000100) >> 8)
9076 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_SET(value) (((value) << 8) & 0x00000100)
9090 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_LSB 9
9092 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_MSB 9
9094 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_WIDTH 1
9096 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_SET_MSK 0x00000200
9098 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_CLR_MSK 0xfffffdff
9100 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_RESET 0x0
9102 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_GET(value) (((value) & 0x00000200) >> 9)
9104 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_SET(value) (((value) << 9) & 0x00000200)
9118 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_LSB 10
9120 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_MSB 10
9122 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_WIDTH 1
9124 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_SET_MSK 0x00000400
9126 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_CLR_MSK 0xfffffbff
9128 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_RESET 0x0
9130 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_GET(value) (((value) & 0x00000400) >> 10)
9132 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_SET(value) (((value) << 10) & 0x00000400)
9146 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_LSB 11
9148 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_MSB 11
9150 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_WIDTH 1
9152 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_SET_MSK 0x00000800
9154 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_CLR_MSK 0xfffff7ff
9156 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_RESET 0x0
9158 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_GET(value) (((value) & 0x00000800) >> 11)
9160 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_SET(value) (((value) << 11) & 0x00000800)
9174 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_LSB 12
9176 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_MSB 12
9178 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_WIDTH 1
9180 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_SET_MSK 0x00001000
9182 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_CLR_MSK 0xffffefff
9184 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_RESET 0x0
9186 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_GET(value) (((value) & 0x00001000) >> 12)
9188 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_SET(value) (((value) << 12) & 0x00001000)
9190 #ifndef __ASSEMBLY__
9201 struct ALT_SYSMGR_ECC_NAND_s
9204 uint32_t eccbufinjs : 1;
9205 uint32_t eccbufinjd : 1;
9206 uint32_t wrfifoinjs : 1;
9207 uint32_t wrfifoinjd : 1;
9208 uint32_t rdfifoinjs : 1;
9209 uint32_t rdfifoinjd : 1;
9210 uint32_t eccbufserr : 1;
9211 uint32_t eccbufderr : 1;
9212 uint32_t wrfifoserr : 1;
9213 uint32_t wrfifoderr : 1;
9214 uint32_t rdfifoserr : 1;
9215 uint32_t rdfifoderr : 1;
9220 typedef volatile struct ALT_SYSMGR_ECC_NAND_s ALT_SYSMGR_ECC_NAND_t;
9224 #define ALT_SYSMGR_ECC_NAND_OFST 0x24
9256 #define ALT_SYSMGR_ECC_QSPI_EN_LSB 0
9258 #define ALT_SYSMGR_ECC_QSPI_EN_MSB 0
9260 #define ALT_SYSMGR_ECC_QSPI_EN_WIDTH 1
9262 #define ALT_SYSMGR_ECC_QSPI_EN_SET_MSK 0x00000001
9264 #define ALT_SYSMGR_ECC_QSPI_EN_CLR_MSK 0xfffffffe
9266 #define ALT_SYSMGR_ECC_QSPI_EN_RESET 0x0
9268 #define ALT_SYSMGR_ECC_QSPI_EN_GET(value) (((value) & 0x00000001) >> 0)
9270 #define ALT_SYSMGR_ECC_QSPI_EN_SET(value) (((value) << 0) & 0x00000001)
9282 #define ALT_SYSMGR_ECC_QSPI_INJS_LSB 1
9284 #define ALT_SYSMGR_ECC_QSPI_INJS_MSB 1
9286 #define ALT_SYSMGR_ECC_QSPI_INJS_WIDTH 1
9288 #define ALT_SYSMGR_ECC_QSPI_INJS_SET_MSK 0x00000002
9290 #define ALT_SYSMGR_ECC_QSPI_INJS_CLR_MSK 0xfffffffd
9292 #define ALT_SYSMGR_ECC_QSPI_INJS_RESET 0x0
9294 #define ALT_SYSMGR_ECC_QSPI_INJS_GET(value) (((value) & 0x00000002) >> 1)
9296 #define ALT_SYSMGR_ECC_QSPI_INJS_SET(value) (((value) << 1) & 0x00000002)
9308 #define ALT_SYSMGR_ECC_QSPI_INJD_LSB 2
9310 #define ALT_SYSMGR_ECC_QSPI_INJD_MSB 2
9312 #define ALT_SYSMGR_ECC_QSPI_INJD_WIDTH 1
9314 #define ALT_SYSMGR_ECC_QSPI_INJD_SET_MSK 0x00000004
9316 #define ALT_SYSMGR_ECC_QSPI_INJD_CLR_MSK 0xfffffffb
9318 #define ALT_SYSMGR_ECC_QSPI_INJD_RESET 0x0
9320 #define ALT_SYSMGR_ECC_QSPI_INJD_GET(value) (((value) & 0x00000004) >> 2)
9322 #define ALT_SYSMGR_ECC_QSPI_INJD_SET(value) (((value) << 2) & 0x00000004)
9335 #define ALT_SYSMGR_ECC_QSPI_SERR_LSB 3
9337 #define ALT_SYSMGR_ECC_QSPI_SERR_MSB 3
9339 #define ALT_SYSMGR_ECC_QSPI_SERR_WIDTH 1
9341 #define ALT_SYSMGR_ECC_QSPI_SERR_SET_MSK 0x00000008
9343 #define ALT_SYSMGR_ECC_QSPI_SERR_CLR_MSK 0xfffffff7
9345 #define ALT_SYSMGR_ECC_QSPI_SERR_RESET 0x0
9347 #define ALT_SYSMGR_ECC_QSPI_SERR_GET(value) (((value) & 0x00000008) >> 3)
9349 #define ALT_SYSMGR_ECC_QSPI_SERR_SET(value) (((value) << 3) & 0x00000008)
9362 #define ALT_SYSMGR_ECC_QSPI_DERR_LSB 4
9364 #define ALT_SYSMGR_ECC_QSPI_DERR_MSB 4
9366 #define ALT_SYSMGR_ECC_QSPI_DERR_WIDTH 1
9368 #define ALT_SYSMGR_ECC_QSPI_DERR_SET_MSK 0x00000010
9370 #define ALT_SYSMGR_ECC_QSPI_DERR_CLR_MSK 0xffffffef
9372 #define ALT_SYSMGR_ECC_QSPI_DERR_RESET 0x0
9374 #define ALT_SYSMGR_ECC_QSPI_DERR_GET(value) (((value) & 0x00000010) >> 4)
9376 #define ALT_SYSMGR_ECC_QSPI_DERR_SET(value) (((value) << 4) & 0x00000010)
9378 #ifndef __ASSEMBLY__
9389 struct ALT_SYSMGR_ECC_QSPI_s
9400 typedef volatile struct ALT_SYSMGR_ECC_QSPI_s ALT_SYSMGR_ECC_QSPI_t;
9404 #define ALT_SYSMGR_ECC_QSPI_OFST 0x28
9439 #define ALT_SYSMGR_ECC_SDMMC_EN_LSB 0
9441 #define ALT_SYSMGR_ECC_SDMMC_EN_MSB 0
9443 #define ALT_SYSMGR_ECC_SDMMC_EN_WIDTH 1
9445 #define ALT_SYSMGR_ECC_SDMMC_EN_SET_MSK 0x00000001
9447 #define ALT_SYSMGR_ECC_SDMMC_EN_CLR_MSK 0xfffffffe
9449 #define ALT_SYSMGR_ECC_SDMMC_EN_RESET 0x0
9451 #define ALT_SYSMGR_ECC_SDMMC_EN_GET(value) (((value) & 0x00000001) >> 0)
9453 #define ALT_SYSMGR_ECC_SDMMC_EN_SET(value) (((value) << 0) & 0x00000001)
9465 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_LSB 1
9467 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_MSB 1
9469 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_WIDTH 1
9471 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_SET_MSK 0x00000002
9473 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_CLR_MSK 0xfffffffd
9475 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_RESET 0x0
9477 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_GET(value) (((value) & 0x00000002) >> 1)
9479 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_SET(value) (((value) << 1) & 0x00000002)
9492 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_LSB 2
9494 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_MSB 2
9496 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_WIDTH 1
9498 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_SET_MSK 0x00000004
9500 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_CLR_MSK 0xfffffffb
9502 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_RESET 0x0
9504 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_GET(value) (((value) & 0x00000004) >> 2)
9506 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_SET(value) (((value) << 2) & 0x00000004)
9518 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_LSB 3
9520 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_MSB 3
9522 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_WIDTH 1
9524 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_SET_MSK 0x00000008
9526 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_CLR_MSK 0xfffffff7
9528 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_RESET 0x0
9530 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_GET(value) (((value) & 0x00000008) >> 3)
9532 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_SET(value) (((value) << 3) & 0x00000008)
9545 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_LSB 4
9547 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_MSB 4
9549 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_WIDTH 1
9551 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_SET_MSK 0x00000010
9553 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_CLR_MSK 0xffffffef
9555 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_RESET 0x0
9557 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_GET(value) (((value) & 0x00000010) >> 4)
9559 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_SET(value) (((value) << 4) & 0x00000010)
9572 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_LSB 5
9574 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_MSB 5
9576 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_WIDTH 1
9578 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_SET_MSK 0x00000020
9580 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_CLR_MSK 0xffffffdf
9582 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_RESET 0x0
9584 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_GET(value) (((value) & 0x00000020) >> 5)
9586 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_SET(value) (((value) << 5) & 0x00000020)
9600 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_LSB 6
9602 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_MSB 6
9604 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_WIDTH 1
9606 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_SET_MSK 0x00000040
9608 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_CLR_MSK 0xffffffbf
9610 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_RESET 0x0
9612 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_GET(value) (((value) & 0x00000040) >> 6)
9614 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_SET(value) (((value) << 6) & 0x00000040)
9627 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_LSB 7
9629 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_MSB 7
9631 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_WIDTH 1
9633 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_SET_MSK 0x00000080
9635 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_CLR_MSK 0xffffff7f
9637 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_RESET 0x0
9639 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_GET(value) (((value) & 0x00000080) >> 7)
9641 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_SET(value) (((value) << 7) & 0x00000080)
9655 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_LSB 8
9657 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_MSB 8
9659 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_WIDTH 1
9661 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_SET_MSK 0x00000100
9663 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_CLR_MSK 0xfffffeff
9665 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_RESET 0x0
9667 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_GET(value) (((value) & 0x00000100) >> 8)
9669 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_SET(value) (((value) << 8) & 0x00000100)
9671 #ifndef __ASSEMBLY__
9682 struct ALT_SYSMGR_ECC_SDMMC_s
9685 uint32_t injsporta : 1;
9686 uint32_t injdporta : 1;
9687 uint32_t injsportb : 1;
9688 uint32_t injdportb : 1;
9689 uint32_t serrporta : 1;
9690 uint32_t derrporta : 1;
9691 uint32_t serrportb : 1;
9692 uint32_t derrportb : 1;
9697 typedef volatile struct ALT_SYSMGR_ECC_SDMMC_s ALT_SYSMGR_ECC_SDMMC_t;
9701 #define ALT_SYSMGR_ECC_SDMMC_OFST 0x2c
9703 #ifndef __ASSEMBLY__
9714 struct ALT_SYSMGR_ECC_s
9716 ALT_SYSMGR_ECC_L2_t l2;
9717 ALT_SYSMGR_ECC_OCRAM_t ocram;
9718 ALT_SYSMGR_ECC_USB0_t usb0;
9719 ALT_SYSMGR_ECC_USB1_t usb1;
9720 ALT_SYSMGR_ECC_EMAC0_t emac0;
9721 ALT_SYSMGR_ECC_EMAC1_t emac1;
9722 ALT_SYSMGR_ECC_DMA_t dma;
9723 ALT_SYSMGR_ECC_CAN0_t can0;
9724 ALT_SYSMGR_ECC_CAN1_t can1;
9725 ALT_SYSMGR_ECC_NAND_t nand;
9726 ALT_SYSMGR_ECC_QSPI_t qspi;
9727 ALT_SYSMGR_ECC_SDMMC_t sdmmc;
9728 volatile uint32_t _pad_0x30_0x40[4];
9732 typedef volatile struct ALT_SYSMGR_ECC_s ALT_SYSMGR_ECC_t;
9734 struct ALT_SYSMGR_ECC_raw_s
9736 volatile uint32_t l2;
9737 volatile uint32_t ocram;
9738 volatile uint32_t usb0;
9739 volatile uint32_t usb1;
9740 volatile uint32_t emac0;
9741 volatile uint32_t emac1;
9742 volatile uint32_t dma;
9743 volatile uint32_t can0;
9744 volatile uint32_t can1;
9745 volatile uint32_t nand;
9746 volatile uint32_t qspi;
9747 volatile uint32_t sdmmc;
9748 uint32_t _pad_0x30_0x40[4];
9752 typedef volatile struct ALT_SYSMGR_ECC_raw_s ALT_SYSMGR_ECC_raw_t;
9801 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_LSB 0
9803 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_MSB 1
9805 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_WIDTH 2
9807 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_SET_MSK 0x00000003
9809 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_CLR_MSK 0xfffffffc
9811 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_RESET 0x0
9813 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_GET(value) (((value) & 0x00000003) >> 0)
9815 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_SET(value) (((value) << 0) & 0x00000003)
9817 #ifndef __ASSEMBLY__
9828 struct ALT_SYSMGR_PINMUX_EMACIO0_s
9835 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO0_s ALT_SYSMGR_PINMUX_EMACIO0_t;
9839 #define ALT_SYSMGR_PINMUX_EMACIO0_OFST 0x0
9876 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_LSB 0
9878 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_MSB 1
9880 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_WIDTH 2
9882 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_SET_MSK 0x00000003
9884 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_CLR_MSK 0xfffffffc
9886 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_RESET 0x0
9888 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_GET(value) (((value) & 0x00000003) >> 0)
9890 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_SET(value) (((value) << 0) & 0x00000003)
9892 #ifndef __ASSEMBLY__
9903 struct ALT_SYSMGR_PINMUX_EMACIO1_s
9910 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO1_s ALT_SYSMGR_PINMUX_EMACIO1_t;
9914 #define ALT_SYSMGR_PINMUX_EMACIO1_OFST 0x4
9951 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_LSB 0
9953 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_MSB 1
9955 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_WIDTH 2
9957 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_SET_MSK 0x00000003
9959 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_CLR_MSK 0xfffffffc
9961 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_RESET 0x0
9963 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_GET(value) (((value) & 0x00000003) >> 0)
9965 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_SET(value) (((value) << 0) & 0x00000003)
9967 #ifndef __ASSEMBLY__
9978 struct ALT_SYSMGR_PINMUX_EMACIO2_s
9985 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO2_s ALT_SYSMGR_PINMUX_EMACIO2_t;
9989 #define ALT_SYSMGR_PINMUX_EMACIO2_OFST 0x8
10026 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_LSB 0
10028 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_MSB 1
10030 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_WIDTH 2
10032 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_SET_MSK 0x00000003
10034 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_CLR_MSK 0xfffffffc
10036 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_RESET 0x0
10038 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_GET(value) (((value) & 0x00000003) >> 0)
10040 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_SET(value) (((value) << 0) & 0x00000003)
10042 #ifndef __ASSEMBLY__
10053 struct ALT_SYSMGR_PINMUX_EMACIO3_s
10060 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO3_s ALT_SYSMGR_PINMUX_EMACIO3_t;
10064 #define ALT_SYSMGR_PINMUX_EMACIO3_OFST 0xc
10101 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_LSB 0
10103 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_MSB 1
10105 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_WIDTH 2
10107 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_SET_MSK 0x00000003
10109 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_CLR_MSK 0xfffffffc
10111 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_RESET 0x0
10113 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_GET(value) (((value) & 0x00000003) >> 0)
10115 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_SET(value) (((value) << 0) & 0x00000003)
10117 #ifndef __ASSEMBLY__
10128 struct ALT_SYSMGR_PINMUX_EMACIO4_s
10135 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO4_s ALT_SYSMGR_PINMUX_EMACIO4_t;
10139 #define ALT_SYSMGR_PINMUX_EMACIO4_OFST 0x10
10176 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_LSB 0
10178 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_MSB 1
10180 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_WIDTH 2
10182 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_SET_MSK 0x00000003
10184 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_CLR_MSK 0xfffffffc
10186 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_RESET 0x0
10188 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_GET(value) (((value) & 0x00000003) >> 0)
10190 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_SET(value) (((value) << 0) & 0x00000003)
10192 #ifndef __ASSEMBLY__
10203 struct ALT_SYSMGR_PINMUX_EMACIO5_s
10210 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO5_s ALT_SYSMGR_PINMUX_EMACIO5_t;
10214 #define ALT_SYSMGR_PINMUX_EMACIO5_OFST 0x14
10251 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_LSB 0
10253 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_MSB 1
10255 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_WIDTH 2
10257 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_SET_MSK 0x00000003
10259 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_CLR_MSK 0xfffffffc
10261 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_RESET 0x0
10263 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_GET(value) (((value) & 0x00000003) >> 0)
10265 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_SET(value) (((value) << 0) & 0x00000003)
10267 #ifndef __ASSEMBLY__
10278 struct ALT_SYSMGR_PINMUX_EMACIO6_s
10285 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO6_s ALT_SYSMGR_PINMUX_EMACIO6_t;
10289 #define ALT_SYSMGR_PINMUX_EMACIO6_OFST 0x18
10326 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_LSB 0
10328 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_MSB 1
10330 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_WIDTH 2
10332 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_SET_MSK 0x00000003
10334 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_CLR_MSK 0xfffffffc
10336 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_RESET 0x0
10338 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_GET(value) (((value) & 0x00000003) >> 0)
10340 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_SET(value) (((value) << 0) & 0x00000003)
10342 #ifndef __ASSEMBLY__
10353 struct ALT_SYSMGR_PINMUX_EMACIO7_s
10360 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO7_s ALT_SYSMGR_PINMUX_EMACIO7_t;
10364 #define ALT_SYSMGR_PINMUX_EMACIO7_OFST 0x1c
10401 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_LSB 0
10403 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_MSB 1
10405 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_WIDTH 2
10407 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_SET_MSK 0x00000003
10409 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_CLR_MSK 0xfffffffc
10411 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_RESET 0x0
10413 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_GET(value) (((value) & 0x00000003) >> 0)
10415 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_SET(value) (((value) << 0) & 0x00000003)
10417 #ifndef __ASSEMBLY__
10428 struct ALT_SYSMGR_PINMUX_EMACIO8_s
10435 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO8_s ALT_SYSMGR_PINMUX_EMACIO8_t;
10439 #define ALT_SYSMGR_PINMUX_EMACIO8_OFST 0x20
10476 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_LSB 0
10478 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_MSB 1
10480 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_WIDTH 2
10482 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_SET_MSK 0x00000003
10484 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_CLR_MSK 0xfffffffc
10486 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_RESET 0x0
10488 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_GET(value) (((value) & 0x00000003) >> 0)
10490 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_SET(value) (((value) << 0) & 0x00000003)
10492 #ifndef __ASSEMBLY__
10503 struct ALT_SYSMGR_PINMUX_EMACIO9_s
10510 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO9_s ALT_SYSMGR_PINMUX_EMACIO9_t;
10514 #define ALT_SYSMGR_PINMUX_EMACIO9_OFST 0x24
10551 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_LSB 0
10553 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_MSB 1
10555 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_WIDTH 2
10557 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_SET_MSK 0x00000003
10559 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_CLR_MSK 0xfffffffc
10561 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_RESET 0x0
10563 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_GET(value) (((value) & 0x00000003) >> 0)
10565 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_SET(value) (((value) << 0) & 0x00000003)
10567 #ifndef __ASSEMBLY__
10578 struct ALT_SYSMGR_PINMUX_EMACIO10_s
10585 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO10_s ALT_SYSMGR_PINMUX_EMACIO10_t;
10589 #define ALT_SYSMGR_PINMUX_EMACIO10_OFST 0x28
10626 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_LSB 0
10628 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_MSB 1
10630 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_WIDTH 2
10632 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_SET_MSK 0x00000003
10634 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_CLR_MSK 0xfffffffc
10636 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_RESET 0x0
10638 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_GET(value) (((value) & 0x00000003) >> 0)
10640 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_SET(value) (((value) << 0) & 0x00000003)
10642 #ifndef __ASSEMBLY__
10653 struct ALT_SYSMGR_PINMUX_EMACIO11_s
10660 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO11_s ALT_SYSMGR_PINMUX_EMACIO11_t;
10664 #define ALT_SYSMGR_PINMUX_EMACIO11_OFST 0x2c
10701 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_LSB 0
10703 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_MSB 1
10705 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_WIDTH 2
10707 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_SET_MSK 0x00000003
10709 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_CLR_MSK 0xfffffffc
10711 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_RESET 0x0
10713 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_GET(value) (((value) & 0x00000003) >> 0)
10715 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_SET(value) (((value) << 0) & 0x00000003)
10717 #ifndef __ASSEMBLY__
10728 struct ALT_SYSMGR_PINMUX_EMACIO12_s
10735 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO12_s ALT_SYSMGR_PINMUX_EMACIO12_t;
10739 #define ALT_SYSMGR_PINMUX_EMACIO12_OFST 0x30
10776 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_LSB 0
10778 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_MSB 1
10780 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_WIDTH 2
10782 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_SET_MSK 0x00000003
10784 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_CLR_MSK 0xfffffffc
10786 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_RESET 0x0
10788 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_GET(value) (((value) & 0x00000003) >> 0)
10790 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_SET(value) (((value) << 0) & 0x00000003)
10792 #ifndef __ASSEMBLY__
10803 struct ALT_SYSMGR_PINMUX_EMACIO13_s
10810 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO13_s ALT_SYSMGR_PINMUX_EMACIO13_t;
10814 #define ALT_SYSMGR_PINMUX_EMACIO13_OFST 0x34
10851 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_LSB 0
10853 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_MSB 1
10855 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_WIDTH 2
10857 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_SET_MSK 0x00000003
10859 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_CLR_MSK 0xfffffffc
10861 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_RESET 0x0
10863 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_GET(value) (((value) & 0x00000003) >> 0)
10865 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_SET(value) (((value) << 0) & 0x00000003)
10867 #ifndef __ASSEMBLY__
10878 struct ALT_SYSMGR_PINMUX_EMACIO14_s
10885 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO14_s ALT_SYSMGR_PINMUX_EMACIO14_t;
10889 #define ALT_SYSMGR_PINMUX_EMACIO14_OFST 0x38
10926 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_LSB 0
10928 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_MSB 1
10930 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_WIDTH 2
10932 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_SET_MSK 0x00000003
10934 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_CLR_MSK 0xfffffffc
10936 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_RESET 0x0
10938 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_GET(value) (((value) & 0x00000003) >> 0)
10940 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_SET(value) (((value) << 0) & 0x00000003)
10942 #ifndef __ASSEMBLY__
10953 struct ALT_SYSMGR_PINMUX_EMACIO15_s
10960 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO15_s ALT_SYSMGR_PINMUX_EMACIO15_t;
10964 #define ALT_SYSMGR_PINMUX_EMACIO15_OFST 0x3c
11001 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_LSB 0
11003 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_MSB 1
11005 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_WIDTH 2
11007 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_SET_MSK 0x00000003
11009 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_CLR_MSK 0xfffffffc
11011 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_RESET 0x0
11013 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_GET(value) (((value) & 0x00000003) >> 0)
11015 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_SET(value) (((value) << 0) & 0x00000003)
11017 #ifndef __ASSEMBLY__
11028 struct ALT_SYSMGR_PINMUX_EMACIO16_s
11035 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO16_s ALT_SYSMGR_PINMUX_EMACIO16_t;
11039 #define ALT_SYSMGR_PINMUX_EMACIO16_OFST 0x40
11076 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_LSB 0
11078 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_MSB 1
11080 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_WIDTH 2
11082 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_SET_MSK 0x00000003
11084 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_CLR_MSK 0xfffffffc
11086 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_RESET 0x0
11088 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_GET(value) (((value) & 0x00000003) >> 0)
11090 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_SET(value) (((value) << 0) & 0x00000003)
11092 #ifndef __ASSEMBLY__
11103 struct ALT_SYSMGR_PINMUX_EMACIO17_s
11110 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO17_s ALT_SYSMGR_PINMUX_EMACIO17_t;
11114 #define ALT_SYSMGR_PINMUX_EMACIO17_OFST 0x44
11151 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_LSB 0
11153 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_MSB 1
11155 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_WIDTH 2
11157 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_SET_MSK 0x00000003
11159 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_CLR_MSK 0xfffffffc
11161 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_RESET 0x0
11163 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_GET(value) (((value) & 0x00000003) >> 0)
11165 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_SET(value) (((value) << 0) & 0x00000003)
11167 #ifndef __ASSEMBLY__
11178 struct ALT_SYSMGR_PINMUX_EMACIO18_s
11185 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO18_s ALT_SYSMGR_PINMUX_EMACIO18_t;
11189 #define ALT_SYSMGR_PINMUX_EMACIO18_OFST 0x48
11226 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_LSB 0
11228 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_MSB 1
11230 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_WIDTH 2
11232 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_SET_MSK 0x00000003
11234 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_CLR_MSK 0xfffffffc
11236 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_RESET 0x0
11238 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_GET(value) (((value) & 0x00000003) >> 0)
11240 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_SET(value) (((value) << 0) & 0x00000003)
11242 #ifndef __ASSEMBLY__
11253 struct ALT_SYSMGR_PINMUX_EMACIO19_s
11260 typedef volatile struct ALT_SYSMGR_PINMUX_EMACIO19_s ALT_SYSMGR_PINMUX_EMACIO19_t;
11264 #define ALT_SYSMGR_PINMUX_EMACIO19_OFST 0x4c
11301 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_LSB 0
11303 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_MSB 1
11305 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_WIDTH 2
11307 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_SET_MSK 0x00000003
11309 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_CLR_MSK 0xfffffffc
11311 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_RESET 0x0
11313 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_GET(value) (((value) & 0x00000003) >> 0)
11315 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_SET(value) (((value) << 0) & 0x00000003)
11317 #ifndef __ASSEMBLY__
11328 struct ALT_SYSMGR_PINMUX_FLSHIO0_s
11335 typedef volatile struct ALT_SYSMGR_PINMUX_FLSHIO0_s ALT_SYSMGR_PINMUX_FLSHIO0_t;
11339 #define ALT_SYSMGR_PINMUX_FLSHIO0_OFST 0x50
11376 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_LSB 0
11378 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_MSB 1
11380 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_WIDTH 2
11382 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_SET_MSK 0x00000003
11384 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_CLR_MSK 0xfffffffc
11386 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_RESET 0x0
11388 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_GET(value) (((value) & 0x00000003) >> 0)
11390 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_SET(value) (((value) << 0) & 0x00000003)
11392 #ifndef __ASSEMBLY__
11403 struct ALT_SYSMGR_PINMUX_FLSHIO1_s
11410 typedef volatile struct ALT_SYSMGR_PINMUX_FLSHIO1_s ALT_SYSMGR_PINMUX_FLSHIO1_t;
11414 #define ALT_SYSMGR_PINMUX_FLSHIO1_OFST 0x54
11451 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_LSB 0
11453 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_MSB 1
11455 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_WIDTH 2
11457 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_SET_MSK 0x00000003
11459 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_CLR_MSK 0xfffffffc
11461 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_RESET 0x0
11463 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_GET(value) (((value) & 0x00000003) >> 0)
11465 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_SET(value) (((value) << 0) & 0x00000003)
11467 #ifndef __ASSEMBLY__
11478 struct ALT_SYSMGR_PINMUX_FLSHIO2_s
11485 typedef volatile struct ALT_SYSMGR_PINMUX_FLSHIO2_s ALT_SYSMGR_PINMUX_FLSHIO2_t;
11489 #define ALT_SYSMGR_PINMUX_FLSHIO2_OFST 0x58
11526 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_LSB 0
11528 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_MSB 1
11530 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_WIDTH 2
11532 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_SET_MSK 0x00000003
11534 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_CLR_MSK 0xfffffffc
11536 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_RESET 0x0
11538 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_GET(value) (((value) & 0x00000003) >> 0)
11540 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_SET(value) (((value) << 0) & 0x00000003)
11542 #ifndef __ASSEMBLY__
11553 struct ALT_SYSMGR_PINMUX_FLSHIO3_s
11560 typedef volatile struct ALT_SYSMGR_PINMUX_FLSHIO3_s ALT_SYSMGR_PINMUX_FLSHIO3_t;
11564 #define ALT_SYSMGR_PINMUX_FLSHIO3_OFST 0x5c
11601 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_LSB 0
11603 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_MSB 1
11605 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_WIDTH 2
11607 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_SET_MSK 0x00000003
11609 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_CLR_MSK 0xfffffffc
11611 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_RESET 0x0
11613 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_GET(value) (((value) & 0x00000003) >> 0)
11615 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_SET(value) (((value) << 0) & 0x00000003)
11617 #ifndef __ASSEMBLY__
11628 struct ALT_SYSMGR_PINMUX_FLSHIO4_s
11635 typedef volatile struct ALT_SYSMGR_PINMUX_FLSHIO4_s ALT_SYSMGR_PINMUX_FLSHIO4_t;
11639 #define ALT_SYSMGR_PINMUX_FLSHIO4_OFST 0x60
11676 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_LSB 0
11678 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_MSB 1
11680 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_WIDTH 2
11682 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_SET_MSK 0x00000003
11684 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_CLR_MSK 0xfffffffc
11686 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_RESET 0x0
11688 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_GET(value) (((value) & 0x00000003) >> 0)
11690 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_SET(value) (((value) << 0) & 0x00000003)
11692 #ifndef __ASSEMBLY__
11703 struct ALT_SYSMGR_PINMUX_FLSHIO5_s
11710 typedef volatile struct ALT_SYSMGR_PINMUX_FLSHIO5_s ALT_SYSMGR_PINMUX_FLSHIO5_t;
11714 #define ALT_SYSMGR_PINMUX_FLSHIO5_OFST 0x64
11751 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_LSB 0
11753 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_MSB 1
11755 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_WIDTH 2
11757 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_SET_MSK 0x00000003
11759 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_CLR_MSK 0xfffffffc
11761 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_RESET 0x0
11763 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_GET(value) (((value) & 0x00000003) >> 0)
11765 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_SET(value) (((value) << 0) & 0x00000003)
11767 #ifndef __ASSEMBLY__
11778 struct ALT_SYSMGR_PINMUX_FLSHIO6_s
11785 typedef volatile struct ALT_SYSMGR_PINMUX_FLSHIO6_s ALT_SYSMGR_PINMUX_FLSHIO6_t;
11789 #define ALT_SYSMGR_PINMUX_FLSHIO6_OFST 0x68
11826 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_LSB 0
11828 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_MSB 1
11830 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_WIDTH 2
11832 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_SET_MSK 0x00000003
11834 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_CLR_MSK 0xfffffffc
11836 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_RESET 0x0
11838 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_GET(value) (((value) & 0x00000003) >> 0)
11840 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_SET(value) (((value) << 0) & 0x00000003)
11842 #ifndef __ASSEMBLY__
11853 struct ALT_SYSMGR_PINMUX_FLSHIO7_s
11860 typedef volatile struct ALT_SYSMGR_PINMUX_FLSHIO7_s ALT_SYSMGR_PINMUX_FLSHIO7_t;
11864 #define ALT_SYSMGR_PINMUX_FLSHIO7_OFST 0x6c
11901 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_LSB 0
11903 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_MSB 1
11905 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_WIDTH 2
11907 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_SET_MSK 0x00000003
11909 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_CLR_MSK 0xfffffffc
11911 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_RESET 0x0
11913 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_GET(value) (((value) & 0x00000003) >> 0)
11915 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_SET(value) (((value) << 0) & 0x00000003)
11917 #ifndef __ASSEMBLY__
11928 struct ALT_SYSMGR_PINMUX_FLSHIO8_s
11935 typedef volatile struct ALT_SYSMGR_PINMUX_FLSHIO8_s ALT_SYSMGR_PINMUX_FLSHIO8_t;
11939 #define ALT_SYSMGR_PINMUX_FLSHIO8_OFST 0x70
11976 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_LSB 0
11978 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_MSB 1
11980 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_WIDTH 2
11982 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_SET_MSK 0x00000003
11984 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_CLR_MSK 0xfffffffc
11986 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_RESET 0x0
11988 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_GET(value) (((value) & 0x00000003) >> 0)
11990 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_SET(value) (((value) << 0) & 0x00000003)
11992 #ifndef __ASSEMBLY__
12003 struct ALT_SYSMGR_PINMUX_FLSHIO9_s
12010 typedef volatile struct ALT_SYSMGR_PINMUX_FLSHIO9_s ALT_SYSMGR_PINMUX_FLSHIO9_t;
12014 #define ALT_SYSMGR_PINMUX_FLSHIO9_OFST 0x74
12051 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_LSB 0
12053 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_MSB 1
12055 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_WIDTH 2
12057 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_SET_MSK 0x00000003
12059 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_CLR_MSK 0xfffffffc
12061 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_RESET 0x0
12063 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_GET(value) (((value) & 0x00000003) >> 0)
12065 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_SET(value) (((value) << 0) & 0x00000003)
12067 #ifndef __ASSEMBLY__
12078 struct ALT_SYSMGR_PINMUX_FLSHIO10_s
12085 typedef volatile struct ALT_SYSMGR_PINMUX_FLSHIO10_s ALT_SYSMGR_PINMUX_FLSHIO10_t;
12089 #define ALT_SYSMGR_PINMUX_FLSHIO10_OFST 0x78
12126 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_LSB 0
12128 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_MSB 1
12130 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_WIDTH 2
12132 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_SET_MSK 0x00000003
12134 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_CLR_MSK 0xfffffffc
12136 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_RESET 0x0
12138 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_GET(value) (((value) & 0x00000003) >> 0)
12140 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_SET(value) (((value) << 0) & 0x00000003)
12142 #ifndef __ASSEMBLY__
12153 struct ALT_SYSMGR_PINMUX_FLSHIO11_s
12160 typedef volatile struct ALT_SYSMGR_PINMUX_FLSHIO11_s ALT_SYSMGR_PINMUX_FLSHIO11_t;
12164 #define ALT_SYSMGR_PINMUX_FLSHIO11_OFST 0x7c
12201 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_LSB 0
12203 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_MSB 1
12205 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_WIDTH 2
12207 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_SET_MSK 0x00000003
12209 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_CLR_MSK 0xfffffffc
12211 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_RESET 0x0
12213 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_GET(value) (((value) & 0x00000003) >> 0)
12215 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_SET(value) (((value) << 0) & 0x00000003)
12217 #ifndef __ASSEMBLY__
12228 struct ALT_SYSMGR_PINMUX_GENERALIO0_s
12235 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO0_s ALT_SYSMGR_PINMUX_GENERALIO0_t;
12239 #define ALT_SYSMGR_PINMUX_GENERALIO0_OFST 0x80
12276 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_LSB 0
12278 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_MSB 1
12280 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_WIDTH 2
12282 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_SET_MSK 0x00000003
12284 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_CLR_MSK 0xfffffffc
12286 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_RESET 0x0
12288 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_GET(value) (((value) & 0x00000003) >> 0)
12290 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_SET(value) (((value) << 0) & 0x00000003)
12292 #ifndef __ASSEMBLY__
12303 struct ALT_SYSMGR_PINMUX_GENERALIO1_s
12310 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO1_s ALT_SYSMGR_PINMUX_GENERALIO1_t;
12314 #define ALT_SYSMGR_PINMUX_GENERALIO1_OFST 0x84
12351 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_LSB 0
12353 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_MSB 1
12355 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_WIDTH 2
12357 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_SET_MSK 0x00000003
12359 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_CLR_MSK 0xfffffffc
12361 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_RESET 0x0
12363 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_GET(value) (((value) & 0x00000003) >> 0)
12365 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_SET(value) (((value) << 0) & 0x00000003)
12367 #ifndef __ASSEMBLY__
12378 struct ALT_SYSMGR_PINMUX_GENERALIO2_s
12385 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO2_s ALT_SYSMGR_PINMUX_GENERALIO2_t;
12389 #define ALT_SYSMGR_PINMUX_GENERALIO2_OFST 0x88
12426 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_LSB 0
12428 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_MSB 1
12430 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_WIDTH 2
12432 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_SET_MSK 0x00000003
12434 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_CLR_MSK 0xfffffffc
12436 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_RESET 0x0
12438 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_GET(value) (((value) & 0x00000003) >> 0)
12440 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_SET(value) (((value) << 0) & 0x00000003)
12442 #ifndef __ASSEMBLY__
12453 struct ALT_SYSMGR_PINMUX_GENERALIO3_s
12460 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO3_s ALT_SYSMGR_PINMUX_GENERALIO3_t;
12464 #define ALT_SYSMGR_PINMUX_GENERALIO3_OFST 0x8c
12501 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_LSB 0
12503 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_MSB 1
12505 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_WIDTH 2
12507 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_SET_MSK 0x00000003
12509 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_CLR_MSK 0xfffffffc
12511 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_RESET 0x0
12513 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_GET(value) (((value) & 0x00000003) >> 0)
12515 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_SET(value) (((value) << 0) & 0x00000003)
12517 #ifndef __ASSEMBLY__
12528 struct ALT_SYSMGR_PINMUX_GENERALIO4_s
12535 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO4_s ALT_SYSMGR_PINMUX_GENERALIO4_t;
12539 #define ALT_SYSMGR_PINMUX_GENERALIO4_OFST 0x90
12576 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_LSB 0
12578 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_MSB 1
12580 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_WIDTH 2
12582 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_SET_MSK 0x00000003
12584 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_CLR_MSK 0xfffffffc
12586 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_RESET 0x0
12588 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_GET(value) (((value) & 0x00000003) >> 0)
12590 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_SET(value) (((value) << 0) & 0x00000003)
12592 #ifndef __ASSEMBLY__
12603 struct ALT_SYSMGR_PINMUX_GENERALIO5_s
12610 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO5_s ALT_SYSMGR_PINMUX_GENERALIO5_t;
12614 #define ALT_SYSMGR_PINMUX_GENERALIO5_OFST 0x94
12651 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_LSB 0
12653 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_MSB 1
12655 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_WIDTH 2
12657 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_SET_MSK 0x00000003
12659 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_CLR_MSK 0xfffffffc
12661 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_RESET 0x0
12663 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_GET(value) (((value) & 0x00000003) >> 0)
12665 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_SET(value) (((value) << 0) & 0x00000003)
12667 #ifndef __ASSEMBLY__
12678 struct ALT_SYSMGR_PINMUX_GENERALIO6_s
12685 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO6_s ALT_SYSMGR_PINMUX_GENERALIO6_t;
12689 #define ALT_SYSMGR_PINMUX_GENERALIO6_OFST 0x98
12726 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_LSB 0
12728 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_MSB 1
12730 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_WIDTH 2
12732 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_SET_MSK 0x00000003
12734 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_CLR_MSK 0xfffffffc
12736 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_RESET 0x0
12738 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_GET(value) (((value) & 0x00000003) >> 0)
12740 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_SET(value) (((value) << 0) & 0x00000003)
12742 #ifndef __ASSEMBLY__
12753 struct ALT_SYSMGR_PINMUX_GENERALIO7_s
12760 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO7_s ALT_SYSMGR_PINMUX_GENERALIO7_t;
12764 #define ALT_SYSMGR_PINMUX_GENERALIO7_OFST 0x9c
12801 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_LSB 0
12803 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_MSB 1
12805 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_WIDTH 2
12807 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_SET_MSK 0x00000003
12809 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_CLR_MSK 0xfffffffc
12811 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_RESET 0x0
12813 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_GET(value) (((value) & 0x00000003) >> 0)
12815 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_SET(value) (((value) << 0) & 0x00000003)
12817 #ifndef __ASSEMBLY__
12828 struct ALT_SYSMGR_PINMUX_GENERALIO8_s
12835 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO8_s ALT_SYSMGR_PINMUX_GENERALIO8_t;
12839 #define ALT_SYSMGR_PINMUX_GENERALIO8_OFST 0xa0
12876 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_LSB 0
12878 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_MSB 1
12880 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_WIDTH 2
12882 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_SET_MSK 0x00000003
12884 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_CLR_MSK 0xfffffffc
12886 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_RESET 0x0
12888 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_GET(value) (((value) & 0x00000003) >> 0)
12890 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_SET(value) (((value) << 0) & 0x00000003)
12892 #ifndef __ASSEMBLY__
12903 struct ALT_SYSMGR_PINMUX_GENERALIO9_s
12910 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO9_s ALT_SYSMGR_PINMUX_GENERALIO9_t;
12914 #define ALT_SYSMGR_PINMUX_GENERALIO9_OFST 0xa4
12951 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_LSB 0
12953 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_MSB 1
12955 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_WIDTH 2
12957 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_SET_MSK 0x00000003
12959 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_CLR_MSK 0xfffffffc
12961 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_RESET 0x0
12963 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_GET(value) (((value) & 0x00000003) >> 0)
12965 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_SET(value) (((value) << 0) & 0x00000003)
12967 #ifndef __ASSEMBLY__
12978 struct ALT_SYSMGR_PINMUX_GENERALIO10_s
12985 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO10_s ALT_SYSMGR_PINMUX_GENERALIO10_t;
12989 #define ALT_SYSMGR_PINMUX_GENERALIO10_OFST 0xa8
13026 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_LSB 0
13028 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_MSB 1
13030 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_WIDTH 2
13032 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_SET_MSK 0x00000003
13034 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_CLR_MSK 0xfffffffc
13036 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_RESET 0x0
13038 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_GET(value) (((value) & 0x00000003) >> 0)
13040 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_SET(value) (((value) << 0) & 0x00000003)
13042 #ifndef __ASSEMBLY__
13053 struct ALT_SYSMGR_PINMUX_GENERALIO11_s
13060 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO11_s ALT_SYSMGR_PINMUX_GENERALIO11_t;
13064 #define ALT_SYSMGR_PINMUX_GENERALIO11_OFST 0xac
13101 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_LSB 0
13103 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_MSB 1
13105 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_WIDTH 2
13107 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_SET_MSK 0x00000003
13109 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_CLR_MSK 0xfffffffc
13111 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_RESET 0x0
13113 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_GET(value) (((value) & 0x00000003) >> 0)
13115 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_SET(value) (((value) << 0) & 0x00000003)
13117 #ifndef __ASSEMBLY__
13128 struct ALT_SYSMGR_PINMUX_GENERALIO12_s
13135 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO12_s ALT_SYSMGR_PINMUX_GENERALIO12_t;
13139 #define ALT_SYSMGR_PINMUX_GENERALIO12_OFST 0xb0
13176 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_LSB 0
13178 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_MSB 1
13180 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_WIDTH 2
13182 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_SET_MSK 0x00000003
13184 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_CLR_MSK 0xfffffffc
13186 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_RESET 0x0
13188 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_GET(value) (((value) & 0x00000003) >> 0)
13190 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_SET(value) (((value) << 0) & 0x00000003)
13192 #ifndef __ASSEMBLY__
13203 struct ALT_SYSMGR_PINMUX_GENERALIO13_s
13210 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO13_s ALT_SYSMGR_PINMUX_GENERALIO13_t;
13214 #define ALT_SYSMGR_PINMUX_GENERALIO13_OFST 0xb4
13251 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_LSB 0
13253 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_MSB 1
13255 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_WIDTH 2
13257 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_SET_MSK 0x00000003
13259 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_CLR_MSK 0xfffffffc
13261 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_RESET 0x0
13263 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_GET(value) (((value) & 0x00000003) >> 0)
13265 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_SET(value) (((value) << 0) & 0x00000003)
13267 #ifndef __ASSEMBLY__
13278 struct ALT_SYSMGR_PINMUX_GENERALIO14_s
13285 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO14_s ALT_SYSMGR_PINMUX_GENERALIO14_t;
13289 #define ALT_SYSMGR_PINMUX_GENERALIO14_OFST 0xb8
13326 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_LSB 0
13328 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_MSB 1
13330 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_WIDTH 2
13332 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_SET_MSK 0x00000003
13334 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_CLR_MSK 0xfffffffc
13336 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_RESET 0x0
13338 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_GET(value) (((value) & 0x00000003) >> 0)
13340 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_SET(value) (((value) << 0) & 0x00000003)
13342 #ifndef __ASSEMBLY__
13353 struct ALT_SYSMGR_PINMUX_GENERALIO15_s
13360 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO15_s ALT_SYSMGR_PINMUX_GENERALIO15_t;
13364 #define ALT_SYSMGR_PINMUX_GENERALIO15_OFST 0xbc
13401 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_LSB 0
13403 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_MSB 1
13405 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_WIDTH 2
13407 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_SET_MSK 0x00000003
13409 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_CLR_MSK 0xfffffffc
13411 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_RESET 0x0
13413 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_GET(value) (((value) & 0x00000003) >> 0)
13415 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_SET(value) (((value) << 0) & 0x00000003)
13417 #ifndef __ASSEMBLY__
13428 struct ALT_SYSMGR_PINMUX_GENERALIO16_s
13435 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO16_s ALT_SYSMGR_PINMUX_GENERALIO16_t;
13439 #define ALT_SYSMGR_PINMUX_GENERALIO16_OFST 0xc0
13476 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_LSB 0
13478 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_MSB 1
13480 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_WIDTH 2
13482 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_SET_MSK 0x00000003
13484 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_CLR_MSK 0xfffffffc
13486 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_RESET 0x0
13488 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_GET(value) (((value) & 0x00000003) >> 0)
13490 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_SET(value) (((value) << 0) & 0x00000003)
13492 #ifndef __ASSEMBLY__
13503 struct ALT_SYSMGR_PINMUX_GENERALIO17_s
13510 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO17_s ALT_SYSMGR_PINMUX_GENERALIO17_t;
13514 #define ALT_SYSMGR_PINMUX_GENERALIO17_OFST 0xc4
13551 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_LSB 0
13553 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_MSB 1
13555 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_WIDTH 2
13557 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_SET_MSK 0x00000003
13559 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_CLR_MSK 0xfffffffc
13561 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_RESET 0x0
13563 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_GET(value) (((value) & 0x00000003) >> 0)
13565 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_SET(value) (((value) << 0) & 0x00000003)
13567 #ifndef __ASSEMBLY__
13578 struct ALT_SYSMGR_PINMUX_GENERALIO18_s
13585 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO18_s ALT_SYSMGR_PINMUX_GENERALIO18_t;
13589 #define ALT_SYSMGR_PINMUX_GENERALIO18_OFST 0xc8
13626 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_LSB 0
13628 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_MSB 1
13630 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_WIDTH 2
13632 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_SET_MSK 0x00000003
13634 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_CLR_MSK 0xfffffffc
13636 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_RESET 0x0
13638 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_GET(value) (((value) & 0x00000003) >> 0)
13640 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_SET(value) (((value) << 0) & 0x00000003)
13642 #ifndef __ASSEMBLY__
13653 struct ALT_SYSMGR_PINMUX_GENERALIO19_s
13660 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO19_s ALT_SYSMGR_PINMUX_GENERALIO19_t;
13664 #define ALT_SYSMGR_PINMUX_GENERALIO19_OFST 0xcc
13701 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_LSB 0
13703 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_MSB 1
13705 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_WIDTH 2
13707 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_SET_MSK 0x00000003
13709 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_CLR_MSK 0xfffffffc
13711 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_RESET 0x0
13713 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_GET(value) (((value) & 0x00000003) >> 0)
13715 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_SET(value) (((value) << 0) & 0x00000003)
13717 #ifndef __ASSEMBLY__
13728 struct ALT_SYSMGR_PINMUX_GENERALIO20_s
13735 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO20_s ALT_SYSMGR_PINMUX_GENERALIO20_t;
13739 #define ALT_SYSMGR_PINMUX_GENERALIO20_OFST 0xd0
13776 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_LSB 0
13778 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_MSB 1
13780 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_WIDTH 2
13782 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_SET_MSK 0x00000003
13784 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_CLR_MSK 0xfffffffc
13786 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_RESET 0x0
13788 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_GET(value) (((value) & 0x00000003) >> 0)
13790 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_SET(value) (((value) << 0) & 0x00000003)
13792 #ifndef __ASSEMBLY__
13803 struct ALT_SYSMGR_PINMUX_GENERALIO21_s
13810 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO21_s ALT_SYSMGR_PINMUX_GENERALIO21_t;
13814 #define ALT_SYSMGR_PINMUX_GENERALIO21_OFST 0xd4
13851 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_LSB 0
13853 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_MSB 1
13855 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_WIDTH 2
13857 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_SET_MSK 0x00000003
13859 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_CLR_MSK 0xfffffffc
13861 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_RESET 0x0
13863 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_GET(value) (((value) & 0x00000003) >> 0)
13865 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_SET(value) (((value) << 0) & 0x00000003)
13867 #ifndef __ASSEMBLY__
13878 struct ALT_SYSMGR_PINMUX_GENERALIO22_s
13885 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO22_s ALT_SYSMGR_PINMUX_GENERALIO22_t;
13889 #define ALT_SYSMGR_PINMUX_GENERALIO22_OFST 0xd8
13926 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_LSB 0
13928 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_MSB 1
13930 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_WIDTH 2
13932 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_SET_MSK 0x00000003
13934 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_CLR_MSK 0xfffffffc
13936 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_RESET 0x0
13938 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_GET(value) (((value) & 0x00000003) >> 0)
13940 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_SET(value) (((value) << 0) & 0x00000003)
13942 #ifndef __ASSEMBLY__
13953 struct ALT_SYSMGR_PINMUX_GENERALIO23_s
13960 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO23_s ALT_SYSMGR_PINMUX_GENERALIO23_t;
13964 #define ALT_SYSMGR_PINMUX_GENERALIO23_OFST 0xdc
14001 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_LSB 0
14003 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_MSB 1
14005 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_WIDTH 2
14007 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_SET_MSK 0x00000003
14009 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_CLR_MSK 0xfffffffc
14011 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_RESET 0x0
14013 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_GET(value) (((value) & 0x00000003) >> 0)
14015 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_SET(value) (((value) << 0) & 0x00000003)
14017 #ifndef __ASSEMBLY__
14028 struct ALT_SYSMGR_PINMUX_GENERALIO24_s
14035 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO24_s ALT_SYSMGR_PINMUX_GENERALIO24_t;
14039 #define ALT_SYSMGR_PINMUX_GENERALIO24_OFST 0xe0
14076 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_LSB 0
14078 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_MSB 1
14080 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_WIDTH 2
14082 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_SET_MSK 0x00000003
14084 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_CLR_MSK 0xfffffffc
14086 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_RESET 0x0
14088 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_GET(value) (((value) & 0x00000003) >> 0)
14090 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_SET(value) (((value) << 0) & 0x00000003)
14092 #ifndef __ASSEMBLY__
14103 struct ALT_SYSMGR_PINMUX_GENERALIO25_s
14110 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO25_s ALT_SYSMGR_PINMUX_GENERALIO25_t;
14114 #define ALT_SYSMGR_PINMUX_GENERALIO25_OFST 0xe4
14151 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_LSB 0
14153 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_MSB 1
14155 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_WIDTH 2
14157 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_SET_MSK 0x00000003
14159 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_CLR_MSK 0xfffffffc
14161 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_RESET 0x0
14163 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_GET(value) (((value) & 0x00000003) >> 0)
14165 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_SET(value) (((value) << 0) & 0x00000003)
14167 #ifndef __ASSEMBLY__
14178 struct ALT_SYSMGR_PINMUX_GENERALIO26_s
14185 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO26_s ALT_SYSMGR_PINMUX_GENERALIO26_t;
14189 #define ALT_SYSMGR_PINMUX_GENERALIO26_OFST 0xe8
14226 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_LSB 0
14228 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_MSB 1
14230 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_WIDTH 2
14232 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_SET_MSK 0x00000003
14234 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_CLR_MSK 0xfffffffc
14236 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_RESET 0x0
14238 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_GET(value) (((value) & 0x00000003) >> 0)
14240 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_SET(value) (((value) << 0) & 0x00000003)
14242 #ifndef __ASSEMBLY__
14253 struct ALT_SYSMGR_PINMUX_GENERALIO27_s
14260 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO27_s ALT_SYSMGR_PINMUX_GENERALIO27_t;
14264 #define ALT_SYSMGR_PINMUX_GENERALIO27_OFST 0xec
14301 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_LSB 0
14303 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_MSB 1
14305 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_WIDTH 2
14307 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_SET_MSK 0x00000003
14309 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_CLR_MSK 0xfffffffc
14311 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_RESET 0x0
14313 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_GET(value) (((value) & 0x00000003) >> 0)
14315 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_SET(value) (((value) << 0) & 0x00000003)
14317 #ifndef __ASSEMBLY__
14328 struct ALT_SYSMGR_PINMUX_GENERALIO28_s
14335 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO28_s ALT_SYSMGR_PINMUX_GENERALIO28_t;
14339 #define ALT_SYSMGR_PINMUX_GENERALIO28_OFST 0xf0
14376 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_LSB 0
14378 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_MSB 1
14380 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_WIDTH 2
14382 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_SET_MSK 0x00000003
14384 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_CLR_MSK 0xfffffffc
14386 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_RESET 0x0
14388 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_GET(value) (((value) & 0x00000003) >> 0)
14390 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_SET(value) (((value) << 0) & 0x00000003)
14392 #ifndef __ASSEMBLY__
14403 struct ALT_SYSMGR_PINMUX_GENERALIO29_s
14410 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO29_s ALT_SYSMGR_PINMUX_GENERALIO29_t;
14414 #define ALT_SYSMGR_PINMUX_GENERALIO29_OFST 0xf4
14451 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_LSB 0
14453 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_MSB 1
14455 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_WIDTH 2
14457 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_SET_MSK 0x00000003
14459 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_CLR_MSK 0xfffffffc
14461 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_RESET 0x0
14463 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_GET(value) (((value) & 0x00000003) >> 0)
14465 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_SET(value) (((value) << 0) & 0x00000003)
14467 #ifndef __ASSEMBLY__
14478 struct ALT_SYSMGR_PINMUX_GENERALIO30_s
14485 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO30_s ALT_SYSMGR_PINMUX_GENERALIO30_t;
14489 #define ALT_SYSMGR_PINMUX_GENERALIO30_OFST 0xf8
14526 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_LSB 0
14528 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_MSB 1
14530 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_WIDTH 2
14532 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_SET_MSK 0x00000003
14534 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_CLR_MSK 0xfffffffc
14536 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_RESET 0x0
14538 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_GET(value) (((value) & 0x00000003) >> 0)
14540 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_SET(value) (((value) << 0) & 0x00000003)
14542 #ifndef __ASSEMBLY__
14553 struct ALT_SYSMGR_PINMUX_GENERALIO31_s
14560 typedef volatile struct ALT_SYSMGR_PINMUX_GENERALIO31_s ALT_SYSMGR_PINMUX_GENERALIO31_t;
14564 #define ALT_SYSMGR_PINMUX_GENERALIO31_OFST 0xfc
14601 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_LSB 0
14603 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_MSB 1
14605 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_WIDTH 2
14607 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_SET_MSK 0x00000003
14609 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_CLR_MSK 0xfffffffc
14611 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_RESET 0x0
14613 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_GET(value) (((value) & 0x00000003) >> 0)
14615 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_SET(value) (((value) << 0) & 0x00000003)
14617 #ifndef __ASSEMBLY__
14628 struct ALT_SYSMGR_PINMUX_MIXED1IO0_s
14635 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO0_s ALT_SYSMGR_PINMUX_MIXED1IO0_t;
14639 #define ALT_SYSMGR_PINMUX_MIXED1IO0_OFST 0x100
14676 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_LSB 0
14678 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_MSB 1
14680 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_WIDTH 2
14682 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_SET_MSK 0x00000003
14684 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_CLR_MSK 0xfffffffc
14686 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_RESET 0x0
14688 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_GET(value) (((value) & 0x00000003) >> 0)
14690 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_SET(value) (((value) << 0) & 0x00000003)
14692 #ifndef __ASSEMBLY__
14703 struct ALT_SYSMGR_PINMUX_MIXED1IO1_s
14710 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO1_s ALT_SYSMGR_PINMUX_MIXED1IO1_t;
14714 #define ALT_SYSMGR_PINMUX_MIXED1IO1_OFST 0x104
14751 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_LSB 0
14753 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_MSB 1
14755 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_WIDTH 2
14757 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_SET_MSK 0x00000003
14759 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_CLR_MSK 0xfffffffc
14761 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_RESET 0x0
14763 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_GET(value) (((value) & 0x00000003) >> 0)
14765 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_SET(value) (((value) << 0) & 0x00000003)
14767 #ifndef __ASSEMBLY__
14778 struct ALT_SYSMGR_PINMUX_MIXED1IO2_s
14785 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO2_s ALT_SYSMGR_PINMUX_MIXED1IO2_t;
14789 #define ALT_SYSMGR_PINMUX_MIXED1IO2_OFST 0x108
14826 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_LSB 0
14828 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_MSB 1
14830 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_WIDTH 2
14832 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_SET_MSK 0x00000003
14834 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_CLR_MSK 0xfffffffc
14836 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_RESET 0x0
14838 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_GET(value) (((value) & 0x00000003) >> 0)
14840 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_SET(value) (((value) << 0) & 0x00000003)
14842 #ifndef __ASSEMBLY__
14853 struct ALT_SYSMGR_PINMUX_MIXED1IO3_s
14860 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO3_s ALT_SYSMGR_PINMUX_MIXED1IO3_t;
14864 #define ALT_SYSMGR_PINMUX_MIXED1IO3_OFST 0x10c
14901 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_LSB 0
14903 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_MSB 1
14905 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_WIDTH 2
14907 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_SET_MSK 0x00000003
14909 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_CLR_MSK 0xfffffffc
14911 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_RESET 0x0
14913 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_GET(value) (((value) & 0x00000003) >> 0)
14915 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_SET(value) (((value) << 0) & 0x00000003)
14917 #ifndef __ASSEMBLY__
14928 struct ALT_SYSMGR_PINMUX_MIXED1IO4_s
14935 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO4_s ALT_SYSMGR_PINMUX_MIXED1IO4_t;
14939 #define ALT_SYSMGR_PINMUX_MIXED1IO4_OFST 0x110
14976 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_LSB 0
14978 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_MSB 1
14980 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_WIDTH 2
14982 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_SET_MSK 0x00000003
14984 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_CLR_MSK 0xfffffffc
14986 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_RESET 0x0
14988 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_GET(value) (((value) & 0x00000003) >> 0)
14990 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_SET(value) (((value) << 0) & 0x00000003)
14992 #ifndef __ASSEMBLY__
15003 struct ALT_SYSMGR_PINMUX_MIXED1IO5_s
15010 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO5_s ALT_SYSMGR_PINMUX_MIXED1IO5_t;
15014 #define ALT_SYSMGR_PINMUX_MIXED1IO5_OFST 0x114
15051 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_LSB 0
15053 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_MSB 1
15055 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_WIDTH 2
15057 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_SET_MSK 0x00000003
15059 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_CLR_MSK 0xfffffffc
15061 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_RESET 0x0
15063 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_GET(value) (((value) & 0x00000003) >> 0)
15065 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_SET(value) (((value) << 0) & 0x00000003)
15067 #ifndef __ASSEMBLY__
15078 struct ALT_SYSMGR_PINMUX_MIXED1IO6_s
15085 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO6_s ALT_SYSMGR_PINMUX_MIXED1IO6_t;
15089 #define ALT_SYSMGR_PINMUX_MIXED1IO6_OFST 0x118
15126 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_LSB 0
15128 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_MSB 1
15130 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_WIDTH 2
15132 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_SET_MSK 0x00000003
15134 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_CLR_MSK 0xfffffffc
15136 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_RESET 0x0
15138 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_GET(value) (((value) & 0x00000003) >> 0)
15140 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_SET(value) (((value) << 0) & 0x00000003)
15142 #ifndef __ASSEMBLY__
15153 struct ALT_SYSMGR_PINMUX_MIXED1IO7_s
15160 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO7_s ALT_SYSMGR_PINMUX_MIXED1IO7_t;
15164 #define ALT_SYSMGR_PINMUX_MIXED1IO7_OFST 0x11c
15201 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_LSB 0
15203 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_MSB 1
15205 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_WIDTH 2
15207 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_SET_MSK 0x00000003
15209 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_CLR_MSK 0xfffffffc
15211 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_RESET 0x0
15213 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_GET(value) (((value) & 0x00000003) >> 0)
15215 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_SET(value) (((value) << 0) & 0x00000003)
15217 #ifndef __ASSEMBLY__
15228 struct ALT_SYSMGR_PINMUX_MIXED1IO8_s
15235 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO8_s ALT_SYSMGR_PINMUX_MIXED1IO8_t;
15239 #define ALT_SYSMGR_PINMUX_MIXED1IO8_OFST 0x120
15276 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_LSB 0
15278 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_MSB 1
15280 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_WIDTH 2
15282 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_SET_MSK 0x00000003
15284 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_CLR_MSK 0xfffffffc
15286 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_RESET 0x0
15288 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_GET(value) (((value) & 0x00000003) >> 0)
15290 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_SET(value) (((value) << 0) & 0x00000003)
15292 #ifndef __ASSEMBLY__
15303 struct ALT_SYSMGR_PINMUX_MIXED1IO9_s
15310 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO9_s ALT_SYSMGR_PINMUX_MIXED1IO9_t;
15314 #define ALT_SYSMGR_PINMUX_MIXED1IO9_OFST 0x124
15351 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_LSB 0
15353 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_MSB 1
15355 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_WIDTH 2
15357 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_SET_MSK 0x00000003
15359 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_CLR_MSK 0xfffffffc
15361 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_RESET 0x0
15363 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_GET(value) (((value) & 0x00000003) >> 0)
15365 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_SET(value) (((value) << 0) & 0x00000003)
15367 #ifndef __ASSEMBLY__
15378 struct ALT_SYSMGR_PINMUX_MIXED1IO10_s
15385 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO10_s ALT_SYSMGR_PINMUX_MIXED1IO10_t;
15389 #define ALT_SYSMGR_PINMUX_MIXED1IO10_OFST 0x128
15426 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_LSB 0
15428 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_MSB 1
15430 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_WIDTH 2
15432 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_SET_MSK 0x00000003
15434 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_CLR_MSK 0xfffffffc
15436 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_RESET 0x0
15438 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_GET(value) (((value) & 0x00000003) >> 0)
15440 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_SET(value) (((value) << 0) & 0x00000003)
15442 #ifndef __ASSEMBLY__
15453 struct ALT_SYSMGR_PINMUX_MIXED1IO11_s
15460 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO11_s ALT_SYSMGR_PINMUX_MIXED1IO11_t;
15464 #define ALT_SYSMGR_PINMUX_MIXED1IO11_OFST 0x12c
15501 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_LSB 0
15503 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_MSB 1
15505 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_WIDTH 2
15507 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_SET_MSK 0x00000003
15509 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_CLR_MSK 0xfffffffc
15511 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_RESET 0x0
15513 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_GET(value) (((value) & 0x00000003) >> 0)
15515 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_SET(value) (((value) << 0) & 0x00000003)
15517 #ifndef __ASSEMBLY__
15528 struct ALT_SYSMGR_PINMUX_MIXED1IO12_s
15535 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO12_s ALT_SYSMGR_PINMUX_MIXED1IO12_t;
15539 #define ALT_SYSMGR_PINMUX_MIXED1IO12_OFST 0x130
15576 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_LSB 0
15578 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_MSB 1
15580 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_WIDTH 2
15582 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_SET_MSK 0x00000003
15584 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_CLR_MSK 0xfffffffc
15586 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_RESET 0x0
15588 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_GET(value) (((value) & 0x00000003) >> 0)
15590 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_SET(value) (((value) << 0) & 0x00000003)
15592 #ifndef __ASSEMBLY__
15603 struct ALT_SYSMGR_PINMUX_MIXED1IO13_s
15610 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO13_s ALT_SYSMGR_PINMUX_MIXED1IO13_t;
15614 #define ALT_SYSMGR_PINMUX_MIXED1IO13_OFST 0x134
15651 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_LSB 0
15653 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_MSB 1
15655 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_WIDTH 2
15657 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_SET_MSK 0x00000003
15659 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_CLR_MSK 0xfffffffc
15661 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_RESET 0x0
15663 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_GET(value) (((value) & 0x00000003) >> 0)
15665 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_SET(value) (((value) << 0) & 0x00000003)
15667 #ifndef __ASSEMBLY__
15678 struct ALT_SYSMGR_PINMUX_MIXED1IO14_s
15685 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO14_s ALT_SYSMGR_PINMUX_MIXED1IO14_t;
15689 #define ALT_SYSMGR_PINMUX_MIXED1IO14_OFST 0x138
15726 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_LSB 0
15728 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_MSB 1
15730 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_WIDTH 2
15732 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_SET_MSK 0x00000003
15734 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_CLR_MSK 0xfffffffc
15736 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_RESET 0x0
15738 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_GET(value) (((value) & 0x00000003) >> 0)
15740 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_SET(value) (((value) << 0) & 0x00000003)
15742 #ifndef __ASSEMBLY__
15753 struct ALT_SYSMGR_PINMUX_MIXED1IO15_s
15760 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO15_s ALT_SYSMGR_PINMUX_MIXED1IO15_t;
15764 #define ALT_SYSMGR_PINMUX_MIXED1IO15_OFST 0x13c
15801 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_LSB 0
15803 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_MSB 1
15805 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_WIDTH 2
15807 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_SET_MSK 0x00000003
15809 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_CLR_MSK 0xfffffffc
15811 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_RESET 0x0
15813 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_GET(value) (((value) & 0x00000003) >> 0)
15815 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_SET(value) (((value) << 0) & 0x00000003)
15817 #ifndef __ASSEMBLY__
15828 struct ALT_SYSMGR_PINMUX_MIXED1IO16_s
15835 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO16_s ALT_SYSMGR_PINMUX_MIXED1IO16_t;
15839 #define ALT_SYSMGR_PINMUX_MIXED1IO16_OFST 0x140
15876 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_LSB 0
15878 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_MSB 1
15880 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_WIDTH 2
15882 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_SET_MSK 0x00000003
15884 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_CLR_MSK 0xfffffffc
15886 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_RESET 0x0
15888 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_GET(value) (((value) & 0x00000003) >> 0)
15890 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_SET(value) (((value) << 0) & 0x00000003)
15892 #ifndef __ASSEMBLY__
15903 struct ALT_SYSMGR_PINMUX_MIXED1IO17_s
15910 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO17_s ALT_SYSMGR_PINMUX_MIXED1IO17_t;
15914 #define ALT_SYSMGR_PINMUX_MIXED1IO17_OFST 0x144
15951 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_LSB 0
15953 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_MSB 1
15955 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_WIDTH 2
15957 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_SET_MSK 0x00000003
15959 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_CLR_MSK 0xfffffffc
15961 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_RESET 0x0
15963 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_GET(value) (((value) & 0x00000003) >> 0)
15965 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_SET(value) (((value) << 0) & 0x00000003)
15967 #ifndef __ASSEMBLY__
15978 struct ALT_SYSMGR_PINMUX_MIXED1IO18_s
15985 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO18_s ALT_SYSMGR_PINMUX_MIXED1IO18_t;
15989 #define ALT_SYSMGR_PINMUX_MIXED1IO18_OFST 0x148
16026 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_LSB 0
16028 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_MSB 1
16030 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_WIDTH 2
16032 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_SET_MSK 0x00000003
16034 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_CLR_MSK 0xfffffffc
16036 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_RESET 0x0
16038 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_GET(value) (((value) & 0x00000003) >> 0)
16040 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_SET(value) (((value) << 0) & 0x00000003)
16042 #ifndef __ASSEMBLY__
16053 struct ALT_SYSMGR_PINMUX_MIXED1IO19_s
16060 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO19_s ALT_SYSMGR_PINMUX_MIXED1IO19_t;
16064 #define ALT_SYSMGR_PINMUX_MIXED1IO19_OFST 0x14c
16101 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_LSB 0
16103 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_MSB 1
16105 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_WIDTH 2
16107 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_SET_MSK 0x00000003
16109 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_CLR_MSK 0xfffffffc
16111 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_RESET 0x0
16113 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_GET(value) (((value) & 0x00000003) >> 0)
16115 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_SET(value) (((value) << 0) & 0x00000003)
16117 #ifndef __ASSEMBLY__
16128 struct ALT_SYSMGR_PINMUX_MIXED1IO20_s
16135 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO20_s ALT_SYSMGR_PINMUX_MIXED1IO20_t;
16139 #define ALT_SYSMGR_PINMUX_MIXED1IO20_OFST 0x150
16176 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_LSB 0
16178 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_MSB 1
16180 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_WIDTH 2
16182 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_SET_MSK 0x00000003
16184 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_CLR_MSK 0xfffffffc
16186 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_RESET 0x0
16188 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_GET(value) (((value) & 0x00000003) >> 0)
16190 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_SET(value) (((value) << 0) & 0x00000003)
16192 #ifndef __ASSEMBLY__
16203 struct ALT_SYSMGR_PINMUX_MIXED1IO21_s
16210 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED1IO21_s ALT_SYSMGR_PINMUX_MIXED1IO21_t;
16214 #define ALT_SYSMGR_PINMUX_MIXED1IO21_OFST 0x154
16251 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_LSB 0
16253 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_MSB 1
16255 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_WIDTH 2
16257 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_SET_MSK 0x00000003
16259 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_CLR_MSK 0xfffffffc
16261 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_RESET 0x0
16263 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_GET(value) (((value) & 0x00000003) >> 0)
16265 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_SET(value) (((value) << 0) & 0x00000003)
16267 #ifndef __ASSEMBLY__
16278 struct ALT_SYSMGR_PINMUX_MIXED2IO0_s
16285 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED2IO0_s ALT_SYSMGR_PINMUX_MIXED2IO0_t;
16289 #define ALT_SYSMGR_PINMUX_MIXED2IO0_OFST 0x158
16326 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_LSB 0
16328 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_MSB 1
16330 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_WIDTH 2
16332 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_SET_MSK 0x00000003
16334 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_CLR_MSK 0xfffffffc
16336 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_RESET 0x0
16338 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_GET(value) (((value) & 0x00000003) >> 0)
16340 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_SET(value) (((value) << 0) & 0x00000003)
16342 #ifndef __ASSEMBLY__
16353 struct ALT_SYSMGR_PINMUX_MIXED2IO1_s
16360 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED2IO1_s ALT_SYSMGR_PINMUX_MIXED2IO1_t;
16364 #define ALT_SYSMGR_PINMUX_MIXED2IO1_OFST 0x15c
16401 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_LSB 0
16403 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_MSB 1
16405 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_WIDTH 2
16407 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_SET_MSK 0x00000003
16409 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_CLR_MSK 0xfffffffc
16411 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_RESET 0x0
16413 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_GET(value) (((value) & 0x00000003) >> 0)
16415 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_SET(value) (((value) << 0) & 0x00000003)
16417 #ifndef __ASSEMBLY__
16428 struct ALT_SYSMGR_PINMUX_MIXED2IO2_s
16435 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED2IO2_s ALT_SYSMGR_PINMUX_MIXED2IO2_t;
16439 #define ALT_SYSMGR_PINMUX_MIXED2IO2_OFST 0x160
16476 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_LSB 0
16478 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_MSB 1
16480 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_WIDTH 2
16482 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_SET_MSK 0x00000003
16484 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_CLR_MSK 0xfffffffc
16486 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_RESET 0x0
16488 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_GET(value) (((value) & 0x00000003) >> 0)
16490 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_SET(value) (((value) << 0) & 0x00000003)
16492 #ifndef __ASSEMBLY__
16503 struct ALT_SYSMGR_PINMUX_MIXED2IO3_s
16510 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED2IO3_s ALT_SYSMGR_PINMUX_MIXED2IO3_t;
16514 #define ALT_SYSMGR_PINMUX_MIXED2IO3_OFST 0x164
16551 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_LSB 0
16553 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_MSB 1
16555 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_WIDTH 2
16557 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_SET_MSK 0x00000003
16559 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_CLR_MSK 0xfffffffc
16561 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_RESET 0x0
16563 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_GET(value) (((value) & 0x00000003) >> 0)
16565 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_SET(value) (((value) << 0) & 0x00000003)
16567 #ifndef __ASSEMBLY__
16578 struct ALT_SYSMGR_PINMUX_MIXED2IO4_s
16585 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED2IO4_s ALT_SYSMGR_PINMUX_MIXED2IO4_t;
16589 #define ALT_SYSMGR_PINMUX_MIXED2IO4_OFST 0x168
16626 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_LSB 0
16628 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_MSB 1
16630 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_WIDTH 2
16632 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_SET_MSK 0x00000003
16634 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_CLR_MSK 0xfffffffc
16636 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_RESET 0x0
16638 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_GET(value) (((value) & 0x00000003) >> 0)
16640 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_SET(value) (((value) << 0) & 0x00000003)
16642 #ifndef __ASSEMBLY__
16653 struct ALT_SYSMGR_PINMUX_MIXED2IO5_s
16660 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED2IO5_s ALT_SYSMGR_PINMUX_MIXED2IO5_t;
16664 #define ALT_SYSMGR_PINMUX_MIXED2IO5_OFST 0x16c
16701 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_LSB 0
16703 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_MSB 1
16705 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_WIDTH 2
16707 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_SET_MSK 0x00000003
16709 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_CLR_MSK 0xfffffffc
16711 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_RESET 0x0
16713 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_GET(value) (((value) & 0x00000003) >> 0)
16715 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_SET(value) (((value) << 0) & 0x00000003)
16717 #ifndef __ASSEMBLY__
16728 struct ALT_SYSMGR_PINMUX_MIXED2IO6_s
16735 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED2IO6_s ALT_SYSMGR_PINMUX_MIXED2IO6_t;
16739 #define ALT_SYSMGR_PINMUX_MIXED2IO6_OFST 0x170
16776 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_LSB 0
16778 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_MSB 1
16780 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_WIDTH 2
16782 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_SET_MSK 0x00000003
16784 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_CLR_MSK 0xfffffffc
16786 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_RESET 0x0
16788 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_GET(value) (((value) & 0x00000003) >> 0)
16790 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_SET(value) (((value) << 0) & 0x00000003)
16792 #ifndef __ASSEMBLY__
16803 struct ALT_SYSMGR_PINMUX_MIXED2IO7_s
16810 typedef volatile struct ALT_SYSMGR_PINMUX_MIXED2IO7_s ALT_SYSMGR_PINMUX_MIXED2IO7_t;
16814 #define ALT_SYSMGR_PINMUX_MIXED2IO7_OFST 0x174
16848 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_LSB 0
16850 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_MSB 0
16852 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_WIDTH 1
16854 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_SET_MSK 0x00000001
16856 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_CLR_MSK 0xfffffffe
16858 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_RESET 0x0
16860 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_GET(value) (((value) & 0x00000001) >> 0)
16862 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_SET(value) (((value) << 0) & 0x00000001)
16864 #ifndef __ASSEMBLY__
16875 struct ALT_SYSMGR_PINMUX_GPLINMUX48_s
16882 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX48_s ALT_SYSMGR_PINMUX_GPLINMUX48_t;
16886 #define ALT_SYSMGR_PINMUX_GPLINMUX48_OFST 0x178
16920 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_LSB 0
16922 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_MSB 0
16924 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_WIDTH 1
16926 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_SET_MSK 0x00000001
16928 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_CLR_MSK 0xfffffffe
16930 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_RESET 0x0
16932 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_GET(value) (((value) & 0x00000001) >> 0)
16934 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_SET(value) (((value) << 0) & 0x00000001)
16936 #ifndef __ASSEMBLY__
16947 struct ALT_SYSMGR_PINMUX_GPLINMUX49_s
16954 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX49_s ALT_SYSMGR_PINMUX_GPLINMUX49_t;
16958 #define ALT_SYSMGR_PINMUX_GPLINMUX49_OFST 0x17c
16992 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_LSB 0
16994 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_MSB 0
16996 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_WIDTH 1
16998 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_SET_MSK 0x00000001
17000 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_CLR_MSK 0xfffffffe
17002 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_RESET 0x0
17004 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_GET(value) (((value) & 0x00000001) >> 0)
17006 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_SET(value) (((value) << 0) & 0x00000001)
17008 #ifndef __ASSEMBLY__
17019 struct ALT_SYSMGR_PINMUX_GPLINMUX50_s
17026 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX50_s ALT_SYSMGR_PINMUX_GPLINMUX50_t;
17030 #define ALT_SYSMGR_PINMUX_GPLINMUX50_OFST 0x180
17064 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_LSB 0
17066 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_MSB 0
17068 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_WIDTH 1
17070 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_SET_MSK 0x00000001
17072 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_CLR_MSK 0xfffffffe
17074 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_RESET 0x0
17076 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_GET(value) (((value) & 0x00000001) >> 0)
17078 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_SET(value) (((value) << 0) & 0x00000001)
17080 #ifndef __ASSEMBLY__
17091 struct ALT_SYSMGR_PINMUX_GPLINMUX51_s
17098 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX51_s ALT_SYSMGR_PINMUX_GPLINMUX51_t;
17102 #define ALT_SYSMGR_PINMUX_GPLINMUX51_OFST 0x184
17136 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_LSB 0
17138 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_MSB 0
17140 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_WIDTH 1
17142 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_SET_MSK 0x00000001
17144 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_CLR_MSK 0xfffffffe
17146 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_RESET 0x0
17148 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_GET(value) (((value) & 0x00000001) >> 0)
17150 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_SET(value) (((value) << 0) & 0x00000001)
17152 #ifndef __ASSEMBLY__
17163 struct ALT_SYSMGR_PINMUX_GPLINMUX52_s
17170 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX52_s ALT_SYSMGR_PINMUX_GPLINMUX52_t;
17174 #define ALT_SYSMGR_PINMUX_GPLINMUX52_OFST 0x188
17208 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_LSB 0
17210 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_MSB 0
17212 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_WIDTH 1
17214 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_SET_MSK 0x00000001
17216 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_CLR_MSK 0xfffffffe
17218 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_RESET 0x0
17220 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_GET(value) (((value) & 0x00000001) >> 0)
17222 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_SET(value) (((value) << 0) & 0x00000001)
17224 #ifndef __ASSEMBLY__
17235 struct ALT_SYSMGR_PINMUX_GPLINMUX53_s
17242 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX53_s ALT_SYSMGR_PINMUX_GPLINMUX53_t;
17246 #define ALT_SYSMGR_PINMUX_GPLINMUX53_OFST 0x18c
17280 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_LSB 0
17282 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_MSB 0
17284 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_WIDTH 1
17286 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_SET_MSK 0x00000001
17288 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_CLR_MSK 0xfffffffe
17290 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_RESET 0x0
17292 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_GET(value) (((value) & 0x00000001) >> 0)
17294 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_SET(value) (((value) << 0) & 0x00000001)
17296 #ifndef __ASSEMBLY__
17307 struct ALT_SYSMGR_PINMUX_GPLINMUX54_s
17314 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX54_s ALT_SYSMGR_PINMUX_GPLINMUX54_t;
17318 #define ALT_SYSMGR_PINMUX_GPLINMUX54_OFST 0x190
17352 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_LSB 0
17354 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_MSB 0
17356 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_WIDTH 1
17358 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_SET_MSK 0x00000001
17360 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_CLR_MSK 0xfffffffe
17362 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_RESET 0x0
17364 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_GET(value) (((value) & 0x00000001) >> 0)
17366 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_SET(value) (((value) << 0) & 0x00000001)
17368 #ifndef __ASSEMBLY__
17379 struct ALT_SYSMGR_PINMUX_GPLINMUX55_s
17386 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX55_s ALT_SYSMGR_PINMUX_GPLINMUX55_t;
17390 #define ALT_SYSMGR_PINMUX_GPLINMUX55_OFST 0x194
17424 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_LSB 0
17426 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_MSB 0
17428 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_WIDTH 1
17430 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_SET_MSK 0x00000001
17432 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_CLR_MSK 0xfffffffe
17434 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_RESET 0x0
17436 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_GET(value) (((value) & 0x00000001) >> 0)
17438 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_SET(value) (((value) << 0) & 0x00000001)
17440 #ifndef __ASSEMBLY__
17451 struct ALT_SYSMGR_PINMUX_GPLINMUX56_s
17458 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX56_s ALT_SYSMGR_PINMUX_GPLINMUX56_t;
17462 #define ALT_SYSMGR_PINMUX_GPLINMUX56_OFST 0x198
17496 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_LSB 0
17498 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_MSB 0
17500 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_WIDTH 1
17502 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_SET_MSK 0x00000001
17504 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_CLR_MSK 0xfffffffe
17506 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_RESET 0x0
17508 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_GET(value) (((value) & 0x00000001) >> 0)
17510 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_SET(value) (((value) << 0) & 0x00000001)
17512 #ifndef __ASSEMBLY__
17523 struct ALT_SYSMGR_PINMUX_GPLINMUX57_s
17530 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX57_s ALT_SYSMGR_PINMUX_GPLINMUX57_t;
17534 #define ALT_SYSMGR_PINMUX_GPLINMUX57_OFST 0x19c
17568 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_LSB 0
17570 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_MSB 0
17572 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_WIDTH 1
17574 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_SET_MSK 0x00000001
17576 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_CLR_MSK 0xfffffffe
17578 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_RESET 0x0
17580 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_GET(value) (((value) & 0x00000001) >> 0)
17582 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_SET(value) (((value) << 0) & 0x00000001)
17584 #ifndef __ASSEMBLY__
17595 struct ALT_SYSMGR_PINMUX_GPLINMUX58_s
17602 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX58_s ALT_SYSMGR_PINMUX_GPLINMUX58_t;
17606 #define ALT_SYSMGR_PINMUX_GPLINMUX58_OFST 0x1a0
17640 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_LSB 0
17642 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_MSB 0
17644 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_WIDTH 1
17646 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_SET_MSK 0x00000001
17648 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_CLR_MSK 0xfffffffe
17650 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_RESET 0x0
17652 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_GET(value) (((value) & 0x00000001) >> 0)
17654 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_SET(value) (((value) << 0) & 0x00000001)
17656 #ifndef __ASSEMBLY__
17667 struct ALT_SYSMGR_PINMUX_GPLINMUX59_s
17674 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX59_s ALT_SYSMGR_PINMUX_GPLINMUX59_t;
17678 #define ALT_SYSMGR_PINMUX_GPLINMUX59_OFST 0x1a4
17712 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_LSB 0
17714 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_MSB 0
17716 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_WIDTH 1
17718 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_SET_MSK 0x00000001
17720 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_CLR_MSK 0xfffffffe
17722 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_RESET 0x0
17724 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_GET(value) (((value) & 0x00000001) >> 0)
17726 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_SET(value) (((value) << 0) & 0x00000001)
17728 #ifndef __ASSEMBLY__
17739 struct ALT_SYSMGR_PINMUX_GPLINMUX60_s
17746 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX60_s ALT_SYSMGR_PINMUX_GPLINMUX60_t;
17750 #define ALT_SYSMGR_PINMUX_GPLINMUX60_OFST 0x1a8
17784 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_LSB 0
17786 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_MSB 0
17788 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_WIDTH 1
17790 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_SET_MSK 0x00000001
17792 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_CLR_MSK 0xfffffffe
17794 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_RESET 0x0
17796 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_GET(value) (((value) & 0x00000001) >> 0)
17798 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_SET(value) (((value) << 0) & 0x00000001)
17800 #ifndef __ASSEMBLY__
17811 struct ALT_SYSMGR_PINMUX_GPLINMUX61_s
17818 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX61_s ALT_SYSMGR_PINMUX_GPLINMUX61_t;
17822 #define ALT_SYSMGR_PINMUX_GPLINMUX61_OFST 0x1ac
17856 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_LSB 0
17858 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_MSB 0
17860 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_WIDTH 1
17862 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_SET_MSK 0x00000001
17864 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_CLR_MSK 0xfffffffe
17866 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_RESET 0x0
17868 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_GET(value) (((value) & 0x00000001) >> 0)
17870 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_SET(value) (((value) << 0) & 0x00000001)
17872 #ifndef __ASSEMBLY__
17883 struct ALT_SYSMGR_PINMUX_GPLINMUX62_s
17890 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX62_s ALT_SYSMGR_PINMUX_GPLINMUX62_t;
17894 #define ALT_SYSMGR_PINMUX_GPLINMUX62_OFST 0x1b0
17928 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_LSB 0
17930 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_MSB 0
17932 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_WIDTH 1
17934 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_SET_MSK 0x00000001
17936 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_CLR_MSK 0xfffffffe
17938 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_RESET 0x0
17940 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_GET(value) (((value) & 0x00000001) >> 0)
17942 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_SET(value) (((value) << 0) & 0x00000001)
17944 #ifndef __ASSEMBLY__
17955 struct ALT_SYSMGR_PINMUX_GPLINMUX63_s
17962 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX63_s ALT_SYSMGR_PINMUX_GPLINMUX63_t;
17966 #define ALT_SYSMGR_PINMUX_GPLINMUX63_OFST 0x1b4
18000 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_LSB 0
18002 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_MSB 0
18004 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_WIDTH 1
18006 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_SET_MSK 0x00000001
18008 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_CLR_MSK 0xfffffffe
18010 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_RESET 0x0
18012 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_GET(value) (((value) & 0x00000001) >> 0)
18014 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_SET(value) (((value) << 0) & 0x00000001)
18016 #ifndef __ASSEMBLY__
18027 struct ALT_SYSMGR_PINMUX_GPLINMUX64_s
18034 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX64_s ALT_SYSMGR_PINMUX_GPLINMUX64_t;
18038 #define ALT_SYSMGR_PINMUX_GPLINMUX64_OFST 0x1b8
18072 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_LSB 0
18074 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_MSB 0
18076 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_WIDTH 1
18078 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_SET_MSK 0x00000001
18080 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_CLR_MSK 0xfffffffe
18082 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_RESET 0x0
18084 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_GET(value) (((value) & 0x00000001) >> 0)
18086 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_SET(value) (((value) << 0) & 0x00000001)
18088 #ifndef __ASSEMBLY__
18099 struct ALT_SYSMGR_PINMUX_GPLINMUX65_s
18106 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX65_s ALT_SYSMGR_PINMUX_GPLINMUX65_t;
18110 #define ALT_SYSMGR_PINMUX_GPLINMUX65_OFST 0x1bc
18144 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_LSB 0
18146 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_MSB 0
18148 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_WIDTH 1
18150 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_SET_MSK 0x00000001
18152 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_CLR_MSK 0xfffffffe
18154 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_RESET 0x0
18156 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_GET(value) (((value) & 0x00000001) >> 0)
18158 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_SET(value) (((value) << 0) & 0x00000001)
18160 #ifndef __ASSEMBLY__
18171 struct ALT_SYSMGR_PINMUX_GPLINMUX66_s
18178 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX66_s ALT_SYSMGR_PINMUX_GPLINMUX66_t;
18182 #define ALT_SYSMGR_PINMUX_GPLINMUX66_OFST 0x1c0
18216 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_LSB 0
18218 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_MSB 0
18220 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_WIDTH 1
18222 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_SET_MSK 0x00000001
18224 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_CLR_MSK 0xfffffffe
18226 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_RESET 0x0
18228 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_GET(value) (((value) & 0x00000001) >> 0)
18230 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_SET(value) (((value) << 0) & 0x00000001)
18232 #ifndef __ASSEMBLY__
18243 struct ALT_SYSMGR_PINMUX_GPLINMUX67_s
18250 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX67_s ALT_SYSMGR_PINMUX_GPLINMUX67_t;
18254 #define ALT_SYSMGR_PINMUX_GPLINMUX67_OFST 0x1c4
18288 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_LSB 0
18290 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_MSB 0
18292 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_WIDTH 1
18294 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_SET_MSK 0x00000001
18296 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_CLR_MSK 0xfffffffe
18298 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_RESET 0x0
18300 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_GET(value) (((value) & 0x00000001) >> 0)
18302 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_SET(value) (((value) << 0) & 0x00000001)
18304 #ifndef __ASSEMBLY__
18315 struct ALT_SYSMGR_PINMUX_GPLINMUX68_s
18322 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX68_s ALT_SYSMGR_PINMUX_GPLINMUX68_t;
18326 #define ALT_SYSMGR_PINMUX_GPLINMUX68_OFST 0x1c8
18360 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_LSB 0
18362 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_MSB 0
18364 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_WIDTH 1
18366 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_SET_MSK 0x00000001
18368 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_CLR_MSK 0xfffffffe
18370 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_RESET 0x0
18372 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_GET(value) (((value) & 0x00000001) >> 0)
18374 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_SET(value) (((value) << 0) & 0x00000001)
18376 #ifndef __ASSEMBLY__
18387 struct ALT_SYSMGR_PINMUX_GPLINMUX69_s
18394 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX69_s ALT_SYSMGR_PINMUX_GPLINMUX69_t;
18398 #define ALT_SYSMGR_PINMUX_GPLINMUX69_OFST 0x1cc
18432 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_LSB 0
18434 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_MSB 0
18436 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_WIDTH 1
18438 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_SET_MSK 0x00000001
18440 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_CLR_MSK 0xfffffffe
18442 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_RESET 0x0
18444 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_GET(value) (((value) & 0x00000001) >> 0)
18446 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_SET(value) (((value) << 0) & 0x00000001)
18448 #ifndef __ASSEMBLY__
18459 struct ALT_SYSMGR_PINMUX_GPLINMUX70_s
18466 typedef volatile struct ALT_SYSMGR_PINMUX_GPLINMUX70_s ALT_SYSMGR_PINMUX_GPLINMUX70_t;
18470 #define ALT_SYSMGR_PINMUX_GPLINMUX70_OFST 0x1d0
18505 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_LSB 0
18507 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_MSB 0
18509 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_WIDTH 1
18511 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_SET_MSK 0x00000001
18513 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_CLR_MSK 0xfffffffe
18515 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_RESET 0x0
18517 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_GET(value) (((value) & 0x00000001) >> 0)
18519 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_SET(value) (((value) << 0) & 0x00000001)
18521 #ifndef __ASSEMBLY__
18532 struct ALT_SYSMGR_PINMUX_GPLMUX0_s
18539 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX0_s ALT_SYSMGR_PINMUX_GPLMUX0_t;
18543 #define ALT_SYSMGR_PINMUX_GPLMUX0_OFST 0x1d4
18578 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_LSB 0
18580 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_MSB 0
18582 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_WIDTH 1
18584 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_SET_MSK 0x00000001
18586 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_CLR_MSK 0xfffffffe
18588 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_RESET 0x0
18590 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_GET(value) (((value) & 0x00000001) >> 0)
18592 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_SET(value) (((value) << 0) & 0x00000001)
18594 #ifndef __ASSEMBLY__
18605 struct ALT_SYSMGR_PINMUX_GPLMUX1_s
18612 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX1_s ALT_SYSMGR_PINMUX_GPLMUX1_t;
18616 #define ALT_SYSMGR_PINMUX_GPLMUX1_OFST 0x1d8
18651 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_LSB 0
18653 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_MSB 0
18655 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_WIDTH 1
18657 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_SET_MSK 0x00000001
18659 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_CLR_MSK 0xfffffffe
18661 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_RESET 0x0
18663 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_GET(value) (((value) & 0x00000001) >> 0)
18665 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_SET(value) (((value) << 0) & 0x00000001)
18667 #ifndef __ASSEMBLY__
18678 struct ALT_SYSMGR_PINMUX_GPLMUX2_s
18685 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX2_s ALT_SYSMGR_PINMUX_GPLMUX2_t;
18689 #define ALT_SYSMGR_PINMUX_GPLMUX2_OFST 0x1dc
18724 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_LSB 0
18726 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_MSB 0
18728 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_WIDTH 1
18730 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_SET_MSK 0x00000001
18732 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_CLR_MSK 0xfffffffe
18734 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_RESET 0x0
18736 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_GET(value) (((value) & 0x00000001) >> 0)
18738 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_SET(value) (((value) << 0) & 0x00000001)
18740 #ifndef __ASSEMBLY__
18751 struct ALT_SYSMGR_PINMUX_GPLMUX3_s
18758 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX3_s ALT_SYSMGR_PINMUX_GPLMUX3_t;
18762 #define ALT_SYSMGR_PINMUX_GPLMUX3_OFST 0x1e0
18797 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_LSB 0
18799 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_MSB 0
18801 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_WIDTH 1
18803 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_SET_MSK 0x00000001
18805 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_CLR_MSK 0xfffffffe
18807 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_RESET 0x0
18809 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_GET(value) (((value) & 0x00000001) >> 0)
18811 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_SET(value) (((value) << 0) & 0x00000001)
18813 #ifndef __ASSEMBLY__
18824 struct ALT_SYSMGR_PINMUX_GPLMUX4_s
18831 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX4_s ALT_SYSMGR_PINMUX_GPLMUX4_t;
18835 #define ALT_SYSMGR_PINMUX_GPLMUX4_OFST 0x1e4
18870 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_LSB 0
18872 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_MSB 0
18874 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_WIDTH 1
18876 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_SET_MSK 0x00000001
18878 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_CLR_MSK 0xfffffffe
18880 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_RESET 0x0
18882 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_GET(value) (((value) & 0x00000001) >> 0)
18884 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_SET(value) (((value) << 0) & 0x00000001)
18886 #ifndef __ASSEMBLY__
18897 struct ALT_SYSMGR_PINMUX_GPLMUX5_s
18904 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX5_s ALT_SYSMGR_PINMUX_GPLMUX5_t;
18908 #define ALT_SYSMGR_PINMUX_GPLMUX5_OFST 0x1e8
18943 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_LSB 0
18945 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_MSB 0
18947 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_WIDTH 1
18949 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_SET_MSK 0x00000001
18951 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_CLR_MSK 0xfffffffe
18953 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_RESET 0x0
18955 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_GET(value) (((value) & 0x00000001) >> 0)
18957 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_SET(value) (((value) << 0) & 0x00000001)
18959 #ifndef __ASSEMBLY__
18970 struct ALT_SYSMGR_PINMUX_GPLMUX6_s
18977 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX6_s ALT_SYSMGR_PINMUX_GPLMUX6_t;
18981 #define ALT_SYSMGR_PINMUX_GPLMUX6_OFST 0x1ec
19016 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_LSB 0
19018 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_MSB 0
19020 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_WIDTH 1
19022 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_SET_MSK 0x00000001
19024 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_CLR_MSK 0xfffffffe
19026 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_RESET 0x0
19028 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_GET(value) (((value) & 0x00000001) >> 0)
19030 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_SET(value) (((value) << 0) & 0x00000001)
19032 #ifndef __ASSEMBLY__
19043 struct ALT_SYSMGR_PINMUX_GPLMUX7_s
19050 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX7_s ALT_SYSMGR_PINMUX_GPLMUX7_t;
19054 #define ALT_SYSMGR_PINMUX_GPLMUX7_OFST 0x1f0
19089 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_LSB 0
19091 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_MSB 0
19093 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_WIDTH 1
19095 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_SET_MSK 0x00000001
19097 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_CLR_MSK 0xfffffffe
19099 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_RESET 0x0
19101 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_GET(value) (((value) & 0x00000001) >> 0)
19103 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_SET(value) (((value) << 0) & 0x00000001)
19105 #ifndef __ASSEMBLY__
19116 struct ALT_SYSMGR_PINMUX_GPLMUX8_s
19123 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX8_s ALT_SYSMGR_PINMUX_GPLMUX8_t;
19127 #define ALT_SYSMGR_PINMUX_GPLMUX8_OFST 0x1f4
19162 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_LSB 0
19164 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_MSB 0
19166 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_WIDTH 1
19168 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_SET_MSK 0x00000001
19170 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_CLR_MSK 0xfffffffe
19172 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_RESET 0x0
19174 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_GET(value) (((value) & 0x00000001) >> 0)
19176 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_SET(value) (((value) << 0) & 0x00000001)
19178 #ifndef __ASSEMBLY__
19189 struct ALT_SYSMGR_PINMUX_GPLMUX9_s
19196 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX9_s ALT_SYSMGR_PINMUX_GPLMUX9_t;
19200 #define ALT_SYSMGR_PINMUX_GPLMUX9_OFST 0x1f8
19235 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_LSB 0
19237 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_MSB 0
19239 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_WIDTH 1
19241 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_SET_MSK 0x00000001
19243 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_CLR_MSK 0xfffffffe
19245 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_RESET 0x0
19247 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_GET(value) (((value) & 0x00000001) >> 0)
19249 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_SET(value) (((value) << 0) & 0x00000001)
19251 #ifndef __ASSEMBLY__
19262 struct ALT_SYSMGR_PINMUX_GPLMUX10_s
19269 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX10_s ALT_SYSMGR_PINMUX_GPLMUX10_t;
19273 #define ALT_SYSMGR_PINMUX_GPLMUX10_OFST 0x1fc
19308 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_LSB 0
19310 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_MSB 0
19312 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_WIDTH 1
19314 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_SET_MSK 0x00000001
19316 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_CLR_MSK 0xfffffffe
19318 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_RESET 0x0
19320 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_GET(value) (((value) & 0x00000001) >> 0)
19322 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_SET(value) (((value) << 0) & 0x00000001)
19324 #ifndef __ASSEMBLY__
19335 struct ALT_SYSMGR_PINMUX_GPLMUX11_s
19342 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX11_s ALT_SYSMGR_PINMUX_GPLMUX11_t;
19346 #define ALT_SYSMGR_PINMUX_GPLMUX11_OFST 0x200
19381 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_LSB 0
19383 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_MSB 0
19385 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_WIDTH 1
19387 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_SET_MSK 0x00000001
19389 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_CLR_MSK 0xfffffffe
19391 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_RESET 0x0
19393 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_GET(value) (((value) & 0x00000001) >> 0)
19395 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_SET(value) (((value) << 0) & 0x00000001)
19397 #ifndef __ASSEMBLY__
19408 struct ALT_SYSMGR_PINMUX_GPLMUX12_s
19415 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX12_s ALT_SYSMGR_PINMUX_GPLMUX12_t;
19419 #define ALT_SYSMGR_PINMUX_GPLMUX12_OFST 0x204
19454 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_LSB 0
19456 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_MSB 0
19458 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_WIDTH 1
19460 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_SET_MSK 0x00000001
19462 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_CLR_MSK 0xfffffffe
19464 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_RESET 0x0
19466 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_GET(value) (((value) & 0x00000001) >> 0)
19468 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_SET(value) (((value) << 0) & 0x00000001)
19470 #ifndef __ASSEMBLY__
19481 struct ALT_SYSMGR_PINMUX_GPLMUX13_s
19488 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX13_s ALT_SYSMGR_PINMUX_GPLMUX13_t;
19492 #define ALT_SYSMGR_PINMUX_GPLMUX13_OFST 0x208
19527 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_LSB 0
19529 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_MSB 0
19531 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_WIDTH 1
19533 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_SET_MSK 0x00000001
19535 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_CLR_MSK 0xfffffffe
19537 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_RESET 0x0
19539 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_GET(value) (((value) & 0x00000001) >> 0)
19541 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_SET(value) (((value) << 0) & 0x00000001)
19543 #ifndef __ASSEMBLY__
19554 struct ALT_SYSMGR_PINMUX_GPLMUX14_s
19561 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX14_s ALT_SYSMGR_PINMUX_GPLMUX14_t;
19565 #define ALT_SYSMGR_PINMUX_GPLMUX14_OFST 0x20c
19600 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_LSB 0
19602 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_MSB 0
19604 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_WIDTH 1
19606 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_SET_MSK 0x00000001
19608 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_CLR_MSK 0xfffffffe
19610 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_RESET 0x0
19612 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_GET(value) (((value) & 0x00000001) >> 0)
19614 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_SET(value) (((value) << 0) & 0x00000001)
19616 #ifndef __ASSEMBLY__
19627 struct ALT_SYSMGR_PINMUX_GPLMUX15_s
19634 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX15_s ALT_SYSMGR_PINMUX_GPLMUX15_t;
19638 #define ALT_SYSMGR_PINMUX_GPLMUX15_OFST 0x210
19673 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_LSB 0
19675 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_MSB 0
19677 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_WIDTH 1
19679 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_SET_MSK 0x00000001
19681 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_CLR_MSK 0xfffffffe
19683 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_RESET 0x0
19685 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_GET(value) (((value) & 0x00000001) >> 0)
19687 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_SET(value) (((value) << 0) & 0x00000001)
19689 #ifndef __ASSEMBLY__
19700 struct ALT_SYSMGR_PINMUX_GPLMUX16_s
19707 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX16_s ALT_SYSMGR_PINMUX_GPLMUX16_t;
19711 #define ALT_SYSMGR_PINMUX_GPLMUX16_OFST 0x214
19746 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_LSB 0
19748 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_MSB 0
19750 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_WIDTH 1
19752 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_SET_MSK 0x00000001
19754 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_CLR_MSK 0xfffffffe
19756 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_RESET 0x0
19758 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_GET(value) (((value) & 0x00000001) >> 0)
19760 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_SET(value) (((value) << 0) & 0x00000001)
19762 #ifndef __ASSEMBLY__
19773 struct ALT_SYSMGR_PINMUX_GPLMUX17_s
19780 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX17_s ALT_SYSMGR_PINMUX_GPLMUX17_t;
19784 #define ALT_SYSMGR_PINMUX_GPLMUX17_OFST 0x218
19819 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_LSB 0
19821 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_MSB 0
19823 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_WIDTH 1
19825 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_SET_MSK 0x00000001
19827 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_CLR_MSK 0xfffffffe
19829 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_RESET 0x0
19831 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_GET(value) (((value) & 0x00000001) >> 0)
19833 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_SET(value) (((value) << 0) & 0x00000001)
19835 #ifndef __ASSEMBLY__
19846 struct ALT_SYSMGR_PINMUX_GPLMUX18_s
19853 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX18_s ALT_SYSMGR_PINMUX_GPLMUX18_t;
19857 #define ALT_SYSMGR_PINMUX_GPLMUX18_OFST 0x21c
19892 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_LSB 0
19894 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_MSB 0
19896 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_WIDTH 1
19898 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_SET_MSK 0x00000001
19900 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_CLR_MSK 0xfffffffe
19902 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_RESET 0x0
19904 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_GET(value) (((value) & 0x00000001) >> 0)
19906 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_SET(value) (((value) << 0) & 0x00000001)
19908 #ifndef __ASSEMBLY__
19919 struct ALT_SYSMGR_PINMUX_GPLMUX19_s
19926 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX19_s ALT_SYSMGR_PINMUX_GPLMUX19_t;
19930 #define ALT_SYSMGR_PINMUX_GPLMUX19_OFST 0x220
19965 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_LSB 0
19967 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_MSB 0
19969 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_WIDTH 1
19971 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_SET_MSK 0x00000001
19973 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_CLR_MSK 0xfffffffe
19975 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_RESET 0x0
19977 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_GET(value) (((value) & 0x00000001) >> 0)
19979 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_SET(value) (((value) << 0) & 0x00000001)
19981 #ifndef __ASSEMBLY__
19992 struct ALT_SYSMGR_PINMUX_GPLMUX20_s
19999 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX20_s ALT_SYSMGR_PINMUX_GPLMUX20_t;
20003 #define ALT_SYSMGR_PINMUX_GPLMUX20_OFST 0x224
20038 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_LSB 0
20040 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_MSB 0
20042 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_WIDTH 1
20044 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_SET_MSK 0x00000001
20046 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_CLR_MSK 0xfffffffe
20048 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_RESET 0x0
20050 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_GET(value) (((value) & 0x00000001) >> 0)
20052 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_SET(value) (((value) << 0) & 0x00000001)
20054 #ifndef __ASSEMBLY__
20065 struct ALT_SYSMGR_PINMUX_GPLMUX21_s
20072 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX21_s ALT_SYSMGR_PINMUX_GPLMUX21_t;
20076 #define ALT_SYSMGR_PINMUX_GPLMUX21_OFST 0x228
20111 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_LSB 0
20113 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_MSB 0
20115 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_WIDTH 1
20117 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_SET_MSK 0x00000001
20119 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_CLR_MSK 0xfffffffe
20121 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_RESET 0x0
20123 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_GET(value) (((value) & 0x00000001) >> 0)
20125 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_SET(value) (((value) << 0) & 0x00000001)
20127 #ifndef __ASSEMBLY__
20138 struct ALT_SYSMGR_PINMUX_GPLMUX22_s
20145 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX22_s ALT_SYSMGR_PINMUX_GPLMUX22_t;
20149 #define ALT_SYSMGR_PINMUX_GPLMUX22_OFST 0x22c
20184 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_LSB 0
20186 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_MSB 0
20188 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_WIDTH 1
20190 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_SET_MSK 0x00000001
20192 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_CLR_MSK 0xfffffffe
20194 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_RESET 0x0
20196 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_GET(value) (((value) & 0x00000001) >> 0)
20198 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_SET(value) (((value) << 0) & 0x00000001)
20200 #ifndef __ASSEMBLY__
20211 struct ALT_SYSMGR_PINMUX_GPLMUX23_s
20218 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX23_s ALT_SYSMGR_PINMUX_GPLMUX23_t;
20222 #define ALT_SYSMGR_PINMUX_GPLMUX23_OFST 0x230
20257 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_LSB 0
20259 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_MSB 0
20261 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_WIDTH 1
20263 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_SET_MSK 0x00000001
20265 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_CLR_MSK 0xfffffffe
20267 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_RESET 0x0
20269 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_GET(value) (((value) & 0x00000001) >> 0)
20271 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_SET(value) (((value) << 0) & 0x00000001)
20273 #ifndef __ASSEMBLY__
20284 struct ALT_SYSMGR_PINMUX_GPLMUX24_s
20291 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX24_s ALT_SYSMGR_PINMUX_GPLMUX24_t;
20295 #define ALT_SYSMGR_PINMUX_GPLMUX24_OFST 0x234
20330 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_LSB 0
20332 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_MSB 0
20334 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_WIDTH 1
20336 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_SET_MSK 0x00000001
20338 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_CLR_MSK 0xfffffffe
20340 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_RESET 0x0
20342 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_GET(value) (((value) & 0x00000001) >> 0)
20344 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_SET(value) (((value) << 0) & 0x00000001)
20346 #ifndef __ASSEMBLY__
20357 struct ALT_SYSMGR_PINMUX_GPLMUX25_s
20364 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX25_s ALT_SYSMGR_PINMUX_GPLMUX25_t;
20368 #define ALT_SYSMGR_PINMUX_GPLMUX25_OFST 0x238
20403 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_LSB 0
20405 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_MSB 0
20407 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_WIDTH 1
20409 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_SET_MSK 0x00000001
20411 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_CLR_MSK 0xfffffffe
20413 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_RESET 0x0
20415 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_GET(value) (((value) & 0x00000001) >> 0)
20417 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_SET(value) (((value) << 0) & 0x00000001)
20419 #ifndef __ASSEMBLY__
20430 struct ALT_SYSMGR_PINMUX_GPLMUX26_s
20437 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX26_s ALT_SYSMGR_PINMUX_GPLMUX26_t;
20441 #define ALT_SYSMGR_PINMUX_GPLMUX26_OFST 0x23c
20476 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_LSB 0
20478 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_MSB 0
20480 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_WIDTH 1
20482 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_SET_MSK 0x00000001
20484 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_CLR_MSK 0xfffffffe
20486 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_RESET 0x0
20488 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_GET(value) (((value) & 0x00000001) >> 0)
20490 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_SET(value) (((value) << 0) & 0x00000001)
20492 #ifndef __ASSEMBLY__
20503 struct ALT_SYSMGR_PINMUX_GPLMUX27_s
20510 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX27_s ALT_SYSMGR_PINMUX_GPLMUX27_t;
20514 #define ALT_SYSMGR_PINMUX_GPLMUX27_OFST 0x240
20549 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_LSB 0
20551 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_MSB 0
20553 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_WIDTH 1
20555 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_SET_MSK 0x00000001
20557 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_CLR_MSK 0xfffffffe
20559 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_RESET 0x0
20561 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_GET(value) (((value) & 0x00000001) >> 0)
20563 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_SET(value) (((value) << 0) & 0x00000001)
20565 #ifndef __ASSEMBLY__
20576 struct ALT_SYSMGR_PINMUX_GPLMUX28_s
20583 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX28_s ALT_SYSMGR_PINMUX_GPLMUX28_t;
20587 #define ALT_SYSMGR_PINMUX_GPLMUX28_OFST 0x244
20622 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_LSB 0
20624 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_MSB 0
20626 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_WIDTH 1
20628 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_SET_MSK 0x00000001
20630 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_CLR_MSK 0xfffffffe
20632 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_RESET 0x0
20634 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_GET(value) (((value) & 0x00000001) >> 0)
20636 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_SET(value) (((value) << 0) & 0x00000001)
20638 #ifndef __ASSEMBLY__
20649 struct ALT_SYSMGR_PINMUX_GPLMUX29_s
20656 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX29_s ALT_SYSMGR_PINMUX_GPLMUX29_t;
20660 #define ALT_SYSMGR_PINMUX_GPLMUX29_OFST 0x248
20695 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_LSB 0
20697 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_MSB 0
20699 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_WIDTH 1
20701 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_SET_MSK 0x00000001
20703 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_CLR_MSK 0xfffffffe
20705 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_RESET 0x0
20707 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_GET(value) (((value) & 0x00000001) >> 0)
20709 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_SET(value) (((value) << 0) & 0x00000001)
20711 #ifndef __ASSEMBLY__
20722 struct ALT_SYSMGR_PINMUX_GPLMUX30_s
20729 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX30_s ALT_SYSMGR_PINMUX_GPLMUX30_t;
20733 #define ALT_SYSMGR_PINMUX_GPLMUX30_OFST 0x24c
20768 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_LSB 0
20770 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_MSB 0
20772 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_WIDTH 1
20774 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_SET_MSK 0x00000001
20776 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_CLR_MSK 0xfffffffe
20778 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_RESET 0x0
20780 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_GET(value) (((value) & 0x00000001) >> 0)
20782 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_SET(value) (((value) << 0) & 0x00000001)
20784 #ifndef __ASSEMBLY__
20795 struct ALT_SYSMGR_PINMUX_GPLMUX31_s
20802 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX31_s ALT_SYSMGR_PINMUX_GPLMUX31_t;
20806 #define ALT_SYSMGR_PINMUX_GPLMUX31_OFST 0x250
20841 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_LSB 0
20843 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_MSB 0
20845 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_WIDTH 1
20847 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_SET_MSK 0x00000001
20849 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_CLR_MSK 0xfffffffe
20851 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_RESET 0x0
20853 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_GET(value) (((value) & 0x00000001) >> 0)
20855 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_SET(value) (((value) << 0) & 0x00000001)
20857 #ifndef __ASSEMBLY__
20868 struct ALT_SYSMGR_PINMUX_GPLMUX32_s
20875 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX32_s ALT_SYSMGR_PINMUX_GPLMUX32_t;
20879 #define ALT_SYSMGR_PINMUX_GPLMUX32_OFST 0x254
20914 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_LSB 0
20916 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_MSB 0
20918 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_WIDTH 1
20920 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_SET_MSK 0x00000001
20922 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_CLR_MSK 0xfffffffe
20924 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_RESET 0x0
20926 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_GET(value) (((value) & 0x00000001) >> 0)
20928 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_SET(value) (((value) << 0) & 0x00000001)
20930 #ifndef __ASSEMBLY__
20941 struct ALT_SYSMGR_PINMUX_GPLMUX33_s
20948 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX33_s ALT_SYSMGR_PINMUX_GPLMUX33_t;
20952 #define ALT_SYSMGR_PINMUX_GPLMUX33_OFST 0x258
20987 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_LSB 0
20989 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_MSB 0
20991 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_WIDTH 1
20993 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_SET_MSK 0x00000001
20995 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_CLR_MSK 0xfffffffe
20997 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_RESET 0x0
20999 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_GET(value) (((value) & 0x00000001) >> 0)
21001 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_SET(value) (((value) << 0) & 0x00000001)
21003 #ifndef __ASSEMBLY__
21014 struct ALT_SYSMGR_PINMUX_GPLMUX34_s
21021 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX34_s ALT_SYSMGR_PINMUX_GPLMUX34_t;
21025 #define ALT_SYSMGR_PINMUX_GPLMUX34_OFST 0x25c
21060 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_LSB 0
21062 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_MSB 0
21064 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_WIDTH 1
21066 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_SET_MSK 0x00000001
21068 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_CLR_MSK 0xfffffffe
21070 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_RESET 0x0
21072 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_GET(value) (((value) & 0x00000001) >> 0)
21074 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_SET(value) (((value) << 0) & 0x00000001)
21076 #ifndef __ASSEMBLY__
21087 struct ALT_SYSMGR_PINMUX_GPLMUX35_s
21094 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX35_s ALT_SYSMGR_PINMUX_GPLMUX35_t;
21098 #define ALT_SYSMGR_PINMUX_GPLMUX35_OFST 0x260
21133 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_LSB 0
21135 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_MSB 0
21137 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_WIDTH 1
21139 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_SET_MSK 0x00000001
21141 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_CLR_MSK 0xfffffffe
21143 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_RESET 0x0
21145 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_GET(value) (((value) & 0x00000001) >> 0)
21147 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_SET(value) (((value) << 0) & 0x00000001)
21149 #ifndef __ASSEMBLY__
21160 struct ALT_SYSMGR_PINMUX_GPLMUX36_s
21167 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX36_s ALT_SYSMGR_PINMUX_GPLMUX36_t;
21171 #define ALT_SYSMGR_PINMUX_GPLMUX36_OFST 0x264
21206 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_LSB 0
21208 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_MSB 0
21210 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_WIDTH 1
21212 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_SET_MSK 0x00000001
21214 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_CLR_MSK 0xfffffffe
21216 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_RESET 0x0
21218 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_GET(value) (((value) & 0x00000001) >> 0)
21220 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_SET(value) (((value) << 0) & 0x00000001)
21222 #ifndef __ASSEMBLY__
21233 struct ALT_SYSMGR_PINMUX_GPLMUX37_s
21240 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX37_s ALT_SYSMGR_PINMUX_GPLMUX37_t;
21244 #define ALT_SYSMGR_PINMUX_GPLMUX37_OFST 0x268
21279 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_LSB 0
21281 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_MSB 0
21283 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_WIDTH 1
21285 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_SET_MSK 0x00000001
21287 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_CLR_MSK 0xfffffffe
21289 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_RESET 0x0
21291 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_GET(value) (((value) & 0x00000001) >> 0)
21293 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_SET(value) (((value) << 0) & 0x00000001)
21295 #ifndef __ASSEMBLY__
21306 struct ALT_SYSMGR_PINMUX_GPLMUX38_s
21313 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX38_s ALT_SYSMGR_PINMUX_GPLMUX38_t;
21317 #define ALT_SYSMGR_PINMUX_GPLMUX38_OFST 0x26c
21352 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_LSB 0
21354 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_MSB 0
21356 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_WIDTH 1
21358 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_SET_MSK 0x00000001
21360 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_CLR_MSK 0xfffffffe
21362 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_RESET 0x0
21364 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_GET(value) (((value) & 0x00000001) >> 0)
21366 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_SET(value) (((value) << 0) & 0x00000001)
21368 #ifndef __ASSEMBLY__
21379 struct ALT_SYSMGR_PINMUX_GPLMUX39_s
21386 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX39_s ALT_SYSMGR_PINMUX_GPLMUX39_t;
21390 #define ALT_SYSMGR_PINMUX_GPLMUX39_OFST 0x270
21425 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_LSB 0
21427 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_MSB 0
21429 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_WIDTH 1
21431 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_SET_MSK 0x00000001
21433 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_CLR_MSK 0xfffffffe
21435 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_RESET 0x0
21437 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_GET(value) (((value) & 0x00000001) >> 0)
21439 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_SET(value) (((value) << 0) & 0x00000001)
21441 #ifndef __ASSEMBLY__
21452 struct ALT_SYSMGR_PINMUX_GPLMUX40_s
21459 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX40_s ALT_SYSMGR_PINMUX_GPLMUX40_t;
21463 #define ALT_SYSMGR_PINMUX_GPLMUX40_OFST 0x274
21498 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_LSB 0
21500 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_MSB 0
21502 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_WIDTH 1
21504 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_SET_MSK 0x00000001
21506 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_CLR_MSK 0xfffffffe
21508 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_RESET 0x0
21510 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_GET(value) (((value) & 0x00000001) >> 0)
21512 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_SET(value) (((value) << 0) & 0x00000001)
21514 #ifndef __ASSEMBLY__
21525 struct ALT_SYSMGR_PINMUX_GPLMUX41_s
21532 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX41_s ALT_SYSMGR_PINMUX_GPLMUX41_t;
21536 #define ALT_SYSMGR_PINMUX_GPLMUX41_OFST 0x278
21571 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_LSB 0
21573 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_MSB 0
21575 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_WIDTH 1
21577 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_SET_MSK 0x00000001
21579 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_CLR_MSK 0xfffffffe
21581 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_RESET 0x0
21583 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_GET(value) (((value) & 0x00000001) >> 0)
21585 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_SET(value) (((value) << 0) & 0x00000001)
21587 #ifndef __ASSEMBLY__
21598 struct ALT_SYSMGR_PINMUX_GPLMUX42_s
21605 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX42_s ALT_SYSMGR_PINMUX_GPLMUX42_t;
21609 #define ALT_SYSMGR_PINMUX_GPLMUX42_OFST 0x27c
21644 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_LSB 0
21646 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_MSB 0
21648 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_WIDTH 1
21650 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_SET_MSK 0x00000001
21652 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_CLR_MSK 0xfffffffe
21654 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_RESET 0x0
21656 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_GET(value) (((value) & 0x00000001) >> 0)
21658 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_SET(value) (((value) << 0) & 0x00000001)
21660 #ifndef __ASSEMBLY__
21671 struct ALT_SYSMGR_PINMUX_GPLMUX43_s
21678 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX43_s ALT_SYSMGR_PINMUX_GPLMUX43_t;
21682 #define ALT_SYSMGR_PINMUX_GPLMUX43_OFST 0x280
21717 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_LSB 0
21719 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_MSB 0
21721 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_WIDTH 1
21723 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_SET_MSK 0x00000001
21725 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_CLR_MSK 0xfffffffe
21727 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_RESET 0x0
21729 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_GET(value) (((value) & 0x00000001) >> 0)
21731 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_SET(value) (((value) << 0) & 0x00000001)
21733 #ifndef __ASSEMBLY__
21744 struct ALT_SYSMGR_PINMUX_GPLMUX44_s
21751 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX44_s ALT_SYSMGR_PINMUX_GPLMUX44_t;
21755 #define ALT_SYSMGR_PINMUX_GPLMUX44_OFST 0x284
21790 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_LSB 0
21792 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_MSB 0
21794 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_WIDTH 1
21796 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_SET_MSK 0x00000001
21798 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_CLR_MSK 0xfffffffe
21800 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_RESET 0x0
21802 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_GET(value) (((value) & 0x00000001) >> 0)
21804 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_SET(value) (((value) << 0) & 0x00000001)
21806 #ifndef __ASSEMBLY__
21817 struct ALT_SYSMGR_PINMUX_GPLMUX45_s
21824 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX45_s ALT_SYSMGR_PINMUX_GPLMUX45_t;
21828 #define ALT_SYSMGR_PINMUX_GPLMUX45_OFST 0x288
21863 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_LSB 0
21865 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_MSB 0
21867 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_WIDTH 1
21869 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_SET_MSK 0x00000001
21871 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_CLR_MSK 0xfffffffe
21873 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_RESET 0x0
21875 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_GET(value) (((value) & 0x00000001) >> 0)
21877 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_SET(value) (((value) << 0) & 0x00000001)
21879 #ifndef __ASSEMBLY__
21890 struct ALT_SYSMGR_PINMUX_GPLMUX46_s
21897 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX46_s ALT_SYSMGR_PINMUX_GPLMUX46_t;
21901 #define ALT_SYSMGR_PINMUX_GPLMUX46_OFST 0x28c
21936 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_LSB 0
21938 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_MSB 0
21940 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_WIDTH 1
21942 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_SET_MSK 0x00000001
21944 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_CLR_MSK 0xfffffffe
21946 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_RESET 0x0
21948 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_GET(value) (((value) & 0x00000001) >> 0)
21950 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_SET(value) (((value) << 0) & 0x00000001)
21952 #ifndef __ASSEMBLY__
21963 struct ALT_SYSMGR_PINMUX_GPLMUX47_s
21970 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX47_s ALT_SYSMGR_PINMUX_GPLMUX47_t;
21974 #define ALT_SYSMGR_PINMUX_GPLMUX47_OFST 0x290
22009 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_LSB 0
22011 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_MSB 0
22013 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_WIDTH 1
22015 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_SET_MSK 0x00000001
22017 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_CLR_MSK 0xfffffffe
22019 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_RESET 0x0
22021 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_GET(value) (((value) & 0x00000001) >> 0)
22023 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_SET(value) (((value) << 0) & 0x00000001)
22025 #ifndef __ASSEMBLY__
22036 struct ALT_SYSMGR_PINMUX_GPLMUX48_s
22043 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX48_s ALT_SYSMGR_PINMUX_GPLMUX48_t;
22047 #define ALT_SYSMGR_PINMUX_GPLMUX48_OFST 0x294
22082 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_LSB 0
22084 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_MSB 0
22086 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_WIDTH 1
22088 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_SET_MSK 0x00000001
22090 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_CLR_MSK 0xfffffffe
22092 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_RESET 0x0
22094 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_GET(value) (((value) & 0x00000001) >> 0)
22096 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_SET(value) (((value) << 0) & 0x00000001)
22098 #ifndef __ASSEMBLY__
22109 struct ALT_SYSMGR_PINMUX_GPLMUX49_s
22116 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX49_s ALT_SYSMGR_PINMUX_GPLMUX49_t;
22120 #define ALT_SYSMGR_PINMUX_GPLMUX49_OFST 0x298
22155 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_LSB 0
22157 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_MSB 0
22159 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_WIDTH 1
22161 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_SET_MSK 0x00000001
22163 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_CLR_MSK 0xfffffffe
22165 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_RESET 0x0
22167 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_GET(value) (((value) & 0x00000001) >> 0)
22169 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_SET(value) (((value) << 0) & 0x00000001)
22171 #ifndef __ASSEMBLY__
22182 struct ALT_SYSMGR_PINMUX_GPLMUX50_s
22189 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX50_s ALT_SYSMGR_PINMUX_GPLMUX50_t;
22193 #define ALT_SYSMGR_PINMUX_GPLMUX50_OFST 0x29c
22228 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_LSB 0
22230 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_MSB 0
22232 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_WIDTH 1
22234 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_SET_MSK 0x00000001
22236 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_CLR_MSK 0xfffffffe
22238 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_RESET 0x0
22240 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_GET(value) (((value) & 0x00000001) >> 0)
22242 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_SET(value) (((value) << 0) & 0x00000001)
22244 #ifndef __ASSEMBLY__
22255 struct ALT_SYSMGR_PINMUX_GPLMUX51_s
22262 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX51_s ALT_SYSMGR_PINMUX_GPLMUX51_t;
22266 #define ALT_SYSMGR_PINMUX_GPLMUX51_OFST 0x2a0
22301 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_LSB 0
22303 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_MSB 0
22305 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_WIDTH 1
22307 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_SET_MSK 0x00000001
22309 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_CLR_MSK 0xfffffffe
22311 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_RESET 0x0
22313 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_GET(value) (((value) & 0x00000001) >> 0)
22315 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_SET(value) (((value) << 0) & 0x00000001)
22317 #ifndef __ASSEMBLY__
22328 struct ALT_SYSMGR_PINMUX_GPLMUX52_s
22335 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX52_s ALT_SYSMGR_PINMUX_GPLMUX52_t;
22339 #define ALT_SYSMGR_PINMUX_GPLMUX52_OFST 0x2a4
22374 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_LSB 0
22376 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_MSB 0
22378 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_WIDTH 1
22380 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_SET_MSK 0x00000001
22382 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_CLR_MSK 0xfffffffe
22384 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_RESET 0x0
22386 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_GET(value) (((value) & 0x00000001) >> 0)
22388 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_SET(value) (((value) << 0) & 0x00000001)
22390 #ifndef __ASSEMBLY__
22401 struct ALT_SYSMGR_PINMUX_GPLMUX53_s
22408 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX53_s ALT_SYSMGR_PINMUX_GPLMUX53_t;
22412 #define ALT_SYSMGR_PINMUX_GPLMUX53_OFST 0x2a8
22447 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_LSB 0
22449 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_MSB 0
22451 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_WIDTH 1
22453 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_SET_MSK 0x00000001
22455 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_CLR_MSK 0xfffffffe
22457 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_RESET 0x0
22459 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_GET(value) (((value) & 0x00000001) >> 0)
22461 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_SET(value) (((value) << 0) & 0x00000001)
22463 #ifndef __ASSEMBLY__
22474 struct ALT_SYSMGR_PINMUX_GPLMUX54_s
22481 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX54_s ALT_SYSMGR_PINMUX_GPLMUX54_t;
22485 #define ALT_SYSMGR_PINMUX_GPLMUX54_OFST 0x2ac
22520 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_LSB 0
22522 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_MSB 0
22524 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_WIDTH 1
22526 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_SET_MSK 0x00000001
22528 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_CLR_MSK 0xfffffffe
22530 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_RESET 0x0
22532 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_GET(value) (((value) & 0x00000001) >> 0)
22534 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_SET(value) (((value) << 0) & 0x00000001)
22536 #ifndef __ASSEMBLY__
22547 struct ALT_SYSMGR_PINMUX_GPLMUX55_s
22554 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX55_s ALT_SYSMGR_PINMUX_GPLMUX55_t;
22558 #define ALT_SYSMGR_PINMUX_GPLMUX55_OFST 0x2b0
22593 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_LSB 0
22595 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_MSB 0
22597 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_WIDTH 1
22599 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_SET_MSK 0x00000001
22601 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_CLR_MSK 0xfffffffe
22603 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_RESET 0x0
22605 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_GET(value) (((value) & 0x00000001) >> 0)
22607 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_SET(value) (((value) << 0) & 0x00000001)
22609 #ifndef __ASSEMBLY__
22620 struct ALT_SYSMGR_PINMUX_GPLMUX56_s
22627 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX56_s ALT_SYSMGR_PINMUX_GPLMUX56_t;
22631 #define ALT_SYSMGR_PINMUX_GPLMUX56_OFST 0x2b4
22666 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_LSB 0
22668 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_MSB 0
22670 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_WIDTH 1
22672 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_SET_MSK 0x00000001
22674 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_CLR_MSK 0xfffffffe
22676 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_RESET 0x0
22678 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_GET(value) (((value) & 0x00000001) >> 0)
22680 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_SET(value) (((value) << 0) & 0x00000001)
22682 #ifndef __ASSEMBLY__
22693 struct ALT_SYSMGR_PINMUX_GPLMUX57_s
22700 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX57_s ALT_SYSMGR_PINMUX_GPLMUX57_t;
22704 #define ALT_SYSMGR_PINMUX_GPLMUX57_OFST 0x2b8
22739 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_LSB 0
22741 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_MSB 0
22743 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_WIDTH 1
22745 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_SET_MSK 0x00000001
22747 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_CLR_MSK 0xfffffffe
22749 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_RESET 0x0
22751 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_GET(value) (((value) & 0x00000001) >> 0)
22753 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_SET(value) (((value) << 0) & 0x00000001)
22755 #ifndef __ASSEMBLY__
22766 struct ALT_SYSMGR_PINMUX_GPLMUX58_s
22773 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX58_s ALT_SYSMGR_PINMUX_GPLMUX58_t;
22777 #define ALT_SYSMGR_PINMUX_GPLMUX58_OFST 0x2bc
22812 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_LSB 0
22814 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_MSB 0
22816 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_WIDTH 1
22818 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_SET_MSK 0x00000001
22820 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_CLR_MSK 0xfffffffe
22822 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_RESET 0x0
22824 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_GET(value) (((value) & 0x00000001) >> 0)
22826 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_SET(value) (((value) << 0) & 0x00000001)
22828 #ifndef __ASSEMBLY__
22839 struct ALT_SYSMGR_PINMUX_GPLMUX59_s
22846 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX59_s ALT_SYSMGR_PINMUX_GPLMUX59_t;
22850 #define ALT_SYSMGR_PINMUX_GPLMUX59_OFST 0x2c0
22885 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_LSB 0
22887 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_MSB 0
22889 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_WIDTH 1
22891 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_SET_MSK 0x00000001
22893 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_CLR_MSK 0xfffffffe
22895 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_RESET 0x0
22897 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_GET(value) (((value) & 0x00000001) >> 0)
22899 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_SET(value) (((value) << 0) & 0x00000001)
22901 #ifndef __ASSEMBLY__
22912 struct ALT_SYSMGR_PINMUX_GPLMUX60_s
22919 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX60_s ALT_SYSMGR_PINMUX_GPLMUX60_t;
22923 #define ALT_SYSMGR_PINMUX_GPLMUX60_OFST 0x2c4
22958 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_LSB 0
22960 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_MSB 0
22962 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_WIDTH 1
22964 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_SET_MSK 0x00000001
22966 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_CLR_MSK 0xfffffffe
22968 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_RESET 0x0
22970 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_GET(value) (((value) & 0x00000001) >> 0)
22972 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_SET(value) (((value) << 0) & 0x00000001)
22974 #ifndef __ASSEMBLY__
22985 struct ALT_SYSMGR_PINMUX_GPLMUX61_s
22992 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX61_s ALT_SYSMGR_PINMUX_GPLMUX61_t;
22996 #define ALT_SYSMGR_PINMUX_GPLMUX61_OFST 0x2c8
23031 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_LSB 0
23033 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_MSB 0
23035 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_WIDTH 1
23037 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_SET_MSK 0x00000001
23039 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_CLR_MSK 0xfffffffe
23041 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_RESET 0x0
23043 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_GET(value) (((value) & 0x00000001) >> 0)
23045 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_SET(value) (((value) << 0) & 0x00000001)
23047 #ifndef __ASSEMBLY__
23058 struct ALT_SYSMGR_PINMUX_GPLMUX62_s
23065 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX62_s ALT_SYSMGR_PINMUX_GPLMUX62_t;
23069 #define ALT_SYSMGR_PINMUX_GPLMUX62_OFST 0x2cc
23104 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_LSB 0
23106 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_MSB 0
23108 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_WIDTH 1
23110 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_SET_MSK 0x00000001
23112 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_CLR_MSK 0xfffffffe
23114 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_RESET 0x0
23116 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_GET(value) (((value) & 0x00000001) >> 0)
23118 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_SET(value) (((value) << 0) & 0x00000001)
23120 #ifndef __ASSEMBLY__
23131 struct ALT_SYSMGR_PINMUX_GPLMUX63_s
23138 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX63_s ALT_SYSMGR_PINMUX_GPLMUX63_t;
23142 #define ALT_SYSMGR_PINMUX_GPLMUX63_OFST 0x2d0
23177 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_LSB 0
23179 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_MSB 0
23181 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_WIDTH 1
23183 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_SET_MSK 0x00000001
23185 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_CLR_MSK 0xfffffffe
23187 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_RESET 0x0
23189 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_GET(value) (((value) & 0x00000001) >> 0)
23191 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_SET(value) (((value) << 0) & 0x00000001)
23193 #ifndef __ASSEMBLY__
23204 struct ALT_SYSMGR_PINMUX_GPLMUX64_s
23211 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX64_s ALT_SYSMGR_PINMUX_GPLMUX64_t;
23215 #define ALT_SYSMGR_PINMUX_GPLMUX64_OFST 0x2d4
23250 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_LSB 0
23252 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_MSB 0
23254 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_WIDTH 1
23256 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_SET_MSK 0x00000001
23258 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_CLR_MSK 0xfffffffe
23260 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_RESET 0x0
23262 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_GET(value) (((value) & 0x00000001) >> 0)
23264 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_SET(value) (((value) << 0) & 0x00000001)
23266 #ifndef __ASSEMBLY__
23277 struct ALT_SYSMGR_PINMUX_GPLMUX65_s
23284 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX65_s ALT_SYSMGR_PINMUX_GPLMUX65_t;
23288 #define ALT_SYSMGR_PINMUX_GPLMUX65_OFST 0x2d8
23323 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_LSB 0
23325 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_MSB 0
23327 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_WIDTH 1
23329 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_SET_MSK 0x00000001
23331 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_CLR_MSK 0xfffffffe
23333 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_RESET 0x0
23335 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_GET(value) (((value) & 0x00000001) >> 0)
23337 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_SET(value) (((value) << 0) & 0x00000001)
23339 #ifndef __ASSEMBLY__
23350 struct ALT_SYSMGR_PINMUX_GPLMUX66_s
23357 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX66_s ALT_SYSMGR_PINMUX_GPLMUX66_t;
23361 #define ALT_SYSMGR_PINMUX_GPLMUX66_OFST 0x2dc
23396 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_LSB 0
23398 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_MSB 0
23400 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_WIDTH 1
23402 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_SET_MSK 0x00000001
23404 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_CLR_MSK 0xfffffffe
23406 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_RESET 0x0
23408 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_GET(value) (((value) & 0x00000001) >> 0)
23410 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_SET(value) (((value) << 0) & 0x00000001)
23412 #ifndef __ASSEMBLY__
23423 struct ALT_SYSMGR_PINMUX_GPLMUX67_s
23430 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX67_s ALT_SYSMGR_PINMUX_GPLMUX67_t;
23434 #define ALT_SYSMGR_PINMUX_GPLMUX67_OFST 0x2e0
23469 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_LSB 0
23471 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_MSB 0
23473 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_WIDTH 1
23475 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_SET_MSK 0x00000001
23477 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_CLR_MSK 0xfffffffe
23479 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_RESET 0x0
23481 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_GET(value) (((value) & 0x00000001) >> 0)
23483 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_SET(value) (((value) << 0) & 0x00000001)
23485 #ifndef __ASSEMBLY__
23496 struct ALT_SYSMGR_PINMUX_GPLMUX68_s
23503 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX68_s ALT_SYSMGR_PINMUX_GPLMUX68_t;
23507 #define ALT_SYSMGR_PINMUX_GPLMUX68_OFST 0x2e4
23542 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_LSB 0
23544 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_MSB 0
23546 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_WIDTH 1
23548 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_SET_MSK 0x00000001
23550 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_CLR_MSK 0xfffffffe
23552 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_RESET 0x0
23554 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_GET(value) (((value) & 0x00000001) >> 0)
23556 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_SET(value) (((value) << 0) & 0x00000001)
23558 #ifndef __ASSEMBLY__
23569 struct ALT_SYSMGR_PINMUX_GPLMUX69_s
23576 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX69_s ALT_SYSMGR_PINMUX_GPLMUX69_t;
23580 #define ALT_SYSMGR_PINMUX_GPLMUX69_OFST 0x2e8
23615 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_LSB 0
23617 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_MSB 0
23619 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_WIDTH 1
23621 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_SET_MSK 0x00000001
23623 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_CLR_MSK 0xfffffffe
23625 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_RESET 0x0
23627 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_GET(value) (((value) & 0x00000001) >> 0)
23629 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_SET(value) (((value) << 0) & 0x00000001)
23631 #ifndef __ASSEMBLY__
23642 struct ALT_SYSMGR_PINMUX_GPLMUX70_s
23649 typedef volatile struct ALT_SYSMGR_PINMUX_GPLMUX70_s ALT_SYSMGR_PINMUX_GPLMUX70_t;
23653 #define ALT_SYSMGR_PINMUX_GPLMUX70_OFST 0x2ec
23686 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_LSB 0
23688 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_MSB 0
23690 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_WIDTH 1
23692 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_SET_MSK 0x00000001
23694 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_CLR_MSK 0xfffffffe
23696 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_RESET 0x0
23698 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0)
23700 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001)
23702 #ifndef __ASSEMBLY__
23713 struct ALT_SYSMGR_PINMUX_NANDUSEFPGA_s
23720 typedef volatile struct ALT_SYSMGR_PINMUX_NANDUSEFPGA_s ALT_SYSMGR_PINMUX_NANDUSEFPGA_t;
23724 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_OFST 0x2f0
23757 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_LSB 0
23759 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_MSB 0
23761 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_WIDTH 1
23763 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_SET_MSK 0x00000001
23765 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_CLR_MSK 0xfffffffe
23767 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_RESET 0x0
23769 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0)
23771 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001)
23773 #ifndef __ASSEMBLY__
23784 struct ALT_SYSMGR_PINMUX_RGMII1USEFPGA_s
23791 typedef volatile struct ALT_SYSMGR_PINMUX_RGMII1USEFPGA_s ALT_SYSMGR_PINMUX_RGMII1USEFPGA_t;
23795 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_OFST 0x2f8
23828 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_LSB 0
23830 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_MSB 0
23832 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_WIDTH 1
23834 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_SET_MSK 0x00000001
23836 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_CLR_MSK 0xfffffffe
23838 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_RESET 0x0
23840 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0)
23842 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001)
23844 #ifndef __ASSEMBLY__
23855 struct ALT_SYSMGR_PINMUX_I2C0USEFPGA_s
23862 typedef volatile struct ALT_SYSMGR_PINMUX_I2C0USEFPGA_s ALT_SYSMGR_PINMUX_I2C0USEFPGA_t;
23866 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_OFST 0x304
23899 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_LSB 0
23901 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_MSB 0
23903 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_WIDTH 1
23905 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_SET_MSK 0x00000001
23907 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_CLR_MSK 0xfffffffe
23909 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_RESET 0x0
23911 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0)
23913 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001)
23915 #ifndef __ASSEMBLY__
23926 struct ALT_SYSMGR_PINMUX_RGMII0USEFPGA_s
23933 typedef volatile struct ALT_SYSMGR_PINMUX_RGMII0USEFPGA_s ALT_SYSMGR_PINMUX_RGMII0USEFPGA_t;
23937 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_OFST 0x314
23970 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_LSB 0
23972 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_MSB 0
23974 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_WIDTH 1
23976 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_SET_MSK 0x00000001
23978 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_CLR_MSK 0xfffffffe
23980 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_RESET 0x0
23982 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0)
23984 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001)
23986 #ifndef __ASSEMBLY__
23997 struct ALT_SYSMGR_PINMUX_I2C3USEFPGA_s
24004 typedef volatile struct ALT_SYSMGR_PINMUX_I2C3USEFPGA_s ALT_SYSMGR_PINMUX_I2C3USEFPGA_t;
24008 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_OFST 0x324
24041 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_LSB 0
24043 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_MSB 0
24045 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_WIDTH 1
24047 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_SET_MSK 0x00000001
24049 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_CLR_MSK 0xfffffffe
24051 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_RESET 0x0
24053 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0)
24055 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001)
24057 #ifndef __ASSEMBLY__
24068 struct ALT_SYSMGR_PINMUX_I2C2USEFPGA_s
24075 typedef volatile struct ALT_SYSMGR_PINMUX_I2C2USEFPGA_s ALT_SYSMGR_PINMUX_I2C2USEFPGA_t;
24079 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_OFST 0x328
24112 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_LSB 0
24114 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_MSB 0
24116 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_WIDTH 1
24118 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_SET_MSK 0x00000001
24120 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_CLR_MSK 0xfffffffe
24122 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_RESET 0x0
24124 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0)
24126 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001)
24128 #ifndef __ASSEMBLY__
24139 struct ALT_SYSMGR_PINMUX_I2C1USEFPGA_s
24146 typedef volatile struct ALT_SYSMGR_PINMUX_I2C1USEFPGA_s ALT_SYSMGR_PINMUX_I2C1USEFPGA_t;
24150 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_OFST 0x32c
24183 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_LSB 0
24185 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_MSB 0
24187 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_WIDTH 1
24189 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_SET_MSK 0x00000001
24191 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_CLR_MSK 0xfffffffe
24193 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_RESET 0x0
24195 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0)
24197 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001)
24199 #ifndef __ASSEMBLY__
24210 struct ALT_SYSMGR_PINMUX_SPIM1USEFPGA_s
24217 typedef volatile struct ALT_SYSMGR_PINMUX_SPIM1USEFPGA_s ALT_SYSMGR_PINMUX_SPIM1USEFPGA_t;
24221 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_OFST 0x330
24254 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_LSB 0
24256 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_MSB 0
24258 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_WIDTH 1
24260 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_SET_MSK 0x00000001
24262 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_CLR_MSK 0xfffffffe
24264 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_RESET 0x0
24266 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0)
24268 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001)
24270 #ifndef __ASSEMBLY__
24281 struct ALT_SYSMGR_PINMUX_SPIM0USEFPGA_s
24288 typedef volatile struct ALT_SYSMGR_PINMUX_SPIM0USEFPGA_s ALT_SYSMGR_PINMUX_SPIM0USEFPGA_t;
24292 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_OFST 0x338
24294 #ifndef __ASSEMBLY__
24305 struct ALT_SYSMGR_PINMUX_s
24307 ALT_SYSMGR_PINMUX_EMACIO0_t EMACIO0;
24308 ALT_SYSMGR_PINMUX_EMACIO1_t EMACIO1;
24309 ALT_SYSMGR_PINMUX_EMACIO2_t EMACIO2;
24310 ALT_SYSMGR_PINMUX_EMACIO3_t EMACIO3;
24311 ALT_SYSMGR_PINMUX_EMACIO4_t EMACIO4;
24312 ALT_SYSMGR_PINMUX_EMACIO5_t EMACIO5;
24313 ALT_SYSMGR_PINMUX_EMACIO6_t EMACIO6;
24314 ALT_SYSMGR_PINMUX_EMACIO7_t EMACIO7;
24315 ALT_SYSMGR_PINMUX_EMACIO8_t EMACIO8;
24316 ALT_SYSMGR_PINMUX_EMACIO9_t EMACIO9;
24317 ALT_SYSMGR_PINMUX_EMACIO10_t EMACIO10;
24318 ALT_SYSMGR_PINMUX_EMACIO11_t EMACIO11;
24319 ALT_SYSMGR_PINMUX_EMACIO12_t EMACIO12;
24320 ALT_SYSMGR_PINMUX_EMACIO13_t EMACIO13;
24321 ALT_SYSMGR_PINMUX_EMACIO14_t EMACIO14;
24322 ALT_SYSMGR_PINMUX_EMACIO15_t EMACIO15;
24323 ALT_SYSMGR_PINMUX_EMACIO16_t EMACIO16;
24324 ALT_SYSMGR_PINMUX_EMACIO17_t EMACIO17;
24325 ALT_SYSMGR_PINMUX_EMACIO18_t EMACIO18;
24326 ALT_SYSMGR_PINMUX_EMACIO19_t EMACIO19;
24327 ALT_SYSMGR_PINMUX_FLSHIO0_t FLASHIO0;
24328 ALT_SYSMGR_PINMUX_FLSHIO1_t FLASHIO1;
24329 ALT_SYSMGR_PINMUX_FLSHIO2_t FLASHIO2;
24330 ALT_SYSMGR_PINMUX_FLSHIO3_t FLASHIO3;
24331 ALT_SYSMGR_PINMUX_FLSHIO4_t FLASHIO4;
24332 ALT_SYSMGR_PINMUX_FLSHIO5_t FLASHIO5;
24333 ALT_SYSMGR_PINMUX_FLSHIO6_t FLASHIO6;
24334 ALT_SYSMGR_PINMUX_FLSHIO7_t FLASHIO7;
24335 ALT_SYSMGR_PINMUX_FLSHIO8_t FLASHIO8;
24336 ALT_SYSMGR_PINMUX_FLSHIO9_t FLASHIO9;
24337 ALT_SYSMGR_PINMUX_FLSHIO10_t FLASHIO10;
24338 ALT_SYSMGR_PINMUX_FLSHIO11_t FLASHIO11;
24339 ALT_SYSMGR_PINMUX_GENERALIO0_t GENERALIO0;
24340 ALT_SYSMGR_PINMUX_GENERALIO1_t GENERALIO1;
24341 ALT_SYSMGR_PINMUX_GENERALIO2_t GENERALIO2;
24342 ALT_SYSMGR_PINMUX_GENERALIO3_t GENERALIO3;
24343 ALT_SYSMGR_PINMUX_GENERALIO4_t GENERALIO4;
24344 ALT_SYSMGR_PINMUX_GENERALIO5_t GENERALIO5;
24345 ALT_SYSMGR_PINMUX_GENERALIO6_t GENERALIO6;
24346 ALT_SYSMGR_PINMUX_GENERALIO7_t GENERALIO7;
24347 ALT_SYSMGR_PINMUX_GENERALIO8_t GENERALIO8;
24348 ALT_SYSMGR_PINMUX_GENERALIO9_t GENERALIO9;
24349 ALT_SYSMGR_PINMUX_GENERALIO10_t GENERALIO10;
24350 ALT_SYSMGR_PINMUX_GENERALIO11_t GENERALIO11;
24351 ALT_SYSMGR_PINMUX_GENERALIO12_t GENERALIO12;
24352 ALT_SYSMGR_PINMUX_GENERALIO13_t GENERALIO13;
24353 ALT_SYSMGR_PINMUX_GENERALIO14_t GENERALIO14;
24354 ALT_SYSMGR_PINMUX_GENERALIO15_t GENERALIO15;
24355 ALT_SYSMGR_PINMUX_GENERALIO16_t GENERALIO16;
24356 ALT_SYSMGR_PINMUX_GENERALIO17_t GENERALIO17;
24357 ALT_SYSMGR_PINMUX_GENERALIO18_t GENERALIO18;
24358 ALT_SYSMGR_PINMUX_GENERALIO19_t GENERALIO19;
24359 ALT_SYSMGR_PINMUX_GENERALIO20_t GENERALIO20;
24360 ALT_SYSMGR_PINMUX_GENERALIO21_t GENERALIO21;
24361 ALT_SYSMGR_PINMUX_GENERALIO22_t GENERALIO22;
24362 ALT_SYSMGR_PINMUX_GENERALIO23_t GENERALIO23;
24363 ALT_SYSMGR_PINMUX_GENERALIO24_t GENERALIO24;
24364 ALT_SYSMGR_PINMUX_GENERALIO25_t GENERALIO25;
24365 ALT_SYSMGR_PINMUX_GENERALIO26_t GENERALIO26;
24366 ALT_SYSMGR_PINMUX_GENERALIO27_t GENERALIO27;
24367 ALT_SYSMGR_PINMUX_GENERALIO28_t GENERALIO28;
24368 ALT_SYSMGR_PINMUX_GENERALIO29_t GENERALIO29;
24369 ALT_SYSMGR_PINMUX_GENERALIO30_t GENERALIO30;
24370 ALT_SYSMGR_PINMUX_GENERALIO31_t GENERALIO31;
24371 ALT_SYSMGR_PINMUX_MIXED1IO0_t MIXED1IO0;
24372 ALT_SYSMGR_PINMUX_MIXED1IO1_t MIXED1IO1;
24373 ALT_SYSMGR_PINMUX_MIXED1IO2_t MIXED1IO2;
24374 ALT_SYSMGR_PINMUX_MIXED1IO3_t MIXED1IO3;
24375 ALT_SYSMGR_PINMUX_MIXED1IO4_t MIXED1IO4;
24376 ALT_SYSMGR_PINMUX_MIXED1IO5_t MIXED1IO5;
24377 ALT_SYSMGR_PINMUX_MIXED1IO6_t MIXED1IO6;
24378 ALT_SYSMGR_PINMUX_MIXED1IO7_t MIXED1IO7;
24379 ALT_SYSMGR_PINMUX_MIXED1IO8_t MIXED1IO8;
24380 ALT_SYSMGR_PINMUX_MIXED1IO9_t MIXED1IO9;
24381 ALT_SYSMGR_PINMUX_MIXED1IO10_t MIXED1IO10;
24382 ALT_SYSMGR_PINMUX_MIXED1IO11_t MIXED1IO11;
24383 ALT_SYSMGR_PINMUX_MIXED1IO12_t MIXED1IO12;
24384 ALT_SYSMGR_PINMUX_MIXED1IO13_t MIXED1IO13;
24385 ALT_SYSMGR_PINMUX_MIXED1IO14_t MIXED1IO14;
24386 ALT_SYSMGR_PINMUX_MIXED1IO15_t MIXED1IO15;
24387 ALT_SYSMGR_PINMUX_MIXED1IO16_t MIXED1IO16;
24388 ALT_SYSMGR_PINMUX_MIXED1IO17_t MIXED1IO17;
24389 ALT_SYSMGR_PINMUX_MIXED1IO18_t MIXED1IO18;
24390 ALT_SYSMGR_PINMUX_MIXED1IO19_t MIXED1IO19;
24391 ALT_SYSMGR_PINMUX_MIXED1IO20_t MIXED1IO20;
24392 ALT_SYSMGR_PINMUX_MIXED1IO21_t MIXED1IO21;
24393 ALT_SYSMGR_PINMUX_MIXED2IO0_t MIXED2IO0;
24394 ALT_SYSMGR_PINMUX_MIXED2IO1_t MIXED2IO1;
24395 ALT_SYSMGR_PINMUX_MIXED2IO2_t MIXED2IO2;
24396 ALT_SYSMGR_PINMUX_MIXED2IO3_t MIXED2IO3;
24397 ALT_SYSMGR_PINMUX_MIXED2IO4_t MIXED2IO4;
24398 ALT_SYSMGR_PINMUX_MIXED2IO5_t MIXED2IO5;
24399 ALT_SYSMGR_PINMUX_MIXED2IO6_t MIXED2IO6;
24400 ALT_SYSMGR_PINMUX_MIXED2IO7_t MIXED2IO7;
24401 ALT_SYSMGR_PINMUX_GPLINMUX48_t GPLINMUX48;
24402 ALT_SYSMGR_PINMUX_GPLINMUX49_t GPLINMUX49;
24403 ALT_SYSMGR_PINMUX_GPLINMUX50_t GPLINMUX50;
24404 ALT_SYSMGR_PINMUX_GPLINMUX51_t GPLINMUX51;
24405 ALT_SYSMGR_PINMUX_GPLINMUX52_t GPLINMUX52;
24406 ALT_SYSMGR_PINMUX_GPLINMUX53_t GPLINMUX53;
24407 ALT_SYSMGR_PINMUX_GPLINMUX54_t GPLINMUX54;
24408 ALT_SYSMGR_PINMUX_GPLINMUX55_t GPLINMUX55;
24409 ALT_SYSMGR_PINMUX_GPLINMUX56_t GPLINMUX56;
24410 ALT_SYSMGR_PINMUX_GPLINMUX57_t GPLINMUX57;
24411 ALT_SYSMGR_PINMUX_GPLINMUX58_t GPLINMUX58;
24412 ALT_SYSMGR_PINMUX_GPLINMUX59_t GPLINMUX59;
24413 ALT_SYSMGR_PINMUX_GPLINMUX60_t GPLINMUX60;
24414 ALT_SYSMGR_PINMUX_GPLINMUX61_t GPLINMUX61;
24415 ALT_SYSMGR_PINMUX_GPLINMUX62_t GPLINMUX62;
24416 ALT_SYSMGR_PINMUX_GPLINMUX63_t GPLINMUX63;
24417 ALT_SYSMGR_PINMUX_GPLINMUX64_t GPLINMUX64;
24418 ALT_SYSMGR_PINMUX_GPLINMUX65_t GPLINMUX65;
24419 ALT_SYSMGR_PINMUX_GPLINMUX66_t GPLINMUX66;
24420 ALT_SYSMGR_PINMUX_GPLINMUX67_t GPLINMUX67;
24421 ALT_SYSMGR_PINMUX_GPLINMUX68_t GPLINMUX68;
24422 ALT_SYSMGR_PINMUX_GPLINMUX69_t GPLINMUX69;
24423 ALT_SYSMGR_PINMUX_GPLINMUX70_t GPLINMUX70;
24424 ALT_SYSMGR_PINMUX_GPLMUX0_t GPLMUX0;
24425 ALT_SYSMGR_PINMUX_GPLMUX1_t GPLMUX1;
24426 ALT_SYSMGR_PINMUX_GPLMUX2_t GPLMUX2;
24427 ALT_SYSMGR_PINMUX_GPLMUX3_t GPLMUX3;
24428 ALT_SYSMGR_PINMUX_GPLMUX4_t GPLMUX4;
24429 ALT_SYSMGR_PINMUX_GPLMUX5_t GPLMUX5;
24430 ALT_SYSMGR_PINMUX_GPLMUX6_t GPLMUX6;
24431 ALT_SYSMGR_PINMUX_GPLMUX7_t GPLMUX7;
24432 ALT_SYSMGR_PINMUX_GPLMUX8_t GPLMUX8;
24433 ALT_SYSMGR_PINMUX_GPLMUX9_t GPLMUX9;
24434 ALT_SYSMGR_PINMUX_GPLMUX10_t GPLMUX10;
24435 ALT_SYSMGR_PINMUX_GPLMUX11_t GPLMUX11;
24436 ALT_SYSMGR_PINMUX_GPLMUX12_t GPLMUX12;
24437 ALT_SYSMGR_PINMUX_GPLMUX13_t GPLMUX13;
24438 ALT_SYSMGR_PINMUX_GPLMUX14_t GPLMUX14;
24439 ALT_SYSMGR_PINMUX_GPLMUX15_t GPLMUX15;
24440 ALT_SYSMGR_PINMUX_GPLMUX16_t GPLMUX16;
24441 ALT_SYSMGR_PINMUX_GPLMUX17_t GPLMUX17;
24442 ALT_SYSMGR_PINMUX_GPLMUX18_t GPLMUX18;
24443 ALT_SYSMGR_PINMUX_GPLMUX19_t GPLMUX19;
24444 ALT_SYSMGR_PINMUX_GPLMUX20_t GPLMUX20;
24445 ALT_SYSMGR_PINMUX_GPLMUX21_t GPLMUX21;
24446 ALT_SYSMGR_PINMUX_GPLMUX22_t GPLMUX22;
24447 ALT_SYSMGR_PINMUX_GPLMUX23_t GPLMUX23;
24448 ALT_SYSMGR_PINMUX_GPLMUX24_t GPLMUX24;
24449 ALT_SYSMGR_PINMUX_GPLMUX25_t GPLMUX25;
24450 ALT_SYSMGR_PINMUX_GPLMUX26_t GPLMUX26;
24451 ALT_SYSMGR_PINMUX_GPLMUX27_t GPLMUX27;
24452 ALT_SYSMGR_PINMUX_GPLMUX28_t GPLMUX28;
24453 ALT_SYSMGR_PINMUX_GPLMUX29_t GPLMUX29;
24454 ALT_SYSMGR_PINMUX_GPLMUX30_t GPLMUX30;
24455 ALT_SYSMGR_PINMUX_GPLMUX31_t GPLMUX31;
24456 ALT_SYSMGR_PINMUX_GPLMUX32_t GPLMUX32;
24457 ALT_SYSMGR_PINMUX_GPLMUX33_t GPLMUX33;
24458 ALT_SYSMGR_PINMUX_GPLMUX34_t GPLMUX34;
24459 ALT_SYSMGR_PINMUX_GPLMUX35_t GPLMUX35;
24460 ALT_SYSMGR_PINMUX_GPLMUX36_t GPLMUX36;
24461 ALT_SYSMGR_PINMUX_GPLMUX37_t GPLMUX37;
24462 ALT_SYSMGR_PINMUX_GPLMUX38_t GPLMUX38;
24463 ALT_SYSMGR_PINMUX_GPLMUX39_t GPLMUX39;
24464 ALT_SYSMGR_PINMUX_GPLMUX40_t GPLMUX40;
24465 ALT_SYSMGR_PINMUX_GPLMUX41_t GPLMUX41;
24466 ALT_SYSMGR_PINMUX_GPLMUX42_t GPLMUX42;
24467 ALT_SYSMGR_PINMUX_GPLMUX43_t GPLMUX43;
24468 ALT_SYSMGR_PINMUX_GPLMUX44_t GPLMUX44;
24469 ALT_SYSMGR_PINMUX_GPLMUX45_t GPLMUX45;
24470 ALT_SYSMGR_PINMUX_GPLMUX46_t GPLMUX46;
24471 ALT_SYSMGR_PINMUX_GPLMUX47_t GPLMUX47;
24472 ALT_SYSMGR_PINMUX_GPLMUX48_t GPLMUX48;
24473 ALT_SYSMGR_PINMUX_GPLMUX49_t GPLMUX49;
24474 ALT_SYSMGR_PINMUX_GPLMUX50_t GPLMUX50;
24475 ALT_SYSMGR_PINMUX_GPLMUX51_t GPLMUX51;
24476 ALT_SYSMGR_PINMUX_GPLMUX52_t GPLMUX52;
24477 ALT_SYSMGR_PINMUX_GPLMUX53_t GPLMUX53;
24478 ALT_SYSMGR_PINMUX_GPLMUX54_t GPLMUX54;
24479 ALT_SYSMGR_PINMUX_GPLMUX55_t GPLMUX55;
24480 ALT_SYSMGR_PINMUX_GPLMUX56_t GPLMUX56;
24481 ALT_SYSMGR_PINMUX_GPLMUX57_t GPLMUX57;
24482 ALT_SYSMGR_PINMUX_GPLMUX58_t GPLMUX58;
24483 ALT_SYSMGR_PINMUX_GPLMUX59_t GPLMUX59;
24484 ALT_SYSMGR_PINMUX_GPLMUX60_t GPLMUX60;
24485 ALT_SYSMGR_PINMUX_GPLMUX61_t GPLMUX61;
24486 ALT_SYSMGR_PINMUX_GPLMUX62_t GPLMUX62;
24487 ALT_SYSMGR_PINMUX_GPLMUX63_t GPLMUX63;
24488 ALT_SYSMGR_PINMUX_GPLMUX64_t GPLMUX64;
24489 ALT_SYSMGR_PINMUX_GPLMUX65_t GPLMUX65;
24490 ALT_SYSMGR_PINMUX_GPLMUX66_t GPLMUX66;
24491 ALT_SYSMGR_PINMUX_GPLMUX67_t GPLMUX67;
24492 ALT_SYSMGR_PINMUX_GPLMUX68_t GPLMUX68;
24493 ALT_SYSMGR_PINMUX_GPLMUX69_t GPLMUX69;
24494 ALT_SYSMGR_PINMUX_GPLMUX70_t GPLMUX70;
24495 ALT_SYSMGR_PINMUX_NANDUSEFPGA_t NANDUSEFPGA;
24496 volatile uint32_t _pad_0x2f4_0x2f7;
24497 ALT_SYSMGR_PINMUX_RGMII1USEFPGA_t RGMII1USEFPGA;
24498 volatile uint32_t _pad_0x2fc_0x303[2];
24499 ALT_SYSMGR_PINMUX_I2C0USEFPGA_t I2C0USEFPGA;
24500 volatile uint32_t _pad_0x308_0x313[3];
24501 ALT_SYSMGR_PINMUX_RGMII0USEFPGA_t RGMII0USEFPGA;
24502 volatile uint32_t _pad_0x318_0x323[3];
24503 ALT_SYSMGR_PINMUX_I2C3USEFPGA_t I2C3USEFPGA;
24504 ALT_SYSMGR_PINMUX_I2C2USEFPGA_t I2C2USEFPGA;
24505 ALT_SYSMGR_PINMUX_I2C1USEFPGA_t I2C1USEFPGA;
24506 ALT_SYSMGR_PINMUX_SPIM1USEFPGA_t SPIM1USEFPGA;
24507 volatile uint32_t _pad_0x334_0x337;
24508 ALT_SYSMGR_PINMUX_SPIM0USEFPGA_t SPIM0USEFPGA;
24509 volatile uint32_t _pad_0x33c_0x400[49];
24513 typedef volatile struct ALT_SYSMGR_PINMUX_s ALT_SYSMGR_PINMUX_t;
24515 struct ALT_SYSMGR_PINMUX_raw_s
24517 volatile uint32_t EMACIO0;
24518 volatile uint32_t EMACIO1;
24519 volatile uint32_t EMACIO2;
24520 volatile uint32_t EMACIO3;
24521 volatile uint32_t EMACIO4;
24522 volatile uint32_t EMACIO5;
24523 volatile uint32_t EMACIO6;
24524 volatile uint32_t EMACIO7;
24525 volatile uint32_t EMACIO8;
24526 volatile uint32_t EMACIO9;
24527 volatile uint32_t EMACIO10;
24528 volatile uint32_t EMACIO11;
24529 volatile uint32_t EMACIO12;
24530 volatile uint32_t EMACIO13;
24531 volatile uint32_t EMACIO14;
24532 volatile uint32_t EMACIO15;
24533 volatile uint32_t EMACIO16;
24534 volatile uint32_t EMACIO17;
24535 volatile uint32_t EMACIO18;
24536 volatile uint32_t EMACIO19;
24537 volatile uint32_t FLASHIO0;
24538 volatile uint32_t FLASHIO1;
24539 volatile uint32_t FLASHIO2;
24540 volatile uint32_t FLASHIO3;
24541 volatile uint32_t FLASHIO4;
24542 volatile uint32_t FLASHIO5;
24543 volatile uint32_t FLASHIO6;
24544 volatile uint32_t FLASHIO7;
24545 volatile uint32_t FLASHIO8;
24546 volatile uint32_t FLASHIO9;
24547 volatile uint32_t FLASHIO10;
24548 volatile uint32_t FLASHIO11;
24549 volatile uint32_t GENERALIO0;
24550 volatile uint32_t GENERALIO1;
24551 volatile uint32_t GENERALIO2;
24552 volatile uint32_t GENERALIO3;
24553 volatile uint32_t GENERALIO4;
24554 volatile uint32_t GENERALIO5;
24555 volatile uint32_t GENERALIO6;
24556 volatile uint32_t GENERALIO7;
24557 volatile uint32_t GENERALIO8;
24558 volatile uint32_t GENERALIO9;
24559 volatile uint32_t GENERALIO10;
24560 volatile uint32_t GENERALIO11;
24561 volatile uint32_t GENERALIO12;
24562 volatile uint32_t GENERALIO13;
24563 volatile uint32_t GENERALIO14;
24564 volatile uint32_t GENERALIO15;
24565 volatile uint32_t GENERALIO16;
24566 volatile uint32_t GENERALIO17;
24567 volatile uint32_t GENERALIO18;
24568 volatile uint32_t GENERALIO19;
24569 volatile uint32_t GENERALIO20;
24570 volatile uint32_t GENERALIO21;
24571 volatile uint32_t GENERALIO22;
24572 volatile uint32_t GENERALIO23;
24573 volatile uint32_t GENERALIO24;
24574 volatile uint32_t GENERALIO25;
24575 volatile uint32_t GENERALIO26;
24576 volatile uint32_t GENERALIO27;
24577 volatile uint32_t GENERALIO28;
24578 volatile uint32_t GENERALIO29;
24579 volatile uint32_t GENERALIO30;
24580 volatile uint32_t GENERALIO31;
24581 volatile uint32_t MIXED1IO0;
24582 volatile uint32_t MIXED1IO1;
24583 volatile uint32_t MIXED1IO2;
24584 volatile uint32_t MIXED1IO3;
24585 volatile uint32_t MIXED1IO4;
24586 volatile uint32_t MIXED1IO5;
24587 volatile uint32_t MIXED1IO6;
24588 volatile uint32_t MIXED1IO7;
24589 volatile uint32_t MIXED1IO8;
24590 volatile uint32_t MIXED1IO9;
24591 volatile uint32_t MIXED1IO10;
24592 volatile uint32_t MIXED1IO11;
24593 volatile uint32_t MIXED1IO12;
24594 volatile uint32_t MIXED1IO13;
24595 volatile uint32_t MIXED1IO14;
24596 volatile uint32_t MIXED1IO15;
24597 volatile uint32_t MIXED1IO16;
24598 volatile uint32_t MIXED1IO17;
24599 volatile uint32_t MIXED1IO18;
24600 volatile uint32_t MIXED1IO19;
24601 volatile uint32_t MIXED1IO20;
24602 volatile uint32_t MIXED1IO21;
24603 volatile uint32_t MIXED2IO0;
24604 volatile uint32_t MIXED2IO1;
24605 volatile uint32_t MIXED2IO2;
24606 volatile uint32_t MIXED2IO3;
24607 volatile uint32_t MIXED2IO4;
24608 volatile uint32_t MIXED2IO5;
24609 volatile uint32_t MIXED2IO6;
24610 volatile uint32_t MIXED2IO7;
24611 volatile uint32_t GPLINMUX48;
24612 volatile uint32_t GPLINMUX49;
24613 volatile uint32_t GPLINMUX50;
24614 volatile uint32_t GPLINMUX51;
24615 volatile uint32_t GPLINMUX52;
24616 volatile uint32_t GPLINMUX53;
24617 volatile uint32_t GPLINMUX54;
24618 volatile uint32_t GPLINMUX55;
24619 volatile uint32_t GPLINMUX56;
24620 volatile uint32_t GPLINMUX57;
24621 volatile uint32_t GPLINMUX58;
24622 volatile uint32_t GPLINMUX59;
24623 volatile uint32_t GPLINMUX60;
24624 volatile uint32_t GPLINMUX61;
24625 volatile uint32_t GPLINMUX62;
24626 volatile uint32_t GPLINMUX63;
24627 volatile uint32_t GPLINMUX64;
24628 volatile uint32_t GPLINMUX65;
24629 volatile uint32_t GPLINMUX66;
24630 volatile uint32_t GPLINMUX67;
24631 volatile uint32_t GPLINMUX68;
24632 volatile uint32_t GPLINMUX69;
24633 volatile uint32_t GPLINMUX70;
24634 volatile uint32_t GPLMUX0;
24635 volatile uint32_t GPLMUX1;
24636 volatile uint32_t GPLMUX2;
24637 volatile uint32_t GPLMUX3;
24638 volatile uint32_t GPLMUX4;
24639 volatile uint32_t GPLMUX5;
24640 volatile uint32_t GPLMUX6;
24641 volatile uint32_t GPLMUX7;
24642 volatile uint32_t GPLMUX8;
24643 volatile uint32_t GPLMUX9;
24644 volatile uint32_t GPLMUX10;
24645 volatile uint32_t GPLMUX11;
24646 volatile uint32_t GPLMUX12;
24647 volatile uint32_t GPLMUX13;
24648 volatile uint32_t GPLMUX14;
24649 volatile uint32_t GPLMUX15;
24650 volatile uint32_t GPLMUX16;
24651 volatile uint32_t GPLMUX17;
24652 volatile uint32_t GPLMUX18;
24653 volatile uint32_t GPLMUX19;
24654 volatile uint32_t GPLMUX20;
24655 volatile uint32_t GPLMUX21;
24656 volatile uint32_t GPLMUX22;
24657 volatile uint32_t GPLMUX23;
24658 volatile uint32_t GPLMUX24;
24659 volatile uint32_t GPLMUX25;
24660 volatile uint32_t GPLMUX26;
24661 volatile uint32_t GPLMUX27;
24662 volatile uint32_t GPLMUX28;
24663 volatile uint32_t GPLMUX29;
24664 volatile uint32_t GPLMUX30;
24665 volatile uint32_t GPLMUX31;
24666 volatile uint32_t GPLMUX32;
24667 volatile uint32_t GPLMUX33;
24668 volatile uint32_t GPLMUX34;
24669 volatile uint32_t GPLMUX35;
24670 volatile uint32_t GPLMUX36;
24671 volatile uint32_t GPLMUX37;
24672 volatile uint32_t GPLMUX38;
24673 volatile uint32_t GPLMUX39;
24674 volatile uint32_t GPLMUX40;
24675 volatile uint32_t GPLMUX41;
24676 volatile uint32_t GPLMUX42;
24677 volatile uint32_t GPLMUX43;
24678 volatile uint32_t GPLMUX44;
24679 volatile uint32_t GPLMUX45;
24680 volatile uint32_t GPLMUX46;
24681 volatile uint32_t GPLMUX47;
24682 volatile uint32_t GPLMUX48;
24683 volatile uint32_t GPLMUX49;
24684 volatile uint32_t GPLMUX50;
24685 volatile uint32_t GPLMUX51;
24686 volatile uint32_t GPLMUX52;
24687 volatile uint32_t GPLMUX53;
24688 volatile uint32_t GPLMUX54;
24689 volatile uint32_t GPLMUX55;
24690 volatile uint32_t GPLMUX56;
24691 volatile uint32_t GPLMUX57;
24692 volatile uint32_t GPLMUX58;
24693 volatile uint32_t GPLMUX59;
24694 volatile uint32_t GPLMUX60;
24695 volatile uint32_t GPLMUX61;
24696 volatile uint32_t GPLMUX62;
24697 volatile uint32_t GPLMUX63;
24698 volatile uint32_t GPLMUX64;
24699 volatile uint32_t GPLMUX65;
24700 volatile uint32_t GPLMUX66;
24701 volatile uint32_t GPLMUX67;
24702 volatile uint32_t GPLMUX68;
24703 volatile uint32_t GPLMUX69;
24704 volatile uint32_t GPLMUX70;
24705 volatile uint32_t NANDUSEFPGA;
24706 uint32_t _pad_0x2f4_0x2f7;
24707 volatile uint32_t RGMII1USEFPGA;
24708 uint32_t _pad_0x2fc_0x303[2];
24709 volatile uint32_t I2C0USEFPGA;
24710 uint32_t _pad_0x308_0x313[3];
24711 volatile uint32_t RGMII0USEFPGA;
24712 uint32_t _pad_0x318_0x323[3];
24713 volatile uint32_t I2C3USEFPGA;
24714 volatile uint32_t I2C2USEFPGA;
24715 volatile uint32_t I2C1USEFPGA;
24716 volatile uint32_t SPIM1USEFPGA;
24717 uint32_t _pad_0x334_0x337;
24718 volatile uint32_t SPIM0USEFPGA;
24719 uint32_t _pad_0x33c_0x400[49];
24723 typedef volatile struct ALT_SYSMGR_PINMUX_raw_s ALT_SYSMGR_PINMUX_raw_t;
24727 #ifndef __ASSEMBLY__
24738 struct ALT_SYSMGR_s
24740 ALT_SYSMGR_SILICONID1_t siliconid1;
24741 ALT_SYSMGR_SILICONID2_t siliconid2;
24742 volatile uint32_t _pad_0x8_0xf[2];
24743 ALT_SYSMGR_WDDBG_t wddbg;
24744 ALT_SYSMGR_BOOT_t bootinfo;
24745 ALT_SYSMGR_HPSINFO_t hpsinfo;
24746 ALT_SYSMGR_PARITYINJ_t parityinj;
24747 ALT_SYSMGR_FPGAINTF_t fpgaintfgrp;
24748 ALT_SYSMGR_SCANMGR_t scanmgrgrp;
24749 volatile uint32_t _pad_0x34_0x3f[3];
24750 ALT_SYSMGR_FRZCTL_t frzctrl;
24751 ALT_SYSMGR_EMAC_t emacgrp;
24752 ALT_SYSMGR_DMA_t dmagrp;
24753 volatile uint32_t _pad_0x78_0x7f[2];
24754 ALT_SYSMGR_ISW_t iswgrp;
24755 volatile uint32_t _pad_0xa0_0xbf[8];
24756 ALT_SYSMGR_ROMCODE_t romcodegrp;
24757 ALT_SYSMGR_ROMHW_t romhwgrp;
24758 volatile uint32_t _pad_0x104_0x107;
24759 ALT_SYSMGR_SDMMC_t sdmmcgrp;
24760 ALT_SYSMGR_NAND_t nandgrp;
24761 ALT_SYSMGR_USB_t usbgrp;
24762 volatile uint32_t _pad_0x11c_0x13f[9];
24763 ALT_SYSMGR_ECC_t eccgrp;
24764 volatile uint32_t _pad_0x180_0x3ff[160];
24765 ALT_SYSMGR_PINMUX_t pinmuxgrp;
24766 volatile uint32_t _pad_0x800_0x4000[3584];
24770 typedef volatile struct ALT_SYSMGR_s ALT_SYSMGR_t;
24772 struct ALT_SYSMGR_raw_s
24774 volatile uint32_t siliconid1;
24775 volatile uint32_t siliconid2;
24776 uint32_t _pad_0x8_0xf[2];
24777 volatile uint32_t wddbg;
24778 volatile uint32_t bootinfo;
24779 volatile uint32_t hpsinfo;
24780 volatile uint32_t parityinj;
24781 ALT_SYSMGR_FPGAINTF_raw_t fpgaintfgrp;
24782 ALT_SYSMGR_SCANMGR_raw_t scanmgrgrp;
24783 uint32_t _pad_0x34_0x3f[3];
24784 ALT_SYSMGR_FRZCTL_raw_t frzctrl;
24785 ALT_SYSMGR_EMAC_raw_t emacgrp;
24786 ALT_SYSMGR_DMA_raw_t dmagrp;
24787 uint32_t _pad_0x78_0x7f[2];
24788 ALT_SYSMGR_ISW_raw_t iswgrp;
24789 uint32_t _pad_0xa0_0xbf[8];
24790 ALT_SYSMGR_ROMCODE_raw_t romcodegrp;
24791 ALT_SYSMGR_ROMHW_raw_t romhwgrp;
24792 uint32_t _pad_0x104_0x107;
24793 ALT_SYSMGR_SDMMC_raw_t sdmmcgrp;
24794 ALT_SYSMGR_NAND_raw_t nandgrp;
24795 ALT_SYSMGR_USB_raw_t usbgrp;
24796 uint32_t _pad_0x11c_0x13f[9];
24797 ALT_SYSMGR_ECC_raw_t eccgrp;
24798 uint32_t _pad_0x180_0x3ff[160];
24799 ALT_SYSMGR_PINMUX_raw_t pinmuxgrp;
24800 uint32_t _pad_0x800_0x4000[3584];
24804 typedef volatile struct ALT_SYSMGR_raw_s ALT_SYSMGR_raw_t;