35 #ifndef __ALT_SOCAL_TMR_H__
36 #define __ALT_SOCAL_TMR_H__
83 #define ALT_TMR_TIMER1LOADCOUNT_TIMER1LOADCOUNT_LSB 0
85 #define ALT_TMR_TIMER1LOADCOUNT_TIMER1LOADCOUNT_MSB 31
87 #define ALT_TMR_TIMER1LOADCOUNT_TIMER1LOADCOUNT_WIDTH 32
89 #define ALT_TMR_TIMER1LOADCOUNT_TIMER1LOADCOUNT_SET_MSK 0xffffffff
91 #define ALT_TMR_TIMER1LOADCOUNT_TIMER1LOADCOUNT_CLR_MSK 0x00000000
93 #define ALT_TMR_TIMER1LOADCOUNT_TIMER1LOADCOUNT_RESET 0x0
95 #define ALT_TMR_TIMER1LOADCOUNT_TIMER1LOADCOUNT_GET(value) (((value) & 0xffffffff) >> 0)
97 #define ALT_TMR_TIMER1LOADCOUNT_TIMER1LOADCOUNT_SET(value) (((value) << 0) & 0xffffffff)
111 struct ALT_TMR_TIMER1LOADCOUNT_s
113 volatile uint32_t TIMER1LOADCOUNT : 32;
117 typedef struct ALT_TMR_TIMER1LOADCOUNT_s ALT_TMR_TIMER1LOADCOUNT_t;
121 #define ALT_TMR_TIMER1LOADCOUNT_RESET 0x00000000
123 #define ALT_TMR_TIMER1LOADCOUNT_OFST 0x0
125 #define ALT_TMR_TIMER1LOADCOUNT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_TMR_TIMER1LOADCOUNT_OFST))
160 #define ALT_TMR_TIMER1CURRENTVAL_TIMER1CURRENTVAL_LSB 0
162 #define ALT_TMR_TIMER1CURRENTVAL_TIMER1CURRENTVAL_MSB 31
164 #define ALT_TMR_TIMER1CURRENTVAL_TIMER1CURRENTVAL_WIDTH 32
166 #define ALT_TMR_TIMER1CURRENTVAL_TIMER1CURRENTVAL_SET_MSK 0xffffffff
168 #define ALT_TMR_TIMER1CURRENTVAL_TIMER1CURRENTVAL_CLR_MSK 0x00000000
170 #define ALT_TMR_TIMER1CURRENTVAL_TIMER1CURRENTVAL_RESET 0x0
172 #define ALT_TMR_TIMER1CURRENTVAL_TIMER1CURRENTVAL_GET(value) (((value) & 0xffffffff) >> 0)
174 #define ALT_TMR_TIMER1CURRENTVAL_TIMER1CURRENTVAL_SET(value) (((value) << 0) & 0xffffffff)
188 struct ALT_TMR_TIMER1CURRENTVAL_s
190 const volatile uint32_t TIMER1CURRENTVAL : 32;
194 typedef struct ALT_TMR_TIMER1CURRENTVAL_s ALT_TMR_TIMER1CURRENTVAL_t;
198 #define ALT_TMR_TIMER1CURRENTVAL_RESET 0x00000000
200 #define ALT_TMR_TIMER1CURRENTVAL_OFST 0x4
202 #define ALT_TMR_TIMER1CURRENTVAL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_TMR_TIMER1CURRENTVAL_OFST))
257 #define ALT_TMR_TIMER1CONTROLREG_TIMER_ENABLE_E_DISABLE 0x0
263 #define ALT_TMR_TIMER1CONTROLREG_TIMER_ENABLE_E_ENABLED 0x1
266 #define ALT_TMR_TIMER1CONTROLREG_TIMER_ENABLE_LSB 0
268 #define ALT_TMR_TIMER1CONTROLREG_TIMER_ENABLE_MSB 0
270 #define ALT_TMR_TIMER1CONTROLREG_TIMER_ENABLE_WIDTH 1
272 #define ALT_TMR_TIMER1CONTROLREG_TIMER_ENABLE_SET_MSK 0x00000001
274 #define ALT_TMR_TIMER1CONTROLREG_TIMER_ENABLE_CLR_MSK 0xfffffffe
276 #define ALT_TMR_TIMER1CONTROLREG_TIMER_ENABLE_RESET 0x0
278 #define ALT_TMR_TIMER1CONTROLREG_TIMER_ENABLE_GET(value) (((value) & 0x00000001) >> 0)
280 #define ALT_TMR_TIMER1CONTROLREG_TIMER_ENABLE_SET(value) (((value) << 0) & 0x00000001)
310 #define ALT_TMR_TIMER1CONTROLREG_TIMER_MODE_E_FREE_RUNNING 0x0
316 #define ALT_TMR_TIMER1CONTROLREG_TIMER_MODE_E_USER_DEFINED 0x1
319 #define ALT_TMR_TIMER1CONTROLREG_TIMER_MODE_LSB 1
321 #define ALT_TMR_TIMER1CONTROLREG_TIMER_MODE_MSB 1
323 #define ALT_TMR_TIMER1CONTROLREG_TIMER_MODE_WIDTH 1
325 #define ALT_TMR_TIMER1CONTROLREG_TIMER_MODE_SET_MSK 0x00000002
327 #define ALT_TMR_TIMER1CONTROLREG_TIMER_MODE_CLR_MSK 0xfffffffd
329 #define ALT_TMR_TIMER1CONTROLREG_TIMER_MODE_RESET 0x0
331 #define ALT_TMR_TIMER1CONTROLREG_TIMER_MODE_GET(value) (((value) & 0x00000002) >> 1)
333 #define ALT_TMR_TIMER1CONTROLREG_TIMER_MODE_SET(value) (((value) << 1) & 0x00000002)
359 #define ALT_TMR_TIMER1CONTROLREG_TIMER_INTERRUPT_MASK_E_UNMASKED 0x0
365 #define ALT_TMR_TIMER1CONTROLREG_TIMER_INTERRUPT_MASK_E_MASKED 0x1
368 #define ALT_TMR_TIMER1CONTROLREG_TIMER_INTERRUPT_MASK_LSB 2
370 #define ALT_TMR_TIMER1CONTROLREG_TIMER_INTERRUPT_MASK_MSB 2
372 #define ALT_TMR_TIMER1CONTROLREG_TIMER_INTERRUPT_MASK_WIDTH 1
374 #define ALT_TMR_TIMER1CONTROLREG_TIMER_INTERRUPT_MASK_SET_MSK 0x00000004
376 #define ALT_TMR_TIMER1CONTROLREG_TIMER_INTERRUPT_MASK_CLR_MSK 0xfffffffb
378 #define ALT_TMR_TIMER1CONTROLREG_TIMER_INTERRUPT_MASK_RESET 0x0
380 #define ALT_TMR_TIMER1CONTROLREG_TIMER_INTERRUPT_MASK_GET(value) (((value) & 0x00000004) >> 2)
382 #define ALT_TMR_TIMER1CONTROLREG_TIMER_INTERRUPT_MASK_SET(value) (((value) << 2) & 0x00000004)
396 struct ALT_TMR_TIMER1CONTROLREG_s
398 volatile uint32_t TIMER_ENABLE : 1;
399 volatile uint32_t TIMER_MODE : 1;
400 volatile uint32_t TIMER_INTERRUPT_MASK : 1;
405 typedef struct ALT_TMR_TIMER1CONTROLREG_s ALT_TMR_TIMER1CONTROLREG_t;
409 #define ALT_TMR_TIMER1CONTROLREG_RESET 0x00000000
411 #define ALT_TMR_TIMER1CONTROLREG_OFST 0x8
413 #define ALT_TMR_TIMER1CONTROLREG_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_TMR_TIMER1CONTROLREG_OFST))
445 #define ALT_TMR_TIMER1EOI_TIMER1EOI_LSB 0
447 #define ALT_TMR_TIMER1EOI_TIMER1EOI_MSB 0
449 #define ALT_TMR_TIMER1EOI_TIMER1EOI_WIDTH 1
451 #define ALT_TMR_TIMER1EOI_TIMER1EOI_SET_MSK 0x00000001
453 #define ALT_TMR_TIMER1EOI_TIMER1EOI_CLR_MSK 0xfffffffe
455 #define ALT_TMR_TIMER1EOI_TIMER1EOI_RESET 0x0
457 #define ALT_TMR_TIMER1EOI_TIMER1EOI_GET(value) (((value) & 0x00000001) >> 0)
459 #define ALT_TMR_TIMER1EOI_TIMER1EOI_SET(value) (((value) << 0) & 0x00000001)
473 struct ALT_TMR_TIMER1EOI_s
475 const volatile uint32_t TIMER1EOI : 1;
480 typedef struct ALT_TMR_TIMER1EOI_s ALT_TMR_TIMER1EOI_t;
484 #define ALT_TMR_TIMER1EOI_RESET 0x00000000
486 #define ALT_TMR_TIMER1EOI_OFST 0xc
488 #define ALT_TMR_TIMER1EOI_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_TMR_TIMER1EOI_OFST))
529 #define ALT_TMR_TIMER1INTSTAT_TIMER1INTSTAT_E_INACTIVE 0x0
535 #define ALT_TMR_TIMER1INTSTAT_TIMER1INTSTAT_E_ACTIVE 0x1
538 #define ALT_TMR_TIMER1INTSTAT_TIMER1INTSTAT_LSB 0
540 #define ALT_TMR_TIMER1INTSTAT_TIMER1INTSTAT_MSB 0
542 #define ALT_TMR_TIMER1INTSTAT_TIMER1INTSTAT_WIDTH 1
544 #define ALT_TMR_TIMER1INTSTAT_TIMER1INTSTAT_SET_MSK 0x00000001
546 #define ALT_TMR_TIMER1INTSTAT_TIMER1INTSTAT_CLR_MSK 0xfffffffe
548 #define ALT_TMR_TIMER1INTSTAT_TIMER1INTSTAT_RESET 0x0
550 #define ALT_TMR_TIMER1INTSTAT_TIMER1INTSTAT_GET(value) (((value) & 0x00000001) >> 0)
552 #define ALT_TMR_TIMER1INTSTAT_TIMER1INTSTAT_SET(value) (((value) << 0) & 0x00000001)
566 struct ALT_TMR_TIMER1INTSTAT_s
568 const volatile uint32_t TIMER1INTSTAT : 1;
573 typedef struct ALT_TMR_TIMER1INTSTAT_s ALT_TMR_TIMER1INTSTAT_t;
577 #define ALT_TMR_TIMER1INTSTAT_RESET 0x00000000
579 #define ALT_TMR_TIMER1INTSTAT_OFST 0x10
581 #define ALT_TMR_TIMER1INTSTAT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_TMR_TIMER1INTSTAT_OFST))
642 #define ALT_TMR_TIMERSINTSTAT_TIMERSINTSTAT_E_INACTIVE 0x0
648 #define ALT_TMR_TIMERSINTSTAT_TIMERSINTSTAT_E_ACTIVE 0x1
651 #define ALT_TMR_TIMERSINTSTAT_TIMERSINTSTAT_LSB 0
653 #define ALT_TMR_TIMERSINTSTAT_TIMERSINTSTAT_MSB 0
655 #define ALT_TMR_TIMERSINTSTAT_TIMERSINTSTAT_WIDTH 1
657 #define ALT_TMR_TIMERSINTSTAT_TIMERSINTSTAT_SET_MSK 0x00000001
659 #define ALT_TMR_TIMERSINTSTAT_TIMERSINTSTAT_CLR_MSK 0xfffffffe
661 #define ALT_TMR_TIMERSINTSTAT_TIMERSINTSTAT_RESET 0x0
663 #define ALT_TMR_TIMERSINTSTAT_TIMERSINTSTAT_GET(value) (((value) & 0x00000001) >> 0)
665 #define ALT_TMR_TIMERSINTSTAT_TIMERSINTSTAT_SET(value) (((value) << 0) & 0x00000001)
679 struct ALT_TMR_TIMERSINTSTAT_s
681 const volatile uint32_t TIMERSINTSTAT : 1;
686 typedef struct ALT_TMR_TIMERSINTSTAT_s ALT_TMR_TIMERSINTSTAT_t;
690 #define ALT_TMR_TIMERSINTSTAT_RESET 0x00000000
692 #define ALT_TMR_TIMERSINTSTAT_OFST 0xa0
694 #define ALT_TMR_TIMERSINTSTAT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_TMR_TIMERSINTSTAT_OFST))
726 #define ALT_TMR_TIMERSEOI_TIMERSEOI_LSB 0
728 #define ALT_TMR_TIMERSEOI_TIMERSEOI_MSB 0
730 #define ALT_TMR_TIMERSEOI_TIMERSEOI_WIDTH 1
732 #define ALT_TMR_TIMERSEOI_TIMERSEOI_SET_MSK 0x00000001
734 #define ALT_TMR_TIMERSEOI_TIMERSEOI_CLR_MSK 0xfffffffe
736 #define ALT_TMR_TIMERSEOI_TIMERSEOI_RESET 0x0
738 #define ALT_TMR_TIMERSEOI_TIMERSEOI_GET(value) (((value) & 0x00000001) >> 0)
740 #define ALT_TMR_TIMERSEOI_TIMERSEOI_SET(value) (((value) << 0) & 0x00000001)
754 struct ALT_TMR_TIMERSEOI_s
756 const volatile uint32_t TIMERSEOI : 1;
761 typedef struct ALT_TMR_TIMERSEOI_s ALT_TMR_TIMERSEOI_t;
765 #define ALT_TMR_TIMERSEOI_RESET 0x00000000
767 #define ALT_TMR_TIMERSEOI_OFST 0xa4
769 #define ALT_TMR_TIMERSEOI_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_TMR_TIMERSEOI_OFST))
816 #define ALT_TMR_TIMERSRAWINTSTAT_TIMERSRAWINTSTAT_E_INACTIVE 0x0
822 #define ALT_TMR_TIMERSRAWINTSTAT_TIMERSRAWINTSTAT_E_ACTIVE 0x1
825 #define ALT_TMR_TIMERSRAWINTSTAT_TIMERSRAWINTSTAT_LSB 0
827 #define ALT_TMR_TIMERSRAWINTSTAT_TIMERSRAWINTSTAT_MSB 0
829 #define ALT_TMR_TIMERSRAWINTSTAT_TIMERSRAWINTSTAT_WIDTH 1
831 #define ALT_TMR_TIMERSRAWINTSTAT_TIMERSRAWINTSTAT_SET_MSK 0x00000001
833 #define ALT_TMR_TIMERSRAWINTSTAT_TIMERSRAWINTSTAT_CLR_MSK 0xfffffffe
835 #define ALT_TMR_TIMERSRAWINTSTAT_TIMERSRAWINTSTAT_RESET 0x0
837 #define ALT_TMR_TIMERSRAWINTSTAT_TIMERSRAWINTSTAT_GET(value) (((value) & 0x00000001) >> 0)
839 #define ALT_TMR_TIMERSRAWINTSTAT_TIMERSRAWINTSTAT_SET(value) (((value) << 0) & 0x00000001)
853 struct ALT_TMR_TIMERSRAWINTSTAT_s
855 const volatile uint32_t TIMERSRAWINTSTAT : 1;
860 typedef struct ALT_TMR_TIMERSRAWINTSTAT_s ALT_TMR_TIMERSRAWINTSTAT_t;
864 #define ALT_TMR_TIMERSRAWINTSTAT_RESET 0x00000000
866 #define ALT_TMR_TIMERSRAWINTSTAT_OFST 0xa8
868 #define ALT_TMR_TIMERSRAWINTSTAT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_TMR_TIMERSRAWINTSTAT_OFST))
897 #define ALT_TMR_TIMERSCOMPVERSION_TIMERSCOMPVERSION_LSB 0
899 #define ALT_TMR_TIMERSCOMPVERSION_TIMERSCOMPVERSION_MSB 31
901 #define ALT_TMR_TIMERSCOMPVERSION_TIMERSCOMPVERSION_WIDTH 32
903 #define ALT_TMR_TIMERSCOMPVERSION_TIMERSCOMPVERSION_SET_MSK 0xffffffff
905 #define ALT_TMR_TIMERSCOMPVERSION_TIMERSCOMPVERSION_CLR_MSK 0x00000000
907 #define ALT_TMR_TIMERSCOMPVERSION_TIMERSCOMPVERSION_RESET 0x3230392a
909 #define ALT_TMR_TIMERSCOMPVERSION_TIMERSCOMPVERSION_GET(value) (((value) & 0xffffffff) >> 0)
911 #define ALT_TMR_TIMERSCOMPVERSION_TIMERSCOMPVERSION_SET(value) (((value) << 0) & 0xffffffff)
925 struct ALT_TMR_TIMERSCOMPVERSION_s
927 const volatile uint32_t TIMERSCOMPVERSION : 32;
931 typedef struct ALT_TMR_TIMERSCOMPVERSION_s ALT_TMR_TIMERSCOMPVERSION_t;
935 #define ALT_TMR_TIMERSCOMPVERSION_RESET 0x3230392a
937 #define ALT_TMR_TIMERSCOMPVERSION_OFST 0xac
939 #define ALT_TMR_TIMERSCOMPVERSION_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_TMR_TIMERSCOMPVERSION_OFST))
955 volatile ALT_TMR_TIMER1LOADCOUNT_t TIMER1LOADCOUNT;
956 volatile ALT_TMR_TIMER1CURRENTVAL_t TIMER1CURRENTVAL;
957 volatile ALT_TMR_TIMER1CONTROLREG_t TIMER1CONTROLREG;
958 volatile ALT_TMR_TIMER1EOI_t TIMER1EOI;
959 volatile ALT_TMR_TIMER1INTSTAT_t TIMER1INTSTAT;
960 volatile uint32_t _pad_0x14_0x9f[35];
961 volatile ALT_TMR_TIMERSINTSTAT_t TIMERSINTSTAT;
962 volatile ALT_TMR_TIMERSEOI_t TIMERSEOI;
963 volatile ALT_TMR_TIMERSRAWINTSTAT_t TIMERSRAWINTSTAT;
964 volatile ALT_TMR_TIMERSCOMPVERSION_t TIMERSCOMPVERSION;
965 volatile uint32_t _pad_0xb0_0x100[20];
969 typedef struct ALT_TMR_s ALT_TMR_t;
973 volatile uint32_t TIMER1LOADCOUNT;
974 volatile uint32_t TIMER1CURRENTVAL;
975 volatile uint32_t TIMER1CONTROLREG;
976 volatile uint32_t TIMER1EOI;
977 volatile uint32_t TIMER1INTSTAT;
978 volatile uint32_t _pad_0x14_0x9f[35];
979 volatile uint32_t TIMERSINTSTAT;
980 volatile uint32_t TIMERSEOI;
981 volatile uint32_t TIMERSRAWINTSTAT;
982 volatile uint32_t TIMERSCOMPVERSION;
983 volatile uint32_t _pad_0xb0_0x100[20];
987 typedef struct ALT_TMR_raw_s ALT_TMR_raw_t;