Hardware Libraries  20.1
Arria 10 SoC Hardware Manager
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hps.h
1 /***********************************************************************************
2 * *
3 * Copyright 2013-2015 Altera Corporation. All Rights Reserved. *
4 * *
5 * Redistribution and use in source and binary forms, with or without *
6 * modification, are permitted provided that the following conditions are met: *
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8 * 1. Redistributions of source code must retain the above copyright notice, *
9 * this list of conditions and the following disclaimer. *
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12 * this list of conditions and the following disclaimer in the documentation *
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31 ***********************************************************************************/
32 
33 /* Altera - hps */
34 
35 #ifndef __ALT_SOCAL_HPS_H__
36 #define __ALT_SOCAL_HPS_H__
37 
38 #ifndef __ASSEMBLY__
39 #ifdef __cplusplus
40 #include <cstdint>
41 extern "C"
42 {
43 #else /* __cplusplus */
44 #include <stdint.h>
45 #endif /* __cplusplus */
46 #endif /* __ASSEMBLY__ */
47 
48 #define ALT_HPS_ADDR 0
49 /*
50  * Address Space : ALT_HPS
51  *
52  */
53 /*
54  * Component Instance : i_fpga_bridge_soc2fpga128
55  *
56  * Instance i_fpga_bridge_soc2fpga128 of component ALT_FPGA_BRIDGE_H2F128.
57  *
58  *
59  */
60 /* The base address byte offset for the start of the ALT_FPGA_BRIDGE_H2F128 component. */
61 #define ALT_FPGA_BRIDGE_H2F128_OFST 0xc0000000
62 /* The start address of the ALT_FPGA_BRIDGE_H2F128 component. */
63 #define ALT_FPGA_BRIDGE_H2F128_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGA_BRIDGE_H2F128_OFST))
64 /* The lower bound address range of the ALT_FPGA_BRIDGE_H2F128 component. */
65 #define ALT_FPGA_BRIDGE_H2F128_LB_ADDR ALT_FPGA_BRIDGE_H2F128_ADDR
66 /* The upper bound address range of the ALT_FPGA_BRIDGE_H2F128 component. */
67 #define ALT_FPGA_BRIDGE_H2F128_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGA_BRIDGE_H2F128_ADDR) + 0x3c000000) - 1))
68 
69 
70 /*
71  * Component Instance : i_fpga_bridge_lwsoc2fpga
72  *
73  * Instance i_fpga_bridge_lwsoc2fpga of component ALT_FPGA_BRIDGE_LWH2F.
74  *
75  *
76  */
77 /* The base address byte offset for the start of the ALT_FPGA_BRIDGE_LWH2F component. */
78 #define ALT_FPGA_BRIDGE_LWH2F_OFST 0xff200000
79 /* The start address of the ALT_FPGA_BRIDGE_LWH2F component. */
80 #define ALT_FPGA_BRIDGE_LWH2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGA_BRIDGE_LWH2F_OFST))
81 /* The lower bound address range of the ALT_FPGA_BRIDGE_LWH2F component. */
82 #define ALT_FPGA_BRIDGE_LWH2F_LB_ADDR ALT_FPGA_BRIDGE_LWH2F_ADDR
83 /* The upper bound address range of the ALT_FPGA_BRIDGE_LWH2F component. */
84 #define ALT_FPGA_BRIDGE_LWH2F_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGA_BRIDGE_LWH2F_ADDR) + 0x200000) - 1))
85 
86 
87 /*
88  * Component Instance : i_emac_emac0
89  *
90  * Instance i_emac_emac0 of component ALT_EMAC.
91  *
92  *
93  */
94 /* The address of the ALT_EMAC_GMAC_MAC_CFG register for the ALT_EMAC0 instance. */
95 #define ALT_EMAC0_GMAC_MAC_CFG_ADDR ALT_EMAC_GMAC_MAC_CFG_ADDR(ALT_EMAC0_ADDR)
96 /* The address of the ALT_EMAC_GMAC_MAC_FRM_FLT register for the ALT_EMAC0 instance. */
97 #define ALT_EMAC0_GMAC_MAC_FRM_FLT_ADDR ALT_EMAC_GMAC_MAC_FRM_FLT_ADDR(ALT_EMAC0_ADDR)
98 /* The address of the ALT_EMAC_GMAC_GMII_ADDR register for the ALT_EMAC0 instance. */
99 #define ALT_EMAC0_GMAC_GMII_ADDR_ADDR ALT_EMAC_GMAC_GMII_ADDR_ADDR(ALT_EMAC0_ADDR)
100 /* The address of the ALT_EMAC_GMAC_GMII_DATA register for the ALT_EMAC0 instance. */
101 #define ALT_EMAC0_GMAC_GMII_DATA_ADDR ALT_EMAC_GMAC_GMII_DATA_ADDR(ALT_EMAC0_ADDR)
102 /* The address of the ALT_EMAC_GMAC_FLOW_CTL register for the ALT_EMAC0 instance. */
103 #define ALT_EMAC0_GMAC_FLOW_CTL_ADDR ALT_EMAC_GMAC_FLOW_CTL_ADDR(ALT_EMAC0_ADDR)
104 /* The address of the ALT_EMAC_GMAC_VLAN_TAG register for the ALT_EMAC0 instance. */
105 #define ALT_EMAC0_GMAC_VLAN_TAG_ADDR ALT_EMAC_GMAC_VLAN_TAG_ADDR(ALT_EMAC0_ADDR)
106 /* The address of the ALT_EMAC_GMAC_VER register for the ALT_EMAC0 instance. */
107 #define ALT_EMAC0_GMAC_VER_ADDR ALT_EMAC_GMAC_VER_ADDR(ALT_EMAC0_ADDR)
108 /* The address of the ALT_EMAC_GMAC_DBG register for the ALT_EMAC0 instance. */
109 #define ALT_EMAC0_GMAC_DBG_ADDR ALT_EMAC_GMAC_DBG_ADDR(ALT_EMAC0_ADDR)
110 /* The address of the ALT_EMAC_GMAC_LPI_CTL_STAT register for the ALT_EMAC0 instance. */
111 #define ALT_EMAC0_GMAC_LPI_CTL_STAT_ADDR ALT_EMAC_GMAC_LPI_CTL_STAT_ADDR(ALT_EMAC0_ADDR)
112 /* The address of the ALT_EMAC_GMAC_LPI_TMRS_CTL register for the ALT_EMAC0 instance. */
113 #define ALT_EMAC0_GMAC_LPI_TMRS_CTL_ADDR ALT_EMAC_GMAC_LPI_TMRS_CTL_ADDR(ALT_EMAC0_ADDR)
114 /* The address of the ALT_EMAC_GMAC_INT_STAT register for the ALT_EMAC0 instance. */
115 #define ALT_EMAC0_GMAC_INT_STAT_ADDR ALT_EMAC_GMAC_INT_STAT_ADDR(ALT_EMAC0_ADDR)
116 /* The address of the ALT_EMAC_GMAC_INT_MSK register for the ALT_EMAC0 instance. */
117 #define ALT_EMAC0_GMAC_INT_MSK_ADDR ALT_EMAC_GMAC_INT_MSK_ADDR(ALT_EMAC0_ADDR)
118 /* The address of the ALT_EMAC_GMAC_MAC_ADDR0_HIGH register for the ALT_EMAC0 instance. */
119 #define ALT_EMAC0_GMAC_MAC_ADDR0_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR0_HIGH_ADDR(ALT_EMAC0_ADDR)
120 /* The address of the ALT_EMAC_GMAC_MAC_ADDR0_LOW register for the ALT_EMAC0 instance. */
121 #define ALT_EMAC0_GMAC_MAC_ADDR0_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR0_LOW_ADDR(ALT_EMAC0_ADDR)
122 /* The address of the ALT_EMAC_GMAC_MAC_ADDR1_HIGH register for the ALT_EMAC0 instance. */
123 #define ALT_EMAC0_GMAC_MAC_ADDR1_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR1_HIGH_ADDR(ALT_EMAC0_ADDR)
124 /* The address of the ALT_EMAC_GMAC_MAC_ADDR1_LOW register for the ALT_EMAC0 instance. */
125 #define ALT_EMAC0_GMAC_MAC_ADDR1_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR1_LOW_ADDR(ALT_EMAC0_ADDR)
126 /* The address of the ALT_EMAC_GMAC_MAC_ADDR2_HIGH register for the ALT_EMAC0 instance. */
127 #define ALT_EMAC0_GMAC_MAC_ADDR2_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR2_HIGH_ADDR(ALT_EMAC0_ADDR)
128 /* The address of the ALT_EMAC_GMAC_MAC_ADDR2_LOW register for the ALT_EMAC0 instance. */
129 #define ALT_EMAC0_GMAC_MAC_ADDR2_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR2_LOW_ADDR(ALT_EMAC0_ADDR)
130 /* The address of the ALT_EMAC_GMAC_MAC_ADDR3_HIGH register for the ALT_EMAC0 instance. */
131 #define ALT_EMAC0_GMAC_MAC_ADDR3_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR3_HIGH_ADDR(ALT_EMAC0_ADDR)
132 /* The address of the ALT_EMAC_GMAC_MAC_ADDR3_LOW register for the ALT_EMAC0 instance. */
133 #define ALT_EMAC0_GMAC_MAC_ADDR3_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR3_LOW_ADDR(ALT_EMAC0_ADDR)
134 /* The address of the ALT_EMAC_GMAC_MAC_ADDR4_HIGH register for the ALT_EMAC0 instance. */
135 #define ALT_EMAC0_GMAC_MAC_ADDR4_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR4_HIGH_ADDR(ALT_EMAC0_ADDR)
136 /* The address of the ALT_EMAC_GMAC_MAC_ADDR4_LOW register for the ALT_EMAC0 instance. */
137 #define ALT_EMAC0_GMAC_MAC_ADDR4_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR4_LOW_ADDR(ALT_EMAC0_ADDR)
138 /* The address of the ALT_EMAC_GMAC_MAC_ADDR5_HIGH register for the ALT_EMAC0 instance. */
139 #define ALT_EMAC0_GMAC_MAC_ADDR5_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR5_HIGH_ADDR(ALT_EMAC0_ADDR)
140 /* The address of the ALT_EMAC_GMAC_MAC_ADDR5_LOW register for the ALT_EMAC0 instance. */
141 #define ALT_EMAC0_GMAC_MAC_ADDR5_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR5_LOW_ADDR(ALT_EMAC0_ADDR)
142 /* The address of the ALT_EMAC_GMAC_MAC_ADDR6_HIGH register for the ALT_EMAC0 instance. */
143 #define ALT_EMAC0_GMAC_MAC_ADDR6_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR6_HIGH_ADDR(ALT_EMAC0_ADDR)
144 /* The address of the ALT_EMAC_GMAC_MAC_ADDR6_LOW register for the ALT_EMAC0 instance. */
145 #define ALT_EMAC0_GMAC_MAC_ADDR6_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR6_LOW_ADDR(ALT_EMAC0_ADDR)
146 /* The address of the ALT_EMAC_GMAC_MAC_ADDR7_HIGH register for the ALT_EMAC0 instance. */
147 #define ALT_EMAC0_GMAC_MAC_ADDR7_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR7_HIGH_ADDR(ALT_EMAC0_ADDR)
148 /* The address of the ALT_EMAC_GMAC_MAC_ADDR7_LOW register for the ALT_EMAC0 instance. */
149 #define ALT_EMAC0_GMAC_MAC_ADDR7_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR7_LOW_ADDR(ALT_EMAC0_ADDR)
150 /* The address of the ALT_EMAC_GMAC_MAC_ADDR8_HIGH register for the ALT_EMAC0 instance. */
151 #define ALT_EMAC0_GMAC_MAC_ADDR8_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR8_HIGH_ADDR(ALT_EMAC0_ADDR)
152 /* The address of the ALT_EMAC_GMAC_MAC_ADDR8_LOW register for the ALT_EMAC0 instance. */
153 #define ALT_EMAC0_GMAC_MAC_ADDR8_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR8_LOW_ADDR(ALT_EMAC0_ADDR)
154 /* The address of the ALT_EMAC_GMAC_MAC_ADDR9_HIGH register for the ALT_EMAC0 instance. */
155 #define ALT_EMAC0_GMAC_MAC_ADDR9_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR9_HIGH_ADDR(ALT_EMAC0_ADDR)
156 /* The address of the ALT_EMAC_GMAC_MAC_ADDR9_LOW register for the ALT_EMAC0 instance. */
157 #define ALT_EMAC0_GMAC_MAC_ADDR9_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR9_LOW_ADDR(ALT_EMAC0_ADDR)
158 /* The address of the ALT_EMAC_GMAC_MAC_ADDR10_HIGH register for the ALT_EMAC0 instance. */
159 #define ALT_EMAC0_GMAC_MAC_ADDR10_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR10_HIGH_ADDR(ALT_EMAC0_ADDR)
160 /* The address of the ALT_EMAC_GMAC_MAC_ADDR10_LOW register for the ALT_EMAC0 instance. */
161 #define ALT_EMAC0_GMAC_MAC_ADDR10_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR10_LOW_ADDR(ALT_EMAC0_ADDR)
162 /* The address of the ALT_EMAC_GMAC_MAC_ADDR11_HIGH register for the ALT_EMAC0 instance. */
163 #define ALT_EMAC0_GMAC_MAC_ADDR11_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR11_HIGH_ADDR(ALT_EMAC0_ADDR)
164 /* The address of the ALT_EMAC_GMAC_MAC_ADDR11_LOW register for the ALT_EMAC0 instance. */
165 #define ALT_EMAC0_GMAC_MAC_ADDR11_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR11_LOW_ADDR(ALT_EMAC0_ADDR)
166 /* The address of the ALT_EMAC_GMAC_MAC_ADDR12_HIGH register for the ALT_EMAC0 instance. */
167 #define ALT_EMAC0_GMAC_MAC_ADDR12_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR12_HIGH_ADDR(ALT_EMAC0_ADDR)
168 /* The address of the ALT_EMAC_GMAC_MAC_ADDR12_LOW register for the ALT_EMAC0 instance. */
169 #define ALT_EMAC0_GMAC_MAC_ADDR12_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR12_LOW_ADDR(ALT_EMAC0_ADDR)
170 /* The address of the ALT_EMAC_GMAC_MAC_ADDR13_HIGH register for the ALT_EMAC0 instance. */
171 #define ALT_EMAC0_GMAC_MAC_ADDR13_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR13_HIGH_ADDR(ALT_EMAC0_ADDR)
172 /* The address of the ALT_EMAC_GMAC_MAC_ADDR13_LOW register for the ALT_EMAC0 instance. */
173 #define ALT_EMAC0_GMAC_MAC_ADDR13_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR13_LOW_ADDR(ALT_EMAC0_ADDR)
174 /* The address of the ALT_EMAC_GMAC_MAC_ADDR14_HIGH register for the ALT_EMAC0 instance. */
175 #define ALT_EMAC0_GMAC_MAC_ADDR14_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR14_HIGH_ADDR(ALT_EMAC0_ADDR)
176 /* The address of the ALT_EMAC_GMAC_MAC_ADDR14_LOW register for the ALT_EMAC0 instance. */
177 #define ALT_EMAC0_GMAC_MAC_ADDR14_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR14_LOW_ADDR(ALT_EMAC0_ADDR)
178 /* The address of the ALT_EMAC_GMAC_MAC_ADDR15_HIGH register for the ALT_EMAC0 instance. */
179 #define ALT_EMAC0_GMAC_MAC_ADDR15_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR15_HIGH_ADDR(ALT_EMAC0_ADDR)
180 /* The address of the ALT_EMAC_GMAC_MAC_ADDR15_LOW register for the ALT_EMAC0 instance. */
181 #define ALT_EMAC0_GMAC_MAC_ADDR15_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR15_LOW_ADDR(ALT_EMAC0_ADDR)
182 /* The address of the ALT_EMAC_GMAC_MII_CTL_STAT register for the ALT_EMAC0 instance. */
183 #define ALT_EMAC0_GMAC_SGMII_RGMII_SMII_CTL_STAT_ADDR ALT_EMAC_GMAC_MII_CTL_STAT_ADDR(ALT_EMAC0_ADDR)
184 /* The address of the ALT_EMAC_GMAC_WDOG_TMO register for the ALT_EMAC0 instance. */
185 #define ALT_EMAC0_GMAC_WDOG_TMO_ADDR ALT_EMAC_GMAC_WDOG_TMO_ADDR(ALT_EMAC0_ADDR)
186 /* The address of the ALT_EMAC_GMAC_GENPIO register for the ALT_EMAC0 instance. */
187 #define ALT_EMAC0_GMAC_GENPIO_ADDR ALT_EMAC_GMAC_GENPIO_ADDR(ALT_EMAC0_ADDR)
188 /* The address of the ALT_EMAC_GMAC_MMC_CTL register for the ALT_EMAC0 instance. */
189 #define ALT_EMAC0_GMAC_MMC_CTL_ADDR ALT_EMAC_GMAC_MMC_CTL_ADDR(ALT_EMAC0_ADDR)
190 /* The address of the ALT_EMAC_GMAC_MMC_RX_INT register for the ALT_EMAC0 instance. */
191 #define ALT_EMAC0_GMAC_MMC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_RX_INT_ADDR(ALT_EMAC0_ADDR)
192 /* The address of the ALT_EMAC_GMAC_MMC_TX_INT register for the ALT_EMAC0 instance. */
193 #define ALT_EMAC0_GMAC_MMC_TX_INT_ADDR ALT_EMAC_GMAC_MMC_TX_INT_ADDR(ALT_EMAC0_ADDR)
194 /* The address of the ALT_EMAC_GMAC_MMC_RX_INT_MSK register for the ALT_EMAC0 instance. */
195 #define ALT_EMAC0_GMAC_MMC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_RX_INT_MSK_ADDR(ALT_EMAC0_ADDR)
196 /* The address of the ALT_EMAC_GMAC_MMC_TX_INT_MSK register for the ALT_EMAC0 instance. */
197 #define ALT_EMAC0_GMAC_MMC_TX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_TX_INT_MSK_ADDR(ALT_EMAC0_ADDR)
198 /* The address of the ALT_EMAC_GMAC_TXOCTETCOUNT_GB register for the ALT_EMAC0 instance. */
199 #define ALT_EMAC0_GMAC_TXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_TXOCTETCOUNT_GB_ADDR(ALT_EMAC0_ADDR)
200 /* The address of the ALT_EMAC_GMAC_TXFRMCOUNT_GB register for the ALT_EMAC0 instance. */
201 #define ALT_EMAC0_GMAC_TXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_GB_ADDR(ALT_EMAC0_ADDR)
202 /* The address of the ALT_EMAC_GMAC_TXBCASTFRMS_G register for the ALT_EMAC0 instance. */
203 #define ALT_EMAC0_GMAC_TXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_G_ADDR(ALT_EMAC0_ADDR)
204 /* The address of the ALT_EMAC_GMAC_TXMCASTFRMS_G register for the ALT_EMAC0 instance. */
205 #define ALT_EMAC0_GMAC_TXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_G_ADDR(ALT_EMAC0_ADDR)
206 /* The address of the ALT_EMAC_GMAC_TX64OCTETS_GB register for the ALT_EMAC0 instance. */
207 #define ALT_EMAC0_GMAC_TX64OCTETS_GB_ADDR ALT_EMAC_GMAC_TX64OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
208 /* The address of the ALT_EMAC_GMAC_TX65TO127OCTETS_GB register for the ALT_EMAC0 instance. */
209 #define ALT_EMAC0_GMAC_TX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_TX65TO127OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
210 /* The address of the ALT_EMAC_GMAC_TX128TO255OCTETS_GB register for the ALT_EMAC0 instance. */
211 #define ALT_EMAC0_GMAC_TX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_TX128TO255OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
212 /* The address of the ALT_EMAC_GMAC_TX256TO511OCTETS_GB register for the ALT_EMAC0 instance. */
213 #define ALT_EMAC0_GMAC_TX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_TX256TO511OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
214 /* The address of the ALT_EMAC_GMAC_TX512TO1023OCTETS_GB register for the ALT_EMAC0 instance. */
215 #define ALT_EMAC0_GMAC_TX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_TX512TO1023OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
216 /* The address of the ALT_EMAC_GMAC_TX1024TOMAXOCTETS_GB register for the ALT_EMAC0 instance. */
217 #define ALT_EMAC0_GMAC_TX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_TX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC0_ADDR)
218 /* The address of the ALT_EMAC_GMAC_TXUNICASTFRMS_GB register for the ALT_EMAC0 instance. */
219 #define ALT_EMAC0_GMAC_TXUNICASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXUNICASTFRMS_GB_ADDR(ALT_EMAC0_ADDR)
220 /* The address of the ALT_EMAC_GMAC_TXMCASTFRMS_GB register for the ALT_EMAC0 instance. */
221 #define ALT_EMAC0_GMAC_TXMCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_GB_ADDR(ALT_EMAC0_ADDR)
222 /* The address of the ALT_EMAC_GMAC_TXBCASTFRMS_GB register for the ALT_EMAC0 instance. */
223 #define ALT_EMAC0_GMAC_TXBCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_GB_ADDR(ALT_EMAC0_ADDR)
224 /* The address of the ALT_EMAC_GMAC_TXUNDERFLOWERROR register for the ALT_EMAC0 instance. */
225 #define ALT_EMAC0_GMAC_TXUNDERFLOWERROR_ADDR ALT_EMAC_GMAC_TXUNDERFLOWERROR_ADDR(ALT_EMAC0_ADDR)
226 /* The address of the ALT_EMAC_GMAC_TXSINGLECOL_G register for the ALT_EMAC0 instance. */
227 #define ALT_EMAC0_GMAC_TXSINGLECOL_G_ADDR ALT_EMAC_GMAC_TXSINGLECOL_G_ADDR(ALT_EMAC0_ADDR)
228 /* The address of the ALT_EMAC_GMAC_TXMULTICOL_G register for the ALT_EMAC0 instance. */
229 #define ALT_EMAC0_GMAC_TXMULTICOL_G_ADDR ALT_EMAC_GMAC_TXMULTICOL_G_ADDR(ALT_EMAC0_ADDR)
230 /* The address of the ALT_EMAC_GMAC_TXDEFERRED register for the ALT_EMAC0 instance. */
231 #define ALT_EMAC0_GMAC_TXDEFERRED_ADDR ALT_EMAC_GMAC_TXDEFERRED_ADDR(ALT_EMAC0_ADDR)
232 /* The address of the ALT_EMAC_GMAC_TXLATECOL register for the ALT_EMAC0 instance. */
233 #define ALT_EMAC0_GMAC_TXLATECOL_ADDR ALT_EMAC_GMAC_TXLATECOL_ADDR(ALT_EMAC0_ADDR)
234 /* The address of the ALT_EMAC_GMAC_TXEXESSCOL register for the ALT_EMAC0 instance. */
235 #define ALT_EMAC0_GMAC_TXEXESSCOL_ADDR ALT_EMAC_GMAC_TXEXESSCOL_ADDR(ALT_EMAC0_ADDR)
236 /* The address of the ALT_EMAC_GMAC_TXCARRIERERR register for the ALT_EMAC0 instance. */
237 #define ALT_EMAC0_GMAC_TXCARRIERERR_ADDR ALT_EMAC_GMAC_TXCARRIERERR_ADDR(ALT_EMAC0_ADDR)
238 /* The address of the ALT_EMAC_GMAC_TXOCTETCNT register for the ALT_EMAC0 instance. */
239 #define ALT_EMAC0_GMAC_TXOCTETCNT_ADDR ALT_EMAC_GMAC_TXOCTETCNT_ADDR(ALT_EMAC0_ADDR)
240 /* The address of the ALT_EMAC_GMAC_TXFRMCOUNT_G register for the ALT_EMAC0 instance. */
241 #define ALT_EMAC0_GMAC_TXFRMCOUNT_G_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_G_ADDR(ALT_EMAC0_ADDR)
242 /* The address of the ALT_EMAC_GMAC_TXEXCESSDEF register for the ALT_EMAC0 instance. */
243 #define ALT_EMAC0_GMAC_TXEXCESSDEF_ADDR ALT_EMAC_GMAC_TXEXCESSDEF_ADDR(ALT_EMAC0_ADDR)
244 /* The address of the ALT_EMAC_GMAC_TXPAUSEFRMS register for the ALT_EMAC0 instance. */
245 #define ALT_EMAC0_GMAC_TXPAUSEFRMS_ADDR ALT_EMAC_GMAC_TXPAUSEFRMS_ADDR(ALT_EMAC0_ADDR)
246 /* The address of the ALT_EMAC_GMAC_TXVLANFRMS_G register for the ALT_EMAC0 instance. */
247 #define ALT_EMAC0_GMAC_TXVLANFRMS_G_ADDR ALT_EMAC_GMAC_TXVLANFRMS_G_ADDR(ALT_EMAC0_ADDR)
248 /* The address of the ALT_EMAC_GMAC_TXOVERSIZE_G register for the ALT_EMAC0 instance. */
249 #define ALT_EMAC0_GMAC_TXOVERSIZE_G_ADDR ALT_EMAC_GMAC_TXOVERSIZE_G_ADDR(ALT_EMAC0_ADDR)
250 /* The address of the ALT_EMAC_GMAC_RXFRMCOUNT_GB register for the ALT_EMAC0 instance. */
251 #define ALT_EMAC0_GMAC_RXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_RXFRMCOUNT_GB_ADDR(ALT_EMAC0_ADDR)
252 /* The address of the ALT_EMAC_GMAC_RXOCTETCOUNT_GB register for the ALT_EMAC0 instance. */
253 #define ALT_EMAC0_GMAC_RXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_GB_ADDR(ALT_EMAC0_ADDR)
254 /* The address of the ALT_EMAC_GMAC_RXOCTETCOUNT_G register for the ALT_EMAC0 instance. */
255 #define ALT_EMAC0_GMAC_RXOCTETCOUNT_G_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_G_ADDR(ALT_EMAC0_ADDR)
256 /* The address of the ALT_EMAC_GMAC_RXBCASTFRMS_G register for the ALT_EMAC0 instance. */
257 #define ALT_EMAC0_GMAC_RXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXBCASTFRMS_G_ADDR(ALT_EMAC0_ADDR)
258 /* The address of the ALT_EMAC_GMAC_RXMCASTFRMS_G register for the ALT_EMAC0 instance. */
259 #define ALT_EMAC0_GMAC_RXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXMCASTFRMS_G_ADDR(ALT_EMAC0_ADDR)
260 /* The address of the ALT_EMAC_GMAC_RXCRCERROR register for the ALT_EMAC0 instance. */
261 #define ALT_EMAC0_GMAC_RXCRCERROR_ADDR ALT_EMAC_GMAC_RXCRCERROR_ADDR(ALT_EMAC0_ADDR)
262 /* The address of the ALT_EMAC_GMAC_RXALIGNMENTERROR register for the ALT_EMAC0 instance. */
263 #define ALT_EMAC0_GMAC_RXALIGNMENTERROR_ADDR ALT_EMAC_GMAC_RXALIGNMENTERROR_ADDR(ALT_EMAC0_ADDR)
264 /* The address of the ALT_EMAC_GMAC_RXRUNTERROR register for the ALT_EMAC0 instance. */
265 #define ALT_EMAC0_GMAC_RXRUNTERROR_ADDR ALT_EMAC_GMAC_RXRUNTERROR_ADDR(ALT_EMAC0_ADDR)
266 /* The address of the ALT_EMAC_GMAC_RXJABBERERROR register for the ALT_EMAC0 instance. */
267 #define ALT_EMAC0_GMAC_RXJABBERERROR_ADDR ALT_EMAC_GMAC_RXJABBERERROR_ADDR(ALT_EMAC0_ADDR)
268 /* The address of the ALT_EMAC_GMAC_RXUNDERSIZE_G register for the ALT_EMAC0 instance. */
269 #define ALT_EMAC0_GMAC_RXUNDERSIZE_G_ADDR ALT_EMAC_GMAC_RXUNDERSIZE_G_ADDR(ALT_EMAC0_ADDR)
270 /* The address of the ALT_EMAC_GMAC_RXOVERSIZE_G register for the ALT_EMAC0 instance. */
271 #define ALT_EMAC0_GMAC_RXOVERSIZE_G_ADDR ALT_EMAC_GMAC_RXOVERSIZE_G_ADDR(ALT_EMAC0_ADDR)
272 /* The address of the ALT_EMAC_GMAC_RX64OCTETS_GB register for the ALT_EMAC0 instance. */
273 #define ALT_EMAC0_GMAC_RX64OCTETS_GB_ADDR ALT_EMAC_GMAC_RX64OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
274 /* The address of the ALT_EMAC_GMAC_RX65TO127OCTETS_GB register for the ALT_EMAC0 instance. */
275 #define ALT_EMAC0_GMAC_RX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_RX65TO127OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
276 /* The address of the ALT_EMAC_GMAC_RX128TO255OCTETS_GB register for the ALT_EMAC0 instance. */
277 #define ALT_EMAC0_GMAC_RX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_RX128TO255OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
278 /* The address of the ALT_EMAC_GMAC_RX256TO511OCTETS_GB register for the ALT_EMAC0 instance. */
279 #define ALT_EMAC0_GMAC_RX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_RX256TO511OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
280 /* The address of the ALT_EMAC_GMAC_RX512TO1023OCTETS_GB register for the ALT_EMAC0 instance. */
281 #define ALT_EMAC0_GMAC_RX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_RX512TO1023OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
282 /* The address of the ALT_EMAC_GMAC_RX1024TOMAXOCTETS_GB register for the ALT_EMAC0 instance. */
283 #define ALT_EMAC0_GMAC_RX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_RX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC0_ADDR)
284 /* The address of the ALT_EMAC_GMAC_RXUNICASTFRMS_G register for the ALT_EMAC0 instance. */
285 #define ALT_EMAC0_GMAC_RXUNICASTFRMS_G_ADDR ALT_EMAC_GMAC_RXUNICASTFRMS_G_ADDR(ALT_EMAC0_ADDR)
286 /* The address of the ALT_EMAC_GMAC_RXLENERROR register for the ALT_EMAC0 instance. */
287 #define ALT_EMAC0_GMAC_RXLENERROR_ADDR ALT_EMAC_GMAC_RXLENERROR_ADDR(ALT_EMAC0_ADDR)
288 /* The address of the ALT_EMAC_GMAC_RXOUTOFRANGETYPE register for the ALT_EMAC0 instance. */
289 #define ALT_EMAC0_GMAC_RXOUTOFRANGETYPE_ADDR ALT_EMAC_GMAC_RXOUTOFRANGETYPE_ADDR(ALT_EMAC0_ADDR)
290 /* The address of the ALT_EMAC_GMAC_RXPAUSEFRMS register for the ALT_EMAC0 instance. */
291 #define ALT_EMAC0_GMAC_RXPAUSEFRMS_ADDR ALT_EMAC_GMAC_RXPAUSEFRMS_ADDR(ALT_EMAC0_ADDR)
292 /* The address of the ALT_EMAC_GMAC_RXFIFOOVF register for the ALT_EMAC0 instance. */
293 #define ALT_EMAC0_GMAC_RXFIFOOVF_ADDR ALT_EMAC_GMAC_RXFIFOOVF_ADDR(ALT_EMAC0_ADDR)
294 /* The address of the ALT_EMAC_GMAC_RXVLANFRMS_GB register for the ALT_EMAC0 instance. */
295 #define ALT_EMAC0_GMAC_RXVLANFRMS_GB_ADDR ALT_EMAC_GMAC_RXVLANFRMS_GB_ADDR(ALT_EMAC0_ADDR)
296 /* The address of the ALT_EMAC_GMAC_RXWDERROR register for the ALT_EMAC0 instance. */
297 #define ALT_EMAC0_GMAC_RXWDERROR_ADDR ALT_EMAC_GMAC_RXWDERROR_ADDR(ALT_EMAC0_ADDR)
298 /* The address of the ALT_EMAC_GMAC_RXRCVERROR register for the ALT_EMAC0 instance. */
299 #define ALT_EMAC0_GMAC_RXRCVERROR_ADDR ALT_EMAC_GMAC_RXRCVERROR_ADDR(ALT_EMAC0_ADDR)
300 /* The address of the ALT_EMAC_GMAC_RXCTLFRMS_G register for the ALT_EMAC0 instance. */
301 #define ALT_EMAC0_GMAC_RXCTLFRMS_G_ADDR ALT_EMAC_GMAC_RXCTLFRMS_G_ADDR(ALT_EMAC0_ADDR)
302 /* The address of the ALT_EMAC_GMAC_MMC_IPC_RX_INT_MSK register for the ALT_EMAC0 instance. */
303 #define ALT_EMAC0_GMAC_MMC_IPC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_MSK_ADDR(ALT_EMAC0_ADDR)
304 /* The address of the ALT_EMAC_GMAC_MMC_IPC_RX_INT register for the ALT_EMAC0 instance. */
305 #define ALT_EMAC0_GMAC_MMC_IPC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_ADDR(ALT_EMAC0_ADDR)
306 /* The address of the ALT_EMAC_GMAC_RXIPV4_GD_FRMS register for the ALT_EMAC0 instance. */
307 #define ALT_EMAC0_GMAC_RXIPV4_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
308 /* The address of the ALT_EMAC_GMAC_RXIPV4_HDRERR_FRMS register for the ALT_EMAC0 instance. */
309 #define ALT_EMAC0_GMAC_RXIPV4_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_FRMS_ADDR(ALT_EMAC0_ADDR)
310 /* The address of the ALT_EMAC_GMAC_RXIPV4_NOPAY_FRMS register for the ALT_EMAC0 instance. */
311 #define ALT_EMAC0_GMAC_RXIPV4_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_FRMS_ADDR(ALT_EMAC0_ADDR)
312 /* The address of the ALT_EMAC_GMAC_RXIPV4_FRAG_FRMS register for the ALT_EMAC0 instance. */
313 #define ALT_EMAC0_GMAC_RXIPV4_FRAG_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_FRMS_ADDR(ALT_EMAC0_ADDR)
314 /* The address of the ALT_EMAC_GMAC_RXIPV4_UDSBL_FRMS register for the ALT_EMAC0 instance. */
315 #define ALT_EMAC0_GMAC_RXIPV4_UDSBL_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_FRMS_ADDR(ALT_EMAC0_ADDR)
316 /* The address of the ALT_EMAC_GMAC_RXIPV6_GD_FRMS register for the ALT_EMAC0 instance. */
317 #define ALT_EMAC0_GMAC_RXIPV6_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
318 /* The address of the ALT_EMAC_GMAC_RXIPV6_HDRERR_FRMS register for the ALT_EMAC0 instance. */
319 #define ALT_EMAC0_GMAC_RXIPV6_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_FRMS_ADDR(ALT_EMAC0_ADDR)
320 /* The address of the ALT_EMAC_GMAC_RXIPV6_NOPAY_FRMS register for the ALT_EMAC0 instance. */
321 #define ALT_EMAC0_GMAC_RXIPV6_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_FRMS_ADDR(ALT_EMAC0_ADDR)
322 /* The address of the ALT_EMAC_GMAC_RXUDP_GD_FRMS register for the ALT_EMAC0 instance. */
323 #define ALT_EMAC0_GMAC_RXUDP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
324 /* The address of the ALT_EMAC_GMAC_RXUDP_ERR_FRMS register for the ALT_EMAC0 instance. */
325 #define ALT_EMAC0_GMAC_RXUDP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_FRMS_ADDR(ALT_EMAC0_ADDR)
326 /* The address of the ALT_EMAC_GMAC_RXTCP_GD_FRMS register for the ALT_EMAC0 instance. */
327 #define ALT_EMAC0_GMAC_RXTCP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
328 /* The address of the ALT_EMAC_GMAC_RXTCP_ERR_FRMS register for the ALT_EMAC0 instance. */
329 #define ALT_EMAC0_GMAC_RXTCP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_ERR_FRMS_ADDR(ALT_EMAC0_ADDR)
330 /* The address of the ALT_EMAC_GMAC_RXICMP_GD_FRMS register for the ALT_EMAC0 instance. */
331 #define ALT_EMAC0_GMAC_RXICMP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
332 /* The address of the ALT_EMAC_GMAC_RXICMP_ERR_FRMS register for the ALT_EMAC0 instance. */
333 #define ALT_EMAC0_GMAC_RXICMP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_FRMS_ADDR(ALT_EMAC0_ADDR)
334 /* The address of the ALT_EMAC_GMAC_RXIPV4_GD_OCTETS register for the ALT_EMAC0 instance. */
335 #define ALT_EMAC0_GMAC_RXIPV4_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
336 /* The address of the ALT_EMAC_GMAC_RXIPV4_HDRERR_OCTETS register for the ALT_EMAC0 instance. */
337 #define ALT_EMAC0_GMAC_RXIPV4_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_OCTETS_ADDR(ALT_EMAC0_ADDR)
338 /* The address of the ALT_EMAC_GMAC_RXIPV4_NOPAY_OCTETS register for the ALT_EMAC0 instance. */
339 #define ALT_EMAC0_GMAC_RXIPV4_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_OCTETS_ADDR(ALT_EMAC0_ADDR)
340 /* The address of the ALT_EMAC_GMAC_RXIPV4_FRAG_OCTETS register for the ALT_EMAC0 instance. */
341 #define ALT_EMAC0_GMAC_RXIPV4_FRAG_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_OCTETS_ADDR(ALT_EMAC0_ADDR)
342 /* The address of the ALT_EMAC_GMAC_RXIPV4_UDSBL_OCTETS register for the ALT_EMAC0 instance. */
343 #define ALT_EMAC0_GMAC_RXIPV4_UDSBL_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_OCTETS_ADDR(ALT_EMAC0_ADDR)
344 /* The address of the ALT_EMAC_GMAC_RXIPV6_GD_OCTETS register for the ALT_EMAC0 instance. */
345 #define ALT_EMAC0_GMAC_RXIPV6_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
346 /* The address of the ALT_EMAC_GMAC_RXIPV6_HDRERR_OCTETS register for the ALT_EMAC0 instance. */
347 #define ALT_EMAC0_GMAC_RXIPV6_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_OCTETS_ADDR(ALT_EMAC0_ADDR)
348 /* The address of the ALT_EMAC_GMAC_RXIPV6_NOPAY_OCTETS register for the ALT_EMAC0 instance. */
349 #define ALT_EMAC0_GMAC_RXIPV6_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_OCTETS_ADDR(ALT_EMAC0_ADDR)
350 /* The address of the ALT_EMAC_GMAC_RXUDP_GD_OCTETS register for the ALT_EMAC0 instance. */
351 #define ALT_EMAC0_GMAC_RXUDP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
352 /* The address of the ALT_EMAC_GMAC_RXUDP_ERR_OCTETS register for the ALT_EMAC0 instance. */
353 #define ALT_EMAC0_GMAC_RXUDP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_OCTETS_ADDR(ALT_EMAC0_ADDR)
354 /* The address of the ALT_EMAC_GMAC_RXTCP_GD_OCTETS register for the ALT_EMAC0 instance. */
355 #define ALT_EMAC0_GMAC_RXTCP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXTCP_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
356 /* The address of the ALT_EMAC_GMAC_RXTCPERROCTETS register for the ALT_EMAC0 instance. */
357 #define ALT_EMAC0_GMAC_RXTCPERROCTETS_ADDR ALT_EMAC_GMAC_RXTCPERROCTETS_ADDR(ALT_EMAC0_ADDR)
358 /* The address of the ALT_EMAC_GMAC_RXICMP_GD_OCTETS register for the ALT_EMAC0 instance. */
359 #define ALT_EMAC0_GMAC_RXICMP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
360 /* The address of the ALT_EMAC_GMAC_RXICMP_ERR_OCTETS register for the ALT_EMAC0 instance. */
361 #define ALT_EMAC0_GMAC_RXICMP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_OCTETS_ADDR(ALT_EMAC0_ADDR)
362 /* The address of the ALT_EMAC_GMAC_L3_L4_CTL0 register for the ALT_EMAC0 instance. */
363 #define ALT_EMAC0_GMAC_L3_L4_CTL0_ADDR ALT_EMAC_GMAC_L3_L4_CTL0_ADDR(ALT_EMAC0_ADDR)
364 /* The address of the ALT_EMAC_GMAC_LYR4_ADDR0 register for the ALT_EMAC0 instance. */
365 #define ALT_EMAC0_GMAC_LYR4_ADDR0_ADDR ALT_EMAC_GMAC_LYR4_ADDR0_ADDR(ALT_EMAC0_ADDR)
366 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR0_REG0 register for the ALT_EMAC0 instance. */
367 #define ALT_EMAC0_GMAC_LYR3_ADDR0_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG0_ADDR(ALT_EMAC0_ADDR)
368 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR1_REG0 register for the ALT_EMAC0 instance. */
369 #define ALT_EMAC0_GMAC_LYR3_ADDR1_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG0_ADDR(ALT_EMAC0_ADDR)
370 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR2_REG0 register for the ALT_EMAC0 instance. */
371 #define ALT_EMAC0_GMAC_LYR3_ADDR2_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG0_ADDR(ALT_EMAC0_ADDR)
372 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR3_REG0 register for the ALT_EMAC0 instance. */
373 #define ALT_EMAC0_GMAC_LYR3_ADDR3_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG0_ADDR(ALT_EMAC0_ADDR)
374 /* The address of the ALT_EMAC_GMAC_L3_L4_CTL1 register for the ALT_EMAC0 instance. */
375 #define ALT_EMAC0_GMAC_L3_L4_CTL1_ADDR ALT_EMAC_GMAC_L3_L4_CTL1_ADDR(ALT_EMAC0_ADDR)
376 /* The address of the ALT_EMAC_GMAC_LYR4_ADDR1 register for the ALT_EMAC0 instance. */
377 #define ALT_EMAC0_GMAC_LYR4_ADDR1_ADDR ALT_EMAC_GMAC_LYR4_ADDR1_ADDR(ALT_EMAC0_ADDR)
378 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR0_REG1 register for the ALT_EMAC0 instance. */
379 #define ALT_EMAC0_GMAC_LYR3_ADDR0_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG1_ADDR(ALT_EMAC0_ADDR)
380 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR1_REG1 register for the ALT_EMAC0 instance. */
381 #define ALT_EMAC0_GMAC_LYR3_ADDR1_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG1_ADDR(ALT_EMAC0_ADDR)
382 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR2_REG1 register for the ALT_EMAC0 instance. */
383 #define ALT_EMAC0_GMAC_LYR3_ADDR2_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG1_ADDR(ALT_EMAC0_ADDR)
384 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR3_REG1 register for the ALT_EMAC0 instance. */
385 #define ALT_EMAC0_GMAC_LYR3_ADDR3_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG1_ADDR(ALT_EMAC0_ADDR)
386 /* The address of the ALT_EMAC_GMAC_L3_L4_CTL2 register for the ALT_EMAC0 instance. */
387 #define ALT_EMAC0_GMAC_L3_L4_CTL2_ADDR ALT_EMAC_GMAC_L3_L4_CTL2_ADDR(ALT_EMAC0_ADDR)
388 /* The address of the ALT_EMAC_GMAC_LYR4_ADDR2 register for the ALT_EMAC0 instance. */
389 #define ALT_EMAC0_GMAC_LYR4_ADDR2_ADDR ALT_EMAC_GMAC_LYR4_ADDR2_ADDR(ALT_EMAC0_ADDR)
390 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR0_REG2 register for the ALT_EMAC0 instance. */
391 #define ALT_EMAC0_GMAC_LYR3_ADDR0_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG2_ADDR(ALT_EMAC0_ADDR)
392 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR1_REG2 register for the ALT_EMAC0 instance. */
393 #define ALT_EMAC0_GMAC_LYR3_ADDR1_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG2_ADDR(ALT_EMAC0_ADDR)
394 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR2_REG2 register for the ALT_EMAC0 instance. */
395 #define ALT_EMAC0_GMAC_LYR3_ADDR2_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG2_ADDR(ALT_EMAC0_ADDR)
396 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR3_REG2 register for the ALT_EMAC0 instance. */
397 #define ALT_EMAC0_GMAC_LYR3_ADDR3_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG2_ADDR(ALT_EMAC0_ADDR)
398 /* The address of the ALT_EMAC_GMAC_L3_L4_CTL3 register for the ALT_EMAC0 instance. */
399 #define ALT_EMAC0_GMAC_L3_L4_CTL3_ADDR ALT_EMAC_GMAC_L3_L4_CTL3_ADDR(ALT_EMAC0_ADDR)
400 /* The address of the ALT_EMAC_GMAC_LYR4_ADDR3 register for the ALT_EMAC0 instance. */
401 #define ALT_EMAC0_GMAC_LYR4_ADDR3_ADDR ALT_EMAC_GMAC_LYR4_ADDR3_ADDR(ALT_EMAC0_ADDR)
402 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR0_REG3 register for the ALT_EMAC0 instance. */
403 #define ALT_EMAC0_GMAC_LYR3_ADDR0_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG3_ADDR(ALT_EMAC0_ADDR)
404 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR1_REG3 register for the ALT_EMAC0 instance. */
405 #define ALT_EMAC0_GMAC_LYR3_ADDR1_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG3_ADDR(ALT_EMAC0_ADDR)
406 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR2_REG3 register for the ALT_EMAC0 instance. */
407 #define ALT_EMAC0_GMAC_LYR3_ADDR2_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG3_ADDR(ALT_EMAC0_ADDR)
408 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR3_REG3 register for the ALT_EMAC0 instance. */
409 #define ALT_EMAC0_GMAC_LYR3_ADDR3_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG3_ADDR(ALT_EMAC0_ADDR)
410 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG0 register for the ALT_EMAC0 instance. */
411 #define ALT_EMAC0_GMAC_HASH_TABLE_REG0_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG0_ADDR(ALT_EMAC0_ADDR)
412 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG1 register for the ALT_EMAC0 instance. */
413 #define ALT_EMAC0_GMAC_HASH_TABLE_REG1_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG1_ADDR(ALT_EMAC0_ADDR)
414 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG2 register for the ALT_EMAC0 instance. */
415 #define ALT_EMAC0_GMAC_HASH_TABLE_REG2_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG2_ADDR(ALT_EMAC0_ADDR)
416 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG3 register for the ALT_EMAC0 instance. */
417 #define ALT_EMAC0_GMAC_HASH_TABLE_REG3_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG3_ADDR(ALT_EMAC0_ADDR)
418 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG4 register for the ALT_EMAC0 instance. */
419 #define ALT_EMAC0_GMAC_HASH_TABLE_REG4_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG4_ADDR(ALT_EMAC0_ADDR)
420 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG5 register for the ALT_EMAC0 instance. */
421 #define ALT_EMAC0_GMAC_HASH_TABLE_REG5_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG5_ADDR(ALT_EMAC0_ADDR)
422 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG6 register for the ALT_EMAC0 instance. */
423 #define ALT_EMAC0_GMAC_HASH_TABLE_REG6_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG6_ADDR(ALT_EMAC0_ADDR)
424 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG7 register for the ALT_EMAC0 instance. */
425 #define ALT_EMAC0_GMAC_HASH_TABLE_REG7_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG7_ADDR(ALT_EMAC0_ADDR)
426 /* The address of the ALT_EMAC_GMAC_VLAN_INCL_REG register for the ALT_EMAC0 instance. */
427 #define ALT_EMAC0_GMAC_VLAN_INCL_REG_ADDR ALT_EMAC_GMAC_VLAN_INCL_REG_ADDR(ALT_EMAC0_ADDR)
428 /* The address of the ALT_EMAC_GMAC_VLAN_HASH_TABLE_REG register for the ALT_EMAC0 instance. */
429 #define ALT_EMAC0_GMAC_VLAN_HASH_TABLE_REG_ADDR ALT_EMAC_GMAC_VLAN_HASH_TABLE_REG_ADDR(ALT_EMAC0_ADDR)
430 /* The address of the ALT_EMAC_GMAC_TS_CTL register for the ALT_EMAC0 instance. */
431 #define ALT_EMAC0_GMAC_TS_CTL_ADDR ALT_EMAC_GMAC_TS_CTL_ADDR(ALT_EMAC0_ADDR)
432 /* The address of the ALT_EMAC_GMAC_SUB_SEC_INCREMENT register for the ALT_EMAC0 instance. */
433 #define ALT_EMAC0_GMAC_SUB_SEC_INCREMENT_ADDR ALT_EMAC_GMAC_SUB_SEC_INCREMENT_ADDR(ALT_EMAC0_ADDR)
434 /* The address of the ALT_EMAC_GMAC_SYS_TIME_SECS register for the ALT_EMAC0 instance. */
435 #define ALT_EMAC0_GMAC_SYS_TIME_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_ADDR(ALT_EMAC0_ADDR)
436 /* The address of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS register for the ALT_EMAC0 instance. */
437 #define ALT_EMAC0_GMAC_SYS_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_ADDR(ALT_EMAC0_ADDR)
438 /* The address of the ALT_EMAC_GMAC_SYS_TIME_SECS_UPDATE register for the ALT_EMAC0 instance. */
439 #define ALT_EMAC0_GMAC_SYS_TIME_SECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_UPDATE_ADDR(ALT_EMAC0_ADDR)
440 /* The address of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE register for the ALT_EMAC0 instance. */
441 #define ALT_EMAC0_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR(ALT_EMAC0_ADDR)
442 /* The address of the ALT_EMAC_GMAC_TS_ADDEND register for the ALT_EMAC0 instance. */
443 #define ALT_EMAC0_GMAC_TS_ADDEND_ADDR ALT_EMAC_GMAC_TS_ADDEND_ADDR(ALT_EMAC0_ADDR)
444 /* The address of the ALT_EMAC_GMAC_TGT_TIME_SECS register for the ALT_EMAC0 instance. */
445 #define ALT_EMAC0_GMAC_TGT_TIME_SECS_ADDR ALT_EMAC_GMAC_TGT_TIME_SECS_ADDR(ALT_EMAC0_ADDR)
446 /* The address of the ALT_EMAC_GMAC_TGT_TIME_NANOSECS register for the ALT_EMAC0 instance. */
447 #define ALT_EMAC0_GMAC_TGT_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_TGT_TIME_NANOSECS_ADDR(ALT_EMAC0_ADDR)
448 /* The address of the ALT_EMAC_GMAC_SYS_TIME_HIGHER_WORD_SECS register for the ALT_EMAC0 instance. */
449 #define ALT_EMAC0_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR(ALT_EMAC0_ADDR)
450 /* The address of the ALT_EMAC_GMAC_TS_STAT register for the ALT_EMAC0 instance. */
451 #define ALT_EMAC0_GMAC_TS_STAT_ADDR ALT_EMAC_GMAC_TS_STAT_ADDR(ALT_EMAC0_ADDR)
452 /* The address of the ALT_EMAC_GMAC_PPS_CTL register for the ALT_EMAC0 instance. */
453 #define ALT_EMAC0_GMAC_PPS_CTL_ADDR ALT_EMAC_GMAC_PPS_CTL_ADDR(ALT_EMAC0_ADDR)
454 /* The address of the ALT_EMAC_GMAC_AUX_TS_NANOSECS register for the ALT_EMAC0 instance. */
455 #define ALT_EMAC0_GMAC_AUX_TS_NANOSECS_ADDR ALT_EMAC_GMAC_AUX_TS_NANOSECS_ADDR(ALT_EMAC0_ADDR)
456 /* The address of the ALT_EMAC_GMAC_AUX_TS_SECS register for the ALT_EMAC0 instance. */
457 #define ALT_EMAC0_GMAC_AUX_TS_SECS_ADDR ALT_EMAC_GMAC_AUX_TS_SECS_ADDR(ALT_EMAC0_ADDR)
458 /* The address of the ALT_EMAC_GMAC_PPS0_INTERVAL register for the ALT_EMAC0 instance. */
459 #define ALT_EMAC0_GMAC_PPS0_INTERVAL_ADDR ALT_EMAC_GMAC_PPS0_INTERVAL_ADDR(ALT_EMAC0_ADDR)
460 /* The address of the ALT_EMAC_GMAC_PPS0_WIDTH register for the ALT_EMAC0 instance. */
461 #define ALT_EMAC0_GMAC_PPS0_WIDTH_ADDR ALT_EMAC_GMAC_PPS0_WIDTH_ADDR(ALT_EMAC0_ADDR)
462 /* The address of the ALT_EMAC_GMAC_MAC_ADDR16_HIGH register for the ALT_EMAC0 instance. */
463 #define ALT_EMAC0_GMAC_MAC_ADDR16_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR16_HIGH_ADDR(ALT_EMAC0_ADDR)
464 /* The address of the ALT_EMAC_GMAC_MAC_ADDR16_LOW register for the ALT_EMAC0 instance. */
465 #define ALT_EMAC0_GMAC_MAC_ADDR16_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR16_LOW_ADDR(ALT_EMAC0_ADDR)
466 /* The address of the ALT_EMAC_GMAC_MAC_ADDR17_HIGH register for the ALT_EMAC0 instance. */
467 #define ALT_EMAC0_GMAC_MAC_ADDR17_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR17_HIGH_ADDR(ALT_EMAC0_ADDR)
468 /* The address of the ALT_EMAC_GMAC_MAC_ADDR17_LOW register for the ALT_EMAC0 instance. */
469 #define ALT_EMAC0_GMAC_MAC_ADDR17_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR17_LOW_ADDR(ALT_EMAC0_ADDR)
470 /* The address of the ALT_EMAC_GMAC_MAC_ADDR18_HIGH register for the ALT_EMAC0 instance. */
471 #define ALT_EMAC0_GMAC_MAC_ADDR18_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR18_HIGH_ADDR(ALT_EMAC0_ADDR)
472 /* The address of the ALT_EMAC_GMAC_MAC_ADDR18_LOW register for the ALT_EMAC0 instance. */
473 #define ALT_EMAC0_GMAC_MAC_ADDR18_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR18_LOW_ADDR(ALT_EMAC0_ADDR)
474 /* The address of the ALT_EMAC_GMAC_MAC_ADDR19_HIGH register for the ALT_EMAC0 instance. */
475 #define ALT_EMAC0_GMAC_MAC_ADDR19_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR19_HIGH_ADDR(ALT_EMAC0_ADDR)
476 /* The address of the ALT_EMAC_GMAC_MAC_ADDR19_LOW register for the ALT_EMAC0 instance. */
477 #define ALT_EMAC0_GMAC_MAC_ADDR19_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR19_LOW_ADDR(ALT_EMAC0_ADDR)
478 /* The address of the ALT_EMAC_GMAC_MAC_ADDR20_HIGH register for the ALT_EMAC0 instance. */
479 #define ALT_EMAC0_GMAC_MAC_ADDR20_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR20_HIGH_ADDR(ALT_EMAC0_ADDR)
480 /* The address of the ALT_EMAC_GMAC_MAC_ADDR20_LOW register for the ALT_EMAC0 instance. */
481 #define ALT_EMAC0_GMAC_MAC_ADDR20_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR20_LOW_ADDR(ALT_EMAC0_ADDR)
482 /* The address of the ALT_EMAC_GMAC_MAC_ADDR21_HIGH register for the ALT_EMAC0 instance. */
483 #define ALT_EMAC0_GMAC_MAC_ADDR21_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR21_HIGH_ADDR(ALT_EMAC0_ADDR)
484 /* The address of the ALT_EMAC_GMAC_MAC_ADDR21_LOW register for the ALT_EMAC0 instance. */
485 #define ALT_EMAC0_GMAC_MAC_ADDR21_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR21_LOW_ADDR(ALT_EMAC0_ADDR)
486 /* The address of the ALT_EMAC_GMAC_MAC_ADDR22_HIGH register for the ALT_EMAC0 instance. */
487 #define ALT_EMAC0_GMAC_MAC_ADDR22_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR22_HIGH_ADDR(ALT_EMAC0_ADDR)
488 /* The address of the ALT_EMAC_GMAC_MAC_ADDR22_LOW register for the ALT_EMAC0 instance. */
489 #define ALT_EMAC0_GMAC_MAC_ADDR22_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR22_LOW_ADDR(ALT_EMAC0_ADDR)
490 /* The address of the ALT_EMAC_GMAC_MAC_ADDR23_HIGH register for the ALT_EMAC0 instance. */
491 #define ALT_EMAC0_GMAC_MAC_ADDR23_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR23_HIGH_ADDR(ALT_EMAC0_ADDR)
492 /* The address of the ALT_EMAC_GMAC_MAC_ADDR23_LOW register for the ALT_EMAC0 instance. */
493 #define ALT_EMAC0_GMAC_MAC_ADDR23_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR23_LOW_ADDR(ALT_EMAC0_ADDR)
494 /* The address of the ALT_EMAC_GMAC_MAC_ADDR24_HIGH register for the ALT_EMAC0 instance. */
495 #define ALT_EMAC0_GMAC_MAC_ADDR24_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR24_HIGH_ADDR(ALT_EMAC0_ADDR)
496 /* The address of the ALT_EMAC_GMAC_MAC_ADDR24_LOW register for the ALT_EMAC0 instance. */
497 #define ALT_EMAC0_GMAC_MAC_ADDR24_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR24_LOW_ADDR(ALT_EMAC0_ADDR)
498 /* The address of the ALT_EMAC_GMAC_MAC_ADDR25_HIGH register for the ALT_EMAC0 instance. */
499 #define ALT_EMAC0_GMAC_MAC_ADDR25_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR25_HIGH_ADDR(ALT_EMAC0_ADDR)
500 /* The address of the ALT_EMAC_GMAC_MAC_ADDR25_LOW register for the ALT_EMAC0 instance. */
501 #define ALT_EMAC0_GMAC_MAC_ADDR25_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR25_LOW_ADDR(ALT_EMAC0_ADDR)
502 /* The address of the ALT_EMAC_GMAC_MAC_ADDR26_HIGH register for the ALT_EMAC0 instance. */
503 #define ALT_EMAC0_GMAC_MAC_ADDR26_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR26_HIGH_ADDR(ALT_EMAC0_ADDR)
504 /* The address of the ALT_EMAC_GMAC_MAC_ADDR26_LOW register for the ALT_EMAC0 instance. */
505 #define ALT_EMAC0_GMAC_MAC_ADDR26_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR26_LOW_ADDR(ALT_EMAC0_ADDR)
506 /* The address of the ALT_EMAC_GMAC_MAC_ADDR27_HIGH register for the ALT_EMAC0 instance. */
507 #define ALT_EMAC0_GMAC_MAC_ADDR27_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR27_HIGH_ADDR(ALT_EMAC0_ADDR)
508 /* The address of the ALT_EMAC_GMAC_MAC_ADDR27_LOW register for the ALT_EMAC0 instance. */
509 #define ALT_EMAC0_GMAC_MAC_ADDR27_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR27_LOW_ADDR(ALT_EMAC0_ADDR)
510 /* The address of the ALT_EMAC_GMAC_MAC_ADDR28_HIGH register for the ALT_EMAC0 instance. */
511 #define ALT_EMAC0_GMAC_MAC_ADDR28_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR28_HIGH_ADDR(ALT_EMAC0_ADDR)
512 /* The address of the ALT_EMAC_GMAC_MAC_ADDR28_LOW register for the ALT_EMAC0 instance. */
513 #define ALT_EMAC0_GMAC_MAC_ADDR28_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR28_LOW_ADDR(ALT_EMAC0_ADDR)
514 /* The address of the ALT_EMAC_GMAC_MAC_ADDR29_HIGH register for the ALT_EMAC0 instance. */
515 #define ALT_EMAC0_GMAC_MAC_ADDR29_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR29_HIGH_ADDR(ALT_EMAC0_ADDR)
516 /* The address of the ALT_EMAC_GMAC_MAC_ADDR29_LOW register for the ALT_EMAC0 instance. */
517 #define ALT_EMAC0_GMAC_MAC_ADDR29_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR29_LOW_ADDR(ALT_EMAC0_ADDR)
518 /* The address of the ALT_EMAC_GMAC_MAC_ADDR30_HIGH register for the ALT_EMAC0 instance. */
519 #define ALT_EMAC0_GMAC_MAC_ADDR30_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR30_HIGH_ADDR(ALT_EMAC0_ADDR)
520 /* The address of the ALT_EMAC_GMAC_MAC_ADDR30_LOW register for the ALT_EMAC0 instance. */
521 #define ALT_EMAC0_GMAC_MAC_ADDR30_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR30_LOW_ADDR(ALT_EMAC0_ADDR)
522 /* The address of the ALT_EMAC_GMAC_MAC_ADDR31_HIGH register for the ALT_EMAC0 instance. */
523 #define ALT_EMAC0_GMAC_MAC_ADDR31_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR31_HIGH_ADDR(ALT_EMAC0_ADDR)
524 /* The address of the ALT_EMAC_GMAC_MAC_ADDR31_LOW register for the ALT_EMAC0 instance. */
525 #define ALT_EMAC0_GMAC_MAC_ADDR31_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR31_LOW_ADDR(ALT_EMAC0_ADDR)
526 /* The address of the ALT_EMAC_GMAC_MAC_ADDR32_HIGH register for the ALT_EMAC0 instance. */
527 #define ALT_EMAC0_GMAC_MAC_ADDR32_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR32_HIGH_ADDR(ALT_EMAC0_ADDR)
528 /* The address of the ALT_EMAC_GMAC_MAC_ADDR32_LOW register for the ALT_EMAC0 instance. */
529 #define ALT_EMAC0_GMAC_MAC_ADDR32_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR32_LOW_ADDR(ALT_EMAC0_ADDR)
530 /* The address of the ALT_EMAC_GMAC_MAC_ADDR33_HIGH register for the ALT_EMAC0 instance. */
531 #define ALT_EMAC0_GMAC_MAC_ADDR33_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR33_HIGH_ADDR(ALT_EMAC0_ADDR)
532 /* The address of the ALT_EMAC_GMAC_MAC_ADDR33_LOW register for the ALT_EMAC0 instance. */
533 #define ALT_EMAC0_GMAC_MAC_ADDR33_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR33_LOW_ADDR(ALT_EMAC0_ADDR)
534 /* The address of the ALT_EMAC_GMAC_MAC_ADDR34_HIGH register for the ALT_EMAC0 instance. */
535 #define ALT_EMAC0_GMAC_MAC_ADDR34_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR34_HIGH_ADDR(ALT_EMAC0_ADDR)
536 /* The address of the ALT_EMAC_GMAC_MAC_ADDR34_LOW register for the ALT_EMAC0 instance. */
537 #define ALT_EMAC0_GMAC_MAC_ADDR34_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR34_LOW_ADDR(ALT_EMAC0_ADDR)
538 /* The address of the ALT_EMAC_GMAC_MAC_ADDR35_HIGH register for the ALT_EMAC0 instance. */
539 #define ALT_EMAC0_GMAC_MAC_ADDR35_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR35_HIGH_ADDR(ALT_EMAC0_ADDR)
540 /* The address of the ALT_EMAC_GMAC_MAC_ADDR35_LOW register for the ALT_EMAC0 instance. */
541 #define ALT_EMAC0_GMAC_MAC_ADDR35_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR35_LOW_ADDR(ALT_EMAC0_ADDR)
542 /* The address of the ALT_EMAC_GMAC_MAC_ADDR36_HIGH register for the ALT_EMAC0 instance. */
543 #define ALT_EMAC0_GMAC_MAC_ADDR36_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR36_HIGH_ADDR(ALT_EMAC0_ADDR)
544 /* The address of the ALT_EMAC_GMAC_MAC_ADDR36_LOW register for the ALT_EMAC0 instance. */
545 #define ALT_EMAC0_GMAC_MAC_ADDR36_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR36_LOW_ADDR(ALT_EMAC0_ADDR)
546 /* The address of the ALT_EMAC_GMAC_MAC_ADDR37_HIGH register for the ALT_EMAC0 instance. */
547 #define ALT_EMAC0_GMAC_MAC_ADDR37_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR37_HIGH_ADDR(ALT_EMAC0_ADDR)
548 /* The address of the ALT_EMAC_GMAC_MAC_ADDR37_LOW register for the ALT_EMAC0 instance. */
549 #define ALT_EMAC0_GMAC_MAC_ADDR37_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR37_LOW_ADDR(ALT_EMAC0_ADDR)
550 /* The address of the ALT_EMAC_GMAC_MAC_ADDR38_HIGH register for the ALT_EMAC0 instance. */
551 #define ALT_EMAC0_GMAC_MAC_ADDR38_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR38_HIGH_ADDR(ALT_EMAC0_ADDR)
552 /* The address of the ALT_EMAC_GMAC_MAC_ADDR38_LOW register for the ALT_EMAC0 instance. */
553 #define ALT_EMAC0_GMAC_MAC_ADDR38_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR38_LOW_ADDR(ALT_EMAC0_ADDR)
554 /* The address of the ALT_EMAC_GMAC_MAC_ADDR39_HIGH register for the ALT_EMAC0 instance. */
555 #define ALT_EMAC0_GMAC_MAC_ADDR39_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR39_HIGH_ADDR(ALT_EMAC0_ADDR)
556 /* The address of the ALT_EMAC_GMAC_MAC_ADDR39_LOW register for the ALT_EMAC0 instance. */
557 #define ALT_EMAC0_GMAC_MAC_ADDR39_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR39_LOW_ADDR(ALT_EMAC0_ADDR)
558 /* The address of the ALT_EMAC_GMAC_MAC_ADDR40_HIGH register for the ALT_EMAC0 instance. */
559 #define ALT_EMAC0_GMAC_MAC_ADDR40_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR40_HIGH_ADDR(ALT_EMAC0_ADDR)
560 /* The address of the ALT_EMAC_GMAC_MAC_ADDR40_LOW register for the ALT_EMAC0 instance. */
561 #define ALT_EMAC0_GMAC_MAC_ADDR40_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR40_LOW_ADDR(ALT_EMAC0_ADDR)
562 /* The address of the ALT_EMAC_GMAC_MAC_ADDR41_HIGH register for the ALT_EMAC0 instance. */
563 #define ALT_EMAC0_GMAC_MAC_ADDR41_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR41_HIGH_ADDR(ALT_EMAC0_ADDR)
564 /* The address of the ALT_EMAC_GMAC_MAC_ADDR41_LOW register for the ALT_EMAC0 instance. */
565 #define ALT_EMAC0_GMAC_MAC_ADDR41_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR41_LOW_ADDR(ALT_EMAC0_ADDR)
566 /* The address of the ALT_EMAC_GMAC_MAC_ADDR42_HIGH register for the ALT_EMAC0 instance. */
567 #define ALT_EMAC0_GMAC_MAC_ADDR42_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR42_HIGH_ADDR(ALT_EMAC0_ADDR)
568 /* The address of the ALT_EMAC_GMAC_MAC_ADDR42_LOW register for the ALT_EMAC0 instance. */
569 #define ALT_EMAC0_GMAC_MAC_ADDR42_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR42_LOW_ADDR(ALT_EMAC0_ADDR)
570 /* The address of the ALT_EMAC_GMAC_MAC_ADDR43_HIGH register for the ALT_EMAC0 instance. */
571 #define ALT_EMAC0_GMAC_MAC_ADDR43_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR43_HIGH_ADDR(ALT_EMAC0_ADDR)
572 /* The address of the ALT_EMAC_GMAC_MAC_ADDR43_LOW register for the ALT_EMAC0 instance. */
573 #define ALT_EMAC0_GMAC_MAC_ADDR43_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR43_LOW_ADDR(ALT_EMAC0_ADDR)
574 /* The address of the ALT_EMAC_GMAC_MAC_ADDR44_HIGH register for the ALT_EMAC0 instance. */
575 #define ALT_EMAC0_GMAC_MAC_ADDR44_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR44_HIGH_ADDR(ALT_EMAC0_ADDR)
576 /* The address of the ALT_EMAC_GMAC_MAC_ADDR44_LOW register for the ALT_EMAC0 instance. */
577 #define ALT_EMAC0_GMAC_MAC_ADDR44_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR44_LOW_ADDR(ALT_EMAC0_ADDR)
578 /* The address of the ALT_EMAC_GMAC_MAC_ADDR45_HIGH register for the ALT_EMAC0 instance. */
579 #define ALT_EMAC0_GMAC_MAC_ADDR45_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR45_HIGH_ADDR(ALT_EMAC0_ADDR)
580 /* The address of the ALT_EMAC_GMAC_MAC_ADDR45_LOW register for the ALT_EMAC0 instance. */
581 #define ALT_EMAC0_GMAC_MAC_ADDR45_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR45_LOW_ADDR(ALT_EMAC0_ADDR)
582 /* The address of the ALT_EMAC_GMAC_MAC_ADDR46_HIGH register for the ALT_EMAC0 instance. */
583 #define ALT_EMAC0_GMAC_MAC_ADDR46_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR46_HIGH_ADDR(ALT_EMAC0_ADDR)
584 /* The address of the ALT_EMAC_GMAC_MAC_ADDR46_LOW register for the ALT_EMAC0 instance. */
585 #define ALT_EMAC0_GMAC_MAC_ADDR46_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR46_LOW_ADDR(ALT_EMAC0_ADDR)
586 /* The address of the ALT_EMAC_GMAC_MAC_ADDR47_HIGH register for the ALT_EMAC0 instance. */
587 #define ALT_EMAC0_GMAC_MAC_ADDR47_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR47_HIGH_ADDR(ALT_EMAC0_ADDR)
588 /* The address of the ALT_EMAC_GMAC_MAC_ADDR47_LOW register for the ALT_EMAC0 instance. */
589 #define ALT_EMAC0_GMAC_MAC_ADDR47_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR47_LOW_ADDR(ALT_EMAC0_ADDR)
590 /* The address of the ALT_EMAC_GMAC_MAC_ADDR48_HIGH register for the ALT_EMAC0 instance. */
591 #define ALT_EMAC0_GMAC_MAC_ADDR48_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR48_HIGH_ADDR(ALT_EMAC0_ADDR)
592 /* The address of the ALT_EMAC_GMAC_MAC_ADDR48_LOW register for the ALT_EMAC0 instance. */
593 #define ALT_EMAC0_GMAC_MAC_ADDR48_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR48_LOW_ADDR(ALT_EMAC0_ADDR)
594 /* The address of the ALT_EMAC_GMAC_MAC_ADDR49_HIGH register for the ALT_EMAC0 instance. */
595 #define ALT_EMAC0_GMAC_MAC_ADDR49_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR49_HIGH_ADDR(ALT_EMAC0_ADDR)
596 /* The address of the ALT_EMAC_GMAC_MAC_ADDR49_LOW register for the ALT_EMAC0 instance. */
597 #define ALT_EMAC0_GMAC_MAC_ADDR49_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR49_LOW_ADDR(ALT_EMAC0_ADDR)
598 /* The address of the ALT_EMAC_GMAC_MAC_ADDR50_HIGH register for the ALT_EMAC0 instance. */
599 #define ALT_EMAC0_GMAC_MAC_ADDR50_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR50_HIGH_ADDR(ALT_EMAC0_ADDR)
600 /* The address of the ALT_EMAC_GMAC_MAC_ADDR50_LOW register for the ALT_EMAC0 instance. */
601 #define ALT_EMAC0_GMAC_MAC_ADDR50_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR50_LOW_ADDR(ALT_EMAC0_ADDR)
602 /* The address of the ALT_EMAC_GMAC_MAC_ADDR51_HIGH register for the ALT_EMAC0 instance. */
603 #define ALT_EMAC0_GMAC_MAC_ADDR51_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR51_HIGH_ADDR(ALT_EMAC0_ADDR)
604 /* The address of the ALT_EMAC_GMAC_MAC_ADDR51_LOW register for the ALT_EMAC0 instance. */
605 #define ALT_EMAC0_GMAC_MAC_ADDR51_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR51_LOW_ADDR(ALT_EMAC0_ADDR)
606 /* The address of the ALT_EMAC_GMAC_MAC_ADDR52_HIGH register for the ALT_EMAC0 instance. */
607 #define ALT_EMAC0_GMAC_MAC_ADDR52_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR52_HIGH_ADDR(ALT_EMAC0_ADDR)
608 /* The address of the ALT_EMAC_GMAC_MAC_ADDR52_LOW register for the ALT_EMAC0 instance. */
609 #define ALT_EMAC0_GMAC_MAC_ADDR52_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR52_LOW_ADDR(ALT_EMAC0_ADDR)
610 /* The address of the ALT_EMAC_GMAC_MAC_ADDR53_HIGH register for the ALT_EMAC0 instance. */
611 #define ALT_EMAC0_GMAC_MAC_ADDR53_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR53_HIGH_ADDR(ALT_EMAC0_ADDR)
612 /* The address of the ALT_EMAC_GMAC_MAC_ADDR53_LOW register for the ALT_EMAC0 instance. */
613 #define ALT_EMAC0_GMAC_MAC_ADDR53_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR53_LOW_ADDR(ALT_EMAC0_ADDR)
614 /* The address of the ALT_EMAC_GMAC_MAC_ADDR54_HIGH register for the ALT_EMAC0 instance. */
615 #define ALT_EMAC0_GMAC_MAC_ADDR54_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR54_HIGH_ADDR(ALT_EMAC0_ADDR)
616 /* The address of the ALT_EMAC_GMAC_MAC_ADDR54_LOW register for the ALT_EMAC0 instance. */
617 #define ALT_EMAC0_GMAC_MAC_ADDR54_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR54_LOW_ADDR(ALT_EMAC0_ADDR)
618 /* The address of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH register for the ALT_EMAC0 instance. */
619 #define ALT_EMAC0_GMAC_MAC_ADDR55_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDR(ALT_EMAC0_ADDR)
620 /* The address of the ALT_EMAC_GMAC_MAC_ADDR55_LOW register for the ALT_EMAC0 instance. */
621 #define ALT_EMAC0_GMAC_MAC_ADDR55_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR55_LOW_ADDR(ALT_EMAC0_ADDR)
622 /* The address of the ALT_EMAC_GMAC_MAC_ADDR56_HIGH register for the ALT_EMAC0 instance. */
623 #define ALT_EMAC0_GMAC_MAC_ADDR56_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR56_HIGH_ADDR(ALT_EMAC0_ADDR)
624 /* The address of the ALT_EMAC_GMAC_MAC_ADDR56_LOW register for the ALT_EMAC0 instance. */
625 #define ALT_EMAC0_GMAC_MAC_ADDR56_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR56_LOW_ADDR(ALT_EMAC0_ADDR)
626 /* The address of the ALT_EMAC_GMAC_MAC_ADDR57_HIGH register for the ALT_EMAC0 instance. */
627 #define ALT_EMAC0_GMAC_MAC_ADDR57_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR57_HIGH_ADDR(ALT_EMAC0_ADDR)
628 /* The address of the ALT_EMAC_GMAC_MAC_ADDR57_LOW register for the ALT_EMAC0 instance. */
629 #define ALT_EMAC0_GMAC_MAC_ADDR57_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR57_LOW_ADDR(ALT_EMAC0_ADDR)
630 /* The address of the ALT_EMAC_GMAC_MAC_ADDR58_HIGH register for the ALT_EMAC0 instance. */
631 #define ALT_EMAC0_GMAC_MAC_ADDR58_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR58_HIGH_ADDR(ALT_EMAC0_ADDR)
632 /* The address of the ALT_EMAC_GMAC_MAC_ADDR58_LOW register for the ALT_EMAC0 instance. */
633 #define ALT_EMAC0_GMAC_MAC_ADDR58_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR58_LOW_ADDR(ALT_EMAC0_ADDR)
634 /* The address of the ALT_EMAC_GMAC_MAC_ADDR59_HIGH register for the ALT_EMAC0 instance. */
635 #define ALT_EMAC0_GMAC_MAC_ADDR59_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR59_HIGH_ADDR(ALT_EMAC0_ADDR)
636 /* The address of the ALT_EMAC_GMAC_MAC_ADDR59_LOW register for the ALT_EMAC0 instance. */
637 #define ALT_EMAC0_GMAC_MAC_ADDR59_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR59_LOW_ADDR(ALT_EMAC0_ADDR)
638 /* The address of the ALT_EMAC_GMAC_MAC_ADDR60_HIGH register for the ALT_EMAC0 instance. */
639 #define ALT_EMAC0_GMAC_MAC_ADDR60_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR60_HIGH_ADDR(ALT_EMAC0_ADDR)
640 /* The address of the ALT_EMAC_GMAC_MAC_ADDR60_LOW register for the ALT_EMAC0 instance. */
641 #define ALT_EMAC0_GMAC_MAC_ADDR60_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR60_LOW_ADDR(ALT_EMAC0_ADDR)
642 /* The address of the ALT_EMAC_GMAC_MAC_ADDR61_HIGH register for the ALT_EMAC0 instance. */
643 #define ALT_EMAC0_GMAC_MAC_ADDR61_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR61_HIGH_ADDR(ALT_EMAC0_ADDR)
644 /* The address of the ALT_EMAC_GMAC_MAC_ADDR61_LOW register for the ALT_EMAC0 instance. */
645 #define ALT_EMAC0_GMAC_MAC_ADDR61_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR61_LOW_ADDR(ALT_EMAC0_ADDR)
646 /* The address of the ALT_EMAC_GMAC_MAC_ADDR62_HIGH register for the ALT_EMAC0 instance. */
647 #define ALT_EMAC0_GMAC_MAC_ADDR62_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR62_HIGH_ADDR(ALT_EMAC0_ADDR)
648 /* The address of the ALT_EMAC_GMAC_MAC_ADDR62_LOW register for the ALT_EMAC0 instance. */
649 #define ALT_EMAC0_GMAC_MAC_ADDR62_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR62_LOW_ADDR(ALT_EMAC0_ADDR)
650 /* The address of the ALT_EMAC_GMAC_MAC_ADDR63_HIGH register for the ALT_EMAC0 instance. */
651 #define ALT_EMAC0_GMAC_MAC_ADDR63_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR63_HIGH_ADDR(ALT_EMAC0_ADDR)
652 /* The address of the ALT_EMAC_GMAC_MAC_ADDR63_LOW register for the ALT_EMAC0 instance. */
653 #define ALT_EMAC0_GMAC_MAC_ADDR63_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR63_LOW_ADDR(ALT_EMAC0_ADDR)
654 /* The address of the ALT_EMAC_GMAC_MAC_ADDR64_HIGH register for the ALT_EMAC0 instance. */
655 #define ALT_EMAC0_GMAC_MAC_ADDR64_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR64_HIGH_ADDR(ALT_EMAC0_ADDR)
656 /* The address of the ALT_EMAC_GMAC_MAC_ADDR64_LOW register for the ALT_EMAC0 instance. */
657 #define ALT_EMAC0_GMAC_MAC_ADDR64_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR64_LOW_ADDR(ALT_EMAC0_ADDR)
658 /* The address of the ALT_EMAC_GMAC_MAC_ADDR65_HIGH register for the ALT_EMAC0 instance. */
659 #define ALT_EMAC0_GMAC_MAC_ADDR65_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR65_HIGH_ADDR(ALT_EMAC0_ADDR)
660 /* The address of the ALT_EMAC_GMAC_MAC_ADDR65_LOW register for the ALT_EMAC0 instance. */
661 #define ALT_EMAC0_GMAC_MAC_ADDR65_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR65_LOW_ADDR(ALT_EMAC0_ADDR)
662 /* The address of the ALT_EMAC_GMAC_MAC_ADDR66_HIGH register for the ALT_EMAC0 instance. */
663 #define ALT_EMAC0_GMAC_MAC_ADDR66_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR66_HIGH_ADDR(ALT_EMAC0_ADDR)
664 /* The address of the ALT_EMAC_GMAC_MAC_ADDR66_LOW register for the ALT_EMAC0 instance. */
665 #define ALT_EMAC0_GMAC_MAC_ADDR66_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR66_LOW_ADDR(ALT_EMAC0_ADDR)
666 /* The address of the ALT_EMAC_GMAC_MAC_ADDR67_HIGH register for the ALT_EMAC0 instance. */
667 #define ALT_EMAC0_GMAC_MAC_ADDR67_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR67_HIGH_ADDR(ALT_EMAC0_ADDR)
668 /* The address of the ALT_EMAC_GMAC_MAC_ADDR67_LOW register for the ALT_EMAC0 instance. */
669 #define ALT_EMAC0_GMAC_MAC_ADDR67_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR67_LOW_ADDR(ALT_EMAC0_ADDR)
670 /* The address of the ALT_EMAC_GMAC_MAC_ADDR68_HIGH register for the ALT_EMAC0 instance. */
671 #define ALT_EMAC0_GMAC_MAC_ADDR68_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR68_HIGH_ADDR(ALT_EMAC0_ADDR)
672 /* The address of the ALT_EMAC_GMAC_MAC_ADDR68_LOW register for the ALT_EMAC0 instance. */
673 #define ALT_EMAC0_GMAC_MAC_ADDR68_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR68_LOW_ADDR(ALT_EMAC0_ADDR)
674 /* The address of the ALT_EMAC_GMAC_MAC_ADDR69_HIGH register for the ALT_EMAC0 instance. */
675 #define ALT_EMAC0_GMAC_MAC_ADDR69_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR69_HIGH_ADDR(ALT_EMAC0_ADDR)
676 /* The address of the ALT_EMAC_GMAC_MAC_ADDR69_LOW register for the ALT_EMAC0 instance. */
677 #define ALT_EMAC0_GMAC_MAC_ADDR69_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR69_LOW_ADDR(ALT_EMAC0_ADDR)
678 /* The address of the ALT_EMAC_GMAC_MAC_ADDR70_HIGH register for the ALT_EMAC0 instance. */
679 #define ALT_EMAC0_GMAC_MAC_ADDR70_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR70_HIGH_ADDR(ALT_EMAC0_ADDR)
680 /* The address of the ALT_EMAC_GMAC_MAC_ADDR70_LOW register for the ALT_EMAC0 instance. */
681 #define ALT_EMAC0_GMAC_MAC_ADDR70_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR70_LOW_ADDR(ALT_EMAC0_ADDR)
682 /* The address of the ALT_EMAC_GMAC_MAC_ADDR71_HIGH register for the ALT_EMAC0 instance. */
683 #define ALT_EMAC0_GMAC_MAC_ADDR71_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR71_HIGH_ADDR(ALT_EMAC0_ADDR)
684 /* The address of the ALT_EMAC_GMAC_MAC_ADDR71_LOW register for the ALT_EMAC0 instance. */
685 #define ALT_EMAC0_GMAC_MAC_ADDR71_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR71_LOW_ADDR(ALT_EMAC0_ADDR)
686 /* The address of the ALT_EMAC_GMAC_MAC_ADDR72_HIGH register for the ALT_EMAC0 instance. */
687 #define ALT_EMAC0_GMAC_MAC_ADDR72_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR72_HIGH_ADDR(ALT_EMAC0_ADDR)
688 /* The address of the ALT_EMAC_GMAC_MAC_ADDR72_LOW register for the ALT_EMAC0 instance. */
689 #define ALT_EMAC0_GMAC_MAC_ADDR72_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR72_LOW_ADDR(ALT_EMAC0_ADDR)
690 /* The address of the ALT_EMAC_GMAC_MAC_ADDR73_HIGH register for the ALT_EMAC0 instance. */
691 #define ALT_EMAC0_GMAC_MAC_ADDR73_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR73_HIGH_ADDR(ALT_EMAC0_ADDR)
692 /* The address of the ALT_EMAC_GMAC_MAC_ADDR73_LOW register for the ALT_EMAC0 instance. */
693 #define ALT_EMAC0_GMAC_MAC_ADDR73_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR73_LOW_ADDR(ALT_EMAC0_ADDR)
694 /* The address of the ALT_EMAC_GMAC_MAC_ADDR74_HIGH register for the ALT_EMAC0 instance. */
695 #define ALT_EMAC0_GMAC_MAC_ADDR74_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR74_HIGH_ADDR(ALT_EMAC0_ADDR)
696 /* The address of the ALT_EMAC_GMAC_MAC_ADDR74_LOW register for the ALT_EMAC0 instance. */
697 #define ALT_EMAC0_GMAC_MAC_ADDR74_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR74_LOW_ADDR(ALT_EMAC0_ADDR)
698 /* The address of the ALT_EMAC_GMAC_MAC_ADDR75_HIGH register for the ALT_EMAC0 instance. */
699 #define ALT_EMAC0_GMAC_MAC_ADDR75_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR75_HIGH_ADDR(ALT_EMAC0_ADDR)
700 /* The address of the ALT_EMAC_GMAC_MAC_ADDR75_LOW register for the ALT_EMAC0 instance. */
701 #define ALT_EMAC0_GMAC_MAC_ADDR75_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR75_LOW_ADDR(ALT_EMAC0_ADDR)
702 /* The address of the ALT_EMAC_GMAC_MAC_ADDR76_HIGH register for the ALT_EMAC0 instance. */
703 #define ALT_EMAC0_GMAC_MAC_ADDR76_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR76_HIGH_ADDR(ALT_EMAC0_ADDR)
704 /* The address of the ALT_EMAC_GMAC_MAC_ADDR76_LOW register for the ALT_EMAC0 instance. */
705 #define ALT_EMAC0_GMAC_MAC_ADDR76_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR76_LOW_ADDR(ALT_EMAC0_ADDR)
706 /* The address of the ALT_EMAC_GMAC_MAC_ADDR77_HIGH register for the ALT_EMAC0 instance. */
707 #define ALT_EMAC0_GMAC_MAC_ADDR77_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR77_HIGH_ADDR(ALT_EMAC0_ADDR)
708 /* The address of the ALT_EMAC_GMAC_MAC_ADDR77_LOW register for the ALT_EMAC0 instance. */
709 #define ALT_EMAC0_GMAC_MAC_ADDR77_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR77_LOW_ADDR(ALT_EMAC0_ADDR)
710 /* The address of the ALT_EMAC_GMAC_MAC_ADDR78_HIGH register for the ALT_EMAC0 instance. */
711 #define ALT_EMAC0_GMAC_MAC_ADDR78_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR78_HIGH_ADDR(ALT_EMAC0_ADDR)
712 /* The address of the ALT_EMAC_GMAC_MAC_ADDR78_LOW register for the ALT_EMAC0 instance. */
713 #define ALT_EMAC0_GMAC_MAC_ADDR78_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR78_LOW_ADDR(ALT_EMAC0_ADDR)
714 /* The address of the ALT_EMAC_GMAC_MAC_ADDR79_HIGH register for the ALT_EMAC0 instance. */
715 #define ALT_EMAC0_GMAC_MAC_ADDR79_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR79_HIGH_ADDR(ALT_EMAC0_ADDR)
716 /* The address of the ALT_EMAC_GMAC_MAC_ADDR79_LOW register for the ALT_EMAC0 instance. */
717 #define ALT_EMAC0_GMAC_MAC_ADDR79_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR79_LOW_ADDR(ALT_EMAC0_ADDR)
718 /* The address of the ALT_EMAC_GMAC_MAC_ADDR80_HIGH register for the ALT_EMAC0 instance. */
719 #define ALT_EMAC0_GMAC_MAC_ADDR80_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR80_HIGH_ADDR(ALT_EMAC0_ADDR)
720 /* The address of the ALT_EMAC_GMAC_MAC_ADDR80_LOW register for the ALT_EMAC0 instance. */
721 #define ALT_EMAC0_GMAC_MAC_ADDR80_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR80_LOW_ADDR(ALT_EMAC0_ADDR)
722 /* The address of the ALT_EMAC_GMAC_MAC_ADDR81_HIGH register for the ALT_EMAC0 instance. */
723 #define ALT_EMAC0_GMAC_MAC_ADDR81_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR81_HIGH_ADDR(ALT_EMAC0_ADDR)
724 /* The address of the ALT_EMAC_GMAC_MAC_ADDR81_LOW register for the ALT_EMAC0 instance. */
725 #define ALT_EMAC0_GMAC_MAC_ADDR81_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR81_LOW_ADDR(ALT_EMAC0_ADDR)
726 /* The address of the ALT_EMAC_GMAC_MAC_ADDR82_HIGH register for the ALT_EMAC0 instance. */
727 #define ALT_EMAC0_GMAC_MAC_ADDR82_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR82_HIGH_ADDR(ALT_EMAC0_ADDR)
728 /* The address of the ALT_EMAC_GMAC_MAC_ADDR82_LOW register for the ALT_EMAC0 instance. */
729 #define ALT_EMAC0_GMAC_MAC_ADDR82_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR82_LOW_ADDR(ALT_EMAC0_ADDR)
730 /* The address of the ALT_EMAC_GMAC_MAC_ADDR83_HIGH register for the ALT_EMAC0 instance. */
731 #define ALT_EMAC0_GMAC_MAC_ADDR83_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR83_HIGH_ADDR(ALT_EMAC0_ADDR)
732 /* The address of the ALT_EMAC_GMAC_MAC_ADDR83_LOW register for the ALT_EMAC0 instance. */
733 #define ALT_EMAC0_GMAC_MAC_ADDR83_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR83_LOW_ADDR(ALT_EMAC0_ADDR)
734 /* The address of the ALT_EMAC_GMAC_MAC_ADDR84_HIGH register for the ALT_EMAC0 instance. */
735 #define ALT_EMAC0_GMAC_MAC_ADDR84_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR84_HIGH_ADDR(ALT_EMAC0_ADDR)
736 /* The address of the ALT_EMAC_GMAC_MAC_ADDR84_LOW register for the ALT_EMAC0 instance. */
737 #define ALT_EMAC0_GMAC_MAC_ADDR84_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR84_LOW_ADDR(ALT_EMAC0_ADDR)
738 /* The address of the ALT_EMAC_GMAC_MAC_ADDR85_HIGH register for the ALT_EMAC0 instance. */
739 #define ALT_EMAC0_GMAC_MAC_ADDR85_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR85_HIGH_ADDR(ALT_EMAC0_ADDR)
740 /* The address of the ALT_EMAC_GMAC_MAC_ADDR85_LOW register for the ALT_EMAC0 instance. */
741 #define ALT_EMAC0_GMAC_MAC_ADDR85_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR85_LOW_ADDR(ALT_EMAC0_ADDR)
742 /* The address of the ALT_EMAC_GMAC_MAC_ADDR86_HIGH register for the ALT_EMAC0 instance. */
743 #define ALT_EMAC0_GMAC_MAC_ADDR86_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR86_HIGH_ADDR(ALT_EMAC0_ADDR)
744 /* The address of the ALT_EMAC_GMAC_MAC_ADDR86_LOW register for the ALT_EMAC0 instance. */
745 #define ALT_EMAC0_GMAC_MAC_ADDR86_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR86_LOW_ADDR(ALT_EMAC0_ADDR)
746 /* The address of the ALT_EMAC_GMAC_MAC_ADDR87_HIGH register for the ALT_EMAC0 instance. */
747 #define ALT_EMAC0_GMAC_MAC_ADDR87_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR87_HIGH_ADDR(ALT_EMAC0_ADDR)
748 /* The address of the ALT_EMAC_GMAC_MAC_ADDR87_LOW register for the ALT_EMAC0 instance. */
749 #define ALT_EMAC0_GMAC_MAC_ADDR87_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR87_LOW_ADDR(ALT_EMAC0_ADDR)
750 /* The address of the ALT_EMAC_GMAC_MAC_ADDR88_HIGH register for the ALT_EMAC0 instance. */
751 #define ALT_EMAC0_GMAC_MAC_ADDR88_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR88_HIGH_ADDR(ALT_EMAC0_ADDR)
752 /* The address of the ALT_EMAC_GMAC_MAC_ADDR88_LOW register for the ALT_EMAC0 instance. */
753 #define ALT_EMAC0_GMAC_MAC_ADDR88_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR88_LOW_ADDR(ALT_EMAC0_ADDR)
754 /* The address of the ALT_EMAC_GMAC_MAC_ADDR89_HIGH register for the ALT_EMAC0 instance. */
755 #define ALT_EMAC0_GMAC_MAC_ADDR89_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR89_HIGH_ADDR(ALT_EMAC0_ADDR)
756 /* The address of the ALT_EMAC_GMAC_MAC_ADDR89_LOW register for the ALT_EMAC0 instance. */
757 #define ALT_EMAC0_GMAC_MAC_ADDR89_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR89_LOW_ADDR(ALT_EMAC0_ADDR)
758 /* The address of the ALT_EMAC_GMAC_MAC_ADDR90_HIGH register for the ALT_EMAC0 instance. */
759 #define ALT_EMAC0_GMAC_MAC_ADDR90_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR90_HIGH_ADDR(ALT_EMAC0_ADDR)
760 /* The address of the ALT_EMAC_GMAC_MAC_ADDR90_LOW register for the ALT_EMAC0 instance. */
761 #define ALT_EMAC0_GMAC_MAC_ADDR90_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR90_LOW_ADDR(ALT_EMAC0_ADDR)
762 /* The address of the ALT_EMAC_GMAC_MAC_ADDR91_HIGH register for the ALT_EMAC0 instance. */
763 #define ALT_EMAC0_GMAC_MAC_ADDR91_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR91_HIGH_ADDR(ALT_EMAC0_ADDR)
764 /* The address of the ALT_EMAC_GMAC_MAC_ADDR91_LOW register for the ALT_EMAC0 instance. */
765 #define ALT_EMAC0_GMAC_MAC_ADDR91_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR91_LOW_ADDR(ALT_EMAC0_ADDR)
766 /* The address of the ALT_EMAC_GMAC_MAC_ADDR92_HIGH register for the ALT_EMAC0 instance. */
767 #define ALT_EMAC0_GMAC_MAC_ADDR92_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR92_HIGH_ADDR(ALT_EMAC0_ADDR)
768 /* The address of the ALT_EMAC_GMAC_MAC_ADDR92_LOW register for the ALT_EMAC0 instance. */
769 #define ALT_EMAC0_GMAC_MAC_ADDR92_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR92_LOW_ADDR(ALT_EMAC0_ADDR)
770 /* The address of the ALT_EMAC_GMAC_MAC_ADDR93_HIGH register for the ALT_EMAC0 instance. */
771 #define ALT_EMAC0_GMAC_MAC_ADDR93_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR93_HIGH_ADDR(ALT_EMAC0_ADDR)
772 /* The address of the ALT_EMAC_GMAC_MAC_ADDR93_LOW register for the ALT_EMAC0 instance. */
773 #define ALT_EMAC0_GMAC_MAC_ADDR93_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR93_LOW_ADDR(ALT_EMAC0_ADDR)
774 /* The address of the ALT_EMAC_GMAC_MAC_ADDR94_HIGH register for the ALT_EMAC0 instance. */
775 #define ALT_EMAC0_GMAC_MAC_ADDR94_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR94_HIGH_ADDR(ALT_EMAC0_ADDR)
776 /* The address of the ALT_EMAC_GMAC_MAC_ADDR94_LOW register for the ALT_EMAC0 instance. */
777 #define ALT_EMAC0_GMAC_MAC_ADDR94_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR94_LOW_ADDR(ALT_EMAC0_ADDR)
778 /* The address of the ALT_EMAC_GMAC_MAC_ADDR95_HIGH register for the ALT_EMAC0 instance. */
779 #define ALT_EMAC0_GMAC_MAC_ADDR95_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR95_HIGH_ADDR(ALT_EMAC0_ADDR)
780 /* The address of the ALT_EMAC_GMAC_MAC_ADDR95_LOW register for the ALT_EMAC0 instance. */
781 #define ALT_EMAC0_GMAC_MAC_ADDR95_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR95_LOW_ADDR(ALT_EMAC0_ADDR)
782 /* The address of the ALT_EMAC_GMAC_MAC_ADDR96_HIGH register for the ALT_EMAC0 instance. */
783 #define ALT_EMAC0_GMAC_MAC_ADDR96_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR96_HIGH_ADDR(ALT_EMAC0_ADDR)
784 /* The address of the ALT_EMAC_GMAC_MAC_ADDR96_LOW register for the ALT_EMAC0 instance. */
785 #define ALT_EMAC0_GMAC_MAC_ADDR96_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR96_LOW_ADDR(ALT_EMAC0_ADDR)
786 /* The address of the ALT_EMAC_GMAC_MAC_ADDR97_HIGH register for the ALT_EMAC0 instance. */
787 #define ALT_EMAC0_GMAC_MAC_ADDR97_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR97_HIGH_ADDR(ALT_EMAC0_ADDR)
788 /* The address of the ALT_EMAC_GMAC_MAC_ADDR97_LOW register for the ALT_EMAC0 instance. */
789 #define ALT_EMAC0_GMAC_MAC_ADDR97_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR97_LOW_ADDR(ALT_EMAC0_ADDR)
790 /* The address of the ALT_EMAC_GMAC_MAC_ADDR98_HIGH register for the ALT_EMAC0 instance. */
791 #define ALT_EMAC0_GMAC_MAC_ADDR98_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR98_HIGH_ADDR(ALT_EMAC0_ADDR)
792 /* The address of the ALT_EMAC_GMAC_MAC_ADDR98_LOW register for the ALT_EMAC0 instance. */
793 #define ALT_EMAC0_GMAC_MAC_ADDR98_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR98_LOW_ADDR(ALT_EMAC0_ADDR)
794 /* The address of the ALT_EMAC_GMAC_MAC_ADDR99_HIGH register for the ALT_EMAC0 instance. */
795 #define ALT_EMAC0_GMAC_MAC_ADDR99_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR99_HIGH_ADDR(ALT_EMAC0_ADDR)
796 /* The address of the ALT_EMAC_GMAC_MAC_ADDR99_LOW register for the ALT_EMAC0 instance. */
797 #define ALT_EMAC0_GMAC_MAC_ADDR99_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR99_LOW_ADDR(ALT_EMAC0_ADDR)
798 /* The address of the ALT_EMAC_GMAC_MAC_ADDR100_HIGH register for the ALT_EMAC0 instance. */
799 #define ALT_EMAC0_GMAC_MAC_ADDR100_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR100_HIGH_ADDR(ALT_EMAC0_ADDR)
800 /* The address of the ALT_EMAC_GMAC_MAC_ADDR100_LOW register for the ALT_EMAC0 instance. */
801 #define ALT_EMAC0_GMAC_MAC_ADDR100_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR100_LOW_ADDR(ALT_EMAC0_ADDR)
802 /* The address of the ALT_EMAC_GMAC_MAC_ADDR101_HIGH register for the ALT_EMAC0 instance. */
803 #define ALT_EMAC0_GMAC_MAC_ADDR101_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR101_HIGH_ADDR(ALT_EMAC0_ADDR)
804 /* The address of the ALT_EMAC_GMAC_MAC_ADDR101_LOW register for the ALT_EMAC0 instance. */
805 #define ALT_EMAC0_GMAC_MAC_ADDR101_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR101_LOW_ADDR(ALT_EMAC0_ADDR)
806 /* The address of the ALT_EMAC_GMAC_MAC_ADDR102_HIGH register for the ALT_EMAC0 instance. */
807 #define ALT_EMAC0_GMAC_MAC_ADDR102_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR102_HIGH_ADDR(ALT_EMAC0_ADDR)
808 /* The address of the ALT_EMAC_GMAC_MAC_ADDR102_LOW register for the ALT_EMAC0 instance. */
809 #define ALT_EMAC0_GMAC_MAC_ADDR102_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR102_LOW_ADDR(ALT_EMAC0_ADDR)
810 /* The address of the ALT_EMAC_GMAC_MAC_ADDR103_HIGH register for the ALT_EMAC0 instance. */
811 #define ALT_EMAC0_GMAC_MAC_ADDR103_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR103_HIGH_ADDR(ALT_EMAC0_ADDR)
812 /* The address of the ALT_EMAC_GMAC_MAC_ADDR103_LOW register for the ALT_EMAC0 instance. */
813 #define ALT_EMAC0_GMAC_MAC_ADDR103_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR103_LOW_ADDR(ALT_EMAC0_ADDR)
814 /* The address of the ALT_EMAC_GMAC_MAC_ADDR104_HIGH register for the ALT_EMAC0 instance. */
815 #define ALT_EMAC0_GMAC_MAC_ADDR104_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR104_HIGH_ADDR(ALT_EMAC0_ADDR)
816 /* The address of the ALT_EMAC_GMAC_MAC_ADDR104_LOW register for the ALT_EMAC0 instance. */
817 #define ALT_EMAC0_GMAC_MAC_ADDR104_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR104_LOW_ADDR(ALT_EMAC0_ADDR)
818 /* The address of the ALT_EMAC_GMAC_MAC_ADDR105_HIGH register for the ALT_EMAC0 instance. */
819 #define ALT_EMAC0_GMAC_MAC_ADDR105_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR105_HIGH_ADDR(ALT_EMAC0_ADDR)
820 /* The address of the ALT_EMAC_GMAC_MAC_ADDR105_LOW register for the ALT_EMAC0 instance. */
821 #define ALT_EMAC0_GMAC_MAC_ADDR105_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR105_LOW_ADDR(ALT_EMAC0_ADDR)
822 /* The address of the ALT_EMAC_GMAC_MAC_ADDR106_HIGH register for the ALT_EMAC0 instance. */
823 #define ALT_EMAC0_GMAC_MAC_ADDR106_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR106_HIGH_ADDR(ALT_EMAC0_ADDR)
824 /* The address of the ALT_EMAC_GMAC_MAC_ADDR106_LOW register for the ALT_EMAC0 instance. */
825 #define ALT_EMAC0_GMAC_MAC_ADDR106_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR106_LOW_ADDR(ALT_EMAC0_ADDR)
826 /* The address of the ALT_EMAC_GMAC_MAC_ADDR107_HIGH register for the ALT_EMAC0 instance. */
827 #define ALT_EMAC0_GMAC_MAC_ADDR107_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR107_HIGH_ADDR(ALT_EMAC0_ADDR)
828 /* The address of the ALT_EMAC_GMAC_MAC_ADDR107_LOW register for the ALT_EMAC0 instance. */
829 #define ALT_EMAC0_GMAC_MAC_ADDR107_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR107_LOW_ADDR(ALT_EMAC0_ADDR)
830 /* The address of the ALT_EMAC_GMAC_MAC_ADDR108_HIGH register for the ALT_EMAC0 instance. */
831 #define ALT_EMAC0_GMAC_MAC_ADDR108_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR108_HIGH_ADDR(ALT_EMAC0_ADDR)
832 /* The address of the ALT_EMAC_GMAC_MAC_ADDR108_LOW register for the ALT_EMAC0 instance. */
833 #define ALT_EMAC0_GMAC_MAC_ADDR108_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR108_LOW_ADDR(ALT_EMAC0_ADDR)
834 /* The address of the ALT_EMAC_GMAC_MAC_ADDR109_HIGH register for the ALT_EMAC0 instance. */
835 #define ALT_EMAC0_GMAC_MAC_ADDR109_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR109_HIGH_ADDR(ALT_EMAC0_ADDR)
836 /* The address of the ALT_EMAC_GMAC_MAC_ADDR109_LOW register for the ALT_EMAC0 instance. */
837 #define ALT_EMAC0_GMAC_MAC_ADDR109_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR109_LOW_ADDR(ALT_EMAC0_ADDR)
838 /* The address of the ALT_EMAC_GMAC_MAC_ADDR110_HIGH register for the ALT_EMAC0 instance. */
839 #define ALT_EMAC0_GMAC_MAC_ADDR110_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR110_HIGH_ADDR(ALT_EMAC0_ADDR)
840 /* The address of the ALT_EMAC_GMAC_MAC_ADDR110_LOW register for the ALT_EMAC0 instance. */
841 #define ALT_EMAC0_GMAC_MAC_ADDR110_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR110_LOW_ADDR(ALT_EMAC0_ADDR)
842 /* The address of the ALT_EMAC_GMAC_MAC_ADDR111_HIGH register for the ALT_EMAC0 instance. */
843 #define ALT_EMAC0_GMAC_MAC_ADDR111_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR111_HIGH_ADDR(ALT_EMAC0_ADDR)
844 /* The address of the ALT_EMAC_GMAC_MAC_ADDR111_LOW register for the ALT_EMAC0 instance. */
845 #define ALT_EMAC0_GMAC_MAC_ADDR111_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR111_LOW_ADDR(ALT_EMAC0_ADDR)
846 /* The address of the ALT_EMAC_GMAC_MAC_ADDR112_HIGH register for the ALT_EMAC0 instance. */
847 #define ALT_EMAC0_GMAC_MAC_ADDR112_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR112_HIGH_ADDR(ALT_EMAC0_ADDR)
848 /* The address of the ALT_EMAC_GMAC_MAC_ADDR112_LOW register for the ALT_EMAC0 instance. */
849 #define ALT_EMAC0_GMAC_MAC_ADDR112_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR112_LOW_ADDR(ALT_EMAC0_ADDR)
850 /* The address of the ALT_EMAC_GMAC_MAC_ADDR113_HIGH register for the ALT_EMAC0 instance. */
851 #define ALT_EMAC0_GMAC_MAC_ADDR113_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR113_HIGH_ADDR(ALT_EMAC0_ADDR)
852 /* The address of the ALT_EMAC_GMAC_MAC_ADDR113_LOW register for the ALT_EMAC0 instance. */
853 #define ALT_EMAC0_GMAC_MAC_ADDR113_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR113_LOW_ADDR(ALT_EMAC0_ADDR)
854 /* The address of the ALT_EMAC_GMAC_MAC_ADDR114_HIGH register for the ALT_EMAC0 instance. */
855 #define ALT_EMAC0_GMAC_MAC_ADDR114_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR114_HIGH_ADDR(ALT_EMAC0_ADDR)
856 /* The address of the ALT_EMAC_GMAC_MAC_ADDR114_LOW register for the ALT_EMAC0 instance. */
857 #define ALT_EMAC0_GMAC_MAC_ADDR114_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR114_LOW_ADDR(ALT_EMAC0_ADDR)
858 /* The address of the ALT_EMAC_GMAC_MAC_ADDR115_HIGH register for the ALT_EMAC0 instance. */
859 #define ALT_EMAC0_GMAC_MAC_ADDR115_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR115_HIGH_ADDR(ALT_EMAC0_ADDR)
860 /* The address of the ALT_EMAC_GMAC_MAC_ADDR115_LOW register for the ALT_EMAC0 instance. */
861 #define ALT_EMAC0_GMAC_MAC_ADDR115_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR115_LOW_ADDR(ALT_EMAC0_ADDR)
862 /* The address of the ALT_EMAC_GMAC_MAC_ADDR116_HIGH register for the ALT_EMAC0 instance. */
863 #define ALT_EMAC0_GMAC_MAC_ADDR116_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR116_HIGH_ADDR(ALT_EMAC0_ADDR)
864 /* The address of the ALT_EMAC_GMAC_MAC_ADDR116_LOW register for the ALT_EMAC0 instance. */
865 #define ALT_EMAC0_GMAC_MAC_ADDR116_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR116_LOW_ADDR(ALT_EMAC0_ADDR)
866 /* The address of the ALT_EMAC_GMAC_MAC_ADDR117_HIGH register for the ALT_EMAC0 instance. */
867 #define ALT_EMAC0_GMAC_MAC_ADDR117_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR117_HIGH_ADDR(ALT_EMAC0_ADDR)
868 /* The address of the ALT_EMAC_GMAC_MAC_ADDR117_LOW register for the ALT_EMAC0 instance. */
869 #define ALT_EMAC0_GMAC_MAC_ADDR117_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR117_LOW_ADDR(ALT_EMAC0_ADDR)
870 /* The address of the ALT_EMAC_GMAC_MAC_ADDR118_HIGH register for the ALT_EMAC0 instance. */
871 #define ALT_EMAC0_GMAC_MAC_ADDR118_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR118_HIGH_ADDR(ALT_EMAC0_ADDR)
872 /* The address of the ALT_EMAC_GMAC_MAC_ADDR118_LOW register for the ALT_EMAC0 instance. */
873 #define ALT_EMAC0_GMAC_MAC_ADDR118_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR118_LOW_ADDR(ALT_EMAC0_ADDR)
874 /* The address of the ALT_EMAC_GMAC_MAC_ADDR119_HIGH register for the ALT_EMAC0 instance. */
875 #define ALT_EMAC0_GMAC_MAC_ADDR119_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR119_HIGH_ADDR(ALT_EMAC0_ADDR)
876 /* The address of the ALT_EMAC_GMAC_MAC_ADDR119_LOW register for the ALT_EMAC0 instance. */
877 #define ALT_EMAC0_GMAC_MAC_ADDR119_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR119_LOW_ADDR(ALT_EMAC0_ADDR)
878 /* The address of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH register for the ALT_EMAC0 instance. */
879 #define ALT_EMAC0_GMAC_MAC_ADDR120_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDR(ALT_EMAC0_ADDR)
880 /* The address of the ALT_EMAC_GMAC_MAC_ADDR120_LOW register for the ALT_EMAC0 instance. */
881 #define ALT_EMAC0_GMAC_MAC_ADDR120_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR120_LOW_ADDR(ALT_EMAC0_ADDR)
882 /* The address of the ALT_EMAC_GMAC_MAC_ADDR121_HIGH register for the ALT_EMAC0 instance. */
883 #define ALT_EMAC0_GMAC_MAC_ADDR121_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR121_HIGH_ADDR(ALT_EMAC0_ADDR)
884 /* The address of the ALT_EMAC_GMAC_MAC_ADDR121_LOW register for the ALT_EMAC0 instance. */
885 #define ALT_EMAC0_GMAC_MAC_ADDR121_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR121_LOW_ADDR(ALT_EMAC0_ADDR)
886 /* The address of the ALT_EMAC_GMAC_MAC_ADDR122_HIGH register for the ALT_EMAC0 instance. */
887 #define ALT_EMAC0_GMAC_MAC_ADDR122_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR122_HIGH_ADDR(ALT_EMAC0_ADDR)
888 /* The address of the ALT_EMAC_GMAC_MAC_ADDR122_LOW register for the ALT_EMAC0 instance. */
889 #define ALT_EMAC0_GMAC_MAC_ADDR122_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR122_LOW_ADDR(ALT_EMAC0_ADDR)
890 /* The address of the ALT_EMAC_GMAC_MAC_ADDR123_HIGH register for the ALT_EMAC0 instance. */
891 #define ALT_EMAC0_GMAC_MAC_ADDR123_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR123_HIGH_ADDR(ALT_EMAC0_ADDR)
892 /* The address of the ALT_EMAC_GMAC_MAC_ADDR123_LOW register for the ALT_EMAC0 instance. */
893 #define ALT_EMAC0_GMAC_MAC_ADDR123_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR123_LOW_ADDR(ALT_EMAC0_ADDR)
894 /* The address of the ALT_EMAC_GMAC_MAC_ADDR124_HIGH register for the ALT_EMAC0 instance. */
895 #define ALT_EMAC0_GMAC_MAC_ADDR124_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR124_HIGH_ADDR(ALT_EMAC0_ADDR)
896 /* The address of the ALT_EMAC_GMAC_MAC_ADDR124_LOW register for the ALT_EMAC0 instance. */
897 #define ALT_EMAC0_GMAC_MAC_ADDR124_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR124_LOW_ADDR(ALT_EMAC0_ADDR)
898 /* The address of the ALT_EMAC_GMAC_MAC_ADDR125_HIGH register for the ALT_EMAC0 instance. */
899 #define ALT_EMAC0_GMAC_MAC_ADDR125_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR125_HIGH_ADDR(ALT_EMAC0_ADDR)
900 /* The address of the ALT_EMAC_GMAC_MAC_ADDR125_LOW register for the ALT_EMAC0 instance. */
901 #define ALT_EMAC0_GMAC_MAC_ADDR125_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR125_LOW_ADDR(ALT_EMAC0_ADDR)
902 /* The address of the ALT_EMAC_GMAC_MAC_ADDR126_HIGH register for the ALT_EMAC0 instance. */
903 #define ALT_EMAC0_GMAC_MAC_ADDR126_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR126_HIGH_ADDR(ALT_EMAC0_ADDR)
904 /* The address of the ALT_EMAC_GMAC_MAC_ADDR126_LOW register for the ALT_EMAC0 instance. */
905 #define ALT_EMAC0_GMAC_MAC_ADDR126_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR126_LOW_ADDR(ALT_EMAC0_ADDR)
906 /* The address of the ALT_EMAC_GMAC_MAC_ADDR127_HIGH register for the ALT_EMAC0 instance. */
907 #define ALT_EMAC0_GMAC_MAC_ADDR127_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR127_HIGH_ADDR(ALT_EMAC0_ADDR)
908 /* The address of the ALT_EMAC_GMAC_MAC_ADDR127_LOW register for the ALT_EMAC0 instance. */
909 #define ALT_EMAC0_GMAC_MAC_ADDR127_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR127_LOW_ADDR(ALT_EMAC0_ADDR)
910 /* The address of the ALT_EMAC_DMA_BUS_MOD register for the ALT_EMAC0 instance. */
911 #define ALT_EMAC0_DMA_BUS_MOD_ADDR ALT_EMAC_DMA_BUS_MOD_ADDR(ALT_EMAC0_ADDR)
912 /* The address of the ALT_EMAC_DMA_TX_POLL_DEMAND register for the ALT_EMAC0 instance. */
913 #define ALT_EMAC0_DMA_TX_POLL_DEMAND_ADDR ALT_EMAC_DMA_TX_POLL_DEMAND_ADDR(ALT_EMAC0_ADDR)
914 /* The address of the ALT_EMAC_DMA_RX_POLL_DEMAND register for the ALT_EMAC0 instance. */
915 #define ALT_EMAC0_DMA_RX_POLL_DEMAND_ADDR ALT_EMAC_DMA_RX_POLL_DEMAND_ADDR(ALT_EMAC0_ADDR)
916 /* The address of the ALT_EMAC_DMA_RX_DESC_LIST_ADDR register for the ALT_EMAC0 instance. */
917 #define ALT_EMAC0_DMA_RX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_RX_DESC_LIST_ADDR_ADDR(ALT_EMAC0_ADDR)
918 /* The address of the ALT_EMAC_DMA_TX_DESC_LIST_ADDR register for the ALT_EMAC0 instance. */
919 #define ALT_EMAC0_DMA_TX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_TX_DESC_LIST_ADDR_ADDR(ALT_EMAC0_ADDR)
920 /* The address of the ALT_EMAC_DMA_STAT register for the ALT_EMAC0 instance. */
921 #define ALT_EMAC0_DMA_STAT_ADDR ALT_EMAC_DMA_STAT_ADDR(ALT_EMAC0_ADDR)
922 /* The address of the ALT_EMAC_DMA_OP_MOD register for the ALT_EMAC0 instance. */
923 #define ALT_EMAC0_DMA_OP_MOD_ADDR ALT_EMAC_DMA_OP_MOD_ADDR(ALT_EMAC0_ADDR)
924 /* The address of the ALT_EMAC_DMA_INT_EN register for the ALT_EMAC0 instance. */
925 #define ALT_EMAC0_DMA_INT_EN_ADDR ALT_EMAC_DMA_INT_EN_ADDR(ALT_EMAC0_ADDR)
926 /* The address of the ALT_EMAC_DMA_MFRM_BUF_OVF_CNTR register for the ALT_EMAC0 instance. */
927 #define ALT_EMAC0_DMA_MISSED_FRM_AND_BUF_OVF_CNTR_ADDR ALT_EMAC_DMA_MFRM_BUF_OVF_CNTR_ADDR(ALT_EMAC0_ADDR)
928 /* The address of the ALT_EMAC_DMA_RX_INT_WDT register for the ALT_EMAC0 instance. */
929 #define ALT_EMAC0_DMA_RX_INT_WDT_ADDR ALT_EMAC_DMA_RX_INT_WDT_ADDR(ALT_EMAC0_ADDR)
930 /* The address of the ALT_EMAC_DMA_AXI_BUS_MOD register for the ALT_EMAC0 instance. */
931 #define ALT_EMAC0_DMA_AXI_BUS_MOD_ADDR ALT_EMAC_DMA_AXI_BUS_MOD_ADDR(ALT_EMAC0_ADDR)
932 /* The address of the ALT_EMAC_DMA_AHB_OR_AXI_STAT register for the ALT_EMAC0 instance. */
933 #define ALT_EMAC0_DMA_AHB_OR_AXI_STAT_ADDR ALT_EMAC_DMA_AHB_OR_AXI_STAT_ADDR(ALT_EMAC0_ADDR)
934 /* The address of the ALT_EMAC_DMA_CUR_HOST_TX_DESC register for the ALT_EMAC0 instance. */
935 #define ALT_EMAC0_DMA_CUR_HOST_TX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_TX_DESC_ADDR(ALT_EMAC0_ADDR)
936 /* The address of the ALT_EMAC_DMA_CUR_HOST_RX_DESC register for the ALT_EMAC0 instance. */
937 #define ALT_EMAC0_DMA_CUR_HOST_RX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_RX_DESC_ADDR(ALT_EMAC0_ADDR)
938 /* The address of the ALT_EMAC_DMA_CUR_HOST_TX_BUF_ADDR register for the ALT_EMAC0 instance. */
939 #define ALT_EMAC0_DMA_CUR_HOST_TX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_TX_BUF_ADDR_ADDR(ALT_EMAC0_ADDR)
940 /* The address of the ALT_EMAC_DMA_CUR_HOST_RX_BUF_ADDR register for the ALT_EMAC0 instance. */
941 #define ALT_EMAC0_DMA_CUR_HOST_RX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_RX_BUF_ADDR_ADDR(ALT_EMAC0_ADDR)
942 /* The address of the ALT_EMAC_DMA_HW_FEATURE register for the ALT_EMAC0 instance. */
943 #define ALT_EMAC0_DMA_HW_FEATURE_ADDR ALT_EMAC_DMA_HW_FEATURE_ADDR(ALT_EMAC0_ADDR)
944 /* The base address byte offset for the start of the ALT_EMAC0 component. */
945 #define ALT_EMAC0_OFST 0xff800000
946 /* The start address of the ALT_EMAC0 component. */
947 #define ALT_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_EMAC0_OFST))
948 /* The lower bound address range of the ALT_EMAC0 component. */
949 #define ALT_EMAC0_LB_ADDR ALT_EMAC0_ADDR
950 /* The upper bound address range of the ALT_EMAC0 component. */
951 #define ALT_EMAC0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC0_ADDR) + 0x105c) - 1))
952 
953 
954 /*
955  * Component Instance : i_emac_emac1
956  *
957  * Instance i_emac_emac1 of component ALT_EMAC.
958  *
959  *
960  */
961 /* The address of the ALT_EMAC_GMAC_MAC_CFG register for the ALT_EMAC1 instance. */
962 #define ALT_EMAC1_GMAC_MAC_CFG_ADDR ALT_EMAC_GMAC_MAC_CFG_ADDR(ALT_EMAC1_ADDR)
963 /* The address of the ALT_EMAC_GMAC_MAC_FRM_FLT register for the ALT_EMAC1 instance. */
964 #define ALT_EMAC1_GMAC_MAC_FRM_FLT_ADDR ALT_EMAC_GMAC_MAC_FRM_FLT_ADDR(ALT_EMAC1_ADDR)
965 /* The address of the ALT_EMAC_GMAC_GMII_ADDR register for the ALT_EMAC1 instance. */
966 #define ALT_EMAC1_GMAC_GMII_ADDR_ADDR ALT_EMAC_GMAC_GMII_ADDR_ADDR(ALT_EMAC1_ADDR)
967 /* The address of the ALT_EMAC_GMAC_GMII_DATA register for the ALT_EMAC1 instance. */
968 #define ALT_EMAC1_GMAC_GMII_DATA_ADDR ALT_EMAC_GMAC_GMII_DATA_ADDR(ALT_EMAC1_ADDR)
969 /* The address of the ALT_EMAC_GMAC_FLOW_CTL register for the ALT_EMAC1 instance. */
970 #define ALT_EMAC1_GMAC_FLOW_CTL_ADDR ALT_EMAC_GMAC_FLOW_CTL_ADDR(ALT_EMAC1_ADDR)
971 /* The address of the ALT_EMAC_GMAC_VLAN_TAG register for the ALT_EMAC1 instance. */
972 #define ALT_EMAC1_GMAC_VLAN_TAG_ADDR ALT_EMAC_GMAC_VLAN_TAG_ADDR(ALT_EMAC1_ADDR)
973 /* The address of the ALT_EMAC_GMAC_VER register for the ALT_EMAC1 instance. */
974 #define ALT_EMAC1_GMAC_VER_ADDR ALT_EMAC_GMAC_VER_ADDR(ALT_EMAC1_ADDR)
975 /* The address of the ALT_EMAC_GMAC_DBG register for the ALT_EMAC1 instance. */
976 #define ALT_EMAC1_GMAC_DBG_ADDR ALT_EMAC_GMAC_DBG_ADDR(ALT_EMAC1_ADDR)
977 /* The address of the ALT_EMAC_GMAC_LPI_CTL_STAT register for the ALT_EMAC1 instance. */
978 #define ALT_EMAC1_GMAC_LPI_CTL_STAT_ADDR ALT_EMAC_GMAC_LPI_CTL_STAT_ADDR(ALT_EMAC1_ADDR)
979 /* The address of the ALT_EMAC_GMAC_LPI_TMRS_CTL register for the ALT_EMAC1 instance. */
980 #define ALT_EMAC1_GMAC_LPI_TMRS_CTL_ADDR ALT_EMAC_GMAC_LPI_TMRS_CTL_ADDR(ALT_EMAC1_ADDR)
981 /* The address of the ALT_EMAC_GMAC_INT_STAT register for the ALT_EMAC1 instance. */
982 #define ALT_EMAC1_GMAC_INT_STAT_ADDR ALT_EMAC_GMAC_INT_STAT_ADDR(ALT_EMAC1_ADDR)
983 /* The address of the ALT_EMAC_GMAC_INT_MSK register for the ALT_EMAC1 instance. */
984 #define ALT_EMAC1_GMAC_INT_MSK_ADDR ALT_EMAC_GMAC_INT_MSK_ADDR(ALT_EMAC1_ADDR)
985 /* The address of the ALT_EMAC_GMAC_MAC_ADDR0_HIGH register for the ALT_EMAC1 instance. */
986 #define ALT_EMAC1_GMAC_MAC_ADDR0_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR0_HIGH_ADDR(ALT_EMAC1_ADDR)
987 /* The address of the ALT_EMAC_GMAC_MAC_ADDR0_LOW register for the ALT_EMAC1 instance. */
988 #define ALT_EMAC1_GMAC_MAC_ADDR0_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR0_LOW_ADDR(ALT_EMAC1_ADDR)
989 /* The address of the ALT_EMAC_GMAC_MAC_ADDR1_HIGH register for the ALT_EMAC1 instance. */
990 #define ALT_EMAC1_GMAC_MAC_ADDR1_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR1_HIGH_ADDR(ALT_EMAC1_ADDR)
991 /* The address of the ALT_EMAC_GMAC_MAC_ADDR1_LOW register for the ALT_EMAC1 instance. */
992 #define ALT_EMAC1_GMAC_MAC_ADDR1_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR1_LOW_ADDR(ALT_EMAC1_ADDR)
993 /* The address of the ALT_EMAC_GMAC_MAC_ADDR2_HIGH register for the ALT_EMAC1 instance. */
994 #define ALT_EMAC1_GMAC_MAC_ADDR2_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR2_HIGH_ADDR(ALT_EMAC1_ADDR)
995 /* The address of the ALT_EMAC_GMAC_MAC_ADDR2_LOW register for the ALT_EMAC1 instance. */
996 #define ALT_EMAC1_GMAC_MAC_ADDR2_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR2_LOW_ADDR(ALT_EMAC1_ADDR)
997 /* The address of the ALT_EMAC_GMAC_MAC_ADDR3_HIGH register for the ALT_EMAC1 instance. */
998 #define ALT_EMAC1_GMAC_MAC_ADDR3_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR3_HIGH_ADDR(ALT_EMAC1_ADDR)
999 /* The address of the ALT_EMAC_GMAC_MAC_ADDR3_LOW register for the ALT_EMAC1 instance. */
1000 #define ALT_EMAC1_GMAC_MAC_ADDR3_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR3_LOW_ADDR(ALT_EMAC1_ADDR)
1001 /* The address of the ALT_EMAC_GMAC_MAC_ADDR4_HIGH register for the ALT_EMAC1 instance. */
1002 #define ALT_EMAC1_GMAC_MAC_ADDR4_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR4_HIGH_ADDR(ALT_EMAC1_ADDR)
1003 /* The address of the ALT_EMAC_GMAC_MAC_ADDR4_LOW register for the ALT_EMAC1 instance. */
1004 #define ALT_EMAC1_GMAC_MAC_ADDR4_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR4_LOW_ADDR(ALT_EMAC1_ADDR)
1005 /* The address of the ALT_EMAC_GMAC_MAC_ADDR5_HIGH register for the ALT_EMAC1 instance. */
1006 #define ALT_EMAC1_GMAC_MAC_ADDR5_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR5_HIGH_ADDR(ALT_EMAC1_ADDR)
1007 /* The address of the ALT_EMAC_GMAC_MAC_ADDR5_LOW register for the ALT_EMAC1 instance. */
1008 #define ALT_EMAC1_GMAC_MAC_ADDR5_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR5_LOW_ADDR(ALT_EMAC1_ADDR)
1009 /* The address of the ALT_EMAC_GMAC_MAC_ADDR6_HIGH register for the ALT_EMAC1 instance. */
1010 #define ALT_EMAC1_GMAC_MAC_ADDR6_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR6_HIGH_ADDR(ALT_EMAC1_ADDR)
1011 /* The address of the ALT_EMAC_GMAC_MAC_ADDR6_LOW register for the ALT_EMAC1 instance. */
1012 #define ALT_EMAC1_GMAC_MAC_ADDR6_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR6_LOW_ADDR(ALT_EMAC1_ADDR)
1013 /* The address of the ALT_EMAC_GMAC_MAC_ADDR7_HIGH register for the ALT_EMAC1 instance. */
1014 #define ALT_EMAC1_GMAC_MAC_ADDR7_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR7_HIGH_ADDR(ALT_EMAC1_ADDR)
1015 /* The address of the ALT_EMAC_GMAC_MAC_ADDR7_LOW register for the ALT_EMAC1 instance. */
1016 #define ALT_EMAC1_GMAC_MAC_ADDR7_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR7_LOW_ADDR(ALT_EMAC1_ADDR)
1017 /* The address of the ALT_EMAC_GMAC_MAC_ADDR8_HIGH register for the ALT_EMAC1 instance. */
1018 #define ALT_EMAC1_GMAC_MAC_ADDR8_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR8_HIGH_ADDR(ALT_EMAC1_ADDR)
1019 /* The address of the ALT_EMAC_GMAC_MAC_ADDR8_LOW register for the ALT_EMAC1 instance. */
1020 #define ALT_EMAC1_GMAC_MAC_ADDR8_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR8_LOW_ADDR(ALT_EMAC1_ADDR)
1021 /* The address of the ALT_EMAC_GMAC_MAC_ADDR9_HIGH register for the ALT_EMAC1 instance. */
1022 #define ALT_EMAC1_GMAC_MAC_ADDR9_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR9_HIGH_ADDR(ALT_EMAC1_ADDR)
1023 /* The address of the ALT_EMAC_GMAC_MAC_ADDR9_LOW register for the ALT_EMAC1 instance. */
1024 #define ALT_EMAC1_GMAC_MAC_ADDR9_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR9_LOW_ADDR(ALT_EMAC1_ADDR)
1025 /* The address of the ALT_EMAC_GMAC_MAC_ADDR10_HIGH register for the ALT_EMAC1 instance. */
1026 #define ALT_EMAC1_GMAC_MAC_ADDR10_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR10_HIGH_ADDR(ALT_EMAC1_ADDR)
1027 /* The address of the ALT_EMAC_GMAC_MAC_ADDR10_LOW register for the ALT_EMAC1 instance. */
1028 #define ALT_EMAC1_GMAC_MAC_ADDR10_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR10_LOW_ADDR(ALT_EMAC1_ADDR)
1029 /* The address of the ALT_EMAC_GMAC_MAC_ADDR11_HIGH register for the ALT_EMAC1 instance. */
1030 #define ALT_EMAC1_GMAC_MAC_ADDR11_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR11_HIGH_ADDR(ALT_EMAC1_ADDR)
1031 /* The address of the ALT_EMAC_GMAC_MAC_ADDR11_LOW register for the ALT_EMAC1 instance. */
1032 #define ALT_EMAC1_GMAC_MAC_ADDR11_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR11_LOW_ADDR(ALT_EMAC1_ADDR)
1033 /* The address of the ALT_EMAC_GMAC_MAC_ADDR12_HIGH register for the ALT_EMAC1 instance. */
1034 #define ALT_EMAC1_GMAC_MAC_ADDR12_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR12_HIGH_ADDR(ALT_EMAC1_ADDR)
1035 /* The address of the ALT_EMAC_GMAC_MAC_ADDR12_LOW register for the ALT_EMAC1 instance. */
1036 #define ALT_EMAC1_GMAC_MAC_ADDR12_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR12_LOW_ADDR(ALT_EMAC1_ADDR)
1037 /* The address of the ALT_EMAC_GMAC_MAC_ADDR13_HIGH register for the ALT_EMAC1 instance. */
1038 #define ALT_EMAC1_GMAC_MAC_ADDR13_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR13_HIGH_ADDR(ALT_EMAC1_ADDR)
1039 /* The address of the ALT_EMAC_GMAC_MAC_ADDR13_LOW register for the ALT_EMAC1 instance. */
1040 #define ALT_EMAC1_GMAC_MAC_ADDR13_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR13_LOW_ADDR(ALT_EMAC1_ADDR)
1041 /* The address of the ALT_EMAC_GMAC_MAC_ADDR14_HIGH register for the ALT_EMAC1 instance. */
1042 #define ALT_EMAC1_GMAC_MAC_ADDR14_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR14_HIGH_ADDR(ALT_EMAC1_ADDR)
1043 /* The address of the ALT_EMAC_GMAC_MAC_ADDR14_LOW register for the ALT_EMAC1 instance. */
1044 #define ALT_EMAC1_GMAC_MAC_ADDR14_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR14_LOW_ADDR(ALT_EMAC1_ADDR)
1045 /* The address of the ALT_EMAC_GMAC_MAC_ADDR15_HIGH register for the ALT_EMAC1 instance. */
1046 #define ALT_EMAC1_GMAC_MAC_ADDR15_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR15_HIGH_ADDR(ALT_EMAC1_ADDR)
1047 /* The address of the ALT_EMAC_GMAC_MAC_ADDR15_LOW register for the ALT_EMAC1 instance. */
1048 #define ALT_EMAC1_GMAC_MAC_ADDR15_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR15_LOW_ADDR(ALT_EMAC1_ADDR)
1049 /* The address of the ALT_EMAC_GMAC_MII_CTL_STAT register for the ALT_EMAC1 instance. */
1050 #define ALT_EMAC1_GMAC_SGMII_RGMII_SMII_CTL_STAT_ADDR ALT_EMAC_GMAC_MII_CTL_STAT_ADDR(ALT_EMAC1_ADDR)
1051 /* The address of the ALT_EMAC_GMAC_WDOG_TMO register for the ALT_EMAC1 instance. */
1052 #define ALT_EMAC1_GMAC_WDOG_TMO_ADDR ALT_EMAC_GMAC_WDOG_TMO_ADDR(ALT_EMAC1_ADDR)
1053 /* The address of the ALT_EMAC_GMAC_GENPIO register for the ALT_EMAC1 instance. */
1054 #define ALT_EMAC1_GMAC_GENPIO_ADDR ALT_EMAC_GMAC_GENPIO_ADDR(ALT_EMAC1_ADDR)
1055 /* The address of the ALT_EMAC_GMAC_MMC_CTL register for the ALT_EMAC1 instance. */
1056 #define ALT_EMAC1_GMAC_MMC_CTL_ADDR ALT_EMAC_GMAC_MMC_CTL_ADDR(ALT_EMAC1_ADDR)
1057 /* The address of the ALT_EMAC_GMAC_MMC_RX_INT register for the ALT_EMAC1 instance. */
1058 #define ALT_EMAC1_GMAC_MMC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_RX_INT_ADDR(ALT_EMAC1_ADDR)
1059 /* The address of the ALT_EMAC_GMAC_MMC_TX_INT register for the ALT_EMAC1 instance. */
1060 #define ALT_EMAC1_GMAC_MMC_TX_INT_ADDR ALT_EMAC_GMAC_MMC_TX_INT_ADDR(ALT_EMAC1_ADDR)
1061 /* The address of the ALT_EMAC_GMAC_MMC_RX_INT_MSK register for the ALT_EMAC1 instance. */
1062 #define ALT_EMAC1_GMAC_MMC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_RX_INT_MSK_ADDR(ALT_EMAC1_ADDR)
1063 /* The address of the ALT_EMAC_GMAC_MMC_TX_INT_MSK register for the ALT_EMAC1 instance. */
1064 #define ALT_EMAC1_GMAC_MMC_TX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_TX_INT_MSK_ADDR(ALT_EMAC1_ADDR)
1065 /* The address of the ALT_EMAC_GMAC_TXOCTETCOUNT_GB register for the ALT_EMAC1 instance. */
1066 #define ALT_EMAC1_GMAC_TXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_TXOCTETCOUNT_GB_ADDR(ALT_EMAC1_ADDR)
1067 /* The address of the ALT_EMAC_GMAC_TXFRMCOUNT_GB register for the ALT_EMAC1 instance. */
1068 #define ALT_EMAC1_GMAC_TXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_GB_ADDR(ALT_EMAC1_ADDR)
1069 /* The address of the ALT_EMAC_GMAC_TXBCASTFRMS_G register for the ALT_EMAC1 instance. */
1070 #define ALT_EMAC1_GMAC_TXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_G_ADDR(ALT_EMAC1_ADDR)
1071 /* The address of the ALT_EMAC_GMAC_TXMCASTFRMS_G register for the ALT_EMAC1 instance. */
1072 #define ALT_EMAC1_GMAC_TXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_G_ADDR(ALT_EMAC1_ADDR)
1073 /* The address of the ALT_EMAC_GMAC_TX64OCTETS_GB register for the ALT_EMAC1 instance. */
1074 #define ALT_EMAC1_GMAC_TX64OCTETS_GB_ADDR ALT_EMAC_GMAC_TX64OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1075 /* The address of the ALT_EMAC_GMAC_TX65TO127OCTETS_GB register for the ALT_EMAC1 instance. */
1076 #define ALT_EMAC1_GMAC_TX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_TX65TO127OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1077 /* The address of the ALT_EMAC_GMAC_TX128TO255OCTETS_GB register for the ALT_EMAC1 instance. */
1078 #define ALT_EMAC1_GMAC_TX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_TX128TO255OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1079 /* The address of the ALT_EMAC_GMAC_TX256TO511OCTETS_GB register for the ALT_EMAC1 instance. */
1080 #define ALT_EMAC1_GMAC_TX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_TX256TO511OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1081 /* The address of the ALT_EMAC_GMAC_TX512TO1023OCTETS_GB register for the ALT_EMAC1 instance. */
1082 #define ALT_EMAC1_GMAC_TX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_TX512TO1023OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1083 /* The address of the ALT_EMAC_GMAC_TX1024TOMAXOCTETS_GB register for the ALT_EMAC1 instance. */
1084 #define ALT_EMAC1_GMAC_TX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_TX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1085 /* The address of the ALT_EMAC_GMAC_TXUNICASTFRMS_GB register for the ALT_EMAC1 instance. */
1086 #define ALT_EMAC1_GMAC_TXUNICASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXUNICASTFRMS_GB_ADDR(ALT_EMAC1_ADDR)
1087 /* The address of the ALT_EMAC_GMAC_TXMCASTFRMS_GB register for the ALT_EMAC1 instance. */
1088 #define ALT_EMAC1_GMAC_TXMCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_GB_ADDR(ALT_EMAC1_ADDR)
1089 /* The address of the ALT_EMAC_GMAC_TXBCASTFRMS_GB register for the ALT_EMAC1 instance. */
1090 #define ALT_EMAC1_GMAC_TXBCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_GB_ADDR(ALT_EMAC1_ADDR)
1091 /* The address of the ALT_EMAC_GMAC_TXUNDERFLOWERROR register for the ALT_EMAC1 instance. */
1092 #define ALT_EMAC1_GMAC_TXUNDERFLOWERROR_ADDR ALT_EMAC_GMAC_TXUNDERFLOWERROR_ADDR(ALT_EMAC1_ADDR)
1093 /* The address of the ALT_EMAC_GMAC_TXSINGLECOL_G register for the ALT_EMAC1 instance. */
1094 #define ALT_EMAC1_GMAC_TXSINGLECOL_G_ADDR ALT_EMAC_GMAC_TXSINGLECOL_G_ADDR(ALT_EMAC1_ADDR)
1095 /* The address of the ALT_EMAC_GMAC_TXMULTICOL_G register for the ALT_EMAC1 instance. */
1096 #define ALT_EMAC1_GMAC_TXMULTICOL_G_ADDR ALT_EMAC_GMAC_TXMULTICOL_G_ADDR(ALT_EMAC1_ADDR)
1097 /* The address of the ALT_EMAC_GMAC_TXDEFERRED register for the ALT_EMAC1 instance. */
1098 #define ALT_EMAC1_GMAC_TXDEFERRED_ADDR ALT_EMAC_GMAC_TXDEFERRED_ADDR(ALT_EMAC1_ADDR)
1099 /* The address of the ALT_EMAC_GMAC_TXLATECOL register for the ALT_EMAC1 instance. */
1100 #define ALT_EMAC1_GMAC_TXLATECOL_ADDR ALT_EMAC_GMAC_TXLATECOL_ADDR(ALT_EMAC1_ADDR)
1101 /* The address of the ALT_EMAC_GMAC_TXEXESSCOL register for the ALT_EMAC1 instance. */
1102 #define ALT_EMAC1_GMAC_TXEXESSCOL_ADDR ALT_EMAC_GMAC_TXEXESSCOL_ADDR(ALT_EMAC1_ADDR)
1103 /* The address of the ALT_EMAC_GMAC_TXCARRIERERR register for the ALT_EMAC1 instance. */
1104 #define ALT_EMAC1_GMAC_TXCARRIERERR_ADDR ALT_EMAC_GMAC_TXCARRIERERR_ADDR(ALT_EMAC1_ADDR)
1105 /* The address of the ALT_EMAC_GMAC_TXOCTETCNT register for the ALT_EMAC1 instance. */
1106 #define ALT_EMAC1_GMAC_TXOCTETCNT_ADDR ALT_EMAC_GMAC_TXOCTETCNT_ADDR(ALT_EMAC1_ADDR)
1107 /* The address of the ALT_EMAC_GMAC_TXFRMCOUNT_G register for the ALT_EMAC1 instance. */
1108 #define ALT_EMAC1_GMAC_TXFRMCOUNT_G_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_G_ADDR(ALT_EMAC1_ADDR)
1109 /* The address of the ALT_EMAC_GMAC_TXEXCESSDEF register for the ALT_EMAC1 instance. */
1110 #define ALT_EMAC1_GMAC_TXEXCESSDEF_ADDR ALT_EMAC_GMAC_TXEXCESSDEF_ADDR(ALT_EMAC1_ADDR)
1111 /* The address of the ALT_EMAC_GMAC_TXPAUSEFRMS register for the ALT_EMAC1 instance. */
1112 #define ALT_EMAC1_GMAC_TXPAUSEFRMS_ADDR ALT_EMAC_GMAC_TXPAUSEFRMS_ADDR(ALT_EMAC1_ADDR)
1113 /* The address of the ALT_EMAC_GMAC_TXVLANFRMS_G register for the ALT_EMAC1 instance. */
1114 #define ALT_EMAC1_GMAC_TXVLANFRMS_G_ADDR ALT_EMAC_GMAC_TXVLANFRMS_G_ADDR(ALT_EMAC1_ADDR)
1115 /* The address of the ALT_EMAC_GMAC_TXOVERSIZE_G register for the ALT_EMAC1 instance. */
1116 #define ALT_EMAC1_GMAC_TXOVERSIZE_G_ADDR ALT_EMAC_GMAC_TXOVERSIZE_G_ADDR(ALT_EMAC1_ADDR)
1117 /* The address of the ALT_EMAC_GMAC_RXFRMCOUNT_GB register for the ALT_EMAC1 instance. */
1118 #define ALT_EMAC1_GMAC_RXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_RXFRMCOUNT_GB_ADDR(ALT_EMAC1_ADDR)
1119 /* The address of the ALT_EMAC_GMAC_RXOCTETCOUNT_GB register for the ALT_EMAC1 instance. */
1120 #define ALT_EMAC1_GMAC_RXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_GB_ADDR(ALT_EMAC1_ADDR)
1121 /* The address of the ALT_EMAC_GMAC_RXOCTETCOUNT_G register for the ALT_EMAC1 instance. */
1122 #define ALT_EMAC1_GMAC_RXOCTETCOUNT_G_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_G_ADDR(ALT_EMAC1_ADDR)
1123 /* The address of the ALT_EMAC_GMAC_RXBCASTFRMS_G register for the ALT_EMAC1 instance. */
1124 #define ALT_EMAC1_GMAC_RXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXBCASTFRMS_G_ADDR(ALT_EMAC1_ADDR)
1125 /* The address of the ALT_EMAC_GMAC_RXMCASTFRMS_G register for the ALT_EMAC1 instance. */
1126 #define ALT_EMAC1_GMAC_RXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXMCASTFRMS_G_ADDR(ALT_EMAC1_ADDR)
1127 /* The address of the ALT_EMAC_GMAC_RXCRCERROR register for the ALT_EMAC1 instance. */
1128 #define ALT_EMAC1_GMAC_RXCRCERROR_ADDR ALT_EMAC_GMAC_RXCRCERROR_ADDR(ALT_EMAC1_ADDR)
1129 /* The address of the ALT_EMAC_GMAC_RXALIGNMENTERROR register for the ALT_EMAC1 instance. */
1130 #define ALT_EMAC1_GMAC_RXALIGNMENTERROR_ADDR ALT_EMAC_GMAC_RXALIGNMENTERROR_ADDR(ALT_EMAC1_ADDR)
1131 /* The address of the ALT_EMAC_GMAC_RXRUNTERROR register for the ALT_EMAC1 instance. */
1132 #define ALT_EMAC1_GMAC_RXRUNTERROR_ADDR ALT_EMAC_GMAC_RXRUNTERROR_ADDR(ALT_EMAC1_ADDR)
1133 /* The address of the ALT_EMAC_GMAC_RXJABBERERROR register for the ALT_EMAC1 instance. */
1134 #define ALT_EMAC1_GMAC_RXJABBERERROR_ADDR ALT_EMAC_GMAC_RXJABBERERROR_ADDR(ALT_EMAC1_ADDR)
1135 /* The address of the ALT_EMAC_GMAC_RXUNDERSIZE_G register for the ALT_EMAC1 instance. */
1136 #define ALT_EMAC1_GMAC_RXUNDERSIZE_G_ADDR ALT_EMAC_GMAC_RXUNDERSIZE_G_ADDR(ALT_EMAC1_ADDR)
1137 /* The address of the ALT_EMAC_GMAC_RXOVERSIZE_G register for the ALT_EMAC1 instance. */
1138 #define ALT_EMAC1_GMAC_RXOVERSIZE_G_ADDR ALT_EMAC_GMAC_RXOVERSIZE_G_ADDR(ALT_EMAC1_ADDR)
1139 /* The address of the ALT_EMAC_GMAC_RX64OCTETS_GB register for the ALT_EMAC1 instance. */
1140 #define ALT_EMAC1_GMAC_RX64OCTETS_GB_ADDR ALT_EMAC_GMAC_RX64OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1141 /* The address of the ALT_EMAC_GMAC_RX65TO127OCTETS_GB register for the ALT_EMAC1 instance. */
1142 #define ALT_EMAC1_GMAC_RX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_RX65TO127OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1143 /* The address of the ALT_EMAC_GMAC_RX128TO255OCTETS_GB register for the ALT_EMAC1 instance. */
1144 #define ALT_EMAC1_GMAC_RX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_RX128TO255OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1145 /* The address of the ALT_EMAC_GMAC_RX256TO511OCTETS_GB register for the ALT_EMAC1 instance. */
1146 #define ALT_EMAC1_GMAC_RX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_RX256TO511OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1147 /* The address of the ALT_EMAC_GMAC_RX512TO1023OCTETS_GB register for the ALT_EMAC1 instance. */
1148 #define ALT_EMAC1_GMAC_RX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_RX512TO1023OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1149 /* The address of the ALT_EMAC_GMAC_RX1024TOMAXOCTETS_GB register for the ALT_EMAC1 instance. */
1150 #define ALT_EMAC1_GMAC_RX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_RX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1151 /* The address of the ALT_EMAC_GMAC_RXUNICASTFRMS_G register for the ALT_EMAC1 instance. */
1152 #define ALT_EMAC1_GMAC_RXUNICASTFRMS_G_ADDR ALT_EMAC_GMAC_RXUNICASTFRMS_G_ADDR(ALT_EMAC1_ADDR)
1153 /* The address of the ALT_EMAC_GMAC_RXLENERROR register for the ALT_EMAC1 instance. */
1154 #define ALT_EMAC1_GMAC_RXLENERROR_ADDR ALT_EMAC_GMAC_RXLENERROR_ADDR(ALT_EMAC1_ADDR)
1155 /* The address of the ALT_EMAC_GMAC_RXOUTOFRANGETYPE register for the ALT_EMAC1 instance. */
1156 #define ALT_EMAC1_GMAC_RXOUTOFRANGETYPE_ADDR ALT_EMAC_GMAC_RXOUTOFRANGETYPE_ADDR(ALT_EMAC1_ADDR)
1157 /* The address of the ALT_EMAC_GMAC_RXPAUSEFRMS register for the ALT_EMAC1 instance. */
1158 #define ALT_EMAC1_GMAC_RXPAUSEFRMS_ADDR ALT_EMAC_GMAC_RXPAUSEFRMS_ADDR(ALT_EMAC1_ADDR)
1159 /* The address of the ALT_EMAC_GMAC_RXFIFOOVF register for the ALT_EMAC1 instance. */
1160 #define ALT_EMAC1_GMAC_RXFIFOOVF_ADDR ALT_EMAC_GMAC_RXFIFOOVF_ADDR(ALT_EMAC1_ADDR)
1161 /* The address of the ALT_EMAC_GMAC_RXVLANFRMS_GB register for the ALT_EMAC1 instance. */
1162 #define ALT_EMAC1_GMAC_RXVLANFRMS_GB_ADDR ALT_EMAC_GMAC_RXVLANFRMS_GB_ADDR(ALT_EMAC1_ADDR)
1163 /* The address of the ALT_EMAC_GMAC_RXWDERROR register for the ALT_EMAC1 instance. */
1164 #define ALT_EMAC1_GMAC_RXWDERROR_ADDR ALT_EMAC_GMAC_RXWDERROR_ADDR(ALT_EMAC1_ADDR)
1165 /* The address of the ALT_EMAC_GMAC_RXRCVERROR register for the ALT_EMAC1 instance. */
1166 #define ALT_EMAC1_GMAC_RXRCVERROR_ADDR ALT_EMAC_GMAC_RXRCVERROR_ADDR(ALT_EMAC1_ADDR)
1167 /* The address of the ALT_EMAC_GMAC_RXCTLFRMS_G register for the ALT_EMAC1 instance. */
1168 #define ALT_EMAC1_GMAC_RXCTLFRMS_G_ADDR ALT_EMAC_GMAC_RXCTLFRMS_G_ADDR(ALT_EMAC1_ADDR)
1169 /* The address of the ALT_EMAC_GMAC_MMC_IPC_RX_INT_MSK register for the ALT_EMAC1 instance. */
1170 #define ALT_EMAC1_GMAC_MMC_IPC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_MSK_ADDR(ALT_EMAC1_ADDR)
1171 /* The address of the ALT_EMAC_GMAC_MMC_IPC_RX_INT register for the ALT_EMAC1 instance. */
1172 #define ALT_EMAC1_GMAC_MMC_IPC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_ADDR(ALT_EMAC1_ADDR)
1173 /* The address of the ALT_EMAC_GMAC_RXIPV4_GD_FRMS register for the ALT_EMAC1 instance. */
1174 #define ALT_EMAC1_GMAC_RXIPV4_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
1175 /* The address of the ALT_EMAC_GMAC_RXIPV4_HDRERR_FRMS register for the ALT_EMAC1 instance. */
1176 #define ALT_EMAC1_GMAC_RXIPV4_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_FRMS_ADDR(ALT_EMAC1_ADDR)
1177 /* The address of the ALT_EMAC_GMAC_RXIPV4_NOPAY_FRMS register for the ALT_EMAC1 instance. */
1178 #define ALT_EMAC1_GMAC_RXIPV4_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_FRMS_ADDR(ALT_EMAC1_ADDR)
1179 /* The address of the ALT_EMAC_GMAC_RXIPV4_FRAG_FRMS register for the ALT_EMAC1 instance. */
1180 #define ALT_EMAC1_GMAC_RXIPV4_FRAG_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_FRMS_ADDR(ALT_EMAC1_ADDR)
1181 /* The address of the ALT_EMAC_GMAC_RXIPV4_UDSBL_FRMS register for the ALT_EMAC1 instance. */
1182 #define ALT_EMAC1_GMAC_RXIPV4_UDSBL_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_FRMS_ADDR(ALT_EMAC1_ADDR)
1183 /* The address of the ALT_EMAC_GMAC_RXIPV6_GD_FRMS register for the ALT_EMAC1 instance. */
1184 #define ALT_EMAC1_GMAC_RXIPV6_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
1185 /* The address of the ALT_EMAC_GMAC_RXIPV6_HDRERR_FRMS register for the ALT_EMAC1 instance. */
1186 #define ALT_EMAC1_GMAC_RXIPV6_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_FRMS_ADDR(ALT_EMAC1_ADDR)
1187 /* The address of the ALT_EMAC_GMAC_RXIPV6_NOPAY_FRMS register for the ALT_EMAC1 instance. */
1188 #define ALT_EMAC1_GMAC_RXIPV6_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_FRMS_ADDR(ALT_EMAC1_ADDR)
1189 /* The address of the ALT_EMAC_GMAC_RXUDP_GD_FRMS register for the ALT_EMAC1 instance. */
1190 #define ALT_EMAC1_GMAC_RXUDP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
1191 /* The address of the ALT_EMAC_GMAC_RXUDP_ERR_FRMS register for the ALT_EMAC1 instance. */
1192 #define ALT_EMAC1_GMAC_RXUDP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_FRMS_ADDR(ALT_EMAC1_ADDR)
1193 /* The address of the ALT_EMAC_GMAC_RXTCP_GD_FRMS register for the ALT_EMAC1 instance. */
1194 #define ALT_EMAC1_GMAC_RXTCP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
1195 /* The address of the ALT_EMAC_GMAC_RXTCP_ERR_FRMS register for the ALT_EMAC1 instance. */
1196 #define ALT_EMAC1_GMAC_RXTCP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_ERR_FRMS_ADDR(ALT_EMAC1_ADDR)
1197 /* The address of the ALT_EMAC_GMAC_RXICMP_GD_FRMS register for the ALT_EMAC1 instance. */
1198 #define ALT_EMAC1_GMAC_RXICMP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
1199 /* The address of the ALT_EMAC_GMAC_RXICMP_ERR_FRMS register for the ALT_EMAC1 instance. */
1200 #define ALT_EMAC1_GMAC_RXICMP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_FRMS_ADDR(ALT_EMAC1_ADDR)
1201 /* The address of the ALT_EMAC_GMAC_RXIPV4_GD_OCTETS register for the ALT_EMAC1 instance. */
1202 #define ALT_EMAC1_GMAC_RXIPV4_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
1203 /* The address of the ALT_EMAC_GMAC_RXIPV4_HDRERR_OCTETS register for the ALT_EMAC1 instance. */
1204 #define ALT_EMAC1_GMAC_RXIPV4_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_OCTETS_ADDR(ALT_EMAC1_ADDR)
1205 /* The address of the ALT_EMAC_GMAC_RXIPV4_NOPAY_OCTETS register for the ALT_EMAC1 instance. */
1206 #define ALT_EMAC1_GMAC_RXIPV4_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_OCTETS_ADDR(ALT_EMAC1_ADDR)
1207 /* The address of the ALT_EMAC_GMAC_RXIPV4_FRAG_OCTETS register for the ALT_EMAC1 instance. */
1208 #define ALT_EMAC1_GMAC_RXIPV4_FRAG_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_OCTETS_ADDR(ALT_EMAC1_ADDR)
1209 /* The address of the ALT_EMAC_GMAC_RXIPV4_UDSBL_OCTETS register for the ALT_EMAC1 instance. */
1210 #define ALT_EMAC1_GMAC_RXIPV4_UDSBL_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_OCTETS_ADDR(ALT_EMAC1_ADDR)
1211 /* The address of the ALT_EMAC_GMAC_RXIPV6_GD_OCTETS register for the ALT_EMAC1 instance. */
1212 #define ALT_EMAC1_GMAC_RXIPV6_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
1213 /* The address of the ALT_EMAC_GMAC_RXIPV6_HDRERR_OCTETS register for the ALT_EMAC1 instance. */
1214 #define ALT_EMAC1_GMAC_RXIPV6_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_OCTETS_ADDR(ALT_EMAC1_ADDR)
1215 /* The address of the ALT_EMAC_GMAC_RXIPV6_NOPAY_OCTETS register for the ALT_EMAC1 instance. */
1216 #define ALT_EMAC1_GMAC_RXIPV6_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_OCTETS_ADDR(ALT_EMAC1_ADDR)
1217 /* The address of the ALT_EMAC_GMAC_RXUDP_GD_OCTETS register for the ALT_EMAC1 instance. */
1218 #define ALT_EMAC1_GMAC_RXUDP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
1219 /* The address of the ALT_EMAC_GMAC_RXUDP_ERR_OCTETS register for the ALT_EMAC1 instance. */
1220 #define ALT_EMAC1_GMAC_RXUDP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_OCTETS_ADDR(ALT_EMAC1_ADDR)
1221 /* The address of the ALT_EMAC_GMAC_RXTCP_GD_OCTETS register for the ALT_EMAC1 instance. */
1222 #define ALT_EMAC1_GMAC_RXTCP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXTCP_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
1223 /* The address of the ALT_EMAC_GMAC_RXTCPERROCTETS register for the ALT_EMAC1 instance. */
1224 #define ALT_EMAC1_GMAC_RXTCPERROCTETS_ADDR ALT_EMAC_GMAC_RXTCPERROCTETS_ADDR(ALT_EMAC1_ADDR)
1225 /* The address of the ALT_EMAC_GMAC_RXICMP_GD_OCTETS register for the ALT_EMAC1 instance. */
1226 #define ALT_EMAC1_GMAC_RXICMP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
1227 /* The address of the ALT_EMAC_GMAC_RXICMP_ERR_OCTETS register for the ALT_EMAC1 instance. */
1228 #define ALT_EMAC1_GMAC_RXICMP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_OCTETS_ADDR(ALT_EMAC1_ADDR)
1229 /* The address of the ALT_EMAC_GMAC_L3_L4_CTL0 register for the ALT_EMAC1 instance. */
1230 #define ALT_EMAC1_GMAC_L3_L4_CTL0_ADDR ALT_EMAC_GMAC_L3_L4_CTL0_ADDR(ALT_EMAC1_ADDR)
1231 /* The address of the ALT_EMAC_GMAC_LYR4_ADDR0 register for the ALT_EMAC1 instance. */
1232 #define ALT_EMAC1_GMAC_LYR4_ADDR0_ADDR ALT_EMAC_GMAC_LYR4_ADDR0_ADDR(ALT_EMAC1_ADDR)
1233 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR0_REG0 register for the ALT_EMAC1 instance. */
1234 #define ALT_EMAC1_GMAC_LYR3_ADDR0_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG0_ADDR(ALT_EMAC1_ADDR)
1235 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR1_REG0 register for the ALT_EMAC1 instance. */
1236 #define ALT_EMAC1_GMAC_LYR3_ADDR1_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG0_ADDR(ALT_EMAC1_ADDR)
1237 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR2_REG0 register for the ALT_EMAC1 instance. */
1238 #define ALT_EMAC1_GMAC_LYR3_ADDR2_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG0_ADDR(ALT_EMAC1_ADDR)
1239 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR3_REG0 register for the ALT_EMAC1 instance. */
1240 #define ALT_EMAC1_GMAC_LYR3_ADDR3_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG0_ADDR(ALT_EMAC1_ADDR)
1241 /* The address of the ALT_EMAC_GMAC_L3_L4_CTL1 register for the ALT_EMAC1 instance. */
1242 #define ALT_EMAC1_GMAC_L3_L4_CTL1_ADDR ALT_EMAC_GMAC_L3_L4_CTL1_ADDR(ALT_EMAC1_ADDR)
1243 /* The address of the ALT_EMAC_GMAC_LYR4_ADDR1 register for the ALT_EMAC1 instance. */
1244 #define ALT_EMAC1_GMAC_LYR4_ADDR1_ADDR ALT_EMAC_GMAC_LYR4_ADDR1_ADDR(ALT_EMAC1_ADDR)
1245 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR0_REG1 register for the ALT_EMAC1 instance. */
1246 #define ALT_EMAC1_GMAC_LYR3_ADDR0_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG1_ADDR(ALT_EMAC1_ADDR)
1247 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR1_REG1 register for the ALT_EMAC1 instance. */
1248 #define ALT_EMAC1_GMAC_LYR3_ADDR1_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG1_ADDR(ALT_EMAC1_ADDR)
1249 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR2_REG1 register for the ALT_EMAC1 instance. */
1250 #define ALT_EMAC1_GMAC_LYR3_ADDR2_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG1_ADDR(ALT_EMAC1_ADDR)
1251 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR3_REG1 register for the ALT_EMAC1 instance. */
1252 #define ALT_EMAC1_GMAC_LYR3_ADDR3_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG1_ADDR(ALT_EMAC1_ADDR)
1253 /* The address of the ALT_EMAC_GMAC_L3_L4_CTL2 register for the ALT_EMAC1 instance. */
1254 #define ALT_EMAC1_GMAC_L3_L4_CTL2_ADDR ALT_EMAC_GMAC_L3_L4_CTL2_ADDR(ALT_EMAC1_ADDR)
1255 /* The address of the ALT_EMAC_GMAC_LYR4_ADDR2 register for the ALT_EMAC1 instance. */
1256 #define ALT_EMAC1_GMAC_LYR4_ADDR2_ADDR ALT_EMAC_GMAC_LYR4_ADDR2_ADDR(ALT_EMAC1_ADDR)
1257 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR0_REG2 register for the ALT_EMAC1 instance. */
1258 #define ALT_EMAC1_GMAC_LYR3_ADDR0_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG2_ADDR(ALT_EMAC1_ADDR)
1259 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR1_REG2 register for the ALT_EMAC1 instance. */
1260 #define ALT_EMAC1_GMAC_LYR3_ADDR1_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG2_ADDR(ALT_EMAC1_ADDR)
1261 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR2_REG2 register for the ALT_EMAC1 instance. */
1262 #define ALT_EMAC1_GMAC_LYR3_ADDR2_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG2_ADDR(ALT_EMAC1_ADDR)
1263 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR3_REG2 register for the ALT_EMAC1 instance. */
1264 #define ALT_EMAC1_GMAC_LYR3_ADDR3_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG2_ADDR(ALT_EMAC1_ADDR)
1265 /* The address of the ALT_EMAC_GMAC_L3_L4_CTL3 register for the ALT_EMAC1 instance. */
1266 #define ALT_EMAC1_GMAC_L3_L4_CTL3_ADDR ALT_EMAC_GMAC_L3_L4_CTL3_ADDR(ALT_EMAC1_ADDR)
1267 /* The address of the ALT_EMAC_GMAC_LYR4_ADDR3 register for the ALT_EMAC1 instance. */
1268 #define ALT_EMAC1_GMAC_LYR4_ADDR3_ADDR ALT_EMAC_GMAC_LYR4_ADDR3_ADDR(ALT_EMAC1_ADDR)
1269 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR0_REG3 register for the ALT_EMAC1 instance. */
1270 #define ALT_EMAC1_GMAC_LYR3_ADDR0_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG3_ADDR(ALT_EMAC1_ADDR)
1271 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR1_REG3 register for the ALT_EMAC1 instance. */
1272 #define ALT_EMAC1_GMAC_LYR3_ADDR1_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG3_ADDR(ALT_EMAC1_ADDR)
1273 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR2_REG3 register for the ALT_EMAC1 instance. */
1274 #define ALT_EMAC1_GMAC_LYR3_ADDR2_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG3_ADDR(ALT_EMAC1_ADDR)
1275 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR3_REG3 register for the ALT_EMAC1 instance. */
1276 #define ALT_EMAC1_GMAC_LYR3_ADDR3_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG3_ADDR(ALT_EMAC1_ADDR)
1277 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG0 register for the ALT_EMAC1 instance. */
1278 #define ALT_EMAC1_GMAC_HASH_TABLE_REG0_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG0_ADDR(ALT_EMAC1_ADDR)
1279 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG1 register for the ALT_EMAC1 instance. */
1280 #define ALT_EMAC1_GMAC_HASH_TABLE_REG1_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG1_ADDR(ALT_EMAC1_ADDR)
1281 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG2 register for the ALT_EMAC1 instance. */
1282 #define ALT_EMAC1_GMAC_HASH_TABLE_REG2_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG2_ADDR(ALT_EMAC1_ADDR)
1283 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG3 register for the ALT_EMAC1 instance. */
1284 #define ALT_EMAC1_GMAC_HASH_TABLE_REG3_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG3_ADDR(ALT_EMAC1_ADDR)
1285 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG4 register for the ALT_EMAC1 instance. */
1286 #define ALT_EMAC1_GMAC_HASH_TABLE_REG4_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG4_ADDR(ALT_EMAC1_ADDR)
1287 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG5 register for the ALT_EMAC1 instance. */
1288 #define ALT_EMAC1_GMAC_HASH_TABLE_REG5_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG5_ADDR(ALT_EMAC1_ADDR)
1289 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG6 register for the ALT_EMAC1 instance. */
1290 #define ALT_EMAC1_GMAC_HASH_TABLE_REG6_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG6_ADDR(ALT_EMAC1_ADDR)
1291 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG7 register for the ALT_EMAC1 instance. */
1292 #define ALT_EMAC1_GMAC_HASH_TABLE_REG7_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG7_ADDR(ALT_EMAC1_ADDR)
1293 /* The address of the ALT_EMAC_GMAC_VLAN_INCL_REG register for the ALT_EMAC1 instance. */
1294 #define ALT_EMAC1_GMAC_VLAN_INCL_REG_ADDR ALT_EMAC_GMAC_VLAN_INCL_REG_ADDR(ALT_EMAC1_ADDR)
1295 /* The address of the ALT_EMAC_GMAC_VLAN_HASH_TABLE_REG register for the ALT_EMAC1 instance. */
1296 #define ALT_EMAC1_GMAC_VLAN_HASH_TABLE_REG_ADDR ALT_EMAC_GMAC_VLAN_HASH_TABLE_REG_ADDR(ALT_EMAC1_ADDR)
1297 /* The address of the ALT_EMAC_GMAC_TS_CTL register for the ALT_EMAC1 instance. */
1298 #define ALT_EMAC1_GMAC_TS_CTL_ADDR ALT_EMAC_GMAC_TS_CTL_ADDR(ALT_EMAC1_ADDR)
1299 /* The address of the ALT_EMAC_GMAC_SUB_SEC_INCREMENT register for the ALT_EMAC1 instance. */
1300 #define ALT_EMAC1_GMAC_SUB_SEC_INCREMENT_ADDR ALT_EMAC_GMAC_SUB_SEC_INCREMENT_ADDR(ALT_EMAC1_ADDR)
1301 /* The address of the ALT_EMAC_GMAC_SYS_TIME_SECS register for the ALT_EMAC1 instance. */
1302 #define ALT_EMAC1_GMAC_SYS_TIME_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_ADDR(ALT_EMAC1_ADDR)
1303 /* The address of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS register for the ALT_EMAC1 instance. */
1304 #define ALT_EMAC1_GMAC_SYS_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_ADDR(ALT_EMAC1_ADDR)
1305 /* The address of the ALT_EMAC_GMAC_SYS_TIME_SECS_UPDATE register for the ALT_EMAC1 instance. */
1306 #define ALT_EMAC1_GMAC_SYS_TIME_SECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_UPDATE_ADDR(ALT_EMAC1_ADDR)
1307 /* The address of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE register for the ALT_EMAC1 instance. */
1308 #define ALT_EMAC1_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR(ALT_EMAC1_ADDR)
1309 /* The address of the ALT_EMAC_GMAC_TS_ADDEND register for the ALT_EMAC1 instance. */
1310 #define ALT_EMAC1_GMAC_TS_ADDEND_ADDR ALT_EMAC_GMAC_TS_ADDEND_ADDR(ALT_EMAC1_ADDR)
1311 /* The address of the ALT_EMAC_GMAC_TGT_TIME_SECS register for the ALT_EMAC1 instance. */
1312 #define ALT_EMAC1_GMAC_TGT_TIME_SECS_ADDR ALT_EMAC_GMAC_TGT_TIME_SECS_ADDR(ALT_EMAC1_ADDR)
1313 /* The address of the ALT_EMAC_GMAC_TGT_TIME_NANOSECS register for the ALT_EMAC1 instance. */
1314 #define ALT_EMAC1_GMAC_TGT_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_TGT_TIME_NANOSECS_ADDR(ALT_EMAC1_ADDR)
1315 /* The address of the ALT_EMAC_GMAC_SYS_TIME_HIGHER_WORD_SECS register for the ALT_EMAC1 instance. */
1316 #define ALT_EMAC1_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR(ALT_EMAC1_ADDR)
1317 /* The address of the ALT_EMAC_GMAC_TS_STAT register for the ALT_EMAC1 instance. */
1318 #define ALT_EMAC1_GMAC_TS_STAT_ADDR ALT_EMAC_GMAC_TS_STAT_ADDR(ALT_EMAC1_ADDR)
1319 /* The address of the ALT_EMAC_GMAC_PPS_CTL register for the ALT_EMAC1 instance. */
1320 #define ALT_EMAC1_GMAC_PPS_CTL_ADDR ALT_EMAC_GMAC_PPS_CTL_ADDR(ALT_EMAC1_ADDR)
1321 /* The address of the ALT_EMAC_GMAC_AUX_TS_NANOSECS register for the ALT_EMAC1 instance. */
1322 #define ALT_EMAC1_GMAC_AUX_TS_NANOSECS_ADDR ALT_EMAC_GMAC_AUX_TS_NANOSECS_ADDR(ALT_EMAC1_ADDR)
1323 /* The address of the ALT_EMAC_GMAC_AUX_TS_SECS register for the ALT_EMAC1 instance. */
1324 #define ALT_EMAC1_GMAC_AUX_TS_SECS_ADDR ALT_EMAC_GMAC_AUX_TS_SECS_ADDR(ALT_EMAC1_ADDR)
1325 /* The address of the ALT_EMAC_GMAC_PPS0_INTERVAL register for the ALT_EMAC1 instance. */
1326 #define ALT_EMAC1_GMAC_PPS0_INTERVAL_ADDR ALT_EMAC_GMAC_PPS0_INTERVAL_ADDR(ALT_EMAC1_ADDR)
1327 /* The address of the ALT_EMAC_GMAC_PPS0_WIDTH register for the ALT_EMAC1 instance. */
1328 #define ALT_EMAC1_GMAC_PPS0_WIDTH_ADDR ALT_EMAC_GMAC_PPS0_WIDTH_ADDR(ALT_EMAC1_ADDR)
1329 /* The address of the ALT_EMAC_GMAC_MAC_ADDR16_HIGH register for the ALT_EMAC1 instance. */
1330 #define ALT_EMAC1_GMAC_MAC_ADDR16_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR16_HIGH_ADDR(ALT_EMAC1_ADDR)
1331 /* The address of the ALT_EMAC_GMAC_MAC_ADDR16_LOW register for the ALT_EMAC1 instance. */
1332 #define ALT_EMAC1_GMAC_MAC_ADDR16_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR16_LOW_ADDR(ALT_EMAC1_ADDR)
1333 /* The address of the ALT_EMAC_GMAC_MAC_ADDR17_HIGH register for the ALT_EMAC1 instance. */
1334 #define ALT_EMAC1_GMAC_MAC_ADDR17_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR17_HIGH_ADDR(ALT_EMAC1_ADDR)
1335 /* The address of the ALT_EMAC_GMAC_MAC_ADDR17_LOW register for the ALT_EMAC1 instance. */
1336 #define ALT_EMAC1_GMAC_MAC_ADDR17_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR17_LOW_ADDR(ALT_EMAC1_ADDR)
1337 /* The address of the ALT_EMAC_GMAC_MAC_ADDR18_HIGH register for the ALT_EMAC1 instance. */
1338 #define ALT_EMAC1_GMAC_MAC_ADDR18_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR18_HIGH_ADDR(ALT_EMAC1_ADDR)
1339 /* The address of the ALT_EMAC_GMAC_MAC_ADDR18_LOW register for the ALT_EMAC1 instance. */
1340 #define ALT_EMAC1_GMAC_MAC_ADDR18_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR18_LOW_ADDR(ALT_EMAC1_ADDR)
1341 /* The address of the ALT_EMAC_GMAC_MAC_ADDR19_HIGH register for the ALT_EMAC1 instance. */
1342 #define ALT_EMAC1_GMAC_MAC_ADDR19_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR19_HIGH_ADDR(ALT_EMAC1_ADDR)
1343 /* The address of the ALT_EMAC_GMAC_MAC_ADDR19_LOW register for the ALT_EMAC1 instance. */
1344 #define ALT_EMAC1_GMAC_MAC_ADDR19_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR19_LOW_ADDR(ALT_EMAC1_ADDR)
1345 /* The address of the ALT_EMAC_GMAC_MAC_ADDR20_HIGH register for the ALT_EMAC1 instance. */
1346 #define ALT_EMAC1_GMAC_MAC_ADDR20_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR20_HIGH_ADDR(ALT_EMAC1_ADDR)
1347 /* The address of the ALT_EMAC_GMAC_MAC_ADDR20_LOW register for the ALT_EMAC1 instance. */
1348 #define ALT_EMAC1_GMAC_MAC_ADDR20_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR20_LOW_ADDR(ALT_EMAC1_ADDR)
1349 /* The address of the ALT_EMAC_GMAC_MAC_ADDR21_HIGH register for the ALT_EMAC1 instance. */
1350 #define ALT_EMAC1_GMAC_MAC_ADDR21_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR21_HIGH_ADDR(ALT_EMAC1_ADDR)
1351 /* The address of the ALT_EMAC_GMAC_MAC_ADDR21_LOW register for the ALT_EMAC1 instance. */
1352 #define ALT_EMAC1_GMAC_MAC_ADDR21_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR21_LOW_ADDR(ALT_EMAC1_ADDR)
1353 /* The address of the ALT_EMAC_GMAC_MAC_ADDR22_HIGH register for the ALT_EMAC1 instance. */
1354 #define ALT_EMAC1_GMAC_MAC_ADDR22_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR22_HIGH_ADDR(ALT_EMAC1_ADDR)
1355 /* The address of the ALT_EMAC_GMAC_MAC_ADDR22_LOW register for the ALT_EMAC1 instance. */
1356 #define ALT_EMAC1_GMAC_MAC_ADDR22_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR22_LOW_ADDR(ALT_EMAC1_ADDR)
1357 /* The address of the ALT_EMAC_GMAC_MAC_ADDR23_HIGH register for the ALT_EMAC1 instance. */
1358 #define ALT_EMAC1_GMAC_MAC_ADDR23_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR23_HIGH_ADDR(ALT_EMAC1_ADDR)
1359 /* The address of the ALT_EMAC_GMAC_MAC_ADDR23_LOW register for the ALT_EMAC1 instance. */
1360 #define ALT_EMAC1_GMAC_MAC_ADDR23_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR23_LOW_ADDR(ALT_EMAC1_ADDR)
1361 /* The address of the ALT_EMAC_GMAC_MAC_ADDR24_HIGH register for the ALT_EMAC1 instance. */
1362 #define ALT_EMAC1_GMAC_MAC_ADDR24_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR24_HIGH_ADDR(ALT_EMAC1_ADDR)
1363 /* The address of the ALT_EMAC_GMAC_MAC_ADDR24_LOW register for the ALT_EMAC1 instance. */
1364 #define ALT_EMAC1_GMAC_MAC_ADDR24_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR24_LOW_ADDR(ALT_EMAC1_ADDR)
1365 /* The address of the ALT_EMAC_GMAC_MAC_ADDR25_HIGH register for the ALT_EMAC1 instance. */
1366 #define ALT_EMAC1_GMAC_MAC_ADDR25_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR25_HIGH_ADDR(ALT_EMAC1_ADDR)
1367 /* The address of the ALT_EMAC_GMAC_MAC_ADDR25_LOW register for the ALT_EMAC1 instance. */
1368 #define ALT_EMAC1_GMAC_MAC_ADDR25_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR25_LOW_ADDR(ALT_EMAC1_ADDR)
1369 /* The address of the ALT_EMAC_GMAC_MAC_ADDR26_HIGH register for the ALT_EMAC1 instance. */
1370 #define ALT_EMAC1_GMAC_MAC_ADDR26_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR26_HIGH_ADDR(ALT_EMAC1_ADDR)
1371 /* The address of the ALT_EMAC_GMAC_MAC_ADDR26_LOW register for the ALT_EMAC1 instance. */
1372 #define ALT_EMAC1_GMAC_MAC_ADDR26_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR26_LOW_ADDR(ALT_EMAC1_ADDR)
1373 /* The address of the ALT_EMAC_GMAC_MAC_ADDR27_HIGH register for the ALT_EMAC1 instance. */
1374 #define ALT_EMAC1_GMAC_MAC_ADDR27_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR27_HIGH_ADDR(ALT_EMAC1_ADDR)
1375 /* The address of the ALT_EMAC_GMAC_MAC_ADDR27_LOW register for the ALT_EMAC1 instance. */
1376 #define ALT_EMAC1_GMAC_MAC_ADDR27_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR27_LOW_ADDR(ALT_EMAC1_ADDR)
1377 /* The address of the ALT_EMAC_GMAC_MAC_ADDR28_HIGH register for the ALT_EMAC1 instance. */
1378 #define ALT_EMAC1_GMAC_MAC_ADDR28_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR28_HIGH_ADDR(ALT_EMAC1_ADDR)
1379 /* The address of the ALT_EMAC_GMAC_MAC_ADDR28_LOW register for the ALT_EMAC1 instance. */
1380 #define ALT_EMAC1_GMAC_MAC_ADDR28_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR28_LOW_ADDR(ALT_EMAC1_ADDR)
1381 /* The address of the ALT_EMAC_GMAC_MAC_ADDR29_HIGH register for the ALT_EMAC1 instance. */
1382 #define ALT_EMAC1_GMAC_MAC_ADDR29_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR29_HIGH_ADDR(ALT_EMAC1_ADDR)
1383 /* The address of the ALT_EMAC_GMAC_MAC_ADDR29_LOW register for the ALT_EMAC1 instance. */
1384 #define ALT_EMAC1_GMAC_MAC_ADDR29_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR29_LOW_ADDR(ALT_EMAC1_ADDR)
1385 /* The address of the ALT_EMAC_GMAC_MAC_ADDR30_HIGH register for the ALT_EMAC1 instance. */
1386 #define ALT_EMAC1_GMAC_MAC_ADDR30_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR30_HIGH_ADDR(ALT_EMAC1_ADDR)
1387 /* The address of the ALT_EMAC_GMAC_MAC_ADDR30_LOW register for the ALT_EMAC1 instance. */
1388 #define ALT_EMAC1_GMAC_MAC_ADDR30_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR30_LOW_ADDR(ALT_EMAC1_ADDR)
1389 /* The address of the ALT_EMAC_GMAC_MAC_ADDR31_HIGH register for the ALT_EMAC1 instance. */
1390 #define ALT_EMAC1_GMAC_MAC_ADDR31_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR31_HIGH_ADDR(ALT_EMAC1_ADDR)
1391 /* The address of the ALT_EMAC_GMAC_MAC_ADDR31_LOW register for the ALT_EMAC1 instance. */
1392 #define ALT_EMAC1_GMAC_MAC_ADDR31_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR31_LOW_ADDR(ALT_EMAC1_ADDR)
1393 /* The address of the ALT_EMAC_GMAC_MAC_ADDR32_HIGH register for the ALT_EMAC1 instance. */
1394 #define ALT_EMAC1_GMAC_MAC_ADDR32_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR32_HIGH_ADDR(ALT_EMAC1_ADDR)
1395 /* The address of the ALT_EMAC_GMAC_MAC_ADDR32_LOW register for the ALT_EMAC1 instance. */
1396 #define ALT_EMAC1_GMAC_MAC_ADDR32_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR32_LOW_ADDR(ALT_EMAC1_ADDR)
1397 /* The address of the ALT_EMAC_GMAC_MAC_ADDR33_HIGH register for the ALT_EMAC1 instance. */
1398 #define ALT_EMAC1_GMAC_MAC_ADDR33_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR33_HIGH_ADDR(ALT_EMAC1_ADDR)
1399 /* The address of the ALT_EMAC_GMAC_MAC_ADDR33_LOW register for the ALT_EMAC1 instance. */
1400 #define ALT_EMAC1_GMAC_MAC_ADDR33_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR33_LOW_ADDR(ALT_EMAC1_ADDR)
1401 /* The address of the ALT_EMAC_GMAC_MAC_ADDR34_HIGH register for the ALT_EMAC1 instance. */
1402 #define ALT_EMAC1_GMAC_MAC_ADDR34_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR34_HIGH_ADDR(ALT_EMAC1_ADDR)
1403 /* The address of the ALT_EMAC_GMAC_MAC_ADDR34_LOW register for the ALT_EMAC1 instance. */
1404 #define ALT_EMAC1_GMAC_MAC_ADDR34_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR34_LOW_ADDR(ALT_EMAC1_ADDR)
1405 /* The address of the ALT_EMAC_GMAC_MAC_ADDR35_HIGH register for the ALT_EMAC1 instance. */
1406 #define ALT_EMAC1_GMAC_MAC_ADDR35_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR35_HIGH_ADDR(ALT_EMAC1_ADDR)
1407 /* The address of the ALT_EMAC_GMAC_MAC_ADDR35_LOW register for the ALT_EMAC1 instance. */
1408 #define ALT_EMAC1_GMAC_MAC_ADDR35_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR35_LOW_ADDR(ALT_EMAC1_ADDR)
1409 /* The address of the ALT_EMAC_GMAC_MAC_ADDR36_HIGH register for the ALT_EMAC1 instance. */
1410 #define ALT_EMAC1_GMAC_MAC_ADDR36_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR36_HIGH_ADDR(ALT_EMAC1_ADDR)
1411 /* The address of the ALT_EMAC_GMAC_MAC_ADDR36_LOW register for the ALT_EMAC1 instance. */
1412 #define ALT_EMAC1_GMAC_MAC_ADDR36_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR36_LOW_ADDR(ALT_EMAC1_ADDR)
1413 /* The address of the ALT_EMAC_GMAC_MAC_ADDR37_HIGH register for the ALT_EMAC1 instance. */
1414 #define ALT_EMAC1_GMAC_MAC_ADDR37_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR37_HIGH_ADDR(ALT_EMAC1_ADDR)
1415 /* The address of the ALT_EMAC_GMAC_MAC_ADDR37_LOW register for the ALT_EMAC1 instance. */
1416 #define ALT_EMAC1_GMAC_MAC_ADDR37_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR37_LOW_ADDR(ALT_EMAC1_ADDR)
1417 /* The address of the ALT_EMAC_GMAC_MAC_ADDR38_HIGH register for the ALT_EMAC1 instance. */
1418 #define ALT_EMAC1_GMAC_MAC_ADDR38_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR38_HIGH_ADDR(ALT_EMAC1_ADDR)
1419 /* The address of the ALT_EMAC_GMAC_MAC_ADDR38_LOW register for the ALT_EMAC1 instance. */
1420 #define ALT_EMAC1_GMAC_MAC_ADDR38_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR38_LOW_ADDR(ALT_EMAC1_ADDR)
1421 /* The address of the ALT_EMAC_GMAC_MAC_ADDR39_HIGH register for the ALT_EMAC1 instance. */
1422 #define ALT_EMAC1_GMAC_MAC_ADDR39_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR39_HIGH_ADDR(ALT_EMAC1_ADDR)
1423 /* The address of the ALT_EMAC_GMAC_MAC_ADDR39_LOW register for the ALT_EMAC1 instance. */
1424 #define ALT_EMAC1_GMAC_MAC_ADDR39_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR39_LOW_ADDR(ALT_EMAC1_ADDR)
1425 /* The address of the ALT_EMAC_GMAC_MAC_ADDR40_HIGH register for the ALT_EMAC1 instance. */
1426 #define ALT_EMAC1_GMAC_MAC_ADDR40_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR40_HIGH_ADDR(ALT_EMAC1_ADDR)
1427 /* The address of the ALT_EMAC_GMAC_MAC_ADDR40_LOW register for the ALT_EMAC1 instance. */
1428 #define ALT_EMAC1_GMAC_MAC_ADDR40_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR40_LOW_ADDR(ALT_EMAC1_ADDR)
1429 /* The address of the ALT_EMAC_GMAC_MAC_ADDR41_HIGH register for the ALT_EMAC1 instance. */
1430 #define ALT_EMAC1_GMAC_MAC_ADDR41_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR41_HIGH_ADDR(ALT_EMAC1_ADDR)
1431 /* The address of the ALT_EMAC_GMAC_MAC_ADDR41_LOW register for the ALT_EMAC1 instance. */
1432 #define ALT_EMAC1_GMAC_MAC_ADDR41_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR41_LOW_ADDR(ALT_EMAC1_ADDR)
1433 /* The address of the ALT_EMAC_GMAC_MAC_ADDR42_HIGH register for the ALT_EMAC1 instance. */
1434 #define ALT_EMAC1_GMAC_MAC_ADDR42_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR42_HIGH_ADDR(ALT_EMAC1_ADDR)
1435 /* The address of the ALT_EMAC_GMAC_MAC_ADDR42_LOW register for the ALT_EMAC1 instance. */
1436 #define ALT_EMAC1_GMAC_MAC_ADDR42_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR42_LOW_ADDR(ALT_EMAC1_ADDR)
1437 /* The address of the ALT_EMAC_GMAC_MAC_ADDR43_HIGH register for the ALT_EMAC1 instance. */
1438 #define ALT_EMAC1_GMAC_MAC_ADDR43_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR43_HIGH_ADDR(ALT_EMAC1_ADDR)
1439 /* The address of the ALT_EMAC_GMAC_MAC_ADDR43_LOW register for the ALT_EMAC1 instance. */
1440 #define ALT_EMAC1_GMAC_MAC_ADDR43_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR43_LOW_ADDR(ALT_EMAC1_ADDR)
1441 /* The address of the ALT_EMAC_GMAC_MAC_ADDR44_HIGH register for the ALT_EMAC1 instance. */
1442 #define ALT_EMAC1_GMAC_MAC_ADDR44_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR44_HIGH_ADDR(ALT_EMAC1_ADDR)
1443 /* The address of the ALT_EMAC_GMAC_MAC_ADDR44_LOW register for the ALT_EMAC1 instance. */
1444 #define ALT_EMAC1_GMAC_MAC_ADDR44_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR44_LOW_ADDR(ALT_EMAC1_ADDR)
1445 /* The address of the ALT_EMAC_GMAC_MAC_ADDR45_HIGH register for the ALT_EMAC1 instance. */
1446 #define ALT_EMAC1_GMAC_MAC_ADDR45_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR45_HIGH_ADDR(ALT_EMAC1_ADDR)
1447 /* The address of the ALT_EMAC_GMAC_MAC_ADDR45_LOW register for the ALT_EMAC1 instance. */
1448 #define ALT_EMAC1_GMAC_MAC_ADDR45_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR45_LOW_ADDR(ALT_EMAC1_ADDR)
1449 /* The address of the ALT_EMAC_GMAC_MAC_ADDR46_HIGH register for the ALT_EMAC1 instance. */
1450 #define ALT_EMAC1_GMAC_MAC_ADDR46_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR46_HIGH_ADDR(ALT_EMAC1_ADDR)
1451 /* The address of the ALT_EMAC_GMAC_MAC_ADDR46_LOW register for the ALT_EMAC1 instance. */
1452 #define ALT_EMAC1_GMAC_MAC_ADDR46_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR46_LOW_ADDR(ALT_EMAC1_ADDR)
1453 /* The address of the ALT_EMAC_GMAC_MAC_ADDR47_HIGH register for the ALT_EMAC1 instance. */
1454 #define ALT_EMAC1_GMAC_MAC_ADDR47_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR47_HIGH_ADDR(ALT_EMAC1_ADDR)
1455 /* The address of the ALT_EMAC_GMAC_MAC_ADDR47_LOW register for the ALT_EMAC1 instance. */
1456 #define ALT_EMAC1_GMAC_MAC_ADDR47_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR47_LOW_ADDR(ALT_EMAC1_ADDR)
1457 /* The address of the ALT_EMAC_GMAC_MAC_ADDR48_HIGH register for the ALT_EMAC1 instance. */
1458 #define ALT_EMAC1_GMAC_MAC_ADDR48_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR48_HIGH_ADDR(ALT_EMAC1_ADDR)
1459 /* The address of the ALT_EMAC_GMAC_MAC_ADDR48_LOW register for the ALT_EMAC1 instance. */
1460 #define ALT_EMAC1_GMAC_MAC_ADDR48_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR48_LOW_ADDR(ALT_EMAC1_ADDR)
1461 /* The address of the ALT_EMAC_GMAC_MAC_ADDR49_HIGH register for the ALT_EMAC1 instance. */
1462 #define ALT_EMAC1_GMAC_MAC_ADDR49_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR49_HIGH_ADDR(ALT_EMAC1_ADDR)
1463 /* The address of the ALT_EMAC_GMAC_MAC_ADDR49_LOW register for the ALT_EMAC1 instance. */
1464 #define ALT_EMAC1_GMAC_MAC_ADDR49_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR49_LOW_ADDR(ALT_EMAC1_ADDR)
1465 /* The address of the ALT_EMAC_GMAC_MAC_ADDR50_HIGH register for the ALT_EMAC1 instance. */
1466 #define ALT_EMAC1_GMAC_MAC_ADDR50_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR50_HIGH_ADDR(ALT_EMAC1_ADDR)
1467 /* The address of the ALT_EMAC_GMAC_MAC_ADDR50_LOW register for the ALT_EMAC1 instance. */
1468 #define ALT_EMAC1_GMAC_MAC_ADDR50_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR50_LOW_ADDR(ALT_EMAC1_ADDR)
1469 /* The address of the ALT_EMAC_GMAC_MAC_ADDR51_HIGH register for the ALT_EMAC1 instance. */
1470 #define ALT_EMAC1_GMAC_MAC_ADDR51_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR51_HIGH_ADDR(ALT_EMAC1_ADDR)
1471 /* The address of the ALT_EMAC_GMAC_MAC_ADDR51_LOW register for the ALT_EMAC1 instance. */
1472 #define ALT_EMAC1_GMAC_MAC_ADDR51_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR51_LOW_ADDR(ALT_EMAC1_ADDR)
1473 /* The address of the ALT_EMAC_GMAC_MAC_ADDR52_HIGH register for the ALT_EMAC1 instance. */
1474 #define ALT_EMAC1_GMAC_MAC_ADDR52_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR52_HIGH_ADDR(ALT_EMAC1_ADDR)
1475 /* The address of the ALT_EMAC_GMAC_MAC_ADDR52_LOW register for the ALT_EMAC1 instance. */
1476 #define ALT_EMAC1_GMAC_MAC_ADDR52_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR52_LOW_ADDR(ALT_EMAC1_ADDR)
1477 /* The address of the ALT_EMAC_GMAC_MAC_ADDR53_HIGH register for the ALT_EMAC1 instance. */
1478 #define ALT_EMAC1_GMAC_MAC_ADDR53_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR53_HIGH_ADDR(ALT_EMAC1_ADDR)
1479 /* The address of the ALT_EMAC_GMAC_MAC_ADDR53_LOW register for the ALT_EMAC1 instance. */
1480 #define ALT_EMAC1_GMAC_MAC_ADDR53_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR53_LOW_ADDR(ALT_EMAC1_ADDR)
1481 /* The address of the ALT_EMAC_GMAC_MAC_ADDR54_HIGH register for the ALT_EMAC1 instance. */
1482 #define ALT_EMAC1_GMAC_MAC_ADDR54_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR54_HIGH_ADDR(ALT_EMAC1_ADDR)
1483 /* The address of the ALT_EMAC_GMAC_MAC_ADDR54_LOW register for the ALT_EMAC1 instance. */
1484 #define ALT_EMAC1_GMAC_MAC_ADDR54_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR54_LOW_ADDR(ALT_EMAC1_ADDR)
1485 /* The address of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH register for the ALT_EMAC1 instance. */
1486 #define ALT_EMAC1_GMAC_MAC_ADDR55_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDR(ALT_EMAC1_ADDR)
1487 /* The address of the ALT_EMAC_GMAC_MAC_ADDR55_LOW register for the ALT_EMAC1 instance. */
1488 #define ALT_EMAC1_GMAC_MAC_ADDR55_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR55_LOW_ADDR(ALT_EMAC1_ADDR)
1489 /* The address of the ALT_EMAC_GMAC_MAC_ADDR56_HIGH register for the ALT_EMAC1 instance. */
1490 #define ALT_EMAC1_GMAC_MAC_ADDR56_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR56_HIGH_ADDR(ALT_EMAC1_ADDR)
1491 /* The address of the ALT_EMAC_GMAC_MAC_ADDR56_LOW register for the ALT_EMAC1 instance. */
1492 #define ALT_EMAC1_GMAC_MAC_ADDR56_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR56_LOW_ADDR(ALT_EMAC1_ADDR)
1493 /* The address of the ALT_EMAC_GMAC_MAC_ADDR57_HIGH register for the ALT_EMAC1 instance. */
1494 #define ALT_EMAC1_GMAC_MAC_ADDR57_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR57_HIGH_ADDR(ALT_EMAC1_ADDR)
1495 /* The address of the ALT_EMAC_GMAC_MAC_ADDR57_LOW register for the ALT_EMAC1 instance. */
1496 #define ALT_EMAC1_GMAC_MAC_ADDR57_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR57_LOW_ADDR(ALT_EMAC1_ADDR)
1497 /* The address of the ALT_EMAC_GMAC_MAC_ADDR58_HIGH register for the ALT_EMAC1 instance. */
1498 #define ALT_EMAC1_GMAC_MAC_ADDR58_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR58_HIGH_ADDR(ALT_EMAC1_ADDR)
1499 /* The address of the ALT_EMAC_GMAC_MAC_ADDR58_LOW register for the ALT_EMAC1 instance. */
1500 #define ALT_EMAC1_GMAC_MAC_ADDR58_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR58_LOW_ADDR(ALT_EMAC1_ADDR)
1501 /* The address of the ALT_EMAC_GMAC_MAC_ADDR59_HIGH register for the ALT_EMAC1 instance. */
1502 #define ALT_EMAC1_GMAC_MAC_ADDR59_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR59_HIGH_ADDR(ALT_EMAC1_ADDR)
1503 /* The address of the ALT_EMAC_GMAC_MAC_ADDR59_LOW register for the ALT_EMAC1 instance. */
1504 #define ALT_EMAC1_GMAC_MAC_ADDR59_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR59_LOW_ADDR(ALT_EMAC1_ADDR)
1505 /* The address of the ALT_EMAC_GMAC_MAC_ADDR60_HIGH register for the ALT_EMAC1 instance. */
1506 #define ALT_EMAC1_GMAC_MAC_ADDR60_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR60_HIGH_ADDR(ALT_EMAC1_ADDR)
1507 /* The address of the ALT_EMAC_GMAC_MAC_ADDR60_LOW register for the ALT_EMAC1 instance. */
1508 #define ALT_EMAC1_GMAC_MAC_ADDR60_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR60_LOW_ADDR(ALT_EMAC1_ADDR)
1509 /* The address of the ALT_EMAC_GMAC_MAC_ADDR61_HIGH register for the ALT_EMAC1 instance. */
1510 #define ALT_EMAC1_GMAC_MAC_ADDR61_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR61_HIGH_ADDR(ALT_EMAC1_ADDR)
1511 /* The address of the ALT_EMAC_GMAC_MAC_ADDR61_LOW register for the ALT_EMAC1 instance. */
1512 #define ALT_EMAC1_GMAC_MAC_ADDR61_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR61_LOW_ADDR(ALT_EMAC1_ADDR)
1513 /* The address of the ALT_EMAC_GMAC_MAC_ADDR62_HIGH register for the ALT_EMAC1 instance. */
1514 #define ALT_EMAC1_GMAC_MAC_ADDR62_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR62_HIGH_ADDR(ALT_EMAC1_ADDR)
1515 /* The address of the ALT_EMAC_GMAC_MAC_ADDR62_LOW register for the ALT_EMAC1 instance. */
1516 #define ALT_EMAC1_GMAC_MAC_ADDR62_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR62_LOW_ADDR(ALT_EMAC1_ADDR)
1517 /* The address of the ALT_EMAC_GMAC_MAC_ADDR63_HIGH register for the ALT_EMAC1 instance. */
1518 #define ALT_EMAC1_GMAC_MAC_ADDR63_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR63_HIGH_ADDR(ALT_EMAC1_ADDR)
1519 /* The address of the ALT_EMAC_GMAC_MAC_ADDR63_LOW register for the ALT_EMAC1 instance. */
1520 #define ALT_EMAC1_GMAC_MAC_ADDR63_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR63_LOW_ADDR(ALT_EMAC1_ADDR)
1521 /* The address of the ALT_EMAC_GMAC_MAC_ADDR64_HIGH register for the ALT_EMAC1 instance. */
1522 #define ALT_EMAC1_GMAC_MAC_ADDR64_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR64_HIGH_ADDR(ALT_EMAC1_ADDR)
1523 /* The address of the ALT_EMAC_GMAC_MAC_ADDR64_LOW register for the ALT_EMAC1 instance. */
1524 #define ALT_EMAC1_GMAC_MAC_ADDR64_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR64_LOW_ADDR(ALT_EMAC1_ADDR)
1525 /* The address of the ALT_EMAC_GMAC_MAC_ADDR65_HIGH register for the ALT_EMAC1 instance. */
1526 #define ALT_EMAC1_GMAC_MAC_ADDR65_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR65_HIGH_ADDR(ALT_EMAC1_ADDR)
1527 /* The address of the ALT_EMAC_GMAC_MAC_ADDR65_LOW register for the ALT_EMAC1 instance. */
1528 #define ALT_EMAC1_GMAC_MAC_ADDR65_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR65_LOW_ADDR(ALT_EMAC1_ADDR)
1529 /* The address of the ALT_EMAC_GMAC_MAC_ADDR66_HIGH register for the ALT_EMAC1 instance. */
1530 #define ALT_EMAC1_GMAC_MAC_ADDR66_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR66_HIGH_ADDR(ALT_EMAC1_ADDR)
1531 /* The address of the ALT_EMAC_GMAC_MAC_ADDR66_LOW register for the ALT_EMAC1 instance. */
1532 #define ALT_EMAC1_GMAC_MAC_ADDR66_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR66_LOW_ADDR(ALT_EMAC1_ADDR)
1533 /* The address of the ALT_EMAC_GMAC_MAC_ADDR67_HIGH register for the ALT_EMAC1 instance. */
1534 #define ALT_EMAC1_GMAC_MAC_ADDR67_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR67_HIGH_ADDR(ALT_EMAC1_ADDR)
1535 /* The address of the ALT_EMAC_GMAC_MAC_ADDR67_LOW register for the ALT_EMAC1 instance. */
1536 #define ALT_EMAC1_GMAC_MAC_ADDR67_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR67_LOW_ADDR(ALT_EMAC1_ADDR)
1537 /* The address of the ALT_EMAC_GMAC_MAC_ADDR68_HIGH register for the ALT_EMAC1 instance. */
1538 #define ALT_EMAC1_GMAC_MAC_ADDR68_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR68_HIGH_ADDR(ALT_EMAC1_ADDR)
1539 /* The address of the ALT_EMAC_GMAC_MAC_ADDR68_LOW register for the ALT_EMAC1 instance. */
1540 #define ALT_EMAC1_GMAC_MAC_ADDR68_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR68_LOW_ADDR(ALT_EMAC1_ADDR)
1541 /* The address of the ALT_EMAC_GMAC_MAC_ADDR69_HIGH register for the ALT_EMAC1 instance. */
1542 #define ALT_EMAC1_GMAC_MAC_ADDR69_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR69_HIGH_ADDR(ALT_EMAC1_ADDR)
1543 /* The address of the ALT_EMAC_GMAC_MAC_ADDR69_LOW register for the ALT_EMAC1 instance. */
1544 #define ALT_EMAC1_GMAC_MAC_ADDR69_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR69_LOW_ADDR(ALT_EMAC1_ADDR)
1545 /* The address of the ALT_EMAC_GMAC_MAC_ADDR70_HIGH register for the ALT_EMAC1 instance. */
1546 #define ALT_EMAC1_GMAC_MAC_ADDR70_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR70_HIGH_ADDR(ALT_EMAC1_ADDR)
1547 /* The address of the ALT_EMAC_GMAC_MAC_ADDR70_LOW register for the ALT_EMAC1 instance. */
1548 #define ALT_EMAC1_GMAC_MAC_ADDR70_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR70_LOW_ADDR(ALT_EMAC1_ADDR)
1549 /* The address of the ALT_EMAC_GMAC_MAC_ADDR71_HIGH register for the ALT_EMAC1 instance. */
1550 #define ALT_EMAC1_GMAC_MAC_ADDR71_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR71_HIGH_ADDR(ALT_EMAC1_ADDR)
1551 /* The address of the ALT_EMAC_GMAC_MAC_ADDR71_LOW register for the ALT_EMAC1 instance. */
1552 #define ALT_EMAC1_GMAC_MAC_ADDR71_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR71_LOW_ADDR(ALT_EMAC1_ADDR)
1553 /* The address of the ALT_EMAC_GMAC_MAC_ADDR72_HIGH register for the ALT_EMAC1 instance. */
1554 #define ALT_EMAC1_GMAC_MAC_ADDR72_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR72_HIGH_ADDR(ALT_EMAC1_ADDR)
1555 /* The address of the ALT_EMAC_GMAC_MAC_ADDR72_LOW register for the ALT_EMAC1 instance. */
1556 #define ALT_EMAC1_GMAC_MAC_ADDR72_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR72_LOW_ADDR(ALT_EMAC1_ADDR)
1557 /* The address of the ALT_EMAC_GMAC_MAC_ADDR73_HIGH register for the ALT_EMAC1 instance. */
1558 #define ALT_EMAC1_GMAC_MAC_ADDR73_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR73_HIGH_ADDR(ALT_EMAC1_ADDR)
1559 /* The address of the ALT_EMAC_GMAC_MAC_ADDR73_LOW register for the ALT_EMAC1 instance. */
1560 #define ALT_EMAC1_GMAC_MAC_ADDR73_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR73_LOW_ADDR(ALT_EMAC1_ADDR)
1561 /* The address of the ALT_EMAC_GMAC_MAC_ADDR74_HIGH register for the ALT_EMAC1 instance. */
1562 #define ALT_EMAC1_GMAC_MAC_ADDR74_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR74_HIGH_ADDR(ALT_EMAC1_ADDR)
1563 /* The address of the ALT_EMAC_GMAC_MAC_ADDR74_LOW register for the ALT_EMAC1 instance. */
1564 #define ALT_EMAC1_GMAC_MAC_ADDR74_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR74_LOW_ADDR(ALT_EMAC1_ADDR)
1565 /* The address of the ALT_EMAC_GMAC_MAC_ADDR75_HIGH register for the ALT_EMAC1 instance. */
1566 #define ALT_EMAC1_GMAC_MAC_ADDR75_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR75_HIGH_ADDR(ALT_EMAC1_ADDR)
1567 /* The address of the ALT_EMAC_GMAC_MAC_ADDR75_LOW register for the ALT_EMAC1 instance. */
1568 #define ALT_EMAC1_GMAC_MAC_ADDR75_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR75_LOW_ADDR(ALT_EMAC1_ADDR)
1569 /* The address of the ALT_EMAC_GMAC_MAC_ADDR76_HIGH register for the ALT_EMAC1 instance. */
1570 #define ALT_EMAC1_GMAC_MAC_ADDR76_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR76_HIGH_ADDR(ALT_EMAC1_ADDR)
1571 /* The address of the ALT_EMAC_GMAC_MAC_ADDR76_LOW register for the ALT_EMAC1 instance. */
1572 #define ALT_EMAC1_GMAC_MAC_ADDR76_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR76_LOW_ADDR(ALT_EMAC1_ADDR)
1573 /* The address of the ALT_EMAC_GMAC_MAC_ADDR77_HIGH register for the ALT_EMAC1 instance. */
1574 #define ALT_EMAC1_GMAC_MAC_ADDR77_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR77_HIGH_ADDR(ALT_EMAC1_ADDR)
1575 /* The address of the ALT_EMAC_GMAC_MAC_ADDR77_LOW register for the ALT_EMAC1 instance. */
1576 #define ALT_EMAC1_GMAC_MAC_ADDR77_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR77_LOW_ADDR(ALT_EMAC1_ADDR)
1577 /* The address of the ALT_EMAC_GMAC_MAC_ADDR78_HIGH register for the ALT_EMAC1 instance. */
1578 #define ALT_EMAC1_GMAC_MAC_ADDR78_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR78_HIGH_ADDR(ALT_EMAC1_ADDR)
1579 /* The address of the ALT_EMAC_GMAC_MAC_ADDR78_LOW register for the ALT_EMAC1 instance. */
1580 #define ALT_EMAC1_GMAC_MAC_ADDR78_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR78_LOW_ADDR(ALT_EMAC1_ADDR)
1581 /* The address of the ALT_EMAC_GMAC_MAC_ADDR79_HIGH register for the ALT_EMAC1 instance. */
1582 #define ALT_EMAC1_GMAC_MAC_ADDR79_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR79_HIGH_ADDR(ALT_EMAC1_ADDR)
1583 /* The address of the ALT_EMAC_GMAC_MAC_ADDR79_LOW register for the ALT_EMAC1 instance. */
1584 #define ALT_EMAC1_GMAC_MAC_ADDR79_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR79_LOW_ADDR(ALT_EMAC1_ADDR)
1585 /* The address of the ALT_EMAC_GMAC_MAC_ADDR80_HIGH register for the ALT_EMAC1 instance. */
1586 #define ALT_EMAC1_GMAC_MAC_ADDR80_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR80_HIGH_ADDR(ALT_EMAC1_ADDR)
1587 /* The address of the ALT_EMAC_GMAC_MAC_ADDR80_LOW register for the ALT_EMAC1 instance. */
1588 #define ALT_EMAC1_GMAC_MAC_ADDR80_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR80_LOW_ADDR(ALT_EMAC1_ADDR)
1589 /* The address of the ALT_EMAC_GMAC_MAC_ADDR81_HIGH register for the ALT_EMAC1 instance. */
1590 #define ALT_EMAC1_GMAC_MAC_ADDR81_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR81_HIGH_ADDR(ALT_EMAC1_ADDR)
1591 /* The address of the ALT_EMAC_GMAC_MAC_ADDR81_LOW register for the ALT_EMAC1 instance. */
1592 #define ALT_EMAC1_GMAC_MAC_ADDR81_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR81_LOW_ADDR(ALT_EMAC1_ADDR)
1593 /* The address of the ALT_EMAC_GMAC_MAC_ADDR82_HIGH register for the ALT_EMAC1 instance. */
1594 #define ALT_EMAC1_GMAC_MAC_ADDR82_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR82_HIGH_ADDR(ALT_EMAC1_ADDR)
1595 /* The address of the ALT_EMAC_GMAC_MAC_ADDR82_LOW register for the ALT_EMAC1 instance. */
1596 #define ALT_EMAC1_GMAC_MAC_ADDR82_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR82_LOW_ADDR(ALT_EMAC1_ADDR)
1597 /* The address of the ALT_EMAC_GMAC_MAC_ADDR83_HIGH register for the ALT_EMAC1 instance. */
1598 #define ALT_EMAC1_GMAC_MAC_ADDR83_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR83_HIGH_ADDR(ALT_EMAC1_ADDR)
1599 /* The address of the ALT_EMAC_GMAC_MAC_ADDR83_LOW register for the ALT_EMAC1 instance. */
1600 #define ALT_EMAC1_GMAC_MAC_ADDR83_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR83_LOW_ADDR(ALT_EMAC1_ADDR)
1601 /* The address of the ALT_EMAC_GMAC_MAC_ADDR84_HIGH register for the ALT_EMAC1 instance. */
1602 #define ALT_EMAC1_GMAC_MAC_ADDR84_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR84_HIGH_ADDR(ALT_EMAC1_ADDR)
1603 /* The address of the ALT_EMAC_GMAC_MAC_ADDR84_LOW register for the ALT_EMAC1 instance. */
1604 #define ALT_EMAC1_GMAC_MAC_ADDR84_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR84_LOW_ADDR(ALT_EMAC1_ADDR)
1605 /* The address of the ALT_EMAC_GMAC_MAC_ADDR85_HIGH register for the ALT_EMAC1 instance. */
1606 #define ALT_EMAC1_GMAC_MAC_ADDR85_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR85_HIGH_ADDR(ALT_EMAC1_ADDR)
1607 /* The address of the ALT_EMAC_GMAC_MAC_ADDR85_LOW register for the ALT_EMAC1 instance. */
1608 #define ALT_EMAC1_GMAC_MAC_ADDR85_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR85_LOW_ADDR(ALT_EMAC1_ADDR)
1609 /* The address of the ALT_EMAC_GMAC_MAC_ADDR86_HIGH register for the ALT_EMAC1 instance. */
1610 #define ALT_EMAC1_GMAC_MAC_ADDR86_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR86_HIGH_ADDR(ALT_EMAC1_ADDR)
1611 /* The address of the ALT_EMAC_GMAC_MAC_ADDR86_LOW register for the ALT_EMAC1 instance. */
1612 #define ALT_EMAC1_GMAC_MAC_ADDR86_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR86_LOW_ADDR(ALT_EMAC1_ADDR)
1613 /* The address of the ALT_EMAC_GMAC_MAC_ADDR87_HIGH register for the ALT_EMAC1 instance. */
1614 #define ALT_EMAC1_GMAC_MAC_ADDR87_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR87_HIGH_ADDR(ALT_EMAC1_ADDR)
1615 /* The address of the ALT_EMAC_GMAC_MAC_ADDR87_LOW register for the ALT_EMAC1 instance. */
1616 #define ALT_EMAC1_GMAC_MAC_ADDR87_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR87_LOW_ADDR(ALT_EMAC1_ADDR)
1617 /* The address of the ALT_EMAC_GMAC_MAC_ADDR88_HIGH register for the ALT_EMAC1 instance. */
1618 #define ALT_EMAC1_GMAC_MAC_ADDR88_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR88_HIGH_ADDR(ALT_EMAC1_ADDR)
1619 /* The address of the ALT_EMAC_GMAC_MAC_ADDR88_LOW register for the ALT_EMAC1 instance. */
1620 #define ALT_EMAC1_GMAC_MAC_ADDR88_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR88_LOW_ADDR(ALT_EMAC1_ADDR)
1621 /* The address of the ALT_EMAC_GMAC_MAC_ADDR89_HIGH register for the ALT_EMAC1 instance. */
1622 #define ALT_EMAC1_GMAC_MAC_ADDR89_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR89_HIGH_ADDR(ALT_EMAC1_ADDR)
1623 /* The address of the ALT_EMAC_GMAC_MAC_ADDR89_LOW register for the ALT_EMAC1 instance. */
1624 #define ALT_EMAC1_GMAC_MAC_ADDR89_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR89_LOW_ADDR(ALT_EMAC1_ADDR)
1625 /* The address of the ALT_EMAC_GMAC_MAC_ADDR90_HIGH register for the ALT_EMAC1 instance. */
1626 #define ALT_EMAC1_GMAC_MAC_ADDR90_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR90_HIGH_ADDR(ALT_EMAC1_ADDR)
1627 /* The address of the ALT_EMAC_GMAC_MAC_ADDR90_LOW register for the ALT_EMAC1 instance. */
1628 #define ALT_EMAC1_GMAC_MAC_ADDR90_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR90_LOW_ADDR(ALT_EMAC1_ADDR)
1629 /* The address of the ALT_EMAC_GMAC_MAC_ADDR91_HIGH register for the ALT_EMAC1 instance. */
1630 #define ALT_EMAC1_GMAC_MAC_ADDR91_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR91_HIGH_ADDR(ALT_EMAC1_ADDR)
1631 /* The address of the ALT_EMAC_GMAC_MAC_ADDR91_LOW register for the ALT_EMAC1 instance. */
1632 #define ALT_EMAC1_GMAC_MAC_ADDR91_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR91_LOW_ADDR(ALT_EMAC1_ADDR)
1633 /* The address of the ALT_EMAC_GMAC_MAC_ADDR92_HIGH register for the ALT_EMAC1 instance. */
1634 #define ALT_EMAC1_GMAC_MAC_ADDR92_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR92_HIGH_ADDR(ALT_EMAC1_ADDR)
1635 /* The address of the ALT_EMAC_GMAC_MAC_ADDR92_LOW register for the ALT_EMAC1 instance. */
1636 #define ALT_EMAC1_GMAC_MAC_ADDR92_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR92_LOW_ADDR(ALT_EMAC1_ADDR)
1637 /* The address of the ALT_EMAC_GMAC_MAC_ADDR93_HIGH register for the ALT_EMAC1 instance. */
1638 #define ALT_EMAC1_GMAC_MAC_ADDR93_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR93_HIGH_ADDR(ALT_EMAC1_ADDR)
1639 /* The address of the ALT_EMAC_GMAC_MAC_ADDR93_LOW register for the ALT_EMAC1 instance. */
1640 #define ALT_EMAC1_GMAC_MAC_ADDR93_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR93_LOW_ADDR(ALT_EMAC1_ADDR)
1641 /* The address of the ALT_EMAC_GMAC_MAC_ADDR94_HIGH register for the ALT_EMAC1 instance. */
1642 #define ALT_EMAC1_GMAC_MAC_ADDR94_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR94_HIGH_ADDR(ALT_EMAC1_ADDR)
1643 /* The address of the ALT_EMAC_GMAC_MAC_ADDR94_LOW register for the ALT_EMAC1 instance. */
1644 #define ALT_EMAC1_GMAC_MAC_ADDR94_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR94_LOW_ADDR(ALT_EMAC1_ADDR)
1645 /* The address of the ALT_EMAC_GMAC_MAC_ADDR95_HIGH register for the ALT_EMAC1 instance. */
1646 #define ALT_EMAC1_GMAC_MAC_ADDR95_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR95_HIGH_ADDR(ALT_EMAC1_ADDR)
1647 /* The address of the ALT_EMAC_GMAC_MAC_ADDR95_LOW register for the ALT_EMAC1 instance. */
1648 #define ALT_EMAC1_GMAC_MAC_ADDR95_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR95_LOW_ADDR(ALT_EMAC1_ADDR)
1649 /* The address of the ALT_EMAC_GMAC_MAC_ADDR96_HIGH register for the ALT_EMAC1 instance. */
1650 #define ALT_EMAC1_GMAC_MAC_ADDR96_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR96_HIGH_ADDR(ALT_EMAC1_ADDR)
1651 /* The address of the ALT_EMAC_GMAC_MAC_ADDR96_LOW register for the ALT_EMAC1 instance. */
1652 #define ALT_EMAC1_GMAC_MAC_ADDR96_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR96_LOW_ADDR(ALT_EMAC1_ADDR)
1653 /* The address of the ALT_EMAC_GMAC_MAC_ADDR97_HIGH register for the ALT_EMAC1 instance. */
1654 #define ALT_EMAC1_GMAC_MAC_ADDR97_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR97_HIGH_ADDR(ALT_EMAC1_ADDR)
1655 /* The address of the ALT_EMAC_GMAC_MAC_ADDR97_LOW register for the ALT_EMAC1 instance. */
1656 #define ALT_EMAC1_GMAC_MAC_ADDR97_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR97_LOW_ADDR(ALT_EMAC1_ADDR)
1657 /* The address of the ALT_EMAC_GMAC_MAC_ADDR98_HIGH register for the ALT_EMAC1 instance. */
1658 #define ALT_EMAC1_GMAC_MAC_ADDR98_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR98_HIGH_ADDR(ALT_EMAC1_ADDR)
1659 /* The address of the ALT_EMAC_GMAC_MAC_ADDR98_LOW register for the ALT_EMAC1 instance. */
1660 #define ALT_EMAC1_GMAC_MAC_ADDR98_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR98_LOW_ADDR(ALT_EMAC1_ADDR)
1661 /* The address of the ALT_EMAC_GMAC_MAC_ADDR99_HIGH register for the ALT_EMAC1 instance. */
1662 #define ALT_EMAC1_GMAC_MAC_ADDR99_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR99_HIGH_ADDR(ALT_EMAC1_ADDR)
1663 /* The address of the ALT_EMAC_GMAC_MAC_ADDR99_LOW register for the ALT_EMAC1 instance. */
1664 #define ALT_EMAC1_GMAC_MAC_ADDR99_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR99_LOW_ADDR(ALT_EMAC1_ADDR)
1665 /* The address of the ALT_EMAC_GMAC_MAC_ADDR100_HIGH register for the ALT_EMAC1 instance. */
1666 #define ALT_EMAC1_GMAC_MAC_ADDR100_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR100_HIGH_ADDR(ALT_EMAC1_ADDR)
1667 /* The address of the ALT_EMAC_GMAC_MAC_ADDR100_LOW register for the ALT_EMAC1 instance. */
1668 #define ALT_EMAC1_GMAC_MAC_ADDR100_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR100_LOW_ADDR(ALT_EMAC1_ADDR)
1669 /* The address of the ALT_EMAC_GMAC_MAC_ADDR101_HIGH register for the ALT_EMAC1 instance. */
1670 #define ALT_EMAC1_GMAC_MAC_ADDR101_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR101_HIGH_ADDR(ALT_EMAC1_ADDR)
1671 /* The address of the ALT_EMAC_GMAC_MAC_ADDR101_LOW register for the ALT_EMAC1 instance. */
1672 #define ALT_EMAC1_GMAC_MAC_ADDR101_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR101_LOW_ADDR(ALT_EMAC1_ADDR)
1673 /* The address of the ALT_EMAC_GMAC_MAC_ADDR102_HIGH register for the ALT_EMAC1 instance. */
1674 #define ALT_EMAC1_GMAC_MAC_ADDR102_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR102_HIGH_ADDR(ALT_EMAC1_ADDR)
1675 /* The address of the ALT_EMAC_GMAC_MAC_ADDR102_LOW register for the ALT_EMAC1 instance. */
1676 #define ALT_EMAC1_GMAC_MAC_ADDR102_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR102_LOW_ADDR(ALT_EMAC1_ADDR)
1677 /* The address of the ALT_EMAC_GMAC_MAC_ADDR103_HIGH register for the ALT_EMAC1 instance. */
1678 #define ALT_EMAC1_GMAC_MAC_ADDR103_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR103_HIGH_ADDR(ALT_EMAC1_ADDR)
1679 /* The address of the ALT_EMAC_GMAC_MAC_ADDR103_LOW register for the ALT_EMAC1 instance. */
1680 #define ALT_EMAC1_GMAC_MAC_ADDR103_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR103_LOW_ADDR(ALT_EMAC1_ADDR)
1681 /* The address of the ALT_EMAC_GMAC_MAC_ADDR104_HIGH register for the ALT_EMAC1 instance. */
1682 #define ALT_EMAC1_GMAC_MAC_ADDR104_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR104_HIGH_ADDR(ALT_EMAC1_ADDR)
1683 /* The address of the ALT_EMAC_GMAC_MAC_ADDR104_LOW register for the ALT_EMAC1 instance. */
1684 #define ALT_EMAC1_GMAC_MAC_ADDR104_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR104_LOW_ADDR(ALT_EMAC1_ADDR)
1685 /* The address of the ALT_EMAC_GMAC_MAC_ADDR105_HIGH register for the ALT_EMAC1 instance. */
1686 #define ALT_EMAC1_GMAC_MAC_ADDR105_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR105_HIGH_ADDR(ALT_EMAC1_ADDR)
1687 /* The address of the ALT_EMAC_GMAC_MAC_ADDR105_LOW register for the ALT_EMAC1 instance. */
1688 #define ALT_EMAC1_GMAC_MAC_ADDR105_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR105_LOW_ADDR(ALT_EMAC1_ADDR)
1689 /* The address of the ALT_EMAC_GMAC_MAC_ADDR106_HIGH register for the ALT_EMAC1 instance. */
1690 #define ALT_EMAC1_GMAC_MAC_ADDR106_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR106_HIGH_ADDR(ALT_EMAC1_ADDR)
1691 /* The address of the ALT_EMAC_GMAC_MAC_ADDR106_LOW register for the ALT_EMAC1 instance. */
1692 #define ALT_EMAC1_GMAC_MAC_ADDR106_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR106_LOW_ADDR(ALT_EMAC1_ADDR)
1693 /* The address of the ALT_EMAC_GMAC_MAC_ADDR107_HIGH register for the ALT_EMAC1 instance. */
1694 #define ALT_EMAC1_GMAC_MAC_ADDR107_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR107_HIGH_ADDR(ALT_EMAC1_ADDR)
1695 /* The address of the ALT_EMAC_GMAC_MAC_ADDR107_LOW register for the ALT_EMAC1 instance. */
1696 #define ALT_EMAC1_GMAC_MAC_ADDR107_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR107_LOW_ADDR(ALT_EMAC1_ADDR)
1697 /* The address of the ALT_EMAC_GMAC_MAC_ADDR108_HIGH register for the ALT_EMAC1 instance. */
1698 #define ALT_EMAC1_GMAC_MAC_ADDR108_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR108_HIGH_ADDR(ALT_EMAC1_ADDR)
1699 /* The address of the ALT_EMAC_GMAC_MAC_ADDR108_LOW register for the ALT_EMAC1 instance. */
1700 #define ALT_EMAC1_GMAC_MAC_ADDR108_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR108_LOW_ADDR(ALT_EMAC1_ADDR)
1701 /* The address of the ALT_EMAC_GMAC_MAC_ADDR109_HIGH register for the ALT_EMAC1 instance. */
1702 #define ALT_EMAC1_GMAC_MAC_ADDR109_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR109_HIGH_ADDR(ALT_EMAC1_ADDR)
1703 /* The address of the ALT_EMAC_GMAC_MAC_ADDR109_LOW register for the ALT_EMAC1 instance. */
1704 #define ALT_EMAC1_GMAC_MAC_ADDR109_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR109_LOW_ADDR(ALT_EMAC1_ADDR)
1705 /* The address of the ALT_EMAC_GMAC_MAC_ADDR110_HIGH register for the ALT_EMAC1 instance. */
1706 #define ALT_EMAC1_GMAC_MAC_ADDR110_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR110_HIGH_ADDR(ALT_EMAC1_ADDR)
1707 /* The address of the ALT_EMAC_GMAC_MAC_ADDR110_LOW register for the ALT_EMAC1 instance. */
1708 #define ALT_EMAC1_GMAC_MAC_ADDR110_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR110_LOW_ADDR(ALT_EMAC1_ADDR)
1709 /* The address of the ALT_EMAC_GMAC_MAC_ADDR111_HIGH register for the ALT_EMAC1 instance. */
1710 #define ALT_EMAC1_GMAC_MAC_ADDR111_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR111_HIGH_ADDR(ALT_EMAC1_ADDR)
1711 /* The address of the ALT_EMAC_GMAC_MAC_ADDR111_LOW register for the ALT_EMAC1 instance. */
1712 #define ALT_EMAC1_GMAC_MAC_ADDR111_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR111_LOW_ADDR(ALT_EMAC1_ADDR)
1713 /* The address of the ALT_EMAC_GMAC_MAC_ADDR112_HIGH register for the ALT_EMAC1 instance. */
1714 #define ALT_EMAC1_GMAC_MAC_ADDR112_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR112_HIGH_ADDR(ALT_EMAC1_ADDR)
1715 /* The address of the ALT_EMAC_GMAC_MAC_ADDR112_LOW register for the ALT_EMAC1 instance. */
1716 #define ALT_EMAC1_GMAC_MAC_ADDR112_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR112_LOW_ADDR(ALT_EMAC1_ADDR)
1717 /* The address of the ALT_EMAC_GMAC_MAC_ADDR113_HIGH register for the ALT_EMAC1 instance. */
1718 #define ALT_EMAC1_GMAC_MAC_ADDR113_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR113_HIGH_ADDR(ALT_EMAC1_ADDR)
1719 /* The address of the ALT_EMAC_GMAC_MAC_ADDR113_LOW register for the ALT_EMAC1 instance. */
1720 #define ALT_EMAC1_GMAC_MAC_ADDR113_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR113_LOW_ADDR(ALT_EMAC1_ADDR)
1721 /* The address of the ALT_EMAC_GMAC_MAC_ADDR114_HIGH register for the ALT_EMAC1 instance. */
1722 #define ALT_EMAC1_GMAC_MAC_ADDR114_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR114_HIGH_ADDR(ALT_EMAC1_ADDR)
1723 /* The address of the ALT_EMAC_GMAC_MAC_ADDR114_LOW register for the ALT_EMAC1 instance. */
1724 #define ALT_EMAC1_GMAC_MAC_ADDR114_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR114_LOW_ADDR(ALT_EMAC1_ADDR)
1725 /* The address of the ALT_EMAC_GMAC_MAC_ADDR115_HIGH register for the ALT_EMAC1 instance. */
1726 #define ALT_EMAC1_GMAC_MAC_ADDR115_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR115_HIGH_ADDR(ALT_EMAC1_ADDR)
1727 /* The address of the ALT_EMAC_GMAC_MAC_ADDR115_LOW register for the ALT_EMAC1 instance. */
1728 #define ALT_EMAC1_GMAC_MAC_ADDR115_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR115_LOW_ADDR(ALT_EMAC1_ADDR)
1729 /* The address of the ALT_EMAC_GMAC_MAC_ADDR116_HIGH register for the ALT_EMAC1 instance. */
1730 #define ALT_EMAC1_GMAC_MAC_ADDR116_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR116_HIGH_ADDR(ALT_EMAC1_ADDR)
1731 /* The address of the ALT_EMAC_GMAC_MAC_ADDR116_LOW register for the ALT_EMAC1 instance. */
1732 #define ALT_EMAC1_GMAC_MAC_ADDR116_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR116_LOW_ADDR(ALT_EMAC1_ADDR)
1733 /* The address of the ALT_EMAC_GMAC_MAC_ADDR117_HIGH register for the ALT_EMAC1 instance. */
1734 #define ALT_EMAC1_GMAC_MAC_ADDR117_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR117_HIGH_ADDR(ALT_EMAC1_ADDR)
1735 /* The address of the ALT_EMAC_GMAC_MAC_ADDR117_LOW register for the ALT_EMAC1 instance. */
1736 #define ALT_EMAC1_GMAC_MAC_ADDR117_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR117_LOW_ADDR(ALT_EMAC1_ADDR)
1737 /* The address of the ALT_EMAC_GMAC_MAC_ADDR118_HIGH register for the ALT_EMAC1 instance. */
1738 #define ALT_EMAC1_GMAC_MAC_ADDR118_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR118_HIGH_ADDR(ALT_EMAC1_ADDR)
1739 /* The address of the ALT_EMAC_GMAC_MAC_ADDR118_LOW register for the ALT_EMAC1 instance. */
1740 #define ALT_EMAC1_GMAC_MAC_ADDR118_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR118_LOW_ADDR(ALT_EMAC1_ADDR)
1741 /* The address of the ALT_EMAC_GMAC_MAC_ADDR119_HIGH register for the ALT_EMAC1 instance. */
1742 #define ALT_EMAC1_GMAC_MAC_ADDR119_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR119_HIGH_ADDR(ALT_EMAC1_ADDR)
1743 /* The address of the ALT_EMAC_GMAC_MAC_ADDR119_LOW register for the ALT_EMAC1 instance. */
1744 #define ALT_EMAC1_GMAC_MAC_ADDR119_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR119_LOW_ADDR(ALT_EMAC1_ADDR)
1745 /* The address of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH register for the ALT_EMAC1 instance. */
1746 #define ALT_EMAC1_GMAC_MAC_ADDR120_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDR(ALT_EMAC1_ADDR)
1747 /* The address of the ALT_EMAC_GMAC_MAC_ADDR120_LOW register for the ALT_EMAC1 instance. */
1748 #define ALT_EMAC1_GMAC_MAC_ADDR120_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR120_LOW_ADDR(ALT_EMAC1_ADDR)
1749 /* The address of the ALT_EMAC_GMAC_MAC_ADDR121_HIGH register for the ALT_EMAC1 instance. */
1750 #define ALT_EMAC1_GMAC_MAC_ADDR121_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR121_HIGH_ADDR(ALT_EMAC1_ADDR)
1751 /* The address of the ALT_EMAC_GMAC_MAC_ADDR121_LOW register for the ALT_EMAC1 instance. */
1752 #define ALT_EMAC1_GMAC_MAC_ADDR121_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR121_LOW_ADDR(ALT_EMAC1_ADDR)
1753 /* The address of the ALT_EMAC_GMAC_MAC_ADDR122_HIGH register for the ALT_EMAC1 instance. */
1754 #define ALT_EMAC1_GMAC_MAC_ADDR122_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR122_HIGH_ADDR(ALT_EMAC1_ADDR)
1755 /* The address of the ALT_EMAC_GMAC_MAC_ADDR122_LOW register for the ALT_EMAC1 instance. */
1756 #define ALT_EMAC1_GMAC_MAC_ADDR122_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR122_LOW_ADDR(ALT_EMAC1_ADDR)
1757 /* The address of the ALT_EMAC_GMAC_MAC_ADDR123_HIGH register for the ALT_EMAC1 instance. */
1758 #define ALT_EMAC1_GMAC_MAC_ADDR123_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR123_HIGH_ADDR(ALT_EMAC1_ADDR)
1759 /* The address of the ALT_EMAC_GMAC_MAC_ADDR123_LOW register for the ALT_EMAC1 instance. */
1760 #define ALT_EMAC1_GMAC_MAC_ADDR123_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR123_LOW_ADDR(ALT_EMAC1_ADDR)
1761 /* The address of the ALT_EMAC_GMAC_MAC_ADDR124_HIGH register for the ALT_EMAC1 instance. */
1762 #define ALT_EMAC1_GMAC_MAC_ADDR124_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR124_HIGH_ADDR(ALT_EMAC1_ADDR)
1763 /* The address of the ALT_EMAC_GMAC_MAC_ADDR124_LOW register for the ALT_EMAC1 instance. */
1764 #define ALT_EMAC1_GMAC_MAC_ADDR124_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR124_LOW_ADDR(ALT_EMAC1_ADDR)
1765 /* The address of the ALT_EMAC_GMAC_MAC_ADDR125_HIGH register for the ALT_EMAC1 instance. */
1766 #define ALT_EMAC1_GMAC_MAC_ADDR125_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR125_HIGH_ADDR(ALT_EMAC1_ADDR)
1767 /* The address of the ALT_EMAC_GMAC_MAC_ADDR125_LOW register for the ALT_EMAC1 instance. */
1768 #define ALT_EMAC1_GMAC_MAC_ADDR125_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR125_LOW_ADDR(ALT_EMAC1_ADDR)
1769 /* The address of the ALT_EMAC_GMAC_MAC_ADDR126_HIGH register for the ALT_EMAC1 instance. */
1770 #define ALT_EMAC1_GMAC_MAC_ADDR126_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR126_HIGH_ADDR(ALT_EMAC1_ADDR)
1771 /* The address of the ALT_EMAC_GMAC_MAC_ADDR126_LOW register for the ALT_EMAC1 instance. */
1772 #define ALT_EMAC1_GMAC_MAC_ADDR126_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR126_LOW_ADDR(ALT_EMAC1_ADDR)
1773 /* The address of the ALT_EMAC_GMAC_MAC_ADDR127_HIGH register for the ALT_EMAC1 instance. */
1774 #define ALT_EMAC1_GMAC_MAC_ADDR127_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR127_HIGH_ADDR(ALT_EMAC1_ADDR)
1775 /* The address of the ALT_EMAC_GMAC_MAC_ADDR127_LOW register for the ALT_EMAC1 instance. */
1776 #define ALT_EMAC1_GMAC_MAC_ADDR127_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR127_LOW_ADDR(ALT_EMAC1_ADDR)
1777 /* The address of the ALT_EMAC_DMA_BUS_MOD register for the ALT_EMAC1 instance. */
1778 #define ALT_EMAC1_DMA_BUS_MOD_ADDR ALT_EMAC_DMA_BUS_MOD_ADDR(ALT_EMAC1_ADDR)
1779 /* The address of the ALT_EMAC_DMA_TX_POLL_DEMAND register for the ALT_EMAC1 instance. */
1780 #define ALT_EMAC1_DMA_TX_POLL_DEMAND_ADDR ALT_EMAC_DMA_TX_POLL_DEMAND_ADDR(ALT_EMAC1_ADDR)
1781 /* The address of the ALT_EMAC_DMA_RX_POLL_DEMAND register for the ALT_EMAC1 instance. */
1782 #define ALT_EMAC1_DMA_RX_POLL_DEMAND_ADDR ALT_EMAC_DMA_RX_POLL_DEMAND_ADDR(ALT_EMAC1_ADDR)
1783 /* The address of the ALT_EMAC_DMA_RX_DESC_LIST_ADDR register for the ALT_EMAC1 instance. */
1784 #define ALT_EMAC1_DMA_RX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_RX_DESC_LIST_ADDR_ADDR(ALT_EMAC1_ADDR)
1785 /* The address of the ALT_EMAC_DMA_TX_DESC_LIST_ADDR register for the ALT_EMAC1 instance. */
1786 #define ALT_EMAC1_DMA_TX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_TX_DESC_LIST_ADDR_ADDR(ALT_EMAC1_ADDR)
1787 /* The address of the ALT_EMAC_DMA_STAT register for the ALT_EMAC1 instance. */
1788 #define ALT_EMAC1_DMA_STAT_ADDR ALT_EMAC_DMA_STAT_ADDR(ALT_EMAC1_ADDR)
1789 /* The address of the ALT_EMAC_DMA_OP_MOD register for the ALT_EMAC1 instance. */
1790 #define ALT_EMAC1_DMA_OP_MOD_ADDR ALT_EMAC_DMA_OP_MOD_ADDR(ALT_EMAC1_ADDR)
1791 /* The address of the ALT_EMAC_DMA_INT_EN register for the ALT_EMAC1 instance. */
1792 #define ALT_EMAC1_DMA_INT_EN_ADDR ALT_EMAC_DMA_INT_EN_ADDR(ALT_EMAC1_ADDR)
1793 /* The address of the ALT_EMAC_DMA_MFRM_BUF_OVF_CNTR register for the ALT_EMAC1 instance. */
1794 #define ALT_EMAC1_DMA_MISSED_FRM_AND_BUF_OVF_CNTR_ADDR ALT_EMAC_DMA_MFRM_BUF_OVF_CNTR_ADDR(ALT_EMAC1_ADDR)
1795 /* The address of the ALT_EMAC_DMA_RX_INT_WDT register for the ALT_EMAC1 instance. */
1796 #define ALT_EMAC1_DMA_RX_INT_WDT_ADDR ALT_EMAC_DMA_RX_INT_WDT_ADDR(ALT_EMAC1_ADDR)
1797 /* The address of the ALT_EMAC_DMA_AXI_BUS_MOD register for the ALT_EMAC1 instance. */
1798 #define ALT_EMAC1_DMA_AXI_BUS_MOD_ADDR ALT_EMAC_DMA_AXI_BUS_MOD_ADDR(ALT_EMAC1_ADDR)
1799 /* The address of the ALT_EMAC_DMA_AHB_OR_AXI_STAT register for the ALT_EMAC1 instance. */
1800 #define ALT_EMAC1_DMA_AHB_OR_AXI_STAT_ADDR ALT_EMAC_DMA_AHB_OR_AXI_STAT_ADDR(ALT_EMAC1_ADDR)
1801 /* The address of the ALT_EMAC_DMA_CUR_HOST_TX_DESC register for the ALT_EMAC1 instance. */
1802 #define ALT_EMAC1_DMA_CUR_HOST_TX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_TX_DESC_ADDR(ALT_EMAC1_ADDR)
1803 /* The address of the ALT_EMAC_DMA_CUR_HOST_RX_DESC register for the ALT_EMAC1 instance. */
1804 #define ALT_EMAC1_DMA_CUR_HOST_RX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_RX_DESC_ADDR(ALT_EMAC1_ADDR)
1805 /* The address of the ALT_EMAC_DMA_CUR_HOST_TX_BUF_ADDR register for the ALT_EMAC1 instance. */
1806 #define ALT_EMAC1_DMA_CUR_HOST_TX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_TX_BUF_ADDR_ADDR(ALT_EMAC1_ADDR)
1807 /* The address of the ALT_EMAC_DMA_CUR_HOST_RX_BUF_ADDR register for the ALT_EMAC1 instance. */
1808 #define ALT_EMAC1_DMA_CUR_HOST_RX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_RX_BUF_ADDR_ADDR(ALT_EMAC1_ADDR)
1809 /* The address of the ALT_EMAC_DMA_HW_FEATURE register for the ALT_EMAC1 instance. */
1810 #define ALT_EMAC1_DMA_HW_FEATURE_ADDR ALT_EMAC_DMA_HW_FEATURE_ADDR(ALT_EMAC1_ADDR)
1811 /* The base address byte offset for the start of the ALT_EMAC1 component. */
1812 #define ALT_EMAC1_OFST 0xff802000
1813 /* The start address of the ALT_EMAC1 component. */
1814 #define ALT_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_EMAC1_OFST))
1815 /* The lower bound address range of the ALT_EMAC1 component. */
1816 #define ALT_EMAC1_LB_ADDR ALT_EMAC1_ADDR
1817 /* The upper bound address range of the ALT_EMAC1 component. */
1818 #define ALT_EMAC1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC1_ADDR) + 0x105c) - 1))
1819 
1820 
1821 /*
1822  * Component Instance : i_emac_emac2
1823  *
1824  * Instance i_emac_emac2 of component ALT_EMAC.
1825  *
1826  *
1827  */
1828 /* The address of the ALT_EMAC_GMAC_MAC_CFG register for the ALT_EMAC2 instance. */
1829 #define ALT_EMAC2_GMAC_MAC_CFG_ADDR ALT_EMAC_GMAC_MAC_CFG_ADDR(ALT_EMAC2_ADDR)
1830 /* The address of the ALT_EMAC_GMAC_MAC_FRM_FLT register for the ALT_EMAC2 instance. */
1831 #define ALT_EMAC2_GMAC_MAC_FRM_FLT_ADDR ALT_EMAC_GMAC_MAC_FRM_FLT_ADDR(ALT_EMAC2_ADDR)
1832 /* The address of the ALT_EMAC_GMAC_GMII_ADDR register for the ALT_EMAC2 instance. */
1833 #define ALT_EMAC2_GMAC_GMII_ADDR_ADDR ALT_EMAC_GMAC_GMII_ADDR_ADDR(ALT_EMAC2_ADDR)
1834 /* The address of the ALT_EMAC_GMAC_GMII_DATA register for the ALT_EMAC2 instance. */
1835 #define ALT_EMAC2_GMAC_GMII_DATA_ADDR ALT_EMAC_GMAC_GMII_DATA_ADDR(ALT_EMAC2_ADDR)
1836 /* The address of the ALT_EMAC_GMAC_FLOW_CTL register for the ALT_EMAC2 instance. */
1837 #define ALT_EMAC2_GMAC_FLOW_CTL_ADDR ALT_EMAC_GMAC_FLOW_CTL_ADDR(ALT_EMAC2_ADDR)
1838 /* The address of the ALT_EMAC_GMAC_VLAN_TAG register for the ALT_EMAC2 instance. */
1839 #define ALT_EMAC2_GMAC_VLAN_TAG_ADDR ALT_EMAC_GMAC_VLAN_TAG_ADDR(ALT_EMAC2_ADDR)
1840 /* The address of the ALT_EMAC_GMAC_VER register for the ALT_EMAC2 instance. */
1841 #define ALT_EMAC2_GMAC_VER_ADDR ALT_EMAC_GMAC_VER_ADDR(ALT_EMAC2_ADDR)
1842 /* The address of the ALT_EMAC_GMAC_DBG register for the ALT_EMAC2 instance. */
1843 #define ALT_EMAC2_GMAC_DBG_ADDR ALT_EMAC_GMAC_DBG_ADDR(ALT_EMAC2_ADDR)
1844 /* The address of the ALT_EMAC_GMAC_LPI_CTL_STAT register for the ALT_EMAC2 instance. */
1845 #define ALT_EMAC2_GMAC_LPI_CTL_STAT_ADDR ALT_EMAC_GMAC_LPI_CTL_STAT_ADDR(ALT_EMAC2_ADDR)
1846 /* The address of the ALT_EMAC_GMAC_LPI_TMRS_CTL register for the ALT_EMAC2 instance. */
1847 #define ALT_EMAC2_GMAC_LPI_TMRS_CTL_ADDR ALT_EMAC_GMAC_LPI_TMRS_CTL_ADDR(ALT_EMAC2_ADDR)
1848 /* The address of the ALT_EMAC_GMAC_INT_STAT register for the ALT_EMAC2 instance. */
1849 #define ALT_EMAC2_GMAC_INT_STAT_ADDR ALT_EMAC_GMAC_INT_STAT_ADDR(ALT_EMAC2_ADDR)
1850 /* The address of the ALT_EMAC_GMAC_INT_MSK register for the ALT_EMAC2 instance. */
1851 #define ALT_EMAC2_GMAC_INT_MSK_ADDR ALT_EMAC_GMAC_INT_MSK_ADDR(ALT_EMAC2_ADDR)
1852 /* The address of the ALT_EMAC_GMAC_MAC_ADDR0_HIGH register for the ALT_EMAC2 instance. */
1853 #define ALT_EMAC2_GMAC_MAC_ADDR0_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR0_HIGH_ADDR(ALT_EMAC2_ADDR)
1854 /* The address of the ALT_EMAC_GMAC_MAC_ADDR0_LOW register for the ALT_EMAC2 instance. */
1855 #define ALT_EMAC2_GMAC_MAC_ADDR0_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR0_LOW_ADDR(ALT_EMAC2_ADDR)
1856 /* The address of the ALT_EMAC_GMAC_MAC_ADDR1_HIGH register for the ALT_EMAC2 instance. */
1857 #define ALT_EMAC2_GMAC_MAC_ADDR1_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR1_HIGH_ADDR(ALT_EMAC2_ADDR)
1858 /* The address of the ALT_EMAC_GMAC_MAC_ADDR1_LOW register for the ALT_EMAC2 instance. */
1859 #define ALT_EMAC2_GMAC_MAC_ADDR1_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR1_LOW_ADDR(ALT_EMAC2_ADDR)
1860 /* The address of the ALT_EMAC_GMAC_MAC_ADDR2_HIGH register for the ALT_EMAC2 instance. */
1861 #define ALT_EMAC2_GMAC_MAC_ADDR2_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR2_HIGH_ADDR(ALT_EMAC2_ADDR)
1862 /* The address of the ALT_EMAC_GMAC_MAC_ADDR2_LOW register for the ALT_EMAC2 instance. */
1863 #define ALT_EMAC2_GMAC_MAC_ADDR2_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR2_LOW_ADDR(ALT_EMAC2_ADDR)
1864 /* The address of the ALT_EMAC_GMAC_MAC_ADDR3_HIGH register for the ALT_EMAC2 instance. */
1865 #define ALT_EMAC2_GMAC_MAC_ADDR3_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR3_HIGH_ADDR(ALT_EMAC2_ADDR)
1866 /* The address of the ALT_EMAC_GMAC_MAC_ADDR3_LOW register for the ALT_EMAC2 instance. */
1867 #define ALT_EMAC2_GMAC_MAC_ADDR3_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR3_LOW_ADDR(ALT_EMAC2_ADDR)
1868 /* The address of the ALT_EMAC_GMAC_MAC_ADDR4_HIGH register for the ALT_EMAC2 instance. */
1869 #define ALT_EMAC2_GMAC_MAC_ADDR4_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR4_HIGH_ADDR(ALT_EMAC2_ADDR)
1870 /* The address of the ALT_EMAC_GMAC_MAC_ADDR4_LOW register for the ALT_EMAC2 instance. */
1871 #define ALT_EMAC2_GMAC_MAC_ADDR4_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR4_LOW_ADDR(ALT_EMAC2_ADDR)
1872 /* The address of the ALT_EMAC_GMAC_MAC_ADDR5_HIGH register for the ALT_EMAC2 instance. */
1873 #define ALT_EMAC2_GMAC_MAC_ADDR5_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR5_HIGH_ADDR(ALT_EMAC2_ADDR)
1874 /* The address of the ALT_EMAC_GMAC_MAC_ADDR5_LOW register for the ALT_EMAC2 instance. */
1875 #define ALT_EMAC2_GMAC_MAC_ADDR5_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR5_LOW_ADDR(ALT_EMAC2_ADDR)
1876 /* The address of the ALT_EMAC_GMAC_MAC_ADDR6_HIGH register for the ALT_EMAC2 instance. */
1877 #define ALT_EMAC2_GMAC_MAC_ADDR6_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR6_HIGH_ADDR(ALT_EMAC2_ADDR)
1878 /* The address of the ALT_EMAC_GMAC_MAC_ADDR6_LOW register for the ALT_EMAC2 instance. */
1879 #define ALT_EMAC2_GMAC_MAC_ADDR6_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR6_LOW_ADDR(ALT_EMAC2_ADDR)
1880 /* The address of the ALT_EMAC_GMAC_MAC_ADDR7_HIGH register for the ALT_EMAC2 instance. */
1881 #define ALT_EMAC2_GMAC_MAC_ADDR7_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR7_HIGH_ADDR(ALT_EMAC2_ADDR)
1882 /* The address of the ALT_EMAC_GMAC_MAC_ADDR7_LOW register for the ALT_EMAC2 instance. */
1883 #define ALT_EMAC2_GMAC_MAC_ADDR7_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR7_LOW_ADDR(ALT_EMAC2_ADDR)
1884 /* The address of the ALT_EMAC_GMAC_MAC_ADDR8_HIGH register for the ALT_EMAC2 instance. */
1885 #define ALT_EMAC2_GMAC_MAC_ADDR8_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR8_HIGH_ADDR(ALT_EMAC2_ADDR)
1886 /* The address of the ALT_EMAC_GMAC_MAC_ADDR8_LOW register for the ALT_EMAC2 instance. */
1887 #define ALT_EMAC2_GMAC_MAC_ADDR8_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR8_LOW_ADDR(ALT_EMAC2_ADDR)
1888 /* The address of the ALT_EMAC_GMAC_MAC_ADDR9_HIGH register for the ALT_EMAC2 instance. */
1889 #define ALT_EMAC2_GMAC_MAC_ADDR9_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR9_HIGH_ADDR(ALT_EMAC2_ADDR)
1890 /* The address of the ALT_EMAC_GMAC_MAC_ADDR9_LOW register for the ALT_EMAC2 instance. */
1891 #define ALT_EMAC2_GMAC_MAC_ADDR9_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR9_LOW_ADDR(ALT_EMAC2_ADDR)
1892 /* The address of the ALT_EMAC_GMAC_MAC_ADDR10_HIGH register for the ALT_EMAC2 instance. */
1893 #define ALT_EMAC2_GMAC_MAC_ADDR10_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR10_HIGH_ADDR(ALT_EMAC2_ADDR)
1894 /* The address of the ALT_EMAC_GMAC_MAC_ADDR10_LOW register for the ALT_EMAC2 instance. */
1895 #define ALT_EMAC2_GMAC_MAC_ADDR10_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR10_LOW_ADDR(ALT_EMAC2_ADDR)
1896 /* The address of the ALT_EMAC_GMAC_MAC_ADDR11_HIGH register for the ALT_EMAC2 instance. */
1897 #define ALT_EMAC2_GMAC_MAC_ADDR11_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR11_HIGH_ADDR(ALT_EMAC2_ADDR)
1898 /* The address of the ALT_EMAC_GMAC_MAC_ADDR11_LOW register for the ALT_EMAC2 instance. */
1899 #define ALT_EMAC2_GMAC_MAC_ADDR11_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR11_LOW_ADDR(ALT_EMAC2_ADDR)
1900 /* The address of the ALT_EMAC_GMAC_MAC_ADDR12_HIGH register for the ALT_EMAC2 instance. */
1901 #define ALT_EMAC2_GMAC_MAC_ADDR12_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR12_HIGH_ADDR(ALT_EMAC2_ADDR)
1902 /* The address of the ALT_EMAC_GMAC_MAC_ADDR12_LOW register for the ALT_EMAC2 instance. */
1903 #define ALT_EMAC2_GMAC_MAC_ADDR12_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR12_LOW_ADDR(ALT_EMAC2_ADDR)
1904 /* The address of the ALT_EMAC_GMAC_MAC_ADDR13_HIGH register for the ALT_EMAC2 instance. */
1905 #define ALT_EMAC2_GMAC_MAC_ADDR13_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR13_HIGH_ADDR(ALT_EMAC2_ADDR)
1906 /* The address of the ALT_EMAC_GMAC_MAC_ADDR13_LOW register for the ALT_EMAC2 instance. */
1907 #define ALT_EMAC2_GMAC_MAC_ADDR13_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR13_LOW_ADDR(ALT_EMAC2_ADDR)
1908 /* The address of the ALT_EMAC_GMAC_MAC_ADDR14_HIGH register for the ALT_EMAC2 instance. */
1909 #define ALT_EMAC2_GMAC_MAC_ADDR14_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR14_HIGH_ADDR(ALT_EMAC2_ADDR)
1910 /* The address of the ALT_EMAC_GMAC_MAC_ADDR14_LOW register for the ALT_EMAC2 instance. */
1911 #define ALT_EMAC2_GMAC_MAC_ADDR14_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR14_LOW_ADDR(ALT_EMAC2_ADDR)
1912 /* The address of the ALT_EMAC_GMAC_MAC_ADDR15_HIGH register for the ALT_EMAC2 instance. */
1913 #define ALT_EMAC2_GMAC_MAC_ADDR15_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR15_HIGH_ADDR(ALT_EMAC2_ADDR)
1914 /* The address of the ALT_EMAC_GMAC_MAC_ADDR15_LOW register for the ALT_EMAC2 instance. */
1915 #define ALT_EMAC2_GMAC_MAC_ADDR15_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR15_LOW_ADDR(ALT_EMAC2_ADDR)
1916 /* The address of the ALT_EMAC_GMAC_MII_CTL_STAT register for the ALT_EMAC2 instance. */
1917 #define ALT_EMAC2_GMAC_SGMII_RGMII_SMII_CTL_STAT_ADDR ALT_EMAC_GMAC_MII_CTL_STAT_ADDR(ALT_EMAC2_ADDR)
1918 /* The address of the ALT_EMAC_GMAC_WDOG_TMO register for the ALT_EMAC2 instance. */
1919 #define ALT_EMAC2_GMAC_WDOG_TMO_ADDR ALT_EMAC_GMAC_WDOG_TMO_ADDR(ALT_EMAC2_ADDR)
1920 /* The address of the ALT_EMAC_GMAC_GENPIO register for the ALT_EMAC2 instance. */
1921 #define ALT_EMAC2_GMAC_GENPIO_ADDR ALT_EMAC_GMAC_GENPIO_ADDR(ALT_EMAC2_ADDR)
1922 /* The address of the ALT_EMAC_GMAC_MMC_CTL register for the ALT_EMAC2 instance. */
1923 #define ALT_EMAC2_GMAC_MMC_CTL_ADDR ALT_EMAC_GMAC_MMC_CTL_ADDR(ALT_EMAC2_ADDR)
1924 /* The address of the ALT_EMAC_GMAC_MMC_RX_INT register for the ALT_EMAC2 instance. */
1925 #define ALT_EMAC2_GMAC_MMC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_RX_INT_ADDR(ALT_EMAC2_ADDR)
1926 /* The address of the ALT_EMAC_GMAC_MMC_TX_INT register for the ALT_EMAC2 instance. */
1927 #define ALT_EMAC2_GMAC_MMC_TX_INT_ADDR ALT_EMAC_GMAC_MMC_TX_INT_ADDR(ALT_EMAC2_ADDR)
1928 /* The address of the ALT_EMAC_GMAC_MMC_RX_INT_MSK register for the ALT_EMAC2 instance. */
1929 #define ALT_EMAC2_GMAC_MMC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_RX_INT_MSK_ADDR(ALT_EMAC2_ADDR)
1930 /* The address of the ALT_EMAC_GMAC_MMC_TX_INT_MSK register for the ALT_EMAC2 instance. */
1931 #define ALT_EMAC2_GMAC_MMC_TX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_TX_INT_MSK_ADDR(ALT_EMAC2_ADDR)
1932 /* The address of the ALT_EMAC_GMAC_TXOCTETCOUNT_GB register for the ALT_EMAC2 instance. */
1933 #define ALT_EMAC2_GMAC_TXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_TXOCTETCOUNT_GB_ADDR(ALT_EMAC2_ADDR)
1934 /* The address of the ALT_EMAC_GMAC_TXFRMCOUNT_GB register for the ALT_EMAC2 instance. */
1935 #define ALT_EMAC2_GMAC_TXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_GB_ADDR(ALT_EMAC2_ADDR)
1936 /* The address of the ALT_EMAC_GMAC_TXBCASTFRMS_G register for the ALT_EMAC2 instance. */
1937 #define ALT_EMAC2_GMAC_TXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_G_ADDR(ALT_EMAC2_ADDR)
1938 /* The address of the ALT_EMAC_GMAC_TXMCASTFRMS_G register for the ALT_EMAC2 instance. */
1939 #define ALT_EMAC2_GMAC_TXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_G_ADDR(ALT_EMAC2_ADDR)
1940 /* The address of the ALT_EMAC_GMAC_TX64OCTETS_GB register for the ALT_EMAC2 instance. */
1941 #define ALT_EMAC2_GMAC_TX64OCTETS_GB_ADDR ALT_EMAC_GMAC_TX64OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
1942 /* The address of the ALT_EMAC_GMAC_TX65TO127OCTETS_GB register for the ALT_EMAC2 instance. */
1943 #define ALT_EMAC2_GMAC_TX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_TX65TO127OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
1944 /* The address of the ALT_EMAC_GMAC_TX128TO255OCTETS_GB register for the ALT_EMAC2 instance. */
1945 #define ALT_EMAC2_GMAC_TX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_TX128TO255OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
1946 /* The address of the ALT_EMAC_GMAC_TX256TO511OCTETS_GB register for the ALT_EMAC2 instance. */
1947 #define ALT_EMAC2_GMAC_TX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_TX256TO511OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
1948 /* The address of the ALT_EMAC_GMAC_TX512TO1023OCTETS_GB register for the ALT_EMAC2 instance. */
1949 #define ALT_EMAC2_GMAC_TX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_TX512TO1023OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
1950 /* The address of the ALT_EMAC_GMAC_TX1024TOMAXOCTETS_GB register for the ALT_EMAC2 instance. */
1951 #define ALT_EMAC2_GMAC_TX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_TX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC2_ADDR)
1952 /* The address of the ALT_EMAC_GMAC_TXUNICASTFRMS_GB register for the ALT_EMAC2 instance. */
1953 #define ALT_EMAC2_GMAC_TXUNICASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXUNICASTFRMS_GB_ADDR(ALT_EMAC2_ADDR)
1954 /* The address of the ALT_EMAC_GMAC_TXMCASTFRMS_GB register for the ALT_EMAC2 instance. */
1955 #define ALT_EMAC2_GMAC_TXMCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_GB_ADDR(ALT_EMAC2_ADDR)
1956 /* The address of the ALT_EMAC_GMAC_TXBCASTFRMS_GB register for the ALT_EMAC2 instance. */
1957 #define ALT_EMAC2_GMAC_TXBCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_GB_ADDR(ALT_EMAC2_ADDR)
1958 /* The address of the ALT_EMAC_GMAC_TXUNDERFLOWERROR register for the ALT_EMAC2 instance. */
1959 #define ALT_EMAC2_GMAC_TXUNDERFLOWERROR_ADDR ALT_EMAC_GMAC_TXUNDERFLOWERROR_ADDR(ALT_EMAC2_ADDR)
1960 /* The address of the ALT_EMAC_GMAC_TXSINGLECOL_G register for the ALT_EMAC2 instance. */
1961 #define ALT_EMAC2_GMAC_TXSINGLECOL_G_ADDR ALT_EMAC_GMAC_TXSINGLECOL_G_ADDR(ALT_EMAC2_ADDR)
1962 /* The address of the ALT_EMAC_GMAC_TXMULTICOL_G register for the ALT_EMAC2 instance. */
1963 #define ALT_EMAC2_GMAC_TXMULTICOL_G_ADDR ALT_EMAC_GMAC_TXMULTICOL_G_ADDR(ALT_EMAC2_ADDR)
1964 /* The address of the ALT_EMAC_GMAC_TXDEFERRED register for the ALT_EMAC2 instance. */
1965 #define ALT_EMAC2_GMAC_TXDEFERRED_ADDR ALT_EMAC_GMAC_TXDEFERRED_ADDR(ALT_EMAC2_ADDR)
1966 /* The address of the ALT_EMAC_GMAC_TXLATECOL register for the ALT_EMAC2 instance. */
1967 #define ALT_EMAC2_GMAC_TXLATECOL_ADDR ALT_EMAC_GMAC_TXLATECOL_ADDR(ALT_EMAC2_ADDR)
1968 /* The address of the ALT_EMAC_GMAC_TXEXESSCOL register for the ALT_EMAC2 instance. */
1969 #define ALT_EMAC2_GMAC_TXEXESSCOL_ADDR ALT_EMAC_GMAC_TXEXESSCOL_ADDR(ALT_EMAC2_ADDR)
1970 /* The address of the ALT_EMAC_GMAC_TXCARRIERERR register for the ALT_EMAC2 instance. */
1971 #define ALT_EMAC2_GMAC_TXCARRIERERR_ADDR ALT_EMAC_GMAC_TXCARRIERERR_ADDR(ALT_EMAC2_ADDR)
1972 /* The address of the ALT_EMAC_GMAC_TXOCTETCNT register for the ALT_EMAC2 instance. */
1973 #define ALT_EMAC2_GMAC_TXOCTETCNT_ADDR ALT_EMAC_GMAC_TXOCTETCNT_ADDR(ALT_EMAC2_ADDR)
1974 /* The address of the ALT_EMAC_GMAC_TXFRMCOUNT_G register for the ALT_EMAC2 instance. */
1975 #define ALT_EMAC2_GMAC_TXFRMCOUNT_G_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_G_ADDR(ALT_EMAC2_ADDR)
1976 /* The address of the ALT_EMAC_GMAC_TXEXCESSDEF register for the ALT_EMAC2 instance. */
1977 #define ALT_EMAC2_GMAC_TXEXCESSDEF_ADDR ALT_EMAC_GMAC_TXEXCESSDEF_ADDR(ALT_EMAC2_ADDR)
1978 /* The address of the ALT_EMAC_GMAC_TXPAUSEFRMS register for the ALT_EMAC2 instance. */
1979 #define ALT_EMAC2_GMAC_TXPAUSEFRMS_ADDR ALT_EMAC_GMAC_TXPAUSEFRMS_ADDR(ALT_EMAC2_ADDR)
1980 /* The address of the ALT_EMAC_GMAC_TXVLANFRMS_G register for the ALT_EMAC2 instance. */
1981 #define ALT_EMAC2_GMAC_TXVLANFRMS_G_ADDR ALT_EMAC_GMAC_TXVLANFRMS_G_ADDR(ALT_EMAC2_ADDR)
1982 /* The address of the ALT_EMAC_GMAC_TXOVERSIZE_G register for the ALT_EMAC2 instance. */
1983 #define ALT_EMAC2_GMAC_TXOVERSIZE_G_ADDR ALT_EMAC_GMAC_TXOVERSIZE_G_ADDR(ALT_EMAC2_ADDR)
1984 /* The address of the ALT_EMAC_GMAC_RXFRMCOUNT_GB register for the ALT_EMAC2 instance. */
1985 #define ALT_EMAC2_GMAC_RXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_RXFRMCOUNT_GB_ADDR(ALT_EMAC2_ADDR)
1986 /* The address of the ALT_EMAC_GMAC_RXOCTETCOUNT_GB register for the ALT_EMAC2 instance. */
1987 #define ALT_EMAC2_GMAC_RXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_GB_ADDR(ALT_EMAC2_ADDR)
1988 /* The address of the ALT_EMAC_GMAC_RXOCTETCOUNT_G register for the ALT_EMAC2 instance. */
1989 #define ALT_EMAC2_GMAC_RXOCTETCOUNT_G_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_G_ADDR(ALT_EMAC2_ADDR)
1990 /* The address of the ALT_EMAC_GMAC_RXBCASTFRMS_G register for the ALT_EMAC2 instance. */
1991 #define ALT_EMAC2_GMAC_RXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXBCASTFRMS_G_ADDR(ALT_EMAC2_ADDR)
1992 /* The address of the ALT_EMAC_GMAC_RXMCASTFRMS_G register for the ALT_EMAC2 instance. */
1993 #define ALT_EMAC2_GMAC_RXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXMCASTFRMS_G_ADDR(ALT_EMAC2_ADDR)
1994 /* The address of the ALT_EMAC_GMAC_RXCRCERROR register for the ALT_EMAC2 instance. */
1995 #define ALT_EMAC2_GMAC_RXCRCERROR_ADDR ALT_EMAC_GMAC_RXCRCERROR_ADDR(ALT_EMAC2_ADDR)
1996 /* The address of the ALT_EMAC_GMAC_RXALIGNMENTERROR register for the ALT_EMAC2 instance. */
1997 #define ALT_EMAC2_GMAC_RXALIGNMENTERROR_ADDR ALT_EMAC_GMAC_RXALIGNMENTERROR_ADDR(ALT_EMAC2_ADDR)
1998 /* The address of the ALT_EMAC_GMAC_RXRUNTERROR register for the ALT_EMAC2 instance. */
1999 #define ALT_EMAC2_GMAC_RXRUNTERROR_ADDR ALT_EMAC_GMAC_RXRUNTERROR_ADDR(ALT_EMAC2_ADDR)
2000 /* The address of the ALT_EMAC_GMAC_RXJABBERERROR register for the ALT_EMAC2 instance. */
2001 #define ALT_EMAC2_GMAC_RXJABBERERROR_ADDR ALT_EMAC_GMAC_RXJABBERERROR_ADDR(ALT_EMAC2_ADDR)
2002 /* The address of the ALT_EMAC_GMAC_RXUNDERSIZE_G register for the ALT_EMAC2 instance. */
2003 #define ALT_EMAC2_GMAC_RXUNDERSIZE_G_ADDR ALT_EMAC_GMAC_RXUNDERSIZE_G_ADDR(ALT_EMAC2_ADDR)
2004 /* The address of the ALT_EMAC_GMAC_RXOVERSIZE_G register for the ALT_EMAC2 instance. */
2005 #define ALT_EMAC2_GMAC_RXOVERSIZE_G_ADDR ALT_EMAC_GMAC_RXOVERSIZE_G_ADDR(ALT_EMAC2_ADDR)
2006 /* The address of the ALT_EMAC_GMAC_RX64OCTETS_GB register for the ALT_EMAC2 instance. */
2007 #define ALT_EMAC2_GMAC_RX64OCTETS_GB_ADDR ALT_EMAC_GMAC_RX64OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
2008 /* The address of the ALT_EMAC_GMAC_RX65TO127OCTETS_GB register for the ALT_EMAC2 instance. */
2009 #define ALT_EMAC2_GMAC_RX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_RX65TO127OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
2010 /* The address of the ALT_EMAC_GMAC_RX128TO255OCTETS_GB register for the ALT_EMAC2 instance. */
2011 #define ALT_EMAC2_GMAC_RX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_RX128TO255OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
2012 /* The address of the ALT_EMAC_GMAC_RX256TO511OCTETS_GB register for the ALT_EMAC2 instance. */
2013 #define ALT_EMAC2_GMAC_RX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_RX256TO511OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
2014 /* The address of the ALT_EMAC_GMAC_RX512TO1023OCTETS_GB register for the ALT_EMAC2 instance. */
2015 #define ALT_EMAC2_GMAC_RX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_RX512TO1023OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
2016 /* The address of the ALT_EMAC_GMAC_RX1024TOMAXOCTETS_GB register for the ALT_EMAC2 instance. */
2017 #define ALT_EMAC2_GMAC_RX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_RX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC2_ADDR)
2018 /* The address of the ALT_EMAC_GMAC_RXUNICASTFRMS_G register for the ALT_EMAC2 instance. */
2019 #define ALT_EMAC2_GMAC_RXUNICASTFRMS_G_ADDR ALT_EMAC_GMAC_RXUNICASTFRMS_G_ADDR(ALT_EMAC2_ADDR)
2020 /* The address of the ALT_EMAC_GMAC_RXLENERROR register for the ALT_EMAC2 instance. */
2021 #define ALT_EMAC2_GMAC_RXLENERROR_ADDR ALT_EMAC_GMAC_RXLENERROR_ADDR(ALT_EMAC2_ADDR)
2022 /* The address of the ALT_EMAC_GMAC_RXOUTOFRANGETYPE register for the ALT_EMAC2 instance. */
2023 #define ALT_EMAC2_GMAC_RXOUTOFRANGETYPE_ADDR ALT_EMAC_GMAC_RXOUTOFRANGETYPE_ADDR(ALT_EMAC2_ADDR)
2024 /* The address of the ALT_EMAC_GMAC_RXPAUSEFRMS register for the ALT_EMAC2 instance. */
2025 #define ALT_EMAC2_GMAC_RXPAUSEFRMS_ADDR ALT_EMAC_GMAC_RXPAUSEFRMS_ADDR(ALT_EMAC2_ADDR)
2026 /* The address of the ALT_EMAC_GMAC_RXFIFOOVF register for the ALT_EMAC2 instance. */
2027 #define ALT_EMAC2_GMAC_RXFIFOOVF_ADDR ALT_EMAC_GMAC_RXFIFOOVF_ADDR(ALT_EMAC2_ADDR)
2028 /* The address of the ALT_EMAC_GMAC_RXVLANFRMS_GB register for the ALT_EMAC2 instance. */
2029 #define ALT_EMAC2_GMAC_RXVLANFRMS_GB_ADDR ALT_EMAC_GMAC_RXVLANFRMS_GB_ADDR(ALT_EMAC2_ADDR)
2030 /* The address of the ALT_EMAC_GMAC_RXWDERROR register for the ALT_EMAC2 instance. */
2031 #define ALT_EMAC2_GMAC_RXWDERROR_ADDR ALT_EMAC_GMAC_RXWDERROR_ADDR(ALT_EMAC2_ADDR)
2032 /* The address of the ALT_EMAC_GMAC_RXRCVERROR register for the ALT_EMAC2 instance. */
2033 #define ALT_EMAC2_GMAC_RXRCVERROR_ADDR ALT_EMAC_GMAC_RXRCVERROR_ADDR(ALT_EMAC2_ADDR)
2034 /* The address of the ALT_EMAC_GMAC_RXCTLFRMS_G register for the ALT_EMAC2 instance. */
2035 #define ALT_EMAC2_GMAC_RXCTLFRMS_G_ADDR ALT_EMAC_GMAC_RXCTLFRMS_G_ADDR(ALT_EMAC2_ADDR)
2036 /* The address of the ALT_EMAC_GMAC_MMC_IPC_RX_INT_MSK register for the ALT_EMAC2 instance. */
2037 #define ALT_EMAC2_GMAC_MMC_IPC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_MSK_ADDR(ALT_EMAC2_ADDR)
2038 /* The address of the ALT_EMAC_GMAC_MMC_IPC_RX_INT register for the ALT_EMAC2 instance. */
2039 #define ALT_EMAC2_GMAC_MMC_IPC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_ADDR(ALT_EMAC2_ADDR)
2040 /* The address of the ALT_EMAC_GMAC_RXIPV4_GD_FRMS register for the ALT_EMAC2 instance. */
2041 #define ALT_EMAC2_GMAC_RXIPV4_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
2042 /* The address of the ALT_EMAC_GMAC_RXIPV4_HDRERR_FRMS register for the ALT_EMAC2 instance. */
2043 #define ALT_EMAC2_GMAC_RXIPV4_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_FRMS_ADDR(ALT_EMAC2_ADDR)
2044 /* The address of the ALT_EMAC_GMAC_RXIPV4_NOPAY_FRMS register for the ALT_EMAC2 instance. */
2045 #define ALT_EMAC2_GMAC_RXIPV4_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_FRMS_ADDR(ALT_EMAC2_ADDR)
2046 /* The address of the ALT_EMAC_GMAC_RXIPV4_FRAG_FRMS register for the ALT_EMAC2 instance. */
2047 #define ALT_EMAC2_GMAC_RXIPV4_FRAG_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_FRMS_ADDR(ALT_EMAC2_ADDR)
2048 /* The address of the ALT_EMAC_GMAC_RXIPV4_UDSBL_FRMS register for the ALT_EMAC2 instance. */
2049 #define ALT_EMAC2_GMAC_RXIPV4_UDSBL_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_FRMS_ADDR(ALT_EMAC2_ADDR)
2050 /* The address of the ALT_EMAC_GMAC_RXIPV6_GD_FRMS register for the ALT_EMAC2 instance. */
2051 #define ALT_EMAC2_GMAC_RXIPV6_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
2052 /* The address of the ALT_EMAC_GMAC_RXIPV6_HDRERR_FRMS register for the ALT_EMAC2 instance. */
2053 #define ALT_EMAC2_GMAC_RXIPV6_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_FRMS_ADDR(ALT_EMAC2_ADDR)
2054 /* The address of the ALT_EMAC_GMAC_RXIPV6_NOPAY_FRMS register for the ALT_EMAC2 instance. */
2055 #define ALT_EMAC2_GMAC_RXIPV6_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_FRMS_ADDR(ALT_EMAC2_ADDR)
2056 /* The address of the ALT_EMAC_GMAC_RXUDP_GD_FRMS register for the ALT_EMAC2 instance. */
2057 #define ALT_EMAC2_GMAC_RXUDP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
2058 /* The address of the ALT_EMAC_GMAC_RXUDP_ERR_FRMS register for the ALT_EMAC2 instance. */
2059 #define ALT_EMAC2_GMAC_RXUDP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_FRMS_ADDR(ALT_EMAC2_ADDR)
2060 /* The address of the ALT_EMAC_GMAC_RXTCP_GD_FRMS register for the ALT_EMAC2 instance. */
2061 #define ALT_EMAC2_GMAC_RXTCP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
2062 /* The address of the ALT_EMAC_GMAC_RXTCP_ERR_FRMS register for the ALT_EMAC2 instance. */
2063 #define ALT_EMAC2_GMAC_RXTCP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_ERR_FRMS_ADDR(ALT_EMAC2_ADDR)
2064 /* The address of the ALT_EMAC_GMAC_RXICMP_GD_FRMS register for the ALT_EMAC2 instance. */
2065 #define ALT_EMAC2_GMAC_RXICMP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
2066 /* The address of the ALT_EMAC_GMAC_RXICMP_ERR_FRMS register for the ALT_EMAC2 instance. */
2067 #define ALT_EMAC2_GMAC_RXICMP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_FRMS_ADDR(ALT_EMAC2_ADDR)
2068 /* The address of the ALT_EMAC_GMAC_RXIPV4_GD_OCTETS register for the ALT_EMAC2 instance. */
2069 #define ALT_EMAC2_GMAC_RXIPV4_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
2070 /* The address of the ALT_EMAC_GMAC_RXIPV4_HDRERR_OCTETS register for the ALT_EMAC2 instance. */
2071 #define ALT_EMAC2_GMAC_RXIPV4_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_OCTETS_ADDR(ALT_EMAC2_ADDR)
2072 /* The address of the ALT_EMAC_GMAC_RXIPV4_NOPAY_OCTETS register for the ALT_EMAC2 instance. */
2073 #define ALT_EMAC2_GMAC_RXIPV4_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_OCTETS_ADDR(ALT_EMAC2_ADDR)
2074 /* The address of the ALT_EMAC_GMAC_RXIPV4_FRAG_OCTETS register for the ALT_EMAC2 instance. */
2075 #define ALT_EMAC2_GMAC_RXIPV4_FRAG_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_OCTETS_ADDR(ALT_EMAC2_ADDR)
2076 /* The address of the ALT_EMAC_GMAC_RXIPV4_UDSBL_OCTETS register for the ALT_EMAC2 instance. */
2077 #define ALT_EMAC2_GMAC_RXIPV4_UDSBL_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_OCTETS_ADDR(ALT_EMAC2_ADDR)
2078 /* The address of the ALT_EMAC_GMAC_RXIPV6_GD_OCTETS register for the ALT_EMAC2 instance. */
2079 #define ALT_EMAC2_GMAC_RXIPV6_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
2080 /* The address of the ALT_EMAC_GMAC_RXIPV6_HDRERR_OCTETS register for the ALT_EMAC2 instance. */
2081 #define ALT_EMAC2_GMAC_RXIPV6_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_OCTETS_ADDR(ALT_EMAC2_ADDR)
2082 /* The address of the ALT_EMAC_GMAC_RXIPV6_NOPAY_OCTETS register for the ALT_EMAC2 instance. */
2083 #define ALT_EMAC2_GMAC_RXIPV6_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_OCTETS_ADDR(ALT_EMAC2_ADDR)
2084 /* The address of the ALT_EMAC_GMAC_RXUDP_GD_OCTETS register for the ALT_EMAC2 instance. */
2085 #define ALT_EMAC2_GMAC_RXUDP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
2086 /* The address of the ALT_EMAC_GMAC_RXUDP_ERR_OCTETS register for the ALT_EMAC2 instance. */
2087 #define ALT_EMAC2_GMAC_RXUDP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_OCTETS_ADDR(ALT_EMAC2_ADDR)
2088 /* The address of the ALT_EMAC_GMAC_RXTCP_GD_OCTETS register for the ALT_EMAC2 instance. */
2089 #define ALT_EMAC2_GMAC_RXTCP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXTCP_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
2090 /* The address of the ALT_EMAC_GMAC_RXTCPERROCTETS register for the ALT_EMAC2 instance. */
2091 #define ALT_EMAC2_GMAC_RXTCPERROCTETS_ADDR ALT_EMAC_GMAC_RXTCPERROCTETS_ADDR(ALT_EMAC2_ADDR)
2092 /* The address of the ALT_EMAC_GMAC_RXICMP_GD_OCTETS register for the ALT_EMAC2 instance. */
2093 #define ALT_EMAC2_GMAC_RXICMP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
2094 /* The address of the ALT_EMAC_GMAC_RXICMP_ERR_OCTETS register for the ALT_EMAC2 instance. */
2095 #define ALT_EMAC2_GMAC_RXICMP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_OCTETS_ADDR(ALT_EMAC2_ADDR)
2096 /* The address of the ALT_EMAC_GMAC_L3_L4_CTL0 register for the ALT_EMAC2 instance. */
2097 #define ALT_EMAC2_GMAC_L3_L4_CTL0_ADDR ALT_EMAC_GMAC_L3_L4_CTL0_ADDR(ALT_EMAC2_ADDR)
2098 /* The address of the ALT_EMAC_GMAC_LYR4_ADDR0 register for the ALT_EMAC2 instance. */
2099 #define ALT_EMAC2_GMAC_LYR4_ADDR0_ADDR ALT_EMAC_GMAC_LYR4_ADDR0_ADDR(ALT_EMAC2_ADDR)
2100 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR0_REG0 register for the ALT_EMAC2 instance. */
2101 #define ALT_EMAC2_GMAC_LYR3_ADDR0_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG0_ADDR(ALT_EMAC2_ADDR)
2102 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR1_REG0 register for the ALT_EMAC2 instance. */
2103 #define ALT_EMAC2_GMAC_LYR3_ADDR1_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG0_ADDR(ALT_EMAC2_ADDR)
2104 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR2_REG0 register for the ALT_EMAC2 instance. */
2105 #define ALT_EMAC2_GMAC_LYR3_ADDR2_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG0_ADDR(ALT_EMAC2_ADDR)
2106 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR3_REG0 register for the ALT_EMAC2 instance. */
2107 #define ALT_EMAC2_GMAC_LYR3_ADDR3_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG0_ADDR(ALT_EMAC2_ADDR)
2108 /* The address of the ALT_EMAC_GMAC_L3_L4_CTL1 register for the ALT_EMAC2 instance. */
2109 #define ALT_EMAC2_GMAC_L3_L4_CTL1_ADDR ALT_EMAC_GMAC_L3_L4_CTL1_ADDR(ALT_EMAC2_ADDR)
2110 /* The address of the ALT_EMAC_GMAC_LYR4_ADDR1 register for the ALT_EMAC2 instance. */
2111 #define ALT_EMAC2_GMAC_LYR4_ADDR1_ADDR ALT_EMAC_GMAC_LYR4_ADDR1_ADDR(ALT_EMAC2_ADDR)
2112 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR0_REG1 register for the ALT_EMAC2 instance. */
2113 #define ALT_EMAC2_GMAC_LYR3_ADDR0_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG1_ADDR(ALT_EMAC2_ADDR)
2114 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR1_REG1 register for the ALT_EMAC2 instance. */
2115 #define ALT_EMAC2_GMAC_LYR3_ADDR1_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG1_ADDR(ALT_EMAC2_ADDR)
2116 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR2_REG1 register for the ALT_EMAC2 instance. */
2117 #define ALT_EMAC2_GMAC_LYR3_ADDR2_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG1_ADDR(ALT_EMAC2_ADDR)
2118 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR3_REG1 register for the ALT_EMAC2 instance. */
2119 #define ALT_EMAC2_GMAC_LYR3_ADDR3_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG1_ADDR(ALT_EMAC2_ADDR)
2120 /* The address of the ALT_EMAC_GMAC_L3_L4_CTL2 register for the ALT_EMAC2 instance. */
2121 #define ALT_EMAC2_GMAC_L3_L4_CTL2_ADDR ALT_EMAC_GMAC_L3_L4_CTL2_ADDR(ALT_EMAC2_ADDR)
2122 /* The address of the ALT_EMAC_GMAC_LYR4_ADDR2 register for the ALT_EMAC2 instance. */
2123 #define ALT_EMAC2_GMAC_LYR4_ADDR2_ADDR ALT_EMAC_GMAC_LYR4_ADDR2_ADDR(ALT_EMAC2_ADDR)
2124 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR0_REG2 register for the ALT_EMAC2 instance. */
2125 #define ALT_EMAC2_GMAC_LYR3_ADDR0_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG2_ADDR(ALT_EMAC2_ADDR)
2126 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR1_REG2 register for the ALT_EMAC2 instance. */
2127 #define ALT_EMAC2_GMAC_LYR3_ADDR1_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG2_ADDR(ALT_EMAC2_ADDR)
2128 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR2_REG2 register for the ALT_EMAC2 instance. */
2129 #define ALT_EMAC2_GMAC_LYR3_ADDR2_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG2_ADDR(ALT_EMAC2_ADDR)
2130 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR3_REG2 register for the ALT_EMAC2 instance. */
2131 #define ALT_EMAC2_GMAC_LYR3_ADDR3_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG2_ADDR(ALT_EMAC2_ADDR)
2132 /* The address of the ALT_EMAC_GMAC_L3_L4_CTL3 register for the ALT_EMAC2 instance. */
2133 #define ALT_EMAC2_GMAC_L3_L4_CTL3_ADDR ALT_EMAC_GMAC_L3_L4_CTL3_ADDR(ALT_EMAC2_ADDR)
2134 /* The address of the ALT_EMAC_GMAC_LYR4_ADDR3 register for the ALT_EMAC2 instance. */
2135 #define ALT_EMAC2_GMAC_LYR4_ADDR3_ADDR ALT_EMAC_GMAC_LYR4_ADDR3_ADDR(ALT_EMAC2_ADDR)
2136 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR0_REG3 register for the ALT_EMAC2 instance. */
2137 #define ALT_EMAC2_GMAC_LYR3_ADDR0_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG3_ADDR(ALT_EMAC2_ADDR)
2138 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR1_REG3 register for the ALT_EMAC2 instance. */
2139 #define ALT_EMAC2_GMAC_LYR3_ADDR1_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG3_ADDR(ALT_EMAC2_ADDR)
2140 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR2_REG3 register for the ALT_EMAC2 instance. */
2141 #define ALT_EMAC2_GMAC_LYR3_ADDR2_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG3_ADDR(ALT_EMAC2_ADDR)
2142 /* The address of the ALT_EMAC_GMAC_LYR3_ADDR3_REG3 register for the ALT_EMAC2 instance. */
2143 #define ALT_EMAC2_GMAC_LYR3_ADDR3_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG3_ADDR(ALT_EMAC2_ADDR)
2144 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG0 register for the ALT_EMAC2 instance. */
2145 #define ALT_EMAC2_GMAC_HASH_TABLE_REG0_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG0_ADDR(ALT_EMAC2_ADDR)
2146 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG1 register for the ALT_EMAC2 instance. */
2147 #define ALT_EMAC2_GMAC_HASH_TABLE_REG1_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG1_ADDR(ALT_EMAC2_ADDR)
2148 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG2 register for the ALT_EMAC2 instance. */
2149 #define ALT_EMAC2_GMAC_HASH_TABLE_REG2_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG2_ADDR(ALT_EMAC2_ADDR)
2150 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG3 register for the ALT_EMAC2 instance. */
2151 #define ALT_EMAC2_GMAC_HASH_TABLE_REG3_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG3_ADDR(ALT_EMAC2_ADDR)
2152 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG4 register for the ALT_EMAC2 instance. */
2153 #define ALT_EMAC2_GMAC_HASH_TABLE_REG4_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG4_ADDR(ALT_EMAC2_ADDR)
2154 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG5 register for the ALT_EMAC2 instance. */
2155 #define ALT_EMAC2_GMAC_HASH_TABLE_REG5_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG5_ADDR(ALT_EMAC2_ADDR)
2156 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG6 register for the ALT_EMAC2 instance. */
2157 #define ALT_EMAC2_GMAC_HASH_TABLE_REG6_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG6_ADDR(ALT_EMAC2_ADDR)
2158 /* The address of the ALT_EMAC_GMAC_HASH_TABLE_REG7 register for the ALT_EMAC2 instance. */
2159 #define ALT_EMAC2_GMAC_HASH_TABLE_REG7_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG7_ADDR(ALT_EMAC2_ADDR)
2160 /* The address of the ALT_EMAC_GMAC_VLAN_INCL_REG register for the ALT_EMAC2 instance. */
2161 #define ALT_EMAC2_GMAC_VLAN_INCL_REG_ADDR ALT_EMAC_GMAC_VLAN_INCL_REG_ADDR(ALT_EMAC2_ADDR)
2162 /* The address of the ALT_EMAC_GMAC_VLAN_HASH_TABLE_REG register for the ALT_EMAC2 instance. */
2163 #define ALT_EMAC2_GMAC_VLAN_HASH_TABLE_REG_ADDR ALT_EMAC_GMAC_VLAN_HASH_TABLE_REG_ADDR(ALT_EMAC2_ADDR)
2164 /* The address of the ALT_EMAC_GMAC_TS_CTL register for the ALT_EMAC2 instance. */
2165 #define ALT_EMAC2_GMAC_TS_CTL_ADDR ALT_EMAC_GMAC_TS_CTL_ADDR(ALT_EMAC2_ADDR)
2166 /* The address of the ALT_EMAC_GMAC_SUB_SEC_INCREMENT register for the ALT_EMAC2 instance. */
2167 #define ALT_EMAC2_GMAC_SUB_SEC_INCREMENT_ADDR ALT_EMAC_GMAC_SUB_SEC_INCREMENT_ADDR(ALT_EMAC2_ADDR)
2168 /* The address of the ALT_EMAC_GMAC_SYS_TIME_SECS register for the ALT_EMAC2 instance. */
2169 #define ALT_EMAC2_GMAC_SYS_TIME_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_ADDR(ALT_EMAC2_ADDR)
2170 /* The address of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS register for the ALT_EMAC2 instance. */
2171 #define ALT_EMAC2_GMAC_SYS_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_ADDR(ALT_EMAC2_ADDR)
2172 /* The address of the ALT_EMAC_GMAC_SYS_TIME_SECS_UPDATE register for the ALT_EMAC2 instance. */
2173 #define ALT_EMAC2_GMAC_SYS_TIME_SECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_UPDATE_ADDR(ALT_EMAC2_ADDR)
2174 /* The address of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE register for the ALT_EMAC2 instance. */
2175 #define ALT_EMAC2_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR(ALT_EMAC2_ADDR)
2176 /* The address of the ALT_EMAC_GMAC_TS_ADDEND register for the ALT_EMAC2 instance. */
2177 #define ALT_EMAC2_GMAC_TS_ADDEND_ADDR ALT_EMAC_GMAC_TS_ADDEND_ADDR(ALT_EMAC2_ADDR)
2178 /* The address of the ALT_EMAC_GMAC_TGT_TIME_SECS register for the ALT_EMAC2 instance. */
2179 #define ALT_EMAC2_GMAC_TGT_TIME_SECS_ADDR ALT_EMAC_GMAC_TGT_TIME_SECS_ADDR(ALT_EMAC2_ADDR)
2180 /* The address of the ALT_EMAC_GMAC_TGT_TIME_NANOSECS register for the ALT_EMAC2 instance. */
2181 #define ALT_EMAC2_GMAC_TGT_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_TGT_TIME_NANOSECS_ADDR(ALT_EMAC2_ADDR)
2182 /* The address of the ALT_EMAC_GMAC_SYS_TIME_HIGHER_WORD_SECS register for the ALT_EMAC2 instance. */
2183 #define ALT_EMAC2_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR(ALT_EMAC2_ADDR)
2184 /* The address of the ALT_EMAC_GMAC_TS_STAT register for the ALT_EMAC2 instance. */
2185 #define ALT_EMAC2_GMAC_TS_STAT_ADDR ALT_EMAC_GMAC_TS_STAT_ADDR(ALT_EMAC2_ADDR)
2186 /* The address of the ALT_EMAC_GMAC_PPS_CTL register for the ALT_EMAC2 instance. */
2187 #define ALT_EMAC2_GMAC_PPS_CTL_ADDR ALT_EMAC_GMAC_PPS_CTL_ADDR(ALT_EMAC2_ADDR)
2188 /* The address of the ALT_EMAC_GMAC_AUX_TS_NANOSECS register for the ALT_EMAC2 instance. */
2189 #define ALT_EMAC2_GMAC_AUX_TS_NANOSECS_ADDR ALT_EMAC_GMAC_AUX_TS_NANOSECS_ADDR(ALT_EMAC2_ADDR)
2190 /* The address of the ALT_EMAC_GMAC_AUX_TS_SECS register for the ALT_EMAC2 instance. */
2191 #define ALT_EMAC2_GMAC_AUX_TS_SECS_ADDR ALT_EMAC_GMAC_AUX_TS_SECS_ADDR(ALT_EMAC2_ADDR)
2192 /* The address of the ALT_EMAC_GMAC_PPS0_INTERVAL register for the ALT_EMAC2 instance. */
2193 #define ALT_EMAC2_GMAC_PPS0_INTERVAL_ADDR ALT_EMAC_GMAC_PPS0_INTERVAL_ADDR(ALT_EMAC2_ADDR)
2194 /* The address of the ALT_EMAC_GMAC_PPS0_WIDTH register for the ALT_EMAC2 instance. */
2195 #define ALT_EMAC2_GMAC_PPS0_WIDTH_ADDR ALT_EMAC_GMAC_PPS0_WIDTH_ADDR(ALT_EMAC2_ADDR)
2196 /* The address of the ALT_EMAC_GMAC_MAC_ADDR16_HIGH register for the ALT_EMAC2 instance. */
2197 #define ALT_EMAC2_GMAC_MAC_ADDR16_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR16_HIGH_ADDR(ALT_EMAC2_ADDR)
2198 /* The address of the ALT_EMAC_GMAC_MAC_ADDR16_LOW register for the ALT_EMAC2 instance. */
2199 #define ALT_EMAC2_GMAC_MAC_ADDR16_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR16_LOW_ADDR(ALT_EMAC2_ADDR)
2200 /* The address of the ALT_EMAC_GMAC_MAC_ADDR17_HIGH register for the ALT_EMAC2 instance. */
2201 #define ALT_EMAC2_GMAC_MAC_ADDR17_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR17_HIGH_ADDR(ALT_EMAC2_ADDR)
2202 /* The address of the ALT_EMAC_GMAC_MAC_ADDR17_LOW register for the ALT_EMAC2 instance. */
2203 #define ALT_EMAC2_GMAC_MAC_ADDR17_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR17_LOW_ADDR(ALT_EMAC2_ADDR)
2204 /* The address of the ALT_EMAC_GMAC_MAC_ADDR18_HIGH register for the ALT_EMAC2 instance. */
2205 #define ALT_EMAC2_GMAC_MAC_ADDR18_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR18_HIGH_ADDR(ALT_EMAC2_ADDR)
2206 /* The address of the ALT_EMAC_GMAC_MAC_ADDR18_LOW register for the ALT_EMAC2 instance. */
2207 #define ALT_EMAC2_GMAC_MAC_ADDR18_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR18_LOW_ADDR(ALT_EMAC2_ADDR)
2208 /* The address of the ALT_EMAC_GMAC_MAC_ADDR19_HIGH register for the ALT_EMAC2 instance. */
2209 #define ALT_EMAC2_GMAC_MAC_ADDR19_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR19_HIGH_ADDR(ALT_EMAC2_ADDR)
2210 /* The address of the ALT_EMAC_GMAC_MAC_ADDR19_LOW register for the ALT_EMAC2 instance. */
2211 #define ALT_EMAC2_GMAC_MAC_ADDR19_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR19_LOW_ADDR(ALT_EMAC2_ADDR)
2212 /* The address of the ALT_EMAC_GMAC_MAC_ADDR20_HIGH register for the ALT_EMAC2 instance. */
2213 #define ALT_EMAC2_GMAC_MAC_ADDR20_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR20_HIGH_ADDR(ALT_EMAC2_ADDR)
2214 /* The address of the ALT_EMAC_GMAC_MAC_ADDR20_LOW register for the ALT_EMAC2 instance. */
2215 #define ALT_EMAC2_GMAC_MAC_ADDR20_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR20_LOW_ADDR(ALT_EMAC2_ADDR)
2216 /* The address of the ALT_EMAC_GMAC_MAC_ADDR21_HIGH register for the ALT_EMAC2 instance. */
2217 #define ALT_EMAC2_GMAC_MAC_ADDR21_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR21_HIGH_ADDR(ALT_EMAC2_ADDR)
2218 /* The address of the ALT_EMAC_GMAC_MAC_ADDR21_LOW register for the ALT_EMAC2 instance. */
2219 #define ALT_EMAC2_GMAC_MAC_ADDR21_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR21_LOW_ADDR(ALT_EMAC2_ADDR)
2220 /* The address of the ALT_EMAC_GMAC_MAC_ADDR22_HIGH register for the ALT_EMAC2 instance. */
2221 #define ALT_EMAC2_GMAC_MAC_ADDR22_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR22_HIGH_ADDR(ALT_EMAC2_ADDR)
2222 /* The address of the ALT_EMAC_GMAC_MAC_ADDR22_LOW register for the ALT_EMAC2 instance. */
2223 #define ALT_EMAC2_GMAC_MAC_ADDR22_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR22_LOW_ADDR(ALT_EMAC2_ADDR)
2224 /* The address of the ALT_EMAC_GMAC_MAC_ADDR23_HIGH register for the ALT_EMAC2 instance. */
2225 #define ALT_EMAC2_GMAC_MAC_ADDR23_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR23_HIGH_ADDR(ALT_EMAC2_ADDR)
2226 /* The address of the ALT_EMAC_GMAC_MAC_ADDR23_LOW register for the ALT_EMAC2 instance. */
2227 #define ALT_EMAC2_GMAC_MAC_ADDR23_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR23_LOW_ADDR(ALT_EMAC2_ADDR)
2228 /* The address of the ALT_EMAC_GMAC_MAC_ADDR24_HIGH register for the ALT_EMAC2 instance. */
2229 #define ALT_EMAC2_GMAC_MAC_ADDR24_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR24_HIGH_ADDR(ALT_EMAC2_ADDR)
2230 /* The address of the ALT_EMAC_GMAC_MAC_ADDR24_LOW register for the ALT_EMAC2 instance. */
2231 #define ALT_EMAC2_GMAC_MAC_ADDR24_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR24_LOW_ADDR(ALT_EMAC2_ADDR)
2232 /* The address of the ALT_EMAC_GMAC_MAC_ADDR25_HIGH register for the ALT_EMAC2 instance. */
2233 #define ALT_EMAC2_GMAC_MAC_ADDR25_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR25_HIGH_ADDR(ALT_EMAC2_ADDR)
2234 /* The address of the ALT_EMAC_GMAC_MAC_ADDR25_LOW register for the ALT_EMAC2 instance. */
2235 #define ALT_EMAC2_GMAC_MAC_ADDR25_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR25_LOW_ADDR(ALT_EMAC2_ADDR)
2236 /* The address of the ALT_EMAC_GMAC_MAC_ADDR26_HIGH register for the ALT_EMAC2 instance. */
2237 #define ALT_EMAC2_GMAC_MAC_ADDR26_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR26_HIGH_ADDR(ALT_EMAC2_ADDR)
2238 /* The address of the ALT_EMAC_GMAC_MAC_ADDR26_LOW register for the ALT_EMAC2 instance. */
2239 #define ALT_EMAC2_GMAC_MAC_ADDR26_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR26_LOW_ADDR(ALT_EMAC2_ADDR)
2240 /* The address of the ALT_EMAC_GMAC_MAC_ADDR27_HIGH register for the ALT_EMAC2 instance. */
2241 #define ALT_EMAC2_GMAC_MAC_ADDR27_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR27_HIGH_ADDR(ALT_EMAC2_ADDR)
2242 /* The address of the ALT_EMAC_GMAC_MAC_ADDR27_LOW register for the ALT_EMAC2 instance. */
2243 #define ALT_EMAC2_GMAC_MAC_ADDR27_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR27_LOW_ADDR(ALT_EMAC2_ADDR)
2244 /* The address of the ALT_EMAC_GMAC_MAC_ADDR28_HIGH register for the ALT_EMAC2 instance. */
2245 #define ALT_EMAC2_GMAC_MAC_ADDR28_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR28_HIGH_ADDR(ALT_EMAC2_ADDR)
2246 /* The address of the ALT_EMAC_GMAC_MAC_ADDR28_LOW register for the ALT_EMAC2 instance. */
2247 #define ALT_EMAC2_GMAC_MAC_ADDR28_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR28_LOW_ADDR(ALT_EMAC2_ADDR)
2248 /* The address of the ALT_EMAC_GMAC_MAC_ADDR29_HIGH register for the ALT_EMAC2 instance. */
2249 #define ALT_EMAC2_GMAC_MAC_ADDR29_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR29_HIGH_ADDR(ALT_EMAC2_ADDR)
2250 /* The address of the ALT_EMAC_GMAC_MAC_ADDR29_LOW register for the ALT_EMAC2 instance. */
2251 #define ALT_EMAC2_GMAC_MAC_ADDR29_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR29_LOW_ADDR(ALT_EMAC2_ADDR)
2252 /* The address of the ALT_EMAC_GMAC_MAC_ADDR30_HIGH register for the ALT_EMAC2 instance. */
2253 #define ALT_EMAC2_GMAC_MAC_ADDR30_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR30_HIGH_ADDR(ALT_EMAC2_ADDR)
2254 /* The address of the ALT_EMAC_GMAC_MAC_ADDR30_LOW register for the ALT_EMAC2 instance. */
2255 #define ALT_EMAC2_GMAC_MAC_ADDR30_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR30_LOW_ADDR(ALT_EMAC2_ADDR)
2256 /* The address of the ALT_EMAC_GMAC_MAC_ADDR31_HIGH register for the ALT_EMAC2 instance. */
2257 #define ALT_EMAC2_GMAC_MAC_ADDR31_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR31_HIGH_ADDR(ALT_EMAC2_ADDR)
2258 /* The address of the ALT_EMAC_GMAC_MAC_ADDR31_LOW register for the ALT_EMAC2 instance. */
2259 #define ALT_EMAC2_GMAC_MAC_ADDR31_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR31_LOW_ADDR(ALT_EMAC2_ADDR)
2260 /* The address of the ALT_EMAC_GMAC_MAC_ADDR32_HIGH register for the ALT_EMAC2 instance. */
2261 #define ALT_EMAC2_GMAC_MAC_ADDR32_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR32_HIGH_ADDR(ALT_EMAC2_ADDR)
2262 /* The address of the ALT_EMAC_GMAC_MAC_ADDR32_LOW register for the ALT_EMAC2 instance. */
2263 #define ALT_EMAC2_GMAC_MAC_ADDR32_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR32_LOW_ADDR(ALT_EMAC2_ADDR)
2264 /* The address of the ALT_EMAC_GMAC_MAC_ADDR33_HIGH register for the ALT_EMAC2 instance. */
2265 #define ALT_EMAC2_GMAC_MAC_ADDR33_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR33_HIGH_ADDR(ALT_EMAC2_ADDR)
2266 /* The address of the ALT_EMAC_GMAC_MAC_ADDR33_LOW register for the ALT_EMAC2 instance. */
2267 #define ALT_EMAC2_GMAC_MAC_ADDR33_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR33_LOW_ADDR(ALT_EMAC2_ADDR)
2268 /* The address of the ALT_EMAC_GMAC_MAC_ADDR34_HIGH register for the ALT_EMAC2 instance. */
2269 #define ALT_EMAC2_GMAC_MAC_ADDR34_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR34_HIGH_ADDR(ALT_EMAC2_ADDR)
2270 /* The address of the ALT_EMAC_GMAC_MAC_ADDR34_LOW register for the ALT_EMAC2 instance. */
2271 #define ALT_EMAC2_GMAC_MAC_ADDR34_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR34_LOW_ADDR(ALT_EMAC2_ADDR)
2272 /* The address of the ALT_EMAC_GMAC_MAC_ADDR35_HIGH register for the ALT_EMAC2 instance. */
2273 #define ALT_EMAC2_GMAC_MAC_ADDR35_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR35_HIGH_ADDR(ALT_EMAC2_ADDR)
2274 /* The address of the ALT_EMAC_GMAC_MAC_ADDR35_LOW register for the ALT_EMAC2 instance. */
2275 #define ALT_EMAC2_GMAC_MAC_ADDR35_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR35_LOW_ADDR(ALT_EMAC2_ADDR)
2276 /* The address of the ALT_EMAC_GMAC_MAC_ADDR36_HIGH register for the ALT_EMAC2 instance. */
2277 #define ALT_EMAC2_GMAC_MAC_ADDR36_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR36_HIGH_ADDR(ALT_EMAC2_ADDR)
2278 /* The address of the ALT_EMAC_GMAC_MAC_ADDR36_LOW register for the ALT_EMAC2 instance. */
2279 #define ALT_EMAC2_GMAC_MAC_ADDR36_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR36_LOW_ADDR(ALT_EMAC2_ADDR)
2280 /* The address of the ALT_EMAC_GMAC_MAC_ADDR37_HIGH register for the ALT_EMAC2 instance. */
2281 #define ALT_EMAC2_GMAC_MAC_ADDR37_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR37_HIGH_ADDR(ALT_EMAC2_ADDR)
2282 /* The address of the ALT_EMAC_GMAC_MAC_ADDR37_LOW register for the ALT_EMAC2 instance. */
2283 #define ALT_EMAC2_GMAC_MAC_ADDR37_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR37_LOW_ADDR(ALT_EMAC2_ADDR)
2284 /* The address of the ALT_EMAC_GMAC_MAC_ADDR38_HIGH register for the ALT_EMAC2 instance. */
2285 #define ALT_EMAC2_GMAC_MAC_ADDR38_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR38_HIGH_ADDR(ALT_EMAC2_ADDR)
2286 /* The address of the ALT_EMAC_GMAC_MAC_ADDR38_LOW register for the ALT_EMAC2 instance. */
2287 #define ALT_EMAC2_GMAC_MAC_ADDR38_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR38_LOW_ADDR(ALT_EMAC2_ADDR)
2288 /* The address of the ALT_EMAC_GMAC_MAC_ADDR39_HIGH register for the ALT_EMAC2 instance. */
2289 #define ALT_EMAC2_GMAC_MAC_ADDR39_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR39_HIGH_ADDR(ALT_EMAC2_ADDR)
2290 /* The address of the ALT_EMAC_GMAC_MAC_ADDR39_LOW register for the ALT_EMAC2 instance. */
2291 #define ALT_EMAC2_GMAC_MAC_ADDR39_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR39_LOW_ADDR(ALT_EMAC2_ADDR)
2292 /* The address of the ALT_EMAC_GMAC_MAC_ADDR40_HIGH register for the ALT_EMAC2 instance. */
2293 #define ALT_EMAC2_GMAC_MAC_ADDR40_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR40_HIGH_ADDR(ALT_EMAC2_ADDR)
2294 /* The address of the ALT_EMAC_GMAC_MAC_ADDR40_LOW register for the ALT_EMAC2 instance. */
2295 #define ALT_EMAC2_GMAC_MAC_ADDR40_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR40_LOW_ADDR(ALT_EMAC2_ADDR)
2296 /* The address of the ALT_EMAC_GMAC_MAC_ADDR41_HIGH register for the ALT_EMAC2 instance. */
2297 #define ALT_EMAC2_GMAC_MAC_ADDR41_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR41_HIGH_ADDR(ALT_EMAC2_ADDR)
2298 /* The address of the ALT_EMAC_GMAC_MAC_ADDR41_LOW register for the ALT_EMAC2 instance. */
2299 #define ALT_EMAC2_GMAC_MAC_ADDR41_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR41_LOW_ADDR(ALT_EMAC2_ADDR)
2300 /* The address of the ALT_EMAC_GMAC_MAC_ADDR42_HIGH register for the ALT_EMAC2 instance. */
2301 #define ALT_EMAC2_GMAC_MAC_ADDR42_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR42_HIGH_ADDR(ALT_EMAC2_ADDR)
2302 /* The address of the ALT_EMAC_GMAC_MAC_ADDR42_LOW register for the ALT_EMAC2 instance. */
2303 #define ALT_EMAC2_GMAC_MAC_ADDR42_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR42_LOW_ADDR(ALT_EMAC2_ADDR)
2304 /* The address of the ALT_EMAC_GMAC_MAC_ADDR43_HIGH register for the ALT_EMAC2 instance. */
2305 #define ALT_EMAC2_GMAC_MAC_ADDR43_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR43_HIGH_ADDR(ALT_EMAC2_ADDR)
2306 /* The address of the ALT_EMAC_GMAC_MAC_ADDR43_LOW register for the ALT_EMAC2 instance. */
2307 #define ALT_EMAC2_GMAC_MAC_ADDR43_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR43_LOW_ADDR(ALT_EMAC2_ADDR)
2308 /* The address of the ALT_EMAC_GMAC_MAC_ADDR44_HIGH register for the ALT_EMAC2 instance. */
2309 #define ALT_EMAC2_GMAC_MAC_ADDR44_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR44_HIGH_ADDR(ALT_EMAC2_ADDR)
2310 /* The address of the ALT_EMAC_GMAC_MAC_ADDR44_LOW register for the ALT_EMAC2 instance. */
2311 #define ALT_EMAC2_GMAC_MAC_ADDR44_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR44_LOW_ADDR(ALT_EMAC2_ADDR)
2312 /* The address of the ALT_EMAC_GMAC_MAC_ADDR45_HIGH register for the ALT_EMAC2 instance. */
2313 #define ALT_EMAC2_GMAC_MAC_ADDR45_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR45_HIGH_ADDR(ALT_EMAC2_ADDR)
2314 /* The address of the ALT_EMAC_GMAC_MAC_ADDR45_LOW register for the ALT_EMAC2 instance. */
2315 #define ALT_EMAC2_GMAC_MAC_ADDR45_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR45_LOW_ADDR(ALT_EMAC2_ADDR)
2316 /* The address of the ALT_EMAC_GMAC_MAC_ADDR46_HIGH register for the ALT_EMAC2 instance. */
2317 #define ALT_EMAC2_GMAC_MAC_ADDR46_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR46_HIGH_ADDR(ALT_EMAC2_ADDR)
2318 /* The address of the ALT_EMAC_GMAC_MAC_ADDR46_LOW register for the ALT_EMAC2 instance. */
2319 #define ALT_EMAC2_GMAC_MAC_ADDR46_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR46_LOW_ADDR(ALT_EMAC2_ADDR)
2320 /* The address of the ALT_EMAC_GMAC_MAC_ADDR47_HIGH register for the ALT_EMAC2 instance. */
2321 #define ALT_EMAC2_GMAC_MAC_ADDR47_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR47_HIGH_ADDR(ALT_EMAC2_ADDR)
2322 /* The address of the ALT_EMAC_GMAC_MAC_ADDR47_LOW register for the ALT_EMAC2 instance. */
2323 #define ALT_EMAC2_GMAC_MAC_ADDR47_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR47_LOW_ADDR(ALT_EMAC2_ADDR)
2324 /* The address of the ALT_EMAC_GMAC_MAC_ADDR48_HIGH register for the ALT_EMAC2 instance. */
2325 #define ALT_EMAC2_GMAC_MAC_ADDR48_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR48_HIGH_ADDR(ALT_EMAC2_ADDR)
2326 /* The address of the ALT_EMAC_GMAC_MAC_ADDR48_LOW register for the ALT_EMAC2 instance. */
2327 #define ALT_EMAC2_GMAC_MAC_ADDR48_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR48_LOW_ADDR(ALT_EMAC2_ADDR)
2328 /* The address of the ALT_EMAC_GMAC_MAC_ADDR49_HIGH register for the ALT_EMAC2 instance. */
2329 #define ALT_EMAC2_GMAC_MAC_ADDR49_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR49_HIGH_ADDR(ALT_EMAC2_ADDR)
2330 /* The address of the ALT_EMAC_GMAC_MAC_ADDR49_LOW register for the ALT_EMAC2 instance. */
2331 #define ALT_EMAC2_GMAC_MAC_ADDR49_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR49_LOW_ADDR(ALT_EMAC2_ADDR)
2332 /* The address of the ALT_EMAC_GMAC_MAC_ADDR50_HIGH register for the ALT_EMAC2 instance. */
2333 #define ALT_EMAC2_GMAC_MAC_ADDR50_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR50_HIGH_ADDR(ALT_EMAC2_ADDR)
2334 /* The address of the ALT_EMAC_GMAC_MAC_ADDR50_LOW register for the ALT_EMAC2 instance. */
2335 #define ALT_EMAC2_GMAC_MAC_ADDR50_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR50_LOW_ADDR(ALT_EMAC2_ADDR)
2336 /* The address of the ALT_EMAC_GMAC_MAC_ADDR51_HIGH register for the ALT_EMAC2 instance. */
2337 #define ALT_EMAC2_GMAC_MAC_ADDR51_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR51_HIGH_ADDR(ALT_EMAC2_ADDR)
2338 /* The address of the ALT_EMAC_GMAC_MAC_ADDR51_LOW register for the ALT_EMAC2 instance. */
2339 #define ALT_EMAC2_GMAC_MAC_ADDR51_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR51_LOW_ADDR(ALT_EMAC2_ADDR)
2340 /* The address of the ALT_EMAC_GMAC_MAC_ADDR52_HIGH register for the ALT_EMAC2 instance. */
2341 #define ALT_EMAC2_GMAC_MAC_ADDR52_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR52_HIGH_ADDR(ALT_EMAC2_ADDR)
2342 /* The address of the ALT_EMAC_GMAC_MAC_ADDR52_LOW register for the ALT_EMAC2 instance. */
2343 #define ALT_EMAC2_GMAC_MAC_ADDR52_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR52_LOW_ADDR(ALT_EMAC2_ADDR)
2344 /* The address of the ALT_EMAC_GMAC_MAC_ADDR53_HIGH register for the ALT_EMAC2 instance. */
2345 #define ALT_EMAC2_GMAC_MAC_ADDR53_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR53_HIGH_ADDR(ALT_EMAC2_ADDR)
2346 /* The address of the ALT_EMAC_GMAC_MAC_ADDR53_LOW register for the ALT_EMAC2 instance. */
2347 #define ALT_EMAC2_GMAC_MAC_ADDR53_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR53_LOW_ADDR(ALT_EMAC2_ADDR)
2348 /* The address of the ALT_EMAC_GMAC_MAC_ADDR54_HIGH register for the ALT_EMAC2 instance. */
2349 #define ALT_EMAC2_GMAC_MAC_ADDR54_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR54_HIGH_ADDR(ALT_EMAC2_ADDR)
2350 /* The address of the ALT_EMAC_GMAC_MAC_ADDR54_LOW register for the ALT_EMAC2 instance. */
2351 #define ALT_EMAC2_GMAC_MAC_ADDR54_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR54_LOW_ADDR(ALT_EMAC2_ADDR)
2352 /* The address of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH register for the ALT_EMAC2 instance. */
2353 #define ALT_EMAC2_GMAC_MAC_ADDR55_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDR(ALT_EMAC2_ADDR)
2354 /* The address of the ALT_EMAC_GMAC_MAC_ADDR55_LOW register for the ALT_EMAC2 instance. */
2355 #define ALT_EMAC2_GMAC_MAC_ADDR55_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR55_LOW_ADDR(ALT_EMAC2_ADDR)
2356 /* The address of the ALT_EMAC_GMAC_MAC_ADDR56_HIGH register for the ALT_EMAC2 instance. */
2357 #define ALT_EMAC2_GMAC_MAC_ADDR56_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR56_HIGH_ADDR(ALT_EMAC2_ADDR)
2358 /* The address of the ALT_EMAC_GMAC_MAC_ADDR56_LOW register for the ALT_EMAC2 instance. */
2359 #define ALT_EMAC2_GMAC_MAC_ADDR56_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR56_LOW_ADDR(ALT_EMAC2_ADDR)
2360 /* The address of the ALT_EMAC_GMAC_MAC_ADDR57_HIGH register for the ALT_EMAC2 instance. */
2361 #define ALT_EMAC2_GMAC_MAC_ADDR57_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR57_HIGH_ADDR(ALT_EMAC2_ADDR)
2362 /* The address of the ALT_EMAC_GMAC_MAC_ADDR57_LOW register for the ALT_EMAC2 instance. */
2363 #define ALT_EMAC2_GMAC_MAC_ADDR57_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR57_LOW_ADDR(ALT_EMAC2_ADDR)
2364 /* The address of the ALT_EMAC_GMAC_MAC_ADDR58_HIGH register for the ALT_EMAC2 instance. */
2365 #define ALT_EMAC2_GMAC_MAC_ADDR58_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR58_HIGH_ADDR(ALT_EMAC2_ADDR)
2366 /* The address of the ALT_EMAC_GMAC_MAC_ADDR58_LOW register for the ALT_EMAC2 instance. */
2367 #define ALT_EMAC2_GMAC_MAC_ADDR58_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR58_LOW_ADDR(ALT_EMAC2_ADDR)
2368 /* The address of the ALT_EMAC_GMAC_MAC_ADDR59_HIGH register for the ALT_EMAC2 instance. */
2369 #define ALT_EMAC2_GMAC_MAC_ADDR59_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR59_HIGH_ADDR(ALT_EMAC2_ADDR)
2370 /* The address of the ALT_EMAC_GMAC_MAC_ADDR59_LOW register for the ALT_EMAC2 instance. */
2371 #define ALT_EMAC2_GMAC_MAC_ADDR59_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR59_LOW_ADDR(ALT_EMAC2_ADDR)
2372 /* The address of the ALT_EMAC_GMAC_MAC_ADDR60_HIGH register for the ALT_EMAC2 instance. */
2373 #define ALT_EMAC2_GMAC_MAC_ADDR60_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR60_HIGH_ADDR(ALT_EMAC2_ADDR)
2374 /* The address of the ALT_EMAC_GMAC_MAC_ADDR60_LOW register for the ALT_EMAC2 instance. */
2375 #define ALT_EMAC2_GMAC_MAC_ADDR60_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR60_LOW_ADDR(ALT_EMAC2_ADDR)
2376 /* The address of the ALT_EMAC_GMAC_MAC_ADDR61_HIGH register for the ALT_EMAC2 instance. */
2377 #define ALT_EMAC2_GMAC_MAC_ADDR61_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR61_HIGH_ADDR(ALT_EMAC2_ADDR)
2378 /* The address of the ALT_EMAC_GMAC_MAC_ADDR61_LOW register for the ALT_EMAC2 instance. */
2379 #define ALT_EMAC2_GMAC_MAC_ADDR61_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR61_LOW_ADDR(ALT_EMAC2_ADDR)
2380 /* The address of the ALT_EMAC_GMAC_MAC_ADDR62_HIGH register for the ALT_EMAC2 instance. */
2381 #define ALT_EMAC2_GMAC_MAC_ADDR62_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR62_HIGH_ADDR(ALT_EMAC2_ADDR)
2382 /* The address of the ALT_EMAC_GMAC_MAC_ADDR62_LOW register for the ALT_EMAC2 instance. */
2383 #define ALT_EMAC2_GMAC_MAC_ADDR62_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR62_LOW_ADDR(ALT_EMAC2_ADDR)
2384 /* The address of the ALT_EMAC_GMAC_MAC_ADDR63_HIGH register for the ALT_EMAC2 instance. */
2385 #define ALT_EMAC2_GMAC_MAC_ADDR63_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR63_HIGH_ADDR(ALT_EMAC2_ADDR)
2386 /* The address of the ALT_EMAC_GMAC_MAC_ADDR63_LOW register for the ALT_EMAC2 instance. */
2387 #define ALT_EMAC2_GMAC_MAC_ADDR63_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR63_LOW_ADDR(ALT_EMAC2_ADDR)
2388 /* The address of the ALT_EMAC_GMAC_MAC_ADDR64_HIGH register for the ALT_EMAC2 instance. */
2389 #define ALT_EMAC2_GMAC_MAC_ADDR64_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR64_HIGH_ADDR(ALT_EMAC2_ADDR)
2390 /* The address of the ALT_EMAC_GMAC_MAC_ADDR64_LOW register for the ALT_EMAC2 instance. */
2391 #define ALT_EMAC2_GMAC_MAC_ADDR64_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR64_LOW_ADDR(ALT_EMAC2_ADDR)
2392 /* The address of the ALT_EMAC_GMAC_MAC_ADDR65_HIGH register for the ALT_EMAC2 instance. */
2393 #define ALT_EMAC2_GMAC_MAC_ADDR65_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR65_HIGH_ADDR(ALT_EMAC2_ADDR)
2394 /* The address of the ALT_EMAC_GMAC_MAC_ADDR65_LOW register for the ALT_EMAC2 instance. */
2395 #define ALT_EMAC2_GMAC_MAC_ADDR65_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR65_LOW_ADDR(ALT_EMAC2_ADDR)
2396 /* The address of the ALT_EMAC_GMAC_MAC_ADDR66_HIGH register for the ALT_EMAC2 instance. */
2397 #define ALT_EMAC2_GMAC_MAC_ADDR66_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR66_HIGH_ADDR(ALT_EMAC2_ADDR)
2398 /* The address of the ALT_EMAC_GMAC_MAC_ADDR66_LOW register for the ALT_EMAC2 instance. */
2399 #define ALT_EMAC2_GMAC_MAC_ADDR66_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR66_LOW_ADDR(ALT_EMAC2_ADDR)
2400 /* The address of the ALT_EMAC_GMAC_MAC_ADDR67_HIGH register for the ALT_EMAC2 instance. */
2401 #define ALT_EMAC2_GMAC_MAC_ADDR67_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR67_HIGH_ADDR(ALT_EMAC2_ADDR)
2402 /* The address of the ALT_EMAC_GMAC_MAC_ADDR67_LOW register for the ALT_EMAC2 instance. */
2403 #define ALT_EMAC2_GMAC_MAC_ADDR67_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR67_LOW_ADDR(ALT_EMAC2_ADDR)
2404 /* The address of the ALT_EMAC_GMAC_MAC_ADDR68_HIGH register for the ALT_EMAC2 instance. */
2405 #define ALT_EMAC2_GMAC_MAC_ADDR68_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR68_HIGH_ADDR(ALT_EMAC2_ADDR)
2406 /* The address of the ALT_EMAC_GMAC_MAC_ADDR68_LOW register for the ALT_EMAC2 instance. */
2407 #define ALT_EMAC2_GMAC_MAC_ADDR68_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR68_LOW_ADDR(ALT_EMAC2_ADDR)
2408 /* The address of the ALT_EMAC_GMAC_MAC_ADDR69_HIGH register for the ALT_EMAC2 instance. */
2409 #define ALT_EMAC2_GMAC_MAC_ADDR69_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR69_HIGH_ADDR(ALT_EMAC2_ADDR)
2410 /* The address of the ALT_EMAC_GMAC_MAC_ADDR69_LOW register for the ALT_EMAC2 instance. */
2411 #define ALT_EMAC2_GMAC_MAC_ADDR69_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR69_LOW_ADDR(ALT_EMAC2_ADDR)
2412 /* The address of the ALT_EMAC_GMAC_MAC_ADDR70_HIGH register for the ALT_EMAC2 instance. */
2413 #define ALT_EMAC2_GMAC_MAC_ADDR70_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR70_HIGH_ADDR(ALT_EMAC2_ADDR)
2414 /* The address of the ALT_EMAC_GMAC_MAC_ADDR70_LOW register for the ALT_EMAC2 instance. */
2415 #define ALT_EMAC2_GMAC_MAC_ADDR70_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR70_LOW_ADDR(ALT_EMAC2_ADDR)
2416 /* The address of the ALT_EMAC_GMAC_MAC_ADDR71_HIGH register for the ALT_EMAC2 instance. */
2417 #define ALT_EMAC2_GMAC_MAC_ADDR71_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR71_HIGH_ADDR(ALT_EMAC2_ADDR)
2418 /* The address of the ALT_EMAC_GMAC_MAC_ADDR71_LOW register for the ALT_EMAC2 instance. */
2419 #define ALT_EMAC2_GMAC_MAC_ADDR71_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR71_LOW_ADDR(ALT_EMAC2_ADDR)
2420 /* The address of the ALT_EMAC_GMAC_MAC_ADDR72_HIGH register for the ALT_EMAC2 instance. */
2421 #define ALT_EMAC2_GMAC_MAC_ADDR72_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR72_HIGH_ADDR(ALT_EMAC2_ADDR)
2422 /* The address of the ALT_EMAC_GMAC_MAC_ADDR72_LOW register for the ALT_EMAC2 instance. */
2423 #define ALT_EMAC2_GMAC_MAC_ADDR72_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR72_LOW_ADDR(ALT_EMAC2_ADDR)
2424 /* The address of the ALT_EMAC_GMAC_MAC_ADDR73_HIGH register for the ALT_EMAC2 instance. */
2425 #define ALT_EMAC2_GMAC_MAC_ADDR73_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR73_HIGH_ADDR(ALT_EMAC2_ADDR)
2426 /* The address of the ALT_EMAC_GMAC_MAC_ADDR73_LOW register for the ALT_EMAC2 instance. */
2427 #define ALT_EMAC2_GMAC_MAC_ADDR73_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR73_LOW_ADDR(ALT_EMAC2_ADDR)
2428 /* The address of the ALT_EMAC_GMAC_MAC_ADDR74_HIGH register for the ALT_EMAC2 instance. */
2429 #define ALT_EMAC2_GMAC_MAC_ADDR74_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR74_HIGH_ADDR(ALT_EMAC2_ADDR)
2430 /* The address of the ALT_EMAC_GMAC_MAC_ADDR74_LOW register for the ALT_EMAC2 instance. */
2431 #define ALT_EMAC2_GMAC_MAC_ADDR74_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR74_LOW_ADDR(ALT_EMAC2_ADDR)
2432 /* The address of the ALT_EMAC_GMAC_MAC_ADDR75_HIGH register for the ALT_EMAC2 instance. */
2433 #define ALT_EMAC2_GMAC_MAC_ADDR75_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR75_HIGH_ADDR(ALT_EMAC2_ADDR)
2434 /* The address of the ALT_EMAC_GMAC_MAC_ADDR75_LOW register for the ALT_EMAC2 instance. */
2435 #define ALT_EMAC2_GMAC_MAC_ADDR75_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR75_LOW_ADDR(ALT_EMAC2_ADDR)
2436 /* The address of the ALT_EMAC_GMAC_MAC_ADDR76_HIGH register for the ALT_EMAC2 instance. */
2437 #define ALT_EMAC2_GMAC_MAC_ADDR76_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR76_HIGH_ADDR(ALT_EMAC2_ADDR)
2438 /* The address of the ALT_EMAC_GMAC_MAC_ADDR76_LOW register for the ALT_EMAC2 instance. */
2439 #define ALT_EMAC2_GMAC_MAC_ADDR76_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR76_LOW_ADDR(ALT_EMAC2_ADDR)
2440 /* The address of the ALT_EMAC_GMAC_MAC_ADDR77_HIGH register for the ALT_EMAC2 instance. */
2441 #define ALT_EMAC2_GMAC_MAC_ADDR77_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR77_HIGH_ADDR(ALT_EMAC2_ADDR)
2442 /* The address of the ALT_EMAC_GMAC_MAC_ADDR77_LOW register for the ALT_EMAC2 instance. */
2443 #define ALT_EMAC2_GMAC_MAC_ADDR77_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR77_LOW_ADDR(ALT_EMAC2_ADDR)
2444 /* The address of the ALT_EMAC_GMAC_MAC_ADDR78_HIGH register for the ALT_EMAC2 instance. */
2445 #define ALT_EMAC2_GMAC_MAC_ADDR78_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR78_HIGH_ADDR(ALT_EMAC2_ADDR)
2446 /* The address of the ALT_EMAC_GMAC_MAC_ADDR78_LOW register for the ALT_EMAC2 instance. */
2447 #define ALT_EMAC2_GMAC_MAC_ADDR78_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR78_LOW_ADDR(ALT_EMAC2_ADDR)
2448 /* The address of the ALT_EMAC_GMAC_MAC_ADDR79_HIGH register for the ALT_EMAC2 instance. */
2449 #define ALT_EMAC2_GMAC_MAC_ADDR79_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR79_HIGH_ADDR(ALT_EMAC2_ADDR)
2450 /* The address of the ALT_EMAC_GMAC_MAC_ADDR79_LOW register for the ALT_EMAC2 instance. */
2451 #define ALT_EMAC2_GMAC_MAC_ADDR79_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR79_LOW_ADDR(ALT_EMAC2_ADDR)
2452 /* The address of the ALT_EMAC_GMAC_MAC_ADDR80_HIGH register for the ALT_EMAC2 instance. */
2453 #define ALT_EMAC2_GMAC_MAC_ADDR80_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR80_HIGH_ADDR(ALT_EMAC2_ADDR)
2454 /* The address of the ALT_EMAC_GMAC_MAC_ADDR80_LOW register for the ALT_EMAC2 instance. */
2455 #define ALT_EMAC2_GMAC_MAC_ADDR80_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR80_LOW_ADDR(ALT_EMAC2_ADDR)
2456 /* The address of the ALT_EMAC_GMAC_MAC_ADDR81_HIGH register for the ALT_EMAC2 instance. */
2457 #define ALT_EMAC2_GMAC_MAC_ADDR81_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR81_HIGH_ADDR(ALT_EMAC2_ADDR)
2458 /* The address of the ALT_EMAC_GMAC_MAC_ADDR81_LOW register for the ALT_EMAC2 instance. */
2459 #define ALT_EMAC2_GMAC_MAC_ADDR81_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR81_LOW_ADDR(ALT_EMAC2_ADDR)
2460 /* The address of the ALT_EMAC_GMAC_MAC_ADDR82_HIGH register for the ALT_EMAC2 instance. */
2461 #define ALT_EMAC2_GMAC_MAC_ADDR82_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR82_HIGH_ADDR(ALT_EMAC2_ADDR)
2462 /* The address of the ALT_EMAC_GMAC_MAC_ADDR82_LOW register for the ALT_EMAC2 instance. */
2463 #define ALT_EMAC2_GMAC_MAC_ADDR82_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR82_LOW_ADDR(ALT_EMAC2_ADDR)
2464 /* The address of the ALT_EMAC_GMAC_MAC_ADDR83_HIGH register for the ALT_EMAC2 instance. */
2465 #define ALT_EMAC2_GMAC_MAC_ADDR83_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR83_HIGH_ADDR(ALT_EMAC2_ADDR)
2466 /* The address of the ALT_EMAC_GMAC_MAC_ADDR83_LOW register for the ALT_EMAC2 instance. */
2467 #define ALT_EMAC2_GMAC_MAC_ADDR83_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR83_LOW_ADDR(ALT_EMAC2_ADDR)
2468 /* The address of the ALT_EMAC_GMAC_MAC_ADDR84_HIGH register for the ALT_EMAC2 instance. */
2469 #define ALT_EMAC2_GMAC_MAC_ADDR84_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR84_HIGH_ADDR(ALT_EMAC2_ADDR)
2470 /* The address of the ALT_EMAC_GMAC_MAC_ADDR84_LOW register for the ALT_EMAC2 instance. */
2471 #define ALT_EMAC2_GMAC_MAC_ADDR84_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR84_LOW_ADDR(ALT_EMAC2_ADDR)
2472 /* The address of the ALT_EMAC_GMAC_MAC_ADDR85_HIGH register for the ALT_EMAC2 instance. */
2473 #define ALT_EMAC2_GMAC_MAC_ADDR85_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR85_HIGH_ADDR(ALT_EMAC2_ADDR)
2474 /* The address of the ALT_EMAC_GMAC_MAC_ADDR85_LOW register for the ALT_EMAC2 instance. */
2475 #define ALT_EMAC2_GMAC_MAC_ADDR85_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR85_LOW_ADDR(ALT_EMAC2_ADDR)
2476 /* The address of the ALT_EMAC_GMAC_MAC_ADDR86_HIGH register for the ALT_EMAC2 instance. */
2477 #define ALT_EMAC2_GMAC_MAC_ADDR86_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR86_HIGH_ADDR(ALT_EMAC2_ADDR)
2478 /* The address of the ALT_EMAC_GMAC_MAC_ADDR86_LOW register for the ALT_EMAC2 instance. */
2479 #define ALT_EMAC2_GMAC_MAC_ADDR86_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR86_LOW_ADDR(ALT_EMAC2_ADDR)
2480 /* The address of the ALT_EMAC_GMAC_MAC_ADDR87_HIGH register for the ALT_EMAC2 instance. */
2481 #define ALT_EMAC2_GMAC_MAC_ADDR87_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR87_HIGH_ADDR(ALT_EMAC2_ADDR)
2482 /* The address of the ALT_EMAC_GMAC_MAC_ADDR87_LOW register for the ALT_EMAC2 instance. */
2483 #define ALT_EMAC2_GMAC_MAC_ADDR87_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR87_LOW_ADDR(ALT_EMAC2_ADDR)
2484 /* The address of the ALT_EMAC_GMAC_MAC_ADDR88_HIGH register for the ALT_EMAC2 instance. */
2485 #define ALT_EMAC2_GMAC_MAC_ADDR88_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR88_HIGH_ADDR(ALT_EMAC2_ADDR)
2486 /* The address of the ALT_EMAC_GMAC_MAC_ADDR88_LOW register for the ALT_EMAC2 instance. */
2487 #define ALT_EMAC2_GMAC_MAC_ADDR88_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR88_LOW_ADDR(ALT_EMAC2_ADDR)
2488 /* The address of the ALT_EMAC_GMAC_MAC_ADDR89_HIGH register for the ALT_EMAC2 instance. */
2489 #define ALT_EMAC2_GMAC_MAC_ADDR89_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR89_HIGH_ADDR(ALT_EMAC2_ADDR)
2490 /* The address of the ALT_EMAC_GMAC_MAC_ADDR89_LOW register for the ALT_EMAC2 instance. */
2491 #define ALT_EMAC2_GMAC_MAC_ADDR89_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR89_LOW_ADDR(ALT_EMAC2_ADDR)
2492 /* The address of the ALT_EMAC_GMAC_MAC_ADDR90_HIGH register for the ALT_EMAC2 instance. */
2493 #define ALT_EMAC2_GMAC_MAC_ADDR90_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR90_HIGH_ADDR(ALT_EMAC2_ADDR)
2494 /* The address of the ALT_EMAC_GMAC_MAC_ADDR90_LOW register for the ALT_EMAC2 instance. */
2495 #define ALT_EMAC2_GMAC_MAC_ADDR90_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR90_LOW_ADDR(ALT_EMAC2_ADDR)
2496 /* The address of the ALT_EMAC_GMAC_MAC_ADDR91_HIGH register for the ALT_EMAC2 instance. */
2497 #define ALT_EMAC2_GMAC_MAC_ADDR91_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR91_HIGH_ADDR(ALT_EMAC2_ADDR)
2498 /* The address of the ALT_EMAC_GMAC_MAC_ADDR91_LOW register for the ALT_EMAC2 instance. */
2499 #define ALT_EMAC2_GMAC_MAC_ADDR91_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR91_LOW_ADDR(ALT_EMAC2_ADDR)
2500 /* The address of the ALT_EMAC_GMAC_MAC_ADDR92_HIGH register for the ALT_EMAC2 instance. */
2501 #define ALT_EMAC2_GMAC_MAC_ADDR92_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR92_HIGH_ADDR(ALT_EMAC2_ADDR)
2502 /* The address of the ALT_EMAC_GMAC_MAC_ADDR92_LOW register for the ALT_EMAC2 instance. */
2503 #define ALT_EMAC2_GMAC_MAC_ADDR92_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR92_LOW_ADDR(ALT_EMAC2_ADDR)
2504 /* The address of the ALT_EMAC_GMAC_MAC_ADDR93_HIGH register for the ALT_EMAC2 instance. */
2505 #define ALT_EMAC2_GMAC_MAC_ADDR93_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR93_HIGH_ADDR(ALT_EMAC2_ADDR)
2506 /* The address of the ALT_EMAC_GMAC_MAC_ADDR93_LOW register for the ALT_EMAC2 instance. */
2507 #define ALT_EMAC2_GMAC_MAC_ADDR93_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR93_LOW_ADDR(ALT_EMAC2_ADDR)
2508 /* The address of the ALT_EMAC_GMAC_MAC_ADDR94_HIGH register for the ALT_EMAC2 instance. */
2509 #define ALT_EMAC2_GMAC_MAC_ADDR94_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR94_HIGH_ADDR(ALT_EMAC2_ADDR)
2510 /* The address of the ALT_EMAC_GMAC_MAC_ADDR94_LOW register for the ALT_EMAC2 instance. */
2511 #define ALT_EMAC2_GMAC_MAC_ADDR94_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR94_LOW_ADDR(ALT_EMAC2_ADDR)
2512 /* The address of the ALT_EMAC_GMAC_MAC_ADDR95_HIGH register for the ALT_EMAC2 instance. */
2513 #define ALT_EMAC2_GMAC_MAC_ADDR95_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR95_HIGH_ADDR(ALT_EMAC2_ADDR)
2514 /* The address of the ALT_EMAC_GMAC_MAC_ADDR95_LOW register for the ALT_EMAC2 instance. */
2515 #define ALT_EMAC2_GMAC_MAC_ADDR95_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR95_LOW_ADDR(ALT_EMAC2_ADDR)
2516 /* The address of the ALT_EMAC_GMAC_MAC_ADDR96_HIGH register for the ALT_EMAC2 instance. */
2517 #define ALT_EMAC2_GMAC_MAC_ADDR96_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR96_HIGH_ADDR(ALT_EMAC2_ADDR)
2518 /* The address of the ALT_EMAC_GMAC_MAC_ADDR96_LOW register for the ALT_EMAC2 instance. */
2519 #define ALT_EMAC2_GMAC_MAC_ADDR96_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR96_LOW_ADDR(ALT_EMAC2_ADDR)
2520 /* The address of the ALT_EMAC_GMAC_MAC_ADDR97_HIGH register for the ALT_EMAC2 instance. */
2521 #define ALT_EMAC2_GMAC_MAC_ADDR97_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR97_HIGH_ADDR(ALT_EMAC2_ADDR)
2522 /* The address of the ALT_EMAC_GMAC_MAC_ADDR97_LOW register for the ALT_EMAC2 instance. */
2523 #define ALT_EMAC2_GMAC_MAC_ADDR97_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR97_LOW_ADDR(ALT_EMAC2_ADDR)
2524 /* The address of the ALT_EMAC_GMAC_MAC_ADDR98_HIGH register for the ALT_EMAC2 instance. */
2525 #define ALT_EMAC2_GMAC_MAC_ADDR98_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR98_HIGH_ADDR(ALT_EMAC2_ADDR)
2526 /* The address of the ALT_EMAC_GMAC_MAC_ADDR98_LOW register for the ALT_EMAC2 instance. */
2527 #define ALT_EMAC2_GMAC_MAC_ADDR98_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR98_LOW_ADDR(ALT_EMAC2_ADDR)
2528 /* The address of the ALT_EMAC_GMAC_MAC_ADDR99_HIGH register for the ALT_EMAC2 instance. */
2529 #define ALT_EMAC2_GMAC_MAC_ADDR99_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR99_HIGH_ADDR(ALT_EMAC2_ADDR)
2530 /* The address of the ALT_EMAC_GMAC_MAC_ADDR99_LOW register for the ALT_EMAC2 instance. */
2531 #define ALT_EMAC2_GMAC_MAC_ADDR99_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR99_LOW_ADDR(ALT_EMAC2_ADDR)
2532 /* The address of the ALT_EMAC_GMAC_MAC_ADDR100_HIGH register for the ALT_EMAC2 instance. */
2533 #define ALT_EMAC2_GMAC_MAC_ADDR100_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR100_HIGH_ADDR(ALT_EMAC2_ADDR)
2534 /* The address of the ALT_EMAC_GMAC_MAC_ADDR100_LOW register for the ALT_EMAC2 instance. */
2535 #define ALT_EMAC2_GMAC_MAC_ADDR100_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR100_LOW_ADDR(ALT_EMAC2_ADDR)
2536 /* The address of the ALT_EMAC_GMAC_MAC_ADDR101_HIGH register for the ALT_EMAC2 instance. */
2537 #define ALT_EMAC2_GMAC_MAC_ADDR101_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR101_HIGH_ADDR(ALT_EMAC2_ADDR)
2538 /* The address of the ALT_EMAC_GMAC_MAC_ADDR101_LOW register for the ALT_EMAC2 instance. */
2539 #define ALT_EMAC2_GMAC_MAC_ADDR101_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR101_LOW_ADDR(ALT_EMAC2_ADDR)
2540 /* The address of the ALT_EMAC_GMAC_MAC_ADDR102_HIGH register for the ALT_EMAC2 instance. */
2541 #define ALT_EMAC2_GMAC_MAC_ADDR102_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR102_HIGH_ADDR(ALT_EMAC2_ADDR)
2542 /* The address of the ALT_EMAC_GMAC_MAC_ADDR102_LOW register for the ALT_EMAC2 instance. */
2543 #define ALT_EMAC2_GMAC_MAC_ADDR102_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR102_LOW_ADDR(ALT_EMAC2_ADDR)
2544 /* The address of the ALT_EMAC_GMAC_MAC_ADDR103_HIGH register for the ALT_EMAC2 instance. */
2545 #define ALT_EMAC2_GMAC_MAC_ADDR103_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR103_HIGH_ADDR(ALT_EMAC2_ADDR)
2546 /* The address of the ALT_EMAC_GMAC_MAC_ADDR103_LOW register for the ALT_EMAC2 instance. */
2547 #define ALT_EMAC2_GMAC_MAC_ADDR103_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR103_LOW_ADDR(ALT_EMAC2_ADDR)
2548 /* The address of the ALT_EMAC_GMAC_MAC_ADDR104_HIGH register for the ALT_EMAC2 instance. */
2549 #define ALT_EMAC2_GMAC_MAC_ADDR104_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR104_HIGH_ADDR(ALT_EMAC2_ADDR)
2550 /* The address of the ALT_EMAC_GMAC_MAC_ADDR104_LOW register for the ALT_EMAC2 instance. */
2551 #define ALT_EMAC2_GMAC_MAC_ADDR104_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR104_LOW_ADDR(ALT_EMAC2_ADDR)
2552 /* The address of the ALT_EMAC_GMAC_MAC_ADDR105_HIGH register for the ALT_EMAC2 instance. */
2553 #define ALT_EMAC2_GMAC_MAC_ADDR105_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR105_HIGH_ADDR(ALT_EMAC2_ADDR)
2554 /* The address of the ALT_EMAC_GMAC_MAC_ADDR105_LOW register for the ALT_EMAC2 instance. */
2555 #define ALT_EMAC2_GMAC_MAC_ADDR105_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR105_LOW_ADDR(ALT_EMAC2_ADDR)
2556 /* The address of the ALT_EMAC_GMAC_MAC_ADDR106_HIGH register for the ALT_EMAC2 instance. */
2557 #define ALT_EMAC2_GMAC_MAC_ADDR106_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR106_HIGH_ADDR(ALT_EMAC2_ADDR)
2558 /* The address of the ALT_EMAC_GMAC_MAC_ADDR106_LOW register for the ALT_EMAC2 instance. */
2559 #define ALT_EMAC2_GMAC_MAC_ADDR106_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR106_LOW_ADDR(ALT_EMAC2_ADDR)
2560 /* The address of the ALT_EMAC_GMAC_MAC_ADDR107_HIGH register for the ALT_EMAC2 instance. */
2561 #define ALT_EMAC2_GMAC_MAC_ADDR107_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR107_HIGH_ADDR(ALT_EMAC2_ADDR)
2562 /* The address of the ALT_EMAC_GMAC_MAC_ADDR107_LOW register for the ALT_EMAC2 instance. */
2563 #define ALT_EMAC2_GMAC_MAC_ADDR107_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR107_LOW_ADDR(ALT_EMAC2_ADDR)
2564 /* The address of the ALT_EMAC_GMAC_MAC_ADDR108_HIGH register for the ALT_EMAC2 instance. */
2565 #define ALT_EMAC2_GMAC_MAC_ADDR108_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR108_HIGH_ADDR(ALT_EMAC2_ADDR)
2566 /* The address of the ALT_EMAC_GMAC_MAC_ADDR108_LOW register for the ALT_EMAC2 instance. */
2567 #define ALT_EMAC2_GMAC_MAC_ADDR108_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR108_LOW_ADDR(ALT_EMAC2_ADDR)
2568 /* The address of the ALT_EMAC_GMAC_MAC_ADDR109_HIGH register for the ALT_EMAC2 instance. */
2569 #define ALT_EMAC2_GMAC_MAC_ADDR109_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR109_HIGH_ADDR(ALT_EMAC2_ADDR)
2570 /* The address of the ALT_EMAC_GMAC_MAC_ADDR109_LOW register for the ALT_EMAC2 instance. */
2571 #define ALT_EMAC2_GMAC_MAC_ADDR109_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR109_LOW_ADDR(ALT_EMAC2_ADDR)
2572 /* The address of the ALT_EMAC_GMAC_MAC_ADDR110_HIGH register for the ALT_EMAC2 instance. */
2573 #define ALT_EMAC2_GMAC_MAC_ADDR110_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR110_HIGH_ADDR(ALT_EMAC2_ADDR)
2574 /* The address of the ALT_EMAC_GMAC_MAC_ADDR110_LOW register for the ALT_EMAC2 instance. */
2575 #define ALT_EMAC2_GMAC_MAC_ADDR110_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR110_LOW_ADDR(ALT_EMAC2_ADDR)
2576 /* The address of the ALT_EMAC_GMAC_MAC_ADDR111_HIGH register for the ALT_EMAC2 instance. */
2577 #define ALT_EMAC2_GMAC_MAC_ADDR111_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR111_HIGH_ADDR(ALT_EMAC2_ADDR)
2578 /* The address of the ALT_EMAC_GMAC_MAC_ADDR111_LOW register for the ALT_EMAC2 instance. */
2579 #define ALT_EMAC2_GMAC_MAC_ADDR111_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR111_LOW_ADDR(ALT_EMAC2_ADDR)
2580 /* The address of the ALT_EMAC_GMAC_MAC_ADDR112_HIGH register for the ALT_EMAC2 instance. */
2581 #define ALT_EMAC2_GMAC_MAC_ADDR112_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR112_HIGH_ADDR(ALT_EMAC2_ADDR)
2582 /* The address of the ALT_EMAC_GMAC_MAC_ADDR112_LOW register for the ALT_EMAC2 instance. */
2583 #define ALT_EMAC2_GMAC_MAC_ADDR112_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR112_LOW_ADDR(ALT_EMAC2_ADDR)
2584 /* The address of the ALT_EMAC_GMAC_MAC_ADDR113_HIGH register for the ALT_EMAC2 instance. */
2585 #define ALT_EMAC2_GMAC_MAC_ADDR113_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR113_HIGH_ADDR(ALT_EMAC2_ADDR)
2586 /* The address of the ALT_EMAC_GMAC_MAC_ADDR113_LOW register for the ALT_EMAC2 instance. */
2587 #define ALT_EMAC2_GMAC_MAC_ADDR113_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR113_LOW_ADDR(ALT_EMAC2_ADDR)
2588 /* The address of the ALT_EMAC_GMAC_MAC_ADDR114_HIGH register for the ALT_EMAC2 instance. */
2589 #define ALT_EMAC2_GMAC_MAC_ADDR114_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR114_HIGH_ADDR(ALT_EMAC2_ADDR)
2590 /* The address of the ALT_EMAC_GMAC_MAC_ADDR114_LOW register for the ALT_EMAC2 instance. */
2591 #define ALT_EMAC2_GMAC_MAC_ADDR114_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR114_LOW_ADDR(ALT_EMAC2_ADDR)
2592 /* The address of the ALT_EMAC_GMAC_MAC_ADDR115_HIGH register for the ALT_EMAC2 instance. */
2593 #define ALT_EMAC2_GMAC_MAC_ADDR115_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR115_HIGH_ADDR(ALT_EMAC2_ADDR)
2594 /* The address of the ALT_EMAC_GMAC_MAC_ADDR115_LOW register for the ALT_EMAC2 instance. */
2595 #define ALT_EMAC2_GMAC_MAC_ADDR115_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR115_LOW_ADDR(ALT_EMAC2_ADDR)
2596 /* The address of the ALT_EMAC_GMAC_MAC_ADDR116_HIGH register for the ALT_EMAC2 instance. */
2597 #define ALT_EMAC2_GMAC_MAC_ADDR116_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR116_HIGH_ADDR(ALT_EMAC2_ADDR)
2598 /* The address of the ALT_EMAC_GMAC_MAC_ADDR116_LOW register for the ALT_EMAC2 instance. */
2599 #define ALT_EMAC2_GMAC_MAC_ADDR116_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR116_LOW_ADDR(ALT_EMAC2_ADDR)
2600 /* The address of the ALT_EMAC_GMAC_MAC_ADDR117_HIGH register for the ALT_EMAC2 instance. */
2601 #define ALT_EMAC2_GMAC_MAC_ADDR117_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR117_HIGH_ADDR(ALT_EMAC2_ADDR)
2602 /* The address of the ALT_EMAC_GMAC_MAC_ADDR117_LOW register for the ALT_EMAC2 instance. */
2603 #define ALT_EMAC2_GMAC_MAC_ADDR117_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR117_LOW_ADDR(ALT_EMAC2_ADDR)
2604 /* The address of the ALT_EMAC_GMAC_MAC_ADDR118_HIGH register for the ALT_EMAC2 instance. */
2605 #define ALT_EMAC2_GMAC_MAC_ADDR118_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR118_HIGH_ADDR(ALT_EMAC2_ADDR)
2606 /* The address of the ALT_EMAC_GMAC_MAC_ADDR118_LOW register for the ALT_EMAC2 instance. */
2607 #define ALT_EMAC2_GMAC_MAC_ADDR118_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR118_LOW_ADDR(ALT_EMAC2_ADDR)
2608 /* The address of the ALT_EMAC_GMAC_MAC_ADDR119_HIGH register for the ALT_EMAC2 instance. */
2609 #define ALT_EMAC2_GMAC_MAC_ADDR119_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR119_HIGH_ADDR(ALT_EMAC2_ADDR)
2610 /* The address of the ALT_EMAC_GMAC_MAC_ADDR119_LOW register for the ALT_EMAC2 instance. */
2611 #define ALT_EMAC2_GMAC_MAC_ADDR119_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR119_LOW_ADDR(ALT_EMAC2_ADDR)
2612 /* The address of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH register for the ALT_EMAC2 instance. */
2613 #define ALT_EMAC2_GMAC_MAC_ADDR120_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDR(ALT_EMAC2_ADDR)
2614 /* The address of the ALT_EMAC_GMAC_MAC_ADDR120_LOW register for the ALT_EMAC2 instance. */
2615 #define ALT_EMAC2_GMAC_MAC_ADDR120_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR120_LOW_ADDR(ALT_EMAC2_ADDR)
2616 /* The address of the ALT_EMAC_GMAC_MAC_ADDR121_HIGH register for the ALT_EMAC2 instance. */
2617 #define ALT_EMAC2_GMAC_MAC_ADDR121_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR121_HIGH_ADDR(ALT_EMAC2_ADDR)
2618 /* The address of the ALT_EMAC_GMAC_MAC_ADDR121_LOW register for the ALT_EMAC2 instance. */
2619 #define ALT_EMAC2_GMAC_MAC_ADDR121_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR121_LOW_ADDR(ALT_EMAC2_ADDR)
2620 /* The address of the ALT_EMAC_GMAC_MAC_ADDR122_HIGH register for the ALT_EMAC2 instance. */
2621 #define ALT_EMAC2_GMAC_MAC_ADDR122_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR122_HIGH_ADDR(ALT_EMAC2_ADDR)
2622 /* The address of the ALT_EMAC_GMAC_MAC_ADDR122_LOW register for the ALT_EMAC2 instance. */
2623 #define ALT_EMAC2_GMAC_MAC_ADDR122_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR122_LOW_ADDR(ALT_EMAC2_ADDR)
2624 /* The address of the ALT_EMAC_GMAC_MAC_ADDR123_HIGH register for the ALT_EMAC2 instance. */
2625 #define ALT_EMAC2_GMAC_MAC_ADDR123_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR123_HIGH_ADDR(ALT_EMAC2_ADDR)
2626 /* The address of the ALT_EMAC_GMAC_MAC_ADDR123_LOW register for the ALT_EMAC2 instance. */
2627 #define ALT_EMAC2_GMAC_MAC_ADDR123_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR123_LOW_ADDR(ALT_EMAC2_ADDR)
2628 /* The address of the ALT_EMAC_GMAC_MAC_ADDR124_HIGH register for the ALT_EMAC2 instance. */
2629 #define ALT_EMAC2_GMAC_MAC_ADDR124_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR124_HIGH_ADDR(ALT_EMAC2_ADDR)
2630 /* The address of the ALT_EMAC_GMAC_MAC_ADDR124_LOW register for the ALT_EMAC2 instance. */
2631 #define ALT_EMAC2_GMAC_MAC_ADDR124_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR124_LOW_ADDR(ALT_EMAC2_ADDR)
2632 /* The address of the ALT_EMAC_GMAC_MAC_ADDR125_HIGH register for the ALT_EMAC2 instance. */
2633 #define ALT_EMAC2_GMAC_MAC_ADDR125_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR125_HIGH_ADDR(ALT_EMAC2_ADDR)
2634 /* The address of the ALT_EMAC_GMAC_MAC_ADDR125_LOW register for the ALT_EMAC2 instance. */
2635 #define ALT_EMAC2_GMAC_MAC_ADDR125_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR125_LOW_ADDR(ALT_EMAC2_ADDR)
2636 /* The address of the ALT_EMAC_GMAC_MAC_ADDR126_HIGH register for the ALT_EMAC2 instance. */
2637 #define ALT_EMAC2_GMAC_MAC_ADDR126_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR126_HIGH_ADDR(ALT_EMAC2_ADDR)
2638 /* The address of the ALT_EMAC_GMAC_MAC_ADDR126_LOW register for the ALT_EMAC2 instance. */
2639 #define ALT_EMAC2_GMAC_MAC_ADDR126_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR126_LOW_ADDR(ALT_EMAC2_ADDR)
2640 /* The address of the ALT_EMAC_GMAC_MAC_ADDR127_HIGH register for the ALT_EMAC2 instance. */
2641 #define ALT_EMAC2_GMAC_MAC_ADDR127_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR127_HIGH_ADDR(ALT_EMAC2_ADDR)
2642 /* The address of the ALT_EMAC_GMAC_MAC_ADDR127_LOW register for the ALT_EMAC2 instance. */
2643 #define ALT_EMAC2_GMAC_MAC_ADDR127_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR127_LOW_ADDR(ALT_EMAC2_ADDR)
2644 /* The address of the ALT_EMAC_DMA_BUS_MOD register for the ALT_EMAC2 instance. */
2645 #define ALT_EMAC2_DMA_BUS_MOD_ADDR ALT_EMAC_DMA_BUS_MOD_ADDR(ALT_EMAC2_ADDR)
2646 /* The address of the ALT_EMAC_DMA_TX_POLL_DEMAND register for the ALT_EMAC2 instance. */
2647 #define ALT_EMAC2_DMA_TX_POLL_DEMAND_ADDR ALT_EMAC_DMA_TX_POLL_DEMAND_ADDR(ALT_EMAC2_ADDR)
2648 /* The address of the ALT_EMAC_DMA_RX_POLL_DEMAND register for the ALT_EMAC2 instance. */
2649 #define ALT_EMAC2_DMA_RX_POLL_DEMAND_ADDR ALT_EMAC_DMA_RX_POLL_DEMAND_ADDR(ALT_EMAC2_ADDR)
2650 /* The address of the ALT_EMAC_DMA_RX_DESC_LIST_ADDR register for the ALT_EMAC2 instance. */
2651 #define ALT_EMAC2_DMA_RX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_RX_DESC_LIST_ADDR_ADDR(ALT_EMAC2_ADDR)
2652 /* The address of the ALT_EMAC_DMA_TX_DESC_LIST_ADDR register for the ALT_EMAC2 instance. */
2653 #define ALT_EMAC2_DMA_TX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_TX_DESC_LIST_ADDR_ADDR(ALT_EMAC2_ADDR)
2654 /* The address of the ALT_EMAC_DMA_STAT register for the ALT_EMAC2 instance. */
2655 #define ALT_EMAC2_DMA_STAT_ADDR ALT_EMAC_DMA_STAT_ADDR(ALT_EMAC2_ADDR)
2656 /* The address of the ALT_EMAC_DMA_OP_MOD register for the ALT_EMAC2 instance. */
2657 #define ALT_EMAC2_DMA_OP_MOD_ADDR ALT_EMAC_DMA_OP_MOD_ADDR(ALT_EMAC2_ADDR)
2658 /* The address of the ALT_EMAC_DMA_INT_EN register for the ALT_EMAC2 instance. */
2659 #define ALT_EMAC2_DMA_INT_EN_ADDR ALT_EMAC_DMA_INT_EN_ADDR(ALT_EMAC2_ADDR)
2660 /* The address of the ALT_EMAC_DMA_MFRM_BUF_OVF_CNTR register for the ALT_EMAC2 instance. */
2661 #define ALT_EMAC2_DMA_MISSED_FRM_AND_BUF_OVF_CNTR_ADDR ALT_EMAC_DMA_MFRM_BUF_OVF_CNTR_ADDR(ALT_EMAC2_ADDR)
2662 /* The address of the ALT_EMAC_DMA_RX_INT_WDT register for the ALT_EMAC2 instance. */
2663 #define ALT_EMAC2_DMA_RX_INT_WDT_ADDR ALT_EMAC_DMA_RX_INT_WDT_ADDR(ALT_EMAC2_ADDR)
2664 /* The address of the ALT_EMAC_DMA_AXI_BUS_MOD register for the ALT_EMAC2 instance. */
2665 #define ALT_EMAC2_DMA_AXI_BUS_MOD_ADDR ALT_EMAC_DMA_AXI_BUS_MOD_ADDR(ALT_EMAC2_ADDR)
2666 /* The address of the ALT_EMAC_DMA_AHB_OR_AXI_STAT register for the ALT_EMAC2 instance. */
2667 #define ALT_EMAC2_DMA_AHB_OR_AXI_STAT_ADDR ALT_EMAC_DMA_AHB_OR_AXI_STAT_ADDR(ALT_EMAC2_ADDR)
2668 /* The address of the ALT_EMAC_DMA_CUR_HOST_TX_DESC register for the ALT_EMAC2 instance. */
2669 #define ALT_EMAC2_DMA_CUR_HOST_TX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_TX_DESC_ADDR(ALT_EMAC2_ADDR)
2670 /* The address of the ALT_EMAC_DMA_CUR_HOST_RX_DESC register for the ALT_EMAC2 instance. */
2671 #define ALT_EMAC2_DMA_CUR_HOST_RX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_RX_DESC_ADDR(ALT_EMAC2_ADDR)
2672 /* The address of the ALT_EMAC_DMA_CUR_HOST_TX_BUF_ADDR register for the ALT_EMAC2 instance. */
2673 #define ALT_EMAC2_DMA_CUR_HOST_TX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_TX_BUF_ADDR_ADDR(ALT_EMAC2_ADDR)
2674 /* The address of the ALT_EMAC_DMA_CUR_HOST_RX_BUF_ADDR register for the ALT_EMAC2 instance. */
2675 #define ALT_EMAC2_DMA_CUR_HOST_RX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_RX_BUF_ADDR_ADDR(ALT_EMAC2_ADDR)
2676 /* The address of the ALT_EMAC_DMA_HW_FEATURE register for the ALT_EMAC2 instance. */
2677 #define ALT_EMAC2_DMA_HW_FEATURE_ADDR ALT_EMAC_DMA_HW_FEATURE_ADDR(ALT_EMAC2_ADDR)
2678 /* The base address byte offset for the start of the ALT_EMAC2 component. */
2679 #define ALT_EMAC2_OFST 0xff804000
2680 /* The start address of the ALT_EMAC2 component. */
2681 #define ALT_EMAC2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_EMAC2_OFST))
2682 /* The lower bound address range of the ALT_EMAC2 component. */
2683 #define ALT_EMAC2_LB_ADDR ALT_EMAC2_ADDR
2684 /* The upper bound address range of the ALT_EMAC2 component. */
2685 #define ALT_EMAC2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC2_ADDR) + 0x105c) - 1))
2686 
2687 
2688 /*
2689  * Component Instance : i_sdmmc_sdmmc
2690  *
2691  * Instance i_sdmmc_sdmmc of component ALT_SDMMC.
2692  *
2693  *
2694  */
2695 /* The address of the ALT_SDMMC_CTL register for the ALT_SDMMC instance. */
2696 #define ALT_SDMMC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CTL_OFST))
2697 /* The address of the ALT_SDMMC_PWREN register for the ALT_SDMMC instance. */
2698 #define ALT_SDMMC_PWREN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_PWREN_OFST))
2699 /* The address of the ALT_SDMMC_CLKDIV register for the ALT_SDMMC instance. */
2700 #define ALT_SDMMC_CLKDIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CLKDIV_OFST))
2701 /* The address of the ALT_SDMMC_CLKSRC register for the ALT_SDMMC instance. */
2702 #define ALT_SDMMC_CLKSRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CLKSRC_OFST))
2703 /* The address of the ALT_SDMMC_CLKENA register for the ALT_SDMMC instance. */
2704 #define ALT_SDMMC_CLKENA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CLKENA_OFST))
2705 /* The address of the ALT_SDMMC_TMOUT register for the ALT_SDMMC instance. */
2706 #define ALT_SDMMC_TMOUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_TMOUT_OFST))
2707 /* The address of the ALT_SDMMC_CTYPE register for the ALT_SDMMC instance. */
2708 #define ALT_SDMMC_CTYPE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CTYPE_OFST))
2709 /* The address of the ALT_SDMMC_BLKSIZ register for the ALT_SDMMC instance. */
2710 #define ALT_SDMMC_BLKSIZ_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BLKSIZ_OFST))
2711 /* The address of the ALT_SDMMC_BYTCNT register for the ALT_SDMMC instance. */
2712 #define ALT_SDMMC_BYTCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BYTCNT_OFST))
2713 /* The address of the ALT_SDMMC_INTMSK register for the ALT_SDMMC instance. */
2714 #define ALT_SDMMC_INTMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_INTMSK_OFST))
2715 /* The address of the ALT_SDMMC_CMDARG register for the ALT_SDMMC instance. */
2716 #define ALT_SDMMC_CMDARG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CMDARG_OFST))
2717 /* The address of the ALT_SDMMC_CMD register for the ALT_SDMMC instance. */
2718 #define ALT_SDMMC_CMD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CMD_OFST))
2719 /* The address of the ALT_SDMMC_RESP0 register for the ALT_SDMMC instance. */
2720 #define ALT_SDMMC_RESP0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RESP0_OFST))
2721 /* The address of the ALT_SDMMC_RESP1 register for the ALT_SDMMC instance. */
2722 #define ALT_SDMMC_RESP1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RESP1_OFST))
2723 /* The address of the ALT_SDMMC_RESP2 register for the ALT_SDMMC instance. */
2724 #define ALT_SDMMC_RESP2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RESP2_OFST))
2725 /* The address of the ALT_SDMMC_RESP3 register for the ALT_SDMMC instance. */
2726 #define ALT_SDMMC_RESP3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RESP3_OFST))
2727 /* The address of the ALT_SDMMC_MINTSTS register for the ALT_SDMMC instance. */
2728 #define ALT_SDMMC_MINTSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_MINTSTS_OFST))
2729 /* The address of the ALT_SDMMC_RINTSTS register for the ALT_SDMMC instance. */
2730 #define ALT_SDMMC_RINTSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RINTSTS_OFST))
2731 /* The address of the ALT_SDMMC_STAT register for the ALT_SDMMC instance. */
2732 #define ALT_SDMMC_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_STAT_OFST))
2733 /* The address of the ALT_SDMMC_FIFOTH register for the ALT_SDMMC instance. */
2734 #define ALT_SDMMC_FIFOTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_FIFOTH_OFST))
2735 /* The address of the ALT_SDMMC_CDETECT register for the ALT_SDMMC instance. */
2736 #define ALT_SDMMC_CDETECT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CDETECT_OFST))
2737 /* The address of the ALT_SDMMC_WRTPRT register for the ALT_SDMMC instance. */
2738 #define ALT_SDMMC_WRTPRT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_WRTPRT_OFST))
2739 /* The address of the ALT_SDMMC_GPIO register for the ALT_SDMMC instance. */
2740 #define ALT_SDMMC_GPIO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_GPIO_OFST))
2741 /* The address of the ALT_SDMMC_TCBCNT register for the ALT_SDMMC instance. */
2742 #define ALT_SDMMC_TCBCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_TCBCNT_OFST))
2743 /* The address of the ALT_SDMMC_TBBCNT register for the ALT_SDMMC instance. */
2744 #define ALT_SDMMC_TBBCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_TBBCNT_OFST))
2745 /* The address of the ALT_SDMMC_DEBNCE register for the ALT_SDMMC instance. */
2746 #define ALT_SDMMC_DEBNCE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_DEBNCE_OFST))
2747 /* The address of the ALT_SDMMC_USRID register for the ALT_SDMMC instance. */
2748 #define ALT_SDMMC_USRID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_USRID_OFST))
2749 /* The address of the ALT_SDMMC_VERID register for the ALT_SDMMC instance. */
2750 #define ALT_SDMMC_VERID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_VERID_OFST))
2751 /* The address of the ALT_SDMMC_HCON register for the ALT_SDMMC instance. */
2752 #define ALT_SDMMC_HCON_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_HCON_OFST))
2753 /* The address of the ALT_SDMMC_UHS_REG register for the ALT_SDMMC instance. */
2754 #define ALT_SDMMC_UHS_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_UHS_REG_OFST))
2755 /* The address of the ALT_SDMMC_RST_N register for the ALT_SDMMC instance. */
2756 #define ALT_SDMMC_RST_N_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RST_N_OFST))
2757 /* The address of the ALT_SDMMC_BMOD register for the ALT_SDMMC instance. */
2758 #define ALT_SDMMC_BMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BMOD_OFST))
2759 /* The address of the ALT_SDMMC_PLDMND register for the ALT_SDMMC instance. */
2760 #define ALT_SDMMC_PLDMND_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_PLDMND_OFST))
2761 /* The address of the ALT_SDMMC_DBADDR register for the ALT_SDMMC instance. */
2762 #define ALT_SDMMC_DBADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_DBADDR_OFST))
2763 /* The address of the ALT_SDMMC_IDSTS register for the ALT_SDMMC instance. */
2764 #define ALT_SDMMC_IDSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_IDSTS_OFST))
2765 /* The address of the ALT_SDMMC_IDINTEN register for the ALT_SDMMC instance. */
2766 #define ALT_SDMMC_IDINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_IDINTEN_OFST))
2767 /* The address of the ALT_SDMMC_DSCADDR register for the ALT_SDMMC instance. */
2768 #define ALT_SDMMC_DSCADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_DSCADDR_OFST))
2769 /* The address of the ALT_SDMMC_BUFADDR register for the ALT_SDMMC instance. */
2770 #define ALT_SDMMC_BUFADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BUFADDR_OFST))
2771 /* The address of the ALT_SDMMC_CARDTHRCTL register for the ALT_SDMMC instance. */
2772 #define ALT_SDMMC_CARDTHRCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CARDTHRCTL_OFST))
2773 /* The address of the ALT_SDMMC_BACK_END_POWER_R register for the ALT_SDMMC instance. */
2774 #define ALT_SDMMC_BACK_END_POWER_R_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BACK_END_POWER_R_OFST))
2775 /* The address of the ALT_SDMMC_UHS_REG_EXT register for the ALT_SDMMC instance. */
2776 #define ALT_SDMMC_UHS_REG_EXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_UHS_REG_EXT_OFST))
2777 /* The address of the ALT_SDMMC_EMMC_DDR_REG register for the ALT_SDMMC instance. */
2778 #define ALT_SDMMC_EMMC_DDR_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_EMMC_DDR_REG_OFST))
2779 /* The address of the ALT_SDMMC_EN_SHIFT register for the ALT_SDMMC instance. */
2780 #define ALT_SDMMC_EN_SHIFT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_EN_SHIFT_OFST))
2781 /* The address of the ALT_SDMMC_DATA register for the ALT_SDMMC instance. */
2782 #define ALT_SDMMC_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_DATA_OFST))
2783 /* The base address byte offset for the start of the ALT_SDMMC component. */
2784 #define ALT_SDMMC_OFST 0xff808000
2785 /* The start address of the ALT_SDMMC component. */
2786 #define ALT_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDMMC_OFST))
2787 /* The lower bound address range of the ALT_SDMMC component. */
2788 #define ALT_SDMMC_LB_ADDR ALT_SDMMC_ADDR
2789 /* The upper bound address range of the ALT_SDMMC component. */
2790 #define ALT_SDMMC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDMMC_ADDR) + 0x400) - 1))
2791 
2792 
2793 /*
2794  * Component Instance : i_qspi_qspiregs
2795  *
2796  * Instance i_qspi_qspiregs of component ALT_QSPI.
2797  *
2798  *
2799  */
2800 /* The address of the ALT_QSPI_CFG register for the ALT_QSPI instance. */
2801 #define ALT_QSPI_CFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_CFG_OFST))
2802 /* The address of the ALT_QSPI_DEVRD register for the ALT_QSPI instance. */
2803 #define ALT_QSPI_DEVRD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DEVRD_OFST))
2804 /* The address of the ALT_QSPI_DEVWR register for the ALT_QSPI instance. */
2805 #define ALT_QSPI_DEVWR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DEVWR_OFST))
2806 /* The address of the ALT_QSPI_DELAY register for the ALT_QSPI instance. */
2807 #define ALT_QSPI_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DELAY_OFST))
2808 /* The address of the ALT_QSPI_RDDATACAP register for the ALT_QSPI instance. */
2809 #define ALT_QSPI_RDDATACAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_RDDATACAP_OFST))
2810 /* The address of the ALT_QSPI_DEVSZ register for the ALT_QSPI instance. */
2811 #define ALT_QSPI_DEVSZ_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DEVSZ_OFST))
2812 /* The address of the ALT_QSPI_SRAMPART register for the ALT_QSPI instance. */
2813 #define ALT_QSPI_SRAMPART_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_SRAMPART_OFST))
2814 /* The address of the ALT_QSPI_INDADDRTRIG register for the ALT_QSPI instance. */
2815 #define ALT_QSPI_INDADDRTRIG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDADDRTRIG_OFST))
2816 /* The address of the ALT_QSPI_DMAPER register for the ALT_QSPI instance. */
2817 #define ALT_QSPI_DMAPER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DMAPER_OFST))
2818 /* The address of the ALT_QSPI_REMAPADDR register for the ALT_QSPI instance. */
2819 #define ALT_QSPI_REMAPADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_REMAPADDR_OFST))
2820 /* The address of the ALT_QSPI_MODBIT register for the ALT_QSPI instance. */
2821 #define ALT_QSPI_MODBIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_MODBIT_OFST))
2822 /* The address of the ALT_QSPI_SRAMFILL register for the ALT_QSPI instance. */
2823 #define ALT_QSPI_SRAMFILL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_SRAMFILL_OFST))
2824 /* The address of the ALT_QSPI_TXTHRESH register for the ALT_QSPI instance. */
2825 #define ALT_QSPI_TXTHRESH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_TXTHRESH_OFST))
2826 /* The address of the ALT_QSPI_RXTHRESH register for the ALT_QSPI instance. */
2827 #define ALT_QSPI_RXTHRESH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_RXTHRESH_OFST))
2828 /* The address of the ALT_QSPI_IRQSTAT register for the ALT_QSPI instance. */
2829 #define ALT_QSPI_IRQSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_IRQSTAT_OFST))
2830 /* The address of the ALT_QSPI_IRQMSK register for the ALT_QSPI instance. */
2831 #define ALT_QSPI_IRQMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_IRQMSK_OFST))
2832 /* The address of the ALT_QSPI_LOWWRPROT register for the ALT_QSPI instance. */
2833 #define ALT_QSPI_LOWWRPROT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_LOWWRPROT_OFST))
2834 /* The address of the ALT_QSPI_UPPWRPROT register for the ALT_QSPI instance. */
2835 #define ALT_QSPI_UPPWRPROT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_UPPWRPROT_OFST))
2836 /* The address of the ALT_QSPI_WRPROT register for the ALT_QSPI instance. */
2837 #define ALT_QSPI_WRPROT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_WRPROT_OFST))
2838 /* The address of the ALT_QSPI_INDRD register for the ALT_QSPI instance. */
2839 #define ALT_QSPI_INDRD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDRD_OFST))
2840 /* The address of the ALT_QSPI_INDRDWATER register for the ALT_QSPI instance. */
2841 #define ALT_QSPI_INDRDWATER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDRDWATER_OFST))
2842 /* The address of the ALT_QSPI_INDRDSTADDR register for the ALT_QSPI instance. */
2843 #define ALT_QSPI_INDRDSTADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDRDSTADDR_OFST))
2844 /* The address of the ALT_QSPI_INDRDCNT register for the ALT_QSPI instance. */
2845 #define ALT_QSPI_INDRDCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDRDCNT_OFST))
2846 /* The address of the ALT_QSPI_INDWR register for the ALT_QSPI instance. */
2847 #define ALT_QSPI_INDWR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDWR_OFST))
2848 /* The address of the ALT_QSPI_INDWRWATER register for the ALT_QSPI instance. */
2849 #define ALT_QSPI_INDWRWATER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDWRWATER_OFST))
2850 /* The address of the ALT_QSPI_INDWRSTADDR register for the ALT_QSPI instance. */
2851 #define ALT_QSPI_INDWRSTADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDWRSTADDR_OFST))
2852 /* The address of the ALT_QSPI_INDWRCNT register for the ALT_QSPI instance. */
2853 #define ALT_QSPI_INDWRCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDWRCNT_OFST))
2854 /* The address of the ALT_QSPI_FLSHCMD register for the ALT_QSPI instance. */
2855 #define ALT_QSPI_FLSHCMD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMD_OFST))
2856 /* The address of the ALT_QSPI_FLSHCMDADDR register for the ALT_QSPI instance. */
2857 #define ALT_QSPI_FLSHCMDADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDADDR_OFST))
2858 /* The address of the ALT_QSPI_FLSHCMDRDDATALO register for the ALT_QSPI instance. */
2859 #define ALT_QSPI_FLSHCMDRDDATALO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDRDDATALO_OFST))
2860 /* The address of the ALT_QSPI_FLSHCMDRDDATAUP register for the ALT_QSPI instance. */
2861 #define ALT_QSPI_FLSHCMDRDDATAUP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDRDDATAUP_OFST))
2862 /* The address of the ALT_QSPI_FLSHCMDWRDATALO register for the ALT_QSPI instance. */
2863 #define ALT_QSPI_FLSHCMDWRDATALO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDWRDATALO_OFST))
2864 /* The address of the ALT_QSPI_FLSHCMDWRDATAUP register for the ALT_QSPI instance. */
2865 #define ALT_QSPI_FLSHCMDWRDATAUP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDWRDATAUP_OFST))
2866 /* The address of the ALT_QSPI_MODULEID register for the ALT_QSPI instance. */
2867 #define ALT_QSPI_MODULEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_MODULEID_OFST))
2868 /* The base address byte offset for the start of the ALT_QSPI component. */
2869 #define ALT_QSPI_OFST 0xff809000
2870 /* The start address of the ALT_QSPI component. */
2871 #define ALT_QSPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_QSPI_OFST))
2872 /* The lower bound address range of the ALT_QSPI component. */
2873 #define ALT_QSPI_LB_ADDR ALT_QSPI_ADDR
2874 /* The upper bound address range of the ALT_QSPI component. */
2875 #define ALT_QSPI_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_QSPI_ADDR) + 0x100) - 1))
2876 
2877 
2878 /*
2879  * Component Instance : ecc_emac0_rx_ecc_registerBlock
2880  *
2881  * Instance ecc_emac0_rx_ecc_registerBlock of component ALT_ECC_EMAC0_RX_ECC.
2882  *
2883  *
2884  */
2885 /* The address of the ALT_ECC_EMAC0_RX_ECC_IP_REV_ID register for the ALT_ECC_EMAC0_RX_ECC instance. */
2886 #define ALT_ECC_EMAC0_RX_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_IP_REV_ID_OFST))
2887 /* The address of the ALT_ECC_EMAC0_RX_ECC_CTL register for the ALT_ECC_EMAC0_RX_ECC instance. */
2888 #define ALT_ECC_EMAC0_RX_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_CTL_OFST))
2889 /* The address of the ALT_ECC_EMAC0_RX_ECC_INITSTAT register for the ALT_ECC_EMAC0_RX_ECC instance. */
2890 #define ALT_ECC_EMAC0_RX_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_INITSTAT_OFST))
2891 /* The address of the ALT_ECC_EMAC0_RX_ECC_ERRINTEN register for the ALT_ECC_EMAC0_RX_ECC instance. */
2892 #define ALT_ECC_EMAC0_RX_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ERRINTEN_OFST))
2893 /* The address of the ALT_ECC_EMAC0_RX_ECC_ERRINTENS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2894 #define ALT_ECC_EMAC0_RX_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ERRINTENS_OFST))
2895 /* The address of the ALT_ECC_EMAC0_RX_ECC_ERRINTENR register for the ALT_ECC_EMAC0_RX_ECC instance. */
2896 #define ALT_ECC_EMAC0_RX_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ERRINTENR_OFST))
2897 /* The address of the ALT_ECC_EMAC0_RX_ECC_INTMOD register for the ALT_ECC_EMAC0_RX_ECC instance. */
2898 #define ALT_ECC_EMAC0_RX_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_INTMOD_OFST))
2899 /* The address of the ALT_ECC_EMAC0_RX_ECC_INTSTAT register for the ALT_ECC_EMAC0_RX_ECC instance. */
2900 #define ALT_ECC_EMAC0_RX_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_INTSTAT_OFST))
2901 /* The address of the ALT_ECC_EMAC0_RX_ECC_INTTEST register for the ALT_ECC_EMAC0_RX_ECC instance. */
2902 #define ALT_ECC_EMAC0_RX_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_INTTEST_OFST))
2903 /* The address of the ALT_ECC_EMAC0_RX_ECC_MODSTAT register for the ALT_ECC_EMAC0_RX_ECC instance. */
2904 #define ALT_ECC_EMAC0_RX_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_MODSTAT_OFST))
2905 /* The address of the ALT_ECC_EMAC0_RX_ECC_DERRADDRA register for the ALT_ECC_EMAC0_RX_ECC instance. */
2906 #define ALT_ECC_EMAC0_RX_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_DERRADDRA_OFST))
2907 /* The address of the ALT_ECC_EMAC0_RX_ECC_SERRADDRA register for the ALT_ECC_EMAC0_RX_ECC instance. */
2908 #define ALT_ECC_EMAC0_RX_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_SERRADDRA_OFST))
2909 /* The address of the ALT_ECC_EMAC0_RX_ECC_SERRCNTREG register for the ALT_ECC_EMAC0_RX_ECC instance. */
2910 #define ALT_ECC_EMAC0_RX_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_SERRCNTREG_OFST))
2911 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_ADDRBUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2912 #define ALT_ECC_EMAC0_RX_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_ADDRBUS_OFST))
2913 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_RDATA0BUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2914 #define ALT_ECC_EMAC0_RX_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_RDATA0BUS_OFST))
2915 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_RDATA1BUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2916 #define ALT_ECC_EMAC0_RX_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_RDATA1BUS_OFST))
2917 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_RDATA2BUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2918 #define ALT_ECC_EMAC0_RX_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_RDATA2BUS_OFST))
2919 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_RDATA3BUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2920 #define ALT_ECC_EMAC0_RX_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_RDATA3BUS_OFST))
2921 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_WDATA0BUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2922 #define ALT_ECC_EMAC0_RX_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDATA0BUS_OFST))
2923 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_WDATA1BUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2924 #define ALT_ECC_EMAC0_RX_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDATA1BUS_OFST))
2925 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_WDATA2BUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2926 #define ALT_ECC_EMAC0_RX_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDATA2BUS_OFST))
2927 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_WDATA3BUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2928 #define ALT_ECC_EMAC0_RX_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDATA3BUS_OFST))
2929 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2930 #define ALT_ECC_EMAC0_RX_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_RDATAECC0BUS_OFST))
2931 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2932 #define ALT_ECC_EMAC0_RX_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_RDATAECC1BUS_OFST))
2933 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2934 #define ALT_ECC_EMAC0_RX_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDATAECC0BUS_OFST))
2935 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_EMAC0_RX_ECC instance. */
2936 #define ALT_ECC_EMAC0_RX_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDATAECC1BUS_OFST))
2937 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_DBYTECTL register for the ALT_ECC_EMAC0_RX_ECC instance. */
2938 #define ALT_ECC_EMAC0_RX_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_DBYTECTL_OFST))
2939 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_ACCCTL register for the ALT_ECC_EMAC0_RX_ECC instance. */
2940 #define ALT_ECC_EMAC0_RX_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_ACCCTL_OFST))
2941 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_STARTACC register for the ALT_ECC_EMAC0_RX_ECC instance. */
2942 #define ALT_ECC_EMAC0_RX_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_STARTACC_OFST))
2943 /* The address of the ALT_ECC_EMAC0_RX_ECC_ECC_WDCTL register for the ALT_ECC_EMAC0_RX_ECC instance. */
2944 #define ALT_ECC_EMAC0_RX_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDCTL_OFST))
2945 /* The address of the ALT_ECC_EMAC0_RX_ECC_SERRLKUPA0 register for the ALT_ECC_EMAC0_RX_ECC instance. */
2946 #define ALT_ECC_EMAC0_RX_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_SERRLKUPA0_OFST))
2947 /* The base address byte offset for the start of the ALT_ECC_EMAC0_RX_ECC component. */
2948 #define ALT_ECC_EMAC0_RX_ECC_OFST 0xff8c0800
2949 /* The start address of the ALT_ECC_EMAC0_RX_ECC component. */
2950 #define ALT_ECC_EMAC0_RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC0_RX_ECC_OFST))
2951 /* The lower bound address range of the ALT_ECC_EMAC0_RX_ECC component. */
2952 #define ALT_ECC_EMAC0_RX_ECC_LB_ADDR ALT_ECC_EMAC0_RX_ECC_ADDR
2953 /* The upper bound address range of the ALT_ECC_EMAC0_RX_ECC component. */
2954 #define ALT_ECC_EMAC0_RX_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + 0x400) - 1))
2955 
2956 
2957 /*
2958  * Component Instance : ecc_emac0_tx_ecc_registerBlock
2959  *
2960  * Instance ecc_emac0_tx_ecc_registerBlock of component ALT_ECC_EMAC0_TX_ECC.
2961  *
2962  *
2963  */
2964 /* The address of the ALT_ECC_EMAC0_TX_ECC_IP_REV_ID register for the ALT_ECC_EMAC0_TX_ECC instance. */
2965 #define ALT_ECC_EMAC0_TX_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_IP_REV_ID_OFST))
2966 /* The address of the ALT_ECC_EMAC0_TX_ECC_CTL register for the ALT_ECC_EMAC0_TX_ECC instance. */
2967 #define ALT_ECC_EMAC0_TX_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_CTL_OFST))
2968 /* The address of the ALT_ECC_EMAC0_TX_ECC_INITSTAT register for the ALT_ECC_EMAC0_TX_ECC instance. */
2969 #define ALT_ECC_EMAC0_TX_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_INITSTAT_OFST))
2970 /* The address of the ALT_ECC_EMAC0_TX_ECC_ERRINTEN register for the ALT_ECC_EMAC0_TX_ECC instance. */
2971 #define ALT_ECC_EMAC0_TX_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ERRINTEN_OFST))
2972 /* The address of the ALT_ECC_EMAC0_TX_ECC_ERRINTENS register for the ALT_ECC_EMAC0_TX_ECC instance. */
2973 #define ALT_ECC_EMAC0_TX_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ERRINTENS_OFST))
2974 /* The address of the ALT_ECC_EMAC0_TX_ECC_ERRINTENR register for the ALT_ECC_EMAC0_TX_ECC instance. */
2975 #define ALT_ECC_EMAC0_TX_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ERRINTENR_OFST))
2976 /* The address of the ALT_ECC_EMAC0_TX_ECC_INTMOD register for the ALT_ECC_EMAC0_TX_ECC instance. */
2977 #define ALT_ECC_EMAC0_TX_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_INTMOD_OFST))
2978 /* The address of the ALT_ECC_EMAC0_TX_ECC_INTTEST register for the ALT_ECC_EMAC0_TX_ECC instance. */
2979 #define ALT_ECC_EMAC0_TX_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_INTTEST_OFST))
2980 /* The address of the ALT_ECC_EMAC0_TX_ECC_MODSTAT register for the ALT_ECC_EMAC0_TX_ECC instance. */
2981 #define ALT_ECC_EMAC0_TX_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_MODSTAT_OFST))
2982 /* The address of the ALT_ECC_EMAC0_TX_ECC_DERRADDRA register for the ALT_ECC_EMAC0_TX_ECC instance. */
2983 #define ALT_ECC_EMAC0_TX_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_DERRADDRA_OFST))
2984 /* The address of the ALT_ECC_EMAC0_TX_ECC_SERRADDRA register for the ALT_ECC_EMAC0_TX_ECC instance. */
2985 #define ALT_ECC_EMAC0_TX_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_SERRADDRA_OFST))
2986 /* The address of the ALT_ECC_EMAC0_TX_ECC_INTSTAT register for the ALT_ECC_EMAC0_TX_ECC instance. */
2987 #define ALT_ECC_EMAC0_TX_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_INTSTAT_OFST))
2988 /* The address of the ALT_ECC_EMAC0_TX_ECC_SERRCNTREG register for the ALT_ECC_EMAC0_TX_ECC instance. */
2989 #define ALT_ECC_EMAC0_TX_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_SERRCNTREG_OFST))
2990 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_ADDRBUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
2991 #define ALT_ECC_EMAC0_TX_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_ADDRBUS_OFST))
2992 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_RDATA0BUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
2993 #define ALT_ECC_EMAC0_TX_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_RDATA0BUS_OFST))
2994 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_RDATA1BUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
2995 #define ALT_ECC_EMAC0_TX_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_RDATA1BUS_OFST))
2996 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_RDATA2BUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
2997 #define ALT_ECC_EMAC0_TX_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_RDATA2BUS_OFST))
2998 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_RDATA3BUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
2999 #define ALT_ECC_EMAC0_TX_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_RDATA3BUS_OFST))
3000 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_WDATA0BUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
3001 #define ALT_ECC_EMAC0_TX_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDATA0BUS_OFST))
3002 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_WDATA1BUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
3003 #define ALT_ECC_EMAC0_TX_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDATA1BUS_OFST))
3004 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_WDATA2BUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
3005 #define ALT_ECC_EMAC0_TX_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDATA2BUS_OFST))
3006 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_WDATA3BUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
3007 #define ALT_ECC_EMAC0_TX_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDATA3BUS_OFST))
3008 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
3009 #define ALT_ECC_EMAC0_TX_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_RDATAECC0BUS_OFST))
3010 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
3011 #define ALT_ECC_EMAC0_TX_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_RDATAECC1BUS_OFST))
3012 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
3013 #define ALT_ECC_EMAC0_TX_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDATAECC0BUS_OFST))
3014 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_EMAC0_TX_ECC instance. */
3015 #define ALT_ECC_EMAC0_TX_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDATAECC1BUS_OFST))
3016 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_DBYTECTL register for the ALT_ECC_EMAC0_TX_ECC instance. */
3017 #define ALT_ECC_EMAC0_TX_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_DBYTECTL_OFST))
3018 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_ACCCTL register for the ALT_ECC_EMAC0_TX_ECC instance. */
3019 #define ALT_ECC_EMAC0_TX_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_ACCCTL_OFST))
3020 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_STARTACC register for the ALT_ECC_EMAC0_TX_ECC instance. */
3021 #define ALT_ECC_EMAC0_TX_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_STARTACC_OFST))
3022 /* The address of the ALT_ECC_EMAC0_TX_ECC_ECC_WDCTL register for the ALT_ECC_EMAC0_TX_ECC instance. */
3023 #define ALT_ECC_EMAC0_TX_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDCTL_OFST))
3024 /* The address of the ALT_ECC_EMAC0_TX_ECC_SERRLKUPA0 register for the ALT_ECC_EMAC0_TX_ECC instance. */
3025 #define ALT_ECC_EMAC0_TX_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_SERRLKUPA0_OFST))
3026 /* The base address byte offset for the start of the ALT_ECC_EMAC0_TX_ECC component. */
3027 #define ALT_ECC_EMAC0_TX_ECC_OFST 0xff8c0c00
3028 /* The start address of the ALT_ECC_EMAC0_TX_ECC component. */
3029 #define ALT_ECC_EMAC0_TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC0_TX_ECC_OFST))
3030 /* The lower bound address range of the ALT_ECC_EMAC0_TX_ECC component. */
3031 #define ALT_ECC_EMAC0_TX_ECC_LB_ADDR ALT_ECC_EMAC0_TX_ECC_ADDR
3032 /* The upper bound address range of the ALT_ECC_EMAC0_TX_ECC component. */
3033 #define ALT_ECC_EMAC0_TX_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + 0x400) - 1))
3034 
3035 
3036 /*
3037  * Component Instance : ecc_emac1_rx_ecc_registerBlock
3038  *
3039  * Instance ecc_emac1_rx_ecc_registerBlock of component ALT_ECC_EMAC1_RX_ECC.
3040  *
3041  *
3042  */
3043 /* The address of the ALT_ECC_EMAC1_RX_ECC_IP_REV_ID register for the ALT_ECC_EMAC1_RX_ECC instance. */
3044 #define ALT_ECC_EMAC1_RX_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_IP_REV_ID_OFST))
3045 /* The address of the ALT_ECC_EMAC1_RX_ECC_CTL register for the ALT_ECC_EMAC1_RX_ECC instance. */
3046 #define ALT_ECC_EMAC1_RX_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_CTL_OFST))
3047 /* The address of the ALT_ECC_EMAC1_RX_ECC_INITSTAT register for the ALT_ECC_EMAC1_RX_ECC instance. */
3048 #define ALT_ECC_EMAC1_RX_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_INITSTAT_OFST))
3049 /* The address of the ALT_ECC_EMAC1_RX_ECC_ERRINTEN register for the ALT_ECC_EMAC1_RX_ECC instance. */
3050 #define ALT_ECC_EMAC1_RX_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ERRINTEN_OFST))
3051 /* The address of the ALT_ECC_EMAC1_RX_ECC_ERRINTENS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3052 #define ALT_ECC_EMAC1_RX_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ERRINTENS_OFST))
3053 /* The address of the ALT_ECC_EMAC1_RX_ECC_ERRINTENR register for the ALT_ECC_EMAC1_RX_ECC instance. */
3054 #define ALT_ECC_EMAC1_RX_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ERRINTENR_OFST))
3055 /* The address of the ALT_ECC_EMAC1_RX_ECC_INTMOD register for the ALT_ECC_EMAC1_RX_ECC instance. */
3056 #define ALT_ECC_EMAC1_RX_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_INTMOD_OFST))
3057 /* The address of the ALT_ECC_EMAC1_RX_ECC_INTSTAT register for the ALT_ECC_EMAC1_RX_ECC instance. */
3058 #define ALT_ECC_EMAC1_RX_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_INTSTAT_OFST))
3059 /* The address of the ALT_ECC_EMAC1_RX_ECC_INTTEST register for the ALT_ECC_EMAC1_RX_ECC instance. */
3060 #define ALT_ECC_EMAC1_RX_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_INTTEST_OFST))
3061 /* The address of the ALT_ECC_EMAC1_RX_ECC_MODSTAT register for the ALT_ECC_EMAC1_RX_ECC instance. */
3062 #define ALT_ECC_EMAC1_RX_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_MODSTAT_OFST))
3063 /* The address of the ALT_ECC_EMAC1_RX_ECC_DERRADDRA register for the ALT_ECC_EMAC1_RX_ECC instance. */
3064 #define ALT_ECC_EMAC1_RX_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_DERRADDRA_OFST))
3065 /* The address of the ALT_ECC_EMAC1_RX_ECC_SERRADDRA register for the ALT_ECC_EMAC1_RX_ECC instance. */
3066 #define ALT_ECC_EMAC1_RX_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_SERRADDRA_OFST))
3067 /* The address of the ALT_ECC_EMAC1_RX_ECC_SERRCNTREG register for the ALT_ECC_EMAC1_RX_ECC instance. */
3068 #define ALT_ECC_EMAC1_RX_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_SERRCNTREG_OFST))
3069 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_ADDRBUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3070 #define ALT_ECC_EMAC1_RX_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_ADDRBUS_OFST))
3071 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_RDATA0BUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3072 #define ALT_ECC_EMAC1_RX_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_RDATA0BUS_OFST))
3073 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_RDATA1BUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3074 #define ALT_ECC_EMAC1_RX_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_RDATA1BUS_OFST))
3075 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_RDATA2BUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3076 #define ALT_ECC_EMAC1_RX_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_RDATA2BUS_OFST))
3077 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_RDATA3BUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3078 #define ALT_ECC_EMAC1_RX_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_RDATA3BUS_OFST))
3079 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_WDATA0BUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3080 #define ALT_ECC_EMAC1_RX_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDATA0BUS_OFST))
3081 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_WDATA1BUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3082 #define ALT_ECC_EMAC1_RX_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDATA1BUS_OFST))
3083 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_WDATA2BUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3084 #define ALT_ECC_EMAC1_RX_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDATA2BUS_OFST))
3085 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_WDATA3BUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3086 #define ALT_ECC_EMAC1_RX_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDATA3BUS_OFST))
3087 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3088 #define ALT_ECC_EMAC1_RX_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_RDATAECC0BUS_OFST))
3089 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3090 #define ALT_ECC_EMAC1_RX_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_RDATAECC1BUS_OFST))
3091 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3092 #define ALT_ECC_EMAC1_RX_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDATAECC0BUS_OFST))
3093 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_EMAC1_RX_ECC instance. */
3094 #define ALT_ECC_EMAC1_RX_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDATAECC1BUS_OFST))
3095 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_DBYTECTL register for the ALT_ECC_EMAC1_RX_ECC instance. */
3096 #define ALT_ECC_EMAC1_RX_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_DBYTECTL_OFST))
3097 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_ACCCTL register for the ALT_ECC_EMAC1_RX_ECC instance. */
3098 #define ALT_ECC_EMAC1_RX_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_ACCCTL_OFST))
3099 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_STARTACC register for the ALT_ECC_EMAC1_RX_ECC instance. */
3100 #define ALT_ECC_EMAC1_RX_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_STARTACC_OFST))
3101 /* The address of the ALT_ECC_EMAC1_RX_ECC_ECC_WDCTL register for the ALT_ECC_EMAC1_RX_ECC instance. */
3102 #define ALT_ECC_EMAC1_RX_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDCTL_OFST))
3103 /* The address of the ALT_ECC_EMAC1_RX_ECC_SERRLKUPA0 register for the ALT_ECC_EMAC1_RX_ECC instance. */
3104 #define ALT_ECC_EMAC1_RX_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_SERRLKUPA0_OFST))
3105 /* The base address byte offset for the start of the ALT_ECC_EMAC1_RX_ECC component. */
3106 #define ALT_ECC_EMAC1_RX_ECC_OFST 0xff8c1000
3107 /* The start address of the ALT_ECC_EMAC1_RX_ECC component. */
3108 #define ALT_ECC_EMAC1_RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC1_RX_ECC_OFST))
3109 /* The lower bound address range of the ALT_ECC_EMAC1_RX_ECC component. */
3110 #define ALT_ECC_EMAC1_RX_ECC_LB_ADDR ALT_ECC_EMAC1_RX_ECC_ADDR
3111 /* The upper bound address range of the ALT_ECC_EMAC1_RX_ECC component. */
3112 #define ALT_ECC_EMAC1_RX_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + 0x400) - 1))
3113 
3114 
3115 /*
3116  * Component Instance : ecc_emac1_tx_ecc_registerBlock
3117  *
3118  * Instance ecc_emac1_tx_ecc_registerBlock of component ALT_ECC_EMAC1_TX_ECC.
3119  *
3120  *
3121  */
3122 /* The address of the ALT_ECC_EMAC1_TX_ECC_IP_REV_ID register for the ALT_ECC_EMAC1_TX_ECC instance. */
3123 #define ALT_ECC_EMAC1_TX_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_IP_REV_ID_OFST))
3124 /* The address of the ALT_ECC_EMAC1_TX_ECC_CTL register for the ALT_ECC_EMAC1_TX_ECC instance. */
3125 #define ALT_ECC_EMAC1_TX_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_CTL_OFST))
3126 /* The address of the ALT_ECC_EMAC1_TX_ECC_INITSTAT register for the ALT_ECC_EMAC1_TX_ECC instance. */
3127 #define ALT_ECC_EMAC1_TX_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_INITSTAT_OFST))
3128 /* The address of the ALT_ECC_EMAC1_TX_ECC_ERRINTEN register for the ALT_ECC_EMAC1_TX_ECC instance. */
3129 #define ALT_ECC_EMAC1_TX_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ERRINTEN_OFST))
3130 /* The address of the ALT_ECC_EMAC1_TX_ECC_ERRINTENS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3131 #define ALT_ECC_EMAC1_TX_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ERRINTENS_OFST))
3132 /* The address of the ALT_ECC_EMAC1_TX_ECC_ERRINTENR register for the ALT_ECC_EMAC1_TX_ECC instance. */
3133 #define ALT_ECC_EMAC1_TX_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ERRINTENR_OFST))
3134 /* The address of the ALT_ECC_EMAC1_TX_ECC_INTMOD register for the ALT_ECC_EMAC1_TX_ECC instance. */
3135 #define ALT_ECC_EMAC1_TX_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_INTMOD_OFST))
3136 /* The address of the ALT_ECC_EMAC1_TX_ECC_INTTEST register for the ALT_ECC_EMAC1_TX_ECC instance. */
3137 #define ALT_ECC_EMAC1_TX_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_INTTEST_OFST))
3138 /* The address of the ALT_ECC_EMAC1_TX_ECC_MODSTAT register for the ALT_ECC_EMAC1_TX_ECC instance. */
3139 #define ALT_ECC_EMAC1_TX_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_MODSTAT_OFST))
3140 /* The address of the ALT_ECC_EMAC1_TX_ECC_DERRADDRA register for the ALT_ECC_EMAC1_TX_ECC instance. */
3141 #define ALT_ECC_EMAC1_TX_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_DERRADDRA_OFST))
3142 /* The address of the ALT_ECC_EMAC1_TX_ECC_SERRADDRA register for the ALT_ECC_EMAC1_TX_ECC instance. */
3143 #define ALT_ECC_EMAC1_TX_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_SERRADDRA_OFST))
3144 /* The address of the ALT_ECC_EMAC1_TX_ECC_INTSTAT register for the ALT_ECC_EMAC1_TX_ECC instance. */
3145 #define ALT_ECC_EMAC1_TX_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_INTSTAT_OFST))
3146 /* The address of the ALT_ECC_EMAC1_TX_ECC_SERRCNTREG register for the ALT_ECC_EMAC1_TX_ECC instance. */
3147 #define ALT_ECC_EMAC1_TX_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_SERRCNTREG_OFST))
3148 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3149 #define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_OFST))
3150 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_RDATA0BUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3151 #define ALT_ECC_EMAC1_TX_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_RDATA0BUS_OFST))
3152 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_RDATA1BUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3153 #define ALT_ECC_EMAC1_TX_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_RDATA1BUS_OFST))
3154 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_RDATA2BUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3155 #define ALT_ECC_EMAC1_TX_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_RDATA2BUS_OFST))
3156 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_RDATA3BUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3157 #define ALT_ECC_EMAC1_TX_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_RDATA3BUS_OFST))
3158 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_WDATA0BUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3159 #define ALT_ECC_EMAC1_TX_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDATA0BUS_OFST))
3160 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_WDATA1BUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3161 #define ALT_ECC_EMAC1_TX_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDATA1BUS_OFST))
3162 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_WDATA2BUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3163 #define ALT_ECC_EMAC1_TX_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDATA2BUS_OFST))
3164 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_WDATA3BUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3165 #define ALT_ECC_EMAC1_TX_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDATA3BUS_OFST))
3166 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3167 #define ALT_ECC_EMAC1_TX_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_RDATAECC0BUS_OFST))
3168 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3169 #define ALT_ECC_EMAC1_TX_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_RDATAECC1BUS_OFST))
3170 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3171 #define ALT_ECC_EMAC1_TX_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDATAECC0BUS_OFST))
3172 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_EMAC1_TX_ECC instance. */
3173 #define ALT_ECC_EMAC1_TX_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDATAECC1BUS_OFST))
3174 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_DBYTECTL register for the ALT_ECC_EMAC1_TX_ECC instance. */
3175 #define ALT_ECC_EMAC1_TX_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_DBYTECTL_OFST))
3176 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_ACCCTL register for the ALT_ECC_EMAC1_TX_ECC instance. */
3177 #define ALT_ECC_EMAC1_TX_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_ACCCTL_OFST))
3178 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_STARTACC register for the ALT_ECC_EMAC1_TX_ECC instance. */
3179 #define ALT_ECC_EMAC1_TX_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_STARTACC_OFST))
3180 /* The address of the ALT_ECC_EMAC1_TX_ECC_ECC_WDCTL register for the ALT_ECC_EMAC1_TX_ECC instance. */
3181 #define ALT_ECC_EMAC1_TX_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDCTL_OFST))
3182 /* The address of the ALT_ECC_EMAC1_TX_ECC_SERRLKUPA0 register for the ALT_ECC_EMAC1_TX_ECC instance. */
3183 #define ALT_ECC_EMAC1_TX_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_SERRLKUPA0_OFST))
3184 /* The base address byte offset for the start of the ALT_ECC_EMAC1_TX_ECC component. */
3185 #define ALT_ECC_EMAC1_TX_ECC_OFST 0xff8c1400
3186 /* The start address of the ALT_ECC_EMAC1_TX_ECC component. */
3187 #define ALT_ECC_EMAC1_TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC1_TX_ECC_OFST))
3188 /* The lower bound address range of the ALT_ECC_EMAC1_TX_ECC component. */
3189 #define ALT_ECC_EMAC1_TX_ECC_LB_ADDR ALT_ECC_EMAC1_TX_ECC_ADDR
3190 /* The upper bound address range of the ALT_ECC_EMAC1_TX_ECC component. */
3191 #define ALT_ECC_EMAC1_TX_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + 0x400) - 1))
3192 
3193 
3194 /*
3195  * Component Instance : ecc_emac2_rx_ecc_registerBlock
3196  *
3197  * Instance ecc_emac2_rx_ecc_registerBlock of component ALT_ECC_EMAC2_RX_ECC.
3198  *
3199  *
3200  */
3201 /* The address of the ALT_ECC_EMAC2_RX_ECC_IP_REV_ID register for the ALT_ECC_EMAC2_RX_ECC instance. */
3202 #define ALT_ECC_EMAC2_RX_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_IP_REV_ID_OFST))
3203 /* The address of the ALT_ECC_EMAC2_RX_ECC_CTL register for the ALT_ECC_EMAC2_RX_ECC instance. */
3204 #define ALT_ECC_EMAC2_RX_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_CTL_OFST))
3205 /* The address of the ALT_ECC_EMAC2_RX_ECC_INITSTAT register for the ALT_ECC_EMAC2_RX_ECC instance. */
3206 #define ALT_ECC_EMAC2_RX_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_INITSTAT_OFST))
3207 /* The address of the ALT_ECC_EMAC2_RX_ECC_ERRINTEN register for the ALT_ECC_EMAC2_RX_ECC instance. */
3208 #define ALT_ECC_EMAC2_RX_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ERRINTEN_OFST))
3209 /* The address of the ALT_ECC_EMAC2_RX_ECC_ERRINTENS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3210 #define ALT_ECC_EMAC2_RX_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ERRINTENS_OFST))
3211 /* The address of the ALT_ECC_EMAC2_RX_ECC_ERRINTENR register for the ALT_ECC_EMAC2_RX_ECC instance. */
3212 #define ALT_ECC_EMAC2_RX_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ERRINTENR_OFST))
3213 /* The address of the ALT_ECC_EMAC2_RX_ECC_INTMOD register for the ALT_ECC_EMAC2_RX_ECC instance. */
3214 #define ALT_ECC_EMAC2_RX_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_INTMOD_OFST))
3215 /* The address of the ALT_ECC_EMAC2_RX_ECC_INTSTAT register for the ALT_ECC_EMAC2_RX_ECC instance. */
3216 #define ALT_ECC_EMAC2_RX_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_INTSTAT_OFST))
3217 /* The address of the ALT_ECC_EMAC2_RX_ECC_INTTEST register for the ALT_ECC_EMAC2_RX_ECC instance. */
3218 #define ALT_ECC_EMAC2_RX_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_INTTEST_OFST))
3219 /* The address of the ALT_ECC_EMAC2_RX_ECC_MODSTAT register for the ALT_ECC_EMAC2_RX_ECC instance. */
3220 #define ALT_ECC_EMAC2_RX_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_MODSTAT_OFST))
3221 /* The address of the ALT_ECC_EMAC2_RX_ECC_DERRADDRA register for the ALT_ECC_EMAC2_RX_ECC instance. */
3222 #define ALT_ECC_EMAC2_RX_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_DERRADDRA_OFST))
3223 /* The address of the ALT_ECC_EMAC2_RX_ECC_SERRADDRA register for the ALT_ECC_EMAC2_RX_ECC instance. */
3224 #define ALT_ECC_EMAC2_RX_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_SERRADDRA_OFST))
3225 /* The address of the ALT_ECC_EMAC2_RX_ECC_SERRCNTREG register for the ALT_ECC_EMAC2_RX_ECC instance. */
3226 #define ALT_ECC_EMAC2_RX_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_SERRCNTREG_OFST))
3227 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_ADDRBUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3228 #define ALT_ECC_EMAC2_RX_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_ADDRBUS_OFST))
3229 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_RDATA0BUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3230 #define ALT_ECC_EMAC2_RX_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_RDATA0BUS_OFST))
3231 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_RDATA1BUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3232 #define ALT_ECC_EMAC2_RX_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_RDATA1BUS_OFST))
3233 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_RDATA2BUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3234 #define ALT_ECC_EMAC2_RX_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_RDATA2BUS_OFST))
3235 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_RDATA3BUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3236 #define ALT_ECC_EMAC2_RX_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_RDATA3BUS_OFST))
3237 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_WDATA0BUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3238 #define ALT_ECC_EMAC2_RX_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDATA0BUS_OFST))
3239 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_WDATA1BUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3240 #define ALT_ECC_EMAC2_RX_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDATA1BUS_OFST))
3241 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_WDATA2BUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3242 #define ALT_ECC_EMAC2_RX_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDATA2BUS_OFST))
3243 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_WDATA3BUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3244 #define ALT_ECC_EMAC2_RX_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDATA3BUS_OFST))
3245 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3246 #define ALT_ECC_EMAC2_RX_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_RDATAECC0BUS_OFST))
3247 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3248 #define ALT_ECC_EMAC2_RX_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_RDATAECC1BUS_OFST))
3249 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3250 #define ALT_ECC_EMAC2_RX_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDATAECC0BUS_OFST))
3251 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_EMAC2_RX_ECC instance. */
3252 #define ALT_ECC_EMAC2_RX_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDATAECC1BUS_OFST))
3253 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_DBYTECTL register for the ALT_ECC_EMAC2_RX_ECC instance. */
3254 #define ALT_ECC_EMAC2_RX_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_DBYTECTL_OFST))
3255 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_ACCCTL register for the ALT_ECC_EMAC2_RX_ECC instance. */
3256 #define ALT_ECC_EMAC2_RX_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_ACCCTL_OFST))
3257 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_STARTACC register for the ALT_ECC_EMAC2_RX_ECC instance. */
3258 #define ALT_ECC_EMAC2_RX_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_STARTACC_OFST))
3259 /* The address of the ALT_ECC_EMAC2_RX_ECC_ECC_WDCTL register for the ALT_ECC_EMAC2_RX_ECC instance. */
3260 #define ALT_ECC_EMAC2_RX_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDCTL_OFST))
3261 /* The address of the ALT_ECC_EMAC2_RX_ECC_SERRLKUPA0 register for the ALT_ECC_EMAC2_RX_ECC instance. */
3262 #define ALT_ECC_EMAC2_RX_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_SERRLKUPA0_OFST))
3263 /* The base address byte offset for the start of the ALT_ECC_EMAC2_RX_ECC component. */
3264 #define ALT_ECC_EMAC2_RX_ECC_OFST 0xff8c1800
3265 /* The start address of the ALT_ECC_EMAC2_RX_ECC component. */
3266 #define ALT_ECC_EMAC2_RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC2_RX_ECC_OFST))
3267 /* The lower bound address range of the ALT_ECC_EMAC2_RX_ECC component. */
3268 #define ALT_ECC_EMAC2_RX_ECC_LB_ADDR ALT_ECC_EMAC2_RX_ECC_ADDR
3269 /* The upper bound address range of the ALT_ECC_EMAC2_RX_ECC component. */
3270 #define ALT_ECC_EMAC2_RX_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + 0x400) - 1))
3271 
3272 
3273 /*
3274  * Component Instance : ecc_emac2_tx_ecc_registerBlock
3275  *
3276  * Instance ecc_emac2_tx_ecc_registerBlock of component ALT_ECC_EMAC2_TX_ECC.
3277  *
3278  *
3279  */
3280 /* The address of the ALT_ECC_EMAC2_TX_ECC_IP_REV_ID register for the ALT_ECC_EMAC2_TX_ECC instance. */
3281 #define ALT_ECC_EMAC2_TX_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_IP_REV_ID_OFST))
3282 /* The address of the ALT_ECC_EMAC2_TX_ECC_CTL register for the ALT_ECC_EMAC2_TX_ECC instance. */
3283 #define ALT_ECC_EMAC2_TX_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_CTL_OFST))
3284 /* The address of the ALT_ECC_EMAC2_TX_ECC_INITSTAT register for the ALT_ECC_EMAC2_TX_ECC instance. */
3285 #define ALT_ECC_EMAC2_TX_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_INITSTAT_OFST))
3286 /* The address of the ALT_ECC_EMAC2_TX_ECC_ERRINTEN register for the ALT_ECC_EMAC2_TX_ECC instance. */
3287 #define ALT_ECC_EMAC2_TX_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ERRINTEN_OFST))
3288 /* The address of the ALT_ECC_EMAC2_TX_ECC_ERRINTENS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3289 #define ALT_ECC_EMAC2_TX_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ERRINTENS_OFST))
3290 /* The address of the ALT_ECC_EMAC2_TX_ECC_ERRINTENR register for the ALT_ECC_EMAC2_TX_ECC instance. */
3291 #define ALT_ECC_EMAC2_TX_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ERRINTENR_OFST))
3292 /* The address of the ALT_ECC_EMAC2_TX_ECC_INTMOD register for the ALT_ECC_EMAC2_TX_ECC instance. */
3293 #define ALT_ECC_EMAC2_TX_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_INTMOD_OFST))
3294 /* The address of the ALT_ECC_EMAC2_TX_ECC_INTTEST register for the ALT_ECC_EMAC2_TX_ECC instance. */
3295 #define ALT_ECC_EMAC2_TX_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_INTTEST_OFST))
3296 /* The address of the ALT_ECC_EMAC2_TX_ECC_MODSTAT register for the ALT_ECC_EMAC2_TX_ECC instance. */
3297 #define ALT_ECC_EMAC2_TX_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_MODSTAT_OFST))
3298 /* The address of the ALT_ECC_EMAC2_TX_ECC_DERRADDRA register for the ALT_ECC_EMAC2_TX_ECC instance. */
3299 #define ALT_ECC_EMAC2_TX_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_DERRADDRA_OFST))
3300 /* The address of the ALT_ECC_EMAC2_TX_ECC_SERRADDRA register for the ALT_ECC_EMAC2_TX_ECC instance. */
3301 #define ALT_ECC_EMAC2_TX_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_SERRADDRA_OFST))
3302 /* The address of the ALT_ECC_EMAC2_TX_ECC_INTSTAT register for the ALT_ECC_EMAC2_TX_ECC instance. */
3303 #define ALT_ECC_EMAC2_TX_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_INTSTAT_OFST))
3304 /* The address of the ALT_ECC_EMAC2_TX_ECC_SERRCNTREG register for the ALT_ECC_EMAC2_TX_ECC instance. */
3305 #define ALT_ECC_EMAC2_TX_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_SERRCNTREG_OFST))
3306 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_ADDRBUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3307 #define ALT_ECC_EMAC2_TX_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_ADDRBUS_OFST))
3308 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_RDATA0BUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3309 #define ALT_ECC_EMAC2_TX_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_RDATA0BUS_OFST))
3310 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_RDATA1BUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3311 #define ALT_ECC_EMAC2_TX_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_RDATA1BUS_OFST))
3312 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_RDATA2BUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3313 #define ALT_ECC_EMAC2_TX_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_RDATA2BUS_OFST))
3314 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_RDATA3BUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3315 #define ALT_ECC_EMAC2_TX_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_RDATA3BUS_OFST))
3316 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_WDATA0BUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3317 #define ALT_ECC_EMAC2_TX_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDATA0BUS_OFST))
3318 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_WDATA1BUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3319 #define ALT_ECC_EMAC2_TX_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDATA1BUS_OFST))
3320 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_WDATA2BUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3321 #define ALT_ECC_EMAC2_TX_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDATA2BUS_OFST))
3322 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_WDATA3BUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3323 #define ALT_ECC_EMAC2_TX_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDATA3BUS_OFST))
3324 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3325 #define ALT_ECC_EMAC2_TX_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_RDATAECC0BUS_OFST))
3326 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3327 #define ALT_ECC_EMAC2_TX_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_RDATAECC1BUS_OFST))
3328 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3329 #define ALT_ECC_EMAC2_TX_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDATAECC0BUS_OFST))
3330 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_EMAC2_TX_ECC instance. */
3331 #define ALT_ECC_EMAC2_TX_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDATAECC1BUS_OFST))
3332 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_DBYTECTL register for the ALT_ECC_EMAC2_TX_ECC instance. */
3333 #define ALT_ECC_EMAC2_TX_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_DBYTECTL_OFST))
3334 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_ACCCTL register for the ALT_ECC_EMAC2_TX_ECC instance. */
3335 #define ALT_ECC_EMAC2_TX_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_ACCCTL_OFST))
3336 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_STARTACC register for the ALT_ECC_EMAC2_TX_ECC instance. */
3337 #define ALT_ECC_EMAC2_TX_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_STARTACC_OFST))
3338 /* The address of the ALT_ECC_EMAC2_TX_ECC_ECC_WDCTL register for the ALT_ECC_EMAC2_TX_ECC instance. */
3339 #define ALT_ECC_EMAC2_TX_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDCTL_OFST))
3340 /* The address of the ALT_ECC_EMAC2_TX_ECC_SERRLKUPA0 register for the ALT_ECC_EMAC2_TX_ECC instance. */
3341 #define ALT_ECC_EMAC2_TX_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_SERRLKUPA0_OFST))
3342 /* The base address byte offset for the start of the ALT_ECC_EMAC2_TX_ECC component. */
3343 #define ALT_ECC_EMAC2_TX_ECC_OFST 0xff8c1c00
3344 /* The start address of the ALT_ECC_EMAC2_TX_ECC component. */
3345 #define ALT_ECC_EMAC2_TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC2_TX_ECC_OFST))
3346 /* The lower bound address range of the ALT_ECC_EMAC2_TX_ECC component. */
3347 #define ALT_ECC_EMAC2_TX_ECC_LB_ADDR ALT_ECC_EMAC2_TX_ECC_ADDR
3348 /* The upper bound address range of the ALT_ECC_EMAC2_TX_ECC component. */
3349 #define ALT_ECC_EMAC2_TX_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + 0x400) - 1))
3350 
3351 
3352 /*
3353  * Component Instance : ecc_nandecc_ecc_registerBlock
3354  *
3355  * Instance ecc_nandecc_ecc_registerBlock of component ALT_ECC_NAND.
3356  *
3357  *
3358  */
3359 /* The address of the ALT_ECC_NAND_IP_REV_ID register for the ALT_ECC_NAND instance. */
3360 #define ALT_ECC_NAND_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_IP_REV_ID_OFST))
3361 /* The address of the ALT_ECC_NAND_CTL register for the ALT_ECC_NAND instance. */
3362 #define ALT_ECC_NAND_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_CTL_OFST))
3363 /* The address of the ALT_ECC_NAND_INITSTAT register for the ALT_ECC_NAND instance. */
3364 #define ALT_ECC_NAND_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_INITSTAT_OFST))
3365 /* The address of the ALT_ECC_NAND_ERRINTEN register for the ALT_ECC_NAND instance. */
3366 #define ALT_ECC_NAND_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ERRINTEN_OFST))
3367 /* The address of the ALT_ECC_NAND_ERRINTENS register for the ALT_ECC_NAND instance. */
3368 #define ALT_ECC_NAND_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ERRINTENS_OFST))
3369 /* The address of the ALT_ECC_NAND_ERRINTENR register for the ALT_ECC_NAND instance. */
3370 #define ALT_ECC_NAND_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ERRINTENR_OFST))
3371 /* The address of the ALT_ECC_NAND_INTMOD register for the ALT_ECC_NAND instance. */
3372 #define ALT_ECC_NAND_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_INTMOD_OFST))
3373 /* The address of the ALT_ECC_NAND_INTSTAT register for the ALT_ECC_NAND instance. */
3374 #define ALT_ECC_NAND_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_INTSTAT_OFST))
3375 /* The address of the ALT_ECC_NAND_INTTEST register for the ALT_ECC_NAND instance. */
3376 #define ALT_ECC_NAND_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_INTTEST_OFST))
3377 /* The address of the ALT_ECC_NAND_MODSTAT register for the ALT_ECC_NAND instance. */
3378 #define ALT_ECC_NAND_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_MODSTAT_OFST))
3379 /* The address of the ALT_ECC_NAND_DERRADDRA register for the ALT_ECC_NAND instance. */
3380 #define ALT_ECC_NAND_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_DERRADDRA_OFST))
3381 /* The address of the ALT_ECC_NAND_SERRADDRA register for the ALT_ECC_NAND instance. */
3382 #define ALT_ECC_NAND_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_SERRADDRA_OFST))
3383 /* The address of the ALT_ECC_NAND_SERRCNTREG register for the ALT_ECC_NAND instance. */
3384 #define ALT_ECC_NAND_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_SERRCNTREG_OFST))
3385 /* The address of the ALT_ECC_NAND_ECC_ADDRBUS register for the ALT_ECC_NAND instance. */
3386 #define ALT_ECC_NAND_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_ADDRBUS_OFST))
3387 /* The address of the ALT_ECC_NAND_ECC_RDATA0BUS register for the ALT_ECC_NAND instance. */
3388 #define ALT_ECC_NAND_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_RDATA0BUS_OFST))
3389 /* The address of the ALT_ECC_NAND_ECC_RDATA1BUS register for the ALT_ECC_NAND instance. */
3390 #define ALT_ECC_NAND_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_RDATA1BUS_OFST))
3391 /* The address of the ALT_ECC_NAND_ECC_RDATA2BUS register for the ALT_ECC_NAND instance. */
3392 #define ALT_ECC_NAND_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_RDATA2BUS_OFST))
3393 /* The address of the ALT_ECC_NAND_ECC_RDATA3BUS register for the ALT_ECC_NAND instance. */
3394 #define ALT_ECC_NAND_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_RDATA3BUS_OFST))
3395 /* The address of the ALT_ECC_NAND_ECC_WDATA0BUS register for the ALT_ECC_NAND instance. */
3396 #define ALT_ECC_NAND_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDATA0BUS_OFST))
3397 /* The address of the ALT_ECC_NAND_ECC_WDATA1BUS register for the ALT_ECC_NAND instance. */
3398 #define ALT_ECC_NAND_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDATA1BUS_OFST))
3399 /* The address of the ALT_ECC_NAND_ECC_WDATA2BUS register for the ALT_ECC_NAND instance. */
3400 #define ALT_ECC_NAND_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDATA2BUS_OFST))
3401 /* The address of the ALT_ECC_NAND_ECC_WDATA3BUS register for the ALT_ECC_NAND instance. */
3402 #define ALT_ECC_NAND_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDATA3BUS_OFST))
3403 /* The address of the ALT_ECC_NAND_ECC_RDATAECC0BUS register for the ALT_ECC_NAND instance. */
3404 #define ALT_ECC_NAND_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_RDATAECC0BUS_OFST))
3405 /* The address of the ALT_ECC_NAND_ECC_RDATAECC1BUS register for the ALT_ECC_NAND instance. */
3406 #define ALT_ECC_NAND_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_RDATAECC1BUS_OFST))
3407 /* The address of the ALT_ECC_NAND_ECC_WDATAECC0BUS register for the ALT_ECC_NAND instance. */
3408 #define ALT_ECC_NAND_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDATAECC0BUS_OFST))
3409 /* The address of the ALT_ECC_NAND_ECC_WDATAECC1BUS register for the ALT_ECC_NAND instance. */
3410 #define ALT_ECC_NAND_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDATAECC1BUS_OFST))
3411 /* The address of the ALT_ECC_NAND_ECC_DBYTECTL register for the ALT_ECC_NAND instance. */
3412 #define ALT_ECC_NAND_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_DBYTECTL_OFST))
3413 /* The address of the ALT_ECC_NAND_ECC_ACCCTL register for the ALT_ECC_NAND instance. */
3414 #define ALT_ECC_NAND_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_ACCCTL_OFST))
3415 /* The address of the ALT_ECC_NAND_ECC_STARTACC register for the ALT_ECC_NAND instance. */
3416 #define ALT_ECC_NAND_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_STARTACC_OFST))
3417 /* The address of the ALT_ECC_NAND_ECC_WDCTL register for the ALT_ECC_NAND instance. */
3418 #define ALT_ECC_NAND_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDCTL_OFST))
3419 /* The address of the ALT_ECC_NAND_SERRLKUPA0 register for the ALT_ECC_NAND instance. */
3420 #define ALT_ECC_NAND_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_SERRLKUPA0_OFST))
3421 /* The base address byte offset for the start of the ALT_ECC_NAND component. */
3422 #define ALT_ECC_NAND_OFST 0xff8c2000
3423 /* The start address of the ALT_ECC_NAND component. */
3424 #define ALT_ECC_NAND_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_NAND_OFST))
3425 /* The lower bound address range of the ALT_ECC_NAND component. */
3426 #define ALT_ECC_NAND_LB_ADDR ALT_ECC_NAND_ADDR
3427 /* The upper bound address range of the ALT_ECC_NAND component. */
3428 #define ALT_ECC_NAND_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_NAND_ADDR) + 0x400) - 1))
3429 
3430 
3431 /*
3432  * Component Instance : ecc_nandr_ecc_registerBlock
3433  *
3434  * Instance ecc_nandr_ecc_registerBlock of component ALT_ECC_NANDR.
3435  *
3436  *
3437  */
3438 /* The address of the ALT_ECC_NANDR_IP_REV_ID register for the ALT_ECC_NANDR instance. */
3439 #define ALT_ECC_NANDR_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_IP_REV_ID_OFST))
3440 /* The address of the ALT_ECC_NANDR_CTL register for the ALT_ECC_NANDR instance. */
3441 #define ALT_ECC_NANDR_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_CTL_OFST))
3442 /* The address of the ALT_ECC_NANDR_INITSTAT register for the ALT_ECC_NANDR instance. */
3443 #define ALT_ECC_NANDR_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_INITSTAT_OFST))
3444 /* The address of the ALT_ECC_NANDR_ERRINTEN register for the ALT_ECC_NANDR instance. */
3445 #define ALT_ECC_NANDR_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_ERRINTEN_OFST))
3446 /* The address of the ALT_ECC_NANDR_ERRINTENS register for the ALT_ECC_NANDR instance. */
3447 #define ALT_ECC_NANDR_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_ERRINTENS_OFST))
3448 /* The address of the ALT_ECC_NANDR_ERRINTENR register for the ALT_ECC_NANDR instance. */
3449 #define ALT_ECC_NANDR_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_ERRINTENR_OFST))
3450 /* The address of the ALT_ECC_NANDR_INTMOD register for the ALT_ECC_NANDR instance. */
3451 #define ALT_ECC_NANDR_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_INTMOD_OFST))
3452 /* The address of the ALT_ECC_NANDR_INTSTAT register for the ALT_ECC_NANDR instance. */
3453 #define ALT_ECC_NANDR_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_INTSTAT_OFST))
3454 /* The address of the ALT_ECC_NANDR_INTTEST register for the ALT_ECC_NANDR instance. */
3455 #define ALT_ECC_NANDR_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_INTTEST_OFST))
3456 /* The address of the ALT_ECC_NANDR_MODSTAT register for the ALT_ECC_NANDR instance. */
3457 #define ALT_ECC_NANDR_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_MODSTAT_OFST))
3458 /* The address of the ALT_ECC_NANDR_DERRADDRA register for the ALT_ECC_NANDR instance. */
3459 #define ALT_ECC_NANDR_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_DERRADDRA_OFST))
3460 /* The address of the ALT_ECC_NANDR_SERRADDRA register for the ALT_ECC_NANDR instance. */
3461 #define ALT_ECC_NANDR_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_SERRADDRA_OFST))
3462 /* The address of the ALT_ECC_NANDR_SERRCNTREG register for the ALT_ECC_NANDR instance. */
3463 #define ALT_ECC_NANDR_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_SERRCNTREG_OFST))
3464 /* The address of the ALT_ECC_NANDR_ADDRBUS register for the ALT_ECC_NANDR instance. */
3465 #define ALT_ECC_NANDR_ECC_ADDRBUS_ADDR ALT_ECC_NANDR_ADDRBUS_ADDR(ALT_ECC_NANDR_ADDR)
3466 /* The address of the ALT_ECC_NANDR_RDATA0BUS register for the ALT_ECC_NANDR instance. */
3467 #define ALT_ECC_NANDR_ECC_RDATA0BUS_ADDR ALT_ECC_NANDR_RDATA0BUS_ADDR(ALT_ECC_NANDR_ADDR)
3468 /* The address of the ALT_ECC_NANDR_RDATA1BUS register for the ALT_ECC_NANDR instance. */
3469 #define ALT_ECC_NANDR_ECC_RDATA1BUS_ADDR ALT_ECC_NANDR_RDATA1BUS_ADDR(ALT_ECC_NANDR_ADDR)
3470 /* The address of the ALT_ECC_NANDR_RDATA2BUS register for the ALT_ECC_NANDR instance. */
3471 #define ALT_ECC_NANDR_ECC_RDATA2BUS_ADDR ALT_ECC_NANDR_RDATA2BUS_ADDR(ALT_ECC_NANDR_ADDR)
3472 /* The address of the ALT_ECC_NANDR_RDATA3BUS register for the ALT_ECC_NANDR instance. */
3473 #define ALT_ECC_NANDR_ECC_RDATA3BUS_ADDR ALT_ECC_NANDR_RDATA3BUS_ADDR(ALT_ECC_NANDR_ADDR)
3474 /* The address of the ALT_ECC_NANDR_WDATA0BUS register for the ALT_ECC_NANDR instance. */
3475 #define ALT_ECC_NANDR_ECC_WDATA0BUS_ADDR ALT_ECC_NANDR_WDATA0BUS_ADDR(ALT_ECC_NANDR_ADDR)
3476 /* The address of the ALT_ECC_NANDR_WDATA1BUS register for the ALT_ECC_NANDR instance. */
3477 #define ALT_ECC_NANDR_ECC_WDATA1BUS_ADDR ALT_ECC_NANDR_WDATA1BUS_ADDR(ALT_ECC_NANDR_ADDR)
3478 /* The address of the ALT_ECC_NANDR_WDATA2BUS register for the ALT_ECC_NANDR instance. */
3479 #define ALT_ECC_NANDR_ECC_WDATA2BUS_ADDR ALT_ECC_NANDR_WDATA2BUS_ADDR(ALT_ECC_NANDR_ADDR)
3480 /* The address of the ALT_ECC_NANDR_WDATA3BUS register for the ALT_ECC_NANDR instance. */
3481 #define ALT_ECC_NANDR_ECC_WDATA3BUS_ADDR ALT_ECC_NANDR_WDATA3BUS_ADDR(ALT_ECC_NANDR_ADDR)
3482 /* The address of the ALT_ECC_NANDR_RDATAECC0BUS register for the ALT_ECC_NANDR instance. */
3483 #define ALT_ECC_NANDR_ECC_RDATAECC0BUS_ADDR ALT_ECC_NANDR_RDATAECC0BUS_ADDR(ALT_ECC_NANDR_ADDR)
3484 /* The address of the ALT_ECC_NANDR_RDATAECC1BUS register for the ALT_ECC_NANDR instance. */
3485 #define ALT_ECC_NANDR_ECC_RDATAECC1BUS_ADDR ALT_ECC_NANDR_RDATAECC1BUS_ADDR(ALT_ECC_NANDR_ADDR)
3486 /* The address of the ALT_ECC_NANDR_WDATAECC0BUS register for the ALT_ECC_NANDR instance. */
3487 #define ALT_ECC_NANDR_ECC_WDATAECC0BUS_ADDR ALT_ECC_NANDR_WDATAECC0BUS_ADDR(ALT_ECC_NANDR_ADDR)
3488 /* The address of the ALT_ECC_NANDR_WDATAECC1BUS register for the ALT_ECC_NANDR instance. */
3489 #define ALT_ECC_NANDR_ECC_WDATAECC1BUS_ADDR ALT_ECC_NANDR_WDATAECC1BUS_ADDR(ALT_ECC_NANDR_ADDR)
3490 /* The address of the ALT_ECC_NANDR_DBYTECTL register for the ALT_ECC_NANDR instance. */
3491 #define ALT_ECC_NANDR_ECC_DBYTECTL_ADDR ALT_ECC_NANDR_DBYTECTL_ADDR(ALT_ECC_NANDR_ADDR)
3492 /* The address of the ALT_ECC_NANDR_ACCCTL register for the ALT_ECC_NANDR instance. */
3493 #define ALT_ECC_NANDR_ECC_ACCCTL_ADDR ALT_ECC_NANDR_ACCCTL_ADDR(ALT_ECC_NANDR_ADDR)
3494 /* The address of the ALT_ECC_NANDR_STARTACC register for the ALT_ECC_NANDR instance. */
3495 #define ALT_ECC_NANDR_ECC_STARTACC_ADDR ALT_ECC_NANDR_STARTACC_ADDR(ALT_ECC_NANDR_ADDR)
3496 /* The address of the ALT_ECC_NANDR_WDCTL register for the ALT_ECC_NANDR instance. */
3497 #define ALT_ECC_NANDR_ECC_WDCTL_ADDR ALT_ECC_NANDR_WDCTL_ADDR(ALT_ECC_NANDR_ADDR)
3498 /* The address of the ALT_ECC_NANDR_SERRLKUPA0 register for the ALT_ECC_NANDR instance. */
3499 #define ALT_ECC_NANDR_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_SERRLKUPA0_OFST))
3500 /* The base address byte offset for the start of the ALT_ECC_NANDR component. */
3501 #define ALT_ECC_NANDR_OFST 0xff8c2400
3502 /* The start address of the ALT_ECC_NANDR component. */
3503 #define ALT_ECC_NANDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_NANDR_OFST))
3504 /* The lower bound address range of the ALT_ECC_NANDR component. */
3505 #define ALT_ECC_NANDR_LB_ADDR ALT_ECC_NANDR_ADDR
3506 /* The upper bound address range of the ALT_ECC_NANDR component. */
3507 #define ALT_ECC_NANDR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + 0x400) - 1))
3508 
3509 
3510 /*
3511  * Component Instance : ecc_nandw_ecc_registerBlock
3512  *
3513  * Instance ecc_nandw_ecc_registerBlock of component ALT_ECC_NANDW.
3514  *
3515  *
3516  */
3517 /* The address of the ALT_ECC_NANDW_IP_REV_ID register for the ALT_ECC_NANDW instance. */
3518 #define ALT_ECC_NANDW_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_IP_REV_ID_OFST))
3519 /* The address of the ALT_ECC_NANDW_CTL register for the ALT_ECC_NANDW instance. */
3520 #define ALT_ECC_NANDW_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_CTL_OFST))
3521 /* The address of the ALT_ECC_NANDW_INITSTAT register for the ALT_ECC_NANDW instance. */
3522 #define ALT_ECC_NANDW_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_INITSTAT_OFST))
3523 /* The address of the ALT_ECC_NANDW_ERRINTEN register for the ALT_ECC_NANDW instance. */
3524 #define ALT_ECC_NANDW_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_ERRINTEN_OFST))
3525 /* The address of the ALT_ECC_NANDW_ERRINTENS register for the ALT_ECC_NANDW instance. */
3526 #define ALT_ECC_NANDW_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_ERRINTENS_OFST))
3527 /* The address of the ALT_ECC_NANDW_ERRINTENR register for the ALT_ECC_NANDW instance. */
3528 #define ALT_ECC_NANDW_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_ERRINTENR_OFST))
3529 /* The address of the ALT_ECC_NANDW_INTMOD register for the ALT_ECC_NANDW instance. */
3530 #define ALT_ECC_NANDW_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_INTMOD_OFST))
3531 /* The address of the ALT_ECC_NANDW_INTSTAT register for the ALT_ECC_NANDW instance. */
3532 #define ALT_ECC_NANDW_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_INTSTAT_OFST))
3533 /* The address of the ALT_ECC_NANDW_INTTEST register for the ALT_ECC_NANDW instance. */
3534 #define ALT_ECC_NANDW_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_INTTEST_OFST))
3535 /* The address of the ALT_ECC_NANDW_MODSTAT register for the ALT_ECC_NANDW instance. */
3536 #define ALT_ECC_NANDW_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_MODSTAT_OFST))
3537 /* The address of the ALT_ECC_NANDW_DERRADDRA register for the ALT_ECC_NANDW instance. */
3538 #define ALT_ECC_NANDW_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_DERRADDRA_OFST))
3539 /* The address of the ALT_ECC_NANDW_SERRADDRA register for the ALT_ECC_NANDW instance. */
3540 #define ALT_ECC_NANDW_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_SERRADDRA_OFST))
3541 /* The address of the ALT_ECC_NANDW_SERRCNTREG register for the ALT_ECC_NANDW instance. */
3542 #define ALT_ECC_NANDW_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_SERRCNTREG_OFST))
3543 /* The address of the ALT_ECC_NANDW_ADDRBUS register for the ALT_ECC_NANDW instance. */
3544 #define ALT_ECC_NANDW_ECC_ADDRBUS_ADDR ALT_ECC_NANDW_ADDRBUS_ADDR(ALT_ECC_NANDW_ADDR)
3545 /* The address of the ALT_ECC_NANDW_RDATA0BUS register for the ALT_ECC_NANDW instance. */
3546 #define ALT_ECC_NANDW_ECC_RDATA0BUS_ADDR ALT_ECC_NANDW_RDATA0BUS_ADDR(ALT_ECC_NANDW_ADDR)
3547 /* The address of the ALT_ECC_NANDW_RDATA1BUS register for the ALT_ECC_NANDW instance. */
3548 #define ALT_ECC_NANDW_ECC_RDATA1BUS_ADDR ALT_ECC_NANDW_RDATA1BUS_ADDR(ALT_ECC_NANDW_ADDR)
3549 /* The address of the ALT_ECC_NANDW_RDATA2BUS register for the ALT_ECC_NANDW instance. */
3550 #define ALT_ECC_NANDW_ECC_RDATA2BUS_ADDR ALT_ECC_NANDW_RDATA2BUS_ADDR(ALT_ECC_NANDW_ADDR)
3551 /* The address of the ALT_ECC_NANDW_RDATA3BUS register for the ALT_ECC_NANDW instance. */
3552 #define ALT_ECC_NANDW_ECC_RDATA3BUS_ADDR ALT_ECC_NANDW_RDATA3BUS_ADDR(ALT_ECC_NANDW_ADDR)
3553 /* The address of the ALT_ECC_NANDW_WDATA0BUS register for the ALT_ECC_NANDW instance. */
3554 #define ALT_ECC_NANDW_ECC_WDATA0BUS_ADDR ALT_ECC_NANDW_WDATA0BUS_ADDR(ALT_ECC_NANDW_ADDR)
3555 /* The address of the ALT_ECC_NANDW_WDATA1BUS register for the ALT_ECC_NANDW instance. */
3556 #define ALT_ECC_NANDW_ECC_WDATA1BUS_ADDR ALT_ECC_NANDW_WDATA1BUS_ADDR(ALT_ECC_NANDW_ADDR)
3557 /* The address of the ALT_ECC_NANDW_WDATA2BUS register for the ALT_ECC_NANDW instance. */
3558 #define ALT_ECC_NANDW_ECC_WDATA2BUS_ADDR ALT_ECC_NANDW_WDATA2BUS_ADDR(ALT_ECC_NANDW_ADDR)
3559 /* The address of the ALT_ECC_NANDW_WDATA3BUS register for the ALT_ECC_NANDW instance. */
3560 #define ALT_ECC_NANDW_ECC_WDATA3BUS_ADDR ALT_ECC_NANDW_WDATA3BUS_ADDR(ALT_ECC_NANDW_ADDR)
3561 /* The address of the ALT_ECC_NANDW_RDATAECC0BUS register for the ALT_ECC_NANDW instance. */
3562 #define ALT_ECC_NANDW_ECC_RDATAECC0BUS_ADDR ALT_ECC_NANDW_RDATAECC0BUS_ADDR(ALT_ECC_NANDW_ADDR)
3563 /* The address of the ALT_ECC_NANDW_RDATAECC1BUS register for the ALT_ECC_NANDW instance. */
3564 #define ALT_ECC_NANDW_ECC_RDATAECC1BUS_ADDR ALT_ECC_NANDW_RDATAECC1BUS_ADDR(ALT_ECC_NANDW_ADDR)
3565 /* The address of the ALT_ECC_NANDW_WDATAECC0BUS register for the ALT_ECC_NANDW instance. */
3566 #define ALT_ECC_NANDW_ECC_WDATAECC0BUS_ADDR ALT_ECC_NANDW_WDATAECC0BUS_ADDR(ALT_ECC_NANDW_ADDR)
3567 /* The address of the ALT_ECC_NANDW_WDATAECC1BUS register for the ALT_ECC_NANDW instance. */
3568 #define ALT_ECC_NANDW_ECC_WDATAECC1BUS_ADDR ALT_ECC_NANDW_WDATAECC1BUS_ADDR(ALT_ECC_NANDW_ADDR)
3569 /* The address of the ALT_ECC_NANDW_DBYTECTL register for the ALT_ECC_NANDW instance. */
3570 #define ALT_ECC_NANDW_ECC_DBYTECTL_ADDR ALT_ECC_NANDW_DBYTECTL_ADDR(ALT_ECC_NANDW_ADDR)
3571 /* The address of the ALT_ECC_NANDW_ACCCTL register for the ALT_ECC_NANDW instance. */
3572 #define ALT_ECC_NANDW_ECC_ACCCTL_ADDR ALT_ECC_NANDW_ACCCTL_ADDR(ALT_ECC_NANDW_ADDR)
3573 /* The address of the ALT_ECC_NANDW_STARTACC register for the ALT_ECC_NANDW instance. */
3574 #define ALT_ECC_NANDW_ECC_STARTACC_ADDR ALT_ECC_NANDW_STARTACC_ADDR(ALT_ECC_NANDW_ADDR)
3575 /* The address of the ALT_ECC_NANDW_WDCTL register for the ALT_ECC_NANDW instance. */
3576 #define ALT_ECC_NANDW_ECC_WDCTL_ADDR ALT_ECC_NANDW_WDCTL_ADDR(ALT_ECC_NANDW_ADDR)
3577 /* The address of the ALT_ECC_NANDW_SERRLKUPA0 register for the ALT_ECC_NANDW instance. */
3578 #define ALT_ECC_NANDW_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_SERRLKUPA0_OFST))
3579 /* The base address byte offset for the start of the ALT_ECC_NANDW component. */
3580 #define ALT_ECC_NANDW_OFST 0xff8c2800
3581 /* The start address of the ALT_ECC_NANDW component. */
3582 #define ALT_ECC_NANDW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_NANDW_OFST))
3583 /* The lower bound address range of the ALT_ECC_NANDW component. */
3584 #define ALT_ECC_NANDW_LB_ADDR ALT_ECC_NANDW_ADDR
3585 /* The upper bound address range of the ALT_ECC_NANDW component. */
3586 #define ALT_ECC_NANDW_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + 0x400) - 1))
3587 
3588 
3589 /*
3590  * Component Instance : ecc_sdmmc_ecc_registerBlock
3591  *
3592  * Instance ecc_sdmmc_ecc_registerBlock of component ALT_ECC_SDMMC.
3593  *
3594  *
3595  */
3596 /* The address of the ALT_ECC_SDMMC_IP_REV_ID register for the ALT_ECC_SDMMC instance. */
3597 #define ALT_ECC_SDMMC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_IP_REV_ID_OFST))
3598 /* The address of the ALT_ECC_SDMMC_CTL register for the ALT_ECC_SDMMC instance. */
3599 #define ALT_ECC_SDMMC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_CTL_OFST))
3600 /* The address of the ALT_ECC_SDMMC_INITSTAT register for the ALT_ECC_SDMMC instance. */
3601 #define ALT_ECC_SDMMC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_INITSTAT_OFST))
3602 /* The address of the ALT_ECC_SDMMC_ERRINTEN register for the ALT_ECC_SDMMC instance. */
3603 #define ALT_ECC_SDMMC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_ERRINTEN_OFST))
3604 /* The address of the ALT_ECC_SDMMC_ERRINTENS register for the ALT_ECC_SDMMC instance. */
3605 #define ALT_ECC_SDMMC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_ERRINTENS_OFST))
3606 /* The address of the ALT_ECC_SDMMC_ERRINTENR register for the ALT_ECC_SDMMC instance. */
3607 #define ALT_ECC_SDMMC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_ERRINTENR_OFST))
3608 /* The address of the ALT_ECC_SDMMC_INTMOD register for the ALT_ECC_SDMMC instance. */
3609 #define ALT_ECC_SDMMC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_INTMOD_OFST))
3610 /* The address of the ALT_ECC_SDMMC_INTSTAT register for the ALT_ECC_SDMMC instance. */
3611 #define ALT_ECC_SDMMC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_INTSTAT_OFST))
3612 /* The address of the ALT_ECC_SDMMC_INTTEST register for the ALT_ECC_SDMMC instance. */
3613 #define ALT_ECC_SDMMC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_INTTEST_OFST))
3614 /* The address of the ALT_ECC_SDMMC_MODSTAT register for the ALT_ECC_SDMMC instance. */
3615 #define ALT_ECC_SDMMC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_MODSTAT_OFST))
3616 /* The address of the ALT_ECC_SDMMC_DERRADDRA register for the ALT_ECC_SDMMC instance. */
3617 #define ALT_ECC_SDMMC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_DERRADDRA_OFST))
3618 /* The address of the ALT_ECC_SDMMC_SERRADDRA register for the ALT_ECC_SDMMC instance. */
3619 #define ALT_ECC_SDMMC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_SERRADDRA_OFST))
3620 /* The address of the ALT_ECC_SDMMC_DERRADDRB register for the ALT_ECC_SDMMC instance. */
3621 #define ALT_ECC_SDMMC_DERRADDRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_DERRADDRB_OFST))
3622 /* The address of the ALT_ECC_SDMMC_SERRADDRB register for the ALT_ECC_SDMMC instance. */
3623 #define ALT_ECC_SDMMC_SERRADDRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_SERRADDRB_OFST))
3624 /* The address of the ALT_ECC_SDMMC_SERRCNTREG register for the ALT_ECC_SDMMC instance. */
3625 #define ALT_ECC_SDMMC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_SERRCNTREG_OFST))
3626 /* The address of the ALT_ECC_SDMMC_ADDRBUS register for the ALT_ECC_SDMMC instance. */
3627 #define ALT_ECC_SDMMC_ECC_ADDRBUS_ADDR ALT_ECC_SDMMC_ADDRBUS_ADDR(ALT_ECC_SDMMC_ADDR)
3628 /* The address of the ALT_ECC_SDMMC_RDATA0BUS register for the ALT_ECC_SDMMC instance. */
3629 #define ALT_ECC_SDMMC_ECC_RDATA0BUS_ADDR ALT_ECC_SDMMC_RDATA0BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3630 /* The address of the ALT_ECC_SDMMC_RDATA1BUS register for the ALT_ECC_SDMMC instance. */
3631 #define ALT_ECC_SDMMC_ECC_RDATA1BUS_ADDR ALT_ECC_SDMMC_RDATA1BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3632 /* The address of the ALT_ECC_SDMMC_RDATA2BUS register for the ALT_ECC_SDMMC instance. */
3633 #define ALT_ECC_SDMMC_ECC_RDATA2BUS_ADDR ALT_ECC_SDMMC_RDATA2BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3634 /* The address of the ALT_ECC_SDMMC_RDATA3BUS register for the ALT_ECC_SDMMC instance. */
3635 #define ALT_ECC_SDMMC_ECC_RDATA3BUS_ADDR ALT_ECC_SDMMC_RDATA3BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3636 /* The address of the ALT_ECC_SDMMC_WDATA0BUS register for the ALT_ECC_SDMMC instance. */
3637 #define ALT_ECC_SDMMC_ECC_WDATA0BUS_ADDR ALT_ECC_SDMMC_WDATA0BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3638 /* The address of the ALT_ECC_SDMMC_WDATA1BUS register for the ALT_ECC_SDMMC instance. */
3639 #define ALT_ECC_SDMMC_ECC_WDATA1BUS_ADDR ALT_ECC_SDMMC_WDATA1BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3640 /* The address of the ALT_ECC_SDMMC_WDATA2BUS register for the ALT_ECC_SDMMC instance. */
3641 #define ALT_ECC_SDMMC_ECC_WDATA2BUS_ADDR ALT_ECC_SDMMC_WDATA2BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3642 /* The address of the ALT_ECC_SDMMC_WDATA3BUS register for the ALT_ECC_SDMMC instance. */
3643 #define ALT_ECC_SDMMC_ECC_WDATA3BUS_ADDR ALT_ECC_SDMMC_WDATA3BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3644 /* The address of the ALT_ECC_SDMMC_RDATAECC0BUS register for the ALT_ECC_SDMMC instance. */
3645 #define ALT_ECC_SDMMC_ECC_RDATAECC0BUS_ADDR ALT_ECC_SDMMC_RDATAECC0BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3646 /* The address of the ALT_ECC_SDMMC_RDATAECC1BUS register for the ALT_ECC_SDMMC instance. */
3647 #define ALT_ECC_SDMMC_ECC_RDATAECC1BUS_ADDR ALT_ECC_SDMMC_RDATAECC1BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3648 /* The address of the ALT_ECC_SDMMC_WDATAECC0BUS register for the ALT_ECC_SDMMC instance. */
3649 #define ALT_ECC_SDMMC_ECC_WDATAECC0BUS_ADDR ALT_ECC_SDMMC_WDATAECC0BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3650 /* The address of the ALT_ECC_SDMMC_WDATAECC1BUS register for the ALT_ECC_SDMMC instance. */
3651 #define ALT_ECC_SDMMC_ECC_WDATAECC1BUS_ADDR ALT_ECC_SDMMC_WDATAECC1BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3652 /* The address of the ALT_ECC_SDMMC_DBYTECTL register for the ALT_ECC_SDMMC instance. */
3653 #define ALT_ECC_SDMMC_ECC_DBYTECTL_ADDR ALT_ECC_SDMMC_DBYTECTL_ADDR(ALT_ECC_SDMMC_ADDR)
3654 /* The address of the ALT_ECC_SDMMC_ACCCTL register for the ALT_ECC_SDMMC instance. */
3655 #define ALT_ECC_SDMMC_ECC_ACCCTL_ADDR ALT_ECC_SDMMC_ACCCTL_ADDR(ALT_ECC_SDMMC_ADDR)
3656 /* The address of the ALT_ECC_SDMMC_STARTACC register for the ALT_ECC_SDMMC instance. */
3657 #define ALT_ECC_SDMMC_ECC_STARTACC_ADDR ALT_ECC_SDMMC_STARTACC_ADDR(ALT_ECC_SDMMC_ADDR)
3658 /* The address of the ALT_ECC_SDMMC_WDCTL register for the ALT_ECC_SDMMC instance. */
3659 #define ALT_ECC_SDMMC_ECC_WDCTL_ADDR ALT_ECC_SDMMC_WDCTL_ADDR(ALT_ECC_SDMMC_ADDR)
3660 /* The address of the ALT_ECC_SDMMC_SERRLKUPA0 register for the ALT_ECC_SDMMC instance. */
3661 #define ALT_ECC_SDMMC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_SERRLKUPA0_OFST))
3662 /* The address of the ALT_ECC_SDMMC_SERRLKUPB0 register for the ALT_ECC_SDMMC instance. */
3663 #define ALT_ECC_SDMMC_SERRLKUPB0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_SERRLKUPB0_OFST))
3664 /* The base address byte offset for the start of the ALT_ECC_SDMMC component. */
3665 #define ALT_ECC_SDMMC_OFST 0xff8c2c00
3666 /* The start address of the ALT_ECC_SDMMC component. */
3667 #define ALT_ECC_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_SDMMC_OFST))
3668 /* The lower bound address range of the ALT_ECC_SDMMC component. */
3669 #define ALT_ECC_SDMMC_LB_ADDR ALT_ECC_SDMMC_ADDR
3670 /* The upper bound address range of the ALT_ECC_SDMMC component. */
3671 #define ALT_ECC_SDMMC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + 0x400) - 1))
3672 
3673 
3674 /*
3675  * Component Instance : ecc_onchip_ram_ecc_registerBlock
3676  *
3677  * Instance ecc_onchip_ram_ecc_registerBlock of component ALT_ECC_OCRAM_ECC.
3678  *
3679  *
3680  */
3681 /* The address of the ALT_ECC_OCRAM_ECC_IP_REV_ID register for the ALT_ECC_OCRAM_ECC instance. */
3682 #define ALT_ECC_OCRAM_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_IP_REV_ID_OFST))
3683 /* The address of the ALT_ECC_OCRAM_ECC_CTL register for the ALT_ECC_OCRAM_ECC instance. */
3684 #define ALT_ECC_OCRAM_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_CTL_OFST))
3685 /* The address of the ALT_ECC_OCRAM_ECC_INITSTAT register for the ALT_ECC_OCRAM_ECC instance. */
3686 #define ALT_ECC_OCRAM_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_INITSTAT_OFST))
3687 /* The address of the ALT_ECC_OCRAM_ECC_ERRINTEN register for the ALT_ECC_OCRAM_ECC instance. */
3688 #define ALT_ECC_OCRAM_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ERRINTEN_OFST))
3689 /* The address of the ALT_ECC_OCRAM_ECC_ERRINTENS register for the ALT_ECC_OCRAM_ECC instance. */
3690 #define ALT_ECC_OCRAM_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ERRINTENS_OFST))
3691 /* The address of the ALT_ECC_OCRAM_ECC_ERRINTENR register for the ALT_ECC_OCRAM_ECC instance. */
3692 #define ALT_ECC_OCRAM_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ERRINTENR_OFST))
3693 /* The address of the ALT_ECC_OCRAM_ECC_INTMOD register for the ALT_ECC_OCRAM_ECC instance. */
3694 #define ALT_ECC_OCRAM_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_INTMOD_OFST))
3695 /* The address of the ALT_ECC_OCRAM_ECC_INTSTAT register for the ALT_ECC_OCRAM_ECC instance. */
3696 #define ALT_ECC_OCRAM_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_INTSTAT_OFST))
3697 /* The address of the ALT_ECC_OCRAM_ECC_INTTEST register for the ALT_ECC_OCRAM_ECC instance. */
3698 #define ALT_ECC_OCRAM_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_INTTEST_OFST))
3699 /* The address of the ALT_ECC_OCRAM_ECC_MODSTAT register for the ALT_ECC_OCRAM_ECC instance. */
3700 #define ALT_ECC_OCRAM_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_MODSTAT_OFST))
3701 /* The address of the ALT_ECC_OCRAM_ECC_DERRADDRA register for the ALT_ECC_OCRAM_ECC instance. */
3702 #define ALT_ECC_OCRAM_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_DERRADDRA_OFST))
3703 /* The address of the ALT_ECC_OCRAM_ECC_SERRADDRA register for the ALT_ECC_OCRAM_ECC instance. */
3704 #define ALT_ECC_OCRAM_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_SERRADDRA_OFST))
3705 /* The address of the ALT_ECC_OCRAM_ECC_SERRCNTREG register for the ALT_ECC_OCRAM_ECC instance. */
3706 #define ALT_ECC_OCRAM_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_SERRCNTREG_OFST))
3707 /* The address of the ALT_ECC_OCRAM_ECC_ECC_ADDRBUS register for the ALT_ECC_OCRAM_ECC instance. */
3708 #define ALT_ECC_OCRAM_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_ADDRBUS_OFST))
3709 /* The address of the ALT_ECC_OCRAM_ECC_ECC_RDATA0BUS register for the ALT_ECC_OCRAM_ECC instance. */
3710 #define ALT_ECC_OCRAM_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_RDATA0BUS_OFST))
3711 /* The address of the ALT_ECC_OCRAM_ECC_ECC_RDATA1BUS register for the ALT_ECC_OCRAM_ECC instance. */
3712 #define ALT_ECC_OCRAM_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_RDATA1BUS_OFST))
3713 /* The address of the ALT_ECC_OCRAM_ECC_ECC_RDATA2BUS register for the ALT_ECC_OCRAM_ECC instance. */
3714 #define ALT_ECC_OCRAM_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_RDATA2BUS_OFST))
3715 /* The address of the ALT_ECC_OCRAM_ECC_ECC_RDATA3BUS register for the ALT_ECC_OCRAM_ECC instance. */
3716 #define ALT_ECC_OCRAM_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_RDATA3BUS_OFST))
3717 /* The address of the ALT_ECC_OCRAM_ECC_ECC_WDATA0BUS register for the ALT_ECC_OCRAM_ECC instance. */
3718 #define ALT_ECC_OCRAM_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDATA0BUS_OFST))
3719 /* The address of the ALT_ECC_OCRAM_ECC_ECC_WDATA1BUS register for the ALT_ECC_OCRAM_ECC instance. */
3720 #define ALT_ECC_OCRAM_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDATA1BUS_OFST))
3721 /* The address of the ALT_ECC_OCRAM_ECC_ECC_WDATA2BUS register for the ALT_ECC_OCRAM_ECC instance. */
3722 #define ALT_ECC_OCRAM_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDATA2BUS_OFST))
3723 /* The address of the ALT_ECC_OCRAM_ECC_ECC_WDATA3BUS register for the ALT_ECC_OCRAM_ECC instance. */
3724 #define ALT_ECC_OCRAM_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDATA3BUS_OFST))
3725 /* The address of the ALT_ECC_OCRAM_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_OCRAM_ECC instance. */
3726 #define ALT_ECC_OCRAM_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_RDATAECC0BUS_OFST))
3727 /* The address of the ALT_ECC_OCRAM_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_OCRAM_ECC instance. */
3728 #define ALT_ECC_OCRAM_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_RDATAECC1BUS_OFST))
3729 /* The address of the ALT_ECC_OCRAM_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_OCRAM_ECC instance. */
3730 #define ALT_ECC_OCRAM_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDATAECC0BUS_OFST))
3731 /* The address of the ALT_ECC_OCRAM_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_OCRAM_ECC instance. */
3732 #define ALT_ECC_OCRAM_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDATAECC1BUS_OFST))
3733 /* The address of the ALT_ECC_OCRAM_ECC_ECC_DBYTECTL register for the ALT_ECC_OCRAM_ECC instance. */
3734 #define ALT_ECC_OCRAM_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_DBYTECTL_OFST))
3735 /* The address of the ALT_ECC_OCRAM_ECC_ECC_ACCCTL register for the ALT_ECC_OCRAM_ECC instance. */
3736 #define ALT_ECC_OCRAM_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_ACCCTL_OFST))
3737 /* The address of the ALT_ECC_OCRAM_ECC_ECC_STARTACC register for the ALT_ECC_OCRAM_ECC instance. */
3738 #define ALT_ECC_OCRAM_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_STARTACC_OFST))
3739 /* The address of the ALT_ECC_OCRAM_ECC_ECC_WDCTL register for the ALT_ECC_OCRAM_ECC instance. */
3740 #define ALT_ECC_OCRAM_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDCTL_OFST))
3741 /* The address of the ALT_ECC_OCRAM_ECC_SERRLKUPA0 register for the ALT_ECC_OCRAM_ECC instance. */
3742 #define ALT_ECC_OCRAM_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_SERRLKUPA0_OFST))
3743 /* The base address byte offset for the start of the ALT_ECC_OCRAM_ECC component. */
3744 #define ALT_ECC_OCRAM_ECC_OFST 0xff8c3000
3745 /* The start address of the ALT_ECC_OCRAM_ECC component. */
3746 #define ALT_ECC_OCRAM_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_OCRAM_ECC_OFST))
3747 /* The lower bound address range of the ALT_ECC_OCRAM_ECC component. */
3748 #define ALT_ECC_OCRAM_ECC_LB_ADDR ALT_ECC_OCRAM_ECC_ADDR
3749 /* The upper bound address range of the ALT_ECC_OCRAM_ECC component. */
3750 #define ALT_ECC_OCRAM_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + 0x400) - 1))
3751 
3752 
3753 /*
3754  * Component Instance : ecc_dmac_ecc_registerBlock
3755  *
3756  * Instance ecc_dmac_ecc_registerBlock of component ALT_ECC_DMAC.
3757  *
3758  *
3759  */
3760 /* The address of the ALT_ECC_DMAC_IP_REV_ID register for the ALT_ECC_DMAC instance. */
3761 #define ALT_ECC_DMAC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_IP_REV_ID_OFST))
3762 /* The address of the ALT_ECC_DMAC_CTL register for the ALT_ECC_DMAC instance. */
3763 #define ALT_ECC_DMAC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_CTL_OFST))
3764 /* The address of the ALT_ECC_DMAC_INITSTAT register for the ALT_ECC_DMAC instance. */
3765 #define ALT_ECC_DMAC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_INITSTAT_OFST))
3766 /* The address of the ALT_ECC_DMAC_ERRINTEN register for the ALT_ECC_DMAC instance. */
3767 #define ALT_ECC_DMAC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_ERRINTEN_OFST))
3768 /* The address of the ALT_ECC_DMAC_ERRINTENS register for the ALT_ECC_DMAC instance. */
3769 #define ALT_ECC_DMAC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_ERRINTENS_OFST))
3770 /* The address of the ALT_ECC_DMAC_ERRINTENR register for the ALT_ECC_DMAC instance. */
3771 #define ALT_ECC_DMAC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_ERRINTENR_OFST))
3772 /* The address of the ALT_ECC_DMAC_INTMOD register for the ALT_ECC_DMAC instance. */
3773 #define ALT_ECC_DMAC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_INTMOD_OFST))
3774 /* The address of the ALT_ECC_DMAC_INTSTAT register for the ALT_ECC_DMAC instance. */
3775 #define ALT_ECC_DMAC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_INTSTAT_OFST))
3776 /* The address of the ALT_ECC_DMAC_INTTEST register for the ALT_ECC_DMAC instance. */
3777 #define ALT_ECC_DMAC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_INTTEST_OFST))
3778 /* The address of the ALT_ECC_DMAC_MODSTAT register for the ALT_ECC_DMAC instance. */
3779 #define ALT_ECC_DMAC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_MODSTAT_OFST))
3780 /* The address of the ALT_ECC_DMAC_DERRADDRA register for the ALT_ECC_DMAC instance. */
3781 #define ALT_ECC_DMAC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_DERRADDRA_OFST))
3782 /* The address of the ALT_ECC_DMAC_SERRADDRA register for the ALT_ECC_DMAC instance. */
3783 #define ALT_ECC_DMAC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_SERRADDRA_OFST))
3784 /* The address of the ALT_ECC_DMAC_SERRCNTREG register for the ALT_ECC_DMAC instance. */
3785 #define ALT_ECC_DMAC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_SERRCNTREG_OFST))
3786 /* The address of the ALT_ECC_DMAC_ADDRBUS register for the ALT_ECC_DMAC instance. */
3787 #define ALT_ECC_DMAC_ECC_ADDRBUS_ADDR ALT_ECC_DMAC_ADDRBUS_ADDR(ALT_ECC_DMAC_ADDR)
3788 /* The address of the ALT_ECC_DMAC_RDATA0BUS register for the ALT_ECC_DMAC instance. */
3789 #define ALT_ECC_DMAC_ECC_RDATA0BUS_ADDR ALT_ECC_DMAC_RDATA0BUS_ADDR(ALT_ECC_DMAC_ADDR)
3790 /* The address of the ALT_ECC_DMAC_RDATA1BUS register for the ALT_ECC_DMAC instance. */
3791 #define ALT_ECC_DMAC_ECC_RDATA1BUS_ADDR ALT_ECC_DMAC_RDATA1BUS_ADDR(ALT_ECC_DMAC_ADDR)
3792 /* The address of the ALT_ECC_DMAC_RDATA2BUS register for the ALT_ECC_DMAC instance. */
3793 #define ALT_ECC_DMAC_ECC_RDATA2BUS_ADDR ALT_ECC_DMAC_RDATA2BUS_ADDR(ALT_ECC_DMAC_ADDR)
3794 /* The address of the ALT_ECC_DMAC_RDATA3BUS register for the ALT_ECC_DMAC instance. */
3795 #define ALT_ECC_DMAC_ECC_RDATA3BUS_ADDR ALT_ECC_DMAC_RDATA3BUS_ADDR(ALT_ECC_DMAC_ADDR)
3796 /* The address of the ALT_ECC_DMAC_WDATA0BUS register for the ALT_ECC_DMAC instance. */
3797 #define ALT_ECC_DMAC_ECC_WDATA0BUS_ADDR ALT_ECC_DMAC_WDATA0BUS_ADDR(ALT_ECC_DMAC_ADDR)
3798 /* The address of the ALT_ECC_DMAC_WDATA1BUS register for the ALT_ECC_DMAC instance. */
3799 #define ALT_ECC_DMAC_ECC_WDATA1BUS_ADDR ALT_ECC_DMAC_WDATA1BUS_ADDR(ALT_ECC_DMAC_ADDR)
3800 /* The address of the ALT_ECC_DMAC_WDATA2BUS register for the ALT_ECC_DMAC instance. */
3801 #define ALT_ECC_DMAC_ECC_WDATA2BUS_ADDR ALT_ECC_DMAC_WDATA2BUS_ADDR(ALT_ECC_DMAC_ADDR)
3802 /* The address of the ALT_ECC_DMAC_WDATA3BUS register for the ALT_ECC_DMAC instance. */
3803 #define ALT_ECC_DMAC_ECC_WDATA3BUS_ADDR ALT_ECC_DMAC_WDATA3BUS_ADDR(ALT_ECC_DMAC_ADDR)
3804 /* The address of the ALT_ECC_DMAC_RDATAECC0BUS register for the ALT_ECC_DMAC instance. */
3805 #define ALT_ECC_DMAC_ECC_RDATAECC0BUS_ADDR ALT_ECC_DMAC_RDATAECC0BUS_ADDR(ALT_ECC_DMAC_ADDR)
3806 /* The address of the ALT_ECC_DMAC_RDATAECC1BUS register for the ALT_ECC_DMAC instance. */
3807 #define ALT_ECC_DMAC_ECC_RDATAECC1BUS_ADDR ALT_ECC_DMAC_RDATAECC1BUS_ADDR(ALT_ECC_DMAC_ADDR)
3808 /* The address of the ALT_ECC_DMAC_WDATAECC0BUS register for the ALT_ECC_DMAC instance. */
3809 #define ALT_ECC_DMAC_ECC_WDATAECC0BUS_ADDR ALT_ECC_DMAC_WDATAECC0BUS_ADDR(ALT_ECC_DMAC_ADDR)
3810 /* The address of the ALT_ECC_DMAC_WDATAECC1BUS register for the ALT_ECC_DMAC instance. */
3811 #define ALT_ECC_DMAC_ECC_WDATAECC1BUS_ADDR ALT_ECC_DMAC_WDATAECC1BUS_ADDR(ALT_ECC_DMAC_ADDR)
3812 /* The address of the ALT_ECC_DMAC_DBYTECTL register for the ALT_ECC_DMAC instance. */
3813 #define ALT_ECC_DMAC_ECC_DBYTECTL_ADDR ALT_ECC_DMAC_DBYTECTL_ADDR(ALT_ECC_DMAC_ADDR)
3814 /* The address of the ALT_ECC_DMAC_ACCCTL register for the ALT_ECC_DMAC instance. */
3815 #define ALT_ECC_DMAC_ECC_ACCCTL_ADDR ALT_ECC_DMAC_ACCCTL_ADDR(ALT_ECC_DMAC_ADDR)
3816 /* The address of the ALT_ECC_DMAC_STARTACC register for the ALT_ECC_DMAC instance. */
3817 #define ALT_ECC_DMAC_ECC_STARTACC_ADDR ALT_ECC_DMAC_STARTACC_ADDR(ALT_ECC_DMAC_ADDR)
3818 /* The address of the ALT_ECC_DMAC_WDCTL register for the ALT_ECC_DMAC instance. */
3819 #define ALT_ECC_DMAC_ECC_WDCTL_ADDR ALT_ECC_DMAC_WDCTL_ADDR(ALT_ECC_DMAC_ADDR)
3820 /* The address of the ALT_ECC_DMAC_SERRLKUPA0 register for the ALT_ECC_DMAC instance. */
3821 #define ALT_ECC_DMAC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_SERRLKUPA0_OFST))
3822 /* The base address byte offset for the start of the ALT_ECC_DMAC component. */
3823 #define ALT_ECC_DMAC_OFST 0xff8c8000
3824 /* The start address of the ALT_ECC_DMAC component. */
3825 #define ALT_ECC_DMAC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_DMAC_OFST))
3826 /* The lower bound address range of the ALT_ECC_DMAC component. */
3827 #define ALT_ECC_DMAC_LB_ADDR ALT_ECC_DMAC_ADDR
3828 /* The upper bound address range of the ALT_ECC_DMAC component. */
3829 #define ALT_ECC_DMAC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + 0x400) - 1))
3830 
3831 
3832 /*
3833  * Component Instance : ecc_qspi_ecc_registerBlock
3834  *
3835  * Instance ecc_qspi_ecc_registerBlock of component ALT_ECC_QSPI.
3836  *
3837  *
3838  */
3839 /* The address of the ALT_ECC_QSPI_IP_REV_ID register for the ALT_ECC_QSPI instance. */
3840 #define ALT_ECC_QSPI_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_IP_REV_ID_OFST))
3841 /* The address of the ALT_ECC_QSPI_CTL register for the ALT_ECC_QSPI instance. */
3842 #define ALT_ECC_QSPI_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_CTL_OFST))
3843 /* The address of the ALT_ECC_QSPI_INITSTAT register for the ALT_ECC_QSPI instance. */
3844 #define ALT_ECC_QSPI_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_INITSTAT_OFST))
3845 /* The address of the ALT_ECC_QSPI_ERRINTEN register for the ALT_ECC_QSPI instance. */
3846 #define ALT_ECC_QSPI_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_ERRINTEN_OFST))
3847 /* The address of the ALT_ECC_QSPI_ERRINTENS register for the ALT_ECC_QSPI instance. */
3848 #define ALT_ECC_QSPI_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_ERRINTENS_OFST))
3849 /* The address of the ALT_ECC_QSPI_ERRINTENR register for the ALT_ECC_QSPI instance. */
3850 #define ALT_ECC_QSPI_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_ERRINTENR_OFST))
3851 /* The address of the ALT_ECC_QSPI_INTMOD register for the ALT_ECC_QSPI instance. */
3852 #define ALT_ECC_QSPI_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_INTMOD_OFST))
3853 /* The address of the ALT_ECC_QSPI_INTSTAT register for the ALT_ECC_QSPI instance. */
3854 #define ALT_ECC_QSPI_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_INTSTAT_OFST))
3855 /* The address of the ALT_ECC_QSPI_INTTEST register for the ALT_ECC_QSPI instance. */
3856 #define ALT_ECC_QSPI_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_INTTEST_OFST))
3857 /* The address of the ALT_ECC_QSPI_MODSTAT register for the ALT_ECC_QSPI instance. */
3858 #define ALT_ECC_QSPI_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_MODSTAT_OFST))
3859 /* The address of the ALT_ECC_QSPI_DERRADDRA register for the ALT_ECC_QSPI instance. */
3860 #define ALT_ECC_QSPI_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_DERRADDRA_OFST))
3861 /* The address of the ALT_ECC_QSPI_SERRADDRA register for the ALT_ECC_QSPI instance. */
3862 #define ALT_ECC_QSPI_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_SERRADDRA_OFST))
3863 /* The address of the ALT_ECC_QSPI_SERRCNTREG register for the ALT_ECC_QSPI instance. */
3864 #define ALT_ECC_QSPI_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_SERRCNTREG_OFST))
3865 /* The address of the ALT_ECC_QSPI_ADDRBUS register for the ALT_ECC_QSPI instance. */
3866 #define ALT_ECC_QSPI_ECC_ADDRBUS_ADDR ALT_ECC_QSPI_ADDRBUS_ADDR(ALT_ECC_QSPI_ADDR)
3867 /* The address of the ALT_ECC_QSPI_RDATA0BUS register for the ALT_ECC_QSPI instance. */
3868 #define ALT_ECC_QSPI_ECC_RDATA0BUS_ADDR ALT_ECC_QSPI_RDATA0BUS_ADDR(ALT_ECC_QSPI_ADDR)
3869 /* The address of the ALT_ECC_QSPI_RDATA1BUS register for the ALT_ECC_QSPI instance. */
3870 #define ALT_ECC_QSPI_ECC_RDATA1BUS_ADDR ALT_ECC_QSPI_RDATA1BUS_ADDR(ALT_ECC_QSPI_ADDR)
3871 /* The address of the ALT_ECC_QSPI_RDATA2BUS register for the ALT_ECC_QSPI instance. */
3872 #define ALT_ECC_QSPI_ECC_RDATA2BUS_ADDR ALT_ECC_QSPI_RDATA2BUS_ADDR(ALT_ECC_QSPI_ADDR)
3873 /* The address of the ALT_ECC_QSPI_RDATA3BUS register for the ALT_ECC_QSPI instance. */
3874 #define ALT_ECC_QSPI_ECC_RDATA3BUS_ADDR ALT_ECC_QSPI_RDATA3BUS_ADDR(ALT_ECC_QSPI_ADDR)
3875 /* The address of the ALT_ECC_QSPI_WDATA0BUS register for the ALT_ECC_QSPI instance. */
3876 #define ALT_ECC_QSPI_ECC_WDATA0BUS_ADDR ALT_ECC_QSPI_WDATA0BUS_ADDR(ALT_ECC_QSPI_ADDR)
3877 /* The address of the ALT_ECC_QSPI_WDATA1BUS register for the ALT_ECC_QSPI instance. */
3878 #define ALT_ECC_QSPI_ECC_WDATA1BUS_ADDR ALT_ECC_QSPI_WDATA1BUS_ADDR(ALT_ECC_QSPI_ADDR)
3879 /* The address of the ALT_ECC_QSPI_WDATA2BUS register for the ALT_ECC_QSPI instance. */
3880 #define ALT_ECC_QSPI_ECC_WDATA2BUS_ADDR ALT_ECC_QSPI_WDATA2BUS_ADDR(ALT_ECC_QSPI_ADDR)
3881 /* The address of the ALT_ECC_QSPI_WDATA3BUS register for the ALT_ECC_QSPI instance. */
3882 #define ALT_ECC_QSPI_ECC_WDATA3BUS_ADDR ALT_ECC_QSPI_WDATA3BUS_ADDR(ALT_ECC_QSPI_ADDR)
3883 /* The address of the ALT_ECC_QSPI_RDATAECC0BUS register for the ALT_ECC_QSPI instance. */
3884 #define ALT_ECC_QSPI_ECC_RDATAECC0BUS_ADDR ALT_ECC_QSPI_RDATAECC0BUS_ADDR(ALT_ECC_QSPI_ADDR)
3885 /* The address of the ALT_ECC_QSPI_RDATAECC1BUS register for the ALT_ECC_QSPI instance. */
3886 #define ALT_ECC_QSPI_ECC_RDATAECC1BUS_ADDR ALT_ECC_QSPI_RDATAECC1BUS_ADDR(ALT_ECC_QSPI_ADDR)
3887 /* The address of the ALT_ECC_QSPI_WDATAECC0BUS register for the ALT_ECC_QSPI instance. */
3888 #define ALT_ECC_QSPI_ECC_WDATAECC0BUS_ADDR ALT_ECC_QSPI_WDATAECC0BUS_ADDR(ALT_ECC_QSPI_ADDR)
3889 /* The address of the ALT_ECC_QSPI_WDATAECC1BUS register for the ALT_ECC_QSPI instance. */
3890 #define ALT_ECC_QSPI_ECC_WDATAECC1BUS_ADDR ALT_ECC_QSPI_WDATAECC1BUS_ADDR(ALT_ECC_QSPI_ADDR)
3891 /* The address of the ALT_ECC_QSPI_DBYTECTL register for the ALT_ECC_QSPI instance. */
3892 #define ALT_ECC_QSPI_ECC_DBYTECTL_ADDR ALT_ECC_QSPI_DBYTECTL_ADDR(ALT_ECC_QSPI_ADDR)
3893 /* The address of the ALT_ECC_QSPI_ACCCTL register for the ALT_ECC_QSPI instance. */
3894 #define ALT_ECC_QSPI_ECC_ACCCTL_ADDR ALT_ECC_QSPI_ACCCTL_ADDR(ALT_ECC_QSPI_ADDR)
3895 /* The address of the ALT_ECC_QSPI_STARTACC register for the ALT_ECC_QSPI instance. */
3896 #define ALT_ECC_QSPI_ECC_STARTACC_ADDR ALT_ECC_QSPI_STARTACC_ADDR(ALT_ECC_QSPI_ADDR)
3897 /* The address of the ALT_ECC_QSPI_WDCTL register for the ALT_ECC_QSPI instance. */
3898 #define ALT_ECC_QSPI_ECC_WDCTL_ADDR ALT_ECC_QSPI_WDCTL_ADDR(ALT_ECC_QSPI_ADDR)
3899 /* The address of the ALT_ECC_QSPI_SERRLKUPA0 register for the ALT_ECC_QSPI instance. */
3900 #define ALT_ECC_QSPI_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_SERRLKUPA0_OFST))
3901 /* The base address byte offset for the start of the ALT_ECC_QSPI component. */
3902 #define ALT_ECC_QSPI_OFST 0xff8c8400
3903 /* The start address of the ALT_ECC_QSPI component. */
3904 #define ALT_ECC_QSPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_QSPI_OFST))
3905 /* The lower bound address range of the ALT_ECC_QSPI component. */
3906 #define ALT_ECC_QSPI_LB_ADDR ALT_ECC_QSPI_ADDR
3907 /* The upper bound address range of the ALT_ECC_QSPI component. */
3908 #define ALT_ECC_QSPI_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + 0x400) - 1))
3909 
3910 
3911 /*
3912  * Component Instance : ecc_otg0_ecc_registerBlock
3913  *
3914  * Instance ecc_otg0_ecc_registerBlock of component ALT_ECC_OTG0_ECC.
3915  *
3916  *
3917  */
3918 /* The address of the ALT_ECC_OTG0_ECC_IP_REV_ID register for the ALT_ECC_OTG0_ECC instance. */
3919 #define ALT_ECC_OTG0_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_IP_REV_ID_OFST))
3920 /* The address of the ALT_ECC_OTG0_ECC_CTL register for the ALT_ECC_OTG0_ECC instance. */
3921 #define ALT_ECC_OTG0_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_CTL_OFST))
3922 /* The address of the ALT_ECC_OTG0_ECC_INITSTAT register for the ALT_ECC_OTG0_ECC instance. */
3923 #define ALT_ECC_OTG0_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_INITSTAT_OFST))
3924 /* The address of the ALT_ECC_OTG0_ECC_ERRINTEN register for the ALT_ECC_OTG0_ECC instance. */
3925 #define ALT_ECC_OTG0_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ERRINTEN_OFST))
3926 /* The address of the ALT_ECC_OTG0_ECC_ERRINTENS register for the ALT_ECC_OTG0_ECC instance. */
3927 #define ALT_ECC_OTG0_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ERRINTENS_OFST))
3928 /* The address of the ALT_ECC_OTG0_ECC_ERRINTENR register for the ALT_ECC_OTG0_ECC instance. */
3929 #define ALT_ECC_OTG0_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ERRINTENR_OFST))
3930 /* The address of the ALT_ECC_OTG0_ECC_INTMOD register for the ALT_ECC_OTG0_ECC instance. */
3931 #define ALT_ECC_OTG0_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_INTMOD_OFST))
3932 /* The address of the ALT_ECC_OTG0_ECC_INTSTAT register for the ALT_ECC_OTG0_ECC instance. */
3933 #define ALT_ECC_OTG0_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_INTSTAT_OFST))
3934 /* The address of the ALT_ECC_OTG0_ECC_INTTEST register for the ALT_ECC_OTG0_ECC instance. */
3935 #define ALT_ECC_OTG0_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_INTTEST_OFST))
3936 /* The address of the ALT_ECC_OTG0_ECC_MODSTAT register for the ALT_ECC_OTG0_ECC instance. */
3937 #define ALT_ECC_OTG0_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_MODSTAT_OFST))
3938 /* The address of the ALT_ECC_OTG0_ECC_DERRADDRA register for the ALT_ECC_OTG0_ECC instance. */
3939 #define ALT_ECC_OTG0_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_DERRADDRA_OFST))
3940 /* The address of the ALT_ECC_OTG0_ECC_SERRADDRA register for the ALT_ECC_OTG0_ECC instance. */
3941 #define ALT_ECC_OTG0_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_SERRADDRA_OFST))
3942 /* The address of the ALT_ECC_OTG0_ECC_SERRCNTREG register for the ALT_ECC_OTG0_ECC instance. */
3943 #define ALT_ECC_OTG0_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_SERRCNTREG_OFST))
3944 /* The address of the ALT_ECC_OTG0_ECC_ECC_ADDRBUS register for the ALT_ECC_OTG0_ECC instance. */
3945 #define ALT_ECC_OTG0_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_ADDRBUS_OFST))
3946 /* The address of the ALT_ECC_OTG0_ECC_ECC_RDATA0BUS register for the ALT_ECC_OTG0_ECC instance. */
3947 #define ALT_ECC_OTG0_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_RDATA0BUS_OFST))
3948 /* The address of the ALT_ECC_OTG0_ECC_ECC_RDATA1BUS register for the ALT_ECC_OTG0_ECC instance. */
3949 #define ALT_ECC_OTG0_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_RDATA1BUS_OFST))
3950 /* The address of the ALT_ECC_OTG0_ECC_ECC_RDATA2BUS register for the ALT_ECC_OTG0_ECC instance. */
3951 #define ALT_ECC_OTG0_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_RDATA2BUS_OFST))
3952 /* The address of the ALT_ECC_OTG0_ECC_ECC_RDATA3BUS register for the ALT_ECC_OTG0_ECC instance. */
3953 #define ALT_ECC_OTG0_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_RDATA3BUS_OFST))
3954 /* The address of the ALT_ECC_OTG0_ECC_ECC_WDATA0BUS register for the ALT_ECC_OTG0_ECC instance. */
3955 #define ALT_ECC_OTG0_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDATA0BUS_OFST))
3956 /* The address of the ALT_ECC_OTG0_ECC_ECC_WDATA1BUS register for the ALT_ECC_OTG0_ECC instance. */
3957 #define ALT_ECC_OTG0_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDATA1BUS_OFST))
3958 /* The address of the ALT_ECC_OTG0_ECC_ECC_WDATA2BUS register for the ALT_ECC_OTG0_ECC instance. */
3959 #define ALT_ECC_OTG0_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDATA2BUS_OFST))
3960 /* The address of the ALT_ECC_OTG0_ECC_ECC_WDATA3BUS register for the ALT_ECC_OTG0_ECC instance. */
3961 #define ALT_ECC_OTG0_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDATA3BUS_OFST))
3962 /* The address of the ALT_ECC_OTG0_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_OTG0_ECC instance. */
3963 #define ALT_ECC_OTG0_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_RDATAECC0BUS_OFST))
3964 /* The address of the ALT_ECC_OTG0_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_OTG0_ECC instance. */
3965 #define ALT_ECC_OTG0_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_RDATAECC1BUS_OFST))
3966 /* The address of the ALT_ECC_OTG0_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_OTG0_ECC instance. */
3967 #define ALT_ECC_OTG0_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDATAECC0BUS_OFST))
3968 /* The address of the ALT_ECC_OTG0_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_OTG0_ECC instance. */
3969 #define ALT_ECC_OTG0_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDATAECC1BUS_OFST))
3970 /* The address of the ALT_ECC_OTG0_ECC_ECC_DBYTECTL register for the ALT_ECC_OTG0_ECC instance. */
3971 #define ALT_ECC_OTG0_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_DBYTECTL_OFST))
3972 /* The address of the ALT_ECC_OTG0_ECC_ECC_ACCCTL register for the ALT_ECC_OTG0_ECC instance. */
3973 #define ALT_ECC_OTG0_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_ACCCTL_OFST))
3974 /* The address of the ALT_ECC_OTG0_ECC_ECC_STARTACC register for the ALT_ECC_OTG0_ECC instance. */
3975 #define ALT_ECC_OTG0_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_STARTACC_OFST))
3976 /* The address of the ALT_ECC_OTG0_ECC_ECC_WDCTL register for the ALT_ECC_OTG0_ECC instance. */
3977 #define ALT_ECC_OTG0_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDCTL_OFST))
3978 /* The address of the ALT_ECC_OTG0_ECC_SERRLKUPA0 register for the ALT_ECC_OTG0_ECC instance. */
3979 #define ALT_ECC_OTG0_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_SERRLKUPA0_OFST))
3980 /* The base address byte offset for the start of the ALT_ECC_OTG0_ECC component. */
3981 #define ALT_ECC_OTG0_ECC_OFST 0xff8c8800
3982 /* The start address of the ALT_ECC_OTG0_ECC component. */
3983 #define ALT_ECC_OTG0_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_OTG0_ECC_OFST))
3984 /* The lower bound address range of the ALT_ECC_OTG0_ECC component. */
3985 #define ALT_ECC_OTG0_ECC_LB_ADDR ALT_ECC_OTG0_ECC_ADDR
3986 /* The upper bound address range of the ALT_ECC_OTG0_ECC component. */
3987 #define ALT_ECC_OTG0_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + 0x400) - 1))
3988 
3989 
3990 /*
3991  * Component Instance : ecc_otg1_ecc_registerBlock
3992  *
3993  * Instance ecc_otg1_ecc_registerBlock of component ALT_ECC_OTG1_ECC.
3994  *
3995  *
3996  */
3997 /* The address of the ALT_ECC_OTG1_ECC_IP_REV_ID register for the ALT_ECC_OTG1_ECC instance. */
3998 #define ALT_ECC_OTG1_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_IP_REV_ID_OFST))
3999 /* The address of the ALT_ECC_OTG1_ECC_CTL register for the ALT_ECC_OTG1_ECC instance. */
4000 #define ALT_ECC_OTG1_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_CTL_OFST))
4001 /* The address of the ALT_ECC_OTG1_ECC_INITSTAT register for the ALT_ECC_OTG1_ECC instance. */
4002 #define ALT_ECC_OTG1_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_INITSTAT_OFST))
4003 /* The address of the ALT_ECC_OTG1_ECC_ERRINTEN register for the ALT_ECC_OTG1_ECC instance. */
4004 #define ALT_ECC_OTG1_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ERRINTEN_OFST))
4005 /* The address of the ALT_ECC_OTG1_ECC_ERRINTENS register for the ALT_ECC_OTG1_ECC instance. */
4006 #define ALT_ECC_OTG1_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ERRINTENS_OFST))
4007 /* The address of the ALT_ECC_OTG1_ECC_ERRINTENR register for the ALT_ECC_OTG1_ECC instance. */
4008 #define ALT_ECC_OTG1_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ERRINTENR_OFST))
4009 /* The address of the ALT_ECC_OTG1_ECC_INTMOD register for the ALT_ECC_OTG1_ECC instance. */
4010 #define ALT_ECC_OTG1_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_INTMOD_OFST))
4011 /* The address of the ALT_ECC_OTG1_ECC_INTSTAT register for the ALT_ECC_OTG1_ECC instance. */
4012 #define ALT_ECC_OTG1_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_INTSTAT_OFST))
4013 /* The address of the ALT_ECC_OTG1_ECC_INTTEST register for the ALT_ECC_OTG1_ECC instance. */
4014 #define ALT_ECC_OTG1_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_INTTEST_OFST))
4015 /* The address of the ALT_ECC_OTG1_ECC_MODSTAT register for the ALT_ECC_OTG1_ECC instance. */
4016 #define ALT_ECC_OTG1_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_MODSTAT_OFST))
4017 /* The address of the ALT_ECC_OTG1_ECC_DERRADDRA register for the ALT_ECC_OTG1_ECC instance. */
4018 #define ALT_ECC_OTG1_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_DERRADDRA_OFST))
4019 /* The address of the ALT_ECC_OTG1_ECC_SERRADDRA register for the ALT_ECC_OTG1_ECC instance. */
4020 #define ALT_ECC_OTG1_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_SERRADDRA_OFST))
4021 /* The address of the ALT_ECC_OTG1_ECC_SERRCNTREG register for the ALT_ECC_OTG1_ECC instance. */
4022 #define ALT_ECC_OTG1_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_SERRCNTREG_OFST))
4023 /* The address of the ALT_ECC_OTG1_ECC_ECC_ADDRBUS register for the ALT_ECC_OTG1_ECC instance. */
4024 #define ALT_ECC_OTG1_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_ADDRBUS_OFST))
4025 /* The address of the ALT_ECC_OTG1_ECC_ECC_RDATA0BUS register for the ALT_ECC_OTG1_ECC instance. */
4026 #define ALT_ECC_OTG1_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_RDATA0BUS_OFST))
4027 /* The address of the ALT_ECC_OTG1_ECC_ECC_RDATA1BUS register for the ALT_ECC_OTG1_ECC instance. */
4028 #define ALT_ECC_OTG1_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_RDATA1BUS_OFST))
4029 /* The address of the ALT_ECC_OTG1_ECC_ECC_RDATA2BUS register for the ALT_ECC_OTG1_ECC instance. */
4030 #define ALT_ECC_OTG1_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_RDATA2BUS_OFST))
4031 /* The address of the ALT_ECC_OTG1_ECC_ECC_RDATA3BUS register for the ALT_ECC_OTG1_ECC instance. */
4032 #define ALT_ECC_OTG1_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_RDATA3BUS_OFST))
4033 /* The address of the ALT_ECC_OTG1_ECC_ECC_WDATA0BUS register for the ALT_ECC_OTG1_ECC instance. */
4034 #define ALT_ECC_OTG1_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDATA0BUS_OFST))
4035 /* The address of the ALT_ECC_OTG1_ECC_ECC_WDATA1BUS register for the ALT_ECC_OTG1_ECC instance. */
4036 #define ALT_ECC_OTG1_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDATA1BUS_OFST))
4037 /* The address of the ALT_ECC_OTG1_ECC_ECC_WDATA2BUS register for the ALT_ECC_OTG1_ECC instance. */
4038 #define ALT_ECC_OTG1_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDATA2BUS_OFST))
4039 /* The address of the ALT_ECC_OTG1_ECC_ECC_WDATA3BUS register for the ALT_ECC_OTG1_ECC instance. */
4040 #define ALT_ECC_OTG1_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDATA3BUS_OFST))
4041 /* The address of the ALT_ECC_OTG1_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_OTG1_ECC instance. */
4042 #define ALT_ECC_OTG1_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_RDATAECC0BUS_OFST))
4043 /* The address of the ALT_ECC_OTG1_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_OTG1_ECC instance. */
4044 #define ALT_ECC_OTG1_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_RDATAECC1BUS_OFST))
4045 /* The address of the ALT_ECC_OTG1_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_OTG1_ECC instance. */
4046 #define ALT_ECC_OTG1_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDATAECC0BUS_OFST))
4047 /* The address of the ALT_ECC_OTG1_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_OTG1_ECC instance. */
4048 #define ALT_ECC_OTG1_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDATAECC1BUS_OFST))
4049 /* The address of the ALT_ECC_OTG1_ECC_ECC_DBYTECTL register for the ALT_ECC_OTG1_ECC instance. */
4050 #define ALT_ECC_OTG1_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_DBYTECTL_OFST))
4051 /* The address of the ALT_ECC_OTG1_ECC_ECC_ACCCTL register for the ALT_ECC_OTG1_ECC instance. */
4052 #define ALT_ECC_OTG1_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_ACCCTL_OFST))
4053 /* The address of the ALT_ECC_OTG1_ECC_ECC_STARTACC register for the ALT_ECC_OTG1_ECC instance. */
4054 #define ALT_ECC_OTG1_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_STARTACC_OFST))
4055 /* The address of the ALT_ECC_OTG1_ECC_ECC_WDCTL register for the ALT_ECC_OTG1_ECC instance. */
4056 #define ALT_ECC_OTG1_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDCTL_OFST))
4057 /* The address of the ALT_ECC_OTG1_ECC_SERRLKUPA0 register for the ALT_ECC_OTG1_ECC instance. */
4058 #define ALT_ECC_OTG1_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_SERRLKUPA0_OFST))
4059 /* The base address byte offset for the start of the ALT_ECC_OTG1_ECC component. */
4060 #define ALT_ECC_OTG1_ECC_OFST 0xff8c8c00
4061 /* The start address of the ALT_ECC_OTG1_ECC component. */
4062 #define ALT_ECC_OTG1_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_OTG1_ECC_OFST))
4063 /* The lower bound address range of the ALT_ECC_OTG1_ECC component. */
4064 #define ALT_ECC_OTG1_ECC_LB_ADDR ALT_ECC_OTG1_ECC_ADDR
4065 /* The upper bound address range of the ALT_ECC_OTG1_ECC component. */
4066 #define ALT_ECC_OTG1_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + 0x400) - 1))
4067 
4068 
4069 /*
4070  * Component Instance : i_qspi_QSPIDATA
4071  *
4072  * Instance i_qspi_QSPIDATA of component ALT_QSPIDATA.
4073  *
4074  *
4075  */
4076 /* The base address byte offset for the start of the ALT_QSPIDATA component. */
4077 #define ALT_QSPIDATA_OFST 0xffa00000
4078 /* The start address of the ALT_QSPIDATA component. */
4079 #define ALT_QSPIDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_QSPIDATA_OFST))
4080 /* The lower bound address range of the ALT_QSPIDATA component. */
4081 #define ALT_QSPIDATA_LB_ADDR ALT_QSPIDATA_ADDR
4082 /* The upper bound address range of the ALT_QSPIDATA component. */
4083 #define ALT_QSPIDATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_QSPIDATA_ADDR) + 0x100000) - 1))
4084 
4085 
4086 /*
4087  * Component Instance : i_usbotg_0_globgrp
4088  *
4089  * Instance i_usbotg_0_globgrp of component ALT_USB_GLOB.
4090  *
4091  *
4092  */
4093 /* The address of the ALT_USB_GLOB_GOTGCTL register for the ALT_USB0_GLOBGRP instance. */
4094 #define ALT_USB0_GLOB_GOTGCTL_ADDR ALT_USB_GLOB_GOTGCTL_ADDR(ALT_USB0_GLOBGRP_ADDR)
4095 /* The address of the ALT_USB_GLOB_GOTGINT register for the ALT_USB0_GLOBGRP instance. */
4096 #define ALT_USB0_GLOB_GOTGINT_ADDR ALT_USB_GLOB_GOTGINT_ADDR(ALT_USB0_GLOBGRP_ADDR)
4097 /* The address of the ALT_USB_GLOB_GAHBCFG register for the ALT_USB0_GLOBGRP instance. */
4098 #define ALT_USB0_GLOB_GAHBCFG_ADDR ALT_USB_GLOB_GAHBCFG_ADDR(ALT_USB0_GLOBGRP_ADDR)
4099 /* The address of the ALT_USB_GLOB_GUSBCFG register for the ALT_USB0_GLOBGRP instance. */
4100 #define ALT_USB0_GLOB_GUSBCFG_ADDR ALT_USB_GLOB_GUSBCFG_ADDR(ALT_USB0_GLOBGRP_ADDR)
4101 /* The address of the ALT_USB_GLOB_GRSTCTL register for the ALT_USB0_GLOBGRP instance. */
4102 #define ALT_USB0_GLOB_GRSTCTL_ADDR ALT_USB_GLOB_GRSTCTL_ADDR(ALT_USB0_GLOBGRP_ADDR)
4103 /* The address of the ALT_USB_GLOB_GINTSTS register for the ALT_USB0_GLOBGRP instance. */
4104 #define ALT_USB0_GLOB_GINTSTS_ADDR ALT_USB_GLOB_GINTSTS_ADDR(ALT_USB0_GLOBGRP_ADDR)
4105 /* The address of the ALT_USB_GLOB_GINTMSK register for the ALT_USB0_GLOBGRP instance. */
4106 #define ALT_USB0_GLOB_GINTMSK_ADDR ALT_USB_GLOB_GINTMSK_ADDR(ALT_USB0_GLOBGRP_ADDR)
4107 /* The address of the ALT_USB_GLOB_GRXSTSR register for the ALT_USB0_GLOBGRP instance. */
4108 #define ALT_USB0_GLOB_GRXSTSR_ADDR ALT_USB_GLOB_GRXSTSR_ADDR(ALT_USB0_GLOBGRP_ADDR)
4109 /* The address of the ALT_USB_GLOB_GRXSTSP register for the ALT_USB0_GLOBGRP instance. */
4110 #define ALT_USB0_GLOB_GRXSTSP_ADDR ALT_USB_GLOB_GRXSTSP_ADDR(ALT_USB0_GLOBGRP_ADDR)
4111 /* The address of the ALT_USB_GLOB_GRXFSIZ register for the ALT_USB0_GLOBGRP instance. */
4112 #define ALT_USB0_GLOB_GRXFSIZ_ADDR ALT_USB_GLOB_GRXFSIZ_ADDR(ALT_USB0_GLOBGRP_ADDR)
4113 /* The address of the ALT_USB_GLOB_GNPTXFSIZ register for the ALT_USB0_GLOBGRP instance. */
4114 #define ALT_USB0_GLOB_GNPTXFSIZ_ADDR ALT_USB_GLOB_GNPTXFSIZ_ADDR(ALT_USB0_GLOBGRP_ADDR)
4115 /* The address of the ALT_USB_GLOB_GNPTXSTS register for the ALT_USB0_GLOBGRP instance. */
4116 #define ALT_USB0_GLOB_GNPTXSTS_ADDR ALT_USB_GLOB_GNPTXSTS_ADDR(ALT_USB0_GLOBGRP_ADDR)
4117 /* The address of the ALT_USB_GLOB_GPVNDCTL register for the ALT_USB0_GLOBGRP instance. */
4118 #define ALT_USB0_GLOB_GPVNDCTL_ADDR ALT_USB_GLOB_GPVNDCTL_ADDR(ALT_USB0_GLOBGRP_ADDR)
4119 /* The address of the ALT_USB_GLOB_GGPIO register for the ALT_USB0_GLOBGRP instance. */
4120 #define ALT_USB0_GLOB_GGPIO_ADDR ALT_USB_GLOB_GGPIO_ADDR(ALT_USB0_GLOBGRP_ADDR)
4121 /* The address of the ALT_USB_GLOB_GUID register for the ALT_USB0_GLOBGRP instance. */
4122 #define ALT_USB0_GLOB_GUID_ADDR ALT_USB_GLOB_GUID_ADDR(ALT_USB0_GLOBGRP_ADDR)
4123 /* The address of the ALT_USB_GLOB_GSNPSID register for the ALT_USB0_GLOBGRP instance. */
4124 #define ALT_USB0_GLOB_GSNPSID_ADDR ALT_USB_GLOB_GSNPSID_ADDR(ALT_USB0_GLOBGRP_ADDR)
4125 /* The address of the ALT_USB_GLOB_GHWCFG1 register for the ALT_USB0_GLOBGRP instance. */
4126 #define ALT_USB0_GLOB_GHWCFG1_ADDR ALT_USB_GLOB_GHWCFG1_ADDR(ALT_USB0_GLOBGRP_ADDR)
4127 /* The address of the ALT_USB_GLOB_GHWCFG2 register for the ALT_USB0_GLOBGRP instance. */
4128 #define ALT_USB0_GLOB_GHWCFG2_ADDR ALT_USB_GLOB_GHWCFG2_ADDR(ALT_USB0_GLOBGRP_ADDR)
4129 /* The address of the ALT_USB_GLOB_GHWCFG3 register for the ALT_USB0_GLOBGRP instance. */
4130 #define ALT_USB0_GLOB_GHWCFG3_ADDR ALT_USB_GLOB_GHWCFG3_ADDR(ALT_USB0_GLOBGRP_ADDR)
4131 /* The address of the ALT_USB_GLOB_GHWCFG4 register for the ALT_USB0_GLOBGRP instance. */
4132 #define ALT_USB0_GLOB_GHWCFG4_ADDR ALT_USB_GLOB_GHWCFG4_ADDR(ALT_USB0_GLOBGRP_ADDR)
4133 /* The address of the ALT_USB_GLOB_GDFIFOCFG register for the ALT_USB0_GLOBGRP instance. */
4134 #define ALT_USB0_GLOB_GDFIFOCFG_ADDR ALT_USB_GLOB_GDFIFOCFG_ADDR(ALT_USB0_GLOBGRP_ADDR)
4135 /* The address of the ALT_USB_GLOB_HPTXFSIZ register for the ALT_USB0_GLOBGRP instance. */
4136 #define ALT_USB0_GLOB_HPTXFSIZ_ADDR ALT_USB_GLOB_HPTXFSIZ_ADDR(ALT_USB0_GLOBGRP_ADDR)
4137 /* The address of the ALT_USB_GLOB_DIEPTXF1 register for the ALT_USB0_GLOBGRP instance. */
4138 #define ALT_USB0_GLOB_DIEPTXF1_ADDR ALT_USB_GLOB_DIEPTXF1_ADDR(ALT_USB0_GLOBGRP_ADDR)
4139 /* The address of the ALT_USB_GLOB_DIEPTXF2 register for the ALT_USB0_GLOBGRP instance. */
4140 #define ALT_USB0_GLOB_DIEPTXF2_ADDR ALT_USB_GLOB_DIEPTXF2_ADDR(ALT_USB0_GLOBGRP_ADDR)
4141 /* The address of the ALT_USB_GLOB_DIEPTXF3 register for the ALT_USB0_GLOBGRP instance. */
4142 #define ALT_USB0_GLOB_DIEPTXF3_ADDR ALT_USB_GLOB_DIEPTXF3_ADDR(ALT_USB0_GLOBGRP_ADDR)
4143 /* The address of the ALT_USB_GLOB_DIEPTXF4 register for the ALT_USB0_GLOBGRP instance. */
4144 #define ALT_USB0_GLOB_DIEPTXF4_ADDR ALT_USB_GLOB_DIEPTXF4_ADDR(ALT_USB0_GLOBGRP_ADDR)
4145 /* The address of the ALT_USB_GLOB_DIEPTXF5 register for the ALT_USB0_GLOBGRP instance. */
4146 #define ALT_USB0_GLOB_DIEPTXF5_ADDR ALT_USB_GLOB_DIEPTXF5_ADDR(ALT_USB0_GLOBGRP_ADDR)
4147 /* The address of the ALT_USB_GLOB_DIEPTXF6 register for the ALT_USB0_GLOBGRP instance. */
4148 #define ALT_USB0_GLOB_DIEPTXF6_ADDR ALT_USB_GLOB_DIEPTXF6_ADDR(ALT_USB0_GLOBGRP_ADDR)
4149 /* The address of the ALT_USB_GLOB_DIEPTXF7 register for the ALT_USB0_GLOBGRP instance. */
4150 #define ALT_USB0_GLOB_DIEPTXF7_ADDR ALT_USB_GLOB_DIEPTXF7_ADDR(ALT_USB0_GLOBGRP_ADDR)
4151 /* The address of the ALT_USB_GLOB_DIEPTXF8 register for the ALT_USB0_GLOBGRP instance. */
4152 #define ALT_USB0_GLOB_DIEPTXF8_ADDR ALT_USB_GLOB_DIEPTXF8_ADDR(ALT_USB0_GLOBGRP_ADDR)
4153 /* The address of the ALT_USB_GLOB_DIEPTXF9 register for the ALT_USB0_GLOBGRP instance. */
4154 #define ALT_USB0_GLOB_DIEPTXF9_ADDR ALT_USB_GLOB_DIEPTXF9_ADDR(ALT_USB0_GLOBGRP_ADDR)
4155 /* The address of the ALT_USB_GLOB_DIEPTXF10 register for the ALT_USB0_GLOBGRP instance. */
4156 #define ALT_USB0_GLOB_DIEPTXF10_ADDR ALT_USB_GLOB_DIEPTXF10_ADDR(ALT_USB0_GLOBGRP_ADDR)
4157 /* The address of the ALT_USB_GLOB_DIEPTXF11 register for the ALT_USB0_GLOBGRP instance. */
4158 #define ALT_USB0_GLOB_DIEPTXF11_ADDR ALT_USB_GLOB_DIEPTXF11_ADDR(ALT_USB0_GLOBGRP_ADDR)
4159 /* The address of the ALT_USB_GLOB_DIEPTXF12 register for the ALT_USB0_GLOBGRP instance. */
4160 #define ALT_USB0_GLOB_DIEPTXF12_ADDR ALT_USB_GLOB_DIEPTXF12_ADDR(ALT_USB0_GLOBGRP_ADDR)
4161 /* The address of the ALT_USB_GLOB_DIEPTXF13 register for the ALT_USB0_GLOBGRP instance. */
4162 #define ALT_USB0_GLOB_DIEPTXF13_ADDR ALT_USB_GLOB_DIEPTXF13_ADDR(ALT_USB0_GLOBGRP_ADDR)
4163 /* The address of the ALT_USB_GLOB_DIEPTXF14 register for the ALT_USB0_GLOBGRP instance. */
4164 #define ALT_USB0_GLOB_DIEPTXF14_ADDR ALT_USB_GLOB_DIEPTXF14_ADDR(ALT_USB0_GLOBGRP_ADDR)
4165 /* The address of the ALT_USB_GLOB_DIEPTXF15 register for the ALT_USB0_GLOBGRP instance. */
4166 #define ALT_USB0_GLOB_DIEPTXF15_ADDR ALT_USB_GLOB_DIEPTXF15_ADDR(ALT_USB0_GLOBGRP_ADDR)
4167 /* The base address byte offset for the start of the ALT_USB0_GLOBGRP component. */
4168 #define ALT_USB0_GLOBGRP_OFST 0xffb00000
4169 /* The start address of the ALT_USB0_GLOBGRP component. */
4170 #define ALT_USB0_GLOBGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_GLOBGRP_OFST))
4171 /* The lower bound address range of the ALT_USB0_GLOBGRP component. */
4172 #define ALT_USB0_GLOBGRP_LB_ADDR ALT_USB0_GLOBGRP_ADDR
4173 /* The upper bound address range of the ALT_USB0_GLOBGRP component. */
4174 #define ALT_USB0_GLOBGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_GLOBGRP_ADDR) + 0x140) - 1))
4175 
4176 
4177 /*
4178  * Component Instance : i_usbotg_0_hostgrp
4179  *
4180  * Instance i_usbotg_0_hostgrp of component ALT_USB_HOST.
4181  *
4182  *
4183  */
4184 /* The address of the ALT_USB_HOST_HCFG register for the ALT_USB0_HOSTGRP instance. */
4185 #define ALT_USB0_HOST_HCFG_ADDR ALT_USB_HOST_HCFG_ADDR(ALT_USB0_HOSTGRP_ADDR)
4186 /* The address of the ALT_USB_HOST_HFIR register for the ALT_USB0_HOSTGRP instance. */
4187 #define ALT_USB0_HOST_HFIR_ADDR ALT_USB_HOST_HFIR_ADDR(ALT_USB0_HOSTGRP_ADDR)
4188 /* The address of the ALT_USB_HOST_HFNUM register for the ALT_USB0_HOSTGRP instance. */
4189 #define ALT_USB0_HOST_HFNUM_ADDR ALT_USB_HOST_HFNUM_ADDR(ALT_USB0_HOSTGRP_ADDR)
4190 /* The address of the ALT_USB_HOST_HPTXSTS register for the ALT_USB0_HOSTGRP instance. */
4191 #define ALT_USB0_HOST_HPTXSTS_ADDR ALT_USB_HOST_HPTXSTS_ADDR(ALT_USB0_HOSTGRP_ADDR)
4192 /* The address of the ALT_USB_HOST_HAINT register for the ALT_USB0_HOSTGRP instance. */
4193 #define ALT_USB0_HOST_HAINT_ADDR ALT_USB_HOST_HAINT_ADDR(ALT_USB0_HOSTGRP_ADDR)
4194 /* The address of the ALT_USB_HOST_HAINTMSK register for the ALT_USB0_HOSTGRP instance. */
4195 #define ALT_USB0_HOST_HAINTMSK_ADDR ALT_USB_HOST_HAINTMSK_ADDR(ALT_USB0_HOSTGRP_ADDR)
4196 /* The address of the ALT_USB_HOST_HFLBADDR register for the ALT_USB0_HOSTGRP instance. */
4197 #define ALT_USB0_HOST_HFLBADDR_ADDR ALT_USB_HOST_HFLBADDR_ADDR(ALT_USB0_HOSTGRP_ADDR)
4198 /* The address of the ALT_USB_HOST_HPRT register for the ALT_USB0_HOSTGRP instance. */
4199 #define ALT_USB0_HOST_HPRT_ADDR ALT_USB_HOST_HPRT_ADDR(ALT_USB0_HOSTGRP_ADDR)
4200 /* The address of the ALT_USB_HOST_HCCHAR0 register for the ALT_USB0_HOSTGRP instance. */
4201 #define ALT_USB0_HOST_HCCHAR0_ADDR ALT_USB_HOST_HCCHAR0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4202 /* The address of the ALT_USB_HOST_HCSPLT0 register for the ALT_USB0_HOSTGRP instance. */
4203 #define ALT_USB0_HOST_HCSPLT0_ADDR ALT_USB_HOST_HCSPLT0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4204 /* The address of the ALT_USB_HOST_HCINT0 register for the ALT_USB0_HOSTGRP instance. */
4205 #define ALT_USB0_HOST_HCINT0_ADDR ALT_USB_HOST_HCINT0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4206 /* The address of the ALT_USB_HOST_HCINTMSK0 register for the ALT_USB0_HOSTGRP instance. */
4207 #define ALT_USB0_HOST_HCINTMSK0_ADDR ALT_USB_HOST_HCINTMSK0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4208 /* The address of the ALT_USB_HOST_HCTSIZ0 register for the ALT_USB0_HOSTGRP instance. */
4209 #define ALT_USB0_HOST_HCTSIZ0_ADDR ALT_USB_HOST_HCTSIZ0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4210 /* The address of the ALT_USB_HOST_HCDMA0 register for the ALT_USB0_HOSTGRP instance. */
4211 #define ALT_USB0_HOST_HCDMA0_ADDR ALT_USB_HOST_HCDMA0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4212 /* The address of the ALT_USB_HOST_HCDMAB0 register for the ALT_USB0_HOSTGRP instance. */
4213 #define ALT_USB0_HOST_HCDMAB0_ADDR ALT_USB_HOST_HCDMAB0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4214 /* The address of the ALT_USB_HOST_HCCHAR1 register for the ALT_USB0_HOSTGRP instance. */
4215 #define ALT_USB0_HOST_HCCHAR1_ADDR ALT_USB_HOST_HCCHAR1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4216 /* The address of the ALT_USB_HOST_HCSPLT1 register for the ALT_USB0_HOSTGRP instance. */
4217 #define ALT_USB0_HOST_HCSPLT1_ADDR ALT_USB_HOST_HCSPLT1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4218 /* The address of the ALT_USB_HOST_HCINT1 register for the ALT_USB0_HOSTGRP instance. */
4219 #define ALT_USB0_HOST_HCINT1_ADDR ALT_USB_HOST_HCINT1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4220 /* The address of the ALT_USB_HOST_HCINTMSK1 register for the ALT_USB0_HOSTGRP instance. */
4221 #define ALT_USB0_HOST_HCINTMSK1_ADDR ALT_USB_HOST_HCINTMSK1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4222 /* The address of the ALT_USB_HOST_HCTSIZ1 register for the ALT_USB0_HOSTGRP instance. */
4223 #define ALT_USB0_HOST_HCTSIZ1_ADDR ALT_USB_HOST_HCTSIZ1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4224 /* The address of the ALT_USB_HOST_HCDMA1 register for the ALT_USB0_HOSTGRP instance. */
4225 #define ALT_USB0_HOST_HCDMA1_ADDR ALT_USB_HOST_HCDMA1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4226 /* The address of the ALT_USB_HOST_HCDMAB1 register for the ALT_USB0_HOSTGRP instance. */
4227 #define ALT_USB0_HOST_HCDMAB1_ADDR ALT_USB_HOST_HCDMAB1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4228 /* The address of the ALT_USB_HOST_HCCHAR2 register for the ALT_USB0_HOSTGRP instance. */
4229 #define ALT_USB0_HOST_HCCHAR2_ADDR ALT_USB_HOST_HCCHAR2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4230 /* The address of the ALT_USB_HOST_HCSPLT2 register for the ALT_USB0_HOSTGRP instance. */
4231 #define ALT_USB0_HOST_HCSPLT2_ADDR ALT_USB_HOST_HCSPLT2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4232 /* The address of the ALT_USB_HOST_HCINT2 register for the ALT_USB0_HOSTGRP instance. */
4233 #define ALT_USB0_HOST_HCINT2_ADDR ALT_USB_HOST_HCINT2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4234 /* The address of the ALT_USB_HOST_HCINTMSK2 register for the ALT_USB0_HOSTGRP instance. */
4235 #define ALT_USB0_HOST_HCINTMSK2_ADDR ALT_USB_HOST_HCINTMSK2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4236 /* The address of the ALT_USB_HOST_HCTSIZ2 register for the ALT_USB0_HOSTGRP instance. */
4237 #define ALT_USB0_HOST_HCTSIZ2_ADDR ALT_USB_HOST_HCTSIZ2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4238 /* The address of the ALT_USB_HOST_HCDMA2 register for the ALT_USB0_HOSTGRP instance. */
4239 #define ALT_USB0_HOST_HCDMA2_ADDR ALT_USB_HOST_HCDMA2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4240 /* The address of the ALT_USB_HOST_HCDMAB2 register for the ALT_USB0_HOSTGRP instance. */
4241 #define ALT_USB0_HOST_HCDMAB2_ADDR ALT_USB_HOST_HCDMAB2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4242 /* The address of the ALT_USB_HOST_HCCHAR3 register for the ALT_USB0_HOSTGRP instance. */
4243 #define ALT_USB0_HOST_HCCHAR3_ADDR ALT_USB_HOST_HCCHAR3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4244 /* The address of the ALT_USB_HOST_HCSPLT3 register for the ALT_USB0_HOSTGRP instance. */
4245 #define ALT_USB0_HOST_HCSPLT3_ADDR ALT_USB_HOST_HCSPLT3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4246 /* The address of the ALT_USB_HOST_HCINT3 register for the ALT_USB0_HOSTGRP instance. */
4247 #define ALT_USB0_HOST_HCINT3_ADDR ALT_USB_HOST_HCINT3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4248 /* The address of the ALT_USB_HOST_HCINTMSK3 register for the ALT_USB0_HOSTGRP instance. */
4249 #define ALT_USB0_HOST_HCINTMSK3_ADDR ALT_USB_HOST_HCINTMSK3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4250 /* The address of the ALT_USB_HOST_HCTSIZ3 register for the ALT_USB0_HOSTGRP instance. */
4251 #define ALT_USB0_HOST_HCTSIZ3_ADDR ALT_USB_HOST_HCTSIZ3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4252 /* The address of the ALT_USB_HOST_HCDMA3 register for the ALT_USB0_HOSTGRP instance. */
4253 #define ALT_USB0_HOST_HCDMA3_ADDR ALT_USB_HOST_HCDMA3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4254 /* The address of the ALT_USB_HOST_HCDMAB3 register for the ALT_USB0_HOSTGRP instance. */
4255 #define ALT_USB0_HOST_HCDMAB3_ADDR ALT_USB_HOST_HCDMAB3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4256 /* The address of the ALT_USB_HOST_HCCHAR4 register for the ALT_USB0_HOSTGRP instance. */
4257 #define ALT_USB0_HOST_HCCHAR4_ADDR ALT_USB_HOST_HCCHAR4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4258 /* The address of the ALT_USB_HOST_HCSPLT4 register for the ALT_USB0_HOSTGRP instance. */
4259 #define ALT_USB0_HOST_HCSPLT4_ADDR ALT_USB_HOST_HCSPLT4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4260 /* The address of the ALT_USB_HOST_HCINT4 register for the ALT_USB0_HOSTGRP instance. */
4261 #define ALT_USB0_HOST_HCINT4_ADDR ALT_USB_HOST_HCINT4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4262 /* The address of the ALT_USB_HOST_HCINTMSK4 register for the ALT_USB0_HOSTGRP instance. */
4263 #define ALT_USB0_HOST_HCINTMSK4_ADDR ALT_USB_HOST_HCINTMSK4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4264 /* The address of the ALT_USB_HOST_HCTSIZ4 register for the ALT_USB0_HOSTGRP instance. */
4265 #define ALT_USB0_HOST_HCTSIZ4_ADDR ALT_USB_HOST_HCTSIZ4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4266 /* The address of the ALT_USB_HOST_HCDMA4 register for the ALT_USB0_HOSTGRP instance. */
4267 #define ALT_USB0_HOST_HCDMA4_ADDR ALT_USB_HOST_HCDMA4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4268 /* The address of the ALT_USB_HOST_HCDMAB4 register for the ALT_USB0_HOSTGRP instance. */
4269 #define ALT_USB0_HOST_HCDMAB4_ADDR ALT_USB_HOST_HCDMAB4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4270 /* The address of the ALT_USB_HOST_HCCHAR5 register for the ALT_USB0_HOSTGRP instance. */
4271 #define ALT_USB0_HOST_HCCHAR5_ADDR ALT_USB_HOST_HCCHAR5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4272 /* The address of the ALT_USB_HOST_HCSPLT5 register for the ALT_USB0_HOSTGRP instance. */
4273 #define ALT_USB0_HOST_HCSPLT5_ADDR ALT_USB_HOST_HCSPLT5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4274 /* The address of the ALT_USB_HOST_HCINT5 register for the ALT_USB0_HOSTGRP instance. */
4275 #define ALT_USB0_HOST_HCINT5_ADDR ALT_USB_HOST_HCINT5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4276 /* The address of the ALT_USB_HOST_HCINTMSK5 register for the ALT_USB0_HOSTGRP instance. */
4277 #define ALT_USB0_HOST_HCINTMSK5_ADDR ALT_USB_HOST_HCINTMSK5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4278 /* The address of the ALT_USB_HOST_HCTSIZ5 register for the ALT_USB0_HOSTGRP instance. */
4279 #define ALT_USB0_HOST_HCTSIZ5_ADDR ALT_USB_HOST_HCTSIZ5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4280 /* The address of the ALT_USB_HOST_HCDMA5 register for the ALT_USB0_HOSTGRP instance. */
4281 #define ALT_USB0_HOST_HCDMA5_ADDR ALT_USB_HOST_HCDMA5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4282 /* The address of the ALT_USB_HOST_HCDMAB5 register for the ALT_USB0_HOSTGRP instance. */
4283 #define ALT_USB0_HOST_HCDMAB5_ADDR ALT_USB_HOST_HCDMAB5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4284 /* The address of the ALT_USB_HOST_HCCHAR6 register for the ALT_USB0_HOSTGRP instance. */
4285 #define ALT_USB0_HOST_HCCHAR6_ADDR ALT_USB_HOST_HCCHAR6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4286 /* The address of the ALT_USB_HOST_HCSPLT6 register for the ALT_USB0_HOSTGRP instance. */
4287 #define ALT_USB0_HOST_HCSPLT6_ADDR ALT_USB_HOST_HCSPLT6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4288 /* The address of the ALT_USB_HOST_HCINT6 register for the ALT_USB0_HOSTGRP instance. */
4289 #define ALT_USB0_HOST_HCINT6_ADDR ALT_USB_HOST_HCINT6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4290 /* The address of the ALT_USB_HOST_HCINTMSK6 register for the ALT_USB0_HOSTGRP instance. */
4291 #define ALT_USB0_HOST_HCINTMSK6_ADDR ALT_USB_HOST_HCINTMSK6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4292 /* The address of the ALT_USB_HOST_HCTSIZ6 register for the ALT_USB0_HOSTGRP instance. */
4293 #define ALT_USB0_HOST_HCTSIZ6_ADDR ALT_USB_HOST_HCTSIZ6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4294 /* The address of the ALT_USB_HOST_HCDMA6 register for the ALT_USB0_HOSTGRP instance. */
4295 #define ALT_USB0_HOST_HCDMA6_ADDR ALT_USB_HOST_HCDMA6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4296 /* The address of the ALT_USB_HOST_HCDMAB6 register for the ALT_USB0_HOSTGRP instance. */
4297 #define ALT_USB0_HOST_HCDMAB6_ADDR ALT_USB_HOST_HCDMAB6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4298 /* The address of the ALT_USB_HOST_HCCHAR7 register for the ALT_USB0_HOSTGRP instance. */
4299 #define ALT_USB0_HOST_HCCHAR7_ADDR ALT_USB_HOST_HCCHAR7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4300 /* The address of the ALT_USB_HOST_HCSPLT7 register for the ALT_USB0_HOSTGRP instance. */
4301 #define ALT_USB0_HOST_HCSPLT7_ADDR ALT_USB_HOST_HCSPLT7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4302 /* The address of the ALT_USB_HOST_HCINT7 register for the ALT_USB0_HOSTGRP instance. */
4303 #define ALT_USB0_HOST_HCINT7_ADDR ALT_USB_HOST_HCINT7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4304 /* The address of the ALT_USB_HOST_HCINTMSK7 register for the ALT_USB0_HOSTGRP instance. */
4305 #define ALT_USB0_HOST_HCINTMSK7_ADDR ALT_USB_HOST_HCINTMSK7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4306 /* The address of the ALT_USB_HOST_HCTSIZ7 register for the ALT_USB0_HOSTGRP instance. */
4307 #define ALT_USB0_HOST_HCTSIZ7_ADDR ALT_USB_HOST_HCTSIZ7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4308 /* The address of the ALT_USB_HOST_HCDMA7 register for the ALT_USB0_HOSTGRP instance. */
4309 #define ALT_USB0_HOST_HCDMA7_ADDR ALT_USB_HOST_HCDMA7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4310 /* The address of the ALT_USB_HOST_HCDMAB7 register for the ALT_USB0_HOSTGRP instance. */
4311 #define ALT_USB0_HOST_HCDMAB7_ADDR ALT_USB_HOST_HCDMAB7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4312 /* The address of the ALT_USB_HOST_HCCHAR8 register for the ALT_USB0_HOSTGRP instance. */
4313 #define ALT_USB0_HOST_HCCHAR8_ADDR ALT_USB_HOST_HCCHAR8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4314 /* The address of the ALT_USB_HOST_HCSPLT8 register for the ALT_USB0_HOSTGRP instance. */
4315 #define ALT_USB0_HOST_HCSPLT8_ADDR ALT_USB_HOST_HCSPLT8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4316 /* The address of the ALT_USB_HOST_HCINT8 register for the ALT_USB0_HOSTGRP instance. */
4317 #define ALT_USB0_HOST_HCINT8_ADDR ALT_USB_HOST_HCINT8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4318 /* The address of the ALT_USB_HOST_HCINTMSK8 register for the ALT_USB0_HOSTGRP instance. */
4319 #define ALT_USB0_HOST_HCINTMSK8_ADDR ALT_USB_HOST_HCINTMSK8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4320 /* The address of the ALT_USB_HOST_HCTSIZ8 register for the ALT_USB0_HOSTGRP instance. */
4321 #define ALT_USB0_HOST_HCTSIZ8_ADDR ALT_USB_HOST_HCTSIZ8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4322 /* The address of the ALT_USB_HOST_HCDMA8 register for the ALT_USB0_HOSTGRP instance. */
4323 #define ALT_USB0_HOST_HCDMA8_ADDR ALT_USB_HOST_HCDMA8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4324 /* The address of the ALT_USB_HOST_HCDMAB8 register for the ALT_USB0_HOSTGRP instance. */
4325 #define ALT_USB0_HOST_HCDMAB8_ADDR ALT_USB_HOST_HCDMAB8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4326 /* The address of the ALT_USB_HOST_HCCHAR9 register for the ALT_USB0_HOSTGRP instance. */
4327 #define ALT_USB0_HOST_HCCHAR9_ADDR ALT_USB_HOST_HCCHAR9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4328 /* The address of the ALT_USB_HOST_HCSPLT9 register for the ALT_USB0_HOSTGRP instance. */
4329 #define ALT_USB0_HOST_HCSPLT9_ADDR ALT_USB_HOST_HCSPLT9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4330 /* The address of the ALT_USB_HOST_HCINT9 register for the ALT_USB0_HOSTGRP instance. */
4331 #define ALT_USB0_HOST_HCINT9_ADDR ALT_USB_HOST_HCINT9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4332 /* The address of the ALT_USB_HOST_HCINTMSK9 register for the ALT_USB0_HOSTGRP instance. */
4333 #define ALT_USB0_HOST_HCINTMSK9_ADDR ALT_USB_HOST_HCINTMSK9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4334 /* The address of the ALT_USB_HOST_HCTSIZ9 register for the ALT_USB0_HOSTGRP instance. */
4335 #define ALT_USB0_HOST_HCTSIZ9_ADDR ALT_USB_HOST_HCTSIZ9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4336 /* The address of the ALT_USB_HOST_HCDMA9 register for the ALT_USB0_HOSTGRP instance. */
4337 #define ALT_USB0_HOST_HCDMA9_ADDR ALT_USB_HOST_HCDMA9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4338 /* The address of the ALT_USB_HOST_HCDMAB9 register for the ALT_USB0_HOSTGRP instance. */
4339 #define ALT_USB0_HOST_HCDMAB9_ADDR ALT_USB_HOST_HCDMAB9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4340 /* The address of the ALT_USB_HOST_HCCHAR10 register for the ALT_USB0_HOSTGRP instance. */
4341 #define ALT_USB0_HOST_HCCHAR10_ADDR ALT_USB_HOST_HCCHAR10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4342 /* The address of the ALT_USB_HOST_HCSPLT10 register for the ALT_USB0_HOSTGRP instance. */
4343 #define ALT_USB0_HOST_HCSPLT10_ADDR ALT_USB_HOST_HCSPLT10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4344 /* The address of the ALT_USB_HOST_HCINT10 register for the ALT_USB0_HOSTGRP instance. */
4345 #define ALT_USB0_HOST_HCINT10_ADDR ALT_USB_HOST_HCINT10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4346 /* The address of the ALT_USB_HOST_HCINTMSK10 register for the ALT_USB0_HOSTGRP instance. */
4347 #define ALT_USB0_HOST_HCINTMSK10_ADDR ALT_USB_HOST_HCINTMSK10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4348 /* The address of the ALT_USB_HOST_HCTSIZ10 register for the ALT_USB0_HOSTGRP instance. */
4349 #define ALT_USB0_HOST_HCTSIZ10_ADDR ALT_USB_HOST_HCTSIZ10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4350 /* The address of the ALT_USB_HOST_HCDMA10 register for the ALT_USB0_HOSTGRP instance. */
4351 #define ALT_USB0_HOST_HCDMA10_ADDR ALT_USB_HOST_HCDMA10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4352 /* The address of the ALT_USB_HOST_HCDMAB10 register for the ALT_USB0_HOSTGRP instance. */
4353 #define ALT_USB0_HOST_HCDMAB10_ADDR ALT_USB_HOST_HCDMAB10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4354 /* The address of the ALT_USB_HOST_HCCHAR11 register for the ALT_USB0_HOSTGRP instance. */
4355 #define ALT_USB0_HOST_HCCHAR11_ADDR ALT_USB_HOST_HCCHAR11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4356 /* The address of the ALT_USB_HOST_HCSPLT11 register for the ALT_USB0_HOSTGRP instance. */
4357 #define ALT_USB0_HOST_HCSPLT11_ADDR ALT_USB_HOST_HCSPLT11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4358 /* The address of the ALT_USB_HOST_HCINT11 register for the ALT_USB0_HOSTGRP instance. */
4359 #define ALT_USB0_HOST_HCINT11_ADDR ALT_USB_HOST_HCINT11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4360 /* The address of the ALT_USB_HOST_HCINTMSK11 register for the ALT_USB0_HOSTGRP instance. */
4361 #define ALT_USB0_HOST_HCINTMSK11_ADDR ALT_USB_HOST_HCINTMSK11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4362 /* The address of the ALT_USB_HOST_HCTSIZ11 register for the ALT_USB0_HOSTGRP instance. */
4363 #define ALT_USB0_HOST_HCTSIZ11_ADDR ALT_USB_HOST_HCTSIZ11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4364 /* The address of the ALT_USB_HOST_HCDMA11 register for the ALT_USB0_HOSTGRP instance. */
4365 #define ALT_USB0_HOST_HCDMA11_ADDR ALT_USB_HOST_HCDMA11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4366 /* The address of the ALT_USB_HOST_HCDMAB11 register for the ALT_USB0_HOSTGRP instance. */
4367 #define ALT_USB0_HOST_HCDMAB11_ADDR ALT_USB_HOST_HCDMAB11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4368 /* The address of the ALT_USB_HOST_HCCHAR12 register for the ALT_USB0_HOSTGRP instance. */
4369 #define ALT_USB0_HOST_HCCHAR12_ADDR ALT_USB_HOST_HCCHAR12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4370 /* The address of the ALT_USB_HOST_HCSPLT12 register for the ALT_USB0_HOSTGRP instance. */
4371 #define ALT_USB0_HOST_HCSPLT12_ADDR ALT_USB_HOST_HCSPLT12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4372 /* The address of the ALT_USB_HOST_HCINT12 register for the ALT_USB0_HOSTGRP instance. */
4373 #define ALT_USB0_HOST_HCINT12_ADDR ALT_USB_HOST_HCINT12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4374 /* The address of the ALT_USB_HOST_HCINTMSK12 register for the ALT_USB0_HOSTGRP instance. */
4375 #define ALT_USB0_HOST_HCINTMSK12_ADDR ALT_USB_HOST_HCINTMSK12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4376 /* The address of the ALT_USB_HOST_HCTSIZ12 register for the ALT_USB0_HOSTGRP instance. */
4377 #define ALT_USB0_HOST_HCTSIZ12_ADDR ALT_USB_HOST_HCTSIZ12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4378 /* The address of the ALT_USB_HOST_HCDMA12 register for the ALT_USB0_HOSTGRP instance. */
4379 #define ALT_USB0_HOST_HCDMA12_ADDR ALT_USB_HOST_HCDMA12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4380 /* The address of the ALT_USB_HOST_HCDMAB12 register for the ALT_USB0_HOSTGRP instance. */
4381 #define ALT_USB0_HOST_HCDMAB12_ADDR ALT_USB_HOST_HCDMAB12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4382 /* The address of the ALT_USB_HOST_HCCHAR13 register for the ALT_USB0_HOSTGRP instance. */
4383 #define ALT_USB0_HOST_HCCHAR13_ADDR ALT_USB_HOST_HCCHAR13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4384 /* The address of the ALT_USB_HOST_HCSPLT13 register for the ALT_USB0_HOSTGRP instance. */
4385 #define ALT_USB0_HOST_HCSPLT13_ADDR ALT_USB_HOST_HCSPLT13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4386 /* The address of the ALT_USB_HOST_HCINT13 register for the ALT_USB0_HOSTGRP instance. */
4387 #define ALT_USB0_HOST_HCINT13_ADDR ALT_USB_HOST_HCINT13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4388 /* The address of the ALT_USB_HOST_HCINTMSK13 register for the ALT_USB0_HOSTGRP instance. */
4389 #define ALT_USB0_HOST_HCINTMSK13_ADDR ALT_USB_HOST_HCINTMSK13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4390 /* The address of the ALT_USB_HOST_HCTSIZ13 register for the ALT_USB0_HOSTGRP instance. */
4391 #define ALT_USB0_HOST_HCTSIZ13_ADDR ALT_USB_HOST_HCTSIZ13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4392 /* The address of the ALT_USB_HOST_HCDMA13 register for the ALT_USB0_HOSTGRP instance. */
4393 #define ALT_USB0_HOST_HCDMA13_ADDR ALT_USB_HOST_HCDMA13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4394 /* The address of the ALT_USB_HOST_HCDMAB13 register for the ALT_USB0_HOSTGRP instance. */
4395 #define ALT_USB0_HOST_HCDMAB13_ADDR ALT_USB_HOST_HCDMAB13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4396 /* The address of the ALT_USB_HOST_HCCHAR14 register for the ALT_USB0_HOSTGRP instance. */
4397 #define ALT_USB0_HOST_HCCHAR14_ADDR ALT_USB_HOST_HCCHAR14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4398 /* The address of the ALT_USB_HOST_HCSPLT14 register for the ALT_USB0_HOSTGRP instance. */
4399 #define ALT_USB0_HOST_HCSPLT14_ADDR ALT_USB_HOST_HCSPLT14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4400 /* The address of the ALT_USB_HOST_HCINT14 register for the ALT_USB0_HOSTGRP instance. */
4401 #define ALT_USB0_HOST_HCINT14_ADDR ALT_USB_HOST_HCINT14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4402 /* The address of the ALT_USB_HOST_HCINTMSK14 register for the ALT_USB0_HOSTGRP instance. */
4403 #define ALT_USB0_HOST_HCINTMSK14_ADDR ALT_USB_HOST_HCINTMSK14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4404 /* The address of the ALT_USB_HOST_HCTSIZ14 register for the ALT_USB0_HOSTGRP instance. */
4405 #define ALT_USB0_HOST_HCTSIZ14_ADDR ALT_USB_HOST_HCTSIZ14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4406 /* The address of the ALT_USB_HOST_HCDMA14 register for the ALT_USB0_HOSTGRP instance. */
4407 #define ALT_USB0_HOST_HCDMA14_ADDR ALT_USB_HOST_HCDMA14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4408 /* The address of the ALT_USB_HOST_HCDMAB14 register for the ALT_USB0_HOSTGRP instance. */
4409 #define ALT_USB0_HOST_HCDMAB14_ADDR ALT_USB_HOST_HCDMAB14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4410 /* The address of the ALT_USB_HOST_HCCHAR15 register for the ALT_USB0_HOSTGRP instance. */
4411 #define ALT_USB0_HOST_HCCHAR15_ADDR ALT_USB_HOST_HCCHAR15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4412 /* The address of the ALT_USB_HOST_HCSPLT15 register for the ALT_USB0_HOSTGRP instance. */
4413 #define ALT_USB0_HOST_HCSPLT15_ADDR ALT_USB_HOST_HCSPLT15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4414 /* The address of the ALT_USB_HOST_HCINT15 register for the ALT_USB0_HOSTGRP instance. */
4415 #define ALT_USB0_HOST_HCINT15_ADDR ALT_USB_HOST_HCINT15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4416 /* The address of the ALT_USB_HOST_HCINTMSK15 register for the ALT_USB0_HOSTGRP instance. */
4417 #define ALT_USB0_HOST_HCINTMSK15_ADDR ALT_USB_HOST_HCINTMSK15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4418 /* The address of the ALT_USB_HOST_HCTSIZ15 register for the ALT_USB0_HOSTGRP instance. */
4419 #define ALT_USB0_HOST_HCTSIZ15_ADDR ALT_USB_HOST_HCTSIZ15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4420 /* The address of the ALT_USB_HOST_HCDMA15 register for the ALT_USB0_HOSTGRP instance. */
4421 #define ALT_USB0_HOST_HCDMA15_ADDR ALT_USB_HOST_HCDMA15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4422 /* The address of the ALT_USB_HOST_HCDMAB15 register for the ALT_USB0_HOSTGRP instance. */
4423 #define ALT_USB0_HOST_HCDMAB15_ADDR ALT_USB_HOST_HCDMAB15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4424 /* The base address byte offset for the start of the ALT_USB0_HOSTGRP component. */
4425 #define ALT_USB0_HOSTGRP_OFST 0xffb00400
4426 /* The start address of the ALT_USB0_HOSTGRP component. */
4427 #define ALT_USB0_HOSTGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_HOSTGRP_OFST))
4428 /* The lower bound address range of the ALT_USB0_HOSTGRP component. */
4429 #define ALT_USB0_HOSTGRP_LB_ADDR ALT_USB0_HOSTGRP_ADDR
4430 /* The upper bound address range of the ALT_USB0_HOSTGRP component. */
4431 #define ALT_USB0_HOSTGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_HOSTGRP_ADDR) + 0x300) - 1))
4432 
4433 
4434 /*
4435  * Component Instance : i_usbotg_0_devgrp
4436  *
4437  * Instance i_usbotg_0_devgrp of component ALT_USB_DEV.
4438  *
4439  *
4440  */
4441 /* The address of the ALT_USB_DEV_DCFG register for the ALT_USB0_DEVGRP instance. */
4442 #define ALT_USB0_DEV_DCFG_ADDR ALT_USB_DEV_DCFG_ADDR(ALT_USB0_DEVGRP_ADDR)
4443 /* The address of the ALT_USB_DEV_DCTL register for the ALT_USB0_DEVGRP instance. */
4444 #define ALT_USB0_DEV_DCTL_ADDR ALT_USB_DEV_DCTL_ADDR(ALT_USB0_DEVGRP_ADDR)
4445 /* The address of the ALT_USB_DEV_DSTS register for the ALT_USB0_DEVGRP instance. */
4446 #define ALT_USB0_DEV_DSTS_ADDR ALT_USB_DEV_DSTS_ADDR(ALT_USB0_DEVGRP_ADDR)
4447 /* The address of the ALT_USB_DEV_DIEPMSK register for the ALT_USB0_DEVGRP instance. */
4448 #define ALT_USB0_DEV_DIEPMSK_ADDR ALT_USB_DEV_DIEPMSK_ADDR(ALT_USB0_DEVGRP_ADDR)
4449 /* The address of the ALT_USB_DEV_DOEPMSK register for the ALT_USB0_DEVGRP instance. */
4450 #define ALT_USB0_DEV_DOEPMSK_ADDR ALT_USB_DEV_DOEPMSK_ADDR(ALT_USB0_DEVGRP_ADDR)
4451 /* The address of the ALT_USB_DEV_DAINT register for the ALT_USB0_DEVGRP instance. */
4452 #define ALT_USB0_DEV_DAINT_ADDR ALT_USB_DEV_DAINT_ADDR(ALT_USB0_DEVGRP_ADDR)
4453 /* The address of the ALT_USB_DEV_DAINTMSK register for the ALT_USB0_DEVGRP instance. */
4454 #define ALT_USB0_DEV_DAINTMSK_ADDR ALT_USB_DEV_DAINTMSK_ADDR(ALT_USB0_DEVGRP_ADDR)
4455 /* The address of the ALT_USB_DEV_DVBUSDIS register for the ALT_USB0_DEVGRP instance. */
4456 #define ALT_USB0_DEV_DVBUSDIS_ADDR ALT_USB_DEV_DVBUSDIS_ADDR(ALT_USB0_DEVGRP_ADDR)
4457 /* The address of the ALT_USB_DEV_DVBUSPULSE register for the ALT_USB0_DEVGRP instance. */
4458 #define ALT_USB0_DEV_DVBUSPULSE_ADDR ALT_USB_DEV_DVBUSPULSE_ADDR(ALT_USB0_DEVGRP_ADDR)
4459 /* The address of the ALT_USB_DEV_DTHRCTL register for the ALT_USB0_DEVGRP instance. */
4460 #define ALT_USB0_DEV_DTHRCTL_ADDR ALT_USB_DEV_DTHRCTL_ADDR(ALT_USB0_DEVGRP_ADDR)
4461 /* The address of the ALT_USB_DEV_DIEPEMPMSK register for the ALT_USB0_DEVGRP instance. */
4462 #define ALT_USB0_DEV_DIEPEMPMSK_ADDR ALT_USB_DEV_DIEPEMPMSK_ADDR(ALT_USB0_DEVGRP_ADDR)
4463 /* The address of the ALT_USB_DEV_DIEPCTL0 register for the ALT_USB0_DEVGRP instance. */
4464 #define ALT_USB0_DEV_DIEPCTL0_ADDR ALT_USB_DEV_DIEPCTL0_ADDR(ALT_USB0_DEVGRP_ADDR)
4465 /* The address of the ALT_USB_DEV_DIEPINT0 register for the ALT_USB0_DEVGRP instance. */
4466 #define ALT_USB0_DEV_DIEPINT0_ADDR ALT_USB_DEV_DIEPINT0_ADDR(ALT_USB0_DEVGRP_ADDR)
4467 /* The address of the ALT_USB_DEV_DIEPTSIZ0 register for the ALT_USB0_DEVGRP instance. */
4468 #define ALT_USB0_DEV_DIEPTSIZ0_ADDR ALT_USB_DEV_DIEPTSIZ0_ADDR(ALT_USB0_DEVGRP_ADDR)
4469 /* The address of the ALT_USB_DEV_DIEPDMA0 register for the ALT_USB0_DEVGRP instance. */
4470 #define ALT_USB0_DEV_DIEPDMA0_ADDR ALT_USB_DEV_DIEPDMA0_ADDR(ALT_USB0_DEVGRP_ADDR)
4471 /* The address of the ALT_USB_DEV_DTXFSTS0 register for the ALT_USB0_DEVGRP instance. */
4472 #define ALT_USB0_DEV_DTXFSTS0_ADDR ALT_USB_DEV_DTXFSTS0_ADDR(ALT_USB0_DEVGRP_ADDR)
4473 /* The address of the ALT_USB_DEV_DIEPDMAB0 register for the ALT_USB0_DEVGRP instance. */
4474 #define ALT_USB0_DEV_DIEPDMAB0_ADDR ALT_USB_DEV_DIEPDMAB0_ADDR(ALT_USB0_DEVGRP_ADDR)
4475 /* The address of the ALT_USB_DEV_DIEPCTL1 register for the ALT_USB0_DEVGRP instance. */
4476 #define ALT_USB0_DEV_DIEPCTL1_ADDR ALT_USB_DEV_DIEPCTL1_ADDR(ALT_USB0_DEVGRP_ADDR)
4477 /* The address of the ALT_USB_DEV_DIEPINT1 register for the ALT_USB0_DEVGRP instance. */
4478 #define ALT_USB0_DEV_DIEPINT1_ADDR ALT_USB_DEV_DIEPINT1_ADDR(ALT_USB0_DEVGRP_ADDR)
4479 /* The address of the ALT_USB_DEV_DIEPTSIZ1 register for the ALT_USB0_DEVGRP instance. */
4480 #define ALT_USB0_DEV_DIEPTSIZ1_ADDR ALT_USB_DEV_DIEPTSIZ1_ADDR(ALT_USB0_DEVGRP_ADDR)
4481 /* The address of the ALT_USB_DEV_DIEPDMA1 register for the ALT_USB0_DEVGRP instance. */
4482 #define ALT_USB0_DEV_DIEPDMA1_ADDR ALT_USB_DEV_DIEPDMA1_ADDR(ALT_USB0_DEVGRP_ADDR)
4483 /* The address of the ALT_USB_DEV_DTXFSTS1 register for the ALT_USB0_DEVGRP instance. */
4484 #define ALT_USB0_DEV_DTXFSTS1_ADDR ALT_USB_DEV_DTXFSTS1_ADDR(ALT_USB0_DEVGRP_ADDR)
4485 /* The address of the ALT_USB_DEV_DIEPDMAB1 register for the ALT_USB0_DEVGRP instance. */
4486 #define ALT_USB0_DEV_DIEPDMAB1_ADDR ALT_USB_DEV_DIEPDMAB1_ADDR(ALT_USB0_DEVGRP_ADDR)
4487 /* The address of the ALT_USB_DEV_DIEPCTL2 register for the ALT_USB0_DEVGRP instance. */
4488 #define ALT_USB0_DEV_DIEPCTL2_ADDR ALT_USB_DEV_DIEPCTL2_ADDR(ALT_USB0_DEVGRP_ADDR)
4489 /* The address of the ALT_USB_DEV_DIEPINT2 register for the ALT_USB0_DEVGRP instance. */
4490 #define ALT_USB0_DEV_DIEPINT2_ADDR ALT_USB_DEV_DIEPINT2_ADDR(ALT_USB0_DEVGRP_ADDR)
4491 /* The address of the ALT_USB_DEV_DIEPTSIZ2 register for the ALT_USB0_DEVGRP instance. */
4492 #define ALT_USB0_DEV_DIEPTSIZ2_ADDR ALT_USB_DEV_DIEPTSIZ2_ADDR(ALT_USB0_DEVGRP_ADDR)
4493 /* The address of the ALT_USB_DEV_DIEPDMA2 register for the ALT_USB0_DEVGRP instance. */
4494 #define ALT_USB0_DEV_DIEPDMA2_ADDR ALT_USB_DEV_DIEPDMA2_ADDR(ALT_USB0_DEVGRP_ADDR)
4495 /* The address of the ALT_USB_DEV_DTXFSTS2 register for the ALT_USB0_DEVGRP instance. */
4496 #define ALT_USB0_DEV_DTXFSTS2_ADDR ALT_USB_DEV_DTXFSTS2_ADDR(ALT_USB0_DEVGRP_ADDR)
4497 /* The address of the ALT_USB_DEV_DIEPDMAB2 register for the ALT_USB0_DEVGRP instance. */
4498 #define ALT_USB0_DEV_DIEPDMAB2_ADDR ALT_USB_DEV_DIEPDMAB2_ADDR(ALT_USB0_DEVGRP_ADDR)
4499 /* The address of the ALT_USB_DEV_DIEPCTL3 register for the ALT_USB0_DEVGRP instance. */
4500 #define ALT_USB0_DEV_DIEPCTL3_ADDR ALT_USB_DEV_DIEPCTL3_ADDR(ALT_USB0_DEVGRP_ADDR)
4501 /* The address of the ALT_USB_DEV_DIEPINT3 register for the ALT_USB0_DEVGRP instance. */
4502 #define ALT_USB0_DEV_DIEPINT3_ADDR ALT_USB_DEV_DIEPINT3_ADDR(ALT_USB0_DEVGRP_ADDR)
4503 /* The address of the ALT_USB_DEV_DIEPTSIZ3 register for the ALT_USB0_DEVGRP instance. */
4504 #define ALT_USB0_DEV_DIEPTSIZ3_ADDR ALT_USB_DEV_DIEPTSIZ3_ADDR(ALT_USB0_DEVGRP_ADDR)
4505 /* The address of the ALT_USB_DEV_DIEPDMA3 register for the ALT_USB0_DEVGRP instance. */
4506 #define ALT_USB0_DEV_DIEPDMA3_ADDR ALT_USB_DEV_DIEPDMA3_ADDR(ALT_USB0_DEVGRP_ADDR)
4507 /* The address of the ALT_USB_DEV_DTXFSTS3 register for the ALT_USB0_DEVGRP instance. */
4508 #define ALT_USB0_DEV_DTXFSTS3_ADDR ALT_USB_DEV_DTXFSTS3_ADDR(ALT_USB0_DEVGRP_ADDR)
4509 /* The address of the ALT_USB_DEV_DIEPDMAB3 register for the ALT_USB0_DEVGRP instance. */
4510 #define ALT_USB0_DEV_DIEPDMAB3_ADDR ALT_USB_DEV_DIEPDMAB3_ADDR(ALT_USB0_DEVGRP_ADDR)
4511 /* The address of the ALT_USB_DEV_DIEPCTL4 register for the ALT_USB0_DEVGRP instance. */
4512 #define ALT_USB0_DEV_DIEPCTL4_ADDR ALT_USB_DEV_DIEPCTL4_ADDR(ALT_USB0_DEVGRP_ADDR)
4513 /* The address of the ALT_USB_DEV_DIEPINT4 register for the ALT_USB0_DEVGRP instance. */
4514 #define ALT_USB0_DEV_DIEPINT4_ADDR ALT_USB_DEV_DIEPINT4_ADDR(ALT_USB0_DEVGRP_ADDR)
4515 /* The address of the ALT_USB_DEV_DIEPTSIZ4 register for the ALT_USB0_DEVGRP instance. */
4516 #define ALT_USB0_DEV_DIEPTSIZ4_ADDR ALT_USB_DEV_DIEPTSIZ4_ADDR(ALT_USB0_DEVGRP_ADDR)
4517 /* The address of the ALT_USB_DEV_DIEPDMA4 register for the ALT_USB0_DEVGRP instance. */
4518 #define ALT_USB0_DEV_DIEPDMA4_ADDR ALT_USB_DEV_DIEPDMA4_ADDR(ALT_USB0_DEVGRP_ADDR)
4519 /* The address of the ALT_USB_DEV_DTXFSTS4 register for the ALT_USB0_DEVGRP instance. */
4520 #define ALT_USB0_DEV_DTXFSTS4_ADDR ALT_USB_DEV_DTXFSTS4_ADDR(ALT_USB0_DEVGRP_ADDR)
4521 /* The address of the ALT_USB_DEV_DIEPDMAB4 register for the ALT_USB0_DEVGRP instance. */
4522 #define ALT_USB0_DEV_DIEPDMAB4_ADDR ALT_USB_DEV_DIEPDMAB4_ADDR(ALT_USB0_DEVGRP_ADDR)
4523 /* The address of the ALT_USB_DEV_DIEPCTL5 register for the ALT_USB0_DEVGRP instance. */
4524 #define ALT_USB0_DEV_DIEPCTL5_ADDR ALT_USB_DEV_DIEPCTL5_ADDR(ALT_USB0_DEVGRP_ADDR)
4525 /* The address of the ALT_USB_DEV_DIEPINT5 register for the ALT_USB0_DEVGRP instance. */
4526 #define ALT_USB0_DEV_DIEPINT5_ADDR ALT_USB_DEV_DIEPINT5_ADDR(ALT_USB0_DEVGRP_ADDR)
4527 /* The address of the ALT_USB_DEV_DIEPTSIZ5 register for the ALT_USB0_DEVGRP instance. */
4528 #define ALT_USB0_DEV_DIEPTSIZ5_ADDR ALT_USB_DEV_DIEPTSIZ5_ADDR(ALT_USB0_DEVGRP_ADDR)
4529 /* The address of the ALT_USB_DEV_DIEPDMA5 register for the ALT_USB0_DEVGRP instance. */
4530 #define ALT_USB0_DEV_DIEPDMA5_ADDR ALT_USB_DEV_DIEPDMA5_ADDR(ALT_USB0_DEVGRP_ADDR)
4531 /* The address of the ALT_USB_DEV_DTXFSTS5 register for the ALT_USB0_DEVGRP instance. */
4532 #define ALT_USB0_DEV_DTXFSTS5_ADDR ALT_USB_DEV_DTXFSTS5_ADDR(ALT_USB0_DEVGRP_ADDR)
4533 /* The address of the ALT_USB_DEV_DIEPDMAB5 register for the ALT_USB0_DEVGRP instance. */
4534 #define ALT_USB0_DEV_DIEPDMAB5_ADDR ALT_USB_DEV_DIEPDMAB5_ADDR(ALT_USB0_DEVGRP_ADDR)
4535 /* The address of the ALT_USB_DEV_DIEPCTL6 register for the ALT_USB0_DEVGRP instance. */
4536 #define ALT_USB0_DEV_DIEPCTL6_ADDR ALT_USB_DEV_DIEPCTL6_ADDR(ALT_USB0_DEVGRP_ADDR)
4537 /* The address of the ALT_USB_DEV_DIEPINT6 register for the ALT_USB0_DEVGRP instance. */
4538 #define ALT_USB0_DEV_DIEPINT6_ADDR ALT_USB_DEV_DIEPINT6_ADDR(ALT_USB0_DEVGRP_ADDR)
4539 /* The address of the ALT_USB_DEV_DIEPTSIZ6 register for the ALT_USB0_DEVGRP instance. */
4540 #define ALT_USB0_DEV_DIEPTSIZ6_ADDR ALT_USB_DEV_DIEPTSIZ6_ADDR(ALT_USB0_DEVGRP_ADDR)
4541 /* The address of the ALT_USB_DEV_DIEPDMA6 register for the ALT_USB0_DEVGRP instance. */
4542 #define ALT_USB0_DEV_DIEPDMA6_ADDR ALT_USB_DEV_DIEPDMA6_ADDR(ALT_USB0_DEVGRP_ADDR)
4543 /* The address of the ALT_USB_DEV_DTXFSTS6 register for the ALT_USB0_DEVGRP instance. */
4544 #define ALT_USB0_DEV_DTXFSTS6_ADDR ALT_USB_DEV_DTXFSTS6_ADDR(ALT_USB0_DEVGRP_ADDR)
4545 /* The address of the ALT_USB_DEV_DIEPDMAB6 register for the ALT_USB0_DEVGRP instance. */
4546 #define ALT_USB0_DEV_DIEPDMAB6_ADDR ALT_USB_DEV_DIEPDMAB6_ADDR(ALT_USB0_DEVGRP_ADDR)
4547 /* The address of the ALT_USB_DEV_DIEPCTL7 register for the ALT_USB0_DEVGRP instance. */
4548 #define ALT_USB0_DEV_DIEPCTL7_ADDR ALT_USB_DEV_DIEPCTL7_ADDR(ALT_USB0_DEVGRP_ADDR)
4549 /* The address of the ALT_USB_DEV_DIEPINT7 register for the ALT_USB0_DEVGRP instance. */
4550 #define ALT_USB0_DEV_DIEPINT7_ADDR ALT_USB_DEV_DIEPINT7_ADDR(ALT_USB0_DEVGRP_ADDR)
4551 /* The address of the ALT_USB_DEV_DIEPTSIZ7 register for the ALT_USB0_DEVGRP instance. */
4552 #define ALT_USB0_DEV_DIEPTSIZ7_ADDR ALT_USB_DEV_DIEPTSIZ7_ADDR(ALT_USB0_DEVGRP_ADDR)
4553 /* The address of the ALT_USB_DEV_DIEPDMA7 register for the ALT_USB0_DEVGRP instance. */
4554 #define ALT_USB0_DEV_DIEPDMA7_ADDR ALT_USB_DEV_DIEPDMA7_ADDR(ALT_USB0_DEVGRP_ADDR)
4555 /* The address of the ALT_USB_DEV_DTXFSTS7 register for the ALT_USB0_DEVGRP instance. */
4556 #define ALT_USB0_DEV_DTXFSTS7_ADDR ALT_USB_DEV_DTXFSTS7_ADDR(ALT_USB0_DEVGRP_ADDR)
4557 /* The address of the ALT_USB_DEV_DIEPDMAB7 register for the ALT_USB0_DEVGRP instance. */
4558 #define ALT_USB0_DEV_DIEPDMAB7_ADDR ALT_USB_DEV_DIEPDMAB7_ADDR(ALT_USB0_DEVGRP_ADDR)
4559 /* The address of the ALT_USB_DEV_DIEPCTL8 register for the ALT_USB0_DEVGRP instance. */
4560 #define ALT_USB0_DEV_DIEPCTL8_ADDR ALT_USB_DEV_DIEPCTL8_ADDR(ALT_USB0_DEVGRP_ADDR)
4561 /* The address of the ALT_USB_DEV_DIEPINT8 register for the ALT_USB0_DEVGRP instance. */
4562 #define ALT_USB0_DEV_DIEPINT8_ADDR ALT_USB_DEV_DIEPINT8_ADDR(ALT_USB0_DEVGRP_ADDR)
4563 /* The address of the ALT_USB_DEV_DIEPTSIZ8 register for the ALT_USB0_DEVGRP instance. */
4564 #define ALT_USB0_DEV_DIEPTSIZ8_ADDR ALT_USB_DEV_DIEPTSIZ8_ADDR(ALT_USB0_DEVGRP_ADDR)
4565 /* The address of the ALT_USB_DEV_DIEPDMA8 register for the ALT_USB0_DEVGRP instance. */
4566 #define ALT_USB0_DEV_DIEPDMA8_ADDR ALT_USB_DEV_DIEPDMA8_ADDR(ALT_USB0_DEVGRP_ADDR)
4567 /* The address of the ALT_USB_DEV_DTXFSTS8 register for the ALT_USB0_DEVGRP instance. */
4568 #define ALT_USB0_DEV_DTXFSTS8_ADDR ALT_USB_DEV_DTXFSTS8_ADDR(ALT_USB0_DEVGRP_ADDR)
4569 /* The address of the ALT_USB_DEV_DIEPDMAB8 register for the ALT_USB0_DEVGRP instance. */
4570 #define ALT_USB0_DEV_DIEPDMAB8_ADDR ALT_USB_DEV_DIEPDMAB8_ADDR(ALT_USB0_DEVGRP_ADDR)
4571 /* The address of the ALT_USB_DEV_DIEPCTL9 register for the ALT_USB0_DEVGRP instance. */
4572 #define ALT_USB0_DEV_DIEPCTL9_ADDR ALT_USB_DEV_DIEPCTL9_ADDR(ALT_USB0_DEVGRP_ADDR)
4573 /* The address of the ALT_USB_DEV_DIEPINT9 register for the ALT_USB0_DEVGRP instance. */
4574 #define ALT_USB0_DEV_DIEPINT9_ADDR ALT_USB_DEV_DIEPINT9_ADDR(ALT_USB0_DEVGRP_ADDR)
4575 /* The address of the ALT_USB_DEV_DIEPTSIZ9 register for the ALT_USB0_DEVGRP instance. */
4576 #define ALT_USB0_DEV_DIEPTSIZ9_ADDR ALT_USB_DEV_DIEPTSIZ9_ADDR(ALT_USB0_DEVGRP_ADDR)
4577 /* The address of the ALT_USB_DEV_DIEPDMA9 register for the ALT_USB0_DEVGRP instance. */
4578 #define ALT_USB0_DEV_DIEPDMA9_ADDR ALT_USB_DEV_DIEPDMA9_ADDR(ALT_USB0_DEVGRP_ADDR)
4579 /* The address of the ALT_USB_DEV_DTXFSTS9 register for the ALT_USB0_DEVGRP instance. */
4580 #define ALT_USB0_DEV_DTXFSTS9_ADDR ALT_USB_DEV_DTXFSTS9_ADDR(ALT_USB0_DEVGRP_ADDR)
4581 /* The address of the ALT_USB_DEV_DIEPDMAB9 register for the ALT_USB0_DEVGRP instance. */
4582 #define ALT_USB0_DEV_DIEPDMAB9_ADDR ALT_USB_DEV_DIEPDMAB9_ADDR(ALT_USB0_DEVGRP_ADDR)
4583 /* The address of the ALT_USB_DEV_DIEPCTL10 register for the ALT_USB0_DEVGRP instance. */
4584 #define ALT_USB0_DEV_DIEPCTL10_ADDR ALT_USB_DEV_DIEPCTL10_ADDR(ALT_USB0_DEVGRP_ADDR)
4585 /* The address of the ALT_USB_DEV_DIEPINT10 register for the ALT_USB0_DEVGRP instance. */
4586 #define ALT_USB0_DEV_DIEPINT10_ADDR ALT_USB_DEV_DIEPINT10_ADDR(ALT_USB0_DEVGRP_ADDR)
4587 /* The address of the ALT_USB_DEV_DIEPTSIZ10 register for the ALT_USB0_DEVGRP instance. */
4588 #define ALT_USB0_DEV_DIEPTSIZ10_ADDR ALT_USB_DEV_DIEPTSIZ10_ADDR(ALT_USB0_DEVGRP_ADDR)
4589 /* The address of the ALT_USB_DEV_DIEPDMA10 register for the ALT_USB0_DEVGRP instance. */
4590 #define ALT_USB0_DEV_DIEPDMA10_ADDR ALT_USB_DEV_DIEPDMA10_ADDR(ALT_USB0_DEVGRP_ADDR)
4591 /* The address of the ALT_USB_DEV_DTXFSTS10 register for the ALT_USB0_DEVGRP instance. */
4592 #define ALT_USB0_DEV_DTXFSTS10_ADDR ALT_USB_DEV_DTXFSTS10_ADDR(ALT_USB0_DEVGRP_ADDR)
4593 /* The address of the ALT_USB_DEV_DIEPDMAB10 register for the ALT_USB0_DEVGRP instance. */
4594 #define ALT_USB0_DEV_DIEPDMAB10_ADDR ALT_USB_DEV_DIEPDMAB10_ADDR(ALT_USB0_DEVGRP_ADDR)
4595 /* The address of the ALT_USB_DEV_DIEPCTL11 register for the ALT_USB0_DEVGRP instance. */
4596 #define ALT_USB0_DEV_DIEPCTL11_ADDR ALT_USB_DEV_DIEPCTL11_ADDR(ALT_USB0_DEVGRP_ADDR)
4597 /* The address of the ALT_USB_DEV_DIEPINT11 register for the ALT_USB0_DEVGRP instance. */
4598 #define ALT_USB0_DEV_DIEPINT11_ADDR ALT_USB_DEV_DIEPINT11_ADDR(ALT_USB0_DEVGRP_ADDR)
4599 /* The address of the ALT_USB_DEV_DIEPTSIZ11 register for the ALT_USB0_DEVGRP instance. */
4600 #define ALT_USB0_DEV_DIEPTSIZ11_ADDR ALT_USB_DEV_DIEPTSIZ11_ADDR(ALT_USB0_DEVGRP_ADDR)
4601 /* The address of the ALT_USB_DEV_DIEPDMA11 register for the ALT_USB0_DEVGRP instance. */
4602 #define ALT_USB0_DEV_DIEPDMA11_ADDR ALT_USB_DEV_DIEPDMA11_ADDR(ALT_USB0_DEVGRP_ADDR)
4603 /* The address of the ALT_USB_DEV_DTXFSTS11 register for the ALT_USB0_DEVGRP instance. */
4604 #define ALT_USB0_DEV_DTXFSTS11_ADDR ALT_USB_DEV_DTXFSTS11_ADDR(ALT_USB0_DEVGRP_ADDR)
4605 /* The address of the ALT_USB_DEV_DIEPDMAB11 register for the ALT_USB0_DEVGRP instance. */
4606 #define ALT_USB0_DEV_DIEPDMAB11_ADDR ALT_USB_DEV_DIEPDMAB11_ADDR(ALT_USB0_DEVGRP_ADDR)
4607 /* The address of the ALT_USB_DEV_DIEPCTL12 register for the ALT_USB0_DEVGRP instance. */
4608 #define ALT_USB0_DEV_DIEPCTL12_ADDR ALT_USB_DEV_DIEPCTL12_ADDR(ALT_USB0_DEVGRP_ADDR)
4609 /* The address of the ALT_USB_DEV_DIEPINT12 register for the ALT_USB0_DEVGRP instance. */
4610 #define ALT_USB0_DEV_DIEPINT12_ADDR ALT_USB_DEV_DIEPINT12_ADDR(ALT_USB0_DEVGRP_ADDR)
4611 /* The address of the ALT_USB_DEV_DIEPTSIZ12 register for the ALT_USB0_DEVGRP instance. */
4612 #define ALT_USB0_DEV_DIEPTSIZ12_ADDR ALT_USB_DEV_DIEPTSIZ12_ADDR(ALT_USB0_DEVGRP_ADDR)
4613 /* The address of the ALT_USB_DEV_DIEPDMA12 register for the ALT_USB0_DEVGRP instance. */
4614 #define ALT_USB0_DEV_DIEPDMA12_ADDR ALT_USB_DEV_DIEPDMA12_ADDR(ALT_USB0_DEVGRP_ADDR)
4615 /* The address of the ALT_USB_DEV_DTXFSTS12 register for the ALT_USB0_DEVGRP instance. */
4616 #define ALT_USB0_DEV_DTXFSTS12_ADDR ALT_USB_DEV_DTXFSTS12_ADDR(ALT_USB0_DEVGRP_ADDR)
4617 /* The address of the ALT_USB_DEV_DIEPDMAB12 register for the ALT_USB0_DEVGRP instance. */
4618 #define ALT_USB0_DEV_DIEPDMAB12_ADDR ALT_USB_DEV_DIEPDMAB12_ADDR(ALT_USB0_DEVGRP_ADDR)
4619 /* The address of the ALT_USB_DEV_DIEPCTL13 register for the ALT_USB0_DEVGRP instance. */
4620 #define ALT_USB0_DEV_DIEPCTL13_ADDR ALT_USB_DEV_DIEPCTL13_ADDR(ALT_USB0_DEVGRP_ADDR)
4621 /* The address of the ALT_USB_DEV_DIEPINT13 register for the ALT_USB0_DEVGRP instance. */
4622 #define ALT_USB0_DEV_DIEPINT13_ADDR ALT_USB_DEV_DIEPINT13_ADDR(ALT_USB0_DEVGRP_ADDR)
4623 /* The address of the ALT_USB_DEV_DIEPTSIZ13 register for the ALT_USB0_DEVGRP instance. */
4624 #define ALT_USB0_DEV_DIEPTSIZ13_ADDR ALT_USB_DEV_DIEPTSIZ13_ADDR(ALT_USB0_DEVGRP_ADDR)
4625 /* The address of the ALT_USB_DEV_DIEPDMA13 register for the ALT_USB0_DEVGRP instance. */
4626 #define ALT_USB0_DEV_DIEPDMA13_ADDR ALT_USB_DEV_DIEPDMA13_ADDR(ALT_USB0_DEVGRP_ADDR)
4627 /* The address of the ALT_USB_DEV_DTXFSTS13 register for the ALT_USB0_DEVGRP instance. */
4628 #define ALT_USB0_DEV_DTXFSTS13_ADDR ALT_USB_DEV_DTXFSTS13_ADDR(ALT_USB0_DEVGRP_ADDR)
4629 /* The address of the ALT_USB_DEV_DIEPDMAB13 register for the ALT_USB0_DEVGRP instance. */
4630 #define ALT_USB0_DEV_DIEPDMAB13_ADDR ALT_USB_DEV_DIEPDMAB13_ADDR(ALT_USB0_DEVGRP_ADDR)
4631 /* The address of the ALT_USB_DEV_DIEPCTL14 register for the ALT_USB0_DEVGRP instance. */
4632 #define ALT_USB0_DEV_DIEPCTL14_ADDR ALT_USB_DEV_DIEPCTL14_ADDR(ALT_USB0_DEVGRP_ADDR)
4633 /* The address of the ALT_USB_DEV_DIEPINT14 register for the ALT_USB0_DEVGRP instance. */
4634 #define ALT_USB0_DEV_DIEPINT14_ADDR ALT_USB_DEV_DIEPINT14_ADDR(ALT_USB0_DEVGRP_ADDR)
4635 /* The address of the ALT_USB_DEV_DIEPTSIZ14 register for the ALT_USB0_DEVGRP instance. */
4636 #define ALT_USB0_DEV_DIEPTSIZ14_ADDR ALT_USB_DEV_DIEPTSIZ14_ADDR(ALT_USB0_DEVGRP_ADDR)
4637 /* The address of the ALT_USB_DEV_DIEPDMA14 register for the ALT_USB0_DEVGRP instance. */
4638 #define ALT_USB0_DEV_DIEPDMA14_ADDR ALT_USB_DEV_DIEPDMA14_ADDR(ALT_USB0_DEVGRP_ADDR)
4639 /* The address of the ALT_USB_DEV_DTXFSTS14 register for the ALT_USB0_DEVGRP instance. */
4640 #define ALT_USB0_DEV_DTXFSTS14_ADDR ALT_USB_DEV_DTXFSTS14_ADDR(ALT_USB0_DEVGRP_ADDR)
4641 /* The address of the ALT_USB_DEV_DIEPDMAB14 register for the ALT_USB0_DEVGRP instance. */
4642 #define ALT_USB0_DEV_DIEPDMAB14_ADDR ALT_USB_DEV_DIEPDMAB14_ADDR(ALT_USB0_DEVGRP_ADDR)
4643 /* The address of the ALT_USB_DEV_DIEPCTL15 register for the ALT_USB0_DEVGRP instance. */
4644 #define ALT_USB0_DEV_DIEPCTL15_ADDR ALT_USB_DEV_DIEPCTL15_ADDR(ALT_USB0_DEVGRP_ADDR)
4645 /* The address of the ALT_USB_DEV_DIEPINT15 register for the ALT_USB0_DEVGRP instance. */
4646 #define ALT_USB0_DEV_DIEPINT15_ADDR ALT_USB_DEV_DIEPINT15_ADDR(ALT_USB0_DEVGRP_ADDR)
4647 /* The address of the ALT_USB_DEV_DIEPTSIZ15 register for the ALT_USB0_DEVGRP instance. */
4648 #define ALT_USB0_DEV_DIEPTSIZ15_ADDR ALT_USB_DEV_DIEPTSIZ15_ADDR(ALT_USB0_DEVGRP_ADDR)
4649 /* The address of the ALT_USB_DEV_DIEPDMA15 register for the ALT_USB0_DEVGRP instance. */
4650 #define ALT_USB0_DEV_DIEPDMA15_ADDR ALT_USB_DEV_DIEPDMA15_ADDR(ALT_USB0_DEVGRP_ADDR)
4651 /* The address of the ALT_USB_DEV_DTXFSTS15 register for the ALT_USB0_DEVGRP instance. */
4652 #define ALT_USB0_DEV_DTXFSTS15_ADDR ALT_USB_DEV_DTXFSTS15_ADDR(ALT_USB0_DEVGRP_ADDR)
4653 /* The address of the ALT_USB_DEV_DIEPDMAB15 register for the ALT_USB0_DEVGRP instance. */
4654 #define ALT_USB0_DEV_DIEPDMAB15_ADDR ALT_USB_DEV_DIEPDMAB15_ADDR(ALT_USB0_DEVGRP_ADDR)
4655 /* The address of the ALT_USB_DEV_DOEPCTL0 register for the ALT_USB0_DEVGRP instance. */
4656 #define ALT_USB0_DEV_DOEPCTL0_ADDR ALT_USB_DEV_DOEPCTL0_ADDR(ALT_USB0_DEVGRP_ADDR)
4657 /* The address of the ALT_USB_DEV_DOEPINT0 register for the ALT_USB0_DEVGRP instance. */
4658 #define ALT_USB0_DEV_DOEPINT0_ADDR ALT_USB_DEV_DOEPINT0_ADDR(ALT_USB0_DEVGRP_ADDR)
4659 /* The address of the ALT_USB_DEV_DOEPTSIZ0 register for the ALT_USB0_DEVGRP instance. */
4660 #define ALT_USB0_DEV_DOEPTSIZ0_ADDR ALT_USB_DEV_DOEPTSIZ0_ADDR(ALT_USB0_DEVGRP_ADDR)
4661 /* The address of the ALT_USB_DEV_DOEPDMA0 register for the ALT_USB0_DEVGRP instance. */
4662 #define ALT_USB0_DEV_DOEPDMA0_ADDR ALT_USB_DEV_DOEPDMA0_ADDR(ALT_USB0_DEVGRP_ADDR)
4663 /* The address of the ALT_USB_DEV_DOEPDMAB0 register for the ALT_USB0_DEVGRP instance. */
4664 #define ALT_USB0_DEV_DOEPDMAB0_ADDR ALT_USB_DEV_DOEPDMAB0_ADDR(ALT_USB0_DEVGRP_ADDR)
4665 /* The address of the ALT_USB_DEV_DOEPCTL1 register for the ALT_USB0_DEVGRP instance. */
4666 #define ALT_USB0_DEV_DOEPCTL1_ADDR ALT_USB_DEV_DOEPCTL1_ADDR(ALT_USB0_DEVGRP_ADDR)
4667 /* The address of the ALT_USB_DEV_DOEPINT1 register for the ALT_USB0_DEVGRP instance. */
4668 #define ALT_USB0_DEV_DOEPINT1_ADDR ALT_USB_DEV_DOEPINT1_ADDR(ALT_USB0_DEVGRP_ADDR)
4669 /* The address of the ALT_USB_DEV_DOEPTSIZ1 register for the ALT_USB0_DEVGRP instance. */
4670 #define ALT_USB0_DEV_DOEPTSIZ1_ADDR ALT_USB_DEV_DOEPTSIZ1_ADDR(ALT_USB0_DEVGRP_ADDR)
4671 /* The address of the ALT_USB_DEV_DOEPDMA1 register for the ALT_USB0_DEVGRP instance. */
4672 #define ALT_USB0_DEV_DOEPDMA1_ADDR ALT_USB_DEV_DOEPDMA1_ADDR(ALT_USB0_DEVGRP_ADDR)
4673 /* The address of the ALT_USB_DEV_DOEPDMAB1 register for the ALT_USB0_DEVGRP instance. */
4674 #define ALT_USB0_DEV_DOEPDMAB1_ADDR ALT_USB_DEV_DOEPDMAB1_ADDR(ALT_USB0_DEVGRP_ADDR)
4675 /* The address of the ALT_USB_DEV_DOEPCTL2 register for the ALT_USB0_DEVGRP instance. */
4676 #define ALT_USB0_DEV_DOEPCTL2_ADDR ALT_USB_DEV_DOEPCTL2_ADDR(ALT_USB0_DEVGRP_ADDR)
4677 /* The address of the ALT_USB_DEV_DOEPINT2 register for the ALT_USB0_DEVGRP instance. */
4678 #define ALT_USB0_DEV_DOEPINT2_ADDR ALT_USB_DEV_DOEPINT2_ADDR(ALT_USB0_DEVGRP_ADDR)
4679 /* The address of the ALT_USB_DEV_DOEPTSIZ2 register for the ALT_USB0_DEVGRP instance. */
4680 #define ALT_USB0_DEV_DOEPTSIZ2_ADDR ALT_USB_DEV_DOEPTSIZ2_ADDR(ALT_USB0_DEVGRP_ADDR)
4681 /* The address of the ALT_USB_DEV_DOEPDMA2 register for the ALT_USB0_DEVGRP instance. */
4682 #define ALT_USB0_DEV_DOEPDMA2_ADDR ALT_USB_DEV_DOEPDMA2_ADDR(ALT_USB0_DEVGRP_ADDR)
4683 /* The address of the ALT_USB_DEV_DOEPDMAB2 register for the ALT_USB0_DEVGRP instance. */
4684 #define ALT_USB0_DEV_DOEPDMAB2_ADDR ALT_USB_DEV_DOEPDMAB2_ADDR(ALT_USB0_DEVGRP_ADDR)
4685 /* The address of the ALT_USB_DEV_DOEPCTL3 register for the ALT_USB0_DEVGRP instance. */
4686 #define ALT_USB0_DEV_DOEPCTL3_ADDR ALT_USB_DEV_DOEPCTL3_ADDR(ALT_USB0_DEVGRP_ADDR)
4687 /* The address of the ALT_USB_DEV_DOEPINT3 register for the ALT_USB0_DEVGRP instance. */
4688 #define ALT_USB0_DEV_DOEPINT3_ADDR ALT_USB_DEV_DOEPINT3_ADDR(ALT_USB0_DEVGRP_ADDR)
4689 /* The address of the ALT_USB_DEV_DOEPTSIZ3 register for the ALT_USB0_DEVGRP instance. */
4690 #define ALT_USB0_DEV_DOEPTSIZ3_ADDR ALT_USB_DEV_DOEPTSIZ3_ADDR(ALT_USB0_DEVGRP_ADDR)
4691 /* The address of the ALT_USB_DEV_DOEPDMA3 register for the ALT_USB0_DEVGRP instance. */
4692 #define ALT_USB0_DEV_DOEPDMA3_ADDR ALT_USB_DEV_DOEPDMA3_ADDR(ALT_USB0_DEVGRP_ADDR)
4693 /* The address of the ALT_USB_DEV_DOEPDMAB3 register for the ALT_USB0_DEVGRP instance. */
4694 #define ALT_USB0_DEV_DOEPDMAB3_ADDR ALT_USB_DEV_DOEPDMAB3_ADDR(ALT_USB0_DEVGRP_ADDR)
4695 /* The address of the ALT_USB_DEV_DOEPCTL4 register for the ALT_USB0_DEVGRP instance. */
4696 #define ALT_USB0_DEV_DOEPCTL4_ADDR ALT_USB_DEV_DOEPCTL4_ADDR(ALT_USB0_DEVGRP_ADDR)
4697 /* The address of the ALT_USB_DEV_DOEPINT4 register for the ALT_USB0_DEVGRP instance. */
4698 #define ALT_USB0_DEV_DOEPINT4_ADDR ALT_USB_DEV_DOEPINT4_ADDR(ALT_USB0_DEVGRP_ADDR)
4699 /* The address of the ALT_USB_DEV_DOEPTSIZ4 register for the ALT_USB0_DEVGRP instance. */
4700 #define ALT_USB0_DEV_DOEPTSIZ4_ADDR ALT_USB_DEV_DOEPTSIZ4_ADDR(ALT_USB0_DEVGRP_ADDR)
4701 /* The address of the ALT_USB_DEV_DOEPDMA4 register for the ALT_USB0_DEVGRP instance. */
4702 #define ALT_USB0_DEV_DOEPDMA4_ADDR ALT_USB_DEV_DOEPDMA4_ADDR(ALT_USB0_DEVGRP_ADDR)
4703 /* The address of the ALT_USB_DEV_DOEPDMAB4 register for the ALT_USB0_DEVGRP instance. */
4704 #define ALT_USB0_DEV_DOEPDMAB4_ADDR ALT_USB_DEV_DOEPDMAB4_ADDR(ALT_USB0_DEVGRP_ADDR)
4705 /* The address of the ALT_USB_DEV_DOEPCTL5 register for the ALT_USB0_DEVGRP instance. */
4706 #define ALT_USB0_DEV_DOEPCTL5_ADDR ALT_USB_DEV_DOEPCTL5_ADDR(ALT_USB0_DEVGRP_ADDR)
4707 /* The address of the ALT_USB_DEV_DOEPINT5 register for the ALT_USB0_DEVGRP instance. */
4708 #define ALT_USB0_DEV_DOEPINT5_ADDR ALT_USB_DEV_DOEPINT5_ADDR(ALT_USB0_DEVGRP_ADDR)
4709 /* The address of the ALT_USB_DEV_DOEPTSIZ5 register for the ALT_USB0_DEVGRP instance. */
4710 #define ALT_USB0_DEV_DOEPTSIZ5_ADDR ALT_USB_DEV_DOEPTSIZ5_ADDR(ALT_USB0_DEVGRP_ADDR)
4711 /* The address of the ALT_USB_DEV_DOEPDMA5 register for the ALT_USB0_DEVGRP instance. */
4712 #define ALT_USB0_DEV_DOEPDMA5_ADDR ALT_USB_DEV_DOEPDMA5_ADDR(ALT_USB0_DEVGRP_ADDR)
4713 /* The address of the ALT_USB_DEV_DOEPDMAB5 register for the ALT_USB0_DEVGRP instance. */
4714 #define ALT_USB0_DEV_DOEPDMAB5_ADDR ALT_USB_DEV_DOEPDMAB5_ADDR(ALT_USB0_DEVGRP_ADDR)
4715 /* The address of the ALT_USB_DEV_DOEPCTL6 register for the ALT_USB0_DEVGRP instance. */
4716 #define ALT_USB0_DEV_DOEPCTL6_ADDR ALT_USB_DEV_DOEPCTL6_ADDR(ALT_USB0_DEVGRP_ADDR)
4717 /* The address of the ALT_USB_DEV_DOEPINT6 register for the ALT_USB0_DEVGRP instance. */
4718 #define ALT_USB0_DEV_DOEPINT6_ADDR ALT_USB_DEV_DOEPINT6_ADDR(ALT_USB0_DEVGRP_ADDR)
4719 /* The address of the ALT_USB_DEV_DOEPTSIZ6 register for the ALT_USB0_DEVGRP instance. */
4720 #define ALT_USB0_DEV_DOEPTSIZ6_ADDR ALT_USB_DEV_DOEPTSIZ6_ADDR(ALT_USB0_DEVGRP_ADDR)
4721 /* The address of the ALT_USB_DEV_DOEPDMA6 register for the ALT_USB0_DEVGRP instance. */
4722 #define ALT_USB0_DEV_DOEPDMA6_ADDR ALT_USB_DEV_DOEPDMA6_ADDR(ALT_USB0_DEVGRP_ADDR)
4723 /* The address of the ALT_USB_DEV_DOEPDMAB6 register for the ALT_USB0_DEVGRP instance. */
4724 #define ALT_USB0_DEV_DOEPDMAB6_ADDR ALT_USB_DEV_DOEPDMAB6_ADDR(ALT_USB0_DEVGRP_ADDR)
4725 /* The address of the ALT_USB_DEV_DOEPCTL7 register for the ALT_USB0_DEVGRP instance. */
4726 #define ALT_USB0_DEV_DOEPCTL7_ADDR ALT_USB_DEV_DOEPCTL7_ADDR(ALT_USB0_DEVGRP_ADDR)
4727 /* The address of the ALT_USB_DEV_DOEPINT7 register for the ALT_USB0_DEVGRP instance. */
4728 #define ALT_USB0_DEV_DOEPINT7_ADDR ALT_USB_DEV_DOEPINT7_ADDR(ALT_USB0_DEVGRP_ADDR)
4729 /* The address of the ALT_USB_DEV_DOEPTSIZ7 register for the ALT_USB0_DEVGRP instance. */
4730 #define ALT_USB0_DEV_DOEPTSIZ7_ADDR ALT_USB_DEV_DOEPTSIZ7_ADDR(ALT_USB0_DEVGRP_ADDR)
4731 /* The address of the ALT_USB_DEV_DOEPDMA7 register for the ALT_USB0_DEVGRP instance. */
4732 #define ALT_USB0_DEV_DOEPDMA7_ADDR ALT_USB_DEV_DOEPDMA7_ADDR(ALT_USB0_DEVGRP_ADDR)
4733 /* The address of the ALT_USB_DEV_DOEPDMAB7 register for the ALT_USB0_DEVGRP instance. */
4734 #define ALT_USB0_DEV_DOEPDMAB7_ADDR ALT_USB_DEV_DOEPDMAB7_ADDR(ALT_USB0_DEVGRP_ADDR)
4735 /* The address of the ALT_USB_DEV_DOEPCTL8 register for the ALT_USB0_DEVGRP instance. */
4736 #define ALT_USB0_DEV_DOEPCTL8_ADDR ALT_USB_DEV_DOEPCTL8_ADDR(ALT_USB0_DEVGRP_ADDR)
4737 /* The address of the ALT_USB_DEV_DOEPINT8 register for the ALT_USB0_DEVGRP instance. */
4738 #define ALT_USB0_DEV_DOEPINT8_ADDR ALT_USB_DEV_DOEPINT8_ADDR(ALT_USB0_DEVGRP_ADDR)
4739 /* The address of the ALT_USB_DEV_DOEPTSIZ8 register for the ALT_USB0_DEVGRP instance. */
4740 #define ALT_USB0_DEV_DOEPTSIZ8_ADDR ALT_USB_DEV_DOEPTSIZ8_ADDR(ALT_USB0_DEVGRP_ADDR)
4741 /* The address of the ALT_USB_DEV_DOEPDMA8 register for the ALT_USB0_DEVGRP instance. */
4742 #define ALT_USB0_DEV_DOEPDMA8_ADDR ALT_USB_DEV_DOEPDMA8_ADDR(ALT_USB0_DEVGRP_ADDR)
4743 /* The address of the ALT_USB_DEV_DOEPDMAB8 register for the ALT_USB0_DEVGRP instance. */
4744 #define ALT_USB0_DEV_DOEPDMAB8_ADDR ALT_USB_DEV_DOEPDMAB8_ADDR(ALT_USB0_DEVGRP_ADDR)
4745 /* The address of the ALT_USB_DEV_DOEPCTL9 register for the ALT_USB0_DEVGRP instance. */
4746 #define ALT_USB0_DEV_DOEPCTL9_ADDR ALT_USB_DEV_DOEPCTL9_ADDR(ALT_USB0_DEVGRP_ADDR)
4747 /* The address of the ALT_USB_DEV_DOEPINT9 register for the ALT_USB0_DEVGRP instance. */
4748 #define ALT_USB0_DEV_DOEPINT9_ADDR ALT_USB_DEV_DOEPINT9_ADDR(ALT_USB0_DEVGRP_ADDR)
4749 /* The address of the ALT_USB_DEV_DOEPTSIZ9 register for the ALT_USB0_DEVGRP instance. */
4750 #define ALT_USB0_DEV_DOEPTSIZ9_ADDR ALT_USB_DEV_DOEPTSIZ9_ADDR(ALT_USB0_DEVGRP_ADDR)
4751 /* The address of the ALT_USB_DEV_DOEPDMA9 register for the ALT_USB0_DEVGRP instance. */
4752 #define ALT_USB0_DEV_DOEPDMA9_ADDR ALT_USB_DEV_DOEPDMA9_ADDR(ALT_USB0_DEVGRP_ADDR)
4753 /* The address of the ALT_USB_DEV_DOEPDMAB9 register for the ALT_USB0_DEVGRP instance. */
4754 #define ALT_USB0_DEV_DOEPDMAB9_ADDR ALT_USB_DEV_DOEPDMAB9_ADDR(ALT_USB0_DEVGRP_ADDR)
4755 /* The address of the ALT_USB_DEV_DOEPCTL10 register for the ALT_USB0_DEVGRP instance. */
4756 #define ALT_USB0_DEV_DOEPCTL10_ADDR ALT_USB_DEV_DOEPCTL10_ADDR(ALT_USB0_DEVGRP_ADDR)
4757 /* The address of the ALT_USB_DEV_DOEPINT10 register for the ALT_USB0_DEVGRP instance. */
4758 #define ALT_USB0_DEV_DOEPINT10_ADDR ALT_USB_DEV_DOEPINT10_ADDR(ALT_USB0_DEVGRP_ADDR)
4759 /* The address of the ALT_USB_DEV_DOEPTSIZ10 register for the ALT_USB0_DEVGRP instance. */
4760 #define ALT_USB0_DEV_DOEPTSIZ10_ADDR ALT_USB_DEV_DOEPTSIZ10_ADDR(ALT_USB0_DEVGRP_ADDR)
4761 /* The address of the ALT_USB_DEV_DOEPDMA10 register for the ALT_USB0_DEVGRP instance. */
4762 #define ALT_USB0_DEV_DOEPDMA10_ADDR ALT_USB_DEV_DOEPDMA10_ADDR(ALT_USB0_DEVGRP_ADDR)
4763 /* The address of the ALT_USB_DEV_DOEPDMAB10 register for the ALT_USB0_DEVGRP instance. */
4764 #define ALT_USB0_DEV_DOEPDMAB10_ADDR ALT_USB_DEV_DOEPDMAB10_ADDR(ALT_USB0_DEVGRP_ADDR)
4765 /* The address of the ALT_USB_DEV_DOEPCTL11 register for the ALT_USB0_DEVGRP instance. */
4766 #define ALT_USB0_DEV_DOEPCTL11_ADDR ALT_USB_DEV_DOEPCTL11_ADDR(ALT_USB0_DEVGRP_ADDR)
4767 /* The address of the ALT_USB_DEV_DOEPINT11 register for the ALT_USB0_DEVGRP instance. */
4768 #define ALT_USB0_DEV_DOEPINT11_ADDR ALT_USB_DEV_DOEPINT11_ADDR(ALT_USB0_DEVGRP_ADDR)
4769 /* The address of the ALT_USB_DEV_DOEPTSIZ11 register for the ALT_USB0_DEVGRP instance. */
4770 #define ALT_USB0_DEV_DOEPTSIZ11_ADDR ALT_USB_DEV_DOEPTSIZ11_ADDR(ALT_USB0_DEVGRP_ADDR)
4771 /* The address of the ALT_USB_DEV_DOEPDMA11 register for the ALT_USB0_DEVGRP instance. */
4772 #define ALT_USB0_DEV_DOEPDMA11_ADDR ALT_USB_DEV_DOEPDMA11_ADDR(ALT_USB0_DEVGRP_ADDR)
4773 /* The address of the ALT_USB_DEV_DOEPDMAB11 register for the ALT_USB0_DEVGRP instance. */
4774 #define ALT_USB0_DEV_DOEPDMAB11_ADDR ALT_USB_DEV_DOEPDMAB11_ADDR(ALT_USB0_DEVGRP_ADDR)
4775 /* The address of the ALT_USB_DEV_DOEPCTL12 register for the ALT_USB0_DEVGRP instance. */
4776 #define ALT_USB0_DEV_DOEPCTL12_ADDR ALT_USB_DEV_DOEPCTL12_ADDR(ALT_USB0_DEVGRP_ADDR)
4777 /* The address of the ALT_USB_DEV_DOEPINT12 register for the ALT_USB0_DEVGRP instance. */
4778 #define ALT_USB0_DEV_DOEPINT12_ADDR ALT_USB_DEV_DOEPINT12_ADDR(ALT_USB0_DEVGRP_ADDR)
4779 /* The address of the ALT_USB_DEV_DOEPTSIZ12 register for the ALT_USB0_DEVGRP instance. */
4780 #define ALT_USB0_DEV_DOEPTSIZ12_ADDR ALT_USB_DEV_DOEPTSIZ12_ADDR(ALT_USB0_DEVGRP_ADDR)
4781 /* The address of the ALT_USB_DEV_DOEPDMA12 register for the ALT_USB0_DEVGRP instance. */
4782 #define ALT_USB0_DEV_DOEPDMA12_ADDR ALT_USB_DEV_DOEPDMA12_ADDR(ALT_USB0_DEVGRP_ADDR)
4783 /* The address of the ALT_USB_DEV_DOEPDMAB12 register for the ALT_USB0_DEVGRP instance. */
4784 #define ALT_USB0_DEV_DOEPDMAB12_ADDR ALT_USB_DEV_DOEPDMAB12_ADDR(ALT_USB0_DEVGRP_ADDR)
4785 /* The address of the ALT_USB_DEV_DOEPCTL13 register for the ALT_USB0_DEVGRP instance. */
4786 #define ALT_USB0_DEV_DOEPCTL13_ADDR ALT_USB_DEV_DOEPCTL13_ADDR(ALT_USB0_DEVGRP_ADDR)
4787 /* The address of the ALT_USB_DEV_DOEPINT13 register for the ALT_USB0_DEVGRP instance. */
4788 #define ALT_USB0_DEV_DOEPINT13_ADDR ALT_USB_DEV_DOEPINT13_ADDR(ALT_USB0_DEVGRP_ADDR)
4789 /* The address of the ALT_USB_DEV_DOEPTSIZ13 register for the ALT_USB0_DEVGRP instance. */
4790 #define ALT_USB0_DEV_DOEPTSIZ13_ADDR ALT_USB_DEV_DOEPTSIZ13_ADDR(ALT_USB0_DEVGRP_ADDR)
4791 /* The address of the ALT_USB_DEV_DOEPDMA13 register for the ALT_USB0_DEVGRP instance. */
4792 #define ALT_USB0_DEV_DOEPDMA13_ADDR ALT_USB_DEV_DOEPDMA13_ADDR(ALT_USB0_DEVGRP_ADDR)
4793 /* The address of the ALT_USB_DEV_DOEPDMAB13 register for the ALT_USB0_DEVGRP instance. */
4794 #define ALT_USB0_DEV_DOEPDMAB13_ADDR ALT_USB_DEV_DOEPDMAB13_ADDR(ALT_USB0_DEVGRP_ADDR)
4795 /* The address of the ALT_USB_DEV_DOEPCTL14 register for the ALT_USB0_DEVGRP instance. */
4796 #define ALT_USB0_DEV_DOEPCTL14_ADDR ALT_USB_DEV_DOEPCTL14_ADDR(ALT_USB0_DEVGRP_ADDR)
4797 /* The address of the ALT_USB_DEV_DOEPINT14 register for the ALT_USB0_DEVGRP instance. */
4798 #define ALT_USB0_DEV_DOEPINT14_ADDR ALT_USB_DEV_DOEPINT14_ADDR(ALT_USB0_DEVGRP_ADDR)
4799 /* The address of the ALT_USB_DEV_DOEPTSIZ14 register for the ALT_USB0_DEVGRP instance. */
4800 #define ALT_USB0_DEV_DOEPTSIZ14_ADDR ALT_USB_DEV_DOEPTSIZ14_ADDR(ALT_USB0_DEVGRP_ADDR)
4801 /* The address of the ALT_USB_DEV_DOEPDMA14 register for the ALT_USB0_DEVGRP instance. */
4802 #define ALT_USB0_DEV_DOEPDMA14_ADDR ALT_USB_DEV_DOEPDMA14_ADDR(ALT_USB0_DEVGRP_ADDR)
4803 /* The address of the ALT_USB_DEV_DOEPDMAB14 register for the ALT_USB0_DEVGRP instance. */
4804 #define ALT_USB0_DEV_DOEPDMAB14_ADDR ALT_USB_DEV_DOEPDMAB14_ADDR(ALT_USB0_DEVGRP_ADDR)
4805 /* The address of the ALT_USB_DEV_DOEPCTL15 register for the ALT_USB0_DEVGRP instance. */
4806 #define ALT_USB0_DEV_DOEPCTL15_ADDR ALT_USB_DEV_DOEPCTL15_ADDR(ALT_USB0_DEVGRP_ADDR)
4807 /* The address of the ALT_USB_DEV_DOEPINT15 register for the ALT_USB0_DEVGRP instance. */
4808 #define ALT_USB0_DEV_DOEPINT15_ADDR ALT_USB_DEV_DOEPINT15_ADDR(ALT_USB0_DEVGRP_ADDR)
4809 /* The address of the ALT_USB_DEV_DOEPTSIZ15 register for the ALT_USB0_DEVGRP instance. */
4810 #define ALT_USB0_DEV_DOEPTSIZ15_ADDR ALT_USB_DEV_DOEPTSIZ15_ADDR(ALT_USB0_DEVGRP_ADDR)
4811 /* The address of the ALT_USB_DEV_DOEPDMA15 register for the ALT_USB0_DEVGRP instance. */
4812 #define ALT_USB0_DEV_DOEPDMA15_ADDR ALT_USB_DEV_DOEPDMA15_ADDR(ALT_USB0_DEVGRP_ADDR)
4813 /* The address of the ALT_USB_DEV_DOEPDMAB15 register for the ALT_USB0_DEVGRP instance. */
4814 #define ALT_USB0_DEV_DOEPDMAB15_ADDR ALT_USB_DEV_DOEPDMAB15_ADDR(ALT_USB0_DEVGRP_ADDR)
4815 /* The base address byte offset for the start of the ALT_USB0_DEVGRP component. */
4816 #define ALT_USB0_DEVGRP_OFST 0xffb00800
4817 /* The start address of the ALT_USB0_DEVGRP component. */
4818 #define ALT_USB0_DEVGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DEVGRP_OFST))
4819 /* The lower bound address range of the ALT_USB0_DEVGRP component. */
4820 #define ALT_USB0_DEVGRP_LB_ADDR ALT_USB0_DEVGRP_ADDR
4821 /* The upper bound address range of the ALT_USB0_DEVGRP component. */
4822 #define ALT_USB0_DEVGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DEVGRP_ADDR) + 0x500) - 1))
4823 
4824 
4825 /*
4826  * Component Instance : i_usbotg_0_pwrclkgrp
4827  *
4828  * Instance i_usbotg_0_pwrclkgrp of component ALT_USB_PWRCLK.
4829  *
4830  *
4831  */
4832 /* The address of the ALT_USB_PWRCLK_PCGCCTL register for the ALT_USB0_PWRCLKGRP instance. */
4833 #define ALT_USB0_PWRCLK_PCGCCTL_ADDR ALT_USB_PWRCLK_PCGCCTL_ADDR(ALT_USB0_PWRCLKGRP_ADDR)
4834 /* The base address byte offset for the start of the ALT_USB0_PWRCLKGRP component. */
4835 #define ALT_USB0_PWRCLKGRP_OFST 0xffb00e00
4836 /* The start address of the ALT_USB0_PWRCLKGRP component. */
4837 #define ALT_USB0_PWRCLKGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_PWRCLKGRP_OFST))
4838 /* The lower bound address range of the ALT_USB0_PWRCLKGRP component. */
4839 #define ALT_USB0_PWRCLKGRP_LB_ADDR ALT_USB0_PWRCLKGRP_ADDR
4840 /* The upper bound address range of the ALT_USB0_PWRCLKGRP component. */
4841 #define ALT_USB0_PWRCLKGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_PWRCLKGRP_ADDR) + 0x4) - 1))
4842 
4843 
4844 /*
4845  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_0
4846  *
4847  * Instance i_usbotg_0_DWC_otg_DFIFO_0 of component ALT_USB0_DWC_OTG_DFIFO_0.
4848  *
4849  *
4850  */
4851 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_0 component. */
4852 #define ALT_USB0_DWC_OTG_DFIFO_0_OFST 0xffb01000
4853 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_0 component. */
4854 #define ALT_USB0_DWC_OTG_DFIFO_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_0_OFST))
4855 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_0 component. */
4856 #define ALT_USB0_DWC_OTG_DFIFO_0_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_0_ADDR
4857 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_0 component. */
4858 #define ALT_USB0_DWC_OTG_DFIFO_0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_0_ADDR) + 0x1000) - 1))
4859 
4860 
4861 /*
4862  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_1
4863  *
4864  * Instance i_usbotg_0_DWC_otg_DFIFO_1 of component ALT_USB0_DWC_OTG_DFIFO_1.
4865  *
4866  *
4867  */
4868 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_1 component. */
4869 #define ALT_USB0_DWC_OTG_DFIFO_1_OFST 0xffb02000
4870 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_1 component. */
4871 #define ALT_USB0_DWC_OTG_DFIFO_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_1_OFST))
4872 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_1 component. */
4873 #define ALT_USB0_DWC_OTG_DFIFO_1_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_1_ADDR
4874 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_1 component. */
4875 #define ALT_USB0_DWC_OTG_DFIFO_1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_1_ADDR) + 0x1000) - 1))
4876 
4877 
4878 /*
4879  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_2
4880  *
4881  * Instance i_usbotg_0_DWC_otg_DFIFO_2 of component ALT_USB0_DWC_OTG_DFIFO_2.
4882  *
4883  *
4884  */
4885 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_2 component. */
4886 #define ALT_USB0_DWC_OTG_DFIFO_2_OFST 0xffb03000
4887 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_2 component. */
4888 #define ALT_USB0_DWC_OTG_DFIFO_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_2_OFST))
4889 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_2 component. */
4890 #define ALT_USB0_DWC_OTG_DFIFO_2_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_2_ADDR
4891 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_2 component. */
4892 #define ALT_USB0_DWC_OTG_DFIFO_2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_2_ADDR) + 0x1000) - 1))
4893 
4894 
4895 /*
4896  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_3
4897  *
4898  * Instance i_usbotg_0_DWC_otg_DFIFO_3 of component ALT_USB0_DWC_OTG_DFIFO_3.
4899  *
4900  *
4901  */
4902 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_3 component. */
4903 #define ALT_USB0_DWC_OTG_DFIFO_3_OFST 0xffb04000
4904 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_3 component. */
4905 #define ALT_USB0_DWC_OTG_DFIFO_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_3_OFST))
4906 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_3 component. */
4907 #define ALT_USB0_DWC_OTG_DFIFO_3_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_3_ADDR
4908 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_3 component. */
4909 #define ALT_USB0_DWC_OTG_DFIFO_3_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_3_ADDR) + 0x1000) - 1))
4910 
4911 
4912 /*
4913  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_4
4914  *
4915  * Instance i_usbotg_0_DWC_otg_DFIFO_4 of component ALT_USB0_DWC_OTG_DFIFO_4.
4916  *
4917  *
4918  */
4919 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_4 component. */
4920 #define ALT_USB0_DWC_OTG_DFIFO_4_OFST 0xffb05000
4921 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_4 component. */
4922 #define ALT_USB0_DWC_OTG_DFIFO_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_4_OFST))
4923 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_4 component. */
4924 #define ALT_USB0_DWC_OTG_DFIFO_4_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_4_ADDR
4925 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_4 component. */
4926 #define ALT_USB0_DWC_OTG_DFIFO_4_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_4_ADDR) + 0x1000) - 1))
4927 
4928 
4929 /*
4930  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_5
4931  *
4932  * Instance i_usbotg_0_DWC_otg_DFIFO_5 of component ALT_USB0_DWC_OTG_DFIFO_5.
4933  *
4934  *
4935  */
4936 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_5 component. */
4937 #define ALT_USB0_DWC_OTG_DFIFO_5_OFST 0xffb06000
4938 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_5 component. */
4939 #define ALT_USB0_DWC_OTG_DFIFO_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_5_OFST))
4940 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_5 component. */
4941 #define ALT_USB0_DWC_OTG_DFIFO_5_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_5_ADDR
4942 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_5 component. */
4943 #define ALT_USB0_DWC_OTG_DFIFO_5_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_5_ADDR) + 0x1000) - 1))
4944 
4945 
4946 /*
4947  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_6
4948  *
4949  * Instance i_usbotg_0_DWC_otg_DFIFO_6 of component ALT_USB0_DWC_OTG_DFIFO_6.
4950  *
4951  *
4952  */
4953 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_6 component. */
4954 #define ALT_USB0_DWC_OTG_DFIFO_6_OFST 0xffb07000
4955 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_6 component. */
4956 #define ALT_USB0_DWC_OTG_DFIFO_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_6_OFST))
4957 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_6 component. */
4958 #define ALT_USB0_DWC_OTG_DFIFO_6_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_6_ADDR
4959 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_6 component. */
4960 #define ALT_USB0_DWC_OTG_DFIFO_6_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_6_ADDR) + 0x1000) - 1))
4961 
4962 
4963 /*
4964  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_7
4965  *
4966  * Instance i_usbotg_0_DWC_otg_DFIFO_7 of component ALT_USB0_DWC_OTG_DFIFO_7.
4967  *
4968  *
4969  */
4970 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_7 component. */
4971 #define ALT_USB0_DWC_OTG_DFIFO_7_OFST 0xffb08000
4972 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_7 component. */
4973 #define ALT_USB0_DWC_OTG_DFIFO_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_7_OFST))
4974 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_7 component. */
4975 #define ALT_USB0_DWC_OTG_DFIFO_7_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_7_ADDR
4976 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_7 component. */
4977 #define ALT_USB0_DWC_OTG_DFIFO_7_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_7_ADDR) + 0x1000) - 1))
4978 
4979 
4980 /*
4981  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_8
4982  *
4983  * Instance i_usbotg_0_DWC_otg_DFIFO_8 of component ALT_USB0_DWC_OTG_DFIFO_8.
4984  *
4985  *
4986  */
4987 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_8 component. */
4988 #define ALT_USB0_DWC_OTG_DFIFO_8_OFST 0xffb09000
4989 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_8 component. */
4990 #define ALT_USB0_DWC_OTG_DFIFO_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_8_OFST))
4991 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_8 component. */
4992 #define ALT_USB0_DWC_OTG_DFIFO_8_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_8_ADDR
4993 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_8 component. */
4994 #define ALT_USB0_DWC_OTG_DFIFO_8_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_8_ADDR) + 0x1000) - 1))
4995 
4996 
4997 /*
4998  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_9
4999  *
5000  * Instance i_usbotg_0_DWC_otg_DFIFO_9 of component ALT_USB0_DWC_OTG_DFIFO_9.
5001  *
5002  *
5003  */
5004 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_9 component. */
5005 #define ALT_USB0_DWC_OTG_DFIFO_9_OFST 0xffb0a000
5006 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_9 component. */
5007 #define ALT_USB0_DWC_OTG_DFIFO_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_9_OFST))
5008 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_9 component. */
5009 #define ALT_USB0_DWC_OTG_DFIFO_9_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_9_ADDR
5010 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_9 component. */
5011 #define ALT_USB0_DWC_OTG_DFIFO_9_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_9_ADDR) + 0x1000) - 1))
5012 
5013 
5014 /*
5015  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_10
5016  *
5017  * Instance i_usbotg_0_DWC_otg_DFIFO_10 of component ALT_USB0_DWC_OTG_DFIFO_10.
5018  *
5019  *
5020  */
5021 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_10 component. */
5022 #define ALT_USB0_DWC_OTG_DFIFO_10_OFST 0xffb0b000
5023 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_10 component. */
5024 #define ALT_USB0_DWC_OTG_DFIFO_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_10_OFST))
5025 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_10 component. */
5026 #define ALT_USB0_DWC_OTG_DFIFO_10_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_10_ADDR
5027 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_10 component. */
5028 #define ALT_USB0_DWC_OTG_DFIFO_10_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_10_ADDR) + 0x1000) - 1))
5029 
5030 
5031 /*
5032  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_11
5033  *
5034  * Instance i_usbotg_0_DWC_otg_DFIFO_11 of component ALT_USB0_DWC_OTG_DFIFO_11.
5035  *
5036  *
5037  */
5038 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_11 component. */
5039 #define ALT_USB0_DWC_OTG_DFIFO_11_OFST 0xffb0c000
5040 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_11 component. */
5041 #define ALT_USB0_DWC_OTG_DFIFO_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_11_OFST))
5042 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_11 component. */
5043 #define ALT_USB0_DWC_OTG_DFIFO_11_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_11_ADDR
5044 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_11 component. */
5045 #define ALT_USB0_DWC_OTG_DFIFO_11_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_11_ADDR) + 0x1000) - 1))
5046 
5047 
5048 /*
5049  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_12
5050  *
5051  * Instance i_usbotg_0_DWC_otg_DFIFO_12 of component ALT_USB0_DWC_OTG_DFIFO_12.
5052  *
5053  *
5054  */
5055 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_12 component. */
5056 #define ALT_USB0_DWC_OTG_DFIFO_12_OFST 0xffb0d000
5057 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_12 component. */
5058 #define ALT_USB0_DWC_OTG_DFIFO_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_12_OFST))
5059 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_12 component. */
5060 #define ALT_USB0_DWC_OTG_DFIFO_12_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_12_ADDR
5061 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_12 component. */
5062 #define ALT_USB0_DWC_OTG_DFIFO_12_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_12_ADDR) + 0x1000) - 1))
5063 
5064 
5065 /*
5066  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_13
5067  *
5068  * Instance i_usbotg_0_DWC_otg_DFIFO_13 of component ALT_USB0_DWC_OTG_DFIFO_13.
5069  *
5070  *
5071  */
5072 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_13 component. */
5073 #define ALT_USB0_DWC_OTG_DFIFO_13_OFST 0xffb0e000
5074 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_13 component. */
5075 #define ALT_USB0_DWC_OTG_DFIFO_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_13_OFST))
5076 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_13 component. */
5077 #define ALT_USB0_DWC_OTG_DFIFO_13_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_13_ADDR
5078 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_13 component. */
5079 #define ALT_USB0_DWC_OTG_DFIFO_13_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_13_ADDR) + 0x1000) - 1))
5080 
5081 
5082 /*
5083  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_14
5084  *
5085  * Instance i_usbotg_0_DWC_otg_DFIFO_14 of component ALT_USB0_DWC_OTG_DFIFO_14.
5086  *
5087  *
5088  */
5089 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_14 component. */
5090 #define ALT_USB0_DWC_OTG_DFIFO_14_OFST 0xffb0f000
5091 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_14 component. */
5092 #define ALT_USB0_DWC_OTG_DFIFO_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_14_OFST))
5093 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_14 component. */
5094 #define ALT_USB0_DWC_OTG_DFIFO_14_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_14_ADDR
5095 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_14 component. */
5096 #define ALT_USB0_DWC_OTG_DFIFO_14_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_14_ADDR) + 0x1000) - 1))
5097 
5098 
5099 /*
5100  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_15
5101  *
5102  * Instance i_usbotg_0_DWC_otg_DFIFO_15 of component ALT_USB0_DWC_OTG_DFIFO_15.
5103  *
5104  *
5105  */
5106 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_15 component. */
5107 #define ALT_USB0_DWC_OTG_DFIFO_15_OFST 0xffb10000
5108 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_15 component. */
5109 #define ALT_USB0_DWC_OTG_DFIFO_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_15_OFST))
5110 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_15 component. */
5111 #define ALT_USB0_DWC_OTG_DFIFO_15_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_15_ADDR
5112 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_15 component. */
5113 #define ALT_USB0_DWC_OTG_DFIFO_15_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_15_ADDR) + 0x1000) - 1))
5114 
5115 
5116 /*
5117  * Component Instance : i_usbotg_0_DWC_otg_DFIFO_Direct_access
5118  *
5119  * Instance i_usbotg_0_DWC_otg_DFIFO_Direct_access of component ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS.
5120  *
5121  *
5122  */
5123 /* The base address byte offset for the start of the ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS component. */
5124 #define ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_OFST 0xffb20000
5125 /* The start address of the ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS component. */
5126 #define ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_OFST))
5127 /* The lower bound address range of the ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS component. */
5128 #define ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_ADDR
5129 /* The upper bound address range of the ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS component. */
5130 #define ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_ADDR) + 0x20000) - 1))
5131 
5132 
5133 /*
5134  * Component Instance : i_usbotg_1_globgrp
5135  *
5136  * Instance i_usbotg_1_globgrp of component ALT_USB_GLOB.
5137  *
5138  *
5139  */
5140 /* The address of the ALT_USB_GLOB_GOTGCTL register for the ALT_USB1_GLOBGRP instance. */
5141 #define ALT_USB1_GLOB_GOTGCTL_ADDR ALT_USB_GLOB_GOTGCTL_ADDR(ALT_USB1_GLOBGRP_ADDR)
5142 /* The address of the ALT_USB_GLOB_GOTGINT register for the ALT_USB1_GLOBGRP instance. */
5143 #define ALT_USB1_GLOB_GOTGINT_ADDR ALT_USB_GLOB_GOTGINT_ADDR(ALT_USB1_GLOBGRP_ADDR)
5144 /* The address of the ALT_USB_GLOB_GAHBCFG register for the ALT_USB1_GLOBGRP instance. */
5145 #define ALT_USB1_GLOB_GAHBCFG_ADDR ALT_USB_GLOB_GAHBCFG_ADDR(ALT_USB1_GLOBGRP_ADDR)
5146 /* The address of the ALT_USB_GLOB_GUSBCFG register for the ALT_USB1_GLOBGRP instance. */
5147 #define ALT_USB1_GLOB_GUSBCFG_ADDR ALT_USB_GLOB_GUSBCFG_ADDR(ALT_USB1_GLOBGRP_ADDR)
5148 /* The address of the ALT_USB_GLOB_GRSTCTL register for the ALT_USB1_GLOBGRP instance. */
5149 #define ALT_USB1_GLOB_GRSTCTL_ADDR ALT_USB_GLOB_GRSTCTL_ADDR(ALT_USB1_GLOBGRP_ADDR)
5150 /* The address of the ALT_USB_GLOB_GINTSTS register for the ALT_USB1_GLOBGRP instance. */
5151 #define ALT_USB1_GLOB_GINTSTS_ADDR ALT_USB_GLOB_GINTSTS_ADDR(ALT_USB1_GLOBGRP_ADDR)
5152 /* The address of the ALT_USB_GLOB_GINTMSK register for the ALT_USB1_GLOBGRP instance. */
5153 #define ALT_USB1_GLOB_GINTMSK_ADDR ALT_USB_GLOB_GINTMSK_ADDR(ALT_USB1_GLOBGRP_ADDR)
5154 /* The address of the ALT_USB_GLOB_GRXSTSR register for the ALT_USB1_GLOBGRP instance. */
5155 #define ALT_USB1_GLOB_GRXSTSR_ADDR ALT_USB_GLOB_GRXSTSR_ADDR(ALT_USB1_GLOBGRP_ADDR)
5156 /* The address of the ALT_USB_GLOB_GRXSTSP register for the ALT_USB1_GLOBGRP instance. */
5157 #define ALT_USB1_GLOB_GRXSTSP_ADDR ALT_USB_GLOB_GRXSTSP_ADDR(ALT_USB1_GLOBGRP_ADDR)
5158 /* The address of the ALT_USB_GLOB_GRXFSIZ register for the ALT_USB1_GLOBGRP instance. */
5159 #define ALT_USB1_GLOB_GRXFSIZ_ADDR ALT_USB_GLOB_GRXFSIZ_ADDR(ALT_USB1_GLOBGRP_ADDR)
5160 /* The address of the ALT_USB_GLOB_GNPTXFSIZ register for the ALT_USB1_GLOBGRP instance. */
5161 #define ALT_USB1_GLOB_GNPTXFSIZ_ADDR ALT_USB_GLOB_GNPTXFSIZ_ADDR(ALT_USB1_GLOBGRP_ADDR)
5162 /* The address of the ALT_USB_GLOB_GNPTXSTS register for the ALT_USB1_GLOBGRP instance. */
5163 #define ALT_USB1_GLOB_GNPTXSTS_ADDR ALT_USB_GLOB_GNPTXSTS_ADDR(ALT_USB1_GLOBGRP_ADDR)
5164 /* The address of the ALT_USB_GLOB_GPVNDCTL register for the ALT_USB1_GLOBGRP instance. */
5165 #define ALT_USB1_GLOB_GPVNDCTL_ADDR ALT_USB_GLOB_GPVNDCTL_ADDR(ALT_USB1_GLOBGRP_ADDR)
5166 /* The address of the ALT_USB_GLOB_GGPIO register for the ALT_USB1_GLOBGRP instance. */
5167 #define ALT_USB1_GLOB_GGPIO_ADDR ALT_USB_GLOB_GGPIO_ADDR(ALT_USB1_GLOBGRP_ADDR)
5168 /* The address of the ALT_USB_GLOB_GUID register for the ALT_USB1_GLOBGRP instance. */
5169 #define ALT_USB1_GLOB_GUID_ADDR ALT_USB_GLOB_GUID_ADDR(ALT_USB1_GLOBGRP_ADDR)
5170 /* The address of the ALT_USB_GLOB_GSNPSID register for the ALT_USB1_GLOBGRP instance. */
5171 #define ALT_USB1_GLOB_GSNPSID_ADDR ALT_USB_GLOB_GSNPSID_ADDR(ALT_USB1_GLOBGRP_ADDR)
5172 /* The address of the ALT_USB_GLOB_GHWCFG1 register for the ALT_USB1_GLOBGRP instance. */
5173 #define ALT_USB1_GLOB_GHWCFG1_ADDR ALT_USB_GLOB_GHWCFG1_ADDR(ALT_USB1_GLOBGRP_ADDR)
5174 /* The address of the ALT_USB_GLOB_GHWCFG2 register for the ALT_USB1_GLOBGRP instance. */
5175 #define ALT_USB1_GLOB_GHWCFG2_ADDR ALT_USB_GLOB_GHWCFG2_ADDR(ALT_USB1_GLOBGRP_ADDR)
5176 /* The address of the ALT_USB_GLOB_GHWCFG3 register for the ALT_USB1_GLOBGRP instance. */
5177 #define ALT_USB1_GLOB_GHWCFG3_ADDR ALT_USB_GLOB_GHWCFG3_ADDR(ALT_USB1_GLOBGRP_ADDR)
5178 /* The address of the ALT_USB_GLOB_GHWCFG4 register for the ALT_USB1_GLOBGRP instance. */
5179 #define ALT_USB1_GLOB_GHWCFG4_ADDR ALT_USB_GLOB_GHWCFG4_ADDR(ALT_USB1_GLOBGRP_ADDR)
5180 /* The address of the ALT_USB_GLOB_GDFIFOCFG register for the ALT_USB1_GLOBGRP instance. */
5181 #define ALT_USB1_GLOB_GDFIFOCFG_ADDR ALT_USB_GLOB_GDFIFOCFG_ADDR(ALT_USB1_GLOBGRP_ADDR)
5182 /* The address of the ALT_USB_GLOB_HPTXFSIZ register for the ALT_USB1_GLOBGRP instance. */
5183 #define ALT_USB1_GLOB_HPTXFSIZ_ADDR ALT_USB_GLOB_HPTXFSIZ_ADDR(ALT_USB1_GLOBGRP_ADDR)
5184 /* The address of the ALT_USB_GLOB_DIEPTXF1 register for the ALT_USB1_GLOBGRP instance. */
5185 #define ALT_USB1_GLOB_DIEPTXF1_ADDR ALT_USB_GLOB_DIEPTXF1_ADDR(ALT_USB1_GLOBGRP_ADDR)
5186 /* The address of the ALT_USB_GLOB_DIEPTXF2 register for the ALT_USB1_GLOBGRP instance. */
5187 #define ALT_USB1_GLOB_DIEPTXF2_ADDR ALT_USB_GLOB_DIEPTXF2_ADDR(ALT_USB1_GLOBGRP_ADDR)
5188 /* The address of the ALT_USB_GLOB_DIEPTXF3 register for the ALT_USB1_GLOBGRP instance. */
5189 #define ALT_USB1_GLOB_DIEPTXF3_ADDR ALT_USB_GLOB_DIEPTXF3_ADDR(ALT_USB1_GLOBGRP_ADDR)
5190 /* The address of the ALT_USB_GLOB_DIEPTXF4 register for the ALT_USB1_GLOBGRP instance. */
5191 #define ALT_USB1_GLOB_DIEPTXF4_ADDR ALT_USB_GLOB_DIEPTXF4_ADDR(ALT_USB1_GLOBGRP_ADDR)
5192 /* The address of the ALT_USB_GLOB_DIEPTXF5 register for the ALT_USB1_GLOBGRP instance. */
5193 #define ALT_USB1_GLOB_DIEPTXF5_ADDR ALT_USB_GLOB_DIEPTXF5_ADDR(ALT_USB1_GLOBGRP_ADDR)
5194 /* The address of the ALT_USB_GLOB_DIEPTXF6 register for the ALT_USB1_GLOBGRP instance. */
5195 #define ALT_USB1_GLOB_DIEPTXF6_ADDR ALT_USB_GLOB_DIEPTXF6_ADDR(ALT_USB1_GLOBGRP_ADDR)
5196 /* The address of the ALT_USB_GLOB_DIEPTXF7 register for the ALT_USB1_GLOBGRP instance. */
5197 #define ALT_USB1_GLOB_DIEPTXF7_ADDR ALT_USB_GLOB_DIEPTXF7_ADDR(ALT_USB1_GLOBGRP_ADDR)
5198 /* The address of the ALT_USB_GLOB_DIEPTXF8 register for the ALT_USB1_GLOBGRP instance. */
5199 #define ALT_USB1_GLOB_DIEPTXF8_ADDR ALT_USB_GLOB_DIEPTXF8_ADDR(ALT_USB1_GLOBGRP_ADDR)
5200 /* The address of the ALT_USB_GLOB_DIEPTXF9 register for the ALT_USB1_GLOBGRP instance. */
5201 #define ALT_USB1_GLOB_DIEPTXF9_ADDR ALT_USB_GLOB_DIEPTXF9_ADDR(ALT_USB1_GLOBGRP_ADDR)
5202 /* The address of the ALT_USB_GLOB_DIEPTXF10 register for the ALT_USB1_GLOBGRP instance. */
5203 #define ALT_USB1_GLOB_DIEPTXF10_ADDR ALT_USB_GLOB_DIEPTXF10_ADDR(ALT_USB1_GLOBGRP_ADDR)
5204 /* The address of the ALT_USB_GLOB_DIEPTXF11 register for the ALT_USB1_GLOBGRP instance. */
5205 #define ALT_USB1_GLOB_DIEPTXF11_ADDR ALT_USB_GLOB_DIEPTXF11_ADDR(ALT_USB1_GLOBGRP_ADDR)
5206 /* The address of the ALT_USB_GLOB_DIEPTXF12 register for the ALT_USB1_GLOBGRP instance. */
5207 #define ALT_USB1_GLOB_DIEPTXF12_ADDR ALT_USB_GLOB_DIEPTXF12_ADDR(ALT_USB1_GLOBGRP_ADDR)
5208 /* The address of the ALT_USB_GLOB_DIEPTXF13 register for the ALT_USB1_GLOBGRP instance. */
5209 #define ALT_USB1_GLOB_DIEPTXF13_ADDR ALT_USB_GLOB_DIEPTXF13_ADDR(ALT_USB1_GLOBGRP_ADDR)
5210 /* The address of the ALT_USB_GLOB_DIEPTXF14 register for the ALT_USB1_GLOBGRP instance. */
5211 #define ALT_USB1_GLOB_DIEPTXF14_ADDR ALT_USB_GLOB_DIEPTXF14_ADDR(ALT_USB1_GLOBGRP_ADDR)
5212 /* The address of the ALT_USB_GLOB_DIEPTXF15 register for the ALT_USB1_GLOBGRP instance. */
5213 #define ALT_USB1_GLOB_DIEPTXF15_ADDR ALT_USB_GLOB_DIEPTXF15_ADDR(ALT_USB1_GLOBGRP_ADDR)
5214 /* The base address byte offset for the start of the ALT_USB1_GLOBGRP component. */
5215 #define ALT_USB1_GLOBGRP_OFST 0xffb40000
5216 /* The start address of the ALT_USB1_GLOBGRP component. */
5217 #define ALT_USB1_GLOBGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_GLOBGRP_OFST))
5218 /* The lower bound address range of the ALT_USB1_GLOBGRP component. */
5219 #define ALT_USB1_GLOBGRP_LB_ADDR ALT_USB1_GLOBGRP_ADDR
5220 /* The upper bound address range of the ALT_USB1_GLOBGRP component. */
5221 #define ALT_USB1_GLOBGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_GLOBGRP_ADDR) + 0x140) - 1))
5222 
5223 
5224 /*
5225  * Component Instance : i_usbotg_1_hostgrp
5226  *
5227  * Instance i_usbotg_1_hostgrp of component ALT_USB_HOST.
5228  *
5229  *
5230  */
5231 /* The address of the ALT_USB_HOST_HCFG register for the ALT_USB1_HOSTGRP instance. */
5232 #define ALT_USB1_HOST_HCFG_ADDR ALT_USB_HOST_HCFG_ADDR(ALT_USB1_HOSTGRP_ADDR)
5233 /* The address of the ALT_USB_HOST_HFIR register for the ALT_USB1_HOSTGRP instance. */
5234 #define ALT_USB1_HOST_HFIR_ADDR ALT_USB_HOST_HFIR_ADDR(ALT_USB1_HOSTGRP_ADDR)
5235 /* The address of the ALT_USB_HOST_HFNUM register for the ALT_USB1_HOSTGRP instance. */
5236 #define ALT_USB1_HOST_HFNUM_ADDR ALT_USB_HOST_HFNUM_ADDR(ALT_USB1_HOSTGRP_ADDR)
5237 /* The address of the ALT_USB_HOST_HPTXSTS register for the ALT_USB1_HOSTGRP instance. */
5238 #define ALT_USB1_HOST_HPTXSTS_ADDR ALT_USB_HOST_HPTXSTS_ADDR(ALT_USB1_HOSTGRP_ADDR)
5239 /* The address of the ALT_USB_HOST_HAINT register for the ALT_USB1_HOSTGRP instance. */
5240 #define ALT_USB1_HOST_HAINT_ADDR ALT_USB_HOST_HAINT_ADDR(ALT_USB1_HOSTGRP_ADDR)
5241 /* The address of the ALT_USB_HOST_HAINTMSK register for the ALT_USB1_HOSTGRP instance. */
5242 #define ALT_USB1_HOST_HAINTMSK_ADDR ALT_USB_HOST_HAINTMSK_ADDR(ALT_USB1_HOSTGRP_ADDR)
5243 /* The address of the ALT_USB_HOST_HFLBADDR register for the ALT_USB1_HOSTGRP instance. */
5244 #define ALT_USB1_HOST_HFLBADDR_ADDR ALT_USB_HOST_HFLBADDR_ADDR(ALT_USB1_HOSTGRP_ADDR)
5245 /* The address of the ALT_USB_HOST_HPRT register for the ALT_USB1_HOSTGRP instance. */
5246 #define ALT_USB1_HOST_HPRT_ADDR ALT_USB_HOST_HPRT_ADDR(ALT_USB1_HOSTGRP_ADDR)
5247 /* The address of the ALT_USB_HOST_HCCHAR0 register for the ALT_USB1_HOSTGRP instance. */
5248 #define ALT_USB1_HOST_HCCHAR0_ADDR ALT_USB_HOST_HCCHAR0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5249 /* The address of the ALT_USB_HOST_HCSPLT0 register for the ALT_USB1_HOSTGRP instance. */
5250 #define ALT_USB1_HOST_HCSPLT0_ADDR ALT_USB_HOST_HCSPLT0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5251 /* The address of the ALT_USB_HOST_HCINT0 register for the ALT_USB1_HOSTGRP instance. */
5252 #define ALT_USB1_HOST_HCINT0_ADDR ALT_USB_HOST_HCINT0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5253 /* The address of the ALT_USB_HOST_HCINTMSK0 register for the ALT_USB1_HOSTGRP instance. */
5254 #define ALT_USB1_HOST_HCINTMSK0_ADDR ALT_USB_HOST_HCINTMSK0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5255 /* The address of the ALT_USB_HOST_HCTSIZ0 register for the ALT_USB1_HOSTGRP instance. */
5256 #define ALT_USB1_HOST_HCTSIZ0_ADDR ALT_USB_HOST_HCTSIZ0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5257 /* The address of the ALT_USB_HOST_HCDMA0 register for the ALT_USB1_HOSTGRP instance. */
5258 #define ALT_USB1_HOST_HCDMA0_ADDR ALT_USB_HOST_HCDMA0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5259 /* The address of the ALT_USB_HOST_HCDMAB0 register for the ALT_USB1_HOSTGRP instance. */
5260 #define ALT_USB1_HOST_HCDMAB0_ADDR ALT_USB_HOST_HCDMAB0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5261 /* The address of the ALT_USB_HOST_HCCHAR1 register for the ALT_USB1_HOSTGRP instance. */
5262 #define ALT_USB1_HOST_HCCHAR1_ADDR ALT_USB_HOST_HCCHAR1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5263 /* The address of the ALT_USB_HOST_HCSPLT1 register for the ALT_USB1_HOSTGRP instance. */
5264 #define ALT_USB1_HOST_HCSPLT1_ADDR ALT_USB_HOST_HCSPLT1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5265 /* The address of the ALT_USB_HOST_HCINT1 register for the ALT_USB1_HOSTGRP instance. */
5266 #define ALT_USB1_HOST_HCINT1_ADDR ALT_USB_HOST_HCINT1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5267 /* The address of the ALT_USB_HOST_HCINTMSK1 register for the ALT_USB1_HOSTGRP instance. */
5268 #define ALT_USB1_HOST_HCINTMSK1_ADDR ALT_USB_HOST_HCINTMSK1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5269 /* The address of the ALT_USB_HOST_HCTSIZ1 register for the ALT_USB1_HOSTGRP instance. */
5270 #define ALT_USB1_HOST_HCTSIZ1_ADDR ALT_USB_HOST_HCTSIZ1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5271 /* The address of the ALT_USB_HOST_HCDMA1 register for the ALT_USB1_HOSTGRP instance. */
5272 #define ALT_USB1_HOST_HCDMA1_ADDR ALT_USB_HOST_HCDMA1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5273 /* The address of the ALT_USB_HOST_HCDMAB1 register for the ALT_USB1_HOSTGRP instance. */
5274 #define ALT_USB1_HOST_HCDMAB1_ADDR ALT_USB_HOST_HCDMAB1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5275 /* The address of the ALT_USB_HOST_HCCHAR2 register for the ALT_USB1_HOSTGRP instance. */
5276 #define ALT_USB1_HOST_HCCHAR2_ADDR ALT_USB_HOST_HCCHAR2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5277 /* The address of the ALT_USB_HOST_HCSPLT2 register for the ALT_USB1_HOSTGRP instance. */
5278 #define ALT_USB1_HOST_HCSPLT2_ADDR ALT_USB_HOST_HCSPLT2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5279 /* The address of the ALT_USB_HOST_HCINT2 register for the ALT_USB1_HOSTGRP instance. */
5280 #define ALT_USB1_HOST_HCINT2_ADDR ALT_USB_HOST_HCINT2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5281 /* The address of the ALT_USB_HOST_HCINTMSK2 register for the ALT_USB1_HOSTGRP instance. */
5282 #define ALT_USB1_HOST_HCINTMSK2_ADDR ALT_USB_HOST_HCINTMSK2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5283 /* The address of the ALT_USB_HOST_HCTSIZ2 register for the ALT_USB1_HOSTGRP instance. */
5284 #define ALT_USB1_HOST_HCTSIZ2_ADDR ALT_USB_HOST_HCTSIZ2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5285 /* The address of the ALT_USB_HOST_HCDMA2 register for the ALT_USB1_HOSTGRP instance. */
5286 #define ALT_USB1_HOST_HCDMA2_ADDR ALT_USB_HOST_HCDMA2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5287 /* The address of the ALT_USB_HOST_HCDMAB2 register for the ALT_USB1_HOSTGRP instance. */
5288 #define ALT_USB1_HOST_HCDMAB2_ADDR ALT_USB_HOST_HCDMAB2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5289 /* The address of the ALT_USB_HOST_HCCHAR3 register for the ALT_USB1_HOSTGRP instance. */
5290 #define ALT_USB1_HOST_HCCHAR3_ADDR ALT_USB_HOST_HCCHAR3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5291 /* The address of the ALT_USB_HOST_HCSPLT3 register for the ALT_USB1_HOSTGRP instance. */
5292 #define ALT_USB1_HOST_HCSPLT3_ADDR ALT_USB_HOST_HCSPLT3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5293 /* The address of the ALT_USB_HOST_HCINT3 register for the ALT_USB1_HOSTGRP instance. */
5294 #define ALT_USB1_HOST_HCINT3_ADDR ALT_USB_HOST_HCINT3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5295 /* The address of the ALT_USB_HOST_HCINTMSK3 register for the ALT_USB1_HOSTGRP instance. */
5296 #define ALT_USB1_HOST_HCINTMSK3_ADDR ALT_USB_HOST_HCINTMSK3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5297 /* The address of the ALT_USB_HOST_HCTSIZ3 register for the ALT_USB1_HOSTGRP instance. */
5298 #define ALT_USB1_HOST_HCTSIZ3_ADDR ALT_USB_HOST_HCTSIZ3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5299 /* The address of the ALT_USB_HOST_HCDMA3 register for the ALT_USB1_HOSTGRP instance. */
5300 #define ALT_USB1_HOST_HCDMA3_ADDR ALT_USB_HOST_HCDMA3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5301 /* The address of the ALT_USB_HOST_HCDMAB3 register for the ALT_USB1_HOSTGRP instance. */
5302 #define ALT_USB1_HOST_HCDMAB3_ADDR ALT_USB_HOST_HCDMAB3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5303 /* The address of the ALT_USB_HOST_HCCHAR4 register for the ALT_USB1_HOSTGRP instance. */
5304 #define ALT_USB1_HOST_HCCHAR4_ADDR ALT_USB_HOST_HCCHAR4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5305 /* The address of the ALT_USB_HOST_HCSPLT4 register for the ALT_USB1_HOSTGRP instance. */
5306 #define ALT_USB1_HOST_HCSPLT4_ADDR ALT_USB_HOST_HCSPLT4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5307 /* The address of the ALT_USB_HOST_HCINT4 register for the ALT_USB1_HOSTGRP instance. */
5308 #define ALT_USB1_HOST_HCINT4_ADDR ALT_USB_HOST_HCINT4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5309 /* The address of the ALT_USB_HOST_HCINTMSK4 register for the ALT_USB1_HOSTGRP instance. */
5310 #define ALT_USB1_HOST_HCINTMSK4_ADDR ALT_USB_HOST_HCINTMSK4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5311 /* The address of the ALT_USB_HOST_HCTSIZ4 register for the ALT_USB1_HOSTGRP instance. */
5312 #define ALT_USB1_HOST_HCTSIZ4_ADDR ALT_USB_HOST_HCTSIZ4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5313 /* The address of the ALT_USB_HOST_HCDMA4 register for the ALT_USB1_HOSTGRP instance. */
5314 #define ALT_USB1_HOST_HCDMA4_ADDR ALT_USB_HOST_HCDMA4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5315 /* The address of the ALT_USB_HOST_HCDMAB4 register for the ALT_USB1_HOSTGRP instance. */
5316 #define ALT_USB1_HOST_HCDMAB4_ADDR ALT_USB_HOST_HCDMAB4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5317 /* The address of the ALT_USB_HOST_HCCHAR5 register for the ALT_USB1_HOSTGRP instance. */
5318 #define ALT_USB1_HOST_HCCHAR5_ADDR ALT_USB_HOST_HCCHAR5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5319 /* The address of the ALT_USB_HOST_HCSPLT5 register for the ALT_USB1_HOSTGRP instance. */
5320 #define ALT_USB1_HOST_HCSPLT5_ADDR ALT_USB_HOST_HCSPLT5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5321 /* The address of the ALT_USB_HOST_HCINT5 register for the ALT_USB1_HOSTGRP instance. */
5322 #define ALT_USB1_HOST_HCINT5_ADDR ALT_USB_HOST_HCINT5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5323 /* The address of the ALT_USB_HOST_HCINTMSK5 register for the ALT_USB1_HOSTGRP instance. */
5324 #define ALT_USB1_HOST_HCINTMSK5_ADDR ALT_USB_HOST_HCINTMSK5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5325 /* The address of the ALT_USB_HOST_HCTSIZ5 register for the ALT_USB1_HOSTGRP instance. */
5326 #define ALT_USB1_HOST_HCTSIZ5_ADDR ALT_USB_HOST_HCTSIZ5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5327 /* The address of the ALT_USB_HOST_HCDMA5 register for the ALT_USB1_HOSTGRP instance. */
5328 #define ALT_USB1_HOST_HCDMA5_ADDR ALT_USB_HOST_HCDMA5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5329 /* The address of the ALT_USB_HOST_HCDMAB5 register for the ALT_USB1_HOSTGRP instance. */
5330 #define ALT_USB1_HOST_HCDMAB5_ADDR ALT_USB_HOST_HCDMAB5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5331 /* The address of the ALT_USB_HOST_HCCHAR6 register for the ALT_USB1_HOSTGRP instance. */
5332 #define ALT_USB1_HOST_HCCHAR6_ADDR ALT_USB_HOST_HCCHAR6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5333 /* The address of the ALT_USB_HOST_HCSPLT6 register for the ALT_USB1_HOSTGRP instance. */
5334 #define ALT_USB1_HOST_HCSPLT6_ADDR ALT_USB_HOST_HCSPLT6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5335 /* The address of the ALT_USB_HOST_HCINT6 register for the ALT_USB1_HOSTGRP instance. */
5336 #define ALT_USB1_HOST_HCINT6_ADDR ALT_USB_HOST_HCINT6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5337 /* The address of the ALT_USB_HOST_HCINTMSK6 register for the ALT_USB1_HOSTGRP instance. */
5338 #define ALT_USB1_HOST_HCINTMSK6_ADDR ALT_USB_HOST_HCINTMSK6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5339 /* The address of the ALT_USB_HOST_HCTSIZ6 register for the ALT_USB1_HOSTGRP instance. */
5340 #define ALT_USB1_HOST_HCTSIZ6_ADDR ALT_USB_HOST_HCTSIZ6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5341 /* The address of the ALT_USB_HOST_HCDMA6 register for the ALT_USB1_HOSTGRP instance. */
5342 #define ALT_USB1_HOST_HCDMA6_ADDR ALT_USB_HOST_HCDMA6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5343 /* The address of the ALT_USB_HOST_HCDMAB6 register for the ALT_USB1_HOSTGRP instance. */
5344 #define ALT_USB1_HOST_HCDMAB6_ADDR ALT_USB_HOST_HCDMAB6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5345 /* The address of the ALT_USB_HOST_HCCHAR7 register for the ALT_USB1_HOSTGRP instance. */
5346 #define ALT_USB1_HOST_HCCHAR7_ADDR ALT_USB_HOST_HCCHAR7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5347 /* The address of the ALT_USB_HOST_HCSPLT7 register for the ALT_USB1_HOSTGRP instance. */
5348 #define ALT_USB1_HOST_HCSPLT7_ADDR ALT_USB_HOST_HCSPLT7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5349 /* The address of the ALT_USB_HOST_HCINT7 register for the ALT_USB1_HOSTGRP instance. */
5350 #define ALT_USB1_HOST_HCINT7_ADDR ALT_USB_HOST_HCINT7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5351 /* The address of the ALT_USB_HOST_HCINTMSK7 register for the ALT_USB1_HOSTGRP instance. */
5352 #define ALT_USB1_HOST_HCINTMSK7_ADDR ALT_USB_HOST_HCINTMSK7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5353 /* The address of the ALT_USB_HOST_HCTSIZ7 register for the ALT_USB1_HOSTGRP instance. */
5354 #define ALT_USB1_HOST_HCTSIZ7_ADDR ALT_USB_HOST_HCTSIZ7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5355 /* The address of the ALT_USB_HOST_HCDMA7 register for the ALT_USB1_HOSTGRP instance. */
5356 #define ALT_USB1_HOST_HCDMA7_ADDR ALT_USB_HOST_HCDMA7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5357 /* The address of the ALT_USB_HOST_HCDMAB7 register for the ALT_USB1_HOSTGRP instance. */
5358 #define ALT_USB1_HOST_HCDMAB7_ADDR ALT_USB_HOST_HCDMAB7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5359 /* The address of the ALT_USB_HOST_HCCHAR8 register for the ALT_USB1_HOSTGRP instance. */
5360 #define ALT_USB1_HOST_HCCHAR8_ADDR ALT_USB_HOST_HCCHAR8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5361 /* The address of the ALT_USB_HOST_HCSPLT8 register for the ALT_USB1_HOSTGRP instance. */
5362 #define ALT_USB1_HOST_HCSPLT8_ADDR ALT_USB_HOST_HCSPLT8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5363 /* The address of the ALT_USB_HOST_HCINT8 register for the ALT_USB1_HOSTGRP instance. */
5364 #define ALT_USB1_HOST_HCINT8_ADDR ALT_USB_HOST_HCINT8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5365 /* The address of the ALT_USB_HOST_HCINTMSK8 register for the ALT_USB1_HOSTGRP instance. */
5366 #define ALT_USB1_HOST_HCINTMSK8_ADDR ALT_USB_HOST_HCINTMSK8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5367 /* The address of the ALT_USB_HOST_HCTSIZ8 register for the ALT_USB1_HOSTGRP instance. */
5368 #define ALT_USB1_HOST_HCTSIZ8_ADDR ALT_USB_HOST_HCTSIZ8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5369 /* The address of the ALT_USB_HOST_HCDMA8 register for the ALT_USB1_HOSTGRP instance. */
5370 #define ALT_USB1_HOST_HCDMA8_ADDR ALT_USB_HOST_HCDMA8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5371 /* The address of the ALT_USB_HOST_HCDMAB8 register for the ALT_USB1_HOSTGRP instance. */
5372 #define ALT_USB1_HOST_HCDMAB8_ADDR ALT_USB_HOST_HCDMAB8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5373 /* The address of the ALT_USB_HOST_HCCHAR9 register for the ALT_USB1_HOSTGRP instance. */
5374 #define ALT_USB1_HOST_HCCHAR9_ADDR ALT_USB_HOST_HCCHAR9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5375 /* The address of the ALT_USB_HOST_HCSPLT9 register for the ALT_USB1_HOSTGRP instance. */
5376 #define ALT_USB1_HOST_HCSPLT9_ADDR ALT_USB_HOST_HCSPLT9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5377 /* The address of the ALT_USB_HOST_HCINT9 register for the ALT_USB1_HOSTGRP instance. */
5378 #define ALT_USB1_HOST_HCINT9_ADDR ALT_USB_HOST_HCINT9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5379 /* The address of the ALT_USB_HOST_HCINTMSK9 register for the ALT_USB1_HOSTGRP instance. */
5380 #define ALT_USB1_HOST_HCINTMSK9_ADDR ALT_USB_HOST_HCINTMSK9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5381 /* The address of the ALT_USB_HOST_HCTSIZ9 register for the ALT_USB1_HOSTGRP instance. */
5382 #define ALT_USB1_HOST_HCTSIZ9_ADDR ALT_USB_HOST_HCTSIZ9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5383 /* The address of the ALT_USB_HOST_HCDMA9 register for the ALT_USB1_HOSTGRP instance. */
5384 #define ALT_USB1_HOST_HCDMA9_ADDR ALT_USB_HOST_HCDMA9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5385 /* The address of the ALT_USB_HOST_HCDMAB9 register for the ALT_USB1_HOSTGRP instance. */
5386 #define ALT_USB1_HOST_HCDMAB9_ADDR ALT_USB_HOST_HCDMAB9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5387 /* The address of the ALT_USB_HOST_HCCHAR10 register for the ALT_USB1_HOSTGRP instance. */
5388 #define ALT_USB1_HOST_HCCHAR10_ADDR ALT_USB_HOST_HCCHAR10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5389 /* The address of the ALT_USB_HOST_HCSPLT10 register for the ALT_USB1_HOSTGRP instance. */
5390 #define ALT_USB1_HOST_HCSPLT10_ADDR ALT_USB_HOST_HCSPLT10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5391 /* The address of the ALT_USB_HOST_HCINT10 register for the ALT_USB1_HOSTGRP instance. */
5392 #define ALT_USB1_HOST_HCINT10_ADDR ALT_USB_HOST_HCINT10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5393 /* The address of the ALT_USB_HOST_HCINTMSK10 register for the ALT_USB1_HOSTGRP instance. */
5394 #define ALT_USB1_HOST_HCINTMSK10_ADDR ALT_USB_HOST_HCINTMSK10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5395 /* The address of the ALT_USB_HOST_HCTSIZ10 register for the ALT_USB1_HOSTGRP instance. */
5396 #define ALT_USB1_HOST_HCTSIZ10_ADDR ALT_USB_HOST_HCTSIZ10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5397 /* The address of the ALT_USB_HOST_HCDMA10 register for the ALT_USB1_HOSTGRP instance. */
5398 #define ALT_USB1_HOST_HCDMA10_ADDR ALT_USB_HOST_HCDMA10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5399 /* The address of the ALT_USB_HOST_HCDMAB10 register for the ALT_USB1_HOSTGRP instance. */
5400 #define ALT_USB1_HOST_HCDMAB10_ADDR ALT_USB_HOST_HCDMAB10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5401 /* The address of the ALT_USB_HOST_HCCHAR11 register for the ALT_USB1_HOSTGRP instance. */
5402 #define ALT_USB1_HOST_HCCHAR11_ADDR ALT_USB_HOST_HCCHAR11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5403 /* The address of the ALT_USB_HOST_HCSPLT11 register for the ALT_USB1_HOSTGRP instance. */
5404 #define ALT_USB1_HOST_HCSPLT11_ADDR ALT_USB_HOST_HCSPLT11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5405 /* The address of the ALT_USB_HOST_HCINT11 register for the ALT_USB1_HOSTGRP instance. */
5406 #define ALT_USB1_HOST_HCINT11_ADDR ALT_USB_HOST_HCINT11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5407 /* The address of the ALT_USB_HOST_HCINTMSK11 register for the ALT_USB1_HOSTGRP instance. */
5408 #define ALT_USB1_HOST_HCINTMSK11_ADDR ALT_USB_HOST_HCINTMSK11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5409 /* The address of the ALT_USB_HOST_HCTSIZ11 register for the ALT_USB1_HOSTGRP instance. */
5410 #define ALT_USB1_HOST_HCTSIZ11_ADDR ALT_USB_HOST_HCTSIZ11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5411 /* The address of the ALT_USB_HOST_HCDMA11 register for the ALT_USB1_HOSTGRP instance. */
5412 #define ALT_USB1_HOST_HCDMA11_ADDR ALT_USB_HOST_HCDMA11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5413 /* The address of the ALT_USB_HOST_HCDMAB11 register for the ALT_USB1_HOSTGRP instance. */
5414 #define ALT_USB1_HOST_HCDMAB11_ADDR ALT_USB_HOST_HCDMAB11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5415 /* The address of the ALT_USB_HOST_HCCHAR12 register for the ALT_USB1_HOSTGRP instance. */
5416 #define ALT_USB1_HOST_HCCHAR12_ADDR ALT_USB_HOST_HCCHAR12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5417 /* The address of the ALT_USB_HOST_HCSPLT12 register for the ALT_USB1_HOSTGRP instance. */
5418 #define ALT_USB1_HOST_HCSPLT12_ADDR ALT_USB_HOST_HCSPLT12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5419 /* The address of the ALT_USB_HOST_HCINT12 register for the ALT_USB1_HOSTGRP instance. */
5420 #define ALT_USB1_HOST_HCINT12_ADDR ALT_USB_HOST_HCINT12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5421 /* The address of the ALT_USB_HOST_HCINTMSK12 register for the ALT_USB1_HOSTGRP instance. */
5422 #define ALT_USB1_HOST_HCINTMSK12_ADDR ALT_USB_HOST_HCINTMSK12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5423 /* The address of the ALT_USB_HOST_HCTSIZ12 register for the ALT_USB1_HOSTGRP instance. */
5424 #define ALT_USB1_HOST_HCTSIZ12_ADDR ALT_USB_HOST_HCTSIZ12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5425 /* The address of the ALT_USB_HOST_HCDMA12 register for the ALT_USB1_HOSTGRP instance. */
5426 #define ALT_USB1_HOST_HCDMA12_ADDR ALT_USB_HOST_HCDMA12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5427 /* The address of the ALT_USB_HOST_HCDMAB12 register for the ALT_USB1_HOSTGRP instance. */
5428 #define ALT_USB1_HOST_HCDMAB12_ADDR ALT_USB_HOST_HCDMAB12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5429 /* The address of the ALT_USB_HOST_HCCHAR13 register for the ALT_USB1_HOSTGRP instance. */
5430 #define ALT_USB1_HOST_HCCHAR13_ADDR ALT_USB_HOST_HCCHAR13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5431 /* The address of the ALT_USB_HOST_HCSPLT13 register for the ALT_USB1_HOSTGRP instance. */
5432 #define ALT_USB1_HOST_HCSPLT13_ADDR ALT_USB_HOST_HCSPLT13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5433 /* The address of the ALT_USB_HOST_HCINT13 register for the ALT_USB1_HOSTGRP instance. */
5434 #define ALT_USB1_HOST_HCINT13_ADDR ALT_USB_HOST_HCINT13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5435 /* The address of the ALT_USB_HOST_HCINTMSK13 register for the ALT_USB1_HOSTGRP instance. */
5436 #define ALT_USB1_HOST_HCINTMSK13_ADDR ALT_USB_HOST_HCINTMSK13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5437 /* The address of the ALT_USB_HOST_HCTSIZ13 register for the ALT_USB1_HOSTGRP instance. */
5438 #define ALT_USB1_HOST_HCTSIZ13_ADDR ALT_USB_HOST_HCTSIZ13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5439 /* The address of the ALT_USB_HOST_HCDMA13 register for the ALT_USB1_HOSTGRP instance. */
5440 #define ALT_USB1_HOST_HCDMA13_ADDR ALT_USB_HOST_HCDMA13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5441 /* The address of the ALT_USB_HOST_HCDMAB13 register for the ALT_USB1_HOSTGRP instance. */
5442 #define ALT_USB1_HOST_HCDMAB13_ADDR ALT_USB_HOST_HCDMAB13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5443 /* The address of the ALT_USB_HOST_HCCHAR14 register for the ALT_USB1_HOSTGRP instance. */
5444 #define ALT_USB1_HOST_HCCHAR14_ADDR ALT_USB_HOST_HCCHAR14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5445 /* The address of the ALT_USB_HOST_HCSPLT14 register for the ALT_USB1_HOSTGRP instance. */
5446 #define ALT_USB1_HOST_HCSPLT14_ADDR ALT_USB_HOST_HCSPLT14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5447 /* The address of the ALT_USB_HOST_HCINT14 register for the ALT_USB1_HOSTGRP instance. */
5448 #define ALT_USB1_HOST_HCINT14_ADDR ALT_USB_HOST_HCINT14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5449 /* The address of the ALT_USB_HOST_HCINTMSK14 register for the ALT_USB1_HOSTGRP instance. */
5450 #define ALT_USB1_HOST_HCINTMSK14_ADDR ALT_USB_HOST_HCINTMSK14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5451 /* The address of the ALT_USB_HOST_HCTSIZ14 register for the ALT_USB1_HOSTGRP instance. */
5452 #define ALT_USB1_HOST_HCTSIZ14_ADDR ALT_USB_HOST_HCTSIZ14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5453 /* The address of the ALT_USB_HOST_HCDMA14 register for the ALT_USB1_HOSTGRP instance. */
5454 #define ALT_USB1_HOST_HCDMA14_ADDR ALT_USB_HOST_HCDMA14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5455 /* The address of the ALT_USB_HOST_HCDMAB14 register for the ALT_USB1_HOSTGRP instance. */
5456 #define ALT_USB1_HOST_HCDMAB14_ADDR ALT_USB_HOST_HCDMAB14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5457 /* The address of the ALT_USB_HOST_HCCHAR15 register for the ALT_USB1_HOSTGRP instance. */
5458 #define ALT_USB1_HOST_HCCHAR15_ADDR ALT_USB_HOST_HCCHAR15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5459 /* The address of the ALT_USB_HOST_HCSPLT15 register for the ALT_USB1_HOSTGRP instance. */
5460 #define ALT_USB1_HOST_HCSPLT15_ADDR ALT_USB_HOST_HCSPLT15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5461 /* The address of the ALT_USB_HOST_HCINT15 register for the ALT_USB1_HOSTGRP instance. */
5462 #define ALT_USB1_HOST_HCINT15_ADDR ALT_USB_HOST_HCINT15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5463 /* The address of the ALT_USB_HOST_HCINTMSK15 register for the ALT_USB1_HOSTGRP instance. */
5464 #define ALT_USB1_HOST_HCINTMSK15_ADDR ALT_USB_HOST_HCINTMSK15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5465 /* The address of the ALT_USB_HOST_HCTSIZ15 register for the ALT_USB1_HOSTGRP instance. */
5466 #define ALT_USB1_HOST_HCTSIZ15_ADDR ALT_USB_HOST_HCTSIZ15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5467 /* The address of the ALT_USB_HOST_HCDMA15 register for the ALT_USB1_HOSTGRP instance. */
5468 #define ALT_USB1_HOST_HCDMA15_ADDR ALT_USB_HOST_HCDMA15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5469 /* The address of the ALT_USB_HOST_HCDMAB15 register for the ALT_USB1_HOSTGRP instance. */
5470 #define ALT_USB1_HOST_HCDMAB15_ADDR ALT_USB_HOST_HCDMAB15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5471 /* The base address byte offset for the start of the ALT_USB1_HOSTGRP component. */
5472 #define ALT_USB1_HOSTGRP_OFST 0xffb40400
5473 /* The start address of the ALT_USB1_HOSTGRP component. */
5474 #define ALT_USB1_HOSTGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_HOSTGRP_OFST))
5475 /* The lower bound address range of the ALT_USB1_HOSTGRP component. */
5476 #define ALT_USB1_HOSTGRP_LB_ADDR ALT_USB1_HOSTGRP_ADDR
5477 /* The upper bound address range of the ALT_USB1_HOSTGRP component. */
5478 #define ALT_USB1_HOSTGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_HOSTGRP_ADDR) + 0x300) - 1))
5479 
5480 
5481 /*
5482  * Component Instance : i_usbotg_1_devgrp
5483  *
5484  * Instance i_usbotg_1_devgrp of component ALT_USB_DEV.
5485  *
5486  *
5487  */
5488 /* The address of the ALT_USB_DEV_DCFG register for the ALT_USB1_DEVGRP instance. */
5489 #define ALT_USB1_DEV_DCFG_ADDR ALT_USB_DEV_DCFG_ADDR(ALT_USB1_DEVGRP_ADDR)
5490 /* The address of the ALT_USB_DEV_DCTL register for the ALT_USB1_DEVGRP instance. */
5491 #define ALT_USB1_DEV_DCTL_ADDR ALT_USB_DEV_DCTL_ADDR(ALT_USB1_DEVGRP_ADDR)
5492 /* The address of the ALT_USB_DEV_DSTS register for the ALT_USB1_DEVGRP instance. */
5493 #define ALT_USB1_DEV_DSTS_ADDR ALT_USB_DEV_DSTS_ADDR(ALT_USB1_DEVGRP_ADDR)
5494 /* The address of the ALT_USB_DEV_DIEPMSK register for the ALT_USB1_DEVGRP instance. */
5495 #define ALT_USB1_DEV_DIEPMSK_ADDR ALT_USB_DEV_DIEPMSK_ADDR(ALT_USB1_DEVGRP_ADDR)
5496 /* The address of the ALT_USB_DEV_DOEPMSK register for the ALT_USB1_DEVGRP instance. */
5497 #define ALT_USB1_DEV_DOEPMSK_ADDR ALT_USB_DEV_DOEPMSK_ADDR(ALT_USB1_DEVGRP_ADDR)
5498 /* The address of the ALT_USB_DEV_DAINT register for the ALT_USB1_DEVGRP instance. */
5499 #define ALT_USB1_DEV_DAINT_ADDR ALT_USB_DEV_DAINT_ADDR(ALT_USB1_DEVGRP_ADDR)
5500 /* The address of the ALT_USB_DEV_DAINTMSK register for the ALT_USB1_DEVGRP instance. */
5501 #define ALT_USB1_DEV_DAINTMSK_ADDR ALT_USB_DEV_DAINTMSK_ADDR(ALT_USB1_DEVGRP_ADDR)
5502 /* The address of the ALT_USB_DEV_DVBUSDIS register for the ALT_USB1_DEVGRP instance. */
5503 #define ALT_USB1_DEV_DVBUSDIS_ADDR ALT_USB_DEV_DVBUSDIS_ADDR(ALT_USB1_DEVGRP_ADDR)
5504 /* The address of the ALT_USB_DEV_DVBUSPULSE register for the ALT_USB1_DEVGRP instance. */
5505 #define ALT_USB1_DEV_DVBUSPULSE_ADDR ALT_USB_DEV_DVBUSPULSE_ADDR(ALT_USB1_DEVGRP_ADDR)
5506 /* The address of the ALT_USB_DEV_DTHRCTL register for the ALT_USB1_DEVGRP instance. */
5507 #define ALT_USB1_DEV_DTHRCTL_ADDR ALT_USB_DEV_DTHRCTL_ADDR(ALT_USB1_DEVGRP_ADDR)
5508 /* The address of the ALT_USB_DEV_DIEPEMPMSK register for the ALT_USB1_DEVGRP instance. */
5509 #define ALT_USB1_DEV_DIEPEMPMSK_ADDR ALT_USB_DEV_DIEPEMPMSK_ADDR(ALT_USB1_DEVGRP_ADDR)
5510 /* The address of the ALT_USB_DEV_DIEPCTL0 register for the ALT_USB1_DEVGRP instance. */
5511 #define ALT_USB1_DEV_DIEPCTL0_ADDR ALT_USB_DEV_DIEPCTL0_ADDR(ALT_USB1_DEVGRP_ADDR)
5512 /* The address of the ALT_USB_DEV_DIEPINT0 register for the ALT_USB1_DEVGRP instance. */
5513 #define ALT_USB1_DEV_DIEPINT0_ADDR ALT_USB_DEV_DIEPINT0_ADDR(ALT_USB1_DEVGRP_ADDR)
5514 /* The address of the ALT_USB_DEV_DIEPTSIZ0 register for the ALT_USB1_DEVGRP instance. */
5515 #define ALT_USB1_DEV_DIEPTSIZ0_ADDR ALT_USB_DEV_DIEPTSIZ0_ADDR(ALT_USB1_DEVGRP_ADDR)
5516 /* The address of the ALT_USB_DEV_DIEPDMA0 register for the ALT_USB1_DEVGRP instance. */
5517 #define ALT_USB1_DEV_DIEPDMA0_ADDR ALT_USB_DEV_DIEPDMA0_ADDR(ALT_USB1_DEVGRP_ADDR)
5518 /* The address of the ALT_USB_DEV_DTXFSTS0 register for the ALT_USB1_DEVGRP instance. */
5519 #define ALT_USB1_DEV_DTXFSTS0_ADDR ALT_USB_DEV_DTXFSTS0_ADDR(ALT_USB1_DEVGRP_ADDR)
5520 /* The address of the ALT_USB_DEV_DIEPDMAB0 register for the ALT_USB1_DEVGRP instance. */
5521 #define ALT_USB1_DEV_DIEPDMAB0_ADDR ALT_USB_DEV_DIEPDMAB0_ADDR(ALT_USB1_DEVGRP_ADDR)
5522 /* The address of the ALT_USB_DEV_DIEPCTL1 register for the ALT_USB1_DEVGRP instance. */
5523 #define ALT_USB1_DEV_DIEPCTL1_ADDR ALT_USB_DEV_DIEPCTL1_ADDR(ALT_USB1_DEVGRP_ADDR)
5524 /* The address of the ALT_USB_DEV_DIEPINT1 register for the ALT_USB1_DEVGRP instance. */
5525 #define ALT_USB1_DEV_DIEPINT1_ADDR ALT_USB_DEV_DIEPINT1_ADDR(ALT_USB1_DEVGRP_ADDR)
5526 /* The address of the ALT_USB_DEV_DIEPTSIZ1 register for the ALT_USB1_DEVGRP instance. */
5527 #define ALT_USB1_DEV_DIEPTSIZ1_ADDR ALT_USB_DEV_DIEPTSIZ1_ADDR(ALT_USB1_DEVGRP_ADDR)
5528 /* The address of the ALT_USB_DEV_DIEPDMA1 register for the ALT_USB1_DEVGRP instance. */
5529 #define ALT_USB1_DEV_DIEPDMA1_ADDR ALT_USB_DEV_DIEPDMA1_ADDR(ALT_USB1_DEVGRP_ADDR)
5530 /* The address of the ALT_USB_DEV_DTXFSTS1 register for the ALT_USB1_DEVGRP instance. */
5531 #define ALT_USB1_DEV_DTXFSTS1_ADDR ALT_USB_DEV_DTXFSTS1_ADDR(ALT_USB1_DEVGRP_ADDR)
5532 /* The address of the ALT_USB_DEV_DIEPDMAB1 register for the ALT_USB1_DEVGRP instance. */
5533 #define ALT_USB1_DEV_DIEPDMAB1_ADDR ALT_USB_DEV_DIEPDMAB1_ADDR(ALT_USB1_DEVGRP_ADDR)
5534 /* The address of the ALT_USB_DEV_DIEPCTL2 register for the ALT_USB1_DEVGRP instance. */
5535 #define ALT_USB1_DEV_DIEPCTL2_ADDR ALT_USB_DEV_DIEPCTL2_ADDR(ALT_USB1_DEVGRP_ADDR)
5536 /* The address of the ALT_USB_DEV_DIEPINT2 register for the ALT_USB1_DEVGRP instance. */
5537 #define ALT_USB1_DEV_DIEPINT2_ADDR ALT_USB_DEV_DIEPINT2_ADDR(ALT_USB1_DEVGRP_ADDR)
5538 /* The address of the ALT_USB_DEV_DIEPTSIZ2 register for the ALT_USB1_DEVGRP instance. */
5539 #define ALT_USB1_DEV_DIEPTSIZ2_ADDR ALT_USB_DEV_DIEPTSIZ2_ADDR(ALT_USB1_DEVGRP_ADDR)
5540 /* The address of the ALT_USB_DEV_DIEPDMA2 register for the ALT_USB1_DEVGRP instance. */
5541 #define ALT_USB1_DEV_DIEPDMA2_ADDR ALT_USB_DEV_DIEPDMA2_ADDR(ALT_USB1_DEVGRP_ADDR)
5542 /* The address of the ALT_USB_DEV_DTXFSTS2 register for the ALT_USB1_DEVGRP instance. */
5543 #define ALT_USB1_DEV_DTXFSTS2_ADDR ALT_USB_DEV_DTXFSTS2_ADDR(ALT_USB1_DEVGRP_ADDR)
5544 /* The address of the ALT_USB_DEV_DIEPDMAB2 register for the ALT_USB1_DEVGRP instance. */
5545 #define ALT_USB1_DEV_DIEPDMAB2_ADDR ALT_USB_DEV_DIEPDMAB2_ADDR(ALT_USB1_DEVGRP_ADDR)
5546 /* The address of the ALT_USB_DEV_DIEPCTL3 register for the ALT_USB1_DEVGRP instance. */
5547 #define ALT_USB1_DEV_DIEPCTL3_ADDR ALT_USB_DEV_DIEPCTL3_ADDR(ALT_USB1_DEVGRP_ADDR)
5548 /* The address of the ALT_USB_DEV_DIEPINT3 register for the ALT_USB1_DEVGRP instance. */
5549 #define ALT_USB1_DEV_DIEPINT3_ADDR ALT_USB_DEV_DIEPINT3_ADDR(ALT_USB1_DEVGRP_ADDR)
5550 /* The address of the ALT_USB_DEV_DIEPTSIZ3 register for the ALT_USB1_DEVGRP instance. */
5551 #define ALT_USB1_DEV_DIEPTSIZ3_ADDR ALT_USB_DEV_DIEPTSIZ3_ADDR(ALT_USB1_DEVGRP_ADDR)
5552 /* The address of the ALT_USB_DEV_DIEPDMA3 register for the ALT_USB1_DEVGRP instance. */
5553 #define ALT_USB1_DEV_DIEPDMA3_ADDR ALT_USB_DEV_DIEPDMA3_ADDR(ALT_USB1_DEVGRP_ADDR)
5554 /* The address of the ALT_USB_DEV_DTXFSTS3 register for the ALT_USB1_DEVGRP instance. */
5555 #define ALT_USB1_DEV_DTXFSTS3_ADDR ALT_USB_DEV_DTXFSTS3_ADDR(ALT_USB1_DEVGRP_ADDR)
5556 /* The address of the ALT_USB_DEV_DIEPDMAB3 register for the ALT_USB1_DEVGRP instance. */
5557 #define ALT_USB1_DEV_DIEPDMAB3_ADDR ALT_USB_DEV_DIEPDMAB3_ADDR(ALT_USB1_DEVGRP_ADDR)
5558 /* The address of the ALT_USB_DEV_DIEPCTL4 register for the ALT_USB1_DEVGRP instance. */
5559 #define ALT_USB1_DEV_DIEPCTL4_ADDR ALT_USB_DEV_DIEPCTL4_ADDR(ALT_USB1_DEVGRP_ADDR)
5560 /* The address of the ALT_USB_DEV_DIEPINT4 register for the ALT_USB1_DEVGRP instance. */
5561 #define ALT_USB1_DEV_DIEPINT4_ADDR ALT_USB_DEV_DIEPINT4_ADDR(ALT_USB1_DEVGRP_ADDR)
5562 /* The address of the ALT_USB_DEV_DIEPTSIZ4 register for the ALT_USB1_DEVGRP instance. */
5563 #define ALT_USB1_DEV_DIEPTSIZ4_ADDR ALT_USB_DEV_DIEPTSIZ4_ADDR(ALT_USB1_DEVGRP_ADDR)
5564 /* The address of the ALT_USB_DEV_DIEPDMA4 register for the ALT_USB1_DEVGRP instance. */
5565 #define ALT_USB1_DEV_DIEPDMA4_ADDR ALT_USB_DEV_DIEPDMA4_ADDR(ALT_USB1_DEVGRP_ADDR)
5566 /* The address of the ALT_USB_DEV_DTXFSTS4 register for the ALT_USB1_DEVGRP instance. */
5567 #define ALT_USB1_DEV_DTXFSTS4_ADDR ALT_USB_DEV_DTXFSTS4_ADDR(ALT_USB1_DEVGRP_ADDR)
5568 /* The address of the ALT_USB_DEV_DIEPDMAB4 register for the ALT_USB1_DEVGRP instance. */
5569 #define ALT_USB1_DEV_DIEPDMAB4_ADDR ALT_USB_DEV_DIEPDMAB4_ADDR(ALT_USB1_DEVGRP_ADDR)
5570 /* The address of the ALT_USB_DEV_DIEPCTL5 register for the ALT_USB1_DEVGRP instance. */
5571 #define ALT_USB1_DEV_DIEPCTL5_ADDR ALT_USB_DEV_DIEPCTL5_ADDR(ALT_USB1_DEVGRP_ADDR)
5572 /* The address of the ALT_USB_DEV_DIEPINT5 register for the ALT_USB1_DEVGRP instance. */
5573 #define ALT_USB1_DEV_DIEPINT5_ADDR ALT_USB_DEV_DIEPINT5_ADDR(ALT_USB1_DEVGRP_ADDR)
5574 /* The address of the ALT_USB_DEV_DIEPTSIZ5 register for the ALT_USB1_DEVGRP instance. */
5575 #define ALT_USB1_DEV_DIEPTSIZ5_ADDR ALT_USB_DEV_DIEPTSIZ5_ADDR(ALT_USB1_DEVGRP_ADDR)
5576 /* The address of the ALT_USB_DEV_DIEPDMA5 register for the ALT_USB1_DEVGRP instance. */
5577 #define ALT_USB1_DEV_DIEPDMA5_ADDR ALT_USB_DEV_DIEPDMA5_ADDR(ALT_USB1_DEVGRP_ADDR)
5578 /* The address of the ALT_USB_DEV_DTXFSTS5 register for the ALT_USB1_DEVGRP instance. */
5579 #define ALT_USB1_DEV_DTXFSTS5_ADDR ALT_USB_DEV_DTXFSTS5_ADDR(ALT_USB1_DEVGRP_ADDR)
5580 /* The address of the ALT_USB_DEV_DIEPDMAB5 register for the ALT_USB1_DEVGRP instance. */
5581 #define ALT_USB1_DEV_DIEPDMAB5_ADDR ALT_USB_DEV_DIEPDMAB5_ADDR(ALT_USB1_DEVGRP_ADDR)
5582 /* The address of the ALT_USB_DEV_DIEPCTL6 register for the ALT_USB1_DEVGRP instance. */
5583 #define ALT_USB1_DEV_DIEPCTL6_ADDR ALT_USB_DEV_DIEPCTL6_ADDR(ALT_USB1_DEVGRP_ADDR)
5584 /* The address of the ALT_USB_DEV_DIEPINT6 register for the ALT_USB1_DEVGRP instance. */
5585 #define ALT_USB1_DEV_DIEPINT6_ADDR ALT_USB_DEV_DIEPINT6_ADDR(ALT_USB1_DEVGRP_ADDR)
5586 /* The address of the ALT_USB_DEV_DIEPTSIZ6 register for the ALT_USB1_DEVGRP instance. */
5587 #define ALT_USB1_DEV_DIEPTSIZ6_ADDR ALT_USB_DEV_DIEPTSIZ6_ADDR(ALT_USB1_DEVGRP_ADDR)
5588 /* The address of the ALT_USB_DEV_DIEPDMA6 register for the ALT_USB1_DEVGRP instance. */
5589 #define ALT_USB1_DEV_DIEPDMA6_ADDR ALT_USB_DEV_DIEPDMA6_ADDR(ALT_USB1_DEVGRP_ADDR)
5590 /* The address of the ALT_USB_DEV_DTXFSTS6 register for the ALT_USB1_DEVGRP instance. */
5591 #define ALT_USB1_DEV_DTXFSTS6_ADDR ALT_USB_DEV_DTXFSTS6_ADDR(ALT_USB1_DEVGRP_ADDR)
5592 /* The address of the ALT_USB_DEV_DIEPDMAB6 register for the ALT_USB1_DEVGRP instance. */
5593 #define ALT_USB1_DEV_DIEPDMAB6_ADDR ALT_USB_DEV_DIEPDMAB6_ADDR(ALT_USB1_DEVGRP_ADDR)
5594 /* The address of the ALT_USB_DEV_DIEPCTL7 register for the ALT_USB1_DEVGRP instance. */
5595 #define ALT_USB1_DEV_DIEPCTL7_ADDR ALT_USB_DEV_DIEPCTL7_ADDR(ALT_USB1_DEVGRP_ADDR)
5596 /* The address of the ALT_USB_DEV_DIEPINT7 register for the ALT_USB1_DEVGRP instance. */
5597 #define ALT_USB1_DEV_DIEPINT7_ADDR ALT_USB_DEV_DIEPINT7_ADDR(ALT_USB1_DEVGRP_ADDR)
5598 /* The address of the ALT_USB_DEV_DIEPTSIZ7 register for the ALT_USB1_DEVGRP instance. */
5599 #define ALT_USB1_DEV_DIEPTSIZ7_ADDR ALT_USB_DEV_DIEPTSIZ7_ADDR(ALT_USB1_DEVGRP_ADDR)
5600 /* The address of the ALT_USB_DEV_DIEPDMA7 register for the ALT_USB1_DEVGRP instance. */
5601 #define ALT_USB1_DEV_DIEPDMA7_ADDR ALT_USB_DEV_DIEPDMA7_ADDR(ALT_USB1_DEVGRP_ADDR)
5602 /* The address of the ALT_USB_DEV_DTXFSTS7 register for the ALT_USB1_DEVGRP instance. */
5603 #define ALT_USB1_DEV_DTXFSTS7_ADDR ALT_USB_DEV_DTXFSTS7_ADDR(ALT_USB1_DEVGRP_ADDR)
5604 /* The address of the ALT_USB_DEV_DIEPDMAB7 register for the ALT_USB1_DEVGRP instance. */
5605 #define ALT_USB1_DEV_DIEPDMAB7_ADDR ALT_USB_DEV_DIEPDMAB7_ADDR(ALT_USB1_DEVGRP_ADDR)
5606 /* The address of the ALT_USB_DEV_DIEPCTL8 register for the ALT_USB1_DEVGRP instance. */
5607 #define ALT_USB1_DEV_DIEPCTL8_ADDR ALT_USB_DEV_DIEPCTL8_ADDR(ALT_USB1_DEVGRP_ADDR)
5608 /* The address of the ALT_USB_DEV_DIEPINT8 register for the ALT_USB1_DEVGRP instance. */
5609 #define ALT_USB1_DEV_DIEPINT8_ADDR ALT_USB_DEV_DIEPINT8_ADDR(ALT_USB1_DEVGRP_ADDR)
5610 /* The address of the ALT_USB_DEV_DIEPTSIZ8 register for the ALT_USB1_DEVGRP instance. */
5611 #define ALT_USB1_DEV_DIEPTSIZ8_ADDR ALT_USB_DEV_DIEPTSIZ8_ADDR(ALT_USB1_DEVGRP_ADDR)
5612 /* The address of the ALT_USB_DEV_DIEPDMA8 register for the ALT_USB1_DEVGRP instance. */
5613 #define ALT_USB1_DEV_DIEPDMA8_ADDR ALT_USB_DEV_DIEPDMA8_ADDR(ALT_USB1_DEVGRP_ADDR)
5614 /* The address of the ALT_USB_DEV_DTXFSTS8 register for the ALT_USB1_DEVGRP instance. */
5615 #define ALT_USB1_DEV_DTXFSTS8_ADDR ALT_USB_DEV_DTXFSTS8_ADDR(ALT_USB1_DEVGRP_ADDR)
5616 /* The address of the ALT_USB_DEV_DIEPDMAB8 register for the ALT_USB1_DEVGRP instance. */
5617 #define ALT_USB1_DEV_DIEPDMAB8_ADDR ALT_USB_DEV_DIEPDMAB8_ADDR(ALT_USB1_DEVGRP_ADDR)
5618 /* The address of the ALT_USB_DEV_DIEPCTL9 register for the ALT_USB1_DEVGRP instance. */
5619 #define ALT_USB1_DEV_DIEPCTL9_ADDR ALT_USB_DEV_DIEPCTL9_ADDR(ALT_USB1_DEVGRP_ADDR)
5620 /* The address of the ALT_USB_DEV_DIEPINT9 register for the ALT_USB1_DEVGRP instance. */
5621 #define ALT_USB1_DEV_DIEPINT9_ADDR ALT_USB_DEV_DIEPINT9_ADDR(ALT_USB1_DEVGRP_ADDR)
5622 /* The address of the ALT_USB_DEV_DIEPTSIZ9 register for the ALT_USB1_DEVGRP instance. */
5623 #define ALT_USB1_DEV_DIEPTSIZ9_ADDR ALT_USB_DEV_DIEPTSIZ9_ADDR(ALT_USB1_DEVGRP_ADDR)
5624 /* The address of the ALT_USB_DEV_DIEPDMA9 register for the ALT_USB1_DEVGRP instance. */
5625 #define ALT_USB1_DEV_DIEPDMA9_ADDR ALT_USB_DEV_DIEPDMA9_ADDR(ALT_USB1_DEVGRP_ADDR)
5626 /* The address of the ALT_USB_DEV_DTXFSTS9 register for the ALT_USB1_DEVGRP instance. */
5627 #define ALT_USB1_DEV_DTXFSTS9_ADDR ALT_USB_DEV_DTXFSTS9_ADDR(ALT_USB1_DEVGRP_ADDR)
5628 /* The address of the ALT_USB_DEV_DIEPDMAB9 register for the ALT_USB1_DEVGRP instance. */
5629 #define ALT_USB1_DEV_DIEPDMAB9_ADDR ALT_USB_DEV_DIEPDMAB9_ADDR(ALT_USB1_DEVGRP_ADDR)
5630 /* The address of the ALT_USB_DEV_DIEPCTL10 register for the ALT_USB1_DEVGRP instance. */
5631 #define ALT_USB1_DEV_DIEPCTL10_ADDR ALT_USB_DEV_DIEPCTL10_ADDR(ALT_USB1_DEVGRP_ADDR)
5632 /* The address of the ALT_USB_DEV_DIEPINT10 register for the ALT_USB1_DEVGRP instance. */
5633 #define ALT_USB1_DEV_DIEPINT10_ADDR ALT_USB_DEV_DIEPINT10_ADDR(ALT_USB1_DEVGRP_ADDR)
5634 /* The address of the ALT_USB_DEV_DIEPTSIZ10 register for the ALT_USB1_DEVGRP instance. */
5635 #define ALT_USB1_DEV_DIEPTSIZ10_ADDR ALT_USB_DEV_DIEPTSIZ10_ADDR(ALT_USB1_DEVGRP_ADDR)
5636 /* The address of the ALT_USB_DEV_DIEPDMA10 register for the ALT_USB1_DEVGRP instance. */
5637 #define ALT_USB1_DEV_DIEPDMA10_ADDR ALT_USB_DEV_DIEPDMA10_ADDR(ALT_USB1_DEVGRP_ADDR)
5638 /* The address of the ALT_USB_DEV_DTXFSTS10 register for the ALT_USB1_DEVGRP instance. */
5639 #define ALT_USB1_DEV_DTXFSTS10_ADDR ALT_USB_DEV_DTXFSTS10_ADDR(ALT_USB1_DEVGRP_ADDR)
5640 /* The address of the ALT_USB_DEV_DIEPDMAB10 register for the ALT_USB1_DEVGRP instance. */
5641 #define ALT_USB1_DEV_DIEPDMAB10_ADDR ALT_USB_DEV_DIEPDMAB10_ADDR(ALT_USB1_DEVGRP_ADDR)
5642 /* The address of the ALT_USB_DEV_DIEPCTL11 register for the ALT_USB1_DEVGRP instance. */
5643 #define ALT_USB1_DEV_DIEPCTL11_ADDR ALT_USB_DEV_DIEPCTL11_ADDR(ALT_USB1_DEVGRP_ADDR)
5644 /* The address of the ALT_USB_DEV_DIEPINT11 register for the ALT_USB1_DEVGRP instance. */
5645 #define ALT_USB1_DEV_DIEPINT11_ADDR ALT_USB_DEV_DIEPINT11_ADDR(ALT_USB1_DEVGRP_ADDR)
5646 /* The address of the ALT_USB_DEV_DIEPTSIZ11 register for the ALT_USB1_DEVGRP instance. */
5647 #define ALT_USB1_DEV_DIEPTSIZ11_ADDR ALT_USB_DEV_DIEPTSIZ11_ADDR(ALT_USB1_DEVGRP_ADDR)
5648 /* The address of the ALT_USB_DEV_DIEPDMA11 register for the ALT_USB1_DEVGRP instance. */
5649 #define ALT_USB1_DEV_DIEPDMA11_ADDR ALT_USB_DEV_DIEPDMA11_ADDR(ALT_USB1_DEVGRP_ADDR)
5650 /* The address of the ALT_USB_DEV_DTXFSTS11 register for the ALT_USB1_DEVGRP instance. */
5651 #define ALT_USB1_DEV_DTXFSTS11_ADDR ALT_USB_DEV_DTXFSTS11_ADDR(ALT_USB1_DEVGRP_ADDR)
5652 /* The address of the ALT_USB_DEV_DIEPDMAB11 register for the ALT_USB1_DEVGRP instance. */
5653 #define ALT_USB1_DEV_DIEPDMAB11_ADDR ALT_USB_DEV_DIEPDMAB11_ADDR(ALT_USB1_DEVGRP_ADDR)
5654 /* The address of the ALT_USB_DEV_DIEPCTL12 register for the ALT_USB1_DEVGRP instance. */
5655 #define ALT_USB1_DEV_DIEPCTL12_ADDR ALT_USB_DEV_DIEPCTL12_ADDR(ALT_USB1_DEVGRP_ADDR)
5656 /* The address of the ALT_USB_DEV_DIEPINT12 register for the ALT_USB1_DEVGRP instance. */
5657 #define ALT_USB1_DEV_DIEPINT12_ADDR ALT_USB_DEV_DIEPINT12_ADDR(ALT_USB1_DEVGRP_ADDR)
5658 /* The address of the ALT_USB_DEV_DIEPTSIZ12 register for the ALT_USB1_DEVGRP instance. */
5659 #define ALT_USB1_DEV_DIEPTSIZ12_ADDR ALT_USB_DEV_DIEPTSIZ12_ADDR(ALT_USB1_DEVGRP_ADDR)
5660 /* The address of the ALT_USB_DEV_DIEPDMA12 register for the ALT_USB1_DEVGRP instance. */
5661 #define ALT_USB1_DEV_DIEPDMA12_ADDR ALT_USB_DEV_DIEPDMA12_ADDR(ALT_USB1_DEVGRP_ADDR)
5662 /* The address of the ALT_USB_DEV_DTXFSTS12 register for the ALT_USB1_DEVGRP instance. */
5663 #define ALT_USB1_DEV_DTXFSTS12_ADDR ALT_USB_DEV_DTXFSTS12_ADDR(ALT_USB1_DEVGRP_ADDR)
5664 /* The address of the ALT_USB_DEV_DIEPDMAB12 register for the ALT_USB1_DEVGRP instance. */
5665 #define ALT_USB1_DEV_DIEPDMAB12_ADDR ALT_USB_DEV_DIEPDMAB12_ADDR(ALT_USB1_DEVGRP_ADDR)
5666 /* The address of the ALT_USB_DEV_DIEPCTL13 register for the ALT_USB1_DEVGRP instance. */
5667 #define ALT_USB1_DEV_DIEPCTL13_ADDR ALT_USB_DEV_DIEPCTL13_ADDR(ALT_USB1_DEVGRP_ADDR)
5668 /* The address of the ALT_USB_DEV_DIEPINT13 register for the ALT_USB1_DEVGRP instance. */
5669 #define ALT_USB1_DEV_DIEPINT13_ADDR ALT_USB_DEV_DIEPINT13_ADDR(ALT_USB1_DEVGRP_ADDR)
5670 /* The address of the ALT_USB_DEV_DIEPTSIZ13 register for the ALT_USB1_DEVGRP instance. */
5671 #define ALT_USB1_DEV_DIEPTSIZ13_ADDR ALT_USB_DEV_DIEPTSIZ13_ADDR(ALT_USB1_DEVGRP_ADDR)
5672 /* The address of the ALT_USB_DEV_DIEPDMA13 register for the ALT_USB1_DEVGRP instance. */
5673 #define ALT_USB1_DEV_DIEPDMA13_ADDR ALT_USB_DEV_DIEPDMA13_ADDR(ALT_USB1_DEVGRP_ADDR)
5674 /* The address of the ALT_USB_DEV_DTXFSTS13 register for the ALT_USB1_DEVGRP instance. */
5675 #define ALT_USB1_DEV_DTXFSTS13_ADDR ALT_USB_DEV_DTXFSTS13_ADDR(ALT_USB1_DEVGRP_ADDR)
5676 /* The address of the ALT_USB_DEV_DIEPDMAB13 register for the ALT_USB1_DEVGRP instance. */
5677 #define ALT_USB1_DEV_DIEPDMAB13_ADDR ALT_USB_DEV_DIEPDMAB13_ADDR(ALT_USB1_DEVGRP_ADDR)
5678 /* The address of the ALT_USB_DEV_DIEPCTL14 register for the ALT_USB1_DEVGRP instance. */
5679 #define ALT_USB1_DEV_DIEPCTL14_ADDR ALT_USB_DEV_DIEPCTL14_ADDR(ALT_USB1_DEVGRP_ADDR)
5680 /* The address of the ALT_USB_DEV_DIEPINT14 register for the ALT_USB1_DEVGRP instance. */
5681 #define ALT_USB1_DEV_DIEPINT14_ADDR ALT_USB_DEV_DIEPINT14_ADDR(ALT_USB1_DEVGRP_ADDR)
5682 /* The address of the ALT_USB_DEV_DIEPTSIZ14 register for the ALT_USB1_DEVGRP instance. */
5683 #define ALT_USB1_DEV_DIEPTSIZ14_ADDR ALT_USB_DEV_DIEPTSIZ14_ADDR(ALT_USB1_DEVGRP_ADDR)
5684 /* The address of the ALT_USB_DEV_DIEPDMA14 register for the ALT_USB1_DEVGRP instance. */
5685 #define ALT_USB1_DEV_DIEPDMA14_ADDR ALT_USB_DEV_DIEPDMA14_ADDR(ALT_USB1_DEVGRP_ADDR)
5686 /* The address of the ALT_USB_DEV_DTXFSTS14 register for the ALT_USB1_DEVGRP instance. */
5687 #define ALT_USB1_DEV_DTXFSTS14_ADDR ALT_USB_DEV_DTXFSTS14_ADDR(ALT_USB1_DEVGRP_ADDR)
5688 /* The address of the ALT_USB_DEV_DIEPDMAB14 register for the ALT_USB1_DEVGRP instance. */
5689 #define ALT_USB1_DEV_DIEPDMAB14_ADDR ALT_USB_DEV_DIEPDMAB14_ADDR(ALT_USB1_DEVGRP_ADDR)
5690 /* The address of the ALT_USB_DEV_DIEPCTL15 register for the ALT_USB1_DEVGRP instance. */
5691 #define ALT_USB1_DEV_DIEPCTL15_ADDR ALT_USB_DEV_DIEPCTL15_ADDR(ALT_USB1_DEVGRP_ADDR)
5692 /* The address of the ALT_USB_DEV_DIEPINT15 register for the ALT_USB1_DEVGRP instance. */
5693 #define ALT_USB1_DEV_DIEPINT15_ADDR ALT_USB_DEV_DIEPINT15_ADDR(ALT_USB1_DEVGRP_ADDR)
5694 /* The address of the ALT_USB_DEV_DIEPTSIZ15 register for the ALT_USB1_DEVGRP instance. */
5695 #define ALT_USB1_DEV_DIEPTSIZ15_ADDR ALT_USB_DEV_DIEPTSIZ15_ADDR(ALT_USB1_DEVGRP_ADDR)
5696 /* The address of the ALT_USB_DEV_DIEPDMA15 register for the ALT_USB1_DEVGRP instance. */
5697 #define ALT_USB1_DEV_DIEPDMA15_ADDR ALT_USB_DEV_DIEPDMA15_ADDR(ALT_USB1_DEVGRP_ADDR)
5698 /* The address of the ALT_USB_DEV_DTXFSTS15 register for the ALT_USB1_DEVGRP instance. */
5699 #define ALT_USB1_DEV_DTXFSTS15_ADDR ALT_USB_DEV_DTXFSTS15_ADDR(ALT_USB1_DEVGRP_ADDR)
5700 /* The address of the ALT_USB_DEV_DIEPDMAB15 register for the ALT_USB1_DEVGRP instance. */
5701 #define ALT_USB1_DEV_DIEPDMAB15_ADDR ALT_USB_DEV_DIEPDMAB15_ADDR(ALT_USB1_DEVGRP_ADDR)
5702 /* The address of the ALT_USB_DEV_DOEPCTL0 register for the ALT_USB1_DEVGRP instance. */
5703 #define ALT_USB1_DEV_DOEPCTL0_ADDR ALT_USB_DEV_DOEPCTL0_ADDR(ALT_USB1_DEVGRP_ADDR)
5704 /* The address of the ALT_USB_DEV_DOEPINT0 register for the ALT_USB1_DEVGRP instance. */
5705 #define ALT_USB1_DEV_DOEPINT0_ADDR ALT_USB_DEV_DOEPINT0_ADDR(ALT_USB1_DEVGRP_ADDR)
5706 /* The address of the ALT_USB_DEV_DOEPTSIZ0 register for the ALT_USB1_DEVGRP instance. */
5707 #define ALT_USB1_DEV_DOEPTSIZ0_ADDR ALT_USB_DEV_DOEPTSIZ0_ADDR(ALT_USB1_DEVGRP_ADDR)
5708 /* The address of the ALT_USB_DEV_DOEPDMA0 register for the ALT_USB1_DEVGRP instance. */
5709 #define ALT_USB1_DEV_DOEPDMA0_ADDR ALT_USB_DEV_DOEPDMA0_ADDR(ALT_USB1_DEVGRP_ADDR)
5710 /* The address of the ALT_USB_DEV_DOEPDMAB0 register for the ALT_USB1_DEVGRP instance. */
5711 #define ALT_USB1_DEV_DOEPDMAB0_ADDR ALT_USB_DEV_DOEPDMAB0_ADDR(ALT_USB1_DEVGRP_ADDR)
5712 /* The address of the ALT_USB_DEV_DOEPCTL1 register for the ALT_USB1_DEVGRP instance. */
5713 #define ALT_USB1_DEV_DOEPCTL1_ADDR ALT_USB_DEV_DOEPCTL1_ADDR(ALT_USB1_DEVGRP_ADDR)
5714 /* The address of the ALT_USB_DEV_DOEPINT1 register for the ALT_USB1_DEVGRP instance. */
5715 #define ALT_USB1_DEV_DOEPINT1_ADDR ALT_USB_DEV_DOEPINT1_ADDR(ALT_USB1_DEVGRP_ADDR)
5716 /* The address of the ALT_USB_DEV_DOEPTSIZ1 register for the ALT_USB1_DEVGRP instance. */
5717 #define ALT_USB1_DEV_DOEPTSIZ1_ADDR ALT_USB_DEV_DOEPTSIZ1_ADDR(ALT_USB1_DEVGRP_ADDR)
5718 /* The address of the ALT_USB_DEV_DOEPDMA1 register for the ALT_USB1_DEVGRP instance. */
5719 #define ALT_USB1_DEV_DOEPDMA1_ADDR ALT_USB_DEV_DOEPDMA1_ADDR(ALT_USB1_DEVGRP_ADDR)
5720 /* The address of the ALT_USB_DEV_DOEPDMAB1 register for the ALT_USB1_DEVGRP instance. */
5721 #define ALT_USB1_DEV_DOEPDMAB1_ADDR ALT_USB_DEV_DOEPDMAB1_ADDR(ALT_USB1_DEVGRP_ADDR)
5722 /* The address of the ALT_USB_DEV_DOEPCTL2 register for the ALT_USB1_DEVGRP instance. */
5723 #define ALT_USB1_DEV_DOEPCTL2_ADDR ALT_USB_DEV_DOEPCTL2_ADDR(ALT_USB1_DEVGRP_ADDR)
5724 /* The address of the ALT_USB_DEV_DOEPINT2 register for the ALT_USB1_DEVGRP instance. */
5725 #define ALT_USB1_DEV_DOEPINT2_ADDR ALT_USB_DEV_DOEPINT2_ADDR(ALT_USB1_DEVGRP_ADDR)
5726 /* The address of the ALT_USB_DEV_DOEPTSIZ2 register for the ALT_USB1_DEVGRP instance. */
5727 #define ALT_USB1_DEV_DOEPTSIZ2_ADDR ALT_USB_DEV_DOEPTSIZ2_ADDR(ALT_USB1_DEVGRP_ADDR)
5728 /* The address of the ALT_USB_DEV_DOEPDMA2 register for the ALT_USB1_DEVGRP instance. */
5729 #define ALT_USB1_DEV_DOEPDMA2_ADDR ALT_USB_DEV_DOEPDMA2_ADDR(ALT_USB1_DEVGRP_ADDR)
5730 /* The address of the ALT_USB_DEV_DOEPDMAB2 register for the ALT_USB1_DEVGRP instance. */
5731 #define ALT_USB1_DEV_DOEPDMAB2_ADDR ALT_USB_DEV_DOEPDMAB2_ADDR(ALT_USB1_DEVGRP_ADDR)
5732 /* The address of the ALT_USB_DEV_DOEPCTL3 register for the ALT_USB1_DEVGRP instance. */
5733 #define ALT_USB1_DEV_DOEPCTL3_ADDR ALT_USB_DEV_DOEPCTL3_ADDR(ALT_USB1_DEVGRP_ADDR)
5734 /* The address of the ALT_USB_DEV_DOEPINT3 register for the ALT_USB1_DEVGRP instance. */
5735 #define ALT_USB1_DEV_DOEPINT3_ADDR ALT_USB_DEV_DOEPINT3_ADDR(ALT_USB1_DEVGRP_ADDR)
5736 /* The address of the ALT_USB_DEV_DOEPTSIZ3 register for the ALT_USB1_DEVGRP instance. */
5737 #define ALT_USB1_DEV_DOEPTSIZ3_ADDR ALT_USB_DEV_DOEPTSIZ3_ADDR(ALT_USB1_DEVGRP_ADDR)
5738 /* The address of the ALT_USB_DEV_DOEPDMA3 register for the ALT_USB1_DEVGRP instance. */
5739 #define ALT_USB1_DEV_DOEPDMA3_ADDR ALT_USB_DEV_DOEPDMA3_ADDR(ALT_USB1_DEVGRP_ADDR)
5740 /* The address of the ALT_USB_DEV_DOEPDMAB3 register for the ALT_USB1_DEVGRP instance. */
5741 #define ALT_USB1_DEV_DOEPDMAB3_ADDR ALT_USB_DEV_DOEPDMAB3_ADDR(ALT_USB1_DEVGRP_ADDR)
5742 /* The address of the ALT_USB_DEV_DOEPCTL4 register for the ALT_USB1_DEVGRP instance. */
5743 #define ALT_USB1_DEV_DOEPCTL4_ADDR ALT_USB_DEV_DOEPCTL4_ADDR(ALT_USB1_DEVGRP_ADDR)
5744 /* The address of the ALT_USB_DEV_DOEPINT4 register for the ALT_USB1_DEVGRP instance. */
5745 #define ALT_USB1_DEV_DOEPINT4_ADDR ALT_USB_DEV_DOEPINT4_ADDR(ALT_USB1_DEVGRP_ADDR)
5746 /* The address of the ALT_USB_DEV_DOEPTSIZ4 register for the ALT_USB1_DEVGRP instance. */
5747 #define ALT_USB1_DEV_DOEPTSIZ4_ADDR ALT_USB_DEV_DOEPTSIZ4_ADDR(ALT_USB1_DEVGRP_ADDR)
5748 /* The address of the ALT_USB_DEV_DOEPDMA4 register for the ALT_USB1_DEVGRP instance. */
5749 #define ALT_USB1_DEV_DOEPDMA4_ADDR ALT_USB_DEV_DOEPDMA4_ADDR(ALT_USB1_DEVGRP_ADDR)
5750 /* The address of the ALT_USB_DEV_DOEPDMAB4 register for the ALT_USB1_DEVGRP instance. */
5751 #define ALT_USB1_DEV_DOEPDMAB4_ADDR ALT_USB_DEV_DOEPDMAB4_ADDR(ALT_USB1_DEVGRP_ADDR)
5752 /* The address of the ALT_USB_DEV_DOEPCTL5 register for the ALT_USB1_DEVGRP instance. */
5753 #define ALT_USB1_DEV_DOEPCTL5_ADDR ALT_USB_DEV_DOEPCTL5_ADDR(ALT_USB1_DEVGRP_ADDR)
5754 /* The address of the ALT_USB_DEV_DOEPINT5 register for the ALT_USB1_DEVGRP instance. */
5755 #define ALT_USB1_DEV_DOEPINT5_ADDR ALT_USB_DEV_DOEPINT5_ADDR(ALT_USB1_DEVGRP_ADDR)
5756 /* The address of the ALT_USB_DEV_DOEPTSIZ5 register for the ALT_USB1_DEVGRP instance. */
5757 #define ALT_USB1_DEV_DOEPTSIZ5_ADDR ALT_USB_DEV_DOEPTSIZ5_ADDR(ALT_USB1_DEVGRP_ADDR)
5758 /* The address of the ALT_USB_DEV_DOEPDMA5 register for the ALT_USB1_DEVGRP instance. */
5759 #define ALT_USB1_DEV_DOEPDMA5_ADDR ALT_USB_DEV_DOEPDMA5_ADDR(ALT_USB1_DEVGRP_ADDR)
5760 /* The address of the ALT_USB_DEV_DOEPDMAB5 register for the ALT_USB1_DEVGRP instance. */
5761 #define ALT_USB1_DEV_DOEPDMAB5_ADDR ALT_USB_DEV_DOEPDMAB5_ADDR(ALT_USB1_DEVGRP_ADDR)
5762 /* The address of the ALT_USB_DEV_DOEPCTL6 register for the ALT_USB1_DEVGRP instance. */
5763 #define ALT_USB1_DEV_DOEPCTL6_ADDR ALT_USB_DEV_DOEPCTL6_ADDR(ALT_USB1_DEVGRP_ADDR)
5764 /* The address of the ALT_USB_DEV_DOEPINT6 register for the ALT_USB1_DEVGRP instance. */
5765 #define ALT_USB1_DEV_DOEPINT6_ADDR ALT_USB_DEV_DOEPINT6_ADDR(ALT_USB1_DEVGRP_ADDR)
5766 /* The address of the ALT_USB_DEV_DOEPTSIZ6 register for the ALT_USB1_DEVGRP instance. */
5767 #define ALT_USB1_DEV_DOEPTSIZ6_ADDR ALT_USB_DEV_DOEPTSIZ6_ADDR(ALT_USB1_DEVGRP_ADDR)
5768 /* The address of the ALT_USB_DEV_DOEPDMA6 register for the ALT_USB1_DEVGRP instance. */
5769 #define ALT_USB1_DEV_DOEPDMA6_ADDR ALT_USB_DEV_DOEPDMA6_ADDR(ALT_USB1_DEVGRP_ADDR)
5770 /* The address of the ALT_USB_DEV_DOEPDMAB6 register for the ALT_USB1_DEVGRP instance. */
5771 #define ALT_USB1_DEV_DOEPDMAB6_ADDR ALT_USB_DEV_DOEPDMAB6_ADDR(ALT_USB1_DEVGRP_ADDR)
5772 /* The address of the ALT_USB_DEV_DOEPCTL7 register for the ALT_USB1_DEVGRP instance. */
5773 #define ALT_USB1_DEV_DOEPCTL7_ADDR ALT_USB_DEV_DOEPCTL7_ADDR(ALT_USB1_DEVGRP_ADDR)
5774 /* The address of the ALT_USB_DEV_DOEPINT7 register for the ALT_USB1_DEVGRP instance. */
5775 #define ALT_USB1_DEV_DOEPINT7_ADDR ALT_USB_DEV_DOEPINT7_ADDR(ALT_USB1_DEVGRP_ADDR)
5776 /* The address of the ALT_USB_DEV_DOEPTSIZ7 register for the ALT_USB1_DEVGRP instance. */
5777 #define ALT_USB1_DEV_DOEPTSIZ7_ADDR ALT_USB_DEV_DOEPTSIZ7_ADDR(ALT_USB1_DEVGRP_ADDR)
5778 /* The address of the ALT_USB_DEV_DOEPDMA7 register for the ALT_USB1_DEVGRP instance. */
5779 #define ALT_USB1_DEV_DOEPDMA7_ADDR ALT_USB_DEV_DOEPDMA7_ADDR(ALT_USB1_DEVGRP_ADDR)
5780 /* The address of the ALT_USB_DEV_DOEPDMAB7 register for the ALT_USB1_DEVGRP instance. */
5781 #define ALT_USB1_DEV_DOEPDMAB7_ADDR ALT_USB_DEV_DOEPDMAB7_ADDR(ALT_USB1_DEVGRP_ADDR)
5782 /* The address of the ALT_USB_DEV_DOEPCTL8 register for the ALT_USB1_DEVGRP instance. */
5783 #define ALT_USB1_DEV_DOEPCTL8_ADDR ALT_USB_DEV_DOEPCTL8_ADDR(ALT_USB1_DEVGRP_ADDR)
5784 /* The address of the ALT_USB_DEV_DOEPINT8 register for the ALT_USB1_DEVGRP instance. */
5785 #define ALT_USB1_DEV_DOEPINT8_ADDR ALT_USB_DEV_DOEPINT8_ADDR(ALT_USB1_DEVGRP_ADDR)
5786 /* The address of the ALT_USB_DEV_DOEPTSIZ8 register for the ALT_USB1_DEVGRP instance. */
5787 #define ALT_USB1_DEV_DOEPTSIZ8_ADDR ALT_USB_DEV_DOEPTSIZ8_ADDR(ALT_USB1_DEVGRP_ADDR)
5788 /* The address of the ALT_USB_DEV_DOEPDMA8 register for the ALT_USB1_DEVGRP instance. */
5789 #define ALT_USB1_DEV_DOEPDMA8_ADDR ALT_USB_DEV_DOEPDMA8_ADDR(ALT_USB1_DEVGRP_ADDR)
5790 /* The address of the ALT_USB_DEV_DOEPDMAB8 register for the ALT_USB1_DEVGRP instance. */
5791 #define ALT_USB1_DEV_DOEPDMAB8_ADDR ALT_USB_DEV_DOEPDMAB8_ADDR(ALT_USB1_DEVGRP_ADDR)
5792 /* The address of the ALT_USB_DEV_DOEPCTL9 register for the ALT_USB1_DEVGRP instance. */
5793 #define ALT_USB1_DEV_DOEPCTL9_ADDR ALT_USB_DEV_DOEPCTL9_ADDR(ALT_USB1_DEVGRP_ADDR)
5794 /* The address of the ALT_USB_DEV_DOEPINT9 register for the ALT_USB1_DEVGRP instance. */
5795 #define ALT_USB1_DEV_DOEPINT9_ADDR ALT_USB_DEV_DOEPINT9_ADDR(ALT_USB1_DEVGRP_ADDR)
5796 /* The address of the ALT_USB_DEV_DOEPTSIZ9 register for the ALT_USB1_DEVGRP instance. */
5797 #define ALT_USB1_DEV_DOEPTSIZ9_ADDR ALT_USB_DEV_DOEPTSIZ9_ADDR(ALT_USB1_DEVGRP_ADDR)
5798 /* The address of the ALT_USB_DEV_DOEPDMA9 register for the ALT_USB1_DEVGRP instance. */
5799 #define ALT_USB1_DEV_DOEPDMA9_ADDR ALT_USB_DEV_DOEPDMA9_ADDR(ALT_USB1_DEVGRP_ADDR)
5800 /* The address of the ALT_USB_DEV_DOEPDMAB9 register for the ALT_USB1_DEVGRP instance. */
5801 #define ALT_USB1_DEV_DOEPDMAB9_ADDR ALT_USB_DEV_DOEPDMAB9_ADDR(ALT_USB1_DEVGRP_ADDR)
5802 /* The address of the ALT_USB_DEV_DOEPCTL10 register for the ALT_USB1_DEVGRP instance. */
5803 #define ALT_USB1_DEV_DOEPCTL10_ADDR ALT_USB_DEV_DOEPCTL10_ADDR(ALT_USB1_DEVGRP_ADDR)
5804 /* The address of the ALT_USB_DEV_DOEPINT10 register for the ALT_USB1_DEVGRP instance. */
5805 #define ALT_USB1_DEV_DOEPINT10_ADDR ALT_USB_DEV_DOEPINT10_ADDR(ALT_USB1_DEVGRP_ADDR)
5806 /* The address of the ALT_USB_DEV_DOEPTSIZ10 register for the ALT_USB1_DEVGRP instance. */
5807 #define ALT_USB1_DEV_DOEPTSIZ10_ADDR ALT_USB_DEV_DOEPTSIZ10_ADDR(ALT_USB1_DEVGRP_ADDR)
5808 /* The address of the ALT_USB_DEV_DOEPDMA10 register for the ALT_USB1_DEVGRP instance. */
5809 #define ALT_USB1_DEV_DOEPDMA10_ADDR ALT_USB_DEV_DOEPDMA10_ADDR(ALT_USB1_DEVGRP_ADDR)
5810 /* The address of the ALT_USB_DEV_DOEPDMAB10 register for the ALT_USB1_DEVGRP instance. */
5811 #define ALT_USB1_DEV_DOEPDMAB10_ADDR ALT_USB_DEV_DOEPDMAB10_ADDR(ALT_USB1_DEVGRP_ADDR)
5812 /* The address of the ALT_USB_DEV_DOEPCTL11 register for the ALT_USB1_DEVGRP instance. */
5813 #define ALT_USB1_DEV_DOEPCTL11_ADDR ALT_USB_DEV_DOEPCTL11_ADDR(ALT_USB1_DEVGRP_ADDR)
5814 /* The address of the ALT_USB_DEV_DOEPINT11 register for the ALT_USB1_DEVGRP instance. */
5815 #define ALT_USB1_DEV_DOEPINT11_ADDR ALT_USB_DEV_DOEPINT11_ADDR(ALT_USB1_DEVGRP_ADDR)
5816 /* The address of the ALT_USB_DEV_DOEPTSIZ11 register for the ALT_USB1_DEVGRP instance. */
5817 #define ALT_USB1_DEV_DOEPTSIZ11_ADDR ALT_USB_DEV_DOEPTSIZ11_ADDR(ALT_USB1_DEVGRP_ADDR)
5818 /* The address of the ALT_USB_DEV_DOEPDMA11 register for the ALT_USB1_DEVGRP instance. */
5819 #define ALT_USB1_DEV_DOEPDMA11_ADDR ALT_USB_DEV_DOEPDMA11_ADDR(ALT_USB1_DEVGRP_ADDR)
5820 /* The address of the ALT_USB_DEV_DOEPDMAB11 register for the ALT_USB1_DEVGRP instance. */
5821 #define ALT_USB1_DEV_DOEPDMAB11_ADDR ALT_USB_DEV_DOEPDMAB11_ADDR(ALT_USB1_DEVGRP_ADDR)
5822 /* The address of the ALT_USB_DEV_DOEPCTL12 register for the ALT_USB1_DEVGRP instance. */
5823 #define ALT_USB1_DEV_DOEPCTL12_ADDR ALT_USB_DEV_DOEPCTL12_ADDR(ALT_USB1_DEVGRP_ADDR)
5824 /* The address of the ALT_USB_DEV_DOEPINT12 register for the ALT_USB1_DEVGRP instance. */
5825 #define ALT_USB1_DEV_DOEPINT12_ADDR ALT_USB_DEV_DOEPINT12_ADDR(ALT_USB1_DEVGRP_ADDR)
5826 /* The address of the ALT_USB_DEV_DOEPTSIZ12 register for the ALT_USB1_DEVGRP instance. */
5827 #define ALT_USB1_DEV_DOEPTSIZ12_ADDR ALT_USB_DEV_DOEPTSIZ12_ADDR(ALT_USB1_DEVGRP_ADDR)
5828 /* The address of the ALT_USB_DEV_DOEPDMA12 register for the ALT_USB1_DEVGRP instance. */
5829 #define ALT_USB1_DEV_DOEPDMA12_ADDR ALT_USB_DEV_DOEPDMA12_ADDR(ALT_USB1_DEVGRP_ADDR)
5830 /* The address of the ALT_USB_DEV_DOEPDMAB12 register for the ALT_USB1_DEVGRP instance. */
5831 #define ALT_USB1_DEV_DOEPDMAB12_ADDR ALT_USB_DEV_DOEPDMAB12_ADDR(ALT_USB1_DEVGRP_ADDR)
5832 /* The address of the ALT_USB_DEV_DOEPCTL13 register for the ALT_USB1_DEVGRP instance. */
5833 #define ALT_USB1_DEV_DOEPCTL13_ADDR ALT_USB_DEV_DOEPCTL13_ADDR(ALT_USB1_DEVGRP_ADDR)
5834 /* The address of the ALT_USB_DEV_DOEPINT13 register for the ALT_USB1_DEVGRP instance. */
5835 #define ALT_USB1_DEV_DOEPINT13_ADDR ALT_USB_DEV_DOEPINT13_ADDR(ALT_USB1_DEVGRP_ADDR)
5836 /* The address of the ALT_USB_DEV_DOEPTSIZ13 register for the ALT_USB1_DEVGRP instance. */
5837 #define ALT_USB1_DEV_DOEPTSIZ13_ADDR ALT_USB_DEV_DOEPTSIZ13_ADDR(ALT_USB1_DEVGRP_ADDR)
5838 /* The address of the ALT_USB_DEV_DOEPDMA13 register for the ALT_USB1_DEVGRP instance. */
5839 #define ALT_USB1_DEV_DOEPDMA13_ADDR ALT_USB_DEV_DOEPDMA13_ADDR(ALT_USB1_DEVGRP_ADDR)
5840 /* The address of the ALT_USB_DEV_DOEPDMAB13 register for the ALT_USB1_DEVGRP instance. */
5841 #define ALT_USB1_DEV_DOEPDMAB13_ADDR ALT_USB_DEV_DOEPDMAB13_ADDR(ALT_USB1_DEVGRP_ADDR)
5842 /* The address of the ALT_USB_DEV_DOEPCTL14 register for the ALT_USB1_DEVGRP instance. */
5843 #define ALT_USB1_DEV_DOEPCTL14_ADDR ALT_USB_DEV_DOEPCTL14_ADDR(ALT_USB1_DEVGRP_ADDR)
5844 /* The address of the ALT_USB_DEV_DOEPINT14 register for the ALT_USB1_DEVGRP instance. */
5845 #define ALT_USB1_DEV_DOEPINT14_ADDR ALT_USB_DEV_DOEPINT14_ADDR(ALT_USB1_DEVGRP_ADDR)
5846 /* The address of the ALT_USB_DEV_DOEPTSIZ14 register for the ALT_USB1_DEVGRP instance. */
5847 #define ALT_USB1_DEV_DOEPTSIZ14_ADDR ALT_USB_DEV_DOEPTSIZ14_ADDR(ALT_USB1_DEVGRP_ADDR)
5848 /* The address of the ALT_USB_DEV_DOEPDMA14 register for the ALT_USB1_DEVGRP instance. */
5849 #define ALT_USB1_DEV_DOEPDMA14_ADDR ALT_USB_DEV_DOEPDMA14_ADDR(ALT_USB1_DEVGRP_ADDR)
5850 /* The address of the ALT_USB_DEV_DOEPDMAB14 register for the ALT_USB1_DEVGRP instance. */
5851 #define ALT_USB1_DEV_DOEPDMAB14_ADDR ALT_USB_DEV_DOEPDMAB14_ADDR(ALT_USB1_DEVGRP_ADDR)
5852 /* The address of the ALT_USB_DEV_DOEPCTL15 register for the ALT_USB1_DEVGRP instance. */
5853 #define ALT_USB1_DEV_DOEPCTL15_ADDR ALT_USB_DEV_DOEPCTL15_ADDR(ALT_USB1_DEVGRP_ADDR)
5854 /* The address of the ALT_USB_DEV_DOEPINT15 register for the ALT_USB1_DEVGRP instance. */
5855 #define ALT_USB1_DEV_DOEPINT15_ADDR ALT_USB_DEV_DOEPINT15_ADDR(ALT_USB1_DEVGRP_ADDR)
5856 /* The address of the ALT_USB_DEV_DOEPTSIZ15 register for the ALT_USB1_DEVGRP instance. */
5857 #define ALT_USB1_DEV_DOEPTSIZ15_ADDR ALT_USB_DEV_DOEPTSIZ15_ADDR(ALT_USB1_DEVGRP_ADDR)
5858 /* The address of the ALT_USB_DEV_DOEPDMA15 register for the ALT_USB1_DEVGRP instance. */
5859 #define ALT_USB1_DEV_DOEPDMA15_ADDR ALT_USB_DEV_DOEPDMA15_ADDR(ALT_USB1_DEVGRP_ADDR)
5860 /* The address of the ALT_USB_DEV_DOEPDMAB15 register for the ALT_USB1_DEVGRP instance. */
5861 #define ALT_USB1_DEV_DOEPDMAB15_ADDR ALT_USB_DEV_DOEPDMAB15_ADDR(ALT_USB1_DEVGRP_ADDR)
5862 /* The base address byte offset for the start of the ALT_USB1_DEVGRP component. */
5863 #define ALT_USB1_DEVGRP_OFST 0xffb40800
5864 /* The start address of the ALT_USB1_DEVGRP component. */
5865 #define ALT_USB1_DEVGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DEVGRP_OFST))
5866 /* The lower bound address range of the ALT_USB1_DEVGRP component. */
5867 #define ALT_USB1_DEVGRP_LB_ADDR ALT_USB1_DEVGRP_ADDR
5868 /* The upper bound address range of the ALT_USB1_DEVGRP component. */
5869 #define ALT_USB1_DEVGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DEVGRP_ADDR) + 0x500) - 1))
5870 
5871 
5872 /*
5873  * Component Instance : i_usbotg_1_pwrclkgrp
5874  *
5875  * Instance i_usbotg_1_pwrclkgrp of component ALT_USB_PWRCLK.
5876  *
5877  *
5878  */
5879 /* The address of the ALT_USB_PWRCLK_PCGCCTL register for the ALT_USB1_PWRCLKGRP instance. */
5880 #define ALT_USB1_PWRCLK_PCGCCTL_ADDR ALT_USB_PWRCLK_PCGCCTL_ADDR(ALT_USB1_PWRCLKGRP_ADDR)
5881 /* The base address byte offset for the start of the ALT_USB1_PWRCLKGRP component. */
5882 #define ALT_USB1_PWRCLKGRP_OFST 0xffb40e00
5883 /* The start address of the ALT_USB1_PWRCLKGRP component. */
5884 #define ALT_USB1_PWRCLKGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_PWRCLKGRP_OFST))
5885 /* The lower bound address range of the ALT_USB1_PWRCLKGRP component. */
5886 #define ALT_USB1_PWRCLKGRP_LB_ADDR ALT_USB1_PWRCLKGRP_ADDR
5887 /* The upper bound address range of the ALT_USB1_PWRCLKGRP component. */
5888 #define ALT_USB1_PWRCLKGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_PWRCLKGRP_ADDR) + 0x4) - 1))
5889 
5890 
5891 /*
5892  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_0
5893  *
5894  * Instance i_usbotg_1_DWC_otg_DFIFO_0 of component ALT_USB1_DWC_OTG_DFIFO_0.
5895  *
5896  *
5897  */
5898 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_0 component. */
5899 #define ALT_USB1_DWC_OTG_DFIFO_0_OFST 0xffb41000
5900 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_0 component. */
5901 #define ALT_USB1_DWC_OTG_DFIFO_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_0_OFST))
5902 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_0 component. */
5903 #define ALT_USB1_DWC_OTG_DFIFO_0_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_0_ADDR
5904 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_0 component. */
5905 #define ALT_USB1_DWC_OTG_DFIFO_0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_0_ADDR) + 0x1000) - 1))
5906 
5907 
5908 /*
5909  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_1
5910  *
5911  * Instance i_usbotg_1_DWC_otg_DFIFO_1 of component ALT_USB1_DWC_OTG_DFIFO_1.
5912  *
5913  *
5914  */
5915 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_1 component. */
5916 #define ALT_USB1_DWC_OTG_DFIFO_1_OFST 0xffb42000
5917 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_1 component. */
5918 #define ALT_USB1_DWC_OTG_DFIFO_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_1_OFST))
5919 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_1 component. */
5920 #define ALT_USB1_DWC_OTG_DFIFO_1_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_1_ADDR
5921 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_1 component. */
5922 #define ALT_USB1_DWC_OTG_DFIFO_1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_1_ADDR) + 0x1000) - 1))
5923 
5924 
5925 /*
5926  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_2
5927  *
5928  * Instance i_usbotg_1_DWC_otg_DFIFO_2 of component ALT_USB1_DWC_OTG_DFIFO_2.
5929  *
5930  *
5931  */
5932 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_2 component. */
5933 #define ALT_USB1_DWC_OTG_DFIFO_2_OFST 0xffb43000
5934 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_2 component. */
5935 #define ALT_USB1_DWC_OTG_DFIFO_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_2_OFST))
5936 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_2 component. */
5937 #define ALT_USB1_DWC_OTG_DFIFO_2_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_2_ADDR
5938 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_2 component. */
5939 #define ALT_USB1_DWC_OTG_DFIFO_2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_2_ADDR) + 0x1000) - 1))
5940 
5941 
5942 /*
5943  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_3
5944  *
5945  * Instance i_usbotg_1_DWC_otg_DFIFO_3 of component ALT_USB1_DWC_OTG_DFIFO_3.
5946  *
5947  *
5948  */
5949 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_3 component. */
5950 #define ALT_USB1_DWC_OTG_DFIFO_3_OFST 0xffb44000
5951 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_3 component. */
5952 #define ALT_USB1_DWC_OTG_DFIFO_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_3_OFST))
5953 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_3 component. */
5954 #define ALT_USB1_DWC_OTG_DFIFO_3_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_3_ADDR
5955 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_3 component. */
5956 #define ALT_USB1_DWC_OTG_DFIFO_3_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_3_ADDR) + 0x1000) - 1))
5957 
5958 
5959 /*
5960  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_4
5961  *
5962  * Instance i_usbotg_1_DWC_otg_DFIFO_4 of component ALT_USB1_DWC_OTG_DFIFO_4.
5963  *
5964  *
5965  */
5966 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_4 component. */
5967 #define ALT_USB1_DWC_OTG_DFIFO_4_OFST 0xffb45000
5968 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_4 component. */
5969 #define ALT_USB1_DWC_OTG_DFIFO_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_4_OFST))
5970 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_4 component. */
5971 #define ALT_USB1_DWC_OTG_DFIFO_4_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_4_ADDR
5972 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_4 component. */
5973 #define ALT_USB1_DWC_OTG_DFIFO_4_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_4_ADDR) + 0x1000) - 1))
5974 
5975 
5976 /*
5977  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_5
5978  *
5979  * Instance i_usbotg_1_DWC_otg_DFIFO_5 of component ALT_USB1_DWC_OTG_DFIFO_5.
5980  *
5981  *
5982  */
5983 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_5 component. */
5984 #define ALT_USB1_DWC_OTG_DFIFO_5_OFST 0xffb46000
5985 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_5 component. */
5986 #define ALT_USB1_DWC_OTG_DFIFO_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_5_OFST))
5987 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_5 component. */
5988 #define ALT_USB1_DWC_OTG_DFIFO_5_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_5_ADDR
5989 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_5 component. */
5990 #define ALT_USB1_DWC_OTG_DFIFO_5_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_5_ADDR) + 0x1000) - 1))
5991 
5992 
5993 /*
5994  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_6
5995  *
5996  * Instance i_usbotg_1_DWC_otg_DFIFO_6 of component ALT_USB1_DWC_OTG_DFIFO_6.
5997  *
5998  *
5999  */
6000 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_6 component. */
6001 #define ALT_USB1_DWC_OTG_DFIFO_6_OFST 0xffb47000
6002 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_6 component. */
6003 #define ALT_USB1_DWC_OTG_DFIFO_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_6_OFST))
6004 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_6 component. */
6005 #define ALT_USB1_DWC_OTG_DFIFO_6_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_6_ADDR
6006 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_6 component. */
6007 #define ALT_USB1_DWC_OTG_DFIFO_6_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_6_ADDR) + 0x1000) - 1))
6008 
6009 
6010 /*
6011  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_7
6012  *
6013  * Instance i_usbotg_1_DWC_otg_DFIFO_7 of component ALT_USB1_DWC_OTG_DFIFO_7.
6014  *
6015  *
6016  */
6017 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_7 component. */
6018 #define ALT_USB1_DWC_OTG_DFIFO_7_OFST 0xffb48000
6019 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_7 component. */
6020 #define ALT_USB1_DWC_OTG_DFIFO_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_7_OFST))
6021 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_7 component. */
6022 #define ALT_USB1_DWC_OTG_DFIFO_7_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_7_ADDR
6023 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_7 component. */
6024 #define ALT_USB1_DWC_OTG_DFIFO_7_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_7_ADDR) + 0x1000) - 1))
6025 
6026 
6027 /*
6028  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_8
6029  *
6030  * Instance i_usbotg_1_DWC_otg_DFIFO_8 of component ALT_USB1_DWC_OTG_DFIFO_8.
6031  *
6032  *
6033  */
6034 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_8 component. */
6035 #define ALT_USB1_DWC_OTG_DFIFO_8_OFST 0xffb49000
6036 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_8 component. */
6037 #define ALT_USB1_DWC_OTG_DFIFO_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_8_OFST))
6038 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_8 component. */
6039 #define ALT_USB1_DWC_OTG_DFIFO_8_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_8_ADDR
6040 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_8 component. */
6041 #define ALT_USB1_DWC_OTG_DFIFO_8_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_8_ADDR) + 0x1000) - 1))
6042 
6043 
6044 /*
6045  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_9
6046  *
6047  * Instance i_usbotg_1_DWC_otg_DFIFO_9 of component ALT_USB1_DWC_OTG_DFIFO_9.
6048  *
6049  *
6050  */
6051 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_9 component. */
6052 #define ALT_USB1_DWC_OTG_DFIFO_9_OFST 0xffb4a000
6053 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_9 component. */
6054 #define ALT_USB1_DWC_OTG_DFIFO_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_9_OFST))
6055 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_9 component. */
6056 #define ALT_USB1_DWC_OTG_DFIFO_9_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_9_ADDR
6057 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_9 component. */
6058 #define ALT_USB1_DWC_OTG_DFIFO_9_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_9_ADDR) + 0x1000) - 1))
6059 
6060 
6061 /*
6062  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_10
6063  *
6064  * Instance i_usbotg_1_DWC_otg_DFIFO_10 of component ALT_USB1_DWC_OTG_DFIFO_10.
6065  *
6066  *
6067  */
6068 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_10 component. */
6069 #define ALT_USB1_DWC_OTG_DFIFO_10_OFST 0xffb4b000
6070 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_10 component. */
6071 #define ALT_USB1_DWC_OTG_DFIFO_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_10_OFST))
6072 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_10 component. */
6073 #define ALT_USB1_DWC_OTG_DFIFO_10_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_10_ADDR
6074 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_10 component. */
6075 #define ALT_USB1_DWC_OTG_DFIFO_10_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_10_ADDR) + 0x1000) - 1))
6076 
6077 
6078 /*
6079  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_11
6080  *
6081  * Instance i_usbotg_1_DWC_otg_DFIFO_11 of component ALT_USB1_DWC_OTG_DFIFO_11.
6082  *
6083  *
6084  */
6085 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_11 component. */
6086 #define ALT_USB1_DWC_OTG_DFIFO_11_OFST 0xffb4c000
6087 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_11 component. */
6088 #define ALT_USB1_DWC_OTG_DFIFO_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_11_OFST))
6089 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_11 component. */
6090 #define ALT_USB1_DWC_OTG_DFIFO_11_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_11_ADDR
6091 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_11 component. */
6092 #define ALT_USB1_DWC_OTG_DFIFO_11_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_11_ADDR) + 0x1000) - 1))
6093 
6094 
6095 /*
6096  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_12
6097  *
6098  * Instance i_usbotg_1_DWC_otg_DFIFO_12 of component ALT_USB1_DWC_OTG_DFIFO_12.
6099  *
6100  *
6101  */
6102 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_12 component. */
6103 #define ALT_USB1_DWC_OTG_DFIFO_12_OFST 0xffb4d000
6104 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_12 component. */
6105 #define ALT_USB1_DWC_OTG_DFIFO_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_12_OFST))
6106 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_12 component. */
6107 #define ALT_USB1_DWC_OTG_DFIFO_12_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_12_ADDR
6108 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_12 component. */
6109 #define ALT_USB1_DWC_OTG_DFIFO_12_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_12_ADDR) + 0x1000) - 1))
6110 
6111 
6112 /*
6113  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_13
6114  *
6115  * Instance i_usbotg_1_DWC_otg_DFIFO_13 of component ALT_USB1_DWC_OTG_DFIFO_13.
6116  *
6117  *
6118  */
6119 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_13 component. */
6120 #define ALT_USB1_DWC_OTG_DFIFO_13_OFST 0xffb4e000
6121 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_13 component. */
6122 #define ALT_USB1_DWC_OTG_DFIFO_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_13_OFST))
6123 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_13 component. */
6124 #define ALT_USB1_DWC_OTG_DFIFO_13_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_13_ADDR
6125 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_13 component. */
6126 #define ALT_USB1_DWC_OTG_DFIFO_13_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_13_ADDR) + 0x1000) - 1))
6127 
6128 
6129 /*
6130  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_14
6131  *
6132  * Instance i_usbotg_1_DWC_otg_DFIFO_14 of component ALT_USB1_DWC_OTG_DFIFO_14.
6133  *
6134  *
6135  */
6136 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_14 component. */
6137 #define ALT_USB1_DWC_OTG_DFIFO_14_OFST 0xffb4f000
6138 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_14 component. */
6139 #define ALT_USB1_DWC_OTG_DFIFO_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_14_OFST))
6140 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_14 component. */
6141 #define ALT_USB1_DWC_OTG_DFIFO_14_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_14_ADDR
6142 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_14 component. */
6143 #define ALT_USB1_DWC_OTG_DFIFO_14_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_14_ADDR) + 0x1000) - 1))
6144 
6145 
6146 /*
6147  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_15
6148  *
6149  * Instance i_usbotg_1_DWC_otg_DFIFO_15 of component ALT_USB1_DWC_OTG_DFIFO_15.
6150  *
6151  *
6152  */
6153 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_15 component. */
6154 #define ALT_USB1_DWC_OTG_DFIFO_15_OFST 0xffb50000
6155 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_15 component. */
6156 #define ALT_USB1_DWC_OTG_DFIFO_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_15_OFST))
6157 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_15 component. */
6158 #define ALT_USB1_DWC_OTG_DFIFO_15_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_15_ADDR
6159 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_15 component. */
6160 #define ALT_USB1_DWC_OTG_DFIFO_15_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_15_ADDR) + 0x1000) - 1))
6161 
6162 
6163 /*
6164  * Component Instance : i_usbotg_1_DWC_otg_DFIFO_Direct_access
6165  *
6166  * Instance i_usbotg_1_DWC_otg_DFIFO_Direct_access of component ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS.
6167  *
6168  *
6169  */
6170 /* The base address byte offset for the start of the ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS component. */
6171 #define ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_OFST 0xffb60000
6172 /* The start address of the ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS component. */
6173 #define ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_OFST))
6174 /* The lower bound address range of the ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS component. */
6175 #define ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_ADDR
6176 /* The upper bound address range of the ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS component. */
6177 #define ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_ADDR) + 0x20000) - 1))
6178 
6179 
6180 /*
6181  * Component Instance : i_nand_config
6182  *
6183  * Instance i_nand_config of component ALT_NAND_CFG.
6184  *
6185  *
6186  */
6187 /* The address of the ALT_NAND_CFG_DEVICE_RST register for the ALT_NAND_CFG instance. */
6188 #define ALT_NAND_CFG_DEVICE_RST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICE_RST_OFST))
6189 /* The address of the ALT_NAND_CFG_TFR_SPARE_REG register for the ALT_NAND_CFG instance. */
6190 #define ALT_NAND_CFG_TFR_SPARE_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_TFR_SPARE_REG_OFST))
6191 /* The address of the ALT_NAND_CFG_LD_WAIT_CNT register for the ALT_NAND_CFG instance. */
6192 #define ALT_NAND_CFG_LD_WAIT_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_LD_WAIT_CNT_OFST))
6193 /* The address of the ALT_NAND_CFG_PROGRAM_WAIT_CNT register for the ALT_NAND_CFG instance. */
6194 #define ALT_NAND_CFG_PROGRAM_WAIT_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_PROGRAM_WAIT_CNT_OFST))
6195 /* The address of the ALT_NAND_CFG_ERASE_WAIT_CNT register for the ALT_NAND_CFG instance. */
6196 #define ALT_NAND_CFG_ERASE_WAIT_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_ERASE_WAIT_CNT_OFST))
6197 /* The address of the ALT_NAND_CFG_INT_MON_CYCCNT register for the ALT_NAND_CFG instance. */
6198 #define ALT_NAND_CFG_INT_MON_CYCCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_INT_MON_CYCCNT_OFST))
6199 /* The address of the ALT_NAND_CFG_RB_PIN_END register for the ALT_NAND_CFG instance. */
6200 #define ALT_NAND_CFG_RB_PIN_END_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RB_PIN_END_OFST))
6201 /* The address of the ALT_NAND_CFG_MULTIPLANE_OP register for the ALT_NAND_CFG instance. */
6202 #define ALT_NAND_CFG_MULTIPLANE_OP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_MULTIPLANE_OP_OFST))
6203 /* The address of the ALT_NAND_CFG_MULTIPLANE_RD_EN register for the ALT_NAND_CFG instance. */
6204 #define ALT_NAND_CFG_MULTIPLANE_RD_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_MULTIPLANE_RD_EN_OFST))
6205 /* The address of the ALT_NAND_CFG_COPYBACK_DIS register for the ALT_NAND_CFG instance. */
6206 #define ALT_NAND_CFG_COPYBACK_DIS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_COPYBACK_DIS_OFST))
6207 /* The address of the ALT_NAND_CFG_CACHE_WR_EN register for the ALT_NAND_CFG instance. */
6208 #define ALT_NAND_CFG_CACHE_WR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_CACHE_WR_EN_OFST))
6209 /* The address of the ALT_NAND_CFG_CACHE_RD_EN register for the ALT_NAND_CFG instance. */
6210 #define ALT_NAND_CFG_CACHE_RD_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_CACHE_RD_EN_OFST))
6211 /* The address of the ALT_NAND_CFG_PREFETCH_MOD register for the ALT_NAND_CFG instance. */
6212 #define ALT_NAND_CFG_PREFETCH_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_PREFETCH_MOD_OFST))
6213 /* The address of the ALT_NAND_CFG_CHIP_EN_DONT_CARE register for the ALT_NAND_CFG instance. */
6214 #define ALT_NAND_CFG_CHIP_EN_DONT_CARE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_CHIP_EN_DONT_CARE_OFST))
6215 /* The address of the ALT_NAND_CFG_ECC_EN register for the ALT_NAND_CFG instance. */
6216 #define ALT_NAND_CFG_ECC_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_ECC_EN_OFST))
6217 /* The address of the ALT_NAND_CFG_GLOB_INT_EN register for the ALT_NAND_CFG instance. */
6218 #define ALT_NAND_CFG_GLOB_INT_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_GLOB_INT_EN_OFST))
6219 /* The address of the ALT_NAND_CFG_TWHR2_AND_WE_2_RE register for the ALT_NAND_CFG instance. */
6220 #define ALT_NAND_CFG_TWHR2_AND_WE_2_RE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_TWHR2_AND_WE_2_RE_OFST))
6221 /* The address of the ALT_NAND_CFG_TCWAW_AND_ADDR_2_DATA register for the ALT_NAND_CFG instance. */
6222 #define ALT_NAND_CFG_TCWAW_AND_ADDR_2_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_TCWAW_AND_ADDR_2_DATA_OFST))
6223 /* The address of the ALT_NAND_CFG_RE_2_WE register for the ALT_NAND_CFG instance. */
6224 #define ALT_NAND_CFG_RE_2_WE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RE_2_WE_OFST))
6225 /* The address of the ALT_NAND_CFG_ACC_CLKS register for the ALT_NAND_CFG instance. */
6226 #define ALT_NAND_CFG_ACC_CLKS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_ACC_CLKS_OFST))
6227 /* The address of the ALT_NAND_CFG_NUMBER_OF_PLANES register for the ALT_NAND_CFG instance. */
6228 #define ALT_NAND_CFG_NUMBER_OF_PLANES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_NUMBER_OF_PLANES_OFST))
6229 /* The address of the ALT_NAND_CFG_PAGES_PER_BLOCK register for the ALT_NAND_CFG instance. */
6230 #define ALT_NAND_CFG_PAGES_PER_BLOCK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_PAGES_PER_BLOCK_OFST))
6231 /* The address of the ALT_NAND_CFG_DEVICE_WIDTH register for the ALT_NAND_CFG instance. */
6232 #define ALT_NAND_CFG_DEVICE_WIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICE_WIDTH_OFST))
6233 /* The address of the ALT_NAND_CFG_DEVICE_MAIN_AREA_SIZE register for the ALT_NAND_CFG instance. */
6234 #define ALT_NAND_CFG_DEVICE_MAIN_AREA_SIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICE_MAIN_AREA_SIZE_OFST))
6235 /* The address of the ALT_NAND_CFG_DEVICE_SPARE_AREA_SIZE register for the ALT_NAND_CFG instance. */
6236 #define ALT_NAND_CFG_DEVICE_SPARE_AREA_SIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICE_SPARE_AREA_SIZE_OFST))
6237 /* The address of the ALT_NAND_CFG_TWO_ROW_ADDR_CYCLES register for the ALT_NAND_CFG instance. */
6238 #define ALT_NAND_CFG_TWO_ROW_ADDR_CYCLES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_TWO_ROW_ADDR_CYCLES_OFST))
6239 /* The address of the ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT register for the ALT_NAND_CFG instance. */
6240 #define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_OFST))
6241 /* The address of the ALT_NAND_CFG_ECC_CORRECTION register for the ALT_NAND_CFG instance. */
6242 #define ALT_NAND_CFG_ECC_CORRECTION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_ECC_CORRECTION_OFST))
6243 /* The address of the ALT_NAND_CFG_RD_MOD register for the ALT_NAND_CFG instance. */
6244 #define ALT_NAND_CFG_RD_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RD_MOD_OFST))
6245 /* The address of the ALT_NAND_CFG_WR_MOD register for the ALT_NAND_CFG instance. */
6246 #define ALT_NAND_CFG_WR_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_WR_MOD_OFST))
6247 /* The address of the ALT_NAND_CFG_COPYBACK_MOD register for the ALT_NAND_CFG instance. */
6248 #define ALT_NAND_CFG_COPYBACK_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_COPYBACK_MOD_OFST))
6249 /* The address of the ALT_NAND_CFG_RDWR_EN_LO_CNT register for the ALT_NAND_CFG instance. */
6250 #define ALT_NAND_CFG_RDWR_EN_LO_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RDWR_EN_LO_CNT_OFST))
6251 /* The address of the ALT_NAND_CFG_RDWR_EN_HI_CNT register for the ALT_NAND_CFG instance. */
6252 #define ALT_NAND_CFG_RDWR_EN_HI_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RDWR_EN_HI_CNT_OFST))
6253 /* The address of the ALT_NAND_CFG_MAX_RD_DELAY register for the ALT_NAND_CFG instance. */
6254 #define ALT_NAND_CFG_MAX_RD_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_MAX_RD_DELAY_OFST))
6255 /* The address of the ALT_NAND_CFG_CS_SETUP_CNT register for the ALT_NAND_CFG instance. */
6256 #define ALT_NAND_CFG_CS_SETUP_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_CS_SETUP_CNT_OFST))
6257 /* The address of the ALT_NAND_CFG_SPARE_AREA_SKIP_BYTES register for the ALT_NAND_CFG instance. */
6258 #define ALT_NAND_CFG_SPARE_AREA_SKIP_BYTES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_SPARE_AREA_SKIP_BYTES_OFST))
6259 /* The address of the ALT_NAND_CFG_SPARE_AREA_MARKER register for the ALT_NAND_CFG instance. */
6260 #define ALT_NAND_CFG_SPARE_AREA_MARKER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_SPARE_AREA_MARKER_OFST))
6261 /* The address of the ALT_NAND_CFG_DEVICES_CONNECTED register for the ALT_NAND_CFG instance. */
6262 #define ALT_NAND_CFG_DEVICES_CONNECTED_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICES_CONNECTED_OFST))
6263 /* The address of the ALT_NAND_CFG_DIE_MSK register for the ALT_NAND_CFG instance. */
6264 #define ALT_NAND_CFG_DIE_MSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DIE_MSK_OFST))
6265 /* The address of the ALT_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE register for the ALT_NAND_CFG instance. */
6266 #define ALT_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE_OFST))
6267 /* The address of the ALT_NAND_CFG_WR_PROTECT register for the ALT_NAND_CFG instance. */
6268 #define ALT_NAND_CFG_WR_PROTECT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_WR_PROTECT_OFST))
6269 /* The address of the ALT_NAND_CFG_RE_2_RE register for the ALT_NAND_CFG instance. */
6270 #define ALT_NAND_CFG_RE_2_RE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RE_2_RE_OFST))
6271 /* The address of the ALT_NAND_CFG_POR_RST_COUNT register for the ALT_NAND_CFG instance. */
6272 #define ALT_NAND_CFG_POR_RST_COUNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_POR_RST_COUNT_OFST))
6273 /* The address of the ALT_NAND_CFG_WD_RST_COUNT register for the ALT_NAND_CFG instance. */
6274 #define ALT_NAND_CFG_WD_RST_COUNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_WD_RST_COUNT_OFST))
6275 /* The base address byte offset for the start of the ALT_NAND_CFG component. */
6276 #define ALT_NAND_CFG_OFST 0xffb80000
6277 /* The start address of the ALT_NAND_CFG component. */
6278 #define ALT_NAND_CFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NAND_CFG_OFST))
6279 /* The lower bound address range of the ALT_NAND_CFG component. */
6280 #define ALT_NAND_CFG_LB_ADDR ALT_NAND_CFG_ADDR
6281 /* The upper bound address range of the ALT_NAND_CFG component. */
6282 #define ALT_NAND_CFG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_CFG_ADDR) + 0x2b4) - 1))
6283 
6284 
6285 /*
6286  * Component Instance : i_nand_param
6287  *
6288  * Instance i_nand_param of component ALT_NAND_PARAM.
6289  *
6290  *
6291  */
6292 /* The address of the ALT_NAND_PARAM_MANUFACTURER_ID register for the ALT_NAND_PARAM instance. */
6293 #define ALT_NAND_PARAM_MANUFACTURER_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_MANUFACTURER_ID_OFST))
6294 /* The address of the ALT_NAND_PARAM_DEVICE_ID register for the ALT_NAND_PARAM instance. */
6295 #define ALT_NAND_PARAM_DEVICE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_DEVICE_ID_OFST))
6296 /* The address of the ALT_NAND_PARAM_DEVICE_PARAM_0 register for the ALT_NAND_PARAM instance. */
6297 #define ALT_NAND_PARAM_DEVICE_PARAM_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_DEVICE_PARAM_0_OFST))
6298 /* The address of the ALT_NAND_PARAM_DEVICE_PARAM_1 register for the ALT_NAND_PARAM instance. */
6299 #define ALT_NAND_PARAM_DEVICE_PARAM_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_DEVICE_PARAM_1_OFST))
6300 /* The address of the ALT_NAND_PARAM_DEVICE_PARAM_2 register for the ALT_NAND_PARAM instance. */
6301 #define ALT_NAND_PARAM_DEVICE_PARAM_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_DEVICE_PARAM_2_OFST))
6302 /* The address of the ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE register for the ALT_NAND_PARAM instance. */
6303 #define ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE_OFST))
6304 /* The address of the ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE register for the ALT_NAND_PARAM instance. */
6305 #define ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE_OFST))
6306 /* The address of the ALT_NAND_PARAM_REVISION register for the ALT_NAND_PARAM instance. */
6307 #define ALT_NAND_PARAM_REVISION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_REVISION_OFST))
6308 /* The address of the ALT_NAND_PARAM_ONFI_DEV_FEATURES register for the ALT_NAND_PARAM instance. */
6309 #define ALT_NAND_PARAM_ONFI_DEV_FEATURES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_DEV_FEATURES_OFST))
6310 /* The address of the ALT_NAND_PARAM_ONFI_OPTIONAL_CMDS register for the ALT_NAND_PARAM instance. */
6311 #define ALT_NAND_PARAM_ONFI_OPTIONAL_CMDS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_OPTIONAL_CMDS_OFST))
6312 /* The address of the ALT_NAND_PARAM_ONFI_TIMING_MOD register for the ALT_NAND_PARAM instance. */
6313 #define ALT_NAND_PARAM_ONFI_TIMING_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_TIMING_MOD_OFST))
6314 /* The address of the ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MOD register for the ALT_NAND_PARAM instance. */
6315 #define ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MOD_OFST))
6316 /* The address of the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS register for the ALT_NAND_PARAM instance. */
6317 #define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_OFST))
6318 /* The address of the ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_L register for the ALT_NAND_PARAM instance. */
6319 #define ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_L_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_L_OFST))
6320 /* The address of the ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_U register for the ALT_NAND_PARAM instance. */
6321 #define ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_U_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_U_OFST))
6322 /* The address of the ALT_NAND_PARAM_FEATURES register for the ALT_NAND_PARAM instance. */
6323 #define ALT_NAND_PARAM_FEATURES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_FEATURES_OFST))
6324 /* The base address byte offset for the start of the ALT_NAND_PARAM component. */
6325 #define ALT_NAND_PARAM_OFST 0xffb80300
6326 /* The start address of the ALT_NAND_PARAM component. */
6327 #define ALT_NAND_PARAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NAND_PARAM_OFST))
6328 /* The lower bound address range of the ALT_NAND_PARAM component. */
6329 #define ALT_NAND_PARAM_LB_ADDR ALT_NAND_PARAM_ADDR
6330 /* The upper bound address range of the ALT_NAND_PARAM component. */
6331 #define ALT_NAND_PARAM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + 0xf4) - 1))
6332 
6333 
6334 /*
6335  * Component Instance : i_nand_status
6336  *
6337  * Instance i_nand_status of component ALT_NAND_STAT.
6338  *
6339  *
6340  */
6341 /* The address of the ALT_NAND_STAT_TFR_MOD register for the ALT_NAND_STAT instance. */
6342 #define ALT_NAND_STAT_TFR_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_TFR_MOD_OFST))
6343 /* The address of the ALT_NAND_STAT_INTR_STAT0 register for the ALT_NAND_STAT instance. */
6344 #define ALT_NAND_STAT_INTR_STAT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_STAT0_OFST))
6345 /* The address of the ALT_NAND_STAT_INTR_EN0 register for the ALT_NAND_STAT instance. */
6346 #define ALT_NAND_STAT_INTR_EN0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_EN0_OFST))
6347 /* The address of the ALT_NAND_STAT_PAGE_CNT0 register for the ALT_NAND_STAT instance. */
6348 #define ALT_NAND_STAT_PAGE_CNT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_PAGE_CNT0_OFST))
6349 /* The address of the ALT_NAND_STAT_ERR_PAGE_ADDR0 register for the ALT_NAND_STAT instance. */
6350 #define ALT_NAND_STAT_ERR_PAGE_ADDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_PAGE_ADDR0_OFST))
6351 /* The address of the ALT_NAND_STAT_ERR_BLOCK_ADDR0 register for the ALT_NAND_STAT instance. */
6352 #define ALT_NAND_STAT_ERR_BLOCK_ADDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_BLOCK_ADDR0_OFST))
6353 /* The address of the ALT_NAND_STAT_INTR_STAT1 register for the ALT_NAND_STAT instance. */
6354 #define ALT_NAND_STAT_INTR_STAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_STAT1_OFST))
6355 /* The address of the ALT_NAND_STAT_INTR_EN1 register for the ALT_NAND_STAT instance. */
6356 #define ALT_NAND_STAT_INTR_EN1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_EN1_OFST))
6357 /* The address of the ALT_NAND_STAT_PAGE_CNT1 register for the ALT_NAND_STAT instance. */
6358 #define ALT_NAND_STAT_PAGE_CNT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_PAGE_CNT1_OFST))
6359 /* The address of the ALT_NAND_STAT_ERR_PAGE_ADDR1 register for the ALT_NAND_STAT instance. */
6360 #define ALT_NAND_STAT_ERR_PAGE_ADDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_PAGE_ADDR1_OFST))
6361 /* The address of the ALT_NAND_STAT_ERR_BLOCK_ADDR1 register for the ALT_NAND_STAT instance. */
6362 #define ALT_NAND_STAT_ERR_BLOCK_ADDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_BLOCK_ADDR1_OFST))
6363 /* The address of the ALT_NAND_STAT_INTR_STAT2 register for the ALT_NAND_STAT instance. */
6364 #define ALT_NAND_STAT_INTR_STAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_STAT2_OFST))
6365 /* The address of the ALT_NAND_STAT_INTR_EN2 register for the ALT_NAND_STAT instance. */
6366 #define ALT_NAND_STAT_INTR_EN2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_EN2_OFST))
6367 /* The address of the ALT_NAND_STAT_PAGE_CNT2 register for the ALT_NAND_STAT instance. */
6368 #define ALT_NAND_STAT_PAGE_CNT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_PAGE_CNT2_OFST))
6369 /* The address of the ALT_NAND_STAT_ERR_PAGE_ADDR2 register for the ALT_NAND_STAT instance. */
6370 #define ALT_NAND_STAT_ERR_PAGE_ADDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_PAGE_ADDR2_OFST))
6371 /* The address of the ALT_NAND_STAT_ERR_BLOCK_ADDR2 register for the ALT_NAND_STAT instance. */
6372 #define ALT_NAND_STAT_ERR_BLOCK_ADDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_BLOCK_ADDR2_OFST))
6373 /* The address of the ALT_NAND_STAT_INTR_STAT3 register for the ALT_NAND_STAT instance. */
6374 #define ALT_NAND_STAT_INTR_STAT3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_STAT3_OFST))
6375 /* The address of the ALT_NAND_STAT_INTR_EN3 register for the ALT_NAND_STAT instance. */
6376 #define ALT_NAND_STAT_INTR_EN3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_EN3_OFST))
6377 /* The address of the ALT_NAND_STAT_PAGE_CNT3 register for the ALT_NAND_STAT instance. */
6378 #define ALT_NAND_STAT_PAGE_CNT3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_PAGE_CNT3_OFST))
6379 /* The address of the ALT_NAND_STAT_ERR_PAGE_ADDR3 register for the ALT_NAND_STAT instance. */
6380 #define ALT_NAND_STAT_ERR_PAGE_ADDR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_PAGE_ADDR3_OFST))
6381 /* The address of the ALT_NAND_STAT_ERR_BLOCK_ADDR3 register for the ALT_NAND_STAT instance. */
6382 #define ALT_NAND_STAT_ERR_BLOCK_ADDR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_BLOCK_ADDR3_OFST))
6383 /* The base address byte offset for the start of the ALT_NAND_STAT component. */
6384 #define ALT_NAND_STAT_OFST 0xffb80400
6385 /* The start address of the ALT_NAND_STAT component. */
6386 #define ALT_NAND_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NAND_STAT_OFST))
6387 /* The lower bound address range of the ALT_NAND_STAT component. */
6388 #define ALT_NAND_STAT_LB_ADDR ALT_NAND_STAT_ADDR
6389 /* The upper bound address range of the ALT_NAND_STAT component. */
6390 #define ALT_NAND_STAT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_STAT_ADDR) + 0x144) - 1))
6391 
6392 
6393 /*
6394  * Component Instance : i_nand_ecc
6395  *
6396  * Instance i_nand_ecc of component ALT_NAND_ECC.
6397  *
6398  *
6399  */
6400 /* The address of the ALT_NAND_ECC_ECCCORINFO_B01 register for the ALT_NAND_ECC instance. */
6401 #define ALT_NAND_ECC_ECCCORINFO_B01_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_ECC_ADDR) + ALT_NAND_ECC_ECCCORINFO_B01_OFST))
6402 /* The address of the ALT_NAND_ECC_ECCCORINFO_B23 register for the ALT_NAND_ECC instance. */
6403 #define ALT_NAND_ECC_ECCCORINFO_B23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_ECC_ADDR) + ALT_NAND_ECC_ECCCORINFO_B23_OFST))
6404 /* The base address byte offset for the start of the ALT_NAND_ECC component. */
6405 #define ALT_NAND_ECC_OFST 0xffb80650
6406 /* The start address of the ALT_NAND_ECC component. */
6407 #define ALT_NAND_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NAND_ECC_OFST))
6408 /* The lower bound address range of the ALT_NAND_ECC component. */
6409 #define ALT_NAND_ECC_LB_ADDR ALT_NAND_ECC_ADDR
6410 /* The upper bound address range of the ALT_NAND_ECC component. */
6411 #define ALT_NAND_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_ECC_ADDR) + 0x14) - 1))
6412 
6413 
6414 /*
6415  * Component Instance : i_nand_dma
6416  *
6417  * Instance i_nand_dma of component ALT_NAND_DMA.
6418  *
6419  *
6420  */
6421 /* The address of the ALT_NAND_DMA_DMA_EN register for the ALT_NAND_DMA instance. */
6422 #define ALT_NAND_DMA_DMA_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_DMA_EN_OFST))
6423 /* The address of the ALT_NAND_DMA_DMA_INTR register for the ALT_NAND_DMA instance. */
6424 #define ALT_NAND_DMA_DMA_INTR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_DMA_INTR_OFST))
6425 /* The address of the ALT_NAND_DMA_DMA_INTR_EN register for the ALT_NAND_DMA instance. */
6426 #define ALT_NAND_DMA_DMA_INTR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_DMA_INTR_EN_OFST))
6427 /* The address of the ALT_NAND_DMA_TGT_ERR_ADDR_LO register for the ALT_NAND_DMA instance. */
6428 #define ALT_NAND_DMA_TGT_ERR_ADDR_LO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_TGT_ERR_ADDR_LO_OFST))
6429 /* The address of the ALT_NAND_DMA_TGT_ERR_ADDR_HI register for the ALT_NAND_DMA instance. */
6430 #define ALT_NAND_DMA_TGT_ERR_ADDR_HI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_TGT_ERR_ADDR_HI_OFST))
6431 /* The address of the ALT_NAND_DMA_CHNL_ACT register for the ALT_NAND_DMA instance. */
6432 #define ALT_NAND_DMA_CHNL_ACT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_CHNL_ACT_OFST))
6433 /* The address of the ALT_NAND_DMA_FLSH_BURST_LEN register for the ALT_NAND_DMA instance. */
6434 #define ALT_NAND_DMA_FLSH_BURST_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_FLSH_BURST_LEN_OFST))
6435 /* The address of the ALT_NAND_DMA_INTRLV register for the ALT_NAND_DMA instance. */
6436 #define ALT_NAND_DMA_INTRLV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_INTRLV_OFST))
6437 /* The address of the ALT_NAND_DMA_RESCAN_BUF_FLAG register for the ALT_NAND_DMA instance. */
6438 #define ALT_NAND_DMA_RESCAN_BUF_FLAG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_RESCAN_BUF_FLAG_OFST))
6439 /* The address of the ALT_NAND_DMA_NO_OF_BLOCKS_PER_LUN register for the ALT_NAND_DMA instance. */
6440 #define ALT_NAND_DMA_NO_OF_BLOCKS_PER_LUN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_NO_OF_BLOCKS_PER_LUN_OFST))
6441 /* The address of the ALT_NAND_DMA_LUN_STAT_CMD register for the ALT_NAND_DMA instance. */
6442 #define ALT_NAND_DMA_LUN_STAT_CMD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_LUN_STAT_CMD_OFST))
6443 /* The address of the ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR register for the ALT_NAND_DMA instance. */
6444 #define ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_OFST))
6445 /* The address of the ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_EN register for the ALT_NAND_DMA instance. */
6446 #define ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_EN_OFST))
6447 /* The base address byte offset for the start of the ALT_NAND_DMA component. */
6448 #define ALT_NAND_DMA_OFST 0xffb80700
6449 /* The start address of the ALT_NAND_DMA component. */
6450 #define ALT_NAND_DMA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NAND_DMA_OFST))
6451 /* The lower bound address range of the ALT_NAND_DMA component. */
6452 #define ALT_NAND_DMA_LB_ADDR ALT_NAND_DMA_ADDR
6453 /* The upper bound address range of the ALT_NAND_DMA component. */
6454 #define ALT_NAND_DMA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_DMA_ADDR) + 0xd4) - 1))
6455 
6456 
6457 /*
6458  * Component Instance : i_nand_NANDDATA
6459  *
6460  * Instance i_nand_NANDDATA of component ALT_NANDDATA.
6461  *
6462  *
6463  */
6464 /* The base address byte offset for the start of the ALT_NANDDATA component. */
6465 #define ALT_NANDDATA_OFST 0xffb90000
6466 /* The start address of the ALT_NANDDATA component. */
6467 #define ALT_NANDDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NANDDATA_OFST))
6468 /* The lower bound address range of the ALT_NANDDATA component. */
6469 #define ALT_NANDDATA_LB_ADDR ALT_NANDDATA_ADDR
6470 /* The upper bound address range of the ALT_NANDDATA component. */
6471 #define ALT_NANDDATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NANDDATA_ADDR) + 0x10000) - 1))
6472 
6473 
6474 /*
6475  * Component Instance : i_uart_0_uart
6476  *
6477  * Instance i_uart_0_uart of component ALT_UART.
6478  *
6479  *
6480  */
6481 /* The address of the ALT_UART_RBR_THR_DLL register for the ALT_UART0 instance. */
6482 #define ALT_UART0_RBR_THR_DLL_ADDR ALT_UART_RBR_THR_DLL_ADDR(ALT_UART0_ADDR)
6483 /* The address of the ALT_UART_IER_DLH register for the ALT_UART0 instance. */
6484 #define ALT_UART0_IER_DLH_ADDR ALT_UART_IER_DLH_ADDR(ALT_UART0_ADDR)
6485 /* The address of the ALT_UART_IIR register for the ALT_UART0 instance. */
6486 #define ALT_UART0_IIR_ADDR ALT_UART_IIR_ADDR(ALT_UART0_ADDR)
6487 /* The address of the ALT_UART_FCR register for the ALT_UART0 instance. */
6488 #define ALT_UART0_FCR_ADDR ALT_UART_FCR_ADDR(ALT_UART0_ADDR)
6489 /* The address of the ALT_UART_LCR register for the ALT_UART0 instance. */
6490 #define ALT_UART0_LCR_ADDR ALT_UART_LCR_ADDR(ALT_UART0_ADDR)
6491 /* The address of the ALT_UART_MCR register for the ALT_UART0 instance. */
6492 #define ALT_UART0_MCR_ADDR ALT_UART_MCR_ADDR(ALT_UART0_ADDR)
6493 /* The address of the ALT_UART_LSR register for the ALT_UART0 instance. */
6494 #define ALT_UART0_LSR_ADDR ALT_UART_LSR_ADDR(ALT_UART0_ADDR)
6495 /* The address of the ALT_UART_MSR register for the ALT_UART0 instance. */
6496 #define ALT_UART0_MSR_ADDR ALT_UART_MSR_ADDR(ALT_UART0_ADDR)
6497 /* The address of the ALT_UART_SCR register for the ALT_UART0 instance. */
6498 #define ALT_UART0_SCR_ADDR ALT_UART_SCR_ADDR(ALT_UART0_ADDR)
6499 /* The address of the ALT_UART_SRBR register for the ALT_UART0 instance. */
6500 #define ALT_UART0_SRBR_STHR_0_ADDR ALT_UART_SRBR_ADDR(ALT_UART0_ADDR)
6501 /* The address of the ALT_UART_SRBR_STHR_1 register for the ALT_UART0 instance. */
6502 #define ALT_UART0_SRBR_STHR_1_ADDR ALT_UART_SRBR_STHR_1_ADDR(ALT_UART0_ADDR)
6503 /* The address of the ALT_UART_SRBR_STHR_2 register for the ALT_UART0 instance. */
6504 #define ALT_UART0_SRBR_STHR_2_ADDR ALT_UART_SRBR_STHR_2_ADDR(ALT_UART0_ADDR)
6505 /* The address of the ALT_UART_SRBR_STHR_3 register for the ALT_UART0 instance. */
6506 #define ALT_UART0_SRBR_STHR_3_ADDR ALT_UART_SRBR_STHR_3_ADDR(ALT_UART0_ADDR)
6507 /* The address of the ALT_UART_SRBR_STHR_4 register for the ALT_UART0 instance. */
6508 #define ALT_UART0_SRBR_STHR_4_ADDR ALT_UART_SRBR_STHR_4_ADDR(ALT_UART0_ADDR)
6509 /* The address of the ALT_UART_SRBR_STHR_5 register for the ALT_UART0 instance. */
6510 #define ALT_UART0_SRBR_STHR_5_ADDR ALT_UART_SRBR_STHR_5_ADDR(ALT_UART0_ADDR)
6511 /* The address of the ALT_UART_SRBR_STHR_6 register for the ALT_UART0 instance. */
6512 #define ALT_UART0_SRBR_STHR_6_ADDR ALT_UART_SRBR_STHR_6_ADDR(ALT_UART0_ADDR)
6513 /* The address of the ALT_UART_SRBR_STHR_7 register for the ALT_UART0 instance. */
6514 #define ALT_UART0_SRBR_STHR_7_ADDR ALT_UART_SRBR_STHR_7_ADDR(ALT_UART0_ADDR)
6515 /* The address of the ALT_UART_SRBR_STHR_8 register for the ALT_UART0 instance. */
6516 #define ALT_UART0_SRBR_STHR_8_ADDR ALT_UART_SRBR_STHR_8_ADDR(ALT_UART0_ADDR)
6517 /* The address of the ALT_UART_SRBR_STHR_9 register for the ALT_UART0 instance. */
6518 #define ALT_UART0_SRBR_STHR_9_ADDR ALT_UART_SRBR_STHR_9_ADDR(ALT_UART0_ADDR)
6519 /* The address of the ALT_UART_SRBR_STHR_10 register for the ALT_UART0 instance. */
6520 #define ALT_UART0_SRBR_STHR_10_ADDR ALT_UART_SRBR_STHR_10_ADDR(ALT_UART0_ADDR)
6521 /* The address of the ALT_UART_SRBR_STHR_11 register for the ALT_UART0 instance. */
6522 #define ALT_UART0_SRBR_STHR_11_ADDR ALT_UART_SRBR_STHR_11_ADDR(ALT_UART0_ADDR)
6523 /* The address of the ALT_UART_SRBR_STHR_12 register for the ALT_UART0 instance. */
6524 #define ALT_UART0_SRBR_STHR_12_ADDR ALT_UART_SRBR_STHR_12_ADDR(ALT_UART0_ADDR)
6525 /* The address of the ALT_UART_SRBR_STHR_13 register for the ALT_UART0 instance. */
6526 #define ALT_UART0_SRBR_STHR_13_ADDR ALT_UART_SRBR_STHR_13_ADDR(ALT_UART0_ADDR)
6527 /* The address of the ALT_UART_SRBR_STHR_14 register for the ALT_UART0 instance. */
6528 #define ALT_UART0_SRBR_STHR_14_ADDR ALT_UART_SRBR_STHR_14_ADDR(ALT_UART0_ADDR)
6529 /* The address of the ALT_UART_SRBR_STHR_15 register for the ALT_UART0 instance. */
6530 #define ALT_UART0_SRBR_STHR_15_ADDR ALT_UART_SRBR_STHR_15_ADDR(ALT_UART0_ADDR)
6531 /* The address of the ALT_UART_FAR register for the ALT_UART0 instance. */
6532 #define ALT_UART0_FAR_ADDR ALT_UART_FAR_ADDR(ALT_UART0_ADDR)
6533 /* The address of the ALT_UART_TFR register for the ALT_UART0 instance. */
6534 #define ALT_UART0_TFR_ADDR ALT_UART_TFR_ADDR(ALT_UART0_ADDR)
6535 /* The address of the ALT_UART_RFW register for the ALT_UART0 instance. */
6536 #define ALT_UART0_RFW_ADDR ALT_UART_RFW_ADDR(ALT_UART0_ADDR)
6537 /* The address of the ALT_UART_USR register for the ALT_UART0 instance. */
6538 #define ALT_UART0_USR_ADDR ALT_UART_USR_ADDR(ALT_UART0_ADDR)
6539 /* The address of the ALT_UART_TFL register for the ALT_UART0 instance. */
6540 #define ALT_UART0_TFL_ADDR ALT_UART_TFL_ADDR(ALT_UART0_ADDR)
6541 /* The address of the ALT_UART_RFL register for the ALT_UART0 instance. */
6542 #define ALT_UART0_RFL_ADDR ALT_UART_RFL_ADDR(ALT_UART0_ADDR)
6543 /* The address of the ALT_UART_SRR register for the ALT_UART0 instance. */
6544 #define ALT_UART0_SRR_ADDR ALT_UART_SRR_ADDR(ALT_UART0_ADDR)
6545 /* The address of the ALT_UART_SRTS register for the ALT_UART0 instance. */
6546 #define ALT_UART0_SRTS_ADDR ALT_UART_SRTS_ADDR(ALT_UART0_ADDR)
6547 /* The address of the ALT_UART_SBCR register for the ALT_UART0 instance. */
6548 #define ALT_UART0_SBCR_ADDR ALT_UART_SBCR_ADDR(ALT_UART0_ADDR)
6549 /* The address of the ALT_UART_SDMAM register for the ALT_UART0 instance. */
6550 #define ALT_UART0_SDMAM_ADDR ALT_UART_SDMAM_ADDR(ALT_UART0_ADDR)
6551 /* The address of the ALT_UART_SFE register for the ALT_UART0 instance. */
6552 #define ALT_UART0_SFE_ADDR ALT_UART_SFE_ADDR(ALT_UART0_ADDR)
6553 /* The address of the ALT_UART_SRT register for the ALT_UART0 instance. */
6554 #define ALT_UART0_SRT_ADDR ALT_UART_SRT_ADDR(ALT_UART0_ADDR)
6555 /* The address of the ALT_UART_STET register for the ALT_UART0 instance. */
6556 #define ALT_UART0_STET_ADDR ALT_UART_STET_ADDR(ALT_UART0_ADDR)
6557 /* The address of the ALT_UART_HTX register for the ALT_UART0 instance. */
6558 #define ALT_UART0_HTX_ADDR ALT_UART_HTX_ADDR(ALT_UART0_ADDR)
6559 /* The address of the ALT_UART_DMASA register for the ALT_UART0 instance. */
6560 #define ALT_UART0_DMASA_ADDR ALT_UART_DMASA_ADDR(ALT_UART0_ADDR)
6561 /* The address of the ALT_UART_CPR register for the ALT_UART0 instance. */
6562 #define ALT_UART0_CPR_ADDR ALT_UART_CPR_ADDR(ALT_UART0_ADDR)
6563 /* The address of the ALT_UART_UCV register for the ALT_UART0 instance. */
6564 #define ALT_UART0_UCV_ADDR ALT_UART_UCV_ADDR(ALT_UART0_ADDR)
6565 /* The address of the ALT_UART_CTR register for the ALT_UART0 instance. */
6566 #define ALT_UART0_CTR_ADDR ALT_UART_CTR_ADDR(ALT_UART0_ADDR)
6567 /* The base address byte offset for the start of the ALT_UART0 component. */
6568 #define ALT_UART0_OFST 0xffc02000
6569 /* The start address of the ALT_UART0 component. */
6570 #define ALT_UART0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_UART0_OFST))
6571 /* The lower bound address range of the ALT_UART0 component. */
6572 #define ALT_UART0_LB_ADDR ALT_UART0_ADDR
6573 /* The upper bound address range of the ALT_UART0 component. */
6574 #define ALT_UART0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_UART0_ADDR) + 0x100) - 1))
6575 
6576 
6577 /*
6578  * Component Instance : i_uart_1_uart
6579  *
6580  * Instance i_uart_1_uart of component ALT_UART.
6581  *
6582  *
6583  */
6584 /* The address of the ALT_UART_RBR_THR_DLL register for the ALT_UART1 instance. */
6585 #define ALT_UART1_RBR_THR_DLL_ADDR ALT_UART_RBR_THR_DLL_ADDR(ALT_UART1_ADDR)
6586 /* The address of the ALT_UART_IER_DLH register for the ALT_UART1 instance. */
6587 #define ALT_UART1_IER_DLH_ADDR ALT_UART_IER_DLH_ADDR(ALT_UART1_ADDR)
6588 /* The address of the ALT_UART_IIR register for the ALT_UART1 instance. */
6589 #define ALT_UART1_IIR_ADDR ALT_UART_IIR_ADDR(ALT_UART1_ADDR)
6590 /* The address of the ALT_UART_FCR register for the ALT_UART1 instance. */
6591 #define ALT_UART1_FCR_ADDR ALT_UART_FCR_ADDR(ALT_UART1_ADDR)
6592 /* The address of the ALT_UART_LCR register for the ALT_UART1 instance. */
6593 #define ALT_UART1_LCR_ADDR ALT_UART_LCR_ADDR(ALT_UART1_ADDR)
6594 /* The address of the ALT_UART_MCR register for the ALT_UART1 instance. */
6595 #define ALT_UART1_MCR_ADDR ALT_UART_MCR_ADDR(ALT_UART1_ADDR)
6596 /* The address of the ALT_UART_LSR register for the ALT_UART1 instance. */
6597 #define ALT_UART1_LSR_ADDR ALT_UART_LSR_ADDR(ALT_UART1_ADDR)
6598 /* The address of the ALT_UART_MSR register for the ALT_UART1 instance. */
6599 #define ALT_UART1_MSR_ADDR ALT_UART_MSR_ADDR(ALT_UART1_ADDR)
6600 /* The address of the ALT_UART_SCR register for the ALT_UART1 instance. */
6601 #define ALT_UART1_SCR_ADDR ALT_UART_SCR_ADDR(ALT_UART1_ADDR)
6602 /* The address of the ALT_UART_SRBR register for the ALT_UART1 instance. */
6603 #define ALT_UART1_SRBR_STHR_0_ADDR ALT_UART_SRBR_ADDR(ALT_UART1_ADDR)
6604 /* The address of the ALT_UART_SRBR_STHR_1 register for the ALT_UART1 instance. */
6605 #define ALT_UART1_SRBR_STHR_1_ADDR ALT_UART_SRBR_STHR_1_ADDR(ALT_UART1_ADDR)
6606 /* The address of the ALT_UART_SRBR_STHR_2 register for the ALT_UART1 instance. */
6607 #define ALT_UART1_SRBR_STHR_2_ADDR ALT_UART_SRBR_STHR_2_ADDR(ALT_UART1_ADDR)
6608 /* The address of the ALT_UART_SRBR_STHR_3 register for the ALT_UART1 instance. */
6609 #define ALT_UART1_SRBR_STHR_3_ADDR ALT_UART_SRBR_STHR_3_ADDR(ALT_UART1_ADDR)
6610 /* The address of the ALT_UART_SRBR_STHR_4 register for the ALT_UART1 instance. */
6611 #define ALT_UART1_SRBR_STHR_4_ADDR ALT_UART_SRBR_STHR_4_ADDR(ALT_UART1_ADDR)
6612 /* The address of the ALT_UART_SRBR_STHR_5 register for the ALT_UART1 instance. */
6613 #define ALT_UART1_SRBR_STHR_5_ADDR ALT_UART_SRBR_STHR_5_ADDR(ALT_UART1_ADDR)
6614 /* The address of the ALT_UART_SRBR_STHR_6 register for the ALT_UART1 instance. */
6615 #define ALT_UART1_SRBR_STHR_6_ADDR ALT_UART_SRBR_STHR_6_ADDR(ALT_UART1_ADDR)
6616 /* The address of the ALT_UART_SRBR_STHR_7 register for the ALT_UART1 instance. */
6617 #define ALT_UART1_SRBR_STHR_7_ADDR ALT_UART_SRBR_STHR_7_ADDR(ALT_UART1_ADDR)
6618 /* The address of the ALT_UART_SRBR_STHR_8 register for the ALT_UART1 instance. */
6619 #define ALT_UART1_SRBR_STHR_8_ADDR ALT_UART_SRBR_STHR_8_ADDR(ALT_UART1_ADDR)
6620 /* The address of the ALT_UART_SRBR_STHR_9 register for the ALT_UART1 instance. */
6621 #define ALT_UART1_SRBR_STHR_9_ADDR ALT_UART_SRBR_STHR_9_ADDR(ALT_UART1_ADDR)
6622 /* The address of the ALT_UART_SRBR_STHR_10 register for the ALT_UART1 instance. */
6623 #define ALT_UART1_SRBR_STHR_10_ADDR ALT_UART_SRBR_STHR_10_ADDR(ALT_UART1_ADDR)
6624 /* The address of the ALT_UART_SRBR_STHR_11 register for the ALT_UART1 instance. */
6625 #define ALT_UART1_SRBR_STHR_11_ADDR ALT_UART_SRBR_STHR_11_ADDR(ALT_UART1_ADDR)
6626 /* The address of the ALT_UART_SRBR_STHR_12 register for the ALT_UART1 instance. */
6627 #define ALT_UART1_SRBR_STHR_12_ADDR ALT_UART_SRBR_STHR_12_ADDR(ALT_UART1_ADDR)
6628 /* The address of the ALT_UART_SRBR_STHR_13 register for the ALT_UART1 instance. */
6629 #define ALT_UART1_SRBR_STHR_13_ADDR ALT_UART_SRBR_STHR_13_ADDR(ALT_UART1_ADDR)
6630 /* The address of the ALT_UART_SRBR_STHR_14 register for the ALT_UART1 instance. */
6631 #define ALT_UART1_SRBR_STHR_14_ADDR ALT_UART_SRBR_STHR_14_ADDR(ALT_UART1_ADDR)
6632 /* The address of the ALT_UART_SRBR_STHR_15 register for the ALT_UART1 instance. */
6633 #define ALT_UART1_SRBR_STHR_15_ADDR ALT_UART_SRBR_STHR_15_ADDR(ALT_UART1_ADDR)
6634 /* The address of the ALT_UART_FAR register for the ALT_UART1 instance. */
6635 #define ALT_UART1_FAR_ADDR ALT_UART_FAR_ADDR(ALT_UART1_ADDR)
6636 /* The address of the ALT_UART_TFR register for the ALT_UART1 instance. */
6637 #define ALT_UART1_TFR_ADDR ALT_UART_TFR_ADDR(ALT_UART1_ADDR)
6638 /* The address of the ALT_UART_RFW register for the ALT_UART1 instance. */
6639 #define ALT_UART1_RFW_ADDR ALT_UART_RFW_ADDR(ALT_UART1_ADDR)
6640 /* The address of the ALT_UART_USR register for the ALT_UART1 instance. */
6641 #define ALT_UART1_USR_ADDR ALT_UART_USR_ADDR(ALT_UART1_ADDR)
6642 /* The address of the ALT_UART_TFL register for the ALT_UART1 instance. */
6643 #define ALT_UART1_TFL_ADDR ALT_UART_TFL_ADDR(ALT_UART1_ADDR)
6644 /* The address of the ALT_UART_RFL register for the ALT_UART1 instance. */
6645 #define ALT_UART1_RFL_ADDR ALT_UART_RFL_ADDR(ALT_UART1_ADDR)
6646 /* The address of the ALT_UART_SRR register for the ALT_UART1 instance. */
6647 #define ALT_UART1_SRR_ADDR ALT_UART_SRR_ADDR(ALT_UART1_ADDR)
6648 /* The address of the ALT_UART_SRTS register for the ALT_UART1 instance. */
6649 #define ALT_UART1_SRTS_ADDR ALT_UART_SRTS_ADDR(ALT_UART1_ADDR)
6650 /* The address of the ALT_UART_SBCR register for the ALT_UART1 instance. */
6651 #define ALT_UART1_SBCR_ADDR ALT_UART_SBCR_ADDR(ALT_UART1_ADDR)
6652 /* The address of the ALT_UART_SDMAM register for the ALT_UART1 instance. */
6653 #define ALT_UART1_SDMAM_ADDR ALT_UART_SDMAM_ADDR(ALT_UART1_ADDR)
6654 /* The address of the ALT_UART_SFE register for the ALT_UART1 instance. */
6655 #define ALT_UART1_SFE_ADDR ALT_UART_SFE_ADDR(ALT_UART1_ADDR)
6656 /* The address of the ALT_UART_SRT register for the ALT_UART1 instance. */
6657 #define ALT_UART1_SRT_ADDR ALT_UART_SRT_ADDR(ALT_UART1_ADDR)
6658 /* The address of the ALT_UART_STET register for the ALT_UART1 instance. */
6659 #define ALT_UART1_STET_ADDR ALT_UART_STET_ADDR(ALT_UART1_ADDR)
6660 /* The address of the ALT_UART_HTX register for the ALT_UART1 instance. */
6661 #define ALT_UART1_HTX_ADDR ALT_UART_HTX_ADDR(ALT_UART1_ADDR)
6662 /* The address of the ALT_UART_DMASA register for the ALT_UART1 instance. */
6663 #define ALT_UART1_DMASA_ADDR ALT_UART_DMASA_ADDR(ALT_UART1_ADDR)
6664 /* The address of the ALT_UART_CPR register for the ALT_UART1 instance. */
6665 #define ALT_UART1_CPR_ADDR ALT_UART_CPR_ADDR(ALT_UART1_ADDR)
6666 /* The address of the ALT_UART_UCV register for the ALT_UART1 instance. */
6667 #define ALT_UART1_UCV_ADDR ALT_UART_UCV_ADDR(ALT_UART1_ADDR)
6668 /* The address of the ALT_UART_CTR register for the ALT_UART1 instance. */
6669 #define ALT_UART1_CTR_ADDR ALT_UART_CTR_ADDR(ALT_UART1_ADDR)
6670 /* The base address byte offset for the start of the ALT_UART1 component. */
6671 #define ALT_UART1_OFST 0xffc02100
6672 /* The start address of the ALT_UART1 component. */
6673 #define ALT_UART1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_UART1_OFST))
6674 /* The lower bound address range of the ALT_UART1 component. */
6675 #define ALT_UART1_LB_ADDR ALT_UART1_ADDR
6676 /* The upper bound address range of the ALT_UART1 component. */
6677 #define ALT_UART1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_UART1_ADDR) + 0x100) - 1))
6678 
6679 
6680 /*
6681  * Component Instance : i_i2c_0_i2c
6682  *
6683  * Instance i_i2c_0_i2c of component ALT_I2C.
6684  *
6685  *
6686  */
6687 /* The address of the ALT_I2C_CON register for the ALT_I2C0 instance. */
6688 #define ALT_I2C0_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C0_ADDR)
6689 /* The address of the ALT_I2C_TAR register for the ALT_I2C0 instance. */
6690 #define ALT_I2C0_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C0_ADDR)
6691 /* The address of the ALT_I2C_SAR register for the ALT_I2C0 instance. */
6692 #define ALT_I2C0_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C0_ADDR)
6693 /* The address of the ALT_I2C_DATA_CMD register for the ALT_I2C0 instance. */
6694 #define ALT_I2C0_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C0_ADDR)
6695 /* The address of the ALT_I2C_SS_SCL_HCNT register for the ALT_I2C0 instance. */
6696 #define ALT_I2C0_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C0_ADDR)
6697 /* The address of the ALT_I2C_SS_SCL_LCNT register for the ALT_I2C0 instance. */
6698 #define ALT_I2C0_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C0_ADDR)
6699 /* The address of the ALT_I2C_FS_SCL_HCNT register for the ALT_I2C0 instance. */
6700 #define ALT_I2C0_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C0_ADDR)
6701 /* The address of the ALT_I2C_FS_SCL_LCNT register for the ALT_I2C0 instance. */
6702 #define ALT_I2C0_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C0_ADDR)
6703 /* The address of the ALT_I2C_INTR_STAT register for the ALT_I2C0 instance. */
6704 #define ALT_I2C0_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C0_ADDR)
6705 /* The address of the ALT_I2C_INTR_MSK register for the ALT_I2C0 instance. */
6706 #define ALT_I2C0_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C0_ADDR)
6707 /* The address of the ALT_I2C_RAW_INTR_STAT register for the ALT_I2C0 instance. */
6708 #define ALT_I2C0_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C0_ADDR)
6709 /* The address of the ALT_I2C_RX_TL register for the ALT_I2C0 instance. */
6710 #define ALT_I2C0_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C0_ADDR)
6711 /* The address of the ALT_I2C_TX_TL register for the ALT_I2C0 instance. */
6712 #define ALT_I2C0_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C0_ADDR)
6713 /* The address of the ALT_I2C_CLR_INTR register for the ALT_I2C0 instance. */
6714 #define ALT_I2C0_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C0_ADDR)
6715 /* The address of the ALT_I2C_CLR_RX_UNDER register for the ALT_I2C0 instance. */
6716 #define ALT_I2C0_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C0_ADDR)
6717 /* The address of the ALT_I2C_CLR_RX_OVER register for the ALT_I2C0 instance. */
6718 #define ALT_I2C0_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C0_ADDR)
6719 /* The address of the ALT_I2C_CLR_TX_OVER register for the ALT_I2C0 instance. */
6720 #define ALT_I2C0_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C0_ADDR)
6721 /* The address of the ALT_I2C_CLR_RD_REQ register for the ALT_I2C0 instance. */
6722 #define ALT_I2C0_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C0_ADDR)
6723 /* The address of the ALT_I2C_CLR_TX_ABRT register for the ALT_I2C0 instance. */
6724 #define ALT_I2C0_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C0_ADDR)
6725 /* The address of the ALT_I2C_CLR_RX_DONE register for the ALT_I2C0 instance. */
6726 #define ALT_I2C0_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C0_ADDR)
6727 /* The address of the ALT_I2C_CLR_ACTIVITY register for the ALT_I2C0 instance. */
6728 #define ALT_I2C0_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C0_ADDR)
6729 /* The address of the ALT_I2C_CLR_STOP_DET register for the ALT_I2C0 instance. */
6730 #define ALT_I2C0_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C0_ADDR)
6731 /* The address of the ALT_I2C_CLR_START_DET register for the ALT_I2C0 instance. */
6732 #define ALT_I2C0_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C0_ADDR)
6733 /* The address of the ALT_I2C_CLR_GEN_CALL register for the ALT_I2C0 instance. */
6734 #define ALT_I2C0_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C0_ADDR)
6735 /* The address of the ALT_I2C_EN register for the ALT_I2C0 instance. */
6736 #define ALT_I2C0_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C0_ADDR)
6737 /* The address of the ALT_I2C_STAT register for the ALT_I2C0 instance. */
6738 #define ALT_I2C0_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C0_ADDR)
6739 /* The address of the ALT_I2C_TXFLR register for the ALT_I2C0 instance. */
6740 #define ALT_I2C0_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C0_ADDR)
6741 /* The address of the ALT_I2C_RXFLR register for the ALT_I2C0 instance. */
6742 #define ALT_I2C0_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C0_ADDR)
6743 /* The address of the ALT_I2C_SDA_HOLD register for the ALT_I2C0 instance. */
6744 #define ALT_I2C0_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C0_ADDR)
6745 /* The address of the ALT_I2C_TX_ABRT_SRC register for the ALT_I2C0 instance. */
6746 #define ALT_I2C0_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C0_ADDR)
6747 /* The address of the ALT_I2C_SLV_DATA_NACK_ONLY register for the ALT_I2C0 instance. */
6748 #define ALT_I2C0_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C0_ADDR)
6749 /* The address of the ALT_I2C_DMA_CR register for the ALT_I2C0 instance. */
6750 #define ALT_I2C0_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C0_ADDR)
6751 /* The address of the ALT_I2C_DMA_TDLR register for the ALT_I2C0 instance. */
6752 #define ALT_I2C0_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C0_ADDR)
6753 /* The address of the ALT_I2C_DMA_RDLR register for the ALT_I2C0 instance. */
6754 #define ALT_I2C0_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C0_ADDR)
6755 /* The address of the ALT_I2C_SDA_SETUP register for the ALT_I2C0 instance. */
6756 #define ALT_I2C0_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C0_ADDR)
6757 /* The address of the ALT_I2C_ACK_GENERAL_CALL register for the ALT_I2C0 instance. */
6758 #define ALT_I2C0_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C0_ADDR)
6759 /* The address of the ALT_I2C_EN_STAT register for the ALT_I2C0 instance. */
6760 #define ALT_I2C0_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C0_ADDR)
6761 /* The address of the ALT_I2C_FS_SPKLEN register for the ALT_I2C0 instance. */
6762 #define ALT_I2C0_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C0_ADDR)
6763 /* The address of the ALT_I2C_CLR_RESTART_DET register for the ALT_I2C0 instance. */
6764 #define ALT_I2C0_CLR_RESTART_DET_ADDR ALT_I2C_CLR_RESTART_DET_ADDR(ALT_I2C0_ADDR)
6765 /* The address of the ALT_I2C_COMP_PARAM_1 register for the ALT_I2C0 instance. */
6766 #define ALT_I2C0_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C0_ADDR)
6767 /* The address of the ALT_I2C_COMP_VER register for the ALT_I2C0 instance. */
6768 #define ALT_I2C0_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C0_ADDR)
6769 /* The address of the ALT_I2C_COMP_TYPE register for the ALT_I2C0 instance. */
6770 #define ALT_I2C0_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C0_ADDR)
6771 /* The base address byte offset for the start of the ALT_I2C0 component. */
6772 #define ALT_I2C0_OFST 0xffc02200
6773 /* The start address of the ALT_I2C0 component. */
6774 #define ALT_I2C0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C0_OFST))
6775 /* The lower bound address range of the ALT_I2C0 component. */
6776 #define ALT_I2C0_LB_ADDR ALT_I2C0_ADDR
6777 /* The upper bound address range of the ALT_I2C0 component. */
6778 #define ALT_I2C0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C0_ADDR) + 0x100) - 1))
6779 
6780 
6781 /*
6782  * Component Instance : i_i2c_1_i2c
6783  *
6784  * Instance i_i2c_1_i2c of component ALT_I2C.
6785  *
6786  *
6787  */
6788 /* The address of the ALT_I2C_CON register for the ALT_I2C1 instance. */
6789 #define ALT_I2C1_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C1_ADDR)
6790 /* The address of the ALT_I2C_TAR register for the ALT_I2C1 instance. */
6791 #define ALT_I2C1_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C1_ADDR)
6792 /* The address of the ALT_I2C_SAR register for the ALT_I2C1 instance. */
6793 #define ALT_I2C1_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C1_ADDR)
6794 /* The address of the ALT_I2C_DATA_CMD register for the ALT_I2C1 instance. */
6795 #define ALT_I2C1_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C1_ADDR)
6796 /* The address of the ALT_I2C_SS_SCL_HCNT register for the ALT_I2C1 instance. */
6797 #define ALT_I2C1_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C1_ADDR)
6798 /* The address of the ALT_I2C_SS_SCL_LCNT register for the ALT_I2C1 instance. */
6799 #define ALT_I2C1_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C1_ADDR)
6800 /* The address of the ALT_I2C_FS_SCL_HCNT register for the ALT_I2C1 instance. */
6801 #define ALT_I2C1_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C1_ADDR)
6802 /* The address of the ALT_I2C_FS_SCL_LCNT register for the ALT_I2C1 instance. */
6803 #define ALT_I2C1_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C1_ADDR)
6804 /* The address of the ALT_I2C_INTR_STAT register for the ALT_I2C1 instance. */
6805 #define ALT_I2C1_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C1_ADDR)
6806 /* The address of the ALT_I2C_INTR_MSK register for the ALT_I2C1 instance. */
6807 #define ALT_I2C1_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C1_ADDR)
6808 /* The address of the ALT_I2C_RAW_INTR_STAT register for the ALT_I2C1 instance. */
6809 #define ALT_I2C1_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C1_ADDR)
6810 /* The address of the ALT_I2C_RX_TL register for the ALT_I2C1 instance. */
6811 #define ALT_I2C1_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C1_ADDR)
6812 /* The address of the ALT_I2C_TX_TL register for the ALT_I2C1 instance. */
6813 #define ALT_I2C1_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C1_ADDR)
6814 /* The address of the ALT_I2C_CLR_INTR register for the ALT_I2C1 instance. */
6815 #define ALT_I2C1_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C1_ADDR)
6816 /* The address of the ALT_I2C_CLR_RX_UNDER register for the ALT_I2C1 instance. */
6817 #define ALT_I2C1_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C1_ADDR)
6818 /* The address of the ALT_I2C_CLR_RX_OVER register for the ALT_I2C1 instance. */
6819 #define ALT_I2C1_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C1_ADDR)
6820 /* The address of the ALT_I2C_CLR_TX_OVER register for the ALT_I2C1 instance. */
6821 #define ALT_I2C1_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C1_ADDR)
6822 /* The address of the ALT_I2C_CLR_RD_REQ register for the ALT_I2C1 instance. */
6823 #define ALT_I2C1_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C1_ADDR)
6824 /* The address of the ALT_I2C_CLR_TX_ABRT register for the ALT_I2C1 instance. */
6825 #define ALT_I2C1_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C1_ADDR)
6826 /* The address of the ALT_I2C_CLR_RX_DONE register for the ALT_I2C1 instance. */
6827 #define ALT_I2C1_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C1_ADDR)
6828 /* The address of the ALT_I2C_CLR_ACTIVITY register for the ALT_I2C1 instance. */
6829 #define ALT_I2C1_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C1_ADDR)
6830 /* The address of the ALT_I2C_CLR_STOP_DET register for the ALT_I2C1 instance. */
6831 #define ALT_I2C1_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C1_ADDR)
6832 /* The address of the ALT_I2C_CLR_START_DET register for the ALT_I2C1 instance. */
6833 #define ALT_I2C1_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C1_ADDR)
6834 /* The address of the ALT_I2C_CLR_GEN_CALL register for the ALT_I2C1 instance. */
6835 #define ALT_I2C1_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C1_ADDR)
6836 /* The address of the ALT_I2C_EN register for the ALT_I2C1 instance. */
6837 #define ALT_I2C1_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C1_ADDR)
6838 /* The address of the ALT_I2C_STAT register for the ALT_I2C1 instance. */
6839 #define ALT_I2C1_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C1_ADDR)
6840 /* The address of the ALT_I2C_TXFLR register for the ALT_I2C1 instance. */
6841 #define ALT_I2C1_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C1_ADDR)
6842 /* The address of the ALT_I2C_RXFLR register for the ALT_I2C1 instance. */
6843 #define ALT_I2C1_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C1_ADDR)
6844 /* The address of the ALT_I2C_SDA_HOLD register for the ALT_I2C1 instance. */
6845 #define ALT_I2C1_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C1_ADDR)
6846 /* The address of the ALT_I2C_TX_ABRT_SRC register for the ALT_I2C1 instance. */
6847 #define ALT_I2C1_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C1_ADDR)
6848 /* The address of the ALT_I2C_SLV_DATA_NACK_ONLY register for the ALT_I2C1 instance. */
6849 #define ALT_I2C1_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C1_ADDR)
6850 /* The address of the ALT_I2C_DMA_CR register for the ALT_I2C1 instance. */
6851 #define ALT_I2C1_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C1_ADDR)
6852 /* The address of the ALT_I2C_DMA_TDLR register for the ALT_I2C1 instance. */
6853 #define ALT_I2C1_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C1_ADDR)
6854 /* The address of the ALT_I2C_DMA_RDLR register for the ALT_I2C1 instance. */
6855 #define ALT_I2C1_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C1_ADDR)
6856 /* The address of the ALT_I2C_SDA_SETUP register for the ALT_I2C1 instance. */
6857 #define ALT_I2C1_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C1_ADDR)
6858 /* The address of the ALT_I2C_ACK_GENERAL_CALL register for the ALT_I2C1 instance. */
6859 #define ALT_I2C1_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C1_ADDR)
6860 /* The address of the ALT_I2C_EN_STAT register for the ALT_I2C1 instance. */
6861 #define ALT_I2C1_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C1_ADDR)
6862 /* The address of the ALT_I2C_FS_SPKLEN register for the ALT_I2C1 instance. */
6863 #define ALT_I2C1_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C1_ADDR)
6864 /* The address of the ALT_I2C_CLR_RESTART_DET register for the ALT_I2C1 instance. */
6865 #define ALT_I2C1_CLR_RESTART_DET_ADDR ALT_I2C_CLR_RESTART_DET_ADDR(ALT_I2C1_ADDR)
6866 /* The address of the ALT_I2C_COMP_PARAM_1 register for the ALT_I2C1 instance. */
6867 #define ALT_I2C1_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C1_ADDR)
6868 /* The address of the ALT_I2C_COMP_VER register for the ALT_I2C1 instance. */
6869 #define ALT_I2C1_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C1_ADDR)
6870 /* The address of the ALT_I2C_COMP_TYPE register for the ALT_I2C1 instance. */
6871 #define ALT_I2C1_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C1_ADDR)
6872 /* The base address byte offset for the start of the ALT_I2C1 component. */
6873 #define ALT_I2C1_OFST 0xffc02300
6874 /* The start address of the ALT_I2C1 component. */
6875 #define ALT_I2C1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C1_OFST))
6876 /* The lower bound address range of the ALT_I2C1 component. */
6877 #define ALT_I2C1_LB_ADDR ALT_I2C1_ADDR
6878 /* The upper bound address range of the ALT_I2C1 component. */
6879 #define ALT_I2C1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C1_ADDR) + 0x100) - 1))
6880 
6881 
6882 /*
6883  * Component Instance : i_i2c_emac_0_i2c
6884  *
6885  * Instance i_i2c_emac_0_i2c of component ALT_I2C.
6886  *
6887  *
6888  */
6889 /* The address of the ALT_I2C_CON register for the ALT_I2C_EMAC_0_I2C instance. */
6890 #define ALT_I2C_EMAC_0_I2C_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6891 /* The address of the ALT_I2C_TAR register for the ALT_I2C_EMAC_0_I2C instance. */
6892 #define ALT_I2C_EMAC_0_I2C_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6893 /* The address of the ALT_I2C_SAR register for the ALT_I2C_EMAC_0_I2C instance. */
6894 #define ALT_I2C_EMAC_0_I2C_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6895 /* The address of the ALT_I2C_DATA_CMD register for the ALT_I2C_EMAC_0_I2C instance. */
6896 #define ALT_I2C_EMAC_0_I2C_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6897 /* The address of the ALT_I2C_SS_SCL_HCNT register for the ALT_I2C_EMAC_0_I2C instance. */
6898 #define ALT_I2C_EMAC_0_I2C_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6899 /* The address of the ALT_I2C_SS_SCL_LCNT register for the ALT_I2C_EMAC_0_I2C instance. */
6900 #define ALT_I2C_EMAC_0_I2C_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6901 /* The address of the ALT_I2C_FS_SCL_HCNT register for the ALT_I2C_EMAC_0_I2C instance. */
6902 #define ALT_I2C_EMAC_0_I2C_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6903 /* The address of the ALT_I2C_FS_SCL_LCNT register for the ALT_I2C_EMAC_0_I2C instance. */
6904 #define ALT_I2C_EMAC_0_I2C_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6905 /* The address of the ALT_I2C_INTR_STAT register for the ALT_I2C_EMAC_0_I2C instance. */
6906 #define ALT_I2C_EMAC_0_I2C_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6907 /* The address of the ALT_I2C_INTR_MSK register for the ALT_I2C_EMAC_0_I2C instance. */
6908 #define ALT_I2C_EMAC_0_I2C_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6909 /* The address of the ALT_I2C_RAW_INTR_STAT register for the ALT_I2C_EMAC_0_I2C instance. */
6910 #define ALT_I2C_EMAC_0_I2C_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6911 /* The address of the ALT_I2C_RX_TL register for the ALT_I2C_EMAC_0_I2C instance. */
6912 #define ALT_I2C_EMAC_0_I2C_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6913 /* The address of the ALT_I2C_TX_TL register for the ALT_I2C_EMAC_0_I2C instance. */
6914 #define ALT_I2C_EMAC_0_I2C_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6915 /* The address of the ALT_I2C_CLR_INTR register for the ALT_I2C_EMAC_0_I2C instance. */
6916 #define ALT_I2C_EMAC_0_I2C_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6917 /* The address of the ALT_I2C_CLR_RX_UNDER register for the ALT_I2C_EMAC_0_I2C instance. */
6918 #define ALT_I2C_EMAC_0_I2C_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6919 /* The address of the ALT_I2C_CLR_RX_OVER register for the ALT_I2C_EMAC_0_I2C instance. */
6920 #define ALT_I2C_EMAC_0_I2C_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6921 /* The address of the ALT_I2C_CLR_TX_OVER register for the ALT_I2C_EMAC_0_I2C instance. */
6922 #define ALT_I2C_EMAC_0_I2C_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6923 /* The address of the ALT_I2C_CLR_RD_REQ register for the ALT_I2C_EMAC_0_I2C instance. */
6924 #define ALT_I2C_EMAC_0_I2C_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6925 /* The address of the ALT_I2C_CLR_TX_ABRT register for the ALT_I2C_EMAC_0_I2C instance. */
6926 #define ALT_I2C_EMAC_0_I2C_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6927 /* The address of the ALT_I2C_CLR_RX_DONE register for the ALT_I2C_EMAC_0_I2C instance. */
6928 #define ALT_I2C_EMAC_0_I2C_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6929 /* The address of the ALT_I2C_CLR_ACTIVITY register for the ALT_I2C_EMAC_0_I2C instance. */
6930 #define ALT_I2C_EMAC_0_I2C_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6931 /* The address of the ALT_I2C_CLR_STOP_DET register for the ALT_I2C_EMAC_0_I2C instance. */
6932 #define ALT_I2C_EMAC_0_I2C_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6933 /* The address of the ALT_I2C_CLR_START_DET register for the ALT_I2C_EMAC_0_I2C instance. */
6934 #define ALT_I2C_EMAC_0_I2C_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6935 /* The address of the ALT_I2C_CLR_GEN_CALL register for the ALT_I2C_EMAC_0_I2C instance. */
6936 #define ALT_I2C_EMAC_0_I2C_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6937 /* The address of the ALT_I2C_EN register for the ALT_I2C_EMAC_0_I2C instance. */
6938 #define ALT_I2C_EMAC_0_I2C_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6939 /* The address of the ALT_I2C_STAT register for the ALT_I2C_EMAC_0_I2C instance. */
6940 #define ALT_I2C_EMAC_0_I2C_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6941 /* The address of the ALT_I2C_TXFLR register for the ALT_I2C_EMAC_0_I2C instance. */
6942 #define ALT_I2C_EMAC_0_I2C_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6943 /* The address of the ALT_I2C_RXFLR register for the ALT_I2C_EMAC_0_I2C instance. */
6944 #define ALT_I2C_EMAC_0_I2C_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6945 /* The address of the ALT_I2C_SDA_HOLD register for the ALT_I2C_EMAC_0_I2C instance. */
6946 #define ALT_I2C_EMAC_0_I2C_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6947 /* The address of the ALT_I2C_TX_ABRT_SRC register for the ALT_I2C_EMAC_0_I2C instance. */
6948 #define ALT_I2C_EMAC_0_I2C_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6949 /* The address of the ALT_I2C_SLV_DATA_NACK_ONLY register for the ALT_I2C_EMAC_0_I2C instance. */
6950 #define ALT_I2C_EMAC_0_I2C_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6951 /* The address of the ALT_I2C_DMA_CR register for the ALT_I2C_EMAC_0_I2C instance. */
6952 #define ALT_I2C_EMAC_0_I2C_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6953 /* The address of the ALT_I2C_DMA_TDLR register for the ALT_I2C_EMAC_0_I2C instance. */
6954 #define ALT_I2C_EMAC_0_I2C_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6955 /* The address of the ALT_I2C_DMA_RDLR register for the ALT_I2C_EMAC_0_I2C instance. */
6956 #define ALT_I2C_EMAC_0_I2C_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6957 /* The address of the ALT_I2C_SDA_SETUP register for the ALT_I2C_EMAC_0_I2C instance. */
6958 #define ALT_I2C_EMAC_0_I2C_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6959 /* The address of the ALT_I2C_ACK_GENERAL_CALL register for the ALT_I2C_EMAC_0_I2C instance. */
6960 #define ALT_I2C_EMAC_0_I2C_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6961 /* The address of the ALT_I2C_EN_STAT register for the ALT_I2C_EMAC_0_I2C instance. */
6962 #define ALT_I2C_EMAC_0_I2C_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6963 /* The address of the ALT_I2C_FS_SPKLEN register for the ALT_I2C_EMAC_0_I2C instance. */
6964 #define ALT_I2C_EMAC_0_I2C_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6965 /* The address of the ALT_I2C_CLR_RESTART_DET register for the ALT_I2C_EMAC_0_I2C instance. */
6966 #define ALT_I2C_EMAC_0_I2C_CLR_RESTART_DET_ADDR ALT_I2C_CLR_RESTART_DET_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6967 /* The address of the ALT_I2C_COMP_PARAM_1 register for the ALT_I2C_EMAC_0_I2C instance. */
6968 #define ALT_I2C_EMAC_0_I2C_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6969 /* The address of the ALT_I2C_COMP_VER register for the ALT_I2C_EMAC_0_I2C instance. */
6970 #define ALT_I2C_EMAC_0_I2C_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6971 /* The address of the ALT_I2C_COMP_TYPE register for the ALT_I2C_EMAC_0_I2C instance. */
6972 #define ALT_I2C_EMAC_0_I2C_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6973 /* The base address byte offset for the start of the ALT_I2C_EMAC_0_I2C component. */
6974 #define ALT_I2C_EMAC_0_I2C_OFST 0xffc02400
6975 /* The start address of the ALT_I2C_EMAC_0_I2C component. */
6976 #define ALT_I2C_EMAC_0_I2C_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C_EMAC_0_I2C_OFST))
6977 /* The lower bound address range of the ALT_I2C_EMAC_0_I2C component. */
6978 #define ALT_I2C_EMAC_0_I2C_LB_ADDR ALT_I2C_EMAC_0_I2C_ADDR
6979 /* The upper bound address range of the ALT_I2C_EMAC_0_I2C component. */
6980 #define ALT_I2C_EMAC_0_I2C_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C_EMAC_0_I2C_ADDR) + 0x100) - 1))
6981 
6982 
6983 /*
6984  * Component Instance : i_i2c_emac_1_i2c
6985  *
6986  * Instance i_i2c_emac_1_i2c of component ALT_I2C.
6987  *
6988  *
6989  */
6990 /* The address of the ALT_I2C_CON register for the ALT_I2C_EMAC_1_I2C instance. */
6991 #define ALT_I2C_EMAC_1_I2C_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
6992 /* The address of the ALT_I2C_TAR register for the ALT_I2C_EMAC_1_I2C instance. */
6993 #define ALT_I2C_EMAC_1_I2C_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
6994 /* The address of the ALT_I2C_SAR register for the ALT_I2C_EMAC_1_I2C instance. */
6995 #define ALT_I2C_EMAC_1_I2C_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
6996 /* The address of the ALT_I2C_DATA_CMD register for the ALT_I2C_EMAC_1_I2C instance. */
6997 #define ALT_I2C_EMAC_1_I2C_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
6998 /* The address of the ALT_I2C_SS_SCL_HCNT register for the ALT_I2C_EMAC_1_I2C instance. */
6999 #define ALT_I2C_EMAC_1_I2C_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7000 /* The address of the ALT_I2C_SS_SCL_LCNT register for the ALT_I2C_EMAC_1_I2C instance. */
7001 #define ALT_I2C_EMAC_1_I2C_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7002 /* The address of the ALT_I2C_FS_SCL_HCNT register for the ALT_I2C_EMAC_1_I2C instance. */
7003 #define ALT_I2C_EMAC_1_I2C_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7004 /* The address of the ALT_I2C_FS_SCL_LCNT register for the ALT_I2C_EMAC_1_I2C instance. */
7005 #define ALT_I2C_EMAC_1_I2C_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7006 /* The address of the ALT_I2C_INTR_STAT register for the ALT_I2C_EMAC_1_I2C instance. */
7007 #define ALT_I2C_EMAC_1_I2C_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7008 /* The address of the ALT_I2C_INTR_MSK register for the ALT_I2C_EMAC_1_I2C instance. */
7009 #define ALT_I2C_EMAC_1_I2C_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7010 /* The address of the ALT_I2C_RAW_INTR_STAT register for the ALT_I2C_EMAC_1_I2C instance. */
7011 #define ALT_I2C_EMAC_1_I2C_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7012 /* The address of the ALT_I2C_RX_TL register for the ALT_I2C_EMAC_1_I2C instance. */
7013 #define ALT_I2C_EMAC_1_I2C_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7014 /* The address of the ALT_I2C_TX_TL register for the ALT_I2C_EMAC_1_I2C instance. */
7015 #define ALT_I2C_EMAC_1_I2C_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7016 /* The address of the ALT_I2C_CLR_INTR register for the ALT_I2C_EMAC_1_I2C instance. */
7017 #define ALT_I2C_EMAC_1_I2C_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7018 /* The address of the ALT_I2C_CLR_RX_UNDER register for the ALT_I2C_EMAC_1_I2C instance. */
7019 #define ALT_I2C_EMAC_1_I2C_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7020 /* The address of the ALT_I2C_CLR_RX_OVER register for the ALT_I2C_EMAC_1_I2C instance. */
7021 #define ALT_I2C_EMAC_1_I2C_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7022 /* The address of the ALT_I2C_CLR_TX_OVER register for the ALT_I2C_EMAC_1_I2C instance. */
7023 #define ALT_I2C_EMAC_1_I2C_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7024 /* The address of the ALT_I2C_CLR_RD_REQ register for the ALT_I2C_EMAC_1_I2C instance. */
7025 #define ALT_I2C_EMAC_1_I2C_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7026 /* The address of the ALT_I2C_CLR_TX_ABRT register for the ALT_I2C_EMAC_1_I2C instance. */
7027 #define ALT_I2C_EMAC_1_I2C_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7028 /* The address of the ALT_I2C_CLR_RX_DONE register for the ALT_I2C_EMAC_1_I2C instance. */
7029 #define ALT_I2C_EMAC_1_I2C_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7030 /* The address of the ALT_I2C_CLR_ACTIVITY register for the ALT_I2C_EMAC_1_I2C instance. */
7031 #define ALT_I2C_EMAC_1_I2C_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7032 /* The address of the ALT_I2C_CLR_STOP_DET register for the ALT_I2C_EMAC_1_I2C instance. */
7033 #define ALT_I2C_EMAC_1_I2C_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7034 /* The address of the ALT_I2C_CLR_START_DET register for the ALT_I2C_EMAC_1_I2C instance. */
7035 #define ALT_I2C_EMAC_1_I2C_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7036 /* The address of the ALT_I2C_CLR_GEN_CALL register for the ALT_I2C_EMAC_1_I2C instance. */
7037 #define ALT_I2C_EMAC_1_I2C_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7038 /* The address of the ALT_I2C_EN register for the ALT_I2C_EMAC_1_I2C instance. */
7039 #define ALT_I2C_EMAC_1_I2C_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7040 /* The address of the ALT_I2C_STAT register for the ALT_I2C_EMAC_1_I2C instance. */
7041 #define ALT_I2C_EMAC_1_I2C_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7042 /* The address of the ALT_I2C_TXFLR register for the ALT_I2C_EMAC_1_I2C instance. */
7043 #define ALT_I2C_EMAC_1_I2C_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7044 /* The address of the ALT_I2C_RXFLR register for the ALT_I2C_EMAC_1_I2C instance. */
7045 #define ALT_I2C_EMAC_1_I2C_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7046 /* The address of the ALT_I2C_SDA_HOLD register for the ALT_I2C_EMAC_1_I2C instance. */
7047 #define ALT_I2C_EMAC_1_I2C_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7048 /* The address of the ALT_I2C_TX_ABRT_SRC register for the ALT_I2C_EMAC_1_I2C instance. */
7049 #define ALT_I2C_EMAC_1_I2C_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7050 /* The address of the ALT_I2C_SLV_DATA_NACK_ONLY register for the ALT_I2C_EMAC_1_I2C instance. */
7051 #define ALT_I2C_EMAC_1_I2C_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7052 /* The address of the ALT_I2C_DMA_CR register for the ALT_I2C_EMAC_1_I2C instance. */
7053 #define ALT_I2C_EMAC_1_I2C_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7054 /* The address of the ALT_I2C_DMA_TDLR register for the ALT_I2C_EMAC_1_I2C instance. */
7055 #define ALT_I2C_EMAC_1_I2C_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7056 /* The address of the ALT_I2C_DMA_RDLR register for the ALT_I2C_EMAC_1_I2C instance. */
7057 #define ALT_I2C_EMAC_1_I2C_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7058 /* The address of the ALT_I2C_SDA_SETUP register for the ALT_I2C_EMAC_1_I2C instance. */
7059 #define ALT_I2C_EMAC_1_I2C_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7060 /* The address of the ALT_I2C_ACK_GENERAL_CALL register for the ALT_I2C_EMAC_1_I2C instance. */
7061 #define ALT_I2C_EMAC_1_I2C_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7062 /* The address of the ALT_I2C_EN_STAT register for the ALT_I2C_EMAC_1_I2C instance. */
7063 #define ALT_I2C_EMAC_1_I2C_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7064 /* The address of the ALT_I2C_FS_SPKLEN register for the ALT_I2C_EMAC_1_I2C instance. */
7065 #define ALT_I2C_EMAC_1_I2C_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7066 /* The address of the ALT_I2C_CLR_RESTART_DET register for the ALT_I2C_EMAC_1_I2C instance. */
7067 #define ALT_I2C_EMAC_1_I2C_CLR_RESTART_DET_ADDR ALT_I2C_CLR_RESTART_DET_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7068 /* The address of the ALT_I2C_COMP_PARAM_1 register for the ALT_I2C_EMAC_1_I2C instance. */
7069 #define ALT_I2C_EMAC_1_I2C_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7070 /* The address of the ALT_I2C_COMP_VER register for the ALT_I2C_EMAC_1_I2C instance. */
7071 #define ALT_I2C_EMAC_1_I2C_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7072 /* The address of the ALT_I2C_COMP_TYPE register for the ALT_I2C_EMAC_1_I2C instance. */
7073 #define ALT_I2C_EMAC_1_I2C_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7074 /* The base address byte offset for the start of the ALT_I2C_EMAC_1_I2C component. */
7075 #define ALT_I2C_EMAC_1_I2C_OFST 0xffc02500
7076 /* The start address of the ALT_I2C_EMAC_1_I2C component. */
7077 #define ALT_I2C_EMAC_1_I2C_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C_EMAC_1_I2C_OFST))
7078 /* The lower bound address range of the ALT_I2C_EMAC_1_I2C component. */
7079 #define ALT_I2C_EMAC_1_I2C_LB_ADDR ALT_I2C_EMAC_1_I2C_ADDR
7080 /* The upper bound address range of the ALT_I2C_EMAC_1_I2C component. */
7081 #define ALT_I2C_EMAC_1_I2C_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C_EMAC_1_I2C_ADDR) + 0x100) - 1))
7082 
7083 
7084 /*
7085  * Component Instance : i_i2c_emac_2_i2c
7086  *
7087  * Instance i_i2c_emac_2_i2c of component ALT_I2C.
7088  *
7089  *
7090  */
7091 /* The address of the ALT_I2C_CON register for the ALT_I2C_EMAC_2_I2C instance. */
7092 #define ALT_I2C_EMAC_2_I2C_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7093 /* The address of the ALT_I2C_TAR register for the ALT_I2C_EMAC_2_I2C instance. */
7094 #define ALT_I2C_EMAC_2_I2C_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7095 /* The address of the ALT_I2C_SAR register for the ALT_I2C_EMAC_2_I2C instance. */
7096 #define ALT_I2C_EMAC_2_I2C_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7097 /* The address of the ALT_I2C_DATA_CMD register for the ALT_I2C_EMAC_2_I2C instance. */
7098 #define ALT_I2C_EMAC_2_I2C_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7099 /* The address of the ALT_I2C_SS_SCL_HCNT register for the ALT_I2C_EMAC_2_I2C instance. */
7100 #define ALT_I2C_EMAC_2_I2C_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7101 /* The address of the ALT_I2C_SS_SCL_LCNT register for the ALT_I2C_EMAC_2_I2C instance. */
7102 #define ALT_I2C_EMAC_2_I2C_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7103 /* The address of the ALT_I2C_FS_SCL_HCNT register for the ALT_I2C_EMAC_2_I2C instance. */
7104 #define ALT_I2C_EMAC_2_I2C_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7105 /* The address of the ALT_I2C_FS_SCL_LCNT register for the ALT_I2C_EMAC_2_I2C instance. */
7106 #define ALT_I2C_EMAC_2_I2C_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7107 /* The address of the ALT_I2C_INTR_STAT register for the ALT_I2C_EMAC_2_I2C instance. */
7108 #define ALT_I2C_EMAC_2_I2C_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7109 /* The address of the ALT_I2C_INTR_MSK register for the ALT_I2C_EMAC_2_I2C instance. */
7110 #define ALT_I2C_EMAC_2_I2C_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7111 /* The address of the ALT_I2C_RAW_INTR_STAT register for the ALT_I2C_EMAC_2_I2C instance. */
7112 #define ALT_I2C_EMAC_2_I2C_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7113 /* The address of the ALT_I2C_RX_TL register for the ALT_I2C_EMAC_2_I2C instance. */
7114 #define ALT_I2C_EMAC_2_I2C_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7115 /* The address of the ALT_I2C_TX_TL register for the ALT_I2C_EMAC_2_I2C instance. */
7116 #define ALT_I2C_EMAC_2_I2C_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7117 /* The address of the ALT_I2C_CLR_INTR register for the ALT_I2C_EMAC_2_I2C instance. */
7118 #define ALT_I2C_EMAC_2_I2C_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7119 /* The address of the ALT_I2C_CLR_RX_UNDER register for the ALT_I2C_EMAC_2_I2C instance. */
7120 #define ALT_I2C_EMAC_2_I2C_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7121 /* The address of the ALT_I2C_CLR_RX_OVER register for the ALT_I2C_EMAC_2_I2C instance. */
7122 #define ALT_I2C_EMAC_2_I2C_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7123 /* The address of the ALT_I2C_CLR_TX_OVER register for the ALT_I2C_EMAC_2_I2C instance. */
7124 #define ALT_I2C_EMAC_2_I2C_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7125 /* The address of the ALT_I2C_CLR_RD_REQ register for the ALT_I2C_EMAC_2_I2C instance. */
7126 #define ALT_I2C_EMAC_2_I2C_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7127 /* The address of the ALT_I2C_CLR_TX_ABRT register for the ALT_I2C_EMAC_2_I2C instance. */
7128 #define ALT_I2C_EMAC_2_I2C_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7129 /* The address of the ALT_I2C_CLR_RX_DONE register for the ALT_I2C_EMAC_2_I2C instance. */
7130 #define ALT_I2C_EMAC_2_I2C_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7131 /* The address of the ALT_I2C_CLR_ACTIVITY register for the ALT_I2C_EMAC_2_I2C instance. */
7132 #define ALT_I2C_EMAC_2_I2C_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7133 /* The address of the ALT_I2C_CLR_STOP_DET register for the ALT_I2C_EMAC_2_I2C instance. */
7134 #define ALT_I2C_EMAC_2_I2C_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7135 /* The address of the ALT_I2C_CLR_START_DET register for the ALT_I2C_EMAC_2_I2C instance. */
7136 #define ALT_I2C_EMAC_2_I2C_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7137 /* The address of the ALT_I2C_CLR_GEN_CALL register for the ALT_I2C_EMAC_2_I2C instance. */
7138 #define ALT_I2C_EMAC_2_I2C_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7139 /* The address of the ALT_I2C_EN register for the ALT_I2C_EMAC_2_I2C instance. */
7140 #define ALT_I2C_EMAC_2_I2C_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7141 /* The address of the ALT_I2C_STAT register for the ALT_I2C_EMAC_2_I2C instance. */
7142 #define ALT_I2C_EMAC_2_I2C_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7143 /* The address of the ALT_I2C_TXFLR register for the ALT_I2C_EMAC_2_I2C instance. */
7144 #define ALT_I2C_EMAC_2_I2C_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7145 /* The address of the ALT_I2C_RXFLR register for the ALT_I2C_EMAC_2_I2C instance. */
7146 #define ALT_I2C_EMAC_2_I2C_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7147 /* The address of the ALT_I2C_SDA_HOLD register for the ALT_I2C_EMAC_2_I2C instance. */
7148 #define ALT_I2C_EMAC_2_I2C_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7149 /* The address of the ALT_I2C_TX_ABRT_SRC register for the ALT_I2C_EMAC_2_I2C instance. */
7150 #define ALT_I2C_EMAC_2_I2C_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7151 /* The address of the ALT_I2C_SLV_DATA_NACK_ONLY register for the ALT_I2C_EMAC_2_I2C instance. */
7152 #define ALT_I2C_EMAC_2_I2C_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7153 /* The address of the ALT_I2C_DMA_CR register for the ALT_I2C_EMAC_2_I2C instance. */
7154 #define ALT_I2C_EMAC_2_I2C_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7155 /* The address of the ALT_I2C_DMA_TDLR register for the ALT_I2C_EMAC_2_I2C instance. */
7156 #define ALT_I2C_EMAC_2_I2C_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7157 /* The address of the ALT_I2C_DMA_RDLR register for the ALT_I2C_EMAC_2_I2C instance. */
7158 #define ALT_I2C_EMAC_2_I2C_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7159 /* The address of the ALT_I2C_SDA_SETUP register for the ALT_I2C_EMAC_2_I2C instance. */
7160 #define ALT_I2C_EMAC_2_I2C_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7161 /* The address of the ALT_I2C_ACK_GENERAL_CALL register for the ALT_I2C_EMAC_2_I2C instance. */
7162 #define ALT_I2C_EMAC_2_I2C_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7163 /* The address of the ALT_I2C_EN_STAT register for the ALT_I2C_EMAC_2_I2C instance. */
7164 #define ALT_I2C_EMAC_2_I2C_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7165 /* The address of the ALT_I2C_FS_SPKLEN register for the ALT_I2C_EMAC_2_I2C instance. */
7166 #define ALT_I2C_EMAC_2_I2C_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7167 /* The address of the ALT_I2C_CLR_RESTART_DET register for the ALT_I2C_EMAC_2_I2C instance. */
7168 #define ALT_I2C_EMAC_2_I2C_CLR_RESTART_DET_ADDR ALT_I2C_CLR_RESTART_DET_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7169 /* The address of the ALT_I2C_COMP_PARAM_1 register for the ALT_I2C_EMAC_2_I2C instance. */
7170 #define ALT_I2C_EMAC_2_I2C_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7171 /* The address of the ALT_I2C_COMP_VER register for the ALT_I2C_EMAC_2_I2C instance. */
7172 #define ALT_I2C_EMAC_2_I2C_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7173 /* The address of the ALT_I2C_COMP_TYPE register for the ALT_I2C_EMAC_2_I2C instance. */
7174 #define ALT_I2C_EMAC_2_I2C_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7175 /* The base address byte offset for the start of the ALT_I2C_EMAC_2_I2C component. */
7176 #define ALT_I2C_EMAC_2_I2C_OFST 0xffc02600
7177 /* The start address of the ALT_I2C_EMAC_2_I2C component. */
7178 #define ALT_I2C_EMAC_2_I2C_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C_EMAC_2_I2C_OFST))
7179 /* The lower bound address range of the ALT_I2C_EMAC_2_I2C component. */
7180 #define ALT_I2C_EMAC_2_I2C_LB_ADDR ALT_I2C_EMAC_2_I2C_ADDR
7181 /* The upper bound address range of the ALT_I2C_EMAC_2_I2C component. */
7182 #define ALT_I2C_EMAC_2_I2C_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C_EMAC_2_I2C_ADDR) + 0x100) - 1))
7183 
7184 
7185 /*
7186  * Component Instance : i_timer_sp_0_timer
7187  *
7188  * Instance i_timer_sp_0_timer of component ALT_TMR.
7189  *
7190  *
7191  */
7192 /* The address of the ALT_TMR_TMR1LDCOUNT register for the ALT_SPTMR0 instance. */
7193 #define ALT_SPTMR0_TMR1LDCOUNT_ADDR ALT_TMR_TMR1LDCOUNT_ADDR(ALT_SPTMR0_ADDR)
7194 /* The address of the ALT_TMR_TMR1CURVAL register for the ALT_SPTMR0 instance. */
7195 #define ALT_SPTMR0_TMR1CURVAL_ADDR ALT_TMR_TMR1CURVAL_ADDR(ALT_SPTMR0_ADDR)
7196 /* The address of the ALT_TMR_TMR1CTLREG register for the ALT_SPTMR0 instance. */
7197 #define ALT_SPTMR0_TMR1CTLREG_ADDR ALT_TMR_TMR1CTLREG_ADDR(ALT_SPTMR0_ADDR)
7198 /* The address of the ALT_TMR_TMR1EOI register for the ALT_SPTMR0 instance. */
7199 #define ALT_SPTMR0_TMR1EOI_ADDR ALT_TMR_TMR1EOI_ADDR(ALT_SPTMR0_ADDR)
7200 /* The address of the ALT_TMR_TMR1INTSTAT register for the ALT_SPTMR0 instance. */
7201 #define ALT_SPTMR0_TMR1INTSTAT_ADDR ALT_TMR_TMR1INTSTAT_ADDR(ALT_SPTMR0_ADDR)
7202 /* The address of the ALT_TMR_TMRSINTSTAT register for the ALT_SPTMR0 instance. */
7203 #define ALT_SPTMR0_TMRSINTSTAT_ADDR ALT_TMR_TMRSINTSTAT_ADDR(ALT_SPTMR0_ADDR)
7204 /* The address of the ALT_TMR_TMRSEOI register for the ALT_SPTMR0 instance. */
7205 #define ALT_SPTMR0_TMRSEOI_ADDR ALT_TMR_TMRSEOI_ADDR(ALT_SPTMR0_ADDR)
7206 /* The address of the ALT_TMR_TMRSRAWINTSTAT register for the ALT_SPTMR0 instance. */
7207 #define ALT_SPTMR0_TMRSRAWINTSTAT_ADDR ALT_TMR_TMRSRAWINTSTAT_ADDR(ALT_SPTMR0_ADDR)
7208 /* The address of the ALT_TMR_TMRSCOMPVER register for the ALT_SPTMR0 instance. */
7209 #define ALT_SPTMR0_TMRSCOMPVER_ADDR ALT_TMR_TMRSCOMPVER_ADDR(ALT_SPTMR0_ADDR)
7210 /* The base address byte offset for the start of the ALT_SPTMR0 component. */
7211 #define ALT_SPTMR0_OFST 0xffc02700
7212 /* The start address of the ALT_SPTMR0 component. */
7213 #define ALT_SPTMR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPTMR0_OFST))
7214 /* The lower bound address range of the ALT_SPTMR0 component. */
7215 #define ALT_SPTMR0_LB_ADDR ALT_SPTMR0_ADDR
7216 /* The upper bound address range of the ALT_SPTMR0 component. */
7217 #define ALT_SPTMR0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPTMR0_ADDR) + 0x100) - 1))
7218 
7219 
7220 /*
7221  * Component Instance : i_timer_sp_1_timer
7222  *
7223  * Instance i_timer_sp_1_timer of component ALT_TMR.
7224  *
7225  *
7226  */
7227 /* The address of the ALT_TMR_TMR1LDCOUNT register for the ALT_SPTMR1 instance. */
7228 #define ALT_SPTMR1_TMR1LDCOUNT_ADDR ALT_TMR_TMR1LDCOUNT_ADDR(ALT_SPTMR1_ADDR)
7229 /* The address of the ALT_TMR_TMR1CURVAL register for the ALT_SPTMR1 instance. */
7230 #define ALT_SPTMR1_TMR1CURVAL_ADDR ALT_TMR_TMR1CURVAL_ADDR(ALT_SPTMR1_ADDR)
7231 /* The address of the ALT_TMR_TMR1CTLREG register for the ALT_SPTMR1 instance. */
7232 #define ALT_SPTMR1_TMR1CTLREG_ADDR ALT_TMR_TMR1CTLREG_ADDR(ALT_SPTMR1_ADDR)
7233 /* The address of the ALT_TMR_TMR1EOI register for the ALT_SPTMR1 instance. */
7234 #define ALT_SPTMR1_TMR1EOI_ADDR ALT_TMR_TMR1EOI_ADDR(ALT_SPTMR1_ADDR)
7235 /* The address of the ALT_TMR_TMR1INTSTAT register for the ALT_SPTMR1 instance. */
7236 #define ALT_SPTMR1_TMR1INTSTAT_ADDR ALT_TMR_TMR1INTSTAT_ADDR(ALT_SPTMR1_ADDR)
7237 /* The address of the ALT_TMR_TMRSINTSTAT register for the ALT_SPTMR1 instance. */
7238 #define ALT_SPTMR1_TMRSINTSTAT_ADDR ALT_TMR_TMRSINTSTAT_ADDR(ALT_SPTMR1_ADDR)
7239 /* The address of the ALT_TMR_TMRSEOI register for the ALT_SPTMR1 instance. */
7240 #define ALT_SPTMR1_TMRSEOI_ADDR ALT_TMR_TMRSEOI_ADDR(ALT_SPTMR1_ADDR)
7241 /* The address of the ALT_TMR_TMRSRAWINTSTAT register for the ALT_SPTMR1 instance. */
7242 #define ALT_SPTMR1_TMRSRAWINTSTAT_ADDR ALT_TMR_TMRSRAWINTSTAT_ADDR(ALT_SPTMR1_ADDR)
7243 /* The address of the ALT_TMR_TMRSCOMPVER register for the ALT_SPTMR1 instance. */
7244 #define ALT_SPTMR1_TMRSCOMPVER_ADDR ALT_TMR_TMRSCOMPVER_ADDR(ALT_SPTMR1_ADDR)
7245 /* The base address byte offset for the start of the ALT_SPTMR1 component. */
7246 #define ALT_SPTMR1_OFST 0xffc02800
7247 /* The start address of the ALT_SPTMR1 component. */
7248 #define ALT_SPTMR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPTMR1_OFST))
7249 /* The lower bound address range of the ALT_SPTMR1 component. */
7250 #define ALT_SPTMR1_LB_ADDR ALT_SPTMR1_ADDR
7251 /* The upper bound address range of the ALT_SPTMR1 component. */
7252 #define ALT_SPTMR1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPTMR1_ADDR) + 0x100) - 1))
7253 
7254 
7255 /*
7256  * Component Instance : i_gpio_0_gpio
7257  *
7258  * Instance i_gpio_0_gpio of component ALT_GPIO.
7259  *
7260  *
7261  */
7262 /* The address of the ALT_GPIO_SWPORTA_DR register for the ALT_GPIO0 instance. */
7263 #define ALT_GPIO0_SWPORTA_DR_ADDR ALT_GPIO_SWPORTA_DR_ADDR(ALT_GPIO0_ADDR)
7264 /* The address of the ALT_GPIO_SWPORTA_DDR register for the ALT_GPIO0 instance. */
7265 #define ALT_GPIO0_SWPORTA_DDR_ADDR ALT_GPIO_SWPORTA_DDR_ADDR(ALT_GPIO0_ADDR)
7266 /* The address of the ALT_GPIO_INTEN register for the ALT_GPIO0 instance. */
7267 #define ALT_GPIO0_INTEN_ADDR ALT_GPIO_INTEN_ADDR(ALT_GPIO0_ADDR)
7268 /* The address of the ALT_GPIO_INTMSK register for the ALT_GPIO0 instance. */
7269 #define ALT_GPIO0_INTMSK_ADDR ALT_GPIO_INTMSK_ADDR(ALT_GPIO0_ADDR)
7270 /* The address of the ALT_GPIO_INTTYPE_LEVEL register for the ALT_GPIO0 instance. */
7271 #define ALT_GPIO0_INTTYPE_LEVEL_ADDR ALT_GPIO_INTTYPE_LEVEL_ADDR(ALT_GPIO0_ADDR)
7272 /* The address of the ALT_GPIO_INT_POL register for the ALT_GPIO0 instance. */
7273 #define ALT_GPIO0_INT_POL_ADDR ALT_GPIO_INT_POL_ADDR(ALT_GPIO0_ADDR)
7274 /* The address of the ALT_GPIO_INTSTAT register for the ALT_GPIO0 instance. */
7275 #define ALT_GPIO0_INTSTAT_ADDR ALT_GPIO_INTSTAT_ADDR(ALT_GPIO0_ADDR)
7276 /* The address of the ALT_GPIO_RAW_INTSTAT register for the ALT_GPIO0 instance. */
7277 #define ALT_GPIO0_RAW_INTSTAT_ADDR ALT_GPIO_RAW_INTSTAT_ADDR(ALT_GPIO0_ADDR)
7278 /* The address of the ALT_GPIO_DEBOUNCE register for the ALT_GPIO0 instance. */
7279 #define ALT_GPIO0_DEBOUNCE_ADDR ALT_GPIO_DEBOUNCE_ADDR(ALT_GPIO0_ADDR)
7280 /* The address of the ALT_GPIO_PORTA_EOI register for the ALT_GPIO0 instance. */
7281 #define ALT_GPIO0_PORTA_EOI_ADDR ALT_GPIO_PORTA_EOI_ADDR(ALT_GPIO0_ADDR)
7282 /* The address of the ALT_GPIO_EXT_PORTA register for the ALT_GPIO0 instance. */
7283 #define ALT_GPIO0_EXT_PORTA_ADDR ALT_GPIO_EXT_PORTA_ADDR(ALT_GPIO0_ADDR)
7284 /* The address of the ALT_GPIO_LS_SYNC register for the ALT_GPIO0 instance. */
7285 #define ALT_GPIO0_LS_SYNC_ADDR ALT_GPIO_LS_SYNC_ADDR(ALT_GPIO0_ADDR)
7286 /* The address of the ALT_GPIO_ID_CODE register for the ALT_GPIO0 instance. */
7287 #define ALT_GPIO0_ID_CODE_ADDR ALT_GPIO_ID_CODE_ADDR(ALT_GPIO0_ADDR)
7288 /* The address of the ALT_GPIO_VER_ID_CODE register for the ALT_GPIO0 instance. */
7289 #define ALT_GPIO0_VER_ID_CODE_ADDR ALT_GPIO_VER_ID_CODE_ADDR(ALT_GPIO0_ADDR)
7290 /* The address of the ALT_GPIO_CFG_REG2 register for the ALT_GPIO0 instance. */
7291 #define ALT_GPIO0_CFG_REG2_ADDR ALT_GPIO_CFG_REG2_ADDR(ALT_GPIO0_ADDR)
7292 /* The address of the ALT_GPIO_CFG_REG1 register for the ALT_GPIO0 instance. */
7293 #define ALT_GPIO0_CFG_REG1_ADDR ALT_GPIO_CFG_REG1_ADDR(ALT_GPIO0_ADDR)
7294 /* The base address byte offset for the start of the ALT_GPIO0 component. */
7295 #define ALT_GPIO0_OFST 0xffc02900
7296 /* The start address of the ALT_GPIO0 component. */
7297 #define ALT_GPIO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GPIO0_OFST))
7298 /* The lower bound address range of the ALT_GPIO0 component. */
7299 #define ALT_GPIO0_LB_ADDR ALT_GPIO0_ADDR
7300 /* The upper bound address range of the ALT_GPIO0 component. */
7301 #define ALT_GPIO0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GPIO0_ADDR) + 0x80) - 1))
7302 
7303 
7304 /*
7305  * Component Instance : i_gpio_1_gpio
7306  *
7307  * Instance i_gpio_1_gpio of component ALT_GPIO.
7308  *
7309  *
7310  */
7311 /* The address of the ALT_GPIO_SWPORTA_DR register for the ALT_GPIO1 instance. */
7312 #define ALT_GPIO1_SWPORTA_DR_ADDR ALT_GPIO_SWPORTA_DR_ADDR(ALT_GPIO1_ADDR)
7313 /* The address of the ALT_GPIO_SWPORTA_DDR register for the ALT_GPIO1 instance. */
7314 #define ALT_GPIO1_SWPORTA_DDR_ADDR ALT_GPIO_SWPORTA_DDR_ADDR(ALT_GPIO1_ADDR)
7315 /* The address of the ALT_GPIO_INTEN register for the ALT_GPIO1 instance. */
7316 #define ALT_GPIO1_INTEN_ADDR ALT_GPIO_INTEN_ADDR(ALT_GPIO1_ADDR)
7317 /* The address of the ALT_GPIO_INTMSK register for the ALT_GPIO1 instance. */
7318 #define ALT_GPIO1_INTMSK_ADDR ALT_GPIO_INTMSK_ADDR(ALT_GPIO1_ADDR)
7319 /* The address of the ALT_GPIO_INTTYPE_LEVEL register for the ALT_GPIO1 instance. */
7320 #define ALT_GPIO1_INTTYPE_LEVEL_ADDR ALT_GPIO_INTTYPE_LEVEL_ADDR(ALT_GPIO1_ADDR)
7321 /* The address of the ALT_GPIO_INT_POL register for the ALT_GPIO1 instance. */
7322 #define ALT_GPIO1_INT_POL_ADDR ALT_GPIO_INT_POL_ADDR(ALT_GPIO1_ADDR)
7323 /* The address of the ALT_GPIO_INTSTAT register for the ALT_GPIO1 instance. */
7324 #define ALT_GPIO1_INTSTAT_ADDR ALT_GPIO_INTSTAT_ADDR(ALT_GPIO1_ADDR)
7325 /* The address of the ALT_GPIO_RAW_INTSTAT register for the ALT_GPIO1 instance. */
7326 #define ALT_GPIO1_RAW_INTSTAT_ADDR ALT_GPIO_RAW_INTSTAT_ADDR(ALT_GPIO1_ADDR)
7327 /* The address of the ALT_GPIO_DEBOUNCE register for the ALT_GPIO1 instance. */
7328 #define ALT_GPIO1_DEBOUNCE_ADDR ALT_GPIO_DEBOUNCE_ADDR(ALT_GPIO1_ADDR)
7329 /* The address of the ALT_GPIO_PORTA_EOI register for the ALT_GPIO1 instance. */
7330 #define ALT_GPIO1_PORTA_EOI_ADDR ALT_GPIO_PORTA_EOI_ADDR(ALT_GPIO1_ADDR)
7331 /* The address of the ALT_GPIO_EXT_PORTA register for the ALT_GPIO1 instance. */
7332 #define ALT_GPIO1_EXT_PORTA_ADDR ALT_GPIO_EXT_PORTA_ADDR(ALT_GPIO1_ADDR)
7333 /* The address of the ALT_GPIO_LS_SYNC register for the ALT_GPIO1 instance. */
7334 #define ALT_GPIO1_LS_SYNC_ADDR ALT_GPIO_LS_SYNC_ADDR(ALT_GPIO1_ADDR)
7335 /* The address of the ALT_GPIO_ID_CODE register for the ALT_GPIO1 instance. */
7336 #define ALT_GPIO1_ID_CODE_ADDR ALT_GPIO_ID_CODE_ADDR(ALT_GPIO1_ADDR)
7337 /* The address of the ALT_GPIO_VER_ID_CODE register for the ALT_GPIO1 instance. */
7338 #define ALT_GPIO1_VER_ID_CODE_ADDR ALT_GPIO_VER_ID_CODE_ADDR(ALT_GPIO1_ADDR)
7339 /* The address of the ALT_GPIO_CFG_REG2 register for the ALT_GPIO1 instance. */
7340 #define ALT_GPIO1_CFG_REG2_ADDR ALT_GPIO_CFG_REG2_ADDR(ALT_GPIO1_ADDR)
7341 /* The address of the ALT_GPIO_CFG_REG1 register for the ALT_GPIO1 instance. */
7342 #define ALT_GPIO1_CFG_REG1_ADDR ALT_GPIO_CFG_REG1_ADDR(ALT_GPIO1_ADDR)
7343 /* The base address byte offset for the start of the ALT_GPIO1 component. */
7344 #define ALT_GPIO1_OFST 0xffc02a00
7345 /* The start address of the ALT_GPIO1 component. */
7346 #define ALT_GPIO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GPIO1_OFST))
7347 /* The lower bound address range of the ALT_GPIO1 component. */
7348 #define ALT_GPIO1_LB_ADDR ALT_GPIO1_ADDR
7349 /* The upper bound address range of the ALT_GPIO1 component. */
7350 #define ALT_GPIO1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GPIO1_ADDR) + 0x80) - 1))
7351 
7352 
7353 /*
7354  * Component Instance : i_gpio_2_gpio
7355  *
7356  * Instance i_gpio_2_gpio of component ALT_GPIO.
7357  *
7358  *
7359  */
7360 /* The address of the ALT_GPIO_SWPORTA_DR register for the ALT_GPIO_2_GPIO instance. */
7361 #define ALT_GPIO_2_GPIO_SWPORTA_DR_ADDR ALT_GPIO_SWPORTA_DR_ADDR(ALT_GPIO_2_GPIO_ADDR)
7362 /* The address of the ALT_GPIO_SWPORTA_DDR register for the ALT_GPIO_2_GPIO instance. */
7363 #define ALT_GPIO_2_GPIO_SWPORTA_DDR_ADDR ALT_GPIO_SWPORTA_DDR_ADDR(ALT_GPIO_2_GPIO_ADDR)
7364 /* The address of the ALT_GPIO_INTEN register for the ALT_GPIO_2_GPIO instance. */
7365 #define ALT_GPIO_2_GPIO_INTEN_ADDR ALT_GPIO_INTEN_ADDR(ALT_GPIO_2_GPIO_ADDR)
7366 /* The address of the ALT_GPIO_INTMSK register for the ALT_GPIO_2_GPIO instance. */
7367 #define ALT_GPIO_2_GPIO_INTMSK_ADDR ALT_GPIO_INTMSK_ADDR(ALT_GPIO_2_GPIO_ADDR)
7368 /* The address of the ALT_GPIO_INTTYPE_LEVEL register for the ALT_GPIO_2_GPIO instance. */
7369 #define ALT_GPIO_2_GPIO_INTTYPE_LEVEL_ADDR ALT_GPIO_INTTYPE_LEVEL_ADDR(ALT_GPIO_2_GPIO_ADDR)
7370 /* The address of the ALT_GPIO_INT_POL register for the ALT_GPIO_2_GPIO instance. */
7371 #define ALT_GPIO_2_GPIO_INT_POL_ADDR ALT_GPIO_INT_POL_ADDR(ALT_GPIO_2_GPIO_ADDR)
7372 /* The address of the ALT_GPIO_INTSTAT register for the ALT_GPIO_2_GPIO instance. */
7373 #define ALT_GPIO_2_GPIO_INTSTAT_ADDR ALT_GPIO_INTSTAT_ADDR(ALT_GPIO_2_GPIO_ADDR)
7374 /* The address of the ALT_GPIO_RAW_INTSTAT register for the ALT_GPIO_2_GPIO instance. */
7375 #define ALT_GPIO_2_GPIO_RAW_INTSTAT_ADDR ALT_GPIO_RAW_INTSTAT_ADDR(ALT_GPIO_2_GPIO_ADDR)
7376 /* The address of the ALT_GPIO_DEBOUNCE register for the ALT_GPIO_2_GPIO instance. */
7377 #define ALT_GPIO_2_GPIO_DEBOUNCE_ADDR ALT_GPIO_DEBOUNCE_ADDR(ALT_GPIO_2_GPIO_ADDR)
7378 /* The address of the ALT_GPIO_PORTA_EOI register for the ALT_GPIO_2_GPIO instance. */
7379 #define ALT_GPIO_2_GPIO_PORTA_EOI_ADDR ALT_GPIO_PORTA_EOI_ADDR(ALT_GPIO_2_GPIO_ADDR)
7380 /* The address of the ALT_GPIO_EXT_PORTA register for the ALT_GPIO_2_GPIO instance. */
7381 #define ALT_GPIO_2_GPIO_EXT_PORTA_ADDR ALT_GPIO_EXT_PORTA_ADDR(ALT_GPIO_2_GPIO_ADDR)
7382 /* The address of the ALT_GPIO_LS_SYNC register for the ALT_GPIO_2_GPIO instance. */
7383 #define ALT_GPIO_2_GPIO_LS_SYNC_ADDR ALT_GPIO_LS_SYNC_ADDR(ALT_GPIO_2_GPIO_ADDR)
7384 /* The address of the ALT_GPIO_ID_CODE register for the ALT_GPIO_2_GPIO instance. */
7385 #define ALT_GPIO_2_GPIO_ID_CODE_ADDR ALT_GPIO_ID_CODE_ADDR(ALT_GPIO_2_GPIO_ADDR)
7386 /* The address of the ALT_GPIO_VER_ID_CODE register for the ALT_GPIO_2_GPIO instance. */
7387 #define ALT_GPIO_2_GPIO_VER_ID_CODE_ADDR ALT_GPIO_VER_ID_CODE_ADDR(ALT_GPIO_2_GPIO_ADDR)
7388 /* The address of the ALT_GPIO_CFG_REG2 register for the ALT_GPIO_2_GPIO instance. */
7389 #define ALT_GPIO_2_GPIO_CFG_REG2_ADDR ALT_GPIO_CFG_REG2_ADDR(ALT_GPIO_2_GPIO_ADDR)
7390 /* The address of the ALT_GPIO_CFG_REG1 register for the ALT_GPIO_2_GPIO instance. */
7391 #define ALT_GPIO_2_GPIO_CFG_REG1_ADDR ALT_GPIO_CFG_REG1_ADDR(ALT_GPIO_2_GPIO_ADDR)
7392 /* The base address byte offset for the start of the ALT_GPIO_2_GPIO component. */
7393 #define ALT_GPIO_2_GPIO_OFST 0xffc02b00
7394 /* The start address of the ALT_GPIO_2_GPIO component. */
7395 #define ALT_GPIO_2_GPIO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GPIO_2_GPIO_OFST))
7396 /* The lower bound address range of the ALT_GPIO_2_GPIO component. */
7397 #define ALT_GPIO_2_GPIO_LB_ADDR ALT_GPIO_2_GPIO_ADDR
7398 /* The upper bound address range of the ALT_GPIO_2_GPIO component. */
7399 #define ALT_GPIO_2_GPIO_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GPIO_2_GPIO_ADDR) + 0x80) - 1))
7400 
7401 
7402 /*
7403  * Component Instance : i_io48_hmc_mmr_io48_mmr
7404  *
7405  * Instance i_io48_hmc_mmr_io48_mmr of component ALT_IO48_HMC_MMR.
7406  *
7407  *
7408  */
7409 /* The address of the ALT_IO48_HMC_MMR_DBGCFG0 register for the ALT_IO48_HMC_MMR instance. */
7410 #define ALT_IO48_HMC_MMR_DBGCFG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG0_OFST))
7411 /* The address of the ALT_IO48_HMC_MMR_DBGCFG1 register for the ALT_IO48_HMC_MMR instance. */
7412 #define ALT_IO48_HMC_MMR_DBGCFG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG1_OFST))
7413 /* The address of the ALT_IO48_HMC_MMR_DBGCFG2 register for the ALT_IO48_HMC_MMR instance. */
7414 #define ALT_IO48_HMC_MMR_DBGCFG2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG2_OFST))
7415 /* The address of the ALT_IO48_HMC_MMR_DBGCFG3 register for the ALT_IO48_HMC_MMR instance. */
7416 #define ALT_IO48_HMC_MMR_DBGCFG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG3_OFST))
7417 /* The address of the ALT_IO48_HMC_MMR_DBGCFG4 register for the ALT_IO48_HMC_MMR instance. */
7418 #define ALT_IO48_HMC_MMR_DBGCFG4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG4_OFST))
7419 /* The address of the ALT_IO48_HMC_MMR_DBGCFG5 register for the ALT_IO48_HMC_MMR instance. */
7420 #define ALT_IO48_HMC_MMR_DBGCFG5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG5_OFST))
7421 /* The address of the ALT_IO48_HMC_MMR_DBGCFG6 register for the ALT_IO48_HMC_MMR instance. */
7422 #define ALT_IO48_HMC_MMR_DBGCFG6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG6_OFST))
7423 /* The address of the ALT_IO48_HMC_MMR_RESERVE0 register for the ALT_IO48_HMC_MMR instance. */
7424 #define ALT_IO48_HMC_MMR_RESERVE0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_RESERVE0_OFST))
7425 /* The address of the ALT_IO48_HMC_MMR_RESERVE1 register for the ALT_IO48_HMC_MMR instance. */
7426 #define ALT_IO48_HMC_MMR_RESERVE1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_RESERVE1_OFST))
7427 /* The address of the ALT_IO48_HMC_MMR_RESERVE2 register for the ALT_IO48_HMC_MMR instance. */
7428 #define ALT_IO48_HMC_MMR_RESERVE2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_RESERVE2_OFST))
7429 /* The address of the ALT_IO48_HMC_MMR_CTLCFG0 register for the ALT_IO48_HMC_MMR instance. */
7430 #define ALT_IO48_HMC_MMR_CTLCFG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG0_OFST))
7431 /* The address of the ALT_IO48_HMC_MMR_CTLCFG1 register for the ALT_IO48_HMC_MMR instance. */
7432 #define ALT_IO48_HMC_MMR_CTLCFG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG1_OFST))
7433 /* The address of the ALT_IO48_HMC_MMR_CTLCFG2 register for the ALT_IO48_HMC_MMR instance. */
7434 #define ALT_IO48_HMC_MMR_CTLCFG2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG2_OFST))
7435 /* The address of the ALT_IO48_HMC_MMR_CTLCFG3 register for the ALT_IO48_HMC_MMR instance. */
7436 #define ALT_IO48_HMC_MMR_CTLCFG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG3_OFST))
7437 /* The address of the ALT_IO48_HMC_MMR_CTLCFG4 register for the ALT_IO48_HMC_MMR instance. */
7438 #define ALT_IO48_HMC_MMR_CTLCFG4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG4_OFST))
7439 /* The address of the ALT_IO48_HMC_MMR_CTLCFG5 register for the ALT_IO48_HMC_MMR instance. */
7440 #define ALT_IO48_HMC_MMR_CTLCFG5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG5_OFST))
7441 /* The address of the ALT_IO48_HMC_MMR_CTLCFG6 register for the ALT_IO48_HMC_MMR instance. */
7442 #define ALT_IO48_HMC_MMR_CTLCFG6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG6_OFST))
7443 /* The address of the ALT_IO48_HMC_MMR_CTLCFG7 register for the ALT_IO48_HMC_MMR instance. */
7444 #define ALT_IO48_HMC_MMR_CTLCFG7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG7_OFST))
7445 /* The address of the ALT_IO48_HMC_MMR_CTLCFG8 register for the ALT_IO48_HMC_MMR instance. */
7446 #define ALT_IO48_HMC_MMR_CTLCFG8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG8_OFST))
7447 /* The address of the ALT_IO48_HMC_MMR_CTLCFG9 register for the ALT_IO48_HMC_MMR instance. */
7448 #define ALT_IO48_HMC_MMR_CTLCFG9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG9_OFST))
7449 /* The address of the ALT_IO48_HMC_MMR_DRAMTIMING0 register for the ALT_IO48_HMC_MMR instance. */
7450 #define ALT_IO48_HMC_MMR_DRAMTIMING0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMTIMING0_OFST))
7451 /* The address of the ALT_IO48_HMC_MMR_DRAMODT0 register for the ALT_IO48_HMC_MMR instance. */
7452 #define ALT_IO48_HMC_MMR_DRAMODT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMODT0_OFST))
7453 /* The address of the ALT_IO48_HMC_MMR_DRAMODT1 register for the ALT_IO48_HMC_MMR instance. */
7454 #define ALT_IO48_HMC_MMR_DRAMODT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMODT1_OFST))
7455 /* The address of the ALT_IO48_HMC_MMR_SBCFG0 register for the ALT_IO48_HMC_MMR instance. */
7456 #define ALT_IO48_HMC_MMR_SBCFG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG0_OFST))
7457 /* The address of the ALT_IO48_HMC_MMR_SBCFG1 register for the ALT_IO48_HMC_MMR instance. */
7458 #define ALT_IO48_HMC_MMR_SBCFG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG1_OFST))
7459 /* The address of the ALT_IO48_HMC_MMR_SBCFG2 register for the ALT_IO48_HMC_MMR instance. */
7460 #define ALT_IO48_HMC_MMR_SBCFG2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG2_OFST))
7461 /* The address of the ALT_IO48_HMC_MMR_SBCFG3 register for the ALT_IO48_HMC_MMR instance. */
7462 #define ALT_IO48_HMC_MMR_SBCFG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG3_OFST))
7463 /* The address of the ALT_IO48_HMC_MMR_SBCFG4 register for the ALT_IO48_HMC_MMR instance. */
7464 #define ALT_IO48_HMC_MMR_SBCFG4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG4_OFST))
7465 /* The address of the ALT_IO48_HMC_MMR_SBCFG5 register for the ALT_IO48_HMC_MMR instance. */
7466 #define ALT_IO48_HMC_MMR_SBCFG5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG5_OFST))
7467 /* The address of the ALT_IO48_HMC_MMR_SBCFG6 register for the ALT_IO48_HMC_MMR instance. */
7468 #define ALT_IO48_HMC_MMR_SBCFG6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG6_OFST))
7469 /* The address of the ALT_IO48_HMC_MMR_SBCFG7 register for the ALT_IO48_HMC_MMR instance. */
7470 #define ALT_IO48_HMC_MMR_SBCFG7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG7_OFST))
7471 /* The address of the ALT_IO48_HMC_MMR_CALTIMING0 register for the ALT_IO48_HMC_MMR instance. */
7472 #define ALT_IO48_HMC_MMR_CALTIMING0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING0_OFST))
7473 /* The address of the ALT_IO48_HMC_MMR_CALTIMING1 register for the ALT_IO48_HMC_MMR instance. */
7474 #define ALT_IO48_HMC_MMR_CALTIMING1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING1_OFST))
7475 /* The address of the ALT_IO48_HMC_MMR_CALTIMING2 register for the ALT_IO48_HMC_MMR instance. */
7476 #define ALT_IO48_HMC_MMR_CALTIMING2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING2_OFST))
7477 /* The address of the ALT_IO48_HMC_MMR_CALTIMING3 register for the ALT_IO48_HMC_MMR instance. */
7478 #define ALT_IO48_HMC_MMR_CALTIMING3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING3_OFST))
7479 /* The address of the ALT_IO48_HMC_MMR_CALTIMING4 register for the ALT_IO48_HMC_MMR instance. */
7480 #define ALT_IO48_HMC_MMR_CALTIMING4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING4_OFST))
7481 /* The address of the ALT_IO48_HMC_MMR_CALTIMING5 register for the ALT_IO48_HMC_MMR instance. */
7482 #define ALT_IO48_HMC_MMR_CALTIMING5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING5_OFST))
7483 /* The address of the ALT_IO48_HMC_MMR_CALTIMING6 register for the ALT_IO48_HMC_MMR instance. */
7484 #define ALT_IO48_HMC_MMR_CALTIMING6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING6_OFST))
7485 /* The address of the ALT_IO48_HMC_MMR_CALTIMING7 register for the ALT_IO48_HMC_MMR instance. */
7486 #define ALT_IO48_HMC_MMR_CALTIMING7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING7_OFST))
7487 /* The address of the ALT_IO48_HMC_MMR_CALTIMING8 register for the ALT_IO48_HMC_MMR instance. */
7488 #define ALT_IO48_HMC_MMR_CALTIMING8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING8_OFST))
7489 /* The address of the ALT_IO48_HMC_MMR_CALTIMING9 register for the ALT_IO48_HMC_MMR instance. */
7490 #define ALT_IO48_HMC_MMR_CALTIMING9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING9_OFST))
7491 /* The address of the ALT_IO48_HMC_MMR_CALTIMING10 register for the ALT_IO48_HMC_MMR instance. */
7492 #define ALT_IO48_HMC_MMR_CALTIMING10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING10_OFST))
7493 /* The address of the ALT_IO48_HMC_MMR_DRAMADDRW register for the ALT_IO48_HMC_MMR instance. */
7494 #define ALT_IO48_HMC_MMR_DRAMADDRW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMADDRW_OFST))
7495 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND0 register for the ALT_IO48_HMC_MMR instance. */
7496 #define ALT_IO48_HMC_MMR_SIDEBAND0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND0_OFST))
7497 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND1 register for the ALT_IO48_HMC_MMR instance. */
7498 #define ALT_IO48_HMC_MMR_SIDEBAND1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND1_OFST))
7499 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND2 register for the ALT_IO48_HMC_MMR instance. */
7500 #define ALT_IO48_HMC_MMR_SIDEBAND2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND2_OFST))
7501 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND3 register for the ALT_IO48_HMC_MMR instance. */
7502 #define ALT_IO48_HMC_MMR_SIDEBAND3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND3_OFST))
7503 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND4 register for the ALT_IO48_HMC_MMR instance. */
7504 #define ALT_IO48_HMC_MMR_SIDEBAND4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND4_OFST))
7505 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND5 register for the ALT_IO48_HMC_MMR instance. */
7506 #define ALT_IO48_HMC_MMR_SIDEBAND5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND5_OFST))
7507 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND6 register for the ALT_IO48_HMC_MMR instance. */
7508 #define ALT_IO48_HMC_MMR_SIDEBAND6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND6_OFST))
7509 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND7 register for the ALT_IO48_HMC_MMR instance. */
7510 #define ALT_IO48_HMC_MMR_SIDEBAND7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND7_OFST))
7511 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND8 register for the ALT_IO48_HMC_MMR instance. */
7512 #define ALT_IO48_HMC_MMR_SIDEBAND8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND8_OFST))
7513 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND9 register for the ALT_IO48_HMC_MMR instance. */
7514 #define ALT_IO48_HMC_MMR_SIDEBAND9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND9_OFST))
7515 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND10 register for the ALT_IO48_HMC_MMR instance. */
7516 #define ALT_IO48_HMC_MMR_SIDEBAND10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND10_OFST))
7517 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND11 register for the ALT_IO48_HMC_MMR instance. */
7518 #define ALT_IO48_HMC_MMR_SIDEBAND11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND11_OFST))
7519 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND12 register for the ALT_IO48_HMC_MMR instance. */
7520 #define ALT_IO48_HMC_MMR_SIDEBAND12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND12_OFST))
7521 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND13 register for the ALT_IO48_HMC_MMR instance. */
7522 #define ALT_IO48_HMC_MMR_SIDEBAND13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND13_OFST))
7523 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND14 register for the ALT_IO48_HMC_MMR instance. */
7524 #define ALT_IO48_HMC_MMR_SIDEBAND14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND14_OFST))
7525 /* The address of the ALT_IO48_HMC_MMR_SIDEBAND15 register for the ALT_IO48_HMC_MMR instance. */
7526 #define ALT_IO48_HMC_MMR_SIDEBAND15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND15_OFST))
7527 /* The address of the ALT_IO48_HMC_MMR_DRAMSTS register for the ALT_IO48_HMC_MMR instance. */
7528 #define ALT_IO48_HMC_MMR_DRAMSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMSTS_OFST))
7529 /* The address of the ALT_IO48_HMC_MMR_DBGDONE register for the ALT_IO48_HMC_MMR instance. */
7530 #define ALT_IO48_HMC_MMR_DBGDONE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGDONE_OFST))
7531 /* The address of the ALT_IO48_HMC_MMR_DBGSIGNALS register for the ALT_IO48_HMC_MMR instance. */
7532 #define ALT_IO48_HMC_MMR_DBGSIGNALS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGSIGNALS_OFST))
7533 /* The address of the ALT_IO48_HMC_MMR_DBGRST register for the ALT_IO48_HMC_MMR instance. */
7534 #define ALT_IO48_HMC_MMR_DBGRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGRST_OFST))
7535 /* The address of the ALT_IO48_HMC_MMR_DBGMATCH register for the ALT_IO48_HMC_MMR instance. */
7536 #define ALT_IO48_HMC_MMR_DBGMATCH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGMATCH_OFST))
7537 /* The address of the ALT_IO48_HMC_MMR_CNTR0MSK register for the ALT_IO48_HMC_MMR instance. */
7538 #define ALT_IO48_HMC_MMR_CNTR0MSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR0MSK_OFST))
7539 /* The address of the ALT_IO48_HMC_MMR_CNTR1MSK register for the ALT_IO48_HMC_MMR instance. */
7540 #define ALT_IO48_HMC_MMR_CNTR1MSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR1MSK_OFST))
7541 /* The address of the ALT_IO48_HMC_MMR_CNTR0MATCH register for the ALT_IO48_HMC_MMR instance. */
7542 #define ALT_IO48_HMC_MMR_CNTR0MATCH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR0MATCH_OFST))
7543 /* The address of the ALT_IO48_HMC_MMR_CNTR1MATCH register for the ALT_IO48_HMC_MMR instance. */
7544 #define ALT_IO48_HMC_MMR_CNTR1MATCH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR1MATCH_OFST))
7545 /* The address of the ALT_IO48_HMC_MMR_NIOSRESERVE0 register for the ALT_IO48_HMC_MMR instance. */
7546 #define ALT_IO48_HMC_MMR_NIOSRESERVE0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_NIOSRESERVE0_OFST))
7547 /* The address of the ALT_IO48_HMC_MMR_NIOSRESERVE1 register for the ALT_IO48_HMC_MMR instance. */
7548 #define ALT_IO48_HMC_MMR_NIOSRESERVE1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_NIOSRESERVE1_OFST))
7549 /* The address of the ALT_IO48_HMC_MMR_NIOSRESERVE2 register for the ALT_IO48_HMC_MMR instance. */
7550 #define ALT_IO48_HMC_MMR_NIOSRESERVE2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_NIOSRESERVE2_OFST))
7551 /* The base address byte offset for the start of the ALT_IO48_HMC_MMR component. */
7552 #define ALT_IO48_HMC_MMR_OFST 0xffcfa000
7553 /* The start address of the ALT_IO48_HMC_MMR component. */
7554 #define ALT_IO48_HMC_MMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_IO48_HMC_MMR_OFST))
7555 /* The lower bound address range of the ALT_IO48_HMC_MMR component. */
7556 #define ALT_IO48_HMC_MMR_LB_ADDR ALT_IO48_HMC_MMR_ADDR
7557 /* The upper bound address range of the ALT_IO48_HMC_MMR component. */
7558 #define ALT_IO48_HMC_MMR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + 0x1000) - 1))
7559 
7560 
7561 /*
7562  * Component Instance : ecc_hmc_ocp_slv_block
7563  *
7564  * Instance ecc_hmc_ocp_slv_block of component ALT_ECC_HMC_OCP.
7565  *
7566  *
7567  */
7568 /* The address of the ALT_ECC_HMC_OCP_IP_REV_ID register for the ALT_ECC_HMC_OCP instance. */
7569 #define ALT_ECC_HMC_OCP_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_IP_REV_ID_OFST))
7570 /* The address of the ALT_ECC_HMC_OCP_DDRIOCTL register for the ALT_ECC_HMC_OCP instance. */
7571 #define ALT_ECC_HMC_OCP_DDRIOCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_DDRIOCTL_OFST))
7572 /* The address of the ALT_ECC_HMC_OCP_DDRCALSTAT register for the ALT_ECC_HMC_OCP instance. */
7573 #define ALT_ECC_HMC_OCP_DDRCALSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_DDRCALSTAT_OFST))
7574 /* The address of the ALT_ECC_HMC_OCP_MPR_0BEAT1 register for the ALT_ECC_HMC_OCP instance. */
7575 #define ALT_ECC_HMC_OCP_MPR_0BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_0BEAT1_OFST))
7576 /* The address of the ALT_ECC_HMC_OCP_MPR_1BEAT1 register for the ALT_ECC_HMC_OCP instance. */
7577 #define ALT_ECC_HMC_OCP_MPR_1BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_1BEAT1_OFST))
7578 /* The address of the ALT_ECC_HMC_OCP_MPR_2BEAT1 register for the ALT_ECC_HMC_OCP instance. */
7579 #define ALT_ECC_HMC_OCP_MPR_2BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_2BEAT1_OFST))
7580 /* The address of the ALT_ECC_HMC_OCP_MPR_3BEAT1 register for the ALT_ECC_HMC_OCP instance. */
7581 #define ALT_ECC_HMC_OCP_MPR_3BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_3BEAT1_OFST))
7582 /* The address of the ALT_ECC_HMC_OCP_MPR_4BEAT1 register for the ALT_ECC_HMC_OCP instance. */
7583 #define ALT_ECC_HMC_OCP_MPR_4BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_4BEAT1_OFST))
7584 /* The address of the ALT_ECC_HMC_OCP_MPR_5BEAT1 register for the ALT_ECC_HMC_OCP instance. */
7585 #define ALT_ECC_HMC_OCP_MPR_5BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_5BEAT1_OFST))
7586 /* The address of the ALT_ECC_HMC_OCP_MPR_6BEAT1 register for the ALT_ECC_HMC_OCP instance. */
7587 #define ALT_ECC_HMC_OCP_MPR_6BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_6BEAT1_OFST))
7588 /* The address of the ALT_ECC_HMC_OCP_MPR_7BEAT1 register for the ALT_ECC_HMC_OCP instance. */
7589 #define ALT_ECC_HMC_OCP_MPR_7BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_7BEAT1_OFST))
7590 /* The address of the ALT_ECC_HMC_OCP_MPR_8BEAT1 register for the ALT_ECC_HMC_OCP instance. */
7591 #define ALT_ECC_HMC_OCP_MPR_8BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_8BEAT1_OFST))
7592 /* The address of the ALT_ECC_HMC_OCP_MPR_0BEAT2 register for the ALT_ECC_HMC_OCP instance. */
7593 #define ALT_ECC_HMC_OCP_MPR_0BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_0BEAT2_OFST))
7594 /* The address of the ALT_ECC_HMC_OCP_MPR_1BEAT2 register for the ALT_ECC_HMC_OCP instance. */
7595 #define ALT_ECC_HMC_OCP_MPR_1BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_1BEAT2_OFST))
7596 /* The address of the ALT_ECC_HMC_OCP_MPR_2BEAT2 register for the ALT_ECC_HMC_OCP instance. */
7597 #define ALT_ECC_HMC_OCP_MPR_2BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_2BEAT2_OFST))
7598 /* The address of the ALT_ECC_HMC_OCP_MPR_3BEAT2 register for the ALT_ECC_HMC_OCP instance. */
7599 #define ALT_ECC_HMC_OCP_MPR_3BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_3BEAT2_OFST))
7600 /* The address of the ALT_ECC_HMC_OCP_MPR_4BEAT2 register for the ALT_ECC_HMC_OCP instance. */
7601 #define ALT_ECC_HMC_OCP_MPR_4BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_4BEAT2_OFST))
7602 /* The address of the ALT_ECC_HMC_OCP_MPR_5BEAT2 register for the ALT_ECC_HMC_OCP instance. */
7603 #define ALT_ECC_HMC_OCP_MPR_5BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_5BEAT2_OFST))
7604 /* The address of the ALT_ECC_HMC_OCP_MPR_6BEAT2 register for the ALT_ECC_HMC_OCP instance. */
7605 #define ALT_ECC_HMC_OCP_MPR_6BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_6BEAT2_OFST))
7606 /* The address of the ALT_ECC_HMC_OCP_MPR_7BEAT2 register for the ALT_ECC_HMC_OCP instance. */
7607 #define ALT_ECC_HMC_OCP_MPR_7BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_7BEAT2_OFST))
7608 /* The address of the ALT_ECC_HMC_OCP_MPR_8BEAT2 register for the ALT_ECC_HMC_OCP instance. */
7609 #define ALT_ECC_HMC_OCP_MPR_8BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_8BEAT2_OFST))
7610 /* The address of the ALT_ECC_HMC_OCP_AUTO_PRECHARGE register for the ALT_ECC_HMC_OCP instance. */
7611 #define ALT_ECC_HMC_OCP_AUTO_PRECHARGE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_AUTO_PRECHARGE_OFST))
7612 /* The address of the ALT_ECC_HMC_OCP_ECCCTL1 register for the ALT_ECC_HMC_OCP instance. */
7613 #define ALT_ECC_HMC_OCP_ECCCTL1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECCCTL1_OFST))
7614 /* The address of the ALT_ECC_HMC_OCP_ECCCTL2 register for the ALT_ECC_HMC_OCP instance. */
7615 #define ALT_ECC_HMC_OCP_ECCCTL2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECCCTL2_OFST))
7616 /* The address of the ALT_ECC_HMC_OCP_ERRINTEN register for the ALT_ECC_HMC_OCP instance. */
7617 #define ALT_ECC_HMC_OCP_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ERRINTEN_OFST))
7618 /* The address of the ALT_ECC_HMC_OCP_ERRINTENS register for the ALT_ECC_HMC_OCP instance. */
7619 #define ALT_ECC_HMC_OCP_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ERRINTENS_OFST))
7620 /* The address of the ALT_ECC_HMC_OCP_ERRINTENR register for the ALT_ECC_HMC_OCP instance. */
7621 #define ALT_ECC_HMC_OCP_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ERRINTENR_OFST))
7622 /* The address of the ALT_ECC_HMC_OCP_INTMOD register for the ALT_ECC_HMC_OCP instance. */
7623 #define ALT_ECC_HMC_OCP_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_INTMOD_OFST))
7624 /* The address of the ALT_ECC_HMC_OCP_INTSTAT register for the ALT_ECC_HMC_OCP instance. */
7625 #define ALT_ECC_HMC_OCP_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_INTSTAT_OFST))
7626 /* The address of the ALT_ECC_HMC_OCP_DIAGINTTEST register for the ALT_ECC_HMC_OCP instance. */
7627 #define ALT_ECC_HMC_OCP_DIAGINTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_DIAGINTTEST_OFST))
7628 /* The address of the ALT_ECC_HMC_OCP_MODSTAT register for the ALT_ECC_HMC_OCP instance. */
7629 #define ALT_ECC_HMC_OCP_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MODSTAT_OFST))
7630 /* The address of the ALT_ECC_HMC_OCP_DERRADDRA register for the ALT_ECC_HMC_OCP instance. */
7631 #define ALT_ECC_HMC_OCP_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_DERRADDRA_OFST))
7632 /* The address of the ALT_ECC_HMC_OCP_SERRADDRA register for the ALT_ECC_HMC_OCP instance. */
7633 #define ALT_ECC_HMC_OCP_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_SERRADDRA_OFST))
7634 /* The address of the ALT_ECC_HMC_OCP_AUTOWB_CORRADDR register for the ALT_ECC_HMC_OCP instance. */
7635 #define ALT_ECC_HMC_OCP_AUTOWB_CORRADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_AUTOWB_CORRADDR_OFST))
7636 /* The address of the ALT_ECC_HMC_OCP_SERRCNTREG register for the ALT_ECC_HMC_OCP instance. */
7637 #define ALT_ECC_HMC_OCP_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_SERRCNTREG_OFST))
7638 /* The address of the ALT_ECC_HMC_OCP_AUTOWB_DROP_CNTREG register for the ALT_ECC_HMC_OCP instance. */
7639 #define ALT_ECC_HMC_OCP_AUTOWB_DROP_CNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_AUTOWB_DROP_CNTREG_OFST))
7640 /* The address of the ALT_ECC_HMC_OCP_ECC_REG2WRECCDATABUS register for the ALT_ECC_HMC_OCP instance. */
7641 #define ALT_ECC_HMC_OCP_ECC_REG2WRECCDATABUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_REG2WRECCDATABUS_OFST))
7642 /* The address of the ALT_ECC_HMC_OCP_ECC_RDECCDATA2REGBUS register for the ALT_ECC_HMC_OCP instance. */
7643 #define ALT_ECC_HMC_OCP_ECC_RDECCDATA2REGBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_RDECCDATA2REGBUS_OFST))
7644 /* The address of the ALT_ECC_HMC_OCP_ECC_REG2RDECCDATABUS register for the ALT_ECC_HMC_OCP instance. */
7645 #define ALT_ECC_HMC_OCP_ECC_REG2RDECCDATABUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_REG2RDECCDATABUS_OFST))
7646 /* The address of the ALT_ECC_HMC_OCP_ECC_DIAGON register for the ALT_ECC_HMC_OCP instance. */
7647 #define ALT_ECC_HMC_OCP_ECC_DIAGON_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_DIAGON_OFST))
7648 /* The address of the ALT_ECC_HMC_OCP_ECC_DECSTAT register for the ALT_ECC_HMC_OCP instance. */
7649 #define ALT_ECC_HMC_OCP_ECC_DECSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_DECSTAT_OFST))
7650 /* The address of the ALT_ECC_HMC_OCP_ECC_ERRGENADDR_0 register for the ALT_ECC_HMC_OCP instance. */
7651 #define ALT_ECC_HMC_OCP_ECC_ERRGENADDR_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_ERRGENADDR_0_OFST))
7652 /* The address of the ALT_ECC_HMC_OCP_ECC_ERRGENADDR_1 register for the ALT_ECC_HMC_OCP instance. */
7653 #define ALT_ECC_HMC_OCP_ECC_ERRGENADDR_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_ERRGENADDR_1_OFST))
7654 /* The address of the ALT_ECC_HMC_OCP_ECC_ERRGENADDR_2 register for the ALT_ECC_HMC_OCP instance. */
7655 #define ALT_ECC_HMC_OCP_ECC_ERRGENADDR_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_ERRGENADDR_2_OFST))
7656 /* The address of the ALT_ECC_HMC_OCP_ECC_ERRGENADDR_3 register for the ALT_ECC_HMC_OCP instance. */
7657 #define ALT_ECC_HMC_OCP_ECC_ERRGENADDR_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_ERRGENADDR_3_OFST))
7658 /* The address of the ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT0 register for the ALT_ECC_HMC_OCP instance. */
7659 #define ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT0_OFST))
7660 /* The address of the ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT1 register for the ALT_ECC_HMC_OCP instance. */
7661 #define ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT1_OFST))
7662 /* The address of the ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT2 register for the ALT_ECC_HMC_OCP instance. */
7663 #define ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT2_OFST))
7664 /* The address of the ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT3 register for the ALT_ECC_HMC_OCP instance. */
7665 #define ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT3_OFST))
7666 /* The base address byte offset for the start of the ALT_ECC_HMC_OCP component. */
7667 #define ALT_ECC_HMC_OCP_OFST 0xffcfb000
7668 /* The start address of the ALT_ECC_HMC_OCP component. */
7669 #define ALT_ECC_HMC_OCP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_HMC_OCP_OFST))
7670 /* The lower bound address range of the ALT_ECC_HMC_OCP component. */
7671 #define ALT_ECC_HMC_OCP_LB_ADDR ALT_ECC_HMC_OCP_ADDR
7672 /* The upper bound address range of the ALT_ECC_HMC_OCP component. */
7673 #define ALT_ECC_HMC_OCP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + 0x500) - 1))
7674 
7675 
7676 /*
7677  * Component Instance : i_sec_mgr_aesfifo
7678  *
7679  * Instance i_sec_mgr_aesfifo of component ALT_SEC_MGR_AESFIFO.
7680  *
7681  *
7682  */
7683 /* The base address byte offset for the start of the ALT_SEC_MGR_AESFIFO component. */
7684 #define ALT_SEC_MGR_AESFIFO_OFST 0xffcfe000
7685 /* The start address of the ALT_SEC_MGR_AESFIFO component. */
7686 #define ALT_SEC_MGR_AESFIFO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SEC_MGR_AESFIFO_OFST))
7687 /* The lower bound address range of the ALT_SEC_MGR_AESFIFO component. */
7688 #define ALT_SEC_MGR_AESFIFO_LB_ADDR ALT_SEC_MGR_AESFIFO_ADDR
7689 /* The upper bound address range of the ALT_SEC_MGR_AESFIFO component. */
7690 #define ALT_SEC_MGR_AESFIFO_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SEC_MGR_AESFIFO_ADDR) + 0x400) - 1))
7691 
7692 
7693 /*
7694  * Component Instance : i_fpga_mgr_fpgamgrdata
7695  *
7696  * Instance i_fpga_mgr_fpgamgrdata of component ALT_FPGAMGRDATA.
7697  *
7698  *
7699  */
7700 /* The address of the ALT_FPGAMGRDATA_DATA register for the ALT_FPGAMGRDATA instance. */
7701 #define ALT_FPGAMGRDATA_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGRDATA_ADDR) + ALT_FPGAMGRDATA_DATA_OFST))
7702 /* The base address byte offset for the start of the ALT_FPGAMGRDATA component. */
7703 #define ALT_FPGAMGRDATA_OFST 0xffcfe400
7704 /* The start address of the ALT_FPGAMGRDATA component. */
7705 #define ALT_FPGAMGRDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGAMGRDATA_OFST))
7706 /* The lower bound address range of the ALT_FPGAMGRDATA component. */
7707 #define ALT_FPGAMGRDATA_LB_ADDR ALT_FPGAMGRDATA_ADDR
7708 /* The upper bound address range of the ALT_FPGAMGRDATA component. */
7709 #define ALT_FPGAMGRDATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGAMGRDATA_ADDR) + 0x400) - 1))
7710 
7711 
7712 /*
7713  * Component Instance : i_timer_sys_0_timer
7714  *
7715  * Instance i_timer_sys_0_timer of component ALT_TMR.
7716  *
7717  *
7718  */
7719 /* The address of the ALT_TMR_TMR1LDCOUNT register for the ALT_TMR_SYS_0_TMR instance. */
7720 #define ALT_TMR_SYS_0_TMR_TMR1LDCOUNT_ADDR ALT_TMR_TMR1LDCOUNT_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7721 /* The address of the ALT_TMR_TMR1CURVAL register for the ALT_TMR_SYS_0_TMR instance. */
7722 #define ALT_TMR_SYS_0_TMR_TMR1CURVAL_ADDR ALT_TMR_TMR1CURVAL_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7723 /* The address of the ALT_TMR_TMR1CTLREG register for the ALT_TMR_SYS_0_TMR instance. */
7724 #define ALT_TMR_SYS_0_TMR_TMR1CTLREG_ADDR ALT_TMR_TMR1CTLREG_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7725 /* The address of the ALT_TMR_TMR1EOI register for the ALT_TMR_SYS_0_TMR instance. */
7726 #define ALT_TMR_SYS_0_TMR_TMR1EOI_ADDR ALT_TMR_TMR1EOI_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7727 /* The address of the ALT_TMR_TMR1INTSTAT register for the ALT_TMR_SYS_0_TMR instance. */
7728 #define ALT_TMR_SYS_0_TMR_TMR1INTSTAT_ADDR ALT_TMR_TMR1INTSTAT_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7729 /* The address of the ALT_TMR_TMRSINTSTAT register for the ALT_TMR_SYS_0_TMR instance. */
7730 #define ALT_TMR_SYS_0_TMR_TMRSINTSTAT_ADDR ALT_TMR_TMRSINTSTAT_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7731 /* The address of the ALT_TMR_TMRSEOI register for the ALT_TMR_SYS_0_TMR instance. */
7732 #define ALT_TMR_SYS_0_TMR_TMRSEOI_ADDR ALT_TMR_TMRSEOI_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7733 /* The address of the ALT_TMR_TMRSRAWINTSTAT register for the ALT_TMR_SYS_0_TMR instance. */
7734 #define ALT_TMR_SYS_0_TMR_TMRSRAWINTSTAT_ADDR ALT_TMR_TMRSRAWINTSTAT_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7735 /* The address of the ALT_TMR_TMRSCOMPVER register for the ALT_TMR_SYS_0_TMR instance. */
7736 #define ALT_TMR_SYS_0_TMR_TMRSCOMPVER_ADDR ALT_TMR_TMRSCOMPVER_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7737 /* The base address byte offset for the start of the ALT_TMR_SYS_0_TMR component. */
7738 #define ALT_TMR_SYS_0_TMR_OFST 0xffd00000
7739 /* The start address of the ALT_TMR_SYS_0_TMR component. */
7740 #define ALT_TMR_SYS_0_TMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_TMR_SYS_0_TMR_OFST))
7741 /* The lower bound address range of the ALT_TMR_SYS_0_TMR component. */
7742 #define ALT_TMR_SYS_0_TMR_LB_ADDR ALT_TMR_SYS_0_TMR_ADDR
7743 /* The upper bound address range of the ALT_TMR_SYS_0_TMR component. */
7744 #define ALT_TMR_SYS_0_TMR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_TMR_SYS_0_TMR_ADDR) + 0x100) - 1))
7745 
7746 
7747 /*
7748  * Component Instance : i_timer_sys_1_timer
7749  *
7750  * Instance i_timer_sys_1_timer of component ALT_TMR.
7751  *
7752  *
7753  */
7754 /* The address of the ALT_TMR_TMR1LDCOUNT register for the ALT_TMR_SYS_1_TMR instance. */
7755 #define ALT_TMR_SYS_1_TMR_TMR1LDCOUNT_ADDR ALT_TMR_TMR1LDCOUNT_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7756 /* The address of the ALT_TMR_TMR1CURVAL register for the ALT_TMR_SYS_1_TMR instance. */
7757 #define ALT_TMR_SYS_1_TMR_TMR1CURVAL_ADDR ALT_TMR_TMR1CURVAL_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7758 /* The address of the ALT_TMR_TMR1CTLREG register for the ALT_TMR_SYS_1_TMR instance. */
7759 #define ALT_TMR_SYS_1_TMR_TMR1CTLREG_ADDR ALT_TMR_TMR1CTLREG_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7760 /* The address of the ALT_TMR_TMR1EOI register for the ALT_TMR_SYS_1_TMR instance. */
7761 #define ALT_TMR_SYS_1_TMR_TMR1EOI_ADDR ALT_TMR_TMR1EOI_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7762 /* The address of the ALT_TMR_TMR1INTSTAT register for the ALT_TMR_SYS_1_TMR instance. */
7763 #define ALT_TMR_SYS_1_TMR_TMR1INTSTAT_ADDR ALT_TMR_TMR1INTSTAT_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7764 /* The address of the ALT_TMR_TMRSINTSTAT register for the ALT_TMR_SYS_1_TMR instance. */
7765 #define ALT_TMR_SYS_1_TMR_TMRSINTSTAT_ADDR ALT_TMR_TMRSINTSTAT_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7766 /* The address of the ALT_TMR_TMRSEOI register for the ALT_TMR_SYS_1_TMR instance. */
7767 #define ALT_TMR_SYS_1_TMR_TMRSEOI_ADDR ALT_TMR_TMRSEOI_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7768 /* The address of the ALT_TMR_TMRSRAWINTSTAT register for the ALT_TMR_SYS_1_TMR instance. */
7769 #define ALT_TMR_SYS_1_TMR_TMRSRAWINTSTAT_ADDR ALT_TMR_TMRSRAWINTSTAT_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7770 /* The address of the ALT_TMR_TMRSCOMPVER register for the ALT_TMR_SYS_1_TMR instance. */
7771 #define ALT_TMR_SYS_1_TMR_TMRSCOMPVER_ADDR ALT_TMR_TMRSCOMPVER_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7772 /* The base address byte offset for the start of the ALT_TMR_SYS_1_TMR component. */
7773 #define ALT_TMR_SYS_1_TMR_OFST 0xffd00100
7774 /* The start address of the ALT_TMR_SYS_1_TMR component. */
7775 #define ALT_TMR_SYS_1_TMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_TMR_SYS_1_TMR_OFST))
7776 /* The lower bound address range of the ALT_TMR_SYS_1_TMR component. */
7777 #define ALT_TMR_SYS_1_TMR_LB_ADDR ALT_TMR_SYS_1_TMR_ADDR
7778 /* The upper bound address range of the ALT_TMR_SYS_1_TMR component. */
7779 #define ALT_TMR_SYS_1_TMR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_TMR_SYS_1_TMR_ADDR) + 0x100) - 1))
7780 
7781 
7782 /*
7783  * Component Instance : i_watchdog_0_l4wd
7784  *
7785  * Instance i_watchdog_0_l4wd of component ALT_L4WD.
7786  *
7787  *
7788  */
7789 /* The address of the ALT_L4WD_CR register for the ALT_L4WD0 instance. */
7790 #define ALT_L4WD0_WDT_CR_ADDR ALT_L4WD_CR_ADDR(ALT_L4WD0_ADDR)
7791 /* The address of the ALT_L4WD_TORR register for the ALT_L4WD0 instance. */
7792 #define ALT_L4WD0_WDT_TORR_ADDR ALT_L4WD_TORR_ADDR(ALT_L4WD0_ADDR)
7793 /* The address of the ALT_L4WD_CCVR register for the ALT_L4WD0 instance. */
7794 #define ALT_L4WD0_WDT_CCVR_ADDR ALT_L4WD_CCVR_ADDR(ALT_L4WD0_ADDR)
7795 /* The address of the ALT_L4WD_CRR register for the ALT_L4WD0 instance. */
7796 #define ALT_L4WD0_WDT_CRR_ADDR ALT_L4WD_CRR_ADDR(ALT_L4WD0_ADDR)
7797 /* The address of the ALT_L4WD_STAT register for the ALT_L4WD0 instance. */
7798 #define ALT_L4WD0_WDT_STAT_ADDR ALT_L4WD_STAT_ADDR(ALT_L4WD0_ADDR)
7799 /* The address of the ALT_L4WD_EOI register for the ALT_L4WD0 instance. */
7800 #define ALT_L4WD0_WDT_EOI_ADDR ALT_L4WD_EOI_ADDR(ALT_L4WD0_ADDR)
7801 /* The address of the ALT_L4WD_CP_WDT_USER_TOP_MAX register for the ALT_L4WD0 instance. */
7802 #define ALT_L4WD0_CP_WDT_USER_TOP_MAX_ADDR ALT_L4WD_CP_WDT_USER_TOP_MAX_ADDR(ALT_L4WD0_ADDR)
7803 /* The address of the ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX register for the ALT_L4WD0 instance. */
7804 #define ALT_L4WD0_CP_WDT_USER_TOP_INIT_MAX_ADDR ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_ADDR(ALT_L4WD0_ADDR)
7805 /* The address of the ALT_L4WD_CD_WDT_TOP_RST register for the ALT_L4WD0 instance. */
7806 #define ALT_L4WD0_CD_WDT_TOP_RST_ADDR ALT_L4WD_CD_WDT_TOP_RST_ADDR(ALT_L4WD0_ADDR)
7807 /* The address of the ALT_L4WD_CP_WDT_CNT_RST register for the ALT_L4WD0 instance. */
7808 #define ALT_L4WD0_CP_WDT_CNT_RST_ADDR ALT_L4WD_CP_WDT_CNT_RST_ADDR(ALT_L4WD0_ADDR)
7809 /* The address of the ALT_L4WD_COMP_PARAM_1 register for the ALT_L4WD0 instance. */
7810 #define ALT_L4WD0_WDT_COMP_PARAM_1_ADDR ALT_L4WD_COMP_PARAM_1_ADDR(ALT_L4WD0_ADDR)
7811 /* The address of the ALT_L4WD_COMP_VER register for the ALT_L4WD0 instance. */
7812 #define ALT_L4WD0_WDT_COMP_VER_ADDR ALT_L4WD_COMP_VER_ADDR(ALT_L4WD0_ADDR)
7813 /* The address of the ALT_L4WD_COMP_TYPE register for the ALT_L4WD0 instance. */
7814 #define ALT_L4WD0_WDT_COMP_TYPE_ADDR ALT_L4WD_COMP_TYPE_ADDR(ALT_L4WD0_ADDR)
7815 /* The base address byte offset for the start of the ALT_L4WD0 component. */
7816 #define ALT_L4WD0_OFST 0xffd00200
7817 /* The start address of the ALT_L4WD0 component. */
7818 #define ALT_L4WD0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L4WD0_OFST))
7819 /* The lower bound address range of the ALT_L4WD0 component. */
7820 #define ALT_L4WD0_LB_ADDR ALT_L4WD0_ADDR
7821 /* The upper bound address range of the ALT_L4WD0 component. */
7822 #define ALT_L4WD0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L4WD0_ADDR) + 0x100) - 1))
7823 
7824 
7825 /*
7826  * Component Instance : i_watchdog_1_l4wd
7827  *
7828  * Instance i_watchdog_1_l4wd of component ALT_L4WD.
7829  *
7830  *
7831  */
7832 /* The address of the ALT_L4WD_CR register for the ALT_L4WD1 instance. */
7833 #define ALT_L4WD1_WDT_CR_ADDR ALT_L4WD_CR_ADDR(ALT_L4WD1_ADDR)
7834 /* The address of the ALT_L4WD_TORR register for the ALT_L4WD1 instance. */
7835 #define ALT_L4WD1_WDT_TORR_ADDR ALT_L4WD_TORR_ADDR(ALT_L4WD1_ADDR)
7836 /* The address of the ALT_L4WD_CCVR register for the ALT_L4WD1 instance. */
7837 #define ALT_L4WD1_WDT_CCVR_ADDR ALT_L4WD_CCVR_ADDR(ALT_L4WD1_ADDR)
7838 /* The address of the ALT_L4WD_CRR register for the ALT_L4WD1 instance. */
7839 #define ALT_L4WD1_WDT_CRR_ADDR ALT_L4WD_CRR_ADDR(ALT_L4WD1_ADDR)
7840 /* The address of the ALT_L4WD_STAT register for the ALT_L4WD1 instance. */
7841 #define ALT_L4WD1_WDT_STAT_ADDR ALT_L4WD_STAT_ADDR(ALT_L4WD1_ADDR)
7842 /* The address of the ALT_L4WD_EOI register for the ALT_L4WD1 instance. */
7843 #define ALT_L4WD1_WDT_EOI_ADDR ALT_L4WD_EOI_ADDR(ALT_L4WD1_ADDR)
7844 /* The address of the ALT_L4WD_CP_WDT_USER_TOP_MAX register for the ALT_L4WD1 instance. */
7845 #define ALT_L4WD1_CP_WDT_USER_TOP_MAX_ADDR ALT_L4WD_CP_WDT_USER_TOP_MAX_ADDR(ALT_L4WD1_ADDR)
7846 /* The address of the ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX register for the ALT_L4WD1 instance. */
7847 #define ALT_L4WD1_CP_WDT_USER_TOP_INIT_MAX_ADDR ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_ADDR(ALT_L4WD1_ADDR)
7848 /* The address of the ALT_L4WD_CD_WDT_TOP_RST register for the ALT_L4WD1 instance. */
7849 #define ALT_L4WD1_CD_WDT_TOP_RST_ADDR ALT_L4WD_CD_WDT_TOP_RST_ADDR(ALT_L4WD1_ADDR)
7850 /* The address of the ALT_L4WD_CP_WDT_CNT_RST register for the ALT_L4WD1 instance. */
7851 #define ALT_L4WD1_CP_WDT_CNT_RST_ADDR ALT_L4WD_CP_WDT_CNT_RST_ADDR(ALT_L4WD1_ADDR)
7852 /* The address of the ALT_L4WD_COMP_PARAM_1 register for the ALT_L4WD1 instance. */
7853 #define ALT_L4WD1_WDT_COMP_PARAM_1_ADDR ALT_L4WD_COMP_PARAM_1_ADDR(ALT_L4WD1_ADDR)
7854 /* The address of the ALT_L4WD_COMP_VER register for the ALT_L4WD1 instance. */
7855 #define ALT_L4WD1_WDT_COMP_VER_ADDR ALT_L4WD_COMP_VER_ADDR(ALT_L4WD1_ADDR)
7856 /* The address of the ALT_L4WD_COMP_TYPE register for the ALT_L4WD1 instance. */
7857 #define ALT_L4WD1_WDT_COMP_TYPE_ADDR ALT_L4WD_COMP_TYPE_ADDR(ALT_L4WD1_ADDR)
7858 /* The base address byte offset for the start of the ALT_L4WD1 component. */
7859 #define ALT_L4WD1_OFST 0xffd00300
7860 /* The start address of the ALT_L4WD1 component. */
7861 #define ALT_L4WD1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L4WD1_OFST))
7862 /* The lower bound address range of the ALT_L4WD1 component. */
7863 #define ALT_L4WD1_LB_ADDR ALT_L4WD1_ADDR
7864 /* The upper bound address range of the ALT_L4WD1 component. */
7865 #define ALT_L4WD1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L4WD1_ADDR) + 0x100) - 1))
7866 
7867 
7868 /*
7869  * Component Instance : i_fpga_mgr_fpgamgrregs
7870  *
7871  * Instance i_fpga_mgr_fpgamgrregs of component ALT_FPGAMGR.
7872  *
7873  *
7874  */
7875 /* The address of the ALT_FPGAMGR_DCLKCNT register for the ALT_FPGAMGR instance. */
7876 #define ALT_FPGAMGR_DCLKCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_DCLKCNT_OFST))
7877 /* The address of the ALT_FPGAMGR_DCLKSTAT register for the ALT_FPGAMGR instance. */
7878 #define ALT_FPGAMGR_DCLKSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_DCLKSTAT_OFST))
7879 /* The address of the ALT_FPGAMGR_GPO register for the ALT_FPGAMGR instance. */
7880 #define ALT_FPGAMGR_GPO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_GPO_OFST))
7881 /* The address of the ALT_FPGAMGR_GPI register for the ALT_FPGAMGR instance. */
7882 #define ALT_FPGAMGR_GPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_GPI_OFST))
7883 /* The address of the ALT_FPGAMGR_MISCI register for the ALT_FPGAMGR instance. */
7884 #define ALT_FPGAMGR_MISCI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_MISCI_OFST))
7885 /* The address of the ALT_FPGAMGR_EMR_DATA0 register for the ALT_FPGAMGR instance. */
7886 #define ALT_FPGAMGR_EMR_DATA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_DATA0_OFST))
7887 /* The address of the ALT_FPGAMGR_EMR_DATA1 register for the ALT_FPGAMGR instance. */
7888 #define ALT_FPGAMGR_EMR_DATA1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_DATA1_OFST))
7889 /* The address of the ALT_FPGAMGR_EMR_DATA2 register for the ALT_FPGAMGR instance. */
7890 #define ALT_FPGAMGR_EMR_DATA2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_DATA2_OFST))
7891 /* The address of the ALT_FPGAMGR_EMR_DATA3 register for the ALT_FPGAMGR instance. */
7892 #define ALT_FPGAMGR_EMR_DATA3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_DATA3_OFST))
7893 /* The address of the ALT_FPGAMGR_EMR_DATA4 register for the ALT_FPGAMGR instance. */
7894 #define ALT_FPGAMGR_EMR_DATA4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_DATA4_OFST))
7895 /* The address of the ALT_FPGAMGR_EMR_DATA5 register for the ALT_FPGAMGR instance. */
7896 #define ALT_FPGAMGR_EMR_DATA5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_DATA5_OFST))
7897 /* The address of the ALT_FPGAMGR_EMR_VALID register for the ALT_FPGAMGR instance. */
7898 #define ALT_FPGAMGR_EMR_VALID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_VALID_OFST))
7899 /* The address of the ALT_FPGAMGR_EMR_EN register for the ALT_FPGAMGR instance. */
7900 #define ALT_FPGAMGR_EMR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_EN_OFST))
7901 /* The address of the ALT_FPGAMGR_JTAG_CFG register for the ALT_FPGAMGR instance. */
7902 #define ALT_FPGAMGR_JTAG_CFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_JTAG_CFG_OFST))
7903 /* The address of the ALT_FPGAMGR_JTAG_STAT register for the ALT_FPGAMGR instance. */
7904 #define ALT_FPGAMGR_JTAG_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_JTAG_STAT_OFST))
7905 /* The address of the ALT_FPGAMGR_JTAG_KICK register for the ALT_FPGAMGR instance. */
7906 #define ALT_FPGAMGR_JTAG_KICK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_JTAG_KICK_OFST))
7907 /* The address of the ALT_FPGAMGR_JTAG_DATA_W register for the ALT_FPGAMGR instance. */
7908 #define ALT_FPGAMGR_JTAG_DATA_W_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_JTAG_DATA_W_OFST))
7909 /* The address of the ALT_FPGAMGR_JTAG_DATA_R register for the ALT_FPGAMGR instance. */
7910 #define ALT_FPGAMGR_JTAG_DATA_R_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_JTAG_DATA_R_OFST))
7911 /* The address of the ALT_FPGAMGR_IMGCFG_CTL_00 register for the ALT_FPGAMGR instance. */
7912 #define ALT_FPGAMGR_IMGCFG_CTL_00_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_IMGCFG_CTL_00_OFST))
7913 /* The address of the ALT_FPGAMGR_IMGCFG_CTL_01 register for the ALT_FPGAMGR instance. */
7914 #define ALT_FPGAMGR_IMGCFG_CTL_01_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_IMGCFG_CTL_01_OFST))
7915 /* The address of the ALT_FPGAMGR_IMGCFG_CTL_02 register for the ALT_FPGAMGR instance. */
7916 #define ALT_FPGAMGR_IMGCFG_CTL_02_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_IMGCFG_CTL_02_OFST))
7917 /* The address of the ALT_FPGAMGR_IMGCFG_STAT register for the ALT_FPGAMGR instance. */
7918 #define ALT_FPGAMGR_IMGCFG_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_IMGCFG_STAT_OFST))
7919 /* The address of the ALT_FPGAMGR_INTR_MSKED_STAT register for the ALT_FPGAMGR instance. */
7920 #define ALT_FPGAMGR_INTR_MSKED_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_INTR_MSKED_STAT_OFST))
7921 /* The address of the ALT_FPGAMGR_INTR_MSK register for the ALT_FPGAMGR instance. */
7922 #define ALT_FPGAMGR_INTR_MSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_INTR_MSK_OFST))
7923 /* The address of the ALT_FPGAMGR_INTR_POL register for the ALT_FPGAMGR instance. */
7924 #define ALT_FPGAMGR_INTR_POL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_INTR_POL_OFST))
7925 /* The address of the ALT_FPGAMGR_DMA_CFG register for the ALT_FPGAMGR instance. */
7926 #define ALT_FPGAMGR_DMA_CFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_DMA_CFG_OFST))
7927 /* The address of the ALT_FPGAMGR_IMGCFG_FIFO_STAT register for the ALT_FPGAMGR instance. */
7928 #define ALT_FPGAMGR_IMGCFG_FIFO_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_IMGCFG_FIFO_STAT_OFST))
7929 /* The base address byte offset for the start of the ALT_FPGAMGR component. */
7930 #define ALT_FPGAMGR_OFST 0xffd03000
7931 /* The start address of the ALT_FPGAMGR component. */
7932 #define ALT_FPGAMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGAMGR_OFST))
7933 /* The lower bound address range of the ALT_FPGAMGR component. */
7934 #define ALT_FPGAMGR_LB_ADDR ALT_FPGAMGR_ADDR
7935 /* The upper bound address range of the ALT_FPGAMGR component. */
7936 #define ALT_FPGAMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGAMGR_ADDR) + 0x1000) - 1))
7937 
7938 
7939 /*
7940  * Component Instance : i_clk_mgr_clkmgr
7941  *
7942  * Instance i_clk_mgr_clkmgr of component ALT_CLKMGR_CLKMGR.
7943  *
7944  *
7945  */
7946 /* The address of the ALT_CLKMGR_CLKMGR_CTL register for the ALT_CLKMGR_CLKMGR instance. */
7947 #define ALT_CLKMGR_CLKMGR_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_CTL_OFST))
7948 /* The address of the ALT_CLKMGR_CLKMGR_INTR register for the ALT_CLKMGR_CLKMGR instance. */
7949 #define ALT_CLKMGR_CLKMGR_INTR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_INTR_OFST))
7950 /* The address of the ALT_CLKMGR_CLKMGR_INTRS register for the ALT_CLKMGR_CLKMGR instance. */
7951 #define ALT_CLKMGR_CLKMGR_INTRS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_INTRS_OFST))
7952 /* The address of the ALT_CLKMGR_CLKMGR_INTRR register for the ALT_CLKMGR_CLKMGR instance. */
7953 #define ALT_CLKMGR_CLKMGR_INTRR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_INTRR_OFST))
7954 /* The address of the ALT_CLKMGR_CLKMGR_INTREN register for the ALT_CLKMGR_CLKMGR instance. */
7955 #define ALT_CLKMGR_CLKMGR_INTREN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_INTREN_OFST))
7956 /* The address of the ALT_CLKMGR_CLKMGR_INTRENS register for the ALT_CLKMGR_CLKMGR instance. */
7957 #define ALT_CLKMGR_CLKMGR_INTRENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_INTRENS_OFST))
7958 /* The address of the ALT_CLKMGR_CLKMGR_INTRENR register for the ALT_CLKMGR_CLKMGR instance. */
7959 #define ALT_CLKMGR_CLKMGR_INTRENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_INTRENR_OFST))
7960 /* The address of the ALT_CLKMGR_CLKMGR_STAT register for the ALT_CLKMGR_CLKMGR instance. */
7961 #define ALT_CLKMGR_CLKMGR_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_STAT_OFST))
7962 /* The address of the ALT_CLKMGR_CLKMGR_TESTIOCTL register for the ALT_CLKMGR_CLKMGR instance. */
7963 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_TESTIOCTL_OFST))
7964 /* The base address byte offset for the start of the ALT_CLKMGR_CLKMGR component. */
7965 #define ALT_CLKMGR_CLKMGR_OFST 0xffd04000
7966 /* The start address of the ALT_CLKMGR_CLKMGR component. */
7967 #define ALT_CLKMGR_CLKMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_CLKMGR_OFST))
7968 /* The lower bound address range of the ALT_CLKMGR_CLKMGR component. */
7969 #define ALT_CLKMGR_CLKMGR_LB_ADDR ALT_CLKMGR_CLKMGR_ADDR
7970 /* The upper bound address range of the ALT_CLKMGR_CLKMGR component. */
7971 #define ALT_CLKMGR_CLKMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + 0x40) - 1))
7972 
7973 
7974 /*
7975  * Component Instance : i_clk_mgr_mainpllgrp
7976  *
7977  * Instance i_clk_mgr_mainpllgrp of component ALT_CLKMGR_MAINPLL.
7978  *
7979  *
7980  */
7981 /* The address of the ALT_CLKMGR_MAINPLL_VCO0 register for the ALT_CLKMGR_MAINPLL instance. */
7982 #define ALT_CLKMGR_MAINPLL_VCO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_VCO0_OFST))
7983 /* The address of the ALT_CLKMGR_MAINPLL_VCO1 register for the ALT_CLKMGR_MAINPLL instance. */
7984 #define ALT_CLKMGR_MAINPLL_VCO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_VCO1_OFST))
7985 /* The address of the ALT_CLKMGR_MAINPLL_EN register for the ALT_CLKMGR_MAINPLL instance. */
7986 #define ALT_CLKMGR_MAINPLL_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_EN_OFST))
7987 /* The address of the ALT_CLKMGR_MAINPLL_ENS register for the ALT_CLKMGR_MAINPLL instance. */
7988 #define ALT_CLKMGR_MAINPLL_ENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_ENS_OFST))
7989 /* The address of the ALT_CLKMGR_MAINPLL_ENR register for the ALT_CLKMGR_MAINPLL instance. */
7990 #define ALT_CLKMGR_MAINPLL_ENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_ENR_OFST))
7991 /* The address of the ALT_CLKMGR_MAINPLL_BYPASS register for the ALT_CLKMGR_MAINPLL instance. */
7992 #define ALT_CLKMGR_MAINPLL_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_BYPASS_OFST))
7993 /* The address of the ALT_CLKMGR_MAINPLL_BYPASSS register for the ALT_CLKMGR_MAINPLL instance. */
7994 #define ALT_CLKMGR_MAINPLL_BYPASSS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_BYPASSS_OFST))
7995 /* The address of the ALT_CLKMGR_MAINPLL_BYPASSR register for the ALT_CLKMGR_MAINPLL instance. */
7996 #define ALT_CLKMGR_MAINPLL_BYPASSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_BYPASSR_OFST))
7997 /* The address of the ALT_CLKMGR_MAINPLL_MPUCLK register for the ALT_CLKMGR_MAINPLL instance. */
7998 #define ALT_CLKMGR_MAINPLL_MPUCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_MPUCLK_OFST))
7999 /* The address of the ALT_CLKMGR_MAINPLL_NOCCLK register for the ALT_CLKMGR_MAINPLL instance. */
8000 #define ALT_CLKMGR_MAINPLL_NOCCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_NOCCLK_OFST))
8001 /* The address of the ALT_CLKMGR_MAINPLL_CNTR2CLK register for the ALT_CLKMGR_MAINPLL instance. */
8002 #define ALT_CLKMGR_MAINPLL_CNTR2CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR2CLK_OFST))
8003 /* The address of the ALT_CLKMGR_MAINPLL_CNTR3CLK register for the ALT_CLKMGR_MAINPLL instance. */
8004 #define ALT_CLKMGR_MAINPLL_CNTR3CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR3CLK_OFST))
8005 /* The address of the ALT_CLKMGR_MAINPLL_CNTR4CLK register for the ALT_CLKMGR_MAINPLL instance. */
8006 #define ALT_CLKMGR_MAINPLL_CNTR4CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR4CLK_OFST))
8007 /* The address of the ALT_CLKMGR_MAINPLL_CNTR5CLK register for the ALT_CLKMGR_MAINPLL instance. */
8008 #define ALT_CLKMGR_MAINPLL_CNTR5CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR5CLK_OFST))
8009 /* The address of the ALT_CLKMGR_MAINPLL_CNTR6CLK register for the ALT_CLKMGR_MAINPLL instance. */
8010 #define ALT_CLKMGR_MAINPLL_CNTR6CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR6CLK_OFST))
8011 /* The address of the ALT_CLKMGR_MAINPLL_CNTR7CLK register for the ALT_CLKMGR_MAINPLL instance. */
8012 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR7CLK_OFST))
8013 /* The address of the ALT_CLKMGR_MAINPLL_CNTR8CLK register for the ALT_CLKMGR_MAINPLL instance. */
8014 #define ALT_CLKMGR_MAINPLL_CNTR8CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR8CLK_OFST))
8015 /* The address of the ALT_CLKMGR_MAINPLL_CNTR9CLK register for the ALT_CLKMGR_MAINPLL instance. */
8016 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR9CLK_OFST))
8017 /* The address of the ALT_CLKMGR_MAINPLL_CNTR15CLK register for the ALT_CLKMGR_MAINPLL instance. */
8018 #define ALT_CLKMGR_MAINPLL_CNTR15CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR15CLK_OFST))
8019 /* The address of the ALT_CLKMGR_MAINPLL_OUTRST register for the ALT_CLKMGR_MAINPLL instance. */
8020 #define ALT_CLKMGR_MAINPLL_OUTRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_OUTRST_OFST))
8021 /* The address of the ALT_CLKMGR_MAINPLL_OUTRSTSTAT register for the ALT_CLKMGR_MAINPLL instance. */
8022 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OFST))
8023 /* The address of the ALT_CLKMGR_MAINPLL_NOCDIV register for the ALT_CLKMGR_MAINPLL instance. */
8024 #define ALT_CLKMGR_MAINPLL_NOCDIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_NOCDIV_OFST))
8025 /* The base address byte offset for the start of the ALT_CLKMGR_MAINPLL component. */
8026 #define ALT_CLKMGR_MAINPLL_OFST 0xffd04040
8027 /* The start address of the ALT_CLKMGR_MAINPLL component. */
8028 #define ALT_CLKMGR_MAINPLL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_MAINPLL_OFST))
8029 /* The lower bound address range of the ALT_CLKMGR_MAINPLL component. */
8030 #define ALT_CLKMGR_MAINPLL_LB_ADDR ALT_CLKMGR_MAINPLL_ADDR
8031 /* The upper bound address range of the ALT_CLKMGR_MAINPLL component. */
8032 #define ALT_CLKMGR_MAINPLL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + 0x80) - 1))
8033 
8034 
8035 /*
8036  * Component Instance : i_clk_mgr_perpllgrp
8037  *
8038  * Instance i_clk_mgr_perpllgrp of component ALT_CLKMGR_PERPLL.
8039  *
8040  *
8041  */
8042 /* The address of the ALT_CLKMGR_PERPLL_VCO0 register for the ALT_CLKMGR_PERPLL instance. */
8043 #define ALT_CLKMGR_PERPLL_VCO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_VCO0_OFST))
8044 /* The address of the ALT_CLKMGR_PERPLL_VCO1 register for the ALT_CLKMGR_PERPLL instance. */
8045 #define ALT_CLKMGR_PERPLL_VCO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_VCO1_OFST))
8046 /* The address of the ALT_CLKMGR_PERPLL_EN register for the ALT_CLKMGR_PERPLL instance. */
8047 #define ALT_CLKMGR_PERPLL_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_EN_OFST))
8048 /* The address of the ALT_CLKMGR_PERPLL_ENS register for the ALT_CLKMGR_PERPLL instance. */
8049 #define ALT_CLKMGR_PERPLL_ENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_ENS_OFST))
8050 /* The address of the ALT_CLKMGR_PERPLL_ENR register for the ALT_CLKMGR_PERPLL instance. */
8051 #define ALT_CLKMGR_PERPLL_ENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_ENR_OFST))
8052 /* The address of the ALT_CLKMGR_PERPLL_BYPASS register for the ALT_CLKMGR_PERPLL instance. */
8053 #define ALT_CLKMGR_PERPLL_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_BYPASS_OFST))
8054 /* The address of the ALT_CLKMGR_PERPLL_BYPASSS register for the ALT_CLKMGR_PERPLL instance. */
8055 #define ALT_CLKMGR_PERPLL_BYPASSS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_BYPASSS_OFST))
8056 /* The address of the ALT_CLKMGR_PERPLL_BYPASSR register for the ALT_CLKMGR_PERPLL instance. */
8057 #define ALT_CLKMGR_PERPLL_BYPASSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_BYPASSR_OFST))
8058 /* The address of the ALT_CLKMGR_PERPLL_CNTR2CLK register for the ALT_CLKMGR_PERPLL instance. */
8059 #define ALT_CLKMGR_PERPLL_CNTR2CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR2CLK_OFST))
8060 /* The address of the ALT_CLKMGR_PERPLL_CNTR3CLK register for the ALT_CLKMGR_PERPLL instance. */
8061 #define ALT_CLKMGR_PERPLL_CNTR3CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR3CLK_OFST))
8062 /* The address of the ALT_CLKMGR_PERPLL_CNTR4CLK register for the ALT_CLKMGR_PERPLL instance. */
8063 #define ALT_CLKMGR_PERPLL_CNTR4CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR4CLK_OFST))
8064 /* The address of the ALT_CLKMGR_PERPLL_CNTR5CLK register for the ALT_CLKMGR_PERPLL instance. */
8065 #define ALT_CLKMGR_PERPLL_CNTR5CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR5CLK_OFST))
8066 /* The address of the ALT_CLKMGR_PERPLL_CNTR6CLK register for the ALT_CLKMGR_PERPLL instance. */
8067 #define ALT_CLKMGR_PERPLL_CNTR6CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR6CLK_OFST))
8068 /* The address of the ALT_CLKMGR_PERPLL_CNTR7CLK register for the ALT_CLKMGR_PERPLL instance. */
8069 #define ALT_CLKMGR_PERPLL_CNTR7CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR7CLK_OFST))
8070 /* The address of the ALT_CLKMGR_PERPLL_CNTR8CLK register for the ALT_CLKMGR_PERPLL instance. */
8071 #define ALT_CLKMGR_PERPLL_CNTR8CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR8CLK_OFST))
8072 /* The address of the ALT_CLKMGR_PERPLL_CNTR9CLK register for the ALT_CLKMGR_PERPLL instance. */
8073 #define ALT_CLKMGR_PERPLL_CNTR9CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR9CLK_OFST))
8074 /* The address of the ALT_CLKMGR_PERPLL_OUTRST register for the ALT_CLKMGR_PERPLL instance. */
8075 #define ALT_CLKMGR_PERPLL_OUTRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_OUTRST_OFST))
8076 /* The address of the ALT_CLKMGR_PERPLL_OUTRSTSTAT register for the ALT_CLKMGR_PERPLL instance. */
8077 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_OUTRSTSTAT_OFST))
8078 /* The address of the ALT_CLKMGR_PERPLL_EMACCTL register for the ALT_CLKMGR_PERPLL instance. */
8079 #define ALT_CLKMGR_PERPLL_EMACCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_EMACCTL_OFST))
8080 /* The address of the ALT_CLKMGR_PERPLL_GPIODIV register for the ALT_CLKMGR_PERPLL instance. */
8081 #define ALT_CLKMGR_PERPLL_GPIODIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_GPIODIV_OFST))
8082 /* The base address byte offset for the start of the ALT_CLKMGR_PERPLL component. */
8083 #define ALT_CLKMGR_PERPLL_OFST 0xffd040c0
8084 /* The start address of the ALT_CLKMGR_PERPLL component. */
8085 #define ALT_CLKMGR_PERPLL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_PERPLL_OFST))
8086 /* The lower bound address range of the ALT_CLKMGR_PERPLL component. */
8087 #define ALT_CLKMGR_PERPLL_LB_ADDR ALT_CLKMGR_PERPLL_ADDR
8088 /* The upper bound address range of the ALT_CLKMGR_PERPLL component. */
8089 #define ALT_CLKMGR_PERPLL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + 0x80) - 1))
8090 
8091 
8092 /*
8093  * Component Instance : i_clk_mgr_alteragrp
8094  *
8095  * Instance i_clk_mgr_alteragrp of component ALT_CLKMGR_ALTERA.
8096  *
8097  *
8098  */
8099 /* The address of the ALT_CLKMGR_NOCCLK register for the ALT_CLKMGR_ALTERA instance. */
8100 #define ALT_CLKMGR_NOCCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ALTERA_ADDR) + ALT_CLKMGR_NOCCLK_OFST))
8101 /* The base address byte offset for the start of the ALT_CLKMGR_ALTERA component. */
8102 #define ALT_CLKMGR_ALTERA_OFST 0xffd04140
8103 /* The start address of the ALT_CLKMGR_ALTERA component. */
8104 #define ALT_CLKMGR_ALTERA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_ALTERA_OFST))
8105 /* The lower bound address range of the ALT_CLKMGR_ALTERA component. */
8106 #define ALT_CLKMGR_ALTERA_LB_ADDR ALT_CLKMGR_ALTERA_ADDR
8107 /* The upper bound address range of the ALT_CLKMGR_ALTERA component. */
8108 #define ALT_CLKMGR_ALTERA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_ALTERA_ADDR) + 0x40) - 1))
8109 
8110 
8111 /*
8112  * Component Instance : i_rst_mgr_rstmgr
8113  *
8114  * Instance i_rst_mgr_rstmgr of component ALT_RSTMGR.
8115  *
8116  *
8117  */
8118 /* The address of the ALT_RSTMGR_STAT register for the ALT_RSTMGR instance. */
8119 #define ALT_RSTMGR_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_STAT_OFST))
8120 /* The address of the ALT_RSTMGR_RAMSTAT register for the ALT_RSTMGR instance. */
8121 #define ALT_RSTMGR_RAMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_RAMSTAT_OFST))
8122 /* The address of the ALT_RSTMGR_MISCSTAT register for the ALT_RSTMGR instance. */
8123 #define ALT_RSTMGR_MISCSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_MISCSTAT_OFST))
8124 /* The address of the ALT_RSTMGR_CTL register for the ALT_RSTMGR instance. */
8125 #define ALT_RSTMGR_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_CTL_OFST))
8126 /* The address of the ALT_RSTMGR_HDSKEN register for the ALT_RSTMGR instance. */
8127 #define ALT_RSTMGR_HDSKEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKEN_OFST))
8128 /* The address of the ALT_RSTMGR_HDSKREQ register for the ALT_RSTMGR instance. */
8129 #define ALT_RSTMGR_HDSKREQ_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKREQ_OFST))
8130 /* The address of the ALT_RSTMGR_HDSKACK register for the ALT_RSTMGR instance. */
8131 #define ALT_RSTMGR_HDSKACK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKACK_OFST))
8132 /* The address of the ALT_RSTMGR_COUNTS register for the ALT_RSTMGR instance. */
8133 #define ALT_RSTMGR_COUNTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_COUNTS_OFST))
8134 /* The address of the ALT_RSTMGR_MPUMODRST register for the ALT_RSTMGR instance. */
8135 #define ALT_RSTMGR_MPUMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_MPUMODRST_OFST))
8136 /* The address of the ALT_RSTMGR_PER0MODRST register for the ALT_RSTMGR instance. */
8137 #define ALT_RSTMGR_PER0MODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_PER0MODRST_OFST))
8138 /* The address of the ALT_RSTMGR_PER1MODRST register for the ALT_RSTMGR instance. */
8139 #define ALT_RSTMGR_PER1MODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_PER1MODRST_OFST))
8140 /* The address of the ALT_RSTMGR_BRGMODRST register for the ALT_RSTMGR instance. */
8141 #define ALT_RSTMGR_BRGMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_BRGMODRST_OFST))
8142 /* The address of the ALT_RSTMGR_SYSMODRST register for the ALT_RSTMGR instance. */
8143 #define ALT_RSTMGR_SYSMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_SYSMODRST_OFST))
8144 /* The address of the ALT_RSTMGR_COLDMODRST register for the ALT_RSTMGR instance. */
8145 #define ALT_RSTMGR_COLDMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_COLDMODRST_OFST))
8146 /* The address of the ALT_RSTMGR_NRSTMODRST register for the ALT_RSTMGR instance. */
8147 #define ALT_RSTMGR_NRSTMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_NRSTMODRST_OFST))
8148 /* The address of the ALT_RSTMGR_DBGMODRST register for the ALT_RSTMGR instance. */
8149 #define ALT_RSTMGR_DBGMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_DBGMODRST_OFST))
8150 /* The address of the ALT_RSTMGR_MPUWARMMSK register for the ALT_RSTMGR instance. */
8151 #define ALT_RSTMGR_MPUWARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_MPUWARMMSK_OFST))
8152 /* The address of the ALT_RSTMGR_PER0WARMMSK register for the ALT_RSTMGR instance. */
8153 #define ALT_RSTMGR_PER0WARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_PER0WARMMSK_OFST))
8154 /* The address of the ALT_RSTMGR_PER1WARMMSK register for the ALT_RSTMGR instance. */
8155 #define ALT_RSTMGR_PER1WARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_PER1WARMMSK_OFST))
8156 /* The address of the ALT_RSTMGR_BRGWARMMSK register for the ALT_RSTMGR instance. */
8157 #define ALT_RSTMGR_BRGWARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_BRGWARMMSK_OFST))
8158 /* The address of the ALT_RSTMGR_SYSWARMMSK register for the ALT_RSTMGR instance. */
8159 #define ALT_RSTMGR_SYSWARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_SYSWARMMSK_OFST))
8160 /* The address of the ALT_RSTMGR_NRSTWARMMSK register for the ALT_RSTMGR instance. */
8161 #define ALT_RSTMGR_NRSTWARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_NRSTWARMMSK_OFST))
8162 /* The address of the ALT_RSTMGR_L3WARMMSK register for the ALT_RSTMGR instance. */
8163 #define ALT_RSTMGR_L3WARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_L3WARMMSK_OFST))
8164 /* The address of the ALT_RSTMGR_TSTSTA register for the ALT_RSTMGR instance. */
8165 #define ALT_RSTMGR_TSTSTA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_TSTSTA_OFST))
8166 /* The address of the ALT_RSTMGR_TSTSCRATCH register for the ALT_RSTMGR instance. */
8167 #define ALT_RSTMGR_TSTSCRATCH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_TSTSCRATCH_OFST))
8168 /* The address of the ALT_RSTMGR_HDSKTMO register for the ALT_RSTMGR instance. */
8169 #define ALT_RSTMGR_HDSKTMO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKTMO_OFST))
8170 /* The address of the ALT_RSTMGR_HMCINTR register for the ALT_RSTMGR instance. */
8171 #define ALT_RSTMGR_HMCINTR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HMCINTR_OFST))
8172 /* The address of the ALT_RSTMGR_HMCINTREN register for the ALT_RSTMGR instance. */
8173 #define ALT_RSTMGR_HMCINTREN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HMCINTREN_OFST))
8174 /* The address of the ALT_RSTMGR_HMCINTRENS register for the ALT_RSTMGR instance. */
8175 #define ALT_RSTMGR_HMCINTRENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HMCINTRENS_OFST))
8176 /* The address of the ALT_RSTMGR_HMCINTRENR register for the ALT_RSTMGR instance. */
8177 #define ALT_RSTMGR_HMCINTRENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HMCINTRENR_OFST))
8178 /* The address of the ALT_RSTMGR_HMCGPOUT register for the ALT_RSTMGR instance. */
8179 #define ALT_RSTMGR_HMCGPOUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HMCGPOUT_OFST))
8180 /* The address of the ALT_RSTMGR_HMCGPIN register for the ALT_RSTMGR instance. */
8181 #define ALT_RSTMGR_HMCGPIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HMCGPIN_OFST))
8182 /* The base address byte offset for the start of the ALT_RSTMGR component. */
8183 #define ALT_RSTMGR_OFST 0xffd05000
8184 /* The start address of the ALT_RSTMGR component. */
8185 #define ALT_RSTMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_RSTMGR_OFST))
8186 /* The lower bound address range of the ALT_RSTMGR component. */
8187 #define ALT_RSTMGR_LB_ADDR ALT_RSTMGR_ADDR
8188 /* The upper bound address range of the ALT_RSTMGR component. */
8189 #define ALT_RSTMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_RSTMGR_ADDR) + 0x100) - 1))
8190 
8191 
8192 /*
8193  * Component Instance : i_sys_mgr_core
8194  *
8195  * Instance i_sys_mgr_core of component ALT_SYSMGR.
8196  *
8197  *
8198  */
8199 /* The address of the ALT_SYSMGR_SILICONID1 register for the ALT_SYSMGR instance. */
8200 #define ALT_SYSMGR_SILICONID1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_SILICONID1_OFST))
8201 /* The address of the ALT_SYSMGR_SILICONID2 register for the ALT_SYSMGR instance. */
8202 #define ALT_SYSMGR_SILICONID2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_SILICONID2_OFST))
8203 /* The address of the ALT_SYSMGR_WDDBG register for the ALT_SYSMGR instance. */
8204 #define ALT_SYSMGR_WDDBG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_WDDBG_OFST))
8205 /* The address of the ALT_SYSMGR_BOOT register for the ALT_SYSMGR instance. */
8206 #define ALT_SYSMGR_BOOT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_BOOT_OFST))
8207 /* The address of the ALT_SYSMGR_MPU_CTL_L2_ECC register for the ALT_SYSMGR instance. */
8208 #define ALT_SYSMGR_MPU_CTL_L2_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_MPU_CTL_L2_ECC_OFST))
8209 /* The address of the ALT_SYSMGR_DMA register for the ALT_SYSMGR instance. */
8210 #define ALT_SYSMGR_DMA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_DMA_OFST))
8211 /* The address of the ALT_SYSMGR_DMA_PERIPH register for the ALT_SYSMGR instance. */
8212 #define ALT_SYSMGR_DMA_PERIPH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_DMA_PERIPH_OFST))
8213 /* The address of the ALT_SYSMGR_SDMMC register for the ALT_SYSMGR instance. */
8214 #define ALT_SYSMGR_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_SDMMC_OFST))
8215 /* The address of the ALT_SYSMGR_SDMMC_L3MST register for the ALT_SYSMGR instance. */
8216 #define ALT_SYSMGR_SDMMC_L3MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_SDMMC_L3MST_OFST))
8217 /* The address of the ALT_SYSMGR_NAND_BOOTSTRAP register for the ALT_SYSMGR instance. */
8218 #define ALT_SYSMGR_NAND_BOOTSTRAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NAND_BOOTSTRAP_OFST))
8219 /* The address of the ALT_SYSMGR_NAND_L3MST register for the ALT_SYSMGR instance. */
8220 #define ALT_SYSMGR_NAND_L3MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NAND_L3MST_OFST))
8221 /* The address of the ALT_SYSMGR_USB0_L3MST register for the ALT_SYSMGR instance. */
8222 #define ALT_SYSMGR_USB0_L3MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_USB0_L3MST_OFST))
8223 /* The address of the ALT_SYSMGR_USB1_L3MST register for the ALT_SYSMGR instance. */
8224 #define ALT_SYSMGR_USB1_L3MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_USB1_L3MST_OFST))
8225 /* The address of the ALT_SYSMGR_EMAC_GLOB register for the ALT_SYSMGR instance. */
8226 #define ALT_SYSMGR_EMAC_GLOB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_EMAC_GLOB_OFST))
8227 /* The address of the ALT_SYSMGR_EMAC0 register for the ALT_SYSMGR instance. */
8228 #define ALT_SYSMGR_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_EMAC0_OFST))
8229 /* The address of the ALT_SYSMGR_EMAC1 register for the ALT_SYSMGR instance. */
8230 #define ALT_SYSMGR_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_EMAC1_OFST))
8231 /* The address of the ALT_SYSMGR_EMAC2 register for the ALT_SYSMGR instance. */
8232 #define ALT_SYSMGR_EMAC2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_EMAC2_OFST))
8233 /* The address of the ALT_SYSMGR_FPGAINTF_EN_GLOB register for the ALT_SYSMGR instance. */
8234 #define ALT_SYSMGR_FPGAINTF_EN_GLOB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_FPGAINTF_EN_GLOB_OFST))
8235 /* The address of the ALT_SYSMGR_FPGAINTF_EN_0 register for the ALT_SYSMGR instance. */
8236 #define ALT_SYSMGR_FPGAINTF_EN_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_FPGAINTF_EN_0_OFST))
8237 /* The address of the ALT_SYSMGR_FPGAINTF_EN_1 register for the ALT_SYSMGR instance. */
8238 #define ALT_SYSMGR_FPGAINTF_EN_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_FPGAINTF_EN_1_OFST))
8239 /* The address of the ALT_SYSMGR_FPGAINTF_EN_2 register for the ALT_SYSMGR instance. */
8240 #define ALT_SYSMGR_FPGAINTF_EN_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_FPGAINTF_EN_2_OFST))
8241 /* The address of the ALT_SYSMGR_FPGAINTF_EN_3 register for the ALT_SYSMGR instance. */
8242 #define ALT_SYSMGR_FPGAINTF_EN_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_FPGAINTF_EN_3_OFST))
8243 /* The address of the ALT_SYSMGR_NOC_ADDR_REMAP_VALUE register for the ALT_SYSMGR instance. */
8244 #define ALT_SYSMGR_NOC_ADDR_REMAP_VALUE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_ADDR_REMAP_VALUE_OFST))
8245 /* The address of the ALT_SYSMGR_NOC_ADDR_REMAP_SET register for the ALT_SYSMGR instance. */
8246 #define ALT_SYSMGR_NOC_ADDR_REMAP_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_ADDR_REMAP_SET_OFST))
8247 /* The address of the ALT_SYSMGR_NOC_ADDR_REMAP_CLR register for the ALT_SYSMGR instance. */
8248 #define ALT_SYSMGR_NOC_ADDR_REMAP_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_ADDR_REMAP_CLR_OFST))
8249 /* The address of the ALT_SYSMGR_ECC_INTMSK_VALUE register for the ALT_SYSMGR instance. */
8250 #define ALT_SYSMGR_ECC_INTMSK_VALUE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ECC_INTMSK_VALUE_OFST))
8251 /* The address of the ALT_SYSMGR_ECC_INTMSK_SET register for the ALT_SYSMGR instance. */
8252 #define ALT_SYSMGR_ECC_INTMSK_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ECC_INTMSK_SET_OFST))
8253 /* The address of the ALT_SYSMGR_ECC_INTMSK_CLR register for the ALT_SYSMGR instance. */
8254 #define ALT_SYSMGR_ECC_INTMSK_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ECC_INTMSK_CLR_OFST))
8255 /* The address of the ALT_SYSMGR_ECC_INTSTAT_SERR register for the ALT_SYSMGR instance. */
8256 #define ALT_SYSMGR_ECC_INTSTAT_SERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ECC_INTSTAT_SERR_OFST))
8257 /* The address of the ALT_SYSMGR_ECC_INTSTAT_DERR register for the ALT_SYSMGR instance. */
8258 #define ALT_SYSMGR_ECC_INTSTAT_DERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ECC_INTSTAT_DERR_OFST))
8259 /* The address of the ALT_SYSMGR_MPU_STAT_L2_ECC register for the ALT_SYSMGR instance. */
8260 #define ALT_SYSMGR_MPU_STAT_L2_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_MPU_STAT_L2_ECC_OFST))
8261 /* The address of the ALT_SYSMGR_MPU_CLR_L2_ECC register for the ALT_SYSMGR instance. */
8262 #define ALT_SYSMGR_MPU_CLR_L2_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_MPU_CLR_L2_ECC_OFST))
8263 /* The address of the ALT_SYSMGR_MPU_STAT_L1_PARITY register for the ALT_SYSMGR instance. */
8264 #define ALT_SYSMGR_MPU_STAT_L1_PARITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_MPU_STAT_L1_PARITY_OFST))
8265 /* The address of the ALT_SYSMGR_MPU_CLR_L1_PARITY register for the ALT_SYSMGR instance. */
8266 #define ALT_SYSMGR_MPU_CLR_L1_PARITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_MPU_CLR_L1_PARITY_OFST))
8267 /* The address of the ALT_SYSMGR_MPU_SET_L1_PARITY register for the ALT_SYSMGR instance. */
8268 #define ALT_SYSMGR_MPU_SET_L1_PARITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_MPU_SET_L1_PARITY_OFST))
8269 /* The address of the ALT_SYSMGR_NOC_TMO register for the ALT_SYSMGR instance. */
8270 #define ALT_SYSMGR_NOC_TMO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_TMO_OFST))
8271 /* The address of the ALT_SYSMGR_NOC_IDLEREQ_SET register for the ALT_SYSMGR instance. */
8272 #define ALT_SYSMGR_NOC_IDLEREQ_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_IDLEREQ_SET_OFST))
8273 /* The address of the ALT_SYSMGR_NOC_IDLEREQ_CLR register for the ALT_SYSMGR instance. */
8274 #define ALT_SYSMGR_NOC_IDLEREQ_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_IDLEREQ_CLR_OFST))
8275 /* The address of the ALT_SYSMGR_NOC_IDLEREQ_VALUE register for the ALT_SYSMGR instance. */
8276 #define ALT_SYSMGR_NOC_IDLEREQ_VALUE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_IDLEREQ_VALUE_OFST))
8277 /* The address of the ALT_SYSMGR_NOC_IDLEACK register for the ALT_SYSMGR instance. */
8278 #define ALT_SYSMGR_NOC_IDLEACK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_IDLEACK_OFST))
8279 /* The address of the ALT_SYSMGR_NOC_IDLESTAT register for the ALT_SYSMGR instance. */
8280 #define ALT_SYSMGR_NOC_IDLESTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_IDLESTAT_OFST))
8281 /* The address of the ALT_SYSMGR_F2H_CTL register for the ALT_SYSMGR instance. */
8282 #define ALT_SYSMGR_F2H_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_F2H_CTL_OFST))
8283 /* The address of the ALT_SYSMGR_TSMC_TSEL_0 register for the ALT_SYSMGR instance. */
8284 #define ALT_SYSMGR_TSMC_TSEL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_TSMC_TSEL_0_OFST))
8285 /* The address of the ALT_SYSMGR_TSMC_TSEL_1 register for the ALT_SYSMGR instance. */
8286 #define ALT_SYSMGR_TSMC_TSEL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_TSMC_TSEL_1_OFST))
8287 /* The address of the ALT_SYSMGR_TSMC_TSEL_2 register for the ALT_SYSMGR instance. */
8288 #define ALT_SYSMGR_TSMC_TSEL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_TSMC_TSEL_2_OFST))
8289 /* The address of the ALT_SYSMGR_TSMC_TSEL_3 register for the ALT_SYSMGR instance. */
8290 #define ALT_SYSMGR_TSMC_TSEL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_TSMC_TSEL_3_OFST))
8291 /* The base address byte offset for the start of the ALT_SYSMGR component. */
8292 #define ALT_SYSMGR_OFST 0xffd06000
8293 /* The start address of the ALT_SYSMGR component. */
8294 #define ALT_SYSMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SYSMGR_OFST))
8295 /* The lower bound address range of the ALT_SYSMGR component. */
8296 #define ALT_SYSMGR_LB_ADDR ALT_SYSMGR_ADDR
8297 /* The upper bound address range of the ALT_SYSMGR component. */
8298 #define ALT_SYSMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_ADDR) + 0x200) - 1))
8299 
8300 
8301 /*
8302  * Component Instance : i_sys_mgr_rom
8303  *
8304  * Instance i_sys_mgr_rom of component ALT_SYSMGR_ROM.
8305  *
8306  *
8307  */
8308 /* The address of the ALT_SYSMGR_ROM_ROMHW_CTL register for the ALT_SYSMGR_ROM instance. */
8309 #define ALT_SYSMGR_ROM_ROMHW_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMHW_CTL_OFST))
8310 /* The address of the ALT_SYSMGR_ROM_ROMCODE_CTL register for the ALT_SYSMGR_ROM instance. */
8311 #define ALT_SYSMGR_ROM_ROMCODE_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_CTL_OFST))
8312 /* The address of the ALT_SYSMGR_ROM_ROMCODE_QSPI_RST_CMD register for the ALT_SYSMGR_ROM instance. */
8313 #define ALT_SYSMGR_ROM_ROMCODE_QSPI_RST_CMD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_QSPI_RST_CMD_OFST))
8314 /* The address of the ALT_SYSMGR_ROM_ROMCODE_INITSWSTATE register for the ALT_SYSMGR_ROM instance. */
8315 #define ALT_SYSMGR_ROM_ROMCODE_INITSWSTATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_INITSWSTATE_OFST))
8316 /* The address of the ALT_SYSMGR_ROM_ROMCODE_INITSWLASTLD register for the ALT_SYSMGR_ROM instance. */
8317 #define ALT_SYSMGR_ROM_ROMCODE_INITSWLASTLD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_INITSWLASTLD_OFST))
8318 /* The address of the ALT_SYSMGR_ROM_WARMRAM_EN register for the ALT_SYSMGR_ROM instance. */
8319 #define ALT_SYSMGR_ROM_WARMRAM_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_WARMRAM_EN_OFST))
8320 /* The address of the ALT_SYSMGR_ROM_WARMRAM_DATASTART register for the ALT_SYSMGR_ROM instance. */
8321 #define ALT_SYSMGR_ROM_WARMRAM_DATASTART_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_WARMRAM_DATASTART_OFST))
8322 /* The address of the ALT_SYSMGR_ROM_WARMRAM_LEN register for the ALT_SYSMGR_ROM instance. */
8323 #define ALT_SYSMGR_ROM_WARMRAM_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_WARMRAM_LEN_OFST))
8324 /* The address of the ALT_SYSMGR_ROM_WARMRAM_EXECUTION register for the ALT_SYSMGR_ROM instance. */
8325 #define ALT_SYSMGR_ROM_WARMRAM_EXECUTION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_WARMRAM_EXECUTION_OFST))
8326 /* The address of the ALT_SYSMGR_ROM_WARMRAM_CRC register for the ALT_SYSMGR_ROM instance. */
8327 #define ALT_SYSMGR_ROM_WARMRAM_CRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_WARMRAM_CRC_OFST))
8328 /* The address of the ALT_SYSMGR_ROM_ISW_HANDOFF register for the ALT_SYSMGR_ROM instance. */
8329 #define ALT_SYSMGR_ROM_ISW_HANDOFF_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ISW_HANDOFF_OFST))
8330 /* The address of the ALT_SYSMGR_ROM_ROMCODE_BOOTROMSWSTATE register for the ALT_SYSMGR_ROM instance. */
8331 #define ALT_SYSMGR_ROM_ROMCODE_BOOTROMSWSTATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_BOOTROMSWSTATE_OFST))
8332 /* The address of the ALT_SYSMGR_ROM_ROMCODE_STICKYSET_WARMCLR register for the ALT_SYSMGR_ROM instance. */
8333 #define ALT_SYSMGR_ROM_ROMCODE_STICKYSET_WARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_STICKYSET_WARMCLR_OFST))
8334 /* The address of the ALT_SYSMGR_ROM_ROMCODE_STICKYSET_COLDCLR register for the ALT_SYSMGR_ROM instance. */
8335 #define ALT_SYSMGR_ROM_ROMCODE_STICKYSET_COLDCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_STICKYSET_COLDCLR_OFST))
8336 /* The base address byte offset for the start of the ALT_SYSMGR_ROM component. */
8337 #define ALT_SYSMGR_ROM_OFST 0xffd06200
8338 /* The start address of the ALT_SYSMGR_ROM component. */
8339 #define ALT_SYSMGR_ROM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SYSMGR_ROM_OFST))
8340 /* The lower bound address range of the ALT_SYSMGR_ROM component. */
8341 #define ALT_SYSMGR_ROM_LB_ADDR ALT_SYSMGR_ROM_ADDR
8342 /* The upper bound address range of the ALT_SYSMGR_ROM component. */
8343 #define ALT_SYSMGR_ROM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + 0x100) - 1))
8344 
8345 
8346 /*
8347  * Component Instance : i_io48_pin_mux_shared_3v_io_grp
8348  *
8349  * Instance i_io48_pin_mux_shared_3v_io_grp of component ALT_PINMUX_SHARED_3V_IO_GRP.
8350  *
8351  *
8352  */
8353 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q1_1 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8354 #define ALT_PINMUX_SHARED_3V_IO_Q1_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_1_OFST))
8355 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q1_2 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8356 #define ALT_PINMUX_SHARED_3V_IO_Q1_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_2_OFST))
8357 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q1_3 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8358 #define ALT_PINMUX_SHARED_3V_IO_Q1_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_3_OFST))
8359 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q1_4 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8360 #define ALT_PINMUX_SHARED_3V_IO_Q1_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_4_OFST))
8361 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q1_5 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8362 #define ALT_PINMUX_SHARED_3V_IO_Q1_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_5_OFST))
8363 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q1_6 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8364 #define ALT_PINMUX_SHARED_3V_IO_Q1_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_6_OFST))
8365 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q1_7 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8366 #define ALT_PINMUX_SHARED_3V_IO_Q1_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_7_OFST))
8367 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q1_8 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8368 #define ALT_PINMUX_SHARED_3V_IO_Q1_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_8_OFST))
8369 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q1_9 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8370 #define ALT_PINMUX_SHARED_3V_IO_Q1_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_9_OFST))
8371 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q1_10 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8372 #define ALT_PINMUX_SHARED_3V_IO_Q1_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_10_OFST))
8373 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q1_11 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8374 #define ALT_PINMUX_SHARED_3V_IO_Q1_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_11_OFST))
8375 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q1_12 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8376 #define ALT_PINMUX_SHARED_3V_IO_Q1_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_12_OFST))
8377 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q2_1 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8378 #define ALT_PINMUX_SHARED_3V_IO_Q2_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_1_OFST))
8379 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q2_2 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8380 #define ALT_PINMUX_SHARED_3V_IO_Q2_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_2_OFST))
8381 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q2_3 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8382 #define ALT_PINMUX_SHARED_3V_IO_Q2_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_3_OFST))
8383 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q2_4 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8384 #define ALT_PINMUX_SHARED_3V_IO_Q2_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_4_OFST))
8385 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q2_5 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8386 #define ALT_PINMUX_SHARED_3V_IO_Q2_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_5_OFST))
8387 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q2_6 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8388 #define ALT_PINMUX_SHARED_3V_IO_Q2_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_6_OFST))
8389 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q2_7 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8390 #define ALT_PINMUX_SHARED_3V_IO_Q2_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_7_OFST))
8391 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q2_8 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8392 #define ALT_PINMUX_SHARED_3V_IO_Q2_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_8_OFST))
8393 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q2_9 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8394 #define ALT_PINMUX_SHARED_3V_IO_Q2_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_9_OFST))
8395 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q2_10 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8396 #define ALT_PINMUX_SHARED_3V_IO_Q2_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_10_OFST))
8397 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q2_11 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8398 #define ALT_PINMUX_SHARED_3V_IO_Q2_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_11_OFST))
8399 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q2_12 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8400 #define ALT_PINMUX_SHARED_3V_IO_Q2_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_12_OFST))
8401 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q3_1 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8402 #define ALT_PINMUX_SHARED_3V_IO_Q3_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_1_OFST))
8403 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q3_2 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8404 #define ALT_PINMUX_SHARED_3V_IO_Q3_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_2_OFST))
8405 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q3_3 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8406 #define ALT_PINMUX_SHARED_3V_IO_Q3_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_3_OFST))
8407 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q3_4 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8408 #define ALT_PINMUX_SHARED_3V_IO_Q3_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_4_OFST))
8409 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q3_5 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8410 #define ALT_PINMUX_SHARED_3V_IO_Q3_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_5_OFST))
8411 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q3_6 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8412 #define ALT_PINMUX_SHARED_3V_IO_Q3_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_6_OFST))
8413 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q3_7 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8414 #define ALT_PINMUX_SHARED_3V_IO_Q3_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_7_OFST))
8415 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q3_8 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8416 #define ALT_PINMUX_SHARED_3V_IO_Q3_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_8_OFST))
8417 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q3_9 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8418 #define ALT_PINMUX_SHARED_3V_IO_Q3_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_9_OFST))
8419 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q3_10 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8420 #define ALT_PINMUX_SHARED_3V_IO_Q3_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_10_OFST))
8421 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q3_11 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8422 #define ALT_PINMUX_SHARED_3V_IO_Q3_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_11_OFST))
8423 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q3_12 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8424 #define ALT_PINMUX_SHARED_3V_IO_Q3_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_12_OFST))
8425 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q4_1 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8426 #define ALT_PINMUX_SHARED_3V_IO_Q4_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_1_OFST))
8427 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q4_2 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8428 #define ALT_PINMUX_SHARED_3V_IO_Q4_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_2_OFST))
8429 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q4_3 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8430 #define ALT_PINMUX_SHARED_3V_IO_Q4_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_3_OFST))
8431 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q4_4 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8432 #define ALT_PINMUX_SHARED_3V_IO_Q4_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_4_OFST))
8433 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q4_5 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8434 #define ALT_PINMUX_SHARED_3V_IO_Q4_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_5_OFST))
8435 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q4_6 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8436 #define ALT_PINMUX_SHARED_3V_IO_Q4_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_6_OFST))
8437 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q4_7 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8438 #define ALT_PINMUX_SHARED_3V_IO_Q4_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_7_OFST))
8439 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q4_8 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8440 #define ALT_PINMUX_SHARED_3V_IO_Q4_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_8_OFST))
8441 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q4_9 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8442 #define ALT_PINMUX_SHARED_3V_IO_Q4_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_9_OFST))
8443 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q4_10 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8444 #define ALT_PINMUX_SHARED_3V_IO_Q4_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_10_OFST))
8445 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q4_11 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8446 #define ALT_PINMUX_SHARED_3V_IO_Q4_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_11_OFST))
8447 /* The address of the ALT_PINMUX_SHARED_3V_IO_Q4_12 register for the ALT_PINMUX_SHARED_3V_IO_GRP instance. */
8448 #define ALT_PINMUX_SHARED_3V_IO_Q4_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_12_OFST))
8449 /* The base address byte offset for the start of the ALT_PINMUX_SHARED_3V_IO_GRP component. */
8450 #define ALT_PINMUX_SHARED_3V_IO_GRP_OFST 0xffd07000
8451 /* The start address of the ALT_PINMUX_SHARED_3V_IO_GRP component. */
8452 #define ALT_PINMUX_SHARED_3V_IO_GRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_PINMUX_SHARED_3V_IO_GRP_OFST))
8453 /* The lower bound address range of the ALT_PINMUX_SHARED_3V_IO_GRP component. */
8454 #define ALT_PINMUX_SHARED_3V_IO_GRP_LB_ADDR ALT_PINMUX_SHARED_3V_IO_GRP_ADDR
8455 /* The upper bound address range of the ALT_PINMUX_SHARED_3V_IO_GRP component. */
8456 #define ALT_PINMUX_SHARED_3V_IO_GRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + 0x200) - 1))
8457 
8458 
8459 /*
8460  * Component Instance : i_io48_pin_mux_dedicated_io_grp
8461  *
8462  * Instance i_io48_pin_mux_dedicated_io_grp of component ALT_PINMUX_DCTD_IO_GRP.
8463  *
8464  *
8465  */
8466 /* The address of the ALT_PINMUX_DCTD_IO_1 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8467 #define ALT_PINMUX_DCTD_IO_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_1_OFST))
8468 /* The address of the ALT_PINMUX_DCTD_IO_2 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8469 #define ALT_PINMUX_DCTD_IO_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_2_OFST))
8470 /* The address of the ALT_PINMUX_DCTD_IO_3 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8471 #define ALT_PINMUX_DCTD_IO_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_3_OFST))
8472 /* The address of the ALT_PINMUX_DCTD_IO_4 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8473 #define ALT_PINMUX_DCTD_IO_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_4_OFST))
8474 /* The address of the ALT_PINMUX_DCTD_IO_5 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8475 #define ALT_PINMUX_DCTD_IO_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_5_OFST))
8476 /* The address of the ALT_PINMUX_DCTD_IO_6 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8477 #define ALT_PINMUX_DCTD_IO_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_6_OFST))
8478 /* The address of the ALT_PINMUX_DCTD_IO_7 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8479 #define ALT_PINMUX_DCTD_IO_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_7_OFST))
8480 /* The address of the ALT_PINMUX_DCTD_IO_8 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8481 #define ALT_PINMUX_DCTD_IO_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_8_OFST))
8482 /* The address of the ALT_PINMUX_DCTD_IO_9 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8483 #define ALT_PINMUX_DCTD_IO_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_9_OFST))
8484 /* The address of the ALT_PINMUX_DCTD_IO_10 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8485 #define ALT_PINMUX_DCTD_IO_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_10_OFST))
8486 /* The address of the ALT_PINMUX_DCTD_IO_11 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8487 #define ALT_PINMUX_DCTD_IO_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_11_OFST))
8488 /* The address of the ALT_PINMUX_DCTD_IO_12 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8489 #define ALT_PINMUX_DCTD_IO_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_12_OFST))
8490 /* The address of the ALT_PINMUX_DCTD_IO_13 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8491 #define ALT_PINMUX_DCTD_IO_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_13_OFST))
8492 /* The address of the ALT_PINMUX_DCTD_IO_14 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8493 #define ALT_PINMUX_DCTD_IO_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_14_OFST))
8494 /* The address of the ALT_PINMUX_DCTD_IO_15 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8495 #define ALT_PINMUX_DCTD_IO_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_15_OFST))
8496 /* The address of the ALT_PINMUX_DCTD_IO_16 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8497 #define ALT_PINMUX_DCTD_IO_16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_16_OFST))
8498 /* The address of the ALT_PINMUX_DCTD_IO_17 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8499 #define ALT_PINMUX_DCTD_IO_17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_17_OFST))
8500 /* The address of the ALT_PINMUX_DCTD_IO_CFG_BANK register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8501 #define ALT_PINMUX_DCTD_IO_CFG_BANK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_BANK_OFST))
8502 /* The address of the ALT_PINMUX_DCTD_IO_CFG_1 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8503 #define ALT_PINMUX_DCTD_IO_CFG_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_1_OFST))
8504 /* The address of the ALT_PINMUX_DCTD_IO_CFG_2 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8505 #define ALT_PINMUX_DCTD_IO_CFG_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_2_OFST))
8506 /* The address of the ALT_PINMUX_DCTD_IO_CFG_3 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8507 #define ALT_PINMUX_DCTD_IO_CFG_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_3_OFST))
8508 /* The address of the ALT_PINMUX_DCTD_IO_CFG_4 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8509 #define ALT_PINMUX_DCTD_IO_CFG_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_4_OFST))
8510 /* The address of the ALT_PINMUX_DCTD_IO_CFG_5 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8511 #define ALT_PINMUX_DCTD_IO_CFG_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_5_OFST))
8512 /* The address of the ALT_PINMUX_DCTD_IO_CFG_6 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8513 #define ALT_PINMUX_DCTD_IO_CFG_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_6_OFST))
8514 /* The address of the ALT_PINMUX_DCTD_IO_CFG_7 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8515 #define ALT_PINMUX_DCTD_IO_CFG_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_7_OFST))
8516 /* The address of the ALT_PINMUX_DCTD_IO_CFG_8 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8517 #define ALT_PINMUX_DCTD_IO_CFG_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_8_OFST))
8518 /* The address of the ALT_PINMUX_DCTD_IO_CFG_9 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8519 #define ALT_PINMUX_DCTD_IO_CFG_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_9_OFST))
8520 /* The address of the ALT_PINMUX_DCTD_IO_CFG_10 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8521 #define ALT_PINMUX_DCTD_IO_CFG_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_10_OFST))
8522 /* The address of the ALT_PINMUX_DCTD_IO_CFG_11 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8523 #define ALT_PINMUX_DCTD_IO_CFG_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_11_OFST))
8524 /* The address of the ALT_PINMUX_DCTD_IO_CFG_12 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8525 #define ALT_PINMUX_DCTD_IO_CFG_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_12_OFST))
8526 /* The address of the ALT_PINMUX_DCTD_IO_CFG_13 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8527 #define ALT_PINMUX_DCTD_IO_CFG_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_13_OFST))
8528 /* The address of the ALT_PINMUX_DCTD_IO_CFG_14 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8529 #define ALT_PINMUX_DCTD_IO_CFG_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_14_OFST))
8530 /* The address of the ALT_PINMUX_DCTD_IO_CFG_15 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8531 #define ALT_PINMUX_DCTD_IO_CFG_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_15_OFST))
8532 /* The address of the ALT_PINMUX_DCTD_IO_CFG_16 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8533 #define ALT_PINMUX_DCTD_IO_CFG_16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_16_OFST))
8534 /* The address of the ALT_PINMUX_DCTD_IO_CFG_17 register for the ALT_PINMUX_DCTD_IO_GRP instance. */
8535 #define ALT_PINMUX_DCTD_IO_CFG_17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_17_OFST))
8536 /* The base address byte offset for the start of the ALT_PINMUX_DCTD_IO_GRP component. */
8537 #define ALT_PINMUX_DCTD_IO_GRP_OFST 0xffd07200
8538 /* The start address of the ALT_PINMUX_DCTD_IO_GRP component. */
8539 #define ALT_PINMUX_DCTD_IO_GRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_PINMUX_DCTD_IO_GRP_OFST))
8540 /* The lower bound address range of the ALT_PINMUX_DCTD_IO_GRP component. */
8541 #define ALT_PINMUX_DCTD_IO_GRP_LB_ADDR ALT_PINMUX_DCTD_IO_GRP_ADDR
8542 /* The upper bound address range of the ALT_PINMUX_DCTD_IO_GRP component. */
8543 #define ALT_PINMUX_DCTD_IO_GRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + 0x200) - 1))
8544 
8545 
8546 /*
8547  * Component Instance : i_io48_pin_mux_fpga_interface_grp
8548  *
8549  * Instance i_io48_pin_mux_fpga_interface_grp of component ALT_PINMUX_FPGA_INTERFACE_GRP.
8550  *
8551  *
8552  */
8553 /* The address of the ALT_PINMUX_FPGA_EMAC0_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8554 #define ALT_PINMUX_FPGA_EMAC0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_EMAC0_USEFPGA_OFST))
8555 /* The address of the ALT_PINMUX_FPGA_EMAC1_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8556 #define ALT_PINMUX_FPGA_EMAC1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_EMAC1_USEFPGA_OFST))
8557 /* The address of the ALT_PINMUX_FPGA_EMAC2_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8558 #define ALT_PINMUX_FPGA_EMAC2_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_EMAC2_USEFPGA_OFST))
8559 /* The address of the ALT_PINMUX_FPGA_I2C0_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8560 #define ALT_PINMUX_FPGA_I2C0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_I2C0_USEFPGA_OFST))
8561 /* The address of the ALT_PINMUX_FPGA_I2C1_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8562 #define ALT_PINMUX_FPGA_I2C1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_I2C1_USEFPGA_OFST))
8563 /* The address of the ALT_PINMUX_FPGA_I2C_EMAC0_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8564 #define ALT_PINMUX_FPGA_I2C_EMAC0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_I2C_EMAC0_USEFPGA_OFST))
8565 /* The address of the ALT_PINMUX_FPGA_I2C_EMAC1_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8566 #define ALT_PINMUX_FPGA_I2C_EMAC1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_I2C_EMAC1_USEFPGA_OFST))
8567 /* The address of the ALT_PINMUX_FPGA_I2C_EMAC2_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8568 #define ALT_PINMUX_FPGA_I2C_EMAC2_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_I2C_EMAC2_USEFPGA_OFST))
8569 /* The address of the ALT_PINMUX_FPGA_NAND_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8570 #define ALT_PINMUX_FPGA_NAND_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_NAND_USEFPGA_OFST))
8571 /* The address of the ALT_PINMUX_FPGA_QSPI_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8572 #define ALT_PINMUX_FPGA_QSPI_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_QSPI_USEFPGA_OFST))
8573 /* The address of the ALT_PINMUX_FPGA_SDMMC_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8574 #define ALT_PINMUX_FPGA_SDMMC_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_SDMMC_USEFPGA_OFST))
8575 /* The address of the ALT_PINMUX_FPGA_SPIM0_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8576 #define ALT_PINMUX_FPGA_SPIM0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_SPIM0_USEFPGA_OFST))
8577 /* The address of the ALT_PINMUX_FPGA_SPIM1_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8578 #define ALT_PINMUX_FPGA_SPIM1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_SPIM1_USEFPGA_OFST))
8579 /* The address of the ALT_PINMUX_FPGA_SPIS0_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8580 #define ALT_PINMUX_FPGA_SPIS0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_SPIS0_USEFPGA_OFST))
8581 /* The address of the ALT_PINMUX_FPGA_SPIS1_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8582 #define ALT_PINMUX_FPGA_SPIS1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_SPIS1_USEFPGA_OFST))
8583 /* The address of the ALT_PINMUX_FPGA_UART0_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8584 #define ALT_PINMUX_FPGA_UART0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_UART0_USEFPGA_OFST))
8585 /* The address of the ALT_PINMUX_FPGA_UART1_USEFPGA register for the ALT_PINMUX_FPGA_INTERFACE_GRP instance. */
8586 #define ALT_PINMUX_FPGA_UART1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_UART1_USEFPGA_OFST))
8587 /* The base address byte offset for the start of the ALT_PINMUX_FPGA_INTERFACE_GRP component. */
8588 #define ALT_PINMUX_FPGA_INTERFACE_GRP_OFST 0xffd07400
8589 /* The start address of the ALT_PINMUX_FPGA_INTERFACE_GRP component. */
8590 #define ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_PINMUX_FPGA_INTERFACE_GRP_OFST))
8591 /* The lower bound address range of the ALT_PINMUX_FPGA_INTERFACE_GRP component. */
8592 #define ALT_PINMUX_FPGA_INTERFACE_GRP_LB_ADDR ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR
8593 /* The upper bound address range of the ALT_PINMUX_FPGA_INTERFACE_GRP component. */
8594 #define ALT_PINMUX_FPGA_INTERFACE_GRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + 0x100) - 1))
8595 
8596 
8597 /*
8598  * Component Instance : noc_l4_priv_l4_priv_filter
8599  *
8600  * Instance noc_l4_priv_l4_priv_filter of component ALT_NOC_L4_PRIV_FLT.
8601  *
8602  *
8603  */
8604 /* The address of the ALT_NOC_L4_PRIV_FLT_L4_PRIV register for the ALT_NOC_L4_PRIV_FLT instance. */
8605 #define ALT_NOC_L4_PRIV_FLT_L4_PRIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_L4_PRIV_FLT_ADDR) + ALT_NOC_L4_PRIV_FLT_L4_PRIV_OFST))
8606 /* The address of the ALT_NOC_L4_PRIV_FLT_L4_PRIV_SET register for the ALT_NOC_L4_PRIV_FLT instance. */
8607 #define ALT_NOC_L4_PRIV_FLT_L4_PRIV_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_L4_PRIV_FLT_ADDR) + ALT_NOC_L4_PRIV_FLT_L4_PRIV_SET_OFST))
8608 /* The address of the ALT_NOC_L4_PRIV_FLT_L4_PRIV_CLR register for the ALT_NOC_L4_PRIV_FLT instance. */
8609 #define ALT_NOC_L4_PRIV_FLT_L4_PRIV_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_L4_PRIV_FLT_ADDR) + ALT_NOC_L4_PRIV_FLT_L4_PRIV_CLR_OFST))
8610 /* The base address byte offset for the start of the ALT_NOC_L4_PRIV_FLT component. */
8611 #define ALT_NOC_L4_PRIV_FLT_OFST 0xffd11000
8612 /* The start address of the ALT_NOC_L4_PRIV_FLT component. */
8613 #define ALT_NOC_L4_PRIV_FLT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_L4_PRIV_FLT_OFST))
8614 /* The lower bound address range of the ALT_NOC_L4_PRIV_FLT component. */
8615 #define ALT_NOC_L4_PRIV_FLT_LB_ADDR ALT_NOC_L4_PRIV_FLT_ADDR
8616 /* The upper bound address range of the ALT_NOC_L4_PRIV_FLT component. */
8617 #define ALT_NOC_L4_PRIV_FLT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_L4_PRIV_FLT_ADDR) + 0x100) - 1))
8618 
8619 
8620 /*
8621  * Component Instance : i_noc_mpu_m0_MPU_M1toDDRResp_main_RateAdapter
8622  *
8623  * Instance i_noc_mpu_m0_MPU_M1toDDRResp_main_RateAdapter of component ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE.
8624  *
8625  *
8626  */
8627 /* The address of the ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_COREID register for the ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE instance. */
8628 #define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_COREID_OFST))
8629 /* The address of the ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_REVID register for the ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE instance. */
8630 #define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_REVID_OFST))
8631 /* The address of the ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_RATE register for the ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE instance. */
8632 #define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_RATE_OFST))
8633 /* The address of the ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_BYPASS register for the ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE instance. */
8634 #define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_BYPASS_OFST))
8635 /* The base address byte offset for the start of the ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE component. */
8636 #define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_OFST 0xffd11100
8637 /* The start address of the ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE component. */
8638 #define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_OFST))
8639 /* The lower bound address range of the ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE component. */
8640 #define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_LB_ADDR ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR
8641 /* The upper bound address range of the ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE component. */
8642 #define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR) + 0x80) - 1))
8643 
8644 
8645 /*
8646  * Component Instance : i_noc_mpu_m0_MPU_M0_rate_adResp_main_RateAdapter
8647  *
8648  * Instance i_noc_mpu_m0_MPU_M0_rate_adResp_main_RateAdapter of component ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE.
8649  *
8650  *
8651  */
8652 /* The address of the ALT_NOC_MPU_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_COREID register for the ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE instance. */
8653 #define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_COREID_ADDR ALT_NOC_MPU_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_COREID_ADDR(ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR)
8654 /* The address of the ALT_NOC_MPU_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_REVID register for the ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE instance. */
8655 #define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_REVID_ADDR ALT_NOC_MPU_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_REVID_ADDR(ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR)
8656 /* The address of the ALT_NOC_MPU_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_RATE register for the ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE instance. */
8657 #define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_RATE_ADDR ALT_NOC_MPU_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_RATE_ADDR(ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR)
8658 /* The address of the ALT_NOC_MPU_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_BYPASS register for the ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE instance. */
8659 #define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_BYPASS_ADDR ALT_NOC_MPU_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_BYPASS_ADDR(ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR)
8660 /* The base address byte offset for the start of the ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE component. */
8661 #define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_OFST 0xffd11200
8662 /* The start address of the ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE component. */
8663 #define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_OFST))
8664 /* The lower bound address range of the ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE component. */
8665 #define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_LB_ADDR ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR
8666 /* The upper bound address range of the ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE component. */
8667 #define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR) + 0x80) - 1))
8668 
8669 
8670 /*
8671  * Component Instance : i_noc_mpu_m0_L4_MP_rate_ad_main_RateAdapter
8672  *
8673  * Instance i_noc_mpu_m0_L4_MP_rate_ad_main_RateAdapter of component ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE.
8674  *
8675  *
8676  */
8677 /* The address of the ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_COREID register for the ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE instance. */
8678 #define ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_COREID_OFST))
8679 /* The address of the ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_REVID register for the ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE instance. */
8680 #define ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_REVID_OFST))
8681 /* The address of the ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_RATE register for the ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE instance. */
8682 #define ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_RATE_OFST))
8683 /* The address of the ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_BYPASS register for the ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE instance. */
8684 #define ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_BYPASS_OFST))
8685 /* The base address byte offset for the start of the ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE component. */
8686 #define ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_OFST 0xffd11300
8687 /* The start address of the ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE component. */
8688 #define ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_OFST))
8689 /* The lower bound address range of the ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE component. */
8690 #define ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_LB_ADDR ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR
8691 /* The upper bound address range of the ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE component. */
8692 #define ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR) + 0x80) - 1))
8693 
8694 
8695 /*
8696  * Component Instance : i_noc_mpu_m0_fpga2soc_rate_ad_main_RateAdapter
8697  *
8698  * Instance i_noc_mpu_m0_fpga2soc_rate_ad_main_RateAdapter of component ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE.
8699  *
8700  *
8701  */
8702 /* The address of the ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_COREID register for the ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE instance. */
8703 #define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_COREID_OFST))
8704 /* The address of the ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_REVID register for the ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE instance. */
8705 #define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_REVID_OFST))
8706 /* The address of the ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_RATE register for the ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE instance. */
8707 #define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_RATE_OFST))
8708 /* The address of the ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_BYPASS register for the ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE instance. */
8709 #define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_BYPASS_OFST))
8710 /* The base address byte offset for the start of the ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE component. */
8711 #define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_OFST 0xffd11400
8712 /* The start address of the ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE component. */
8713 #define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_OFST))
8714 /* The lower bound address range of the ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE component. */
8715 #define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_LB_ADDR ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR
8716 /* The upper bound address range of the ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE component. */
8717 #define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR) + 0x80) - 1))
8718 
8719 
8720 /*
8721  * Component Instance : i_noc_mpu_m0_L3Tosoc2fpgaResp_main_RateAdapter
8722  *
8723  * Instance i_noc_mpu_m0_L3Tosoc2fpgaResp_main_RateAdapter of component ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE.
8724  *
8725  *
8726  */
8727 /* The address of the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_COREID register for the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE instance. */
8728 #define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_COREID_OFST))
8729 /* The address of the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_REVID register for the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE instance. */
8730 #define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_REVID_OFST))
8731 /* The address of the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_RATE register for the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE instance. */
8732 #define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_RATE_OFST))
8733 /* The address of the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS register for the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE instance. */
8734 #define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_OFST))
8735 /* The base address byte offset for the start of the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE component. */
8736 #define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_OFST 0xffd11500
8737 /* The start address of the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE component. */
8738 #define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_OFST))
8739 /* The lower bound address range of the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE component. */
8740 #define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_LB_ADDR ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR
8741 /* The upper bound address range of the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE component. */
8742 #define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR) + 0x80) - 1))
8743 
8744 
8745 /*
8746  * Component Instance : i_noc_mpu_m0_acp_rate_ad_main_RateAdapter
8747  *
8748  * Instance i_noc_mpu_m0_acp_rate_ad_main_RateAdapter of component ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE.
8749  *
8750  *
8751  */
8752 /* The address of the ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_COREID register for the ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE instance. */
8753 #define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_COREID_OFST))
8754 /* The address of the ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_REVID register for the ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE instance. */
8755 #define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_REVID_OFST))
8756 /* The address of the ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_RATE register for the ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE instance. */
8757 #define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_RATE_OFST))
8758 /* The address of the ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_BYPASS register for the ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE instance. */
8759 #define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_BYPASS_OFST))
8760 /* The base address byte offset for the start of the ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE component. */
8761 #define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_OFST 0xffd11600
8762 /* The start address of the ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE component. */
8763 #define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_OFST))
8764 /* The lower bound address range of the ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE component. */
8765 #define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_LB_ADDR ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR
8766 /* The upper bound address range of the ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE component. */
8767 #define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR) + 0x80) - 1))
8768 
8769 
8770 /*
8771  * Component Instance : i_noc_mpu_m0_ddr_T_main_Probe
8772  *
8773  * Instance i_noc_mpu_m0_ddr_T_main_Probe of component ALT_NOC_MPU_DDR_T_PRB.
8774  *
8775  *
8776  */
8777 /* The address of the ALT_NOC_MPU_DDR_T_PRB_COREID register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8778 #define ALT_NOC_MPU_DDR_T_PRB_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_COREID_OFST))
8779 /* The address of the ALT_NOC_MPU_DDR_T_PRB_REVID register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8780 #define ALT_NOC_MPU_DDR_T_PRB_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_REVID_OFST))
8781 /* The address of the ALT_NOC_MPU_DDR_T_PRB_MAINCTL register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8782 #define ALT_NOC_MPU_DDR_T_PRB_MAINCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_MAINCTL_OFST))
8783 /* The address of the ALT_NOC_MPU_DDR_T_PRB_CFGCTL register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8784 #define ALT_NOC_MPU_DDR_T_PRB_CFGCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CFGCTL_OFST))
8785 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTLUT register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8786 #define ALT_NOC_MPU_DDR_T_PRB_FLTLUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTLUT_OFST))
8787 /* The address of the ALT_NOC_MPU_DDR_T_PRB_TRACEALARMEN register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8788 #define ALT_NOC_MPU_DDR_T_PRB_TRACEALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_TRACEALARMEN_OFST))
8789 /* The address of the ALT_NOC_MPU_DDR_T_PRB_TRACEALARMSTAT register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8790 #define ALT_NOC_MPU_DDR_T_PRB_TRACEALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_TRACEALARMSTAT_OFST))
8791 /* The address of the ALT_NOC_MPU_DDR_T_PRB_TRACEALARMCLR register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8792 #define ALT_NOC_MPU_DDR_T_PRB_TRACEALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_TRACEALARMCLR_OFST))
8793 /* The address of the ALT_NOC_MPU_DDR_T_PRB_STATPERIOD register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8794 #define ALT_NOC_MPU_DDR_T_PRB_STATPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATPERIOD_OFST))
8795 /* The address of the ALT_NOC_MPU_DDR_T_PRB_STATGO register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8796 #define ALT_NOC_MPU_DDR_T_PRB_STATGO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATGO_OFST))
8797 /* The address of the ALT_NOC_MPU_DDR_T_PRB_STATALARMMIN register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8798 #define ALT_NOC_MPU_DDR_T_PRB_STATALARMMIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATALARMMIN_OFST))
8799 /* The address of the ALT_NOC_MPU_DDR_T_PRB_STATALARMMAX register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8800 #define ALT_NOC_MPU_DDR_T_PRB_STATALARMMAX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATALARMMAX_OFST))
8801 /* The address of the ALT_NOC_MPU_DDR_T_PRB_STATALARMSTAT register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8802 #define ALT_NOC_MPU_DDR_T_PRB_STATALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATALARMSTAT_OFST))
8803 /* The address of the ALT_NOC_MPU_DDR_T_PRB_STATALARMCLR register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8804 #define ALT_NOC_MPU_DDR_T_PRB_STATALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATALARMCLR_OFST))
8805 /* The address of the ALT_NOC_MPU_DDR_T_PRB_STATALARMEN register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8806 #define ALT_NOC_MPU_DDR_T_PRB_STATALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATALARMEN_OFST))
8807 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ROUTEIDBASE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8808 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ROUTEIDBASE_OFST))
8809 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ROUTEIDMSK register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8810 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ROUTEIDMSK_OFST))
8811 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ADDRBASE_LOW register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8812 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ADDRBASE_LOW_OFST))
8813 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_0_WINDOWSIZE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8814 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_WINDOWSIZE_OFST))
8815 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_0_SECURITYBASE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8816 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_SECURITYBASE_OFST))
8817 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_0_SECURITYMSK register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8818 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_SECURITYMSK_OFST))
8819 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_0_OPCODE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8820 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_OPCODE_OFST))
8821 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_0_STAT register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8822 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_STAT_OFST))
8823 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_0_LEN register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8824 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_LEN_OFST))
8825 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_0_URGENCY register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8826 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_URGENCY_OFST))
8827 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ROUTEIDBASE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8828 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ROUTEIDBASE_OFST))
8829 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ROUTEIDMSK register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8830 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ROUTEIDMSK_OFST))
8831 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ADDRBASE_LOW register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8832 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ADDRBASE_LOW_OFST))
8833 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_1_WINDOWSIZE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8834 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_WINDOWSIZE_OFST))
8835 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_1_SECURITYBASE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8836 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_SECURITYBASE_OFST))
8837 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_1_SECURITYMSK register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8838 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_SECURITYMSK_OFST))
8839 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_1_OPCODE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8840 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_OPCODE_OFST))
8841 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_1_STAT register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8842 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_STAT_OFST))
8843 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_1_LEN register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8844 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_LEN_OFST))
8845 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_1_URGENCY register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8846 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_URGENCY_OFST))
8847 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ROUTEIDBASE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8848 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ROUTEIDBASE_OFST))
8849 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ROUTEIDMSK register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8850 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ROUTEIDMSK_OFST))
8851 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ADDRBASE_LOW register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8852 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ADDRBASE_LOW_OFST))
8853 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_2_WINDOWSIZE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8854 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_WINDOWSIZE_OFST))
8855 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_2_SECURITYBASE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8856 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_SECURITYBASE_OFST))
8857 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_2_SECURITYMSK register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8858 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_SECURITYMSK_OFST))
8859 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_2_OPCODE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8860 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_OPCODE_OFST))
8861 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_2_STAT register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8862 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_STAT_OFST))
8863 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_2_LEN register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8864 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_LEN_OFST))
8865 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_2_URGENCY register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8866 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_URGENCY_OFST))
8867 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ROUTEIDBASE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8868 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ROUTEIDBASE_OFST))
8869 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ROUTEIDMSK register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8870 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ROUTEIDMSK_OFST))
8871 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ADDRBASE_LOW register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8872 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ADDRBASE_LOW_OFST))
8873 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8874 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_OFST))
8875 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_SECURITYBASE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8876 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_SECURITYBASE_OFST))
8877 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_SECURITYMSK register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8878 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_SECURITYMSK_OFST))
8879 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_OPCODE register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8880 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_OPCODE_OFST))
8881 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_STAT register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8882 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_STAT_OFST))
8883 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_LEN register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8884 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_LEN_OFST))
8885 /* The address of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_URGENCY register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8886 #define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_URGENCY_OFST))
8887 /* The address of the ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_SRC register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8888 #define ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_SRC_OFST))
8889 /* The address of the ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_ALARMMOD register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8890 #define ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_ALARMMOD_OFST))
8891 /* The address of the ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_VAL register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8892 #define ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_VAL_OFST))
8893 /* The address of the ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_SRC register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8894 #define ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_SRC_OFST))
8895 /* The address of the ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_ALARMMOD register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8896 #define ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_ALARMMOD_OFST))
8897 /* The address of the ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_VAL register for the ALT_NOC_MPU_DDR_T_PRB instance. */
8898 #define ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_VAL_OFST))
8899 /* The base address byte offset for the start of the ALT_NOC_MPU_DDR_T_PRB component. */
8900 #define ALT_NOC_MPU_DDR_T_PRB_OFST 0xffd12000
8901 /* The start address of the ALT_NOC_MPU_DDR_T_PRB component. */
8902 #define ALT_NOC_MPU_DDR_T_PRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_DDR_T_PRB_OFST))
8903 /* The lower bound address range of the ALT_NOC_MPU_DDR_T_PRB component. */
8904 #define ALT_NOC_MPU_DDR_T_PRB_LB_ADDR ALT_NOC_MPU_DDR_T_PRB_ADDR
8905 /* The upper bound address range of the ALT_NOC_MPU_DDR_T_PRB component. */
8906 #define ALT_NOC_MPU_DDR_T_PRB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + 0x400) - 1))
8907 
8908 
8909 /*
8910  * Component Instance : i_noc_mpu_m0_ddr_T_main_Scheduler
8911  *
8912  * Instance i_noc_mpu_m0_ddr_T_main_Scheduler of component ALT_NOC_MPU_DDR_T_SCHED.
8913  *
8914  *
8915  */
8916 /* The address of the ALT_NOC_MPU_DDR_T_SCHED_COREID register for the ALT_NOC_MPU_DDR_T_SCHED instance. */
8917 #define ALT_NOC_MPU_DDR_T_SCHED_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_COREID_OFST))
8918 /* The address of the ALT_NOC_MPU_DDR_T_SCHED_REVID register for the ALT_NOC_MPU_DDR_T_SCHED instance. */
8919 #define ALT_NOC_MPU_DDR_T_SCHED_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_REVID_OFST))
8920 /* The address of the ALT_NOC_MPU_DDR_T_SCHED_DDRCONF register for the ALT_NOC_MPU_DDR_T_SCHED instance. */
8921 #define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_OFST))
8922 /* The address of the ALT_NOC_MPU_DDR_T_SCHED_DDRTIMING register for the ALT_NOC_MPU_DDR_T_SCHED instance. */
8923 #define ALT_NOC_MPU_DDR_T_SCHED_DDRTIMING_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_DDRTIMING_OFST))
8924 /* The address of the ALT_NOC_MPU_DDR_T_SCHED_DDRMOD register for the ALT_NOC_MPU_DDR_T_SCHED instance. */
8925 #define ALT_NOC_MPU_DDR_T_SCHED_DDRMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_DDRMOD_OFST))
8926 /* The address of the ALT_NOC_MPU_DDR_T_SCHED_RDLATENCY register for the ALT_NOC_MPU_DDR_T_SCHED instance. */
8927 #define ALT_NOC_MPU_DDR_T_SCHED_RDLATENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_RDLATENCY_OFST))
8928 /* The address of the ALT_NOC_MPU_DDR_T_SCHED_ACTIVATE register for the ALT_NOC_MPU_DDR_T_SCHED instance. */
8929 #define ALT_NOC_MPU_DDR_T_SCHED_ACTIVATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_ACTIVATE_OFST))
8930 /* The address of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV register for the ALT_NOC_MPU_DDR_T_SCHED instance. */
8931 #define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_OFST))
8932 /* The base address byte offset for the start of the ALT_NOC_MPU_DDR_T_SCHED component. */
8933 #define ALT_NOC_MPU_DDR_T_SCHED_OFST 0xffd12400
8934 /* The start address of the ALT_NOC_MPU_DDR_T_SCHED component. */
8935 #define ALT_NOC_MPU_DDR_T_SCHED_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_OFST))
8936 /* The lower bound address range of the ALT_NOC_MPU_DDR_T_SCHED component. */
8937 #define ALT_NOC_MPU_DDR_T_SCHED_LB_ADDR ALT_NOC_MPU_DDR_T_SCHED_ADDR
8938 /* The upper bound address range of the ALT_NOC_MPU_DDR_T_SCHED component. */
8939 #define ALT_NOC_MPU_DDR_T_SCHED_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + 0x80) - 1))
8940 
8941 
8942 /*
8943  * Component Instance : noc_fw_l4_per_l4_per_scr
8944  *
8945  * Instance noc_fw_l4_per_l4_per_scr of component ALT_NOC_FW_L4_PER_SCR.
8946  *
8947  *
8948  */
8949 /* The address of the ALT_NOC_FW_L4_PER_SCR_NAND_REG register for the ALT_NOC_FW_L4_PER_SCR instance. */
8950 #define ALT_NOC_FW_L4_PER_SCR_NAND_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_NAND_REG_OFST))
8951 /* The address of the ALT_NOC_FW_L4_PER_SCR_NAND_DATA register for the ALT_NOC_FW_L4_PER_SCR instance. */
8952 #define ALT_NOC_FW_L4_PER_SCR_NAND_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_NAND_DATA_OFST))
8953 /* The address of the ALT_NOC_FW_L4_PER_SCR_QSPI_DATA register for the ALT_NOC_FW_L4_PER_SCR instance. */
8954 #define ALT_NOC_FW_L4_PER_SCR_QSPI_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_QSPI_DATA_OFST))
8955 /* The address of the ALT_NOC_FW_L4_PER_SCR_USB0_REG register for the ALT_NOC_FW_L4_PER_SCR instance. */
8956 #define ALT_NOC_FW_L4_PER_SCR_USB0_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_USB0_REG_OFST))
8957 /* The address of the ALT_NOC_FW_L4_PER_SCR_USB1_REG register for the ALT_NOC_FW_L4_PER_SCR instance. */
8958 #define ALT_NOC_FW_L4_PER_SCR_USB1_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_USB1_REG_OFST))
8959 /* The address of the ALT_NOC_FW_L4_PER_SCR_DMA_NONSECURE register for the ALT_NOC_FW_L4_PER_SCR instance. */
8960 #define ALT_NOC_FW_L4_PER_SCR_DMA_NONSECURE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_DMA_NONSECURE_OFST))
8961 /* The address of the ALT_NOC_FW_L4_PER_SCR_DMA_SECURE register for the ALT_NOC_FW_L4_PER_SCR instance. */
8962 #define ALT_NOC_FW_L4_PER_SCR_DMA_SECURE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_DMA_SECURE_OFST))
8963 /* The address of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8964 #define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SPI_MST0_OFST))
8965 /* The address of the ALT_NOC_FW_L4_PER_SCR_SPI_MST1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8966 #define ALT_NOC_FW_L4_PER_SCR_SPI_MST1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SPI_MST1_OFST))
8967 /* The address of the ALT_NOC_FW_L4_PER_SCR_SPI_SLV0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8968 #define ALT_NOC_FW_L4_PER_SCR_SPI_SLV0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SPI_SLV0_OFST))
8969 /* The address of the ALT_NOC_FW_L4_PER_SCR_SPI_SLV1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8970 #define ALT_NOC_FW_L4_PER_SCR_SPI_SLV1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SPI_SLV1_OFST))
8971 /* The address of the ALT_NOC_FW_L4_PER_SCR_EMAC0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8972 #define ALT_NOC_FW_L4_PER_SCR_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_EMAC0_OFST))
8973 /* The address of the ALT_NOC_FW_L4_PER_SCR_EMAC1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8974 #define ALT_NOC_FW_L4_PER_SCR_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_EMAC1_OFST))
8975 /* The address of the ALT_NOC_FW_L4_PER_SCR_EMAC2 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8976 #define ALT_NOC_FW_L4_PER_SCR_EMAC2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_EMAC2_OFST))
8977 /* The address of the ALT_NOC_FW_L4_PER_SCR_EMAC3 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8978 #define ALT_NOC_FW_L4_PER_SCR_EMAC3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_EMAC3_OFST))
8979 /* The address of the ALT_NOC_FW_L4_PER_SCR_QSPI register for the ALT_NOC_FW_L4_PER_SCR instance. */
8980 #define ALT_NOC_FW_L4_PER_SCR_QSPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_QSPI_OFST))
8981 /* The address of the ALT_NOC_FW_L4_PER_SCR_SDMMC register for the ALT_NOC_FW_L4_PER_SCR instance. */
8982 #define ALT_NOC_FW_L4_PER_SCR_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SDMMC_OFST))
8983 /* The address of the ALT_NOC_FW_L4_PER_SCR_GPIO0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8984 #define ALT_NOC_FW_L4_PER_SCR_GPIO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_GPIO0_OFST))
8985 /* The address of the ALT_NOC_FW_L4_PER_SCR_GPIO1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8986 #define ALT_NOC_FW_L4_PER_SCR_GPIO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_GPIO1_OFST))
8987 /* The address of the ALT_NOC_FW_L4_PER_SCR_GPIO2 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8988 #define ALT_NOC_FW_L4_PER_SCR_GPIO2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_GPIO2_OFST))
8989 /* The address of the ALT_NOC_FW_L4_PER_SCR_I2C0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8990 #define ALT_NOC_FW_L4_PER_SCR_I2C0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C0_OFST))
8991 /* The address of the ALT_NOC_FW_L4_PER_SCR_I2C1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8992 #define ALT_NOC_FW_L4_PER_SCR_I2C1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C1_OFST))
8993 /* The address of the ALT_NOC_FW_L4_PER_SCR_I2C2 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8994 #define ALT_NOC_FW_L4_PER_SCR_I2C2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C2_OFST))
8995 /* The address of the ALT_NOC_FW_L4_PER_SCR_I2C3 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8996 #define ALT_NOC_FW_L4_PER_SCR_I2C3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C3_OFST))
8997 /* The address of the ALT_NOC_FW_L4_PER_SCR_I2C4 register for the ALT_NOC_FW_L4_PER_SCR instance. */
8998 #define ALT_NOC_FW_L4_PER_SCR_I2C4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C4_OFST))
8999 /* The address of the ALT_NOC_FW_L4_PER_SCR_SP_TMR0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
9000 #define ALT_NOC_FW_L4_PER_SCR_SP_TMR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SP_TMR0_OFST))
9001 /* The address of the ALT_NOC_FW_L4_PER_SCR_SP_TMR1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
9002 #define ALT_NOC_FW_L4_PER_SCR_SP_TMR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SP_TMR1_OFST))
9003 /* The address of the ALT_NOC_FW_L4_PER_SCR_UART0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
9004 #define ALT_NOC_FW_L4_PER_SCR_UART0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_UART0_OFST))
9005 /* The address of the ALT_NOC_FW_L4_PER_SCR_UART1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
9006 #define ALT_NOC_FW_L4_PER_SCR_UART1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_UART1_OFST))
9007 /* The base address byte offset for the start of the ALT_NOC_FW_L4_PER_SCR component. */
9008 #define ALT_NOC_FW_L4_PER_SCR_OFST 0xffd13000
9009 /* The start address of the ALT_NOC_FW_L4_PER_SCR component. */
9010 #define ALT_NOC_FW_L4_PER_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_L4_PER_SCR_OFST))
9011 /* The lower bound address range of the ALT_NOC_FW_L4_PER_SCR component. */
9012 #define ALT_NOC_FW_L4_PER_SCR_LB_ADDR ALT_NOC_FW_L4_PER_SCR_ADDR
9013 /* The upper bound address range of the ALT_NOC_FW_L4_PER_SCR component. */
9014 #define ALT_NOC_FW_L4_PER_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + 0x100) - 1))
9015 
9016 
9017 /*
9018  * Component Instance : noc_fw_l4_sys_l4_sys_scr
9019  *
9020  * Instance noc_fw_l4_sys_l4_sys_scr of component ALT_NOC_FW_L4_SYS_SCR.
9021  *
9022  *
9023  */
9024 /* The address of the ALT_NOC_FW_L4_SYS_SCR_CAN0_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9025 #define ALT_NOC_FW_L4_SYS_SCR_CAN0_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_CAN0_ECC_OFST))
9026 /* The address of the ALT_NOC_FW_L4_SYS_SCR_CAN1_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9027 #define ALT_NOC_FW_L4_SYS_SCR_CAN1_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_CAN1_ECC_OFST))
9028 /* The address of the ALT_NOC_FW_L4_SYS_SCR_DMA_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9029 #define ALT_NOC_FW_L4_SYS_SCR_DMA_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_DMA_ECC_OFST))
9030 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC0RX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9031 #define ALT_NOC_FW_L4_SYS_SCR_EMAC0RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC0RX_ECC_OFST))
9032 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC0TX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9033 #define ALT_NOC_FW_L4_SYS_SCR_EMAC0TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC0TX_ECC_OFST))
9034 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC1RX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9035 #define ALT_NOC_FW_L4_SYS_SCR_EMAC1RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC1RX_ECC_OFST))
9036 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC1TX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9037 #define ALT_NOC_FW_L4_SYS_SCR_EMAC1TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC1TX_ECC_OFST))
9038 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC2RX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9039 #define ALT_NOC_FW_L4_SYS_SCR_EMAC2RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC2RX_ECC_OFST))
9040 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC2TX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9041 #define ALT_NOC_FW_L4_SYS_SCR_EMAC2TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC2TX_ECC_OFST))
9042 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC3RX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9043 #define ALT_NOC_FW_L4_SYS_SCR_EMAC3RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC3RX_ECC_OFST))
9044 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC3TX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9045 #define ALT_NOC_FW_L4_SYS_SCR_EMAC3TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC3TX_ECC_OFST))
9046 /* The address of the ALT_NOC_FW_L4_SYS_SCR_NAND_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9047 #define ALT_NOC_FW_L4_SYS_SCR_NAND_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_NAND_ECC_OFST))
9048 /* The address of the ALT_NOC_FW_L4_SYS_SCR_NAND_RD_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9049 #define ALT_NOC_FW_L4_SYS_SCR_NAND_RD_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_NAND_RD_ECC_OFST))
9050 /* The address of the ALT_NOC_FW_L4_SYS_SCR_NAND_WR_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9051 #define ALT_NOC_FW_L4_SYS_SCR_NAND_WR_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_NAND_WR_ECC_OFST))
9052 /* The address of the ALT_NOC_FW_L4_SYS_SCR_ONCHIPRAM_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9053 #define ALT_NOC_FW_L4_SYS_SCR_ONCHIPRAM_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_ONCHIPRAM_ECC_OFST))
9054 /* The address of the ALT_NOC_FW_L4_SYS_SCR_QSPI_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9055 #define ALT_NOC_FW_L4_SYS_SCR_QSPI_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_QSPI_ECC_OFST))
9056 /* The address of the ALT_NOC_FW_L4_SYS_SCR_SDMMC_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9057 #define ALT_NOC_FW_L4_SYS_SCR_SDMMC_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_SDMMC_ECC_OFST))
9058 /* The address of the ALT_NOC_FW_L4_SYS_SCR_USB0_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9059 #define ALT_NOC_FW_L4_SYS_SCR_USB0_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_USB0_ECC_OFST))
9060 /* The address of the ALT_NOC_FW_L4_SYS_SCR_USB1_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9061 #define ALT_NOC_FW_L4_SYS_SCR_USB1_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_USB1_ECC_OFST))
9062 /* The address of the ALT_NOC_FW_L4_SYS_SCR_CLK_MANAGER register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9063 #define ALT_NOC_FW_L4_SYS_SCR_CLK_MANAGER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_CLK_MANAGER_OFST))
9064 /* The address of the ALT_NOC_FW_L4_SYS_SCR_FPGA_MANAGER_REG register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9065 #define ALT_NOC_FW_L4_SYS_SCR_FPGA_MANAGER_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_FPGA_MANAGER_REG_OFST))
9066 /* The address of the ALT_NOC_FW_L4_SYS_SCR_PIN_MUX_REG register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9067 #define ALT_NOC_FW_L4_SYS_SCR_PIN_MUX_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_PIN_MUX_REG_OFST))
9068 /* The address of the ALT_NOC_FW_L4_SYS_SCR_RST_MANAGER register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9069 #define ALT_NOC_FW_L4_SYS_SCR_RST_MANAGER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_RST_MANAGER_OFST))
9070 /* The address of the ALT_NOC_FW_L4_SYS_SCR_SYS_MANAGER register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9071 #define ALT_NOC_FW_L4_SYS_SCR_SYS_MANAGER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_SYS_MANAGER_OFST))
9072 /* The address of the ALT_NOC_FW_L4_SYS_SCR_OSC0_TMR register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9073 #define ALT_NOC_FW_L4_SYS_SCR_OSC0_TMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_OSC0_TMR_OFST))
9074 /* The address of the ALT_NOC_FW_L4_SYS_SCR_OSC1_TMR register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9075 #define ALT_NOC_FW_L4_SYS_SCR_OSC1_TMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_OSC1_TMR_OFST))
9076 /* The address of the ALT_NOC_FW_L4_SYS_SCR_WD0 register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9077 #define ALT_NOC_FW_L4_SYS_SCR_WD0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_WD0_OFST))
9078 /* The address of the ALT_NOC_FW_L4_SYS_SCR_WD1 register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9079 #define ALT_NOC_FW_L4_SYS_SCR_WD1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_WD1_OFST))
9080 /* The address of the ALT_NOC_FW_L4_SYS_SCR_DAP register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9081 #define ALT_NOC_FW_L4_SYS_SCR_DAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_DAP_OFST))
9082 /* The address of the ALT_NOC_FW_L4_SYS_SCR_FPGA_MANAGER_STREAMING register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9083 #define ALT_NOC_FW_L4_SYS_SCR_FPGA_MANAGER_STREAMING_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_FPGA_MANAGER_STREAMING_OFST))
9084 /* The address of the ALT_NOC_FW_L4_SYS_SCR_SEC_MGR_STREAMING register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9085 #define ALT_NOC_FW_L4_SYS_SCR_SECURITY_MANAGER_STREAMING_ADDR ALT_NOC_FW_L4_SYS_SCR_SEC_MGR_STREAMING_ADDR(ALT_NOC_FW_L4_SYS_SCR_ADDR)
9086 /* The address of the ALT_NOC_FW_L4_SYS_SCR_HMC_REG register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9087 #define ALT_NOC_FW_L4_SYS_SCR_HMC_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_HMC_REG_OFST))
9088 /* The address of the ALT_NOC_FW_L4_SYS_SCR_HMC_ADAPTOR_REG register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9089 #define ALT_NOC_FW_L4_SYS_SCR_HMC_ADAPTOR_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_HMC_ADAPTOR_REG_OFST))
9090 /* The address of the ALT_NOC_FW_L4_SYS_SCR_L3_INTERCONNECT_REG register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9091 #define ALT_NOC_FW_L4_SYS_SCR_L3_INTERCONNECT_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_L3_INTERCONNECT_REG_OFST))
9092 /* The address of the ALT_NOC_FW_L4_SYS_SCR_DDR_SCHED_REG register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9093 #define ALT_NOC_FW_L4_SYS_SCR_DDR_SCHED_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_DDR_SCHED_REG_OFST))
9094 /* The address of the ALT_NOC_FW_L4_SYS_SCR_L4_INTERCONNECT_FW_CSR register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9095 #define ALT_NOC_FW_L4_SYS_SCR_L4_INTERCONNECT_FW_CSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_L4_INTERCONNECT_FW_CSR_OFST))
9096 /* The address of the ALT_NOC_FW_L4_SYS_SCR_L4_INTERCONNECT_PRBS_CSR register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9097 #define ALT_NOC_FW_L4_SYS_SCR_L4_INTERCONNECT_PRBS_CSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_L4_INTERCONNECT_PRBS_CSR_OFST))
9098 /* The address of the ALT_NOC_FW_L4_SYS_SCR_L4_QOS_CSR register for the ALT_NOC_FW_L4_SYS_SCR instance. */
9099 #define ALT_NOC_FW_L4_SYS_SCR_L4_QOS_CSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_L4_QOS_CSR_OFST))
9100 /* The base address byte offset for the start of the ALT_NOC_FW_L4_SYS_SCR component. */
9101 #define ALT_NOC_FW_L4_SYS_SCR_OFST 0xffd13100
9102 /* The start address of the ALT_NOC_FW_L4_SYS_SCR component. */
9103 #define ALT_NOC_FW_L4_SYS_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_L4_SYS_SCR_OFST))
9104 /* The lower bound address range of the ALT_NOC_FW_L4_SYS_SCR component. */
9105 #define ALT_NOC_FW_L4_SYS_SCR_LB_ADDR ALT_NOC_FW_L4_SYS_SCR_ADDR
9106 /* The upper bound address range of the ALT_NOC_FW_L4_SYS_SCR component. */
9107 #define ALT_NOC_FW_L4_SYS_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + 0x100) - 1))
9108 
9109 
9110 /*
9111  * Component Instance : noc_fw_ocram_ocram_scr
9112  *
9113  * Instance noc_fw_ocram_ocram_scr of component ALT_NOC_FW_OCRAM_SCR.
9114  *
9115  *
9116  */
9117 /* The address of the ALT_NOC_FW_OCRAM_SCR_EN register for the ALT_NOC_FW_OCRAM_SCR instance. */
9118 #define ALT_NOC_FW_OCRAM_SCR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_EN_OFST))
9119 /* The address of the ALT_NOC_FW_OCRAM_SCR_EN_SET register for the ALT_NOC_FW_OCRAM_SCR instance. */
9120 #define ALT_NOC_FW_OCRAM_SCR_EN_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_EN_SET_OFST))
9121 /* The address of the ALT_NOC_FW_OCRAM_SCR_EN_CLR register for the ALT_NOC_FW_OCRAM_SCR instance. */
9122 #define ALT_NOC_FW_OCRAM_SCR_EN_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_EN_CLR_OFST))
9123 /* The address of the ALT_NOC_FW_OCRAM_SCR_REG0ADDR register for the ALT_NOC_FW_OCRAM_SCR instance. */
9124 #define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_REG0ADDR_OFST))
9125 /* The address of the ALT_NOC_FW_OCRAM_SCR_REG1ADDR register for the ALT_NOC_FW_OCRAM_SCR instance. */
9126 #define ALT_NOC_FW_OCRAM_SCR_REG1ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_REG1ADDR_OFST))
9127 /* The address of the ALT_NOC_FW_OCRAM_SCR_REG2ADDR register for the ALT_NOC_FW_OCRAM_SCR instance. */
9128 #define ALT_NOC_FW_OCRAM_SCR_REG2ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_REG2ADDR_OFST))
9129 /* The address of the ALT_NOC_FW_OCRAM_SCR_REG3ADDR register for the ALT_NOC_FW_OCRAM_SCR instance. */
9130 #define ALT_NOC_FW_OCRAM_SCR_REG3ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_REG3ADDR_OFST))
9131 /* The address of the ALT_NOC_FW_OCRAM_SCR_REG4ADDR register for the ALT_NOC_FW_OCRAM_SCR instance. */
9132 #define ALT_NOC_FW_OCRAM_SCR_REG4ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_REG4ADDR_OFST))
9133 /* The address of the ALT_NOC_FW_OCRAM_SCR_REG5ADDR register for the ALT_NOC_FW_OCRAM_SCR instance. */
9134 #define ALT_NOC_FW_OCRAM_SCR_REG5ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_REG5ADDR_OFST))
9135 /* The base address byte offset for the start of the ALT_NOC_FW_OCRAM_SCR component. */
9136 #define ALT_NOC_FW_OCRAM_SCR_OFST 0xffd13200
9137 /* The start address of the ALT_NOC_FW_OCRAM_SCR component. */
9138 #define ALT_NOC_FW_OCRAM_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_OCRAM_SCR_OFST))
9139 /* The lower bound address range of the ALT_NOC_FW_OCRAM_SCR component. */
9140 #define ALT_NOC_FW_OCRAM_SCR_LB_ADDR ALT_NOC_FW_OCRAM_SCR_ADDR
9141 /* The upper bound address range of the ALT_NOC_FW_OCRAM_SCR component. */
9142 #define ALT_NOC_FW_OCRAM_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + 0x100) - 1))
9143 
9144 
9145 /*
9146  * Component Instance : noc_fw_ddr_mpu_fpga2sdram_ddr_scr
9147  *
9148  * Instance noc_fw_ddr_mpu_fpga2sdram_ddr_scr of component ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR.
9149  *
9150  *
9151  */
9152 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9153 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_OFST))
9154 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_SET register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9155 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_SET_OFST))
9156 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_CLR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9157 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_CLR_OFST))
9158 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG0ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9159 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG0ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG0ADDR_OFST))
9160 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG1ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9161 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG1ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG1ADDR_OFST))
9162 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG2ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9163 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG2ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG2ADDR_OFST))
9164 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG3ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9165 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG3ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG3ADDR_OFST))
9166 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG0ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9167 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG0ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG0ADDR_OFST))
9168 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG1ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9169 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG1ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG1ADDR_OFST))
9170 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG2ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9171 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG2ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG2ADDR_OFST))
9172 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG3ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9173 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG3ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG3ADDR_OFST))
9174 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG0ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9175 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG0ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG0ADDR_OFST))
9176 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG1ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9177 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG1ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG1ADDR_OFST))
9178 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG2ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9179 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG2ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG2ADDR_OFST))
9180 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG3ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9181 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG3ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG3ADDR_OFST))
9182 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG0ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9183 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG0ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG0ADDR_OFST))
9184 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG1ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9185 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG1ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG1ADDR_OFST))
9186 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG2ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9187 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG2ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG2ADDR_OFST))
9188 /* The address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG3ADDR register for the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR instance. */
9189 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG3ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG3ADDR_OFST))
9190 /* The base address byte offset for the start of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR component. */
9191 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_OFST 0xffd13300
9192 /* The start address of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR component. */
9193 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_OFST))
9194 /* The lower bound address range of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR component. */
9195 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_LB_ADDR ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR
9196 /* The upper bound address range of the ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR component. */
9197 #define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + 0x100) - 1))
9198 
9199 
9200 /*
9201  * Component Instance : noc_fw_ddr_l3_ddr_scr
9202  *
9203  * Instance noc_fw_ddr_l3_ddr_scr of component ALT_NOC_FW_DDR_L3_SCR.
9204  *
9205  *
9206  */
9207 /* The address of the ALT_NOC_FW_DDR_L3_SCR_EN register for the ALT_NOC_FW_DDR_L3_SCR instance. */
9208 #define ALT_NOC_FW_DDR_L3_SCR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_EN_OFST))
9209 /* The address of the ALT_NOC_FW_DDR_L3_SCR_EN_SET register for the ALT_NOC_FW_DDR_L3_SCR instance. */
9210 #define ALT_NOC_FW_DDR_L3_SCR_EN_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_EN_SET_OFST))
9211 /* The address of the ALT_NOC_FW_DDR_L3_SCR_EN_CLR register for the ALT_NOC_FW_DDR_L3_SCR instance. */
9212 #define ALT_NOC_FW_DDR_L3_SCR_EN_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_EN_CLR_OFST))
9213 /* The address of the ALT_NOC_FW_DDR_L3_SCR_HPSREG0ADDR register for the ALT_NOC_FW_DDR_L3_SCR instance. */
9214 #define ALT_NOC_FW_DDR_L3_SCR_HPSREG0ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG0ADDR_OFST))
9215 /* The address of the ALT_NOC_FW_DDR_L3_SCR_HPSREG1ADDR register for the ALT_NOC_FW_DDR_L3_SCR instance. */
9216 #define ALT_NOC_FW_DDR_L3_SCR_HPSREG1ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG1ADDR_OFST))
9217 /* The address of the ALT_NOC_FW_DDR_L3_SCR_HPSREG2ADDR register for the ALT_NOC_FW_DDR_L3_SCR instance. */
9218 #define ALT_NOC_FW_DDR_L3_SCR_HPSREG2ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG2ADDR_OFST))
9219 /* The address of the ALT_NOC_FW_DDR_L3_SCR_HPSREG3ADDR register for the ALT_NOC_FW_DDR_L3_SCR instance. */
9220 #define ALT_NOC_FW_DDR_L3_SCR_HPSREG3ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG3ADDR_OFST))
9221 /* The address of the ALT_NOC_FW_DDR_L3_SCR_HPSREG4ADDR register for the ALT_NOC_FW_DDR_L3_SCR instance. */
9222 #define ALT_NOC_FW_DDR_L3_SCR_HPSREG4ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG4ADDR_OFST))
9223 /* The address of the ALT_NOC_FW_DDR_L3_SCR_HPSREG5ADDR register for the ALT_NOC_FW_DDR_L3_SCR instance. */
9224 #define ALT_NOC_FW_DDR_L3_SCR_HPSREG5ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG5ADDR_OFST))
9225 /* The address of the ALT_NOC_FW_DDR_L3_SCR_HPSREG6ADDR register for the ALT_NOC_FW_DDR_L3_SCR instance. */
9226 #define ALT_NOC_FW_DDR_L3_SCR_HPSREG6ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG6ADDR_OFST))
9227 /* The address of the ALT_NOC_FW_DDR_L3_SCR_HPSREG7ADDR register for the ALT_NOC_FW_DDR_L3_SCR instance. */
9228 #define ALT_NOC_FW_DDR_L3_SCR_HPSREG7ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG7ADDR_OFST))
9229 /* The address of the ALT_NOC_FW_DDR_L3_SCR_GLOB register for the ALT_NOC_FW_DDR_L3_SCR instance. */
9230 #define ALT_NOC_FW_DDR_L3_SCR_GLOB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_GLOB_OFST))
9231 /* The base address byte offset for the start of the ALT_NOC_FW_DDR_L3_SCR component. */
9232 #define ALT_NOC_FW_DDR_L3_SCR_OFST 0xffd13400
9233 /* The start address of the ALT_NOC_FW_DDR_L3_SCR component. */
9234 #define ALT_NOC_FW_DDR_L3_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_DDR_L3_SCR_OFST))
9235 /* The lower bound address range of the ALT_NOC_FW_DDR_L3_SCR component. */
9236 #define ALT_NOC_FW_DDR_L3_SCR_LB_ADDR ALT_NOC_FW_DDR_L3_SCR_ADDR
9237 /* The upper bound address range of the ALT_NOC_FW_DDR_L3_SCR component. */
9238 #define ALT_NOC_FW_DDR_L3_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + 0x100) - 1))
9239 
9240 
9241 /*
9242  * Component Instance : noc_fw_soc2fpga_soc2fpga_scr
9243  *
9244  * Instance noc_fw_soc2fpga_soc2fpga_scr of component ALT_NOC_FW_H2F_SCR.
9245  *
9246  *
9247  */
9248 /* The address of the ALT_NOC_FW_H2F_SCR_LWH2F register for the ALT_NOC_FW_H2F_SCR instance. */
9249 #define ALT_NOC_FW_H2F_SCR_LWH2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_H2F_SCR_ADDR) + ALT_NOC_FW_H2F_SCR_LWH2F_OFST))
9250 /* The address of the ALT_NOC_FW_H2F_SCR_H2F register for the ALT_NOC_FW_H2F_SCR instance. */
9251 #define ALT_NOC_FW_H2F_SCR_H2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_H2F_SCR_ADDR) + ALT_NOC_FW_H2F_SCR_H2F_OFST))
9252 /* The base address byte offset for the start of the ALT_NOC_FW_H2F_SCR component. */
9253 #define ALT_NOC_FW_H2F_SCR_OFST 0xffd13500
9254 /* The start address of the ALT_NOC_FW_H2F_SCR component. */
9255 #define ALT_NOC_FW_H2F_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_H2F_SCR_OFST))
9256 /* The lower bound address range of the ALT_NOC_FW_H2F_SCR component. */
9257 #define ALT_NOC_FW_H2F_SCR_LB_ADDR ALT_NOC_FW_H2F_SCR_ADDR
9258 /* The upper bound address range of the ALT_NOC_FW_H2F_SCR component. */
9259 #define ALT_NOC_FW_H2F_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_H2F_SCR_ADDR) + 0x100) - 1))
9260 
9261 
9262 /*
9263  * Component Instance : i_noc_mpu_m0_Probe_SoC2FPGA_main_Probe
9264  *
9265  * Instance i_noc_mpu_m0_Probe_SoC2FPGA_main_Probe of component ALT_NOC_MPU_PRB_H2F_MAIN_PRB.
9266  *
9267  *
9268  */
9269 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_COREID register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9270 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_COREID_OFST))
9271 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_REVID register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9272 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_REVID_OFST))
9273 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9274 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_OFST))
9275 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9276 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_OFST))
9277 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9278 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_OFST))
9279 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9280 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_OFST))
9281 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9282 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_OFST))
9283 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9284 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_OFST))
9285 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9286 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_OFST))
9287 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9288 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_OFST))
9289 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_STATGO register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9290 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_OFST))
9291 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9292 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_OFST))
9293 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9294 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_OFST))
9295 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9296 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_OFST))
9297 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9298 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_OFST))
9299 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9300 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_OFST))
9301 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9302 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_OFST))
9303 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9304 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_OFST))
9305 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9306 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_OFST))
9307 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9308 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_OFST))
9309 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9310 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_OFST))
9311 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9312 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_OFST))
9313 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9314 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_OFST))
9315 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9316 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_OFST))
9317 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9318 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_OFST))
9319 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9320 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_OFST))
9321 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9322 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_OFST))
9323 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9324 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_OFST))
9325 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9326 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_OFST))
9327 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9328 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_OFST))
9329 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9330 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_OFST))
9331 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9332 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_OFST))
9333 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9334 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_OFST))
9335 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9336 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_OFST))
9337 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9338 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_OFST))
9339 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9340 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_OFST))
9341 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9342 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_OFST))
9343 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9344 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_OFST))
9345 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9346 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_OFST))
9347 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9348 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_OFST))
9349 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9350 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_OFST))
9351 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9352 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_OFST))
9353 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9354 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_OFST))
9355 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9356 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_OFST))
9357 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9358 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_OFST))
9359 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9360 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_OFST))
9361 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9362 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_OFST))
9363 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9364 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_OFST))
9365 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9366 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_OFST))
9367 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9368 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_OFST))
9369 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9370 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_OFST))
9371 /* The address of the ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL register for the ALT_NOC_MPU_PRB_H2F_MAIN_PRB instance. */
9372 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_OFST))
9373 /* The base address byte offset for the start of the ALT_NOC_MPU_PRB_H2F_MAIN_PRB component. */
9374 #define ALT_NOC_MPU_PRB_H2F_MAIN_PRB_OFST 0xffd14000
9375 /* The start address of the ALT_NOC_MPU_PRB_H2F_MAIN_PRB component. */
9376 #define ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_PRB_OFST))
9377 /* The lower bound address range of the ALT_NOC_MPU_PRB_H2F_MAIN_PRB component. */
9378 #define ALT_NOC_MPU_PRB_H2F_MAIN_PRB_LB_ADDR ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR
9379 /* The upper bound address range of the ALT_NOC_MPU_PRB_H2F_MAIN_PRB component. */
9380 #define ALT_NOC_MPU_PRB_H2F_MAIN_PRB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + 0x400) - 1))
9381 
9382 
9383 /*
9384  * Component Instance : i_noc_mpu_m0_Probe_emacs_main_Probe
9385  *
9386  * Instance i_noc_mpu_m0_Probe_emacs_main_Probe of component ALT_NOC_MPU_PRB_EMACS_MAIN_PRB.
9387  *
9388  *
9389  */
9390 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_COREID register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9391 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_OFST))
9392 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_REVID register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9393 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_OFST))
9394 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9395 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_OFST))
9396 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9397 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_OFST))
9398 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9399 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_OFST))
9400 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9401 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_OFST))
9402 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9403 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_OFST))
9404 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9405 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_OFST))
9406 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9407 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_OFST))
9408 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9409 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_OFST))
9410 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9411 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_OFST))
9412 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9413 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_OFST))
9414 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9415 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_OFST))
9416 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9417 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_OFST))
9418 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9419 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_OFST))
9420 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9421 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_OFST))
9422 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9423 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_OFST))
9424 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9425 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_OFST))
9426 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9427 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_OFST))
9428 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9429 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_OFST))
9430 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9431 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_OFST))
9432 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9433 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_OFST))
9434 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9435 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_OFST))
9436 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9437 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_OFST))
9438 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9439 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_OFST))
9440 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9441 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_OFST))
9442 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9443 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_OFST))
9444 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9445 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_OFST))
9446 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9447 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_OFST))
9448 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9449 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_OFST))
9450 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9451 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_OFST))
9452 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9453 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_OFST))
9454 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9455 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_OFST))
9456 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9457 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_OFST))
9458 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9459 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_OFST))
9460 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9461 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_OFST))
9462 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9463 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_OFST))
9464 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9465 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_OFST))
9466 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9467 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_OFST))
9468 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9469 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_OFST))
9470 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9471 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_OFST))
9472 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9473 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_OFST))
9474 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9475 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_OFST))
9476 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9477 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_OFST))
9478 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9479 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_OFST))
9480 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9481 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_OFST))
9482 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9483 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_OFST))
9484 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9485 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_OFST))
9486 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9487 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_OFST))
9488 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9489 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_OFST))
9490 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9491 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_OFST))
9492 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL register for the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB instance. */
9493 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_OFST))
9494 /* The base address byte offset for the start of the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB component. */
9495 #define ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_OFST 0xffd14400
9496 /* The start address of the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB component. */
9497 #define ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_OFST))
9498 /* The lower bound address range of the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB component. */
9499 #define ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_LB_ADDR ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR
9500 /* The upper bound address range of the ALT_NOC_MPU_PRB_EMACS_MAIN_PRB component. */
9501 #define ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + 0x400) - 1))
9502 
9503 
9504 /*
9505  * Component Instance : i_noc_mpu_m0_Probe_emacs_main_TransactionStatProfiler
9506  *
9507  * Instance i_noc_mpu_m0_Probe_emacs_main_TransactionStatProfiler of component ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER.
9508  *
9509  *
9510  */
9511 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID register for the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER instance. */
9512 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_OFST))
9513 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID register for the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER instance. */
9514 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_OFST))
9515 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN register for the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER instance. */
9516 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_OFST))
9517 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD register for the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER instance. */
9518 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_OFST))
9519 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0 register for the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER instance. */
9520 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_OFST))
9521 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1 register for the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER instance. */
9522 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_OFST))
9523 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2 register for the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER instance. */
9524 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_OFST))
9525 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT register for the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER instance. */
9526 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_OFST))
9527 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST register for the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER instance. */
9528 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_OFST))
9529 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD register for the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER instance. */
9530 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_OFST))
9531 /* The address of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER register for the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER instance. */
9532 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_OFST))
9533 /* The base address byte offset for the start of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER component. */
9534 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OFST 0xffd14800
9535 /* The start address of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER component. */
9536 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OFST))
9537 /* The lower bound address range of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER component. */
9538 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_LB_ADDR ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR
9539 /* The upper bound address range of the ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER component. */
9540 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + 0x80) - 1))
9541 
9542 
9543 /*
9544  * Component Instance : i_noc_mpu_m0_cs_obs_at_main_AtbEndPoint
9545  *
9546  * Instance i_noc_mpu_m0_cs_obs_at_main_AtbEndPoint of component ALT_NOC_MPU_CS_OBS_AT_ATBENDPT.
9547  *
9548  *
9549  */
9550 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID register for the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT instance. */
9551 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_OFST))
9552 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID register for the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT instance. */
9553 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_OFST))
9554 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID register for the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT instance. */
9555 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_OFST))
9556 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN register for the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT instance. */
9557 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_OFST))
9558 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD register for the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT instance. */
9559 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_OFST))
9560 /* The base address byte offset for the start of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT component. */
9561 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_OFST 0xffd14900
9562 /* The start address of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT component. */
9563 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_OFST))
9564 /* The lower bound address range of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT component. */
9565 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_LB_ADDR ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR
9566 /* The upper bound address range of the ALT_NOC_MPU_CS_OBS_AT_ATBENDPT component. */
9567 #define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR) + 0x80) - 1))
9568 
9569 
9570 /*
9571  * Component Instance : i_noc_mpu_m0_cs_obs_at_main_ErrorLogger_0
9572  *
9573  * Instance i_noc_mpu_m0_cs_obs_at_main_ErrorLogger_0 of component ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0.
9574  *
9575  *
9576  */
9577 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID register for the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 instance. */
9578 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_OFST))
9579 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID register for the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 instance. */
9580 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_OFST))
9581 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN register for the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 instance. */
9582 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_OFST))
9583 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD register for the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 instance. */
9584 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_OFST))
9585 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR register for the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 instance. */
9586 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_OFST))
9587 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0 register for the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 instance. */
9588 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OFST))
9589 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1 register for the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 instance. */
9590 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_OFST))
9591 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3 register for the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 instance. */
9592 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_OFST))
9593 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5 register for the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 instance. */
9594 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_OFST))
9595 /* The address of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7 register for the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 instance. */
9596 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_OFST))
9597 /* The base address byte offset for the start of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 component. */
9598 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_OFST 0xffd14980
9599 /* The start address of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 component. */
9600 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_OFST))
9601 /* The lower bound address range of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 component. */
9602 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_LB_ADDR ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR
9603 /* The upper bound address range of the ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0 component. */
9604 #define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + 0x80) - 1))
9605 
9606 
9607 /*
9608  * Component Instance : i_noc_mpu_m0_Probe_MPU_main_Probe
9609  *
9610  * Instance i_noc_mpu_m0_Probe_MPU_main_Probe of component ALT_NOC_MPU_PRB_MPU_MAIN_PRB.
9611  *
9612  *
9613  */
9614 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_COREID register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9615 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_COREID_OFST))
9616 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_REVID register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9617 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_REVID_OFST))
9618 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9619 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_OFST))
9620 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9621 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_OFST))
9622 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9623 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_OFST))
9624 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9625 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_OFST))
9626 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9627 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_OFST))
9628 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9629 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_OFST))
9630 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9631 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_OFST))
9632 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_STATGO register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9633 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_OFST))
9634 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9635 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_OFST))
9636 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9637 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_OFST))
9638 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9639 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_OFST))
9640 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9641 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_OFST))
9642 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9643 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_OFST))
9644 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9645 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_OFST))
9646 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9647 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_OFST))
9648 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9649 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_OFST))
9650 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9651 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_OFST))
9652 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9653 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_OFST))
9654 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9655 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_OFST))
9656 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9657 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_OFST))
9658 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9659 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_OFST))
9660 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9661 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_OFST))
9662 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9663 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_OFST))
9664 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9665 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_OFST))
9666 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9667 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_OFST))
9668 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9669 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_OFST))
9670 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9671 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_OFST))
9672 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9673 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_OFST))
9674 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9675 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_OFST))
9676 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9677 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_OFST))
9678 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9679 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_OFST))
9680 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9681 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_OFST))
9682 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9683 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_OFST))
9684 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9685 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_OFST))
9686 /* The address of the ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL register for the ALT_NOC_MPU_PRB_MPU_MAIN_PRB instance. */
9687 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_OFST))
9688 /* The base address byte offset for the start of the ALT_NOC_MPU_PRB_MPU_MAIN_PRB component. */
9689 #define ALT_NOC_MPU_PRB_MPU_MAIN_PRB_OFST 0xffd15000
9690 /* The start address of the ALT_NOC_MPU_PRB_MPU_MAIN_PRB component. */
9691 #define ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_PRB_OFST))
9692 /* The lower bound address range of the ALT_NOC_MPU_PRB_MPU_MAIN_PRB component. */
9693 #define ALT_NOC_MPU_PRB_MPU_MAIN_PRB_LB_ADDR ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR
9694 /* The upper bound address range of the ALT_NOC_MPU_PRB_MPU_MAIN_PRB component. */
9695 #define ALT_NOC_MPU_PRB_MPU_MAIN_PRB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + 0x400) - 1))
9696 
9697 
9698 /*
9699  * Component Instance : i_noc_mpu_m0_mpu_m0_I_main_QosGenerator
9700  *
9701  * Instance i_noc_mpu_m0_mpu_m0_I_main_QosGenerator of component ALT_NOC_MPU_M0_MAIN_QOS.
9702  *
9703  *
9704  */
9705 /* The address of the ALT_NOC_MPU_MAIN_QOS_COREID register for the ALT_NOC_MPU_M0_MAIN_QOS instance. */
9706 #define ALT_NOC_MPU_M0_MAIN_QOS_COREID_ADDR ALT_NOC_MPU_MAIN_QOS_COREID_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9707 /* The address of the ALT_NOC_MPU_MAIN_QOS_REVID register for the ALT_NOC_MPU_M0_MAIN_QOS instance. */
9708 #define ALT_NOC_MPU_M0_MAIN_QOS_REVID_ADDR ALT_NOC_MPU_MAIN_QOS_REVID_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9709 /* The address of the ALT_NOC_MPU_MAIN_QOS_PRI register for the ALT_NOC_MPU_M0_MAIN_QOS instance. */
9710 #define ALT_NOC_MPU_M0_MAIN_QOS_PRI_ADDR ALT_NOC_MPU_MAIN_QOS_PRI_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9711 /* The address of the ALT_NOC_MPU_MAIN_QOS_MOD register for the ALT_NOC_MPU_M0_MAIN_QOS instance. */
9712 #define ALT_NOC_MPU_M0_MAIN_QOS_MOD_ADDR ALT_NOC_MPU_MAIN_QOS_MOD_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9713 /* The address of the ALT_NOC_MPU_MAIN_QOS_BWDTH register for the ALT_NOC_MPU_M0_MAIN_QOS instance. */
9714 #define ALT_NOC_MPU_M0_MAIN_QOS_BWDTH_ADDR ALT_NOC_MPU_MAIN_QOS_BWDTH_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9715 /* The address of the ALT_NOC_MPU_MAIN_QOS_SAT register for the ALT_NOC_MPU_M0_MAIN_QOS instance. */
9716 #define ALT_NOC_MPU_M0_MAIN_QOS_SAT_ADDR ALT_NOC_MPU_MAIN_QOS_SAT_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9717 /* The address of the ALT_NOC_MPU_MAIN_QOS_EXTCTL register for the ALT_NOC_MPU_M0_MAIN_QOS instance. */
9718 #define ALT_NOC_MPU_M0_MAIN_QOS_EXTCTL_ADDR ALT_NOC_MPU_MAIN_QOS_EXTCTL_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9719 /* The base address byte offset for the start of the ALT_NOC_MPU_M0_MAIN_QOS component. */
9720 #define ALT_NOC_MPU_M0_MAIN_QOS_OFST 0xffd16000
9721 /* The start address of the ALT_NOC_MPU_M0_MAIN_QOS component. */
9722 #define ALT_NOC_MPU_M0_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_M0_MAIN_QOS_OFST))
9723 /* The lower bound address range of the ALT_NOC_MPU_M0_MAIN_QOS component. */
9724 #define ALT_NOC_MPU_M0_MAIN_QOS_LB_ADDR ALT_NOC_MPU_M0_MAIN_QOS_ADDR
9725 /* The upper bound address range of the ALT_NOC_MPU_M0_MAIN_QOS component. */
9726 #define ALT_NOC_MPU_M0_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_M0_MAIN_QOS_ADDR) + 0x80) - 1))
9727 
9728 
9729 /*
9730  * Component Instance : i_noc_mpu_m0_mpu_m1_I_main_QosGenerator
9731  *
9732  * Instance i_noc_mpu_m0_mpu_m1_I_main_QosGenerator of component ALT_NOC_MPU_M1_MAIN_QOS.
9733  *
9734  *
9735  */
9736 /* The address of the ALT_NOC_MPU_M1_MAIN_QOS_COREID register for the ALT_NOC_MPU_M1_MAIN_QOS instance. */
9737 #define ALT_NOC_MPU_M1_MAIN_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_COREID_OFST))
9738 /* The address of the ALT_NOC_MPU_M1_MAIN_QOS_REVID register for the ALT_NOC_MPU_M1_MAIN_QOS instance. */
9739 #define ALT_NOC_MPU_M1_MAIN_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_REVID_OFST))
9740 /* The address of the ALT_NOC_MPU_M1_MAIN_QOS_PRI register for the ALT_NOC_MPU_M1_MAIN_QOS instance. */
9741 #define ALT_NOC_MPU_M1_MAIN_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_PRI_OFST))
9742 /* The address of the ALT_NOC_MPU_M1_MAIN_QOS_MOD register for the ALT_NOC_MPU_M1_MAIN_QOS instance. */
9743 #define ALT_NOC_MPU_M1_MAIN_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_MOD_OFST))
9744 /* The address of the ALT_NOC_MPU_M1_MAIN_QOS_BWDTH register for the ALT_NOC_MPU_M1_MAIN_QOS instance. */
9745 #define ALT_NOC_MPU_M1_MAIN_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_BWDTH_OFST))
9746 /* The address of the ALT_NOC_MPU_M1_MAIN_QOS_SAT register for the ALT_NOC_MPU_M1_MAIN_QOS instance. */
9747 #define ALT_NOC_MPU_M1_MAIN_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_SAT_OFST))
9748 /* The address of the ALT_NOC_MPU_M1_MAIN_QOS_EXTCTL register for the ALT_NOC_MPU_M1_MAIN_QOS instance. */
9749 #define ALT_NOC_MPU_M1_MAIN_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_EXTCTL_OFST))
9750 /* The base address byte offset for the start of the ALT_NOC_MPU_M1_MAIN_QOS component. */
9751 #define ALT_NOC_MPU_M1_MAIN_QOS_OFST 0xffd16080
9752 /* The start address of the ALT_NOC_MPU_M1_MAIN_QOS component. */
9753 #define ALT_NOC_MPU_M1_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_OFST))
9754 /* The lower bound address range of the ALT_NOC_MPU_M1_MAIN_QOS component. */
9755 #define ALT_NOC_MPU_M1_MAIN_QOS_LB_ADDR ALT_NOC_MPU_M1_MAIN_QOS_ADDR
9756 /* The upper bound address range of the ALT_NOC_MPU_M1_MAIN_QOS component. */
9757 #define ALT_NOC_MPU_M1_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + 0x80) - 1))
9758 
9759 
9760 /*
9761  * Component Instance : i_noc_mpu_m0_fpga2soc_axi32_I_main_QosGenerator
9762  *
9763  * Instance i_noc_mpu_m0_fpga2soc_axi32_I_main_QosGenerator of component ALT_NOC_MPU_F2H_AXI32_QOS.
9764  *
9765  *
9766  */
9767 /* The address of the ALT_NOC_MPU_F2H_AXI32_QOS_COREID register for the ALT_NOC_MPU_F2H_AXI32_QOS instance. */
9768 #define ALT_NOC_MPU_F2H_AXI32_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_COREID_OFST))
9769 /* The address of the ALT_NOC_MPU_F2H_AXI32_QOS_REVID register for the ALT_NOC_MPU_F2H_AXI32_QOS instance. */
9770 #define ALT_NOC_MPU_F2H_AXI32_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_REVID_OFST))
9771 /* The address of the ALT_NOC_MPU_F2H_AXI32_QOS_PRI register for the ALT_NOC_MPU_F2H_AXI32_QOS instance. */
9772 #define ALT_NOC_MPU_F2H_AXI32_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_PRI_OFST))
9773 /* The address of the ALT_NOC_MPU_F2H_AXI32_QOS_MOD register for the ALT_NOC_MPU_F2H_AXI32_QOS instance. */
9774 #define ALT_NOC_MPU_F2H_AXI32_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_MOD_OFST))
9775 /* The address of the ALT_NOC_MPU_F2H_AXI32_QOS_BWDTH register for the ALT_NOC_MPU_F2H_AXI32_QOS instance. */
9776 #define ALT_NOC_MPU_F2H_AXI32_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_BWDTH_OFST))
9777 /* The address of the ALT_NOC_MPU_F2H_AXI32_QOS_SAT register for the ALT_NOC_MPU_F2H_AXI32_QOS instance. */
9778 #define ALT_NOC_MPU_F2H_AXI32_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_SAT_OFST))
9779 /* The address of the ALT_NOC_MPU_F2H_AXI32_QOS_EXTCTL register for the ALT_NOC_MPU_F2H_AXI32_QOS instance. */
9780 #define ALT_NOC_MPU_F2H_AXI32_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_EXTCTL_OFST))
9781 /* The base address byte offset for the start of the ALT_NOC_MPU_F2H_AXI32_QOS component. */
9782 #define ALT_NOC_MPU_F2H_AXI32_QOS_OFST 0xffd16100
9783 /* The start address of the ALT_NOC_MPU_F2H_AXI32_QOS component. */
9784 #define ALT_NOC_MPU_F2H_AXI32_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_OFST))
9785 /* The lower bound address range of the ALT_NOC_MPU_F2H_AXI32_QOS component. */
9786 #define ALT_NOC_MPU_F2H_AXI32_QOS_LB_ADDR ALT_NOC_MPU_F2H_AXI32_QOS_ADDR
9787 /* The upper bound address range of the ALT_NOC_MPU_F2H_AXI32_QOS component. */
9788 #define ALT_NOC_MPU_F2H_AXI32_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + 0x80) - 1))
9789 
9790 
9791 /*
9792  * Component Instance : i_noc_mpu_m0_fpga2soc_axi64_I_main_QosGenerator
9793  *
9794  * Instance i_noc_mpu_m0_fpga2soc_axi64_I_main_QosGenerator of component ALT_NOC_MPU_F2H_AXI64_QOS.
9795  *
9796  *
9797  */
9798 /* The address of the ALT_NOC_MPU_F2H_AXI64_QOS_COREID register for the ALT_NOC_MPU_F2H_AXI64_QOS instance. */
9799 #define ALT_NOC_MPU_F2H_AXI64_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_COREID_OFST))
9800 /* The address of the ALT_NOC_MPU_F2H_AXI64_QOS_REVID register for the ALT_NOC_MPU_F2H_AXI64_QOS instance. */
9801 #define ALT_NOC_MPU_F2H_AXI64_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_REVID_OFST))
9802 /* The address of the ALT_NOC_MPU_F2H_AXI64_QOS_PRI register for the ALT_NOC_MPU_F2H_AXI64_QOS instance. */
9803 #define ALT_NOC_MPU_F2H_AXI64_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_PRI_OFST))
9804 /* The address of the ALT_NOC_MPU_F2H_AXI64_QOS_MOD register for the ALT_NOC_MPU_F2H_AXI64_QOS instance. */
9805 #define ALT_NOC_MPU_F2H_AXI64_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_MOD_OFST))
9806 /* The address of the ALT_NOC_MPU_F2H_AXI64_QOS_BWDTH register for the ALT_NOC_MPU_F2H_AXI64_QOS instance. */
9807 #define ALT_NOC_MPU_F2H_AXI64_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_BWDTH_OFST))
9808 /* The address of the ALT_NOC_MPU_F2H_AXI64_QOS_SAT register for the ALT_NOC_MPU_F2H_AXI64_QOS instance. */
9809 #define ALT_NOC_MPU_F2H_AXI64_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_SAT_OFST))
9810 /* The address of the ALT_NOC_MPU_F2H_AXI64_QOS_EXTCTL register for the ALT_NOC_MPU_F2H_AXI64_QOS instance. */
9811 #define ALT_NOC_MPU_F2H_AXI64_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_EXTCTL_OFST))
9812 /* The base address byte offset for the start of the ALT_NOC_MPU_F2H_AXI64_QOS component. */
9813 #define ALT_NOC_MPU_F2H_AXI64_QOS_OFST 0xffd16180
9814 /* The start address of the ALT_NOC_MPU_F2H_AXI64_QOS component. */
9815 #define ALT_NOC_MPU_F2H_AXI64_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_OFST))
9816 /* The lower bound address range of the ALT_NOC_MPU_F2H_AXI64_QOS component. */
9817 #define ALT_NOC_MPU_F2H_AXI64_QOS_LB_ADDR ALT_NOC_MPU_F2H_AXI64_QOS_ADDR
9818 /* The upper bound address range of the ALT_NOC_MPU_F2H_AXI64_QOS component. */
9819 #define ALT_NOC_MPU_F2H_AXI64_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + 0x80) - 1))
9820 
9821 
9822 /*
9823  * Component Instance : i_noc_mpu_m0_fpga2soc_axi128_I_main_QosGenerator
9824  *
9825  * Instance i_noc_mpu_m0_fpga2soc_axi128_I_main_QosGenerator of component ALT_NOC_MPU_F2H_AXI128_QOS.
9826  *
9827  *
9828  */
9829 /* The address of the ALT_NOC_MPU_F2H_AXI128_QOS_COREID register for the ALT_NOC_MPU_F2H_AXI128_QOS instance. */
9830 #define ALT_NOC_MPU_F2H_AXI128_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_COREID_OFST))
9831 /* The address of the ALT_NOC_MPU_F2H_AXI128_QOS_REVID register for the ALT_NOC_MPU_F2H_AXI128_QOS instance. */
9832 #define ALT_NOC_MPU_F2H_AXI128_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_REVID_OFST))
9833 /* The address of the ALT_NOC_MPU_F2H_AXI128_QOS_PRI register for the ALT_NOC_MPU_F2H_AXI128_QOS instance. */
9834 #define ALT_NOC_MPU_F2H_AXI128_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_PRI_OFST))
9835 /* The address of the ALT_NOC_MPU_F2H_AXI128_QOS_MOD register for the ALT_NOC_MPU_F2H_AXI128_QOS instance. */
9836 #define ALT_NOC_MPU_F2H_AXI128_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_MOD_OFST))
9837 /* The address of the ALT_NOC_MPU_F2H_AXI128_QOS_BWDTH register for the ALT_NOC_MPU_F2H_AXI128_QOS instance. */
9838 #define ALT_NOC_MPU_F2H_AXI128_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_BWDTH_OFST))
9839 /* The address of the ALT_NOC_MPU_F2H_AXI128_QOS_SAT register for the ALT_NOC_MPU_F2H_AXI128_QOS instance. */
9840 #define ALT_NOC_MPU_F2H_AXI128_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_SAT_OFST))
9841 /* The address of the ALT_NOC_MPU_F2H_AXI128_QOS_EXTCTL register for the ALT_NOC_MPU_F2H_AXI128_QOS instance. */
9842 #define ALT_NOC_MPU_F2H_AXI128_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_EXTCTL_OFST))
9843 /* The base address byte offset for the start of the ALT_NOC_MPU_F2H_AXI128_QOS component. */
9844 #define ALT_NOC_MPU_F2H_AXI128_QOS_OFST 0xffd16200
9845 /* The start address of the ALT_NOC_MPU_F2H_AXI128_QOS component. */
9846 #define ALT_NOC_MPU_F2H_AXI128_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_OFST))
9847 /* The lower bound address range of the ALT_NOC_MPU_F2H_AXI128_QOS component. */
9848 #define ALT_NOC_MPU_F2H_AXI128_QOS_LB_ADDR ALT_NOC_MPU_F2H_AXI128_QOS_ADDR
9849 /* The upper bound address range of the ALT_NOC_MPU_F2H_AXI128_QOS component. */
9850 #define ALT_NOC_MPU_F2H_AXI128_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + 0x80) - 1))
9851 
9852 
9853 /*
9854  * Component Instance : i_noc_mpu_m0_dma_m0_I_main_QosGenerator
9855  *
9856  * Instance i_noc_mpu_m0_dma_m0_I_main_QosGenerator of component ALT_NOC_MPU_DMA_M0_QOS.
9857  *
9858  *
9859  */
9860 /* The address of the ALT_NOC_MPU_DMA_M0_QOS_COREID register for the ALT_NOC_MPU_DMA_M0_QOS instance. */
9861 #define ALT_NOC_MPU_DMA_M0_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_COREID_OFST))
9862 /* The address of the ALT_NOC_MPU_DMA_M0_QOS_REVID register for the ALT_NOC_MPU_DMA_M0_QOS instance. */
9863 #define ALT_NOC_MPU_DMA_M0_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_REVID_OFST))
9864 /* The address of the ALT_NOC_MPU_DMA_M0_QOS_PRI register for the ALT_NOC_MPU_DMA_M0_QOS instance. */
9865 #define ALT_NOC_MPU_DMA_M0_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_PRI_OFST))
9866 /* The address of the ALT_NOC_MPU_DMA_M0_QOS_MOD register for the ALT_NOC_MPU_DMA_M0_QOS instance. */
9867 #define ALT_NOC_MPU_DMA_M0_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_MOD_OFST))
9868 /* The address of the ALT_NOC_MPU_DMA_M0_QOS_BWDTH register for the ALT_NOC_MPU_DMA_M0_QOS instance. */
9869 #define ALT_NOC_MPU_DMA_M0_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_BWDTH_OFST))
9870 /* The address of the ALT_NOC_MPU_DMA_M0_QOS_SAT register for the ALT_NOC_MPU_DMA_M0_QOS instance. */
9871 #define ALT_NOC_MPU_DMA_M0_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_SAT_OFST))
9872 /* The address of the ALT_NOC_MPU_DMA_M0_QOS_EXTCTL register for the ALT_NOC_MPU_DMA_M0_QOS instance. */
9873 #define ALT_NOC_MPU_DMA_M0_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_EXTCTL_OFST))
9874 /* The base address byte offset for the start of the ALT_NOC_MPU_DMA_M0_QOS component. */
9875 #define ALT_NOC_MPU_DMA_M0_QOS_OFST 0xffd16280
9876 /* The start address of the ALT_NOC_MPU_DMA_M0_QOS component. */
9877 #define ALT_NOC_MPU_DMA_M0_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_OFST))
9878 /* The lower bound address range of the ALT_NOC_MPU_DMA_M0_QOS component. */
9879 #define ALT_NOC_MPU_DMA_M0_QOS_LB_ADDR ALT_NOC_MPU_DMA_M0_QOS_ADDR
9880 /* The upper bound address range of the ALT_NOC_MPU_DMA_M0_QOS component. */
9881 #define ALT_NOC_MPU_DMA_M0_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + 0x80) - 1))
9882 
9883 
9884 /*
9885  * Component Instance : i_noc_mpu_m0_emac0_m_I_main_QosGenerator
9886  *
9887  * Instance i_noc_mpu_m0_emac0_m_I_main_QosGenerator of component ALT_NOC_MPU_EMAC0_M_QOS.
9888  *
9889  *
9890  */
9891 /* The address of the ALT_NOC_MPU_EMAC0_M_QOS_COREID register for the ALT_NOC_MPU_EMAC0_M_QOS instance. */
9892 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_COREID_OFST))
9893 /* The address of the ALT_NOC_MPU_EMAC0_M_QOS_REVID register for the ALT_NOC_MPU_EMAC0_M_QOS instance. */
9894 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_REVID_OFST))
9895 /* The address of the ALT_NOC_MPU_EMAC0_M_QOS_PRI register for the ALT_NOC_MPU_EMAC0_M_QOS instance. */
9896 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_PRI_OFST))
9897 /* The address of the ALT_NOC_MPU_EMAC0_M_QOS_MOD register for the ALT_NOC_MPU_EMAC0_M_QOS instance. */
9898 #define ALT_NOC_MPU_EMAC0_M_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_MOD_OFST))
9899 /* The address of the ALT_NOC_MPU_EMAC0_M_QOS_BWDTH register for the ALT_NOC_MPU_EMAC0_M_QOS instance. */
9900 #define ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_OFST))
9901 /* The address of the ALT_NOC_MPU_EMAC0_M_QOS_SAT register for the ALT_NOC_MPU_EMAC0_M_QOS instance. */
9902 #define ALT_NOC_MPU_EMAC0_M_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_SAT_OFST))
9903 /* The address of the ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL register for the ALT_NOC_MPU_EMAC0_M_QOS instance. */
9904 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_OFST))
9905 /* The base address byte offset for the start of the ALT_NOC_MPU_EMAC0_M_QOS component. */
9906 #define ALT_NOC_MPU_EMAC0_M_QOS_OFST 0xffd16300
9907 /* The start address of the ALT_NOC_MPU_EMAC0_M_QOS component. */
9908 #define ALT_NOC_MPU_EMAC0_M_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_OFST))
9909 /* The lower bound address range of the ALT_NOC_MPU_EMAC0_M_QOS component. */
9910 #define ALT_NOC_MPU_EMAC0_M_QOS_LB_ADDR ALT_NOC_MPU_EMAC0_M_QOS_ADDR
9911 /* The upper bound address range of the ALT_NOC_MPU_EMAC0_M_QOS component. */
9912 #define ALT_NOC_MPU_EMAC0_M_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + 0x80) - 1))
9913 
9914 
9915 /*
9916  * Component Instance : i_noc_mpu_m0_emac1_m_I_main_QosGenerator
9917  *
9918  * Instance i_noc_mpu_m0_emac1_m_I_main_QosGenerator of component ALT_NOC_MPU_EMAC1_M_QOS.
9919  *
9920  *
9921  */
9922 /* The address of the ALT_NOC_MPU_EMAC1_M_QOS_COREID register for the ALT_NOC_MPU_EMAC1_M_QOS instance. */
9923 #define ALT_NOC_MPU_EMAC1_M_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_COREID_OFST))
9924 /* The address of the ALT_NOC_MPU_EMAC1_M_QOS_REVID register for the ALT_NOC_MPU_EMAC1_M_QOS instance. */
9925 #define ALT_NOC_MPU_EMAC1_M_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_REVID_OFST))
9926 /* The address of the ALT_NOC_MPU_EMAC1_M_QOS_PRI register for the ALT_NOC_MPU_EMAC1_M_QOS instance. */
9927 #define ALT_NOC_MPU_EMAC1_M_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_PRI_OFST))
9928 /* The address of the ALT_NOC_MPU_EMAC1_M_QOS_MOD register for the ALT_NOC_MPU_EMAC1_M_QOS instance. */
9929 #define ALT_NOC_MPU_EMAC1_M_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_MOD_OFST))
9930 /* The address of the ALT_NOC_MPU_EMAC1_M_QOS_BWDTH register for the ALT_NOC_MPU_EMAC1_M_QOS instance. */
9931 #define ALT_NOC_MPU_EMAC1_M_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_BWDTH_OFST))
9932 /* The address of the ALT_NOC_MPU_EMAC1_M_QOS_SAT register for the ALT_NOC_MPU_EMAC1_M_QOS instance. */
9933 #define ALT_NOC_MPU_EMAC1_M_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_SAT_OFST))
9934 /* The address of the ALT_NOC_MPU_EMAC1_M_QOS_EXTCTL register for the ALT_NOC_MPU_EMAC1_M_QOS instance. */
9935 #define ALT_NOC_MPU_EMAC1_M_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_EXTCTL_OFST))
9936 /* The base address byte offset for the start of the ALT_NOC_MPU_EMAC1_M_QOS component. */
9937 #define ALT_NOC_MPU_EMAC1_M_QOS_OFST 0xffd16380
9938 /* The start address of the ALT_NOC_MPU_EMAC1_M_QOS component. */
9939 #define ALT_NOC_MPU_EMAC1_M_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_OFST))
9940 /* The lower bound address range of the ALT_NOC_MPU_EMAC1_M_QOS component. */
9941 #define ALT_NOC_MPU_EMAC1_M_QOS_LB_ADDR ALT_NOC_MPU_EMAC1_M_QOS_ADDR
9942 /* The upper bound address range of the ALT_NOC_MPU_EMAC1_M_QOS component. */
9943 #define ALT_NOC_MPU_EMAC1_M_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + 0x80) - 1))
9944 
9945 
9946 /*
9947  * Component Instance : i_noc_mpu_m0_emac2_m_I_main_QosGenerator
9948  *
9949  * Instance i_noc_mpu_m0_emac2_m_I_main_QosGenerator of component ALT_NOC_MPU_EMAC2_M_QOS.
9950  *
9951  *
9952  */
9953 /* The address of the ALT_NOC_MPU_EMAC2_M_QOS_COREID register for the ALT_NOC_MPU_EMAC2_M_QOS instance. */
9954 #define ALT_NOC_MPU_EMAC2_M_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_COREID_OFST))
9955 /* The address of the ALT_NOC_MPU_EMAC2_M_QOS_REVID register for the ALT_NOC_MPU_EMAC2_M_QOS instance. */
9956 #define ALT_NOC_MPU_EMAC2_M_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_REVID_OFST))
9957 /* The address of the ALT_NOC_MPU_EMAC2_M_QOS_PRI register for the ALT_NOC_MPU_EMAC2_M_QOS instance. */
9958 #define ALT_NOC_MPU_EMAC2_M_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_PRI_OFST))
9959 /* The address of the ALT_NOC_MPU_EMAC2_M_QOS_MOD register for the ALT_NOC_MPU_EMAC2_M_QOS instance. */
9960 #define ALT_NOC_MPU_EMAC2_M_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_MOD_OFST))
9961 /* The address of the ALT_NOC_MPU_EMAC2_M_QOS_BWDTH register for the ALT_NOC_MPU_EMAC2_M_QOS instance. */
9962 #define ALT_NOC_MPU_EMAC2_M_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_BWDTH_OFST))
9963 /* The address of the ALT_NOC_MPU_EMAC2_M_QOS_SAT register for the ALT_NOC_MPU_EMAC2_M_QOS instance. */
9964 #define ALT_NOC_MPU_EMAC2_M_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_SAT_OFST))
9965 /* The address of the ALT_NOC_MPU_EMAC2_M_QOS_EXTCTL register for the ALT_NOC_MPU_EMAC2_M_QOS instance. */
9966 #define ALT_NOC_MPU_EMAC2_M_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_EXTCTL_OFST))
9967 /* The base address byte offset for the start of the ALT_NOC_MPU_EMAC2_M_QOS component. */
9968 #define ALT_NOC_MPU_EMAC2_M_QOS_OFST 0xffd16400
9969 /* The start address of the ALT_NOC_MPU_EMAC2_M_QOS component. */
9970 #define ALT_NOC_MPU_EMAC2_M_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_OFST))
9971 /* The lower bound address range of the ALT_NOC_MPU_EMAC2_M_QOS component. */
9972 #define ALT_NOC_MPU_EMAC2_M_QOS_LB_ADDR ALT_NOC_MPU_EMAC2_M_QOS_ADDR
9973 /* The upper bound address range of the ALT_NOC_MPU_EMAC2_M_QOS component. */
9974 #define ALT_NOC_MPU_EMAC2_M_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + 0x80) - 1))
9975 
9976 
9977 /*
9978  * Component Instance : i_noc_mpu_m0_usb0_m_I_main_QosGenerator
9979  *
9980  * Instance i_noc_mpu_m0_usb0_m_I_main_QosGenerator of component ALT_NOC_MPU_USB0_M_MAIN_QOS.
9981  *
9982  *
9983  */
9984 /* The address of the ALT_NOC_MPU_USB0_M_MAIN_QOS_COREID register for the ALT_NOC_MPU_USB0_M_MAIN_QOS instance. */
9985 #define ALT_NOC_MPU_USB0_M_MAIN_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_COREID_OFST))
9986 /* The address of the ALT_NOC_MPU_USB0_M_MAIN_QOS_REVID register for the ALT_NOC_MPU_USB0_M_MAIN_QOS instance. */
9987 #define ALT_NOC_MPU_USB0_M_MAIN_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_REVID_OFST))
9988 /* The address of the ALT_NOC_MPU_USB0_M_MAIN_QOS_PRI register for the ALT_NOC_MPU_USB0_M_MAIN_QOS instance. */
9989 #define ALT_NOC_MPU_USB0_M_MAIN_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_PRI_OFST))
9990 /* The address of the ALT_NOC_MPU_USB0_M_MAIN_QOS_MOD register for the ALT_NOC_MPU_USB0_M_MAIN_QOS instance. */
9991 #define ALT_NOC_MPU_USB0_M_MAIN_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_MOD_OFST))
9992 /* The address of the ALT_NOC_MPU_USB0_M_MAIN_QOS_BWDTH register for the ALT_NOC_MPU_USB0_M_MAIN_QOS instance. */
9993 #define ALT_NOC_MPU_USB0_M_MAIN_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_BWDTH_OFST))
9994 /* The address of the ALT_NOC_MPU_USB0_M_MAIN_QOS_SAT register for the ALT_NOC_MPU_USB0_M_MAIN_QOS instance. */
9995 #define ALT_NOC_MPU_USB0_M_MAIN_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_SAT_OFST))
9996 /* The address of the ALT_NOC_MPU_USB0_M_MAIN_QOS_EXTCTL register for the ALT_NOC_MPU_USB0_M_MAIN_QOS instance. */
9997 #define ALT_NOC_MPU_USB0_M_MAIN_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_EXTCTL_OFST))
9998 /* The base address byte offset for the start of the ALT_NOC_MPU_USB0_M_MAIN_QOS component. */
9999 #define ALT_NOC_MPU_USB0_M_MAIN_QOS_OFST 0xffd16480
10000 /* The start address of the ALT_NOC_MPU_USB0_M_MAIN_QOS component. */
10001 #define ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_OFST))
10002 /* The lower bound address range of the ALT_NOC_MPU_USB0_M_MAIN_QOS component. */
10003 #define ALT_NOC_MPU_USB0_M_MAIN_QOS_LB_ADDR ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR
10004 /* The upper bound address range of the ALT_NOC_MPU_USB0_M_MAIN_QOS component. */
10005 #define ALT_NOC_MPU_USB0_M_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + 0x80) - 1))
10006 
10007 
10008 /*
10009  * Component Instance : i_noc_mpu_m0_usb1_m_I_main_QosGenerator
10010  *
10011  * Instance i_noc_mpu_m0_usb1_m_I_main_QosGenerator of component ALT_NOC_MPU_USB1_M_MAIN_QOS.
10012  *
10013  *
10014  */
10015 /* The address of the ALT_NOC_MPU_USB1_M_MAIN_QOS_COREID register for the ALT_NOC_MPU_USB1_M_MAIN_QOS instance. */
10016 #define ALT_NOC_MPU_USB1_M_MAIN_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_COREID_OFST))
10017 /* The address of the ALT_NOC_MPU_USB1_M_MAIN_QOS_REVID register for the ALT_NOC_MPU_USB1_M_MAIN_QOS instance. */
10018 #define ALT_NOC_MPU_USB1_M_MAIN_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_REVID_OFST))
10019 /* The address of the ALT_NOC_MPU_USB1_M_MAIN_QOS_PRI register for the ALT_NOC_MPU_USB1_M_MAIN_QOS instance. */
10020 #define ALT_NOC_MPU_USB1_M_MAIN_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_PRI_OFST))
10021 /* The address of the ALT_NOC_MPU_USB1_M_MAIN_QOS_MOD register for the ALT_NOC_MPU_USB1_M_MAIN_QOS instance. */
10022 #define ALT_NOC_MPU_USB1_M_MAIN_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_MOD_OFST))
10023 /* The address of the ALT_NOC_MPU_USB1_M_MAIN_QOS_BWDTH register for the ALT_NOC_MPU_USB1_M_MAIN_QOS instance. */
10024 #define ALT_NOC_MPU_USB1_M_MAIN_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_BWDTH_OFST))
10025 /* The address of the ALT_NOC_MPU_USB1_M_MAIN_QOS_SAT register for the ALT_NOC_MPU_USB1_M_MAIN_QOS instance. */
10026 #define ALT_NOC_MPU_USB1_M_MAIN_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_SAT_OFST))
10027 /* The address of the ALT_NOC_MPU_USB1_M_MAIN_QOS_EXTCTL register for the ALT_NOC_MPU_USB1_M_MAIN_QOS instance. */
10028 #define ALT_NOC_MPU_USB1_M_MAIN_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_EXTCTL_OFST))
10029 /* The base address byte offset for the start of the ALT_NOC_MPU_USB1_M_MAIN_QOS component. */
10030 #define ALT_NOC_MPU_USB1_M_MAIN_QOS_OFST 0xffd16500
10031 /* The start address of the ALT_NOC_MPU_USB1_M_MAIN_QOS component. */
10032 #define ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_OFST))
10033 /* The lower bound address range of the ALT_NOC_MPU_USB1_M_MAIN_QOS component. */
10034 #define ALT_NOC_MPU_USB1_M_MAIN_QOS_LB_ADDR ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR
10035 /* The upper bound address range of the ALT_NOC_MPU_USB1_M_MAIN_QOS component. */
10036 #define ALT_NOC_MPU_USB1_M_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + 0x80) - 1))
10037 
10038 
10039 /*
10040  * Component Instance : i_noc_mpu_m0_nand_m_I_main_QosGenerator
10041  *
10042  * Instance i_noc_mpu_m0_nand_m_I_main_QosGenerator of component ALT_NOC_MPU_NAND_M_MAIN_QOS.
10043  *
10044  *
10045  */
10046 /* The address of the ALT_NOC_MPU_NAND_M_MAIN_QOS_COREID register for the ALT_NOC_MPU_NAND_M_MAIN_QOS instance. */
10047 #define ALT_NOC_MPU_NAND_M_MAIN_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_COREID_OFST))
10048 /* The address of the ALT_NOC_MPU_NAND_M_MAIN_QOS_REVID register for the ALT_NOC_MPU_NAND_M_MAIN_QOS instance. */
10049 #define ALT_NOC_MPU_NAND_M_MAIN_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_REVID_OFST))
10050 /* The address of the ALT_NOC_MPU_NAND_M_MAIN_QOS_PRI register for the ALT_NOC_MPU_NAND_M_MAIN_QOS instance. */
10051 #define ALT_NOC_MPU_NAND_M_MAIN_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_PRI_OFST))
10052 /* The address of the ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD register for the ALT_NOC_MPU_NAND_M_MAIN_QOS instance. */
10053 #define ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_OFST))
10054 /* The address of the ALT_NOC_MPU_NAND_M_MAIN_QOS_BWDTH register for the ALT_NOC_MPU_NAND_M_MAIN_QOS instance. */
10055 #define ALT_NOC_MPU_NAND_M_MAIN_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_BWDTH_OFST))
10056 /* The address of the ALT_NOC_MPU_NAND_M_MAIN_QOS_SAT register for the ALT_NOC_MPU_NAND_M_MAIN_QOS instance. */
10057 #define ALT_NOC_MPU_NAND_M_MAIN_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_SAT_OFST))
10058 /* The address of the ALT_NOC_MPU_NAND_M_MAIN_QOS_EXTCTL register for the ALT_NOC_MPU_NAND_M_MAIN_QOS instance. */
10059 #define ALT_NOC_MPU_NAND_M_MAIN_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_EXTCTL_OFST))
10060 /* The base address byte offset for the start of the ALT_NOC_MPU_NAND_M_MAIN_QOS component. */
10061 #define ALT_NOC_MPU_NAND_M_MAIN_QOS_OFST 0xffd16580
10062 /* The start address of the ALT_NOC_MPU_NAND_M_MAIN_QOS component. */
10063 #define ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_OFST))
10064 /* The lower bound address range of the ALT_NOC_MPU_NAND_M_MAIN_QOS component. */
10065 #define ALT_NOC_MPU_NAND_M_MAIN_QOS_LB_ADDR ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR
10066 /* The upper bound address range of the ALT_NOC_MPU_NAND_M_MAIN_QOS component. */
10067 #define ALT_NOC_MPU_NAND_M_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + 0x80) - 1))
10068 
10069 
10070 /*
10071  * Component Instance : i_noc_mpu_m0_sdmmc_m_I_main_QosGenerator
10072  *
10073  * Instance i_noc_mpu_m0_sdmmc_m_I_main_QosGenerator of component ALT_NOC_MPU_SDMMC_M_MAIN_QOS.
10074  *
10075  *
10076  */
10077 /* The address of the ALT_NOC_MPU_SDMMC_M_MAIN_QOS_COREID register for the ALT_NOC_MPU_SDMMC_M_MAIN_QOS instance. */
10078 #define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_COREID_OFST))
10079 /* The address of the ALT_NOC_MPU_SDMMC_M_MAIN_QOS_REVID register for the ALT_NOC_MPU_SDMMC_M_MAIN_QOS instance. */
10080 #define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_REVID_OFST))
10081 /* The address of the ALT_NOC_MPU_SDMMC_M_MAIN_QOS_PRI register for the ALT_NOC_MPU_SDMMC_M_MAIN_QOS instance. */
10082 #define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_PRI_OFST))
10083 /* The address of the ALT_NOC_MPU_SDMMC_M_MAIN_QOS_MOD register for the ALT_NOC_MPU_SDMMC_M_MAIN_QOS instance. */
10084 #define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_MOD_OFST))
10085 /* The address of the ALT_NOC_MPU_SDMMC_M_MAIN_QOS_BWDTH register for the ALT_NOC_MPU_SDMMC_M_MAIN_QOS instance. */
10086 #define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_BWDTH_OFST))
10087 /* The address of the ALT_NOC_MPU_SDMMC_M_MAIN_QOS_SAT register for the ALT_NOC_MPU_SDMMC_M_MAIN_QOS instance. */
10088 #define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_SAT_OFST))
10089 /* The address of the ALT_NOC_MPU_SDMMC_M_MAIN_QOS_EXTCTL register for the ALT_NOC_MPU_SDMMC_M_MAIN_QOS instance. */
10090 #define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_EXTCTL_OFST))
10091 /* The base address byte offset for the start of the ALT_NOC_MPU_SDMMC_M_MAIN_QOS component. */
10092 #define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_OFST 0xffd16600
10093 /* The start address of the ALT_NOC_MPU_SDMMC_M_MAIN_QOS component. */
10094 #define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_OFST))
10095 /* The lower bound address range of the ALT_NOC_MPU_SDMMC_M_MAIN_QOS component. */
10096 #define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_LB_ADDR ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR
10097 /* The upper bound address range of the ALT_NOC_MPU_SDMMC_M_MAIN_QOS component. */
10098 #define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + 0x80) - 1))
10099 
10100 
10101 /*
10102  * Component Instance : i_noc_mpu_m0_fpga2sdram0_axi32_I_main_QosGenerator
10103  *
10104  * Instance i_noc_mpu_m0_fpga2sdram0_axi32_I_main_QosGenerator of component ALT_NOC_MPU_F2SDR0_AXI32_QOS.
10105  *
10106  *
10107  */
10108 /* The address of the ALT_NOC_MPU_F2SDR0_AXI32_QOS_COREID register for the ALT_NOC_MPU_F2SDR0_AXI32_QOS instance. */
10109 #define ALT_NOC_MPU_F2SDR0_AXI32_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_COREID_OFST))
10110 /* The address of the ALT_NOC_MPU_F2SDR0_AXI32_QOS_REVID register for the ALT_NOC_MPU_F2SDR0_AXI32_QOS instance. */
10111 #define ALT_NOC_MPU_F2SDR0_AXI32_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_REVID_OFST))
10112 /* The address of the ALT_NOC_MPU_F2SDR0_AXI32_QOS_PRI register for the ALT_NOC_MPU_F2SDR0_AXI32_QOS instance. */
10113 #define ALT_NOC_MPU_F2SDR0_AXI32_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_PRI_OFST))
10114 /* The address of the ALT_NOC_MPU_F2SDR0_AXI32_QOS_MOD register for the ALT_NOC_MPU_F2SDR0_AXI32_QOS instance. */
10115 #define ALT_NOC_MPU_F2SDR0_AXI32_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_MOD_OFST))
10116 /* The address of the ALT_NOC_MPU_F2SDR0_AXI32_QOS_BWDTH register for the ALT_NOC_MPU_F2SDR0_AXI32_QOS instance. */
10117 #define ALT_NOC_MPU_F2SDR0_AXI32_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_BWDTH_OFST))
10118 /* The address of the ALT_NOC_MPU_F2SDR0_AXI32_QOS_SAT register for the ALT_NOC_MPU_F2SDR0_AXI32_QOS instance. */
10119 #define ALT_NOC_MPU_F2SDR0_AXI32_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_SAT_OFST))
10120 /* The address of the ALT_NOC_MPU_F2SDR0_AXI32_QOS_EXTCTL register for the ALT_NOC_MPU_F2SDR0_AXI32_QOS instance. */
10121 #define ALT_NOC_MPU_F2SDR0_AXI32_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_EXTCTL_OFST))
10122 /* The base address byte offset for the start of the ALT_NOC_MPU_F2SDR0_AXI32_QOS component. */
10123 #define ALT_NOC_MPU_F2SDR0_AXI32_QOS_OFST 0xffd16680
10124 /* The start address of the ALT_NOC_MPU_F2SDR0_AXI32_QOS component. */
10125 #define ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_OFST))
10126 /* The lower bound address range of the ALT_NOC_MPU_F2SDR0_AXI32_QOS component. */
10127 #define ALT_NOC_MPU_F2SDR0_AXI32_QOS_LB_ADDR ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR
10128 /* The upper bound address range of the ALT_NOC_MPU_F2SDR0_AXI32_QOS component. */
10129 #define ALT_NOC_MPU_F2SDR0_AXI32_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + 0x80) - 1))
10130 
10131 
10132 /*
10133  * Component Instance : i_noc_mpu_m0_fpga2sdram0_axi64_I_main_QosGenerator
10134  *
10135  * Instance i_noc_mpu_m0_fpga2sdram0_axi64_I_main_QosGenerator of component ALT_NOC_MPU_F2SDR0_AXI64_QOS.
10136  *
10137  *
10138  */
10139 /* The address of the ALT_NOC_MPU_F2SDR0_AXI64_QOS_COREID register for the ALT_NOC_MPU_F2SDR0_AXI64_QOS instance. */
10140 #define ALT_NOC_MPU_F2SDR0_AXI64_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_COREID_OFST))
10141 /* The address of the ALT_NOC_MPU_F2SDR0_AXI64_QOS_REVID register for the ALT_NOC_MPU_F2SDR0_AXI64_QOS instance. */
10142 #define ALT_NOC_MPU_F2SDR0_AXI64_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_REVID_OFST))
10143 /* The address of the ALT_NOC_MPU_F2SDR0_AXI64_QOS_PRI register for the ALT_NOC_MPU_F2SDR0_AXI64_QOS instance. */
10144 #define ALT_NOC_MPU_F2SDR0_AXI64_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_PRI_OFST))
10145 /* The address of the ALT_NOC_MPU_F2SDR0_AXI64_QOS_MOD register for the ALT_NOC_MPU_F2SDR0_AXI64_QOS instance. */
10146 #define ALT_NOC_MPU_F2SDR0_AXI64_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_MOD_OFST))
10147 /* The address of the ALT_NOC_MPU_F2SDR0_AXI64_QOS_BWDTH register for the ALT_NOC_MPU_F2SDR0_AXI64_QOS instance. */
10148 #define ALT_NOC_MPU_F2SDR0_AXI64_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_BWDTH_OFST))
10149 /* The address of the ALT_NOC_MPU_F2SDR0_AXI64_QOS_SAT register for the ALT_NOC_MPU_F2SDR0_AXI64_QOS instance. */
10150 #define ALT_NOC_MPU_F2SDR0_AXI64_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_SAT_OFST))
10151 /* The address of the ALT_NOC_MPU_F2SDR0_AXI64_QOS_EXTCTL register for the ALT_NOC_MPU_F2SDR0_AXI64_QOS instance. */
10152 #define ALT_NOC_MPU_F2SDR0_AXI64_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_EXTCTL_OFST))
10153 /* The base address byte offset for the start of the ALT_NOC_MPU_F2SDR0_AXI64_QOS component. */
10154 #define ALT_NOC_MPU_F2SDR0_AXI64_QOS_OFST 0xffd16700
10155 /* The start address of the ALT_NOC_MPU_F2SDR0_AXI64_QOS component. */
10156 #define ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_OFST))
10157 /* The lower bound address range of the ALT_NOC_MPU_F2SDR0_AXI64_QOS component. */
10158 #define ALT_NOC_MPU_F2SDR0_AXI64_QOS_LB_ADDR ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR
10159 /* The upper bound address range of the ALT_NOC_MPU_F2SDR0_AXI64_QOS component. */
10160 #define ALT_NOC_MPU_F2SDR0_AXI64_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + 0x80) - 1))
10161 
10162 
10163 /*
10164  * Component Instance : i_noc_mpu_m0_fpga2sdram0_axi128_I_main_QosGenerator
10165  *
10166  * Instance i_noc_mpu_m0_fpga2sdram0_axi128_I_main_QosGenerator of component ALT_NOC_MPU_F2SDR0_AXI128_QOS.
10167  *
10168  *
10169  */
10170 /* The address of the ALT_NOC_MPU_F2SDR0_AXI128_QOS_COREID register for the ALT_NOC_MPU_F2SDR0_AXI128_QOS instance. */
10171 #define ALT_NOC_MPU_F2SDR0_AXI128_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_COREID_OFST))
10172 /* The address of the ALT_NOC_MPU_F2SDR0_AXI128_QOS_REVID register for the ALT_NOC_MPU_F2SDR0_AXI128_QOS instance. */
10173 #define ALT_NOC_MPU_F2SDR0_AXI128_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_REVID_OFST))
10174 /* The address of the ALT_NOC_MPU_F2SDR0_AXI128_QOS_PRI register for the ALT_NOC_MPU_F2SDR0_AXI128_QOS instance. */
10175 #define ALT_NOC_MPU_F2SDR0_AXI128_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_PRI_OFST))
10176 /* The address of the ALT_NOC_MPU_F2SDR0_AXI128_QOS_MOD register for the ALT_NOC_MPU_F2SDR0_AXI128_QOS instance. */
10177 #define ALT_NOC_MPU_F2SDR0_AXI128_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_MOD_OFST))
10178 /* The address of the ALT_NOC_MPU_F2SDR0_AXI128_QOS_BWDTH register for the ALT_NOC_MPU_F2SDR0_AXI128_QOS instance. */
10179 #define ALT_NOC_MPU_F2SDR0_AXI128_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_BWDTH_OFST))
10180 /* The address of the ALT_NOC_MPU_F2SDR0_AXI128_QOS_SAT register for the ALT_NOC_MPU_F2SDR0_AXI128_QOS instance. */
10181 #define ALT_NOC_MPU_F2SDR0_AXI128_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_SAT_OFST))
10182 /* The address of the ALT_NOC_MPU_F2SDR0_AXI128_QOS_EXTCTL register for the ALT_NOC_MPU_F2SDR0_AXI128_QOS instance. */
10183 #define ALT_NOC_MPU_F2SDR0_AXI128_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_EXTCTL_OFST))
10184 /* The base address byte offset for the start of the ALT_NOC_MPU_F2SDR0_AXI128_QOS component. */
10185 #define ALT_NOC_MPU_F2SDR0_AXI128_QOS_OFST 0xffd16780
10186 /* The start address of the ALT_NOC_MPU_F2SDR0_AXI128_QOS component. */
10187 #define ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_OFST))
10188 /* The lower bound address range of the ALT_NOC_MPU_F2SDR0_AXI128_QOS component. */
10189 #define ALT_NOC_MPU_F2SDR0_AXI128_QOS_LB_ADDR ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR
10190 /* The upper bound address range of the ALT_NOC_MPU_F2SDR0_AXI128_QOS component. */
10191 #define ALT_NOC_MPU_F2SDR0_AXI128_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + 0x80) - 1))
10192 
10193 
10194 /*
10195  * Component Instance : i_noc_mpu_m0_fpga2sdram1_axi32_I_main_QosGenerator
10196  *
10197  * Instance i_noc_mpu_m0_fpga2sdram1_axi32_I_main_QosGenerator of component ALT_NOC_MPU_F2SDR1_AXI32_QOS.
10198  *
10199  *
10200  */
10201 /* The address of the ALT_NOC_MPU_F2SDR1_AXI32_QOS_COREID register for the ALT_NOC_MPU_F2SDR1_AXI32_QOS instance. */
10202 #define ALT_NOC_MPU_F2SDR1_AXI32_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_COREID_OFST))
10203 /* The address of the ALT_NOC_MPU_F2SDR1_AXI32_QOS_REVID register for the ALT_NOC_MPU_F2SDR1_AXI32_QOS instance. */
10204 #define ALT_NOC_MPU_F2SDR1_AXI32_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_REVID_OFST))
10205 /* The address of the ALT_NOC_MPU_F2SDR1_AXI32_QOS_PRI register for the ALT_NOC_MPU_F2SDR1_AXI32_QOS instance. */
10206 #define ALT_NOC_MPU_F2SDR1_AXI32_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_PRI_OFST))
10207 /* The address of the ALT_NOC_MPU_F2SDR1_AXI32_QOS_MOD register for the ALT_NOC_MPU_F2SDR1_AXI32_QOS instance. */
10208 #define ALT_NOC_MPU_F2SDR1_AXI32_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_MOD_OFST))
10209 /* The address of the ALT_NOC_MPU_F2SDR1_AXI32_QOS_BWDTH register for the ALT_NOC_MPU_F2SDR1_AXI32_QOS instance. */
10210 #define ALT_NOC_MPU_F2SDR1_AXI32_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_BWDTH_OFST))
10211 /* The address of the ALT_NOC_MPU_F2SDR1_AXI32_QOS_SAT register for the ALT_NOC_MPU_F2SDR1_AXI32_QOS instance. */
10212 #define ALT_NOC_MPU_F2SDR1_AXI32_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_SAT_OFST))
10213 /* The address of the ALT_NOC_MPU_F2SDR1_AXI32_QOS_EXTCTL register for the ALT_NOC_MPU_F2SDR1_AXI32_QOS instance. */
10214 #define ALT_NOC_MPU_F2SDR1_AXI32_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_EXTCTL_OFST))
10215 /* The base address byte offset for the start of the ALT_NOC_MPU_F2SDR1_AXI32_QOS component. */
10216 #define ALT_NOC_MPU_F2SDR1_AXI32_QOS_OFST 0xffd16800
10217 /* The start address of the ALT_NOC_MPU_F2SDR1_AXI32_QOS component. */
10218 #define ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_OFST))
10219 /* The lower bound address range of the ALT_NOC_MPU_F2SDR1_AXI32_QOS component. */
10220 #define ALT_NOC_MPU_F2SDR1_AXI32_QOS_LB_ADDR ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR
10221 /* The upper bound address range of the ALT_NOC_MPU_F2SDR1_AXI32_QOS component. */
10222 #define ALT_NOC_MPU_F2SDR1_AXI32_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + 0x80) - 1))
10223 
10224 
10225 /*
10226  * Component Instance : i_noc_mpu_m0_fpga2sdram1_axi64_I_main_QosGenerator
10227  *
10228  * Instance i_noc_mpu_m0_fpga2sdram1_axi64_I_main_QosGenerator of component ALT_NOC_MPU_F2SDR1_AXI64_QOS.
10229  *
10230  *
10231  */
10232 /* The address of the ALT_NOC_MPU_F2SDR1_AXI64_QOS_COREID register for the ALT_NOC_MPU_F2SDR1_AXI64_QOS instance. */
10233 #define ALT_NOC_MPU_F2SDR1_AXI64_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_COREID_OFST))
10234 /* The address of the ALT_NOC_MPU_F2SDR1_AXI64_QOS_REVID register for the ALT_NOC_MPU_F2SDR1_AXI64_QOS instance. */
10235 #define ALT_NOC_MPU_F2SDR1_AXI64_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_REVID_OFST))
10236 /* The address of the ALT_NOC_MPU_F2SDR1_AXI64_QOS_PRI register for the ALT_NOC_MPU_F2SDR1_AXI64_QOS instance. */
10237 #define ALT_NOC_MPU_F2SDR1_AXI64_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_PRI_OFST))
10238 /* The address of the ALT_NOC_MPU_F2SDR1_AXI64_QOS_MOD register for the ALT_NOC_MPU_F2SDR1_AXI64_QOS instance. */
10239 #define ALT_NOC_MPU_F2SDR1_AXI64_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_MOD_OFST))
10240 /* The address of the ALT_NOC_MPU_F2SDR1_AXI64_QOS_BWDTH register for the ALT_NOC_MPU_F2SDR1_AXI64_QOS instance. */
10241 #define ALT_NOC_MPU_F2SDR1_AXI64_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_BWDTH_OFST))
10242 /* The address of the ALT_NOC_MPU_F2SDR1_AXI64_QOS_SAT register for the ALT_NOC_MPU_F2SDR1_AXI64_QOS instance. */
10243 #define ALT_NOC_MPU_F2SDR1_AXI64_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_SAT_OFST))
10244 /* The address of the ALT_NOC_MPU_F2SDR1_AXI64_QOS_EXTCTL register for the ALT_NOC_MPU_F2SDR1_AXI64_QOS instance. */
10245 #define ALT_NOC_MPU_F2SDR1_AXI64_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_EXTCTL_OFST))
10246 /* The base address byte offset for the start of the ALT_NOC_MPU_F2SDR1_AXI64_QOS component. */
10247 #define ALT_NOC_MPU_F2SDR1_AXI64_QOS_OFST 0xffd16880
10248 /* The start address of the ALT_NOC_MPU_F2SDR1_AXI64_QOS component. */
10249 #define ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_OFST))
10250 /* The lower bound address range of the ALT_NOC_MPU_F2SDR1_AXI64_QOS component. */
10251 #define ALT_NOC_MPU_F2SDR1_AXI64_QOS_LB_ADDR ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR
10252 /* The upper bound address range of the ALT_NOC_MPU_F2SDR1_AXI64_QOS component. */
10253 #define ALT_NOC_MPU_F2SDR1_AXI64_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + 0x80) - 1))
10254 
10255 
10256 /*
10257  * Component Instance : i_noc_mpu_m0_fpga2sdram2_axi32_I_main_QosGenerator
10258  *
10259  * Instance i_noc_mpu_m0_fpga2sdram2_axi32_I_main_QosGenerator of component ALT_NOC_MPU_F2SDR2_AXI32_QOS.
10260  *
10261  *
10262  */
10263 /* The address of the ALT_NOC_MPU_F2SDR2_AXI32_QOS_COREID register for the ALT_NOC_MPU_F2SDR2_AXI32_QOS instance. */
10264 #define ALT_NOC_MPU_F2SDR2_AXI32_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_COREID_OFST))
10265 /* The address of the ALT_NOC_MPU_F2SDR2_AXI32_QOS_REVID register for the ALT_NOC_MPU_F2SDR2_AXI32_QOS instance. */
10266 #define ALT_NOC_MPU_F2SDR2_AXI32_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_REVID_OFST))
10267 /* The address of the ALT_NOC_MPU_F2SDR2_AXI32_QOS_PRI register for the ALT_NOC_MPU_F2SDR2_AXI32_QOS instance. */
10268 #define ALT_NOC_MPU_F2SDR2_AXI32_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_PRI_OFST))
10269 /* The address of the ALT_NOC_MPU_F2SDR2_AXI32_QOS_MOD register for the ALT_NOC_MPU_F2SDR2_AXI32_QOS instance. */
10270 #define ALT_NOC_MPU_F2SDR2_AXI32_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_MOD_OFST))
10271 /* The address of the ALT_NOC_MPU_F2SDR2_AXI32_QOS_BWDTH register for the ALT_NOC_MPU_F2SDR2_AXI32_QOS instance. */
10272 #define ALT_NOC_MPU_F2SDR2_AXI32_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_BWDTH_OFST))
10273 /* The address of the ALT_NOC_MPU_F2SDR2_AXI32_QOS_SAT register for the ALT_NOC_MPU_F2SDR2_AXI32_QOS instance. */
10274 #define ALT_NOC_MPU_F2SDR2_AXI32_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_SAT_OFST))
10275 /* The address of the ALT_NOC_MPU_F2SDR2_AXI32_QOS_EXTCTL register for the ALT_NOC_MPU_F2SDR2_AXI32_QOS instance. */
10276 #define ALT_NOC_MPU_F2SDR2_AXI32_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_EXTCTL_OFST))
10277 /* The base address byte offset for the start of the ALT_NOC_MPU_F2SDR2_AXI32_QOS component. */
10278 #define ALT_NOC_MPU_F2SDR2_AXI32_QOS_OFST 0xffd16900
10279 /* The start address of the ALT_NOC_MPU_F2SDR2_AXI32_QOS component. */
10280 #define ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_OFST))
10281 /* The lower bound address range of the ALT_NOC_MPU_F2SDR2_AXI32_QOS component. */
10282 #define ALT_NOC_MPU_F2SDR2_AXI32_QOS_LB_ADDR ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR
10283 /* The upper bound address range of the ALT_NOC_MPU_F2SDR2_AXI32_QOS component. */
10284 #define ALT_NOC_MPU_F2SDR2_AXI32_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + 0x80) - 1))
10285 
10286 
10287 /*
10288  * Component Instance : i_noc_mpu_m0_fpga2sdram2_axi64_I_main_QosGenerator
10289  *
10290  * Instance i_noc_mpu_m0_fpga2sdram2_axi64_I_main_QosGenerator of component ALT_NOC_MPU_F2SDR2_AXI64_QOS.
10291  *
10292  *
10293  */
10294 /* The address of the ALT_NOC_MPU_F2SDR2_AXI64_QOS_COREID register for the ALT_NOC_MPU_F2SDR2_AXI64_QOS instance. */
10295 #define ALT_NOC_MPU_F2SDR2_AXI64_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_COREID_OFST))
10296 /* The address of the ALT_NOC_MPU_F2SDR2_AXI64_QOS_REVID register for the ALT_NOC_MPU_F2SDR2_AXI64_QOS instance. */
10297 #define ALT_NOC_MPU_F2SDR2_AXI64_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_REVID_OFST))
10298 /* The address of the ALT_NOC_MPU_F2SDR2_AXI64_QOS_PRI register for the ALT_NOC_MPU_F2SDR2_AXI64_QOS instance. */
10299 #define ALT_NOC_MPU_F2SDR2_AXI64_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_PRI_OFST))
10300 /* The address of the ALT_NOC_MPU_F2SDR2_AXI64_QOS_MOD register for the ALT_NOC_MPU_F2SDR2_AXI64_QOS instance. */
10301 #define ALT_NOC_MPU_F2SDR2_AXI64_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_MOD_OFST))
10302 /* The address of the ALT_NOC_MPU_F2SDR2_AXI64_QOS_BWDTH register for the ALT_NOC_MPU_F2SDR2_AXI64_QOS instance. */
10303 #define ALT_NOC_MPU_F2SDR2_AXI64_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_BWDTH_OFST))
10304 /* The address of the ALT_NOC_MPU_F2SDR2_AXI64_QOS_SAT register for the ALT_NOC_MPU_F2SDR2_AXI64_QOS instance. */
10305 #define ALT_NOC_MPU_F2SDR2_AXI64_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_SAT_OFST))
10306 /* The address of the ALT_NOC_MPU_F2SDR2_AXI64_QOS_EXTCTL register for the ALT_NOC_MPU_F2SDR2_AXI64_QOS instance. */
10307 #define ALT_NOC_MPU_F2SDR2_AXI64_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_EXTCTL_OFST))
10308 /* The base address byte offset for the start of the ALT_NOC_MPU_F2SDR2_AXI64_QOS component. */
10309 #define ALT_NOC_MPU_F2SDR2_AXI64_QOS_OFST 0xffd16980
10310 /* The start address of the ALT_NOC_MPU_F2SDR2_AXI64_QOS component. */
10311 #define ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_OFST))
10312 /* The lower bound address range of the ALT_NOC_MPU_F2SDR2_AXI64_QOS component. */
10313 #define ALT_NOC_MPU_F2SDR2_AXI64_QOS_LB_ADDR ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR
10314 /* The upper bound address range of the ALT_NOC_MPU_F2SDR2_AXI64_QOS component. */
10315 #define ALT_NOC_MPU_F2SDR2_AXI64_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + 0x80) - 1))
10316 
10317 
10318 /*
10319  * Component Instance : i_noc_mpu_m0_fpga2sdram2_axi128_I_main_QosGenerator
10320  *
10321  * Instance i_noc_mpu_m0_fpga2sdram2_axi128_I_main_QosGenerator of component ALT_NOC_MPU_F2SDR2_AXI128_QOS.
10322  *
10323  *
10324  */
10325 /* The address of the ALT_NOC_MPU_F2SDR2_AXI128_QOS_COREID register for the ALT_NOC_MPU_F2SDR2_AXI128_QOS instance. */
10326 #define ALT_NOC_MPU_F2SDR2_AXI128_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_COREID_OFST))
10327 /* The address of the ALT_NOC_MPU_F2SDR2_AXI128_QOS_REVID register for the ALT_NOC_MPU_F2SDR2_AXI128_QOS instance. */
10328 #define ALT_NOC_MPU_F2SDR2_AXI128_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_REVID_OFST))
10329 /* The address of the ALT_NOC_MPU_F2SDR2_AXI128_QOS_PRI register for the ALT_NOC_MPU_F2SDR2_AXI128_QOS instance. */
10330 #define ALT_NOC_MPU_F2SDR2_AXI128_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_PRI_OFST))
10331 /* The address of the ALT_NOC_MPU_F2SDR2_AXI128_QOS_MOD register for the ALT_NOC_MPU_F2SDR2_AXI128_QOS instance. */
10332 #define ALT_NOC_MPU_F2SDR2_AXI128_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_MOD_OFST))
10333 /* The address of the ALT_NOC_MPU_F2SDR2_AXI128_QOS_BWDTH register for the ALT_NOC_MPU_F2SDR2_AXI128_QOS instance. */
10334 #define ALT_NOC_MPU_F2SDR2_AXI128_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_BWDTH_OFST))
10335 /* The address of the ALT_NOC_MPU_F2SDR2_AXI128_QOS_SAT register for the ALT_NOC_MPU_F2SDR2_AXI128_QOS instance. */
10336 #define ALT_NOC_MPU_F2SDR2_AXI128_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_SAT_OFST))
10337 /* The address of the ALT_NOC_MPU_F2SDR2_AXI128_QOS_EXTCTL register for the ALT_NOC_MPU_F2SDR2_AXI128_QOS instance. */
10338 #define ALT_NOC_MPU_F2SDR2_AXI128_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_EXTCTL_OFST))
10339 /* The base address byte offset for the start of the ALT_NOC_MPU_F2SDR2_AXI128_QOS component. */
10340 #define ALT_NOC_MPU_F2SDR2_AXI128_QOS_OFST 0xffd17000
10341 /* The start address of the ALT_NOC_MPU_F2SDR2_AXI128_QOS component. */
10342 #define ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_OFST))
10343 /* The lower bound address range of the ALT_NOC_MPU_F2SDR2_AXI128_QOS component. */
10344 #define ALT_NOC_MPU_F2SDR2_AXI128_QOS_LB_ADDR ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR
10345 /* The upper bound address range of the ALT_NOC_MPU_F2SDR2_AXI128_QOS component. */
10346 #define ALT_NOC_MPU_F2SDR2_AXI128_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + 0x80) - 1))
10347 
10348 
10349 /*
10350  * Component Instance : i_noc_mpu_m0_emac0_m_I_main_TransactionStatFilter
10351  *
10352  * Instance i_noc_mpu_m0_emac0_m_I_main_TransactionStatFilter of component ALT_NOC_MPU_EMAC0_M_XACTSTATFLT.
10353  *
10354  *
10355  */
10356 /* The address of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID register for the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT instance. */
10357 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_OFST))
10358 /* The address of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID register for the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT instance. */
10359 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_OFST))
10360 /* The address of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD register for the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT instance. */
10361 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_OFST))
10362 /* The address of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW register for the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT instance. */
10363 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_OFST))
10364 /* The address of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH register for the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT instance. */
10365 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_OFST))
10366 /* The address of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE register for the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT instance. */
10367 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_OFST))
10368 /* The address of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE register for the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT instance. */
10369 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_OFST))
10370 /* The address of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE register for the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT instance. */
10371 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_OFST))
10372 /* The address of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK register for the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT instance. */
10373 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_OFST))
10374 /* The address of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE register for the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT instance. */
10375 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_OFST))
10376 /* The address of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK register for the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT instance. */
10377 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_OFST))
10378 /* The base address byte offset for the start of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT component. */
10379 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OFST 0xffd17080
10380 /* The start address of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT component. */
10381 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OFST))
10382 /* The lower bound address range of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT component. */
10383 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_LB_ADDR ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR
10384 /* The upper bound address range of the ALT_NOC_MPU_EMAC0_M_XACTSTATFLT component. */
10385 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + 0x80) - 1))
10386 
10387 
10388 /*
10389  * Component Instance : i_dma_NSCONTROL
10390  *
10391  * Instance i_dma_NSCONTROL of component ALT_DMA_NSCTL.
10392  *
10393  *
10394  */
10395 /* The base address byte offset for the start of the ALT_DMA_NSCTL component. */
10396 #define ALT_DMA_NSCTL_OFST 0xffda0000
10397 /* The start address of the ALT_DMA_NSCTL component. */
10398 #define ALT_DMA_NSCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NSCTL_OFST))
10399 /* The lower bound address range of the ALT_DMA_NSCTL component. */
10400 #define ALT_DMA_NSCTL_LB_ADDR ALT_DMA_NSCTL_ADDR
10401 /* The upper bound address range of the ALT_DMA_NSCTL component. */
10402 #define ALT_DMA_NSCTL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NSCTL_ADDR) + 0x60) - 1))
10403 
10404 
10405 /*
10406  * Component Instance : i_dma_NSCHANNELSTATUS
10407  *
10408  * Instance i_dma_NSCHANNELSTATUS of component ALT_DMA_NSCHANNELSTAT.
10409  *
10410  *
10411  */
10412 /* The base address byte offset for the start of the ALT_DMA_NSCHANNELSTAT component. */
10413 #define ALT_DMA_NSCHANNELSTAT_OFST 0xffda0100
10414 /* The start address of the ALT_DMA_NSCHANNELSTAT component. */
10415 #define ALT_DMA_NSCHANNELSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NSCHANNELSTAT_OFST))
10416 /* The lower bound address range of the ALT_DMA_NSCHANNELSTAT component. */
10417 #define ALT_DMA_NSCHANNELSTAT_LB_ADDR ALT_DMA_NSCHANNELSTAT_ADDR
10418 /* The upper bound address range of the ALT_DMA_NSCHANNELSTAT component. */
10419 #define ALT_DMA_NSCHANNELSTAT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NSCHANNELSTAT_ADDR) + 0x40) - 1))
10420 
10421 
10422 /*
10423  * Component Instance : i_dma_NSAXISTATUS
10424  *
10425  * Instance i_dma_NSAXISTATUS of component ALT_DMA_NSAXISTAT.
10426  *
10427  *
10428  */
10429 /* The base address byte offset for the start of the ALT_DMA_NSAXISTAT component. */
10430 #define ALT_DMA_NSAXISTAT_OFST 0xffda0400
10431 /* The start address of the ALT_DMA_NSAXISTAT component. */
10432 #define ALT_DMA_NSAXISTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NSAXISTAT_OFST))
10433 /* The lower bound address range of the ALT_DMA_NSAXISTAT component. */
10434 #define ALT_DMA_NSAXISTAT_LB_ADDR ALT_DMA_NSAXISTAT_ADDR
10435 /* The upper bound address range of the ALT_DMA_NSAXISTAT component. */
10436 #define ALT_DMA_NSAXISTAT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NSAXISTAT_ADDR) + 0x100) - 1))
10437 
10438 
10439 /*
10440  * Component Instance : i_dma_NSDEBUG
10441  *
10442  * Instance i_dma_NSDEBUG of component ALT_DMA_NSDBG.
10443  *
10444  *
10445  */
10446 /* The base address byte offset for the start of the ALT_DMA_NSDBG component. */
10447 #define ALT_DMA_NSDBG_OFST 0xffda0d00
10448 /* The start address of the ALT_DMA_NSDBG component. */
10449 #define ALT_DMA_NSDBG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NSDBG_OFST))
10450 /* The lower bound address range of the ALT_DMA_NSDBG component. */
10451 #define ALT_DMA_NSDBG_LB_ADDR ALT_DMA_NSDBG_ADDR
10452 /* The upper bound address range of the ALT_DMA_NSDBG component. */
10453 #define ALT_DMA_NSDBG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NSDBG_ADDR) + 0x10) - 1))
10454 
10455 
10456 /*
10457  * Component Instance : i_dma_NSCONFIG
10458  *
10459  * Instance i_dma_NSCONFIG of component ALT_DMA_NSCFG.
10460  *
10461  *
10462  */
10463 /* The base address byte offset for the start of the ALT_DMA_NSCFG component. */
10464 #define ALT_DMA_NSCFG_OFST 0xffda0e00
10465 /* The start address of the ALT_DMA_NSCFG component. */
10466 #define ALT_DMA_NSCFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NSCFG_OFST))
10467 /* The lower bound address range of the ALT_DMA_NSCFG component. */
10468 #define ALT_DMA_NSCFG_LB_ADDR ALT_DMA_NSCFG_ADDR
10469 /* The upper bound address range of the ALT_DMA_NSCFG component. */
10470 #define ALT_DMA_NSCFG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NSCFG_ADDR) + 0x20) - 1))
10471 
10472 
10473 /*
10474  * Component Instance : i_dma_NSCOMPID
10475  *
10476  * Instance i_dma_NSCOMPID of component ALT_DMA_NSCOMPID.
10477  *
10478  *
10479  */
10480 /* The base address byte offset for the start of the ALT_DMA_NSCOMPID component. */
10481 #define ALT_DMA_NSCOMPID_OFST 0xffda0fe0
10482 /* The start address of the ALT_DMA_NSCOMPID component. */
10483 #define ALT_DMA_NSCOMPID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NSCOMPID_OFST))
10484 /* The lower bound address range of the ALT_DMA_NSCOMPID component. */
10485 #define ALT_DMA_NSCOMPID_LB_ADDR ALT_DMA_NSCOMPID_ADDR
10486 /* The upper bound address range of the ALT_DMA_NSCOMPID component. */
10487 #define ALT_DMA_NSCOMPID_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NSCOMPID_ADDR) + 0x20) - 1))
10488 
10489 
10490 /*
10491  * Component Instance : i_dma_SCONTROL
10492  *
10493  * Instance i_dma_SCONTROL of component ALT_DMA_SCTL.
10494  *
10495  *
10496  */
10497 /* The base address byte offset for the start of the ALT_DMA_SCTL component. */
10498 #define ALT_DMA_SCTL_OFST 0xffda1000
10499 /* The start address of the ALT_DMA_SCTL component. */
10500 #define ALT_DMA_SCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SCTL_OFST))
10501 /* The lower bound address range of the ALT_DMA_SCTL component. */
10502 #define ALT_DMA_SCTL_LB_ADDR ALT_DMA_SCTL_ADDR
10503 /* The upper bound address range of the ALT_DMA_SCTL component. */
10504 #define ALT_DMA_SCTL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SCTL_ADDR) + 0x60) - 1))
10505 
10506 
10507 /*
10508  * Component Instance : i_dma_SCHANNELSTATUS
10509  *
10510  * Instance i_dma_SCHANNELSTATUS of component ALT_DMA_SCHANNELSTAT.
10511  *
10512  *
10513  */
10514 /* The base address byte offset for the start of the ALT_DMA_SCHANNELSTAT component. */
10515 #define ALT_DMA_SCHANNELSTAT_OFST 0xffda1100
10516 /* The start address of the ALT_DMA_SCHANNELSTAT component. */
10517 #define ALT_DMA_SCHANNELSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SCHANNELSTAT_OFST))
10518 /* The lower bound address range of the ALT_DMA_SCHANNELSTAT component. */
10519 #define ALT_DMA_SCHANNELSTAT_LB_ADDR ALT_DMA_SCHANNELSTAT_ADDR
10520 /* The upper bound address range of the ALT_DMA_SCHANNELSTAT component. */
10521 #define ALT_DMA_SCHANNELSTAT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SCHANNELSTAT_ADDR) + 0x40) - 1))
10522 
10523 
10524 /*
10525  * Component Instance : i_dma_SAXISTATUS
10526  *
10527  * Instance i_dma_SAXISTATUS of component ALT_DMA_SAXISTAT.
10528  *
10529  *
10530  */
10531 /* The base address byte offset for the start of the ALT_DMA_SAXISTAT component. */
10532 #define ALT_DMA_SAXISTAT_OFST 0xffda1400
10533 /* The start address of the ALT_DMA_SAXISTAT component. */
10534 #define ALT_DMA_SAXISTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SAXISTAT_OFST))
10535 /* The lower bound address range of the ALT_DMA_SAXISTAT component. */
10536 #define ALT_DMA_SAXISTAT_LB_ADDR ALT_DMA_SAXISTAT_ADDR
10537 /* The upper bound address range of the ALT_DMA_SAXISTAT component. */
10538 #define ALT_DMA_SAXISTAT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SAXISTAT_ADDR) + 0x100) - 1))
10539 
10540 
10541 /*
10542  * Component Instance : i_dma_SDEBUG
10543  *
10544  * Instance i_dma_SDEBUG of component ALT_DMA_SDBG.
10545  *
10546  *
10547  */
10548 /* The base address byte offset for the start of the ALT_DMA_SDBG component. */
10549 #define ALT_DMA_SDBG_OFST 0xffda1d00
10550 /* The start address of the ALT_DMA_SDBG component. */
10551 #define ALT_DMA_SDBG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SDBG_OFST))
10552 /* The lower bound address range of the ALT_DMA_SDBG component. */
10553 #define ALT_DMA_SDBG_LB_ADDR ALT_DMA_SDBG_ADDR
10554 /* The upper bound address range of the ALT_DMA_SDBG component. */
10555 #define ALT_DMA_SDBG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SDBG_ADDR) + 0x10) - 1))
10556 
10557 
10558 /*
10559  * Component Instance : i_dma_SCONFIG
10560  *
10561  * Instance i_dma_SCONFIG of component ALT_DMA_SCFG.
10562  *
10563  *
10564  */
10565 /* The base address byte offset for the start of the ALT_DMA_SCFG component. */
10566 #define ALT_DMA_SCFG_OFST 0xffda1e00
10567 /* The start address of the ALT_DMA_SCFG component. */
10568 #define ALT_DMA_SCFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SCFG_OFST))
10569 /* The lower bound address range of the ALT_DMA_SCFG component. */
10570 #define ALT_DMA_SCFG_LB_ADDR ALT_DMA_SCFG_ADDR
10571 /* The upper bound address range of the ALT_DMA_SCFG component. */
10572 #define ALT_DMA_SCFG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SCFG_ADDR) + 0x20) - 1))
10573 
10574 
10575 /*
10576  * Component Instance : i_dma_SCOMPID
10577  *
10578  * Instance i_dma_SCOMPID of component ALT_DMA_SCOMPID.
10579  *
10580  *
10581  */
10582 /* The base address byte offset for the start of the ALT_DMA_SCOMPID component. */
10583 #define ALT_DMA_SCOMPID_OFST 0xffda1fe0
10584 /* The start address of the ALT_DMA_SCOMPID component. */
10585 #define ALT_DMA_SCOMPID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SCOMPID_OFST))
10586 /* The lower bound address range of the ALT_DMA_SCOMPID component. */
10587 #define ALT_DMA_SCOMPID_LB_ADDR ALT_DMA_SCOMPID_ADDR
10588 /* The upper bound address range of the ALT_DMA_SCOMPID component. */
10589 #define ALT_DMA_SCOMPID_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SCOMPID_ADDR) + 0x20) - 1))
10590 
10591 
10592 /*
10593  * Component Instance : i_spis_0_spis
10594  *
10595  * Instance i_spis_0_spis of component ALT_SPIS.
10596  *
10597  *
10598  */
10599 /* The address of the ALT_SPIS_CTLR0 register for the ALT_SPIS0 instance. */
10600 #define ALT_SPIS0_CTLR0_ADDR ALT_SPIS_CTLR0_ADDR(ALT_SPIS0_ADDR)
10601 /* The address of the ALT_SPIS_SPIENR register for the ALT_SPIS0 instance. */
10602 #define ALT_SPIS0_SPIENR_ADDR ALT_SPIS_SPIENR_ADDR(ALT_SPIS0_ADDR)
10603 /* The address of the ALT_SPIS_MWCR register for the ALT_SPIS0 instance. */
10604 #define ALT_SPIS0_MWCR_ADDR ALT_SPIS_MWCR_ADDR(ALT_SPIS0_ADDR)
10605 /* The address of the ALT_SPIS_TXFTLR register for the ALT_SPIS0 instance. */
10606 #define ALT_SPIS0_TXFTLR_ADDR ALT_SPIS_TXFTLR_ADDR(ALT_SPIS0_ADDR)
10607 /* The address of the ALT_SPIS_RXFTLR register for the ALT_SPIS0 instance. */
10608 #define ALT_SPIS0_RXFTLR_ADDR ALT_SPIS_RXFTLR_ADDR(ALT_SPIS0_ADDR)
10609 /* The address of the ALT_SPIS_TXFLR register for the ALT_SPIS0 instance. */
10610 #define ALT_SPIS0_TXFLR_ADDR ALT_SPIS_TXFLR_ADDR(ALT_SPIS0_ADDR)
10611 /* The address of the ALT_SPIS_RXFLR register for the ALT_SPIS0 instance. */
10612 #define ALT_SPIS0_RXFLR_ADDR ALT_SPIS_RXFLR_ADDR(ALT_SPIS0_ADDR)
10613 /* The address of the ALT_SPIS_SR register for the ALT_SPIS0 instance. */
10614 #define ALT_SPIS0_SR_ADDR ALT_SPIS_SR_ADDR(ALT_SPIS0_ADDR)
10615 /* The address of the ALT_SPIS_IMR register for the ALT_SPIS0 instance. */
10616 #define ALT_SPIS0_IMR_ADDR ALT_SPIS_IMR_ADDR(ALT_SPIS0_ADDR)
10617 /* The address of the ALT_SPIS_ISR register for the ALT_SPIS0 instance. */
10618 #define ALT_SPIS0_ISR_ADDR ALT_SPIS_ISR_ADDR(ALT_SPIS0_ADDR)
10619 /* The address of the ALT_SPIS_RISR register for the ALT_SPIS0 instance. */
10620 #define ALT_SPIS0_RISR_ADDR ALT_SPIS_RISR_ADDR(ALT_SPIS0_ADDR)
10621 /* The address of the ALT_SPIS_TXOICR register for the ALT_SPIS0 instance. */
10622 #define ALT_SPIS0_TXOICR_ADDR ALT_SPIS_TXOICR_ADDR(ALT_SPIS0_ADDR)
10623 /* The address of the ALT_SPIS_RXOICR register for the ALT_SPIS0 instance. */
10624 #define ALT_SPIS0_RXOICR_ADDR ALT_SPIS_RXOICR_ADDR(ALT_SPIS0_ADDR)
10625 /* The address of the ALT_SPIS_RXUICR register for the ALT_SPIS0 instance. */
10626 #define ALT_SPIS0_RXUICR_ADDR ALT_SPIS_RXUICR_ADDR(ALT_SPIS0_ADDR)
10627 /* The address of the ALT_SPIS_MSTICR register for the ALT_SPIS0 instance. */
10628 #define ALT_SPIS0_MSTICR_ADDR ALT_SPIS_MSTICR_ADDR(ALT_SPIS0_ADDR)
10629 /* The address of the ALT_SPIS_ICR register for the ALT_SPIS0 instance. */
10630 #define ALT_SPIS0_ICR_ADDR ALT_SPIS_ICR_ADDR(ALT_SPIS0_ADDR)
10631 /* The address of the ALT_SPIS_DMACR register for the ALT_SPIS0 instance. */
10632 #define ALT_SPIS0_DMACR_ADDR ALT_SPIS_DMACR_ADDR(ALT_SPIS0_ADDR)
10633 /* The address of the ALT_SPIS_DMATDLR register for the ALT_SPIS0 instance. */
10634 #define ALT_SPIS0_DMATDLR_ADDR ALT_SPIS_DMATDLR_ADDR(ALT_SPIS0_ADDR)
10635 /* The address of the ALT_SPIS_DMARDLR register for the ALT_SPIS0 instance. */
10636 #define ALT_SPIS0_DMARDLR_ADDR ALT_SPIS_DMARDLR_ADDR(ALT_SPIS0_ADDR)
10637 /* The address of the ALT_SPIS_IDR register for the ALT_SPIS0 instance. */
10638 #define ALT_SPIS0_IDR_ADDR ALT_SPIS_IDR_ADDR(ALT_SPIS0_ADDR)
10639 /* The address of the ALT_SPIS_SPI_VER_ID register for the ALT_SPIS0 instance. */
10640 #define ALT_SPIS0_SPI_VER_ID_ADDR ALT_SPIS_SPI_VER_ID_ADDR(ALT_SPIS0_ADDR)
10641 /* The address of the ALT_SPIS_DR register for the ALT_SPIS0 instance. */
10642 #define ALT_SPIS0_DR_ADDR ALT_SPIS_DR_ADDR(ALT_SPIS0_ADDR)
10643 /* The base address byte offset for the start of the ALT_SPIS0 component. */
10644 #define ALT_SPIS0_OFST 0xffda2000
10645 /* The start address of the ALT_SPIS0 component. */
10646 #define ALT_SPIS0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIS0_OFST))
10647 /* The lower bound address range of the ALT_SPIS0 component. */
10648 #define ALT_SPIS0_LB_ADDR ALT_SPIS0_ADDR
10649 /* The upper bound address range of the ALT_SPIS0 component. */
10650 #define ALT_SPIS0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIS0_ADDR) + 0x80) - 1))
10651 
10652 
10653 /*
10654  * Component Instance : i_spis_1_spis
10655  *
10656  * Instance i_spis_1_spis of component ALT_SPIS.
10657  *
10658  *
10659  */
10660 /* The address of the ALT_SPIS_CTLR0 register for the ALT_SPIS1 instance. */
10661 #define ALT_SPIS1_CTLR0_ADDR ALT_SPIS_CTLR0_ADDR(ALT_SPIS1_ADDR)
10662 /* The address of the ALT_SPIS_SPIENR register for the ALT_SPIS1 instance. */
10663 #define ALT_SPIS1_SPIENR_ADDR ALT_SPIS_SPIENR_ADDR(ALT_SPIS1_ADDR)
10664 /* The address of the ALT_SPIS_MWCR register for the ALT_SPIS1 instance. */
10665 #define ALT_SPIS1_MWCR_ADDR ALT_SPIS_MWCR_ADDR(ALT_SPIS1_ADDR)
10666 /* The address of the ALT_SPIS_TXFTLR register for the ALT_SPIS1 instance. */
10667 #define ALT_SPIS1_TXFTLR_ADDR ALT_SPIS_TXFTLR_ADDR(ALT_SPIS1_ADDR)
10668 /* The address of the ALT_SPIS_RXFTLR register for the ALT_SPIS1 instance. */
10669 #define ALT_SPIS1_RXFTLR_ADDR ALT_SPIS_RXFTLR_ADDR(ALT_SPIS1_ADDR)
10670 /* The address of the ALT_SPIS_TXFLR register for the ALT_SPIS1 instance. */
10671 #define ALT_SPIS1_TXFLR_ADDR ALT_SPIS_TXFLR_ADDR(ALT_SPIS1_ADDR)
10672 /* The address of the ALT_SPIS_RXFLR register for the ALT_SPIS1 instance. */
10673 #define ALT_SPIS1_RXFLR_ADDR ALT_SPIS_RXFLR_ADDR(ALT_SPIS1_ADDR)
10674 /* The address of the ALT_SPIS_SR register for the ALT_SPIS1 instance. */
10675 #define ALT_SPIS1_SR_ADDR ALT_SPIS_SR_ADDR(ALT_SPIS1_ADDR)
10676 /* The address of the ALT_SPIS_IMR register for the ALT_SPIS1 instance. */
10677 #define ALT_SPIS1_IMR_ADDR ALT_SPIS_IMR_ADDR(ALT_SPIS1_ADDR)
10678 /* The address of the ALT_SPIS_ISR register for the ALT_SPIS1 instance. */
10679 #define ALT_SPIS1_ISR_ADDR ALT_SPIS_ISR_ADDR(ALT_SPIS1_ADDR)
10680 /* The address of the ALT_SPIS_RISR register for the ALT_SPIS1 instance. */
10681 #define ALT_SPIS1_RISR_ADDR ALT_SPIS_RISR_ADDR(ALT_SPIS1_ADDR)
10682 /* The address of the ALT_SPIS_TXOICR register for the ALT_SPIS1 instance. */
10683 #define ALT_SPIS1_TXOICR_ADDR ALT_SPIS_TXOICR_ADDR(ALT_SPIS1_ADDR)
10684 /* The address of the ALT_SPIS_RXOICR register for the ALT_SPIS1 instance. */
10685 #define ALT_SPIS1_RXOICR_ADDR ALT_SPIS_RXOICR_ADDR(ALT_SPIS1_ADDR)
10686 /* The address of the ALT_SPIS_RXUICR register for the ALT_SPIS1 instance. */
10687 #define ALT_SPIS1_RXUICR_ADDR ALT_SPIS_RXUICR_ADDR(ALT_SPIS1_ADDR)
10688 /* The address of the ALT_SPIS_MSTICR register for the ALT_SPIS1 instance. */
10689 #define ALT_SPIS1_MSTICR_ADDR ALT_SPIS_MSTICR_ADDR(ALT_SPIS1_ADDR)
10690 /* The address of the ALT_SPIS_ICR register for the ALT_SPIS1 instance. */
10691 #define ALT_SPIS1_ICR_ADDR ALT_SPIS_ICR_ADDR(ALT_SPIS1_ADDR)
10692 /* The address of the ALT_SPIS_DMACR register for the ALT_SPIS1 instance. */
10693 #define ALT_SPIS1_DMACR_ADDR ALT_SPIS_DMACR_ADDR(ALT_SPIS1_ADDR)
10694 /* The address of the ALT_SPIS_DMATDLR register for the ALT_SPIS1 instance. */
10695 #define ALT_SPIS1_DMATDLR_ADDR ALT_SPIS_DMATDLR_ADDR(ALT_SPIS1_ADDR)
10696 /* The address of the ALT_SPIS_DMARDLR register for the ALT_SPIS1 instance. */
10697 #define ALT_SPIS1_DMARDLR_ADDR ALT_SPIS_DMARDLR_ADDR(ALT_SPIS1_ADDR)
10698 /* The address of the ALT_SPIS_IDR register for the ALT_SPIS1 instance. */
10699 #define ALT_SPIS1_IDR_ADDR ALT_SPIS_IDR_ADDR(ALT_SPIS1_ADDR)
10700 /* The address of the ALT_SPIS_SPI_VER_ID register for the ALT_SPIS1 instance. */
10701 #define ALT_SPIS1_SPI_VER_ID_ADDR ALT_SPIS_SPI_VER_ID_ADDR(ALT_SPIS1_ADDR)
10702 /* The address of the ALT_SPIS_DR register for the ALT_SPIS1 instance. */
10703 #define ALT_SPIS1_DR_ADDR ALT_SPIS_DR_ADDR(ALT_SPIS1_ADDR)
10704 /* The base address byte offset for the start of the ALT_SPIS1 component. */
10705 #define ALT_SPIS1_OFST 0xffda3000
10706 /* The start address of the ALT_SPIS1 component. */
10707 #define ALT_SPIS1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIS1_OFST))
10708 /* The lower bound address range of the ALT_SPIS1 component. */
10709 #define ALT_SPIS1_LB_ADDR ALT_SPIS1_ADDR
10710 /* The upper bound address range of the ALT_SPIS1 component. */
10711 #define ALT_SPIS1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIS1_ADDR) + 0x80) - 1))
10712 
10713 
10714 /*
10715  * Component Instance : i_spim_0_spim
10716  *
10717  * Instance i_spim_0_spim of component ALT_SPIM.
10718  *
10719  *
10720  */
10721 /* The address of the ALT_SPIM_CTLR0 register for the ALT_SPIM0 instance. */
10722 #define ALT_SPIM0_CTLR0_ADDR ALT_SPIM_CTLR0_ADDR(ALT_SPIM0_ADDR)
10723 /* The address of the ALT_SPIM_CTLR1 register for the ALT_SPIM0 instance. */
10724 #define ALT_SPIM0_CTLR1_ADDR ALT_SPIM_CTLR1_ADDR(ALT_SPIM0_ADDR)
10725 /* The address of the ALT_SPIM_SPIENR register for the ALT_SPIM0 instance. */
10726 #define ALT_SPIM0_SPIENR_ADDR ALT_SPIM_SPIENR_ADDR(ALT_SPIM0_ADDR)
10727 /* The address of the ALT_SPIM_MWCR register for the ALT_SPIM0 instance. */
10728 #define ALT_SPIM0_MWCR_ADDR ALT_SPIM_MWCR_ADDR(ALT_SPIM0_ADDR)
10729 /* The address of the ALT_SPIM_SER register for the ALT_SPIM0 instance. */
10730 #define ALT_SPIM0_SER_ADDR ALT_SPIM_SER_ADDR(ALT_SPIM0_ADDR)
10731 /* The address of the ALT_SPIM_BAUDR register for the ALT_SPIM0 instance. */
10732 #define ALT_SPIM0_BAUDR_ADDR ALT_SPIM_BAUDR_ADDR(ALT_SPIM0_ADDR)
10733 /* The address of the ALT_SPIM_TXFTLR register for the ALT_SPIM0 instance. */
10734 #define ALT_SPIM0_TXFTLR_ADDR ALT_SPIM_TXFTLR_ADDR(ALT_SPIM0_ADDR)
10735 /* The address of the ALT_SPIM_RXFTLR register for the ALT_SPIM0 instance. */
10736 #define ALT_SPIM0_RXFTLR_ADDR ALT_SPIM_RXFTLR_ADDR(ALT_SPIM0_ADDR)
10737 /* The address of the ALT_SPIM_TXFLR register for the ALT_SPIM0 instance. */
10738 #define ALT_SPIM0_TXFLR_ADDR ALT_SPIM_TXFLR_ADDR(ALT_SPIM0_ADDR)
10739 /* The address of the ALT_SPIM_RXFLR register for the ALT_SPIM0 instance. */
10740 #define ALT_SPIM0_RXFLR_ADDR ALT_SPIM_RXFLR_ADDR(ALT_SPIM0_ADDR)
10741 /* The address of the ALT_SPIM_SR register for the ALT_SPIM0 instance. */
10742 #define ALT_SPIM0_SR_ADDR ALT_SPIM_SR_ADDR(ALT_SPIM0_ADDR)
10743 /* The address of the ALT_SPIM_IMR register for the ALT_SPIM0 instance. */
10744 #define ALT_SPIM0_IMR_ADDR ALT_SPIM_IMR_ADDR(ALT_SPIM0_ADDR)
10745 /* The address of the ALT_SPIM_ISR register for the ALT_SPIM0 instance. */
10746 #define ALT_SPIM0_ISR_ADDR ALT_SPIM_ISR_ADDR(ALT_SPIM0_ADDR)
10747 /* The address of the ALT_SPIM_RISR register for the ALT_SPIM0 instance. */
10748 #define ALT_SPIM0_RISR_ADDR ALT_SPIM_RISR_ADDR(ALT_SPIM0_ADDR)
10749 /* The address of the ALT_SPIM_TXOICR register for the ALT_SPIM0 instance. */
10750 #define ALT_SPIM0_TXOICR_ADDR ALT_SPIM_TXOICR_ADDR(ALT_SPIM0_ADDR)
10751 /* The address of the ALT_SPIM_RXOICR register for the ALT_SPIM0 instance. */
10752 #define ALT_SPIM0_RXOICR_ADDR ALT_SPIM_RXOICR_ADDR(ALT_SPIM0_ADDR)
10753 /* The address of the ALT_SPIM_RXUICR register for the ALT_SPIM0 instance. */
10754 #define ALT_SPIM0_RXUICR_ADDR ALT_SPIM_RXUICR_ADDR(ALT_SPIM0_ADDR)
10755 /* The address of the ALT_SPIM_MSTICR register for the ALT_SPIM0 instance. */
10756 #define ALT_SPIM0_MSTICR_ADDR ALT_SPIM_MSTICR_ADDR(ALT_SPIM0_ADDR)
10757 /* The address of the ALT_SPIM_ICR register for the ALT_SPIM0 instance. */
10758 #define ALT_SPIM0_ICR_ADDR ALT_SPIM_ICR_ADDR(ALT_SPIM0_ADDR)
10759 /* The address of the ALT_SPIM_DMACR register for the ALT_SPIM0 instance. */
10760 #define ALT_SPIM0_DMACR_ADDR ALT_SPIM_DMACR_ADDR(ALT_SPIM0_ADDR)
10761 /* The address of the ALT_SPIM_DMATDLR register for the ALT_SPIM0 instance. */
10762 #define ALT_SPIM0_DMATDLR_ADDR ALT_SPIM_DMATDLR_ADDR(ALT_SPIM0_ADDR)
10763 /* The address of the ALT_SPIM_DMARDLR register for the ALT_SPIM0 instance. */
10764 #define ALT_SPIM0_DMARDLR_ADDR ALT_SPIM_DMARDLR_ADDR(ALT_SPIM0_ADDR)
10765 /* The address of the ALT_SPIM_IDR register for the ALT_SPIM0 instance. */
10766 #define ALT_SPIM0_IDR_ADDR ALT_SPIM_IDR_ADDR(ALT_SPIM0_ADDR)
10767 /* The address of the ALT_SPIM_SPI_VER_ID register for the ALT_SPIM0 instance. */
10768 #define ALT_SPIM0_SPI_VER_ID_ADDR ALT_SPIM_SPI_VER_ID_ADDR(ALT_SPIM0_ADDR)
10769 /* The address of the ALT_SPIM_DR register for the ALT_SPIM0 instance. */
10770 #define ALT_SPIM0_DR_ADDR ALT_SPIM_DR_ADDR(ALT_SPIM0_ADDR)
10771 /* The address of the ALT_SPIM_RX_SMPL_DLY register for the ALT_SPIM0 instance. */
10772 #define ALT_SPIM0_RX_SMPL_DLY_ADDR ALT_SPIM_RX_SMPL_DLY_ADDR(ALT_SPIM0_ADDR)
10773 /* The address of the ALT_SPIM_RSVD_0 register for the ALT_SPIM0 instance. */
10774 #define ALT_SPIM0_RSVD_0_ADDR ALT_SPIM_RSVD_0_ADDR(ALT_SPIM0_ADDR)
10775 /* The address of the ALT_SPIM_RSVD_1 register for the ALT_SPIM0 instance. */
10776 #define ALT_SPIM0_RSVD_1_ADDR ALT_SPIM_RSVD_1_ADDR(ALT_SPIM0_ADDR)
10777 /* The address of the ALT_SPIM_RSVD_2 register for the ALT_SPIM0 instance. */
10778 #define ALT_SPIM0_RSVD_2_ADDR ALT_SPIM_RSVD_2_ADDR(ALT_SPIM0_ADDR)
10779 /* The base address byte offset for the start of the ALT_SPIM0 component. */
10780 #define ALT_SPIM0_OFST 0xffda4000
10781 /* The start address of the ALT_SPIM0 component. */
10782 #define ALT_SPIM0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIM0_OFST))
10783 /* The lower bound address range of the ALT_SPIM0 component. */
10784 #define ALT_SPIM0_LB_ADDR ALT_SPIM0_ADDR
10785 /* The upper bound address range of the ALT_SPIM0 component. */
10786 #define ALT_SPIM0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIM0_ADDR) + 0x100) - 1))
10787 
10788 
10789 /*
10790  * Component Instance : i_spim_1_spim
10791  *
10792  * Instance i_spim_1_spim of component ALT_SPIM.
10793  *
10794  *
10795  */
10796 /* The address of the ALT_SPIM_CTLR0 register for the ALT_SPIM1 instance. */
10797 #define ALT_SPIM1_CTLR0_ADDR ALT_SPIM_CTLR0_ADDR(ALT_SPIM1_ADDR)
10798 /* The address of the ALT_SPIM_CTLR1 register for the ALT_SPIM1 instance. */
10799 #define ALT_SPIM1_CTLR1_ADDR ALT_SPIM_CTLR1_ADDR(ALT_SPIM1_ADDR)
10800 /* The address of the ALT_SPIM_SPIENR register for the ALT_SPIM1 instance. */
10801 #define ALT_SPIM1_SPIENR_ADDR ALT_SPIM_SPIENR_ADDR(ALT_SPIM1_ADDR)
10802 /* The address of the ALT_SPIM_MWCR register for the ALT_SPIM1 instance. */
10803 #define ALT_SPIM1_MWCR_ADDR ALT_SPIM_MWCR_ADDR(ALT_SPIM1_ADDR)
10804 /* The address of the ALT_SPIM_SER register for the ALT_SPIM1 instance. */
10805 #define ALT_SPIM1_SER_ADDR ALT_SPIM_SER_ADDR(ALT_SPIM1_ADDR)
10806 /* The address of the ALT_SPIM_BAUDR register for the ALT_SPIM1 instance. */
10807 #define ALT_SPIM1_BAUDR_ADDR ALT_SPIM_BAUDR_ADDR(ALT_SPIM1_ADDR)
10808 /* The address of the ALT_SPIM_TXFTLR register for the ALT_SPIM1 instance. */
10809 #define ALT_SPIM1_TXFTLR_ADDR ALT_SPIM_TXFTLR_ADDR(ALT_SPIM1_ADDR)
10810 /* The address of the ALT_SPIM_RXFTLR register for the ALT_SPIM1 instance. */
10811 #define ALT_SPIM1_RXFTLR_ADDR ALT_SPIM_RXFTLR_ADDR(ALT_SPIM1_ADDR)
10812 /* The address of the ALT_SPIM_TXFLR register for the ALT_SPIM1 instance. */
10813 #define ALT_SPIM1_TXFLR_ADDR ALT_SPIM_TXFLR_ADDR(ALT_SPIM1_ADDR)
10814 /* The address of the ALT_SPIM_RXFLR register for the ALT_SPIM1 instance. */
10815 #define ALT_SPIM1_RXFLR_ADDR ALT_SPIM_RXFLR_ADDR(ALT_SPIM1_ADDR)
10816 /* The address of the ALT_SPIM_SR register for the ALT_SPIM1 instance. */
10817 #define ALT_SPIM1_SR_ADDR ALT_SPIM_SR_ADDR(ALT_SPIM1_ADDR)
10818 /* The address of the ALT_SPIM_IMR register for the ALT_SPIM1 instance. */
10819 #define ALT_SPIM1_IMR_ADDR ALT_SPIM_IMR_ADDR(ALT_SPIM1_ADDR)
10820 /* The address of the ALT_SPIM_ISR register for the ALT_SPIM1 instance. */
10821 #define ALT_SPIM1_ISR_ADDR ALT_SPIM_ISR_ADDR(ALT_SPIM1_ADDR)
10822 /* The address of the ALT_SPIM_RISR register for the ALT_SPIM1 instance. */
10823 #define ALT_SPIM1_RISR_ADDR ALT_SPIM_RISR_ADDR(ALT_SPIM1_ADDR)
10824 /* The address of the ALT_SPIM_TXOICR register for the ALT_SPIM1 instance. */
10825 #define ALT_SPIM1_TXOICR_ADDR ALT_SPIM_TXOICR_ADDR(ALT_SPIM1_ADDR)
10826 /* The address of the ALT_SPIM_RXOICR register for the ALT_SPIM1 instance. */
10827 #define ALT_SPIM1_RXOICR_ADDR ALT_SPIM_RXOICR_ADDR(ALT_SPIM1_ADDR)
10828 /* The address of the ALT_SPIM_RXUICR register for the ALT_SPIM1 instance. */
10829 #define ALT_SPIM1_RXUICR_ADDR ALT_SPIM_RXUICR_ADDR(ALT_SPIM1_ADDR)
10830 /* The address of the ALT_SPIM_MSTICR register for the ALT_SPIM1 instance. */
10831 #define ALT_SPIM1_MSTICR_ADDR ALT_SPIM_MSTICR_ADDR(ALT_SPIM1_ADDR)
10832 /* The address of the ALT_SPIM_ICR register for the ALT_SPIM1 instance. */
10833 #define ALT_SPIM1_ICR_ADDR ALT_SPIM_ICR_ADDR(ALT_SPIM1_ADDR)
10834 /* The address of the ALT_SPIM_DMACR register for the ALT_SPIM1 instance. */
10835 #define ALT_SPIM1_DMACR_ADDR ALT_SPIM_DMACR_ADDR(ALT_SPIM1_ADDR)
10836 /* The address of the ALT_SPIM_DMATDLR register for the ALT_SPIM1 instance. */
10837 #define ALT_SPIM1_DMATDLR_ADDR ALT_SPIM_DMATDLR_ADDR(ALT_SPIM1_ADDR)
10838 /* The address of the ALT_SPIM_DMARDLR register for the ALT_SPIM1 instance. */
10839 #define ALT_SPIM1_DMARDLR_ADDR ALT_SPIM_DMARDLR_ADDR(ALT_SPIM1_ADDR)
10840 /* The address of the ALT_SPIM_IDR register for the ALT_SPIM1 instance. */
10841 #define ALT_SPIM1_IDR_ADDR ALT_SPIM_IDR_ADDR(ALT_SPIM1_ADDR)
10842 /* The address of the ALT_SPIM_SPI_VER_ID register for the ALT_SPIM1 instance. */
10843 #define ALT_SPIM1_SPI_VER_ID_ADDR ALT_SPIM_SPI_VER_ID_ADDR(ALT_SPIM1_ADDR)
10844 /* The address of the ALT_SPIM_DR register for the ALT_SPIM1 instance. */
10845 #define ALT_SPIM1_DR_ADDR ALT_SPIM_DR_ADDR(ALT_SPIM1_ADDR)
10846 /* The address of the ALT_SPIM_RX_SMPL_DLY register for the ALT_SPIM1 instance. */
10847 #define ALT_SPIM1_RX_SMPL_DLY_ADDR ALT_SPIM_RX_SMPL_DLY_ADDR(ALT_SPIM1_ADDR)
10848 /* The address of the ALT_SPIM_RSVD_0 register for the ALT_SPIM1 instance. */
10849 #define ALT_SPIM1_RSVD_0_ADDR ALT_SPIM_RSVD_0_ADDR(ALT_SPIM1_ADDR)
10850 /* The address of the ALT_SPIM_RSVD_1 register for the ALT_SPIM1 instance. */
10851 #define ALT_SPIM1_RSVD_1_ADDR ALT_SPIM_RSVD_1_ADDR(ALT_SPIM1_ADDR)
10852 /* The address of the ALT_SPIM_RSVD_2 register for the ALT_SPIM1 instance. */
10853 #define ALT_SPIM1_RSVD_2_ADDR ALT_SPIM_RSVD_2_ADDR(ALT_SPIM1_ADDR)
10854 /* The base address byte offset for the start of the ALT_SPIM1 component. */
10855 #define ALT_SPIM1_OFST 0xffda5000
10856 /* The start address of the ALT_SPIM1 component. */
10857 #define ALT_SPIM1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIM1_OFST))
10858 /* The lower bound address range of the ALT_SPIM1 component. */
10859 #define ALT_SPIM1_LB_ADDR ALT_SPIM1_ADDR
10860 /* The upper bound address range of the ALT_SPIM1 component. */
10861 #define ALT_SPIM1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIM1_ADDR) + 0x100) - 1))
10862 
10863 
10864 /*
10865  * Component Instance : i_ram_onchip_ram_block
10866  *
10867  * Instance i_ram_onchip_ram_block of component ALT_OCRAM.
10868  *
10869  *
10870  */
10871 /* The base address byte offset for the start of the ALT_OCRAM component. */
10872 #define ALT_OCRAM_OFST 0xffe00000
10873 /* The start address of the ALT_OCRAM component. */
10874 #define ALT_OCRAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_OCRAM_OFST))
10875 /* The lower bound address range of the ALT_OCRAM component. */
10876 #define ALT_OCRAM_LB_ADDR ALT_OCRAM_ADDR
10877 /* The upper bound address range of the ALT_OCRAM component. */
10878 #define ALT_OCRAM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_OCRAM_ADDR) + 0x40000) - 1))
10879 
10880 
10881 /*
10882  * Component Instance : i_rom_onchip_rom_block
10883  *
10884  * Instance i_rom_onchip_rom_block of component ALT_ROM.
10885  *
10886  *
10887  */
10888 /* The base address byte offset for the start of the ALT_ROM component. */
10889 #define ALT_ROM_OFST 0xfffc0000
10890 /* The start address of the ALT_ROM component. */
10891 #define ALT_ROM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ROM_OFST))
10892 /* The lower bound address range of the ALT_ROM component. */
10893 #define ALT_ROM_LB_ADDR ALT_ROM_ADDR
10894 /* The upper bound address range of the ALT_ROM component. */
10895 #define ALT_ROM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ROM_ADDR) + 0x20000) - 1))
10896 
10897 
10898 /*
10899  * Component Instance : mpu_regs_MPUSCU
10900  *
10901  * Instance mpu_regs_MPUSCU of component ALT_MPU_REGS_MPUSCU.
10902  *
10903  *
10904  */
10905 /* The base address byte offset for the start of the ALT_MPU_REGS_MPUSCU component. */
10906 #define ALT_MPU_REGS_MPUSCU_OFST 0xffffc000
10907 /* The start address of the ALT_MPU_REGS_MPUSCU component. */
10908 #define ALT_MPU_REGS_MPUSCU_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPU_REGS_MPUSCU_OFST))
10909 /* The lower bound address range of the ALT_MPU_REGS_MPUSCU component. */
10910 #define ALT_MPU_REGS_MPUSCU_LB_ADDR ALT_MPU_REGS_MPUSCU_ADDR
10911 /* The upper bound address range of the ALT_MPU_REGS_MPUSCU component. */
10912 #define ALT_MPU_REGS_MPUSCU_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPU_REGS_MPUSCU_ADDR) + 0x100) - 1))
10913 
10914 
10915 /*
10916  * Component Instance : mpu_regs_MPUGIC
10917  *
10918  * Instance mpu_regs_MPUGIC of component ALT_MPU_REGS_MPUGIC.
10919  *
10920  *
10921  */
10922 /* The base address byte offset for the start of the ALT_MPU_REGS_MPUGIC component. */
10923 #define ALT_MPU_REGS_MPUGIC_OFST 0xffffc100
10924 /* The start address of the ALT_MPU_REGS_MPUGIC component. */
10925 #define ALT_MPU_REGS_MPUGIC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPU_REGS_MPUGIC_OFST))
10926 /* The lower bound address range of the ALT_MPU_REGS_MPUGIC component. */
10927 #define ALT_MPU_REGS_MPUGIC_LB_ADDR ALT_MPU_REGS_MPUGIC_ADDR
10928 /* The upper bound address range of the ALT_MPU_REGS_MPUGIC component. */
10929 #define ALT_MPU_REGS_MPUGIC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPU_REGS_MPUGIC_ADDR) + 0x100) - 1))
10930 
10931 
10932 /*
10933  * Component Instance : mpu_regs_MPUGLOBALTIMER
10934  *
10935  * Instance mpu_regs_MPUGLOBALTIMER of component ALT_MPU_REGS_MPUGLOBTMR.
10936  *
10937  *
10938  */
10939 /* The base address byte offset for the start of the ALT_MPU_REGS_MPUGLOBTMR component. */
10940 #define ALT_MPU_REGS_MPUGLOBTMR_OFST 0xffffc200
10941 /* The start address of the ALT_MPU_REGS_MPUGLOBTMR component. */
10942 #define ALT_MPU_REGS_MPUGLOBTMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPU_REGS_MPUGLOBTMR_OFST))
10943 /* The lower bound address range of the ALT_MPU_REGS_MPUGLOBTMR component. */
10944 #define ALT_MPU_REGS_MPUGLOBTMR_LB_ADDR ALT_MPU_REGS_MPUGLOBTMR_ADDR
10945 /* The upper bound address range of the ALT_MPU_REGS_MPUGLOBTMR component. */
10946 #define ALT_MPU_REGS_MPUGLOBTMR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPU_REGS_MPUGLOBTMR_ADDR) + 0x100) - 1))
10947 
10948 
10949 /*
10950  * Component Instance : mpu_regs_MPUPRIVATETIMER
10951  *
10952  * Instance mpu_regs_MPUPRIVATETIMER of component ALT_MPU_REGS_MPUPRIVATETMR.
10953  *
10954  *
10955  */
10956 /* The base address byte offset for the start of the ALT_MPU_REGS_MPUPRIVATETMR component. */
10957 #define ALT_MPU_REGS_MPUPRIVATETMR_OFST 0xffffc600
10958 /* The start address of the ALT_MPU_REGS_MPUPRIVATETMR component. */
10959 #define ALT_MPU_REGS_MPUPRIVATETMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPU_REGS_MPUPRIVATETMR_OFST))
10960 /* The lower bound address range of the ALT_MPU_REGS_MPUPRIVATETMR component. */
10961 #define ALT_MPU_REGS_MPUPRIVATETMR_LB_ADDR ALT_MPU_REGS_MPUPRIVATETMR_ADDR
10962 /* The upper bound address range of the ALT_MPU_REGS_MPUPRIVATETMR component. */
10963 #define ALT_MPU_REGS_MPUPRIVATETMR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPU_REGS_MPUPRIVATETMR_ADDR) + 0x100) - 1))
10964 
10965 
10966 /*
10967  * Component Instance : mpu_regs_MPUINTRDIST
10968  *
10969  * Instance mpu_regs_MPUINTRDIST of component ALT_MPU_REGS_MPUINTRDIST.
10970  *
10971  *
10972  */
10973 /* The base address byte offset for the start of the ALT_MPU_REGS_MPUINTRDIST component. */
10974 #define ALT_MPU_REGS_MPUINTRDIST_OFST 0xffffd000
10975 /* The start address of the ALT_MPU_REGS_MPUINTRDIST component. */
10976 #define ALT_MPU_REGS_MPUINTRDIST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPU_REGS_MPUINTRDIST_OFST))
10977 /* The lower bound address range of the ALT_MPU_REGS_MPUINTRDIST component. */
10978 #define ALT_MPU_REGS_MPUINTRDIST_LB_ADDR ALT_MPU_REGS_MPUINTRDIST_ADDR
10979 /* The upper bound address range of the ALT_MPU_REGS_MPUINTRDIST component. */
10980 #define ALT_MPU_REGS_MPUINTRDIST_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPU_REGS_MPUINTRDIST_ADDR) + 0x1000) - 1))
10981 
10982 
10983 /*
10984  * Component Instance : l2_regs_L2TYPE
10985  *
10986  * Instance l2_regs_L2TYPE of component ALT_L2_REGS_L2TYPE.
10987  *
10988  *
10989  */
10990 /* The base address byte offset for the start of the ALT_L2_REGS_L2TYPE component. */
10991 #define ALT_L2_REGS_L2TYPE_OFST 0xfffff000
10992 /* The start address of the ALT_L2_REGS_L2TYPE component. */
10993 #define ALT_L2_REGS_L2TYPE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2TYPE_OFST))
10994 /* The lower bound address range of the ALT_L2_REGS_L2TYPE component. */
10995 #define ALT_L2_REGS_L2TYPE_LB_ADDR ALT_L2_REGS_L2TYPE_ADDR
10996 /* The upper bound address range of the ALT_L2_REGS_L2TYPE component. */
10997 #define ALT_L2_REGS_L2TYPE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2TYPE_ADDR) + 0x100) - 1))
10998 
10999 
11000 /*
11001  * Component Instance : l2_regs_L2CONTROL
11002  *
11003  * Instance l2_regs_L2CONTROL of component ALT_L2_REGS_L2CTL.
11004  *
11005  *
11006  */
11007 /* The base address byte offset for the start of the ALT_L2_REGS_L2CTL component. */
11008 #define ALT_L2_REGS_L2CTL_OFST 0xfffff100
11009 /* The start address of the ALT_L2_REGS_L2CTL component. */
11010 #define ALT_L2_REGS_L2CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2CTL_OFST))
11011 /* The lower bound address range of the ALT_L2_REGS_L2CTL component. */
11012 #define ALT_L2_REGS_L2CTL_LB_ADDR ALT_L2_REGS_L2CTL_ADDR
11013 /* The upper bound address range of the ALT_L2_REGS_L2CTL component. */
11014 #define ALT_L2_REGS_L2CTL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2CTL_ADDR) + 0x100) - 1))
11015 
11016 
11017 /*
11018  * Component Instance : l2_regs_L2INTERRUPT
11019  *
11020  * Instance l2_regs_L2INTERRUPT of component ALT_L2_REGS_L2INT.
11021  *
11022  *
11023  */
11024 /* The base address byte offset for the start of the ALT_L2_REGS_L2INT component. */
11025 #define ALT_L2_REGS_L2INT_OFST 0xfffff200
11026 /* The start address of the ALT_L2_REGS_L2INT component. */
11027 #define ALT_L2_REGS_L2INT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2INT_OFST))
11028 /* The lower bound address range of the ALT_L2_REGS_L2INT component. */
11029 #define ALT_L2_REGS_L2INT_LB_ADDR ALT_L2_REGS_L2INT_ADDR
11030 /* The upper bound address range of the ALT_L2_REGS_L2INT component. */
11031 #define ALT_L2_REGS_L2INT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2INT_ADDR) + 0x100) - 1))
11032 
11033 
11034 /*
11035  * Component Instance : l2_regs_L2MAINTENANCE
11036  *
11037  * Instance l2_regs_L2MAINTENANCE of component ALT_L2_REGS_L2MAINTENANCE.
11038  *
11039  *
11040  */
11041 /* The base address byte offset for the start of the ALT_L2_REGS_L2MAINTENANCE component. */
11042 #define ALT_L2_REGS_L2MAINTENANCE_OFST 0xfffff700
11043 /* The start address of the ALT_L2_REGS_L2MAINTENANCE component. */
11044 #define ALT_L2_REGS_L2MAINTENANCE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2MAINTENANCE_OFST))
11045 /* The lower bound address range of the ALT_L2_REGS_L2MAINTENANCE component. */
11046 #define ALT_L2_REGS_L2MAINTENANCE_LB_ADDR ALT_L2_REGS_L2MAINTENANCE_ADDR
11047 /* The upper bound address range of the ALT_L2_REGS_L2MAINTENANCE component. */
11048 #define ALT_L2_REGS_L2MAINTENANCE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2MAINTENANCE_ADDR) + 0x100) - 1))
11049 
11050 
11051 /*
11052  * Component Instance : l2_regs_L2LOCKDOWN
11053  *
11054  * Instance l2_regs_L2LOCKDOWN of component ALT_L2_REGS_L2LOCKDOWN.
11055  *
11056  *
11057  */
11058 /* The base address byte offset for the start of the ALT_L2_REGS_L2LOCKDOWN component. */
11059 #define ALT_L2_REGS_L2LOCKDOWN_OFST 0xfffff900
11060 /* The start address of the ALT_L2_REGS_L2LOCKDOWN component. */
11061 #define ALT_L2_REGS_L2LOCKDOWN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2LOCKDOWN_OFST))
11062 /* The lower bound address range of the ALT_L2_REGS_L2LOCKDOWN component. */
11063 #define ALT_L2_REGS_L2LOCKDOWN_LB_ADDR ALT_L2_REGS_L2LOCKDOWN_ADDR
11064 /* The upper bound address range of the ALT_L2_REGS_L2LOCKDOWN component. */
11065 #define ALT_L2_REGS_L2LOCKDOWN_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2LOCKDOWN_ADDR) + 0x100) - 1))
11066 
11067 
11068 /*
11069  * Component Instance : l2_regs_L2ADDRESSFILTER
11070  *
11071  * Instance l2_regs_L2ADDRESSFILTER of component ALT_L2_REGS_L2ADDRFLT.
11072  *
11073  *
11074  */
11075 /* The base address byte offset for the start of the ALT_L2_REGS_L2ADDRFLT component. */
11076 #define ALT_L2_REGS_L2ADDRFLT_OFST 0xfffffc00
11077 /* The start address of the ALT_L2_REGS_L2ADDRFLT component. */
11078 #define ALT_L2_REGS_L2ADDRFLT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2ADDRFLT_OFST))
11079 /* The lower bound address range of the ALT_L2_REGS_L2ADDRFLT component. */
11080 #define ALT_L2_REGS_L2ADDRFLT_LB_ADDR ALT_L2_REGS_L2ADDRFLT_ADDR
11081 /* The upper bound address range of the ALT_L2_REGS_L2ADDRFLT component. */
11082 #define ALT_L2_REGS_L2ADDRFLT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2ADDRFLT_ADDR) + 0x100) - 1))
11083 
11084 
11085 /*
11086  * Component Instance : l2_regs_L2DEBUG
11087  *
11088  * Instance l2_regs_L2DEBUG of component ALT_L2_REGS_L2DBG.
11089  *
11090  *
11091  */
11092 /* The base address byte offset for the start of the ALT_L2_REGS_L2DBG component. */
11093 #define ALT_L2_REGS_L2DBG_OFST 0xffffff00
11094 /* The start address of the ALT_L2_REGS_L2DBG component. */
11095 #define ALT_L2_REGS_L2DBG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2DBG_OFST))
11096 /* The lower bound address range of the ALT_L2_REGS_L2DBG component. */
11097 #define ALT_L2_REGS_L2DBG_LB_ADDR ALT_L2_REGS_L2DBG_ADDR
11098 /* The upper bound address range of the ALT_L2_REGS_L2DBG component. */
11099 #define ALT_L2_REGS_L2DBG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2DBG_ADDR) + 0x100) - 1))
11100 
11101 
11102 #ifdef __ASSEMBLY__
11103 #define ALT_CAST(type, ptr) ptr
11104 #else /* __ASSEMBLY__ */
11105 #define ALT_CAST(type, ptr) ((type) (ptr))
11106 #endif /* __ASSEMBLY__ */
11107 /*
11108  * Address Space : ALT_HPS
11109  *
11110  * Address Map
11111  *
11112  * Address Range | Component
11113  * :------------------------|:--------------------------------------------
11114  * 0x00000000 - 0xbfffffff | Undefined
11115  * 0xc0000000 - 0xfbffffff | ALT_FPGA_BRIDGE_H2F128
11116  * 0xfc000000 - 0xff1fffff | Undefined
11117  * 0xff200000 - 0xff3fffff | ALT_FPGA_BRIDGE_LWH2F
11118  * 0xff400000 - 0xff7fffff | Undefined
11119  * 0xff800000 - 0xff80105b | ALT_EMAC0
11120  * 0xff80105c - 0xff801fff | Undefined
11121  * 0xff802000 - 0xff80305b | ALT_EMAC1
11122  * 0xff80305c - 0xff803fff | Undefined
11123  * 0xff804000 - 0xff80505b | ALT_EMAC2
11124  * 0xff80505c - 0xff807fff | Undefined
11125  * 0xff808000 - 0xff8083ff | ALT_SDMMC
11126  * 0xff808400 - 0xff808fff | Undefined
11127  * 0xff809000 - 0xff8090ff | ALT_QSPI
11128  * 0xff809100 - 0xff8c07ff | Undefined
11129  * 0xff8c0800 - 0xff8c0bff | ALT_ECC_EMAC0_RX_ECC
11130  * 0xff8c0c00 - 0xff8c0fff | ALT_ECC_EMAC0_TX_ECC
11131  * 0xff8c1000 - 0xff8c13ff | ALT_ECC_EMAC1_RX_ECC
11132  * 0xff8c1400 - 0xff8c17ff | ALT_ECC_EMAC1_TX_ECC
11133  * 0xff8c1800 - 0xff8c1bff | ALT_ECC_EMAC2_RX_ECC
11134  * 0xff8c1c00 - 0xff8c1fff | ALT_ECC_EMAC2_TX_ECC
11135  * 0xff8c2000 - 0xff8c23ff | ALT_ECC_NAND
11136  * 0xff8c2400 - 0xff8c27ff | ALT_ECC_NANDR
11137  * 0xff8c2800 - 0xff8c2bff | ALT_ECC_NANDW
11138  * 0xff8c2c00 - 0xff8c2fff | ALT_ECC_SDMMC
11139  * 0xff8c3000 - 0xff8c33ff | ALT_ECC_OCRAM_ECC
11140  * 0xff8c3400 - 0xff8c7fff | Undefined
11141  * 0xff8c8000 - 0xff8c83ff | ALT_ECC_DMAC
11142  * 0xff8c8400 - 0xff8c87ff | ALT_ECC_QSPI
11143  * 0xff8c8800 - 0xff8c8bff | ALT_ECC_OTG0_ECC
11144  * 0xff8c8c00 - 0xff8c8fff | ALT_ECC_OTG1_ECC
11145  * 0xff8c9000 - 0xff9fffff | Undefined
11146  * 0xffa00000 - 0xffafffff | ALT_QSPIDATA
11147  * 0xffb00000 - 0xffb0013f | ALT_USB0_GLOBGRP
11148  * 0xffb00140 - 0xffb003ff | Undefined
11149  * 0xffb00400 - 0xffb006ff | ALT_USB0_HOSTGRP
11150  * 0xffb00700 - 0xffb007ff | Undefined
11151  * 0xffb00800 - 0xffb00cff | ALT_USB0_DEVGRP
11152  * 0xffb00d00 - 0xffb00dff | Undefined
11153  * 0xffb00e00 - 0xffb00e03 | ALT_USB0_PWRCLKGRP
11154  * 0xffb00e04 - 0xffb00fff | Undefined
11155  * 0xffb01000 - 0xffb01fff | ALT_USB0_DWC_OTG_DFIFO_0
11156  * 0xffb02000 - 0xffb02fff | ALT_USB0_DWC_OTG_DFIFO_1
11157  * 0xffb03000 - 0xffb03fff | ALT_USB0_DWC_OTG_DFIFO_2
11158  * 0xffb04000 - 0xffb04fff | ALT_USB0_DWC_OTG_DFIFO_3
11159  * 0xffb05000 - 0xffb05fff | ALT_USB0_DWC_OTG_DFIFO_4
11160  * 0xffb06000 - 0xffb06fff | ALT_USB0_DWC_OTG_DFIFO_5
11161  * 0xffb07000 - 0xffb07fff | ALT_USB0_DWC_OTG_DFIFO_6
11162  * 0xffb08000 - 0xffb08fff | ALT_USB0_DWC_OTG_DFIFO_7
11163  * 0xffb09000 - 0xffb09fff | ALT_USB0_DWC_OTG_DFIFO_8
11164  * 0xffb0a000 - 0xffb0afff | ALT_USB0_DWC_OTG_DFIFO_9
11165  * 0xffb0b000 - 0xffb0bfff | ALT_USB0_DWC_OTG_DFIFO_10
11166  * 0xffb0c000 - 0xffb0cfff | ALT_USB0_DWC_OTG_DFIFO_11
11167  * 0xffb0d000 - 0xffb0dfff | ALT_USB0_DWC_OTG_DFIFO_12
11168  * 0xffb0e000 - 0xffb0efff | ALT_USB0_DWC_OTG_DFIFO_13
11169  * 0xffb0f000 - 0xffb0ffff | ALT_USB0_DWC_OTG_DFIFO_14
11170  * 0xffb10000 - 0xffb10fff | ALT_USB0_DWC_OTG_DFIFO_15
11171  * 0xffb11000 - 0xffb1ffff | Undefined
11172  * 0xffb20000 - 0xffb3ffff | ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS
11173  * 0xffb40000 - 0xffb4013f | ALT_USB1_GLOBGRP
11174  * 0xffb40140 - 0xffb403ff | Undefined
11175  * 0xffb40400 - 0xffb406ff | ALT_USB1_HOSTGRP
11176  * 0xffb40700 - 0xffb407ff | Undefined
11177  * 0xffb40800 - 0xffb40cff | ALT_USB1_DEVGRP
11178  * 0xffb40d00 - 0xffb40dff | Undefined
11179  * 0xffb40e00 - 0xffb40e03 | ALT_USB1_PWRCLKGRP
11180  * 0xffb40e04 - 0xffb40fff | Undefined
11181  * 0xffb41000 - 0xffb41fff | ALT_USB1_DWC_OTG_DFIFO_0
11182  * 0xffb42000 - 0xffb42fff | ALT_USB1_DWC_OTG_DFIFO_1
11183  * 0xffb43000 - 0xffb43fff | ALT_USB1_DWC_OTG_DFIFO_2
11184  * 0xffb44000 - 0xffb44fff | ALT_USB1_DWC_OTG_DFIFO_3
11185  * 0xffb45000 - 0xffb45fff | ALT_USB1_DWC_OTG_DFIFO_4
11186  * 0xffb46000 - 0xffb46fff | ALT_USB1_DWC_OTG_DFIFO_5
11187  * 0xffb47000 - 0xffb47fff | ALT_USB1_DWC_OTG_DFIFO_6
11188  * 0xffb48000 - 0xffb48fff | ALT_USB1_DWC_OTG_DFIFO_7
11189  * 0xffb49000 - 0xffb49fff | ALT_USB1_DWC_OTG_DFIFO_8
11190  * 0xffb4a000 - 0xffb4afff | ALT_USB1_DWC_OTG_DFIFO_9
11191  * 0xffb4b000 - 0xffb4bfff | ALT_USB1_DWC_OTG_DFIFO_10
11192  * 0xffb4c000 - 0xffb4cfff | ALT_USB1_DWC_OTG_DFIFO_11
11193  * 0xffb4d000 - 0xffb4dfff | ALT_USB1_DWC_OTG_DFIFO_12
11194  * 0xffb4e000 - 0xffb4efff | ALT_USB1_DWC_OTG_DFIFO_13
11195  * 0xffb4f000 - 0xffb4ffff | ALT_USB1_DWC_OTG_DFIFO_14
11196  * 0xffb50000 - 0xffb50fff | ALT_USB1_DWC_OTG_DFIFO_15
11197  * 0xffb51000 - 0xffb5ffff | Undefined
11198  * 0xffb60000 - 0xffb7ffff | ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS
11199  * 0xffb80000 - 0xffb802b3 | ALT_NAND_CFG
11200  * 0xffb802b4 - 0xffb802ff | Undefined
11201  * 0xffb80300 - 0xffb803f3 | ALT_NAND_PARAM
11202  * 0xffb803f4 - 0xffb803ff | Undefined
11203  * 0xffb80400 - 0xffb80543 | ALT_NAND_STAT
11204  * 0xffb80544 - 0xffb8064f | Undefined
11205  * 0xffb80650 - 0xffb80663 | ALT_NAND_ECC
11206  * 0xffb80664 - 0xffb806ff | Undefined
11207  * 0xffb80700 - 0xffb807d3 | ALT_NAND_DMA
11208  * 0xffb807d4 - 0xffb8ffff | Undefined
11209  * 0xffb90000 - 0xffb9ffff | ALT_NANDDATA
11210  * 0xffba0000 - 0xffc01fff | Undefined
11211  * 0xffc02000 - 0xffc020ff | ALT_UART0
11212  * 0xffc02100 - 0xffc021ff | ALT_UART1
11213  * 0xffc02200 - 0xffc022ff | ALT_I2C0
11214  * 0xffc02300 - 0xffc023ff | ALT_I2C1
11215  * 0xffc02400 - 0xffc024ff | ALT_I2C_EMAC_0_I2C
11216  * 0xffc02500 - 0xffc025ff | ALT_I2C_EMAC_1_I2C
11217  * 0xffc02600 - 0xffc026ff | ALT_I2C_EMAC_2_I2C
11218  * 0xffc02700 - 0xffc027ff | ALT_SPTMR0
11219  * 0xffc02800 - 0xffc028ff | ALT_SPTMR1
11220  * 0xffc02900 - 0xffc0297f | ALT_GPIO0
11221  * 0xffc02980 - 0xffc029ff | Undefined
11222  * 0xffc02a00 - 0xffc02a7f | ALT_GPIO1
11223  * 0xffc02a80 - 0xffc02aff | Undefined
11224  * 0xffc02b00 - 0xffc02b7f | ALT_GPIO_2_GPIO
11225  * 0xffc02b80 - 0xffcf9fff | Undefined
11226  * 0xffcfa000 - 0xffcfafff | ALT_IO48_HMC_MMR
11227  * 0xffcfb000 - 0xffcfb4ff | ALT_ECC_HMC_OCP
11228  * 0xffcfb500 - 0xffcfdfff | Undefined
11229  * 0xffcfe000 - 0xffcfe3ff | ALT_SEC_MGR_AESFIFO
11230  * 0xffcfe400 - 0xffcfe7ff | ALT_FPGAMGRDATA
11231  * 0xffcfe800 - 0xffcfffff | Undefined
11232  * 0xffd00000 - 0xffd000ff | ALT_TMR_SYS_0_TMR
11233  * 0xffd00100 - 0xffd001ff | ALT_TMR_SYS_1_TMR
11234  * 0xffd00200 - 0xffd002ff | ALT_L4WD0
11235  * 0xffd00300 - 0xffd003ff | ALT_L4WD1
11236  * 0xffd00400 - 0xffd02fff | Undefined
11237  * 0xffd03000 - 0xffd03fff | ALT_FPGAMGR
11238  * 0xffd04000 - 0xffd0403f | ALT_CLKMGR_CLKMGR
11239  * 0xffd04040 - 0xffd040bf | ALT_CLKMGR_MAINPLL
11240  * 0xffd040c0 - 0xffd0413f | ALT_CLKMGR_PERPLL
11241  * 0xffd04140 - 0xffd0417f | ALT_CLKMGR_ALTERA
11242  * 0xffd04180 - 0xffd04fff | Undefined
11243  * 0xffd05000 - 0xffd050ff | ALT_RSTMGR
11244  * 0xffd05100 - 0xffd05fff | Undefined
11245  * 0xffd06000 - 0xffd061ff | ALT_SYSMGR
11246  * 0xffd06200 - 0xffd062ff | ALT_SYSMGR_ROM
11247  * 0xffd06300 - 0xffd06fff | Undefined
11248  * 0xffd07000 - 0xffd071ff | ALT_PINMUX_SHARED_3V_IO_GRP
11249  * 0xffd07200 - 0xffd073ff | ALT_PINMUX_DCTD_IO_GRP
11250  * 0xffd07400 - 0xffd074ff | ALT_PINMUX_FPGA_INTERFACE_GRP
11251  * 0xffd07500 - 0xffd10fff | Undefined
11252  * 0xffd11000 - 0xffd110ff | ALT_NOC_L4_PRIV_FLT
11253  * 0xffd11100 - 0xffd1117f | ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE
11254  * 0xffd11180 - 0xffd111ff | Undefined
11255  * 0xffd11200 - 0xffd1127f | ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE
11256  * 0xffd11280 - 0xffd112ff | Undefined
11257  * 0xffd11300 - 0xffd1137f | ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE
11258  * 0xffd11380 - 0xffd113ff | Undefined
11259  * 0xffd11400 - 0xffd1147f | ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE
11260  * 0xffd11480 - 0xffd114ff | Undefined
11261  * 0xffd11500 - 0xffd1157f | ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE
11262  * 0xffd11580 - 0xffd115ff | Undefined
11263  * 0xffd11600 - 0xffd1167f | ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE
11264  * 0xffd11680 - 0xffd11fff | Undefined
11265  * 0xffd12000 - 0xffd123ff | ALT_NOC_MPU_DDR_T_PRB
11266  * 0xffd12400 - 0xffd1247f | ALT_NOC_MPU_DDR_T_SCHED
11267  * 0xffd12480 - 0xffd12fff | Undefined
11268  * 0xffd13000 - 0xffd130ff | ALT_NOC_FW_L4_PER_SCR
11269  * 0xffd13100 - 0xffd131ff | ALT_NOC_FW_L4_SYS_SCR
11270  * 0xffd13200 - 0xffd132ff | ALT_NOC_FW_OCRAM_SCR
11271  * 0xffd13300 - 0xffd133ff | ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR
11272  * 0xffd13400 - 0xffd134ff | ALT_NOC_FW_DDR_L3_SCR
11273  * 0xffd13500 - 0xffd135ff | ALT_NOC_FW_H2F_SCR
11274  * 0xffd13600 - 0xffd13fff | Undefined
11275  * 0xffd14000 - 0xffd143ff | ALT_NOC_MPU_PRB_H2F_MAIN_PRB
11276  * 0xffd14400 - 0xffd147ff | ALT_NOC_MPU_PRB_EMACS_MAIN_PRB
11277  * 0xffd14800 - 0xffd1487f | ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER
11278  * 0xffd14880 - 0xffd148ff | Undefined
11279  * 0xffd14900 - 0xffd1497f | ALT_NOC_MPU_CS_OBS_AT_ATBENDPT
11280  * 0xffd14980 - 0xffd149ff | ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0
11281  * 0xffd14a00 - 0xffd14fff | Undefined
11282  * 0xffd15000 - 0xffd153ff | ALT_NOC_MPU_PRB_MPU_MAIN_PRB
11283  * 0xffd15400 - 0xffd15fff | Undefined
11284  * 0xffd16000 - 0xffd1607f | ALT_NOC_MPU_M0_MAIN_QOS
11285  * 0xffd16080 - 0xffd160ff | ALT_NOC_MPU_M1_MAIN_QOS
11286  * 0xffd16100 - 0xffd1617f | ALT_NOC_MPU_F2H_AXI32_QOS
11287  * 0xffd16180 - 0xffd161ff | ALT_NOC_MPU_F2H_AXI64_QOS
11288  * 0xffd16200 - 0xffd1627f | ALT_NOC_MPU_F2H_AXI128_QOS
11289  * 0xffd16280 - 0xffd162ff | ALT_NOC_MPU_DMA_M0_QOS
11290  * 0xffd16300 - 0xffd1637f | ALT_NOC_MPU_EMAC0_M_QOS
11291  * 0xffd16380 - 0xffd163ff | ALT_NOC_MPU_EMAC1_M_QOS
11292  * 0xffd16400 - 0xffd1647f | ALT_NOC_MPU_EMAC2_M_QOS
11293  * 0xffd16480 - 0xffd164ff | ALT_NOC_MPU_USB0_M_MAIN_QOS
11294  * 0xffd16500 - 0xffd1657f | ALT_NOC_MPU_USB1_M_MAIN_QOS
11295  * 0xffd16580 - 0xffd165ff | ALT_NOC_MPU_NAND_M_MAIN_QOS
11296  * 0xffd16600 - 0xffd1667f | ALT_NOC_MPU_SDMMC_M_MAIN_QOS
11297  * 0xffd16680 - 0xffd166ff | ALT_NOC_MPU_F2SDR0_AXI32_QOS
11298  * 0xffd16700 - 0xffd1677f | ALT_NOC_MPU_F2SDR0_AXI64_QOS
11299  * 0xffd16780 - 0xffd167ff | ALT_NOC_MPU_F2SDR0_AXI128_QOS
11300  * 0xffd16800 - 0xffd1687f | ALT_NOC_MPU_F2SDR1_AXI32_QOS
11301  * 0xffd16880 - 0xffd168ff | ALT_NOC_MPU_F2SDR1_AXI64_QOS
11302  * 0xffd16900 - 0xffd1697f | ALT_NOC_MPU_F2SDR2_AXI32_QOS
11303  * 0xffd16980 - 0xffd169ff | ALT_NOC_MPU_F2SDR2_AXI64_QOS
11304  * 0xffd16a00 - 0xffd16fff | Undefined
11305  * 0xffd17000 - 0xffd1707f | ALT_NOC_MPU_F2SDR2_AXI128_QOS
11306  * 0xffd17080 - 0xffd170ff | ALT_NOC_MPU_EMAC0_M_XACTSTATFLT
11307  * 0xffd17100 - 0xffd9ffff | Undefined
11308  * 0xffda0000 - 0xffda005f | ALT_DMA_NSCTL
11309  * 0xffda0060 - 0xffda00ff | Undefined
11310  * 0xffda0100 - 0xffda013f | ALT_DMA_NSCHANNELSTAT
11311  * 0xffda0140 - 0xffda03ff | Undefined
11312  * 0xffda0400 - 0xffda04ff | ALT_DMA_NSAXISTAT
11313  * 0xffda0500 - 0xffda0cff | Undefined
11314  * 0xffda0d00 - 0xffda0d0f | ALT_DMA_NSDBG
11315  * 0xffda0d10 - 0xffda0dff | Undefined
11316  * 0xffda0e00 - 0xffda0e1f | ALT_DMA_NSCFG
11317  * 0xffda0e20 - 0xffda0fdf | Undefined
11318  * 0xffda0fe0 - 0xffda0fff | ALT_DMA_NSCOMPID
11319  * 0xffda1000 - 0xffda105f | ALT_DMA_SCTL
11320  * 0xffda1060 - 0xffda10ff | Undefined
11321  * 0xffda1100 - 0xffda113f | ALT_DMA_SCHANNELSTAT
11322  * 0xffda1140 - 0xffda13ff | Undefined
11323  * 0xffda1400 - 0xffda14ff | ALT_DMA_SAXISTAT
11324  * 0xffda1500 - 0xffda1cff | Undefined
11325  * 0xffda1d00 - 0xffda1d0f | ALT_DMA_SDBG
11326  * 0xffda1d10 - 0xffda1dff | Undefined
11327  * 0xffda1e00 - 0xffda1e1f | ALT_DMA_SCFG
11328  * 0xffda1e20 - 0xffda1fdf | Undefined
11329  * 0xffda1fe0 - 0xffda1fff | ALT_DMA_SCOMPID
11330  * 0xffda2000 - 0xffda207f | ALT_SPIS0
11331  * 0xffda2080 - 0xffda2fff | Undefined
11332  * 0xffda3000 - 0xffda307f | ALT_SPIS1
11333  * 0xffda3080 - 0xffda3fff | Undefined
11334  * 0xffda4000 - 0xffda40ff | ALT_SPIM0
11335  * 0xffda4100 - 0xffda4fff | Undefined
11336  * 0xffda5000 - 0xffda50ff | ALT_SPIM1
11337  * 0xffda5100 - 0xffdfffff | Undefined
11338  * 0xffe00000 - 0xffe3ffff | ALT_OCRAM
11339  * 0xffe40000 - 0xfffbffff | Undefined
11340  * 0xfffc0000 - 0xfffdffff | ALT_ROM
11341  * 0xfffe0000 - 0xffffbfff | Undefined
11342  * 0xffffc000 - 0xffffc0ff | ALT_MPU_REGS_MPUSCU
11343  * 0xffffc100 - 0xffffc1ff | ALT_MPU_REGS_MPUGIC
11344  * 0xffffc200 - 0xffffc2ff | ALT_MPU_REGS_MPUGLOBTMR
11345  * 0xffffc300 - 0xffffc5ff | Undefined
11346  * 0xffffc600 - 0xffffc6ff | ALT_MPU_REGS_MPUPRIVATETMR
11347  * 0xffffc700 - 0xffffcfff | Undefined
11348  * 0xffffd000 - 0xffffdfff | ALT_MPU_REGS_MPUINTRDIST
11349  * 0xffffe000 - 0xffffefff | Undefined
11350  * 0xfffff000 - 0xfffff0ff | ALT_L2_REGS_L2TYPE
11351  * 0xfffff100 - 0xfffff1ff | ALT_L2_REGS_L2CTL
11352  * 0xfffff200 - 0xfffff2ff | ALT_L2_REGS_L2INT
11353  * 0xfffff300 - 0xfffff6ff | Undefined
11354  * 0xfffff700 - 0xfffff7ff | ALT_L2_REGS_L2MAINTENANCE
11355  * 0xfffff800 - 0xfffff8ff | Undefined
11356  * 0xfffff900 - 0xfffff9ff | ALT_L2_REGS_L2LOCKDOWN
11357  * 0xfffffa00 - 0xfffffbff | Undefined
11358  * 0xfffffc00 - 0xfffffcff | ALT_L2_REGS_L2ADDRFLT
11359  * 0xfffffd00 - 0xfffffeff | Undefined
11360  * 0xffffff00 - 0xffffffff | ALT_L2_REGS_L2DBG
11361  */
11362 
11363 #ifdef __cplusplus
11364 }
11365 #endif /* __cplusplus */
11366 #endif /* __ALT_SOCAL_HPS_H__ */
11367