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alt_noc_ccu_emac_tbu_transtatfilt.h
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2 * *
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32 
33 /* Altera - ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT */
34 
35 #ifndef __ALT_SOCAL_NOC_CCU_EMAC_TBU_TRANSTATFILT_H__
36 #define __ALT_SOCAL_NOC_CCU_EMAC_TBU_TRANSTATFILT_H__
37 
38 #ifndef __ASSEMBLY__
39 #ifdef __cplusplus
40 #include <cstdint>
41 extern "C"
42 {
43 #else /* __cplusplus */
44 #include <stdint.h>
45 #endif /* __cplusplus */
46 #endif /* __ASSEMBLY__ */
47 
48 /*
49  * Component : NOC_CCU_EMAC_TBU_TRANSTATFILT
50  *
51  */
52 /*
53  * Register : emac_tbu_m_I_main_TransactionStatFilter_Id_CoreId
54  *
55  * Register Layout
56  *
57  * Bits | Access | Reset | Description
58  * :-------|:-------|:---------|:-------------------------------------------------------------------------------------------------
59  * [7:0] | R | 0x9 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID
60  * [31:8] | R | 0xc050c0 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM
61  *
62  */
63 /*
64  * Field : CORETYPEID
65  *
66  * Field identifying the type of IP.
67  *
68  * Field Access Macros:
69  *
70  */
71 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID register field. */
72 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID_LSB 0
73 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID register field. */
74 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID_MSB 7
75 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID register field. */
76 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID_WIDTH 8
77 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID register field value. */
78 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID_SET_MSK 0x000000ff
79 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID register field value. */
80 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID_CLR_MSK 0xffffff00
81 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID register field. */
82 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID_RESET 0x9
83 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID field value from a register. */
84 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID_GET(value) (((value) & 0x000000ff) >> 0)
85 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID register field value suitable for setting the register. */
86 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID_SET(value) (((value) << 0) & 0x000000ff)
87 
88 /*
89  * Field : CORECHECKSUM
90  *
91  * Field containing a checksum of the parameters of the IP.
92  *
93  * Field Access Macros:
94  *
95  */
96 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM register field. */
97 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM_LSB 8
98 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM register field. */
99 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM_MSB 31
100 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM register field. */
101 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM_WIDTH 24
102 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM register field value. */
103 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM_SET_MSK 0xffffff00
104 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM register field value. */
105 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM_CLR_MSK 0x000000ff
106 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM register field. */
107 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM_RESET 0xc050c0
108 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM field value from a register. */
109 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM_GET(value) (((value) & 0xffffff00) >> 8)
110 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM register field value suitable for setting the register. */
111 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM_SET(value) (((value) << 8) & 0xffffff00)
112 
113 #ifndef __ASSEMBLY__
114 /*
115  * WARNING: The C register and register group struct declarations are provided for
116  * convenience and illustrative purposes. They should, however, be used with
117  * caution as the C language standard provides no guarantees about the alignment or
118  * atomicity of device memory accesses. The recommended practice for coding device
119  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
120  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
121  * alt_write_dword() functions for 64 bit registers.
122  *
123  * The struct declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID.
124  */
125 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_s
126 {
127  const volatile uint32_t CORETYPEID : 8; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORETYPEID */
128  const volatile uint32_t CORECHECKSUM : 24; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_CORECHECKSUM */
129 };
130 
131 /* The typedef declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID. */
132 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_t;
133 #endif /* __ASSEMBLY__ */
134 
135 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID register. */
136 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_RESET 0xc050c009
137 /* The byte offset of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID register from the beginning of the component. */
138 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_OFST 0x0
139 
140 /*
141  * Register : emac_tbu_m_I_main_TransactionStatFilter_Id_RevisionId
142  *
143  * Register Layout
144  *
145  * Bits | Access | Reset | Description
146  * :-------|:-------|:------|:--------------------------------------------------------------------------------------------------
147  * [7:0] | R | 0x0 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID
148  * [31:8] | R | 0x148 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID
149  *
150  */
151 /*
152  * Field : USERID
153  *
154  * Field containing a user defined value, not used anywhere inside the IP itself.
155  *
156  * Field Access Macros:
157  *
158  */
159 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID register field. */
160 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID_LSB 0
161 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID register field. */
162 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID_MSB 7
163 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID register field. */
164 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID_WIDTH 8
165 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID register field value. */
166 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID_SET_MSK 0x000000ff
167 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID register field value. */
168 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID_CLR_MSK 0xffffff00
169 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID register field. */
170 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID_RESET 0x0
171 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID field value from a register. */
172 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID_GET(value) (((value) & 0x000000ff) >> 0)
173 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID register field value suitable for setting the register. */
174 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID_SET(value) (((value) << 0) & 0x000000ff)
175 
176 /*
177  * Field : FLEXNOCID
178  *
179  * Field containing the build revision of the software used to generate the IP HDL
180  * code.
181  *
182  * Field Access Macros:
183  *
184  */
185 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID register field. */
186 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID_LSB 8
187 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID register field. */
188 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID_MSB 31
189 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID register field. */
190 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID_WIDTH 24
191 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID register field value. */
192 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID_SET_MSK 0xffffff00
193 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID register field value. */
194 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID_CLR_MSK 0x000000ff
195 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID register field. */
196 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID_RESET 0x148
197 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID field value from a register. */
198 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID_GET(value) (((value) & 0xffffff00) >> 8)
199 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID register field value suitable for setting the register. */
200 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID_SET(value) (((value) << 8) & 0xffffff00)
201 
202 #ifndef __ASSEMBLY__
203 /*
204  * WARNING: The C register and register group struct declarations are provided for
205  * convenience and illustrative purposes. They should, however, be used with
206  * caution as the C language standard provides no guarantees about the alignment or
207  * atomicity of device memory accesses. The recommended practice for coding device
208  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
209  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
210  * alt_write_dword() functions for 64 bit registers.
211  *
212  * The struct declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID.
213  */
214 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_s
215 {
216  const volatile uint32_t USERID : 8; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_USERID */
217  const volatile uint32_t FLEXNOCID : 24; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_FLEXNOCID */
218 };
219 
220 /* The typedef declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID. */
221 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_t;
222 #endif /* __ASSEMBLY__ */
223 
224 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID register. */
225 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_RESET 0x00014800
226 /* The byte offset of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID register from the beginning of the component. */
227 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_OFST 0x4
228 
229 /*
230  * Register : emac_tbu_m_I_main_TransactionStatFilter_Mode
231  *
232  * Register Layout
233  *
234  * Bits | Access | Reset | Description
235  * :-------|:-------|:--------|:------------------------------------------------------------------------------------
236  * [0] | RW | 0x0 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE
237  * [31:1] | ??? | Unknown | *UNDEFINED*
238  *
239  */
240 /*
241  * Field : MODE
242  *
243  * Register Mode is a 1-bit register that sets the filtering mode as follows:
244  * handshake Mode = 0 or latency Mode = 1.
245  *
246  * Field Access Macros:
247  *
248  */
249 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE register field. */
250 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE_LSB 0
251 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE register field. */
252 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE_MSB 0
253 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE register field. */
254 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE_WIDTH 1
255 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE register field value. */
256 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE_SET_MSK 0x00000001
257 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE register field value. */
258 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE_CLR_MSK 0xfffffffe
259 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE register field. */
260 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE_RESET 0x0
261 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE field value from a register. */
262 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE_GET(value) (((value) & 0x00000001) >> 0)
263 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE register field value suitable for setting the register. */
264 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE_SET(value) (((value) << 0) & 0x00000001)
265 
266 #ifndef __ASSEMBLY__
267 /*
268  * WARNING: The C register and register group struct declarations are provided for
269  * convenience and illustrative purposes. They should, however, be used with
270  * caution as the C language standard provides no guarantees about the alignment or
271  * atomicity of device memory accesses. The recommended practice for coding device
272  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
273  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
274  * alt_write_dword() functions for 64 bit registers.
275  *
276  * The struct declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE.
277  */
278 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_s
279 {
280  volatile uint32_t MODE : 1; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_MODE */
281  uint32_t : 31; /* *UNDEFINED* */
282 };
283 
284 /* The typedef declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE. */
285 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_t;
286 #endif /* __ASSEMBLY__ */
287 
288 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE register. */
289 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_RESET 0x00000000
290 /* The byte offset of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE register from the beginning of the component. */
291 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_OFST 0x8
292 
293 /*
294  * Register : emac_tbu_m_I_main_TransactionStatFilter_AddrBase_Low
295  *
296  * Register Layout
297  *
298  * Bits | Access | Reset | Description
299  * :-------|:-------|:------|:----------------------------------------------------------------------------------------------------
300  * [31:0] | RW | 0x0 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW
301  *
302  */
303 /*
304  * Field : ADDRBASE_LOW
305  *
306  * Address base LSB register.
307  *
308  * Field Access Macros:
309  *
310  */
311 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW register field. */
312 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW_LSB 0
313 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW register field. */
314 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW_MSB 31
315 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW register field. */
316 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW_WIDTH 32
317 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW register field value. */
318 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW_SET_MSK 0xffffffff
319 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW register field value. */
320 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW_CLR_MSK 0x00000000
321 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW register field. */
322 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW_RESET 0x0
323 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW field value from a register. */
324 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW_GET(value) (((value) & 0xffffffff) >> 0)
325 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW register field value suitable for setting the register. */
326 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW_SET(value) (((value) << 0) & 0xffffffff)
327 
328 #ifndef __ASSEMBLY__
329 /*
330  * WARNING: The C register and register group struct declarations are provided for
331  * convenience and illustrative purposes. They should, however, be used with
332  * caution as the C language standard provides no guarantees about the alignment or
333  * atomicity of device memory accesses. The recommended practice for coding device
334  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
335  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
336  * alt_write_dword() functions for 64 bit registers.
337  *
338  * The struct declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW.
339  */
340 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_s
341 {
342  volatile uint32_t ADDRBASE_LOW : 32; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDRBASE_LOW */
343 };
344 
345 /* The typedef declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW. */
346 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_t;
347 #endif /* __ASSEMBLY__ */
348 
349 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW register. */
350 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_RESET 0x00000000
351 /* The byte offset of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW register from the beginning of the component. */
352 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_OFST 0xc
353 
354 /*
355  * Register : emac_tbu_m_I_main_TransactionStatFilter_AddrBase_High
356  *
357  * Register Layout
358  *
359  * Bits | Access | Reset | Description
360  * :-------|:-------|:--------|:------------------------------------------------------------------------------------------------------
361  * [8:0] | RW | 0x0 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH
362  * [31:9] | ??? | Unknown | *UNDEFINED*
363  *
364  */
365 /*
366  * Field : ADDRBASE_HIGH
367  *
368  * Address base MSB register.
369  *
370  * Field Access Macros:
371  *
372  */
373 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH register field. */
374 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH_LSB 0
375 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH register field. */
376 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH_MSB 8
377 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH register field. */
378 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH_WIDTH 9
379 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH register field value. */
380 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH_SET_MSK 0x000001ff
381 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH register field value. */
382 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH_CLR_MSK 0xfffffe00
383 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH register field. */
384 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH_RESET 0x0
385 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH field value from a register. */
386 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH_GET(value) (((value) & 0x000001ff) >> 0)
387 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH register field value suitable for setting the register. */
388 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH_SET(value) (((value) << 0) & 0x000001ff)
389 
390 #ifndef __ASSEMBLY__
391 /*
392  * WARNING: The C register and register group struct declarations are provided for
393  * convenience and illustrative purposes. They should, however, be used with
394  * caution as the C language standard provides no guarantees about the alignment or
395  * atomicity of device memory accesses. The recommended practice for coding device
396  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
397  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
398  * alt_write_dword() functions for 64 bit registers.
399  *
400  * The struct declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH.
401  */
402 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_s
403 {
404  volatile uint32_t ADDRBASE_HIGH : 9; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDRBASE_HIGH */
405  uint32_t : 23; /* *UNDEFINED* */
406 };
407 
408 /* The typedef declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH. */
409 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_t;
410 #endif /* __ASSEMBLY__ */
411 
412 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH register. */
413 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_RESET 0x00000000
414 /* The byte offset of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH register from the beginning of the component. */
415 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_OFST 0x10
416 
417 /*
418  * Register : emac_tbu_m_I_main_TransactionStatFilter_AddrWindowSize
419  *
420  * Register Layout
421  *
422  * Bits | Access | Reset | Description
423  * :-------|:-------|:--------|:--------------------------------------------------------------------------------------------------------
424  * [5:0] | RW | 0x0 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE
425  * [31:6] | ??? | Unknown | *UNDEFINED*
426  *
427  */
428 /*
429  * Field : ADDRWINDOWSIZE
430  *
431  * Register AddrWindowSize contains the encoded address mask used to filter
432  * packets: the effective Mask value is equal to ~(2**AddrWindowSize - 1). A packet
433  * is a candidate when ReqInfo.Addr & AddrMask = AddrBase & AddrMask.
434  *
435  * Field Access Macros:
436  *
437  */
438 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE register field. */
439 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE_LSB 0
440 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE register field. */
441 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE_MSB 5
442 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE register field. */
443 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE_WIDTH 6
444 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE register field value. */
445 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE_SET_MSK 0x0000003f
446 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE register field value. */
447 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE_CLR_MSK 0xffffffc0
448 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE register field. */
449 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE_RESET 0x0
450 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE field value from a register. */
451 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE_GET(value) (((value) & 0x0000003f) >> 0)
452 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE register field value suitable for setting the register. */
453 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE_SET(value) (((value) << 0) & 0x0000003f)
454 
455 #ifndef __ASSEMBLY__
456 /*
457  * WARNING: The C register and register group struct declarations are provided for
458  * convenience and illustrative purposes. They should, however, be used with
459  * caution as the C language standard provides no guarantees about the alignment or
460  * atomicity of device memory accesses. The recommended practice for coding device
461  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
462  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
463  * alt_write_dword() functions for 64 bit registers.
464  *
465  * The struct declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE.
466  */
467 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_s
468 {
469  volatile uint32_t ADDRWINDOWSIZE : 6; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDRWINDOWSIZE */
470  uint32_t : 26; /* *UNDEFINED* */
471 };
472 
473 /* The typedef declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE. */
474 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_t;
475 #endif /* __ASSEMBLY__ */
476 
477 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE register. */
478 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_RESET 0x00000000
479 /* The byte offset of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE register from the beginning of the component. */
480 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_OFST 0x14
481 
482 /*
483  * Register : emac_tbu_m_I_main_TransactionStatFilter_Opcode
484  *
485  * This register selects candidate packets based on packet opcodes. (0 disables the
486  * filter):
487  *
488  * Register Layout
489  *
490  * Bits | Access | Reset | Description
491  * :-------|:-------|:--------|:--------------------------------------------------------------------------------------
492  * [0] | RW | 0x0 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN
493  * [1] | RW | 0x0 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN
494  * [31:2] | ??? | Unknown | *UNDEFINED*
495  *
496  */
497 /*
498  * Field : RDEN
499  *
500  * When set to 1, selects RD requests.
501  *
502  * Field Access Macros:
503  *
504  */
505 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN register field. */
506 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN_LSB 0
507 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN register field. */
508 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN_MSB 0
509 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN register field. */
510 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN_WIDTH 1
511 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN register field value. */
512 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN_SET_MSK 0x00000001
513 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN register field value. */
514 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN_CLR_MSK 0xfffffffe
515 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN register field. */
516 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN_RESET 0x0
517 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN field value from a register. */
518 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN_GET(value) (((value) & 0x00000001) >> 0)
519 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN register field value suitable for setting the register. */
520 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN_SET(value) (((value) << 0) & 0x00000001)
521 
522 /*
523  * Field : WREN
524  *
525  * When set to 1, selects WR requests.
526  *
527  * Field Access Macros:
528  *
529  */
530 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN register field. */
531 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN_LSB 1
532 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN register field. */
533 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN_MSB 1
534 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN register field. */
535 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN_WIDTH 1
536 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN register field value. */
537 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN_SET_MSK 0x00000002
538 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN register field value. */
539 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN_CLR_MSK 0xfffffffd
540 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN register field. */
541 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN_RESET 0x0
542 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN field value from a register. */
543 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN_GET(value) (((value) & 0x00000002) >> 1)
544 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN register field value suitable for setting the register. */
545 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN_SET(value) (((value) << 1) & 0x00000002)
546 
547 #ifndef __ASSEMBLY__
548 /*
549  * WARNING: The C register and register group struct declarations are provided for
550  * convenience and illustrative purposes. They should, however, be used with
551  * caution as the C language standard provides no guarantees about the alignment or
552  * atomicity of device memory accesses. The recommended practice for coding device
553  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
554  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
555  * alt_write_dword() functions for 64 bit registers.
556  *
557  * The struct declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE.
558  */
559 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_s
560 {
561  volatile uint32_t RDEN : 1; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RDEN */
562  volatile uint32_t WREN : 1; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_WREN */
563  uint32_t : 30; /* *UNDEFINED* */
564 };
565 
566 /* The typedef declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE. */
567 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_t;
568 #endif /* __ASSEMBLY__ */
569 
570 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE register. */
571 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_RESET 0x00000000
572 /* The byte offset of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE register from the beginning of the component. */
573 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_OFST 0x20
574 
575 /*
576  * Register : emac_tbu_m_I_main_TransactionStatFilter_UserBase
577  *
578  * Register Layout
579  *
580  * Bits | Access | Reset | Description
581  * :--------|:-------|:--------|:--------------------------------------------------------------------------------------------
582  * [28:0] | RW | 0x0 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE
583  * [31:29] | ??? | Unknown | *UNDEFINED*
584  *
585  */
586 /*
587  * Field : USERBASE
588  *
589  * This register contains the User base used to filter requests.
590  *
591  * Field Access Macros:
592  *
593  */
594 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE register field. */
595 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE_LSB 0
596 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE register field. */
597 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE_MSB 28
598 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE register field. */
599 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE_WIDTH 29
600 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE register field value. */
601 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE_SET_MSK 0x1fffffff
602 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE register field value. */
603 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE_CLR_MSK 0xe0000000
604 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE register field. */
605 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE_RESET 0x0
606 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE field value from a register. */
607 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE_GET(value) (((value) & 0x1fffffff) >> 0)
608 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE register field value suitable for setting the register. */
609 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE_SET(value) (((value) << 0) & 0x1fffffff)
610 
611 #ifndef __ASSEMBLY__
612 /*
613  * WARNING: The C register and register group struct declarations are provided for
614  * convenience and illustrative purposes. They should, however, be used with
615  * caution as the C language standard provides no guarantees about the alignment or
616  * atomicity of device memory accesses. The recommended practice for coding device
617  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
618  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
619  * alt_write_dword() functions for 64 bit registers.
620  *
621  * The struct declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE.
622  */
623 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_s
624 {
625  volatile uint32_t USERBASE : 29; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_USERBASE */
626  uint32_t : 3; /* *UNDEFINED* */
627 };
628 
629 /* The typedef declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE. */
630 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_t;
631 #endif /* __ASSEMBLY__ */
632 
633 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE register. */
634 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_RESET 0x00000000
635 /* The byte offset of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE register from the beginning of the component. */
636 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_OFST 0x24
637 
638 /*
639  * Register : emac_tbu_m_I_main_TransactionStatFilter_UserMask
640  *
641  * Register Layout
642  *
643  * Bits | Access | Reset | Description
644  * :--------|:-------|:--------|:--------------------------------------------------------------------------------------------
645  * [28:0] | RW | 0x0 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK
646  * [31:29] | ??? | Unknown | *UNDEFINED*
647  *
648  */
649 /*
650  * Field : USERMASK
651  *
652  * This register contains the User mask used to filter requests.
653  *
654  * Field Access Macros:
655  *
656  */
657 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK register field. */
658 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK_LSB 0
659 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK register field. */
660 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK_MSB 28
661 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK register field. */
662 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK_WIDTH 29
663 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK register field value. */
664 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK_SET_MSK 0x1fffffff
665 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK register field value. */
666 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK_CLR_MSK 0xe0000000
667 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK register field. */
668 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK_RESET 0x0
669 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK field value from a register. */
670 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK_GET(value) (((value) & 0x1fffffff) >> 0)
671 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK register field value suitable for setting the register. */
672 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK_SET(value) (((value) << 0) & 0x1fffffff)
673 
674 #ifndef __ASSEMBLY__
675 /*
676  * WARNING: The C register and register group struct declarations are provided for
677  * convenience and illustrative purposes. They should, however, be used with
678  * caution as the C language standard provides no guarantees about the alignment or
679  * atomicity of device memory accesses. The recommended practice for coding device
680  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
681  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
682  * alt_write_dword() functions for 64 bit registers.
683  *
684  * The struct declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK.
685  */
686 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_s
687 {
688  volatile uint32_t USERMASK : 29; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_USERMASK */
689  uint32_t : 3; /* *UNDEFINED* */
690 };
691 
692 /* The typedef declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK. */
693 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_t;
694 #endif /* __ASSEMBLY__ */
695 
696 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK register. */
697 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_RESET 0x00000000
698 /* The byte offset of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK register from the beginning of the component. */
699 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_OFST 0x28
700 
701 /*
702  * Register : emac_tbu_m_I_main_TransactionStatFilter_SecurityBase
703  *
704  * Register Layout
705  *
706  * Bits | Access | Reset | Description
707  * :-------|:-------|:--------|:----------------------------------------------------------------------------------------------------
708  * [1:0] | RW | 0x0 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE
709  * [31:2] | ??? | Unknown | *UNDEFINED*
710  *
711  */
712 /*
713  * Field : SECURITYBASE
714  *
715  * This register contains the Security base used to filter requests.
716  *
717  * Field Access Macros:
718  *
719  */
720 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE register field. */
721 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE_LSB 0
722 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE register field. */
723 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE_MSB 1
724 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE register field. */
725 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE_WIDTH 2
726 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE register field value. */
727 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE_SET_MSK 0x00000003
728 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE register field value. */
729 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE_CLR_MSK 0xfffffffc
730 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE register field. */
731 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE_RESET 0x0
732 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE field value from a register. */
733 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE_GET(value) (((value) & 0x00000003) >> 0)
734 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE register field value suitable for setting the register. */
735 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE_SET(value) (((value) << 0) & 0x00000003)
736 
737 #ifndef __ASSEMBLY__
738 /*
739  * WARNING: The C register and register group struct declarations are provided for
740  * convenience and illustrative purposes. They should, however, be used with
741  * caution as the C language standard provides no guarantees about the alignment or
742  * atomicity of device memory accesses. The recommended practice for coding device
743  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
744  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
745  * alt_write_dword() functions for 64 bit registers.
746  *
747  * The struct declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE.
748  */
749 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_s
750 {
751  volatile uint32_t SECURITYBASE : 2; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_SECURITYBASE */
752  uint32_t : 30; /* *UNDEFINED* */
753 };
754 
755 /* The typedef declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE. */
756 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_t;
757 #endif /* __ASSEMBLY__ */
758 
759 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE register. */
760 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_RESET 0x00000000
761 /* The byte offset of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE register from the beginning of the component. */
762 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_OFST 0x2c
763 
764 /*
765  * Register : emac_tbu_m_I_main_TransactionStatFilter_SecurityMask
766  *
767  * Register Layout
768  *
769  * Bits | Access | Reset | Description
770  * :-------|:-------|:--------|:----------------------------------------------------------------------------------------------------
771  * [1:0] | RW | 0x0 | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK
772  * [31:2] | ??? | Unknown | *UNDEFINED*
773  *
774  */
775 /*
776  * Field : SECURITYMASK
777  *
778  * This register contains the Security mask used to filter requests.
779  *
780  * Field Access Macros:
781  *
782  */
783 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK register field. */
784 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK_LSB 0
785 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK register field. */
786 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK_MSB 1
787 /* The width in bits of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK register field. */
788 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK_WIDTH 2
789 /* The mask used to set the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK register field value. */
790 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK_SET_MSK 0x00000003
791 /* The mask used to clear the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK register field value. */
792 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK_CLR_MSK 0xfffffffc
793 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK register field. */
794 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK_RESET 0x0
795 /* Extracts the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK field value from a register. */
796 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK_GET(value) (((value) & 0x00000003) >> 0)
797 /* Produces a ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK register field value suitable for setting the register. */
798 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK_SET(value) (((value) << 0) & 0x00000003)
799 
800 #ifndef __ASSEMBLY__
801 /*
802  * WARNING: The C register and register group struct declarations are provided for
803  * convenience and illustrative purposes. They should, however, be used with
804  * caution as the C language standard provides no guarantees about the alignment or
805  * atomicity of device memory accesses. The recommended practice for coding device
806  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
807  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
808  * alt_write_dword() functions for 64 bit registers.
809  *
810  * The struct declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK.
811  */
812 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_s
813 {
814  volatile uint32_t SECURITYMASK : 2; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_SECURITYMASK */
815  uint32_t : 30; /* *UNDEFINED* */
816 };
817 
818 /* The typedef declaration for register ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK. */
819 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_t;
820 #endif /* __ASSEMBLY__ */
821 
822 /* The reset value of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK register. */
823 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_RESET 0x00000000
824 /* The byte offset of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK register from the beginning of the component. */
825 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_OFST 0x30
826 
827 #ifndef __ASSEMBLY__
828 /*
829  * WARNING: The C register and register group struct declarations are provided for
830  * convenience and illustrative purposes. They should, however, be used with
831  * caution as the C language standard provides no guarantees about the alignment or
832  * atomicity of device memory accesses. The recommended practice for coding device
833  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
834  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
835  * alt_write_dword() functions for 64 bit registers.
836  *
837  * The struct declaration for register group ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT.
838  */
839 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_s
840 {
841  volatile ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_t emac_tbu_m_I_main_TransactionStatFilter_Id_CoreId; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID */
842  volatile ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_t emac_tbu_m_I_main_TransactionStatFilter_Id_RevisionId; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID */
843  volatile ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_t emac_tbu_m_I_main_TransactionStatFilter_Mode; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE */
844  volatile ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_t emac_tbu_m_I_main_TransactionStatFilter_AddrBase_Low; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW */
845  volatile ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_t emac_tbu_m_I_main_TransactionStatFilter_AddrBase_High; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH */
846  volatile ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_t emac_tbu_m_I_main_TransactionStatFilter_AddrWindowSize; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE */
847  volatile uint32_t _pad_0x18_0x1f[2]; /* *UNDEFINED* */
848  volatile ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_t emac_tbu_m_I_main_TransactionStatFilter_Opcode; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE */
849  volatile ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_t emac_tbu_m_I_main_TransactionStatFilter_UserBase; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE */
850  volatile ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_t emac_tbu_m_I_main_TransactionStatFilter_UserMask; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK */
851  volatile ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_t emac_tbu_m_I_main_TransactionStatFilter_SecurityBase; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE */
852  volatile ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_t emac_tbu_m_I_main_TransactionStatFilter_SecurityMask; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK */
853  volatile uint32_t _pad_0x34_0x80[19]; /* *UNDEFINED* */
854 };
855 
856 /* The typedef declaration for register group ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT. */
857 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_t;
858 /* The struct declaration for the raw register contents of register group ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT. */
859 struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_raw_s
860 {
861  volatile uint32_t emac_tbu_m_I_main_TransactionStatFilter_Id_CoreId; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID */
862  volatile uint32_t emac_tbu_m_I_main_TransactionStatFilter_Id_RevisionId; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID */
863  volatile uint32_t emac_tbu_m_I_main_TransactionStatFilter_Mode; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE */
864  volatile uint32_t emac_tbu_m_I_main_TransactionStatFilter_AddrBase_Low; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW */
865  volatile uint32_t emac_tbu_m_I_main_TransactionStatFilter_AddrBase_High; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH */
866  volatile uint32_t emac_tbu_m_I_main_TransactionStatFilter_AddrWindowSize; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE */
867  volatile uint32_t _pad_0x18_0x1f[2]; /* *UNDEFINED* */
868  volatile uint32_t emac_tbu_m_I_main_TransactionStatFilter_Opcode; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE */
869  volatile uint32_t emac_tbu_m_I_main_TransactionStatFilter_UserBase; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE */
870  volatile uint32_t emac_tbu_m_I_main_TransactionStatFilter_UserMask; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK */
871  volatile uint32_t emac_tbu_m_I_main_TransactionStatFilter_SecurityBase; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE */
872  volatile uint32_t emac_tbu_m_I_main_TransactionStatFilter_SecurityMask; /* ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK */
873  volatile uint32_t _pad_0x34_0x80[19]; /* *UNDEFINED* */
874 };
875 
876 /* The typedef declaration for the raw register contents of register group ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT. */
877 typedef struct ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_raw_s ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_raw_t;
878 #endif /* __ASSEMBLY__ */
879 
880 
881 #ifdef __cplusplus
882 }
883 #endif /* __cplusplus */
884 #endif /* __ALT_SOCAL_NOC_CCU_EMAC_TBU_TRANSTATFILT_H__ */
885