There are eight on-chip general purpose timers. All eight timers are available to each CPU.
There are four types of timers available:
- Four general-purpose countdown timers available to CPU0, CPU1, CPU2, CPU3 or the FPGA.
- Each CPU has a private GP EL1 Non-secure physical timer available only to itself.
- Each CPU has a private GP EL1 Secure physical timer available only to itself.
- Each CPU has a private GP EL2 physical timer available only to itself.
- Each CPU has a private virtual timer available only to itself.
Each type has a somewhat different HW interface This API presents the same external interface for each.
This type definition enumerates the names of the timers managed by the General Purpose Timers Manager.
This type definition enumerates the possible rollover or restart modes of the general purpose timers.
This type definition enumerates the names of the timers managed by the General Purpose Timers Manager.
- Enumerator:
ALT_GPT_CPU_ES1_NSECURE_TMR |
CPU_ES1_NSECURE_TMR - CPU ES1 Non Secured timer - 64-bit
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ALT_GPT_CPU_ES1_SECURE_TMR |
CPU_ES1_NSECURE_TMR - CPU ES1 Secured timer - 64-bit
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ALT_GPT_CPU_EL2_NSECURE_TMR |
CPU_ES1_NSECURE_TMR - CPU ES2 Non Secured timer - 64-bit
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ALT_GPT_CPU_VIRTUAL_TMR |
CPU_VIRTUAL_TMR - CPU Virtual timer - 64-bit
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ALT_GPT_OSC1_TMR0 |
osc1_timer0 - 32-bit timer connected to the L4_OSC1 bus clocked by osc1_clk. Counts down to zero and can either stop or restart.
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ALT_GPT_OSC1_TMR1 |
osc1_timer1 - 32-bit timer connected to the L4_OSC1 bus clocked by osc1_clk. Counts down to zero and can either stop or restart.
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ALT_GPT_SP_TMR0 |
sp_timer0 - 32-bit timer connected to the L4_SP bus clocked by l4_sp_clk. Counts down to zero and can either stop or restart.
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ALT_GPT_SP_TMR1 |
sp_timer1 - 32-bit timer connected to the L4_SP bus clocked by l4_sp_clk. Counts down to zero and can either stop or restart.
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This type definition enumerates the possible rollover or restart modes of the general purpose timers.
- Enumerator:
ALT_GPT_RESTART_MODE_ONESHOT |
ONE-SHOT MODE - CPU_PRIVATE_TMR counts down from the value set with alt_gpt_counter_set() to zero, triggers an interrupt and stops.
The global timer CPU_GLOBAL_TMR counts up to the next compare value set by the compare value, triggers an interrupt and stops comparing.
OSC1_TMR0, OSC1_TMR1, SP_TMR0, and SP_TMR1 count down from the value set with alt_gpt_counter_set() to zero, trigger an interrupt, reset to their maximum values and begin counting down anew. The timer counter wrapping to its maximum value allows time to reprogram or disable the timer before another interrupt occurs. For true one-shot operation using these timers, use alt_gpt_tmr_stop() after the interrupt has triggered.
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ALT_GPT_RESTART_MODE_PERIODIC |
USER-SUPPLIED COUNT - For CPU_PRIVATE_TMR, OSC1_TMR0, OSC1_TMR1, SP_TMR0, and SP_TMR1, the timer counts down to zero and then resets to a value previously set using alt_gpt_counter_set() and continues counting.
CPU_GLOBAL_TMR counts up to the comparator value, then adds the value set in alt_gpt_counter_set() to the comparator value and continues counting.
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