Hardware Libraries
20.1
Arria 10 SoC Hardware Manager
Main Page
Address Space
Data Structures
Files
File List
Globals
All
Data Structures
Files
Functions
Variables
Typedefs
Enumerations
Enumerator
Macros
Groups
alt_ecc.h
Go to the documentation of this file.
1
/******************************************************************************
2
*
3
* Copyright 2013 Altera Corporation. All Rights Reserved.
4
*
5
* Redistribution and use in source and binary forms, with or without
6
* modification, are permitted provided that the following conditions are met:
7
*
8
* 1. Redistributions of source code must retain the above copyright notice,
9
* this list of conditions and the following disclaimer.
10
*
11
* 2. Redistributions in binary form must reproduce the above copyright notice,
12
* this list of conditions and the following disclaimer in the documentation
13
* and/or other materials provided with the distribution.
14
*
15
* 3. Neither the name of the copyright holder nor the names of its contributors
16
* may be used to endorse or promote products derived from this software without
17
* specific prior written permission.
18
*
19
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
* POSSIBILITY OF SUCH DAMAGE.
30
*
31
******************************************************************************/
32
33
/*
34
* $Id: //acds/rel/20.1std/embedded/ip/hps/altera_hps/hwlib/include/soc_cv_av/alt_ecc.h#1 $
35
*/
36
41
#ifndef __ALT_ECC_H__
42
#define __ALT_ECC_H__
43
44
#include "hwlib.h"
45
46
#ifdef __cplusplus
47
extern
"C"
48
{
49
#endif
/* __cplusplus */
50
51
/******************************************************************************/
90
/******************************************************************************/
94
typedef
enum
ALT_ECC_RAM_ENUM_e
95
{
96
ALT_ECC_RAM_L2_DATA
,
97
ALT_ECC_RAM_OCRAM
,
98
ALT_ECC_RAM_USB0
,
99
ALT_ECC_RAM_USB1
,
100
ALT_ECC_RAM_EMAC0
,
101
ALT_ECC_RAM_EMAC1
,
102
ALT_ECC_RAM_DMA
,
103
ALT_ECC_RAM_CAN0
,
104
ALT_ECC_RAM_CAN1
,
105
ALT_ECC_RAM_NAND
,
106
ALT_ECC_RAM_QSPI
,
107
ALT_ECC_RAM_SDMMC
108
}
ALT_ECC_RAM_ENUM_t
;
109
110
/******************************************************************************/
126
typedef
enum
ALT_ECC_ERROR_STATUS_e
127
{
128
129
ALT_ECC_ERROR_L2_BYTE_WR
= 0x1,
135
ALT_ECC_ERROR_L2_SERR
= 0x2,
139
ALT_ECC_ERROR_L2_DERR
= 0x4,
144
ALT_ECC_ERROR_OCRAM_SERR
= 0x1,
148
ALT_ECC_ERROR_OCRAM_DERR
= 0x2,
153
ALT_ECC_ERROR_USB0_SERR
= 0x1,
157
ALT_ECC_ERROR_USB0_DERR
= 0x2,
162
ALT_ECC_ERROR_USB1_SERR
= 0x1,
166
ALT_ECC_ERROR_USB1_DERR
= 0x2,
171
ALT_ECC_ERROR_EMAC0_TX_FIFO_SERR
= 0x1,
175
ALT_ECC_ERROR_EMAC0_TX_FIFO_DERR
= 0x2,
180
ALT_ECC_ERROR_EMAC0_RX_FIFO_SERR
= 0x4,
184
ALT_ECC_ERROR_EMAC0_RX_FIFO_DERR
= 0x8,
189
ALT_ECC_ERROR_EMAC1_TX_FIFO_SERR
= 0x1,
193
ALT_ECC_ERROR_EMAC1_TX_FIFO_DERR
= 0x2,
198
ALT_ECC_ERROR_EMAC1_RX_FIFO_SERR
= 0x4,
202
ALT_ECC_ERROR_EMAC1_RX_FIFO_DERR
= 0x8,
207
ALT_ECC_ERROR_DMA_SERR
= 0x1,
211
ALT_ECC_ERROR_DMA_DERR
= 0x2,
216
ALT_ECC_ERROR_CAN0_SERR
= 0x1,
220
ALT_ECC_ERROR_CAN0_DERR
= 0x2,
225
ALT_ECC_ERROR_CAN1_SERR
= 0x1,
229
ALT_ECC_ERROR_CAN1_DERR
= 0x2,
234
ALT_ECC_ERROR_NAND_BUFFER_SERR
= 0x1,
238
ALT_ECC_ERROR_NAND_BUFFER_DERR
= 0x2,
243
ALT_ECC_ERROR_NAND_WR_FIFO_SERR
= 0x4,
247
ALT_ECC_ERROR_NAND_WR_FIFO_DERR
= 0x8,
252
ALT_ECC_ERROR_NAND_RD_FIFO_SERR
= 0x10,
256
ALT_ECC_ERROR_NAND_RD_FIFO_DERR
= 0x20,
261
ALT_ECC_ERROR_QSPI_SERR
= 0x1,
265
ALT_ECC_ERROR_QSPI_DERR
= 0x2,
270
ALT_ECC_ERROR_SDMMC_PORT_A_SERR
= 0x1,
274
ALT_ECC_ERROR_SDMMC_PORT_A_DERR
= 0x2,
279
ALT_ECC_ERROR_SDMMC_PORT_B_SERR
= 0x4,
283
ALT_ECC_ERROR_SDMMC_PORT_B_DERR
= 0x8
287
}
ALT_ECC_ERROR_STATUS_t
;
288
289
/******************************************************************************/
327
ALT_STATUS_CODE
alt_ecc_start
(
const
ALT_ECC_RAM_ENUM_t
ram_block);
328
329
/******************************************************************************/
340
ALT_STATUS_CODE
alt_ecc_stop
(
const
ALT_ECC_RAM_ENUM_t
ram_block);
341
342
/******************************************************************************/
354
ALT_STATUS_CODE
alt_ecc_is_enabled
(
const
ALT_ECC_RAM_ENUM_t
ram_block);
355
356
/******************************************************************************/
377
ALT_STATUS_CODE
alt_ecc_status_get
(
const
ALT_ECC_RAM_ENUM_t
ram_block,
378
uint32_t *status);
379
380
/******************************************************************************/
401
ALT_STATUS_CODE
alt_ecc_status_clear
(
const
ALT_ECC_RAM_ENUM_t
ram_block,
402
const
uint32_t ecc_mask);
403
404
/******************************************************************************/
423
ALT_STATUS_CODE
alt_ecc_serr_inject
(
const
ALT_ECC_RAM_ENUM_t
ram_block);
424
425
/******************************************************************************/
444
ALT_STATUS_CODE
alt_ecc_derr_inject
(
const
ALT_ECC_RAM_ENUM_t
ram_block);
445
448
#ifdef __cplusplus
449
}
450
#endif
/* __cplusplus */
451
#endif
/* __ALT_ECC_H__ */
include
soc_cv_av
alt_ecc.h
Generated on Tue Oct 27 2020 08:37:29 for Hardware Libraries by
1.8.2