Hardware Libraries  20.1
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hps.h
1 /***********************************************************************************
2 * *
3 * Copyright 2013-2015 Altera Corporation. All Rights Reserved. *
4 * *
5 * Redistribution and use in source and binary forms, with or without *
6 * modification, are permitted provided that the following conditions are met: *
7 * *
8 * 1. Redistributions of source code must retain the above copyright notice, *
9 * this list of conditions and the following disclaimer. *
10 * *
11 * 2. Redistributions in binary form must reproduce the above copyright notice, *
12 * this list of conditions and the following disclaimer in the documentation *
13 * and/or other materials provided with the distribution. *
14 * *
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16 * may be used to endorse or promote products derived from this software without *
17 * specific prior written permission. *
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19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" *
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21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE *
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31 ***********************************************************************************/
32 
33 /* Altera - hps */
34 
35 #ifndef __ALT_SOCAL_HPS_H__
36 #define __ALT_SOCAL_HPS_H__
37 
38 #ifndef __ASSEMBLY__
39 #ifdef __cplusplus
40 #include <cstdint>
41 extern "C"
42 {
43 #else /* __cplusplus */
44 #include <stdint.h>
45 #endif /* __cplusplus */
46 #endif /* __ASSEMBLY__ */
47 
48 /*
49  * SoCAL subsystem version as a 32-bit value.
50  *
51  * The 32-bit value is partitioned into major, minor, and build numbers per
52  * the following bit field layout:
53  *
54  * Bits | Description
55  * :--------|:--------------------------------------
56  * [15:0] | Build Number - range 0..65535
57  * [23:16] | Version Minor Number - range 0..255
58  * [31:24] | Version Major Number - range 0..255
59  *
60  */
61 #define ALT_HPS_VERSION 0x04050004
62 
63 /* Subsystem base address */
64 #define ALT_HPS_ADDR 0
65 /*
66  * Address Space : HPS
67  *
68  */
69 /*
70  * Component Instance : sdram_0
71  *
72  * Instance sdram_0 of component ALT_SDRAM.
73  *
74  *
75  */
76 /* The base address byte offset for the start of the ALT_SDRAM_0 component. */
77 #define ALT_SDRAM_0_OFST 0x0
78 /* The start address of the ALT_SDRAM_0 component. */
79 #define ALT_SDRAM_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDRAM_0_OFST))
80 /* The lower bound address range of the ALT_SDRAM_0 component. */
81 #define ALT_SDRAM_0_LB_ADDR ALT_SDRAM_0_ADDR
82 /* The upper bound address range of the ALT_SDRAM_0 component. */
83 #define ALT_SDRAM_0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDRAM_0_ADDR) + 0x100000000) - 1))
84 
85 
86 /*
87  * Component Instance : fpga_bridge_aa32_h2f_1G
88  *
89  * Instance fpga_bridge_aa32_h2f_1G of component ALT_FPGA_BRIDGE_H2F_1G.
90  *
91  *
92  */
93 /* The base address byte offset for the start of the ALT_FPGA_BRIDGE_AA32_H2F_1G component. */
94 #define ALT_FPGA_BRIDGE_AA32_H2F_1G_OFST 0x80000000
95 /* The start address of the ALT_FPGA_BRIDGE_AA32_H2F_1G component. */
96 #define ALT_FPGA_BRIDGE_AA32_H2F_1G_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGA_BRIDGE_AA32_H2F_1G_OFST))
97 /* The lower bound address range of the ALT_FPGA_BRIDGE_AA32_H2F_1G component. */
98 #define ALT_FPGA_BRIDGE_AA32_H2F_1G_LB_ADDR ALT_FPGA_BRIDGE_AA32_H2F_1G_ADDR
99 /* The upper bound address range of the ALT_FPGA_BRIDGE_AA32_H2F_1G component. */
100 #define ALT_FPGA_BRIDGE_AA32_H2F_1G_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGA_BRIDGE_AA32_H2F_1G_ADDR) + 0x40000000) - 1))
101 
102 
103 /*
104  * Component Instance : fpga_bridge_aa32_h2f_512M
105  *
106  * Instance fpga_bridge_aa32_h2f_512M of component ALT_FPGA_BRIDGE_H2F_512M.
107  *
108  *
109  */
110 /* The base address byte offset for the start of the ALT_FPGA_BRIDGE_AA32_H2F_512M component. */
111 #define ALT_FPGA_BRIDGE_AA32_H2F_512M_OFST 0xc0000000
112 /* The start address of the ALT_FPGA_BRIDGE_AA32_H2F_512M component. */
113 #define ALT_FPGA_BRIDGE_AA32_H2F_512M_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGA_BRIDGE_AA32_H2F_512M_OFST))
114 /* The lower bound address range of the ALT_FPGA_BRIDGE_AA32_H2F_512M component. */
115 #define ALT_FPGA_BRIDGE_AA32_H2F_512M_LB_ADDR ALT_FPGA_BRIDGE_AA32_H2F_512M_ADDR
116 /* The upper bound address range of the ALT_FPGA_BRIDGE_AA32_H2F_512M component. */
117 #define ALT_FPGA_BRIDGE_AA32_H2F_512M_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGA_BRIDGE_AA32_H2F_512M_ADDR) + 0x20000000) - 1))
118 
119 
120 /*
121  * Component Instance : ccu_noc
122  *
123  * Instance ccu_noc of component ALT_CCU_NOC.
124  *
125  *
126  */
127 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTUS_0 register for the ALT_CCU_NOC instance. */
128 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTUS_0_OFST))
129 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTUS_1 register for the ALT_CCU_NOC instance. */
130 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTUS_1_OFST))
131 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_TXID register for the ALT_CCU_NOC instance. */
132 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_TXID_OFST))
133 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTRL_0 register for the ALT_CCU_NOC instance. */
134 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTRL_0_OFST))
135 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTRL_1 register for the ALT_CCU_NOC instance. */
136 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTRL_1_OFST))
137 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTRL_2 register for the ALT_CCU_NOC instance. */
138 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTRL_2_OFST))
139 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTRL_3 register for the ALT_CCU_NOC instance. */
140 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BTRL_3_OFST))
141 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_0 register for the ALT_CCU_NOC instance. */
142 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_0_OFST))
143 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_1 register for the ALT_CCU_NOC instance. */
144 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_1_OFST))
145 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_2 register for the ALT_CCU_NOC instance. */
146 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_2_OFST))
147 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_3 register for the ALT_CCU_NOC instance. */
148 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_3_OFST))
149 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_4 register for the ALT_CCU_NOC instance. */
150 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_4_OFST))
151 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_5 register for the ALT_CCU_NOC instance. */
152 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_5_OFST))
153 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_6 register for the ALT_CCU_NOC instance. */
154 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_6_OFST))
155 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_7 register for the ALT_CCU_NOC instance. */
156 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_7_OFST))
157 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_8 register for the ALT_CCU_NOC instance. */
158 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_8_OFST))
159 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_9 register for the ALT_CCU_NOC instance. */
160 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_9_OFST))
161 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_10 register for the ALT_CCU_NOC instance. */
162 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_10_OFST))
163 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_11 register for the ALT_CCU_NOC instance. */
164 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_11_OFST))
165 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_12 register for the ALT_CCU_NOC instance. */
166 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_12_OFST))
167 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_13 register for the ALT_CCU_NOC instance. */
168 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_13_OFST))
169 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_14 register for the ALT_CCU_NOC instance. */
170 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_14_OFST))
171 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_15 register for the ALT_CCU_NOC instance. */
172 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRS_15_OFST))
173 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRUS register for the ALT_CCU_NOC instance. */
174 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_BRUS_OFST))
175 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_RXID register for the ALT_CCU_NOC instance. */
176 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_RXID_OFST))
177 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_STS register for the ALT_CCU_NOC instance. */
178 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_STS_OFST))
179 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_BRIDGE_ID register for the ALT_CCU_NOC instance. */
180 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_BRIDGE_ID_OFST))
181 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_NOCVER_ID register for the ALT_CCU_NOC instance. */
182 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_NOCVER_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_NOCVER_ID_OFST))
183 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_ERR register for the ALT_CCU_NOC instance. */
184 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_ERR_OFST))
185 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_INTM register for the ALT_CCU_NOC instance. */
186 #define ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_M_16_66_AM_INTM_OFST))
187 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_P_0 register for the ALT_CCU_NOC instance. */
188 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_P_0_OFST))
189 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_P_1 register for the ALT_CCU_NOC instance. */
190 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_P_1_OFST))
191 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_P_2 register for the ALT_CCU_NOC instance. */
192 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_P_2_OFST))
193 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_P_3 register for the ALT_CCU_NOC instance. */
194 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_P_3_OFST))
195 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTUS_0 register for the ALT_CCU_NOC instance. */
196 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTUS_0_OFST))
197 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTUS_1 register for the ALT_CCU_NOC instance. */
198 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTUS_1_OFST))
199 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_TXID register for the ALT_CCU_NOC instance. */
200 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_TXID_OFST))
201 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTRL_0 register for the ALT_CCU_NOC instance. */
202 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTRL_0_OFST))
203 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTRL_1 register for the ALT_CCU_NOC instance. */
204 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTRL_1_OFST))
205 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTRL_2 register for the ALT_CCU_NOC instance. */
206 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTRL_2_OFST))
207 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTRL_3 register for the ALT_CCU_NOC instance. */
208 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BTRL_3_OFST))
209 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_0 register for the ALT_CCU_NOC instance. */
210 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_0_OFST))
211 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_1 register for the ALT_CCU_NOC instance. */
212 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_1_OFST))
213 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_2 register for the ALT_CCU_NOC instance. */
214 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_2_OFST))
215 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_3 register for the ALT_CCU_NOC instance. */
216 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_3_OFST))
217 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_4 register for the ALT_CCU_NOC instance. */
218 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_4_OFST))
219 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_5 register for the ALT_CCU_NOC instance. */
220 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_5_OFST))
221 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_6 register for the ALT_CCU_NOC instance. */
222 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_6_OFST))
223 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_7 register for the ALT_CCU_NOC instance. */
224 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_7_OFST))
225 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_8 register for the ALT_CCU_NOC instance. */
226 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_8_OFST))
227 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_9 register for the ALT_CCU_NOC instance. */
228 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_9_OFST))
229 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_10 register for the ALT_CCU_NOC instance. */
230 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_10_OFST))
231 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_11 register for the ALT_CCU_NOC instance. */
232 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_11_OFST))
233 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_12 register for the ALT_CCU_NOC instance. */
234 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_12_OFST))
235 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_13 register for the ALT_CCU_NOC instance. */
236 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_13_OFST))
237 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_14 register for the ALT_CCU_NOC instance. */
238 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_14_OFST))
239 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_15 register for the ALT_CCU_NOC instance. */
240 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRS_15_OFST))
241 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRUS register for the ALT_CCU_NOC instance. */
242 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_BRUS_OFST))
243 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_RXID register for the ALT_CCU_NOC instance. */
244 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_RXID_OFST))
245 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_DDRREG_SPRT_DDRREGSPACE0_0 register for the ALT_CCU_NOC instance. */
246 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_DDRREG_SPRT_DDRREGSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_DDRREG_SPRT_DDRREGSPACE0_0_OFST))
247 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_DDRREG_SPRT_DDRREGSPACE0_0 register for the ALT_CCU_NOC instance. */
248 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_DDRREG_SPRT_DDRREGSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_DDRREG_SPRT_DDRREGSPACE0_0_OFST))
249 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_GIC_SPRT_GICSPACE_0 register for the ALT_CCU_NOC instance. */
250 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_GIC_SPRT_GICSPACE_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_GIC_SPRT_GICSPACE_0_OFST))
251 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_GIC_SPRT_GICSPACE_0 register for the ALT_CCU_NOC instance. */
252 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_GIC_SPRT_GICSPACE_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_GIC_SPRT_GICSPACE_0_OFST))
253 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
254 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
255 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
256 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
257 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
258 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
259 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
260 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
261 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
262 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
263 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
264 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
265 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
266 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
267 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
268 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
269 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
270 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
271 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
272 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
273 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
274 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
275 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
276 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
277 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
278 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
279 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
280 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
281 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
282 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
283 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
284 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
285 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
286 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
287 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
288 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
289 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2A_0 register for the ALT_CCU_NOC instance. */
290 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2A_0_OFST))
291 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2A_0 register for the ALT_CCU_NOC instance. */
292 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2A_0_OFST))
293 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2B_0 register for the ALT_CCU_NOC instance. */
294 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2B_0_OFST))
295 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2B_0 register for the ALT_CCU_NOC instance. */
296 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2B_0_OFST))
297 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2C_0 register for the ALT_CCU_NOC instance. */
298 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2C_0_OFST))
299 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2C_0 register for the ALT_CCU_NOC instance. */
300 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2C_0_OFST))
301 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
302 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
303 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
304 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
305 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
306 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
307 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
308 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
309 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
310 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
311 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
312 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
313 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
314 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
315 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
316 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
317 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
318 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
319 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
320 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
321 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
322 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
323 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
324 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
325 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
326 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
327 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
328 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
329 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
330 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
331 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
332 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
333 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
334 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
335 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
336 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
337 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
338 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
339 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
340 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
341 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
342 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
343 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
344 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
345 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
346 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
347 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
348 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
349 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RBM_S_REGSPACE_RD_0 register for the ALT_CCU_NOC instance. */
350 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RBM_S_REGSPACE_RD_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RBM_S_REGSPACE_RD_0_OFST))
351 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RBM_S_REGSPACE_RD_0 register for the ALT_CCU_NOC instance. */
352 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RBM_S_REGSPACE_RD_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RBM_S_REGSPACE_RD_0_OFST))
353 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RBM_S_REGSPACE_WR_0 register for the ALT_CCU_NOC instance. */
354 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RBM_S_REGSPACE_WR_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADBASE_MEM_RBM_S_REGSPACE_WR_0_OFST))
355 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RBM_S_REGSPACE_WR_0 register for the ALT_CCU_NOC instance. */
356 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RBM_S_REGSPACE_WR_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ADMASK_MEM_RBM_S_REGSPACE_WR_0_OFST))
357 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_STS register for the ALT_CCU_NOC instance. */
358 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_STS_OFST))
359 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_BRIDGE_ID register for the ALT_CCU_NOC instance. */
360 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_BRIDGE_ID_OFST))
361 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ERR register for the ALT_CCU_NOC instance. */
362 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_ERR_OFST))
363 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_INTM register for the ALT_CCU_NOC instance. */
364 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_AM_INTM_OFST))
365 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_SYSCOREQ_REG register for the ALT_CCU_NOC instance. */
366 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_SYSCOREQ_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_SYSCOREQ_REG_OFST))
367 /* The address of the ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_SYSCOACK_REG register for the ALT_CCU_NOC instance. */
368 #define ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_SYSCOACK_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CPU0_MPRT_0_37_SYSCOACK_REG_OFST))
369 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_P_0 register for the ALT_CCU_NOC instance. */
370 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_P_0_OFST))
371 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_P_1 register for the ALT_CCU_NOC instance. */
372 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_P_1_OFST))
373 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_P_2 register for the ALT_CCU_NOC instance. */
374 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_P_2_OFST))
375 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_P_3 register for the ALT_CCU_NOC instance. */
376 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_P_3_OFST))
377 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTUS_0 register for the ALT_CCU_NOC instance. */
378 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTUS_0_OFST))
379 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTUS_1 register for the ALT_CCU_NOC instance. */
380 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTUS_1_OFST))
381 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_TXID register for the ALT_CCU_NOC instance. */
382 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_TXID_OFST))
383 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTRL_0 register for the ALT_CCU_NOC instance. */
384 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTRL_0_OFST))
385 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTRL_1 register for the ALT_CCU_NOC instance. */
386 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTRL_1_OFST))
387 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTRL_2 register for the ALT_CCU_NOC instance. */
388 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTRL_2_OFST))
389 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTRL_3 register for the ALT_CCU_NOC instance. */
390 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BTRL_3_OFST))
391 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_0 register for the ALT_CCU_NOC instance. */
392 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_0_OFST))
393 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_1 register for the ALT_CCU_NOC instance. */
394 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_1_OFST))
395 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_2 register for the ALT_CCU_NOC instance. */
396 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_2_OFST))
397 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_3 register for the ALT_CCU_NOC instance. */
398 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_3_OFST))
399 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_4 register for the ALT_CCU_NOC instance. */
400 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_4_OFST))
401 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_5 register for the ALT_CCU_NOC instance. */
402 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_5_OFST))
403 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_6 register for the ALT_CCU_NOC instance. */
404 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_6_OFST))
405 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_7 register for the ALT_CCU_NOC instance. */
406 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_7_OFST))
407 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_8 register for the ALT_CCU_NOC instance. */
408 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_8_OFST))
409 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_9 register for the ALT_CCU_NOC instance. */
410 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_9_OFST))
411 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_10 register for the ALT_CCU_NOC instance. */
412 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_10_OFST))
413 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_11 register for the ALT_CCU_NOC instance. */
414 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_11_OFST))
415 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_12 register for the ALT_CCU_NOC instance. */
416 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_12_OFST))
417 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_13 register for the ALT_CCU_NOC instance. */
418 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_13_OFST))
419 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_14 register for the ALT_CCU_NOC instance. */
420 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_14_OFST))
421 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_15 register for the ALT_CCU_NOC instance. */
422 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRS_15_OFST))
423 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRUS register for the ALT_CCU_NOC instance. */
424 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_BRUS_OFST))
425 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_RXID register for the ALT_CCU_NOC instance. */
426 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_RXID_OFST))
427 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_AS_STS register for the ALT_CCU_NOC instance. */
428 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_AS_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_AS_STS_OFST))
429 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_AS_BRIDGE_ID register for the ALT_CCU_NOC instance. */
430 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_AS_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_AS_BRIDGE_ID_OFST))
431 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_AS_ERR register for the ALT_CCU_NOC instance. */
432 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_AS_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_AS_ERR_OFST))
433 /* The address of the ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_AS_INTM register for the ALT_CCU_NOC instance. */
434 #define ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_AS_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DDRREG_SPRT_8_118_AS_INTM_OFST))
435 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_P_0 register for the ALT_CCU_NOC instance. */
436 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_P_0_OFST))
437 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_P_1 register for the ALT_CCU_NOC instance. */
438 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_P_1_OFST))
439 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_P_2 register for the ALT_CCU_NOC instance. */
440 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_P_2_OFST))
441 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_P_3 register for the ALT_CCU_NOC instance. */
442 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_P_3_OFST))
443 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTUS_0 register for the ALT_CCU_NOC instance. */
444 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTUS_0_OFST))
445 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTUS_1 register for the ALT_CCU_NOC instance. */
446 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTUS_1_OFST))
447 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_TXID register for the ALT_CCU_NOC instance. */
448 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_TXID_OFST))
449 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTRL_0 register for the ALT_CCU_NOC instance. */
450 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTRL_0_OFST))
451 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTRL_1 register for the ALT_CCU_NOC instance. */
452 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTRL_1_OFST))
453 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTRL_2 register for the ALT_CCU_NOC instance. */
454 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTRL_2_OFST))
455 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTRL_3 register for the ALT_CCU_NOC instance. */
456 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BTRL_3_OFST))
457 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_0 register for the ALT_CCU_NOC instance. */
458 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_0_OFST))
459 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_1 register for the ALT_CCU_NOC instance. */
460 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_1_OFST))
461 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_2 register for the ALT_CCU_NOC instance. */
462 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_2_OFST))
463 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_3 register for the ALT_CCU_NOC instance. */
464 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_3_OFST))
465 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_4 register for the ALT_CCU_NOC instance. */
466 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_4_OFST))
467 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_5 register for the ALT_CCU_NOC instance. */
468 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_5_OFST))
469 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_6 register for the ALT_CCU_NOC instance. */
470 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_6_OFST))
471 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_7 register for the ALT_CCU_NOC instance. */
472 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_7_OFST))
473 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_8 register for the ALT_CCU_NOC instance. */
474 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_8_OFST))
475 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_9 register for the ALT_CCU_NOC instance. */
476 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_9_OFST))
477 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_10 register for the ALT_CCU_NOC instance. */
478 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_10_OFST))
479 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_11 register for the ALT_CCU_NOC instance. */
480 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_11_OFST))
481 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_12 register for the ALT_CCU_NOC instance. */
482 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_12_OFST))
483 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_13 register for the ALT_CCU_NOC instance. */
484 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_13_OFST))
485 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_14 register for the ALT_CCU_NOC instance. */
486 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_14_OFST))
487 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_15 register for the ALT_CCU_NOC instance. */
488 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRS_15_OFST))
489 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRUS register for the ALT_CCU_NOC instance. */
490 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_BRUS_OFST))
491 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_RXID register for the ALT_CCU_NOC instance. */
492 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_RXID_OFST))
493 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_DDRREG_SPRT_DDRREGSPACE0_0 register for the ALT_CCU_NOC instance. */
494 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_DDRREG_SPRT_DDRREGSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_DDRREG_SPRT_DDRREGSPACE0_0_OFST))
495 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_DDRREG_SPRT_DDRREGSPACE0_0 register for the ALT_CCU_NOC instance. */
496 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_DDRREG_SPRT_DDRREGSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_DDRREG_SPRT_DDRREGSPACE0_0_OFST))
497 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
498 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
499 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
500 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
501 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
502 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
503 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
504 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
505 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
506 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
507 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
508 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
509 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
510 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
511 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
512 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
513 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
514 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
515 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
516 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
517 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
518 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
519 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
520 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
521 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
522 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
523 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
524 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
525 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
526 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
527 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
528 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
529 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
530 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
531 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
532 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
533 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2A_0 register for the ALT_CCU_NOC instance. */
534 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2A_0_OFST))
535 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2A_0 register for the ALT_CCU_NOC instance. */
536 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2A_0_OFST))
537 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2B_0 register for the ALT_CCU_NOC instance. */
538 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2B_0_OFST))
539 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2B_0 register for the ALT_CCU_NOC instance. */
540 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2B_0_OFST))
541 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2C_0 register for the ALT_CCU_NOC instance. */
542 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2C_0_OFST))
543 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2C_0 register for the ALT_CCU_NOC instance. */
544 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2C_0_OFST))
545 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
546 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
547 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
548 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
549 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
550 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
551 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
552 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
553 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
554 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
555 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
556 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
557 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
558 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
559 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
560 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
561 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
562 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
563 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
564 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
565 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
566 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
567 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
568 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
569 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
570 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
571 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
572 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
573 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
574 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
575 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
576 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
577 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
578 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
579 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
580 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
581 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
582 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
583 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
584 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
585 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
586 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
587 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
588 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
589 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
590 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
591 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
592 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
593 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_STS register for the ALT_CCU_NOC instance. */
594 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_STS_OFST))
595 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_BRIDGE_ID register for the ALT_CCU_NOC instance. */
596 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_BRIDGE_ID_OFST))
597 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ERR register for the ALT_CCU_NOC instance. */
598 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_ERR_OFST))
599 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_INTM register for the ALT_CCU_NOC instance. */
600 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_AM_INTM_OFST))
601 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_SYSCOREQ_REG register for the ALT_CCU_NOC instance. */
602 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_SYSCOREQ_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_SYSCOREQ_REG_OFST))
603 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_SYSCOACK_REG register for the ALT_CCU_NOC instance. */
604 #define ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_SYSCOACK_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA0ACE_MPRT_1_118_SYSCOACK_REG_OFST))
605 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_P_0 register for the ALT_CCU_NOC instance. */
606 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_P_0_OFST))
607 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_P_1 register for the ALT_CCU_NOC instance. */
608 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_P_1_OFST))
609 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_P_2 register for the ALT_CCU_NOC instance. */
610 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_P_2_OFST))
611 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_P_3 register for the ALT_CCU_NOC instance. */
612 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_P_3_OFST))
613 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTUS_0 register for the ALT_CCU_NOC instance. */
614 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTUS_0_OFST))
615 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTUS_1 register for the ALT_CCU_NOC instance. */
616 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTUS_1_OFST))
617 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_TXID register for the ALT_CCU_NOC instance. */
618 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_TXID_OFST))
619 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTRL_0 register for the ALT_CCU_NOC instance. */
620 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTRL_0_OFST))
621 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTRL_1 register for the ALT_CCU_NOC instance. */
622 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTRL_1_OFST))
623 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTRL_2 register for the ALT_CCU_NOC instance. */
624 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTRL_2_OFST))
625 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTRL_3 register for the ALT_CCU_NOC instance. */
626 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BTRL_3_OFST))
627 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_0 register for the ALT_CCU_NOC instance. */
628 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_0_OFST))
629 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_1 register for the ALT_CCU_NOC instance. */
630 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_1_OFST))
631 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_2 register for the ALT_CCU_NOC instance. */
632 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_2_OFST))
633 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_3 register for the ALT_CCU_NOC instance. */
634 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_3_OFST))
635 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_4 register for the ALT_CCU_NOC instance. */
636 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_4_OFST))
637 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_5 register for the ALT_CCU_NOC instance. */
638 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_5_OFST))
639 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_6 register for the ALT_CCU_NOC instance. */
640 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_6_OFST))
641 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_7 register for the ALT_CCU_NOC instance. */
642 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_7_OFST))
643 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_8 register for the ALT_CCU_NOC instance. */
644 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_8_OFST))
645 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_9 register for the ALT_CCU_NOC instance. */
646 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_9_OFST))
647 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_10 register for the ALT_CCU_NOC instance. */
648 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_10_OFST))
649 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_11 register for the ALT_CCU_NOC instance. */
650 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_11_OFST))
651 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_12 register for the ALT_CCU_NOC instance. */
652 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_12_OFST))
653 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_13 register for the ALT_CCU_NOC instance. */
654 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_13_OFST))
655 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_14 register for the ALT_CCU_NOC instance. */
656 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_14_OFST))
657 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_15 register for the ALT_CCU_NOC instance. */
658 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRS_15_OFST))
659 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRUS register for the ALT_CCU_NOC instance. */
660 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_BRUS_OFST))
661 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_RXID register for the ALT_CCU_NOC instance. */
662 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_RXID_OFST))
663 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_DDRREG_SPRT_DDRREGSPACE0_0 register for the ALT_CCU_NOC instance. */
664 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_DDRREG_SPRT_DDRREGSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_DDRREG_SPRT_DDRREGSPACE0_0_OFST))
665 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_DDRREG_SPRT_DDRREGSPACE0_0 register for the ALT_CCU_NOC instance. */
666 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_DDRREG_SPRT_DDRREGSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_DDRREG_SPRT_DDRREGSPACE0_0_OFST))
667 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
668 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
669 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
670 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
671 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
672 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
673 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
674 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
675 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
676 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
677 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
678 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
679 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
680 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
681 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
682 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
683 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
684 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
685 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
686 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
687 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
688 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
689 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
690 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
691 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
692 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
693 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
694 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
695 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
696 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
697 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
698 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
699 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
700 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
701 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
702 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
703 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2A_0 register for the ALT_CCU_NOC instance. */
704 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2A_0_OFST))
705 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2A_0 register for the ALT_CCU_NOC instance. */
706 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2A_0_OFST))
707 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2B_0 register for the ALT_CCU_NOC instance. */
708 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2B_0_OFST))
709 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2B_0 register for the ALT_CCU_NOC instance. */
710 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2B_0_OFST))
711 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2C_0 register for the ALT_CCU_NOC instance. */
712 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_IOS_SPRT_IOSPACE2C_0_OFST))
713 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2C_0 register for the ALT_CCU_NOC instance. */
714 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_IOS_SPRT_IOSPACE2C_0_OFST))
715 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
716 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
717 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
718 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
719 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
720 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
721 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
722 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
723 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
724 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
725 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
726 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
727 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
728 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
729 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
730 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
731 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
732 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
733 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
734 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
735 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
736 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
737 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
738 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
739 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
740 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
741 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
742 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
743 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
744 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
745 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
746 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
747 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
748 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
749 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
750 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
751 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
752 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
753 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
754 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
755 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
756 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
757 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
758 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
759 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
760 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
761 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
762 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
763 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_STS register for the ALT_CCU_NOC instance. */
764 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_STS_OFST))
765 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_BRIDGE_ID register for the ALT_CCU_NOC instance. */
766 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_BRIDGE_ID_OFST))
767 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ERR register for the ALT_CCU_NOC instance. */
768 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_ERR_OFST))
769 /* The address of the ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_INTM register for the ALT_CCU_NOC instance. */
770 #define ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_FPGA1ACEL_MPRT_4_118_AM_INTM_OFST))
771 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_P_0 register for the ALT_CCU_NOC instance. */
772 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_P_0_OFST))
773 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_P_1 register for the ALT_CCU_NOC instance. */
774 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_P_1_OFST))
775 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_P_2 register for the ALT_CCU_NOC instance. */
776 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_P_2_OFST))
777 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_P_3 register for the ALT_CCU_NOC instance. */
778 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_P_3_OFST))
779 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTUS_0 register for the ALT_CCU_NOC instance. */
780 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTUS_0_OFST))
781 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTUS_1 register for the ALT_CCU_NOC instance. */
782 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTUS_1_OFST))
783 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_TXID register for the ALT_CCU_NOC instance. */
784 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_TXID_OFST))
785 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTRL_0 register for the ALT_CCU_NOC instance. */
786 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTRL_0_OFST))
787 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTRL_1 register for the ALT_CCU_NOC instance. */
788 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTRL_1_OFST))
789 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTRL_2 register for the ALT_CCU_NOC instance. */
790 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTRL_2_OFST))
791 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTRL_3 register for the ALT_CCU_NOC instance. */
792 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BTRL_3_OFST))
793 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_0 register for the ALT_CCU_NOC instance. */
794 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_0_OFST))
795 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_1 register for the ALT_CCU_NOC instance. */
796 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_1_OFST))
797 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_2 register for the ALT_CCU_NOC instance. */
798 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_2_OFST))
799 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_3 register for the ALT_CCU_NOC instance. */
800 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_3_OFST))
801 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_4 register for the ALT_CCU_NOC instance. */
802 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_4_OFST))
803 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_5 register for the ALT_CCU_NOC instance. */
804 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_5_OFST))
805 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_6 register for the ALT_CCU_NOC instance. */
806 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_6_OFST))
807 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_7 register for the ALT_CCU_NOC instance. */
808 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_7_OFST))
809 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_8 register for the ALT_CCU_NOC instance. */
810 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_8_OFST))
811 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_9 register for the ALT_CCU_NOC instance. */
812 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_9_OFST))
813 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_10 register for the ALT_CCU_NOC instance. */
814 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_10_OFST))
815 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_11 register for the ALT_CCU_NOC instance. */
816 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_11_OFST))
817 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_12 register for the ALT_CCU_NOC instance. */
818 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_12_OFST))
819 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_13 register for the ALT_CCU_NOC instance. */
820 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_13_OFST))
821 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_14 register for the ALT_CCU_NOC instance. */
822 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_14_OFST))
823 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_15 register for the ALT_CCU_NOC instance. */
824 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRS_15_OFST))
825 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRUS register for the ALT_CCU_NOC instance. */
826 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_BRUS_OFST))
827 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_RXID register for the ALT_CCU_NOC instance. */
828 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_RXID_OFST))
829 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_AS_STS register for the ALT_CCU_NOC instance. */
830 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_AS_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_AS_STS_OFST))
831 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_AS_BRIDGE_ID register for the ALT_CCU_NOC instance. */
832 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_AS_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_AS_BRIDGE_ID_OFST))
833 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_AS_ERR register for the ALT_CCU_NOC instance. */
834 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_AS_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_AS_ERR_OFST))
835 /* The address of the ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_AS_INTM register for the ALT_CCU_NOC instance. */
836 #define ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_AS_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_GIC_SPRT_10_100_AS_INTM_OFST))
837 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_P_0 register for the ALT_CCU_NOC instance. */
838 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_P_0_OFST))
839 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_P_1 register for the ALT_CCU_NOC instance. */
840 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_P_1_OFST))
841 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_P_2 register for the ALT_CCU_NOC instance. */
842 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_P_2_OFST))
843 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_P_3 register for the ALT_CCU_NOC instance. */
844 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_P_3_OFST))
845 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTUS_0 register for the ALT_CCU_NOC instance. */
846 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTUS_0_OFST))
847 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTUS_1 register for the ALT_CCU_NOC instance. */
848 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTUS_1_OFST))
849 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_TXID register for the ALT_CCU_NOC instance. */
850 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_TXID_OFST))
851 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTRL_0 register for the ALT_CCU_NOC instance. */
852 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTRL_0_OFST))
853 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTRL_1 register for the ALT_CCU_NOC instance. */
854 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTRL_1_OFST))
855 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTRL_2 register for the ALT_CCU_NOC instance. */
856 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTRL_2_OFST))
857 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTRL_3 register for the ALT_CCU_NOC instance. */
858 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BTRL_3_OFST))
859 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_0 register for the ALT_CCU_NOC instance. */
860 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_0_OFST))
861 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_1 register for the ALT_CCU_NOC instance. */
862 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_1_OFST))
863 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_2 register for the ALT_CCU_NOC instance. */
864 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_2_OFST))
865 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_3 register for the ALT_CCU_NOC instance. */
866 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_3_OFST))
867 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_4 register for the ALT_CCU_NOC instance. */
868 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_4_OFST))
869 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_5 register for the ALT_CCU_NOC instance. */
870 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_5_OFST))
871 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_6 register for the ALT_CCU_NOC instance. */
872 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_6_OFST))
873 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_7 register for the ALT_CCU_NOC instance. */
874 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_7_OFST))
875 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_8 register for the ALT_CCU_NOC instance. */
876 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_8_OFST))
877 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_9 register for the ALT_CCU_NOC instance. */
878 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_9_OFST))
879 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_10 register for the ALT_CCU_NOC instance. */
880 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_10_OFST))
881 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_11 register for the ALT_CCU_NOC instance. */
882 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_11_OFST))
883 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_12 register for the ALT_CCU_NOC instance. */
884 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_12_OFST))
885 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_13 register for the ALT_CCU_NOC instance. */
886 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_13_OFST))
887 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_14 register for the ALT_CCU_NOC instance. */
888 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_14_OFST))
889 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_15 register for the ALT_CCU_NOC instance. */
890 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRS_15_OFST))
891 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRUS register for the ALT_CCU_NOC instance. */
892 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_BRUS_OFST))
893 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_RXID register for the ALT_CCU_NOC instance. */
894 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_RXID_OFST))
895 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_DDRREG_SPRT_DDRREGSPACE0_0 register for the ALT_CCU_NOC instance. */
896 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_DDRREG_SPRT_DDRREGSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_DDRREG_SPRT_DDRREGSPACE0_0_OFST))
897 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_DDRREG_SPRT_DDRREGSPACE0_0 register for the ALT_CCU_NOC instance. */
898 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_DDRREG_SPRT_DDRREGSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_DDRREG_SPRT_DDRREGSPACE0_0_OFST))
899 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_GIC_SPRT_GICSPACE_0 register for the ALT_CCU_NOC instance. */
900 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_GIC_SPRT_GICSPACE_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_GIC_SPRT_GICSPACE_0_OFST))
901 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_GIC_SPRT_GICSPACE_0 register for the ALT_CCU_NOC instance. */
902 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_GIC_SPRT_GICSPACE_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_GIC_SPRT_GICSPACE_0_OFST))
903 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
904 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
905 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
906 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
907 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
908 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
909 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
910 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
911 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
912 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
913 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
914 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
915 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
916 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
917 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
918 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
919 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
920 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
921 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
922 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
923 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
924 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
925 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
926 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
927 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
928 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
929 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
930 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
931 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
932 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
933 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
934 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
935 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
936 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
937 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
938 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
939 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
940 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
941 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
942 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
943 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
944 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
945 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
946 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
947 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
948 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
949 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
950 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
951 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
952 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
953 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
954 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
955 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
956 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
957 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
958 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
959 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
960 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
961 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
962 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
963 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
964 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
965 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
966 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
967 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
968 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
969 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
970 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
971 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
972 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
973 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
974 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
975 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
976 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
977 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
978 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
979 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
980 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
981 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
982 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
983 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
984 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
985 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
986 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
987 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RBM_S_REGSPACE_RD_0 register for the ALT_CCU_NOC instance. */
988 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RBM_S_REGSPACE_RD_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RBM_S_REGSPACE_RD_0_OFST))
989 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RBM_S_REGSPACE_RD_0 register for the ALT_CCU_NOC instance. */
990 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RBM_S_REGSPACE_RD_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RBM_S_REGSPACE_RD_0_OFST))
991 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RBM_S_REGSPACE_WR_0 register for the ALT_CCU_NOC instance. */
992 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RBM_S_REGSPACE_WR_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADBASE_MEM_RBM_S_REGSPACE_WR_0_OFST))
993 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RBM_S_REGSPACE_WR_0 register for the ALT_CCU_NOC instance. */
994 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RBM_S_REGSPACE_WR_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ADMASK_MEM_RBM_S_REGSPACE_WR_0_OFST))
995 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_STS register for the ALT_CCU_NOC instance. */
996 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_STS_OFST))
997 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_BRIDGE_ID register for the ALT_CCU_NOC instance. */
998 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_BRIDGE_ID_OFST))
999 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ERR register for the ALT_CCU_NOC instance. */
1000 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_ERR_OFST))
1001 /* The address of the ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_INTM register for the ALT_CCU_NOC instance. */
1002 #define ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOM_MPRT_5_63_AM_INTM_OFST))
1003 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_P_0 register for the ALT_CCU_NOC instance. */
1004 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_P_0_OFST))
1005 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_P_1 register for the ALT_CCU_NOC instance. */
1006 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_P_1_OFST))
1007 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_P_2 register for the ALT_CCU_NOC instance. */
1008 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_P_2_OFST))
1009 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_P_3 register for the ALT_CCU_NOC instance. */
1010 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_P_3_OFST))
1011 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTUS_0 register for the ALT_CCU_NOC instance. */
1012 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTUS_0_OFST))
1013 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTUS_1 register for the ALT_CCU_NOC instance. */
1014 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTUS_1_OFST))
1015 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_TXID register for the ALT_CCU_NOC instance. */
1016 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_TXID_OFST))
1017 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTRL_0 register for the ALT_CCU_NOC instance. */
1018 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTRL_0_OFST))
1019 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTRL_1 register for the ALT_CCU_NOC instance. */
1020 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTRL_1_OFST))
1021 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTRL_2 register for the ALT_CCU_NOC instance. */
1022 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTRL_2_OFST))
1023 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTRL_3 register for the ALT_CCU_NOC instance. */
1024 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BTRL_3_OFST))
1025 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_0 register for the ALT_CCU_NOC instance. */
1026 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_0_OFST))
1027 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_1 register for the ALT_CCU_NOC instance. */
1028 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_1_OFST))
1029 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_2 register for the ALT_CCU_NOC instance. */
1030 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_2_OFST))
1031 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_3 register for the ALT_CCU_NOC instance. */
1032 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_3_OFST))
1033 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_4 register for the ALT_CCU_NOC instance. */
1034 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_4_OFST))
1035 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_5 register for the ALT_CCU_NOC instance. */
1036 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_5_OFST))
1037 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_6 register for the ALT_CCU_NOC instance. */
1038 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_6_OFST))
1039 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_7 register for the ALT_CCU_NOC instance. */
1040 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_7_OFST))
1041 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_8 register for the ALT_CCU_NOC instance. */
1042 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_8_OFST))
1043 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_9 register for the ALT_CCU_NOC instance. */
1044 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_9_OFST))
1045 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_10 register for the ALT_CCU_NOC instance. */
1046 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_10_OFST))
1047 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_11 register for the ALT_CCU_NOC instance. */
1048 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_11_OFST))
1049 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_12 register for the ALT_CCU_NOC instance. */
1050 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_12_OFST))
1051 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_13 register for the ALT_CCU_NOC instance. */
1052 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_13_OFST))
1053 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_14 register for the ALT_CCU_NOC instance. */
1054 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_14_OFST))
1055 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_15 register for the ALT_CCU_NOC instance. */
1056 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRS_15_OFST))
1057 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRUS register for the ALT_CCU_NOC instance. */
1058 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_BRUS_OFST))
1059 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_RXID register for the ALT_CCU_NOC instance. */
1060 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_RXID_OFST))
1061 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_AS_STS register for the ALT_CCU_NOC instance. */
1062 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_AS_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_AS_STS_OFST))
1063 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_AS_BRIDGE_ID register for the ALT_CCU_NOC instance. */
1064 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_AS_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_AS_BRIDGE_ID_OFST))
1065 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_AS_ERR register for the ALT_CCU_NOC instance. */
1066 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_AS_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_AS_ERR_OFST))
1067 /* The address of the ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_AS_INTM register for the ALT_CCU_NOC instance. */
1068 #define ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_AS_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOS_SPRT_12_63_AS_INTM_OFST))
1069 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_P_0 register for the ALT_CCU_NOC instance. */
1070 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_P_0_OFST))
1071 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_P_1 register for the ALT_CCU_NOC instance. */
1072 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_P_1_OFST))
1073 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_P_2 register for the ALT_CCU_NOC instance. */
1074 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_P_2_OFST))
1075 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_P_3 register for the ALT_CCU_NOC instance. */
1076 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_P_3_OFST))
1077 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTUS_0 register for the ALT_CCU_NOC instance. */
1078 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTUS_0_OFST))
1079 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTUS_1 register for the ALT_CCU_NOC instance. */
1080 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTUS_1_OFST))
1081 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_TXID register for the ALT_CCU_NOC instance. */
1082 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_TXID_OFST))
1083 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTRL_0 register for the ALT_CCU_NOC instance. */
1084 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTRL_0_OFST))
1085 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTRL_1 register for the ALT_CCU_NOC instance. */
1086 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTRL_1_OFST))
1087 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTRL_2 register for the ALT_CCU_NOC instance. */
1088 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTRL_2_OFST))
1089 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTRL_3 register for the ALT_CCU_NOC instance. */
1090 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BTRL_3_OFST))
1091 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_0 register for the ALT_CCU_NOC instance. */
1092 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_0_OFST))
1093 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_1 register for the ALT_CCU_NOC instance. */
1094 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_1_OFST))
1095 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_2 register for the ALT_CCU_NOC instance. */
1096 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_2_OFST))
1097 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_3 register for the ALT_CCU_NOC instance. */
1098 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_3_OFST))
1099 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_4 register for the ALT_CCU_NOC instance. */
1100 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_4_OFST))
1101 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_5 register for the ALT_CCU_NOC instance. */
1102 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_5_OFST))
1103 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_6 register for the ALT_CCU_NOC instance. */
1104 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_6_OFST))
1105 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_7 register for the ALT_CCU_NOC instance. */
1106 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_7_OFST))
1107 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_8 register for the ALT_CCU_NOC instance. */
1108 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_8_OFST))
1109 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_9 register for the ALT_CCU_NOC instance. */
1110 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_9_OFST))
1111 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_10 register for the ALT_CCU_NOC instance. */
1112 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_10_OFST))
1113 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_11 register for the ALT_CCU_NOC instance. */
1114 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_11_OFST))
1115 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_12 register for the ALT_CCU_NOC instance. */
1116 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_12_OFST))
1117 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_13 register for the ALT_CCU_NOC instance. */
1118 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_13_OFST))
1119 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_14 register for the ALT_CCU_NOC instance. */
1120 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_14_OFST))
1121 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_15 register for the ALT_CCU_NOC instance. */
1122 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRS_15_OFST))
1123 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRUS register for the ALT_CCU_NOC instance. */
1124 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_BRUS_OFST))
1125 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_RXID register for the ALT_CCU_NOC instance. */
1126 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_RXID_OFST))
1127 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_AS_STS register for the ALT_CCU_NOC instance. */
1128 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_AS_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_AS_STS_OFST))
1129 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_AS_BRIDGE_ID register for the ALT_CCU_NOC instance. */
1130 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_AS_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_AS_BRIDGE_ID_OFST))
1131 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_AS_ERR register for the ALT_CCU_NOC instance. */
1132 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_AS_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_AS_ERR_OFST))
1133 /* The address of the ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_AS_INTM register for the ALT_CCU_NOC instance. */
1134 #define ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_AS_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_MEM0_SPRT_13_118_AS_INTM_OFST))
1135 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_P_0 register for the ALT_CCU_NOC instance. */
1136 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_P_0_OFST))
1137 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_P_1 register for the ALT_CCU_NOC instance. */
1138 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_P_1_OFST))
1139 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_P_2 register for the ALT_CCU_NOC instance. */
1140 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_P_2_OFST))
1141 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_P_3 register for the ALT_CCU_NOC instance. */
1142 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_P_3_OFST))
1143 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTUS_0 register for the ALT_CCU_NOC instance. */
1144 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTUS_0_OFST))
1145 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTUS_1 register for the ALT_CCU_NOC instance. */
1146 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTUS_1_OFST))
1147 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_TXID register for the ALT_CCU_NOC instance. */
1148 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_TXID_OFST))
1149 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTRL_0 register for the ALT_CCU_NOC instance. */
1150 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTRL_0_OFST))
1151 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTRL_1 register for the ALT_CCU_NOC instance. */
1152 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTRL_1_OFST))
1153 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTRL_2 register for the ALT_CCU_NOC instance. */
1154 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTRL_2_OFST))
1155 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTRL_3 register for the ALT_CCU_NOC instance. */
1156 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BTRL_3_OFST))
1157 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_0 register for the ALT_CCU_NOC instance. */
1158 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_0_OFST))
1159 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_1 register for the ALT_CCU_NOC instance. */
1160 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_1_OFST))
1161 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_2 register for the ALT_CCU_NOC instance. */
1162 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_2_OFST))
1163 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_3 register for the ALT_CCU_NOC instance. */
1164 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_3_OFST))
1165 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_4 register for the ALT_CCU_NOC instance. */
1166 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_4_OFST))
1167 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_5 register for the ALT_CCU_NOC instance. */
1168 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_5_OFST))
1169 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_6 register for the ALT_CCU_NOC instance. */
1170 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_6_OFST))
1171 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_7 register for the ALT_CCU_NOC instance. */
1172 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_7_OFST))
1173 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_8 register for the ALT_CCU_NOC instance. */
1174 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_8_OFST))
1175 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_9 register for the ALT_CCU_NOC instance. */
1176 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_9_OFST))
1177 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_10 register for the ALT_CCU_NOC instance. */
1178 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_10_OFST))
1179 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_11 register for the ALT_CCU_NOC instance. */
1180 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_11_OFST))
1181 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_12 register for the ALT_CCU_NOC instance. */
1182 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_12_OFST))
1183 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_13 register for the ALT_CCU_NOC instance. */
1184 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_13_OFST))
1185 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_14 register for the ALT_CCU_NOC instance. */
1186 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_14_OFST))
1187 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_15 register for the ALT_CCU_NOC instance. */
1188 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRS_15_OFST))
1189 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRUS register for the ALT_CCU_NOC instance. */
1190 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_BRUS_OFST))
1191 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_RXID register for the ALT_CCU_NOC instance. */
1192 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_RXID_OFST))
1193 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_AS_STS register for the ALT_CCU_NOC instance. */
1194 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_AS_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_AS_STS_OFST))
1195 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_AS_BRIDGE_ID register for the ALT_CCU_NOC instance. */
1196 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_AS_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_AS_BRIDGE_ID_OFST))
1197 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_AS_ERR register for the ALT_CCU_NOC instance. */
1198 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_AS_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_AS_ERR_OFST))
1199 /* The address of the ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_AS_INTM register for the ALT_CCU_NOC instance. */
1200 #define ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_AS_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RAM_SPRT_14_80_AS_INTM_OFST))
1201 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_P_0 register for the ALT_CCU_NOC instance. */
1202 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_P_0_OFST))
1203 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_P_1 register for the ALT_CCU_NOC instance. */
1204 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_P_1_OFST))
1205 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_P_2 register for the ALT_CCU_NOC instance. */
1206 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_P_2_OFST))
1207 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_P_3 register for the ALT_CCU_NOC instance. */
1208 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_P_3_OFST))
1209 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTUS_0 register for the ALT_CCU_NOC instance. */
1210 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTUS_0_OFST))
1211 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTUS_1 register for the ALT_CCU_NOC instance. */
1212 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTUS_1_OFST))
1213 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_TXID register for the ALT_CCU_NOC instance. */
1214 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_TXID_OFST))
1215 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTRL_0 register for the ALT_CCU_NOC instance. */
1216 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTRL_0_OFST))
1217 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTRL_1 register for the ALT_CCU_NOC instance. */
1218 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTRL_1_OFST))
1219 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTRL_2 register for the ALT_CCU_NOC instance. */
1220 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTRL_2_OFST))
1221 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTRL_3 register for the ALT_CCU_NOC instance. */
1222 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BTRL_3_OFST))
1223 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_0 register for the ALT_CCU_NOC instance. */
1224 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_0_OFST))
1225 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_1 register for the ALT_CCU_NOC instance. */
1226 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_1_OFST))
1227 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_2 register for the ALT_CCU_NOC instance. */
1228 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_2_OFST))
1229 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_3 register for the ALT_CCU_NOC instance. */
1230 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_3_OFST))
1231 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_4 register for the ALT_CCU_NOC instance. */
1232 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_4_OFST))
1233 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_5 register for the ALT_CCU_NOC instance. */
1234 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_5_OFST))
1235 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_6 register for the ALT_CCU_NOC instance. */
1236 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_6_OFST))
1237 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_7 register for the ALT_CCU_NOC instance. */
1238 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_7_OFST))
1239 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_8 register for the ALT_CCU_NOC instance. */
1240 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_8_OFST))
1241 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_9 register for the ALT_CCU_NOC instance. */
1242 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_9_OFST))
1243 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_10 register for the ALT_CCU_NOC instance. */
1244 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_10_OFST))
1245 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_11 register for the ALT_CCU_NOC instance. */
1246 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_11_OFST))
1247 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_12 register for the ALT_CCU_NOC instance. */
1248 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_12_OFST))
1249 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_13 register for the ALT_CCU_NOC instance. */
1250 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_13_OFST))
1251 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_14 register for the ALT_CCU_NOC instance. */
1252 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_14_OFST))
1253 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_15 register for the ALT_CCU_NOC instance. */
1254 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRS_15_OFST))
1255 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRUS register for the ALT_CCU_NOC instance. */
1256 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_BRUS_OFST))
1257 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_RXID register for the ALT_CCU_NOC instance. */
1258 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_RXID_OFST))
1259 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_AS_STS register for the ALT_CCU_NOC instance. */
1260 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_AS_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_AS_STS_OFST))
1261 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_AS_BRIDGE_ID register for the ALT_CCU_NOC instance. */
1262 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_AS_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_AS_BRIDGE_ID_OFST))
1263 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_AS_ERR register for the ALT_CCU_NOC instance. */
1264 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_AS_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_AS_ERR_OFST))
1265 /* The address of the ALT_CCU_NOC_BRIDGE_RBM_S_15_66_AS_INTM register for the ALT_CCU_NOC instance. */
1266 #define ALT_CCU_NOC_BRIDGE_RBM_S_15_66_AS_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_RBM_S_15_66_AS_INTM_OFST))
1267 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_P_0 register for the ALT_CCU_NOC instance. */
1268 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_P_0_OFST))
1269 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_P_1 register for the ALT_CCU_NOC instance. */
1270 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_P_1_OFST))
1271 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_P_2 register for the ALT_CCU_NOC instance. */
1272 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_P_2_OFST))
1273 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_P_3 register for the ALT_CCU_NOC instance. */
1274 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_P_3_OFST))
1275 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTUS_0 register for the ALT_CCU_NOC instance. */
1276 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTUS_0_OFST))
1277 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTUS_1 register for the ALT_CCU_NOC instance. */
1278 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTUS_1_OFST))
1279 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_TXID register for the ALT_CCU_NOC instance. */
1280 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_TXID_OFST))
1281 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTRL_0 register for the ALT_CCU_NOC instance. */
1282 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTRL_0_OFST))
1283 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTRL_1 register for the ALT_CCU_NOC instance. */
1284 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTRL_1_OFST))
1285 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTRL_2 register for the ALT_CCU_NOC instance. */
1286 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTRL_2_OFST))
1287 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTRL_3 register for the ALT_CCU_NOC instance. */
1288 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BTRL_3_OFST))
1289 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_0 register for the ALT_CCU_NOC instance. */
1290 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_0_OFST))
1291 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_1 register for the ALT_CCU_NOC instance. */
1292 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_1_OFST))
1293 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_2 register for the ALT_CCU_NOC instance. */
1294 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_2_OFST))
1295 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_3 register for the ALT_CCU_NOC instance. */
1296 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_3_OFST))
1297 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_4 register for the ALT_CCU_NOC instance. */
1298 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_4_OFST))
1299 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_5 register for the ALT_CCU_NOC instance. */
1300 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_5_OFST))
1301 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_6 register for the ALT_CCU_NOC instance. */
1302 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_6_OFST))
1303 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_7 register for the ALT_CCU_NOC instance. */
1304 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_7_OFST))
1305 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_8 register for the ALT_CCU_NOC instance. */
1306 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_8_OFST))
1307 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_9 register for the ALT_CCU_NOC instance. */
1308 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_9_OFST))
1309 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_10 register for the ALT_CCU_NOC instance. */
1310 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_10_OFST))
1311 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_11 register for the ALT_CCU_NOC instance. */
1312 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_11_OFST))
1313 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_12 register for the ALT_CCU_NOC instance. */
1314 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_12_OFST))
1315 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_13 register for the ALT_CCU_NOC instance. */
1316 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_13_OFST))
1317 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_14 register for the ALT_CCU_NOC instance. */
1318 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_14_OFST))
1319 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_15 register for the ALT_CCU_NOC instance. */
1320 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRS_15_OFST))
1321 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRUS register for the ALT_CCU_NOC instance. */
1322 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_BRUS_OFST))
1323 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_RXID register for the ALT_CCU_NOC instance. */
1324 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_RXID_OFST))
1325 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
1326 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
1327 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
1328 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
1329 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
1330 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
1331 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
1332 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
1333 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
1334 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
1335 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
1336 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
1337 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
1338 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
1339 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
1340 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
1341 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
1342 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
1343 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
1344 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
1345 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
1346 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
1347 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
1348 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
1349 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
1350 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
1351 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
1352 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
1353 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
1354 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
1355 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
1356 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
1357 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
1358 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
1359 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
1360 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
1361 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
1362 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
1363 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
1364 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
1365 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
1366 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
1367 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
1368 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
1369 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
1370 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
1371 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
1372 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
1373 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
1374 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
1375 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
1376 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
1377 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
1378 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
1379 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
1380 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
1381 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
1382 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
1383 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
1384 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
1385 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
1386 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
1387 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
1388 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
1389 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
1390 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
1391 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
1392 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
1393 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
1394 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
1395 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
1396 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
1397 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
1398 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
1399 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
1400 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
1401 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
1402 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
1403 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
1404 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
1405 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
1406 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
1407 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
1408 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
1409 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_STS register for the ALT_CCU_NOC instance. */
1410 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_STS_OFST))
1411 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_BRIDGE_ID register for the ALT_CCU_NOC instance. */
1412 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_BRIDGE_ID_OFST))
1413 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ERR register for the ALT_CCU_NOC instance. */
1414 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_ERR_OFST))
1415 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_INTM register for the ALT_CCU_NOC instance. */
1416 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_AM_INTM_OFST))
1417 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_SYSCOREQ_REG register for the ALT_CCU_NOC instance. */
1418 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_SYSCOREQ_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_SYSCOREQ_REG_OFST))
1419 /* The address of the ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_SYSCOACK_REG register for the ALT_CCU_NOC instance. */
1420 #define ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_SYSCOACK_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_TCU_MPRT_3_70_SYSCOACK_REG_OFST))
1421 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_SPEC_FETCH_0 register for the ALT_CCU_NOC instance. */
1422 #define ALT_CCU_NOC_AGENT_CCC0_CCC_SPEC_FETCH_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_SPEC_FETCH_0_OFST))
1423 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_SPEC_FETCH_1 register for the ALT_CCU_NOC instance. */
1424 #define ALT_CCU_NOC_AGENT_CCC0_CCC_SPEC_FETCH_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_SPEC_FETCH_1_OFST))
1425 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_SPEC_FETCH_2 register for the ALT_CCU_NOC instance. */
1426 #define ALT_CCU_NOC_AGENT_CCC0_CCC_SPEC_FETCH_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_SPEC_FETCH_2_OFST))
1427 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_SPEC_FETCH_3 register for the ALT_CCU_NOC instance. */
1428 #define ALT_CCU_NOC_AGENT_CCC0_CCC_SPEC_FETCH_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_SPEC_FETCH_3_OFST))
1429 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_ACTIVE_VECTOR_0 register for the ALT_CCU_NOC instance. */
1430 #define ALT_CCU_NOC_AGENT_CCC0_CCC_ACTIVE_VECTOR_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_ACTIVE_VECTOR_0_OFST))
1431 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_ECC_DISABLE register for the ALT_CCU_NOC instance. */
1432 #define ALT_CCU_NOC_AGENT_CCC0_CCC_ECC_DISABLE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_ECC_DISABLE_OFST))
1433 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_HASH_BYPASS register for the ALT_CCU_NOC instance. */
1434 #define ALT_CCU_NOC_AGENT_CCC0_CCC_HASH_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_HASH_BYPASS_OFST))
1435 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_AGENT_DISABLE_STATUS register for the ALT_CCU_NOC instance. */
1436 #define ALT_CCU_NOC_AGENT_CCC0_CCC_AGENT_DISABLE_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_AGENT_DISABLE_STATUS_OFST))
1437 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_LLC_CONTROL register for the ALT_CCU_NOC instance. */
1438 #define ALT_CCU_NOC_AGENT_CCC0_CCC_LLC_CONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_LLC_CONTROL_OFST))
1439 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_DIRECTORY_INV register for the ALT_CCU_NOC instance. */
1440 #define ALT_CCU_NOC_AGENT_CCC0_CCC_DIRECTORY_INV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_DIRECTORY_INV_OFST))
1441 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_ACCESS_TRIG register for the ALT_CCU_NOC instance. */
1442 #define ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_ACCESS_TRIG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_ACCESS_TRIG_OFST))
1443 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_0 register for the ALT_CCU_NOC instance. */
1444 #define ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_0_OFST))
1445 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_1 register for the ALT_CCU_NOC instance. */
1446 #define ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_1_OFST))
1447 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_2 register for the ALT_CCU_NOC instance. */
1448 #define ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_2_OFST))
1449 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_3 register for the ALT_CCU_NOC instance. */
1450 #define ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_3_OFST))
1451 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_4 register for the ALT_CCU_NOC instance. */
1452 #define ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_4_OFST))
1453 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_5 register for the ALT_CCU_NOC instance. */
1454 #define ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_5_OFST))
1455 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_6 register for the ALT_CCU_NOC instance. */
1456 #define ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_6_OFST))
1457 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_7 register for the ALT_CCU_NOC instance. */
1458 #define ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_INDIRECT_RAM_CONT_7_OFST))
1459 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_EVENT_COUNTER_MASK register for the ALT_CCU_NOC instance. */
1460 #define ALT_CCU_NOC_AGENT_CCC0_CCC_EVENT_COUNTER_MASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_EVENT_COUNTER_MASK_OFST))
1461 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_EVENT_COUNTER_VALUE register for the ALT_CCU_NOC instance. */
1462 #define ALT_CCU_NOC_AGENT_CCC0_CCC_EVENT_COUNTER_VALUE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_EVENT_COUNTER_VALUE_OFST))
1463 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_0 register for the ALT_CCU_NOC instance. */
1464 #define ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_0_OFST))
1465 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_1 register for the ALT_CCU_NOC instance. */
1466 #define ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_1_OFST))
1467 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_2 register for the ALT_CCU_NOC instance. */
1468 #define ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_2_OFST))
1469 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_3 register for the ALT_CCU_NOC instance. */
1470 #define ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_3_OFST))
1471 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_4 register for the ALT_CCU_NOC instance. */
1472 #define ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_4_OFST))
1473 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_5 register for the ALT_CCU_NOC instance. */
1474 #define ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_5_OFST))
1475 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_6 register for the ALT_CCU_NOC instance. */
1476 #define ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_6_OFST))
1477 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_7 register for the ALT_CCU_NOC instance. */
1478 #define ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_CRT_STATUS_7_OFST))
1479 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_ECC_INFO register for the ALT_CCU_NOC instance. */
1480 #define ALT_CCU_NOC_AGENT_CCC0_CCC_ECC_INFO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_ECC_INFO_OFST))
1481 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_INTERRUPT_MASK register for the ALT_CCU_NOC instance. */
1482 #define ALT_CCU_NOC_AGENT_CCC0_CCC_INTERRUPT_MASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_INTERRUPT_MASK_OFST))
1483 /* The address of the ALT_CCU_NOC_AGENT_CCC0_CCC_INTERRUPT_ERR register for the ALT_CCU_NOC instance. */
1484 #define ALT_CCU_NOC_AGENT_CCC0_CCC_INTERRUPT_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_CCC0_CCC_INTERRUPT_ERR_OFST))
1485 /* The address of the ALT_CCU_NOC_AGENT_DVM0_DVM_ACTIVE_VECTOR_0 register for the ALT_CCU_NOC instance. */
1486 #define ALT_CCU_NOC_AGENT_DVM0_DVM_ACTIVE_VECTOR_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_DVM0_DVM_ACTIVE_VECTOR_0_OFST))
1487 /* The address of the ALT_CCU_NOC_AGENT_DVM0_DVM_FAULT_LOG_0 register for the ALT_CCU_NOC instance. */
1488 #define ALT_CCU_NOC_AGENT_DVM0_DVM_FAULT_LOG_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_DVM0_DVM_FAULT_LOG_0_OFST))
1489 /* The address of the ALT_CCU_NOC_AGENT_DVM0_DVM_STS register for the ALT_CCU_NOC instance. */
1490 #define ALT_CCU_NOC_AGENT_DVM0_DVM_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_DVM0_DVM_STS_OFST))
1491 /* The address of the ALT_CCU_NOC_AGENT_DVM0_DVM_AGENT_DISABLE_STATUS register for the ALT_CCU_NOC instance. */
1492 #define ALT_CCU_NOC_AGENT_DVM0_DVM_AGENT_DISABLE_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_AGENT_DVM0_DVM_AGENT_DISABLE_STATUS_OFST))
1493 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_P_0 register for the ALT_CCU_NOC instance. */
1494 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_P_0_OFST))
1495 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_P_1 register for the ALT_CCU_NOC instance. */
1496 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_P_1_OFST))
1497 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_P_2 register for the ALT_CCU_NOC instance. */
1498 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_P_2_OFST))
1499 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_P_3 register for the ALT_CCU_NOC instance. */
1500 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_P_3_OFST))
1501 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTUS_0 register for the ALT_CCU_NOC instance. */
1502 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTUS_0_OFST))
1503 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTUS_1 register for the ALT_CCU_NOC instance. */
1504 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTUS_1_OFST))
1505 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_TXID register for the ALT_CCU_NOC instance. */
1506 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_TXID_OFST))
1507 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTRL_0 register for the ALT_CCU_NOC instance. */
1508 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTRL_0_OFST))
1509 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTRL_1 register for the ALT_CCU_NOC instance. */
1510 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTRL_1_OFST))
1511 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTRL_2 register for the ALT_CCU_NOC instance. */
1512 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTRL_2_OFST))
1513 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTRL_3 register for the ALT_CCU_NOC instance. */
1514 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BTRL_3_OFST))
1515 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_0 register for the ALT_CCU_NOC instance. */
1516 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_0_OFST))
1517 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_1 register for the ALT_CCU_NOC instance. */
1518 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_1_OFST))
1519 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_2 register for the ALT_CCU_NOC instance. */
1520 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_2_OFST))
1521 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_3 register for the ALT_CCU_NOC instance. */
1522 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_3_OFST))
1523 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_4 register for the ALT_CCU_NOC instance. */
1524 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_4_OFST))
1525 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_5 register for the ALT_CCU_NOC instance. */
1526 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_5_OFST))
1527 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_6 register for the ALT_CCU_NOC instance. */
1528 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_6_OFST))
1529 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_7 register for the ALT_CCU_NOC instance. */
1530 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_7_OFST))
1531 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_8 register for the ALT_CCU_NOC instance. */
1532 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_8_OFST))
1533 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_9 register for the ALT_CCU_NOC instance. */
1534 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_9_OFST))
1535 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_10 register for the ALT_CCU_NOC instance. */
1536 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_10_OFST))
1537 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_11 register for the ALT_CCU_NOC instance. */
1538 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_11_OFST))
1539 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_12 register for the ALT_CCU_NOC instance. */
1540 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_12_OFST))
1541 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_13 register for the ALT_CCU_NOC instance. */
1542 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_13_OFST))
1543 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_14 register for the ALT_CCU_NOC instance. */
1544 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_14_OFST))
1545 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_15 register for the ALT_CCU_NOC instance. */
1546 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRS_15_OFST))
1547 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRUS register for the ALT_CCU_NOC instance. */
1548 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_BRUS_OFST))
1549 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_RXID register for the ALT_CCU_NOC instance. */
1550 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_RXID_OFST))
1551 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
1552 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
1553 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
1554 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
1555 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
1556 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
1557 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
1558 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
1559 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
1560 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
1561 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
1562 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
1563 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
1564 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
1565 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
1566 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
1567 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
1568 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
1569 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
1570 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
1571 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
1572 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
1573 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
1574 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
1575 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
1576 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
1577 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
1578 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
1579 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
1580 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
1581 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
1582 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
1583 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
1584 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
1585 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
1586 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
1587 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
1588 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
1589 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
1590 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
1591 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
1592 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
1593 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
1594 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
1595 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
1596 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
1597 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
1598 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
1599 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
1600 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
1601 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
1602 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
1603 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
1604 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
1605 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
1606 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
1607 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
1608 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
1609 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
1610 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
1611 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
1612 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
1613 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
1614 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
1615 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
1616 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
1617 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
1618 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
1619 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
1620 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
1621 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
1622 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
1623 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
1624 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
1625 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
1626 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
1627 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
1628 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
1629 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
1630 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
1631 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
1632 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
1633 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
1634 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
1635 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_STS register for the ALT_CCU_NOC instance. */
1636 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_STS_OFST))
1637 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_BRIDGE_ID register for the ALT_CCU_NOC instance. */
1638 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_BRIDGE_ID_OFST))
1639 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ERR register for the ALT_CCU_NOC instance. */
1640 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_ERR_OFST))
1641 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_INTM register for the ALT_CCU_NOC instance. */
1642 #define ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_MPRT_6_81_AM_INTM_OFST))
1643 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_P_0 register for the ALT_CCU_NOC instance. */
1644 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_P_0_OFST))
1645 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_P_1 register for the ALT_CCU_NOC instance. */
1646 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_P_1_OFST))
1647 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_P_2 register for the ALT_CCU_NOC instance. */
1648 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_P_2_OFST))
1649 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_P_3 register for the ALT_CCU_NOC instance. */
1650 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_P_3_OFST))
1651 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTUS_0 register for the ALT_CCU_NOC instance. */
1652 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTUS_0_OFST))
1653 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTUS_1 register for the ALT_CCU_NOC instance. */
1654 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTUS_1_OFST))
1655 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_TXID register for the ALT_CCU_NOC instance. */
1656 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_TXID_OFST))
1657 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTRL_0 register for the ALT_CCU_NOC instance. */
1658 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTRL_0_OFST))
1659 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTRL_1 register for the ALT_CCU_NOC instance. */
1660 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTRL_1_OFST))
1661 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTRL_2 register for the ALT_CCU_NOC instance. */
1662 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTRL_2_OFST))
1663 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTRL_3 register for the ALT_CCU_NOC instance. */
1664 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BTRL_3_OFST))
1665 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_0 register for the ALT_CCU_NOC instance. */
1666 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_0_OFST))
1667 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_1 register for the ALT_CCU_NOC instance. */
1668 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_1_OFST))
1669 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_2 register for the ALT_CCU_NOC instance. */
1670 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_2_OFST))
1671 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_3 register for the ALT_CCU_NOC instance. */
1672 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_3_OFST))
1673 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_4 register for the ALT_CCU_NOC instance. */
1674 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_4_OFST))
1675 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_5 register for the ALT_CCU_NOC instance. */
1676 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_5_OFST))
1677 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_6 register for the ALT_CCU_NOC instance. */
1678 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_6_OFST))
1679 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_7 register for the ALT_CCU_NOC instance. */
1680 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_7_OFST))
1681 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_8 register for the ALT_CCU_NOC instance. */
1682 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_8_OFST))
1683 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_9 register for the ALT_CCU_NOC instance. */
1684 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_9_OFST))
1685 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_10 register for the ALT_CCU_NOC instance. */
1686 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_10_OFST))
1687 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_11 register for the ALT_CCU_NOC instance. */
1688 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_11_OFST))
1689 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_12 register for the ALT_CCU_NOC instance. */
1690 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_12_OFST))
1691 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_13 register for the ALT_CCU_NOC instance. */
1692 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_13_OFST))
1693 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_14 register for the ALT_CCU_NOC instance. */
1694 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_14_OFST))
1695 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_15 register for the ALT_CCU_NOC instance. */
1696 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRS_15_OFST))
1697 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRUS register for the ALT_CCU_NOC instance. */
1698 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_BRUS_OFST))
1699 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_RXID register for the ALT_CCU_NOC instance. */
1700 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_RXID_OFST))
1701 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_AS_STS register for the ALT_CCU_NOC instance. */
1702 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_AS_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_AS_STS_OFST))
1703 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_AS_BRIDGE_ID register for the ALT_CCU_NOC instance. */
1704 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_AS_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_AS_BRIDGE_ID_OFST))
1705 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_AS_ERR register for the ALT_CCU_NOC instance. */
1706 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_AS_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_AS_ERR_OFST))
1707 /* The address of the ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_AS_INTM register for the ALT_CCU_NOC instance. */
1708 #define ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_AS_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_CCC0_SPRT_7_82_AS_INTM_OFST))
1709 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_P_0 register for the ALT_CCU_NOC instance. */
1710 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_P_0_OFST))
1711 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_P_1 register for the ALT_CCU_NOC instance. */
1712 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_P_1_OFST))
1713 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_P_2 register for the ALT_CCU_NOC instance. */
1714 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_P_2_OFST))
1715 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_P_3 register for the ALT_CCU_NOC instance. */
1716 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_P_3_OFST))
1717 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTUS_0 register for the ALT_CCU_NOC instance. */
1718 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTUS_0_OFST))
1719 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTUS_1 register for the ALT_CCU_NOC instance. */
1720 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTUS_1_OFST))
1721 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_TXID register for the ALT_CCU_NOC instance. */
1722 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_TXID_OFST))
1723 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTRL_0 register for the ALT_CCU_NOC instance. */
1724 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTRL_0_OFST))
1725 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTRL_1 register for the ALT_CCU_NOC instance. */
1726 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTRL_1_OFST))
1727 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTRL_2 register for the ALT_CCU_NOC instance. */
1728 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTRL_2_OFST))
1729 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTRL_3 register for the ALT_CCU_NOC instance. */
1730 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BTRL_3_OFST))
1731 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_0 register for the ALT_CCU_NOC instance. */
1732 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_0_OFST))
1733 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_1 register for the ALT_CCU_NOC instance. */
1734 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_1_OFST))
1735 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_2 register for the ALT_CCU_NOC instance. */
1736 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_2_OFST))
1737 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_3 register for the ALT_CCU_NOC instance. */
1738 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_3_OFST))
1739 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_4 register for the ALT_CCU_NOC instance. */
1740 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_4_OFST))
1741 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_5 register for the ALT_CCU_NOC instance. */
1742 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_5_OFST))
1743 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_6 register for the ALT_CCU_NOC instance. */
1744 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_6_OFST))
1745 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_7 register for the ALT_CCU_NOC instance. */
1746 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_7_OFST))
1747 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_8 register for the ALT_CCU_NOC instance. */
1748 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_8_OFST))
1749 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_9 register for the ALT_CCU_NOC instance. */
1750 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_9_OFST))
1751 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_10 register for the ALT_CCU_NOC instance. */
1752 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_10_OFST))
1753 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_11 register for the ALT_CCU_NOC instance. */
1754 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_11_OFST))
1755 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_12 register for the ALT_CCU_NOC instance. */
1756 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_12_OFST))
1757 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_13 register for the ALT_CCU_NOC instance. */
1758 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_13_OFST))
1759 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_14 register for the ALT_CCU_NOC instance. */
1760 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_14_OFST))
1761 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_15 register for the ALT_CCU_NOC instance. */
1762 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRS_15_OFST))
1763 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRUS register for the ALT_CCU_NOC instance. */
1764 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_BRUS_OFST))
1765 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_RXID register for the ALT_CCU_NOC instance. */
1766 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_RXID_OFST))
1767 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_AS_STS register for the ALT_CCU_NOC instance. */
1768 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_AS_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_AS_STS_OFST))
1769 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_AS_BRIDGE_ID register for the ALT_CCU_NOC instance. */
1770 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_AS_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_AS_BRIDGE_ID_OFST))
1771 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_AS_ERR register for the ALT_CCU_NOC instance. */
1772 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_AS_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_AS_ERR_OFST))
1773 /* The address of the ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_AS_INTM register for the ALT_CCU_NOC instance. */
1774 #define ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_AS_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_DVM0_SPRT_9_70_AS_INTM_OFST))
1775 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_P_0 register for the ALT_CCU_NOC instance. */
1776 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_P_0_OFST))
1777 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_P_1 register for the ALT_CCU_NOC instance. */
1778 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_P_1_OFST))
1779 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_P_2 register for the ALT_CCU_NOC instance. */
1780 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_P_2_OFST))
1781 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_P_3 register for the ALT_CCU_NOC instance. */
1782 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_P_3_OFST))
1783 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTUS_0 register for the ALT_CCU_NOC instance. */
1784 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTUS_0_OFST))
1785 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTUS_1 register for the ALT_CCU_NOC instance. */
1786 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTUS_1_OFST))
1787 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_TXID register for the ALT_CCU_NOC instance. */
1788 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_TXID_OFST))
1789 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTRL_0 register for the ALT_CCU_NOC instance. */
1790 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTRL_0_OFST))
1791 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTRL_1 register for the ALT_CCU_NOC instance. */
1792 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTRL_1_OFST))
1793 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTRL_2 register for the ALT_CCU_NOC instance. */
1794 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTRL_2_OFST))
1795 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTRL_3 register for the ALT_CCU_NOC instance. */
1796 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BTRL_3_OFST))
1797 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_0 register for the ALT_CCU_NOC instance. */
1798 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_0_OFST))
1799 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_1 register for the ALT_CCU_NOC instance. */
1800 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_1_OFST))
1801 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_2 register for the ALT_CCU_NOC instance. */
1802 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_2_OFST))
1803 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_3 register for the ALT_CCU_NOC instance. */
1804 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_3_OFST))
1805 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_4 register for the ALT_CCU_NOC instance. */
1806 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_4_OFST))
1807 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_5 register for the ALT_CCU_NOC instance. */
1808 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_5_OFST))
1809 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_6 register for the ALT_CCU_NOC instance. */
1810 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_6_OFST))
1811 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_7 register for the ALT_CCU_NOC instance. */
1812 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_7_OFST))
1813 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_8 register for the ALT_CCU_NOC instance. */
1814 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_8_OFST))
1815 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_9 register for the ALT_CCU_NOC instance. */
1816 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_9_OFST))
1817 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_10 register for the ALT_CCU_NOC instance. */
1818 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_10_OFST))
1819 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_11 register for the ALT_CCU_NOC instance. */
1820 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_11_OFST))
1821 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_12 register for the ALT_CCU_NOC instance. */
1822 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_12_OFST))
1823 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_13 register for the ALT_CCU_NOC instance. */
1824 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_13_OFST))
1825 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_14 register for the ALT_CCU_NOC instance. */
1826 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_14_OFST))
1827 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_15 register for the ALT_CCU_NOC instance. */
1828 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRS_15_OFST))
1829 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRUS register for the ALT_CCU_NOC instance. */
1830 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_BRUS_OFST))
1831 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_RXID register for the ALT_CCU_NOC instance. */
1832 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_RXID_OFST))
1833 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
1834 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
1835 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0 register for the ALT_CCU_NOC instance. */
1836 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0A_0_OFST))
1837 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
1838 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
1839 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0 register for the ALT_CCU_NOC instance. */
1840 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE0B_0_OFST))
1841 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
1842 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
1843 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0 register for the ALT_CCU_NOC instance. */
1844 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1A_0_OFST))
1845 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
1846 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
1847 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0 register for the ALT_CCU_NOC instance. */
1848 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1B_0_OFST))
1849 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
1850 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
1851 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0 register for the ALT_CCU_NOC instance. */
1852 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1C_0_OFST))
1853 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
1854 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
1855 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0 register for the ALT_CCU_NOC instance. */
1856 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1D_0_OFST))
1857 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
1858 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
1859 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0 register for the ALT_CCU_NOC instance. */
1860 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1E_0_OFST))
1861 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
1862 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
1863 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0 register for the ALT_CCU_NOC instance. */
1864 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1F_0_OFST))
1865 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
1866 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
1867 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0 register for the ALT_CCU_NOC instance. */
1868 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_IOS_SPRT_IOSPACE1G_0_OFST))
1869 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
1870 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
1871 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0 register for the ALT_CCU_NOC instance. */
1872 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE0_0_OFST))
1873 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
1874 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
1875 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0 register for the ALT_CCU_NOC instance. */
1876 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1A_0_OFST))
1877 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
1878 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
1879 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0 register for the ALT_CCU_NOC instance. */
1880 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1B_0_OFST))
1881 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
1882 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
1883 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0 register for the ALT_CCU_NOC instance. */
1884 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1C_0_OFST))
1885 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
1886 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
1887 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0 register for the ALT_CCU_NOC instance. */
1888 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1D_0_OFST))
1889 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
1890 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
1891 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0 register for the ALT_CCU_NOC instance. */
1892 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_MEM0_SPRT_MEMSPACE1E_0_OFST))
1893 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
1894 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
1895 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0 register for the ALT_CCU_NOC instance. */
1896 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE0_0_OFST))
1897 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
1898 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
1899 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0 register for the ALT_CCU_NOC instance. */
1900 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE1_0_OFST))
1901 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
1902 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
1903 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0 register for the ALT_CCU_NOC instance. */
1904 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE2_0_OFST))
1905 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
1906 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
1907 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0 register for the ALT_CCU_NOC instance. */
1908 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE3_0_OFST))
1909 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
1910 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
1911 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0 register for the ALT_CCU_NOC instance. */
1912 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE4_0_OFST))
1913 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
1914 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADBASE_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
1915 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0 register for the ALT_CCU_NOC instance. */
1916 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ADMASK_MEM_RAM_SPRT_RAMSPACE5_0_OFST))
1917 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_STS register for the ALT_CCU_NOC instance. */
1918 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_STS_OFST))
1919 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_BRIDGE_ID register for the ALT_CCU_NOC instance. */
1920 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_BRIDGE_ID_OFST))
1921 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ERR register for the ALT_CCU_NOC instance. */
1922 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_ERR_OFST))
1923 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_INTM register for the ALT_CCU_NOC instance. */
1924 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_AM_INTM_OFST))
1925 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_SYSCOACK_REG register for the ALT_CCU_NOC instance. */
1926 #define ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_SYSCOACK_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_MPRT_2_82_SYSCOACK_REG_OFST))
1927 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_P_0 register for the ALT_CCU_NOC instance. */
1928 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_P_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_P_0_OFST))
1929 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_P_1 register for the ALT_CCU_NOC instance. */
1930 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_P_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_P_1_OFST))
1931 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_P_2 register for the ALT_CCU_NOC instance. */
1932 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_P_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_P_2_OFST))
1933 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_P_3 register for the ALT_CCU_NOC instance. */
1934 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_P_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_P_3_OFST))
1935 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTUS_0 register for the ALT_CCU_NOC instance. */
1936 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTUS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTUS_0_OFST))
1937 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTUS_1 register for the ALT_CCU_NOC instance. */
1938 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTUS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTUS_1_OFST))
1939 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_TXID register for the ALT_CCU_NOC instance. */
1940 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_TXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_TXID_OFST))
1941 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTRL_0 register for the ALT_CCU_NOC instance. */
1942 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTRL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTRL_0_OFST))
1943 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTRL_1 register for the ALT_CCU_NOC instance. */
1944 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTRL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTRL_1_OFST))
1945 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTRL_2 register for the ALT_CCU_NOC instance. */
1946 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTRL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTRL_2_OFST))
1947 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTRL_3 register for the ALT_CCU_NOC instance. */
1948 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTRL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BTRL_3_OFST))
1949 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_0 register for the ALT_CCU_NOC instance. */
1950 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_0_OFST))
1951 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_1 register for the ALT_CCU_NOC instance. */
1952 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_1_OFST))
1953 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_2 register for the ALT_CCU_NOC instance. */
1954 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_2_OFST))
1955 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_3 register for the ALT_CCU_NOC instance. */
1956 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_3_OFST))
1957 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_4 register for the ALT_CCU_NOC instance. */
1958 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_4_OFST))
1959 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_5 register for the ALT_CCU_NOC instance. */
1960 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_5_OFST))
1961 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_6 register for the ALT_CCU_NOC instance. */
1962 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_6_OFST))
1963 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_7 register for the ALT_CCU_NOC instance. */
1964 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_7_OFST))
1965 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_8 register for the ALT_CCU_NOC instance. */
1966 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_8_OFST))
1967 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_9 register for the ALT_CCU_NOC instance. */
1968 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_9_OFST))
1969 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_10 register for the ALT_CCU_NOC instance. */
1970 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_10_OFST))
1971 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_11 register for the ALT_CCU_NOC instance. */
1972 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_11_OFST))
1973 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_12 register for the ALT_CCU_NOC instance. */
1974 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_12_OFST))
1975 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_13 register for the ALT_CCU_NOC instance. */
1976 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_13_OFST))
1977 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_14 register for the ALT_CCU_NOC instance. */
1978 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_14_OFST))
1979 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_15 register for the ALT_CCU_NOC instance. */
1980 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRS_15_OFST))
1981 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRUS register for the ALT_CCU_NOC instance. */
1982 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_BRUS_OFST))
1983 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_RXID register for the ALT_CCU_NOC instance. */
1984 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_RXID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_RXID_OFST))
1985 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_AS_STS register for the ALT_CCU_NOC instance. */
1986 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_AS_STS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_AS_STS_OFST))
1987 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_AS_BRIDGE_ID register for the ALT_CCU_NOC instance. */
1988 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_AS_BRIDGE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_AS_BRIDGE_ID_OFST))
1989 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_AS_ERR register for the ALT_CCU_NOC instance. */
1990 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_AS_ERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_AS_ERR_OFST))
1991 /* The address of the ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_AS_INTM register for the ALT_CCU_NOC instance. */
1992 #define ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_AS_INTM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CCU_NOC_ADDR) + ALT_CCU_NOC_BRIDGE_IOCB0_SPRT_11_67_AS_INTM_OFST))
1993 /* The base address byte offset for the start of the ALT_CCU_NOC component. */
1994 #define ALT_CCU_NOC_OFST 0xf7000000
1995 /* The start address of the ALT_CCU_NOC component. */
1996 #define ALT_CCU_NOC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CCU_NOC_OFST))
1997 /* The lower bound address range of the ALT_CCU_NOC component. */
1998 #define ALT_CCU_NOC_LB_ADDR ALT_CCU_NOC_ADDR
1999 /* The upper bound address range of the ALT_CCU_NOC component. */
2000 #define ALT_CCU_NOC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CCU_NOC_ADDR) + 0x49e60) - 1))
2001 
2002 
2003 /*
2004  * Component Instance : mpfe_ddr_main_prb
2005  *
2006  * Instance mpfe_ddr_main_prb of component ALT_MPFE_DDR_MAIN_PRB.
2007  *
2008  *
2009  */
2010 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_ID_COREID register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2011 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_ID_COREID_OFST))
2012 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_ID_REVISIONID register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2013 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_ID_REVISIONID_OFST))
2014 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_MAINCTL register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2015 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_MAINCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_MAINCTL_OFST))
2016 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_CFGCTL register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2017 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_CFGCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_CFGCTL_OFST))
2018 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERLUT register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2019 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERLUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERLUT_OFST))
2020 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_TRACEALARMEN register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2021 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_TRACEALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_TRACEALARMEN_OFST))
2022 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_TRACEALARMSTATUS register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2023 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_TRACEALARMSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_TRACEALARMSTATUS_OFST))
2024 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_TRACEALARMCLR register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2025 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_TRACEALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_TRACEALARMCLR_OFST))
2026 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATPERIOD register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2027 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATPERIOD_OFST))
2028 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATGO register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2029 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATGO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATGO_OFST))
2030 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMMIN register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2031 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMMIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMMIN_OFST))
2032 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMMAX register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2033 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMMAX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMMAX_OFST))
2034 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMSTATUS register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2035 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMSTATUS_OFST))
2036 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMCLR register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2037 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMCLR_OFST))
2038 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMEN register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2039 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_STATALARMEN_OFST))
2040 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_ROUTEIDBASE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2041 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_OFST))
2042 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_ROUTEIDMASK register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2043 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_OFST))
2044 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2045 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_OFST))
2046 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2047 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_OFST))
2048 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_WINDOWSIZE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2049 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_WINDOWSIZE_OFST))
2050 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_SECURITYBASE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2051 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_SECURITYBASE_OFST))
2052 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_SECURITYMASK register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2053 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_SECURITYMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_SECURITYMASK_OFST))
2054 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_OPCODE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2055 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_OPCODE_OFST))
2056 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_STATUS register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2057 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_STATUS_OFST))
2058 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_LENGTH register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2059 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_LENGTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_LENGTH_OFST))
2060 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_URGENCY register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2061 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_0_URGENCY_OFST))
2062 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_ROUTEIDBASE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2063 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_ROUTEIDBASE_OFST))
2064 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_ROUTEIDMASK register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2065 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_ROUTEIDMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_ROUTEIDMASK_OFST))
2066 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_ADDRBASE_LOW register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2067 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_ADDRBASE_LOW_OFST))
2068 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_ADDRBASE_HIGH register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2069 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_ADDRBASE_HIGH_OFST))
2070 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_WINDOWSIZE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2071 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_WINDOWSIZE_OFST))
2072 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_SECURITYBASE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2073 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_SECURITYBASE_OFST))
2074 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_SECURITYMASK register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2075 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_SECURITYMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_SECURITYMASK_OFST))
2076 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_OPCODE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2077 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_OPCODE_OFST))
2078 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_STATUS register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2079 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_STATUS_OFST))
2080 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_LENGTH register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2081 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_LENGTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_LENGTH_OFST))
2082 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_URGENCY register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2083 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_1_URGENCY_OFST))
2084 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_ROUTEIDBASE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2085 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_ROUTEIDBASE_OFST))
2086 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_ROUTEIDMASK register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2087 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_ROUTEIDMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_ROUTEIDMASK_OFST))
2088 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_ADDRBASE_LOW register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2089 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_ADDRBASE_LOW_OFST))
2090 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_ADDRBASE_HIGH register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2091 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_ADDRBASE_HIGH_OFST))
2092 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_WINDOWSIZE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2093 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_WINDOWSIZE_OFST))
2094 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_SECURITYBASE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2095 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_SECURITYBASE_OFST))
2096 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_SECURITYMASK register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2097 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_SECURITYMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_SECURITYMASK_OFST))
2098 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_OPCODE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2099 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_OPCODE_OFST))
2100 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_STATUS register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2101 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_STATUS_OFST))
2102 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_LENGTH register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2103 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_LENGTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_LENGTH_OFST))
2104 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_URGENCY register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2105 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_2_URGENCY_OFST))
2106 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_ROUTEIDBASE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2107 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_ROUTEIDBASE_OFST))
2108 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_ROUTEIDMASK register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2109 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_ROUTEIDMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_ROUTEIDMASK_OFST))
2110 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_ADDRBASE_LOW register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2111 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_ADDRBASE_LOW_OFST))
2112 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_ADDRBASE_HIGH register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2113 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_ADDRBASE_HIGH_OFST))
2114 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_WINDOWSIZE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2115 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_WINDOWSIZE_OFST))
2116 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_SECURITYBASE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2117 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_SECURITYBASE_OFST))
2118 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_SECURITYMASK register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2119 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_SECURITYMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_SECURITYMASK_OFST))
2120 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_OPCODE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2121 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_OPCODE_OFST))
2122 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_STATUS register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2123 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_STATUS_OFST))
2124 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_LENGTH register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2125 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_LENGTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_LENGTH_OFST))
2126 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_URGENCY register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2127 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_FILTERS_3_URGENCY_OFST))
2128 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_0_SRC register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2129 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_0_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_0_SRC_OFST))
2130 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_0_ALARMMODE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2131 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_0_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_0_ALARMMODE_OFST))
2132 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_0_VAL register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2133 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_0_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_0_VAL_OFST))
2134 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_1_SRC register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2135 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_1_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_1_SRC_OFST))
2136 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_1_ALARMMODE register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2137 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_1_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_1_ALARMMODE_OFST))
2138 /* The address of the ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_1_VAL register for the ALT_MPFE_DDR_MAIN_PRB instance. */
2139 #define ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_1_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + ALT_MPFE_DDR_MAIN_PRB_DDR_T_MAIN_PROBE_COUNTERS_1_VAL_OFST))
2140 /* The base address byte offset for the start of the ALT_MPFE_DDR_MAIN_PRB component. */
2141 #define ALT_MPFE_DDR_MAIN_PRB_OFST 0xf8000000
2142 /* The start address of the ALT_MPFE_DDR_MAIN_PRB component. */
2143 #define ALT_MPFE_DDR_MAIN_PRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_DDR_MAIN_PRB_OFST))
2144 /* The lower bound address range of the ALT_MPFE_DDR_MAIN_PRB component. */
2145 #define ALT_MPFE_DDR_MAIN_PRB_LB_ADDR ALT_MPFE_DDR_MAIN_PRB_ADDR
2146 /* The upper bound address range of the ALT_MPFE_DDR_MAIN_PRB component. */
2147 #define ALT_MPFE_DDR_MAIN_PRB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_DDR_MAIN_PRB_ADDR) + 0x400) - 1))
2148 
2149 
2150 /*
2151  * Component Instance : mpfe_ddr_main_sched
2152  *
2153  * Instance mpfe_ddr_main_sched of component ALT_MPFE_DDR_MAIN_SCHED.
2154  *
2155  *
2156  */
2157 /* The address of the ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_ID_COREID register for the ALT_MPFE_DDR_MAIN_SCHED instance. */
2158 #define ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_SCHED_ADDR) + ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_ID_COREID_OFST))
2159 /* The address of the ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_ID_REVISIONID register for the ALT_MPFE_DDR_MAIN_SCHED instance. */
2160 #define ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_SCHED_ADDR) + ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_ID_REVISIONID_OFST))
2161 /* The address of the ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DDRCONF register for the ALT_MPFE_DDR_MAIN_SCHED instance. */
2162 #define ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DDRCONF_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_SCHED_ADDR) + ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DDRCONF_OFST))
2163 /* The address of the ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DDRTIMING register for the ALT_MPFE_DDR_MAIN_SCHED instance. */
2164 #define ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DDRTIMING_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_SCHED_ADDR) + ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DDRTIMING_OFST))
2165 /* The address of the ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DDRMODE register for the ALT_MPFE_DDR_MAIN_SCHED instance. */
2166 #define ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DDRMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_SCHED_ADDR) + ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DDRMODE_OFST))
2167 /* The address of the ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_READLATENCY register for the ALT_MPFE_DDR_MAIN_SCHED instance. */
2168 #define ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_READLATENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_SCHED_ADDR) + ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_READLATENCY_OFST))
2169 /* The address of the ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_ACTIVATE register for the ALT_MPFE_DDR_MAIN_SCHED instance. */
2170 #define ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_ACTIVATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_SCHED_ADDR) + ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_ACTIVATE_OFST))
2171 /* The address of the ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DEVTODEV register for the ALT_MPFE_DDR_MAIN_SCHED instance. */
2172 #define ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DEVTODEV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_SCHED_ADDR) + ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DEVTODEV_OFST))
2173 /* The address of the ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DDR4TIMING register for the ALT_MPFE_DDR_MAIN_SCHED instance. */
2174 #define ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DDR4TIMING_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_DDR_MAIN_SCHED_ADDR) + ALT_MPFE_DDR_MAIN_SCHED_DDR_T_MAIN_SCHEDULER_DDR4TIMING_OFST))
2175 /* The base address byte offset for the start of the ALT_MPFE_DDR_MAIN_SCHED component. */
2176 #define ALT_MPFE_DDR_MAIN_SCHED_OFST 0xf8000400
2177 /* The start address of the ALT_MPFE_DDR_MAIN_SCHED component. */
2178 #define ALT_MPFE_DDR_MAIN_SCHED_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_DDR_MAIN_SCHED_OFST))
2179 /* The lower bound address range of the ALT_MPFE_DDR_MAIN_SCHED component. */
2180 #define ALT_MPFE_DDR_MAIN_SCHED_LB_ADDR ALT_MPFE_DDR_MAIN_SCHED_ADDR
2181 /* The upper bound address range of the ALT_MPFE_DDR_MAIN_SCHED component. */
2182 #define ALT_MPFE_DDR_MAIN_SCHED_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_DDR_MAIN_SCHED_ADDR) + 0x80) - 1))
2183 
2184 
2185 /*
2186  * Component Instance : mpfe_iohmc
2187  *
2188  * Instance mpfe_iohmc of component ALT_MPFE_IOHMC.
2189  *
2190  *
2191  */
2192 /* The address of the ALT_MPFE_IOHMC_REG_DBGCFG0 register for the ALT_MPFE_IOHMC instance. */
2193 #define ALT_MPFE_IOHMC_REG_DBGCFG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DBGCFG0_OFST))
2194 /* The address of the ALT_MPFE_IOHMC_REG_DBGCFG1 register for the ALT_MPFE_IOHMC instance. */
2195 #define ALT_MPFE_IOHMC_REG_DBGCFG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DBGCFG1_OFST))
2196 /* The address of the ALT_MPFE_IOHMC_REG_DBGCFG2 register for the ALT_MPFE_IOHMC instance. */
2197 #define ALT_MPFE_IOHMC_REG_DBGCFG2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DBGCFG2_OFST))
2198 /* The address of the ALT_MPFE_IOHMC_REG_DBGCFG3 register for the ALT_MPFE_IOHMC instance. */
2199 #define ALT_MPFE_IOHMC_REG_DBGCFG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DBGCFG3_OFST))
2200 /* The address of the ALT_MPFE_IOHMC_REG_DBGCFG4 register for the ALT_MPFE_IOHMC instance. */
2201 #define ALT_MPFE_IOHMC_REG_DBGCFG4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DBGCFG4_OFST))
2202 /* The address of the ALT_MPFE_IOHMC_REG_DBGCFG5 register for the ALT_MPFE_IOHMC instance. */
2203 #define ALT_MPFE_IOHMC_REG_DBGCFG5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DBGCFG5_OFST))
2204 /* The address of the ALT_MPFE_IOHMC_REG_DBGCFG6 register for the ALT_MPFE_IOHMC instance. */
2205 #define ALT_MPFE_IOHMC_REG_DBGCFG6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DBGCFG6_OFST))
2206 /* The address of the ALT_MPFE_IOHMC_REG_RESERVE0 register for the ALT_MPFE_IOHMC instance. */
2207 #define ALT_MPFE_IOHMC_REG_RESERVE0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_RESERVE0_OFST))
2208 /* The address of the ALT_MPFE_IOHMC_REG_RESERVE1 register for the ALT_MPFE_IOHMC instance. */
2209 #define ALT_MPFE_IOHMC_REG_RESERVE1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_RESERVE1_OFST))
2210 /* The address of the ALT_MPFE_IOHMC_REG_RESERVE2 register for the ALT_MPFE_IOHMC instance. */
2211 #define ALT_MPFE_IOHMC_REG_RESERVE2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_RESERVE2_OFST))
2212 /* The address of the ALT_MPFE_IOHMC_REG_CTRLCFG0 register for the ALT_MPFE_IOHMC instance. */
2213 #define ALT_MPFE_IOHMC_REG_CTRLCFG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CTRLCFG0_OFST))
2214 /* The address of the ALT_MPFE_IOHMC_REG_CTRLCFG1 register for the ALT_MPFE_IOHMC instance. */
2215 #define ALT_MPFE_IOHMC_REG_CTRLCFG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CTRLCFG1_OFST))
2216 /* The address of the ALT_MPFE_IOHMC_REG_CTRLCFG2 register for the ALT_MPFE_IOHMC instance. */
2217 #define ALT_MPFE_IOHMC_REG_CTRLCFG2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CTRLCFG2_OFST))
2218 /* The address of the ALT_MPFE_IOHMC_REG_CTRLCFG3 register for the ALT_MPFE_IOHMC instance. */
2219 #define ALT_MPFE_IOHMC_REG_CTRLCFG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CTRLCFG3_OFST))
2220 /* The address of the ALT_MPFE_IOHMC_REG_CTRLCFG4 register for the ALT_MPFE_IOHMC instance. */
2221 #define ALT_MPFE_IOHMC_REG_CTRLCFG4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CTRLCFG4_OFST))
2222 /* The address of the ALT_MPFE_IOHMC_REG_CTRLCFG5 register for the ALT_MPFE_IOHMC instance. */
2223 #define ALT_MPFE_IOHMC_REG_CTRLCFG5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CTRLCFG5_OFST))
2224 /* The address of the ALT_MPFE_IOHMC_REG_CTRLCFG6 register for the ALT_MPFE_IOHMC instance. */
2225 #define ALT_MPFE_IOHMC_REG_CTRLCFG6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CTRLCFG6_OFST))
2226 /* The address of the ALT_MPFE_IOHMC_REG_CTRLCFG7 register for the ALT_MPFE_IOHMC instance. */
2227 #define ALT_MPFE_IOHMC_REG_CTRLCFG7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CTRLCFG7_OFST))
2228 /* The address of the ALT_MPFE_IOHMC_REG_CTRLCFG8 register for the ALT_MPFE_IOHMC instance. */
2229 #define ALT_MPFE_IOHMC_REG_CTRLCFG8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CTRLCFG8_OFST))
2230 /* The address of the ALT_MPFE_IOHMC_REG_CTRLCFG9 register for the ALT_MPFE_IOHMC instance. */
2231 #define ALT_MPFE_IOHMC_REG_CTRLCFG9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CTRLCFG9_OFST))
2232 /* The address of the ALT_MPFE_IOHMC_REG_DRAMTIMING0 register for the ALT_MPFE_IOHMC instance. */
2233 #define ALT_MPFE_IOHMC_REG_DRAMTIMING0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DRAMTIMING0_OFST))
2234 /* The address of the ALT_MPFE_IOHMC_REG_DRAMODT0 register for the ALT_MPFE_IOHMC instance. */
2235 #define ALT_MPFE_IOHMC_REG_DRAMODT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DRAMODT0_OFST))
2236 /* The address of the ALT_MPFE_IOHMC_REG_DRAMODT1 register for the ALT_MPFE_IOHMC instance. */
2237 #define ALT_MPFE_IOHMC_REG_DRAMODT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DRAMODT1_OFST))
2238 /* The address of the ALT_MPFE_IOHMC_REG_SBCFG0 register for the ALT_MPFE_IOHMC instance. */
2239 #define ALT_MPFE_IOHMC_REG_SBCFG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SBCFG0_OFST))
2240 /* The address of the ALT_MPFE_IOHMC_REG_SBCFG1 register for the ALT_MPFE_IOHMC instance. */
2241 #define ALT_MPFE_IOHMC_REG_SBCFG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SBCFG1_OFST))
2242 /* The address of the ALT_MPFE_IOHMC_REG_SBCFG2 register for the ALT_MPFE_IOHMC instance. */
2243 #define ALT_MPFE_IOHMC_REG_SBCFG2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SBCFG2_OFST))
2244 /* The address of the ALT_MPFE_IOHMC_REG_SBCFG3 register for the ALT_MPFE_IOHMC instance. */
2245 #define ALT_MPFE_IOHMC_REG_SBCFG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SBCFG3_OFST))
2246 /* The address of the ALT_MPFE_IOHMC_REG_SBCFG4 register for the ALT_MPFE_IOHMC instance. */
2247 #define ALT_MPFE_IOHMC_REG_SBCFG4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SBCFG4_OFST))
2248 /* The address of the ALT_MPFE_IOHMC_REG_SBCFG5 register for the ALT_MPFE_IOHMC instance. */
2249 #define ALT_MPFE_IOHMC_REG_SBCFG5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SBCFG5_OFST))
2250 /* The address of the ALT_MPFE_IOHMC_REG_SBCFG6 register for the ALT_MPFE_IOHMC instance. */
2251 #define ALT_MPFE_IOHMC_REG_SBCFG6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SBCFG6_OFST))
2252 /* The address of the ALT_MPFE_IOHMC_REG_SBCFG7 register for the ALT_MPFE_IOHMC instance. */
2253 #define ALT_MPFE_IOHMC_REG_SBCFG7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SBCFG7_OFST))
2254 /* The address of the ALT_MPFE_IOHMC_REG_CALTIMING0 register for the ALT_MPFE_IOHMC instance. */
2255 #define ALT_MPFE_IOHMC_REG_CALTIMING0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CALTIMING0_OFST))
2256 /* The address of the ALT_MPFE_IOHMC_REG_CALTIMING1 register for the ALT_MPFE_IOHMC instance. */
2257 #define ALT_MPFE_IOHMC_REG_CALTIMING1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CALTIMING1_OFST))
2258 /* The address of the ALT_MPFE_IOHMC_REG_CALTIMING2 register for the ALT_MPFE_IOHMC instance. */
2259 #define ALT_MPFE_IOHMC_REG_CALTIMING2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CALTIMING2_OFST))
2260 /* The address of the ALT_MPFE_IOHMC_REG_CALTIMING3 register for the ALT_MPFE_IOHMC instance. */
2261 #define ALT_MPFE_IOHMC_REG_CALTIMING3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CALTIMING3_OFST))
2262 /* The address of the ALT_MPFE_IOHMC_REG_CALTIMING4 register for the ALT_MPFE_IOHMC instance. */
2263 #define ALT_MPFE_IOHMC_REG_CALTIMING4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CALTIMING4_OFST))
2264 /* The address of the ALT_MPFE_IOHMC_REG_CALTIMING5 register for the ALT_MPFE_IOHMC instance. */
2265 #define ALT_MPFE_IOHMC_REG_CALTIMING5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CALTIMING5_OFST))
2266 /* The address of the ALT_MPFE_IOHMC_REG_CALTIMING6 register for the ALT_MPFE_IOHMC instance. */
2267 #define ALT_MPFE_IOHMC_REG_CALTIMING6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CALTIMING6_OFST))
2268 /* The address of the ALT_MPFE_IOHMC_REG_CALTIMING7 register for the ALT_MPFE_IOHMC instance. */
2269 #define ALT_MPFE_IOHMC_REG_CALTIMING7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CALTIMING7_OFST))
2270 /* The address of the ALT_MPFE_IOHMC_REG_CALTIMING8 register for the ALT_MPFE_IOHMC instance. */
2271 #define ALT_MPFE_IOHMC_REG_CALTIMING8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CALTIMING8_OFST))
2272 /* The address of the ALT_MPFE_IOHMC_REG_CALTIMING9 register for the ALT_MPFE_IOHMC instance. */
2273 #define ALT_MPFE_IOHMC_REG_CALTIMING9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CALTIMING9_OFST))
2274 /* The address of the ALT_MPFE_IOHMC_REG_CALTIMING10 register for the ALT_MPFE_IOHMC instance. */
2275 #define ALT_MPFE_IOHMC_REG_CALTIMING10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_CALTIMING10_OFST))
2276 /* The address of the ALT_MPFE_IOHMC_REG_DRAMADDRW register for the ALT_MPFE_IOHMC instance. */
2277 #define ALT_MPFE_IOHMC_REG_DRAMADDRW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DRAMADDRW_OFST))
2278 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND0 register for the ALT_MPFE_IOHMC instance. */
2279 #define ALT_MPFE_IOHMC_REG_SIDEBAND0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND0_OFST))
2280 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND1 register for the ALT_MPFE_IOHMC instance. */
2281 #define ALT_MPFE_IOHMC_REG_SIDEBAND1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND1_OFST))
2282 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND2 register for the ALT_MPFE_IOHMC instance. */
2283 #define ALT_MPFE_IOHMC_REG_SIDEBAND2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND2_OFST))
2284 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND3 register for the ALT_MPFE_IOHMC instance. */
2285 #define ALT_MPFE_IOHMC_REG_SIDEBAND3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND3_OFST))
2286 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND4 register for the ALT_MPFE_IOHMC instance. */
2287 #define ALT_MPFE_IOHMC_REG_SIDEBAND4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND4_OFST))
2288 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND5 register for the ALT_MPFE_IOHMC instance. */
2289 #define ALT_MPFE_IOHMC_REG_SIDEBAND5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND5_OFST))
2290 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND6 register for the ALT_MPFE_IOHMC instance. */
2291 #define ALT_MPFE_IOHMC_REG_SIDEBAND6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND6_OFST))
2292 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND7 register for the ALT_MPFE_IOHMC instance. */
2293 #define ALT_MPFE_IOHMC_REG_SIDEBAND7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND7_OFST))
2294 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND8 register for the ALT_MPFE_IOHMC instance. */
2295 #define ALT_MPFE_IOHMC_REG_SIDEBAND8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND8_OFST))
2296 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND9 register for the ALT_MPFE_IOHMC instance. */
2297 #define ALT_MPFE_IOHMC_REG_SIDEBAND9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND9_OFST))
2298 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND10 register for the ALT_MPFE_IOHMC instance. */
2299 #define ALT_MPFE_IOHMC_REG_SIDEBAND10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND10_OFST))
2300 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND11 register for the ALT_MPFE_IOHMC instance. */
2301 #define ALT_MPFE_IOHMC_REG_SIDEBAND11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND11_OFST))
2302 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND12 register for the ALT_MPFE_IOHMC instance. */
2303 #define ALT_MPFE_IOHMC_REG_SIDEBAND12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND12_OFST))
2304 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND13 register for the ALT_MPFE_IOHMC instance. */
2305 #define ALT_MPFE_IOHMC_REG_SIDEBAND13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND13_OFST))
2306 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND14 register for the ALT_MPFE_IOHMC instance. */
2307 #define ALT_MPFE_IOHMC_REG_SIDEBAND14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND14_OFST))
2308 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND15 register for the ALT_MPFE_IOHMC instance. */
2309 #define ALT_MPFE_IOHMC_REG_SIDEBAND15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND15_OFST))
2310 /* The address of the ALT_MPFE_IOHMC_REG_DRAMSTS register for the ALT_MPFE_IOHMC instance. */
2311 #define ALT_MPFE_IOHMC_REG_DRAMSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DRAMSTS_OFST))
2312 /* The address of the ALT_MPFE_IOHMC_REG_DBGDONE register for the ALT_MPFE_IOHMC instance. */
2313 #define ALT_MPFE_IOHMC_REG_DBGDONE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DBGDONE_OFST))
2314 /* The address of the ALT_MPFE_IOHMC_REG_DBGSIGNALS register for the ALT_MPFE_IOHMC instance. */
2315 #define ALT_MPFE_IOHMC_REG_DBGSIGNALS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DBGSIGNALS_OFST))
2316 /* The address of the ALT_MPFE_IOHMC_REG_DBGRESET register for the ALT_MPFE_IOHMC instance. */
2317 #define ALT_MPFE_IOHMC_REG_DBGRESET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DBGRESET_OFST))
2318 /* The address of the ALT_MPFE_IOHMC_REG_DBGMATCH register for the ALT_MPFE_IOHMC instance. */
2319 #define ALT_MPFE_IOHMC_REG_DBGMATCH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_DBGMATCH_OFST))
2320 /* The address of the ALT_MPFE_IOHMC_REG_COUNTER0MASK register for the ALT_MPFE_IOHMC instance. */
2321 #define ALT_MPFE_IOHMC_REG_COUNTER0MASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_COUNTER0MASK_OFST))
2322 /* The address of the ALT_MPFE_IOHMC_REG_COUNTER1MASK register for the ALT_MPFE_IOHMC instance. */
2323 #define ALT_MPFE_IOHMC_REG_COUNTER1MASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_COUNTER1MASK_OFST))
2324 /* The address of the ALT_MPFE_IOHMC_REG_COUNTER0MATCH register for the ALT_MPFE_IOHMC instance. */
2325 #define ALT_MPFE_IOHMC_REG_COUNTER0MATCH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_COUNTER0MATCH_OFST))
2326 /* The address of the ALT_MPFE_IOHMC_REG_COUNTER1MATCH register for the ALT_MPFE_IOHMC instance. */
2327 #define ALT_MPFE_IOHMC_REG_COUNTER1MATCH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_COUNTER1MATCH_OFST))
2328 /* The address of the ALT_MPFE_IOHMC_REG_NIOSRESERVE0 register for the ALT_MPFE_IOHMC instance. */
2329 #define ALT_MPFE_IOHMC_REG_NIOSRESERVE0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_NIOSRESERVE0_OFST))
2330 /* The address of the ALT_MPFE_IOHMC_REG_NIOSRESERVE1 register for the ALT_MPFE_IOHMC instance. */
2331 #define ALT_MPFE_IOHMC_REG_NIOSRESERVE1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_NIOSRESERVE1_OFST))
2332 /* The address of the ALT_MPFE_IOHMC_REG_NIOSRESERVE2 register for the ALT_MPFE_IOHMC instance. */
2333 #define ALT_MPFE_IOHMC_REG_NIOSRESERVE2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_NIOSRESERVE2_OFST))
2334 /* The address of the ALT_MPFE_IOHMC_REG_SBCFG8 register for the ALT_MPFE_IOHMC instance. */
2335 #define ALT_MPFE_IOHMC_REG_SBCFG8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SBCFG8_OFST))
2336 /* The address of the ALT_MPFE_IOHMC_REG_SBCFG9 register for the ALT_MPFE_IOHMC instance. */
2337 #define ALT_MPFE_IOHMC_REG_SBCFG9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SBCFG9_OFST))
2338 /* The address of the ALT_MPFE_IOHMC_REG_3DS0 register for the ALT_MPFE_IOHMC instance. */
2339 #define ALT_MPFE_IOHMC_REG_3DS0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_3DS0_OFST))
2340 /* The address of the ALT_MPFE_IOHMC_REG_3DS1 register for the ALT_MPFE_IOHMC instance. */
2341 #define ALT_MPFE_IOHMC_REG_3DS1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_3DS1_OFST))
2342 /* The address of the ALT_MPFE_IOHMC_REG_3DS2 register for the ALT_MPFE_IOHMC instance. */
2343 #define ALT_MPFE_IOHMC_REG_3DS2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_3DS2_OFST))
2344 /* The address of the ALT_MPFE_IOHMC_REG_PIPELINE0 register for the ALT_MPFE_IOHMC instance. */
2345 #define ALT_MPFE_IOHMC_REG_PIPELINE0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_PIPELINE0_OFST))
2346 /* The address of the ALT_MPFE_IOHMC_REG_MEMCLOCKGATING0 register for the ALT_MPFE_IOHMC instance. */
2347 #define ALT_MPFE_IOHMC_REG_MEMCLOCKGATING0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_MEMCLOCKGATING0_OFST))
2348 /* The address of the ALT_MPFE_IOHMC_REG_SIDEBAND16 register for the ALT_MPFE_IOHMC instance. */
2349 #define ALT_MPFE_IOHMC_REG_SIDEBAND16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + ALT_MPFE_IOHMC_REG_SIDEBAND16_OFST))
2350 /* The base address byte offset for the start of the ALT_MPFE_IOHMC component. */
2351 #define ALT_MPFE_IOHMC_OFST 0xf8010000
2352 /* The start address of the ALT_MPFE_IOHMC component. */
2353 #define ALT_MPFE_IOHMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_IOHMC_OFST))
2354 /* The lower bound address range of the ALT_MPFE_IOHMC component. */
2355 #define ALT_MPFE_IOHMC_LB_ADDR ALT_MPFE_IOHMC_ADDR
2356 /* The upper bound address range of the ALT_MPFE_IOHMC component. */
2357 #define ALT_MPFE_IOHMC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_IOHMC_ADDR) + 0x190) - 1))
2358 
2359 
2360 /*
2361  * Component Instance : mpfe_hmc_adp
2362  *
2363  * Instance mpfe_hmc_adp of component ALT_MPFE_HMC_ADP.
2364  *
2365  *
2366  */
2367 /* The address of the ALT_MPFE_HMC_ADP_IP_REV_ID register for the ALT_MPFE_HMC_ADP instance. */
2368 #define ALT_MPFE_HMC_ADP_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_IP_REV_ID_OFST))
2369 /* The address of the ALT_MPFE_HMC_ADP_DDRIOCTRL register for the ALT_MPFE_HMC_ADP instance. */
2370 #define ALT_MPFE_HMC_ADP_DDRIOCTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_DDRIOCTRL_OFST))
2371 /* The address of the ALT_MPFE_HMC_ADP_DDRCALSTAT register for the ALT_MPFE_HMC_ADP instance. */
2372 #define ALT_MPFE_HMC_ADP_DDRCALSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_DDRCALSTAT_OFST))
2373 /* The address of the ALT_MPFE_HMC_ADP_MPR_0BEAT1 register for the ALT_MPFE_HMC_ADP instance. */
2374 #define ALT_MPFE_HMC_ADP_MPR_0BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_0BEAT1_OFST))
2375 /* The address of the ALT_MPFE_HMC_ADP_MPR_1BEAT1 register for the ALT_MPFE_HMC_ADP instance. */
2376 #define ALT_MPFE_HMC_ADP_MPR_1BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_1BEAT1_OFST))
2377 /* The address of the ALT_MPFE_HMC_ADP_MPR_2BEAT1 register for the ALT_MPFE_HMC_ADP instance. */
2378 #define ALT_MPFE_HMC_ADP_MPR_2BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_2BEAT1_OFST))
2379 /* The address of the ALT_MPFE_HMC_ADP_MPR_3BEAT1 register for the ALT_MPFE_HMC_ADP instance. */
2380 #define ALT_MPFE_HMC_ADP_MPR_3BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_3BEAT1_OFST))
2381 /* The address of the ALT_MPFE_HMC_ADP_MPR_4BEAT1 register for the ALT_MPFE_HMC_ADP instance. */
2382 #define ALT_MPFE_HMC_ADP_MPR_4BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_4BEAT1_OFST))
2383 /* The address of the ALT_MPFE_HMC_ADP_MPR_5BEAT1 register for the ALT_MPFE_HMC_ADP instance. */
2384 #define ALT_MPFE_HMC_ADP_MPR_5BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_5BEAT1_OFST))
2385 /* The address of the ALT_MPFE_HMC_ADP_MPR_6BEAT1 register for the ALT_MPFE_HMC_ADP instance. */
2386 #define ALT_MPFE_HMC_ADP_MPR_6BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_6BEAT1_OFST))
2387 /* The address of the ALT_MPFE_HMC_ADP_MPR_7BEAT1 register for the ALT_MPFE_HMC_ADP instance. */
2388 #define ALT_MPFE_HMC_ADP_MPR_7BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_7BEAT1_OFST))
2389 /* The address of the ALT_MPFE_HMC_ADP_MPR_8BEAT1 register for the ALT_MPFE_HMC_ADP instance. */
2390 #define ALT_MPFE_HMC_ADP_MPR_8BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_8BEAT1_OFST))
2391 /* The address of the ALT_MPFE_HMC_ADP_MPR_0BEAT2 register for the ALT_MPFE_HMC_ADP instance. */
2392 #define ALT_MPFE_HMC_ADP_MPR_0BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_0BEAT2_OFST))
2393 /* The address of the ALT_MPFE_HMC_ADP_MPR_1BEAT2 register for the ALT_MPFE_HMC_ADP instance. */
2394 #define ALT_MPFE_HMC_ADP_MPR_1BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_1BEAT2_OFST))
2395 /* The address of the ALT_MPFE_HMC_ADP_MPR_2BEAT2 register for the ALT_MPFE_HMC_ADP instance. */
2396 #define ALT_MPFE_HMC_ADP_MPR_2BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_2BEAT2_OFST))
2397 /* The address of the ALT_MPFE_HMC_ADP_MPR_3BEAT2 register for the ALT_MPFE_HMC_ADP instance. */
2398 #define ALT_MPFE_HMC_ADP_MPR_3BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_3BEAT2_OFST))
2399 /* The address of the ALT_MPFE_HMC_ADP_MPR_4BEAT2 register for the ALT_MPFE_HMC_ADP instance. */
2400 #define ALT_MPFE_HMC_ADP_MPR_4BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_4BEAT2_OFST))
2401 /* The address of the ALT_MPFE_HMC_ADP_MPR_5BEAT2 register for the ALT_MPFE_HMC_ADP instance. */
2402 #define ALT_MPFE_HMC_ADP_MPR_5BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_5BEAT2_OFST))
2403 /* The address of the ALT_MPFE_HMC_ADP_MPR_6BEAT2 register for the ALT_MPFE_HMC_ADP instance. */
2404 #define ALT_MPFE_HMC_ADP_MPR_6BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_6BEAT2_OFST))
2405 /* The address of the ALT_MPFE_HMC_ADP_MPR_7BEAT2 register for the ALT_MPFE_HMC_ADP instance. */
2406 #define ALT_MPFE_HMC_ADP_MPR_7BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_7BEAT2_OFST))
2407 /* The address of the ALT_MPFE_HMC_ADP_MPR_8BEAT2 register for the ALT_MPFE_HMC_ADP instance. */
2408 #define ALT_MPFE_HMC_ADP_MPR_8BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MPR_8BEAT2_OFST))
2409 /* The address of the ALT_MPFE_HMC_ADP_AUTO_PRECHARGE register for the ALT_MPFE_HMC_ADP instance. */
2410 #define ALT_MPFE_HMC_ADP_AUTO_PRECHARGE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_AUTO_PRECHARGE_OFST))
2411 /* The address of the ALT_MPFE_HMC_ADP_DRAMADDRWIDTH register for the ALT_MPFE_HMC_ADP instance. */
2412 #define ALT_MPFE_HMC_ADP_DRAMADDRWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_DRAMADDRWIDTH_OFST))
2413 /* The address of the ALT_MPFE_HMC_ADP_ECCCTRL1 register for the ALT_MPFE_HMC_ADP instance. */
2414 #define ALT_MPFE_HMC_ADP_ECCCTRL1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECCCTRL1_OFST))
2415 /* The address of the ALT_MPFE_HMC_ADP_ECCCTRL2 register for the ALT_MPFE_HMC_ADP instance. */
2416 #define ALT_MPFE_HMC_ADP_ECCCTRL2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECCCTRL2_OFST))
2417 /* The address of the ALT_MPFE_HMC_ADP_ERRINTEN register for the ALT_MPFE_HMC_ADP instance. */
2418 #define ALT_MPFE_HMC_ADP_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ERRINTEN_OFST))
2419 /* The address of the ALT_MPFE_HMC_ADP_ERRINTENS register for the ALT_MPFE_HMC_ADP instance. */
2420 #define ALT_MPFE_HMC_ADP_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ERRINTENS_OFST))
2421 /* The address of the ALT_MPFE_HMC_ADP_ERRINTENR register for the ALT_MPFE_HMC_ADP instance. */
2422 #define ALT_MPFE_HMC_ADP_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ERRINTENR_OFST))
2423 /* The address of the ALT_MPFE_HMC_ADP_INTMODE register for the ALT_MPFE_HMC_ADP instance. */
2424 #define ALT_MPFE_HMC_ADP_INTMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_INTMODE_OFST))
2425 /* The address of the ALT_MPFE_HMC_ADP_INTSTAT register for the ALT_MPFE_HMC_ADP instance. */
2426 #define ALT_MPFE_HMC_ADP_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_INTSTAT_OFST))
2427 /* The address of the ALT_MPFE_HMC_ADP_DIAGINTTEST register for the ALT_MPFE_HMC_ADP instance. */
2428 #define ALT_MPFE_HMC_ADP_DIAGINTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_DIAGINTTEST_OFST))
2429 /* The address of the ALT_MPFE_HMC_ADP_MODSTAT register for the ALT_MPFE_HMC_ADP instance. */
2430 #define ALT_MPFE_HMC_ADP_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_MODSTAT_OFST))
2431 /* The address of the ALT_MPFE_HMC_ADP_DERRADDRA register for the ALT_MPFE_HMC_ADP instance. */
2432 #define ALT_MPFE_HMC_ADP_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_DERRADDRA_OFST))
2433 /* The address of the ALT_MPFE_HMC_ADP_SERRADDRA register for the ALT_MPFE_HMC_ADP instance. */
2434 #define ALT_MPFE_HMC_ADP_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_SERRADDRA_OFST))
2435 /* The address of the ALT_MPFE_HMC_ADP_AUTOWB_CORRADDR register for the ALT_MPFE_HMC_ADP instance. */
2436 #define ALT_MPFE_HMC_ADP_AUTOWB_CORRADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_AUTOWB_CORRADDR_OFST))
2437 /* The address of the ALT_MPFE_HMC_ADP_SERRCNTREG register for the ALT_MPFE_HMC_ADP instance. */
2438 #define ALT_MPFE_HMC_ADP_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_SERRCNTREG_OFST))
2439 /* The address of the ALT_MPFE_HMC_ADP_AUTOWB_DROP_CNTREG register for the ALT_MPFE_HMC_ADP instance. */
2440 #define ALT_MPFE_HMC_ADP_AUTOWB_DROP_CNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_AUTOWB_DROP_CNTREG_OFST))
2441 /* The address of the ALT_MPFE_HMC_ADP_ECC_REG2WRECCDATABUS register for the ALT_MPFE_HMC_ADP instance. */
2442 #define ALT_MPFE_HMC_ADP_ECC_REG2WRECCDATABUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_REG2WRECCDATABUS_OFST))
2443 /* The address of the ALT_MPFE_HMC_ADP_ECC_RDECCDATA2REGBUS register for the ALT_MPFE_HMC_ADP instance. */
2444 #define ALT_MPFE_HMC_ADP_ECC_RDECCDATA2REGBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_RDECCDATA2REGBUS_OFST))
2445 /* The address of the ALT_MPFE_HMC_ADP_ECC_REG2RDECCDATABUS register for the ALT_MPFE_HMC_ADP instance. */
2446 #define ALT_MPFE_HMC_ADP_ECC_REG2RDECCDATABUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_REG2RDECCDATABUS_OFST))
2447 /* The address of the ALT_MPFE_HMC_ADP_ECC_DIAGON register for the ALT_MPFE_HMC_ADP instance. */
2448 #define ALT_MPFE_HMC_ADP_ECC_DIAGON_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_DIAGON_OFST))
2449 /* The address of the ALT_MPFE_HMC_ADP_ECC_DECSTAT register for the ALT_MPFE_HMC_ADP instance. */
2450 #define ALT_MPFE_HMC_ADP_ECC_DECSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_DECSTAT_OFST))
2451 /* The address of the ALT_MPFE_HMC_ADP_ECC_ERRGENADDR_0 register for the ALT_MPFE_HMC_ADP instance. */
2452 #define ALT_MPFE_HMC_ADP_ECC_ERRGENADDR_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_ERRGENADDR_0_OFST))
2453 /* The address of the ALT_MPFE_HMC_ADP_ECC_ERRGENADDR_1 register for the ALT_MPFE_HMC_ADP instance. */
2454 #define ALT_MPFE_HMC_ADP_ECC_ERRGENADDR_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_ERRGENADDR_1_OFST))
2455 /* The address of the ALT_MPFE_HMC_ADP_ECC_ERRGENADDR_2 register for the ALT_MPFE_HMC_ADP instance. */
2456 #define ALT_MPFE_HMC_ADP_ECC_ERRGENADDR_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_ERRGENADDR_2_OFST))
2457 /* The address of the ALT_MPFE_HMC_ADP_ECC_ERRGENADDR_3 register for the ALT_MPFE_HMC_ADP instance. */
2458 #define ALT_MPFE_HMC_ADP_ECC_ERRGENADDR_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_ERRGENADDR_3_OFST))
2459 /* The address of the ALT_MPFE_HMC_ADP_ECC_REG2RDDATABUS_BEAT0 register for the ALT_MPFE_HMC_ADP instance. */
2460 #define ALT_MPFE_HMC_ADP_ECC_REG2RDDATABUS_BEAT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_REG2RDDATABUS_BEAT0_OFST))
2461 /* The address of the ALT_MPFE_HMC_ADP_ECC_REG2RDDATABUS_BEAT1 register for the ALT_MPFE_HMC_ADP instance. */
2462 #define ALT_MPFE_HMC_ADP_ECC_REG2RDDATABUS_BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_REG2RDDATABUS_BEAT1_OFST))
2463 /* The address of the ALT_MPFE_HMC_ADP_ECC_REG2RDDATABUS_BEAT2 register for the ALT_MPFE_HMC_ADP instance. */
2464 #define ALT_MPFE_HMC_ADP_ECC_REG2RDDATABUS_BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_REG2RDDATABUS_BEAT2_OFST))
2465 /* The address of the ALT_MPFE_HMC_ADP_ECC_REG2RDDATABUS_BEAT3 register for the ALT_MPFE_HMC_ADP instance. */
2466 #define ALT_MPFE_HMC_ADP_ECC_REG2RDDATABUS_BEAT3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_REG2RDDATABUS_BEAT3_OFST))
2467 /* The address of the ALT_MPFE_HMC_ADP_ECC_ERRGENHADDR_0 register for the ALT_MPFE_HMC_ADP instance. */
2468 #define ALT_MPFE_HMC_ADP_ECC_ERRGENHADDR_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_ERRGENHADDR_0_OFST))
2469 /* The address of the ALT_MPFE_HMC_ADP_ECC_ERRGENHADDR_1 register for the ALT_MPFE_HMC_ADP instance. */
2470 #define ALT_MPFE_HMC_ADP_ECC_ERRGENHADDR_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_ERRGENHADDR_1_OFST))
2471 /* The address of the ALT_MPFE_HMC_ADP_ECC_ERRGENHADDR_2 register for the ALT_MPFE_HMC_ADP instance. */
2472 #define ALT_MPFE_HMC_ADP_ECC_ERRGENHADDR_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_ERRGENHADDR_2_OFST))
2473 /* The address of the ALT_MPFE_HMC_ADP_ECC_ERRGENHADDR_3 register for the ALT_MPFE_HMC_ADP instance. */
2474 #define ALT_MPFE_HMC_ADP_ECC_ERRGENHADDR_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_ECC_ERRGENHADDR_3_OFST))
2475 /* The address of the ALT_MPFE_HMC_ADP_DERRHADDR register for the ALT_MPFE_HMC_ADP instance. */
2476 #define ALT_MPFE_HMC_ADP_DERRHADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_DERRHADDR_OFST))
2477 /* The address of the ALT_MPFE_HMC_ADP_SERRHADDR register for the ALT_MPFE_HMC_ADP instance. */
2478 #define ALT_MPFE_HMC_ADP_SERRHADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_SERRHADDR_OFST))
2479 /* The address of the ALT_MPFE_HMC_ADP_AUTOWB_CORRHADDR register for the ALT_MPFE_HMC_ADP instance. */
2480 #define ALT_MPFE_HMC_ADP_AUTOWB_CORRHADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_AUTOWB_CORRHADDR_OFST))
2481 /* The address of the ALT_MPFE_HMC_ADP_HPSINTFCSEL register for the ALT_MPFE_HMC_ADP instance. */
2482 #define ALT_MPFE_HMC_ADP_HPSINTFCSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_HPSINTFCSEL_OFST))
2483 /* The address of the ALT_MPFE_HMC_ADP_RSTHANDSHAKECTRL register for the ALT_MPFE_HMC_ADP instance. */
2484 #define ALT_MPFE_HMC_ADP_RSTHANDSHAKECTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_RSTHANDSHAKECTRL_OFST))
2485 /* The address of the ALT_MPFE_HMC_ADP_RSTHANDSHAKESTAT register for the ALT_MPFE_HMC_ADP instance. */
2486 #define ALT_MPFE_HMC_ADP_RSTHANDSHAKESTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + ALT_MPFE_HMC_ADP_RSTHANDSHAKESTAT_OFST))
2487 /* The base address byte offset for the start of the ALT_MPFE_HMC_ADP component. */
2488 #define ALT_MPFE_HMC_ADP_OFST 0xf8011000
2489 /* The start address of the ALT_MPFE_HMC_ADP component. */
2490 #define ALT_MPFE_HMC_ADP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_HMC_ADP_OFST))
2491 /* The lower bound address range of the ALT_MPFE_HMC_ADP component. */
2492 #define ALT_MPFE_HMC_ADP_LB_ADDR ALT_MPFE_HMC_ADP_ADDR
2493 /* The upper bound address range of the ALT_MPFE_HMC_ADP component. */
2494 #define ALT_MPFE_HMC_ADP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_HMC_ADP_ADDR) + 0x500) - 1))
2495 
2496 
2497 /*
2498  * Component Instance : mpfe_fw
2499  *
2500  * Instance mpfe_fw of component ALT_MPFE_FW.
2501  *
2502  *
2503  */
2504 /* The base address byte offset for the start of the ALT_MPFE_FW component. */
2505 #define ALT_MPFE_FW_OFST 0xf8020000
2506 /* The start address of the ALT_MPFE_FW component. */
2507 #define ALT_MPFE_FW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_FW_OFST))
2508 /* The lower bound address range of the ALT_MPFE_FW component. */
2509 #define ALT_MPFE_FW_LB_ADDR ALT_MPFE_FW_ADDR
2510 /* The upper bound address range of the ALT_MPFE_FW component. */
2511 #define ALT_MPFE_FW_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_FW_ADDR) + 0x100) - 1))
2512 
2513 
2514 /*
2515  * Component Instance : soc_noc_fw_mpfe_csr
2516  *
2517  * Instance soc_noc_fw_mpfe_csr of component ALT_SOC_NOC_FW_MPFE_CSR.
2518  *
2519  *
2520  */
2521 /* The address of the ALT_SOC_NOC_FW_MPFE_CSR_HMC_REGISTER register for the ALT_SOC_NOC_FW_MPFE_CSR instance. */
2522 #define ALT_SOC_NOC_FW_MPFE_CSR_HMC_REGISTER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_MPFE_CSR_ADDR) + ALT_SOC_NOC_FW_MPFE_CSR_HMC_REGISTER_OFST))
2523 /* The address of the ALT_SOC_NOC_FW_MPFE_CSR_HMC_ADAPTOR_REGISTER register for the ALT_SOC_NOC_FW_MPFE_CSR instance. */
2524 #define ALT_SOC_NOC_FW_MPFE_CSR_HMC_ADAPTOR_REGISTER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_MPFE_CSR_ADDR) + ALT_SOC_NOC_FW_MPFE_CSR_HMC_ADAPTOR_REGISTER_OFST))
2525 /* The address of the ALT_SOC_NOC_FW_MPFE_CSR_NOC_SCHEDULER_CSR register for the ALT_SOC_NOC_FW_MPFE_CSR instance. */
2526 #define ALT_SOC_NOC_FW_MPFE_CSR_NOC_SCHEDULER_CSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_MPFE_CSR_ADDR) + ALT_SOC_NOC_FW_MPFE_CSR_NOC_SCHEDULER_CSR_OFST))
2527 /* The address of the ALT_SOC_NOC_FW_MPFE_CSR_NOC_QOS register for the ALT_SOC_NOC_FW_MPFE_CSR instance. */
2528 #define ALT_SOC_NOC_FW_MPFE_CSR_NOC_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_MPFE_CSR_ADDR) + ALT_SOC_NOC_FW_MPFE_CSR_NOC_QOS_OFST))
2529 /* The address of the ALT_SOC_NOC_FW_MPFE_CSR_NOC_PROBES register for the ALT_SOC_NOC_FW_MPFE_CSR instance. */
2530 #define ALT_SOC_NOC_FW_MPFE_CSR_NOC_PROBES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_MPFE_CSR_ADDR) + ALT_SOC_NOC_FW_MPFE_CSR_NOC_PROBES_OFST))
2531 /* The address of the ALT_SOC_NOC_FW_MPFE_CSR_FPGA2SDRAM_SIDEBANDMGR register for the ALT_SOC_NOC_FW_MPFE_CSR instance. */
2532 #define ALT_SOC_NOC_FW_MPFE_CSR_FPGA2SDRAM_SIDEBANDMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_MPFE_CSR_ADDR) + ALT_SOC_NOC_FW_MPFE_CSR_FPGA2SDRAM_SIDEBANDMGR_OFST))
2533 /* The base address byte offset for the start of the ALT_SOC_NOC_FW_MPFE_CSR component. */
2534 #define ALT_SOC_NOC_FW_MPFE_CSR_OFST 0xf8020000
2535 /* The start address of the ALT_SOC_NOC_FW_MPFE_CSR component. */
2536 #define ALT_SOC_NOC_FW_MPFE_CSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SOC_NOC_FW_MPFE_CSR_OFST))
2537 /* The lower bound address range of the ALT_SOC_NOC_FW_MPFE_CSR component. */
2538 #define ALT_SOC_NOC_FW_MPFE_CSR_LB_ADDR ALT_SOC_NOC_FW_MPFE_CSR_ADDR
2539 /* The upper bound address range of the ALT_SOC_NOC_FW_MPFE_CSR component. */
2540 #define ALT_SOC_NOC_FW_MPFE_CSR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SOC_NOC_FW_MPFE_CSR_ADDR) + 0x100) - 1))
2541 
2542 
2543 /*
2544  * Component Instance : mpfe_ddr_fw
2545  *
2546  * Instance mpfe_ddr_fw of component ALT_MPFE_FW.
2547  *
2548  *
2549  */
2550 /* The base address byte offset for the start of the ALT_MPFE_DDR_FW component. */
2551 #define ALT_MPFE_DDR_FW_OFST 0xf8020100
2552 /* The start address of the ALT_MPFE_DDR_FW component. */
2553 #define ALT_MPFE_DDR_FW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_DDR_FW_OFST))
2554 /* The lower bound address range of the ALT_MPFE_DDR_FW component. */
2555 #define ALT_MPFE_DDR_FW_LB_ADDR ALT_MPFE_DDR_FW_ADDR
2556 /* The upper bound address range of the ALT_MPFE_DDR_FW component. */
2557 #define ALT_MPFE_DDR_FW_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_DDR_FW_ADDR) + 0x100) - 1))
2558 
2559 
2560 /*
2561  * Component Instance : soc_noc_fw_ddr_scr
2562  *
2563  * Instance soc_noc_fw_ddr_scr of component ALT_SOC_NOC_FW_DDR_SCR.
2564  *
2565  *
2566  */
2567 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_ENABLE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2568 #define ALT_SOC_NOC_FW_DDR_SCR_ENABLE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_ENABLE_OFST))
2569 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_ENABLE_SET register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2570 #define ALT_SOC_NOC_FW_DDR_SCR_ENABLE_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_ENABLE_SET_OFST))
2571 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_ENABLE_CLEAR register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2572 #define ALT_SOC_NOC_FW_DDR_SCR_ENABLE_CLEAR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_ENABLE_CLEAR_OFST))
2573 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION0ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2574 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION0ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION0ADDR_BASE_OFST))
2575 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION0ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2576 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION0ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION0ADDR_BASEEXT_OFST))
2577 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION0ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2578 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION0ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION0ADDR_LIMIT_OFST))
2579 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION0ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2580 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION0ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION0ADDR_LIMITEXT_OFST))
2581 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION1ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2582 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION1ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION1ADDR_BASE_OFST))
2583 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION1ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2584 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION1ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION1ADDR_BASEEXT_OFST))
2585 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION1ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2586 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION1ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION1ADDR_LIMIT_OFST))
2587 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION1ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2588 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION1ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION1ADDR_LIMITEXT_OFST))
2589 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION2ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2590 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION2ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION2ADDR_BASE_OFST))
2591 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION2ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2592 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION2ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION2ADDR_BASEEXT_OFST))
2593 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION2ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2594 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION2ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION2ADDR_LIMIT_OFST))
2595 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION2ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2596 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION2ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION2ADDR_LIMITEXT_OFST))
2597 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION3ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2598 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION3ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION3ADDR_BASE_OFST))
2599 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION3ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2600 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION3ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION3ADDR_BASEEXT_OFST))
2601 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION3ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2602 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION3ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION3ADDR_LIMIT_OFST))
2603 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION3ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2604 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION3ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION3ADDR_LIMITEXT_OFST))
2605 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION4ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2606 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION4ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION4ADDR_BASE_OFST))
2607 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION4ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2608 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION4ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION4ADDR_BASEEXT_OFST))
2609 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION4ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2610 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION4ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION4ADDR_LIMIT_OFST))
2611 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION4ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2612 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION4ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION4ADDR_LIMITEXT_OFST))
2613 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION5ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2614 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION5ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION5ADDR_BASE_OFST))
2615 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION5ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2616 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION5ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION5ADDR_BASEEXT_OFST))
2617 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION5ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2618 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION5ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION5ADDR_LIMIT_OFST))
2619 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION5ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2620 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION5ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION5ADDR_LIMITEXT_OFST))
2621 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION6ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2622 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION6ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION6ADDR_BASE_OFST))
2623 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION6ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2624 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION6ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION6ADDR_BASEEXT_OFST))
2625 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION6ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2626 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION6ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION6ADDR_LIMIT_OFST))
2627 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION6ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2628 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION6ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION6ADDR_LIMITEXT_OFST))
2629 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION7ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2630 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION7ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION7ADDR_BASE_OFST))
2631 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION7ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2632 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION7ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION7ADDR_BASEEXT_OFST))
2633 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION7ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2634 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION7ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION7ADDR_LIMIT_OFST))
2635 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_MPUREGION7ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2636 #define ALT_SOC_NOC_FW_DDR_SCR_MPUREGION7ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_MPUREGION7ADDR_LIMITEXT_OFST))
2637 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2638 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_BASE_OFST))
2639 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2640 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_BASEEXT_OFST))
2641 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2642 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_LIMIT_OFST))
2643 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2644 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_LIMITEXT_OFST))
2645 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION1ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2646 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION1ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION1ADDR_BASE_OFST))
2647 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION1ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2648 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION1ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION1ADDR_BASEEXT_OFST))
2649 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION1ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2650 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION1ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION1ADDR_LIMIT_OFST))
2651 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION1ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2652 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION1ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION1ADDR_LIMITEXT_OFST))
2653 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION2ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2654 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION2ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION2ADDR_BASE_OFST))
2655 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION2ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2656 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION2ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION2ADDR_BASEEXT_OFST))
2657 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION2ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2658 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION2ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION2ADDR_LIMIT_OFST))
2659 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION2ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2660 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION2ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION2ADDR_LIMITEXT_OFST))
2661 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION3ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2662 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION3ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION3ADDR_BASE_OFST))
2663 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION3ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2664 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION3ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION3ADDR_BASEEXT_OFST))
2665 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION3ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2666 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION3ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION3ADDR_LIMIT_OFST))
2667 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION3ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2668 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION3ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION3ADDR_LIMITEXT_OFST))
2669 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION4ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2670 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION4ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION4ADDR_BASE_OFST))
2671 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION4ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2672 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION4ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION4ADDR_BASEEXT_OFST))
2673 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION4ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2674 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION4ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION4ADDR_LIMIT_OFST))
2675 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION4ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2676 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION4ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION4ADDR_LIMITEXT_OFST))
2677 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION5ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2678 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION5ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION5ADDR_BASE_OFST))
2679 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION5ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2680 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION5ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION5ADDR_BASEEXT_OFST))
2681 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION5ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2682 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION5ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION5ADDR_LIMIT_OFST))
2683 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION5ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2684 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION5ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION5ADDR_LIMITEXT_OFST))
2685 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION6ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2686 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION6ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION6ADDR_BASE_OFST))
2687 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION6ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2688 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION6ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION6ADDR_BASEEXT_OFST))
2689 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION6ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2690 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION6ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION6ADDR_LIMIT_OFST))
2691 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION6ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2692 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION6ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION6ADDR_LIMITEXT_OFST))
2693 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION7ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2694 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION7ADDR_BASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION7ADDR_BASE_OFST))
2695 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION7ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2696 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION7ADDR_BASEEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION7ADDR_BASEEXT_OFST))
2697 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION7ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2698 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION7ADDR_LIMIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION7ADDR_LIMIT_OFST))
2699 /* The address of the ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION7ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_SCR instance. */
2700 #define ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION7ADDR_LIMITEXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_NONMPUREGION7ADDR_LIMITEXT_OFST))
2701 /* The base address byte offset for the start of the ALT_SOC_NOC_FW_DDR_SCR component. */
2702 #define ALT_SOC_NOC_FW_DDR_SCR_OFST 0xf8020100
2703 /* The start address of the ALT_SOC_NOC_FW_DDR_SCR component. */
2704 #define ALT_SOC_NOC_FW_DDR_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SOC_NOC_FW_DDR_SCR_OFST))
2705 /* The lower bound address range of the ALT_SOC_NOC_FW_DDR_SCR component. */
2706 #define ALT_SOC_NOC_FW_DDR_SCR_LB_ADDR ALT_SOC_NOC_FW_DDR_SCR_ADDR
2707 /* The upper bound address range of the ALT_SOC_NOC_FW_DDR_SCR component. */
2708 #define ALT_SOC_NOC_FW_DDR_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_SCR_ADDR) + 0x100) - 1))
2709 
2710 
2711 /*
2712  * Component Instance : soc_noc_fw_ddr_f2sdr0_scr
2713  *
2714  * Instance soc_noc_fw_ddr_f2sdr0_scr of component ALT_SOC_NOC_FW_DDR_F2SDR_SCR.
2715  *
2716  *
2717  */
2718 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2719 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ENABLE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2720 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_SET register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2721 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ENABLE_SET_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_SET_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2722 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_CLEAR register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2723 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ENABLE_CLEAR_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_CLEAR_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2724 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2725 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION0ADDR_BASE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_BASE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2726 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2727 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION0ADDR_BASEEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_BASEEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2728 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2729 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION0ADDR_LIMIT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_LIMIT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2730 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2731 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION0ADDR_LIMITEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_LIMITEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2732 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2733 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION1ADDR_BASE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_BASE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2734 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2735 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION1ADDR_BASEEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_BASEEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2736 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2737 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION1ADDR_LIMIT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_LIMIT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2738 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2739 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION1ADDR_LIMITEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_LIMITEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2740 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2741 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION2ADDR_BASE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_BASE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2742 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2743 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION2ADDR_BASEEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_BASEEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2744 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2745 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION2ADDR_LIMIT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_LIMIT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2746 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2747 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION2ADDR_LIMITEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_LIMITEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2748 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2749 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION3ADDR_BASE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_BASE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2750 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2751 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION3ADDR_BASEEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_BASEEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2752 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2753 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION3ADDR_LIMIT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_LIMIT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2754 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR instance. */
2755 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_REGION3ADDR_LIMITEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_LIMITEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR)
2756 /* The base address byte offset for the start of the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR component. */
2757 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_OFST 0xf8020200
2758 /* The start address of the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR component. */
2759 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_OFST))
2760 /* The lower bound address range of the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR component. */
2761 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_LB_ADDR ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR
2762 /* The upper bound address range of the ALT_SOC_NOC_FW_DDR_F2SDR0_SCR component. */
2763 #define ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_F2SDR0_SCR_ADDR) + 0x100) - 1))
2764 
2765 
2766 /*
2767  * Component Instance : mpfe_f2sdr0_fw
2768  *
2769  * Instance mpfe_f2sdr0_fw of component ALT_MPFE_FW.
2770  *
2771  *
2772  */
2773 /* The base address byte offset for the start of the ALT_MPFE_F2SDR0_FW component. */
2774 #define ALT_MPFE_F2SDR0_FW_OFST 0xf8020200
2775 /* The start address of the ALT_MPFE_F2SDR0_FW component. */
2776 #define ALT_MPFE_F2SDR0_FW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR0_FW_OFST))
2777 /* The lower bound address range of the ALT_MPFE_F2SDR0_FW component. */
2778 #define ALT_MPFE_F2SDR0_FW_LB_ADDR ALT_MPFE_F2SDR0_FW_ADDR
2779 /* The upper bound address range of the ALT_MPFE_F2SDR0_FW component. */
2780 #define ALT_MPFE_F2SDR0_FW_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR0_FW_ADDR) + 0x100) - 1))
2781 
2782 
2783 /*
2784  * Component Instance : soc_noc_fw_ddr_f2sdr1_scr
2785  *
2786  * Instance soc_noc_fw_ddr_f2sdr1_scr of component ALT_SOC_NOC_FW_DDR_F2SDR_SCR.
2787  *
2788  *
2789  */
2790 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2791 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ENABLE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2792 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_SET register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2793 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ENABLE_SET_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_SET_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2794 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_CLEAR register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2795 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ENABLE_CLEAR_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_CLEAR_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2796 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2797 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION0ADDR_BASE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_BASE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2798 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2799 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION0ADDR_BASEEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_BASEEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2800 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2801 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION0ADDR_LIMIT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_LIMIT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2802 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2803 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION0ADDR_LIMITEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_LIMITEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2804 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2805 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION1ADDR_BASE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_BASE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2806 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2807 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION1ADDR_BASEEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_BASEEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2808 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2809 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION1ADDR_LIMIT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_LIMIT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2810 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2811 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION1ADDR_LIMITEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_LIMITEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2812 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2813 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION2ADDR_BASE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_BASE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2814 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2815 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION2ADDR_BASEEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_BASEEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2816 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2817 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION2ADDR_LIMIT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_LIMIT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2818 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2819 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION2ADDR_LIMITEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_LIMITEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2820 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2821 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION3ADDR_BASE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_BASE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2822 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2823 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION3ADDR_BASEEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_BASEEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2824 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2825 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION3ADDR_LIMIT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_LIMIT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2826 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR instance. */
2827 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_REGION3ADDR_LIMITEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_LIMITEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR)
2828 /* The base address byte offset for the start of the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR component. */
2829 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_OFST 0xf8020300
2830 /* The start address of the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR component. */
2831 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_OFST))
2832 /* The lower bound address range of the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR component. */
2833 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_LB_ADDR ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR
2834 /* The upper bound address range of the ALT_SOC_NOC_FW_DDR_F2SDR1_SCR component. */
2835 #define ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_F2SDR1_SCR_ADDR) + 0x100) - 1))
2836 
2837 
2838 /*
2839  * Component Instance : mpfe_f2sdr1_fw
2840  *
2841  * Instance mpfe_f2sdr1_fw of component ALT_MPFE_FW.
2842  *
2843  *
2844  */
2845 /* The base address byte offset for the start of the ALT_MPFE_F2SDR1_FW component. */
2846 #define ALT_MPFE_F2SDR1_FW_OFST 0xf8020300
2847 /* The start address of the ALT_MPFE_F2SDR1_FW component. */
2848 #define ALT_MPFE_F2SDR1_FW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR1_FW_OFST))
2849 /* The lower bound address range of the ALT_MPFE_F2SDR1_FW component. */
2850 #define ALT_MPFE_F2SDR1_FW_LB_ADDR ALT_MPFE_F2SDR1_FW_ADDR
2851 /* The upper bound address range of the ALT_MPFE_F2SDR1_FW component. */
2852 #define ALT_MPFE_F2SDR1_FW_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR1_FW_ADDR) + 0x100) - 1))
2853 
2854 
2855 /*
2856  * Component Instance : soc_noc_fw_ddr_f2sdr2_scr
2857  *
2858  * Instance soc_noc_fw_ddr_f2sdr2_scr of component ALT_SOC_NOC_FW_DDR_F2SDR_SCR.
2859  *
2860  *
2861  */
2862 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2863 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ENABLE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2864 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_SET register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2865 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ENABLE_SET_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_SET_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2866 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_CLEAR register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2867 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ENABLE_CLEAR_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_ENABLE_CLEAR_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2868 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2869 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION0ADDR_BASE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_BASE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2870 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2871 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION0ADDR_BASEEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_BASEEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2872 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2873 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION0ADDR_LIMIT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_LIMIT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2874 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2875 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION0ADDR_LIMITEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION0ADDR_LIMITEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2876 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2877 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION1ADDR_BASE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_BASE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2878 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2879 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION1ADDR_BASEEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_BASEEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2880 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2881 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION1ADDR_LIMIT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_LIMIT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2882 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2883 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION1ADDR_LIMITEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION1ADDR_LIMITEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2884 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2885 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION2ADDR_BASE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_BASE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2886 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2887 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION2ADDR_BASEEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_BASEEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2888 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2889 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION2ADDR_LIMIT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_LIMIT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2890 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2891 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION2ADDR_LIMITEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION2ADDR_LIMITEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2892 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_BASE register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2893 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION3ADDR_BASE_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_BASE_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2894 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_BASEEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2895 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION3ADDR_BASEEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_BASEEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2896 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_LIMIT register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2897 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION3ADDR_LIMIT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_LIMIT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2898 /* The address of the ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_LIMITEXT register for the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR instance. */
2899 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_REGION3ADDR_LIMITEXT_ADDR ALT_SOC_NOC_FW_DDR_F2SDR_SCR_REGION3ADDR_LIMITEXT_ADDR(ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR)
2900 /* The base address byte offset for the start of the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR component. */
2901 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_OFST 0xf8020400
2902 /* The start address of the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR component. */
2903 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_OFST))
2904 /* The lower bound address range of the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR component. */
2905 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_LB_ADDR ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR
2906 /* The upper bound address range of the ALT_SOC_NOC_FW_DDR_F2SDR2_SCR component. */
2907 #define ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SOC_NOC_FW_DDR_F2SDR2_SCR_ADDR) + 0x100) - 1))
2908 
2909 
2910 /*
2911  * Component Instance : mpfe_f2sdr2_fw
2912  *
2913  * Instance mpfe_f2sdr2_fw of component ALT_MPFE_FW.
2914  *
2915  *
2916  */
2917 /* The base address byte offset for the start of the ALT_MPFE_F2SDR2_FW component. */
2918 #define ALT_MPFE_F2SDR2_FW_OFST 0xf8020400
2919 /* The start address of the ALT_MPFE_F2SDR2_FW component. */
2920 #define ALT_MPFE_F2SDR2_FW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR2_FW_OFST))
2921 /* The lower bound address range of the ALT_MPFE_F2SDR2_FW component. */
2922 #define ALT_MPFE_F2SDR2_FW_LB_ADDR ALT_MPFE_F2SDR2_FW_ADDR
2923 /* The upper bound address range of the ALT_MPFE_F2SDR2_FW component. */
2924 #define ALT_MPFE_F2SDR2_FW_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR2_FW_ADDR) + 0x100) - 1))
2925 
2926 
2927 /*
2928  * Component Instance : mpfe_cs_obs_at_main_atbendpt
2929  *
2930  * Instance mpfe_cs_obs_at_main_atbendpt of component ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT.
2931  *
2932  *
2933  */
2934 /* The address of the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID register for the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT instance. */
2935 #define ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_ADDR) + ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_OFST))
2936 /* The address of the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID register for the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT instance. */
2937 #define ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_ADDR) + ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_OFST))
2938 /* The address of the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID register for the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT instance. */
2939 #define ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_ADDR) + ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_OFST))
2940 /* The address of the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN register for the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT instance. */
2941 #define ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_ADDR) + ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_OFST))
2942 /* The address of the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD register for the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT instance. */
2943 #define ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_ADDR) + ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_OFST))
2944 /* The base address byte offset for the start of the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT component. */
2945 #define ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_OFST 0xf8021000
2946 /* The start address of the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT component. */
2947 #define ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_OFST))
2948 /* The lower bound address range of the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT component. */
2949 #define ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_LB_ADDR ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_ADDR
2950 /* The upper bound address range of the ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT component. */
2951 #define ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT_ADDR) + 0x80) - 1))
2952 
2953 
2954 /*
2955  * Component Instance : mpfe_ccu_mem0_qos
2956  *
2957  * Instance mpfe_ccu_mem0_qos of component ALT_MPFE_CCU_MEM0_QOS.
2958  *
2959  *
2960  */
2961 /* The address of the ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_MPFE_CCU_MEM0_QOS instance. */
2962 #define ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_CCU_MEM0_QOS_ADDR) + ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
2963 /* The address of the ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_MPFE_CCU_MEM0_QOS instance. */
2964 #define ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_CCU_MEM0_QOS_ADDR) + ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
2965 /* The address of the ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_MPFE_CCU_MEM0_QOS instance. */
2966 #define ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_CCU_MEM0_QOS_ADDR) + ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
2967 /* The address of the ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_MODE register for the ALT_MPFE_CCU_MEM0_QOS instance. */
2968 #define ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_CCU_MEM0_QOS_ADDR) + ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_MODE_OFST))
2969 /* The address of the ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_MPFE_CCU_MEM0_QOS instance. */
2970 #define ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_CCU_MEM0_QOS_ADDR) + ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
2971 /* The address of the ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_MPFE_CCU_MEM0_QOS instance. */
2972 #define ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_CCU_MEM0_QOS_ADDR) + ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_SATURATION_OFST))
2973 /* The address of the ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_MPFE_CCU_MEM0_QOS instance. */
2974 #define ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_CCU_MEM0_QOS_ADDR) + ALT_MPFE_CCU_MEM0_QOS_CCU_MEM0_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
2975 /* The base address byte offset for the start of the ALT_MPFE_CCU_MEM0_QOS component. */
2976 #define ALT_MPFE_CCU_MEM0_QOS_OFST 0xf8022080
2977 /* The start address of the ALT_MPFE_CCU_MEM0_QOS component. */
2978 #define ALT_MPFE_CCU_MEM0_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_CCU_MEM0_QOS_OFST))
2979 /* The lower bound address range of the ALT_MPFE_CCU_MEM0_QOS component. */
2980 #define ALT_MPFE_CCU_MEM0_QOS_LB_ADDR ALT_MPFE_CCU_MEM0_QOS_ADDR
2981 /* The upper bound address range of the ALT_MPFE_CCU_MEM0_QOS component. */
2982 #define ALT_MPFE_CCU_MEM0_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_CCU_MEM0_QOS_ADDR) + 0x80) - 1))
2983 
2984 
2985 /*
2986  * Component Instance : mpfe_f2sdr0_axi128_qos
2987  *
2988  * Instance mpfe_f2sdr0_axi128_qos of component ALT_MPFE_F2SDR0_AXI128_QOS.
2989  *
2990  *
2991  */
2992 /* The address of the ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_MPFE_F2SDR0_AXI128_QOS instance. */
2993 #define ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
2994 /* The address of the ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_MPFE_F2SDR0_AXI128_QOS instance. */
2995 #define ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
2996 /* The address of the ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_MPFE_F2SDR0_AXI128_QOS instance. */
2997 #define ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
2998 /* The address of the ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_MODE register for the ALT_MPFE_F2SDR0_AXI128_QOS instance. */
2999 #define ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_MODE_OFST))
3000 /* The address of the ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_MPFE_F2SDR0_AXI128_QOS instance. */
3001 #define ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
3002 /* The address of the ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_MPFE_F2SDR0_AXI128_QOS instance. */
3003 #define ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_SATURATION_OFST))
3004 /* The address of the ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_MPFE_F2SDR0_AXI128_QOS instance. */
3005 #define ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI128_QOS_FPGA2SDRAM0_AXI128_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
3006 /* The base address byte offset for the start of the ALT_MPFE_F2SDR0_AXI128_QOS component. */
3007 #define ALT_MPFE_F2SDR0_AXI128_QOS_OFST 0xf8022100
3008 /* The start address of the ALT_MPFE_F2SDR0_AXI128_QOS component. */
3009 #define ALT_MPFE_F2SDR0_AXI128_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR0_AXI128_QOS_OFST))
3010 /* The lower bound address range of the ALT_MPFE_F2SDR0_AXI128_QOS component. */
3011 #define ALT_MPFE_F2SDR0_AXI128_QOS_LB_ADDR ALT_MPFE_F2SDR0_AXI128_QOS_ADDR
3012 /* The upper bound address range of the ALT_MPFE_F2SDR0_AXI128_QOS component. */
3013 #define ALT_MPFE_F2SDR0_AXI128_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI128_QOS_ADDR) + 0x80) - 1))
3014 
3015 
3016 /*
3017  * Component Instance : mpfe_f2sdr0_axi32_qos
3018  *
3019  * Instance mpfe_f2sdr0_axi32_qos of component ALT_MPFE_F2SDR0_AXI32_QOS.
3020  *
3021  *
3022  */
3023 /* The address of the ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_MPFE_F2SDR0_AXI32_QOS instance. */
3024 #define ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
3025 /* The address of the ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_MPFE_F2SDR0_AXI32_QOS instance. */
3026 #define ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
3027 /* The address of the ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_MPFE_F2SDR0_AXI32_QOS instance. */
3028 #define ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
3029 /* The address of the ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_MODE register for the ALT_MPFE_F2SDR0_AXI32_QOS instance. */
3030 #define ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_MODE_OFST))
3031 /* The address of the ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_MPFE_F2SDR0_AXI32_QOS instance. */
3032 #define ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
3033 /* The address of the ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_MPFE_F2SDR0_AXI32_QOS instance. */
3034 #define ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_SATURATION_OFST))
3035 /* The address of the ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_MPFE_F2SDR0_AXI32_QOS instance. */
3036 #define ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI32_QOS_FPGA2SDRAM0_AXI32_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
3037 /* The base address byte offset for the start of the ALT_MPFE_F2SDR0_AXI32_QOS component. */
3038 #define ALT_MPFE_F2SDR0_AXI32_QOS_OFST 0xf8022180
3039 /* The start address of the ALT_MPFE_F2SDR0_AXI32_QOS component. */
3040 #define ALT_MPFE_F2SDR0_AXI32_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR0_AXI32_QOS_OFST))
3041 /* The lower bound address range of the ALT_MPFE_F2SDR0_AXI32_QOS component. */
3042 #define ALT_MPFE_F2SDR0_AXI32_QOS_LB_ADDR ALT_MPFE_F2SDR0_AXI32_QOS_ADDR
3043 /* The upper bound address range of the ALT_MPFE_F2SDR0_AXI32_QOS component. */
3044 #define ALT_MPFE_F2SDR0_AXI32_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI32_QOS_ADDR) + 0x80) - 1))
3045 
3046 
3047 /*
3048  * Component Instance : mpfe_f2sdr0_axi64_qos
3049  *
3050  * Instance mpfe_f2sdr0_axi64_qos of component ALT_MPFE_F2SDR0_AXI64_QOS.
3051  *
3052  *
3053  */
3054 /* The address of the ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_MPFE_F2SDR0_AXI64_QOS instance. */
3055 #define ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
3056 /* The address of the ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_MPFE_F2SDR0_AXI64_QOS instance. */
3057 #define ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
3058 /* The address of the ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_MPFE_F2SDR0_AXI64_QOS instance. */
3059 #define ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
3060 /* The address of the ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_MODE register for the ALT_MPFE_F2SDR0_AXI64_QOS instance. */
3061 #define ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_MODE_OFST))
3062 /* The address of the ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_MPFE_F2SDR0_AXI64_QOS instance. */
3063 #define ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
3064 /* The address of the ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_MPFE_F2SDR0_AXI64_QOS instance. */
3065 #define ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_SATURATION_OFST))
3066 /* The address of the ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_MPFE_F2SDR0_AXI64_QOS instance. */
3067 #define ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR0_AXI64_QOS_FPGA2SDRAM0_AXI64_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
3068 /* The base address byte offset for the start of the ALT_MPFE_F2SDR0_AXI64_QOS component. */
3069 #define ALT_MPFE_F2SDR0_AXI64_QOS_OFST 0xf8022200
3070 /* The start address of the ALT_MPFE_F2SDR0_AXI64_QOS component. */
3071 #define ALT_MPFE_F2SDR0_AXI64_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR0_AXI64_QOS_OFST))
3072 /* The lower bound address range of the ALT_MPFE_F2SDR0_AXI64_QOS component. */
3073 #define ALT_MPFE_F2SDR0_AXI64_QOS_LB_ADDR ALT_MPFE_F2SDR0_AXI64_QOS_ADDR
3074 /* The upper bound address range of the ALT_MPFE_F2SDR0_AXI64_QOS component. */
3075 #define ALT_MPFE_F2SDR0_AXI64_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR0_AXI64_QOS_ADDR) + 0x80) - 1))
3076 
3077 
3078 /*
3079  * Component Instance : mpfe_f2sdr1_axi128_qos
3080  *
3081  * Instance mpfe_f2sdr1_axi128_qos of component ALT_MPFE_F2SDR1_AXI128_QOS.
3082  *
3083  *
3084  */
3085 /* The address of the ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_MPFE_F2SDR1_AXI128_QOS instance. */
3086 #define ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
3087 /* The address of the ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_MPFE_F2SDR1_AXI128_QOS instance. */
3088 #define ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
3089 /* The address of the ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_MPFE_F2SDR1_AXI128_QOS instance. */
3090 #define ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
3091 /* The address of the ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_MODE register for the ALT_MPFE_F2SDR1_AXI128_QOS instance. */
3092 #define ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_MODE_OFST))
3093 /* The address of the ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_MPFE_F2SDR1_AXI128_QOS instance. */
3094 #define ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
3095 /* The address of the ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_MPFE_F2SDR1_AXI128_QOS instance. */
3096 #define ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_SATURATION_OFST))
3097 /* The address of the ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_MPFE_F2SDR1_AXI128_QOS instance. */
3098 #define ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI128_QOS_FPGA2SDRAM1_AXI128_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
3099 /* The base address byte offset for the start of the ALT_MPFE_F2SDR1_AXI128_QOS component. */
3100 #define ALT_MPFE_F2SDR1_AXI128_QOS_OFST 0xf8022280
3101 /* The start address of the ALT_MPFE_F2SDR1_AXI128_QOS component. */
3102 #define ALT_MPFE_F2SDR1_AXI128_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR1_AXI128_QOS_OFST))
3103 /* The lower bound address range of the ALT_MPFE_F2SDR1_AXI128_QOS component. */
3104 #define ALT_MPFE_F2SDR1_AXI128_QOS_LB_ADDR ALT_MPFE_F2SDR1_AXI128_QOS_ADDR
3105 /* The upper bound address range of the ALT_MPFE_F2SDR1_AXI128_QOS component. */
3106 #define ALT_MPFE_F2SDR1_AXI128_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI128_QOS_ADDR) + 0x80) - 1))
3107 
3108 
3109 /*
3110  * Component Instance : mpfe_f2sdr1_axi32_qos
3111  *
3112  * Instance mpfe_f2sdr1_axi32_qos of component ALT_MPFE_F2SDR1_AXI32_QOS.
3113  *
3114  *
3115  */
3116 /* The address of the ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_MPFE_F2SDR1_AXI32_QOS instance. */
3117 #define ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
3118 /* The address of the ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_MPFE_F2SDR1_AXI32_QOS instance. */
3119 #define ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
3120 /* The address of the ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_MPFE_F2SDR1_AXI32_QOS instance. */
3121 #define ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
3122 /* The address of the ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_MODE register for the ALT_MPFE_F2SDR1_AXI32_QOS instance. */
3123 #define ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_MODE_OFST))
3124 /* The address of the ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_MPFE_F2SDR1_AXI32_QOS instance. */
3125 #define ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
3126 /* The address of the ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_MPFE_F2SDR1_AXI32_QOS instance. */
3127 #define ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_SATURATION_OFST))
3128 /* The address of the ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_MPFE_F2SDR1_AXI32_QOS instance. */
3129 #define ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI32_QOS_FPGA2SDRAM1_AXI32_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
3130 /* The base address byte offset for the start of the ALT_MPFE_F2SDR1_AXI32_QOS component. */
3131 #define ALT_MPFE_F2SDR1_AXI32_QOS_OFST 0xf8022300
3132 /* The start address of the ALT_MPFE_F2SDR1_AXI32_QOS component. */
3133 #define ALT_MPFE_F2SDR1_AXI32_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR1_AXI32_QOS_OFST))
3134 /* The lower bound address range of the ALT_MPFE_F2SDR1_AXI32_QOS component. */
3135 #define ALT_MPFE_F2SDR1_AXI32_QOS_LB_ADDR ALT_MPFE_F2SDR1_AXI32_QOS_ADDR
3136 /* The upper bound address range of the ALT_MPFE_F2SDR1_AXI32_QOS component. */
3137 #define ALT_MPFE_F2SDR1_AXI32_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI32_QOS_ADDR) + 0x80) - 1))
3138 
3139 
3140 /*
3141  * Component Instance : mpfe_f2sdr1_axi64_qos
3142  *
3143  * Instance mpfe_f2sdr1_axi64_qos of component ALT_MPFE_F2SDR1_AXI64_QOS.
3144  *
3145  *
3146  */
3147 /* The address of the ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_MPFE_F2SDR1_AXI64_QOS instance. */
3148 #define ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
3149 /* The address of the ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_MPFE_F2SDR1_AXI64_QOS instance. */
3150 #define ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
3151 /* The address of the ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_MPFE_F2SDR1_AXI64_QOS instance. */
3152 #define ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
3153 /* The address of the ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_MODE register for the ALT_MPFE_F2SDR1_AXI64_QOS instance. */
3154 #define ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_MODE_OFST))
3155 /* The address of the ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_MPFE_F2SDR1_AXI64_QOS instance. */
3156 #define ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
3157 /* The address of the ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_MPFE_F2SDR1_AXI64_QOS instance. */
3158 #define ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_SATURATION_OFST))
3159 /* The address of the ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_MPFE_F2SDR1_AXI64_QOS instance. */
3160 #define ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR1_AXI64_QOS_FPGA2SDRAM1_AXI64_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
3161 /* The base address byte offset for the start of the ALT_MPFE_F2SDR1_AXI64_QOS component. */
3162 #define ALT_MPFE_F2SDR1_AXI64_QOS_OFST 0xf8022380
3163 /* The start address of the ALT_MPFE_F2SDR1_AXI64_QOS component. */
3164 #define ALT_MPFE_F2SDR1_AXI64_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR1_AXI64_QOS_OFST))
3165 /* The lower bound address range of the ALT_MPFE_F2SDR1_AXI64_QOS component. */
3166 #define ALT_MPFE_F2SDR1_AXI64_QOS_LB_ADDR ALT_MPFE_F2SDR1_AXI64_QOS_ADDR
3167 /* The upper bound address range of the ALT_MPFE_F2SDR1_AXI64_QOS component. */
3168 #define ALT_MPFE_F2SDR1_AXI64_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR1_AXI64_QOS_ADDR) + 0x80) - 1))
3169 
3170 
3171 /*
3172  * Component Instance : mpfe_f2sdr2_axi128_qos
3173  *
3174  * Instance mpfe_f2sdr2_axi128_qos of component ALT_MPFE_F2SDR2_AXI128_QOS.
3175  *
3176  *
3177  */
3178 /* The address of the ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_MPFE_F2SDR2_AXI128_QOS instance. */
3179 #define ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
3180 /* The address of the ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_MPFE_F2SDR2_AXI128_QOS instance. */
3181 #define ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
3182 /* The address of the ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_MPFE_F2SDR2_AXI128_QOS instance. */
3183 #define ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
3184 /* The address of the ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_MODE register for the ALT_MPFE_F2SDR2_AXI128_QOS instance. */
3185 #define ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_MODE_OFST))
3186 /* The address of the ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_MPFE_F2SDR2_AXI128_QOS instance. */
3187 #define ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
3188 /* The address of the ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_MPFE_F2SDR2_AXI128_QOS instance. */
3189 #define ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_SATURATION_OFST))
3190 /* The address of the ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_MPFE_F2SDR2_AXI128_QOS instance. */
3191 #define ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI128_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI128_QOS_FPGA2SDRAM2_AXI128_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
3192 /* The base address byte offset for the start of the ALT_MPFE_F2SDR2_AXI128_QOS component. */
3193 #define ALT_MPFE_F2SDR2_AXI128_QOS_OFST 0xf8022400
3194 /* The start address of the ALT_MPFE_F2SDR2_AXI128_QOS component. */
3195 #define ALT_MPFE_F2SDR2_AXI128_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR2_AXI128_QOS_OFST))
3196 /* The lower bound address range of the ALT_MPFE_F2SDR2_AXI128_QOS component. */
3197 #define ALT_MPFE_F2SDR2_AXI128_QOS_LB_ADDR ALT_MPFE_F2SDR2_AXI128_QOS_ADDR
3198 /* The upper bound address range of the ALT_MPFE_F2SDR2_AXI128_QOS component. */
3199 #define ALT_MPFE_F2SDR2_AXI128_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI128_QOS_ADDR) + 0x80) - 1))
3200 
3201 
3202 /*
3203  * Component Instance : mpfe_f2sdr2_axi32_qos
3204  *
3205  * Instance mpfe_f2sdr2_axi32_qos of component ALT_MPFE_F2SDR2_AXI32_QOS.
3206  *
3207  *
3208  */
3209 /* The address of the ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_MPFE_F2SDR2_AXI32_QOS instance. */
3210 #define ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
3211 /* The address of the ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_MPFE_F2SDR2_AXI32_QOS instance. */
3212 #define ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
3213 /* The address of the ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_MPFE_F2SDR2_AXI32_QOS instance. */
3214 #define ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
3215 /* The address of the ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_MODE register for the ALT_MPFE_F2SDR2_AXI32_QOS instance. */
3216 #define ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_MODE_OFST))
3217 /* The address of the ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_MPFE_F2SDR2_AXI32_QOS instance. */
3218 #define ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
3219 /* The address of the ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_MPFE_F2SDR2_AXI32_QOS instance. */
3220 #define ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_SATURATION_OFST))
3221 /* The address of the ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_MPFE_F2SDR2_AXI32_QOS instance. */
3222 #define ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI32_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI32_QOS_FPGA2SDRAM2_AXI32_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
3223 /* The base address byte offset for the start of the ALT_MPFE_F2SDR2_AXI32_QOS component. */
3224 #define ALT_MPFE_F2SDR2_AXI32_QOS_OFST 0xf8022480
3225 /* The start address of the ALT_MPFE_F2SDR2_AXI32_QOS component. */
3226 #define ALT_MPFE_F2SDR2_AXI32_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR2_AXI32_QOS_OFST))
3227 /* The lower bound address range of the ALT_MPFE_F2SDR2_AXI32_QOS component. */
3228 #define ALT_MPFE_F2SDR2_AXI32_QOS_LB_ADDR ALT_MPFE_F2SDR2_AXI32_QOS_ADDR
3229 /* The upper bound address range of the ALT_MPFE_F2SDR2_AXI32_QOS component. */
3230 #define ALT_MPFE_F2SDR2_AXI32_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI32_QOS_ADDR) + 0x80) - 1))
3231 
3232 
3233 /*
3234  * Component Instance : mpfe_f2sdr2_axi64_qos
3235  *
3236  * Instance mpfe_f2sdr2_axi64_qos of component ALT_MPFE_F2SDR2_AXI64_QOS.
3237  *
3238  *
3239  */
3240 /* The address of the ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_MPFE_F2SDR2_AXI64_QOS instance. */
3241 #define ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
3242 /* The address of the ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_MPFE_F2SDR2_AXI64_QOS instance. */
3243 #define ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
3244 /* The address of the ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_MPFE_F2SDR2_AXI64_QOS instance. */
3245 #define ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
3246 /* The address of the ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_MODE register for the ALT_MPFE_F2SDR2_AXI64_QOS instance. */
3247 #define ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_MODE_OFST))
3248 /* The address of the ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_MPFE_F2SDR2_AXI64_QOS instance. */
3249 #define ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
3250 /* The address of the ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_MPFE_F2SDR2_AXI64_QOS instance. */
3251 #define ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_SATURATION_OFST))
3252 /* The address of the ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_MPFE_F2SDR2_AXI64_QOS instance. */
3253 #define ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI64_QOS_ADDR) + ALT_MPFE_F2SDR2_AXI64_QOS_FPGA2SDRAM2_AXI64_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
3254 /* The base address byte offset for the start of the ALT_MPFE_F2SDR2_AXI64_QOS component. */
3255 #define ALT_MPFE_F2SDR2_AXI64_QOS_OFST 0xf8022500
3256 /* The start address of the ALT_MPFE_F2SDR2_AXI64_QOS component. */
3257 #define ALT_MPFE_F2SDR2_AXI64_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR2_AXI64_QOS_OFST))
3258 /* The lower bound address range of the ALT_MPFE_F2SDR2_AXI64_QOS component. */
3259 #define ALT_MPFE_F2SDR2_AXI64_QOS_LB_ADDR ALT_MPFE_F2SDR2_AXI64_QOS_ADDR
3260 /* The upper bound address range of the ALT_MPFE_F2SDR2_AXI64_QOS component. */
3261 #define ALT_MPFE_F2SDR2_AXI64_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR2_AXI64_QOS_ADDR) + 0x80) - 1))
3262 
3263 
3264 /*
3265  * Component Instance : mpfe_f2sdr_mgr_main_sbmgr
3266  *
3267  * Instance mpfe_f2sdr_mgr_main_sbmgr of component ALT_MPFE_F2SDR_MGR_MAIN_SBMGR.
3268  *
3269  *
3270  */
3271 /* The address of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_ID_COREID register for the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR instance. */
3272 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_ADDR) + ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_ID_COREID_OFST))
3273 /* The address of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_ID_REVISIONID register for the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR instance. */
3274 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_ADDR) + ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_ID_REVISIONID_OFST))
3275 /* The address of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FAULTEN register for the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR instance. */
3276 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FAULTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_ADDR) + ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FAULTEN_OFST))
3277 /* The address of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FAULTSTATUS register for the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR instance. */
3278 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FAULTSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_ADDR) + ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FAULTSTATUS_OFST))
3279 /* The address of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGINEN0 register for the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR instance. */
3280 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGINEN0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_ADDR) + ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGINEN0_OFST))
3281 /* The address of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGINSTATUS0 register for the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR instance. */
3282 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGINSTATUS0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_ADDR) + ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGINSTATUS0_OFST))
3283 /* The address of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGOUTSET0 register for the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR instance. */
3284 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGOUTSET0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_ADDR) + ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGOUTSET0_OFST))
3285 /* The address of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGOUTCLR0 register for the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR instance. */
3286 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGOUTCLR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_ADDR) + ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGOUTCLR0_OFST))
3287 /* The address of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGOUTSTATUS0 register for the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR instance. */
3288 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGOUTSTATUS0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_ADDR) + ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_FPGA2SDRAM_MANAGER_MAIN_SIDEBANDMANAGER_FLAGOUTSTATUS0_OFST))
3289 /* The base address byte offset for the start of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR component. */
3290 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_OFST 0xf8024000
3291 /* The start address of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR component. */
3292 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_OFST))
3293 /* The lower bound address range of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR component. */
3294 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_LB_ADDR ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_ADDR
3295 /* The upper bound address range of the ALT_MPFE_F2SDR_MGR_MAIN_SBMGR component. */
3296 #define ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPFE_F2SDR_MGR_MAIN_SBMGR_ADDR) + 0x100) - 1))
3297 
3298 
3299 /*
3300  * Component Instance : fpga_bridge_lwh2f
3301  *
3302  * Instance fpga_bridge_lwh2f of component ALT_FPGA_BRIDGE_LWH2F.
3303  *
3304  *
3305  */
3306 /* The base address byte offset for the start of the ALT_FPGA_BRIDGE_LWH2F component. */
3307 #define ALT_FPGA_BRIDGE_LWH2F_OFST 0xf9000000
3308 /* The start address of the ALT_FPGA_BRIDGE_LWH2F component. */
3309 #define ALT_FPGA_BRIDGE_LWH2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGA_BRIDGE_LWH2F_OFST))
3310 /* The lower bound address range of the ALT_FPGA_BRIDGE_LWH2F component. */
3311 #define ALT_FPGA_BRIDGE_LWH2F_LB_ADDR ALT_FPGA_BRIDGE_LWH2F_ADDR
3312 /* The upper bound address range of the ALT_FPGA_BRIDGE_LWH2F component. */
3313 #define ALT_FPGA_BRIDGE_LWH2F_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGA_BRIDGE_LWH2F_ADDR) + 0x200000) - 1))
3314 
3315 
3316 /*
3317  * Component Instance : noc_cache_clean
3318  *
3319  * Instance noc_cache_clean of component ALT_NOC_CACHE_CLEAN.
3320  *
3321  *
3322  */
3323 /* The base address byte offset for the start of the ALT_NOC_CACHE_CLEAN component. */
3324 #define ALT_NOC_CACHE_CLEAN_OFST 0xf9c00000
3325 /* The start address of the ALT_NOC_CACHE_CLEAN component. */
3326 #define ALT_NOC_CACHE_CLEAN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CACHE_CLEAN_OFST))
3327 /* The lower bound address range of the ALT_NOC_CACHE_CLEAN component. */
3328 #define ALT_NOC_CACHE_CLEAN_LB_ADDR ALT_NOC_CACHE_CLEAN_ADDR
3329 /* The upper bound address range of the ALT_NOC_CACHE_CLEAN component. */
3330 #define ALT_NOC_CACHE_CLEAN_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CACHE_CLEAN_ADDR) + 0x400000) - 1))
3331 
3332 
3333 /*
3334  * Component Instance : smmu_secure
3335  *
3336  * Instance smmu_secure of component ALT_SMMU_SECURE.
3337  *
3338  *
3339  */
3340 /* The address of the ALT_SMMU_SECURE_SMMU_SCR0 register for the ALT_SMMU_SECURE instance. */
3341 #define ALT_SMMU_SECURE_SMMU_SCR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SCR0_OFST))
3342 /* The address of the ALT_SMMU_SECURE_SMMU_SCR1 register for the ALT_SMMU_SECURE instance. */
3343 #define ALT_SMMU_SECURE_SMMU_SCR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SCR1_OFST))
3344 /* The address of the ALT_SMMU_SECURE_SMMU_SACR register for the ALT_SMMU_SECURE instance. */
3345 #define ALT_SMMU_SECURE_SMMU_SACR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SACR_OFST))
3346 /* The address of the ALT_SMMU_SECURE_SMMU_SIDR0 register for the ALT_SMMU_SECURE instance. */
3347 #define ALT_SMMU_SECURE_SMMU_SIDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SIDR0_OFST))
3348 /* The address of the ALT_SMMU_SECURE_SMMU_SIDR1 register for the ALT_SMMU_SECURE instance. */
3349 #define ALT_SMMU_SECURE_SMMU_SIDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SIDR1_OFST))
3350 /* The address of the ALT_SMMU_SECURE_SMMU_SIDR2 register for the ALT_SMMU_SECURE instance. */
3351 #define ALT_SMMU_SECURE_SMMU_SIDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SIDR2_OFST))
3352 /* The address of the ALT_SMMU_SECURE_SMMU_SIDR7 register for the ALT_SMMU_SECURE instance. */
3353 #define ALT_SMMU_SECURE_SMMU_SIDR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SIDR7_OFST))
3354 /* The address of the ALT_SMMU_SECURE_SMMU_SGFAR_LOW register for the ALT_SMMU_SECURE instance. */
3355 #define ALT_SMMU_SECURE_SMMU_SGFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SGFAR_LOW_OFST))
3356 /* The address of the ALT_SMMU_SECURE_SMMU_SGFAR_HIGH register for the ALT_SMMU_SECURE instance. */
3357 #define ALT_SMMU_SECURE_SMMU_SGFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SGFAR_HIGH_OFST))
3358 /* The address of the ALT_SMMU_SECURE_SMMU_SGFSR register for the ALT_SMMU_SECURE instance. */
3359 #define ALT_SMMU_SECURE_SMMU_SGFSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SGFSR_OFST))
3360 /* The address of the ALT_SMMU_SECURE_SMMU_SGFSRRESTORE register for the ALT_SMMU_SECURE instance. */
3361 #define ALT_SMMU_SECURE_SMMU_SGFSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SGFSRRESTORE_OFST))
3362 /* The address of the ALT_SMMU_SECURE_SMMU_SGFSYNR0 register for the ALT_SMMU_SECURE instance. */
3363 #define ALT_SMMU_SECURE_SMMU_SGFSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SGFSYNR0_OFST))
3364 /* The address of the ALT_SMMU_SECURE_SMMU_SGFSYNR1 register for the ALT_SMMU_SECURE instance. */
3365 #define ALT_SMMU_SECURE_SMMU_SGFSYNR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SGFSYNR1_OFST))
3366 /* The address of the ALT_SMMU_SECURE_SMMU_STLBIALL register for the ALT_SMMU_SECURE instance. */
3367 #define ALT_SMMU_SECURE_SMMU_STLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_STLBIALL_OFST))
3368 /* The address of the ALT_SMMU_SECURE_SMMU_TLBIVMID register for the ALT_SMMU_SECURE instance. */
3369 #define ALT_SMMU_SECURE_SMMU_TLBIVMID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_TLBIVMID_OFST))
3370 /* The address of the ALT_SMMU_SECURE_SMMU_TLBIALLNSNH register for the ALT_SMMU_SECURE instance. */
3371 #define ALT_SMMU_SECURE_SMMU_TLBIALLNSNH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_TLBIALLNSNH_OFST))
3372 /* The address of the ALT_SMMU_SECURE_SMMU_STLBGSYNC register for the ALT_SMMU_SECURE instance. */
3373 #define ALT_SMMU_SECURE_SMMU_STLBGSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_STLBGSYNC_OFST))
3374 /* The address of the ALT_SMMU_SECURE_SMMU_STLBGSTATUS register for the ALT_SMMU_SECURE instance. */
3375 #define ALT_SMMU_SECURE_SMMU_STLBGSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_STLBGSTATUS_OFST))
3376 /* The address of the ALT_SMMU_SECURE_SMMU_DBGRPTRTBU register for the ALT_SMMU_SECURE instance. */
3377 #define ALT_SMMU_SECURE_SMMU_DBGRPTRTBU_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_DBGRPTRTBU_OFST))
3378 /* The address of the ALT_SMMU_SECURE_SMMU_DBGRDATATBU register for the ALT_SMMU_SECURE instance. */
3379 #define ALT_SMMU_SECURE_SMMU_DBGRDATATBU_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_DBGRDATATBU_OFST))
3380 /* The address of the ALT_SMMU_SECURE_SMMU_DBGRPTRTCU register for the ALT_SMMU_SECURE instance. */
3381 #define ALT_SMMU_SECURE_SMMU_DBGRPTRTCU_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_DBGRPTRTCU_OFST))
3382 /* The address of the ALT_SMMU_SECURE_SMMU_DBGRDATATCU register for the ALT_SMMU_SECURE instance. */
3383 #define ALT_SMMU_SECURE_SMMU_DBGRDATATCU_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_DBGRDATATCU_OFST))
3384 /* The address of the ALT_SMMU_SECURE_SMMU_STLBIVALM_LOW register for the ALT_SMMU_SECURE instance. */
3385 #define ALT_SMMU_SECURE_SMMU_STLBIVALM_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_STLBIVALM_LOW_OFST))
3386 /* The address of the ALT_SMMU_SECURE_SMMU_STLBIVALM_HIGH register for the ALT_SMMU_SECURE instance. */
3387 #define ALT_SMMU_SECURE_SMMU_STLBIVALM_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_STLBIVALM_HIGH_OFST))
3388 /* The address of the ALT_SMMU_SECURE_SMMU_STLBIVAM_LOW register for the ALT_SMMU_SECURE instance. */
3389 #define ALT_SMMU_SECURE_SMMU_STLBIVAM_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_STLBIVAM_LOW_OFST))
3390 /* The address of the ALT_SMMU_SECURE_SMMU_STLBIVAM_HIGH register for the ALT_SMMU_SECURE instance. */
3391 #define ALT_SMMU_SECURE_SMMU_STLBIVAM_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_STLBIVAM_HIGH_OFST))
3392 /* The address of the ALT_SMMU_SECURE_SMMU_STLBIALLM register for the ALT_SMMU_SECURE instance. */
3393 #define ALT_SMMU_SECURE_SMMU_STLBIALLM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_STLBIALLM_OFST))
3394 /* The address of the ALT_SMMU_SECURE_SMMU_NSCR0 register for the ALT_SMMU_SECURE instance. */
3395 #define ALT_SMMU_SECURE_SMMU_NSCR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_NSCR0_OFST))
3396 /* The address of the ALT_SMMU_SECURE_SMMU_NSACR register for the ALT_SMMU_SECURE instance. */
3397 #define ALT_SMMU_SECURE_SMMU_NSACR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_NSACR_OFST))
3398 /* The address of the ALT_SMMU_SECURE_SMMU_NSGFAR_LOW register for the ALT_SMMU_SECURE instance. */
3399 #define ALT_SMMU_SECURE_SMMU_NSGFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_NSGFAR_LOW_OFST))
3400 /* The address of the ALT_SMMU_SECURE_SMMU_NSGFAR_HIGH register for the ALT_SMMU_SECURE instance. */
3401 #define ALT_SMMU_SECURE_SMMU_NSGFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_NSGFAR_HIGH_OFST))
3402 /* The address of the ALT_SMMU_SECURE_SMMU_NSGFSR register for the ALT_SMMU_SECURE instance. */
3403 #define ALT_SMMU_SECURE_SMMU_NSGFSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_NSGFSR_OFST))
3404 /* The address of the ALT_SMMU_SECURE_SMMU_NSGFSRRESTORE register for the ALT_SMMU_SECURE instance. */
3405 #define ALT_SMMU_SECURE_SMMU_NSGFSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_NSGFSRRESTORE_OFST))
3406 /* The address of the ALT_SMMU_SECURE_SMMU_NSGFSYNR0 register for the ALT_SMMU_SECURE instance. */
3407 #define ALT_SMMU_SECURE_SMMU_NSGFSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_NSGFSYNR0_OFST))
3408 /* The address of the ALT_SMMU_SECURE_SMMU_NSGFSYNDR1 register for the ALT_SMMU_SECURE instance. */
3409 #define ALT_SMMU_SECURE_SMMU_NSGFSYNDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_NSGFSYNDR1_OFST))
3410 /* The address of the ALT_SMMU_SECURE_SMMU_NSTLBGSYNC register for the ALT_SMMU_SECURE instance. */
3411 #define ALT_SMMU_SECURE_SMMU_NSTLBGSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_NSTLBGSYNC_OFST))
3412 /* The address of the ALT_SMMU_SECURE_SMMU_NSTLBGSTATUS register for the ALT_SMMU_SECURE instance. */
3413 #define ALT_SMMU_SECURE_SMMU_NSTLBGSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_NSTLBGSTATUS_OFST))
3414 /* The address of the ALT_SMMU_SECURE_SMMU_SMR0 register for the ALT_SMMU_SECURE instance. */
3415 #define ALT_SMMU_SECURE_SMMU_SMR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR0_OFST))
3416 /* The address of the ALT_SMMU_SECURE_SMMU_SMR1 register for the ALT_SMMU_SECURE instance. */
3417 #define ALT_SMMU_SECURE_SMMU_SMR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR1_OFST))
3418 /* The address of the ALT_SMMU_SECURE_SMMU_SMR2 register for the ALT_SMMU_SECURE instance. */
3419 #define ALT_SMMU_SECURE_SMMU_SMR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR2_OFST))
3420 /* The address of the ALT_SMMU_SECURE_SMMU_SMR3 register for the ALT_SMMU_SECURE instance. */
3421 #define ALT_SMMU_SECURE_SMMU_SMR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR3_OFST))
3422 /* The address of the ALT_SMMU_SECURE_SMMU_SMR4 register for the ALT_SMMU_SECURE instance. */
3423 #define ALT_SMMU_SECURE_SMMU_SMR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR4_OFST))
3424 /* The address of the ALT_SMMU_SECURE_SMMU_SMR5 register for the ALT_SMMU_SECURE instance. */
3425 #define ALT_SMMU_SECURE_SMMU_SMR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR5_OFST))
3426 /* The address of the ALT_SMMU_SECURE_SMMU_SMR6 register for the ALT_SMMU_SECURE instance. */
3427 #define ALT_SMMU_SECURE_SMMU_SMR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR6_OFST))
3428 /* The address of the ALT_SMMU_SECURE_SMMU_SMR7 register for the ALT_SMMU_SECURE instance. */
3429 #define ALT_SMMU_SECURE_SMMU_SMR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR7_OFST))
3430 /* The address of the ALT_SMMU_SECURE_SMMU_SMR8 register for the ALT_SMMU_SECURE instance. */
3431 #define ALT_SMMU_SECURE_SMMU_SMR8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR8_OFST))
3432 /* The address of the ALT_SMMU_SECURE_SMMU_SMR9 register for the ALT_SMMU_SECURE instance. */
3433 #define ALT_SMMU_SECURE_SMMU_SMR9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR9_OFST))
3434 /* The address of the ALT_SMMU_SECURE_SMMU_SMR10 register for the ALT_SMMU_SECURE instance. */
3435 #define ALT_SMMU_SECURE_SMMU_SMR10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR10_OFST))
3436 /* The address of the ALT_SMMU_SECURE_SMMU_SMR11 register for the ALT_SMMU_SECURE instance. */
3437 #define ALT_SMMU_SECURE_SMMU_SMR11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR11_OFST))
3438 /* The address of the ALT_SMMU_SECURE_SMMU_SMR12 register for the ALT_SMMU_SECURE instance. */
3439 #define ALT_SMMU_SECURE_SMMU_SMR12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR12_OFST))
3440 /* The address of the ALT_SMMU_SECURE_SMMU_SMR13 register for the ALT_SMMU_SECURE instance. */
3441 #define ALT_SMMU_SECURE_SMMU_SMR13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR13_OFST))
3442 /* The address of the ALT_SMMU_SECURE_SMMU_SMR14 register for the ALT_SMMU_SECURE instance. */
3443 #define ALT_SMMU_SECURE_SMMU_SMR14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR14_OFST))
3444 /* The address of the ALT_SMMU_SECURE_SMMU_SMR15 register for the ALT_SMMU_SECURE instance. */
3445 #define ALT_SMMU_SECURE_SMMU_SMR15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR15_OFST))
3446 /* The address of the ALT_SMMU_SECURE_SMMU_SMR16 register for the ALT_SMMU_SECURE instance. */
3447 #define ALT_SMMU_SECURE_SMMU_SMR16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR16_OFST))
3448 /* The address of the ALT_SMMU_SECURE_SMMU_SMR17 register for the ALT_SMMU_SECURE instance. */
3449 #define ALT_SMMU_SECURE_SMMU_SMR17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR17_OFST))
3450 /* The address of the ALT_SMMU_SECURE_SMMU_SMR18 register for the ALT_SMMU_SECURE instance. */
3451 #define ALT_SMMU_SECURE_SMMU_SMR18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR18_OFST))
3452 /* The address of the ALT_SMMU_SECURE_SMMU_SMR19 register for the ALT_SMMU_SECURE instance. */
3453 #define ALT_SMMU_SECURE_SMMU_SMR19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR19_OFST))
3454 /* The address of the ALT_SMMU_SECURE_SMMU_SMR20 register for the ALT_SMMU_SECURE instance. */
3455 #define ALT_SMMU_SECURE_SMMU_SMR20_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR20_OFST))
3456 /* The address of the ALT_SMMU_SECURE_SMMU_SMR21 register for the ALT_SMMU_SECURE instance. */
3457 #define ALT_SMMU_SECURE_SMMU_SMR21_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR21_OFST))
3458 /* The address of the ALT_SMMU_SECURE_SMMU_SMR22 register for the ALT_SMMU_SECURE instance. */
3459 #define ALT_SMMU_SECURE_SMMU_SMR22_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR22_OFST))
3460 /* The address of the ALT_SMMU_SECURE_SMMU_SMR23 register for the ALT_SMMU_SECURE instance. */
3461 #define ALT_SMMU_SECURE_SMMU_SMR23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR23_OFST))
3462 /* The address of the ALT_SMMU_SECURE_SMMU_SMR24 register for the ALT_SMMU_SECURE instance. */
3463 #define ALT_SMMU_SECURE_SMMU_SMR24_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR24_OFST))
3464 /* The address of the ALT_SMMU_SECURE_SMMU_SMR25 register for the ALT_SMMU_SECURE instance. */
3465 #define ALT_SMMU_SECURE_SMMU_SMR25_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR25_OFST))
3466 /* The address of the ALT_SMMU_SECURE_SMMU_SMR26 register for the ALT_SMMU_SECURE instance. */
3467 #define ALT_SMMU_SECURE_SMMU_SMR26_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR26_OFST))
3468 /* The address of the ALT_SMMU_SECURE_SMMU_SMR27 register for the ALT_SMMU_SECURE instance. */
3469 #define ALT_SMMU_SECURE_SMMU_SMR27_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR27_OFST))
3470 /* The address of the ALT_SMMU_SECURE_SMMU_SMR28 register for the ALT_SMMU_SECURE instance. */
3471 #define ALT_SMMU_SECURE_SMMU_SMR28_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR28_OFST))
3472 /* The address of the ALT_SMMU_SECURE_SMMU_SMR29 register for the ALT_SMMU_SECURE instance. */
3473 #define ALT_SMMU_SECURE_SMMU_SMR29_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR29_OFST))
3474 /* The address of the ALT_SMMU_SECURE_SMMU_SMR30 register for the ALT_SMMU_SECURE instance. */
3475 #define ALT_SMMU_SECURE_SMMU_SMR30_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR30_OFST))
3476 /* The address of the ALT_SMMU_SECURE_SMMU_SMR31 register for the ALT_SMMU_SECURE instance. */
3477 #define ALT_SMMU_SECURE_SMMU_SMR31_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR31_OFST))
3478 /* The address of the ALT_SMMU_SECURE_SMMU_SMR32 register for the ALT_SMMU_SECURE instance. */
3479 #define ALT_SMMU_SECURE_SMMU_SMR32_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR32_OFST))
3480 /* The address of the ALT_SMMU_SECURE_SMMU_SMR33 register for the ALT_SMMU_SECURE instance. */
3481 #define ALT_SMMU_SECURE_SMMU_SMR33_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR33_OFST))
3482 /* The address of the ALT_SMMU_SECURE_SMMU_SMR34 register for the ALT_SMMU_SECURE instance. */
3483 #define ALT_SMMU_SECURE_SMMU_SMR34_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR34_OFST))
3484 /* The address of the ALT_SMMU_SECURE_SMMU_SMR35 register for the ALT_SMMU_SECURE instance. */
3485 #define ALT_SMMU_SECURE_SMMU_SMR35_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR35_OFST))
3486 /* The address of the ALT_SMMU_SECURE_SMMU_SMR36 register for the ALT_SMMU_SECURE instance. */
3487 #define ALT_SMMU_SECURE_SMMU_SMR36_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR36_OFST))
3488 /* The address of the ALT_SMMU_SECURE_SMMU_SMR37 register for the ALT_SMMU_SECURE instance. */
3489 #define ALT_SMMU_SECURE_SMMU_SMR37_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR37_OFST))
3490 /* The address of the ALT_SMMU_SECURE_SMMU_SMR38 register for the ALT_SMMU_SECURE instance. */
3491 #define ALT_SMMU_SECURE_SMMU_SMR38_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR38_OFST))
3492 /* The address of the ALT_SMMU_SECURE_SMMU_SMR39 register for the ALT_SMMU_SECURE instance. */
3493 #define ALT_SMMU_SECURE_SMMU_SMR39_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR39_OFST))
3494 /* The address of the ALT_SMMU_SECURE_SMMU_SMR40 register for the ALT_SMMU_SECURE instance. */
3495 #define ALT_SMMU_SECURE_SMMU_SMR40_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR40_OFST))
3496 /* The address of the ALT_SMMU_SECURE_SMMU_SMR41 register for the ALT_SMMU_SECURE instance. */
3497 #define ALT_SMMU_SECURE_SMMU_SMR41_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR41_OFST))
3498 /* The address of the ALT_SMMU_SECURE_SMMU_SMR42 register for the ALT_SMMU_SECURE instance. */
3499 #define ALT_SMMU_SECURE_SMMU_SMR42_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR42_OFST))
3500 /* The address of the ALT_SMMU_SECURE_SMMU_SMR43 register for the ALT_SMMU_SECURE instance. */
3501 #define ALT_SMMU_SECURE_SMMU_SMR43_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR43_OFST))
3502 /* The address of the ALT_SMMU_SECURE_SMMU_SMR44 register for the ALT_SMMU_SECURE instance. */
3503 #define ALT_SMMU_SECURE_SMMU_SMR44_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR44_OFST))
3504 /* The address of the ALT_SMMU_SECURE_SMMU_SMR45 register for the ALT_SMMU_SECURE instance. */
3505 #define ALT_SMMU_SECURE_SMMU_SMR45_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR45_OFST))
3506 /* The address of the ALT_SMMU_SECURE_SMMU_SMR46 register for the ALT_SMMU_SECURE instance. */
3507 #define ALT_SMMU_SECURE_SMMU_SMR46_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR46_OFST))
3508 /* The address of the ALT_SMMU_SECURE_SMMU_SMR47 register for the ALT_SMMU_SECURE instance. */
3509 #define ALT_SMMU_SECURE_SMMU_SMR47_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR47_OFST))
3510 /* The address of the ALT_SMMU_SECURE_SMMU_SMR48 register for the ALT_SMMU_SECURE instance. */
3511 #define ALT_SMMU_SECURE_SMMU_SMR48_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR48_OFST))
3512 /* The address of the ALT_SMMU_SECURE_SMMU_SMR49 register for the ALT_SMMU_SECURE instance. */
3513 #define ALT_SMMU_SECURE_SMMU_SMR49_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR49_OFST))
3514 /* The address of the ALT_SMMU_SECURE_SMMU_SMR50 register for the ALT_SMMU_SECURE instance. */
3515 #define ALT_SMMU_SECURE_SMMU_SMR50_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR50_OFST))
3516 /* The address of the ALT_SMMU_SECURE_SMMU_SMR51 register for the ALT_SMMU_SECURE instance. */
3517 #define ALT_SMMU_SECURE_SMMU_SMR51_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR51_OFST))
3518 /* The address of the ALT_SMMU_SECURE_SMMU_SMR52 register for the ALT_SMMU_SECURE instance. */
3519 #define ALT_SMMU_SECURE_SMMU_SMR52_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR52_OFST))
3520 /* The address of the ALT_SMMU_SECURE_SMMU_SMR53 register for the ALT_SMMU_SECURE instance. */
3521 #define ALT_SMMU_SECURE_SMMU_SMR53_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR53_OFST))
3522 /* The address of the ALT_SMMU_SECURE_SMMU_SMR54 register for the ALT_SMMU_SECURE instance. */
3523 #define ALT_SMMU_SECURE_SMMU_SMR54_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR54_OFST))
3524 /* The address of the ALT_SMMU_SECURE_SMMU_SMR55 register for the ALT_SMMU_SECURE instance. */
3525 #define ALT_SMMU_SECURE_SMMU_SMR55_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR55_OFST))
3526 /* The address of the ALT_SMMU_SECURE_SMMU_SMR56 register for the ALT_SMMU_SECURE instance. */
3527 #define ALT_SMMU_SECURE_SMMU_SMR56_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR56_OFST))
3528 /* The address of the ALT_SMMU_SECURE_SMMU_SMR57 register for the ALT_SMMU_SECURE instance. */
3529 #define ALT_SMMU_SECURE_SMMU_SMR57_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR57_OFST))
3530 /* The address of the ALT_SMMU_SECURE_SMMU_SMR58 register for the ALT_SMMU_SECURE instance. */
3531 #define ALT_SMMU_SECURE_SMMU_SMR58_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR58_OFST))
3532 /* The address of the ALT_SMMU_SECURE_SMMU_SMR59 register for the ALT_SMMU_SECURE instance. */
3533 #define ALT_SMMU_SECURE_SMMU_SMR59_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR59_OFST))
3534 /* The address of the ALT_SMMU_SECURE_SMMU_SMR60 register for the ALT_SMMU_SECURE instance. */
3535 #define ALT_SMMU_SECURE_SMMU_SMR60_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR60_OFST))
3536 /* The address of the ALT_SMMU_SECURE_SMMU_SMR61 register for the ALT_SMMU_SECURE instance. */
3537 #define ALT_SMMU_SECURE_SMMU_SMR61_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR61_OFST))
3538 /* The address of the ALT_SMMU_SECURE_SMMU_SMR62 register for the ALT_SMMU_SECURE instance. */
3539 #define ALT_SMMU_SECURE_SMMU_SMR62_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR62_OFST))
3540 /* The address of the ALT_SMMU_SECURE_SMMU_SMR63 register for the ALT_SMMU_SECURE instance. */
3541 #define ALT_SMMU_SECURE_SMMU_SMR63_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SMR63_OFST))
3542 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR0 register for the ALT_SMMU_SECURE instance. */
3543 #define ALT_SMMU_SECURE_SMMU_S2CR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR0_OFST))
3544 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR1 register for the ALT_SMMU_SECURE instance. */
3545 #define ALT_SMMU_SECURE_SMMU_S2CR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR1_OFST))
3546 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR2 register for the ALT_SMMU_SECURE instance. */
3547 #define ALT_SMMU_SECURE_SMMU_S2CR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR2_OFST))
3548 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR3 register for the ALT_SMMU_SECURE instance. */
3549 #define ALT_SMMU_SECURE_SMMU_S2CR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR3_OFST))
3550 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR4 register for the ALT_SMMU_SECURE instance. */
3551 #define ALT_SMMU_SECURE_SMMU_S2CR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR4_OFST))
3552 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR5 register for the ALT_SMMU_SECURE instance. */
3553 #define ALT_SMMU_SECURE_SMMU_S2CR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR5_OFST))
3554 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR6 register for the ALT_SMMU_SECURE instance. */
3555 #define ALT_SMMU_SECURE_SMMU_S2CR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR6_OFST))
3556 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR7 register for the ALT_SMMU_SECURE instance. */
3557 #define ALT_SMMU_SECURE_SMMU_S2CR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR7_OFST))
3558 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR8 register for the ALT_SMMU_SECURE instance. */
3559 #define ALT_SMMU_SECURE_SMMU_S2CR8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR8_OFST))
3560 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR9 register for the ALT_SMMU_SECURE instance. */
3561 #define ALT_SMMU_SECURE_SMMU_S2CR9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR9_OFST))
3562 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR10 register for the ALT_SMMU_SECURE instance. */
3563 #define ALT_SMMU_SECURE_SMMU_S2CR10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR10_OFST))
3564 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR11 register for the ALT_SMMU_SECURE instance. */
3565 #define ALT_SMMU_SECURE_SMMU_S2CR11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR11_OFST))
3566 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR12 register for the ALT_SMMU_SECURE instance. */
3567 #define ALT_SMMU_SECURE_SMMU_S2CR12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR12_OFST))
3568 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR13 register for the ALT_SMMU_SECURE instance. */
3569 #define ALT_SMMU_SECURE_SMMU_S2CR13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR13_OFST))
3570 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR14 register for the ALT_SMMU_SECURE instance. */
3571 #define ALT_SMMU_SECURE_SMMU_S2CR14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR14_OFST))
3572 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR15 register for the ALT_SMMU_SECURE instance. */
3573 #define ALT_SMMU_SECURE_SMMU_S2CR15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR15_OFST))
3574 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR16 register for the ALT_SMMU_SECURE instance. */
3575 #define ALT_SMMU_SECURE_SMMU_S2CR16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR16_OFST))
3576 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR17 register for the ALT_SMMU_SECURE instance. */
3577 #define ALT_SMMU_SECURE_SMMU_S2CR17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR17_OFST))
3578 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR18 register for the ALT_SMMU_SECURE instance. */
3579 #define ALT_SMMU_SECURE_SMMU_S2CR18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR18_OFST))
3580 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR19 register for the ALT_SMMU_SECURE instance. */
3581 #define ALT_SMMU_SECURE_SMMU_S2CR19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR19_OFST))
3582 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR20 register for the ALT_SMMU_SECURE instance. */
3583 #define ALT_SMMU_SECURE_SMMU_S2CR20_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR20_OFST))
3584 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR21 register for the ALT_SMMU_SECURE instance. */
3585 #define ALT_SMMU_SECURE_SMMU_S2CR21_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR21_OFST))
3586 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR22 register for the ALT_SMMU_SECURE instance. */
3587 #define ALT_SMMU_SECURE_SMMU_S2CR22_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR22_OFST))
3588 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR23 register for the ALT_SMMU_SECURE instance. */
3589 #define ALT_SMMU_SECURE_SMMU_S2CR23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR23_OFST))
3590 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR24 register for the ALT_SMMU_SECURE instance. */
3591 #define ALT_SMMU_SECURE_SMMU_S2CR24_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR24_OFST))
3592 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR25 register for the ALT_SMMU_SECURE instance. */
3593 #define ALT_SMMU_SECURE_SMMU_S2CR25_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR25_OFST))
3594 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR26 register for the ALT_SMMU_SECURE instance. */
3595 #define ALT_SMMU_SECURE_SMMU_S2CR26_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR26_OFST))
3596 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR27 register for the ALT_SMMU_SECURE instance. */
3597 #define ALT_SMMU_SECURE_SMMU_S2CR27_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR27_OFST))
3598 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR28 register for the ALT_SMMU_SECURE instance. */
3599 #define ALT_SMMU_SECURE_SMMU_S2CR28_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR28_OFST))
3600 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR29 register for the ALT_SMMU_SECURE instance. */
3601 #define ALT_SMMU_SECURE_SMMU_S2CR29_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR29_OFST))
3602 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR30 register for the ALT_SMMU_SECURE instance. */
3603 #define ALT_SMMU_SECURE_SMMU_S2CR30_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR30_OFST))
3604 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR31 register for the ALT_SMMU_SECURE instance. */
3605 #define ALT_SMMU_SECURE_SMMU_S2CR31_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR31_OFST))
3606 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR32 register for the ALT_SMMU_SECURE instance. */
3607 #define ALT_SMMU_SECURE_SMMU_S2CR32_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR32_OFST))
3608 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR33 register for the ALT_SMMU_SECURE instance. */
3609 #define ALT_SMMU_SECURE_SMMU_S2CR33_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR33_OFST))
3610 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR34 register for the ALT_SMMU_SECURE instance. */
3611 #define ALT_SMMU_SECURE_SMMU_S2CR34_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR34_OFST))
3612 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR35 register for the ALT_SMMU_SECURE instance. */
3613 #define ALT_SMMU_SECURE_SMMU_S2CR35_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR35_OFST))
3614 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR36 register for the ALT_SMMU_SECURE instance. */
3615 #define ALT_SMMU_SECURE_SMMU_S2CR36_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR36_OFST))
3616 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR37 register for the ALT_SMMU_SECURE instance. */
3617 #define ALT_SMMU_SECURE_SMMU_S2CR37_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR37_OFST))
3618 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR38 register for the ALT_SMMU_SECURE instance. */
3619 #define ALT_SMMU_SECURE_SMMU_S2CR38_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR38_OFST))
3620 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR39 register for the ALT_SMMU_SECURE instance. */
3621 #define ALT_SMMU_SECURE_SMMU_S2CR39_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR39_OFST))
3622 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR40 register for the ALT_SMMU_SECURE instance. */
3623 #define ALT_SMMU_SECURE_SMMU_S2CR40_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR40_OFST))
3624 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR41 register for the ALT_SMMU_SECURE instance. */
3625 #define ALT_SMMU_SECURE_SMMU_S2CR41_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR41_OFST))
3626 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR42 register for the ALT_SMMU_SECURE instance. */
3627 #define ALT_SMMU_SECURE_SMMU_S2CR42_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR42_OFST))
3628 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR43 register for the ALT_SMMU_SECURE instance. */
3629 #define ALT_SMMU_SECURE_SMMU_S2CR43_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR43_OFST))
3630 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR44 register for the ALT_SMMU_SECURE instance. */
3631 #define ALT_SMMU_SECURE_SMMU_S2CR44_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR44_OFST))
3632 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR45 register for the ALT_SMMU_SECURE instance. */
3633 #define ALT_SMMU_SECURE_SMMU_S2CR45_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR45_OFST))
3634 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR46 register for the ALT_SMMU_SECURE instance. */
3635 #define ALT_SMMU_SECURE_SMMU_S2CR46_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR46_OFST))
3636 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR47 register for the ALT_SMMU_SECURE instance. */
3637 #define ALT_SMMU_SECURE_SMMU_S2CR47_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR47_OFST))
3638 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR48 register for the ALT_SMMU_SECURE instance. */
3639 #define ALT_SMMU_SECURE_SMMU_S2CR48_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR48_OFST))
3640 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR49 register for the ALT_SMMU_SECURE instance. */
3641 #define ALT_SMMU_SECURE_SMMU_S2CR49_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR49_OFST))
3642 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR50 register for the ALT_SMMU_SECURE instance. */
3643 #define ALT_SMMU_SECURE_SMMU_S2CR50_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR50_OFST))
3644 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR51 register for the ALT_SMMU_SECURE instance. */
3645 #define ALT_SMMU_SECURE_SMMU_S2CR51_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR51_OFST))
3646 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR52 register for the ALT_SMMU_SECURE instance. */
3647 #define ALT_SMMU_SECURE_SMMU_S2CR52_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR52_OFST))
3648 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR53 register for the ALT_SMMU_SECURE instance. */
3649 #define ALT_SMMU_SECURE_SMMU_S2CR53_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR53_OFST))
3650 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR54 register for the ALT_SMMU_SECURE instance. */
3651 #define ALT_SMMU_SECURE_SMMU_S2CR54_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR54_OFST))
3652 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR55 register for the ALT_SMMU_SECURE instance. */
3653 #define ALT_SMMU_SECURE_SMMU_S2CR55_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR55_OFST))
3654 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR56 register for the ALT_SMMU_SECURE instance. */
3655 #define ALT_SMMU_SECURE_SMMU_S2CR56_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR56_OFST))
3656 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR57 register for the ALT_SMMU_SECURE instance. */
3657 #define ALT_SMMU_SECURE_SMMU_S2CR57_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR57_OFST))
3658 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR58 register for the ALT_SMMU_SECURE instance. */
3659 #define ALT_SMMU_SECURE_SMMU_S2CR58_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR58_OFST))
3660 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR59 register for the ALT_SMMU_SECURE instance. */
3661 #define ALT_SMMU_SECURE_SMMU_S2CR59_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR59_OFST))
3662 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR60 register for the ALT_SMMU_SECURE instance. */
3663 #define ALT_SMMU_SECURE_SMMU_S2CR60_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR60_OFST))
3664 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR61 register for the ALT_SMMU_SECURE instance. */
3665 #define ALT_SMMU_SECURE_SMMU_S2CR61_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR61_OFST))
3666 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR62 register for the ALT_SMMU_SECURE instance. */
3667 #define ALT_SMMU_SECURE_SMMU_S2CR62_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR62_OFST))
3668 /* The address of the ALT_SMMU_SECURE_SMMU_S2CR63 register for the ALT_SMMU_SECURE instance. */
3669 #define ALT_SMMU_SECURE_SMMU_S2CR63_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_S2CR63_OFST))
3670 /* The address of the ALT_SMMU_SECURE_SMMU_PIDR4 register for the ALT_SMMU_SECURE instance. */
3671 #define ALT_SMMU_SECURE_SMMU_PIDR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_PIDR4_OFST))
3672 /* The address of the ALT_SMMU_SECURE_SMMU_PIDR5 register for the ALT_SMMU_SECURE instance. */
3673 #define ALT_SMMU_SECURE_SMMU_PIDR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_PIDR5_OFST))
3674 /* The address of the ALT_SMMU_SECURE_SMMU_PIDR6 register for the ALT_SMMU_SECURE instance. */
3675 #define ALT_SMMU_SECURE_SMMU_PIDR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_PIDR6_OFST))
3676 /* The address of the ALT_SMMU_SECURE_SMMU_PIDR7 register for the ALT_SMMU_SECURE instance. */
3677 #define ALT_SMMU_SECURE_SMMU_PIDR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_PIDR7_OFST))
3678 /* The address of the ALT_SMMU_SECURE_SMMU_PIDR0 register for the ALT_SMMU_SECURE instance. */
3679 #define ALT_SMMU_SECURE_SMMU_PIDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_PIDR0_OFST))
3680 /* The address of the ALT_SMMU_SECURE_SMMU_PIDR1 register for the ALT_SMMU_SECURE instance. */
3681 #define ALT_SMMU_SECURE_SMMU_PIDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_PIDR1_OFST))
3682 /* The address of the ALT_SMMU_SECURE_SMMU_PIDR2 register for the ALT_SMMU_SECURE instance. */
3683 #define ALT_SMMU_SECURE_SMMU_PIDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_PIDR2_OFST))
3684 /* The address of the ALT_SMMU_SECURE_SMMU_PIDR3 register for the ALT_SMMU_SECURE instance. */
3685 #define ALT_SMMU_SECURE_SMMU_PIDR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_PIDR3_OFST))
3686 /* The address of the ALT_SMMU_SECURE_SMMU_CIDR0 register for the ALT_SMMU_SECURE instance. */
3687 #define ALT_SMMU_SECURE_SMMU_CIDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CIDR0_OFST))
3688 /* The address of the ALT_SMMU_SECURE_SMMU_CIDR1 register for the ALT_SMMU_SECURE instance. */
3689 #define ALT_SMMU_SECURE_SMMU_CIDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CIDR1_OFST))
3690 /* The address of the ALT_SMMU_SECURE_SMMU_CIDR2 register for the ALT_SMMU_SECURE instance. */
3691 #define ALT_SMMU_SECURE_SMMU_CIDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CIDR2_OFST))
3692 /* The address of the ALT_SMMU_SECURE_SMMU_CIDR3 register for the ALT_SMMU_SECURE instance. */
3693 #define ALT_SMMU_SECURE_SMMU_CIDR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CIDR3_OFST))
3694 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR0 register for the ALT_SMMU_SECURE instance. */
3695 #define ALT_SMMU_SECURE_SMMU_CBAR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR0_OFST))
3696 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR1 register for the ALT_SMMU_SECURE instance. */
3697 #define ALT_SMMU_SECURE_SMMU_CBAR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR1_OFST))
3698 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR2 register for the ALT_SMMU_SECURE instance. */
3699 #define ALT_SMMU_SECURE_SMMU_CBAR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR2_OFST))
3700 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR3 register for the ALT_SMMU_SECURE instance. */
3701 #define ALT_SMMU_SECURE_SMMU_CBAR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR3_OFST))
3702 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR4 register for the ALT_SMMU_SECURE instance. */
3703 #define ALT_SMMU_SECURE_SMMU_CBAR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR4_OFST))
3704 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR5 register for the ALT_SMMU_SECURE instance. */
3705 #define ALT_SMMU_SECURE_SMMU_CBAR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR5_OFST))
3706 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR6 register for the ALT_SMMU_SECURE instance. */
3707 #define ALT_SMMU_SECURE_SMMU_CBAR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR6_OFST))
3708 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR7 register for the ALT_SMMU_SECURE instance. */
3709 #define ALT_SMMU_SECURE_SMMU_CBAR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR7_OFST))
3710 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR8 register for the ALT_SMMU_SECURE instance. */
3711 #define ALT_SMMU_SECURE_SMMU_CBAR8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR8_OFST))
3712 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR9 register for the ALT_SMMU_SECURE instance. */
3713 #define ALT_SMMU_SECURE_SMMU_CBAR9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR9_OFST))
3714 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR10 register for the ALT_SMMU_SECURE instance. */
3715 #define ALT_SMMU_SECURE_SMMU_CBAR10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR10_OFST))
3716 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR11 register for the ALT_SMMU_SECURE instance. */
3717 #define ALT_SMMU_SECURE_SMMU_CBAR11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR11_OFST))
3718 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR12 register for the ALT_SMMU_SECURE instance. */
3719 #define ALT_SMMU_SECURE_SMMU_CBAR12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR12_OFST))
3720 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR13 register for the ALT_SMMU_SECURE instance. */
3721 #define ALT_SMMU_SECURE_SMMU_CBAR13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR13_OFST))
3722 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR14 register for the ALT_SMMU_SECURE instance. */
3723 #define ALT_SMMU_SECURE_SMMU_CBAR14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR14_OFST))
3724 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR15 register for the ALT_SMMU_SECURE instance. */
3725 #define ALT_SMMU_SECURE_SMMU_CBAR15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR15_OFST))
3726 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR16 register for the ALT_SMMU_SECURE instance. */
3727 #define ALT_SMMU_SECURE_SMMU_CBAR16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR16_OFST))
3728 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR17 register for the ALT_SMMU_SECURE instance. */
3729 #define ALT_SMMU_SECURE_SMMU_CBAR17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR17_OFST))
3730 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR18 register for the ALT_SMMU_SECURE instance. */
3731 #define ALT_SMMU_SECURE_SMMU_CBAR18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR18_OFST))
3732 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR19 register for the ALT_SMMU_SECURE instance. */
3733 #define ALT_SMMU_SECURE_SMMU_CBAR19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR19_OFST))
3734 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR20 register for the ALT_SMMU_SECURE instance. */
3735 #define ALT_SMMU_SECURE_SMMU_CBAR20_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR20_OFST))
3736 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR21 register for the ALT_SMMU_SECURE instance. */
3737 #define ALT_SMMU_SECURE_SMMU_CBAR21_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR21_OFST))
3738 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR22 register for the ALT_SMMU_SECURE instance. */
3739 #define ALT_SMMU_SECURE_SMMU_CBAR22_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR22_OFST))
3740 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR23 register for the ALT_SMMU_SECURE instance. */
3741 #define ALT_SMMU_SECURE_SMMU_CBAR23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR23_OFST))
3742 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR24 register for the ALT_SMMU_SECURE instance. */
3743 #define ALT_SMMU_SECURE_SMMU_CBAR24_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR24_OFST))
3744 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR25 register for the ALT_SMMU_SECURE instance. */
3745 #define ALT_SMMU_SECURE_SMMU_CBAR25_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR25_OFST))
3746 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR26 register for the ALT_SMMU_SECURE instance. */
3747 #define ALT_SMMU_SECURE_SMMU_CBAR26_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR26_OFST))
3748 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR27 register for the ALT_SMMU_SECURE instance. */
3749 #define ALT_SMMU_SECURE_SMMU_CBAR27_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR27_OFST))
3750 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR28 register for the ALT_SMMU_SECURE instance. */
3751 #define ALT_SMMU_SECURE_SMMU_CBAR28_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR28_OFST))
3752 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR29 register for the ALT_SMMU_SECURE instance. */
3753 #define ALT_SMMU_SECURE_SMMU_CBAR29_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR29_OFST))
3754 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR30 register for the ALT_SMMU_SECURE instance. */
3755 #define ALT_SMMU_SECURE_SMMU_CBAR30_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR30_OFST))
3756 /* The address of the ALT_SMMU_SECURE_SMMU_CBAR31 register for the ALT_SMMU_SECURE instance. */
3757 #define ALT_SMMU_SECURE_SMMU_CBAR31_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBAR31_OFST))
3758 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA0 register for the ALT_SMMU_SECURE instance. */
3759 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA0_OFST))
3760 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA1 register for the ALT_SMMU_SECURE instance. */
3761 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA1_OFST))
3762 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA2 register for the ALT_SMMU_SECURE instance. */
3763 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA2_OFST))
3764 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA3 register for the ALT_SMMU_SECURE instance. */
3765 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA3_OFST))
3766 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA4 register for the ALT_SMMU_SECURE instance. */
3767 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA4_OFST))
3768 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA5 register for the ALT_SMMU_SECURE instance. */
3769 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA5_OFST))
3770 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA6 register for the ALT_SMMU_SECURE instance. */
3771 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA6_OFST))
3772 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA7 register for the ALT_SMMU_SECURE instance. */
3773 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA7_OFST))
3774 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA8 register for the ALT_SMMU_SECURE instance. */
3775 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA8_OFST))
3776 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA9 register for the ALT_SMMU_SECURE instance. */
3777 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA9_OFST))
3778 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA10 register for the ALT_SMMU_SECURE instance. */
3779 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA10_OFST))
3780 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA11 register for the ALT_SMMU_SECURE instance. */
3781 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA11_OFST))
3782 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA12 register for the ALT_SMMU_SECURE instance. */
3783 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA12_OFST))
3784 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA13 register for the ALT_SMMU_SECURE instance. */
3785 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA13_OFST))
3786 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA14 register for the ALT_SMMU_SECURE instance. */
3787 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA14_OFST))
3788 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA15 register for the ALT_SMMU_SECURE instance. */
3789 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA15_OFST))
3790 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA16 register for the ALT_SMMU_SECURE instance. */
3791 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA16_OFST))
3792 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA17 register for the ALT_SMMU_SECURE instance. */
3793 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA17_OFST))
3794 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA18 register for the ALT_SMMU_SECURE instance. */
3795 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA18_OFST))
3796 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA19 register for the ALT_SMMU_SECURE instance. */
3797 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA19_OFST))
3798 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA20 register for the ALT_SMMU_SECURE instance. */
3799 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA20_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA20_OFST))
3800 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA21 register for the ALT_SMMU_SECURE instance. */
3801 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA21_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA21_OFST))
3802 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA22 register for the ALT_SMMU_SECURE instance. */
3803 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA22_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA22_OFST))
3804 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA23 register for the ALT_SMMU_SECURE instance. */
3805 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA23_OFST))
3806 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA24 register for the ALT_SMMU_SECURE instance. */
3807 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA24_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA24_OFST))
3808 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA25 register for the ALT_SMMU_SECURE instance. */
3809 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA25_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA25_OFST))
3810 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA26 register for the ALT_SMMU_SECURE instance. */
3811 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA26_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA26_OFST))
3812 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA27 register for the ALT_SMMU_SECURE instance. */
3813 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA27_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA27_OFST))
3814 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA28 register for the ALT_SMMU_SECURE instance. */
3815 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA28_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA28_OFST))
3816 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA29 register for the ALT_SMMU_SECURE instance. */
3817 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA29_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA29_OFST))
3818 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA30 register for the ALT_SMMU_SECURE instance. */
3819 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA30_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA30_OFST))
3820 /* The address of the ALT_SMMU_SECURE_SMMU_CBFRSYNRA31 register for the ALT_SMMU_SECURE instance. */
3821 #define ALT_SMMU_SECURE_SMMU_CBFRSYNRA31_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBFRSYNRA31_OFST))
3822 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R0 register for the ALT_SMMU_SECURE instance. */
3823 #define ALT_SMMU_SECURE_SMMU_CBA2R0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R0_OFST))
3824 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R1 register for the ALT_SMMU_SECURE instance. */
3825 #define ALT_SMMU_SECURE_SMMU_CBA2R1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R1_OFST))
3826 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R2 register for the ALT_SMMU_SECURE instance. */
3827 #define ALT_SMMU_SECURE_SMMU_CBA2R2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R2_OFST))
3828 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R3 register for the ALT_SMMU_SECURE instance. */
3829 #define ALT_SMMU_SECURE_SMMU_CBA2R3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R3_OFST))
3830 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R4 register for the ALT_SMMU_SECURE instance. */
3831 #define ALT_SMMU_SECURE_SMMU_CBA2R4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R4_OFST))
3832 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R5 register for the ALT_SMMU_SECURE instance. */
3833 #define ALT_SMMU_SECURE_SMMU_CBA2R5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R5_OFST))
3834 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R6 register for the ALT_SMMU_SECURE instance. */
3835 #define ALT_SMMU_SECURE_SMMU_CBA2R6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R6_OFST))
3836 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R7 register for the ALT_SMMU_SECURE instance. */
3837 #define ALT_SMMU_SECURE_SMMU_CBA2R7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R7_OFST))
3838 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R8 register for the ALT_SMMU_SECURE instance. */
3839 #define ALT_SMMU_SECURE_SMMU_CBA2R8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R8_OFST))
3840 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R9 register for the ALT_SMMU_SECURE instance. */
3841 #define ALT_SMMU_SECURE_SMMU_CBA2R9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R9_OFST))
3842 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R10 register for the ALT_SMMU_SECURE instance. */
3843 #define ALT_SMMU_SECURE_SMMU_CBA2R10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R10_OFST))
3844 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R11 register for the ALT_SMMU_SECURE instance. */
3845 #define ALT_SMMU_SECURE_SMMU_CBA2R11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R11_OFST))
3846 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R12 register for the ALT_SMMU_SECURE instance. */
3847 #define ALT_SMMU_SECURE_SMMU_CBA2R12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R12_OFST))
3848 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R13 register for the ALT_SMMU_SECURE instance. */
3849 #define ALT_SMMU_SECURE_SMMU_CBA2R13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R13_OFST))
3850 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R14 register for the ALT_SMMU_SECURE instance. */
3851 #define ALT_SMMU_SECURE_SMMU_CBA2R14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R14_OFST))
3852 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R15 register for the ALT_SMMU_SECURE instance. */
3853 #define ALT_SMMU_SECURE_SMMU_CBA2R15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R15_OFST))
3854 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R16 register for the ALT_SMMU_SECURE instance. */
3855 #define ALT_SMMU_SECURE_SMMU_CBA2R16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R16_OFST))
3856 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R17 register for the ALT_SMMU_SECURE instance. */
3857 #define ALT_SMMU_SECURE_SMMU_CBA2R17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R17_OFST))
3858 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R18 register for the ALT_SMMU_SECURE instance. */
3859 #define ALT_SMMU_SECURE_SMMU_CBA2R18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R18_OFST))
3860 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R19 register for the ALT_SMMU_SECURE instance. */
3861 #define ALT_SMMU_SECURE_SMMU_CBA2R19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R19_OFST))
3862 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R20 register for the ALT_SMMU_SECURE instance. */
3863 #define ALT_SMMU_SECURE_SMMU_CBA2R20_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R20_OFST))
3864 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R21 register for the ALT_SMMU_SECURE instance. */
3865 #define ALT_SMMU_SECURE_SMMU_CBA2R21_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R21_OFST))
3866 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R22 register for the ALT_SMMU_SECURE instance. */
3867 #define ALT_SMMU_SECURE_SMMU_CBA2R22_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R22_OFST))
3868 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R23 register for the ALT_SMMU_SECURE instance. */
3869 #define ALT_SMMU_SECURE_SMMU_CBA2R23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R23_OFST))
3870 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R24 register for the ALT_SMMU_SECURE instance. */
3871 #define ALT_SMMU_SECURE_SMMU_CBA2R24_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R24_OFST))
3872 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R25 register for the ALT_SMMU_SECURE instance. */
3873 #define ALT_SMMU_SECURE_SMMU_CBA2R25_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R25_OFST))
3874 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R26 register for the ALT_SMMU_SECURE instance. */
3875 #define ALT_SMMU_SECURE_SMMU_CBA2R26_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R26_OFST))
3876 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R27 register for the ALT_SMMU_SECURE instance. */
3877 #define ALT_SMMU_SECURE_SMMU_CBA2R27_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R27_OFST))
3878 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R28 register for the ALT_SMMU_SECURE instance. */
3879 #define ALT_SMMU_SECURE_SMMU_CBA2R28_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R28_OFST))
3880 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R29 register for the ALT_SMMU_SECURE instance. */
3881 #define ALT_SMMU_SECURE_SMMU_CBA2R29_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R29_OFST))
3882 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R30 register for the ALT_SMMU_SECURE instance. */
3883 #define ALT_SMMU_SECURE_SMMU_CBA2R30_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R30_OFST))
3884 /* The address of the ALT_SMMU_SECURE_SMMU_CBA2R31 register for the ALT_SMMU_SECURE instance. */
3885 #define ALT_SMMU_SECURE_SMMU_CBA2R31_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CBA2R31_OFST))
3886 /* The address of the ALT_SMMU_SECURE_SMMU_ITCTRL register for the ALT_SMMU_SECURE instance. */
3887 #define ALT_SMMU_SECURE_SMMU_ITCTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_ITCTRL_OFST))
3888 /* The address of the ALT_SMMU_SECURE_SMMU_ITIP register for the ALT_SMMU_SECURE instance. */
3889 #define ALT_SMMU_SECURE_SMMU_ITIP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_ITIP_OFST))
3890 /* The address of the ALT_SMMU_SECURE_SMMU_ITOP_GLBL register for the ALT_SMMU_SECURE instance. */
3891 #define ALT_SMMU_SECURE_SMMU_ITOP_GLBL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_ITOP_GLBL_OFST))
3892 /* The address of the ALT_SMMU_SECURE_SMMU_ITOP_PERF_INDEX register for the ALT_SMMU_SECURE instance. */
3893 #define ALT_SMMU_SECURE_SMMU_ITOP_PERF_INDEX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_ITOP_PERF_INDEX_OFST))
3894 /* The address of the ALT_SMMU_SECURE_SMMU_ITOP_CXT0TO31_RAM0 register for the ALT_SMMU_SECURE instance. */
3895 #define ALT_SMMU_SECURE_SMMU_ITOP_CXT0TO31_RAM0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_ITOP_CXT0TO31_RAM0_OFST))
3896 /* The address of the ALT_SMMU_SECURE_SMMU_TBUQOS0 register for the ALT_SMMU_SECURE instance. */
3897 #define ALT_SMMU_SECURE_SMMU_TBUQOS0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_TBUQOS0_OFST))
3898 /* The address of the ALT_SMMU_SECURE_SMMU_PER register for the ALT_SMMU_SECURE instance. */
3899 #define ALT_SMMU_SECURE_SMMU_PER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_PER_OFST))
3900 /* The address of the ALT_SMMU_SECURE_SMMU_TBU_PWR_STATUS register for the ALT_SMMU_SECURE instance. */
3901 #define ALT_SMMU_SECURE_SMMU_TBU_PWR_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_TBU_PWR_STATUS_OFST))
3902 /* The address of the ALT_SMMU_SECURE_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
3903 #define ALT_SMMU_SECURE_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR0_OFST))
3904 /* The address of the ALT_SMMU_SECURE_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
3905 #define ALT_SMMU_SECURE_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR1_OFST))
3906 /* The address of the ALT_SMMU_SECURE_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
3907 #define ALT_SMMU_SECURE_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR2_OFST))
3908 /* The address of the ALT_SMMU_SECURE_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
3909 #define ALT_SMMU_SECURE_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR3_OFST))
3910 /* The address of the ALT_SMMU_SECURE_PMEVCNTR4 register for the ALT_SMMU_SECURE instance. */
3911 #define ALT_SMMU_SECURE_PMEVCNTR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR4_OFST))
3912 /* The address of the ALT_SMMU_SECURE_PMEVCNTR5 register for the ALT_SMMU_SECURE instance. */
3913 #define ALT_SMMU_SECURE_PMEVCNTR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR5_OFST))
3914 /* The address of the ALT_SMMU_SECURE_PMEVCNTR6 register for the ALT_SMMU_SECURE instance. */
3915 #define ALT_SMMU_SECURE_PMEVCNTR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR6_OFST))
3916 /* The address of the ALT_SMMU_SECURE_PMEVCNTR7 register for the ALT_SMMU_SECURE instance. */
3917 #define ALT_SMMU_SECURE_PMEVCNTR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR7_OFST))
3918 /* The address of the ALT_SMMU_SECURE_PMEVCNTR8 register for the ALT_SMMU_SECURE instance. */
3919 #define ALT_SMMU_SECURE_PMEVCNTR8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR8_OFST))
3920 /* The address of the ALT_SMMU_SECURE_PMEVCNTR9 register for the ALT_SMMU_SECURE instance. */
3921 #define ALT_SMMU_SECURE_PMEVCNTR9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR9_OFST))
3922 /* The address of the ALT_SMMU_SECURE_PMEVCNTR10 register for the ALT_SMMU_SECURE instance. */
3923 #define ALT_SMMU_SECURE_PMEVCNTR10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR10_OFST))
3924 /* The address of the ALT_SMMU_SECURE_PMEVCNTR11 register for the ALT_SMMU_SECURE instance. */
3925 #define ALT_SMMU_SECURE_PMEVCNTR11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR11_OFST))
3926 /* The address of the ALT_SMMU_SECURE_PMEVCNTR12 register for the ALT_SMMU_SECURE instance. */
3927 #define ALT_SMMU_SECURE_PMEVCNTR12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR12_OFST))
3928 /* The address of the ALT_SMMU_SECURE_PMEVCNTR13 register for the ALT_SMMU_SECURE instance. */
3929 #define ALT_SMMU_SECURE_PMEVCNTR13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR13_OFST))
3930 /* The address of the ALT_SMMU_SECURE_PMEVCNTR14 register for the ALT_SMMU_SECURE instance. */
3931 #define ALT_SMMU_SECURE_PMEVCNTR14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR14_OFST))
3932 /* The address of the ALT_SMMU_SECURE_PMEVCNTR15 register for the ALT_SMMU_SECURE instance. */
3933 #define ALT_SMMU_SECURE_PMEVCNTR15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR15_OFST))
3934 /* The address of the ALT_SMMU_SECURE_PMEVCNTR16 register for the ALT_SMMU_SECURE instance. */
3935 #define ALT_SMMU_SECURE_PMEVCNTR16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR16_OFST))
3936 /* The address of the ALT_SMMU_SECURE_PMEVCNTR17 register for the ALT_SMMU_SECURE instance. */
3937 #define ALT_SMMU_SECURE_PMEVCNTR17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR17_OFST))
3938 /* The address of the ALT_SMMU_SECURE_PMEVCNTR18 register for the ALT_SMMU_SECURE instance. */
3939 #define ALT_SMMU_SECURE_PMEVCNTR18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR18_OFST))
3940 /* The address of the ALT_SMMU_SECURE_PMEVCNTR19 register for the ALT_SMMU_SECURE instance. */
3941 #define ALT_SMMU_SECURE_PMEVCNTR19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVCNTR19_OFST))
3942 /* The address of the ALT_SMMU_SECURE_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
3943 #define ALT_SMMU_SECURE_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER0_OFST))
3944 /* The address of the ALT_SMMU_SECURE_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
3945 #define ALT_SMMU_SECURE_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER1_OFST))
3946 /* The address of the ALT_SMMU_SECURE_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
3947 #define ALT_SMMU_SECURE_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER2_OFST))
3948 /* The address of the ALT_SMMU_SECURE_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
3949 #define ALT_SMMU_SECURE_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER3_OFST))
3950 /* The address of the ALT_SMMU_SECURE_PMEVTYPER4 register for the ALT_SMMU_SECURE instance. */
3951 #define ALT_SMMU_SECURE_PMEVTYPER4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER4_OFST))
3952 /* The address of the ALT_SMMU_SECURE_PMEVTYPER5 register for the ALT_SMMU_SECURE instance. */
3953 #define ALT_SMMU_SECURE_PMEVTYPER5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER5_OFST))
3954 /* The address of the ALT_SMMU_SECURE_PMEVTYPER6 register for the ALT_SMMU_SECURE instance. */
3955 #define ALT_SMMU_SECURE_PMEVTYPER6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER6_OFST))
3956 /* The address of the ALT_SMMU_SECURE_PMEVTYPER7 register for the ALT_SMMU_SECURE instance. */
3957 #define ALT_SMMU_SECURE_PMEVTYPER7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER7_OFST))
3958 /* The address of the ALT_SMMU_SECURE_PMEVTYPER8 register for the ALT_SMMU_SECURE instance. */
3959 #define ALT_SMMU_SECURE_PMEVTYPER8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER8_OFST))
3960 /* The address of the ALT_SMMU_SECURE_PMEVTYPER9 register for the ALT_SMMU_SECURE instance. */
3961 #define ALT_SMMU_SECURE_PMEVTYPER9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER9_OFST))
3962 /* The address of the ALT_SMMU_SECURE_PMEVTYPER10 register for the ALT_SMMU_SECURE instance. */
3963 #define ALT_SMMU_SECURE_PMEVTYPER10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER10_OFST))
3964 /* The address of the ALT_SMMU_SECURE_PMEVTYPER11 register for the ALT_SMMU_SECURE instance. */
3965 #define ALT_SMMU_SECURE_PMEVTYPER11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER11_OFST))
3966 /* The address of the ALT_SMMU_SECURE_PMEVTYPER12 register for the ALT_SMMU_SECURE instance. */
3967 #define ALT_SMMU_SECURE_PMEVTYPER12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER12_OFST))
3968 /* The address of the ALT_SMMU_SECURE_PMEVTYPER13 register for the ALT_SMMU_SECURE instance. */
3969 #define ALT_SMMU_SECURE_PMEVTYPER13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER13_OFST))
3970 /* The address of the ALT_SMMU_SECURE_PMEVTYPER14 register for the ALT_SMMU_SECURE instance. */
3971 #define ALT_SMMU_SECURE_PMEVTYPER14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER14_OFST))
3972 /* The address of the ALT_SMMU_SECURE_PMEVTYPER15 register for the ALT_SMMU_SECURE instance. */
3973 #define ALT_SMMU_SECURE_PMEVTYPER15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER15_OFST))
3974 /* The address of the ALT_SMMU_SECURE_PMEVTYPER16 register for the ALT_SMMU_SECURE instance. */
3975 #define ALT_SMMU_SECURE_PMEVTYPER16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER16_OFST))
3976 /* The address of the ALT_SMMU_SECURE_PMEVTYPER17 register for the ALT_SMMU_SECURE instance. */
3977 #define ALT_SMMU_SECURE_PMEVTYPER17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER17_OFST))
3978 /* The address of the ALT_SMMU_SECURE_PMEVTYPER18 register for the ALT_SMMU_SECURE instance. */
3979 #define ALT_SMMU_SECURE_PMEVTYPER18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER18_OFST))
3980 /* The address of the ALT_SMMU_SECURE_PMEVTYPER19 register for the ALT_SMMU_SECURE instance. */
3981 #define ALT_SMMU_SECURE_PMEVTYPER19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMEVTYPER19_OFST))
3982 /* The address of the ALT_SMMU_SECURE_PMCGCR0 register for the ALT_SMMU_SECURE instance. */
3983 #define ALT_SMMU_SECURE_PMCGCR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCGCR0_OFST))
3984 /* The address of the ALT_SMMU_SECURE_PMCGCR1 register for the ALT_SMMU_SECURE instance. */
3985 #define ALT_SMMU_SECURE_PMCGCR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCGCR1_OFST))
3986 /* The address of the ALT_SMMU_SECURE_PMCGCR2 register for the ALT_SMMU_SECURE instance. */
3987 #define ALT_SMMU_SECURE_PMCGCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCGCR2_OFST))
3988 /* The address of the ALT_SMMU_SECURE_PMCGCR3 register for the ALT_SMMU_SECURE instance. */
3989 #define ALT_SMMU_SECURE_PMCGCR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCGCR3_OFST))
3990 /* The address of the ALT_SMMU_SECURE_PMCGCR4 register for the ALT_SMMU_SECURE instance. */
3991 #define ALT_SMMU_SECURE_PMCGCR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCGCR4_OFST))
3992 /* The address of the ALT_SMMU_SECURE_PMCGSMR0 register for the ALT_SMMU_SECURE instance. */
3993 #define ALT_SMMU_SECURE_PMCGSMR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCGSMR0_OFST))
3994 /* The address of the ALT_SMMU_SECURE_PMCGSMR1 register for the ALT_SMMU_SECURE instance. */
3995 #define ALT_SMMU_SECURE_PMCGSMR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCGSMR1_OFST))
3996 /* The address of the ALT_SMMU_SECURE_PMCGSMR2 register for the ALT_SMMU_SECURE instance. */
3997 #define ALT_SMMU_SECURE_PMCGSMR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCGSMR2_OFST))
3998 /* The address of the ALT_SMMU_SECURE_PMCGSMR3 register for the ALT_SMMU_SECURE instance. */
3999 #define ALT_SMMU_SECURE_PMCGSMR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCGSMR3_OFST))
4000 /* The address of the ALT_SMMU_SECURE_PMCGSMR4 register for the ALT_SMMU_SECURE instance. */
4001 #define ALT_SMMU_SECURE_PMCGSMR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCGSMR4_OFST))
4002 /* The address of the ALT_SMMU_SECURE_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
4003 #define ALT_SMMU_SECURE_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCNTENSET_OFST))
4004 /* The address of the ALT_SMMU_SECURE_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
4005 #define ALT_SMMU_SECURE_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCNTENCLR_OFST))
4006 /* The address of the ALT_SMMU_SECURE_PMINTENSET register for the ALT_SMMU_SECURE instance. */
4007 #define ALT_SMMU_SECURE_PMINTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMINTENSET_OFST))
4008 /* The address of the ALT_SMMU_SECURE_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
4009 #define ALT_SMMU_SECURE_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMINTENCLR_OFST))
4010 /* The address of the ALT_SMMU_SECURE_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
4011 #define ALT_SMMU_SECURE_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMOVSCLR_OFST))
4012 /* The address of the ALT_SMMU_SECURE_PMOVSSET register for the ALT_SMMU_SECURE instance. */
4013 #define ALT_SMMU_SECURE_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMOVSSET_OFST))
4014 /* The address of the ALT_SMMU_SECURE_PMCFGR register for the ALT_SMMU_SECURE instance. */
4015 #define ALT_SMMU_SECURE_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCFGR_OFST))
4016 /* The address of the ALT_SMMU_SECURE_PMCR register for the ALT_SMMU_SECURE instance. */
4017 #define ALT_SMMU_SECURE_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCR_OFST))
4018 /* The address of the ALT_SMMU_SECURE_PMCEID0 register for the ALT_SMMU_SECURE instance. */
4019 #define ALT_SMMU_SECURE_PMCEID0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMCEID0_OFST))
4020 /* The address of the ALT_SMMU_SECURE_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
4021 #define ALT_SMMU_SECURE_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMAUTHSTATUS_OFST))
4022 /* The address of the ALT_SMMU_SECURE_PMDEVTYPE register for the ALT_SMMU_SECURE instance. */
4023 #define ALT_SMMU_SECURE_PMDEVTYPE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_PMDEVTYPE_OFST))
4024 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_0 register for the ALT_SMMU_SECURE instance. */
4025 #define ALT_SMMU_SECURE_SMMU_SSD_REG_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_0_OFST))
4026 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1 register for the ALT_SMMU_SECURE instance. */
4027 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1_OFST))
4028 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_2 register for the ALT_SMMU_SECURE instance. */
4029 #define ALT_SMMU_SECURE_SMMU_SSD_REG_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_2_OFST))
4030 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_3 register for the ALT_SMMU_SECURE instance. */
4031 #define ALT_SMMU_SECURE_SMMU_SSD_REG_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_3_OFST))
4032 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_4 register for the ALT_SMMU_SECURE instance. */
4033 #define ALT_SMMU_SECURE_SMMU_SSD_REG_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_4_OFST))
4034 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_5 register for the ALT_SMMU_SECURE instance. */
4035 #define ALT_SMMU_SECURE_SMMU_SSD_REG_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_5_OFST))
4036 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_6 register for the ALT_SMMU_SECURE instance. */
4037 #define ALT_SMMU_SECURE_SMMU_SSD_REG_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_6_OFST))
4038 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_7 register for the ALT_SMMU_SECURE instance. */
4039 #define ALT_SMMU_SECURE_SMMU_SSD_REG_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_7_OFST))
4040 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_8 register for the ALT_SMMU_SECURE instance. */
4041 #define ALT_SMMU_SECURE_SMMU_SSD_REG_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_8_OFST))
4042 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_9 register for the ALT_SMMU_SECURE instance. */
4043 #define ALT_SMMU_SECURE_SMMU_SSD_REG_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_9_OFST))
4044 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_10 register for the ALT_SMMU_SECURE instance. */
4045 #define ALT_SMMU_SECURE_SMMU_SSD_REG_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_10_OFST))
4046 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_11 register for the ALT_SMMU_SECURE instance. */
4047 #define ALT_SMMU_SECURE_SMMU_SSD_REG_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_11_OFST))
4048 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_12 register for the ALT_SMMU_SECURE instance. */
4049 #define ALT_SMMU_SECURE_SMMU_SSD_REG_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_12_OFST))
4050 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_13 register for the ALT_SMMU_SECURE instance. */
4051 #define ALT_SMMU_SECURE_SMMU_SSD_REG_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_13_OFST))
4052 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_14 register for the ALT_SMMU_SECURE instance. */
4053 #define ALT_SMMU_SECURE_SMMU_SSD_REG_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_14_OFST))
4054 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_15 register for the ALT_SMMU_SECURE instance. */
4055 #define ALT_SMMU_SECURE_SMMU_SSD_REG_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_15_OFST))
4056 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_16 register for the ALT_SMMU_SECURE instance. */
4057 #define ALT_SMMU_SECURE_SMMU_SSD_REG_16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_16_OFST))
4058 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_17 register for the ALT_SMMU_SECURE instance. */
4059 #define ALT_SMMU_SECURE_SMMU_SSD_REG_17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_17_OFST))
4060 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_18 register for the ALT_SMMU_SECURE instance. */
4061 #define ALT_SMMU_SECURE_SMMU_SSD_REG_18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_18_OFST))
4062 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_19 register for the ALT_SMMU_SECURE instance. */
4063 #define ALT_SMMU_SECURE_SMMU_SSD_REG_19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_19_OFST))
4064 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_20 register for the ALT_SMMU_SECURE instance. */
4065 #define ALT_SMMU_SECURE_SMMU_SSD_REG_20_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_20_OFST))
4066 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_21 register for the ALT_SMMU_SECURE instance. */
4067 #define ALT_SMMU_SECURE_SMMU_SSD_REG_21_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_21_OFST))
4068 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_22 register for the ALT_SMMU_SECURE instance. */
4069 #define ALT_SMMU_SECURE_SMMU_SSD_REG_22_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_22_OFST))
4070 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_23 register for the ALT_SMMU_SECURE instance. */
4071 #define ALT_SMMU_SECURE_SMMU_SSD_REG_23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_23_OFST))
4072 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_24 register for the ALT_SMMU_SECURE instance. */
4073 #define ALT_SMMU_SECURE_SMMU_SSD_REG_24_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_24_OFST))
4074 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_25 register for the ALT_SMMU_SECURE instance. */
4075 #define ALT_SMMU_SECURE_SMMU_SSD_REG_25_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_25_OFST))
4076 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_26 register for the ALT_SMMU_SECURE instance. */
4077 #define ALT_SMMU_SECURE_SMMU_SSD_REG_26_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_26_OFST))
4078 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_27 register for the ALT_SMMU_SECURE instance. */
4079 #define ALT_SMMU_SECURE_SMMU_SSD_REG_27_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_27_OFST))
4080 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_28 register for the ALT_SMMU_SECURE instance. */
4081 #define ALT_SMMU_SECURE_SMMU_SSD_REG_28_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_28_OFST))
4082 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_29 register for the ALT_SMMU_SECURE instance. */
4083 #define ALT_SMMU_SECURE_SMMU_SSD_REG_29_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_29_OFST))
4084 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_30 register for the ALT_SMMU_SECURE instance. */
4085 #define ALT_SMMU_SECURE_SMMU_SSD_REG_30_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_30_OFST))
4086 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_31 register for the ALT_SMMU_SECURE instance. */
4087 #define ALT_SMMU_SECURE_SMMU_SSD_REG_31_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_31_OFST))
4088 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_32 register for the ALT_SMMU_SECURE instance. */
4089 #define ALT_SMMU_SECURE_SMMU_SSD_REG_32_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_32_OFST))
4090 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_33 register for the ALT_SMMU_SECURE instance. */
4091 #define ALT_SMMU_SECURE_SMMU_SSD_REG_33_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_33_OFST))
4092 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_34 register for the ALT_SMMU_SECURE instance. */
4093 #define ALT_SMMU_SECURE_SMMU_SSD_REG_34_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_34_OFST))
4094 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_35 register for the ALT_SMMU_SECURE instance. */
4095 #define ALT_SMMU_SECURE_SMMU_SSD_REG_35_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_35_OFST))
4096 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_36 register for the ALT_SMMU_SECURE instance. */
4097 #define ALT_SMMU_SECURE_SMMU_SSD_REG_36_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_36_OFST))
4098 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_37 register for the ALT_SMMU_SECURE instance. */
4099 #define ALT_SMMU_SECURE_SMMU_SSD_REG_37_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_37_OFST))
4100 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_38 register for the ALT_SMMU_SECURE instance. */
4101 #define ALT_SMMU_SECURE_SMMU_SSD_REG_38_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_38_OFST))
4102 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_39 register for the ALT_SMMU_SECURE instance. */
4103 #define ALT_SMMU_SECURE_SMMU_SSD_REG_39_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_39_OFST))
4104 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_40 register for the ALT_SMMU_SECURE instance. */
4105 #define ALT_SMMU_SECURE_SMMU_SSD_REG_40_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_40_OFST))
4106 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_41 register for the ALT_SMMU_SECURE instance. */
4107 #define ALT_SMMU_SECURE_SMMU_SSD_REG_41_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_41_OFST))
4108 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_42 register for the ALT_SMMU_SECURE instance. */
4109 #define ALT_SMMU_SECURE_SMMU_SSD_REG_42_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_42_OFST))
4110 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_43 register for the ALT_SMMU_SECURE instance. */
4111 #define ALT_SMMU_SECURE_SMMU_SSD_REG_43_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_43_OFST))
4112 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_44 register for the ALT_SMMU_SECURE instance. */
4113 #define ALT_SMMU_SECURE_SMMU_SSD_REG_44_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_44_OFST))
4114 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_45 register for the ALT_SMMU_SECURE instance. */
4115 #define ALT_SMMU_SECURE_SMMU_SSD_REG_45_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_45_OFST))
4116 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_46 register for the ALT_SMMU_SECURE instance. */
4117 #define ALT_SMMU_SECURE_SMMU_SSD_REG_46_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_46_OFST))
4118 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_47 register for the ALT_SMMU_SECURE instance. */
4119 #define ALT_SMMU_SECURE_SMMU_SSD_REG_47_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_47_OFST))
4120 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_48 register for the ALT_SMMU_SECURE instance. */
4121 #define ALT_SMMU_SECURE_SMMU_SSD_REG_48_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_48_OFST))
4122 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_49 register for the ALT_SMMU_SECURE instance. */
4123 #define ALT_SMMU_SECURE_SMMU_SSD_REG_49_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_49_OFST))
4124 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_50 register for the ALT_SMMU_SECURE instance. */
4125 #define ALT_SMMU_SECURE_SMMU_SSD_REG_50_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_50_OFST))
4126 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_51 register for the ALT_SMMU_SECURE instance. */
4127 #define ALT_SMMU_SECURE_SMMU_SSD_REG_51_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_51_OFST))
4128 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_52 register for the ALT_SMMU_SECURE instance. */
4129 #define ALT_SMMU_SECURE_SMMU_SSD_REG_52_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_52_OFST))
4130 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_53 register for the ALT_SMMU_SECURE instance. */
4131 #define ALT_SMMU_SECURE_SMMU_SSD_REG_53_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_53_OFST))
4132 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_54 register for the ALT_SMMU_SECURE instance. */
4133 #define ALT_SMMU_SECURE_SMMU_SSD_REG_54_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_54_OFST))
4134 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_55 register for the ALT_SMMU_SECURE instance. */
4135 #define ALT_SMMU_SECURE_SMMU_SSD_REG_55_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_55_OFST))
4136 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_56 register for the ALT_SMMU_SECURE instance. */
4137 #define ALT_SMMU_SECURE_SMMU_SSD_REG_56_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_56_OFST))
4138 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_57 register for the ALT_SMMU_SECURE instance. */
4139 #define ALT_SMMU_SECURE_SMMU_SSD_REG_57_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_57_OFST))
4140 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_58 register for the ALT_SMMU_SECURE instance. */
4141 #define ALT_SMMU_SECURE_SMMU_SSD_REG_58_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_58_OFST))
4142 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_59 register for the ALT_SMMU_SECURE instance. */
4143 #define ALT_SMMU_SECURE_SMMU_SSD_REG_59_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_59_OFST))
4144 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_60 register for the ALT_SMMU_SECURE instance. */
4145 #define ALT_SMMU_SECURE_SMMU_SSD_REG_60_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_60_OFST))
4146 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_61 register for the ALT_SMMU_SECURE instance. */
4147 #define ALT_SMMU_SECURE_SMMU_SSD_REG_61_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_61_OFST))
4148 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_62 register for the ALT_SMMU_SECURE instance. */
4149 #define ALT_SMMU_SECURE_SMMU_SSD_REG_62_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_62_OFST))
4150 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_63 register for the ALT_SMMU_SECURE instance. */
4151 #define ALT_SMMU_SECURE_SMMU_SSD_REG_63_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_63_OFST))
4152 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_64 register for the ALT_SMMU_SECURE instance. */
4153 #define ALT_SMMU_SECURE_SMMU_SSD_REG_64_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_64_OFST))
4154 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_65 register for the ALT_SMMU_SECURE instance. */
4155 #define ALT_SMMU_SECURE_SMMU_SSD_REG_65_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_65_OFST))
4156 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_66 register for the ALT_SMMU_SECURE instance. */
4157 #define ALT_SMMU_SECURE_SMMU_SSD_REG_66_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_66_OFST))
4158 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_67 register for the ALT_SMMU_SECURE instance. */
4159 #define ALT_SMMU_SECURE_SMMU_SSD_REG_67_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_67_OFST))
4160 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_68 register for the ALT_SMMU_SECURE instance. */
4161 #define ALT_SMMU_SECURE_SMMU_SSD_REG_68_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_68_OFST))
4162 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_69 register for the ALT_SMMU_SECURE instance. */
4163 #define ALT_SMMU_SECURE_SMMU_SSD_REG_69_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_69_OFST))
4164 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_70 register for the ALT_SMMU_SECURE instance. */
4165 #define ALT_SMMU_SECURE_SMMU_SSD_REG_70_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_70_OFST))
4166 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_71 register for the ALT_SMMU_SECURE instance. */
4167 #define ALT_SMMU_SECURE_SMMU_SSD_REG_71_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_71_OFST))
4168 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_72 register for the ALT_SMMU_SECURE instance. */
4169 #define ALT_SMMU_SECURE_SMMU_SSD_REG_72_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_72_OFST))
4170 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_73 register for the ALT_SMMU_SECURE instance. */
4171 #define ALT_SMMU_SECURE_SMMU_SSD_REG_73_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_73_OFST))
4172 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_74 register for the ALT_SMMU_SECURE instance. */
4173 #define ALT_SMMU_SECURE_SMMU_SSD_REG_74_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_74_OFST))
4174 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_75 register for the ALT_SMMU_SECURE instance. */
4175 #define ALT_SMMU_SECURE_SMMU_SSD_REG_75_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_75_OFST))
4176 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_76 register for the ALT_SMMU_SECURE instance. */
4177 #define ALT_SMMU_SECURE_SMMU_SSD_REG_76_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_76_OFST))
4178 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_77 register for the ALT_SMMU_SECURE instance. */
4179 #define ALT_SMMU_SECURE_SMMU_SSD_REG_77_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_77_OFST))
4180 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_78 register for the ALT_SMMU_SECURE instance. */
4181 #define ALT_SMMU_SECURE_SMMU_SSD_REG_78_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_78_OFST))
4182 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_79 register for the ALT_SMMU_SECURE instance. */
4183 #define ALT_SMMU_SECURE_SMMU_SSD_REG_79_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_79_OFST))
4184 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_80 register for the ALT_SMMU_SECURE instance. */
4185 #define ALT_SMMU_SECURE_SMMU_SSD_REG_80_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_80_OFST))
4186 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_81 register for the ALT_SMMU_SECURE instance. */
4187 #define ALT_SMMU_SECURE_SMMU_SSD_REG_81_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_81_OFST))
4188 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_82 register for the ALT_SMMU_SECURE instance. */
4189 #define ALT_SMMU_SECURE_SMMU_SSD_REG_82_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_82_OFST))
4190 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_83 register for the ALT_SMMU_SECURE instance. */
4191 #define ALT_SMMU_SECURE_SMMU_SSD_REG_83_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_83_OFST))
4192 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_84 register for the ALT_SMMU_SECURE instance. */
4193 #define ALT_SMMU_SECURE_SMMU_SSD_REG_84_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_84_OFST))
4194 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_85 register for the ALT_SMMU_SECURE instance. */
4195 #define ALT_SMMU_SECURE_SMMU_SSD_REG_85_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_85_OFST))
4196 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_86 register for the ALT_SMMU_SECURE instance. */
4197 #define ALT_SMMU_SECURE_SMMU_SSD_REG_86_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_86_OFST))
4198 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_87 register for the ALT_SMMU_SECURE instance. */
4199 #define ALT_SMMU_SECURE_SMMU_SSD_REG_87_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_87_OFST))
4200 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_88 register for the ALT_SMMU_SECURE instance. */
4201 #define ALT_SMMU_SECURE_SMMU_SSD_REG_88_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_88_OFST))
4202 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_89 register for the ALT_SMMU_SECURE instance. */
4203 #define ALT_SMMU_SECURE_SMMU_SSD_REG_89_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_89_OFST))
4204 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_90 register for the ALT_SMMU_SECURE instance. */
4205 #define ALT_SMMU_SECURE_SMMU_SSD_REG_90_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_90_OFST))
4206 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_91 register for the ALT_SMMU_SECURE instance. */
4207 #define ALT_SMMU_SECURE_SMMU_SSD_REG_91_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_91_OFST))
4208 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_92 register for the ALT_SMMU_SECURE instance. */
4209 #define ALT_SMMU_SECURE_SMMU_SSD_REG_92_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_92_OFST))
4210 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_93 register for the ALT_SMMU_SECURE instance. */
4211 #define ALT_SMMU_SECURE_SMMU_SSD_REG_93_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_93_OFST))
4212 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_94 register for the ALT_SMMU_SECURE instance. */
4213 #define ALT_SMMU_SECURE_SMMU_SSD_REG_94_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_94_OFST))
4214 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_95 register for the ALT_SMMU_SECURE instance. */
4215 #define ALT_SMMU_SECURE_SMMU_SSD_REG_95_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_95_OFST))
4216 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_96 register for the ALT_SMMU_SECURE instance. */
4217 #define ALT_SMMU_SECURE_SMMU_SSD_REG_96_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_96_OFST))
4218 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_97 register for the ALT_SMMU_SECURE instance. */
4219 #define ALT_SMMU_SECURE_SMMU_SSD_REG_97_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_97_OFST))
4220 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_98 register for the ALT_SMMU_SECURE instance. */
4221 #define ALT_SMMU_SECURE_SMMU_SSD_REG_98_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_98_OFST))
4222 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_99 register for the ALT_SMMU_SECURE instance. */
4223 #define ALT_SMMU_SECURE_SMMU_SSD_REG_99_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_99_OFST))
4224 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_100 register for the ALT_SMMU_SECURE instance. */
4225 #define ALT_SMMU_SECURE_SMMU_SSD_REG_100_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_100_OFST))
4226 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_101 register for the ALT_SMMU_SECURE instance. */
4227 #define ALT_SMMU_SECURE_SMMU_SSD_REG_101_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_101_OFST))
4228 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_102 register for the ALT_SMMU_SECURE instance. */
4229 #define ALT_SMMU_SECURE_SMMU_SSD_REG_102_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_102_OFST))
4230 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_103 register for the ALT_SMMU_SECURE instance. */
4231 #define ALT_SMMU_SECURE_SMMU_SSD_REG_103_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_103_OFST))
4232 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_104 register for the ALT_SMMU_SECURE instance. */
4233 #define ALT_SMMU_SECURE_SMMU_SSD_REG_104_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_104_OFST))
4234 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_105 register for the ALT_SMMU_SECURE instance. */
4235 #define ALT_SMMU_SECURE_SMMU_SSD_REG_105_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_105_OFST))
4236 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_106 register for the ALT_SMMU_SECURE instance. */
4237 #define ALT_SMMU_SECURE_SMMU_SSD_REG_106_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_106_OFST))
4238 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_107 register for the ALT_SMMU_SECURE instance. */
4239 #define ALT_SMMU_SECURE_SMMU_SSD_REG_107_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_107_OFST))
4240 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_108 register for the ALT_SMMU_SECURE instance. */
4241 #define ALT_SMMU_SECURE_SMMU_SSD_REG_108_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_108_OFST))
4242 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_109 register for the ALT_SMMU_SECURE instance. */
4243 #define ALT_SMMU_SECURE_SMMU_SSD_REG_109_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_109_OFST))
4244 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_110 register for the ALT_SMMU_SECURE instance. */
4245 #define ALT_SMMU_SECURE_SMMU_SSD_REG_110_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_110_OFST))
4246 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_111 register for the ALT_SMMU_SECURE instance. */
4247 #define ALT_SMMU_SECURE_SMMU_SSD_REG_111_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_111_OFST))
4248 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_112 register for the ALT_SMMU_SECURE instance. */
4249 #define ALT_SMMU_SECURE_SMMU_SSD_REG_112_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_112_OFST))
4250 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_113 register for the ALT_SMMU_SECURE instance. */
4251 #define ALT_SMMU_SECURE_SMMU_SSD_REG_113_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_113_OFST))
4252 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_114 register for the ALT_SMMU_SECURE instance. */
4253 #define ALT_SMMU_SECURE_SMMU_SSD_REG_114_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_114_OFST))
4254 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_115 register for the ALT_SMMU_SECURE instance. */
4255 #define ALT_SMMU_SECURE_SMMU_SSD_REG_115_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_115_OFST))
4256 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_116 register for the ALT_SMMU_SECURE instance. */
4257 #define ALT_SMMU_SECURE_SMMU_SSD_REG_116_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_116_OFST))
4258 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_117 register for the ALT_SMMU_SECURE instance. */
4259 #define ALT_SMMU_SECURE_SMMU_SSD_REG_117_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_117_OFST))
4260 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_118 register for the ALT_SMMU_SECURE instance. */
4261 #define ALT_SMMU_SECURE_SMMU_SSD_REG_118_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_118_OFST))
4262 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_119 register for the ALT_SMMU_SECURE instance. */
4263 #define ALT_SMMU_SECURE_SMMU_SSD_REG_119_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_119_OFST))
4264 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_120 register for the ALT_SMMU_SECURE instance. */
4265 #define ALT_SMMU_SECURE_SMMU_SSD_REG_120_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_120_OFST))
4266 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_121 register for the ALT_SMMU_SECURE instance. */
4267 #define ALT_SMMU_SECURE_SMMU_SSD_REG_121_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_121_OFST))
4268 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_122 register for the ALT_SMMU_SECURE instance. */
4269 #define ALT_SMMU_SECURE_SMMU_SSD_REG_122_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_122_OFST))
4270 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_123 register for the ALT_SMMU_SECURE instance. */
4271 #define ALT_SMMU_SECURE_SMMU_SSD_REG_123_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_123_OFST))
4272 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_124 register for the ALT_SMMU_SECURE instance. */
4273 #define ALT_SMMU_SECURE_SMMU_SSD_REG_124_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_124_OFST))
4274 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_125 register for the ALT_SMMU_SECURE instance. */
4275 #define ALT_SMMU_SECURE_SMMU_SSD_REG_125_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_125_OFST))
4276 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_126 register for the ALT_SMMU_SECURE instance. */
4277 #define ALT_SMMU_SECURE_SMMU_SSD_REG_126_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_126_OFST))
4278 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_127 register for the ALT_SMMU_SECURE instance. */
4279 #define ALT_SMMU_SECURE_SMMU_SSD_REG_127_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_127_OFST))
4280 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_128 register for the ALT_SMMU_SECURE instance. */
4281 #define ALT_SMMU_SECURE_SMMU_SSD_REG_128_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_128_OFST))
4282 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_129 register for the ALT_SMMU_SECURE instance. */
4283 #define ALT_SMMU_SECURE_SMMU_SSD_REG_129_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_129_OFST))
4284 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_130 register for the ALT_SMMU_SECURE instance. */
4285 #define ALT_SMMU_SECURE_SMMU_SSD_REG_130_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_130_OFST))
4286 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_131 register for the ALT_SMMU_SECURE instance. */
4287 #define ALT_SMMU_SECURE_SMMU_SSD_REG_131_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_131_OFST))
4288 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_132 register for the ALT_SMMU_SECURE instance. */
4289 #define ALT_SMMU_SECURE_SMMU_SSD_REG_132_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_132_OFST))
4290 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_133 register for the ALT_SMMU_SECURE instance. */
4291 #define ALT_SMMU_SECURE_SMMU_SSD_REG_133_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_133_OFST))
4292 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_134 register for the ALT_SMMU_SECURE instance. */
4293 #define ALT_SMMU_SECURE_SMMU_SSD_REG_134_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_134_OFST))
4294 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_135 register for the ALT_SMMU_SECURE instance. */
4295 #define ALT_SMMU_SECURE_SMMU_SSD_REG_135_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_135_OFST))
4296 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_136 register for the ALT_SMMU_SECURE instance. */
4297 #define ALT_SMMU_SECURE_SMMU_SSD_REG_136_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_136_OFST))
4298 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_137 register for the ALT_SMMU_SECURE instance. */
4299 #define ALT_SMMU_SECURE_SMMU_SSD_REG_137_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_137_OFST))
4300 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_138 register for the ALT_SMMU_SECURE instance. */
4301 #define ALT_SMMU_SECURE_SMMU_SSD_REG_138_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_138_OFST))
4302 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_139 register for the ALT_SMMU_SECURE instance. */
4303 #define ALT_SMMU_SECURE_SMMU_SSD_REG_139_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_139_OFST))
4304 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_140 register for the ALT_SMMU_SECURE instance. */
4305 #define ALT_SMMU_SECURE_SMMU_SSD_REG_140_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_140_OFST))
4306 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_141 register for the ALT_SMMU_SECURE instance. */
4307 #define ALT_SMMU_SECURE_SMMU_SSD_REG_141_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_141_OFST))
4308 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_142 register for the ALT_SMMU_SECURE instance. */
4309 #define ALT_SMMU_SECURE_SMMU_SSD_REG_142_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_142_OFST))
4310 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_143 register for the ALT_SMMU_SECURE instance. */
4311 #define ALT_SMMU_SECURE_SMMU_SSD_REG_143_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_143_OFST))
4312 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_144 register for the ALT_SMMU_SECURE instance. */
4313 #define ALT_SMMU_SECURE_SMMU_SSD_REG_144_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_144_OFST))
4314 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_145 register for the ALT_SMMU_SECURE instance. */
4315 #define ALT_SMMU_SECURE_SMMU_SSD_REG_145_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_145_OFST))
4316 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_146 register for the ALT_SMMU_SECURE instance. */
4317 #define ALT_SMMU_SECURE_SMMU_SSD_REG_146_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_146_OFST))
4318 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_147 register for the ALT_SMMU_SECURE instance. */
4319 #define ALT_SMMU_SECURE_SMMU_SSD_REG_147_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_147_OFST))
4320 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_148 register for the ALT_SMMU_SECURE instance. */
4321 #define ALT_SMMU_SECURE_SMMU_SSD_REG_148_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_148_OFST))
4322 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_149 register for the ALT_SMMU_SECURE instance. */
4323 #define ALT_SMMU_SECURE_SMMU_SSD_REG_149_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_149_OFST))
4324 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_150 register for the ALT_SMMU_SECURE instance. */
4325 #define ALT_SMMU_SECURE_SMMU_SSD_REG_150_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_150_OFST))
4326 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_151 register for the ALT_SMMU_SECURE instance. */
4327 #define ALT_SMMU_SECURE_SMMU_SSD_REG_151_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_151_OFST))
4328 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_152 register for the ALT_SMMU_SECURE instance. */
4329 #define ALT_SMMU_SECURE_SMMU_SSD_REG_152_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_152_OFST))
4330 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_153 register for the ALT_SMMU_SECURE instance. */
4331 #define ALT_SMMU_SECURE_SMMU_SSD_REG_153_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_153_OFST))
4332 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_154 register for the ALT_SMMU_SECURE instance. */
4333 #define ALT_SMMU_SECURE_SMMU_SSD_REG_154_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_154_OFST))
4334 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_155 register for the ALT_SMMU_SECURE instance. */
4335 #define ALT_SMMU_SECURE_SMMU_SSD_REG_155_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_155_OFST))
4336 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_156 register for the ALT_SMMU_SECURE instance. */
4337 #define ALT_SMMU_SECURE_SMMU_SSD_REG_156_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_156_OFST))
4338 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_157 register for the ALT_SMMU_SECURE instance. */
4339 #define ALT_SMMU_SECURE_SMMU_SSD_REG_157_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_157_OFST))
4340 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_158 register for the ALT_SMMU_SECURE instance. */
4341 #define ALT_SMMU_SECURE_SMMU_SSD_REG_158_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_158_OFST))
4342 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_159 register for the ALT_SMMU_SECURE instance. */
4343 #define ALT_SMMU_SECURE_SMMU_SSD_REG_159_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_159_OFST))
4344 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_160 register for the ALT_SMMU_SECURE instance. */
4345 #define ALT_SMMU_SECURE_SMMU_SSD_REG_160_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_160_OFST))
4346 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_161 register for the ALT_SMMU_SECURE instance. */
4347 #define ALT_SMMU_SECURE_SMMU_SSD_REG_161_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_161_OFST))
4348 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_162 register for the ALT_SMMU_SECURE instance. */
4349 #define ALT_SMMU_SECURE_SMMU_SSD_REG_162_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_162_OFST))
4350 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_163 register for the ALT_SMMU_SECURE instance. */
4351 #define ALT_SMMU_SECURE_SMMU_SSD_REG_163_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_163_OFST))
4352 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_164 register for the ALT_SMMU_SECURE instance. */
4353 #define ALT_SMMU_SECURE_SMMU_SSD_REG_164_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_164_OFST))
4354 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_165 register for the ALT_SMMU_SECURE instance. */
4355 #define ALT_SMMU_SECURE_SMMU_SSD_REG_165_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_165_OFST))
4356 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_166 register for the ALT_SMMU_SECURE instance. */
4357 #define ALT_SMMU_SECURE_SMMU_SSD_REG_166_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_166_OFST))
4358 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_167 register for the ALT_SMMU_SECURE instance. */
4359 #define ALT_SMMU_SECURE_SMMU_SSD_REG_167_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_167_OFST))
4360 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_168 register for the ALT_SMMU_SECURE instance. */
4361 #define ALT_SMMU_SECURE_SMMU_SSD_REG_168_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_168_OFST))
4362 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_169 register for the ALT_SMMU_SECURE instance. */
4363 #define ALT_SMMU_SECURE_SMMU_SSD_REG_169_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_169_OFST))
4364 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_170 register for the ALT_SMMU_SECURE instance. */
4365 #define ALT_SMMU_SECURE_SMMU_SSD_REG_170_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_170_OFST))
4366 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_171 register for the ALT_SMMU_SECURE instance. */
4367 #define ALT_SMMU_SECURE_SMMU_SSD_REG_171_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_171_OFST))
4368 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_172 register for the ALT_SMMU_SECURE instance. */
4369 #define ALT_SMMU_SECURE_SMMU_SSD_REG_172_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_172_OFST))
4370 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_173 register for the ALT_SMMU_SECURE instance. */
4371 #define ALT_SMMU_SECURE_SMMU_SSD_REG_173_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_173_OFST))
4372 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_174 register for the ALT_SMMU_SECURE instance. */
4373 #define ALT_SMMU_SECURE_SMMU_SSD_REG_174_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_174_OFST))
4374 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_175 register for the ALT_SMMU_SECURE instance. */
4375 #define ALT_SMMU_SECURE_SMMU_SSD_REG_175_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_175_OFST))
4376 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_176 register for the ALT_SMMU_SECURE instance. */
4377 #define ALT_SMMU_SECURE_SMMU_SSD_REG_176_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_176_OFST))
4378 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_177 register for the ALT_SMMU_SECURE instance. */
4379 #define ALT_SMMU_SECURE_SMMU_SSD_REG_177_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_177_OFST))
4380 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_178 register for the ALT_SMMU_SECURE instance. */
4381 #define ALT_SMMU_SECURE_SMMU_SSD_REG_178_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_178_OFST))
4382 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_179 register for the ALT_SMMU_SECURE instance. */
4383 #define ALT_SMMU_SECURE_SMMU_SSD_REG_179_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_179_OFST))
4384 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_180 register for the ALT_SMMU_SECURE instance. */
4385 #define ALT_SMMU_SECURE_SMMU_SSD_REG_180_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_180_OFST))
4386 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_181 register for the ALT_SMMU_SECURE instance. */
4387 #define ALT_SMMU_SECURE_SMMU_SSD_REG_181_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_181_OFST))
4388 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_182 register for the ALT_SMMU_SECURE instance. */
4389 #define ALT_SMMU_SECURE_SMMU_SSD_REG_182_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_182_OFST))
4390 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_183 register for the ALT_SMMU_SECURE instance. */
4391 #define ALT_SMMU_SECURE_SMMU_SSD_REG_183_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_183_OFST))
4392 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_184 register for the ALT_SMMU_SECURE instance. */
4393 #define ALT_SMMU_SECURE_SMMU_SSD_REG_184_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_184_OFST))
4394 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_185 register for the ALT_SMMU_SECURE instance. */
4395 #define ALT_SMMU_SECURE_SMMU_SSD_REG_185_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_185_OFST))
4396 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_186 register for the ALT_SMMU_SECURE instance. */
4397 #define ALT_SMMU_SECURE_SMMU_SSD_REG_186_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_186_OFST))
4398 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_187 register for the ALT_SMMU_SECURE instance. */
4399 #define ALT_SMMU_SECURE_SMMU_SSD_REG_187_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_187_OFST))
4400 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_188 register for the ALT_SMMU_SECURE instance. */
4401 #define ALT_SMMU_SECURE_SMMU_SSD_REG_188_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_188_OFST))
4402 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_189 register for the ALT_SMMU_SECURE instance. */
4403 #define ALT_SMMU_SECURE_SMMU_SSD_REG_189_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_189_OFST))
4404 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_190 register for the ALT_SMMU_SECURE instance. */
4405 #define ALT_SMMU_SECURE_SMMU_SSD_REG_190_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_190_OFST))
4406 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_191 register for the ALT_SMMU_SECURE instance. */
4407 #define ALT_SMMU_SECURE_SMMU_SSD_REG_191_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_191_OFST))
4408 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_192 register for the ALT_SMMU_SECURE instance. */
4409 #define ALT_SMMU_SECURE_SMMU_SSD_REG_192_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_192_OFST))
4410 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_193 register for the ALT_SMMU_SECURE instance. */
4411 #define ALT_SMMU_SECURE_SMMU_SSD_REG_193_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_193_OFST))
4412 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_194 register for the ALT_SMMU_SECURE instance. */
4413 #define ALT_SMMU_SECURE_SMMU_SSD_REG_194_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_194_OFST))
4414 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_195 register for the ALT_SMMU_SECURE instance. */
4415 #define ALT_SMMU_SECURE_SMMU_SSD_REG_195_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_195_OFST))
4416 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_196 register for the ALT_SMMU_SECURE instance. */
4417 #define ALT_SMMU_SECURE_SMMU_SSD_REG_196_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_196_OFST))
4418 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_197 register for the ALT_SMMU_SECURE instance. */
4419 #define ALT_SMMU_SECURE_SMMU_SSD_REG_197_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_197_OFST))
4420 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_198 register for the ALT_SMMU_SECURE instance. */
4421 #define ALT_SMMU_SECURE_SMMU_SSD_REG_198_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_198_OFST))
4422 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_199 register for the ALT_SMMU_SECURE instance. */
4423 #define ALT_SMMU_SECURE_SMMU_SSD_REG_199_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_199_OFST))
4424 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_200 register for the ALT_SMMU_SECURE instance. */
4425 #define ALT_SMMU_SECURE_SMMU_SSD_REG_200_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_200_OFST))
4426 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_201 register for the ALT_SMMU_SECURE instance. */
4427 #define ALT_SMMU_SECURE_SMMU_SSD_REG_201_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_201_OFST))
4428 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_202 register for the ALT_SMMU_SECURE instance. */
4429 #define ALT_SMMU_SECURE_SMMU_SSD_REG_202_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_202_OFST))
4430 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_203 register for the ALT_SMMU_SECURE instance. */
4431 #define ALT_SMMU_SECURE_SMMU_SSD_REG_203_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_203_OFST))
4432 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_204 register for the ALT_SMMU_SECURE instance. */
4433 #define ALT_SMMU_SECURE_SMMU_SSD_REG_204_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_204_OFST))
4434 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_205 register for the ALT_SMMU_SECURE instance. */
4435 #define ALT_SMMU_SECURE_SMMU_SSD_REG_205_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_205_OFST))
4436 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_206 register for the ALT_SMMU_SECURE instance. */
4437 #define ALT_SMMU_SECURE_SMMU_SSD_REG_206_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_206_OFST))
4438 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_207 register for the ALT_SMMU_SECURE instance. */
4439 #define ALT_SMMU_SECURE_SMMU_SSD_REG_207_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_207_OFST))
4440 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_208 register for the ALT_SMMU_SECURE instance. */
4441 #define ALT_SMMU_SECURE_SMMU_SSD_REG_208_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_208_OFST))
4442 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_209 register for the ALT_SMMU_SECURE instance. */
4443 #define ALT_SMMU_SECURE_SMMU_SSD_REG_209_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_209_OFST))
4444 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_210 register for the ALT_SMMU_SECURE instance. */
4445 #define ALT_SMMU_SECURE_SMMU_SSD_REG_210_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_210_OFST))
4446 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_211 register for the ALT_SMMU_SECURE instance. */
4447 #define ALT_SMMU_SECURE_SMMU_SSD_REG_211_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_211_OFST))
4448 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_212 register for the ALT_SMMU_SECURE instance. */
4449 #define ALT_SMMU_SECURE_SMMU_SSD_REG_212_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_212_OFST))
4450 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_213 register for the ALT_SMMU_SECURE instance. */
4451 #define ALT_SMMU_SECURE_SMMU_SSD_REG_213_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_213_OFST))
4452 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_214 register for the ALT_SMMU_SECURE instance. */
4453 #define ALT_SMMU_SECURE_SMMU_SSD_REG_214_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_214_OFST))
4454 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_215 register for the ALT_SMMU_SECURE instance. */
4455 #define ALT_SMMU_SECURE_SMMU_SSD_REG_215_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_215_OFST))
4456 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_216 register for the ALT_SMMU_SECURE instance. */
4457 #define ALT_SMMU_SECURE_SMMU_SSD_REG_216_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_216_OFST))
4458 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_217 register for the ALT_SMMU_SECURE instance. */
4459 #define ALT_SMMU_SECURE_SMMU_SSD_REG_217_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_217_OFST))
4460 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_218 register for the ALT_SMMU_SECURE instance. */
4461 #define ALT_SMMU_SECURE_SMMU_SSD_REG_218_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_218_OFST))
4462 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_219 register for the ALT_SMMU_SECURE instance. */
4463 #define ALT_SMMU_SECURE_SMMU_SSD_REG_219_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_219_OFST))
4464 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_220 register for the ALT_SMMU_SECURE instance. */
4465 #define ALT_SMMU_SECURE_SMMU_SSD_REG_220_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_220_OFST))
4466 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_221 register for the ALT_SMMU_SECURE instance. */
4467 #define ALT_SMMU_SECURE_SMMU_SSD_REG_221_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_221_OFST))
4468 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_222 register for the ALT_SMMU_SECURE instance. */
4469 #define ALT_SMMU_SECURE_SMMU_SSD_REG_222_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_222_OFST))
4470 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_223 register for the ALT_SMMU_SECURE instance. */
4471 #define ALT_SMMU_SECURE_SMMU_SSD_REG_223_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_223_OFST))
4472 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_224 register for the ALT_SMMU_SECURE instance. */
4473 #define ALT_SMMU_SECURE_SMMU_SSD_REG_224_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_224_OFST))
4474 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_225 register for the ALT_SMMU_SECURE instance. */
4475 #define ALT_SMMU_SECURE_SMMU_SSD_REG_225_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_225_OFST))
4476 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_226 register for the ALT_SMMU_SECURE instance. */
4477 #define ALT_SMMU_SECURE_SMMU_SSD_REG_226_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_226_OFST))
4478 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_227 register for the ALT_SMMU_SECURE instance. */
4479 #define ALT_SMMU_SECURE_SMMU_SSD_REG_227_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_227_OFST))
4480 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_228 register for the ALT_SMMU_SECURE instance. */
4481 #define ALT_SMMU_SECURE_SMMU_SSD_REG_228_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_228_OFST))
4482 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_229 register for the ALT_SMMU_SECURE instance. */
4483 #define ALT_SMMU_SECURE_SMMU_SSD_REG_229_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_229_OFST))
4484 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_230 register for the ALT_SMMU_SECURE instance. */
4485 #define ALT_SMMU_SECURE_SMMU_SSD_REG_230_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_230_OFST))
4486 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_231 register for the ALT_SMMU_SECURE instance. */
4487 #define ALT_SMMU_SECURE_SMMU_SSD_REG_231_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_231_OFST))
4488 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_232 register for the ALT_SMMU_SECURE instance. */
4489 #define ALT_SMMU_SECURE_SMMU_SSD_REG_232_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_232_OFST))
4490 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_233 register for the ALT_SMMU_SECURE instance. */
4491 #define ALT_SMMU_SECURE_SMMU_SSD_REG_233_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_233_OFST))
4492 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_234 register for the ALT_SMMU_SECURE instance. */
4493 #define ALT_SMMU_SECURE_SMMU_SSD_REG_234_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_234_OFST))
4494 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_235 register for the ALT_SMMU_SECURE instance. */
4495 #define ALT_SMMU_SECURE_SMMU_SSD_REG_235_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_235_OFST))
4496 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_236 register for the ALT_SMMU_SECURE instance. */
4497 #define ALT_SMMU_SECURE_SMMU_SSD_REG_236_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_236_OFST))
4498 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_237 register for the ALT_SMMU_SECURE instance. */
4499 #define ALT_SMMU_SECURE_SMMU_SSD_REG_237_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_237_OFST))
4500 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_238 register for the ALT_SMMU_SECURE instance. */
4501 #define ALT_SMMU_SECURE_SMMU_SSD_REG_238_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_238_OFST))
4502 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_239 register for the ALT_SMMU_SECURE instance. */
4503 #define ALT_SMMU_SECURE_SMMU_SSD_REG_239_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_239_OFST))
4504 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_240 register for the ALT_SMMU_SECURE instance. */
4505 #define ALT_SMMU_SECURE_SMMU_SSD_REG_240_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_240_OFST))
4506 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_241 register for the ALT_SMMU_SECURE instance. */
4507 #define ALT_SMMU_SECURE_SMMU_SSD_REG_241_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_241_OFST))
4508 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_242 register for the ALT_SMMU_SECURE instance. */
4509 #define ALT_SMMU_SECURE_SMMU_SSD_REG_242_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_242_OFST))
4510 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_243 register for the ALT_SMMU_SECURE instance. */
4511 #define ALT_SMMU_SECURE_SMMU_SSD_REG_243_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_243_OFST))
4512 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_244 register for the ALT_SMMU_SECURE instance. */
4513 #define ALT_SMMU_SECURE_SMMU_SSD_REG_244_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_244_OFST))
4514 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_245 register for the ALT_SMMU_SECURE instance. */
4515 #define ALT_SMMU_SECURE_SMMU_SSD_REG_245_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_245_OFST))
4516 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_246 register for the ALT_SMMU_SECURE instance. */
4517 #define ALT_SMMU_SECURE_SMMU_SSD_REG_246_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_246_OFST))
4518 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_247 register for the ALT_SMMU_SECURE instance. */
4519 #define ALT_SMMU_SECURE_SMMU_SSD_REG_247_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_247_OFST))
4520 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_248 register for the ALT_SMMU_SECURE instance. */
4521 #define ALT_SMMU_SECURE_SMMU_SSD_REG_248_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_248_OFST))
4522 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_249 register for the ALT_SMMU_SECURE instance. */
4523 #define ALT_SMMU_SECURE_SMMU_SSD_REG_249_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_249_OFST))
4524 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_250 register for the ALT_SMMU_SECURE instance. */
4525 #define ALT_SMMU_SECURE_SMMU_SSD_REG_250_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_250_OFST))
4526 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_251 register for the ALT_SMMU_SECURE instance. */
4527 #define ALT_SMMU_SECURE_SMMU_SSD_REG_251_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_251_OFST))
4528 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_252 register for the ALT_SMMU_SECURE instance. */
4529 #define ALT_SMMU_SECURE_SMMU_SSD_REG_252_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_252_OFST))
4530 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_253 register for the ALT_SMMU_SECURE instance. */
4531 #define ALT_SMMU_SECURE_SMMU_SSD_REG_253_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_253_OFST))
4532 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_254 register for the ALT_SMMU_SECURE instance. */
4533 #define ALT_SMMU_SECURE_SMMU_SSD_REG_254_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_254_OFST))
4534 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_255 register for the ALT_SMMU_SECURE instance. */
4535 #define ALT_SMMU_SECURE_SMMU_SSD_REG_255_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_255_OFST))
4536 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_256 register for the ALT_SMMU_SECURE instance. */
4537 #define ALT_SMMU_SECURE_SMMU_SSD_REG_256_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_256_OFST))
4538 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_257 register for the ALT_SMMU_SECURE instance. */
4539 #define ALT_SMMU_SECURE_SMMU_SSD_REG_257_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_257_OFST))
4540 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_258 register for the ALT_SMMU_SECURE instance. */
4541 #define ALT_SMMU_SECURE_SMMU_SSD_REG_258_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_258_OFST))
4542 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_259 register for the ALT_SMMU_SECURE instance. */
4543 #define ALT_SMMU_SECURE_SMMU_SSD_REG_259_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_259_OFST))
4544 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_260 register for the ALT_SMMU_SECURE instance. */
4545 #define ALT_SMMU_SECURE_SMMU_SSD_REG_260_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_260_OFST))
4546 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_261 register for the ALT_SMMU_SECURE instance. */
4547 #define ALT_SMMU_SECURE_SMMU_SSD_REG_261_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_261_OFST))
4548 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_262 register for the ALT_SMMU_SECURE instance. */
4549 #define ALT_SMMU_SECURE_SMMU_SSD_REG_262_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_262_OFST))
4550 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_263 register for the ALT_SMMU_SECURE instance. */
4551 #define ALT_SMMU_SECURE_SMMU_SSD_REG_263_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_263_OFST))
4552 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_264 register for the ALT_SMMU_SECURE instance. */
4553 #define ALT_SMMU_SECURE_SMMU_SSD_REG_264_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_264_OFST))
4554 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_265 register for the ALT_SMMU_SECURE instance. */
4555 #define ALT_SMMU_SECURE_SMMU_SSD_REG_265_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_265_OFST))
4556 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_266 register for the ALT_SMMU_SECURE instance. */
4557 #define ALT_SMMU_SECURE_SMMU_SSD_REG_266_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_266_OFST))
4558 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_267 register for the ALT_SMMU_SECURE instance. */
4559 #define ALT_SMMU_SECURE_SMMU_SSD_REG_267_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_267_OFST))
4560 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_268 register for the ALT_SMMU_SECURE instance. */
4561 #define ALT_SMMU_SECURE_SMMU_SSD_REG_268_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_268_OFST))
4562 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_269 register for the ALT_SMMU_SECURE instance. */
4563 #define ALT_SMMU_SECURE_SMMU_SSD_REG_269_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_269_OFST))
4564 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_270 register for the ALT_SMMU_SECURE instance. */
4565 #define ALT_SMMU_SECURE_SMMU_SSD_REG_270_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_270_OFST))
4566 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_271 register for the ALT_SMMU_SECURE instance. */
4567 #define ALT_SMMU_SECURE_SMMU_SSD_REG_271_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_271_OFST))
4568 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_272 register for the ALT_SMMU_SECURE instance. */
4569 #define ALT_SMMU_SECURE_SMMU_SSD_REG_272_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_272_OFST))
4570 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_273 register for the ALT_SMMU_SECURE instance. */
4571 #define ALT_SMMU_SECURE_SMMU_SSD_REG_273_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_273_OFST))
4572 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_274 register for the ALT_SMMU_SECURE instance. */
4573 #define ALT_SMMU_SECURE_SMMU_SSD_REG_274_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_274_OFST))
4574 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_275 register for the ALT_SMMU_SECURE instance. */
4575 #define ALT_SMMU_SECURE_SMMU_SSD_REG_275_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_275_OFST))
4576 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_276 register for the ALT_SMMU_SECURE instance. */
4577 #define ALT_SMMU_SECURE_SMMU_SSD_REG_276_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_276_OFST))
4578 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_277 register for the ALT_SMMU_SECURE instance. */
4579 #define ALT_SMMU_SECURE_SMMU_SSD_REG_277_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_277_OFST))
4580 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_278 register for the ALT_SMMU_SECURE instance. */
4581 #define ALT_SMMU_SECURE_SMMU_SSD_REG_278_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_278_OFST))
4582 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_279 register for the ALT_SMMU_SECURE instance. */
4583 #define ALT_SMMU_SECURE_SMMU_SSD_REG_279_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_279_OFST))
4584 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_280 register for the ALT_SMMU_SECURE instance. */
4585 #define ALT_SMMU_SECURE_SMMU_SSD_REG_280_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_280_OFST))
4586 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_281 register for the ALT_SMMU_SECURE instance. */
4587 #define ALT_SMMU_SECURE_SMMU_SSD_REG_281_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_281_OFST))
4588 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_282 register for the ALT_SMMU_SECURE instance. */
4589 #define ALT_SMMU_SECURE_SMMU_SSD_REG_282_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_282_OFST))
4590 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_283 register for the ALT_SMMU_SECURE instance. */
4591 #define ALT_SMMU_SECURE_SMMU_SSD_REG_283_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_283_OFST))
4592 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_284 register for the ALT_SMMU_SECURE instance. */
4593 #define ALT_SMMU_SECURE_SMMU_SSD_REG_284_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_284_OFST))
4594 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_285 register for the ALT_SMMU_SECURE instance. */
4595 #define ALT_SMMU_SECURE_SMMU_SSD_REG_285_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_285_OFST))
4596 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_286 register for the ALT_SMMU_SECURE instance. */
4597 #define ALT_SMMU_SECURE_SMMU_SSD_REG_286_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_286_OFST))
4598 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_287 register for the ALT_SMMU_SECURE instance. */
4599 #define ALT_SMMU_SECURE_SMMU_SSD_REG_287_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_287_OFST))
4600 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_288 register for the ALT_SMMU_SECURE instance. */
4601 #define ALT_SMMU_SECURE_SMMU_SSD_REG_288_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_288_OFST))
4602 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_289 register for the ALT_SMMU_SECURE instance. */
4603 #define ALT_SMMU_SECURE_SMMU_SSD_REG_289_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_289_OFST))
4604 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_290 register for the ALT_SMMU_SECURE instance. */
4605 #define ALT_SMMU_SECURE_SMMU_SSD_REG_290_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_290_OFST))
4606 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_291 register for the ALT_SMMU_SECURE instance. */
4607 #define ALT_SMMU_SECURE_SMMU_SSD_REG_291_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_291_OFST))
4608 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_292 register for the ALT_SMMU_SECURE instance. */
4609 #define ALT_SMMU_SECURE_SMMU_SSD_REG_292_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_292_OFST))
4610 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_293 register for the ALT_SMMU_SECURE instance. */
4611 #define ALT_SMMU_SECURE_SMMU_SSD_REG_293_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_293_OFST))
4612 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_294 register for the ALT_SMMU_SECURE instance. */
4613 #define ALT_SMMU_SECURE_SMMU_SSD_REG_294_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_294_OFST))
4614 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_295 register for the ALT_SMMU_SECURE instance. */
4615 #define ALT_SMMU_SECURE_SMMU_SSD_REG_295_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_295_OFST))
4616 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_296 register for the ALT_SMMU_SECURE instance. */
4617 #define ALT_SMMU_SECURE_SMMU_SSD_REG_296_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_296_OFST))
4618 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_297 register for the ALT_SMMU_SECURE instance. */
4619 #define ALT_SMMU_SECURE_SMMU_SSD_REG_297_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_297_OFST))
4620 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_298 register for the ALT_SMMU_SECURE instance. */
4621 #define ALT_SMMU_SECURE_SMMU_SSD_REG_298_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_298_OFST))
4622 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_299 register for the ALT_SMMU_SECURE instance. */
4623 #define ALT_SMMU_SECURE_SMMU_SSD_REG_299_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_299_OFST))
4624 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_300 register for the ALT_SMMU_SECURE instance. */
4625 #define ALT_SMMU_SECURE_SMMU_SSD_REG_300_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_300_OFST))
4626 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_301 register for the ALT_SMMU_SECURE instance. */
4627 #define ALT_SMMU_SECURE_SMMU_SSD_REG_301_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_301_OFST))
4628 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_302 register for the ALT_SMMU_SECURE instance. */
4629 #define ALT_SMMU_SECURE_SMMU_SSD_REG_302_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_302_OFST))
4630 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_303 register for the ALT_SMMU_SECURE instance. */
4631 #define ALT_SMMU_SECURE_SMMU_SSD_REG_303_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_303_OFST))
4632 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_304 register for the ALT_SMMU_SECURE instance. */
4633 #define ALT_SMMU_SECURE_SMMU_SSD_REG_304_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_304_OFST))
4634 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_305 register for the ALT_SMMU_SECURE instance. */
4635 #define ALT_SMMU_SECURE_SMMU_SSD_REG_305_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_305_OFST))
4636 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_306 register for the ALT_SMMU_SECURE instance. */
4637 #define ALT_SMMU_SECURE_SMMU_SSD_REG_306_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_306_OFST))
4638 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_307 register for the ALT_SMMU_SECURE instance. */
4639 #define ALT_SMMU_SECURE_SMMU_SSD_REG_307_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_307_OFST))
4640 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_308 register for the ALT_SMMU_SECURE instance. */
4641 #define ALT_SMMU_SECURE_SMMU_SSD_REG_308_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_308_OFST))
4642 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_309 register for the ALT_SMMU_SECURE instance. */
4643 #define ALT_SMMU_SECURE_SMMU_SSD_REG_309_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_309_OFST))
4644 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_310 register for the ALT_SMMU_SECURE instance. */
4645 #define ALT_SMMU_SECURE_SMMU_SSD_REG_310_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_310_OFST))
4646 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_311 register for the ALT_SMMU_SECURE instance. */
4647 #define ALT_SMMU_SECURE_SMMU_SSD_REG_311_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_311_OFST))
4648 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_312 register for the ALT_SMMU_SECURE instance. */
4649 #define ALT_SMMU_SECURE_SMMU_SSD_REG_312_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_312_OFST))
4650 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_313 register for the ALT_SMMU_SECURE instance. */
4651 #define ALT_SMMU_SECURE_SMMU_SSD_REG_313_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_313_OFST))
4652 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_314 register for the ALT_SMMU_SECURE instance. */
4653 #define ALT_SMMU_SECURE_SMMU_SSD_REG_314_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_314_OFST))
4654 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_315 register for the ALT_SMMU_SECURE instance. */
4655 #define ALT_SMMU_SECURE_SMMU_SSD_REG_315_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_315_OFST))
4656 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_316 register for the ALT_SMMU_SECURE instance. */
4657 #define ALT_SMMU_SECURE_SMMU_SSD_REG_316_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_316_OFST))
4658 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_317 register for the ALT_SMMU_SECURE instance. */
4659 #define ALT_SMMU_SECURE_SMMU_SSD_REG_317_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_317_OFST))
4660 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_318 register for the ALT_SMMU_SECURE instance. */
4661 #define ALT_SMMU_SECURE_SMMU_SSD_REG_318_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_318_OFST))
4662 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_319 register for the ALT_SMMU_SECURE instance. */
4663 #define ALT_SMMU_SECURE_SMMU_SSD_REG_319_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_319_OFST))
4664 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_320 register for the ALT_SMMU_SECURE instance. */
4665 #define ALT_SMMU_SECURE_SMMU_SSD_REG_320_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_320_OFST))
4666 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_321 register for the ALT_SMMU_SECURE instance. */
4667 #define ALT_SMMU_SECURE_SMMU_SSD_REG_321_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_321_OFST))
4668 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_322 register for the ALT_SMMU_SECURE instance. */
4669 #define ALT_SMMU_SECURE_SMMU_SSD_REG_322_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_322_OFST))
4670 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_323 register for the ALT_SMMU_SECURE instance. */
4671 #define ALT_SMMU_SECURE_SMMU_SSD_REG_323_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_323_OFST))
4672 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_324 register for the ALT_SMMU_SECURE instance. */
4673 #define ALT_SMMU_SECURE_SMMU_SSD_REG_324_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_324_OFST))
4674 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_325 register for the ALT_SMMU_SECURE instance. */
4675 #define ALT_SMMU_SECURE_SMMU_SSD_REG_325_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_325_OFST))
4676 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_326 register for the ALT_SMMU_SECURE instance. */
4677 #define ALT_SMMU_SECURE_SMMU_SSD_REG_326_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_326_OFST))
4678 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_327 register for the ALT_SMMU_SECURE instance. */
4679 #define ALT_SMMU_SECURE_SMMU_SSD_REG_327_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_327_OFST))
4680 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_328 register for the ALT_SMMU_SECURE instance. */
4681 #define ALT_SMMU_SECURE_SMMU_SSD_REG_328_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_328_OFST))
4682 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_329 register for the ALT_SMMU_SECURE instance. */
4683 #define ALT_SMMU_SECURE_SMMU_SSD_REG_329_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_329_OFST))
4684 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_330 register for the ALT_SMMU_SECURE instance. */
4685 #define ALT_SMMU_SECURE_SMMU_SSD_REG_330_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_330_OFST))
4686 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_331 register for the ALT_SMMU_SECURE instance. */
4687 #define ALT_SMMU_SECURE_SMMU_SSD_REG_331_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_331_OFST))
4688 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_332 register for the ALT_SMMU_SECURE instance. */
4689 #define ALT_SMMU_SECURE_SMMU_SSD_REG_332_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_332_OFST))
4690 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_333 register for the ALT_SMMU_SECURE instance. */
4691 #define ALT_SMMU_SECURE_SMMU_SSD_REG_333_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_333_OFST))
4692 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_334 register for the ALT_SMMU_SECURE instance. */
4693 #define ALT_SMMU_SECURE_SMMU_SSD_REG_334_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_334_OFST))
4694 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_335 register for the ALT_SMMU_SECURE instance. */
4695 #define ALT_SMMU_SECURE_SMMU_SSD_REG_335_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_335_OFST))
4696 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_336 register for the ALT_SMMU_SECURE instance. */
4697 #define ALT_SMMU_SECURE_SMMU_SSD_REG_336_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_336_OFST))
4698 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_337 register for the ALT_SMMU_SECURE instance. */
4699 #define ALT_SMMU_SECURE_SMMU_SSD_REG_337_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_337_OFST))
4700 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_338 register for the ALT_SMMU_SECURE instance. */
4701 #define ALT_SMMU_SECURE_SMMU_SSD_REG_338_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_338_OFST))
4702 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_339 register for the ALT_SMMU_SECURE instance. */
4703 #define ALT_SMMU_SECURE_SMMU_SSD_REG_339_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_339_OFST))
4704 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_340 register for the ALT_SMMU_SECURE instance. */
4705 #define ALT_SMMU_SECURE_SMMU_SSD_REG_340_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_340_OFST))
4706 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_341 register for the ALT_SMMU_SECURE instance. */
4707 #define ALT_SMMU_SECURE_SMMU_SSD_REG_341_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_341_OFST))
4708 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_342 register for the ALT_SMMU_SECURE instance. */
4709 #define ALT_SMMU_SECURE_SMMU_SSD_REG_342_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_342_OFST))
4710 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_343 register for the ALT_SMMU_SECURE instance. */
4711 #define ALT_SMMU_SECURE_SMMU_SSD_REG_343_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_343_OFST))
4712 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_344 register for the ALT_SMMU_SECURE instance. */
4713 #define ALT_SMMU_SECURE_SMMU_SSD_REG_344_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_344_OFST))
4714 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_345 register for the ALT_SMMU_SECURE instance. */
4715 #define ALT_SMMU_SECURE_SMMU_SSD_REG_345_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_345_OFST))
4716 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_346 register for the ALT_SMMU_SECURE instance. */
4717 #define ALT_SMMU_SECURE_SMMU_SSD_REG_346_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_346_OFST))
4718 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_347 register for the ALT_SMMU_SECURE instance. */
4719 #define ALT_SMMU_SECURE_SMMU_SSD_REG_347_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_347_OFST))
4720 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_348 register for the ALT_SMMU_SECURE instance. */
4721 #define ALT_SMMU_SECURE_SMMU_SSD_REG_348_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_348_OFST))
4722 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_349 register for the ALT_SMMU_SECURE instance. */
4723 #define ALT_SMMU_SECURE_SMMU_SSD_REG_349_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_349_OFST))
4724 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_350 register for the ALT_SMMU_SECURE instance. */
4725 #define ALT_SMMU_SECURE_SMMU_SSD_REG_350_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_350_OFST))
4726 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_351 register for the ALT_SMMU_SECURE instance. */
4727 #define ALT_SMMU_SECURE_SMMU_SSD_REG_351_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_351_OFST))
4728 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_352 register for the ALT_SMMU_SECURE instance. */
4729 #define ALT_SMMU_SECURE_SMMU_SSD_REG_352_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_352_OFST))
4730 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_353 register for the ALT_SMMU_SECURE instance. */
4731 #define ALT_SMMU_SECURE_SMMU_SSD_REG_353_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_353_OFST))
4732 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_354 register for the ALT_SMMU_SECURE instance. */
4733 #define ALT_SMMU_SECURE_SMMU_SSD_REG_354_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_354_OFST))
4734 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_355 register for the ALT_SMMU_SECURE instance. */
4735 #define ALT_SMMU_SECURE_SMMU_SSD_REG_355_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_355_OFST))
4736 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_356 register for the ALT_SMMU_SECURE instance. */
4737 #define ALT_SMMU_SECURE_SMMU_SSD_REG_356_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_356_OFST))
4738 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_357 register for the ALT_SMMU_SECURE instance. */
4739 #define ALT_SMMU_SECURE_SMMU_SSD_REG_357_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_357_OFST))
4740 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_358 register for the ALT_SMMU_SECURE instance. */
4741 #define ALT_SMMU_SECURE_SMMU_SSD_REG_358_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_358_OFST))
4742 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_359 register for the ALT_SMMU_SECURE instance. */
4743 #define ALT_SMMU_SECURE_SMMU_SSD_REG_359_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_359_OFST))
4744 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_360 register for the ALT_SMMU_SECURE instance. */
4745 #define ALT_SMMU_SECURE_SMMU_SSD_REG_360_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_360_OFST))
4746 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_361 register for the ALT_SMMU_SECURE instance. */
4747 #define ALT_SMMU_SECURE_SMMU_SSD_REG_361_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_361_OFST))
4748 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_362 register for the ALT_SMMU_SECURE instance. */
4749 #define ALT_SMMU_SECURE_SMMU_SSD_REG_362_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_362_OFST))
4750 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_363 register for the ALT_SMMU_SECURE instance. */
4751 #define ALT_SMMU_SECURE_SMMU_SSD_REG_363_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_363_OFST))
4752 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_364 register for the ALT_SMMU_SECURE instance. */
4753 #define ALT_SMMU_SECURE_SMMU_SSD_REG_364_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_364_OFST))
4754 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_365 register for the ALT_SMMU_SECURE instance. */
4755 #define ALT_SMMU_SECURE_SMMU_SSD_REG_365_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_365_OFST))
4756 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_366 register for the ALT_SMMU_SECURE instance. */
4757 #define ALT_SMMU_SECURE_SMMU_SSD_REG_366_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_366_OFST))
4758 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_367 register for the ALT_SMMU_SECURE instance. */
4759 #define ALT_SMMU_SECURE_SMMU_SSD_REG_367_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_367_OFST))
4760 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_368 register for the ALT_SMMU_SECURE instance. */
4761 #define ALT_SMMU_SECURE_SMMU_SSD_REG_368_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_368_OFST))
4762 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_369 register for the ALT_SMMU_SECURE instance. */
4763 #define ALT_SMMU_SECURE_SMMU_SSD_REG_369_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_369_OFST))
4764 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_370 register for the ALT_SMMU_SECURE instance. */
4765 #define ALT_SMMU_SECURE_SMMU_SSD_REG_370_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_370_OFST))
4766 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_371 register for the ALT_SMMU_SECURE instance. */
4767 #define ALT_SMMU_SECURE_SMMU_SSD_REG_371_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_371_OFST))
4768 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_372 register for the ALT_SMMU_SECURE instance. */
4769 #define ALT_SMMU_SECURE_SMMU_SSD_REG_372_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_372_OFST))
4770 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_373 register for the ALT_SMMU_SECURE instance. */
4771 #define ALT_SMMU_SECURE_SMMU_SSD_REG_373_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_373_OFST))
4772 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_374 register for the ALT_SMMU_SECURE instance. */
4773 #define ALT_SMMU_SECURE_SMMU_SSD_REG_374_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_374_OFST))
4774 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_375 register for the ALT_SMMU_SECURE instance. */
4775 #define ALT_SMMU_SECURE_SMMU_SSD_REG_375_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_375_OFST))
4776 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_376 register for the ALT_SMMU_SECURE instance. */
4777 #define ALT_SMMU_SECURE_SMMU_SSD_REG_376_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_376_OFST))
4778 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_377 register for the ALT_SMMU_SECURE instance. */
4779 #define ALT_SMMU_SECURE_SMMU_SSD_REG_377_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_377_OFST))
4780 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_378 register for the ALT_SMMU_SECURE instance. */
4781 #define ALT_SMMU_SECURE_SMMU_SSD_REG_378_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_378_OFST))
4782 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_379 register for the ALT_SMMU_SECURE instance. */
4783 #define ALT_SMMU_SECURE_SMMU_SSD_REG_379_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_379_OFST))
4784 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_380 register for the ALT_SMMU_SECURE instance. */
4785 #define ALT_SMMU_SECURE_SMMU_SSD_REG_380_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_380_OFST))
4786 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_381 register for the ALT_SMMU_SECURE instance. */
4787 #define ALT_SMMU_SECURE_SMMU_SSD_REG_381_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_381_OFST))
4788 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_382 register for the ALT_SMMU_SECURE instance. */
4789 #define ALT_SMMU_SECURE_SMMU_SSD_REG_382_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_382_OFST))
4790 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_383 register for the ALT_SMMU_SECURE instance. */
4791 #define ALT_SMMU_SECURE_SMMU_SSD_REG_383_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_383_OFST))
4792 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_384 register for the ALT_SMMU_SECURE instance. */
4793 #define ALT_SMMU_SECURE_SMMU_SSD_REG_384_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_384_OFST))
4794 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_385 register for the ALT_SMMU_SECURE instance. */
4795 #define ALT_SMMU_SECURE_SMMU_SSD_REG_385_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_385_OFST))
4796 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_386 register for the ALT_SMMU_SECURE instance. */
4797 #define ALT_SMMU_SECURE_SMMU_SSD_REG_386_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_386_OFST))
4798 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_387 register for the ALT_SMMU_SECURE instance. */
4799 #define ALT_SMMU_SECURE_SMMU_SSD_REG_387_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_387_OFST))
4800 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_388 register for the ALT_SMMU_SECURE instance. */
4801 #define ALT_SMMU_SECURE_SMMU_SSD_REG_388_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_388_OFST))
4802 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_389 register for the ALT_SMMU_SECURE instance. */
4803 #define ALT_SMMU_SECURE_SMMU_SSD_REG_389_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_389_OFST))
4804 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_390 register for the ALT_SMMU_SECURE instance. */
4805 #define ALT_SMMU_SECURE_SMMU_SSD_REG_390_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_390_OFST))
4806 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_391 register for the ALT_SMMU_SECURE instance. */
4807 #define ALT_SMMU_SECURE_SMMU_SSD_REG_391_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_391_OFST))
4808 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_392 register for the ALT_SMMU_SECURE instance. */
4809 #define ALT_SMMU_SECURE_SMMU_SSD_REG_392_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_392_OFST))
4810 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_393 register for the ALT_SMMU_SECURE instance. */
4811 #define ALT_SMMU_SECURE_SMMU_SSD_REG_393_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_393_OFST))
4812 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_394 register for the ALT_SMMU_SECURE instance. */
4813 #define ALT_SMMU_SECURE_SMMU_SSD_REG_394_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_394_OFST))
4814 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_395 register for the ALT_SMMU_SECURE instance. */
4815 #define ALT_SMMU_SECURE_SMMU_SSD_REG_395_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_395_OFST))
4816 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_396 register for the ALT_SMMU_SECURE instance. */
4817 #define ALT_SMMU_SECURE_SMMU_SSD_REG_396_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_396_OFST))
4818 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_397 register for the ALT_SMMU_SECURE instance. */
4819 #define ALT_SMMU_SECURE_SMMU_SSD_REG_397_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_397_OFST))
4820 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_398 register for the ALT_SMMU_SECURE instance. */
4821 #define ALT_SMMU_SECURE_SMMU_SSD_REG_398_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_398_OFST))
4822 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_399 register for the ALT_SMMU_SECURE instance. */
4823 #define ALT_SMMU_SECURE_SMMU_SSD_REG_399_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_399_OFST))
4824 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_400 register for the ALT_SMMU_SECURE instance. */
4825 #define ALT_SMMU_SECURE_SMMU_SSD_REG_400_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_400_OFST))
4826 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_401 register for the ALT_SMMU_SECURE instance. */
4827 #define ALT_SMMU_SECURE_SMMU_SSD_REG_401_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_401_OFST))
4828 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_402 register for the ALT_SMMU_SECURE instance. */
4829 #define ALT_SMMU_SECURE_SMMU_SSD_REG_402_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_402_OFST))
4830 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_403 register for the ALT_SMMU_SECURE instance. */
4831 #define ALT_SMMU_SECURE_SMMU_SSD_REG_403_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_403_OFST))
4832 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_404 register for the ALT_SMMU_SECURE instance. */
4833 #define ALT_SMMU_SECURE_SMMU_SSD_REG_404_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_404_OFST))
4834 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_405 register for the ALT_SMMU_SECURE instance. */
4835 #define ALT_SMMU_SECURE_SMMU_SSD_REG_405_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_405_OFST))
4836 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_406 register for the ALT_SMMU_SECURE instance. */
4837 #define ALT_SMMU_SECURE_SMMU_SSD_REG_406_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_406_OFST))
4838 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_407 register for the ALT_SMMU_SECURE instance. */
4839 #define ALT_SMMU_SECURE_SMMU_SSD_REG_407_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_407_OFST))
4840 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_408 register for the ALT_SMMU_SECURE instance. */
4841 #define ALT_SMMU_SECURE_SMMU_SSD_REG_408_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_408_OFST))
4842 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_409 register for the ALT_SMMU_SECURE instance. */
4843 #define ALT_SMMU_SECURE_SMMU_SSD_REG_409_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_409_OFST))
4844 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_410 register for the ALT_SMMU_SECURE instance. */
4845 #define ALT_SMMU_SECURE_SMMU_SSD_REG_410_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_410_OFST))
4846 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_411 register for the ALT_SMMU_SECURE instance. */
4847 #define ALT_SMMU_SECURE_SMMU_SSD_REG_411_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_411_OFST))
4848 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_412 register for the ALT_SMMU_SECURE instance. */
4849 #define ALT_SMMU_SECURE_SMMU_SSD_REG_412_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_412_OFST))
4850 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_413 register for the ALT_SMMU_SECURE instance. */
4851 #define ALT_SMMU_SECURE_SMMU_SSD_REG_413_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_413_OFST))
4852 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_414 register for the ALT_SMMU_SECURE instance. */
4853 #define ALT_SMMU_SECURE_SMMU_SSD_REG_414_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_414_OFST))
4854 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_415 register for the ALT_SMMU_SECURE instance. */
4855 #define ALT_SMMU_SECURE_SMMU_SSD_REG_415_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_415_OFST))
4856 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_416 register for the ALT_SMMU_SECURE instance. */
4857 #define ALT_SMMU_SECURE_SMMU_SSD_REG_416_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_416_OFST))
4858 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_417 register for the ALT_SMMU_SECURE instance. */
4859 #define ALT_SMMU_SECURE_SMMU_SSD_REG_417_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_417_OFST))
4860 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_418 register for the ALT_SMMU_SECURE instance. */
4861 #define ALT_SMMU_SECURE_SMMU_SSD_REG_418_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_418_OFST))
4862 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_419 register for the ALT_SMMU_SECURE instance. */
4863 #define ALT_SMMU_SECURE_SMMU_SSD_REG_419_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_419_OFST))
4864 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_420 register for the ALT_SMMU_SECURE instance. */
4865 #define ALT_SMMU_SECURE_SMMU_SSD_REG_420_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_420_OFST))
4866 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_421 register for the ALT_SMMU_SECURE instance. */
4867 #define ALT_SMMU_SECURE_SMMU_SSD_REG_421_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_421_OFST))
4868 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_422 register for the ALT_SMMU_SECURE instance. */
4869 #define ALT_SMMU_SECURE_SMMU_SSD_REG_422_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_422_OFST))
4870 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_423 register for the ALT_SMMU_SECURE instance. */
4871 #define ALT_SMMU_SECURE_SMMU_SSD_REG_423_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_423_OFST))
4872 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_424 register for the ALT_SMMU_SECURE instance. */
4873 #define ALT_SMMU_SECURE_SMMU_SSD_REG_424_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_424_OFST))
4874 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_425 register for the ALT_SMMU_SECURE instance. */
4875 #define ALT_SMMU_SECURE_SMMU_SSD_REG_425_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_425_OFST))
4876 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_426 register for the ALT_SMMU_SECURE instance. */
4877 #define ALT_SMMU_SECURE_SMMU_SSD_REG_426_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_426_OFST))
4878 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_427 register for the ALT_SMMU_SECURE instance. */
4879 #define ALT_SMMU_SECURE_SMMU_SSD_REG_427_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_427_OFST))
4880 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_428 register for the ALT_SMMU_SECURE instance. */
4881 #define ALT_SMMU_SECURE_SMMU_SSD_REG_428_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_428_OFST))
4882 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_429 register for the ALT_SMMU_SECURE instance. */
4883 #define ALT_SMMU_SECURE_SMMU_SSD_REG_429_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_429_OFST))
4884 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_430 register for the ALT_SMMU_SECURE instance. */
4885 #define ALT_SMMU_SECURE_SMMU_SSD_REG_430_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_430_OFST))
4886 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_431 register for the ALT_SMMU_SECURE instance. */
4887 #define ALT_SMMU_SECURE_SMMU_SSD_REG_431_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_431_OFST))
4888 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_432 register for the ALT_SMMU_SECURE instance. */
4889 #define ALT_SMMU_SECURE_SMMU_SSD_REG_432_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_432_OFST))
4890 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_433 register for the ALT_SMMU_SECURE instance. */
4891 #define ALT_SMMU_SECURE_SMMU_SSD_REG_433_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_433_OFST))
4892 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_434 register for the ALT_SMMU_SECURE instance. */
4893 #define ALT_SMMU_SECURE_SMMU_SSD_REG_434_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_434_OFST))
4894 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_435 register for the ALT_SMMU_SECURE instance. */
4895 #define ALT_SMMU_SECURE_SMMU_SSD_REG_435_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_435_OFST))
4896 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_436 register for the ALT_SMMU_SECURE instance. */
4897 #define ALT_SMMU_SECURE_SMMU_SSD_REG_436_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_436_OFST))
4898 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_437 register for the ALT_SMMU_SECURE instance. */
4899 #define ALT_SMMU_SECURE_SMMU_SSD_REG_437_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_437_OFST))
4900 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_438 register for the ALT_SMMU_SECURE instance. */
4901 #define ALT_SMMU_SECURE_SMMU_SSD_REG_438_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_438_OFST))
4902 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_439 register for the ALT_SMMU_SECURE instance. */
4903 #define ALT_SMMU_SECURE_SMMU_SSD_REG_439_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_439_OFST))
4904 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_440 register for the ALT_SMMU_SECURE instance. */
4905 #define ALT_SMMU_SECURE_SMMU_SSD_REG_440_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_440_OFST))
4906 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_441 register for the ALT_SMMU_SECURE instance. */
4907 #define ALT_SMMU_SECURE_SMMU_SSD_REG_441_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_441_OFST))
4908 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_442 register for the ALT_SMMU_SECURE instance. */
4909 #define ALT_SMMU_SECURE_SMMU_SSD_REG_442_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_442_OFST))
4910 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_443 register for the ALT_SMMU_SECURE instance. */
4911 #define ALT_SMMU_SECURE_SMMU_SSD_REG_443_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_443_OFST))
4912 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_444 register for the ALT_SMMU_SECURE instance. */
4913 #define ALT_SMMU_SECURE_SMMU_SSD_REG_444_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_444_OFST))
4914 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_445 register for the ALT_SMMU_SECURE instance. */
4915 #define ALT_SMMU_SECURE_SMMU_SSD_REG_445_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_445_OFST))
4916 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_446 register for the ALT_SMMU_SECURE instance. */
4917 #define ALT_SMMU_SECURE_SMMU_SSD_REG_446_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_446_OFST))
4918 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_447 register for the ALT_SMMU_SECURE instance. */
4919 #define ALT_SMMU_SECURE_SMMU_SSD_REG_447_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_447_OFST))
4920 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_448 register for the ALT_SMMU_SECURE instance. */
4921 #define ALT_SMMU_SECURE_SMMU_SSD_REG_448_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_448_OFST))
4922 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_449 register for the ALT_SMMU_SECURE instance. */
4923 #define ALT_SMMU_SECURE_SMMU_SSD_REG_449_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_449_OFST))
4924 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_450 register for the ALT_SMMU_SECURE instance. */
4925 #define ALT_SMMU_SECURE_SMMU_SSD_REG_450_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_450_OFST))
4926 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_451 register for the ALT_SMMU_SECURE instance. */
4927 #define ALT_SMMU_SECURE_SMMU_SSD_REG_451_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_451_OFST))
4928 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_452 register for the ALT_SMMU_SECURE instance. */
4929 #define ALT_SMMU_SECURE_SMMU_SSD_REG_452_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_452_OFST))
4930 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_453 register for the ALT_SMMU_SECURE instance. */
4931 #define ALT_SMMU_SECURE_SMMU_SSD_REG_453_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_453_OFST))
4932 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_454 register for the ALT_SMMU_SECURE instance. */
4933 #define ALT_SMMU_SECURE_SMMU_SSD_REG_454_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_454_OFST))
4934 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_455 register for the ALT_SMMU_SECURE instance. */
4935 #define ALT_SMMU_SECURE_SMMU_SSD_REG_455_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_455_OFST))
4936 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_456 register for the ALT_SMMU_SECURE instance. */
4937 #define ALT_SMMU_SECURE_SMMU_SSD_REG_456_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_456_OFST))
4938 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_457 register for the ALT_SMMU_SECURE instance. */
4939 #define ALT_SMMU_SECURE_SMMU_SSD_REG_457_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_457_OFST))
4940 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_458 register for the ALT_SMMU_SECURE instance. */
4941 #define ALT_SMMU_SECURE_SMMU_SSD_REG_458_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_458_OFST))
4942 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_459 register for the ALT_SMMU_SECURE instance. */
4943 #define ALT_SMMU_SECURE_SMMU_SSD_REG_459_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_459_OFST))
4944 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_460 register for the ALT_SMMU_SECURE instance. */
4945 #define ALT_SMMU_SECURE_SMMU_SSD_REG_460_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_460_OFST))
4946 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_461 register for the ALT_SMMU_SECURE instance. */
4947 #define ALT_SMMU_SECURE_SMMU_SSD_REG_461_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_461_OFST))
4948 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_462 register for the ALT_SMMU_SECURE instance. */
4949 #define ALT_SMMU_SECURE_SMMU_SSD_REG_462_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_462_OFST))
4950 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_463 register for the ALT_SMMU_SECURE instance. */
4951 #define ALT_SMMU_SECURE_SMMU_SSD_REG_463_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_463_OFST))
4952 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_464 register for the ALT_SMMU_SECURE instance. */
4953 #define ALT_SMMU_SECURE_SMMU_SSD_REG_464_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_464_OFST))
4954 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_465 register for the ALT_SMMU_SECURE instance. */
4955 #define ALT_SMMU_SECURE_SMMU_SSD_REG_465_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_465_OFST))
4956 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_466 register for the ALT_SMMU_SECURE instance. */
4957 #define ALT_SMMU_SECURE_SMMU_SSD_REG_466_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_466_OFST))
4958 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_467 register for the ALT_SMMU_SECURE instance. */
4959 #define ALT_SMMU_SECURE_SMMU_SSD_REG_467_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_467_OFST))
4960 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_468 register for the ALT_SMMU_SECURE instance. */
4961 #define ALT_SMMU_SECURE_SMMU_SSD_REG_468_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_468_OFST))
4962 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_469 register for the ALT_SMMU_SECURE instance. */
4963 #define ALT_SMMU_SECURE_SMMU_SSD_REG_469_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_469_OFST))
4964 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_470 register for the ALT_SMMU_SECURE instance. */
4965 #define ALT_SMMU_SECURE_SMMU_SSD_REG_470_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_470_OFST))
4966 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_471 register for the ALT_SMMU_SECURE instance. */
4967 #define ALT_SMMU_SECURE_SMMU_SSD_REG_471_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_471_OFST))
4968 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_472 register for the ALT_SMMU_SECURE instance. */
4969 #define ALT_SMMU_SECURE_SMMU_SSD_REG_472_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_472_OFST))
4970 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_473 register for the ALT_SMMU_SECURE instance. */
4971 #define ALT_SMMU_SECURE_SMMU_SSD_REG_473_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_473_OFST))
4972 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_474 register for the ALT_SMMU_SECURE instance. */
4973 #define ALT_SMMU_SECURE_SMMU_SSD_REG_474_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_474_OFST))
4974 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_475 register for the ALT_SMMU_SECURE instance. */
4975 #define ALT_SMMU_SECURE_SMMU_SSD_REG_475_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_475_OFST))
4976 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_476 register for the ALT_SMMU_SECURE instance. */
4977 #define ALT_SMMU_SECURE_SMMU_SSD_REG_476_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_476_OFST))
4978 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_477 register for the ALT_SMMU_SECURE instance. */
4979 #define ALT_SMMU_SECURE_SMMU_SSD_REG_477_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_477_OFST))
4980 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_478 register for the ALT_SMMU_SECURE instance. */
4981 #define ALT_SMMU_SECURE_SMMU_SSD_REG_478_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_478_OFST))
4982 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_479 register for the ALT_SMMU_SECURE instance. */
4983 #define ALT_SMMU_SECURE_SMMU_SSD_REG_479_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_479_OFST))
4984 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_480 register for the ALT_SMMU_SECURE instance. */
4985 #define ALT_SMMU_SECURE_SMMU_SSD_REG_480_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_480_OFST))
4986 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_481 register for the ALT_SMMU_SECURE instance. */
4987 #define ALT_SMMU_SECURE_SMMU_SSD_REG_481_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_481_OFST))
4988 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_482 register for the ALT_SMMU_SECURE instance. */
4989 #define ALT_SMMU_SECURE_SMMU_SSD_REG_482_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_482_OFST))
4990 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_483 register for the ALT_SMMU_SECURE instance. */
4991 #define ALT_SMMU_SECURE_SMMU_SSD_REG_483_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_483_OFST))
4992 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_484 register for the ALT_SMMU_SECURE instance. */
4993 #define ALT_SMMU_SECURE_SMMU_SSD_REG_484_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_484_OFST))
4994 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_485 register for the ALT_SMMU_SECURE instance. */
4995 #define ALT_SMMU_SECURE_SMMU_SSD_REG_485_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_485_OFST))
4996 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_486 register for the ALT_SMMU_SECURE instance. */
4997 #define ALT_SMMU_SECURE_SMMU_SSD_REG_486_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_486_OFST))
4998 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_487 register for the ALT_SMMU_SECURE instance. */
4999 #define ALT_SMMU_SECURE_SMMU_SSD_REG_487_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_487_OFST))
5000 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_488 register for the ALT_SMMU_SECURE instance. */
5001 #define ALT_SMMU_SECURE_SMMU_SSD_REG_488_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_488_OFST))
5002 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_489 register for the ALT_SMMU_SECURE instance. */
5003 #define ALT_SMMU_SECURE_SMMU_SSD_REG_489_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_489_OFST))
5004 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_490 register for the ALT_SMMU_SECURE instance. */
5005 #define ALT_SMMU_SECURE_SMMU_SSD_REG_490_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_490_OFST))
5006 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_491 register for the ALT_SMMU_SECURE instance. */
5007 #define ALT_SMMU_SECURE_SMMU_SSD_REG_491_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_491_OFST))
5008 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_492 register for the ALT_SMMU_SECURE instance. */
5009 #define ALT_SMMU_SECURE_SMMU_SSD_REG_492_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_492_OFST))
5010 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_493 register for the ALT_SMMU_SECURE instance. */
5011 #define ALT_SMMU_SECURE_SMMU_SSD_REG_493_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_493_OFST))
5012 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_494 register for the ALT_SMMU_SECURE instance. */
5013 #define ALT_SMMU_SECURE_SMMU_SSD_REG_494_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_494_OFST))
5014 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_495 register for the ALT_SMMU_SECURE instance. */
5015 #define ALT_SMMU_SECURE_SMMU_SSD_REG_495_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_495_OFST))
5016 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_496 register for the ALT_SMMU_SECURE instance. */
5017 #define ALT_SMMU_SECURE_SMMU_SSD_REG_496_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_496_OFST))
5018 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_497 register for the ALT_SMMU_SECURE instance. */
5019 #define ALT_SMMU_SECURE_SMMU_SSD_REG_497_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_497_OFST))
5020 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_498 register for the ALT_SMMU_SECURE instance. */
5021 #define ALT_SMMU_SECURE_SMMU_SSD_REG_498_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_498_OFST))
5022 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_499 register for the ALT_SMMU_SECURE instance. */
5023 #define ALT_SMMU_SECURE_SMMU_SSD_REG_499_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_499_OFST))
5024 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_500 register for the ALT_SMMU_SECURE instance. */
5025 #define ALT_SMMU_SECURE_SMMU_SSD_REG_500_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_500_OFST))
5026 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_501 register for the ALT_SMMU_SECURE instance. */
5027 #define ALT_SMMU_SECURE_SMMU_SSD_REG_501_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_501_OFST))
5028 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_502 register for the ALT_SMMU_SECURE instance. */
5029 #define ALT_SMMU_SECURE_SMMU_SSD_REG_502_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_502_OFST))
5030 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_503 register for the ALT_SMMU_SECURE instance. */
5031 #define ALT_SMMU_SECURE_SMMU_SSD_REG_503_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_503_OFST))
5032 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_504 register for the ALT_SMMU_SECURE instance. */
5033 #define ALT_SMMU_SECURE_SMMU_SSD_REG_504_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_504_OFST))
5034 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_505 register for the ALT_SMMU_SECURE instance. */
5035 #define ALT_SMMU_SECURE_SMMU_SSD_REG_505_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_505_OFST))
5036 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_506 register for the ALT_SMMU_SECURE instance. */
5037 #define ALT_SMMU_SECURE_SMMU_SSD_REG_506_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_506_OFST))
5038 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_507 register for the ALT_SMMU_SECURE instance. */
5039 #define ALT_SMMU_SECURE_SMMU_SSD_REG_507_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_507_OFST))
5040 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_508 register for the ALT_SMMU_SECURE instance. */
5041 #define ALT_SMMU_SECURE_SMMU_SSD_REG_508_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_508_OFST))
5042 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_509 register for the ALT_SMMU_SECURE instance. */
5043 #define ALT_SMMU_SECURE_SMMU_SSD_REG_509_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_509_OFST))
5044 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_510 register for the ALT_SMMU_SECURE instance. */
5045 #define ALT_SMMU_SECURE_SMMU_SSD_REG_510_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_510_OFST))
5046 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_511 register for the ALT_SMMU_SECURE instance. */
5047 #define ALT_SMMU_SECURE_SMMU_SSD_REG_511_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_511_OFST))
5048 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_512 register for the ALT_SMMU_SECURE instance. */
5049 #define ALT_SMMU_SECURE_SMMU_SSD_REG_512_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_512_OFST))
5050 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_513 register for the ALT_SMMU_SECURE instance. */
5051 #define ALT_SMMU_SECURE_SMMU_SSD_REG_513_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_513_OFST))
5052 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_514 register for the ALT_SMMU_SECURE instance. */
5053 #define ALT_SMMU_SECURE_SMMU_SSD_REG_514_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_514_OFST))
5054 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_515 register for the ALT_SMMU_SECURE instance. */
5055 #define ALT_SMMU_SECURE_SMMU_SSD_REG_515_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_515_OFST))
5056 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_516 register for the ALT_SMMU_SECURE instance. */
5057 #define ALT_SMMU_SECURE_SMMU_SSD_REG_516_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_516_OFST))
5058 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_517 register for the ALT_SMMU_SECURE instance. */
5059 #define ALT_SMMU_SECURE_SMMU_SSD_REG_517_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_517_OFST))
5060 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_518 register for the ALT_SMMU_SECURE instance. */
5061 #define ALT_SMMU_SECURE_SMMU_SSD_REG_518_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_518_OFST))
5062 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_519 register for the ALT_SMMU_SECURE instance. */
5063 #define ALT_SMMU_SECURE_SMMU_SSD_REG_519_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_519_OFST))
5064 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_520 register for the ALT_SMMU_SECURE instance. */
5065 #define ALT_SMMU_SECURE_SMMU_SSD_REG_520_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_520_OFST))
5066 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_521 register for the ALT_SMMU_SECURE instance. */
5067 #define ALT_SMMU_SECURE_SMMU_SSD_REG_521_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_521_OFST))
5068 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_522 register for the ALT_SMMU_SECURE instance. */
5069 #define ALT_SMMU_SECURE_SMMU_SSD_REG_522_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_522_OFST))
5070 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_523 register for the ALT_SMMU_SECURE instance. */
5071 #define ALT_SMMU_SECURE_SMMU_SSD_REG_523_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_523_OFST))
5072 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_524 register for the ALT_SMMU_SECURE instance. */
5073 #define ALT_SMMU_SECURE_SMMU_SSD_REG_524_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_524_OFST))
5074 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_525 register for the ALT_SMMU_SECURE instance. */
5075 #define ALT_SMMU_SECURE_SMMU_SSD_REG_525_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_525_OFST))
5076 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_526 register for the ALT_SMMU_SECURE instance. */
5077 #define ALT_SMMU_SECURE_SMMU_SSD_REG_526_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_526_OFST))
5078 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_527 register for the ALT_SMMU_SECURE instance. */
5079 #define ALT_SMMU_SECURE_SMMU_SSD_REG_527_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_527_OFST))
5080 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_528 register for the ALT_SMMU_SECURE instance. */
5081 #define ALT_SMMU_SECURE_SMMU_SSD_REG_528_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_528_OFST))
5082 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_529 register for the ALT_SMMU_SECURE instance. */
5083 #define ALT_SMMU_SECURE_SMMU_SSD_REG_529_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_529_OFST))
5084 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_530 register for the ALT_SMMU_SECURE instance. */
5085 #define ALT_SMMU_SECURE_SMMU_SSD_REG_530_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_530_OFST))
5086 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_531 register for the ALT_SMMU_SECURE instance. */
5087 #define ALT_SMMU_SECURE_SMMU_SSD_REG_531_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_531_OFST))
5088 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_532 register for the ALT_SMMU_SECURE instance. */
5089 #define ALT_SMMU_SECURE_SMMU_SSD_REG_532_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_532_OFST))
5090 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_533 register for the ALT_SMMU_SECURE instance. */
5091 #define ALT_SMMU_SECURE_SMMU_SSD_REG_533_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_533_OFST))
5092 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_534 register for the ALT_SMMU_SECURE instance. */
5093 #define ALT_SMMU_SECURE_SMMU_SSD_REG_534_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_534_OFST))
5094 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_535 register for the ALT_SMMU_SECURE instance. */
5095 #define ALT_SMMU_SECURE_SMMU_SSD_REG_535_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_535_OFST))
5096 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_536 register for the ALT_SMMU_SECURE instance. */
5097 #define ALT_SMMU_SECURE_SMMU_SSD_REG_536_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_536_OFST))
5098 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_537 register for the ALT_SMMU_SECURE instance. */
5099 #define ALT_SMMU_SECURE_SMMU_SSD_REG_537_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_537_OFST))
5100 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_538 register for the ALT_SMMU_SECURE instance. */
5101 #define ALT_SMMU_SECURE_SMMU_SSD_REG_538_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_538_OFST))
5102 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_539 register for the ALT_SMMU_SECURE instance. */
5103 #define ALT_SMMU_SECURE_SMMU_SSD_REG_539_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_539_OFST))
5104 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_540 register for the ALT_SMMU_SECURE instance. */
5105 #define ALT_SMMU_SECURE_SMMU_SSD_REG_540_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_540_OFST))
5106 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_541 register for the ALT_SMMU_SECURE instance. */
5107 #define ALT_SMMU_SECURE_SMMU_SSD_REG_541_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_541_OFST))
5108 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_542 register for the ALT_SMMU_SECURE instance. */
5109 #define ALT_SMMU_SECURE_SMMU_SSD_REG_542_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_542_OFST))
5110 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_543 register for the ALT_SMMU_SECURE instance. */
5111 #define ALT_SMMU_SECURE_SMMU_SSD_REG_543_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_543_OFST))
5112 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_544 register for the ALT_SMMU_SECURE instance. */
5113 #define ALT_SMMU_SECURE_SMMU_SSD_REG_544_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_544_OFST))
5114 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_545 register for the ALT_SMMU_SECURE instance. */
5115 #define ALT_SMMU_SECURE_SMMU_SSD_REG_545_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_545_OFST))
5116 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_546 register for the ALT_SMMU_SECURE instance. */
5117 #define ALT_SMMU_SECURE_SMMU_SSD_REG_546_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_546_OFST))
5118 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_547 register for the ALT_SMMU_SECURE instance. */
5119 #define ALT_SMMU_SECURE_SMMU_SSD_REG_547_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_547_OFST))
5120 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_548 register for the ALT_SMMU_SECURE instance. */
5121 #define ALT_SMMU_SECURE_SMMU_SSD_REG_548_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_548_OFST))
5122 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_549 register for the ALT_SMMU_SECURE instance. */
5123 #define ALT_SMMU_SECURE_SMMU_SSD_REG_549_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_549_OFST))
5124 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_550 register for the ALT_SMMU_SECURE instance. */
5125 #define ALT_SMMU_SECURE_SMMU_SSD_REG_550_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_550_OFST))
5126 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_551 register for the ALT_SMMU_SECURE instance. */
5127 #define ALT_SMMU_SECURE_SMMU_SSD_REG_551_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_551_OFST))
5128 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_552 register for the ALT_SMMU_SECURE instance. */
5129 #define ALT_SMMU_SECURE_SMMU_SSD_REG_552_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_552_OFST))
5130 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_553 register for the ALT_SMMU_SECURE instance. */
5131 #define ALT_SMMU_SECURE_SMMU_SSD_REG_553_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_553_OFST))
5132 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_554 register for the ALT_SMMU_SECURE instance. */
5133 #define ALT_SMMU_SECURE_SMMU_SSD_REG_554_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_554_OFST))
5134 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_555 register for the ALT_SMMU_SECURE instance. */
5135 #define ALT_SMMU_SECURE_SMMU_SSD_REG_555_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_555_OFST))
5136 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_556 register for the ALT_SMMU_SECURE instance. */
5137 #define ALT_SMMU_SECURE_SMMU_SSD_REG_556_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_556_OFST))
5138 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_557 register for the ALT_SMMU_SECURE instance. */
5139 #define ALT_SMMU_SECURE_SMMU_SSD_REG_557_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_557_OFST))
5140 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_558 register for the ALT_SMMU_SECURE instance. */
5141 #define ALT_SMMU_SECURE_SMMU_SSD_REG_558_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_558_OFST))
5142 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_559 register for the ALT_SMMU_SECURE instance. */
5143 #define ALT_SMMU_SECURE_SMMU_SSD_REG_559_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_559_OFST))
5144 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_560 register for the ALT_SMMU_SECURE instance. */
5145 #define ALT_SMMU_SECURE_SMMU_SSD_REG_560_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_560_OFST))
5146 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_561 register for the ALT_SMMU_SECURE instance. */
5147 #define ALT_SMMU_SECURE_SMMU_SSD_REG_561_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_561_OFST))
5148 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_562 register for the ALT_SMMU_SECURE instance. */
5149 #define ALT_SMMU_SECURE_SMMU_SSD_REG_562_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_562_OFST))
5150 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_563 register for the ALT_SMMU_SECURE instance. */
5151 #define ALT_SMMU_SECURE_SMMU_SSD_REG_563_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_563_OFST))
5152 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_564 register for the ALT_SMMU_SECURE instance. */
5153 #define ALT_SMMU_SECURE_SMMU_SSD_REG_564_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_564_OFST))
5154 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_565 register for the ALT_SMMU_SECURE instance. */
5155 #define ALT_SMMU_SECURE_SMMU_SSD_REG_565_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_565_OFST))
5156 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_566 register for the ALT_SMMU_SECURE instance. */
5157 #define ALT_SMMU_SECURE_SMMU_SSD_REG_566_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_566_OFST))
5158 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_567 register for the ALT_SMMU_SECURE instance. */
5159 #define ALT_SMMU_SECURE_SMMU_SSD_REG_567_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_567_OFST))
5160 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_568 register for the ALT_SMMU_SECURE instance. */
5161 #define ALT_SMMU_SECURE_SMMU_SSD_REG_568_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_568_OFST))
5162 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_569 register for the ALT_SMMU_SECURE instance. */
5163 #define ALT_SMMU_SECURE_SMMU_SSD_REG_569_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_569_OFST))
5164 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_570 register for the ALT_SMMU_SECURE instance. */
5165 #define ALT_SMMU_SECURE_SMMU_SSD_REG_570_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_570_OFST))
5166 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_571 register for the ALT_SMMU_SECURE instance. */
5167 #define ALT_SMMU_SECURE_SMMU_SSD_REG_571_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_571_OFST))
5168 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_572 register for the ALT_SMMU_SECURE instance. */
5169 #define ALT_SMMU_SECURE_SMMU_SSD_REG_572_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_572_OFST))
5170 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_573 register for the ALT_SMMU_SECURE instance. */
5171 #define ALT_SMMU_SECURE_SMMU_SSD_REG_573_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_573_OFST))
5172 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_574 register for the ALT_SMMU_SECURE instance. */
5173 #define ALT_SMMU_SECURE_SMMU_SSD_REG_574_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_574_OFST))
5174 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_575 register for the ALT_SMMU_SECURE instance. */
5175 #define ALT_SMMU_SECURE_SMMU_SSD_REG_575_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_575_OFST))
5176 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_576 register for the ALT_SMMU_SECURE instance. */
5177 #define ALT_SMMU_SECURE_SMMU_SSD_REG_576_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_576_OFST))
5178 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_577 register for the ALT_SMMU_SECURE instance. */
5179 #define ALT_SMMU_SECURE_SMMU_SSD_REG_577_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_577_OFST))
5180 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_578 register for the ALT_SMMU_SECURE instance. */
5181 #define ALT_SMMU_SECURE_SMMU_SSD_REG_578_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_578_OFST))
5182 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_579 register for the ALT_SMMU_SECURE instance. */
5183 #define ALT_SMMU_SECURE_SMMU_SSD_REG_579_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_579_OFST))
5184 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_580 register for the ALT_SMMU_SECURE instance. */
5185 #define ALT_SMMU_SECURE_SMMU_SSD_REG_580_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_580_OFST))
5186 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_581 register for the ALT_SMMU_SECURE instance. */
5187 #define ALT_SMMU_SECURE_SMMU_SSD_REG_581_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_581_OFST))
5188 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_582 register for the ALT_SMMU_SECURE instance. */
5189 #define ALT_SMMU_SECURE_SMMU_SSD_REG_582_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_582_OFST))
5190 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_583 register for the ALT_SMMU_SECURE instance. */
5191 #define ALT_SMMU_SECURE_SMMU_SSD_REG_583_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_583_OFST))
5192 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_584 register for the ALT_SMMU_SECURE instance. */
5193 #define ALT_SMMU_SECURE_SMMU_SSD_REG_584_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_584_OFST))
5194 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_585 register for the ALT_SMMU_SECURE instance. */
5195 #define ALT_SMMU_SECURE_SMMU_SSD_REG_585_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_585_OFST))
5196 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_586 register for the ALT_SMMU_SECURE instance. */
5197 #define ALT_SMMU_SECURE_SMMU_SSD_REG_586_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_586_OFST))
5198 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_587 register for the ALT_SMMU_SECURE instance. */
5199 #define ALT_SMMU_SECURE_SMMU_SSD_REG_587_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_587_OFST))
5200 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_588 register for the ALT_SMMU_SECURE instance. */
5201 #define ALT_SMMU_SECURE_SMMU_SSD_REG_588_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_588_OFST))
5202 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_589 register for the ALT_SMMU_SECURE instance. */
5203 #define ALT_SMMU_SECURE_SMMU_SSD_REG_589_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_589_OFST))
5204 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_590 register for the ALT_SMMU_SECURE instance. */
5205 #define ALT_SMMU_SECURE_SMMU_SSD_REG_590_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_590_OFST))
5206 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_591 register for the ALT_SMMU_SECURE instance. */
5207 #define ALT_SMMU_SECURE_SMMU_SSD_REG_591_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_591_OFST))
5208 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_592 register for the ALT_SMMU_SECURE instance. */
5209 #define ALT_SMMU_SECURE_SMMU_SSD_REG_592_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_592_OFST))
5210 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_593 register for the ALT_SMMU_SECURE instance. */
5211 #define ALT_SMMU_SECURE_SMMU_SSD_REG_593_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_593_OFST))
5212 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_594 register for the ALT_SMMU_SECURE instance. */
5213 #define ALT_SMMU_SECURE_SMMU_SSD_REG_594_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_594_OFST))
5214 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_595 register for the ALT_SMMU_SECURE instance. */
5215 #define ALT_SMMU_SECURE_SMMU_SSD_REG_595_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_595_OFST))
5216 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_596 register for the ALT_SMMU_SECURE instance. */
5217 #define ALT_SMMU_SECURE_SMMU_SSD_REG_596_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_596_OFST))
5218 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_597 register for the ALT_SMMU_SECURE instance. */
5219 #define ALT_SMMU_SECURE_SMMU_SSD_REG_597_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_597_OFST))
5220 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_598 register for the ALT_SMMU_SECURE instance. */
5221 #define ALT_SMMU_SECURE_SMMU_SSD_REG_598_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_598_OFST))
5222 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_599 register for the ALT_SMMU_SECURE instance. */
5223 #define ALT_SMMU_SECURE_SMMU_SSD_REG_599_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_599_OFST))
5224 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_600 register for the ALT_SMMU_SECURE instance. */
5225 #define ALT_SMMU_SECURE_SMMU_SSD_REG_600_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_600_OFST))
5226 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_601 register for the ALT_SMMU_SECURE instance. */
5227 #define ALT_SMMU_SECURE_SMMU_SSD_REG_601_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_601_OFST))
5228 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_602 register for the ALT_SMMU_SECURE instance. */
5229 #define ALT_SMMU_SECURE_SMMU_SSD_REG_602_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_602_OFST))
5230 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_603 register for the ALT_SMMU_SECURE instance. */
5231 #define ALT_SMMU_SECURE_SMMU_SSD_REG_603_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_603_OFST))
5232 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_604 register for the ALT_SMMU_SECURE instance. */
5233 #define ALT_SMMU_SECURE_SMMU_SSD_REG_604_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_604_OFST))
5234 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_605 register for the ALT_SMMU_SECURE instance. */
5235 #define ALT_SMMU_SECURE_SMMU_SSD_REG_605_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_605_OFST))
5236 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_606 register for the ALT_SMMU_SECURE instance. */
5237 #define ALT_SMMU_SECURE_SMMU_SSD_REG_606_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_606_OFST))
5238 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_607 register for the ALT_SMMU_SECURE instance. */
5239 #define ALT_SMMU_SECURE_SMMU_SSD_REG_607_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_607_OFST))
5240 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_608 register for the ALT_SMMU_SECURE instance. */
5241 #define ALT_SMMU_SECURE_SMMU_SSD_REG_608_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_608_OFST))
5242 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_609 register for the ALT_SMMU_SECURE instance. */
5243 #define ALT_SMMU_SECURE_SMMU_SSD_REG_609_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_609_OFST))
5244 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_610 register for the ALT_SMMU_SECURE instance. */
5245 #define ALT_SMMU_SECURE_SMMU_SSD_REG_610_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_610_OFST))
5246 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_611 register for the ALT_SMMU_SECURE instance. */
5247 #define ALT_SMMU_SECURE_SMMU_SSD_REG_611_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_611_OFST))
5248 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_612 register for the ALT_SMMU_SECURE instance. */
5249 #define ALT_SMMU_SECURE_SMMU_SSD_REG_612_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_612_OFST))
5250 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_613 register for the ALT_SMMU_SECURE instance. */
5251 #define ALT_SMMU_SECURE_SMMU_SSD_REG_613_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_613_OFST))
5252 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_614 register for the ALT_SMMU_SECURE instance. */
5253 #define ALT_SMMU_SECURE_SMMU_SSD_REG_614_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_614_OFST))
5254 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_615 register for the ALT_SMMU_SECURE instance. */
5255 #define ALT_SMMU_SECURE_SMMU_SSD_REG_615_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_615_OFST))
5256 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_616 register for the ALT_SMMU_SECURE instance. */
5257 #define ALT_SMMU_SECURE_SMMU_SSD_REG_616_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_616_OFST))
5258 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_617 register for the ALT_SMMU_SECURE instance. */
5259 #define ALT_SMMU_SECURE_SMMU_SSD_REG_617_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_617_OFST))
5260 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_618 register for the ALT_SMMU_SECURE instance. */
5261 #define ALT_SMMU_SECURE_SMMU_SSD_REG_618_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_618_OFST))
5262 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_619 register for the ALT_SMMU_SECURE instance. */
5263 #define ALT_SMMU_SECURE_SMMU_SSD_REG_619_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_619_OFST))
5264 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_620 register for the ALT_SMMU_SECURE instance. */
5265 #define ALT_SMMU_SECURE_SMMU_SSD_REG_620_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_620_OFST))
5266 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_621 register for the ALT_SMMU_SECURE instance. */
5267 #define ALT_SMMU_SECURE_SMMU_SSD_REG_621_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_621_OFST))
5268 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_622 register for the ALT_SMMU_SECURE instance. */
5269 #define ALT_SMMU_SECURE_SMMU_SSD_REG_622_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_622_OFST))
5270 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_623 register for the ALT_SMMU_SECURE instance. */
5271 #define ALT_SMMU_SECURE_SMMU_SSD_REG_623_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_623_OFST))
5272 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_624 register for the ALT_SMMU_SECURE instance. */
5273 #define ALT_SMMU_SECURE_SMMU_SSD_REG_624_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_624_OFST))
5274 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_625 register for the ALT_SMMU_SECURE instance. */
5275 #define ALT_SMMU_SECURE_SMMU_SSD_REG_625_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_625_OFST))
5276 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_626 register for the ALT_SMMU_SECURE instance. */
5277 #define ALT_SMMU_SECURE_SMMU_SSD_REG_626_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_626_OFST))
5278 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_627 register for the ALT_SMMU_SECURE instance. */
5279 #define ALT_SMMU_SECURE_SMMU_SSD_REG_627_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_627_OFST))
5280 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_628 register for the ALT_SMMU_SECURE instance. */
5281 #define ALT_SMMU_SECURE_SMMU_SSD_REG_628_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_628_OFST))
5282 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_629 register for the ALT_SMMU_SECURE instance. */
5283 #define ALT_SMMU_SECURE_SMMU_SSD_REG_629_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_629_OFST))
5284 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_630 register for the ALT_SMMU_SECURE instance. */
5285 #define ALT_SMMU_SECURE_SMMU_SSD_REG_630_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_630_OFST))
5286 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_631 register for the ALT_SMMU_SECURE instance. */
5287 #define ALT_SMMU_SECURE_SMMU_SSD_REG_631_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_631_OFST))
5288 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_632 register for the ALT_SMMU_SECURE instance. */
5289 #define ALT_SMMU_SECURE_SMMU_SSD_REG_632_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_632_OFST))
5290 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_633 register for the ALT_SMMU_SECURE instance. */
5291 #define ALT_SMMU_SECURE_SMMU_SSD_REG_633_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_633_OFST))
5292 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_634 register for the ALT_SMMU_SECURE instance. */
5293 #define ALT_SMMU_SECURE_SMMU_SSD_REG_634_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_634_OFST))
5294 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_635 register for the ALT_SMMU_SECURE instance. */
5295 #define ALT_SMMU_SECURE_SMMU_SSD_REG_635_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_635_OFST))
5296 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_636 register for the ALT_SMMU_SECURE instance. */
5297 #define ALT_SMMU_SECURE_SMMU_SSD_REG_636_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_636_OFST))
5298 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_637 register for the ALT_SMMU_SECURE instance. */
5299 #define ALT_SMMU_SECURE_SMMU_SSD_REG_637_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_637_OFST))
5300 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_638 register for the ALT_SMMU_SECURE instance. */
5301 #define ALT_SMMU_SECURE_SMMU_SSD_REG_638_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_638_OFST))
5302 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_639 register for the ALT_SMMU_SECURE instance. */
5303 #define ALT_SMMU_SECURE_SMMU_SSD_REG_639_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_639_OFST))
5304 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_640 register for the ALT_SMMU_SECURE instance. */
5305 #define ALT_SMMU_SECURE_SMMU_SSD_REG_640_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_640_OFST))
5306 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_641 register for the ALT_SMMU_SECURE instance. */
5307 #define ALT_SMMU_SECURE_SMMU_SSD_REG_641_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_641_OFST))
5308 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_642 register for the ALT_SMMU_SECURE instance. */
5309 #define ALT_SMMU_SECURE_SMMU_SSD_REG_642_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_642_OFST))
5310 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_643 register for the ALT_SMMU_SECURE instance. */
5311 #define ALT_SMMU_SECURE_SMMU_SSD_REG_643_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_643_OFST))
5312 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_644 register for the ALT_SMMU_SECURE instance. */
5313 #define ALT_SMMU_SECURE_SMMU_SSD_REG_644_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_644_OFST))
5314 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_645 register for the ALT_SMMU_SECURE instance. */
5315 #define ALT_SMMU_SECURE_SMMU_SSD_REG_645_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_645_OFST))
5316 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_646 register for the ALT_SMMU_SECURE instance. */
5317 #define ALT_SMMU_SECURE_SMMU_SSD_REG_646_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_646_OFST))
5318 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_647 register for the ALT_SMMU_SECURE instance. */
5319 #define ALT_SMMU_SECURE_SMMU_SSD_REG_647_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_647_OFST))
5320 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_648 register for the ALT_SMMU_SECURE instance. */
5321 #define ALT_SMMU_SECURE_SMMU_SSD_REG_648_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_648_OFST))
5322 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_649 register for the ALT_SMMU_SECURE instance. */
5323 #define ALT_SMMU_SECURE_SMMU_SSD_REG_649_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_649_OFST))
5324 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_650 register for the ALT_SMMU_SECURE instance. */
5325 #define ALT_SMMU_SECURE_SMMU_SSD_REG_650_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_650_OFST))
5326 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_651 register for the ALT_SMMU_SECURE instance. */
5327 #define ALT_SMMU_SECURE_SMMU_SSD_REG_651_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_651_OFST))
5328 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_652 register for the ALT_SMMU_SECURE instance. */
5329 #define ALT_SMMU_SECURE_SMMU_SSD_REG_652_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_652_OFST))
5330 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_653 register for the ALT_SMMU_SECURE instance. */
5331 #define ALT_SMMU_SECURE_SMMU_SSD_REG_653_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_653_OFST))
5332 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_654 register for the ALT_SMMU_SECURE instance. */
5333 #define ALT_SMMU_SECURE_SMMU_SSD_REG_654_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_654_OFST))
5334 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_655 register for the ALT_SMMU_SECURE instance. */
5335 #define ALT_SMMU_SECURE_SMMU_SSD_REG_655_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_655_OFST))
5336 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_656 register for the ALT_SMMU_SECURE instance. */
5337 #define ALT_SMMU_SECURE_SMMU_SSD_REG_656_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_656_OFST))
5338 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_657 register for the ALT_SMMU_SECURE instance. */
5339 #define ALT_SMMU_SECURE_SMMU_SSD_REG_657_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_657_OFST))
5340 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_658 register for the ALT_SMMU_SECURE instance. */
5341 #define ALT_SMMU_SECURE_SMMU_SSD_REG_658_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_658_OFST))
5342 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_659 register for the ALT_SMMU_SECURE instance. */
5343 #define ALT_SMMU_SECURE_SMMU_SSD_REG_659_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_659_OFST))
5344 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_660 register for the ALT_SMMU_SECURE instance. */
5345 #define ALT_SMMU_SECURE_SMMU_SSD_REG_660_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_660_OFST))
5346 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_661 register for the ALT_SMMU_SECURE instance. */
5347 #define ALT_SMMU_SECURE_SMMU_SSD_REG_661_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_661_OFST))
5348 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_662 register for the ALT_SMMU_SECURE instance. */
5349 #define ALT_SMMU_SECURE_SMMU_SSD_REG_662_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_662_OFST))
5350 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_663 register for the ALT_SMMU_SECURE instance. */
5351 #define ALT_SMMU_SECURE_SMMU_SSD_REG_663_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_663_OFST))
5352 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_664 register for the ALT_SMMU_SECURE instance. */
5353 #define ALT_SMMU_SECURE_SMMU_SSD_REG_664_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_664_OFST))
5354 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_665 register for the ALT_SMMU_SECURE instance. */
5355 #define ALT_SMMU_SECURE_SMMU_SSD_REG_665_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_665_OFST))
5356 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_666 register for the ALT_SMMU_SECURE instance. */
5357 #define ALT_SMMU_SECURE_SMMU_SSD_REG_666_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_666_OFST))
5358 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_667 register for the ALT_SMMU_SECURE instance. */
5359 #define ALT_SMMU_SECURE_SMMU_SSD_REG_667_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_667_OFST))
5360 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_668 register for the ALT_SMMU_SECURE instance. */
5361 #define ALT_SMMU_SECURE_SMMU_SSD_REG_668_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_668_OFST))
5362 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_669 register for the ALT_SMMU_SECURE instance. */
5363 #define ALT_SMMU_SECURE_SMMU_SSD_REG_669_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_669_OFST))
5364 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_670 register for the ALT_SMMU_SECURE instance. */
5365 #define ALT_SMMU_SECURE_SMMU_SSD_REG_670_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_670_OFST))
5366 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_671 register for the ALT_SMMU_SECURE instance. */
5367 #define ALT_SMMU_SECURE_SMMU_SSD_REG_671_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_671_OFST))
5368 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_672 register for the ALT_SMMU_SECURE instance. */
5369 #define ALT_SMMU_SECURE_SMMU_SSD_REG_672_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_672_OFST))
5370 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_673 register for the ALT_SMMU_SECURE instance. */
5371 #define ALT_SMMU_SECURE_SMMU_SSD_REG_673_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_673_OFST))
5372 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_674 register for the ALT_SMMU_SECURE instance. */
5373 #define ALT_SMMU_SECURE_SMMU_SSD_REG_674_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_674_OFST))
5374 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_675 register for the ALT_SMMU_SECURE instance. */
5375 #define ALT_SMMU_SECURE_SMMU_SSD_REG_675_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_675_OFST))
5376 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_676 register for the ALT_SMMU_SECURE instance. */
5377 #define ALT_SMMU_SECURE_SMMU_SSD_REG_676_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_676_OFST))
5378 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_677 register for the ALT_SMMU_SECURE instance. */
5379 #define ALT_SMMU_SECURE_SMMU_SSD_REG_677_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_677_OFST))
5380 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_678 register for the ALT_SMMU_SECURE instance. */
5381 #define ALT_SMMU_SECURE_SMMU_SSD_REG_678_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_678_OFST))
5382 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_679 register for the ALT_SMMU_SECURE instance. */
5383 #define ALT_SMMU_SECURE_SMMU_SSD_REG_679_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_679_OFST))
5384 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_680 register for the ALT_SMMU_SECURE instance. */
5385 #define ALT_SMMU_SECURE_SMMU_SSD_REG_680_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_680_OFST))
5386 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_681 register for the ALT_SMMU_SECURE instance. */
5387 #define ALT_SMMU_SECURE_SMMU_SSD_REG_681_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_681_OFST))
5388 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_682 register for the ALT_SMMU_SECURE instance. */
5389 #define ALT_SMMU_SECURE_SMMU_SSD_REG_682_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_682_OFST))
5390 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_683 register for the ALT_SMMU_SECURE instance. */
5391 #define ALT_SMMU_SECURE_SMMU_SSD_REG_683_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_683_OFST))
5392 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_684 register for the ALT_SMMU_SECURE instance. */
5393 #define ALT_SMMU_SECURE_SMMU_SSD_REG_684_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_684_OFST))
5394 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_685 register for the ALT_SMMU_SECURE instance. */
5395 #define ALT_SMMU_SECURE_SMMU_SSD_REG_685_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_685_OFST))
5396 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_686 register for the ALT_SMMU_SECURE instance. */
5397 #define ALT_SMMU_SECURE_SMMU_SSD_REG_686_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_686_OFST))
5398 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_687 register for the ALT_SMMU_SECURE instance. */
5399 #define ALT_SMMU_SECURE_SMMU_SSD_REG_687_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_687_OFST))
5400 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_688 register for the ALT_SMMU_SECURE instance. */
5401 #define ALT_SMMU_SECURE_SMMU_SSD_REG_688_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_688_OFST))
5402 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_689 register for the ALT_SMMU_SECURE instance. */
5403 #define ALT_SMMU_SECURE_SMMU_SSD_REG_689_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_689_OFST))
5404 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_690 register for the ALT_SMMU_SECURE instance. */
5405 #define ALT_SMMU_SECURE_SMMU_SSD_REG_690_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_690_OFST))
5406 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_691 register for the ALT_SMMU_SECURE instance. */
5407 #define ALT_SMMU_SECURE_SMMU_SSD_REG_691_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_691_OFST))
5408 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_692 register for the ALT_SMMU_SECURE instance. */
5409 #define ALT_SMMU_SECURE_SMMU_SSD_REG_692_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_692_OFST))
5410 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_693 register for the ALT_SMMU_SECURE instance. */
5411 #define ALT_SMMU_SECURE_SMMU_SSD_REG_693_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_693_OFST))
5412 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_694 register for the ALT_SMMU_SECURE instance. */
5413 #define ALT_SMMU_SECURE_SMMU_SSD_REG_694_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_694_OFST))
5414 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_695 register for the ALT_SMMU_SECURE instance. */
5415 #define ALT_SMMU_SECURE_SMMU_SSD_REG_695_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_695_OFST))
5416 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_696 register for the ALT_SMMU_SECURE instance. */
5417 #define ALT_SMMU_SECURE_SMMU_SSD_REG_696_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_696_OFST))
5418 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_697 register for the ALT_SMMU_SECURE instance. */
5419 #define ALT_SMMU_SECURE_SMMU_SSD_REG_697_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_697_OFST))
5420 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_698 register for the ALT_SMMU_SECURE instance. */
5421 #define ALT_SMMU_SECURE_SMMU_SSD_REG_698_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_698_OFST))
5422 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_699 register for the ALT_SMMU_SECURE instance. */
5423 #define ALT_SMMU_SECURE_SMMU_SSD_REG_699_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_699_OFST))
5424 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_700 register for the ALT_SMMU_SECURE instance. */
5425 #define ALT_SMMU_SECURE_SMMU_SSD_REG_700_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_700_OFST))
5426 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_701 register for the ALT_SMMU_SECURE instance. */
5427 #define ALT_SMMU_SECURE_SMMU_SSD_REG_701_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_701_OFST))
5428 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_702 register for the ALT_SMMU_SECURE instance. */
5429 #define ALT_SMMU_SECURE_SMMU_SSD_REG_702_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_702_OFST))
5430 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_703 register for the ALT_SMMU_SECURE instance. */
5431 #define ALT_SMMU_SECURE_SMMU_SSD_REG_703_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_703_OFST))
5432 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_704 register for the ALT_SMMU_SECURE instance. */
5433 #define ALT_SMMU_SECURE_SMMU_SSD_REG_704_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_704_OFST))
5434 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_705 register for the ALT_SMMU_SECURE instance. */
5435 #define ALT_SMMU_SECURE_SMMU_SSD_REG_705_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_705_OFST))
5436 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_706 register for the ALT_SMMU_SECURE instance. */
5437 #define ALT_SMMU_SECURE_SMMU_SSD_REG_706_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_706_OFST))
5438 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_707 register for the ALT_SMMU_SECURE instance. */
5439 #define ALT_SMMU_SECURE_SMMU_SSD_REG_707_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_707_OFST))
5440 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_708 register for the ALT_SMMU_SECURE instance. */
5441 #define ALT_SMMU_SECURE_SMMU_SSD_REG_708_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_708_OFST))
5442 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_709 register for the ALT_SMMU_SECURE instance. */
5443 #define ALT_SMMU_SECURE_SMMU_SSD_REG_709_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_709_OFST))
5444 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_710 register for the ALT_SMMU_SECURE instance. */
5445 #define ALT_SMMU_SECURE_SMMU_SSD_REG_710_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_710_OFST))
5446 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_711 register for the ALT_SMMU_SECURE instance. */
5447 #define ALT_SMMU_SECURE_SMMU_SSD_REG_711_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_711_OFST))
5448 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_712 register for the ALT_SMMU_SECURE instance. */
5449 #define ALT_SMMU_SECURE_SMMU_SSD_REG_712_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_712_OFST))
5450 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_713 register for the ALT_SMMU_SECURE instance. */
5451 #define ALT_SMMU_SECURE_SMMU_SSD_REG_713_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_713_OFST))
5452 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_714 register for the ALT_SMMU_SECURE instance. */
5453 #define ALT_SMMU_SECURE_SMMU_SSD_REG_714_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_714_OFST))
5454 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_715 register for the ALT_SMMU_SECURE instance. */
5455 #define ALT_SMMU_SECURE_SMMU_SSD_REG_715_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_715_OFST))
5456 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_716 register for the ALT_SMMU_SECURE instance. */
5457 #define ALT_SMMU_SECURE_SMMU_SSD_REG_716_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_716_OFST))
5458 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_717 register for the ALT_SMMU_SECURE instance. */
5459 #define ALT_SMMU_SECURE_SMMU_SSD_REG_717_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_717_OFST))
5460 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_718 register for the ALT_SMMU_SECURE instance. */
5461 #define ALT_SMMU_SECURE_SMMU_SSD_REG_718_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_718_OFST))
5462 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_719 register for the ALT_SMMU_SECURE instance. */
5463 #define ALT_SMMU_SECURE_SMMU_SSD_REG_719_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_719_OFST))
5464 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_720 register for the ALT_SMMU_SECURE instance. */
5465 #define ALT_SMMU_SECURE_SMMU_SSD_REG_720_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_720_OFST))
5466 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_721 register for the ALT_SMMU_SECURE instance. */
5467 #define ALT_SMMU_SECURE_SMMU_SSD_REG_721_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_721_OFST))
5468 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_722 register for the ALT_SMMU_SECURE instance. */
5469 #define ALT_SMMU_SECURE_SMMU_SSD_REG_722_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_722_OFST))
5470 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_723 register for the ALT_SMMU_SECURE instance. */
5471 #define ALT_SMMU_SECURE_SMMU_SSD_REG_723_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_723_OFST))
5472 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_724 register for the ALT_SMMU_SECURE instance. */
5473 #define ALT_SMMU_SECURE_SMMU_SSD_REG_724_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_724_OFST))
5474 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_725 register for the ALT_SMMU_SECURE instance. */
5475 #define ALT_SMMU_SECURE_SMMU_SSD_REG_725_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_725_OFST))
5476 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_726 register for the ALT_SMMU_SECURE instance. */
5477 #define ALT_SMMU_SECURE_SMMU_SSD_REG_726_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_726_OFST))
5478 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_727 register for the ALT_SMMU_SECURE instance. */
5479 #define ALT_SMMU_SECURE_SMMU_SSD_REG_727_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_727_OFST))
5480 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_728 register for the ALT_SMMU_SECURE instance. */
5481 #define ALT_SMMU_SECURE_SMMU_SSD_REG_728_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_728_OFST))
5482 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_729 register for the ALT_SMMU_SECURE instance. */
5483 #define ALT_SMMU_SECURE_SMMU_SSD_REG_729_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_729_OFST))
5484 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_730 register for the ALT_SMMU_SECURE instance. */
5485 #define ALT_SMMU_SECURE_SMMU_SSD_REG_730_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_730_OFST))
5486 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_731 register for the ALT_SMMU_SECURE instance. */
5487 #define ALT_SMMU_SECURE_SMMU_SSD_REG_731_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_731_OFST))
5488 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_732 register for the ALT_SMMU_SECURE instance. */
5489 #define ALT_SMMU_SECURE_SMMU_SSD_REG_732_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_732_OFST))
5490 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_733 register for the ALT_SMMU_SECURE instance. */
5491 #define ALT_SMMU_SECURE_SMMU_SSD_REG_733_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_733_OFST))
5492 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_734 register for the ALT_SMMU_SECURE instance. */
5493 #define ALT_SMMU_SECURE_SMMU_SSD_REG_734_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_734_OFST))
5494 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_735 register for the ALT_SMMU_SECURE instance. */
5495 #define ALT_SMMU_SECURE_SMMU_SSD_REG_735_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_735_OFST))
5496 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_736 register for the ALT_SMMU_SECURE instance. */
5497 #define ALT_SMMU_SECURE_SMMU_SSD_REG_736_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_736_OFST))
5498 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_737 register for the ALT_SMMU_SECURE instance. */
5499 #define ALT_SMMU_SECURE_SMMU_SSD_REG_737_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_737_OFST))
5500 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_738 register for the ALT_SMMU_SECURE instance. */
5501 #define ALT_SMMU_SECURE_SMMU_SSD_REG_738_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_738_OFST))
5502 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_739 register for the ALT_SMMU_SECURE instance. */
5503 #define ALT_SMMU_SECURE_SMMU_SSD_REG_739_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_739_OFST))
5504 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_740 register for the ALT_SMMU_SECURE instance. */
5505 #define ALT_SMMU_SECURE_SMMU_SSD_REG_740_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_740_OFST))
5506 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_741 register for the ALT_SMMU_SECURE instance. */
5507 #define ALT_SMMU_SECURE_SMMU_SSD_REG_741_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_741_OFST))
5508 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_742 register for the ALT_SMMU_SECURE instance. */
5509 #define ALT_SMMU_SECURE_SMMU_SSD_REG_742_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_742_OFST))
5510 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_743 register for the ALT_SMMU_SECURE instance. */
5511 #define ALT_SMMU_SECURE_SMMU_SSD_REG_743_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_743_OFST))
5512 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_744 register for the ALT_SMMU_SECURE instance. */
5513 #define ALT_SMMU_SECURE_SMMU_SSD_REG_744_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_744_OFST))
5514 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_745 register for the ALT_SMMU_SECURE instance. */
5515 #define ALT_SMMU_SECURE_SMMU_SSD_REG_745_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_745_OFST))
5516 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_746 register for the ALT_SMMU_SECURE instance. */
5517 #define ALT_SMMU_SECURE_SMMU_SSD_REG_746_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_746_OFST))
5518 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_747 register for the ALT_SMMU_SECURE instance. */
5519 #define ALT_SMMU_SECURE_SMMU_SSD_REG_747_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_747_OFST))
5520 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_748 register for the ALT_SMMU_SECURE instance. */
5521 #define ALT_SMMU_SECURE_SMMU_SSD_REG_748_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_748_OFST))
5522 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_749 register for the ALT_SMMU_SECURE instance. */
5523 #define ALT_SMMU_SECURE_SMMU_SSD_REG_749_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_749_OFST))
5524 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_750 register for the ALT_SMMU_SECURE instance. */
5525 #define ALT_SMMU_SECURE_SMMU_SSD_REG_750_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_750_OFST))
5526 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_751 register for the ALT_SMMU_SECURE instance. */
5527 #define ALT_SMMU_SECURE_SMMU_SSD_REG_751_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_751_OFST))
5528 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_752 register for the ALT_SMMU_SECURE instance. */
5529 #define ALT_SMMU_SECURE_SMMU_SSD_REG_752_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_752_OFST))
5530 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_753 register for the ALT_SMMU_SECURE instance. */
5531 #define ALT_SMMU_SECURE_SMMU_SSD_REG_753_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_753_OFST))
5532 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_754 register for the ALT_SMMU_SECURE instance. */
5533 #define ALT_SMMU_SECURE_SMMU_SSD_REG_754_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_754_OFST))
5534 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_755 register for the ALT_SMMU_SECURE instance. */
5535 #define ALT_SMMU_SECURE_SMMU_SSD_REG_755_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_755_OFST))
5536 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_756 register for the ALT_SMMU_SECURE instance. */
5537 #define ALT_SMMU_SECURE_SMMU_SSD_REG_756_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_756_OFST))
5538 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_757 register for the ALT_SMMU_SECURE instance. */
5539 #define ALT_SMMU_SECURE_SMMU_SSD_REG_757_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_757_OFST))
5540 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_758 register for the ALT_SMMU_SECURE instance. */
5541 #define ALT_SMMU_SECURE_SMMU_SSD_REG_758_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_758_OFST))
5542 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_759 register for the ALT_SMMU_SECURE instance. */
5543 #define ALT_SMMU_SECURE_SMMU_SSD_REG_759_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_759_OFST))
5544 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_760 register for the ALT_SMMU_SECURE instance. */
5545 #define ALT_SMMU_SECURE_SMMU_SSD_REG_760_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_760_OFST))
5546 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_761 register for the ALT_SMMU_SECURE instance. */
5547 #define ALT_SMMU_SECURE_SMMU_SSD_REG_761_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_761_OFST))
5548 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_762 register for the ALT_SMMU_SECURE instance. */
5549 #define ALT_SMMU_SECURE_SMMU_SSD_REG_762_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_762_OFST))
5550 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_763 register for the ALT_SMMU_SECURE instance. */
5551 #define ALT_SMMU_SECURE_SMMU_SSD_REG_763_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_763_OFST))
5552 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_764 register for the ALT_SMMU_SECURE instance. */
5553 #define ALT_SMMU_SECURE_SMMU_SSD_REG_764_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_764_OFST))
5554 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_765 register for the ALT_SMMU_SECURE instance. */
5555 #define ALT_SMMU_SECURE_SMMU_SSD_REG_765_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_765_OFST))
5556 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_766 register for the ALT_SMMU_SECURE instance. */
5557 #define ALT_SMMU_SECURE_SMMU_SSD_REG_766_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_766_OFST))
5558 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_767 register for the ALT_SMMU_SECURE instance. */
5559 #define ALT_SMMU_SECURE_SMMU_SSD_REG_767_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_767_OFST))
5560 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_768 register for the ALT_SMMU_SECURE instance. */
5561 #define ALT_SMMU_SECURE_SMMU_SSD_REG_768_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_768_OFST))
5562 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_769 register for the ALT_SMMU_SECURE instance. */
5563 #define ALT_SMMU_SECURE_SMMU_SSD_REG_769_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_769_OFST))
5564 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_770 register for the ALT_SMMU_SECURE instance. */
5565 #define ALT_SMMU_SECURE_SMMU_SSD_REG_770_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_770_OFST))
5566 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_771 register for the ALT_SMMU_SECURE instance. */
5567 #define ALT_SMMU_SECURE_SMMU_SSD_REG_771_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_771_OFST))
5568 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_772 register for the ALT_SMMU_SECURE instance. */
5569 #define ALT_SMMU_SECURE_SMMU_SSD_REG_772_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_772_OFST))
5570 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_773 register for the ALT_SMMU_SECURE instance. */
5571 #define ALT_SMMU_SECURE_SMMU_SSD_REG_773_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_773_OFST))
5572 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_774 register for the ALT_SMMU_SECURE instance. */
5573 #define ALT_SMMU_SECURE_SMMU_SSD_REG_774_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_774_OFST))
5574 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_775 register for the ALT_SMMU_SECURE instance. */
5575 #define ALT_SMMU_SECURE_SMMU_SSD_REG_775_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_775_OFST))
5576 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_776 register for the ALT_SMMU_SECURE instance. */
5577 #define ALT_SMMU_SECURE_SMMU_SSD_REG_776_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_776_OFST))
5578 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_777 register for the ALT_SMMU_SECURE instance. */
5579 #define ALT_SMMU_SECURE_SMMU_SSD_REG_777_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_777_OFST))
5580 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_778 register for the ALT_SMMU_SECURE instance. */
5581 #define ALT_SMMU_SECURE_SMMU_SSD_REG_778_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_778_OFST))
5582 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_779 register for the ALT_SMMU_SECURE instance. */
5583 #define ALT_SMMU_SECURE_SMMU_SSD_REG_779_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_779_OFST))
5584 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_780 register for the ALT_SMMU_SECURE instance. */
5585 #define ALT_SMMU_SECURE_SMMU_SSD_REG_780_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_780_OFST))
5586 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_781 register for the ALT_SMMU_SECURE instance. */
5587 #define ALT_SMMU_SECURE_SMMU_SSD_REG_781_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_781_OFST))
5588 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_782 register for the ALT_SMMU_SECURE instance. */
5589 #define ALT_SMMU_SECURE_SMMU_SSD_REG_782_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_782_OFST))
5590 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_783 register for the ALT_SMMU_SECURE instance. */
5591 #define ALT_SMMU_SECURE_SMMU_SSD_REG_783_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_783_OFST))
5592 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_784 register for the ALT_SMMU_SECURE instance. */
5593 #define ALT_SMMU_SECURE_SMMU_SSD_REG_784_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_784_OFST))
5594 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_785 register for the ALT_SMMU_SECURE instance. */
5595 #define ALT_SMMU_SECURE_SMMU_SSD_REG_785_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_785_OFST))
5596 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_786 register for the ALT_SMMU_SECURE instance. */
5597 #define ALT_SMMU_SECURE_SMMU_SSD_REG_786_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_786_OFST))
5598 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_787 register for the ALT_SMMU_SECURE instance. */
5599 #define ALT_SMMU_SECURE_SMMU_SSD_REG_787_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_787_OFST))
5600 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_788 register for the ALT_SMMU_SECURE instance. */
5601 #define ALT_SMMU_SECURE_SMMU_SSD_REG_788_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_788_OFST))
5602 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_789 register for the ALT_SMMU_SECURE instance. */
5603 #define ALT_SMMU_SECURE_SMMU_SSD_REG_789_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_789_OFST))
5604 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_790 register for the ALT_SMMU_SECURE instance. */
5605 #define ALT_SMMU_SECURE_SMMU_SSD_REG_790_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_790_OFST))
5606 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_791 register for the ALT_SMMU_SECURE instance. */
5607 #define ALT_SMMU_SECURE_SMMU_SSD_REG_791_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_791_OFST))
5608 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_792 register for the ALT_SMMU_SECURE instance. */
5609 #define ALT_SMMU_SECURE_SMMU_SSD_REG_792_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_792_OFST))
5610 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_793 register for the ALT_SMMU_SECURE instance. */
5611 #define ALT_SMMU_SECURE_SMMU_SSD_REG_793_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_793_OFST))
5612 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_794 register for the ALT_SMMU_SECURE instance. */
5613 #define ALT_SMMU_SECURE_SMMU_SSD_REG_794_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_794_OFST))
5614 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_795 register for the ALT_SMMU_SECURE instance. */
5615 #define ALT_SMMU_SECURE_SMMU_SSD_REG_795_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_795_OFST))
5616 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_796 register for the ALT_SMMU_SECURE instance. */
5617 #define ALT_SMMU_SECURE_SMMU_SSD_REG_796_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_796_OFST))
5618 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_797 register for the ALT_SMMU_SECURE instance. */
5619 #define ALT_SMMU_SECURE_SMMU_SSD_REG_797_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_797_OFST))
5620 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_798 register for the ALT_SMMU_SECURE instance. */
5621 #define ALT_SMMU_SECURE_SMMU_SSD_REG_798_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_798_OFST))
5622 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_799 register for the ALT_SMMU_SECURE instance. */
5623 #define ALT_SMMU_SECURE_SMMU_SSD_REG_799_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_799_OFST))
5624 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_800 register for the ALT_SMMU_SECURE instance. */
5625 #define ALT_SMMU_SECURE_SMMU_SSD_REG_800_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_800_OFST))
5626 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_801 register for the ALT_SMMU_SECURE instance. */
5627 #define ALT_SMMU_SECURE_SMMU_SSD_REG_801_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_801_OFST))
5628 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_802 register for the ALT_SMMU_SECURE instance. */
5629 #define ALT_SMMU_SECURE_SMMU_SSD_REG_802_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_802_OFST))
5630 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_803 register for the ALT_SMMU_SECURE instance. */
5631 #define ALT_SMMU_SECURE_SMMU_SSD_REG_803_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_803_OFST))
5632 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_804 register for the ALT_SMMU_SECURE instance. */
5633 #define ALT_SMMU_SECURE_SMMU_SSD_REG_804_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_804_OFST))
5634 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_805 register for the ALT_SMMU_SECURE instance. */
5635 #define ALT_SMMU_SECURE_SMMU_SSD_REG_805_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_805_OFST))
5636 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_806 register for the ALT_SMMU_SECURE instance. */
5637 #define ALT_SMMU_SECURE_SMMU_SSD_REG_806_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_806_OFST))
5638 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_807 register for the ALT_SMMU_SECURE instance. */
5639 #define ALT_SMMU_SECURE_SMMU_SSD_REG_807_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_807_OFST))
5640 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_808 register for the ALT_SMMU_SECURE instance. */
5641 #define ALT_SMMU_SECURE_SMMU_SSD_REG_808_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_808_OFST))
5642 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_809 register for the ALT_SMMU_SECURE instance. */
5643 #define ALT_SMMU_SECURE_SMMU_SSD_REG_809_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_809_OFST))
5644 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_810 register for the ALT_SMMU_SECURE instance. */
5645 #define ALT_SMMU_SECURE_SMMU_SSD_REG_810_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_810_OFST))
5646 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_811 register for the ALT_SMMU_SECURE instance. */
5647 #define ALT_SMMU_SECURE_SMMU_SSD_REG_811_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_811_OFST))
5648 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_812 register for the ALT_SMMU_SECURE instance. */
5649 #define ALT_SMMU_SECURE_SMMU_SSD_REG_812_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_812_OFST))
5650 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_813 register for the ALT_SMMU_SECURE instance. */
5651 #define ALT_SMMU_SECURE_SMMU_SSD_REG_813_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_813_OFST))
5652 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_814 register for the ALT_SMMU_SECURE instance. */
5653 #define ALT_SMMU_SECURE_SMMU_SSD_REG_814_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_814_OFST))
5654 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_815 register for the ALT_SMMU_SECURE instance. */
5655 #define ALT_SMMU_SECURE_SMMU_SSD_REG_815_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_815_OFST))
5656 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_816 register for the ALT_SMMU_SECURE instance. */
5657 #define ALT_SMMU_SECURE_SMMU_SSD_REG_816_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_816_OFST))
5658 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_817 register for the ALT_SMMU_SECURE instance. */
5659 #define ALT_SMMU_SECURE_SMMU_SSD_REG_817_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_817_OFST))
5660 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_818 register for the ALT_SMMU_SECURE instance. */
5661 #define ALT_SMMU_SECURE_SMMU_SSD_REG_818_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_818_OFST))
5662 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_819 register for the ALT_SMMU_SECURE instance. */
5663 #define ALT_SMMU_SECURE_SMMU_SSD_REG_819_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_819_OFST))
5664 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_820 register for the ALT_SMMU_SECURE instance. */
5665 #define ALT_SMMU_SECURE_SMMU_SSD_REG_820_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_820_OFST))
5666 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_821 register for the ALT_SMMU_SECURE instance. */
5667 #define ALT_SMMU_SECURE_SMMU_SSD_REG_821_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_821_OFST))
5668 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_822 register for the ALT_SMMU_SECURE instance. */
5669 #define ALT_SMMU_SECURE_SMMU_SSD_REG_822_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_822_OFST))
5670 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_823 register for the ALT_SMMU_SECURE instance. */
5671 #define ALT_SMMU_SECURE_SMMU_SSD_REG_823_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_823_OFST))
5672 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_824 register for the ALT_SMMU_SECURE instance. */
5673 #define ALT_SMMU_SECURE_SMMU_SSD_REG_824_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_824_OFST))
5674 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_825 register for the ALT_SMMU_SECURE instance. */
5675 #define ALT_SMMU_SECURE_SMMU_SSD_REG_825_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_825_OFST))
5676 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_826 register for the ALT_SMMU_SECURE instance. */
5677 #define ALT_SMMU_SECURE_SMMU_SSD_REG_826_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_826_OFST))
5678 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_827 register for the ALT_SMMU_SECURE instance. */
5679 #define ALT_SMMU_SECURE_SMMU_SSD_REG_827_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_827_OFST))
5680 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_828 register for the ALT_SMMU_SECURE instance. */
5681 #define ALT_SMMU_SECURE_SMMU_SSD_REG_828_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_828_OFST))
5682 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_829 register for the ALT_SMMU_SECURE instance. */
5683 #define ALT_SMMU_SECURE_SMMU_SSD_REG_829_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_829_OFST))
5684 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_830 register for the ALT_SMMU_SECURE instance. */
5685 #define ALT_SMMU_SECURE_SMMU_SSD_REG_830_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_830_OFST))
5686 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_831 register for the ALT_SMMU_SECURE instance. */
5687 #define ALT_SMMU_SECURE_SMMU_SSD_REG_831_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_831_OFST))
5688 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_832 register for the ALT_SMMU_SECURE instance. */
5689 #define ALT_SMMU_SECURE_SMMU_SSD_REG_832_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_832_OFST))
5690 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_833 register for the ALT_SMMU_SECURE instance. */
5691 #define ALT_SMMU_SECURE_SMMU_SSD_REG_833_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_833_OFST))
5692 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_834 register for the ALT_SMMU_SECURE instance. */
5693 #define ALT_SMMU_SECURE_SMMU_SSD_REG_834_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_834_OFST))
5694 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_835 register for the ALT_SMMU_SECURE instance. */
5695 #define ALT_SMMU_SECURE_SMMU_SSD_REG_835_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_835_OFST))
5696 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_836 register for the ALT_SMMU_SECURE instance. */
5697 #define ALT_SMMU_SECURE_SMMU_SSD_REG_836_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_836_OFST))
5698 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_837 register for the ALT_SMMU_SECURE instance. */
5699 #define ALT_SMMU_SECURE_SMMU_SSD_REG_837_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_837_OFST))
5700 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_838 register for the ALT_SMMU_SECURE instance. */
5701 #define ALT_SMMU_SECURE_SMMU_SSD_REG_838_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_838_OFST))
5702 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_839 register for the ALT_SMMU_SECURE instance. */
5703 #define ALT_SMMU_SECURE_SMMU_SSD_REG_839_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_839_OFST))
5704 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_840 register for the ALT_SMMU_SECURE instance. */
5705 #define ALT_SMMU_SECURE_SMMU_SSD_REG_840_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_840_OFST))
5706 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_841 register for the ALT_SMMU_SECURE instance. */
5707 #define ALT_SMMU_SECURE_SMMU_SSD_REG_841_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_841_OFST))
5708 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_842 register for the ALT_SMMU_SECURE instance. */
5709 #define ALT_SMMU_SECURE_SMMU_SSD_REG_842_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_842_OFST))
5710 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_843 register for the ALT_SMMU_SECURE instance. */
5711 #define ALT_SMMU_SECURE_SMMU_SSD_REG_843_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_843_OFST))
5712 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_844 register for the ALT_SMMU_SECURE instance. */
5713 #define ALT_SMMU_SECURE_SMMU_SSD_REG_844_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_844_OFST))
5714 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_845 register for the ALT_SMMU_SECURE instance. */
5715 #define ALT_SMMU_SECURE_SMMU_SSD_REG_845_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_845_OFST))
5716 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_846 register for the ALT_SMMU_SECURE instance. */
5717 #define ALT_SMMU_SECURE_SMMU_SSD_REG_846_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_846_OFST))
5718 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_847 register for the ALT_SMMU_SECURE instance. */
5719 #define ALT_SMMU_SECURE_SMMU_SSD_REG_847_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_847_OFST))
5720 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_848 register for the ALT_SMMU_SECURE instance. */
5721 #define ALT_SMMU_SECURE_SMMU_SSD_REG_848_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_848_OFST))
5722 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_849 register for the ALT_SMMU_SECURE instance. */
5723 #define ALT_SMMU_SECURE_SMMU_SSD_REG_849_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_849_OFST))
5724 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_850 register for the ALT_SMMU_SECURE instance. */
5725 #define ALT_SMMU_SECURE_SMMU_SSD_REG_850_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_850_OFST))
5726 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_851 register for the ALT_SMMU_SECURE instance. */
5727 #define ALT_SMMU_SECURE_SMMU_SSD_REG_851_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_851_OFST))
5728 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_852 register for the ALT_SMMU_SECURE instance. */
5729 #define ALT_SMMU_SECURE_SMMU_SSD_REG_852_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_852_OFST))
5730 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_853 register for the ALT_SMMU_SECURE instance. */
5731 #define ALT_SMMU_SECURE_SMMU_SSD_REG_853_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_853_OFST))
5732 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_854 register for the ALT_SMMU_SECURE instance. */
5733 #define ALT_SMMU_SECURE_SMMU_SSD_REG_854_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_854_OFST))
5734 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_855 register for the ALT_SMMU_SECURE instance. */
5735 #define ALT_SMMU_SECURE_SMMU_SSD_REG_855_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_855_OFST))
5736 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_856 register for the ALT_SMMU_SECURE instance. */
5737 #define ALT_SMMU_SECURE_SMMU_SSD_REG_856_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_856_OFST))
5738 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_857 register for the ALT_SMMU_SECURE instance. */
5739 #define ALT_SMMU_SECURE_SMMU_SSD_REG_857_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_857_OFST))
5740 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_858 register for the ALT_SMMU_SECURE instance. */
5741 #define ALT_SMMU_SECURE_SMMU_SSD_REG_858_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_858_OFST))
5742 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_859 register for the ALT_SMMU_SECURE instance. */
5743 #define ALT_SMMU_SECURE_SMMU_SSD_REG_859_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_859_OFST))
5744 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_860 register for the ALT_SMMU_SECURE instance. */
5745 #define ALT_SMMU_SECURE_SMMU_SSD_REG_860_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_860_OFST))
5746 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_861 register for the ALT_SMMU_SECURE instance. */
5747 #define ALT_SMMU_SECURE_SMMU_SSD_REG_861_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_861_OFST))
5748 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_862 register for the ALT_SMMU_SECURE instance. */
5749 #define ALT_SMMU_SECURE_SMMU_SSD_REG_862_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_862_OFST))
5750 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_863 register for the ALT_SMMU_SECURE instance. */
5751 #define ALT_SMMU_SECURE_SMMU_SSD_REG_863_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_863_OFST))
5752 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_864 register for the ALT_SMMU_SECURE instance. */
5753 #define ALT_SMMU_SECURE_SMMU_SSD_REG_864_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_864_OFST))
5754 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_865 register for the ALT_SMMU_SECURE instance. */
5755 #define ALT_SMMU_SECURE_SMMU_SSD_REG_865_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_865_OFST))
5756 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_866 register for the ALT_SMMU_SECURE instance. */
5757 #define ALT_SMMU_SECURE_SMMU_SSD_REG_866_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_866_OFST))
5758 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_867 register for the ALT_SMMU_SECURE instance. */
5759 #define ALT_SMMU_SECURE_SMMU_SSD_REG_867_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_867_OFST))
5760 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_868 register for the ALT_SMMU_SECURE instance. */
5761 #define ALT_SMMU_SECURE_SMMU_SSD_REG_868_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_868_OFST))
5762 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_869 register for the ALT_SMMU_SECURE instance. */
5763 #define ALT_SMMU_SECURE_SMMU_SSD_REG_869_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_869_OFST))
5764 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_870 register for the ALT_SMMU_SECURE instance. */
5765 #define ALT_SMMU_SECURE_SMMU_SSD_REG_870_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_870_OFST))
5766 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_871 register for the ALT_SMMU_SECURE instance. */
5767 #define ALT_SMMU_SECURE_SMMU_SSD_REG_871_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_871_OFST))
5768 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_872 register for the ALT_SMMU_SECURE instance. */
5769 #define ALT_SMMU_SECURE_SMMU_SSD_REG_872_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_872_OFST))
5770 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_873 register for the ALT_SMMU_SECURE instance. */
5771 #define ALT_SMMU_SECURE_SMMU_SSD_REG_873_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_873_OFST))
5772 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_874 register for the ALT_SMMU_SECURE instance. */
5773 #define ALT_SMMU_SECURE_SMMU_SSD_REG_874_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_874_OFST))
5774 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_875 register for the ALT_SMMU_SECURE instance. */
5775 #define ALT_SMMU_SECURE_SMMU_SSD_REG_875_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_875_OFST))
5776 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_876 register for the ALT_SMMU_SECURE instance. */
5777 #define ALT_SMMU_SECURE_SMMU_SSD_REG_876_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_876_OFST))
5778 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_877 register for the ALT_SMMU_SECURE instance. */
5779 #define ALT_SMMU_SECURE_SMMU_SSD_REG_877_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_877_OFST))
5780 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_878 register for the ALT_SMMU_SECURE instance. */
5781 #define ALT_SMMU_SECURE_SMMU_SSD_REG_878_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_878_OFST))
5782 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_879 register for the ALT_SMMU_SECURE instance. */
5783 #define ALT_SMMU_SECURE_SMMU_SSD_REG_879_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_879_OFST))
5784 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_880 register for the ALT_SMMU_SECURE instance. */
5785 #define ALT_SMMU_SECURE_SMMU_SSD_REG_880_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_880_OFST))
5786 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_881 register for the ALT_SMMU_SECURE instance. */
5787 #define ALT_SMMU_SECURE_SMMU_SSD_REG_881_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_881_OFST))
5788 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_882 register for the ALT_SMMU_SECURE instance. */
5789 #define ALT_SMMU_SECURE_SMMU_SSD_REG_882_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_882_OFST))
5790 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_883 register for the ALT_SMMU_SECURE instance. */
5791 #define ALT_SMMU_SECURE_SMMU_SSD_REG_883_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_883_OFST))
5792 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_884 register for the ALT_SMMU_SECURE instance. */
5793 #define ALT_SMMU_SECURE_SMMU_SSD_REG_884_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_884_OFST))
5794 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_885 register for the ALT_SMMU_SECURE instance. */
5795 #define ALT_SMMU_SECURE_SMMU_SSD_REG_885_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_885_OFST))
5796 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_886 register for the ALT_SMMU_SECURE instance. */
5797 #define ALT_SMMU_SECURE_SMMU_SSD_REG_886_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_886_OFST))
5798 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_887 register for the ALT_SMMU_SECURE instance. */
5799 #define ALT_SMMU_SECURE_SMMU_SSD_REG_887_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_887_OFST))
5800 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_888 register for the ALT_SMMU_SECURE instance. */
5801 #define ALT_SMMU_SECURE_SMMU_SSD_REG_888_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_888_OFST))
5802 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_889 register for the ALT_SMMU_SECURE instance. */
5803 #define ALT_SMMU_SECURE_SMMU_SSD_REG_889_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_889_OFST))
5804 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_890 register for the ALT_SMMU_SECURE instance. */
5805 #define ALT_SMMU_SECURE_SMMU_SSD_REG_890_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_890_OFST))
5806 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_891 register for the ALT_SMMU_SECURE instance. */
5807 #define ALT_SMMU_SECURE_SMMU_SSD_REG_891_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_891_OFST))
5808 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_892 register for the ALT_SMMU_SECURE instance. */
5809 #define ALT_SMMU_SECURE_SMMU_SSD_REG_892_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_892_OFST))
5810 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_893 register for the ALT_SMMU_SECURE instance. */
5811 #define ALT_SMMU_SECURE_SMMU_SSD_REG_893_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_893_OFST))
5812 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_894 register for the ALT_SMMU_SECURE instance. */
5813 #define ALT_SMMU_SECURE_SMMU_SSD_REG_894_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_894_OFST))
5814 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_895 register for the ALT_SMMU_SECURE instance. */
5815 #define ALT_SMMU_SECURE_SMMU_SSD_REG_895_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_895_OFST))
5816 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_896 register for the ALT_SMMU_SECURE instance. */
5817 #define ALT_SMMU_SECURE_SMMU_SSD_REG_896_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_896_OFST))
5818 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_897 register for the ALT_SMMU_SECURE instance. */
5819 #define ALT_SMMU_SECURE_SMMU_SSD_REG_897_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_897_OFST))
5820 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_898 register for the ALT_SMMU_SECURE instance. */
5821 #define ALT_SMMU_SECURE_SMMU_SSD_REG_898_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_898_OFST))
5822 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_899 register for the ALT_SMMU_SECURE instance. */
5823 #define ALT_SMMU_SECURE_SMMU_SSD_REG_899_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_899_OFST))
5824 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_900 register for the ALT_SMMU_SECURE instance. */
5825 #define ALT_SMMU_SECURE_SMMU_SSD_REG_900_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_900_OFST))
5826 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_901 register for the ALT_SMMU_SECURE instance. */
5827 #define ALT_SMMU_SECURE_SMMU_SSD_REG_901_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_901_OFST))
5828 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_902 register for the ALT_SMMU_SECURE instance. */
5829 #define ALT_SMMU_SECURE_SMMU_SSD_REG_902_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_902_OFST))
5830 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_903 register for the ALT_SMMU_SECURE instance. */
5831 #define ALT_SMMU_SECURE_SMMU_SSD_REG_903_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_903_OFST))
5832 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_904 register for the ALT_SMMU_SECURE instance. */
5833 #define ALT_SMMU_SECURE_SMMU_SSD_REG_904_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_904_OFST))
5834 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_905 register for the ALT_SMMU_SECURE instance. */
5835 #define ALT_SMMU_SECURE_SMMU_SSD_REG_905_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_905_OFST))
5836 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_906 register for the ALT_SMMU_SECURE instance. */
5837 #define ALT_SMMU_SECURE_SMMU_SSD_REG_906_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_906_OFST))
5838 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_907 register for the ALT_SMMU_SECURE instance. */
5839 #define ALT_SMMU_SECURE_SMMU_SSD_REG_907_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_907_OFST))
5840 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_908 register for the ALT_SMMU_SECURE instance. */
5841 #define ALT_SMMU_SECURE_SMMU_SSD_REG_908_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_908_OFST))
5842 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_909 register for the ALT_SMMU_SECURE instance. */
5843 #define ALT_SMMU_SECURE_SMMU_SSD_REG_909_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_909_OFST))
5844 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_910 register for the ALT_SMMU_SECURE instance. */
5845 #define ALT_SMMU_SECURE_SMMU_SSD_REG_910_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_910_OFST))
5846 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_911 register for the ALT_SMMU_SECURE instance. */
5847 #define ALT_SMMU_SECURE_SMMU_SSD_REG_911_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_911_OFST))
5848 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_912 register for the ALT_SMMU_SECURE instance. */
5849 #define ALT_SMMU_SECURE_SMMU_SSD_REG_912_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_912_OFST))
5850 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_913 register for the ALT_SMMU_SECURE instance. */
5851 #define ALT_SMMU_SECURE_SMMU_SSD_REG_913_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_913_OFST))
5852 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_914 register for the ALT_SMMU_SECURE instance. */
5853 #define ALT_SMMU_SECURE_SMMU_SSD_REG_914_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_914_OFST))
5854 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_915 register for the ALT_SMMU_SECURE instance. */
5855 #define ALT_SMMU_SECURE_SMMU_SSD_REG_915_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_915_OFST))
5856 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_916 register for the ALT_SMMU_SECURE instance. */
5857 #define ALT_SMMU_SECURE_SMMU_SSD_REG_916_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_916_OFST))
5858 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_917 register for the ALT_SMMU_SECURE instance. */
5859 #define ALT_SMMU_SECURE_SMMU_SSD_REG_917_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_917_OFST))
5860 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_918 register for the ALT_SMMU_SECURE instance. */
5861 #define ALT_SMMU_SECURE_SMMU_SSD_REG_918_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_918_OFST))
5862 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_919 register for the ALT_SMMU_SECURE instance. */
5863 #define ALT_SMMU_SECURE_SMMU_SSD_REG_919_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_919_OFST))
5864 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_920 register for the ALT_SMMU_SECURE instance. */
5865 #define ALT_SMMU_SECURE_SMMU_SSD_REG_920_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_920_OFST))
5866 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_921 register for the ALT_SMMU_SECURE instance. */
5867 #define ALT_SMMU_SECURE_SMMU_SSD_REG_921_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_921_OFST))
5868 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_922 register for the ALT_SMMU_SECURE instance. */
5869 #define ALT_SMMU_SECURE_SMMU_SSD_REG_922_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_922_OFST))
5870 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_923 register for the ALT_SMMU_SECURE instance. */
5871 #define ALT_SMMU_SECURE_SMMU_SSD_REG_923_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_923_OFST))
5872 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_924 register for the ALT_SMMU_SECURE instance. */
5873 #define ALT_SMMU_SECURE_SMMU_SSD_REG_924_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_924_OFST))
5874 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_925 register for the ALT_SMMU_SECURE instance. */
5875 #define ALT_SMMU_SECURE_SMMU_SSD_REG_925_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_925_OFST))
5876 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_926 register for the ALT_SMMU_SECURE instance. */
5877 #define ALT_SMMU_SECURE_SMMU_SSD_REG_926_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_926_OFST))
5878 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_927 register for the ALT_SMMU_SECURE instance. */
5879 #define ALT_SMMU_SECURE_SMMU_SSD_REG_927_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_927_OFST))
5880 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_928 register for the ALT_SMMU_SECURE instance. */
5881 #define ALT_SMMU_SECURE_SMMU_SSD_REG_928_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_928_OFST))
5882 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_929 register for the ALT_SMMU_SECURE instance. */
5883 #define ALT_SMMU_SECURE_SMMU_SSD_REG_929_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_929_OFST))
5884 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_930 register for the ALT_SMMU_SECURE instance. */
5885 #define ALT_SMMU_SECURE_SMMU_SSD_REG_930_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_930_OFST))
5886 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_931 register for the ALT_SMMU_SECURE instance. */
5887 #define ALT_SMMU_SECURE_SMMU_SSD_REG_931_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_931_OFST))
5888 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_932 register for the ALT_SMMU_SECURE instance. */
5889 #define ALT_SMMU_SECURE_SMMU_SSD_REG_932_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_932_OFST))
5890 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_933 register for the ALT_SMMU_SECURE instance. */
5891 #define ALT_SMMU_SECURE_SMMU_SSD_REG_933_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_933_OFST))
5892 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_934 register for the ALT_SMMU_SECURE instance. */
5893 #define ALT_SMMU_SECURE_SMMU_SSD_REG_934_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_934_OFST))
5894 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_935 register for the ALT_SMMU_SECURE instance. */
5895 #define ALT_SMMU_SECURE_SMMU_SSD_REG_935_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_935_OFST))
5896 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_936 register for the ALT_SMMU_SECURE instance. */
5897 #define ALT_SMMU_SECURE_SMMU_SSD_REG_936_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_936_OFST))
5898 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_937 register for the ALT_SMMU_SECURE instance. */
5899 #define ALT_SMMU_SECURE_SMMU_SSD_REG_937_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_937_OFST))
5900 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_938 register for the ALT_SMMU_SECURE instance. */
5901 #define ALT_SMMU_SECURE_SMMU_SSD_REG_938_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_938_OFST))
5902 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_939 register for the ALT_SMMU_SECURE instance. */
5903 #define ALT_SMMU_SECURE_SMMU_SSD_REG_939_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_939_OFST))
5904 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_940 register for the ALT_SMMU_SECURE instance. */
5905 #define ALT_SMMU_SECURE_SMMU_SSD_REG_940_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_940_OFST))
5906 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_941 register for the ALT_SMMU_SECURE instance. */
5907 #define ALT_SMMU_SECURE_SMMU_SSD_REG_941_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_941_OFST))
5908 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_942 register for the ALT_SMMU_SECURE instance. */
5909 #define ALT_SMMU_SECURE_SMMU_SSD_REG_942_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_942_OFST))
5910 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_943 register for the ALT_SMMU_SECURE instance. */
5911 #define ALT_SMMU_SECURE_SMMU_SSD_REG_943_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_943_OFST))
5912 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_944 register for the ALT_SMMU_SECURE instance. */
5913 #define ALT_SMMU_SECURE_SMMU_SSD_REG_944_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_944_OFST))
5914 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_945 register for the ALT_SMMU_SECURE instance. */
5915 #define ALT_SMMU_SECURE_SMMU_SSD_REG_945_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_945_OFST))
5916 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_946 register for the ALT_SMMU_SECURE instance. */
5917 #define ALT_SMMU_SECURE_SMMU_SSD_REG_946_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_946_OFST))
5918 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_947 register for the ALT_SMMU_SECURE instance. */
5919 #define ALT_SMMU_SECURE_SMMU_SSD_REG_947_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_947_OFST))
5920 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_948 register for the ALT_SMMU_SECURE instance. */
5921 #define ALT_SMMU_SECURE_SMMU_SSD_REG_948_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_948_OFST))
5922 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_949 register for the ALT_SMMU_SECURE instance. */
5923 #define ALT_SMMU_SECURE_SMMU_SSD_REG_949_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_949_OFST))
5924 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_950 register for the ALT_SMMU_SECURE instance. */
5925 #define ALT_SMMU_SECURE_SMMU_SSD_REG_950_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_950_OFST))
5926 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_951 register for the ALT_SMMU_SECURE instance. */
5927 #define ALT_SMMU_SECURE_SMMU_SSD_REG_951_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_951_OFST))
5928 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_952 register for the ALT_SMMU_SECURE instance. */
5929 #define ALT_SMMU_SECURE_SMMU_SSD_REG_952_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_952_OFST))
5930 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_953 register for the ALT_SMMU_SECURE instance. */
5931 #define ALT_SMMU_SECURE_SMMU_SSD_REG_953_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_953_OFST))
5932 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_954 register for the ALT_SMMU_SECURE instance. */
5933 #define ALT_SMMU_SECURE_SMMU_SSD_REG_954_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_954_OFST))
5934 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_955 register for the ALT_SMMU_SECURE instance. */
5935 #define ALT_SMMU_SECURE_SMMU_SSD_REG_955_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_955_OFST))
5936 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_956 register for the ALT_SMMU_SECURE instance. */
5937 #define ALT_SMMU_SECURE_SMMU_SSD_REG_956_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_956_OFST))
5938 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_957 register for the ALT_SMMU_SECURE instance. */
5939 #define ALT_SMMU_SECURE_SMMU_SSD_REG_957_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_957_OFST))
5940 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_958 register for the ALT_SMMU_SECURE instance. */
5941 #define ALT_SMMU_SECURE_SMMU_SSD_REG_958_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_958_OFST))
5942 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_959 register for the ALT_SMMU_SECURE instance. */
5943 #define ALT_SMMU_SECURE_SMMU_SSD_REG_959_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_959_OFST))
5944 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_960 register for the ALT_SMMU_SECURE instance. */
5945 #define ALT_SMMU_SECURE_SMMU_SSD_REG_960_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_960_OFST))
5946 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_961 register for the ALT_SMMU_SECURE instance. */
5947 #define ALT_SMMU_SECURE_SMMU_SSD_REG_961_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_961_OFST))
5948 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_962 register for the ALT_SMMU_SECURE instance. */
5949 #define ALT_SMMU_SECURE_SMMU_SSD_REG_962_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_962_OFST))
5950 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_963 register for the ALT_SMMU_SECURE instance. */
5951 #define ALT_SMMU_SECURE_SMMU_SSD_REG_963_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_963_OFST))
5952 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_964 register for the ALT_SMMU_SECURE instance. */
5953 #define ALT_SMMU_SECURE_SMMU_SSD_REG_964_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_964_OFST))
5954 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_965 register for the ALT_SMMU_SECURE instance. */
5955 #define ALT_SMMU_SECURE_SMMU_SSD_REG_965_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_965_OFST))
5956 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_966 register for the ALT_SMMU_SECURE instance. */
5957 #define ALT_SMMU_SECURE_SMMU_SSD_REG_966_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_966_OFST))
5958 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_967 register for the ALT_SMMU_SECURE instance. */
5959 #define ALT_SMMU_SECURE_SMMU_SSD_REG_967_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_967_OFST))
5960 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_968 register for the ALT_SMMU_SECURE instance. */
5961 #define ALT_SMMU_SECURE_SMMU_SSD_REG_968_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_968_OFST))
5962 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_969 register for the ALT_SMMU_SECURE instance. */
5963 #define ALT_SMMU_SECURE_SMMU_SSD_REG_969_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_969_OFST))
5964 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_970 register for the ALT_SMMU_SECURE instance. */
5965 #define ALT_SMMU_SECURE_SMMU_SSD_REG_970_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_970_OFST))
5966 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_971 register for the ALT_SMMU_SECURE instance. */
5967 #define ALT_SMMU_SECURE_SMMU_SSD_REG_971_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_971_OFST))
5968 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_972 register for the ALT_SMMU_SECURE instance. */
5969 #define ALT_SMMU_SECURE_SMMU_SSD_REG_972_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_972_OFST))
5970 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_973 register for the ALT_SMMU_SECURE instance. */
5971 #define ALT_SMMU_SECURE_SMMU_SSD_REG_973_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_973_OFST))
5972 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_974 register for the ALT_SMMU_SECURE instance. */
5973 #define ALT_SMMU_SECURE_SMMU_SSD_REG_974_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_974_OFST))
5974 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_975 register for the ALT_SMMU_SECURE instance. */
5975 #define ALT_SMMU_SECURE_SMMU_SSD_REG_975_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_975_OFST))
5976 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_976 register for the ALT_SMMU_SECURE instance. */
5977 #define ALT_SMMU_SECURE_SMMU_SSD_REG_976_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_976_OFST))
5978 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_977 register for the ALT_SMMU_SECURE instance. */
5979 #define ALT_SMMU_SECURE_SMMU_SSD_REG_977_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_977_OFST))
5980 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_978 register for the ALT_SMMU_SECURE instance. */
5981 #define ALT_SMMU_SECURE_SMMU_SSD_REG_978_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_978_OFST))
5982 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_979 register for the ALT_SMMU_SECURE instance. */
5983 #define ALT_SMMU_SECURE_SMMU_SSD_REG_979_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_979_OFST))
5984 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_980 register for the ALT_SMMU_SECURE instance. */
5985 #define ALT_SMMU_SECURE_SMMU_SSD_REG_980_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_980_OFST))
5986 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_981 register for the ALT_SMMU_SECURE instance. */
5987 #define ALT_SMMU_SECURE_SMMU_SSD_REG_981_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_981_OFST))
5988 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_982 register for the ALT_SMMU_SECURE instance. */
5989 #define ALT_SMMU_SECURE_SMMU_SSD_REG_982_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_982_OFST))
5990 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_983 register for the ALT_SMMU_SECURE instance. */
5991 #define ALT_SMMU_SECURE_SMMU_SSD_REG_983_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_983_OFST))
5992 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_984 register for the ALT_SMMU_SECURE instance. */
5993 #define ALT_SMMU_SECURE_SMMU_SSD_REG_984_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_984_OFST))
5994 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_985 register for the ALT_SMMU_SECURE instance. */
5995 #define ALT_SMMU_SECURE_SMMU_SSD_REG_985_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_985_OFST))
5996 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_986 register for the ALT_SMMU_SECURE instance. */
5997 #define ALT_SMMU_SECURE_SMMU_SSD_REG_986_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_986_OFST))
5998 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_987 register for the ALT_SMMU_SECURE instance. */
5999 #define ALT_SMMU_SECURE_SMMU_SSD_REG_987_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_987_OFST))
6000 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_988 register for the ALT_SMMU_SECURE instance. */
6001 #define ALT_SMMU_SECURE_SMMU_SSD_REG_988_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_988_OFST))
6002 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_989 register for the ALT_SMMU_SECURE instance. */
6003 #define ALT_SMMU_SECURE_SMMU_SSD_REG_989_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_989_OFST))
6004 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_990 register for the ALT_SMMU_SECURE instance. */
6005 #define ALT_SMMU_SECURE_SMMU_SSD_REG_990_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_990_OFST))
6006 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_991 register for the ALT_SMMU_SECURE instance. */
6007 #define ALT_SMMU_SECURE_SMMU_SSD_REG_991_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_991_OFST))
6008 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_992 register for the ALT_SMMU_SECURE instance. */
6009 #define ALT_SMMU_SECURE_SMMU_SSD_REG_992_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_992_OFST))
6010 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_993 register for the ALT_SMMU_SECURE instance. */
6011 #define ALT_SMMU_SECURE_SMMU_SSD_REG_993_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_993_OFST))
6012 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_994 register for the ALT_SMMU_SECURE instance. */
6013 #define ALT_SMMU_SECURE_SMMU_SSD_REG_994_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_994_OFST))
6014 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_995 register for the ALT_SMMU_SECURE instance. */
6015 #define ALT_SMMU_SECURE_SMMU_SSD_REG_995_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_995_OFST))
6016 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_996 register for the ALT_SMMU_SECURE instance. */
6017 #define ALT_SMMU_SECURE_SMMU_SSD_REG_996_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_996_OFST))
6018 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_997 register for the ALT_SMMU_SECURE instance. */
6019 #define ALT_SMMU_SECURE_SMMU_SSD_REG_997_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_997_OFST))
6020 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_998 register for the ALT_SMMU_SECURE instance. */
6021 #define ALT_SMMU_SECURE_SMMU_SSD_REG_998_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_998_OFST))
6022 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_999 register for the ALT_SMMU_SECURE instance. */
6023 #define ALT_SMMU_SECURE_SMMU_SSD_REG_999_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_999_OFST))
6024 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1000 register for the ALT_SMMU_SECURE instance. */
6025 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1000_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1000_OFST))
6026 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1001 register for the ALT_SMMU_SECURE instance. */
6027 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1001_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1001_OFST))
6028 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1002 register for the ALT_SMMU_SECURE instance. */
6029 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1002_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1002_OFST))
6030 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1003 register for the ALT_SMMU_SECURE instance. */
6031 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1003_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1003_OFST))
6032 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1004 register for the ALT_SMMU_SECURE instance. */
6033 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1004_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1004_OFST))
6034 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1005 register for the ALT_SMMU_SECURE instance. */
6035 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1005_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1005_OFST))
6036 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1006 register for the ALT_SMMU_SECURE instance. */
6037 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1006_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1006_OFST))
6038 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1007 register for the ALT_SMMU_SECURE instance. */
6039 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1007_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1007_OFST))
6040 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1008 register for the ALT_SMMU_SECURE instance. */
6041 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1008_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1008_OFST))
6042 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1009 register for the ALT_SMMU_SECURE instance. */
6043 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1009_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1009_OFST))
6044 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1010 register for the ALT_SMMU_SECURE instance. */
6045 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1010_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1010_OFST))
6046 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1011 register for the ALT_SMMU_SECURE instance. */
6047 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1011_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1011_OFST))
6048 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1012 register for the ALT_SMMU_SECURE instance. */
6049 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1012_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1012_OFST))
6050 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1013 register for the ALT_SMMU_SECURE instance. */
6051 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1013_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1013_OFST))
6052 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1014 register for the ALT_SMMU_SECURE instance. */
6053 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1014_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1014_OFST))
6054 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1015 register for the ALT_SMMU_SECURE instance. */
6055 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1015_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1015_OFST))
6056 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1016 register for the ALT_SMMU_SECURE instance. */
6057 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1016_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1016_OFST))
6058 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1017 register for the ALT_SMMU_SECURE instance. */
6059 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1017_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1017_OFST))
6060 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1018 register for the ALT_SMMU_SECURE instance. */
6061 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1018_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1018_OFST))
6062 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1019 register for the ALT_SMMU_SECURE instance. */
6063 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1019_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1019_OFST))
6064 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1020 register for the ALT_SMMU_SECURE instance. */
6065 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1020_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1020_OFST))
6066 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1021 register for the ALT_SMMU_SECURE instance. */
6067 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1021_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1021_OFST))
6068 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1022 register for the ALT_SMMU_SECURE instance. */
6069 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1022_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1022_OFST))
6070 /* The address of the ALT_SMMU_SECURE_SMMU_SSD_REG_1023 register for the ALT_SMMU_SECURE instance. */
6071 #define ALT_SMMU_SECURE_SMMU_SSD_REG_1023_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_SSD_REG_1023_OFST))
6072 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_SCTLR register for the ALT_SMMU_SECURE instance. */
6073 #define ALT_SMMU_SECURE_SMMU_CB0_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_SCTLR_OFST))
6074 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_ACTLR register for the ALT_SMMU_SECURE instance. */
6075 #define ALT_SMMU_SECURE_SMMU_CB0_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_ACTLR_OFST))
6076 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_RESUME register for the ALT_SMMU_SECURE instance. */
6077 #define ALT_SMMU_SECURE_SMMU_CB0_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_RESUME_OFST))
6078 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TCR2 register for the ALT_SMMU_SECURE instance. */
6079 #define ALT_SMMU_SECURE_SMMU_CB0_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TCR2_OFST))
6080 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
6081 #define ALT_SMMU_SECURE_SMMU_CB0_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TTBR0_LOW_OFST))
6082 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
6083 #define ALT_SMMU_SECURE_SMMU_CB0_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TTBR0_HIGH_OFST))
6084 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
6085 #define ALT_SMMU_SECURE_SMMU_CB0_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TTBR1_LOW_OFST))
6086 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
6087 #define ALT_SMMU_SECURE_SMMU_CB0_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TTBR1_HIGH_OFST))
6088 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
6089 #define ALT_SMMU_SECURE_SMMU_CB0_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TCR_LPAE_OFST))
6090 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
6091 #define ALT_SMMU_SECURE_SMMU_CB0_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_CONTEXTIDR_OFST))
6092 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
6093 #define ALT_SMMU_SECURE_SMMU_CB0_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PRRR_MAIR0_OFST))
6094 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
6095 #define ALT_SMMU_SECURE_SMMU_CB0_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_NMRR_MAIR1_OFST))
6096 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_FSR register for the ALT_SMMU_SECURE instance. */
6097 #define ALT_SMMU_SECURE_SMMU_CB0_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_FSR_OFST))
6098 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
6099 #define ALT_SMMU_SECURE_SMMU_CB0_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_FSRRESTORE_OFST))
6100 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_FAR_LOW register for the ALT_SMMU_SECURE instance. */
6101 #define ALT_SMMU_SECURE_SMMU_CB0_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_FAR_LOW_OFST))
6102 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
6103 #define ALT_SMMU_SECURE_SMMU_CB0_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_FAR_HIGH_OFST))
6104 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_FSYNR0 register for the ALT_SMMU_SECURE instance. */
6105 #define ALT_SMMU_SECURE_SMMU_CB0_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_FSYNR0_OFST))
6106 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
6107 #define ALT_SMMU_SECURE_SMMU_CB0_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_IPAFAR_LOW_OFST))
6108 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
6109 #define ALT_SMMU_SECURE_SMMU_CB0_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_IPAFAR_HIGH_OFST))
6110 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
6111 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIVA_LOW_OFST))
6112 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
6113 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIVA_HIGH_OFST))
6114 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
6115 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIVAA_LOW_OFST))
6116 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
6117 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIVAA_HIGH_OFST))
6118 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIASID register for the ALT_SMMU_SECURE instance. */
6119 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIASID_OFST))
6120 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIALL register for the ALT_SMMU_SECURE instance. */
6121 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIALL_OFST))
6122 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
6123 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIVAL_LOW_OFST))
6124 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
6125 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIVAL_HIGH_OFST))
6126 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
6127 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIVAAL_LOW_OFST))
6128 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
6129 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIVAAL_HIGH_OFST))
6130 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
6131 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIIPAS2_LOW_OFST))
6132 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
6133 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIIPAS2_HIGH_OFST))
6134 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
6135 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIIPAS2L_LOW_OFST))
6136 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
6137 #define ALT_SMMU_SECURE_SMMU_CB0_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBIIPAS2L_HIGH_OFST))
6138 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBSYNC register for the ALT_SMMU_SECURE instance. */
6139 #define ALT_SMMU_SECURE_SMMU_CB0_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBSYNC_OFST))
6140 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
6141 #define ALT_SMMU_SECURE_SMMU_CB0_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_TLBSTATUS_OFST))
6142 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
6143 #define ALT_SMMU_SECURE_SMMU_CB0_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMEVCNTR0_OFST))
6144 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
6145 #define ALT_SMMU_SECURE_SMMU_CB0_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMEVCNTR1_OFST))
6146 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
6147 #define ALT_SMMU_SECURE_SMMU_CB0_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMEVCNTR2_OFST))
6148 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
6149 #define ALT_SMMU_SECURE_SMMU_CB0_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMEVCNTR3_OFST))
6150 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
6151 #define ALT_SMMU_SECURE_SMMU_CB0_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMEVTYPER0_OFST))
6152 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
6153 #define ALT_SMMU_SECURE_SMMU_CB0_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMEVTYPER1_OFST))
6154 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
6155 #define ALT_SMMU_SECURE_SMMU_CB0_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMEVTYPER2_OFST))
6156 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
6157 #define ALT_SMMU_SECURE_SMMU_CB0_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMEVTYPER3_OFST))
6158 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMCFGR register for the ALT_SMMU_SECURE instance. */
6159 #define ALT_SMMU_SECURE_SMMU_CB0_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMCFGR_OFST))
6160 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMCR register for the ALT_SMMU_SECURE instance. */
6161 #define ALT_SMMU_SECURE_SMMU_CB0_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMCR_OFST))
6162 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMCEID register for the ALT_SMMU_SECURE instance. */
6163 #define ALT_SMMU_SECURE_SMMU_CB0_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMCEID_OFST))
6164 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
6165 #define ALT_SMMU_SECURE_SMMU_CB0_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMCNTENSE_OFST))
6166 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
6167 #define ALT_SMMU_SECURE_SMMU_CB0_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMCNTENCLR_OFST))
6168 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
6169 #define ALT_SMMU_SECURE_SMMU_CB0_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMCNTENSET_OFST))
6170 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
6171 #define ALT_SMMU_SECURE_SMMU_CB0_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMINTENCLR_OFST))
6172 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
6173 #define ALT_SMMU_SECURE_SMMU_CB0_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMOVSCLR_OFST))
6174 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMOVSSET register for the ALT_SMMU_SECURE instance. */
6175 #define ALT_SMMU_SECURE_SMMU_CB0_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMOVSSET_OFST))
6176 /* The address of the ALT_SMMU_SECURE_SMMU_CB0_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
6177 #define ALT_SMMU_SECURE_SMMU_CB0_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB0_PMAUTHSTATUS_OFST))
6178 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_SCTLR register for the ALT_SMMU_SECURE instance. */
6179 #define ALT_SMMU_SECURE_SMMU_CB1_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_SCTLR_OFST))
6180 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_ACTLR register for the ALT_SMMU_SECURE instance. */
6181 #define ALT_SMMU_SECURE_SMMU_CB1_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_ACTLR_OFST))
6182 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_RESUME register for the ALT_SMMU_SECURE instance. */
6183 #define ALT_SMMU_SECURE_SMMU_CB1_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_RESUME_OFST))
6184 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TCR2 register for the ALT_SMMU_SECURE instance. */
6185 #define ALT_SMMU_SECURE_SMMU_CB1_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TCR2_OFST))
6186 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
6187 #define ALT_SMMU_SECURE_SMMU_CB1_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TTBR0_LOW_OFST))
6188 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
6189 #define ALT_SMMU_SECURE_SMMU_CB1_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TTBR0_HIGH_OFST))
6190 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
6191 #define ALT_SMMU_SECURE_SMMU_CB1_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TTBR1_LOW_OFST))
6192 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
6193 #define ALT_SMMU_SECURE_SMMU_CB1_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TTBR1_HIGH_OFST))
6194 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
6195 #define ALT_SMMU_SECURE_SMMU_CB1_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TCR_LPAE_OFST))
6196 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
6197 #define ALT_SMMU_SECURE_SMMU_CB1_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_CONTEXTIDR_OFST))
6198 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
6199 #define ALT_SMMU_SECURE_SMMU_CB1_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PRRR_MAIR0_OFST))
6200 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
6201 #define ALT_SMMU_SECURE_SMMU_CB1_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_NMRR_MAIR1_OFST))
6202 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_FSR register for the ALT_SMMU_SECURE instance. */
6203 #define ALT_SMMU_SECURE_SMMU_CB1_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_FSR_OFST))
6204 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
6205 #define ALT_SMMU_SECURE_SMMU_CB1_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_FSRRESTORE_OFST))
6206 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_FAR_LOW register for the ALT_SMMU_SECURE instance. */
6207 #define ALT_SMMU_SECURE_SMMU_CB1_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_FAR_LOW_OFST))
6208 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
6209 #define ALT_SMMU_SECURE_SMMU_CB1_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_FAR_HIGH_OFST))
6210 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_FSYNR0 register for the ALT_SMMU_SECURE instance. */
6211 #define ALT_SMMU_SECURE_SMMU_CB1_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_FSYNR0_OFST))
6212 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
6213 #define ALT_SMMU_SECURE_SMMU_CB1_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_IPAFAR_LOW_OFST))
6214 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
6215 #define ALT_SMMU_SECURE_SMMU_CB1_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_IPAFAR_HIGH_OFST))
6216 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
6217 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIVA_LOW_OFST))
6218 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
6219 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIVA_HIGH_OFST))
6220 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
6221 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIVAA_LOW_OFST))
6222 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
6223 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIVAA_HIGH_OFST))
6224 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIASID register for the ALT_SMMU_SECURE instance. */
6225 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIASID_OFST))
6226 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIALL register for the ALT_SMMU_SECURE instance. */
6227 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIALL_OFST))
6228 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
6229 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIVAL_LOW_OFST))
6230 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
6231 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIVAL_HIGH_OFST))
6232 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
6233 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIVAAL_LOW_OFST))
6234 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
6235 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIVAAL_HIGH_OFST))
6236 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
6237 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIIPAS2_LOW_OFST))
6238 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
6239 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIIPAS2_HIGH_OFST))
6240 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
6241 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIIPAS2L_LOW_OFST))
6242 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
6243 #define ALT_SMMU_SECURE_SMMU_CB1_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBIIPAS2L_HIGH_OFST))
6244 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBSYNC register for the ALT_SMMU_SECURE instance. */
6245 #define ALT_SMMU_SECURE_SMMU_CB1_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBSYNC_OFST))
6246 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
6247 #define ALT_SMMU_SECURE_SMMU_CB1_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_TLBSTATUS_OFST))
6248 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
6249 #define ALT_SMMU_SECURE_SMMU_CB1_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMEVCNTR0_OFST))
6250 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
6251 #define ALT_SMMU_SECURE_SMMU_CB1_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMEVCNTR1_OFST))
6252 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
6253 #define ALT_SMMU_SECURE_SMMU_CB1_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMEVCNTR2_OFST))
6254 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
6255 #define ALT_SMMU_SECURE_SMMU_CB1_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMEVCNTR3_OFST))
6256 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
6257 #define ALT_SMMU_SECURE_SMMU_CB1_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMEVTYPER0_OFST))
6258 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
6259 #define ALT_SMMU_SECURE_SMMU_CB1_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMEVTYPER1_OFST))
6260 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
6261 #define ALT_SMMU_SECURE_SMMU_CB1_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMEVTYPER2_OFST))
6262 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
6263 #define ALT_SMMU_SECURE_SMMU_CB1_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMEVTYPER3_OFST))
6264 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMCFGR register for the ALT_SMMU_SECURE instance. */
6265 #define ALT_SMMU_SECURE_SMMU_CB1_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMCFGR_OFST))
6266 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMCR register for the ALT_SMMU_SECURE instance. */
6267 #define ALT_SMMU_SECURE_SMMU_CB1_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMCR_OFST))
6268 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMCEID register for the ALT_SMMU_SECURE instance. */
6269 #define ALT_SMMU_SECURE_SMMU_CB1_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMCEID_OFST))
6270 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
6271 #define ALT_SMMU_SECURE_SMMU_CB1_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMCNTENSE_OFST))
6272 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
6273 #define ALT_SMMU_SECURE_SMMU_CB1_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMCNTENCLR_OFST))
6274 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
6275 #define ALT_SMMU_SECURE_SMMU_CB1_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMCNTENSET_OFST))
6276 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
6277 #define ALT_SMMU_SECURE_SMMU_CB1_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMINTENCLR_OFST))
6278 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
6279 #define ALT_SMMU_SECURE_SMMU_CB1_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMOVSCLR_OFST))
6280 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMOVSSET register for the ALT_SMMU_SECURE instance. */
6281 #define ALT_SMMU_SECURE_SMMU_CB1_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMOVSSET_OFST))
6282 /* The address of the ALT_SMMU_SECURE_SMMU_CB1_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
6283 #define ALT_SMMU_SECURE_SMMU_CB1_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB1_PMAUTHSTATUS_OFST))
6284 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_SCTLR register for the ALT_SMMU_SECURE instance. */
6285 #define ALT_SMMU_SECURE_SMMU_CB2_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_SCTLR_OFST))
6286 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_ACTLR register for the ALT_SMMU_SECURE instance. */
6287 #define ALT_SMMU_SECURE_SMMU_CB2_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_ACTLR_OFST))
6288 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_RESUME register for the ALT_SMMU_SECURE instance. */
6289 #define ALT_SMMU_SECURE_SMMU_CB2_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_RESUME_OFST))
6290 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TCR2 register for the ALT_SMMU_SECURE instance. */
6291 #define ALT_SMMU_SECURE_SMMU_CB2_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TCR2_OFST))
6292 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
6293 #define ALT_SMMU_SECURE_SMMU_CB2_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TTBR0_LOW_OFST))
6294 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
6295 #define ALT_SMMU_SECURE_SMMU_CB2_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TTBR0_HIGH_OFST))
6296 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
6297 #define ALT_SMMU_SECURE_SMMU_CB2_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TTBR1_LOW_OFST))
6298 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
6299 #define ALT_SMMU_SECURE_SMMU_CB2_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TTBR1_HIGH_OFST))
6300 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
6301 #define ALT_SMMU_SECURE_SMMU_CB2_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TCR_LPAE_OFST))
6302 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
6303 #define ALT_SMMU_SECURE_SMMU_CB2_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_CONTEXTIDR_OFST))
6304 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
6305 #define ALT_SMMU_SECURE_SMMU_CB2_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PRRR_MAIR0_OFST))
6306 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
6307 #define ALT_SMMU_SECURE_SMMU_CB2_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_NMRR_MAIR1_OFST))
6308 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_FSR register for the ALT_SMMU_SECURE instance. */
6309 #define ALT_SMMU_SECURE_SMMU_CB2_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_FSR_OFST))
6310 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
6311 #define ALT_SMMU_SECURE_SMMU_CB2_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_FSRRESTORE_OFST))
6312 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_FAR_LOW register for the ALT_SMMU_SECURE instance. */
6313 #define ALT_SMMU_SECURE_SMMU_CB2_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_FAR_LOW_OFST))
6314 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
6315 #define ALT_SMMU_SECURE_SMMU_CB2_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_FAR_HIGH_OFST))
6316 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_FSYNR0 register for the ALT_SMMU_SECURE instance. */
6317 #define ALT_SMMU_SECURE_SMMU_CB2_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_FSYNR0_OFST))
6318 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
6319 #define ALT_SMMU_SECURE_SMMU_CB2_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_IPAFAR_LOW_OFST))
6320 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
6321 #define ALT_SMMU_SECURE_SMMU_CB2_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_IPAFAR_HIGH_OFST))
6322 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
6323 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIVA_LOW_OFST))
6324 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
6325 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIVA_HIGH_OFST))
6326 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
6327 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIVAA_LOW_OFST))
6328 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
6329 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIVAA_HIGH_OFST))
6330 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIASID register for the ALT_SMMU_SECURE instance. */
6331 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIASID_OFST))
6332 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIALL register for the ALT_SMMU_SECURE instance. */
6333 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIALL_OFST))
6334 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
6335 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIVAL_LOW_OFST))
6336 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
6337 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIVAL_HIGH_OFST))
6338 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
6339 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIVAAL_LOW_OFST))
6340 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
6341 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIVAAL_HIGH_OFST))
6342 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
6343 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIIPAS2_LOW_OFST))
6344 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
6345 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIIPAS2_HIGH_OFST))
6346 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
6347 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIIPAS2L_LOW_OFST))
6348 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
6349 #define ALT_SMMU_SECURE_SMMU_CB2_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBIIPAS2L_HIGH_OFST))
6350 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBSYNC register for the ALT_SMMU_SECURE instance. */
6351 #define ALT_SMMU_SECURE_SMMU_CB2_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBSYNC_OFST))
6352 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
6353 #define ALT_SMMU_SECURE_SMMU_CB2_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_TLBSTATUS_OFST))
6354 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
6355 #define ALT_SMMU_SECURE_SMMU_CB2_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMEVCNTR0_OFST))
6356 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
6357 #define ALT_SMMU_SECURE_SMMU_CB2_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMEVCNTR1_OFST))
6358 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
6359 #define ALT_SMMU_SECURE_SMMU_CB2_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMEVCNTR2_OFST))
6360 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
6361 #define ALT_SMMU_SECURE_SMMU_CB2_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMEVCNTR3_OFST))
6362 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
6363 #define ALT_SMMU_SECURE_SMMU_CB2_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMEVTYPER0_OFST))
6364 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
6365 #define ALT_SMMU_SECURE_SMMU_CB2_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMEVTYPER1_OFST))
6366 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
6367 #define ALT_SMMU_SECURE_SMMU_CB2_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMEVTYPER2_OFST))
6368 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
6369 #define ALT_SMMU_SECURE_SMMU_CB2_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMEVTYPER3_OFST))
6370 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMCFGR register for the ALT_SMMU_SECURE instance. */
6371 #define ALT_SMMU_SECURE_SMMU_CB2_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMCFGR_OFST))
6372 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMCR register for the ALT_SMMU_SECURE instance. */
6373 #define ALT_SMMU_SECURE_SMMU_CB2_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMCR_OFST))
6374 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMCEID register for the ALT_SMMU_SECURE instance. */
6375 #define ALT_SMMU_SECURE_SMMU_CB2_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMCEID_OFST))
6376 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
6377 #define ALT_SMMU_SECURE_SMMU_CB2_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMCNTENSE_OFST))
6378 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
6379 #define ALT_SMMU_SECURE_SMMU_CB2_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMCNTENCLR_OFST))
6380 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
6381 #define ALT_SMMU_SECURE_SMMU_CB2_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMCNTENSET_OFST))
6382 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
6383 #define ALT_SMMU_SECURE_SMMU_CB2_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMINTENCLR_OFST))
6384 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
6385 #define ALT_SMMU_SECURE_SMMU_CB2_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMOVSCLR_OFST))
6386 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMOVSSET register for the ALT_SMMU_SECURE instance. */
6387 #define ALT_SMMU_SECURE_SMMU_CB2_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMOVSSET_OFST))
6388 /* The address of the ALT_SMMU_SECURE_SMMU_CB2_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
6389 #define ALT_SMMU_SECURE_SMMU_CB2_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB2_PMAUTHSTATUS_OFST))
6390 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_SCTLR register for the ALT_SMMU_SECURE instance. */
6391 #define ALT_SMMU_SECURE_SMMU_CB3_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_SCTLR_OFST))
6392 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_ACTLR register for the ALT_SMMU_SECURE instance. */
6393 #define ALT_SMMU_SECURE_SMMU_CB3_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_ACTLR_OFST))
6394 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_RESUME register for the ALT_SMMU_SECURE instance. */
6395 #define ALT_SMMU_SECURE_SMMU_CB3_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_RESUME_OFST))
6396 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TCR2 register for the ALT_SMMU_SECURE instance. */
6397 #define ALT_SMMU_SECURE_SMMU_CB3_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TCR2_OFST))
6398 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
6399 #define ALT_SMMU_SECURE_SMMU_CB3_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TTBR0_LOW_OFST))
6400 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
6401 #define ALT_SMMU_SECURE_SMMU_CB3_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TTBR0_HIGH_OFST))
6402 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
6403 #define ALT_SMMU_SECURE_SMMU_CB3_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TTBR1_LOW_OFST))
6404 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
6405 #define ALT_SMMU_SECURE_SMMU_CB3_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TTBR1_HIGH_OFST))
6406 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
6407 #define ALT_SMMU_SECURE_SMMU_CB3_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TCR_LPAE_OFST))
6408 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
6409 #define ALT_SMMU_SECURE_SMMU_CB3_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_CONTEXTIDR_OFST))
6410 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
6411 #define ALT_SMMU_SECURE_SMMU_CB3_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PRRR_MAIR0_OFST))
6412 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
6413 #define ALT_SMMU_SECURE_SMMU_CB3_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_NMRR_MAIR1_OFST))
6414 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_FSR register for the ALT_SMMU_SECURE instance. */
6415 #define ALT_SMMU_SECURE_SMMU_CB3_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_FSR_OFST))
6416 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
6417 #define ALT_SMMU_SECURE_SMMU_CB3_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_FSRRESTORE_OFST))
6418 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_FAR_LOW register for the ALT_SMMU_SECURE instance. */
6419 #define ALT_SMMU_SECURE_SMMU_CB3_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_FAR_LOW_OFST))
6420 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
6421 #define ALT_SMMU_SECURE_SMMU_CB3_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_FAR_HIGH_OFST))
6422 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_FSYNR0 register for the ALT_SMMU_SECURE instance. */
6423 #define ALT_SMMU_SECURE_SMMU_CB3_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_FSYNR0_OFST))
6424 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
6425 #define ALT_SMMU_SECURE_SMMU_CB3_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_IPAFAR_LOW_OFST))
6426 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
6427 #define ALT_SMMU_SECURE_SMMU_CB3_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_IPAFAR_HIGH_OFST))
6428 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
6429 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIVA_LOW_OFST))
6430 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
6431 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIVA_HIGH_OFST))
6432 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
6433 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIVAA_LOW_OFST))
6434 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
6435 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIVAA_HIGH_OFST))
6436 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIASID register for the ALT_SMMU_SECURE instance. */
6437 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIASID_OFST))
6438 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIALL register for the ALT_SMMU_SECURE instance. */
6439 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIALL_OFST))
6440 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
6441 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIVAL_LOW_OFST))
6442 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
6443 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIVAL_HIGH_OFST))
6444 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
6445 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIVAAL_LOW_OFST))
6446 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
6447 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIVAAL_HIGH_OFST))
6448 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
6449 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIIPAS2_LOW_OFST))
6450 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
6451 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIIPAS2_HIGH_OFST))
6452 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
6453 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIIPAS2L_LOW_OFST))
6454 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
6455 #define ALT_SMMU_SECURE_SMMU_CB3_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBIIPAS2L_HIGH_OFST))
6456 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBSYNC register for the ALT_SMMU_SECURE instance. */
6457 #define ALT_SMMU_SECURE_SMMU_CB3_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBSYNC_OFST))
6458 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
6459 #define ALT_SMMU_SECURE_SMMU_CB3_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_TLBSTATUS_OFST))
6460 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
6461 #define ALT_SMMU_SECURE_SMMU_CB3_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMEVCNTR0_OFST))
6462 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
6463 #define ALT_SMMU_SECURE_SMMU_CB3_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMEVCNTR1_OFST))
6464 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
6465 #define ALT_SMMU_SECURE_SMMU_CB3_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMEVCNTR2_OFST))
6466 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
6467 #define ALT_SMMU_SECURE_SMMU_CB3_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMEVCNTR3_OFST))
6468 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
6469 #define ALT_SMMU_SECURE_SMMU_CB3_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMEVTYPER0_OFST))
6470 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
6471 #define ALT_SMMU_SECURE_SMMU_CB3_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMEVTYPER1_OFST))
6472 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
6473 #define ALT_SMMU_SECURE_SMMU_CB3_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMEVTYPER2_OFST))
6474 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
6475 #define ALT_SMMU_SECURE_SMMU_CB3_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMEVTYPER3_OFST))
6476 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMCFGR register for the ALT_SMMU_SECURE instance. */
6477 #define ALT_SMMU_SECURE_SMMU_CB3_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMCFGR_OFST))
6478 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMCR register for the ALT_SMMU_SECURE instance. */
6479 #define ALT_SMMU_SECURE_SMMU_CB3_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMCR_OFST))
6480 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMCEID register for the ALT_SMMU_SECURE instance. */
6481 #define ALT_SMMU_SECURE_SMMU_CB3_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMCEID_OFST))
6482 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
6483 #define ALT_SMMU_SECURE_SMMU_CB3_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMCNTENSE_OFST))
6484 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
6485 #define ALT_SMMU_SECURE_SMMU_CB3_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMCNTENCLR_OFST))
6486 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
6487 #define ALT_SMMU_SECURE_SMMU_CB3_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMCNTENSET_OFST))
6488 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
6489 #define ALT_SMMU_SECURE_SMMU_CB3_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMINTENCLR_OFST))
6490 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
6491 #define ALT_SMMU_SECURE_SMMU_CB3_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMOVSCLR_OFST))
6492 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMOVSSET register for the ALT_SMMU_SECURE instance. */
6493 #define ALT_SMMU_SECURE_SMMU_CB3_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMOVSSET_OFST))
6494 /* The address of the ALT_SMMU_SECURE_SMMU_CB3_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
6495 #define ALT_SMMU_SECURE_SMMU_CB3_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB3_PMAUTHSTATUS_OFST))
6496 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_SCTLR register for the ALT_SMMU_SECURE instance. */
6497 #define ALT_SMMU_SECURE_SMMU_CB4_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_SCTLR_OFST))
6498 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_ACTLR register for the ALT_SMMU_SECURE instance. */
6499 #define ALT_SMMU_SECURE_SMMU_CB4_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_ACTLR_OFST))
6500 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_RESUME register for the ALT_SMMU_SECURE instance. */
6501 #define ALT_SMMU_SECURE_SMMU_CB4_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_RESUME_OFST))
6502 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TCR2 register for the ALT_SMMU_SECURE instance. */
6503 #define ALT_SMMU_SECURE_SMMU_CB4_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TCR2_OFST))
6504 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
6505 #define ALT_SMMU_SECURE_SMMU_CB4_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TTBR0_LOW_OFST))
6506 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
6507 #define ALT_SMMU_SECURE_SMMU_CB4_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TTBR0_HIGH_OFST))
6508 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
6509 #define ALT_SMMU_SECURE_SMMU_CB4_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TTBR1_LOW_OFST))
6510 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
6511 #define ALT_SMMU_SECURE_SMMU_CB4_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TTBR1_HIGH_OFST))
6512 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
6513 #define ALT_SMMU_SECURE_SMMU_CB4_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TCR_LPAE_OFST))
6514 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
6515 #define ALT_SMMU_SECURE_SMMU_CB4_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_CONTEXTIDR_OFST))
6516 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
6517 #define ALT_SMMU_SECURE_SMMU_CB4_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PRRR_MAIR0_OFST))
6518 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
6519 #define ALT_SMMU_SECURE_SMMU_CB4_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_NMRR_MAIR1_OFST))
6520 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_FSR register for the ALT_SMMU_SECURE instance. */
6521 #define ALT_SMMU_SECURE_SMMU_CB4_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_FSR_OFST))
6522 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
6523 #define ALT_SMMU_SECURE_SMMU_CB4_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_FSRRESTORE_OFST))
6524 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_FAR_LOW register for the ALT_SMMU_SECURE instance. */
6525 #define ALT_SMMU_SECURE_SMMU_CB4_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_FAR_LOW_OFST))
6526 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
6527 #define ALT_SMMU_SECURE_SMMU_CB4_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_FAR_HIGH_OFST))
6528 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_FSYNR0 register for the ALT_SMMU_SECURE instance. */
6529 #define ALT_SMMU_SECURE_SMMU_CB4_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_FSYNR0_OFST))
6530 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
6531 #define ALT_SMMU_SECURE_SMMU_CB4_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_IPAFAR_LOW_OFST))
6532 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
6533 #define ALT_SMMU_SECURE_SMMU_CB4_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_IPAFAR_HIGH_OFST))
6534 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
6535 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIVA_LOW_OFST))
6536 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
6537 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIVA_HIGH_OFST))
6538 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
6539 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIVAA_LOW_OFST))
6540 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
6541 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIVAA_HIGH_OFST))
6542 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIASID register for the ALT_SMMU_SECURE instance. */
6543 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIASID_OFST))
6544 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIALL register for the ALT_SMMU_SECURE instance. */
6545 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIALL_OFST))
6546 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
6547 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIVAL_LOW_OFST))
6548 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
6549 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIVAL_HIGH_OFST))
6550 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
6551 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIVAAL_LOW_OFST))
6552 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
6553 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIVAAL_HIGH_OFST))
6554 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
6555 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIIPAS2_LOW_OFST))
6556 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
6557 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIIPAS2_HIGH_OFST))
6558 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
6559 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIIPAS2L_LOW_OFST))
6560 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
6561 #define ALT_SMMU_SECURE_SMMU_CB4_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBIIPAS2L_HIGH_OFST))
6562 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBSYNC register for the ALT_SMMU_SECURE instance. */
6563 #define ALT_SMMU_SECURE_SMMU_CB4_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBSYNC_OFST))
6564 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
6565 #define ALT_SMMU_SECURE_SMMU_CB4_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_TLBSTATUS_OFST))
6566 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
6567 #define ALT_SMMU_SECURE_SMMU_CB4_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMEVCNTR0_OFST))
6568 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
6569 #define ALT_SMMU_SECURE_SMMU_CB4_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMEVCNTR1_OFST))
6570 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
6571 #define ALT_SMMU_SECURE_SMMU_CB4_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMEVCNTR2_OFST))
6572 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
6573 #define ALT_SMMU_SECURE_SMMU_CB4_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMEVCNTR3_OFST))
6574 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
6575 #define ALT_SMMU_SECURE_SMMU_CB4_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMEVTYPER0_OFST))
6576 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
6577 #define ALT_SMMU_SECURE_SMMU_CB4_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMEVTYPER1_OFST))
6578 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
6579 #define ALT_SMMU_SECURE_SMMU_CB4_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMEVTYPER2_OFST))
6580 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
6581 #define ALT_SMMU_SECURE_SMMU_CB4_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMEVTYPER3_OFST))
6582 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMCFGR register for the ALT_SMMU_SECURE instance. */
6583 #define ALT_SMMU_SECURE_SMMU_CB4_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMCFGR_OFST))
6584 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMCR register for the ALT_SMMU_SECURE instance. */
6585 #define ALT_SMMU_SECURE_SMMU_CB4_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMCR_OFST))
6586 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMCEID register for the ALT_SMMU_SECURE instance. */
6587 #define ALT_SMMU_SECURE_SMMU_CB4_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMCEID_OFST))
6588 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
6589 #define ALT_SMMU_SECURE_SMMU_CB4_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMCNTENSE_OFST))
6590 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
6591 #define ALT_SMMU_SECURE_SMMU_CB4_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMCNTENCLR_OFST))
6592 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
6593 #define ALT_SMMU_SECURE_SMMU_CB4_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMCNTENSET_OFST))
6594 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
6595 #define ALT_SMMU_SECURE_SMMU_CB4_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMINTENCLR_OFST))
6596 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
6597 #define ALT_SMMU_SECURE_SMMU_CB4_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMOVSCLR_OFST))
6598 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMOVSSET register for the ALT_SMMU_SECURE instance. */
6599 #define ALT_SMMU_SECURE_SMMU_CB4_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMOVSSET_OFST))
6600 /* The address of the ALT_SMMU_SECURE_SMMU_CB4_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
6601 #define ALT_SMMU_SECURE_SMMU_CB4_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB4_PMAUTHSTATUS_OFST))
6602 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_SCTLR register for the ALT_SMMU_SECURE instance. */
6603 #define ALT_SMMU_SECURE_SMMU_CB5_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_SCTLR_OFST))
6604 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_ACTLR register for the ALT_SMMU_SECURE instance. */
6605 #define ALT_SMMU_SECURE_SMMU_CB5_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_ACTLR_OFST))
6606 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_RESUME register for the ALT_SMMU_SECURE instance. */
6607 #define ALT_SMMU_SECURE_SMMU_CB5_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_RESUME_OFST))
6608 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TCR2 register for the ALT_SMMU_SECURE instance. */
6609 #define ALT_SMMU_SECURE_SMMU_CB5_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TCR2_OFST))
6610 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
6611 #define ALT_SMMU_SECURE_SMMU_CB5_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TTBR0_LOW_OFST))
6612 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
6613 #define ALT_SMMU_SECURE_SMMU_CB5_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TTBR0_HIGH_OFST))
6614 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
6615 #define ALT_SMMU_SECURE_SMMU_CB5_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TTBR1_LOW_OFST))
6616 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
6617 #define ALT_SMMU_SECURE_SMMU_CB5_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TTBR1_HIGH_OFST))
6618 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
6619 #define ALT_SMMU_SECURE_SMMU_CB5_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TCR_LPAE_OFST))
6620 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
6621 #define ALT_SMMU_SECURE_SMMU_CB5_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_CONTEXTIDR_OFST))
6622 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
6623 #define ALT_SMMU_SECURE_SMMU_CB5_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PRRR_MAIR0_OFST))
6624 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
6625 #define ALT_SMMU_SECURE_SMMU_CB5_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_NMRR_MAIR1_OFST))
6626 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_FSR register for the ALT_SMMU_SECURE instance. */
6627 #define ALT_SMMU_SECURE_SMMU_CB5_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_FSR_OFST))
6628 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
6629 #define ALT_SMMU_SECURE_SMMU_CB5_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_FSRRESTORE_OFST))
6630 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_FAR_LOW register for the ALT_SMMU_SECURE instance. */
6631 #define ALT_SMMU_SECURE_SMMU_CB5_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_FAR_LOW_OFST))
6632 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
6633 #define ALT_SMMU_SECURE_SMMU_CB5_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_FAR_HIGH_OFST))
6634 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_FSYNR0 register for the ALT_SMMU_SECURE instance. */
6635 #define ALT_SMMU_SECURE_SMMU_CB5_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_FSYNR0_OFST))
6636 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
6637 #define ALT_SMMU_SECURE_SMMU_CB5_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_IPAFAR_LOW_OFST))
6638 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
6639 #define ALT_SMMU_SECURE_SMMU_CB5_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_IPAFAR_HIGH_OFST))
6640 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
6641 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIVA_LOW_OFST))
6642 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
6643 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIVA_HIGH_OFST))
6644 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
6645 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIVAA_LOW_OFST))
6646 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
6647 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIVAA_HIGH_OFST))
6648 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIASID register for the ALT_SMMU_SECURE instance. */
6649 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIASID_OFST))
6650 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIALL register for the ALT_SMMU_SECURE instance. */
6651 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIALL_OFST))
6652 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
6653 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIVAL_LOW_OFST))
6654 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
6655 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIVAL_HIGH_OFST))
6656 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
6657 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIVAAL_LOW_OFST))
6658 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
6659 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIVAAL_HIGH_OFST))
6660 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
6661 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIIPAS2_LOW_OFST))
6662 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
6663 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIIPAS2_HIGH_OFST))
6664 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
6665 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIIPAS2L_LOW_OFST))
6666 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
6667 #define ALT_SMMU_SECURE_SMMU_CB5_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBIIPAS2L_HIGH_OFST))
6668 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBSYNC register for the ALT_SMMU_SECURE instance. */
6669 #define ALT_SMMU_SECURE_SMMU_CB5_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBSYNC_OFST))
6670 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
6671 #define ALT_SMMU_SECURE_SMMU_CB5_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_TLBSTATUS_OFST))
6672 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
6673 #define ALT_SMMU_SECURE_SMMU_CB5_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMEVCNTR0_OFST))
6674 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
6675 #define ALT_SMMU_SECURE_SMMU_CB5_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMEVCNTR1_OFST))
6676 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
6677 #define ALT_SMMU_SECURE_SMMU_CB5_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMEVCNTR2_OFST))
6678 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
6679 #define ALT_SMMU_SECURE_SMMU_CB5_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMEVCNTR3_OFST))
6680 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
6681 #define ALT_SMMU_SECURE_SMMU_CB5_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMEVTYPER0_OFST))
6682 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
6683 #define ALT_SMMU_SECURE_SMMU_CB5_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMEVTYPER1_OFST))
6684 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
6685 #define ALT_SMMU_SECURE_SMMU_CB5_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMEVTYPER2_OFST))
6686 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
6687 #define ALT_SMMU_SECURE_SMMU_CB5_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMEVTYPER3_OFST))
6688 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMCFGR register for the ALT_SMMU_SECURE instance. */
6689 #define ALT_SMMU_SECURE_SMMU_CB5_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMCFGR_OFST))
6690 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMCR register for the ALT_SMMU_SECURE instance. */
6691 #define ALT_SMMU_SECURE_SMMU_CB5_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMCR_OFST))
6692 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMCEID register for the ALT_SMMU_SECURE instance. */
6693 #define ALT_SMMU_SECURE_SMMU_CB5_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMCEID_OFST))
6694 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
6695 #define ALT_SMMU_SECURE_SMMU_CB5_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMCNTENSE_OFST))
6696 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
6697 #define ALT_SMMU_SECURE_SMMU_CB5_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMCNTENCLR_OFST))
6698 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
6699 #define ALT_SMMU_SECURE_SMMU_CB5_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMCNTENSET_OFST))
6700 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
6701 #define ALT_SMMU_SECURE_SMMU_CB5_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMINTENCLR_OFST))
6702 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
6703 #define ALT_SMMU_SECURE_SMMU_CB5_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMOVSCLR_OFST))
6704 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMOVSSET register for the ALT_SMMU_SECURE instance. */
6705 #define ALT_SMMU_SECURE_SMMU_CB5_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMOVSSET_OFST))
6706 /* The address of the ALT_SMMU_SECURE_SMMU_CB5_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
6707 #define ALT_SMMU_SECURE_SMMU_CB5_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB5_PMAUTHSTATUS_OFST))
6708 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_SCTLR register for the ALT_SMMU_SECURE instance. */
6709 #define ALT_SMMU_SECURE_SMMU_CB6_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_SCTLR_OFST))
6710 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_ACTLR register for the ALT_SMMU_SECURE instance. */
6711 #define ALT_SMMU_SECURE_SMMU_CB6_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_ACTLR_OFST))
6712 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_RESUME register for the ALT_SMMU_SECURE instance. */
6713 #define ALT_SMMU_SECURE_SMMU_CB6_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_RESUME_OFST))
6714 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TCR2 register for the ALT_SMMU_SECURE instance. */
6715 #define ALT_SMMU_SECURE_SMMU_CB6_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TCR2_OFST))
6716 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
6717 #define ALT_SMMU_SECURE_SMMU_CB6_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TTBR0_LOW_OFST))
6718 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
6719 #define ALT_SMMU_SECURE_SMMU_CB6_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TTBR0_HIGH_OFST))
6720 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
6721 #define ALT_SMMU_SECURE_SMMU_CB6_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TTBR1_LOW_OFST))
6722 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
6723 #define ALT_SMMU_SECURE_SMMU_CB6_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TTBR1_HIGH_OFST))
6724 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
6725 #define ALT_SMMU_SECURE_SMMU_CB6_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TCR_LPAE_OFST))
6726 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
6727 #define ALT_SMMU_SECURE_SMMU_CB6_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_CONTEXTIDR_OFST))
6728 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
6729 #define ALT_SMMU_SECURE_SMMU_CB6_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PRRR_MAIR0_OFST))
6730 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
6731 #define ALT_SMMU_SECURE_SMMU_CB6_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_NMRR_MAIR1_OFST))
6732 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_FSR register for the ALT_SMMU_SECURE instance. */
6733 #define ALT_SMMU_SECURE_SMMU_CB6_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_FSR_OFST))
6734 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
6735 #define ALT_SMMU_SECURE_SMMU_CB6_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_FSRRESTORE_OFST))
6736 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_FAR_LOW register for the ALT_SMMU_SECURE instance. */
6737 #define ALT_SMMU_SECURE_SMMU_CB6_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_FAR_LOW_OFST))
6738 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
6739 #define ALT_SMMU_SECURE_SMMU_CB6_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_FAR_HIGH_OFST))
6740 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_FSYNR0 register for the ALT_SMMU_SECURE instance. */
6741 #define ALT_SMMU_SECURE_SMMU_CB6_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_FSYNR0_OFST))
6742 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
6743 #define ALT_SMMU_SECURE_SMMU_CB6_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_IPAFAR_LOW_OFST))
6744 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
6745 #define ALT_SMMU_SECURE_SMMU_CB6_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_IPAFAR_HIGH_OFST))
6746 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
6747 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIVA_LOW_OFST))
6748 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
6749 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIVA_HIGH_OFST))
6750 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
6751 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIVAA_LOW_OFST))
6752 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
6753 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIVAA_HIGH_OFST))
6754 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIASID register for the ALT_SMMU_SECURE instance. */
6755 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIASID_OFST))
6756 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIALL register for the ALT_SMMU_SECURE instance. */
6757 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIALL_OFST))
6758 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
6759 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIVAL_LOW_OFST))
6760 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
6761 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIVAL_HIGH_OFST))
6762 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
6763 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIVAAL_LOW_OFST))
6764 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
6765 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIVAAL_HIGH_OFST))
6766 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
6767 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIIPAS2_LOW_OFST))
6768 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
6769 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIIPAS2_HIGH_OFST))
6770 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
6771 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIIPAS2L_LOW_OFST))
6772 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
6773 #define ALT_SMMU_SECURE_SMMU_CB6_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBIIPAS2L_HIGH_OFST))
6774 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBSYNC register for the ALT_SMMU_SECURE instance. */
6775 #define ALT_SMMU_SECURE_SMMU_CB6_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBSYNC_OFST))
6776 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
6777 #define ALT_SMMU_SECURE_SMMU_CB6_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_TLBSTATUS_OFST))
6778 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
6779 #define ALT_SMMU_SECURE_SMMU_CB6_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMEVCNTR0_OFST))
6780 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
6781 #define ALT_SMMU_SECURE_SMMU_CB6_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMEVCNTR1_OFST))
6782 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
6783 #define ALT_SMMU_SECURE_SMMU_CB6_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMEVCNTR2_OFST))
6784 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
6785 #define ALT_SMMU_SECURE_SMMU_CB6_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMEVCNTR3_OFST))
6786 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
6787 #define ALT_SMMU_SECURE_SMMU_CB6_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMEVTYPER0_OFST))
6788 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
6789 #define ALT_SMMU_SECURE_SMMU_CB6_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMEVTYPER1_OFST))
6790 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
6791 #define ALT_SMMU_SECURE_SMMU_CB6_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMEVTYPER2_OFST))
6792 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
6793 #define ALT_SMMU_SECURE_SMMU_CB6_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMEVTYPER3_OFST))
6794 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMCFGR register for the ALT_SMMU_SECURE instance. */
6795 #define ALT_SMMU_SECURE_SMMU_CB6_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMCFGR_OFST))
6796 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMCR register for the ALT_SMMU_SECURE instance. */
6797 #define ALT_SMMU_SECURE_SMMU_CB6_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMCR_OFST))
6798 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMCEID register for the ALT_SMMU_SECURE instance. */
6799 #define ALT_SMMU_SECURE_SMMU_CB6_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMCEID_OFST))
6800 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
6801 #define ALT_SMMU_SECURE_SMMU_CB6_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMCNTENSE_OFST))
6802 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
6803 #define ALT_SMMU_SECURE_SMMU_CB6_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMCNTENCLR_OFST))
6804 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
6805 #define ALT_SMMU_SECURE_SMMU_CB6_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMCNTENSET_OFST))
6806 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
6807 #define ALT_SMMU_SECURE_SMMU_CB6_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMINTENCLR_OFST))
6808 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
6809 #define ALT_SMMU_SECURE_SMMU_CB6_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMOVSCLR_OFST))
6810 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMOVSSET register for the ALT_SMMU_SECURE instance. */
6811 #define ALT_SMMU_SECURE_SMMU_CB6_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMOVSSET_OFST))
6812 /* The address of the ALT_SMMU_SECURE_SMMU_CB6_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
6813 #define ALT_SMMU_SECURE_SMMU_CB6_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB6_PMAUTHSTATUS_OFST))
6814 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_SCTLR register for the ALT_SMMU_SECURE instance. */
6815 #define ALT_SMMU_SECURE_SMMU_CB7_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_SCTLR_OFST))
6816 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_ACTLR register for the ALT_SMMU_SECURE instance. */
6817 #define ALT_SMMU_SECURE_SMMU_CB7_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_ACTLR_OFST))
6818 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_RESUME register for the ALT_SMMU_SECURE instance. */
6819 #define ALT_SMMU_SECURE_SMMU_CB7_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_RESUME_OFST))
6820 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TCR2 register for the ALT_SMMU_SECURE instance. */
6821 #define ALT_SMMU_SECURE_SMMU_CB7_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TCR2_OFST))
6822 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
6823 #define ALT_SMMU_SECURE_SMMU_CB7_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TTBR0_LOW_OFST))
6824 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
6825 #define ALT_SMMU_SECURE_SMMU_CB7_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TTBR0_HIGH_OFST))
6826 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
6827 #define ALT_SMMU_SECURE_SMMU_CB7_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TTBR1_LOW_OFST))
6828 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
6829 #define ALT_SMMU_SECURE_SMMU_CB7_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TTBR1_HIGH_OFST))
6830 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
6831 #define ALT_SMMU_SECURE_SMMU_CB7_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TCR_LPAE_OFST))
6832 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
6833 #define ALT_SMMU_SECURE_SMMU_CB7_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_CONTEXTIDR_OFST))
6834 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
6835 #define ALT_SMMU_SECURE_SMMU_CB7_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PRRR_MAIR0_OFST))
6836 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
6837 #define ALT_SMMU_SECURE_SMMU_CB7_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_NMRR_MAIR1_OFST))
6838 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_FSR register for the ALT_SMMU_SECURE instance. */
6839 #define ALT_SMMU_SECURE_SMMU_CB7_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_FSR_OFST))
6840 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
6841 #define ALT_SMMU_SECURE_SMMU_CB7_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_FSRRESTORE_OFST))
6842 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_FAR_LOW register for the ALT_SMMU_SECURE instance. */
6843 #define ALT_SMMU_SECURE_SMMU_CB7_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_FAR_LOW_OFST))
6844 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
6845 #define ALT_SMMU_SECURE_SMMU_CB7_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_FAR_HIGH_OFST))
6846 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_FSYNR0 register for the ALT_SMMU_SECURE instance. */
6847 #define ALT_SMMU_SECURE_SMMU_CB7_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_FSYNR0_OFST))
6848 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
6849 #define ALT_SMMU_SECURE_SMMU_CB7_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_IPAFAR_LOW_OFST))
6850 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
6851 #define ALT_SMMU_SECURE_SMMU_CB7_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_IPAFAR_HIGH_OFST))
6852 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
6853 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIVA_LOW_OFST))
6854 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
6855 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIVA_HIGH_OFST))
6856 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
6857 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIVAA_LOW_OFST))
6858 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
6859 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIVAA_HIGH_OFST))
6860 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIASID register for the ALT_SMMU_SECURE instance. */
6861 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIASID_OFST))
6862 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIALL register for the ALT_SMMU_SECURE instance. */
6863 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIALL_OFST))
6864 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
6865 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIVAL_LOW_OFST))
6866 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
6867 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIVAL_HIGH_OFST))
6868 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
6869 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIVAAL_LOW_OFST))
6870 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
6871 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIVAAL_HIGH_OFST))
6872 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
6873 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIIPAS2_LOW_OFST))
6874 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
6875 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIIPAS2_HIGH_OFST))
6876 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
6877 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIIPAS2L_LOW_OFST))
6878 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
6879 #define ALT_SMMU_SECURE_SMMU_CB7_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBIIPAS2L_HIGH_OFST))
6880 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBSYNC register for the ALT_SMMU_SECURE instance. */
6881 #define ALT_SMMU_SECURE_SMMU_CB7_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBSYNC_OFST))
6882 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
6883 #define ALT_SMMU_SECURE_SMMU_CB7_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_TLBSTATUS_OFST))
6884 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
6885 #define ALT_SMMU_SECURE_SMMU_CB7_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMEVCNTR0_OFST))
6886 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
6887 #define ALT_SMMU_SECURE_SMMU_CB7_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMEVCNTR1_OFST))
6888 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
6889 #define ALT_SMMU_SECURE_SMMU_CB7_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMEVCNTR2_OFST))
6890 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
6891 #define ALT_SMMU_SECURE_SMMU_CB7_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMEVCNTR3_OFST))
6892 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
6893 #define ALT_SMMU_SECURE_SMMU_CB7_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMEVTYPER0_OFST))
6894 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
6895 #define ALT_SMMU_SECURE_SMMU_CB7_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMEVTYPER1_OFST))
6896 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
6897 #define ALT_SMMU_SECURE_SMMU_CB7_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMEVTYPER2_OFST))
6898 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
6899 #define ALT_SMMU_SECURE_SMMU_CB7_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMEVTYPER3_OFST))
6900 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMCFGR register for the ALT_SMMU_SECURE instance. */
6901 #define ALT_SMMU_SECURE_SMMU_CB7_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMCFGR_OFST))
6902 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMCR register for the ALT_SMMU_SECURE instance. */
6903 #define ALT_SMMU_SECURE_SMMU_CB7_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMCR_OFST))
6904 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMCEID register for the ALT_SMMU_SECURE instance. */
6905 #define ALT_SMMU_SECURE_SMMU_CB7_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMCEID_OFST))
6906 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
6907 #define ALT_SMMU_SECURE_SMMU_CB7_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMCNTENSE_OFST))
6908 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
6909 #define ALT_SMMU_SECURE_SMMU_CB7_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMCNTENCLR_OFST))
6910 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
6911 #define ALT_SMMU_SECURE_SMMU_CB7_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMCNTENSET_OFST))
6912 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
6913 #define ALT_SMMU_SECURE_SMMU_CB7_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMINTENCLR_OFST))
6914 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
6915 #define ALT_SMMU_SECURE_SMMU_CB7_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMOVSCLR_OFST))
6916 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMOVSSET register for the ALT_SMMU_SECURE instance. */
6917 #define ALT_SMMU_SECURE_SMMU_CB7_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMOVSSET_OFST))
6918 /* The address of the ALT_SMMU_SECURE_SMMU_CB7_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
6919 #define ALT_SMMU_SECURE_SMMU_CB7_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB7_PMAUTHSTATUS_OFST))
6920 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_SCTLR register for the ALT_SMMU_SECURE instance. */
6921 #define ALT_SMMU_SECURE_SMMU_CB8_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_SCTLR_OFST))
6922 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_ACTLR register for the ALT_SMMU_SECURE instance. */
6923 #define ALT_SMMU_SECURE_SMMU_CB8_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_ACTLR_OFST))
6924 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_RESUME register for the ALT_SMMU_SECURE instance. */
6925 #define ALT_SMMU_SECURE_SMMU_CB8_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_RESUME_OFST))
6926 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TCR2 register for the ALT_SMMU_SECURE instance. */
6927 #define ALT_SMMU_SECURE_SMMU_CB8_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TCR2_OFST))
6928 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
6929 #define ALT_SMMU_SECURE_SMMU_CB8_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TTBR0_LOW_OFST))
6930 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
6931 #define ALT_SMMU_SECURE_SMMU_CB8_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TTBR0_HIGH_OFST))
6932 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
6933 #define ALT_SMMU_SECURE_SMMU_CB8_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TTBR1_LOW_OFST))
6934 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
6935 #define ALT_SMMU_SECURE_SMMU_CB8_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TTBR1_HIGH_OFST))
6936 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
6937 #define ALT_SMMU_SECURE_SMMU_CB8_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TCR_LPAE_OFST))
6938 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
6939 #define ALT_SMMU_SECURE_SMMU_CB8_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_CONTEXTIDR_OFST))
6940 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
6941 #define ALT_SMMU_SECURE_SMMU_CB8_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PRRR_MAIR0_OFST))
6942 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
6943 #define ALT_SMMU_SECURE_SMMU_CB8_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_NMRR_MAIR1_OFST))
6944 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_FSR register for the ALT_SMMU_SECURE instance. */
6945 #define ALT_SMMU_SECURE_SMMU_CB8_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_FSR_OFST))
6946 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
6947 #define ALT_SMMU_SECURE_SMMU_CB8_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_FSRRESTORE_OFST))
6948 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_FAR_LOW register for the ALT_SMMU_SECURE instance. */
6949 #define ALT_SMMU_SECURE_SMMU_CB8_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_FAR_LOW_OFST))
6950 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
6951 #define ALT_SMMU_SECURE_SMMU_CB8_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_FAR_HIGH_OFST))
6952 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_FSYNR0 register for the ALT_SMMU_SECURE instance. */
6953 #define ALT_SMMU_SECURE_SMMU_CB8_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_FSYNR0_OFST))
6954 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
6955 #define ALT_SMMU_SECURE_SMMU_CB8_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_IPAFAR_LOW_OFST))
6956 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
6957 #define ALT_SMMU_SECURE_SMMU_CB8_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_IPAFAR_HIGH_OFST))
6958 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
6959 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIVA_LOW_OFST))
6960 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
6961 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIVA_HIGH_OFST))
6962 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
6963 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIVAA_LOW_OFST))
6964 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
6965 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIVAA_HIGH_OFST))
6966 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIASID register for the ALT_SMMU_SECURE instance. */
6967 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIASID_OFST))
6968 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIALL register for the ALT_SMMU_SECURE instance. */
6969 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIALL_OFST))
6970 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
6971 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIVAL_LOW_OFST))
6972 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
6973 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIVAL_HIGH_OFST))
6974 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
6975 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIVAAL_LOW_OFST))
6976 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
6977 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIVAAL_HIGH_OFST))
6978 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
6979 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIIPAS2_LOW_OFST))
6980 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
6981 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIIPAS2_HIGH_OFST))
6982 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
6983 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIIPAS2L_LOW_OFST))
6984 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
6985 #define ALT_SMMU_SECURE_SMMU_CB8_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBIIPAS2L_HIGH_OFST))
6986 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBSYNC register for the ALT_SMMU_SECURE instance. */
6987 #define ALT_SMMU_SECURE_SMMU_CB8_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBSYNC_OFST))
6988 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
6989 #define ALT_SMMU_SECURE_SMMU_CB8_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_TLBSTATUS_OFST))
6990 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
6991 #define ALT_SMMU_SECURE_SMMU_CB8_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMEVCNTR0_OFST))
6992 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
6993 #define ALT_SMMU_SECURE_SMMU_CB8_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMEVCNTR1_OFST))
6994 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
6995 #define ALT_SMMU_SECURE_SMMU_CB8_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMEVCNTR2_OFST))
6996 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
6997 #define ALT_SMMU_SECURE_SMMU_CB8_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMEVCNTR3_OFST))
6998 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
6999 #define ALT_SMMU_SECURE_SMMU_CB8_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMEVTYPER0_OFST))
7000 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
7001 #define ALT_SMMU_SECURE_SMMU_CB8_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMEVTYPER1_OFST))
7002 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
7003 #define ALT_SMMU_SECURE_SMMU_CB8_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMEVTYPER2_OFST))
7004 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
7005 #define ALT_SMMU_SECURE_SMMU_CB8_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMEVTYPER3_OFST))
7006 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMCFGR register for the ALT_SMMU_SECURE instance. */
7007 #define ALT_SMMU_SECURE_SMMU_CB8_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMCFGR_OFST))
7008 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMCR register for the ALT_SMMU_SECURE instance. */
7009 #define ALT_SMMU_SECURE_SMMU_CB8_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMCR_OFST))
7010 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMCEID register for the ALT_SMMU_SECURE instance. */
7011 #define ALT_SMMU_SECURE_SMMU_CB8_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMCEID_OFST))
7012 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
7013 #define ALT_SMMU_SECURE_SMMU_CB8_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMCNTENSE_OFST))
7014 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
7015 #define ALT_SMMU_SECURE_SMMU_CB8_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMCNTENCLR_OFST))
7016 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
7017 #define ALT_SMMU_SECURE_SMMU_CB8_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMCNTENSET_OFST))
7018 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
7019 #define ALT_SMMU_SECURE_SMMU_CB8_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMINTENCLR_OFST))
7020 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
7021 #define ALT_SMMU_SECURE_SMMU_CB8_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMOVSCLR_OFST))
7022 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMOVSSET register for the ALT_SMMU_SECURE instance. */
7023 #define ALT_SMMU_SECURE_SMMU_CB8_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMOVSSET_OFST))
7024 /* The address of the ALT_SMMU_SECURE_SMMU_CB8_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
7025 #define ALT_SMMU_SECURE_SMMU_CB8_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB8_PMAUTHSTATUS_OFST))
7026 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_SCTLR register for the ALT_SMMU_SECURE instance. */
7027 #define ALT_SMMU_SECURE_SMMU_CB9_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_SCTLR_OFST))
7028 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_ACTLR register for the ALT_SMMU_SECURE instance. */
7029 #define ALT_SMMU_SECURE_SMMU_CB9_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_ACTLR_OFST))
7030 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_RESUME register for the ALT_SMMU_SECURE instance. */
7031 #define ALT_SMMU_SECURE_SMMU_CB9_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_RESUME_OFST))
7032 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TCR2 register for the ALT_SMMU_SECURE instance. */
7033 #define ALT_SMMU_SECURE_SMMU_CB9_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TCR2_OFST))
7034 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
7035 #define ALT_SMMU_SECURE_SMMU_CB9_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TTBR0_LOW_OFST))
7036 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
7037 #define ALT_SMMU_SECURE_SMMU_CB9_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TTBR0_HIGH_OFST))
7038 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
7039 #define ALT_SMMU_SECURE_SMMU_CB9_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TTBR1_LOW_OFST))
7040 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
7041 #define ALT_SMMU_SECURE_SMMU_CB9_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TTBR1_HIGH_OFST))
7042 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
7043 #define ALT_SMMU_SECURE_SMMU_CB9_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TCR_LPAE_OFST))
7044 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
7045 #define ALT_SMMU_SECURE_SMMU_CB9_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_CONTEXTIDR_OFST))
7046 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
7047 #define ALT_SMMU_SECURE_SMMU_CB9_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PRRR_MAIR0_OFST))
7048 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
7049 #define ALT_SMMU_SECURE_SMMU_CB9_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_NMRR_MAIR1_OFST))
7050 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_FSR register for the ALT_SMMU_SECURE instance. */
7051 #define ALT_SMMU_SECURE_SMMU_CB9_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_FSR_OFST))
7052 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
7053 #define ALT_SMMU_SECURE_SMMU_CB9_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_FSRRESTORE_OFST))
7054 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_FAR_LOW register for the ALT_SMMU_SECURE instance. */
7055 #define ALT_SMMU_SECURE_SMMU_CB9_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_FAR_LOW_OFST))
7056 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
7057 #define ALT_SMMU_SECURE_SMMU_CB9_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_FAR_HIGH_OFST))
7058 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_FSYNR0 register for the ALT_SMMU_SECURE instance. */
7059 #define ALT_SMMU_SECURE_SMMU_CB9_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_FSYNR0_OFST))
7060 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
7061 #define ALT_SMMU_SECURE_SMMU_CB9_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_IPAFAR_LOW_OFST))
7062 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
7063 #define ALT_SMMU_SECURE_SMMU_CB9_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_IPAFAR_HIGH_OFST))
7064 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
7065 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIVA_LOW_OFST))
7066 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
7067 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIVA_HIGH_OFST))
7068 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
7069 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIVAA_LOW_OFST))
7070 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
7071 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIVAA_HIGH_OFST))
7072 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIASID register for the ALT_SMMU_SECURE instance. */
7073 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIASID_OFST))
7074 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIALL register for the ALT_SMMU_SECURE instance. */
7075 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIALL_OFST))
7076 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
7077 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIVAL_LOW_OFST))
7078 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
7079 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIVAL_HIGH_OFST))
7080 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
7081 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIVAAL_LOW_OFST))
7082 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
7083 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIVAAL_HIGH_OFST))
7084 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
7085 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIIPAS2_LOW_OFST))
7086 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
7087 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIIPAS2_HIGH_OFST))
7088 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
7089 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIIPAS2L_LOW_OFST))
7090 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
7091 #define ALT_SMMU_SECURE_SMMU_CB9_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBIIPAS2L_HIGH_OFST))
7092 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBSYNC register for the ALT_SMMU_SECURE instance. */
7093 #define ALT_SMMU_SECURE_SMMU_CB9_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBSYNC_OFST))
7094 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
7095 #define ALT_SMMU_SECURE_SMMU_CB9_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_TLBSTATUS_OFST))
7096 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
7097 #define ALT_SMMU_SECURE_SMMU_CB9_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMEVCNTR0_OFST))
7098 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
7099 #define ALT_SMMU_SECURE_SMMU_CB9_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMEVCNTR1_OFST))
7100 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
7101 #define ALT_SMMU_SECURE_SMMU_CB9_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMEVCNTR2_OFST))
7102 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
7103 #define ALT_SMMU_SECURE_SMMU_CB9_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMEVCNTR3_OFST))
7104 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
7105 #define ALT_SMMU_SECURE_SMMU_CB9_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMEVTYPER0_OFST))
7106 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
7107 #define ALT_SMMU_SECURE_SMMU_CB9_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMEVTYPER1_OFST))
7108 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
7109 #define ALT_SMMU_SECURE_SMMU_CB9_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMEVTYPER2_OFST))
7110 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
7111 #define ALT_SMMU_SECURE_SMMU_CB9_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMEVTYPER3_OFST))
7112 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMCFGR register for the ALT_SMMU_SECURE instance. */
7113 #define ALT_SMMU_SECURE_SMMU_CB9_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMCFGR_OFST))
7114 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMCR register for the ALT_SMMU_SECURE instance. */
7115 #define ALT_SMMU_SECURE_SMMU_CB9_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMCR_OFST))
7116 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMCEID register for the ALT_SMMU_SECURE instance. */
7117 #define ALT_SMMU_SECURE_SMMU_CB9_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMCEID_OFST))
7118 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
7119 #define ALT_SMMU_SECURE_SMMU_CB9_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMCNTENSE_OFST))
7120 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
7121 #define ALT_SMMU_SECURE_SMMU_CB9_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMCNTENCLR_OFST))
7122 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
7123 #define ALT_SMMU_SECURE_SMMU_CB9_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMCNTENSET_OFST))
7124 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
7125 #define ALT_SMMU_SECURE_SMMU_CB9_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMINTENCLR_OFST))
7126 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
7127 #define ALT_SMMU_SECURE_SMMU_CB9_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMOVSCLR_OFST))
7128 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMOVSSET register for the ALT_SMMU_SECURE instance. */
7129 #define ALT_SMMU_SECURE_SMMU_CB9_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMOVSSET_OFST))
7130 /* The address of the ALT_SMMU_SECURE_SMMU_CB9_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
7131 #define ALT_SMMU_SECURE_SMMU_CB9_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB9_PMAUTHSTATUS_OFST))
7132 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_SCTLR register for the ALT_SMMU_SECURE instance. */
7133 #define ALT_SMMU_SECURE_SMMU_CB10_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_SCTLR_OFST))
7134 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_ACTLR register for the ALT_SMMU_SECURE instance. */
7135 #define ALT_SMMU_SECURE_SMMU_CB10_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_ACTLR_OFST))
7136 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_RESUME register for the ALT_SMMU_SECURE instance. */
7137 #define ALT_SMMU_SECURE_SMMU_CB10_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_RESUME_OFST))
7138 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TCR2 register for the ALT_SMMU_SECURE instance. */
7139 #define ALT_SMMU_SECURE_SMMU_CB10_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TCR2_OFST))
7140 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
7141 #define ALT_SMMU_SECURE_SMMU_CB10_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TTBR0_LOW_OFST))
7142 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
7143 #define ALT_SMMU_SECURE_SMMU_CB10_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TTBR0_HIGH_OFST))
7144 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
7145 #define ALT_SMMU_SECURE_SMMU_CB10_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TTBR1_LOW_OFST))
7146 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
7147 #define ALT_SMMU_SECURE_SMMU_CB10_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TTBR1_HIGH_OFST))
7148 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
7149 #define ALT_SMMU_SECURE_SMMU_CB10_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TCR_LPAE_OFST))
7150 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
7151 #define ALT_SMMU_SECURE_SMMU_CB10_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_CONTEXTIDR_OFST))
7152 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
7153 #define ALT_SMMU_SECURE_SMMU_CB10_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PRRR_MAIR0_OFST))
7154 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
7155 #define ALT_SMMU_SECURE_SMMU_CB10_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_NMRR_MAIR1_OFST))
7156 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_FSR register for the ALT_SMMU_SECURE instance. */
7157 #define ALT_SMMU_SECURE_SMMU_CB10_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_FSR_OFST))
7158 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
7159 #define ALT_SMMU_SECURE_SMMU_CB10_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_FSRRESTORE_OFST))
7160 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_FAR_LOW register for the ALT_SMMU_SECURE instance. */
7161 #define ALT_SMMU_SECURE_SMMU_CB10_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_FAR_LOW_OFST))
7162 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
7163 #define ALT_SMMU_SECURE_SMMU_CB10_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_FAR_HIGH_OFST))
7164 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_FSYNR0 register for the ALT_SMMU_SECURE instance. */
7165 #define ALT_SMMU_SECURE_SMMU_CB10_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_FSYNR0_OFST))
7166 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
7167 #define ALT_SMMU_SECURE_SMMU_CB10_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_IPAFAR_LOW_OFST))
7168 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
7169 #define ALT_SMMU_SECURE_SMMU_CB10_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_IPAFAR_HIGH_OFST))
7170 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
7171 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIVA_LOW_OFST))
7172 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
7173 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIVA_HIGH_OFST))
7174 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
7175 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIVAA_LOW_OFST))
7176 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
7177 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIVAA_HIGH_OFST))
7178 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIASID register for the ALT_SMMU_SECURE instance. */
7179 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIASID_OFST))
7180 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIALL register for the ALT_SMMU_SECURE instance. */
7181 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIALL_OFST))
7182 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
7183 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIVAL_LOW_OFST))
7184 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
7185 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIVAL_HIGH_OFST))
7186 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
7187 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIVAAL_LOW_OFST))
7188 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
7189 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIVAAL_HIGH_OFST))
7190 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
7191 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIIPAS2_LOW_OFST))
7192 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
7193 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIIPAS2_HIGH_OFST))
7194 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
7195 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIIPAS2L_LOW_OFST))
7196 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
7197 #define ALT_SMMU_SECURE_SMMU_CB10_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBIIPAS2L_HIGH_OFST))
7198 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBSYNC register for the ALT_SMMU_SECURE instance. */
7199 #define ALT_SMMU_SECURE_SMMU_CB10_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBSYNC_OFST))
7200 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
7201 #define ALT_SMMU_SECURE_SMMU_CB10_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_TLBSTATUS_OFST))
7202 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
7203 #define ALT_SMMU_SECURE_SMMU_CB10_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMEVCNTR0_OFST))
7204 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
7205 #define ALT_SMMU_SECURE_SMMU_CB10_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMEVCNTR1_OFST))
7206 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
7207 #define ALT_SMMU_SECURE_SMMU_CB10_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMEVCNTR2_OFST))
7208 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
7209 #define ALT_SMMU_SECURE_SMMU_CB10_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMEVCNTR3_OFST))
7210 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
7211 #define ALT_SMMU_SECURE_SMMU_CB10_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMEVTYPER0_OFST))
7212 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
7213 #define ALT_SMMU_SECURE_SMMU_CB10_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMEVTYPER1_OFST))
7214 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
7215 #define ALT_SMMU_SECURE_SMMU_CB10_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMEVTYPER2_OFST))
7216 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
7217 #define ALT_SMMU_SECURE_SMMU_CB10_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMEVTYPER3_OFST))
7218 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMCFGR register for the ALT_SMMU_SECURE instance. */
7219 #define ALT_SMMU_SECURE_SMMU_CB10_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMCFGR_OFST))
7220 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMCR register for the ALT_SMMU_SECURE instance. */
7221 #define ALT_SMMU_SECURE_SMMU_CB10_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMCR_OFST))
7222 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMCEID register for the ALT_SMMU_SECURE instance. */
7223 #define ALT_SMMU_SECURE_SMMU_CB10_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMCEID_OFST))
7224 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
7225 #define ALT_SMMU_SECURE_SMMU_CB10_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMCNTENSE_OFST))
7226 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
7227 #define ALT_SMMU_SECURE_SMMU_CB10_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMCNTENCLR_OFST))
7228 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
7229 #define ALT_SMMU_SECURE_SMMU_CB10_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMCNTENSET_OFST))
7230 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
7231 #define ALT_SMMU_SECURE_SMMU_CB10_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMINTENCLR_OFST))
7232 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
7233 #define ALT_SMMU_SECURE_SMMU_CB10_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMOVSCLR_OFST))
7234 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMOVSSET register for the ALT_SMMU_SECURE instance. */
7235 #define ALT_SMMU_SECURE_SMMU_CB10_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMOVSSET_OFST))
7236 /* The address of the ALT_SMMU_SECURE_SMMU_CB10_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
7237 #define ALT_SMMU_SECURE_SMMU_CB10_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB10_PMAUTHSTATUS_OFST))
7238 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_SCTLR register for the ALT_SMMU_SECURE instance. */
7239 #define ALT_SMMU_SECURE_SMMU_CB11_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_SCTLR_OFST))
7240 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_ACTLR register for the ALT_SMMU_SECURE instance. */
7241 #define ALT_SMMU_SECURE_SMMU_CB11_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_ACTLR_OFST))
7242 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_RESUME register for the ALT_SMMU_SECURE instance. */
7243 #define ALT_SMMU_SECURE_SMMU_CB11_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_RESUME_OFST))
7244 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TCR2 register for the ALT_SMMU_SECURE instance. */
7245 #define ALT_SMMU_SECURE_SMMU_CB11_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TCR2_OFST))
7246 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
7247 #define ALT_SMMU_SECURE_SMMU_CB11_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TTBR0_LOW_OFST))
7248 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
7249 #define ALT_SMMU_SECURE_SMMU_CB11_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TTBR0_HIGH_OFST))
7250 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
7251 #define ALT_SMMU_SECURE_SMMU_CB11_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TTBR1_LOW_OFST))
7252 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
7253 #define ALT_SMMU_SECURE_SMMU_CB11_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TTBR1_HIGH_OFST))
7254 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
7255 #define ALT_SMMU_SECURE_SMMU_CB11_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TCR_LPAE_OFST))
7256 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
7257 #define ALT_SMMU_SECURE_SMMU_CB11_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_CONTEXTIDR_OFST))
7258 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
7259 #define ALT_SMMU_SECURE_SMMU_CB11_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PRRR_MAIR0_OFST))
7260 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
7261 #define ALT_SMMU_SECURE_SMMU_CB11_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_NMRR_MAIR1_OFST))
7262 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_FSR register for the ALT_SMMU_SECURE instance. */
7263 #define ALT_SMMU_SECURE_SMMU_CB11_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_FSR_OFST))
7264 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
7265 #define ALT_SMMU_SECURE_SMMU_CB11_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_FSRRESTORE_OFST))
7266 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_FAR_LOW register for the ALT_SMMU_SECURE instance. */
7267 #define ALT_SMMU_SECURE_SMMU_CB11_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_FAR_LOW_OFST))
7268 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
7269 #define ALT_SMMU_SECURE_SMMU_CB11_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_FAR_HIGH_OFST))
7270 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_FSYNR0 register for the ALT_SMMU_SECURE instance. */
7271 #define ALT_SMMU_SECURE_SMMU_CB11_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_FSYNR0_OFST))
7272 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
7273 #define ALT_SMMU_SECURE_SMMU_CB11_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_IPAFAR_LOW_OFST))
7274 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
7275 #define ALT_SMMU_SECURE_SMMU_CB11_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_IPAFAR_HIGH_OFST))
7276 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
7277 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIVA_LOW_OFST))
7278 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
7279 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIVA_HIGH_OFST))
7280 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
7281 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIVAA_LOW_OFST))
7282 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
7283 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIVAA_HIGH_OFST))
7284 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIASID register for the ALT_SMMU_SECURE instance. */
7285 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIASID_OFST))
7286 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIALL register for the ALT_SMMU_SECURE instance. */
7287 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIALL_OFST))
7288 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
7289 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIVAL_LOW_OFST))
7290 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
7291 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIVAL_HIGH_OFST))
7292 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
7293 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIVAAL_LOW_OFST))
7294 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
7295 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIVAAL_HIGH_OFST))
7296 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
7297 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIIPAS2_LOW_OFST))
7298 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
7299 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIIPAS2_HIGH_OFST))
7300 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
7301 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIIPAS2L_LOW_OFST))
7302 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
7303 #define ALT_SMMU_SECURE_SMMU_CB11_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBIIPAS2L_HIGH_OFST))
7304 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBSYNC register for the ALT_SMMU_SECURE instance. */
7305 #define ALT_SMMU_SECURE_SMMU_CB11_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBSYNC_OFST))
7306 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
7307 #define ALT_SMMU_SECURE_SMMU_CB11_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_TLBSTATUS_OFST))
7308 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
7309 #define ALT_SMMU_SECURE_SMMU_CB11_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMEVCNTR0_OFST))
7310 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
7311 #define ALT_SMMU_SECURE_SMMU_CB11_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMEVCNTR1_OFST))
7312 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
7313 #define ALT_SMMU_SECURE_SMMU_CB11_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMEVCNTR2_OFST))
7314 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
7315 #define ALT_SMMU_SECURE_SMMU_CB11_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMEVCNTR3_OFST))
7316 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
7317 #define ALT_SMMU_SECURE_SMMU_CB11_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMEVTYPER0_OFST))
7318 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
7319 #define ALT_SMMU_SECURE_SMMU_CB11_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMEVTYPER1_OFST))
7320 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
7321 #define ALT_SMMU_SECURE_SMMU_CB11_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMEVTYPER2_OFST))
7322 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
7323 #define ALT_SMMU_SECURE_SMMU_CB11_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMEVTYPER3_OFST))
7324 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMCFGR register for the ALT_SMMU_SECURE instance. */
7325 #define ALT_SMMU_SECURE_SMMU_CB11_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMCFGR_OFST))
7326 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMCR register for the ALT_SMMU_SECURE instance. */
7327 #define ALT_SMMU_SECURE_SMMU_CB11_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMCR_OFST))
7328 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMCEID register for the ALT_SMMU_SECURE instance. */
7329 #define ALT_SMMU_SECURE_SMMU_CB11_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMCEID_OFST))
7330 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
7331 #define ALT_SMMU_SECURE_SMMU_CB11_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMCNTENSE_OFST))
7332 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
7333 #define ALT_SMMU_SECURE_SMMU_CB11_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMCNTENCLR_OFST))
7334 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
7335 #define ALT_SMMU_SECURE_SMMU_CB11_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMCNTENSET_OFST))
7336 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
7337 #define ALT_SMMU_SECURE_SMMU_CB11_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMINTENCLR_OFST))
7338 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
7339 #define ALT_SMMU_SECURE_SMMU_CB11_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMOVSCLR_OFST))
7340 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMOVSSET register for the ALT_SMMU_SECURE instance. */
7341 #define ALT_SMMU_SECURE_SMMU_CB11_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMOVSSET_OFST))
7342 /* The address of the ALT_SMMU_SECURE_SMMU_CB11_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
7343 #define ALT_SMMU_SECURE_SMMU_CB11_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB11_PMAUTHSTATUS_OFST))
7344 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_SCTLR register for the ALT_SMMU_SECURE instance. */
7345 #define ALT_SMMU_SECURE_SMMU_CB12_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_SCTLR_OFST))
7346 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_ACTLR register for the ALT_SMMU_SECURE instance. */
7347 #define ALT_SMMU_SECURE_SMMU_CB12_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_ACTLR_OFST))
7348 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_RESUME register for the ALT_SMMU_SECURE instance. */
7349 #define ALT_SMMU_SECURE_SMMU_CB12_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_RESUME_OFST))
7350 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TCR2 register for the ALT_SMMU_SECURE instance. */
7351 #define ALT_SMMU_SECURE_SMMU_CB12_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TCR2_OFST))
7352 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
7353 #define ALT_SMMU_SECURE_SMMU_CB12_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TTBR0_LOW_OFST))
7354 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
7355 #define ALT_SMMU_SECURE_SMMU_CB12_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TTBR0_HIGH_OFST))
7356 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
7357 #define ALT_SMMU_SECURE_SMMU_CB12_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TTBR1_LOW_OFST))
7358 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
7359 #define ALT_SMMU_SECURE_SMMU_CB12_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TTBR1_HIGH_OFST))
7360 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
7361 #define ALT_SMMU_SECURE_SMMU_CB12_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TCR_LPAE_OFST))
7362 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
7363 #define ALT_SMMU_SECURE_SMMU_CB12_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_CONTEXTIDR_OFST))
7364 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
7365 #define ALT_SMMU_SECURE_SMMU_CB12_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PRRR_MAIR0_OFST))
7366 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
7367 #define ALT_SMMU_SECURE_SMMU_CB12_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_NMRR_MAIR1_OFST))
7368 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_FSR register for the ALT_SMMU_SECURE instance. */
7369 #define ALT_SMMU_SECURE_SMMU_CB12_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_FSR_OFST))
7370 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
7371 #define ALT_SMMU_SECURE_SMMU_CB12_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_FSRRESTORE_OFST))
7372 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_FAR_LOW register for the ALT_SMMU_SECURE instance. */
7373 #define ALT_SMMU_SECURE_SMMU_CB12_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_FAR_LOW_OFST))
7374 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
7375 #define ALT_SMMU_SECURE_SMMU_CB12_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_FAR_HIGH_OFST))
7376 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_FSYNR0 register for the ALT_SMMU_SECURE instance. */
7377 #define ALT_SMMU_SECURE_SMMU_CB12_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_FSYNR0_OFST))
7378 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
7379 #define ALT_SMMU_SECURE_SMMU_CB12_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_IPAFAR_LOW_OFST))
7380 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
7381 #define ALT_SMMU_SECURE_SMMU_CB12_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_IPAFAR_HIGH_OFST))
7382 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
7383 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIVA_LOW_OFST))
7384 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
7385 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIVA_HIGH_OFST))
7386 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
7387 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIVAA_LOW_OFST))
7388 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
7389 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIVAA_HIGH_OFST))
7390 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIASID register for the ALT_SMMU_SECURE instance. */
7391 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIASID_OFST))
7392 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIALL register for the ALT_SMMU_SECURE instance. */
7393 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIALL_OFST))
7394 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
7395 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIVAL_LOW_OFST))
7396 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
7397 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIVAL_HIGH_OFST))
7398 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
7399 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIVAAL_LOW_OFST))
7400 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
7401 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIVAAL_HIGH_OFST))
7402 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
7403 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIIPAS2_LOW_OFST))
7404 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
7405 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIIPAS2_HIGH_OFST))
7406 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
7407 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIIPAS2L_LOW_OFST))
7408 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
7409 #define ALT_SMMU_SECURE_SMMU_CB12_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBIIPAS2L_HIGH_OFST))
7410 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBSYNC register for the ALT_SMMU_SECURE instance. */
7411 #define ALT_SMMU_SECURE_SMMU_CB12_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBSYNC_OFST))
7412 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
7413 #define ALT_SMMU_SECURE_SMMU_CB12_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_TLBSTATUS_OFST))
7414 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
7415 #define ALT_SMMU_SECURE_SMMU_CB12_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMEVCNTR0_OFST))
7416 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
7417 #define ALT_SMMU_SECURE_SMMU_CB12_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMEVCNTR1_OFST))
7418 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
7419 #define ALT_SMMU_SECURE_SMMU_CB12_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMEVCNTR2_OFST))
7420 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
7421 #define ALT_SMMU_SECURE_SMMU_CB12_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMEVCNTR3_OFST))
7422 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
7423 #define ALT_SMMU_SECURE_SMMU_CB12_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMEVTYPER0_OFST))
7424 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
7425 #define ALT_SMMU_SECURE_SMMU_CB12_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMEVTYPER1_OFST))
7426 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
7427 #define ALT_SMMU_SECURE_SMMU_CB12_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMEVTYPER2_OFST))
7428 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
7429 #define ALT_SMMU_SECURE_SMMU_CB12_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMEVTYPER3_OFST))
7430 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMCFGR register for the ALT_SMMU_SECURE instance. */
7431 #define ALT_SMMU_SECURE_SMMU_CB12_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMCFGR_OFST))
7432 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMCR register for the ALT_SMMU_SECURE instance. */
7433 #define ALT_SMMU_SECURE_SMMU_CB12_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMCR_OFST))
7434 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMCEID register for the ALT_SMMU_SECURE instance. */
7435 #define ALT_SMMU_SECURE_SMMU_CB12_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMCEID_OFST))
7436 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
7437 #define ALT_SMMU_SECURE_SMMU_CB12_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMCNTENSE_OFST))
7438 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
7439 #define ALT_SMMU_SECURE_SMMU_CB12_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMCNTENCLR_OFST))
7440 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
7441 #define ALT_SMMU_SECURE_SMMU_CB12_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMCNTENSET_OFST))
7442 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
7443 #define ALT_SMMU_SECURE_SMMU_CB12_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMINTENCLR_OFST))
7444 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
7445 #define ALT_SMMU_SECURE_SMMU_CB12_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMOVSCLR_OFST))
7446 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMOVSSET register for the ALT_SMMU_SECURE instance. */
7447 #define ALT_SMMU_SECURE_SMMU_CB12_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMOVSSET_OFST))
7448 /* The address of the ALT_SMMU_SECURE_SMMU_CB12_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
7449 #define ALT_SMMU_SECURE_SMMU_CB12_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB12_PMAUTHSTATUS_OFST))
7450 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_SCTLR register for the ALT_SMMU_SECURE instance. */
7451 #define ALT_SMMU_SECURE_SMMU_CB13_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_SCTLR_OFST))
7452 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_ACTLR register for the ALT_SMMU_SECURE instance. */
7453 #define ALT_SMMU_SECURE_SMMU_CB13_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_ACTLR_OFST))
7454 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_RESUME register for the ALT_SMMU_SECURE instance. */
7455 #define ALT_SMMU_SECURE_SMMU_CB13_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_RESUME_OFST))
7456 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TCR2 register for the ALT_SMMU_SECURE instance. */
7457 #define ALT_SMMU_SECURE_SMMU_CB13_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TCR2_OFST))
7458 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
7459 #define ALT_SMMU_SECURE_SMMU_CB13_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TTBR0_LOW_OFST))
7460 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
7461 #define ALT_SMMU_SECURE_SMMU_CB13_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TTBR0_HIGH_OFST))
7462 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
7463 #define ALT_SMMU_SECURE_SMMU_CB13_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TTBR1_LOW_OFST))
7464 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
7465 #define ALT_SMMU_SECURE_SMMU_CB13_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TTBR1_HIGH_OFST))
7466 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
7467 #define ALT_SMMU_SECURE_SMMU_CB13_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TCR_LPAE_OFST))
7468 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
7469 #define ALT_SMMU_SECURE_SMMU_CB13_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_CONTEXTIDR_OFST))
7470 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
7471 #define ALT_SMMU_SECURE_SMMU_CB13_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PRRR_MAIR0_OFST))
7472 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
7473 #define ALT_SMMU_SECURE_SMMU_CB13_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_NMRR_MAIR1_OFST))
7474 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_FSR register for the ALT_SMMU_SECURE instance. */
7475 #define ALT_SMMU_SECURE_SMMU_CB13_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_FSR_OFST))
7476 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
7477 #define ALT_SMMU_SECURE_SMMU_CB13_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_FSRRESTORE_OFST))
7478 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_FAR_LOW register for the ALT_SMMU_SECURE instance. */
7479 #define ALT_SMMU_SECURE_SMMU_CB13_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_FAR_LOW_OFST))
7480 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
7481 #define ALT_SMMU_SECURE_SMMU_CB13_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_FAR_HIGH_OFST))
7482 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_FSYNR0 register for the ALT_SMMU_SECURE instance. */
7483 #define ALT_SMMU_SECURE_SMMU_CB13_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_FSYNR0_OFST))
7484 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
7485 #define ALT_SMMU_SECURE_SMMU_CB13_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_IPAFAR_LOW_OFST))
7486 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
7487 #define ALT_SMMU_SECURE_SMMU_CB13_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_IPAFAR_HIGH_OFST))
7488 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
7489 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIVA_LOW_OFST))
7490 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
7491 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIVA_HIGH_OFST))
7492 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
7493 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIVAA_LOW_OFST))
7494 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
7495 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIVAA_HIGH_OFST))
7496 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIASID register for the ALT_SMMU_SECURE instance. */
7497 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIASID_OFST))
7498 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIALL register for the ALT_SMMU_SECURE instance. */
7499 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIALL_OFST))
7500 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
7501 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIVAL_LOW_OFST))
7502 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
7503 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIVAL_HIGH_OFST))
7504 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
7505 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIVAAL_LOW_OFST))
7506 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
7507 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIVAAL_HIGH_OFST))
7508 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
7509 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIIPAS2_LOW_OFST))
7510 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
7511 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIIPAS2_HIGH_OFST))
7512 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
7513 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIIPAS2L_LOW_OFST))
7514 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
7515 #define ALT_SMMU_SECURE_SMMU_CB13_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBIIPAS2L_HIGH_OFST))
7516 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBSYNC register for the ALT_SMMU_SECURE instance. */
7517 #define ALT_SMMU_SECURE_SMMU_CB13_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBSYNC_OFST))
7518 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
7519 #define ALT_SMMU_SECURE_SMMU_CB13_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_TLBSTATUS_OFST))
7520 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
7521 #define ALT_SMMU_SECURE_SMMU_CB13_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMEVCNTR0_OFST))
7522 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
7523 #define ALT_SMMU_SECURE_SMMU_CB13_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMEVCNTR1_OFST))
7524 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
7525 #define ALT_SMMU_SECURE_SMMU_CB13_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMEVCNTR2_OFST))
7526 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
7527 #define ALT_SMMU_SECURE_SMMU_CB13_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMEVCNTR3_OFST))
7528 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
7529 #define ALT_SMMU_SECURE_SMMU_CB13_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMEVTYPER0_OFST))
7530 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
7531 #define ALT_SMMU_SECURE_SMMU_CB13_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMEVTYPER1_OFST))
7532 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
7533 #define ALT_SMMU_SECURE_SMMU_CB13_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMEVTYPER2_OFST))
7534 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
7535 #define ALT_SMMU_SECURE_SMMU_CB13_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMEVTYPER3_OFST))
7536 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMCFGR register for the ALT_SMMU_SECURE instance. */
7537 #define ALT_SMMU_SECURE_SMMU_CB13_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMCFGR_OFST))
7538 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMCR register for the ALT_SMMU_SECURE instance. */
7539 #define ALT_SMMU_SECURE_SMMU_CB13_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMCR_OFST))
7540 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMCEID register for the ALT_SMMU_SECURE instance. */
7541 #define ALT_SMMU_SECURE_SMMU_CB13_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMCEID_OFST))
7542 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
7543 #define ALT_SMMU_SECURE_SMMU_CB13_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMCNTENSE_OFST))
7544 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
7545 #define ALT_SMMU_SECURE_SMMU_CB13_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMCNTENCLR_OFST))
7546 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
7547 #define ALT_SMMU_SECURE_SMMU_CB13_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMCNTENSET_OFST))
7548 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
7549 #define ALT_SMMU_SECURE_SMMU_CB13_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMINTENCLR_OFST))
7550 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
7551 #define ALT_SMMU_SECURE_SMMU_CB13_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMOVSCLR_OFST))
7552 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMOVSSET register for the ALT_SMMU_SECURE instance. */
7553 #define ALT_SMMU_SECURE_SMMU_CB13_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMOVSSET_OFST))
7554 /* The address of the ALT_SMMU_SECURE_SMMU_CB13_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
7555 #define ALT_SMMU_SECURE_SMMU_CB13_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB13_PMAUTHSTATUS_OFST))
7556 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_SCTLR register for the ALT_SMMU_SECURE instance. */
7557 #define ALT_SMMU_SECURE_SMMU_CB14_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_SCTLR_OFST))
7558 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_ACTLR register for the ALT_SMMU_SECURE instance. */
7559 #define ALT_SMMU_SECURE_SMMU_CB14_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_ACTLR_OFST))
7560 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_RESUME register for the ALT_SMMU_SECURE instance. */
7561 #define ALT_SMMU_SECURE_SMMU_CB14_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_RESUME_OFST))
7562 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TCR2 register for the ALT_SMMU_SECURE instance. */
7563 #define ALT_SMMU_SECURE_SMMU_CB14_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TCR2_OFST))
7564 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
7565 #define ALT_SMMU_SECURE_SMMU_CB14_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TTBR0_LOW_OFST))
7566 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
7567 #define ALT_SMMU_SECURE_SMMU_CB14_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TTBR0_HIGH_OFST))
7568 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
7569 #define ALT_SMMU_SECURE_SMMU_CB14_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TTBR1_LOW_OFST))
7570 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
7571 #define ALT_SMMU_SECURE_SMMU_CB14_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TTBR1_HIGH_OFST))
7572 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
7573 #define ALT_SMMU_SECURE_SMMU_CB14_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TCR_LPAE_OFST))
7574 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
7575 #define ALT_SMMU_SECURE_SMMU_CB14_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_CONTEXTIDR_OFST))
7576 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
7577 #define ALT_SMMU_SECURE_SMMU_CB14_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PRRR_MAIR0_OFST))
7578 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
7579 #define ALT_SMMU_SECURE_SMMU_CB14_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_NMRR_MAIR1_OFST))
7580 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_FSR register for the ALT_SMMU_SECURE instance. */
7581 #define ALT_SMMU_SECURE_SMMU_CB14_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_FSR_OFST))
7582 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
7583 #define ALT_SMMU_SECURE_SMMU_CB14_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_FSRRESTORE_OFST))
7584 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_FAR_LOW register for the ALT_SMMU_SECURE instance. */
7585 #define ALT_SMMU_SECURE_SMMU_CB14_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_FAR_LOW_OFST))
7586 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
7587 #define ALT_SMMU_SECURE_SMMU_CB14_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_FAR_HIGH_OFST))
7588 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_FSYNR0 register for the ALT_SMMU_SECURE instance. */
7589 #define ALT_SMMU_SECURE_SMMU_CB14_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_FSYNR0_OFST))
7590 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
7591 #define ALT_SMMU_SECURE_SMMU_CB14_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_IPAFAR_LOW_OFST))
7592 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
7593 #define ALT_SMMU_SECURE_SMMU_CB14_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_IPAFAR_HIGH_OFST))
7594 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
7595 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIVA_LOW_OFST))
7596 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
7597 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIVA_HIGH_OFST))
7598 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
7599 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIVAA_LOW_OFST))
7600 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
7601 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIVAA_HIGH_OFST))
7602 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIASID register for the ALT_SMMU_SECURE instance. */
7603 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIASID_OFST))
7604 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIALL register for the ALT_SMMU_SECURE instance. */
7605 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIALL_OFST))
7606 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
7607 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIVAL_LOW_OFST))
7608 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
7609 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIVAL_HIGH_OFST))
7610 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
7611 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIVAAL_LOW_OFST))
7612 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
7613 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIVAAL_HIGH_OFST))
7614 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
7615 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIIPAS2_LOW_OFST))
7616 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
7617 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIIPAS2_HIGH_OFST))
7618 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
7619 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIIPAS2L_LOW_OFST))
7620 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
7621 #define ALT_SMMU_SECURE_SMMU_CB14_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBIIPAS2L_HIGH_OFST))
7622 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBSYNC register for the ALT_SMMU_SECURE instance. */
7623 #define ALT_SMMU_SECURE_SMMU_CB14_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBSYNC_OFST))
7624 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
7625 #define ALT_SMMU_SECURE_SMMU_CB14_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_TLBSTATUS_OFST))
7626 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
7627 #define ALT_SMMU_SECURE_SMMU_CB14_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMEVCNTR0_OFST))
7628 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
7629 #define ALT_SMMU_SECURE_SMMU_CB14_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMEVCNTR1_OFST))
7630 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
7631 #define ALT_SMMU_SECURE_SMMU_CB14_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMEVCNTR2_OFST))
7632 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
7633 #define ALT_SMMU_SECURE_SMMU_CB14_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMEVCNTR3_OFST))
7634 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
7635 #define ALT_SMMU_SECURE_SMMU_CB14_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMEVTYPER0_OFST))
7636 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
7637 #define ALT_SMMU_SECURE_SMMU_CB14_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMEVTYPER1_OFST))
7638 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
7639 #define ALT_SMMU_SECURE_SMMU_CB14_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMEVTYPER2_OFST))
7640 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
7641 #define ALT_SMMU_SECURE_SMMU_CB14_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMEVTYPER3_OFST))
7642 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMCFGR register for the ALT_SMMU_SECURE instance. */
7643 #define ALT_SMMU_SECURE_SMMU_CB14_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMCFGR_OFST))
7644 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMCR register for the ALT_SMMU_SECURE instance. */
7645 #define ALT_SMMU_SECURE_SMMU_CB14_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMCR_OFST))
7646 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMCEID register for the ALT_SMMU_SECURE instance. */
7647 #define ALT_SMMU_SECURE_SMMU_CB14_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMCEID_OFST))
7648 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
7649 #define ALT_SMMU_SECURE_SMMU_CB14_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMCNTENSE_OFST))
7650 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
7651 #define ALT_SMMU_SECURE_SMMU_CB14_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMCNTENCLR_OFST))
7652 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
7653 #define ALT_SMMU_SECURE_SMMU_CB14_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMCNTENSET_OFST))
7654 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
7655 #define ALT_SMMU_SECURE_SMMU_CB14_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMINTENCLR_OFST))
7656 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
7657 #define ALT_SMMU_SECURE_SMMU_CB14_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMOVSCLR_OFST))
7658 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMOVSSET register for the ALT_SMMU_SECURE instance. */
7659 #define ALT_SMMU_SECURE_SMMU_CB14_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMOVSSET_OFST))
7660 /* The address of the ALT_SMMU_SECURE_SMMU_CB14_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
7661 #define ALT_SMMU_SECURE_SMMU_CB14_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB14_PMAUTHSTATUS_OFST))
7662 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_SCTLR register for the ALT_SMMU_SECURE instance. */
7663 #define ALT_SMMU_SECURE_SMMU_CB15_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_SCTLR_OFST))
7664 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_ACTLR register for the ALT_SMMU_SECURE instance. */
7665 #define ALT_SMMU_SECURE_SMMU_CB15_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_ACTLR_OFST))
7666 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_RESUME register for the ALT_SMMU_SECURE instance. */
7667 #define ALT_SMMU_SECURE_SMMU_CB15_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_RESUME_OFST))
7668 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TCR2 register for the ALT_SMMU_SECURE instance. */
7669 #define ALT_SMMU_SECURE_SMMU_CB15_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TCR2_OFST))
7670 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
7671 #define ALT_SMMU_SECURE_SMMU_CB15_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TTBR0_LOW_OFST))
7672 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
7673 #define ALT_SMMU_SECURE_SMMU_CB15_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TTBR0_HIGH_OFST))
7674 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
7675 #define ALT_SMMU_SECURE_SMMU_CB15_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TTBR1_LOW_OFST))
7676 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
7677 #define ALT_SMMU_SECURE_SMMU_CB15_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TTBR1_HIGH_OFST))
7678 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
7679 #define ALT_SMMU_SECURE_SMMU_CB15_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TCR_LPAE_OFST))
7680 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
7681 #define ALT_SMMU_SECURE_SMMU_CB15_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_CONTEXTIDR_OFST))
7682 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
7683 #define ALT_SMMU_SECURE_SMMU_CB15_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PRRR_MAIR0_OFST))
7684 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
7685 #define ALT_SMMU_SECURE_SMMU_CB15_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_NMRR_MAIR1_OFST))
7686 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_FSR register for the ALT_SMMU_SECURE instance. */
7687 #define ALT_SMMU_SECURE_SMMU_CB15_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_FSR_OFST))
7688 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
7689 #define ALT_SMMU_SECURE_SMMU_CB15_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_FSRRESTORE_OFST))
7690 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_FAR_LOW register for the ALT_SMMU_SECURE instance. */
7691 #define ALT_SMMU_SECURE_SMMU_CB15_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_FAR_LOW_OFST))
7692 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
7693 #define ALT_SMMU_SECURE_SMMU_CB15_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_FAR_HIGH_OFST))
7694 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_FSYNR0 register for the ALT_SMMU_SECURE instance. */
7695 #define ALT_SMMU_SECURE_SMMU_CB15_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_FSYNR0_OFST))
7696 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
7697 #define ALT_SMMU_SECURE_SMMU_CB15_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_IPAFAR_LOW_OFST))
7698 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
7699 #define ALT_SMMU_SECURE_SMMU_CB15_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_IPAFAR_HIGH_OFST))
7700 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
7701 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIVA_LOW_OFST))
7702 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
7703 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIVA_HIGH_OFST))
7704 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
7705 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIVAA_LOW_OFST))
7706 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
7707 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIVAA_HIGH_OFST))
7708 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIASID register for the ALT_SMMU_SECURE instance. */
7709 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIASID_OFST))
7710 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIALL register for the ALT_SMMU_SECURE instance. */
7711 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIALL_OFST))
7712 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
7713 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIVAL_LOW_OFST))
7714 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
7715 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIVAL_HIGH_OFST))
7716 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
7717 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIVAAL_LOW_OFST))
7718 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
7719 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIVAAL_HIGH_OFST))
7720 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
7721 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIIPAS2_LOW_OFST))
7722 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
7723 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIIPAS2_HIGH_OFST))
7724 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
7725 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIIPAS2L_LOW_OFST))
7726 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
7727 #define ALT_SMMU_SECURE_SMMU_CB15_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBIIPAS2L_HIGH_OFST))
7728 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBSYNC register for the ALT_SMMU_SECURE instance. */
7729 #define ALT_SMMU_SECURE_SMMU_CB15_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBSYNC_OFST))
7730 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
7731 #define ALT_SMMU_SECURE_SMMU_CB15_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_TLBSTATUS_OFST))
7732 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
7733 #define ALT_SMMU_SECURE_SMMU_CB15_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMEVCNTR0_OFST))
7734 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
7735 #define ALT_SMMU_SECURE_SMMU_CB15_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMEVCNTR1_OFST))
7736 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
7737 #define ALT_SMMU_SECURE_SMMU_CB15_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMEVCNTR2_OFST))
7738 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
7739 #define ALT_SMMU_SECURE_SMMU_CB15_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMEVCNTR3_OFST))
7740 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
7741 #define ALT_SMMU_SECURE_SMMU_CB15_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMEVTYPER0_OFST))
7742 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
7743 #define ALT_SMMU_SECURE_SMMU_CB15_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMEVTYPER1_OFST))
7744 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
7745 #define ALT_SMMU_SECURE_SMMU_CB15_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMEVTYPER2_OFST))
7746 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
7747 #define ALT_SMMU_SECURE_SMMU_CB15_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMEVTYPER3_OFST))
7748 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMCFGR register for the ALT_SMMU_SECURE instance. */
7749 #define ALT_SMMU_SECURE_SMMU_CB15_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMCFGR_OFST))
7750 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMCR register for the ALT_SMMU_SECURE instance. */
7751 #define ALT_SMMU_SECURE_SMMU_CB15_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMCR_OFST))
7752 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMCEID register for the ALT_SMMU_SECURE instance. */
7753 #define ALT_SMMU_SECURE_SMMU_CB15_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMCEID_OFST))
7754 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
7755 #define ALT_SMMU_SECURE_SMMU_CB15_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMCNTENSE_OFST))
7756 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
7757 #define ALT_SMMU_SECURE_SMMU_CB15_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMCNTENCLR_OFST))
7758 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
7759 #define ALT_SMMU_SECURE_SMMU_CB15_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMCNTENSET_OFST))
7760 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
7761 #define ALT_SMMU_SECURE_SMMU_CB15_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMINTENCLR_OFST))
7762 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
7763 #define ALT_SMMU_SECURE_SMMU_CB15_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMOVSCLR_OFST))
7764 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMOVSSET register for the ALT_SMMU_SECURE instance. */
7765 #define ALT_SMMU_SECURE_SMMU_CB15_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMOVSSET_OFST))
7766 /* The address of the ALT_SMMU_SECURE_SMMU_CB15_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
7767 #define ALT_SMMU_SECURE_SMMU_CB15_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB15_PMAUTHSTATUS_OFST))
7768 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_SCTLR register for the ALT_SMMU_SECURE instance. */
7769 #define ALT_SMMU_SECURE_SMMU_CB16_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_SCTLR_OFST))
7770 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_ACTLR register for the ALT_SMMU_SECURE instance. */
7771 #define ALT_SMMU_SECURE_SMMU_CB16_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_ACTLR_OFST))
7772 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_RESUME register for the ALT_SMMU_SECURE instance. */
7773 #define ALT_SMMU_SECURE_SMMU_CB16_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_RESUME_OFST))
7774 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TCR2 register for the ALT_SMMU_SECURE instance. */
7775 #define ALT_SMMU_SECURE_SMMU_CB16_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TCR2_OFST))
7776 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
7777 #define ALT_SMMU_SECURE_SMMU_CB16_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TTBR0_LOW_OFST))
7778 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
7779 #define ALT_SMMU_SECURE_SMMU_CB16_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TTBR0_HIGH_OFST))
7780 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
7781 #define ALT_SMMU_SECURE_SMMU_CB16_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TTBR1_LOW_OFST))
7782 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
7783 #define ALT_SMMU_SECURE_SMMU_CB16_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TTBR1_HIGH_OFST))
7784 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
7785 #define ALT_SMMU_SECURE_SMMU_CB16_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TCR_LPAE_OFST))
7786 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
7787 #define ALT_SMMU_SECURE_SMMU_CB16_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_CONTEXTIDR_OFST))
7788 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
7789 #define ALT_SMMU_SECURE_SMMU_CB16_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PRRR_MAIR0_OFST))
7790 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
7791 #define ALT_SMMU_SECURE_SMMU_CB16_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_NMRR_MAIR1_OFST))
7792 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_FSR register for the ALT_SMMU_SECURE instance. */
7793 #define ALT_SMMU_SECURE_SMMU_CB16_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_FSR_OFST))
7794 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
7795 #define ALT_SMMU_SECURE_SMMU_CB16_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_FSRRESTORE_OFST))
7796 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_FAR_LOW register for the ALT_SMMU_SECURE instance. */
7797 #define ALT_SMMU_SECURE_SMMU_CB16_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_FAR_LOW_OFST))
7798 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
7799 #define ALT_SMMU_SECURE_SMMU_CB16_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_FAR_HIGH_OFST))
7800 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_FSYNR0 register for the ALT_SMMU_SECURE instance. */
7801 #define ALT_SMMU_SECURE_SMMU_CB16_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_FSYNR0_OFST))
7802 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
7803 #define ALT_SMMU_SECURE_SMMU_CB16_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_IPAFAR_LOW_OFST))
7804 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
7805 #define ALT_SMMU_SECURE_SMMU_CB16_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_IPAFAR_HIGH_OFST))
7806 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
7807 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIVA_LOW_OFST))
7808 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
7809 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIVA_HIGH_OFST))
7810 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
7811 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIVAA_LOW_OFST))
7812 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
7813 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIVAA_HIGH_OFST))
7814 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIASID register for the ALT_SMMU_SECURE instance. */
7815 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIASID_OFST))
7816 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIALL register for the ALT_SMMU_SECURE instance. */
7817 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIALL_OFST))
7818 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
7819 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIVAL_LOW_OFST))
7820 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
7821 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIVAL_HIGH_OFST))
7822 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
7823 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIVAAL_LOW_OFST))
7824 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
7825 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIVAAL_HIGH_OFST))
7826 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
7827 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIIPAS2_LOW_OFST))
7828 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
7829 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIIPAS2_HIGH_OFST))
7830 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
7831 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIIPAS2L_LOW_OFST))
7832 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
7833 #define ALT_SMMU_SECURE_SMMU_CB16_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBIIPAS2L_HIGH_OFST))
7834 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBSYNC register for the ALT_SMMU_SECURE instance. */
7835 #define ALT_SMMU_SECURE_SMMU_CB16_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBSYNC_OFST))
7836 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
7837 #define ALT_SMMU_SECURE_SMMU_CB16_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_TLBSTATUS_OFST))
7838 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
7839 #define ALT_SMMU_SECURE_SMMU_CB16_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMEVCNTR0_OFST))
7840 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
7841 #define ALT_SMMU_SECURE_SMMU_CB16_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMEVCNTR1_OFST))
7842 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
7843 #define ALT_SMMU_SECURE_SMMU_CB16_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMEVCNTR2_OFST))
7844 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
7845 #define ALT_SMMU_SECURE_SMMU_CB16_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMEVCNTR3_OFST))
7846 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
7847 #define ALT_SMMU_SECURE_SMMU_CB16_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMEVTYPER0_OFST))
7848 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
7849 #define ALT_SMMU_SECURE_SMMU_CB16_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMEVTYPER1_OFST))
7850 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
7851 #define ALT_SMMU_SECURE_SMMU_CB16_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMEVTYPER2_OFST))
7852 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
7853 #define ALT_SMMU_SECURE_SMMU_CB16_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMEVTYPER3_OFST))
7854 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMCFGR register for the ALT_SMMU_SECURE instance. */
7855 #define ALT_SMMU_SECURE_SMMU_CB16_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMCFGR_OFST))
7856 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMCR register for the ALT_SMMU_SECURE instance. */
7857 #define ALT_SMMU_SECURE_SMMU_CB16_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMCR_OFST))
7858 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMCEID register for the ALT_SMMU_SECURE instance. */
7859 #define ALT_SMMU_SECURE_SMMU_CB16_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMCEID_OFST))
7860 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
7861 #define ALT_SMMU_SECURE_SMMU_CB16_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMCNTENSE_OFST))
7862 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
7863 #define ALT_SMMU_SECURE_SMMU_CB16_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMCNTENCLR_OFST))
7864 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
7865 #define ALT_SMMU_SECURE_SMMU_CB16_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMCNTENSET_OFST))
7866 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
7867 #define ALT_SMMU_SECURE_SMMU_CB16_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMINTENCLR_OFST))
7868 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
7869 #define ALT_SMMU_SECURE_SMMU_CB16_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMOVSCLR_OFST))
7870 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMOVSSET register for the ALT_SMMU_SECURE instance. */
7871 #define ALT_SMMU_SECURE_SMMU_CB16_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMOVSSET_OFST))
7872 /* The address of the ALT_SMMU_SECURE_SMMU_CB16_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
7873 #define ALT_SMMU_SECURE_SMMU_CB16_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB16_PMAUTHSTATUS_OFST))
7874 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_SCTLR register for the ALT_SMMU_SECURE instance. */
7875 #define ALT_SMMU_SECURE_SMMU_CB17_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_SCTLR_OFST))
7876 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_ACTLR register for the ALT_SMMU_SECURE instance. */
7877 #define ALT_SMMU_SECURE_SMMU_CB17_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_ACTLR_OFST))
7878 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_RESUME register for the ALT_SMMU_SECURE instance. */
7879 #define ALT_SMMU_SECURE_SMMU_CB17_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_RESUME_OFST))
7880 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TCR2 register for the ALT_SMMU_SECURE instance. */
7881 #define ALT_SMMU_SECURE_SMMU_CB17_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TCR2_OFST))
7882 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
7883 #define ALT_SMMU_SECURE_SMMU_CB17_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TTBR0_LOW_OFST))
7884 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
7885 #define ALT_SMMU_SECURE_SMMU_CB17_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TTBR0_HIGH_OFST))
7886 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
7887 #define ALT_SMMU_SECURE_SMMU_CB17_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TTBR1_LOW_OFST))
7888 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
7889 #define ALT_SMMU_SECURE_SMMU_CB17_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TTBR1_HIGH_OFST))
7890 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
7891 #define ALT_SMMU_SECURE_SMMU_CB17_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TCR_LPAE_OFST))
7892 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
7893 #define ALT_SMMU_SECURE_SMMU_CB17_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_CONTEXTIDR_OFST))
7894 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
7895 #define ALT_SMMU_SECURE_SMMU_CB17_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PRRR_MAIR0_OFST))
7896 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
7897 #define ALT_SMMU_SECURE_SMMU_CB17_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_NMRR_MAIR1_OFST))
7898 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_FSR register for the ALT_SMMU_SECURE instance. */
7899 #define ALT_SMMU_SECURE_SMMU_CB17_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_FSR_OFST))
7900 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
7901 #define ALT_SMMU_SECURE_SMMU_CB17_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_FSRRESTORE_OFST))
7902 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_FAR_LOW register for the ALT_SMMU_SECURE instance. */
7903 #define ALT_SMMU_SECURE_SMMU_CB17_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_FAR_LOW_OFST))
7904 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
7905 #define ALT_SMMU_SECURE_SMMU_CB17_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_FAR_HIGH_OFST))
7906 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_FSYNR0 register for the ALT_SMMU_SECURE instance. */
7907 #define ALT_SMMU_SECURE_SMMU_CB17_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_FSYNR0_OFST))
7908 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
7909 #define ALT_SMMU_SECURE_SMMU_CB17_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_IPAFAR_LOW_OFST))
7910 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
7911 #define ALT_SMMU_SECURE_SMMU_CB17_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_IPAFAR_HIGH_OFST))
7912 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
7913 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIVA_LOW_OFST))
7914 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
7915 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIVA_HIGH_OFST))
7916 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
7917 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIVAA_LOW_OFST))
7918 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
7919 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIVAA_HIGH_OFST))
7920 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIASID register for the ALT_SMMU_SECURE instance. */
7921 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIASID_OFST))
7922 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIALL register for the ALT_SMMU_SECURE instance. */
7923 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIALL_OFST))
7924 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
7925 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIVAL_LOW_OFST))
7926 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
7927 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIVAL_HIGH_OFST))
7928 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
7929 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIVAAL_LOW_OFST))
7930 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
7931 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIVAAL_HIGH_OFST))
7932 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
7933 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIIPAS2_LOW_OFST))
7934 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
7935 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIIPAS2_HIGH_OFST))
7936 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
7937 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIIPAS2L_LOW_OFST))
7938 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
7939 #define ALT_SMMU_SECURE_SMMU_CB17_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBIIPAS2L_HIGH_OFST))
7940 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBSYNC register for the ALT_SMMU_SECURE instance. */
7941 #define ALT_SMMU_SECURE_SMMU_CB17_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBSYNC_OFST))
7942 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
7943 #define ALT_SMMU_SECURE_SMMU_CB17_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_TLBSTATUS_OFST))
7944 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
7945 #define ALT_SMMU_SECURE_SMMU_CB17_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMEVCNTR0_OFST))
7946 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
7947 #define ALT_SMMU_SECURE_SMMU_CB17_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMEVCNTR1_OFST))
7948 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
7949 #define ALT_SMMU_SECURE_SMMU_CB17_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMEVCNTR2_OFST))
7950 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
7951 #define ALT_SMMU_SECURE_SMMU_CB17_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMEVCNTR3_OFST))
7952 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
7953 #define ALT_SMMU_SECURE_SMMU_CB17_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMEVTYPER0_OFST))
7954 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
7955 #define ALT_SMMU_SECURE_SMMU_CB17_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMEVTYPER1_OFST))
7956 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
7957 #define ALT_SMMU_SECURE_SMMU_CB17_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMEVTYPER2_OFST))
7958 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
7959 #define ALT_SMMU_SECURE_SMMU_CB17_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMEVTYPER3_OFST))
7960 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMCFGR register for the ALT_SMMU_SECURE instance. */
7961 #define ALT_SMMU_SECURE_SMMU_CB17_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMCFGR_OFST))
7962 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMCR register for the ALT_SMMU_SECURE instance. */
7963 #define ALT_SMMU_SECURE_SMMU_CB17_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMCR_OFST))
7964 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMCEID register for the ALT_SMMU_SECURE instance. */
7965 #define ALT_SMMU_SECURE_SMMU_CB17_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMCEID_OFST))
7966 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
7967 #define ALT_SMMU_SECURE_SMMU_CB17_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMCNTENSE_OFST))
7968 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
7969 #define ALT_SMMU_SECURE_SMMU_CB17_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMCNTENCLR_OFST))
7970 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
7971 #define ALT_SMMU_SECURE_SMMU_CB17_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMCNTENSET_OFST))
7972 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
7973 #define ALT_SMMU_SECURE_SMMU_CB17_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMINTENCLR_OFST))
7974 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
7975 #define ALT_SMMU_SECURE_SMMU_CB17_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMOVSCLR_OFST))
7976 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMOVSSET register for the ALT_SMMU_SECURE instance. */
7977 #define ALT_SMMU_SECURE_SMMU_CB17_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMOVSSET_OFST))
7978 /* The address of the ALT_SMMU_SECURE_SMMU_CB17_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
7979 #define ALT_SMMU_SECURE_SMMU_CB17_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB17_PMAUTHSTATUS_OFST))
7980 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_SCTLR register for the ALT_SMMU_SECURE instance. */
7981 #define ALT_SMMU_SECURE_SMMU_CB18_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_SCTLR_OFST))
7982 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_ACTLR register for the ALT_SMMU_SECURE instance. */
7983 #define ALT_SMMU_SECURE_SMMU_CB18_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_ACTLR_OFST))
7984 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_RESUME register for the ALT_SMMU_SECURE instance. */
7985 #define ALT_SMMU_SECURE_SMMU_CB18_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_RESUME_OFST))
7986 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TCR2 register for the ALT_SMMU_SECURE instance. */
7987 #define ALT_SMMU_SECURE_SMMU_CB18_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TCR2_OFST))
7988 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
7989 #define ALT_SMMU_SECURE_SMMU_CB18_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TTBR0_LOW_OFST))
7990 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
7991 #define ALT_SMMU_SECURE_SMMU_CB18_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TTBR0_HIGH_OFST))
7992 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
7993 #define ALT_SMMU_SECURE_SMMU_CB18_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TTBR1_LOW_OFST))
7994 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
7995 #define ALT_SMMU_SECURE_SMMU_CB18_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TTBR1_HIGH_OFST))
7996 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
7997 #define ALT_SMMU_SECURE_SMMU_CB18_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TCR_LPAE_OFST))
7998 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
7999 #define ALT_SMMU_SECURE_SMMU_CB18_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_CONTEXTIDR_OFST))
8000 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
8001 #define ALT_SMMU_SECURE_SMMU_CB18_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PRRR_MAIR0_OFST))
8002 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
8003 #define ALT_SMMU_SECURE_SMMU_CB18_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_NMRR_MAIR1_OFST))
8004 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_FSR register for the ALT_SMMU_SECURE instance. */
8005 #define ALT_SMMU_SECURE_SMMU_CB18_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_FSR_OFST))
8006 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
8007 #define ALT_SMMU_SECURE_SMMU_CB18_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_FSRRESTORE_OFST))
8008 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_FAR_LOW register for the ALT_SMMU_SECURE instance. */
8009 #define ALT_SMMU_SECURE_SMMU_CB18_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_FAR_LOW_OFST))
8010 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
8011 #define ALT_SMMU_SECURE_SMMU_CB18_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_FAR_HIGH_OFST))
8012 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_FSYNR0 register for the ALT_SMMU_SECURE instance. */
8013 #define ALT_SMMU_SECURE_SMMU_CB18_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_FSYNR0_OFST))
8014 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
8015 #define ALT_SMMU_SECURE_SMMU_CB18_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_IPAFAR_LOW_OFST))
8016 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
8017 #define ALT_SMMU_SECURE_SMMU_CB18_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_IPAFAR_HIGH_OFST))
8018 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
8019 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIVA_LOW_OFST))
8020 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
8021 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIVA_HIGH_OFST))
8022 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
8023 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIVAA_LOW_OFST))
8024 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
8025 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIVAA_HIGH_OFST))
8026 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIASID register for the ALT_SMMU_SECURE instance. */
8027 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIASID_OFST))
8028 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIALL register for the ALT_SMMU_SECURE instance. */
8029 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIALL_OFST))
8030 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
8031 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIVAL_LOW_OFST))
8032 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
8033 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIVAL_HIGH_OFST))
8034 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
8035 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIVAAL_LOW_OFST))
8036 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
8037 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIVAAL_HIGH_OFST))
8038 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
8039 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIIPAS2_LOW_OFST))
8040 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
8041 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIIPAS2_HIGH_OFST))
8042 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
8043 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIIPAS2L_LOW_OFST))
8044 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
8045 #define ALT_SMMU_SECURE_SMMU_CB18_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBIIPAS2L_HIGH_OFST))
8046 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBSYNC register for the ALT_SMMU_SECURE instance. */
8047 #define ALT_SMMU_SECURE_SMMU_CB18_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBSYNC_OFST))
8048 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
8049 #define ALT_SMMU_SECURE_SMMU_CB18_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_TLBSTATUS_OFST))
8050 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
8051 #define ALT_SMMU_SECURE_SMMU_CB18_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMEVCNTR0_OFST))
8052 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
8053 #define ALT_SMMU_SECURE_SMMU_CB18_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMEVCNTR1_OFST))
8054 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
8055 #define ALT_SMMU_SECURE_SMMU_CB18_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMEVCNTR2_OFST))
8056 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
8057 #define ALT_SMMU_SECURE_SMMU_CB18_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMEVCNTR3_OFST))
8058 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
8059 #define ALT_SMMU_SECURE_SMMU_CB18_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMEVTYPER0_OFST))
8060 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
8061 #define ALT_SMMU_SECURE_SMMU_CB18_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMEVTYPER1_OFST))
8062 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
8063 #define ALT_SMMU_SECURE_SMMU_CB18_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMEVTYPER2_OFST))
8064 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
8065 #define ALT_SMMU_SECURE_SMMU_CB18_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMEVTYPER3_OFST))
8066 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMCFGR register for the ALT_SMMU_SECURE instance. */
8067 #define ALT_SMMU_SECURE_SMMU_CB18_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMCFGR_OFST))
8068 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMCR register for the ALT_SMMU_SECURE instance. */
8069 #define ALT_SMMU_SECURE_SMMU_CB18_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMCR_OFST))
8070 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMCEID register for the ALT_SMMU_SECURE instance. */
8071 #define ALT_SMMU_SECURE_SMMU_CB18_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMCEID_OFST))
8072 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
8073 #define ALT_SMMU_SECURE_SMMU_CB18_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMCNTENSE_OFST))
8074 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
8075 #define ALT_SMMU_SECURE_SMMU_CB18_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMCNTENCLR_OFST))
8076 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
8077 #define ALT_SMMU_SECURE_SMMU_CB18_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMCNTENSET_OFST))
8078 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
8079 #define ALT_SMMU_SECURE_SMMU_CB18_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMINTENCLR_OFST))
8080 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
8081 #define ALT_SMMU_SECURE_SMMU_CB18_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMOVSCLR_OFST))
8082 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMOVSSET register for the ALT_SMMU_SECURE instance. */
8083 #define ALT_SMMU_SECURE_SMMU_CB18_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMOVSSET_OFST))
8084 /* The address of the ALT_SMMU_SECURE_SMMU_CB18_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
8085 #define ALT_SMMU_SECURE_SMMU_CB18_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB18_PMAUTHSTATUS_OFST))
8086 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_SCTLR register for the ALT_SMMU_SECURE instance. */
8087 #define ALT_SMMU_SECURE_SMMU_CB19_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_SCTLR_OFST))
8088 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_ACTLR register for the ALT_SMMU_SECURE instance. */
8089 #define ALT_SMMU_SECURE_SMMU_CB19_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_ACTLR_OFST))
8090 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_RESUME register for the ALT_SMMU_SECURE instance. */
8091 #define ALT_SMMU_SECURE_SMMU_CB19_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_RESUME_OFST))
8092 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TCR2 register for the ALT_SMMU_SECURE instance. */
8093 #define ALT_SMMU_SECURE_SMMU_CB19_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TCR2_OFST))
8094 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
8095 #define ALT_SMMU_SECURE_SMMU_CB19_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TTBR0_LOW_OFST))
8096 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
8097 #define ALT_SMMU_SECURE_SMMU_CB19_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TTBR0_HIGH_OFST))
8098 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
8099 #define ALT_SMMU_SECURE_SMMU_CB19_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TTBR1_LOW_OFST))
8100 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
8101 #define ALT_SMMU_SECURE_SMMU_CB19_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TTBR1_HIGH_OFST))
8102 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
8103 #define ALT_SMMU_SECURE_SMMU_CB19_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TCR_LPAE_OFST))
8104 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
8105 #define ALT_SMMU_SECURE_SMMU_CB19_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_CONTEXTIDR_OFST))
8106 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
8107 #define ALT_SMMU_SECURE_SMMU_CB19_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PRRR_MAIR0_OFST))
8108 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
8109 #define ALT_SMMU_SECURE_SMMU_CB19_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_NMRR_MAIR1_OFST))
8110 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_FSR register for the ALT_SMMU_SECURE instance. */
8111 #define ALT_SMMU_SECURE_SMMU_CB19_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_FSR_OFST))
8112 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
8113 #define ALT_SMMU_SECURE_SMMU_CB19_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_FSRRESTORE_OFST))
8114 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_FAR_LOW register for the ALT_SMMU_SECURE instance. */
8115 #define ALT_SMMU_SECURE_SMMU_CB19_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_FAR_LOW_OFST))
8116 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
8117 #define ALT_SMMU_SECURE_SMMU_CB19_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_FAR_HIGH_OFST))
8118 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_FSYNR0 register for the ALT_SMMU_SECURE instance. */
8119 #define ALT_SMMU_SECURE_SMMU_CB19_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_FSYNR0_OFST))
8120 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
8121 #define ALT_SMMU_SECURE_SMMU_CB19_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_IPAFAR_LOW_OFST))
8122 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
8123 #define ALT_SMMU_SECURE_SMMU_CB19_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_IPAFAR_HIGH_OFST))
8124 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
8125 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIVA_LOW_OFST))
8126 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
8127 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIVA_HIGH_OFST))
8128 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
8129 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIVAA_LOW_OFST))
8130 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
8131 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIVAA_HIGH_OFST))
8132 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIASID register for the ALT_SMMU_SECURE instance. */
8133 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIASID_OFST))
8134 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIALL register for the ALT_SMMU_SECURE instance. */
8135 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIALL_OFST))
8136 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
8137 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIVAL_LOW_OFST))
8138 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
8139 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIVAL_HIGH_OFST))
8140 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
8141 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIVAAL_LOW_OFST))
8142 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
8143 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIVAAL_HIGH_OFST))
8144 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
8145 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIIPAS2_LOW_OFST))
8146 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
8147 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIIPAS2_HIGH_OFST))
8148 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
8149 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIIPAS2L_LOW_OFST))
8150 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
8151 #define ALT_SMMU_SECURE_SMMU_CB19_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBIIPAS2L_HIGH_OFST))
8152 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBSYNC register for the ALT_SMMU_SECURE instance. */
8153 #define ALT_SMMU_SECURE_SMMU_CB19_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBSYNC_OFST))
8154 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
8155 #define ALT_SMMU_SECURE_SMMU_CB19_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_TLBSTATUS_OFST))
8156 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
8157 #define ALT_SMMU_SECURE_SMMU_CB19_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMEVCNTR0_OFST))
8158 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
8159 #define ALT_SMMU_SECURE_SMMU_CB19_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMEVCNTR1_OFST))
8160 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
8161 #define ALT_SMMU_SECURE_SMMU_CB19_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMEVCNTR2_OFST))
8162 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
8163 #define ALT_SMMU_SECURE_SMMU_CB19_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMEVCNTR3_OFST))
8164 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
8165 #define ALT_SMMU_SECURE_SMMU_CB19_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMEVTYPER0_OFST))
8166 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
8167 #define ALT_SMMU_SECURE_SMMU_CB19_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMEVTYPER1_OFST))
8168 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
8169 #define ALT_SMMU_SECURE_SMMU_CB19_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMEVTYPER2_OFST))
8170 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
8171 #define ALT_SMMU_SECURE_SMMU_CB19_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMEVTYPER3_OFST))
8172 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMCFGR register for the ALT_SMMU_SECURE instance. */
8173 #define ALT_SMMU_SECURE_SMMU_CB19_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMCFGR_OFST))
8174 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMCR register for the ALT_SMMU_SECURE instance. */
8175 #define ALT_SMMU_SECURE_SMMU_CB19_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMCR_OFST))
8176 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMCEID register for the ALT_SMMU_SECURE instance. */
8177 #define ALT_SMMU_SECURE_SMMU_CB19_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMCEID_OFST))
8178 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
8179 #define ALT_SMMU_SECURE_SMMU_CB19_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMCNTENSE_OFST))
8180 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
8181 #define ALT_SMMU_SECURE_SMMU_CB19_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMCNTENCLR_OFST))
8182 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
8183 #define ALT_SMMU_SECURE_SMMU_CB19_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMCNTENSET_OFST))
8184 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
8185 #define ALT_SMMU_SECURE_SMMU_CB19_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMINTENCLR_OFST))
8186 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
8187 #define ALT_SMMU_SECURE_SMMU_CB19_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMOVSCLR_OFST))
8188 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMOVSSET register for the ALT_SMMU_SECURE instance. */
8189 #define ALT_SMMU_SECURE_SMMU_CB19_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMOVSSET_OFST))
8190 /* The address of the ALT_SMMU_SECURE_SMMU_CB19_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
8191 #define ALT_SMMU_SECURE_SMMU_CB19_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB19_PMAUTHSTATUS_OFST))
8192 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_SCTLR register for the ALT_SMMU_SECURE instance. */
8193 #define ALT_SMMU_SECURE_SMMU_CB20_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_SCTLR_OFST))
8194 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_ACTLR register for the ALT_SMMU_SECURE instance. */
8195 #define ALT_SMMU_SECURE_SMMU_CB20_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_ACTLR_OFST))
8196 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_RESUME register for the ALT_SMMU_SECURE instance. */
8197 #define ALT_SMMU_SECURE_SMMU_CB20_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_RESUME_OFST))
8198 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TCR2 register for the ALT_SMMU_SECURE instance. */
8199 #define ALT_SMMU_SECURE_SMMU_CB20_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TCR2_OFST))
8200 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
8201 #define ALT_SMMU_SECURE_SMMU_CB20_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TTBR0_LOW_OFST))
8202 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
8203 #define ALT_SMMU_SECURE_SMMU_CB20_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TTBR0_HIGH_OFST))
8204 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
8205 #define ALT_SMMU_SECURE_SMMU_CB20_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TTBR1_LOW_OFST))
8206 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
8207 #define ALT_SMMU_SECURE_SMMU_CB20_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TTBR1_HIGH_OFST))
8208 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
8209 #define ALT_SMMU_SECURE_SMMU_CB20_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TCR_LPAE_OFST))
8210 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
8211 #define ALT_SMMU_SECURE_SMMU_CB20_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_CONTEXTIDR_OFST))
8212 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
8213 #define ALT_SMMU_SECURE_SMMU_CB20_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PRRR_MAIR0_OFST))
8214 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
8215 #define ALT_SMMU_SECURE_SMMU_CB20_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_NMRR_MAIR1_OFST))
8216 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_FSR register for the ALT_SMMU_SECURE instance. */
8217 #define ALT_SMMU_SECURE_SMMU_CB20_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_FSR_OFST))
8218 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
8219 #define ALT_SMMU_SECURE_SMMU_CB20_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_FSRRESTORE_OFST))
8220 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_FAR_LOW register for the ALT_SMMU_SECURE instance. */
8221 #define ALT_SMMU_SECURE_SMMU_CB20_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_FAR_LOW_OFST))
8222 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
8223 #define ALT_SMMU_SECURE_SMMU_CB20_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_FAR_HIGH_OFST))
8224 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_FSYNR0 register for the ALT_SMMU_SECURE instance. */
8225 #define ALT_SMMU_SECURE_SMMU_CB20_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_FSYNR0_OFST))
8226 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
8227 #define ALT_SMMU_SECURE_SMMU_CB20_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_IPAFAR_LOW_OFST))
8228 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
8229 #define ALT_SMMU_SECURE_SMMU_CB20_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_IPAFAR_HIGH_OFST))
8230 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
8231 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIVA_LOW_OFST))
8232 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
8233 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIVA_HIGH_OFST))
8234 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
8235 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIVAA_LOW_OFST))
8236 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
8237 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIVAA_HIGH_OFST))
8238 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIASID register for the ALT_SMMU_SECURE instance. */
8239 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIASID_OFST))
8240 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIALL register for the ALT_SMMU_SECURE instance. */
8241 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIALL_OFST))
8242 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
8243 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIVAL_LOW_OFST))
8244 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
8245 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIVAL_HIGH_OFST))
8246 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
8247 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIVAAL_LOW_OFST))
8248 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
8249 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIVAAL_HIGH_OFST))
8250 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
8251 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIIPAS2_LOW_OFST))
8252 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
8253 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIIPAS2_HIGH_OFST))
8254 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
8255 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIIPAS2L_LOW_OFST))
8256 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
8257 #define ALT_SMMU_SECURE_SMMU_CB20_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBIIPAS2L_HIGH_OFST))
8258 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBSYNC register for the ALT_SMMU_SECURE instance. */
8259 #define ALT_SMMU_SECURE_SMMU_CB20_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBSYNC_OFST))
8260 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
8261 #define ALT_SMMU_SECURE_SMMU_CB20_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_TLBSTATUS_OFST))
8262 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
8263 #define ALT_SMMU_SECURE_SMMU_CB20_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMEVCNTR0_OFST))
8264 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
8265 #define ALT_SMMU_SECURE_SMMU_CB20_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMEVCNTR1_OFST))
8266 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
8267 #define ALT_SMMU_SECURE_SMMU_CB20_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMEVCNTR2_OFST))
8268 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
8269 #define ALT_SMMU_SECURE_SMMU_CB20_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMEVCNTR3_OFST))
8270 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
8271 #define ALT_SMMU_SECURE_SMMU_CB20_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMEVTYPER0_OFST))
8272 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
8273 #define ALT_SMMU_SECURE_SMMU_CB20_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMEVTYPER1_OFST))
8274 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
8275 #define ALT_SMMU_SECURE_SMMU_CB20_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMEVTYPER2_OFST))
8276 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
8277 #define ALT_SMMU_SECURE_SMMU_CB20_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMEVTYPER3_OFST))
8278 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMCFGR register for the ALT_SMMU_SECURE instance. */
8279 #define ALT_SMMU_SECURE_SMMU_CB20_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMCFGR_OFST))
8280 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMCR register for the ALT_SMMU_SECURE instance. */
8281 #define ALT_SMMU_SECURE_SMMU_CB20_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMCR_OFST))
8282 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMCEID register for the ALT_SMMU_SECURE instance. */
8283 #define ALT_SMMU_SECURE_SMMU_CB20_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMCEID_OFST))
8284 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
8285 #define ALT_SMMU_SECURE_SMMU_CB20_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMCNTENSE_OFST))
8286 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
8287 #define ALT_SMMU_SECURE_SMMU_CB20_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMCNTENCLR_OFST))
8288 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
8289 #define ALT_SMMU_SECURE_SMMU_CB20_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMCNTENSET_OFST))
8290 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
8291 #define ALT_SMMU_SECURE_SMMU_CB20_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMINTENCLR_OFST))
8292 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
8293 #define ALT_SMMU_SECURE_SMMU_CB20_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMOVSCLR_OFST))
8294 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMOVSSET register for the ALT_SMMU_SECURE instance. */
8295 #define ALT_SMMU_SECURE_SMMU_CB20_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMOVSSET_OFST))
8296 /* The address of the ALT_SMMU_SECURE_SMMU_CB20_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
8297 #define ALT_SMMU_SECURE_SMMU_CB20_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB20_PMAUTHSTATUS_OFST))
8298 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_SCTLR register for the ALT_SMMU_SECURE instance. */
8299 #define ALT_SMMU_SECURE_SMMU_CB21_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_SCTLR_OFST))
8300 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_ACTLR register for the ALT_SMMU_SECURE instance. */
8301 #define ALT_SMMU_SECURE_SMMU_CB21_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_ACTLR_OFST))
8302 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_RESUME register for the ALT_SMMU_SECURE instance. */
8303 #define ALT_SMMU_SECURE_SMMU_CB21_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_RESUME_OFST))
8304 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TCR2 register for the ALT_SMMU_SECURE instance. */
8305 #define ALT_SMMU_SECURE_SMMU_CB21_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TCR2_OFST))
8306 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
8307 #define ALT_SMMU_SECURE_SMMU_CB21_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TTBR0_LOW_OFST))
8308 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
8309 #define ALT_SMMU_SECURE_SMMU_CB21_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TTBR0_HIGH_OFST))
8310 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
8311 #define ALT_SMMU_SECURE_SMMU_CB21_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TTBR1_LOW_OFST))
8312 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
8313 #define ALT_SMMU_SECURE_SMMU_CB21_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TTBR1_HIGH_OFST))
8314 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
8315 #define ALT_SMMU_SECURE_SMMU_CB21_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TCR_LPAE_OFST))
8316 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
8317 #define ALT_SMMU_SECURE_SMMU_CB21_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_CONTEXTIDR_OFST))
8318 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
8319 #define ALT_SMMU_SECURE_SMMU_CB21_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PRRR_MAIR0_OFST))
8320 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
8321 #define ALT_SMMU_SECURE_SMMU_CB21_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_NMRR_MAIR1_OFST))
8322 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_FSR register for the ALT_SMMU_SECURE instance. */
8323 #define ALT_SMMU_SECURE_SMMU_CB21_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_FSR_OFST))
8324 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
8325 #define ALT_SMMU_SECURE_SMMU_CB21_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_FSRRESTORE_OFST))
8326 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_FAR_LOW register for the ALT_SMMU_SECURE instance. */
8327 #define ALT_SMMU_SECURE_SMMU_CB21_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_FAR_LOW_OFST))
8328 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
8329 #define ALT_SMMU_SECURE_SMMU_CB21_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_FAR_HIGH_OFST))
8330 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_FSYNR0 register for the ALT_SMMU_SECURE instance. */
8331 #define ALT_SMMU_SECURE_SMMU_CB21_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_FSYNR0_OFST))
8332 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
8333 #define ALT_SMMU_SECURE_SMMU_CB21_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_IPAFAR_LOW_OFST))
8334 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
8335 #define ALT_SMMU_SECURE_SMMU_CB21_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_IPAFAR_HIGH_OFST))
8336 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
8337 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIVA_LOW_OFST))
8338 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
8339 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIVA_HIGH_OFST))
8340 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
8341 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIVAA_LOW_OFST))
8342 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
8343 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIVAA_HIGH_OFST))
8344 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIASID register for the ALT_SMMU_SECURE instance. */
8345 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIASID_OFST))
8346 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIALL register for the ALT_SMMU_SECURE instance. */
8347 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIALL_OFST))
8348 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
8349 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIVAL_LOW_OFST))
8350 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
8351 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIVAL_HIGH_OFST))
8352 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
8353 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIVAAL_LOW_OFST))
8354 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
8355 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIVAAL_HIGH_OFST))
8356 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
8357 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIIPAS2_LOW_OFST))
8358 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
8359 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIIPAS2_HIGH_OFST))
8360 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
8361 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIIPAS2L_LOW_OFST))
8362 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
8363 #define ALT_SMMU_SECURE_SMMU_CB21_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBIIPAS2L_HIGH_OFST))
8364 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBSYNC register for the ALT_SMMU_SECURE instance. */
8365 #define ALT_SMMU_SECURE_SMMU_CB21_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBSYNC_OFST))
8366 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
8367 #define ALT_SMMU_SECURE_SMMU_CB21_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_TLBSTATUS_OFST))
8368 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
8369 #define ALT_SMMU_SECURE_SMMU_CB21_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMEVCNTR0_OFST))
8370 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
8371 #define ALT_SMMU_SECURE_SMMU_CB21_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMEVCNTR1_OFST))
8372 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
8373 #define ALT_SMMU_SECURE_SMMU_CB21_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMEVCNTR2_OFST))
8374 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
8375 #define ALT_SMMU_SECURE_SMMU_CB21_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMEVCNTR3_OFST))
8376 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
8377 #define ALT_SMMU_SECURE_SMMU_CB21_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMEVTYPER0_OFST))
8378 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
8379 #define ALT_SMMU_SECURE_SMMU_CB21_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMEVTYPER1_OFST))
8380 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
8381 #define ALT_SMMU_SECURE_SMMU_CB21_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMEVTYPER2_OFST))
8382 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
8383 #define ALT_SMMU_SECURE_SMMU_CB21_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMEVTYPER3_OFST))
8384 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMCFGR register for the ALT_SMMU_SECURE instance. */
8385 #define ALT_SMMU_SECURE_SMMU_CB21_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMCFGR_OFST))
8386 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMCR register for the ALT_SMMU_SECURE instance. */
8387 #define ALT_SMMU_SECURE_SMMU_CB21_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMCR_OFST))
8388 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMCEID register for the ALT_SMMU_SECURE instance. */
8389 #define ALT_SMMU_SECURE_SMMU_CB21_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMCEID_OFST))
8390 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
8391 #define ALT_SMMU_SECURE_SMMU_CB21_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMCNTENSE_OFST))
8392 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
8393 #define ALT_SMMU_SECURE_SMMU_CB21_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMCNTENCLR_OFST))
8394 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
8395 #define ALT_SMMU_SECURE_SMMU_CB21_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMCNTENSET_OFST))
8396 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
8397 #define ALT_SMMU_SECURE_SMMU_CB21_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMINTENCLR_OFST))
8398 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
8399 #define ALT_SMMU_SECURE_SMMU_CB21_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMOVSCLR_OFST))
8400 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMOVSSET register for the ALT_SMMU_SECURE instance. */
8401 #define ALT_SMMU_SECURE_SMMU_CB21_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMOVSSET_OFST))
8402 /* The address of the ALT_SMMU_SECURE_SMMU_CB21_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
8403 #define ALT_SMMU_SECURE_SMMU_CB21_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB21_PMAUTHSTATUS_OFST))
8404 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_SCTLR register for the ALT_SMMU_SECURE instance. */
8405 #define ALT_SMMU_SECURE_SMMU_CB22_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_SCTLR_OFST))
8406 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_ACTLR register for the ALT_SMMU_SECURE instance. */
8407 #define ALT_SMMU_SECURE_SMMU_CB22_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_ACTLR_OFST))
8408 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_RESUME register for the ALT_SMMU_SECURE instance. */
8409 #define ALT_SMMU_SECURE_SMMU_CB22_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_RESUME_OFST))
8410 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TCR2 register for the ALT_SMMU_SECURE instance. */
8411 #define ALT_SMMU_SECURE_SMMU_CB22_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TCR2_OFST))
8412 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
8413 #define ALT_SMMU_SECURE_SMMU_CB22_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TTBR0_LOW_OFST))
8414 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
8415 #define ALT_SMMU_SECURE_SMMU_CB22_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TTBR0_HIGH_OFST))
8416 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
8417 #define ALT_SMMU_SECURE_SMMU_CB22_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TTBR1_LOW_OFST))
8418 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
8419 #define ALT_SMMU_SECURE_SMMU_CB22_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TTBR1_HIGH_OFST))
8420 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
8421 #define ALT_SMMU_SECURE_SMMU_CB22_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TCR_LPAE_OFST))
8422 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
8423 #define ALT_SMMU_SECURE_SMMU_CB22_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_CONTEXTIDR_OFST))
8424 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
8425 #define ALT_SMMU_SECURE_SMMU_CB22_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PRRR_MAIR0_OFST))
8426 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
8427 #define ALT_SMMU_SECURE_SMMU_CB22_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_NMRR_MAIR1_OFST))
8428 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_FSR register for the ALT_SMMU_SECURE instance. */
8429 #define ALT_SMMU_SECURE_SMMU_CB22_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_FSR_OFST))
8430 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
8431 #define ALT_SMMU_SECURE_SMMU_CB22_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_FSRRESTORE_OFST))
8432 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_FAR_LOW register for the ALT_SMMU_SECURE instance. */
8433 #define ALT_SMMU_SECURE_SMMU_CB22_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_FAR_LOW_OFST))
8434 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
8435 #define ALT_SMMU_SECURE_SMMU_CB22_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_FAR_HIGH_OFST))
8436 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_FSYNR0 register for the ALT_SMMU_SECURE instance. */
8437 #define ALT_SMMU_SECURE_SMMU_CB22_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_FSYNR0_OFST))
8438 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
8439 #define ALT_SMMU_SECURE_SMMU_CB22_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_IPAFAR_LOW_OFST))
8440 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
8441 #define ALT_SMMU_SECURE_SMMU_CB22_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_IPAFAR_HIGH_OFST))
8442 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
8443 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIVA_LOW_OFST))
8444 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
8445 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIVA_HIGH_OFST))
8446 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
8447 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIVAA_LOW_OFST))
8448 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
8449 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIVAA_HIGH_OFST))
8450 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIASID register for the ALT_SMMU_SECURE instance. */
8451 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIASID_OFST))
8452 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIALL register for the ALT_SMMU_SECURE instance. */
8453 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIALL_OFST))
8454 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
8455 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIVAL_LOW_OFST))
8456 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
8457 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIVAL_HIGH_OFST))
8458 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
8459 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIVAAL_LOW_OFST))
8460 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
8461 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIVAAL_HIGH_OFST))
8462 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
8463 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIIPAS2_LOW_OFST))
8464 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
8465 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIIPAS2_HIGH_OFST))
8466 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
8467 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIIPAS2L_LOW_OFST))
8468 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
8469 #define ALT_SMMU_SECURE_SMMU_CB22_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBIIPAS2L_HIGH_OFST))
8470 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBSYNC register for the ALT_SMMU_SECURE instance. */
8471 #define ALT_SMMU_SECURE_SMMU_CB22_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBSYNC_OFST))
8472 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
8473 #define ALT_SMMU_SECURE_SMMU_CB22_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_TLBSTATUS_OFST))
8474 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
8475 #define ALT_SMMU_SECURE_SMMU_CB22_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMEVCNTR0_OFST))
8476 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
8477 #define ALT_SMMU_SECURE_SMMU_CB22_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMEVCNTR1_OFST))
8478 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
8479 #define ALT_SMMU_SECURE_SMMU_CB22_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMEVCNTR2_OFST))
8480 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
8481 #define ALT_SMMU_SECURE_SMMU_CB22_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMEVCNTR3_OFST))
8482 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
8483 #define ALT_SMMU_SECURE_SMMU_CB22_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMEVTYPER0_OFST))
8484 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
8485 #define ALT_SMMU_SECURE_SMMU_CB22_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMEVTYPER1_OFST))
8486 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
8487 #define ALT_SMMU_SECURE_SMMU_CB22_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMEVTYPER2_OFST))
8488 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
8489 #define ALT_SMMU_SECURE_SMMU_CB22_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMEVTYPER3_OFST))
8490 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMCFGR register for the ALT_SMMU_SECURE instance. */
8491 #define ALT_SMMU_SECURE_SMMU_CB22_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMCFGR_OFST))
8492 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMCR register for the ALT_SMMU_SECURE instance. */
8493 #define ALT_SMMU_SECURE_SMMU_CB22_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMCR_OFST))
8494 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMCEID register for the ALT_SMMU_SECURE instance. */
8495 #define ALT_SMMU_SECURE_SMMU_CB22_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMCEID_OFST))
8496 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
8497 #define ALT_SMMU_SECURE_SMMU_CB22_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMCNTENSE_OFST))
8498 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
8499 #define ALT_SMMU_SECURE_SMMU_CB22_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMCNTENCLR_OFST))
8500 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
8501 #define ALT_SMMU_SECURE_SMMU_CB22_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMCNTENSET_OFST))
8502 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
8503 #define ALT_SMMU_SECURE_SMMU_CB22_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMINTENCLR_OFST))
8504 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
8505 #define ALT_SMMU_SECURE_SMMU_CB22_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMOVSCLR_OFST))
8506 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMOVSSET register for the ALT_SMMU_SECURE instance. */
8507 #define ALT_SMMU_SECURE_SMMU_CB22_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMOVSSET_OFST))
8508 /* The address of the ALT_SMMU_SECURE_SMMU_CB22_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
8509 #define ALT_SMMU_SECURE_SMMU_CB22_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB22_PMAUTHSTATUS_OFST))
8510 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_SCTLR register for the ALT_SMMU_SECURE instance. */
8511 #define ALT_SMMU_SECURE_SMMU_CB23_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_SCTLR_OFST))
8512 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_ACTLR register for the ALT_SMMU_SECURE instance. */
8513 #define ALT_SMMU_SECURE_SMMU_CB23_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_ACTLR_OFST))
8514 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_RESUME register for the ALT_SMMU_SECURE instance. */
8515 #define ALT_SMMU_SECURE_SMMU_CB23_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_RESUME_OFST))
8516 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TCR2 register for the ALT_SMMU_SECURE instance. */
8517 #define ALT_SMMU_SECURE_SMMU_CB23_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TCR2_OFST))
8518 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
8519 #define ALT_SMMU_SECURE_SMMU_CB23_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TTBR0_LOW_OFST))
8520 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
8521 #define ALT_SMMU_SECURE_SMMU_CB23_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TTBR0_HIGH_OFST))
8522 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
8523 #define ALT_SMMU_SECURE_SMMU_CB23_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TTBR1_LOW_OFST))
8524 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
8525 #define ALT_SMMU_SECURE_SMMU_CB23_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TTBR1_HIGH_OFST))
8526 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
8527 #define ALT_SMMU_SECURE_SMMU_CB23_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TCR_LPAE_OFST))
8528 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
8529 #define ALT_SMMU_SECURE_SMMU_CB23_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_CONTEXTIDR_OFST))
8530 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
8531 #define ALT_SMMU_SECURE_SMMU_CB23_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PRRR_MAIR0_OFST))
8532 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
8533 #define ALT_SMMU_SECURE_SMMU_CB23_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_NMRR_MAIR1_OFST))
8534 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_FSR register for the ALT_SMMU_SECURE instance. */
8535 #define ALT_SMMU_SECURE_SMMU_CB23_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_FSR_OFST))
8536 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
8537 #define ALT_SMMU_SECURE_SMMU_CB23_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_FSRRESTORE_OFST))
8538 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_FAR_LOW register for the ALT_SMMU_SECURE instance. */
8539 #define ALT_SMMU_SECURE_SMMU_CB23_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_FAR_LOW_OFST))
8540 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
8541 #define ALT_SMMU_SECURE_SMMU_CB23_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_FAR_HIGH_OFST))
8542 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_FSYNR0 register for the ALT_SMMU_SECURE instance. */
8543 #define ALT_SMMU_SECURE_SMMU_CB23_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_FSYNR0_OFST))
8544 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
8545 #define ALT_SMMU_SECURE_SMMU_CB23_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_IPAFAR_LOW_OFST))
8546 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
8547 #define ALT_SMMU_SECURE_SMMU_CB23_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_IPAFAR_HIGH_OFST))
8548 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
8549 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIVA_LOW_OFST))
8550 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
8551 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIVA_HIGH_OFST))
8552 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
8553 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIVAA_LOW_OFST))
8554 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
8555 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIVAA_HIGH_OFST))
8556 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIASID register for the ALT_SMMU_SECURE instance. */
8557 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIASID_OFST))
8558 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIALL register for the ALT_SMMU_SECURE instance. */
8559 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIALL_OFST))
8560 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
8561 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIVAL_LOW_OFST))
8562 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
8563 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIVAL_HIGH_OFST))
8564 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
8565 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIVAAL_LOW_OFST))
8566 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
8567 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIVAAL_HIGH_OFST))
8568 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
8569 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIIPAS2_LOW_OFST))
8570 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
8571 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIIPAS2_HIGH_OFST))
8572 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
8573 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIIPAS2L_LOW_OFST))
8574 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
8575 #define ALT_SMMU_SECURE_SMMU_CB23_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBIIPAS2L_HIGH_OFST))
8576 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBSYNC register for the ALT_SMMU_SECURE instance. */
8577 #define ALT_SMMU_SECURE_SMMU_CB23_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBSYNC_OFST))
8578 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
8579 #define ALT_SMMU_SECURE_SMMU_CB23_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_TLBSTATUS_OFST))
8580 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
8581 #define ALT_SMMU_SECURE_SMMU_CB23_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMEVCNTR0_OFST))
8582 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
8583 #define ALT_SMMU_SECURE_SMMU_CB23_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMEVCNTR1_OFST))
8584 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
8585 #define ALT_SMMU_SECURE_SMMU_CB23_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMEVCNTR2_OFST))
8586 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
8587 #define ALT_SMMU_SECURE_SMMU_CB23_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMEVCNTR3_OFST))
8588 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
8589 #define ALT_SMMU_SECURE_SMMU_CB23_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMEVTYPER0_OFST))
8590 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
8591 #define ALT_SMMU_SECURE_SMMU_CB23_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMEVTYPER1_OFST))
8592 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
8593 #define ALT_SMMU_SECURE_SMMU_CB23_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMEVTYPER2_OFST))
8594 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
8595 #define ALT_SMMU_SECURE_SMMU_CB23_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMEVTYPER3_OFST))
8596 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMCFGR register for the ALT_SMMU_SECURE instance. */
8597 #define ALT_SMMU_SECURE_SMMU_CB23_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMCFGR_OFST))
8598 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMCR register for the ALT_SMMU_SECURE instance. */
8599 #define ALT_SMMU_SECURE_SMMU_CB23_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMCR_OFST))
8600 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMCEID register for the ALT_SMMU_SECURE instance. */
8601 #define ALT_SMMU_SECURE_SMMU_CB23_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMCEID_OFST))
8602 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
8603 #define ALT_SMMU_SECURE_SMMU_CB23_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMCNTENSE_OFST))
8604 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
8605 #define ALT_SMMU_SECURE_SMMU_CB23_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMCNTENCLR_OFST))
8606 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
8607 #define ALT_SMMU_SECURE_SMMU_CB23_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMCNTENSET_OFST))
8608 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
8609 #define ALT_SMMU_SECURE_SMMU_CB23_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMINTENCLR_OFST))
8610 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
8611 #define ALT_SMMU_SECURE_SMMU_CB23_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMOVSCLR_OFST))
8612 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMOVSSET register for the ALT_SMMU_SECURE instance. */
8613 #define ALT_SMMU_SECURE_SMMU_CB23_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMOVSSET_OFST))
8614 /* The address of the ALT_SMMU_SECURE_SMMU_CB23_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
8615 #define ALT_SMMU_SECURE_SMMU_CB23_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB23_PMAUTHSTATUS_OFST))
8616 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_SCTLR register for the ALT_SMMU_SECURE instance. */
8617 #define ALT_SMMU_SECURE_SMMU_CB24_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_SCTLR_OFST))
8618 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_ACTLR register for the ALT_SMMU_SECURE instance. */
8619 #define ALT_SMMU_SECURE_SMMU_CB24_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_ACTLR_OFST))
8620 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_RESUME register for the ALT_SMMU_SECURE instance. */
8621 #define ALT_SMMU_SECURE_SMMU_CB24_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_RESUME_OFST))
8622 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TCR2 register for the ALT_SMMU_SECURE instance. */
8623 #define ALT_SMMU_SECURE_SMMU_CB24_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TCR2_OFST))
8624 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
8625 #define ALT_SMMU_SECURE_SMMU_CB24_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TTBR0_LOW_OFST))
8626 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
8627 #define ALT_SMMU_SECURE_SMMU_CB24_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TTBR0_HIGH_OFST))
8628 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
8629 #define ALT_SMMU_SECURE_SMMU_CB24_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TTBR1_LOW_OFST))
8630 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
8631 #define ALT_SMMU_SECURE_SMMU_CB24_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TTBR1_HIGH_OFST))
8632 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
8633 #define ALT_SMMU_SECURE_SMMU_CB24_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TCR_LPAE_OFST))
8634 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
8635 #define ALT_SMMU_SECURE_SMMU_CB24_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_CONTEXTIDR_OFST))
8636 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
8637 #define ALT_SMMU_SECURE_SMMU_CB24_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PRRR_MAIR0_OFST))
8638 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
8639 #define ALT_SMMU_SECURE_SMMU_CB24_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_NMRR_MAIR1_OFST))
8640 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_FSR register for the ALT_SMMU_SECURE instance. */
8641 #define ALT_SMMU_SECURE_SMMU_CB24_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_FSR_OFST))
8642 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
8643 #define ALT_SMMU_SECURE_SMMU_CB24_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_FSRRESTORE_OFST))
8644 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_FAR_LOW register for the ALT_SMMU_SECURE instance. */
8645 #define ALT_SMMU_SECURE_SMMU_CB24_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_FAR_LOW_OFST))
8646 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
8647 #define ALT_SMMU_SECURE_SMMU_CB24_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_FAR_HIGH_OFST))
8648 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_FSYNR0 register for the ALT_SMMU_SECURE instance. */
8649 #define ALT_SMMU_SECURE_SMMU_CB24_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_FSYNR0_OFST))
8650 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
8651 #define ALT_SMMU_SECURE_SMMU_CB24_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_IPAFAR_LOW_OFST))
8652 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
8653 #define ALT_SMMU_SECURE_SMMU_CB24_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_IPAFAR_HIGH_OFST))
8654 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
8655 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIVA_LOW_OFST))
8656 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
8657 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIVA_HIGH_OFST))
8658 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
8659 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIVAA_LOW_OFST))
8660 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
8661 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIVAA_HIGH_OFST))
8662 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIASID register for the ALT_SMMU_SECURE instance. */
8663 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIASID_OFST))
8664 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIALL register for the ALT_SMMU_SECURE instance. */
8665 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIALL_OFST))
8666 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
8667 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIVAL_LOW_OFST))
8668 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
8669 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIVAL_HIGH_OFST))
8670 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
8671 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIVAAL_LOW_OFST))
8672 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
8673 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIVAAL_HIGH_OFST))
8674 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
8675 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIIPAS2_LOW_OFST))
8676 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
8677 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIIPAS2_HIGH_OFST))
8678 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
8679 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIIPAS2L_LOW_OFST))
8680 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
8681 #define ALT_SMMU_SECURE_SMMU_CB24_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBIIPAS2L_HIGH_OFST))
8682 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBSYNC register for the ALT_SMMU_SECURE instance. */
8683 #define ALT_SMMU_SECURE_SMMU_CB24_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBSYNC_OFST))
8684 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
8685 #define ALT_SMMU_SECURE_SMMU_CB24_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_TLBSTATUS_OFST))
8686 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
8687 #define ALT_SMMU_SECURE_SMMU_CB24_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMEVCNTR0_OFST))
8688 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
8689 #define ALT_SMMU_SECURE_SMMU_CB24_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMEVCNTR1_OFST))
8690 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
8691 #define ALT_SMMU_SECURE_SMMU_CB24_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMEVCNTR2_OFST))
8692 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
8693 #define ALT_SMMU_SECURE_SMMU_CB24_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMEVCNTR3_OFST))
8694 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
8695 #define ALT_SMMU_SECURE_SMMU_CB24_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMEVTYPER0_OFST))
8696 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
8697 #define ALT_SMMU_SECURE_SMMU_CB24_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMEVTYPER1_OFST))
8698 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
8699 #define ALT_SMMU_SECURE_SMMU_CB24_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMEVTYPER2_OFST))
8700 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
8701 #define ALT_SMMU_SECURE_SMMU_CB24_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMEVTYPER3_OFST))
8702 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMCFGR register for the ALT_SMMU_SECURE instance. */
8703 #define ALT_SMMU_SECURE_SMMU_CB24_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMCFGR_OFST))
8704 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMCR register for the ALT_SMMU_SECURE instance. */
8705 #define ALT_SMMU_SECURE_SMMU_CB24_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMCR_OFST))
8706 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMCEID register for the ALT_SMMU_SECURE instance. */
8707 #define ALT_SMMU_SECURE_SMMU_CB24_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMCEID_OFST))
8708 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
8709 #define ALT_SMMU_SECURE_SMMU_CB24_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMCNTENSE_OFST))
8710 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
8711 #define ALT_SMMU_SECURE_SMMU_CB24_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMCNTENCLR_OFST))
8712 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
8713 #define ALT_SMMU_SECURE_SMMU_CB24_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMCNTENSET_OFST))
8714 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
8715 #define ALT_SMMU_SECURE_SMMU_CB24_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMINTENCLR_OFST))
8716 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
8717 #define ALT_SMMU_SECURE_SMMU_CB24_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMOVSCLR_OFST))
8718 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMOVSSET register for the ALT_SMMU_SECURE instance. */
8719 #define ALT_SMMU_SECURE_SMMU_CB24_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMOVSSET_OFST))
8720 /* The address of the ALT_SMMU_SECURE_SMMU_CB24_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
8721 #define ALT_SMMU_SECURE_SMMU_CB24_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB24_PMAUTHSTATUS_OFST))
8722 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_SCTLR register for the ALT_SMMU_SECURE instance. */
8723 #define ALT_SMMU_SECURE_SMMU_CB25_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_SCTLR_OFST))
8724 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_ACTLR register for the ALT_SMMU_SECURE instance. */
8725 #define ALT_SMMU_SECURE_SMMU_CB25_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_ACTLR_OFST))
8726 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_RESUME register for the ALT_SMMU_SECURE instance. */
8727 #define ALT_SMMU_SECURE_SMMU_CB25_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_RESUME_OFST))
8728 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TCR2 register for the ALT_SMMU_SECURE instance. */
8729 #define ALT_SMMU_SECURE_SMMU_CB25_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TCR2_OFST))
8730 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
8731 #define ALT_SMMU_SECURE_SMMU_CB25_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TTBR0_LOW_OFST))
8732 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
8733 #define ALT_SMMU_SECURE_SMMU_CB25_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TTBR0_HIGH_OFST))
8734 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
8735 #define ALT_SMMU_SECURE_SMMU_CB25_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TTBR1_LOW_OFST))
8736 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
8737 #define ALT_SMMU_SECURE_SMMU_CB25_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TTBR1_HIGH_OFST))
8738 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
8739 #define ALT_SMMU_SECURE_SMMU_CB25_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TCR_LPAE_OFST))
8740 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
8741 #define ALT_SMMU_SECURE_SMMU_CB25_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_CONTEXTIDR_OFST))
8742 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
8743 #define ALT_SMMU_SECURE_SMMU_CB25_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PRRR_MAIR0_OFST))
8744 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
8745 #define ALT_SMMU_SECURE_SMMU_CB25_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_NMRR_MAIR1_OFST))
8746 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_FSR register for the ALT_SMMU_SECURE instance. */
8747 #define ALT_SMMU_SECURE_SMMU_CB25_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_FSR_OFST))
8748 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
8749 #define ALT_SMMU_SECURE_SMMU_CB25_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_FSRRESTORE_OFST))
8750 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_FAR_LOW register for the ALT_SMMU_SECURE instance. */
8751 #define ALT_SMMU_SECURE_SMMU_CB25_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_FAR_LOW_OFST))
8752 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
8753 #define ALT_SMMU_SECURE_SMMU_CB25_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_FAR_HIGH_OFST))
8754 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_FSYNR0 register for the ALT_SMMU_SECURE instance. */
8755 #define ALT_SMMU_SECURE_SMMU_CB25_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_FSYNR0_OFST))
8756 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
8757 #define ALT_SMMU_SECURE_SMMU_CB25_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_IPAFAR_LOW_OFST))
8758 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
8759 #define ALT_SMMU_SECURE_SMMU_CB25_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_IPAFAR_HIGH_OFST))
8760 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
8761 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIVA_LOW_OFST))
8762 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
8763 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIVA_HIGH_OFST))
8764 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
8765 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIVAA_LOW_OFST))
8766 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
8767 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIVAA_HIGH_OFST))
8768 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIASID register for the ALT_SMMU_SECURE instance. */
8769 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIASID_OFST))
8770 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIALL register for the ALT_SMMU_SECURE instance. */
8771 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIALL_OFST))
8772 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
8773 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIVAL_LOW_OFST))
8774 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
8775 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIVAL_HIGH_OFST))
8776 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
8777 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIVAAL_LOW_OFST))
8778 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
8779 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIVAAL_HIGH_OFST))
8780 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
8781 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIIPAS2_LOW_OFST))
8782 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
8783 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIIPAS2_HIGH_OFST))
8784 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
8785 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIIPAS2L_LOW_OFST))
8786 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
8787 #define ALT_SMMU_SECURE_SMMU_CB25_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBIIPAS2L_HIGH_OFST))
8788 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBSYNC register for the ALT_SMMU_SECURE instance. */
8789 #define ALT_SMMU_SECURE_SMMU_CB25_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBSYNC_OFST))
8790 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
8791 #define ALT_SMMU_SECURE_SMMU_CB25_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_TLBSTATUS_OFST))
8792 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
8793 #define ALT_SMMU_SECURE_SMMU_CB25_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMEVCNTR0_OFST))
8794 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
8795 #define ALT_SMMU_SECURE_SMMU_CB25_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMEVCNTR1_OFST))
8796 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
8797 #define ALT_SMMU_SECURE_SMMU_CB25_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMEVCNTR2_OFST))
8798 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
8799 #define ALT_SMMU_SECURE_SMMU_CB25_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMEVCNTR3_OFST))
8800 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
8801 #define ALT_SMMU_SECURE_SMMU_CB25_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMEVTYPER0_OFST))
8802 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
8803 #define ALT_SMMU_SECURE_SMMU_CB25_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMEVTYPER1_OFST))
8804 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
8805 #define ALT_SMMU_SECURE_SMMU_CB25_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMEVTYPER2_OFST))
8806 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
8807 #define ALT_SMMU_SECURE_SMMU_CB25_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMEVTYPER3_OFST))
8808 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMCFGR register for the ALT_SMMU_SECURE instance. */
8809 #define ALT_SMMU_SECURE_SMMU_CB25_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMCFGR_OFST))
8810 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMCR register for the ALT_SMMU_SECURE instance. */
8811 #define ALT_SMMU_SECURE_SMMU_CB25_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMCR_OFST))
8812 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMCEID register for the ALT_SMMU_SECURE instance. */
8813 #define ALT_SMMU_SECURE_SMMU_CB25_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMCEID_OFST))
8814 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
8815 #define ALT_SMMU_SECURE_SMMU_CB25_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMCNTENSE_OFST))
8816 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
8817 #define ALT_SMMU_SECURE_SMMU_CB25_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMCNTENCLR_OFST))
8818 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
8819 #define ALT_SMMU_SECURE_SMMU_CB25_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMCNTENSET_OFST))
8820 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
8821 #define ALT_SMMU_SECURE_SMMU_CB25_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMINTENCLR_OFST))
8822 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
8823 #define ALT_SMMU_SECURE_SMMU_CB25_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMOVSCLR_OFST))
8824 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMOVSSET register for the ALT_SMMU_SECURE instance. */
8825 #define ALT_SMMU_SECURE_SMMU_CB25_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMOVSSET_OFST))
8826 /* The address of the ALT_SMMU_SECURE_SMMU_CB25_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
8827 #define ALT_SMMU_SECURE_SMMU_CB25_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB25_PMAUTHSTATUS_OFST))
8828 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_SCTLR register for the ALT_SMMU_SECURE instance. */
8829 #define ALT_SMMU_SECURE_SMMU_CB26_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_SCTLR_OFST))
8830 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_ACTLR register for the ALT_SMMU_SECURE instance. */
8831 #define ALT_SMMU_SECURE_SMMU_CB26_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_ACTLR_OFST))
8832 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_RESUME register for the ALT_SMMU_SECURE instance. */
8833 #define ALT_SMMU_SECURE_SMMU_CB26_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_RESUME_OFST))
8834 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TCR2 register for the ALT_SMMU_SECURE instance. */
8835 #define ALT_SMMU_SECURE_SMMU_CB26_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TCR2_OFST))
8836 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
8837 #define ALT_SMMU_SECURE_SMMU_CB26_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TTBR0_LOW_OFST))
8838 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
8839 #define ALT_SMMU_SECURE_SMMU_CB26_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TTBR0_HIGH_OFST))
8840 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
8841 #define ALT_SMMU_SECURE_SMMU_CB26_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TTBR1_LOW_OFST))
8842 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
8843 #define ALT_SMMU_SECURE_SMMU_CB26_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TTBR1_HIGH_OFST))
8844 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
8845 #define ALT_SMMU_SECURE_SMMU_CB26_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TCR_LPAE_OFST))
8846 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
8847 #define ALT_SMMU_SECURE_SMMU_CB26_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_CONTEXTIDR_OFST))
8848 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
8849 #define ALT_SMMU_SECURE_SMMU_CB26_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PRRR_MAIR0_OFST))
8850 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
8851 #define ALT_SMMU_SECURE_SMMU_CB26_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_NMRR_MAIR1_OFST))
8852 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_FSR register for the ALT_SMMU_SECURE instance. */
8853 #define ALT_SMMU_SECURE_SMMU_CB26_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_FSR_OFST))
8854 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
8855 #define ALT_SMMU_SECURE_SMMU_CB26_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_FSRRESTORE_OFST))
8856 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_FAR_LOW register for the ALT_SMMU_SECURE instance. */
8857 #define ALT_SMMU_SECURE_SMMU_CB26_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_FAR_LOW_OFST))
8858 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
8859 #define ALT_SMMU_SECURE_SMMU_CB26_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_FAR_HIGH_OFST))
8860 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_FSYNR0 register for the ALT_SMMU_SECURE instance. */
8861 #define ALT_SMMU_SECURE_SMMU_CB26_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_FSYNR0_OFST))
8862 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
8863 #define ALT_SMMU_SECURE_SMMU_CB26_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_IPAFAR_LOW_OFST))
8864 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
8865 #define ALT_SMMU_SECURE_SMMU_CB26_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_IPAFAR_HIGH_OFST))
8866 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
8867 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIVA_LOW_OFST))
8868 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
8869 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIVA_HIGH_OFST))
8870 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
8871 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIVAA_LOW_OFST))
8872 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
8873 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIVAA_HIGH_OFST))
8874 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIASID register for the ALT_SMMU_SECURE instance. */
8875 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIASID_OFST))
8876 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIALL register for the ALT_SMMU_SECURE instance. */
8877 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIALL_OFST))
8878 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
8879 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIVAL_LOW_OFST))
8880 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
8881 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIVAL_HIGH_OFST))
8882 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
8883 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIVAAL_LOW_OFST))
8884 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
8885 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIVAAL_HIGH_OFST))
8886 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
8887 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIIPAS2_LOW_OFST))
8888 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
8889 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIIPAS2_HIGH_OFST))
8890 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
8891 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIIPAS2L_LOW_OFST))
8892 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
8893 #define ALT_SMMU_SECURE_SMMU_CB26_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBIIPAS2L_HIGH_OFST))
8894 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBSYNC register for the ALT_SMMU_SECURE instance. */
8895 #define ALT_SMMU_SECURE_SMMU_CB26_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBSYNC_OFST))
8896 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
8897 #define ALT_SMMU_SECURE_SMMU_CB26_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_TLBSTATUS_OFST))
8898 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
8899 #define ALT_SMMU_SECURE_SMMU_CB26_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMEVCNTR0_OFST))
8900 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
8901 #define ALT_SMMU_SECURE_SMMU_CB26_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMEVCNTR1_OFST))
8902 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
8903 #define ALT_SMMU_SECURE_SMMU_CB26_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMEVCNTR2_OFST))
8904 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
8905 #define ALT_SMMU_SECURE_SMMU_CB26_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMEVCNTR3_OFST))
8906 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
8907 #define ALT_SMMU_SECURE_SMMU_CB26_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMEVTYPER0_OFST))
8908 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
8909 #define ALT_SMMU_SECURE_SMMU_CB26_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMEVTYPER1_OFST))
8910 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
8911 #define ALT_SMMU_SECURE_SMMU_CB26_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMEVTYPER2_OFST))
8912 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
8913 #define ALT_SMMU_SECURE_SMMU_CB26_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMEVTYPER3_OFST))
8914 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMCFGR register for the ALT_SMMU_SECURE instance. */
8915 #define ALT_SMMU_SECURE_SMMU_CB26_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMCFGR_OFST))
8916 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMCR register for the ALT_SMMU_SECURE instance. */
8917 #define ALT_SMMU_SECURE_SMMU_CB26_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMCR_OFST))
8918 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMCEID register for the ALT_SMMU_SECURE instance. */
8919 #define ALT_SMMU_SECURE_SMMU_CB26_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMCEID_OFST))
8920 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
8921 #define ALT_SMMU_SECURE_SMMU_CB26_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMCNTENSE_OFST))
8922 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
8923 #define ALT_SMMU_SECURE_SMMU_CB26_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMCNTENCLR_OFST))
8924 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
8925 #define ALT_SMMU_SECURE_SMMU_CB26_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMCNTENSET_OFST))
8926 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
8927 #define ALT_SMMU_SECURE_SMMU_CB26_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMINTENCLR_OFST))
8928 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
8929 #define ALT_SMMU_SECURE_SMMU_CB26_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMOVSCLR_OFST))
8930 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMOVSSET register for the ALT_SMMU_SECURE instance. */
8931 #define ALT_SMMU_SECURE_SMMU_CB26_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMOVSSET_OFST))
8932 /* The address of the ALT_SMMU_SECURE_SMMU_CB26_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
8933 #define ALT_SMMU_SECURE_SMMU_CB26_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB26_PMAUTHSTATUS_OFST))
8934 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_SCTLR register for the ALT_SMMU_SECURE instance. */
8935 #define ALT_SMMU_SECURE_SMMU_CB27_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_SCTLR_OFST))
8936 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_ACTLR register for the ALT_SMMU_SECURE instance. */
8937 #define ALT_SMMU_SECURE_SMMU_CB27_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_ACTLR_OFST))
8938 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_RESUME register for the ALT_SMMU_SECURE instance. */
8939 #define ALT_SMMU_SECURE_SMMU_CB27_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_RESUME_OFST))
8940 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TCR2 register for the ALT_SMMU_SECURE instance. */
8941 #define ALT_SMMU_SECURE_SMMU_CB27_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TCR2_OFST))
8942 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
8943 #define ALT_SMMU_SECURE_SMMU_CB27_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TTBR0_LOW_OFST))
8944 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
8945 #define ALT_SMMU_SECURE_SMMU_CB27_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TTBR0_HIGH_OFST))
8946 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
8947 #define ALT_SMMU_SECURE_SMMU_CB27_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TTBR1_LOW_OFST))
8948 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
8949 #define ALT_SMMU_SECURE_SMMU_CB27_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TTBR1_HIGH_OFST))
8950 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
8951 #define ALT_SMMU_SECURE_SMMU_CB27_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TCR_LPAE_OFST))
8952 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
8953 #define ALT_SMMU_SECURE_SMMU_CB27_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_CONTEXTIDR_OFST))
8954 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
8955 #define ALT_SMMU_SECURE_SMMU_CB27_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PRRR_MAIR0_OFST))
8956 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
8957 #define ALT_SMMU_SECURE_SMMU_CB27_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_NMRR_MAIR1_OFST))
8958 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_FSR register for the ALT_SMMU_SECURE instance. */
8959 #define ALT_SMMU_SECURE_SMMU_CB27_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_FSR_OFST))
8960 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
8961 #define ALT_SMMU_SECURE_SMMU_CB27_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_FSRRESTORE_OFST))
8962 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_FAR_LOW register for the ALT_SMMU_SECURE instance. */
8963 #define ALT_SMMU_SECURE_SMMU_CB27_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_FAR_LOW_OFST))
8964 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
8965 #define ALT_SMMU_SECURE_SMMU_CB27_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_FAR_HIGH_OFST))
8966 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_FSYNR0 register for the ALT_SMMU_SECURE instance. */
8967 #define ALT_SMMU_SECURE_SMMU_CB27_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_FSYNR0_OFST))
8968 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
8969 #define ALT_SMMU_SECURE_SMMU_CB27_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_IPAFAR_LOW_OFST))
8970 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
8971 #define ALT_SMMU_SECURE_SMMU_CB27_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_IPAFAR_HIGH_OFST))
8972 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
8973 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIVA_LOW_OFST))
8974 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
8975 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIVA_HIGH_OFST))
8976 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
8977 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIVAA_LOW_OFST))
8978 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
8979 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIVAA_HIGH_OFST))
8980 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIASID register for the ALT_SMMU_SECURE instance. */
8981 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIASID_OFST))
8982 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIALL register for the ALT_SMMU_SECURE instance. */
8983 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIALL_OFST))
8984 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
8985 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIVAL_LOW_OFST))
8986 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
8987 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIVAL_HIGH_OFST))
8988 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
8989 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIVAAL_LOW_OFST))
8990 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
8991 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIVAAL_HIGH_OFST))
8992 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
8993 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIIPAS2_LOW_OFST))
8994 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
8995 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIIPAS2_HIGH_OFST))
8996 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
8997 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIIPAS2L_LOW_OFST))
8998 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
8999 #define ALT_SMMU_SECURE_SMMU_CB27_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBIIPAS2L_HIGH_OFST))
9000 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBSYNC register for the ALT_SMMU_SECURE instance. */
9001 #define ALT_SMMU_SECURE_SMMU_CB27_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBSYNC_OFST))
9002 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
9003 #define ALT_SMMU_SECURE_SMMU_CB27_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_TLBSTATUS_OFST))
9004 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
9005 #define ALT_SMMU_SECURE_SMMU_CB27_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMEVCNTR0_OFST))
9006 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
9007 #define ALT_SMMU_SECURE_SMMU_CB27_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMEVCNTR1_OFST))
9008 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
9009 #define ALT_SMMU_SECURE_SMMU_CB27_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMEVCNTR2_OFST))
9010 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
9011 #define ALT_SMMU_SECURE_SMMU_CB27_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMEVCNTR3_OFST))
9012 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
9013 #define ALT_SMMU_SECURE_SMMU_CB27_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMEVTYPER0_OFST))
9014 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
9015 #define ALT_SMMU_SECURE_SMMU_CB27_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMEVTYPER1_OFST))
9016 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
9017 #define ALT_SMMU_SECURE_SMMU_CB27_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMEVTYPER2_OFST))
9018 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
9019 #define ALT_SMMU_SECURE_SMMU_CB27_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMEVTYPER3_OFST))
9020 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMCFGR register for the ALT_SMMU_SECURE instance. */
9021 #define ALT_SMMU_SECURE_SMMU_CB27_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMCFGR_OFST))
9022 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMCR register for the ALT_SMMU_SECURE instance. */
9023 #define ALT_SMMU_SECURE_SMMU_CB27_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMCR_OFST))
9024 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMCEID register for the ALT_SMMU_SECURE instance. */
9025 #define ALT_SMMU_SECURE_SMMU_CB27_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMCEID_OFST))
9026 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
9027 #define ALT_SMMU_SECURE_SMMU_CB27_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMCNTENSE_OFST))
9028 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
9029 #define ALT_SMMU_SECURE_SMMU_CB27_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMCNTENCLR_OFST))
9030 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
9031 #define ALT_SMMU_SECURE_SMMU_CB27_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMCNTENSET_OFST))
9032 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
9033 #define ALT_SMMU_SECURE_SMMU_CB27_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMINTENCLR_OFST))
9034 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
9035 #define ALT_SMMU_SECURE_SMMU_CB27_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMOVSCLR_OFST))
9036 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMOVSSET register for the ALT_SMMU_SECURE instance. */
9037 #define ALT_SMMU_SECURE_SMMU_CB27_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMOVSSET_OFST))
9038 /* The address of the ALT_SMMU_SECURE_SMMU_CB27_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
9039 #define ALT_SMMU_SECURE_SMMU_CB27_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB27_PMAUTHSTATUS_OFST))
9040 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_SCTLR register for the ALT_SMMU_SECURE instance. */
9041 #define ALT_SMMU_SECURE_SMMU_CB28_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_SCTLR_OFST))
9042 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_ACTLR register for the ALT_SMMU_SECURE instance. */
9043 #define ALT_SMMU_SECURE_SMMU_CB28_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_ACTLR_OFST))
9044 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_RESUME register for the ALT_SMMU_SECURE instance. */
9045 #define ALT_SMMU_SECURE_SMMU_CB28_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_RESUME_OFST))
9046 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TCR2 register for the ALT_SMMU_SECURE instance. */
9047 #define ALT_SMMU_SECURE_SMMU_CB28_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TCR2_OFST))
9048 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
9049 #define ALT_SMMU_SECURE_SMMU_CB28_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TTBR0_LOW_OFST))
9050 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
9051 #define ALT_SMMU_SECURE_SMMU_CB28_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TTBR0_HIGH_OFST))
9052 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
9053 #define ALT_SMMU_SECURE_SMMU_CB28_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TTBR1_LOW_OFST))
9054 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
9055 #define ALT_SMMU_SECURE_SMMU_CB28_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TTBR1_HIGH_OFST))
9056 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
9057 #define ALT_SMMU_SECURE_SMMU_CB28_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TCR_LPAE_OFST))
9058 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
9059 #define ALT_SMMU_SECURE_SMMU_CB28_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_CONTEXTIDR_OFST))
9060 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
9061 #define ALT_SMMU_SECURE_SMMU_CB28_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PRRR_MAIR0_OFST))
9062 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
9063 #define ALT_SMMU_SECURE_SMMU_CB28_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_NMRR_MAIR1_OFST))
9064 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_FSR register for the ALT_SMMU_SECURE instance. */
9065 #define ALT_SMMU_SECURE_SMMU_CB28_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_FSR_OFST))
9066 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
9067 #define ALT_SMMU_SECURE_SMMU_CB28_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_FSRRESTORE_OFST))
9068 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_FAR_LOW register for the ALT_SMMU_SECURE instance. */
9069 #define ALT_SMMU_SECURE_SMMU_CB28_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_FAR_LOW_OFST))
9070 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
9071 #define ALT_SMMU_SECURE_SMMU_CB28_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_FAR_HIGH_OFST))
9072 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_FSYNR0 register for the ALT_SMMU_SECURE instance. */
9073 #define ALT_SMMU_SECURE_SMMU_CB28_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_FSYNR0_OFST))
9074 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
9075 #define ALT_SMMU_SECURE_SMMU_CB28_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_IPAFAR_LOW_OFST))
9076 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
9077 #define ALT_SMMU_SECURE_SMMU_CB28_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_IPAFAR_HIGH_OFST))
9078 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
9079 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIVA_LOW_OFST))
9080 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
9081 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIVA_HIGH_OFST))
9082 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
9083 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIVAA_LOW_OFST))
9084 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
9085 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIVAA_HIGH_OFST))
9086 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIASID register for the ALT_SMMU_SECURE instance. */
9087 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIASID_OFST))
9088 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIALL register for the ALT_SMMU_SECURE instance. */
9089 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIALL_OFST))
9090 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
9091 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIVAL_LOW_OFST))
9092 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
9093 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIVAL_HIGH_OFST))
9094 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
9095 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIVAAL_LOW_OFST))
9096 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
9097 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIVAAL_HIGH_OFST))
9098 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
9099 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIIPAS2_LOW_OFST))
9100 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
9101 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIIPAS2_HIGH_OFST))
9102 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
9103 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIIPAS2L_LOW_OFST))
9104 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
9105 #define ALT_SMMU_SECURE_SMMU_CB28_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBIIPAS2L_HIGH_OFST))
9106 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBSYNC register for the ALT_SMMU_SECURE instance. */
9107 #define ALT_SMMU_SECURE_SMMU_CB28_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBSYNC_OFST))
9108 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
9109 #define ALT_SMMU_SECURE_SMMU_CB28_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_TLBSTATUS_OFST))
9110 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
9111 #define ALT_SMMU_SECURE_SMMU_CB28_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMEVCNTR0_OFST))
9112 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
9113 #define ALT_SMMU_SECURE_SMMU_CB28_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMEVCNTR1_OFST))
9114 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
9115 #define ALT_SMMU_SECURE_SMMU_CB28_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMEVCNTR2_OFST))
9116 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
9117 #define ALT_SMMU_SECURE_SMMU_CB28_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMEVCNTR3_OFST))
9118 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
9119 #define ALT_SMMU_SECURE_SMMU_CB28_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMEVTYPER0_OFST))
9120 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
9121 #define ALT_SMMU_SECURE_SMMU_CB28_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMEVTYPER1_OFST))
9122 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
9123 #define ALT_SMMU_SECURE_SMMU_CB28_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMEVTYPER2_OFST))
9124 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
9125 #define ALT_SMMU_SECURE_SMMU_CB28_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMEVTYPER3_OFST))
9126 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMCFGR register for the ALT_SMMU_SECURE instance. */
9127 #define ALT_SMMU_SECURE_SMMU_CB28_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMCFGR_OFST))
9128 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMCR register for the ALT_SMMU_SECURE instance. */
9129 #define ALT_SMMU_SECURE_SMMU_CB28_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMCR_OFST))
9130 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMCEID register for the ALT_SMMU_SECURE instance. */
9131 #define ALT_SMMU_SECURE_SMMU_CB28_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMCEID_OFST))
9132 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
9133 #define ALT_SMMU_SECURE_SMMU_CB28_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMCNTENSE_OFST))
9134 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
9135 #define ALT_SMMU_SECURE_SMMU_CB28_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMCNTENCLR_OFST))
9136 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
9137 #define ALT_SMMU_SECURE_SMMU_CB28_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMCNTENSET_OFST))
9138 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
9139 #define ALT_SMMU_SECURE_SMMU_CB28_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMINTENCLR_OFST))
9140 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
9141 #define ALT_SMMU_SECURE_SMMU_CB28_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMOVSCLR_OFST))
9142 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMOVSSET register for the ALT_SMMU_SECURE instance. */
9143 #define ALT_SMMU_SECURE_SMMU_CB28_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMOVSSET_OFST))
9144 /* The address of the ALT_SMMU_SECURE_SMMU_CB28_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
9145 #define ALT_SMMU_SECURE_SMMU_CB28_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB28_PMAUTHSTATUS_OFST))
9146 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_SCTLR register for the ALT_SMMU_SECURE instance. */
9147 #define ALT_SMMU_SECURE_SMMU_CB29_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_SCTLR_OFST))
9148 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_ACTLR register for the ALT_SMMU_SECURE instance. */
9149 #define ALT_SMMU_SECURE_SMMU_CB29_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_ACTLR_OFST))
9150 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_RESUME register for the ALT_SMMU_SECURE instance. */
9151 #define ALT_SMMU_SECURE_SMMU_CB29_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_RESUME_OFST))
9152 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TCR2 register for the ALT_SMMU_SECURE instance. */
9153 #define ALT_SMMU_SECURE_SMMU_CB29_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TCR2_OFST))
9154 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
9155 #define ALT_SMMU_SECURE_SMMU_CB29_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TTBR0_LOW_OFST))
9156 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
9157 #define ALT_SMMU_SECURE_SMMU_CB29_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TTBR0_HIGH_OFST))
9158 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
9159 #define ALT_SMMU_SECURE_SMMU_CB29_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TTBR1_LOW_OFST))
9160 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
9161 #define ALT_SMMU_SECURE_SMMU_CB29_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TTBR1_HIGH_OFST))
9162 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
9163 #define ALT_SMMU_SECURE_SMMU_CB29_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TCR_LPAE_OFST))
9164 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
9165 #define ALT_SMMU_SECURE_SMMU_CB29_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_CONTEXTIDR_OFST))
9166 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
9167 #define ALT_SMMU_SECURE_SMMU_CB29_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PRRR_MAIR0_OFST))
9168 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
9169 #define ALT_SMMU_SECURE_SMMU_CB29_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_NMRR_MAIR1_OFST))
9170 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_FSR register for the ALT_SMMU_SECURE instance. */
9171 #define ALT_SMMU_SECURE_SMMU_CB29_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_FSR_OFST))
9172 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
9173 #define ALT_SMMU_SECURE_SMMU_CB29_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_FSRRESTORE_OFST))
9174 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_FAR_LOW register for the ALT_SMMU_SECURE instance. */
9175 #define ALT_SMMU_SECURE_SMMU_CB29_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_FAR_LOW_OFST))
9176 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
9177 #define ALT_SMMU_SECURE_SMMU_CB29_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_FAR_HIGH_OFST))
9178 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_FSYNR0 register for the ALT_SMMU_SECURE instance. */
9179 #define ALT_SMMU_SECURE_SMMU_CB29_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_FSYNR0_OFST))
9180 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
9181 #define ALT_SMMU_SECURE_SMMU_CB29_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_IPAFAR_LOW_OFST))
9182 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
9183 #define ALT_SMMU_SECURE_SMMU_CB29_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_IPAFAR_HIGH_OFST))
9184 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
9185 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIVA_LOW_OFST))
9186 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
9187 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIVA_HIGH_OFST))
9188 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
9189 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIVAA_LOW_OFST))
9190 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
9191 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIVAA_HIGH_OFST))
9192 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIASID register for the ALT_SMMU_SECURE instance. */
9193 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIASID_OFST))
9194 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIALL register for the ALT_SMMU_SECURE instance. */
9195 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIALL_OFST))
9196 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
9197 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIVAL_LOW_OFST))
9198 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
9199 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIVAL_HIGH_OFST))
9200 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
9201 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIVAAL_LOW_OFST))
9202 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
9203 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIVAAL_HIGH_OFST))
9204 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
9205 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIIPAS2_LOW_OFST))
9206 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
9207 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIIPAS2_HIGH_OFST))
9208 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
9209 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIIPAS2L_LOW_OFST))
9210 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
9211 #define ALT_SMMU_SECURE_SMMU_CB29_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBIIPAS2L_HIGH_OFST))
9212 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBSYNC register for the ALT_SMMU_SECURE instance. */
9213 #define ALT_SMMU_SECURE_SMMU_CB29_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBSYNC_OFST))
9214 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
9215 #define ALT_SMMU_SECURE_SMMU_CB29_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_TLBSTATUS_OFST))
9216 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
9217 #define ALT_SMMU_SECURE_SMMU_CB29_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMEVCNTR0_OFST))
9218 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
9219 #define ALT_SMMU_SECURE_SMMU_CB29_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMEVCNTR1_OFST))
9220 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
9221 #define ALT_SMMU_SECURE_SMMU_CB29_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMEVCNTR2_OFST))
9222 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
9223 #define ALT_SMMU_SECURE_SMMU_CB29_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMEVCNTR3_OFST))
9224 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
9225 #define ALT_SMMU_SECURE_SMMU_CB29_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMEVTYPER0_OFST))
9226 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
9227 #define ALT_SMMU_SECURE_SMMU_CB29_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMEVTYPER1_OFST))
9228 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
9229 #define ALT_SMMU_SECURE_SMMU_CB29_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMEVTYPER2_OFST))
9230 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
9231 #define ALT_SMMU_SECURE_SMMU_CB29_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMEVTYPER3_OFST))
9232 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMCFGR register for the ALT_SMMU_SECURE instance. */
9233 #define ALT_SMMU_SECURE_SMMU_CB29_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMCFGR_OFST))
9234 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMCR register for the ALT_SMMU_SECURE instance. */
9235 #define ALT_SMMU_SECURE_SMMU_CB29_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMCR_OFST))
9236 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMCEID register for the ALT_SMMU_SECURE instance. */
9237 #define ALT_SMMU_SECURE_SMMU_CB29_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMCEID_OFST))
9238 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
9239 #define ALT_SMMU_SECURE_SMMU_CB29_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMCNTENSE_OFST))
9240 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
9241 #define ALT_SMMU_SECURE_SMMU_CB29_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMCNTENCLR_OFST))
9242 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
9243 #define ALT_SMMU_SECURE_SMMU_CB29_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMCNTENSET_OFST))
9244 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
9245 #define ALT_SMMU_SECURE_SMMU_CB29_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMINTENCLR_OFST))
9246 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
9247 #define ALT_SMMU_SECURE_SMMU_CB29_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMOVSCLR_OFST))
9248 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMOVSSET register for the ALT_SMMU_SECURE instance. */
9249 #define ALT_SMMU_SECURE_SMMU_CB29_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMOVSSET_OFST))
9250 /* The address of the ALT_SMMU_SECURE_SMMU_CB29_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
9251 #define ALT_SMMU_SECURE_SMMU_CB29_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB29_PMAUTHSTATUS_OFST))
9252 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_SCTLR register for the ALT_SMMU_SECURE instance. */
9253 #define ALT_SMMU_SECURE_SMMU_CB30_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_SCTLR_OFST))
9254 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_ACTLR register for the ALT_SMMU_SECURE instance. */
9255 #define ALT_SMMU_SECURE_SMMU_CB30_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_ACTLR_OFST))
9256 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_RESUME register for the ALT_SMMU_SECURE instance. */
9257 #define ALT_SMMU_SECURE_SMMU_CB30_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_RESUME_OFST))
9258 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TCR2 register for the ALT_SMMU_SECURE instance. */
9259 #define ALT_SMMU_SECURE_SMMU_CB30_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TCR2_OFST))
9260 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
9261 #define ALT_SMMU_SECURE_SMMU_CB30_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TTBR0_LOW_OFST))
9262 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
9263 #define ALT_SMMU_SECURE_SMMU_CB30_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TTBR0_HIGH_OFST))
9264 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
9265 #define ALT_SMMU_SECURE_SMMU_CB30_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TTBR1_LOW_OFST))
9266 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
9267 #define ALT_SMMU_SECURE_SMMU_CB30_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TTBR1_HIGH_OFST))
9268 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
9269 #define ALT_SMMU_SECURE_SMMU_CB30_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TCR_LPAE_OFST))
9270 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
9271 #define ALT_SMMU_SECURE_SMMU_CB30_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_CONTEXTIDR_OFST))
9272 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
9273 #define ALT_SMMU_SECURE_SMMU_CB30_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PRRR_MAIR0_OFST))
9274 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
9275 #define ALT_SMMU_SECURE_SMMU_CB30_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_NMRR_MAIR1_OFST))
9276 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_FSR register for the ALT_SMMU_SECURE instance. */
9277 #define ALT_SMMU_SECURE_SMMU_CB30_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_FSR_OFST))
9278 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
9279 #define ALT_SMMU_SECURE_SMMU_CB30_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_FSRRESTORE_OFST))
9280 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_FAR_LOW register for the ALT_SMMU_SECURE instance. */
9281 #define ALT_SMMU_SECURE_SMMU_CB30_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_FAR_LOW_OFST))
9282 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
9283 #define ALT_SMMU_SECURE_SMMU_CB30_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_FAR_HIGH_OFST))
9284 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_FSYNR0 register for the ALT_SMMU_SECURE instance. */
9285 #define ALT_SMMU_SECURE_SMMU_CB30_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_FSYNR0_OFST))
9286 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
9287 #define ALT_SMMU_SECURE_SMMU_CB30_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_IPAFAR_LOW_OFST))
9288 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
9289 #define ALT_SMMU_SECURE_SMMU_CB30_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_IPAFAR_HIGH_OFST))
9290 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
9291 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIVA_LOW_OFST))
9292 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
9293 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIVA_HIGH_OFST))
9294 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
9295 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIVAA_LOW_OFST))
9296 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
9297 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIVAA_HIGH_OFST))
9298 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIASID register for the ALT_SMMU_SECURE instance. */
9299 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIASID_OFST))
9300 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIALL register for the ALT_SMMU_SECURE instance. */
9301 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIALL_OFST))
9302 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
9303 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIVAL_LOW_OFST))
9304 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
9305 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIVAL_HIGH_OFST))
9306 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
9307 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIVAAL_LOW_OFST))
9308 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
9309 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIVAAL_HIGH_OFST))
9310 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
9311 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIIPAS2_LOW_OFST))
9312 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
9313 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIIPAS2_HIGH_OFST))
9314 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
9315 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIIPAS2L_LOW_OFST))
9316 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
9317 #define ALT_SMMU_SECURE_SMMU_CB30_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBIIPAS2L_HIGH_OFST))
9318 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBSYNC register for the ALT_SMMU_SECURE instance. */
9319 #define ALT_SMMU_SECURE_SMMU_CB30_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBSYNC_OFST))
9320 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
9321 #define ALT_SMMU_SECURE_SMMU_CB30_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_TLBSTATUS_OFST))
9322 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
9323 #define ALT_SMMU_SECURE_SMMU_CB30_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMEVCNTR0_OFST))
9324 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
9325 #define ALT_SMMU_SECURE_SMMU_CB30_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMEVCNTR1_OFST))
9326 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
9327 #define ALT_SMMU_SECURE_SMMU_CB30_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMEVCNTR2_OFST))
9328 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
9329 #define ALT_SMMU_SECURE_SMMU_CB30_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMEVCNTR3_OFST))
9330 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
9331 #define ALT_SMMU_SECURE_SMMU_CB30_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMEVTYPER0_OFST))
9332 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
9333 #define ALT_SMMU_SECURE_SMMU_CB30_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMEVTYPER1_OFST))
9334 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
9335 #define ALT_SMMU_SECURE_SMMU_CB30_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMEVTYPER2_OFST))
9336 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
9337 #define ALT_SMMU_SECURE_SMMU_CB30_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMEVTYPER3_OFST))
9338 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMCFGR register for the ALT_SMMU_SECURE instance. */
9339 #define ALT_SMMU_SECURE_SMMU_CB30_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMCFGR_OFST))
9340 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMCR register for the ALT_SMMU_SECURE instance. */
9341 #define ALT_SMMU_SECURE_SMMU_CB30_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMCR_OFST))
9342 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMCEID register for the ALT_SMMU_SECURE instance. */
9343 #define ALT_SMMU_SECURE_SMMU_CB30_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMCEID_OFST))
9344 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
9345 #define ALT_SMMU_SECURE_SMMU_CB30_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMCNTENSE_OFST))
9346 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
9347 #define ALT_SMMU_SECURE_SMMU_CB30_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMCNTENCLR_OFST))
9348 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
9349 #define ALT_SMMU_SECURE_SMMU_CB30_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMCNTENSET_OFST))
9350 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
9351 #define ALT_SMMU_SECURE_SMMU_CB30_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMINTENCLR_OFST))
9352 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
9353 #define ALT_SMMU_SECURE_SMMU_CB30_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMOVSCLR_OFST))
9354 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMOVSSET register for the ALT_SMMU_SECURE instance. */
9355 #define ALT_SMMU_SECURE_SMMU_CB30_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMOVSSET_OFST))
9356 /* The address of the ALT_SMMU_SECURE_SMMU_CB30_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
9357 #define ALT_SMMU_SECURE_SMMU_CB30_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB30_PMAUTHSTATUS_OFST))
9358 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_SCTLR register for the ALT_SMMU_SECURE instance. */
9359 #define ALT_SMMU_SECURE_SMMU_CB31_SCTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_SCTLR_OFST))
9360 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_ACTLR register for the ALT_SMMU_SECURE instance. */
9361 #define ALT_SMMU_SECURE_SMMU_CB31_ACTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_ACTLR_OFST))
9362 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_RESUME register for the ALT_SMMU_SECURE instance. */
9363 #define ALT_SMMU_SECURE_SMMU_CB31_RESUME_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_RESUME_OFST))
9364 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TCR2 register for the ALT_SMMU_SECURE instance. */
9365 #define ALT_SMMU_SECURE_SMMU_CB31_TCR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TCR2_OFST))
9366 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TTBR0_LOW register for the ALT_SMMU_SECURE instance. */
9367 #define ALT_SMMU_SECURE_SMMU_CB31_TTBR0_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TTBR0_LOW_OFST))
9368 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TTBR0_HIGH register for the ALT_SMMU_SECURE instance. */
9369 #define ALT_SMMU_SECURE_SMMU_CB31_TTBR0_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TTBR0_HIGH_OFST))
9370 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TTBR1_LOW register for the ALT_SMMU_SECURE instance. */
9371 #define ALT_SMMU_SECURE_SMMU_CB31_TTBR1_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TTBR1_LOW_OFST))
9372 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TTBR1_HIGH register for the ALT_SMMU_SECURE instance. */
9373 #define ALT_SMMU_SECURE_SMMU_CB31_TTBR1_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TTBR1_HIGH_OFST))
9374 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TCR_LPAE register for the ALT_SMMU_SECURE instance. */
9375 #define ALT_SMMU_SECURE_SMMU_CB31_TCR_LPAE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TCR_LPAE_OFST))
9376 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_CONTEXTIDR register for the ALT_SMMU_SECURE instance. */
9377 #define ALT_SMMU_SECURE_SMMU_CB31_CONTEXTIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_CONTEXTIDR_OFST))
9378 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PRRR_MAIR0 register for the ALT_SMMU_SECURE instance. */
9379 #define ALT_SMMU_SECURE_SMMU_CB31_PRRR_MAIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PRRR_MAIR0_OFST))
9380 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_NMRR_MAIR1 register for the ALT_SMMU_SECURE instance. */
9381 #define ALT_SMMU_SECURE_SMMU_CB31_NMRR_MAIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_NMRR_MAIR1_OFST))
9382 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_FSR register for the ALT_SMMU_SECURE instance. */
9383 #define ALT_SMMU_SECURE_SMMU_CB31_FSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_FSR_OFST))
9384 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_FSRRESTORE register for the ALT_SMMU_SECURE instance. */
9385 #define ALT_SMMU_SECURE_SMMU_CB31_FSRRESTORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_FSRRESTORE_OFST))
9386 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_FAR_LOW register for the ALT_SMMU_SECURE instance. */
9387 #define ALT_SMMU_SECURE_SMMU_CB31_FAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_FAR_LOW_OFST))
9388 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_FAR_HIGH register for the ALT_SMMU_SECURE instance. */
9389 #define ALT_SMMU_SECURE_SMMU_CB31_FAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_FAR_HIGH_OFST))
9390 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_FSYNR0 register for the ALT_SMMU_SECURE instance. */
9391 #define ALT_SMMU_SECURE_SMMU_CB31_FSYNR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_FSYNR0_OFST))
9392 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_IPAFAR_LOW register for the ALT_SMMU_SECURE instance. */
9393 #define ALT_SMMU_SECURE_SMMU_CB31_IPAFAR_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_IPAFAR_LOW_OFST))
9394 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_IPAFAR_HIGH register for the ALT_SMMU_SECURE instance. */
9395 #define ALT_SMMU_SECURE_SMMU_CB31_IPAFAR_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_IPAFAR_HIGH_OFST))
9396 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIVA_LOW register for the ALT_SMMU_SECURE instance. */
9397 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIVA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIVA_LOW_OFST))
9398 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIVA_HIGH register for the ALT_SMMU_SECURE instance. */
9399 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIVA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIVA_HIGH_OFST))
9400 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIVAA_LOW register for the ALT_SMMU_SECURE instance. */
9401 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIVAA_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIVAA_LOW_OFST))
9402 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIVAA_HIGH register for the ALT_SMMU_SECURE instance. */
9403 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIVAA_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIVAA_HIGH_OFST))
9404 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIASID register for the ALT_SMMU_SECURE instance. */
9405 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIASID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIASID_OFST))
9406 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIALL register for the ALT_SMMU_SECURE instance. */
9407 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIALL_OFST))
9408 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIVAL_LOW register for the ALT_SMMU_SECURE instance. */
9409 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIVAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIVAL_LOW_OFST))
9410 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIVAL_HIGH register for the ALT_SMMU_SECURE instance. */
9411 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIVAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIVAL_HIGH_OFST))
9412 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIVAAL_LOW register for the ALT_SMMU_SECURE instance. */
9413 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIVAAL_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIVAAL_LOW_OFST))
9414 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIVAAL_HIGH register for the ALT_SMMU_SECURE instance. */
9415 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIVAAL_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIVAAL_HIGH_OFST))
9416 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIIPAS2_LOW register for the ALT_SMMU_SECURE instance. */
9417 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIIPAS2_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIIPAS2_LOW_OFST))
9418 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIIPAS2_HIGH register for the ALT_SMMU_SECURE instance. */
9419 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIIPAS2_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIIPAS2_HIGH_OFST))
9420 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIIPAS2L_LOW register for the ALT_SMMU_SECURE instance. */
9421 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIIPAS2L_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIIPAS2L_LOW_OFST))
9422 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBIIPAS2L_HIGH register for the ALT_SMMU_SECURE instance. */
9423 #define ALT_SMMU_SECURE_SMMU_CB31_TLBIIPAS2L_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBIIPAS2L_HIGH_OFST))
9424 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBSYNC register for the ALT_SMMU_SECURE instance. */
9425 #define ALT_SMMU_SECURE_SMMU_CB31_TLBSYNC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBSYNC_OFST))
9426 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_TLBSTATUS register for the ALT_SMMU_SECURE instance. */
9427 #define ALT_SMMU_SECURE_SMMU_CB31_TLBSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_TLBSTATUS_OFST))
9428 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMEVCNTR0 register for the ALT_SMMU_SECURE instance. */
9429 #define ALT_SMMU_SECURE_SMMU_CB31_PMEVCNTR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMEVCNTR0_OFST))
9430 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMEVCNTR1 register for the ALT_SMMU_SECURE instance. */
9431 #define ALT_SMMU_SECURE_SMMU_CB31_PMEVCNTR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMEVCNTR1_OFST))
9432 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMEVCNTR2 register for the ALT_SMMU_SECURE instance. */
9433 #define ALT_SMMU_SECURE_SMMU_CB31_PMEVCNTR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMEVCNTR2_OFST))
9434 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMEVCNTR3 register for the ALT_SMMU_SECURE instance. */
9435 #define ALT_SMMU_SECURE_SMMU_CB31_PMEVCNTR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMEVCNTR3_OFST))
9436 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMEVTYPER0 register for the ALT_SMMU_SECURE instance. */
9437 #define ALT_SMMU_SECURE_SMMU_CB31_PMEVTYPER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMEVTYPER0_OFST))
9438 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMEVTYPER1 register for the ALT_SMMU_SECURE instance. */
9439 #define ALT_SMMU_SECURE_SMMU_CB31_PMEVTYPER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMEVTYPER1_OFST))
9440 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMEVTYPER2 register for the ALT_SMMU_SECURE instance. */
9441 #define ALT_SMMU_SECURE_SMMU_CB31_PMEVTYPER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMEVTYPER2_OFST))
9442 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMEVTYPER3 register for the ALT_SMMU_SECURE instance. */
9443 #define ALT_SMMU_SECURE_SMMU_CB31_PMEVTYPER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMEVTYPER3_OFST))
9444 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMCFGR register for the ALT_SMMU_SECURE instance. */
9445 #define ALT_SMMU_SECURE_SMMU_CB31_PMCFGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMCFGR_OFST))
9446 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMCR register for the ALT_SMMU_SECURE instance. */
9447 #define ALT_SMMU_SECURE_SMMU_CB31_PMCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMCR_OFST))
9448 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMCEID register for the ALT_SMMU_SECURE instance. */
9449 #define ALT_SMMU_SECURE_SMMU_CB31_PMCEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMCEID_OFST))
9450 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMCNTENSE register for the ALT_SMMU_SECURE instance. */
9451 #define ALT_SMMU_SECURE_SMMU_CB31_PMCNTENSE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMCNTENSE_OFST))
9452 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMCNTENCLR register for the ALT_SMMU_SECURE instance. */
9453 #define ALT_SMMU_SECURE_SMMU_CB31_PMCNTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMCNTENCLR_OFST))
9454 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMCNTENSET register for the ALT_SMMU_SECURE instance. */
9455 #define ALT_SMMU_SECURE_SMMU_CB31_PMCNTENSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMCNTENSET_OFST))
9456 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMINTENCLR register for the ALT_SMMU_SECURE instance. */
9457 #define ALT_SMMU_SECURE_SMMU_CB31_PMINTENCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMINTENCLR_OFST))
9458 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMOVSCLR register for the ALT_SMMU_SECURE instance. */
9459 #define ALT_SMMU_SECURE_SMMU_CB31_PMOVSCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMOVSCLR_OFST))
9460 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMOVSSET register for the ALT_SMMU_SECURE instance. */
9461 #define ALT_SMMU_SECURE_SMMU_CB31_PMOVSSET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMOVSSET_OFST))
9462 /* The address of the ALT_SMMU_SECURE_SMMU_CB31_PMAUTHSTATUS register for the ALT_SMMU_SECURE instance. */
9463 #define ALT_SMMU_SECURE_SMMU_CB31_PMAUTHSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + ALT_SMMU_SECURE_SMMU_CB31_PMAUTHSTATUS_OFST))
9464 /* The base address byte offset for the start of the ALT_SMMU_SECURE component. */
9465 #define ALT_SMMU_SECURE_OFST 0xfa000000
9466 /* The start address of the ALT_SMMU_SECURE component. */
9467 #define ALT_SMMU_SECURE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SMMU_SECURE_OFST))
9468 /* The lower bound address range of the ALT_SMMU_SECURE component. */
9469 #define ALT_SMMU_SECURE_LB_ADDR ALT_SMMU_SECURE_ADDR
9470 /* The upper bound address range of the ALT_SMMU_SECURE component. */
9471 #define ALT_SMMU_SECURE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SMMU_SECURE_ADDR) + 0x40000) - 1))
9472 
9473 
9474 /*
9475  * Component Instance : cs_stm
9476  *
9477  * Instance cs_stm of component ALT_CS_STM.
9478  *
9479  *
9480  */
9481 /* The base address byte offset for the start of the ALT_CS_STM component. */
9482 #define ALT_CS_STM_OFST 0xfc000000
9483 /* The start address of the ALT_CS_STM component. */
9484 #define ALT_CS_STM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CS_STM_OFST))
9485 /* The lower bound address range of the ALT_CS_STM component. */
9486 #define ALT_CS_STM_LB_ADDR ALT_CS_STM_ADDR
9487 /* The upper bound address range of the ALT_CS_STM component. */
9488 #define ALT_CS_STM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CS_STM_ADDR) + 0x400000) - 1))
9489 
9490 
9491 /*
9492  * Component Instance : cs_dap_sysdbg
9493  *
9494  * Instance cs_dap_sysdbg of component ALT_CS_DAP_SYSDBG.
9495  *
9496  *
9497  */
9498 /* The base address byte offset for the start of the ALT_CS_DAP_SYSDBG component. */
9499 #define ALT_CS_DAP_SYSDBG_OFST 0xff000000
9500 /* The start address of the ALT_CS_DAP_SYSDBG component. */
9501 #define ALT_CS_DAP_SYSDBG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CS_DAP_SYSDBG_OFST))
9502 /* The lower bound address range of the ALT_CS_DAP_SYSDBG component. */
9503 #define ALT_CS_DAP_SYSDBG_LB_ADDR ALT_CS_DAP_SYSDBG_ADDR
9504 /* The upper bound address range of the ALT_CS_DAP_SYSDBG component. */
9505 #define ALT_CS_DAP_SYSDBG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CS_DAP_SYSDBG_ADDR) + 0x200000) - 1))
9506 
9507 
9508 /*
9509  * Component Instance : emac0
9510  *
9511  * Instance emac0 of component ALT_EMAC.
9512  *
9513  *
9514  */
9515 /* The address of the ALT_EMAC_GMACGRP_MAC_CONFIGURATION register for the ALT_EMAC0 instance. */
9516 #define ALT_EMAC0_GMACGRP_MAC_CONFIGURATION_ADDR ALT_EMAC_GMACGRP_MAC_CONFIGURATION_ADDR(ALT_EMAC0_ADDR)
9517 /* The address of the ALT_EMAC_GMACGRP_MAC_FRAME_FILTER register for the ALT_EMAC0 instance. */
9518 #define ALT_EMAC0_GMACGRP_MAC_FRAME_FILTER_ADDR ALT_EMAC_GMACGRP_MAC_FRAME_FILTER_ADDR(ALT_EMAC0_ADDR)
9519 /* The address of the ALT_EMAC_GMACGRP_GMII_ADDRESS register for the ALT_EMAC0 instance. */
9520 #define ALT_EMAC0_GMACGRP_GMII_ADDRESS_ADDR ALT_EMAC_GMACGRP_GMII_ADDRESS_ADDR(ALT_EMAC0_ADDR)
9521 /* The address of the ALT_EMAC_GMACGRP_GMII_DATA register for the ALT_EMAC0 instance. */
9522 #define ALT_EMAC0_GMACGRP_GMII_DATA_ADDR ALT_EMAC_GMACGRP_GMII_DATA_ADDR(ALT_EMAC0_ADDR)
9523 /* The address of the ALT_EMAC_GMACGRP_FLOW_CONTROL register for the ALT_EMAC0 instance. */
9524 #define ALT_EMAC0_GMACGRP_FLOW_CONTROL_ADDR ALT_EMAC_GMACGRP_FLOW_CONTROL_ADDR(ALT_EMAC0_ADDR)
9525 /* The address of the ALT_EMAC_GMACGRP_VLAN_TAG register for the ALT_EMAC0 instance. */
9526 #define ALT_EMAC0_GMACGRP_VLAN_TAG_ADDR ALT_EMAC_GMACGRP_VLAN_TAG_ADDR(ALT_EMAC0_ADDR)
9527 /* The address of the ALT_EMAC_GMACGRP_VERSION register for the ALT_EMAC0 instance. */
9528 #define ALT_EMAC0_GMACGRP_VERSION_ADDR ALT_EMAC_GMACGRP_VERSION_ADDR(ALT_EMAC0_ADDR)
9529 /* The address of the ALT_EMAC_GMACGRP_DEBUG register for the ALT_EMAC0 instance. */
9530 #define ALT_EMAC0_GMACGRP_DEBUG_ADDR ALT_EMAC_GMACGRP_DEBUG_ADDR(ALT_EMAC0_ADDR)
9531 /* The address of the ALT_EMAC_GMACGRP_LPI_CONTROL_STATUS register for the ALT_EMAC0 instance. */
9532 #define ALT_EMAC0_GMACGRP_LPI_CONTROL_STATUS_ADDR ALT_EMAC_GMACGRP_LPI_CONTROL_STATUS_ADDR(ALT_EMAC0_ADDR)
9533 /* The address of the ALT_EMAC_GMACGRP_LPI_TIMERS_CONTROL register for the ALT_EMAC0 instance. */
9534 #define ALT_EMAC0_GMACGRP_LPI_TIMERS_CONTROL_ADDR ALT_EMAC_GMACGRP_LPI_TIMERS_CONTROL_ADDR(ALT_EMAC0_ADDR)
9535 /* The address of the ALT_EMAC_GMACGRP_INTERRUPT_STATUS register for the ALT_EMAC0 instance. */
9536 #define ALT_EMAC0_GMACGRP_INTERRUPT_STATUS_ADDR ALT_EMAC_GMACGRP_INTERRUPT_STATUS_ADDR(ALT_EMAC0_ADDR)
9537 /* The address of the ALT_EMAC_GMACGRP_INTERRUPT_MASK register for the ALT_EMAC0 instance. */
9538 #define ALT_EMAC0_GMACGRP_INTERRUPT_MASK_ADDR ALT_EMAC_GMACGRP_INTERRUPT_MASK_ADDR(ALT_EMAC0_ADDR)
9539 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS0_HIGH register for the ALT_EMAC0 instance. */
9540 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS0_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS0_HIGH_ADDR(ALT_EMAC0_ADDR)
9541 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS0_LOW register for the ALT_EMAC0 instance. */
9542 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS0_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS0_LOW_ADDR(ALT_EMAC0_ADDR)
9543 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS1_HIGH register for the ALT_EMAC0 instance. */
9544 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS1_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS1_HIGH_ADDR(ALT_EMAC0_ADDR)
9545 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS1_LOW register for the ALT_EMAC0 instance. */
9546 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS1_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS1_LOW_ADDR(ALT_EMAC0_ADDR)
9547 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS2_HIGH register for the ALT_EMAC0 instance. */
9548 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS2_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS2_HIGH_ADDR(ALT_EMAC0_ADDR)
9549 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS2_LOW register for the ALT_EMAC0 instance. */
9550 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS2_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS2_LOW_ADDR(ALT_EMAC0_ADDR)
9551 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS3_HIGH register for the ALT_EMAC0 instance. */
9552 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS3_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS3_HIGH_ADDR(ALT_EMAC0_ADDR)
9553 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS3_LOW register for the ALT_EMAC0 instance. */
9554 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS3_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS3_LOW_ADDR(ALT_EMAC0_ADDR)
9555 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS4_HIGH register for the ALT_EMAC0 instance. */
9556 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS4_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS4_HIGH_ADDR(ALT_EMAC0_ADDR)
9557 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS4_LOW register for the ALT_EMAC0 instance. */
9558 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS4_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS4_LOW_ADDR(ALT_EMAC0_ADDR)
9559 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS5_HIGH register for the ALT_EMAC0 instance. */
9560 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS5_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS5_HIGH_ADDR(ALT_EMAC0_ADDR)
9561 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS5_LOW register for the ALT_EMAC0 instance. */
9562 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS5_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS5_LOW_ADDR(ALT_EMAC0_ADDR)
9563 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS6_HIGH register for the ALT_EMAC0 instance. */
9564 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS6_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS6_HIGH_ADDR(ALT_EMAC0_ADDR)
9565 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS6_LOW register for the ALT_EMAC0 instance. */
9566 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS6_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS6_LOW_ADDR(ALT_EMAC0_ADDR)
9567 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS7_HIGH register for the ALT_EMAC0 instance. */
9568 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS7_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS7_HIGH_ADDR(ALT_EMAC0_ADDR)
9569 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS7_LOW register for the ALT_EMAC0 instance. */
9570 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS7_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS7_LOW_ADDR(ALT_EMAC0_ADDR)
9571 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS8_HIGH register for the ALT_EMAC0 instance. */
9572 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS8_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS8_HIGH_ADDR(ALT_EMAC0_ADDR)
9573 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS8_LOW register for the ALT_EMAC0 instance. */
9574 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS8_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS8_LOW_ADDR(ALT_EMAC0_ADDR)
9575 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS9_HIGH register for the ALT_EMAC0 instance. */
9576 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS9_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS9_HIGH_ADDR(ALT_EMAC0_ADDR)
9577 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS9_LOW register for the ALT_EMAC0 instance. */
9578 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS9_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS9_LOW_ADDR(ALT_EMAC0_ADDR)
9579 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS10_HIGH register for the ALT_EMAC0 instance. */
9580 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS10_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS10_HIGH_ADDR(ALT_EMAC0_ADDR)
9581 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS10_LOW register for the ALT_EMAC0 instance. */
9582 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS10_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS10_LOW_ADDR(ALT_EMAC0_ADDR)
9583 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS11_HIGH register for the ALT_EMAC0 instance. */
9584 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS11_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS11_HIGH_ADDR(ALT_EMAC0_ADDR)
9585 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS11_LOW register for the ALT_EMAC0 instance. */
9586 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS11_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS11_LOW_ADDR(ALT_EMAC0_ADDR)
9587 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS12_HIGH register for the ALT_EMAC0 instance. */
9588 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS12_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS12_HIGH_ADDR(ALT_EMAC0_ADDR)
9589 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS12_LOW register for the ALT_EMAC0 instance. */
9590 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS12_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS12_LOW_ADDR(ALT_EMAC0_ADDR)
9591 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS13_HIGH register for the ALT_EMAC0 instance. */
9592 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS13_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS13_HIGH_ADDR(ALT_EMAC0_ADDR)
9593 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS13_LOW register for the ALT_EMAC0 instance. */
9594 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS13_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS13_LOW_ADDR(ALT_EMAC0_ADDR)
9595 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS14_HIGH register for the ALT_EMAC0 instance. */
9596 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS14_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS14_HIGH_ADDR(ALT_EMAC0_ADDR)
9597 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS14_LOW register for the ALT_EMAC0 instance. */
9598 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS14_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS14_LOW_ADDR(ALT_EMAC0_ADDR)
9599 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS15_HIGH register for the ALT_EMAC0 instance. */
9600 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS15_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS15_HIGH_ADDR(ALT_EMAC0_ADDR)
9601 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS15_LOW register for the ALT_EMAC0 instance. */
9602 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS15_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS15_LOW_ADDR(ALT_EMAC0_ADDR)
9603 /* The address of the ALT_EMAC_GMACGRP_SGMII_RGMII_SMII_CONTROL_STATUS register for the ALT_EMAC0 instance. */
9604 #define ALT_EMAC0_GMACGRP_SGMII_RGMII_SMII_CONTROL_STATUS_ADDR ALT_EMAC_GMACGRP_SGMII_RGMII_SMII_CONTROL_STATUS_ADDR(ALT_EMAC0_ADDR)
9605 /* The address of the ALT_EMAC_GMACGRP_WDOG_TIMEOUT register for the ALT_EMAC0 instance. */
9606 #define ALT_EMAC0_GMACGRP_WDOG_TIMEOUT_ADDR ALT_EMAC_GMACGRP_WDOG_TIMEOUT_ADDR(ALT_EMAC0_ADDR)
9607 /* The address of the ALT_EMAC_GMACGRP_GENPIO register for the ALT_EMAC0 instance. */
9608 #define ALT_EMAC0_GMACGRP_GENPIO_ADDR ALT_EMAC_GMACGRP_GENPIO_ADDR(ALT_EMAC0_ADDR)
9609 /* The address of the ALT_EMAC_GMACGRP_MMC_CONTROL register for the ALT_EMAC0 instance. */
9610 #define ALT_EMAC0_GMACGRP_MMC_CONTROL_ADDR ALT_EMAC_GMACGRP_MMC_CONTROL_ADDR(ALT_EMAC0_ADDR)
9611 /* The address of the ALT_EMAC_GMACGRP_MMC_RECEIVE_INTERRUPT register for the ALT_EMAC0 instance. */
9612 #define ALT_EMAC0_GMACGRP_MMC_RECEIVE_INTERRUPT_ADDR ALT_EMAC_GMACGRP_MMC_RECEIVE_INTERRUPT_ADDR(ALT_EMAC0_ADDR)
9613 /* The address of the ALT_EMAC_GMACGRP_MMC_TRANSMIT_INTERRUPT register for the ALT_EMAC0 instance. */
9614 #define ALT_EMAC0_GMACGRP_MMC_TRANSMIT_INTERRUPT_ADDR ALT_EMAC_GMACGRP_MMC_TRANSMIT_INTERRUPT_ADDR(ALT_EMAC0_ADDR)
9615 /* The address of the ALT_EMAC_GMACGRP_MMC_RECEIVE_INTERRUPT_MASK register for the ALT_EMAC0 instance. */
9616 #define ALT_EMAC0_GMACGRP_MMC_RECEIVE_INTERRUPT_MASK_ADDR ALT_EMAC_GMACGRP_MMC_RECEIVE_INTERRUPT_MASK_ADDR(ALT_EMAC0_ADDR)
9617 /* The address of the ALT_EMAC_GMACGRP_MMC_TRANSMIT_INTERRUPT_MASK register for the ALT_EMAC0 instance. */
9618 #define ALT_EMAC0_GMACGRP_MMC_TRANSMIT_INTERRUPT_MASK_ADDR ALT_EMAC_GMACGRP_MMC_TRANSMIT_INTERRUPT_MASK_ADDR(ALT_EMAC0_ADDR)
9619 /* The address of the ALT_EMAC_GMACGRP_TXOCTETCOUNT_GB register for the ALT_EMAC0 instance. */
9620 #define ALT_EMAC0_GMACGRP_TXOCTETCOUNT_GB_ADDR ALT_EMAC_GMACGRP_TXOCTETCOUNT_GB_ADDR(ALT_EMAC0_ADDR)
9621 /* The address of the ALT_EMAC_GMACGRP_TXFRAMECOUNT_GB register for the ALT_EMAC0 instance. */
9622 #define ALT_EMAC0_GMACGRP_TXFRAMECOUNT_GB_ADDR ALT_EMAC_GMACGRP_TXFRAMECOUNT_GB_ADDR(ALT_EMAC0_ADDR)
9623 /* The address of the ALT_EMAC_GMACGRP_TXBROADCASTFRAMES_G register for the ALT_EMAC0 instance. */
9624 #define ALT_EMAC0_GMACGRP_TXBROADCASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_TXBROADCASTFRAMES_G_ADDR(ALT_EMAC0_ADDR)
9625 /* The address of the ALT_EMAC_GMACGRP_TXMULTICASTFRAMES_G register for the ALT_EMAC0 instance. */
9626 #define ALT_EMAC0_GMACGRP_TXMULTICASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_TXMULTICASTFRAMES_G_ADDR(ALT_EMAC0_ADDR)
9627 /* The address of the ALT_EMAC_GMACGRP_TX64OCTETS_GB register for the ALT_EMAC0 instance. */
9628 #define ALT_EMAC0_GMACGRP_TX64OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX64OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
9629 /* The address of the ALT_EMAC_GMACGRP_TX65TO127OCTETS_GB register for the ALT_EMAC0 instance. */
9630 #define ALT_EMAC0_GMACGRP_TX65TO127OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX65TO127OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
9631 /* The address of the ALT_EMAC_GMACGRP_TX128TO255OCTETS_GB register for the ALT_EMAC0 instance. */
9632 #define ALT_EMAC0_GMACGRP_TX128TO255OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX128TO255OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
9633 /* The address of the ALT_EMAC_GMACGRP_TX256TO511OCTETS_GB register for the ALT_EMAC0 instance. */
9634 #define ALT_EMAC0_GMACGRP_TX256TO511OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX256TO511OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
9635 /* The address of the ALT_EMAC_GMACGRP_TX512TO1023OCTETS_GB register for the ALT_EMAC0 instance. */
9636 #define ALT_EMAC0_GMACGRP_TX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX512TO1023OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
9637 /* The address of the ALT_EMAC_GMACGRP_TX1024TOMAXOCTETS_GB register for the ALT_EMAC0 instance. */
9638 #define ALT_EMAC0_GMACGRP_TX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC0_ADDR)
9639 /* The address of the ALT_EMAC_GMACGRP_TXUNICASTFRAMES_GB register for the ALT_EMAC0 instance. */
9640 #define ALT_EMAC0_GMACGRP_TXUNICASTFRAMES_GB_ADDR ALT_EMAC_GMACGRP_TXUNICASTFRAMES_GB_ADDR(ALT_EMAC0_ADDR)
9641 /* The address of the ALT_EMAC_GMACGRP_TXMULTICASTFRAMES_GB register for the ALT_EMAC0 instance. */
9642 #define ALT_EMAC0_GMACGRP_TXMULTICASTFRAMES_GB_ADDR ALT_EMAC_GMACGRP_TXMULTICASTFRAMES_GB_ADDR(ALT_EMAC0_ADDR)
9643 /* The address of the ALT_EMAC_GMACGRP_TXBROADCASTFRAMES_GB register for the ALT_EMAC0 instance. */
9644 #define ALT_EMAC0_GMACGRP_TXBROADCASTFRAMES_GB_ADDR ALT_EMAC_GMACGRP_TXBROADCASTFRAMES_GB_ADDR(ALT_EMAC0_ADDR)
9645 /* The address of the ALT_EMAC_GMACGRP_TXUNDERFLOWERROR register for the ALT_EMAC0 instance. */
9646 #define ALT_EMAC0_GMACGRP_TXUNDERFLOWERROR_ADDR ALT_EMAC_GMACGRP_TXUNDERFLOWERROR_ADDR(ALT_EMAC0_ADDR)
9647 /* The address of the ALT_EMAC_GMACGRP_TXSINGLECOL_G register for the ALT_EMAC0 instance. */
9648 #define ALT_EMAC0_GMACGRP_TXSINGLECOL_G_ADDR ALT_EMAC_GMACGRP_TXSINGLECOL_G_ADDR(ALT_EMAC0_ADDR)
9649 /* The address of the ALT_EMAC_GMACGRP_TXMULTICOL_G register for the ALT_EMAC0 instance. */
9650 #define ALT_EMAC0_GMACGRP_TXMULTICOL_G_ADDR ALT_EMAC_GMACGRP_TXMULTICOL_G_ADDR(ALT_EMAC0_ADDR)
9651 /* The address of the ALT_EMAC_GMACGRP_TXDEFERRED register for the ALT_EMAC0 instance. */
9652 #define ALT_EMAC0_GMACGRP_TXDEFERRED_ADDR ALT_EMAC_GMACGRP_TXDEFERRED_ADDR(ALT_EMAC0_ADDR)
9653 /* The address of the ALT_EMAC_GMACGRP_TXLATECOL register for the ALT_EMAC0 instance. */
9654 #define ALT_EMAC0_GMACGRP_TXLATECOL_ADDR ALT_EMAC_GMACGRP_TXLATECOL_ADDR(ALT_EMAC0_ADDR)
9655 /* The address of the ALT_EMAC_GMACGRP_TXEXESSCOL register for the ALT_EMAC0 instance. */
9656 #define ALT_EMAC0_GMACGRP_TXEXESSCOL_ADDR ALT_EMAC_GMACGRP_TXEXESSCOL_ADDR(ALT_EMAC0_ADDR)
9657 /* The address of the ALT_EMAC_GMACGRP_TXCARRIERERR register for the ALT_EMAC0 instance. */
9658 #define ALT_EMAC0_GMACGRP_TXCARRIERERR_ADDR ALT_EMAC_GMACGRP_TXCARRIERERR_ADDR(ALT_EMAC0_ADDR)
9659 /* The address of the ALT_EMAC_GMACGRP_TXOCTETCNT register for the ALT_EMAC0 instance. */
9660 #define ALT_EMAC0_GMACGRP_TXOCTETCNT_ADDR ALT_EMAC_GMACGRP_TXOCTETCNT_ADDR(ALT_EMAC0_ADDR)
9661 /* The address of the ALT_EMAC_GMACGRP_TXFRAMECOUNT_G register for the ALT_EMAC0 instance. */
9662 #define ALT_EMAC0_GMACGRP_TXFRAMECOUNT_G_ADDR ALT_EMAC_GMACGRP_TXFRAMECOUNT_G_ADDR(ALT_EMAC0_ADDR)
9663 /* The address of the ALT_EMAC_GMACGRP_TXEXCESSDEF register for the ALT_EMAC0 instance. */
9664 #define ALT_EMAC0_GMACGRP_TXEXCESSDEF_ADDR ALT_EMAC_GMACGRP_TXEXCESSDEF_ADDR(ALT_EMAC0_ADDR)
9665 /* The address of the ALT_EMAC_GMACGRP_TXPAUSEFRAMES register for the ALT_EMAC0 instance. */
9666 #define ALT_EMAC0_GMACGRP_TXPAUSEFRAMES_ADDR ALT_EMAC_GMACGRP_TXPAUSEFRAMES_ADDR(ALT_EMAC0_ADDR)
9667 /* The address of the ALT_EMAC_GMACGRP_TXVLANFRAMES_G register for the ALT_EMAC0 instance. */
9668 #define ALT_EMAC0_GMACGRP_TXVLANFRAMES_G_ADDR ALT_EMAC_GMACGRP_TXVLANFRAMES_G_ADDR(ALT_EMAC0_ADDR)
9669 /* The address of the ALT_EMAC_GMACGRP_TXOVERSIZE_G register for the ALT_EMAC0 instance. */
9670 #define ALT_EMAC0_GMACGRP_TXOVERSIZE_G_ADDR ALT_EMAC_GMACGRP_TXOVERSIZE_G_ADDR(ALT_EMAC0_ADDR)
9671 /* The address of the ALT_EMAC_GMACGRP_RXFRAMECOUNT_GB register for the ALT_EMAC0 instance. */
9672 #define ALT_EMAC0_GMACGRP_RXFRAMECOUNT_GB_ADDR ALT_EMAC_GMACGRP_RXFRAMECOUNT_GB_ADDR(ALT_EMAC0_ADDR)
9673 /* The address of the ALT_EMAC_GMACGRP_RXOCTETCOUNT_GB register for the ALT_EMAC0 instance. */
9674 #define ALT_EMAC0_GMACGRP_RXOCTETCOUNT_GB_ADDR ALT_EMAC_GMACGRP_RXOCTETCOUNT_GB_ADDR(ALT_EMAC0_ADDR)
9675 /* The address of the ALT_EMAC_GMACGRP_RXOCTETCOUNT_G register for the ALT_EMAC0 instance. */
9676 #define ALT_EMAC0_GMACGRP_RXOCTETCOUNT_G_ADDR ALT_EMAC_GMACGRP_RXOCTETCOUNT_G_ADDR(ALT_EMAC0_ADDR)
9677 /* The address of the ALT_EMAC_GMACGRP_RXBROADCASTFRAMES_G register for the ALT_EMAC0 instance. */
9678 #define ALT_EMAC0_GMACGRP_RXBROADCASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_RXBROADCASTFRAMES_G_ADDR(ALT_EMAC0_ADDR)
9679 /* The address of the ALT_EMAC_GMACGRP_RXMULTICASTFRAMES_G register for the ALT_EMAC0 instance. */
9680 #define ALT_EMAC0_GMACGRP_RXMULTICASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_RXMULTICASTFRAMES_G_ADDR(ALT_EMAC0_ADDR)
9681 /* The address of the ALT_EMAC_GMACGRP_RXCRCERROR register for the ALT_EMAC0 instance. */
9682 #define ALT_EMAC0_GMACGRP_RXCRCERROR_ADDR ALT_EMAC_GMACGRP_RXCRCERROR_ADDR(ALT_EMAC0_ADDR)
9683 /* The address of the ALT_EMAC_GMACGRP_RXALIGNMENTERROR register for the ALT_EMAC0 instance. */
9684 #define ALT_EMAC0_GMACGRP_RXALIGNMENTERROR_ADDR ALT_EMAC_GMACGRP_RXALIGNMENTERROR_ADDR(ALT_EMAC0_ADDR)
9685 /* The address of the ALT_EMAC_GMACGRP_RXRUNTERROR register for the ALT_EMAC0 instance. */
9686 #define ALT_EMAC0_GMACGRP_RXRUNTERROR_ADDR ALT_EMAC_GMACGRP_RXRUNTERROR_ADDR(ALT_EMAC0_ADDR)
9687 /* The address of the ALT_EMAC_GMACGRP_RXJABBERERROR register for the ALT_EMAC0 instance. */
9688 #define ALT_EMAC0_GMACGRP_RXJABBERERROR_ADDR ALT_EMAC_GMACGRP_RXJABBERERROR_ADDR(ALT_EMAC0_ADDR)
9689 /* The address of the ALT_EMAC_GMACGRP_RXUNDERSIZE_G register for the ALT_EMAC0 instance. */
9690 #define ALT_EMAC0_GMACGRP_RXUNDERSIZE_G_ADDR ALT_EMAC_GMACGRP_RXUNDERSIZE_G_ADDR(ALT_EMAC0_ADDR)
9691 /* The address of the ALT_EMAC_GMACGRP_RXOVERSIZE_G register for the ALT_EMAC0 instance. */
9692 #define ALT_EMAC0_GMACGRP_RXOVERSIZE_G_ADDR ALT_EMAC_GMACGRP_RXOVERSIZE_G_ADDR(ALT_EMAC0_ADDR)
9693 /* The address of the ALT_EMAC_GMACGRP_RX64OCTETS_GB register for the ALT_EMAC0 instance. */
9694 #define ALT_EMAC0_GMACGRP_RX64OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX64OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
9695 /* The address of the ALT_EMAC_GMACGRP_RX65TO127OCTETS_GB register for the ALT_EMAC0 instance. */
9696 #define ALT_EMAC0_GMACGRP_RX65TO127OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX65TO127OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
9697 /* The address of the ALT_EMAC_GMACGRP_RX128TO255OCTETS_GB register for the ALT_EMAC0 instance. */
9698 #define ALT_EMAC0_GMACGRP_RX128TO255OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX128TO255OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
9699 /* The address of the ALT_EMAC_GMACGRP_RX256TO511OCTETS_GB register for the ALT_EMAC0 instance. */
9700 #define ALT_EMAC0_GMACGRP_RX256TO511OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX256TO511OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
9701 /* The address of the ALT_EMAC_GMACGRP_RX512TO1023OCTETS_GB register for the ALT_EMAC0 instance. */
9702 #define ALT_EMAC0_GMACGRP_RX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX512TO1023OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
9703 /* The address of the ALT_EMAC_GMACGRP_RX1024TOMAXOCTETS_GB register for the ALT_EMAC0 instance. */
9704 #define ALT_EMAC0_GMACGRP_RX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC0_ADDR)
9705 /* The address of the ALT_EMAC_GMACGRP_RXUNICASTFRAMES_G register for the ALT_EMAC0 instance. */
9706 #define ALT_EMAC0_GMACGRP_RXUNICASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_RXUNICASTFRAMES_G_ADDR(ALT_EMAC0_ADDR)
9707 /* The address of the ALT_EMAC_GMACGRP_RXLENGTHERROR register for the ALT_EMAC0 instance. */
9708 #define ALT_EMAC0_GMACGRP_RXLENGTHERROR_ADDR ALT_EMAC_GMACGRP_RXLENGTHERROR_ADDR(ALT_EMAC0_ADDR)
9709 /* The address of the ALT_EMAC_GMACGRP_RXOUTOFRANGETYPE register for the ALT_EMAC0 instance. */
9710 #define ALT_EMAC0_GMACGRP_RXOUTOFRANGETYPE_ADDR ALT_EMAC_GMACGRP_RXOUTOFRANGETYPE_ADDR(ALT_EMAC0_ADDR)
9711 /* The address of the ALT_EMAC_GMACGRP_RXPAUSEFRAMES register for the ALT_EMAC0 instance. */
9712 #define ALT_EMAC0_GMACGRP_RXPAUSEFRAMES_ADDR ALT_EMAC_GMACGRP_RXPAUSEFRAMES_ADDR(ALT_EMAC0_ADDR)
9713 /* The address of the ALT_EMAC_GMACGRP_RXFIFOOVERFLOW register for the ALT_EMAC0 instance. */
9714 #define ALT_EMAC0_GMACGRP_RXFIFOOVERFLOW_ADDR ALT_EMAC_GMACGRP_RXFIFOOVERFLOW_ADDR(ALT_EMAC0_ADDR)
9715 /* The address of the ALT_EMAC_GMACGRP_RXVLANFRAMES_GB register for the ALT_EMAC0 instance. */
9716 #define ALT_EMAC0_GMACGRP_RXVLANFRAMES_GB_ADDR ALT_EMAC_GMACGRP_RXVLANFRAMES_GB_ADDR(ALT_EMAC0_ADDR)
9717 /* The address of the ALT_EMAC_GMACGRP_RXWATCHDOGERROR register for the ALT_EMAC0 instance. */
9718 #define ALT_EMAC0_GMACGRP_RXWATCHDOGERROR_ADDR ALT_EMAC_GMACGRP_RXWATCHDOGERROR_ADDR(ALT_EMAC0_ADDR)
9719 /* The address of the ALT_EMAC_GMACGRP_RXRCVERROR register for the ALT_EMAC0 instance. */
9720 #define ALT_EMAC0_GMACGRP_RXRCVERROR_ADDR ALT_EMAC_GMACGRP_RXRCVERROR_ADDR(ALT_EMAC0_ADDR)
9721 /* The address of the ALT_EMAC_GMACGRP_RXCTRLFRAMES_G register for the ALT_EMAC0 instance. */
9722 #define ALT_EMAC0_GMACGRP_RXCTRLFRAMES_G_ADDR ALT_EMAC_GMACGRP_RXCTRLFRAMES_G_ADDR(ALT_EMAC0_ADDR)
9723 /* The address of the ALT_EMAC_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_MASK register for the ALT_EMAC0 instance. */
9724 #define ALT_EMAC0_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_MASK_ADDR ALT_EMAC_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_MASK_ADDR(ALT_EMAC0_ADDR)
9725 /* The address of the ALT_EMAC_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT register for the ALT_EMAC0 instance. */
9726 #define ALT_EMAC0_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_ADDR ALT_EMAC_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_ADDR(ALT_EMAC0_ADDR)
9727 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_GD_FRMS register for the ALT_EMAC0 instance. */
9728 #define ALT_EMAC0_GMACGRP_RXIPV4_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
9729 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_HDRERR_FRMS register for the ALT_EMAC0 instance. */
9730 #define ALT_EMAC0_GMACGRP_RXIPV4_HDRERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_HDRERR_FRMS_ADDR(ALT_EMAC0_ADDR)
9731 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_NOPAY_FRMS register for the ALT_EMAC0 instance. */
9732 #define ALT_EMAC0_GMACGRP_RXIPV4_NOPAY_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_NOPAY_FRMS_ADDR(ALT_EMAC0_ADDR)
9733 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_FRAG_FRMS register for the ALT_EMAC0 instance. */
9734 #define ALT_EMAC0_GMACGRP_RXIPV4_FRAG_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_FRAG_FRMS_ADDR(ALT_EMAC0_ADDR)
9735 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_UDSBL_FRMS register for the ALT_EMAC0 instance. */
9736 #define ALT_EMAC0_GMACGRP_RXIPV4_UDSBL_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_UDSBL_FRMS_ADDR(ALT_EMAC0_ADDR)
9737 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_GD_FRMS register for the ALT_EMAC0 instance. */
9738 #define ALT_EMAC0_GMACGRP_RXIPV6_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV6_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
9739 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_HDRERR_FRMS register for the ALT_EMAC0 instance. */
9740 #define ALT_EMAC0_GMACGRP_RXIPV6_HDRERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV6_HDRERR_FRMS_ADDR(ALT_EMAC0_ADDR)
9741 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_NOPAY_FRMS register for the ALT_EMAC0 instance. */
9742 #define ALT_EMAC0_GMACGRP_RXIPV6_NOPAY_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV6_NOPAY_FRMS_ADDR(ALT_EMAC0_ADDR)
9743 /* The address of the ALT_EMAC_GMACGRP_RXUDP_GD_FRMS register for the ALT_EMAC0 instance. */
9744 #define ALT_EMAC0_GMACGRP_RXUDP_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXUDP_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
9745 /* The address of the ALT_EMAC_GMACGRP_RXUDP_ERR_FRMS register for the ALT_EMAC0 instance. */
9746 #define ALT_EMAC0_GMACGRP_RXUDP_ERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXUDP_ERR_FRMS_ADDR(ALT_EMAC0_ADDR)
9747 /* The address of the ALT_EMAC_GMACGRP_RXTCP_GD_FRMS register for the ALT_EMAC0 instance. */
9748 #define ALT_EMAC0_GMACGRP_RXTCP_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXTCP_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
9749 /* The address of the ALT_EMAC_GMACGRP_RXTCP_ERR_FRMS register for the ALT_EMAC0 instance. */
9750 #define ALT_EMAC0_GMACGRP_RXTCP_ERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXTCP_ERR_FRMS_ADDR(ALT_EMAC0_ADDR)
9751 /* The address of the ALT_EMAC_GMACGRP_RXICMP_GD_FRMS register for the ALT_EMAC0 instance. */
9752 #define ALT_EMAC0_GMACGRP_RXICMP_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXICMP_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
9753 /* The address of the ALT_EMAC_GMACGRP_RXICMP_ERR_FRMS register for the ALT_EMAC0 instance. */
9754 #define ALT_EMAC0_GMACGRP_RXICMP_ERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXICMP_ERR_FRMS_ADDR(ALT_EMAC0_ADDR)
9755 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_GD_OCTETS register for the ALT_EMAC0 instance. */
9756 #define ALT_EMAC0_GMACGRP_RXIPV4_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
9757 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_HDRERR_OCTETS register for the ALT_EMAC0 instance. */
9758 #define ALT_EMAC0_GMACGRP_RXIPV4_HDRERR_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_HDRERR_OCTETS_ADDR(ALT_EMAC0_ADDR)
9759 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_NOPAY_OCTETS register for the ALT_EMAC0 instance. */
9760 #define ALT_EMAC0_GMACGRP_RXIPV4_NOPAY_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_NOPAY_OCTETS_ADDR(ALT_EMAC0_ADDR)
9761 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_FRAG_OCTETS register for the ALT_EMAC0 instance. */
9762 #define ALT_EMAC0_GMACGRP_RXIPV4_FRAG_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_FRAG_OCTETS_ADDR(ALT_EMAC0_ADDR)
9763 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_UDSBL_OCTETS register for the ALT_EMAC0 instance. */
9764 #define ALT_EMAC0_GMACGRP_RXIPV4_UDSBL_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_UDSBL_OCTETS_ADDR(ALT_EMAC0_ADDR)
9765 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_GD_OCTETS register for the ALT_EMAC0 instance. */
9766 #define ALT_EMAC0_GMACGRP_RXIPV6_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV6_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
9767 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_HDRERR_OCTETS register for the ALT_EMAC0 instance. */
9768 #define ALT_EMAC0_GMACGRP_RXIPV6_HDRERR_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV6_HDRERR_OCTETS_ADDR(ALT_EMAC0_ADDR)
9769 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_NOPAY_OCTETS register for the ALT_EMAC0 instance. */
9770 #define ALT_EMAC0_GMACGRP_RXIPV6_NOPAY_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV6_NOPAY_OCTETS_ADDR(ALT_EMAC0_ADDR)
9771 /* The address of the ALT_EMAC_GMACGRP_RXUDP_GD_OCTETS register for the ALT_EMAC0 instance. */
9772 #define ALT_EMAC0_GMACGRP_RXUDP_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXUDP_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
9773 /* The address of the ALT_EMAC_GMACGRP_RXUDP_ERR_OCTETS register for the ALT_EMAC0 instance. */
9774 #define ALT_EMAC0_GMACGRP_RXUDP_ERR_OCTETS_ADDR ALT_EMAC_GMACGRP_RXUDP_ERR_OCTETS_ADDR(ALT_EMAC0_ADDR)
9775 /* The address of the ALT_EMAC_GMACGRP_RXTCP_GD_OCTETS register for the ALT_EMAC0 instance. */
9776 #define ALT_EMAC0_GMACGRP_RXTCP_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXTCP_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
9777 /* The address of the ALT_EMAC_GMACGRP_RXTCPERROCTETS register for the ALT_EMAC0 instance. */
9778 #define ALT_EMAC0_GMACGRP_RXTCPERROCTETS_ADDR ALT_EMAC_GMACGRP_RXTCPERROCTETS_ADDR(ALT_EMAC0_ADDR)
9779 /* The address of the ALT_EMAC_GMACGRP_RXICMP_GD_OCTETS register for the ALT_EMAC0 instance. */
9780 #define ALT_EMAC0_GMACGRP_RXICMP_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXICMP_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
9781 /* The address of the ALT_EMAC_GMACGRP_RXICMP_ERR_OCTETS register for the ALT_EMAC0 instance. */
9782 #define ALT_EMAC0_GMACGRP_RXICMP_ERR_OCTETS_ADDR ALT_EMAC_GMACGRP_RXICMP_ERR_OCTETS_ADDR(ALT_EMAC0_ADDR)
9783 /* The address of the ALT_EMAC_GMACGRP_L3_L4_CONTROL0 register for the ALT_EMAC0 instance. */
9784 #define ALT_EMAC0_GMACGRP_L3_L4_CONTROL0_ADDR ALT_EMAC_GMACGRP_L3_L4_CONTROL0_ADDR(ALT_EMAC0_ADDR)
9785 /* The address of the ALT_EMAC_GMACGRP_LAYER4_ADDRESS0 register for the ALT_EMAC0 instance. */
9786 #define ALT_EMAC0_GMACGRP_LAYER4_ADDRESS0_ADDR ALT_EMAC_GMACGRP_LAYER4_ADDRESS0_ADDR(ALT_EMAC0_ADDR)
9787 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG0 register for the ALT_EMAC0 instance. */
9788 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR0_REG0_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG0_ADDR(ALT_EMAC0_ADDR)
9789 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG0 register for the ALT_EMAC0 instance. */
9790 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR1_REG0_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG0_ADDR(ALT_EMAC0_ADDR)
9791 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG0 register for the ALT_EMAC0 instance. */
9792 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR2_REG0_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG0_ADDR(ALT_EMAC0_ADDR)
9793 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG0 register for the ALT_EMAC0 instance. */
9794 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR3_REG0_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG0_ADDR(ALT_EMAC0_ADDR)
9795 /* The address of the ALT_EMAC_GMACGRP_L3_L4_CONTROL1 register for the ALT_EMAC0 instance. */
9796 #define ALT_EMAC0_GMACGRP_L3_L4_CONTROL1_ADDR ALT_EMAC_GMACGRP_L3_L4_CONTROL1_ADDR(ALT_EMAC0_ADDR)
9797 /* The address of the ALT_EMAC_GMACGRP_LAYER4_ADDRESS1 register for the ALT_EMAC0 instance. */
9798 #define ALT_EMAC0_GMACGRP_LAYER4_ADDRESS1_ADDR ALT_EMAC_GMACGRP_LAYER4_ADDRESS1_ADDR(ALT_EMAC0_ADDR)
9799 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG1 register for the ALT_EMAC0 instance. */
9800 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR0_REG1_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG1_ADDR(ALT_EMAC0_ADDR)
9801 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG1 register for the ALT_EMAC0 instance. */
9802 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR1_REG1_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG1_ADDR(ALT_EMAC0_ADDR)
9803 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG1 register for the ALT_EMAC0 instance. */
9804 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR2_REG1_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG1_ADDR(ALT_EMAC0_ADDR)
9805 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG1 register for the ALT_EMAC0 instance. */
9806 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR3_REG1_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG1_ADDR(ALT_EMAC0_ADDR)
9807 /* The address of the ALT_EMAC_GMACGRP_L3_L4_CONTROL2 register for the ALT_EMAC0 instance. */
9808 #define ALT_EMAC0_GMACGRP_L3_L4_CONTROL2_ADDR ALT_EMAC_GMACGRP_L3_L4_CONTROL2_ADDR(ALT_EMAC0_ADDR)
9809 /* The address of the ALT_EMAC_GMACGRP_LAYER4_ADDRESS2 register for the ALT_EMAC0 instance. */
9810 #define ALT_EMAC0_GMACGRP_LAYER4_ADDRESS2_ADDR ALT_EMAC_GMACGRP_LAYER4_ADDRESS2_ADDR(ALT_EMAC0_ADDR)
9811 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG2 register for the ALT_EMAC0 instance. */
9812 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR0_REG2_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG2_ADDR(ALT_EMAC0_ADDR)
9813 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG2 register for the ALT_EMAC0 instance. */
9814 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR1_REG2_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG2_ADDR(ALT_EMAC0_ADDR)
9815 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG2 register for the ALT_EMAC0 instance. */
9816 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR2_REG2_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG2_ADDR(ALT_EMAC0_ADDR)
9817 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG2 register for the ALT_EMAC0 instance. */
9818 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR3_REG2_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG2_ADDR(ALT_EMAC0_ADDR)
9819 /* The address of the ALT_EMAC_GMACGRP_L3_L4_CONTROL3 register for the ALT_EMAC0 instance. */
9820 #define ALT_EMAC0_GMACGRP_L3_L4_CONTROL3_ADDR ALT_EMAC_GMACGRP_L3_L4_CONTROL3_ADDR(ALT_EMAC0_ADDR)
9821 /* The address of the ALT_EMAC_GMACGRP_LAYER4_ADDRESS3 register for the ALT_EMAC0 instance. */
9822 #define ALT_EMAC0_GMACGRP_LAYER4_ADDRESS3_ADDR ALT_EMAC_GMACGRP_LAYER4_ADDRESS3_ADDR(ALT_EMAC0_ADDR)
9823 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG3 register for the ALT_EMAC0 instance. */
9824 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR0_REG3_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG3_ADDR(ALT_EMAC0_ADDR)
9825 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG3 register for the ALT_EMAC0 instance. */
9826 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR1_REG3_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG3_ADDR(ALT_EMAC0_ADDR)
9827 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG3 register for the ALT_EMAC0 instance. */
9828 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR2_REG3_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG3_ADDR(ALT_EMAC0_ADDR)
9829 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG3 register for the ALT_EMAC0 instance. */
9830 #define ALT_EMAC0_GMACGRP_LAYER3_ADDR3_REG3_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG3_ADDR(ALT_EMAC0_ADDR)
9831 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG0 register for the ALT_EMAC0 instance. */
9832 #define ALT_EMAC0_GMACGRP_HASH_TABLE_REG0_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG0_ADDR(ALT_EMAC0_ADDR)
9833 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG1 register for the ALT_EMAC0 instance. */
9834 #define ALT_EMAC0_GMACGRP_HASH_TABLE_REG1_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG1_ADDR(ALT_EMAC0_ADDR)
9835 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG2 register for the ALT_EMAC0 instance. */
9836 #define ALT_EMAC0_GMACGRP_HASH_TABLE_REG2_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG2_ADDR(ALT_EMAC0_ADDR)
9837 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG3 register for the ALT_EMAC0 instance. */
9838 #define ALT_EMAC0_GMACGRP_HASH_TABLE_REG3_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG3_ADDR(ALT_EMAC0_ADDR)
9839 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG4 register for the ALT_EMAC0 instance. */
9840 #define ALT_EMAC0_GMACGRP_HASH_TABLE_REG4_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG4_ADDR(ALT_EMAC0_ADDR)
9841 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG5 register for the ALT_EMAC0 instance. */
9842 #define ALT_EMAC0_GMACGRP_HASH_TABLE_REG5_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG5_ADDR(ALT_EMAC0_ADDR)
9843 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG6 register for the ALT_EMAC0 instance. */
9844 #define ALT_EMAC0_GMACGRP_HASH_TABLE_REG6_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG6_ADDR(ALT_EMAC0_ADDR)
9845 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG7 register for the ALT_EMAC0 instance. */
9846 #define ALT_EMAC0_GMACGRP_HASH_TABLE_REG7_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG7_ADDR(ALT_EMAC0_ADDR)
9847 /* The address of the ALT_EMAC_GMACGRP_VLAN_INCL_REG register for the ALT_EMAC0 instance. */
9848 #define ALT_EMAC0_GMACGRP_VLAN_INCL_REG_ADDR ALT_EMAC_GMACGRP_VLAN_INCL_REG_ADDR(ALT_EMAC0_ADDR)
9849 /* The address of the ALT_EMAC_GMACGRP_VLAN_HASH_TABLE_REG register for the ALT_EMAC0 instance. */
9850 #define ALT_EMAC0_GMACGRP_VLAN_HASH_TABLE_REG_ADDR ALT_EMAC_GMACGRP_VLAN_HASH_TABLE_REG_ADDR(ALT_EMAC0_ADDR)
9851 /* The address of the ALT_EMAC_GMACGRP_TIMESTAMP_CONTROL register for the ALT_EMAC0 instance. */
9852 #define ALT_EMAC0_GMACGRP_TIMESTAMP_CONTROL_ADDR ALT_EMAC_GMACGRP_TIMESTAMP_CONTROL_ADDR(ALT_EMAC0_ADDR)
9853 /* The address of the ALT_EMAC_GMACGRP_SUB_SECOND_INCREMENT register for the ALT_EMAC0 instance. */
9854 #define ALT_EMAC0_GMACGRP_SUB_SECOND_INCREMENT_ADDR ALT_EMAC_GMACGRP_SUB_SECOND_INCREMENT_ADDR(ALT_EMAC0_ADDR)
9855 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_SECONDS register for the ALT_EMAC0 instance. */
9856 #define ALT_EMAC0_GMACGRP_SYSTEM_TIME_SECONDS_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_SECONDS_ADDR(ALT_EMAC0_ADDR)
9857 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_NANOSECONDS register for the ALT_EMAC0 instance. */
9858 #define ALT_EMAC0_GMACGRP_SYSTEM_TIME_NANOSECONDS_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_NANOSECONDS_ADDR(ALT_EMAC0_ADDR)
9859 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_SECONDS_UPDATE register for the ALT_EMAC0 instance. */
9860 #define ALT_EMAC0_GMACGRP_SYSTEM_TIME_SECONDS_UPDATE_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_SECONDS_UPDATE_ADDR(ALT_EMAC0_ADDR)
9861 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_NANOSECONDS_UPDATE register for the ALT_EMAC0 instance. */
9862 #define ALT_EMAC0_GMACGRP_SYSTEM_TIME_NANOSECONDS_UPDATE_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_NANOSECONDS_UPDATE_ADDR(ALT_EMAC0_ADDR)
9863 /* The address of the ALT_EMAC_GMACGRP_TIMESTAMP_ADDEND register for the ALT_EMAC0 instance. */
9864 #define ALT_EMAC0_GMACGRP_TIMESTAMP_ADDEND_ADDR ALT_EMAC_GMACGRP_TIMESTAMP_ADDEND_ADDR(ALT_EMAC0_ADDR)
9865 /* The address of the ALT_EMAC_GMACGRP_TARGET_TIME_SECONDS register for the ALT_EMAC0 instance. */
9866 #define ALT_EMAC0_GMACGRP_TARGET_TIME_SECONDS_ADDR ALT_EMAC_GMACGRP_TARGET_TIME_SECONDS_ADDR(ALT_EMAC0_ADDR)
9867 /* The address of the ALT_EMAC_GMACGRP_TARGET_TIME_NANOSECONDS register for the ALT_EMAC0 instance. */
9868 #define ALT_EMAC0_GMACGRP_TARGET_TIME_NANOSECONDS_ADDR ALT_EMAC_GMACGRP_TARGET_TIME_NANOSECONDS_ADDR(ALT_EMAC0_ADDR)
9869 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_HIGHER_WORD_SECONDS register for the ALT_EMAC0 instance. */
9870 #define ALT_EMAC0_GMACGRP_SYSTEM_TIME_HIGHER_WORD_SECONDS_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_HIGHER_WORD_SECONDS_ADDR(ALT_EMAC0_ADDR)
9871 /* The address of the ALT_EMAC_GMACGRP_TIMESTAMP_STATUS register for the ALT_EMAC0 instance. */
9872 #define ALT_EMAC0_GMACGRP_TIMESTAMP_STATUS_ADDR ALT_EMAC_GMACGRP_TIMESTAMP_STATUS_ADDR(ALT_EMAC0_ADDR)
9873 /* The address of the ALT_EMAC_GMACGRP_PPS_CONTROL register for the ALT_EMAC0 instance. */
9874 #define ALT_EMAC0_GMACGRP_PPS_CONTROL_ADDR ALT_EMAC_GMACGRP_PPS_CONTROL_ADDR(ALT_EMAC0_ADDR)
9875 /* The address of the ALT_EMAC_GMACGRP_AUXILIARY_TIMESTAMP_NANOSECONDS register for the ALT_EMAC0 instance. */
9876 #define ALT_EMAC0_GMACGRP_AUXILIARY_TIMESTAMP_NANOSECONDS_ADDR ALT_EMAC_GMACGRP_AUXILIARY_TIMESTAMP_NANOSECONDS_ADDR(ALT_EMAC0_ADDR)
9877 /* The address of the ALT_EMAC_GMACGRP_AUXILIARY_TIMESTAMP_SECONDS register for the ALT_EMAC0 instance. */
9878 #define ALT_EMAC0_GMACGRP_AUXILIARY_TIMESTAMP_SECONDS_ADDR ALT_EMAC_GMACGRP_AUXILIARY_TIMESTAMP_SECONDS_ADDR(ALT_EMAC0_ADDR)
9879 /* The address of the ALT_EMAC_GMACGRP_PPS0_INTERVAL register for the ALT_EMAC0 instance. */
9880 #define ALT_EMAC0_GMACGRP_PPS0_INTERVAL_ADDR ALT_EMAC_GMACGRP_PPS0_INTERVAL_ADDR(ALT_EMAC0_ADDR)
9881 /* The address of the ALT_EMAC_GMACGRP_PPS0_WIDTH register for the ALT_EMAC0 instance. */
9882 #define ALT_EMAC0_GMACGRP_PPS0_WIDTH_ADDR ALT_EMAC_GMACGRP_PPS0_WIDTH_ADDR(ALT_EMAC0_ADDR)
9883 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS16_HIGH register for the ALT_EMAC0 instance. */
9884 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS16_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS16_HIGH_ADDR(ALT_EMAC0_ADDR)
9885 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS16_LOW register for the ALT_EMAC0 instance. */
9886 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS16_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS16_LOW_ADDR(ALT_EMAC0_ADDR)
9887 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS17_HIGH register for the ALT_EMAC0 instance. */
9888 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS17_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS17_HIGH_ADDR(ALT_EMAC0_ADDR)
9889 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS17_LOW register for the ALT_EMAC0 instance. */
9890 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS17_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS17_LOW_ADDR(ALT_EMAC0_ADDR)
9891 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS18_HIGH register for the ALT_EMAC0 instance. */
9892 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS18_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS18_HIGH_ADDR(ALT_EMAC0_ADDR)
9893 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS18_LOW register for the ALT_EMAC0 instance. */
9894 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS18_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS18_LOW_ADDR(ALT_EMAC0_ADDR)
9895 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS19_HIGH register for the ALT_EMAC0 instance. */
9896 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS19_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS19_HIGH_ADDR(ALT_EMAC0_ADDR)
9897 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS19_LOW register for the ALT_EMAC0 instance. */
9898 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS19_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS19_LOW_ADDR(ALT_EMAC0_ADDR)
9899 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS20_HIGH register for the ALT_EMAC0 instance. */
9900 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS20_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS20_HIGH_ADDR(ALT_EMAC0_ADDR)
9901 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS20_LOW register for the ALT_EMAC0 instance. */
9902 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS20_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS20_LOW_ADDR(ALT_EMAC0_ADDR)
9903 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS21_HIGH register for the ALT_EMAC0 instance. */
9904 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS21_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS21_HIGH_ADDR(ALT_EMAC0_ADDR)
9905 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS21_LOW register for the ALT_EMAC0 instance. */
9906 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS21_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS21_LOW_ADDR(ALT_EMAC0_ADDR)
9907 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS22_HIGH register for the ALT_EMAC0 instance. */
9908 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS22_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS22_HIGH_ADDR(ALT_EMAC0_ADDR)
9909 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS22_LOW register for the ALT_EMAC0 instance. */
9910 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS22_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS22_LOW_ADDR(ALT_EMAC0_ADDR)
9911 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS23_HIGH register for the ALT_EMAC0 instance. */
9912 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS23_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS23_HIGH_ADDR(ALT_EMAC0_ADDR)
9913 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS23_LOW register for the ALT_EMAC0 instance. */
9914 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS23_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS23_LOW_ADDR(ALT_EMAC0_ADDR)
9915 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS24_HIGH register for the ALT_EMAC0 instance. */
9916 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS24_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS24_HIGH_ADDR(ALT_EMAC0_ADDR)
9917 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS24_LOW register for the ALT_EMAC0 instance. */
9918 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS24_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS24_LOW_ADDR(ALT_EMAC0_ADDR)
9919 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS25_HIGH register for the ALT_EMAC0 instance. */
9920 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS25_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS25_HIGH_ADDR(ALT_EMAC0_ADDR)
9921 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS25_LOW register for the ALT_EMAC0 instance. */
9922 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS25_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS25_LOW_ADDR(ALT_EMAC0_ADDR)
9923 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS26_HIGH register for the ALT_EMAC0 instance. */
9924 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS26_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS26_HIGH_ADDR(ALT_EMAC0_ADDR)
9925 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS26_LOW register for the ALT_EMAC0 instance. */
9926 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS26_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS26_LOW_ADDR(ALT_EMAC0_ADDR)
9927 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS27_HIGH register for the ALT_EMAC0 instance. */
9928 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS27_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS27_HIGH_ADDR(ALT_EMAC0_ADDR)
9929 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS27_LOW register for the ALT_EMAC0 instance. */
9930 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS27_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS27_LOW_ADDR(ALT_EMAC0_ADDR)
9931 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS28_HIGH register for the ALT_EMAC0 instance. */
9932 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS28_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS28_HIGH_ADDR(ALT_EMAC0_ADDR)
9933 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS28_LOW register for the ALT_EMAC0 instance. */
9934 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS28_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS28_LOW_ADDR(ALT_EMAC0_ADDR)
9935 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS29_HIGH register for the ALT_EMAC0 instance. */
9936 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS29_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS29_HIGH_ADDR(ALT_EMAC0_ADDR)
9937 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS29_LOW register for the ALT_EMAC0 instance. */
9938 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS29_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS29_LOW_ADDR(ALT_EMAC0_ADDR)
9939 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS30_HIGH register for the ALT_EMAC0 instance. */
9940 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS30_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS30_HIGH_ADDR(ALT_EMAC0_ADDR)
9941 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS30_LOW register for the ALT_EMAC0 instance. */
9942 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS30_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS30_LOW_ADDR(ALT_EMAC0_ADDR)
9943 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS31_HIGH register for the ALT_EMAC0 instance. */
9944 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS31_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS31_HIGH_ADDR(ALT_EMAC0_ADDR)
9945 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS31_LOW register for the ALT_EMAC0 instance. */
9946 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS31_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS31_LOW_ADDR(ALT_EMAC0_ADDR)
9947 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS32_HIGH register for the ALT_EMAC0 instance. */
9948 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS32_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS32_HIGH_ADDR(ALT_EMAC0_ADDR)
9949 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS32_LOW register for the ALT_EMAC0 instance. */
9950 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS32_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS32_LOW_ADDR(ALT_EMAC0_ADDR)
9951 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS33_HIGH register for the ALT_EMAC0 instance. */
9952 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS33_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS33_HIGH_ADDR(ALT_EMAC0_ADDR)
9953 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS33_LOW register for the ALT_EMAC0 instance. */
9954 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS33_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS33_LOW_ADDR(ALT_EMAC0_ADDR)
9955 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS34_HIGH register for the ALT_EMAC0 instance. */
9956 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS34_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS34_HIGH_ADDR(ALT_EMAC0_ADDR)
9957 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS34_LOW register for the ALT_EMAC0 instance. */
9958 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS34_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS34_LOW_ADDR(ALT_EMAC0_ADDR)
9959 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS35_HIGH register for the ALT_EMAC0 instance. */
9960 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS35_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS35_HIGH_ADDR(ALT_EMAC0_ADDR)
9961 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS35_LOW register for the ALT_EMAC0 instance. */
9962 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS35_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS35_LOW_ADDR(ALT_EMAC0_ADDR)
9963 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS36_HIGH register for the ALT_EMAC0 instance. */
9964 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS36_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS36_HIGH_ADDR(ALT_EMAC0_ADDR)
9965 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS36_LOW register for the ALT_EMAC0 instance. */
9966 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS36_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS36_LOW_ADDR(ALT_EMAC0_ADDR)
9967 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS37_HIGH register for the ALT_EMAC0 instance. */
9968 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS37_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS37_HIGH_ADDR(ALT_EMAC0_ADDR)
9969 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS37_LOW register for the ALT_EMAC0 instance. */
9970 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS37_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS37_LOW_ADDR(ALT_EMAC0_ADDR)
9971 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS38_HIGH register for the ALT_EMAC0 instance. */
9972 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS38_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS38_HIGH_ADDR(ALT_EMAC0_ADDR)
9973 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS38_LOW register for the ALT_EMAC0 instance. */
9974 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS38_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS38_LOW_ADDR(ALT_EMAC0_ADDR)
9975 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS39_HIGH register for the ALT_EMAC0 instance. */
9976 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS39_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS39_HIGH_ADDR(ALT_EMAC0_ADDR)
9977 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS39_LOW register for the ALT_EMAC0 instance. */
9978 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS39_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS39_LOW_ADDR(ALT_EMAC0_ADDR)
9979 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS40_HIGH register for the ALT_EMAC0 instance. */
9980 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS40_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS40_HIGH_ADDR(ALT_EMAC0_ADDR)
9981 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS40_LOW register for the ALT_EMAC0 instance. */
9982 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS40_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS40_LOW_ADDR(ALT_EMAC0_ADDR)
9983 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS41_HIGH register for the ALT_EMAC0 instance. */
9984 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS41_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS41_HIGH_ADDR(ALT_EMAC0_ADDR)
9985 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS41_LOW register for the ALT_EMAC0 instance. */
9986 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS41_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS41_LOW_ADDR(ALT_EMAC0_ADDR)
9987 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS42_HIGH register for the ALT_EMAC0 instance. */
9988 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS42_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS42_HIGH_ADDR(ALT_EMAC0_ADDR)
9989 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS42_LOW register for the ALT_EMAC0 instance. */
9990 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS42_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS42_LOW_ADDR(ALT_EMAC0_ADDR)
9991 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS43_HIGH register for the ALT_EMAC0 instance. */
9992 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS43_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS43_HIGH_ADDR(ALT_EMAC0_ADDR)
9993 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS43_LOW register for the ALT_EMAC0 instance. */
9994 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS43_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS43_LOW_ADDR(ALT_EMAC0_ADDR)
9995 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS44_HIGH register for the ALT_EMAC0 instance. */
9996 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS44_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS44_HIGH_ADDR(ALT_EMAC0_ADDR)
9997 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS44_LOW register for the ALT_EMAC0 instance. */
9998 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS44_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS44_LOW_ADDR(ALT_EMAC0_ADDR)
9999 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS45_HIGH register for the ALT_EMAC0 instance. */
10000 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS45_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS45_HIGH_ADDR(ALT_EMAC0_ADDR)
10001 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS45_LOW register for the ALT_EMAC0 instance. */
10002 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS45_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS45_LOW_ADDR(ALT_EMAC0_ADDR)
10003 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS46_HIGH register for the ALT_EMAC0 instance. */
10004 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS46_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS46_HIGH_ADDR(ALT_EMAC0_ADDR)
10005 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS46_LOW register for the ALT_EMAC0 instance. */
10006 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS46_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS46_LOW_ADDR(ALT_EMAC0_ADDR)
10007 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS47_HIGH register for the ALT_EMAC0 instance. */
10008 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS47_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS47_HIGH_ADDR(ALT_EMAC0_ADDR)
10009 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS47_LOW register for the ALT_EMAC0 instance. */
10010 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS47_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS47_LOW_ADDR(ALT_EMAC0_ADDR)
10011 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS48_HIGH register for the ALT_EMAC0 instance. */
10012 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS48_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS48_HIGH_ADDR(ALT_EMAC0_ADDR)
10013 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS48_LOW register for the ALT_EMAC0 instance. */
10014 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS48_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS48_LOW_ADDR(ALT_EMAC0_ADDR)
10015 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS49_HIGH register for the ALT_EMAC0 instance. */
10016 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS49_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS49_HIGH_ADDR(ALT_EMAC0_ADDR)
10017 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS49_LOW register for the ALT_EMAC0 instance. */
10018 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS49_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS49_LOW_ADDR(ALT_EMAC0_ADDR)
10019 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS50_HIGH register for the ALT_EMAC0 instance. */
10020 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS50_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS50_HIGH_ADDR(ALT_EMAC0_ADDR)
10021 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS50_LOW register for the ALT_EMAC0 instance. */
10022 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS50_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS50_LOW_ADDR(ALT_EMAC0_ADDR)
10023 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS51_HIGH register for the ALT_EMAC0 instance. */
10024 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS51_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS51_HIGH_ADDR(ALT_EMAC0_ADDR)
10025 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS51_LOW register for the ALT_EMAC0 instance. */
10026 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS51_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS51_LOW_ADDR(ALT_EMAC0_ADDR)
10027 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS52_HIGH register for the ALT_EMAC0 instance. */
10028 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS52_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS52_HIGH_ADDR(ALT_EMAC0_ADDR)
10029 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS52_LOW register for the ALT_EMAC0 instance. */
10030 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS52_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS52_LOW_ADDR(ALT_EMAC0_ADDR)
10031 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS53_HIGH register for the ALT_EMAC0 instance. */
10032 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS53_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS53_HIGH_ADDR(ALT_EMAC0_ADDR)
10033 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS53_LOW register for the ALT_EMAC0 instance. */
10034 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS53_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS53_LOW_ADDR(ALT_EMAC0_ADDR)
10035 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS54_HIGH register for the ALT_EMAC0 instance. */
10036 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS54_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS54_HIGH_ADDR(ALT_EMAC0_ADDR)
10037 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS54_LOW register for the ALT_EMAC0 instance. */
10038 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS54_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS54_LOW_ADDR(ALT_EMAC0_ADDR)
10039 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS55_HIGH register for the ALT_EMAC0 instance. */
10040 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS55_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS55_HIGH_ADDR(ALT_EMAC0_ADDR)
10041 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS55_LOW register for the ALT_EMAC0 instance. */
10042 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS55_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS55_LOW_ADDR(ALT_EMAC0_ADDR)
10043 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS56_HIGH register for the ALT_EMAC0 instance. */
10044 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS56_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS56_HIGH_ADDR(ALT_EMAC0_ADDR)
10045 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS56_LOW register for the ALT_EMAC0 instance. */
10046 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS56_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS56_LOW_ADDR(ALT_EMAC0_ADDR)
10047 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS57_HIGH register for the ALT_EMAC0 instance. */
10048 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS57_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS57_HIGH_ADDR(ALT_EMAC0_ADDR)
10049 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS57_LOW register for the ALT_EMAC0 instance. */
10050 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS57_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS57_LOW_ADDR(ALT_EMAC0_ADDR)
10051 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS58_HIGH register for the ALT_EMAC0 instance. */
10052 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS58_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS58_HIGH_ADDR(ALT_EMAC0_ADDR)
10053 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS58_LOW register for the ALT_EMAC0 instance. */
10054 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS58_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS58_LOW_ADDR(ALT_EMAC0_ADDR)
10055 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS59_HIGH register for the ALT_EMAC0 instance. */
10056 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS59_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS59_HIGH_ADDR(ALT_EMAC0_ADDR)
10057 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS59_LOW register for the ALT_EMAC0 instance. */
10058 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS59_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS59_LOW_ADDR(ALT_EMAC0_ADDR)
10059 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS60_HIGH register for the ALT_EMAC0 instance. */
10060 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS60_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS60_HIGH_ADDR(ALT_EMAC0_ADDR)
10061 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS60_LOW register for the ALT_EMAC0 instance. */
10062 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS60_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS60_LOW_ADDR(ALT_EMAC0_ADDR)
10063 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS61_HIGH register for the ALT_EMAC0 instance. */
10064 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS61_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS61_HIGH_ADDR(ALT_EMAC0_ADDR)
10065 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS61_LOW register for the ALT_EMAC0 instance. */
10066 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS61_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS61_LOW_ADDR(ALT_EMAC0_ADDR)
10067 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS62_HIGH register for the ALT_EMAC0 instance. */
10068 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS62_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS62_HIGH_ADDR(ALT_EMAC0_ADDR)
10069 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS62_LOW register for the ALT_EMAC0 instance. */
10070 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS62_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS62_LOW_ADDR(ALT_EMAC0_ADDR)
10071 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS63_HIGH register for the ALT_EMAC0 instance. */
10072 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS63_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS63_HIGH_ADDR(ALT_EMAC0_ADDR)
10073 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS63_LOW register for the ALT_EMAC0 instance. */
10074 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS63_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS63_LOW_ADDR(ALT_EMAC0_ADDR)
10075 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS64_HIGH register for the ALT_EMAC0 instance. */
10076 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS64_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS64_HIGH_ADDR(ALT_EMAC0_ADDR)
10077 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS64_LOW register for the ALT_EMAC0 instance. */
10078 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS64_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS64_LOW_ADDR(ALT_EMAC0_ADDR)
10079 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS65_HIGH register for the ALT_EMAC0 instance. */
10080 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS65_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS65_HIGH_ADDR(ALT_EMAC0_ADDR)
10081 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS65_LOW register for the ALT_EMAC0 instance. */
10082 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS65_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS65_LOW_ADDR(ALT_EMAC0_ADDR)
10083 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS66_HIGH register for the ALT_EMAC0 instance. */
10084 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS66_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS66_HIGH_ADDR(ALT_EMAC0_ADDR)
10085 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS66_LOW register for the ALT_EMAC0 instance. */
10086 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS66_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS66_LOW_ADDR(ALT_EMAC0_ADDR)
10087 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS67_HIGH register for the ALT_EMAC0 instance. */
10088 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS67_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS67_HIGH_ADDR(ALT_EMAC0_ADDR)
10089 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS67_LOW register for the ALT_EMAC0 instance. */
10090 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS67_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS67_LOW_ADDR(ALT_EMAC0_ADDR)
10091 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS68_HIGH register for the ALT_EMAC0 instance. */
10092 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS68_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS68_HIGH_ADDR(ALT_EMAC0_ADDR)
10093 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS68_LOW register for the ALT_EMAC0 instance. */
10094 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS68_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS68_LOW_ADDR(ALT_EMAC0_ADDR)
10095 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS69_HIGH register for the ALT_EMAC0 instance. */
10096 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS69_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS69_HIGH_ADDR(ALT_EMAC0_ADDR)
10097 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS69_LOW register for the ALT_EMAC0 instance. */
10098 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS69_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS69_LOW_ADDR(ALT_EMAC0_ADDR)
10099 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS70_HIGH register for the ALT_EMAC0 instance. */
10100 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS70_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS70_HIGH_ADDR(ALT_EMAC0_ADDR)
10101 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS70_LOW register for the ALT_EMAC0 instance. */
10102 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS70_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS70_LOW_ADDR(ALT_EMAC0_ADDR)
10103 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS71_HIGH register for the ALT_EMAC0 instance. */
10104 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS71_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS71_HIGH_ADDR(ALT_EMAC0_ADDR)
10105 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS71_LOW register for the ALT_EMAC0 instance. */
10106 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS71_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS71_LOW_ADDR(ALT_EMAC0_ADDR)
10107 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS72_HIGH register for the ALT_EMAC0 instance. */
10108 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS72_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS72_HIGH_ADDR(ALT_EMAC0_ADDR)
10109 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS72_LOW register for the ALT_EMAC0 instance. */
10110 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS72_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS72_LOW_ADDR(ALT_EMAC0_ADDR)
10111 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS73_HIGH register for the ALT_EMAC0 instance. */
10112 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS73_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS73_HIGH_ADDR(ALT_EMAC0_ADDR)
10113 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS73_LOW register for the ALT_EMAC0 instance. */
10114 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS73_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS73_LOW_ADDR(ALT_EMAC0_ADDR)
10115 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS74_HIGH register for the ALT_EMAC0 instance. */
10116 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS74_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS74_HIGH_ADDR(ALT_EMAC0_ADDR)
10117 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS74_LOW register for the ALT_EMAC0 instance. */
10118 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS74_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS74_LOW_ADDR(ALT_EMAC0_ADDR)
10119 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS75_HIGH register for the ALT_EMAC0 instance. */
10120 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS75_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS75_HIGH_ADDR(ALT_EMAC0_ADDR)
10121 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS75_LOW register for the ALT_EMAC0 instance. */
10122 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS75_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS75_LOW_ADDR(ALT_EMAC0_ADDR)
10123 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS76_HIGH register for the ALT_EMAC0 instance. */
10124 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS76_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS76_HIGH_ADDR(ALT_EMAC0_ADDR)
10125 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS76_LOW register for the ALT_EMAC0 instance. */
10126 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS76_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS76_LOW_ADDR(ALT_EMAC0_ADDR)
10127 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS77_HIGH register for the ALT_EMAC0 instance. */
10128 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS77_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS77_HIGH_ADDR(ALT_EMAC0_ADDR)
10129 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS77_LOW register for the ALT_EMAC0 instance. */
10130 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS77_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS77_LOW_ADDR(ALT_EMAC0_ADDR)
10131 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS78_HIGH register for the ALT_EMAC0 instance. */
10132 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS78_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS78_HIGH_ADDR(ALT_EMAC0_ADDR)
10133 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS78_LOW register for the ALT_EMAC0 instance. */
10134 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS78_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS78_LOW_ADDR(ALT_EMAC0_ADDR)
10135 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS79_HIGH register for the ALT_EMAC0 instance. */
10136 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS79_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS79_HIGH_ADDR(ALT_EMAC0_ADDR)
10137 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS79_LOW register for the ALT_EMAC0 instance. */
10138 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS79_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS79_LOW_ADDR(ALT_EMAC0_ADDR)
10139 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS80_HIGH register for the ALT_EMAC0 instance. */
10140 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS80_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS80_HIGH_ADDR(ALT_EMAC0_ADDR)
10141 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS80_LOW register for the ALT_EMAC0 instance. */
10142 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS80_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS80_LOW_ADDR(ALT_EMAC0_ADDR)
10143 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS81_HIGH register for the ALT_EMAC0 instance. */
10144 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS81_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS81_HIGH_ADDR(ALT_EMAC0_ADDR)
10145 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS81_LOW register for the ALT_EMAC0 instance. */
10146 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS81_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS81_LOW_ADDR(ALT_EMAC0_ADDR)
10147 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS82_HIGH register for the ALT_EMAC0 instance. */
10148 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS82_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS82_HIGH_ADDR(ALT_EMAC0_ADDR)
10149 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS82_LOW register for the ALT_EMAC0 instance. */
10150 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS82_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS82_LOW_ADDR(ALT_EMAC0_ADDR)
10151 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS83_HIGH register for the ALT_EMAC0 instance. */
10152 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS83_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS83_HIGH_ADDR(ALT_EMAC0_ADDR)
10153 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS83_LOW register for the ALT_EMAC0 instance. */
10154 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS83_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS83_LOW_ADDR(ALT_EMAC0_ADDR)
10155 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS84_HIGH register for the ALT_EMAC0 instance. */
10156 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS84_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS84_HIGH_ADDR(ALT_EMAC0_ADDR)
10157 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS84_LOW register for the ALT_EMAC0 instance. */
10158 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS84_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS84_LOW_ADDR(ALT_EMAC0_ADDR)
10159 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS85_HIGH register for the ALT_EMAC0 instance. */
10160 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS85_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS85_HIGH_ADDR(ALT_EMAC0_ADDR)
10161 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS85_LOW register for the ALT_EMAC0 instance. */
10162 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS85_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS85_LOW_ADDR(ALT_EMAC0_ADDR)
10163 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS86_HIGH register for the ALT_EMAC0 instance. */
10164 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS86_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS86_HIGH_ADDR(ALT_EMAC0_ADDR)
10165 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS86_LOW register for the ALT_EMAC0 instance. */
10166 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS86_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS86_LOW_ADDR(ALT_EMAC0_ADDR)
10167 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS87_HIGH register for the ALT_EMAC0 instance. */
10168 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS87_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS87_HIGH_ADDR(ALT_EMAC0_ADDR)
10169 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS87_LOW register for the ALT_EMAC0 instance. */
10170 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS87_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS87_LOW_ADDR(ALT_EMAC0_ADDR)
10171 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS88_HIGH register for the ALT_EMAC0 instance. */
10172 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS88_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS88_HIGH_ADDR(ALT_EMAC0_ADDR)
10173 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS88_LOW register for the ALT_EMAC0 instance. */
10174 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS88_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS88_LOW_ADDR(ALT_EMAC0_ADDR)
10175 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS89_HIGH register for the ALT_EMAC0 instance. */
10176 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS89_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS89_HIGH_ADDR(ALT_EMAC0_ADDR)
10177 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS89_LOW register for the ALT_EMAC0 instance. */
10178 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS89_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS89_LOW_ADDR(ALT_EMAC0_ADDR)
10179 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS90_HIGH register for the ALT_EMAC0 instance. */
10180 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS90_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS90_HIGH_ADDR(ALT_EMAC0_ADDR)
10181 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS90_LOW register for the ALT_EMAC0 instance. */
10182 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS90_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS90_LOW_ADDR(ALT_EMAC0_ADDR)
10183 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS91_HIGH register for the ALT_EMAC0 instance. */
10184 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS91_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS91_HIGH_ADDR(ALT_EMAC0_ADDR)
10185 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS91_LOW register for the ALT_EMAC0 instance. */
10186 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS91_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS91_LOW_ADDR(ALT_EMAC0_ADDR)
10187 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS92_HIGH register for the ALT_EMAC0 instance. */
10188 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS92_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS92_HIGH_ADDR(ALT_EMAC0_ADDR)
10189 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS92_LOW register for the ALT_EMAC0 instance. */
10190 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS92_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS92_LOW_ADDR(ALT_EMAC0_ADDR)
10191 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS93_HIGH register for the ALT_EMAC0 instance. */
10192 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS93_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS93_HIGH_ADDR(ALT_EMAC0_ADDR)
10193 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS93_LOW register for the ALT_EMAC0 instance. */
10194 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS93_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS93_LOW_ADDR(ALT_EMAC0_ADDR)
10195 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS94_HIGH register for the ALT_EMAC0 instance. */
10196 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS94_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS94_HIGH_ADDR(ALT_EMAC0_ADDR)
10197 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS94_LOW register for the ALT_EMAC0 instance. */
10198 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS94_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS94_LOW_ADDR(ALT_EMAC0_ADDR)
10199 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS95_HIGH register for the ALT_EMAC0 instance. */
10200 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS95_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS95_HIGH_ADDR(ALT_EMAC0_ADDR)
10201 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS95_LOW register for the ALT_EMAC0 instance. */
10202 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS95_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS95_LOW_ADDR(ALT_EMAC0_ADDR)
10203 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS96_HIGH register for the ALT_EMAC0 instance. */
10204 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS96_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS96_HIGH_ADDR(ALT_EMAC0_ADDR)
10205 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS96_LOW register for the ALT_EMAC0 instance. */
10206 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS96_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS96_LOW_ADDR(ALT_EMAC0_ADDR)
10207 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS97_HIGH register for the ALT_EMAC0 instance. */
10208 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS97_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS97_HIGH_ADDR(ALT_EMAC0_ADDR)
10209 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS97_LOW register for the ALT_EMAC0 instance. */
10210 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS97_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS97_LOW_ADDR(ALT_EMAC0_ADDR)
10211 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS98_HIGH register for the ALT_EMAC0 instance. */
10212 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS98_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS98_HIGH_ADDR(ALT_EMAC0_ADDR)
10213 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS98_LOW register for the ALT_EMAC0 instance. */
10214 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS98_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS98_LOW_ADDR(ALT_EMAC0_ADDR)
10215 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS99_HIGH register for the ALT_EMAC0 instance. */
10216 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS99_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS99_HIGH_ADDR(ALT_EMAC0_ADDR)
10217 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS99_LOW register for the ALT_EMAC0 instance. */
10218 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS99_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS99_LOW_ADDR(ALT_EMAC0_ADDR)
10219 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS100_HIGH register for the ALT_EMAC0 instance. */
10220 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS100_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS100_HIGH_ADDR(ALT_EMAC0_ADDR)
10221 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS100_LOW register for the ALT_EMAC0 instance. */
10222 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS100_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS100_LOW_ADDR(ALT_EMAC0_ADDR)
10223 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS101_HIGH register for the ALT_EMAC0 instance. */
10224 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS101_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS101_HIGH_ADDR(ALT_EMAC0_ADDR)
10225 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS101_LOW register for the ALT_EMAC0 instance. */
10226 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS101_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS101_LOW_ADDR(ALT_EMAC0_ADDR)
10227 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS102_HIGH register for the ALT_EMAC0 instance. */
10228 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS102_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS102_HIGH_ADDR(ALT_EMAC0_ADDR)
10229 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS102_LOW register for the ALT_EMAC0 instance. */
10230 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS102_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS102_LOW_ADDR(ALT_EMAC0_ADDR)
10231 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS103_HIGH register for the ALT_EMAC0 instance. */
10232 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS103_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS103_HIGH_ADDR(ALT_EMAC0_ADDR)
10233 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS103_LOW register for the ALT_EMAC0 instance. */
10234 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS103_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS103_LOW_ADDR(ALT_EMAC0_ADDR)
10235 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS104_HIGH register for the ALT_EMAC0 instance. */
10236 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS104_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS104_HIGH_ADDR(ALT_EMAC0_ADDR)
10237 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS104_LOW register for the ALT_EMAC0 instance. */
10238 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS104_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS104_LOW_ADDR(ALT_EMAC0_ADDR)
10239 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS105_HIGH register for the ALT_EMAC0 instance. */
10240 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS105_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS105_HIGH_ADDR(ALT_EMAC0_ADDR)
10241 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS105_LOW register for the ALT_EMAC0 instance. */
10242 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS105_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS105_LOW_ADDR(ALT_EMAC0_ADDR)
10243 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS106_HIGH register for the ALT_EMAC0 instance. */
10244 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS106_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS106_HIGH_ADDR(ALT_EMAC0_ADDR)
10245 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS106_LOW register for the ALT_EMAC0 instance. */
10246 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS106_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS106_LOW_ADDR(ALT_EMAC0_ADDR)
10247 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS107_HIGH register for the ALT_EMAC0 instance. */
10248 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS107_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS107_HIGH_ADDR(ALT_EMAC0_ADDR)
10249 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS107_LOW register for the ALT_EMAC0 instance. */
10250 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS107_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS107_LOW_ADDR(ALT_EMAC0_ADDR)
10251 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS108_HIGH register for the ALT_EMAC0 instance. */
10252 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS108_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS108_HIGH_ADDR(ALT_EMAC0_ADDR)
10253 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS108_LOW register for the ALT_EMAC0 instance. */
10254 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS108_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS108_LOW_ADDR(ALT_EMAC0_ADDR)
10255 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS109_HIGH register for the ALT_EMAC0 instance. */
10256 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS109_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS109_HIGH_ADDR(ALT_EMAC0_ADDR)
10257 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS109_LOW register for the ALT_EMAC0 instance. */
10258 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS109_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS109_LOW_ADDR(ALT_EMAC0_ADDR)
10259 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS110_HIGH register for the ALT_EMAC0 instance. */
10260 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS110_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS110_HIGH_ADDR(ALT_EMAC0_ADDR)
10261 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS110_LOW register for the ALT_EMAC0 instance. */
10262 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS110_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS110_LOW_ADDR(ALT_EMAC0_ADDR)
10263 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS111_HIGH register for the ALT_EMAC0 instance. */
10264 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS111_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS111_HIGH_ADDR(ALT_EMAC0_ADDR)
10265 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS111_LOW register for the ALT_EMAC0 instance. */
10266 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS111_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS111_LOW_ADDR(ALT_EMAC0_ADDR)
10267 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS112_HIGH register for the ALT_EMAC0 instance. */
10268 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS112_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS112_HIGH_ADDR(ALT_EMAC0_ADDR)
10269 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS112_LOW register for the ALT_EMAC0 instance. */
10270 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS112_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS112_LOW_ADDR(ALT_EMAC0_ADDR)
10271 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS113_HIGH register for the ALT_EMAC0 instance. */
10272 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS113_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS113_HIGH_ADDR(ALT_EMAC0_ADDR)
10273 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS113_LOW register for the ALT_EMAC0 instance. */
10274 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS113_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS113_LOW_ADDR(ALT_EMAC0_ADDR)
10275 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS114_HIGH register for the ALT_EMAC0 instance. */
10276 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS114_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS114_HIGH_ADDR(ALT_EMAC0_ADDR)
10277 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS114_LOW register for the ALT_EMAC0 instance. */
10278 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS114_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS114_LOW_ADDR(ALT_EMAC0_ADDR)
10279 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS115_HIGH register for the ALT_EMAC0 instance. */
10280 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS115_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS115_HIGH_ADDR(ALT_EMAC0_ADDR)
10281 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS115_LOW register for the ALT_EMAC0 instance. */
10282 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS115_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS115_LOW_ADDR(ALT_EMAC0_ADDR)
10283 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS116_HIGH register for the ALT_EMAC0 instance. */
10284 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS116_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS116_HIGH_ADDR(ALT_EMAC0_ADDR)
10285 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS116_LOW register for the ALT_EMAC0 instance. */
10286 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS116_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS116_LOW_ADDR(ALT_EMAC0_ADDR)
10287 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS117_HIGH register for the ALT_EMAC0 instance. */
10288 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS117_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS117_HIGH_ADDR(ALT_EMAC0_ADDR)
10289 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS117_LOW register for the ALT_EMAC0 instance. */
10290 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS117_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS117_LOW_ADDR(ALT_EMAC0_ADDR)
10291 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS118_HIGH register for the ALT_EMAC0 instance. */
10292 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS118_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS118_HIGH_ADDR(ALT_EMAC0_ADDR)
10293 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS118_LOW register for the ALT_EMAC0 instance. */
10294 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS118_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS118_LOW_ADDR(ALT_EMAC0_ADDR)
10295 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS119_HIGH register for the ALT_EMAC0 instance. */
10296 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS119_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS119_HIGH_ADDR(ALT_EMAC0_ADDR)
10297 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS119_LOW register for the ALT_EMAC0 instance. */
10298 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS119_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS119_LOW_ADDR(ALT_EMAC0_ADDR)
10299 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS120_HIGH register for the ALT_EMAC0 instance. */
10300 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS120_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS120_HIGH_ADDR(ALT_EMAC0_ADDR)
10301 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS120_LOW register for the ALT_EMAC0 instance. */
10302 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS120_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS120_LOW_ADDR(ALT_EMAC0_ADDR)
10303 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS121_HIGH register for the ALT_EMAC0 instance. */
10304 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS121_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS121_HIGH_ADDR(ALT_EMAC0_ADDR)
10305 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS121_LOW register for the ALT_EMAC0 instance. */
10306 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS121_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS121_LOW_ADDR(ALT_EMAC0_ADDR)
10307 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS122_HIGH register for the ALT_EMAC0 instance. */
10308 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS122_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS122_HIGH_ADDR(ALT_EMAC0_ADDR)
10309 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS122_LOW register for the ALT_EMAC0 instance. */
10310 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS122_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS122_LOW_ADDR(ALT_EMAC0_ADDR)
10311 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS123_HIGH register for the ALT_EMAC0 instance. */
10312 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS123_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS123_HIGH_ADDR(ALT_EMAC0_ADDR)
10313 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS123_LOW register for the ALT_EMAC0 instance. */
10314 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS123_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS123_LOW_ADDR(ALT_EMAC0_ADDR)
10315 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS124_HIGH register for the ALT_EMAC0 instance. */
10316 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS124_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS124_HIGH_ADDR(ALT_EMAC0_ADDR)
10317 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS124_LOW register for the ALT_EMAC0 instance. */
10318 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS124_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS124_LOW_ADDR(ALT_EMAC0_ADDR)
10319 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS125_HIGH register for the ALT_EMAC0 instance. */
10320 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS125_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS125_HIGH_ADDR(ALT_EMAC0_ADDR)
10321 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS125_LOW register for the ALT_EMAC0 instance. */
10322 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS125_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS125_LOW_ADDR(ALT_EMAC0_ADDR)
10323 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS126_HIGH register for the ALT_EMAC0 instance. */
10324 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS126_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS126_HIGH_ADDR(ALT_EMAC0_ADDR)
10325 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS126_LOW register for the ALT_EMAC0 instance. */
10326 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS126_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS126_LOW_ADDR(ALT_EMAC0_ADDR)
10327 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS127_HIGH register for the ALT_EMAC0 instance. */
10328 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS127_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS127_HIGH_ADDR(ALT_EMAC0_ADDR)
10329 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS127_LOW register for the ALT_EMAC0 instance. */
10330 #define ALT_EMAC0_GMACGRP_MAC_ADDRESS127_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS127_LOW_ADDR(ALT_EMAC0_ADDR)
10331 /* The address of the ALT_EMAC_DMAGRP_BUS_MODE register for the ALT_EMAC0 instance. */
10332 #define ALT_EMAC0_DMAGRP_BUS_MODE_ADDR ALT_EMAC_DMAGRP_BUS_MODE_ADDR(ALT_EMAC0_ADDR)
10333 /* The address of the ALT_EMAC_DMAGRP_TRANSMIT_POLL_DEMAND register for the ALT_EMAC0 instance. */
10334 #define ALT_EMAC0_DMAGRP_TRANSMIT_POLL_DEMAND_ADDR ALT_EMAC_DMAGRP_TRANSMIT_POLL_DEMAND_ADDR(ALT_EMAC0_ADDR)
10335 /* The address of the ALT_EMAC_DMAGRP_RECEIVE_POLL_DEMAND register for the ALT_EMAC0 instance. */
10336 #define ALT_EMAC0_DMAGRP_RECEIVE_POLL_DEMAND_ADDR ALT_EMAC_DMAGRP_RECEIVE_POLL_DEMAND_ADDR(ALT_EMAC0_ADDR)
10337 /* The address of the ALT_EMAC_DMAGRP_RECEIVE_DESCRIPTOR_LIST_ADDRESS register for the ALT_EMAC0 instance. */
10338 #define ALT_EMAC0_DMAGRP_RECEIVE_DESCRIPTOR_LIST_ADDRESS_ADDR ALT_EMAC_DMAGRP_RECEIVE_DESCRIPTOR_LIST_ADDRESS_ADDR(ALT_EMAC0_ADDR)
10339 /* The address of the ALT_EMAC_DMAGRP_TRANSMIT_DESCRIPTOR_LIST_ADDRESS register for the ALT_EMAC0 instance. */
10340 #define ALT_EMAC0_DMAGRP_TRANSMIT_DESCRIPTOR_LIST_ADDRESS_ADDR ALT_EMAC_DMAGRP_TRANSMIT_DESCRIPTOR_LIST_ADDRESS_ADDR(ALT_EMAC0_ADDR)
10341 /* The address of the ALT_EMAC_DMAGRP_STATUS register for the ALT_EMAC0 instance. */
10342 #define ALT_EMAC0_DMAGRP_STATUS_ADDR ALT_EMAC_DMAGRP_STATUS_ADDR(ALT_EMAC0_ADDR)
10343 /* The address of the ALT_EMAC_DMAGRP_OPERATION_MODE register for the ALT_EMAC0 instance. */
10344 #define ALT_EMAC0_DMAGRP_OPERATION_MODE_ADDR ALT_EMAC_DMAGRP_OPERATION_MODE_ADDR(ALT_EMAC0_ADDR)
10345 /* The address of the ALT_EMAC_DMAGRP_INTERRUPT_ENABLE register for the ALT_EMAC0 instance. */
10346 #define ALT_EMAC0_DMAGRP_INTERRUPT_ENABLE_ADDR ALT_EMAC_DMAGRP_INTERRUPT_ENABLE_ADDR(ALT_EMAC0_ADDR)
10347 /* The address of the ALT_EMAC_DMAGRP_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER register for the ALT_EMAC0 instance. */
10348 #define ALT_EMAC0_DMAGRP_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_ADDR ALT_EMAC_DMAGRP_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_ADDR(ALT_EMAC0_ADDR)
10349 /* The address of the ALT_EMAC_DMAGRP_RECEIVE_INTERRUPT_WATCHDOG_TIMER register for the ALT_EMAC0 instance. */
10350 #define ALT_EMAC0_DMAGRP_RECEIVE_INTERRUPT_WATCHDOG_TIMER_ADDR ALT_EMAC_DMAGRP_RECEIVE_INTERRUPT_WATCHDOG_TIMER_ADDR(ALT_EMAC0_ADDR)
10351 /* The address of the ALT_EMAC_DMAGRP_AXI_BUS_MODE register for the ALT_EMAC0 instance. */
10352 #define ALT_EMAC0_DMAGRP_AXI_BUS_MODE_ADDR ALT_EMAC_DMAGRP_AXI_BUS_MODE_ADDR(ALT_EMAC0_ADDR)
10353 /* The address of the ALT_EMAC_DMAGRP_AHB_OR_AXI_STATUS register for the ALT_EMAC0 instance. */
10354 #define ALT_EMAC0_DMAGRP_AHB_OR_AXI_STATUS_ADDR ALT_EMAC_DMAGRP_AHB_OR_AXI_STATUS_ADDR(ALT_EMAC0_ADDR)
10355 /* The address of the ALT_EMAC_DMAGRP_CURRENT_HOST_TRANSMIT_DESCRIPTOR register for the ALT_EMAC0 instance. */
10356 #define ALT_EMAC0_DMAGRP_CURRENT_HOST_TRANSMIT_DESCRIPTOR_ADDR ALT_EMAC_DMAGRP_CURRENT_HOST_TRANSMIT_DESCRIPTOR_ADDR(ALT_EMAC0_ADDR)
10357 /* The address of the ALT_EMAC_DMAGRP_CURRENT_HOST_RECEIVE_DESCRIPTOR register for the ALT_EMAC0 instance. */
10358 #define ALT_EMAC0_DMAGRP_CURRENT_HOST_RECEIVE_DESCRIPTOR_ADDR ALT_EMAC_DMAGRP_CURRENT_HOST_RECEIVE_DESCRIPTOR_ADDR(ALT_EMAC0_ADDR)
10359 /* The address of the ALT_EMAC_DMAGRP_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS register for the ALT_EMAC0 instance. */
10360 #define ALT_EMAC0_DMAGRP_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_ADDR ALT_EMAC_DMAGRP_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_ADDR(ALT_EMAC0_ADDR)
10361 /* The address of the ALT_EMAC_DMAGRP_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS register for the ALT_EMAC0 instance. */
10362 #define ALT_EMAC0_DMAGRP_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_ADDR ALT_EMAC_DMAGRP_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_ADDR(ALT_EMAC0_ADDR)
10363 /* The address of the ALT_EMAC_DMAGRP_HW_FEATURE register for the ALT_EMAC0 instance. */
10364 #define ALT_EMAC0_DMAGRP_HW_FEATURE_ADDR ALT_EMAC_DMAGRP_HW_FEATURE_ADDR(ALT_EMAC0_ADDR)
10365 /* The base address byte offset for the start of the ALT_EMAC0 component. */
10366 #define ALT_EMAC0_OFST 0xff800000
10367 /* The start address of the ALT_EMAC0 component. */
10368 #define ALT_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_EMAC0_OFST))
10369 /* The lower bound address range of the ALT_EMAC0 component. */
10370 #define ALT_EMAC0_LB_ADDR ALT_EMAC0_ADDR
10371 /* The upper bound address range of the ALT_EMAC0 component. */
10372 #define ALT_EMAC0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC0_ADDR) + 0x105c) - 1))
10373 
10374 
10375 /*
10376  * Component Instance : emac1
10377  *
10378  * Instance emac1 of component ALT_EMAC.
10379  *
10380  *
10381  */
10382 /* The address of the ALT_EMAC_GMACGRP_MAC_CONFIGURATION register for the ALT_EMAC1 instance. */
10383 #define ALT_EMAC1_GMACGRP_MAC_CONFIGURATION_ADDR ALT_EMAC_GMACGRP_MAC_CONFIGURATION_ADDR(ALT_EMAC1_ADDR)
10384 /* The address of the ALT_EMAC_GMACGRP_MAC_FRAME_FILTER register for the ALT_EMAC1 instance. */
10385 #define ALT_EMAC1_GMACGRP_MAC_FRAME_FILTER_ADDR ALT_EMAC_GMACGRP_MAC_FRAME_FILTER_ADDR(ALT_EMAC1_ADDR)
10386 /* The address of the ALT_EMAC_GMACGRP_GMII_ADDRESS register for the ALT_EMAC1 instance. */
10387 #define ALT_EMAC1_GMACGRP_GMII_ADDRESS_ADDR ALT_EMAC_GMACGRP_GMII_ADDRESS_ADDR(ALT_EMAC1_ADDR)
10388 /* The address of the ALT_EMAC_GMACGRP_GMII_DATA register for the ALT_EMAC1 instance. */
10389 #define ALT_EMAC1_GMACGRP_GMII_DATA_ADDR ALT_EMAC_GMACGRP_GMII_DATA_ADDR(ALT_EMAC1_ADDR)
10390 /* The address of the ALT_EMAC_GMACGRP_FLOW_CONTROL register for the ALT_EMAC1 instance. */
10391 #define ALT_EMAC1_GMACGRP_FLOW_CONTROL_ADDR ALT_EMAC_GMACGRP_FLOW_CONTROL_ADDR(ALT_EMAC1_ADDR)
10392 /* The address of the ALT_EMAC_GMACGRP_VLAN_TAG register for the ALT_EMAC1 instance. */
10393 #define ALT_EMAC1_GMACGRP_VLAN_TAG_ADDR ALT_EMAC_GMACGRP_VLAN_TAG_ADDR(ALT_EMAC1_ADDR)
10394 /* The address of the ALT_EMAC_GMACGRP_VERSION register for the ALT_EMAC1 instance. */
10395 #define ALT_EMAC1_GMACGRP_VERSION_ADDR ALT_EMAC_GMACGRP_VERSION_ADDR(ALT_EMAC1_ADDR)
10396 /* The address of the ALT_EMAC_GMACGRP_DEBUG register for the ALT_EMAC1 instance. */
10397 #define ALT_EMAC1_GMACGRP_DEBUG_ADDR ALT_EMAC_GMACGRP_DEBUG_ADDR(ALT_EMAC1_ADDR)
10398 /* The address of the ALT_EMAC_GMACGRP_LPI_CONTROL_STATUS register for the ALT_EMAC1 instance. */
10399 #define ALT_EMAC1_GMACGRP_LPI_CONTROL_STATUS_ADDR ALT_EMAC_GMACGRP_LPI_CONTROL_STATUS_ADDR(ALT_EMAC1_ADDR)
10400 /* The address of the ALT_EMAC_GMACGRP_LPI_TIMERS_CONTROL register for the ALT_EMAC1 instance. */
10401 #define ALT_EMAC1_GMACGRP_LPI_TIMERS_CONTROL_ADDR ALT_EMAC_GMACGRP_LPI_TIMERS_CONTROL_ADDR(ALT_EMAC1_ADDR)
10402 /* The address of the ALT_EMAC_GMACGRP_INTERRUPT_STATUS register for the ALT_EMAC1 instance. */
10403 #define ALT_EMAC1_GMACGRP_INTERRUPT_STATUS_ADDR ALT_EMAC_GMACGRP_INTERRUPT_STATUS_ADDR(ALT_EMAC1_ADDR)
10404 /* The address of the ALT_EMAC_GMACGRP_INTERRUPT_MASK register for the ALT_EMAC1 instance. */
10405 #define ALT_EMAC1_GMACGRP_INTERRUPT_MASK_ADDR ALT_EMAC_GMACGRP_INTERRUPT_MASK_ADDR(ALT_EMAC1_ADDR)
10406 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS0_HIGH register for the ALT_EMAC1 instance. */
10407 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS0_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS0_HIGH_ADDR(ALT_EMAC1_ADDR)
10408 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS0_LOW register for the ALT_EMAC1 instance. */
10409 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS0_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS0_LOW_ADDR(ALT_EMAC1_ADDR)
10410 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS1_HIGH register for the ALT_EMAC1 instance. */
10411 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS1_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS1_HIGH_ADDR(ALT_EMAC1_ADDR)
10412 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS1_LOW register for the ALT_EMAC1 instance. */
10413 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS1_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS1_LOW_ADDR(ALT_EMAC1_ADDR)
10414 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS2_HIGH register for the ALT_EMAC1 instance. */
10415 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS2_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS2_HIGH_ADDR(ALT_EMAC1_ADDR)
10416 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS2_LOW register for the ALT_EMAC1 instance. */
10417 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS2_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS2_LOW_ADDR(ALT_EMAC1_ADDR)
10418 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS3_HIGH register for the ALT_EMAC1 instance. */
10419 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS3_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS3_HIGH_ADDR(ALT_EMAC1_ADDR)
10420 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS3_LOW register for the ALT_EMAC1 instance. */
10421 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS3_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS3_LOW_ADDR(ALT_EMAC1_ADDR)
10422 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS4_HIGH register for the ALT_EMAC1 instance. */
10423 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS4_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS4_HIGH_ADDR(ALT_EMAC1_ADDR)
10424 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS4_LOW register for the ALT_EMAC1 instance. */
10425 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS4_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS4_LOW_ADDR(ALT_EMAC1_ADDR)
10426 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS5_HIGH register for the ALT_EMAC1 instance. */
10427 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS5_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS5_HIGH_ADDR(ALT_EMAC1_ADDR)
10428 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS5_LOW register for the ALT_EMAC1 instance. */
10429 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS5_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS5_LOW_ADDR(ALT_EMAC1_ADDR)
10430 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS6_HIGH register for the ALT_EMAC1 instance. */
10431 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS6_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS6_HIGH_ADDR(ALT_EMAC1_ADDR)
10432 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS6_LOW register for the ALT_EMAC1 instance. */
10433 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS6_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS6_LOW_ADDR(ALT_EMAC1_ADDR)
10434 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS7_HIGH register for the ALT_EMAC1 instance. */
10435 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS7_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS7_HIGH_ADDR(ALT_EMAC1_ADDR)
10436 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS7_LOW register for the ALT_EMAC1 instance. */
10437 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS7_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS7_LOW_ADDR(ALT_EMAC1_ADDR)
10438 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS8_HIGH register for the ALT_EMAC1 instance. */
10439 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS8_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS8_HIGH_ADDR(ALT_EMAC1_ADDR)
10440 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS8_LOW register for the ALT_EMAC1 instance. */
10441 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS8_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS8_LOW_ADDR(ALT_EMAC1_ADDR)
10442 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS9_HIGH register for the ALT_EMAC1 instance. */
10443 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS9_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS9_HIGH_ADDR(ALT_EMAC1_ADDR)
10444 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS9_LOW register for the ALT_EMAC1 instance. */
10445 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS9_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS9_LOW_ADDR(ALT_EMAC1_ADDR)
10446 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS10_HIGH register for the ALT_EMAC1 instance. */
10447 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS10_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS10_HIGH_ADDR(ALT_EMAC1_ADDR)
10448 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS10_LOW register for the ALT_EMAC1 instance. */
10449 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS10_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS10_LOW_ADDR(ALT_EMAC1_ADDR)
10450 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS11_HIGH register for the ALT_EMAC1 instance. */
10451 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS11_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS11_HIGH_ADDR(ALT_EMAC1_ADDR)
10452 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS11_LOW register for the ALT_EMAC1 instance. */
10453 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS11_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS11_LOW_ADDR(ALT_EMAC1_ADDR)
10454 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS12_HIGH register for the ALT_EMAC1 instance. */
10455 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS12_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS12_HIGH_ADDR(ALT_EMAC1_ADDR)
10456 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS12_LOW register for the ALT_EMAC1 instance. */
10457 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS12_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS12_LOW_ADDR(ALT_EMAC1_ADDR)
10458 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS13_HIGH register for the ALT_EMAC1 instance. */
10459 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS13_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS13_HIGH_ADDR(ALT_EMAC1_ADDR)
10460 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS13_LOW register for the ALT_EMAC1 instance. */
10461 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS13_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS13_LOW_ADDR(ALT_EMAC1_ADDR)
10462 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS14_HIGH register for the ALT_EMAC1 instance. */
10463 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS14_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS14_HIGH_ADDR(ALT_EMAC1_ADDR)
10464 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS14_LOW register for the ALT_EMAC1 instance. */
10465 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS14_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS14_LOW_ADDR(ALT_EMAC1_ADDR)
10466 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS15_HIGH register for the ALT_EMAC1 instance. */
10467 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS15_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS15_HIGH_ADDR(ALT_EMAC1_ADDR)
10468 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS15_LOW register for the ALT_EMAC1 instance. */
10469 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS15_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS15_LOW_ADDR(ALT_EMAC1_ADDR)
10470 /* The address of the ALT_EMAC_GMACGRP_SGMII_RGMII_SMII_CONTROL_STATUS register for the ALT_EMAC1 instance. */
10471 #define ALT_EMAC1_GMACGRP_SGMII_RGMII_SMII_CONTROL_STATUS_ADDR ALT_EMAC_GMACGRP_SGMII_RGMII_SMII_CONTROL_STATUS_ADDR(ALT_EMAC1_ADDR)
10472 /* The address of the ALT_EMAC_GMACGRP_WDOG_TIMEOUT register for the ALT_EMAC1 instance. */
10473 #define ALT_EMAC1_GMACGRP_WDOG_TIMEOUT_ADDR ALT_EMAC_GMACGRP_WDOG_TIMEOUT_ADDR(ALT_EMAC1_ADDR)
10474 /* The address of the ALT_EMAC_GMACGRP_GENPIO register for the ALT_EMAC1 instance. */
10475 #define ALT_EMAC1_GMACGRP_GENPIO_ADDR ALT_EMAC_GMACGRP_GENPIO_ADDR(ALT_EMAC1_ADDR)
10476 /* The address of the ALT_EMAC_GMACGRP_MMC_CONTROL register for the ALT_EMAC1 instance. */
10477 #define ALT_EMAC1_GMACGRP_MMC_CONTROL_ADDR ALT_EMAC_GMACGRP_MMC_CONTROL_ADDR(ALT_EMAC1_ADDR)
10478 /* The address of the ALT_EMAC_GMACGRP_MMC_RECEIVE_INTERRUPT register for the ALT_EMAC1 instance. */
10479 #define ALT_EMAC1_GMACGRP_MMC_RECEIVE_INTERRUPT_ADDR ALT_EMAC_GMACGRP_MMC_RECEIVE_INTERRUPT_ADDR(ALT_EMAC1_ADDR)
10480 /* The address of the ALT_EMAC_GMACGRP_MMC_TRANSMIT_INTERRUPT register for the ALT_EMAC1 instance. */
10481 #define ALT_EMAC1_GMACGRP_MMC_TRANSMIT_INTERRUPT_ADDR ALT_EMAC_GMACGRP_MMC_TRANSMIT_INTERRUPT_ADDR(ALT_EMAC1_ADDR)
10482 /* The address of the ALT_EMAC_GMACGRP_MMC_RECEIVE_INTERRUPT_MASK register for the ALT_EMAC1 instance. */
10483 #define ALT_EMAC1_GMACGRP_MMC_RECEIVE_INTERRUPT_MASK_ADDR ALT_EMAC_GMACGRP_MMC_RECEIVE_INTERRUPT_MASK_ADDR(ALT_EMAC1_ADDR)
10484 /* The address of the ALT_EMAC_GMACGRP_MMC_TRANSMIT_INTERRUPT_MASK register for the ALT_EMAC1 instance. */
10485 #define ALT_EMAC1_GMACGRP_MMC_TRANSMIT_INTERRUPT_MASK_ADDR ALT_EMAC_GMACGRP_MMC_TRANSMIT_INTERRUPT_MASK_ADDR(ALT_EMAC1_ADDR)
10486 /* The address of the ALT_EMAC_GMACGRP_TXOCTETCOUNT_GB register for the ALT_EMAC1 instance. */
10487 #define ALT_EMAC1_GMACGRP_TXOCTETCOUNT_GB_ADDR ALT_EMAC_GMACGRP_TXOCTETCOUNT_GB_ADDR(ALT_EMAC1_ADDR)
10488 /* The address of the ALT_EMAC_GMACGRP_TXFRAMECOUNT_GB register for the ALT_EMAC1 instance. */
10489 #define ALT_EMAC1_GMACGRP_TXFRAMECOUNT_GB_ADDR ALT_EMAC_GMACGRP_TXFRAMECOUNT_GB_ADDR(ALT_EMAC1_ADDR)
10490 /* The address of the ALT_EMAC_GMACGRP_TXBROADCASTFRAMES_G register for the ALT_EMAC1 instance. */
10491 #define ALT_EMAC1_GMACGRP_TXBROADCASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_TXBROADCASTFRAMES_G_ADDR(ALT_EMAC1_ADDR)
10492 /* The address of the ALT_EMAC_GMACGRP_TXMULTICASTFRAMES_G register for the ALT_EMAC1 instance. */
10493 #define ALT_EMAC1_GMACGRP_TXMULTICASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_TXMULTICASTFRAMES_G_ADDR(ALT_EMAC1_ADDR)
10494 /* The address of the ALT_EMAC_GMACGRP_TX64OCTETS_GB register for the ALT_EMAC1 instance. */
10495 #define ALT_EMAC1_GMACGRP_TX64OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX64OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
10496 /* The address of the ALT_EMAC_GMACGRP_TX65TO127OCTETS_GB register for the ALT_EMAC1 instance. */
10497 #define ALT_EMAC1_GMACGRP_TX65TO127OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX65TO127OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
10498 /* The address of the ALT_EMAC_GMACGRP_TX128TO255OCTETS_GB register for the ALT_EMAC1 instance. */
10499 #define ALT_EMAC1_GMACGRP_TX128TO255OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX128TO255OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
10500 /* The address of the ALT_EMAC_GMACGRP_TX256TO511OCTETS_GB register for the ALT_EMAC1 instance. */
10501 #define ALT_EMAC1_GMACGRP_TX256TO511OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX256TO511OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
10502 /* The address of the ALT_EMAC_GMACGRP_TX512TO1023OCTETS_GB register for the ALT_EMAC1 instance. */
10503 #define ALT_EMAC1_GMACGRP_TX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX512TO1023OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
10504 /* The address of the ALT_EMAC_GMACGRP_TX1024TOMAXOCTETS_GB register for the ALT_EMAC1 instance. */
10505 #define ALT_EMAC1_GMACGRP_TX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC1_ADDR)
10506 /* The address of the ALT_EMAC_GMACGRP_TXUNICASTFRAMES_GB register for the ALT_EMAC1 instance. */
10507 #define ALT_EMAC1_GMACGRP_TXUNICASTFRAMES_GB_ADDR ALT_EMAC_GMACGRP_TXUNICASTFRAMES_GB_ADDR(ALT_EMAC1_ADDR)
10508 /* The address of the ALT_EMAC_GMACGRP_TXMULTICASTFRAMES_GB register for the ALT_EMAC1 instance. */
10509 #define ALT_EMAC1_GMACGRP_TXMULTICASTFRAMES_GB_ADDR ALT_EMAC_GMACGRP_TXMULTICASTFRAMES_GB_ADDR(ALT_EMAC1_ADDR)
10510 /* The address of the ALT_EMAC_GMACGRP_TXBROADCASTFRAMES_GB register for the ALT_EMAC1 instance. */
10511 #define ALT_EMAC1_GMACGRP_TXBROADCASTFRAMES_GB_ADDR ALT_EMAC_GMACGRP_TXBROADCASTFRAMES_GB_ADDR(ALT_EMAC1_ADDR)
10512 /* The address of the ALT_EMAC_GMACGRP_TXUNDERFLOWERROR register for the ALT_EMAC1 instance. */
10513 #define ALT_EMAC1_GMACGRP_TXUNDERFLOWERROR_ADDR ALT_EMAC_GMACGRP_TXUNDERFLOWERROR_ADDR(ALT_EMAC1_ADDR)
10514 /* The address of the ALT_EMAC_GMACGRP_TXSINGLECOL_G register for the ALT_EMAC1 instance. */
10515 #define ALT_EMAC1_GMACGRP_TXSINGLECOL_G_ADDR ALT_EMAC_GMACGRP_TXSINGLECOL_G_ADDR(ALT_EMAC1_ADDR)
10516 /* The address of the ALT_EMAC_GMACGRP_TXMULTICOL_G register for the ALT_EMAC1 instance. */
10517 #define ALT_EMAC1_GMACGRP_TXMULTICOL_G_ADDR ALT_EMAC_GMACGRP_TXMULTICOL_G_ADDR(ALT_EMAC1_ADDR)
10518 /* The address of the ALT_EMAC_GMACGRP_TXDEFERRED register for the ALT_EMAC1 instance. */
10519 #define ALT_EMAC1_GMACGRP_TXDEFERRED_ADDR ALT_EMAC_GMACGRP_TXDEFERRED_ADDR(ALT_EMAC1_ADDR)
10520 /* The address of the ALT_EMAC_GMACGRP_TXLATECOL register for the ALT_EMAC1 instance. */
10521 #define ALT_EMAC1_GMACGRP_TXLATECOL_ADDR ALT_EMAC_GMACGRP_TXLATECOL_ADDR(ALT_EMAC1_ADDR)
10522 /* The address of the ALT_EMAC_GMACGRP_TXEXESSCOL register for the ALT_EMAC1 instance. */
10523 #define ALT_EMAC1_GMACGRP_TXEXESSCOL_ADDR ALT_EMAC_GMACGRP_TXEXESSCOL_ADDR(ALT_EMAC1_ADDR)
10524 /* The address of the ALT_EMAC_GMACGRP_TXCARRIERERR register for the ALT_EMAC1 instance. */
10525 #define ALT_EMAC1_GMACGRP_TXCARRIERERR_ADDR ALT_EMAC_GMACGRP_TXCARRIERERR_ADDR(ALT_EMAC1_ADDR)
10526 /* The address of the ALT_EMAC_GMACGRP_TXOCTETCNT register for the ALT_EMAC1 instance. */
10527 #define ALT_EMAC1_GMACGRP_TXOCTETCNT_ADDR ALT_EMAC_GMACGRP_TXOCTETCNT_ADDR(ALT_EMAC1_ADDR)
10528 /* The address of the ALT_EMAC_GMACGRP_TXFRAMECOUNT_G register for the ALT_EMAC1 instance. */
10529 #define ALT_EMAC1_GMACGRP_TXFRAMECOUNT_G_ADDR ALT_EMAC_GMACGRP_TXFRAMECOUNT_G_ADDR(ALT_EMAC1_ADDR)
10530 /* The address of the ALT_EMAC_GMACGRP_TXEXCESSDEF register for the ALT_EMAC1 instance. */
10531 #define ALT_EMAC1_GMACGRP_TXEXCESSDEF_ADDR ALT_EMAC_GMACGRP_TXEXCESSDEF_ADDR(ALT_EMAC1_ADDR)
10532 /* The address of the ALT_EMAC_GMACGRP_TXPAUSEFRAMES register for the ALT_EMAC1 instance. */
10533 #define ALT_EMAC1_GMACGRP_TXPAUSEFRAMES_ADDR ALT_EMAC_GMACGRP_TXPAUSEFRAMES_ADDR(ALT_EMAC1_ADDR)
10534 /* The address of the ALT_EMAC_GMACGRP_TXVLANFRAMES_G register for the ALT_EMAC1 instance. */
10535 #define ALT_EMAC1_GMACGRP_TXVLANFRAMES_G_ADDR ALT_EMAC_GMACGRP_TXVLANFRAMES_G_ADDR(ALT_EMAC1_ADDR)
10536 /* The address of the ALT_EMAC_GMACGRP_TXOVERSIZE_G register for the ALT_EMAC1 instance. */
10537 #define ALT_EMAC1_GMACGRP_TXOVERSIZE_G_ADDR ALT_EMAC_GMACGRP_TXOVERSIZE_G_ADDR(ALT_EMAC1_ADDR)
10538 /* The address of the ALT_EMAC_GMACGRP_RXFRAMECOUNT_GB register for the ALT_EMAC1 instance. */
10539 #define ALT_EMAC1_GMACGRP_RXFRAMECOUNT_GB_ADDR ALT_EMAC_GMACGRP_RXFRAMECOUNT_GB_ADDR(ALT_EMAC1_ADDR)
10540 /* The address of the ALT_EMAC_GMACGRP_RXOCTETCOUNT_GB register for the ALT_EMAC1 instance. */
10541 #define ALT_EMAC1_GMACGRP_RXOCTETCOUNT_GB_ADDR ALT_EMAC_GMACGRP_RXOCTETCOUNT_GB_ADDR(ALT_EMAC1_ADDR)
10542 /* The address of the ALT_EMAC_GMACGRP_RXOCTETCOUNT_G register for the ALT_EMAC1 instance. */
10543 #define ALT_EMAC1_GMACGRP_RXOCTETCOUNT_G_ADDR ALT_EMAC_GMACGRP_RXOCTETCOUNT_G_ADDR(ALT_EMAC1_ADDR)
10544 /* The address of the ALT_EMAC_GMACGRP_RXBROADCASTFRAMES_G register for the ALT_EMAC1 instance. */
10545 #define ALT_EMAC1_GMACGRP_RXBROADCASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_RXBROADCASTFRAMES_G_ADDR(ALT_EMAC1_ADDR)
10546 /* The address of the ALT_EMAC_GMACGRP_RXMULTICASTFRAMES_G register for the ALT_EMAC1 instance. */
10547 #define ALT_EMAC1_GMACGRP_RXMULTICASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_RXMULTICASTFRAMES_G_ADDR(ALT_EMAC1_ADDR)
10548 /* The address of the ALT_EMAC_GMACGRP_RXCRCERROR register for the ALT_EMAC1 instance. */
10549 #define ALT_EMAC1_GMACGRP_RXCRCERROR_ADDR ALT_EMAC_GMACGRP_RXCRCERROR_ADDR(ALT_EMAC1_ADDR)
10550 /* The address of the ALT_EMAC_GMACGRP_RXALIGNMENTERROR register for the ALT_EMAC1 instance. */
10551 #define ALT_EMAC1_GMACGRP_RXALIGNMENTERROR_ADDR ALT_EMAC_GMACGRP_RXALIGNMENTERROR_ADDR(ALT_EMAC1_ADDR)
10552 /* The address of the ALT_EMAC_GMACGRP_RXRUNTERROR register for the ALT_EMAC1 instance. */
10553 #define ALT_EMAC1_GMACGRP_RXRUNTERROR_ADDR ALT_EMAC_GMACGRP_RXRUNTERROR_ADDR(ALT_EMAC1_ADDR)
10554 /* The address of the ALT_EMAC_GMACGRP_RXJABBERERROR register for the ALT_EMAC1 instance. */
10555 #define ALT_EMAC1_GMACGRP_RXJABBERERROR_ADDR ALT_EMAC_GMACGRP_RXJABBERERROR_ADDR(ALT_EMAC1_ADDR)
10556 /* The address of the ALT_EMAC_GMACGRP_RXUNDERSIZE_G register for the ALT_EMAC1 instance. */
10557 #define ALT_EMAC1_GMACGRP_RXUNDERSIZE_G_ADDR ALT_EMAC_GMACGRP_RXUNDERSIZE_G_ADDR(ALT_EMAC1_ADDR)
10558 /* The address of the ALT_EMAC_GMACGRP_RXOVERSIZE_G register for the ALT_EMAC1 instance. */
10559 #define ALT_EMAC1_GMACGRP_RXOVERSIZE_G_ADDR ALT_EMAC_GMACGRP_RXOVERSIZE_G_ADDR(ALT_EMAC1_ADDR)
10560 /* The address of the ALT_EMAC_GMACGRP_RX64OCTETS_GB register for the ALT_EMAC1 instance. */
10561 #define ALT_EMAC1_GMACGRP_RX64OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX64OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
10562 /* The address of the ALT_EMAC_GMACGRP_RX65TO127OCTETS_GB register for the ALT_EMAC1 instance. */
10563 #define ALT_EMAC1_GMACGRP_RX65TO127OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX65TO127OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
10564 /* The address of the ALT_EMAC_GMACGRP_RX128TO255OCTETS_GB register for the ALT_EMAC1 instance. */
10565 #define ALT_EMAC1_GMACGRP_RX128TO255OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX128TO255OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
10566 /* The address of the ALT_EMAC_GMACGRP_RX256TO511OCTETS_GB register for the ALT_EMAC1 instance. */
10567 #define ALT_EMAC1_GMACGRP_RX256TO511OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX256TO511OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
10568 /* The address of the ALT_EMAC_GMACGRP_RX512TO1023OCTETS_GB register for the ALT_EMAC1 instance. */
10569 #define ALT_EMAC1_GMACGRP_RX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX512TO1023OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
10570 /* The address of the ALT_EMAC_GMACGRP_RX1024TOMAXOCTETS_GB register for the ALT_EMAC1 instance. */
10571 #define ALT_EMAC1_GMACGRP_RX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC1_ADDR)
10572 /* The address of the ALT_EMAC_GMACGRP_RXUNICASTFRAMES_G register for the ALT_EMAC1 instance. */
10573 #define ALT_EMAC1_GMACGRP_RXUNICASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_RXUNICASTFRAMES_G_ADDR(ALT_EMAC1_ADDR)
10574 /* The address of the ALT_EMAC_GMACGRP_RXLENGTHERROR register for the ALT_EMAC1 instance. */
10575 #define ALT_EMAC1_GMACGRP_RXLENGTHERROR_ADDR ALT_EMAC_GMACGRP_RXLENGTHERROR_ADDR(ALT_EMAC1_ADDR)
10576 /* The address of the ALT_EMAC_GMACGRP_RXOUTOFRANGETYPE register for the ALT_EMAC1 instance. */
10577 #define ALT_EMAC1_GMACGRP_RXOUTOFRANGETYPE_ADDR ALT_EMAC_GMACGRP_RXOUTOFRANGETYPE_ADDR(ALT_EMAC1_ADDR)
10578 /* The address of the ALT_EMAC_GMACGRP_RXPAUSEFRAMES register for the ALT_EMAC1 instance. */
10579 #define ALT_EMAC1_GMACGRP_RXPAUSEFRAMES_ADDR ALT_EMAC_GMACGRP_RXPAUSEFRAMES_ADDR(ALT_EMAC1_ADDR)
10580 /* The address of the ALT_EMAC_GMACGRP_RXFIFOOVERFLOW register for the ALT_EMAC1 instance. */
10581 #define ALT_EMAC1_GMACGRP_RXFIFOOVERFLOW_ADDR ALT_EMAC_GMACGRP_RXFIFOOVERFLOW_ADDR(ALT_EMAC1_ADDR)
10582 /* The address of the ALT_EMAC_GMACGRP_RXVLANFRAMES_GB register for the ALT_EMAC1 instance. */
10583 #define ALT_EMAC1_GMACGRP_RXVLANFRAMES_GB_ADDR ALT_EMAC_GMACGRP_RXVLANFRAMES_GB_ADDR(ALT_EMAC1_ADDR)
10584 /* The address of the ALT_EMAC_GMACGRP_RXWATCHDOGERROR register for the ALT_EMAC1 instance. */
10585 #define ALT_EMAC1_GMACGRP_RXWATCHDOGERROR_ADDR ALT_EMAC_GMACGRP_RXWATCHDOGERROR_ADDR(ALT_EMAC1_ADDR)
10586 /* The address of the ALT_EMAC_GMACGRP_RXRCVERROR register for the ALT_EMAC1 instance. */
10587 #define ALT_EMAC1_GMACGRP_RXRCVERROR_ADDR ALT_EMAC_GMACGRP_RXRCVERROR_ADDR(ALT_EMAC1_ADDR)
10588 /* The address of the ALT_EMAC_GMACGRP_RXCTRLFRAMES_G register for the ALT_EMAC1 instance. */
10589 #define ALT_EMAC1_GMACGRP_RXCTRLFRAMES_G_ADDR ALT_EMAC_GMACGRP_RXCTRLFRAMES_G_ADDR(ALT_EMAC1_ADDR)
10590 /* The address of the ALT_EMAC_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_MASK register for the ALT_EMAC1 instance. */
10591 #define ALT_EMAC1_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_MASK_ADDR ALT_EMAC_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_MASK_ADDR(ALT_EMAC1_ADDR)
10592 /* The address of the ALT_EMAC_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT register for the ALT_EMAC1 instance. */
10593 #define ALT_EMAC1_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_ADDR ALT_EMAC_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_ADDR(ALT_EMAC1_ADDR)
10594 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_GD_FRMS register for the ALT_EMAC1 instance. */
10595 #define ALT_EMAC1_GMACGRP_RXIPV4_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
10596 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_HDRERR_FRMS register for the ALT_EMAC1 instance. */
10597 #define ALT_EMAC1_GMACGRP_RXIPV4_HDRERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_HDRERR_FRMS_ADDR(ALT_EMAC1_ADDR)
10598 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_NOPAY_FRMS register for the ALT_EMAC1 instance. */
10599 #define ALT_EMAC1_GMACGRP_RXIPV4_NOPAY_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_NOPAY_FRMS_ADDR(ALT_EMAC1_ADDR)
10600 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_FRAG_FRMS register for the ALT_EMAC1 instance. */
10601 #define ALT_EMAC1_GMACGRP_RXIPV4_FRAG_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_FRAG_FRMS_ADDR(ALT_EMAC1_ADDR)
10602 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_UDSBL_FRMS register for the ALT_EMAC1 instance. */
10603 #define ALT_EMAC1_GMACGRP_RXIPV4_UDSBL_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_UDSBL_FRMS_ADDR(ALT_EMAC1_ADDR)
10604 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_GD_FRMS register for the ALT_EMAC1 instance. */
10605 #define ALT_EMAC1_GMACGRP_RXIPV6_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV6_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
10606 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_HDRERR_FRMS register for the ALT_EMAC1 instance. */
10607 #define ALT_EMAC1_GMACGRP_RXIPV6_HDRERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV6_HDRERR_FRMS_ADDR(ALT_EMAC1_ADDR)
10608 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_NOPAY_FRMS register for the ALT_EMAC1 instance. */
10609 #define ALT_EMAC1_GMACGRP_RXIPV6_NOPAY_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV6_NOPAY_FRMS_ADDR(ALT_EMAC1_ADDR)
10610 /* The address of the ALT_EMAC_GMACGRP_RXUDP_GD_FRMS register for the ALT_EMAC1 instance. */
10611 #define ALT_EMAC1_GMACGRP_RXUDP_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXUDP_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
10612 /* The address of the ALT_EMAC_GMACGRP_RXUDP_ERR_FRMS register for the ALT_EMAC1 instance. */
10613 #define ALT_EMAC1_GMACGRP_RXUDP_ERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXUDP_ERR_FRMS_ADDR(ALT_EMAC1_ADDR)
10614 /* The address of the ALT_EMAC_GMACGRP_RXTCP_GD_FRMS register for the ALT_EMAC1 instance. */
10615 #define ALT_EMAC1_GMACGRP_RXTCP_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXTCP_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
10616 /* The address of the ALT_EMAC_GMACGRP_RXTCP_ERR_FRMS register for the ALT_EMAC1 instance. */
10617 #define ALT_EMAC1_GMACGRP_RXTCP_ERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXTCP_ERR_FRMS_ADDR(ALT_EMAC1_ADDR)
10618 /* The address of the ALT_EMAC_GMACGRP_RXICMP_GD_FRMS register for the ALT_EMAC1 instance. */
10619 #define ALT_EMAC1_GMACGRP_RXICMP_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXICMP_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
10620 /* The address of the ALT_EMAC_GMACGRP_RXICMP_ERR_FRMS register for the ALT_EMAC1 instance. */
10621 #define ALT_EMAC1_GMACGRP_RXICMP_ERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXICMP_ERR_FRMS_ADDR(ALT_EMAC1_ADDR)
10622 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_GD_OCTETS register for the ALT_EMAC1 instance. */
10623 #define ALT_EMAC1_GMACGRP_RXIPV4_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
10624 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_HDRERR_OCTETS register for the ALT_EMAC1 instance. */
10625 #define ALT_EMAC1_GMACGRP_RXIPV4_HDRERR_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_HDRERR_OCTETS_ADDR(ALT_EMAC1_ADDR)
10626 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_NOPAY_OCTETS register for the ALT_EMAC1 instance. */
10627 #define ALT_EMAC1_GMACGRP_RXIPV4_NOPAY_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_NOPAY_OCTETS_ADDR(ALT_EMAC1_ADDR)
10628 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_FRAG_OCTETS register for the ALT_EMAC1 instance. */
10629 #define ALT_EMAC1_GMACGRP_RXIPV4_FRAG_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_FRAG_OCTETS_ADDR(ALT_EMAC1_ADDR)
10630 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_UDSBL_OCTETS register for the ALT_EMAC1 instance. */
10631 #define ALT_EMAC1_GMACGRP_RXIPV4_UDSBL_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_UDSBL_OCTETS_ADDR(ALT_EMAC1_ADDR)
10632 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_GD_OCTETS register for the ALT_EMAC1 instance. */
10633 #define ALT_EMAC1_GMACGRP_RXIPV6_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV6_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
10634 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_HDRERR_OCTETS register for the ALT_EMAC1 instance. */
10635 #define ALT_EMAC1_GMACGRP_RXIPV6_HDRERR_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV6_HDRERR_OCTETS_ADDR(ALT_EMAC1_ADDR)
10636 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_NOPAY_OCTETS register for the ALT_EMAC1 instance. */
10637 #define ALT_EMAC1_GMACGRP_RXIPV6_NOPAY_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV6_NOPAY_OCTETS_ADDR(ALT_EMAC1_ADDR)
10638 /* The address of the ALT_EMAC_GMACGRP_RXUDP_GD_OCTETS register for the ALT_EMAC1 instance. */
10639 #define ALT_EMAC1_GMACGRP_RXUDP_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXUDP_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
10640 /* The address of the ALT_EMAC_GMACGRP_RXUDP_ERR_OCTETS register for the ALT_EMAC1 instance. */
10641 #define ALT_EMAC1_GMACGRP_RXUDP_ERR_OCTETS_ADDR ALT_EMAC_GMACGRP_RXUDP_ERR_OCTETS_ADDR(ALT_EMAC1_ADDR)
10642 /* The address of the ALT_EMAC_GMACGRP_RXTCP_GD_OCTETS register for the ALT_EMAC1 instance. */
10643 #define ALT_EMAC1_GMACGRP_RXTCP_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXTCP_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
10644 /* The address of the ALT_EMAC_GMACGRP_RXTCPERROCTETS register for the ALT_EMAC1 instance. */
10645 #define ALT_EMAC1_GMACGRP_RXTCPERROCTETS_ADDR ALT_EMAC_GMACGRP_RXTCPERROCTETS_ADDR(ALT_EMAC1_ADDR)
10646 /* The address of the ALT_EMAC_GMACGRP_RXICMP_GD_OCTETS register for the ALT_EMAC1 instance. */
10647 #define ALT_EMAC1_GMACGRP_RXICMP_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXICMP_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
10648 /* The address of the ALT_EMAC_GMACGRP_RXICMP_ERR_OCTETS register for the ALT_EMAC1 instance. */
10649 #define ALT_EMAC1_GMACGRP_RXICMP_ERR_OCTETS_ADDR ALT_EMAC_GMACGRP_RXICMP_ERR_OCTETS_ADDR(ALT_EMAC1_ADDR)
10650 /* The address of the ALT_EMAC_GMACGRP_L3_L4_CONTROL0 register for the ALT_EMAC1 instance. */
10651 #define ALT_EMAC1_GMACGRP_L3_L4_CONTROL0_ADDR ALT_EMAC_GMACGRP_L3_L4_CONTROL0_ADDR(ALT_EMAC1_ADDR)
10652 /* The address of the ALT_EMAC_GMACGRP_LAYER4_ADDRESS0 register for the ALT_EMAC1 instance. */
10653 #define ALT_EMAC1_GMACGRP_LAYER4_ADDRESS0_ADDR ALT_EMAC_GMACGRP_LAYER4_ADDRESS0_ADDR(ALT_EMAC1_ADDR)
10654 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG0 register for the ALT_EMAC1 instance. */
10655 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR0_REG0_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG0_ADDR(ALT_EMAC1_ADDR)
10656 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG0 register for the ALT_EMAC1 instance. */
10657 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR1_REG0_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG0_ADDR(ALT_EMAC1_ADDR)
10658 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG0 register for the ALT_EMAC1 instance. */
10659 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR2_REG0_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG0_ADDR(ALT_EMAC1_ADDR)
10660 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG0 register for the ALT_EMAC1 instance. */
10661 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR3_REG0_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG0_ADDR(ALT_EMAC1_ADDR)
10662 /* The address of the ALT_EMAC_GMACGRP_L3_L4_CONTROL1 register for the ALT_EMAC1 instance. */
10663 #define ALT_EMAC1_GMACGRP_L3_L4_CONTROL1_ADDR ALT_EMAC_GMACGRP_L3_L4_CONTROL1_ADDR(ALT_EMAC1_ADDR)
10664 /* The address of the ALT_EMAC_GMACGRP_LAYER4_ADDRESS1 register for the ALT_EMAC1 instance. */
10665 #define ALT_EMAC1_GMACGRP_LAYER4_ADDRESS1_ADDR ALT_EMAC_GMACGRP_LAYER4_ADDRESS1_ADDR(ALT_EMAC1_ADDR)
10666 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG1 register for the ALT_EMAC1 instance. */
10667 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR0_REG1_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG1_ADDR(ALT_EMAC1_ADDR)
10668 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG1 register for the ALT_EMAC1 instance. */
10669 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR1_REG1_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG1_ADDR(ALT_EMAC1_ADDR)
10670 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG1 register for the ALT_EMAC1 instance. */
10671 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR2_REG1_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG1_ADDR(ALT_EMAC1_ADDR)
10672 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG1 register for the ALT_EMAC1 instance. */
10673 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR3_REG1_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG1_ADDR(ALT_EMAC1_ADDR)
10674 /* The address of the ALT_EMAC_GMACGRP_L3_L4_CONTROL2 register for the ALT_EMAC1 instance. */
10675 #define ALT_EMAC1_GMACGRP_L3_L4_CONTROL2_ADDR ALT_EMAC_GMACGRP_L3_L4_CONTROL2_ADDR(ALT_EMAC1_ADDR)
10676 /* The address of the ALT_EMAC_GMACGRP_LAYER4_ADDRESS2 register for the ALT_EMAC1 instance. */
10677 #define ALT_EMAC1_GMACGRP_LAYER4_ADDRESS2_ADDR ALT_EMAC_GMACGRP_LAYER4_ADDRESS2_ADDR(ALT_EMAC1_ADDR)
10678 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG2 register for the ALT_EMAC1 instance. */
10679 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR0_REG2_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG2_ADDR(ALT_EMAC1_ADDR)
10680 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG2 register for the ALT_EMAC1 instance. */
10681 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR1_REG2_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG2_ADDR(ALT_EMAC1_ADDR)
10682 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG2 register for the ALT_EMAC1 instance. */
10683 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR2_REG2_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG2_ADDR(ALT_EMAC1_ADDR)
10684 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG2 register for the ALT_EMAC1 instance. */
10685 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR3_REG2_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG2_ADDR(ALT_EMAC1_ADDR)
10686 /* The address of the ALT_EMAC_GMACGRP_L3_L4_CONTROL3 register for the ALT_EMAC1 instance. */
10687 #define ALT_EMAC1_GMACGRP_L3_L4_CONTROL3_ADDR ALT_EMAC_GMACGRP_L3_L4_CONTROL3_ADDR(ALT_EMAC1_ADDR)
10688 /* The address of the ALT_EMAC_GMACGRP_LAYER4_ADDRESS3 register for the ALT_EMAC1 instance. */
10689 #define ALT_EMAC1_GMACGRP_LAYER4_ADDRESS3_ADDR ALT_EMAC_GMACGRP_LAYER4_ADDRESS3_ADDR(ALT_EMAC1_ADDR)
10690 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG3 register for the ALT_EMAC1 instance. */
10691 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR0_REG3_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG3_ADDR(ALT_EMAC1_ADDR)
10692 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG3 register for the ALT_EMAC1 instance. */
10693 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR1_REG3_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG3_ADDR(ALT_EMAC1_ADDR)
10694 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG3 register for the ALT_EMAC1 instance. */
10695 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR2_REG3_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG3_ADDR(ALT_EMAC1_ADDR)
10696 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG3 register for the ALT_EMAC1 instance. */
10697 #define ALT_EMAC1_GMACGRP_LAYER3_ADDR3_REG3_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG3_ADDR(ALT_EMAC1_ADDR)
10698 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG0 register for the ALT_EMAC1 instance. */
10699 #define ALT_EMAC1_GMACGRP_HASH_TABLE_REG0_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG0_ADDR(ALT_EMAC1_ADDR)
10700 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG1 register for the ALT_EMAC1 instance. */
10701 #define ALT_EMAC1_GMACGRP_HASH_TABLE_REG1_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG1_ADDR(ALT_EMAC1_ADDR)
10702 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG2 register for the ALT_EMAC1 instance. */
10703 #define ALT_EMAC1_GMACGRP_HASH_TABLE_REG2_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG2_ADDR(ALT_EMAC1_ADDR)
10704 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG3 register for the ALT_EMAC1 instance. */
10705 #define ALT_EMAC1_GMACGRP_HASH_TABLE_REG3_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG3_ADDR(ALT_EMAC1_ADDR)
10706 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG4 register for the ALT_EMAC1 instance. */
10707 #define ALT_EMAC1_GMACGRP_HASH_TABLE_REG4_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG4_ADDR(ALT_EMAC1_ADDR)
10708 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG5 register for the ALT_EMAC1 instance. */
10709 #define ALT_EMAC1_GMACGRP_HASH_TABLE_REG5_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG5_ADDR(ALT_EMAC1_ADDR)
10710 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG6 register for the ALT_EMAC1 instance. */
10711 #define ALT_EMAC1_GMACGRP_HASH_TABLE_REG6_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG6_ADDR(ALT_EMAC1_ADDR)
10712 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG7 register for the ALT_EMAC1 instance. */
10713 #define ALT_EMAC1_GMACGRP_HASH_TABLE_REG7_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG7_ADDR(ALT_EMAC1_ADDR)
10714 /* The address of the ALT_EMAC_GMACGRP_VLAN_INCL_REG register for the ALT_EMAC1 instance. */
10715 #define ALT_EMAC1_GMACGRP_VLAN_INCL_REG_ADDR ALT_EMAC_GMACGRP_VLAN_INCL_REG_ADDR(ALT_EMAC1_ADDR)
10716 /* The address of the ALT_EMAC_GMACGRP_VLAN_HASH_TABLE_REG register for the ALT_EMAC1 instance. */
10717 #define ALT_EMAC1_GMACGRP_VLAN_HASH_TABLE_REG_ADDR ALT_EMAC_GMACGRP_VLAN_HASH_TABLE_REG_ADDR(ALT_EMAC1_ADDR)
10718 /* The address of the ALT_EMAC_GMACGRP_TIMESTAMP_CONTROL register for the ALT_EMAC1 instance. */
10719 #define ALT_EMAC1_GMACGRP_TIMESTAMP_CONTROL_ADDR ALT_EMAC_GMACGRP_TIMESTAMP_CONTROL_ADDR(ALT_EMAC1_ADDR)
10720 /* The address of the ALT_EMAC_GMACGRP_SUB_SECOND_INCREMENT register for the ALT_EMAC1 instance. */
10721 #define ALT_EMAC1_GMACGRP_SUB_SECOND_INCREMENT_ADDR ALT_EMAC_GMACGRP_SUB_SECOND_INCREMENT_ADDR(ALT_EMAC1_ADDR)
10722 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_SECONDS register for the ALT_EMAC1 instance. */
10723 #define ALT_EMAC1_GMACGRP_SYSTEM_TIME_SECONDS_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_SECONDS_ADDR(ALT_EMAC1_ADDR)
10724 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_NANOSECONDS register for the ALT_EMAC1 instance. */
10725 #define ALT_EMAC1_GMACGRP_SYSTEM_TIME_NANOSECONDS_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_NANOSECONDS_ADDR(ALT_EMAC1_ADDR)
10726 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_SECONDS_UPDATE register for the ALT_EMAC1 instance. */
10727 #define ALT_EMAC1_GMACGRP_SYSTEM_TIME_SECONDS_UPDATE_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_SECONDS_UPDATE_ADDR(ALT_EMAC1_ADDR)
10728 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_NANOSECONDS_UPDATE register for the ALT_EMAC1 instance. */
10729 #define ALT_EMAC1_GMACGRP_SYSTEM_TIME_NANOSECONDS_UPDATE_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_NANOSECONDS_UPDATE_ADDR(ALT_EMAC1_ADDR)
10730 /* The address of the ALT_EMAC_GMACGRP_TIMESTAMP_ADDEND register for the ALT_EMAC1 instance. */
10731 #define ALT_EMAC1_GMACGRP_TIMESTAMP_ADDEND_ADDR ALT_EMAC_GMACGRP_TIMESTAMP_ADDEND_ADDR(ALT_EMAC1_ADDR)
10732 /* The address of the ALT_EMAC_GMACGRP_TARGET_TIME_SECONDS register for the ALT_EMAC1 instance. */
10733 #define ALT_EMAC1_GMACGRP_TARGET_TIME_SECONDS_ADDR ALT_EMAC_GMACGRP_TARGET_TIME_SECONDS_ADDR(ALT_EMAC1_ADDR)
10734 /* The address of the ALT_EMAC_GMACGRP_TARGET_TIME_NANOSECONDS register for the ALT_EMAC1 instance. */
10735 #define ALT_EMAC1_GMACGRP_TARGET_TIME_NANOSECONDS_ADDR ALT_EMAC_GMACGRP_TARGET_TIME_NANOSECONDS_ADDR(ALT_EMAC1_ADDR)
10736 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_HIGHER_WORD_SECONDS register for the ALT_EMAC1 instance. */
10737 #define ALT_EMAC1_GMACGRP_SYSTEM_TIME_HIGHER_WORD_SECONDS_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_HIGHER_WORD_SECONDS_ADDR(ALT_EMAC1_ADDR)
10738 /* The address of the ALT_EMAC_GMACGRP_TIMESTAMP_STATUS register for the ALT_EMAC1 instance. */
10739 #define ALT_EMAC1_GMACGRP_TIMESTAMP_STATUS_ADDR ALT_EMAC_GMACGRP_TIMESTAMP_STATUS_ADDR(ALT_EMAC1_ADDR)
10740 /* The address of the ALT_EMAC_GMACGRP_PPS_CONTROL register for the ALT_EMAC1 instance. */
10741 #define ALT_EMAC1_GMACGRP_PPS_CONTROL_ADDR ALT_EMAC_GMACGRP_PPS_CONTROL_ADDR(ALT_EMAC1_ADDR)
10742 /* The address of the ALT_EMAC_GMACGRP_AUXILIARY_TIMESTAMP_NANOSECONDS register for the ALT_EMAC1 instance. */
10743 #define ALT_EMAC1_GMACGRP_AUXILIARY_TIMESTAMP_NANOSECONDS_ADDR ALT_EMAC_GMACGRP_AUXILIARY_TIMESTAMP_NANOSECONDS_ADDR(ALT_EMAC1_ADDR)
10744 /* The address of the ALT_EMAC_GMACGRP_AUXILIARY_TIMESTAMP_SECONDS register for the ALT_EMAC1 instance. */
10745 #define ALT_EMAC1_GMACGRP_AUXILIARY_TIMESTAMP_SECONDS_ADDR ALT_EMAC_GMACGRP_AUXILIARY_TIMESTAMP_SECONDS_ADDR(ALT_EMAC1_ADDR)
10746 /* The address of the ALT_EMAC_GMACGRP_PPS0_INTERVAL register for the ALT_EMAC1 instance. */
10747 #define ALT_EMAC1_GMACGRP_PPS0_INTERVAL_ADDR ALT_EMAC_GMACGRP_PPS0_INTERVAL_ADDR(ALT_EMAC1_ADDR)
10748 /* The address of the ALT_EMAC_GMACGRP_PPS0_WIDTH register for the ALT_EMAC1 instance. */
10749 #define ALT_EMAC1_GMACGRP_PPS0_WIDTH_ADDR ALT_EMAC_GMACGRP_PPS0_WIDTH_ADDR(ALT_EMAC1_ADDR)
10750 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS16_HIGH register for the ALT_EMAC1 instance. */
10751 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS16_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS16_HIGH_ADDR(ALT_EMAC1_ADDR)
10752 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS16_LOW register for the ALT_EMAC1 instance. */
10753 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS16_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS16_LOW_ADDR(ALT_EMAC1_ADDR)
10754 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS17_HIGH register for the ALT_EMAC1 instance. */
10755 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS17_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS17_HIGH_ADDR(ALT_EMAC1_ADDR)
10756 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS17_LOW register for the ALT_EMAC1 instance. */
10757 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS17_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS17_LOW_ADDR(ALT_EMAC1_ADDR)
10758 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS18_HIGH register for the ALT_EMAC1 instance. */
10759 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS18_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS18_HIGH_ADDR(ALT_EMAC1_ADDR)
10760 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS18_LOW register for the ALT_EMAC1 instance. */
10761 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS18_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS18_LOW_ADDR(ALT_EMAC1_ADDR)
10762 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS19_HIGH register for the ALT_EMAC1 instance. */
10763 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS19_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS19_HIGH_ADDR(ALT_EMAC1_ADDR)
10764 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS19_LOW register for the ALT_EMAC1 instance. */
10765 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS19_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS19_LOW_ADDR(ALT_EMAC1_ADDR)
10766 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS20_HIGH register for the ALT_EMAC1 instance. */
10767 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS20_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS20_HIGH_ADDR(ALT_EMAC1_ADDR)
10768 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS20_LOW register for the ALT_EMAC1 instance. */
10769 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS20_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS20_LOW_ADDR(ALT_EMAC1_ADDR)
10770 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS21_HIGH register for the ALT_EMAC1 instance. */
10771 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS21_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS21_HIGH_ADDR(ALT_EMAC1_ADDR)
10772 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS21_LOW register for the ALT_EMAC1 instance. */
10773 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS21_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS21_LOW_ADDR(ALT_EMAC1_ADDR)
10774 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS22_HIGH register for the ALT_EMAC1 instance. */
10775 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS22_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS22_HIGH_ADDR(ALT_EMAC1_ADDR)
10776 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS22_LOW register for the ALT_EMAC1 instance. */
10777 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS22_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS22_LOW_ADDR(ALT_EMAC1_ADDR)
10778 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS23_HIGH register for the ALT_EMAC1 instance. */
10779 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS23_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS23_HIGH_ADDR(ALT_EMAC1_ADDR)
10780 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS23_LOW register for the ALT_EMAC1 instance. */
10781 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS23_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS23_LOW_ADDR(ALT_EMAC1_ADDR)
10782 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS24_HIGH register for the ALT_EMAC1 instance. */
10783 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS24_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS24_HIGH_ADDR(ALT_EMAC1_ADDR)
10784 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS24_LOW register for the ALT_EMAC1 instance. */
10785 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS24_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS24_LOW_ADDR(ALT_EMAC1_ADDR)
10786 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS25_HIGH register for the ALT_EMAC1 instance. */
10787 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS25_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS25_HIGH_ADDR(ALT_EMAC1_ADDR)
10788 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS25_LOW register for the ALT_EMAC1 instance. */
10789 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS25_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS25_LOW_ADDR(ALT_EMAC1_ADDR)
10790 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS26_HIGH register for the ALT_EMAC1 instance. */
10791 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS26_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS26_HIGH_ADDR(ALT_EMAC1_ADDR)
10792 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS26_LOW register for the ALT_EMAC1 instance. */
10793 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS26_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS26_LOW_ADDR(ALT_EMAC1_ADDR)
10794 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS27_HIGH register for the ALT_EMAC1 instance. */
10795 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS27_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS27_HIGH_ADDR(ALT_EMAC1_ADDR)
10796 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS27_LOW register for the ALT_EMAC1 instance. */
10797 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS27_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS27_LOW_ADDR(ALT_EMAC1_ADDR)
10798 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS28_HIGH register for the ALT_EMAC1 instance. */
10799 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS28_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS28_HIGH_ADDR(ALT_EMAC1_ADDR)
10800 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS28_LOW register for the ALT_EMAC1 instance. */
10801 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS28_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS28_LOW_ADDR(ALT_EMAC1_ADDR)
10802 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS29_HIGH register for the ALT_EMAC1 instance. */
10803 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS29_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS29_HIGH_ADDR(ALT_EMAC1_ADDR)
10804 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS29_LOW register for the ALT_EMAC1 instance. */
10805 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS29_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS29_LOW_ADDR(ALT_EMAC1_ADDR)
10806 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS30_HIGH register for the ALT_EMAC1 instance. */
10807 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS30_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS30_HIGH_ADDR(ALT_EMAC1_ADDR)
10808 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS30_LOW register for the ALT_EMAC1 instance. */
10809 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS30_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS30_LOW_ADDR(ALT_EMAC1_ADDR)
10810 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS31_HIGH register for the ALT_EMAC1 instance. */
10811 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS31_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS31_HIGH_ADDR(ALT_EMAC1_ADDR)
10812 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS31_LOW register for the ALT_EMAC1 instance. */
10813 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS31_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS31_LOW_ADDR(ALT_EMAC1_ADDR)
10814 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS32_HIGH register for the ALT_EMAC1 instance. */
10815 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS32_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS32_HIGH_ADDR(ALT_EMAC1_ADDR)
10816 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS32_LOW register for the ALT_EMAC1 instance. */
10817 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS32_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS32_LOW_ADDR(ALT_EMAC1_ADDR)
10818 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS33_HIGH register for the ALT_EMAC1 instance. */
10819 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS33_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS33_HIGH_ADDR(ALT_EMAC1_ADDR)
10820 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS33_LOW register for the ALT_EMAC1 instance. */
10821 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS33_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS33_LOW_ADDR(ALT_EMAC1_ADDR)
10822 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS34_HIGH register for the ALT_EMAC1 instance. */
10823 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS34_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS34_HIGH_ADDR(ALT_EMAC1_ADDR)
10824 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS34_LOW register for the ALT_EMAC1 instance. */
10825 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS34_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS34_LOW_ADDR(ALT_EMAC1_ADDR)
10826 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS35_HIGH register for the ALT_EMAC1 instance. */
10827 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS35_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS35_HIGH_ADDR(ALT_EMAC1_ADDR)
10828 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS35_LOW register for the ALT_EMAC1 instance. */
10829 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS35_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS35_LOW_ADDR(ALT_EMAC1_ADDR)
10830 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS36_HIGH register for the ALT_EMAC1 instance. */
10831 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS36_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS36_HIGH_ADDR(ALT_EMAC1_ADDR)
10832 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS36_LOW register for the ALT_EMAC1 instance. */
10833 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS36_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS36_LOW_ADDR(ALT_EMAC1_ADDR)
10834 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS37_HIGH register for the ALT_EMAC1 instance. */
10835 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS37_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS37_HIGH_ADDR(ALT_EMAC1_ADDR)
10836 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS37_LOW register for the ALT_EMAC1 instance. */
10837 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS37_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS37_LOW_ADDR(ALT_EMAC1_ADDR)
10838 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS38_HIGH register for the ALT_EMAC1 instance. */
10839 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS38_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS38_HIGH_ADDR(ALT_EMAC1_ADDR)
10840 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS38_LOW register for the ALT_EMAC1 instance. */
10841 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS38_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS38_LOW_ADDR(ALT_EMAC1_ADDR)
10842 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS39_HIGH register for the ALT_EMAC1 instance. */
10843 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS39_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS39_HIGH_ADDR(ALT_EMAC1_ADDR)
10844 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS39_LOW register for the ALT_EMAC1 instance. */
10845 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS39_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS39_LOW_ADDR(ALT_EMAC1_ADDR)
10846 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS40_HIGH register for the ALT_EMAC1 instance. */
10847 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS40_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS40_HIGH_ADDR(ALT_EMAC1_ADDR)
10848 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS40_LOW register for the ALT_EMAC1 instance. */
10849 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS40_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS40_LOW_ADDR(ALT_EMAC1_ADDR)
10850 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS41_HIGH register for the ALT_EMAC1 instance. */
10851 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS41_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS41_HIGH_ADDR(ALT_EMAC1_ADDR)
10852 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS41_LOW register for the ALT_EMAC1 instance. */
10853 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS41_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS41_LOW_ADDR(ALT_EMAC1_ADDR)
10854 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS42_HIGH register for the ALT_EMAC1 instance. */
10855 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS42_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS42_HIGH_ADDR(ALT_EMAC1_ADDR)
10856 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS42_LOW register for the ALT_EMAC1 instance. */
10857 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS42_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS42_LOW_ADDR(ALT_EMAC1_ADDR)
10858 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS43_HIGH register for the ALT_EMAC1 instance. */
10859 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS43_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS43_HIGH_ADDR(ALT_EMAC1_ADDR)
10860 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS43_LOW register for the ALT_EMAC1 instance. */
10861 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS43_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS43_LOW_ADDR(ALT_EMAC1_ADDR)
10862 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS44_HIGH register for the ALT_EMAC1 instance. */
10863 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS44_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS44_HIGH_ADDR(ALT_EMAC1_ADDR)
10864 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS44_LOW register for the ALT_EMAC1 instance. */
10865 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS44_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS44_LOW_ADDR(ALT_EMAC1_ADDR)
10866 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS45_HIGH register for the ALT_EMAC1 instance. */
10867 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS45_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS45_HIGH_ADDR(ALT_EMAC1_ADDR)
10868 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS45_LOW register for the ALT_EMAC1 instance. */
10869 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS45_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS45_LOW_ADDR(ALT_EMAC1_ADDR)
10870 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS46_HIGH register for the ALT_EMAC1 instance. */
10871 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS46_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS46_HIGH_ADDR(ALT_EMAC1_ADDR)
10872 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS46_LOW register for the ALT_EMAC1 instance. */
10873 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS46_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS46_LOW_ADDR(ALT_EMAC1_ADDR)
10874 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS47_HIGH register for the ALT_EMAC1 instance. */
10875 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS47_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS47_HIGH_ADDR(ALT_EMAC1_ADDR)
10876 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS47_LOW register for the ALT_EMAC1 instance. */
10877 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS47_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS47_LOW_ADDR(ALT_EMAC1_ADDR)
10878 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS48_HIGH register for the ALT_EMAC1 instance. */
10879 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS48_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS48_HIGH_ADDR(ALT_EMAC1_ADDR)
10880 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS48_LOW register for the ALT_EMAC1 instance. */
10881 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS48_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS48_LOW_ADDR(ALT_EMAC1_ADDR)
10882 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS49_HIGH register for the ALT_EMAC1 instance. */
10883 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS49_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS49_HIGH_ADDR(ALT_EMAC1_ADDR)
10884 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS49_LOW register for the ALT_EMAC1 instance. */
10885 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS49_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS49_LOW_ADDR(ALT_EMAC1_ADDR)
10886 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS50_HIGH register for the ALT_EMAC1 instance. */
10887 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS50_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS50_HIGH_ADDR(ALT_EMAC1_ADDR)
10888 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS50_LOW register for the ALT_EMAC1 instance. */
10889 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS50_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS50_LOW_ADDR(ALT_EMAC1_ADDR)
10890 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS51_HIGH register for the ALT_EMAC1 instance. */
10891 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS51_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS51_HIGH_ADDR(ALT_EMAC1_ADDR)
10892 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS51_LOW register for the ALT_EMAC1 instance. */
10893 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS51_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS51_LOW_ADDR(ALT_EMAC1_ADDR)
10894 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS52_HIGH register for the ALT_EMAC1 instance. */
10895 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS52_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS52_HIGH_ADDR(ALT_EMAC1_ADDR)
10896 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS52_LOW register for the ALT_EMAC1 instance. */
10897 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS52_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS52_LOW_ADDR(ALT_EMAC1_ADDR)
10898 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS53_HIGH register for the ALT_EMAC1 instance. */
10899 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS53_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS53_HIGH_ADDR(ALT_EMAC1_ADDR)
10900 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS53_LOW register for the ALT_EMAC1 instance. */
10901 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS53_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS53_LOW_ADDR(ALT_EMAC1_ADDR)
10902 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS54_HIGH register for the ALT_EMAC1 instance. */
10903 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS54_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS54_HIGH_ADDR(ALT_EMAC1_ADDR)
10904 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS54_LOW register for the ALT_EMAC1 instance. */
10905 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS54_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS54_LOW_ADDR(ALT_EMAC1_ADDR)
10906 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS55_HIGH register for the ALT_EMAC1 instance. */
10907 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS55_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS55_HIGH_ADDR(ALT_EMAC1_ADDR)
10908 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS55_LOW register for the ALT_EMAC1 instance. */
10909 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS55_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS55_LOW_ADDR(ALT_EMAC1_ADDR)
10910 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS56_HIGH register for the ALT_EMAC1 instance. */
10911 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS56_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS56_HIGH_ADDR(ALT_EMAC1_ADDR)
10912 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS56_LOW register for the ALT_EMAC1 instance. */
10913 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS56_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS56_LOW_ADDR(ALT_EMAC1_ADDR)
10914 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS57_HIGH register for the ALT_EMAC1 instance. */
10915 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS57_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS57_HIGH_ADDR(ALT_EMAC1_ADDR)
10916 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS57_LOW register for the ALT_EMAC1 instance. */
10917 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS57_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS57_LOW_ADDR(ALT_EMAC1_ADDR)
10918 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS58_HIGH register for the ALT_EMAC1 instance. */
10919 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS58_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS58_HIGH_ADDR(ALT_EMAC1_ADDR)
10920 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS58_LOW register for the ALT_EMAC1 instance. */
10921 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS58_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS58_LOW_ADDR(ALT_EMAC1_ADDR)
10922 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS59_HIGH register for the ALT_EMAC1 instance. */
10923 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS59_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS59_HIGH_ADDR(ALT_EMAC1_ADDR)
10924 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS59_LOW register for the ALT_EMAC1 instance. */
10925 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS59_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS59_LOW_ADDR(ALT_EMAC1_ADDR)
10926 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS60_HIGH register for the ALT_EMAC1 instance. */
10927 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS60_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS60_HIGH_ADDR(ALT_EMAC1_ADDR)
10928 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS60_LOW register for the ALT_EMAC1 instance. */
10929 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS60_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS60_LOW_ADDR(ALT_EMAC1_ADDR)
10930 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS61_HIGH register for the ALT_EMAC1 instance. */
10931 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS61_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS61_HIGH_ADDR(ALT_EMAC1_ADDR)
10932 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS61_LOW register for the ALT_EMAC1 instance. */
10933 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS61_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS61_LOW_ADDR(ALT_EMAC1_ADDR)
10934 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS62_HIGH register for the ALT_EMAC1 instance. */
10935 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS62_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS62_HIGH_ADDR(ALT_EMAC1_ADDR)
10936 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS62_LOW register for the ALT_EMAC1 instance. */
10937 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS62_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS62_LOW_ADDR(ALT_EMAC1_ADDR)
10938 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS63_HIGH register for the ALT_EMAC1 instance. */
10939 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS63_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS63_HIGH_ADDR(ALT_EMAC1_ADDR)
10940 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS63_LOW register for the ALT_EMAC1 instance. */
10941 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS63_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS63_LOW_ADDR(ALT_EMAC1_ADDR)
10942 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS64_HIGH register for the ALT_EMAC1 instance. */
10943 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS64_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS64_HIGH_ADDR(ALT_EMAC1_ADDR)
10944 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS64_LOW register for the ALT_EMAC1 instance. */
10945 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS64_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS64_LOW_ADDR(ALT_EMAC1_ADDR)
10946 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS65_HIGH register for the ALT_EMAC1 instance. */
10947 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS65_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS65_HIGH_ADDR(ALT_EMAC1_ADDR)
10948 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS65_LOW register for the ALT_EMAC1 instance. */
10949 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS65_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS65_LOW_ADDR(ALT_EMAC1_ADDR)
10950 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS66_HIGH register for the ALT_EMAC1 instance. */
10951 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS66_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS66_HIGH_ADDR(ALT_EMAC1_ADDR)
10952 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS66_LOW register for the ALT_EMAC1 instance. */
10953 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS66_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS66_LOW_ADDR(ALT_EMAC1_ADDR)
10954 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS67_HIGH register for the ALT_EMAC1 instance. */
10955 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS67_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS67_HIGH_ADDR(ALT_EMAC1_ADDR)
10956 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS67_LOW register for the ALT_EMAC1 instance. */
10957 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS67_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS67_LOW_ADDR(ALT_EMAC1_ADDR)
10958 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS68_HIGH register for the ALT_EMAC1 instance. */
10959 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS68_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS68_HIGH_ADDR(ALT_EMAC1_ADDR)
10960 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS68_LOW register for the ALT_EMAC1 instance. */
10961 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS68_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS68_LOW_ADDR(ALT_EMAC1_ADDR)
10962 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS69_HIGH register for the ALT_EMAC1 instance. */
10963 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS69_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS69_HIGH_ADDR(ALT_EMAC1_ADDR)
10964 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS69_LOW register for the ALT_EMAC1 instance. */
10965 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS69_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS69_LOW_ADDR(ALT_EMAC1_ADDR)
10966 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS70_HIGH register for the ALT_EMAC1 instance. */
10967 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS70_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS70_HIGH_ADDR(ALT_EMAC1_ADDR)
10968 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS70_LOW register for the ALT_EMAC1 instance. */
10969 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS70_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS70_LOW_ADDR(ALT_EMAC1_ADDR)
10970 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS71_HIGH register for the ALT_EMAC1 instance. */
10971 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS71_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS71_HIGH_ADDR(ALT_EMAC1_ADDR)
10972 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS71_LOW register for the ALT_EMAC1 instance. */
10973 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS71_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS71_LOW_ADDR(ALT_EMAC1_ADDR)
10974 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS72_HIGH register for the ALT_EMAC1 instance. */
10975 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS72_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS72_HIGH_ADDR(ALT_EMAC1_ADDR)
10976 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS72_LOW register for the ALT_EMAC1 instance. */
10977 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS72_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS72_LOW_ADDR(ALT_EMAC1_ADDR)
10978 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS73_HIGH register for the ALT_EMAC1 instance. */
10979 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS73_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS73_HIGH_ADDR(ALT_EMAC1_ADDR)
10980 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS73_LOW register for the ALT_EMAC1 instance. */
10981 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS73_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS73_LOW_ADDR(ALT_EMAC1_ADDR)
10982 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS74_HIGH register for the ALT_EMAC1 instance. */
10983 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS74_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS74_HIGH_ADDR(ALT_EMAC1_ADDR)
10984 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS74_LOW register for the ALT_EMAC1 instance. */
10985 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS74_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS74_LOW_ADDR(ALT_EMAC1_ADDR)
10986 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS75_HIGH register for the ALT_EMAC1 instance. */
10987 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS75_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS75_HIGH_ADDR(ALT_EMAC1_ADDR)
10988 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS75_LOW register for the ALT_EMAC1 instance. */
10989 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS75_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS75_LOW_ADDR(ALT_EMAC1_ADDR)
10990 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS76_HIGH register for the ALT_EMAC1 instance. */
10991 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS76_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS76_HIGH_ADDR(ALT_EMAC1_ADDR)
10992 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS76_LOW register for the ALT_EMAC1 instance. */
10993 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS76_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS76_LOW_ADDR(ALT_EMAC1_ADDR)
10994 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS77_HIGH register for the ALT_EMAC1 instance. */
10995 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS77_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS77_HIGH_ADDR(ALT_EMAC1_ADDR)
10996 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS77_LOW register for the ALT_EMAC1 instance. */
10997 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS77_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS77_LOW_ADDR(ALT_EMAC1_ADDR)
10998 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS78_HIGH register for the ALT_EMAC1 instance. */
10999 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS78_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS78_HIGH_ADDR(ALT_EMAC1_ADDR)
11000 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS78_LOW register for the ALT_EMAC1 instance. */
11001 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS78_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS78_LOW_ADDR(ALT_EMAC1_ADDR)
11002 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS79_HIGH register for the ALT_EMAC1 instance. */
11003 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS79_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS79_HIGH_ADDR(ALT_EMAC1_ADDR)
11004 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS79_LOW register for the ALT_EMAC1 instance. */
11005 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS79_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS79_LOW_ADDR(ALT_EMAC1_ADDR)
11006 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS80_HIGH register for the ALT_EMAC1 instance. */
11007 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS80_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS80_HIGH_ADDR(ALT_EMAC1_ADDR)
11008 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS80_LOW register for the ALT_EMAC1 instance. */
11009 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS80_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS80_LOW_ADDR(ALT_EMAC1_ADDR)
11010 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS81_HIGH register for the ALT_EMAC1 instance. */
11011 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS81_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS81_HIGH_ADDR(ALT_EMAC1_ADDR)
11012 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS81_LOW register for the ALT_EMAC1 instance. */
11013 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS81_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS81_LOW_ADDR(ALT_EMAC1_ADDR)
11014 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS82_HIGH register for the ALT_EMAC1 instance. */
11015 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS82_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS82_HIGH_ADDR(ALT_EMAC1_ADDR)
11016 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS82_LOW register for the ALT_EMAC1 instance. */
11017 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS82_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS82_LOW_ADDR(ALT_EMAC1_ADDR)
11018 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS83_HIGH register for the ALT_EMAC1 instance. */
11019 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS83_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS83_HIGH_ADDR(ALT_EMAC1_ADDR)
11020 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS83_LOW register for the ALT_EMAC1 instance. */
11021 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS83_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS83_LOW_ADDR(ALT_EMAC1_ADDR)
11022 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS84_HIGH register for the ALT_EMAC1 instance. */
11023 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS84_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS84_HIGH_ADDR(ALT_EMAC1_ADDR)
11024 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS84_LOW register for the ALT_EMAC1 instance. */
11025 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS84_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS84_LOW_ADDR(ALT_EMAC1_ADDR)
11026 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS85_HIGH register for the ALT_EMAC1 instance. */
11027 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS85_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS85_HIGH_ADDR(ALT_EMAC1_ADDR)
11028 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS85_LOW register for the ALT_EMAC1 instance. */
11029 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS85_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS85_LOW_ADDR(ALT_EMAC1_ADDR)
11030 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS86_HIGH register for the ALT_EMAC1 instance. */
11031 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS86_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS86_HIGH_ADDR(ALT_EMAC1_ADDR)
11032 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS86_LOW register for the ALT_EMAC1 instance. */
11033 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS86_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS86_LOW_ADDR(ALT_EMAC1_ADDR)
11034 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS87_HIGH register for the ALT_EMAC1 instance. */
11035 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS87_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS87_HIGH_ADDR(ALT_EMAC1_ADDR)
11036 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS87_LOW register for the ALT_EMAC1 instance. */
11037 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS87_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS87_LOW_ADDR(ALT_EMAC1_ADDR)
11038 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS88_HIGH register for the ALT_EMAC1 instance. */
11039 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS88_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS88_HIGH_ADDR(ALT_EMAC1_ADDR)
11040 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS88_LOW register for the ALT_EMAC1 instance. */
11041 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS88_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS88_LOW_ADDR(ALT_EMAC1_ADDR)
11042 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS89_HIGH register for the ALT_EMAC1 instance. */
11043 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS89_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS89_HIGH_ADDR(ALT_EMAC1_ADDR)
11044 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS89_LOW register for the ALT_EMAC1 instance. */
11045 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS89_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS89_LOW_ADDR(ALT_EMAC1_ADDR)
11046 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS90_HIGH register for the ALT_EMAC1 instance. */
11047 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS90_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS90_HIGH_ADDR(ALT_EMAC1_ADDR)
11048 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS90_LOW register for the ALT_EMAC1 instance. */
11049 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS90_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS90_LOW_ADDR(ALT_EMAC1_ADDR)
11050 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS91_HIGH register for the ALT_EMAC1 instance. */
11051 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS91_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS91_HIGH_ADDR(ALT_EMAC1_ADDR)
11052 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS91_LOW register for the ALT_EMAC1 instance. */
11053 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS91_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS91_LOW_ADDR(ALT_EMAC1_ADDR)
11054 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS92_HIGH register for the ALT_EMAC1 instance. */
11055 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS92_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS92_HIGH_ADDR(ALT_EMAC1_ADDR)
11056 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS92_LOW register for the ALT_EMAC1 instance. */
11057 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS92_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS92_LOW_ADDR(ALT_EMAC1_ADDR)
11058 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS93_HIGH register for the ALT_EMAC1 instance. */
11059 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS93_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS93_HIGH_ADDR(ALT_EMAC1_ADDR)
11060 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS93_LOW register for the ALT_EMAC1 instance. */
11061 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS93_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS93_LOW_ADDR(ALT_EMAC1_ADDR)
11062 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS94_HIGH register for the ALT_EMAC1 instance. */
11063 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS94_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS94_HIGH_ADDR(ALT_EMAC1_ADDR)
11064 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS94_LOW register for the ALT_EMAC1 instance. */
11065 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS94_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS94_LOW_ADDR(ALT_EMAC1_ADDR)
11066 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS95_HIGH register for the ALT_EMAC1 instance. */
11067 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS95_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS95_HIGH_ADDR(ALT_EMAC1_ADDR)
11068 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS95_LOW register for the ALT_EMAC1 instance. */
11069 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS95_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS95_LOW_ADDR(ALT_EMAC1_ADDR)
11070 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS96_HIGH register for the ALT_EMAC1 instance. */
11071 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS96_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS96_HIGH_ADDR(ALT_EMAC1_ADDR)
11072 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS96_LOW register for the ALT_EMAC1 instance. */
11073 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS96_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS96_LOW_ADDR(ALT_EMAC1_ADDR)
11074 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS97_HIGH register for the ALT_EMAC1 instance. */
11075 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS97_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS97_HIGH_ADDR(ALT_EMAC1_ADDR)
11076 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS97_LOW register for the ALT_EMAC1 instance. */
11077 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS97_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS97_LOW_ADDR(ALT_EMAC1_ADDR)
11078 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS98_HIGH register for the ALT_EMAC1 instance. */
11079 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS98_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS98_HIGH_ADDR(ALT_EMAC1_ADDR)
11080 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS98_LOW register for the ALT_EMAC1 instance. */
11081 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS98_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS98_LOW_ADDR(ALT_EMAC1_ADDR)
11082 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS99_HIGH register for the ALT_EMAC1 instance. */
11083 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS99_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS99_HIGH_ADDR(ALT_EMAC1_ADDR)
11084 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS99_LOW register for the ALT_EMAC1 instance. */
11085 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS99_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS99_LOW_ADDR(ALT_EMAC1_ADDR)
11086 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS100_HIGH register for the ALT_EMAC1 instance. */
11087 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS100_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS100_HIGH_ADDR(ALT_EMAC1_ADDR)
11088 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS100_LOW register for the ALT_EMAC1 instance. */
11089 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS100_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS100_LOW_ADDR(ALT_EMAC1_ADDR)
11090 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS101_HIGH register for the ALT_EMAC1 instance. */
11091 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS101_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS101_HIGH_ADDR(ALT_EMAC1_ADDR)
11092 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS101_LOW register for the ALT_EMAC1 instance. */
11093 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS101_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS101_LOW_ADDR(ALT_EMAC1_ADDR)
11094 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS102_HIGH register for the ALT_EMAC1 instance. */
11095 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS102_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS102_HIGH_ADDR(ALT_EMAC1_ADDR)
11096 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS102_LOW register for the ALT_EMAC1 instance. */
11097 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS102_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS102_LOW_ADDR(ALT_EMAC1_ADDR)
11098 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS103_HIGH register for the ALT_EMAC1 instance. */
11099 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS103_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS103_HIGH_ADDR(ALT_EMAC1_ADDR)
11100 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS103_LOW register for the ALT_EMAC1 instance. */
11101 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS103_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS103_LOW_ADDR(ALT_EMAC1_ADDR)
11102 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS104_HIGH register for the ALT_EMAC1 instance. */
11103 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS104_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS104_HIGH_ADDR(ALT_EMAC1_ADDR)
11104 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS104_LOW register for the ALT_EMAC1 instance. */
11105 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS104_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS104_LOW_ADDR(ALT_EMAC1_ADDR)
11106 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS105_HIGH register for the ALT_EMAC1 instance. */
11107 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS105_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS105_HIGH_ADDR(ALT_EMAC1_ADDR)
11108 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS105_LOW register for the ALT_EMAC1 instance. */
11109 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS105_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS105_LOW_ADDR(ALT_EMAC1_ADDR)
11110 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS106_HIGH register for the ALT_EMAC1 instance. */
11111 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS106_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS106_HIGH_ADDR(ALT_EMAC1_ADDR)
11112 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS106_LOW register for the ALT_EMAC1 instance. */
11113 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS106_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS106_LOW_ADDR(ALT_EMAC1_ADDR)
11114 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS107_HIGH register for the ALT_EMAC1 instance. */
11115 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS107_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS107_HIGH_ADDR(ALT_EMAC1_ADDR)
11116 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS107_LOW register for the ALT_EMAC1 instance. */
11117 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS107_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS107_LOW_ADDR(ALT_EMAC1_ADDR)
11118 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS108_HIGH register for the ALT_EMAC1 instance. */
11119 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS108_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS108_HIGH_ADDR(ALT_EMAC1_ADDR)
11120 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS108_LOW register for the ALT_EMAC1 instance. */
11121 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS108_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS108_LOW_ADDR(ALT_EMAC1_ADDR)
11122 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS109_HIGH register for the ALT_EMAC1 instance. */
11123 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS109_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS109_HIGH_ADDR(ALT_EMAC1_ADDR)
11124 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS109_LOW register for the ALT_EMAC1 instance. */
11125 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS109_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS109_LOW_ADDR(ALT_EMAC1_ADDR)
11126 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS110_HIGH register for the ALT_EMAC1 instance. */
11127 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS110_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS110_HIGH_ADDR(ALT_EMAC1_ADDR)
11128 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS110_LOW register for the ALT_EMAC1 instance. */
11129 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS110_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS110_LOW_ADDR(ALT_EMAC1_ADDR)
11130 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS111_HIGH register for the ALT_EMAC1 instance. */
11131 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS111_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS111_HIGH_ADDR(ALT_EMAC1_ADDR)
11132 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS111_LOW register for the ALT_EMAC1 instance. */
11133 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS111_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS111_LOW_ADDR(ALT_EMAC1_ADDR)
11134 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS112_HIGH register for the ALT_EMAC1 instance. */
11135 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS112_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS112_HIGH_ADDR(ALT_EMAC1_ADDR)
11136 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS112_LOW register for the ALT_EMAC1 instance. */
11137 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS112_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS112_LOW_ADDR(ALT_EMAC1_ADDR)
11138 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS113_HIGH register for the ALT_EMAC1 instance. */
11139 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS113_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS113_HIGH_ADDR(ALT_EMAC1_ADDR)
11140 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS113_LOW register for the ALT_EMAC1 instance. */
11141 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS113_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS113_LOW_ADDR(ALT_EMAC1_ADDR)
11142 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS114_HIGH register for the ALT_EMAC1 instance. */
11143 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS114_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS114_HIGH_ADDR(ALT_EMAC1_ADDR)
11144 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS114_LOW register for the ALT_EMAC1 instance. */
11145 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS114_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS114_LOW_ADDR(ALT_EMAC1_ADDR)
11146 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS115_HIGH register for the ALT_EMAC1 instance. */
11147 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS115_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS115_HIGH_ADDR(ALT_EMAC1_ADDR)
11148 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS115_LOW register for the ALT_EMAC1 instance. */
11149 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS115_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS115_LOW_ADDR(ALT_EMAC1_ADDR)
11150 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS116_HIGH register for the ALT_EMAC1 instance. */
11151 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS116_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS116_HIGH_ADDR(ALT_EMAC1_ADDR)
11152 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS116_LOW register for the ALT_EMAC1 instance. */
11153 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS116_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS116_LOW_ADDR(ALT_EMAC1_ADDR)
11154 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS117_HIGH register for the ALT_EMAC1 instance. */
11155 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS117_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS117_HIGH_ADDR(ALT_EMAC1_ADDR)
11156 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS117_LOW register for the ALT_EMAC1 instance. */
11157 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS117_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS117_LOW_ADDR(ALT_EMAC1_ADDR)
11158 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS118_HIGH register for the ALT_EMAC1 instance. */
11159 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS118_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS118_HIGH_ADDR(ALT_EMAC1_ADDR)
11160 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS118_LOW register for the ALT_EMAC1 instance. */
11161 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS118_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS118_LOW_ADDR(ALT_EMAC1_ADDR)
11162 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS119_HIGH register for the ALT_EMAC1 instance. */
11163 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS119_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS119_HIGH_ADDR(ALT_EMAC1_ADDR)
11164 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS119_LOW register for the ALT_EMAC1 instance. */
11165 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS119_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS119_LOW_ADDR(ALT_EMAC1_ADDR)
11166 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS120_HIGH register for the ALT_EMAC1 instance. */
11167 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS120_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS120_HIGH_ADDR(ALT_EMAC1_ADDR)
11168 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS120_LOW register for the ALT_EMAC1 instance. */
11169 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS120_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS120_LOW_ADDR(ALT_EMAC1_ADDR)
11170 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS121_HIGH register for the ALT_EMAC1 instance. */
11171 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS121_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS121_HIGH_ADDR(ALT_EMAC1_ADDR)
11172 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS121_LOW register for the ALT_EMAC1 instance. */
11173 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS121_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS121_LOW_ADDR(ALT_EMAC1_ADDR)
11174 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS122_HIGH register for the ALT_EMAC1 instance. */
11175 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS122_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS122_HIGH_ADDR(ALT_EMAC1_ADDR)
11176 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS122_LOW register for the ALT_EMAC1 instance. */
11177 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS122_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS122_LOW_ADDR(ALT_EMAC1_ADDR)
11178 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS123_HIGH register for the ALT_EMAC1 instance. */
11179 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS123_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS123_HIGH_ADDR(ALT_EMAC1_ADDR)
11180 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS123_LOW register for the ALT_EMAC1 instance. */
11181 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS123_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS123_LOW_ADDR(ALT_EMAC1_ADDR)
11182 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS124_HIGH register for the ALT_EMAC1 instance. */
11183 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS124_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS124_HIGH_ADDR(ALT_EMAC1_ADDR)
11184 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS124_LOW register for the ALT_EMAC1 instance. */
11185 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS124_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS124_LOW_ADDR(ALT_EMAC1_ADDR)
11186 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS125_HIGH register for the ALT_EMAC1 instance. */
11187 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS125_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS125_HIGH_ADDR(ALT_EMAC1_ADDR)
11188 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS125_LOW register for the ALT_EMAC1 instance. */
11189 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS125_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS125_LOW_ADDR(ALT_EMAC1_ADDR)
11190 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS126_HIGH register for the ALT_EMAC1 instance. */
11191 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS126_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS126_HIGH_ADDR(ALT_EMAC1_ADDR)
11192 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS126_LOW register for the ALT_EMAC1 instance. */
11193 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS126_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS126_LOW_ADDR(ALT_EMAC1_ADDR)
11194 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS127_HIGH register for the ALT_EMAC1 instance. */
11195 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS127_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS127_HIGH_ADDR(ALT_EMAC1_ADDR)
11196 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS127_LOW register for the ALT_EMAC1 instance. */
11197 #define ALT_EMAC1_GMACGRP_MAC_ADDRESS127_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS127_LOW_ADDR(ALT_EMAC1_ADDR)
11198 /* The address of the ALT_EMAC_DMAGRP_BUS_MODE register for the ALT_EMAC1 instance. */
11199 #define ALT_EMAC1_DMAGRP_BUS_MODE_ADDR ALT_EMAC_DMAGRP_BUS_MODE_ADDR(ALT_EMAC1_ADDR)
11200 /* The address of the ALT_EMAC_DMAGRP_TRANSMIT_POLL_DEMAND register for the ALT_EMAC1 instance. */
11201 #define ALT_EMAC1_DMAGRP_TRANSMIT_POLL_DEMAND_ADDR ALT_EMAC_DMAGRP_TRANSMIT_POLL_DEMAND_ADDR(ALT_EMAC1_ADDR)
11202 /* The address of the ALT_EMAC_DMAGRP_RECEIVE_POLL_DEMAND register for the ALT_EMAC1 instance. */
11203 #define ALT_EMAC1_DMAGRP_RECEIVE_POLL_DEMAND_ADDR ALT_EMAC_DMAGRP_RECEIVE_POLL_DEMAND_ADDR(ALT_EMAC1_ADDR)
11204 /* The address of the ALT_EMAC_DMAGRP_RECEIVE_DESCRIPTOR_LIST_ADDRESS register for the ALT_EMAC1 instance. */
11205 #define ALT_EMAC1_DMAGRP_RECEIVE_DESCRIPTOR_LIST_ADDRESS_ADDR ALT_EMAC_DMAGRP_RECEIVE_DESCRIPTOR_LIST_ADDRESS_ADDR(ALT_EMAC1_ADDR)
11206 /* The address of the ALT_EMAC_DMAGRP_TRANSMIT_DESCRIPTOR_LIST_ADDRESS register for the ALT_EMAC1 instance. */
11207 #define ALT_EMAC1_DMAGRP_TRANSMIT_DESCRIPTOR_LIST_ADDRESS_ADDR ALT_EMAC_DMAGRP_TRANSMIT_DESCRIPTOR_LIST_ADDRESS_ADDR(ALT_EMAC1_ADDR)
11208 /* The address of the ALT_EMAC_DMAGRP_STATUS register for the ALT_EMAC1 instance. */
11209 #define ALT_EMAC1_DMAGRP_STATUS_ADDR ALT_EMAC_DMAGRP_STATUS_ADDR(ALT_EMAC1_ADDR)
11210 /* The address of the ALT_EMAC_DMAGRP_OPERATION_MODE register for the ALT_EMAC1 instance. */
11211 #define ALT_EMAC1_DMAGRP_OPERATION_MODE_ADDR ALT_EMAC_DMAGRP_OPERATION_MODE_ADDR(ALT_EMAC1_ADDR)
11212 /* The address of the ALT_EMAC_DMAGRP_INTERRUPT_ENABLE register for the ALT_EMAC1 instance. */
11213 #define ALT_EMAC1_DMAGRP_INTERRUPT_ENABLE_ADDR ALT_EMAC_DMAGRP_INTERRUPT_ENABLE_ADDR(ALT_EMAC1_ADDR)
11214 /* The address of the ALT_EMAC_DMAGRP_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER register for the ALT_EMAC1 instance. */
11215 #define ALT_EMAC1_DMAGRP_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_ADDR ALT_EMAC_DMAGRP_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_ADDR(ALT_EMAC1_ADDR)
11216 /* The address of the ALT_EMAC_DMAGRP_RECEIVE_INTERRUPT_WATCHDOG_TIMER register for the ALT_EMAC1 instance. */
11217 #define ALT_EMAC1_DMAGRP_RECEIVE_INTERRUPT_WATCHDOG_TIMER_ADDR ALT_EMAC_DMAGRP_RECEIVE_INTERRUPT_WATCHDOG_TIMER_ADDR(ALT_EMAC1_ADDR)
11218 /* The address of the ALT_EMAC_DMAGRP_AXI_BUS_MODE register for the ALT_EMAC1 instance. */
11219 #define ALT_EMAC1_DMAGRP_AXI_BUS_MODE_ADDR ALT_EMAC_DMAGRP_AXI_BUS_MODE_ADDR(ALT_EMAC1_ADDR)
11220 /* The address of the ALT_EMAC_DMAGRP_AHB_OR_AXI_STATUS register for the ALT_EMAC1 instance. */
11221 #define ALT_EMAC1_DMAGRP_AHB_OR_AXI_STATUS_ADDR ALT_EMAC_DMAGRP_AHB_OR_AXI_STATUS_ADDR(ALT_EMAC1_ADDR)
11222 /* The address of the ALT_EMAC_DMAGRP_CURRENT_HOST_TRANSMIT_DESCRIPTOR register for the ALT_EMAC1 instance. */
11223 #define ALT_EMAC1_DMAGRP_CURRENT_HOST_TRANSMIT_DESCRIPTOR_ADDR ALT_EMAC_DMAGRP_CURRENT_HOST_TRANSMIT_DESCRIPTOR_ADDR(ALT_EMAC1_ADDR)
11224 /* The address of the ALT_EMAC_DMAGRP_CURRENT_HOST_RECEIVE_DESCRIPTOR register for the ALT_EMAC1 instance. */
11225 #define ALT_EMAC1_DMAGRP_CURRENT_HOST_RECEIVE_DESCRIPTOR_ADDR ALT_EMAC_DMAGRP_CURRENT_HOST_RECEIVE_DESCRIPTOR_ADDR(ALT_EMAC1_ADDR)
11226 /* The address of the ALT_EMAC_DMAGRP_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS register for the ALT_EMAC1 instance. */
11227 #define ALT_EMAC1_DMAGRP_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_ADDR ALT_EMAC_DMAGRP_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_ADDR(ALT_EMAC1_ADDR)
11228 /* The address of the ALT_EMAC_DMAGRP_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS register for the ALT_EMAC1 instance. */
11229 #define ALT_EMAC1_DMAGRP_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_ADDR ALT_EMAC_DMAGRP_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_ADDR(ALT_EMAC1_ADDR)
11230 /* The address of the ALT_EMAC_DMAGRP_HW_FEATURE register for the ALT_EMAC1 instance. */
11231 #define ALT_EMAC1_DMAGRP_HW_FEATURE_ADDR ALT_EMAC_DMAGRP_HW_FEATURE_ADDR(ALT_EMAC1_ADDR)
11232 /* The base address byte offset for the start of the ALT_EMAC1 component. */
11233 #define ALT_EMAC1_OFST 0xff802000
11234 /* The start address of the ALT_EMAC1 component. */
11235 #define ALT_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_EMAC1_OFST))
11236 /* The lower bound address range of the ALT_EMAC1 component. */
11237 #define ALT_EMAC1_LB_ADDR ALT_EMAC1_ADDR
11238 /* The upper bound address range of the ALT_EMAC1 component. */
11239 #define ALT_EMAC1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC1_ADDR) + 0x105c) - 1))
11240 
11241 
11242 /*
11243  * Component Instance : emac2
11244  *
11245  * Instance emac2 of component ALT_EMAC.
11246  *
11247  *
11248  */
11249 /* The address of the ALT_EMAC_GMACGRP_MAC_CONFIGURATION register for the ALT_EMAC2 instance. */
11250 #define ALT_EMAC2_GMACGRP_MAC_CONFIGURATION_ADDR ALT_EMAC_GMACGRP_MAC_CONFIGURATION_ADDR(ALT_EMAC2_ADDR)
11251 /* The address of the ALT_EMAC_GMACGRP_MAC_FRAME_FILTER register for the ALT_EMAC2 instance. */
11252 #define ALT_EMAC2_GMACGRP_MAC_FRAME_FILTER_ADDR ALT_EMAC_GMACGRP_MAC_FRAME_FILTER_ADDR(ALT_EMAC2_ADDR)
11253 /* The address of the ALT_EMAC_GMACGRP_GMII_ADDRESS register for the ALT_EMAC2 instance. */
11254 #define ALT_EMAC2_GMACGRP_GMII_ADDRESS_ADDR ALT_EMAC_GMACGRP_GMII_ADDRESS_ADDR(ALT_EMAC2_ADDR)
11255 /* The address of the ALT_EMAC_GMACGRP_GMII_DATA register for the ALT_EMAC2 instance. */
11256 #define ALT_EMAC2_GMACGRP_GMII_DATA_ADDR ALT_EMAC_GMACGRP_GMII_DATA_ADDR(ALT_EMAC2_ADDR)
11257 /* The address of the ALT_EMAC_GMACGRP_FLOW_CONTROL register for the ALT_EMAC2 instance. */
11258 #define ALT_EMAC2_GMACGRP_FLOW_CONTROL_ADDR ALT_EMAC_GMACGRP_FLOW_CONTROL_ADDR(ALT_EMAC2_ADDR)
11259 /* The address of the ALT_EMAC_GMACGRP_VLAN_TAG register for the ALT_EMAC2 instance. */
11260 #define ALT_EMAC2_GMACGRP_VLAN_TAG_ADDR ALT_EMAC_GMACGRP_VLAN_TAG_ADDR(ALT_EMAC2_ADDR)
11261 /* The address of the ALT_EMAC_GMACGRP_VERSION register for the ALT_EMAC2 instance. */
11262 #define ALT_EMAC2_GMACGRP_VERSION_ADDR ALT_EMAC_GMACGRP_VERSION_ADDR(ALT_EMAC2_ADDR)
11263 /* The address of the ALT_EMAC_GMACGRP_DEBUG register for the ALT_EMAC2 instance. */
11264 #define ALT_EMAC2_GMACGRP_DEBUG_ADDR ALT_EMAC_GMACGRP_DEBUG_ADDR(ALT_EMAC2_ADDR)
11265 /* The address of the ALT_EMAC_GMACGRP_LPI_CONTROL_STATUS register for the ALT_EMAC2 instance. */
11266 #define ALT_EMAC2_GMACGRP_LPI_CONTROL_STATUS_ADDR ALT_EMAC_GMACGRP_LPI_CONTROL_STATUS_ADDR(ALT_EMAC2_ADDR)
11267 /* The address of the ALT_EMAC_GMACGRP_LPI_TIMERS_CONTROL register for the ALT_EMAC2 instance. */
11268 #define ALT_EMAC2_GMACGRP_LPI_TIMERS_CONTROL_ADDR ALT_EMAC_GMACGRP_LPI_TIMERS_CONTROL_ADDR(ALT_EMAC2_ADDR)
11269 /* The address of the ALT_EMAC_GMACGRP_INTERRUPT_STATUS register for the ALT_EMAC2 instance. */
11270 #define ALT_EMAC2_GMACGRP_INTERRUPT_STATUS_ADDR ALT_EMAC_GMACGRP_INTERRUPT_STATUS_ADDR(ALT_EMAC2_ADDR)
11271 /* The address of the ALT_EMAC_GMACGRP_INTERRUPT_MASK register for the ALT_EMAC2 instance. */
11272 #define ALT_EMAC2_GMACGRP_INTERRUPT_MASK_ADDR ALT_EMAC_GMACGRP_INTERRUPT_MASK_ADDR(ALT_EMAC2_ADDR)
11273 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS0_HIGH register for the ALT_EMAC2 instance. */
11274 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS0_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS0_HIGH_ADDR(ALT_EMAC2_ADDR)
11275 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS0_LOW register for the ALT_EMAC2 instance. */
11276 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS0_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS0_LOW_ADDR(ALT_EMAC2_ADDR)
11277 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS1_HIGH register for the ALT_EMAC2 instance. */
11278 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS1_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS1_HIGH_ADDR(ALT_EMAC2_ADDR)
11279 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS1_LOW register for the ALT_EMAC2 instance. */
11280 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS1_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS1_LOW_ADDR(ALT_EMAC2_ADDR)
11281 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS2_HIGH register for the ALT_EMAC2 instance. */
11282 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS2_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS2_HIGH_ADDR(ALT_EMAC2_ADDR)
11283 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS2_LOW register for the ALT_EMAC2 instance. */
11284 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS2_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS2_LOW_ADDR(ALT_EMAC2_ADDR)
11285 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS3_HIGH register for the ALT_EMAC2 instance. */
11286 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS3_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS3_HIGH_ADDR(ALT_EMAC2_ADDR)
11287 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS3_LOW register for the ALT_EMAC2 instance. */
11288 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS3_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS3_LOW_ADDR(ALT_EMAC2_ADDR)
11289 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS4_HIGH register for the ALT_EMAC2 instance. */
11290 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS4_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS4_HIGH_ADDR(ALT_EMAC2_ADDR)
11291 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS4_LOW register for the ALT_EMAC2 instance. */
11292 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS4_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS4_LOW_ADDR(ALT_EMAC2_ADDR)
11293 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS5_HIGH register for the ALT_EMAC2 instance. */
11294 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS5_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS5_HIGH_ADDR(ALT_EMAC2_ADDR)
11295 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS5_LOW register for the ALT_EMAC2 instance. */
11296 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS5_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS5_LOW_ADDR(ALT_EMAC2_ADDR)
11297 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS6_HIGH register for the ALT_EMAC2 instance. */
11298 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS6_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS6_HIGH_ADDR(ALT_EMAC2_ADDR)
11299 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS6_LOW register for the ALT_EMAC2 instance. */
11300 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS6_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS6_LOW_ADDR(ALT_EMAC2_ADDR)
11301 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS7_HIGH register for the ALT_EMAC2 instance. */
11302 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS7_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS7_HIGH_ADDR(ALT_EMAC2_ADDR)
11303 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS7_LOW register for the ALT_EMAC2 instance. */
11304 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS7_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS7_LOW_ADDR(ALT_EMAC2_ADDR)
11305 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS8_HIGH register for the ALT_EMAC2 instance. */
11306 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS8_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS8_HIGH_ADDR(ALT_EMAC2_ADDR)
11307 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS8_LOW register for the ALT_EMAC2 instance. */
11308 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS8_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS8_LOW_ADDR(ALT_EMAC2_ADDR)
11309 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS9_HIGH register for the ALT_EMAC2 instance. */
11310 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS9_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS9_HIGH_ADDR(ALT_EMAC2_ADDR)
11311 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS9_LOW register for the ALT_EMAC2 instance. */
11312 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS9_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS9_LOW_ADDR(ALT_EMAC2_ADDR)
11313 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS10_HIGH register for the ALT_EMAC2 instance. */
11314 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS10_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS10_HIGH_ADDR(ALT_EMAC2_ADDR)
11315 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS10_LOW register for the ALT_EMAC2 instance. */
11316 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS10_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS10_LOW_ADDR(ALT_EMAC2_ADDR)
11317 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS11_HIGH register for the ALT_EMAC2 instance. */
11318 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS11_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS11_HIGH_ADDR(ALT_EMAC2_ADDR)
11319 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS11_LOW register for the ALT_EMAC2 instance. */
11320 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS11_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS11_LOW_ADDR(ALT_EMAC2_ADDR)
11321 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS12_HIGH register for the ALT_EMAC2 instance. */
11322 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS12_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS12_HIGH_ADDR(ALT_EMAC2_ADDR)
11323 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS12_LOW register for the ALT_EMAC2 instance. */
11324 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS12_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS12_LOW_ADDR(ALT_EMAC2_ADDR)
11325 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS13_HIGH register for the ALT_EMAC2 instance. */
11326 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS13_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS13_HIGH_ADDR(ALT_EMAC2_ADDR)
11327 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS13_LOW register for the ALT_EMAC2 instance. */
11328 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS13_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS13_LOW_ADDR(ALT_EMAC2_ADDR)
11329 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS14_HIGH register for the ALT_EMAC2 instance. */
11330 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS14_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS14_HIGH_ADDR(ALT_EMAC2_ADDR)
11331 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS14_LOW register for the ALT_EMAC2 instance. */
11332 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS14_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS14_LOW_ADDR(ALT_EMAC2_ADDR)
11333 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS15_HIGH register for the ALT_EMAC2 instance. */
11334 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS15_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS15_HIGH_ADDR(ALT_EMAC2_ADDR)
11335 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS15_LOW register for the ALT_EMAC2 instance. */
11336 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS15_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS15_LOW_ADDR(ALT_EMAC2_ADDR)
11337 /* The address of the ALT_EMAC_GMACGRP_SGMII_RGMII_SMII_CONTROL_STATUS register for the ALT_EMAC2 instance. */
11338 #define ALT_EMAC2_GMACGRP_SGMII_RGMII_SMII_CONTROL_STATUS_ADDR ALT_EMAC_GMACGRP_SGMII_RGMII_SMII_CONTROL_STATUS_ADDR(ALT_EMAC2_ADDR)
11339 /* The address of the ALT_EMAC_GMACGRP_WDOG_TIMEOUT register for the ALT_EMAC2 instance. */
11340 #define ALT_EMAC2_GMACGRP_WDOG_TIMEOUT_ADDR ALT_EMAC_GMACGRP_WDOG_TIMEOUT_ADDR(ALT_EMAC2_ADDR)
11341 /* The address of the ALT_EMAC_GMACGRP_GENPIO register for the ALT_EMAC2 instance. */
11342 #define ALT_EMAC2_GMACGRP_GENPIO_ADDR ALT_EMAC_GMACGRP_GENPIO_ADDR(ALT_EMAC2_ADDR)
11343 /* The address of the ALT_EMAC_GMACGRP_MMC_CONTROL register for the ALT_EMAC2 instance. */
11344 #define ALT_EMAC2_GMACGRP_MMC_CONTROL_ADDR ALT_EMAC_GMACGRP_MMC_CONTROL_ADDR(ALT_EMAC2_ADDR)
11345 /* The address of the ALT_EMAC_GMACGRP_MMC_RECEIVE_INTERRUPT register for the ALT_EMAC2 instance. */
11346 #define ALT_EMAC2_GMACGRP_MMC_RECEIVE_INTERRUPT_ADDR ALT_EMAC_GMACGRP_MMC_RECEIVE_INTERRUPT_ADDR(ALT_EMAC2_ADDR)
11347 /* The address of the ALT_EMAC_GMACGRP_MMC_TRANSMIT_INTERRUPT register for the ALT_EMAC2 instance. */
11348 #define ALT_EMAC2_GMACGRP_MMC_TRANSMIT_INTERRUPT_ADDR ALT_EMAC_GMACGRP_MMC_TRANSMIT_INTERRUPT_ADDR(ALT_EMAC2_ADDR)
11349 /* The address of the ALT_EMAC_GMACGRP_MMC_RECEIVE_INTERRUPT_MASK register for the ALT_EMAC2 instance. */
11350 #define ALT_EMAC2_GMACGRP_MMC_RECEIVE_INTERRUPT_MASK_ADDR ALT_EMAC_GMACGRP_MMC_RECEIVE_INTERRUPT_MASK_ADDR(ALT_EMAC2_ADDR)
11351 /* The address of the ALT_EMAC_GMACGRP_MMC_TRANSMIT_INTERRUPT_MASK register for the ALT_EMAC2 instance. */
11352 #define ALT_EMAC2_GMACGRP_MMC_TRANSMIT_INTERRUPT_MASK_ADDR ALT_EMAC_GMACGRP_MMC_TRANSMIT_INTERRUPT_MASK_ADDR(ALT_EMAC2_ADDR)
11353 /* The address of the ALT_EMAC_GMACGRP_TXOCTETCOUNT_GB register for the ALT_EMAC2 instance. */
11354 #define ALT_EMAC2_GMACGRP_TXOCTETCOUNT_GB_ADDR ALT_EMAC_GMACGRP_TXOCTETCOUNT_GB_ADDR(ALT_EMAC2_ADDR)
11355 /* The address of the ALT_EMAC_GMACGRP_TXFRAMECOUNT_GB register for the ALT_EMAC2 instance. */
11356 #define ALT_EMAC2_GMACGRP_TXFRAMECOUNT_GB_ADDR ALT_EMAC_GMACGRP_TXFRAMECOUNT_GB_ADDR(ALT_EMAC2_ADDR)
11357 /* The address of the ALT_EMAC_GMACGRP_TXBROADCASTFRAMES_G register for the ALT_EMAC2 instance. */
11358 #define ALT_EMAC2_GMACGRP_TXBROADCASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_TXBROADCASTFRAMES_G_ADDR(ALT_EMAC2_ADDR)
11359 /* The address of the ALT_EMAC_GMACGRP_TXMULTICASTFRAMES_G register for the ALT_EMAC2 instance. */
11360 #define ALT_EMAC2_GMACGRP_TXMULTICASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_TXMULTICASTFRAMES_G_ADDR(ALT_EMAC2_ADDR)
11361 /* The address of the ALT_EMAC_GMACGRP_TX64OCTETS_GB register for the ALT_EMAC2 instance. */
11362 #define ALT_EMAC2_GMACGRP_TX64OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX64OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
11363 /* The address of the ALT_EMAC_GMACGRP_TX65TO127OCTETS_GB register for the ALT_EMAC2 instance. */
11364 #define ALT_EMAC2_GMACGRP_TX65TO127OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX65TO127OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
11365 /* The address of the ALT_EMAC_GMACGRP_TX128TO255OCTETS_GB register for the ALT_EMAC2 instance. */
11366 #define ALT_EMAC2_GMACGRP_TX128TO255OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX128TO255OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
11367 /* The address of the ALT_EMAC_GMACGRP_TX256TO511OCTETS_GB register for the ALT_EMAC2 instance. */
11368 #define ALT_EMAC2_GMACGRP_TX256TO511OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX256TO511OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
11369 /* The address of the ALT_EMAC_GMACGRP_TX512TO1023OCTETS_GB register for the ALT_EMAC2 instance. */
11370 #define ALT_EMAC2_GMACGRP_TX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX512TO1023OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
11371 /* The address of the ALT_EMAC_GMACGRP_TX1024TOMAXOCTETS_GB register for the ALT_EMAC2 instance. */
11372 #define ALT_EMAC2_GMACGRP_TX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMACGRP_TX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC2_ADDR)
11373 /* The address of the ALT_EMAC_GMACGRP_TXUNICASTFRAMES_GB register for the ALT_EMAC2 instance. */
11374 #define ALT_EMAC2_GMACGRP_TXUNICASTFRAMES_GB_ADDR ALT_EMAC_GMACGRP_TXUNICASTFRAMES_GB_ADDR(ALT_EMAC2_ADDR)
11375 /* The address of the ALT_EMAC_GMACGRP_TXMULTICASTFRAMES_GB register for the ALT_EMAC2 instance. */
11376 #define ALT_EMAC2_GMACGRP_TXMULTICASTFRAMES_GB_ADDR ALT_EMAC_GMACGRP_TXMULTICASTFRAMES_GB_ADDR(ALT_EMAC2_ADDR)
11377 /* The address of the ALT_EMAC_GMACGRP_TXBROADCASTFRAMES_GB register for the ALT_EMAC2 instance. */
11378 #define ALT_EMAC2_GMACGRP_TXBROADCASTFRAMES_GB_ADDR ALT_EMAC_GMACGRP_TXBROADCASTFRAMES_GB_ADDR(ALT_EMAC2_ADDR)
11379 /* The address of the ALT_EMAC_GMACGRP_TXUNDERFLOWERROR register for the ALT_EMAC2 instance. */
11380 #define ALT_EMAC2_GMACGRP_TXUNDERFLOWERROR_ADDR ALT_EMAC_GMACGRP_TXUNDERFLOWERROR_ADDR(ALT_EMAC2_ADDR)
11381 /* The address of the ALT_EMAC_GMACGRP_TXSINGLECOL_G register for the ALT_EMAC2 instance. */
11382 #define ALT_EMAC2_GMACGRP_TXSINGLECOL_G_ADDR ALT_EMAC_GMACGRP_TXSINGLECOL_G_ADDR(ALT_EMAC2_ADDR)
11383 /* The address of the ALT_EMAC_GMACGRP_TXMULTICOL_G register for the ALT_EMAC2 instance. */
11384 #define ALT_EMAC2_GMACGRP_TXMULTICOL_G_ADDR ALT_EMAC_GMACGRP_TXMULTICOL_G_ADDR(ALT_EMAC2_ADDR)
11385 /* The address of the ALT_EMAC_GMACGRP_TXDEFERRED register for the ALT_EMAC2 instance. */
11386 #define ALT_EMAC2_GMACGRP_TXDEFERRED_ADDR ALT_EMAC_GMACGRP_TXDEFERRED_ADDR(ALT_EMAC2_ADDR)
11387 /* The address of the ALT_EMAC_GMACGRP_TXLATECOL register for the ALT_EMAC2 instance. */
11388 #define ALT_EMAC2_GMACGRP_TXLATECOL_ADDR ALT_EMAC_GMACGRP_TXLATECOL_ADDR(ALT_EMAC2_ADDR)
11389 /* The address of the ALT_EMAC_GMACGRP_TXEXESSCOL register for the ALT_EMAC2 instance. */
11390 #define ALT_EMAC2_GMACGRP_TXEXESSCOL_ADDR ALT_EMAC_GMACGRP_TXEXESSCOL_ADDR(ALT_EMAC2_ADDR)
11391 /* The address of the ALT_EMAC_GMACGRP_TXCARRIERERR register for the ALT_EMAC2 instance. */
11392 #define ALT_EMAC2_GMACGRP_TXCARRIERERR_ADDR ALT_EMAC_GMACGRP_TXCARRIERERR_ADDR(ALT_EMAC2_ADDR)
11393 /* The address of the ALT_EMAC_GMACGRP_TXOCTETCNT register for the ALT_EMAC2 instance. */
11394 #define ALT_EMAC2_GMACGRP_TXOCTETCNT_ADDR ALT_EMAC_GMACGRP_TXOCTETCNT_ADDR(ALT_EMAC2_ADDR)
11395 /* The address of the ALT_EMAC_GMACGRP_TXFRAMECOUNT_G register for the ALT_EMAC2 instance. */
11396 #define ALT_EMAC2_GMACGRP_TXFRAMECOUNT_G_ADDR ALT_EMAC_GMACGRP_TXFRAMECOUNT_G_ADDR(ALT_EMAC2_ADDR)
11397 /* The address of the ALT_EMAC_GMACGRP_TXEXCESSDEF register for the ALT_EMAC2 instance. */
11398 #define ALT_EMAC2_GMACGRP_TXEXCESSDEF_ADDR ALT_EMAC_GMACGRP_TXEXCESSDEF_ADDR(ALT_EMAC2_ADDR)
11399 /* The address of the ALT_EMAC_GMACGRP_TXPAUSEFRAMES register for the ALT_EMAC2 instance. */
11400 #define ALT_EMAC2_GMACGRP_TXPAUSEFRAMES_ADDR ALT_EMAC_GMACGRP_TXPAUSEFRAMES_ADDR(ALT_EMAC2_ADDR)
11401 /* The address of the ALT_EMAC_GMACGRP_TXVLANFRAMES_G register for the ALT_EMAC2 instance. */
11402 #define ALT_EMAC2_GMACGRP_TXVLANFRAMES_G_ADDR ALT_EMAC_GMACGRP_TXVLANFRAMES_G_ADDR(ALT_EMAC2_ADDR)
11403 /* The address of the ALT_EMAC_GMACGRP_TXOVERSIZE_G register for the ALT_EMAC2 instance. */
11404 #define ALT_EMAC2_GMACGRP_TXOVERSIZE_G_ADDR ALT_EMAC_GMACGRP_TXOVERSIZE_G_ADDR(ALT_EMAC2_ADDR)
11405 /* The address of the ALT_EMAC_GMACGRP_RXFRAMECOUNT_GB register for the ALT_EMAC2 instance. */
11406 #define ALT_EMAC2_GMACGRP_RXFRAMECOUNT_GB_ADDR ALT_EMAC_GMACGRP_RXFRAMECOUNT_GB_ADDR(ALT_EMAC2_ADDR)
11407 /* The address of the ALT_EMAC_GMACGRP_RXOCTETCOUNT_GB register for the ALT_EMAC2 instance. */
11408 #define ALT_EMAC2_GMACGRP_RXOCTETCOUNT_GB_ADDR ALT_EMAC_GMACGRP_RXOCTETCOUNT_GB_ADDR(ALT_EMAC2_ADDR)
11409 /* The address of the ALT_EMAC_GMACGRP_RXOCTETCOUNT_G register for the ALT_EMAC2 instance. */
11410 #define ALT_EMAC2_GMACGRP_RXOCTETCOUNT_G_ADDR ALT_EMAC_GMACGRP_RXOCTETCOUNT_G_ADDR(ALT_EMAC2_ADDR)
11411 /* The address of the ALT_EMAC_GMACGRP_RXBROADCASTFRAMES_G register for the ALT_EMAC2 instance. */
11412 #define ALT_EMAC2_GMACGRP_RXBROADCASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_RXBROADCASTFRAMES_G_ADDR(ALT_EMAC2_ADDR)
11413 /* The address of the ALT_EMAC_GMACGRP_RXMULTICASTFRAMES_G register for the ALT_EMAC2 instance. */
11414 #define ALT_EMAC2_GMACGRP_RXMULTICASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_RXMULTICASTFRAMES_G_ADDR(ALT_EMAC2_ADDR)
11415 /* The address of the ALT_EMAC_GMACGRP_RXCRCERROR register for the ALT_EMAC2 instance. */
11416 #define ALT_EMAC2_GMACGRP_RXCRCERROR_ADDR ALT_EMAC_GMACGRP_RXCRCERROR_ADDR(ALT_EMAC2_ADDR)
11417 /* The address of the ALT_EMAC_GMACGRP_RXALIGNMENTERROR register for the ALT_EMAC2 instance. */
11418 #define ALT_EMAC2_GMACGRP_RXALIGNMENTERROR_ADDR ALT_EMAC_GMACGRP_RXALIGNMENTERROR_ADDR(ALT_EMAC2_ADDR)
11419 /* The address of the ALT_EMAC_GMACGRP_RXRUNTERROR register for the ALT_EMAC2 instance. */
11420 #define ALT_EMAC2_GMACGRP_RXRUNTERROR_ADDR ALT_EMAC_GMACGRP_RXRUNTERROR_ADDR(ALT_EMAC2_ADDR)
11421 /* The address of the ALT_EMAC_GMACGRP_RXJABBERERROR register for the ALT_EMAC2 instance. */
11422 #define ALT_EMAC2_GMACGRP_RXJABBERERROR_ADDR ALT_EMAC_GMACGRP_RXJABBERERROR_ADDR(ALT_EMAC2_ADDR)
11423 /* The address of the ALT_EMAC_GMACGRP_RXUNDERSIZE_G register for the ALT_EMAC2 instance. */
11424 #define ALT_EMAC2_GMACGRP_RXUNDERSIZE_G_ADDR ALT_EMAC_GMACGRP_RXUNDERSIZE_G_ADDR(ALT_EMAC2_ADDR)
11425 /* The address of the ALT_EMAC_GMACGRP_RXOVERSIZE_G register for the ALT_EMAC2 instance. */
11426 #define ALT_EMAC2_GMACGRP_RXOVERSIZE_G_ADDR ALT_EMAC_GMACGRP_RXOVERSIZE_G_ADDR(ALT_EMAC2_ADDR)
11427 /* The address of the ALT_EMAC_GMACGRP_RX64OCTETS_GB register for the ALT_EMAC2 instance. */
11428 #define ALT_EMAC2_GMACGRP_RX64OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX64OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
11429 /* The address of the ALT_EMAC_GMACGRP_RX65TO127OCTETS_GB register for the ALT_EMAC2 instance. */
11430 #define ALT_EMAC2_GMACGRP_RX65TO127OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX65TO127OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
11431 /* The address of the ALT_EMAC_GMACGRP_RX128TO255OCTETS_GB register for the ALT_EMAC2 instance. */
11432 #define ALT_EMAC2_GMACGRP_RX128TO255OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX128TO255OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
11433 /* The address of the ALT_EMAC_GMACGRP_RX256TO511OCTETS_GB register for the ALT_EMAC2 instance. */
11434 #define ALT_EMAC2_GMACGRP_RX256TO511OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX256TO511OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
11435 /* The address of the ALT_EMAC_GMACGRP_RX512TO1023OCTETS_GB register for the ALT_EMAC2 instance. */
11436 #define ALT_EMAC2_GMACGRP_RX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX512TO1023OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
11437 /* The address of the ALT_EMAC_GMACGRP_RX1024TOMAXOCTETS_GB register for the ALT_EMAC2 instance. */
11438 #define ALT_EMAC2_GMACGRP_RX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMACGRP_RX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC2_ADDR)
11439 /* The address of the ALT_EMAC_GMACGRP_RXUNICASTFRAMES_G register for the ALT_EMAC2 instance. */
11440 #define ALT_EMAC2_GMACGRP_RXUNICASTFRAMES_G_ADDR ALT_EMAC_GMACGRP_RXUNICASTFRAMES_G_ADDR(ALT_EMAC2_ADDR)
11441 /* The address of the ALT_EMAC_GMACGRP_RXLENGTHERROR register for the ALT_EMAC2 instance. */
11442 #define ALT_EMAC2_GMACGRP_RXLENGTHERROR_ADDR ALT_EMAC_GMACGRP_RXLENGTHERROR_ADDR(ALT_EMAC2_ADDR)
11443 /* The address of the ALT_EMAC_GMACGRP_RXOUTOFRANGETYPE register for the ALT_EMAC2 instance. */
11444 #define ALT_EMAC2_GMACGRP_RXOUTOFRANGETYPE_ADDR ALT_EMAC_GMACGRP_RXOUTOFRANGETYPE_ADDR(ALT_EMAC2_ADDR)
11445 /* The address of the ALT_EMAC_GMACGRP_RXPAUSEFRAMES register for the ALT_EMAC2 instance. */
11446 #define ALT_EMAC2_GMACGRP_RXPAUSEFRAMES_ADDR ALT_EMAC_GMACGRP_RXPAUSEFRAMES_ADDR(ALT_EMAC2_ADDR)
11447 /* The address of the ALT_EMAC_GMACGRP_RXFIFOOVERFLOW register for the ALT_EMAC2 instance. */
11448 #define ALT_EMAC2_GMACGRP_RXFIFOOVERFLOW_ADDR ALT_EMAC_GMACGRP_RXFIFOOVERFLOW_ADDR(ALT_EMAC2_ADDR)
11449 /* The address of the ALT_EMAC_GMACGRP_RXVLANFRAMES_GB register for the ALT_EMAC2 instance. */
11450 #define ALT_EMAC2_GMACGRP_RXVLANFRAMES_GB_ADDR ALT_EMAC_GMACGRP_RXVLANFRAMES_GB_ADDR(ALT_EMAC2_ADDR)
11451 /* The address of the ALT_EMAC_GMACGRP_RXWATCHDOGERROR register for the ALT_EMAC2 instance. */
11452 #define ALT_EMAC2_GMACGRP_RXWATCHDOGERROR_ADDR ALT_EMAC_GMACGRP_RXWATCHDOGERROR_ADDR(ALT_EMAC2_ADDR)
11453 /* The address of the ALT_EMAC_GMACGRP_RXRCVERROR register for the ALT_EMAC2 instance. */
11454 #define ALT_EMAC2_GMACGRP_RXRCVERROR_ADDR ALT_EMAC_GMACGRP_RXRCVERROR_ADDR(ALT_EMAC2_ADDR)
11455 /* The address of the ALT_EMAC_GMACGRP_RXCTRLFRAMES_G register for the ALT_EMAC2 instance. */
11456 #define ALT_EMAC2_GMACGRP_RXCTRLFRAMES_G_ADDR ALT_EMAC_GMACGRP_RXCTRLFRAMES_G_ADDR(ALT_EMAC2_ADDR)
11457 /* The address of the ALT_EMAC_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_MASK register for the ALT_EMAC2 instance. */
11458 #define ALT_EMAC2_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_MASK_ADDR ALT_EMAC_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_MASK_ADDR(ALT_EMAC2_ADDR)
11459 /* The address of the ALT_EMAC_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT register for the ALT_EMAC2 instance. */
11460 #define ALT_EMAC2_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_ADDR ALT_EMAC_GMACGRP_MMC_IPC_RECEIVE_INTERRUPT_ADDR(ALT_EMAC2_ADDR)
11461 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_GD_FRMS register for the ALT_EMAC2 instance. */
11462 #define ALT_EMAC2_GMACGRP_RXIPV4_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
11463 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_HDRERR_FRMS register for the ALT_EMAC2 instance. */
11464 #define ALT_EMAC2_GMACGRP_RXIPV4_HDRERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_HDRERR_FRMS_ADDR(ALT_EMAC2_ADDR)
11465 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_NOPAY_FRMS register for the ALT_EMAC2 instance. */
11466 #define ALT_EMAC2_GMACGRP_RXIPV4_NOPAY_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_NOPAY_FRMS_ADDR(ALT_EMAC2_ADDR)
11467 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_FRAG_FRMS register for the ALT_EMAC2 instance. */
11468 #define ALT_EMAC2_GMACGRP_RXIPV4_FRAG_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_FRAG_FRMS_ADDR(ALT_EMAC2_ADDR)
11469 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_UDSBL_FRMS register for the ALT_EMAC2 instance. */
11470 #define ALT_EMAC2_GMACGRP_RXIPV4_UDSBL_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV4_UDSBL_FRMS_ADDR(ALT_EMAC2_ADDR)
11471 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_GD_FRMS register for the ALT_EMAC2 instance. */
11472 #define ALT_EMAC2_GMACGRP_RXIPV6_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV6_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
11473 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_HDRERR_FRMS register for the ALT_EMAC2 instance. */
11474 #define ALT_EMAC2_GMACGRP_RXIPV6_HDRERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV6_HDRERR_FRMS_ADDR(ALT_EMAC2_ADDR)
11475 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_NOPAY_FRMS register for the ALT_EMAC2 instance. */
11476 #define ALT_EMAC2_GMACGRP_RXIPV6_NOPAY_FRMS_ADDR ALT_EMAC_GMACGRP_RXIPV6_NOPAY_FRMS_ADDR(ALT_EMAC2_ADDR)
11477 /* The address of the ALT_EMAC_GMACGRP_RXUDP_GD_FRMS register for the ALT_EMAC2 instance. */
11478 #define ALT_EMAC2_GMACGRP_RXUDP_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXUDP_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
11479 /* The address of the ALT_EMAC_GMACGRP_RXUDP_ERR_FRMS register for the ALT_EMAC2 instance. */
11480 #define ALT_EMAC2_GMACGRP_RXUDP_ERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXUDP_ERR_FRMS_ADDR(ALT_EMAC2_ADDR)
11481 /* The address of the ALT_EMAC_GMACGRP_RXTCP_GD_FRMS register for the ALT_EMAC2 instance. */
11482 #define ALT_EMAC2_GMACGRP_RXTCP_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXTCP_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
11483 /* The address of the ALT_EMAC_GMACGRP_RXTCP_ERR_FRMS register for the ALT_EMAC2 instance. */
11484 #define ALT_EMAC2_GMACGRP_RXTCP_ERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXTCP_ERR_FRMS_ADDR(ALT_EMAC2_ADDR)
11485 /* The address of the ALT_EMAC_GMACGRP_RXICMP_GD_FRMS register for the ALT_EMAC2 instance. */
11486 #define ALT_EMAC2_GMACGRP_RXICMP_GD_FRMS_ADDR ALT_EMAC_GMACGRP_RXICMP_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
11487 /* The address of the ALT_EMAC_GMACGRP_RXICMP_ERR_FRMS register for the ALT_EMAC2 instance. */
11488 #define ALT_EMAC2_GMACGRP_RXICMP_ERR_FRMS_ADDR ALT_EMAC_GMACGRP_RXICMP_ERR_FRMS_ADDR(ALT_EMAC2_ADDR)
11489 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_GD_OCTETS register for the ALT_EMAC2 instance. */
11490 #define ALT_EMAC2_GMACGRP_RXIPV4_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
11491 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_HDRERR_OCTETS register for the ALT_EMAC2 instance. */
11492 #define ALT_EMAC2_GMACGRP_RXIPV4_HDRERR_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_HDRERR_OCTETS_ADDR(ALT_EMAC2_ADDR)
11493 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_NOPAY_OCTETS register for the ALT_EMAC2 instance. */
11494 #define ALT_EMAC2_GMACGRP_RXIPV4_NOPAY_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_NOPAY_OCTETS_ADDR(ALT_EMAC2_ADDR)
11495 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_FRAG_OCTETS register for the ALT_EMAC2 instance. */
11496 #define ALT_EMAC2_GMACGRP_RXIPV4_FRAG_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_FRAG_OCTETS_ADDR(ALT_EMAC2_ADDR)
11497 /* The address of the ALT_EMAC_GMACGRP_RXIPV4_UDSBL_OCTETS register for the ALT_EMAC2 instance. */
11498 #define ALT_EMAC2_GMACGRP_RXIPV4_UDSBL_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV4_UDSBL_OCTETS_ADDR(ALT_EMAC2_ADDR)
11499 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_GD_OCTETS register for the ALT_EMAC2 instance. */
11500 #define ALT_EMAC2_GMACGRP_RXIPV6_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV6_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
11501 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_HDRERR_OCTETS register for the ALT_EMAC2 instance. */
11502 #define ALT_EMAC2_GMACGRP_RXIPV6_HDRERR_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV6_HDRERR_OCTETS_ADDR(ALT_EMAC2_ADDR)
11503 /* The address of the ALT_EMAC_GMACGRP_RXIPV6_NOPAY_OCTETS register for the ALT_EMAC2 instance. */
11504 #define ALT_EMAC2_GMACGRP_RXIPV6_NOPAY_OCTETS_ADDR ALT_EMAC_GMACGRP_RXIPV6_NOPAY_OCTETS_ADDR(ALT_EMAC2_ADDR)
11505 /* The address of the ALT_EMAC_GMACGRP_RXUDP_GD_OCTETS register for the ALT_EMAC2 instance. */
11506 #define ALT_EMAC2_GMACGRP_RXUDP_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXUDP_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
11507 /* The address of the ALT_EMAC_GMACGRP_RXUDP_ERR_OCTETS register for the ALT_EMAC2 instance. */
11508 #define ALT_EMAC2_GMACGRP_RXUDP_ERR_OCTETS_ADDR ALT_EMAC_GMACGRP_RXUDP_ERR_OCTETS_ADDR(ALT_EMAC2_ADDR)
11509 /* The address of the ALT_EMAC_GMACGRP_RXTCP_GD_OCTETS register for the ALT_EMAC2 instance. */
11510 #define ALT_EMAC2_GMACGRP_RXTCP_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXTCP_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
11511 /* The address of the ALT_EMAC_GMACGRP_RXTCPERROCTETS register for the ALT_EMAC2 instance. */
11512 #define ALT_EMAC2_GMACGRP_RXTCPERROCTETS_ADDR ALT_EMAC_GMACGRP_RXTCPERROCTETS_ADDR(ALT_EMAC2_ADDR)
11513 /* The address of the ALT_EMAC_GMACGRP_RXICMP_GD_OCTETS register for the ALT_EMAC2 instance. */
11514 #define ALT_EMAC2_GMACGRP_RXICMP_GD_OCTETS_ADDR ALT_EMAC_GMACGRP_RXICMP_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
11515 /* The address of the ALT_EMAC_GMACGRP_RXICMP_ERR_OCTETS register for the ALT_EMAC2 instance. */
11516 #define ALT_EMAC2_GMACGRP_RXICMP_ERR_OCTETS_ADDR ALT_EMAC_GMACGRP_RXICMP_ERR_OCTETS_ADDR(ALT_EMAC2_ADDR)
11517 /* The address of the ALT_EMAC_GMACGRP_L3_L4_CONTROL0 register for the ALT_EMAC2 instance. */
11518 #define ALT_EMAC2_GMACGRP_L3_L4_CONTROL0_ADDR ALT_EMAC_GMACGRP_L3_L4_CONTROL0_ADDR(ALT_EMAC2_ADDR)
11519 /* The address of the ALT_EMAC_GMACGRP_LAYER4_ADDRESS0 register for the ALT_EMAC2 instance. */
11520 #define ALT_EMAC2_GMACGRP_LAYER4_ADDRESS0_ADDR ALT_EMAC_GMACGRP_LAYER4_ADDRESS0_ADDR(ALT_EMAC2_ADDR)
11521 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG0 register for the ALT_EMAC2 instance. */
11522 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR0_REG0_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG0_ADDR(ALT_EMAC2_ADDR)
11523 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG0 register for the ALT_EMAC2 instance. */
11524 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR1_REG0_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG0_ADDR(ALT_EMAC2_ADDR)
11525 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG0 register for the ALT_EMAC2 instance. */
11526 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR2_REG0_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG0_ADDR(ALT_EMAC2_ADDR)
11527 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG0 register for the ALT_EMAC2 instance. */
11528 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR3_REG0_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG0_ADDR(ALT_EMAC2_ADDR)
11529 /* The address of the ALT_EMAC_GMACGRP_L3_L4_CONTROL1 register for the ALT_EMAC2 instance. */
11530 #define ALT_EMAC2_GMACGRP_L3_L4_CONTROL1_ADDR ALT_EMAC_GMACGRP_L3_L4_CONTROL1_ADDR(ALT_EMAC2_ADDR)
11531 /* The address of the ALT_EMAC_GMACGRP_LAYER4_ADDRESS1 register for the ALT_EMAC2 instance. */
11532 #define ALT_EMAC2_GMACGRP_LAYER4_ADDRESS1_ADDR ALT_EMAC_GMACGRP_LAYER4_ADDRESS1_ADDR(ALT_EMAC2_ADDR)
11533 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG1 register for the ALT_EMAC2 instance. */
11534 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR0_REG1_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG1_ADDR(ALT_EMAC2_ADDR)
11535 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG1 register for the ALT_EMAC2 instance. */
11536 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR1_REG1_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG1_ADDR(ALT_EMAC2_ADDR)
11537 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG1 register for the ALT_EMAC2 instance. */
11538 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR2_REG1_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG1_ADDR(ALT_EMAC2_ADDR)
11539 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG1 register for the ALT_EMAC2 instance. */
11540 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR3_REG1_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG1_ADDR(ALT_EMAC2_ADDR)
11541 /* The address of the ALT_EMAC_GMACGRP_L3_L4_CONTROL2 register for the ALT_EMAC2 instance. */
11542 #define ALT_EMAC2_GMACGRP_L3_L4_CONTROL2_ADDR ALT_EMAC_GMACGRP_L3_L4_CONTROL2_ADDR(ALT_EMAC2_ADDR)
11543 /* The address of the ALT_EMAC_GMACGRP_LAYER4_ADDRESS2 register for the ALT_EMAC2 instance. */
11544 #define ALT_EMAC2_GMACGRP_LAYER4_ADDRESS2_ADDR ALT_EMAC_GMACGRP_LAYER4_ADDRESS2_ADDR(ALT_EMAC2_ADDR)
11545 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG2 register for the ALT_EMAC2 instance. */
11546 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR0_REG2_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG2_ADDR(ALT_EMAC2_ADDR)
11547 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG2 register for the ALT_EMAC2 instance. */
11548 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR1_REG2_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG2_ADDR(ALT_EMAC2_ADDR)
11549 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG2 register for the ALT_EMAC2 instance. */
11550 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR2_REG2_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG2_ADDR(ALT_EMAC2_ADDR)
11551 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG2 register for the ALT_EMAC2 instance. */
11552 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR3_REG2_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG2_ADDR(ALT_EMAC2_ADDR)
11553 /* The address of the ALT_EMAC_GMACGRP_L3_L4_CONTROL3 register for the ALT_EMAC2 instance. */
11554 #define ALT_EMAC2_GMACGRP_L3_L4_CONTROL3_ADDR ALT_EMAC_GMACGRP_L3_L4_CONTROL3_ADDR(ALT_EMAC2_ADDR)
11555 /* The address of the ALT_EMAC_GMACGRP_LAYER4_ADDRESS3 register for the ALT_EMAC2 instance. */
11556 #define ALT_EMAC2_GMACGRP_LAYER4_ADDRESS3_ADDR ALT_EMAC_GMACGRP_LAYER4_ADDRESS3_ADDR(ALT_EMAC2_ADDR)
11557 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG3 register for the ALT_EMAC2 instance. */
11558 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR0_REG3_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR0_REG3_ADDR(ALT_EMAC2_ADDR)
11559 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG3 register for the ALT_EMAC2 instance. */
11560 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR1_REG3_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR1_REG3_ADDR(ALT_EMAC2_ADDR)
11561 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG3 register for the ALT_EMAC2 instance. */
11562 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR2_REG3_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR2_REG3_ADDR(ALT_EMAC2_ADDR)
11563 /* The address of the ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG3 register for the ALT_EMAC2 instance. */
11564 #define ALT_EMAC2_GMACGRP_LAYER3_ADDR3_REG3_ADDR ALT_EMAC_GMACGRP_LAYER3_ADDR3_REG3_ADDR(ALT_EMAC2_ADDR)
11565 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG0 register for the ALT_EMAC2 instance. */
11566 #define ALT_EMAC2_GMACGRP_HASH_TABLE_REG0_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG0_ADDR(ALT_EMAC2_ADDR)
11567 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG1 register for the ALT_EMAC2 instance. */
11568 #define ALT_EMAC2_GMACGRP_HASH_TABLE_REG1_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG1_ADDR(ALT_EMAC2_ADDR)
11569 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG2 register for the ALT_EMAC2 instance. */
11570 #define ALT_EMAC2_GMACGRP_HASH_TABLE_REG2_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG2_ADDR(ALT_EMAC2_ADDR)
11571 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG3 register for the ALT_EMAC2 instance. */
11572 #define ALT_EMAC2_GMACGRP_HASH_TABLE_REG3_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG3_ADDR(ALT_EMAC2_ADDR)
11573 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG4 register for the ALT_EMAC2 instance. */
11574 #define ALT_EMAC2_GMACGRP_HASH_TABLE_REG4_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG4_ADDR(ALT_EMAC2_ADDR)
11575 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG5 register for the ALT_EMAC2 instance. */
11576 #define ALT_EMAC2_GMACGRP_HASH_TABLE_REG5_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG5_ADDR(ALT_EMAC2_ADDR)
11577 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG6 register for the ALT_EMAC2 instance. */
11578 #define ALT_EMAC2_GMACGRP_HASH_TABLE_REG6_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG6_ADDR(ALT_EMAC2_ADDR)
11579 /* The address of the ALT_EMAC_GMACGRP_HASH_TABLE_REG7 register for the ALT_EMAC2 instance. */
11580 #define ALT_EMAC2_GMACGRP_HASH_TABLE_REG7_ADDR ALT_EMAC_GMACGRP_HASH_TABLE_REG7_ADDR(ALT_EMAC2_ADDR)
11581 /* The address of the ALT_EMAC_GMACGRP_VLAN_INCL_REG register for the ALT_EMAC2 instance. */
11582 #define ALT_EMAC2_GMACGRP_VLAN_INCL_REG_ADDR ALT_EMAC_GMACGRP_VLAN_INCL_REG_ADDR(ALT_EMAC2_ADDR)
11583 /* The address of the ALT_EMAC_GMACGRP_VLAN_HASH_TABLE_REG register for the ALT_EMAC2 instance. */
11584 #define ALT_EMAC2_GMACGRP_VLAN_HASH_TABLE_REG_ADDR ALT_EMAC_GMACGRP_VLAN_HASH_TABLE_REG_ADDR(ALT_EMAC2_ADDR)
11585 /* The address of the ALT_EMAC_GMACGRP_TIMESTAMP_CONTROL register for the ALT_EMAC2 instance. */
11586 #define ALT_EMAC2_GMACGRP_TIMESTAMP_CONTROL_ADDR ALT_EMAC_GMACGRP_TIMESTAMP_CONTROL_ADDR(ALT_EMAC2_ADDR)
11587 /* The address of the ALT_EMAC_GMACGRP_SUB_SECOND_INCREMENT register for the ALT_EMAC2 instance. */
11588 #define ALT_EMAC2_GMACGRP_SUB_SECOND_INCREMENT_ADDR ALT_EMAC_GMACGRP_SUB_SECOND_INCREMENT_ADDR(ALT_EMAC2_ADDR)
11589 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_SECONDS register for the ALT_EMAC2 instance. */
11590 #define ALT_EMAC2_GMACGRP_SYSTEM_TIME_SECONDS_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_SECONDS_ADDR(ALT_EMAC2_ADDR)
11591 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_NANOSECONDS register for the ALT_EMAC2 instance. */
11592 #define ALT_EMAC2_GMACGRP_SYSTEM_TIME_NANOSECONDS_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_NANOSECONDS_ADDR(ALT_EMAC2_ADDR)
11593 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_SECONDS_UPDATE register for the ALT_EMAC2 instance. */
11594 #define ALT_EMAC2_GMACGRP_SYSTEM_TIME_SECONDS_UPDATE_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_SECONDS_UPDATE_ADDR(ALT_EMAC2_ADDR)
11595 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_NANOSECONDS_UPDATE register for the ALT_EMAC2 instance. */
11596 #define ALT_EMAC2_GMACGRP_SYSTEM_TIME_NANOSECONDS_UPDATE_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_NANOSECONDS_UPDATE_ADDR(ALT_EMAC2_ADDR)
11597 /* The address of the ALT_EMAC_GMACGRP_TIMESTAMP_ADDEND register for the ALT_EMAC2 instance. */
11598 #define ALT_EMAC2_GMACGRP_TIMESTAMP_ADDEND_ADDR ALT_EMAC_GMACGRP_TIMESTAMP_ADDEND_ADDR(ALT_EMAC2_ADDR)
11599 /* The address of the ALT_EMAC_GMACGRP_TARGET_TIME_SECONDS register for the ALT_EMAC2 instance. */
11600 #define ALT_EMAC2_GMACGRP_TARGET_TIME_SECONDS_ADDR ALT_EMAC_GMACGRP_TARGET_TIME_SECONDS_ADDR(ALT_EMAC2_ADDR)
11601 /* The address of the ALT_EMAC_GMACGRP_TARGET_TIME_NANOSECONDS register for the ALT_EMAC2 instance. */
11602 #define ALT_EMAC2_GMACGRP_TARGET_TIME_NANOSECONDS_ADDR ALT_EMAC_GMACGRP_TARGET_TIME_NANOSECONDS_ADDR(ALT_EMAC2_ADDR)
11603 /* The address of the ALT_EMAC_GMACGRP_SYSTEM_TIME_HIGHER_WORD_SECONDS register for the ALT_EMAC2 instance. */
11604 #define ALT_EMAC2_GMACGRP_SYSTEM_TIME_HIGHER_WORD_SECONDS_ADDR ALT_EMAC_GMACGRP_SYSTEM_TIME_HIGHER_WORD_SECONDS_ADDR(ALT_EMAC2_ADDR)
11605 /* The address of the ALT_EMAC_GMACGRP_TIMESTAMP_STATUS register for the ALT_EMAC2 instance. */
11606 #define ALT_EMAC2_GMACGRP_TIMESTAMP_STATUS_ADDR ALT_EMAC_GMACGRP_TIMESTAMP_STATUS_ADDR(ALT_EMAC2_ADDR)
11607 /* The address of the ALT_EMAC_GMACGRP_PPS_CONTROL register for the ALT_EMAC2 instance. */
11608 #define ALT_EMAC2_GMACGRP_PPS_CONTROL_ADDR ALT_EMAC_GMACGRP_PPS_CONTROL_ADDR(ALT_EMAC2_ADDR)
11609 /* The address of the ALT_EMAC_GMACGRP_AUXILIARY_TIMESTAMP_NANOSECONDS register for the ALT_EMAC2 instance. */
11610 #define ALT_EMAC2_GMACGRP_AUXILIARY_TIMESTAMP_NANOSECONDS_ADDR ALT_EMAC_GMACGRP_AUXILIARY_TIMESTAMP_NANOSECONDS_ADDR(ALT_EMAC2_ADDR)
11611 /* The address of the ALT_EMAC_GMACGRP_AUXILIARY_TIMESTAMP_SECONDS register for the ALT_EMAC2 instance. */
11612 #define ALT_EMAC2_GMACGRP_AUXILIARY_TIMESTAMP_SECONDS_ADDR ALT_EMAC_GMACGRP_AUXILIARY_TIMESTAMP_SECONDS_ADDR(ALT_EMAC2_ADDR)
11613 /* The address of the ALT_EMAC_GMACGRP_PPS0_INTERVAL register for the ALT_EMAC2 instance. */
11614 #define ALT_EMAC2_GMACGRP_PPS0_INTERVAL_ADDR ALT_EMAC_GMACGRP_PPS0_INTERVAL_ADDR(ALT_EMAC2_ADDR)
11615 /* The address of the ALT_EMAC_GMACGRP_PPS0_WIDTH register for the ALT_EMAC2 instance. */
11616 #define ALT_EMAC2_GMACGRP_PPS0_WIDTH_ADDR ALT_EMAC_GMACGRP_PPS0_WIDTH_ADDR(ALT_EMAC2_ADDR)
11617 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS16_HIGH register for the ALT_EMAC2 instance. */
11618 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS16_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS16_HIGH_ADDR(ALT_EMAC2_ADDR)
11619 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS16_LOW register for the ALT_EMAC2 instance. */
11620 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS16_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS16_LOW_ADDR(ALT_EMAC2_ADDR)
11621 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS17_HIGH register for the ALT_EMAC2 instance. */
11622 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS17_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS17_HIGH_ADDR(ALT_EMAC2_ADDR)
11623 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS17_LOW register for the ALT_EMAC2 instance. */
11624 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS17_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS17_LOW_ADDR(ALT_EMAC2_ADDR)
11625 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS18_HIGH register for the ALT_EMAC2 instance. */
11626 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS18_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS18_HIGH_ADDR(ALT_EMAC2_ADDR)
11627 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS18_LOW register for the ALT_EMAC2 instance. */
11628 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS18_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS18_LOW_ADDR(ALT_EMAC2_ADDR)
11629 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS19_HIGH register for the ALT_EMAC2 instance. */
11630 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS19_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS19_HIGH_ADDR(ALT_EMAC2_ADDR)
11631 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS19_LOW register for the ALT_EMAC2 instance. */
11632 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS19_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS19_LOW_ADDR(ALT_EMAC2_ADDR)
11633 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS20_HIGH register for the ALT_EMAC2 instance. */
11634 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS20_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS20_HIGH_ADDR(ALT_EMAC2_ADDR)
11635 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS20_LOW register for the ALT_EMAC2 instance. */
11636 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS20_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS20_LOW_ADDR(ALT_EMAC2_ADDR)
11637 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS21_HIGH register for the ALT_EMAC2 instance. */
11638 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS21_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS21_HIGH_ADDR(ALT_EMAC2_ADDR)
11639 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS21_LOW register for the ALT_EMAC2 instance. */
11640 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS21_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS21_LOW_ADDR(ALT_EMAC2_ADDR)
11641 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS22_HIGH register for the ALT_EMAC2 instance. */
11642 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS22_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS22_HIGH_ADDR(ALT_EMAC2_ADDR)
11643 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS22_LOW register for the ALT_EMAC2 instance. */
11644 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS22_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS22_LOW_ADDR(ALT_EMAC2_ADDR)
11645 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS23_HIGH register for the ALT_EMAC2 instance. */
11646 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS23_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS23_HIGH_ADDR(ALT_EMAC2_ADDR)
11647 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS23_LOW register for the ALT_EMAC2 instance. */
11648 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS23_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS23_LOW_ADDR(ALT_EMAC2_ADDR)
11649 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS24_HIGH register for the ALT_EMAC2 instance. */
11650 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS24_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS24_HIGH_ADDR(ALT_EMAC2_ADDR)
11651 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS24_LOW register for the ALT_EMAC2 instance. */
11652 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS24_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS24_LOW_ADDR(ALT_EMAC2_ADDR)
11653 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS25_HIGH register for the ALT_EMAC2 instance. */
11654 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS25_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS25_HIGH_ADDR(ALT_EMAC2_ADDR)
11655 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS25_LOW register for the ALT_EMAC2 instance. */
11656 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS25_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS25_LOW_ADDR(ALT_EMAC2_ADDR)
11657 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS26_HIGH register for the ALT_EMAC2 instance. */
11658 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS26_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS26_HIGH_ADDR(ALT_EMAC2_ADDR)
11659 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS26_LOW register for the ALT_EMAC2 instance. */
11660 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS26_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS26_LOW_ADDR(ALT_EMAC2_ADDR)
11661 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS27_HIGH register for the ALT_EMAC2 instance. */
11662 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS27_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS27_HIGH_ADDR(ALT_EMAC2_ADDR)
11663 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS27_LOW register for the ALT_EMAC2 instance. */
11664 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS27_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS27_LOW_ADDR(ALT_EMAC2_ADDR)
11665 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS28_HIGH register for the ALT_EMAC2 instance. */
11666 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS28_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS28_HIGH_ADDR(ALT_EMAC2_ADDR)
11667 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS28_LOW register for the ALT_EMAC2 instance. */
11668 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS28_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS28_LOW_ADDR(ALT_EMAC2_ADDR)
11669 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS29_HIGH register for the ALT_EMAC2 instance. */
11670 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS29_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS29_HIGH_ADDR(ALT_EMAC2_ADDR)
11671 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS29_LOW register for the ALT_EMAC2 instance. */
11672 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS29_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS29_LOW_ADDR(ALT_EMAC2_ADDR)
11673 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS30_HIGH register for the ALT_EMAC2 instance. */
11674 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS30_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS30_HIGH_ADDR(ALT_EMAC2_ADDR)
11675 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS30_LOW register for the ALT_EMAC2 instance. */
11676 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS30_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS30_LOW_ADDR(ALT_EMAC2_ADDR)
11677 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS31_HIGH register for the ALT_EMAC2 instance. */
11678 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS31_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS31_HIGH_ADDR(ALT_EMAC2_ADDR)
11679 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS31_LOW register for the ALT_EMAC2 instance. */
11680 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS31_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS31_LOW_ADDR(ALT_EMAC2_ADDR)
11681 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS32_HIGH register for the ALT_EMAC2 instance. */
11682 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS32_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS32_HIGH_ADDR(ALT_EMAC2_ADDR)
11683 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS32_LOW register for the ALT_EMAC2 instance. */
11684 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS32_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS32_LOW_ADDR(ALT_EMAC2_ADDR)
11685 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS33_HIGH register for the ALT_EMAC2 instance. */
11686 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS33_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS33_HIGH_ADDR(ALT_EMAC2_ADDR)
11687 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS33_LOW register for the ALT_EMAC2 instance. */
11688 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS33_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS33_LOW_ADDR(ALT_EMAC2_ADDR)
11689 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS34_HIGH register for the ALT_EMAC2 instance. */
11690 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS34_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS34_HIGH_ADDR(ALT_EMAC2_ADDR)
11691 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS34_LOW register for the ALT_EMAC2 instance. */
11692 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS34_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS34_LOW_ADDR(ALT_EMAC2_ADDR)
11693 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS35_HIGH register for the ALT_EMAC2 instance. */
11694 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS35_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS35_HIGH_ADDR(ALT_EMAC2_ADDR)
11695 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS35_LOW register for the ALT_EMAC2 instance. */
11696 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS35_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS35_LOW_ADDR(ALT_EMAC2_ADDR)
11697 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS36_HIGH register for the ALT_EMAC2 instance. */
11698 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS36_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS36_HIGH_ADDR(ALT_EMAC2_ADDR)
11699 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS36_LOW register for the ALT_EMAC2 instance. */
11700 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS36_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS36_LOW_ADDR(ALT_EMAC2_ADDR)
11701 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS37_HIGH register for the ALT_EMAC2 instance. */
11702 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS37_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS37_HIGH_ADDR(ALT_EMAC2_ADDR)
11703 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS37_LOW register for the ALT_EMAC2 instance. */
11704 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS37_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS37_LOW_ADDR(ALT_EMAC2_ADDR)
11705 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS38_HIGH register for the ALT_EMAC2 instance. */
11706 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS38_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS38_HIGH_ADDR(ALT_EMAC2_ADDR)
11707 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS38_LOW register for the ALT_EMAC2 instance. */
11708 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS38_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS38_LOW_ADDR(ALT_EMAC2_ADDR)
11709 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS39_HIGH register for the ALT_EMAC2 instance. */
11710 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS39_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS39_HIGH_ADDR(ALT_EMAC2_ADDR)
11711 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS39_LOW register for the ALT_EMAC2 instance. */
11712 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS39_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS39_LOW_ADDR(ALT_EMAC2_ADDR)
11713 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS40_HIGH register for the ALT_EMAC2 instance. */
11714 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS40_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS40_HIGH_ADDR(ALT_EMAC2_ADDR)
11715 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS40_LOW register for the ALT_EMAC2 instance. */
11716 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS40_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS40_LOW_ADDR(ALT_EMAC2_ADDR)
11717 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS41_HIGH register for the ALT_EMAC2 instance. */
11718 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS41_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS41_HIGH_ADDR(ALT_EMAC2_ADDR)
11719 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS41_LOW register for the ALT_EMAC2 instance. */
11720 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS41_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS41_LOW_ADDR(ALT_EMAC2_ADDR)
11721 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS42_HIGH register for the ALT_EMAC2 instance. */
11722 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS42_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS42_HIGH_ADDR(ALT_EMAC2_ADDR)
11723 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS42_LOW register for the ALT_EMAC2 instance. */
11724 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS42_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS42_LOW_ADDR(ALT_EMAC2_ADDR)
11725 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS43_HIGH register for the ALT_EMAC2 instance. */
11726 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS43_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS43_HIGH_ADDR(ALT_EMAC2_ADDR)
11727 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS43_LOW register for the ALT_EMAC2 instance. */
11728 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS43_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS43_LOW_ADDR(ALT_EMAC2_ADDR)
11729 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS44_HIGH register for the ALT_EMAC2 instance. */
11730 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS44_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS44_HIGH_ADDR(ALT_EMAC2_ADDR)
11731 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS44_LOW register for the ALT_EMAC2 instance. */
11732 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS44_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS44_LOW_ADDR(ALT_EMAC2_ADDR)
11733 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS45_HIGH register for the ALT_EMAC2 instance. */
11734 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS45_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS45_HIGH_ADDR(ALT_EMAC2_ADDR)
11735 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS45_LOW register for the ALT_EMAC2 instance. */
11736 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS45_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS45_LOW_ADDR(ALT_EMAC2_ADDR)
11737 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS46_HIGH register for the ALT_EMAC2 instance. */
11738 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS46_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS46_HIGH_ADDR(ALT_EMAC2_ADDR)
11739 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS46_LOW register for the ALT_EMAC2 instance. */
11740 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS46_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS46_LOW_ADDR(ALT_EMAC2_ADDR)
11741 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS47_HIGH register for the ALT_EMAC2 instance. */
11742 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS47_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS47_HIGH_ADDR(ALT_EMAC2_ADDR)
11743 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS47_LOW register for the ALT_EMAC2 instance. */
11744 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS47_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS47_LOW_ADDR(ALT_EMAC2_ADDR)
11745 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS48_HIGH register for the ALT_EMAC2 instance. */
11746 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS48_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS48_HIGH_ADDR(ALT_EMAC2_ADDR)
11747 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS48_LOW register for the ALT_EMAC2 instance. */
11748 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS48_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS48_LOW_ADDR(ALT_EMAC2_ADDR)
11749 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS49_HIGH register for the ALT_EMAC2 instance. */
11750 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS49_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS49_HIGH_ADDR(ALT_EMAC2_ADDR)
11751 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS49_LOW register for the ALT_EMAC2 instance. */
11752 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS49_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS49_LOW_ADDR(ALT_EMAC2_ADDR)
11753 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS50_HIGH register for the ALT_EMAC2 instance. */
11754 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS50_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS50_HIGH_ADDR(ALT_EMAC2_ADDR)
11755 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS50_LOW register for the ALT_EMAC2 instance. */
11756 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS50_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS50_LOW_ADDR(ALT_EMAC2_ADDR)
11757 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS51_HIGH register for the ALT_EMAC2 instance. */
11758 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS51_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS51_HIGH_ADDR(ALT_EMAC2_ADDR)
11759 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS51_LOW register for the ALT_EMAC2 instance. */
11760 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS51_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS51_LOW_ADDR(ALT_EMAC2_ADDR)
11761 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS52_HIGH register for the ALT_EMAC2 instance. */
11762 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS52_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS52_HIGH_ADDR(ALT_EMAC2_ADDR)
11763 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS52_LOW register for the ALT_EMAC2 instance. */
11764 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS52_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS52_LOW_ADDR(ALT_EMAC2_ADDR)
11765 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS53_HIGH register for the ALT_EMAC2 instance. */
11766 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS53_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS53_HIGH_ADDR(ALT_EMAC2_ADDR)
11767 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS53_LOW register for the ALT_EMAC2 instance. */
11768 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS53_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS53_LOW_ADDR(ALT_EMAC2_ADDR)
11769 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS54_HIGH register for the ALT_EMAC2 instance. */
11770 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS54_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS54_HIGH_ADDR(ALT_EMAC2_ADDR)
11771 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS54_LOW register for the ALT_EMAC2 instance. */
11772 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS54_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS54_LOW_ADDR(ALT_EMAC2_ADDR)
11773 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS55_HIGH register for the ALT_EMAC2 instance. */
11774 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS55_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS55_HIGH_ADDR(ALT_EMAC2_ADDR)
11775 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS55_LOW register for the ALT_EMAC2 instance. */
11776 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS55_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS55_LOW_ADDR(ALT_EMAC2_ADDR)
11777 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS56_HIGH register for the ALT_EMAC2 instance. */
11778 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS56_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS56_HIGH_ADDR(ALT_EMAC2_ADDR)
11779 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS56_LOW register for the ALT_EMAC2 instance. */
11780 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS56_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS56_LOW_ADDR(ALT_EMAC2_ADDR)
11781 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS57_HIGH register for the ALT_EMAC2 instance. */
11782 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS57_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS57_HIGH_ADDR(ALT_EMAC2_ADDR)
11783 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS57_LOW register for the ALT_EMAC2 instance. */
11784 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS57_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS57_LOW_ADDR(ALT_EMAC2_ADDR)
11785 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS58_HIGH register for the ALT_EMAC2 instance. */
11786 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS58_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS58_HIGH_ADDR(ALT_EMAC2_ADDR)
11787 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS58_LOW register for the ALT_EMAC2 instance. */
11788 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS58_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS58_LOW_ADDR(ALT_EMAC2_ADDR)
11789 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS59_HIGH register for the ALT_EMAC2 instance. */
11790 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS59_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS59_HIGH_ADDR(ALT_EMAC2_ADDR)
11791 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS59_LOW register for the ALT_EMAC2 instance. */
11792 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS59_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS59_LOW_ADDR(ALT_EMAC2_ADDR)
11793 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS60_HIGH register for the ALT_EMAC2 instance. */
11794 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS60_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS60_HIGH_ADDR(ALT_EMAC2_ADDR)
11795 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS60_LOW register for the ALT_EMAC2 instance. */
11796 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS60_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS60_LOW_ADDR(ALT_EMAC2_ADDR)
11797 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS61_HIGH register for the ALT_EMAC2 instance. */
11798 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS61_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS61_HIGH_ADDR(ALT_EMAC2_ADDR)
11799 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS61_LOW register for the ALT_EMAC2 instance. */
11800 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS61_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS61_LOW_ADDR(ALT_EMAC2_ADDR)
11801 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS62_HIGH register for the ALT_EMAC2 instance. */
11802 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS62_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS62_HIGH_ADDR(ALT_EMAC2_ADDR)
11803 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS62_LOW register for the ALT_EMAC2 instance. */
11804 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS62_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS62_LOW_ADDR(ALT_EMAC2_ADDR)
11805 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS63_HIGH register for the ALT_EMAC2 instance. */
11806 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS63_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS63_HIGH_ADDR(ALT_EMAC2_ADDR)
11807 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS63_LOW register for the ALT_EMAC2 instance. */
11808 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS63_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS63_LOW_ADDR(ALT_EMAC2_ADDR)
11809 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS64_HIGH register for the ALT_EMAC2 instance. */
11810 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS64_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS64_HIGH_ADDR(ALT_EMAC2_ADDR)
11811 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS64_LOW register for the ALT_EMAC2 instance. */
11812 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS64_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS64_LOW_ADDR(ALT_EMAC2_ADDR)
11813 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS65_HIGH register for the ALT_EMAC2 instance. */
11814 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS65_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS65_HIGH_ADDR(ALT_EMAC2_ADDR)
11815 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS65_LOW register for the ALT_EMAC2 instance. */
11816 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS65_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS65_LOW_ADDR(ALT_EMAC2_ADDR)
11817 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS66_HIGH register for the ALT_EMAC2 instance. */
11818 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS66_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS66_HIGH_ADDR(ALT_EMAC2_ADDR)
11819 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS66_LOW register for the ALT_EMAC2 instance. */
11820 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS66_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS66_LOW_ADDR(ALT_EMAC2_ADDR)
11821 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS67_HIGH register for the ALT_EMAC2 instance. */
11822 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS67_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS67_HIGH_ADDR(ALT_EMAC2_ADDR)
11823 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS67_LOW register for the ALT_EMAC2 instance. */
11824 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS67_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS67_LOW_ADDR(ALT_EMAC2_ADDR)
11825 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS68_HIGH register for the ALT_EMAC2 instance. */
11826 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS68_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS68_HIGH_ADDR(ALT_EMAC2_ADDR)
11827 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS68_LOW register for the ALT_EMAC2 instance. */
11828 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS68_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS68_LOW_ADDR(ALT_EMAC2_ADDR)
11829 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS69_HIGH register for the ALT_EMAC2 instance. */
11830 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS69_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS69_HIGH_ADDR(ALT_EMAC2_ADDR)
11831 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS69_LOW register for the ALT_EMAC2 instance. */
11832 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS69_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS69_LOW_ADDR(ALT_EMAC2_ADDR)
11833 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS70_HIGH register for the ALT_EMAC2 instance. */
11834 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS70_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS70_HIGH_ADDR(ALT_EMAC2_ADDR)
11835 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS70_LOW register for the ALT_EMAC2 instance. */
11836 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS70_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS70_LOW_ADDR(ALT_EMAC2_ADDR)
11837 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS71_HIGH register for the ALT_EMAC2 instance. */
11838 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS71_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS71_HIGH_ADDR(ALT_EMAC2_ADDR)
11839 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS71_LOW register for the ALT_EMAC2 instance. */
11840 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS71_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS71_LOW_ADDR(ALT_EMAC2_ADDR)
11841 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS72_HIGH register for the ALT_EMAC2 instance. */
11842 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS72_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS72_HIGH_ADDR(ALT_EMAC2_ADDR)
11843 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS72_LOW register for the ALT_EMAC2 instance. */
11844 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS72_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS72_LOW_ADDR(ALT_EMAC2_ADDR)
11845 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS73_HIGH register for the ALT_EMAC2 instance. */
11846 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS73_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS73_HIGH_ADDR(ALT_EMAC2_ADDR)
11847 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS73_LOW register for the ALT_EMAC2 instance. */
11848 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS73_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS73_LOW_ADDR(ALT_EMAC2_ADDR)
11849 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS74_HIGH register for the ALT_EMAC2 instance. */
11850 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS74_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS74_HIGH_ADDR(ALT_EMAC2_ADDR)
11851 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS74_LOW register for the ALT_EMAC2 instance. */
11852 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS74_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS74_LOW_ADDR(ALT_EMAC2_ADDR)
11853 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS75_HIGH register for the ALT_EMAC2 instance. */
11854 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS75_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS75_HIGH_ADDR(ALT_EMAC2_ADDR)
11855 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS75_LOW register for the ALT_EMAC2 instance. */
11856 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS75_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS75_LOW_ADDR(ALT_EMAC2_ADDR)
11857 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS76_HIGH register for the ALT_EMAC2 instance. */
11858 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS76_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS76_HIGH_ADDR(ALT_EMAC2_ADDR)
11859 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS76_LOW register for the ALT_EMAC2 instance. */
11860 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS76_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS76_LOW_ADDR(ALT_EMAC2_ADDR)
11861 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS77_HIGH register for the ALT_EMAC2 instance. */
11862 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS77_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS77_HIGH_ADDR(ALT_EMAC2_ADDR)
11863 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS77_LOW register for the ALT_EMAC2 instance. */
11864 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS77_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS77_LOW_ADDR(ALT_EMAC2_ADDR)
11865 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS78_HIGH register for the ALT_EMAC2 instance. */
11866 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS78_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS78_HIGH_ADDR(ALT_EMAC2_ADDR)
11867 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS78_LOW register for the ALT_EMAC2 instance. */
11868 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS78_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS78_LOW_ADDR(ALT_EMAC2_ADDR)
11869 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS79_HIGH register for the ALT_EMAC2 instance. */
11870 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS79_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS79_HIGH_ADDR(ALT_EMAC2_ADDR)
11871 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS79_LOW register for the ALT_EMAC2 instance. */
11872 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS79_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS79_LOW_ADDR(ALT_EMAC2_ADDR)
11873 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS80_HIGH register for the ALT_EMAC2 instance. */
11874 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS80_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS80_HIGH_ADDR(ALT_EMAC2_ADDR)
11875 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS80_LOW register for the ALT_EMAC2 instance. */
11876 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS80_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS80_LOW_ADDR(ALT_EMAC2_ADDR)
11877 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS81_HIGH register for the ALT_EMAC2 instance. */
11878 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS81_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS81_HIGH_ADDR(ALT_EMAC2_ADDR)
11879 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS81_LOW register for the ALT_EMAC2 instance. */
11880 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS81_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS81_LOW_ADDR(ALT_EMAC2_ADDR)
11881 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS82_HIGH register for the ALT_EMAC2 instance. */
11882 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS82_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS82_HIGH_ADDR(ALT_EMAC2_ADDR)
11883 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS82_LOW register for the ALT_EMAC2 instance. */
11884 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS82_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS82_LOW_ADDR(ALT_EMAC2_ADDR)
11885 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS83_HIGH register for the ALT_EMAC2 instance. */
11886 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS83_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS83_HIGH_ADDR(ALT_EMAC2_ADDR)
11887 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS83_LOW register for the ALT_EMAC2 instance. */
11888 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS83_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS83_LOW_ADDR(ALT_EMAC2_ADDR)
11889 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS84_HIGH register for the ALT_EMAC2 instance. */
11890 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS84_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS84_HIGH_ADDR(ALT_EMAC2_ADDR)
11891 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS84_LOW register for the ALT_EMAC2 instance. */
11892 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS84_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS84_LOW_ADDR(ALT_EMAC2_ADDR)
11893 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS85_HIGH register for the ALT_EMAC2 instance. */
11894 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS85_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS85_HIGH_ADDR(ALT_EMAC2_ADDR)
11895 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS85_LOW register for the ALT_EMAC2 instance. */
11896 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS85_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS85_LOW_ADDR(ALT_EMAC2_ADDR)
11897 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS86_HIGH register for the ALT_EMAC2 instance. */
11898 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS86_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS86_HIGH_ADDR(ALT_EMAC2_ADDR)
11899 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS86_LOW register for the ALT_EMAC2 instance. */
11900 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS86_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS86_LOW_ADDR(ALT_EMAC2_ADDR)
11901 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS87_HIGH register for the ALT_EMAC2 instance. */
11902 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS87_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS87_HIGH_ADDR(ALT_EMAC2_ADDR)
11903 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS87_LOW register for the ALT_EMAC2 instance. */
11904 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS87_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS87_LOW_ADDR(ALT_EMAC2_ADDR)
11905 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS88_HIGH register for the ALT_EMAC2 instance. */
11906 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS88_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS88_HIGH_ADDR(ALT_EMAC2_ADDR)
11907 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS88_LOW register for the ALT_EMAC2 instance. */
11908 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS88_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS88_LOW_ADDR(ALT_EMAC2_ADDR)
11909 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS89_HIGH register for the ALT_EMAC2 instance. */
11910 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS89_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS89_HIGH_ADDR(ALT_EMAC2_ADDR)
11911 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS89_LOW register for the ALT_EMAC2 instance. */
11912 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS89_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS89_LOW_ADDR(ALT_EMAC2_ADDR)
11913 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS90_HIGH register for the ALT_EMAC2 instance. */
11914 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS90_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS90_HIGH_ADDR(ALT_EMAC2_ADDR)
11915 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS90_LOW register for the ALT_EMAC2 instance. */
11916 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS90_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS90_LOW_ADDR(ALT_EMAC2_ADDR)
11917 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS91_HIGH register for the ALT_EMAC2 instance. */
11918 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS91_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS91_HIGH_ADDR(ALT_EMAC2_ADDR)
11919 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS91_LOW register for the ALT_EMAC2 instance. */
11920 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS91_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS91_LOW_ADDR(ALT_EMAC2_ADDR)
11921 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS92_HIGH register for the ALT_EMAC2 instance. */
11922 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS92_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS92_HIGH_ADDR(ALT_EMAC2_ADDR)
11923 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS92_LOW register for the ALT_EMAC2 instance. */
11924 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS92_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS92_LOW_ADDR(ALT_EMAC2_ADDR)
11925 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS93_HIGH register for the ALT_EMAC2 instance. */
11926 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS93_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS93_HIGH_ADDR(ALT_EMAC2_ADDR)
11927 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS93_LOW register for the ALT_EMAC2 instance. */
11928 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS93_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS93_LOW_ADDR(ALT_EMAC2_ADDR)
11929 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS94_HIGH register for the ALT_EMAC2 instance. */
11930 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS94_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS94_HIGH_ADDR(ALT_EMAC2_ADDR)
11931 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS94_LOW register for the ALT_EMAC2 instance. */
11932 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS94_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS94_LOW_ADDR(ALT_EMAC2_ADDR)
11933 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS95_HIGH register for the ALT_EMAC2 instance. */
11934 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS95_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS95_HIGH_ADDR(ALT_EMAC2_ADDR)
11935 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS95_LOW register for the ALT_EMAC2 instance. */
11936 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS95_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS95_LOW_ADDR(ALT_EMAC2_ADDR)
11937 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS96_HIGH register for the ALT_EMAC2 instance. */
11938 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS96_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS96_HIGH_ADDR(ALT_EMAC2_ADDR)
11939 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS96_LOW register for the ALT_EMAC2 instance. */
11940 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS96_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS96_LOW_ADDR(ALT_EMAC2_ADDR)
11941 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS97_HIGH register for the ALT_EMAC2 instance. */
11942 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS97_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS97_HIGH_ADDR(ALT_EMAC2_ADDR)
11943 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS97_LOW register for the ALT_EMAC2 instance. */
11944 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS97_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS97_LOW_ADDR(ALT_EMAC2_ADDR)
11945 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS98_HIGH register for the ALT_EMAC2 instance. */
11946 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS98_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS98_HIGH_ADDR(ALT_EMAC2_ADDR)
11947 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS98_LOW register for the ALT_EMAC2 instance. */
11948 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS98_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS98_LOW_ADDR(ALT_EMAC2_ADDR)
11949 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS99_HIGH register for the ALT_EMAC2 instance. */
11950 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS99_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS99_HIGH_ADDR(ALT_EMAC2_ADDR)
11951 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS99_LOW register for the ALT_EMAC2 instance. */
11952 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS99_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS99_LOW_ADDR(ALT_EMAC2_ADDR)
11953 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS100_HIGH register for the ALT_EMAC2 instance. */
11954 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS100_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS100_HIGH_ADDR(ALT_EMAC2_ADDR)
11955 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS100_LOW register for the ALT_EMAC2 instance. */
11956 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS100_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS100_LOW_ADDR(ALT_EMAC2_ADDR)
11957 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS101_HIGH register for the ALT_EMAC2 instance. */
11958 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS101_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS101_HIGH_ADDR(ALT_EMAC2_ADDR)
11959 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS101_LOW register for the ALT_EMAC2 instance. */
11960 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS101_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS101_LOW_ADDR(ALT_EMAC2_ADDR)
11961 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS102_HIGH register for the ALT_EMAC2 instance. */
11962 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS102_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS102_HIGH_ADDR(ALT_EMAC2_ADDR)
11963 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS102_LOW register for the ALT_EMAC2 instance. */
11964 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS102_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS102_LOW_ADDR(ALT_EMAC2_ADDR)
11965 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS103_HIGH register for the ALT_EMAC2 instance. */
11966 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS103_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS103_HIGH_ADDR(ALT_EMAC2_ADDR)
11967 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS103_LOW register for the ALT_EMAC2 instance. */
11968 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS103_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS103_LOW_ADDR(ALT_EMAC2_ADDR)
11969 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS104_HIGH register for the ALT_EMAC2 instance. */
11970 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS104_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS104_HIGH_ADDR(ALT_EMAC2_ADDR)
11971 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS104_LOW register for the ALT_EMAC2 instance. */
11972 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS104_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS104_LOW_ADDR(ALT_EMAC2_ADDR)
11973 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS105_HIGH register for the ALT_EMAC2 instance. */
11974 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS105_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS105_HIGH_ADDR(ALT_EMAC2_ADDR)
11975 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS105_LOW register for the ALT_EMAC2 instance. */
11976 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS105_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS105_LOW_ADDR(ALT_EMAC2_ADDR)
11977 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS106_HIGH register for the ALT_EMAC2 instance. */
11978 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS106_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS106_HIGH_ADDR(ALT_EMAC2_ADDR)
11979 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS106_LOW register for the ALT_EMAC2 instance. */
11980 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS106_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS106_LOW_ADDR(ALT_EMAC2_ADDR)
11981 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS107_HIGH register for the ALT_EMAC2 instance. */
11982 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS107_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS107_HIGH_ADDR(ALT_EMAC2_ADDR)
11983 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS107_LOW register for the ALT_EMAC2 instance. */
11984 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS107_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS107_LOW_ADDR(ALT_EMAC2_ADDR)
11985 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS108_HIGH register for the ALT_EMAC2 instance. */
11986 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS108_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS108_HIGH_ADDR(ALT_EMAC2_ADDR)
11987 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS108_LOW register for the ALT_EMAC2 instance. */
11988 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS108_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS108_LOW_ADDR(ALT_EMAC2_ADDR)
11989 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS109_HIGH register for the ALT_EMAC2 instance. */
11990 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS109_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS109_HIGH_ADDR(ALT_EMAC2_ADDR)
11991 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS109_LOW register for the ALT_EMAC2 instance. */
11992 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS109_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS109_LOW_ADDR(ALT_EMAC2_ADDR)
11993 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS110_HIGH register for the ALT_EMAC2 instance. */
11994 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS110_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS110_HIGH_ADDR(ALT_EMAC2_ADDR)
11995 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS110_LOW register for the ALT_EMAC2 instance. */
11996 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS110_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS110_LOW_ADDR(ALT_EMAC2_ADDR)
11997 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS111_HIGH register for the ALT_EMAC2 instance. */
11998 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS111_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS111_HIGH_ADDR(ALT_EMAC2_ADDR)
11999 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS111_LOW register for the ALT_EMAC2 instance. */
12000 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS111_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS111_LOW_ADDR(ALT_EMAC2_ADDR)
12001 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS112_HIGH register for the ALT_EMAC2 instance. */
12002 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS112_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS112_HIGH_ADDR(ALT_EMAC2_ADDR)
12003 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS112_LOW register for the ALT_EMAC2 instance. */
12004 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS112_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS112_LOW_ADDR(ALT_EMAC2_ADDR)
12005 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS113_HIGH register for the ALT_EMAC2 instance. */
12006 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS113_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS113_HIGH_ADDR(ALT_EMAC2_ADDR)
12007 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS113_LOW register for the ALT_EMAC2 instance. */
12008 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS113_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS113_LOW_ADDR(ALT_EMAC2_ADDR)
12009 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS114_HIGH register for the ALT_EMAC2 instance. */
12010 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS114_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS114_HIGH_ADDR(ALT_EMAC2_ADDR)
12011 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS114_LOW register for the ALT_EMAC2 instance. */
12012 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS114_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS114_LOW_ADDR(ALT_EMAC2_ADDR)
12013 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS115_HIGH register for the ALT_EMAC2 instance. */
12014 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS115_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS115_HIGH_ADDR(ALT_EMAC2_ADDR)
12015 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS115_LOW register for the ALT_EMAC2 instance. */
12016 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS115_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS115_LOW_ADDR(ALT_EMAC2_ADDR)
12017 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS116_HIGH register for the ALT_EMAC2 instance. */
12018 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS116_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS116_HIGH_ADDR(ALT_EMAC2_ADDR)
12019 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS116_LOW register for the ALT_EMAC2 instance. */
12020 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS116_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS116_LOW_ADDR(ALT_EMAC2_ADDR)
12021 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS117_HIGH register for the ALT_EMAC2 instance. */
12022 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS117_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS117_HIGH_ADDR(ALT_EMAC2_ADDR)
12023 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS117_LOW register for the ALT_EMAC2 instance. */
12024 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS117_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS117_LOW_ADDR(ALT_EMAC2_ADDR)
12025 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS118_HIGH register for the ALT_EMAC2 instance. */
12026 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS118_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS118_HIGH_ADDR(ALT_EMAC2_ADDR)
12027 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS118_LOW register for the ALT_EMAC2 instance. */
12028 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS118_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS118_LOW_ADDR(ALT_EMAC2_ADDR)
12029 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS119_HIGH register for the ALT_EMAC2 instance. */
12030 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS119_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS119_HIGH_ADDR(ALT_EMAC2_ADDR)
12031 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS119_LOW register for the ALT_EMAC2 instance. */
12032 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS119_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS119_LOW_ADDR(ALT_EMAC2_ADDR)
12033 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS120_HIGH register for the ALT_EMAC2 instance. */
12034 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS120_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS120_HIGH_ADDR(ALT_EMAC2_ADDR)
12035 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS120_LOW register for the ALT_EMAC2 instance. */
12036 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS120_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS120_LOW_ADDR(ALT_EMAC2_ADDR)
12037 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS121_HIGH register for the ALT_EMAC2 instance. */
12038 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS121_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS121_HIGH_ADDR(ALT_EMAC2_ADDR)
12039 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS121_LOW register for the ALT_EMAC2 instance. */
12040 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS121_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS121_LOW_ADDR(ALT_EMAC2_ADDR)
12041 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS122_HIGH register for the ALT_EMAC2 instance. */
12042 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS122_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS122_HIGH_ADDR(ALT_EMAC2_ADDR)
12043 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS122_LOW register for the ALT_EMAC2 instance. */
12044 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS122_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS122_LOW_ADDR(ALT_EMAC2_ADDR)
12045 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS123_HIGH register for the ALT_EMAC2 instance. */
12046 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS123_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS123_HIGH_ADDR(ALT_EMAC2_ADDR)
12047 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS123_LOW register for the ALT_EMAC2 instance. */
12048 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS123_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS123_LOW_ADDR(ALT_EMAC2_ADDR)
12049 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS124_HIGH register for the ALT_EMAC2 instance. */
12050 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS124_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS124_HIGH_ADDR(ALT_EMAC2_ADDR)
12051 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS124_LOW register for the ALT_EMAC2 instance. */
12052 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS124_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS124_LOW_ADDR(ALT_EMAC2_ADDR)
12053 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS125_HIGH register for the ALT_EMAC2 instance. */
12054 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS125_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS125_HIGH_ADDR(ALT_EMAC2_ADDR)
12055 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS125_LOW register for the ALT_EMAC2 instance. */
12056 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS125_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS125_LOW_ADDR(ALT_EMAC2_ADDR)
12057 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS126_HIGH register for the ALT_EMAC2 instance. */
12058 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS126_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS126_HIGH_ADDR(ALT_EMAC2_ADDR)
12059 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS126_LOW register for the ALT_EMAC2 instance. */
12060 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS126_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS126_LOW_ADDR(ALT_EMAC2_ADDR)
12061 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS127_HIGH register for the ALT_EMAC2 instance. */
12062 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS127_HIGH_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS127_HIGH_ADDR(ALT_EMAC2_ADDR)
12063 /* The address of the ALT_EMAC_GMACGRP_MAC_ADDRESS127_LOW register for the ALT_EMAC2 instance. */
12064 #define ALT_EMAC2_GMACGRP_MAC_ADDRESS127_LOW_ADDR ALT_EMAC_GMACGRP_MAC_ADDRESS127_LOW_ADDR(ALT_EMAC2_ADDR)
12065 /* The address of the ALT_EMAC_DMAGRP_BUS_MODE register for the ALT_EMAC2 instance. */
12066 #define ALT_EMAC2_DMAGRP_BUS_MODE_ADDR ALT_EMAC_DMAGRP_BUS_MODE_ADDR(ALT_EMAC2_ADDR)
12067 /* The address of the ALT_EMAC_DMAGRP_TRANSMIT_POLL_DEMAND register for the ALT_EMAC2 instance. */
12068 #define ALT_EMAC2_DMAGRP_TRANSMIT_POLL_DEMAND_ADDR ALT_EMAC_DMAGRP_TRANSMIT_POLL_DEMAND_ADDR(ALT_EMAC2_ADDR)
12069 /* The address of the ALT_EMAC_DMAGRP_RECEIVE_POLL_DEMAND register for the ALT_EMAC2 instance. */
12070 #define ALT_EMAC2_DMAGRP_RECEIVE_POLL_DEMAND_ADDR ALT_EMAC_DMAGRP_RECEIVE_POLL_DEMAND_ADDR(ALT_EMAC2_ADDR)
12071 /* The address of the ALT_EMAC_DMAGRP_RECEIVE_DESCRIPTOR_LIST_ADDRESS register for the ALT_EMAC2 instance. */
12072 #define ALT_EMAC2_DMAGRP_RECEIVE_DESCRIPTOR_LIST_ADDRESS_ADDR ALT_EMAC_DMAGRP_RECEIVE_DESCRIPTOR_LIST_ADDRESS_ADDR(ALT_EMAC2_ADDR)
12073 /* The address of the ALT_EMAC_DMAGRP_TRANSMIT_DESCRIPTOR_LIST_ADDRESS register for the ALT_EMAC2 instance. */
12074 #define ALT_EMAC2_DMAGRP_TRANSMIT_DESCRIPTOR_LIST_ADDRESS_ADDR ALT_EMAC_DMAGRP_TRANSMIT_DESCRIPTOR_LIST_ADDRESS_ADDR(ALT_EMAC2_ADDR)
12075 /* The address of the ALT_EMAC_DMAGRP_STATUS register for the ALT_EMAC2 instance. */
12076 #define ALT_EMAC2_DMAGRP_STATUS_ADDR ALT_EMAC_DMAGRP_STATUS_ADDR(ALT_EMAC2_ADDR)
12077 /* The address of the ALT_EMAC_DMAGRP_OPERATION_MODE register for the ALT_EMAC2 instance. */
12078 #define ALT_EMAC2_DMAGRP_OPERATION_MODE_ADDR ALT_EMAC_DMAGRP_OPERATION_MODE_ADDR(ALT_EMAC2_ADDR)
12079 /* The address of the ALT_EMAC_DMAGRP_INTERRUPT_ENABLE register for the ALT_EMAC2 instance. */
12080 #define ALT_EMAC2_DMAGRP_INTERRUPT_ENABLE_ADDR ALT_EMAC_DMAGRP_INTERRUPT_ENABLE_ADDR(ALT_EMAC2_ADDR)
12081 /* The address of the ALT_EMAC_DMAGRP_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER register for the ALT_EMAC2 instance. */
12082 #define ALT_EMAC2_DMAGRP_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_ADDR ALT_EMAC_DMAGRP_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_ADDR(ALT_EMAC2_ADDR)
12083 /* The address of the ALT_EMAC_DMAGRP_RECEIVE_INTERRUPT_WATCHDOG_TIMER register for the ALT_EMAC2 instance. */
12084 #define ALT_EMAC2_DMAGRP_RECEIVE_INTERRUPT_WATCHDOG_TIMER_ADDR ALT_EMAC_DMAGRP_RECEIVE_INTERRUPT_WATCHDOG_TIMER_ADDR(ALT_EMAC2_ADDR)
12085 /* The address of the ALT_EMAC_DMAGRP_AXI_BUS_MODE register for the ALT_EMAC2 instance. */
12086 #define ALT_EMAC2_DMAGRP_AXI_BUS_MODE_ADDR ALT_EMAC_DMAGRP_AXI_BUS_MODE_ADDR(ALT_EMAC2_ADDR)
12087 /* The address of the ALT_EMAC_DMAGRP_AHB_OR_AXI_STATUS register for the ALT_EMAC2 instance. */
12088 #define ALT_EMAC2_DMAGRP_AHB_OR_AXI_STATUS_ADDR ALT_EMAC_DMAGRP_AHB_OR_AXI_STATUS_ADDR(ALT_EMAC2_ADDR)
12089 /* The address of the ALT_EMAC_DMAGRP_CURRENT_HOST_TRANSMIT_DESCRIPTOR register for the ALT_EMAC2 instance. */
12090 #define ALT_EMAC2_DMAGRP_CURRENT_HOST_TRANSMIT_DESCRIPTOR_ADDR ALT_EMAC_DMAGRP_CURRENT_HOST_TRANSMIT_DESCRIPTOR_ADDR(ALT_EMAC2_ADDR)
12091 /* The address of the ALT_EMAC_DMAGRP_CURRENT_HOST_RECEIVE_DESCRIPTOR register for the ALT_EMAC2 instance. */
12092 #define ALT_EMAC2_DMAGRP_CURRENT_HOST_RECEIVE_DESCRIPTOR_ADDR ALT_EMAC_DMAGRP_CURRENT_HOST_RECEIVE_DESCRIPTOR_ADDR(ALT_EMAC2_ADDR)
12093 /* The address of the ALT_EMAC_DMAGRP_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS register for the ALT_EMAC2 instance. */
12094 #define ALT_EMAC2_DMAGRP_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_ADDR ALT_EMAC_DMAGRP_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_ADDR(ALT_EMAC2_ADDR)
12095 /* The address of the ALT_EMAC_DMAGRP_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS register for the ALT_EMAC2 instance. */
12096 #define ALT_EMAC2_DMAGRP_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_ADDR ALT_EMAC_DMAGRP_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_ADDR(ALT_EMAC2_ADDR)
12097 /* The address of the ALT_EMAC_DMAGRP_HW_FEATURE register for the ALT_EMAC2 instance. */
12098 #define ALT_EMAC2_DMAGRP_HW_FEATURE_ADDR ALT_EMAC_DMAGRP_HW_FEATURE_ADDR(ALT_EMAC2_ADDR)
12099 /* The base address byte offset for the start of the ALT_EMAC2 component. */
12100 #define ALT_EMAC2_OFST 0xff804000
12101 /* The start address of the ALT_EMAC2 component. */
12102 #define ALT_EMAC2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_EMAC2_OFST))
12103 /* The lower bound address range of the ALT_EMAC2 component. */
12104 #define ALT_EMAC2_LB_ADDR ALT_EMAC2_ADDR
12105 /* The upper bound address range of the ALT_EMAC2 component. */
12106 #define ALT_EMAC2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC2_ADDR) + 0x105c) - 1))
12107 
12108 
12109 /*
12110  * Component Instance : hps_sdmmc
12111  *
12112  * Instance hps_sdmmc of component ALT_SDMMC.
12113  *
12114  *
12115  */
12116 /* The address of the ALT_SDMMC_CTRL register for the ALT_HPS_SDMMC instance. */
12117 #define ALT_HPS_SDMMC_CTRL_ADDR ALT_SDMMC_CTRL_ADDR(ALT_HPS_SDMMC_ADDR)
12118 /* The address of the ALT_SDMMC_PWREN register for the ALT_HPS_SDMMC instance. */
12119 #define ALT_HPS_SDMMC_PWREN_ADDR ALT_SDMMC_PWREN_ADDR(ALT_HPS_SDMMC_ADDR)
12120 /* The address of the ALT_SDMMC_CLKDIV register for the ALT_HPS_SDMMC instance. */
12121 #define ALT_HPS_SDMMC_CLKDIV_ADDR ALT_SDMMC_CLKDIV_ADDR(ALT_HPS_SDMMC_ADDR)
12122 /* The address of the ALT_SDMMC_CLKSRC register for the ALT_HPS_SDMMC instance. */
12123 #define ALT_HPS_SDMMC_CLKSRC_ADDR ALT_SDMMC_CLKSRC_ADDR(ALT_HPS_SDMMC_ADDR)
12124 /* The address of the ALT_SDMMC_CLKENA register for the ALT_HPS_SDMMC instance. */
12125 #define ALT_HPS_SDMMC_CLKENA_ADDR ALT_SDMMC_CLKENA_ADDR(ALT_HPS_SDMMC_ADDR)
12126 /* The address of the ALT_SDMMC_TMOUT register for the ALT_HPS_SDMMC instance. */
12127 #define ALT_HPS_SDMMC_TMOUT_ADDR ALT_SDMMC_TMOUT_ADDR(ALT_HPS_SDMMC_ADDR)
12128 /* The address of the ALT_SDMMC_CTYPE register for the ALT_HPS_SDMMC instance. */
12129 #define ALT_HPS_SDMMC_CTYPE_ADDR ALT_SDMMC_CTYPE_ADDR(ALT_HPS_SDMMC_ADDR)
12130 /* The address of the ALT_SDMMC_BLKSIZ register for the ALT_HPS_SDMMC instance. */
12131 #define ALT_HPS_SDMMC_BLKSIZ_ADDR ALT_SDMMC_BLKSIZ_ADDR(ALT_HPS_SDMMC_ADDR)
12132 /* The address of the ALT_SDMMC_BYTCNT register for the ALT_HPS_SDMMC instance. */
12133 #define ALT_HPS_SDMMC_BYTCNT_ADDR ALT_SDMMC_BYTCNT_ADDR(ALT_HPS_SDMMC_ADDR)
12134 /* The address of the ALT_SDMMC_INTMASK register for the ALT_HPS_SDMMC instance. */
12135 #define ALT_HPS_SDMMC_INTMASK_ADDR ALT_SDMMC_INTMASK_ADDR(ALT_HPS_SDMMC_ADDR)
12136 /* The address of the ALT_SDMMC_CMDARG register for the ALT_HPS_SDMMC instance. */
12137 #define ALT_HPS_SDMMC_CMDARG_ADDR ALT_SDMMC_CMDARG_ADDR(ALT_HPS_SDMMC_ADDR)
12138 /* The address of the ALT_SDMMC_CMD register for the ALT_HPS_SDMMC instance. */
12139 #define ALT_HPS_SDMMC_CMD_ADDR ALT_SDMMC_CMD_ADDR(ALT_HPS_SDMMC_ADDR)
12140 /* The address of the ALT_SDMMC_RESP0 register for the ALT_HPS_SDMMC instance. */
12141 #define ALT_HPS_SDMMC_RESP0_ADDR ALT_SDMMC_RESP0_ADDR(ALT_HPS_SDMMC_ADDR)
12142 /* The address of the ALT_SDMMC_RESP1 register for the ALT_HPS_SDMMC instance. */
12143 #define ALT_HPS_SDMMC_RESP1_ADDR ALT_SDMMC_RESP1_ADDR(ALT_HPS_SDMMC_ADDR)
12144 /* The address of the ALT_SDMMC_RESP2 register for the ALT_HPS_SDMMC instance. */
12145 #define ALT_HPS_SDMMC_RESP2_ADDR ALT_SDMMC_RESP2_ADDR(ALT_HPS_SDMMC_ADDR)
12146 /* The address of the ALT_SDMMC_RESP3 register for the ALT_HPS_SDMMC instance. */
12147 #define ALT_HPS_SDMMC_RESP3_ADDR ALT_SDMMC_RESP3_ADDR(ALT_HPS_SDMMC_ADDR)
12148 /* The address of the ALT_SDMMC_MINTSTS register for the ALT_HPS_SDMMC instance. */
12149 #define ALT_HPS_SDMMC_MINTSTS_ADDR ALT_SDMMC_MINTSTS_ADDR(ALT_HPS_SDMMC_ADDR)
12150 /* The address of the ALT_SDMMC_RINTSTS register for the ALT_HPS_SDMMC instance. */
12151 #define ALT_HPS_SDMMC_RINTSTS_ADDR ALT_SDMMC_RINTSTS_ADDR(ALT_HPS_SDMMC_ADDR)
12152 /* The address of the ALT_SDMMC_STATUS register for the ALT_HPS_SDMMC instance. */
12153 #define ALT_HPS_SDMMC_STATUS_ADDR ALT_SDMMC_STATUS_ADDR(ALT_HPS_SDMMC_ADDR)
12154 /* The address of the ALT_SDMMC_FIFOTH register for the ALT_HPS_SDMMC instance. */
12155 #define ALT_HPS_SDMMC_FIFOTH_ADDR ALT_SDMMC_FIFOTH_ADDR(ALT_HPS_SDMMC_ADDR)
12156 /* The address of the ALT_SDMMC_CDETECT register for the ALT_HPS_SDMMC instance. */
12157 #define ALT_HPS_SDMMC_CDETECT_ADDR ALT_SDMMC_CDETECT_ADDR(ALT_HPS_SDMMC_ADDR)
12158 /* The address of the ALT_SDMMC_WRTPRT register for the ALT_HPS_SDMMC instance. */
12159 #define ALT_HPS_SDMMC_WRTPRT_ADDR ALT_SDMMC_WRTPRT_ADDR(ALT_HPS_SDMMC_ADDR)
12160 /* The address of the ALT_SDMMC_GPIO register for the ALT_HPS_SDMMC instance. */
12161 #define ALT_HPS_SDMMC_GPIO_ADDR ALT_SDMMC_GPIO_ADDR(ALT_HPS_SDMMC_ADDR)
12162 /* The address of the ALT_SDMMC_TCBCNT register for the ALT_HPS_SDMMC instance. */
12163 #define ALT_HPS_SDMMC_TCBCNT_ADDR ALT_SDMMC_TCBCNT_ADDR(ALT_HPS_SDMMC_ADDR)
12164 /* The address of the ALT_SDMMC_TBBCNT register for the ALT_HPS_SDMMC instance. */
12165 #define ALT_HPS_SDMMC_TBBCNT_ADDR ALT_SDMMC_TBBCNT_ADDR(ALT_HPS_SDMMC_ADDR)
12166 /* The address of the ALT_SDMMC_DEBNCE register for the ALT_HPS_SDMMC instance. */
12167 #define ALT_HPS_SDMMC_DEBNCE_ADDR ALT_SDMMC_DEBNCE_ADDR(ALT_HPS_SDMMC_ADDR)
12168 /* The address of the ALT_SDMMC_USRID register for the ALT_HPS_SDMMC instance. */
12169 #define ALT_HPS_SDMMC_USRID_ADDR ALT_SDMMC_USRID_ADDR(ALT_HPS_SDMMC_ADDR)
12170 /* The address of the ALT_SDMMC_VERID register for the ALT_HPS_SDMMC instance. */
12171 #define ALT_HPS_SDMMC_VERID_ADDR ALT_SDMMC_VERID_ADDR(ALT_HPS_SDMMC_ADDR)
12172 /* The address of the ALT_SDMMC_HCON register for the ALT_HPS_SDMMC instance. */
12173 #define ALT_HPS_SDMMC_HCON_ADDR ALT_SDMMC_HCON_ADDR(ALT_HPS_SDMMC_ADDR)
12174 /* The address of the ALT_SDMMC_UHS_REG register for the ALT_HPS_SDMMC instance. */
12175 #define ALT_HPS_SDMMC_UHS_REG_ADDR ALT_SDMMC_UHS_REG_ADDR(ALT_HPS_SDMMC_ADDR)
12176 /* The address of the ALT_SDMMC_RST_N register for the ALT_HPS_SDMMC instance. */
12177 #define ALT_HPS_SDMMC_RST_N_ADDR ALT_SDMMC_RST_N_ADDR(ALT_HPS_SDMMC_ADDR)
12178 /* The address of the ALT_SDMMC_BMOD register for the ALT_HPS_SDMMC instance. */
12179 #define ALT_HPS_SDMMC_BMOD_ADDR ALT_SDMMC_BMOD_ADDR(ALT_HPS_SDMMC_ADDR)
12180 /* The address of the ALT_SDMMC_PLDMND register for the ALT_HPS_SDMMC instance. */
12181 #define ALT_HPS_SDMMC_PLDMND_ADDR ALT_SDMMC_PLDMND_ADDR(ALT_HPS_SDMMC_ADDR)
12182 /* The address of the ALT_SDMMC_DBADDR register for the ALT_HPS_SDMMC instance. */
12183 #define ALT_HPS_SDMMC_DBADDR_ADDR ALT_SDMMC_DBADDR_ADDR(ALT_HPS_SDMMC_ADDR)
12184 /* The address of the ALT_SDMMC_IDSTS register for the ALT_HPS_SDMMC instance. */
12185 #define ALT_HPS_SDMMC_IDSTS_ADDR ALT_SDMMC_IDSTS_ADDR(ALT_HPS_SDMMC_ADDR)
12186 /* The address of the ALT_SDMMC_IDINTEN register for the ALT_HPS_SDMMC instance. */
12187 #define ALT_HPS_SDMMC_IDINTEN_ADDR ALT_SDMMC_IDINTEN_ADDR(ALT_HPS_SDMMC_ADDR)
12188 /* The address of the ALT_SDMMC_DSCADDR register for the ALT_HPS_SDMMC instance. */
12189 #define ALT_HPS_SDMMC_DSCADDR_ADDR ALT_SDMMC_DSCADDR_ADDR(ALT_HPS_SDMMC_ADDR)
12190 /* The address of the ALT_SDMMC_BUFADDR register for the ALT_HPS_SDMMC instance. */
12191 #define ALT_HPS_SDMMC_BUFADDR_ADDR ALT_SDMMC_BUFADDR_ADDR(ALT_HPS_SDMMC_ADDR)
12192 /* The address of the ALT_SDMMC_CARDTHRCTL register for the ALT_HPS_SDMMC instance. */
12193 #define ALT_HPS_SDMMC_CARDTHRCTL_ADDR ALT_SDMMC_CARDTHRCTL_ADDR(ALT_HPS_SDMMC_ADDR)
12194 /* The address of the ALT_SDMMC_BACK_END_POWER_R register for the ALT_HPS_SDMMC instance. */
12195 #define ALT_HPS_SDMMC_BACK_END_POWER_R_ADDR ALT_SDMMC_BACK_END_POWER_R_ADDR(ALT_HPS_SDMMC_ADDR)
12196 /* The address of the ALT_SDMMC_UHS_REG_EXT register for the ALT_HPS_SDMMC instance. */
12197 #define ALT_HPS_SDMMC_UHS_REG_EXT_ADDR ALT_SDMMC_UHS_REG_EXT_ADDR(ALT_HPS_SDMMC_ADDR)
12198 /* The address of the ALT_SDMMC_EMMC_DDR_REG register for the ALT_HPS_SDMMC instance. */
12199 #define ALT_HPS_SDMMC_EMMC_DDR_REG_ADDR ALT_SDMMC_EMMC_DDR_REG_ADDR(ALT_HPS_SDMMC_ADDR)
12200 /* The address of the ALT_SDMMC_ENABLE_SHIFT register for the ALT_HPS_SDMMC instance. */
12201 #define ALT_HPS_SDMMC_ENABLE_SHIFT_ADDR ALT_SDMMC_ENABLE_SHIFT_ADDR(ALT_HPS_SDMMC_ADDR)
12202 /* The address of the SDMMC_DATA register for the ALT_HPS_SDMMC instance. */
12203 #define ALT_HPS_SDMMC_DATA_ADDR SDMMC_DATA_ADDR(ALT_HPS_SDMMC_ADDR)
12204 /* The base address byte offset for the start of the ALT_HPS_SDMMC component. */
12205 #define ALT_HPS_SDMMC_OFST 0xff808000
12206 /* The start address of the ALT_HPS_SDMMC component. */
12207 #define ALT_HPS_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_HPS_SDMMC_OFST))
12208 /* The lower bound address range of the ALT_HPS_SDMMC component. */
12209 #define ALT_HPS_SDMMC_LB_ADDR ALT_HPS_SDMMC_ADDR
12210 /* The upper bound address range of the ALT_HPS_SDMMC component. */
12211 #define ALT_HPS_SDMMC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_HPS_SDMMC_ADDR) + 0x400) - 1))
12212 
12213 
12214 /*
12215  * Component Instance : ecc_emac0_rx
12216  *
12217  * Instance ecc_emac0_rx of component ALT_ECC.
12218  *
12219  *
12220  */
12221 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_ECC_EMAC0_RX instance. */
12222 #define ALT_ECC_EMAC0_RX_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12223 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_ECC_EMAC0_RX instance. */
12224 #define ALT_ECC_EMAC0_RX_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12225 /* The address of the ALT_ECC_CTRL register for the ALT_ECC_EMAC0_RX instance. */
12226 #define ALT_ECC_EMAC0_RX_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12227 /* The address of the ALT_ECC_INITSTAT register for the ALT_ECC_EMAC0_RX instance. */
12228 #define ALT_ECC_EMAC0_RX_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12229 /* The address of the ALT_ECC_ERRINTEN register for the ALT_ECC_EMAC0_RX instance. */
12230 #define ALT_ECC_EMAC0_RX_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12231 /* The address of the ALT_ECC_ERRINTENS register for the ALT_ECC_EMAC0_RX instance. */
12232 #define ALT_ECC_EMAC0_RX_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12233 /* The address of the ALT_ECC_ERRINTENR register for the ALT_ECC_EMAC0_RX instance. */
12234 #define ALT_ECC_EMAC0_RX_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12235 /* The address of the ALT_ECC_INTMODE register for the ALT_ECC_EMAC0_RX instance. */
12236 #define ALT_ECC_EMAC0_RX_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12237 /* The address of the ALT_ECC_INTSTAT register for the ALT_ECC_EMAC0_RX instance. */
12238 #define ALT_ECC_EMAC0_RX_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12239 /* The address of the ALT_ECC_INTTEST register for the ALT_ECC_EMAC0_RX instance. */
12240 #define ALT_ECC_EMAC0_RX_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12241 /* The address of the ALT_ECC_MODSTAT register for the ALT_ECC_EMAC0_RX instance. */
12242 #define ALT_ECC_EMAC0_RX_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12243 /* The address of the ALT_ECC_DERRADDRA register for the ALT_ECC_EMAC0_RX instance. */
12244 #define ALT_ECC_EMAC0_RX_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12245 /* The address of the ALT_ECC_SERRADDRA register for the ALT_ECC_EMAC0_RX instance. */
12246 #define ALT_ECC_EMAC0_RX_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12247 /* The address of the ALT_ECC_DERRADDRB register for the ALT_ECC_EMAC0_RX instance. */
12248 #define ALT_ECC_EMAC0_RX_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12249 /* The address of the ALT_ECC_SERRADDRB register for the ALT_ECC_EMAC0_RX instance. */
12250 #define ALT_ECC_EMAC0_RX_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12251 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_ECC_EMAC0_RX instance. */
12252 #define ALT_ECC_EMAC0_RX_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12253 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_ECC_EMAC0_RX instance. */
12254 #define ALT_ECC_EMAC0_RX_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12255 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_ECC_EMAC0_RX instance. */
12256 #define ALT_ECC_EMAC0_RX_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12257 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_ECC_EMAC0_RX instance. */
12258 #define ALT_ECC_EMAC0_RX_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12259 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_ECC_EMAC0_RX instance. */
12260 #define ALT_ECC_EMAC0_RX_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12261 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_ECC_EMAC0_RX instance. */
12262 #define ALT_ECC_EMAC0_RX_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12263 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_ECC_EMAC0_RX instance. */
12264 #define ALT_ECC_EMAC0_RX_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12265 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_ECC_EMAC0_RX instance. */
12266 #define ALT_ECC_EMAC0_RX_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12267 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_ECC_EMAC0_RX instance. */
12268 #define ALT_ECC_EMAC0_RX_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12269 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_ECC_EMAC0_RX instance. */
12270 #define ALT_ECC_EMAC0_RX_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12271 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_EMAC0_RX instance. */
12272 #define ALT_ECC_EMAC0_RX_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12273 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_EMAC0_RX instance. */
12274 #define ALT_ECC_EMAC0_RX_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12275 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_EMAC0_RX instance. */
12276 #define ALT_ECC_EMAC0_RX_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12277 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_EMAC0_RX instance. */
12278 #define ALT_ECC_EMAC0_RX_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12279 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_ECC_EMAC0_RX instance. */
12280 #define ALT_ECC_EMAC0_RX_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12281 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_ECC_EMAC0_RX instance. */
12282 #define ALT_ECC_EMAC0_RX_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12283 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_ECC_EMAC0_RX instance. */
12284 #define ALT_ECC_EMAC0_RX_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12285 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_ECC_EMAC0_RX instance. */
12286 #define ALT_ECC_EMAC0_RX_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12287 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_ECC_EMAC0_RX instance. */
12288 #define ALT_ECC_EMAC0_RX_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12289 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_ECC_EMAC0_RX instance. */
12290 #define ALT_ECC_EMAC0_RX_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12291 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_ECC_EMAC0_RX instance. */
12292 #define ALT_ECC_EMAC0_RX_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_ECC_EMAC0_RX_ADDR)
12293 /* The base address byte offset for the start of the ALT_ECC_EMAC0_RX component. */
12294 #define ALT_ECC_EMAC0_RX_OFST 0xff8c0000
12295 /* The start address of the ALT_ECC_EMAC0_RX component. */
12296 #define ALT_ECC_EMAC0_RX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC0_RX_OFST))
12297 /* The lower bound address range of the ALT_ECC_EMAC0_RX component. */
12298 #define ALT_ECC_EMAC0_RX_LB_ADDR ALT_ECC_EMAC0_RX_ADDR
12299 /* The upper bound address range of the ALT_ECC_EMAC0_RX component. */
12300 #define ALT_ECC_EMAC0_RX_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC0_RX_ADDR) + 0x400) - 1))
12301 
12302 
12303 /*
12304  * Component Instance : ecc_emac0_tx
12305  *
12306  * Instance ecc_emac0_tx of component ALT_ECC.
12307  *
12308  *
12309  */
12310 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_ECC_EMAC0_TX instance. */
12311 #define ALT_ECC_EMAC0_TX_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12312 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_ECC_EMAC0_TX instance. */
12313 #define ALT_ECC_EMAC0_TX_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12314 /* The address of the ALT_ECC_CTRL register for the ALT_ECC_EMAC0_TX instance. */
12315 #define ALT_ECC_EMAC0_TX_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12316 /* The address of the ALT_ECC_INITSTAT register for the ALT_ECC_EMAC0_TX instance. */
12317 #define ALT_ECC_EMAC0_TX_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12318 /* The address of the ALT_ECC_ERRINTEN register for the ALT_ECC_EMAC0_TX instance. */
12319 #define ALT_ECC_EMAC0_TX_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12320 /* The address of the ALT_ECC_ERRINTENS register for the ALT_ECC_EMAC0_TX instance. */
12321 #define ALT_ECC_EMAC0_TX_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12322 /* The address of the ALT_ECC_ERRINTENR register for the ALT_ECC_EMAC0_TX instance. */
12323 #define ALT_ECC_EMAC0_TX_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12324 /* The address of the ALT_ECC_INTMODE register for the ALT_ECC_EMAC0_TX instance. */
12325 #define ALT_ECC_EMAC0_TX_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12326 /* The address of the ALT_ECC_INTSTAT register for the ALT_ECC_EMAC0_TX instance. */
12327 #define ALT_ECC_EMAC0_TX_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12328 /* The address of the ALT_ECC_INTTEST register for the ALT_ECC_EMAC0_TX instance. */
12329 #define ALT_ECC_EMAC0_TX_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12330 /* The address of the ALT_ECC_MODSTAT register for the ALT_ECC_EMAC0_TX instance. */
12331 #define ALT_ECC_EMAC0_TX_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12332 /* The address of the ALT_ECC_DERRADDRA register for the ALT_ECC_EMAC0_TX instance. */
12333 #define ALT_ECC_EMAC0_TX_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12334 /* The address of the ALT_ECC_SERRADDRA register for the ALT_ECC_EMAC0_TX instance. */
12335 #define ALT_ECC_EMAC0_TX_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12336 /* The address of the ALT_ECC_DERRADDRB register for the ALT_ECC_EMAC0_TX instance. */
12337 #define ALT_ECC_EMAC0_TX_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12338 /* The address of the ALT_ECC_SERRADDRB register for the ALT_ECC_EMAC0_TX instance. */
12339 #define ALT_ECC_EMAC0_TX_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12340 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_ECC_EMAC0_TX instance. */
12341 #define ALT_ECC_EMAC0_TX_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12342 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_ECC_EMAC0_TX instance. */
12343 #define ALT_ECC_EMAC0_TX_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12344 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_ECC_EMAC0_TX instance. */
12345 #define ALT_ECC_EMAC0_TX_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12346 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_ECC_EMAC0_TX instance. */
12347 #define ALT_ECC_EMAC0_TX_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12348 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_ECC_EMAC0_TX instance. */
12349 #define ALT_ECC_EMAC0_TX_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12350 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_ECC_EMAC0_TX instance. */
12351 #define ALT_ECC_EMAC0_TX_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12352 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_ECC_EMAC0_TX instance. */
12353 #define ALT_ECC_EMAC0_TX_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12354 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_ECC_EMAC0_TX instance. */
12355 #define ALT_ECC_EMAC0_TX_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12356 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_ECC_EMAC0_TX instance. */
12357 #define ALT_ECC_EMAC0_TX_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12358 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_ECC_EMAC0_TX instance. */
12359 #define ALT_ECC_EMAC0_TX_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12360 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_EMAC0_TX instance. */
12361 #define ALT_ECC_EMAC0_TX_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12362 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_EMAC0_TX instance. */
12363 #define ALT_ECC_EMAC0_TX_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12364 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_EMAC0_TX instance. */
12365 #define ALT_ECC_EMAC0_TX_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12366 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_EMAC0_TX instance. */
12367 #define ALT_ECC_EMAC0_TX_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12368 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_ECC_EMAC0_TX instance. */
12369 #define ALT_ECC_EMAC0_TX_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12370 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_ECC_EMAC0_TX instance. */
12371 #define ALT_ECC_EMAC0_TX_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12372 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_ECC_EMAC0_TX instance. */
12373 #define ALT_ECC_EMAC0_TX_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12374 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_ECC_EMAC0_TX instance. */
12375 #define ALT_ECC_EMAC0_TX_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12376 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_ECC_EMAC0_TX instance. */
12377 #define ALT_ECC_EMAC0_TX_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12378 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_ECC_EMAC0_TX instance. */
12379 #define ALT_ECC_EMAC0_TX_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12380 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_ECC_EMAC0_TX instance. */
12381 #define ALT_ECC_EMAC0_TX_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_ECC_EMAC0_TX_ADDR)
12382 /* The base address byte offset for the start of the ALT_ECC_EMAC0_TX component. */
12383 #define ALT_ECC_EMAC0_TX_OFST 0xff8c0400
12384 /* The start address of the ALT_ECC_EMAC0_TX component. */
12385 #define ALT_ECC_EMAC0_TX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC0_TX_OFST))
12386 /* The lower bound address range of the ALT_ECC_EMAC0_TX component. */
12387 #define ALT_ECC_EMAC0_TX_LB_ADDR ALT_ECC_EMAC0_TX_ADDR
12388 /* The upper bound address range of the ALT_ECC_EMAC0_TX component. */
12389 #define ALT_ECC_EMAC0_TX_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC0_TX_ADDR) + 0x400) - 1))
12390 
12391 
12392 /*
12393  * Component Instance : ecc_emac1_rx
12394  *
12395  * Instance ecc_emac1_rx of component ALT_ECC.
12396  *
12397  *
12398  */
12399 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_ECC_EMAC1_RX instance. */
12400 #define ALT_ECC_EMAC1_RX_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12401 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_ECC_EMAC1_RX instance. */
12402 #define ALT_ECC_EMAC1_RX_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12403 /* The address of the ALT_ECC_CTRL register for the ALT_ECC_EMAC1_RX instance. */
12404 #define ALT_ECC_EMAC1_RX_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12405 /* The address of the ALT_ECC_INITSTAT register for the ALT_ECC_EMAC1_RX instance. */
12406 #define ALT_ECC_EMAC1_RX_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12407 /* The address of the ALT_ECC_ERRINTEN register for the ALT_ECC_EMAC1_RX instance. */
12408 #define ALT_ECC_EMAC1_RX_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12409 /* The address of the ALT_ECC_ERRINTENS register for the ALT_ECC_EMAC1_RX instance. */
12410 #define ALT_ECC_EMAC1_RX_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12411 /* The address of the ALT_ECC_ERRINTENR register for the ALT_ECC_EMAC1_RX instance. */
12412 #define ALT_ECC_EMAC1_RX_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12413 /* The address of the ALT_ECC_INTMODE register for the ALT_ECC_EMAC1_RX instance. */
12414 #define ALT_ECC_EMAC1_RX_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12415 /* The address of the ALT_ECC_INTSTAT register for the ALT_ECC_EMAC1_RX instance. */
12416 #define ALT_ECC_EMAC1_RX_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12417 /* The address of the ALT_ECC_INTTEST register for the ALT_ECC_EMAC1_RX instance. */
12418 #define ALT_ECC_EMAC1_RX_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12419 /* The address of the ALT_ECC_MODSTAT register for the ALT_ECC_EMAC1_RX instance. */
12420 #define ALT_ECC_EMAC1_RX_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12421 /* The address of the ALT_ECC_DERRADDRA register for the ALT_ECC_EMAC1_RX instance. */
12422 #define ALT_ECC_EMAC1_RX_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12423 /* The address of the ALT_ECC_SERRADDRA register for the ALT_ECC_EMAC1_RX instance. */
12424 #define ALT_ECC_EMAC1_RX_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12425 /* The address of the ALT_ECC_DERRADDRB register for the ALT_ECC_EMAC1_RX instance. */
12426 #define ALT_ECC_EMAC1_RX_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12427 /* The address of the ALT_ECC_SERRADDRB register for the ALT_ECC_EMAC1_RX instance. */
12428 #define ALT_ECC_EMAC1_RX_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12429 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_ECC_EMAC1_RX instance. */
12430 #define ALT_ECC_EMAC1_RX_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12431 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_ECC_EMAC1_RX instance. */
12432 #define ALT_ECC_EMAC1_RX_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12433 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_ECC_EMAC1_RX instance. */
12434 #define ALT_ECC_EMAC1_RX_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12435 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_ECC_EMAC1_RX instance. */
12436 #define ALT_ECC_EMAC1_RX_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12437 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_ECC_EMAC1_RX instance. */
12438 #define ALT_ECC_EMAC1_RX_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12439 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_ECC_EMAC1_RX instance. */
12440 #define ALT_ECC_EMAC1_RX_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12441 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_ECC_EMAC1_RX instance. */
12442 #define ALT_ECC_EMAC1_RX_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12443 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_ECC_EMAC1_RX instance. */
12444 #define ALT_ECC_EMAC1_RX_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12445 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_ECC_EMAC1_RX instance. */
12446 #define ALT_ECC_EMAC1_RX_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12447 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_ECC_EMAC1_RX instance. */
12448 #define ALT_ECC_EMAC1_RX_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12449 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_EMAC1_RX instance. */
12450 #define ALT_ECC_EMAC1_RX_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12451 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_EMAC1_RX instance. */
12452 #define ALT_ECC_EMAC1_RX_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12453 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_EMAC1_RX instance. */
12454 #define ALT_ECC_EMAC1_RX_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12455 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_EMAC1_RX instance. */
12456 #define ALT_ECC_EMAC1_RX_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12457 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_ECC_EMAC1_RX instance. */
12458 #define ALT_ECC_EMAC1_RX_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12459 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_ECC_EMAC1_RX instance. */
12460 #define ALT_ECC_EMAC1_RX_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12461 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_ECC_EMAC1_RX instance. */
12462 #define ALT_ECC_EMAC1_RX_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12463 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_ECC_EMAC1_RX instance. */
12464 #define ALT_ECC_EMAC1_RX_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12465 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_ECC_EMAC1_RX instance. */
12466 #define ALT_ECC_EMAC1_RX_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12467 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_ECC_EMAC1_RX instance. */
12468 #define ALT_ECC_EMAC1_RX_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12469 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_ECC_EMAC1_RX instance. */
12470 #define ALT_ECC_EMAC1_RX_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_ECC_EMAC1_RX_ADDR)
12471 /* The base address byte offset for the start of the ALT_ECC_EMAC1_RX component. */
12472 #define ALT_ECC_EMAC1_RX_OFST 0xff8c0800
12473 /* The start address of the ALT_ECC_EMAC1_RX component. */
12474 #define ALT_ECC_EMAC1_RX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC1_RX_OFST))
12475 /* The lower bound address range of the ALT_ECC_EMAC1_RX component. */
12476 #define ALT_ECC_EMAC1_RX_LB_ADDR ALT_ECC_EMAC1_RX_ADDR
12477 /* The upper bound address range of the ALT_ECC_EMAC1_RX component. */
12478 #define ALT_ECC_EMAC1_RX_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC1_RX_ADDR) + 0x400) - 1))
12479 
12480 
12481 /*
12482  * Component Instance : ecc_emac1_tx
12483  *
12484  * Instance ecc_emac1_tx of component ALT_ECC.
12485  *
12486  *
12487  */
12488 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_ECC_EMAC1_TX instance. */
12489 #define ALT_ECC_EMAC1_TX_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12490 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_ECC_EMAC1_TX instance. */
12491 #define ALT_ECC_EMAC1_TX_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12492 /* The address of the ALT_ECC_CTRL register for the ALT_ECC_EMAC1_TX instance. */
12493 #define ALT_ECC_EMAC1_TX_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12494 /* The address of the ALT_ECC_INITSTAT register for the ALT_ECC_EMAC1_TX instance. */
12495 #define ALT_ECC_EMAC1_TX_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12496 /* The address of the ALT_ECC_ERRINTEN register for the ALT_ECC_EMAC1_TX instance. */
12497 #define ALT_ECC_EMAC1_TX_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12498 /* The address of the ALT_ECC_ERRINTENS register for the ALT_ECC_EMAC1_TX instance. */
12499 #define ALT_ECC_EMAC1_TX_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12500 /* The address of the ALT_ECC_ERRINTENR register for the ALT_ECC_EMAC1_TX instance. */
12501 #define ALT_ECC_EMAC1_TX_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12502 /* The address of the ALT_ECC_INTMODE register for the ALT_ECC_EMAC1_TX instance. */
12503 #define ALT_ECC_EMAC1_TX_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12504 /* The address of the ALT_ECC_INTSTAT register for the ALT_ECC_EMAC1_TX instance. */
12505 #define ALT_ECC_EMAC1_TX_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12506 /* The address of the ALT_ECC_INTTEST register for the ALT_ECC_EMAC1_TX instance. */
12507 #define ALT_ECC_EMAC1_TX_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12508 /* The address of the ALT_ECC_MODSTAT register for the ALT_ECC_EMAC1_TX instance. */
12509 #define ALT_ECC_EMAC1_TX_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12510 /* The address of the ALT_ECC_DERRADDRA register for the ALT_ECC_EMAC1_TX instance. */
12511 #define ALT_ECC_EMAC1_TX_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12512 /* The address of the ALT_ECC_SERRADDRA register for the ALT_ECC_EMAC1_TX instance. */
12513 #define ALT_ECC_EMAC1_TX_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12514 /* The address of the ALT_ECC_DERRADDRB register for the ALT_ECC_EMAC1_TX instance. */
12515 #define ALT_ECC_EMAC1_TX_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12516 /* The address of the ALT_ECC_SERRADDRB register for the ALT_ECC_EMAC1_TX instance. */
12517 #define ALT_ECC_EMAC1_TX_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12518 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_ECC_EMAC1_TX instance. */
12519 #define ALT_ECC_EMAC1_TX_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12520 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_ECC_EMAC1_TX instance. */
12521 #define ALT_ECC_EMAC1_TX_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12522 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_ECC_EMAC1_TX instance. */
12523 #define ALT_ECC_EMAC1_TX_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12524 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_ECC_EMAC1_TX instance. */
12525 #define ALT_ECC_EMAC1_TX_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12526 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_ECC_EMAC1_TX instance. */
12527 #define ALT_ECC_EMAC1_TX_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12528 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_ECC_EMAC1_TX instance. */
12529 #define ALT_ECC_EMAC1_TX_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12530 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_ECC_EMAC1_TX instance. */
12531 #define ALT_ECC_EMAC1_TX_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12532 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_ECC_EMAC1_TX instance. */
12533 #define ALT_ECC_EMAC1_TX_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12534 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_ECC_EMAC1_TX instance. */
12535 #define ALT_ECC_EMAC1_TX_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12536 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_ECC_EMAC1_TX instance. */
12537 #define ALT_ECC_EMAC1_TX_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12538 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_EMAC1_TX instance. */
12539 #define ALT_ECC_EMAC1_TX_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12540 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_EMAC1_TX instance. */
12541 #define ALT_ECC_EMAC1_TX_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12542 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_EMAC1_TX instance. */
12543 #define ALT_ECC_EMAC1_TX_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12544 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_EMAC1_TX instance. */
12545 #define ALT_ECC_EMAC1_TX_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12546 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_ECC_EMAC1_TX instance. */
12547 #define ALT_ECC_EMAC1_TX_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12548 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_ECC_EMAC1_TX instance. */
12549 #define ALT_ECC_EMAC1_TX_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12550 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_ECC_EMAC1_TX instance. */
12551 #define ALT_ECC_EMAC1_TX_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12552 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_ECC_EMAC1_TX instance. */
12553 #define ALT_ECC_EMAC1_TX_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12554 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_ECC_EMAC1_TX instance. */
12555 #define ALT_ECC_EMAC1_TX_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12556 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_ECC_EMAC1_TX instance. */
12557 #define ALT_ECC_EMAC1_TX_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12558 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_ECC_EMAC1_TX instance. */
12559 #define ALT_ECC_EMAC1_TX_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_ECC_EMAC1_TX_ADDR)
12560 /* The base address byte offset for the start of the ALT_ECC_EMAC1_TX component. */
12561 #define ALT_ECC_EMAC1_TX_OFST 0xff8c0c00
12562 /* The start address of the ALT_ECC_EMAC1_TX component. */
12563 #define ALT_ECC_EMAC1_TX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC1_TX_OFST))
12564 /* The lower bound address range of the ALT_ECC_EMAC1_TX component. */
12565 #define ALT_ECC_EMAC1_TX_LB_ADDR ALT_ECC_EMAC1_TX_ADDR
12566 /* The upper bound address range of the ALT_ECC_EMAC1_TX component. */
12567 #define ALT_ECC_EMAC1_TX_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC1_TX_ADDR) + 0x400) - 1))
12568 
12569 
12570 /*
12571  * Component Instance : ecc_emac2_rx
12572  *
12573  * Instance ecc_emac2_rx of component ALT_ECC.
12574  *
12575  *
12576  */
12577 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_ECC_EMAC2_RX instance. */
12578 #define ALT_ECC_EMAC2_RX_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12579 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_ECC_EMAC2_RX instance. */
12580 #define ALT_ECC_EMAC2_RX_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12581 /* The address of the ALT_ECC_CTRL register for the ALT_ECC_EMAC2_RX instance. */
12582 #define ALT_ECC_EMAC2_RX_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12583 /* The address of the ALT_ECC_INITSTAT register for the ALT_ECC_EMAC2_RX instance. */
12584 #define ALT_ECC_EMAC2_RX_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12585 /* The address of the ALT_ECC_ERRINTEN register for the ALT_ECC_EMAC2_RX instance. */
12586 #define ALT_ECC_EMAC2_RX_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12587 /* The address of the ALT_ECC_ERRINTENS register for the ALT_ECC_EMAC2_RX instance. */
12588 #define ALT_ECC_EMAC2_RX_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12589 /* The address of the ALT_ECC_ERRINTENR register for the ALT_ECC_EMAC2_RX instance. */
12590 #define ALT_ECC_EMAC2_RX_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12591 /* The address of the ALT_ECC_INTMODE register for the ALT_ECC_EMAC2_RX instance. */
12592 #define ALT_ECC_EMAC2_RX_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12593 /* The address of the ALT_ECC_INTSTAT register for the ALT_ECC_EMAC2_RX instance. */
12594 #define ALT_ECC_EMAC2_RX_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12595 /* The address of the ALT_ECC_INTTEST register for the ALT_ECC_EMAC2_RX instance. */
12596 #define ALT_ECC_EMAC2_RX_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12597 /* The address of the ALT_ECC_MODSTAT register for the ALT_ECC_EMAC2_RX instance. */
12598 #define ALT_ECC_EMAC2_RX_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12599 /* The address of the ALT_ECC_DERRADDRA register for the ALT_ECC_EMAC2_RX instance. */
12600 #define ALT_ECC_EMAC2_RX_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12601 /* The address of the ALT_ECC_SERRADDRA register for the ALT_ECC_EMAC2_RX instance. */
12602 #define ALT_ECC_EMAC2_RX_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12603 /* The address of the ALT_ECC_DERRADDRB register for the ALT_ECC_EMAC2_RX instance. */
12604 #define ALT_ECC_EMAC2_RX_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12605 /* The address of the ALT_ECC_SERRADDRB register for the ALT_ECC_EMAC2_RX instance. */
12606 #define ALT_ECC_EMAC2_RX_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12607 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_ECC_EMAC2_RX instance. */
12608 #define ALT_ECC_EMAC2_RX_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12609 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_ECC_EMAC2_RX instance. */
12610 #define ALT_ECC_EMAC2_RX_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12611 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_ECC_EMAC2_RX instance. */
12612 #define ALT_ECC_EMAC2_RX_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12613 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_ECC_EMAC2_RX instance. */
12614 #define ALT_ECC_EMAC2_RX_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12615 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_ECC_EMAC2_RX instance. */
12616 #define ALT_ECC_EMAC2_RX_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12617 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_ECC_EMAC2_RX instance. */
12618 #define ALT_ECC_EMAC2_RX_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12619 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_ECC_EMAC2_RX instance. */
12620 #define ALT_ECC_EMAC2_RX_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12621 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_ECC_EMAC2_RX instance. */
12622 #define ALT_ECC_EMAC2_RX_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12623 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_ECC_EMAC2_RX instance. */
12624 #define ALT_ECC_EMAC2_RX_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12625 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_ECC_EMAC2_RX instance. */
12626 #define ALT_ECC_EMAC2_RX_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12627 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_EMAC2_RX instance. */
12628 #define ALT_ECC_EMAC2_RX_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12629 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_EMAC2_RX instance. */
12630 #define ALT_ECC_EMAC2_RX_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12631 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_EMAC2_RX instance. */
12632 #define ALT_ECC_EMAC2_RX_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12633 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_EMAC2_RX instance. */
12634 #define ALT_ECC_EMAC2_RX_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12635 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_ECC_EMAC2_RX instance. */
12636 #define ALT_ECC_EMAC2_RX_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12637 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_ECC_EMAC2_RX instance. */
12638 #define ALT_ECC_EMAC2_RX_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12639 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_ECC_EMAC2_RX instance. */
12640 #define ALT_ECC_EMAC2_RX_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12641 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_ECC_EMAC2_RX instance. */
12642 #define ALT_ECC_EMAC2_RX_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12643 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_ECC_EMAC2_RX instance. */
12644 #define ALT_ECC_EMAC2_RX_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12645 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_ECC_EMAC2_RX instance. */
12646 #define ALT_ECC_EMAC2_RX_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12647 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_ECC_EMAC2_RX instance. */
12648 #define ALT_ECC_EMAC2_RX_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_ECC_EMAC2_RX_ADDR)
12649 /* The base address byte offset for the start of the ALT_ECC_EMAC2_RX component. */
12650 #define ALT_ECC_EMAC2_RX_OFST 0xff8c1000
12651 /* The start address of the ALT_ECC_EMAC2_RX component. */
12652 #define ALT_ECC_EMAC2_RX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC2_RX_OFST))
12653 /* The lower bound address range of the ALT_ECC_EMAC2_RX component. */
12654 #define ALT_ECC_EMAC2_RX_LB_ADDR ALT_ECC_EMAC2_RX_ADDR
12655 /* The upper bound address range of the ALT_ECC_EMAC2_RX component. */
12656 #define ALT_ECC_EMAC2_RX_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC2_RX_ADDR) + 0x400) - 1))
12657 
12658 
12659 /*
12660  * Component Instance : ecc_emac2_tx
12661  *
12662  * Instance ecc_emac2_tx of component ALT_ECC.
12663  *
12664  *
12665  */
12666 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_ECC_EMAC2_TX instance. */
12667 #define ALT_ECC_EMAC2_TX_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12668 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_ECC_EMAC2_TX instance. */
12669 #define ALT_ECC_EMAC2_TX_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12670 /* The address of the ALT_ECC_CTRL register for the ALT_ECC_EMAC2_TX instance. */
12671 #define ALT_ECC_EMAC2_TX_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12672 /* The address of the ALT_ECC_INITSTAT register for the ALT_ECC_EMAC2_TX instance. */
12673 #define ALT_ECC_EMAC2_TX_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12674 /* The address of the ALT_ECC_ERRINTEN register for the ALT_ECC_EMAC2_TX instance. */
12675 #define ALT_ECC_EMAC2_TX_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12676 /* The address of the ALT_ECC_ERRINTENS register for the ALT_ECC_EMAC2_TX instance. */
12677 #define ALT_ECC_EMAC2_TX_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12678 /* The address of the ALT_ECC_ERRINTENR register for the ALT_ECC_EMAC2_TX instance. */
12679 #define ALT_ECC_EMAC2_TX_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12680 /* The address of the ALT_ECC_INTMODE register for the ALT_ECC_EMAC2_TX instance. */
12681 #define ALT_ECC_EMAC2_TX_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12682 /* The address of the ALT_ECC_INTSTAT register for the ALT_ECC_EMAC2_TX instance. */
12683 #define ALT_ECC_EMAC2_TX_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12684 /* The address of the ALT_ECC_INTTEST register for the ALT_ECC_EMAC2_TX instance. */
12685 #define ALT_ECC_EMAC2_TX_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12686 /* The address of the ALT_ECC_MODSTAT register for the ALT_ECC_EMAC2_TX instance. */
12687 #define ALT_ECC_EMAC2_TX_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12688 /* The address of the ALT_ECC_DERRADDRA register for the ALT_ECC_EMAC2_TX instance. */
12689 #define ALT_ECC_EMAC2_TX_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12690 /* The address of the ALT_ECC_SERRADDRA register for the ALT_ECC_EMAC2_TX instance. */
12691 #define ALT_ECC_EMAC2_TX_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12692 /* The address of the ALT_ECC_DERRADDRB register for the ALT_ECC_EMAC2_TX instance. */
12693 #define ALT_ECC_EMAC2_TX_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12694 /* The address of the ALT_ECC_SERRADDRB register for the ALT_ECC_EMAC2_TX instance. */
12695 #define ALT_ECC_EMAC2_TX_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12696 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_ECC_EMAC2_TX instance. */
12697 #define ALT_ECC_EMAC2_TX_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12698 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_ECC_EMAC2_TX instance. */
12699 #define ALT_ECC_EMAC2_TX_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12700 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_ECC_EMAC2_TX instance. */
12701 #define ALT_ECC_EMAC2_TX_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12702 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_ECC_EMAC2_TX instance. */
12703 #define ALT_ECC_EMAC2_TX_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12704 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_ECC_EMAC2_TX instance. */
12705 #define ALT_ECC_EMAC2_TX_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12706 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_ECC_EMAC2_TX instance. */
12707 #define ALT_ECC_EMAC2_TX_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12708 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_ECC_EMAC2_TX instance. */
12709 #define ALT_ECC_EMAC2_TX_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12710 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_ECC_EMAC2_TX instance. */
12711 #define ALT_ECC_EMAC2_TX_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12712 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_ECC_EMAC2_TX instance. */
12713 #define ALT_ECC_EMAC2_TX_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12714 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_ECC_EMAC2_TX instance. */
12715 #define ALT_ECC_EMAC2_TX_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12716 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_EMAC2_TX instance. */
12717 #define ALT_ECC_EMAC2_TX_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12718 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_EMAC2_TX instance. */
12719 #define ALT_ECC_EMAC2_TX_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12720 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_EMAC2_TX instance. */
12721 #define ALT_ECC_EMAC2_TX_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12722 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_EMAC2_TX instance. */
12723 #define ALT_ECC_EMAC2_TX_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12724 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_ECC_EMAC2_TX instance. */
12725 #define ALT_ECC_EMAC2_TX_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12726 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_ECC_EMAC2_TX instance. */
12727 #define ALT_ECC_EMAC2_TX_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12728 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_ECC_EMAC2_TX instance. */
12729 #define ALT_ECC_EMAC2_TX_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12730 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_ECC_EMAC2_TX instance. */
12731 #define ALT_ECC_EMAC2_TX_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12732 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_ECC_EMAC2_TX instance. */
12733 #define ALT_ECC_EMAC2_TX_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12734 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_ECC_EMAC2_TX instance. */
12735 #define ALT_ECC_EMAC2_TX_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12736 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_ECC_EMAC2_TX instance. */
12737 #define ALT_ECC_EMAC2_TX_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_ECC_EMAC2_TX_ADDR)
12738 /* The base address byte offset for the start of the ALT_ECC_EMAC2_TX component. */
12739 #define ALT_ECC_EMAC2_TX_OFST 0xff8c1400
12740 /* The start address of the ALT_ECC_EMAC2_TX component. */
12741 #define ALT_ECC_EMAC2_TX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC2_TX_OFST))
12742 /* The lower bound address range of the ALT_ECC_EMAC2_TX component. */
12743 #define ALT_ECC_EMAC2_TX_LB_ADDR ALT_ECC_EMAC2_TX_ADDR
12744 /* The upper bound address range of the ALT_ECC_EMAC2_TX component. */
12745 #define ALT_ECC_EMAC2_TX_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC2_TX_ADDR) + 0x400) - 1))
12746 
12747 
12748 /*
12749  * Component Instance : ecc_usbotg0
12750  *
12751  * Instance ecc_usbotg0 of component ALT_ECC.
12752  *
12753  *
12754  */
12755 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_ECC_USBOTG0 instance. */
12756 #define ALT_ECC_USBOTG0_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_ECC_USBOTG0_ADDR)
12757 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_ECC_USBOTG0 instance. */
12758 #define ALT_ECC_USBOTG0_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_ECC_USBOTG0_ADDR)
12759 /* The address of the ALT_ECC_CTRL register for the ALT_ECC_USBOTG0 instance. */
12760 #define ALT_ECC_USBOTG0_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_ECC_USBOTG0_ADDR)
12761 /* The address of the ALT_ECC_INITSTAT register for the ALT_ECC_USBOTG0 instance. */
12762 #define ALT_ECC_USBOTG0_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_ECC_USBOTG0_ADDR)
12763 /* The address of the ALT_ECC_ERRINTEN register for the ALT_ECC_USBOTG0 instance. */
12764 #define ALT_ECC_USBOTG0_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_ECC_USBOTG0_ADDR)
12765 /* The address of the ALT_ECC_ERRINTENS register for the ALT_ECC_USBOTG0 instance. */
12766 #define ALT_ECC_USBOTG0_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_ECC_USBOTG0_ADDR)
12767 /* The address of the ALT_ECC_ERRINTENR register for the ALT_ECC_USBOTG0 instance. */
12768 #define ALT_ECC_USBOTG0_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_ECC_USBOTG0_ADDR)
12769 /* The address of the ALT_ECC_INTMODE register for the ALT_ECC_USBOTG0 instance. */
12770 #define ALT_ECC_USBOTG0_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_ECC_USBOTG0_ADDR)
12771 /* The address of the ALT_ECC_INTSTAT register for the ALT_ECC_USBOTG0 instance. */
12772 #define ALT_ECC_USBOTG0_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_ECC_USBOTG0_ADDR)
12773 /* The address of the ALT_ECC_INTTEST register for the ALT_ECC_USBOTG0 instance. */
12774 #define ALT_ECC_USBOTG0_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_ECC_USBOTG0_ADDR)
12775 /* The address of the ALT_ECC_MODSTAT register for the ALT_ECC_USBOTG0 instance. */
12776 #define ALT_ECC_USBOTG0_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_ECC_USBOTG0_ADDR)
12777 /* The address of the ALT_ECC_DERRADDRA register for the ALT_ECC_USBOTG0 instance. */
12778 #define ALT_ECC_USBOTG0_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_ECC_USBOTG0_ADDR)
12779 /* The address of the ALT_ECC_SERRADDRA register for the ALT_ECC_USBOTG0 instance. */
12780 #define ALT_ECC_USBOTG0_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_ECC_USBOTG0_ADDR)
12781 /* The address of the ALT_ECC_DERRADDRB register for the ALT_ECC_USBOTG0 instance. */
12782 #define ALT_ECC_USBOTG0_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_ECC_USBOTG0_ADDR)
12783 /* The address of the ALT_ECC_SERRADDRB register for the ALT_ECC_USBOTG0 instance. */
12784 #define ALT_ECC_USBOTG0_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_ECC_USBOTG0_ADDR)
12785 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_ECC_USBOTG0 instance. */
12786 #define ALT_ECC_USBOTG0_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_ECC_USBOTG0_ADDR)
12787 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_ECC_USBOTG0 instance. */
12788 #define ALT_ECC_USBOTG0_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12789 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_ECC_USBOTG0 instance. */
12790 #define ALT_ECC_USBOTG0_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12791 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_ECC_USBOTG0 instance. */
12792 #define ALT_ECC_USBOTG0_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12793 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_ECC_USBOTG0 instance. */
12794 #define ALT_ECC_USBOTG0_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12795 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_ECC_USBOTG0 instance. */
12796 #define ALT_ECC_USBOTG0_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12797 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_ECC_USBOTG0 instance. */
12798 #define ALT_ECC_USBOTG0_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12799 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_ECC_USBOTG0 instance. */
12800 #define ALT_ECC_USBOTG0_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12801 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_ECC_USBOTG0 instance. */
12802 #define ALT_ECC_USBOTG0_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12803 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_ECC_USBOTG0 instance. */
12804 #define ALT_ECC_USBOTG0_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12805 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_USBOTG0 instance. */
12806 #define ALT_ECC_USBOTG0_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12807 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_USBOTG0 instance. */
12808 #define ALT_ECC_USBOTG0_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12809 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_USBOTG0 instance. */
12810 #define ALT_ECC_USBOTG0_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12811 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_USBOTG0 instance. */
12812 #define ALT_ECC_USBOTG0_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_ECC_USBOTG0_ADDR)
12813 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_ECC_USBOTG0 instance. */
12814 #define ALT_ECC_USBOTG0_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_ECC_USBOTG0_ADDR)
12815 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_ECC_USBOTG0 instance. */
12816 #define ALT_ECC_USBOTG0_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_ECC_USBOTG0_ADDR)
12817 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_ECC_USBOTG0 instance. */
12818 #define ALT_ECC_USBOTG0_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_ECC_USBOTG0_ADDR)
12819 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_ECC_USBOTG0 instance. */
12820 #define ALT_ECC_USBOTG0_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_ECC_USBOTG0_ADDR)
12821 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_ECC_USBOTG0 instance. */
12822 #define ALT_ECC_USBOTG0_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_ECC_USBOTG0_ADDR)
12823 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_ECC_USBOTG0 instance. */
12824 #define ALT_ECC_USBOTG0_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_ECC_USBOTG0_ADDR)
12825 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_ECC_USBOTG0 instance. */
12826 #define ALT_ECC_USBOTG0_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_ECC_USBOTG0_ADDR)
12827 /* The base address byte offset for the start of the ALT_ECC_USBOTG0 component. */
12828 #define ALT_ECC_USBOTG0_OFST 0xff8c4000
12829 /* The start address of the ALT_ECC_USBOTG0 component. */
12830 #define ALT_ECC_USBOTG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_USBOTG0_OFST))
12831 /* The lower bound address range of the ALT_ECC_USBOTG0 component. */
12832 #define ALT_ECC_USBOTG0_LB_ADDR ALT_ECC_USBOTG0_ADDR
12833 /* The upper bound address range of the ALT_ECC_USBOTG0 component. */
12834 #define ALT_ECC_USBOTG0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_USBOTG0_ADDR) + 0x400) - 1))
12835 
12836 
12837 /*
12838  * Component Instance : ecc_usbotg1
12839  *
12840  * Instance ecc_usbotg1 of component ALT_ECC.
12841  *
12842  *
12843  */
12844 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_ECC_USBOTG1 instance. */
12845 #define ALT_ECC_USBOTG1_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_ECC_USBOTG1_ADDR)
12846 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_ECC_USBOTG1 instance. */
12847 #define ALT_ECC_USBOTG1_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_ECC_USBOTG1_ADDR)
12848 /* The address of the ALT_ECC_CTRL register for the ALT_ECC_USBOTG1 instance. */
12849 #define ALT_ECC_USBOTG1_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_ECC_USBOTG1_ADDR)
12850 /* The address of the ALT_ECC_INITSTAT register for the ALT_ECC_USBOTG1 instance. */
12851 #define ALT_ECC_USBOTG1_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_ECC_USBOTG1_ADDR)
12852 /* The address of the ALT_ECC_ERRINTEN register for the ALT_ECC_USBOTG1 instance. */
12853 #define ALT_ECC_USBOTG1_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_ECC_USBOTG1_ADDR)
12854 /* The address of the ALT_ECC_ERRINTENS register for the ALT_ECC_USBOTG1 instance. */
12855 #define ALT_ECC_USBOTG1_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_ECC_USBOTG1_ADDR)
12856 /* The address of the ALT_ECC_ERRINTENR register for the ALT_ECC_USBOTG1 instance. */
12857 #define ALT_ECC_USBOTG1_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_ECC_USBOTG1_ADDR)
12858 /* The address of the ALT_ECC_INTMODE register for the ALT_ECC_USBOTG1 instance. */
12859 #define ALT_ECC_USBOTG1_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_ECC_USBOTG1_ADDR)
12860 /* The address of the ALT_ECC_INTSTAT register for the ALT_ECC_USBOTG1 instance. */
12861 #define ALT_ECC_USBOTG1_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_ECC_USBOTG1_ADDR)
12862 /* The address of the ALT_ECC_INTTEST register for the ALT_ECC_USBOTG1 instance. */
12863 #define ALT_ECC_USBOTG1_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_ECC_USBOTG1_ADDR)
12864 /* The address of the ALT_ECC_MODSTAT register for the ALT_ECC_USBOTG1 instance. */
12865 #define ALT_ECC_USBOTG1_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_ECC_USBOTG1_ADDR)
12866 /* The address of the ALT_ECC_DERRADDRA register for the ALT_ECC_USBOTG1 instance. */
12867 #define ALT_ECC_USBOTG1_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_ECC_USBOTG1_ADDR)
12868 /* The address of the ALT_ECC_SERRADDRA register for the ALT_ECC_USBOTG1 instance. */
12869 #define ALT_ECC_USBOTG1_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_ECC_USBOTG1_ADDR)
12870 /* The address of the ALT_ECC_DERRADDRB register for the ALT_ECC_USBOTG1 instance. */
12871 #define ALT_ECC_USBOTG1_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_ECC_USBOTG1_ADDR)
12872 /* The address of the ALT_ECC_SERRADDRB register for the ALT_ECC_USBOTG1 instance. */
12873 #define ALT_ECC_USBOTG1_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_ECC_USBOTG1_ADDR)
12874 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_ECC_USBOTG1 instance. */
12875 #define ALT_ECC_USBOTG1_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_ECC_USBOTG1_ADDR)
12876 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_ECC_USBOTG1 instance. */
12877 #define ALT_ECC_USBOTG1_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12878 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_ECC_USBOTG1 instance. */
12879 #define ALT_ECC_USBOTG1_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12880 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_ECC_USBOTG1 instance. */
12881 #define ALT_ECC_USBOTG1_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12882 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_ECC_USBOTG1 instance. */
12883 #define ALT_ECC_USBOTG1_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12884 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_ECC_USBOTG1 instance. */
12885 #define ALT_ECC_USBOTG1_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12886 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_ECC_USBOTG1 instance. */
12887 #define ALT_ECC_USBOTG1_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12888 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_ECC_USBOTG1 instance. */
12889 #define ALT_ECC_USBOTG1_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12890 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_ECC_USBOTG1 instance. */
12891 #define ALT_ECC_USBOTG1_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12892 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_ECC_USBOTG1 instance. */
12893 #define ALT_ECC_USBOTG1_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12894 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_USBOTG1 instance. */
12895 #define ALT_ECC_USBOTG1_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12896 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_USBOTG1 instance. */
12897 #define ALT_ECC_USBOTG1_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12898 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_USBOTG1 instance. */
12899 #define ALT_ECC_USBOTG1_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12900 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_USBOTG1 instance. */
12901 #define ALT_ECC_USBOTG1_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_ECC_USBOTG1_ADDR)
12902 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_ECC_USBOTG1 instance. */
12903 #define ALT_ECC_USBOTG1_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_ECC_USBOTG1_ADDR)
12904 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_ECC_USBOTG1 instance. */
12905 #define ALT_ECC_USBOTG1_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_ECC_USBOTG1_ADDR)
12906 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_ECC_USBOTG1 instance. */
12907 #define ALT_ECC_USBOTG1_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_ECC_USBOTG1_ADDR)
12908 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_ECC_USBOTG1 instance. */
12909 #define ALT_ECC_USBOTG1_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_ECC_USBOTG1_ADDR)
12910 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_ECC_USBOTG1 instance. */
12911 #define ALT_ECC_USBOTG1_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_ECC_USBOTG1_ADDR)
12912 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_ECC_USBOTG1 instance. */
12913 #define ALT_ECC_USBOTG1_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_ECC_USBOTG1_ADDR)
12914 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_ECC_USBOTG1 instance. */
12915 #define ALT_ECC_USBOTG1_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_ECC_USBOTG1_ADDR)
12916 /* The base address byte offset for the start of the ALT_ECC_USBOTG1 component. */
12917 #define ALT_ECC_USBOTG1_OFST 0xff8c4400
12918 /* The start address of the ALT_ECC_USBOTG1 component. */
12919 #define ALT_ECC_USBOTG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_USBOTG1_OFST))
12920 /* The lower bound address range of the ALT_ECC_USBOTG1 component. */
12921 #define ALT_ECC_USBOTG1_LB_ADDR ALT_ECC_USBOTG1_ADDR
12922 /* The upper bound address range of the ALT_ECC_USBOTG1 component. */
12923 #define ALT_ECC_USBOTG1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_USBOTG1_ADDR) + 0x400) - 1))
12924 
12925 
12926 /*
12927  * Component Instance : hps_ecc_nand_e
12928  *
12929  * Instance hps_ecc_nand_e of component ALT_ECC.
12930  *
12931  *
12932  */
12933 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_HPS_ECC_NAND_E instance. */
12934 #define ALT_HPS_ECC_NAND_E_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12935 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_HPS_ECC_NAND_E instance. */
12936 #define ALT_HPS_ECC_NAND_E_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12937 /* The address of the ALT_ECC_CTRL register for the ALT_HPS_ECC_NAND_E instance. */
12938 #define ALT_HPS_ECC_NAND_E_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12939 /* The address of the ALT_ECC_INITSTAT register for the ALT_HPS_ECC_NAND_E instance. */
12940 #define ALT_HPS_ECC_NAND_E_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12941 /* The address of the ALT_ECC_ERRINTEN register for the ALT_HPS_ECC_NAND_E instance. */
12942 #define ALT_HPS_ECC_NAND_E_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12943 /* The address of the ALT_ECC_ERRINTENS register for the ALT_HPS_ECC_NAND_E instance. */
12944 #define ALT_HPS_ECC_NAND_E_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12945 /* The address of the ALT_ECC_ERRINTENR register for the ALT_HPS_ECC_NAND_E instance. */
12946 #define ALT_HPS_ECC_NAND_E_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12947 /* The address of the ALT_ECC_INTMODE register for the ALT_HPS_ECC_NAND_E instance. */
12948 #define ALT_HPS_ECC_NAND_E_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12949 /* The address of the ALT_ECC_INTSTAT register for the ALT_HPS_ECC_NAND_E instance. */
12950 #define ALT_HPS_ECC_NAND_E_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12951 /* The address of the ALT_ECC_INTTEST register for the ALT_HPS_ECC_NAND_E instance. */
12952 #define ALT_HPS_ECC_NAND_E_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12953 /* The address of the ALT_ECC_MODSTAT register for the ALT_HPS_ECC_NAND_E instance. */
12954 #define ALT_HPS_ECC_NAND_E_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12955 /* The address of the ALT_ECC_DERRADDRA register for the ALT_HPS_ECC_NAND_E instance. */
12956 #define ALT_HPS_ECC_NAND_E_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12957 /* The address of the ALT_ECC_SERRADDRA register for the ALT_HPS_ECC_NAND_E instance. */
12958 #define ALT_HPS_ECC_NAND_E_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12959 /* The address of the ALT_ECC_DERRADDRB register for the ALT_HPS_ECC_NAND_E instance. */
12960 #define ALT_HPS_ECC_NAND_E_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12961 /* The address of the ALT_ECC_SERRADDRB register for the ALT_HPS_ECC_NAND_E instance. */
12962 #define ALT_HPS_ECC_NAND_E_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12963 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_HPS_ECC_NAND_E instance. */
12964 #define ALT_HPS_ECC_NAND_E_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12965 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_HPS_ECC_NAND_E instance. */
12966 #define ALT_HPS_ECC_NAND_E_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12967 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_HPS_ECC_NAND_E instance. */
12968 #define ALT_HPS_ECC_NAND_E_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12969 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_HPS_ECC_NAND_E instance. */
12970 #define ALT_HPS_ECC_NAND_E_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12971 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_HPS_ECC_NAND_E instance. */
12972 #define ALT_HPS_ECC_NAND_E_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12973 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_HPS_ECC_NAND_E instance. */
12974 #define ALT_HPS_ECC_NAND_E_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12975 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_HPS_ECC_NAND_E instance. */
12976 #define ALT_HPS_ECC_NAND_E_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12977 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_HPS_ECC_NAND_E instance. */
12978 #define ALT_HPS_ECC_NAND_E_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12979 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_HPS_ECC_NAND_E instance. */
12980 #define ALT_HPS_ECC_NAND_E_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12981 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_HPS_ECC_NAND_E instance. */
12982 #define ALT_HPS_ECC_NAND_E_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12983 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_HPS_ECC_NAND_E instance. */
12984 #define ALT_HPS_ECC_NAND_E_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12985 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_HPS_ECC_NAND_E instance. */
12986 #define ALT_HPS_ECC_NAND_E_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12987 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_HPS_ECC_NAND_E instance. */
12988 #define ALT_HPS_ECC_NAND_E_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12989 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_HPS_ECC_NAND_E instance. */
12990 #define ALT_HPS_ECC_NAND_E_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12991 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_HPS_ECC_NAND_E instance. */
12992 #define ALT_HPS_ECC_NAND_E_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12993 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_HPS_ECC_NAND_E instance. */
12994 #define ALT_HPS_ECC_NAND_E_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12995 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_HPS_ECC_NAND_E instance. */
12996 #define ALT_HPS_ECC_NAND_E_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12997 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_HPS_ECC_NAND_E instance. */
12998 #define ALT_HPS_ECC_NAND_E_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
12999 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_HPS_ECC_NAND_E instance. */
13000 #define ALT_HPS_ECC_NAND_E_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
13001 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_HPS_ECC_NAND_E instance. */
13002 #define ALT_HPS_ECC_NAND_E_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
13003 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_HPS_ECC_NAND_E instance. */
13004 #define ALT_HPS_ECC_NAND_E_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_HPS_ECC_NAND_E_ADDR)
13005 /* The base address byte offset for the start of the ALT_HPS_ECC_NAND_E component. */
13006 #define ALT_HPS_ECC_NAND_E_OFST 0xff8c8000
13007 /* The start address of the ALT_HPS_ECC_NAND_E component. */
13008 #define ALT_HPS_ECC_NAND_E_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_HPS_ECC_NAND_E_OFST))
13009 /* The lower bound address range of the ALT_HPS_ECC_NAND_E component. */
13010 #define ALT_HPS_ECC_NAND_E_LB_ADDR ALT_HPS_ECC_NAND_E_ADDR
13011 /* The upper bound address range of the ALT_HPS_ECC_NAND_E component. */
13012 #define ALT_HPS_ECC_NAND_E_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_HPS_ECC_NAND_E_ADDR) + 0x400) - 1))
13013 
13014 
13015 /*
13016  * Component Instance : hps_ecc_nand_r
13017  *
13018  * Instance hps_ecc_nand_r of component ALT_ECC.
13019  *
13020  *
13021  */
13022 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_HPS_ECC_NAND_R instance. */
13023 #define ALT_HPS_ECC_NAND_R_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13024 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_HPS_ECC_NAND_R instance. */
13025 #define ALT_HPS_ECC_NAND_R_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13026 /* The address of the ALT_ECC_CTRL register for the ALT_HPS_ECC_NAND_R instance. */
13027 #define ALT_HPS_ECC_NAND_R_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13028 /* The address of the ALT_ECC_INITSTAT register for the ALT_HPS_ECC_NAND_R instance. */
13029 #define ALT_HPS_ECC_NAND_R_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13030 /* The address of the ALT_ECC_ERRINTEN register for the ALT_HPS_ECC_NAND_R instance. */
13031 #define ALT_HPS_ECC_NAND_R_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13032 /* The address of the ALT_ECC_ERRINTENS register for the ALT_HPS_ECC_NAND_R instance. */
13033 #define ALT_HPS_ECC_NAND_R_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13034 /* The address of the ALT_ECC_ERRINTENR register for the ALT_HPS_ECC_NAND_R instance. */
13035 #define ALT_HPS_ECC_NAND_R_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13036 /* The address of the ALT_ECC_INTMODE register for the ALT_HPS_ECC_NAND_R instance. */
13037 #define ALT_HPS_ECC_NAND_R_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13038 /* The address of the ALT_ECC_INTSTAT register for the ALT_HPS_ECC_NAND_R instance. */
13039 #define ALT_HPS_ECC_NAND_R_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13040 /* The address of the ALT_ECC_INTTEST register for the ALT_HPS_ECC_NAND_R instance. */
13041 #define ALT_HPS_ECC_NAND_R_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13042 /* The address of the ALT_ECC_MODSTAT register for the ALT_HPS_ECC_NAND_R instance. */
13043 #define ALT_HPS_ECC_NAND_R_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13044 /* The address of the ALT_ECC_DERRADDRA register for the ALT_HPS_ECC_NAND_R instance. */
13045 #define ALT_HPS_ECC_NAND_R_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13046 /* The address of the ALT_ECC_SERRADDRA register for the ALT_HPS_ECC_NAND_R instance. */
13047 #define ALT_HPS_ECC_NAND_R_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13048 /* The address of the ALT_ECC_DERRADDRB register for the ALT_HPS_ECC_NAND_R instance. */
13049 #define ALT_HPS_ECC_NAND_R_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13050 /* The address of the ALT_ECC_SERRADDRB register for the ALT_HPS_ECC_NAND_R instance. */
13051 #define ALT_HPS_ECC_NAND_R_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13052 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_HPS_ECC_NAND_R instance. */
13053 #define ALT_HPS_ECC_NAND_R_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13054 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_HPS_ECC_NAND_R instance. */
13055 #define ALT_HPS_ECC_NAND_R_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13056 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_HPS_ECC_NAND_R instance. */
13057 #define ALT_HPS_ECC_NAND_R_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13058 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_HPS_ECC_NAND_R instance. */
13059 #define ALT_HPS_ECC_NAND_R_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13060 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_HPS_ECC_NAND_R instance. */
13061 #define ALT_HPS_ECC_NAND_R_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13062 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_HPS_ECC_NAND_R instance. */
13063 #define ALT_HPS_ECC_NAND_R_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13064 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_HPS_ECC_NAND_R instance. */
13065 #define ALT_HPS_ECC_NAND_R_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13066 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_HPS_ECC_NAND_R instance. */
13067 #define ALT_HPS_ECC_NAND_R_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13068 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_HPS_ECC_NAND_R instance. */
13069 #define ALT_HPS_ECC_NAND_R_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13070 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_HPS_ECC_NAND_R instance. */
13071 #define ALT_HPS_ECC_NAND_R_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13072 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_HPS_ECC_NAND_R instance. */
13073 #define ALT_HPS_ECC_NAND_R_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13074 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_HPS_ECC_NAND_R instance. */
13075 #define ALT_HPS_ECC_NAND_R_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13076 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_HPS_ECC_NAND_R instance. */
13077 #define ALT_HPS_ECC_NAND_R_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13078 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_HPS_ECC_NAND_R instance. */
13079 #define ALT_HPS_ECC_NAND_R_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13080 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_HPS_ECC_NAND_R instance. */
13081 #define ALT_HPS_ECC_NAND_R_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13082 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_HPS_ECC_NAND_R instance. */
13083 #define ALT_HPS_ECC_NAND_R_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13084 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_HPS_ECC_NAND_R instance. */
13085 #define ALT_HPS_ECC_NAND_R_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13086 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_HPS_ECC_NAND_R instance. */
13087 #define ALT_HPS_ECC_NAND_R_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13088 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_HPS_ECC_NAND_R instance. */
13089 #define ALT_HPS_ECC_NAND_R_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13090 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_HPS_ECC_NAND_R instance. */
13091 #define ALT_HPS_ECC_NAND_R_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13092 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_HPS_ECC_NAND_R instance. */
13093 #define ALT_HPS_ECC_NAND_R_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_HPS_ECC_NAND_R_ADDR)
13094 /* The base address byte offset for the start of the ALT_HPS_ECC_NAND_R component. */
13095 #define ALT_HPS_ECC_NAND_R_OFST 0xff8c8400
13096 /* The start address of the ALT_HPS_ECC_NAND_R component. */
13097 #define ALT_HPS_ECC_NAND_R_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_HPS_ECC_NAND_R_OFST))
13098 /* The lower bound address range of the ALT_HPS_ECC_NAND_R component. */
13099 #define ALT_HPS_ECC_NAND_R_LB_ADDR ALT_HPS_ECC_NAND_R_ADDR
13100 /* The upper bound address range of the ALT_HPS_ECC_NAND_R component. */
13101 #define ALT_HPS_ECC_NAND_R_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_HPS_ECC_NAND_R_ADDR) + 0x400) - 1))
13102 
13103 
13104 /*
13105  * Component Instance : hps_ecc_nand_w
13106  *
13107  * Instance hps_ecc_nand_w of component ALT_ECC.
13108  *
13109  *
13110  */
13111 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_HPS_ECC_NAND_W instance. */
13112 #define ALT_HPS_ECC_NAND_W_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13113 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_HPS_ECC_NAND_W instance. */
13114 #define ALT_HPS_ECC_NAND_W_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13115 /* The address of the ALT_ECC_CTRL register for the ALT_HPS_ECC_NAND_W instance. */
13116 #define ALT_HPS_ECC_NAND_W_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13117 /* The address of the ALT_ECC_INITSTAT register for the ALT_HPS_ECC_NAND_W instance. */
13118 #define ALT_HPS_ECC_NAND_W_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13119 /* The address of the ALT_ECC_ERRINTEN register for the ALT_HPS_ECC_NAND_W instance. */
13120 #define ALT_HPS_ECC_NAND_W_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13121 /* The address of the ALT_ECC_ERRINTENS register for the ALT_HPS_ECC_NAND_W instance. */
13122 #define ALT_HPS_ECC_NAND_W_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13123 /* The address of the ALT_ECC_ERRINTENR register for the ALT_HPS_ECC_NAND_W instance. */
13124 #define ALT_HPS_ECC_NAND_W_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13125 /* The address of the ALT_ECC_INTMODE register for the ALT_HPS_ECC_NAND_W instance. */
13126 #define ALT_HPS_ECC_NAND_W_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13127 /* The address of the ALT_ECC_INTSTAT register for the ALT_HPS_ECC_NAND_W instance. */
13128 #define ALT_HPS_ECC_NAND_W_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13129 /* The address of the ALT_ECC_INTTEST register for the ALT_HPS_ECC_NAND_W instance. */
13130 #define ALT_HPS_ECC_NAND_W_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13131 /* The address of the ALT_ECC_MODSTAT register for the ALT_HPS_ECC_NAND_W instance. */
13132 #define ALT_HPS_ECC_NAND_W_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13133 /* The address of the ALT_ECC_DERRADDRA register for the ALT_HPS_ECC_NAND_W instance. */
13134 #define ALT_HPS_ECC_NAND_W_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13135 /* The address of the ALT_ECC_SERRADDRA register for the ALT_HPS_ECC_NAND_W instance. */
13136 #define ALT_HPS_ECC_NAND_W_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13137 /* The address of the ALT_ECC_DERRADDRB register for the ALT_HPS_ECC_NAND_W instance. */
13138 #define ALT_HPS_ECC_NAND_W_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13139 /* The address of the ALT_ECC_SERRADDRB register for the ALT_HPS_ECC_NAND_W instance. */
13140 #define ALT_HPS_ECC_NAND_W_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13141 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_HPS_ECC_NAND_W instance. */
13142 #define ALT_HPS_ECC_NAND_W_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13143 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_HPS_ECC_NAND_W instance. */
13144 #define ALT_HPS_ECC_NAND_W_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13145 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_HPS_ECC_NAND_W instance. */
13146 #define ALT_HPS_ECC_NAND_W_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13147 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_HPS_ECC_NAND_W instance. */
13148 #define ALT_HPS_ECC_NAND_W_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13149 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_HPS_ECC_NAND_W instance. */
13150 #define ALT_HPS_ECC_NAND_W_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13151 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_HPS_ECC_NAND_W instance. */
13152 #define ALT_HPS_ECC_NAND_W_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13153 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_HPS_ECC_NAND_W instance. */
13154 #define ALT_HPS_ECC_NAND_W_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13155 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_HPS_ECC_NAND_W instance. */
13156 #define ALT_HPS_ECC_NAND_W_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13157 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_HPS_ECC_NAND_W instance. */
13158 #define ALT_HPS_ECC_NAND_W_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13159 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_HPS_ECC_NAND_W instance. */
13160 #define ALT_HPS_ECC_NAND_W_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13161 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_HPS_ECC_NAND_W instance. */
13162 #define ALT_HPS_ECC_NAND_W_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13163 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_HPS_ECC_NAND_W instance. */
13164 #define ALT_HPS_ECC_NAND_W_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13165 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_HPS_ECC_NAND_W instance. */
13166 #define ALT_HPS_ECC_NAND_W_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13167 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_HPS_ECC_NAND_W instance. */
13168 #define ALT_HPS_ECC_NAND_W_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13169 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_HPS_ECC_NAND_W instance. */
13170 #define ALT_HPS_ECC_NAND_W_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13171 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_HPS_ECC_NAND_W instance. */
13172 #define ALT_HPS_ECC_NAND_W_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13173 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_HPS_ECC_NAND_W instance. */
13174 #define ALT_HPS_ECC_NAND_W_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13175 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_HPS_ECC_NAND_W instance. */
13176 #define ALT_HPS_ECC_NAND_W_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13177 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_HPS_ECC_NAND_W instance. */
13178 #define ALT_HPS_ECC_NAND_W_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13179 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_HPS_ECC_NAND_W instance. */
13180 #define ALT_HPS_ECC_NAND_W_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13181 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_HPS_ECC_NAND_W instance. */
13182 #define ALT_HPS_ECC_NAND_W_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_HPS_ECC_NAND_W_ADDR)
13183 /* The base address byte offset for the start of the ALT_HPS_ECC_NAND_W component. */
13184 #define ALT_HPS_ECC_NAND_W_OFST 0xff8c8800
13185 /* The start address of the ALT_HPS_ECC_NAND_W component. */
13186 #define ALT_HPS_ECC_NAND_W_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_HPS_ECC_NAND_W_OFST))
13187 /* The lower bound address range of the ALT_HPS_ECC_NAND_W component. */
13188 #define ALT_HPS_ECC_NAND_W_LB_ADDR ALT_HPS_ECC_NAND_W_ADDR
13189 /* The upper bound address range of the ALT_HPS_ECC_NAND_W component. */
13190 #define ALT_HPS_ECC_NAND_W_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_HPS_ECC_NAND_W_ADDR) + 0x400) - 1))
13191 
13192 
13193 /*
13194  * Component Instance : hps_ecc_sdmmc
13195  *
13196  * Instance hps_ecc_sdmmc of component ALT_ECC.
13197  *
13198  *
13199  */
13200 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_HPS_ECC_SDMMC instance. */
13201 #define ALT_HPS_ECC_SDMMC_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13202 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_HPS_ECC_SDMMC instance. */
13203 #define ALT_HPS_ECC_SDMMC_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13204 /* The address of the ALT_ECC_CTRL register for the ALT_HPS_ECC_SDMMC instance. */
13205 #define ALT_HPS_ECC_SDMMC_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13206 /* The address of the ALT_ECC_INITSTAT register for the ALT_HPS_ECC_SDMMC instance. */
13207 #define ALT_HPS_ECC_SDMMC_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13208 /* The address of the ALT_ECC_ERRINTEN register for the ALT_HPS_ECC_SDMMC instance. */
13209 #define ALT_HPS_ECC_SDMMC_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13210 /* The address of the ALT_ECC_ERRINTENS register for the ALT_HPS_ECC_SDMMC instance. */
13211 #define ALT_HPS_ECC_SDMMC_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13212 /* The address of the ALT_ECC_ERRINTENR register for the ALT_HPS_ECC_SDMMC instance. */
13213 #define ALT_HPS_ECC_SDMMC_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13214 /* The address of the ALT_ECC_INTMODE register for the ALT_HPS_ECC_SDMMC instance. */
13215 #define ALT_HPS_ECC_SDMMC_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13216 /* The address of the ALT_ECC_INTSTAT register for the ALT_HPS_ECC_SDMMC instance. */
13217 #define ALT_HPS_ECC_SDMMC_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13218 /* The address of the ALT_ECC_INTTEST register for the ALT_HPS_ECC_SDMMC instance. */
13219 #define ALT_HPS_ECC_SDMMC_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13220 /* The address of the ALT_ECC_MODSTAT register for the ALT_HPS_ECC_SDMMC instance. */
13221 #define ALT_HPS_ECC_SDMMC_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13222 /* The address of the ALT_ECC_DERRADDRA register for the ALT_HPS_ECC_SDMMC instance. */
13223 #define ALT_HPS_ECC_SDMMC_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13224 /* The address of the ALT_ECC_SERRADDRA register for the ALT_HPS_ECC_SDMMC instance. */
13225 #define ALT_HPS_ECC_SDMMC_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13226 /* The address of the ALT_ECC_DERRADDRB register for the ALT_HPS_ECC_SDMMC instance. */
13227 #define ALT_HPS_ECC_SDMMC_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13228 /* The address of the ALT_ECC_SERRADDRB register for the ALT_HPS_ECC_SDMMC instance. */
13229 #define ALT_HPS_ECC_SDMMC_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13230 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_HPS_ECC_SDMMC instance. */
13231 #define ALT_HPS_ECC_SDMMC_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13232 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_HPS_ECC_SDMMC instance. */
13233 #define ALT_HPS_ECC_SDMMC_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13234 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_HPS_ECC_SDMMC instance. */
13235 #define ALT_HPS_ECC_SDMMC_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13236 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_HPS_ECC_SDMMC instance. */
13237 #define ALT_HPS_ECC_SDMMC_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13238 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_HPS_ECC_SDMMC instance. */
13239 #define ALT_HPS_ECC_SDMMC_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13240 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_HPS_ECC_SDMMC instance. */
13241 #define ALT_HPS_ECC_SDMMC_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13242 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_HPS_ECC_SDMMC instance. */
13243 #define ALT_HPS_ECC_SDMMC_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13244 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_HPS_ECC_SDMMC instance. */
13245 #define ALT_HPS_ECC_SDMMC_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13246 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_HPS_ECC_SDMMC instance. */
13247 #define ALT_HPS_ECC_SDMMC_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13248 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_HPS_ECC_SDMMC instance. */
13249 #define ALT_HPS_ECC_SDMMC_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13250 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_HPS_ECC_SDMMC instance. */
13251 #define ALT_HPS_ECC_SDMMC_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13252 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_HPS_ECC_SDMMC instance. */
13253 #define ALT_HPS_ECC_SDMMC_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13254 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_HPS_ECC_SDMMC instance. */
13255 #define ALT_HPS_ECC_SDMMC_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13256 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_HPS_ECC_SDMMC instance. */
13257 #define ALT_HPS_ECC_SDMMC_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13258 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_HPS_ECC_SDMMC instance. */
13259 #define ALT_HPS_ECC_SDMMC_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13260 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_HPS_ECC_SDMMC instance. */
13261 #define ALT_HPS_ECC_SDMMC_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13262 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_HPS_ECC_SDMMC instance. */
13263 #define ALT_HPS_ECC_SDMMC_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13264 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_HPS_ECC_SDMMC instance. */
13265 #define ALT_HPS_ECC_SDMMC_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13266 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_HPS_ECC_SDMMC instance. */
13267 #define ALT_HPS_ECC_SDMMC_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13268 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_HPS_ECC_SDMMC instance. */
13269 #define ALT_HPS_ECC_SDMMC_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13270 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_HPS_ECC_SDMMC instance. */
13271 #define ALT_HPS_ECC_SDMMC_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_HPS_ECC_SDMMC_ADDR)
13272 /* The base address byte offset for the start of the ALT_HPS_ECC_SDMMC component. */
13273 #define ALT_HPS_ECC_SDMMC_OFST 0xff8c8c00
13274 /* The start address of the ALT_HPS_ECC_SDMMC component. */
13275 #define ALT_HPS_ECC_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_HPS_ECC_SDMMC_OFST))
13276 /* The lower bound address range of the ALT_HPS_ECC_SDMMC component. */
13277 #define ALT_HPS_ECC_SDMMC_LB_ADDR ALT_HPS_ECC_SDMMC_ADDR
13278 /* The upper bound address range of the ALT_HPS_ECC_SDMMC component. */
13279 #define ALT_HPS_ECC_SDMMC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_HPS_ECC_SDMMC_ADDR) + 0x400) - 1))
13280 
13281 
13282 /*
13283  * Component Instance : ecc_dmac
13284  *
13285  * Instance ecc_dmac of component ALT_ECC.
13286  *
13287  *
13288  */
13289 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_ECC_DMAC instance. */
13290 #define ALT_ECC_DMAC_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_ECC_DMAC_ADDR)
13291 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_ECC_DMAC instance. */
13292 #define ALT_ECC_DMAC_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_ECC_DMAC_ADDR)
13293 /* The address of the ALT_ECC_CTRL register for the ALT_ECC_DMAC instance. */
13294 #define ALT_ECC_DMAC_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_ECC_DMAC_ADDR)
13295 /* The address of the ALT_ECC_INITSTAT register for the ALT_ECC_DMAC instance. */
13296 #define ALT_ECC_DMAC_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_ECC_DMAC_ADDR)
13297 /* The address of the ALT_ECC_ERRINTEN register for the ALT_ECC_DMAC instance. */
13298 #define ALT_ECC_DMAC_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_ECC_DMAC_ADDR)
13299 /* The address of the ALT_ECC_ERRINTENS register for the ALT_ECC_DMAC instance. */
13300 #define ALT_ECC_DMAC_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_ECC_DMAC_ADDR)
13301 /* The address of the ALT_ECC_ERRINTENR register for the ALT_ECC_DMAC instance. */
13302 #define ALT_ECC_DMAC_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_ECC_DMAC_ADDR)
13303 /* The address of the ALT_ECC_INTMODE register for the ALT_ECC_DMAC instance. */
13304 #define ALT_ECC_DMAC_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_ECC_DMAC_ADDR)
13305 /* The address of the ALT_ECC_INTSTAT register for the ALT_ECC_DMAC instance. */
13306 #define ALT_ECC_DMAC_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_ECC_DMAC_ADDR)
13307 /* The address of the ALT_ECC_INTTEST register for the ALT_ECC_DMAC instance. */
13308 #define ALT_ECC_DMAC_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_ECC_DMAC_ADDR)
13309 /* The address of the ALT_ECC_MODSTAT register for the ALT_ECC_DMAC instance. */
13310 #define ALT_ECC_DMAC_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_ECC_DMAC_ADDR)
13311 /* The address of the ALT_ECC_DERRADDRA register for the ALT_ECC_DMAC instance. */
13312 #define ALT_ECC_DMAC_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_ECC_DMAC_ADDR)
13313 /* The address of the ALT_ECC_SERRADDRA register for the ALT_ECC_DMAC instance. */
13314 #define ALT_ECC_DMAC_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_ECC_DMAC_ADDR)
13315 /* The address of the ALT_ECC_DERRADDRB register for the ALT_ECC_DMAC instance. */
13316 #define ALT_ECC_DMAC_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_ECC_DMAC_ADDR)
13317 /* The address of the ALT_ECC_SERRADDRB register for the ALT_ECC_DMAC instance. */
13318 #define ALT_ECC_DMAC_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_ECC_DMAC_ADDR)
13319 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_ECC_DMAC instance. */
13320 #define ALT_ECC_DMAC_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_ECC_DMAC_ADDR)
13321 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_ECC_DMAC instance. */
13322 #define ALT_ECC_DMAC_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_ECC_DMAC_ADDR)
13323 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_ECC_DMAC instance. */
13324 #define ALT_ECC_DMAC_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_ECC_DMAC_ADDR)
13325 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_ECC_DMAC instance. */
13326 #define ALT_ECC_DMAC_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_ECC_DMAC_ADDR)
13327 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_ECC_DMAC instance. */
13328 #define ALT_ECC_DMAC_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_ECC_DMAC_ADDR)
13329 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_ECC_DMAC instance. */
13330 #define ALT_ECC_DMAC_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_ECC_DMAC_ADDR)
13331 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_ECC_DMAC instance. */
13332 #define ALT_ECC_DMAC_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_ECC_DMAC_ADDR)
13333 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_ECC_DMAC instance. */
13334 #define ALT_ECC_DMAC_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_ECC_DMAC_ADDR)
13335 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_ECC_DMAC instance. */
13336 #define ALT_ECC_DMAC_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_ECC_DMAC_ADDR)
13337 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_ECC_DMAC instance. */
13338 #define ALT_ECC_DMAC_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_ECC_DMAC_ADDR)
13339 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_DMAC instance. */
13340 #define ALT_ECC_DMAC_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_ECC_DMAC_ADDR)
13341 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_DMAC instance. */
13342 #define ALT_ECC_DMAC_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_ECC_DMAC_ADDR)
13343 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_DMAC instance. */
13344 #define ALT_ECC_DMAC_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_ECC_DMAC_ADDR)
13345 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_DMAC instance. */
13346 #define ALT_ECC_DMAC_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_ECC_DMAC_ADDR)
13347 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_ECC_DMAC instance. */
13348 #define ALT_ECC_DMAC_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_ECC_DMAC_ADDR)
13349 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_ECC_DMAC instance. */
13350 #define ALT_ECC_DMAC_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_ECC_DMAC_ADDR)
13351 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_ECC_DMAC instance. */
13352 #define ALT_ECC_DMAC_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_ECC_DMAC_ADDR)
13353 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_ECC_DMAC instance. */
13354 #define ALT_ECC_DMAC_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_ECC_DMAC_ADDR)
13355 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_ECC_DMAC instance. */
13356 #define ALT_ECC_DMAC_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_ECC_DMAC_ADDR)
13357 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_ECC_DMAC instance. */
13358 #define ALT_ECC_DMAC_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_ECC_DMAC_ADDR)
13359 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_ECC_DMAC instance. */
13360 #define ALT_ECC_DMAC_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_ECC_DMAC_ADDR)
13361 /* The base address byte offset for the start of the ALT_ECC_DMAC component. */
13362 #define ALT_ECC_DMAC_OFST 0xff8c9000
13363 /* The start address of the ALT_ECC_DMAC component. */
13364 #define ALT_ECC_DMAC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_DMAC_OFST))
13365 /* The lower bound address range of the ALT_ECC_DMAC component. */
13366 #define ALT_ECC_DMAC_LB_ADDR ALT_ECC_DMAC_ADDR
13367 /* The upper bound address range of the ALT_ECC_DMAC component. */
13368 #define ALT_ECC_DMAC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + 0x400) - 1))
13369 
13370 
13371 /*
13372  * Component Instance : ecc_aps_ram
13373  *
13374  * Instance ecc_aps_ram of component ALT_ECC.
13375  *
13376  *
13377  */
13378 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_ECC_APS_RAM instance. */
13379 #define ALT_ECC_APS_RAM_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_ECC_APS_RAM_ADDR)
13380 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_ECC_APS_RAM instance. */
13381 #define ALT_ECC_APS_RAM_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_ECC_APS_RAM_ADDR)
13382 /* The address of the ALT_ECC_CTRL register for the ALT_ECC_APS_RAM instance. */
13383 #define ALT_ECC_APS_RAM_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_ECC_APS_RAM_ADDR)
13384 /* The address of the ALT_ECC_INITSTAT register for the ALT_ECC_APS_RAM instance. */
13385 #define ALT_ECC_APS_RAM_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_ECC_APS_RAM_ADDR)
13386 /* The address of the ALT_ECC_ERRINTEN register for the ALT_ECC_APS_RAM instance. */
13387 #define ALT_ECC_APS_RAM_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_ECC_APS_RAM_ADDR)
13388 /* The address of the ALT_ECC_ERRINTENS register for the ALT_ECC_APS_RAM instance. */
13389 #define ALT_ECC_APS_RAM_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_ECC_APS_RAM_ADDR)
13390 /* The address of the ALT_ECC_ERRINTENR register for the ALT_ECC_APS_RAM instance. */
13391 #define ALT_ECC_APS_RAM_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_ECC_APS_RAM_ADDR)
13392 /* The address of the ALT_ECC_INTMODE register for the ALT_ECC_APS_RAM instance. */
13393 #define ALT_ECC_APS_RAM_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_ECC_APS_RAM_ADDR)
13394 /* The address of the ALT_ECC_INTSTAT register for the ALT_ECC_APS_RAM instance. */
13395 #define ALT_ECC_APS_RAM_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_ECC_APS_RAM_ADDR)
13396 /* The address of the ALT_ECC_INTTEST register for the ALT_ECC_APS_RAM instance. */
13397 #define ALT_ECC_APS_RAM_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_ECC_APS_RAM_ADDR)
13398 /* The address of the ALT_ECC_MODSTAT register for the ALT_ECC_APS_RAM instance. */
13399 #define ALT_ECC_APS_RAM_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_ECC_APS_RAM_ADDR)
13400 /* The address of the ALT_ECC_DERRADDRA register for the ALT_ECC_APS_RAM instance. */
13401 #define ALT_ECC_APS_RAM_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_ECC_APS_RAM_ADDR)
13402 /* The address of the ALT_ECC_SERRADDRA register for the ALT_ECC_APS_RAM instance. */
13403 #define ALT_ECC_APS_RAM_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_ECC_APS_RAM_ADDR)
13404 /* The address of the ALT_ECC_DERRADDRB register for the ALT_ECC_APS_RAM instance. */
13405 #define ALT_ECC_APS_RAM_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_ECC_APS_RAM_ADDR)
13406 /* The address of the ALT_ECC_SERRADDRB register for the ALT_ECC_APS_RAM instance. */
13407 #define ALT_ECC_APS_RAM_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_ECC_APS_RAM_ADDR)
13408 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_ECC_APS_RAM instance. */
13409 #define ALT_ECC_APS_RAM_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_ECC_APS_RAM_ADDR)
13410 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_ECC_APS_RAM instance. */
13411 #define ALT_ECC_APS_RAM_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13412 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_ECC_APS_RAM instance. */
13413 #define ALT_ECC_APS_RAM_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13414 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_ECC_APS_RAM instance. */
13415 #define ALT_ECC_APS_RAM_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13416 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_ECC_APS_RAM instance. */
13417 #define ALT_ECC_APS_RAM_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13418 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_ECC_APS_RAM instance. */
13419 #define ALT_ECC_APS_RAM_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13420 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_ECC_APS_RAM instance. */
13421 #define ALT_ECC_APS_RAM_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13422 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_ECC_APS_RAM instance. */
13423 #define ALT_ECC_APS_RAM_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13424 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_ECC_APS_RAM instance. */
13425 #define ALT_ECC_APS_RAM_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13426 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_ECC_APS_RAM instance. */
13427 #define ALT_ECC_APS_RAM_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13428 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_ECC_APS_RAM instance. */
13429 #define ALT_ECC_APS_RAM_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13430 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_ECC_APS_RAM instance. */
13431 #define ALT_ECC_APS_RAM_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13432 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_ECC_APS_RAM instance. */
13433 #define ALT_ECC_APS_RAM_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13434 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_ECC_APS_RAM instance. */
13435 #define ALT_ECC_APS_RAM_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_ECC_APS_RAM_ADDR)
13436 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_ECC_APS_RAM instance. */
13437 #define ALT_ECC_APS_RAM_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_ECC_APS_RAM_ADDR)
13438 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_ECC_APS_RAM instance. */
13439 #define ALT_ECC_APS_RAM_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_ECC_APS_RAM_ADDR)
13440 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_ECC_APS_RAM instance. */
13441 #define ALT_ECC_APS_RAM_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_ECC_APS_RAM_ADDR)
13442 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_ECC_APS_RAM instance. */
13443 #define ALT_ECC_APS_RAM_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_ECC_APS_RAM_ADDR)
13444 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_ECC_APS_RAM instance. */
13445 #define ALT_ECC_APS_RAM_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_ECC_APS_RAM_ADDR)
13446 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_ECC_APS_RAM instance. */
13447 #define ALT_ECC_APS_RAM_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_ECC_APS_RAM_ADDR)
13448 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_ECC_APS_RAM instance. */
13449 #define ALT_ECC_APS_RAM_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_ECC_APS_RAM_ADDR)
13450 /* The base address byte offset for the start of the ALT_ECC_APS_RAM component. */
13451 #define ALT_ECC_APS_RAM_OFST 0xff8cc000
13452 /* The start address of the ALT_ECC_APS_RAM component. */
13453 #define ALT_ECC_APS_RAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_APS_RAM_OFST))
13454 /* The lower bound address range of the ALT_ECC_APS_RAM component. */
13455 #define ALT_ECC_APS_RAM_LB_ADDR ALT_ECC_APS_RAM_ADDR
13456 /* The upper bound address range of the ALT_ECC_APS_RAM component. */
13457 #define ALT_ECC_APS_RAM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_APS_RAM_ADDR) + 0x400) - 1))
13458 
13459 
13460 /*
13461  * Component Instance : sdm_uart
13462  *
13463  * Instance sdm_uart of component ALT_UART.
13464  *
13465  *
13466  */
13467 /* The address of the ALT_UART_RBR register for the ALT_SDM_UART instance. */
13468 #define ALT_SDM_UART_RBR_ADDR ALT_UART_RBR_ADDR(ALT_SDM_UART_ADDR)
13469 /* The address of the ALT_UART_IER register for the ALT_SDM_UART instance. */
13470 #define ALT_SDM_UART_IER_ADDR ALT_UART_IER_ADDR(ALT_SDM_UART_ADDR)
13471 /* The address of the ALT_UART_IIR register for the ALT_SDM_UART instance. */
13472 #define ALT_SDM_UART_IIR_ADDR ALT_UART_IIR_ADDR(ALT_SDM_UART_ADDR)
13473 /* The address of the ALT_UART_LCR register for the ALT_SDM_UART instance. */
13474 #define ALT_SDM_UART_LCR_ADDR ALT_UART_LCR_ADDR(ALT_SDM_UART_ADDR)
13475 /* The address of the ALT_UART_MCR register for the ALT_SDM_UART instance. */
13476 #define ALT_SDM_UART_MCR_ADDR ALT_UART_MCR_ADDR(ALT_SDM_UART_ADDR)
13477 /* The address of the ALT_UART_LSR register for the ALT_SDM_UART instance. */
13478 #define ALT_SDM_UART_LSR_ADDR ALT_UART_LSR_ADDR(ALT_SDM_UART_ADDR)
13479 /* The address of the ALT_UART_MSR register for the ALT_SDM_UART instance. */
13480 #define ALT_SDM_UART_MSR_ADDR ALT_UART_MSR_ADDR(ALT_SDM_UART_ADDR)
13481 /* The address of the ALT_UART_SCR register for the ALT_SDM_UART instance. */
13482 #define ALT_SDM_UART_SCR_ADDR ALT_UART_SCR_ADDR(ALT_SDM_UART_ADDR)
13483 /* The address of the ALT_UART_SRBR0 register for the ALT_SDM_UART instance. */
13484 #define ALT_SDM_UART_SRBR0_ADDR ALT_UART_SRBR0_ADDR(ALT_SDM_UART_ADDR)
13485 /* The address of the ALT_UART_SRBR1 register for the ALT_SDM_UART instance. */
13486 #define ALT_SDM_UART_SRBR1_ADDR ALT_UART_SRBR1_ADDR(ALT_SDM_UART_ADDR)
13487 /* The address of the ALT_UART_SRBR2 register for the ALT_SDM_UART instance. */
13488 #define ALT_SDM_UART_SRBR2_ADDR ALT_UART_SRBR2_ADDR(ALT_SDM_UART_ADDR)
13489 /* The address of the ALT_UART_SRBR3 register for the ALT_SDM_UART instance. */
13490 #define ALT_SDM_UART_SRBR3_ADDR ALT_UART_SRBR3_ADDR(ALT_SDM_UART_ADDR)
13491 /* The address of the ALT_UART_SRBR4 register for the ALT_SDM_UART instance. */
13492 #define ALT_SDM_UART_SRBR4_ADDR ALT_UART_SRBR4_ADDR(ALT_SDM_UART_ADDR)
13493 /* The address of the ALT_UART_SRBR5 register for the ALT_SDM_UART instance. */
13494 #define ALT_SDM_UART_SRBR5_ADDR ALT_UART_SRBR5_ADDR(ALT_SDM_UART_ADDR)
13495 /* The address of the ALT_UART_SRBR6 register for the ALT_SDM_UART instance. */
13496 #define ALT_SDM_UART_SRBR6_ADDR ALT_UART_SRBR6_ADDR(ALT_SDM_UART_ADDR)
13497 /* The address of the ALT_UART_SRBR7 register for the ALT_SDM_UART instance. */
13498 #define ALT_SDM_UART_SRBR7_ADDR ALT_UART_SRBR7_ADDR(ALT_SDM_UART_ADDR)
13499 /* The address of the ALT_UART_SRBR8 register for the ALT_SDM_UART instance. */
13500 #define ALT_SDM_UART_SRBR8_ADDR ALT_UART_SRBR8_ADDR(ALT_SDM_UART_ADDR)
13501 /* The address of the ALT_UART_SRBR9 register for the ALT_SDM_UART instance. */
13502 #define ALT_SDM_UART_SRBR9_ADDR ALT_UART_SRBR9_ADDR(ALT_SDM_UART_ADDR)
13503 /* The address of the ALT_UART_SRBR10 register for the ALT_SDM_UART instance. */
13504 #define ALT_SDM_UART_SRBR10_ADDR ALT_UART_SRBR10_ADDR(ALT_SDM_UART_ADDR)
13505 /* The address of the ALT_UART_SRBR11 register for the ALT_SDM_UART instance. */
13506 #define ALT_SDM_UART_SRBR11_ADDR ALT_UART_SRBR11_ADDR(ALT_SDM_UART_ADDR)
13507 /* The address of the ALT_UART_SRBR12 register for the ALT_SDM_UART instance. */
13508 #define ALT_SDM_UART_SRBR12_ADDR ALT_UART_SRBR12_ADDR(ALT_SDM_UART_ADDR)
13509 /* The address of the ALT_UART_SRBR13 register for the ALT_SDM_UART instance. */
13510 #define ALT_SDM_UART_SRBR13_ADDR ALT_UART_SRBR13_ADDR(ALT_SDM_UART_ADDR)
13511 /* The address of the ALT_UART_SRBR14 register for the ALT_SDM_UART instance. */
13512 #define ALT_SDM_UART_SRBR14_ADDR ALT_UART_SRBR14_ADDR(ALT_SDM_UART_ADDR)
13513 /* The address of the ALT_UART_SRBR15 register for the ALT_SDM_UART instance. */
13514 #define ALT_SDM_UART_SRBR15_ADDR ALT_UART_SRBR15_ADDR(ALT_SDM_UART_ADDR)
13515 /* The address of the ALT_UART_FAR register for the ALT_SDM_UART instance. */
13516 #define ALT_SDM_UART_FAR_ADDR ALT_UART_FAR_ADDR(ALT_SDM_UART_ADDR)
13517 /* The address of the ALT_UART_TFR register for the ALT_SDM_UART instance. */
13518 #define ALT_SDM_UART_TFR_ADDR ALT_UART_TFR_ADDR(ALT_SDM_UART_ADDR)
13519 /* The address of the ALT_UART_RFW register for the ALT_SDM_UART instance. */
13520 #define ALT_SDM_UART_RFW_ADDR ALT_UART_RFW_ADDR(ALT_SDM_UART_ADDR)
13521 /* The address of the ALT_UART_USR register for the ALT_SDM_UART instance. */
13522 #define ALT_SDM_UART_USR_ADDR ALT_UART_USR_ADDR(ALT_SDM_UART_ADDR)
13523 /* The address of the ALT_UART_TFL register for the ALT_SDM_UART instance. */
13524 #define ALT_SDM_UART_TFL_ADDR ALT_UART_TFL_ADDR(ALT_SDM_UART_ADDR)
13525 /* The address of the ALT_UART_RFL register for the ALT_SDM_UART instance. */
13526 #define ALT_SDM_UART_RFL_ADDR ALT_UART_RFL_ADDR(ALT_SDM_UART_ADDR)
13527 /* The address of the ALT_UART_SRR register for the ALT_SDM_UART instance. */
13528 #define ALT_SDM_UART_SRR_ADDR ALT_UART_SRR_ADDR(ALT_SDM_UART_ADDR)
13529 /* The address of the ALT_UART_SRTS register for the ALT_SDM_UART instance. */
13530 #define ALT_SDM_UART_SRTS_ADDR ALT_UART_SRTS_ADDR(ALT_SDM_UART_ADDR)
13531 /* The address of the ALT_UART_SBCR register for the ALT_SDM_UART instance. */
13532 #define ALT_SDM_UART_SBCR_ADDR ALT_UART_SBCR_ADDR(ALT_SDM_UART_ADDR)
13533 /* The address of the ALT_UART_SDMAM register for the ALT_SDM_UART instance. */
13534 #define ALT_SDM_UART_SDMAM_ADDR ALT_UART_SDMAM_ADDR(ALT_SDM_UART_ADDR)
13535 /* The address of the ALT_UART_SFE register for the ALT_SDM_UART instance. */
13536 #define ALT_SDM_UART_SFE_ADDR ALT_UART_SFE_ADDR(ALT_SDM_UART_ADDR)
13537 /* The address of the ALT_UART_SRT register for the ALT_SDM_UART instance. */
13538 #define ALT_SDM_UART_SRT_ADDR ALT_UART_SRT_ADDR(ALT_SDM_UART_ADDR)
13539 /* The address of the ALT_UART_STET register for the ALT_SDM_UART instance. */
13540 #define ALT_SDM_UART_STET_ADDR ALT_UART_STET_ADDR(ALT_SDM_UART_ADDR)
13541 /* The address of the ALT_UART_HTX register for the ALT_SDM_UART instance. */
13542 #define ALT_SDM_UART_HTX_ADDR ALT_UART_HTX_ADDR(ALT_SDM_UART_ADDR)
13543 /* The address of the ALT_UART_DMASA register for the ALT_SDM_UART instance. */
13544 #define ALT_SDM_UART_DMASA_ADDR ALT_UART_DMASA_ADDR(ALT_SDM_UART_ADDR)
13545 /* The address of the ALT_UART_CPR register for the ALT_SDM_UART instance. */
13546 #define ALT_SDM_UART_CPR_ADDR ALT_UART_CPR_ADDR(ALT_SDM_UART_ADDR)
13547 /* The address of the ALT_UART_UCV register for the ALT_SDM_UART instance. */
13548 #define ALT_SDM_UART_UCV_ADDR ALT_UART_UCV_ADDR(ALT_SDM_UART_ADDR)
13549 /* The address of the ALT_UART_CTR register for the ALT_SDM_UART instance. */
13550 #define ALT_SDM_UART_CTR_ADDR ALT_UART_CTR_ADDR(ALT_SDM_UART_ADDR)
13551 /* The base address byte offset for the start of the ALT_SDM_UART component. */
13552 #define ALT_SDM_UART_OFST 0xff8d0000
13553 /* The start address of the ALT_SDM_UART component. */
13554 #define ALT_SDM_UART_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_UART_OFST))
13555 /* The lower bound address range of the ALT_SDM_UART component. */
13556 #define ALT_SDM_UART_LB_ADDR ALT_SDM_UART_ADDR
13557 /* The upper bound address range of the ALT_SDM_UART component. */
13558 #define ALT_SDM_UART_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_UART_ADDR) + 0x100) - 1))
13559 
13560 
13561 /*
13562  * Component Instance : sdm_i2c0
13563  *
13564  * Instance sdm_i2c0 of component ALT_I2C.
13565  *
13566  *
13567  */
13568 /* The address of the ALT_I2C_IC_CON register for the ALT_SDM_I2C0 instance. */
13569 #define ALT_SDM_I2C0_IC_CON_ADDR ALT_I2C_IC_CON_ADDR(ALT_SDM_I2C0_ADDR)
13570 /* The address of the ALT_I2C_IC_TAR register for the ALT_SDM_I2C0 instance. */
13571 #define ALT_SDM_I2C0_IC_TAR_ADDR ALT_I2C_IC_TAR_ADDR(ALT_SDM_I2C0_ADDR)
13572 /* The address of the ALT_I2C_IC_SAR register for the ALT_SDM_I2C0 instance. */
13573 #define ALT_SDM_I2C0_IC_SAR_ADDR ALT_I2C_IC_SAR_ADDR(ALT_SDM_I2C0_ADDR)
13574 /* The address of the ALT_I2C_IC_DATA_CMD register for the ALT_SDM_I2C0 instance. */
13575 #define ALT_SDM_I2C0_IC_DATA_CMD_ADDR ALT_I2C_IC_DATA_CMD_ADDR(ALT_SDM_I2C0_ADDR)
13576 /* The address of the ALT_I2C_IC_SS_SCL_HCNT register for the ALT_SDM_I2C0 instance. */
13577 #define ALT_SDM_I2C0_IC_SS_SCL_HCNT_ADDR ALT_I2C_IC_SS_SCL_HCNT_ADDR(ALT_SDM_I2C0_ADDR)
13578 /* The address of the ALT_I2C_IC_SS_SCL_LCNT register for the ALT_SDM_I2C0 instance. */
13579 #define ALT_SDM_I2C0_IC_SS_SCL_LCNT_ADDR ALT_I2C_IC_SS_SCL_LCNT_ADDR(ALT_SDM_I2C0_ADDR)
13580 /* The address of the ALT_I2C_IC_FS_SCL_HCNT register for the ALT_SDM_I2C0 instance. */
13581 #define ALT_SDM_I2C0_IC_FS_SCL_HCNT_ADDR ALT_I2C_IC_FS_SCL_HCNT_ADDR(ALT_SDM_I2C0_ADDR)
13582 /* The address of the ALT_I2C_IC_FS_SCL_LCNT register for the ALT_SDM_I2C0 instance. */
13583 #define ALT_SDM_I2C0_IC_FS_SCL_LCNT_ADDR ALT_I2C_IC_FS_SCL_LCNT_ADDR(ALT_SDM_I2C0_ADDR)
13584 /* The address of the ALT_I2C_IC_INTR_STAT register for the ALT_SDM_I2C0 instance. */
13585 #define ALT_SDM_I2C0_IC_INTR_STAT_ADDR ALT_I2C_IC_INTR_STAT_ADDR(ALT_SDM_I2C0_ADDR)
13586 /* The address of the ALT_I2C_IC_INTR_MASK register for the ALT_SDM_I2C0 instance. */
13587 #define ALT_SDM_I2C0_IC_INTR_MASK_ADDR ALT_I2C_IC_INTR_MASK_ADDR(ALT_SDM_I2C0_ADDR)
13588 /* The address of the ALT_I2C_IC_RAW_INTR_STAT register for the ALT_SDM_I2C0 instance. */
13589 #define ALT_SDM_I2C0_IC_RAW_INTR_STAT_ADDR ALT_I2C_IC_RAW_INTR_STAT_ADDR(ALT_SDM_I2C0_ADDR)
13590 /* The address of the ALT_I2C_IC_RX_TL register for the ALT_SDM_I2C0 instance. */
13591 #define ALT_SDM_I2C0_IC_RX_TL_ADDR ALT_I2C_IC_RX_TL_ADDR(ALT_SDM_I2C0_ADDR)
13592 /* The address of the ALT_I2C_IC_TX_TL register for the ALT_SDM_I2C0 instance. */
13593 #define ALT_SDM_I2C0_IC_TX_TL_ADDR ALT_I2C_IC_TX_TL_ADDR(ALT_SDM_I2C0_ADDR)
13594 /* The address of the ALT_I2C_IC_CLR_INTR register for the ALT_SDM_I2C0 instance. */
13595 #define ALT_SDM_I2C0_IC_CLR_INTR_ADDR ALT_I2C_IC_CLR_INTR_ADDR(ALT_SDM_I2C0_ADDR)
13596 /* The address of the ALT_I2C_IC_CLR_RX_UNDER register for the ALT_SDM_I2C0 instance. */
13597 #define ALT_SDM_I2C0_IC_CLR_RX_UNDER_ADDR ALT_I2C_IC_CLR_RX_UNDER_ADDR(ALT_SDM_I2C0_ADDR)
13598 /* The address of the ALT_I2C_IC_CLR_RX_OVER register for the ALT_SDM_I2C0 instance. */
13599 #define ALT_SDM_I2C0_IC_CLR_RX_OVER_ADDR ALT_I2C_IC_CLR_RX_OVER_ADDR(ALT_SDM_I2C0_ADDR)
13600 /* The address of the ALT_I2C_IC_CLR_TX_OVER register for the ALT_SDM_I2C0 instance. */
13601 #define ALT_SDM_I2C0_IC_CLR_TX_OVER_ADDR ALT_I2C_IC_CLR_TX_OVER_ADDR(ALT_SDM_I2C0_ADDR)
13602 /* The address of the ALT_I2C_IC_CLR_RD_REQ register for the ALT_SDM_I2C0 instance. */
13603 #define ALT_SDM_I2C0_IC_CLR_RD_REQ_ADDR ALT_I2C_IC_CLR_RD_REQ_ADDR(ALT_SDM_I2C0_ADDR)
13604 /* The address of the ALT_I2C_IC_CLR_TX_ABRT register for the ALT_SDM_I2C0 instance. */
13605 #define ALT_SDM_I2C0_IC_CLR_TX_ABRT_ADDR ALT_I2C_IC_CLR_TX_ABRT_ADDR(ALT_SDM_I2C0_ADDR)
13606 /* The address of the ALT_I2C_IC_CLR_RX_DONE register for the ALT_SDM_I2C0 instance. */
13607 #define ALT_SDM_I2C0_IC_CLR_RX_DONE_ADDR ALT_I2C_IC_CLR_RX_DONE_ADDR(ALT_SDM_I2C0_ADDR)
13608 /* The address of the ALT_I2C_IC_CLR_ACTIVITY register for the ALT_SDM_I2C0 instance. */
13609 #define ALT_SDM_I2C0_IC_CLR_ACTIVITY_ADDR ALT_I2C_IC_CLR_ACTIVITY_ADDR(ALT_SDM_I2C0_ADDR)
13610 /* The address of the ALT_I2C_IC_CLR_STOP_DET register for the ALT_SDM_I2C0 instance. */
13611 #define ALT_SDM_I2C0_IC_CLR_STOP_DET_ADDR ALT_I2C_IC_CLR_STOP_DET_ADDR(ALT_SDM_I2C0_ADDR)
13612 /* The address of the ALT_I2C_IC_CLR_START_DET register for the ALT_SDM_I2C0 instance. */
13613 #define ALT_SDM_I2C0_IC_CLR_START_DET_ADDR ALT_I2C_IC_CLR_START_DET_ADDR(ALT_SDM_I2C0_ADDR)
13614 /* The address of the ALT_I2C_IC_CLR_GEN_CALL register for the ALT_SDM_I2C0 instance. */
13615 #define ALT_SDM_I2C0_IC_CLR_GEN_CALL_ADDR ALT_I2C_IC_CLR_GEN_CALL_ADDR(ALT_SDM_I2C0_ADDR)
13616 /* The address of the ALT_I2C_IC_ENABLE register for the ALT_SDM_I2C0 instance. */
13617 #define ALT_SDM_I2C0_IC_ENABLE_ADDR ALT_I2C_IC_ENABLE_ADDR(ALT_SDM_I2C0_ADDR)
13618 /* The address of the ALT_I2C_IC_STATUS register for the ALT_SDM_I2C0 instance. */
13619 #define ALT_SDM_I2C0_IC_STATUS_ADDR ALT_I2C_IC_STATUS_ADDR(ALT_SDM_I2C0_ADDR)
13620 /* The address of the ALT_I2C_IC_TXFLR register for the ALT_SDM_I2C0 instance. */
13621 #define ALT_SDM_I2C0_IC_TXFLR_ADDR ALT_I2C_IC_TXFLR_ADDR(ALT_SDM_I2C0_ADDR)
13622 /* The address of the ALT_I2C_IC_RXFLR register for the ALT_SDM_I2C0 instance. */
13623 #define ALT_SDM_I2C0_IC_RXFLR_ADDR ALT_I2C_IC_RXFLR_ADDR(ALT_SDM_I2C0_ADDR)
13624 /* The address of the ALT_I2C_IC_SDA_HOLD register for the ALT_SDM_I2C0 instance. */
13625 #define ALT_SDM_I2C0_IC_SDA_HOLD_ADDR ALT_I2C_IC_SDA_HOLD_ADDR(ALT_SDM_I2C0_ADDR)
13626 /* The address of the ALT_I2C_IC_TX_ABRT_SOURCE register for the ALT_SDM_I2C0 instance. */
13627 #define ALT_SDM_I2C0_IC_TX_ABRT_SOURCE_ADDR ALT_I2C_IC_TX_ABRT_SOURCE_ADDR(ALT_SDM_I2C0_ADDR)
13628 /* The address of the ALT_I2C_IC_SLV_DATA_NACK_ONLY register for the ALT_SDM_I2C0 instance. */
13629 #define ALT_SDM_I2C0_IC_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_IC_SLV_DATA_NACK_ONLY_ADDR(ALT_SDM_I2C0_ADDR)
13630 /* The address of the ALT_I2C_IC_DMA_CR register for the ALT_SDM_I2C0 instance. */
13631 #define ALT_SDM_I2C0_IC_DMA_CR_ADDR ALT_I2C_IC_DMA_CR_ADDR(ALT_SDM_I2C0_ADDR)
13632 /* The address of the ALT_I2C_IC_DMA_TDLR register for the ALT_SDM_I2C0 instance. */
13633 #define ALT_SDM_I2C0_IC_DMA_TDLR_ADDR ALT_I2C_IC_DMA_TDLR_ADDR(ALT_SDM_I2C0_ADDR)
13634 /* The address of the ALT_I2C_IC_DMA_RDLR register for the ALT_SDM_I2C0 instance. */
13635 #define ALT_SDM_I2C0_IC_DMA_RDLR_ADDR ALT_I2C_IC_DMA_RDLR_ADDR(ALT_SDM_I2C0_ADDR)
13636 /* The address of the ALT_I2C_IC_SDA_SETUP register for the ALT_SDM_I2C0 instance. */
13637 #define ALT_SDM_I2C0_IC_SDA_SETUP_ADDR ALT_I2C_IC_SDA_SETUP_ADDR(ALT_SDM_I2C0_ADDR)
13638 /* The address of the ALT_I2C_IC_ACK_GENERAL_CALL register for the ALT_SDM_I2C0 instance. */
13639 #define ALT_SDM_I2C0_IC_ACK_GENERAL_CALL_ADDR ALT_I2C_IC_ACK_GENERAL_CALL_ADDR(ALT_SDM_I2C0_ADDR)
13640 /* The address of the ALT_I2C_IC_ENABLE_STATUS register for the ALT_SDM_I2C0 instance. */
13641 #define ALT_SDM_I2C0_IC_ENABLE_STATUS_ADDR ALT_I2C_IC_ENABLE_STATUS_ADDR(ALT_SDM_I2C0_ADDR)
13642 /* The address of the ALT_I2C_IC_FS_SPKLEN register for the ALT_SDM_I2C0 instance. */
13643 #define ALT_SDM_I2C0_IC_FS_SPKLEN_ADDR ALT_I2C_IC_FS_SPKLEN_ADDR(ALT_SDM_I2C0_ADDR)
13644 /* The address of the ALT_I2C_IC_CLR_RESTART_DET register for the ALT_SDM_I2C0 instance. */
13645 #define ALT_SDM_I2C0_IC_CLR_RESTART_DET_ADDR ALT_I2C_IC_CLR_RESTART_DET_ADDR(ALT_SDM_I2C0_ADDR)
13646 /* The address of the ALT_I2C_IC_COMP_PARAM_1 register for the ALT_SDM_I2C0 instance. */
13647 #define ALT_SDM_I2C0_IC_COMP_PARAM_1_ADDR ALT_I2C_IC_COMP_PARAM_1_ADDR(ALT_SDM_I2C0_ADDR)
13648 /* The address of the ALT_I2C_IC_COMP_VERSION register for the ALT_SDM_I2C0 instance. */
13649 #define ALT_SDM_I2C0_IC_COMP_VERSION_ADDR ALT_I2C_IC_COMP_VERSION_ADDR(ALT_SDM_I2C0_ADDR)
13650 /* The address of the ALT_I2C_IC_COMP_TYPE register for the ALT_SDM_I2C0 instance. */
13651 #define ALT_SDM_I2C0_IC_COMP_TYPE_ADDR ALT_I2C_IC_COMP_TYPE_ADDR(ALT_SDM_I2C0_ADDR)
13652 /* The base address byte offset for the start of the ALT_SDM_I2C0 component. */
13653 #define ALT_SDM_I2C0_OFST 0xff8d0100
13654 /* The start address of the ALT_SDM_I2C0 component. */
13655 #define ALT_SDM_I2C0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_I2C0_OFST))
13656 /* The lower bound address range of the ALT_SDM_I2C0 component. */
13657 #define ALT_SDM_I2C0_LB_ADDR ALT_SDM_I2C0_ADDR
13658 /* The upper bound address range of the ALT_SDM_I2C0 component. */
13659 #define ALT_SDM_I2C0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_I2C0_ADDR) + 0x100) - 1))
13660 
13661 
13662 /*
13663  * Component Instance : sdm_i2c1
13664  *
13665  * Instance sdm_i2c1 of component ALT_I2C.
13666  *
13667  *
13668  */
13669 /* The address of the ALT_I2C_IC_CON register for the ALT_SDM_I2C1 instance. */
13670 #define ALT_SDM_I2C1_IC_CON_ADDR ALT_I2C_IC_CON_ADDR(ALT_SDM_I2C1_ADDR)
13671 /* The address of the ALT_I2C_IC_TAR register for the ALT_SDM_I2C1 instance. */
13672 #define ALT_SDM_I2C1_IC_TAR_ADDR ALT_I2C_IC_TAR_ADDR(ALT_SDM_I2C1_ADDR)
13673 /* The address of the ALT_I2C_IC_SAR register for the ALT_SDM_I2C1 instance. */
13674 #define ALT_SDM_I2C1_IC_SAR_ADDR ALT_I2C_IC_SAR_ADDR(ALT_SDM_I2C1_ADDR)
13675 /* The address of the ALT_I2C_IC_DATA_CMD register for the ALT_SDM_I2C1 instance. */
13676 #define ALT_SDM_I2C1_IC_DATA_CMD_ADDR ALT_I2C_IC_DATA_CMD_ADDR(ALT_SDM_I2C1_ADDR)
13677 /* The address of the ALT_I2C_IC_SS_SCL_HCNT register for the ALT_SDM_I2C1 instance. */
13678 #define ALT_SDM_I2C1_IC_SS_SCL_HCNT_ADDR ALT_I2C_IC_SS_SCL_HCNT_ADDR(ALT_SDM_I2C1_ADDR)
13679 /* The address of the ALT_I2C_IC_SS_SCL_LCNT register for the ALT_SDM_I2C1 instance. */
13680 #define ALT_SDM_I2C1_IC_SS_SCL_LCNT_ADDR ALT_I2C_IC_SS_SCL_LCNT_ADDR(ALT_SDM_I2C1_ADDR)
13681 /* The address of the ALT_I2C_IC_FS_SCL_HCNT register for the ALT_SDM_I2C1 instance. */
13682 #define ALT_SDM_I2C1_IC_FS_SCL_HCNT_ADDR ALT_I2C_IC_FS_SCL_HCNT_ADDR(ALT_SDM_I2C1_ADDR)
13683 /* The address of the ALT_I2C_IC_FS_SCL_LCNT register for the ALT_SDM_I2C1 instance. */
13684 #define ALT_SDM_I2C1_IC_FS_SCL_LCNT_ADDR ALT_I2C_IC_FS_SCL_LCNT_ADDR(ALT_SDM_I2C1_ADDR)
13685 /* The address of the ALT_I2C_IC_INTR_STAT register for the ALT_SDM_I2C1 instance. */
13686 #define ALT_SDM_I2C1_IC_INTR_STAT_ADDR ALT_I2C_IC_INTR_STAT_ADDR(ALT_SDM_I2C1_ADDR)
13687 /* The address of the ALT_I2C_IC_INTR_MASK register for the ALT_SDM_I2C1 instance. */
13688 #define ALT_SDM_I2C1_IC_INTR_MASK_ADDR ALT_I2C_IC_INTR_MASK_ADDR(ALT_SDM_I2C1_ADDR)
13689 /* The address of the ALT_I2C_IC_RAW_INTR_STAT register for the ALT_SDM_I2C1 instance. */
13690 #define ALT_SDM_I2C1_IC_RAW_INTR_STAT_ADDR ALT_I2C_IC_RAW_INTR_STAT_ADDR(ALT_SDM_I2C1_ADDR)
13691 /* The address of the ALT_I2C_IC_RX_TL register for the ALT_SDM_I2C1 instance. */
13692 #define ALT_SDM_I2C1_IC_RX_TL_ADDR ALT_I2C_IC_RX_TL_ADDR(ALT_SDM_I2C1_ADDR)
13693 /* The address of the ALT_I2C_IC_TX_TL register for the ALT_SDM_I2C1 instance. */
13694 #define ALT_SDM_I2C1_IC_TX_TL_ADDR ALT_I2C_IC_TX_TL_ADDR(ALT_SDM_I2C1_ADDR)
13695 /* The address of the ALT_I2C_IC_CLR_INTR register for the ALT_SDM_I2C1 instance. */
13696 #define ALT_SDM_I2C1_IC_CLR_INTR_ADDR ALT_I2C_IC_CLR_INTR_ADDR(ALT_SDM_I2C1_ADDR)
13697 /* The address of the ALT_I2C_IC_CLR_RX_UNDER register for the ALT_SDM_I2C1 instance. */
13698 #define ALT_SDM_I2C1_IC_CLR_RX_UNDER_ADDR ALT_I2C_IC_CLR_RX_UNDER_ADDR(ALT_SDM_I2C1_ADDR)
13699 /* The address of the ALT_I2C_IC_CLR_RX_OVER register for the ALT_SDM_I2C1 instance. */
13700 #define ALT_SDM_I2C1_IC_CLR_RX_OVER_ADDR ALT_I2C_IC_CLR_RX_OVER_ADDR(ALT_SDM_I2C1_ADDR)
13701 /* The address of the ALT_I2C_IC_CLR_TX_OVER register for the ALT_SDM_I2C1 instance. */
13702 #define ALT_SDM_I2C1_IC_CLR_TX_OVER_ADDR ALT_I2C_IC_CLR_TX_OVER_ADDR(ALT_SDM_I2C1_ADDR)
13703 /* The address of the ALT_I2C_IC_CLR_RD_REQ register for the ALT_SDM_I2C1 instance. */
13704 #define ALT_SDM_I2C1_IC_CLR_RD_REQ_ADDR ALT_I2C_IC_CLR_RD_REQ_ADDR(ALT_SDM_I2C1_ADDR)
13705 /* The address of the ALT_I2C_IC_CLR_TX_ABRT register for the ALT_SDM_I2C1 instance. */
13706 #define ALT_SDM_I2C1_IC_CLR_TX_ABRT_ADDR ALT_I2C_IC_CLR_TX_ABRT_ADDR(ALT_SDM_I2C1_ADDR)
13707 /* The address of the ALT_I2C_IC_CLR_RX_DONE register for the ALT_SDM_I2C1 instance. */
13708 #define ALT_SDM_I2C1_IC_CLR_RX_DONE_ADDR ALT_I2C_IC_CLR_RX_DONE_ADDR(ALT_SDM_I2C1_ADDR)
13709 /* The address of the ALT_I2C_IC_CLR_ACTIVITY register for the ALT_SDM_I2C1 instance. */
13710 #define ALT_SDM_I2C1_IC_CLR_ACTIVITY_ADDR ALT_I2C_IC_CLR_ACTIVITY_ADDR(ALT_SDM_I2C1_ADDR)
13711 /* The address of the ALT_I2C_IC_CLR_STOP_DET register for the ALT_SDM_I2C1 instance. */
13712 #define ALT_SDM_I2C1_IC_CLR_STOP_DET_ADDR ALT_I2C_IC_CLR_STOP_DET_ADDR(ALT_SDM_I2C1_ADDR)
13713 /* The address of the ALT_I2C_IC_CLR_START_DET register for the ALT_SDM_I2C1 instance. */
13714 #define ALT_SDM_I2C1_IC_CLR_START_DET_ADDR ALT_I2C_IC_CLR_START_DET_ADDR(ALT_SDM_I2C1_ADDR)
13715 /* The address of the ALT_I2C_IC_CLR_GEN_CALL register for the ALT_SDM_I2C1 instance. */
13716 #define ALT_SDM_I2C1_IC_CLR_GEN_CALL_ADDR ALT_I2C_IC_CLR_GEN_CALL_ADDR(ALT_SDM_I2C1_ADDR)
13717 /* The address of the ALT_I2C_IC_ENABLE register for the ALT_SDM_I2C1 instance. */
13718 #define ALT_SDM_I2C1_IC_ENABLE_ADDR ALT_I2C_IC_ENABLE_ADDR(ALT_SDM_I2C1_ADDR)
13719 /* The address of the ALT_I2C_IC_STATUS register for the ALT_SDM_I2C1 instance. */
13720 #define ALT_SDM_I2C1_IC_STATUS_ADDR ALT_I2C_IC_STATUS_ADDR(ALT_SDM_I2C1_ADDR)
13721 /* The address of the ALT_I2C_IC_TXFLR register for the ALT_SDM_I2C1 instance. */
13722 #define ALT_SDM_I2C1_IC_TXFLR_ADDR ALT_I2C_IC_TXFLR_ADDR(ALT_SDM_I2C1_ADDR)
13723 /* The address of the ALT_I2C_IC_RXFLR register for the ALT_SDM_I2C1 instance. */
13724 #define ALT_SDM_I2C1_IC_RXFLR_ADDR ALT_I2C_IC_RXFLR_ADDR(ALT_SDM_I2C1_ADDR)
13725 /* The address of the ALT_I2C_IC_SDA_HOLD register for the ALT_SDM_I2C1 instance. */
13726 #define ALT_SDM_I2C1_IC_SDA_HOLD_ADDR ALT_I2C_IC_SDA_HOLD_ADDR(ALT_SDM_I2C1_ADDR)
13727 /* The address of the ALT_I2C_IC_TX_ABRT_SOURCE register for the ALT_SDM_I2C1 instance. */
13728 #define ALT_SDM_I2C1_IC_TX_ABRT_SOURCE_ADDR ALT_I2C_IC_TX_ABRT_SOURCE_ADDR(ALT_SDM_I2C1_ADDR)
13729 /* The address of the ALT_I2C_IC_SLV_DATA_NACK_ONLY register for the ALT_SDM_I2C1 instance. */
13730 #define ALT_SDM_I2C1_IC_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_IC_SLV_DATA_NACK_ONLY_ADDR(ALT_SDM_I2C1_ADDR)
13731 /* The address of the ALT_I2C_IC_DMA_CR register for the ALT_SDM_I2C1 instance. */
13732 #define ALT_SDM_I2C1_IC_DMA_CR_ADDR ALT_I2C_IC_DMA_CR_ADDR(ALT_SDM_I2C1_ADDR)
13733 /* The address of the ALT_I2C_IC_DMA_TDLR register for the ALT_SDM_I2C1 instance. */
13734 #define ALT_SDM_I2C1_IC_DMA_TDLR_ADDR ALT_I2C_IC_DMA_TDLR_ADDR(ALT_SDM_I2C1_ADDR)
13735 /* The address of the ALT_I2C_IC_DMA_RDLR register for the ALT_SDM_I2C1 instance. */
13736 #define ALT_SDM_I2C1_IC_DMA_RDLR_ADDR ALT_I2C_IC_DMA_RDLR_ADDR(ALT_SDM_I2C1_ADDR)
13737 /* The address of the ALT_I2C_IC_SDA_SETUP register for the ALT_SDM_I2C1 instance. */
13738 #define ALT_SDM_I2C1_IC_SDA_SETUP_ADDR ALT_I2C_IC_SDA_SETUP_ADDR(ALT_SDM_I2C1_ADDR)
13739 /* The address of the ALT_I2C_IC_ACK_GENERAL_CALL register for the ALT_SDM_I2C1 instance. */
13740 #define ALT_SDM_I2C1_IC_ACK_GENERAL_CALL_ADDR ALT_I2C_IC_ACK_GENERAL_CALL_ADDR(ALT_SDM_I2C1_ADDR)
13741 /* The address of the ALT_I2C_IC_ENABLE_STATUS register for the ALT_SDM_I2C1 instance. */
13742 #define ALT_SDM_I2C1_IC_ENABLE_STATUS_ADDR ALT_I2C_IC_ENABLE_STATUS_ADDR(ALT_SDM_I2C1_ADDR)
13743 /* The address of the ALT_I2C_IC_FS_SPKLEN register for the ALT_SDM_I2C1 instance. */
13744 #define ALT_SDM_I2C1_IC_FS_SPKLEN_ADDR ALT_I2C_IC_FS_SPKLEN_ADDR(ALT_SDM_I2C1_ADDR)
13745 /* The address of the ALT_I2C_IC_CLR_RESTART_DET register for the ALT_SDM_I2C1 instance. */
13746 #define ALT_SDM_I2C1_IC_CLR_RESTART_DET_ADDR ALT_I2C_IC_CLR_RESTART_DET_ADDR(ALT_SDM_I2C1_ADDR)
13747 /* The address of the ALT_I2C_IC_SCL_STUCK_AT_LOW_TIMEOUT register for the ALT_SDM_I2C1 instance. */
13748 #define ALT_SDM_I2C1_IC_SCL_STUCK_AT_LOW_TIMEOUT_ADDR ALT_I2C_IC_SCL_STUCK_AT_LOW_TIMEOUT_ADDR(ALT_SDM_I2C1_ADDR)
13749 /* The address of the ALT_I2C_IC_SDA_STUCK_AT_LOW_TIMEOUT register for the ALT_SDM_I2C1 instance. */
13750 #define ALT_SDM_I2C1_IC_SDA_STUCK_AT_LOW_TIMEOUT_ADDR ALT_I2C_IC_SDA_STUCK_AT_LOW_TIMEOUT_ADDR(ALT_SDM_I2C1_ADDR)
13751 /* The address of the ALT_I2C_IC_CLR_SCL_STUCK_DET register for the ALT_SDM_I2C1 instance. */
13752 #define ALT_SDM_I2C1_IC_CLR_SCL_STUCK_DET_ADDR ALT_I2C_IC_CLR_SCL_STUCK_DET_ADDR(ALT_SDM_I2C1_ADDR)
13753 /* The address of the ALT_I2C_IC_SMBUS_CLK_LOW_SEXT register for the ALT_SDM_I2C1 instance. */
13754 #define ALT_SDM_I2C1_IC_SMBUS_CLK_LOW_SEXT_ADDR ALT_I2C_IC_SMBUS_CLK_LOW_SEXT_ADDR(ALT_SDM_I2C1_ADDR)
13755 /* The address of the ALT_I2C_IC_SMBUS_CLK_LOW_MEXT register for the ALT_SDM_I2C1 instance. */
13756 #define ALT_SDM_I2C1_IC_SMBUS_CLK_LOW_MEXT_ADDR ALT_I2C_IC_SMBUS_CLK_LOW_MEXT_ADDR(ALT_SDM_I2C1_ADDR)
13757 /* The address of the ALT_I2C_IC_SMBUS_THIGH_MAX_IDLE_COUNT register for the ALT_SDM_I2C1 instance. */
13758 #define ALT_SDM_I2C1_IC_SMBUS_THIGH_MAX_IDLE_COUNT_ADDR ALT_I2C_IC_SMBUS_THIGH_MAX_IDLE_COUNT_ADDR(ALT_SDM_I2C1_ADDR)
13759 /* The address of the ALT_I2C_IC_SMBUS_INTR_STAT register for the ALT_SDM_I2C1 instance. */
13760 #define ALT_SDM_I2C1_IC_SMBUS_INTR_STAT_ADDR ALT_I2C_IC_SMBUS_INTR_STAT_ADDR(ALT_SDM_I2C1_ADDR)
13761 /* The address of the ALT_I2C_IC_SMBUS_INTR_MASK register for the ALT_SDM_I2C1 instance. */
13762 #define ALT_SDM_I2C1_IC_SMBUS_INTR_MASK_ADDR ALT_I2C_IC_SMBUS_INTR_MASK_ADDR(ALT_SDM_I2C1_ADDR)
13763 /* The address of the ALT_I2C_IC_SMBUS_RAW_INTR_STAT register for the ALT_SDM_I2C1 instance. */
13764 #define ALT_SDM_I2C1_IC_SMBUS_RAW_INTR_STAT_ADDR ALT_I2C_IC_SMBUS_RAW_INTR_STAT_ADDR(ALT_SDM_I2C1_ADDR)
13765 /* The address of the ALT_I2C_IC_CLR_SMBUS_INTR register for the ALT_SDM_I2C1 instance. */
13766 #define ALT_SDM_I2C1_IC_CLR_SMBUS_INTR_ADDR ALT_I2C_IC_CLR_SMBUS_INTR_ADDR(ALT_SDM_I2C1_ADDR)
13767 /* The address of the ALT_I2C_IC_COMP_PARAM_1 register for the ALT_SDM_I2C1 instance. */
13768 #define ALT_SDM_I2C1_IC_COMP_PARAM_1_ADDR ALT_I2C_IC_COMP_PARAM_1_ADDR(ALT_SDM_I2C1_ADDR)
13769 /* The address of the ALT_I2C_IC_COMP_VERSION register for the ALT_SDM_I2C1 instance. */
13770 #define ALT_SDM_I2C1_IC_COMP_VERSION_ADDR ALT_I2C_IC_COMP_VERSION_ADDR(ALT_SDM_I2C1_ADDR)
13771 /* The address of the ALT_I2C_IC_COMP_TYPE register for the ALT_SDM_I2C1 instance. */
13772 #define ALT_SDM_I2C1_IC_COMP_TYPE_ADDR ALT_I2C_IC_COMP_TYPE_ADDR(ALT_SDM_I2C1_ADDR)
13773 /* The base address byte offset for the start of the ALT_SDM_I2C1 component. */
13774 #define ALT_SDM_I2C1_OFST 0xff8d0200
13775 /* The start address of the ALT_SDM_I2C1 component. */
13776 #define ALT_SDM_I2C1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_I2C1_OFST))
13777 /* The lower bound address range of the ALT_SDM_I2C1 component. */
13778 #define ALT_SDM_I2C1_LB_ADDR ALT_SDM_I2C1_ADDR
13779 /* The upper bound address range of the ALT_SDM_I2C1 component. */
13780 #define ALT_SDM_I2C1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_I2C1_ADDR) + 0x100) - 1))
13781 
13782 
13783 /*
13784  * Component Instance : sdm_gpio
13785  *
13786  * Instance sdm_gpio of component ALT_GPIO.
13787  *
13788  *
13789  */
13790 /* The address of the ALT_GPIO_GPIO_SWPORTA_DR register for the ALT_SDM_GPIO instance. */
13791 #define ALT_SDM_GPIO_GPIO_SWPORTA_DR_ADDR ALT_GPIO_GPIO_SWPORTA_DR_ADDR(ALT_SDM_GPIO_ADDR)
13792 /* The address of the ALT_GPIO_GPIO_SWPORTA_DDR register for the ALT_SDM_GPIO instance. */
13793 #define ALT_SDM_GPIO_GPIO_SWPORTA_DDR_ADDR ALT_GPIO_GPIO_SWPORTA_DDR_ADDR(ALT_SDM_GPIO_ADDR)
13794 /* The address of the ALT_GPIO_GPIO_INTEN register for the ALT_SDM_GPIO instance. */
13795 #define ALT_SDM_GPIO_GPIO_INTEN_ADDR ALT_GPIO_GPIO_INTEN_ADDR(ALT_SDM_GPIO_ADDR)
13796 /* The address of the ALT_GPIO_GPIO_INTMASK register for the ALT_SDM_GPIO instance. */
13797 #define ALT_SDM_GPIO_GPIO_INTMASK_ADDR ALT_GPIO_GPIO_INTMASK_ADDR(ALT_SDM_GPIO_ADDR)
13798 /* The address of the ALT_GPIO_GPIO_INTTYPE_LEVEL register for the ALT_SDM_GPIO instance. */
13799 #define ALT_SDM_GPIO_GPIO_INTTYPE_LEVEL_ADDR ALT_GPIO_GPIO_INTTYPE_LEVEL_ADDR(ALT_SDM_GPIO_ADDR)
13800 /* The address of the ALT_GPIO_GPIO_INT_POLARITY register for the ALT_SDM_GPIO instance. */
13801 #define ALT_SDM_GPIO_GPIO_INT_POLARITY_ADDR ALT_GPIO_GPIO_INT_POLARITY_ADDR(ALT_SDM_GPIO_ADDR)
13802 /* The address of the ALT_GPIO_GPIO_INTSTATUS register for the ALT_SDM_GPIO instance. */
13803 #define ALT_SDM_GPIO_GPIO_INTSTATUS_ADDR ALT_GPIO_GPIO_INTSTATUS_ADDR(ALT_SDM_GPIO_ADDR)
13804 /* The address of the ALT_GPIO_GPIO_RAW_INTSTATUS register for the ALT_SDM_GPIO instance. */
13805 #define ALT_SDM_GPIO_GPIO_RAW_INTSTATUS_ADDR ALT_GPIO_GPIO_RAW_INTSTATUS_ADDR(ALT_SDM_GPIO_ADDR)
13806 /* The address of the ALT_GPIO_GPIO_DEBOUNCE register for the ALT_SDM_GPIO instance. */
13807 #define ALT_SDM_GPIO_GPIO_DEBOUNCE_ADDR ALT_GPIO_GPIO_DEBOUNCE_ADDR(ALT_SDM_GPIO_ADDR)
13808 /* The address of the ALT_GPIO_GPIO_PORTA_EOI register for the ALT_SDM_GPIO instance. */
13809 #define ALT_SDM_GPIO_GPIO_PORTA_EOI_ADDR ALT_GPIO_GPIO_PORTA_EOI_ADDR(ALT_SDM_GPIO_ADDR)
13810 /* The address of the ALT_GPIO_GPIO_EXT_PORTA register for the ALT_SDM_GPIO instance. */
13811 #define ALT_SDM_GPIO_GPIO_EXT_PORTA_ADDR ALT_GPIO_GPIO_EXT_PORTA_ADDR(ALT_SDM_GPIO_ADDR)
13812 /* The address of the ALT_GPIO_GPIO_LS_SYNC register for the ALT_SDM_GPIO instance. */
13813 #define ALT_SDM_GPIO_GPIO_LS_SYNC_ADDR ALT_GPIO_GPIO_LS_SYNC_ADDR(ALT_SDM_GPIO_ADDR)
13814 /* The address of the ALT_GPIO_GPIO_ID_CODE register for the ALT_SDM_GPIO instance. */
13815 #define ALT_SDM_GPIO_GPIO_ID_CODE_ADDR ALT_GPIO_GPIO_ID_CODE_ADDR(ALT_SDM_GPIO_ADDR)
13816 /* The address of the ALT_GPIO_GPIO_VER_ID_CODE register for the ALT_SDM_GPIO instance. */
13817 #define ALT_SDM_GPIO_GPIO_VER_ID_CODE_ADDR ALT_GPIO_GPIO_VER_ID_CODE_ADDR(ALT_SDM_GPIO_ADDR)
13818 /* The address of the ALT_GPIO_GPIO_CONFIG_REG2 register for the ALT_SDM_GPIO instance. */
13819 #define ALT_SDM_GPIO_GPIO_CONFIG_REG2_ADDR ALT_GPIO_GPIO_CONFIG_REG2_ADDR(ALT_SDM_GPIO_ADDR)
13820 /* The address of the ALT_GPIO_GPIO_CONFIG_REG1 register for the ALT_SDM_GPIO instance. */
13821 #define ALT_SDM_GPIO_GPIO_CONFIG_REG1_ADDR ALT_GPIO_GPIO_CONFIG_REG1_ADDR(ALT_SDM_GPIO_ADDR)
13822 /* The base address byte offset for the start of the ALT_SDM_GPIO component. */
13823 #define ALT_SDM_GPIO_OFST 0xff8d0300
13824 /* The start address of the ALT_SDM_GPIO component. */
13825 #define ALT_SDM_GPIO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_GPIO_OFST))
13826 /* The lower bound address range of the ALT_SDM_GPIO component. */
13827 #define ALT_SDM_GPIO_LB_ADDR ALT_SDM_GPIO_ADDR
13828 /* The upper bound address range of the ALT_SDM_GPIO component. */
13829 #define ALT_SDM_GPIO_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_GPIO_ADDR) + 0x80) - 1))
13830 
13831 
13832 /*
13833  * Component Instance : sdm_sdmmc
13834  *
13835  * Instance sdm_sdmmc of component ALT_SDMMC.
13836  *
13837  *
13838  */
13839 /* The address of the ALT_SDMMC_CTRL register for the ALT_SDM_SDMMC instance. */
13840 #define ALT_SDM_SDMMC_CTRL_ADDR ALT_SDMMC_CTRL_ADDR(ALT_SDM_SDMMC_ADDR)
13841 /* The address of the ALT_SDMMC_PWREN register for the ALT_SDM_SDMMC instance. */
13842 #define ALT_SDM_SDMMC_PWREN_ADDR ALT_SDMMC_PWREN_ADDR(ALT_SDM_SDMMC_ADDR)
13843 /* The address of the ALT_SDMMC_CLKDIV register for the ALT_SDM_SDMMC instance. */
13844 #define ALT_SDM_SDMMC_CLKDIV_ADDR ALT_SDMMC_CLKDIV_ADDR(ALT_SDM_SDMMC_ADDR)
13845 /* The address of the ALT_SDMMC_CLKSRC register for the ALT_SDM_SDMMC instance. */
13846 #define ALT_SDM_SDMMC_CLKSRC_ADDR ALT_SDMMC_CLKSRC_ADDR(ALT_SDM_SDMMC_ADDR)
13847 /* The address of the ALT_SDMMC_CLKENA register for the ALT_SDM_SDMMC instance. */
13848 #define ALT_SDM_SDMMC_CLKENA_ADDR ALT_SDMMC_CLKENA_ADDR(ALT_SDM_SDMMC_ADDR)
13849 /* The address of the ALT_SDMMC_TMOUT register for the ALT_SDM_SDMMC instance. */
13850 #define ALT_SDM_SDMMC_TMOUT_ADDR ALT_SDMMC_TMOUT_ADDR(ALT_SDM_SDMMC_ADDR)
13851 /* The address of the ALT_SDMMC_CTYPE register for the ALT_SDM_SDMMC instance. */
13852 #define ALT_SDM_SDMMC_CTYPE_ADDR ALT_SDMMC_CTYPE_ADDR(ALT_SDM_SDMMC_ADDR)
13853 /* The address of the ALT_SDMMC_BLKSIZ register for the ALT_SDM_SDMMC instance. */
13854 #define ALT_SDM_SDMMC_BLKSIZ_ADDR ALT_SDMMC_BLKSIZ_ADDR(ALT_SDM_SDMMC_ADDR)
13855 /* The address of the ALT_SDMMC_BYTCNT register for the ALT_SDM_SDMMC instance. */
13856 #define ALT_SDM_SDMMC_BYTCNT_ADDR ALT_SDMMC_BYTCNT_ADDR(ALT_SDM_SDMMC_ADDR)
13857 /* The address of the ALT_SDMMC_INTMASK register for the ALT_SDM_SDMMC instance. */
13858 #define ALT_SDM_SDMMC_INTMASK_ADDR ALT_SDMMC_INTMASK_ADDR(ALT_SDM_SDMMC_ADDR)
13859 /* The address of the ALT_SDMMC_CMDARG register for the ALT_SDM_SDMMC instance. */
13860 #define ALT_SDM_SDMMC_CMDARG_ADDR ALT_SDMMC_CMDARG_ADDR(ALT_SDM_SDMMC_ADDR)
13861 /* The address of the ALT_SDMMC_CMD register for the ALT_SDM_SDMMC instance. */
13862 #define ALT_SDM_SDMMC_CMD_ADDR ALT_SDMMC_CMD_ADDR(ALT_SDM_SDMMC_ADDR)
13863 /* The address of the ALT_SDMMC_RESP0 register for the ALT_SDM_SDMMC instance. */
13864 #define ALT_SDM_SDMMC_RESP0_ADDR ALT_SDMMC_RESP0_ADDR(ALT_SDM_SDMMC_ADDR)
13865 /* The address of the ALT_SDMMC_RESP1 register for the ALT_SDM_SDMMC instance. */
13866 #define ALT_SDM_SDMMC_RESP1_ADDR ALT_SDMMC_RESP1_ADDR(ALT_SDM_SDMMC_ADDR)
13867 /* The address of the ALT_SDMMC_RESP2 register for the ALT_SDM_SDMMC instance. */
13868 #define ALT_SDM_SDMMC_RESP2_ADDR ALT_SDMMC_RESP2_ADDR(ALT_SDM_SDMMC_ADDR)
13869 /* The address of the ALT_SDMMC_RESP3 register for the ALT_SDM_SDMMC instance. */
13870 #define ALT_SDM_SDMMC_RESP3_ADDR ALT_SDMMC_RESP3_ADDR(ALT_SDM_SDMMC_ADDR)
13871 /* The address of the ALT_SDMMC_MINTSTS register for the ALT_SDM_SDMMC instance. */
13872 #define ALT_SDM_SDMMC_MINTSTS_ADDR ALT_SDMMC_MINTSTS_ADDR(ALT_SDM_SDMMC_ADDR)
13873 /* The address of the ALT_SDMMC_RINTSTS register for the ALT_SDM_SDMMC instance. */
13874 #define ALT_SDM_SDMMC_RINTSTS_ADDR ALT_SDMMC_RINTSTS_ADDR(ALT_SDM_SDMMC_ADDR)
13875 /* The address of the ALT_SDMMC_STATUS register for the ALT_SDM_SDMMC instance. */
13876 #define ALT_SDM_SDMMC_STATUS_ADDR ALT_SDMMC_STATUS_ADDR(ALT_SDM_SDMMC_ADDR)
13877 /* The address of the ALT_SDMMC_FIFOTH register for the ALT_SDM_SDMMC instance. */
13878 #define ALT_SDM_SDMMC_FIFOTH_ADDR ALT_SDMMC_FIFOTH_ADDR(ALT_SDM_SDMMC_ADDR)
13879 /* The address of the ALT_SDMMC_CDETECT register for the ALT_SDM_SDMMC instance. */
13880 #define ALT_SDM_SDMMC_CDETECT_ADDR ALT_SDMMC_CDETECT_ADDR(ALT_SDM_SDMMC_ADDR)
13881 /* The address of the ALT_SDMMC_WRTPRT register for the ALT_SDM_SDMMC instance. */
13882 #define ALT_SDM_SDMMC_WRTPRT_ADDR ALT_SDMMC_WRTPRT_ADDR(ALT_SDM_SDMMC_ADDR)
13883 /* The address of the ALT_SDMMC_GPIO register for the ALT_SDM_SDMMC instance. */
13884 #define ALT_SDM_SDMMC_GPIO_ADDR ALT_SDMMC_GPIO_ADDR(ALT_SDM_SDMMC_ADDR)
13885 /* The address of the ALT_SDMMC_TCBCNT register for the ALT_SDM_SDMMC instance. */
13886 #define ALT_SDM_SDMMC_TCBCNT_ADDR ALT_SDMMC_TCBCNT_ADDR(ALT_SDM_SDMMC_ADDR)
13887 /* The address of the ALT_SDMMC_TBBCNT register for the ALT_SDM_SDMMC instance. */
13888 #define ALT_SDM_SDMMC_TBBCNT_ADDR ALT_SDMMC_TBBCNT_ADDR(ALT_SDM_SDMMC_ADDR)
13889 /* The address of the ALT_SDMMC_DEBNCE register for the ALT_SDM_SDMMC instance. */
13890 #define ALT_SDM_SDMMC_DEBNCE_ADDR ALT_SDMMC_DEBNCE_ADDR(ALT_SDM_SDMMC_ADDR)
13891 /* The address of the ALT_SDMMC_USRID register for the ALT_SDM_SDMMC instance. */
13892 #define ALT_SDM_SDMMC_USRID_ADDR ALT_SDMMC_USRID_ADDR(ALT_SDM_SDMMC_ADDR)
13893 /* The address of the ALT_SDMMC_VERID register for the ALT_SDM_SDMMC instance. */
13894 #define ALT_SDM_SDMMC_VERID_ADDR ALT_SDMMC_VERID_ADDR(ALT_SDM_SDMMC_ADDR)
13895 /* The address of the ALT_SDMMC_HCON register for the ALT_SDM_SDMMC instance. */
13896 #define ALT_SDM_SDMMC_HCON_ADDR ALT_SDMMC_HCON_ADDR(ALT_SDM_SDMMC_ADDR)
13897 /* The address of the ALT_SDMMC_UHS_REG register for the ALT_SDM_SDMMC instance. */
13898 #define ALT_SDM_SDMMC_UHS_REG_ADDR ALT_SDMMC_UHS_REG_ADDR(ALT_SDM_SDMMC_ADDR)
13899 /* The address of the ALT_SDMMC_RST_N register for the ALT_SDM_SDMMC instance. */
13900 #define ALT_SDM_SDMMC_RST_N_ADDR ALT_SDMMC_RST_N_ADDR(ALT_SDM_SDMMC_ADDR)
13901 /* The address of the ALT_SDMMC_BMOD register for the ALT_SDM_SDMMC instance. */
13902 #define ALT_SDM_SDMMC_BMOD_ADDR ALT_SDMMC_BMOD_ADDR(ALT_SDM_SDMMC_ADDR)
13903 /* The address of the ALT_SDMMC_PLDMND register for the ALT_SDM_SDMMC instance. */
13904 #define ALT_SDM_SDMMC_PLDMND_ADDR ALT_SDMMC_PLDMND_ADDR(ALT_SDM_SDMMC_ADDR)
13905 /* The address of the ALT_SDMMC_DBADDR register for the ALT_SDM_SDMMC instance. */
13906 #define ALT_SDM_SDMMC_DBADDR_ADDR ALT_SDMMC_DBADDR_ADDR(ALT_SDM_SDMMC_ADDR)
13907 /* The address of the ALT_SDMMC_IDSTS register for the ALT_SDM_SDMMC instance. */
13908 #define ALT_SDM_SDMMC_IDSTS_ADDR ALT_SDMMC_IDSTS_ADDR(ALT_SDM_SDMMC_ADDR)
13909 /* The address of the ALT_SDMMC_IDINTEN register for the ALT_SDM_SDMMC instance. */
13910 #define ALT_SDM_SDMMC_IDINTEN_ADDR ALT_SDMMC_IDINTEN_ADDR(ALT_SDM_SDMMC_ADDR)
13911 /* The address of the ALT_SDMMC_DSCADDR register for the ALT_SDM_SDMMC instance. */
13912 #define ALT_SDM_SDMMC_DSCADDR_ADDR ALT_SDMMC_DSCADDR_ADDR(ALT_SDM_SDMMC_ADDR)
13913 /* The address of the ALT_SDMMC_BUFADDR register for the ALT_SDM_SDMMC instance. */
13914 #define ALT_SDM_SDMMC_BUFADDR_ADDR ALT_SDMMC_BUFADDR_ADDR(ALT_SDM_SDMMC_ADDR)
13915 /* The address of the ALT_SDMMC_CARDTHRCTL register for the ALT_SDM_SDMMC instance. */
13916 #define ALT_SDM_SDMMC_CARDTHRCTL_ADDR ALT_SDMMC_CARDTHRCTL_ADDR(ALT_SDM_SDMMC_ADDR)
13917 /* The address of the ALT_SDMMC_BACK_END_POWER_R register for the ALT_SDM_SDMMC instance. */
13918 #define ALT_SDM_SDMMC_BACK_END_POWER_R_ADDR ALT_SDMMC_BACK_END_POWER_R_ADDR(ALT_SDM_SDMMC_ADDR)
13919 /* The address of the ALT_SDMMC_UHS_REG_EXT register for the ALT_SDM_SDMMC instance. */
13920 #define ALT_SDM_SDMMC_UHS_REG_EXT_ADDR ALT_SDMMC_UHS_REG_EXT_ADDR(ALT_SDM_SDMMC_ADDR)
13921 /* The address of the ALT_SDMMC_EMMC_DDR_REG register for the ALT_SDM_SDMMC instance. */
13922 #define ALT_SDM_SDMMC_EMMC_DDR_REG_ADDR ALT_SDMMC_EMMC_DDR_REG_ADDR(ALT_SDM_SDMMC_ADDR)
13923 /* The address of the ALT_SDMMC_ENABLE_SHIFT register for the ALT_SDM_SDMMC instance. */
13924 #define ALT_SDM_SDMMC_ENABLE_SHIFT_ADDR ALT_SDMMC_ENABLE_SHIFT_ADDR(ALT_SDM_SDMMC_ADDR)
13925 /* The address of the SDMMC_DATA register for the ALT_SDM_SDMMC instance. */
13926 #define ALT_SDM_SDMMC_DATA_ADDR SDMMC_DATA_ADDR(ALT_SDM_SDMMC_ADDR)
13927 /* The base address byte offset for the start of the ALT_SDM_SDMMC component. */
13928 #define ALT_SDM_SDMMC_OFST 0xff8d1000
13929 /* The start address of the ALT_SDM_SDMMC component. */
13930 #define ALT_SDM_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_SDMMC_OFST))
13931 /* The lower bound address range of the ALT_SDM_SDMMC component. */
13932 #define ALT_SDM_SDMMC_LB_ADDR ALT_SDM_SDMMC_ADDR
13933 /* The upper bound address range of the ALT_SDM_SDMMC component. */
13934 #define ALT_SDM_SDMMC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_SDMMC_ADDR) + 0x400) - 1))
13935 
13936 
13937 /*
13938  * Component Instance : sdm_qspi
13939  *
13940  * Instance sdm_qspi of component ALT_QSPI.
13941  *
13942  *
13943  */
13944 /* The address of the ALT_QSPI_CFG register for the ALT_SDM_QSPI instance. */
13945 #define ALT_SDM_QSPI_CFG_ADDR ALT_QSPI_CFG_ADDR(ALT_SDM_QSPI_ADDR)
13946 /* The address of the ALT_QSPI_DEVRD register for the ALT_SDM_QSPI instance. */
13947 #define ALT_SDM_QSPI_DEVRD_ADDR ALT_QSPI_DEVRD_ADDR(ALT_SDM_QSPI_ADDR)
13948 /* The address of the ALT_QSPI_DEVWR register for the ALT_SDM_QSPI instance. */
13949 #define ALT_SDM_QSPI_DEVWR_ADDR ALT_QSPI_DEVWR_ADDR(ALT_SDM_QSPI_ADDR)
13950 /* The address of the ALT_QSPI_DELAY register for the ALT_SDM_QSPI instance. */
13951 #define ALT_SDM_QSPI_DELAY_ADDR ALT_QSPI_DELAY_ADDR(ALT_SDM_QSPI_ADDR)
13952 /* The address of the ALT_QSPI_RDDATACAP register for the ALT_SDM_QSPI instance. */
13953 #define ALT_SDM_QSPI_RDDATACAP_ADDR ALT_QSPI_RDDATACAP_ADDR(ALT_SDM_QSPI_ADDR)
13954 /* The address of the ALT_QSPI_DEVSZ register for the ALT_SDM_QSPI instance. */
13955 #define ALT_SDM_QSPI_DEVSZ_ADDR ALT_QSPI_DEVSZ_ADDR(ALT_SDM_QSPI_ADDR)
13956 /* The address of the ALT_QSPI_SRAMPART register for the ALT_SDM_QSPI instance. */
13957 #define ALT_SDM_QSPI_SRAMPART_ADDR ALT_QSPI_SRAMPART_ADDR(ALT_SDM_QSPI_ADDR)
13958 /* The address of the ALT_QSPI_INDADDRTRIG register for the ALT_SDM_QSPI instance. */
13959 #define ALT_SDM_QSPI_INDADDRTRIG_ADDR ALT_QSPI_INDADDRTRIG_ADDR(ALT_SDM_QSPI_ADDR)
13960 /* The address of the ALT_QSPI_DMAPER register for the ALT_SDM_QSPI instance. */
13961 #define ALT_SDM_QSPI_DMAPER_ADDR ALT_QSPI_DMAPER_ADDR(ALT_SDM_QSPI_ADDR)
13962 /* The address of the ALT_QSPI_REMAPADDR register for the ALT_SDM_QSPI instance. */
13963 #define ALT_SDM_QSPI_REMAPADDR_ADDR ALT_QSPI_REMAPADDR_ADDR(ALT_SDM_QSPI_ADDR)
13964 /* The address of the ALT_QSPI_MODEBIT register for the ALT_SDM_QSPI instance. */
13965 #define ALT_SDM_QSPI_MODEBIT_ADDR ALT_QSPI_MODEBIT_ADDR(ALT_SDM_QSPI_ADDR)
13966 /* The address of the ALT_QSPI_SRAMFILL register for the ALT_SDM_QSPI instance. */
13967 #define ALT_SDM_QSPI_SRAMFILL_ADDR ALT_QSPI_SRAMFILL_ADDR(ALT_SDM_QSPI_ADDR)
13968 /* The address of the ALT_QSPI_TXTHRESH register for the ALT_SDM_QSPI instance. */
13969 #define ALT_SDM_QSPI_TXTHRESH_ADDR ALT_QSPI_TXTHRESH_ADDR(ALT_SDM_QSPI_ADDR)
13970 /* The address of the ALT_QSPI_RXTHRESH register for the ALT_SDM_QSPI instance. */
13971 #define ALT_SDM_QSPI_RXTHRESH_ADDR ALT_QSPI_RXTHRESH_ADDR(ALT_SDM_QSPI_ADDR)
13972 /* The address of the ALT_QSPI_IRQSTAT register for the ALT_SDM_QSPI instance. */
13973 #define ALT_SDM_QSPI_IRQSTAT_ADDR ALT_QSPI_IRQSTAT_ADDR(ALT_SDM_QSPI_ADDR)
13974 /* The address of the ALT_QSPI_IRQMASK register for the ALT_SDM_QSPI instance. */
13975 #define ALT_SDM_QSPI_IRQMASK_ADDR ALT_QSPI_IRQMASK_ADDR(ALT_SDM_QSPI_ADDR)
13976 /* The address of the ALT_QSPI_LOWWRPROT register for the ALT_SDM_QSPI instance. */
13977 #define ALT_SDM_QSPI_LOWWRPROT_ADDR ALT_QSPI_LOWWRPROT_ADDR(ALT_SDM_QSPI_ADDR)
13978 /* The address of the ALT_QSPI_UPPWRPROT register for the ALT_SDM_QSPI instance. */
13979 #define ALT_SDM_QSPI_UPPWRPROT_ADDR ALT_QSPI_UPPWRPROT_ADDR(ALT_SDM_QSPI_ADDR)
13980 /* The address of the ALT_QSPI_WRPROT register for the ALT_SDM_QSPI instance. */
13981 #define ALT_SDM_QSPI_WRPROT_ADDR ALT_QSPI_WRPROT_ADDR(ALT_SDM_QSPI_ADDR)
13982 /* The address of the ALT_QSPI_INDRD register for the ALT_SDM_QSPI instance. */
13983 #define ALT_SDM_QSPI_INDRD_ADDR ALT_QSPI_INDRD_ADDR(ALT_SDM_QSPI_ADDR)
13984 /* The address of the ALT_QSPI_INDRDWATER register for the ALT_SDM_QSPI instance. */
13985 #define ALT_SDM_QSPI_INDRDWATER_ADDR ALT_QSPI_INDRDWATER_ADDR(ALT_SDM_QSPI_ADDR)
13986 /* The address of the ALT_QSPI_INDRDSTADDR register for the ALT_SDM_QSPI instance. */
13987 #define ALT_SDM_QSPI_INDRDSTADDR_ADDR ALT_QSPI_INDRDSTADDR_ADDR(ALT_SDM_QSPI_ADDR)
13988 /* The address of the ALT_QSPI_INDRDCNT register for the ALT_SDM_QSPI instance. */
13989 #define ALT_SDM_QSPI_INDRDCNT_ADDR ALT_QSPI_INDRDCNT_ADDR(ALT_SDM_QSPI_ADDR)
13990 /* The address of the ALT_QSPI_INDWR register for the ALT_SDM_QSPI instance. */
13991 #define ALT_SDM_QSPI_INDWR_ADDR ALT_QSPI_INDWR_ADDR(ALT_SDM_QSPI_ADDR)
13992 /* The address of the ALT_QSPI_INDWRWATER register for the ALT_SDM_QSPI instance. */
13993 #define ALT_SDM_QSPI_INDWRWATER_ADDR ALT_QSPI_INDWRWATER_ADDR(ALT_SDM_QSPI_ADDR)
13994 /* The address of the ALT_QSPI_INDWRSTADDR register for the ALT_SDM_QSPI instance. */
13995 #define ALT_SDM_QSPI_INDWRSTADDR_ADDR ALT_QSPI_INDWRSTADDR_ADDR(ALT_SDM_QSPI_ADDR)
13996 /* The address of the ALT_QSPI_INDWRCNT register for the ALT_SDM_QSPI instance. */
13997 #define ALT_SDM_QSPI_INDWRCNT_ADDR ALT_QSPI_INDWRCNT_ADDR(ALT_SDM_QSPI_ADDR)
13998 /* The address of the ALT_QSPI_FLASHCMD register for the ALT_SDM_QSPI instance. */
13999 #define ALT_SDM_QSPI_FLASHCMD_ADDR ALT_QSPI_FLASHCMD_ADDR(ALT_SDM_QSPI_ADDR)
14000 /* The address of the ALT_QSPI_FLASHCMDADDR register for the ALT_SDM_QSPI instance. */
14001 #define ALT_SDM_QSPI_FLASHCMDADDR_ADDR ALT_QSPI_FLASHCMDADDR_ADDR(ALT_SDM_QSPI_ADDR)
14002 /* The address of the ALT_QSPI_FLASHCMDRDDATALO register for the ALT_SDM_QSPI instance. */
14003 #define ALT_SDM_QSPI_FLASHCMDRDDATALO_ADDR ALT_QSPI_FLASHCMDRDDATALO_ADDR(ALT_SDM_QSPI_ADDR)
14004 /* The address of the ALT_QSPI_FLASHCMDRDDATAUP register for the ALT_SDM_QSPI instance. */
14005 #define ALT_SDM_QSPI_FLASHCMDRDDATAUP_ADDR ALT_QSPI_FLASHCMDRDDATAUP_ADDR(ALT_SDM_QSPI_ADDR)
14006 /* The address of the ALT_QSPI_FLASHCMDWRDATALO register for the ALT_SDM_QSPI instance. */
14007 #define ALT_SDM_QSPI_FLASHCMDWRDATALO_ADDR ALT_QSPI_FLASHCMDWRDATALO_ADDR(ALT_SDM_QSPI_ADDR)
14008 /* The address of the ALT_QSPI_FLASHCMDWRDATAUP register for the ALT_SDM_QSPI instance. */
14009 #define ALT_SDM_QSPI_FLASHCMDWRDATAUP_ADDR ALT_QSPI_FLASHCMDWRDATAUP_ADDR(ALT_SDM_QSPI_ADDR)
14010 /* The address of the ALT_QSPI_MODULEID register for the ALT_SDM_QSPI instance. */
14011 #define ALT_SDM_QSPI_MODULEID_ADDR ALT_QSPI_MODULEID_ADDR(ALT_SDM_QSPI_ADDR)
14012 /* The base address byte offset for the start of the ALT_SDM_QSPI component. */
14013 #define ALT_SDM_QSPI_OFST 0xff8d2000
14014 /* The start address of the ALT_SDM_QSPI component. */
14015 #define ALT_SDM_QSPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_QSPI_OFST))
14016 /* The lower bound address range of the ALT_SDM_QSPI component. */
14017 #define ALT_SDM_QSPI_LB_ADDR ALT_SDM_QSPI_ADDR
14018 /* The upper bound address range of the ALT_SDM_QSPI component. */
14019 #define ALT_SDM_QSPI_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_QSPI_ADDR) + 0x100) - 1))
14020 
14021 
14022 /*
14023  * Component Instance : sdm_qspi_data
14024  *
14025  * Instance sdm_qspi_data of component ALT_QSPI_DATA.
14026  *
14027  *
14028  */
14029 /* The base address byte offset for the start of the ALT_SDM_QSPI_DATA component. */
14030 #define ALT_SDM_QSPI_DATA_OFST 0xff900000
14031 /* The start address of the ALT_SDM_QSPI_DATA component. */
14032 #define ALT_SDM_QSPI_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_QSPI_DATA_OFST))
14033 /* The lower bound address range of the ALT_SDM_QSPI_DATA component. */
14034 #define ALT_SDM_QSPI_DATA_LB_ADDR ALT_SDM_QSPI_DATA_ADDR
14035 /* The upper bound address range of the ALT_SDM_QSPI_DATA component. */
14036 #define ALT_SDM_QSPI_DATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_QSPI_DATA_ADDR) + 0x100000) - 1))
14037 
14038 
14039 /*
14040  * Component Instance : sdm_nand_data
14041  *
14042  * Instance sdm_nand_data of component ALT_NAND_DATA.
14043  *
14044  *
14045  */
14046 /* The base address byte offset for the start of the ALT_SDM_NAND_DATA component. */
14047 #define ALT_SDM_NAND_DATA_OFST 0xffa00000
14048 /* The start address of the ALT_SDM_NAND_DATA component. */
14049 #define ALT_SDM_NAND_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_NAND_DATA_OFST))
14050 /* The lower bound address range of the ALT_SDM_NAND_DATA component. */
14051 #define ALT_SDM_NAND_DATA_LB_ADDR ALT_SDM_NAND_DATA_ADDR
14052 /* The upper bound address range of the ALT_SDM_NAND_DATA component. */
14053 #define ALT_SDM_NAND_DATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_NAND_DATA_ADDR) + 0x10000) - 1))
14054 
14055 
14056 /*
14057  * Component Instance : sdm_nand_cfg
14058  *
14059  * Instance sdm_nand_cfg of component ALT_NAND_CFG.
14060  *
14061  *
14062  */
14063 /* The address of the ALT_NAND_CFG_DEVICE_RESET register for the ALT_SDM_NAND_CFG instance. */
14064 #define ALT_SDM_NAND_CFG_DEVICE_RESET_ADDR ALT_NAND_CFG_DEVICE_RESET_ADDR(ALT_SDM_NAND_CFG_ADDR)
14065 /* The address of the ALT_NAND_CFG_TRANSFER_SPARE_REG register for the ALT_SDM_NAND_CFG instance. */
14066 #define ALT_SDM_NAND_CFG_TRANSFER_SPARE_REG_ADDR ALT_NAND_CFG_TRANSFER_SPARE_REG_ADDR(ALT_SDM_NAND_CFG_ADDR)
14067 /* The address of the ALT_NAND_CFG_LOAD_WAIT_CNT register for the ALT_SDM_NAND_CFG instance. */
14068 #define ALT_SDM_NAND_CFG_LOAD_WAIT_CNT_ADDR ALT_NAND_CFG_LOAD_WAIT_CNT_ADDR(ALT_SDM_NAND_CFG_ADDR)
14069 /* The address of the ALT_NAND_CFG_PROGRAM_WAIT_CNT register for the ALT_SDM_NAND_CFG instance. */
14070 #define ALT_SDM_NAND_CFG_PROGRAM_WAIT_CNT_ADDR ALT_NAND_CFG_PROGRAM_WAIT_CNT_ADDR(ALT_SDM_NAND_CFG_ADDR)
14071 /* The address of the ALT_NAND_CFG_ERASE_WAIT_CNT register for the ALT_SDM_NAND_CFG instance. */
14072 #define ALT_SDM_NAND_CFG_ERASE_WAIT_CNT_ADDR ALT_NAND_CFG_ERASE_WAIT_CNT_ADDR(ALT_SDM_NAND_CFG_ADDR)
14073 /* The address of the ALT_NAND_CFG_INT_MON_CYCCNT register for the ALT_SDM_NAND_CFG instance. */
14074 #define ALT_SDM_NAND_CFG_INT_MON_CYCCNT_ADDR ALT_NAND_CFG_INT_MON_CYCCNT_ADDR(ALT_SDM_NAND_CFG_ADDR)
14075 /* The address of the ALT_NAND_CFG_RB_PIN_ENABLED register for the ALT_SDM_NAND_CFG instance. */
14076 #define ALT_SDM_NAND_CFG_RB_PIN_ENABLED_ADDR ALT_NAND_CFG_RB_PIN_ENABLED_ADDR(ALT_SDM_NAND_CFG_ADDR)
14077 /* The address of the ALT_NAND_CFG_MULTIPLANE_OPERATION register for the ALT_SDM_NAND_CFG instance. */
14078 #define ALT_SDM_NAND_CFG_MULTIPLANE_OPERATION_ADDR ALT_NAND_CFG_MULTIPLANE_OPERATION_ADDR(ALT_SDM_NAND_CFG_ADDR)
14079 /* The address of the ALT_NAND_CFG_MULTIPLANE_READ_ENABLE register for the ALT_SDM_NAND_CFG instance. */
14080 #define ALT_SDM_NAND_CFG_MULTIPLANE_READ_ENABLE_ADDR ALT_NAND_CFG_MULTIPLANE_READ_ENABLE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14081 /* The address of the ALT_NAND_CFG_COPYBACK_DISABLE register for the ALT_SDM_NAND_CFG instance. */
14082 #define ALT_SDM_NAND_CFG_COPYBACK_DISABLE_ADDR ALT_NAND_CFG_COPYBACK_DISABLE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14083 /* The address of the ALT_NAND_CFG_CACHE_WRITE_ENABLE register for the ALT_SDM_NAND_CFG instance. */
14084 #define ALT_SDM_NAND_CFG_CACHE_WRITE_ENABLE_ADDR ALT_NAND_CFG_CACHE_WRITE_ENABLE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14085 /* The address of the ALT_NAND_CFG_CACHE_READ_ENABLE register for the ALT_SDM_NAND_CFG instance. */
14086 #define ALT_SDM_NAND_CFG_CACHE_READ_ENABLE_ADDR ALT_NAND_CFG_CACHE_READ_ENABLE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14087 /* The address of the ALT_NAND_CFG_PREFETCH_MODE register for the ALT_SDM_NAND_CFG instance. */
14088 #define ALT_SDM_NAND_CFG_PREFETCH_MODE_ADDR ALT_NAND_CFG_PREFETCH_MODE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14089 /* The address of the ALT_NAND_CFG_CHIP_ENABLE_DONT_CARE register for the ALT_SDM_NAND_CFG instance. */
14090 #define ALT_SDM_NAND_CFG_CHIP_ENABLE_DONT_CARE_ADDR ALT_NAND_CFG_CHIP_ENABLE_DONT_CARE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14091 /* The address of the ALT_NAND_CFG_ECC_ENABLE register for the ALT_SDM_NAND_CFG instance. */
14092 #define ALT_SDM_NAND_CFG_ECC_ENABLE_ADDR ALT_NAND_CFG_ECC_ENABLE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14093 /* The address of the ALT_NAND_CFG_GLOBAL_INT_ENABLE register for the ALT_SDM_NAND_CFG instance. */
14094 #define ALT_SDM_NAND_CFG_GLOBAL_INT_ENABLE_ADDR ALT_NAND_CFG_GLOBAL_INT_ENABLE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14095 /* The address of the ALT_NAND_CFG_TWHR2_AND_WE_2_RE register for the ALT_SDM_NAND_CFG instance. */
14096 #define ALT_SDM_NAND_CFG_TWHR2_AND_WE_2_RE_ADDR ALT_NAND_CFG_TWHR2_AND_WE_2_RE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14097 /* The address of the ALT_NAND_CFG_TCWAW_AND_ADDR_2_DATA register for the ALT_SDM_NAND_CFG instance. */
14098 #define ALT_SDM_NAND_CFG_TCWAW_AND_ADDR_2_DATA_ADDR ALT_NAND_CFG_TCWAW_AND_ADDR_2_DATA_ADDR(ALT_SDM_NAND_CFG_ADDR)
14099 /* The address of the ALT_NAND_CFG_RE_2_WE register for the ALT_SDM_NAND_CFG instance. */
14100 #define ALT_SDM_NAND_CFG_RE_2_WE_ADDR ALT_NAND_CFG_RE_2_WE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14101 /* The address of the ALT_NAND_CFG_ACC_CLKS register for the ALT_SDM_NAND_CFG instance. */
14102 #define ALT_SDM_NAND_CFG_ACC_CLKS_ADDR ALT_NAND_CFG_ACC_CLKS_ADDR(ALT_SDM_NAND_CFG_ADDR)
14103 /* The address of the ALT_NAND_CFG_NUMBER_OF_PLANES register for the ALT_SDM_NAND_CFG instance. */
14104 #define ALT_SDM_NAND_CFG_NUMBER_OF_PLANES_ADDR ALT_NAND_CFG_NUMBER_OF_PLANES_ADDR(ALT_SDM_NAND_CFG_ADDR)
14105 /* The address of the ALT_NAND_CFG_PAGES_PER_BLOCK register for the ALT_SDM_NAND_CFG instance. */
14106 #define ALT_SDM_NAND_CFG_PAGES_PER_BLOCK_ADDR ALT_NAND_CFG_PAGES_PER_BLOCK_ADDR(ALT_SDM_NAND_CFG_ADDR)
14107 /* The address of the ALT_NAND_CFG_DEVICE_WIDTH register for the ALT_SDM_NAND_CFG instance. */
14108 #define ALT_SDM_NAND_CFG_DEVICE_WIDTH_ADDR ALT_NAND_CFG_DEVICE_WIDTH_ADDR(ALT_SDM_NAND_CFG_ADDR)
14109 /* The address of the ALT_NAND_CFG_DEVICE_MAIN_AREA_SIZE register for the ALT_SDM_NAND_CFG instance. */
14110 #define ALT_SDM_NAND_CFG_DEVICE_MAIN_AREA_SIZE_ADDR ALT_NAND_CFG_DEVICE_MAIN_AREA_SIZE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14111 /* The address of the ALT_NAND_CFG_DEVICE_SPARE_AREA_SIZE register for the ALT_SDM_NAND_CFG instance. */
14112 #define ALT_SDM_NAND_CFG_DEVICE_SPARE_AREA_SIZE_ADDR ALT_NAND_CFG_DEVICE_SPARE_AREA_SIZE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14113 /* The address of the ALT_NAND_CFG_TWO_ROW_ADDR_CYCLES register for the ALT_SDM_NAND_CFG instance. */
14114 #define ALT_SDM_NAND_CFG_TWO_ROW_ADDR_CYCLES_ADDR ALT_NAND_CFG_TWO_ROW_ADDR_CYCLES_ADDR(ALT_SDM_NAND_CFG_ADDR)
14115 /* The address of the ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT register for the ALT_SDM_NAND_CFG instance. */
14116 #define ALT_SDM_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_ADDR ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_ADDR(ALT_SDM_NAND_CFG_ADDR)
14117 /* The address of the ALT_NAND_CFG_ECC_CORRECTION register for the ALT_SDM_NAND_CFG instance. */
14118 #define ALT_SDM_NAND_CFG_ECC_CORRECTION_ADDR ALT_NAND_CFG_ECC_CORRECTION_ADDR(ALT_SDM_NAND_CFG_ADDR)
14119 /* The address of the ALT_NAND_CFG_READ_MODE register for the ALT_SDM_NAND_CFG instance. */
14120 #define ALT_SDM_NAND_CFG_READ_MODE_ADDR ALT_NAND_CFG_READ_MODE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14121 /* The address of the ALT_NAND_CFG_WRITE_MODE register for the ALT_SDM_NAND_CFG instance. */
14122 #define ALT_SDM_NAND_CFG_WRITE_MODE_ADDR ALT_NAND_CFG_WRITE_MODE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14123 /* The address of the ALT_NAND_CFG_COPYBACK_MODE register for the ALT_SDM_NAND_CFG instance. */
14124 #define ALT_SDM_NAND_CFG_COPYBACK_MODE_ADDR ALT_NAND_CFG_COPYBACK_MODE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14125 /* The address of the ALT_NAND_CFG_RDWR_EN_LO_CNT register for the ALT_SDM_NAND_CFG instance. */
14126 #define ALT_SDM_NAND_CFG_RDWR_EN_LO_CNT_ADDR ALT_NAND_CFG_RDWR_EN_LO_CNT_ADDR(ALT_SDM_NAND_CFG_ADDR)
14127 /* The address of the ALT_NAND_CFG_RDWR_EN_HI_CNT register for the ALT_SDM_NAND_CFG instance. */
14128 #define ALT_SDM_NAND_CFG_RDWR_EN_HI_CNT_ADDR ALT_NAND_CFG_RDWR_EN_HI_CNT_ADDR(ALT_SDM_NAND_CFG_ADDR)
14129 /* The address of the ALT_NAND_CFG_MAX_RD_DELAY register for the ALT_SDM_NAND_CFG instance. */
14130 #define ALT_SDM_NAND_CFG_MAX_RD_DELAY_ADDR ALT_NAND_CFG_MAX_RD_DELAY_ADDR(ALT_SDM_NAND_CFG_ADDR)
14131 /* The address of the ALT_NAND_CFG_CS_SETUP_CNT register for the ALT_SDM_NAND_CFG instance. */
14132 #define ALT_SDM_NAND_CFG_CS_SETUP_CNT_ADDR ALT_NAND_CFG_CS_SETUP_CNT_ADDR(ALT_SDM_NAND_CFG_ADDR)
14133 /* The address of the ALT_NAND_CFG_SPARE_AREA_SKIP_BYTES register for the ALT_SDM_NAND_CFG instance. */
14134 #define ALT_SDM_NAND_CFG_SPARE_AREA_SKIP_BYTES_ADDR ALT_NAND_CFG_SPARE_AREA_SKIP_BYTES_ADDR(ALT_SDM_NAND_CFG_ADDR)
14135 /* The address of the ALT_NAND_CFG_SPARE_AREA_MARKER register for the ALT_SDM_NAND_CFG instance. */
14136 #define ALT_SDM_NAND_CFG_SPARE_AREA_MARKER_ADDR ALT_NAND_CFG_SPARE_AREA_MARKER_ADDR(ALT_SDM_NAND_CFG_ADDR)
14137 /* The address of the ALT_NAND_CFG_DEVICES_CONNECTED register for the ALT_SDM_NAND_CFG instance. */
14138 #define ALT_SDM_NAND_CFG_DEVICES_CONNECTED_ADDR ALT_NAND_CFG_DEVICES_CONNECTED_ADDR(ALT_SDM_NAND_CFG_ADDR)
14139 /* The address of the ALT_NAND_CFG_DIE_MASK register for the ALT_SDM_NAND_CFG instance. */
14140 #define ALT_SDM_NAND_CFG_DIE_MASK_ADDR ALT_NAND_CFG_DIE_MASK_ADDR(ALT_SDM_NAND_CFG_ADDR)
14141 /* The address of the ALT_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE register for the ALT_SDM_NAND_CFG instance. */
14142 #define ALT_SDM_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE_ADDR ALT_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14143 /* The address of the ALT_NAND_CFG_WRITE_PROTECT register for the ALT_SDM_NAND_CFG instance. */
14144 #define ALT_SDM_NAND_CFG_WRITE_PROTECT_ADDR ALT_NAND_CFG_WRITE_PROTECT_ADDR(ALT_SDM_NAND_CFG_ADDR)
14145 /* The address of the ALT_NAND_CFG_RE_2_RE register for the ALT_SDM_NAND_CFG instance. */
14146 #define ALT_SDM_NAND_CFG_RE_2_RE_ADDR ALT_NAND_CFG_RE_2_RE_ADDR(ALT_SDM_NAND_CFG_ADDR)
14147 /* The address of the ALT_NAND_CFG_POR_RESET_COUNT register for the ALT_SDM_NAND_CFG instance. */
14148 #define ALT_SDM_NAND_CFG_POR_RESET_COUNT_ADDR ALT_NAND_CFG_POR_RESET_COUNT_ADDR(ALT_SDM_NAND_CFG_ADDR)
14149 /* The address of the ALT_NAND_CFG_WATCHDOG_RESET_COUNT register for the ALT_SDM_NAND_CFG instance. */
14150 #define ALT_SDM_NAND_CFG_WATCHDOG_RESET_COUNT_ADDR ALT_NAND_CFG_WATCHDOG_RESET_COUNT_ADDR(ALT_SDM_NAND_CFG_ADDR)
14151 /* The base address byte offset for the start of the ALT_SDM_NAND_CFG component. */
14152 #define ALT_SDM_NAND_CFG_OFST 0xffa10000
14153 /* The start address of the ALT_SDM_NAND_CFG component. */
14154 #define ALT_SDM_NAND_CFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_NAND_CFG_OFST))
14155 /* The lower bound address range of the ALT_SDM_NAND_CFG component. */
14156 #define ALT_SDM_NAND_CFG_LB_ADDR ALT_SDM_NAND_CFG_ADDR
14157 /* The upper bound address range of the ALT_SDM_NAND_CFG component. */
14158 #define ALT_SDM_NAND_CFG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_NAND_CFG_ADDR) + 0x2b4) - 1))
14159 
14160 
14161 /*
14162  * Component Instance : sdm_nand_param
14163  *
14164  * Instance sdm_nand_param of component ALT_NAND_PARAM.
14165  *
14166  *
14167  */
14168 /* The address of the ALT_NAND_PARAM_MANUFACTURER_ID register for the ALT_SDM_NAND_PARAM instance. */
14169 #define ALT_SDM_NAND_PARAM_MANUFACTURER_ID_ADDR ALT_NAND_PARAM_MANUFACTURER_ID_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14170 /* The address of the ALT_NAND_PARAM_DEVICE_ID register for the ALT_SDM_NAND_PARAM instance. */
14171 #define ALT_SDM_NAND_PARAM_DEVICE_ID_ADDR ALT_NAND_PARAM_DEVICE_ID_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14172 /* The address of the ALT_NAND_PARAM_DEVICE_PARAM_0 register for the ALT_SDM_NAND_PARAM instance. */
14173 #define ALT_SDM_NAND_PARAM_DEVICE_PARAM_0_ADDR ALT_NAND_PARAM_DEVICE_PARAM_0_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14174 /* The address of the ALT_NAND_PARAM_DEVICE_PARAM_1 register for the ALT_SDM_NAND_PARAM instance. */
14175 #define ALT_SDM_NAND_PARAM_DEVICE_PARAM_1_ADDR ALT_NAND_PARAM_DEVICE_PARAM_1_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14176 /* The address of the ALT_NAND_PARAM_DEVICE_PARAM_2 register for the ALT_SDM_NAND_PARAM instance. */
14177 #define ALT_SDM_NAND_PARAM_DEVICE_PARAM_2_ADDR ALT_NAND_PARAM_DEVICE_PARAM_2_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14178 /* The address of the ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE register for the ALT_SDM_NAND_PARAM instance. */
14179 #define ALT_SDM_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE_ADDR ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14180 /* The address of the ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE register for the ALT_SDM_NAND_PARAM instance. */
14181 #define ALT_SDM_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE_ADDR ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14182 /* The address of the ALT_NAND_PARAM_REVISION register for the ALT_SDM_NAND_PARAM instance. */
14183 #define ALT_SDM_NAND_PARAM_REVISION_ADDR ALT_NAND_PARAM_REVISION_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14184 /* The address of the ALT_NAND_PARAM_ONFI_DEVICE_FEATURES register for the ALT_SDM_NAND_PARAM instance. */
14185 #define ALT_SDM_NAND_PARAM_ONFI_DEVICE_FEATURES_ADDR ALT_NAND_PARAM_ONFI_DEVICE_FEATURES_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14186 /* The address of the ALT_NAND_PARAM_ONFI_OPTIONAL_COMMANDS register for the ALT_SDM_NAND_PARAM instance. */
14187 #define ALT_SDM_NAND_PARAM_ONFI_OPTIONAL_COMMANDS_ADDR ALT_NAND_PARAM_ONFI_OPTIONAL_COMMANDS_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14188 /* The address of the ALT_NAND_PARAM_ONFI_TIMING_MODE register for the ALT_SDM_NAND_PARAM instance. */
14189 #define ALT_SDM_NAND_PARAM_ONFI_TIMING_MODE_ADDR ALT_NAND_PARAM_ONFI_TIMING_MODE_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14190 /* The address of the ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MODE register for the ALT_SDM_NAND_PARAM instance. */
14191 #define ALT_SDM_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MODE_ADDR ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MODE_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14192 /* The address of the ALT_NAND_PARAM_ONFI_DEVICE_NO_OF_LUNS register for the ALT_SDM_NAND_PARAM instance. */
14193 #define ALT_SDM_NAND_PARAM_ONFI_DEVICE_NO_OF_LUNS_ADDR ALT_NAND_PARAM_ONFI_DEVICE_NO_OF_LUNS_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14194 /* The address of the ALT_NAND_PARAM_ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L register for the ALT_SDM_NAND_PARAM instance. */
14195 #define ALT_SDM_NAND_PARAM_ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L_ADDR ALT_NAND_PARAM_ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14196 /* The address of the ALT_NAND_PARAM_ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U register for the ALT_SDM_NAND_PARAM instance. */
14197 #define ALT_SDM_NAND_PARAM_ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U_ADDR ALT_NAND_PARAM_ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14198 /* The address of the ALT_NAND_PARAM_FEATURES register for the ALT_SDM_NAND_PARAM instance. */
14199 #define ALT_SDM_NAND_PARAM_FEATURES_ADDR ALT_NAND_PARAM_FEATURES_ADDR(ALT_SDM_NAND_PARAM_ADDR)
14200 /* The base address byte offset for the start of the ALT_SDM_NAND_PARAM component. */
14201 #define ALT_SDM_NAND_PARAM_OFST 0xffa10300
14202 /* The start address of the ALT_SDM_NAND_PARAM component. */
14203 #define ALT_SDM_NAND_PARAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_NAND_PARAM_OFST))
14204 /* The lower bound address range of the ALT_SDM_NAND_PARAM component. */
14205 #define ALT_SDM_NAND_PARAM_LB_ADDR ALT_SDM_NAND_PARAM_ADDR
14206 /* The upper bound address range of the ALT_SDM_NAND_PARAM component. */
14207 #define ALT_SDM_NAND_PARAM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_NAND_PARAM_ADDR) + 0xf4) - 1))
14208 
14209 
14210 /*
14211  * Component Instance : sdm_nand_status
14212  *
14213  * Instance sdm_nand_status of component ALT_NAND_STAT.
14214  *
14215  *
14216  */
14217 /* The address of the ALT_NAND_STAT_TRANSFER_MODE register for the ALT_SDM_NAND_STATUS instance. */
14218 #define ALT_SDM_NAND_STATUS_TRANSFER_MODE_ADDR ALT_NAND_STAT_TRANSFER_MODE_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14219 /* The address of the ALT_NAND_STAT_INTR_STATUS0 register for the ALT_SDM_NAND_STATUS instance. */
14220 #define ALT_SDM_NAND_STATUS_INTR_STATUS0_ADDR ALT_NAND_STAT_INTR_STATUS0_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14221 /* The address of the ALT_NAND_STAT_INTR_EN0 register for the ALT_SDM_NAND_STATUS instance. */
14222 #define ALT_SDM_NAND_STATUS_INTR_EN0_ADDR ALT_NAND_STAT_INTR_EN0_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14223 /* The address of the ALT_NAND_STAT_PAGE_CNT0 register for the ALT_SDM_NAND_STATUS instance. */
14224 #define ALT_SDM_NAND_STATUS_PAGE_CNT0_ADDR ALT_NAND_STAT_PAGE_CNT0_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14225 /* The address of the ALT_NAND_STAT_ERR_PAGE_ADDR0 register for the ALT_SDM_NAND_STATUS instance. */
14226 #define ALT_SDM_NAND_STATUS_ERR_PAGE_ADDR0_ADDR ALT_NAND_STAT_ERR_PAGE_ADDR0_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14227 /* The address of the ALT_NAND_STAT_ERR_BLOCK_ADDR0 register for the ALT_SDM_NAND_STATUS instance. */
14228 #define ALT_SDM_NAND_STATUS_ERR_BLOCK_ADDR0_ADDR ALT_NAND_STAT_ERR_BLOCK_ADDR0_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14229 /* The address of the ALT_NAND_STAT_INTR_STATUS1 register for the ALT_SDM_NAND_STATUS instance. */
14230 #define ALT_SDM_NAND_STATUS_INTR_STATUS1_ADDR ALT_NAND_STAT_INTR_STATUS1_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14231 /* The address of the ALT_NAND_STAT_INTR_EN1 register for the ALT_SDM_NAND_STATUS instance. */
14232 #define ALT_SDM_NAND_STATUS_INTR_EN1_ADDR ALT_NAND_STAT_INTR_EN1_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14233 /* The address of the ALT_NAND_STAT_PAGE_CNT1 register for the ALT_SDM_NAND_STATUS instance. */
14234 #define ALT_SDM_NAND_STATUS_PAGE_CNT1_ADDR ALT_NAND_STAT_PAGE_CNT1_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14235 /* The address of the ALT_NAND_STAT_ERR_PAGE_ADDR1 register for the ALT_SDM_NAND_STATUS instance. */
14236 #define ALT_SDM_NAND_STATUS_ERR_PAGE_ADDR1_ADDR ALT_NAND_STAT_ERR_PAGE_ADDR1_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14237 /* The address of the ALT_NAND_STAT_ERR_BLOCK_ADDR1 register for the ALT_SDM_NAND_STATUS instance. */
14238 #define ALT_SDM_NAND_STATUS_ERR_BLOCK_ADDR1_ADDR ALT_NAND_STAT_ERR_BLOCK_ADDR1_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14239 /* The address of the ALT_NAND_STAT_INTR_STATUS2 register for the ALT_SDM_NAND_STATUS instance. */
14240 #define ALT_SDM_NAND_STATUS_INTR_STATUS2_ADDR ALT_NAND_STAT_INTR_STATUS2_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14241 /* The address of the ALT_NAND_STAT_INTR_EN2 register for the ALT_SDM_NAND_STATUS instance. */
14242 #define ALT_SDM_NAND_STATUS_INTR_EN2_ADDR ALT_NAND_STAT_INTR_EN2_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14243 /* The address of the ALT_NAND_STAT_PAGE_CNT2 register for the ALT_SDM_NAND_STATUS instance. */
14244 #define ALT_SDM_NAND_STATUS_PAGE_CNT2_ADDR ALT_NAND_STAT_PAGE_CNT2_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14245 /* The address of the ALT_NAND_STAT_ERR_PAGE_ADDR2 register for the ALT_SDM_NAND_STATUS instance. */
14246 #define ALT_SDM_NAND_STATUS_ERR_PAGE_ADDR2_ADDR ALT_NAND_STAT_ERR_PAGE_ADDR2_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14247 /* The address of the ALT_NAND_STAT_ERR_BLOCK_ADDR2 register for the ALT_SDM_NAND_STATUS instance. */
14248 #define ALT_SDM_NAND_STATUS_ERR_BLOCK_ADDR2_ADDR ALT_NAND_STAT_ERR_BLOCK_ADDR2_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14249 /* The address of the ALT_NAND_STAT_INTR_STATUS3 register for the ALT_SDM_NAND_STATUS instance. */
14250 #define ALT_SDM_NAND_STATUS_INTR_STATUS3_ADDR ALT_NAND_STAT_INTR_STATUS3_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14251 /* The address of the ALT_NAND_STAT_INTR_EN3 register for the ALT_SDM_NAND_STATUS instance. */
14252 #define ALT_SDM_NAND_STATUS_INTR_EN3_ADDR ALT_NAND_STAT_INTR_EN3_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14253 /* The address of the ALT_NAND_STAT_PAGE_CNT3 register for the ALT_SDM_NAND_STATUS instance. */
14254 #define ALT_SDM_NAND_STATUS_PAGE_CNT3_ADDR ALT_NAND_STAT_PAGE_CNT3_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14255 /* The address of the ALT_NAND_STAT_ERR_PAGE_ADDR3 register for the ALT_SDM_NAND_STATUS instance. */
14256 #define ALT_SDM_NAND_STATUS_ERR_PAGE_ADDR3_ADDR ALT_NAND_STAT_ERR_PAGE_ADDR3_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14257 /* The address of the ALT_NAND_STAT_ERR_BLOCK_ADDR3 register for the ALT_SDM_NAND_STATUS instance. */
14258 #define ALT_SDM_NAND_STATUS_ERR_BLOCK_ADDR3_ADDR ALT_NAND_STAT_ERR_BLOCK_ADDR3_ADDR(ALT_SDM_NAND_STATUS_ADDR)
14259 /* The base address byte offset for the start of the ALT_SDM_NAND_STATUS component. */
14260 #define ALT_SDM_NAND_STATUS_OFST 0xffa10400
14261 /* The start address of the ALT_SDM_NAND_STATUS component. */
14262 #define ALT_SDM_NAND_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_NAND_STATUS_OFST))
14263 /* The lower bound address range of the ALT_SDM_NAND_STATUS component. */
14264 #define ALT_SDM_NAND_STATUS_LB_ADDR ALT_SDM_NAND_STATUS_ADDR
14265 /* The upper bound address range of the ALT_SDM_NAND_STATUS component. */
14266 #define ALT_SDM_NAND_STATUS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_NAND_STATUS_ADDR) + 0x144) - 1))
14267 
14268 
14269 /*
14270  * Component Instance : sdm_nand_ecc
14271  *
14272  * Instance sdm_nand_ecc of component ALT_NAND_ECC.
14273  *
14274  *
14275  */
14276 /* The address of the ALT_NAND_ECC_ECCCORINFO_B01 register for the ALT_SDM_NAND_ECC instance. */
14277 #define ALT_SDM_NAND_ECC_ECCCORINFO_B01_ADDR ALT_NAND_ECC_ECCCORINFO_B01_ADDR(ALT_SDM_NAND_ECC_ADDR)
14278 /* The address of the ALT_NAND_ECC_ECCCORINFO_B23 register for the ALT_SDM_NAND_ECC instance. */
14279 #define ALT_SDM_NAND_ECC_ECCCORINFO_B23_ADDR ALT_NAND_ECC_ECCCORINFO_B23_ADDR(ALT_SDM_NAND_ECC_ADDR)
14280 /* The base address byte offset for the start of the ALT_SDM_NAND_ECC component. */
14281 #define ALT_SDM_NAND_ECC_OFST 0xffa10650
14282 /* The start address of the ALT_SDM_NAND_ECC component. */
14283 #define ALT_SDM_NAND_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_NAND_ECC_OFST))
14284 /* The lower bound address range of the ALT_SDM_NAND_ECC component. */
14285 #define ALT_SDM_NAND_ECC_LB_ADDR ALT_SDM_NAND_ECC_ADDR
14286 /* The upper bound address range of the ALT_SDM_NAND_ECC component. */
14287 #define ALT_SDM_NAND_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_NAND_ECC_ADDR) + 0x14) - 1))
14288 
14289 
14290 /*
14291  * Component Instance : sdm_nand_dma
14292  *
14293  * Instance sdm_nand_dma of component ALT_NAND_DMA.
14294  *
14295  *
14296  */
14297 /* The address of the ALT_NAND_DMA_DMA_ENABLE register for the ALT_SDM_NAND_DMA instance. */
14298 #define ALT_SDM_NAND_DMA_DMA_ENABLE_ADDR ALT_NAND_DMA_DMA_ENABLE_ADDR(ALT_SDM_NAND_DMA_ADDR)
14299 /* The address of the ALT_NAND_DMA_DMA_INTR register for the ALT_SDM_NAND_DMA instance. */
14300 #define ALT_SDM_NAND_DMA_DMA_INTR_ADDR ALT_NAND_DMA_DMA_INTR_ADDR(ALT_SDM_NAND_DMA_ADDR)
14301 /* The address of the ALT_NAND_DMA_DMA_INTR_EN register for the ALT_SDM_NAND_DMA instance. */
14302 #define ALT_SDM_NAND_DMA_DMA_INTR_EN_ADDR ALT_NAND_DMA_DMA_INTR_EN_ADDR(ALT_SDM_NAND_DMA_ADDR)
14303 /* The address of the ALT_NAND_DMA_TARGET_ERR_ADDR_LO register for the ALT_SDM_NAND_DMA instance. */
14304 #define ALT_SDM_NAND_DMA_TARGET_ERR_ADDR_LO_ADDR ALT_NAND_DMA_TARGET_ERR_ADDR_LO_ADDR(ALT_SDM_NAND_DMA_ADDR)
14305 /* The address of the ALT_NAND_DMA_TARGET_ERR_ADDR_HI register for the ALT_SDM_NAND_DMA instance. */
14306 #define ALT_SDM_NAND_DMA_TARGET_ERR_ADDR_HI_ADDR ALT_NAND_DMA_TARGET_ERR_ADDR_HI_ADDR(ALT_SDM_NAND_DMA_ADDR)
14307 /* The address of the ALT_NAND_DMA_CHNL_ACTIVE register for the ALT_SDM_NAND_DMA instance. */
14308 #define ALT_SDM_NAND_DMA_CHNL_ACTIVE_ADDR ALT_NAND_DMA_CHNL_ACTIVE_ADDR(ALT_SDM_NAND_DMA_ADDR)
14309 /* The address of the ALT_NAND_DMA_FLASH_BURST_LENGTH register for the ALT_SDM_NAND_DMA instance. */
14310 #define ALT_SDM_NAND_DMA_FLASH_BURST_LENGTH_ADDR ALT_NAND_DMA_FLASH_BURST_LENGTH_ADDR(ALT_SDM_NAND_DMA_ADDR)
14311 /* The address of the ALT_NAND_DMA_CHIP_INTERLEAVE_ENABLE_AND_ALLOW_INT_READS register for the ALT_SDM_NAND_DMA instance. */
14312 #define ALT_SDM_NAND_DMA_CHIP_INTERLEAVE_ENABLE_AND_ALLOW_INT_READS_ADDR ALT_NAND_DMA_CHIP_INTERLEAVE_ENABLE_AND_ALLOW_INT_READS_ADDR(ALT_SDM_NAND_DMA_ADDR)
14313 /* The address of the ALT_NAND_DMA_RESCAN_BUFFER_FLAG register for the ALT_SDM_NAND_DMA instance. */
14314 #define ALT_SDM_NAND_DMA_RESCAN_BUFFER_FLAG_ADDR ALT_NAND_DMA_RESCAN_BUFFER_FLAG_ADDR(ALT_SDM_NAND_DMA_ADDR)
14315 /* The address of the ALT_NAND_DMA_NO_OF_BLOCKS_PER_LUN register for the ALT_SDM_NAND_DMA instance. */
14316 #define ALT_SDM_NAND_DMA_NO_OF_BLOCKS_PER_LUN_ADDR ALT_NAND_DMA_NO_OF_BLOCKS_PER_LUN_ADDR(ALT_SDM_NAND_DMA_ADDR)
14317 /* The address of the ALT_NAND_DMA_LUN_STATUS_CMD register for the ALT_SDM_NAND_DMA instance. */
14318 #define ALT_SDM_NAND_DMA_LUN_STATUS_CMD_ADDR ALT_NAND_DMA_LUN_STATUS_CMD_ADDR(ALT_SDM_NAND_DMA_ADDR)
14319 /* The address of the ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR register for the ALT_SDM_NAND_DMA instance. */
14320 #define ALT_SDM_NAND_DMA_CMD_DMA_CHANNEL_ERROR_ADDR ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_ADDR(ALT_SDM_NAND_DMA_ADDR)
14321 /* The address of the ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_EN register for the ALT_SDM_NAND_DMA instance. */
14322 #define ALT_SDM_NAND_DMA_CMD_DMA_CHANNEL_ERROR_EN_ADDR ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_EN_ADDR(ALT_SDM_NAND_DMA_ADDR)
14323 /* The base address byte offset for the start of the ALT_SDM_NAND_DMA component. */
14324 #define ALT_SDM_NAND_DMA_OFST 0xffa10700
14325 /* The start address of the ALT_SDM_NAND_DMA component. */
14326 #define ALT_SDM_NAND_DMA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_NAND_DMA_OFST))
14327 /* The lower bound address range of the ALT_SDM_NAND_DMA component. */
14328 #define ALT_SDM_NAND_DMA_LB_ADDR ALT_SDM_NAND_DMA_ADDR
14329 /* The upper bound address range of the ALT_SDM_NAND_DMA component. */
14330 #define ALT_SDM_NAND_DMA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_NAND_DMA_ADDR) + 0xd4) - 1))
14331 
14332 
14333 /*
14334  * Component Instance : sdm_ecc_sdmmc
14335  *
14336  * Instance sdm_ecc_sdmmc of component ALT_ECC.
14337  *
14338  *
14339  */
14340 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_SDM_ECC_SDMMC instance. */
14341 #define ALT_SDM_ECC_SDMMC_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14342 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_SDM_ECC_SDMMC instance. */
14343 #define ALT_SDM_ECC_SDMMC_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14344 /* The address of the ALT_ECC_CTRL register for the ALT_SDM_ECC_SDMMC instance. */
14345 #define ALT_SDM_ECC_SDMMC_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14346 /* The address of the ALT_ECC_INITSTAT register for the ALT_SDM_ECC_SDMMC instance. */
14347 #define ALT_SDM_ECC_SDMMC_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14348 /* The address of the ALT_ECC_ERRINTEN register for the ALT_SDM_ECC_SDMMC instance. */
14349 #define ALT_SDM_ECC_SDMMC_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14350 /* The address of the ALT_ECC_ERRINTENS register for the ALT_SDM_ECC_SDMMC instance. */
14351 #define ALT_SDM_ECC_SDMMC_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14352 /* The address of the ALT_ECC_ERRINTENR register for the ALT_SDM_ECC_SDMMC instance. */
14353 #define ALT_SDM_ECC_SDMMC_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14354 /* The address of the ALT_ECC_INTMODE register for the ALT_SDM_ECC_SDMMC instance. */
14355 #define ALT_SDM_ECC_SDMMC_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14356 /* The address of the ALT_ECC_INTSTAT register for the ALT_SDM_ECC_SDMMC instance. */
14357 #define ALT_SDM_ECC_SDMMC_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14358 /* The address of the ALT_ECC_INTTEST register for the ALT_SDM_ECC_SDMMC instance. */
14359 #define ALT_SDM_ECC_SDMMC_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14360 /* The address of the ALT_ECC_MODSTAT register for the ALT_SDM_ECC_SDMMC instance. */
14361 #define ALT_SDM_ECC_SDMMC_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14362 /* The address of the ALT_ECC_DERRADDRA register for the ALT_SDM_ECC_SDMMC instance. */
14363 #define ALT_SDM_ECC_SDMMC_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14364 /* The address of the ALT_ECC_SERRADDRA register for the ALT_SDM_ECC_SDMMC instance. */
14365 #define ALT_SDM_ECC_SDMMC_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14366 /* The address of the ALT_ECC_DERRADDRB register for the ALT_SDM_ECC_SDMMC instance. */
14367 #define ALT_SDM_ECC_SDMMC_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14368 /* The address of the ALT_ECC_SERRADDRB register for the ALT_SDM_ECC_SDMMC instance. */
14369 #define ALT_SDM_ECC_SDMMC_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14370 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_SDM_ECC_SDMMC instance. */
14371 #define ALT_SDM_ECC_SDMMC_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14372 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_SDM_ECC_SDMMC instance. */
14373 #define ALT_SDM_ECC_SDMMC_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14374 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_SDM_ECC_SDMMC instance. */
14375 #define ALT_SDM_ECC_SDMMC_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14376 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_SDM_ECC_SDMMC instance. */
14377 #define ALT_SDM_ECC_SDMMC_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14378 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_SDM_ECC_SDMMC instance. */
14379 #define ALT_SDM_ECC_SDMMC_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14380 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_SDM_ECC_SDMMC instance. */
14381 #define ALT_SDM_ECC_SDMMC_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14382 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_SDM_ECC_SDMMC instance. */
14383 #define ALT_SDM_ECC_SDMMC_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14384 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_SDM_ECC_SDMMC instance. */
14385 #define ALT_SDM_ECC_SDMMC_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14386 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_SDM_ECC_SDMMC instance. */
14387 #define ALT_SDM_ECC_SDMMC_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14388 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_SDM_ECC_SDMMC instance. */
14389 #define ALT_SDM_ECC_SDMMC_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14390 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_SDM_ECC_SDMMC instance. */
14391 #define ALT_SDM_ECC_SDMMC_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14392 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_SDM_ECC_SDMMC instance. */
14393 #define ALT_SDM_ECC_SDMMC_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14394 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_SDM_ECC_SDMMC instance. */
14395 #define ALT_SDM_ECC_SDMMC_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14396 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_SDM_ECC_SDMMC instance. */
14397 #define ALT_SDM_ECC_SDMMC_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14398 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_SDM_ECC_SDMMC instance. */
14399 #define ALT_SDM_ECC_SDMMC_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14400 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_SDM_ECC_SDMMC instance. */
14401 #define ALT_SDM_ECC_SDMMC_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14402 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_SDM_ECC_SDMMC instance. */
14403 #define ALT_SDM_ECC_SDMMC_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14404 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_SDM_ECC_SDMMC instance. */
14405 #define ALT_SDM_ECC_SDMMC_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14406 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_SDM_ECC_SDMMC instance. */
14407 #define ALT_SDM_ECC_SDMMC_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14408 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_SDM_ECC_SDMMC instance. */
14409 #define ALT_SDM_ECC_SDMMC_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14410 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_SDM_ECC_SDMMC instance. */
14411 #define ALT_SDM_ECC_SDMMC_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_SDM_ECC_SDMMC_ADDR)
14412 /* The base address byte offset for the start of the ALT_SDM_ECC_SDMMC component. */
14413 #define ALT_SDM_ECC_SDMMC_OFST 0xffa20000
14414 /* The start address of the ALT_SDM_ECC_SDMMC component. */
14415 #define ALT_SDM_ECC_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_ECC_SDMMC_OFST))
14416 /* The lower bound address range of the ALT_SDM_ECC_SDMMC component. */
14417 #define ALT_SDM_ECC_SDMMC_LB_ADDR ALT_SDM_ECC_SDMMC_ADDR
14418 /* The upper bound address range of the ALT_SDM_ECC_SDMMC component. */
14419 #define ALT_SDM_ECC_SDMMC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_ECC_SDMMC_ADDR) + 0x400) - 1))
14420 
14421 
14422 /*
14423  * Component Instance : sdm_ecc_nand_w
14424  *
14425  * Instance sdm_ecc_nand_w of component ALT_ECC.
14426  *
14427  *
14428  */
14429 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_SDM_ECC_NAND_W instance. */
14430 #define ALT_SDM_ECC_NAND_W_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14431 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_SDM_ECC_NAND_W instance. */
14432 #define ALT_SDM_ECC_NAND_W_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14433 /* The address of the ALT_ECC_CTRL register for the ALT_SDM_ECC_NAND_W instance. */
14434 #define ALT_SDM_ECC_NAND_W_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14435 /* The address of the ALT_ECC_INITSTAT register for the ALT_SDM_ECC_NAND_W instance. */
14436 #define ALT_SDM_ECC_NAND_W_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14437 /* The address of the ALT_ECC_ERRINTEN register for the ALT_SDM_ECC_NAND_W instance. */
14438 #define ALT_SDM_ECC_NAND_W_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14439 /* The address of the ALT_ECC_ERRINTENS register for the ALT_SDM_ECC_NAND_W instance. */
14440 #define ALT_SDM_ECC_NAND_W_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14441 /* The address of the ALT_ECC_ERRINTENR register for the ALT_SDM_ECC_NAND_W instance. */
14442 #define ALT_SDM_ECC_NAND_W_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14443 /* The address of the ALT_ECC_INTMODE register for the ALT_SDM_ECC_NAND_W instance. */
14444 #define ALT_SDM_ECC_NAND_W_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14445 /* The address of the ALT_ECC_INTSTAT register for the ALT_SDM_ECC_NAND_W instance. */
14446 #define ALT_SDM_ECC_NAND_W_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14447 /* The address of the ALT_ECC_INTTEST register for the ALT_SDM_ECC_NAND_W instance. */
14448 #define ALT_SDM_ECC_NAND_W_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14449 /* The address of the ALT_ECC_MODSTAT register for the ALT_SDM_ECC_NAND_W instance. */
14450 #define ALT_SDM_ECC_NAND_W_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14451 /* The address of the ALT_ECC_DERRADDRA register for the ALT_SDM_ECC_NAND_W instance. */
14452 #define ALT_SDM_ECC_NAND_W_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14453 /* The address of the ALT_ECC_SERRADDRA register for the ALT_SDM_ECC_NAND_W instance. */
14454 #define ALT_SDM_ECC_NAND_W_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14455 /* The address of the ALT_ECC_DERRADDRB register for the ALT_SDM_ECC_NAND_W instance. */
14456 #define ALT_SDM_ECC_NAND_W_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14457 /* The address of the ALT_ECC_SERRADDRB register for the ALT_SDM_ECC_NAND_W instance. */
14458 #define ALT_SDM_ECC_NAND_W_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14459 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_SDM_ECC_NAND_W instance. */
14460 #define ALT_SDM_ECC_NAND_W_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14461 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_SDM_ECC_NAND_W instance. */
14462 #define ALT_SDM_ECC_NAND_W_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14463 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_SDM_ECC_NAND_W instance. */
14464 #define ALT_SDM_ECC_NAND_W_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14465 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_SDM_ECC_NAND_W instance. */
14466 #define ALT_SDM_ECC_NAND_W_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14467 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_SDM_ECC_NAND_W instance. */
14468 #define ALT_SDM_ECC_NAND_W_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14469 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_SDM_ECC_NAND_W instance. */
14470 #define ALT_SDM_ECC_NAND_W_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14471 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_SDM_ECC_NAND_W instance. */
14472 #define ALT_SDM_ECC_NAND_W_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14473 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_SDM_ECC_NAND_W instance. */
14474 #define ALT_SDM_ECC_NAND_W_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14475 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_SDM_ECC_NAND_W instance. */
14476 #define ALT_SDM_ECC_NAND_W_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14477 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_SDM_ECC_NAND_W instance. */
14478 #define ALT_SDM_ECC_NAND_W_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14479 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_SDM_ECC_NAND_W instance. */
14480 #define ALT_SDM_ECC_NAND_W_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14481 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_SDM_ECC_NAND_W instance. */
14482 #define ALT_SDM_ECC_NAND_W_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14483 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_SDM_ECC_NAND_W instance. */
14484 #define ALT_SDM_ECC_NAND_W_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14485 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_SDM_ECC_NAND_W instance. */
14486 #define ALT_SDM_ECC_NAND_W_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14487 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_SDM_ECC_NAND_W instance. */
14488 #define ALT_SDM_ECC_NAND_W_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14489 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_SDM_ECC_NAND_W instance. */
14490 #define ALT_SDM_ECC_NAND_W_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14491 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_SDM_ECC_NAND_W instance. */
14492 #define ALT_SDM_ECC_NAND_W_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14493 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_SDM_ECC_NAND_W instance. */
14494 #define ALT_SDM_ECC_NAND_W_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14495 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_SDM_ECC_NAND_W instance. */
14496 #define ALT_SDM_ECC_NAND_W_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14497 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_SDM_ECC_NAND_W instance. */
14498 #define ALT_SDM_ECC_NAND_W_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14499 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_SDM_ECC_NAND_W instance. */
14500 #define ALT_SDM_ECC_NAND_W_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_SDM_ECC_NAND_W_ADDR)
14501 /* The base address byte offset for the start of the ALT_SDM_ECC_NAND_W component. */
14502 #define ALT_SDM_ECC_NAND_W_OFST 0xffa20800
14503 /* The start address of the ALT_SDM_ECC_NAND_W component. */
14504 #define ALT_SDM_ECC_NAND_W_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_ECC_NAND_W_OFST))
14505 /* The lower bound address range of the ALT_SDM_ECC_NAND_W component. */
14506 #define ALT_SDM_ECC_NAND_W_LB_ADDR ALT_SDM_ECC_NAND_W_ADDR
14507 /* The upper bound address range of the ALT_SDM_ECC_NAND_W component. */
14508 #define ALT_SDM_ECC_NAND_W_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_ECC_NAND_W_ADDR) + 0x400) - 1))
14509 
14510 
14511 /*
14512  * Component Instance : sdm_ecc_nand_r
14513  *
14514  * Instance sdm_ecc_nand_r of component ALT_ECC.
14515  *
14516  *
14517  */
14518 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_SDM_ECC_NAND_R instance. */
14519 #define ALT_SDM_ECC_NAND_R_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14520 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_SDM_ECC_NAND_R instance. */
14521 #define ALT_SDM_ECC_NAND_R_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14522 /* The address of the ALT_ECC_CTRL register for the ALT_SDM_ECC_NAND_R instance. */
14523 #define ALT_SDM_ECC_NAND_R_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14524 /* The address of the ALT_ECC_INITSTAT register for the ALT_SDM_ECC_NAND_R instance. */
14525 #define ALT_SDM_ECC_NAND_R_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14526 /* The address of the ALT_ECC_ERRINTEN register for the ALT_SDM_ECC_NAND_R instance. */
14527 #define ALT_SDM_ECC_NAND_R_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14528 /* The address of the ALT_ECC_ERRINTENS register for the ALT_SDM_ECC_NAND_R instance. */
14529 #define ALT_SDM_ECC_NAND_R_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14530 /* The address of the ALT_ECC_ERRINTENR register for the ALT_SDM_ECC_NAND_R instance. */
14531 #define ALT_SDM_ECC_NAND_R_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14532 /* The address of the ALT_ECC_INTMODE register for the ALT_SDM_ECC_NAND_R instance. */
14533 #define ALT_SDM_ECC_NAND_R_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14534 /* The address of the ALT_ECC_INTSTAT register for the ALT_SDM_ECC_NAND_R instance. */
14535 #define ALT_SDM_ECC_NAND_R_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14536 /* The address of the ALT_ECC_INTTEST register for the ALT_SDM_ECC_NAND_R instance. */
14537 #define ALT_SDM_ECC_NAND_R_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14538 /* The address of the ALT_ECC_MODSTAT register for the ALT_SDM_ECC_NAND_R instance. */
14539 #define ALT_SDM_ECC_NAND_R_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14540 /* The address of the ALT_ECC_DERRADDRA register for the ALT_SDM_ECC_NAND_R instance. */
14541 #define ALT_SDM_ECC_NAND_R_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14542 /* The address of the ALT_ECC_SERRADDRA register for the ALT_SDM_ECC_NAND_R instance. */
14543 #define ALT_SDM_ECC_NAND_R_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14544 /* The address of the ALT_ECC_DERRADDRB register for the ALT_SDM_ECC_NAND_R instance. */
14545 #define ALT_SDM_ECC_NAND_R_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14546 /* The address of the ALT_ECC_SERRADDRB register for the ALT_SDM_ECC_NAND_R instance. */
14547 #define ALT_SDM_ECC_NAND_R_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14548 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_SDM_ECC_NAND_R instance. */
14549 #define ALT_SDM_ECC_NAND_R_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14550 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_SDM_ECC_NAND_R instance. */
14551 #define ALT_SDM_ECC_NAND_R_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14552 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_SDM_ECC_NAND_R instance. */
14553 #define ALT_SDM_ECC_NAND_R_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14554 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_SDM_ECC_NAND_R instance. */
14555 #define ALT_SDM_ECC_NAND_R_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14556 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_SDM_ECC_NAND_R instance. */
14557 #define ALT_SDM_ECC_NAND_R_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14558 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_SDM_ECC_NAND_R instance. */
14559 #define ALT_SDM_ECC_NAND_R_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14560 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_SDM_ECC_NAND_R instance. */
14561 #define ALT_SDM_ECC_NAND_R_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14562 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_SDM_ECC_NAND_R instance. */
14563 #define ALT_SDM_ECC_NAND_R_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14564 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_SDM_ECC_NAND_R instance. */
14565 #define ALT_SDM_ECC_NAND_R_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14566 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_SDM_ECC_NAND_R instance. */
14567 #define ALT_SDM_ECC_NAND_R_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14568 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_SDM_ECC_NAND_R instance. */
14569 #define ALT_SDM_ECC_NAND_R_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14570 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_SDM_ECC_NAND_R instance. */
14571 #define ALT_SDM_ECC_NAND_R_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14572 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_SDM_ECC_NAND_R instance. */
14573 #define ALT_SDM_ECC_NAND_R_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14574 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_SDM_ECC_NAND_R instance. */
14575 #define ALT_SDM_ECC_NAND_R_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14576 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_SDM_ECC_NAND_R instance. */
14577 #define ALT_SDM_ECC_NAND_R_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14578 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_SDM_ECC_NAND_R instance. */
14579 #define ALT_SDM_ECC_NAND_R_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14580 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_SDM_ECC_NAND_R instance. */
14581 #define ALT_SDM_ECC_NAND_R_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14582 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_SDM_ECC_NAND_R instance. */
14583 #define ALT_SDM_ECC_NAND_R_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14584 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_SDM_ECC_NAND_R instance. */
14585 #define ALT_SDM_ECC_NAND_R_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14586 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_SDM_ECC_NAND_R instance. */
14587 #define ALT_SDM_ECC_NAND_R_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14588 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_SDM_ECC_NAND_R instance. */
14589 #define ALT_SDM_ECC_NAND_R_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_SDM_ECC_NAND_R_ADDR)
14590 /* The base address byte offset for the start of the ALT_SDM_ECC_NAND_R component. */
14591 #define ALT_SDM_ECC_NAND_R_OFST 0xffa21000
14592 /* The start address of the ALT_SDM_ECC_NAND_R component. */
14593 #define ALT_SDM_ECC_NAND_R_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_ECC_NAND_R_OFST))
14594 /* The lower bound address range of the ALT_SDM_ECC_NAND_R component. */
14595 #define ALT_SDM_ECC_NAND_R_LB_ADDR ALT_SDM_ECC_NAND_R_ADDR
14596 /* The upper bound address range of the ALT_SDM_ECC_NAND_R component. */
14597 #define ALT_SDM_ECC_NAND_R_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_ECC_NAND_R_ADDR) + 0x400) - 1))
14598 
14599 
14600 /*
14601  * Component Instance : sdm_ecc_nand_e
14602  *
14603  * Instance sdm_ecc_nand_e of component ALT_ECC.
14604  *
14605  *
14606  */
14607 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_SDM_ECC_NAND_E instance. */
14608 #define ALT_SDM_ECC_NAND_E_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14609 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_SDM_ECC_NAND_E instance. */
14610 #define ALT_SDM_ECC_NAND_E_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14611 /* The address of the ALT_ECC_CTRL register for the ALT_SDM_ECC_NAND_E instance. */
14612 #define ALT_SDM_ECC_NAND_E_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14613 /* The address of the ALT_ECC_INITSTAT register for the ALT_SDM_ECC_NAND_E instance. */
14614 #define ALT_SDM_ECC_NAND_E_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14615 /* The address of the ALT_ECC_ERRINTEN register for the ALT_SDM_ECC_NAND_E instance. */
14616 #define ALT_SDM_ECC_NAND_E_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14617 /* The address of the ALT_ECC_ERRINTENS register for the ALT_SDM_ECC_NAND_E instance. */
14618 #define ALT_SDM_ECC_NAND_E_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14619 /* The address of the ALT_ECC_ERRINTENR register for the ALT_SDM_ECC_NAND_E instance. */
14620 #define ALT_SDM_ECC_NAND_E_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14621 /* The address of the ALT_ECC_INTMODE register for the ALT_SDM_ECC_NAND_E instance. */
14622 #define ALT_SDM_ECC_NAND_E_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14623 /* The address of the ALT_ECC_INTSTAT register for the ALT_SDM_ECC_NAND_E instance. */
14624 #define ALT_SDM_ECC_NAND_E_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14625 /* The address of the ALT_ECC_INTTEST register for the ALT_SDM_ECC_NAND_E instance. */
14626 #define ALT_SDM_ECC_NAND_E_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14627 /* The address of the ALT_ECC_MODSTAT register for the ALT_SDM_ECC_NAND_E instance. */
14628 #define ALT_SDM_ECC_NAND_E_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14629 /* The address of the ALT_ECC_DERRADDRA register for the ALT_SDM_ECC_NAND_E instance. */
14630 #define ALT_SDM_ECC_NAND_E_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14631 /* The address of the ALT_ECC_SERRADDRA register for the ALT_SDM_ECC_NAND_E instance. */
14632 #define ALT_SDM_ECC_NAND_E_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14633 /* The address of the ALT_ECC_DERRADDRB register for the ALT_SDM_ECC_NAND_E instance. */
14634 #define ALT_SDM_ECC_NAND_E_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14635 /* The address of the ALT_ECC_SERRADDRB register for the ALT_SDM_ECC_NAND_E instance. */
14636 #define ALT_SDM_ECC_NAND_E_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14637 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_SDM_ECC_NAND_E instance. */
14638 #define ALT_SDM_ECC_NAND_E_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14639 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_SDM_ECC_NAND_E instance. */
14640 #define ALT_SDM_ECC_NAND_E_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14641 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_SDM_ECC_NAND_E instance. */
14642 #define ALT_SDM_ECC_NAND_E_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14643 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_SDM_ECC_NAND_E instance. */
14644 #define ALT_SDM_ECC_NAND_E_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14645 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_SDM_ECC_NAND_E instance. */
14646 #define ALT_SDM_ECC_NAND_E_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14647 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_SDM_ECC_NAND_E instance. */
14648 #define ALT_SDM_ECC_NAND_E_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14649 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_SDM_ECC_NAND_E instance. */
14650 #define ALT_SDM_ECC_NAND_E_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14651 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_SDM_ECC_NAND_E instance. */
14652 #define ALT_SDM_ECC_NAND_E_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14653 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_SDM_ECC_NAND_E instance. */
14654 #define ALT_SDM_ECC_NAND_E_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14655 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_SDM_ECC_NAND_E instance. */
14656 #define ALT_SDM_ECC_NAND_E_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14657 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_SDM_ECC_NAND_E instance. */
14658 #define ALT_SDM_ECC_NAND_E_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14659 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_SDM_ECC_NAND_E instance. */
14660 #define ALT_SDM_ECC_NAND_E_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14661 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_SDM_ECC_NAND_E instance. */
14662 #define ALT_SDM_ECC_NAND_E_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14663 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_SDM_ECC_NAND_E instance. */
14664 #define ALT_SDM_ECC_NAND_E_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14665 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_SDM_ECC_NAND_E instance. */
14666 #define ALT_SDM_ECC_NAND_E_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14667 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_SDM_ECC_NAND_E instance. */
14668 #define ALT_SDM_ECC_NAND_E_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14669 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_SDM_ECC_NAND_E instance. */
14670 #define ALT_SDM_ECC_NAND_E_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14671 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_SDM_ECC_NAND_E instance. */
14672 #define ALT_SDM_ECC_NAND_E_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14673 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_SDM_ECC_NAND_E instance. */
14674 #define ALT_SDM_ECC_NAND_E_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14675 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_SDM_ECC_NAND_E instance. */
14676 #define ALT_SDM_ECC_NAND_E_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14677 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_SDM_ECC_NAND_E instance. */
14678 #define ALT_SDM_ECC_NAND_E_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_SDM_ECC_NAND_E_ADDR)
14679 /* The base address byte offset for the start of the ALT_SDM_ECC_NAND_E component. */
14680 #define ALT_SDM_ECC_NAND_E_OFST 0xffa21800
14681 /* The start address of the ALT_SDM_ECC_NAND_E component. */
14682 #define ALT_SDM_ECC_NAND_E_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_ECC_NAND_E_OFST))
14683 /* The lower bound address range of the ALT_SDM_ECC_NAND_E component. */
14684 #define ALT_SDM_ECC_NAND_E_LB_ADDR ALT_SDM_ECC_NAND_E_ADDR
14685 /* The upper bound address range of the ALT_SDM_ECC_NAND_E component. */
14686 #define ALT_SDM_ECC_NAND_E_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_ECC_NAND_E_ADDR) + 0x400) - 1))
14687 
14688 
14689 /*
14690  * Component Instance : sdm_ecc_qspi
14691  *
14692  * Instance sdm_ecc_qspi of component ALT_ECC.
14693  *
14694  *
14695  */
14696 /* The address of the ALT_ECC_IP_REV_ID register for the ALT_SDM_ECC_QSPI instance. */
14697 #define ALT_SDM_ECC_QSPI_IP_REV_ID_ADDR ALT_ECC_IP_REV_ID_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14698 /* The address of the ALT_ECC_IP_REV_ID2 register for the ALT_SDM_ECC_QSPI instance. */
14699 #define ALT_SDM_ECC_QSPI_IP_REV_ID2_ADDR ALT_ECC_IP_REV_ID2_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14700 /* The address of the ALT_ECC_CTRL register for the ALT_SDM_ECC_QSPI instance. */
14701 #define ALT_SDM_ECC_QSPI_CTRL_ADDR ALT_ECC_CTRL_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14702 /* The address of the ALT_ECC_INITSTAT register for the ALT_SDM_ECC_QSPI instance. */
14703 #define ALT_SDM_ECC_QSPI_INITSTAT_ADDR ALT_ECC_INITSTAT_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14704 /* The address of the ALT_ECC_ERRINTEN register for the ALT_SDM_ECC_QSPI instance. */
14705 #define ALT_SDM_ECC_QSPI_ERRINTEN_ADDR ALT_ECC_ERRINTEN_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14706 /* The address of the ALT_ECC_ERRINTENS register for the ALT_SDM_ECC_QSPI instance. */
14707 #define ALT_SDM_ECC_QSPI_ERRINTENS_ADDR ALT_ECC_ERRINTENS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14708 /* The address of the ALT_ECC_ERRINTENR register for the ALT_SDM_ECC_QSPI instance. */
14709 #define ALT_SDM_ECC_QSPI_ERRINTENR_ADDR ALT_ECC_ERRINTENR_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14710 /* The address of the ALT_ECC_INTMODE register for the ALT_SDM_ECC_QSPI instance. */
14711 #define ALT_SDM_ECC_QSPI_INTMODE_ADDR ALT_ECC_INTMODE_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14712 /* The address of the ALT_ECC_INTSTAT register for the ALT_SDM_ECC_QSPI instance. */
14713 #define ALT_SDM_ECC_QSPI_INTSTAT_ADDR ALT_ECC_INTSTAT_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14714 /* The address of the ALT_ECC_INTTEST register for the ALT_SDM_ECC_QSPI instance. */
14715 #define ALT_SDM_ECC_QSPI_INTTEST_ADDR ALT_ECC_INTTEST_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14716 /* The address of the ALT_ECC_MODSTAT register for the ALT_SDM_ECC_QSPI instance. */
14717 #define ALT_SDM_ECC_QSPI_MODSTAT_ADDR ALT_ECC_MODSTAT_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14718 /* The address of the ALT_ECC_DERRADDRA register for the ALT_SDM_ECC_QSPI instance. */
14719 #define ALT_SDM_ECC_QSPI_DERRADDRA_ADDR ALT_ECC_DERRADDRA_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14720 /* The address of the ALT_ECC_SERRADDRA register for the ALT_SDM_ECC_QSPI instance. */
14721 #define ALT_SDM_ECC_QSPI_SERRADDRA_ADDR ALT_ECC_SERRADDRA_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14722 /* The address of the ALT_ECC_DERRADDRB register for the ALT_SDM_ECC_QSPI instance. */
14723 #define ALT_SDM_ECC_QSPI_DERRADDRB_ADDR ALT_ECC_DERRADDRB_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14724 /* The address of the ALT_ECC_SERRADDRB register for the ALT_SDM_ECC_QSPI instance. */
14725 #define ALT_SDM_ECC_QSPI_SERRADDRB_ADDR ALT_ECC_SERRADDRB_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14726 /* The address of the ALT_ECC_SERRCNTREG register for the ALT_SDM_ECC_QSPI instance. */
14727 #define ALT_SDM_ECC_QSPI_SERRCNTREG_ADDR ALT_ECC_SERRCNTREG_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14728 /* The address of the ALT_ECC_ECC_ADDRBUS register for the ALT_SDM_ECC_QSPI instance. */
14729 #define ALT_SDM_ECC_QSPI_ECC_ADDRBUS_ADDR ALT_ECC_ECC_ADDRBUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14730 /* The address of the ALT_ECC_ECC_RDATA0BUS register for the ALT_SDM_ECC_QSPI instance. */
14731 #define ALT_SDM_ECC_QSPI_ECC_RDATA0BUS_ADDR ALT_ECC_ECC_RDATA0BUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14732 /* The address of the ALT_ECC_ECC_RDATA1BUS register for the ALT_SDM_ECC_QSPI instance. */
14733 #define ALT_SDM_ECC_QSPI_ECC_RDATA1BUS_ADDR ALT_ECC_ECC_RDATA1BUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14734 /* The address of the ALT_ECC_ECC_RDATA2BUS register for the ALT_SDM_ECC_QSPI instance. */
14735 #define ALT_SDM_ECC_QSPI_ECC_RDATA2BUS_ADDR ALT_ECC_ECC_RDATA2BUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14736 /* The address of the ALT_ECC_ECC_RDATA3BUS register for the ALT_SDM_ECC_QSPI instance. */
14737 #define ALT_SDM_ECC_QSPI_ECC_RDATA3BUS_ADDR ALT_ECC_ECC_RDATA3BUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14738 /* The address of the ALT_ECC_ECC_WDATA0BUS register for the ALT_SDM_ECC_QSPI instance. */
14739 #define ALT_SDM_ECC_QSPI_ECC_WDATA0BUS_ADDR ALT_ECC_ECC_WDATA0BUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14740 /* The address of the ALT_ECC_ECC_WDATA1BUS register for the ALT_SDM_ECC_QSPI instance. */
14741 #define ALT_SDM_ECC_QSPI_ECC_WDATA1BUS_ADDR ALT_ECC_ECC_WDATA1BUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14742 /* The address of the ALT_ECC_ECC_WDATA2BUS register for the ALT_SDM_ECC_QSPI instance. */
14743 #define ALT_SDM_ECC_QSPI_ECC_WDATA2BUS_ADDR ALT_ECC_ECC_WDATA2BUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14744 /* The address of the ALT_ECC_ECC_WDATA3BUS register for the ALT_SDM_ECC_QSPI instance. */
14745 #define ALT_SDM_ECC_QSPI_ECC_WDATA3BUS_ADDR ALT_ECC_ECC_WDATA3BUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14746 /* The address of the ALT_ECC_ECC_RDATAECC0BUS register for the ALT_SDM_ECC_QSPI instance. */
14747 #define ALT_SDM_ECC_QSPI_ECC_RDATAECC0BUS_ADDR ALT_ECC_ECC_RDATAECC0BUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14748 /* The address of the ALT_ECC_ECC_RDATAECC1BUS register for the ALT_SDM_ECC_QSPI instance. */
14749 #define ALT_SDM_ECC_QSPI_ECC_RDATAECC1BUS_ADDR ALT_ECC_ECC_RDATAECC1BUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14750 /* The address of the ALT_ECC_ECC_WDATAECC0BUS register for the ALT_SDM_ECC_QSPI instance. */
14751 #define ALT_SDM_ECC_QSPI_ECC_WDATAECC0BUS_ADDR ALT_ECC_ECC_WDATAECC0BUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14752 /* The address of the ALT_ECC_ECC_WDATAECC1BUS register for the ALT_SDM_ECC_QSPI instance. */
14753 #define ALT_SDM_ECC_QSPI_ECC_WDATAECC1BUS_ADDR ALT_ECC_ECC_WDATAECC1BUS_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14754 /* The address of the ALT_ECC_ECC_DBYTECTRL register for the ALT_SDM_ECC_QSPI instance. */
14755 #define ALT_SDM_ECC_QSPI_ECC_DBYTECTRL_ADDR ALT_ECC_ECC_DBYTECTRL_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14756 /* The address of the ALT_ECC_ECC_ACCCTRL register for the ALT_SDM_ECC_QSPI instance. */
14757 #define ALT_SDM_ECC_QSPI_ECC_ACCCTRL_ADDR ALT_ECC_ECC_ACCCTRL_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14758 /* The address of the ALT_ECC_ECC_STARTACC register for the ALT_SDM_ECC_QSPI instance. */
14759 #define ALT_SDM_ECC_QSPI_ECC_STARTACC_ADDR ALT_ECC_ECC_STARTACC_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14760 /* The address of the ALT_ECC_ECC_WDCTRL register for the ALT_SDM_ECC_QSPI instance. */
14761 #define ALT_SDM_ECC_QSPI_ECC_WDCTRL_ADDR ALT_ECC_ECC_WDCTRL_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14762 /* The address of the ALT_ECC_ECC_DECODERSTAT register for the ALT_SDM_ECC_QSPI instance. */
14763 #define ALT_SDM_ECC_QSPI_ECC_DECODERSTAT_ADDR ALT_ECC_ECC_DECODERSTAT_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14764 /* The address of the ALT_ECC_SERRLKUPA0 register for the ALT_SDM_ECC_QSPI instance. */
14765 #define ALT_SDM_ECC_QSPI_SERRLKUPA0_ADDR ALT_ECC_SERRLKUPA0_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14766 /* The address of the ALT_ECC_SERRLKUPB0 register for the ALT_SDM_ECC_QSPI instance. */
14767 #define ALT_SDM_ECC_QSPI_SERRLKUPB0_ADDR ALT_ECC_SERRLKUPB0_ADDR(ALT_SDM_ECC_QSPI_ADDR)
14768 /* The base address byte offset for the start of the ALT_SDM_ECC_QSPI component. */
14769 #define ALT_SDM_ECC_QSPI_OFST 0xffa22000
14770 /* The start address of the ALT_SDM_ECC_QSPI component. */
14771 #define ALT_SDM_ECC_QSPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDM_ECC_QSPI_OFST))
14772 /* The lower bound address range of the ALT_SDM_ECC_QSPI component. */
14773 #define ALT_SDM_ECC_QSPI_LB_ADDR ALT_SDM_ECC_QSPI_ADDR
14774 /* The upper bound address range of the ALT_SDM_ECC_QSPI component. */
14775 #define ALT_SDM_ECC_QSPI_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDM_ECC_QSPI_ADDR) + 0x400) - 1))
14776 
14777 
14778 /*
14779  * Component Instance : mbox
14780  *
14781  * Instance mbox of component ALT_MBOX.
14782  *
14783  *
14784  */
14785 /* The base address byte offset for the start of the ALT_MBOX component. */
14786 #define ALT_MBOX_OFST 0xffa30000
14787 /* The start address of the ALT_MBOX component. */
14788 #define ALT_MBOX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MBOX_OFST))
14789 /* The lower bound address range of the ALT_MBOX component. */
14790 #define ALT_MBOX_LB_ADDR ALT_MBOX_ADDR
14791 /* The upper bound address range of the ALT_MBOX component. */
14792 #define ALT_MBOX_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MBOX_ADDR) + 0x100) - 1))
14793 
14794 
14795 /*
14796  * Component Instance : doorbell_in
14797  *
14798  * Instance doorbell_in of component ALT_DOORBELL_IN.
14799  *
14800  *
14801  */
14802 /* The address of the ALT_DOORBELL_IN_EM2SDM register for the ALT_DOORBELL_IN instance. */
14803 #define ALT_DOORBELL_IN_EM2SDM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_DOORBELL_IN_ADDR) + ALT_DOORBELL_IN_EM2SDM_OFST))
14804 /* The base address byte offset for the start of the ALT_DOORBELL_IN component. */
14805 #define ALT_DOORBELL_IN_OFST 0xffa30400
14806 /* The start address of the ALT_DOORBELL_IN component. */
14807 #define ALT_DOORBELL_IN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DOORBELL_IN_OFST))
14808 /* The lower bound address range of the ALT_DOORBELL_IN component. */
14809 #define ALT_DOORBELL_IN_LB_ADDR ALT_DOORBELL_IN_ADDR
14810 /* The upper bound address range of the ALT_DOORBELL_IN component. */
14811 #define ALT_DOORBELL_IN_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DOORBELL_IN_ADDR) + 0xc) - 1))
14812 
14813 
14814 /*
14815  * Component Instance : doorbell_out
14816  *
14817  * Instance doorbell_out of component ALT_DOORBELL_OUT.
14818  *
14819  *
14820  */
14821 /* The address of the ALT_DOORBELL_OUT_SDM2EM register for the ALT_DOORBELL_OUT instance. */
14822 #define ALT_DOORBELL_OUT_SDM2EM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_DOORBELL_OUT_ADDR) + ALT_DOORBELL_OUT_SDM2EM_OFST))
14823 /* The base address byte offset for the start of the ALT_DOORBELL_OUT component. */
14824 #define ALT_DOORBELL_OUT_OFST 0xffa30480
14825 /* The start address of the ALT_DOORBELL_OUT component. */
14826 #define ALT_DOORBELL_OUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DOORBELL_OUT_OFST))
14827 /* The lower bound address range of the ALT_DOORBELL_OUT component. */
14828 #define ALT_DOORBELL_OUT_LB_ADDR ALT_DOORBELL_OUT_ADDR
14829 /* The upper bound address range of the ALT_DOORBELL_OUT component. */
14830 #define ALT_DOORBELL_OUT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DOORBELL_OUT_ADDR) + 0xc) - 1))
14831 
14832 
14833 /*
14834  * Component Instance : mbox_stream
14835  *
14836  * Instance mbox_stream of component ALT_MBOX_STREAM.
14837  *
14838  *
14839  */
14840 /* The base address byte offset for the start of the ALT_MBOX_STREAM component. */
14841 #define ALT_MBOX_STREAM_OFST 0xffa31000
14842 /* The start address of the ALT_MBOX_STREAM component. */
14843 #define ALT_MBOX_STREAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MBOX_STREAM_OFST))
14844 /* The lower bound address range of the ALT_MBOX_STREAM component. */
14845 #define ALT_MBOX_STREAM_LB_ADDR ALT_MBOX_STREAM_ADDR
14846 /* The upper bound address range of the ALT_MBOX_STREAM component. */
14847 #define ALT_MBOX_STREAM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MBOX_STREAM_ADDR) + 0xf000) - 1))
14848 
14849 
14850 /*
14851  * Component Instance : usb0_intreg
14852  *
14853  * Instance usb0_intreg of component ALT_USB_INTREG.
14854  *
14855  *
14856  */
14857 /* The address of the ALT_USB_INTREG_GOTGCTL register for the ALT_USB0_INTREG instance. */
14858 #define ALT_USB0_INTREG_GOTGCTL_ADDR ALT_USB_INTREG_GOTGCTL_ADDR(ALT_USB0_INTREG_ADDR)
14859 /* The address of the ALT_USB_INTREG_GOTGINT register for the ALT_USB0_INTREG instance. */
14860 #define ALT_USB0_INTREG_GOTGINT_ADDR ALT_USB_INTREG_GOTGINT_ADDR(ALT_USB0_INTREG_ADDR)
14861 /* The address of the ALT_USB_INTREG_GAHBCFG register for the ALT_USB0_INTREG instance. */
14862 #define ALT_USB0_INTREG_GAHBCFG_ADDR ALT_USB_INTREG_GAHBCFG_ADDR(ALT_USB0_INTREG_ADDR)
14863 /* The address of the ALT_USB_INTREG_GUSBCFG register for the ALT_USB0_INTREG instance. */
14864 #define ALT_USB0_INTREG_GUSBCFG_ADDR ALT_USB_INTREG_GUSBCFG_ADDR(ALT_USB0_INTREG_ADDR)
14865 /* The address of the ALT_USB_INTREG_GRSTCTL register for the ALT_USB0_INTREG instance. */
14866 #define ALT_USB0_INTREG_GRSTCTL_ADDR ALT_USB_INTREG_GRSTCTL_ADDR(ALT_USB0_INTREG_ADDR)
14867 /* The address of the ALT_USB_INTREG_GINTSTS register for the ALT_USB0_INTREG instance. */
14868 #define ALT_USB0_INTREG_GINTSTS_ADDR ALT_USB_INTREG_GINTSTS_ADDR(ALT_USB0_INTREG_ADDR)
14869 /* The address of the ALT_USB_INTREG_GINTMSK register for the ALT_USB0_INTREG instance. */
14870 #define ALT_USB0_INTREG_GINTMSK_ADDR ALT_USB_INTREG_GINTMSK_ADDR(ALT_USB0_INTREG_ADDR)
14871 /* The address of the ALT_USB_INTREG_GRXSTSR register for the ALT_USB0_INTREG instance. */
14872 #define ALT_USB0_INTREG_GRXSTSR_ADDR ALT_USB_INTREG_GRXSTSR_ADDR(ALT_USB0_INTREG_ADDR)
14873 /* The address of the ALT_USB_INTREG_GRXSTSP register for the ALT_USB0_INTREG instance. */
14874 #define ALT_USB0_INTREG_GRXSTSP_ADDR ALT_USB_INTREG_GRXSTSP_ADDR(ALT_USB0_INTREG_ADDR)
14875 /* The address of the ALT_USB_INTREG_GRXFSIZ register for the ALT_USB0_INTREG instance. */
14876 #define ALT_USB0_INTREG_GRXFSIZ_ADDR ALT_USB_INTREG_GRXFSIZ_ADDR(ALT_USB0_INTREG_ADDR)
14877 /* The address of the ALT_USB_INTREG_GNPTXFSIZ register for the ALT_USB0_INTREG instance. */
14878 #define ALT_USB0_INTREG_GNPTXFSIZ_ADDR ALT_USB_INTREG_GNPTXFSIZ_ADDR(ALT_USB0_INTREG_ADDR)
14879 /* The address of the ALT_USB_INTREG_GNPTXSTS register for the ALT_USB0_INTREG instance. */
14880 #define ALT_USB0_INTREG_GNPTXSTS_ADDR ALT_USB_INTREG_GNPTXSTS_ADDR(ALT_USB0_INTREG_ADDR)
14881 /* The address of the ALT_USB_INTREG_GPVNDCTL register for the ALT_USB0_INTREG instance. */
14882 #define ALT_USB0_INTREG_GPVNDCTL_ADDR ALT_USB_INTREG_GPVNDCTL_ADDR(ALT_USB0_INTREG_ADDR)
14883 /* The address of the ALT_USB_INTREG_GGPIO register for the ALT_USB0_INTREG instance. */
14884 #define ALT_USB0_INTREG_GGPIO_ADDR ALT_USB_INTREG_GGPIO_ADDR(ALT_USB0_INTREG_ADDR)
14885 /* The address of the ALT_USB_INTREG_GUID register for the ALT_USB0_INTREG instance. */
14886 #define ALT_USB0_INTREG_GUID_ADDR ALT_USB_INTREG_GUID_ADDR(ALT_USB0_INTREG_ADDR)
14887 /* The address of the ALT_USB_INTREG_GSNPSID register for the ALT_USB0_INTREG instance. */
14888 #define ALT_USB0_INTREG_GSNPSID_ADDR ALT_USB_INTREG_GSNPSID_ADDR(ALT_USB0_INTREG_ADDR)
14889 /* The address of the ALT_USB_INTREG_GHWCFG1 register for the ALT_USB0_INTREG instance. */
14890 #define ALT_USB0_INTREG_GHWCFG1_ADDR ALT_USB_INTREG_GHWCFG1_ADDR(ALT_USB0_INTREG_ADDR)
14891 /* The address of the ALT_USB_INTREG_GHWCFG2 register for the ALT_USB0_INTREG instance. */
14892 #define ALT_USB0_INTREG_GHWCFG2_ADDR ALT_USB_INTREG_GHWCFG2_ADDR(ALT_USB0_INTREG_ADDR)
14893 /* The address of the ALT_USB_INTREG_GHWCFG3 register for the ALT_USB0_INTREG instance. */
14894 #define ALT_USB0_INTREG_GHWCFG3_ADDR ALT_USB_INTREG_GHWCFG3_ADDR(ALT_USB0_INTREG_ADDR)
14895 /* The address of the ALT_USB_INTREG_GHWCFG4 register for the ALT_USB0_INTREG instance. */
14896 #define ALT_USB0_INTREG_GHWCFG4_ADDR ALT_USB_INTREG_GHWCFG4_ADDR(ALT_USB0_INTREG_ADDR)
14897 /* The address of the ALT_USB_INTREG_GDFIFOCFG register for the ALT_USB0_INTREG instance. */
14898 #define ALT_USB0_INTREG_GDFIFOCFG_ADDR ALT_USB_INTREG_GDFIFOCFG_ADDR(ALT_USB0_INTREG_ADDR)
14899 /* The address of the ALT_USB_INTREG_HPTXFSIZ register for the ALT_USB0_INTREG instance. */
14900 #define ALT_USB0_INTREG_HPTXFSIZ_ADDR ALT_USB_INTREG_HPTXFSIZ_ADDR(ALT_USB0_INTREG_ADDR)
14901 /* The address of the ALT_USB_INTREG_DIEPTXF1 register for the ALT_USB0_INTREG instance. */
14902 #define ALT_USB0_INTREG_DIEPTXF1_ADDR ALT_USB_INTREG_DIEPTXF1_ADDR(ALT_USB0_INTREG_ADDR)
14903 /* The address of the ALT_USB_INTREG_DIEPTXF2 register for the ALT_USB0_INTREG instance. */
14904 #define ALT_USB0_INTREG_DIEPTXF2_ADDR ALT_USB_INTREG_DIEPTXF2_ADDR(ALT_USB0_INTREG_ADDR)
14905 /* The address of the ALT_USB_INTREG_DIEPTXF3 register for the ALT_USB0_INTREG instance. */
14906 #define ALT_USB0_INTREG_DIEPTXF3_ADDR ALT_USB_INTREG_DIEPTXF3_ADDR(ALT_USB0_INTREG_ADDR)
14907 /* The address of the ALT_USB_INTREG_DIEPTXF4 register for the ALT_USB0_INTREG instance. */
14908 #define ALT_USB0_INTREG_DIEPTXF4_ADDR ALT_USB_INTREG_DIEPTXF4_ADDR(ALT_USB0_INTREG_ADDR)
14909 /* The address of the ALT_USB_INTREG_DIEPTXF5 register for the ALT_USB0_INTREG instance. */
14910 #define ALT_USB0_INTREG_DIEPTXF5_ADDR ALT_USB_INTREG_DIEPTXF5_ADDR(ALT_USB0_INTREG_ADDR)
14911 /* The address of the ALT_USB_INTREG_DIEPTXF6 register for the ALT_USB0_INTREG instance. */
14912 #define ALT_USB0_INTREG_DIEPTXF6_ADDR ALT_USB_INTREG_DIEPTXF6_ADDR(ALT_USB0_INTREG_ADDR)
14913 /* The address of the ALT_USB_INTREG_DIEPTXF7 register for the ALT_USB0_INTREG instance. */
14914 #define ALT_USB0_INTREG_DIEPTXF7_ADDR ALT_USB_INTREG_DIEPTXF7_ADDR(ALT_USB0_INTREG_ADDR)
14915 /* The address of the ALT_USB_INTREG_DIEPTXF8 register for the ALT_USB0_INTREG instance. */
14916 #define ALT_USB0_INTREG_DIEPTXF8_ADDR ALT_USB_INTREG_DIEPTXF8_ADDR(ALT_USB0_INTREG_ADDR)
14917 /* The address of the ALT_USB_INTREG_DIEPTXF9 register for the ALT_USB0_INTREG instance. */
14918 #define ALT_USB0_INTREG_DIEPTXF9_ADDR ALT_USB_INTREG_DIEPTXF9_ADDR(ALT_USB0_INTREG_ADDR)
14919 /* The address of the ALT_USB_INTREG_DIEPTXF10 register for the ALT_USB0_INTREG instance. */
14920 #define ALT_USB0_INTREG_DIEPTXF10_ADDR ALT_USB_INTREG_DIEPTXF10_ADDR(ALT_USB0_INTREG_ADDR)
14921 /* The address of the ALT_USB_INTREG_DIEPTXF11 register for the ALT_USB0_INTREG instance. */
14922 #define ALT_USB0_INTREG_DIEPTXF11_ADDR ALT_USB_INTREG_DIEPTXF11_ADDR(ALT_USB0_INTREG_ADDR)
14923 /* The address of the ALT_USB_INTREG_DIEPTXF12 register for the ALT_USB0_INTREG instance. */
14924 #define ALT_USB0_INTREG_DIEPTXF12_ADDR ALT_USB_INTREG_DIEPTXF12_ADDR(ALT_USB0_INTREG_ADDR)
14925 /* The address of the ALT_USB_INTREG_DIEPTXF13 register for the ALT_USB0_INTREG instance. */
14926 #define ALT_USB0_INTREG_DIEPTXF13_ADDR ALT_USB_INTREG_DIEPTXF13_ADDR(ALT_USB0_INTREG_ADDR)
14927 /* The address of the ALT_USB_INTREG_DIEPTXF14 register for the ALT_USB0_INTREG instance. */
14928 #define ALT_USB0_INTREG_DIEPTXF14_ADDR ALT_USB_INTREG_DIEPTXF14_ADDR(ALT_USB0_INTREG_ADDR)
14929 /* The address of the ALT_USB_INTREG_DIEPTXF15 register for the ALT_USB0_INTREG instance. */
14930 #define ALT_USB0_INTREG_DIEPTXF15_ADDR ALT_USB_INTREG_DIEPTXF15_ADDR(ALT_USB0_INTREG_ADDR)
14931 /* The address of the ALT_USB_INTREG_HCFG register for the ALT_USB0_INTREG instance. */
14932 #define ALT_USB0_INTREG_HCFG_ADDR ALT_USB_INTREG_HCFG_ADDR(ALT_USB0_INTREG_ADDR)
14933 /* The address of the ALT_USB_INTREG_HFIR register for the ALT_USB0_INTREG instance. */
14934 #define ALT_USB0_INTREG_HFIR_ADDR ALT_USB_INTREG_HFIR_ADDR(ALT_USB0_INTREG_ADDR)
14935 /* The address of the ALT_USB_INTREG_HFNUM register for the ALT_USB0_INTREG instance. */
14936 #define ALT_USB0_INTREG_HFNUM_ADDR ALT_USB_INTREG_HFNUM_ADDR(ALT_USB0_INTREG_ADDR)
14937 /* The address of the ALT_USB_INTREG_HPTXSTS register for the ALT_USB0_INTREG instance. */
14938 #define ALT_USB0_INTREG_HPTXSTS_ADDR ALT_USB_INTREG_HPTXSTS_ADDR(ALT_USB0_INTREG_ADDR)
14939 /* The address of the ALT_USB_INTREG_HAINT register for the ALT_USB0_INTREG instance. */
14940 #define ALT_USB0_INTREG_HAINT_ADDR ALT_USB_INTREG_HAINT_ADDR(ALT_USB0_INTREG_ADDR)
14941 /* The address of the ALT_USB_INTREG_HAINTMSK register for the ALT_USB0_INTREG instance. */
14942 #define ALT_USB0_INTREG_HAINTMSK_ADDR ALT_USB_INTREG_HAINTMSK_ADDR(ALT_USB0_INTREG_ADDR)
14943 /* The address of the ALT_USB_INTREG_HFLBADDR register for the ALT_USB0_INTREG instance. */
14944 #define ALT_USB0_INTREG_HFLBADDR_ADDR ALT_USB_INTREG_HFLBADDR_ADDR(ALT_USB0_INTREG_ADDR)
14945 /* The address of the ALT_USB_INTREG_HPRT register for the ALT_USB0_INTREG instance. */
14946 #define ALT_USB0_INTREG_HPRT_ADDR ALT_USB_INTREG_HPRT_ADDR(ALT_USB0_INTREG_ADDR)
14947 /* The address of the ALT_USB_INTREG_HCCHAR0 register for the ALT_USB0_INTREG instance. */
14948 #define ALT_USB0_INTREG_HCCHAR0_ADDR ALT_USB_INTREG_HCCHAR0_ADDR(ALT_USB0_INTREG_ADDR)
14949 /* The address of the ALT_USB_INTREG_HCSPLT0 register for the ALT_USB0_INTREG instance. */
14950 #define ALT_USB0_INTREG_HCSPLT0_ADDR ALT_USB_INTREG_HCSPLT0_ADDR(ALT_USB0_INTREG_ADDR)
14951 /* The address of the ALT_USB_INTREG_HCINT0 register for the ALT_USB0_INTREG instance. */
14952 #define ALT_USB0_INTREG_HCINT0_ADDR ALT_USB_INTREG_HCINT0_ADDR(ALT_USB0_INTREG_ADDR)
14953 /* The address of the ALT_USB_INTREG_HCINTMSK0 register for the ALT_USB0_INTREG instance. */
14954 #define ALT_USB0_INTREG_HCINTMSK0_ADDR ALT_USB_INTREG_HCINTMSK0_ADDR(ALT_USB0_INTREG_ADDR)
14955 /* The address of the ALT_USB_INTREG_HCTSIZ0 register for the ALT_USB0_INTREG instance. */
14956 #define ALT_USB0_INTREG_HCTSIZ0_ADDR ALT_USB_INTREG_HCTSIZ0_ADDR(ALT_USB0_INTREG_ADDR)
14957 /* The address of the ALT_USB_INTREG_HCDMA0 register for the ALT_USB0_INTREG instance. */
14958 #define ALT_USB0_INTREG_HCDMA0_ADDR ALT_USB_INTREG_HCDMA0_ADDR(ALT_USB0_INTREG_ADDR)
14959 /* The address of the ALT_USB_INTREG_HCDMAB0 register for the ALT_USB0_INTREG instance. */
14960 #define ALT_USB0_INTREG_HCDMAB0_ADDR ALT_USB_INTREG_HCDMAB0_ADDR(ALT_USB0_INTREG_ADDR)
14961 /* The address of the ALT_USB_INTREG_HCCHAR1 register for the ALT_USB0_INTREG instance. */
14962 #define ALT_USB0_INTREG_HCCHAR1_ADDR ALT_USB_INTREG_HCCHAR1_ADDR(ALT_USB0_INTREG_ADDR)
14963 /* The address of the ALT_USB_INTREG_HCSPLT1 register for the ALT_USB0_INTREG instance. */
14964 #define ALT_USB0_INTREG_HCSPLT1_ADDR ALT_USB_INTREG_HCSPLT1_ADDR(ALT_USB0_INTREG_ADDR)
14965 /* The address of the ALT_USB_INTREG_HCINT1 register for the ALT_USB0_INTREG instance. */
14966 #define ALT_USB0_INTREG_HCINT1_ADDR ALT_USB_INTREG_HCINT1_ADDR(ALT_USB0_INTREG_ADDR)
14967 /* The address of the ALT_USB_INTREG_HCINTMSK1 register for the ALT_USB0_INTREG instance. */
14968 #define ALT_USB0_INTREG_HCINTMSK1_ADDR ALT_USB_INTREG_HCINTMSK1_ADDR(ALT_USB0_INTREG_ADDR)
14969 /* The address of the ALT_USB_INTREG_HCTSIZ1 register for the ALT_USB0_INTREG instance. */
14970 #define ALT_USB0_INTREG_HCTSIZ1_ADDR ALT_USB_INTREG_HCTSIZ1_ADDR(ALT_USB0_INTREG_ADDR)
14971 /* The address of the ALT_USB_INTREG_HCDMA1 register for the ALT_USB0_INTREG instance. */
14972 #define ALT_USB0_INTREG_HCDMA1_ADDR ALT_USB_INTREG_HCDMA1_ADDR(ALT_USB0_INTREG_ADDR)
14973 /* The address of the ALT_USB_INTREG_HCDMAB1 register for the ALT_USB0_INTREG instance. */
14974 #define ALT_USB0_INTREG_HCDMAB1_ADDR ALT_USB_INTREG_HCDMAB1_ADDR(ALT_USB0_INTREG_ADDR)
14975 /* The address of the ALT_USB_INTREG_HCCHAR2 register for the ALT_USB0_INTREG instance. */
14976 #define ALT_USB0_INTREG_HCCHAR2_ADDR ALT_USB_INTREG_HCCHAR2_ADDR(ALT_USB0_INTREG_ADDR)
14977 /* The address of the ALT_USB_INTREG_HCSPLT2 register for the ALT_USB0_INTREG instance. */
14978 #define ALT_USB0_INTREG_HCSPLT2_ADDR ALT_USB_INTREG_HCSPLT2_ADDR(ALT_USB0_INTREG_ADDR)
14979 /* The address of the ALT_USB_INTREG_HCINT2 register for the ALT_USB0_INTREG instance. */
14980 #define ALT_USB0_INTREG_HCINT2_ADDR ALT_USB_INTREG_HCINT2_ADDR(ALT_USB0_INTREG_ADDR)
14981 /* The address of the ALT_USB_INTREG_HCINTMSK2 register for the ALT_USB0_INTREG instance. */
14982 #define ALT_USB0_INTREG_HCINTMSK2_ADDR ALT_USB_INTREG_HCINTMSK2_ADDR(ALT_USB0_INTREG_ADDR)
14983 /* The address of the ALT_USB_INTREG_HCTSIZ2 register for the ALT_USB0_INTREG instance. */
14984 #define ALT_USB0_INTREG_HCTSIZ2_ADDR ALT_USB_INTREG_HCTSIZ2_ADDR(ALT_USB0_INTREG_ADDR)
14985 /* The address of the ALT_USB_INTREG_HCDMA2 register for the ALT_USB0_INTREG instance. */
14986 #define ALT_USB0_INTREG_HCDMA2_ADDR ALT_USB_INTREG_HCDMA2_ADDR(ALT_USB0_INTREG_ADDR)
14987 /* The address of the ALT_USB_INTREG_HCDMAB2 register for the ALT_USB0_INTREG instance. */
14988 #define ALT_USB0_INTREG_HCDMAB2_ADDR ALT_USB_INTREG_HCDMAB2_ADDR(ALT_USB0_INTREG_ADDR)
14989 /* The address of the ALT_USB_INTREG_HCCHAR3 register for the ALT_USB0_INTREG instance. */
14990 #define ALT_USB0_INTREG_HCCHAR3_ADDR ALT_USB_INTREG_HCCHAR3_ADDR(ALT_USB0_INTREG_ADDR)
14991 /* The address of the ALT_USB_INTREG_HCSPLT3 register for the ALT_USB0_INTREG instance. */
14992 #define ALT_USB0_INTREG_HCSPLT3_ADDR ALT_USB_INTREG_HCSPLT3_ADDR(ALT_USB0_INTREG_ADDR)
14993 /* The address of the ALT_USB_INTREG_HCINT3 register for the ALT_USB0_INTREG instance. */
14994 #define ALT_USB0_INTREG_HCINT3_ADDR ALT_USB_INTREG_HCINT3_ADDR(ALT_USB0_INTREG_ADDR)
14995 /* The address of the ALT_USB_INTREG_HCINTMSK3 register for the ALT_USB0_INTREG instance. */
14996 #define ALT_USB0_INTREG_HCINTMSK3_ADDR ALT_USB_INTREG_HCINTMSK3_ADDR(ALT_USB0_INTREG_ADDR)
14997 /* The address of the ALT_USB_INTREG_HCTSIZ3 register for the ALT_USB0_INTREG instance. */
14998 #define ALT_USB0_INTREG_HCTSIZ3_ADDR ALT_USB_INTREG_HCTSIZ3_ADDR(ALT_USB0_INTREG_ADDR)
14999 /* The address of the ALT_USB_INTREG_HCDMA3 register for the ALT_USB0_INTREG instance. */
15000 #define ALT_USB0_INTREG_HCDMA3_ADDR ALT_USB_INTREG_HCDMA3_ADDR(ALT_USB0_INTREG_ADDR)
15001 /* The address of the ALT_USB_INTREG_HCDMAB3 register for the ALT_USB0_INTREG instance. */
15002 #define ALT_USB0_INTREG_HCDMAB3_ADDR ALT_USB_INTREG_HCDMAB3_ADDR(ALT_USB0_INTREG_ADDR)
15003 /* The address of the ALT_USB_INTREG_HCCHAR4 register for the ALT_USB0_INTREG instance. */
15004 #define ALT_USB0_INTREG_HCCHAR4_ADDR ALT_USB_INTREG_HCCHAR4_ADDR(ALT_USB0_INTREG_ADDR)
15005 /* The address of the ALT_USB_INTREG_HCSPLT4 register for the ALT_USB0_INTREG instance. */
15006 #define ALT_USB0_INTREG_HCSPLT4_ADDR ALT_USB_INTREG_HCSPLT4_ADDR(ALT_USB0_INTREG_ADDR)
15007 /* The address of the ALT_USB_INTREG_HCINT4 register for the ALT_USB0_INTREG instance. */
15008 #define ALT_USB0_INTREG_HCINT4_ADDR ALT_USB_INTREG_HCINT4_ADDR(ALT_USB0_INTREG_ADDR)
15009 /* The address of the ALT_USB_INTREG_HCINTMSK4 register for the ALT_USB0_INTREG instance. */
15010 #define ALT_USB0_INTREG_HCINTMSK4_ADDR ALT_USB_INTREG_HCINTMSK4_ADDR(ALT_USB0_INTREG_ADDR)
15011 /* The address of the ALT_USB_INTREG_HCTSIZ4 register for the ALT_USB0_INTREG instance. */
15012 #define ALT_USB0_INTREG_HCTSIZ4_ADDR ALT_USB_INTREG_HCTSIZ4_ADDR(ALT_USB0_INTREG_ADDR)
15013 /* The address of the ALT_USB_INTREG_HCDMA4 register for the ALT_USB0_INTREG instance. */
15014 #define ALT_USB0_INTREG_HCDMA4_ADDR ALT_USB_INTREG_HCDMA4_ADDR(ALT_USB0_INTREG_ADDR)
15015 /* The address of the ALT_USB_INTREG_HCDMAB4 register for the ALT_USB0_INTREG instance. */
15016 #define ALT_USB0_INTREG_HCDMAB4_ADDR ALT_USB_INTREG_HCDMAB4_ADDR(ALT_USB0_INTREG_ADDR)
15017 /* The address of the ALT_USB_INTREG_HCCHAR5 register for the ALT_USB0_INTREG instance. */
15018 #define ALT_USB0_INTREG_HCCHAR5_ADDR ALT_USB_INTREG_HCCHAR5_ADDR(ALT_USB0_INTREG_ADDR)
15019 /* The address of the ALT_USB_INTREG_HCSPLT5 register for the ALT_USB0_INTREG instance. */
15020 #define ALT_USB0_INTREG_HCSPLT5_ADDR ALT_USB_INTREG_HCSPLT5_ADDR(ALT_USB0_INTREG_ADDR)
15021 /* The address of the ALT_USB_INTREG_HCINT5 register for the ALT_USB0_INTREG instance. */
15022 #define ALT_USB0_INTREG_HCINT5_ADDR ALT_USB_INTREG_HCINT5_ADDR(ALT_USB0_INTREG_ADDR)
15023 /* The address of the ALT_USB_INTREG_HCINTMSK5 register for the ALT_USB0_INTREG instance. */
15024 #define ALT_USB0_INTREG_HCINTMSK5_ADDR ALT_USB_INTREG_HCINTMSK5_ADDR(ALT_USB0_INTREG_ADDR)
15025 /* The address of the ALT_USB_INTREG_HCTSIZ5 register for the ALT_USB0_INTREG instance. */
15026 #define ALT_USB0_INTREG_HCTSIZ5_ADDR ALT_USB_INTREG_HCTSIZ5_ADDR(ALT_USB0_INTREG_ADDR)
15027 /* The address of the ALT_USB_INTREG_HCDMA5 register for the ALT_USB0_INTREG instance. */
15028 #define ALT_USB0_INTREG_HCDMA5_ADDR ALT_USB_INTREG_HCDMA5_ADDR(ALT_USB0_INTREG_ADDR)
15029 /* The address of the ALT_USB_INTREG_HCDMAB5 register for the ALT_USB0_INTREG instance. */
15030 #define ALT_USB0_INTREG_HCDMAB5_ADDR ALT_USB_INTREG_HCDMAB5_ADDR(ALT_USB0_INTREG_ADDR)
15031 /* The address of the ALT_USB_INTREG_HCCHAR6 register for the ALT_USB0_INTREG instance. */
15032 #define ALT_USB0_INTREG_HCCHAR6_ADDR ALT_USB_INTREG_HCCHAR6_ADDR(ALT_USB0_INTREG_ADDR)
15033 /* The address of the ALT_USB_INTREG_HCSPLT6 register for the ALT_USB0_INTREG instance. */
15034 #define ALT_USB0_INTREG_HCSPLT6_ADDR ALT_USB_INTREG_HCSPLT6_ADDR(ALT_USB0_INTREG_ADDR)
15035 /* The address of the ALT_USB_INTREG_HCINT6 register for the ALT_USB0_INTREG instance. */
15036 #define ALT_USB0_INTREG_HCINT6_ADDR ALT_USB_INTREG_HCINT6_ADDR(ALT_USB0_INTREG_ADDR)
15037 /* The address of the ALT_USB_INTREG_HCINTMSK6 register for the ALT_USB0_INTREG instance. */
15038 #define ALT_USB0_INTREG_HCINTMSK6_ADDR ALT_USB_INTREG_HCINTMSK6_ADDR(ALT_USB0_INTREG_ADDR)
15039 /* The address of the ALT_USB_INTREG_HCTSIZ6 register for the ALT_USB0_INTREG instance. */
15040 #define ALT_USB0_INTREG_HCTSIZ6_ADDR ALT_USB_INTREG_HCTSIZ6_ADDR(ALT_USB0_INTREG_ADDR)
15041 /* The address of the ALT_USB_INTREG_HCDMA6 register for the ALT_USB0_INTREG instance. */
15042 #define ALT_USB0_INTREG_HCDMA6_ADDR ALT_USB_INTREG_HCDMA6_ADDR(ALT_USB0_INTREG_ADDR)
15043 /* The address of the ALT_USB_INTREG_HCDMAB6 register for the ALT_USB0_INTREG instance. */
15044 #define ALT_USB0_INTREG_HCDMAB6_ADDR ALT_USB_INTREG_HCDMAB6_ADDR(ALT_USB0_INTREG_ADDR)
15045 /* The address of the ALT_USB_INTREG_HCCHAR7 register for the ALT_USB0_INTREG instance. */
15046 #define ALT_USB0_INTREG_HCCHAR7_ADDR ALT_USB_INTREG_HCCHAR7_ADDR(ALT_USB0_INTREG_ADDR)
15047 /* The address of the ALT_USB_INTREG_HCSPLT7 register for the ALT_USB0_INTREG instance. */
15048 #define ALT_USB0_INTREG_HCSPLT7_ADDR ALT_USB_INTREG_HCSPLT7_ADDR(ALT_USB0_INTREG_ADDR)
15049 /* The address of the ALT_USB_INTREG_HCINT7 register for the ALT_USB0_INTREG instance. */
15050 #define ALT_USB0_INTREG_HCINT7_ADDR ALT_USB_INTREG_HCINT7_ADDR(ALT_USB0_INTREG_ADDR)
15051 /* The address of the ALT_USB_INTREG_HCINTMSK7 register for the ALT_USB0_INTREG instance. */
15052 #define ALT_USB0_INTREG_HCINTMSK7_ADDR ALT_USB_INTREG_HCINTMSK7_ADDR(ALT_USB0_INTREG_ADDR)
15053 /* The address of the ALT_USB_INTREG_HCTSIZ7 register for the ALT_USB0_INTREG instance. */
15054 #define ALT_USB0_INTREG_HCTSIZ7_ADDR ALT_USB_INTREG_HCTSIZ7_ADDR(ALT_USB0_INTREG_ADDR)
15055 /* The address of the ALT_USB_INTREG_HCDMA7 register for the ALT_USB0_INTREG instance. */
15056 #define ALT_USB0_INTREG_HCDMA7_ADDR ALT_USB_INTREG_HCDMA7_ADDR(ALT_USB0_INTREG_ADDR)
15057 /* The address of the ALT_USB_INTREG_HCDMAB7 register for the ALT_USB0_INTREG instance. */
15058 #define ALT_USB0_INTREG_HCDMAB7_ADDR ALT_USB_INTREG_HCDMAB7_ADDR(ALT_USB0_INTREG_ADDR)
15059 /* The address of the ALT_USB_INTREG_HCCHAR8 register for the ALT_USB0_INTREG instance. */
15060 #define ALT_USB0_INTREG_HCCHAR8_ADDR ALT_USB_INTREG_HCCHAR8_ADDR(ALT_USB0_INTREG_ADDR)
15061 /* The address of the ALT_USB_INTREG_HCSPLT8 register for the ALT_USB0_INTREG instance. */
15062 #define ALT_USB0_INTREG_HCSPLT8_ADDR ALT_USB_INTREG_HCSPLT8_ADDR(ALT_USB0_INTREG_ADDR)
15063 /* The address of the ALT_USB_INTREG_HCINT8 register for the ALT_USB0_INTREG instance. */
15064 #define ALT_USB0_INTREG_HCINT8_ADDR ALT_USB_INTREG_HCINT8_ADDR(ALT_USB0_INTREG_ADDR)
15065 /* The address of the ALT_USB_INTREG_HCINTMSK8 register for the ALT_USB0_INTREG instance. */
15066 #define ALT_USB0_INTREG_HCINTMSK8_ADDR ALT_USB_INTREG_HCINTMSK8_ADDR(ALT_USB0_INTREG_ADDR)
15067 /* The address of the ALT_USB_INTREG_HCTSIZ8 register for the ALT_USB0_INTREG instance. */
15068 #define ALT_USB0_INTREG_HCTSIZ8_ADDR ALT_USB_INTREG_HCTSIZ8_ADDR(ALT_USB0_INTREG_ADDR)
15069 /* The address of the ALT_USB_INTREG_HCDMA8 register for the ALT_USB0_INTREG instance. */
15070 #define ALT_USB0_INTREG_HCDMA8_ADDR ALT_USB_INTREG_HCDMA8_ADDR(ALT_USB0_INTREG_ADDR)
15071 /* The address of the ALT_USB_INTREG_HCDMAB8 register for the ALT_USB0_INTREG instance. */
15072 #define ALT_USB0_INTREG_HCDMAB8_ADDR ALT_USB_INTREG_HCDMAB8_ADDR(ALT_USB0_INTREG_ADDR)
15073 /* The address of the ALT_USB_INTREG_HCCHAR9 register for the ALT_USB0_INTREG instance. */
15074 #define ALT_USB0_INTREG_HCCHAR9_ADDR ALT_USB_INTREG_HCCHAR9_ADDR(ALT_USB0_INTREG_ADDR)
15075 /* The address of the ALT_USB_INTREG_HCSPLT9 register for the ALT_USB0_INTREG instance. */
15076 #define ALT_USB0_INTREG_HCSPLT9_ADDR ALT_USB_INTREG_HCSPLT9_ADDR(ALT_USB0_INTREG_ADDR)
15077 /* The address of the ALT_USB_INTREG_HCINT9 register for the ALT_USB0_INTREG instance. */
15078 #define ALT_USB0_INTREG_HCINT9_ADDR ALT_USB_INTREG_HCINT9_ADDR(ALT_USB0_INTREG_ADDR)
15079 /* The address of the ALT_USB_INTREG_HCINTMSK9 register for the ALT_USB0_INTREG instance. */
15080 #define ALT_USB0_INTREG_HCINTMSK9_ADDR ALT_USB_INTREG_HCINTMSK9_ADDR(ALT_USB0_INTREG_ADDR)
15081 /* The address of the ALT_USB_INTREG_HCTSIZ9 register for the ALT_USB0_INTREG instance. */
15082 #define ALT_USB0_INTREG_HCTSIZ9_ADDR ALT_USB_INTREG_HCTSIZ9_ADDR(ALT_USB0_INTREG_ADDR)
15083 /* The address of the ALT_USB_INTREG_HCDMA9 register for the ALT_USB0_INTREG instance. */
15084 #define ALT_USB0_INTREG_HCDMA9_ADDR ALT_USB_INTREG_HCDMA9_ADDR(ALT_USB0_INTREG_ADDR)
15085 /* The address of the ALT_USB_INTREG_HCDMAB9 register for the ALT_USB0_INTREG instance. */
15086 #define ALT_USB0_INTREG_HCDMAB9_ADDR ALT_USB_INTREG_HCDMAB9_ADDR(ALT_USB0_INTREG_ADDR)
15087 /* The address of the ALT_USB_INTREG_HCCHAR10 register for the ALT_USB0_INTREG instance. */
15088 #define ALT_USB0_INTREG_HCCHAR10_ADDR ALT_USB_INTREG_HCCHAR10_ADDR(ALT_USB0_INTREG_ADDR)
15089 /* The address of the ALT_USB_INTREG_HCSPLT10 register for the ALT_USB0_INTREG instance. */
15090 #define ALT_USB0_INTREG_HCSPLT10_ADDR ALT_USB_INTREG_HCSPLT10_ADDR(ALT_USB0_INTREG_ADDR)
15091 /* The address of the ALT_USB_INTREG_HCINT10 register for the ALT_USB0_INTREG instance. */
15092 #define ALT_USB0_INTREG_HCINT10_ADDR ALT_USB_INTREG_HCINT10_ADDR(ALT_USB0_INTREG_ADDR)
15093 /* The address of the ALT_USB_INTREG_HCINTMSK10 register for the ALT_USB0_INTREG instance. */
15094 #define ALT_USB0_INTREG_HCINTMSK10_ADDR ALT_USB_INTREG_HCINTMSK10_ADDR(ALT_USB0_INTREG_ADDR)
15095 /* The address of the ALT_USB_INTREG_HCTSIZ10 register for the ALT_USB0_INTREG instance. */
15096 #define ALT_USB0_INTREG_HCTSIZ10_ADDR ALT_USB_INTREG_HCTSIZ10_ADDR(ALT_USB0_INTREG_ADDR)
15097 /* The address of the ALT_USB_INTREG_HCDMA10 register for the ALT_USB0_INTREG instance. */
15098 #define ALT_USB0_INTREG_HCDMA10_ADDR ALT_USB_INTREG_HCDMA10_ADDR(ALT_USB0_INTREG_ADDR)
15099 /* The address of the ALT_USB_INTREG_HCDMAB10 register for the ALT_USB0_INTREG instance. */
15100 #define ALT_USB0_INTREG_HCDMAB10_ADDR ALT_USB_INTREG_HCDMAB10_ADDR(ALT_USB0_INTREG_ADDR)
15101 /* The address of the ALT_USB_INTREG_HCCHAR11 register for the ALT_USB0_INTREG instance. */
15102 #define ALT_USB0_INTREG_HCCHAR11_ADDR ALT_USB_INTREG_HCCHAR11_ADDR(ALT_USB0_INTREG_ADDR)
15103 /* The address of the ALT_USB_INTREG_HCSPLT11 register for the ALT_USB0_INTREG instance. */
15104 #define ALT_USB0_INTREG_HCSPLT11_ADDR ALT_USB_INTREG_HCSPLT11_ADDR(ALT_USB0_INTREG_ADDR)
15105 /* The address of the ALT_USB_INTREG_HCINT11 register for the ALT_USB0_INTREG instance. */
15106 #define ALT_USB0_INTREG_HCINT11_ADDR ALT_USB_INTREG_HCINT11_ADDR(ALT_USB0_INTREG_ADDR)
15107 /* The address of the ALT_USB_INTREG_HCINTMSK11 register for the ALT_USB0_INTREG instance. */
15108 #define ALT_USB0_INTREG_HCINTMSK11_ADDR ALT_USB_INTREG_HCINTMSK11_ADDR(ALT_USB0_INTREG_ADDR)
15109 /* The address of the ALT_USB_INTREG_HCTSIZ11 register for the ALT_USB0_INTREG instance. */
15110 #define ALT_USB0_INTREG_HCTSIZ11_ADDR ALT_USB_INTREG_HCTSIZ11_ADDR(ALT_USB0_INTREG_ADDR)
15111 /* The address of the ALT_USB_INTREG_HCDMA11 register for the ALT_USB0_INTREG instance. */
15112 #define ALT_USB0_INTREG_HCDMA11_ADDR ALT_USB_INTREG_HCDMA11_ADDR(ALT_USB0_INTREG_ADDR)
15113 /* The address of the ALT_USB_INTREG_HCDMAB11 register for the ALT_USB0_INTREG instance. */
15114 #define ALT_USB0_INTREG_HCDMAB11_ADDR ALT_USB_INTREG_HCDMAB11_ADDR(ALT_USB0_INTREG_ADDR)
15115 /* The address of the ALT_USB_INTREG_HCCHAR12 register for the ALT_USB0_INTREG instance. */
15116 #define ALT_USB0_INTREG_HCCHAR12_ADDR ALT_USB_INTREG_HCCHAR12_ADDR(ALT_USB0_INTREG_ADDR)
15117 /* The address of the ALT_USB_INTREG_HCSPLT12 register for the ALT_USB0_INTREG instance. */
15118 #define ALT_USB0_INTREG_HCSPLT12_ADDR ALT_USB_INTREG_HCSPLT12_ADDR(ALT_USB0_INTREG_ADDR)
15119 /* The address of the ALT_USB_INTREG_HCINT12 register for the ALT_USB0_INTREG instance. */
15120 #define ALT_USB0_INTREG_HCINT12_ADDR ALT_USB_INTREG_HCINT12_ADDR(ALT_USB0_INTREG_ADDR)
15121 /* The address of the ALT_USB_INTREG_HCINTMSK12 register for the ALT_USB0_INTREG instance. */
15122 #define ALT_USB0_INTREG_HCINTMSK12_ADDR ALT_USB_INTREG_HCINTMSK12_ADDR(ALT_USB0_INTREG_ADDR)
15123 /* The address of the ALT_USB_INTREG_HCTSIZ12 register for the ALT_USB0_INTREG instance. */
15124 #define ALT_USB0_INTREG_HCTSIZ12_ADDR ALT_USB_INTREG_HCTSIZ12_ADDR(ALT_USB0_INTREG_ADDR)
15125 /* The address of the ALT_USB_INTREG_HCDMA12 register for the ALT_USB0_INTREG instance. */
15126 #define ALT_USB0_INTREG_HCDMA12_ADDR ALT_USB_INTREG_HCDMA12_ADDR(ALT_USB0_INTREG_ADDR)
15127 /* The address of the ALT_USB_INTREG_HCDMAB12 register for the ALT_USB0_INTREG instance. */
15128 #define ALT_USB0_INTREG_HCDMAB12_ADDR ALT_USB_INTREG_HCDMAB12_ADDR(ALT_USB0_INTREG_ADDR)
15129 /* The address of the ALT_USB_INTREG_HCCHAR13 register for the ALT_USB0_INTREG instance. */
15130 #define ALT_USB0_INTREG_HCCHAR13_ADDR ALT_USB_INTREG_HCCHAR13_ADDR(ALT_USB0_INTREG_ADDR)
15131 /* The address of the ALT_USB_INTREG_HCSPLT13 register for the ALT_USB0_INTREG instance. */
15132 #define ALT_USB0_INTREG_HCSPLT13_ADDR ALT_USB_INTREG_HCSPLT13_ADDR(ALT_USB0_INTREG_ADDR)
15133 /* The address of the ALT_USB_INTREG_HCINT13 register for the ALT_USB0_INTREG instance. */
15134 #define ALT_USB0_INTREG_HCINT13_ADDR ALT_USB_INTREG_HCINT13_ADDR(ALT_USB0_INTREG_ADDR)
15135 /* The address of the ALT_USB_INTREG_HCINTMSK13 register for the ALT_USB0_INTREG instance. */
15136 #define ALT_USB0_INTREG_HCINTMSK13_ADDR ALT_USB_INTREG_HCINTMSK13_ADDR(ALT_USB0_INTREG_ADDR)
15137 /* The address of the ALT_USB_INTREG_HCTSIZ13 register for the ALT_USB0_INTREG instance. */
15138 #define ALT_USB0_INTREG_HCTSIZ13_ADDR ALT_USB_INTREG_HCTSIZ13_ADDR(ALT_USB0_INTREG_ADDR)
15139 /* The address of the ALT_USB_INTREG_HCDMA13 register for the ALT_USB0_INTREG instance. */
15140 #define ALT_USB0_INTREG_HCDMA13_ADDR ALT_USB_INTREG_HCDMA13_ADDR(ALT_USB0_INTREG_ADDR)
15141 /* The address of the ALT_USB_INTREG_HCDMAB13 register for the ALT_USB0_INTREG instance. */
15142 #define ALT_USB0_INTREG_HCDMAB13_ADDR ALT_USB_INTREG_HCDMAB13_ADDR(ALT_USB0_INTREG_ADDR)
15143 /* The address of the ALT_USB_INTREG_HCCHAR14 register for the ALT_USB0_INTREG instance. */
15144 #define ALT_USB0_INTREG_HCCHAR14_ADDR ALT_USB_INTREG_HCCHAR14_ADDR(ALT_USB0_INTREG_ADDR)
15145 /* The address of the ALT_USB_INTREG_HCSPLT14 register for the ALT_USB0_INTREG instance. */
15146 #define ALT_USB0_INTREG_HCSPLT14_ADDR ALT_USB_INTREG_HCSPLT14_ADDR(ALT_USB0_INTREG_ADDR)
15147 /* The address of the ALT_USB_INTREG_HCINT14 register for the ALT_USB0_INTREG instance. */
15148 #define ALT_USB0_INTREG_HCINT14_ADDR ALT_USB_INTREG_HCINT14_ADDR(ALT_USB0_INTREG_ADDR)
15149 /* The address of the ALT_USB_INTREG_HCINTMSK14 register for the ALT_USB0_INTREG instance. */
15150 #define ALT_USB0_INTREG_HCINTMSK14_ADDR ALT_USB_INTREG_HCINTMSK14_ADDR(ALT_USB0_INTREG_ADDR)
15151 /* The address of the ALT_USB_INTREG_HCTSIZ14 register for the ALT_USB0_INTREG instance. */
15152 #define ALT_USB0_INTREG_HCTSIZ14_ADDR ALT_USB_INTREG_HCTSIZ14_ADDR(ALT_USB0_INTREG_ADDR)
15153 /* The address of the ALT_USB_INTREG_HCDMA14 register for the ALT_USB0_INTREG instance. */
15154 #define ALT_USB0_INTREG_HCDMA14_ADDR ALT_USB_INTREG_HCDMA14_ADDR(ALT_USB0_INTREG_ADDR)
15155 /* The address of the ALT_USB_INTREG_HCDMAB14 register for the ALT_USB0_INTREG instance. */
15156 #define ALT_USB0_INTREG_HCDMAB14_ADDR ALT_USB_INTREG_HCDMAB14_ADDR(ALT_USB0_INTREG_ADDR)
15157 /* The address of the ALT_USB_INTREG_HCCHAR15 register for the ALT_USB0_INTREG instance. */
15158 #define ALT_USB0_INTREG_HCCHAR15_ADDR ALT_USB_INTREG_HCCHAR15_ADDR(ALT_USB0_INTREG_ADDR)
15159 /* The address of the ALT_USB_INTREG_HCSPLT15 register for the ALT_USB0_INTREG instance. */
15160 #define ALT_USB0_INTREG_HCSPLT15_ADDR ALT_USB_INTREG_HCSPLT15_ADDR(ALT_USB0_INTREG_ADDR)
15161 /* The address of the ALT_USB_INTREG_HCINT15 register for the ALT_USB0_INTREG instance. */
15162 #define ALT_USB0_INTREG_HCINT15_ADDR ALT_USB_INTREG_HCINT15_ADDR(ALT_USB0_INTREG_ADDR)
15163 /* The address of the ALT_USB_INTREG_HCINTMSK15 register for the ALT_USB0_INTREG instance. */
15164 #define ALT_USB0_INTREG_HCINTMSK15_ADDR ALT_USB_INTREG_HCINTMSK15_ADDR(ALT_USB0_INTREG_ADDR)
15165 /* The address of the ALT_USB_INTREG_HCTSIZ15 register for the ALT_USB0_INTREG instance. */
15166 #define ALT_USB0_INTREG_HCTSIZ15_ADDR ALT_USB_INTREG_HCTSIZ15_ADDR(ALT_USB0_INTREG_ADDR)
15167 /* The address of the ALT_USB_INTREG_HCDMA15 register for the ALT_USB0_INTREG instance. */
15168 #define ALT_USB0_INTREG_HCDMA15_ADDR ALT_USB_INTREG_HCDMA15_ADDR(ALT_USB0_INTREG_ADDR)
15169 /* The address of the ALT_USB_INTREG_HCDMAB15 register for the ALT_USB0_INTREG instance. */
15170 #define ALT_USB0_INTREG_HCDMAB15_ADDR ALT_USB_INTREG_HCDMAB15_ADDR(ALT_USB0_INTREG_ADDR)
15171 /* The address of the ALT_USB_INTREG_DCFG register for the ALT_USB0_INTREG instance. */
15172 #define ALT_USB0_INTREG_DCFG_ADDR ALT_USB_INTREG_DCFG_ADDR(ALT_USB0_INTREG_ADDR)
15173 /* The address of the ALT_USB_INTREG_DCTL register for the ALT_USB0_INTREG instance. */
15174 #define ALT_USB0_INTREG_DCTL_ADDR ALT_USB_INTREG_DCTL_ADDR(ALT_USB0_INTREG_ADDR)
15175 /* The address of the ALT_USB_INTREG_DSTS register for the ALT_USB0_INTREG instance. */
15176 #define ALT_USB0_INTREG_DSTS_ADDR ALT_USB_INTREG_DSTS_ADDR(ALT_USB0_INTREG_ADDR)
15177 /* The address of the ALT_USB_INTREG_DIEPMSK register for the ALT_USB0_INTREG instance. */
15178 #define ALT_USB0_INTREG_DIEPMSK_ADDR ALT_USB_INTREG_DIEPMSK_ADDR(ALT_USB0_INTREG_ADDR)
15179 /* The address of the ALT_USB_INTREG_DOEPMSK register for the ALT_USB0_INTREG instance. */
15180 #define ALT_USB0_INTREG_DOEPMSK_ADDR ALT_USB_INTREG_DOEPMSK_ADDR(ALT_USB0_INTREG_ADDR)
15181 /* The address of the ALT_USB_INTREG_DAINT register for the ALT_USB0_INTREG instance. */
15182 #define ALT_USB0_INTREG_DAINT_ADDR ALT_USB_INTREG_DAINT_ADDR(ALT_USB0_INTREG_ADDR)
15183 /* The address of the ALT_USB_INTREG_DAINTMSK register for the ALT_USB0_INTREG instance. */
15184 #define ALT_USB0_INTREG_DAINTMSK_ADDR ALT_USB_INTREG_DAINTMSK_ADDR(ALT_USB0_INTREG_ADDR)
15185 /* The address of the ALT_USB_INTREG_DVBUSDIS register for the ALT_USB0_INTREG instance. */
15186 #define ALT_USB0_INTREG_DVBUSDIS_ADDR ALT_USB_INTREG_DVBUSDIS_ADDR(ALT_USB0_INTREG_ADDR)
15187 /* The address of the ALT_USB_INTREG_DVBUSPULSE register for the ALT_USB0_INTREG instance. */
15188 #define ALT_USB0_INTREG_DVBUSPULSE_ADDR ALT_USB_INTREG_DVBUSPULSE_ADDR(ALT_USB0_INTREG_ADDR)
15189 /* The address of the ALT_USB_INTREG_DTHRCTL register for the ALT_USB0_INTREG instance. */
15190 #define ALT_USB0_INTREG_DTHRCTL_ADDR ALT_USB_INTREG_DTHRCTL_ADDR(ALT_USB0_INTREG_ADDR)
15191 /* The address of the ALT_USB_INTREG_DIEPEMPMSK register for the ALT_USB0_INTREG instance. */
15192 #define ALT_USB0_INTREG_DIEPEMPMSK_ADDR ALT_USB_INTREG_DIEPEMPMSK_ADDR(ALT_USB0_INTREG_ADDR)
15193 /* The address of the ALT_USB_INTREG_DIEPCTL0 register for the ALT_USB0_INTREG instance. */
15194 #define ALT_USB0_INTREG_DIEPCTL0_ADDR ALT_USB_INTREG_DIEPCTL0_ADDR(ALT_USB0_INTREG_ADDR)
15195 /* The address of the ALT_USB_INTREG_DIEPINT0 register for the ALT_USB0_INTREG instance. */
15196 #define ALT_USB0_INTREG_DIEPINT0_ADDR ALT_USB_INTREG_DIEPINT0_ADDR(ALT_USB0_INTREG_ADDR)
15197 /* The address of the ALT_USB_INTREG_DIEPTSIZ0 register for the ALT_USB0_INTREG instance. */
15198 #define ALT_USB0_INTREG_DIEPTSIZ0_ADDR ALT_USB_INTREG_DIEPTSIZ0_ADDR(ALT_USB0_INTREG_ADDR)
15199 /* The address of the ALT_USB_INTREG_DIEPDMA0 register for the ALT_USB0_INTREG instance. */
15200 #define ALT_USB0_INTREG_DIEPDMA0_ADDR ALT_USB_INTREG_DIEPDMA0_ADDR(ALT_USB0_INTREG_ADDR)
15201 /* The address of the ALT_USB_INTREG_DTXFSTS0 register for the ALT_USB0_INTREG instance. */
15202 #define ALT_USB0_INTREG_DTXFSTS0_ADDR ALT_USB_INTREG_DTXFSTS0_ADDR(ALT_USB0_INTREG_ADDR)
15203 /* The address of the ALT_USB_INTREG_DIEPDMAB0 register for the ALT_USB0_INTREG instance. */
15204 #define ALT_USB0_INTREG_DIEPDMAB0_ADDR ALT_USB_INTREG_DIEPDMAB0_ADDR(ALT_USB0_INTREG_ADDR)
15205 /* The address of the ALT_USB_INTREG_DIEPCTL1 register for the ALT_USB0_INTREG instance. */
15206 #define ALT_USB0_INTREG_DIEPCTL1_ADDR ALT_USB_INTREG_DIEPCTL1_ADDR(ALT_USB0_INTREG_ADDR)
15207 /* The address of the ALT_USB_INTREG_DIEPINT1 register for the ALT_USB0_INTREG instance. */
15208 #define ALT_USB0_INTREG_DIEPINT1_ADDR ALT_USB_INTREG_DIEPINT1_ADDR(ALT_USB0_INTREG_ADDR)
15209 /* The address of the ALT_USB_INTREG_DIEPTSIZ1 register for the ALT_USB0_INTREG instance. */
15210 #define ALT_USB0_INTREG_DIEPTSIZ1_ADDR ALT_USB_INTREG_DIEPTSIZ1_ADDR(ALT_USB0_INTREG_ADDR)
15211 /* The address of the ALT_USB_INTREG_DIEPDMA1 register for the ALT_USB0_INTREG instance. */
15212 #define ALT_USB0_INTREG_DIEPDMA1_ADDR ALT_USB_INTREG_DIEPDMA1_ADDR(ALT_USB0_INTREG_ADDR)
15213 /* The address of the ALT_USB_INTREG_DTXFSTS1 register for the ALT_USB0_INTREG instance. */
15214 #define ALT_USB0_INTREG_DTXFSTS1_ADDR ALT_USB_INTREG_DTXFSTS1_ADDR(ALT_USB0_INTREG_ADDR)
15215 /* The address of the ALT_USB_INTREG_DIEPDMAB1 register for the ALT_USB0_INTREG instance. */
15216 #define ALT_USB0_INTREG_DIEPDMAB1_ADDR ALT_USB_INTREG_DIEPDMAB1_ADDR(ALT_USB0_INTREG_ADDR)
15217 /* The address of the ALT_USB_INTREG_DIEPCTL2 register for the ALT_USB0_INTREG instance. */
15218 #define ALT_USB0_INTREG_DIEPCTL2_ADDR ALT_USB_INTREG_DIEPCTL2_ADDR(ALT_USB0_INTREG_ADDR)
15219 /* The address of the ALT_USB_INTREG_DIEPINT2 register for the ALT_USB0_INTREG instance. */
15220 #define ALT_USB0_INTREG_DIEPINT2_ADDR ALT_USB_INTREG_DIEPINT2_ADDR(ALT_USB0_INTREG_ADDR)
15221 /* The address of the ALT_USB_INTREG_DIEPTSIZ2 register for the ALT_USB0_INTREG instance. */
15222 #define ALT_USB0_INTREG_DIEPTSIZ2_ADDR ALT_USB_INTREG_DIEPTSIZ2_ADDR(ALT_USB0_INTREG_ADDR)
15223 /* The address of the ALT_USB_INTREG_DIEPDMA2 register for the ALT_USB0_INTREG instance. */
15224 #define ALT_USB0_INTREG_DIEPDMA2_ADDR ALT_USB_INTREG_DIEPDMA2_ADDR(ALT_USB0_INTREG_ADDR)
15225 /* The address of the ALT_USB_INTREG_DTXFSTS2 register for the ALT_USB0_INTREG instance. */
15226 #define ALT_USB0_INTREG_DTXFSTS2_ADDR ALT_USB_INTREG_DTXFSTS2_ADDR(ALT_USB0_INTREG_ADDR)
15227 /* The address of the ALT_USB_INTREG_DIEPDMAB2 register for the ALT_USB0_INTREG instance. */
15228 #define ALT_USB0_INTREG_DIEPDMAB2_ADDR ALT_USB_INTREG_DIEPDMAB2_ADDR(ALT_USB0_INTREG_ADDR)
15229 /* The address of the ALT_USB_INTREG_DIEPCTL3 register for the ALT_USB0_INTREG instance. */
15230 #define ALT_USB0_INTREG_DIEPCTL3_ADDR ALT_USB_INTREG_DIEPCTL3_ADDR(ALT_USB0_INTREG_ADDR)
15231 /* The address of the ALT_USB_INTREG_DIEPINT3 register for the ALT_USB0_INTREG instance. */
15232 #define ALT_USB0_INTREG_DIEPINT3_ADDR ALT_USB_INTREG_DIEPINT3_ADDR(ALT_USB0_INTREG_ADDR)
15233 /* The address of the ALT_USB_INTREG_DIEPTSIZ3 register for the ALT_USB0_INTREG instance. */
15234 #define ALT_USB0_INTREG_DIEPTSIZ3_ADDR ALT_USB_INTREG_DIEPTSIZ3_ADDR(ALT_USB0_INTREG_ADDR)
15235 /* The address of the ALT_USB_INTREG_DIEPDMA3 register for the ALT_USB0_INTREG instance. */
15236 #define ALT_USB0_INTREG_DIEPDMA3_ADDR ALT_USB_INTREG_DIEPDMA3_ADDR(ALT_USB0_INTREG_ADDR)
15237 /* The address of the ALT_USB_INTREG_DTXFSTS3 register for the ALT_USB0_INTREG instance. */
15238 #define ALT_USB0_INTREG_DTXFSTS3_ADDR ALT_USB_INTREG_DTXFSTS3_ADDR(ALT_USB0_INTREG_ADDR)
15239 /* The address of the ALT_USB_INTREG_DIEPDMAB3 register for the ALT_USB0_INTREG instance. */
15240 #define ALT_USB0_INTREG_DIEPDMAB3_ADDR ALT_USB_INTREG_DIEPDMAB3_ADDR(ALT_USB0_INTREG_ADDR)
15241 /* The address of the ALT_USB_INTREG_DIEPCTL4 register for the ALT_USB0_INTREG instance. */
15242 #define ALT_USB0_INTREG_DIEPCTL4_ADDR ALT_USB_INTREG_DIEPCTL4_ADDR(ALT_USB0_INTREG_ADDR)
15243 /* The address of the ALT_USB_INTREG_DIEPINT4 register for the ALT_USB0_INTREG instance. */
15244 #define ALT_USB0_INTREG_DIEPINT4_ADDR ALT_USB_INTREG_DIEPINT4_ADDR(ALT_USB0_INTREG_ADDR)
15245 /* The address of the ALT_USB_INTREG_DIEPTSIZ4 register for the ALT_USB0_INTREG instance. */
15246 #define ALT_USB0_INTREG_DIEPTSIZ4_ADDR ALT_USB_INTREG_DIEPTSIZ4_ADDR(ALT_USB0_INTREG_ADDR)
15247 /* The address of the ALT_USB_INTREG_DIEPDMA4 register for the ALT_USB0_INTREG instance. */
15248 #define ALT_USB0_INTREG_DIEPDMA4_ADDR ALT_USB_INTREG_DIEPDMA4_ADDR(ALT_USB0_INTREG_ADDR)
15249 /* The address of the ALT_USB_INTREG_DTXFSTS4 register for the ALT_USB0_INTREG instance. */
15250 #define ALT_USB0_INTREG_DTXFSTS4_ADDR ALT_USB_INTREG_DTXFSTS4_ADDR(ALT_USB0_INTREG_ADDR)
15251 /* The address of the ALT_USB_INTREG_DIEPDMAB4 register for the ALT_USB0_INTREG instance. */
15252 #define ALT_USB0_INTREG_DIEPDMAB4_ADDR ALT_USB_INTREG_DIEPDMAB4_ADDR(ALT_USB0_INTREG_ADDR)
15253 /* The address of the ALT_USB_INTREG_DIEPCTL5 register for the ALT_USB0_INTREG instance. */
15254 #define ALT_USB0_INTREG_DIEPCTL5_ADDR ALT_USB_INTREG_DIEPCTL5_ADDR(ALT_USB0_INTREG_ADDR)
15255 /* The address of the ALT_USB_INTREG_DIEPINT5 register for the ALT_USB0_INTREG instance. */
15256 #define ALT_USB0_INTREG_DIEPINT5_ADDR ALT_USB_INTREG_DIEPINT5_ADDR(ALT_USB0_INTREG_ADDR)
15257 /* The address of the ALT_USB_INTREG_DIEPTSIZ5 register for the ALT_USB0_INTREG instance. */
15258 #define ALT_USB0_INTREG_DIEPTSIZ5_ADDR ALT_USB_INTREG_DIEPTSIZ5_ADDR(ALT_USB0_INTREG_ADDR)
15259 /* The address of the ALT_USB_INTREG_DIEPDMA5 register for the ALT_USB0_INTREG instance. */
15260 #define ALT_USB0_INTREG_DIEPDMA5_ADDR ALT_USB_INTREG_DIEPDMA5_ADDR(ALT_USB0_INTREG_ADDR)
15261 /* The address of the ALT_USB_INTREG_DTXFSTS5 register for the ALT_USB0_INTREG instance. */
15262 #define ALT_USB0_INTREG_DTXFSTS5_ADDR ALT_USB_INTREG_DTXFSTS5_ADDR(ALT_USB0_INTREG_ADDR)
15263 /* The address of the ALT_USB_INTREG_DIEPDMAB5 register for the ALT_USB0_INTREG instance. */
15264 #define ALT_USB0_INTREG_DIEPDMAB5_ADDR ALT_USB_INTREG_DIEPDMAB5_ADDR(ALT_USB0_INTREG_ADDR)
15265 /* The address of the ALT_USB_INTREG_DIEPCTL6 register for the ALT_USB0_INTREG instance. */
15266 #define ALT_USB0_INTREG_DIEPCTL6_ADDR ALT_USB_INTREG_DIEPCTL6_ADDR(ALT_USB0_INTREG_ADDR)
15267 /* The address of the ALT_USB_INTREG_DIEPINT6 register for the ALT_USB0_INTREG instance. */
15268 #define ALT_USB0_INTREG_DIEPINT6_ADDR ALT_USB_INTREG_DIEPINT6_ADDR(ALT_USB0_INTREG_ADDR)
15269 /* The address of the ALT_USB_INTREG_DIEPTSIZ6 register for the ALT_USB0_INTREG instance. */
15270 #define ALT_USB0_INTREG_DIEPTSIZ6_ADDR ALT_USB_INTREG_DIEPTSIZ6_ADDR(ALT_USB0_INTREG_ADDR)
15271 /* The address of the ALT_USB_INTREG_DIEPDMA6 register for the ALT_USB0_INTREG instance. */
15272 #define ALT_USB0_INTREG_DIEPDMA6_ADDR ALT_USB_INTREG_DIEPDMA6_ADDR(ALT_USB0_INTREG_ADDR)
15273 /* The address of the ALT_USB_INTREG_DTXFSTS6 register for the ALT_USB0_INTREG instance. */
15274 #define ALT_USB0_INTREG_DTXFSTS6_ADDR ALT_USB_INTREG_DTXFSTS6_ADDR(ALT_USB0_INTREG_ADDR)
15275 /* The address of the ALT_USB_INTREG_DIEPDMAB6 register for the ALT_USB0_INTREG instance. */
15276 #define ALT_USB0_INTREG_DIEPDMAB6_ADDR ALT_USB_INTREG_DIEPDMAB6_ADDR(ALT_USB0_INTREG_ADDR)
15277 /* The address of the ALT_USB_INTREG_DIEPCTL7 register for the ALT_USB0_INTREG instance. */
15278 #define ALT_USB0_INTREG_DIEPCTL7_ADDR ALT_USB_INTREG_DIEPCTL7_ADDR(ALT_USB0_INTREG_ADDR)
15279 /* The address of the ALT_USB_INTREG_DIEPINT7 register for the ALT_USB0_INTREG instance. */
15280 #define ALT_USB0_INTREG_DIEPINT7_ADDR ALT_USB_INTREG_DIEPINT7_ADDR(ALT_USB0_INTREG_ADDR)
15281 /* The address of the ALT_USB_INTREG_DIEPTSIZ7 register for the ALT_USB0_INTREG instance. */
15282 #define ALT_USB0_INTREG_DIEPTSIZ7_ADDR ALT_USB_INTREG_DIEPTSIZ7_ADDR(ALT_USB0_INTREG_ADDR)
15283 /* The address of the ALT_USB_INTREG_DIEPDMA7 register for the ALT_USB0_INTREG instance. */
15284 #define ALT_USB0_INTREG_DIEPDMA7_ADDR ALT_USB_INTREG_DIEPDMA7_ADDR(ALT_USB0_INTREG_ADDR)
15285 /* The address of the ALT_USB_INTREG_DTXFSTS7 register for the ALT_USB0_INTREG instance. */
15286 #define ALT_USB0_INTREG_DTXFSTS7_ADDR ALT_USB_INTREG_DTXFSTS7_ADDR(ALT_USB0_INTREG_ADDR)
15287 /* The address of the ALT_USB_INTREG_DIEPDMAB7 register for the ALT_USB0_INTREG instance. */
15288 #define ALT_USB0_INTREG_DIEPDMAB7_ADDR ALT_USB_INTREG_DIEPDMAB7_ADDR(ALT_USB0_INTREG_ADDR)
15289 /* The address of the ALT_USB_INTREG_DIEPCTL8 register for the ALT_USB0_INTREG instance. */
15290 #define ALT_USB0_INTREG_DIEPCTL8_ADDR ALT_USB_INTREG_DIEPCTL8_ADDR(ALT_USB0_INTREG_ADDR)
15291 /* The address of the ALT_USB_INTREG_DIEPINT8 register for the ALT_USB0_INTREG instance. */
15292 #define ALT_USB0_INTREG_DIEPINT8_ADDR ALT_USB_INTREG_DIEPINT8_ADDR(ALT_USB0_INTREG_ADDR)
15293 /* The address of the ALT_USB_INTREG_DIEPTSIZ8 register for the ALT_USB0_INTREG instance. */
15294 #define ALT_USB0_INTREG_DIEPTSIZ8_ADDR ALT_USB_INTREG_DIEPTSIZ8_ADDR(ALT_USB0_INTREG_ADDR)
15295 /* The address of the ALT_USB_INTREG_DIEPDMA8 register for the ALT_USB0_INTREG instance. */
15296 #define ALT_USB0_INTREG_DIEPDMA8_ADDR ALT_USB_INTREG_DIEPDMA8_ADDR(ALT_USB0_INTREG_ADDR)
15297 /* The address of the ALT_USB_INTREG_DTXFSTS8 register for the ALT_USB0_INTREG instance. */
15298 #define ALT_USB0_INTREG_DTXFSTS8_ADDR ALT_USB_INTREG_DTXFSTS8_ADDR(ALT_USB0_INTREG_ADDR)
15299 /* The address of the ALT_USB_INTREG_DIEPDMAB8 register for the ALT_USB0_INTREG instance. */
15300 #define ALT_USB0_INTREG_DIEPDMAB8_ADDR ALT_USB_INTREG_DIEPDMAB8_ADDR(ALT_USB0_INTREG_ADDR)
15301 /* The address of the ALT_USB_INTREG_DIEPCTL9 register for the ALT_USB0_INTREG instance. */
15302 #define ALT_USB0_INTREG_DIEPCTL9_ADDR ALT_USB_INTREG_DIEPCTL9_ADDR(ALT_USB0_INTREG_ADDR)
15303 /* The address of the ALT_USB_INTREG_DIEPINT9 register for the ALT_USB0_INTREG instance. */
15304 #define ALT_USB0_INTREG_DIEPINT9_ADDR ALT_USB_INTREG_DIEPINT9_ADDR(ALT_USB0_INTREG_ADDR)
15305 /* The address of the ALT_USB_INTREG_DIEPTSIZ9 register for the ALT_USB0_INTREG instance. */
15306 #define ALT_USB0_INTREG_DIEPTSIZ9_ADDR ALT_USB_INTREG_DIEPTSIZ9_ADDR(ALT_USB0_INTREG_ADDR)
15307 /* The address of the ALT_USB_INTREG_DIEPDMA9 register for the ALT_USB0_INTREG instance. */
15308 #define ALT_USB0_INTREG_DIEPDMA9_ADDR ALT_USB_INTREG_DIEPDMA9_ADDR(ALT_USB0_INTREG_ADDR)
15309 /* The address of the ALT_USB_INTREG_DTXFSTS9 register for the ALT_USB0_INTREG instance. */
15310 #define ALT_USB0_INTREG_DTXFSTS9_ADDR ALT_USB_INTREG_DTXFSTS9_ADDR(ALT_USB0_INTREG_ADDR)
15311 /* The address of the ALT_USB_INTREG_DIEPDMAB9 register for the ALT_USB0_INTREG instance. */
15312 #define ALT_USB0_INTREG_DIEPDMAB9_ADDR ALT_USB_INTREG_DIEPDMAB9_ADDR(ALT_USB0_INTREG_ADDR)
15313 /* The address of the ALT_USB_INTREG_DIEPCTL10 register for the ALT_USB0_INTREG instance. */
15314 #define ALT_USB0_INTREG_DIEPCTL10_ADDR ALT_USB_INTREG_DIEPCTL10_ADDR(ALT_USB0_INTREG_ADDR)
15315 /* The address of the ALT_USB_INTREG_DIEPINT10 register for the ALT_USB0_INTREG instance. */
15316 #define ALT_USB0_INTREG_DIEPINT10_ADDR ALT_USB_INTREG_DIEPINT10_ADDR(ALT_USB0_INTREG_ADDR)
15317 /* The address of the ALT_USB_INTREG_DIEPTSIZ10 register for the ALT_USB0_INTREG instance. */
15318 #define ALT_USB0_INTREG_DIEPTSIZ10_ADDR ALT_USB_INTREG_DIEPTSIZ10_ADDR(ALT_USB0_INTREG_ADDR)
15319 /* The address of the ALT_USB_INTREG_DIEPDMA10 register for the ALT_USB0_INTREG instance. */
15320 #define ALT_USB0_INTREG_DIEPDMA10_ADDR ALT_USB_INTREG_DIEPDMA10_ADDR(ALT_USB0_INTREG_ADDR)
15321 /* The address of the ALT_USB_INTREG_DTXFSTS10 register for the ALT_USB0_INTREG instance. */
15322 #define ALT_USB0_INTREG_DTXFSTS10_ADDR ALT_USB_INTREG_DTXFSTS10_ADDR(ALT_USB0_INTREG_ADDR)
15323 /* The address of the ALT_USB_INTREG_DIEPDMAB10 register for the ALT_USB0_INTREG instance. */
15324 #define ALT_USB0_INTREG_DIEPDMAB10_ADDR ALT_USB_INTREG_DIEPDMAB10_ADDR(ALT_USB0_INTREG_ADDR)
15325 /* The address of the ALT_USB_INTREG_DIEPCTL11 register for the ALT_USB0_INTREG instance. */
15326 #define ALT_USB0_INTREG_DIEPCTL11_ADDR ALT_USB_INTREG_DIEPCTL11_ADDR(ALT_USB0_INTREG_ADDR)
15327 /* The address of the ALT_USB_INTREG_DIEPINT11 register for the ALT_USB0_INTREG instance. */
15328 #define ALT_USB0_INTREG_DIEPINT11_ADDR ALT_USB_INTREG_DIEPINT11_ADDR(ALT_USB0_INTREG_ADDR)
15329 /* The address of the ALT_USB_INTREG_DIEPTSIZ11 register for the ALT_USB0_INTREG instance. */
15330 #define ALT_USB0_INTREG_DIEPTSIZ11_ADDR ALT_USB_INTREG_DIEPTSIZ11_ADDR(ALT_USB0_INTREG_ADDR)
15331 /* The address of the ALT_USB_INTREG_DIEPDMA11 register for the ALT_USB0_INTREG instance. */
15332 #define ALT_USB0_INTREG_DIEPDMA11_ADDR ALT_USB_INTREG_DIEPDMA11_ADDR(ALT_USB0_INTREG_ADDR)
15333 /* The address of the ALT_USB_INTREG_DTXFSTS11 register for the ALT_USB0_INTREG instance. */
15334 #define ALT_USB0_INTREG_DTXFSTS11_ADDR ALT_USB_INTREG_DTXFSTS11_ADDR(ALT_USB0_INTREG_ADDR)
15335 /* The address of the ALT_USB_INTREG_DIEPDMAB11 register for the ALT_USB0_INTREG instance. */
15336 #define ALT_USB0_INTREG_DIEPDMAB11_ADDR ALT_USB_INTREG_DIEPDMAB11_ADDR(ALT_USB0_INTREG_ADDR)
15337 /* The address of the ALT_USB_INTREG_DIEPCTL12 register for the ALT_USB0_INTREG instance. */
15338 #define ALT_USB0_INTREG_DIEPCTL12_ADDR ALT_USB_INTREG_DIEPCTL12_ADDR(ALT_USB0_INTREG_ADDR)
15339 /* The address of the ALT_USB_INTREG_DIEPINT12 register for the ALT_USB0_INTREG instance. */
15340 #define ALT_USB0_INTREG_DIEPINT12_ADDR ALT_USB_INTREG_DIEPINT12_ADDR(ALT_USB0_INTREG_ADDR)
15341 /* The address of the ALT_USB_INTREG_DIEPTSIZ12 register for the ALT_USB0_INTREG instance. */
15342 #define ALT_USB0_INTREG_DIEPTSIZ12_ADDR ALT_USB_INTREG_DIEPTSIZ12_ADDR(ALT_USB0_INTREG_ADDR)
15343 /* The address of the ALT_USB_INTREG_DIEPDMA12 register for the ALT_USB0_INTREG instance. */
15344 #define ALT_USB0_INTREG_DIEPDMA12_ADDR ALT_USB_INTREG_DIEPDMA12_ADDR(ALT_USB0_INTREG_ADDR)
15345 /* The address of the ALT_USB_INTREG_DTXFSTS12 register for the ALT_USB0_INTREG instance. */
15346 #define ALT_USB0_INTREG_DTXFSTS12_ADDR ALT_USB_INTREG_DTXFSTS12_ADDR(ALT_USB0_INTREG_ADDR)
15347 /* The address of the ALT_USB_INTREG_DIEPDMAB12 register for the ALT_USB0_INTREG instance. */
15348 #define ALT_USB0_INTREG_DIEPDMAB12_ADDR ALT_USB_INTREG_DIEPDMAB12_ADDR(ALT_USB0_INTREG_ADDR)
15349 /* The address of the ALT_USB_INTREG_DIEPCTL13 register for the ALT_USB0_INTREG instance. */
15350 #define ALT_USB0_INTREG_DIEPCTL13_ADDR ALT_USB_INTREG_DIEPCTL13_ADDR(ALT_USB0_INTREG_ADDR)
15351 /* The address of the ALT_USB_INTREG_DIEPINT13 register for the ALT_USB0_INTREG instance. */
15352 #define ALT_USB0_INTREG_DIEPINT13_ADDR ALT_USB_INTREG_DIEPINT13_ADDR(ALT_USB0_INTREG_ADDR)
15353 /* The address of the ALT_USB_INTREG_DIEPTSIZ13 register for the ALT_USB0_INTREG instance. */
15354 #define ALT_USB0_INTREG_DIEPTSIZ13_ADDR ALT_USB_INTREG_DIEPTSIZ13_ADDR(ALT_USB0_INTREG_ADDR)
15355 /* The address of the ALT_USB_INTREG_DIEPDMA13 register for the ALT_USB0_INTREG instance. */
15356 #define ALT_USB0_INTREG_DIEPDMA13_ADDR ALT_USB_INTREG_DIEPDMA13_ADDR(ALT_USB0_INTREG_ADDR)
15357 /* The address of the ALT_USB_INTREG_DTXFSTS13 register for the ALT_USB0_INTREG instance. */
15358 #define ALT_USB0_INTREG_DTXFSTS13_ADDR ALT_USB_INTREG_DTXFSTS13_ADDR(ALT_USB0_INTREG_ADDR)
15359 /* The address of the ALT_USB_INTREG_DIEPDMAB13 register for the ALT_USB0_INTREG instance. */
15360 #define ALT_USB0_INTREG_DIEPDMAB13_ADDR ALT_USB_INTREG_DIEPDMAB13_ADDR(ALT_USB0_INTREG_ADDR)
15361 /* The address of the ALT_USB_INTREG_DIEPCTL14 register for the ALT_USB0_INTREG instance. */
15362 #define ALT_USB0_INTREG_DIEPCTL14_ADDR ALT_USB_INTREG_DIEPCTL14_ADDR(ALT_USB0_INTREG_ADDR)
15363 /* The address of the ALT_USB_INTREG_DIEPINT14 register for the ALT_USB0_INTREG instance. */
15364 #define ALT_USB0_INTREG_DIEPINT14_ADDR ALT_USB_INTREG_DIEPINT14_ADDR(ALT_USB0_INTREG_ADDR)
15365 /* The address of the ALT_USB_INTREG_DIEPTSIZ14 register for the ALT_USB0_INTREG instance. */
15366 #define ALT_USB0_INTREG_DIEPTSIZ14_ADDR ALT_USB_INTREG_DIEPTSIZ14_ADDR(ALT_USB0_INTREG_ADDR)
15367 /* The address of the ALT_USB_INTREG_DIEPDMA14 register for the ALT_USB0_INTREG instance. */
15368 #define ALT_USB0_INTREG_DIEPDMA14_ADDR ALT_USB_INTREG_DIEPDMA14_ADDR(ALT_USB0_INTREG_ADDR)
15369 /* The address of the ALT_USB_INTREG_DTXFSTS14 register for the ALT_USB0_INTREG instance. */
15370 #define ALT_USB0_INTREG_DTXFSTS14_ADDR ALT_USB_INTREG_DTXFSTS14_ADDR(ALT_USB0_INTREG_ADDR)
15371 /* The address of the ALT_USB_INTREG_DIEPDMAB14 register for the ALT_USB0_INTREG instance. */
15372 #define ALT_USB0_INTREG_DIEPDMAB14_ADDR ALT_USB_INTREG_DIEPDMAB14_ADDR(ALT_USB0_INTREG_ADDR)
15373 /* The address of the ALT_USB_INTREG_DIEPCTL15 register for the ALT_USB0_INTREG instance. */
15374 #define ALT_USB0_INTREG_DIEPCTL15_ADDR ALT_USB_INTREG_DIEPCTL15_ADDR(ALT_USB0_INTREG_ADDR)
15375 /* The address of the ALT_USB_INTREG_DIEPINT15 register for the ALT_USB0_INTREG instance. */
15376 #define ALT_USB0_INTREG_DIEPINT15_ADDR ALT_USB_INTREG_DIEPINT15_ADDR(ALT_USB0_INTREG_ADDR)
15377 /* The address of the ALT_USB_INTREG_DIEPTSIZ15 register for the ALT_USB0_INTREG instance. */
15378 #define ALT_USB0_INTREG_DIEPTSIZ15_ADDR ALT_USB_INTREG_DIEPTSIZ15_ADDR(ALT_USB0_INTREG_ADDR)
15379 /* The address of the ALT_USB_INTREG_DIEPDMA15 register for the ALT_USB0_INTREG instance. */
15380 #define ALT_USB0_INTREG_DIEPDMA15_ADDR ALT_USB_INTREG_DIEPDMA15_ADDR(ALT_USB0_INTREG_ADDR)
15381 /* The address of the ALT_USB_INTREG_DTXFSTS15 register for the ALT_USB0_INTREG instance. */
15382 #define ALT_USB0_INTREG_DTXFSTS15_ADDR ALT_USB_INTREG_DTXFSTS15_ADDR(ALT_USB0_INTREG_ADDR)
15383 /* The address of the ALT_USB_INTREG_DIEPDMAB15 register for the ALT_USB0_INTREG instance. */
15384 #define ALT_USB0_INTREG_DIEPDMAB15_ADDR ALT_USB_INTREG_DIEPDMAB15_ADDR(ALT_USB0_INTREG_ADDR)
15385 /* The address of the ALT_USB_INTREG_DOEPCTL0 register for the ALT_USB0_INTREG instance. */
15386 #define ALT_USB0_INTREG_DOEPCTL0_ADDR ALT_USB_INTREG_DOEPCTL0_ADDR(ALT_USB0_INTREG_ADDR)
15387 /* The address of the ALT_USB_INTREG_DOEPINT0 register for the ALT_USB0_INTREG instance. */
15388 #define ALT_USB0_INTREG_DOEPINT0_ADDR ALT_USB_INTREG_DOEPINT0_ADDR(ALT_USB0_INTREG_ADDR)
15389 /* The address of the ALT_USB_INTREG_DOEPTSIZ0 register for the ALT_USB0_INTREG instance. */
15390 #define ALT_USB0_INTREG_DOEPTSIZ0_ADDR ALT_USB_INTREG_DOEPTSIZ0_ADDR(ALT_USB0_INTREG_ADDR)
15391 /* The address of the ALT_USB_INTREG_DOEPDMA0 register for the ALT_USB0_INTREG instance. */
15392 #define ALT_USB0_INTREG_DOEPDMA0_ADDR ALT_USB_INTREG_DOEPDMA0_ADDR(ALT_USB0_INTREG_ADDR)
15393 /* The address of the ALT_USB_INTREG_DOEPDMAB0 register for the ALT_USB0_INTREG instance. */
15394 #define ALT_USB0_INTREG_DOEPDMAB0_ADDR ALT_USB_INTREG_DOEPDMAB0_ADDR(ALT_USB0_INTREG_ADDR)
15395 /* The address of the ALT_USB_INTREG_DOEPCTL1 register for the ALT_USB0_INTREG instance. */
15396 #define ALT_USB0_INTREG_DOEPCTL1_ADDR ALT_USB_INTREG_DOEPCTL1_ADDR(ALT_USB0_INTREG_ADDR)
15397 /* The address of the ALT_USB_INTREG_DOEPINT1 register for the ALT_USB0_INTREG instance. */
15398 #define ALT_USB0_INTREG_DOEPINT1_ADDR ALT_USB_INTREG_DOEPINT1_ADDR(ALT_USB0_INTREG_ADDR)
15399 /* The address of the ALT_USB_INTREG_DOEPTSIZ1 register for the ALT_USB0_INTREG instance. */
15400 #define ALT_USB0_INTREG_DOEPTSIZ1_ADDR ALT_USB_INTREG_DOEPTSIZ1_ADDR(ALT_USB0_INTREG_ADDR)
15401 /* The address of the ALT_USB_INTREG_DOEPDMA1 register for the ALT_USB0_INTREG instance. */
15402 #define ALT_USB0_INTREG_DOEPDMA1_ADDR ALT_USB_INTREG_DOEPDMA1_ADDR(ALT_USB0_INTREG_ADDR)
15403 /* The address of the ALT_USB_INTREG_DOEPDMAB1 register for the ALT_USB0_INTREG instance. */
15404 #define ALT_USB0_INTREG_DOEPDMAB1_ADDR ALT_USB_INTREG_DOEPDMAB1_ADDR(ALT_USB0_INTREG_ADDR)
15405 /* The address of the ALT_USB_INTREG_DOEPCTL2 register for the ALT_USB0_INTREG instance. */
15406 #define ALT_USB0_INTREG_DOEPCTL2_ADDR ALT_USB_INTREG_DOEPCTL2_ADDR(ALT_USB0_INTREG_ADDR)
15407 /* The address of the ALT_USB_INTREG_DOEPINT2 register for the ALT_USB0_INTREG instance. */
15408 #define ALT_USB0_INTREG_DOEPINT2_ADDR ALT_USB_INTREG_DOEPINT2_ADDR(ALT_USB0_INTREG_ADDR)
15409 /* The address of the ALT_USB_INTREG_DOEPTSIZ2 register for the ALT_USB0_INTREG instance. */
15410 #define ALT_USB0_INTREG_DOEPTSIZ2_ADDR ALT_USB_INTREG_DOEPTSIZ2_ADDR(ALT_USB0_INTREG_ADDR)
15411 /* The address of the ALT_USB_INTREG_DOEPDMA2 register for the ALT_USB0_INTREG instance. */
15412 #define ALT_USB0_INTREG_DOEPDMA2_ADDR ALT_USB_INTREG_DOEPDMA2_ADDR(ALT_USB0_INTREG_ADDR)
15413 /* The address of the ALT_USB_INTREG_DOEPDMAB2 register for the ALT_USB0_INTREG instance. */
15414 #define ALT_USB0_INTREG_DOEPDMAB2_ADDR ALT_USB_INTREG_DOEPDMAB2_ADDR(ALT_USB0_INTREG_ADDR)
15415 /* The address of the ALT_USB_INTREG_DOEPCTL3 register for the ALT_USB0_INTREG instance. */
15416 #define ALT_USB0_INTREG_DOEPCTL3_ADDR ALT_USB_INTREG_DOEPCTL3_ADDR(ALT_USB0_INTREG_ADDR)
15417 /* The address of the ALT_USB_INTREG_DOEPINT3 register for the ALT_USB0_INTREG instance. */
15418 #define ALT_USB0_INTREG_DOEPINT3_ADDR ALT_USB_INTREG_DOEPINT3_ADDR(ALT_USB0_INTREG_ADDR)
15419 /* The address of the ALT_USB_INTREG_DOEPTSIZ3 register for the ALT_USB0_INTREG instance. */
15420 #define ALT_USB0_INTREG_DOEPTSIZ3_ADDR ALT_USB_INTREG_DOEPTSIZ3_ADDR(ALT_USB0_INTREG_ADDR)
15421 /* The address of the ALT_USB_INTREG_DOEPDMA3 register for the ALT_USB0_INTREG instance. */
15422 #define ALT_USB0_INTREG_DOEPDMA3_ADDR ALT_USB_INTREG_DOEPDMA3_ADDR(ALT_USB0_INTREG_ADDR)
15423 /* The address of the ALT_USB_INTREG_DOEPDMAB3 register for the ALT_USB0_INTREG instance. */
15424 #define ALT_USB0_INTREG_DOEPDMAB3_ADDR ALT_USB_INTREG_DOEPDMAB3_ADDR(ALT_USB0_INTREG_ADDR)
15425 /* The address of the ALT_USB_INTREG_DOEPCTL4 register for the ALT_USB0_INTREG instance. */
15426 #define ALT_USB0_INTREG_DOEPCTL4_ADDR ALT_USB_INTREG_DOEPCTL4_ADDR(ALT_USB0_INTREG_ADDR)
15427 /* The address of the ALT_USB_INTREG_DOEPINT4 register for the ALT_USB0_INTREG instance. */
15428 #define ALT_USB0_INTREG_DOEPINT4_ADDR ALT_USB_INTREG_DOEPINT4_ADDR(ALT_USB0_INTREG_ADDR)
15429 /* The address of the ALT_USB_INTREG_DOEPTSIZ4 register for the ALT_USB0_INTREG instance. */
15430 #define ALT_USB0_INTREG_DOEPTSIZ4_ADDR ALT_USB_INTREG_DOEPTSIZ4_ADDR(ALT_USB0_INTREG_ADDR)
15431 /* The address of the ALT_USB_INTREG_DOEPDMA4 register for the ALT_USB0_INTREG instance. */
15432 #define ALT_USB0_INTREG_DOEPDMA4_ADDR ALT_USB_INTREG_DOEPDMA4_ADDR(ALT_USB0_INTREG_ADDR)
15433 /* The address of the ALT_USB_INTREG_DOEPDMAB4 register for the ALT_USB0_INTREG instance. */
15434 #define ALT_USB0_INTREG_DOEPDMAB4_ADDR ALT_USB_INTREG_DOEPDMAB4_ADDR(ALT_USB0_INTREG_ADDR)
15435 /* The address of the ALT_USB_INTREG_DOEPCTL5 register for the ALT_USB0_INTREG instance. */
15436 #define ALT_USB0_INTREG_DOEPCTL5_ADDR ALT_USB_INTREG_DOEPCTL5_ADDR(ALT_USB0_INTREG_ADDR)
15437 /* The address of the ALT_USB_INTREG_DOEPINT5 register for the ALT_USB0_INTREG instance. */
15438 #define ALT_USB0_INTREG_DOEPINT5_ADDR ALT_USB_INTREG_DOEPINT5_ADDR(ALT_USB0_INTREG_ADDR)
15439 /* The address of the ALT_USB_INTREG_DOEPTSIZ5 register for the ALT_USB0_INTREG instance. */
15440 #define ALT_USB0_INTREG_DOEPTSIZ5_ADDR ALT_USB_INTREG_DOEPTSIZ5_ADDR(ALT_USB0_INTREG_ADDR)
15441 /* The address of the ALT_USB_INTREG_DOEPDMA5 register for the ALT_USB0_INTREG instance. */
15442 #define ALT_USB0_INTREG_DOEPDMA5_ADDR ALT_USB_INTREG_DOEPDMA5_ADDR(ALT_USB0_INTREG_ADDR)
15443 /* The address of the ALT_USB_INTREG_DOEPDMAB5 register for the ALT_USB0_INTREG instance. */
15444 #define ALT_USB0_INTREG_DOEPDMAB5_ADDR ALT_USB_INTREG_DOEPDMAB5_ADDR(ALT_USB0_INTREG_ADDR)
15445 /* The address of the ALT_USB_INTREG_DOEPCTL6 register for the ALT_USB0_INTREG instance. */
15446 #define ALT_USB0_INTREG_DOEPCTL6_ADDR ALT_USB_INTREG_DOEPCTL6_ADDR(ALT_USB0_INTREG_ADDR)
15447 /* The address of the ALT_USB_INTREG_DOEPINT6 register for the ALT_USB0_INTREG instance. */
15448 #define ALT_USB0_INTREG_DOEPINT6_ADDR ALT_USB_INTREG_DOEPINT6_ADDR(ALT_USB0_INTREG_ADDR)
15449 /* The address of the ALT_USB_INTREG_DOEPTSIZ6 register for the ALT_USB0_INTREG instance. */
15450 #define ALT_USB0_INTREG_DOEPTSIZ6_ADDR ALT_USB_INTREG_DOEPTSIZ6_ADDR(ALT_USB0_INTREG_ADDR)
15451 /* The address of the ALT_USB_INTREG_DOEPDMA6 register for the ALT_USB0_INTREG instance. */
15452 #define ALT_USB0_INTREG_DOEPDMA6_ADDR ALT_USB_INTREG_DOEPDMA6_ADDR(ALT_USB0_INTREG_ADDR)
15453 /* The address of the ALT_USB_INTREG_DOEPDMAB6 register for the ALT_USB0_INTREG instance. */
15454 #define ALT_USB0_INTREG_DOEPDMAB6_ADDR ALT_USB_INTREG_DOEPDMAB6_ADDR(ALT_USB0_INTREG_ADDR)
15455 /* The address of the ALT_USB_INTREG_DOEPCTL7 register for the ALT_USB0_INTREG instance. */
15456 #define ALT_USB0_INTREG_DOEPCTL7_ADDR ALT_USB_INTREG_DOEPCTL7_ADDR(ALT_USB0_INTREG_ADDR)
15457 /* The address of the ALT_USB_INTREG_DOEPINT7 register for the ALT_USB0_INTREG instance. */
15458 #define ALT_USB0_INTREG_DOEPINT7_ADDR ALT_USB_INTREG_DOEPINT7_ADDR(ALT_USB0_INTREG_ADDR)
15459 /* The address of the ALT_USB_INTREG_DOEPTSIZ7 register for the ALT_USB0_INTREG instance. */
15460 #define ALT_USB0_INTREG_DOEPTSIZ7_ADDR ALT_USB_INTREG_DOEPTSIZ7_ADDR(ALT_USB0_INTREG_ADDR)
15461 /* The address of the ALT_USB_INTREG_DOEPDMA7 register for the ALT_USB0_INTREG instance. */
15462 #define ALT_USB0_INTREG_DOEPDMA7_ADDR ALT_USB_INTREG_DOEPDMA7_ADDR(ALT_USB0_INTREG_ADDR)
15463 /* The address of the ALT_USB_INTREG_DOEPDMAB7 register for the ALT_USB0_INTREG instance. */
15464 #define ALT_USB0_INTREG_DOEPDMAB7_ADDR ALT_USB_INTREG_DOEPDMAB7_ADDR(ALT_USB0_INTREG_ADDR)
15465 /* The address of the ALT_USB_INTREG_DOEPCTL8 register for the ALT_USB0_INTREG instance. */
15466 #define ALT_USB0_INTREG_DOEPCTL8_ADDR ALT_USB_INTREG_DOEPCTL8_ADDR(ALT_USB0_INTREG_ADDR)
15467 /* The address of the ALT_USB_INTREG_DOEPINT8 register for the ALT_USB0_INTREG instance. */
15468 #define ALT_USB0_INTREG_DOEPINT8_ADDR ALT_USB_INTREG_DOEPINT8_ADDR(ALT_USB0_INTREG_ADDR)
15469 /* The address of the ALT_USB_INTREG_DOEPTSIZ8 register for the ALT_USB0_INTREG instance. */
15470 #define ALT_USB0_INTREG_DOEPTSIZ8_ADDR ALT_USB_INTREG_DOEPTSIZ8_ADDR(ALT_USB0_INTREG_ADDR)
15471 /* The address of the ALT_USB_INTREG_DOEPDMA8 register for the ALT_USB0_INTREG instance. */
15472 #define ALT_USB0_INTREG_DOEPDMA8_ADDR ALT_USB_INTREG_DOEPDMA8_ADDR(ALT_USB0_INTREG_ADDR)
15473 /* The address of the ALT_USB_INTREG_DOEPDMAB8 register for the ALT_USB0_INTREG instance. */
15474 #define ALT_USB0_INTREG_DOEPDMAB8_ADDR ALT_USB_INTREG_DOEPDMAB8_ADDR(ALT_USB0_INTREG_ADDR)
15475 /* The address of the ALT_USB_INTREG_DOEPCTL9 register for the ALT_USB0_INTREG instance. */
15476 #define ALT_USB0_INTREG_DOEPCTL9_ADDR ALT_USB_INTREG_DOEPCTL9_ADDR(ALT_USB0_INTREG_ADDR)
15477 /* The address of the ALT_USB_INTREG_DOEPINT9 register for the ALT_USB0_INTREG instance. */
15478 #define ALT_USB0_INTREG_DOEPINT9_ADDR ALT_USB_INTREG_DOEPINT9_ADDR(ALT_USB0_INTREG_ADDR)
15479 /* The address of the ALT_USB_INTREG_DOEPTSIZ9 register for the ALT_USB0_INTREG instance. */
15480 #define ALT_USB0_INTREG_DOEPTSIZ9_ADDR ALT_USB_INTREG_DOEPTSIZ9_ADDR(ALT_USB0_INTREG_ADDR)
15481 /* The address of the ALT_USB_INTREG_DOEPDMA9 register for the ALT_USB0_INTREG instance. */
15482 #define ALT_USB0_INTREG_DOEPDMA9_ADDR ALT_USB_INTREG_DOEPDMA9_ADDR(ALT_USB0_INTREG_ADDR)
15483 /* The address of the ALT_USB_INTREG_DOEPDMAB9 register for the ALT_USB0_INTREG instance. */
15484 #define ALT_USB0_INTREG_DOEPDMAB9_ADDR ALT_USB_INTREG_DOEPDMAB9_ADDR(ALT_USB0_INTREG_ADDR)
15485 /* The address of the ALT_USB_INTREG_DOEPCTL10 register for the ALT_USB0_INTREG instance. */
15486 #define ALT_USB0_INTREG_DOEPCTL10_ADDR ALT_USB_INTREG_DOEPCTL10_ADDR(ALT_USB0_INTREG_ADDR)
15487 /* The address of the ALT_USB_INTREG_DOEPINT10 register for the ALT_USB0_INTREG instance. */
15488 #define ALT_USB0_INTREG_DOEPINT10_ADDR ALT_USB_INTREG_DOEPINT10_ADDR(ALT_USB0_INTREG_ADDR)
15489 /* The address of the ALT_USB_INTREG_DOEPTSIZ10 register for the ALT_USB0_INTREG instance. */
15490 #define ALT_USB0_INTREG_DOEPTSIZ10_ADDR ALT_USB_INTREG_DOEPTSIZ10_ADDR(ALT_USB0_INTREG_ADDR)
15491 /* The address of the ALT_USB_INTREG_DOEPDMA10 register for the ALT_USB0_INTREG instance. */
15492 #define ALT_USB0_INTREG_DOEPDMA10_ADDR ALT_USB_INTREG_DOEPDMA10_ADDR(ALT_USB0_INTREG_ADDR)
15493 /* The address of the ALT_USB_INTREG_DOEPDMAB10 register for the ALT_USB0_INTREG instance. */
15494 #define ALT_USB0_INTREG_DOEPDMAB10_ADDR ALT_USB_INTREG_DOEPDMAB10_ADDR(ALT_USB0_INTREG_ADDR)
15495 /* The address of the ALT_USB_INTREG_DOEPCTL11 register for the ALT_USB0_INTREG instance. */
15496 #define ALT_USB0_INTREG_DOEPCTL11_ADDR ALT_USB_INTREG_DOEPCTL11_ADDR(ALT_USB0_INTREG_ADDR)
15497 /* The address of the ALT_USB_INTREG_DOEPINT11 register for the ALT_USB0_INTREG instance. */
15498 #define ALT_USB0_INTREG_DOEPINT11_ADDR ALT_USB_INTREG_DOEPINT11_ADDR(ALT_USB0_INTREG_ADDR)
15499 /* The address of the ALT_USB_INTREG_DOEPTSIZ11 register for the ALT_USB0_INTREG instance. */
15500 #define ALT_USB0_INTREG_DOEPTSIZ11_ADDR ALT_USB_INTREG_DOEPTSIZ11_ADDR(ALT_USB0_INTREG_ADDR)
15501 /* The address of the ALT_USB_INTREG_DOEPDMA11 register for the ALT_USB0_INTREG instance. */
15502 #define ALT_USB0_INTREG_DOEPDMA11_ADDR ALT_USB_INTREG_DOEPDMA11_ADDR(ALT_USB0_INTREG_ADDR)
15503 /* The address of the ALT_USB_INTREG_DOEPDMAB11 register for the ALT_USB0_INTREG instance. */
15504 #define ALT_USB0_INTREG_DOEPDMAB11_ADDR ALT_USB_INTREG_DOEPDMAB11_ADDR(ALT_USB0_INTREG_ADDR)
15505 /* The address of the ALT_USB_INTREG_DOEPCTL12 register for the ALT_USB0_INTREG instance. */
15506 #define ALT_USB0_INTREG_DOEPCTL12_ADDR ALT_USB_INTREG_DOEPCTL12_ADDR(ALT_USB0_INTREG_ADDR)
15507 /* The address of the ALT_USB_INTREG_DOEPINT12 register for the ALT_USB0_INTREG instance. */
15508 #define ALT_USB0_INTREG_DOEPINT12_ADDR ALT_USB_INTREG_DOEPINT12_ADDR(ALT_USB0_INTREG_ADDR)
15509 /* The address of the ALT_USB_INTREG_DOEPTSIZ12 register for the ALT_USB0_INTREG instance. */
15510 #define ALT_USB0_INTREG_DOEPTSIZ12_ADDR ALT_USB_INTREG_DOEPTSIZ12_ADDR(ALT_USB0_INTREG_ADDR)
15511 /* The address of the ALT_USB_INTREG_DOEPDMA12 register for the ALT_USB0_INTREG instance. */
15512 #define ALT_USB0_INTREG_DOEPDMA12_ADDR ALT_USB_INTREG_DOEPDMA12_ADDR(ALT_USB0_INTREG_ADDR)
15513 /* The address of the ALT_USB_INTREG_DOEPDMAB12 register for the ALT_USB0_INTREG instance. */
15514 #define ALT_USB0_INTREG_DOEPDMAB12_ADDR ALT_USB_INTREG_DOEPDMAB12_ADDR(ALT_USB0_INTREG_ADDR)
15515 /* The address of the ALT_USB_INTREG_DOEPCTL13 register for the ALT_USB0_INTREG instance. */
15516 #define ALT_USB0_INTREG_DOEPCTL13_ADDR ALT_USB_INTREG_DOEPCTL13_ADDR(ALT_USB0_INTREG_ADDR)
15517 /* The address of the ALT_USB_INTREG_DOEPINT13 register for the ALT_USB0_INTREG instance. */
15518 #define ALT_USB0_INTREG_DOEPINT13_ADDR ALT_USB_INTREG_DOEPINT13_ADDR(ALT_USB0_INTREG_ADDR)
15519 /* The address of the ALT_USB_INTREG_DOEPTSIZ13 register for the ALT_USB0_INTREG instance. */
15520 #define ALT_USB0_INTREG_DOEPTSIZ13_ADDR ALT_USB_INTREG_DOEPTSIZ13_ADDR(ALT_USB0_INTREG_ADDR)
15521 /* The address of the ALT_USB_INTREG_DOEPDMA13 register for the ALT_USB0_INTREG instance. */
15522 #define ALT_USB0_INTREG_DOEPDMA13_ADDR ALT_USB_INTREG_DOEPDMA13_ADDR(ALT_USB0_INTREG_ADDR)
15523 /* The address of the ALT_USB_INTREG_DOEPDMAB13 register for the ALT_USB0_INTREG instance. */
15524 #define ALT_USB0_INTREG_DOEPDMAB13_ADDR ALT_USB_INTREG_DOEPDMAB13_ADDR(ALT_USB0_INTREG_ADDR)
15525 /* The address of the ALT_USB_INTREG_DOEPCTL14 register for the ALT_USB0_INTREG instance. */
15526 #define ALT_USB0_INTREG_DOEPCTL14_ADDR ALT_USB_INTREG_DOEPCTL14_ADDR(ALT_USB0_INTREG_ADDR)
15527 /* The address of the ALT_USB_INTREG_DOEPINT14 register for the ALT_USB0_INTREG instance. */
15528 #define ALT_USB0_INTREG_DOEPINT14_ADDR ALT_USB_INTREG_DOEPINT14_ADDR(ALT_USB0_INTREG_ADDR)
15529 /* The address of the ALT_USB_INTREG_DOEPTSIZ14 register for the ALT_USB0_INTREG instance. */
15530 #define ALT_USB0_INTREG_DOEPTSIZ14_ADDR ALT_USB_INTREG_DOEPTSIZ14_ADDR(ALT_USB0_INTREG_ADDR)
15531 /* The address of the ALT_USB_INTREG_DOEPDMA14 register for the ALT_USB0_INTREG instance. */
15532 #define ALT_USB0_INTREG_DOEPDMA14_ADDR ALT_USB_INTREG_DOEPDMA14_ADDR(ALT_USB0_INTREG_ADDR)
15533 /* The address of the ALT_USB_INTREG_DOEPDMAB14 register for the ALT_USB0_INTREG instance. */
15534 #define ALT_USB0_INTREG_DOEPDMAB14_ADDR ALT_USB_INTREG_DOEPDMAB14_ADDR(ALT_USB0_INTREG_ADDR)
15535 /* The address of the ALT_USB_INTREG_DOEPCTL15 register for the ALT_USB0_INTREG instance. */
15536 #define ALT_USB0_INTREG_DOEPCTL15_ADDR ALT_USB_INTREG_DOEPCTL15_ADDR(ALT_USB0_INTREG_ADDR)
15537 /* The address of the ALT_USB_INTREG_DOEPINT15 register for the ALT_USB0_INTREG instance. */
15538 #define ALT_USB0_INTREG_DOEPINT15_ADDR ALT_USB_INTREG_DOEPINT15_ADDR(ALT_USB0_INTREG_ADDR)
15539 /* The address of the ALT_USB_INTREG_DOEPTSIZ15 register for the ALT_USB0_INTREG instance. */
15540 #define ALT_USB0_INTREG_DOEPTSIZ15_ADDR ALT_USB_INTREG_DOEPTSIZ15_ADDR(ALT_USB0_INTREG_ADDR)
15541 /* The address of the ALT_USB_INTREG_DOEPDMA15 register for the ALT_USB0_INTREG instance. */
15542 #define ALT_USB0_INTREG_DOEPDMA15_ADDR ALT_USB_INTREG_DOEPDMA15_ADDR(ALT_USB0_INTREG_ADDR)
15543 /* The address of the ALT_USB_INTREG_DOEPDMAB15 register for the ALT_USB0_INTREG instance. */
15544 #define ALT_USB0_INTREG_DOEPDMAB15_ADDR ALT_USB_INTREG_DOEPDMAB15_ADDR(ALT_USB0_INTREG_ADDR)
15545 /* The address of the ALT_USB_INTREG_PCGCCTL register for the ALT_USB0_INTREG instance. */
15546 #define ALT_USB0_INTREG_PCGCCTL_ADDR ALT_USB_INTREG_PCGCCTL_ADDR(ALT_USB0_INTREG_ADDR)
15547 /* The base address byte offset for the start of the ALT_USB0_INTREG component. */
15548 #define ALT_USB0_INTREG_OFST 0xffb00000
15549 /* The start address of the ALT_USB0_INTREG component. */
15550 #define ALT_USB0_INTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_INTREG_OFST))
15551 /* The lower bound address range of the ALT_USB0_INTREG component. */
15552 #define ALT_USB0_INTREG_LB_ADDR ALT_USB0_INTREG_ADDR
15553 /* The upper bound address range of the ALT_USB0_INTREG component. */
15554 #define ALT_USB0_INTREG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_INTREG_ADDR) + 0xf00) - 1))
15555 
15556 
15557 /*
15558  * Component Instance : usb0_DFIFO_0
15559  *
15560  * Instance usb0_DFIFO_0 of component ALT_USB_DFIFO.
15561  *
15562  *
15563  */
15564 /* The base address byte offset for the start of the ALT_USB0_DFIFO_0 component. */
15565 #define ALT_USB0_DFIFO_0_OFST 0xffb01000
15566 /* The start address of the ALT_USB0_DFIFO_0 component. */
15567 #define ALT_USB0_DFIFO_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_0_OFST))
15568 /* The lower bound address range of the ALT_USB0_DFIFO_0 component. */
15569 #define ALT_USB0_DFIFO_0_LB_ADDR ALT_USB0_DFIFO_0_ADDR
15570 /* The upper bound address range of the ALT_USB0_DFIFO_0 component. */
15571 #define ALT_USB0_DFIFO_0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_0_ADDR) + 0x1000) - 1))
15572 
15573 
15574 /*
15575  * Component Instance : usb0_DFIFO_1
15576  *
15577  * Instance usb0_DFIFO_1 of component ALT_USB_DFIFO.
15578  *
15579  *
15580  */
15581 /* The base address byte offset for the start of the ALT_USB0_DFIFO_1 component. */
15582 #define ALT_USB0_DFIFO_1_OFST 0xffb02000
15583 /* The start address of the ALT_USB0_DFIFO_1 component. */
15584 #define ALT_USB0_DFIFO_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_1_OFST))
15585 /* The lower bound address range of the ALT_USB0_DFIFO_1 component. */
15586 #define ALT_USB0_DFIFO_1_LB_ADDR ALT_USB0_DFIFO_1_ADDR
15587 /* The upper bound address range of the ALT_USB0_DFIFO_1 component. */
15588 #define ALT_USB0_DFIFO_1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_1_ADDR) + 0x1000) - 1))
15589 
15590 
15591 /*
15592  * Component Instance : usb0_DFIFO_2
15593  *
15594  * Instance usb0_DFIFO_2 of component ALT_USB_DFIFO.
15595  *
15596  *
15597  */
15598 /* The base address byte offset for the start of the ALT_USB0_DFIFO_2 component. */
15599 #define ALT_USB0_DFIFO_2_OFST 0xffb03000
15600 /* The start address of the ALT_USB0_DFIFO_2 component. */
15601 #define ALT_USB0_DFIFO_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_2_OFST))
15602 /* The lower bound address range of the ALT_USB0_DFIFO_2 component. */
15603 #define ALT_USB0_DFIFO_2_LB_ADDR ALT_USB0_DFIFO_2_ADDR
15604 /* The upper bound address range of the ALT_USB0_DFIFO_2 component. */
15605 #define ALT_USB0_DFIFO_2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_2_ADDR) + 0x1000) - 1))
15606 
15607 
15608 /*
15609  * Component Instance : usb0_DFIFO_3
15610  *
15611  * Instance usb0_DFIFO_3 of component ALT_USB_DFIFO.
15612  *
15613  *
15614  */
15615 /* The base address byte offset for the start of the ALT_USB0_DFIFO_3 component. */
15616 #define ALT_USB0_DFIFO_3_OFST 0xffb04000
15617 /* The start address of the ALT_USB0_DFIFO_3 component. */
15618 #define ALT_USB0_DFIFO_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_3_OFST))
15619 /* The lower bound address range of the ALT_USB0_DFIFO_3 component. */
15620 #define ALT_USB0_DFIFO_3_LB_ADDR ALT_USB0_DFIFO_3_ADDR
15621 /* The upper bound address range of the ALT_USB0_DFIFO_3 component. */
15622 #define ALT_USB0_DFIFO_3_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_3_ADDR) + 0x1000) - 1))
15623 
15624 
15625 /*
15626  * Component Instance : usb0_DFIFO_4
15627  *
15628  * Instance usb0_DFIFO_4 of component ALT_USB_DFIFO.
15629  *
15630  *
15631  */
15632 /* The base address byte offset for the start of the ALT_USB0_DFIFO_4 component. */
15633 #define ALT_USB0_DFIFO_4_OFST 0xffb05000
15634 /* The start address of the ALT_USB0_DFIFO_4 component. */
15635 #define ALT_USB0_DFIFO_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_4_OFST))
15636 /* The lower bound address range of the ALT_USB0_DFIFO_4 component. */
15637 #define ALT_USB0_DFIFO_4_LB_ADDR ALT_USB0_DFIFO_4_ADDR
15638 /* The upper bound address range of the ALT_USB0_DFIFO_4 component. */
15639 #define ALT_USB0_DFIFO_4_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_4_ADDR) + 0x1000) - 1))
15640 
15641 
15642 /*
15643  * Component Instance : usb0_DFIFO_5
15644  *
15645  * Instance usb0_DFIFO_5 of component ALT_USB_DFIFO.
15646  *
15647  *
15648  */
15649 /* The base address byte offset for the start of the ALT_USB0_DFIFO_5 component. */
15650 #define ALT_USB0_DFIFO_5_OFST 0xffb06000
15651 /* The start address of the ALT_USB0_DFIFO_5 component. */
15652 #define ALT_USB0_DFIFO_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_5_OFST))
15653 /* The lower bound address range of the ALT_USB0_DFIFO_5 component. */
15654 #define ALT_USB0_DFIFO_5_LB_ADDR ALT_USB0_DFIFO_5_ADDR
15655 /* The upper bound address range of the ALT_USB0_DFIFO_5 component. */
15656 #define ALT_USB0_DFIFO_5_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_5_ADDR) + 0x1000) - 1))
15657 
15658 
15659 /*
15660  * Component Instance : usb0_DFIFO_6
15661  *
15662  * Instance usb0_DFIFO_6 of component ALT_USB_DFIFO.
15663  *
15664  *
15665  */
15666 /* The base address byte offset for the start of the ALT_USB0_DFIFO_6 component. */
15667 #define ALT_USB0_DFIFO_6_OFST 0xffb07000
15668 /* The start address of the ALT_USB0_DFIFO_6 component. */
15669 #define ALT_USB0_DFIFO_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_6_OFST))
15670 /* The lower bound address range of the ALT_USB0_DFIFO_6 component. */
15671 #define ALT_USB0_DFIFO_6_LB_ADDR ALT_USB0_DFIFO_6_ADDR
15672 /* The upper bound address range of the ALT_USB0_DFIFO_6 component. */
15673 #define ALT_USB0_DFIFO_6_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_6_ADDR) + 0x1000) - 1))
15674 
15675 
15676 /*
15677  * Component Instance : usb0_DFIFO_7
15678  *
15679  * Instance usb0_DFIFO_7 of component ALT_USB_DFIFO.
15680  *
15681  *
15682  */
15683 /* The base address byte offset for the start of the ALT_USB0_DFIFO_7 component. */
15684 #define ALT_USB0_DFIFO_7_OFST 0xffb08000
15685 /* The start address of the ALT_USB0_DFIFO_7 component. */
15686 #define ALT_USB0_DFIFO_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_7_OFST))
15687 /* The lower bound address range of the ALT_USB0_DFIFO_7 component. */
15688 #define ALT_USB0_DFIFO_7_LB_ADDR ALT_USB0_DFIFO_7_ADDR
15689 /* The upper bound address range of the ALT_USB0_DFIFO_7 component. */
15690 #define ALT_USB0_DFIFO_7_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_7_ADDR) + 0x1000) - 1))
15691 
15692 
15693 /*
15694  * Component Instance : usb0_DFIFO_8
15695  *
15696  * Instance usb0_DFIFO_8 of component ALT_USB_DFIFO.
15697  *
15698  *
15699  */
15700 /* The base address byte offset for the start of the ALT_USB0_DFIFO_8 component. */
15701 #define ALT_USB0_DFIFO_8_OFST 0xffb09000
15702 /* The start address of the ALT_USB0_DFIFO_8 component. */
15703 #define ALT_USB0_DFIFO_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_8_OFST))
15704 /* The lower bound address range of the ALT_USB0_DFIFO_8 component. */
15705 #define ALT_USB0_DFIFO_8_LB_ADDR ALT_USB0_DFIFO_8_ADDR
15706 /* The upper bound address range of the ALT_USB0_DFIFO_8 component. */
15707 #define ALT_USB0_DFIFO_8_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_8_ADDR) + 0x1000) - 1))
15708 
15709 
15710 /*
15711  * Component Instance : usb0_DFIFO_9
15712  *
15713  * Instance usb0_DFIFO_9 of component ALT_USB_DFIFO.
15714  *
15715  *
15716  */
15717 /* The base address byte offset for the start of the ALT_USB0_DFIFO_9 component. */
15718 #define ALT_USB0_DFIFO_9_OFST 0xffb0a000
15719 /* The start address of the ALT_USB0_DFIFO_9 component. */
15720 #define ALT_USB0_DFIFO_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_9_OFST))
15721 /* The lower bound address range of the ALT_USB0_DFIFO_9 component. */
15722 #define ALT_USB0_DFIFO_9_LB_ADDR ALT_USB0_DFIFO_9_ADDR
15723 /* The upper bound address range of the ALT_USB0_DFIFO_9 component. */
15724 #define ALT_USB0_DFIFO_9_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_9_ADDR) + 0x1000) - 1))
15725 
15726 
15727 /*
15728  * Component Instance : usb0_DFIFO_10
15729  *
15730  * Instance usb0_DFIFO_10 of component ALT_USB_DFIFO.
15731  *
15732  *
15733  */
15734 /* The base address byte offset for the start of the ALT_USB0_DFIFO_10 component. */
15735 #define ALT_USB0_DFIFO_10_OFST 0xffb0b000
15736 /* The start address of the ALT_USB0_DFIFO_10 component. */
15737 #define ALT_USB0_DFIFO_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_10_OFST))
15738 /* The lower bound address range of the ALT_USB0_DFIFO_10 component. */
15739 #define ALT_USB0_DFIFO_10_LB_ADDR ALT_USB0_DFIFO_10_ADDR
15740 /* The upper bound address range of the ALT_USB0_DFIFO_10 component. */
15741 #define ALT_USB0_DFIFO_10_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_10_ADDR) + 0x1000) - 1))
15742 
15743 
15744 /*
15745  * Component Instance : usb0_DFIFO_11
15746  *
15747  * Instance usb0_DFIFO_11 of component ALT_USB_DFIFO.
15748  *
15749  *
15750  */
15751 /* The base address byte offset for the start of the ALT_USB0_DFIFO_11 component. */
15752 #define ALT_USB0_DFIFO_11_OFST 0xffb0c000
15753 /* The start address of the ALT_USB0_DFIFO_11 component. */
15754 #define ALT_USB0_DFIFO_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_11_OFST))
15755 /* The lower bound address range of the ALT_USB0_DFIFO_11 component. */
15756 #define ALT_USB0_DFIFO_11_LB_ADDR ALT_USB0_DFIFO_11_ADDR
15757 /* The upper bound address range of the ALT_USB0_DFIFO_11 component. */
15758 #define ALT_USB0_DFIFO_11_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_11_ADDR) + 0x1000) - 1))
15759 
15760 
15761 /*
15762  * Component Instance : usb0_DFIFO_12
15763  *
15764  * Instance usb0_DFIFO_12 of component ALT_USB_DFIFO.
15765  *
15766  *
15767  */
15768 /* The base address byte offset for the start of the ALT_USB0_DFIFO_12 component. */
15769 #define ALT_USB0_DFIFO_12_OFST 0xffb0d000
15770 /* The start address of the ALT_USB0_DFIFO_12 component. */
15771 #define ALT_USB0_DFIFO_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_12_OFST))
15772 /* The lower bound address range of the ALT_USB0_DFIFO_12 component. */
15773 #define ALT_USB0_DFIFO_12_LB_ADDR ALT_USB0_DFIFO_12_ADDR
15774 /* The upper bound address range of the ALT_USB0_DFIFO_12 component. */
15775 #define ALT_USB0_DFIFO_12_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_12_ADDR) + 0x1000) - 1))
15776 
15777 
15778 /*
15779  * Component Instance : usb0_DFIFO_13
15780  *
15781  * Instance usb0_DFIFO_13 of component ALT_USB_DFIFO.
15782  *
15783  *
15784  */
15785 /* The base address byte offset for the start of the ALT_USB0_DFIFO_13 component. */
15786 #define ALT_USB0_DFIFO_13_OFST 0xffb0e000
15787 /* The start address of the ALT_USB0_DFIFO_13 component. */
15788 #define ALT_USB0_DFIFO_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_13_OFST))
15789 /* The lower bound address range of the ALT_USB0_DFIFO_13 component. */
15790 #define ALT_USB0_DFIFO_13_LB_ADDR ALT_USB0_DFIFO_13_ADDR
15791 /* The upper bound address range of the ALT_USB0_DFIFO_13 component. */
15792 #define ALT_USB0_DFIFO_13_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_13_ADDR) + 0x1000) - 1))
15793 
15794 
15795 /*
15796  * Component Instance : usb0_DFIFO_14
15797  *
15798  * Instance usb0_DFIFO_14 of component ALT_USB_DFIFO.
15799  *
15800  *
15801  */
15802 /* The base address byte offset for the start of the ALT_USB0_DFIFO_14 component. */
15803 #define ALT_USB0_DFIFO_14_OFST 0xffb0f000
15804 /* The start address of the ALT_USB0_DFIFO_14 component. */
15805 #define ALT_USB0_DFIFO_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_14_OFST))
15806 /* The lower bound address range of the ALT_USB0_DFIFO_14 component. */
15807 #define ALT_USB0_DFIFO_14_LB_ADDR ALT_USB0_DFIFO_14_ADDR
15808 /* The upper bound address range of the ALT_USB0_DFIFO_14 component. */
15809 #define ALT_USB0_DFIFO_14_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_14_ADDR) + 0x1000) - 1))
15810 
15811 
15812 /*
15813  * Component Instance : usb0_DFIFO_15
15814  *
15815  * Instance usb0_DFIFO_15 of component ALT_USB_DFIFO.
15816  *
15817  *
15818  */
15819 /* The base address byte offset for the start of the ALT_USB0_DFIFO_15 component. */
15820 #define ALT_USB0_DFIFO_15_OFST 0xffb10000
15821 /* The start address of the ALT_USB0_DFIFO_15 component. */
15822 #define ALT_USB0_DFIFO_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_15_OFST))
15823 /* The lower bound address range of the ALT_USB0_DFIFO_15 component. */
15824 #define ALT_USB0_DFIFO_15_LB_ADDR ALT_USB0_DFIFO_15_ADDR
15825 /* The upper bound address range of the ALT_USB0_DFIFO_15 component. */
15826 #define ALT_USB0_DFIFO_15_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_15_ADDR) + 0x1000) - 1))
15827 
15828 
15829 /*
15830  * Component Instance : usb0_DFIFO_DA
15831  *
15832  * Instance usb0_DFIFO_DA of component ALT_USB0_DFIFO_DA.
15833  *
15834  *
15835  */
15836 /* The base address byte offset for the start of the ALT_USB0_DFIFO_DA component. */
15837 #define ALT_USB0_DFIFO_DA_OFST 0xffb20000
15838 /* The start address of the ALT_USB0_DFIFO_DA component. */
15839 #define ALT_USB0_DFIFO_DA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DFIFO_DA_OFST))
15840 /* The lower bound address range of the ALT_USB0_DFIFO_DA component. */
15841 #define ALT_USB0_DFIFO_DA_LB_ADDR ALT_USB0_DFIFO_DA_ADDR
15842 /* The upper bound address range of the ALT_USB0_DFIFO_DA component. */
15843 #define ALT_USB0_DFIFO_DA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DFIFO_DA_ADDR) + 0x8000) - 1))
15844 
15845 
15846 /*
15847  * Component Instance : usb1_intreg
15848  *
15849  * Instance usb1_intreg of component ALT_USB_INTREG.
15850  *
15851  *
15852  */
15853 /* The address of the ALT_USB_INTREG_GOTGCTL register for the ALT_USB1_INTREG instance. */
15854 #define ALT_USB1_INTREG_GOTGCTL_ADDR ALT_USB_INTREG_GOTGCTL_ADDR(ALT_USB1_INTREG_ADDR)
15855 /* The address of the ALT_USB_INTREG_GOTGINT register for the ALT_USB1_INTREG instance. */
15856 #define ALT_USB1_INTREG_GOTGINT_ADDR ALT_USB_INTREG_GOTGINT_ADDR(ALT_USB1_INTREG_ADDR)
15857 /* The address of the ALT_USB_INTREG_GAHBCFG register for the ALT_USB1_INTREG instance. */
15858 #define ALT_USB1_INTREG_GAHBCFG_ADDR ALT_USB_INTREG_GAHBCFG_ADDR(ALT_USB1_INTREG_ADDR)
15859 /* The address of the ALT_USB_INTREG_GUSBCFG register for the ALT_USB1_INTREG instance. */
15860 #define ALT_USB1_INTREG_GUSBCFG_ADDR ALT_USB_INTREG_GUSBCFG_ADDR(ALT_USB1_INTREG_ADDR)
15861 /* The address of the ALT_USB_INTREG_GRSTCTL register for the ALT_USB1_INTREG instance. */
15862 #define ALT_USB1_INTREG_GRSTCTL_ADDR ALT_USB_INTREG_GRSTCTL_ADDR(ALT_USB1_INTREG_ADDR)
15863 /* The address of the ALT_USB_INTREG_GINTSTS register for the ALT_USB1_INTREG instance. */
15864 #define ALT_USB1_INTREG_GINTSTS_ADDR ALT_USB_INTREG_GINTSTS_ADDR(ALT_USB1_INTREG_ADDR)
15865 /* The address of the ALT_USB_INTREG_GINTMSK register for the ALT_USB1_INTREG instance. */
15866 #define ALT_USB1_INTREG_GINTMSK_ADDR ALT_USB_INTREG_GINTMSK_ADDR(ALT_USB1_INTREG_ADDR)
15867 /* The address of the ALT_USB_INTREG_GRXSTSR register for the ALT_USB1_INTREG instance. */
15868 #define ALT_USB1_INTREG_GRXSTSR_ADDR ALT_USB_INTREG_GRXSTSR_ADDR(ALT_USB1_INTREG_ADDR)
15869 /* The address of the ALT_USB_INTREG_GRXSTSP register for the ALT_USB1_INTREG instance. */
15870 #define ALT_USB1_INTREG_GRXSTSP_ADDR ALT_USB_INTREG_GRXSTSP_ADDR(ALT_USB1_INTREG_ADDR)
15871 /* The address of the ALT_USB_INTREG_GRXFSIZ register for the ALT_USB1_INTREG instance. */
15872 #define ALT_USB1_INTREG_GRXFSIZ_ADDR ALT_USB_INTREG_GRXFSIZ_ADDR(ALT_USB1_INTREG_ADDR)
15873 /* The address of the ALT_USB_INTREG_GNPTXFSIZ register for the ALT_USB1_INTREG instance. */
15874 #define ALT_USB1_INTREG_GNPTXFSIZ_ADDR ALT_USB_INTREG_GNPTXFSIZ_ADDR(ALT_USB1_INTREG_ADDR)
15875 /* The address of the ALT_USB_INTREG_GNPTXSTS register for the ALT_USB1_INTREG instance. */
15876 #define ALT_USB1_INTREG_GNPTXSTS_ADDR ALT_USB_INTREG_GNPTXSTS_ADDR(ALT_USB1_INTREG_ADDR)
15877 /* The address of the ALT_USB_INTREG_GPVNDCTL register for the ALT_USB1_INTREG instance. */
15878 #define ALT_USB1_INTREG_GPVNDCTL_ADDR ALT_USB_INTREG_GPVNDCTL_ADDR(ALT_USB1_INTREG_ADDR)
15879 /* The address of the ALT_USB_INTREG_GGPIO register for the ALT_USB1_INTREG instance. */
15880 #define ALT_USB1_INTREG_GGPIO_ADDR ALT_USB_INTREG_GGPIO_ADDR(ALT_USB1_INTREG_ADDR)
15881 /* The address of the ALT_USB_INTREG_GUID register for the ALT_USB1_INTREG instance. */
15882 #define ALT_USB1_INTREG_GUID_ADDR ALT_USB_INTREG_GUID_ADDR(ALT_USB1_INTREG_ADDR)
15883 /* The address of the ALT_USB_INTREG_GSNPSID register for the ALT_USB1_INTREG instance. */
15884 #define ALT_USB1_INTREG_GSNPSID_ADDR ALT_USB_INTREG_GSNPSID_ADDR(ALT_USB1_INTREG_ADDR)
15885 /* The address of the ALT_USB_INTREG_GHWCFG1 register for the ALT_USB1_INTREG instance. */
15886 #define ALT_USB1_INTREG_GHWCFG1_ADDR ALT_USB_INTREG_GHWCFG1_ADDR(ALT_USB1_INTREG_ADDR)
15887 /* The address of the ALT_USB_INTREG_GHWCFG2 register for the ALT_USB1_INTREG instance. */
15888 #define ALT_USB1_INTREG_GHWCFG2_ADDR ALT_USB_INTREG_GHWCFG2_ADDR(ALT_USB1_INTREG_ADDR)
15889 /* The address of the ALT_USB_INTREG_GHWCFG3 register for the ALT_USB1_INTREG instance. */
15890 #define ALT_USB1_INTREG_GHWCFG3_ADDR ALT_USB_INTREG_GHWCFG3_ADDR(ALT_USB1_INTREG_ADDR)
15891 /* The address of the ALT_USB_INTREG_GHWCFG4 register for the ALT_USB1_INTREG instance. */
15892 #define ALT_USB1_INTREG_GHWCFG4_ADDR ALT_USB_INTREG_GHWCFG4_ADDR(ALT_USB1_INTREG_ADDR)
15893 /* The address of the ALT_USB_INTREG_GDFIFOCFG register for the ALT_USB1_INTREG instance. */
15894 #define ALT_USB1_INTREG_GDFIFOCFG_ADDR ALT_USB_INTREG_GDFIFOCFG_ADDR(ALT_USB1_INTREG_ADDR)
15895 /* The address of the ALT_USB_INTREG_HPTXFSIZ register for the ALT_USB1_INTREG instance. */
15896 #define ALT_USB1_INTREG_HPTXFSIZ_ADDR ALT_USB_INTREG_HPTXFSIZ_ADDR(ALT_USB1_INTREG_ADDR)
15897 /* The address of the ALT_USB_INTREG_DIEPTXF1 register for the ALT_USB1_INTREG instance. */
15898 #define ALT_USB1_INTREG_DIEPTXF1_ADDR ALT_USB_INTREG_DIEPTXF1_ADDR(ALT_USB1_INTREG_ADDR)
15899 /* The address of the ALT_USB_INTREG_DIEPTXF2 register for the ALT_USB1_INTREG instance. */
15900 #define ALT_USB1_INTREG_DIEPTXF2_ADDR ALT_USB_INTREG_DIEPTXF2_ADDR(ALT_USB1_INTREG_ADDR)
15901 /* The address of the ALT_USB_INTREG_DIEPTXF3 register for the ALT_USB1_INTREG instance. */
15902 #define ALT_USB1_INTREG_DIEPTXF3_ADDR ALT_USB_INTREG_DIEPTXF3_ADDR(ALT_USB1_INTREG_ADDR)
15903 /* The address of the ALT_USB_INTREG_DIEPTXF4 register for the ALT_USB1_INTREG instance. */
15904 #define ALT_USB1_INTREG_DIEPTXF4_ADDR ALT_USB_INTREG_DIEPTXF4_ADDR(ALT_USB1_INTREG_ADDR)
15905 /* The address of the ALT_USB_INTREG_DIEPTXF5 register for the ALT_USB1_INTREG instance. */
15906 #define ALT_USB1_INTREG_DIEPTXF5_ADDR ALT_USB_INTREG_DIEPTXF5_ADDR(ALT_USB1_INTREG_ADDR)
15907 /* The address of the ALT_USB_INTREG_DIEPTXF6 register for the ALT_USB1_INTREG instance. */
15908 #define ALT_USB1_INTREG_DIEPTXF6_ADDR ALT_USB_INTREG_DIEPTXF6_ADDR(ALT_USB1_INTREG_ADDR)
15909 /* The address of the ALT_USB_INTREG_DIEPTXF7 register for the ALT_USB1_INTREG instance. */
15910 #define ALT_USB1_INTREG_DIEPTXF7_ADDR ALT_USB_INTREG_DIEPTXF7_ADDR(ALT_USB1_INTREG_ADDR)
15911 /* The address of the ALT_USB_INTREG_DIEPTXF8 register for the ALT_USB1_INTREG instance. */
15912 #define ALT_USB1_INTREG_DIEPTXF8_ADDR ALT_USB_INTREG_DIEPTXF8_ADDR(ALT_USB1_INTREG_ADDR)
15913 /* The address of the ALT_USB_INTREG_DIEPTXF9 register for the ALT_USB1_INTREG instance. */
15914 #define ALT_USB1_INTREG_DIEPTXF9_ADDR ALT_USB_INTREG_DIEPTXF9_ADDR(ALT_USB1_INTREG_ADDR)
15915 /* The address of the ALT_USB_INTREG_DIEPTXF10 register for the ALT_USB1_INTREG instance. */
15916 #define ALT_USB1_INTREG_DIEPTXF10_ADDR ALT_USB_INTREG_DIEPTXF10_ADDR(ALT_USB1_INTREG_ADDR)
15917 /* The address of the ALT_USB_INTREG_DIEPTXF11 register for the ALT_USB1_INTREG instance. */
15918 #define ALT_USB1_INTREG_DIEPTXF11_ADDR ALT_USB_INTREG_DIEPTXF11_ADDR(ALT_USB1_INTREG_ADDR)
15919 /* The address of the ALT_USB_INTREG_DIEPTXF12 register for the ALT_USB1_INTREG instance. */
15920 #define ALT_USB1_INTREG_DIEPTXF12_ADDR ALT_USB_INTREG_DIEPTXF12_ADDR(ALT_USB1_INTREG_ADDR)
15921 /* The address of the ALT_USB_INTREG_DIEPTXF13 register for the ALT_USB1_INTREG instance. */
15922 #define ALT_USB1_INTREG_DIEPTXF13_ADDR ALT_USB_INTREG_DIEPTXF13_ADDR(ALT_USB1_INTREG_ADDR)
15923 /* The address of the ALT_USB_INTREG_DIEPTXF14 register for the ALT_USB1_INTREG instance. */
15924 #define ALT_USB1_INTREG_DIEPTXF14_ADDR ALT_USB_INTREG_DIEPTXF14_ADDR(ALT_USB1_INTREG_ADDR)
15925 /* The address of the ALT_USB_INTREG_DIEPTXF15 register for the ALT_USB1_INTREG instance. */
15926 #define ALT_USB1_INTREG_DIEPTXF15_ADDR ALT_USB_INTREG_DIEPTXF15_ADDR(ALT_USB1_INTREG_ADDR)
15927 /* The address of the ALT_USB_INTREG_HCFG register for the ALT_USB1_INTREG instance. */
15928 #define ALT_USB1_INTREG_HCFG_ADDR ALT_USB_INTREG_HCFG_ADDR(ALT_USB1_INTREG_ADDR)
15929 /* The address of the ALT_USB_INTREG_HFIR register for the ALT_USB1_INTREG instance. */
15930 #define ALT_USB1_INTREG_HFIR_ADDR ALT_USB_INTREG_HFIR_ADDR(ALT_USB1_INTREG_ADDR)
15931 /* The address of the ALT_USB_INTREG_HFNUM register for the ALT_USB1_INTREG instance. */
15932 #define ALT_USB1_INTREG_HFNUM_ADDR ALT_USB_INTREG_HFNUM_ADDR(ALT_USB1_INTREG_ADDR)
15933 /* The address of the ALT_USB_INTREG_HPTXSTS register for the ALT_USB1_INTREG instance. */
15934 #define ALT_USB1_INTREG_HPTXSTS_ADDR ALT_USB_INTREG_HPTXSTS_ADDR(ALT_USB1_INTREG_ADDR)
15935 /* The address of the ALT_USB_INTREG_HAINT register for the ALT_USB1_INTREG instance. */
15936 #define ALT_USB1_INTREG_HAINT_ADDR ALT_USB_INTREG_HAINT_ADDR(ALT_USB1_INTREG_ADDR)
15937 /* The address of the ALT_USB_INTREG_HAINTMSK register for the ALT_USB1_INTREG instance. */
15938 #define ALT_USB1_INTREG_HAINTMSK_ADDR ALT_USB_INTREG_HAINTMSK_ADDR(ALT_USB1_INTREG_ADDR)
15939 /* The address of the ALT_USB_INTREG_HFLBADDR register for the ALT_USB1_INTREG instance. */
15940 #define ALT_USB1_INTREG_HFLBADDR_ADDR ALT_USB_INTREG_HFLBADDR_ADDR(ALT_USB1_INTREG_ADDR)
15941 /* The address of the ALT_USB_INTREG_HPRT register for the ALT_USB1_INTREG instance. */
15942 #define ALT_USB1_INTREG_HPRT_ADDR ALT_USB_INTREG_HPRT_ADDR(ALT_USB1_INTREG_ADDR)
15943 /* The address of the ALT_USB_INTREG_HCCHAR0 register for the ALT_USB1_INTREG instance. */
15944 #define ALT_USB1_INTREG_HCCHAR0_ADDR ALT_USB_INTREG_HCCHAR0_ADDR(ALT_USB1_INTREG_ADDR)
15945 /* The address of the ALT_USB_INTREG_HCSPLT0 register for the ALT_USB1_INTREG instance. */
15946 #define ALT_USB1_INTREG_HCSPLT0_ADDR ALT_USB_INTREG_HCSPLT0_ADDR(ALT_USB1_INTREG_ADDR)
15947 /* The address of the ALT_USB_INTREG_HCINT0 register for the ALT_USB1_INTREG instance. */
15948 #define ALT_USB1_INTREG_HCINT0_ADDR ALT_USB_INTREG_HCINT0_ADDR(ALT_USB1_INTREG_ADDR)
15949 /* The address of the ALT_USB_INTREG_HCINTMSK0 register for the ALT_USB1_INTREG instance. */
15950 #define ALT_USB1_INTREG_HCINTMSK0_ADDR ALT_USB_INTREG_HCINTMSK0_ADDR(ALT_USB1_INTREG_ADDR)
15951 /* The address of the ALT_USB_INTREG_HCTSIZ0 register for the ALT_USB1_INTREG instance. */
15952 #define ALT_USB1_INTREG_HCTSIZ0_ADDR ALT_USB_INTREG_HCTSIZ0_ADDR(ALT_USB1_INTREG_ADDR)
15953 /* The address of the ALT_USB_INTREG_HCDMA0 register for the ALT_USB1_INTREG instance. */
15954 #define ALT_USB1_INTREG_HCDMA0_ADDR ALT_USB_INTREG_HCDMA0_ADDR(ALT_USB1_INTREG_ADDR)
15955 /* The address of the ALT_USB_INTREG_HCDMAB0 register for the ALT_USB1_INTREG instance. */
15956 #define ALT_USB1_INTREG_HCDMAB0_ADDR ALT_USB_INTREG_HCDMAB0_ADDR(ALT_USB1_INTREG_ADDR)
15957 /* The address of the ALT_USB_INTREG_HCCHAR1 register for the ALT_USB1_INTREG instance. */
15958 #define ALT_USB1_INTREG_HCCHAR1_ADDR ALT_USB_INTREG_HCCHAR1_ADDR(ALT_USB1_INTREG_ADDR)
15959 /* The address of the ALT_USB_INTREG_HCSPLT1 register for the ALT_USB1_INTREG instance. */
15960 #define ALT_USB1_INTREG_HCSPLT1_ADDR ALT_USB_INTREG_HCSPLT1_ADDR(ALT_USB1_INTREG_ADDR)
15961 /* The address of the ALT_USB_INTREG_HCINT1 register for the ALT_USB1_INTREG instance. */
15962 #define ALT_USB1_INTREG_HCINT1_ADDR ALT_USB_INTREG_HCINT1_ADDR(ALT_USB1_INTREG_ADDR)
15963 /* The address of the ALT_USB_INTREG_HCINTMSK1 register for the ALT_USB1_INTREG instance. */
15964 #define ALT_USB1_INTREG_HCINTMSK1_ADDR ALT_USB_INTREG_HCINTMSK1_ADDR(ALT_USB1_INTREG_ADDR)
15965 /* The address of the ALT_USB_INTREG_HCTSIZ1 register for the ALT_USB1_INTREG instance. */
15966 #define ALT_USB1_INTREG_HCTSIZ1_ADDR ALT_USB_INTREG_HCTSIZ1_ADDR(ALT_USB1_INTREG_ADDR)
15967 /* The address of the ALT_USB_INTREG_HCDMA1 register for the ALT_USB1_INTREG instance. */
15968 #define ALT_USB1_INTREG_HCDMA1_ADDR ALT_USB_INTREG_HCDMA1_ADDR(ALT_USB1_INTREG_ADDR)
15969 /* The address of the ALT_USB_INTREG_HCDMAB1 register for the ALT_USB1_INTREG instance. */
15970 #define ALT_USB1_INTREG_HCDMAB1_ADDR ALT_USB_INTREG_HCDMAB1_ADDR(ALT_USB1_INTREG_ADDR)
15971 /* The address of the ALT_USB_INTREG_HCCHAR2 register for the ALT_USB1_INTREG instance. */
15972 #define ALT_USB1_INTREG_HCCHAR2_ADDR ALT_USB_INTREG_HCCHAR2_ADDR(ALT_USB1_INTREG_ADDR)
15973 /* The address of the ALT_USB_INTREG_HCSPLT2 register for the ALT_USB1_INTREG instance. */
15974 #define ALT_USB1_INTREG_HCSPLT2_ADDR ALT_USB_INTREG_HCSPLT2_ADDR(ALT_USB1_INTREG_ADDR)
15975 /* The address of the ALT_USB_INTREG_HCINT2 register for the ALT_USB1_INTREG instance. */
15976 #define ALT_USB1_INTREG_HCINT2_ADDR ALT_USB_INTREG_HCINT2_ADDR(ALT_USB1_INTREG_ADDR)
15977 /* The address of the ALT_USB_INTREG_HCINTMSK2 register for the ALT_USB1_INTREG instance. */
15978 #define ALT_USB1_INTREG_HCINTMSK2_ADDR ALT_USB_INTREG_HCINTMSK2_ADDR(ALT_USB1_INTREG_ADDR)
15979 /* The address of the ALT_USB_INTREG_HCTSIZ2 register for the ALT_USB1_INTREG instance. */
15980 #define ALT_USB1_INTREG_HCTSIZ2_ADDR ALT_USB_INTREG_HCTSIZ2_ADDR(ALT_USB1_INTREG_ADDR)
15981 /* The address of the ALT_USB_INTREG_HCDMA2 register for the ALT_USB1_INTREG instance. */
15982 #define ALT_USB1_INTREG_HCDMA2_ADDR ALT_USB_INTREG_HCDMA2_ADDR(ALT_USB1_INTREG_ADDR)
15983 /* The address of the ALT_USB_INTREG_HCDMAB2 register for the ALT_USB1_INTREG instance. */
15984 #define ALT_USB1_INTREG_HCDMAB2_ADDR ALT_USB_INTREG_HCDMAB2_ADDR(ALT_USB1_INTREG_ADDR)
15985 /* The address of the ALT_USB_INTREG_HCCHAR3 register for the ALT_USB1_INTREG instance. */
15986 #define ALT_USB1_INTREG_HCCHAR3_ADDR ALT_USB_INTREG_HCCHAR3_ADDR(ALT_USB1_INTREG_ADDR)
15987 /* The address of the ALT_USB_INTREG_HCSPLT3 register for the ALT_USB1_INTREG instance. */
15988 #define ALT_USB1_INTREG_HCSPLT3_ADDR ALT_USB_INTREG_HCSPLT3_ADDR(ALT_USB1_INTREG_ADDR)
15989 /* The address of the ALT_USB_INTREG_HCINT3 register for the ALT_USB1_INTREG instance. */
15990 #define ALT_USB1_INTREG_HCINT3_ADDR ALT_USB_INTREG_HCINT3_ADDR(ALT_USB1_INTREG_ADDR)
15991 /* The address of the ALT_USB_INTREG_HCINTMSK3 register for the ALT_USB1_INTREG instance. */
15992 #define ALT_USB1_INTREG_HCINTMSK3_ADDR ALT_USB_INTREG_HCINTMSK3_ADDR(ALT_USB1_INTREG_ADDR)
15993 /* The address of the ALT_USB_INTREG_HCTSIZ3 register for the ALT_USB1_INTREG instance. */
15994 #define ALT_USB1_INTREG_HCTSIZ3_ADDR ALT_USB_INTREG_HCTSIZ3_ADDR(ALT_USB1_INTREG_ADDR)
15995 /* The address of the ALT_USB_INTREG_HCDMA3 register for the ALT_USB1_INTREG instance. */
15996 #define ALT_USB1_INTREG_HCDMA3_ADDR ALT_USB_INTREG_HCDMA3_ADDR(ALT_USB1_INTREG_ADDR)
15997 /* The address of the ALT_USB_INTREG_HCDMAB3 register for the ALT_USB1_INTREG instance. */
15998 #define ALT_USB1_INTREG_HCDMAB3_ADDR ALT_USB_INTREG_HCDMAB3_ADDR(ALT_USB1_INTREG_ADDR)
15999 /* The address of the ALT_USB_INTREG_HCCHAR4 register for the ALT_USB1_INTREG instance. */
16000 #define ALT_USB1_INTREG_HCCHAR4_ADDR ALT_USB_INTREG_HCCHAR4_ADDR(ALT_USB1_INTREG_ADDR)
16001 /* The address of the ALT_USB_INTREG_HCSPLT4 register for the ALT_USB1_INTREG instance. */
16002 #define ALT_USB1_INTREG_HCSPLT4_ADDR ALT_USB_INTREG_HCSPLT4_ADDR(ALT_USB1_INTREG_ADDR)
16003 /* The address of the ALT_USB_INTREG_HCINT4 register for the ALT_USB1_INTREG instance. */
16004 #define ALT_USB1_INTREG_HCINT4_ADDR ALT_USB_INTREG_HCINT4_ADDR(ALT_USB1_INTREG_ADDR)
16005 /* The address of the ALT_USB_INTREG_HCINTMSK4 register for the ALT_USB1_INTREG instance. */
16006 #define ALT_USB1_INTREG_HCINTMSK4_ADDR ALT_USB_INTREG_HCINTMSK4_ADDR(ALT_USB1_INTREG_ADDR)
16007 /* The address of the ALT_USB_INTREG_HCTSIZ4 register for the ALT_USB1_INTREG instance. */
16008 #define ALT_USB1_INTREG_HCTSIZ4_ADDR ALT_USB_INTREG_HCTSIZ4_ADDR(ALT_USB1_INTREG_ADDR)
16009 /* The address of the ALT_USB_INTREG_HCDMA4 register for the ALT_USB1_INTREG instance. */
16010 #define ALT_USB1_INTREG_HCDMA4_ADDR ALT_USB_INTREG_HCDMA4_ADDR(ALT_USB1_INTREG_ADDR)
16011 /* The address of the ALT_USB_INTREG_HCDMAB4 register for the ALT_USB1_INTREG instance. */
16012 #define ALT_USB1_INTREG_HCDMAB4_ADDR ALT_USB_INTREG_HCDMAB4_ADDR(ALT_USB1_INTREG_ADDR)
16013 /* The address of the ALT_USB_INTREG_HCCHAR5 register for the ALT_USB1_INTREG instance. */
16014 #define ALT_USB1_INTREG_HCCHAR5_ADDR ALT_USB_INTREG_HCCHAR5_ADDR(ALT_USB1_INTREG_ADDR)
16015 /* The address of the ALT_USB_INTREG_HCSPLT5 register for the ALT_USB1_INTREG instance. */
16016 #define ALT_USB1_INTREG_HCSPLT5_ADDR ALT_USB_INTREG_HCSPLT5_ADDR(ALT_USB1_INTREG_ADDR)
16017 /* The address of the ALT_USB_INTREG_HCINT5 register for the ALT_USB1_INTREG instance. */
16018 #define ALT_USB1_INTREG_HCINT5_ADDR ALT_USB_INTREG_HCINT5_ADDR(ALT_USB1_INTREG_ADDR)
16019 /* The address of the ALT_USB_INTREG_HCINTMSK5 register for the ALT_USB1_INTREG instance. */
16020 #define ALT_USB1_INTREG_HCINTMSK5_ADDR ALT_USB_INTREG_HCINTMSK5_ADDR(ALT_USB1_INTREG_ADDR)
16021 /* The address of the ALT_USB_INTREG_HCTSIZ5 register for the ALT_USB1_INTREG instance. */
16022 #define ALT_USB1_INTREG_HCTSIZ5_ADDR ALT_USB_INTREG_HCTSIZ5_ADDR(ALT_USB1_INTREG_ADDR)
16023 /* The address of the ALT_USB_INTREG_HCDMA5 register for the ALT_USB1_INTREG instance. */
16024 #define ALT_USB1_INTREG_HCDMA5_ADDR ALT_USB_INTREG_HCDMA5_ADDR(ALT_USB1_INTREG_ADDR)
16025 /* The address of the ALT_USB_INTREG_HCDMAB5 register for the ALT_USB1_INTREG instance. */
16026 #define ALT_USB1_INTREG_HCDMAB5_ADDR ALT_USB_INTREG_HCDMAB5_ADDR(ALT_USB1_INTREG_ADDR)
16027 /* The address of the ALT_USB_INTREG_HCCHAR6 register for the ALT_USB1_INTREG instance. */
16028 #define ALT_USB1_INTREG_HCCHAR6_ADDR ALT_USB_INTREG_HCCHAR6_ADDR(ALT_USB1_INTREG_ADDR)
16029 /* The address of the ALT_USB_INTREG_HCSPLT6 register for the ALT_USB1_INTREG instance. */
16030 #define ALT_USB1_INTREG_HCSPLT6_ADDR ALT_USB_INTREG_HCSPLT6_ADDR(ALT_USB1_INTREG_ADDR)
16031 /* The address of the ALT_USB_INTREG_HCINT6 register for the ALT_USB1_INTREG instance. */
16032 #define ALT_USB1_INTREG_HCINT6_ADDR ALT_USB_INTREG_HCINT6_ADDR(ALT_USB1_INTREG_ADDR)
16033 /* The address of the ALT_USB_INTREG_HCINTMSK6 register for the ALT_USB1_INTREG instance. */
16034 #define ALT_USB1_INTREG_HCINTMSK6_ADDR ALT_USB_INTREG_HCINTMSK6_ADDR(ALT_USB1_INTREG_ADDR)
16035 /* The address of the ALT_USB_INTREG_HCTSIZ6 register for the ALT_USB1_INTREG instance. */
16036 #define ALT_USB1_INTREG_HCTSIZ6_ADDR ALT_USB_INTREG_HCTSIZ6_ADDR(ALT_USB1_INTREG_ADDR)
16037 /* The address of the ALT_USB_INTREG_HCDMA6 register for the ALT_USB1_INTREG instance. */
16038 #define ALT_USB1_INTREG_HCDMA6_ADDR ALT_USB_INTREG_HCDMA6_ADDR(ALT_USB1_INTREG_ADDR)
16039 /* The address of the ALT_USB_INTREG_HCDMAB6 register for the ALT_USB1_INTREG instance. */
16040 #define ALT_USB1_INTREG_HCDMAB6_ADDR ALT_USB_INTREG_HCDMAB6_ADDR(ALT_USB1_INTREG_ADDR)
16041 /* The address of the ALT_USB_INTREG_HCCHAR7 register for the ALT_USB1_INTREG instance. */
16042 #define ALT_USB1_INTREG_HCCHAR7_ADDR ALT_USB_INTREG_HCCHAR7_ADDR(ALT_USB1_INTREG_ADDR)
16043 /* The address of the ALT_USB_INTREG_HCSPLT7 register for the ALT_USB1_INTREG instance. */
16044 #define ALT_USB1_INTREG_HCSPLT7_ADDR ALT_USB_INTREG_HCSPLT7_ADDR(ALT_USB1_INTREG_ADDR)
16045 /* The address of the ALT_USB_INTREG_HCINT7 register for the ALT_USB1_INTREG instance. */
16046 #define ALT_USB1_INTREG_HCINT7_ADDR ALT_USB_INTREG_HCINT7_ADDR(ALT_USB1_INTREG_ADDR)
16047 /* The address of the ALT_USB_INTREG_HCINTMSK7 register for the ALT_USB1_INTREG instance. */
16048 #define ALT_USB1_INTREG_HCINTMSK7_ADDR ALT_USB_INTREG_HCINTMSK7_ADDR(ALT_USB1_INTREG_ADDR)
16049 /* The address of the ALT_USB_INTREG_HCTSIZ7 register for the ALT_USB1_INTREG instance. */
16050 #define ALT_USB1_INTREG_HCTSIZ7_ADDR ALT_USB_INTREG_HCTSIZ7_ADDR(ALT_USB1_INTREG_ADDR)
16051 /* The address of the ALT_USB_INTREG_HCDMA7 register for the ALT_USB1_INTREG instance. */
16052 #define ALT_USB1_INTREG_HCDMA7_ADDR ALT_USB_INTREG_HCDMA7_ADDR(ALT_USB1_INTREG_ADDR)
16053 /* The address of the ALT_USB_INTREG_HCDMAB7 register for the ALT_USB1_INTREG instance. */
16054 #define ALT_USB1_INTREG_HCDMAB7_ADDR ALT_USB_INTREG_HCDMAB7_ADDR(ALT_USB1_INTREG_ADDR)
16055 /* The address of the ALT_USB_INTREG_HCCHAR8 register for the ALT_USB1_INTREG instance. */
16056 #define ALT_USB1_INTREG_HCCHAR8_ADDR ALT_USB_INTREG_HCCHAR8_ADDR(ALT_USB1_INTREG_ADDR)
16057 /* The address of the ALT_USB_INTREG_HCSPLT8 register for the ALT_USB1_INTREG instance. */
16058 #define ALT_USB1_INTREG_HCSPLT8_ADDR ALT_USB_INTREG_HCSPLT8_ADDR(ALT_USB1_INTREG_ADDR)
16059 /* The address of the ALT_USB_INTREG_HCINT8 register for the ALT_USB1_INTREG instance. */
16060 #define ALT_USB1_INTREG_HCINT8_ADDR ALT_USB_INTREG_HCINT8_ADDR(ALT_USB1_INTREG_ADDR)
16061 /* The address of the ALT_USB_INTREG_HCINTMSK8 register for the ALT_USB1_INTREG instance. */
16062 #define ALT_USB1_INTREG_HCINTMSK8_ADDR ALT_USB_INTREG_HCINTMSK8_ADDR(ALT_USB1_INTREG_ADDR)
16063 /* The address of the ALT_USB_INTREG_HCTSIZ8 register for the ALT_USB1_INTREG instance. */
16064 #define ALT_USB1_INTREG_HCTSIZ8_ADDR ALT_USB_INTREG_HCTSIZ8_ADDR(ALT_USB1_INTREG_ADDR)
16065 /* The address of the ALT_USB_INTREG_HCDMA8 register for the ALT_USB1_INTREG instance. */
16066 #define ALT_USB1_INTREG_HCDMA8_ADDR ALT_USB_INTREG_HCDMA8_ADDR(ALT_USB1_INTREG_ADDR)
16067 /* The address of the ALT_USB_INTREG_HCDMAB8 register for the ALT_USB1_INTREG instance. */
16068 #define ALT_USB1_INTREG_HCDMAB8_ADDR ALT_USB_INTREG_HCDMAB8_ADDR(ALT_USB1_INTREG_ADDR)
16069 /* The address of the ALT_USB_INTREG_HCCHAR9 register for the ALT_USB1_INTREG instance. */
16070 #define ALT_USB1_INTREG_HCCHAR9_ADDR ALT_USB_INTREG_HCCHAR9_ADDR(ALT_USB1_INTREG_ADDR)
16071 /* The address of the ALT_USB_INTREG_HCSPLT9 register for the ALT_USB1_INTREG instance. */
16072 #define ALT_USB1_INTREG_HCSPLT9_ADDR ALT_USB_INTREG_HCSPLT9_ADDR(ALT_USB1_INTREG_ADDR)
16073 /* The address of the ALT_USB_INTREG_HCINT9 register for the ALT_USB1_INTREG instance. */
16074 #define ALT_USB1_INTREG_HCINT9_ADDR ALT_USB_INTREG_HCINT9_ADDR(ALT_USB1_INTREG_ADDR)
16075 /* The address of the ALT_USB_INTREG_HCINTMSK9 register for the ALT_USB1_INTREG instance. */
16076 #define ALT_USB1_INTREG_HCINTMSK9_ADDR ALT_USB_INTREG_HCINTMSK9_ADDR(ALT_USB1_INTREG_ADDR)
16077 /* The address of the ALT_USB_INTREG_HCTSIZ9 register for the ALT_USB1_INTREG instance. */
16078 #define ALT_USB1_INTREG_HCTSIZ9_ADDR ALT_USB_INTREG_HCTSIZ9_ADDR(ALT_USB1_INTREG_ADDR)
16079 /* The address of the ALT_USB_INTREG_HCDMA9 register for the ALT_USB1_INTREG instance. */
16080 #define ALT_USB1_INTREG_HCDMA9_ADDR ALT_USB_INTREG_HCDMA9_ADDR(ALT_USB1_INTREG_ADDR)
16081 /* The address of the ALT_USB_INTREG_HCDMAB9 register for the ALT_USB1_INTREG instance. */
16082 #define ALT_USB1_INTREG_HCDMAB9_ADDR ALT_USB_INTREG_HCDMAB9_ADDR(ALT_USB1_INTREG_ADDR)
16083 /* The address of the ALT_USB_INTREG_HCCHAR10 register for the ALT_USB1_INTREG instance. */
16084 #define ALT_USB1_INTREG_HCCHAR10_ADDR ALT_USB_INTREG_HCCHAR10_ADDR(ALT_USB1_INTREG_ADDR)
16085 /* The address of the ALT_USB_INTREG_HCSPLT10 register for the ALT_USB1_INTREG instance. */
16086 #define ALT_USB1_INTREG_HCSPLT10_ADDR ALT_USB_INTREG_HCSPLT10_ADDR(ALT_USB1_INTREG_ADDR)
16087 /* The address of the ALT_USB_INTREG_HCINT10 register for the ALT_USB1_INTREG instance. */
16088 #define ALT_USB1_INTREG_HCINT10_ADDR ALT_USB_INTREG_HCINT10_ADDR(ALT_USB1_INTREG_ADDR)
16089 /* The address of the ALT_USB_INTREG_HCINTMSK10 register for the ALT_USB1_INTREG instance. */
16090 #define ALT_USB1_INTREG_HCINTMSK10_ADDR ALT_USB_INTREG_HCINTMSK10_ADDR(ALT_USB1_INTREG_ADDR)
16091 /* The address of the ALT_USB_INTREG_HCTSIZ10 register for the ALT_USB1_INTREG instance. */
16092 #define ALT_USB1_INTREG_HCTSIZ10_ADDR ALT_USB_INTREG_HCTSIZ10_ADDR(ALT_USB1_INTREG_ADDR)
16093 /* The address of the ALT_USB_INTREG_HCDMA10 register for the ALT_USB1_INTREG instance. */
16094 #define ALT_USB1_INTREG_HCDMA10_ADDR ALT_USB_INTREG_HCDMA10_ADDR(ALT_USB1_INTREG_ADDR)
16095 /* The address of the ALT_USB_INTREG_HCDMAB10 register for the ALT_USB1_INTREG instance. */
16096 #define ALT_USB1_INTREG_HCDMAB10_ADDR ALT_USB_INTREG_HCDMAB10_ADDR(ALT_USB1_INTREG_ADDR)
16097 /* The address of the ALT_USB_INTREG_HCCHAR11 register for the ALT_USB1_INTREG instance. */
16098 #define ALT_USB1_INTREG_HCCHAR11_ADDR ALT_USB_INTREG_HCCHAR11_ADDR(ALT_USB1_INTREG_ADDR)
16099 /* The address of the ALT_USB_INTREG_HCSPLT11 register for the ALT_USB1_INTREG instance. */
16100 #define ALT_USB1_INTREG_HCSPLT11_ADDR ALT_USB_INTREG_HCSPLT11_ADDR(ALT_USB1_INTREG_ADDR)
16101 /* The address of the ALT_USB_INTREG_HCINT11 register for the ALT_USB1_INTREG instance. */
16102 #define ALT_USB1_INTREG_HCINT11_ADDR ALT_USB_INTREG_HCINT11_ADDR(ALT_USB1_INTREG_ADDR)
16103 /* The address of the ALT_USB_INTREG_HCINTMSK11 register for the ALT_USB1_INTREG instance. */
16104 #define ALT_USB1_INTREG_HCINTMSK11_ADDR ALT_USB_INTREG_HCINTMSK11_ADDR(ALT_USB1_INTREG_ADDR)
16105 /* The address of the ALT_USB_INTREG_HCTSIZ11 register for the ALT_USB1_INTREG instance. */
16106 #define ALT_USB1_INTREG_HCTSIZ11_ADDR ALT_USB_INTREG_HCTSIZ11_ADDR(ALT_USB1_INTREG_ADDR)
16107 /* The address of the ALT_USB_INTREG_HCDMA11 register for the ALT_USB1_INTREG instance. */
16108 #define ALT_USB1_INTREG_HCDMA11_ADDR ALT_USB_INTREG_HCDMA11_ADDR(ALT_USB1_INTREG_ADDR)
16109 /* The address of the ALT_USB_INTREG_HCDMAB11 register for the ALT_USB1_INTREG instance. */
16110 #define ALT_USB1_INTREG_HCDMAB11_ADDR ALT_USB_INTREG_HCDMAB11_ADDR(ALT_USB1_INTREG_ADDR)
16111 /* The address of the ALT_USB_INTREG_HCCHAR12 register for the ALT_USB1_INTREG instance. */
16112 #define ALT_USB1_INTREG_HCCHAR12_ADDR ALT_USB_INTREG_HCCHAR12_ADDR(ALT_USB1_INTREG_ADDR)
16113 /* The address of the ALT_USB_INTREG_HCSPLT12 register for the ALT_USB1_INTREG instance. */
16114 #define ALT_USB1_INTREG_HCSPLT12_ADDR ALT_USB_INTREG_HCSPLT12_ADDR(ALT_USB1_INTREG_ADDR)
16115 /* The address of the ALT_USB_INTREG_HCINT12 register for the ALT_USB1_INTREG instance. */
16116 #define ALT_USB1_INTREG_HCINT12_ADDR ALT_USB_INTREG_HCINT12_ADDR(ALT_USB1_INTREG_ADDR)
16117 /* The address of the ALT_USB_INTREG_HCINTMSK12 register for the ALT_USB1_INTREG instance. */
16118 #define ALT_USB1_INTREG_HCINTMSK12_ADDR ALT_USB_INTREG_HCINTMSK12_ADDR(ALT_USB1_INTREG_ADDR)
16119 /* The address of the ALT_USB_INTREG_HCTSIZ12 register for the ALT_USB1_INTREG instance. */
16120 #define ALT_USB1_INTREG_HCTSIZ12_ADDR ALT_USB_INTREG_HCTSIZ12_ADDR(ALT_USB1_INTREG_ADDR)
16121 /* The address of the ALT_USB_INTREG_HCDMA12 register for the ALT_USB1_INTREG instance. */
16122 #define ALT_USB1_INTREG_HCDMA12_ADDR ALT_USB_INTREG_HCDMA12_ADDR(ALT_USB1_INTREG_ADDR)
16123 /* The address of the ALT_USB_INTREG_HCDMAB12 register for the ALT_USB1_INTREG instance. */
16124 #define ALT_USB1_INTREG_HCDMAB12_ADDR ALT_USB_INTREG_HCDMAB12_ADDR(ALT_USB1_INTREG_ADDR)
16125 /* The address of the ALT_USB_INTREG_HCCHAR13 register for the ALT_USB1_INTREG instance. */
16126 #define ALT_USB1_INTREG_HCCHAR13_ADDR ALT_USB_INTREG_HCCHAR13_ADDR(ALT_USB1_INTREG_ADDR)
16127 /* The address of the ALT_USB_INTREG_HCSPLT13 register for the ALT_USB1_INTREG instance. */
16128 #define ALT_USB1_INTREG_HCSPLT13_ADDR ALT_USB_INTREG_HCSPLT13_ADDR(ALT_USB1_INTREG_ADDR)
16129 /* The address of the ALT_USB_INTREG_HCINT13 register for the ALT_USB1_INTREG instance. */
16130 #define ALT_USB1_INTREG_HCINT13_ADDR ALT_USB_INTREG_HCINT13_ADDR(ALT_USB1_INTREG_ADDR)
16131 /* The address of the ALT_USB_INTREG_HCINTMSK13 register for the ALT_USB1_INTREG instance. */
16132 #define ALT_USB1_INTREG_HCINTMSK13_ADDR ALT_USB_INTREG_HCINTMSK13_ADDR(ALT_USB1_INTREG_ADDR)
16133 /* The address of the ALT_USB_INTREG_HCTSIZ13 register for the ALT_USB1_INTREG instance. */
16134 #define ALT_USB1_INTREG_HCTSIZ13_ADDR ALT_USB_INTREG_HCTSIZ13_ADDR(ALT_USB1_INTREG_ADDR)
16135 /* The address of the ALT_USB_INTREG_HCDMA13 register for the ALT_USB1_INTREG instance. */
16136 #define ALT_USB1_INTREG_HCDMA13_ADDR ALT_USB_INTREG_HCDMA13_ADDR(ALT_USB1_INTREG_ADDR)
16137 /* The address of the ALT_USB_INTREG_HCDMAB13 register for the ALT_USB1_INTREG instance. */
16138 #define ALT_USB1_INTREG_HCDMAB13_ADDR ALT_USB_INTREG_HCDMAB13_ADDR(ALT_USB1_INTREG_ADDR)
16139 /* The address of the ALT_USB_INTREG_HCCHAR14 register for the ALT_USB1_INTREG instance. */
16140 #define ALT_USB1_INTREG_HCCHAR14_ADDR ALT_USB_INTREG_HCCHAR14_ADDR(ALT_USB1_INTREG_ADDR)
16141 /* The address of the ALT_USB_INTREG_HCSPLT14 register for the ALT_USB1_INTREG instance. */
16142 #define ALT_USB1_INTREG_HCSPLT14_ADDR ALT_USB_INTREG_HCSPLT14_ADDR(ALT_USB1_INTREG_ADDR)
16143 /* The address of the ALT_USB_INTREG_HCINT14 register for the ALT_USB1_INTREG instance. */
16144 #define ALT_USB1_INTREG_HCINT14_ADDR ALT_USB_INTREG_HCINT14_ADDR(ALT_USB1_INTREG_ADDR)
16145 /* The address of the ALT_USB_INTREG_HCINTMSK14 register for the ALT_USB1_INTREG instance. */
16146 #define ALT_USB1_INTREG_HCINTMSK14_ADDR ALT_USB_INTREG_HCINTMSK14_ADDR(ALT_USB1_INTREG_ADDR)
16147 /* The address of the ALT_USB_INTREG_HCTSIZ14 register for the ALT_USB1_INTREG instance. */
16148 #define ALT_USB1_INTREG_HCTSIZ14_ADDR ALT_USB_INTREG_HCTSIZ14_ADDR(ALT_USB1_INTREG_ADDR)
16149 /* The address of the ALT_USB_INTREG_HCDMA14 register for the ALT_USB1_INTREG instance. */
16150 #define ALT_USB1_INTREG_HCDMA14_ADDR ALT_USB_INTREG_HCDMA14_ADDR(ALT_USB1_INTREG_ADDR)
16151 /* The address of the ALT_USB_INTREG_HCDMAB14 register for the ALT_USB1_INTREG instance. */
16152 #define ALT_USB1_INTREG_HCDMAB14_ADDR ALT_USB_INTREG_HCDMAB14_ADDR(ALT_USB1_INTREG_ADDR)
16153 /* The address of the ALT_USB_INTREG_HCCHAR15 register for the ALT_USB1_INTREG instance. */
16154 #define ALT_USB1_INTREG_HCCHAR15_ADDR ALT_USB_INTREG_HCCHAR15_ADDR(ALT_USB1_INTREG_ADDR)
16155 /* The address of the ALT_USB_INTREG_HCSPLT15 register for the ALT_USB1_INTREG instance. */
16156 #define ALT_USB1_INTREG_HCSPLT15_ADDR ALT_USB_INTREG_HCSPLT15_ADDR(ALT_USB1_INTREG_ADDR)
16157 /* The address of the ALT_USB_INTREG_HCINT15 register for the ALT_USB1_INTREG instance. */
16158 #define ALT_USB1_INTREG_HCINT15_ADDR ALT_USB_INTREG_HCINT15_ADDR(ALT_USB1_INTREG_ADDR)
16159 /* The address of the ALT_USB_INTREG_HCINTMSK15 register for the ALT_USB1_INTREG instance. */
16160 #define ALT_USB1_INTREG_HCINTMSK15_ADDR ALT_USB_INTREG_HCINTMSK15_ADDR(ALT_USB1_INTREG_ADDR)
16161 /* The address of the ALT_USB_INTREG_HCTSIZ15 register for the ALT_USB1_INTREG instance. */
16162 #define ALT_USB1_INTREG_HCTSIZ15_ADDR ALT_USB_INTREG_HCTSIZ15_ADDR(ALT_USB1_INTREG_ADDR)
16163 /* The address of the ALT_USB_INTREG_HCDMA15 register for the ALT_USB1_INTREG instance. */
16164 #define ALT_USB1_INTREG_HCDMA15_ADDR ALT_USB_INTREG_HCDMA15_ADDR(ALT_USB1_INTREG_ADDR)
16165 /* The address of the ALT_USB_INTREG_HCDMAB15 register for the ALT_USB1_INTREG instance. */
16166 #define ALT_USB1_INTREG_HCDMAB15_ADDR ALT_USB_INTREG_HCDMAB15_ADDR(ALT_USB1_INTREG_ADDR)
16167 /* The address of the ALT_USB_INTREG_DCFG register for the ALT_USB1_INTREG instance. */
16168 #define ALT_USB1_INTREG_DCFG_ADDR ALT_USB_INTREG_DCFG_ADDR(ALT_USB1_INTREG_ADDR)
16169 /* The address of the ALT_USB_INTREG_DCTL register for the ALT_USB1_INTREG instance. */
16170 #define ALT_USB1_INTREG_DCTL_ADDR ALT_USB_INTREG_DCTL_ADDR(ALT_USB1_INTREG_ADDR)
16171 /* The address of the ALT_USB_INTREG_DSTS register for the ALT_USB1_INTREG instance. */
16172 #define ALT_USB1_INTREG_DSTS_ADDR ALT_USB_INTREG_DSTS_ADDR(ALT_USB1_INTREG_ADDR)
16173 /* The address of the ALT_USB_INTREG_DIEPMSK register for the ALT_USB1_INTREG instance. */
16174 #define ALT_USB1_INTREG_DIEPMSK_ADDR ALT_USB_INTREG_DIEPMSK_ADDR(ALT_USB1_INTREG_ADDR)
16175 /* The address of the ALT_USB_INTREG_DOEPMSK register for the ALT_USB1_INTREG instance. */
16176 #define ALT_USB1_INTREG_DOEPMSK_ADDR ALT_USB_INTREG_DOEPMSK_ADDR(ALT_USB1_INTREG_ADDR)
16177 /* The address of the ALT_USB_INTREG_DAINT register for the ALT_USB1_INTREG instance. */
16178 #define ALT_USB1_INTREG_DAINT_ADDR ALT_USB_INTREG_DAINT_ADDR(ALT_USB1_INTREG_ADDR)
16179 /* The address of the ALT_USB_INTREG_DAINTMSK register for the ALT_USB1_INTREG instance. */
16180 #define ALT_USB1_INTREG_DAINTMSK_ADDR ALT_USB_INTREG_DAINTMSK_ADDR(ALT_USB1_INTREG_ADDR)
16181 /* The address of the ALT_USB_INTREG_DVBUSDIS register for the ALT_USB1_INTREG instance. */
16182 #define ALT_USB1_INTREG_DVBUSDIS_ADDR ALT_USB_INTREG_DVBUSDIS_ADDR(ALT_USB1_INTREG_ADDR)
16183 /* The address of the ALT_USB_INTREG_DVBUSPULSE register for the ALT_USB1_INTREG instance. */
16184 #define ALT_USB1_INTREG_DVBUSPULSE_ADDR ALT_USB_INTREG_DVBUSPULSE_ADDR(ALT_USB1_INTREG_ADDR)
16185 /* The address of the ALT_USB_INTREG_DTHRCTL register for the ALT_USB1_INTREG instance. */
16186 #define ALT_USB1_INTREG_DTHRCTL_ADDR ALT_USB_INTREG_DTHRCTL_ADDR(ALT_USB1_INTREG_ADDR)
16187 /* The address of the ALT_USB_INTREG_DIEPEMPMSK register for the ALT_USB1_INTREG instance. */
16188 #define ALT_USB1_INTREG_DIEPEMPMSK_ADDR ALT_USB_INTREG_DIEPEMPMSK_ADDR(ALT_USB1_INTREG_ADDR)
16189 /* The address of the ALT_USB_INTREG_DIEPCTL0 register for the ALT_USB1_INTREG instance. */
16190 #define ALT_USB1_INTREG_DIEPCTL0_ADDR ALT_USB_INTREG_DIEPCTL0_ADDR(ALT_USB1_INTREG_ADDR)
16191 /* The address of the ALT_USB_INTREG_DIEPINT0 register for the ALT_USB1_INTREG instance. */
16192 #define ALT_USB1_INTREG_DIEPINT0_ADDR ALT_USB_INTREG_DIEPINT0_ADDR(ALT_USB1_INTREG_ADDR)
16193 /* The address of the ALT_USB_INTREG_DIEPTSIZ0 register for the ALT_USB1_INTREG instance. */
16194 #define ALT_USB1_INTREG_DIEPTSIZ0_ADDR ALT_USB_INTREG_DIEPTSIZ0_ADDR(ALT_USB1_INTREG_ADDR)
16195 /* The address of the ALT_USB_INTREG_DIEPDMA0 register for the ALT_USB1_INTREG instance. */
16196 #define ALT_USB1_INTREG_DIEPDMA0_ADDR ALT_USB_INTREG_DIEPDMA0_ADDR(ALT_USB1_INTREG_ADDR)
16197 /* The address of the ALT_USB_INTREG_DTXFSTS0 register for the ALT_USB1_INTREG instance. */
16198 #define ALT_USB1_INTREG_DTXFSTS0_ADDR ALT_USB_INTREG_DTXFSTS0_ADDR(ALT_USB1_INTREG_ADDR)
16199 /* The address of the ALT_USB_INTREG_DIEPDMAB0 register for the ALT_USB1_INTREG instance. */
16200 #define ALT_USB1_INTREG_DIEPDMAB0_ADDR ALT_USB_INTREG_DIEPDMAB0_ADDR(ALT_USB1_INTREG_ADDR)
16201 /* The address of the ALT_USB_INTREG_DIEPCTL1 register for the ALT_USB1_INTREG instance. */
16202 #define ALT_USB1_INTREG_DIEPCTL1_ADDR ALT_USB_INTREG_DIEPCTL1_ADDR(ALT_USB1_INTREG_ADDR)
16203 /* The address of the ALT_USB_INTREG_DIEPINT1 register for the ALT_USB1_INTREG instance. */
16204 #define ALT_USB1_INTREG_DIEPINT1_ADDR ALT_USB_INTREG_DIEPINT1_ADDR(ALT_USB1_INTREG_ADDR)
16205 /* The address of the ALT_USB_INTREG_DIEPTSIZ1 register for the ALT_USB1_INTREG instance. */
16206 #define ALT_USB1_INTREG_DIEPTSIZ1_ADDR ALT_USB_INTREG_DIEPTSIZ1_ADDR(ALT_USB1_INTREG_ADDR)
16207 /* The address of the ALT_USB_INTREG_DIEPDMA1 register for the ALT_USB1_INTREG instance. */
16208 #define ALT_USB1_INTREG_DIEPDMA1_ADDR ALT_USB_INTREG_DIEPDMA1_ADDR(ALT_USB1_INTREG_ADDR)
16209 /* The address of the ALT_USB_INTREG_DTXFSTS1 register for the ALT_USB1_INTREG instance. */
16210 #define ALT_USB1_INTREG_DTXFSTS1_ADDR ALT_USB_INTREG_DTXFSTS1_ADDR(ALT_USB1_INTREG_ADDR)
16211 /* The address of the ALT_USB_INTREG_DIEPDMAB1 register for the ALT_USB1_INTREG instance. */
16212 #define ALT_USB1_INTREG_DIEPDMAB1_ADDR ALT_USB_INTREG_DIEPDMAB1_ADDR(ALT_USB1_INTREG_ADDR)
16213 /* The address of the ALT_USB_INTREG_DIEPCTL2 register for the ALT_USB1_INTREG instance. */
16214 #define ALT_USB1_INTREG_DIEPCTL2_ADDR ALT_USB_INTREG_DIEPCTL2_ADDR(ALT_USB1_INTREG_ADDR)
16215 /* The address of the ALT_USB_INTREG_DIEPINT2 register for the ALT_USB1_INTREG instance. */
16216 #define ALT_USB1_INTREG_DIEPINT2_ADDR ALT_USB_INTREG_DIEPINT2_ADDR(ALT_USB1_INTREG_ADDR)
16217 /* The address of the ALT_USB_INTREG_DIEPTSIZ2 register for the ALT_USB1_INTREG instance. */
16218 #define ALT_USB1_INTREG_DIEPTSIZ2_ADDR ALT_USB_INTREG_DIEPTSIZ2_ADDR(ALT_USB1_INTREG_ADDR)
16219 /* The address of the ALT_USB_INTREG_DIEPDMA2 register for the ALT_USB1_INTREG instance. */
16220 #define ALT_USB1_INTREG_DIEPDMA2_ADDR ALT_USB_INTREG_DIEPDMA2_ADDR(ALT_USB1_INTREG_ADDR)
16221 /* The address of the ALT_USB_INTREG_DTXFSTS2 register for the ALT_USB1_INTREG instance. */
16222 #define ALT_USB1_INTREG_DTXFSTS2_ADDR ALT_USB_INTREG_DTXFSTS2_ADDR(ALT_USB1_INTREG_ADDR)
16223 /* The address of the ALT_USB_INTREG_DIEPDMAB2 register for the ALT_USB1_INTREG instance. */
16224 #define ALT_USB1_INTREG_DIEPDMAB2_ADDR ALT_USB_INTREG_DIEPDMAB2_ADDR(ALT_USB1_INTREG_ADDR)
16225 /* The address of the ALT_USB_INTREG_DIEPCTL3 register for the ALT_USB1_INTREG instance. */
16226 #define ALT_USB1_INTREG_DIEPCTL3_ADDR ALT_USB_INTREG_DIEPCTL3_ADDR(ALT_USB1_INTREG_ADDR)
16227 /* The address of the ALT_USB_INTREG_DIEPINT3 register for the ALT_USB1_INTREG instance. */
16228 #define ALT_USB1_INTREG_DIEPINT3_ADDR ALT_USB_INTREG_DIEPINT3_ADDR(ALT_USB1_INTREG_ADDR)
16229 /* The address of the ALT_USB_INTREG_DIEPTSIZ3 register for the ALT_USB1_INTREG instance. */
16230 #define ALT_USB1_INTREG_DIEPTSIZ3_ADDR ALT_USB_INTREG_DIEPTSIZ3_ADDR(ALT_USB1_INTREG_ADDR)
16231 /* The address of the ALT_USB_INTREG_DIEPDMA3 register for the ALT_USB1_INTREG instance. */
16232 #define ALT_USB1_INTREG_DIEPDMA3_ADDR ALT_USB_INTREG_DIEPDMA3_ADDR(ALT_USB1_INTREG_ADDR)
16233 /* The address of the ALT_USB_INTREG_DTXFSTS3 register for the ALT_USB1_INTREG instance. */
16234 #define ALT_USB1_INTREG_DTXFSTS3_ADDR ALT_USB_INTREG_DTXFSTS3_ADDR(ALT_USB1_INTREG_ADDR)
16235 /* The address of the ALT_USB_INTREG_DIEPDMAB3 register for the ALT_USB1_INTREG instance. */
16236 #define ALT_USB1_INTREG_DIEPDMAB3_ADDR ALT_USB_INTREG_DIEPDMAB3_ADDR(ALT_USB1_INTREG_ADDR)
16237 /* The address of the ALT_USB_INTREG_DIEPCTL4 register for the ALT_USB1_INTREG instance. */
16238 #define ALT_USB1_INTREG_DIEPCTL4_ADDR ALT_USB_INTREG_DIEPCTL4_ADDR(ALT_USB1_INTREG_ADDR)
16239 /* The address of the ALT_USB_INTREG_DIEPINT4 register for the ALT_USB1_INTREG instance. */
16240 #define ALT_USB1_INTREG_DIEPINT4_ADDR ALT_USB_INTREG_DIEPINT4_ADDR(ALT_USB1_INTREG_ADDR)
16241 /* The address of the ALT_USB_INTREG_DIEPTSIZ4 register for the ALT_USB1_INTREG instance. */
16242 #define ALT_USB1_INTREG_DIEPTSIZ4_ADDR ALT_USB_INTREG_DIEPTSIZ4_ADDR(ALT_USB1_INTREG_ADDR)
16243 /* The address of the ALT_USB_INTREG_DIEPDMA4 register for the ALT_USB1_INTREG instance. */
16244 #define ALT_USB1_INTREG_DIEPDMA4_ADDR ALT_USB_INTREG_DIEPDMA4_ADDR(ALT_USB1_INTREG_ADDR)
16245 /* The address of the ALT_USB_INTREG_DTXFSTS4 register for the ALT_USB1_INTREG instance. */
16246 #define ALT_USB1_INTREG_DTXFSTS4_ADDR ALT_USB_INTREG_DTXFSTS4_ADDR(ALT_USB1_INTREG_ADDR)
16247 /* The address of the ALT_USB_INTREG_DIEPDMAB4 register for the ALT_USB1_INTREG instance. */
16248 #define ALT_USB1_INTREG_DIEPDMAB4_ADDR ALT_USB_INTREG_DIEPDMAB4_ADDR(ALT_USB1_INTREG_ADDR)
16249 /* The address of the ALT_USB_INTREG_DIEPCTL5 register for the ALT_USB1_INTREG instance. */
16250 #define ALT_USB1_INTREG_DIEPCTL5_ADDR ALT_USB_INTREG_DIEPCTL5_ADDR(ALT_USB1_INTREG_ADDR)
16251 /* The address of the ALT_USB_INTREG_DIEPINT5 register for the ALT_USB1_INTREG instance. */
16252 #define ALT_USB1_INTREG_DIEPINT5_ADDR ALT_USB_INTREG_DIEPINT5_ADDR(ALT_USB1_INTREG_ADDR)
16253 /* The address of the ALT_USB_INTREG_DIEPTSIZ5 register for the ALT_USB1_INTREG instance. */
16254 #define ALT_USB1_INTREG_DIEPTSIZ5_ADDR ALT_USB_INTREG_DIEPTSIZ5_ADDR(ALT_USB1_INTREG_ADDR)
16255 /* The address of the ALT_USB_INTREG_DIEPDMA5 register for the ALT_USB1_INTREG instance. */
16256 #define ALT_USB1_INTREG_DIEPDMA5_ADDR ALT_USB_INTREG_DIEPDMA5_ADDR(ALT_USB1_INTREG_ADDR)
16257 /* The address of the ALT_USB_INTREG_DTXFSTS5 register for the ALT_USB1_INTREG instance. */
16258 #define ALT_USB1_INTREG_DTXFSTS5_ADDR ALT_USB_INTREG_DTXFSTS5_ADDR(ALT_USB1_INTREG_ADDR)
16259 /* The address of the ALT_USB_INTREG_DIEPDMAB5 register for the ALT_USB1_INTREG instance. */
16260 #define ALT_USB1_INTREG_DIEPDMAB5_ADDR ALT_USB_INTREG_DIEPDMAB5_ADDR(ALT_USB1_INTREG_ADDR)
16261 /* The address of the ALT_USB_INTREG_DIEPCTL6 register for the ALT_USB1_INTREG instance. */
16262 #define ALT_USB1_INTREG_DIEPCTL6_ADDR ALT_USB_INTREG_DIEPCTL6_ADDR(ALT_USB1_INTREG_ADDR)
16263 /* The address of the ALT_USB_INTREG_DIEPINT6 register for the ALT_USB1_INTREG instance. */
16264 #define ALT_USB1_INTREG_DIEPINT6_ADDR ALT_USB_INTREG_DIEPINT6_ADDR(ALT_USB1_INTREG_ADDR)
16265 /* The address of the ALT_USB_INTREG_DIEPTSIZ6 register for the ALT_USB1_INTREG instance. */
16266 #define ALT_USB1_INTREG_DIEPTSIZ6_ADDR ALT_USB_INTREG_DIEPTSIZ6_ADDR(ALT_USB1_INTREG_ADDR)
16267 /* The address of the ALT_USB_INTREG_DIEPDMA6 register for the ALT_USB1_INTREG instance. */
16268 #define ALT_USB1_INTREG_DIEPDMA6_ADDR ALT_USB_INTREG_DIEPDMA6_ADDR(ALT_USB1_INTREG_ADDR)
16269 /* The address of the ALT_USB_INTREG_DTXFSTS6 register for the ALT_USB1_INTREG instance. */
16270 #define ALT_USB1_INTREG_DTXFSTS6_ADDR ALT_USB_INTREG_DTXFSTS6_ADDR(ALT_USB1_INTREG_ADDR)
16271 /* The address of the ALT_USB_INTREG_DIEPDMAB6 register for the ALT_USB1_INTREG instance. */
16272 #define ALT_USB1_INTREG_DIEPDMAB6_ADDR ALT_USB_INTREG_DIEPDMAB6_ADDR(ALT_USB1_INTREG_ADDR)
16273 /* The address of the ALT_USB_INTREG_DIEPCTL7 register for the ALT_USB1_INTREG instance. */
16274 #define ALT_USB1_INTREG_DIEPCTL7_ADDR ALT_USB_INTREG_DIEPCTL7_ADDR(ALT_USB1_INTREG_ADDR)
16275 /* The address of the ALT_USB_INTREG_DIEPINT7 register for the ALT_USB1_INTREG instance. */
16276 #define ALT_USB1_INTREG_DIEPINT7_ADDR ALT_USB_INTREG_DIEPINT7_ADDR(ALT_USB1_INTREG_ADDR)
16277 /* The address of the ALT_USB_INTREG_DIEPTSIZ7 register for the ALT_USB1_INTREG instance. */
16278 #define ALT_USB1_INTREG_DIEPTSIZ7_ADDR ALT_USB_INTREG_DIEPTSIZ7_ADDR(ALT_USB1_INTREG_ADDR)
16279 /* The address of the ALT_USB_INTREG_DIEPDMA7 register for the ALT_USB1_INTREG instance. */
16280 #define ALT_USB1_INTREG_DIEPDMA7_ADDR ALT_USB_INTREG_DIEPDMA7_ADDR(ALT_USB1_INTREG_ADDR)
16281 /* The address of the ALT_USB_INTREG_DTXFSTS7 register for the ALT_USB1_INTREG instance. */
16282 #define ALT_USB1_INTREG_DTXFSTS7_ADDR ALT_USB_INTREG_DTXFSTS7_ADDR(ALT_USB1_INTREG_ADDR)
16283 /* The address of the ALT_USB_INTREG_DIEPDMAB7 register for the ALT_USB1_INTREG instance. */
16284 #define ALT_USB1_INTREG_DIEPDMAB7_ADDR ALT_USB_INTREG_DIEPDMAB7_ADDR(ALT_USB1_INTREG_ADDR)
16285 /* The address of the ALT_USB_INTREG_DIEPCTL8 register for the ALT_USB1_INTREG instance. */
16286 #define ALT_USB1_INTREG_DIEPCTL8_ADDR ALT_USB_INTREG_DIEPCTL8_ADDR(ALT_USB1_INTREG_ADDR)
16287 /* The address of the ALT_USB_INTREG_DIEPINT8 register for the ALT_USB1_INTREG instance. */
16288 #define ALT_USB1_INTREG_DIEPINT8_ADDR ALT_USB_INTREG_DIEPINT8_ADDR(ALT_USB1_INTREG_ADDR)
16289 /* The address of the ALT_USB_INTREG_DIEPTSIZ8 register for the ALT_USB1_INTREG instance. */
16290 #define ALT_USB1_INTREG_DIEPTSIZ8_ADDR ALT_USB_INTREG_DIEPTSIZ8_ADDR(ALT_USB1_INTREG_ADDR)
16291 /* The address of the ALT_USB_INTREG_DIEPDMA8 register for the ALT_USB1_INTREG instance. */
16292 #define ALT_USB1_INTREG_DIEPDMA8_ADDR ALT_USB_INTREG_DIEPDMA8_ADDR(ALT_USB1_INTREG_ADDR)
16293 /* The address of the ALT_USB_INTREG_DTXFSTS8 register for the ALT_USB1_INTREG instance. */
16294 #define ALT_USB1_INTREG_DTXFSTS8_ADDR ALT_USB_INTREG_DTXFSTS8_ADDR(ALT_USB1_INTREG_ADDR)
16295 /* The address of the ALT_USB_INTREG_DIEPDMAB8 register for the ALT_USB1_INTREG instance. */
16296 #define ALT_USB1_INTREG_DIEPDMAB8_ADDR ALT_USB_INTREG_DIEPDMAB8_ADDR(ALT_USB1_INTREG_ADDR)
16297 /* The address of the ALT_USB_INTREG_DIEPCTL9 register for the ALT_USB1_INTREG instance. */
16298 #define ALT_USB1_INTREG_DIEPCTL9_ADDR ALT_USB_INTREG_DIEPCTL9_ADDR(ALT_USB1_INTREG_ADDR)
16299 /* The address of the ALT_USB_INTREG_DIEPINT9 register for the ALT_USB1_INTREG instance. */
16300 #define ALT_USB1_INTREG_DIEPINT9_ADDR ALT_USB_INTREG_DIEPINT9_ADDR(ALT_USB1_INTREG_ADDR)
16301 /* The address of the ALT_USB_INTREG_DIEPTSIZ9 register for the ALT_USB1_INTREG instance. */
16302 #define ALT_USB1_INTREG_DIEPTSIZ9_ADDR ALT_USB_INTREG_DIEPTSIZ9_ADDR(ALT_USB1_INTREG_ADDR)
16303 /* The address of the ALT_USB_INTREG_DIEPDMA9 register for the ALT_USB1_INTREG instance. */
16304 #define ALT_USB1_INTREG_DIEPDMA9_ADDR ALT_USB_INTREG_DIEPDMA9_ADDR(ALT_USB1_INTREG_ADDR)
16305 /* The address of the ALT_USB_INTREG_DTXFSTS9 register for the ALT_USB1_INTREG instance. */
16306 #define ALT_USB1_INTREG_DTXFSTS9_ADDR ALT_USB_INTREG_DTXFSTS9_ADDR(ALT_USB1_INTREG_ADDR)
16307 /* The address of the ALT_USB_INTREG_DIEPDMAB9 register for the ALT_USB1_INTREG instance. */
16308 #define ALT_USB1_INTREG_DIEPDMAB9_ADDR ALT_USB_INTREG_DIEPDMAB9_ADDR(ALT_USB1_INTREG_ADDR)
16309 /* The address of the ALT_USB_INTREG_DIEPCTL10 register for the ALT_USB1_INTREG instance. */
16310 #define ALT_USB1_INTREG_DIEPCTL10_ADDR ALT_USB_INTREG_DIEPCTL10_ADDR(ALT_USB1_INTREG_ADDR)
16311 /* The address of the ALT_USB_INTREG_DIEPINT10 register for the ALT_USB1_INTREG instance. */
16312 #define ALT_USB1_INTREG_DIEPINT10_ADDR ALT_USB_INTREG_DIEPINT10_ADDR(ALT_USB1_INTREG_ADDR)
16313 /* The address of the ALT_USB_INTREG_DIEPTSIZ10 register for the ALT_USB1_INTREG instance. */
16314 #define ALT_USB1_INTREG_DIEPTSIZ10_ADDR ALT_USB_INTREG_DIEPTSIZ10_ADDR(ALT_USB1_INTREG_ADDR)
16315 /* The address of the ALT_USB_INTREG_DIEPDMA10 register for the ALT_USB1_INTREG instance. */
16316 #define ALT_USB1_INTREG_DIEPDMA10_ADDR ALT_USB_INTREG_DIEPDMA10_ADDR(ALT_USB1_INTREG_ADDR)
16317 /* The address of the ALT_USB_INTREG_DTXFSTS10 register for the ALT_USB1_INTREG instance. */
16318 #define ALT_USB1_INTREG_DTXFSTS10_ADDR ALT_USB_INTREG_DTXFSTS10_ADDR(ALT_USB1_INTREG_ADDR)
16319 /* The address of the ALT_USB_INTREG_DIEPDMAB10 register for the ALT_USB1_INTREG instance. */
16320 #define ALT_USB1_INTREG_DIEPDMAB10_ADDR ALT_USB_INTREG_DIEPDMAB10_ADDR(ALT_USB1_INTREG_ADDR)
16321 /* The address of the ALT_USB_INTREG_DIEPCTL11 register for the ALT_USB1_INTREG instance. */
16322 #define ALT_USB1_INTREG_DIEPCTL11_ADDR ALT_USB_INTREG_DIEPCTL11_ADDR(ALT_USB1_INTREG_ADDR)
16323 /* The address of the ALT_USB_INTREG_DIEPINT11 register for the ALT_USB1_INTREG instance. */
16324 #define ALT_USB1_INTREG_DIEPINT11_ADDR ALT_USB_INTREG_DIEPINT11_ADDR(ALT_USB1_INTREG_ADDR)
16325 /* The address of the ALT_USB_INTREG_DIEPTSIZ11 register for the ALT_USB1_INTREG instance. */
16326 #define ALT_USB1_INTREG_DIEPTSIZ11_ADDR ALT_USB_INTREG_DIEPTSIZ11_ADDR(ALT_USB1_INTREG_ADDR)
16327 /* The address of the ALT_USB_INTREG_DIEPDMA11 register for the ALT_USB1_INTREG instance. */
16328 #define ALT_USB1_INTREG_DIEPDMA11_ADDR ALT_USB_INTREG_DIEPDMA11_ADDR(ALT_USB1_INTREG_ADDR)
16329 /* The address of the ALT_USB_INTREG_DTXFSTS11 register for the ALT_USB1_INTREG instance. */
16330 #define ALT_USB1_INTREG_DTXFSTS11_ADDR ALT_USB_INTREG_DTXFSTS11_ADDR(ALT_USB1_INTREG_ADDR)
16331 /* The address of the ALT_USB_INTREG_DIEPDMAB11 register for the ALT_USB1_INTREG instance. */
16332 #define ALT_USB1_INTREG_DIEPDMAB11_ADDR ALT_USB_INTREG_DIEPDMAB11_ADDR(ALT_USB1_INTREG_ADDR)
16333 /* The address of the ALT_USB_INTREG_DIEPCTL12 register for the ALT_USB1_INTREG instance. */
16334 #define ALT_USB1_INTREG_DIEPCTL12_ADDR ALT_USB_INTREG_DIEPCTL12_ADDR(ALT_USB1_INTREG_ADDR)
16335 /* The address of the ALT_USB_INTREG_DIEPINT12 register for the ALT_USB1_INTREG instance. */
16336 #define ALT_USB1_INTREG_DIEPINT12_ADDR ALT_USB_INTREG_DIEPINT12_ADDR(ALT_USB1_INTREG_ADDR)
16337 /* The address of the ALT_USB_INTREG_DIEPTSIZ12 register for the ALT_USB1_INTREG instance. */
16338 #define ALT_USB1_INTREG_DIEPTSIZ12_ADDR ALT_USB_INTREG_DIEPTSIZ12_ADDR(ALT_USB1_INTREG_ADDR)
16339 /* The address of the ALT_USB_INTREG_DIEPDMA12 register for the ALT_USB1_INTREG instance. */
16340 #define ALT_USB1_INTREG_DIEPDMA12_ADDR ALT_USB_INTREG_DIEPDMA12_ADDR(ALT_USB1_INTREG_ADDR)
16341 /* The address of the ALT_USB_INTREG_DTXFSTS12 register for the ALT_USB1_INTREG instance. */
16342 #define ALT_USB1_INTREG_DTXFSTS12_ADDR ALT_USB_INTREG_DTXFSTS12_ADDR(ALT_USB1_INTREG_ADDR)
16343 /* The address of the ALT_USB_INTREG_DIEPDMAB12 register for the ALT_USB1_INTREG instance. */
16344 #define ALT_USB1_INTREG_DIEPDMAB12_ADDR ALT_USB_INTREG_DIEPDMAB12_ADDR(ALT_USB1_INTREG_ADDR)
16345 /* The address of the ALT_USB_INTREG_DIEPCTL13 register for the ALT_USB1_INTREG instance. */
16346 #define ALT_USB1_INTREG_DIEPCTL13_ADDR ALT_USB_INTREG_DIEPCTL13_ADDR(ALT_USB1_INTREG_ADDR)
16347 /* The address of the ALT_USB_INTREG_DIEPINT13 register for the ALT_USB1_INTREG instance. */
16348 #define ALT_USB1_INTREG_DIEPINT13_ADDR ALT_USB_INTREG_DIEPINT13_ADDR(ALT_USB1_INTREG_ADDR)
16349 /* The address of the ALT_USB_INTREG_DIEPTSIZ13 register for the ALT_USB1_INTREG instance. */
16350 #define ALT_USB1_INTREG_DIEPTSIZ13_ADDR ALT_USB_INTREG_DIEPTSIZ13_ADDR(ALT_USB1_INTREG_ADDR)
16351 /* The address of the ALT_USB_INTREG_DIEPDMA13 register for the ALT_USB1_INTREG instance. */
16352 #define ALT_USB1_INTREG_DIEPDMA13_ADDR ALT_USB_INTREG_DIEPDMA13_ADDR(ALT_USB1_INTREG_ADDR)
16353 /* The address of the ALT_USB_INTREG_DTXFSTS13 register for the ALT_USB1_INTREG instance. */
16354 #define ALT_USB1_INTREG_DTXFSTS13_ADDR ALT_USB_INTREG_DTXFSTS13_ADDR(ALT_USB1_INTREG_ADDR)
16355 /* The address of the ALT_USB_INTREG_DIEPDMAB13 register for the ALT_USB1_INTREG instance. */
16356 #define ALT_USB1_INTREG_DIEPDMAB13_ADDR ALT_USB_INTREG_DIEPDMAB13_ADDR(ALT_USB1_INTREG_ADDR)
16357 /* The address of the ALT_USB_INTREG_DIEPCTL14 register for the ALT_USB1_INTREG instance. */
16358 #define ALT_USB1_INTREG_DIEPCTL14_ADDR ALT_USB_INTREG_DIEPCTL14_ADDR(ALT_USB1_INTREG_ADDR)
16359 /* The address of the ALT_USB_INTREG_DIEPINT14 register for the ALT_USB1_INTREG instance. */
16360 #define ALT_USB1_INTREG_DIEPINT14_ADDR ALT_USB_INTREG_DIEPINT14_ADDR(ALT_USB1_INTREG_ADDR)
16361 /* The address of the ALT_USB_INTREG_DIEPTSIZ14 register for the ALT_USB1_INTREG instance. */
16362 #define ALT_USB1_INTREG_DIEPTSIZ14_ADDR ALT_USB_INTREG_DIEPTSIZ14_ADDR(ALT_USB1_INTREG_ADDR)
16363 /* The address of the ALT_USB_INTREG_DIEPDMA14 register for the ALT_USB1_INTREG instance. */
16364 #define ALT_USB1_INTREG_DIEPDMA14_ADDR ALT_USB_INTREG_DIEPDMA14_ADDR(ALT_USB1_INTREG_ADDR)
16365 /* The address of the ALT_USB_INTREG_DTXFSTS14 register for the ALT_USB1_INTREG instance. */
16366 #define ALT_USB1_INTREG_DTXFSTS14_ADDR ALT_USB_INTREG_DTXFSTS14_ADDR(ALT_USB1_INTREG_ADDR)
16367 /* The address of the ALT_USB_INTREG_DIEPDMAB14 register for the ALT_USB1_INTREG instance. */
16368 #define ALT_USB1_INTREG_DIEPDMAB14_ADDR ALT_USB_INTREG_DIEPDMAB14_ADDR(ALT_USB1_INTREG_ADDR)
16369 /* The address of the ALT_USB_INTREG_DIEPCTL15 register for the ALT_USB1_INTREG instance. */
16370 #define ALT_USB1_INTREG_DIEPCTL15_ADDR ALT_USB_INTREG_DIEPCTL15_ADDR(ALT_USB1_INTREG_ADDR)
16371 /* The address of the ALT_USB_INTREG_DIEPINT15 register for the ALT_USB1_INTREG instance. */
16372 #define ALT_USB1_INTREG_DIEPINT15_ADDR ALT_USB_INTREG_DIEPINT15_ADDR(ALT_USB1_INTREG_ADDR)
16373 /* The address of the ALT_USB_INTREG_DIEPTSIZ15 register for the ALT_USB1_INTREG instance. */
16374 #define ALT_USB1_INTREG_DIEPTSIZ15_ADDR ALT_USB_INTREG_DIEPTSIZ15_ADDR(ALT_USB1_INTREG_ADDR)
16375 /* The address of the ALT_USB_INTREG_DIEPDMA15 register for the ALT_USB1_INTREG instance. */
16376 #define ALT_USB1_INTREG_DIEPDMA15_ADDR ALT_USB_INTREG_DIEPDMA15_ADDR(ALT_USB1_INTREG_ADDR)
16377 /* The address of the ALT_USB_INTREG_DTXFSTS15 register for the ALT_USB1_INTREG instance. */
16378 #define ALT_USB1_INTREG_DTXFSTS15_ADDR ALT_USB_INTREG_DTXFSTS15_ADDR(ALT_USB1_INTREG_ADDR)
16379 /* The address of the ALT_USB_INTREG_DIEPDMAB15 register for the ALT_USB1_INTREG instance. */
16380 #define ALT_USB1_INTREG_DIEPDMAB15_ADDR ALT_USB_INTREG_DIEPDMAB15_ADDR(ALT_USB1_INTREG_ADDR)
16381 /* The address of the ALT_USB_INTREG_DOEPCTL0 register for the ALT_USB1_INTREG instance. */
16382 #define ALT_USB1_INTREG_DOEPCTL0_ADDR ALT_USB_INTREG_DOEPCTL0_ADDR(ALT_USB1_INTREG_ADDR)
16383 /* The address of the ALT_USB_INTREG_DOEPINT0 register for the ALT_USB1_INTREG instance. */
16384 #define ALT_USB1_INTREG_DOEPINT0_ADDR ALT_USB_INTREG_DOEPINT0_ADDR(ALT_USB1_INTREG_ADDR)
16385 /* The address of the ALT_USB_INTREG_DOEPTSIZ0 register for the ALT_USB1_INTREG instance. */
16386 #define ALT_USB1_INTREG_DOEPTSIZ0_ADDR ALT_USB_INTREG_DOEPTSIZ0_ADDR(ALT_USB1_INTREG_ADDR)
16387 /* The address of the ALT_USB_INTREG_DOEPDMA0 register for the ALT_USB1_INTREG instance. */
16388 #define ALT_USB1_INTREG_DOEPDMA0_ADDR ALT_USB_INTREG_DOEPDMA0_ADDR(ALT_USB1_INTREG_ADDR)
16389 /* The address of the ALT_USB_INTREG_DOEPDMAB0 register for the ALT_USB1_INTREG instance. */
16390 #define ALT_USB1_INTREG_DOEPDMAB0_ADDR ALT_USB_INTREG_DOEPDMAB0_ADDR(ALT_USB1_INTREG_ADDR)
16391 /* The address of the ALT_USB_INTREG_DOEPCTL1 register for the ALT_USB1_INTREG instance. */
16392 #define ALT_USB1_INTREG_DOEPCTL1_ADDR ALT_USB_INTREG_DOEPCTL1_ADDR(ALT_USB1_INTREG_ADDR)
16393 /* The address of the ALT_USB_INTREG_DOEPINT1 register for the ALT_USB1_INTREG instance. */
16394 #define ALT_USB1_INTREG_DOEPINT1_ADDR ALT_USB_INTREG_DOEPINT1_ADDR(ALT_USB1_INTREG_ADDR)
16395 /* The address of the ALT_USB_INTREG_DOEPTSIZ1 register for the ALT_USB1_INTREG instance. */
16396 #define ALT_USB1_INTREG_DOEPTSIZ1_ADDR ALT_USB_INTREG_DOEPTSIZ1_ADDR(ALT_USB1_INTREG_ADDR)
16397 /* The address of the ALT_USB_INTREG_DOEPDMA1 register for the ALT_USB1_INTREG instance. */
16398 #define ALT_USB1_INTREG_DOEPDMA1_ADDR ALT_USB_INTREG_DOEPDMA1_ADDR(ALT_USB1_INTREG_ADDR)
16399 /* The address of the ALT_USB_INTREG_DOEPDMAB1 register for the ALT_USB1_INTREG instance. */
16400 #define ALT_USB1_INTREG_DOEPDMAB1_ADDR ALT_USB_INTREG_DOEPDMAB1_ADDR(ALT_USB1_INTREG_ADDR)
16401 /* The address of the ALT_USB_INTREG_DOEPCTL2 register for the ALT_USB1_INTREG instance. */
16402 #define ALT_USB1_INTREG_DOEPCTL2_ADDR ALT_USB_INTREG_DOEPCTL2_ADDR(ALT_USB1_INTREG_ADDR)
16403 /* The address of the ALT_USB_INTREG_DOEPINT2 register for the ALT_USB1_INTREG instance. */
16404 #define ALT_USB1_INTREG_DOEPINT2_ADDR ALT_USB_INTREG_DOEPINT2_ADDR(ALT_USB1_INTREG_ADDR)
16405 /* The address of the ALT_USB_INTREG_DOEPTSIZ2 register for the ALT_USB1_INTREG instance. */
16406 #define ALT_USB1_INTREG_DOEPTSIZ2_ADDR ALT_USB_INTREG_DOEPTSIZ2_ADDR(ALT_USB1_INTREG_ADDR)
16407 /* The address of the ALT_USB_INTREG_DOEPDMA2 register for the ALT_USB1_INTREG instance. */
16408 #define ALT_USB1_INTREG_DOEPDMA2_ADDR ALT_USB_INTREG_DOEPDMA2_ADDR(ALT_USB1_INTREG_ADDR)
16409 /* The address of the ALT_USB_INTREG_DOEPDMAB2 register for the ALT_USB1_INTREG instance. */
16410 #define ALT_USB1_INTREG_DOEPDMAB2_ADDR ALT_USB_INTREG_DOEPDMAB2_ADDR(ALT_USB1_INTREG_ADDR)
16411 /* The address of the ALT_USB_INTREG_DOEPCTL3 register for the ALT_USB1_INTREG instance. */
16412 #define ALT_USB1_INTREG_DOEPCTL3_ADDR ALT_USB_INTREG_DOEPCTL3_ADDR(ALT_USB1_INTREG_ADDR)
16413 /* The address of the ALT_USB_INTREG_DOEPINT3 register for the ALT_USB1_INTREG instance. */
16414 #define ALT_USB1_INTREG_DOEPINT3_ADDR ALT_USB_INTREG_DOEPINT3_ADDR(ALT_USB1_INTREG_ADDR)
16415 /* The address of the ALT_USB_INTREG_DOEPTSIZ3 register for the ALT_USB1_INTREG instance. */
16416 #define ALT_USB1_INTREG_DOEPTSIZ3_ADDR ALT_USB_INTREG_DOEPTSIZ3_ADDR(ALT_USB1_INTREG_ADDR)
16417 /* The address of the ALT_USB_INTREG_DOEPDMA3 register for the ALT_USB1_INTREG instance. */
16418 #define ALT_USB1_INTREG_DOEPDMA3_ADDR ALT_USB_INTREG_DOEPDMA3_ADDR(ALT_USB1_INTREG_ADDR)
16419 /* The address of the ALT_USB_INTREG_DOEPDMAB3 register for the ALT_USB1_INTREG instance. */
16420 #define ALT_USB1_INTREG_DOEPDMAB3_ADDR ALT_USB_INTREG_DOEPDMAB3_ADDR(ALT_USB1_INTREG_ADDR)
16421 /* The address of the ALT_USB_INTREG_DOEPCTL4 register for the ALT_USB1_INTREG instance. */
16422 #define ALT_USB1_INTREG_DOEPCTL4_ADDR ALT_USB_INTREG_DOEPCTL4_ADDR(ALT_USB1_INTREG_ADDR)
16423 /* The address of the ALT_USB_INTREG_DOEPINT4 register for the ALT_USB1_INTREG instance. */
16424 #define ALT_USB1_INTREG_DOEPINT4_ADDR ALT_USB_INTREG_DOEPINT4_ADDR(ALT_USB1_INTREG_ADDR)
16425 /* The address of the ALT_USB_INTREG_DOEPTSIZ4 register for the ALT_USB1_INTREG instance. */
16426 #define ALT_USB1_INTREG_DOEPTSIZ4_ADDR ALT_USB_INTREG_DOEPTSIZ4_ADDR(ALT_USB1_INTREG_ADDR)
16427 /* The address of the ALT_USB_INTREG_DOEPDMA4 register for the ALT_USB1_INTREG instance. */
16428 #define ALT_USB1_INTREG_DOEPDMA4_ADDR ALT_USB_INTREG_DOEPDMA4_ADDR(ALT_USB1_INTREG_ADDR)
16429 /* The address of the ALT_USB_INTREG_DOEPDMAB4 register for the ALT_USB1_INTREG instance. */
16430 #define ALT_USB1_INTREG_DOEPDMAB4_ADDR ALT_USB_INTREG_DOEPDMAB4_ADDR(ALT_USB1_INTREG_ADDR)
16431 /* The address of the ALT_USB_INTREG_DOEPCTL5 register for the ALT_USB1_INTREG instance. */
16432 #define ALT_USB1_INTREG_DOEPCTL5_ADDR ALT_USB_INTREG_DOEPCTL5_ADDR(ALT_USB1_INTREG_ADDR)
16433 /* The address of the ALT_USB_INTREG_DOEPINT5 register for the ALT_USB1_INTREG instance. */
16434 #define ALT_USB1_INTREG_DOEPINT5_ADDR ALT_USB_INTREG_DOEPINT5_ADDR(ALT_USB1_INTREG_ADDR)
16435 /* The address of the ALT_USB_INTREG_DOEPTSIZ5 register for the ALT_USB1_INTREG instance. */
16436 #define ALT_USB1_INTREG_DOEPTSIZ5_ADDR ALT_USB_INTREG_DOEPTSIZ5_ADDR(ALT_USB1_INTREG_ADDR)
16437 /* The address of the ALT_USB_INTREG_DOEPDMA5 register for the ALT_USB1_INTREG instance. */
16438 #define ALT_USB1_INTREG_DOEPDMA5_ADDR ALT_USB_INTREG_DOEPDMA5_ADDR(ALT_USB1_INTREG_ADDR)
16439 /* The address of the ALT_USB_INTREG_DOEPDMAB5 register for the ALT_USB1_INTREG instance. */
16440 #define ALT_USB1_INTREG_DOEPDMAB5_ADDR ALT_USB_INTREG_DOEPDMAB5_ADDR(ALT_USB1_INTREG_ADDR)
16441 /* The address of the ALT_USB_INTREG_DOEPCTL6 register for the ALT_USB1_INTREG instance. */
16442 #define ALT_USB1_INTREG_DOEPCTL6_ADDR ALT_USB_INTREG_DOEPCTL6_ADDR(ALT_USB1_INTREG_ADDR)
16443 /* The address of the ALT_USB_INTREG_DOEPINT6 register for the ALT_USB1_INTREG instance. */
16444 #define ALT_USB1_INTREG_DOEPINT6_ADDR ALT_USB_INTREG_DOEPINT6_ADDR(ALT_USB1_INTREG_ADDR)
16445 /* The address of the ALT_USB_INTREG_DOEPTSIZ6 register for the ALT_USB1_INTREG instance. */
16446 #define ALT_USB1_INTREG_DOEPTSIZ6_ADDR ALT_USB_INTREG_DOEPTSIZ6_ADDR(ALT_USB1_INTREG_ADDR)
16447 /* The address of the ALT_USB_INTREG_DOEPDMA6 register for the ALT_USB1_INTREG instance. */
16448 #define ALT_USB1_INTREG_DOEPDMA6_ADDR ALT_USB_INTREG_DOEPDMA6_ADDR(ALT_USB1_INTREG_ADDR)
16449 /* The address of the ALT_USB_INTREG_DOEPDMAB6 register for the ALT_USB1_INTREG instance. */
16450 #define ALT_USB1_INTREG_DOEPDMAB6_ADDR ALT_USB_INTREG_DOEPDMAB6_ADDR(ALT_USB1_INTREG_ADDR)
16451 /* The address of the ALT_USB_INTREG_DOEPCTL7 register for the ALT_USB1_INTREG instance. */
16452 #define ALT_USB1_INTREG_DOEPCTL7_ADDR ALT_USB_INTREG_DOEPCTL7_ADDR(ALT_USB1_INTREG_ADDR)
16453 /* The address of the ALT_USB_INTREG_DOEPINT7 register for the ALT_USB1_INTREG instance. */
16454 #define ALT_USB1_INTREG_DOEPINT7_ADDR ALT_USB_INTREG_DOEPINT7_ADDR(ALT_USB1_INTREG_ADDR)
16455 /* The address of the ALT_USB_INTREG_DOEPTSIZ7 register for the ALT_USB1_INTREG instance. */
16456 #define ALT_USB1_INTREG_DOEPTSIZ7_ADDR ALT_USB_INTREG_DOEPTSIZ7_ADDR(ALT_USB1_INTREG_ADDR)
16457 /* The address of the ALT_USB_INTREG_DOEPDMA7 register for the ALT_USB1_INTREG instance. */
16458 #define ALT_USB1_INTREG_DOEPDMA7_ADDR ALT_USB_INTREG_DOEPDMA7_ADDR(ALT_USB1_INTREG_ADDR)
16459 /* The address of the ALT_USB_INTREG_DOEPDMAB7 register for the ALT_USB1_INTREG instance. */
16460 #define ALT_USB1_INTREG_DOEPDMAB7_ADDR ALT_USB_INTREG_DOEPDMAB7_ADDR(ALT_USB1_INTREG_ADDR)
16461 /* The address of the ALT_USB_INTREG_DOEPCTL8 register for the ALT_USB1_INTREG instance. */
16462 #define ALT_USB1_INTREG_DOEPCTL8_ADDR ALT_USB_INTREG_DOEPCTL8_ADDR(ALT_USB1_INTREG_ADDR)
16463 /* The address of the ALT_USB_INTREG_DOEPINT8 register for the ALT_USB1_INTREG instance. */
16464 #define ALT_USB1_INTREG_DOEPINT8_ADDR ALT_USB_INTREG_DOEPINT8_ADDR(ALT_USB1_INTREG_ADDR)
16465 /* The address of the ALT_USB_INTREG_DOEPTSIZ8 register for the ALT_USB1_INTREG instance. */
16466 #define ALT_USB1_INTREG_DOEPTSIZ8_ADDR ALT_USB_INTREG_DOEPTSIZ8_ADDR(ALT_USB1_INTREG_ADDR)
16467 /* The address of the ALT_USB_INTREG_DOEPDMA8 register for the ALT_USB1_INTREG instance. */
16468 #define ALT_USB1_INTREG_DOEPDMA8_ADDR ALT_USB_INTREG_DOEPDMA8_ADDR(ALT_USB1_INTREG_ADDR)
16469 /* The address of the ALT_USB_INTREG_DOEPDMAB8 register for the ALT_USB1_INTREG instance. */
16470 #define ALT_USB1_INTREG_DOEPDMAB8_ADDR ALT_USB_INTREG_DOEPDMAB8_ADDR(ALT_USB1_INTREG_ADDR)
16471 /* The address of the ALT_USB_INTREG_DOEPCTL9 register for the ALT_USB1_INTREG instance. */
16472 #define ALT_USB1_INTREG_DOEPCTL9_ADDR ALT_USB_INTREG_DOEPCTL9_ADDR(ALT_USB1_INTREG_ADDR)
16473 /* The address of the ALT_USB_INTREG_DOEPINT9 register for the ALT_USB1_INTREG instance. */
16474 #define ALT_USB1_INTREG_DOEPINT9_ADDR ALT_USB_INTREG_DOEPINT9_ADDR(ALT_USB1_INTREG_ADDR)
16475 /* The address of the ALT_USB_INTREG_DOEPTSIZ9 register for the ALT_USB1_INTREG instance. */
16476 #define ALT_USB1_INTREG_DOEPTSIZ9_ADDR ALT_USB_INTREG_DOEPTSIZ9_ADDR(ALT_USB1_INTREG_ADDR)
16477 /* The address of the ALT_USB_INTREG_DOEPDMA9 register for the ALT_USB1_INTREG instance. */
16478 #define ALT_USB1_INTREG_DOEPDMA9_ADDR ALT_USB_INTREG_DOEPDMA9_ADDR(ALT_USB1_INTREG_ADDR)
16479 /* The address of the ALT_USB_INTREG_DOEPDMAB9 register for the ALT_USB1_INTREG instance. */
16480 #define ALT_USB1_INTREG_DOEPDMAB9_ADDR ALT_USB_INTREG_DOEPDMAB9_ADDR(ALT_USB1_INTREG_ADDR)
16481 /* The address of the ALT_USB_INTREG_DOEPCTL10 register for the ALT_USB1_INTREG instance. */
16482 #define ALT_USB1_INTREG_DOEPCTL10_ADDR ALT_USB_INTREG_DOEPCTL10_ADDR(ALT_USB1_INTREG_ADDR)
16483 /* The address of the ALT_USB_INTREG_DOEPINT10 register for the ALT_USB1_INTREG instance. */
16484 #define ALT_USB1_INTREG_DOEPINT10_ADDR ALT_USB_INTREG_DOEPINT10_ADDR(ALT_USB1_INTREG_ADDR)
16485 /* The address of the ALT_USB_INTREG_DOEPTSIZ10 register for the ALT_USB1_INTREG instance. */
16486 #define ALT_USB1_INTREG_DOEPTSIZ10_ADDR ALT_USB_INTREG_DOEPTSIZ10_ADDR(ALT_USB1_INTREG_ADDR)
16487 /* The address of the ALT_USB_INTREG_DOEPDMA10 register for the ALT_USB1_INTREG instance. */
16488 #define ALT_USB1_INTREG_DOEPDMA10_ADDR ALT_USB_INTREG_DOEPDMA10_ADDR(ALT_USB1_INTREG_ADDR)
16489 /* The address of the ALT_USB_INTREG_DOEPDMAB10 register for the ALT_USB1_INTREG instance. */
16490 #define ALT_USB1_INTREG_DOEPDMAB10_ADDR ALT_USB_INTREG_DOEPDMAB10_ADDR(ALT_USB1_INTREG_ADDR)
16491 /* The address of the ALT_USB_INTREG_DOEPCTL11 register for the ALT_USB1_INTREG instance. */
16492 #define ALT_USB1_INTREG_DOEPCTL11_ADDR ALT_USB_INTREG_DOEPCTL11_ADDR(ALT_USB1_INTREG_ADDR)
16493 /* The address of the ALT_USB_INTREG_DOEPINT11 register for the ALT_USB1_INTREG instance. */
16494 #define ALT_USB1_INTREG_DOEPINT11_ADDR ALT_USB_INTREG_DOEPINT11_ADDR(ALT_USB1_INTREG_ADDR)
16495 /* The address of the ALT_USB_INTREG_DOEPTSIZ11 register for the ALT_USB1_INTREG instance. */
16496 #define ALT_USB1_INTREG_DOEPTSIZ11_ADDR ALT_USB_INTREG_DOEPTSIZ11_ADDR(ALT_USB1_INTREG_ADDR)
16497 /* The address of the ALT_USB_INTREG_DOEPDMA11 register for the ALT_USB1_INTREG instance. */
16498 #define ALT_USB1_INTREG_DOEPDMA11_ADDR ALT_USB_INTREG_DOEPDMA11_ADDR(ALT_USB1_INTREG_ADDR)
16499 /* The address of the ALT_USB_INTREG_DOEPDMAB11 register for the ALT_USB1_INTREG instance. */
16500 #define ALT_USB1_INTREG_DOEPDMAB11_ADDR ALT_USB_INTREG_DOEPDMAB11_ADDR(ALT_USB1_INTREG_ADDR)
16501 /* The address of the ALT_USB_INTREG_DOEPCTL12 register for the ALT_USB1_INTREG instance. */
16502 #define ALT_USB1_INTREG_DOEPCTL12_ADDR ALT_USB_INTREG_DOEPCTL12_ADDR(ALT_USB1_INTREG_ADDR)
16503 /* The address of the ALT_USB_INTREG_DOEPINT12 register for the ALT_USB1_INTREG instance. */
16504 #define ALT_USB1_INTREG_DOEPINT12_ADDR ALT_USB_INTREG_DOEPINT12_ADDR(ALT_USB1_INTREG_ADDR)
16505 /* The address of the ALT_USB_INTREG_DOEPTSIZ12 register for the ALT_USB1_INTREG instance. */
16506 #define ALT_USB1_INTREG_DOEPTSIZ12_ADDR ALT_USB_INTREG_DOEPTSIZ12_ADDR(ALT_USB1_INTREG_ADDR)
16507 /* The address of the ALT_USB_INTREG_DOEPDMA12 register for the ALT_USB1_INTREG instance. */
16508 #define ALT_USB1_INTREG_DOEPDMA12_ADDR ALT_USB_INTREG_DOEPDMA12_ADDR(ALT_USB1_INTREG_ADDR)
16509 /* The address of the ALT_USB_INTREG_DOEPDMAB12 register for the ALT_USB1_INTREG instance. */
16510 #define ALT_USB1_INTREG_DOEPDMAB12_ADDR ALT_USB_INTREG_DOEPDMAB12_ADDR(ALT_USB1_INTREG_ADDR)
16511 /* The address of the ALT_USB_INTREG_DOEPCTL13 register for the ALT_USB1_INTREG instance. */
16512 #define ALT_USB1_INTREG_DOEPCTL13_ADDR ALT_USB_INTREG_DOEPCTL13_ADDR(ALT_USB1_INTREG_ADDR)
16513 /* The address of the ALT_USB_INTREG_DOEPINT13 register for the ALT_USB1_INTREG instance. */
16514 #define ALT_USB1_INTREG_DOEPINT13_ADDR ALT_USB_INTREG_DOEPINT13_ADDR(ALT_USB1_INTREG_ADDR)
16515 /* The address of the ALT_USB_INTREG_DOEPTSIZ13 register for the ALT_USB1_INTREG instance. */
16516 #define ALT_USB1_INTREG_DOEPTSIZ13_ADDR ALT_USB_INTREG_DOEPTSIZ13_ADDR(ALT_USB1_INTREG_ADDR)
16517 /* The address of the ALT_USB_INTREG_DOEPDMA13 register for the ALT_USB1_INTREG instance. */
16518 #define ALT_USB1_INTREG_DOEPDMA13_ADDR ALT_USB_INTREG_DOEPDMA13_ADDR(ALT_USB1_INTREG_ADDR)
16519 /* The address of the ALT_USB_INTREG_DOEPDMAB13 register for the ALT_USB1_INTREG instance. */
16520 #define ALT_USB1_INTREG_DOEPDMAB13_ADDR ALT_USB_INTREG_DOEPDMAB13_ADDR(ALT_USB1_INTREG_ADDR)
16521 /* The address of the ALT_USB_INTREG_DOEPCTL14 register for the ALT_USB1_INTREG instance. */
16522 #define ALT_USB1_INTREG_DOEPCTL14_ADDR ALT_USB_INTREG_DOEPCTL14_ADDR(ALT_USB1_INTREG_ADDR)
16523 /* The address of the ALT_USB_INTREG_DOEPINT14 register for the ALT_USB1_INTREG instance. */
16524 #define ALT_USB1_INTREG_DOEPINT14_ADDR ALT_USB_INTREG_DOEPINT14_ADDR(ALT_USB1_INTREG_ADDR)
16525 /* The address of the ALT_USB_INTREG_DOEPTSIZ14 register for the ALT_USB1_INTREG instance. */
16526 #define ALT_USB1_INTREG_DOEPTSIZ14_ADDR ALT_USB_INTREG_DOEPTSIZ14_ADDR(ALT_USB1_INTREG_ADDR)
16527 /* The address of the ALT_USB_INTREG_DOEPDMA14 register for the ALT_USB1_INTREG instance. */
16528 #define ALT_USB1_INTREG_DOEPDMA14_ADDR ALT_USB_INTREG_DOEPDMA14_ADDR(ALT_USB1_INTREG_ADDR)
16529 /* The address of the ALT_USB_INTREG_DOEPDMAB14 register for the ALT_USB1_INTREG instance. */
16530 #define ALT_USB1_INTREG_DOEPDMAB14_ADDR ALT_USB_INTREG_DOEPDMAB14_ADDR(ALT_USB1_INTREG_ADDR)
16531 /* The address of the ALT_USB_INTREG_DOEPCTL15 register for the ALT_USB1_INTREG instance. */
16532 #define ALT_USB1_INTREG_DOEPCTL15_ADDR ALT_USB_INTREG_DOEPCTL15_ADDR(ALT_USB1_INTREG_ADDR)
16533 /* The address of the ALT_USB_INTREG_DOEPINT15 register for the ALT_USB1_INTREG instance. */
16534 #define ALT_USB1_INTREG_DOEPINT15_ADDR ALT_USB_INTREG_DOEPINT15_ADDR(ALT_USB1_INTREG_ADDR)
16535 /* The address of the ALT_USB_INTREG_DOEPTSIZ15 register for the ALT_USB1_INTREG instance. */
16536 #define ALT_USB1_INTREG_DOEPTSIZ15_ADDR ALT_USB_INTREG_DOEPTSIZ15_ADDR(ALT_USB1_INTREG_ADDR)
16537 /* The address of the ALT_USB_INTREG_DOEPDMA15 register for the ALT_USB1_INTREG instance. */
16538 #define ALT_USB1_INTREG_DOEPDMA15_ADDR ALT_USB_INTREG_DOEPDMA15_ADDR(ALT_USB1_INTREG_ADDR)
16539 /* The address of the ALT_USB_INTREG_DOEPDMAB15 register for the ALT_USB1_INTREG instance. */
16540 #define ALT_USB1_INTREG_DOEPDMAB15_ADDR ALT_USB_INTREG_DOEPDMAB15_ADDR(ALT_USB1_INTREG_ADDR)
16541 /* The address of the ALT_USB_INTREG_PCGCCTL register for the ALT_USB1_INTREG instance. */
16542 #define ALT_USB1_INTREG_PCGCCTL_ADDR ALT_USB_INTREG_PCGCCTL_ADDR(ALT_USB1_INTREG_ADDR)
16543 /* The base address byte offset for the start of the ALT_USB1_INTREG component. */
16544 #define ALT_USB1_INTREG_OFST 0xffb40000
16545 /* The start address of the ALT_USB1_INTREG component. */
16546 #define ALT_USB1_INTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_INTREG_OFST))
16547 /* The lower bound address range of the ALT_USB1_INTREG component. */
16548 #define ALT_USB1_INTREG_LB_ADDR ALT_USB1_INTREG_ADDR
16549 /* The upper bound address range of the ALT_USB1_INTREG component. */
16550 #define ALT_USB1_INTREG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_INTREG_ADDR) + 0xf00) - 1))
16551 
16552 
16553 /*
16554  * Component Instance : usb1_DFIFO_0
16555  *
16556  * Instance usb1_DFIFO_0 of component ALT_USB_DFIFO.
16557  *
16558  *
16559  */
16560 /* The base address byte offset for the start of the ALT_USB1_DFIFO_0 component. */
16561 #define ALT_USB1_DFIFO_0_OFST 0xffb41000
16562 /* The start address of the ALT_USB1_DFIFO_0 component. */
16563 #define ALT_USB1_DFIFO_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_0_OFST))
16564 /* The lower bound address range of the ALT_USB1_DFIFO_0 component. */
16565 #define ALT_USB1_DFIFO_0_LB_ADDR ALT_USB1_DFIFO_0_ADDR
16566 /* The upper bound address range of the ALT_USB1_DFIFO_0 component. */
16567 #define ALT_USB1_DFIFO_0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_0_ADDR) + 0x1000) - 1))
16568 
16569 
16570 /*
16571  * Component Instance : usb1_DFIFO_1
16572  *
16573  * Instance usb1_DFIFO_1 of component ALT_USB_DFIFO.
16574  *
16575  *
16576  */
16577 /* The base address byte offset for the start of the ALT_USB1_DFIFO_1 component. */
16578 #define ALT_USB1_DFIFO_1_OFST 0xffb42000
16579 /* The start address of the ALT_USB1_DFIFO_1 component. */
16580 #define ALT_USB1_DFIFO_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_1_OFST))
16581 /* The lower bound address range of the ALT_USB1_DFIFO_1 component. */
16582 #define ALT_USB1_DFIFO_1_LB_ADDR ALT_USB1_DFIFO_1_ADDR
16583 /* The upper bound address range of the ALT_USB1_DFIFO_1 component. */
16584 #define ALT_USB1_DFIFO_1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_1_ADDR) + 0x1000) - 1))
16585 
16586 
16587 /*
16588  * Component Instance : usb1_DFIFO_2
16589  *
16590  * Instance usb1_DFIFO_2 of component ALT_USB_DFIFO.
16591  *
16592  *
16593  */
16594 /* The base address byte offset for the start of the ALT_USB1_DFIFO_2 component. */
16595 #define ALT_USB1_DFIFO_2_OFST 0xffb43000
16596 /* The start address of the ALT_USB1_DFIFO_2 component. */
16597 #define ALT_USB1_DFIFO_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_2_OFST))
16598 /* The lower bound address range of the ALT_USB1_DFIFO_2 component. */
16599 #define ALT_USB1_DFIFO_2_LB_ADDR ALT_USB1_DFIFO_2_ADDR
16600 /* The upper bound address range of the ALT_USB1_DFIFO_2 component. */
16601 #define ALT_USB1_DFIFO_2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_2_ADDR) + 0x1000) - 1))
16602 
16603 
16604 /*
16605  * Component Instance : usb1_DFIFO_3
16606  *
16607  * Instance usb1_DFIFO_3 of component ALT_USB_DFIFO.
16608  *
16609  *
16610  */
16611 /* The base address byte offset for the start of the ALT_USB1_DFIFO_3 component. */
16612 #define ALT_USB1_DFIFO_3_OFST 0xffb44000
16613 /* The start address of the ALT_USB1_DFIFO_3 component. */
16614 #define ALT_USB1_DFIFO_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_3_OFST))
16615 /* The lower bound address range of the ALT_USB1_DFIFO_3 component. */
16616 #define ALT_USB1_DFIFO_3_LB_ADDR ALT_USB1_DFIFO_3_ADDR
16617 /* The upper bound address range of the ALT_USB1_DFIFO_3 component. */
16618 #define ALT_USB1_DFIFO_3_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_3_ADDR) + 0x1000) - 1))
16619 
16620 
16621 /*
16622  * Component Instance : usb1_DFIFO_4
16623  *
16624  * Instance usb1_DFIFO_4 of component ALT_USB_DFIFO.
16625  *
16626  *
16627  */
16628 /* The base address byte offset for the start of the ALT_USB1_DFIFO_4 component. */
16629 #define ALT_USB1_DFIFO_4_OFST 0xffb45000
16630 /* The start address of the ALT_USB1_DFIFO_4 component. */
16631 #define ALT_USB1_DFIFO_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_4_OFST))
16632 /* The lower bound address range of the ALT_USB1_DFIFO_4 component. */
16633 #define ALT_USB1_DFIFO_4_LB_ADDR ALT_USB1_DFIFO_4_ADDR
16634 /* The upper bound address range of the ALT_USB1_DFIFO_4 component. */
16635 #define ALT_USB1_DFIFO_4_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_4_ADDR) + 0x1000) - 1))
16636 
16637 
16638 /*
16639  * Component Instance : usb1_DFIFO_5
16640  *
16641  * Instance usb1_DFIFO_5 of component ALT_USB_DFIFO.
16642  *
16643  *
16644  */
16645 /* The base address byte offset for the start of the ALT_USB1_DFIFO_5 component. */
16646 #define ALT_USB1_DFIFO_5_OFST 0xffb46000
16647 /* The start address of the ALT_USB1_DFIFO_5 component. */
16648 #define ALT_USB1_DFIFO_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_5_OFST))
16649 /* The lower bound address range of the ALT_USB1_DFIFO_5 component. */
16650 #define ALT_USB1_DFIFO_5_LB_ADDR ALT_USB1_DFIFO_5_ADDR
16651 /* The upper bound address range of the ALT_USB1_DFIFO_5 component. */
16652 #define ALT_USB1_DFIFO_5_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_5_ADDR) + 0x1000) - 1))
16653 
16654 
16655 /*
16656  * Component Instance : usb1_DFIFO_6
16657  *
16658  * Instance usb1_DFIFO_6 of component ALT_USB_DFIFO.
16659  *
16660  *
16661  */
16662 /* The base address byte offset for the start of the ALT_USB1_DFIFO_6 component. */
16663 #define ALT_USB1_DFIFO_6_OFST 0xffb47000
16664 /* The start address of the ALT_USB1_DFIFO_6 component. */
16665 #define ALT_USB1_DFIFO_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_6_OFST))
16666 /* The lower bound address range of the ALT_USB1_DFIFO_6 component. */
16667 #define ALT_USB1_DFIFO_6_LB_ADDR ALT_USB1_DFIFO_6_ADDR
16668 /* The upper bound address range of the ALT_USB1_DFIFO_6 component. */
16669 #define ALT_USB1_DFIFO_6_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_6_ADDR) + 0x1000) - 1))
16670 
16671 
16672 /*
16673  * Component Instance : usb1_DFIFO_7
16674  *
16675  * Instance usb1_DFIFO_7 of component ALT_USB_DFIFO.
16676  *
16677  *
16678  */
16679 /* The base address byte offset for the start of the ALT_USB1_DFIFO_7 component. */
16680 #define ALT_USB1_DFIFO_7_OFST 0xffb48000
16681 /* The start address of the ALT_USB1_DFIFO_7 component. */
16682 #define ALT_USB1_DFIFO_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_7_OFST))
16683 /* The lower bound address range of the ALT_USB1_DFIFO_7 component. */
16684 #define ALT_USB1_DFIFO_7_LB_ADDR ALT_USB1_DFIFO_7_ADDR
16685 /* The upper bound address range of the ALT_USB1_DFIFO_7 component. */
16686 #define ALT_USB1_DFIFO_7_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_7_ADDR) + 0x1000) - 1))
16687 
16688 
16689 /*
16690  * Component Instance : usb1_DFIFO_8
16691  *
16692  * Instance usb1_DFIFO_8 of component ALT_USB_DFIFO.
16693  *
16694  *
16695  */
16696 /* The base address byte offset for the start of the ALT_USB1_DFIFO_8 component. */
16697 #define ALT_USB1_DFIFO_8_OFST 0xffb49000
16698 /* The start address of the ALT_USB1_DFIFO_8 component. */
16699 #define ALT_USB1_DFIFO_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_8_OFST))
16700 /* The lower bound address range of the ALT_USB1_DFIFO_8 component. */
16701 #define ALT_USB1_DFIFO_8_LB_ADDR ALT_USB1_DFIFO_8_ADDR
16702 /* The upper bound address range of the ALT_USB1_DFIFO_8 component. */
16703 #define ALT_USB1_DFIFO_8_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_8_ADDR) + 0x1000) - 1))
16704 
16705 
16706 /*
16707  * Component Instance : usb1_DFIFO_9
16708  *
16709  * Instance usb1_DFIFO_9 of component ALT_USB_DFIFO.
16710  *
16711  *
16712  */
16713 /* The base address byte offset for the start of the ALT_USB1_DFIFO_9 component. */
16714 #define ALT_USB1_DFIFO_9_OFST 0xffb4a000
16715 /* The start address of the ALT_USB1_DFIFO_9 component. */
16716 #define ALT_USB1_DFIFO_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_9_OFST))
16717 /* The lower bound address range of the ALT_USB1_DFIFO_9 component. */
16718 #define ALT_USB1_DFIFO_9_LB_ADDR ALT_USB1_DFIFO_9_ADDR
16719 /* The upper bound address range of the ALT_USB1_DFIFO_9 component. */
16720 #define ALT_USB1_DFIFO_9_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_9_ADDR) + 0x1000) - 1))
16721 
16722 
16723 /*
16724  * Component Instance : usb1_DFIFO_10
16725  *
16726  * Instance usb1_DFIFO_10 of component ALT_USB_DFIFO.
16727  *
16728  *
16729  */
16730 /* The base address byte offset for the start of the ALT_USB1_DFIFO_10 component. */
16731 #define ALT_USB1_DFIFO_10_OFST 0xffb4b000
16732 /* The start address of the ALT_USB1_DFIFO_10 component. */
16733 #define ALT_USB1_DFIFO_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_10_OFST))
16734 /* The lower bound address range of the ALT_USB1_DFIFO_10 component. */
16735 #define ALT_USB1_DFIFO_10_LB_ADDR ALT_USB1_DFIFO_10_ADDR
16736 /* The upper bound address range of the ALT_USB1_DFIFO_10 component. */
16737 #define ALT_USB1_DFIFO_10_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_10_ADDR) + 0x1000) - 1))
16738 
16739 
16740 /*
16741  * Component Instance : usb1_DFIFO_11
16742  *
16743  * Instance usb1_DFIFO_11 of component ALT_USB_DFIFO.
16744  *
16745  *
16746  */
16747 /* The base address byte offset for the start of the ALT_USB1_DFIFO_11 component. */
16748 #define ALT_USB1_DFIFO_11_OFST 0xffb4c000
16749 /* The start address of the ALT_USB1_DFIFO_11 component. */
16750 #define ALT_USB1_DFIFO_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_11_OFST))
16751 /* The lower bound address range of the ALT_USB1_DFIFO_11 component. */
16752 #define ALT_USB1_DFIFO_11_LB_ADDR ALT_USB1_DFIFO_11_ADDR
16753 /* The upper bound address range of the ALT_USB1_DFIFO_11 component. */
16754 #define ALT_USB1_DFIFO_11_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_11_ADDR) + 0x1000) - 1))
16755 
16756 
16757 /*
16758  * Component Instance : usb1_DFIFO_12
16759  *
16760  * Instance usb1_DFIFO_12 of component ALT_USB_DFIFO.
16761  *
16762  *
16763  */
16764 /* The base address byte offset for the start of the ALT_USB1_DFIFO_12 component. */
16765 #define ALT_USB1_DFIFO_12_OFST 0xffb4d000
16766 /* The start address of the ALT_USB1_DFIFO_12 component. */
16767 #define ALT_USB1_DFIFO_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_12_OFST))
16768 /* The lower bound address range of the ALT_USB1_DFIFO_12 component. */
16769 #define ALT_USB1_DFIFO_12_LB_ADDR ALT_USB1_DFIFO_12_ADDR
16770 /* The upper bound address range of the ALT_USB1_DFIFO_12 component. */
16771 #define ALT_USB1_DFIFO_12_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_12_ADDR) + 0x1000) - 1))
16772 
16773 
16774 /*
16775  * Component Instance : usb1_DFIFO_13
16776  *
16777  * Instance usb1_DFIFO_13 of component ALT_USB_DFIFO.
16778  *
16779  *
16780  */
16781 /* The base address byte offset for the start of the ALT_USB1_DFIFO_13 component. */
16782 #define ALT_USB1_DFIFO_13_OFST 0xffb4e000
16783 /* The start address of the ALT_USB1_DFIFO_13 component. */
16784 #define ALT_USB1_DFIFO_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_13_OFST))
16785 /* The lower bound address range of the ALT_USB1_DFIFO_13 component. */
16786 #define ALT_USB1_DFIFO_13_LB_ADDR ALT_USB1_DFIFO_13_ADDR
16787 /* The upper bound address range of the ALT_USB1_DFIFO_13 component. */
16788 #define ALT_USB1_DFIFO_13_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_13_ADDR) + 0x1000) - 1))
16789 
16790 
16791 /*
16792  * Component Instance : usb1_DFIFO_14
16793  *
16794  * Instance usb1_DFIFO_14 of component ALT_USB_DFIFO.
16795  *
16796  *
16797  */
16798 /* The base address byte offset for the start of the ALT_USB1_DFIFO_14 component. */
16799 #define ALT_USB1_DFIFO_14_OFST 0xffb4f000
16800 /* The start address of the ALT_USB1_DFIFO_14 component. */
16801 #define ALT_USB1_DFIFO_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_14_OFST))
16802 /* The lower bound address range of the ALT_USB1_DFIFO_14 component. */
16803 #define ALT_USB1_DFIFO_14_LB_ADDR ALT_USB1_DFIFO_14_ADDR
16804 /* The upper bound address range of the ALT_USB1_DFIFO_14 component. */
16805 #define ALT_USB1_DFIFO_14_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_14_ADDR) + 0x1000) - 1))
16806 
16807 
16808 /*
16809  * Component Instance : usb1_DFIFO_15
16810  *
16811  * Instance usb1_DFIFO_15 of component ALT_USB_DFIFO.
16812  *
16813  *
16814  */
16815 /* The base address byte offset for the start of the ALT_USB1_DFIFO_15 component. */
16816 #define ALT_USB1_DFIFO_15_OFST 0xffb50000
16817 /* The start address of the ALT_USB1_DFIFO_15 component. */
16818 #define ALT_USB1_DFIFO_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_15_OFST))
16819 /* The lower bound address range of the ALT_USB1_DFIFO_15 component. */
16820 #define ALT_USB1_DFIFO_15_LB_ADDR ALT_USB1_DFIFO_15_ADDR
16821 /* The upper bound address range of the ALT_USB1_DFIFO_15 component. */
16822 #define ALT_USB1_DFIFO_15_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_15_ADDR) + 0x1000) - 1))
16823 
16824 
16825 /*
16826  * Component Instance : usb1_DFIFO_DA
16827  *
16828  * Instance usb1_DFIFO_DA of component ALT_USB0_DFIFO_DA.
16829  *
16830  *
16831  */
16832 /* The base address byte offset for the start of the ALT_USB1_DFIFO_DA component. */
16833 #define ALT_USB1_DFIFO_DA_OFST 0xffb60000
16834 /* The start address of the ALT_USB1_DFIFO_DA component. */
16835 #define ALT_USB1_DFIFO_DA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DFIFO_DA_OFST))
16836 /* The lower bound address range of the ALT_USB1_DFIFO_DA component. */
16837 #define ALT_USB1_DFIFO_DA_LB_ADDR ALT_USB1_DFIFO_DA_ADDR
16838 /* The upper bound address range of the ALT_USB1_DFIFO_DA component. */
16839 #define ALT_USB1_DFIFO_DA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DFIFO_DA_ADDR) + 0x8000) - 1))
16840 
16841 
16842 /*
16843  * Component Instance : hps_nand_cfg
16844  *
16845  * Instance hps_nand_cfg of component ALT_NAND_CFG.
16846  *
16847  *
16848  */
16849 /* The address of the ALT_NAND_CFG_DEVICE_RESET register for the ALT_HPS_NAND_CFG instance. */
16850 #define ALT_HPS_NAND_CFG_DEVICE_RESET_ADDR ALT_NAND_CFG_DEVICE_RESET_ADDR(ALT_HPS_NAND_CFG_ADDR)
16851 /* The address of the ALT_NAND_CFG_TRANSFER_SPARE_REG register for the ALT_HPS_NAND_CFG instance. */
16852 #define ALT_HPS_NAND_CFG_TRANSFER_SPARE_REG_ADDR ALT_NAND_CFG_TRANSFER_SPARE_REG_ADDR(ALT_HPS_NAND_CFG_ADDR)
16853 /* The address of the ALT_NAND_CFG_LOAD_WAIT_CNT register for the ALT_HPS_NAND_CFG instance. */
16854 #define ALT_HPS_NAND_CFG_LOAD_WAIT_CNT_ADDR ALT_NAND_CFG_LOAD_WAIT_CNT_ADDR(ALT_HPS_NAND_CFG_ADDR)
16855 /* The address of the ALT_NAND_CFG_PROGRAM_WAIT_CNT register for the ALT_HPS_NAND_CFG instance. */
16856 #define ALT_HPS_NAND_CFG_PROGRAM_WAIT_CNT_ADDR ALT_NAND_CFG_PROGRAM_WAIT_CNT_ADDR(ALT_HPS_NAND_CFG_ADDR)
16857 /* The address of the ALT_NAND_CFG_ERASE_WAIT_CNT register for the ALT_HPS_NAND_CFG instance. */
16858 #define ALT_HPS_NAND_CFG_ERASE_WAIT_CNT_ADDR ALT_NAND_CFG_ERASE_WAIT_CNT_ADDR(ALT_HPS_NAND_CFG_ADDR)
16859 /* The address of the ALT_NAND_CFG_INT_MON_CYCCNT register for the ALT_HPS_NAND_CFG instance. */
16860 #define ALT_HPS_NAND_CFG_INT_MON_CYCCNT_ADDR ALT_NAND_CFG_INT_MON_CYCCNT_ADDR(ALT_HPS_NAND_CFG_ADDR)
16861 /* The address of the ALT_NAND_CFG_RB_PIN_ENABLED register for the ALT_HPS_NAND_CFG instance. */
16862 #define ALT_HPS_NAND_CFG_RB_PIN_ENABLED_ADDR ALT_NAND_CFG_RB_PIN_ENABLED_ADDR(ALT_HPS_NAND_CFG_ADDR)
16863 /* The address of the ALT_NAND_CFG_MULTIPLANE_OPERATION register for the ALT_HPS_NAND_CFG instance. */
16864 #define ALT_HPS_NAND_CFG_MULTIPLANE_OPERATION_ADDR ALT_NAND_CFG_MULTIPLANE_OPERATION_ADDR(ALT_HPS_NAND_CFG_ADDR)
16865 /* The address of the ALT_NAND_CFG_MULTIPLANE_READ_ENABLE register for the ALT_HPS_NAND_CFG instance. */
16866 #define ALT_HPS_NAND_CFG_MULTIPLANE_READ_ENABLE_ADDR ALT_NAND_CFG_MULTIPLANE_READ_ENABLE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16867 /* The address of the ALT_NAND_CFG_COPYBACK_DISABLE register for the ALT_HPS_NAND_CFG instance. */
16868 #define ALT_HPS_NAND_CFG_COPYBACK_DISABLE_ADDR ALT_NAND_CFG_COPYBACK_DISABLE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16869 /* The address of the ALT_NAND_CFG_CACHE_WRITE_ENABLE register for the ALT_HPS_NAND_CFG instance. */
16870 #define ALT_HPS_NAND_CFG_CACHE_WRITE_ENABLE_ADDR ALT_NAND_CFG_CACHE_WRITE_ENABLE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16871 /* The address of the ALT_NAND_CFG_CACHE_READ_ENABLE register for the ALT_HPS_NAND_CFG instance. */
16872 #define ALT_HPS_NAND_CFG_CACHE_READ_ENABLE_ADDR ALT_NAND_CFG_CACHE_READ_ENABLE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16873 /* The address of the ALT_NAND_CFG_PREFETCH_MODE register for the ALT_HPS_NAND_CFG instance. */
16874 #define ALT_HPS_NAND_CFG_PREFETCH_MODE_ADDR ALT_NAND_CFG_PREFETCH_MODE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16875 /* The address of the ALT_NAND_CFG_CHIP_ENABLE_DONT_CARE register for the ALT_HPS_NAND_CFG instance. */
16876 #define ALT_HPS_NAND_CFG_CHIP_ENABLE_DONT_CARE_ADDR ALT_NAND_CFG_CHIP_ENABLE_DONT_CARE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16877 /* The address of the ALT_NAND_CFG_ECC_ENABLE register for the ALT_HPS_NAND_CFG instance. */
16878 #define ALT_HPS_NAND_CFG_ECC_ENABLE_ADDR ALT_NAND_CFG_ECC_ENABLE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16879 /* The address of the ALT_NAND_CFG_GLOBAL_INT_ENABLE register for the ALT_HPS_NAND_CFG instance. */
16880 #define ALT_HPS_NAND_CFG_GLOBAL_INT_ENABLE_ADDR ALT_NAND_CFG_GLOBAL_INT_ENABLE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16881 /* The address of the ALT_NAND_CFG_TWHR2_AND_WE_2_RE register for the ALT_HPS_NAND_CFG instance. */
16882 #define ALT_HPS_NAND_CFG_TWHR2_AND_WE_2_RE_ADDR ALT_NAND_CFG_TWHR2_AND_WE_2_RE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16883 /* The address of the ALT_NAND_CFG_TCWAW_AND_ADDR_2_DATA register for the ALT_HPS_NAND_CFG instance. */
16884 #define ALT_HPS_NAND_CFG_TCWAW_AND_ADDR_2_DATA_ADDR ALT_NAND_CFG_TCWAW_AND_ADDR_2_DATA_ADDR(ALT_HPS_NAND_CFG_ADDR)
16885 /* The address of the ALT_NAND_CFG_RE_2_WE register for the ALT_HPS_NAND_CFG instance. */
16886 #define ALT_HPS_NAND_CFG_RE_2_WE_ADDR ALT_NAND_CFG_RE_2_WE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16887 /* The address of the ALT_NAND_CFG_ACC_CLKS register for the ALT_HPS_NAND_CFG instance. */
16888 #define ALT_HPS_NAND_CFG_ACC_CLKS_ADDR ALT_NAND_CFG_ACC_CLKS_ADDR(ALT_HPS_NAND_CFG_ADDR)
16889 /* The address of the ALT_NAND_CFG_NUMBER_OF_PLANES register for the ALT_HPS_NAND_CFG instance. */
16890 #define ALT_HPS_NAND_CFG_NUMBER_OF_PLANES_ADDR ALT_NAND_CFG_NUMBER_OF_PLANES_ADDR(ALT_HPS_NAND_CFG_ADDR)
16891 /* The address of the ALT_NAND_CFG_PAGES_PER_BLOCK register for the ALT_HPS_NAND_CFG instance. */
16892 #define ALT_HPS_NAND_CFG_PAGES_PER_BLOCK_ADDR ALT_NAND_CFG_PAGES_PER_BLOCK_ADDR(ALT_HPS_NAND_CFG_ADDR)
16893 /* The address of the ALT_NAND_CFG_DEVICE_WIDTH register for the ALT_HPS_NAND_CFG instance. */
16894 #define ALT_HPS_NAND_CFG_DEVICE_WIDTH_ADDR ALT_NAND_CFG_DEVICE_WIDTH_ADDR(ALT_HPS_NAND_CFG_ADDR)
16895 /* The address of the ALT_NAND_CFG_DEVICE_MAIN_AREA_SIZE register for the ALT_HPS_NAND_CFG instance. */
16896 #define ALT_HPS_NAND_CFG_DEVICE_MAIN_AREA_SIZE_ADDR ALT_NAND_CFG_DEVICE_MAIN_AREA_SIZE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16897 /* The address of the ALT_NAND_CFG_DEVICE_SPARE_AREA_SIZE register for the ALT_HPS_NAND_CFG instance. */
16898 #define ALT_HPS_NAND_CFG_DEVICE_SPARE_AREA_SIZE_ADDR ALT_NAND_CFG_DEVICE_SPARE_AREA_SIZE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16899 /* The address of the ALT_NAND_CFG_TWO_ROW_ADDR_CYCLES register for the ALT_HPS_NAND_CFG instance. */
16900 #define ALT_HPS_NAND_CFG_TWO_ROW_ADDR_CYCLES_ADDR ALT_NAND_CFG_TWO_ROW_ADDR_CYCLES_ADDR(ALT_HPS_NAND_CFG_ADDR)
16901 /* The address of the ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT register for the ALT_HPS_NAND_CFG instance. */
16902 #define ALT_HPS_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_ADDR ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_ADDR(ALT_HPS_NAND_CFG_ADDR)
16903 /* The address of the ALT_NAND_CFG_ECC_CORRECTION register for the ALT_HPS_NAND_CFG instance. */
16904 #define ALT_HPS_NAND_CFG_ECC_CORRECTION_ADDR ALT_NAND_CFG_ECC_CORRECTION_ADDR(ALT_HPS_NAND_CFG_ADDR)
16905 /* The address of the ALT_NAND_CFG_READ_MODE register for the ALT_HPS_NAND_CFG instance. */
16906 #define ALT_HPS_NAND_CFG_READ_MODE_ADDR ALT_NAND_CFG_READ_MODE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16907 /* The address of the ALT_NAND_CFG_WRITE_MODE register for the ALT_HPS_NAND_CFG instance. */
16908 #define ALT_HPS_NAND_CFG_WRITE_MODE_ADDR ALT_NAND_CFG_WRITE_MODE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16909 /* The address of the ALT_NAND_CFG_COPYBACK_MODE register for the ALT_HPS_NAND_CFG instance. */
16910 #define ALT_HPS_NAND_CFG_COPYBACK_MODE_ADDR ALT_NAND_CFG_COPYBACK_MODE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16911 /* The address of the ALT_NAND_CFG_RDWR_EN_LO_CNT register for the ALT_HPS_NAND_CFG instance. */
16912 #define ALT_HPS_NAND_CFG_RDWR_EN_LO_CNT_ADDR ALT_NAND_CFG_RDWR_EN_LO_CNT_ADDR(ALT_HPS_NAND_CFG_ADDR)
16913 /* The address of the ALT_NAND_CFG_RDWR_EN_HI_CNT register for the ALT_HPS_NAND_CFG instance. */
16914 #define ALT_HPS_NAND_CFG_RDWR_EN_HI_CNT_ADDR ALT_NAND_CFG_RDWR_EN_HI_CNT_ADDR(ALT_HPS_NAND_CFG_ADDR)
16915 /* The address of the ALT_NAND_CFG_MAX_RD_DELAY register for the ALT_HPS_NAND_CFG instance. */
16916 #define ALT_HPS_NAND_CFG_MAX_RD_DELAY_ADDR ALT_NAND_CFG_MAX_RD_DELAY_ADDR(ALT_HPS_NAND_CFG_ADDR)
16917 /* The address of the ALT_NAND_CFG_CS_SETUP_CNT register for the ALT_HPS_NAND_CFG instance. */
16918 #define ALT_HPS_NAND_CFG_CS_SETUP_CNT_ADDR ALT_NAND_CFG_CS_SETUP_CNT_ADDR(ALT_HPS_NAND_CFG_ADDR)
16919 /* The address of the ALT_NAND_CFG_SPARE_AREA_SKIP_BYTES register for the ALT_HPS_NAND_CFG instance. */
16920 #define ALT_HPS_NAND_CFG_SPARE_AREA_SKIP_BYTES_ADDR ALT_NAND_CFG_SPARE_AREA_SKIP_BYTES_ADDR(ALT_HPS_NAND_CFG_ADDR)
16921 /* The address of the ALT_NAND_CFG_SPARE_AREA_MARKER register for the ALT_HPS_NAND_CFG instance. */
16922 #define ALT_HPS_NAND_CFG_SPARE_AREA_MARKER_ADDR ALT_NAND_CFG_SPARE_AREA_MARKER_ADDR(ALT_HPS_NAND_CFG_ADDR)
16923 /* The address of the ALT_NAND_CFG_DEVICES_CONNECTED register for the ALT_HPS_NAND_CFG instance. */
16924 #define ALT_HPS_NAND_CFG_DEVICES_CONNECTED_ADDR ALT_NAND_CFG_DEVICES_CONNECTED_ADDR(ALT_HPS_NAND_CFG_ADDR)
16925 /* The address of the ALT_NAND_CFG_DIE_MASK register for the ALT_HPS_NAND_CFG instance. */
16926 #define ALT_HPS_NAND_CFG_DIE_MASK_ADDR ALT_NAND_CFG_DIE_MASK_ADDR(ALT_HPS_NAND_CFG_ADDR)
16927 /* The address of the ALT_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE register for the ALT_HPS_NAND_CFG instance. */
16928 #define ALT_HPS_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE_ADDR ALT_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16929 /* The address of the ALT_NAND_CFG_WRITE_PROTECT register for the ALT_HPS_NAND_CFG instance. */
16930 #define ALT_HPS_NAND_CFG_WRITE_PROTECT_ADDR ALT_NAND_CFG_WRITE_PROTECT_ADDR(ALT_HPS_NAND_CFG_ADDR)
16931 /* The address of the ALT_NAND_CFG_RE_2_RE register for the ALT_HPS_NAND_CFG instance. */
16932 #define ALT_HPS_NAND_CFG_RE_2_RE_ADDR ALT_NAND_CFG_RE_2_RE_ADDR(ALT_HPS_NAND_CFG_ADDR)
16933 /* The address of the ALT_NAND_CFG_POR_RESET_COUNT register for the ALT_HPS_NAND_CFG instance. */
16934 #define ALT_HPS_NAND_CFG_POR_RESET_COUNT_ADDR ALT_NAND_CFG_POR_RESET_COUNT_ADDR(ALT_HPS_NAND_CFG_ADDR)
16935 /* The address of the ALT_NAND_CFG_WATCHDOG_RESET_COUNT register for the ALT_HPS_NAND_CFG instance. */
16936 #define ALT_HPS_NAND_CFG_WATCHDOG_RESET_COUNT_ADDR ALT_NAND_CFG_WATCHDOG_RESET_COUNT_ADDR(ALT_HPS_NAND_CFG_ADDR)
16937 /* The base address byte offset for the start of the ALT_HPS_NAND_CFG component. */
16938 #define ALT_HPS_NAND_CFG_OFST 0xffb80000
16939 /* The start address of the ALT_HPS_NAND_CFG component. */
16940 #define ALT_HPS_NAND_CFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_HPS_NAND_CFG_OFST))
16941 /* The lower bound address range of the ALT_HPS_NAND_CFG component. */
16942 #define ALT_HPS_NAND_CFG_LB_ADDR ALT_HPS_NAND_CFG_ADDR
16943 /* The upper bound address range of the ALT_HPS_NAND_CFG component. */
16944 #define ALT_HPS_NAND_CFG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_HPS_NAND_CFG_ADDR) + 0x2b4) - 1))
16945 
16946 
16947 /*
16948  * Component Instance : hps_nand_param
16949  *
16950  * Instance hps_nand_param of component ALT_NAND_PARAM.
16951  *
16952  *
16953  */
16954 /* The address of the ALT_NAND_PARAM_MANUFACTURER_ID register for the ALT_HPS_NAND_PARAM instance. */
16955 #define ALT_HPS_NAND_PARAM_MANUFACTURER_ID_ADDR ALT_NAND_PARAM_MANUFACTURER_ID_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16956 /* The address of the ALT_NAND_PARAM_DEVICE_ID register for the ALT_HPS_NAND_PARAM instance. */
16957 #define ALT_HPS_NAND_PARAM_DEVICE_ID_ADDR ALT_NAND_PARAM_DEVICE_ID_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16958 /* The address of the ALT_NAND_PARAM_DEVICE_PARAM_0 register for the ALT_HPS_NAND_PARAM instance. */
16959 #define ALT_HPS_NAND_PARAM_DEVICE_PARAM_0_ADDR ALT_NAND_PARAM_DEVICE_PARAM_0_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16960 /* The address of the ALT_NAND_PARAM_DEVICE_PARAM_1 register for the ALT_HPS_NAND_PARAM instance. */
16961 #define ALT_HPS_NAND_PARAM_DEVICE_PARAM_1_ADDR ALT_NAND_PARAM_DEVICE_PARAM_1_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16962 /* The address of the ALT_NAND_PARAM_DEVICE_PARAM_2 register for the ALT_HPS_NAND_PARAM instance. */
16963 #define ALT_HPS_NAND_PARAM_DEVICE_PARAM_2_ADDR ALT_NAND_PARAM_DEVICE_PARAM_2_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16964 /* The address of the ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE register for the ALT_HPS_NAND_PARAM instance. */
16965 #define ALT_HPS_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE_ADDR ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16966 /* The address of the ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE register for the ALT_HPS_NAND_PARAM instance. */
16967 #define ALT_HPS_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE_ADDR ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16968 /* The address of the ALT_NAND_PARAM_REVISION register for the ALT_HPS_NAND_PARAM instance. */
16969 #define ALT_HPS_NAND_PARAM_REVISION_ADDR ALT_NAND_PARAM_REVISION_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16970 /* The address of the ALT_NAND_PARAM_ONFI_DEVICE_FEATURES register for the ALT_HPS_NAND_PARAM instance. */
16971 #define ALT_HPS_NAND_PARAM_ONFI_DEVICE_FEATURES_ADDR ALT_NAND_PARAM_ONFI_DEVICE_FEATURES_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16972 /* The address of the ALT_NAND_PARAM_ONFI_OPTIONAL_COMMANDS register for the ALT_HPS_NAND_PARAM instance. */
16973 #define ALT_HPS_NAND_PARAM_ONFI_OPTIONAL_COMMANDS_ADDR ALT_NAND_PARAM_ONFI_OPTIONAL_COMMANDS_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16974 /* The address of the ALT_NAND_PARAM_ONFI_TIMING_MODE register for the ALT_HPS_NAND_PARAM instance. */
16975 #define ALT_HPS_NAND_PARAM_ONFI_TIMING_MODE_ADDR ALT_NAND_PARAM_ONFI_TIMING_MODE_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16976 /* The address of the ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MODE register for the ALT_HPS_NAND_PARAM instance. */
16977 #define ALT_HPS_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MODE_ADDR ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MODE_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16978 /* The address of the ALT_NAND_PARAM_ONFI_DEVICE_NO_OF_LUNS register for the ALT_HPS_NAND_PARAM instance. */
16979 #define ALT_HPS_NAND_PARAM_ONFI_DEVICE_NO_OF_LUNS_ADDR ALT_NAND_PARAM_ONFI_DEVICE_NO_OF_LUNS_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16980 /* The address of the ALT_NAND_PARAM_ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L register for the ALT_HPS_NAND_PARAM instance. */
16981 #define ALT_HPS_NAND_PARAM_ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L_ADDR ALT_NAND_PARAM_ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16982 /* The address of the ALT_NAND_PARAM_ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U register for the ALT_HPS_NAND_PARAM instance. */
16983 #define ALT_HPS_NAND_PARAM_ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U_ADDR ALT_NAND_PARAM_ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16984 /* The address of the ALT_NAND_PARAM_FEATURES register for the ALT_HPS_NAND_PARAM instance. */
16985 #define ALT_HPS_NAND_PARAM_FEATURES_ADDR ALT_NAND_PARAM_FEATURES_ADDR(ALT_HPS_NAND_PARAM_ADDR)
16986 /* The base address byte offset for the start of the ALT_HPS_NAND_PARAM component. */
16987 #define ALT_HPS_NAND_PARAM_OFST 0xffb80300
16988 /* The start address of the ALT_HPS_NAND_PARAM component. */
16989 #define ALT_HPS_NAND_PARAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_HPS_NAND_PARAM_OFST))
16990 /* The lower bound address range of the ALT_HPS_NAND_PARAM component. */
16991 #define ALT_HPS_NAND_PARAM_LB_ADDR ALT_HPS_NAND_PARAM_ADDR
16992 /* The upper bound address range of the ALT_HPS_NAND_PARAM component. */
16993 #define ALT_HPS_NAND_PARAM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_HPS_NAND_PARAM_ADDR) + 0xf4) - 1))
16994 
16995 
16996 /*
16997  * Component Instance : hps_nand_status
16998  *
16999  * Instance hps_nand_status of component ALT_NAND_STAT.
17000  *
17001  *
17002  */
17003 /* The address of the ALT_NAND_STAT_TRANSFER_MODE register for the ALT_HPS_NAND_STATUS instance. */
17004 #define ALT_HPS_NAND_STATUS_TRANSFER_MODE_ADDR ALT_NAND_STAT_TRANSFER_MODE_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17005 /* The address of the ALT_NAND_STAT_INTR_STATUS0 register for the ALT_HPS_NAND_STATUS instance. */
17006 #define ALT_HPS_NAND_STATUS_INTR_STATUS0_ADDR ALT_NAND_STAT_INTR_STATUS0_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17007 /* The address of the ALT_NAND_STAT_INTR_EN0 register for the ALT_HPS_NAND_STATUS instance. */
17008 #define ALT_HPS_NAND_STATUS_INTR_EN0_ADDR ALT_NAND_STAT_INTR_EN0_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17009 /* The address of the ALT_NAND_STAT_PAGE_CNT0 register for the ALT_HPS_NAND_STATUS instance. */
17010 #define ALT_HPS_NAND_STATUS_PAGE_CNT0_ADDR ALT_NAND_STAT_PAGE_CNT0_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17011 /* The address of the ALT_NAND_STAT_ERR_PAGE_ADDR0 register for the ALT_HPS_NAND_STATUS instance. */
17012 #define ALT_HPS_NAND_STATUS_ERR_PAGE_ADDR0_ADDR ALT_NAND_STAT_ERR_PAGE_ADDR0_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17013 /* The address of the ALT_NAND_STAT_ERR_BLOCK_ADDR0 register for the ALT_HPS_NAND_STATUS instance. */
17014 #define ALT_HPS_NAND_STATUS_ERR_BLOCK_ADDR0_ADDR ALT_NAND_STAT_ERR_BLOCK_ADDR0_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17015 /* The address of the ALT_NAND_STAT_INTR_STATUS1 register for the ALT_HPS_NAND_STATUS instance. */
17016 #define ALT_HPS_NAND_STATUS_INTR_STATUS1_ADDR ALT_NAND_STAT_INTR_STATUS1_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17017 /* The address of the ALT_NAND_STAT_INTR_EN1 register for the ALT_HPS_NAND_STATUS instance. */
17018 #define ALT_HPS_NAND_STATUS_INTR_EN1_ADDR ALT_NAND_STAT_INTR_EN1_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17019 /* The address of the ALT_NAND_STAT_PAGE_CNT1 register for the ALT_HPS_NAND_STATUS instance. */
17020 #define ALT_HPS_NAND_STATUS_PAGE_CNT1_ADDR ALT_NAND_STAT_PAGE_CNT1_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17021 /* The address of the ALT_NAND_STAT_ERR_PAGE_ADDR1 register for the ALT_HPS_NAND_STATUS instance. */
17022 #define ALT_HPS_NAND_STATUS_ERR_PAGE_ADDR1_ADDR ALT_NAND_STAT_ERR_PAGE_ADDR1_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17023 /* The address of the ALT_NAND_STAT_ERR_BLOCK_ADDR1 register for the ALT_HPS_NAND_STATUS instance. */
17024 #define ALT_HPS_NAND_STATUS_ERR_BLOCK_ADDR1_ADDR ALT_NAND_STAT_ERR_BLOCK_ADDR1_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17025 /* The address of the ALT_NAND_STAT_INTR_STATUS2 register for the ALT_HPS_NAND_STATUS instance. */
17026 #define ALT_HPS_NAND_STATUS_INTR_STATUS2_ADDR ALT_NAND_STAT_INTR_STATUS2_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17027 /* The address of the ALT_NAND_STAT_INTR_EN2 register for the ALT_HPS_NAND_STATUS instance. */
17028 #define ALT_HPS_NAND_STATUS_INTR_EN2_ADDR ALT_NAND_STAT_INTR_EN2_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17029 /* The address of the ALT_NAND_STAT_PAGE_CNT2 register for the ALT_HPS_NAND_STATUS instance. */
17030 #define ALT_HPS_NAND_STATUS_PAGE_CNT2_ADDR ALT_NAND_STAT_PAGE_CNT2_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17031 /* The address of the ALT_NAND_STAT_ERR_PAGE_ADDR2 register for the ALT_HPS_NAND_STATUS instance. */
17032 #define ALT_HPS_NAND_STATUS_ERR_PAGE_ADDR2_ADDR ALT_NAND_STAT_ERR_PAGE_ADDR2_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17033 /* The address of the ALT_NAND_STAT_ERR_BLOCK_ADDR2 register for the ALT_HPS_NAND_STATUS instance. */
17034 #define ALT_HPS_NAND_STATUS_ERR_BLOCK_ADDR2_ADDR ALT_NAND_STAT_ERR_BLOCK_ADDR2_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17035 /* The address of the ALT_NAND_STAT_INTR_STATUS3 register for the ALT_HPS_NAND_STATUS instance. */
17036 #define ALT_HPS_NAND_STATUS_INTR_STATUS3_ADDR ALT_NAND_STAT_INTR_STATUS3_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17037 /* The address of the ALT_NAND_STAT_INTR_EN3 register for the ALT_HPS_NAND_STATUS instance. */
17038 #define ALT_HPS_NAND_STATUS_INTR_EN3_ADDR ALT_NAND_STAT_INTR_EN3_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17039 /* The address of the ALT_NAND_STAT_PAGE_CNT3 register for the ALT_HPS_NAND_STATUS instance. */
17040 #define ALT_HPS_NAND_STATUS_PAGE_CNT3_ADDR ALT_NAND_STAT_PAGE_CNT3_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17041 /* The address of the ALT_NAND_STAT_ERR_PAGE_ADDR3 register for the ALT_HPS_NAND_STATUS instance. */
17042 #define ALT_HPS_NAND_STATUS_ERR_PAGE_ADDR3_ADDR ALT_NAND_STAT_ERR_PAGE_ADDR3_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17043 /* The address of the ALT_NAND_STAT_ERR_BLOCK_ADDR3 register for the ALT_HPS_NAND_STATUS instance. */
17044 #define ALT_HPS_NAND_STATUS_ERR_BLOCK_ADDR3_ADDR ALT_NAND_STAT_ERR_BLOCK_ADDR3_ADDR(ALT_HPS_NAND_STATUS_ADDR)
17045 /* The base address byte offset for the start of the ALT_HPS_NAND_STATUS component. */
17046 #define ALT_HPS_NAND_STATUS_OFST 0xffb80400
17047 /* The start address of the ALT_HPS_NAND_STATUS component. */
17048 #define ALT_HPS_NAND_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_HPS_NAND_STATUS_OFST))
17049 /* The lower bound address range of the ALT_HPS_NAND_STATUS component. */
17050 #define ALT_HPS_NAND_STATUS_LB_ADDR ALT_HPS_NAND_STATUS_ADDR
17051 /* The upper bound address range of the ALT_HPS_NAND_STATUS component. */
17052 #define ALT_HPS_NAND_STATUS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_HPS_NAND_STATUS_ADDR) + 0x144) - 1))
17053 
17054 
17055 /*
17056  * Component Instance : hps_nand_ecc
17057  *
17058  * Instance hps_nand_ecc of component ALT_NAND_ECC.
17059  *
17060  *
17061  */
17062 /* The address of the ALT_NAND_ECC_ECCCORINFO_B01 register for the ALT_HPS_NAND_ECC instance. */
17063 #define ALT_HPS_NAND_ECC_ECCCORINFO_B01_ADDR ALT_NAND_ECC_ECCCORINFO_B01_ADDR(ALT_HPS_NAND_ECC_ADDR)
17064 /* The address of the ALT_NAND_ECC_ECCCORINFO_B23 register for the ALT_HPS_NAND_ECC instance. */
17065 #define ALT_HPS_NAND_ECC_ECCCORINFO_B23_ADDR ALT_NAND_ECC_ECCCORINFO_B23_ADDR(ALT_HPS_NAND_ECC_ADDR)
17066 /* The base address byte offset for the start of the ALT_HPS_NAND_ECC component. */
17067 #define ALT_HPS_NAND_ECC_OFST 0xffb80650
17068 /* The start address of the ALT_HPS_NAND_ECC component. */
17069 #define ALT_HPS_NAND_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_HPS_NAND_ECC_OFST))
17070 /* The lower bound address range of the ALT_HPS_NAND_ECC component. */
17071 #define ALT_HPS_NAND_ECC_LB_ADDR ALT_HPS_NAND_ECC_ADDR
17072 /* The upper bound address range of the ALT_HPS_NAND_ECC component. */
17073 #define ALT_HPS_NAND_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_HPS_NAND_ECC_ADDR) + 0x14) - 1))
17074 
17075 
17076 /*
17077  * Component Instance : hps_nand_dma
17078  *
17079  * Instance hps_nand_dma of component ALT_NAND_DMA.
17080  *
17081  *
17082  */
17083 /* The address of the ALT_NAND_DMA_DMA_ENABLE register for the ALT_HPS_NAND_DMA instance. */
17084 #define ALT_HPS_NAND_DMA_DMA_ENABLE_ADDR ALT_NAND_DMA_DMA_ENABLE_ADDR(ALT_HPS_NAND_DMA_ADDR)
17085 /* The address of the ALT_NAND_DMA_DMA_INTR register for the ALT_HPS_NAND_DMA instance. */
17086 #define ALT_HPS_NAND_DMA_DMA_INTR_ADDR ALT_NAND_DMA_DMA_INTR_ADDR(ALT_HPS_NAND_DMA_ADDR)
17087 /* The address of the ALT_NAND_DMA_DMA_INTR_EN register for the ALT_HPS_NAND_DMA instance. */
17088 #define ALT_HPS_NAND_DMA_DMA_INTR_EN_ADDR ALT_NAND_DMA_DMA_INTR_EN_ADDR(ALT_HPS_NAND_DMA_ADDR)
17089 /* The address of the ALT_NAND_DMA_TARGET_ERR_ADDR_LO register for the ALT_HPS_NAND_DMA instance. */
17090 #define ALT_HPS_NAND_DMA_TARGET_ERR_ADDR_LO_ADDR ALT_NAND_DMA_TARGET_ERR_ADDR_LO_ADDR(ALT_HPS_NAND_DMA_ADDR)
17091 /* The address of the ALT_NAND_DMA_TARGET_ERR_ADDR_HI register for the ALT_HPS_NAND_DMA instance. */
17092 #define ALT_HPS_NAND_DMA_TARGET_ERR_ADDR_HI_ADDR ALT_NAND_DMA_TARGET_ERR_ADDR_HI_ADDR(ALT_HPS_NAND_DMA_ADDR)
17093 /* The address of the ALT_NAND_DMA_CHNL_ACTIVE register for the ALT_HPS_NAND_DMA instance. */
17094 #define ALT_HPS_NAND_DMA_CHNL_ACTIVE_ADDR ALT_NAND_DMA_CHNL_ACTIVE_ADDR(ALT_HPS_NAND_DMA_ADDR)
17095 /* The address of the ALT_NAND_DMA_FLASH_BURST_LENGTH register for the ALT_HPS_NAND_DMA instance. */
17096 #define ALT_HPS_NAND_DMA_FLASH_BURST_LENGTH_ADDR ALT_NAND_DMA_FLASH_BURST_LENGTH_ADDR(ALT_HPS_NAND_DMA_ADDR)
17097 /* The address of the ALT_NAND_DMA_CHIP_INTERLEAVE_ENABLE_AND_ALLOW_INT_READS register for the ALT_HPS_NAND_DMA instance. */
17098 #define ALT_HPS_NAND_DMA_CHIP_INTERLEAVE_ENABLE_AND_ALLOW_INT_READS_ADDR ALT_NAND_DMA_CHIP_INTERLEAVE_ENABLE_AND_ALLOW_INT_READS_ADDR(ALT_HPS_NAND_DMA_ADDR)
17099 /* The address of the ALT_NAND_DMA_RESCAN_BUFFER_FLAG register for the ALT_HPS_NAND_DMA instance. */
17100 #define ALT_HPS_NAND_DMA_RESCAN_BUFFER_FLAG_ADDR ALT_NAND_DMA_RESCAN_BUFFER_FLAG_ADDR(ALT_HPS_NAND_DMA_ADDR)
17101 /* The address of the ALT_NAND_DMA_NO_OF_BLOCKS_PER_LUN register for the ALT_HPS_NAND_DMA instance. */
17102 #define ALT_HPS_NAND_DMA_NO_OF_BLOCKS_PER_LUN_ADDR ALT_NAND_DMA_NO_OF_BLOCKS_PER_LUN_ADDR(ALT_HPS_NAND_DMA_ADDR)
17103 /* The address of the ALT_NAND_DMA_LUN_STATUS_CMD register for the ALT_HPS_NAND_DMA instance. */
17104 #define ALT_HPS_NAND_DMA_LUN_STATUS_CMD_ADDR ALT_NAND_DMA_LUN_STATUS_CMD_ADDR(ALT_HPS_NAND_DMA_ADDR)
17105 /* The address of the ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR register for the ALT_HPS_NAND_DMA instance. */
17106 #define ALT_HPS_NAND_DMA_CMD_DMA_CHANNEL_ERROR_ADDR ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_ADDR(ALT_HPS_NAND_DMA_ADDR)
17107 /* The address of the ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_EN register for the ALT_HPS_NAND_DMA instance. */
17108 #define ALT_HPS_NAND_DMA_CMD_DMA_CHANNEL_ERROR_EN_ADDR ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_EN_ADDR(ALT_HPS_NAND_DMA_ADDR)
17109 /* The base address byte offset for the start of the ALT_HPS_NAND_DMA component. */
17110 #define ALT_HPS_NAND_DMA_OFST 0xffb80700
17111 /* The start address of the ALT_HPS_NAND_DMA component. */
17112 #define ALT_HPS_NAND_DMA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_HPS_NAND_DMA_OFST))
17113 /* The lower bound address range of the ALT_HPS_NAND_DMA component. */
17114 #define ALT_HPS_NAND_DMA_LB_ADDR ALT_HPS_NAND_DMA_ADDR
17115 /* The upper bound address range of the ALT_HPS_NAND_DMA component. */
17116 #define ALT_HPS_NAND_DMA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_HPS_NAND_DMA_ADDR) + 0xd4) - 1))
17117 
17118 
17119 /*
17120  * Component Instance : hps_nand_data
17121  *
17122  * Instance hps_nand_data of component ALT_NAND_DATA.
17123  *
17124  *
17125  */
17126 /* The base address byte offset for the start of the ALT_HPS_NAND_DATA component. */
17127 #define ALT_HPS_NAND_DATA_OFST 0xffb90000
17128 /* The start address of the ALT_HPS_NAND_DATA component. */
17129 #define ALT_HPS_NAND_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_HPS_NAND_DATA_OFST))
17130 /* The lower bound address range of the ALT_HPS_NAND_DATA component. */
17131 #define ALT_HPS_NAND_DATA_LB_ADDR ALT_HPS_NAND_DATA_ADDR
17132 /* The upper bound address range of the ALT_HPS_NAND_DATA component. */
17133 #define ALT_HPS_NAND_DATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_HPS_NAND_DATA_ADDR) + 0x10000) - 1))
17134 
17135 
17136 /*
17137  * Component Instance : uart0
17138  *
17139  * Instance uart0 of component ALT_UART.
17140  *
17141  *
17142  */
17143 /* The address of the ALT_UART_RBR register for the ALT_UART0 instance. */
17144 #define ALT_UART0_RBR_ADDR ALT_UART_RBR_ADDR(ALT_UART0_ADDR)
17145 /* The address of the ALT_UART_IER register for the ALT_UART0 instance. */
17146 #define ALT_UART0_IER_ADDR ALT_UART_IER_ADDR(ALT_UART0_ADDR)
17147 /* The address of the ALT_UART_IIR register for the ALT_UART0 instance. */
17148 #define ALT_UART0_IIR_ADDR ALT_UART_IIR_ADDR(ALT_UART0_ADDR)
17149 /* The address of the ALT_UART_LCR register for the ALT_UART0 instance. */
17150 #define ALT_UART0_LCR_ADDR ALT_UART_LCR_ADDR(ALT_UART0_ADDR)
17151 /* The address of the ALT_UART_MCR register for the ALT_UART0 instance. */
17152 #define ALT_UART0_MCR_ADDR ALT_UART_MCR_ADDR(ALT_UART0_ADDR)
17153 /* The address of the ALT_UART_LSR register for the ALT_UART0 instance. */
17154 #define ALT_UART0_LSR_ADDR ALT_UART_LSR_ADDR(ALT_UART0_ADDR)
17155 /* The address of the ALT_UART_MSR register for the ALT_UART0 instance. */
17156 #define ALT_UART0_MSR_ADDR ALT_UART_MSR_ADDR(ALT_UART0_ADDR)
17157 /* The address of the ALT_UART_SCR register for the ALT_UART0 instance. */
17158 #define ALT_UART0_SCR_ADDR ALT_UART_SCR_ADDR(ALT_UART0_ADDR)
17159 /* The address of the ALT_UART_SRBR0 register for the ALT_UART0 instance. */
17160 #define ALT_UART0_SRBR0_ADDR ALT_UART_SRBR0_ADDR(ALT_UART0_ADDR)
17161 /* The address of the ALT_UART_SRBR1 register for the ALT_UART0 instance. */
17162 #define ALT_UART0_SRBR1_ADDR ALT_UART_SRBR1_ADDR(ALT_UART0_ADDR)
17163 /* The address of the ALT_UART_SRBR2 register for the ALT_UART0 instance. */
17164 #define ALT_UART0_SRBR2_ADDR ALT_UART_SRBR2_ADDR(ALT_UART0_ADDR)
17165 /* The address of the ALT_UART_SRBR3 register for the ALT_UART0 instance. */
17166 #define ALT_UART0_SRBR3_ADDR ALT_UART_SRBR3_ADDR(ALT_UART0_ADDR)
17167 /* The address of the ALT_UART_SRBR4 register for the ALT_UART0 instance. */
17168 #define ALT_UART0_SRBR4_ADDR ALT_UART_SRBR4_ADDR(ALT_UART0_ADDR)
17169 /* The address of the ALT_UART_SRBR5 register for the ALT_UART0 instance. */
17170 #define ALT_UART0_SRBR5_ADDR ALT_UART_SRBR5_ADDR(ALT_UART0_ADDR)
17171 /* The address of the ALT_UART_SRBR6 register for the ALT_UART0 instance. */
17172 #define ALT_UART0_SRBR6_ADDR ALT_UART_SRBR6_ADDR(ALT_UART0_ADDR)
17173 /* The address of the ALT_UART_SRBR7 register for the ALT_UART0 instance. */
17174 #define ALT_UART0_SRBR7_ADDR ALT_UART_SRBR7_ADDR(ALT_UART0_ADDR)
17175 /* The address of the ALT_UART_SRBR8 register for the ALT_UART0 instance. */
17176 #define ALT_UART0_SRBR8_ADDR ALT_UART_SRBR8_ADDR(ALT_UART0_ADDR)
17177 /* The address of the ALT_UART_SRBR9 register for the ALT_UART0 instance. */
17178 #define ALT_UART0_SRBR9_ADDR ALT_UART_SRBR9_ADDR(ALT_UART0_ADDR)
17179 /* The address of the ALT_UART_SRBR10 register for the ALT_UART0 instance. */
17180 #define ALT_UART0_SRBR10_ADDR ALT_UART_SRBR10_ADDR(ALT_UART0_ADDR)
17181 /* The address of the ALT_UART_SRBR11 register for the ALT_UART0 instance. */
17182 #define ALT_UART0_SRBR11_ADDR ALT_UART_SRBR11_ADDR(ALT_UART0_ADDR)
17183 /* The address of the ALT_UART_SRBR12 register for the ALT_UART0 instance. */
17184 #define ALT_UART0_SRBR12_ADDR ALT_UART_SRBR12_ADDR(ALT_UART0_ADDR)
17185 /* The address of the ALT_UART_SRBR13 register for the ALT_UART0 instance. */
17186 #define ALT_UART0_SRBR13_ADDR ALT_UART_SRBR13_ADDR(ALT_UART0_ADDR)
17187 /* The address of the ALT_UART_SRBR14 register for the ALT_UART0 instance. */
17188 #define ALT_UART0_SRBR14_ADDR ALT_UART_SRBR14_ADDR(ALT_UART0_ADDR)
17189 /* The address of the ALT_UART_SRBR15 register for the ALT_UART0 instance. */
17190 #define ALT_UART0_SRBR15_ADDR ALT_UART_SRBR15_ADDR(ALT_UART0_ADDR)
17191 /* The address of the ALT_UART_FAR register for the ALT_UART0 instance. */
17192 #define ALT_UART0_FAR_ADDR ALT_UART_FAR_ADDR(ALT_UART0_ADDR)
17193 /* The address of the ALT_UART_TFR register for the ALT_UART0 instance. */
17194 #define ALT_UART0_TFR_ADDR ALT_UART_TFR_ADDR(ALT_UART0_ADDR)
17195 /* The address of the ALT_UART_RFW register for the ALT_UART0 instance. */
17196 #define ALT_UART0_RFW_ADDR ALT_UART_RFW_ADDR(ALT_UART0_ADDR)
17197 /* The address of the ALT_UART_USR register for the ALT_UART0 instance. */
17198 #define ALT_UART0_USR_ADDR ALT_UART_USR_ADDR(ALT_UART0_ADDR)
17199 /* The address of the ALT_UART_TFL register for the ALT_UART0 instance. */
17200 #define ALT_UART0_TFL_ADDR ALT_UART_TFL_ADDR(ALT_UART0_ADDR)
17201 /* The address of the ALT_UART_RFL register for the ALT_UART0 instance. */
17202 #define ALT_UART0_RFL_ADDR ALT_UART_RFL_ADDR(ALT_UART0_ADDR)
17203 /* The address of the ALT_UART_SRR register for the ALT_UART0 instance. */
17204 #define ALT_UART0_SRR_ADDR ALT_UART_SRR_ADDR(ALT_UART0_ADDR)
17205 /* The address of the ALT_UART_SRTS register for the ALT_UART0 instance. */
17206 #define ALT_UART0_SRTS_ADDR ALT_UART_SRTS_ADDR(ALT_UART0_ADDR)
17207 /* The address of the ALT_UART_SBCR register for the ALT_UART0 instance. */
17208 #define ALT_UART0_SBCR_ADDR ALT_UART_SBCR_ADDR(ALT_UART0_ADDR)
17209 /* The address of the ALT_UART_SDMAM register for the ALT_UART0 instance. */
17210 #define ALT_UART0_SDMAM_ADDR ALT_UART_SDMAM_ADDR(ALT_UART0_ADDR)
17211 /* The address of the ALT_UART_SFE register for the ALT_UART0 instance. */
17212 #define ALT_UART0_SFE_ADDR ALT_UART_SFE_ADDR(ALT_UART0_ADDR)
17213 /* The address of the ALT_UART_SRT register for the ALT_UART0 instance. */
17214 #define ALT_UART0_SRT_ADDR ALT_UART_SRT_ADDR(ALT_UART0_ADDR)
17215 /* The address of the ALT_UART_STET register for the ALT_UART0 instance. */
17216 #define ALT_UART0_STET_ADDR ALT_UART_STET_ADDR(ALT_UART0_ADDR)
17217 /* The address of the ALT_UART_HTX register for the ALT_UART0 instance. */
17218 #define ALT_UART0_HTX_ADDR ALT_UART_HTX_ADDR(ALT_UART0_ADDR)
17219 /* The address of the ALT_UART_DMASA register for the ALT_UART0 instance. */
17220 #define ALT_UART0_DMASA_ADDR ALT_UART_DMASA_ADDR(ALT_UART0_ADDR)
17221 /* The address of the ALT_UART_CPR register for the ALT_UART0 instance. */
17222 #define ALT_UART0_CPR_ADDR ALT_UART_CPR_ADDR(ALT_UART0_ADDR)
17223 /* The address of the ALT_UART_UCV register for the ALT_UART0 instance. */
17224 #define ALT_UART0_UCV_ADDR ALT_UART_UCV_ADDR(ALT_UART0_ADDR)
17225 /* The address of the ALT_UART_CTR register for the ALT_UART0 instance. */
17226 #define ALT_UART0_CTR_ADDR ALT_UART_CTR_ADDR(ALT_UART0_ADDR)
17227 /* The base address byte offset for the start of the ALT_UART0 component. */
17228 #define ALT_UART0_OFST 0xffc02000
17229 /* The start address of the ALT_UART0 component. */
17230 #define ALT_UART0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_UART0_OFST))
17231 /* The lower bound address range of the ALT_UART0 component. */
17232 #define ALT_UART0_LB_ADDR ALT_UART0_ADDR
17233 /* The upper bound address range of the ALT_UART0 component. */
17234 #define ALT_UART0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_UART0_ADDR) + 0x100) - 1))
17235 
17236 
17237 /*
17238  * Component Instance : uart1
17239  *
17240  * Instance uart1 of component ALT_UART.
17241  *
17242  *
17243  */
17244 /* The address of the ALT_UART_RBR register for the ALT_UART1 instance. */
17245 #define ALT_UART1_RBR_ADDR ALT_UART_RBR_ADDR(ALT_UART1_ADDR)
17246 /* The address of the ALT_UART_IER register for the ALT_UART1 instance. */
17247 #define ALT_UART1_IER_ADDR ALT_UART_IER_ADDR(ALT_UART1_ADDR)
17248 /* The address of the ALT_UART_IIR register for the ALT_UART1 instance. */
17249 #define ALT_UART1_IIR_ADDR ALT_UART_IIR_ADDR(ALT_UART1_ADDR)
17250 /* The address of the ALT_UART_LCR register for the ALT_UART1 instance. */
17251 #define ALT_UART1_LCR_ADDR ALT_UART_LCR_ADDR(ALT_UART1_ADDR)
17252 /* The address of the ALT_UART_MCR register for the ALT_UART1 instance. */
17253 #define ALT_UART1_MCR_ADDR ALT_UART_MCR_ADDR(ALT_UART1_ADDR)
17254 /* The address of the ALT_UART_LSR register for the ALT_UART1 instance. */
17255 #define ALT_UART1_LSR_ADDR ALT_UART_LSR_ADDR(ALT_UART1_ADDR)
17256 /* The address of the ALT_UART_MSR register for the ALT_UART1 instance. */
17257 #define ALT_UART1_MSR_ADDR ALT_UART_MSR_ADDR(ALT_UART1_ADDR)
17258 /* The address of the ALT_UART_SCR register for the ALT_UART1 instance. */
17259 #define ALT_UART1_SCR_ADDR ALT_UART_SCR_ADDR(ALT_UART1_ADDR)
17260 /* The address of the ALT_UART_SRBR0 register for the ALT_UART1 instance. */
17261 #define ALT_UART1_SRBR0_ADDR ALT_UART_SRBR0_ADDR(ALT_UART1_ADDR)
17262 /* The address of the ALT_UART_SRBR1 register for the ALT_UART1 instance. */
17263 #define ALT_UART1_SRBR1_ADDR ALT_UART_SRBR1_ADDR(ALT_UART1_ADDR)
17264 /* The address of the ALT_UART_SRBR2 register for the ALT_UART1 instance. */
17265 #define ALT_UART1_SRBR2_ADDR ALT_UART_SRBR2_ADDR(ALT_UART1_ADDR)
17266 /* The address of the ALT_UART_SRBR3 register for the ALT_UART1 instance. */
17267 #define ALT_UART1_SRBR3_ADDR ALT_UART_SRBR3_ADDR(ALT_UART1_ADDR)
17268 /* The address of the ALT_UART_SRBR4 register for the ALT_UART1 instance. */
17269 #define ALT_UART1_SRBR4_ADDR ALT_UART_SRBR4_ADDR(ALT_UART1_ADDR)
17270 /* The address of the ALT_UART_SRBR5 register for the ALT_UART1 instance. */
17271 #define ALT_UART1_SRBR5_ADDR ALT_UART_SRBR5_ADDR(ALT_UART1_ADDR)
17272 /* The address of the ALT_UART_SRBR6 register for the ALT_UART1 instance. */
17273 #define ALT_UART1_SRBR6_ADDR ALT_UART_SRBR6_ADDR(ALT_UART1_ADDR)
17274 /* The address of the ALT_UART_SRBR7 register for the ALT_UART1 instance. */
17275 #define ALT_UART1_SRBR7_ADDR ALT_UART_SRBR7_ADDR(ALT_UART1_ADDR)
17276 /* The address of the ALT_UART_SRBR8 register for the ALT_UART1 instance. */
17277 #define ALT_UART1_SRBR8_ADDR ALT_UART_SRBR8_ADDR(ALT_UART1_ADDR)
17278 /* The address of the ALT_UART_SRBR9 register for the ALT_UART1 instance. */
17279 #define ALT_UART1_SRBR9_ADDR ALT_UART_SRBR9_ADDR(ALT_UART1_ADDR)
17280 /* The address of the ALT_UART_SRBR10 register for the ALT_UART1 instance. */
17281 #define ALT_UART1_SRBR10_ADDR ALT_UART_SRBR10_ADDR(ALT_UART1_ADDR)
17282 /* The address of the ALT_UART_SRBR11 register for the ALT_UART1 instance. */
17283 #define ALT_UART1_SRBR11_ADDR ALT_UART_SRBR11_ADDR(ALT_UART1_ADDR)
17284 /* The address of the ALT_UART_SRBR12 register for the ALT_UART1 instance. */
17285 #define ALT_UART1_SRBR12_ADDR ALT_UART_SRBR12_ADDR(ALT_UART1_ADDR)
17286 /* The address of the ALT_UART_SRBR13 register for the ALT_UART1 instance. */
17287 #define ALT_UART1_SRBR13_ADDR ALT_UART_SRBR13_ADDR(ALT_UART1_ADDR)
17288 /* The address of the ALT_UART_SRBR14 register for the ALT_UART1 instance. */
17289 #define ALT_UART1_SRBR14_ADDR ALT_UART_SRBR14_ADDR(ALT_UART1_ADDR)
17290 /* The address of the ALT_UART_SRBR15 register for the ALT_UART1 instance. */
17291 #define ALT_UART1_SRBR15_ADDR ALT_UART_SRBR15_ADDR(ALT_UART1_ADDR)
17292 /* The address of the ALT_UART_FAR register for the ALT_UART1 instance. */
17293 #define ALT_UART1_FAR_ADDR ALT_UART_FAR_ADDR(ALT_UART1_ADDR)
17294 /* The address of the ALT_UART_TFR register for the ALT_UART1 instance. */
17295 #define ALT_UART1_TFR_ADDR ALT_UART_TFR_ADDR(ALT_UART1_ADDR)
17296 /* The address of the ALT_UART_RFW register for the ALT_UART1 instance. */
17297 #define ALT_UART1_RFW_ADDR ALT_UART_RFW_ADDR(ALT_UART1_ADDR)
17298 /* The address of the ALT_UART_USR register for the ALT_UART1 instance. */
17299 #define ALT_UART1_USR_ADDR ALT_UART_USR_ADDR(ALT_UART1_ADDR)
17300 /* The address of the ALT_UART_TFL register for the ALT_UART1 instance. */
17301 #define ALT_UART1_TFL_ADDR ALT_UART_TFL_ADDR(ALT_UART1_ADDR)
17302 /* The address of the ALT_UART_RFL register for the ALT_UART1 instance. */
17303 #define ALT_UART1_RFL_ADDR ALT_UART_RFL_ADDR(ALT_UART1_ADDR)
17304 /* The address of the ALT_UART_SRR register for the ALT_UART1 instance. */
17305 #define ALT_UART1_SRR_ADDR ALT_UART_SRR_ADDR(ALT_UART1_ADDR)
17306 /* The address of the ALT_UART_SRTS register for the ALT_UART1 instance. */
17307 #define ALT_UART1_SRTS_ADDR ALT_UART_SRTS_ADDR(ALT_UART1_ADDR)
17308 /* The address of the ALT_UART_SBCR register for the ALT_UART1 instance. */
17309 #define ALT_UART1_SBCR_ADDR ALT_UART_SBCR_ADDR(ALT_UART1_ADDR)
17310 /* The address of the ALT_UART_SDMAM register for the ALT_UART1 instance. */
17311 #define ALT_UART1_SDMAM_ADDR ALT_UART_SDMAM_ADDR(ALT_UART1_ADDR)
17312 /* The address of the ALT_UART_SFE register for the ALT_UART1 instance. */
17313 #define ALT_UART1_SFE_ADDR ALT_UART_SFE_ADDR(ALT_UART1_ADDR)
17314 /* The address of the ALT_UART_SRT register for the ALT_UART1 instance. */
17315 #define ALT_UART1_SRT_ADDR ALT_UART_SRT_ADDR(ALT_UART1_ADDR)
17316 /* The address of the ALT_UART_STET register for the ALT_UART1 instance. */
17317 #define ALT_UART1_STET_ADDR ALT_UART_STET_ADDR(ALT_UART1_ADDR)
17318 /* The address of the ALT_UART_HTX register for the ALT_UART1 instance. */
17319 #define ALT_UART1_HTX_ADDR ALT_UART_HTX_ADDR(ALT_UART1_ADDR)
17320 /* The address of the ALT_UART_DMASA register for the ALT_UART1 instance. */
17321 #define ALT_UART1_DMASA_ADDR ALT_UART_DMASA_ADDR(ALT_UART1_ADDR)
17322 /* The address of the ALT_UART_CPR register for the ALT_UART1 instance. */
17323 #define ALT_UART1_CPR_ADDR ALT_UART_CPR_ADDR(ALT_UART1_ADDR)
17324 /* The address of the ALT_UART_UCV register for the ALT_UART1 instance. */
17325 #define ALT_UART1_UCV_ADDR ALT_UART_UCV_ADDR(ALT_UART1_ADDR)
17326 /* The address of the ALT_UART_CTR register for the ALT_UART1 instance. */
17327 #define ALT_UART1_CTR_ADDR ALT_UART_CTR_ADDR(ALT_UART1_ADDR)
17328 /* The base address byte offset for the start of the ALT_UART1 component. */
17329 #define ALT_UART1_OFST 0xffc02100
17330 /* The start address of the ALT_UART1 component. */
17331 #define ALT_UART1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_UART1_OFST))
17332 /* The lower bound address range of the ALT_UART1 component. */
17333 #define ALT_UART1_LB_ADDR ALT_UART1_ADDR
17334 /* The upper bound address range of the ALT_UART1 component. */
17335 #define ALT_UART1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_UART1_ADDR) + 0x100) - 1))
17336 
17337 
17338 /*
17339  * Component Instance : i2c0
17340  *
17341  * Instance i2c0 of component ALT_I2C.
17342  *
17343  *
17344  */
17345 /* The address of the ALT_I2C_IC_CON register for the ALT_I2C0 instance. */
17346 #define ALT_I2C0_IC_CON_ADDR ALT_I2C_IC_CON_ADDR(ALT_I2C0_ADDR)
17347 /* The address of the ALT_I2C_IC_TAR register for the ALT_I2C0 instance. */
17348 #define ALT_I2C0_IC_TAR_ADDR ALT_I2C_IC_TAR_ADDR(ALT_I2C0_ADDR)
17349 /* The address of the ALT_I2C_IC_SAR register for the ALT_I2C0 instance. */
17350 #define ALT_I2C0_IC_SAR_ADDR ALT_I2C_IC_SAR_ADDR(ALT_I2C0_ADDR)
17351 /* The address of the ALT_I2C_IC_DATA_CMD register for the ALT_I2C0 instance. */
17352 #define ALT_I2C0_IC_DATA_CMD_ADDR ALT_I2C_IC_DATA_CMD_ADDR(ALT_I2C0_ADDR)
17353 /* The address of the ALT_I2C_IC_SS_SCL_HCNT register for the ALT_I2C0 instance. */
17354 #define ALT_I2C0_IC_SS_SCL_HCNT_ADDR ALT_I2C_IC_SS_SCL_HCNT_ADDR(ALT_I2C0_ADDR)
17355 /* The address of the ALT_I2C_IC_SS_SCL_LCNT register for the ALT_I2C0 instance. */
17356 #define ALT_I2C0_IC_SS_SCL_LCNT_ADDR ALT_I2C_IC_SS_SCL_LCNT_ADDR(ALT_I2C0_ADDR)
17357 /* The address of the ALT_I2C_IC_FS_SCL_HCNT register for the ALT_I2C0 instance. */
17358 #define ALT_I2C0_IC_FS_SCL_HCNT_ADDR ALT_I2C_IC_FS_SCL_HCNT_ADDR(ALT_I2C0_ADDR)
17359 /* The address of the ALT_I2C_IC_FS_SCL_LCNT register for the ALT_I2C0 instance. */
17360 #define ALT_I2C0_IC_FS_SCL_LCNT_ADDR ALT_I2C_IC_FS_SCL_LCNT_ADDR(ALT_I2C0_ADDR)
17361 /* The address of the ALT_I2C_IC_INTR_STAT register for the ALT_I2C0 instance. */
17362 #define ALT_I2C0_IC_INTR_STAT_ADDR ALT_I2C_IC_INTR_STAT_ADDR(ALT_I2C0_ADDR)
17363 /* The address of the ALT_I2C_IC_INTR_MASK register for the ALT_I2C0 instance. */
17364 #define ALT_I2C0_IC_INTR_MASK_ADDR ALT_I2C_IC_INTR_MASK_ADDR(ALT_I2C0_ADDR)
17365 /* The address of the ALT_I2C_IC_RAW_INTR_STAT register for the ALT_I2C0 instance. */
17366 #define ALT_I2C0_IC_RAW_INTR_STAT_ADDR ALT_I2C_IC_RAW_INTR_STAT_ADDR(ALT_I2C0_ADDR)
17367 /* The address of the ALT_I2C_IC_RX_TL register for the ALT_I2C0 instance. */
17368 #define ALT_I2C0_IC_RX_TL_ADDR ALT_I2C_IC_RX_TL_ADDR(ALT_I2C0_ADDR)
17369 /* The address of the ALT_I2C_IC_TX_TL register for the ALT_I2C0 instance. */
17370 #define ALT_I2C0_IC_TX_TL_ADDR ALT_I2C_IC_TX_TL_ADDR(ALT_I2C0_ADDR)
17371 /* The address of the ALT_I2C_IC_CLR_INTR register for the ALT_I2C0 instance. */
17372 #define ALT_I2C0_IC_CLR_INTR_ADDR ALT_I2C_IC_CLR_INTR_ADDR(ALT_I2C0_ADDR)
17373 /* The address of the ALT_I2C_IC_CLR_RX_UNDER register for the ALT_I2C0 instance. */
17374 #define ALT_I2C0_IC_CLR_RX_UNDER_ADDR ALT_I2C_IC_CLR_RX_UNDER_ADDR(ALT_I2C0_ADDR)
17375 /* The address of the ALT_I2C_IC_CLR_RX_OVER register for the ALT_I2C0 instance. */
17376 #define ALT_I2C0_IC_CLR_RX_OVER_ADDR ALT_I2C_IC_CLR_RX_OVER_ADDR(ALT_I2C0_ADDR)
17377 /* The address of the ALT_I2C_IC_CLR_TX_OVER register for the ALT_I2C0 instance. */
17378 #define ALT_I2C0_IC_CLR_TX_OVER_ADDR ALT_I2C_IC_CLR_TX_OVER_ADDR(ALT_I2C0_ADDR)
17379 /* The address of the ALT_I2C_IC_CLR_RD_REQ register for the ALT_I2C0 instance. */
17380 #define ALT_I2C0_IC_CLR_RD_REQ_ADDR ALT_I2C_IC_CLR_RD_REQ_ADDR(ALT_I2C0_ADDR)
17381 /* The address of the ALT_I2C_IC_CLR_TX_ABRT register for the ALT_I2C0 instance. */
17382 #define ALT_I2C0_IC_CLR_TX_ABRT_ADDR ALT_I2C_IC_CLR_TX_ABRT_ADDR(ALT_I2C0_ADDR)
17383 /* The address of the ALT_I2C_IC_CLR_RX_DONE register for the ALT_I2C0 instance. */
17384 #define ALT_I2C0_IC_CLR_RX_DONE_ADDR ALT_I2C_IC_CLR_RX_DONE_ADDR(ALT_I2C0_ADDR)
17385 /* The address of the ALT_I2C_IC_CLR_ACTIVITY register for the ALT_I2C0 instance. */
17386 #define ALT_I2C0_IC_CLR_ACTIVITY_ADDR ALT_I2C_IC_CLR_ACTIVITY_ADDR(ALT_I2C0_ADDR)
17387 /* The address of the ALT_I2C_IC_CLR_STOP_DET register for the ALT_I2C0 instance. */
17388 #define ALT_I2C0_IC_CLR_STOP_DET_ADDR ALT_I2C_IC_CLR_STOP_DET_ADDR(ALT_I2C0_ADDR)
17389 /* The address of the ALT_I2C_IC_CLR_START_DET register for the ALT_I2C0 instance. */
17390 #define ALT_I2C0_IC_CLR_START_DET_ADDR ALT_I2C_IC_CLR_START_DET_ADDR(ALT_I2C0_ADDR)
17391 /* The address of the ALT_I2C_IC_CLR_GEN_CALL register for the ALT_I2C0 instance. */
17392 #define ALT_I2C0_IC_CLR_GEN_CALL_ADDR ALT_I2C_IC_CLR_GEN_CALL_ADDR(ALT_I2C0_ADDR)
17393 /* The address of the ALT_I2C_IC_ENABLE register for the ALT_I2C0 instance. */
17394 #define ALT_I2C0_IC_ENABLE_ADDR ALT_I2C_IC_ENABLE_ADDR(ALT_I2C0_ADDR)
17395 /* The address of the ALT_I2C_IC_STATUS register for the ALT_I2C0 instance. */
17396 #define ALT_I2C0_IC_STATUS_ADDR ALT_I2C_IC_STATUS_ADDR(ALT_I2C0_ADDR)
17397 /* The address of the ALT_I2C_IC_TXFLR register for the ALT_I2C0 instance. */
17398 #define ALT_I2C0_IC_TXFLR_ADDR ALT_I2C_IC_TXFLR_ADDR(ALT_I2C0_ADDR)
17399 /* The address of the ALT_I2C_IC_RXFLR register for the ALT_I2C0 instance. */
17400 #define ALT_I2C0_IC_RXFLR_ADDR ALT_I2C_IC_RXFLR_ADDR(ALT_I2C0_ADDR)
17401 /* The address of the ALT_I2C_IC_SDA_HOLD register for the ALT_I2C0 instance. */
17402 #define ALT_I2C0_IC_SDA_HOLD_ADDR ALT_I2C_IC_SDA_HOLD_ADDR(ALT_I2C0_ADDR)
17403 /* The address of the ALT_I2C_IC_TX_ABRT_SOURCE register for the ALT_I2C0 instance. */
17404 #define ALT_I2C0_IC_TX_ABRT_SOURCE_ADDR ALT_I2C_IC_TX_ABRT_SOURCE_ADDR(ALT_I2C0_ADDR)
17405 /* The address of the ALT_I2C_IC_SLV_DATA_NACK_ONLY register for the ALT_I2C0 instance. */
17406 #define ALT_I2C0_IC_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_IC_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C0_ADDR)
17407 /* The address of the ALT_I2C_IC_DMA_CR register for the ALT_I2C0 instance. */
17408 #define ALT_I2C0_IC_DMA_CR_ADDR ALT_I2C_IC_DMA_CR_ADDR(ALT_I2C0_ADDR)
17409 /* The address of the ALT_I2C_IC_DMA_TDLR register for the ALT_I2C0 instance. */
17410 #define ALT_I2C0_IC_DMA_TDLR_ADDR ALT_I2C_IC_DMA_TDLR_ADDR(ALT_I2C0_ADDR)
17411 /* The address of the ALT_I2C_IC_DMA_RDLR register for the ALT_I2C0 instance. */
17412 #define ALT_I2C0_IC_DMA_RDLR_ADDR ALT_I2C_IC_DMA_RDLR_ADDR(ALT_I2C0_ADDR)
17413 /* The address of the ALT_I2C_IC_SDA_SETUP register for the ALT_I2C0 instance. */
17414 #define ALT_I2C0_IC_SDA_SETUP_ADDR ALT_I2C_IC_SDA_SETUP_ADDR(ALT_I2C0_ADDR)
17415 /* The address of the ALT_I2C_IC_ACK_GENERAL_CALL register for the ALT_I2C0 instance. */
17416 #define ALT_I2C0_IC_ACK_GENERAL_CALL_ADDR ALT_I2C_IC_ACK_GENERAL_CALL_ADDR(ALT_I2C0_ADDR)
17417 /* The address of the ALT_I2C_IC_ENABLE_STATUS register for the ALT_I2C0 instance. */
17418 #define ALT_I2C0_IC_ENABLE_STATUS_ADDR ALT_I2C_IC_ENABLE_STATUS_ADDR(ALT_I2C0_ADDR)
17419 /* The address of the ALT_I2C_IC_FS_SPKLEN register for the ALT_I2C0 instance. */
17420 #define ALT_I2C0_IC_FS_SPKLEN_ADDR ALT_I2C_IC_FS_SPKLEN_ADDR(ALT_I2C0_ADDR)
17421 /* The address of the ALT_I2C_IC_CLR_RESTART_DET register for the ALT_I2C0 instance. */
17422 #define ALT_I2C0_IC_CLR_RESTART_DET_ADDR ALT_I2C_IC_CLR_RESTART_DET_ADDR(ALT_I2C0_ADDR)
17423 /* The address of the ALT_I2C_IC_COMP_PARAM_1 register for the ALT_I2C0 instance. */
17424 #define ALT_I2C0_IC_COMP_PARAM_1_ADDR ALT_I2C_IC_COMP_PARAM_1_ADDR(ALT_I2C0_ADDR)
17425 /* The address of the ALT_I2C_IC_COMP_VERSION register for the ALT_I2C0 instance. */
17426 #define ALT_I2C0_IC_COMP_VERSION_ADDR ALT_I2C_IC_COMP_VERSION_ADDR(ALT_I2C0_ADDR)
17427 /* The address of the ALT_I2C_IC_COMP_TYPE register for the ALT_I2C0 instance. */
17428 #define ALT_I2C0_IC_COMP_TYPE_ADDR ALT_I2C_IC_COMP_TYPE_ADDR(ALT_I2C0_ADDR)
17429 /* The base address byte offset for the start of the ALT_I2C0 component. */
17430 #define ALT_I2C0_OFST 0xffc02800
17431 /* The start address of the ALT_I2C0 component. */
17432 #define ALT_I2C0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C0_OFST))
17433 /* The lower bound address range of the ALT_I2C0 component. */
17434 #define ALT_I2C0_LB_ADDR ALT_I2C0_ADDR
17435 /* The upper bound address range of the ALT_I2C0 component. */
17436 #define ALT_I2C0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C0_ADDR) + 0x100) - 1))
17437 
17438 
17439 /*
17440  * Component Instance : i2c1
17441  *
17442  * Instance i2c1 of component ALT_I2C.
17443  *
17444  *
17445  */
17446 /* The address of the ALT_I2C_IC_CON register for the ALT_I2C1 instance. */
17447 #define ALT_I2C1_IC_CON_ADDR ALT_I2C_IC_CON_ADDR(ALT_I2C1_ADDR)
17448 /* The address of the ALT_I2C_IC_TAR register for the ALT_I2C1 instance. */
17449 #define ALT_I2C1_IC_TAR_ADDR ALT_I2C_IC_TAR_ADDR(ALT_I2C1_ADDR)
17450 /* The address of the ALT_I2C_IC_SAR register for the ALT_I2C1 instance. */
17451 #define ALT_I2C1_IC_SAR_ADDR ALT_I2C_IC_SAR_ADDR(ALT_I2C1_ADDR)
17452 /* The address of the ALT_I2C_IC_DATA_CMD register for the ALT_I2C1 instance. */
17453 #define ALT_I2C1_IC_DATA_CMD_ADDR ALT_I2C_IC_DATA_CMD_ADDR(ALT_I2C1_ADDR)
17454 /* The address of the ALT_I2C_IC_SS_SCL_HCNT register for the ALT_I2C1 instance. */
17455 #define ALT_I2C1_IC_SS_SCL_HCNT_ADDR ALT_I2C_IC_SS_SCL_HCNT_ADDR(ALT_I2C1_ADDR)
17456 /* The address of the ALT_I2C_IC_SS_SCL_LCNT register for the ALT_I2C1 instance. */
17457 #define ALT_I2C1_IC_SS_SCL_LCNT_ADDR ALT_I2C_IC_SS_SCL_LCNT_ADDR(ALT_I2C1_ADDR)
17458 /* The address of the ALT_I2C_IC_FS_SCL_HCNT register for the ALT_I2C1 instance. */
17459 #define ALT_I2C1_IC_FS_SCL_HCNT_ADDR ALT_I2C_IC_FS_SCL_HCNT_ADDR(ALT_I2C1_ADDR)
17460 /* The address of the ALT_I2C_IC_FS_SCL_LCNT register for the ALT_I2C1 instance. */
17461 #define ALT_I2C1_IC_FS_SCL_LCNT_ADDR ALT_I2C_IC_FS_SCL_LCNT_ADDR(ALT_I2C1_ADDR)
17462 /* The address of the ALT_I2C_IC_INTR_STAT register for the ALT_I2C1 instance. */
17463 #define ALT_I2C1_IC_INTR_STAT_ADDR ALT_I2C_IC_INTR_STAT_ADDR(ALT_I2C1_ADDR)
17464 /* The address of the ALT_I2C_IC_INTR_MASK register for the ALT_I2C1 instance. */
17465 #define ALT_I2C1_IC_INTR_MASK_ADDR ALT_I2C_IC_INTR_MASK_ADDR(ALT_I2C1_ADDR)
17466 /* The address of the ALT_I2C_IC_RAW_INTR_STAT register for the ALT_I2C1 instance. */
17467 #define ALT_I2C1_IC_RAW_INTR_STAT_ADDR ALT_I2C_IC_RAW_INTR_STAT_ADDR(ALT_I2C1_ADDR)
17468 /* The address of the ALT_I2C_IC_RX_TL register for the ALT_I2C1 instance. */
17469 #define ALT_I2C1_IC_RX_TL_ADDR ALT_I2C_IC_RX_TL_ADDR(ALT_I2C1_ADDR)
17470 /* The address of the ALT_I2C_IC_TX_TL register for the ALT_I2C1 instance. */
17471 #define ALT_I2C1_IC_TX_TL_ADDR ALT_I2C_IC_TX_TL_ADDR(ALT_I2C1_ADDR)
17472 /* The address of the ALT_I2C_IC_CLR_INTR register for the ALT_I2C1 instance. */
17473 #define ALT_I2C1_IC_CLR_INTR_ADDR ALT_I2C_IC_CLR_INTR_ADDR(ALT_I2C1_ADDR)
17474 /* The address of the ALT_I2C_IC_CLR_RX_UNDER register for the ALT_I2C1 instance. */
17475 #define ALT_I2C1_IC_CLR_RX_UNDER_ADDR ALT_I2C_IC_CLR_RX_UNDER_ADDR(ALT_I2C1_ADDR)
17476 /* The address of the ALT_I2C_IC_CLR_RX_OVER register for the ALT_I2C1 instance. */
17477 #define ALT_I2C1_IC_CLR_RX_OVER_ADDR ALT_I2C_IC_CLR_RX_OVER_ADDR(ALT_I2C1_ADDR)
17478 /* The address of the ALT_I2C_IC_CLR_TX_OVER register for the ALT_I2C1 instance. */
17479 #define ALT_I2C1_IC_CLR_TX_OVER_ADDR ALT_I2C_IC_CLR_TX_OVER_ADDR(ALT_I2C1_ADDR)
17480 /* The address of the ALT_I2C_IC_CLR_RD_REQ register for the ALT_I2C1 instance. */
17481 #define ALT_I2C1_IC_CLR_RD_REQ_ADDR ALT_I2C_IC_CLR_RD_REQ_ADDR(ALT_I2C1_ADDR)
17482 /* The address of the ALT_I2C_IC_CLR_TX_ABRT register for the ALT_I2C1 instance. */
17483 #define ALT_I2C1_IC_CLR_TX_ABRT_ADDR ALT_I2C_IC_CLR_TX_ABRT_ADDR(ALT_I2C1_ADDR)
17484 /* The address of the ALT_I2C_IC_CLR_RX_DONE register for the ALT_I2C1 instance. */
17485 #define ALT_I2C1_IC_CLR_RX_DONE_ADDR ALT_I2C_IC_CLR_RX_DONE_ADDR(ALT_I2C1_ADDR)
17486 /* The address of the ALT_I2C_IC_CLR_ACTIVITY register for the ALT_I2C1 instance. */
17487 #define ALT_I2C1_IC_CLR_ACTIVITY_ADDR ALT_I2C_IC_CLR_ACTIVITY_ADDR(ALT_I2C1_ADDR)
17488 /* The address of the ALT_I2C_IC_CLR_STOP_DET register for the ALT_I2C1 instance. */
17489 #define ALT_I2C1_IC_CLR_STOP_DET_ADDR ALT_I2C_IC_CLR_STOP_DET_ADDR(ALT_I2C1_ADDR)
17490 /* The address of the ALT_I2C_IC_CLR_START_DET register for the ALT_I2C1 instance. */
17491 #define ALT_I2C1_IC_CLR_START_DET_ADDR ALT_I2C_IC_CLR_START_DET_ADDR(ALT_I2C1_ADDR)
17492 /* The address of the ALT_I2C_IC_CLR_GEN_CALL register for the ALT_I2C1 instance. */
17493 #define ALT_I2C1_IC_CLR_GEN_CALL_ADDR ALT_I2C_IC_CLR_GEN_CALL_ADDR(ALT_I2C1_ADDR)
17494 /* The address of the ALT_I2C_IC_ENABLE register for the ALT_I2C1 instance. */
17495 #define ALT_I2C1_IC_ENABLE_ADDR ALT_I2C_IC_ENABLE_ADDR(ALT_I2C1_ADDR)
17496 /* The address of the ALT_I2C_IC_STATUS register for the ALT_I2C1 instance. */
17497 #define ALT_I2C1_IC_STATUS_ADDR ALT_I2C_IC_STATUS_ADDR(ALT_I2C1_ADDR)
17498 /* The address of the ALT_I2C_IC_TXFLR register for the ALT_I2C1 instance. */
17499 #define ALT_I2C1_IC_TXFLR_ADDR ALT_I2C_IC_TXFLR_ADDR(ALT_I2C1_ADDR)
17500 /* The address of the ALT_I2C_IC_RXFLR register for the ALT_I2C1 instance. */
17501 #define ALT_I2C1_IC_RXFLR_ADDR ALT_I2C_IC_RXFLR_ADDR(ALT_I2C1_ADDR)
17502 /* The address of the ALT_I2C_IC_SDA_HOLD register for the ALT_I2C1 instance. */
17503 #define ALT_I2C1_IC_SDA_HOLD_ADDR ALT_I2C_IC_SDA_HOLD_ADDR(ALT_I2C1_ADDR)
17504 /* The address of the ALT_I2C_IC_TX_ABRT_SOURCE register for the ALT_I2C1 instance. */
17505 #define ALT_I2C1_IC_TX_ABRT_SOURCE_ADDR ALT_I2C_IC_TX_ABRT_SOURCE_ADDR(ALT_I2C1_ADDR)
17506 /* The address of the ALT_I2C_IC_SLV_DATA_NACK_ONLY register for the ALT_I2C1 instance. */
17507 #define ALT_I2C1_IC_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_IC_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C1_ADDR)
17508 /* The address of the ALT_I2C_IC_DMA_CR register for the ALT_I2C1 instance. */
17509 #define ALT_I2C1_IC_DMA_CR_ADDR ALT_I2C_IC_DMA_CR_ADDR(ALT_I2C1_ADDR)
17510 /* The address of the ALT_I2C_IC_DMA_TDLR register for the ALT_I2C1 instance. */
17511 #define ALT_I2C1_IC_DMA_TDLR_ADDR ALT_I2C_IC_DMA_TDLR_ADDR(ALT_I2C1_ADDR)
17512 /* The address of the ALT_I2C_IC_DMA_RDLR register for the ALT_I2C1 instance. */
17513 #define ALT_I2C1_IC_DMA_RDLR_ADDR ALT_I2C_IC_DMA_RDLR_ADDR(ALT_I2C1_ADDR)
17514 /* The address of the ALT_I2C_IC_SDA_SETUP register for the ALT_I2C1 instance. */
17515 #define ALT_I2C1_IC_SDA_SETUP_ADDR ALT_I2C_IC_SDA_SETUP_ADDR(ALT_I2C1_ADDR)
17516 /* The address of the ALT_I2C_IC_ACK_GENERAL_CALL register for the ALT_I2C1 instance. */
17517 #define ALT_I2C1_IC_ACK_GENERAL_CALL_ADDR ALT_I2C_IC_ACK_GENERAL_CALL_ADDR(ALT_I2C1_ADDR)
17518 /* The address of the ALT_I2C_IC_ENABLE_STATUS register for the ALT_I2C1 instance. */
17519 #define ALT_I2C1_IC_ENABLE_STATUS_ADDR ALT_I2C_IC_ENABLE_STATUS_ADDR(ALT_I2C1_ADDR)
17520 /* The address of the ALT_I2C_IC_FS_SPKLEN register for the ALT_I2C1 instance. */
17521 #define ALT_I2C1_IC_FS_SPKLEN_ADDR ALT_I2C_IC_FS_SPKLEN_ADDR(ALT_I2C1_ADDR)
17522 /* The address of the ALT_I2C_IC_CLR_RESTART_DET register for the ALT_I2C1 instance. */
17523 #define ALT_I2C1_IC_CLR_RESTART_DET_ADDR ALT_I2C_IC_CLR_RESTART_DET_ADDR(ALT_I2C1_ADDR)
17524 /* The address of the ALT_I2C_IC_COMP_PARAM_1 register for the ALT_I2C1 instance. */
17525 #define ALT_I2C1_IC_COMP_PARAM_1_ADDR ALT_I2C_IC_COMP_PARAM_1_ADDR(ALT_I2C1_ADDR)
17526 /* The address of the ALT_I2C_IC_COMP_VERSION register for the ALT_I2C1 instance. */
17527 #define ALT_I2C1_IC_COMP_VERSION_ADDR ALT_I2C_IC_COMP_VERSION_ADDR(ALT_I2C1_ADDR)
17528 /* The address of the ALT_I2C_IC_COMP_TYPE register for the ALT_I2C1 instance. */
17529 #define ALT_I2C1_IC_COMP_TYPE_ADDR ALT_I2C_IC_COMP_TYPE_ADDR(ALT_I2C1_ADDR)
17530 /* The base address byte offset for the start of the ALT_I2C1 component. */
17531 #define ALT_I2C1_OFST 0xffc02900
17532 /* The start address of the ALT_I2C1 component. */
17533 #define ALT_I2C1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C1_OFST))
17534 /* The lower bound address range of the ALT_I2C1 component. */
17535 #define ALT_I2C1_LB_ADDR ALT_I2C1_ADDR
17536 /* The upper bound address range of the ALT_I2C1 component. */
17537 #define ALT_I2C1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C1_ADDR) + 0x100) - 1))
17538 
17539 
17540 /*
17541  * Component Instance : i2c_emac0
17542  *
17543  * Instance i2c_emac0 of component ALT_I2C.
17544  *
17545  *
17546  */
17547 /* The address of the ALT_I2C_IC_CON register for the ALT_I2C_EMAC0 instance. */
17548 #define ALT_I2C_EMAC0_IC_CON_ADDR ALT_I2C_IC_CON_ADDR(ALT_I2C_EMAC0_ADDR)
17549 /* The address of the ALT_I2C_IC_TAR register for the ALT_I2C_EMAC0 instance. */
17550 #define ALT_I2C_EMAC0_IC_TAR_ADDR ALT_I2C_IC_TAR_ADDR(ALT_I2C_EMAC0_ADDR)
17551 /* The address of the ALT_I2C_IC_SAR register for the ALT_I2C_EMAC0 instance. */
17552 #define ALT_I2C_EMAC0_IC_SAR_ADDR ALT_I2C_IC_SAR_ADDR(ALT_I2C_EMAC0_ADDR)
17553 /* The address of the ALT_I2C_IC_DATA_CMD register for the ALT_I2C_EMAC0 instance. */
17554 #define ALT_I2C_EMAC0_IC_DATA_CMD_ADDR ALT_I2C_IC_DATA_CMD_ADDR(ALT_I2C_EMAC0_ADDR)
17555 /* The address of the ALT_I2C_IC_SS_SCL_HCNT register for the ALT_I2C_EMAC0 instance. */
17556 #define ALT_I2C_EMAC0_IC_SS_SCL_HCNT_ADDR ALT_I2C_IC_SS_SCL_HCNT_ADDR(ALT_I2C_EMAC0_ADDR)
17557 /* The address of the ALT_I2C_IC_SS_SCL_LCNT register for the ALT_I2C_EMAC0 instance. */
17558 #define ALT_I2C_EMAC0_IC_SS_SCL_LCNT_ADDR ALT_I2C_IC_SS_SCL_LCNT_ADDR(ALT_I2C_EMAC0_ADDR)
17559 /* The address of the ALT_I2C_IC_FS_SCL_HCNT register for the ALT_I2C_EMAC0 instance. */
17560 #define ALT_I2C_EMAC0_IC_FS_SCL_HCNT_ADDR ALT_I2C_IC_FS_SCL_HCNT_ADDR(ALT_I2C_EMAC0_ADDR)
17561 /* The address of the ALT_I2C_IC_FS_SCL_LCNT register for the ALT_I2C_EMAC0 instance. */
17562 #define ALT_I2C_EMAC0_IC_FS_SCL_LCNT_ADDR ALT_I2C_IC_FS_SCL_LCNT_ADDR(ALT_I2C_EMAC0_ADDR)
17563 /* The address of the ALT_I2C_IC_INTR_STAT register for the ALT_I2C_EMAC0 instance. */
17564 #define ALT_I2C_EMAC0_IC_INTR_STAT_ADDR ALT_I2C_IC_INTR_STAT_ADDR(ALT_I2C_EMAC0_ADDR)
17565 /* The address of the ALT_I2C_IC_INTR_MASK register for the ALT_I2C_EMAC0 instance. */
17566 #define ALT_I2C_EMAC0_IC_INTR_MASK_ADDR ALT_I2C_IC_INTR_MASK_ADDR(ALT_I2C_EMAC0_ADDR)
17567 /* The address of the ALT_I2C_IC_RAW_INTR_STAT register for the ALT_I2C_EMAC0 instance. */
17568 #define ALT_I2C_EMAC0_IC_RAW_INTR_STAT_ADDR ALT_I2C_IC_RAW_INTR_STAT_ADDR(ALT_I2C_EMAC0_ADDR)
17569 /* The address of the ALT_I2C_IC_RX_TL register for the ALT_I2C_EMAC0 instance. */
17570 #define ALT_I2C_EMAC0_IC_RX_TL_ADDR ALT_I2C_IC_RX_TL_ADDR(ALT_I2C_EMAC0_ADDR)
17571 /* The address of the ALT_I2C_IC_TX_TL register for the ALT_I2C_EMAC0 instance. */
17572 #define ALT_I2C_EMAC0_IC_TX_TL_ADDR ALT_I2C_IC_TX_TL_ADDR(ALT_I2C_EMAC0_ADDR)
17573 /* The address of the ALT_I2C_IC_CLR_INTR register for the ALT_I2C_EMAC0 instance. */
17574 #define ALT_I2C_EMAC0_IC_CLR_INTR_ADDR ALT_I2C_IC_CLR_INTR_ADDR(ALT_I2C_EMAC0_ADDR)
17575 /* The address of the ALT_I2C_IC_CLR_RX_UNDER register for the ALT_I2C_EMAC0 instance. */
17576 #define ALT_I2C_EMAC0_IC_CLR_RX_UNDER_ADDR ALT_I2C_IC_CLR_RX_UNDER_ADDR(ALT_I2C_EMAC0_ADDR)
17577 /* The address of the ALT_I2C_IC_CLR_RX_OVER register for the ALT_I2C_EMAC0 instance. */
17578 #define ALT_I2C_EMAC0_IC_CLR_RX_OVER_ADDR ALT_I2C_IC_CLR_RX_OVER_ADDR(ALT_I2C_EMAC0_ADDR)
17579 /* The address of the ALT_I2C_IC_CLR_TX_OVER register for the ALT_I2C_EMAC0 instance. */
17580 #define ALT_I2C_EMAC0_IC_CLR_TX_OVER_ADDR ALT_I2C_IC_CLR_TX_OVER_ADDR(ALT_I2C_EMAC0_ADDR)
17581 /* The address of the ALT_I2C_IC_CLR_RD_REQ register for the ALT_I2C_EMAC0 instance. */
17582 #define ALT_I2C_EMAC0_IC_CLR_RD_REQ_ADDR ALT_I2C_IC_CLR_RD_REQ_ADDR(ALT_I2C_EMAC0_ADDR)
17583 /* The address of the ALT_I2C_IC_CLR_TX_ABRT register for the ALT_I2C_EMAC0 instance. */
17584 #define ALT_I2C_EMAC0_IC_CLR_TX_ABRT_ADDR ALT_I2C_IC_CLR_TX_ABRT_ADDR(ALT_I2C_EMAC0_ADDR)
17585 /* The address of the ALT_I2C_IC_CLR_RX_DONE register for the ALT_I2C_EMAC0 instance. */
17586 #define ALT_I2C_EMAC0_IC_CLR_RX_DONE_ADDR ALT_I2C_IC_CLR_RX_DONE_ADDR(ALT_I2C_EMAC0_ADDR)
17587 /* The address of the ALT_I2C_IC_CLR_ACTIVITY register for the ALT_I2C_EMAC0 instance. */
17588 #define ALT_I2C_EMAC0_IC_CLR_ACTIVITY_ADDR ALT_I2C_IC_CLR_ACTIVITY_ADDR(ALT_I2C_EMAC0_ADDR)
17589 /* The address of the ALT_I2C_IC_CLR_STOP_DET register for the ALT_I2C_EMAC0 instance. */
17590 #define ALT_I2C_EMAC0_IC_CLR_STOP_DET_ADDR ALT_I2C_IC_CLR_STOP_DET_ADDR(ALT_I2C_EMAC0_ADDR)
17591 /* The address of the ALT_I2C_IC_CLR_START_DET register for the ALT_I2C_EMAC0 instance. */
17592 #define ALT_I2C_EMAC0_IC_CLR_START_DET_ADDR ALT_I2C_IC_CLR_START_DET_ADDR(ALT_I2C_EMAC0_ADDR)
17593 /* The address of the ALT_I2C_IC_CLR_GEN_CALL register for the ALT_I2C_EMAC0 instance. */
17594 #define ALT_I2C_EMAC0_IC_CLR_GEN_CALL_ADDR ALT_I2C_IC_CLR_GEN_CALL_ADDR(ALT_I2C_EMAC0_ADDR)
17595 /* The address of the ALT_I2C_IC_ENABLE register for the ALT_I2C_EMAC0 instance. */
17596 #define ALT_I2C_EMAC0_IC_ENABLE_ADDR ALT_I2C_IC_ENABLE_ADDR(ALT_I2C_EMAC0_ADDR)
17597 /* The address of the ALT_I2C_IC_STATUS register for the ALT_I2C_EMAC0 instance. */
17598 #define ALT_I2C_EMAC0_IC_STATUS_ADDR ALT_I2C_IC_STATUS_ADDR(ALT_I2C_EMAC0_ADDR)
17599 /* The address of the ALT_I2C_IC_TXFLR register for the ALT_I2C_EMAC0 instance. */
17600 #define ALT_I2C_EMAC0_IC_TXFLR_ADDR ALT_I2C_IC_TXFLR_ADDR(ALT_I2C_EMAC0_ADDR)
17601 /* The address of the ALT_I2C_IC_RXFLR register for the ALT_I2C_EMAC0 instance. */
17602 #define ALT_I2C_EMAC0_IC_RXFLR_ADDR ALT_I2C_IC_RXFLR_ADDR(ALT_I2C_EMAC0_ADDR)
17603 /* The address of the ALT_I2C_IC_SDA_HOLD register for the ALT_I2C_EMAC0 instance. */
17604 #define ALT_I2C_EMAC0_IC_SDA_HOLD_ADDR ALT_I2C_IC_SDA_HOLD_ADDR(ALT_I2C_EMAC0_ADDR)
17605 /* The address of the ALT_I2C_IC_TX_ABRT_SOURCE register for the ALT_I2C_EMAC0 instance. */
17606 #define ALT_I2C_EMAC0_IC_TX_ABRT_SOURCE_ADDR ALT_I2C_IC_TX_ABRT_SOURCE_ADDR(ALT_I2C_EMAC0_ADDR)
17607 /* The address of the ALT_I2C_IC_SLV_DATA_NACK_ONLY register for the ALT_I2C_EMAC0 instance. */
17608 #define ALT_I2C_EMAC0_IC_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_IC_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C_EMAC0_ADDR)
17609 /* The address of the ALT_I2C_IC_DMA_CR register for the ALT_I2C_EMAC0 instance. */
17610 #define ALT_I2C_EMAC0_IC_DMA_CR_ADDR ALT_I2C_IC_DMA_CR_ADDR(ALT_I2C_EMAC0_ADDR)
17611 /* The address of the ALT_I2C_IC_DMA_TDLR register for the ALT_I2C_EMAC0 instance. */
17612 #define ALT_I2C_EMAC0_IC_DMA_TDLR_ADDR ALT_I2C_IC_DMA_TDLR_ADDR(ALT_I2C_EMAC0_ADDR)
17613 /* The address of the ALT_I2C_IC_DMA_RDLR register for the ALT_I2C_EMAC0 instance. */
17614 #define ALT_I2C_EMAC0_IC_DMA_RDLR_ADDR ALT_I2C_IC_DMA_RDLR_ADDR(ALT_I2C_EMAC0_ADDR)
17615 /* The address of the ALT_I2C_IC_SDA_SETUP register for the ALT_I2C_EMAC0 instance. */
17616 #define ALT_I2C_EMAC0_IC_SDA_SETUP_ADDR ALT_I2C_IC_SDA_SETUP_ADDR(ALT_I2C_EMAC0_ADDR)
17617 /* The address of the ALT_I2C_IC_ACK_GENERAL_CALL register for the ALT_I2C_EMAC0 instance. */
17618 #define ALT_I2C_EMAC0_IC_ACK_GENERAL_CALL_ADDR ALT_I2C_IC_ACK_GENERAL_CALL_ADDR(ALT_I2C_EMAC0_ADDR)
17619 /* The address of the ALT_I2C_IC_ENABLE_STATUS register for the ALT_I2C_EMAC0 instance. */
17620 #define ALT_I2C_EMAC0_IC_ENABLE_STATUS_ADDR ALT_I2C_IC_ENABLE_STATUS_ADDR(ALT_I2C_EMAC0_ADDR)
17621 /* The address of the ALT_I2C_IC_FS_SPKLEN register for the ALT_I2C_EMAC0 instance. */
17622 #define ALT_I2C_EMAC0_IC_FS_SPKLEN_ADDR ALT_I2C_IC_FS_SPKLEN_ADDR(ALT_I2C_EMAC0_ADDR)
17623 /* The address of the ALT_I2C_IC_CLR_RESTART_DET register for the ALT_I2C_EMAC0 instance. */
17624 #define ALT_I2C_EMAC0_IC_CLR_RESTART_DET_ADDR ALT_I2C_IC_CLR_RESTART_DET_ADDR(ALT_I2C_EMAC0_ADDR)
17625 /* The address of the ALT_I2C_IC_COMP_PARAM_1 register for the ALT_I2C_EMAC0 instance. */
17626 #define ALT_I2C_EMAC0_IC_COMP_PARAM_1_ADDR ALT_I2C_IC_COMP_PARAM_1_ADDR(ALT_I2C_EMAC0_ADDR)
17627 /* The address of the ALT_I2C_IC_COMP_VERSION register for the ALT_I2C_EMAC0 instance. */
17628 #define ALT_I2C_EMAC0_IC_COMP_VERSION_ADDR ALT_I2C_IC_COMP_VERSION_ADDR(ALT_I2C_EMAC0_ADDR)
17629 /* The address of the ALT_I2C_IC_COMP_TYPE register for the ALT_I2C_EMAC0 instance. */
17630 #define ALT_I2C_EMAC0_IC_COMP_TYPE_ADDR ALT_I2C_IC_COMP_TYPE_ADDR(ALT_I2C_EMAC0_ADDR)
17631 /* The base address byte offset for the start of the ALT_I2C_EMAC0 component. */
17632 #define ALT_I2C_EMAC0_OFST 0xffc02a00
17633 /* The start address of the ALT_I2C_EMAC0 component. */
17634 #define ALT_I2C_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C_EMAC0_OFST))
17635 /* The lower bound address range of the ALT_I2C_EMAC0 component. */
17636 #define ALT_I2C_EMAC0_LB_ADDR ALT_I2C_EMAC0_ADDR
17637 /* The upper bound address range of the ALT_I2C_EMAC0 component. */
17638 #define ALT_I2C_EMAC0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C_EMAC0_ADDR) + 0x100) - 1))
17639 
17640 
17641 /*
17642  * Component Instance : i2c_emac1
17643  *
17644  * Instance i2c_emac1 of component ALT_I2C.
17645  *
17646  *
17647  */
17648 /* The address of the ALT_I2C_IC_CON register for the ALT_I2C_EMAC1 instance. */
17649 #define ALT_I2C_EMAC1_IC_CON_ADDR ALT_I2C_IC_CON_ADDR(ALT_I2C_EMAC1_ADDR)
17650 /* The address of the ALT_I2C_IC_TAR register for the ALT_I2C_EMAC1 instance. */
17651 #define ALT_I2C_EMAC1_IC_TAR_ADDR ALT_I2C_IC_TAR_ADDR(ALT_I2C_EMAC1_ADDR)
17652 /* The address of the ALT_I2C_IC_SAR register for the ALT_I2C_EMAC1 instance. */
17653 #define ALT_I2C_EMAC1_IC_SAR_ADDR ALT_I2C_IC_SAR_ADDR(ALT_I2C_EMAC1_ADDR)
17654 /* The address of the ALT_I2C_IC_DATA_CMD register for the ALT_I2C_EMAC1 instance. */
17655 #define ALT_I2C_EMAC1_IC_DATA_CMD_ADDR ALT_I2C_IC_DATA_CMD_ADDR(ALT_I2C_EMAC1_ADDR)
17656 /* The address of the ALT_I2C_IC_SS_SCL_HCNT register for the ALT_I2C_EMAC1 instance. */
17657 #define ALT_I2C_EMAC1_IC_SS_SCL_HCNT_ADDR ALT_I2C_IC_SS_SCL_HCNT_ADDR(ALT_I2C_EMAC1_ADDR)
17658 /* The address of the ALT_I2C_IC_SS_SCL_LCNT register for the ALT_I2C_EMAC1 instance. */
17659 #define ALT_I2C_EMAC1_IC_SS_SCL_LCNT_ADDR ALT_I2C_IC_SS_SCL_LCNT_ADDR(ALT_I2C_EMAC1_ADDR)
17660 /* The address of the ALT_I2C_IC_FS_SCL_HCNT register for the ALT_I2C_EMAC1 instance. */
17661 #define ALT_I2C_EMAC1_IC_FS_SCL_HCNT_ADDR ALT_I2C_IC_FS_SCL_HCNT_ADDR(ALT_I2C_EMAC1_ADDR)
17662 /* The address of the ALT_I2C_IC_FS_SCL_LCNT register for the ALT_I2C_EMAC1 instance. */
17663 #define ALT_I2C_EMAC1_IC_FS_SCL_LCNT_ADDR ALT_I2C_IC_FS_SCL_LCNT_ADDR(ALT_I2C_EMAC1_ADDR)
17664 /* The address of the ALT_I2C_IC_INTR_STAT register for the ALT_I2C_EMAC1 instance. */
17665 #define ALT_I2C_EMAC1_IC_INTR_STAT_ADDR ALT_I2C_IC_INTR_STAT_ADDR(ALT_I2C_EMAC1_ADDR)
17666 /* The address of the ALT_I2C_IC_INTR_MASK register for the ALT_I2C_EMAC1 instance. */
17667 #define ALT_I2C_EMAC1_IC_INTR_MASK_ADDR ALT_I2C_IC_INTR_MASK_ADDR(ALT_I2C_EMAC1_ADDR)
17668 /* The address of the ALT_I2C_IC_RAW_INTR_STAT register for the ALT_I2C_EMAC1 instance. */
17669 #define ALT_I2C_EMAC1_IC_RAW_INTR_STAT_ADDR ALT_I2C_IC_RAW_INTR_STAT_ADDR(ALT_I2C_EMAC1_ADDR)
17670 /* The address of the ALT_I2C_IC_RX_TL register for the ALT_I2C_EMAC1 instance. */
17671 #define ALT_I2C_EMAC1_IC_RX_TL_ADDR ALT_I2C_IC_RX_TL_ADDR(ALT_I2C_EMAC1_ADDR)
17672 /* The address of the ALT_I2C_IC_TX_TL register for the ALT_I2C_EMAC1 instance. */
17673 #define ALT_I2C_EMAC1_IC_TX_TL_ADDR ALT_I2C_IC_TX_TL_ADDR(ALT_I2C_EMAC1_ADDR)
17674 /* The address of the ALT_I2C_IC_CLR_INTR register for the ALT_I2C_EMAC1 instance. */
17675 #define ALT_I2C_EMAC1_IC_CLR_INTR_ADDR ALT_I2C_IC_CLR_INTR_ADDR(ALT_I2C_EMAC1_ADDR)
17676 /* The address of the ALT_I2C_IC_CLR_RX_UNDER register for the ALT_I2C_EMAC1 instance. */
17677 #define ALT_I2C_EMAC1_IC_CLR_RX_UNDER_ADDR ALT_I2C_IC_CLR_RX_UNDER_ADDR(ALT_I2C_EMAC1_ADDR)
17678 /* The address of the ALT_I2C_IC_CLR_RX_OVER register for the ALT_I2C_EMAC1 instance. */
17679 #define ALT_I2C_EMAC1_IC_CLR_RX_OVER_ADDR ALT_I2C_IC_CLR_RX_OVER_ADDR(ALT_I2C_EMAC1_ADDR)
17680 /* The address of the ALT_I2C_IC_CLR_TX_OVER register for the ALT_I2C_EMAC1 instance. */
17681 #define ALT_I2C_EMAC1_IC_CLR_TX_OVER_ADDR ALT_I2C_IC_CLR_TX_OVER_ADDR(ALT_I2C_EMAC1_ADDR)
17682 /* The address of the ALT_I2C_IC_CLR_RD_REQ register for the ALT_I2C_EMAC1 instance. */
17683 #define ALT_I2C_EMAC1_IC_CLR_RD_REQ_ADDR ALT_I2C_IC_CLR_RD_REQ_ADDR(ALT_I2C_EMAC1_ADDR)
17684 /* The address of the ALT_I2C_IC_CLR_TX_ABRT register for the ALT_I2C_EMAC1 instance. */
17685 #define ALT_I2C_EMAC1_IC_CLR_TX_ABRT_ADDR ALT_I2C_IC_CLR_TX_ABRT_ADDR(ALT_I2C_EMAC1_ADDR)
17686 /* The address of the ALT_I2C_IC_CLR_RX_DONE register for the ALT_I2C_EMAC1 instance. */
17687 #define ALT_I2C_EMAC1_IC_CLR_RX_DONE_ADDR ALT_I2C_IC_CLR_RX_DONE_ADDR(ALT_I2C_EMAC1_ADDR)
17688 /* The address of the ALT_I2C_IC_CLR_ACTIVITY register for the ALT_I2C_EMAC1 instance. */
17689 #define ALT_I2C_EMAC1_IC_CLR_ACTIVITY_ADDR ALT_I2C_IC_CLR_ACTIVITY_ADDR(ALT_I2C_EMAC1_ADDR)
17690 /* The address of the ALT_I2C_IC_CLR_STOP_DET register for the ALT_I2C_EMAC1 instance. */
17691 #define ALT_I2C_EMAC1_IC_CLR_STOP_DET_ADDR ALT_I2C_IC_CLR_STOP_DET_ADDR(ALT_I2C_EMAC1_ADDR)
17692 /* The address of the ALT_I2C_IC_CLR_START_DET register for the ALT_I2C_EMAC1 instance. */
17693 #define ALT_I2C_EMAC1_IC_CLR_START_DET_ADDR ALT_I2C_IC_CLR_START_DET_ADDR(ALT_I2C_EMAC1_ADDR)
17694 /* The address of the ALT_I2C_IC_CLR_GEN_CALL register for the ALT_I2C_EMAC1 instance. */
17695 #define ALT_I2C_EMAC1_IC_CLR_GEN_CALL_ADDR ALT_I2C_IC_CLR_GEN_CALL_ADDR(ALT_I2C_EMAC1_ADDR)
17696 /* The address of the ALT_I2C_IC_ENABLE register for the ALT_I2C_EMAC1 instance. */
17697 #define ALT_I2C_EMAC1_IC_ENABLE_ADDR ALT_I2C_IC_ENABLE_ADDR(ALT_I2C_EMAC1_ADDR)
17698 /* The address of the ALT_I2C_IC_STATUS register for the ALT_I2C_EMAC1 instance. */
17699 #define ALT_I2C_EMAC1_IC_STATUS_ADDR ALT_I2C_IC_STATUS_ADDR(ALT_I2C_EMAC1_ADDR)
17700 /* The address of the ALT_I2C_IC_TXFLR register for the ALT_I2C_EMAC1 instance. */
17701 #define ALT_I2C_EMAC1_IC_TXFLR_ADDR ALT_I2C_IC_TXFLR_ADDR(ALT_I2C_EMAC1_ADDR)
17702 /* The address of the ALT_I2C_IC_RXFLR register for the ALT_I2C_EMAC1 instance. */
17703 #define ALT_I2C_EMAC1_IC_RXFLR_ADDR ALT_I2C_IC_RXFLR_ADDR(ALT_I2C_EMAC1_ADDR)
17704 /* The address of the ALT_I2C_IC_SDA_HOLD register for the ALT_I2C_EMAC1 instance. */
17705 #define ALT_I2C_EMAC1_IC_SDA_HOLD_ADDR ALT_I2C_IC_SDA_HOLD_ADDR(ALT_I2C_EMAC1_ADDR)
17706 /* The address of the ALT_I2C_IC_TX_ABRT_SOURCE register for the ALT_I2C_EMAC1 instance. */
17707 #define ALT_I2C_EMAC1_IC_TX_ABRT_SOURCE_ADDR ALT_I2C_IC_TX_ABRT_SOURCE_ADDR(ALT_I2C_EMAC1_ADDR)
17708 /* The address of the ALT_I2C_IC_SLV_DATA_NACK_ONLY register for the ALT_I2C_EMAC1 instance. */
17709 #define ALT_I2C_EMAC1_IC_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_IC_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C_EMAC1_ADDR)
17710 /* The address of the ALT_I2C_IC_DMA_CR register for the ALT_I2C_EMAC1 instance. */
17711 #define ALT_I2C_EMAC1_IC_DMA_CR_ADDR ALT_I2C_IC_DMA_CR_ADDR(ALT_I2C_EMAC1_ADDR)
17712 /* The address of the ALT_I2C_IC_DMA_TDLR register for the ALT_I2C_EMAC1 instance. */
17713 #define ALT_I2C_EMAC1_IC_DMA_TDLR_ADDR ALT_I2C_IC_DMA_TDLR_ADDR(ALT_I2C_EMAC1_ADDR)
17714 /* The address of the ALT_I2C_IC_DMA_RDLR register for the ALT_I2C_EMAC1 instance. */
17715 #define ALT_I2C_EMAC1_IC_DMA_RDLR_ADDR ALT_I2C_IC_DMA_RDLR_ADDR(ALT_I2C_EMAC1_ADDR)
17716 /* The address of the ALT_I2C_IC_SDA_SETUP register for the ALT_I2C_EMAC1 instance. */
17717 #define ALT_I2C_EMAC1_IC_SDA_SETUP_ADDR ALT_I2C_IC_SDA_SETUP_ADDR(ALT_I2C_EMAC1_ADDR)
17718 /* The address of the ALT_I2C_IC_ACK_GENERAL_CALL register for the ALT_I2C_EMAC1 instance. */
17719 #define ALT_I2C_EMAC1_IC_ACK_GENERAL_CALL_ADDR ALT_I2C_IC_ACK_GENERAL_CALL_ADDR(ALT_I2C_EMAC1_ADDR)
17720 /* The address of the ALT_I2C_IC_ENABLE_STATUS register for the ALT_I2C_EMAC1 instance. */
17721 #define ALT_I2C_EMAC1_IC_ENABLE_STATUS_ADDR ALT_I2C_IC_ENABLE_STATUS_ADDR(ALT_I2C_EMAC1_ADDR)
17722 /* The address of the ALT_I2C_IC_FS_SPKLEN register for the ALT_I2C_EMAC1 instance. */
17723 #define ALT_I2C_EMAC1_IC_FS_SPKLEN_ADDR ALT_I2C_IC_FS_SPKLEN_ADDR(ALT_I2C_EMAC1_ADDR)
17724 /* The address of the ALT_I2C_IC_CLR_RESTART_DET register for the ALT_I2C_EMAC1 instance. */
17725 #define ALT_I2C_EMAC1_IC_CLR_RESTART_DET_ADDR ALT_I2C_IC_CLR_RESTART_DET_ADDR(ALT_I2C_EMAC1_ADDR)
17726 /* The address of the ALT_I2C_IC_COMP_PARAM_1 register for the ALT_I2C_EMAC1 instance. */
17727 #define ALT_I2C_EMAC1_IC_COMP_PARAM_1_ADDR ALT_I2C_IC_COMP_PARAM_1_ADDR(ALT_I2C_EMAC1_ADDR)
17728 /* The address of the ALT_I2C_IC_COMP_VERSION register for the ALT_I2C_EMAC1 instance. */
17729 #define ALT_I2C_EMAC1_IC_COMP_VERSION_ADDR ALT_I2C_IC_COMP_VERSION_ADDR(ALT_I2C_EMAC1_ADDR)
17730 /* The address of the ALT_I2C_IC_COMP_TYPE register for the ALT_I2C_EMAC1 instance. */
17731 #define ALT_I2C_EMAC1_IC_COMP_TYPE_ADDR ALT_I2C_IC_COMP_TYPE_ADDR(ALT_I2C_EMAC1_ADDR)
17732 /* The base address byte offset for the start of the ALT_I2C_EMAC1 component. */
17733 #define ALT_I2C_EMAC1_OFST 0xffc02b00
17734 /* The start address of the ALT_I2C_EMAC1 component. */
17735 #define ALT_I2C_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C_EMAC1_OFST))
17736 /* The lower bound address range of the ALT_I2C_EMAC1 component. */
17737 #define ALT_I2C_EMAC1_LB_ADDR ALT_I2C_EMAC1_ADDR
17738 /* The upper bound address range of the ALT_I2C_EMAC1 component. */
17739 #define ALT_I2C_EMAC1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C_EMAC1_ADDR) + 0x100) - 1))
17740 
17741 
17742 /*
17743  * Component Instance : i2c_emac2
17744  *
17745  * Instance i2c_emac2 of component ALT_I2C.
17746  *
17747  *
17748  */
17749 /* The address of the ALT_I2C_IC_CON register for the ALT_I2C_EMAC2 instance. */
17750 #define ALT_I2C_EMAC2_IC_CON_ADDR ALT_I2C_IC_CON_ADDR(ALT_I2C_EMAC2_ADDR)
17751 /* The address of the ALT_I2C_IC_TAR register for the ALT_I2C_EMAC2 instance. */
17752 #define ALT_I2C_EMAC2_IC_TAR_ADDR ALT_I2C_IC_TAR_ADDR(ALT_I2C_EMAC2_ADDR)
17753 /* The address of the ALT_I2C_IC_SAR register for the ALT_I2C_EMAC2 instance. */
17754 #define ALT_I2C_EMAC2_IC_SAR_ADDR ALT_I2C_IC_SAR_ADDR(ALT_I2C_EMAC2_ADDR)
17755 /* The address of the ALT_I2C_IC_DATA_CMD register for the ALT_I2C_EMAC2 instance. */
17756 #define ALT_I2C_EMAC2_IC_DATA_CMD_ADDR ALT_I2C_IC_DATA_CMD_ADDR(ALT_I2C_EMAC2_ADDR)
17757 /* The address of the ALT_I2C_IC_SS_SCL_HCNT register for the ALT_I2C_EMAC2 instance. */
17758 #define ALT_I2C_EMAC2_IC_SS_SCL_HCNT_ADDR ALT_I2C_IC_SS_SCL_HCNT_ADDR(ALT_I2C_EMAC2_ADDR)
17759 /* The address of the ALT_I2C_IC_SS_SCL_LCNT register for the ALT_I2C_EMAC2 instance. */
17760 #define ALT_I2C_EMAC2_IC_SS_SCL_LCNT_ADDR ALT_I2C_IC_SS_SCL_LCNT_ADDR(ALT_I2C_EMAC2_ADDR)
17761 /* The address of the ALT_I2C_IC_FS_SCL_HCNT register for the ALT_I2C_EMAC2 instance. */
17762 #define ALT_I2C_EMAC2_IC_FS_SCL_HCNT_ADDR ALT_I2C_IC_FS_SCL_HCNT_ADDR(ALT_I2C_EMAC2_ADDR)
17763 /* The address of the ALT_I2C_IC_FS_SCL_LCNT register for the ALT_I2C_EMAC2 instance. */
17764 #define ALT_I2C_EMAC2_IC_FS_SCL_LCNT_ADDR ALT_I2C_IC_FS_SCL_LCNT_ADDR(ALT_I2C_EMAC2_ADDR)
17765 /* The address of the ALT_I2C_IC_INTR_STAT register for the ALT_I2C_EMAC2 instance. */
17766 #define ALT_I2C_EMAC2_IC_INTR_STAT_ADDR ALT_I2C_IC_INTR_STAT_ADDR(ALT_I2C_EMAC2_ADDR)
17767 /* The address of the ALT_I2C_IC_INTR_MASK register for the ALT_I2C_EMAC2 instance. */
17768 #define ALT_I2C_EMAC2_IC_INTR_MASK_ADDR ALT_I2C_IC_INTR_MASK_ADDR(ALT_I2C_EMAC2_ADDR)
17769 /* The address of the ALT_I2C_IC_RAW_INTR_STAT register for the ALT_I2C_EMAC2 instance. */
17770 #define ALT_I2C_EMAC2_IC_RAW_INTR_STAT_ADDR ALT_I2C_IC_RAW_INTR_STAT_ADDR(ALT_I2C_EMAC2_ADDR)
17771 /* The address of the ALT_I2C_IC_RX_TL register for the ALT_I2C_EMAC2 instance. */
17772 #define ALT_I2C_EMAC2_IC_RX_TL_ADDR ALT_I2C_IC_RX_TL_ADDR(ALT_I2C_EMAC2_ADDR)
17773 /* The address of the ALT_I2C_IC_TX_TL register for the ALT_I2C_EMAC2 instance. */
17774 #define ALT_I2C_EMAC2_IC_TX_TL_ADDR ALT_I2C_IC_TX_TL_ADDR(ALT_I2C_EMAC2_ADDR)
17775 /* The address of the ALT_I2C_IC_CLR_INTR register for the ALT_I2C_EMAC2 instance. */
17776 #define ALT_I2C_EMAC2_IC_CLR_INTR_ADDR ALT_I2C_IC_CLR_INTR_ADDR(ALT_I2C_EMAC2_ADDR)
17777 /* The address of the ALT_I2C_IC_CLR_RX_UNDER register for the ALT_I2C_EMAC2 instance. */
17778 #define ALT_I2C_EMAC2_IC_CLR_RX_UNDER_ADDR ALT_I2C_IC_CLR_RX_UNDER_ADDR(ALT_I2C_EMAC2_ADDR)
17779 /* The address of the ALT_I2C_IC_CLR_RX_OVER register for the ALT_I2C_EMAC2 instance. */
17780 #define ALT_I2C_EMAC2_IC_CLR_RX_OVER_ADDR ALT_I2C_IC_CLR_RX_OVER_ADDR(ALT_I2C_EMAC2_ADDR)
17781 /* The address of the ALT_I2C_IC_CLR_TX_OVER register for the ALT_I2C_EMAC2 instance. */
17782 #define ALT_I2C_EMAC2_IC_CLR_TX_OVER_ADDR ALT_I2C_IC_CLR_TX_OVER_ADDR(ALT_I2C_EMAC2_ADDR)
17783 /* The address of the ALT_I2C_IC_CLR_RD_REQ register for the ALT_I2C_EMAC2 instance. */
17784 #define ALT_I2C_EMAC2_IC_CLR_RD_REQ_ADDR ALT_I2C_IC_CLR_RD_REQ_ADDR(ALT_I2C_EMAC2_ADDR)
17785 /* The address of the ALT_I2C_IC_CLR_TX_ABRT register for the ALT_I2C_EMAC2 instance. */
17786 #define ALT_I2C_EMAC2_IC_CLR_TX_ABRT_ADDR ALT_I2C_IC_CLR_TX_ABRT_ADDR(ALT_I2C_EMAC2_ADDR)
17787 /* The address of the ALT_I2C_IC_CLR_RX_DONE register for the ALT_I2C_EMAC2 instance. */
17788 #define ALT_I2C_EMAC2_IC_CLR_RX_DONE_ADDR ALT_I2C_IC_CLR_RX_DONE_ADDR(ALT_I2C_EMAC2_ADDR)
17789 /* The address of the ALT_I2C_IC_CLR_ACTIVITY register for the ALT_I2C_EMAC2 instance. */
17790 #define ALT_I2C_EMAC2_IC_CLR_ACTIVITY_ADDR ALT_I2C_IC_CLR_ACTIVITY_ADDR(ALT_I2C_EMAC2_ADDR)
17791 /* The address of the ALT_I2C_IC_CLR_STOP_DET register for the ALT_I2C_EMAC2 instance. */
17792 #define ALT_I2C_EMAC2_IC_CLR_STOP_DET_ADDR ALT_I2C_IC_CLR_STOP_DET_ADDR(ALT_I2C_EMAC2_ADDR)
17793 /* The address of the ALT_I2C_IC_CLR_START_DET register for the ALT_I2C_EMAC2 instance. */
17794 #define ALT_I2C_EMAC2_IC_CLR_START_DET_ADDR ALT_I2C_IC_CLR_START_DET_ADDR(ALT_I2C_EMAC2_ADDR)
17795 /* The address of the ALT_I2C_IC_CLR_GEN_CALL register for the ALT_I2C_EMAC2 instance. */
17796 #define ALT_I2C_EMAC2_IC_CLR_GEN_CALL_ADDR ALT_I2C_IC_CLR_GEN_CALL_ADDR(ALT_I2C_EMAC2_ADDR)
17797 /* The address of the ALT_I2C_IC_ENABLE register for the ALT_I2C_EMAC2 instance. */
17798 #define ALT_I2C_EMAC2_IC_ENABLE_ADDR ALT_I2C_IC_ENABLE_ADDR(ALT_I2C_EMAC2_ADDR)
17799 /* The address of the ALT_I2C_IC_STATUS register for the ALT_I2C_EMAC2 instance. */
17800 #define ALT_I2C_EMAC2_IC_STATUS_ADDR ALT_I2C_IC_STATUS_ADDR(ALT_I2C_EMAC2_ADDR)
17801 /* The address of the ALT_I2C_IC_TXFLR register for the ALT_I2C_EMAC2 instance. */
17802 #define ALT_I2C_EMAC2_IC_TXFLR_ADDR ALT_I2C_IC_TXFLR_ADDR(ALT_I2C_EMAC2_ADDR)
17803 /* The address of the ALT_I2C_IC_RXFLR register for the ALT_I2C_EMAC2 instance. */
17804 #define ALT_I2C_EMAC2_IC_RXFLR_ADDR ALT_I2C_IC_RXFLR_ADDR(ALT_I2C_EMAC2_ADDR)
17805 /* The address of the ALT_I2C_IC_SDA_HOLD register for the ALT_I2C_EMAC2 instance. */
17806 #define ALT_I2C_EMAC2_IC_SDA_HOLD_ADDR ALT_I2C_IC_SDA_HOLD_ADDR(ALT_I2C_EMAC2_ADDR)
17807 /* The address of the ALT_I2C_IC_TX_ABRT_SOURCE register for the ALT_I2C_EMAC2 instance. */
17808 #define ALT_I2C_EMAC2_IC_TX_ABRT_SOURCE_ADDR ALT_I2C_IC_TX_ABRT_SOURCE_ADDR(ALT_I2C_EMAC2_ADDR)
17809 /* The address of the ALT_I2C_IC_SLV_DATA_NACK_ONLY register for the ALT_I2C_EMAC2 instance. */
17810 #define ALT_I2C_EMAC2_IC_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_IC_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C_EMAC2_ADDR)
17811 /* The address of the ALT_I2C_IC_DMA_CR register for the ALT_I2C_EMAC2 instance. */
17812 #define ALT_I2C_EMAC2_IC_DMA_CR_ADDR ALT_I2C_IC_DMA_CR_ADDR(ALT_I2C_EMAC2_ADDR)
17813 /* The address of the ALT_I2C_IC_DMA_TDLR register for the ALT_I2C_EMAC2 instance. */
17814 #define ALT_I2C_EMAC2_IC_DMA_TDLR_ADDR ALT_I2C_IC_DMA_TDLR_ADDR(ALT_I2C_EMAC2_ADDR)
17815 /* The address of the ALT_I2C_IC_DMA_RDLR register for the ALT_I2C_EMAC2 instance. */
17816 #define ALT_I2C_EMAC2_IC_DMA_RDLR_ADDR ALT_I2C_IC_DMA_RDLR_ADDR(ALT_I2C_EMAC2_ADDR)
17817 /* The address of the ALT_I2C_IC_SDA_SETUP register for the ALT_I2C_EMAC2 instance. */
17818 #define ALT_I2C_EMAC2_IC_SDA_SETUP_ADDR ALT_I2C_IC_SDA_SETUP_ADDR(ALT_I2C_EMAC2_ADDR)
17819 /* The address of the ALT_I2C_IC_ACK_GENERAL_CALL register for the ALT_I2C_EMAC2 instance. */
17820 #define ALT_I2C_EMAC2_IC_ACK_GENERAL_CALL_ADDR ALT_I2C_IC_ACK_GENERAL_CALL_ADDR(ALT_I2C_EMAC2_ADDR)
17821 /* The address of the ALT_I2C_IC_ENABLE_STATUS register for the ALT_I2C_EMAC2 instance. */
17822 #define ALT_I2C_EMAC2_IC_ENABLE_STATUS_ADDR ALT_I2C_IC_ENABLE_STATUS_ADDR(ALT_I2C_EMAC2_ADDR)
17823 /* The address of the ALT_I2C_IC_FS_SPKLEN register for the ALT_I2C_EMAC2 instance. */
17824 #define ALT_I2C_EMAC2_IC_FS_SPKLEN_ADDR ALT_I2C_IC_FS_SPKLEN_ADDR(ALT_I2C_EMAC2_ADDR)
17825 /* The address of the ALT_I2C_IC_CLR_RESTART_DET register for the ALT_I2C_EMAC2 instance. */
17826 #define ALT_I2C_EMAC2_IC_CLR_RESTART_DET_ADDR ALT_I2C_IC_CLR_RESTART_DET_ADDR(ALT_I2C_EMAC2_ADDR)
17827 /* The address of the ALT_I2C_IC_COMP_PARAM_1 register for the ALT_I2C_EMAC2 instance. */
17828 #define ALT_I2C_EMAC2_IC_COMP_PARAM_1_ADDR ALT_I2C_IC_COMP_PARAM_1_ADDR(ALT_I2C_EMAC2_ADDR)
17829 /* The address of the ALT_I2C_IC_COMP_VERSION register for the ALT_I2C_EMAC2 instance. */
17830 #define ALT_I2C_EMAC2_IC_COMP_VERSION_ADDR ALT_I2C_IC_COMP_VERSION_ADDR(ALT_I2C_EMAC2_ADDR)
17831 /* The address of the ALT_I2C_IC_COMP_TYPE register for the ALT_I2C_EMAC2 instance. */
17832 #define ALT_I2C_EMAC2_IC_COMP_TYPE_ADDR ALT_I2C_IC_COMP_TYPE_ADDR(ALT_I2C_EMAC2_ADDR)
17833 /* The base address byte offset for the start of the ALT_I2C_EMAC2 component. */
17834 #define ALT_I2C_EMAC2_OFST 0xffc02c00
17835 /* The start address of the ALT_I2C_EMAC2 component. */
17836 #define ALT_I2C_EMAC2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C_EMAC2_OFST))
17837 /* The lower bound address range of the ALT_I2C_EMAC2 component. */
17838 #define ALT_I2C_EMAC2_LB_ADDR ALT_I2C_EMAC2_ADDR
17839 /* The upper bound address range of the ALT_I2C_EMAC2 component. */
17840 #define ALT_I2C_EMAC2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C_EMAC2_ADDR) + 0x100) - 1))
17841 
17842 
17843 /*
17844  * Component Instance : tmr_sp0
17845  *
17846  * Instance tmr_sp0 of component ALT_TMR.
17847  *
17848  *
17849  */
17850 /* The address of the ALT_TMR_TIMER1LOADCOUNT register for the ALT_TMR_SP0 instance. */
17851 #define ALT_TMR_SP0_TIMER1LOADCOUNT_ADDR ALT_TMR_TIMER1LOADCOUNT_ADDR(ALT_TMR_SP0_ADDR)
17852 /* The address of the ALT_TMR_TIMER1CURRENTVAL register for the ALT_TMR_SP0 instance. */
17853 #define ALT_TMR_SP0_TIMER1CURRENTVAL_ADDR ALT_TMR_TIMER1CURRENTVAL_ADDR(ALT_TMR_SP0_ADDR)
17854 /* The address of the ALT_TMR_TIMER1CONTROLREG register for the ALT_TMR_SP0 instance. */
17855 #define ALT_TMR_SP0_TIMER1CONTROLREG_ADDR ALT_TMR_TIMER1CONTROLREG_ADDR(ALT_TMR_SP0_ADDR)
17856 /* The address of the ALT_TMR_TIMER1EOI register for the ALT_TMR_SP0 instance. */
17857 #define ALT_TMR_SP0_TIMER1EOI_ADDR ALT_TMR_TIMER1EOI_ADDR(ALT_TMR_SP0_ADDR)
17858 /* The address of the ALT_TMR_TIMER1INTSTAT register for the ALT_TMR_SP0 instance. */
17859 #define ALT_TMR_SP0_TIMER1INTSTAT_ADDR ALT_TMR_TIMER1INTSTAT_ADDR(ALT_TMR_SP0_ADDR)
17860 /* The address of the ALT_TMR_TIMERSINTSTAT register for the ALT_TMR_SP0 instance. */
17861 #define ALT_TMR_SP0_TIMERSINTSTAT_ADDR ALT_TMR_TIMERSINTSTAT_ADDR(ALT_TMR_SP0_ADDR)
17862 /* The address of the ALT_TMR_TIMERSEOI register for the ALT_TMR_SP0 instance. */
17863 #define ALT_TMR_SP0_TIMERSEOI_ADDR ALT_TMR_TIMERSEOI_ADDR(ALT_TMR_SP0_ADDR)
17864 /* The address of the ALT_TMR_TIMERSRAWINTSTAT register for the ALT_TMR_SP0 instance. */
17865 #define ALT_TMR_SP0_TIMERSRAWINTSTAT_ADDR ALT_TMR_TIMERSRAWINTSTAT_ADDR(ALT_TMR_SP0_ADDR)
17866 /* The address of the ALT_TMR_TIMERSCOMPVERSION register for the ALT_TMR_SP0 instance. */
17867 #define ALT_TMR_SP0_TIMERSCOMPVERSION_ADDR ALT_TMR_TIMERSCOMPVERSION_ADDR(ALT_TMR_SP0_ADDR)
17868 /* The base address byte offset for the start of the ALT_TMR_SP0 component. */
17869 #define ALT_TMR_SP0_OFST 0xffc03000
17870 /* The start address of the ALT_TMR_SP0 component. */
17871 #define ALT_TMR_SP0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_TMR_SP0_OFST))
17872 /* The lower bound address range of the ALT_TMR_SP0 component. */
17873 #define ALT_TMR_SP0_LB_ADDR ALT_TMR_SP0_ADDR
17874 /* The upper bound address range of the ALT_TMR_SP0 component. */
17875 #define ALT_TMR_SP0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_TMR_SP0_ADDR) + 0x100) - 1))
17876 
17877 
17878 /*
17879  * Component Instance : tmr_sp1
17880  *
17881  * Instance tmr_sp1 of component ALT_TMR.
17882  *
17883  *
17884  */
17885 /* The address of the ALT_TMR_TIMER1LOADCOUNT register for the ALT_TMR_SP1 instance. */
17886 #define ALT_TMR_SP1_TIMER1LOADCOUNT_ADDR ALT_TMR_TIMER1LOADCOUNT_ADDR(ALT_TMR_SP1_ADDR)
17887 /* The address of the ALT_TMR_TIMER1CURRENTVAL register for the ALT_TMR_SP1 instance. */
17888 #define ALT_TMR_SP1_TIMER1CURRENTVAL_ADDR ALT_TMR_TIMER1CURRENTVAL_ADDR(ALT_TMR_SP1_ADDR)
17889 /* The address of the ALT_TMR_TIMER1CONTROLREG register for the ALT_TMR_SP1 instance. */
17890 #define ALT_TMR_SP1_TIMER1CONTROLREG_ADDR ALT_TMR_TIMER1CONTROLREG_ADDR(ALT_TMR_SP1_ADDR)
17891 /* The address of the ALT_TMR_TIMER1EOI register for the ALT_TMR_SP1 instance. */
17892 #define ALT_TMR_SP1_TIMER1EOI_ADDR ALT_TMR_TIMER1EOI_ADDR(ALT_TMR_SP1_ADDR)
17893 /* The address of the ALT_TMR_TIMER1INTSTAT register for the ALT_TMR_SP1 instance. */
17894 #define ALT_TMR_SP1_TIMER1INTSTAT_ADDR ALT_TMR_TIMER1INTSTAT_ADDR(ALT_TMR_SP1_ADDR)
17895 /* The address of the ALT_TMR_TIMERSINTSTAT register for the ALT_TMR_SP1 instance. */
17896 #define ALT_TMR_SP1_TIMERSINTSTAT_ADDR ALT_TMR_TIMERSINTSTAT_ADDR(ALT_TMR_SP1_ADDR)
17897 /* The address of the ALT_TMR_TIMERSEOI register for the ALT_TMR_SP1 instance. */
17898 #define ALT_TMR_SP1_TIMERSEOI_ADDR ALT_TMR_TIMERSEOI_ADDR(ALT_TMR_SP1_ADDR)
17899 /* The address of the ALT_TMR_TIMERSRAWINTSTAT register for the ALT_TMR_SP1 instance. */
17900 #define ALT_TMR_SP1_TIMERSRAWINTSTAT_ADDR ALT_TMR_TIMERSRAWINTSTAT_ADDR(ALT_TMR_SP1_ADDR)
17901 /* The address of the ALT_TMR_TIMERSCOMPVERSION register for the ALT_TMR_SP1 instance. */
17902 #define ALT_TMR_SP1_TIMERSCOMPVERSION_ADDR ALT_TMR_TIMERSCOMPVERSION_ADDR(ALT_TMR_SP1_ADDR)
17903 /* The base address byte offset for the start of the ALT_TMR_SP1 component. */
17904 #define ALT_TMR_SP1_OFST 0xffc03100
17905 /* The start address of the ALT_TMR_SP1 component. */
17906 #define ALT_TMR_SP1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_TMR_SP1_OFST))
17907 /* The lower bound address range of the ALT_TMR_SP1 component. */
17908 #define ALT_TMR_SP1_LB_ADDR ALT_TMR_SP1_ADDR
17909 /* The upper bound address range of the ALT_TMR_SP1 component. */
17910 #define ALT_TMR_SP1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_TMR_SP1_ADDR) + 0x100) - 1))
17911 
17912 
17913 /*
17914  * Component Instance : gpio0
17915  *
17916  * Instance gpio0 of component ALT_GPIO.
17917  *
17918  *
17919  */
17920 /* The address of the ALT_GPIO_GPIO_SWPORTA_DR register for the ALT_GPIO0 instance. */
17921 #define ALT_GPIO0_GPIO_SWPORTA_DR_ADDR ALT_GPIO_GPIO_SWPORTA_DR_ADDR(ALT_GPIO0_ADDR)
17922 /* The address of the ALT_GPIO_GPIO_SWPORTA_DDR register for the ALT_GPIO0 instance. */
17923 #define ALT_GPIO0_GPIO_SWPORTA_DDR_ADDR ALT_GPIO_GPIO_SWPORTA_DDR_ADDR(ALT_GPIO0_ADDR)
17924 /* The address of the ALT_GPIO_GPIO_INTEN register for the ALT_GPIO0 instance. */
17925 #define ALT_GPIO0_GPIO_INTEN_ADDR ALT_GPIO_GPIO_INTEN_ADDR(ALT_GPIO0_ADDR)
17926 /* The address of the ALT_GPIO_GPIO_INTMASK register for the ALT_GPIO0 instance. */
17927 #define ALT_GPIO0_GPIO_INTMASK_ADDR ALT_GPIO_GPIO_INTMASK_ADDR(ALT_GPIO0_ADDR)
17928 /* The address of the ALT_GPIO_GPIO_INTTYPE_LEVEL register for the ALT_GPIO0 instance. */
17929 #define ALT_GPIO0_GPIO_INTTYPE_LEVEL_ADDR ALT_GPIO_GPIO_INTTYPE_LEVEL_ADDR(ALT_GPIO0_ADDR)
17930 /* The address of the ALT_GPIO_GPIO_INT_POLARITY register for the ALT_GPIO0 instance. */
17931 #define ALT_GPIO0_GPIO_INT_POLARITY_ADDR ALT_GPIO_GPIO_INT_POLARITY_ADDR(ALT_GPIO0_ADDR)
17932 /* The address of the ALT_GPIO_GPIO_INTSTATUS register for the ALT_GPIO0 instance. */
17933 #define ALT_GPIO0_GPIO_INTSTATUS_ADDR ALT_GPIO_GPIO_INTSTATUS_ADDR(ALT_GPIO0_ADDR)
17934 /* The address of the ALT_GPIO_GPIO_RAW_INTSTATUS register for the ALT_GPIO0 instance. */
17935 #define ALT_GPIO0_GPIO_RAW_INTSTATUS_ADDR ALT_GPIO_GPIO_RAW_INTSTATUS_ADDR(ALT_GPIO0_ADDR)
17936 /* The address of the ALT_GPIO_GPIO_DEBOUNCE register for the ALT_GPIO0 instance. */
17937 #define ALT_GPIO0_GPIO_DEBOUNCE_ADDR ALT_GPIO_GPIO_DEBOUNCE_ADDR(ALT_GPIO0_ADDR)
17938 /* The address of the ALT_GPIO_GPIO_PORTA_EOI register for the ALT_GPIO0 instance. */
17939 #define ALT_GPIO0_GPIO_PORTA_EOI_ADDR ALT_GPIO_GPIO_PORTA_EOI_ADDR(ALT_GPIO0_ADDR)
17940 /* The address of the ALT_GPIO_GPIO_EXT_PORTA register for the ALT_GPIO0 instance. */
17941 #define ALT_GPIO0_GPIO_EXT_PORTA_ADDR ALT_GPIO_GPIO_EXT_PORTA_ADDR(ALT_GPIO0_ADDR)
17942 /* The address of the ALT_GPIO_GPIO_LS_SYNC register for the ALT_GPIO0 instance. */
17943 #define ALT_GPIO0_GPIO_LS_SYNC_ADDR ALT_GPIO_GPIO_LS_SYNC_ADDR(ALT_GPIO0_ADDR)
17944 /* The address of the ALT_GPIO_GPIO_ID_CODE register for the ALT_GPIO0 instance. */
17945 #define ALT_GPIO0_GPIO_ID_CODE_ADDR ALT_GPIO_GPIO_ID_CODE_ADDR(ALT_GPIO0_ADDR)
17946 /* The address of the ALT_GPIO_GPIO_VER_ID_CODE register for the ALT_GPIO0 instance. */
17947 #define ALT_GPIO0_GPIO_VER_ID_CODE_ADDR ALT_GPIO_GPIO_VER_ID_CODE_ADDR(ALT_GPIO0_ADDR)
17948 /* The address of the ALT_GPIO_GPIO_CONFIG_REG2 register for the ALT_GPIO0 instance. */
17949 #define ALT_GPIO0_GPIO_CONFIG_REG2_ADDR ALT_GPIO_GPIO_CONFIG_REG2_ADDR(ALT_GPIO0_ADDR)
17950 /* The address of the ALT_GPIO_GPIO_CONFIG_REG1 register for the ALT_GPIO0 instance. */
17951 #define ALT_GPIO0_GPIO_CONFIG_REG1_ADDR ALT_GPIO_GPIO_CONFIG_REG1_ADDR(ALT_GPIO0_ADDR)
17952 /* The base address byte offset for the start of the ALT_GPIO0 component. */
17953 #define ALT_GPIO0_OFST 0xffc03200
17954 /* The start address of the ALT_GPIO0 component. */
17955 #define ALT_GPIO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GPIO0_OFST))
17956 /* The lower bound address range of the ALT_GPIO0 component. */
17957 #define ALT_GPIO0_LB_ADDR ALT_GPIO0_ADDR
17958 /* The upper bound address range of the ALT_GPIO0 component. */
17959 #define ALT_GPIO0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GPIO0_ADDR) + 0x80) - 1))
17960 
17961 
17962 /*
17963  * Component Instance : gpio1
17964  *
17965  * Instance gpio1 of component ALT_GPIO.
17966  *
17967  *
17968  */
17969 /* The address of the ALT_GPIO_GPIO_SWPORTA_DR register for the ALT_GPIO1 instance. */
17970 #define ALT_GPIO1_GPIO_SWPORTA_DR_ADDR ALT_GPIO_GPIO_SWPORTA_DR_ADDR(ALT_GPIO1_ADDR)
17971 /* The address of the ALT_GPIO_GPIO_SWPORTA_DDR register for the ALT_GPIO1 instance. */
17972 #define ALT_GPIO1_GPIO_SWPORTA_DDR_ADDR ALT_GPIO_GPIO_SWPORTA_DDR_ADDR(ALT_GPIO1_ADDR)
17973 /* The address of the ALT_GPIO_GPIO_INTEN register for the ALT_GPIO1 instance. */
17974 #define ALT_GPIO1_GPIO_INTEN_ADDR ALT_GPIO_GPIO_INTEN_ADDR(ALT_GPIO1_ADDR)
17975 /* The address of the ALT_GPIO_GPIO_INTMASK register for the ALT_GPIO1 instance. */
17976 #define ALT_GPIO1_GPIO_INTMASK_ADDR ALT_GPIO_GPIO_INTMASK_ADDR(ALT_GPIO1_ADDR)
17977 /* The address of the ALT_GPIO_GPIO_INTTYPE_LEVEL register for the ALT_GPIO1 instance. */
17978 #define ALT_GPIO1_GPIO_INTTYPE_LEVEL_ADDR ALT_GPIO_GPIO_INTTYPE_LEVEL_ADDR(ALT_GPIO1_ADDR)
17979 /* The address of the ALT_GPIO_GPIO_INT_POLARITY register for the ALT_GPIO1 instance. */
17980 #define ALT_GPIO1_GPIO_INT_POLARITY_ADDR ALT_GPIO_GPIO_INT_POLARITY_ADDR(ALT_GPIO1_ADDR)
17981 /* The address of the ALT_GPIO_GPIO_INTSTATUS register for the ALT_GPIO1 instance. */
17982 #define ALT_GPIO1_GPIO_INTSTATUS_ADDR ALT_GPIO_GPIO_INTSTATUS_ADDR(ALT_GPIO1_ADDR)
17983 /* The address of the ALT_GPIO_GPIO_RAW_INTSTATUS register for the ALT_GPIO1 instance. */
17984 #define ALT_GPIO1_GPIO_RAW_INTSTATUS_ADDR ALT_GPIO_GPIO_RAW_INTSTATUS_ADDR(ALT_GPIO1_ADDR)
17985 /* The address of the ALT_GPIO_GPIO_DEBOUNCE register for the ALT_GPIO1 instance. */
17986 #define ALT_GPIO1_GPIO_DEBOUNCE_ADDR ALT_GPIO_GPIO_DEBOUNCE_ADDR(ALT_GPIO1_ADDR)
17987 /* The address of the ALT_GPIO_GPIO_PORTA_EOI register for the ALT_GPIO1 instance. */
17988 #define ALT_GPIO1_GPIO_PORTA_EOI_ADDR ALT_GPIO_GPIO_PORTA_EOI_ADDR(ALT_GPIO1_ADDR)
17989 /* The address of the ALT_GPIO_GPIO_EXT_PORTA register for the ALT_GPIO1 instance. */
17990 #define ALT_GPIO1_GPIO_EXT_PORTA_ADDR ALT_GPIO_GPIO_EXT_PORTA_ADDR(ALT_GPIO1_ADDR)
17991 /* The address of the ALT_GPIO_GPIO_LS_SYNC register for the ALT_GPIO1 instance. */
17992 #define ALT_GPIO1_GPIO_LS_SYNC_ADDR ALT_GPIO_GPIO_LS_SYNC_ADDR(ALT_GPIO1_ADDR)
17993 /* The address of the ALT_GPIO_GPIO_ID_CODE register for the ALT_GPIO1 instance. */
17994 #define ALT_GPIO1_GPIO_ID_CODE_ADDR ALT_GPIO_GPIO_ID_CODE_ADDR(ALT_GPIO1_ADDR)
17995 /* The address of the ALT_GPIO_GPIO_VER_ID_CODE register for the ALT_GPIO1 instance. */
17996 #define ALT_GPIO1_GPIO_VER_ID_CODE_ADDR ALT_GPIO_GPIO_VER_ID_CODE_ADDR(ALT_GPIO1_ADDR)
17997 /* The address of the ALT_GPIO_GPIO_CONFIG_REG2 register for the ALT_GPIO1 instance. */
17998 #define ALT_GPIO1_GPIO_CONFIG_REG2_ADDR ALT_GPIO_GPIO_CONFIG_REG2_ADDR(ALT_GPIO1_ADDR)
17999 /* The address of the ALT_GPIO_GPIO_CONFIG_REG1 register for the ALT_GPIO1 instance. */
18000 #define ALT_GPIO1_GPIO_CONFIG_REG1_ADDR ALT_GPIO_GPIO_CONFIG_REG1_ADDR(ALT_GPIO1_ADDR)
18001 /* The base address byte offset for the start of the ALT_GPIO1 component. */
18002 #define ALT_GPIO1_OFST 0xffc03300
18003 /* The start address of the ALT_GPIO1 component. */
18004 #define ALT_GPIO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GPIO1_OFST))
18005 /* The lower bound address range of the ALT_GPIO1 component. */
18006 #define ALT_GPIO1_LB_ADDR ALT_GPIO1_ADDR
18007 /* The upper bound address range of the ALT_GPIO1 component. */
18008 #define ALT_GPIO1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GPIO1_ADDR) + 0x80) - 1))
18009 
18010 
18011 /*
18012  * Component Instance : tmr_sys0
18013  *
18014  * Instance tmr_sys0 of component ALT_TMR.
18015  *
18016  *
18017  */
18018 /* The address of the ALT_TMR_TIMER1LOADCOUNT register for the ALT_TMR_SYS0 instance. */
18019 #define ALT_TMR_SYS0_TIMER1LOADCOUNT_ADDR ALT_TMR_TIMER1LOADCOUNT_ADDR(ALT_TMR_SYS0_ADDR)
18020 /* The address of the ALT_TMR_TIMER1CURRENTVAL register for the ALT_TMR_SYS0 instance. */
18021 #define ALT_TMR_SYS0_TIMER1CURRENTVAL_ADDR ALT_TMR_TIMER1CURRENTVAL_ADDR(ALT_TMR_SYS0_ADDR)
18022 /* The address of the ALT_TMR_TIMER1CONTROLREG register for the ALT_TMR_SYS0 instance. */
18023 #define ALT_TMR_SYS0_TIMER1CONTROLREG_ADDR ALT_TMR_TIMER1CONTROLREG_ADDR(ALT_TMR_SYS0_ADDR)
18024 /* The address of the ALT_TMR_TIMER1EOI register for the ALT_TMR_SYS0 instance. */
18025 #define ALT_TMR_SYS0_TIMER1EOI_ADDR ALT_TMR_TIMER1EOI_ADDR(ALT_TMR_SYS0_ADDR)
18026 /* The address of the ALT_TMR_TIMER1INTSTAT register for the ALT_TMR_SYS0 instance. */
18027 #define ALT_TMR_SYS0_TIMER1INTSTAT_ADDR ALT_TMR_TIMER1INTSTAT_ADDR(ALT_TMR_SYS0_ADDR)
18028 /* The address of the ALT_TMR_TIMERSINTSTAT register for the ALT_TMR_SYS0 instance. */
18029 #define ALT_TMR_SYS0_TIMERSINTSTAT_ADDR ALT_TMR_TIMERSINTSTAT_ADDR(ALT_TMR_SYS0_ADDR)
18030 /* The address of the ALT_TMR_TIMERSEOI register for the ALT_TMR_SYS0 instance. */
18031 #define ALT_TMR_SYS0_TIMERSEOI_ADDR ALT_TMR_TIMERSEOI_ADDR(ALT_TMR_SYS0_ADDR)
18032 /* The address of the ALT_TMR_TIMERSRAWINTSTAT register for the ALT_TMR_SYS0 instance. */
18033 #define ALT_TMR_SYS0_TIMERSRAWINTSTAT_ADDR ALT_TMR_TIMERSRAWINTSTAT_ADDR(ALT_TMR_SYS0_ADDR)
18034 /* The address of the ALT_TMR_TIMERSCOMPVERSION register for the ALT_TMR_SYS0 instance. */
18035 #define ALT_TMR_SYS0_TIMERSCOMPVERSION_ADDR ALT_TMR_TIMERSCOMPVERSION_ADDR(ALT_TMR_SYS0_ADDR)
18036 /* The base address byte offset for the start of the ALT_TMR_SYS0 component. */
18037 #define ALT_TMR_SYS0_OFST 0xffd00000
18038 /* The start address of the ALT_TMR_SYS0 component. */
18039 #define ALT_TMR_SYS0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_TMR_SYS0_OFST))
18040 /* The lower bound address range of the ALT_TMR_SYS0 component. */
18041 #define ALT_TMR_SYS0_LB_ADDR ALT_TMR_SYS0_ADDR
18042 /* The upper bound address range of the ALT_TMR_SYS0 component. */
18043 #define ALT_TMR_SYS0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_TMR_SYS0_ADDR) + 0x100) - 1))
18044 
18045 
18046 /*
18047  * Component Instance : tmr_sys1
18048  *
18049  * Instance tmr_sys1 of component ALT_TMR.
18050  *
18051  *
18052  */
18053 /* The address of the ALT_TMR_TIMER1LOADCOUNT register for the ALT_TMR_SYS1 instance. */
18054 #define ALT_TMR_SYS1_TIMER1LOADCOUNT_ADDR ALT_TMR_TIMER1LOADCOUNT_ADDR(ALT_TMR_SYS1_ADDR)
18055 /* The address of the ALT_TMR_TIMER1CURRENTVAL register for the ALT_TMR_SYS1 instance. */
18056 #define ALT_TMR_SYS1_TIMER1CURRENTVAL_ADDR ALT_TMR_TIMER1CURRENTVAL_ADDR(ALT_TMR_SYS1_ADDR)
18057 /* The address of the ALT_TMR_TIMER1CONTROLREG register for the ALT_TMR_SYS1 instance. */
18058 #define ALT_TMR_SYS1_TIMER1CONTROLREG_ADDR ALT_TMR_TIMER1CONTROLREG_ADDR(ALT_TMR_SYS1_ADDR)
18059 /* The address of the ALT_TMR_TIMER1EOI register for the ALT_TMR_SYS1 instance. */
18060 #define ALT_TMR_SYS1_TIMER1EOI_ADDR ALT_TMR_TIMER1EOI_ADDR(ALT_TMR_SYS1_ADDR)
18061 /* The address of the ALT_TMR_TIMER1INTSTAT register for the ALT_TMR_SYS1 instance. */
18062 #define ALT_TMR_SYS1_TIMER1INTSTAT_ADDR ALT_TMR_TIMER1INTSTAT_ADDR(ALT_TMR_SYS1_ADDR)
18063 /* The address of the ALT_TMR_TIMERSINTSTAT register for the ALT_TMR_SYS1 instance. */
18064 #define ALT_TMR_SYS1_TIMERSINTSTAT_ADDR ALT_TMR_TIMERSINTSTAT_ADDR(ALT_TMR_SYS1_ADDR)
18065 /* The address of the ALT_TMR_TIMERSEOI register for the ALT_TMR_SYS1 instance. */
18066 #define ALT_TMR_SYS1_TIMERSEOI_ADDR ALT_TMR_TIMERSEOI_ADDR(ALT_TMR_SYS1_ADDR)
18067 /* The address of the ALT_TMR_TIMERSRAWINTSTAT register for the ALT_TMR_SYS1 instance. */
18068 #define ALT_TMR_SYS1_TIMERSRAWINTSTAT_ADDR ALT_TMR_TIMERSRAWINTSTAT_ADDR(ALT_TMR_SYS1_ADDR)
18069 /* The address of the ALT_TMR_TIMERSCOMPVERSION register for the ALT_TMR_SYS1 instance. */
18070 #define ALT_TMR_SYS1_TIMERSCOMPVERSION_ADDR ALT_TMR_TIMERSCOMPVERSION_ADDR(ALT_TMR_SYS1_ADDR)
18071 /* The base address byte offset for the start of the ALT_TMR_SYS1 component. */
18072 #define ALT_TMR_SYS1_OFST 0xffd00100
18073 /* The start address of the ALT_TMR_SYS1 component. */
18074 #define ALT_TMR_SYS1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_TMR_SYS1_OFST))
18075 /* The lower bound address range of the ALT_TMR_SYS1 component. */
18076 #define ALT_TMR_SYS1_LB_ADDR ALT_TMR_SYS1_ADDR
18077 /* The upper bound address range of the ALT_TMR_SYS1 component. */
18078 #define ALT_TMR_SYS1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_TMR_SYS1_ADDR) + 0x100) - 1))
18079 
18080 
18081 /*
18082  * Component Instance : wdt0
18083  *
18084  * Instance wdt0 of component ALT_WDT.
18085  *
18086  *
18087  */
18088 /* The address of the ALT_WDT_WDT_CR register for the ALT_WDT0 instance. */
18089 #define ALT_WDT0_WDT_CR_ADDR ALT_WDT_WDT_CR_ADDR(ALT_WDT0_ADDR)
18090 /* The address of the ALT_WDT_WDT_TORR register for the ALT_WDT0 instance. */
18091 #define ALT_WDT0_WDT_TORR_ADDR ALT_WDT_WDT_TORR_ADDR(ALT_WDT0_ADDR)
18092 /* The address of the ALT_WDT_WDT_CCVR register for the ALT_WDT0 instance. */
18093 #define ALT_WDT0_WDT_CCVR_ADDR ALT_WDT_WDT_CCVR_ADDR(ALT_WDT0_ADDR)
18094 /* The address of the ALT_WDT_WDT_CRR register for the ALT_WDT0 instance. */
18095 #define ALT_WDT0_WDT_CRR_ADDR ALT_WDT_WDT_CRR_ADDR(ALT_WDT0_ADDR)
18096 /* The address of the ALT_WDT_WDT_STAT register for the ALT_WDT0 instance. */
18097 #define ALT_WDT0_WDT_STAT_ADDR ALT_WDT_WDT_STAT_ADDR(ALT_WDT0_ADDR)
18098 /* The address of the ALT_WDT_WDT_EOI register for the ALT_WDT0 instance. */
18099 #define ALT_WDT0_WDT_EOI_ADDR ALT_WDT_WDT_EOI_ADDR(ALT_WDT0_ADDR)
18100 /* The address of the ALT_WDT_WDT_COMP_PARAM_5 register for the ALT_WDT0 instance. */
18101 #define ALT_WDT0_WDT_COMP_PARAM_5_ADDR ALT_WDT_WDT_COMP_PARAM_5_ADDR(ALT_WDT0_ADDR)
18102 /* The address of the ALT_WDT_WDT_COMP_PARAM_4 register for the ALT_WDT0 instance. */
18103 #define ALT_WDT0_WDT_COMP_PARAM_4_ADDR ALT_WDT_WDT_COMP_PARAM_4_ADDR(ALT_WDT0_ADDR)
18104 /* The address of the ALT_WDT_WDT_COMP_PARAM_3 register for the ALT_WDT0 instance. */
18105 #define ALT_WDT0_WDT_COMP_PARAM_3_ADDR ALT_WDT_WDT_COMP_PARAM_3_ADDR(ALT_WDT0_ADDR)
18106 /* The address of the ALT_WDT_WDT_COMP_PARAM_2 register for the ALT_WDT0 instance. */
18107 #define ALT_WDT0_WDT_COMP_PARAM_2_ADDR ALT_WDT_WDT_COMP_PARAM_2_ADDR(ALT_WDT0_ADDR)
18108 /* The address of the ALT_WDT_WDT_COMP_PARAM_1 register for the ALT_WDT0 instance. */
18109 #define ALT_WDT0_WDT_COMP_PARAM_1_ADDR ALT_WDT_WDT_COMP_PARAM_1_ADDR(ALT_WDT0_ADDR)
18110 /* The address of the ALT_WDT_WDT_COMP_VERSION register for the ALT_WDT0 instance. */
18111 #define ALT_WDT0_WDT_COMP_VERSION_ADDR ALT_WDT_WDT_COMP_VERSION_ADDR(ALT_WDT0_ADDR)
18112 /* The address of the ALT_WDT_WDT_COMP_TYPE register for the ALT_WDT0 instance. */
18113 #define ALT_WDT0_WDT_COMP_TYPE_ADDR ALT_WDT_WDT_COMP_TYPE_ADDR(ALT_WDT0_ADDR)
18114 /* The base address byte offset for the start of the ALT_WDT0 component. */
18115 #define ALT_WDT0_OFST 0xffd00200
18116 /* The start address of the ALT_WDT0 component. */
18117 #define ALT_WDT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_WDT0_OFST))
18118 /* The lower bound address range of the ALT_WDT0 component. */
18119 #define ALT_WDT0_LB_ADDR ALT_WDT0_ADDR
18120 /* The upper bound address range of the ALT_WDT0 component. */
18121 #define ALT_WDT0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_WDT0_ADDR) + 0x100) - 1))
18122 
18123 
18124 /*
18125  * Component Instance : wdt1
18126  *
18127  * Instance wdt1 of component ALT_WDT.
18128  *
18129  *
18130  */
18131 /* The address of the ALT_WDT_WDT_CR register for the ALT_WDT1 instance. */
18132 #define ALT_WDT1_WDT_CR_ADDR ALT_WDT_WDT_CR_ADDR(ALT_WDT1_ADDR)
18133 /* The address of the ALT_WDT_WDT_TORR register for the ALT_WDT1 instance. */
18134 #define ALT_WDT1_WDT_TORR_ADDR ALT_WDT_WDT_TORR_ADDR(ALT_WDT1_ADDR)
18135 /* The address of the ALT_WDT_WDT_CCVR register for the ALT_WDT1 instance. */
18136 #define ALT_WDT1_WDT_CCVR_ADDR ALT_WDT_WDT_CCVR_ADDR(ALT_WDT1_ADDR)
18137 /* The address of the ALT_WDT_WDT_CRR register for the ALT_WDT1 instance. */
18138 #define ALT_WDT1_WDT_CRR_ADDR ALT_WDT_WDT_CRR_ADDR(ALT_WDT1_ADDR)
18139 /* The address of the ALT_WDT_WDT_STAT register for the ALT_WDT1 instance. */
18140 #define ALT_WDT1_WDT_STAT_ADDR ALT_WDT_WDT_STAT_ADDR(ALT_WDT1_ADDR)
18141 /* The address of the ALT_WDT_WDT_EOI register for the ALT_WDT1 instance. */
18142 #define ALT_WDT1_WDT_EOI_ADDR ALT_WDT_WDT_EOI_ADDR(ALT_WDT1_ADDR)
18143 /* The address of the ALT_WDT_WDT_COMP_PARAM_5 register for the ALT_WDT1 instance. */
18144 #define ALT_WDT1_WDT_COMP_PARAM_5_ADDR ALT_WDT_WDT_COMP_PARAM_5_ADDR(ALT_WDT1_ADDR)
18145 /* The address of the ALT_WDT_WDT_COMP_PARAM_4 register for the ALT_WDT1 instance. */
18146 #define ALT_WDT1_WDT_COMP_PARAM_4_ADDR ALT_WDT_WDT_COMP_PARAM_4_ADDR(ALT_WDT1_ADDR)
18147 /* The address of the ALT_WDT_WDT_COMP_PARAM_3 register for the ALT_WDT1 instance. */
18148 #define ALT_WDT1_WDT_COMP_PARAM_3_ADDR ALT_WDT_WDT_COMP_PARAM_3_ADDR(ALT_WDT1_ADDR)
18149 /* The address of the ALT_WDT_WDT_COMP_PARAM_2 register for the ALT_WDT1 instance. */
18150 #define ALT_WDT1_WDT_COMP_PARAM_2_ADDR ALT_WDT_WDT_COMP_PARAM_2_ADDR(ALT_WDT1_ADDR)
18151 /* The address of the ALT_WDT_WDT_COMP_PARAM_1 register for the ALT_WDT1 instance. */
18152 #define ALT_WDT1_WDT_COMP_PARAM_1_ADDR ALT_WDT_WDT_COMP_PARAM_1_ADDR(ALT_WDT1_ADDR)
18153 /* The address of the ALT_WDT_WDT_COMP_VERSION register for the ALT_WDT1 instance. */
18154 #define ALT_WDT1_WDT_COMP_VERSION_ADDR ALT_WDT_WDT_COMP_VERSION_ADDR(ALT_WDT1_ADDR)
18155 /* The address of the ALT_WDT_WDT_COMP_TYPE register for the ALT_WDT1 instance. */
18156 #define ALT_WDT1_WDT_COMP_TYPE_ADDR ALT_WDT_WDT_COMP_TYPE_ADDR(ALT_WDT1_ADDR)
18157 /* The base address byte offset for the start of the ALT_WDT1 component. */
18158 #define ALT_WDT1_OFST 0xffd00300
18159 /* The start address of the ALT_WDT1 component. */
18160 #define ALT_WDT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_WDT1_OFST))
18161 /* The lower bound address range of the ALT_WDT1 component. */
18162 #define ALT_WDT1_LB_ADDR ALT_WDT1_ADDR
18163 /* The upper bound address range of the ALT_WDT1 component. */
18164 #define ALT_WDT1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_WDT1_ADDR) + 0x100) - 1))
18165 
18166 
18167 /*
18168  * Component Instance : wdt2
18169  *
18170  * Instance wdt2 of component ALT_WDT.
18171  *
18172  *
18173  */
18174 /* The address of the ALT_WDT_WDT_CR register for the ALT_WDT2 instance. */
18175 #define ALT_WDT2_WDT_CR_ADDR ALT_WDT_WDT_CR_ADDR(ALT_WDT2_ADDR)
18176 /* The address of the ALT_WDT_WDT_TORR register for the ALT_WDT2 instance. */
18177 #define ALT_WDT2_WDT_TORR_ADDR ALT_WDT_WDT_TORR_ADDR(ALT_WDT2_ADDR)
18178 /* The address of the ALT_WDT_WDT_CCVR register for the ALT_WDT2 instance. */
18179 #define ALT_WDT2_WDT_CCVR_ADDR ALT_WDT_WDT_CCVR_ADDR(ALT_WDT2_ADDR)
18180 /* The address of the ALT_WDT_WDT_CRR register for the ALT_WDT2 instance. */
18181 #define ALT_WDT2_WDT_CRR_ADDR ALT_WDT_WDT_CRR_ADDR(ALT_WDT2_ADDR)
18182 /* The address of the ALT_WDT_WDT_STAT register for the ALT_WDT2 instance. */
18183 #define ALT_WDT2_WDT_STAT_ADDR ALT_WDT_WDT_STAT_ADDR(ALT_WDT2_ADDR)
18184 /* The address of the ALT_WDT_WDT_EOI register for the ALT_WDT2 instance. */
18185 #define ALT_WDT2_WDT_EOI_ADDR ALT_WDT_WDT_EOI_ADDR(ALT_WDT2_ADDR)
18186 /* The address of the ALT_WDT_WDT_COMP_PARAM_5 register for the ALT_WDT2 instance. */
18187 #define ALT_WDT2_WDT_COMP_PARAM_5_ADDR ALT_WDT_WDT_COMP_PARAM_5_ADDR(ALT_WDT2_ADDR)
18188 /* The address of the ALT_WDT_WDT_COMP_PARAM_4 register for the ALT_WDT2 instance. */
18189 #define ALT_WDT2_WDT_COMP_PARAM_4_ADDR ALT_WDT_WDT_COMP_PARAM_4_ADDR(ALT_WDT2_ADDR)
18190 /* The address of the ALT_WDT_WDT_COMP_PARAM_3 register for the ALT_WDT2 instance. */
18191 #define ALT_WDT2_WDT_COMP_PARAM_3_ADDR ALT_WDT_WDT_COMP_PARAM_3_ADDR(ALT_WDT2_ADDR)
18192 /* The address of the ALT_WDT_WDT_COMP_PARAM_2 register for the ALT_WDT2 instance. */
18193 #define ALT_WDT2_WDT_COMP_PARAM_2_ADDR ALT_WDT_WDT_COMP_PARAM_2_ADDR(ALT_WDT2_ADDR)
18194 /* The address of the ALT_WDT_WDT_COMP_PARAM_1 register for the ALT_WDT2 instance. */
18195 #define ALT_WDT2_WDT_COMP_PARAM_1_ADDR ALT_WDT_WDT_COMP_PARAM_1_ADDR(ALT_WDT2_ADDR)
18196 /* The address of the ALT_WDT_WDT_COMP_VERSION register for the ALT_WDT2 instance. */
18197 #define ALT_WDT2_WDT_COMP_VERSION_ADDR ALT_WDT_WDT_COMP_VERSION_ADDR(ALT_WDT2_ADDR)
18198 /* The address of the ALT_WDT_WDT_COMP_TYPE register for the ALT_WDT2 instance. */
18199 #define ALT_WDT2_WDT_COMP_TYPE_ADDR ALT_WDT_WDT_COMP_TYPE_ADDR(ALT_WDT2_ADDR)
18200 /* The base address byte offset for the start of the ALT_WDT2 component. */
18201 #define ALT_WDT2_OFST 0xffd00400
18202 /* The start address of the ALT_WDT2 component. */
18203 #define ALT_WDT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_WDT2_OFST))
18204 /* The lower bound address range of the ALT_WDT2 component. */
18205 #define ALT_WDT2_LB_ADDR ALT_WDT2_ADDR
18206 /* The upper bound address range of the ALT_WDT2 component. */
18207 #define ALT_WDT2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_WDT2_ADDR) + 0x100) - 1))
18208 
18209 
18210 /*
18211  * Component Instance : wdt3
18212  *
18213  * Instance wdt3 of component ALT_WDT.
18214  *
18215  *
18216  */
18217 /* The address of the ALT_WDT_WDT_CR register for the ALT_WDT3 instance. */
18218 #define ALT_WDT3_WDT_CR_ADDR ALT_WDT_WDT_CR_ADDR(ALT_WDT3_ADDR)
18219 /* The address of the ALT_WDT_WDT_TORR register for the ALT_WDT3 instance. */
18220 #define ALT_WDT3_WDT_TORR_ADDR ALT_WDT_WDT_TORR_ADDR(ALT_WDT3_ADDR)
18221 /* The address of the ALT_WDT_WDT_CCVR register for the ALT_WDT3 instance. */
18222 #define ALT_WDT3_WDT_CCVR_ADDR ALT_WDT_WDT_CCVR_ADDR(ALT_WDT3_ADDR)
18223 /* The address of the ALT_WDT_WDT_CRR register for the ALT_WDT3 instance. */
18224 #define ALT_WDT3_WDT_CRR_ADDR ALT_WDT_WDT_CRR_ADDR(ALT_WDT3_ADDR)
18225 /* The address of the ALT_WDT_WDT_STAT register for the ALT_WDT3 instance. */
18226 #define ALT_WDT3_WDT_STAT_ADDR ALT_WDT_WDT_STAT_ADDR(ALT_WDT3_ADDR)
18227 /* The address of the ALT_WDT_WDT_EOI register for the ALT_WDT3 instance. */
18228 #define ALT_WDT3_WDT_EOI_ADDR ALT_WDT_WDT_EOI_ADDR(ALT_WDT3_ADDR)
18229 /* The address of the ALT_WDT_WDT_COMP_PARAM_5 register for the ALT_WDT3 instance. */
18230 #define ALT_WDT3_WDT_COMP_PARAM_5_ADDR ALT_WDT_WDT_COMP_PARAM_5_ADDR(ALT_WDT3_ADDR)
18231 /* The address of the ALT_WDT_WDT_COMP_PARAM_4 register for the ALT_WDT3 instance. */
18232 #define ALT_WDT3_WDT_COMP_PARAM_4_ADDR ALT_WDT_WDT_COMP_PARAM_4_ADDR(ALT_WDT3_ADDR)
18233 /* The address of the ALT_WDT_WDT_COMP_PARAM_3 register for the ALT_WDT3 instance. */
18234 #define ALT_WDT3_WDT_COMP_PARAM_3_ADDR ALT_WDT_WDT_COMP_PARAM_3_ADDR(ALT_WDT3_ADDR)
18235 /* The address of the ALT_WDT_WDT_COMP_PARAM_2 register for the ALT_WDT3 instance. */
18236 #define ALT_WDT3_WDT_COMP_PARAM_2_ADDR ALT_WDT_WDT_COMP_PARAM_2_ADDR(ALT_WDT3_ADDR)
18237 /* The address of the ALT_WDT_WDT_COMP_PARAM_1 register for the ALT_WDT3 instance. */
18238 #define ALT_WDT3_WDT_COMP_PARAM_1_ADDR ALT_WDT_WDT_COMP_PARAM_1_ADDR(ALT_WDT3_ADDR)
18239 /* The address of the ALT_WDT_WDT_COMP_VERSION register for the ALT_WDT3 instance. */
18240 #define ALT_WDT3_WDT_COMP_VERSION_ADDR ALT_WDT_WDT_COMP_VERSION_ADDR(ALT_WDT3_ADDR)
18241 /* The address of the ALT_WDT_WDT_COMP_TYPE register for the ALT_WDT3 instance. */
18242 #define ALT_WDT3_WDT_COMP_TYPE_ADDR ALT_WDT_WDT_COMP_TYPE_ADDR(ALT_WDT3_ADDR)
18243 /* The base address byte offset for the start of the ALT_WDT3 component. */
18244 #define ALT_WDT3_OFST 0xffd00500
18245 /* The start address of the ALT_WDT3 component. */
18246 #define ALT_WDT3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_WDT3_OFST))
18247 /* The lower bound address range of the ALT_WDT3 component. */
18248 #define ALT_WDT3_LB_ADDR ALT_WDT3_ADDR
18249 /* The upper bound address range of the ALT_WDT3 component. */
18250 #define ALT_WDT3_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_WDT3_ADDR) + 0x100) - 1))
18251 
18252 
18253 /*
18254  * Component Instance : cs_gtimer_rw_sec
18255  *
18256  * Instance cs_gtimer_rw_sec of component ALT_CS_GTIMER.
18257  *
18258  *
18259  */
18260 /* The base address byte offset for the start of the ALT_CS_GTIMER_RW_SEC component. */
18261 #define ALT_CS_GTIMER_RW_SEC_OFST 0xffd01000
18262 /* The start address of the ALT_CS_GTIMER_RW_SEC component. */
18263 #define ALT_CS_GTIMER_RW_SEC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CS_GTIMER_RW_SEC_OFST))
18264 /* The lower bound address range of the ALT_CS_GTIMER_RW_SEC component. */
18265 #define ALT_CS_GTIMER_RW_SEC_LB_ADDR ALT_CS_GTIMER_RW_SEC_ADDR
18266 /* The upper bound address range of the ALT_CS_GTIMER_RW_SEC component. */
18267 #define ALT_CS_GTIMER_RW_SEC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CS_GTIMER_RW_SEC_ADDR) + 0x1000) - 1))
18268 
18269 
18270 /*
18271  * Component Instance : cs_gtimer_ro_nsec
18272  *
18273  * Instance cs_gtimer_ro_nsec of component ALT_CS_GTIMER.
18274  *
18275  *
18276  */
18277 /* The base address byte offset for the start of the ALT_CS_GTIMER_RO_NSEC component. */
18278 #define ALT_CS_GTIMER_RO_NSEC_OFST 0xffd02000
18279 /* The start address of the ALT_CS_GTIMER_RO_NSEC component. */
18280 #define ALT_CS_GTIMER_RO_NSEC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CS_GTIMER_RO_NSEC_OFST))
18281 /* The lower bound address range of the ALT_CS_GTIMER_RO_NSEC component. */
18282 #define ALT_CS_GTIMER_RO_NSEC_LB_ADDR ALT_CS_GTIMER_RO_NSEC_ADDR
18283 /* The upper bound address range of the ALT_CS_GTIMER_RO_NSEC component. */
18284 #define ALT_CS_GTIMER_RO_NSEC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CS_GTIMER_RO_NSEC_ADDR) + 0x1000) - 1))
18285 
18286 
18287 /*
18288  * Component Instance : clkmgr
18289  *
18290  * Instance clkmgr of component ALT_CLKMGR.
18291  *
18292  *
18293  */
18294 /* The address of the ALT_CLKMGR_CTRL register for the ALT_CLKMGR instance. */
18295 #define ALT_CLKMGR_CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_CTRL_OFST))
18296 /* The address of the ALT_CLKMGR_STAT register for the ALT_CLKMGR instance. */
18297 #define ALT_CLKMGR_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_STAT_OFST))
18298 /* The address of the ALT_CLKMGR_TESTIOCTRL register for the ALT_CLKMGR instance. */
18299 #define ALT_CLKMGR_TESTIOCTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_TESTIOCTRL_OFST))
18300 /* The address of the ALT_CLKMGR_INTRGEN register for the ALT_CLKMGR instance. */
18301 #define ALT_CLKMGR_INTRGEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_INTRGEN_OFST))
18302 /* The address of the ALT_CLKMGR_INTRMSK register for the ALT_CLKMGR instance. */
18303 #define ALT_CLKMGR_INTRMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_INTRMSK_OFST))
18304 /* The address of the ALT_CLKMGR_INTRCLR register for the ALT_CLKMGR instance. */
18305 #define ALT_CLKMGR_INTRCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_INTRCLR_OFST))
18306 /* The address of the ALT_CLKMGR_INTRSTS register for the ALT_CLKMGR instance. */
18307 #define ALT_CLKMGR_INTRSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_INTRSTS_OFST))
18308 /* The address of the ALT_CLKMGR_INTRSTK register for the ALT_CLKMGR instance. */
18309 #define ALT_CLKMGR_INTRSTK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_INTRSTK_OFST))
18310 /* The address of the ALT_CLKMGR_INTRRAW register for the ALT_CLKMGR instance. */
18311 #define ALT_CLKMGR_INTRRAW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_INTRRAW_OFST))
18312 /* The base address byte offset for the start of the ALT_CLKMGR component. */
18313 #define ALT_CLKMGR_OFST 0xffd10000
18314 /* The start address of the ALT_CLKMGR component. */
18315 #define ALT_CLKMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_OFST))
18316 /* The lower bound address range of the ALT_CLKMGR component. */
18317 #define ALT_CLKMGR_LB_ADDR ALT_CLKMGR_ADDR
18318 /* The upper bound address range of the ALT_CLKMGR component. */
18319 #define ALT_CLKMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_ADDR) + 0x2c) - 1))
18320 
18321 
18322 /*
18323  * Component Instance : clkmgr_mainpll
18324  *
18325  * Instance clkmgr_mainpll of component ALT_CLKMGR_MAINPLL.
18326  *
18327  *
18328  */
18329 /* The address of the ALT_CLKMGR_MAINPLL_EN register for the ALT_CLKMGR_MAINPLL instance. */
18330 #define ALT_CLKMGR_MAINPLL_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_EN_OFST))
18331 /* The address of the ALT_CLKMGR_MAINPLL_ENS register for the ALT_CLKMGR_MAINPLL instance. */
18332 #define ALT_CLKMGR_MAINPLL_ENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_ENS_OFST))
18333 /* The address of the ALT_CLKMGR_MAINPLL_ENR register for the ALT_CLKMGR_MAINPLL instance. */
18334 #define ALT_CLKMGR_MAINPLL_ENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_ENR_OFST))
18335 /* The address of the ALT_CLKMGR_MAINPLL_BYPASS register for the ALT_CLKMGR_MAINPLL instance. */
18336 #define ALT_CLKMGR_MAINPLL_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_BYPASS_OFST))
18337 /* The address of the ALT_CLKMGR_MAINPLL_BYPASSS register for the ALT_CLKMGR_MAINPLL instance. */
18338 #define ALT_CLKMGR_MAINPLL_BYPASSS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_BYPASSS_OFST))
18339 /* The address of the ALT_CLKMGR_MAINPLL_BYPASSR register for the ALT_CLKMGR_MAINPLL instance. */
18340 #define ALT_CLKMGR_MAINPLL_BYPASSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_BYPASSR_OFST))
18341 /* The address of the ALT_CLKMGR_MAINPLL_MPUCLK register for the ALT_CLKMGR_MAINPLL instance. */
18342 #define ALT_CLKMGR_MAINPLL_MPUCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_MPUCLK_OFST))
18343 /* The address of the ALT_CLKMGR_MAINPLL_NOCCLK register for the ALT_CLKMGR_MAINPLL instance. */
18344 #define ALT_CLKMGR_MAINPLL_NOCCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_NOCCLK_OFST))
18345 /* The address of the ALT_CLKMGR_MAINPLL_CNTR2CLK register for the ALT_CLKMGR_MAINPLL instance. */
18346 #define ALT_CLKMGR_MAINPLL_CNTR2CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR2CLK_OFST))
18347 /* The address of the ALT_CLKMGR_MAINPLL_CNTR3CLK register for the ALT_CLKMGR_MAINPLL instance. */
18348 #define ALT_CLKMGR_MAINPLL_CNTR3CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR3CLK_OFST))
18349 /* The address of the ALT_CLKMGR_MAINPLL_CNTR4CLK register for the ALT_CLKMGR_MAINPLL instance. */
18350 #define ALT_CLKMGR_MAINPLL_CNTR4CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR4CLK_OFST))
18351 /* The address of the ALT_CLKMGR_MAINPLL_CNTR5CLK register for the ALT_CLKMGR_MAINPLL instance. */
18352 #define ALT_CLKMGR_MAINPLL_CNTR5CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR5CLK_OFST))
18353 /* The address of the ALT_CLKMGR_MAINPLL_CNTR6CLK register for the ALT_CLKMGR_MAINPLL instance. */
18354 #define ALT_CLKMGR_MAINPLL_CNTR6CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR6CLK_OFST))
18355 /* The address of the ALT_CLKMGR_MAINPLL_CNTR7CLK register for the ALT_CLKMGR_MAINPLL instance. */
18356 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR7CLK_OFST))
18357 /* The address of the ALT_CLKMGR_MAINPLL_CNTR8CLK register for the ALT_CLKMGR_MAINPLL instance. */
18358 #define ALT_CLKMGR_MAINPLL_CNTR8CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR8CLK_OFST))
18359 /* The address of the ALT_CLKMGR_MAINPLL_CNTR9CLK register for the ALT_CLKMGR_MAINPLL instance. */
18360 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR9CLK_OFST))
18361 /* The address of the ALT_CLKMGR_MAINPLL_NOCDIV register for the ALT_CLKMGR_MAINPLL instance. */
18362 #define ALT_CLKMGR_MAINPLL_NOCDIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_NOCDIV_OFST))
18363 /* The address of the ALT_CLKMGR_MAINPLL_PLLGLOB register for the ALT_CLKMGR_MAINPLL instance. */
18364 #define ALT_CLKMGR_MAINPLL_PLLGLOB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_PLLGLOB_OFST))
18365 /* The address of the ALT_CLKMGR_MAINPLL_FDBCK register for the ALT_CLKMGR_MAINPLL instance. */
18366 #define ALT_CLKMGR_MAINPLL_FDBCK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_FDBCK_OFST))
18367 /* The address of the ALT_CLKMGR_MAINPLL_MEM register for the ALT_CLKMGR_MAINPLL instance. */
18368 #define ALT_CLKMGR_MAINPLL_MEM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_MEM_OFST))
18369 /* The address of the ALT_CLKMGR_MAINPLL_MEMSTAT register for the ALT_CLKMGR_MAINPLL instance. */
18370 #define ALT_CLKMGR_MAINPLL_MEMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_MEMSTAT_OFST))
18371 /* The address of the ALT_CLKMGR_MAINPLL_PLLC0 register for the ALT_CLKMGR_MAINPLL instance. */
18372 #define ALT_CLKMGR_MAINPLL_PLLC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_PLLC0_OFST))
18373 /* The address of the ALT_CLKMGR_MAINPLL_PLLC1 register for the ALT_CLKMGR_MAINPLL instance. */
18374 #define ALT_CLKMGR_MAINPLL_PLLC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_PLLC1_OFST))
18375 /* The address of the ALT_CLKMGR_MAINPLL_VCOCALIB register for the ALT_CLKMGR_MAINPLL instance. */
18376 #define ALT_CLKMGR_MAINPLL_VCOCALIB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_VCOCALIB_OFST))
18377 /* The base address byte offset for the start of the ALT_CLKMGR_MAINPLL component. */
18378 #define ALT_CLKMGR_MAINPLL_OFST 0xffd10030
18379 /* The start address of the ALT_CLKMGR_MAINPLL component. */
18380 #define ALT_CLKMGR_MAINPLL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_MAINPLL_OFST))
18381 /* The lower bound address range of the ALT_CLKMGR_MAINPLL component. */
18382 #define ALT_CLKMGR_MAINPLL_LB_ADDR ALT_CLKMGR_MAINPLL_ADDR
18383 /* The upper bound address range of the ALT_CLKMGR_MAINPLL component. */
18384 #define ALT_CLKMGR_MAINPLL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + 0x70) - 1))
18385 
18386 
18387 /*
18388  * Component Instance : clkmgr_perpll
18389  *
18390  * Instance clkmgr_perpll of component ALT_CLKMGR_PERPLL.
18391  *
18392  *
18393  */
18394 /* The address of the ALT_CLKMGR_PERPLL_EN register for the ALT_CLKMGR_PERPLL instance. */
18395 #define ALT_CLKMGR_PERPLL_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_EN_OFST))
18396 /* The address of the ALT_CLKMGR_PERPLL_ENS register for the ALT_CLKMGR_PERPLL instance. */
18397 #define ALT_CLKMGR_PERPLL_ENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_ENS_OFST))
18398 /* The address of the ALT_CLKMGR_PERPLL_ENR register for the ALT_CLKMGR_PERPLL instance. */
18399 #define ALT_CLKMGR_PERPLL_ENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_ENR_OFST))
18400 /* The address of the ALT_CLKMGR_PERPLL_BYPASS register for the ALT_CLKMGR_PERPLL instance. */
18401 #define ALT_CLKMGR_PERPLL_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_BYPASS_OFST))
18402 /* The address of the ALT_CLKMGR_PERPLL_BYPASSS register for the ALT_CLKMGR_PERPLL instance. */
18403 #define ALT_CLKMGR_PERPLL_BYPASSS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_BYPASSS_OFST))
18404 /* The address of the ALT_CLKMGR_PERPLL_BYPASSR register for the ALT_CLKMGR_PERPLL instance. */
18405 #define ALT_CLKMGR_PERPLL_BYPASSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_BYPASSR_OFST))
18406 /* The address of the ALT_CLKMGR_PERPLL_CNTR2CLK register for the ALT_CLKMGR_PERPLL instance. */
18407 #define ALT_CLKMGR_PERPLL_CNTR2CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR2CLK_OFST))
18408 /* The address of the ALT_CLKMGR_PERPLL_CNTR3CLK register for the ALT_CLKMGR_PERPLL instance. */
18409 #define ALT_CLKMGR_PERPLL_CNTR3CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR3CLK_OFST))
18410 /* The address of the ALT_CLKMGR_PERPLL_CNTR4CLK register for the ALT_CLKMGR_PERPLL instance. */
18411 #define ALT_CLKMGR_PERPLL_CNTR4CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR4CLK_OFST))
18412 /* The address of the ALT_CLKMGR_PERPLL_CNTR5CLK register for the ALT_CLKMGR_PERPLL instance. */
18413 #define ALT_CLKMGR_PERPLL_CNTR5CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR5CLK_OFST))
18414 /* The address of the ALT_CLKMGR_PERPLL_CNTR6CLK register for the ALT_CLKMGR_PERPLL instance. */
18415 #define ALT_CLKMGR_PERPLL_CNTR6CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR6CLK_OFST))
18416 /* The address of the ALT_CLKMGR_PERPLL_CNTR7CLK register for the ALT_CLKMGR_PERPLL instance. */
18417 #define ALT_CLKMGR_PERPLL_CNTR7CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR7CLK_OFST))
18418 /* The address of the ALT_CLKMGR_PERPLL_CNTR8CLK register for the ALT_CLKMGR_PERPLL instance. */
18419 #define ALT_CLKMGR_PERPLL_CNTR8CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR8CLK_OFST))
18420 /* The address of the ALT_CLKMGR_PERPLL_CNTR9CLK register for the ALT_CLKMGR_PERPLL instance. */
18421 #define ALT_CLKMGR_PERPLL_CNTR9CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR9CLK_OFST))
18422 /* The address of the ALT_CLKMGR_PERPLL_EMACCTL register for the ALT_CLKMGR_PERPLL instance. */
18423 #define ALT_CLKMGR_PERPLL_EMACCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_EMACCTL_OFST))
18424 /* The address of the ALT_CLKMGR_PERPLL_GPIODIV register for the ALT_CLKMGR_PERPLL instance. */
18425 #define ALT_CLKMGR_PERPLL_GPIODIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_GPIODIV_OFST))
18426 /* The address of the ALT_CLKMGR_PERPLL_PLLGLOB register for the ALT_CLKMGR_PERPLL instance. */
18427 #define ALT_CLKMGR_PERPLL_PLLGLOB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_PLLGLOB_OFST))
18428 /* The address of the ALT_CLKMGR_PERPLL_FDBCK register for the ALT_CLKMGR_PERPLL instance. */
18429 #define ALT_CLKMGR_PERPLL_FDBCK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_FDBCK_OFST))
18430 /* The address of the ALT_CLKMGR_PERPLL_MEM register for the ALT_CLKMGR_PERPLL instance. */
18431 #define ALT_CLKMGR_PERPLL_MEM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_MEM_OFST))
18432 /* The address of the ALT_CLKMGR_PERPLL_MEMSTAT register for the ALT_CLKMGR_PERPLL instance. */
18433 #define ALT_CLKMGR_PERPLL_MEMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_MEMSTAT_OFST))
18434 /* The address of the ALT_CLKMGR_PERPLL_PLLC0 register for the ALT_CLKMGR_PERPLL instance. */
18435 #define ALT_CLKMGR_PERPLL_PLLC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_PLLC0_OFST))
18436 /* The address of the ALT_CLKMGR_PERPLL_PLLC1 register for the ALT_CLKMGR_PERPLL instance. */
18437 #define ALT_CLKMGR_PERPLL_PLLC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_PLLC1_OFST))
18438 /* The address of the ALT_CLKMGR_PERPLL_VCOCALIB register for the ALT_CLKMGR_PERPLL instance. */
18439 #define ALT_CLKMGR_PERPLL_VCOCALIB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_VCOCALIB_OFST))
18440 /* The base address byte offset for the start of the ALT_CLKMGR_PERPLL component. */
18441 #define ALT_CLKMGR_PERPLL_OFST 0xffd100a4
18442 /* The start address of the ALT_CLKMGR_PERPLL component. */
18443 #define ALT_CLKMGR_PERPLL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_PERPLL_OFST))
18444 /* The lower bound address range of the ALT_CLKMGR_PERPLL component. */
18445 #define ALT_CLKMGR_PERPLL_LB_ADDR ALT_CLKMGR_PERPLL_ADDR
18446 /* The upper bound address range of the ALT_CLKMGR_PERPLL component. */
18447 #define ALT_CLKMGR_PERPLL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + 0x80) - 1))
18448 
18449 
18450 /*
18451  * Component Instance : clkmgr_altera
18452  *
18453  * Instance clkmgr_altera of component ALT_CLKMGR_ALTERA.
18454  *
18455  *
18456  */
18457 /* The address of the ALT_CLKMGR_ALTERA_JTAG register for the ALT_CLKMGR_ALTERA instance. */
18458 #define ALT_CLKMGR_ALTERA_JTAG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ALTERA_ADDR) + ALT_CLKMGR_ALTERA_JTAG_OFST))
18459 /* The base address byte offset for the start of the ALT_CLKMGR_ALTERA component. */
18460 #define ALT_CLKMGR_ALTERA_OFST 0xffd10128
18461 /* The start address of the ALT_CLKMGR_ALTERA component. */
18462 #define ALT_CLKMGR_ALTERA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_ALTERA_OFST))
18463 /* The lower bound address range of the ALT_CLKMGR_ALTERA component. */
18464 #define ALT_CLKMGR_ALTERA_LB_ADDR ALT_CLKMGR_ALTERA_ADDR
18465 /* The upper bound address range of the ALT_CLKMGR_ALTERA component. */
18466 #define ALT_CLKMGR_ALTERA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_ALTERA_ADDR) + 0x20) - 1))
18467 
18468 
18469 /*
18470  * Component Instance : rstmgr
18471  *
18472  * Instance rstmgr of component ALT_RSTMGR.
18473  *
18474  *
18475  */
18476 /* The address of the ALT_RSTMGR_STAT register for the ALT_RSTMGR instance. */
18477 #define ALT_RSTMGR_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_STAT_OFST))
18478 /* The address of the ALT_RSTMGR_MPURSTSTAT register for the ALT_RSTMGR instance. */
18479 #define ALT_RSTMGR_MPURSTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_MPURSTSTAT_OFST))
18480 /* The address of the ALT_RSTMGR_MISCSTAT register for the ALT_RSTMGR instance. */
18481 #define ALT_RSTMGR_MISCSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_MISCSTAT_OFST))
18482 /* The address of the ALT_RSTMGR_HDSKEN register for the ALT_RSTMGR instance. */
18483 #define ALT_RSTMGR_HDSKEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKEN_OFST))
18484 /* The address of the ALT_RSTMGR_HDSKREQ register for the ALT_RSTMGR instance. */
18485 #define ALT_RSTMGR_HDSKREQ_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKREQ_OFST))
18486 /* The address of the ALT_RSTMGR_HDSKACK register for the ALT_RSTMGR instance. */
18487 #define ALT_RSTMGR_HDSKACK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKACK_OFST))
18488 /* The address of the ALT_RSTMGR_HDSKSTALL register for the ALT_RSTMGR instance. */
18489 #define ALT_RSTMGR_HDSKSTALL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKSTALL_OFST))
18490 /* The address of the ALT_RSTMGR_MPUMODRST register for the ALT_RSTMGR instance. */
18491 #define ALT_RSTMGR_MPUMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_MPUMODRST_OFST))
18492 /* The address of the ALT_RSTMGR_PER0MODRST register for the ALT_RSTMGR instance. */
18493 #define ALT_RSTMGR_PER0MODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_PER0MODRST_OFST))
18494 /* The address of the ALT_RSTMGR_PER1MODRST register for the ALT_RSTMGR instance. */
18495 #define ALT_RSTMGR_PER1MODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_PER1MODRST_OFST))
18496 /* The address of the ALT_RSTMGR_BRGMODRST register for the ALT_RSTMGR instance. */
18497 #define ALT_RSTMGR_BRGMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_BRGMODRST_OFST))
18498 /* The address of the ALT_RSTMGR_COLDMODRST register for the ALT_RSTMGR instance. */
18499 #define ALT_RSTMGR_COLDMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_COLDMODRST_OFST))
18500 /* The address of the ALT_RSTMGR_DBGMODRST register for the ALT_RSTMGR instance. */
18501 #define ALT_RSTMGR_DBGMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_DBGMODRST_OFST))
18502 /* The address of the ALT_RSTMGR_TAPMODRST register for the ALT_RSTMGR instance. */
18503 #define ALT_RSTMGR_TAPMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_TAPMODRST_OFST))
18504 /* The address of the ALT_RSTMGR_BRGWARMMASK register for the ALT_RSTMGR instance. */
18505 #define ALT_RSTMGR_BRGWARMMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_BRGWARMMASK_OFST))
18506 /* The address of the ALT_RSTMGR_TSTSTA register for the ALT_RSTMGR instance. */
18507 #define ALT_RSTMGR_TSTSTA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_TSTSTA_OFST))
18508 /* The address of the ALT_RSTMGR_HDSKTIMEOUT register for the ALT_RSTMGR instance. */
18509 #define ALT_RSTMGR_HDSKTIMEOUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKTIMEOUT_OFST))
18510 /* The address of the ALT_RSTMGR_MPUL2FLUSHTIMEOUT register for the ALT_RSTMGR instance. */
18511 #define ALT_RSTMGR_MPUL2FLUSHTIMEOUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_MPUL2FLUSHTIMEOUT_OFST))
18512 /* The address of the ALT_RSTMGR_DBGHDSKTIMEOUT register for the ALT_RSTMGR instance. */
18513 #define ALT_RSTMGR_DBGHDSKTIMEOUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_DBGHDSKTIMEOUT_OFST))
18514 /* The address of the ALT_RSTMGR_OCRAMLOAD register for the ALT_RSTMGR instance. */
18515 #define ALT_RSTMGR_OCRAMLOAD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_OCRAMLOAD_OFST))
18516 /* The base address byte offset for the start of the ALT_RSTMGR component. */
18517 #define ALT_RSTMGR_OFST 0xffd11000
18518 /* The start address of the ALT_RSTMGR component. */
18519 #define ALT_RSTMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_RSTMGR_OFST))
18520 /* The lower bound address range of the ALT_RSTMGR component. */
18521 #define ALT_RSTMGR_LB_ADDR ALT_RSTMGR_ADDR
18522 /* The upper bound address range of the ALT_RSTMGR component. */
18523 #define ALT_RSTMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_RSTMGR_ADDR) + 0x100) - 1))
18524 
18525 
18526 /*
18527  * Component Instance : sysmgr_core
18528  *
18529  * Instance sysmgr_core of component ALT_SYSMGR_CORE.
18530  *
18531  *
18532  */
18533 /* The address of the ALT_SYSMGR_CORE_SILICONID1 register for the ALT_SYSMGR_CORE instance. */
18534 #define ALT_SYSMGR_CORE_SILICONID1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_SILICONID1_OFST))
18535 /* The address of the ALT_SYSMGR_CORE_SILICONID2 register for the ALT_SYSMGR_CORE instance. */
18536 #define ALT_SYSMGR_CORE_SILICONID2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_SILICONID2_OFST))
18537 /* The address of the ALT_SYSMGR_CORE_WDDBG register for the ALT_SYSMGR_CORE instance. */
18538 #define ALT_SYSMGR_CORE_WDDBG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_WDDBG_OFST))
18539 /* The address of the ALT_SYSMGR_CORE_MPU_STATUS register for the ALT_SYSMGR_CORE instance. */
18540 #define ALT_SYSMGR_CORE_MPU_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_MPU_STATUS_OFST))
18541 /* The address of the ALT_SYSMGR_CORE_MPU_ACE register for the ALT_SYSMGR_CORE instance. */
18542 #define ALT_SYSMGR_CORE_MPU_ACE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_MPU_ACE_OFST))
18543 /* The address of the ALT_SYSMGR_CORE_DMA register for the ALT_SYSMGR_CORE instance. */
18544 #define ALT_SYSMGR_CORE_DMA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_DMA_OFST))
18545 /* The address of the ALT_SYSMGR_CORE_DMA_PERIPH register for the ALT_SYSMGR_CORE instance. */
18546 #define ALT_SYSMGR_CORE_DMA_PERIPH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_DMA_PERIPH_OFST))
18547 /* The address of the ALT_SYSMGR_CORE_SDMMC register for the ALT_SYSMGR_CORE instance. */
18548 #define ALT_SYSMGR_CORE_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_SDMMC_OFST))
18549 /* The address of the ALT_SYSMGR_CORE_SDMMC_L3MASTER register for the ALT_SYSMGR_CORE instance. */
18550 #define ALT_SYSMGR_CORE_SDMMC_L3MASTER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_SDMMC_L3MASTER_OFST))
18551 /* The address of the ALT_SYSMGR_CORE_NAND_BOOTSTRAP register for the ALT_SYSMGR_CORE instance. */
18552 #define ALT_SYSMGR_CORE_NAND_BOOTSTRAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_NAND_BOOTSTRAP_OFST))
18553 /* The address of the ALT_SYSMGR_CORE_NAND_L3MASTER register for the ALT_SYSMGR_CORE instance. */
18554 #define ALT_SYSMGR_CORE_NAND_L3MASTER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_NAND_L3MASTER_OFST))
18555 /* The address of the ALT_SYSMGR_CORE_USB0_L3MASTER register for the ALT_SYSMGR_CORE instance. */
18556 #define ALT_SYSMGR_CORE_USB0_L3MASTER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_USB0_L3MASTER_OFST))
18557 /* The address of the ALT_SYSMGR_CORE_USB1_L3MASTER register for the ALT_SYSMGR_CORE instance. */
18558 #define ALT_SYSMGR_CORE_USB1_L3MASTER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_USB1_L3MASTER_OFST))
18559 /* The address of the ALT_SYSMGR_CORE_EMAC_GLOBAL register for the ALT_SYSMGR_CORE instance. */
18560 #define ALT_SYSMGR_CORE_EMAC_GLOBAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_EMAC_GLOBAL_OFST))
18561 /* The address of the ALT_SYSMGR_CORE_EMAC0 register for the ALT_SYSMGR_CORE instance. */
18562 #define ALT_SYSMGR_CORE_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_EMAC0_OFST))
18563 /* The address of the ALT_SYSMGR_CORE_EMAC1 register for the ALT_SYSMGR_CORE instance. */
18564 #define ALT_SYSMGR_CORE_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_EMAC1_OFST))
18565 /* The address of the ALT_SYSMGR_CORE_EMAC2 register for the ALT_SYSMGR_CORE instance. */
18566 #define ALT_SYSMGR_CORE_EMAC2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_EMAC2_OFST))
18567 /* The address of the ALT_SYSMGR_CORE_EMAC0_ACE register for the ALT_SYSMGR_CORE instance. */
18568 #define ALT_SYSMGR_CORE_EMAC0_ACE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_EMAC0_ACE_OFST))
18569 /* The address of the ALT_SYSMGR_CORE_EMAC1_ACE register for the ALT_SYSMGR_CORE instance. */
18570 #define ALT_SYSMGR_CORE_EMAC1_ACE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_EMAC1_ACE_OFST))
18571 /* The address of the ALT_SYSMGR_CORE_EMAC2_ACE register for the ALT_SYSMGR_CORE instance. */
18572 #define ALT_SYSMGR_CORE_EMAC2_ACE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_EMAC2_ACE_OFST))
18573 /* The address of the ALT_SYSMGR_CORE_NAND_AXUSER register for the ALT_SYSMGR_CORE instance. */
18574 #define ALT_SYSMGR_CORE_NAND_AXUSER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_NAND_AXUSER_OFST))
18575 /* The address of the ALT_SYSMGR_CORE_FPGAINTF_EN_1 register for the ALT_SYSMGR_CORE instance. */
18576 #define ALT_SYSMGR_CORE_FPGAINTF_EN_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_FPGAINTF_EN_1_OFST))
18577 /* The address of the ALT_SYSMGR_CORE_FPGAINTF_EN_2 register for the ALT_SYSMGR_CORE instance. */
18578 #define ALT_SYSMGR_CORE_FPGAINTF_EN_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_FPGAINTF_EN_2_OFST))
18579 /* The address of the ALT_SYSMGR_CORE_FPGAINTF_EN_3 register for the ALT_SYSMGR_CORE instance. */
18580 #define ALT_SYSMGR_CORE_FPGAINTF_EN_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_FPGAINTF_EN_3_OFST))
18581 /* The address of the ALT_SYSMGR_CORE_DMA_L3MASTER register for the ALT_SYSMGR_CORE instance. */
18582 #define ALT_SYSMGR_CORE_DMA_L3MASTER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_DMA_L3MASTER_OFST))
18583 /* The address of the ALT_SYSMGR_CORE_ETR_L3MASTER register for the ALT_SYSMGR_CORE instance. */
18584 #define ALT_SYSMGR_CORE_ETR_L3MASTER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_ETR_L3MASTER_OFST))
18585 /* The address of the ALT_SYSMGR_CORE_SEC_CTRL_SLT register for the ALT_SYSMGR_CORE instance. */
18586 #define ALT_SYSMGR_CORE_SEC_CTRL_SLT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_SEC_CTRL_SLT_OFST))
18587 /* The address of the ALT_SYSMGR_CORE_OSC_TRIM register for the ALT_SYSMGR_CORE instance. */
18588 #define ALT_SYSMGR_CORE_OSC_TRIM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_OSC_TRIM_OFST))
18589 /* The address of the ALT_SYSMGR_CORE_ECC_INTMASK_VALUE register for the ALT_SYSMGR_CORE instance. */
18590 #define ALT_SYSMGR_CORE_ECC_INTMASK_VALUE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_ECC_INTMASK_VALUE_OFST))
18591 /* The address of the ALT_SYSMGR_CORE_ECC_INTMASK_SET register for the ALT_SYSMGR_CORE instance. */
18592 #define ALT_SYSMGR_CORE_ECC_INTMASK_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_ECC_INTMASK_SET_OFST))
18593 /* The address of the ALT_SYSMGR_CORE_ECC_INTMASK_CLR register for the ALT_SYSMGR_CORE instance. */
18594 #define ALT_SYSMGR_CORE_ECC_INTMASK_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_ECC_INTMASK_CLR_OFST))
18595 /* The address of the ALT_SYSMGR_CORE_ECC_INTSTATUS_SERR register for the ALT_SYSMGR_CORE instance. */
18596 #define ALT_SYSMGR_CORE_ECC_INTSTATUS_SERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_ECC_INTSTATUS_SERR_OFST))
18597 /* The address of the ALT_SYSMGR_CORE_ECC_INTSTATUS_DERR register for the ALT_SYSMGR_CORE instance. */
18598 #define ALT_SYSMGR_CORE_ECC_INTSTATUS_DERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_ECC_INTSTATUS_DERR_OFST))
18599 /* The address of the ALT_SYSMGR_CORE_NOC_ADDR_REMAP register for the ALT_SYSMGR_CORE instance. */
18600 #define ALT_SYSMGR_CORE_NOC_ADDR_REMAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_NOC_ADDR_REMAP_OFST))
18601 /* The address of the ALT_SYSMGR_CORE_HMC_CLK register for the ALT_SYSMGR_CORE instance. */
18602 #define ALT_SYSMGR_CORE_HMC_CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_HMC_CLK_OFST))
18603 /* The address of the ALT_SYSMGR_CORE_IO_PA_CTRL register for the ALT_SYSMGR_CORE instance. */
18604 #define ALT_SYSMGR_CORE_IO_PA_CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_IO_PA_CTRL_OFST))
18605 /* The address of the ALT_SYSMGR_CORE_NOC_TIMEOUT register for the ALT_SYSMGR_CORE instance. */
18606 #define ALT_SYSMGR_CORE_NOC_TIMEOUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_NOC_TIMEOUT_OFST))
18607 /* The address of the ALT_SYSMGR_CORE_NOC_IDLEREQ_SET register for the ALT_SYSMGR_CORE instance. */
18608 #define ALT_SYSMGR_CORE_NOC_IDLEREQ_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_NOC_IDLEREQ_SET_OFST))
18609 /* The address of the ALT_SYSMGR_CORE_NOC_IDLEREQ_CLR register for the ALT_SYSMGR_CORE instance. */
18610 #define ALT_SYSMGR_CORE_NOC_IDLEREQ_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_NOC_IDLEREQ_CLR_OFST))
18611 /* The address of the ALT_SYSMGR_CORE_NOC_IDLEREQ_VALUE register for the ALT_SYSMGR_CORE instance. */
18612 #define ALT_SYSMGR_CORE_NOC_IDLEREQ_VALUE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_NOC_IDLEREQ_VALUE_OFST))
18613 /* The address of the ALT_SYSMGR_CORE_NOC_IDLEACK register for the ALT_SYSMGR_CORE instance. */
18614 #define ALT_SYSMGR_CORE_NOC_IDLEACK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_NOC_IDLEACK_OFST))
18615 /* The address of the ALT_SYSMGR_CORE_NOC_IDLESTATUS register for the ALT_SYSMGR_CORE instance. */
18616 #define ALT_SYSMGR_CORE_NOC_IDLESTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_NOC_IDLESTATUS_OFST))
18617 /* The address of the ALT_SYSMGR_CORE_FPGA2SOC_CTRL register for the ALT_SYSMGR_CORE instance. */
18618 #define ALT_SYSMGR_CORE_FPGA2SOC_CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_FPGA2SOC_CTRL_OFST))
18619 /* The address of the ALT_SYSMGR_CORE_FPGA_CONFIG register for the ALT_SYSMGR_CORE instance. */
18620 #define ALT_SYSMGR_CORE_FPGA_CONFIG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_FPGA_CONFIG_OFST))
18621 /* The address of the ALT_SYSMGR_CORE_IOCSRCLK_GATE register for the ALT_SYSMGR_CORE instance. */
18622 #define ALT_SYSMGR_CORE_IOCSRCLK_GATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_IOCSRCLK_GATE_OFST))
18623 /* The address of the ALT_SYSMGR_CORE_GPO register for the ALT_SYSMGR_CORE instance. */
18624 #define ALT_SYSMGR_CORE_GPO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_GPO_OFST))
18625 /* The address of the ALT_SYSMGR_CORE_GPI register for the ALT_SYSMGR_CORE instance. */
18626 #define ALT_SYSMGR_CORE_GPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_GPI_OFST))
18627 /* The address of the ALT_SYSMGR_CORE_MPU register for the ALT_SYSMGR_CORE instance. */
18628 #define ALT_SYSMGR_CORE_MPU_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_MPU_OFST))
18629 /* The address of the ALT_SYSMGR_CORE_SDM_HPS_SPARE register for the ALT_SYSMGR_CORE instance. */
18630 #define ALT_SYSMGR_CORE_SDM_HPS_SPARE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_SDM_HPS_SPARE_OFST))
18631 /* The address of the ALT_SYSMGR_CORE_HPS_SDM_SPARE register for the ALT_SYSMGR_CORE instance. */
18632 #define ALT_SYSMGR_CORE_HPS_SDM_SPARE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_HPS_SDM_SPARE_OFST))
18633 /* The address of the ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD0 register for the ALT_SYSMGR_CORE instance. */
18634 #define ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD0_OFST))
18635 /* The address of the ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD1 register for the ALT_SYSMGR_CORE instance. */
18636 #define ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD1_OFST))
18637 /* The address of the ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD2 register for the ALT_SYSMGR_CORE instance. */
18638 #define ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD2_OFST))
18639 /* The address of the ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD3 register for the ALT_SYSMGR_CORE instance. */
18640 #define ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD3_OFST))
18641 /* The address of the ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD4 register for the ALT_SYSMGR_CORE instance. */
18642 #define ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD4_OFST))
18643 /* The address of the ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD5 register for the ALT_SYSMGR_CORE instance. */
18644 #define ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD5_OFST))
18645 /* The address of the ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD6 register for the ALT_SYSMGR_CORE instance. */
18646 #define ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD6_OFST))
18647 /* The address of the ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD7 register for the ALT_SYSMGR_CORE instance. */
18648 #define ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD7_OFST))
18649 /* The address of the ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD8 register for the ALT_SYSMGR_CORE instance. */
18650 #define ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD8_OFST))
18651 /* The address of the ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD9 register for the ALT_SYSMGR_CORE instance. */
18652 #define ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + ALT_SYSMGR_CORE_BOOT_SCRATCH_COLD9_OFST))
18653 /* The base address byte offset for the start of the ALT_SYSMGR_CORE component. */
18654 #define ALT_SYSMGR_CORE_OFST 0xffd12000
18655 /* The start address of the ALT_SYSMGR_CORE component. */
18656 #define ALT_SYSMGR_CORE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SYSMGR_CORE_OFST))
18657 /* The lower bound address range of the ALT_SYSMGR_CORE component. */
18658 #define ALT_SYSMGR_CORE_LB_ADDR ALT_SYSMGR_CORE_ADDR
18659 /* The upper bound address range of the ALT_SYSMGR_CORE component. */
18660 #define ALT_SYSMGR_CORE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_CORE_ADDR) + 0x500) - 1))
18661 
18662 
18663 /*
18664  * Component Instance : pinmux
18665  *
18666  * Instance pinmux of component ALT_PINMUX.
18667  *
18668  *
18669  */
18670 /* The address of the ALT_PINMUX_PIN0SEL register for the ALT_PINMUX instance. */
18671 #define ALT_PINMUX_PIN0SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN0SEL_OFST))
18672 /* The address of the ALT_PINMUX_PIN1SEL register for the ALT_PINMUX instance. */
18673 #define ALT_PINMUX_PIN1SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN1SEL_OFST))
18674 /* The address of the ALT_PINMUX_PIN2SEL register for the ALT_PINMUX instance. */
18675 #define ALT_PINMUX_PIN2SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN2SEL_OFST))
18676 /* The address of the ALT_PINMUX_PIN3SEL register for the ALT_PINMUX instance. */
18677 #define ALT_PINMUX_PIN3SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN3SEL_OFST))
18678 /* The address of the ALT_PINMUX_PIN4SEL register for the ALT_PINMUX instance. */
18679 #define ALT_PINMUX_PIN4SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN4SEL_OFST))
18680 /* The address of the ALT_PINMUX_PIN5SEL register for the ALT_PINMUX instance. */
18681 #define ALT_PINMUX_PIN5SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN5SEL_OFST))
18682 /* The address of the ALT_PINMUX_PIN6SEL register for the ALT_PINMUX instance. */
18683 #define ALT_PINMUX_PIN6SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN6SEL_OFST))
18684 /* The address of the ALT_PINMUX_PIN7SEL register for the ALT_PINMUX instance. */
18685 #define ALT_PINMUX_PIN7SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN7SEL_OFST))
18686 /* The address of the ALT_PINMUX_PIN8SEL register for the ALT_PINMUX instance. */
18687 #define ALT_PINMUX_PIN8SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN8SEL_OFST))
18688 /* The address of the ALT_PINMUX_PIN9SEL register for the ALT_PINMUX instance. */
18689 #define ALT_PINMUX_PIN9SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN9SEL_OFST))
18690 /* The address of the ALT_PINMUX_PIN10SEL register for the ALT_PINMUX instance. */
18691 #define ALT_PINMUX_PIN10SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN10SEL_OFST))
18692 /* The address of the ALT_PINMUX_PIN11SEL register for the ALT_PINMUX instance. */
18693 #define ALT_PINMUX_PIN11SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN11SEL_OFST))
18694 /* The address of the ALT_PINMUX_PIN12SEL register for the ALT_PINMUX instance. */
18695 #define ALT_PINMUX_PIN12SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN12SEL_OFST))
18696 /* The address of the ALT_PINMUX_PIN13SEL register for the ALT_PINMUX instance. */
18697 #define ALT_PINMUX_PIN13SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN13SEL_OFST))
18698 /* The address of the ALT_PINMUX_PIN14SEL register for the ALT_PINMUX instance. */
18699 #define ALT_PINMUX_PIN14SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN14SEL_OFST))
18700 /* The address of the ALT_PINMUX_PIN15SEL register for the ALT_PINMUX instance. */
18701 #define ALT_PINMUX_PIN15SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN15SEL_OFST))
18702 /* The address of the ALT_PINMUX_PIN16SEL register for the ALT_PINMUX instance. */
18703 #define ALT_PINMUX_PIN16SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN16SEL_OFST))
18704 /* The address of the ALT_PINMUX_PIN17SEL register for the ALT_PINMUX instance. */
18705 #define ALT_PINMUX_PIN17SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN17SEL_OFST))
18706 /* The address of the ALT_PINMUX_PIN18SEL register for the ALT_PINMUX instance. */
18707 #define ALT_PINMUX_PIN18SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN18SEL_OFST))
18708 /* The address of the ALT_PINMUX_PIN19SEL register for the ALT_PINMUX instance. */
18709 #define ALT_PINMUX_PIN19SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN19SEL_OFST))
18710 /* The address of the ALT_PINMUX_PIN20SEL register for the ALT_PINMUX instance. */
18711 #define ALT_PINMUX_PIN20SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN20SEL_OFST))
18712 /* The address of the ALT_PINMUX_PIN21SEL register for the ALT_PINMUX instance. */
18713 #define ALT_PINMUX_PIN21SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN21SEL_OFST))
18714 /* The address of the ALT_PINMUX_PIN22SEL register for the ALT_PINMUX instance. */
18715 #define ALT_PINMUX_PIN22SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN22SEL_OFST))
18716 /* The address of the ALT_PINMUX_PIN23SEL register for the ALT_PINMUX instance. */
18717 #define ALT_PINMUX_PIN23SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN23SEL_OFST))
18718 /* The address of the ALT_PINMUX_PIN24SEL register for the ALT_PINMUX instance. */
18719 #define ALT_PINMUX_PIN24SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN24SEL_OFST))
18720 /* The address of the ALT_PINMUX_PIN25SEL register for the ALT_PINMUX instance. */
18721 #define ALT_PINMUX_PIN25SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN25SEL_OFST))
18722 /* The address of the ALT_PINMUX_PIN26SEL register for the ALT_PINMUX instance. */
18723 #define ALT_PINMUX_PIN26SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN26SEL_OFST))
18724 /* The address of the ALT_PINMUX_PIN27SEL register for the ALT_PINMUX instance. */
18725 #define ALT_PINMUX_PIN27SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN27SEL_OFST))
18726 /* The address of the ALT_PINMUX_PIN28SEL register for the ALT_PINMUX instance. */
18727 #define ALT_PINMUX_PIN28SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN28SEL_OFST))
18728 /* The address of the ALT_PINMUX_PIN29SEL register for the ALT_PINMUX instance. */
18729 #define ALT_PINMUX_PIN29SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN29SEL_OFST))
18730 /* The address of the ALT_PINMUX_PIN30SEL register for the ALT_PINMUX instance. */
18731 #define ALT_PINMUX_PIN30SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN30SEL_OFST))
18732 /* The address of the ALT_PINMUX_PIN31SEL register for the ALT_PINMUX instance. */
18733 #define ALT_PINMUX_PIN31SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN31SEL_OFST))
18734 /* The address of the ALT_PINMUX_PIN32SEL register for the ALT_PINMUX instance. */
18735 #define ALT_PINMUX_PIN32SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN32SEL_OFST))
18736 /* The address of the ALT_PINMUX_PIN33SEL register for the ALT_PINMUX instance. */
18737 #define ALT_PINMUX_PIN33SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN33SEL_OFST))
18738 /* The address of the ALT_PINMUX_PIN34SEL register for the ALT_PINMUX instance. */
18739 #define ALT_PINMUX_PIN34SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN34SEL_OFST))
18740 /* The address of the ALT_PINMUX_PIN35SEL register for the ALT_PINMUX instance. */
18741 #define ALT_PINMUX_PIN35SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN35SEL_OFST))
18742 /* The address of the ALT_PINMUX_PIN36SEL register for the ALT_PINMUX instance. */
18743 #define ALT_PINMUX_PIN36SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN36SEL_OFST))
18744 /* The address of the ALT_PINMUX_PIN37SEL register for the ALT_PINMUX instance. */
18745 #define ALT_PINMUX_PIN37SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN37SEL_OFST))
18746 /* The address of the ALT_PINMUX_PIN38SEL register for the ALT_PINMUX instance. */
18747 #define ALT_PINMUX_PIN38SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN38SEL_OFST))
18748 /* The address of the ALT_PINMUX_PIN39SEL register for the ALT_PINMUX instance. */
18749 #define ALT_PINMUX_PIN39SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN39SEL_OFST))
18750 /* The address of the ALT_PINMUX_PIN40SEL register for the ALT_PINMUX instance. */
18751 #define ALT_PINMUX_PIN40SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN40SEL_OFST))
18752 /* The address of the ALT_PINMUX_PIN41SEL register for the ALT_PINMUX instance. */
18753 #define ALT_PINMUX_PIN41SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN41SEL_OFST))
18754 /* The address of the ALT_PINMUX_PIN42SEL register for the ALT_PINMUX instance. */
18755 #define ALT_PINMUX_PIN42SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN42SEL_OFST))
18756 /* The address of the ALT_PINMUX_PIN43SEL register for the ALT_PINMUX instance. */
18757 #define ALT_PINMUX_PIN43SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN43SEL_OFST))
18758 /* The address of the ALT_PINMUX_PIN44SEL register for the ALT_PINMUX instance. */
18759 #define ALT_PINMUX_PIN44SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN44SEL_OFST))
18760 /* The address of the ALT_PINMUX_PIN45SEL register for the ALT_PINMUX instance. */
18761 #define ALT_PINMUX_PIN45SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN45SEL_OFST))
18762 /* The address of the ALT_PINMUX_PIN46SEL register for the ALT_PINMUX instance. */
18763 #define ALT_PINMUX_PIN46SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN46SEL_OFST))
18764 /* The address of the ALT_PINMUX_PIN47SEL register for the ALT_PINMUX instance. */
18765 #define ALT_PINMUX_PIN47SEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PIN47SEL_OFST))
18766 /* The address of the ALT_PINMUX_IO0CTRL register for the ALT_PINMUX instance. */
18767 #define ALT_PINMUX_IO0CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO0CTRL_OFST))
18768 /* The address of the ALT_PINMUX_IO1CTRL register for the ALT_PINMUX instance. */
18769 #define ALT_PINMUX_IO1CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO1CTRL_OFST))
18770 /* The address of the ALT_PINMUX_IO2CTRL register for the ALT_PINMUX instance. */
18771 #define ALT_PINMUX_IO2CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO2CTRL_OFST))
18772 /* The address of the ALT_PINMUX_IO3CTRL register for the ALT_PINMUX instance. */
18773 #define ALT_PINMUX_IO3CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO3CTRL_OFST))
18774 /* The address of the ALT_PINMUX_IO4CTRL register for the ALT_PINMUX instance. */
18775 #define ALT_PINMUX_IO4CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO4CTRL_OFST))
18776 /* The address of the ALT_PINMUX_IO5CTRL register for the ALT_PINMUX instance. */
18777 #define ALT_PINMUX_IO5CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO5CTRL_OFST))
18778 /* The address of the ALT_PINMUX_IO6CTRL register for the ALT_PINMUX instance. */
18779 #define ALT_PINMUX_IO6CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO6CTRL_OFST))
18780 /* The address of the ALT_PINMUX_IO7CTRL register for the ALT_PINMUX instance. */
18781 #define ALT_PINMUX_IO7CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO7CTRL_OFST))
18782 /* The address of the ALT_PINMUX_IO8CTRL register for the ALT_PINMUX instance. */
18783 #define ALT_PINMUX_IO8CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO8CTRL_OFST))
18784 /* The address of the ALT_PINMUX_IO9CTRL register for the ALT_PINMUX instance. */
18785 #define ALT_PINMUX_IO9CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO9CTRL_OFST))
18786 /* The address of the ALT_PINMUX_IO10CTRL register for the ALT_PINMUX instance. */
18787 #define ALT_PINMUX_IO10CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO10CTRL_OFST))
18788 /* The address of the ALT_PINMUX_IO11CTRL register for the ALT_PINMUX instance. */
18789 #define ALT_PINMUX_IO11CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO11CTRL_OFST))
18790 /* The address of the ALT_PINMUX_IO12CTRL register for the ALT_PINMUX instance. */
18791 #define ALT_PINMUX_IO12CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO12CTRL_OFST))
18792 /* The address of the ALT_PINMUX_IO13CTRL register for the ALT_PINMUX instance. */
18793 #define ALT_PINMUX_IO13CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO13CTRL_OFST))
18794 /* The address of the ALT_PINMUX_IO14CTRL register for the ALT_PINMUX instance. */
18795 #define ALT_PINMUX_IO14CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO14CTRL_OFST))
18796 /* The address of the ALT_PINMUX_IO15CTRL register for the ALT_PINMUX instance. */
18797 #define ALT_PINMUX_IO15CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO15CTRL_OFST))
18798 /* The address of the ALT_PINMUX_IO16CTRL register for the ALT_PINMUX instance. */
18799 #define ALT_PINMUX_IO16CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO16CTRL_OFST))
18800 /* The address of the ALT_PINMUX_IO17CTRL register for the ALT_PINMUX instance. */
18801 #define ALT_PINMUX_IO17CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO17CTRL_OFST))
18802 /* The address of the ALT_PINMUX_IO18CTRL register for the ALT_PINMUX instance. */
18803 #define ALT_PINMUX_IO18CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO18CTRL_OFST))
18804 /* The address of the ALT_PINMUX_IO19CTRL register for the ALT_PINMUX instance. */
18805 #define ALT_PINMUX_IO19CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO19CTRL_OFST))
18806 /* The address of the ALT_PINMUX_IO20CTRL register for the ALT_PINMUX instance. */
18807 #define ALT_PINMUX_IO20CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO20CTRL_OFST))
18808 /* The address of the ALT_PINMUX_IO21CTRL register for the ALT_PINMUX instance. */
18809 #define ALT_PINMUX_IO21CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO21CTRL_OFST))
18810 /* The address of the ALT_PINMUX_IO22CTRL register for the ALT_PINMUX instance. */
18811 #define ALT_PINMUX_IO22CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO22CTRL_OFST))
18812 /* The address of the ALT_PINMUX_IO23CTRL register for the ALT_PINMUX instance. */
18813 #define ALT_PINMUX_IO23CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO23CTRL_OFST))
18814 /* The address of the ALT_PINMUX_IO24CTRL register for the ALT_PINMUX instance. */
18815 #define ALT_PINMUX_IO24CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO24CTRL_OFST))
18816 /* The address of the ALT_PINMUX_IO25CTRL register for the ALT_PINMUX instance. */
18817 #define ALT_PINMUX_IO25CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO25CTRL_OFST))
18818 /* The address of the ALT_PINMUX_IO26CTRL register for the ALT_PINMUX instance. */
18819 #define ALT_PINMUX_IO26CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO26CTRL_OFST))
18820 /* The address of the ALT_PINMUX_IO27CTRL register for the ALT_PINMUX instance. */
18821 #define ALT_PINMUX_IO27CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO27CTRL_OFST))
18822 /* The address of the ALT_PINMUX_IO28CTRL register for the ALT_PINMUX instance. */
18823 #define ALT_PINMUX_IO28CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO28CTRL_OFST))
18824 /* The address of the ALT_PINMUX_IO29CTRL register for the ALT_PINMUX instance. */
18825 #define ALT_PINMUX_IO29CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO29CTRL_OFST))
18826 /* The address of the ALT_PINMUX_IO30CTRL register for the ALT_PINMUX instance. */
18827 #define ALT_PINMUX_IO30CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO30CTRL_OFST))
18828 /* The address of the ALT_PINMUX_IO31CTRL register for the ALT_PINMUX instance. */
18829 #define ALT_PINMUX_IO31CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO31CTRL_OFST))
18830 /* The address of the ALT_PINMUX_IO32CTRL register for the ALT_PINMUX instance. */
18831 #define ALT_PINMUX_IO32CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO32CTRL_OFST))
18832 /* The address of the ALT_PINMUX_IO33CTRL register for the ALT_PINMUX instance. */
18833 #define ALT_PINMUX_IO33CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO33CTRL_OFST))
18834 /* The address of the ALT_PINMUX_IO34CTRL register for the ALT_PINMUX instance. */
18835 #define ALT_PINMUX_IO34CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO34CTRL_OFST))
18836 /* The address of the ALT_PINMUX_IO35CTRL register for the ALT_PINMUX instance. */
18837 #define ALT_PINMUX_IO35CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO35CTRL_OFST))
18838 /* The address of the ALT_PINMUX_IO36CTRL register for the ALT_PINMUX instance. */
18839 #define ALT_PINMUX_IO36CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO36CTRL_OFST))
18840 /* The address of the ALT_PINMUX_IO37CTRL register for the ALT_PINMUX instance. */
18841 #define ALT_PINMUX_IO37CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO37CTRL_OFST))
18842 /* The address of the ALT_PINMUX_IO38CTRL register for the ALT_PINMUX instance. */
18843 #define ALT_PINMUX_IO38CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO38CTRL_OFST))
18844 /* The address of the ALT_PINMUX_IO39CTRL register for the ALT_PINMUX instance. */
18845 #define ALT_PINMUX_IO39CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO39CTRL_OFST))
18846 /* The address of the ALT_PINMUX_IO40CTRL register for the ALT_PINMUX instance. */
18847 #define ALT_PINMUX_IO40CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO40CTRL_OFST))
18848 /* The address of the ALT_PINMUX_IO41CTRL register for the ALT_PINMUX instance. */
18849 #define ALT_PINMUX_IO41CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO41CTRL_OFST))
18850 /* The address of the ALT_PINMUX_IO42CTRL register for the ALT_PINMUX instance. */
18851 #define ALT_PINMUX_IO42CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO42CTRL_OFST))
18852 /* The address of the ALT_PINMUX_IO43CTRL register for the ALT_PINMUX instance. */
18853 #define ALT_PINMUX_IO43CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO43CTRL_OFST))
18854 /* The address of the ALT_PINMUX_IO44CTRL register for the ALT_PINMUX instance. */
18855 #define ALT_PINMUX_IO44CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO44CTRL_OFST))
18856 /* The address of the ALT_PINMUX_IO45CTRL register for the ALT_PINMUX instance. */
18857 #define ALT_PINMUX_IO45CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO45CTRL_OFST))
18858 /* The address of the ALT_PINMUX_IO46CTRL register for the ALT_PINMUX instance. */
18859 #define ALT_PINMUX_IO46CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO46CTRL_OFST))
18860 /* The address of the ALT_PINMUX_IO47CTRL register for the ALT_PINMUX instance. */
18861 #define ALT_PINMUX_IO47CTRL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO47CTRL_OFST))
18862 /* The address of the ALT_PINMUX_PINMUX_EMAC0_USEFPGA register for the ALT_PINMUX instance. */
18863 #define ALT_PINMUX_PINMUX_EMAC0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_EMAC0_USEFPGA_OFST))
18864 /* The address of the ALT_PINMUX_PINMUX_EMAC1_USEFPGA register for the ALT_PINMUX instance. */
18865 #define ALT_PINMUX_PINMUX_EMAC1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_EMAC1_USEFPGA_OFST))
18866 /* The address of the ALT_PINMUX_PINMUX_EMAC2_USEFPGA register for the ALT_PINMUX instance. */
18867 #define ALT_PINMUX_PINMUX_EMAC2_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_EMAC2_USEFPGA_OFST))
18868 /* The address of the ALT_PINMUX_PINMUX_I2C0_USEFPGA register for the ALT_PINMUX instance. */
18869 #define ALT_PINMUX_PINMUX_I2C0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_I2C0_USEFPGA_OFST))
18870 /* The address of the ALT_PINMUX_PINMUX_I2C1_USEFPGA register for the ALT_PINMUX instance. */
18871 #define ALT_PINMUX_PINMUX_I2C1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_I2C1_USEFPGA_OFST))
18872 /* The address of the ALT_PINMUX_PINMUX_I2C_EMAC0_USEFPGA register for the ALT_PINMUX instance. */
18873 #define ALT_PINMUX_PINMUX_I2C_EMAC0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_I2C_EMAC0_USEFPGA_OFST))
18874 /* The address of the ALT_PINMUX_PINMUX_I2C_EMAC1_USEFPGA register for the ALT_PINMUX instance. */
18875 #define ALT_PINMUX_PINMUX_I2C_EMAC1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_I2C_EMAC1_USEFPGA_OFST))
18876 /* The address of the ALT_PINMUX_PINMUX_I2C_EMAC2_USEFPGA register for the ALT_PINMUX instance. */
18877 #define ALT_PINMUX_PINMUX_I2C_EMAC2_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_I2C_EMAC2_USEFPGA_OFST))
18878 /* The address of the ALT_PINMUX_PINMUX_NAND_USEFPGA register for the ALT_PINMUX instance. */
18879 #define ALT_PINMUX_PINMUX_NAND_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_NAND_USEFPGA_OFST))
18880 /* The address of the ALT_PINMUX_PINMUX_SPIM0_USEFPGA register for the ALT_PINMUX instance. */
18881 #define ALT_PINMUX_PINMUX_SPIM0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_SPIM0_USEFPGA_OFST))
18882 /* The address of the ALT_PINMUX_PINMUX_SPIM1_USEFPGA register for the ALT_PINMUX instance. */
18883 #define ALT_PINMUX_PINMUX_SPIM1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_SPIM1_USEFPGA_OFST))
18884 /* The address of the ALT_PINMUX_PINMUX_SPIS0_USEFPGA register for the ALT_PINMUX instance. */
18885 #define ALT_PINMUX_PINMUX_SPIS0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_SPIS0_USEFPGA_OFST))
18886 /* The address of the ALT_PINMUX_PINMUX_SPIS1_USEFPGA register for the ALT_PINMUX instance. */
18887 #define ALT_PINMUX_PINMUX_SPIS1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_SPIS1_USEFPGA_OFST))
18888 /* The address of the ALT_PINMUX_PINMUX_UART0_USEFPGA register for the ALT_PINMUX instance. */
18889 #define ALT_PINMUX_PINMUX_UART0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_UART0_USEFPGA_OFST))
18890 /* The address of the ALT_PINMUX_PINMUX_UART1_USEFPGA register for the ALT_PINMUX instance. */
18891 #define ALT_PINMUX_PINMUX_UART1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_UART1_USEFPGA_OFST))
18892 /* The address of the ALT_PINMUX_PINMUX_MDIO0_USEFPGA register for the ALT_PINMUX instance. */
18893 #define ALT_PINMUX_PINMUX_MDIO0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_MDIO0_USEFPGA_OFST))
18894 /* The address of the ALT_PINMUX_PINMUX_MDIO1_USEFPGA register for the ALT_PINMUX instance. */
18895 #define ALT_PINMUX_PINMUX_MDIO1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_MDIO1_USEFPGA_OFST))
18896 /* The address of the ALT_PINMUX_PINMUX_MDIO2_USEFPGA register for the ALT_PINMUX instance. */
18897 #define ALT_PINMUX_PINMUX_MDIO2_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_MDIO2_USEFPGA_OFST))
18898 /* The address of the ALT_PINMUX_PINMUX_JTAG_USEFPGA register for the ALT_PINMUX instance. */
18899 #define ALT_PINMUX_PINMUX_JTAG_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_JTAG_USEFPGA_OFST))
18900 /* The address of the ALT_PINMUX_PINMUX_SDMMC_USEFPGA register for the ALT_PINMUX instance. */
18901 #define ALT_PINMUX_PINMUX_SDMMC_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_PINMUX_SDMMC_USEFPGA_OFST))
18902 /* The address of the ALT_PINMUX_HPS_OSC_CLK register for the ALT_PINMUX instance. */
18903 #define ALT_PINMUX_HPS_OSC_CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_HPS_OSC_CLK_OFST))
18904 /* The address of the ALT_PINMUX_IO0_DELAY register for the ALT_PINMUX instance. */
18905 #define ALT_PINMUX_IO0_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO0_DELAY_OFST))
18906 /* The address of the ALT_PINMUX_IO1_DELAY register for the ALT_PINMUX instance. */
18907 #define ALT_PINMUX_IO1_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO1_DELAY_OFST))
18908 /* The address of the ALT_PINMUX_IO2_DELAY register for the ALT_PINMUX instance. */
18909 #define ALT_PINMUX_IO2_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO2_DELAY_OFST))
18910 /* The address of the ALT_PINMUX_IO3_DELAY register for the ALT_PINMUX instance. */
18911 #define ALT_PINMUX_IO3_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO3_DELAY_OFST))
18912 /* The address of the ALT_PINMUX_IO4_DELAY register for the ALT_PINMUX instance. */
18913 #define ALT_PINMUX_IO4_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO4_DELAY_OFST))
18914 /* The address of the ALT_PINMUX_IO5_DELAY register for the ALT_PINMUX instance. */
18915 #define ALT_PINMUX_IO5_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO5_DELAY_OFST))
18916 /* The address of the ALT_PINMUX_IO6_DELAY register for the ALT_PINMUX instance. */
18917 #define ALT_PINMUX_IO6_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO6_DELAY_OFST))
18918 /* The address of the ALT_PINMUX_IO7_DELAY register for the ALT_PINMUX instance. */
18919 #define ALT_PINMUX_IO7_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO7_DELAY_OFST))
18920 /* The address of the ALT_PINMUX_IO8_DELAY register for the ALT_PINMUX instance. */
18921 #define ALT_PINMUX_IO8_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO8_DELAY_OFST))
18922 /* The address of the ALT_PINMUX_IO9_DELAY register for the ALT_PINMUX instance. */
18923 #define ALT_PINMUX_IO9_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO9_DELAY_OFST))
18924 /* The address of the ALT_PINMUX_IO10_DELAY register for the ALT_PINMUX instance. */
18925 #define ALT_PINMUX_IO10_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO10_DELAY_OFST))
18926 /* The address of the ALT_PINMUX_IO11_DELAY register for the ALT_PINMUX instance. */
18927 #define ALT_PINMUX_IO11_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO11_DELAY_OFST))
18928 /* The address of the ALT_PINMUX_IO12_DELAY register for the ALT_PINMUX instance. */
18929 #define ALT_PINMUX_IO12_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO12_DELAY_OFST))
18930 /* The address of the ALT_PINMUX_IO13_DELAY register for the ALT_PINMUX instance. */
18931 #define ALT_PINMUX_IO13_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO13_DELAY_OFST))
18932 /* The address of the ALT_PINMUX_IO14_DELAY register for the ALT_PINMUX instance. */
18933 #define ALT_PINMUX_IO14_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO14_DELAY_OFST))
18934 /* The address of the ALT_PINMUX_IO15_DELAY register for the ALT_PINMUX instance. */
18935 #define ALT_PINMUX_IO15_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO15_DELAY_OFST))
18936 /* The address of the ALT_PINMUX_IO16_DELAY register for the ALT_PINMUX instance. */
18937 #define ALT_PINMUX_IO16_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO16_DELAY_OFST))
18938 /* The address of the ALT_PINMUX_IO17_DELAY register for the ALT_PINMUX instance. */
18939 #define ALT_PINMUX_IO17_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO17_DELAY_OFST))
18940 /* The address of the ALT_PINMUX_IO18_DELAY register for the ALT_PINMUX instance. */
18941 #define ALT_PINMUX_IO18_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO18_DELAY_OFST))
18942 /* The address of the ALT_PINMUX_IO19_DELAY register for the ALT_PINMUX instance. */
18943 #define ALT_PINMUX_IO19_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO19_DELAY_OFST))
18944 /* The address of the ALT_PINMUX_IO20_DELAY register for the ALT_PINMUX instance. */
18945 #define ALT_PINMUX_IO20_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO20_DELAY_OFST))
18946 /* The address of the ALT_PINMUX_IO21_DELAY register for the ALT_PINMUX instance. */
18947 #define ALT_PINMUX_IO21_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO21_DELAY_OFST))
18948 /* The address of the ALT_PINMUX_IO22_DELAY register for the ALT_PINMUX instance. */
18949 #define ALT_PINMUX_IO22_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO22_DELAY_OFST))
18950 /* The address of the ALT_PINMUX_IO23_DELAY register for the ALT_PINMUX instance. */
18951 #define ALT_PINMUX_IO23_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO23_DELAY_OFST))
18952 /* The address of the ALT_PINMUX_IO24_DELAY register for the ALT_PINMUX instance. */
18953 #define ALT_PINMUX_IO24_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO24_DELAY_OFST))
18954 /* The address of the ALT_PINMUX_IO25_DELAY register for the ALT_PINMUX instance. */
18955 #define ALT_PINMUX_IO25_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO25_DELAY_OFST))
18956 /* The address of the ALT_PINMUX_IO26_DELAY register for the ALT_PINMUX instance. */
18957 #define ALT_PINMUX_IO26_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO26_DELAY_OFST))
18958 /* The address of the ALT_PINMUX_IO27_DELAY register for the ALT_PINMUX instance. */
18959 #define ALT_PINMUX_IO27_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO27_DELAY_OFST))
18960 /* The address of the ALT_PINMUX_IO28_DELAY register for the ALT_PINMUX instance. */
18961 #define ALT_PINMUX_IO28_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO28_DELAY_OFST))
18962 /* The address of the ALT_PINMUX_IO29_DELAY register for the ALT_PINMUX instance. */
18963 #define ALT_PINMUX_IO29_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO29_DELAY_OFST))
18964 /* The address of the ALT_PINMUX_IO30_DELAY register for the ALT_PINMUX instance. */
18965 #define ALT_PINMUX_IO30_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO30_DELAY_OFST))
18966 /* The address of the ALT_PINMUX_IO31_DELAY register for the ALT_PINMUX instance. */
18967 #define ALT_PINMUX_IO31_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO31_DELAY_OFST))
18968 /* The address of the ALT_PINMUX_IO32_DELAY register for the ALT_PINMUX instance. */
18969 #define ALT_PINMUX_IO32_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO32_DELAY_OFST))
18970 /* The address of the ALT_PINMUX_IO33_DELAY register for the ALT_PINMUX instance. */
18971 #define ALT_PINMUX_IO33_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO33_DELAY_OFST))
18972 /* The address of the ALT_PINMUX_IO34_DELAY register for the ALT_PINMUX instance. */
18973 #define ALT_PINMUX_IO34_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO34_DELAY_OFST))
18974 /* The address of the ALT_PINMUX_IO35_DELAY register for the ALT_PINMUX instance. */
18975 #define ALT_PINMUX_IO35_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO35_DELAY_OFST))
18976 /* The address of the ALT_PINMUX_IO36_DELAY register for the ALT_PINMUX instance. */
18977 #define ALT_PINMUX_IO36_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO36_DELAY_OFST))
18978 /* The address of the ALT_PINMUX_IO37_DELAY register for the ALT_PINMUX instance. */
18979 #define ALT_PINMUX_IO37_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO37_DELAY_OFST))
18980 /* The address of the ALT_PINMUX_IO38_DELAY register for the ALT_PINMUX instance. */
18981 #define ALT_PINMUX_IO38_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO38_DELAY_OFST))
18982 /* The address of the ALT_PINMUX_IO39_DELAY register for the ALT_PINMUX instance. */
18983 #define ALT_PINMUX_IO39_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO39_DELAY_OFST))
18984 /* The address of the ALT_PINMUX_IO40_DELAY register for the ALT_PINMUX instance. */
18985 #define ALT_PINMUX_IO40_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO40_DELAY_OFST))
18986 /* The address of the ALT_PINMUX_IO41_DELAY register for the ALT_PINMUX instance. */
18987 #define ALT_PINMUX_IO41_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO41_DELAY_OFST))
18988 /* The address of the ALT_PINMUX_IO42_DELAY register for the ALT_PINMUX instance. */
18989 #define ALT_PINMUX_IO42_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO42_DELAY_OFST))
18990 /* The address of the ALT_PINMUX_IO43_DELAY register for the ALT_PINMUX instance. */
18991 #define ALT_PINMUX_IO43_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO43_DELAY_OFST))
18992 /* The address of the ALT_PINMUX_IO44_DELAY register for the ALT_PINMUX instance. */
18993 #define ALT_PINMUX_IO44_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO44_DELAY_OFST))
18994 /* The address of the ALT_PINMUX_IO45_DELAY register for the ALT_PINMUX instance. */
18995 #define ALT_PINMUX_IO45_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO45_DELAY_OFST))
18996 /* The address of the ALT_PINMUX_IO46_DELAY register for the ALT_PINMUX instance. */
18997 #define ALT_PINMUX_IO46_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO46_DELAY_OFST))
18998 /* The address of the ALT_PINMUX_IO47_DELAY register for the ALT_PINMUX instance. */
18999 #define ALT_PINMUX_IO47_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_ADDR) + ALT_PINMUX_IO47_DELAY_OFST))
19000 /* The base address byte offset for the start of the ALT_PINMUX component. */
19001 #define ALT_PINMUX_OFST 0xffd13000
19002 /* The start address of the ALT_PINMUX component. */
19003 #define ALT_PINMUX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_PINMUX_OFST))
19004 /* The lower bound address range of the ALT_PINMUX component. */
19005 #define ALT_PINMUX_LB_ADDR ALT_PINMUX_ADDR
19006 /* The upper bound address range of the ALT_PINMUX component. */
19007 #define ALT_PINMUX_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_PINMUX_ADDR) + 0x1000) - 1))
19008 
19009 
19010 /*
19011  * Component Instance : noc_fw_l4_per_scr
19012  *
19013  * Instance noc_fw_l4_per_scr of component ALT_NOC_FW_L4_PER_SCR.
19014  *
19015  *
19016  */
19017 /* The address of the ALT_NOC_FW_L4_PER_SCR_NAND_REGISTER register for the ALT_NOC_FW_L4_PER_SCR instance. */
19018 #define ALT_NOC_FW_L4_PER_SCR_NAND_REGISTER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_NAND_REGISTER_OFST))
19019 /* The address of the ALT_NOC_FW_L4_PER_SCR_NAND_DATA register for the ALT_NOC_FW_L4_PER_SCR instance. */
19020 #define ALT_NOC_FW_L4_PER_SCR_NAND_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_NAND_DATA_OFST))
19021 /* The address of the ALT_NOC_FW_L4_PER_SCR_USB0_REGISTER register for the ALT_NOC_FW_L4_PER_SCR instance. */
19022 #define ALT_NOC_FW_L4_PER_SCR_USB0_REGISTER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_USB0_REGISTER_OFST))
19023 /* The address of the ALT_NOC_FW_L4_PER_SCR_USB1_REGISTER register for the ALT_NOC_FW_L4_PER_SCR instance. */
19024 #define ALT_NOC_FW_L4_PER_SCR_USB1_REGISTER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_USB1_REGISTER_OFST))
19025 /* The address of the ALT_NOC_FW_L4_PER_SCR_SPI_MASTER0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19026 #define ALT_NOC_FW_L4_PER_SCR_SPI_MASTER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SPI_MASTER0_OFST))
19027 /* The address of the ALT_NOC_FW_L4_PER_SCR_SPI_MASTER1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19028 #define ALT_NOC_FW_L4_PER_SCR_SPI_MASTER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SPI_MASTER1_OFST))
19029 /* The address of the ALT_NOC_FW_L4_PER_SCR_SPI_SLAVE0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19030 #define ALT_NOC_FW_L4_PER_SCR_SPI_SLAVE0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SPI_SLAVE0_OFST))
19031 /* The address of the ALT_NOC_FW_L4_PER_SCR_SPI_SLAVE1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19032 #define ALT_NOC_FW_L4_PER_SCR_SPI_SLAVE1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SPI_SLAVE1_OFST))
19033 /* The address of the ALT_NOC_FW_L4_PER_SCR_EMAC0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19034 #define ALT_NOC_FW_L4_PER_SCR_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_EMAC0_OFST))
19035 /* The address of the ALT_NOC_FW_L4_PER_SCR_EMAC1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19036 #define ALT_NOC_FW_L4_PER_SCR_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_EMAC1_OFST))
19037 /* The address of the ALT_NOC_FW_L4_PER_SCR_EMAC2 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19038 #define ALT_NOC_FW_L4_PER_SCR_EMAC2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_EMAC2_OFST))
19039 /* The address of the ALT_NOC_FW_L4_PER_SCR_SDMMC register for the ALT_NOC_FW_L4_PER_SCR instance. */
19040 #define ALT_NOC_FW_L4_PER_SCR_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SDMMC_OFST))
19041 /* The address of the ALT_NOC_FW_L4_PER_SCR_GPIO0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19042 #define ALT_NOC_FW_L4_PER_SCR_GPIO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_GPIO0_OFST))
19043 /* The address of the ALT_NOC_FW_L4_PER_SCR_GPIO1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19044 #define ALT_NOC_FW_L4_PER_SCR_GPIO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_GPIO1_OFST))
19045 /* The address of the ALT_NOC_FW_L4_PER_SCR_I2C0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19046 #define ALT_NOC_FW_L4_PER_SCR_I2C0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C0_OFST))
19047 /* The address of the ALT_NOC_FW_L4_PER_SCR_I2C1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19048 #define ALT_NOC_FW_L4_PER_SCR_I2C1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C1_OFST))
19049 /* The address of the ALT_NOC_FW_L4_PER_SCR_I2C2 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19050 #define ALT_NOC_FW_L4_PER_SCR_I2C2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C2_OFST))
19051 /* The address of the ALT_NOC_FW_L4_PER_SCR_I2C3 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19052 #define ALT_NOC_FW_L4_PER_SCR_I2C3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C3_OFST))
19053 /* The address of the ALT_NOC_FW_L4_PER_SCR_I2C4 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19054 #define ALT_NOC_FW_L4_PER_SCR_I2C4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C4_OFST))
19055 /* The address of the ALT_NOC_FW_L4_PER_SCR_SP_TIMER0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19056 #define ALT_NOC_FW_L4_PER_SCR_SP_TIMER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SP_TIMER0_OFST))
19057 /* The address of the ALT_NOC_FW_L4_PER_SCR_SP_TIMER1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19058 #define ALT_NOC_FW_L4_PER_SCR_SP_TIMER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SP_TIMER1_OFST))
19059 /* The address of the ALT_NOC_FW_L4_PER_SCR_UART0 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19060 #define ALT_NOC_FW_L4_PER_SCR_UART0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_UART0_OFST))
19061 /* The address of the ALT_NOC_FW_L4_PER_SCR_UART1 register for the ALT_NOC_FW_L4_PER_SCR instance. */
19062 #define ALT_NOC_FW_L4_PER_SCR_UART1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_UART1_OFST))
19063 /* The base address byte offset for the start of the ALT_NOC_FW_L4_PER_SCR component. */
19064 #define ALT_NOC_FW_L4_PER_SCR_OFST 0xffd21000
19065 /* The start address of the ALT_NOC_FW_L4_PER_SCR component. */
19066 #define ALT_NOC_FW_L4_PER_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_L4_PER_SCR_OFST))
19067 /* The lower bound address range of the ALT_NOC_FW_L4_PER_SCR component. */
19068 #define ALT_NOC_FW_L4_PER_SCR_LB_ADDR ALT_NOC_FW_L4_PER_SCR_ADDR
19069 /* The upper bound address range of the ALT_NOC_FW_L4_PER_SCR component. */
19070 #define ALT_NOC_FW_L4_PER_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + 0x100) - 1))
19071 
19072 
19073 /*
19074  * Component Instance : noc_fw_l4_sys_scr
19075  *
19076  * Instance noc_fw_l4_sys_scr of component ALT_NOC_FW_L4_SYS_SCR.
19077  *
19078  *
19079  */
19080 /* The address of the ALT_NOC_FW_L4_SYS_SCR_DMA_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19081 #define ALT_NOC_FW_L4_SYS_SCR_DMA_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_DMA_ECC_OFST))
19082 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC0RX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19083 #define ALT_NOC_FW_L4_SYS_SCR_EMAC0RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC0RX_ECC_OFST))
19084 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC0TX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19085 #define ALT_NOC_FW_L4_SYS_SCR_EMAC0TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC0TX_ECC_OFST))
19086 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC1RX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19087 #define ALT_NOC_FW_L4_SYS_SCR_EMAC1RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC1RX_ECC_OFST))
19088 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC1TX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19089 #define ALT_NOC_FW_L4_SYS_SCR_EMAC1TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC1TX_ECC_OFST))
19090 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC2RX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19091 #define ALT_NOC_FW_L4_SYS_SCR_EMAC2RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC2RX_ECC_OFST))
19092 /* The address of the ALT_NOC_FW_L4_SYS_SCR_EMAC2TX_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19093 #define ALT_NOC_FW_L4_SYS_SCR_EMAC2TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC2TX_ECC_OFST))
19094 /* The address of the ALT_NOC_FW_L4_SYS_SCR_NAND_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19095 #define ALT_NOC_FW_L4_SYS_SCR_NAND_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_NAND_ECC_OFST))
19096 /* The address of the ALT_NOC_FW_L4_SYS_SCR_NAND_READ_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19097 #define ALT_NOC_FW_L4_SYS_SCR_NAND_READ_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_NAND_READ_ECC_OFST))
19098 /* The address of the ALT_NOC_FW_L4_SYS_SCR_NAND_WRITE_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19099 #define ALT_NOC_FW_L4_SYS_SCR_NAND_WRITE_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_NAND_WRITE_ECC_OFST))
19100 /* The address of the ALT_NOC_FW_L4_SYS_SCR_OCRAM_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19101 #define ALT_NOC_FW_L4_SYS_SCR_OCRAM_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_OCRAM_ECC_OFST))
19102 /* The address of the ALT_NOC_FW_L4_SYS_SCR_SDMMC_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19103 #define ALT_NOC_FW_L4_SYS_SCR_SDMMC_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_SDMMC_ECC_OFST))
19104 /* The address of the ALT_NOC_FW_L4_SYS_SCR_USB0_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19105 #define ALT_NOC_FW_L4_SYS_SCR_USB0_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_USB0_ECC_OFST))
19106 /* The address of the ALT_NOC_FW_L4_SYS_SCR_USB1_ECC register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19107 #define ALT_NOC_FW_L4_SYS_SCR_USB1_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_USB1_ECC_OFST))
19108 /* The address of the ALT_NOC_FW_L4_SYS_SCR_CLOCK_MANAGER register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19109 #define ALT_NOC_FW_L4_SYS_SCR_CLOCK_MANAGER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_CLOCK_MANAGER_OFST))
19110 /* The address of the ALT_NOC_FW_L4_SYS_SCR_IO_MANAGER register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19111 #define ALT_NOC_FW_L4_SYS_SCR_IO_MANAGER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_IO_MANAGER_OFST))
19112 /* The address of the ALT_NOC_FW_L4_SYS_SCR_RESET_MANAGER register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19113 #define ALT_NOC_FW_L4_SYS_SCR_RESET_MANAGER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_RESET_MANAGER_OFST))
19114 /* The address of the ALT_NOC_FW_L4_SYS_SCR_SYSTEM_MANAGER register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19115 #define ALT_NOC_FW_L4_SYS_SCR_SYSTEM_MANAGER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_SYSTEM_MANAGER_OFST))
19116 /* The address of the ALT_NOC_FW_L4_SYS_SCR_OSC0_TIMER register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19117 #define ALT_NOC_FW_L4_SYS_SCR_OSC0_TIMER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_OSC0_TIMER_OFST))
19118 /* The address of the ALT_NOC_FW_L4_SYS_SCR_OSC1_TIMER register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19119 #define ALT_NOC_FW_L4_SYS_SCR_OSC1_TIMER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_OSC1_TIMER_OFST))
19120 /* The address of the ALT_NOC_FW_L4_SYS_SCR_WATCHDOG0 register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19121 #define ALT_NOC_FW_L4_SYS_SCR_WATCHDOG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_WATCHDOG0_OFST))
19122 /* The address of the ALT_NOC_FW_L4_SYS_SCR_WATCHDOG1 register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19123 #define ALT_NOC_FW_L4_SYS_SCR_WATCHDOG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_WATCHDOG1_OFST))
19124 /* The address of the ALT_NOC_FW_L4_SYS_SCR_WATCHDOG2 register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19125 #define ALT_NOC_FW_L4_SYS_SCR_WATCHDOG2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_WATCHDOG2_OFST))
19126 /* The address of the ALT_NOC_FW_L4_SYS_SCR_WATCHDOG3 register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19127 #define ALT_NOC_FW_L4_SYS_SCR_WATCHDOG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_WATCHDOG3_OFST))
19128 /* The address of the ALT_NOC_FW_L4_SYS_SCR_DAP register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19129 #define ALT_NOC_FW_L4_SYS_SCR_DAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_DAP_OFST))
19130 /* The address of the ALT_NOC_FW_L4_SYS_SCR_L4_NOC_PROBES register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19131 #define ALT_NOC_FW_L4_SYS_SCR_L4_NOC_PROBES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_L4_NOC_PROBES_OFST))
19132 /* The address of the ALT_NOC_FW_L4_SYS_SCR_L4_NOC_QOS register for the ALT_NOC_FW_L4_SYS_SCR instance. */
19133 #define ALT_NOC_FW_L4_SYS_SCR_L4_NOC_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_L4_NOC_QOS_OFST))
19134 /* The base address byte offset for the start of the ALT_NOC_FW_L4_SYS_SCR component. */
19135 #define ALT_NOC_FW_L4_SYS_SCR_OFST 0xffd21100
19136 /* The start address of the ALT_NOC_FW_L4_SYS_SCR component. */
19137 #define ALT_NOC_FW_L4_SYS_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_L4_SYS_SCR_OFST))
19138 /* The lower bound address range of the ALT_NOC_FW_L4_SYS_SCR component. */
19139 #define ALT_NOC_FW_L4_SYS_SCR_LB_ADDR ALT_NOC_FW_L4_SYS_SCR_ADDR
19140 /* The upper bound address range of the ALT_NOC_FW_L4_SYS_SCR component. */
19141 #define ALT_NOC_FW_L4_SYS_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + 0x100) - 1))
19142 
19143 
19144 /*
19145  * Component Instance : noc_fw_h2f_scr
19146  *
19147  * Instance noc_fw_h2f_scr of component ALT_NOC_FW_H2F_SCR.
19148  *
19149  *
19150  */
19151 /* The address of the ALT_NOC_FW_H2F_SCR_SOC2FPGA register for the ALT_NOC_FW_H2F_SCR instance. */
19152 #define ALT_NOC_FW_H2F_SCR_SOC2FPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_H2F_SCR_ADDR) + ALT_NOC_FW_H2F_SCR_SOC2FPGA_OFST))
19153 /* The base address byte offset for the start of the ALT_NOC_FW_H2F_SCR component. */
19154 #define ALT_NOC_FW_H2F_SCR_OFST 0xffd21200
19155 /* The start address of the ALT_NOC_FW_H2F_SCR component. */
19156 #define ALT_NOC_FW_H2F_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_H2F_SCR_OFST))
19157 /* The lower bound address range of the ALT_NOC_FW_H2F_SCR component. */
19158 #define ALT_NOC_FW_H2F_SCR_LB_ADDR ALT_NOC_FW_H2F_SCR_ADDR
19159 /* The upper bound address range of the ALT_NOC_FW_H2F_SCR component. */
19160 #define ALT_NOC_FW_H2F_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_H2F_SCR_ADDR) + 0x100) - 1))
19161 
19162 
19163 /*
19164  * Component Instance : noc_fw_lwh2f_scr
19165  *
19166  * Instance noc_fw_lwh2f_scr of component ALT_NOC_FW_LWH2F_SCR.
19167  *
19168  *
19169  */
19170 /* The address of the ALT_NOC_FW_LWH2F_SCR_LWSOC2FPGA register for the ALT_NOC_FW_LWH2F_SCR instance. */
19171 #define ALT_NOC_FW_LWH2F_SCR_LWSOC2FPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_LWH2F_SCR_ADDR) + ALT_NOC_FW_LWH2F_SCR_LWSOC2FPGA_OFST))
19172 /* The base address byte offset for the start of the ALT_NOC_FW_LWH2F_SCR component. */
19173 #define ALT_NOC_FW_LWH2F_SCR_OFST 0xffd21300
19174 /* The start address of the ALT_NOC_FW_LWH2F_SCR component. */
19175 #define ALT_NOC_FW_LWH2F_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_LWH2F_SCR_OFST))
19176 /* The lower bound address range of the ALT_NOC_FW_LWH2F_SCR component. */
19177 #define ALT_NOC_FW_LWH2F_SCR_LB_ADDR ALT_NOC_FW_LWH2F_SCR_ADDR
19178 /* The upper bound address range of the ALT_NOC_FW_LWH2F_SCR component. */
19179 #define ALT_NOC_FW_LWH2F_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_LWH2F_SCR_ADDR) + 0x100) - 1))
19180 
19181 
19182 /*
19183  * Component Instance : noc_fw_tcu_scr
19184  *
19185  * Instance noc_fw_tcu_scr of component ALT_NOC_FW_TCU_SCR.
19186  *
19187  *
19188  */
19189 /* The address of the ALT_NOC_FW_TCU_SCR_TCU register for the ALT_NOC_FW_TCU_SCR instance. */
19190 #define ALT_NOC_FW_TCU_SCR_TCU_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_TCU_SCR_ADDR) + ALT_NOC_FW_TCU_SCR_TCU_OFST))
19191 /* The base address byte offset for the start of the ALT_NOC_FW_TCU_SCR component. */
19192 #define ALT_NOC_FW_TCU_SCR_OFST 0xffd21400
19193 /* The start address of the ALT_NOC_FW_TCU_SCR component. */
19194 #define ALT_NOC_FW_TCU_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_TCU_SCR_OFST))
19195 /* The lower bound address range of the ALT_NOC_FW_TCU_SCR component. */
19196 #define ALT_NOC_FW_TCU_SCR_LB_ADDR ALT_NOC_FW_TCU_SCR_ADDR
19197 /* The upper bound address range of the ALT_NOC_FW_TCU_SCR component. */
19198 #define ALT_NOC_FW_TCU_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_TCU_SCR_ADDR) + 0x100) - 1))
19199 
19200 
19201 /*
19202  * Component Instance : noc_ccu_ios_cs_obs_at_main_atbendpt
19203  *
19204  * Instance noc_ccu_ios_cs_obs_at_main_atbendpt of component ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT.
19205  *
19206  *
19207  */
19208 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT instance. */
19209 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_OFST))
19210 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT instance. */
19211 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_OFST))
19212 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT instance. */
19213 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_OFST))
19214 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT instance. */
19215 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_OFST))
19216 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT instance. */
19217 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_OFST))
19218 /* The base address byte offset for the start of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT component. */
19219 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_OFST 0xffd22000
19220 /* The start address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT component. */
19221 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_OFST))
19222 /* The lower bound address range of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT component. */
19223 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_LB_ADDR ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_ADDR
19224 /* The upper bound address range of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT component. */
19225 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_ADDR) + 0x80) - 1))
19226 
19227 
19228 /*
19229  * Component Instance : noc_ccu_ios_cs_obs_at_main_errlog_0
19230  *
19231  * Instance noc_ccu_ios_cs_obs_at_main_errlog_0 of component ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0.
19232  *
19233  *
19234  */
19235 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ID_COREID register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 instance. */
19236 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ID_COREID_OFST))
19237 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ID_REVISIONID register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 instance. */
19238 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ID_REVISIONID_OFST))
19239 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_FAULTEN register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 instance. */
19240 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_FAULTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_FAULTEN_OFST))
19241 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRVLD register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 instance. */
19242 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRVLD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRVLD_OFST))
19243 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRCLR register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 instance. */
19244 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRCLR_OFST))
19245 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG0 register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 instance. */
19246 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG0_OFST))
19247 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG1 register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 instance. */
19248 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG1_OFST))
19249 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG3 register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 instance. */
19250 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG3_OFST))
19251 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG4 register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 instance. */
19252 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG4_OFST))
19253 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG5 register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 instance. */
19254 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG5_OFST))
19255 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG7 register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 instance. */
19256 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_ERRLOG7_OFST))
19257 /* The address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_STALLEN register for the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 instance. */
19258 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_STALLEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_CS_OBS_AT_MAIN_ERRORLOGGER_0_STALLEN_OFST))
19259 /* The base address byte offset for the start of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 component. */
19260 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_OFST 0xffd22080
19261 /* The start address of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 component. */
19262 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_OFST))
19263 /* The lower bound address range of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 component. */
19264 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_LB_ADDR ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR
19265 /* The upper bound address range of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0 component. */
19266 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0_ADDR) + 0x80) - 1))
19267 
19268 
19269 /*
19270  * Component Instance : noc_ccu_main_prb
19271  *
19272  * Instance noc_ccu_main_prb of component ALT_NOC_CCU_MAIN_PRB.
19273  *
19274  *
19275  */
19276 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_ID_COREID register for the ALT_NOC_CCU_MAIN_PRB instance. */
19277 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_ID_COREID_OFST))
19278 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_ID_REVISIONID register for the ALT_NOC_CCU_MAIN_PRB instance. */
19279 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_ID_REVISIONID_OFST))
19280 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_MAINCTL register for the ALT_NOC_CCU_MAIN_PRB instance. */
19281 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_MAINCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_MAINCTL_OFST))
19282 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_CFGCTL register for the ALT_NOC_CCU_MAIN_PRB instance. */
19283 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_CFGCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_CFGCTL_OFST))
19284 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERLUT register for the ALT_NOC_CCU_MAIN_PRB instance. */
19285 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERLUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERLUT_OFST))
19286 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_TRACEALARMEN register for the ALT_NOC_CCU_MAIN_PRB instance. */
19287 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_TRACEALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_TRACEALARMEN_OFST))
19288 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_TRACEALARMSTATUS register for the ALT_NOC_CCU_MAIN_PRB instance. */
19289 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_TRACEALARMSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_TRACEALARMSTATUS_OFST))
19290 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_TRACEALARMCLR register for the ALT_NOC_CCU_MAIN_PRB instance. */
19291 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_TRACEALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_TRACEALARMCLR_OFST))
19292 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATPERIOD register for the ALT_NOC_CCU_MAIN_PRB instance. */
19293 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATPERIOD_OFST))
19294 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATGO register for the ALT_NOC_CCU_MAIN_PRB instance. */
19295 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATGO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATGO_OFST))
19296 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMMIN register for the ALT_NOC_CCU_MAIN_PRB instance. */
19297 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMMIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMMIN_OFST))
19298 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMMAX register for the ALT_NOC_CCU_MAIN_PRB instance. */
19299 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMMAX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMMAX_OFST))
19300 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMSTATUS register for the ALT_NOC_CCU_MAIN_PRB instance. */
19301 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMSTATUS_OFST))
19302 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMCLR register for the ALT_NOC_CCU_MAIN_PRB instance. */
19303 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMCLR_OFST))
19304 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMEN register for the ALT_NOC_CCU_MAIN_PRB instance. */
19305 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_STATALARMEN_OFST))
19306 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_ROUTEIDBASE register for the ALT_NOC_CCU_MAIN_PRB instance. */
19307 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_OFST))
19308 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_ROUTEIDMASK register for the ALT_NOC_CCU_MAIN_PRB instance. */
19309 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_OFST))
19310 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW register for the ALT_NOC_CCU_MAIN_PRB instance. */
19311 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_OFST))
19312 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH register for the ALT_NOC_CCU_MAIN_PRB instance. */
19313 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_OFST))
19314 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_WINDOWSIZE register for the ALT_NOC_CCU_MAIN_PRB instance. */
19315 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_WINDOWSIZE_OFST))
19316 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_SECURITYBASE register for the ALT_NOC_CCU_MAIN_PRB instance. */
19317 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_SECURITYBASE_OFST))
19318 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_SECURITYMASK register for the ALT_NOC_CCU_MAIN_PRB instance. */
19319 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_SECURITYMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_SECURITYMASK_OFST))
19320 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_OPCODE register for the ALT_NOC_CCU_MAIN_PRB instance. */
19321 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_OPCODE_OFST))
19322 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_STATUS register for the ALT_NOC_CCU_MAIN_PRB instance. */
19323 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_STATUS_OFST))
19324 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_LENGTH register for the ALT_NOC_CCU_MAIN_PRB instance. */
19325 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_LENGTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_LENGTH_OFST))
19326 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_URGENCY register for the ALT_NOC_CCU_MAIN_PRB instance. */
19327 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_0_URGENCY_OFST))
19328 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_ROUTEIDBASE register for the ALT_NOC_CCU_MAIN_PRB instance. */
19329 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_ROUTEIDBASE_OFST))
19330 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_ROUTEIDMASK register for the ALT_NOC_CCU_MAIN_PRB instance. */
19331 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_ROUTEIDMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_ROUTEIDMASK_OFST))
19332 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_ADDRBASE_LOW register for the ALT_NOC_CCU_MAIN_PRB instance. */
19333 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_ADDRBASE_LOW_OFST))
19334 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_ADDRBASE_HIGH register for the ALT_NOC_CCU_MAIN_PRB instance. */
19335 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_ADDRBASE_HIGH_OFST))
19336 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_WINDOWSIZE register for the ALT_NOC_CCU_MAIN_PRB instance. */
19337 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_WINDOWSIZE_OFST))
19338 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_SECURITYBASE register for the ALT_NOC_CCU_MAIN_PRB instance. */
19339 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_SECURITYBASE_OFST))
19340 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_SECURITYMASK register for the ALT_NOC_CCU_MAIN_PRB instance. */
19341 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_SECURITYMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_SECURITYMASK_OFST))
19342 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_OPCODE register for the ALT_NOC_CCU_MAIN_PRB instance. */
19343 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_OPCODE_OFST))
19344 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_STATUS register for the ALT_NOC_CCU_MAIN_PRB instance. */
19345 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_STATUS_OFST))
19346 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_LENGTH register for the ALT_NOC_CCU_MAIN_PRB instance. */
19347 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_LENGTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_LENGTH_OFST))
19348 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_URGENCY register for the ALT_NOC_CCU_MAIN_PRB instance. */
19349 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_FILTERS_1_URGENCY_OFST))
19350 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_0_SRC register for the ALT_NOC_CCU_MAIN_PRB instance. */
19351 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_0_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_0_SRC_OFST))
19352 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_0_ALARMMODE register for the ALT_NOC_CCU_MAIN_PRB instance. */
19353 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_0_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_0_ALARMMODE_OFST))
19354 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_0_VAL register for the ALT_NOC_CCU_MAIN_PRB instance. */
19355 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_0_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_0_VAL_OFST))
19356 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_1_SRC register for the ALT_NOC_CCU_MAIN_PRB instance. */
19357 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_1_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_1_SRC_OFST))
19358 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_1_ALARMMODE register for the ALT_NOC_CCU_MAIN_PRB instance. */
19359 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_1_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_1_ALARMMODE_OFST))
19360 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_1_VAL register for the ALT_NOC_CCU_MAIN_PRB instance. */
19361 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_1_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_1_VAL_OFST))
19362 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_2_SRC register for the ALT_NOC_CCU_MAIN_PRB instance. */
19363 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_2_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_2_SRC_OFST))
19364 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_2_ALARMMODE register for the ALT_NOC_CCU_MAIN_PRB instance. */
19365 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_2_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_2_ALARMMODE_OFST))
19366 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_2_VAL register for the ALT_NOC_CCU_MAIN_PRB instance. */
19367 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_2_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_2_VAL_OFST))
19368 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_3_SRC register for the ALT_NOC_CCU_MAIN_PRB instance. */
19369 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_3_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_3_SRC_OFST))
19370 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_3_ALARMMODE register for the ALT_NOC_CCU_MAIN_PRB instance. */
19371 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_3_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_3_ALARMMODE_OFST))
19372 /* The address of the ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_3_VAL register for the ALT_NOC_CCU_MAIN_PRB instance. */
19373 #define ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_3_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + ALT_NOC_CCU_MAIN_PRB_PROBE_CCU_MAIN_PROBE_COUNTERS_3_VAL_OFST))
19374 /* The base address byte offset for the start of the ALT_NOC_CCU_MAIN_PRB component. */
19375 #define ALT_NOC_CCU_MAIN_PRB_OFST 0xffd22400
19376 /* The start address of the ALT_NOC_CCU_MAIN_PRB component. */
19377 #define ALT_NOC_CCU_MAIN_PRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_MAIN_PRB_OFST))
19378 /* The lower bound address range of the ALT_NOC_CCU_MAIN_PRB component. */
19379 #define ALT_NOC_CCU_MAIN_PRB_LB_ADDR ALT_NOC_CCU_MAIN_PRB_ADDR
19380 /* The upper bound address range of the ALT_NOC_CCU_MAIN_PRB component. */
19381 #define ALT_NOC_CCU_MAIN_PRB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_MAIN_PRB_ADDR) + 0x400) - 1))
19382 
19383 
19384 /*
19385  * Component Instance : noc_ccu_emac_main_prb
19386  *
19387  * Instance noc_ccu_emac_main_prb of component ALT_NOC_CCU_EMAC_MAIN_PRB.
19388  *
19389  *
19390  */
19391 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_ID_COREID register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19392 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_ID_COREID_OFST))
19393 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_ID_REVISIONID register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19394 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_ID_REVISIONID_OFST))
19395 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_MAINCTL register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19396 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_MAINCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_MAINCTL_OFST))
19397 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_CFGCTL register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19398 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_CFGCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_CFGCTL_OFST))
19399 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERLUT register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19400 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERLUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERLUT_OFST))
19401 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_TRACEALARMEN register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19402 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_TRACEALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_TRACEALARMEN_OFST))
19403 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_TRACEALARMSTATUS register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19404 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_TRACEALARMSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_TRACEALARMSTATUS_OFST))
19405 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_TRACEALARMCLR register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19406 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_TRACEALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_TRACEALARMCLR_OFST))
19407 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATPERIOD register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19408 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATPERIOD_OFST))
19409 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATGO register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19410 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATGO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATGO_OFST))
19411 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMMIN register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19412 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMMIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMMIN_OFST))
19413 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMMAX register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19414 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMMAX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMMAX_OFST))
19415 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMSTATUS register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19416 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMSTATUS_OFST))
19417 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMCLR register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19418 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMCLR_OFST))
19419 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMEN register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19420 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_STATALARMEN_OFST))
19421 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_ROUTEIDBASE register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19422 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_OFST))
19423 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_ROUTEIDMASK register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19424 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_OFST))
19425 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19426 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_OFST))
19427 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19428 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_OFST))
19429 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_WINDOWSIZE register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19430 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_WINDOWSIZE_OFST))
19431 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_SECURITYBASE register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19432 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_SECURITYBASE_OFST))
19433 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_SECURITYMASK register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19434 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_SECURITYMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_SECURITYMASK_OFST))
19435 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_OPCODE register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19436 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_OPCODE_OFST))
19437 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_STATUS register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19438 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_STATUS_OFST))
19439 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_LENGTH register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19440 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_LENGTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_LENGTH_OFST))
19441 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_URGENCY register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19442 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_0_URGENCY_OFST))
19443 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_ROUTEIDBASE register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19444 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_ROUTEIDBASE_OFST))
19445 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_ROUTEIDMASK register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19446 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_ROUTEIDMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_ROUTEIDMASK_OFST))
19447 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_ADDRBASE_LOW register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19448 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_ADDRBASE_LOW_OFST))
19449 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_ADDRBASE_HIGH register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19450 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_ADDRBASE_HIGH_OFST))
19451 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_WINDOWSIZE register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19452 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_WINDOWSIZE_OFST))
19453 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_SECURITYBASE register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19454 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_SECURITYBASE_OFST))
19455 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_SECURITYMASK register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19456 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_SECURITYMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_SECURITYMASK_OFST))
19457 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_OPCODE register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19458 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_OPCODE_OFST))
19459 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_STATUS register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19460 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_STATUS_OFST))
19461 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_LENGTH register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19462 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_LENGTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_LENGTH_OFST))
19463 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_URGENCY register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19464 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_FILTERS_1_URGENCY_OFST))
19465 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_0_SRC register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19466 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_0_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_0_SRC_OFST))
19467 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_0_ALARMMODE register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19468 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_0_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_0_ALARMMODE_OFST))
19469 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_0_VAL register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19470 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_0_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_0_VAL_OFST))
19471 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_1_SRC register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19472 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_1_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_1_SRC_OFST))
19473 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_1_ALARMMODE register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19474 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_1_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_1_ALARMMODE_OFST))
19475 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_1_VAL register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19476 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_1_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_1_VAL_OFST))
19477 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_2_SRC register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19478 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_2_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_2_SRC_OFST))
19479 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_2_ALARMMODE register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19480 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_2_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_2_ALARMMODE_OFST))
19481 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_2_VAL register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19482 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_2_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_2_VAL_OFST))
19483 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_3_SRC register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19484 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_3_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_3_SRC_OFST))
19485 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_3_ALARMMODE register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19486 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_3_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_3_ALARMMODE_OFST))
19487 /* The address of the ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_3_VAL register for the ALT_NOC_CCU_EMAC_MAIN_PRB instance. */
19488 #define ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_3_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_PROBE_EMAC_MAIN_PROBE_COUNTERS_3_VAL_OFST))
19489 /* The base address byte offset for the start of the ALT_NOC_CCU_EMAC_MAIN_PRB component. */
19490 #define ALT_NOC_CCU_EMAC_MAIN_PRB_OFST 0xffd22800
19491 /* The start address of the ALT_NOC_CCU_EMAC_MAIN_PRB component. */
19492 #define ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_EMAC_MAIN_PRB_OFST))
19493 /* The lower bound address range of the ALT_NOC_CCU_EMAC_MAIN_PRB component. */
19494 #define ALT_NOC_CCU_EMAC_MAIN_PRB_LB_ADDR ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR
19495 /* The upper bound address range of the ALT_NOC_CCU_EMAC_MAIN_PRB component. */
19496 #define ALT_NOC_CCU_EMAC_MAIN_PRB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_EMAC_MAIN_PRB_ADDR) + 0x400) - 1))
19497 
19498 
19499 /*
19500  * Component Instance : noc_ccu_h2f_main_prb
19501  *
19502  * Instance noc_ccu_h2f_main_prb of component ALT_NOC_CCU_H2F_MAIN_PRB.
19503  *
19504  *
19505  */
19506 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_ID_COREID register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19507 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_ID_COREID_OFST))
19508 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_ID_REVISIONID register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19509 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_ID_REVISIONID_OFST))
19510 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_MAINCTL register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19511 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_MAINCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_MAINCTL_OFST))
19512 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_CFGCTL register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19513 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_CFGCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_CFGCTL_OFST))
19514 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_TRACEPORTSEL register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19515 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_TRACEPORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_TRACEPORTSEL_OFST))
19516 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERLUT register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19517 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERLUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERLUT_OFST))
19518 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_TRACEALARMEN register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19519 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_TRACEALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_TRACEALARMEN_OFST))
19520 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_TRACEALARMSTATUS register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19521 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_TRACEALARMSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_TRACEALARMSTATUS_OFST))
19522 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_TRACEALARMCLR register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19523 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_TRACEALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_TRACEALARMCLR_OFST))
19524 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATPERIOD register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19525 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATPERIOD_OFST))
19526 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATGO register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19527 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATGO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATGO_OFST))
19528 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMMIN register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19529 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMMIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMMIN_OFST))
19530 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMMAX register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19531 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMMAX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMMAX_OFST))
19532 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMSTATUS register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19533 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMSTATUS_OFST))
19534 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMCLR register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19535 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMCLR_OFST))
19536 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMEN register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19537 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_STATALARMEN_OFST))
19538 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_ROUTEIDBASE register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19539 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_ROUTEIDBASE_OFST))
19540 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_ROUTEIDMASK register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19541 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_ROUTEIDMASK_OFST))
19542 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19543 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_ADDRBASE_LOW_OFST))
19544 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19545 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_ADDRBASE_HIGH_OFST))
19546 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_WINDOWSIZE register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19547 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_WINDOWSIZE_OFST))
19548 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_SECURITYBASE register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19549 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_SECURITYBASE_OFST))
19550 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_SECURITYMASK register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19551 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_SECURITYMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_SECURITYMASK_OFST))
19552 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_OPCODE register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19553 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_OPCODE_OFST))
19554 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_STATUS register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19555 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_STATUS_OFST))
19556 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_LENGTH register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19557 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_LENGTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_LENGTH_OFST))
19558 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_URGENCY register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19559 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_0_URGENCY_OFST))
19560 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_ROUTEIDBASE register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19561 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_ROUTEIDBASE_OFST))
19562 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_ROUTEIDMASK register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19563 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_ROUTEIDMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_ROUTEIDMASK_OFST))
19564 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_ADDRBASE_LOW register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19565 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_ADDRBASE_LOW_OFST))
19566 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_ADDRBASE_HIGH register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19567 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_ADDRBASE_HIGH_OFST))
19568 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_WINDOWSIZE register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19569 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_WINDOWSIZE_OFST))
19570 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_SECURITYBASE register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19571 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_SECURITYBASE_OFST))
19572 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_SECURITYMASK register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19573 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_SECURITYMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_SECURITYMASK_OFST))
19574 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_OPCODE register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19575 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_OPCODE_OFST))
19576 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_STATUS register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19577 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_STATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_STATUS_OFST))
19578 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_LENGTH register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19579 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_LENGTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_LENGTH_OFST))
19580 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_URGENCY register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19581 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_FILTERS_1_URGENCY_OFST))
19582 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_0_PORTSEL register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19583 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_0_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_0_PORTSEL_OFST))
19584 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_0_SRC register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19585 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_0_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_0_SRC_OFST))
19586 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_0_ALARMMODE register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19587 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_0_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_0_ALARMMODE_OFST))
19588 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_0_VAL register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19589 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_0_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_0_VAL_OFST))
19590 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_1_PORTSEL register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19591 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_1_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_1_PORTSEL_OFST))
19592 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_1_SRC register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19593 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_1_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_1_SRC_OFST))
19594 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_1_ALARMMODE register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19595 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_1_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_1_ALARMMODE_OFST))
19596 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_1_VAL register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19597 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_1_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_1_VAL_OFST))
19598 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_2_PORTSEL register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19599 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_2_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_2_PORTSEL_OFST))
19600 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_2_SRC register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19601 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_2_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_2_SRC_OFST))
19602 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_2_ALARMMODE register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19603 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_2_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_2_ALARMMODE_OFST))
19604 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_2_VAL register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19605 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_2_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_2_VAL_OFST))
19606 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_3_PORTSEL register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19607 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_3_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_3_PORTSEL_OFST))
19608 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_3_SRC register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19609 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_3_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_3_SRC_OFST))
19610 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_3_ALARMMODE register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19611 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_3_ALARMMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_3_ALARMMODE_OFST))
19612 /* The address of the ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_3_VAL register for the ALT_NOC_CCU_H2F_MAIN_PRB instance. */
19613 #define ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_3_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_PROBE_SOC2FPGA_MAIN_PROBE_COUNTERS_3_VAL_OFST))
19614 /* The base address byte offset for the start of the ALT_NOC_CCU_H2F_MAIN_PRB component. */
19615 #define ALT_NOC_CCU_H2F_MAIN_PRB_OFST 0xffd22c00
19616 /* The start address of the ALT_NOC_CCU_H2F_MAIN_PRB component. */
19617 #define ALT_NOC_CCU_H2F_MAIN_PRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_H2F_MAIN_PRB_OFST))
19618 /* The lower bound address range of the ALT_NOC_CCU_H2F_MAIN_PRB component. */
19619 #define ALT_NOC_CCU_H2F_MAIN_PRB_LB_ADDR ALT_NOC_CCU_H2F_MAIN_PRB_ADDR
19620 /* The upper bound address range of the ALT_NOC_CCU_H2F_MAIN_PRB component. */
19621 #define ALT_NOC_CCU_H2F_MAIN_PRB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_H2F_MAIN_PRB_ADDR) + 0x400) - 1))
19622 
19623 
19624 /*
19625  * Component Instance : noc_ccu_prb_emac_tbu_transtatprof
19626  *
19627  * Instance noc_ccu_prb_emac_tbu_transtatprof of component ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF.
19628  *
19629  *
19630  */
19631 /* The address of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_ID_COREID register for the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF instance. */
19632 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR) + ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_ID_COREID_OFST))
19633 /* The address of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_ID_REVISIONID register for the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF instance. */
19634 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR) + ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_ID_REVISIONID_OFST))
19635 /* The address of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_EN register for the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF instance. */
19636 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR) + ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_EN_OFST))
19637 /* The address of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_MODE register for the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF instance. */
19638 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR) + ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_MODE_OFST))
19639 /* The address of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_THRESHOLDS_0_0 register for the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF instance. */
19640 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_THRESHOLDS_0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR) + ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_THRESHOLDS_0_0_OFST))
19641 /* The address of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_THRESHOLDS_0_1 register for the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF instance. */
19642 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_THRESHOLDS_0_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR) + ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_THRESHOLDS_0_1_OFST))
19643 /* The address of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_THRESHOLDS_0_2 register for the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF instance. */
19644 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_THRESHOLDS_0_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR) + ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_THRESHOLDS_0_2_OFST))
19645 /* The address of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_OVERFLOWSTATUS register for the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF instance. */
19646 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_OVERFLOWSTATUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR) + ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_OVERFLOWSTATUS_OFST))
19647 /* The address of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_OVERFLOWRESET register for the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF instance. */
19648 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_OVERFLOWRESET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR) + ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_OVERFLOWRESET_OFST))
19649 /* The address of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_PENDINGEVENTMODE register for the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF instance. */
19650 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_PENDINGEVENTMODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR) + ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_PENDINGEVENTMODE_OFST))
19651 /* The address of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_PRESCALER register for the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF instance. */
19652 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_PRESCALER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR) + ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_PROBE_EMAC_MAIN_TRANSACTIONSTATPROFILER_PRESCALER_OFST))
19653 /* The base address byte offset for the start of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF component. */
19654 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_OFST 0xffd23000
19655 /* The start address of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF component. */
19656 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_OFST))
19657 /* The lower bound address range of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF component. */
19658 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_LB_ADDR ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR
19659 /* The upper bound address range of the ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF component. */
19660 #define ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF_ADDR) + 0x80) - 1))
19661 
19662 
19663 /*
19664  * Component Instance : noc_ccu_ios_ccu_ios_main_qos
19665  *
19666  * Instance noc_ccu_ios_ccu_ios_main_qos of component ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS.
19667  *
19668  *
19669  */
19670 /* The address of the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS instance. */
19671 #define ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
19672 /* The address of the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS instance. */
19673 #define ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
19674 /* The address of the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS instance. */
19675 #define ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
19676 /* The address of the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_MODE register for the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS instance. */
19677 #define ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_MODE_OFST))
19678 /* The address of the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS instance. */
19679 #define ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
19680 /* The address of the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS instance. */
19681 #define ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_SATURATION_OFST))
19682 /* The address of the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS instance. */
19683 #define ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_CCU_IOS_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
19684 /* The base address byte offset for the start of the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS component. */
19685 #define ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_OFST 0xffd24000
19686 /* The start address of the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS component. */
19687 #define ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_OFST))
19688 /* The lower bound address range of the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS component. */
19689 #define ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_LB_ADDR ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_ADDR
19690 /* The upper bound address range of the ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS component. */
19691 #define ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS_ADDR) + 0x80) - 1))
19692 
19693 
19694 /*
19695  * Component Instance : noc_ccu_ios_dma_tbu_m_main_qos
19696  *
19697  * Instance noc_ccu_ios_dma_tbu_m_main_qos of component ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS.
19698  *
19699  *
19700  */
19701 /* The address of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS instance. */
19702 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
19703 /* The address of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS instance. */
19704 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
19705 /* The address of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS instance. */
19706 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
19707 /* The address of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE register for the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS instance. */
19708 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_OFST))
19709 /* The address of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS instance. */
19710 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
19711 /* The address of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS instance. */
19712 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_OFST))
19713 /* The address of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS instance. */
19714 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
19715 /* The base address byte offset for the start of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS component. */
19716 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_OFST 0xffd24080
19717 /* The start address of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS component. */
19718 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_OFST))
19719 /* The lower bound address range of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS component. */
19720 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_LB_ADDR ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_ADDR
19721 /* The upper bound address range of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS component. */
19722 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_ADDR) + 0x80) - 1))
19723 
19724 
19725 /*
19726  * Component Instance : noc_ccu_ios_emac_tbu_m_main_qos
19727  *
19728  * Instance noc_ccu_ios_emac_tbu_m_main_qos of component ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS.
19729  *
19730  *
19731  */
19732 /* The address of the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS instance. */
19733 #define ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
19734 /* The address of the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS instance. */
19735 #define ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
19736 /* The address of the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS instance. */
19737 #define ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
19738 /* The address of the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_MODE register for the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS instance. */
19739 #define ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_MODE_OFST))
19740 /* The address of the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS instance. */
19741 #define ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
19742 /* The address of the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS instance. */
19743 #define ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_OFST))
19744 /* The address of the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS instance. */
19745 #define ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_EMAC_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
19746 /* The base address byte offset for the start of the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS component. */
19747 #define ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_OFST 0xffd24100
19748 /* The start address of the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS component. */
19749 #define ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_OFST))
19750 /* The lower bound address range of the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS component. */
19751 #define ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_LB_ADDR ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_ADDR
19752 /* The upper bound address range of the ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS component. */
19753 #define ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS_ADDR) + 0x80) - 1))
19754 
19755 
19756 /*
19757  * Component Instance : noc_ccu_ios_io_tbu_m_main_qos
19758  *
19759  * Instance noc_ccu_ios_io_tbu_m_main_qos of component ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS.
19760  *
19761  *
19762  */
19763 /* The address of the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS instance. */
19764 #define ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
19765 /* The address of the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS instance. */
19766 #define ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
19767 /* The address of the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS instance. */
19768 #define ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
19769 /* The address of the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_MODE register for the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS instance. */
19770 #define ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_MODE_OFST))
19771 /* The address of the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS instance. */
19772 #define ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
19773 /* The address of the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS instance. */
19774 #define ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_OFST))
19775 /* The address of the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS instance. */
19776 #define ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_IO_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
19777 /* The base address byte offset for the start of the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS component. */
19778 #define ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_OFST 0xffd24180
19779 /* The start address of the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS component. */
19780 #define ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_OFST))
19781 /* The lower bound address range of the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS component. */
19782 #define ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_LB_ADDR ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_ADDR
19783 /* The upper bound address range of the ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS component. */
19784 #define ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS_ADDR) + 0x80) - 1))
19785 
19786 
19787 /*
19788  * Component Instance : noc_ccu_ios_sdm_tbu_m_main_qos
19789  *
19790  * Instance noc_ccu_ios_sdm_tbu_m_main_qos of component ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS.
19791  *
19792  *
19793  */
19794 /* The address of the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID register for the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS instance. */
19795 #define ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_OFST))
19796 /* The address of the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID register for the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS instance. */
19797 #define ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST))
19798 /* The address of the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY register for the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS instance. */
19799 #define ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_OFST))
19800 /* The address of the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_MODE register for the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS instance. */
19801 #define ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_MODE_OFST))
19802 /* The address of the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH register for the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS instance. */
19803 #define ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST))
19804 /* The address of the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_SATURATION register for the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS instance. */
19805 #define ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_OFST))
19806 /* The address of the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL register for the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS instance. */
19807 #define ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_ADDR) + ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_SDM_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST))
19808 /* The base address byte offset for the start of the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS component. */
19809 #define ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_OFST 0xffd24200
19810 /* The start address of the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS component. */
19811 #define ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_OFST))
19812 /* The lower bound address range of the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS component. */
19813 #define ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_LB_ADDR ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_ADDR
19814 /* The upper bound address range of the ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS component. */
19815 #define ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS_ADDR) + 0x80) - 1))
19816 
19817 
19818 /*
19819  * Component Instance : noc_ccu_emac_tbu_transtatfilt
19820  *
19821  * Instance noc_ccu_emac_tbu_transtatfilt of component ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT.
19822  *
19823  *
19824  */
19825 /* The address of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID register for the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT instance. */
19826 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR) + ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_COREID_OFST))
19827 /* The address of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID register for the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT instance. */
19828 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR) + ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ID_REVISIONID_OFST))
19829 /* The address of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE register for the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT instance. */
19830 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR) + ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_MODE_OFST))
19831 /* The address of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW register for the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT instance. */
19832 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR) + ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_LOW_OFST))
19833 /* The address of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH register for the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT instance. */
19834 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR) + ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRBASE_HIGH_OFST))
19835 /* The address of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE register for the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT instance. */
19836 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR) + ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_ADDRWINDOWSIZE_OFST))
19837 /* The address of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE register for the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT instance. */
19838 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR) + ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_OPCODE_OFST))
19839 /* The address of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE register for the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT instance. */
19840 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR) + ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERBASE_OFST))
19841 /* The address of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK register for the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT instance. */
19842 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR) + ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_USERMASK_OFST))
19843 /* The address of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE register for the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT instance. */
19844 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR) + ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYBASE_OFST))
19845 /* The address of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK register for the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT instance. */
19846 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR) + ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_EMAC_TBU_M_I_MAIN_TRANSACTIONSTATFILTER_SECURITYMASK_OFST))
19847 /* The base address byte offset for the start of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT component. */
19848 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_OFST 0xffd24400
19849 /* The start address of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT component. */
19850 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_OFST))
19851 /* The lower bound address range of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT component. */
19852 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_LB_ADDR ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR
19853 /* The upper bound address range of the ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT component. */
19854 #define ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT_ADDR) + 0x80) - 1))
19855 
19856 
19857 /*
19858  * Component Instance : noc_fw_mmap_priv
19859  *
19860  * Instance noc_fw_mmap_priv of component ALT_NOC_FW_MMAP_PRIV.
19861  *
19862  *
19863  */
19864 /* The address of the ALT_NOC_FW_MMAP_PRIV_PRIV register for the ALT_NOC_FW_MMAP_PRIV instance. */
19865 #define ALT_NOC_FW_MMAP_PRIV_PRIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_MMAP_PRIV_ADDR) + ALT_NOC_FW_MMAP_PRIV_PRIV_OFST))
19866 /* The address of the ALT_NOC_FW_MMAP_PRIV_PRIV_SET register for the ALT_NOC_FW_MMAP_PRIV instance. */
19867 #define ALT_NOC_FW_MMAP_PRIV_PRIV_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_MMAP_PRIV_ADDR) + ALT_NOC_FW_MMAP_PRIV_PRIV_SET_OFST))
19868 /* The address of the ALT_NOC_FW_MMAP_PRIV_PRIV_CLEAR register for the ALT_NOC_FW_MMAP_PRIV instance. */
19869 #define ALT_NOC_FW_MMAP_PRIV_PRIV_CLEAR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_MMAP_PRIV_ADDR) + ALT_NOC_FW_MMAP_PRIV_PRIV_CLEAR_OFST))
19870 /* The base address byte offset for the start of the ALT_NOC_FW_MMAP_PRIV component. */
19871 #define ALT_NOC_FW_MMAP_PRIV_OFST 0xffd24800
19872 /* The start address of the ALT_NOC_FW_MMAP_PRIV component. */
19873 #define ALT_NOC_FW_MMAP_PRIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_MMAP_PRIV_OFST))
19874 /* The lower bound address range of the ALT_NOC_FW_MMAP_PRIV component. */
19875 #define ALT_NOC_FW_MMAP_PRIV_LB_ADDR ALT_NOC_FW_MMAP_PRIV_ADDR
19876 /* The upper bound address range of the ALT_NOC_FW_MMAP_PRIV component. */
19877 #define ALT_NOC_FW_MMAP_PRIV_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_MMAP_PRIV_ADDR) + 0x100) - 1))
19878 
19879 
19880 /*
19881  * Component Instance : noc_ccu_l4_link_rate_adptr
19882  *
19883  * Instance noc_ccu_l4_link_rate_adptr of component ALT_NOC_CCU_L4_LINK_RATE_ADPTR.
19884  *
19885  *
19886  */
19887 /* The address of the ALT_NOC_CCU_L4_LINK_RATE_ADPTR_L4_LINKRESP_MAIN_RATEADAPTER_ID_COREID register for the ALT_NOC_CCU_L4_LINK_RATE_ADPTR instance. */
19888 #define ALT_NOC_CCU_L4_LINK_RATE_ADPTR_L4_LINKRESP_MAIN_RATEADAPTER_ID_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_L4_LINK_RATE_ADPTR_ADDR) + ALT_NOC_CCU_L4_LINK_RATE_ADPTR_L4_LINKRESP_MAIN_RATEADAPTER_ID_COREID_OFST))
19889 /* The address of the ALT_NOC_CCU_L4_LINK_RATE_ADPTR_L4_LINKRESP_MAIN_RATEADAPTER_ID_REVISIONID register for the ALT_NOC_CCU_L4_LINK_RATE_ADPTR instance. */
19890 #define ALT_NOC_CCU_L4_LINK_RATE_ADPTR_L4_LINKRESP_MAIN_RATEADAPTER_ID_REVISIONID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_L4_LINK_RATE_ADPTR_ADDR) + ALT_NOC_CCU_L4_LINK_RATE_ADPTR_L4_LINKRESP_MAIN_RATEADAPTER_ID_REVISIONID_OFST))
19891 /* The address of the ALT_NOC_CCU_L4_LINK_RATE_ADPTR_L4_LINKRESP_MAIN_RATEADAPTER_RATE register for the ALT_NOC_CCU_L4_LINK_RATE_ADPTR instance. */
19892 #define ALT_NOC_CCU_L4_LINK_RATE_ADPTR_L4_LINKRESP_MAIN_RATEADAPTER_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_L4_LINK_RATE_ADPTR_ADDR) + ALT_NOC_CCU_L4_LINK_RATE_ADPTR_L4_LINKRESP_MAIN_RATEADAPTER_RATE_OFST))
19893 /* The address of the ALT_NOC_CCU_L4_LINK_RATE_ADPTR_L4_LINKRESP_MAIN_RATEADAPTER_BYPASS register for the ALT_NOC_CCU_L4_LINK_RATE_ADPTR instance. */
19894 #define ALT_NOC_CCU_L4_LINK_RATE_ADPTR_L4_LINKRESP_MAIN_RATEADAPTER_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_CCU_L4_LINK_RATE_ADPTR_ADDR) + ALT_NOC_CCU_L4_LINK_RATE_ADPTR_L4_LINKRESP_MAIN_RATEADAPTER_BYPASS_OFST))
19895 /* The base address byte offset for the start of the ALT_NOC_CCU_L4_LINK_RATE_ADPTR component. */
19896 #define ALT_NOC_CCU_L4_LINK_RATE_ADPTR_OFST 0xffd24c00
19897 /* The start address of the ALT_NOC_CCU_L4_LINK_RATE_ADPTR component. */
19898 #define ALT_NOC_CCU_L4_LINK_RATE_ADPTR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_CCU_L4_LINK_RATE_ADPTR_OFST))
19899 /* The lower bound address range of the ALT_NOC_CCU_L4_LINK_RATE_ADPTR component. */
19900 #define ALT_NOC_CCU_L4_LINK_RATE_ADPTR_LB_ADDR ALT_NOC_CCU_L4_LINK_RATE_ADPTR_ADDR
19901 /* The upper bound address range of the ALT_NOC_CCU_L4_LINK_RATE_ADPTR component. */
19902 #define ALT_NOC_CCU_L4_LINK_RATE_ADPTR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_CCU_L4_LINK_RATE_ADPTR_ADDR) + 0x80) - 1))
19903 
19904 
19905 /*
19906  * Component Instance : dma_nonsecure
19907  *
19908  * Instance dma_nonsecure of component ALT_DMA.
19909  *
19910  *
19911  */
19912 /* The address of the ALT_DMA_DATA register for the ALT_DMA_NONSECURE instance. */
19913 #define ALT_DMA_NONSECURE_DATA_ADDR ALT_DMA_DATA_ADDR(ALT_DMA_NONSECURE_ADDR)
19914 /* The base address byte offset for the start of the ALT_DMA_NONSECURE component. */
19915 #define ALT_DMA_NONSECURE_OFST 0xffda0000
19916 /* The start address of the ALT_DMA_NONSECURE component. */
19917 #define ALT_DMA_NONSECURE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NONSECURE_OFST))
19918 /* The lower bound address range of the ALT_DMA_NONSECURE component. */
19919 #define ALT_DMA_NONSECURE_LB_ADDR ALT_DMA_NONSECURE_ADDR
19920 /* The upper bound address range of the ALT_DMA_NONSECURE component. */
19921 #define ALT_DMA_NONSECURE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NONSECURE_ADDR) + 0x1000) - 1))
19922 
19923 
19924 /*
19925  * Component Instance : dma_secure
19926  *
19927  * Instance dma_secure of component ALT_DMA.
19928  *
19929  *
19930  */
19931 /* The address of the ALT_DMA_DATA register for the ALT_DMA_SECURE instance. */
19932 #define ALT_DMA_SECURE_DATA_ADDR ALT_DMA_DATA_ADDR(ALT_DMA_SECURE_ADDR)
19933 /* The base address byte offset for the start of the ALT_DMA_SECURE component. */
19934 #define ALT_DMA_SECURE_OFST 0xffda1000
19935 /* The start address of the ALT_DMA_SECURE component. */
19936 #define ALT_DMA_SECURE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SECURE_OFST))
19937 /* The lower bound address range of the ALT_DMA_SECURE component. */
19938 #define ALT_DMA_SECURE_LB_ADDR ALT_DMA_SECURE_ADDR
19939 /* The upper bound address range of the ALT_DMA_SECURE component. */
19940 #define ALT_DMA_SECURE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SECURE_ADDR) + 0x1000) - 1))
19941 
19942 
19943 /*
19944  * Component Instance : spis0
19945  *
19946  * Instance spis0 of component ALT_SPIS.
19947  *
19948  *
19949  */
19950 /* The address of the ALT_SPIS_CTRLR0 register for the ALT_SPIS0 instance. */
19951 #define ALT_SPIS0_CTRLR0_ADDR ALT_SPIS_CTRLR0_ADDR(ALT_SPIS0_ADDR)
19952 /* The address of the ALT_SPIS_SSIENR register for the ALT_SPIS0 instance. */
19953 #define ALT_SPIS0_SSIENR_ADDR ALT_SPIS_SSIENR_ADDR(ALT_SPIS0_ADDR)
19954 /* The address of the ALT_SPIS_MWCR register for the ALT_SPIS0 instance. */
19955 #define ALT_SPIS0_MWCR_ADDR ALT_SPIS_MWCR_ADDR(ALT_SPIS0_ADDR)
19956 /* The address of the ALT_SPIS_TXFTLR register for the ALT_SPIS0 instance. */
19957 #define ALT_SPIS0_TXFTLR_ADDR ALT_SPIS_TXFTLR_ADDR(ALT_SPIS0_ADDR)
19958 /* The address of the ALT_SPIS_RXFTLR register for the ALT_SPIS0 instance. */
19959 #define ALT_SPIS0_RXFTLR_ADDR ALT_SPIS_RXFTLR_ADDR(ALT_SPIS0_ADDR)
19960 /* The address of the ALT_SPIS_TXFLR register for the ALT_SPIS0 instance. */
19961 #define ALT_SPIS0_TXFLR_ADDR ALT_SPIS_TXFLR_ADDR(ALT_SPIS0_ADDR)
19962 /* The address of the ALT_SPIS_RXFLR register for the ALT_SPIS0 instance. */
19963 #define ALT_SPIS0_RXFLR_ADDR ALT_SPIS_RXFLR_ADDR(ALT_SPIS0_ADDR)
19964 /* The address of the ALT_SPIS_SR register for the ALT_SPIS0 instance. */
19965 #define ALT_SPIS0_SR_ADDR ALT_SPIS_SR_ADDR(ALT_SPIS0_ADDR)
19966 /* The address of the ALT_SPIS_IMR register for the ALT_SPIS0 instance. */
19967 #define ALT_SPIS0_IMR_ADDR ALT_SPIS_IMR_ADDR(ALT_SPIS0_ADDR)
19968 /* The address of the ALT_SPIS_ISR register for the ALT_SPIS0 instance. */
19969 #define ALT_SPIS0_ISR_ADDR ALT_SPIS_ISR_ADDR(ALT_SPIS0_ADDR)
19970 /* The address of the ALT_SPIS_RISR register for the ALT_SPIS0 instance. */
19971 #define ALT_SPIS0_RISR_ADDR ALT_SPIS_RISR_ADDR(ALT_SPIS0_ADDR)
19972 /* The address of the ALT_SPIS_TXOICR register for the ALT_SPIS0 instance. */
19973 #define ALT_SPIS0_TXOICR_ADDR ALT_SPIS_TXOICR_ADDR(ALT_SPIS0_ADDR)
19974 /* The address of the ALT_SPIS_RXOICR register for the ALT_SPIS0 instance. */
19975 #define ALT_SPIS0_RXOICR_ADDR ALT_SPIS_RXOICR_ADDR(ALT_SPIS0_ADDR)
19976 /* The address of the ALT_SPIS_RXUICR register for the ALT_SPIS0 instance. */
19977 #define ALT_SPIS0_RXUICR_ADDR ALT_SPIS_RXUICR_ADDR(ALT_SPIS0_ADDR)
19978 /* The address of the ALT_SPIS_MSTICR register for the ALT_SPIS0 instance. */
19979 #define ALT_SPIS0_MSTICR_ADDR ALT_SPIS_MSTICR_ADDR(ALT_SPIS0_ADDR)
19980 /* The address of the ALT_SPIS_ICR register for the ALT_SPIS0 instance. */
19981 #define ALT_SPIS0_ICR_ADDR ALT_SPIS_ICR_ADDR(ALT_SPIS0_ADDR)
19982 /* The address of the ALT_SPIS_DMACR register for the ALT_SPIS0 instance. */
19983 #define ALT_SPIS0_DMACR_ADDR ALT_SPIS_DMACR_ADDR(ALT_SPIS0_ADDR)
19984 /* The address of the ALT_SPIS_DMATDLR register for the ALT_SPIS0 instance. */
19985 #define ALT_SPIS0_DMATDLR_ADDR ALT_SPIS_DMATDLR_ADDR(ALT_SPIS0_ADDR)
19986 /* The address of the ALT_SPIS_DMARDLR register for the ALT_SPIS0 instance. */
19987 #define ALT_SPIS0_DMARDLR_ADDR ALT_SPIS_DMARDLR_ADDR(ALT_SPIS0_ADDR)
19988 /* The address of the ALT_SPIS_IDR register for the ALT_SPIS0 instance. */
19989 #define ALT_SPIS0_IDR_ADDR ALT_SPIS_IDR_ADDR(ALT_SPIS0_ADDR)
19990 /* The address of the ALT_SPIS_SSI_VERSION_ID register for the ALT_SPIS0 instance. */
19991 #define ALT_SPIS0_SSI_VERSION_ID_ADDR ALT_SPIS_SSI_VERSION_ID_ADDR(ALT_SPIS0_ADDR)
19992 /* The address of the ALT_SPIS_DR0 register for the ALT_SPIS0 instance. */
19993 #define ALT_SPIS0_DR0_ADDR ALT_SPIS_DR0_ADDR(ALT_SPIS0_ADDR)
19994 /* The address of the ALT_SPIS_DR1 register for the ALT_SPIS0 instance. */
19995 #define ALT_SPIS0_DR1_ADDR ALT_SPIS_DR1_ADDR(ALT_SPIS0_ADDR)
19996 /* The address of the ALT_SPIS_DR2 register for the ALT_SPIS0 instance. */
19997 #define ALT_SPIS0_DR2_ADDR ALT_SPIS_DR2_ADDR(ALT_SPIS0_ADDR)
19998 /* The address of the ALT_SPIS_DR3 register for the ALT_SPIS0 instance. */
19999 #define ALT_SPIS0_DR3_ADDR ALT_SPIS_DR3_ADDR(ALT_SPIS0_ADDR)
20000 /* The address of the ALT_SPIS_DR4 register for the ALT_SPIS0 instance. */
20001 #define ALT_SPIS0_DR4_ADDR ALT_SPIS_DR4_ADDR(ALT_SPIS0_ADDR)
20002 /* The address of the ALT_SPIS_DR5 register for the ALT_SPIS0 instance. */
20003 #define ALT_SPIS0_DR5_ADDR ALT_SPIS_DR5_ADDR(ALT_SPIS0_ADDR)
20004 /* The address of the ALT_SPIS_DR6 register for the ALT_SPIS0 instance. */
20005 #define ALT_SPIS0_DR6_ADDR ALT_SPIS_DR6_ADDR(ALT_SPIS0_ADDR)
20006 /* The address of the ALT_SPIS_DR7 register for the ALT_SPIS0 instance. */
20007 #define ALT_SPIS0_DR7_ADDR ALT_SPIS_DR7_ADDR(ALT_SPIS0_ADDR)
20008 /* The address of the ALT_SPIS_DR8 register for the ALT_SPIS0 instance. */
20009 #define ALT_SPIS0_DR8_ADDR ALT_SPIS_DR8_ADDR(ALT_SPIS0_ADDR)
20010 /* The address of the ALT_SPIS_DR9 register for the ALT_SPIS0 instance. */
20011 #define ALT_SPIS0_DR9_ADDR ALT_SPIS_DR9_ADDR(ALT_SPIS0_ADDR)
20012 /* The address of the ALT_SPIS_DR10 register for the ALT_SPIS0 instance. */
20013 #define ALT_SPIS0_DR10_ADDR ALT_SPIS_DR10_ADDR(ALT_SPIS0_ADDR)
20014 /* The address of the ALT_SPIS_DR11 register for the ALT_SPIS0 instance. */
20015 #define ALT_SPIS0_DR11_ADDR ALT_SPIS_DR11_ADDR(ALT_SPIS0_ADDR)
20016 /* The address of the ALT_SPIS_DR12 register for the ALT_SPIS0 instance. */
20017 #define ALT_SPIS0_DR12_ADDR ALT_SPIS_DR12_ADDR(ALT_SPIS0_ADDR)
20018 /* The address of the ALT_SPIS_DR13 register for the ALT_SPIS0 instance. */
20019 #define ALT_SPIS0_DR13_ADDR ALT_SPIS_DR13_ADDR(ALT_SPIS0_ADDR)
20020 /* The address of the ALT_SPIS_DR14 register for the ALT_SPIS0 instance. */
20021 #define ALT_SPIS0_DR14_ADDR ALT_SPIS_DR14_ADDR(ALT_SPIS0_ADDR)
20022 /* The address of the ALT_SPIS_DR15 register for the ALT_SPIS0 instance. */
20023 #define ALT_SPIS0_DR15_ADDR ALT_SPIS_DR15_ADDR(ALT_SPIS0_ADDR)
20024 /* The address of the ALT_SPIS_DR16 register for the ALT_SPIS0 instance. */
20025 #define ALT_SPIS0_DR16_ADDR ALT_SPIS_DR16_ADDR(ALT_SPIS0_ADDR)
20026 /* The address of the ALT_SPIS_DR17 register for the ALT_SPIS0 instance. */
20027 #define ALT_SPIS0_DR17_ADDR ALT_SPIS_DR17_ADDR(ALT_SPIS0_ADDR)
20028 /* The address of the ALT_SPIS_DR18 register for the ALT_SPIS0 instance. */
20029 #define ALT_SPIS0_DR18_ADDR ALT_SPIS_DR18_ADDR(ALT_SPIS0_ADDR)
20030 /* The address of the ALT_SPIS_DR19 register for the ALT_SPIS0 instance. */
20031 #define ALT_SPIS0_DR19_ADDR ALT_SPIS_DR19_ADDR(ALT_SPIS0_ADDR)
20032 /* The address of the ALT_SPIS_DR20 register for the ALT_SPIS0 instance. */
20033 #define ALT_SPIS0_DR20_ADDR ALT_SPIS_DR20_ADDR(ALT_SPIS0_ADDR)
20034 /* The address of the ALT_SPIS_DR21 register for the ALT_SPIS0 instance. */
20035 #define ALT_SPIS0_DR21_ADDR ALT_SPIS_DR21_ADDR(ALT_SPIS0_ADDR)
20036 /* The address of the ALT_SPIS_DR22 register for the ALT_SPIS0 instance. */
20037 #define ALT_SPIS0_DR22_ADDR ALT_SPIS_DR22_ADDR(ALT_SPIS0_ADDR)
20038 /* The address of the ALT_SPIS_DR23 register for the ALT_SPIS0 instance. */
20039 #define ALT_SPIS0_DR23_ADDR ALT_SPIS_DR23_ADDR(ALT_SPIS0_ADDR)
20040 /* The address of the ALT_SPIS_DR24 register for the ALT_SPIS0 instance. */
20041 #define ALT_SPIS0_DR24_ADDR ALT_SPIS_DR24_ADDR(ALT_SPIS0_ADDR)
20042 /* The address of the ALT_SPIS_DR25 register for the ALT_SPIS0 instance. */
20043 #define ALT_SPIS0_DR25_ADDR ALT_SPIS_DR25_ADDR(ALT_SPIS0_ADDR)
20044 /* The address of the ALT_SPIS_DR26 register for the ALT_SPIS0 instance. */
20045 #define ALT_SPIS0_DR26_ADDR ALT_SPIS_DR26_ADDR(ALT_SPIS0_ADDR)
20046 /* The address of the ALT_SPIS_DR27 register for the ALT_SPIS0 instance. */
20047 #define ALT_SPIS0_DR27_ADDR ALT_SPIS_DR27_ADDR(ALT_SPIS0_ADDR)
20048 /* The address of the ALT_SPIS_DR28 register for the ALT_SPIS0 instance. */
20049 #define ALT_SPIS0_DR28_ADDR ALT_SPIS_DR28_ADDR(ALT_SPIS0_ADDR)
20050 /* The address of the ALT_SPIS_DR29 register for the ALT_SPIS0 instance. */
20051 #define ALT_SPIS0_DR29_ADDR ALT_SPIS_DR29_ADDR(ALT_SPIS0_ADDR)
20052 /* The address of the ALT_SPIS_DR30 register for the ALT_SPIS0 instance. */
20053 #define ALT_SPIS0_DR30_ADDR ALT_SPIS_DR30_ADDR(ALT_SPIS0_ADDR)
20054 /* The address of the ALT_SPIS_DR31 register for the ALT_SPIS0 instance. */
20055 #define ALT_SPIS0_DR31_ADDR ALT_SPIS_DR31_ADDR(ALT_SPIS0_ADDR)
20056 /* The address of the ALT_SPIS_DR32 register for the ALT_SPIS0 instance. */
20057 #define ALT_SPIS0_DR32_ADDR ALT_SPIS_DR32_ADDR(ALT_SPIS0_ADDR)
20058 /* The address of the ALT_SPIS_DR33 register for the ALT_SPIS0 instance. */
20059 #define ALT_SPIS0_DR33_ADDR ALT_SPIS_DR33_ADDR(ALT_SPIS0_ADDR)
20060 /* The address of the ALT_SPIS_DR34 register for the ALT_SPIS0 instance. */
20061 #define ALT_SPIS0_DR34_ADDR ALT_SPIS_DR34_ADDR(ALT_SPIS0_ADDR)
20062 /* The address of the ALT_SPIS_DR35 register for the ALT_SPIS0 instance. */
20063 #define ALT_SPIS0_DR35_ADDR ALT_SPIS_DR35_ADDR(ALT_SPIS0_ADDR)
20064 /* The address of the ALT_SPIS_RSVD_1 register for the ALT_SPIS0 instance. */
20065 #define ALT_SPIS0_RSVD_1_ADDR ALT_SPIS_RSVD_1_ADDR(ALT_SPIS0_ADDR)
20066 /* The address of the ALT_SPIS_RSVD_2 register for the ALT_SPIS0 instance. */
20067 #define ALT_SPIS0_RSVD_2_ADDR ALT_SPIS_RSVD_2_ADDR(ALT_SPIS0_ADDR)
20068 /* The base address byte offset for the start of the ALT_SPIS0 component. */
20069 #define ALT_SPIS0_OFST 0xffda2000
20070 /* The start address of the ALT_SPIS0 component. */
20071 #define ALT_SPIS0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIS0_OFST))
20072 /* The lower bound address range of the ALT_SPIS0 component. */
20073 #define ALT_SPIS0_LB_ADDR ALT_SPIS0_ADDR
20074 /* The upper bound address range of the ALT_SPIS0 component. */
20075 #define ALT_SPIS0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIS0_ADDR) + 0x100) - 1))
20076 
20077 
20078 /*
20079  * Component Instance : spis1
20080  *
20081  * Instance spis1 of component ALT_SPIS.
20082  *
20083  *
20084  */
20085 /* The address of the ALT_SPIS_CTRLR0 register for the ALT_SPIS1 instance. */
20086 #define ALT_SPIS1_CTRLR0_ADDR ALT_SPIS_CTRLR0_ADDR(ALT_SPIS1_ADDR)
20087 /* The address of the ALT_SPIS_SSIENR register for the ALT_SPIS1 instance. */
20088 #define ALT_SPIS1_SSIENR_ADDR ALT_SPIS_SSIENR_ADDR(ALT_SPIS1_ADDR)
20089 /* The address of the ALT_SPIS_MWCR register for the ALT_SPIS1 instance. */
20090 #define ALT_SPIS1_MWCR_ADDR ALT_SPIS_MWCR_ADDR(ALT_SPIS1_ADDR)
20091 /* The address of the ALT_SPIS_TXFTLR register for the ALT_SPIS1 instance. */
20092 #define ALT_SPIS1_TXFTLR_ADDR ALT_SPIS_TXFTLR_ADDR(ALT_SPIS1_ADDR)
20093 /* The address of the ALT_SPIS_RXFTLR register for the ALT_SPIS1 instance. */
20094 #define ALT_SPIS1_RXFTLR_ADDR ALT_SPIS_RXFTLR_ADDR(ALT_SPIS1_ADDR)
20095 /* The address of the ALT_SPIS_TXFLR register for the ALT_SPIS1 instance. */
20096 #define ALT_SPIS1_TXFLR_ADDR ALT_SPIS_TXFLR_ADDR(ALT_SPIS1_ADDR)
20097 /* The address of the ALT_SPIS_RXFLR register for the ALT_SPIS1 instance. */
20098 #define ALT_SPIS1_RXFLR_ADDR ALT_SPIS_RXFLR_ADDR(ALT_SPIS1_ADDR)
20099 /* The address of the ALT_SPIS_SR register for the ALT_SPIS1 instance. */
20100 #define ALT_SPIS1_SR_ADDR ALT_SPIS_SR_ADDR(ALT_SPIS1_ADDR)
20101 /* The address of the ALT_SPIS_IMR register for the ALT_SPIS1 instance. */
20102 #define ALT_SPIS1_IMR_ADDR ALT_SPIS_IMR_ADDR(ALT_SPIS1_ADDR)
20103 /* The address of the ALT_SPIS_ISR register for the ALT_SPIS1 instance. */
20104 #define ALT_SPIS1_ISR_ADDR ALT_SPIS_ISR_ADDR(ALT_SPIS1_ADDR)
20105 /* The address of the ALT_SPIS_RISR register for the ALT_SPIS1 instance. */
20106 #define ALT_SPIS1_RISR_ADDR ALT_SPIS_RISR_ADDR(ALT_SPIS1_ADDR)
20107 /* The address of the ALT_SPIS_TXOICR register for the ALT_SPIS1 instance. */
20108 #define ALT_SPIS1_TXOICR_ADDR ALT_SPIS_TXOICR_ADDR(ALT_SPIS1_ADDR)
20109 /* The address of the ALT_SPIS_RXOICR register for the ALT_SPIS1 instance. */
20110 #define ALT_SPIS1_RXOICR_ADDR ALT_SPIS_RXOICR_ADDR(ALT_SPIS1_ADDR)
20111 /* The address of the ALT_SPIS_RXUICR register for the ALT_SPIS1 instance. */
20112 #define ALT_SPIS1_RXUICR_ADDR ALT_SPIS_RXUICR_ADDR(ALT_SPIS1_ADDR)
20113 /* The address of the ALT_SPIS_MSTICR register for the ALT_SPIS1 instance. */
20114 #define ALT_SPIS1_MSTICR_ADDR ALT_SPIS_MSTICR_ADDR(ALT_SPIS1_ADDR)
20115 /* The address of the ALT_SPIS_ICR register for the ALT_SPIS1 instance. */
20116 #define ALT_SPIS1_ICR_ADDR ALT_SPIS_ICR_ADDR(ALT_SPIS1_ADDR)
20117 /* The address of the ALT_SPIS_DMACR register for the ALT_SPIS1 instance. */
20118 #define ALT_SPIS1_DMACR_ADDR ALT_SPIS_DMACR_ADDR(ALT_SPIS1_ADDR)
20119 /* The address of the ALT_SPIS_DMATDLR register for the ALT_SPIS1 instance. */
20120 #define ALT_SPIS1_DMATDLR_ADDR ALT_SPIS_DMATDLR_ADDR(ALT_SPIS1_ADDR)
20121 /* The address of the ALT_SPIS_DMARDLR register for the ALT_SPIS1 instance. */
20122 #define ALT_SPIS1_DMARDLR_ADDR ALT_SPIS_DMARDLR_ADDR(ALT_SPIS1_ADDR)
20123 /* The address of the ALT_SPIS_IDR register for the ALT_SPIS1 instance. */
20124 #define ALT_SPIS1_IDR_ADDR ALT_SPIS_IDR_ADDR(ALT_SPIS1_ADDR)
20125 /* The address of the ALT_SPIS_SSI_VERSION_ID register for the ALT_SPIS1 instance. */
20126 #define ALT_SPIS1_SSI_VERSION_ID_ADDR ALT_SPIS_SSI_VERSION_ID_ADDR(ALT_SPIS1_ADDR)
20127 /* The address of the ALT_SPIS_DR0 register for the ALT_SPIS1 instance. */
20128 #define ALT_SPIS1_DR0_ADDR ALT_SPIS_DR0_ADDR(ALT_SPIS1_ADDR)
20129 /* The address of the ALT_SPIS_DR1 register for the ALT_SPIS1 instance. */
20130 #define ALT_SPIS1_DR1_ADDR ALT_SPIS_DR1_ADDR(ALT_SPIS1_ADDR)
20131 /* The address of the ALT_SPIS_DR2 register for the ALT_SPIS1 instance. */
20132 #define ALT_SPIS1_DR2_ADDR ALT_SPIS_DR2_ADDR(ALT_SPIS1_ADDR)
20133 /* The address of the ALT_SPIS_DR3 register for the ALT_SPIS1 instance. */
20134 #define ALT_SPIS1_DR3_ADDR ALT_SPIS_DR3_ADDR(ALT_SPIS1_ADDR)
20135 /* The address of the ALT_SPIS_DR4 register for the ALT_SPIS1 instance. */
20136 #define ALT_SPIS1_DR4_ADDR ALT_SPIS_DR4_ADDR(ALT_SPIS1_ADDR)
20137 /* The address of the ALT_SPIS_DR5 register for the ALT_SPIS1 instance. */
20138 #define ALT_SPIS1_DR5_ADDR ALT_SPIS_DR5_ADDR(ALT_SPIS1_ADDR)
20139 /* The address of the ALT_SPIS_DR6 register for the ALT_SPIS1 instance. */
20140 #define ALT_SPIS1_DR6_ADDR ALT_SPIS_DR6_ADDR(ALT_SPIS1_ADDR)
20141 /* The address of the ALT_SPIS_DR7 register for the ALT_SPIS1 instance. */
20142 #define ALT_SPIS1_DR7_ADDR ALT_SPIS_DR7_ADDR(ALT_SPIS1_ADDR)
20143 /* The address of the ALT_SPIS_DR8 register for the ALT_SPIS1 instance. */
20144 #define ALT_SPIS1_DR8_ADDR ALT_SPIS_DR8_ADDR(ALT_SPIS1_ADDR)
20145 /* The address of the ALT_SPIS_DR9 register for the ALT_SPIS1 instance. */
20146 #define ALT_SPIS1_DR9_ADDR ALT_SPIS_DR9_ADDR(ALT_SPIS1_ADDR)
20147 /* The address of the ALT_SPIS_DR10 register for the ALT_SPIS1 instance. */
20148 #define ALT_SPIS1_DR10_ADDR ALT_SPIS_DR10_ADDR(ALT_SPIS1_ADDR)
20149 /* The address of the ALT_SPIS_DR11 register for the ALT_SPIS1 instance. */
20150 #define ALT_SPIS1_DR11_ADDR ALT_SPIS_DR11_ADDR(ALT_SPIS1_ADDR)
20151 /* The address of the ALT_SPIS_DR12 register for the ALT_SPIS1 instance. */
20152 #define ALT_SPIS1_DR12_ADDR ALT_SPIS_DR12_ADDR(ALT_SPIS1_ADDR)
20153 /* The address of the ALT_SPIS_DR13 register for the ALT_SPIS1 instance. */
20154 #define ALT_SPIS1_DR13_ADDR ALT_SPIS_DR13_ADDR(ALT_SPIS1_ADDR)
20155 /* The address of the ALT_SPIS_DR14 register for the ALT_SPIS1 instance. */
20156 #define ALT_SPIS1_DR14_ADDR ALT_SPIS_DR14_ADDR(ALT_SPIS1_ADDR)
20157 /* The address of the ALT_SPIS_DR15 register for the ALT_SPIS1 instance. */
20158 #define ALT_SPIS1_DR15_ADDR ALT_SPIS_DR15_ADDR(ALT_SPIS1_ADDR)
20159 /* The address of the ALT_SPIS_DR16 register for the ALT_SPIS1 instance. */
20160 #define ALT_SPIS1_DR16_ADDR ALT_SPIS_DR16_ADDR(ALT_SPIS1_ADDR)
20161 /* The address of the ALT_SPIS_DR17 register for the ALT_SPIS1 instance. */
20162 #define ALT_SPIS1_DR17_ADDR ALT_SPIS_DR17_ADDR(ALT_SPIS1_ADDR)
20163 /* The address of the ALT_SPIS_DR18 register for the ALT_SPIS1 instance. */
20164 #define ALT_SPIS1_DR18_ADDR ALT_SPIS_DR18_ADDR(ALT_SPIS1_ADDR)
20165 /* The address of the ALT_SPIS_DR19 register for the ALT_SPIS1 instance. */
20166 #define ALT_SPIS1_DR19_ADDR ALT_SPIS_DR19_ADDR(ALT_SPIS1_ADDR)
20167 /* The address of the ALT_SPIS_DR20 register for the ALT_SPIS1 instance. */
20168 #define ALT_SPIS1_DR20_ADDR ALT_SPIS_DR20_ADDR(ALT_SPIS1_ADDR)
20169 /* The address of the ALT_SPIS_DR21 register for the ALT_SPIS1 instance. */
20170 #define ALT_SPIS1_DR21_ADDR ALT_SPIS_DR21_ADDR(ALT_SPIS1_ADDR)
20171 /* The address of the ALT_SPIS_DR22 register for the ALT_SPIS1 instance. */
20172 #define ALT_SPIS1_DR22_ADDR ALT_SPIS_DR22_ADDR(ALT_SPIS1_ADDR)
20173 /* The address of the ALT_SPIS_DR23 register for the ALT_SPIS1 instance. */
20174 #define ALT_SPIS1_DR23_ADDR ALT_SPIS_DR23_ADDR(ALT_SPIS1_ADDR)
20175 /* The address of the ALT_SPIS_DR24 register for the ALT_SPIS1 instance. */
20176 #define ALT_SPIS1_DR24_ADDR ALT_SPIS_DR24_ADDR(ALT_SPIS1_ADDR)
20177 /* The address of the ALT_SPIS_DR25 register for the ALT_SPIS1 instance. */
20178 #define ALT_SPIS1_DR25_ADDR ALT_SPIS_DR25_ADDR(ALT_SPIS1_ADDR)
20179 /* The address of the ALT_SPIS_DR26 register for the ALT_SPIS1 instance. */
20180 #define ALT_SPIS1_DR26_ADDR ALT_SPIS_DR26_ADDR(ALT_SPIS1_ADDR)
20181 /* The address of the ALT_SPIS_DR27 register for the ALT_SPIS1 instance. */
20182 #define ALT_SPIS1_DR27_ADDR ALT_SPIS_DR27_ADDR(ALT_SPIS1_ADDR)
20183 /* The address of the ALT_SPIS_DR28 register for the ALT_SPIS1 instance. */
20184 #define ALT_SPIS1_DR28_ADDR ALT_SPIS_DR28_ADDR(ALT_SPIS1_ADDR)
20185 /* The address of the ALT_SPIS_DR29 register for the ALT_SPIS1 instance. */
20186 #define ALT_SPIS1_DR29_ADDR ALT_SPIS_DR29_ADDR(ALT_SPIS1_ADDR)
20187 /* The address of the ALT_SPIS_DR30 register for the ALT_SPIS1 instance. */
20188 #define ALT_SPIS1_DR30_ADDR ALT_SPIS_DR30_ADDR(ALT_SPIS1_ADDR)
20189 /* The address of the ALT_SPIS_DR31 register for the ALT_SPIS1 instance. */
20190 #define ALT_SPIS1_DR31_ADDR ALT_SPIS_DR31_ADDR(ALT_SPIS1_ADDR)
20191 /* The address of the ALT_SPIS_DR32 register for the ALT_SPIS1 instance. */
20192 #define ALT_SPIS1_DR32_ADDR ALT_SPIS_DR32_ADDR(ALT_SPIS1_ADDR)
20193 /* The address of the ALT_SPIS_DR33 register for the ALT_SPIS1 instance. */
20194 #define ALT_SPIS1_DR33_ADDR ALT_SPIS_DR33_ADDR(ALT_SPIS1_ADDR)
20195 /* The address of the ALT_SPIS_DR34 register for the ALT_SPIS1 instance. */
20196 #define ALT_SPIS1_DR34_ADDR ALT_SPIS_DR34_ADDR(ALT_SPIS1_ADDR)
20197 /* The address of the ALT_SPIS_DR35 register for the ALT_SPIS1 instance. */
20198 #define ALT_SPIS1_DR35_ADDR ALT_SPIS_DR35_ADDR(ALT_SPIS1_ADDR)
20199 /* The address of the ALT_SPIS_RSVD_1 register for the ALT_SPIS1 instance. */
20200 #define ALT_SPIS1_RSVD_1_ADDR ALT_SPIS_RSVD_1_ADDR(ALT_SPIS1_ADDR)
20201 /* The address of the ALT_SPIS_RSVD_2 register for the ALT_SPIS1 instance. */
20202 #define ALT_SPIS1_RSVD_2_ADDR ALT_SPIS_RSVD_2_ADDR(ALT_SPIS1_ADDR)
20203 /* The base address byte offset for the start of the ALT_SPIS1 component. */
20204 #define ALT_SPIS1_OFST 0xffda3000
20205 /* The start address of the ALT_SPIS1 component. */
20206 #define ALT_SPIS1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIS1_OFST))
20207 /* The lower bound address range of the ALT_SPIS1 component. */
20208 #define ALT_SPIS1_LB_ADDR ALT_SPIS1_ADDR
20209 /* The upper bound address range of the ALT_SPIS1 component. */
20210 #define ALT_SPIS1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIS1_ADDR) + 0x100) - 1))
20211 
20212 
20213 /*
20214  * Component Instance : spim0
20215  *
20216  * Instance spim0 of component ALT_SPIM.
20217  *
20218  *
20219  */
20220 /* The address of the ALT_SPIM_CTRLR0 register for the ALT_SPIM0 instance. */
20221 #define ALT_SPIM0_CTRLR0_ADDR ALT_SPIM_CTRLR0_ADDR(ALT_SPIM0_ADDR)
20222 /* The address of the ALT_SPIM_CTRLR1 register for the ALT_SPIM0 instance. */
20223 #define ALT_SPIM0_CTRLR1_ADDR ALT_SPIM_CTRLR1_ADDR(ALT_SPIM0_ADDR)
20224 /* The address of the ALT_SPIM_SSIENR register for the ALT_SPIM0 instance. */
20225 #define ALT_SPIM0_SSIENR_ADDR ALT_SPIM_SSIENR_ADDR(ALT_SPIM0_ADDR)
20226 /* The address of the ALT_SPIM_MWCR register for the ALT_SPIM0 instance. */
20227 #define ALT_SPIM0_MWCR_ADDR ALT_SPIM_MWCR_ADDR(ALT_SPIM0_ADDR)
20228 /* The address of the ALT_SPIM_SER register for the ALT_SPIM0 instance. */
20229 #define ALT_SPIM0_SER_ADDR ALT_SPIM_SER_ADDR(ALT_SPIM0_ADDR)
20230 /* The address of the ALT_SPIM_BAUDR register for the ALT_SPIM0 instance. */
20231 #define ALT_SPIM0_BAUDR_ADDR ALT_SPIM_BAUDR_ADDR(ALT_SPIM0_ADDR)
20232 /* The address of the ALT_SPIM_TXFTLR register for the ALT_SPIM0 instance. */
20233 #define ALT_SPIM0_TXFTLR_ADDR ALT_SPIM_TXFTLR_ADDR(ALT_SPIM0_ADDR)
20234 /* The address of the ALT_SPIM_RXFTLR register for the ALT_SPIM0 instance. */
20235 #define ALT_SPIM0_RXFTLR_ADDR ALT_SPIM_RXFTLR_ADDR(ALT_SPIM0_ADDR)
20236 /* The address of the ALT_SPIM_TXFLR register for the ALT_SPIM0 instance. */
20237 #define ALT_SPIM0_TXFLR_ADDR ALT_SPIM_TXFLR_ADDR(ALT_SPIM0_ADDR)
20238 /* The address of the ALT_SPIM_RXFLR register for the ALT_SPIM0 instance. */
20239 #define ALT_SPIM0_RXFLR_ADDR ALT_SPIM_RXFLR_ADDR(ALT_SPIM0_ADDR)
20240 /* The address of the ALT_SPIM_SR register for the ALT_SPIM0 instance. */
20241 #define ALT_SPIM0_SR_ADDR ALT_SPIM_SR_ADDR(ALT_SPIM0_ADDR)
20242 /* The address of the ALT_SPIM_IMR register for the ALT_SPIM0 instance. */
20243 #define ALT_SPIM0_IMR_ADDR ALT_SPIM_IMR_ADDR(ALT_SPIM0_ADDR)
20244 /* The address of the ALT_SPIM_ISR register for the ALT_SPIM0 instance. */
20245 #define ALT_SPIM0_ISR_ADDR ALT_SPIM_ISR_ADDR(ALT_SPIM0_ADDR)
20246 /* The address of the ALT_SPIM_RISR register for the ALT_SPIM0 instance. */
20247 #define ALT_SPIM0_RISR_ADDR ALT_SPIM_RISR_ADDR(ALT_SPIM0_ADDR)
20248 /* The address of the ALT_SPIM_TXOICR register for the ALT_SPIM0 instance. */
20249 #define ALT_SPIM0_TXOICR_ADDR ALT_SPIM_TXOICR_ADDR(ALT_SPIM0_ADDR)
20250 /* The address of the ALT_SPIM_RXOICR register for the ALT_SPIM0 instance. */
20251 #define ALT_SPIM0_RXOICR_ADDR ALT_SPIM_RXOICR_ADDR(ALT_SPIM0_ADDR)
20252 /* The address of the ALT_SPIM_RXUICR register for the ALT_SPIM0 instance. */
20253 #define ALT_SPIM0_RXUICR_ADDR ALT_SPIM_RXUICR_ADDR(ALT_SPIM0_ADDR)
20254 /* The address of the ALT_SPIM_MSTICR register for the ALT_SPIM0 instance. */
20255 #define ALT_SPIM0_MSTICR_ADDR ALT_SPIM_MSTICR_ADDR(ALT_SPIM0_ADDR)
20256 /* The address of the ALT_SPIM_ICR register for the ALT_SPIM0 instance. */
20257 #define ALT_SPIM0_ICR_ADDR ALT_SPIM_ICR_ADDR(ALT_SPIM0_ADDR)
20258 /* The address of the ALT_SPIM_DMACR register for the ALT_SPIM0 instance. */
20259 #define ALT_SPIM0_DMACR_ADDR ALT_SPIM_DMACR_ADDR(ALT_SPIM0_ADDR)
20260 /* The address of the ALT_SPIM_DMATDLR register for the ALT_SPIM0 instance. */
20261 #define ALT_SPIM0_DMATDLR_ADDR ALT_SPIM_DMATDLR_ADDR(ALT_SPIM0_ADDR)
20262 /* The address of the ALT_SPIM_DMARDLR register for the ALT_SPIM0 instance. */
20263 #define ALT_SPIM0_DMARDLR_ADDR ALT_SPIM_DMARDLR_ADDR(ALT_SPIM0_ADDR)
20264 /* The address of the ALT_SPIM_IDR register for the ALT_SPIM0 instance. */
20265 #define ALT_SPIM0_IDR_ADDR ALT_SPIM_IDR_ADDR(ALT_SPIM0_ADDR)
20266 /* The address of the ALT_SPIM_SSI_VERSION_ID register for the ALT_SPIM0 instance. */
20267 #define ALT_SPIM0_SSI_VERSION_ID_ADDR ALT_SPIM_SSI_VERSION_ID_ADDR(ALT_SPIM0_ADDR)
20268 /* The address of the ALT_SPIM_DR0 register for the ALT_SPIM0 instance. */
20269 #define ALT_SPIM0_DR0_ADDR ALT_SPIM_DR0_ADDR(ALT_SPIM0_ADDR)
20270 /* The address of the ALT_SPIM_DR1 register for the ALT_SPIM0 instance. */
20271 #define ALT_SPIM0_DR1_ADDR ALT_SPIM_DR1_ADDR(ALT_SPIM0_ADDR)
20272 /* The address of the ALT_SPIM_DR2 register for the ALT_SPIM0 instance. */
20273 #define ALT_SPIM0_DR2_ADDR ALT_SPIM_DR2_ADDR(ALT_SPIM0_ADDR)
20274 /* The address of the ALT_SPIM_DR3 register for the ALT_SPIM0 instance. */
20275 #define ALT_SPIM0_DR3_ADDR ALT_SPIM_DR3_ADDR(ALT_SPIM0_ADDR)
20276 /* The address of the ALT_SPIM_DR4 register for the ALT_SPIM0 instance. */
20277 #define ALT_SPIM0_DR4_ADDR ALT_SPIM_DR4_ADDR(ALT_SPIM0_ADDR)
20278 /* The address of the ALT_SPIM_DR5 register for the ALT_SPIM0 instance. */
20279 #define ALT_SPIM0_DR5_ADDR ALT_SPIM_DR5_ADDR(ALT_SPIM0_ADDR)
20280 /* The address of the ALT_SPIM_DR6 register for the ALT_SPIM0 instance. */
20281 #define ALT_SPIM0_DR6_ADDR ALT_SPIM_DR6_ADDR(ALT_SPIM0_ADDR)
20282 /* The address of the ALT_SPIM_DR7 register for the ALT_SPIM0 instance. */
20283 #define ALT_SPIM0_DR7_ADDR ALT_SPIM_DR7_ADDR(ALT_SPIM0_ADDR)
20284 /* The address of the ALT_SPIM_DR8 register for the ALT_SPIM0 instance. */
20285 #define ALT_SPIM0_DR8_ADDR ALT_SPIM_DR8_ADDR(ALT_SPIM0_ADDR)
20286 /* The address of the ALT_SPIM_DR9 register for the ALT_SPIM0 instance. */
20287 #define ALT_SPIM0_DR9_ADDR ALT_SPIM_DR9_ADDR(ALT_SPIM0_ADDR)
20288 /* The address of the ALT_SPIM_DR10 register for the ALT_SPIM0 instance. */
20289 #define ALT_SPIM0_DR10_ADDR ALT_SPIM_DR10_ADDR(ALT_SPIM0_ADDR)
20290 /* The address of the ALT_SPIM_DR11 register for the ALT_SPIM0 instance. */
20291 #define ALT_SPIM0_DR11_ADDR ALT_SPIM_DR11_ADDR(ALT_SPIM0_ADDR)
20292 /* The address of the ALT_SPIM_DR12 register for the ALT_SPIM0 instance. */
20293 #define ALT_SPIM0_DR12_ADDR ALT_SPIM_DR12_ADDR(ALT_SPIM0_ADDR)
20294 /* The address of the ALT_SPIM_DR13 register for the ALT_SPIM0 instance. */
20295 #define ALT_SPIM0_DR13_ADDR ALT_SPIM_DR13_ADDR(ALT_SPIM0_ADDR)
20296 /* The address of the ALT_SPIM_DR14 register for the ALT_SPIM0 instance. */
20297 #define ALT_SPIM0_DR14_ADDR ALT_SPIM_DR14_ADDR(ALT_SPIM0_ADDR)
20298 /* The address of the ALT_SPIM_DR15 register for the ALT_SPIM0 instance. */
20299 #define ALT_SPIM0_DR15_ADDR ALT_SPIM_DR15_ADDR(ALT_SPIM0_ADDR)
20300 /* The address of the ALT_SPIM_DR16 register for the ALT_SPIM0 instance. */
20301 #define ALT_SPIM0_DR16_ADDR ALT_SPIM_DR16_ADDR(ALT_SPIM0_ADDR)
20302 /* The address of the ALT_SPIM_DR17 register for the ALT_SPIM0 instance. */
20303 #define ALT_SPIM0_DR17_ADDR ALT_SPIM_DR17_ADDR(ALT_SPIM0_ADDR)
20304 /* The address of the ALT_SPIM_DR18 register for the ALT_SPIM0 instance. */
20305 #define ALT_SPIM0_DR18_ADDR ALT_SPIM_DR18_ADDR(ALT_SPIM0_ADDR)
20306 /* The address of the ALT_SPIM_DR19 register for the ALT_SPIM0 instance. */
20307 #define ALT_SPIM0_DR19_ADDR ALT_SPIM_DR19_ADDR(ALT_SPIM0_ADDR)
20308 /* The address of the ALT_SPIM_DR20 register for the ALT_SPIM0 instance. */
20309 #define ALT_SPIM0_DR20_ADDR ALT_SPIM_DR20_ADDR(ALT_SPIM0_ADDR)
20310 /* The address of the ALT_SPIM_DR21 register for the ALT_SPIM0 instance. */
20311 #define ALT_SPIM0_DR21_ADDR ALT_SPIM_DR21_ADDR(ALT_SPIM0_ADDR)
20312 /* The address of the ALT_SPIM_DR22 register for the ALT_SPIM0 instance. */
20313 #define ALT_SPIM0_DR22_ADDR ALT_SPIM_DR22_ADDR(ALT_SPIM0_ADDR)
20314 /* The address of the ALT_SPIM_DR23 register for the ALT_SPIM0 instance. */
20315 #define ALT_SPIM0_DR23_ADDR ALT_SPIM_DR23_ADDR(ALT_SPIM0_ADDR)
20316 /* The address of the ALT_SPIM_DR24 register for the ALT_SPIM0 instance. */
20317 #define ALT_SPIM0_DR24_ADDR ALT_SPIM_DR24_ADDR(ALT_SPIM0_ADDR)
20318 /* The address of the ALT_SPIM_DR25 register for the ALT_SPIM0 instance. */
20319 #define ALT_SPIM0_DR25_ADDR ALT_SPIM_DR25_ADDR(ALT_SPIM0_ADDR)
20320 /* The address of the ALT_SPIM_DR26 register for the ALT_SPIM0 instance. */
20321 #define ALT_SPIM0_DR26_ADDR ALT_SPIM_DR26_ADDR(ALT_SPIM0_ADDR)
20322 /* The address of the ALT_SPIM_DR27 register for the ALT_SPIM0 instance. */
20323 #define ALT_SPIM0_DR27_ADDR ALT_SPIM_DR27_ADDR(ALT_SPIM0_ADDR)
20324 /* The address of the ALT_SPIM_DR28 register for the ALT_SPIM0 instance. */
20325 #define ALT_SPIM0_DR28_ADDR ALT_SPIM_DR28_ADDR(ALT_SPIM0_ADDR)
20326 /* The address of the ALT_SPIM_DR29 register for the ALT_SPIM0 instance. */
20327 #define ALT_SPIM0_DR29_ADDR ALT_SPIM_DR29_ADDR(ALT_SPIM0_ADDR)
20328 /* The address of the ALT_SPIM_DR30 register for the ALT_SPIM0 instance. */
20329 #define ALT_SPIM0_DR30_ADDR ALT_SPIM_DR30_ADDR(ALT_SPIM0_ADDR)
20330 /* The address of the ALT_SPIM_DR31 register for the ALT_SPIM0 instance. */
20331 #define ALT_SPIM0_DR31_ADDR ALT_SPIM_DR31_ADDR(ALT_SPIM0_ADDR)
20332 /* The address of the ALT_SPIM_DR32 register for the ALT_SPIM0 instance. */
20333 #define ALT_SPIM0_DR32_ADDR ALT_SPIM_DR32_ADDR(ALT_SPIM0_ADDR)
20334 /* The address of the ALT_SPIM_DR33 register for the ALT_SPIM0 instance. */
20335 #define ALT_SPIM0_DR33_ADDR ALT_SPIM_DR33_ADDR(ALT_SPIM0_ADDR)
20336 /* The address of the ALT_SPIM_DR34 register for the ALT_SPIM0 instance. */
20337 #define ALT_SPIM0_DR34_ADDR ALT_SPIM_DR34_ADDR(ALT_SPIM0_ADDR)
20338 /* The address of the ALT_SPIM_DR35 register for the ALT_SPIM0 instance. */
20339 #define ALT_SPIM0_DR35_ADDR ALT_SPIM_DR35_ADDR(ALT_SPIM0_ADDR)
20340 /* The address of the ALT_SPIM_RX_SAMPLE_DLY register for the ALT_SPIM0 instance. */
20341 #define ALT_SPIM0_RX_SAMPLE_DLY_ADDR ALT_SPIM_RX_SAMPLE_DLY_ADDR(ALT_SPIM0_ADDR)
20342 /* The address of the ALT_SPIM_RSVD_1 register for the ALT_SPIM0 instance. */
20343 #define ALT_SPIM0_RSVD_1_ADDR ALT_SPIM_RSVD_1_ADDR(ALT_SPIM0_ADDR)
20344 /* The address of the ALT_SPIM_RSVD_2 register for the ALT_SPIM0 instance. */
20345 #define ALT_SPIM0_RSVD_2_ADDR ALT_SPIM_RSVD_2_ADDR(ALT_SPIM0_ADDR)
20346 /* The base address byte offset for the start of the ALT_SPIM0 component. */
20347 #define ALT_SPIM0_OFST 0xffda4000
20348 /* The start address of the ALT_SPIM0 component. */
20349 #define ALT_SPIM0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIM0_OFST))
20350 /* The lower bound address range of the ALT_SPIM0 component. */
20351 #define ALT_SPIM0_LB_ADDR ALT_SPIM0_ADDR
20352 /* The upper bound address range of the ALT_SPIM0 component. */
20353 #define ALT_SPIM0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIM0_ADDR) + 0x100) - 1))
20354 
20355 
20356 /*
20357  * Component Instance : spim1
20358  *
20359  * Instance spim1 of component ALT_SPIM.
20360  *
20361  *
20362  */
20363 /* The address of the ALT_SPIM_CTRLR0 register for the ALT_SPIM1 instance. */
20364 #define ALT_SPIM1_CTRLR0_ADDR ALT_SPIM_CTRLR0_ADDR(ALT_SPIM1_ADDR)
20365 /* The address of the ALT_SPIM_CTRLR1 register for the ALT_SPIM1 instance. */
20366 #define ALT_SPIM1_CTRLR1_ADDR ALT_SPIM_CTRLR1_ADDR(ALT_SPIM1_ADDR)
20367 /* The address of the ALT_SPIM_SSIENR register for the ALT_SPIM1 instance. */
20368 #define ALT_SPIM1_SSIENR_ADDR ALT_SPIM_SSIENR_ADDR(ALT_SPIM1_ADDR)
20369 /* The address of the ALT_SPIM_MWCR register for the ALT_SPIM1 instance. */
20370 #define ALT_SPIM1_MWCR_ADDR ALT_SPIM_MWCR_ADDR(ALT_SPIM1_ADDR)
20371 /* The address of the ALT_SPIM_SER register for the ALT_SPIM1 instance. */
20372 #define ALT_SPIM1_SER_ADDR ALT_SPIM_SER_ADDR(ALT_SPIM1_ADDR)
20373 /* The address of the ALT_SPIM_BAUDR register for the ALT_SPIM1 instance. */
20374 #define ALT_SPIM1_BAUDR_ADDR ALT_SPIM_BAUDR_ADDR(ALT_SPIM1_ADDR)
20375 /* The address of the ALT_SPIM_TXFTLR register for the ALT_SPIM1 instance. */
20376 #define ALT_SPIM1_TXFTLR_ADDR ALT_SPIM_TXFTLR_ADDR(ALT_SPIM1_ADDR)
20377 /* The address of the ALT_SPIM_RXFTLR register for the ALT_SPIM1 instance. */
20378 #define ALT_SPIM1_RXFTLR_ADDR ALT_SPIM_RXFTLR_ADDR(ALT_SPIM1_ADDR)
20379 /* The address of the ALT_SPIM_TXFLR register for the ALT_SPIM1 instance. */
20380 #define ALT_SPIM1_TXFLR_ADDR ALT_SPIM_TXFLR_ADDR(ALT_SPIM1_ADDR)
20381 /* The address of the ALT_SPIM_RXFLR register for the ALT_SPIM1 instance. */
20382 #define ALT_SPIM1_RXFLR_ADDR ALT_SPIM_RXFLR_ADDR(ALT_SPIM1_ADDR)
20383 /* The address of the ALT_SPIM_SR register for the ALT_SPIM1 instance. */
20384 #define ALT_SPIM1_SR_ADDR ALT_SPIM_SR_ADDR(ALT_SPIM1_ADDR)
20385 /* The address of the ALT_SPIM_IMR register for the ALT_SPIM1 instance. */
20386 #define ALT_SPIM1_IMR_ADDR ALT_SPIM_IMR_ADDR(ALT_SPIM1_ADDR)
20387 /* The address of the ALT_SPIM_ISR register for the ALT_SPIM1 instance. */
20388 #define ALT_SPIM1_ISR_ADDR ALT_SPIM_ISR_ADDR(ALT_SPIM1_ADDR)
20389 /* The address of the ALT_SPIM_RISR register for the ALT_SPIM1 instance. */
20390 #define ALT_SPIM1_RISR_ADDR ALT_SPIM_RISR_ADDR(ALT_SPIM1_ADDR)
20391 /* The address of the ALT_SPIM_TXOICR register for the ALT_SPIM1 instance. */
20392 #define ALT_SPIM1_TXOICR_ADDR ALT_SPIM_TXOICR_ADDR(ALT_SPIM1_ADDR)
20393 /* The address of the ALT_SPIM_RXOICR register for the ALT_SPIM1 instance. */
20394 #define ALT_SPIM1_RXOICR_ADDR ALT_SPIM_RXOICR_ADDR(ALT_SPIM1_ADDR)
20395 /* The address of the ALT_SPIM_RXUICR register for the ALT_SPIM1 instance. */
20396 #define ALT_SPIM1_RXUICR_ADDR ALT_SPIM_RXUICR_ADDR(ALT_SPIM1_ADDR)
20397 /* The address of the ALT_SPIM_MSTICR register for the ALT_SPIM1 instance. */
20398 #define ALT_SPIM1_MSTICR_ADDR ALT_SPIM_MSTICR_ADDR(ALT_SPIM1_ADDR)
20399 /* The address of the ALT_SPIM_ICR register for the ALT_SPIM1 instance. */
20400 #define ALT_SPIM1_ICR_ADDR ALT_SPIM_ICR_ADDR(ALT_SPIM1_ADDR)
20401 /* The address of the ALT_SPIM_DMACR register for the ALT_SPIM1 instance. */
20402 #define ALT_SPIM1_DMACR_ADDR ALT_SPIM_DMACR_ADDR(ALT_SPIM1_ADDR)
20403 /* The address of the ALT_SPIM_DMATDLR register for the ALT_SPIM1 instance. */
20404 #define ALT_SPIM1_DMATDLR_ADDR ALT_SPIM_DMATDLR_ADDR(ALT_SPIM1_ADDR)
20405 /* The address of the ALT_SPIM_DMARDLR register for the ALT_SPIM1 instance. */
20406 #define ALT_SPIM1_DMARDLR_ADDR ALT_SPIM_DMARDLR_ADDR(ALT_SPIM1_ADDR)
20407 /* The address of the ALT_SPIM_IDR register for the ALT_SPIM1 instance. */
20408 #define ALT_SPIM1_IDR_ADDR ALT_SPIM_IDR_ADDR(ALT_SPIM1_ADDR)
20409 /* The address of the ALT_SPIM_SSI_VERSION_ID register for the ALT_SPIM1 instance. */
20410 #define ALT_SPIM1_SSI_VERSION_ID_ADDR ALT_SPIM_SSI_VERSION_ID_ADDR(ALT_SPIM1_ADDR)
20411 /* The address of the ALT_SPIM_DR0 register for the ALT_SPIM1 instance. */
20412 #define ALT_SPIM1_DR0_ADDR ALT_SPIM_DR0_ADDR(ALT_SPIM1_ADDR)
20413 /* The address of the ALT_SPIM_DR1 register for the ALT_SPIM1 instance. */
20414 #define ALT_SPIM1_DR1_ADDR ALT_SPIM_DR1_ADDR(ALT_SPIM1_ADDR)
20415 /* The address of the ALT_SPIM_DR2 register for the ALT_SPIM1 instance. */
20416 #define ALT_SPIM1_DR2_ADDR ALT_SPIM_DR2_ADDR(ALT_SPIM1_ADDR)
20417 /* The address of the ALT_SPIM_DR3 register for the ALT_SPIM1 instance. */
20418 #define ALT_SPIM1_DR3_ADDR ALT_SPIM_DR3_ADDR(ALT_SPIM1_ADDR)
20419 /* The address of the ALT_SPIM_DR4 register for the ALT_SPIM1 instance. */
20420 #define ALT_SPIM1_DR4_ADDR ALT_SPIM_DR4_ADDR(ALT_SPIM1_ADDR)
20421 /* The address of the ALT_SPIM_DR5 register for the ALT_SPIM1 instance. */
20422 #define ALT_SPIM1_DR5_ADDR ALT_SPIM_DR5_ADDR(ALT_SPIM1_ADDR)
20423 /* The address of the ALT_SPIM_DR6 register for the ALT_SPIM1 instance. */
20424 #define ALT_SPIM1_DR6_ADDR ALT_SPIM_DR6_ADDR(ALT_SPIM1_ADDR)
20425 /* The address of the ALT_SPIM_DR7 register for the ALT_SPIM1 instance. */
20426 #define ALT_SPIM1_DR7_ADDR ALT_SPIM_DR7_ADDR(ALT_SPIM1_ADDR)
20427 /* The address of the ALT_SPIM_DR8 register for the ALT_SPIM1 instance. */
20428 #define ALT_SPIM1_DR8_ADDR ALT_SPIM_DR8_ADDR(ALT_SPIM1_ADDR)
20429 /* The address of the ALT_SPIM_DR9 register for the ALT_SPIM1 instance. */
20430 #define ALT_SPIM1_DR9_ADDR ALT_SPIM_DR9_ADDR(ALT_SPIM1_ADDR)
20431 /* The address of the ALT_SPIM_DR10 register for the ALT_SPIM1 instance. */
20432 #define ALT_SPIM1_DR10_ADDR ALT_SPIM_DR10_ADDR(ALT_SPIM1_ADDR)
20433 /* The address of the ALT_SPIM_DR11 register for the ALT_SPIM1 instance. */
20434 #define ALT_SPIM1_DR11_ADDR ALT_SPIM_DR11_ADDR(ALT_SPIM1_ADDR)
20435 /* The address of the ALT_SPIM_DR12 register for the ALT_SPIM1 instance. */
20436 #define ALT_SPIM1_DR12_ADDR ALT_SPIM_DR12_ADDR(ALT_SPIM1_ADDR)
20437 /* The address of the ALT_SPIM_DR13 register for the ALT_SPIM1 instance. */
20438 #define ALT_SPIM1_DR13_ADDR ALT_SPIM_DR13_ADDR(ALT_SPIM1_ADDR)
20439 /* The address of the ALT_SPIM_DR14 register for the ALT_SPIM1 instance. */
20440 #define ALT_SPIM1_DR14_ADDR ALT_SPIM_DR14_ADDR(ALT_SPIM1_ADDR)
20441 /* The address of the ALT_SPIM_DR15 register for the ALT_SPIM1 instance. */
20442 #define ALT_SPIM1_DR15_ADDR ALT_SPIM_DR15_ADDR(ALT_SPIM1_ADDR)
20443 /* The address of the ALT_SPIM_DR16 register for the ALT_SPIM1 instance. */
20444 #define ALT_SPIM1_DR16_ADDR ALT_SPIM_DR16_ADDR(ALT_SPIM1_ADDR)
20445 /* The address of the ALT_SPIM_DR17 register for the ALT_SPIM1 instance. */
20446 #define ALT_SPIM1_DR17_ADDR ALT_SPIM_DR17_ADDR(ALT_SPIM1_ADDR)
20447 /* The address of the ALT_SPIM_DR18 register for the ALT_SPIM1 instance. */
20448 #define ALT_SPIM1_DR18_ADDR ALT_SPIM_DR18_ADDR(ALT_SPIM1_ADDR)
20449 /* The address of the ALT_SPIM_DR19 register for the ALT_SPIM1 instance. */
20450 #define ALT_SPIM1_DR19_ADDR ALT_SPIM_DR19_ADDR(ALT_SPIM1_ADDR)
20451 /* The address of the ALT_SPIM_DR20 register for the ALT_SPIM1 instance. */
20452 #define ALT_SPIM1_DR20_ADDR ALT_SPIM_DR20_ADDR(ALT_SPIM1_ADDR)
20453 /* The address of the ALT_SPIM_DR21 register for the ALT_SPIM1 instance. */
20454 #define ALT_SPIM1_DR21_ADDR ALT_SPIM_DR21_ADDR(ALT_SPIM1_ADDR)
20455 /* The address of the ALT_SPIM_DR22 register for the ALT_SPIM1 instance. */
20456 #define ALT_SPIM1_DR22_ADDR ALT_SPIM_DR22_ADDR(ALT_SPIM1_ADDR)
20457 /* The address of the ALT_SPIM_DR23 register for the ALT_SPIM1 instance. */
20458 #define ALT_SPIM1_DR23_ADDR ALT_SPIM_DR23_ADDR(ALT_SPIM1_ADDR)
20459 /* The address of the ALT_SPIM_DR24 register for the ALT_SPIM1 instance. */
20460 #define ALT_SPIM1_DR24_ADDR ALT_SPIM_DR24_ADDR(ALT_SPIM1_ADDR)
20461 /* The address of the ALT_SPIM_DR25 register for the ALT_SPIM1 instance. */
20462 #define ALT_SPIM1_DR25_ADDR ALT_SPIM_DR25_ADDR(ALT_SPIM1_ADDR)
20463 /* The address of the ALT_SPIM_DR26 register for the ALT_SPIM1 instance. */
20464 #define ALT_SPIM1_DR26_ADDR ALT_SPIM_DR26_ADDR(ALT_SPIM1_ADDR)
20465 /* The address of the ALT_SPIM_DR27 register for the ALT_SPIM1 instance. */
20466 #define ALT_SPIM1_DR27_ADDR ALT_SPIM_DR27_ADDR(ALT_SPIM1_ADDR)
20467 /* The address of the ALT_SPIM_DR28 register for the ALT_SPIM1 instance. */
20468 #define ALT_SPIM1_DR28_ADDR ALT_SPIM_DR28_ADDR(ALT_SPIM1_ADDR)
20469 /* The address of the ALT_SPIM_DR29 register for the ALT_SPIM1 instance. */
20470 #define ALT_SPIM1_DR29_ADDR ALT_SPIM_DR29_ADDR(ALT_SPIM1_ADDR)
20471 /* The address of the ALT_SPIM_DR30 register for the ALT_SPIM1 instance. */
20472 #define ALT_SPIM1_DR30_ADDR ALT_SPIM_DR30_ADDR(ALT_SPIM1_ADDR)
20473 /* The address of the ALT_SPIM_DR31 register for the ALT_SPIM1 instance. */
20474 #define ALT_SPIM1_DR31_ADDR ALT_SPIM_DR31_ADDR(ALT_SPIM1_ADDR)
20475 /* The address of the ALT_SPIM_DR32 register for the ALT_SPIM1 instance. */
20476 #define ALT_SPIM1_DR32_ADDR ALT_SPIM_DR32_ADDR(ALT_SPIM1_ADDR)
20477 /* The address of the ALT_SPIM_DR33 register for the ALT_SPIM1 instance. */
20478 #define ALT_SPIM1_DR33_ADDR ALT_SPIM_DR33_ADDR(ALT_SPIM1_ADDR)
20479 /* The address of the ALT_SPIM_DR34 register for the ALT_SPIM1 instance. */
20480 #define ALT_SPIM1_DR34_ADDR ALT_SPIM_DR34_ADDR(ALT_SPIM1_ADDR)
20481 /* The address of the ALT_SPIM_DR35 register for the ALT_SPIM1 instance. */
20482 #define ALT_SPIM1_DR35_ADDR ALT_SPIM_DR35_ADDR(ALT_SPIM1_ADDR)
20483 /* The address of the ALT_SPIM_RX_SAMPLE_DLY register for the ALT_SPIM1 instance. */
20484 #define ALT_SPIM1_RX_SAMPLE_DLY_ADDR ALT_SPIM_RX_SAMPLE_DLY_ADDR(ALT_SPIM1_ADDR)
20485 /* The address of the ALT_SPIM_RSVD_1 register for the ALT_SPIM1 instance. */
20486 #define ALT_SPIM1_RSVD_1_ADDR ALT_SPIM_RSVD_1_ADDR(ALT_SPIM1_ADDR)
20487 /* The address of the ALT_SPIM_RSVD_2 register for the ALT_SPIM1 instance. */
20488 #define ALT_SPIM1_RSVD_2_ADDR ALT_SPIM_RSVD_2_ADDR(ALT_SPIM1_ADDR)
20489 /* The base address byte offset for the start of the ALT_SPIM1 component. */
20490 #define ALT_SPIM1_OFST 0xffda5000
20491 /* The start address of the ALT_SPIM1 component. */
20492 #define ALT_SPIM1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIM1_OFST))
20493 /* The lower bound address range of the ALT_SPIM1 component. */
20494 #define ALT_SPIM1_LB_ADDR ALT_SPIM1_ADDR
20495 /* The upper bound address range of the ALT_SPIM1 component. */
20496 #define ALT_SPIM1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIM1_ADDR) + 0x100) - 1))
20497 
20498 
20499 /*
20500  * Component Instance : ocram
20501  *
20502  * Instance ocram of component ALT_OCRAM.
20503  *
20504  *
20505  */
20506 /* The base address byte offset for the start of the ALT_OCRAM component. */
20507 #define ALT_OCRAM_OFST 0xffe00000
20508 /* The start address of the ALT_OCRAM component. */
20509 #define ALT_OCRAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_OCRAM_OFST))
20510 /* The lower bound address range of the ALT_OCRAM component. */
20511 #define ALT_OCRAM_LB_ADDR ALT_OCRAM_ADDR
20512 /* The upper bound address range of the ALT_OCRAM component. */
20513 #define ALT_OCRAM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_OCRAM_ADDR) + 0x40000) - 1))
20514 
20515 
20516 /*
20517  * Component Instance : gic_dist
20518  *
20519  * Instance gic_dist of component ALT_GIC_DIST.
20520  *
20521  *
20522  */
20523 /* The address of the ALT_GIC_DIST_GICD_CTLR register for the ALT_GIC_DIST instance. */
20524 #define ALT_GIC_DIST_GICD_CTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_CTLR_OFST))
20525 /* The address of the ALT_GIC_DIST_GICD_TYPER register for the ALT_GIC_DIST instance. */
20526 #define ALT_GIC_DIST_GICD_TYPER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_TYPER_OFST))
20527 /* The address of the ALT_GIC_DIST_GICD_IIDR register for the ALT_GIC_DIST instance. */
20528 #define ALT_GIC_DIST_GICD_IIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IIDR_OFST))
20529 /* The address of the ALT_GIC_DIST_GICD_IGROUPR0 register for the ALT_GIC_DIST instance. */
20530 #define ALT_GIC_DIST_GICD_IGROUPR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR0_OFST))
20531 /* The address of the ALT_GIC_DIST_GICD_IGROUPR1 register for the ALT_GIC_DIST instance. */
20532 #define ALT_GIC_DIST_GICD_IGROUPR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR1_OFST))
20533 /* The address of the ALT_GIC_DIST_GICD_IGROUPR2 register for the ALT_GIC_DIST instance. */
20534 #define ALT_GIC_DIST_GICD_IGROUPR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR2_OFST))
20535 /* The address of the ALT_GIC_DIST_GICD_IGROUPR3 register for the ALT_GIC_DIST instance. */
20536 #define ALT_GIC_DIST_GICD_IGROUPR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR3_OFST))
20537 /* The address of the ALT_GIC_DIST_GICD_IGROUPR4 register for the ALT_GIC_DIST instance. */
20538 #define ALT_GIC_DIST_GICD_IGROUPR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR4_OFST))
20539 /* The address of the ALT_GIC_DIST_GICD_IGROUPR5 register for the ALT_GIC_DIST instance. */
20540 #define ALT_GIC_DIST_GICD_IGROUPR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR5_OFST))
20541 /* The address of the ALT_GIC_DIST_GICD_IGROUPR6 register for the ALT_GIC_DIST instance. */
20542 #define ALT_GIC_DIST_GICD_IGROUPR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR6_OFST))
20543 /* The address of the ALT_GIC_DIST_GICD_IGROUPR7 register for the ALT_GIC_DIST instance. */
20544 #define ALT_GIC_DIST_GICD_IGROUPR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR7_OFST))
20545 /* The address of the ALT_GIC_DIST_GICD_IGROUPR8 register for the ALT_GIC_DIST instance. */
20546 #define ALT_GIC_DIST_GICD_IGROUPR8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR8_OFST))
20547 /* The address of the ALT_GIC_DIST_GICD_IGROUPR9 register for the ALT_GIC_DIST instance. */
20548 #define ALT_GIC_DIST_GICD_IGROUPR9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR9_OFST))
20549 /* The address of the ALT_GIC_DIST_GICD_IGROUPR10 register for the ALT_GIC_DIST instance. */
20550 #define ALT_GIC_DIST_GICD_IGROUPR10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR10_OFST))
20551 /* The address of the ALT_GIC_DIST_GICD_IGROUPR11 register for the ALT_GIC_DIST instance. */
20552 #define ALT_GIC_DIST_GICD_IGROUPR11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR11_OFST))
20553 /* The address of the ALT_GIC_DIST_GICD_IGROUPR12 register for the ALT_GIC_DIST instance. */
20554 #define ALT_GIC_DIST_GICD_IGROUPR12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR12_OFST))
20555 /* The address of the ALT_GIC_DIST_GICD_IGROUPR13 register for the ALT_GIC_DIST instance. */
20556 #define ALT_GIC_DIST_GICD_IGROUPR13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR13_OFST))
20557 /* The address of the ALT_GIC_DIST_GICD_IGROUPR14 register for the ALT_GIC_DIST instance. */
20558 #define ALT_GIC_DIST_GICD_IGROUPR14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR14_OFST))
20559 /* The address of the ALT_GIC_DIST_GICD_IGROUPR15 register for the ALT_GIC_DIST instance. */
20560 #define ALT_GIC_DIST_GICD_IGROUPR15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IGROUPR15_OFST))
20561 /* The address of the ALT_GIC_DIST_GICD_ISENABLER0 register for the ALT_GIC_DIST instance. */
20562 #define ALT_GIC_DIST_GICD_ISENABLER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER0_OFST))
20563 /* The address of the ALT_GIC_DIST_GICD_ISENABLER1 register for the ALT_GIC_DIST instance. */
20564 #define ALT_GIC_DIST_GICD_ISENABLER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER1_OFST))
20565 /* The address of the ALT_GIC_DIST_GICD_ISENABLER2 register for the ALT_GIC_DIST instance. */
20566 #define ALT_GIC_DIST_GICD_ISENABLER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER2_OFST))
20567 /* The address of the ALT_GIC_DIST_GICD_ISENABLER3 register for the ALT_GIC_DIST instance. */
20568 #define ALT_GIC_DIST_GICD_ISENABLER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER3_OFST))
20569 /* The address of the ALT_GIC_DIST_GICD_ISENABLER4 register for the ALT_GIC_DIST instance. */
20570 #define ALT_GIC_DIST_GICD_ISENABLER4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER4_OFST))
20571 /* The address of the ALT_GIC_DIST_GICD_ISENABLER5 register for the ALT_GIC_DIST instance. */
20572 #define ALT_GIC_DIST_GICD_ISENABLER5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER5_OFST))
20573 /* The address of the ALT_GIC_DIST_GICD_ISENABLER6 register for the ALT_GIC_DIST instance. */
20574 #define ALT_GIC_DIST_GICD_ISENABLER6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER6_OFST))
20575 /* The address of the ALT_GIC_DIST_GICD_ISENABLER7 register for the ALT_GIC_DIST instance. */
20576 #define ALT_GIC_DIST_GICD_ISENABLER7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER7_OFST))
20577 /* The address of the ALT_GIC_DIST_GICD_ISENABLER8 register for the ALT_GIC_DIST instance. */
20578 #define ALT_GIC_DIST_GICD_ISENABLER8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER8_OFST))
20579 /* The address of the ALT_GIC_DIST_GICD_ISENABLER9 register for the ALT_GIC_DIST instance. */
20580 #define ALT_GIC_DIST_GICD_ISENABLER9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER9_OFST))
20581 /* The address of the ALT_GIC_DIST_GICD_ISENABLER10 register for the ALT_GIC_DIST instance. */
20582 #define ALT_GIC_DIST_GICD_ISENABLER10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER10_OFST))
20583 /* The address of the ALT_GIC_DIST_GICD_ISENABLER11 register for the ALT_GIC_DIST instance. */
20584 #define ALT_GIC_DIST_GICD_ISENABLER11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER11_OFST))
20585 /* The address of the ALT_GIC_DIST_GICD_ISENABLER12 register for the ALT_GIC_DIST instance. */
20586 #define ALT_GIC_DIST_GICD_ISENABLER12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER12_OFST))
20587 /* The address of the ALT_GIC_DIST_GICD_ISENABLER13 register for the ALT_GIC_DIST instance. */
20588 #define ALT_GIC_DIST_GICD_ISENABLER13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER13_OFST))
20589 /* The address of the ALT_GIC_DIST_GICD_ISENABLER14 register for the ALT_GIC_DIST instance. */
20590 #define ALT_GIC_DIST_GICD_ISENABLER14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER14_OFST))
20591 /* The address of the ALT_GIC_DIST_GICD_ISENABLER15 register for the ALT_GIC_DIST instance. */
20592 #define ALT_GIC_DIST_GICD_ISENABLER15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISENABLER15_OFST))
20593 /* The address of the ALT_GIC_DIST_GICD_ICENABLER0 register for the ALT_GIC_DIST instance. */
20594 #define ALT_GIC_DIST_GICD_ICENABLER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER0_OFST))
20595 /* The address of the ALT_GIC_DIST_GICD_ICENABLER1 register for the ALT_GIC_DIST instance. */
20596 #define ALT_GIC_DIST_GICD_ICENABLER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER1_OFST))
20597 /* The address of the ALT_GIC_DIST_GICD_ICENABLER2 register for the ALT_GIC_DIST instance. */
20598 #define ALT_GIC_DIST_GICD_ICENABLER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER2_OFST))
20599 /* The address of the ALT_GIC_DIST_GICD_ICENABLER3 register for the ALT_GIC_DIST instance. */
20600 #define ALT_GIC_DIST_GICD_ICENABLER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER3_OFST))
20601 /* The address of the ALT_GIC_DIST_GICD_ICENABLER4 register for the ALT_GIC_DIST instance. */
20602 #define ALT_GIC_DIST_GICD_ICENABLER4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER4_OFST))
20603 /* The address of the ALT_GIC_DIST_GICD_ICENABLER5 register for the ALT_GIC_DIST instance. */
20604 #define ALT_GIC_DIST_GICD_ICENABLER5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER5_OFST))
20605 /* The address of the ALT_GIC_DIST_GICD_ICENABLER6 register for the ALT_GIC_DIST instance. */
20606 #define ALT_GIC_DIST_GICD_ICENABLER6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER6_OFST))
20607 /* The address of the ALT_GIC_DIST_GICD_ICENABLER7 register for the ALT_GIC_DIST instance. */
20608 #define ALT_GIC_DIST_GICD_ICENABLER7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER7_OFST))
20609 /* The address of the ALT_GIC_DIST_GICD_ICENABLER8 register for the ALT_GIC_DIST instance. */
20610 #define ALT_GIC_DIST_GICD_ICENABLER8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER8_OFST))
20611 /* The address of the ALT_GIC_DIST_GICD_ICENABLER9 register for the ALT_GIC_DIST instance. */
20612 #define ALT_GIC_DIST_GICD_ICENABLER9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER9_OFST))
20613 /* The address of the ALT_GIC_DIST_GICD_ICENABLER10 register for the ALT_GIC_DIST instance. */
20614 #define ALT_GIC_DIST_GICD_ICENABLER10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER10_OFST))
20615 /* The address of the ALT_GIC_DIST_GICD_ICENABLER11 register for the ALT_GIC_DIST instance. */
20616 #define ALT_GIC_DIST_GICD_ICENABLER11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER11_OFST))
20617 /* The address of the ALT_GIC_DIST_GICD_ICENABLER12 register for the ALT_GIC_DIST instance. */
20618 #define ALT_GIC_DIST_GICD_ICENABLER12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER12_OFST))
20619 /* The address of the ALT_GIC_DIST_GICD_ICENABLER13 register for the ALT_GIC_DIST instance. */
20620 #define ALT_GIC_DIST_GICD_ICENABLER13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER13_OFST))
20621 /* The address of the ALT_GIC_DIST_GICD_ICENABLER14 register for the ALT_GIC_DIST instance. */
20622 #define ALT_GIC_DIST_GICD_ICENABLER14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER14_OFST))
20623 /* The address of the ALT_GIC_DIST_GICD_ICENABLER15 register for the ALT_GIC_DIST instance. */
20624 #define ALT_GIC_DIST_GICD_ICENABLER15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICENABLER15_OFST))
20625 /* The address of the ALT_GIC_DIST_GICD_ISPENDR0 register for the ALT_GIC_DIST instance. */
20626 #define ALT_GIC_DIST_GICD_ISPENDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR0_OFST))
20627 /* The address of the ALT_GIC_DIST_GICD_ISPENDR1 register for the ALT_GIC_DIST instance. */
20628 #define ALT_GIC_DIST_GICD_ISPENDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR1_OFST))
20629 /* The address of the ALT_GIC_DIST_GICD_ISPENDR2 register for the ALT_GIC_DIST instance. */
20630 #define ALT_GIC_DIST_GICD_ISPENDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR2_OFST))
20631 /* The address of the ALT_GIC_DIST_GICD_ISPENDR3 register for the ALT_GIC_DIST instance. */
20632 #define ALT_GIC_DIST_GICD_ISPENDR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR3_OFST))
20633 /* The address of the ALT_GIC_DIST_GICD_ISPENDR4 register for the ALT_GIC_DIST instance. */
20634 #define ALT_GIC_DIST_GICD_ISPENDR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR4_OFST))
20635 /* The address of the ALT_GIC_DIST_GICD_ISPENDR5 register for the ALT_GIC_DIST instance. */
20636 #define ALT_GIC_DIST_GICD_ISPENDR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR5_OFST))
20637 /* The address of the ALT_GIC_DIST_GICD_ISPENDR6 register for the ALT_GIC_DIST instance. */
20638 #define ALT_GIC_DIST_GICD_ISPENDR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR6_OFST))
20639 /* The address of the ALT_GIC_DIST_GICD_ISPENDR7 register for the ALT_GIC_DIST instance. */
20640 #define ALT_GIC_DIST_GICD_ISPENDR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR7_OFST))
20641 /* The address of the ALT_GIC_DIST_GICD_ISPENDR8 register for the ALT_GIC_DIST instance. */
20642 #define ALT_GIC_DIST_GICD_ISPENDR8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR8_OFST))
20643 /* The address of the ALT_GIC_DIST_GICD_ISPENDR9 register for the ALT_GIC_DIST instance. */
20644 #define ALT_GIC_DIST_GICD_ISPENDR9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR9_OFST))
20645 /* The address of the ALT_GIC_DIST_GICD_ISPENDR10 register for the ALT_GIC_DIST instance. */
20646 #define ALT_GIC_DIST_GICD_ISPENDR10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR10_OFST))
20647 /* The address of the ALT_GIC_DIST_GICD_ISPENDR11 register for the ALT_GIC_DIST instance. */
20648 #define ALT_GIC_DIST_GICD_ISPENDR11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR11_OFST))
20649 /* The address of the ALT_GIC_DIST_GICD_ISPENDR12 register for the ALT_GIC_DIST instance. */
20650 #define ALT_GIC_DIST_GICD_ISPENDR12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR12_OFST))
20651 /* The address of the ALT_GIC_DIST_GICD_ISPENDR13 register for the ALT_GIC_DIST instance. */
20652 #define ALT_GIC_DIST_GICD_ISPENDR13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR13_OFST))
20653 /* The address of the ALT_GIC_DIST_GICD_ISPENDR14 register for the ALT_GIC_DIST instance. */
20654 #define ALT_GIC_DIST_GICD_ISPENDR14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR14_OFST))
20655 /* The address of the ALT_GIC_DIST_GICD_ISPENDR15 register for the ALT_GIC_DIST instance. */
20656 #define ALT_GIC_DIST_GICD_ISPENDR15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISPENDR15_OFST))
20657 /* The address of the ALT_GIC_DIST_GICD_ICPENDR0 register for the ALT_GIC_DIST instance. */
20658 #define ALT_GIC_DIST_GICD_ICPENDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR0_OFST))
20659 /* The address of the ALT_GIC_DIST_GICD_ICPENDR1 register for the ALT_GIC_DIST instance. */
20660 #define ALT_GIC_DIST_GICD_ICPENDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR1_OFST))
20661 /* The address of the ALT_GIC_DIST_GICD_ICPENDR2 register for the ALT_GIC_DIST instance. */
20662 #define ALT_GIC_DIST_GICD_ICPENDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR2_OFST))
20663 /* The address of the ALT_GIC_DIST_GICD_ICPENDR3 register for the ALT_GIC_DIST instance. */
20664 #define ALT_GIC_DIST_GICD_ICPENDR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR3_OFST))
20665 /* The address of the ALT_GIC_DIST_GICD_ICPENDR4 register for the ALT_GIC_DIST instance. */
20666 #define ALT_GIC_DIST_GICD_ICPENDR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR4_OFST))
20667 /* The address of the ALT_GIC_DIST_GICD_ICPENDR5 register for the ALT_GIC_DIST instance. */
20668 #define ALT_GIC_DIST_GICD_ICPENDR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR5_OFST))
20669 /* The address of the ALT_GIC_DIST_GICD_ICPENDR6 register for the ALT_GIC_DIST instance. */
20670 #define ALT_GIC_DIST_GICD_ICPENDR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR6_OFST))
20671 /* The address of the ALT_GIC_DIST_GICD_ICPENDR7 register for the ALT_GIC_DIST instance. */
20672 #define ALT_GIC_DIST_GICD_ICPENDR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR7_OFST))
20673 /* The address of the ALT_GIC_DIST_GICD_ICPENDR8 register for the ALT_GIC_DIST instance. */
20674 #define ALT_GIC_DIST_GICD_ICPENDR8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR8_OFST))
20675 /* The address of the ALT_GIC_DIST_GICD_ICPENDR9 register for the ALT_GIC_DIST instance. */
20676 #define ALT_GIC_DIST_GICD_ICPENDR9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR9_OFST))
20677 /* The address of the ALT_GIC_DIST_GICD_ICPENDR10 register for the ALT_GIC_DIST instance. */
20678 #define ALT_GIC_DIST_GICD_ICPENDR10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR10_OFST))
20679 /* The address of the ALT_GIC_DIST_GICD_ICPENDR11 register for the ALT_GIC_DIST instance. */
20680 #define ALT_GIC_DIST_GICD_ICPENDR11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR11_OFST))
20681 /* The address of the ALT_GIC_DIST_GICD_ICPENDR12 register for the ALT_GIC_DIST instance. */
20682 #define ALT_GIC_DIST_GICD_ICPENDR12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR12_OFST))
20683 /* The address of the ALT_GIC_DIST_GICD_ICPENDR13 register for the ALT_GIC_DIST instance. */
20684 #define ALT_GIC_DIST_GICD_ICPENDR13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR13_OFST))
20685 /* The address of the ALT_GIC_DIST_GICD_ICPENDR14 register for the ALT_GIC_DIST instance. */
20686 #define ALT_GIC_DIST_GICD_ICPENDR14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR14_OFST))
20687 /* The address of the ALT_GIC_DIST_GICD_ICPENDR15 register for the ALT_GIC_DIST instance. */
20688 #define ALT_GIC_DIST_GICD_ICPENDR15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICPENDR15_OFST))
20689 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER0 register for the ALT_GIC_DIST instance. */
20690 #define ALT_GIC_DIST_GICD_ISACTIVER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER0_OFST))
20691 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER1 register for the ALT_GIC_DIST instance. */
20692 #define ALT_GIC_DIST_GICD_ISACTIVER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER1_OFST))
20693 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER2 register for the ALT_GIC_DIST instance. */
20694 #define ALT_GIC_DIST_GICD_ISACTIVER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER2_OFST))
20695 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER3 register for the ALT_GIC_DIST instance. */
20696 #define ALT_GIC_DIST_GICD_ISACTIVER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER3_OFST))
20697 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER4 register for the ALT_GIC_DIST instance. */
20698 #define ALT_GIC_DIST_GICD_ISACTIVER4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER4_OFST))
20699 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER5 register for the ALT_GIC_DIST instance. */
20700 #define ALT_GIC_DIST_GICD_ISACTIVER5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER5_OFST))
20701 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER6 register for the ALT_GIC_DIST instance. */
20702 #define ALT_GIC_DIST_GICD_ISACTIVER6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER6_OFST))
20703 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER7 register for the ALT_GIC_DIST instance. */
20704 #define ALT_GIC_DIST_GICD_ISACTIVER7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER7_OFST))
20705 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER8 register for the ALT_GIC_DIST instance. */
20706 #define ALT_GIC_DIST_GICD_ISACTIVER8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER8_OFST))
20707 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER9 register for the ALT_GIC_DIST instance. */
20708 #define ALT_GIC_DIST_GICD_ISACTIVER9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER9_OFST))
20709 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER10 register for the ALT_GIC_DIST instance. */
20710 #define ALT_GIC_DIST_GICD_ISACTIVER10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER10_OFST))
20711 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER11 register for the ALT_GIC_DIST instance. */
20712 #define ALT_GIC_DIST_GICD_ISACTIVER11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER11_OFST))
20713 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER12 register for the ALT_GIC_DIST instance. */
20714 #define ALT_GIC_DIST_GICD_ISACTIVER12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER12_OFST))
20715 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER13 register for the ALT_GIC_DIST instance. */
20716 #define ALT_GIC_DIST_GICD_ISACTIVER13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER13_OFST))
20717 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER14 register for the ALT_GIC_DIST instance. */
20718 #define ALT_GIC_DIST_GICD_ISACTIVER14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER14_OFST))
20719 /* The address of the ALT_GIC_DIST_GICD_ISACTIVER15 register for the ALT_GIC_DIST instance. */
20720 #define ALT_GIC_DIST_GICD_ISACTIVER15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ISACTIVER15_OFST))
20721 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER0 register for the ALT_GIC_DIST instance. */
20722 #define ALT_GIC_DIST_GICD_ICACTIVER0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER0_OFST))
20723 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER1 register for the ALT_GIC_DIST instance. */
20724 #define ALT_GIC_DIST_GICD_ICACTIVER1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER1_OFST))
20725 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER2 register for the ALT_GIC_DIST instance. */
20726 #define ALT_GIC_DIST_GICD_ICACTIVER2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER2_OFST))
20727 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER3 register for the ALT_GIC_DIST instance. */
20728 #define ALT_GIC_DIST_GICD_ICACTIVER3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER3_OFST))
20729 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER4 register for the ALT_GIC_DIST instance. */
20730 #define ALT_GIC_DIST_GICD_ICACTIVER4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER4_OFST))
20731 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER5 register for the ALT_GIC_DIST instance. */
20732 #define ALT_GIC_DIST_GICD_ICACTIVER5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER5_OFST))
20733 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER6 register for the ALT_GIC_DIST instance. */
20734 #define ALT_GIC_DIST_GICD_ICACTIVER6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER6_OFST))
20735 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER7 register for the ALT_GIC_DIST instance. */
20736 #define ALT_GIC_DIST_GICD_ICACTIVER7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER7_OFST))
20737 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER8 register for the ALT_GIC_DIST instance. */
20738 #define ALT_GIC_DIST_GICD_ICACTIVER8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER8_OFST))
20739 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER9 register for the ALT_GIC_DIST instance. */
20740 #define ALT_GIC_DIST_GICD_ICACTIVER9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER9_OFST))
20741 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER10 register for the ALT_GIC_DIST instance. */
20742 #define ALT_GIC_DIST_GICD_ICACTIVER10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER10_OFST))
20743 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER11 register for the ALT_GIC_DIST instance. */
20744 #define ALT_GIC_DIST_GICD_ICACTIVER11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER11_OFST))
20745 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER12 register for the ALT_GIC_DIST instance. */
20746 #define ALT_GIC_DIST_GICD_ICACTIVER12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER12_OFST))
20747 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER13 register for the ALT_GIC_DIST instance. */
20748 #define ALT_GIC_DIST_GICD_ICACTIVER13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER13_OFST))
20749 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER14 register for the ALT_GIC_DIST instance. */
20750 #define ALT_GIC_DIST_GICD_ICACTIVER14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER14_OFST))
20751 /* The address of the ALT_GIC_DIST_GICD_ICACTIVER15 register for the ALT_GIC_DIST instance. */
20752 #define ALT_GIC_DIST_GICD_ICACTIVER15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICACTIVER15_OFST))
20753 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR0 register for the ALT_GIC_DIST instance. */
20754 #define ALT_GIC_DIST_GICD_IPRIORITYR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR0_OFST))
20755 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR1 register for the ALT_GIC_DIST instance. */
20756 #define ALT_GIC_DIST_GICD_IPRIORITYR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR1_OFST))
20757 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR2 register for the ALT_GIC_DIST instance. */
20758 #define ALT_GIC_DIST_GICD_IPRIORITYR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR2_OFST))
20759 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR3 register for the ALT_GIC_DIST instance. */
20760 #define ALT_GIC_DIST_GICD_IPRIORITYR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR3_OFST))
20761 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR4 register for the ALT_GIC_DIST instance. */
20762 #define ALT_GIC_DIST_GICD_IPRIORITYR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR4_OFST))
20763 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR5 register for the ALT_GIC_DIST instance. */
20764 #define ALT_GIC_DIST_GICD_IPRIORITYR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR5_OFST))
20765 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR6 register for the ALT_GIC_DIST instance. */
20766 #define ALT_GIC_DIST_GICD_IPRIORITYR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR6_OFST))
20767 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR7 register for the ALT_GIC_DIST instance. */
20768 #define ALT_GIC_DIST_GICD_IPRIORITYR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR7_OFST))
20769 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR8 register for the ALT_GIC_DIST instance. */
20770 #define ALT_GIC_DIST_GICD_IPRIORITYR8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR8_OFST))
20771 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR9 register for the ALT_GIC_DIST instance. */
20772 #define ALT_GIC_DIST_GICD_IPRIORITYR9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR9_OFST))
20773 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR10 register for the ALT_GIC_DIST instance. */
20774 #define ALT_GIC_DIST_GICD_IPRIORITYR10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR10_OFST))
20775 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR11 register for the ALT_GIC_DIST instance. */
20776 #define ALT_GIC_DIST_GICD_IPRIORITYR11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR11_OFST))
20777 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR12 register for the ALT_GIC_DIST instance. */
20778 #define ALT_GIC_DIST_GICD_IPRIORITYR12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR12_OFST))
20779 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR13 register for the ALT_GIC_DIST instance. */
20780 #define ALT_GIC_DIST_GICD_IPRIORITYR13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR13_OFST))
20781 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR14 register for the ALT_GIC_DIST instance. */
20782 #define ALT_GIC_DIST_GICD_IPRIORITYR14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR14_OFST))
20783 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR15 register for the ALT_GIC_DIST instance. */
20784 #define ALT_GIC_DIST_GICD_IPRIORITYR15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR15_OFST))
20785 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR16 register for the ALT_GIC_DIST instance. */
20786 #define ALT_GIC_DIST_GICD_IPRIORITYR16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR16_OFST))
20787 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR17 register for the ALT_GIC_DIST instance. */
20788 #define ALT_GIC_DIST_GICD_IPRIORITYR17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR17_OFST))
20789 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR18 register for the ALT_GIC_DIST instance. */
20790 #define ALT_GIC_DIST_GICD_IPRIORITYR18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR18_OFST))
20791 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR19 register for the ALT_GIC_DIST instance. */
20792 #define ALT_GIC_DIST_GICD_IPRIORITYR19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR19_OFST))
20793 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR20 register for the ALT_GIC_DIST instance. */
20794 #define ALT_GIC_DIST_GICD_IPRIORITYR20_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR20_OFST))
20795 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR21 register for the ALT_GIC_DIST instance. */
20796 #define ALT_GIC_DIST_GICD_IPRIORITYR21_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR21_OFST))
20797 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR22 register for the ALT_GIC_DIST instance. */
20798 #define ALT_GIC_DIST_GICD_IPRIORITYR22_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR22_OFST))
20799 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR23 register for the ALT_GIC_DIST instance. */
20800 #define ALT_GIC_DIST_GICD_IPRIORITYR23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR23_OFST))
20801 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR24 register for the ALT_GIC_DIST instance. */
20802 #define ALT_GIC_DIST_GICD_IPRIORITYR24_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR24_OFST))
20803 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR25 register for the ALT_GIC_DIST instance. */
20804 #define ALT_GIC_DIST_GICD_IPRIORITYR25_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR25_OFST))
20805 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR26 register for the ALT_GIC_DIST instance. */
20806 #define ALT_GIC_DIST_GICD_IPRIORITYR26_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR26_OFST))
20807 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR27 register for the ALT_GIC_DIST instance. */
20808 #define ALT_GIC_DIST_GICD_IPRIORITYR27_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR27_OFST))
20809 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR28 register for the ALT_GIC_DIST instance. */
20810 #define ALT_GIC_DIST_GICD_IPRIORITYR28_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR28_OFST))
20811 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR29 register for the ALT_GIC_DIST instance. */
20812 #define ALT_GIC_DIST_GICD_IPRIORITYR29_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR29_OFST))
20813 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR30 register for the ALT_GIC_DIST instance. */
20814 #define ALT_GIC_DIST_GICD_IPRIORITYR30_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR30_OFST))
20815 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR31 register for the ALT_GIC_DIST instance. */
20816 #define ALT_GIC_DIST_GICD_IPRIORITYR31_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR31_OFST))
20817 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR32 register for the ALT_GIC_DIST instance. */
20818 #define ALT_GIC_DIST_GICD_IPRIORITYR32_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR32_OFST))
20819 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR33 register for the ALT_GIC_DIST instance. */
20820 #define ALT_GIC_DIST_GICD_IPRIORITYR33_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR33_OFST))
20821 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR34 register for the ALT_GIC_DIST instance. */
20822 #define ALT_GIC_DIST_GICD_IPRIORITYR34_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR34_OFST))
20823 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR35 register for the ALT_GIC_DIST instance. */
20824 #define ALT_GIC_DIST_GICD_IPRIORITYR35_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR35_OFST))
20825 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR36 register for the ALT_GIC_DIST instance. */
20826 #define ALT_GIC_DIST_GICD_IPRIORITYR36_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR36_OFST))
20827 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR37 register for the ALT_GIC_DIST instance. */
20828 #define ALT_GIC_DIST_GICD_IPRIORITYR37_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR37_OFST))
20829 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR38 register for the ALT_GIC_DIST instance. */
20830 #define ALT_GIC_DIST_GICD_IPRIORITYR38_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR38_OFST))
20831 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR39 register for the ALT_GIC_DIST instance. */
20832 #define ALT_GIC_DIST_GICD_IPRIORITYR39_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR39_OFST))
20833 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR40 register for the ALT_GIC_DIST instance. */
20834 #define ALT_GIC_DIST_GICD_IPRIORITYR40_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR40_OFST))
20835 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR41 register for the ALT_GIC_DIST instance. */
20836 #define ALT_GIC_DIST_GICD_IPRIORITYR41_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR41_OFST))
20837 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR42 register for the ALT_GIC_DIST instance. */
20838 #define ALT_GIC_DIST_GICD_IPRIORITYR42_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR42_OFST))
20839 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR43 register for the ALT_GIC_DIST instance. */
20840 #define ALT_GIC_DIST_GICD_IPRIORITYR43_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR43_OFST))
20841 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR44 register for the ALT_GIC_DIST instance. */
20842 #define ALT_GIC_DIST_GICD_IPRIORITYR44_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR44_OFST))
20843 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR45 register for the ALT_GIC_DIST instance. */
20844 #define ALT_GIC_DIST_GICD_IPRIORITYR45_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR45_OFST))
20845 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR46 register for the ALT_GIC_DIST instance. */
20846 #define ALT_GIC_DIST_GICD_IPRIORITYR46_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR46_OFST))
20847 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR47 register for the ALT_GIC_DIST instance. */
20848 #define ALT_GIC_DIST_GICD_IPRIORITYR47_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR47_OFST))
20849 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR48 register for the ALT_GIC_DIST instance. */
20850 #define ALT_GIC_DIST_GICD_IPRIORITYR48_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR48_OFST))
20851 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR49 register for the ALT_GIC_DIST instance. */
20852 #define ALT_GIC_DIST_GICD_IPRIORITYR49_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR49_OFST))
20853 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR50 register for the ALT_GIC_DIST instance. */
20854 #define ALT_GIC_DIST_GICD_IPRIORITYR50_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR50_OFST))
20855 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR51 register for the ALT_GIC_DIST instance. */
20856 #define ALT_GIC_DIST_GICD_IPRIORITYR51_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR51_OFST))
20857 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR52 register for the ALT_GIC_DIST instance. */
20858 #define ALT_GIC_DIST_GICD_IPRIORITYR52_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR52_OFST))
20859 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR53 register for the ALT_GIC_DIST instance. */
20860 #define ALT_GIC_DIST_GICD_IPRIORITYR53_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR53_OFST))
20861 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR54 register for the ALT_GIC_DIST instance. */
20862 #define ALT_GIC_DIST_GICD_IPRIORITYR54_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR54_OFST))
20863 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR55 register for the ALT_GIC_DIST instance. */
20864 #define ALT_GIC_DIST_GICD_IPRIORITYR55_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR55_OFST))
20865 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR56 register for the ALT_GIC_DIST instance. */
20866 #define ALT_GIC_DIST_GICD_IPRIORITYR56_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR56_OFST))
20867 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR57 register for the ALT_GIC_DIST instance. */
20868 #define ALT_GIC_DIST_GICD_IPRIORITYR57_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR57_OFST))
20869 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR58 register for the ALT_GIC_DIST instance. */
20870 #define ALT_GIC_DIST_GICD_IPRIORITYR58_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR58_OFST))
20871 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR59 register for the ALT_GIC_DIST instance. */
20872 #define ALT_GIC_DIST_GICD_IPRIORITYR59_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR59_OFST))
20873 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR60 register for the ALT_GIC_DIST instance. */
20874 #define ALT_GIC_DIST_GICD_IPRIORITYR60_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR60_OFST))
20875 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR61 register for the ALT_GIC_DIST instance. */
20876 #define ALT_GIC_DIST_GICD_IPRIORITYR61_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR61_OFST))
20877 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR62 register for the ALT_GIC_DIST instance. */
20878 #define ALT_GIC_DIST_GICD_IPRIORITYR62_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR62_OFST))
20879 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR63 register for the ALT_GIC_DIST instance. */
20880 #define ALT_GIC_DIST_GICD_IPRIORITYR63_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR63_OFST))
20881 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR64 register for the ALT_GIC_DIST instance. */
20882 #define ALT_GIC_DIST_GICD_IPRIORITYR64_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR64_OFST))
20883 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR65 register for the ALT_GIC_DIST instance. */
20884 #define ALT_GIC_DIST_GICD_IPRIORITYR65_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR65_OFST))
20885 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR66 register for the ALT_GIC_DIST instance. */
20886 #define ALT_GIC_DIST_GICD_IPRIORITYR66_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR66_OFST))
20887 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR67 register for the ALT_GIC_DIST instance. */
20888 #define ALT_GIC_DIST_GICD_IPRIORITYR67_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR67_OFST))
20889 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR68 register for the ALT_GIC_DIST instance. */
20890 #define ALT_GIC_DIST_GICD_IPRIORITYR68_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR68_OFST))
20891 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR69 register for the ALT_GIC_DIST instance. */
20892 #define ALT_GIC_DIST_GICD_IPRIORITYR69_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR69_OFST))
20893 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR70 register for the ALT_GIC_DIST instance. */
20894 #define ALT_GIC_DIST_GICD_IPRIORITYR70_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR70_OFST))
20895 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR71 register for the ALT_GIC_DIST instance. */
20896 #define ALT_GIC_DIST_GICD_IPRIORITYR71_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR71_OFST))
20897 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR72 register for the ALT_GIC_DIST instance. */
20898 #define ALT_GIC_DIST_GICD_IPRIORITYR72_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR72_OFST))
20899 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR73 register for the ALT_GIC_DIST instance. */
20900 #define ALT_GIC_DIST_GICD_IPRIORITYR73_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR73_OFST))
20901 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR74 register for the ALT_GIC_DIST instance. */
20902 #define ALT_GIC_DIST_GICD_IPRIORITYR74_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR74_OFST))
20903 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR75 register for the ALT_GIC_DIST instance. */
20904 #define ALT_GIC_DIST_GICD_IPRIORITYR75_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR75_OFST))
20905 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR76 register for the ALT_GIC_DIST instance. */
20906 #define ALT_GIC_DIST_GICD_IPRIORITYR76_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR76_OFST))
20907 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR77 register for the ALT_GIC_DIST instance. */
20908 #define ALT_GIC_DIST_GICD_IPRIORITYR77_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR77_OFST))
20909 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR78 register for the ALT_GIC_DIST instance. */
20910 #define ALT_GIC_DIST_GICD_IPRIORITYR78_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR78_OFST))
20911 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR79 register for the ALT_GIC_DIST instance. */
20912 #define ALT_GIC_DIST_GICD_IPRIORITYR79_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR79_OFST))
20913 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR80 register for the ALT_GIC_DIST instance. */
20914 #define ALT_GIC_DIST_GICD_IPRIORITYR80_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR80_OFST))
20915 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR81 register for the ALT_GIC_DIST instance. */
20916 #define ALT_GIC_DIST_GICD_IPRIORITYR81_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR81_OFST))
20917 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR82 register for the ALT_GIC_DIST instance. */
20918 #define ALT_GIC_DIST_GICD_IPRIORITYR82_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR82_OFST))
20919 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR83 register for the ALT_GIC_DIST instance. */
20920 #define ALT_GIC_DIST_GICD_IPRIORITYR83_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR83_OFST))
20921 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR84 register for the ALT_GIC_DIST instance. */
20922 #define ALT_GIC_DIST_GICD_IPRIORITYR84_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR84_OFST))
20923 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR85 register for the ALT_GIC_DIST instance. */
20924 #define ALT_GIC_DIST_GICD_IPRIORITYR85_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR85_OFST))
20925 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR86 register for the ALT_GIC_DIST instance. */
20926 #define ALT_GIC_DIST_GICD_IPRIORITYR86_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR86_OFST))
20927 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR87 register for the ALT_GIC_DIST instance. */
20928 #define ALT_GIC_DIST_GICD_IPRIORITYR87_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR87_OFST))
20929 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR88 register for the ALT_GIC_DIST instance. */
20930 #define ALT_GIC_DIST_GICD_IPRIORITYR88_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR88_OFST))
20931 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR89 register for the ALT_GIC_DIST instance. */
20932 #define ALT_GIC_DIST_GICD_IPRIORITYR89_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR89_OFST))
20933 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR90 register for the ALT_GIC_DIST instance. */
20934 #define ALT_GIC_DIST_GICD_IPRIORITYR90_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR90_OFST))
20935 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR91 register for the ALT_GIC_DIST instance. */
20936 #define ALT_GIC_DIST_GICD_IPRIORITYR91_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR91_OFST))
20937 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR92 register for the ALT_GIC_DIST instance. */
20938 #define ALT_GIC_DIST_GICD_IPRIORITYR92_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR92_OFST))
20939 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR93 register for the ALT_GIC_DIST instance. */
20940 #define ALT_GIC_DIST_GICD_IPRIORITYR93_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR93_OFST))
20941 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR94 register for the ALT_GIC_DIST instance. */
20942 #define ALT_GIC_DIST_GICD_IPRIORITYR94_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR94_OFST))
20943 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR95 register for the ALT_GIC_DIST instance. */
20944 #define ALT_GIC_DIST_GICD_IPRIORITYR95_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR95_OFST))
20945 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR96 register for the ALT_GIC_DIST instance. */
20946 #define ALT_GIC_DIST_GICD_IPRIORITYR96_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR96_OFST))
20947 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR97 register for the ALT_GIC_DIST instance. */
20948 #define ALT_GIC_DIST_GICD_IPRIORITYR97_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR97_OFST))
20949 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR98 register for the ALT_GIC_DIST instance. */
20950 #define ALT_GIC_DIST_GICD_IPRIORITYR98_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR98_OFST))
20951 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR99 register for the ALT_GIC_DIST instance. */
20952 #define ALT_GIC_DIST_GICD_IPRIORITYR99_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR99_OFST))
20953 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR100 register for the ALT_GIC_DIST instance. */
20954 #define ALT_GIC_DIST_GICD_IPRIORITYR100_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR100_OFST))
20955 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR101 register for the ALT_GIC_DIST instance. */
20956 #define ALT_GIC_DIST_GICD_IPRIORITYR101_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR101_OFST))
20957 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR102 register for the ALT_GIC_DIST instance. */
20958 #define ALT_GIC_DIST_GICD_IPRIORITYR102_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR102_OFST))
20959 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR103 register for the ALT_GIC_DIST instance. */
20960 #define ALT_GIC_DIST_GICD_IPRIORITYR103_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR103_OFST))
20961 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR104 register for the ALT_GIC_DIST instance. */
20962 #define ALT_GIC_DIST_GICD_IPRIORITYR104_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR104_OFST))
20963 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR105 register for the ALT_GIC_DIST instance. */
20964 #define ALT_GIC_DIST_GICD_IPRIORITYR105_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR105_OFST))
20965 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR106 register for the ALT_GIC_DIST instance. */
20966 #define ALT_GIC_DIST_GICD_IPRIORITYR106_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR106_OFST))
20967 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR107 register for the ALT_GIC_DIST instance. */
20968 #define ALT_GIC_DIST_GICD_IPRIORITYR107_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR107_OFST))
20969 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR108 register for the ALT_GIC_DIST instance. */
20970 #define ALT_GIC_DIST_GICD_IPRIORITYR108_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR108_OFST))
20971 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR109 register for the ALT_GIC_DIST instance. */
20972 #define ALT_GIC_DIST_GICD_IPRIORITYR109_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR109_OFST))
20973 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR110 register for the ALT_GIC_DIST instance. */
20974 #define ALT_GIC_DIST_GICD_IPRIORITYR110_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR110_OFST))
20975 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR111 register for the ALT_GIC_DIST instance. */
20976 #define ALT_GIC_DIST_GICD_IPRIORITYR111_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR111_OFST))
20977 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR112 register for the ALT_GIC_DIST instance. */
20978 #define ALT_GIC_DIST_GICD_IPRIORITYR112_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR112_OFST))
20979 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR113 register for the ALT_GIC_DIST instance. */
20980 #define ALT_GIC_DIST_GICD_IPRIORITYR113_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR113_OFST))
20981 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR114 register for the ALT_GIC_DIST instance. */
20982 #define ALT_GIC_DIST_GICD_IPRIORITYR114_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR114_OFST))
20983 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR115 register for the ALT_GIC_DIST instance. */
20984 #define ALT_GIC_DIST_GICD_IPRIORITYR115_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR115_OFST))
20985 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR116 register for the ALT_GIC_DIST instance. */
20986 #define ALT_GIC_DIST_GICD_IPRIORITYR116_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR116_OFST))
20987 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR117 register for the ALT_GIC_DIST instance. */
20988 #define ALT_GIC_DIST_GICD_IPRIORITYR117_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR117_OFST))
20989 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR118 register for the ALT_GIC_DIST instance. */
20990 #define ALT_GIC_DIST_GICD_IPRIORITYR118_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR118_OFST))
20991 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR119 register for the ALT_GIC_DIST instance. */
20992 #define ALT_GIC_DIST_GICD_IPRIORITYR119_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR119_OFST))
20993 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR120 register for the ALT_GIC_DIST instance. */
20994 #define ALT_GIC_DIST_GICD_IPRIORITYR120_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR120_OFST))
20995 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR121 register for the ALT_GIC_DIST instance. */
20996 #define ALT_GIC_DIST_GICD_IPRIORITYR121_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR121_OFST))
20997 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR122 register for the ALT_GIC_DIST instance. */
20998 #define ALT_GIC_DIST_GICD_IPRIORITYR122_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR122_OFST))
20999 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR123 register for the ALT_GIC_DIST instance. */
21000 #define ALT_GIC_DIST_GICD_IPRIORITYR123_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR123_OFST))
21001 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR124 register for the ALT_GIC_DIST instance. */
21002 #define ALT_GIC_DIST_GICD_IPRIORITYR124_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR124_OFST))
21003 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR125 register for the ALT_GIC_DIST instance. */
21004 #define ALT_GIC_DIST_GICD_IPRIORITYR125_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR125_OFST))
21005 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR126 register for the ALT_GIC_DIST instance. */
21006 #define ALT_GIC_DIST_GICD_IPRIORITYR126_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR126_OFST))
21007 /* The address of the ALT_GIC_DIST_GICD_IPRIORITYR127 register for the ALT_GIC_DIST instance. */
21008 #define ALT_GIC_DIST_GICD_IPRIORITYR127_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_IPRIORITYR127_OFST))
21009 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR0 register for the ALT_GIC_DIST instance. */
21010 #define ALT_GIC_DIST_GICD_ITARGETSR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR0_OFST))
21011 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR1 register for the ALT_GIC_DIST instance. */
21012 #define ALT_GIC_DIST_GICD_ITARGETSR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR1_OFST))
21013 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR2 register for the ALT_GIC_DIST instance. */
21014 #define ALT_GIC_DIST_GICD_ITARGETSR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR2_OFST))
21015 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR3 register for the ALT_GIC_DIST instance. */
21016 #define ALT_GIC_DIST_GICD_ITARGETSR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR3_OFST))
21017 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR4 register for the ALT_GIC_DIST instance. */
21018 #define ALT_GIC_DIST_GICD_ITARGETSR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR4_OFST))
21019 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR5 register for the ALT_GIC_DIST instance. */
21020 #define ALT_GIC_DIST_GICD_ITARGETSR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR5_OFST))
21021 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR6 register for the ALT_GIC_DIST instance. */
21022 #define ALT_GIC_DIST_GICD_ITARGETSR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR6_OFST))
21023 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR7 register for the ALT_GIC_DIST instance. */
21024 #define ALT_GIC_DIST_GICD_ITARGETSR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR7_OFST))
21025 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR8 register for the ALT_GIC_DIST instance. */
21026 #define ALT_GIC_DIST_GICD_ITARGETSR8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR8_OFST))
21027 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR9 register for the ALT_GIC_DIST instance. */
21028 #define ALT_GIC_DIST_GICD_ITARGETSR9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR9_OFST))
21029 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR10 register for the ALT_GIC_DIST instance. */
21030 #define ALT_GIC_DIST_GICD_ITARGETSR10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR10_OFST))
21031 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR11 register for the ALT_GIC_DIST instance. */
21032 #define ALT_GIC_DIST_GICD_ITARGETSR11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR11_OFST))
21033 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR12 register for the ALT_GIC_DIST instance. */
21034 #define ALT_GIC_DIST_GICD_ITARGETSR12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR12_OFST))
21035 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR13 register for the ALT_GIC_DIST instance. */
21036 #define ALT_GIC_DIST_GICD_ITARGETSR13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR13_OFST))
21037 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR14 register for the ALT_GIC_DIST instance. */
21038 #define ALT_GIC_DIST_GICD_ITARGETSR14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR14_OFST))
21039 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR15 register for the ALT_GIC_DIST instance. */
21040 #define ALT_GIC_DIST_GICD_ITARGETSR15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR15_OFST))
21041 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR16 register for the ALT_GIC_DIST instance. */
21042 #define ALT_GIC_DIST_GICD_ITARGETSR16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR16_OFST))
21043 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR17 register for the ALT_GIC_DIST instance. */
21044 #define ALT_GIC_DIST_GICD_ITARGETSR17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR17_OFST))
21045 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR18 register for the ALT_GIC_DIST instance. */
21046 #define ALT_GIC_DIST_GICD_ITARGETSR18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR18_OFST))
21047 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR19 register for the ALT_GIC_DIST instance. */
21048 #define ALT_GIC_DIST_GICD_ITARGETSR19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR19_OFST))
21049 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR20 register for the ALT_GIC_DIST instance. */
21050 #define ALT_GIC_DIST_GICD_ITARGETSR20_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR20_OFST))
21051 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR21 register for the ALT_GIC_DIST instance. */
21052 #define ALT_GIC_DIST_GICD_ITARGETSR21_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR21_OFST))
21053 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR22 register for the ALT_GIC_DIST instance. */
21054 #define ALT_GIC_DIST_GICD_ITARGETSR22_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR22_OFST))
21055 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR23 register for the ALT_GIC_DIST instance. */
21056 #define ALT_GIC_DIST_GICD_ITARGETSR23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR23_OFST))
21057 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR24 register for the ALT_GIC_DIST instance. */
21058 #define ALT_GIC_DIST_GICD_ITARGETSR24_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR24_OFST))
21059 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR25 register for the ALT_GIC_DIST instance. */
21060 #define ALT_GIC_DIST_GICD_ITARGETSR25_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR25_OFST))
21061 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR26 register for the ALT_GIC_DIST instance. */
21062 #define ALT_GIC_DIST_GICD_ITARGETSR26_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR26_OFST))
21063 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR27 register for the ALT_GIC_DIST instance. */
21064 #define ALT_GIC_DIST_GICD_ITARGETSR27_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR27_OFST))
21065 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR28 register for the ALT_GIC_DIST instance. */
21066 #define ALT_GIC_DIST_GICD_ITARGETSR28_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR28_OFST))
21067 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR29 register for the ALT_GIC_DIST instance. */
21068 #define ALT_GIC_DIST_GICD_ITARGETSR29_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR29_OFST))
21069 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR30 register for the ALT_GIC_DIST instance. */
21070 #define ALT_GIC_DIST_GICD_ITARGETSR30_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR30_OFST))
21071 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR31 register for the ALT_GIC_DIST instance. */
21072 #define ALT_GIC_DIST_GICD_ITARGETSR31_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR31_OFST))
21073 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR32 register for the ALT_GIC_DIST instance. */
21074 #define ALT_GIC_DIST_GICD_ITARGETSR32_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR32_OFST))
21075 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR33 register for the ALT_GIC_DIST instance. */
21076 #define ALT_GIC_DIST_GICD_ITARGETSR33_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR33_OFST))
21077 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR34 register for the ALT_GIC_DIST instance. */
21078 #define ALT_GIC_DIST_GICD_ITARGETSR34_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR34_OFST))
21079 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR35 register for the ALT_GIC_DIST instance. */
21080 #define ALT_GIC_DIST_GICD_ITARGETSR35_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR35_OFST))
21081 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR36 register for the ALT_GIC_DIST instance. */
21082 #define ALT_GIC_DIST_GICD_ITARGETSR36_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR36_OFST))
21083 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR37 register for the ALT_GIC_DIST instance. */
21084 #define ALT_GIC_DIST_GICD_ITARGETSR37_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR37_OFST))
21085 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR38 register for the ALT_GIC_DIST instance. */
21086 #define ALT_GIC_DIST_GICD_ITARGETSR38_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR38_OFST))
21087 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR39 register for the ALT_GIC_DIST instance. */
21088 #define ALT_GIC_DIST_GICD_ITARGETSR39_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR39_OFST))
21089 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR40 register for the ALT_GIC_DIST instance. */
21090 #define ALT_GIC_DIST_GICD_ITARGETSR40_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR40_OFST))
21091 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR41 register for the ALT_GIC_DIST instance. */
21092 #define ALT_GIC_DIST_GICD_ITARGETSR41_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR41_OFST))
21093 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR42 register for the ALT_GIC_DIST instance. */
21094 #define ALT_GIC_DIST_GICD_ITARGETSR42_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR42_OFST))
21095 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR43 register for the ALT_GIC_DIST instance. */
21096 #define ALT_GIC_DIST_GICD_ITARGETSR43_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR43_OFST))
21097 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR44 register for the ALT_GIC_DIST instance. */
21098 #define ALT_GIC_DIST_GICD_ITARGETSR44_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR44_OFST))
21099 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR45 register for the ALT_GIC_DIST instance. */
21100 #define ALT_GIC_DIST_GICD_ITARGETSR45_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR45_OFST))
21101 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR46 register for the ALT_GIC_DIST instance. */
21102 #define ALT_GIC_DIST_GICD_ITARGETSR46_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR46_OFST))
21103 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR47 register for the ALT_GIC_DIST instance. */
21104 #define ALT_GIC_DIST_GICD_ITARGETSR47_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR47_OFST))
21105 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR48 register for the ALT_GIC_DIST instance. */
21106 #define ALT_GIC_DIST_GICD_ITARGETSR48_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR48_OFST))
21107 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR49 register for the ALT_GIC_DIST instance. */
21108 #define ALT_GIC_DIST_GICD_ITARGETSR49_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR49_OFST))
21109 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR50 register for the ALT_GIC_DIST instance. */
21110 #define ALT_GIC_DIST_GICD_ITARGETSR50_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR50_OFST))
21111 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR51 register for the ALT_GIC_DIST instance. */
21112 #define ALT_GIC_DIST_GICD_ITARGETSR51_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR51_OFST))
21113 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR52 register for the ALT_GIC_DIST instance. */
21114 #define ALT_GIC_DIST_GICD_ITARGETSR52_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR52_OFST))
21115 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR53 register for the ALT_GIC_DIST instance. */
21116 #define ALT_GIC_DIST_GICD_ITARGETSR53_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR53_OFST))
21117 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR54 register for the ALT_GIC_DIST instance. */
21118 #define ALT_GIC_DIST_GICD_ITARGETSR54_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR54_OFST))
21119 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR55 register for the ALT_GIC_DIST instance. */
21120 #define ALT_GIC_DIST_GICD_ITARGETSR55_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR55_OFST))
21121 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR56 register for the ALT_GIC_DIST instance. */
21122 #define ALT_GIC_DIST_GICD_ITARGETSR56_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR56_OFST))
21123 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR57 register for the ALT_GIC_DIST instance. */
21124 #define ALT_GIC_DIST_GICD_ITARGETSR57_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR57_OFST))
21125 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR58 register for the ALT_GIC_DIST instance. */
21126 #define ALT_GIC_DIST_GICD_ITARGETSR58_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR58_OFST))
21127 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR59 register for the ALT_GIC_DIST instance. */
21128 #define ALT_GIC_DIST_GICD_ITARGETSR59_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR59_OFST))
21129 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR60 register for the ALT_GIC_DIST instance. */
21130 #define ALT_GIC_DIST_GICD_ITARGETSR60_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR60_OFST))
21131 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR61 register for the ALT_GIC_DIST instance. */
21132 #define ALT_GIC_DIST_GICD_ITARGETSR61_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR61_OFST))
21133 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR62 register for the ALT_GIC_DIST instance. */
21134 #define ALT_GIC_DIST_GICD_ITARGETSR62_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR62_OFST))
21135 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR63 register for the ALT_GIC_DIST instance. */
21136 #define ALT_GIC_DIST_GICD_ITARGETSR63_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR63_OFST))
21137 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR64 register for the ALT_GIC_DIST instance. */
21138 #define ALT_GIC_DIST_GICD_ITARGETSR64_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR64_OFST))
21139 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR65 register for the ALT_GIC_DIST instance. */
21140 #define ALT_GIC_DIST_GICD_ITARGETSR65_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR65_OFST))
21141 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR66 register for the ALT_GIC_DIST instance. */
21142 #define ALT_GIC_DIST_GICD_ITARGETSR66_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR66_OFST))
21143 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR67 register for the ALT_GIC_DIST instance. */
21144 #define ALT_GIC_DIST_GICD_ITARGETSR67_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR67_OFST))
21145 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR68 register for the ALT_GIC_DIST instance. */
21146 #define ALT_GIC_DIST_GICD_ITARGETSR68_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR68_OFST))
21147 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR69 register for the ALT_GIC_DIST instance. */
21148 #define ALT_GIC_DIST_GICD_ITARGETSR69_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR69_OFST))
21149 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR70 register for the ALT_GIC_DIST instance. */
21150 #define ALT_GIC_DIST_GICD_ITARGETSR70_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR70_OFST))
21151 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR71 register for the ALT_GIC_DIST instance. */
21152 #define ALT_GIC_DIST_GICD_ITARGETSR71_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR71_OFST))
21153 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR72 register for the ALT_GIC_DIST instance. */
21154 #define ALT_GIC_DIST_GICD_ITARGETSR72_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR72_OFST))
21155 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR73 register for the ALT_GIC_DIST instance. */
21156 #define ALT_GIC_DIST_GICD_ITARGETSR73_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR73_OFST))
21157 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR74 register for the ALT_GIC_DIST instance. */
21158 #define ALT_GIC_DIST_GICD_ITARGETSR74_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR74_OFST))
21159 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR75 register for the ALT_GIC_DIST instance. */
21160 #define ALT_GIC_DIST_GICD_ITARGETSR75_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR75_OFST))
21161 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR76 register for the ALT_GIC_DIST instance. */
21162 #define ALT_GIC_DIST_GICD_ITARGETSR76_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR76_OFST))
21163 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR77 register for the ALT_GIC_DIST instance. */
21164 #define ALT_GIC_DIST_GICD_ITARGETSR77_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR77_OFST))
21165 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR78 register for the ALT_GIC_DIST instance. */
21166 #define ALT_GIC_DIST_GICD_ITARGETSR78_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR78_OFST))
21167 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR79 register for the ALT_GIC_DIST instance. */
21168 #define ALT_GIC_DIST_GICD_ITARGETSR79_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR79_OFST))
21169 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR80 register for the ALT_GIC_DIST instance. */
21170 #define ALT_GIC_DIST_GICD_ITARGETSR80_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR80_OFST))
21171 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR81 register for the ALT_GIC_DIST instance. */
21172 #define ALT_GIC_DIST_GICD_ITARGETSR81_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR81_OFST))
21173 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR82 register for the ALT_GIC_DIST instance. */
21174 #define ALT_GIC_DIST_GICD_ITARGETSR82_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR82_OFST))
21175 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR83 register for the ALT_GIC_DIST instance. */
21176 #define ALT_GIC_DIST_GICD_ITARGETSR83_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR83_OFST))
21177 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR84 register for the ALT_GIC_DIST instance. */
21178 #define ALT_GIC_DIST_GICD_ITARGETSR84_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR84_OFST))
21179 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR85 register for the ALT_GIC_DIST instance. */
21180 #define ALT_GIC_DIST_GICD_ITARGETSR85_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR85_OFST))
21181 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR86 register for the ALT_GIC_DIST instance. */
21182 #define ALT_GIC_DIST_GICD_ITARGETSR86_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR86_OFST))
21183 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR87 register for the ALT_GIC_DIST instance. */
21184 #define ALT_GIC_DIST_GICD_ITARGETSR87_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR87_OFST))
21185 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR88 register for the ALT_GIC_DIST instance. */
21186 #define ALT_GIC_DIST_GICD_ITARGETSR88_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR88_OFST))
21187 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR89 register for the ALT_GIC_DIST instance. */
21188 #define ALT_GIC_DIST_GICD_ITARGETSR89_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR89_OFST))
21189 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR90 register for the ALT_GIC_DIST instance. */
21190 #define ALT_GIC_DIST_GICD_ITARGETSR90_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR90_OFST))
21191 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR91 register for the ALT_GIC_DIST instance. */
21192 #define ALT_GIC_DIST_GICD_ITARGETSR91_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR91_OFST))
21193 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR92 register for the ALT_GIC_DIST instance. */
21194 #define ALT_GIC_DIST_GICD_ITARGETSR92_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR92_OFST))
21195 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR93 register for the ALT_GIC_DIST instance. */
21196 #define ALT_GIC_DIST_GICD_ITARGETSR93_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR93_OFST))
21197 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR94 register for the ALT_GIC_DIST instance. */
21198 #define ALT_GIC_DIST_GICD_ITARGETSR94_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR94_OFST))
21199 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR95 register for the ALT_GIC_DIST instance. */
21200 #define ALT_GIC_DIST_GICD_ITARGETSR95_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR95_OFST))
21201 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR96 register for the ALT_GIC_DIST instance. */
21202 #define ALT_GIC_DIST_GICD_ITARGETSR96_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR96_OFST))
21203 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR97 register for the ALT_GIC_DIST instance. */
21204 #define ALT_GIC_DIST_GICD_ITARGETSR97_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR97_OFST))
21205 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR98 register for the ALT_GIC_DIST instance. */
21206 #define ALT_GIC_DIST_GICD_ITARGETSR98_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR98_OFST))
21207 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR99 register for the ALT_GIC_DIST instance. */
21208 #define ALT_GIC_DIST_GICD_ITARGETSR99_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR99_OFST))
21209 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR100 register for the ALT_GIC_DIST instance. */
21210 #define ALT_GIC_DIST_GICD_ITARGETSR100_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR100_OFST))
21211 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR101 register for the ALT_GIC_DIST instance. */
21212 #define ALT_GIC_DIST_GICD_ITARGETSR101_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR101_OFST))
21213 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR102 register for the ALT_GIC_DIST instance. */
21214 #define ALT_GIC_DIST_GICD_ITARGETSR102_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR102_OFST))
21215 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR103 register for the ALT_GIC_DIST instance. */
21216 #define ALT_GIC_DIST_GICD_ITARGETSR103_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR103_OFST))
21217 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR104 register for the ALT_GIC_DIST instance. */
21218 #define ALT_GIC_DIST_GICD_ITARGETSR104_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR104_OFST))
21219 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR105 register for the ALT_GIC_DIST instance. */
21220 #define ALT_GIC_DIST_GICD_ITARGETSR105_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR105_OFST))
21221 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR106 register for the ALT_GIC_DIST instance. */
21222 #define ALT_GIC_DIST_GICD_ITARGETSR106_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR106_OFST))
21223 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR107 register for the ALT_GIC_DIST instance. */
21224 #define ALT_GIC_DIST_GICD_ITARGETSR107_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR107_OFST))
21225 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR108 register for the ALT_GIC_DIST instance. */
21226 #define ALT_GIC_DIST_GICD_ITARGETSR108_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR108_OFST))
21227 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR109 register for the ALT_GIC_DIST instance. */
21228 #define ALT_GIC_DIST_GICD_ITARGETSR109_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR109_OFST))
21229 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR110 register for the ALT_GIC_DIST instance. */
21230 #define ALT_GIC_DIST_GICD_ITARGETSR110_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR110_OFST))
21231 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR111 register for the ALT_GIC_DIST instance. */
21232 #define ALT_GIC_DIST_GICD_ITARGETSR111_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR111_OFST))
21233 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR112 register for the ALT_GIC_DIST instance. */
21234 #define ALT_GIC_DIST_GICD_ITARGETSR112_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR112_OFST))
21235 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR113 register for the ALT_GIC_DIST instance. */
21236 #define ALT_GIC_DIST_GICD_ITARGETSR113_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR113_OFST))
21237 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR114 register for the ALT_GIC_DIST instance. */
21238 #define ALT_GIC_DIST_GICD_ITARGETSR114_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR114_OFST))
21239 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR115 register for the ALT_GIC_DIST instance. */
21240 #define ALT_GIC_DIST_GICD_ITARGETSR115_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR115_OFST))
21241 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR116 register for the ALT_GIC_DIST instance. */
21242 #define ALT_GIC_DIST_GICD_ITARGETSR116_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR116_OFST))
21243 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR117 register for the ALT_GIC_DIST instance. */
21244 #define ALT_GIC_DIST_GICD_ITARGETSR117_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR117_OFST))
21245 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR118 register for the ALT_GIC_DIST instance. */
21246 #define ALT_GIC_DIST_GICD_ITARGETSR118_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR118_OFST))
21247 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR119 register for the ALT_GIC_DIST instance. */
21248 #define ALT_GIC_DIST_GICD_ITARGETSR119_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR119_OFST))
21249 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR120 register for the ALT_GIC_DIST instance. */
21250 #define ALT_GIC_DIST_GICD_ITARGETSR120_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR120_OFST))
21251 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR121 register for the ALT_GIC_DIST instance. */
21252 #define ALT_GIC_DIST_GICD_ITARGETSR121_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR121_OFST))
21253 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR122 register for the ALT_GIC_DIST instance. */
21254 #define ALT_GIC_DIST_GICD_ITARGETSR122_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR122_OFST))
21255 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR123 register for the ALT_GIC_DIST instance. */
21256 #define ALT_GIC_DIST_GICD_ITARGETSR123_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR123_OFST))
21257 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR124 register for the ALT_GIC_DIST instance. */
21258 #define ALT_GIC_DIST_GICD_ITARGETSR124_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR124_OFST))
21259 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR125 register for the ALT_GIC_DIST instance. */
21260 #define ALT_GIC_DIST_GICD_ITARGETSR125_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR125_OFST))
21261 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR126 register for the ALT_GIC_DIST instance. */
21262 #define ALT_GIC_DIST_GICD_ITARGETSR126_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR126_OFST))
21263 /* The address of the ALT_GIC_DIST_GICD_ITARGETSR127 register for the ALT_GIC_DIST instance. */
21264 #define ALT_GIC_DIST_GICD_ITARGETSR127_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ITARGETSR127_OFST))
21265 /* The address of the ALT_GIC_DIST_GICD_ICFGR0 register for the ALT_GIC_DIST instance. */
21266 #define ALT_GIC_DIST_GICD_ICFGR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR0_OFST))
21267 /* The address of the ALT_GIC_DIST_GICD_ICFGR1 register for the ALT_GIC_DIST instance. */
21268 #define ALT_GIC_DIST_GICD_ICFGR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR1_OFST))
21269 /* The address of the ALT_GIC_DIST_GICD_ICFGR2 register for the ALT_GIC_DIST instance. */
21270 #define ALT_GIC_DIST_GICD_ICFGR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR2_OFST))
21271 /* The address of the ALT_GIC_DIST_GICD_ICFGR3 register for the ALT_GIC_DIST instance. */
21272 #define ALT_GIC_DIST_GICD_ICFGR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR3_OFST))
21273 /* The address of the ALT_GIC_DIST_GICD_ICFGR4 register for the ALT_GIC_DIST instance. */
21274 #define ALT_GIC_DIST_GICD_ICFGR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR4_OFST))
21275 /* The address of the ALT_GIC_DIST_GICD_ICFGR5 register for the ALT_GIC_DIST instance. */
21276 #define ALT_GIC_DIST_GICD_ICFGR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR5_OFST))
21277 /* The address of the ALT_GIC_DIST_GICD_ICFGR6 register for the ALT_GIC_DIST instance. */
21278 #define ALT_GIC_DIST_GICD_ICFGR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR6_OFST))
21279 /* The address of the ALT_GIC_DIST_GICD_ICFGR7 register for the ALT_GIC_DIST instance. */
21280 #define ALT_GIC_DIST_GICD_ICFGR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR7_OFST))
21281 /* The address of the ALT_GIC_DIST_GICD_ICFGR8 register for the ALT_GIC_DIST instance. */
21282 #define ALT_GIC_DIST_GICD_ICFGR8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR8_OFST))
21283 /* The address of the ALT_GIC_DIST_GICD_ICFGR9 register for the ALT_GIC_DIST instance. */
21284 #define ALT_GIC_DIST_GICD_ICFGR9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR9_OFST))
21285 /* The address of the ALT_GIC_DIST_GICD_ICFGR10 register for the ALT_GIC_DIST instance. */
21286 #define ALT_GIC_DIST_GICD_ICFGR10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR10_OFST))
21287 /* The address of the ALT_GIC_DIST_GICD_ICFGR11 register for the ALT_GIC_DIST instance. */
21288 #define ALT_GIC_DIST_GICD_ICFGR11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR11_OFST))
21289 /* The address of the ALT_GIC_DIST_GICD_ICFGR12 register for the ALT_GIC_DIST instance. */
21290 #define ALT_GIC_DIST_GICD_ICFGR12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR12_OFST))
21291 /* The address of the ALT_GIC_DIST_GICD_ICFGR13 register for the ALT_GIC_DIST instance. */
21292 #define ALT_GIC_DIST_GICD_ICFGR13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR13_OFST))
21293 /* The address of the ALT_GIC_DIST_GICD_ICFGR14 register for the ALT_GIC_DIST instance. */
21294 #define ALT_GIC_DIST_GICD_ICFGR14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR14_OFST))
21295 /* The address of the ALT_GIC_DIST_GICD_ICFGR15 register for the ALT_GIC_DIST instance. */
21296 #define ALT_GIC_DIST_GICD_ICFGR15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR15_OFST))
21297 /* The address of the ALT_GIC_DIST_GICD_ICFGR16 register for the ALT_GIC_DIST instance. */
21298 #define ALT_GIC_DIST_GICD_ICFGR16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR16_OFST))
21299 /* The address of the ALT_GIC_DIST_GICD_ICFGR17 register for the ALT_GIC_DIST instance. */
21300 #define ALT_GIC_DIST_GICD_ICFGR17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR17_OFST))
21301 /* The address of the ALT_GIC_DIST_GICD_ICFGR18 register for the ALT_GIC_DIST instance. */
21302 #define ALT_GIC_DIST_GICD_ICFGR18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR18_OFST))
21303 /* The address of the ALT_GIC_DIST_GICD_ICFGR19 register for the ALT_GIC_DIST instance. */
21304 #define ALT_GIC_DIST_GICD_ICFGR19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR19_OFST))
21305 /* The address of the ALT_GIC_DIST_GICD_ICFGR20 register for the ALT_GIC_DIST instance. */
21306 #define ALT_GIC_DIST_GICD_ICFGR20_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR20_OFST))
21307 /* The address of the ALT_GIC_DIST_GICD_ICFGR21 register for the ALT_GIC_DIST instance. */
21308 #define ALT_GIC_DIST_GICD_ICFGR21_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR21_OFST))
21309 /* The address of the ALT_GIC_DIST_GICD_ICFGR22 register for the ALT_GIC_DIST instance. */
21310 #define ALT_GIC_DIST_GICD_ICFGR22_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR22_OFST))
21311 /* The address of the ALT_GIC_DIST_GICD_ICFGR23 register for the ALT_GIC_DIST instance. */
21312 #define ALT_GIC_DIST_GICD_ICFGR23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR23_OFST))
21313 /* The address of the ALT_GIC_DIST_GICD_ICFGR24 register for the ALT_GIC_DIST instance. */
21314 #define ALT_GIC_DIST_GICD_ICFGR24_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR24_OFST))
21315 /* The address of the ALT_GIC_DIST_GICD_ICFGR25 register for the ALT_GIC_DIST instance. */
21316 #define ALT_GIC_DIST_GICD_ICFGR25_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR25_OFST))
21317 /* The address of the ALT_GIC_DIST_GICD_ICFGR26 register for the ALT_GIC_DIST instance. */
21318 #define ALT_GIC_DIST_GICD_ICFGR26_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR26_OFST))
21319 /* The address of the ALT_GIC_DIST_GICD_ICFGR27 register for the ALT_GIC_DIST instance. */
21320 #define ALT_GIC_DIST_GICD_ICFGR27_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR27_OFST))
21321 /* The address of the ALT_GIC_DIST_GICD_ICFGR28 register for the ALT_GIC_DIST instance. */
21322 #define ALT_GIC_DIST_GICD_ICFGR28_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR28_OFST))
21323 /* The address of the ALT_GIC_DIST_GICD_ICFGR29 register for the ALT_GIC_DIST instance. */
21324 #define ALT_GIC_DIST_GICD_ICFGR29_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR29_OFST))
21325 /* The address of the ALT_GIC_DIST_GICD_ICFGR30 register for the ALT_GIC_DIST instance. */
21326 #define ALT_GIC_DIST_GICD_ICFGR30_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR30_OFST))
21327 /* The address of the ALT_GIC_DIST_GICD_ICFGR31 register for the ALT_GIC_DIST instance. */
21328 #define ALT_GIC_DIST_GICD_ICFGR31_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_ICFGR31_OFST))
21329 /* The address of the ALT_GIC_DIST_GICD_PPISR register for the ALT_GIC_DIST instance. */
21330 #define ALT_GIC_DIST_GICD_PPISR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_PPISR_OFST))
21331 /* The address of the ALT_GIC_DIST_GICD_SPISR0 register for the ALT_GIC_DIST instance. */
21332 #define ALT_GIC_DIST_GICD_SPISR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR0_OFST))
21333 /* The address of the ALT_GIC_DIST_GICD_SPISR1 register for the ALT_GIC_DIST instance. */
21334 #define ALT_GIC_DIST_GICD_SPISR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR1_OFST))
21335 /* The address of the ALT_GIC_DIST_GICD_SPISR2 register for the ALT_GIC_DIST instance. */
21336 #define ALT_GIC_DIST_GICD_SPISR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR2_OFST))
21337 /* The address of the ALT_GIC_DIST_GICD_SPISR3 register for the ALT_GIC_DIST instance. */
21338 #define ALT_GIC_DIST_GICD_SPISR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR3_OFST))
21339 /* The address of the ALT_GIC_DIST_GICD_SPISR4 register for the ALT_GIC_DIST instance. */
21340 #define ALT_GIC_DIST_GICD_SPISR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR4_OFST))
21341 /* The address of the ALT_GIC_DIST_GICD_SPISR5 register for the ALT_GIC_DIST instance. */
21342 #define ALT_GIC_DIST_GICD_SPISR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR5_OFST))
21343 /* The address of the ALT_GIC_DIST_GICD_SPISR6 register for the ALT_GIC_DIST instance. */
21344 #define ALT_GIC_DIST_GICD_SPISR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR6_OFST))
21345 /* The address of the ALT_GIC_DIST_GICD_SPISR7 register for the ALT_GIC_DIST instance. */
21346 #define ALT_GIC_DIST_GICD_SPISR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR7_OFST))
21347 /* The address of the ALT_GIC_DIST_GICD_SPISR8 register for the ALT_GIC_DIST instance. */
21348 #define ALT_GIC_DIST_GICD_SPISR8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR8_OFST))
21349 /* The address of the ALT_GIC_DIST_GICD_SPISR9 register for the ALT_GIC_DIST instance. */
21350 #define ALT_GIC_DIST_GICD_SPISR9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR9_OFST))
21351 /* The address of the ALT_GIC_DIST_GICD_SPISR10 register for the ALT_GIC_DIST instance. */
21352 #define ALT_GIC_DIST_GICD_SPISR10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR10_OFST))
21353 /* The address of the ALT_GIC_DIST_GICD_SPISR11 register for the ALT_GIC_DIST instance. */
21354 #define ALT_GIC_DIST_GICD_SPISR11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR11_OFST))
21355 /* The address of the ALT_GIC_DIST_GICD_SPISR12 register for the ALT_GIC_DIST instance. */
21356 #define ALT_GIC_DIST_GICD_SPISR12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR12_OFST))
21357 /* The address of the ALT_GIC_DIST_GICD_SPISR13 register for the ALT_GIC_DIST instance. */
21358 #define ALT_GIC_DIST_GICD_SPISR13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR13_OFST))
21359 /* The address of the ALT_GIC_DIST_GICD_SPISR14 register for the ALT_GIC_DIST instance. */
21360 #define ALT_GIC_DIST_GICD_SPISR14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPISR14_OFST))
21361 /* The address of the ALT_GIC_DIST_GICD_SGIR register for the ALT_GIC_DIST instance. */
21362 #define ALT_GIC_DIST_GICD_SGIR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SGIR_OFST))
21363 /* The address of the ALT_GIC_DIST_GICD_CPENDSGIR0 register for the ALT_GIC_DIST instance. */
21364 #define ALT_GIC_DIST_GICD_CPENDSGIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_CPENDSGIR0_OFST))
21365 /* The address of the ALT_GIC_DIST_GICD_CPENDSGIR1 register for the ALT_GIC_DIST instance. */
21366 #define ALT_GIC_DIST_GICD_CPENDSGIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_CPENDSGIR1_OFST))
21367 /* The address of the ALT_GIC_DIST_GICD_CPENDSGIR2 register for the ALT_GIC_DIST instance. */
21368 #define ALT_GIC_DIST_GICD_CPENDSGIR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_CPENDSGIR2_OFST))
21369 /* The address of the ALT_GIC_DIST_GICD_CPENDSGIR3 register for the ALT_GIC_DIST instance. */
21370 #define ALT_GIC_DIST_GICD_CPENDSGIR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_CPENDSGIR3_OFST))
21371 /* The address of the ALT_GIC_DIST_GICD_SPENDSGIR0 register for the ALT_GIC_DIST instance. */
21372 #define ALT_GIC_DIST_GICD_SPENDSGIR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPENDSGIR0_OFST))
21373 /* The address of the ALT_GIC_DIST_GICD_SPENDSGIR1 register for the ALT_GIC_DIST instance. */
21374 #define ALT_GIC_DIST_GICD_SPENDSGIR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPENDSGIR1_OFST))
21375 /* The address of the ALT_GIC_DIST_GICD_SPENDSGIR2 register for the ALT_GIC_DIST instance. */
21376 #define ALT_GIC_DIST_GICD_SPENDSGIR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPENDSGIR2_OFST))
21377 /* The address of the ALT_GIC_DIST_GICD_SPENDSGIR3 register for the ALT_GIC_DIST instance. */
21378 #define ALT_GIC_DIST_GICD_SPENDSGIR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_SPENDSGIR3_OFST))
21379 /* The address of the ALT_GIC_DIST_GICD_PIDR4 register for the ALT_GIC_DIST instance. */
21380 #define ALT_GIC_DIST_GICD_PIDR4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_PIDR4_OFST))
21381 /* The address of the ALT_GIC_DIST_GICD_PIDR5 register for the ALT_GIC_DIST instance. */
21382 #define ALT_GIC_DIST_GICD_PIDR5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_PIDR5_OFST))
21383 /* The address of the ALT_GIC_DIST_GICD_PIDR6 register for the ALT_GIC_DIST instance. */
21384 #define ALT_GIC_DIST_GICD_PIDR6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_PIDR6_OFST))
21385 /* The address of the ALT_GIC_DIST_GICD_PIDR7 register for the ALT_GIC_DIST instance. */
21386 #define ALT_GIC_DIST_GICD_PIDR7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_PIDR7_OFST))
21387 /* The address of the ALT_GIC_DIST_GICD_PIDR0 register for the ALT_GIC_DIST instance. */
21388 #define ALT_GIC_DIST_GICD_PIDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_PIDR0_OFST))
21389 /* The address of the ALT_GIC_DIST_GICD_PIDR1 register for the ALT_GIC_DIST instance. */
21390 #define ALT_GIC_DIST_GICD_PIDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_PIDR1_OFST))
21391 /* The address of the ALT_GIC_DIST_GICD_PIDR2 register for the ALT_GIC_DIST instance. */
21392 #define ALT_GIC_DIST_GICD_PIDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_PIDR2_OFST))
21393 /* The address of the ALT_GIC_DIST_GICD_PIDR3 register for the ALT_GIC_DIST instance. */
21394 #define ALT_GIC_DIST_GICD_PIDR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_PIDR3_OFST))
21395 /* The address of the ALT_GIC_DIST_GICD_CIDR0 register for the ALT_GIC_DIST instance. */
21396 #define ALT_GIC_DIST_GICD_CIDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_CIDR0_OFST))
21397 /* The address of the ALT_GIC_DIST_GICD_CIDR1 register for the ALT_GIC_DIST instance. */
21398 #define ALT_GIC_DIST_GICD_CIDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_CIDR1_OFST))
21399 /* The address of the ALT_GIC_DIST_GICD_CIDR2 register for the ALT_GIC_DIST instance. */
21400 #define ALT_GIC_DIST_GICD_CIDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_CIDR2_OFST))
21401 /* The address of the ALT_GIC_DIST_GICD_CIDR3 register for the ALT_GIC_DIST instance. */
21402 #define ALT_GIC_DIST_GICD_CIDR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_DIST_ADDR) + ALT_GIC_DIST_GICD_CIDR3_OFST))
21403 /* The base address byte offset for the start of the ALT_GIC_DIST component. */
21404 #define ALT_GIC_DIST_OFST 0xfffc1000
21405 /* The start address of the ALT_GIC_DIST component. */
21406 #define ALT_GIC_DIST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GIC_DIST_OFST))
21407 /* The lower bound address range of the ALT_GIC_DIST component. */
21408 #define ALT_GIC_DIST_LB_ADDR ALT_GIC_DIST_ADDR
21409 /* The upper bound address range of the ALT_GIC_DIST component. */
21410 #define ALT_GIC_DIST_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GIC_DIST_ADDR) + 0x1000) - 1))
21411 
21412 
21413 /*
21414  * Component Instance : gic_cpuif
21415  *
21416  * Instance gic_cpuif of component ALT_GIC_CPUIF.
21417  *
21418  *
21419  */
21420 /* The address of the ALT_GIC_CPUIF_GICC_CTLR register for the ALT_GIC_CPUIF instance. */
21421 #define ALT_GIC_CPUIF_GICC_CTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_CTLR_OFST))
21422 /* The address of the ALT_GIC_CPUIF_GICC_PMR register for the ALT_GIC_CPUIF instance. */
21423 #define ALT_GIC_CPUIF_GICC_PMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_PMR_OFST))
21424 /* The address of the ALT_GIC_CPUIF_GICC_BPR register for the ALT_GIC_CPUIF instance. */
21425 #define ALT_GIC_CPUIF_GICC_BPR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_BPR_OFST))
21426 /* The address of the ALT_GIC_CPUIF_GICC_IAR register for the ALT_GIC_CPUIF instance. */
21427 #define ALT_GIC_CPUIF_GICC_IAR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_IAR_OFST))
21428 /* The address of the ALT_GIC_CPUIF_GICC_EOIR register for the ALT_GIC_CPUIF instance. */
21429 #define ALT_GIC_CPUIF_GICC_EOIR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_EOIR_OFST))
21430 /* The address of the ALT_GIC_CPUIF_GICC_RPR register for the ALT_GIC_CPUIF instance. */
21431 #define ALT_GIC_CPUIF_GICC_RPR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_RPR_OFST))
21432 /* The address of the ALT_GIC_CPUIF_GICC_HPPIR register for the ALT_GIC_CPUIF instance. */
21433 #define ALT_GIC_CPUIF_GICC_HPPIR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_HPPIR_OFST))
21434 /* The address of the ALT_GIC_CPUIF_GICC_ABPR register for the ALT_GIC_CPUIF instance. */
21435 #define ALT_GIC_CPUIF_GICC_ABPR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_ABPR_OFST))
21436 /* The address of the ALT_GIC_CPUIF_GICC_AIAR register for the ALT_GIC_CPUIF instance. */
21437 #define ALT_GIC_CPUIF_GICC_AIAR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_AIAR_OFST))
21438 /* The address of the ALT_GIC_CPUIF_GICC_AEOIR register for the ALT_GIC_CPUIF instance. */
21439 #define ALT_GIC_CPUIF_GICC_AEOIR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_AEOIR_OFST))
21440 /* The address of the ALT_GIC_CPUIF_GICC_AHPPIR register for the ALT_GIC_CPUIF instance. */
21441 #define ALT_GIC_CPUIF_GICC_AHPPIR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_AHPPIR_OFST))
21442 /* The address of the ALT_GIC_CPUIF_GICC_APR0 register for the ALT_GIC_CPUIF instance. */
21443 #define ALT_GIC_CPUIF_GICC_APR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_APR0_OFST))
21444 /* The address of the ALT_GIC_CPUIF_GICC_NSAPR0 register for the ALT_GIC_CPUIF instance. */
21445 #define ALT_GIC_CPUIF_GICC_NSAPR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_NSAPR0_OFST))
21446 /* The address of the ALT_GIC_CPUIF_GICC_IIDR register for the ALT_GIC_CPUIF instance. */
21447 #define ALT_GIC_CPUIF_GICC_IIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_IIDR_OFST))
21448 /* The address of the ALT_GIC_CPUIF_GICC_DIR register for the ALT_GIC_CPUIF instance. */
21449 #define ALT_GIC_CPUIF_GICC_DIR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + ALT_GIC_CPUIF_GICC_DIR_OFST))
21450 /* The base address byte offset for the start of the ALT_GIC_CPUIF component. */
21451 #define ALT_GIC_CPUIF_OFST 0xfffc2000
21452 /* The start address of the ALT_GIC_CPUIF component. */
21453 #define ALT_GIC_CPUIF_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GIC_CPUIF_OFST))
21454 /* The lower bound address range of the ALT_GIC_CPUIF component. */
21455 #define ALT_GIC_CPUIF_LB_ADDR ALT_GIC_CPUIF_ADDR
21456 /* The upper bound address range of the ALT_GIC_CPUIF component. */
21457 #define ALT_GIC_CPUIF_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GIC_CPUIF_ADDR) + 0x2000) - 1))
21458 
21459 
21460 /*
21461  * Component Instance : gic_vcpuif_hyp
21462  *
21463  * Instance gic_vcpuif_hyp of component ALT_GIC_VCPUIF.
21464  *
21465  *
21466  */
21467 /* The address of the ALT_GIC_VCPUIF_GICH_HCR register for the ALT_GIC_VCPUIF_HYP instance. */
21468 #define ALT_GIC_VCPUIF_HYP_GICH_HCR_ADDR ALT_GIC_VCPUIF_GICH_HCR_ADDR(ALT_GIC_VCPUIF_HYP_ADDR)
21469 /* The address of the ALT_GIC_VCPUIF_GICH_VTR register for the ALT_GIC_VCPUIF_HYP instance. */
21470 #define ALT_GIC_VCPUIF_HYP_GICH_VTR_ADDR ALT_GIC_VCPUIF_GICH_VTR_ADDR(ALT_GIC_VCPUIF_HYP_ADDR)
21471 /* The address of the ALT_GIC_VCPUIF_GICH_VMCR register for the ALT_GIC_VCPUIF_HYP instance. */
21472 #define ALT_GIC_VCPUIF_HYP_GICH_VMCR_ADDR ALT_GIC_VCPUIF_GICH_VMCR_ADDR(ALT_GIC_VCPUIF_HYP_ADDR)
21473 /* The address of the ALT_GIC_VCPUIF_GICH_MISR register for the ALT_GIC_VCPUIF_HYP instance. */
21474 #define ALT_GIC_VCPUIF_HYP_GICH_MISR_ADDR ALT_GIC_VCPUIF_GICH_MISR_ADDR(ALT_GIC_VCPUIF_HYP_ADDR)
21475 /* The address of the ALT_GIC_VCPUIF_GICH_EISR0 register for the ALT_GIC_VCPUIF_HYP instance. */
21476 #define ALT_GIC_VCPUIF_HYP_GICH_EISR0_ADDR ALT_GIC_VCPUIF_GICH_EISR0_ADDR(ALT_GIC_VCPUIF_HYP_ADDR)
21477 /* The address of the ALT_GIC_VCPUIF_GICH_ELSR0 register for the ALT_GIC_VCPUIF_HYP instance. */
21478 #define ALT_GIC_VCPUIF_HYP_GICH_ELSR0_ADDR ALT_GIC_VCPUIF_GICH_ELSR0_ADDR(ALT_GIC_VCPUIF_HYP_ADDR)
21479 /* The address of the ALT_GIC_VCPUIF_GICH_APR0 register for the ALT_GIC_VCPUIF_HYP instance. */
21480 #define ALT_GIC_VCPUIF_HYP_GICH_APR0_ADDR ALT_GIC_VCPUIF_GICH_APR0_ADDR(ALT_GIC_VCPUIF_HYP_ADDR)
21481 /* The address of the ALT_GIC_VCPUIF_GICH_LR0 register for the ALT_GIC_VCPUIF_HYP instance. */
21482 #define ALT_GIC_VCPUIF_HYP_GICH_LR0_ADDR ALT_GIC_VCPUIF_GICH_LR0_ADDR(ALT_GIC_VCPUIF_HYP_ADDR)
21483 /* The address of the ALT_GIC_VCPUIF_GICH_LR1 register for the ALT_GIC_VCPUIF_HYP instance. */
21484 #define ALT_GIC_VCPUIF_HYP_GICH_LR1_ADDR ALT_GIC_VCPUIF_GICH_LR1_ADDR(ALT_GIC_VCPUIF_HYP_ADDR)
21485 /* The address of the ALT_GIC_VCPUIF_GICH_LR2 register for the ALT_GIC_VCPUIF_HYP instance. */
21486 #define ALT_GIC_VCPUIF_HYP_GICH_LR2_ADDR ALT_GIC_VCPUIF_GICH_LR2_ADDR(ALT_GIC_VCPUIF_HYP_ADDR)
21487 /* The address of the ALT_GIC_VCPUIF_GICH_LR3 register for the ALT_GIC_VCPUIF_HYP instance. */
21488 #define ALT_GIC_VCPUIF_HYP_GICH_LR3_ADDR ALT_GIC_VCPUIF_GICH_LR3_ADDR(ALT_GIC_VCPUIF_HYP_ADDR)
21489 /* The base address byte offset for the start of the ALT_GIC_VCPUIF_HYP component. */
21490 #define ALT_GIC_VCPUIF_HYP_OFST 0xfffc4000
21491 /* The start address of the ALT_GIC_VCPUIF_HYP component. */
21492 #define ALT_GIC_VCPUIF_HYP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GIC_VCPUIF_HYP_OFST))
21493 /* The lower bound address range of the ALT_GIC_VCPUIF_HYP component. */
21494 #define ALT_GIC_VCPUIF_HYP_LB_ADDR ALT_GIC_VCPUIF_HYP_ADDR
21495 /* The upper bound address range of the ALT_GIC_VCPUIF_HYP component. */
21496 #define ALT_GIC_VCPUIF_HYP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_ADDR) + 0x200) - 1))
21497 
21498 
21499 /*
21500  * Component Instance : gic_vcpuif_hyp_alias0
21501  *
21502  * Instance gic_vcpuif_hyp_alias0 of component ALT_GIC_VCPUIF.
21503  *
21504  *
21505  */
21506 /* The address of the ALT_GIC_VCPUIF_GICH_HCR register for the ALT_GIC_VCPUIF_HYP_ALIAS0 instance. */
21507 #define ALT_GIC_VCPUIF_HYP_ALIAS0_GICH_HCR_ADDR ALT_GIC_VCPUIF_GICH_HCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR)
21508 /* The address of the ALT_GIC_VCPUIF_GICH_VTR register for the ALT_GIC_VCPUIF_HYP_ALIAS0 instance. */
21509 #define ALT_GIC_VCPUIF_HYP_ALIAS0_GICH_VTR_ADDR ALT_GIC_VCPUIF_GICH_VTR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR)
21510 /* The address of the ALT_GIC_VCPUIF_GICH_VMCR register for the ALT_GIC_VCPUIF_HYP_ALIAS0 instance. */
21511 #define ALT_GIC_VCPUIF_HYP_ALIAS0_GICH_VMCR_ADDR ALT_GIC_VCPUIF_GICH_VMCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR)
21512 /* The address of the ALT_GIC_VCPUIF_GICH_MISR register for the ALT_GIC_VCPUIF_HYP_ALIAS0 instance. */
21513 #define ALT_GIC_VCPUIF_HYP_ALIAS0_GICH_MISR_ADDR ALT_GIC_VCPUIF_GICH_MISR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR)
21514 /* The address of the ALT_GIC_VCPUIF_GICH_EISR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS0 instance. */
21515 #define ALT_GIC_VCPUIF_HYP_ALIAS0_GICH_EISR0_ADDR ALT_GIC_VCPUIF_GICH_EISR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR)
21516 /* The address of the ALT_GIC_VCPUIF_GICH_ELSR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS0 instance. */
21517 #define ALT_GIC_VCPUIF_HYP_ALIAS0_GICH_ELSR0_ADDR ALT_GIC_VCPUIF_GICH_ELSR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR)
21518 /* The address of the ALT_GIC_VCPUIF_GICH_APR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS0 instance. */
21519 #define ALT_GIC_VCPUIF_HYP_ALIAS0_GICH_APR0_ADDR ALT_GIC_VCPUIF_GICH_APR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR)
21520 /* The address of the ALT_GIC_VCPUIF_GICH_LR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS0 instance. */
21521 #define ALT_GIC_VCPUIF_HYP_ALIAS0_GICH_LR0_ADDR ALT_GIC_VCPUIF_GICH_LR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR)
21522 /* The address of the ALT_GIC_VCPUIF_GICH_LR1 register for the ALT_GIC_VCPUIF_HYP_ALIAS0 instance. */
21523 #define ALT_GIC_VCPUIF_HYP_ALIAS0_GICH_LR1_ADDR ALT_GIC_VCPUIF_GICH_LR1_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR)
21524 /* The address of the ALT_GIC_VCPUIF_GICH_LR2 register for the ALT_GIC_VCPUIF_HYP_ALIAS0 instance. */
21525 #define ALT_GIC_VCPUIF_HYP_ALIAS0_GICH_LR2_ADDR ALT_GIC_VCPUIF_GICH_LR2_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR)
21526 /* The address of the ALT_GIC_VCPUIF_GICH_LR3 register for the ALT_GIC_VCPUIF_HYP_ALIAS0 instance. */
21527 #define ALT_GIC_VCPUIF_HYP_ALIAS0_GICH_LR3_ADDR ALT_GIC_VCPUIF_GICH_LR3_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR)
21528 /* The base address byte offset for the start of the ALT_GIC_VCPUIF_HYP_ALIAS0 component. */
21529 #define ALT_GIC_VCPUIF_HYP_ALIAS0_OFST 0xfffc5000
21530 /* The start address of the ALT_GIC_VCPUIF_HYP_ALIAS0 component. */
21531 #define ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GIC_VCPUIF_HYP_ALIAS0_OFST))
21532 /* The lower bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS0 component. */
21533 #define ALT_GIC_VCPUIF_HYP_ALIAS0_LB_ADDR ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR
21534 /* The upper bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS0 component. */
21535 #define ALT_GIC_VCPUIF_HYP_ALIAS0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_ALIAS0_ADDR) + 0x200) - 1))
21536 
21537 
21538 /*
21539  * Component Instance : gic_vcpuif_hyp_alias1
21540  *
21541  * Instance gic_vcpuif_hyp_alias1 of component ALT_GIC_VCPUIF.
21542  *
21543  *
21544  */
21545 /* The address of the ALT_GIC_VCPUIF_GICH_HCR register for the ALT_GIC_VCPUIF_HYP_ALIAS1 instance. */
21546 #define ALT_GIC_VCPUIF_HYP_ALIAS1_GICH_HCR_ADDR ALT_GIC_VCPUIF_GICH_HCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR)
21547 /* The address of the ALT_GIC_VCPUIF_GICH_VTR register for the ALT_GIC_VCPUIF_HYP_ALIAS1 instance. */
21548 #define ALT_GIC_VCPUIF_HYP_ALIAS1_GICH_VTR_ADDR ALT_GIC_VCPUIF_GICH_VTR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR)
21549 /* The address of the ALT_GIC_VCPUIF_GICH_VMCR register for the ALT_GIC_VCPUIF_HYP_ALIAS1 instance. */
21550 #define ALT_GIC_VCPUIF_HYP_ALIAS1_GICH_VMCR_ADDR ALT_GIC_VCPUIF_GICH_VMCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR)
21551 /* The address of the ALT_GIC_VCPUIF_GICH_MISR register for the ALT_GIC_VCPUIF_HYP_ALIAS1 instance. */
21552 #define ALT_GIC_VCPUIF_HYP_ALIAS1_GICH_MISR_ADDR ALT_GIC_VCPUIF_GICH_MISR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR)
21553 /* The address of the ALT_GIC_VCPUIF_GICH_EISR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS1 instance. */
21554 #define ALT_GIC_VCPUIF_HYP_ALIAS1_GICH_EISR0_ADDR ALT_GIC_VCPUIF_GICH_EISR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR)
21555 /* The address of the ALT_GIC_VCPUIF_GICH_ELSR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS1 instance. */
21556 #define ALT_GIC_VCPUIF_HYP_ALIAS1_GICH_ELSR0_ADDR ALT_GIC_VCPUIF_GICH_ELSR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR)
21557 /* The address of the ALT_GIC_VCPUIF_GICH_APR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS1 instance. */
21558 #define ALT_GIC_VCPUIF_HYP_ALIAS1_GICH_APR0_ADDR ALT_GIC_VCPUIF_GICH_APR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR)
21559 /* The address of the ALT_GIC_VCPUIF_GICH_LR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS1 instance. */
21560 #define ALT_GIC_VCPUIF_HYP_ALIAS1_GICH_LR0_ADDR ALT_GIC_VCPUIF_GICH_LR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR)
21561 /* The address of the ALT_GIC_VCPUIF_GICH_LR1 register for the ALT_GIC_VCPUIF_HYP_ALIAS1 instance. */
21562 #define ALT_GIC_VCPUIF_HYP_ALIAS1_GICH_LR1_ADDR ALT_GIC_VCPUIF_GICH_LR1_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR)
21563 /* The address of the ALT_GIC_VCPUIF_GICH_LR2 register for the ALT_GIC_VCPUIF_HYP_ALIAS1 instance. */
21564 #define ALT_GIC_VCPUIF_HYP_ALIAS1_GICH_LR2_ADDR ALT_GIC_VCPUIF_GICH_LR2_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR)
21565 /* The address of the ALT_GIC_VCPUIF_GICH_LR3 register for the ALT_GIC_VCPUIF_HYP_ALIAS1 instance. */
21566 #define ALT_GIC_VCPUIF_HYP_ALIAS1_GICH_LR3_ADDR ALT_GIC_VCPUIF_GICH_LR3_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR)
21567 /* The base address byte offset for the start of the ALT_GIC_VCPUIF_HYP_ALIAS1 component. */
21568 #define ALT_GIC_VCPUIF_HYP_ALIAS1_OFST 0xfffc5200
21569 /* The start address of the ALT_GIC_VCPUIF_HYP_ALIAS1 component. */
21570 #define ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GIC_VCPUIF_HYP_ALIAS1_OFST))
21571 /* The lower bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS1 component. */
21572 #define ALT_GIC_VCPUIF_HYP_ALIAS1_LB_ADDR ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR
21573 /* The upper bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS1 component. */
21574 #define ALT_GIC_VCPUIF_HYP_ALIAS1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_ALIAS1_ADDR) + 0x200) - 1))
21575 
21576 
21577 /*
21578  * Component Instance : gic_vcpuif_hyp_alias2
21579  *
21580  * Instance gic_vcpuif_hyp_alias2 of component ALT_GIC_VCPUIF.
21581  *
21582  *
21583  */
21584 /* The address of the ALT_GIC_VCPUIF_GICH_HCR register for the ALT_GIC_VCPUIF_HYP_ALIAS2 instance. */
21585 #define ALT_GIC_VCPUIF_HYP_ALIAS2_GICH_HCR_ADDR ALT_GIC_VCPUIF_GICH_HCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR)
21586 /* The address of the ALT_GIC_VCPUIF_GICH_VTR register for the ALT_GIC_VCPUIF_HYP_ALIAS2 instance. */
21587 #define ALT_GIC_VCPUIF_HYP_ALIAS2_GICH_VTR_ADDR ALT_GIC_VCPUIF_GICH_VTR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR)
21588 /* The address of the ALT_GIC_VCPUIF_GICH_VMCR register for the ALT_GIC_VCPUIF_HYP_ALIAS2 instance. */
21589 #define ALT_GIC_VCPUIF_HYP_ALIAS2_GICH_VMCR_ADDR ALT_GIC_VCPUIF_GICH_VMCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR)
21590 /* The address of the ALT_GIC_VCPUIF_GICH_MISR register for the ALT_GIC_VCPUIF_HYP_ALIAS2 instance. */
21591 #define ALT_GIC_VCPUIF_HYP_ALIAS2_GICH_MISR_ADDR ALT_GIC_VCPUIF_GICH_MISR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR)
21592 /* The address of the ALT_GIC_VCPUIF_GICH_EISR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS2 instance. */
21593 #define ALT_GIC_VCPUIF_HYP_ALIAS2_GICH_EISR0_ADDR ALT_GIC_VCPUIF_GICH_EISR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR)
21594 /* The address of the ALT_GIC_VCPUIF_GICH_ELSR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS2 instance. */
21595 #define ALT_GIC_VCPUIF_HYP_ALIAS2_GICH_ELSR0_ADDR ALT_GIC_VCPUIF_GICH_ELSR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR)
21596 /* The address of the ALT_GIC_VCPUIF_GICH_APR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS2 instance. */
21597 #define ALT_GIC_VCPUIF_HYP_ALIAS2_GICH_APR0_ADDR ALT_GIC_VCPUIF_GICH_APR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR)
21598 /* The address of the ALT_GIC_VCPUIF_GICH_LR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS2 instance. */
21599 #define ALT_GIC_VCPUIF_HYP_ALIAS2_GICH_LR0_ADDR ALT_GIC_VCPUIF_GICH_LR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR)
21600 /* The address of the ALT_GIC_VCPUIF_GICH_LR1 register for the ALT_GIC_VCPUIF_HYP_ALIAS2 instance. */
21601 #define ALT_GIC_VCPUIF_HYP_ALIAS2_GICH_LR1_ADDR ALT_GIC_VCPUIF_GICH_LR1_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR)
21602 /* The address of the ALT_GIC_VCPUIF_GICH_LR2 register for the ALT_GIC_VCPUIF_HYP_ALIAS2 instance. */
21603 #define ALT_GIC_VCPUIF_HYP_ALIAS2_GICH_LR2_ADDR ALT_GIC_VCPUIF_GICH_LR2_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR)
21604 /* The address of the ALT_GIC_VCPUIF_GICH_LR3 register for the ALT_GIC_VCPUIF_HYP_ALIAS2 instance. */
21605 #define ALT_GIC_VCPUIF_HYP_ALIAS2_GICH_LR3_ADDR ALT_GIC_VCPUIF_GICH_LR3_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR)
21606 /* The base address byte offset for the start of the ALT_GIC_VCPUIF_HYP_ALIAS2 component. */
21607 #define ALT_GIC_VCPUIF_HYP_ALIAS2_OFST 0xfffc5400
21608 /* The start address of the ALT_GIC_VCPUIF_HYP_ALIAS2 component. */
21609 #define ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GIC_VCPUIF_HYP_ALIAS2_OFST))
21610 /* The lower bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS2 component. */
21611 #define ALT_GIC_VCPUIF_HYP_ALIAS2_LB_ADDR ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR
21612 /* The upper bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS2 component. */
21613 #define ALT_GIC_VCPUIF_HYP_ALIAS2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_ALIAS2_ADDR) + 0x200) - 1))
21614 
21615 
21616 /*
21617  * Component Instance : gic_vcpuif_hyp_alias3
21618  *
21619  * Instance gic_vcpuif_hyp_alias3 of component ALT_GIC_VCPUIF.
21620  *
21621  *
21622  */
21623 /* The address of the ALT_GIC_VCPUIF_GICH_HCR register for the ALT_GIC_VCPUIF_HYP_ALIAS3 instance. */
21624 #define ALT_GIC_VCPUIF_HYP_ALIAS3_GICH_HCR_ADDR ALT_GIC_VCPUIF_GICH_HCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR)
21625 /* The address of the ALT_GIC_VCPUIF_GICH_VTR register for the ALT_GIC_VCPUIF_HYP_ALIAS3 instance. */
21626 #define ALT_GIC_VCPUIF_HYP_ALIAS3_GICH_VTR_ADDR ALT_GIC_VCPUIF_GICH_VTR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR)
21627 /* The address of the ALT_GIC_VCPUIF_GICH_VMCR register for the ALT_GIC_VCPUIF_HYP_ALIAS3 instance. */
21628 #define ALT_GIC_VCPUIF_HYP_ALIAS3_GICH_VMCR_ADDR ALT_GIC_VCPUIF_GICH_VMCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR)
21629 /* The address of the ALT_GIC_VCPUIF_GICH_MISR register for the ALT_GIC_VCPUIF_HYP_ALIAS3 instance. */
21630 #define ALT_GIC_VCPUIF_HYP_ALIAS3_GICH_MISR_ADDR ALT_GIC_VCPUIF_GICH_MISR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR)
21631 /* The address of the ALT_GIC_VCPUIF_GICH_EISR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS3 instance. */
21632 #define ALT_GIC_VCPUIF_HYP_ALIAS3_GICH_EISR0_ADDR ALT_GIC_VCPUIF_GICH_EISR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR)
21633 /* The address of the ALT_GIC_VCPUIF_GICH_ELSR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS3 instance. */
21634 #define ALT_GIC_VCPUIF_HYP_ALIAS3_GICH_ELSR0_ADDR ALT_GIC_VCPUIF_GICH_ELSR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR)
21635 /* The address of the ALT_GIC_VCPUIF_GICH_APR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS3 instance. */
21636 #define ALT_GIC_VCPUIF_HYP_ALIAS3_GICH_APR0_ADDR ALT_GIC_VCPUIF_GICH_APR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR)
21637 /* The address of the ALT_GIC_VCPUIF_GICH_LR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS3 instance. */
21638 #define ALT_GIC_VCPUIF_HYP_ALIAS3_GICH_LR0_ADDR ALT_GIC_VCPUIF_GICH_LR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR)
21639 /* The address of the ALT_GIC_VCPUIF_GICH_LR1 register for the ALT_GIC_VCPUIF_HYP_ALIAS3 instance. */
21640 #define ALT_GIC_VCPUIF_HYP_ALIAS3_GICH_LR1_ADDR ALT_GIC_VCPUIF_GICH_LR1_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR)
21641 /* The address of the ALT_GIC_VCPUIF_GICH_LR2 register for the ALT_GIC_VCPUIF_HYP_ALIAS3 instance. */
21642 #define ALT_GIC_VCPUIF_HYP_ALIAS3_GICH_LR2_ADDR ALT_GIC_VCPUIF_GICH_LR2_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR)
21643 /* The address of the ALT_GIC_VCPUIF_GICH_LR3 register for the ALT_GIC_VCPUIF_HYP_ALIAS3 instance. */
21644 #define ALT_GIC_VCPUIF_HYP_ALIAS3_GICH_LR3_ADDR ALT_GIC_VCPUIF_GICH_LR3_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR)
21645 /* The base address byte offset for the start of the ALT_GIC_VCPUIF_HYP_ALIAS3 component. */
21646 #define ALT_GIC_VCPUIF_HYP_ALIAS3_OFST 0xfffc5600
21647 /* The start address of the ALT_GIC_VCPUIF_HYP_ALIAS3 component. */
21648 #define ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GIC_VCPUIF_HYP_ALIAS3_OFST))
21649 /* The lower bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS3 component. */
21650 #define ALT_GIC_VCPUIF_HYP_ALIAS3_LB_ADDR ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR
21651 /* The upper bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS3 component. */
21652 #define ALT_GIC_VCPUIF_HYP_ALIAS3_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_ALIAS3_ADDR) + 0x200) - 1))
21653 
21654 
21655 /*
21656  * Component Instance : gic_vcpuif_hyp_alias4
21657  *
21658  * Instance gic_vcpuif_hyp_alias4 of component ALT_GIC_VCPUIF.
21659  *
21660  *
21661  */
21662 /* The address of the ALT_GIC_VCPUIF_GICH_HCR register for the ALT_GIC_VCPUIF_HYP_ALIAS4 instance. */
21663 #define ALT_GIC_VCPUIF_HYP_ALIAS4_GICH_HCR_ADDR ALT_GIC_VCPUIF_GICH_HCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR)
21664 /* The address of the ALT_GIC_VCPUIF_GICH_VTR register for the ALT_GIC_VCPUIF_HYP_ALIAS4 instance. */
21665 #define ALT_GIC_VCPUIF_HYP_ALIAS4_GICH_VTR_ADDR ALT_GIC_VCPUIF_GICH_VTR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR)
21666 /* The address of the ALT_GIC_VCPUIF_GICH_VMCR register for the ALT_GIC_VCPUIF_HYP_ALIAS4 instance. */
21667 #define ALT_GIC_VCPUIF_HYP_ALIAS4_GICH_VMCR_ADDR ALT_GIC_VCPUIF_GICH_VMCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR)
21668 /* The address of the ALT_GIC_VCPUIF_GICH_MISR register for the ALT_GIC_VCPUIF_HYP_ALIAS4 instance. */
21669 #define ALT_GIC_VCPUIF_HYP_ALIAS4_GICH_MISR_ADDR ALT_GIC_VCPUIF_GICH_MISR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR)
21670 /* The address of the ALT_GIC_VCPUIF_GICH_EISR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS4 instance. */
21671 #define ALT_GIC_VCPUIF_HYP_ALIAS4_GICH_EISR0_ADDR ALT_GIC_VCPUIF_GICH_EISR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR)
21672 /* The address of the ALT_GIC_VCPUIF_GICH_ELSR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS4 instance. */
21673 #define ALT_GIC_VCPUIF_HYP_ALIAS4_GICH_ELSR0_ADDR ALT_GIC_VCPUIF_GICH_ELSR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR)
21674 /* The address of the ALT_GIC_VCPUIF_GICH_APR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS4 instance. */
21675 #define ALT_GIC_VCPUIF_HYP_ALIAS4_GICH_APR0_ADDR ALT_GIC_VCPUIF_GICH_APR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR)
21676 /* The address of the ALT_GIC_VCPUIF_GICH_LR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS4 instance. */
21677 #define ALT_GIC_VCPUIF_HYP_ALIAS4_GICH_LR0_ADDR ALT_GIC_VCPUIF_GICH_LR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR)
21678 /* The address of the ALT_GIC_VCPUIF_GICH_LR1 register for the ALT_GIC_VCPUIF_HYP_ALIAS4 instance. */
21679 #define ALT_GIC_VCPUIF_HYP_ALIAS4_GICH_LR1_ADDR ALT_GIC_VCPUIF_GICH_LR1_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR)
21680 /* The address of the ALT_GIC_VCPUIF_GICH_LR2 register for the ALT_GIC_VCPUIF_HYP_ALIAS4 instance. */
21681 #define ALT_GIC_VCPUIF_HYP_ALIAS4_GICH_LR2_ADDR ALT_GIC_VCPUIF_GICH_LR2_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR)
21682 /* The address of the ALT_GIC_VCPUIF_GICH_LR3 register for the ALT_GIC_VCPUIF_HYP_ALIAS4 instance. */
21683 #define ALT_GIC_VCPUIF_HYP_ALIAS4_GICH_LR3_ADDR ALT_GIC_VCPUIF_GICH_LR3_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR)
21684 /* The base address byte offset for the start of the ALT_GIC_VCPUIF_HYP_ALIAS4 component. */
21685 #define ALT_GIC_VCPUIF_HYP_ALIAS4_OFST 0xfffc5800
21686 /* The start address of the ALT_GIC_VCPUIF_HYP_ALIAS4 component. */
21687 #define ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GIC_VCPUIF_HYP_ALIAS4_OFST))
21688 /* The lower bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS4 component. */
21689 #define ALT_GIC_VCPUIF_HYP_ALIAS4_LB_ADDR ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR
21690 /* The upper bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS4 component. */
21691 #define ALT_GIC_VCPUIF_HYP_ALIAS4_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_ALIAS4_ADDR) + 0x200) - 1))
21692 
21693 
21694 /*
21695  * Component Instance : gic_vcpuif_hyp_alias5
21696  *
21697  * Instance gic_vcpuif_hyp_alias5 of component ALT_GIC_VCPUIF.
21698  *
21699  *
21700  */
21701 /* The address of the ALT_GIC_VCPUIF_GICH_HCR register for the ALT_GIC_VCPUIF_HYP_ALIAS5 instance. */
21702 #define ALT_GIC_VCPUIF_HYP_ALIAS5_GICH_HCR_ADDR ALT_GIC_VCPUIF_GICH_HCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR)
21703 /* The address of the ALT_GIC_VCPUIF_GICH_VTR register for the ALT_GIC_VCPUIF_HYP_ALIAS5 instance. */
21704 #define ALT_GIC_VCPUIF_HYP_ALIAS5_GICH_VTR_ADDR ALT_GIC_VCPUIF_GICH_VTR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR)
21705 /* The address of the ALT_GIC_VCPUIF_GICH_VMCR register for the ALT_GIC_VCPUIF_HYP_ALIAS5 instance. */
21706 #define ALT_GIC_VCPUIF_HYP_ALIAS5_GICH_VMCR_ADDR ALT_GIC_VCPUIF_GICH_VMCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR)
21707 /* The address of the ALT_GIC_VCPUIF_GICH_MISR register for the ALT_GIC_VCPUIF_HYP_ALIAS5 instance. */
21708 #define ALT_GIC_VCPUIF_HYP_ALIAS5_GICH_MISR_ADDR ALT_GIC_VCPUIF_GICH_MISR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR)
21709 /* The address of the ALT_GIC_VCPUIF_GICH_EISR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS5 instance. */
21710 #define ALT_GIC_VCPUIF_HYP_ALIAS5_GICH_EISR0_ADDR ALT_GIC_VCPUIF_GICH_EISR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR)
21711 /* The address of the ALT_GIC_VCPUIF_GICH_ELSR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS5 instance. */
21712 #define ALT_GIC_VCPUIF_HYP_ALIAS5_GICH_ELSR0_ADDR ALT_GIC_VCPUIF_GICH_ELSR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR)
21713 /* The address of the ALT_GIC_VCPUIF_GICH_APR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS5 instance. */
21714 #define ALT_GIC_VCPUIF_HYP_ALIAS5_GICH_APR0_ADDR ALT_GIC_VCPUIF_GICH_APR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR)
21715 /* The address of the ALT_GIC_VCPUIF_GICH_LR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS5 instance. */
21716 #define ALT_GIC_VCPUIF_HYP_ALIAS5_GICH_LR0_ADDR ALT_GIC_VCPUIF_GICH_LR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR)
21717 /* The address of the ALT_GIC_VCPUIF_GICH_LR1 register for the ALT_GIC_VCPUIF_HYP_ALIAS5 instance. */
21718 #define ALT_GIC_VCPUIF_HYP_ALIAS5_GICH_LR1_ADDR ALT_GIC_VCPUIF_GICH_LR1_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR)
21719 /* The address of the ALT_GIC_VCPUIF_GICH_LR2 register for the ALT_GIC_VCPUIF_HYP_ALIAS5 instance. */
21720 #define ALT_GIC_VCPUIF_HYP_ALIAS5_GICH_LR2_ADDR ALT_GIC_VCPUIF_GICH_LR2_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR)
21721 /* The address of the ALT_GIC_VCPUIF_GICH_LR3 register for the ALT_GIC_VCPUIF_HYP_ALIAS5 instance. */
21722 #define ALT_GIC_VCPUIF_HYP_ALIAS5_GICH_LR3_ADDR ALT_GIC_VCPUIF_GICH_LR3_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR)
21723 /* The base address byte offset for the start of the ALT_GIC_VCPUIF_HYP_ALIAS5 component. */
21724 #define ALT_GIC_VCPUIF_HYP_ALIAS5_OFST 0xfffc5a00
21725 /* The start address of the ALT_GIC_VCPUIF_HYP_ALIAS5 component. */
21726 #define ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GIC_VCPUIF_HYP_ALIAS5_OFST))
21727 /* The lower bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS5 component. */
21728 #define ALT_GIC_VCPUIF_HYP_ALIAS5_LB_ADDR ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR
21729 /* The upper bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS5 component. */
21730 #define ALT_GIC_VCPUIF_HYP_ALIAS5_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_ALIAS5_ADDR) + 0x200) - 1))
21731 
21732 
21733 /*
21734  * Component Instance : gic_vcpuif_hyp_alias6
21735  *
21736  * Instance gic_vcpuif_hyp_alias6 of component ALT_GIC_VCPUIF.
21737  *
21738  *
21739  */
21740 /* The address of the ALT_GIC_VCPUIF_GICH_HCR register for the ALT_GIC_VCPUIF_HYP_ALIAS6 instance. */
21741 #define ALT_GIC_VCPUIF_HYP_ALIAS6_GICH_HCR_ADDR ALT_GIC_VCPUIF_GICH_HCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR)
21742 /* The address of the ALT_GIC_VCPUIF_GICH_VTR register for the ALT_GIC_VCPUIF_HYP_ALIAS6 instance. */
21743 #define ALT_GIC_VCPUIF_HYP_ALIAS6_GICH_VTR_ADDR ALT_GIC_VCPUIF_GICH_VTR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR)
21744 /* The address of the ALT_GIC_VCPUIF_GICH_VMCR register for the ALT_GIC_VCPUIF_HYP_ALIAS6 instance. */
21745 #define ALT_GIC_VCPUIF_HYP_ALIAS6_GICH_VMCR_ADDR ALT_GIC_VCPUIF_GICH_VMCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR)
21746 /* The address of the ALT_GIC_VCPUIF_GICH_MISR register for the ALT_GIC_VCPUIF_HYP_ALIAS6 instance. */
21747 #define ALT_GIC_VCPUIF_HYP_ALIAS6_GICH_MISR_ADDR ALT_GIC_VCPUIF_GICH_MISR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR)
21748 /* The address of the ALT_GIC_VCPUIF_GICH_EISR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS6 instance. */
21749 #define ALT_GIC_VCPUIF_HYP_ALIAS6_GICH_EISR0_ADDR ALT_GIC_VCPUIF_GICH_EISR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR)
21750 /* The address of the ALT_GIC_VCPUIF_GICH_ELSR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS6 instance. */
21751 #define ALT_GIC_VCPUIF_HYP_ALIAS6_GICH_ELSR0_ADDR ALT_GIC_VCPUIF_GICH_ELSR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR)
21752 /* The address of the ALT_GIC_VCPUIF_GICH_APR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS6 instance. */
21753 #define ALT_GIC_VCPUIF_HYP_ALIAS6_GICH_APR0_ADDR ALT_GIC_VCPUIF_GICH_APR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR)
21754 /* The address of the ALT_GIC_VCPUIF_GICH_LR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS6 instance. */
21755 #define ALT_GIC_VCPUIF_HYP_ALIAS6_GICH_LR0_ADDR ALT_GIC_VCPUIF_GICH_LR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR)
21756 /* The address of the ALT_GIC_VCPUIF_GICH_LR1 register for the ALT_GIC_VCPUIF_HYP_ALIAS6 instance. */
21757 #define ALT_GIC_VCPUIF_HYP_ALIAS6_GICH_LR1_ADDR ALT_GIC_VCPUIF_GICH_LR1_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR)
21758 /* The address of the ALT_GIC_VCPUIF_GICH_LR2 register for the ALT_GIC_VCPUIF_HYP_ALIAS6 instance. */
21759 #define ALT_GIC_VCPUIF_HYP_ALIAS6_GICH_LR2_ADDR ALT_GIC_VCPUIF_GICH_LR2_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR)
21760 /* The address of the ALT_GIC_VCPUIF_GICH_LR3 register for the ALT_GIC_VCPUIF_HYP_ALIAS6 instance. */
21761 #define ALT_GIC_VCPUIF_HYP_ALIAS6_GICH_LR3_ADDR ALT_GIC_VCPUIF_GICH_LR3_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR)
21762 /* The base address byte offset for the start of the ALT_GIC_VCPUIF_HYP_ALIAS6 component. */
21763 #define ALT_GIC_VCPUIF_HYP_ALIAS6_OFST 0xfffc5c00
21764 /* The start address of the ALT_GIC_VCPUIF_HYP_ALIAS6 component. */
21765 #define ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GIC_VCPUIF_HYP_ALIAS6_OFST))
21766 /* The lower bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS6 component. */
21767 #define ALT_GIC_VCPUIF_HYP_ALIAS6_LB_ADDR ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR
21768 /* The upper bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS6 component. */
21769 #define ALT_GIC_VCPUIF_HYP_ALIAS6_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_ALIAS6_ADDR) + 0x200) - 1))
21770 
21771 
21772 /*
21773  * Component Instance : gic_vcpuif_hyp_alias7
21774  *
21775  * Instance gic_vcpuif_hyp_alias7 of component ALT_GIC_VCPUIF.
21776  *
21777  *
21778  */
21779 /* The address of the ALT_GIC_VCPUIF_GICH_HCR register for the ALT_GIC_VCPUIF_HYP_ALIAS7 instance. */
21780 #define ALT_GIC_VCPUIF_HYP_ALIAS7_GICH_HCR_ADDR ALT_GIC_VCPUIF_GICH_HCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR)
21781 /* The address of the ALT_GIC_VCPUIF_GICH_VTR register for the ALT_GIC_VCPUIF_HYP_ALIAS7 instance. */
21782 #define ALT_GIC_VCPUIF_HYP_ALIAS7_GICH_VTR_ADDR ALT_GIC_VCPUIF_GICH_VTR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR)
21783 /* The address of the ALT_GIC_VCPUIF_GICH_VMCR register for the ALT_GIC_VCPUIF_HYP_ALIAS7 instance. */
21784 #define ALT_GIC_VCPUIF_HYP_ALIAS7_GICH_VMCR_ADDR ALT_GIC_VCPUIF_GICH_VMCR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR)
21785 /* The address of the ALT_GIC_VCPUIF_GICH_MISR register for the ALT_GIC_VCPUIF_HYP_ALIAS7 instance. */
21786 #define ALT_GIC_VCPUIF_HYP_ALIAS7_GICH_MISR_ADDR ALT_GIC_VCPUIF_GICH_MISR_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR)
21787 /* The address of the ALT_GIC_VCPUIF_GICH_EISR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS7 instance. */
21788 #define ALT_GIC_VCPUIF_HYP_ALIAS7_GICH_EISR0_ADDR ALT_GIC_VCPUIF_GICH_EISR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR)
21789 /* The address of the ALT_GIC_VCPUIF_GICH_ELSR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS7 instance. */
21790 #define ALT_GIC_VCPUIF_HYP_ALIAS7_GICH_ELSR0_ADDR ALT_GIC_VCPUIF_GICH_ELSR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR)
21791 /* The address of the ALT_GIC_VCPUIF_GICH_APR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS7 instance. */
21792 #define ALT_GIC_VCPUIF_HYP_ALIAS7_GICH_APR0_ADDR ALT_GIC_VCPUIF_GICH_APR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR)
21793 /* The address of the ALT_GIC_VCPUIF_GICH_LR0 register for the ALT_GIC_VCPUIF_HYP_ALIAS7 instance. */
21794 #define ALT_GIC_VCPUIF_HYP_ALIAS7_GICH_LR0_ADDR ALT_GIC_VCPUIF_GICH_LR0_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR)
21795 /* The address of the ALT_GIC_VCPUIF_GICH_LR1 register for the ALT_GIC_VCPUIF_HYP_ALIAS7 instance. */
21796 #define ALT_GIC_VCPUIF_HYP_ALIAS7_GICH_LR1_ADDR ALT_GIC_VCPUIF_GICH_LR1_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR)
21797 /* The address of the ALT_GIC_VCPUIF_GICH_LR2 register for the ALT_GIC_VCPUIF_HYP_ALIAS7 instance. */
21798 #define ALT_GIC_VCPUIF_HYP_ALIAS7_GICH_LR2_ADDR ALT_GIC_VCPUIF_GICH_LR2_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR)
21799 /* The address of the ALT_GIC_VCPUIF_GICH_LR3 register for the ALT_GIC_VCPUIF_HYP_ALIAS7 instance. */
21800 #define ALT_GIC_VCPUIF_HYP_ALIAS7_GICH_LR3_ADDR ALT_GIC_VCPUIF_GICH_LR3_ADDR(ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR)
21801 /* The base address byte offset for the start of the ALT_GIC_VCPUIF_HYP_ALIAS7 component. */
21802 #define ALT_GIC_VCPUIF_HYP_ALIAS7_OFST 0xfffc5e00
21803 /* The start address of the ALT_GIC_VCPUIF_HYP_ALIAS7 component. */
21804 #define ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GIC_VCPUIF_HYP_ALIAS7_OFST))
21805 /* The lower bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS7 component. */
21806 #define ALT_GIC_VCPUIF_HYP_ALIAS7_LB_ADDR ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR
21807 /* The upper bound address range of the ALT_GIC_VCPUIF_HYP_ALIAS7 component. */
21808 #define ALT_GIC_VCPUIF_HYP_ALIAS7_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_ALIAS7_ADDR) + 0x200) - 1))
21809 
21810 
21811 /*
21812  * Component Instance : gic_vcpuif_hyp_vm
21813  *
21814  * Instance gic_vcpuif_hyp_vm of component ALT_GIC_VCPUIF_HYP_VM.
21815  *
21816  *
21817  */
21818 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_CTLR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21819 #define ALT_GIC_VCPUIF_HYP_VM_GICV_CTLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_CTLR_OFST))
21820 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_PMR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21821 #define ALT_GIC_VCPUIF_HYP_VM_GICV_PMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_PMR_OFST))
21822 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_BPR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21823 #define ALT_GIC_VCPUIF_HYP_VM_GICV_BPR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_BPR_OFST))
21824 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_IAR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21825 #define ALT_GIC_VCPUIF_HYP_VM_GICV_IAR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_IAR_OFST))
21826 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_EOIR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21827 #define ALT_GIC_VCPUIF_HYP_VM_GICV_EOIR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_EOIR_OFST))
21828 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_RPR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21829 #define ALT_GIC_VCPUIF_HYP_VM_GICV_RPR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_RPR_OFST))
21830 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_HPPIR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21831 #define ALT_GIC_VCPUIF_HYP_VM_GICV_HPPIR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_HPPIR_OFST))
21832 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_ABPR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21833 #define ALT_GIC_VCPUIF_HYP_VM_GICV_ABPR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_ABPR_OFST))
21834 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_AIAR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21835 #define ALT_GIC_VCPUIF_HYP_VM_GICV_AIAR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_AIAR_OFST))
21836 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_AEOIR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21837 #define ALT_GIC_VCPUIF_HYP_VM_GICV_AEOIR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_AEOIR_OFST))
21838 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_AHPPIR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21839 #define ALT_GIC_VCPUIF_HYP_VM_GICV_AHPPIR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_AHPPIR_OFST))
21840 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_APR0 register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21841 #define ALT_GIC_VCPUIF_HYP_VM_GICV_APR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_APR0_OFST))
21842 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_IIDR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21843 #define ALT_GIC_VCPUIF_HYP_VM_GICV_IIDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_IIDR_OFST))
21844 /* The address of the ALT_GIC_VCPUIF_HYP_VM_GICV_DIR register for the ALT_GIC_VCPUIF_HYP_VM instance. */
21845 #define ALT_GIC_VCPUIF_HYP_VM_GICV_DIR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + ALT_GIC_VCPUIF_HYP_VM_GICV_DIR_OFST))
21846 /* The base address byte offset for the start of the ALT_GIC_VCPUIF_HYP_VM component. */
21847 #define ALT_GIC_VCPUIF_HYP_VM_OFST 0xfffc6000
21848 /* The start address of the ALT_GIC_VCPUIF_HYP_VM component. */
21849 #define ALT_GIC_VCPUIF_HYP_VM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GIC_VCPUIF_HYP_VM_OFST))
21850 /* The lower bound address range of the ALT_GIC_VCPUIF_HYP_VM component. */
21851 #define ALT_GIC_VCPUIF_HYP_VM_LB_ADDR ALT_GIC_VCPUIF_HYP_VM_ADDR
21852 /* The upper bound address range of the ALT_GIC_VCPUIF_HYP_VM component. */
21853 #define ALT_GIC_VCPUIF_HYP_VM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GIC_VCPUIF_HYP_VM_ADDR) + 0x2000) - 1))
21854 
21855 
21856 /*
21857  * Component Instance : sdram_1
21858  *
21859  * Instance sdram_1 of component ALT_SDRAM.
21860  *
21861  *
21862  */
21863 /* The base address byte offset for the start of the ALT_SDRAM_1 component. */
21864 #define ALT_SDRAM_1_OFST 0x100000000
21865 /* The start address of the ALT_SDRAM_1 component. */
21866 #define ALT_SDRAM_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDRAM_1_OFST))
21867 /* The lower bound address range of the ALT_SDRAM_1 component. */
21868 #define ALT_SDRAM_1_LB_ADDR ALT_SDRAM_1_ADDR
21869 /* The upper bound address range of the ALT_SDRAM_1 component. */
21870 #define ALT_SDRAM_1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDRAM_1_ADDR) + 0x1f00000000) - 1))
21871 
21872 
21873 /*
21874  * Component Instance : sdram_2
21875  *
21876  * Instance sdram_2 of component ALT_SDRAM.
21877  *
21878  *
21879  */
21880 /* The base address byte offset for the start of the ALT_SDRAM_2 component. */
21881 #define ALT_SDRAM_2_OFST 0x200000000
21882 /* The start address of the ALT_SDRAM_2 component. */
21883 #define ALT_SDRAM_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDRAM_2_OFST))
21884 /* The lower bound address range of the ALT_SDRAM_2 component. */
21885 #define ALT_SDRAM_2_LB_ADDR ALT_SDRAM_2_ADDR
21886 /* The upper bound address range of the ALT_SDRAM_2 component. */
21887 #define ALT_SDRAM_2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDRAM_2_ADDR) + 0x1f00000000) - 1))
21888 
21889 
21890 /*
21891  * Component Instance : sdram_3
21892  *
21893  * Instance sdram_3 of component ALT_SDRAM.
21894  *
21895  *
21896  */
21897 /* The base address byte offset for the start of the ALT_SDRAM_3 component. */
21898 #define ALT_SDRAM_3_OFST 0x400000000
21899 /* The start address of the ALT_SDRAM_3 component. */
21900 #define ALT_SDRAM_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDRAM_3_OFST))
21901 /* The lower bound address range of the ALT_SDRAM_3 component. */
21902 #define ALT_SDRAM_3_LB_ADDR ALT_SDRAM_3_ADDR
21903 /* The upper bound address range of the ALT_SDRAM_3 component. */
21904 #define ALT_SDRAM_3_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDRAM_3_ADDR) + 0x1f00000000) - 1))
21905 
21906 
21907 /*
21908  * Component Instance : sdram_4
21909  *
21910  * Instance sdram_4 of component ALT_SDRAM.
21911  *
21912  *
21913  */
21914 /* The base address byte offset for the start of the ALT_SDRAM_4 component. */
21915 #define ALT_SDRAM_4_OFST 0x800000000
21916 /* The start address of the ALT_SDRAM_4 component. */
21917 #define ALT_SDRAM_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDRAM_4_OFST))
21918 /* The lower bound address range of the ALT_SDRAM_4 component. */
21919 #define ALT_SDRAM_4_LB_ADDR ALT_SDRAM_4_ADDR
21920 /* The upper bound address range of the ALT_SDRAM_4 component. */
21921 #define ALT_SDRAM_4_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDRAM_4_ADDR) + 0x1f00000000) - 1))
21922 
21923 
21924 /*
21925  * Component Instance : sdram_5
21926  *
21927  * Instance sdram_5 of component ALT_SDRAM.
21928  *
21929  *
21930  */
21931 /* The base address byte offset for the start of the ALT_SDRAM_5 component. */
21932 #define ALT_SDRAM_5_OFST 0x1000000000
21933 /* The start address of the ALT_SDRAM_5 component. */
21934 #define ALT_SDRAM_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDRAM_5_OFST))
21935 /* The lower bound address range of the ALT_SDRAM_5 component. */
21936 #define ALT_SDRAM_5_LB_ADDR ALT_SDRAM_5_ADDR
21937 /* The upper bound address range of the ALT_SDRAM_5 component. */
21938 #define ALT_SDRAM_5_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDRAM_5_ADDR) + 0x1f00000000) - 1))
21939 
21940 
21941 /*
21942  * Component Instance : fpga_bridge_aa64_h2f_1G
21943  *
21944  * Instance fpga_bridge_aa64_h2f_1G of component ALT_FPGA_BRIDGE_H2F_1G.
21945  *
21946  *
21947  */
21948 /* The base address byte offset for the start of the ALT_FPGA_BRIDGE_AA64_H2F_1G component. */
21949 #define ALT_FPGA_BRIDGE_AA64_H2F_1G_OFST 0x2000000000
21950 /* The start address of the ALT_FPGA_BRIDGE_AA64_H2F_1G component. */
21951 #define ALT_FPGA_BRIDGE_AA64_H2F_1G_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGA_BRIDGE_AA64_H2F_1G_OFST))
21952 /* The lower bound address range of the ALT_FPGA_BRIDGE_AA64_H2F_1G component. */
21953 #define ALT_FPGA_BRIDGE_AA64_H2F_1G_LB_ADDR ALT_FPGA_BRIDGE_AA64_H2F_1G_ADDR
21954 /* The upper bound address range of the ALT_FPGA_BRIDGE_AA64_H2F_1G component. */
21955 #define ALT_FPGA_BRIDGE_AA64_H2F_1G_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGA_BRIDGE_AA64_H2F_1G_ADDR) + 0x40000000) - 1))
21956 
21957 
21958 /*
21959  * Component Instance : fpga_bridge_aa64_h2f_512M
21960  *
21961  * Instance fpga_bridge_aa64_h2f_512M of component ALT_FPGA_BRIDGE_H2F_512M.
21962  *
21963  *
21964  */
21965 /* The base address byte offset for the start of the ALT_FPGA_BRIDGE_AA64_H2F_512M component. */
21966 #define ALT_FPGA_BRIDGE_AA64_H2F_512M_OFST 0x2040000000
21967 /* The start address of the ALT_FPGA_BRIDGE_AA64_H2F_512M component. */
21968 #define ALT_FPGA_BRIDGE_AA64_H2F_512M_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGA_BRIDGE_AA64_H2F_512M_OFST))
21969 /* The lower bound address range of the ALT_FPGA_BRIDGE_AA64_H2F_512M component. */
21970 #define ALT_FPGA_BRIDGE_AA64_H2F_512M_LB_ADDR ALT_FPGA_BRIDGE_AA64_H2F_512M_ADDR
21971 /* The upper bound address range of the ALT_FPGA_BRIDGE_AA64_H2F_512M component. */
21972 #define ALT_FPGA_BRIDGE_AA64_H2F_512M_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGA_BRIDGE_AA64_H2F_512M_ADDR) + 0x20000000) - 1))
21973 
21974 
21975 /*
21976  * Component Instance : fpga_bridge_h2f_2_5G
21977  *
21978  * Instance fpga_bridge_h2f_2_5G of component ALT_FPGA_BRIDGE_H2F_2_5G.
21979  *
21980  *
21981  */
21982 /* The base address byte offset for the start of the ALT_FPGA_BRIDGE_H2F_2_5G component. */
21983 #define ALT_FPGA_BRIDGE_H2F_2_5G_OFST 0x2060000000
21984 /* The start address of the ALT_FPGA_BRIDGE_H2F_2_5G component. */
21985 #define ALT_FPGA_BRIDGE_H2F_2_5G_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGA_BRIDGE_H2F_2_5G_OFST))
21986 /* The lower bound address range of the ALT_FPGA_BRIDGE_H2F_2_5G component. */
21987 #define ALT_FPGA_BRIDGE_H2F_2_5G_LB_ADDR ALT_FPGA_BRIDGE_H2F_2_5G_ADDR
21988 /* The upper bound address range of the ALT_FPGA_BRIDGE_H2F_2_5G component. */
21989 #define ALT_FPGA_BRIDGE_H2F_2_5G_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGA_BRIDGE_H2F_2_5G_ADDR) + 0xa0000000) - 1))
21990 
21991 
21992 #ifdef __ASSEMBLY__
21993 #define ALT_CAST(type, ptr) ptr
21994 #else /* __ASSEMBLY__ */
21995 #define ALT_CAST(type, ptr) ((type) (ptr))
21996 #endif /* __ASSEMBLY__ */
21997 /*
21998  * Address Space : HPS
21999  *
22000  * Address Map
22001  *
22002  * Address Range | Component
22003  * :----------------------------|:----------------------------------------
22004  * 0x00000000 - 0xffffffff | ALT_SDRAM_0
22005  * 0x80000000 - 0xbfffffff | ALT_FPGA_BRIDGE_AA32_H2F_1G
22006  * 0xc0000000 - 0xdfffffff | ALT_FPGA_BRIDGE_AA32_H2F_512M
22007  * 0xe0000000 - 0xf6ffffff | Undefined
22008  * 0xf7000000 - 0xf7049e5f | ALT_CCU_NOC
22009  * 0xf7049e60 - 0xf7ffffff | Undefined
22010  * 0xf8000000 - 0xf80003ff | ALT_MPFE_DDR_MAIN_PRB
22011  * 0xf8000400 - 0xf800047f | ALT_MPFE_DDR_MAIN_SCHED
22012  * 0xf8000480 - 0xf800ffff | Undefined
22013  * 0xf8010000 - 0xf801018f | ALT_MPFE_IOHMC
22014  * 0xf8010190 - 0xf8010fff | Undefined
22015  * 0xf8011000 - 0xf80114ff | ALT_MPFE_HMC_ADP
22016  * 0xf8011500 - 0xf801ffff | Undefined
22017  * 0xf8020000 - 0xf80200ff | ALT_MPFE_FW
22018  * 0xf8020000 - 0xf80200ff | ALT_SOC_NOC_FW_MPFE_CSR
22019  * 0xf8020100 - 0xf80201ff | ALT_MPFE_DDR_FW
22020  * 0xf8020100 - 0xf80201ff | ALT_SOC_NOC_FW_DDR_SCR
22021  * 0xf8020200 - 0xf80202ff | ALT_MPFE_F2SDR0_FW
22022  * 0xf8020200 - 0xf80202ff | ALT_SOC_NOC_FW_DDR_F2SDR0_SCR
22023  * 0xf8020300 - 0xf80203ff | ALT_MPFE_F2SDR1_FW
22024  * 0xf8020300 - 0xf80203ff | ALT_SOC_NOC_FW_DDR_F2SDR1_SCR
22025  * 0xf8020400 - 0xf80204ff | ALT_MPFE_F2SDR2_FW
22026  * 0xf8020400 - 0xf80204ff | ALT_SOC_NOC_FW_DDR_F2SDR2_SCR
22027  * 0xf8020500 - 0xf8020fff | Undefined
22028  * 0xf8021000 - 0xf802107f | ALT_MPFE_CS_OBS_AT_MAIN_ATBENDPT
22029  * 0xf8021080 - 0xf802207f | Undefined
22030  * 0xf8022080 - 0xf80220ff | ALT_MPFE_CCU_MEM0_QOS
22031  * 0xf8022100 - 0xf802217f | ALT_MPFE_F2SDR0_AXI128_QOS
22032  * 0xf8022180 - 0xf80221ff | ALT_MPFE_F2SDR0_AXI32_QOS
22033  * 0xf8022200 - 0xf802227f | ALT_MPFE_F2SDR0_AXI64_QOS
22034  * 0xf8022280 - 0xf80222ff | ALT_MPFE_F2SDR1_AXI128_QOS
22035  * 0xf8022300 - 0xf802237f | ALT_MPFE_F2SDR1_AXI32_QOS
22036  * 0xf8022380 - 0xf80223ff | ALT_MPFE_F2SDR1_AXI64_QOS
22037  * 0xf8022400 - 0xf802247f | ALT_MPFE_F2SDR2_AXI128_QOS
22038  * 0xf8022480 - 0xf80224ff | ALT_MPFE_F2SDR2_AXI32_QOS
22039  * 0xf8022500 - 0xf802257f | ALT_MPFE_F2SDR2_AXI64_QOS
22040  * 0xf8022580 - 0xf8023fff | Undefined
22041  * 0xf8024000 - 0xf80240ff | ALT_MPFE_F2SDR_MGR_MAIN_SBMGR
22042  * 0xf8024100 - 0xf8ffffff | Undefined
22043  * 0xf9000000 - 0xf91fffff | ALT_FPGA_BRIDGE_LWH2F
22044  * 0xf9200000 - 0xf9bfffff | Undefined
22045  * 0xf9c00000 - 0xf9ffffff | ALT_NOC_CACHE_CLEAN
22046  * 0xfa000000 - 0xfa03ffff | ALT_SMMU_SECURE
22047  * 0xfa040000 - 0xfbffffff | Undefined
22048  * 0xfc000000 - 0xfc3fffff | ALT_CS_STM
22049  * 0xfc400000 - 0xfeffffff | Undefined
22050  * 0xff000000 - 0xff1fffff | ALT_CS_DAP_SYSDBG
22051  * 0xff200000 - 0xff7fffff | Undefined
22052  * 0xff800000 - 0xff80105b | ALT_EMAC0
22053  * 0xff80105c - 0xff801fff | Undefined
22054  * 0xff802000 - 0xff80305b | ALT_EMAC1
22055  * 0xff80305c - 0xff803fff | Undefined
22056  * 0xff804000 - 0xff80505b | ALT_EMAC2
22057  * 0xff80505c - 0xff807fff | Undefined
22058  * 0xff808000 - 0xff8083ff | ALT_HPS_SDMMC
22059  * 0xff808400 - 0xff8bffff | Undefined
22060  * 0xff8c0000 - 0xff8c03ff | ALT_ECC_EMAC0_RX
22061  * 0xff8c0400 - 0xff8c07ff | ALT_ECC_EMAC0_TX
22062  * 0xff8c0800 - 0xff8c0bff | ALT_ECC_EMAC1_RX
22063  * 0xff8c0c00 - 0xff8c0fff | ALT_ECC_EMAC1_TX
22064  * 0xff8c1000 - 0xff8c13ff | ALT_ECC_EMAC2_RX
22065  * 0xff8c1400 - 0xff8c17ff | ALT_ECC_EMAC2_TX
22066  * 0xff8c1800 - 0xff8c3fff | Undefined
22067  * 0xff8c4000 - 0xff8c43ff | ALT_ECC_USBOTG0
22068  * 0xff8c4400 - 0xff8c47ff | ALT_ECC_USBOTG1
22069  * 0xff8c4800 - 0xff8c7fff | Undefined
22070  * 0xff8c8000 - 0xff8c83ff | ALT_HPS_ECC_NAND_E
22071  * 0xff8c8400 - 0xff8c87ff | ALT_HPS_ECC_NAND_R
22072  * 0xff8c8800 - 0xff8c8bff | ALT_HPS_ECC_NAND_W
22073  * 0xff8c8c00 - 0xff8c8fff | ALT_HPS_ECC_SDMMC
22074  * 0xff8c9000 - 0xff8c93ff | ALT_ECC_DMAC
22075  * 0xff8c9400 - 0xff8cbfff | Undefined
22076  * 0xff8cc000 - 0xff8cc3ff | ALT_ECC_APS_RAM
22077  * 0xff8cc400 - 0xff8cffff | Undefined
22078  * 0xff8d0000 - 0xff8d00ff | ALT_SDM_UART
22079  * 0xff8d0100 - 0xff8d01ff | ALT_SDM_I2C0
22080  * 0xff8d0200 - 0xff8d02ff | ALT_SDM_I2C1
22081  * 0xff8d0300 - 0xff8d037f | ALT_SDM_GPIO
22082  * 0xff8d0380 - 0xff8d0fff | Undefined
22083  * 0xff8d1000 - 0xff8d13ff | ALT_SDM_SDMMC
22084  * 0xff8d1400 - 0xff8d1fff | Undefined
22085  * 0xff8d2000 - 0xff8d20ff | ALT_SDM_QSPI
22086  * 0xff8d2100 - 0xff8fffff | Undefined
22087  * 0xff900000 - 0xff9fffff | ALT_SDM_QSPI_DATA
22088  * 0xffa00000 - 0xffa0ffff | ALT_SDM_NAND_DATA
22089  * 0xffa10000 - 0xffa102b3 | ALT_SDM_NAND_CFG
22090  * 0xffa102b4 - 0xffa102ff | Undefined
22091  * 0xffa10300 - 0xffa103f3 | ALT_SDM_NAND_PARAM
22092  * 0xffa103f4 - 0xffa103ff | Undefined
22093  * 0xffa10400 - 0xffa10543 | ALT_SDM_NAND_STATUS
22094  * 0xffa10544 - 0xffa1064f | Undefined
22095  * 0xffa10650 - 0xffa10663 | ALT_SDM_NAND_ECC
22096  * 0xffa10664 - 0xffa106ff | Undefined
22097  * 0xffa10700 - 0xffa107d3 | ALT_SDM_NAND_DMA
22098  * 0xffa107d4 - 0xffa1ffff | Undefined
22099  * 0xffa20000 - 0xffa203ff | ALT_SDM_ECC_SDMMC
22100  * 0xffa20400 - 0xffa207ff | Undefined
22101  * 0xffa20800 - 0xffa20bff | ALT_SDM_ECC_NAND_W
22102  * 0xffa20c00 - 0xffa20fff | Undefined
22103  * 0xffa21000 - 0xffa213ff | ALT_SDM_ECC_NAND_R
22104  * 0xffa21400 - 0xffa217ff | Undefined
22105  * 0xffa21800 - 0xffa21bff | ALT_SDM_ECC_NAND_E
22106  * 0xffa21c00 - 0xffa21fff | Undefined
22107  * 0xffa22000 - 0xffa223ff | ALT_SDM_ECC_QSPI
22108  * 0xffa22400 - 0xffa2ffff | Undefined
22109  * 0xffa30000 - 0xffa300ff | ALT_MBOX
22110  * 0xffa30100 - 0xffa303ff | Undefined
22111  * 0xffa30400 - 0xffa3040b | ALT_DOORBELL_IN
22112  * 0xffa3040c - 0xffa3047f | Undefined
22113  * 0xffa30480 - 0xffa3048b | ALT_DOORBELL_OUT
22114  * 0xffa3048c - 0xffa30fff | Undefined
22115  * 0xffa31000 - 0xffa3ffff | ALT_MBOX_STREAM
22116  * 0xffa40000 - 0xffafffff | Undefined
22117  * 0xffb00000 - 0xffb00eff | ALT_USB0_INTREG
22118  * 0xffb00f00 - 0xffb00fff | Undefined
22119  * 0xffb01000 - 0xffb01fff | ALT_USB0_DFIFO_0
22120  * 0xffb02000 - 0xffb02fff | ALT_USB0_DFIFO_1
22121  * 0xffb03000 - 0xffb03fff | ALT_USB0_DFIFO_2
22122  * 0xffb04000 - 0xffb04fff | ALT_USB0_DFIFO_3
22123  * 0xffb05000 - 0xffb05fff | ALT_USB0_DFIFO_4
22124  * 0xffb06000 - 0xffb06fff | ALT_USB0_DFIFO_5
22125  * 0xffb07000 - 0xffb07fff | ALT_USB0_DFIFO_6
22126  * 0xffb08000 - 0xffb08fff | ALT_USB0_DFIFO_7
22127  * 0xffb09000 - 0xffb09fff | ALT_USB0_DFIFO_8
22128  * 0xffb0a000 - 0xffb0afff | ALT_USB0_DFIFO_9
22129  * 0xffb0b000 - 0xffb0bfff | ALT_USB0_DFIFO_10
22130  * 0xffb0c000 - 0xffb0cfff | ALT_USB0_DFIFO_11
22131  * 0xffb0d000 - 0xffb0dfff | ALT_USB0_DFIFO_12
22132  * 0xffb0e000 - 0xffb0efff | ALT_USB0_DFIFO_13
22133  * 0xffb0f000 - 0xffb0ffff | ALT_USB0_DFIFO_14
22134  * 0xffb10000 - 0xffb10fff | ALT_USB0_DFIFO_15
22135  * 0xffb11000 - 0xffb1ffff | Undefined
22136  * 0xffb20000 - 0xffb27fff | ALT_USB0_DFIFO_DA
22137  * 0xffb28000 - 0xffb3ffff | Undefined
22138  * 0xffb40000 - 0xffb40eff | ALT_USB1_INTREG
22139  * 0xffb40f00 - 0xffb40fff | Undefined
22140  * 0xffb41000 - 0xffb41fff | ALT_USB1_DFIFO_0
22141  * 0xffb42000 - 0xffb42fff | ALT_USB1_DFIFO_1
22142  * 0xffb43000 - 0xffb43fff | ALT_USB1_DFIFO_2
22143  * 0xffb44000 - 0xffb44fff | ALT_USB1_DFIFO_3
22144  * 0xffb45000 - 0xffb45fff | ALT_USB1_DFIFO_4
22145  * 0xffb46000 - 0xffb46fff | ALT_USB1_DFIFO_5
22146  * 0xffb47000 - 0xffb47fff | ALT_USB1_DFIFO_6
22147  * 0xffb48000 - 0xffb48fff | ALT_USB1_DFIFO_7
22148  * 0xffb49000 - 0xffb49fff | ALT_USB1_DFIFO_8
22149  * 0xffb4a000 - 0xffb4afff | ALT_USB1_DFIFO_9
22150  * 0xffb4b000 - 0xffb4bfff | ALT_USB1_DFIFO_10
22151  * 0xffb4c000 - 0xffb4cfff | ALT_USB1_DFIFO_11
22152  * 0xffb4d000 - 0xffb4dfff | ALT_USB1_DFIFO_12
22153  * 0xffb4e000 - 0xffb4efff | ALT_USB1_DFIFO_13
22154  * 0xffb4f000 - 0xffb4ffff | ALT_USB1_DFIFO_14
22155  * 0xffb50000 - 0xffb50fff | ALT_USB1_DFIFO_15
22156  * 0xffb51000 - 0xffb5ffff | Undefined
22157  * 0xffb60000 - 0xffb67fff | ALT_USB1_DFIFO_DA
22158  * 0xffb68000 - 0xffb7ffff | Undefined
22159  * 0xffb80000 - 0xffb802b3 | ALT_HPS_NAND_CFG
22160  * 0xffb802b4 - 0xffb802ff | Undefined
22161  * 0xffb80300 - 0xffb803f3 | ALT_HPS_NAND_PARAM
22162  * 0xffb803f4 - 0xffb803ff | Undefined
22163  * 0xffb80400 - 0xffb80543 | ALT_HPS_NAND_STATUS
22164  * 0xffb80544 - 0xffb8064f | Undefined
22165  * 0xffb80650 - 0xffb80663 | ALT_HPS_NAND_ECC
22166  * 0xffb80664 - 0xffb806ff | Undefined
22167  * 0xffb80700 - 0xffb807d3 | ALT_HPS_NAND_DMA
22168  * 0xffb807d4 - 0xffb8ffff | Undefined
22169  * 0xffb90000 - 0xffb9ffff | ALT_HPS_NAND_DATA
22170  * 0xffba0000 - 0xffc01fff | Undefined
22171  * 0xffc02000 - 0xffc020ff | ALT_UART0
22172  * 0xffc02100 - 0xffc021ff | ALT_UART1
22173  * 0xffc02200 - 0xffc027ff | Undefined
22174  * 0xffc02800 - 0xffc028ff | ALT_I2C0
22175  * 0xffc02900 - 0xffc029ff | ALT_I2C1
22176  * 0xffc02a00 - 0xffc02aff | ALT_I2C_EMAC0
22177  * 0xffc02b00 - 0xffc02bff | ALT_I2C_EMAC1
22178  * 0xffc02c00 - 0xffc02cff | ALT_I2C_EMAC2
22179  * 0xffc02d00 - 0xffc02fff | Undefined
22180  * 0xffc03000 - 0xffc030ff | ALT_TMR_SP0
22181  * 0xffc03100 - 0xffc031ff | ALT_TMR_SP1
22182  * 0xffc03200 - 0xffc0327f | ALT_GPIO0
22183  * 0xffc03280 - 0xffc032ff | Undefined
22184  * 0xffc03300 - 0xffc0337f | ALT_GPIO1
22185  * 0xffc03380 - 0xffcfffff | Undefined
22186  * 0xffd00000 - 0xffd000ff | ALT_TMR_SYS0
22187  * 0xffd00100 - 0xffd001ff | ALT_TMR_SYS1
22188  * 0xffd00200 - 0xffd002ff | ALT_WDT0
22189  * 0xffd00300 - 0xffd003ff | ALT_WDT1
22190  * 0xffd00400 - 0xffd004ff | ALT_WDT2
22191  * 0xffd00500 - 0xffd005ff | ALT_WDT3
22192  * 0xffd00600 - 0xffd00fff | Undefined
22193  * 0xffd01000 - 0xffd01fff | ALT_CS_GTIMER_RW_SEC
22194  * 0xffd02000 - 0xffd02fff | ALT_CS_GTIMER_RO_NSEC
22195  * 0xffd03000 - 0xffd0ffff | Undefined
22196  * 0xffd10000 - 0xffd1002b | ALT_CLKMGR
22197  * 0xffd1002c - 0xffd1002f | Undefined
22198  * 0xffd10030 - 0xffd1009f | ALT_CLKMGR_MAINPLL
22199  * 0xffd100a0 - 0xffd100a3 | Undefined
22200  * 0xffd100a4 - 0xffd10123 | ALT_CLKMGR_PERPLL
22201  * 0xffd10124 - 0xffd10127 | Undefined
22202  * 0xffd10128 - 0xffd10147 | ALT_CLKMGR_ALTERA
22203  * 0xffd10148 - 0xffd10fff | Undefined
22204  * 0xffd11000 - 0xffd110ff | ALT_RSTMGR
22205  * 0xffd11100 - 0xffd11fff | Undefined
22206  * 0xffd12000 - 0xffd124ff | ALT_SYSMGR_CORE
22207  * 0xffd12500 - 0xffd12fff | Undefined
22208  * 0xffd13000 - 0xffd13fff | ALT_PINMUX
22209  * 0xffd14000 - 0xffd20fff | Undefined
22210  * 0xffd21000 - 0xffd210ff | ALT_NOC_FW_L4_PER_SCR
22211  * 0xffd21100 - 0xffd211ff | ALT_NOC_FW_L4_SYS_SCR
22212  * 0xffd21200 - 0xffd212ff | ALT_NOC_FW_H2F_SCR
22213  * 0xffd21300 - 0xffd213ff | ALT_NOC_FW_LWH2F_SCR
22214  * 0xffd21400 - 0xffd214ff | ALT_NOC_FW_TCU_SCR
22215  * 0xffd21500 - 0xffd21fff | Undefined
22216  * 0xffd22000 - 0xffd2207f | ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT
22217  * 0xffd22080 - 0xffd220ff | ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ERRLOG_0
22218  * 0xffd22100 - 0xffd223ff | Undefined
22219  * 0xffd22400 - 0xffd227ff | ALT_NOC_CCU_MAIN_PRB
22220  * 0xffd22800 - 0xffd22bff | ALT_NOC_CCU_EMAC_MAIN_PRB
22221  * 0xffd22c00 - 0xffd22fff | ALT_NOC_CCU_H2F_MAIN_PRB
22222  * 0xffd23000 - 0xffd2307f | ALT_NOC_CCU_PRB_EMAC_TBU_TRANSTATPROF
22223  * 0xffd23080 - 0xffd23fff | Undefined
22224  * 0xffd24000 - 0xffd2407f | ALT_NOC_CCU_IOS_CCU_IOS_MAIN_QOS
22225  * 0xffd24080 - 0xffd240ff | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS
22226  * 0xffd24100 - 0xffd2417f | ALT_NOC_CCU_IOS_EMAC_TBU_M_MAIN_QOS
22227  * 0xffd24180 - 0xffd241ff | ALT_NOC_CCU_IOS_IO_TBU_M_MAIN_QOS
22228  * 0xffd24200 - 0xffd2427f | ALT_NOC_CCU_IOS_SDM_TBU_M_MAIN_QOS
22229  * 0xffd24280 - 0xffd243ff | Undefined
22230  * 0xffd24400 - 0xffd2447f | ALT_NOC_CCU_EMAC_TBU_TRANSTATFILT
22231  * 0xffd24480 - 0xffd247ff | Undefined
22232  * 0xffd24800 - 0xffd248ff | ALT_NOC_FW_MMAP_PRIV
22233  * 0xffd24900 - 0xffd24bff | Undefined
22234  * 0xffd24c00 - 0xffd24c7f | ALT_NOC_CCU_L4_LINK_RATE_ADPTR
22235  * 0xffd24c80 - 0xffd9ffff | Undefined
22236  * 0xffda0000 - 0xffda0fff | ALT_DMA_NONSECURE
22237  * 0xffda1000 - 0xffda1fff | ALT_DMA_SECURE
22238  * 0xffda2000 - 0xffda20ff | ALT_SPIS0
22239  * 0xffda2100 - 0xffda2fff | Undefined
22240  * 0xffda3000 - 0xffda30ff | ALT_SPIS1
22241  * 0xffda3100 - 0xffda3fff | Undefined
22242  * 0xffda4000 - 0xffda40ff | ALT_SPIM0
22243  * 0xffda4100 - 0xffda4fff | Undefined
22244  * 0xffda5000 - 0xffda50ff | ALT_SPIM1
22245  * 0xffda5100 - 0xffdfffff | Undefined
22246  * 0xffe00000 - 0xffe3ffff | ALT_OCRAM
22247  * 0xffe40000 - 0xfffc0fff | Undefined
22248  * 0xfffc1000 - 0xfffc1fff | ALT_GIC_DIST
22249  * 0xfffc2000 - 0xfffc3fff | ALT_GIC_CPUIF
22250  * 0xfffc4000 - 0xfffc41ff | ALT_GIC_VCPUIF_HYP
22251  * 0xfffc4200 - 0xfffc4fff | Undefined
22252  * 0xfffc5000 - 0xfffc51ff | ALT_GIC_VCPUIF_HYP_ALIAS0
22253  * 0xfffc5200 - 0xfffc53ff | ALT_GIC_VCPUIF_HYP_ALIAS1
22254  * 0xfffc5400 - 0xfffc55ff | ALT_GIC_VCPUIF_HYP_ALIAS2
22255  * 0xfffc5600 - 0xfffc57ff | ALT_GIC_VCPUIF_HYP_ALIAS3
22256  * 0xfffc5800 - 0xfffc59ff | ALT_GIC_VCPUIF_HYP_ALIAS4
22257  * 0xfffc5a00 - 0xfffc5bff | ALT_GIC_VCPUIF_HYP_ALIAS5
22258  * 0xfffc5c00 - 0xfffc5dff | ALT_GIC_VCPUIF_HYP_ALIAS6
22259  * 0xfffc5e00 - 0xfffc5fff | ALT_GIC_VCPUIF_HYP_ALIAS7
22260  * 0xfffc6000 - 0xfffc7fff | ALT_GIC_VCPUIF_HYP_VM
22261  * 0xfffc8000 - 0xffffffff | Undefined
22262  * 0x100000000 - 0x1fffffffff | ALT_SDRAM_1
22263  * 0x200000000 - 0x20ffffffff | ALT_SDRAM_2
22264  * 0x400000000 - 0x22ffffffff | ALT_SDRAM_3
22265  * 0x800000000 - 0x26ffffffff | ALT_SDRAM_4
22266  * 0x1000000000 - 0x2effffffff | ALT_SDRAM_5
22267  * 0x2000000000 - 0x203fffffff | ALT_FPGA_BRIDGE_AA64_H2F_1G
22268  * 0x2040000000 - 0x205fffffff | ALT_FPGA_BRIDGE_AA64_H2F_512M
22269  * 0x2060000000 - 0x20ffffffff | ALT_FPGA_BRIDGE_H2F_2_5G
22270  * 0x2100000000 - 0x100000000 | Undefined
22271  */
22272 
22273 #ifdef __cplusplus
22274 }
22275 #endif /* __cplusplus */
22276 #endif /* __ALT_SOCAL_HPS_H__ */
22277