Introduction

The Sodia evaluation board is enabling to evaluate more widely applications of ARM®Cortex®-A9 by higher extensibility with two extension connectors(HSMC). This evaluation board enables to develop the embedded system designs quickly which can bridge to the real applications.

And the Sodia is a higher model of Macnica Helio SoC Evaluation Kit (Cyclone®V SoC starter kit) and is most suitable for users who hope the expansion from Helio. Around HPS function same as Helio, and software is compatible.

sodia_main.png

Board photos

Top view

sodia photo top.png

Bottom view

sodia photo bottom.png

Board block diagram

sodia_block_diagram_v1.png

Board Features

The Macnica Sodia Cyclone V SoC evaluation board features the following:
  • Featured device
    • Cyclone® V ST SoC – 5CSTFD6D5F31I7N (SoC)
  • FPGA configuration sources
    • Quad-Serial Configuration flash -- EPCQ 256Mbit
    • Hard processor system (HPS)
    • USB-BlasterTM or USB-BlasterTM II Download Cable
  • FPGA memory
    • 256MB DDR3 SDRAM (32 bit)
  • FPGA I/O interfaces
    • x2 High Speed Mezzanine Card (HSMC) connectors
      • Port A: x4 transceivers, x17 TX LVDS, x17 RX LVDS
      • Port B: x2 transceivers, x17 TX LVDS, x17 RX LVDS
    • x1 Digital Visual Interface(DVI) output interface
    • x1 Audio interface (Line-in/out, Mic-in)
    • x2 push buttons
    • x2 switches
    • x4 LEDs
  • HPS boot sources
    • 64 MB QSPI Flash
    • Removable SD Card flash
    • FPGA
  • HPS memory
    • 1 GB DDR3 SDRAM (32 bit) with error correction code (ECC)
    • 64 MB QSPI flash
    • 4kB EEPROM
  • HPS I/O interfaces
    • x1 SD Card socket
    • x1 USB 2.0 Host
    • x1 10/100/1000 Gigabit Ethernet
    • x1 UART (UART to USB bridge)
    • x1 real-time clock (with battery backup)
    • x4 push buttons
    • x4 switches
    • x4 LEDs
  • Clocking
    • 100 / 148.5 MHz LVDS oscillator for FPGA reference clock input
    • 125 MHz LVDS programmable oscillator for FPGA reference clock input
    • 25 MHz single-ended oscillator for HPS clock input
    • 27 / 50 / 100 MHz single-ended oscillator for FPGA clock input
    • SMA input for HPS clock
    • SMA input for FPGA clock
  • Power
    • DC input 12 V Adaptor
  • Ambient Temperature Range (Operating)
    • 5 ~ +35 degrees
  • Storage Temperature Range(Non-operating)
    • 5 ~ +35 degrees
  • Humidity Range
    • 85% R.H. Maximum. No condensation permitted.
    • Storage area is to be free of dust, corrosive gases and dew formation.
  • Mechanical size
    • 200mm x 150mm
 

Documentation

Category Item Rev. Download Note
Documentation Getting Started 1.0

Sodia_Getting_Started_EN_v1.0.pdf

Sodia_Getting_Started_JP_v1.0.pdf

EN: English

JP: Japanese

Reference Manual 1.0

Sodia_Reference_Manual_EN_v1.0.pdf

Sodia_Reference_Manual_JP_v1.0.pdf

EN: English

JP: Japanese

Board References Schematic A sodia_board_SCH_revA.pdf  
Bill of Materials A sodia_board_BOM_revA.xlsx  
PWB data A sodia_board_PWB_revA.pdf  
  

Reference Designs

Item Rev. Download Note
HW Reference Designs v1.1 sodia_ghrd_v16.1.0.zip Quartus Prime Standard Edition v16.1
HW Reference Designs v1.0 sodia_ghrd_v15.1.2.zip Quartus Prime Standard Edition v15.1.2
Linux SD Card Image v1.1 sodia_sdimage_ACDS16.1_REL_GSRD_PR.tgz Linux Kernel : v4.1.22-ltsi
Rootfs : Angstrom 2015.12
Note: gator.ko is not installed.
Linux SD Card Image v1.0 sodia_gsrd_sdimage_v3.10-ltsi_v15.1.1.tar.gz Linux Kernel : v3.10-ltsi
Rootfs : Angstrom
 

Demo

日本語リソース

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