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This project provides a complete 2D/3D graphics sub-system solution for Altera SoCs including optional warping support

Introduction

This project comprises a complete 2D/3D graphics system solution for Altera SoCs. It integrates the following IP cores provided as QSys components: D/AVE HD, Warping Engine, CDC-300 Display controller. Please refer also to TES Graphics, Video I/O and HMI IPs for a list of all available TES Electronic Solutions graphics and video IPs.

The complete package is available as OpenCore Plus Evaluation kit on the TES website (see links below).

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Boards

System Setup

  • ARM Cortex-A9 @ 800 MHz
  • OS: Yocto-Linux
  • GPU: TES D/AVE HD @ 75MHz (55 kLEs)
  • Display Controller: TES CDC-200 (1 kLEs)
  • Display: 800x480 capacitive touch

Evaluation Kit Contents

The Evaluation Kit contains everything needed to perform a system evaluation, integration on a new SoC /Linux based target platform and prototype product development.
  • D/AVE HD, Warping Engine and CDC-300 QSys Components
  • Evaluation License Keys
  • Drivers for ARM/Linux as libraries
  • Example application (Testcase) ANSI-C source code (see Screenshots below)
  • D/AVE HD simulator for PC (SoftD/AVE)
  • Complete API documentation

Screenshots

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Evaluation Kit download area on TES website (requires registration)

Registration on TES website

TES Graphics IP Website

Contact: graphics@tes-dst.com

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