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Table of Contents
This project provides a complete HMI system solution for Altera FPGAs and SoCs including the Guiliani HMI framework, the D/AVE 2D graphics rendering engine and the CDC-200 display controller.
This project provides a complete HMI system solution for Altera FPGAs and SoCs including the Guiliani HMI framework, the D/AVE 2D graphics rendering engine and the CDC-200 display controller.
12 May 2016 - 21:12
|
Version 10
|
Michael Daum
| ARM, Cyclone, D/AVE, Display, Display Controller, Evaluation Kit, Graphics, Guiliani, HMI, Human Machine Interface, NIOS, Qt, System Solution, Touchcontrol, Touchscreen
| Board: | AlteraSoCDevelopmentBoard |
|---|---|
| State: | running |
| Members: | ThomasHase |
| Homepage: | http://tes-dst.com/tes-dst/index.php/hmi-tooling/guiliani--dave-2d-for-altera-fpgas?innerpage_style=1 |
Video
Introduction
Driven by smartphones and tablets people expect modern touch-screen based user interfaces in all kind of devices and industries. While smartphones and tables usually provide significant GPU and CPU power, embedded devices are often very cost driven and thus resource constraint. With this project we introduce a complete and cost-efficient human machine interface (HMI) system solution providing 2D and quasi-3D graphics experiences for Altera FPGAs and SoCs. The system solution is comprised of the following main IP blocks (see TES Graphics, Video I/O and HMI IPs for more information about all TES IPs):- TES Guiliani HMI framework (Guiliani (www.guiliani.de/en) is a framework like Qt with 2D and quasi 3D graphics capabilities and a much lower footprint (2.5MB program memory iso. >50MB program memory))
- TES D/AVE 2D graphics rendering engine
- TES CDC-200 display controller
System Setup
- CPU: Altera NIOS II soft CPU (alternative ARM under Linux)
- Running at 100 MHz
- GPU: TES D/AVE 2D core
- 10k Logic Elements
- Running at 66 MHz
- Display Controller: TES CDC-200
- ~1k LEs
Software
- CPU Nios II, bare-metal, or ARM with Linux
- HMI Framework: TES Guiliani
- 750kB – 2.2MB Program Code Footprint - depending on configuration
- “ShowRoom” Demo Application
- Resolution: 800x480x16bit
- Ressources: 2.8MB Pictures and Fonts
Boards
- Terasic NEEK Evaluation Board
- Altera Cyclone III FPGA with 25k Logic Elements
- Display 800x480 resistive touch screen
- Terasic VEEK-MT Board
- Altera Cyclone IV FPGA with 114k Logic Elements
- Display 800x480 capacitive touch screen
- Terasic VEEK-MT C5 SoC Board
- Altera Cyclone V SX SoC with 110k Logic Elements
- Display 800x480 capacitive touch screen
Photos
Links
Guiliani Homepage Evaluation Kit download area on TES website (requires registration) Registration on TES website TES Graphics IP Website Contact: graphics@tes-dst.com© 1999-2024 RocketBoards.org by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
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