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Recent Changes
Arria 10 SoC Hardware Reference Design That Demonstrates Partial Reconfiguration
AMP Project under Cyclone V SoC with eMMC Flash
OpenCL usb Camera On DE1-SOC YUV to RGB Conversion using OpenCL
24 Oct 2017 - 10:40
|
Version 9
|
WelonTank
| Board: | Terasic DE1-SoC Development and Education Board |
|---|---|
| State: | running |
| Git: | https://github.com/thinkoco/de1_soc_opencl |
Tools
Quartus II 16.1, Altera OpenCL SDK 16.1How to do
Clone the Hardware Project and Linux source code
1.Hardware
git clone https://github.com/thinkoco/de1_soc_opencl.git
2.copy the file to de1soc OpenCL BSP path
cp -rf de1soc_sharedonly_vga ~/intelFPGA/16.1/hld/board/terasic/de1soc
3.Modify the board_enc.xml file
form :<hardware dir="." default="de1soc_sharedonly"></hardware>
to : <hardware dir="." default="de1soc_sharedonly_vga"></hardware>
4.Linux
git clone https://github.com/thinkoco/linux-socfpga.git
cd linux-socfpga
git checkout -b de1soc_opencl origin/de1_soc_opencl
cd de1soc_opencl
cp Linux-Config .config
make zImage
make socfpga_cyclone5_de1soc.dtb
5.Image file
http://pan.baidu.com/s/1ge6wJhpMSEL:[4:0] ——> 00010， SW10【4:0】on,on,on,off,on
Test
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