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Recent Changes
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Intel® Agilex® 7 I-Series Transceiver-SoC Development Kit (4x F-Tile) System Example Design With IEEE1588 PTP (25GE/10GE 2-Port)
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Multiprocessor Nios V/m system: creating your first GeMRTOS application
Quick Start Guide on how to create a multiprocessor system with Nios V processor and GeMRTOS support -
Setting up and Using Bridges on Agilex 7 SoC
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Agilex 7 SoC With eMMC Storage On HPS
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Stratix 10 SoC with eMMC Storage on HPS
Table of Contents
Classified Topic
A10GSRDV1501BootLinuxFromSDCard
27 January 2021
| PaulLinehan
Project
2.4" Touch LCD Painter Demo on Atlas-SOC
This demonstration shows how to implement the painter demonstration on 2.4" LCD with Atlas-SoC development board
2D/3D HD Graphics System Solution on Cyclone V SoC
This project provides a complete 2D/3D graphics sub-system solution for Altera SoCs including optional warping support
12 May 2016
| Michael Daum
| CDC-200/300, Cyclone V SoC, D/AVE, D/AVE HD, Display, Display Controller, Graphics, Rendering, TES Electronic Solutions, Warping
Arria 10 PCIe Root Port with MSI
Reference Design on Arria 10 Development Kit demonstrating a Gen2x4 Capable PCIe Root Port.
28 September 2016
| Michael Daum
DevBoard 3D & CNC
3D Printer Controller with Slicer System ( with Altera SoCFPGA )
Device Wide AMP
Heterogeneous Asymmetric Multiprocessing Reference Design based on OpenMCAPI and involving communication between Nios running uCOS-II and ARM running Linux SMP
Graphics on Altera MAX10 Arrow/Terasic DECA Board
Running graphics on DECA
Industrial communication protocols
Solution for industrial ethernet devices, PROFIBUS slave and PROFIBUS master
OpenCL Mandelbrot Demo on Atlas-SoC
21 September 2015
| ChrisRauer
| Demo, Example Design | atlas, cyclone5, cylconev, de0-nano-soc, demo, linux, mandelbrot, opencl
QSPI XIP demo
Extend boot and execute-in-place (XIP) a QSPI reference design to showcase L2 preloading and locking for fast execution.
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